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r9687 Sunday 28th November, 2010 at 01:33:24 UTC by Nathan Woods
[C64] Multisession fixes. [Atari Ace]

[docs]	messnew.txt
[src/mess/drivers]	c128.c c64.c c65.c
[src/mess/includes]	c128.h c64.h c65.h
[src/mess/machine]	c128.c c64.c c65.c
[src/mess/video]	vic4567.c vic4567.h vic6567.c

src/mess/machine/c65.c

r9686	r9687
195	195
196	196	static WRITE8_DEVICE_HANDLER( c65_cia1_port_a_w )
197	197	{
	198	c65_state *state = device->machine->driver_data<c65_state>();
198	199	static const int helper[4] = {0xc000, 0x8000, 0x4000, 0x0000};
199	200	running_device *serbus = device->machine->device("serial_bus");
200	201
r9686	r9687
202	203	cbm_iec_clk_w(serbus, device, !BIT(data, 4));
203	204	cbm_iec_data_w(serbus, device, !BIT(data, 5));
204	205
205		c64_vicaddr = c64_memory + helper[data & 0x03];
	206	state->vicaddr = state->memory + helper[data & 0x03];
206	207	}
207	208
208	209	static WRITE_LINE_DEVICE_HANDLER( c65_cia1_interrupt )
r9686	r9687
247	248	/* dma controller and bankswitch hardware ?*/
248	249	static READ8_HANDLER( c65_read_mem )
249	250	{
	251	c65_state *state = space->machine->driver_data<c65_state>();
250	252	UINT8 result;
251	253	if (offset <= 0x0ffff)
252		result = c64_memory[offset];
	254	result = state->memory[offset];
253	255	else
254	256	result = space->read_byte(offset);
255	257	return result;
r9686	r9687
257	259
258	260	static WRITE8_HANDLER( c65_write_mem )
259	261	{
	262	c65_state *state = space->machine->driver_data<c65_state>();
260	263	if (offset <= 0x0ffff)
261		c64_memory[offset] = data;
	264	state->memory[offset] = data;
262	265	else
263	266	space->write_byte(offset, data);
264	267	}
r9686	r9687
815	818	{
816	819	if (value & 1)
817	820	{
818		memory_set_bankptr(machine, "bank8", c64_colorram + 0x400);
819		memory_set_bankptr(machine, "bank9", c64_colorram + 0x400);
	821	memory_set_bankptr(machine, "bank8", state->colorram + 0x400);
	822	memory_set_bankptr(machine, "bank9", state->colorram + 0x400);
820	823	memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0dc00, 0x0dfff, 0, 0, "bank8");
821	824	memory_install_write_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0dc00, 0x0dfff, 0, 0, "bank9");
822	825	}
r9686	r9687
831	834	#if 0
832	835	/* cartridge roms !?*/
833	836	if (value & 0x08)
834		memory_set_bankptr(machine, "bank1", c64_roml);
	837	memory_set_bankptr(machine, "bank1", state->roml);
835	838	else
836		memory_set_bankptr(machine, "bank1", c64_memory + 0x8000);
	839	memory_set_bankptr(machine, "bank1", state->memory + 0x8000);
837	840
838	841	if (value & 0x10)
839		memory_set_bankptr(machine, "bank2", c64_basic);
	842	memory_set_bankptr(machine, "bank2", state->basic);
840	843	else
841		memory_set_bankptr(machine, "bank2", c64_memory + 0xa000);
	844	memory_set_bankptr(machine, "bank2", state->memory + 0xa000);
842	845	#endif
843	846	if ((state->old_value^value) & 0x20)
844	847	{
r9686	r9687
846	849	if (value & 0x20)
847	850	memory_set_bankptr(machine, "bank3", state->interface);
848	851	else
849		memory_set_bankptr(machine, "bank3", c64_memory + 0xc000);
	852	memory_set_bankptr(machine, "bank3", state->memory + 0xc000);
850	853	}
851	854	state->charset_select = value & 0x40;
852	855	#if 0
853	856	/* cartridge roms !?*/
854	857	if (value & 0x80)
855		memory_set_bankptr(machine, "bank8", c64_kernal);
	858	memory_set_bankptr(machine, "bank8", state->kernal);
856	859	else
857		memory_set_bankptr(machine, "bank6", c64_memory + 0xe000);
	860	memory_set_bankptr(machine, "bank6", state->memory + 0xe000);
858	861	#endif
859	862	state->old_value = value;
860	863	}
r9686	r9687
873	876	hiram = (data & 2) ? 1 : 0;
874	877	charen = (data & 4) ? 1 : 0;
875	878
876		if ((!c64_game && c64_exrom) || (loram && hiram && !c64_exrom))
877		memory_set_bankptr(machine, "bank1", c64_roml);
	879	if ((!state->game && state->exrom) || (loram && hiram && !state->exrom))
	880	memory_set_bankptr(machine, "bank1", state->roml);
878	881	else
879		memory_set_bankptr(machine, "bank1", c64_memory + 0x8000);
	882	memory_set_bankptr(machine, "bank1", state->memory + 0x8000);
880	883
881		if ((!c64_game && c64_exrom && hiram) || (!c64_exrom))
882		memory_set_bankptr(machine, "bank2", c64_romh);
	884	if ((!state->game && state->exrom && hiram) || (!state->exrom))
	885	memory_set_bankptr(machine, "bank2", state->romh);
883	886	else if (loram && hiram)
884		memory_set_bankptr(machine, "bank2", c64_basic);
	887	memory_set_bankptr(machine, "bank2", state->basic);
885	888	else
886		memory_set_bankptr(machine, "bank2", c64_memory + 0xa000);
	889	memory_set_bankptr(machine, "bank2", state->memory + 0xa000);
887	890
888		if ((!c64_game && c64_exrom) || (charen && (loram || hiram)))
	891	if ((!state->game && state->exrom) || (charen && (loram || hiram)))
889	892	{
890	893	state->io_on = 1;
891		memory_set_bankptr(machine, "bank6", c64_colorram);
892		memory_set_bankptr(machine, "bank7", c64_colorram);
	894	memory_set_bankptr(machine, "bank6", state->colorram);
	895	memory_set_bankptr(machine, "bank7", state->colorram);
893	896
894	897	if (state->io_dc00_on)
895	898	{
r9686	r9687
900	903	{
901	904	memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0dc00, 0x0dfff, 0, 0, "bank8");
902	905	memory_install_write_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0dc00, 0x0dfff, 0, 0, "bank9");
903		memory_set_bankptr(machine, "bank8", c64_colorram + 0x400);
904		memory_set_bankptr(machine, "bank9", c64_colorram + 0x400);
	906	memory_set_bankptr(machine, "bank8", state->colorram + 0x400);
	907	memory_set_bankptr(machine, "bank9", state->colorram + 0x400);
905	908	}
906	909	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0d000, 0x0d7ff, 0, 0, c65_read_io);
907	910	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0d000, 0x0d7ff, 0, 0, c65_write_io);
r9686	r9687
909	912	else
910	913	{
911	914	state->io_on = 0;
912		memory_set_bankptr(machine, "bank5", c64_memory + 0xd000);
913		memory_set_bankptr(machine, "bank7", c64_memory + 0xd800);
914		memory_set_bankptr(machine, "bank9", c64_memory + 0xdc00);
	915	memory_set_bankptr(machine, "bank5", state->memory + 0xd000);
	916	memory_set_bankptr(machine, "bank7", state->memory + 0xd800);
	917	memory_set_bankptr(machine, "bank9", state->memory + 0xdc00);
915	918	if (!charen && (loram || hiram))
916	919	{
917		memory_set_bankptr(machine, "bank4", c64_chargen);
918		memory_set_bankptr(machine, "bank6", c64_chargen + 0x800);
919		memory_set_bankptr(machine, "bank8", c64_chargen + 0xc00);
	920	memory_set_bankptr(machine, "bank4", state->chargen);
	921	memory_set_bankptr(machine, "bank6", state->chargen + 0x800);
	922	memory_set_bankptr(machine, "bank8", state->chargen + 0xc00);
920	923	}
921	924	else
922	925	{
923		memory_set_bankptr(machine, "bank4", c64_memory + 0xd000);
924		memory_set_bankptr(machine, "bank6", c64_memory + 0xd800);
925		memory_set_bankptr(machine, "bank8", c64_memory + 0xdc00);
	926	memory_set_bankptr(machine, "bank4", state->memory + 0xd000);
	927	memory_set_bankptr(machine, "bank6", state->memory + 0xd800);
	928	memory_set_bankptr(machine, "bank8", state->memory + 0xdc00);
926	929	}
927	930	memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0d000, 0x0d7ff, 0, 0, "bank4");
928	931	memory_install_write_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0d000, 0x0d7ff, 0, 0, "bank5");
929	932	}
930	933
931		if (!c64_game && c64_exrom)
	934	if (!state->game && state->exrom)
932	935	{
933		memory_set_bankptr(machine, "bank10", c64_romh);
	936	memory_set_bankptr(machine, "bank10", state->romh);
934	937	}
935	938	else
936	939	{
937	940	if (hiram)
938	941	{
939		memory_set_bankptr(machine, "bank10", c64_kernal);
	942	memory_set_bankptr(machine, "bank10", state->kernal);
940	943	}
941	944	else
942	945	{
943		memory_set_bankptr(machine, "bank10", c64_memory + 0xe000);
	946	memory_set_bankptr(machine, "bank10", state->memory + 0xe000);
944	947	}
945	948	}
946	949	state->old_data = data;
947	950	}
948	951
949		void c65_colorram_write( int offset, int value )
	952	#ifdef UNUSED_FUNCTION
	953	void c65_colorram_write( running_machine *machine, int offset, int value )
950	954	{
951		c64_colorram[offset & 0x7ff] = value | 0xf0;
	955	c65_state *state = machine->driver_data<c65_state>();
	956	state->colorram[offset & 0x7ff] = value | 0xf0;
952	957	}
	958	#endif
953	959
954	960	/*
955	961	* only 14 address lines
r9686	r9687
959	965	int c65_dma_read( running_machine *machine, int offset )
960	966	{
961	967	c65_state *state = machine->driver_data<c65_state>();
962		if (!c64_game && c64_exrom)
	968	if (!state->game && state->exrom)
963	969	{
964	970	if (offset < 0x3000)
965		return c64_memory[offset];
966		return c64_romh[offset & 0x1fff];
	971	return state->memory[offset];
	972	return state->romh[offset & 0x1fff];
967	973	}
968		if ((c64_vicaddr == c64_memory) || (c64_vicaddr == c64_memory + 0x8000))
	974	if ((state->vicaddr == state->memory) || (state->vicaddr == state->memory + 0x8000))
969	975	{
970	976	if (offset < 0x1000)
971		return c64_vicaddr[offset & 0x3fff];
	977	return state->vicaddr[offset & 0x3fff];
972	978	if (offset < 0x2000) {
973	979	if (state->charset_select)
974	980	return state->chargen[offset & 0xfff];
975	981	else
976		return c64_chargen[offset & 0xfff];
	982	return state->chargen[offset & 0xfff];
977	983	}
978		return c64_vicaddr[offset & 0x3fff];
	984	return state->vicaddr[offset & 0x3fff];
979	985	}
980		return c64_vicaddr[offset & 0x3fff];
	986	return state->vicaddr[offset & 0x3fff];
981	987	}
982	988
983	989	int c65_dma_read_color( running_machine *machine, int offset )
984	990	{
985	991	c65_state *state = machine->driver_data<c65_state>();
986	992	if (state->c64mode)
987		return c64_colorram[offset & 0x3ff] & 0xf;
988		return c64_colorram[offset & 0x7ff];
	993	return state->colorram[offset & 0x3ff] & 0xf;
	994	return state->colorram[offset & 0x7ff];
989	995	}
990	996
991	997	static void c65_common_driver_init( running_machine *machine )
992	998	{
993	999	c65_state *state = machine->driver_data<c65_state>();
994		c64_memory = auto_alloc_array_clear(machine, UINT8, 0x10000);
995		memory_set_bankptr(machine, "bank11", c64_memory + 0x00000);
996		memory_set_bankptr(machine, "bank12", c64_memory + 0x08000);
997		memory_set_bankptr(machine, "bank13", c64_memory + 0x0a000);
998		memory_set_bankptr(machine, "bank14", c64_memory + 0x0c000);
999		memory_set_bankptr(machine, "bank15", c64_memory + 0x0e000);
	1000	state->memory = auto_alloc_array_clear(machine, UINT8, 0x10000);
	1001	memory_set_bankptr(machine, "bank11", state->memory + 0x00000);
	1002	memory_set_bankptr(machine, "bank12", state->memory + 0x08000);
	1003	memory_set_bankptr(machine, "bank13", state->memory + 0x0a000);
	1004	memory_set_bankptr(machine, "bank14", state->memory + 0x0c000);
	1005	memory_set_bankptr(machine, "bank15", state->memory + 0x0e000);
1000	1006
1001	1007	cbm_common_init();
1002	1008	state->keyline = 0xff;
1003	1009
1004		c64_pal = 0;
	1010	state->pal = 0;
1005	1011	state->charset_select = 0;
1006	1012	state->_6511_port = 0xff;
1007	1013	state->vicirq = 0;
1008	1014	state->old_data = -1;
1009	1015
1010	1016	/* C65 had no datasette port */
1011		c64_tape_on = 0;
1012		c64_game = 1;
1013		c64_exrom = 1;
	1017	state->tape_on = 0;
	1018	state->game = 1;
	1019	state->exrom = 1;
1014	1020
1015		/*memset(c64_memory + 0x40000, 0, 0x800000 - 0x40000); */
	1021	/*memset(state->memory + 0x40000, 0, 0x800000 - 0x40000); */
1016	1022	}
1017	1023
1018	1024	DRIVER_INIT( c65 )
r9686	r9687
1027	1033	c65_state *state = machine->driver_data<c65_state>();
1028	1034	state->dma.version = 1;
1029	1035	c65_common_driver_init(machine);
1030		c64_pal = 1;
	1036	state->pal = 1;
1031	1037	}
1032	1038
1033	1039	MACHINE_START( c65 )
r9686	r9687
1038	1044
1039	1045	//removed   cbm_drive_0_config (SERIAL, 10);
1040	1046	//removed   cbm_drive_1_config (SERIAL, 11);
1041		c64_vicaddr = c64_memory;
	1047	state->vicaddr = state->memory;
1042	1048
1043	1049	state->c64mode = 0;
1044	1050

src/mess/machine/c128.c

r9686	r9687
336	336
337	337	cbm_iec_atn_w(serbus, device, !BIT(data, 3));
338	338
339		c64_vicaddr = c64_memory + helper[data & 0x03];
340		c128_vicaddr = c64_memory + helper[data & 0x03] + state->va1617;
	339	state->vicaddr = state->memory + helper[data & 0x03];
	340	state->c128_vicaddr = state->memory + helper[data & 0x03] + state->va1617;
341	341	}
342	342
343	343	static void c128_cia1_interrupt( running_device *device, int level )
r9686	r9687
401	401	if (!state->write_io)
402	402	{
403	403	if (offset + 0xd000 >= state->ram_top)
404		c64_memory[0xd000 + offset] = data;
	404	state->memory[0xd000 + offset] = data;
405	405	else
406	406	state->ram[0xd000 + offset] = data;
407	407	}
r9686	r9687
423	423	break;
424	424	case 8: case 9: case 0xa: case 0xb:
425	425	if (state->c64mode)
426		c64_colorram[(offset & 0x3ff)] = data | 0xf0;
	426	state->colorram[(offset & 0x3ff)] = data | 0xf0;
427	427	else
428		c64_colorram[(offset & 0x3ff)|((c64_port6510&3)<<10)] = data | 0xf0; // maybe all 8 bit connected!
	428	state->colorram[(offset & 0x3ff)|((c64_port6510&3)<<10)] = data | 0xf0; // maybe all 8 bit connected!
429	429	break;
430	430	case 0xc:
431	431	mos6526_w(cia_0, offset, data);
r9686	r9687
447	447
448	448	static READ8_HANDLER( c128_read_io )
449	449	{
	450	c128_state *state = space->machine->driver_data<c128_state>();
450	451	running_device *cia_0 = space->machine->device("cia_0");
451	452	running_device *cia_1 = space->machine->device("cia_1");
452	453	running_device *sid = space->machine->device("sid6581");
r9686	r9687
462	463	else if (offset < 0x800)
463	464	return vdc8563_port_r(vdc8563, offset & 0xff);
464	465	else if (offset < 0xc00)
465		return c64_colorram[offset & 0x3ff];
	466	return state->colorram[offset & 0x3ff];
466	467	else if (offset == 0xc00)
467	468	{
468	469	cia_set_port_mask_value(cia_0, 0, input_port_read(space->machine, "CTRLSEL") & 0x80 ? c64_keyline[8] : c64_keyline[9] );
r9686	r9687
492	493	return;
493	494
494	495	data = m6510_get_port(machine->device<legacy_cpu_device>("m8502")) & 0x07;
495		if ((state->old_data == data) && (state->old_exrom == c64_exrom) && (state->old_game == c64_game) && !reset)
	496	if ((state->old_data == data) && (state->old_exrom == state->exrom) && (state->old_game == state->game) && !reset)
496	497	return;
497	498
498	499	DBG_LOG(machine, 1, "bankswitch", ("%d\n", data & 7));
r9686	r9687
500	501	hiram = (data & 2) ? 1 : 0;
501	502	charen = (data & 4) ? 1 : 0;
502	503
503		if ((!c64_game && c64_exrom) || (loram && hiram && !c64_exrom))
504		memory_set_bankptr(machine, "bank8", c64_roml);
	504	if ((!state->game && state->exrom) || (loram && hiram && !state->exrom))
	505	memory_set_bankptr(machine, "bank8", state->roml);
505	506	else
506		memory_set_bankptr(machine, "bank8", c64_memory + 0x8000);
	507	memory_set_bankptr(machine, "bank8", state->memory + 0x8000);
507	508
508		if ((!c64_game && c64_exrom && hiram) || (!c64_exrom))
509		memory_set_bankptr(machine, "bank9", c64_romh);
	509	if ((!state->game && state->exrom && hiram) || (!state->exrom))
	510	memory_set_bankptr(machine, "bank9", state->romh);
510	511	else if (loram && hiram)
511		memory_set_bankptr(machine, "bank9", c64_basic);
	512	memory_set_bankptr(machine, "bank9", state->basic);
512	513	else
513		memory_set_bankptr(machine, "bank9", c64_memory + 0xa000);
	514	memory_set_bankptr(machine, "bank9", state->memory + 0xa000);
514	515
515		if ((!c64_game && c64_exrom) || (charen && (loram || hiram)))
	516	if ((!state->game && state->exrom) || (charen && (loram || hiram)))
516	517	{
517	518	memory_install_read8_handler(cpu_get_address_space(machine->device("m8502"), ADDRESS_SPACE_PROGRAM), 0xd000, 0xdfff, 0, 0, c128_read_io);
518	519	state->write_io = 1;
r9686	r9687
522	523	memory_install_read_bank(cpu_get_address_space(machine->device("m8502"), ADDRESS_SPACE_PROGRAM), 0xd000, 0xdfff, 0, 0, "bank5");
523	524	state->write_io = 0;
524	525	if ((!charen && (loram || hiram)))
525		memory_set_bankptr(machine, "bank13", c64_chargen);
	526	memory_set_bankptr(machine, "bank13", state->chargen);
526	527	else
527		memory_set_bankptr(machine, "bank13", c64_memory + 0xd000);
	528	memory_set_bankptr(machine, "bank13", state->memory + 0xd000);
528	529	}
529	530
530		if (!c64_game && c64_exrom)
	531	if (!state->game && state->exrom)
531	532	{
532		memory_set_bankptr(machine, "bank14", c64_romh);
533		memory_set_bankptr(machine, "bank15", c64_romh+0x1f00);
534		memory_set_bankptr(machine, "bank16", c64_romh+0x1f05);
	533	memory_set_bankptr(machine, "bank14", state->romh);
	534	memory_set_bankptr(machine, "bank15", state->romh+0x1f00);
	535	memory_set_bankptr(machine, "bank16", state->romh+0x1f05);
535	536	}
536	537	else
537	538	{
538	539	if (hiram)
539	540	{
540		memory_set_bankptr(machine, "bank14", c64_kernal);
541		memory_set_bankptr(machine, "bank15", c64_kernal+0x1f00);
542		memory_set_bankptr(machine, "bank16", c64_kernal+0x1f05);
	541	memory_set_bankptr(machine, "bank14", state->kernal);
	542	memory_set_bankptr(machine, "bank15", state->kernal+0x1f00);
	543	memory_set_bankptr(machine, "bank16", state->kernal+0x1f05);
543	544	}
544	545	else
545	546	{
546		memory_set_bankptr(machine, "bank14", c64_memory + 0xe000);
547		memory_set_bankptr(machine, "bank15", c64_memory + 0xff00);
548		memory_set_bankptr(machine, "bank16", c64_memory + 0xff05);
	547	memory_set_bankptr(machine, "bank14", state->memory + 0xe000);
	548	memory_set_bankptr(machine, "bank15", state->memory + 0xff00);
	549	memory_set_bankptr(machine, "bank16", state->memory + 0xff05);
549	550	}
550	551	}
551	552	state->old_data = data;
552		state->old_exrom = c64_exrom;
553		state->old_game =c64_game;
	553	state->old_exrom = state->exrom;
	554	state->old_game =state->game;
554	555	}
555	556
556	557	/* typical z80 configuration
r9686	r9687
558	559	static void c128_bankswitch_z80( running_machine *machine )
559	560	{
560	561	c128_state *state = machine->driver_data<c128_state>();
561		state->ram = c64_memory + MMU_RAM_ADDR;
	562	state->ram = state->memory + MMU_RAM_ADDR;
562	563	state->va1617 = MMU_VIC_ADDR;
563	564	#if 1
564	565	memory_set_bankptr(machine, "bank10", state->z80);
r9686	r9687
578	579	}
579	580	else
580	581	{
581		memory_set_bankptr(machine, "bank10", (state->ram_bottom > 0 ? c64_memory : state->ram));
582		memory_set_bankptr(machine, "bank11", (state->ram_bottom > 0x400 ? c64_memory : state->ram) + 0x400);
	582	memory_set_bankptr(machine, "bank10", (state->ram_bottom > 0 ? state->memory : state->ram));
	583	memory_set_bankptr(machine, "bank11", (state->ram_bottom > 0x400 ? state->memory : state->ram) + 0x400);
583	584	}
584	585
585		memory_set_bankptr(machine, "bank1", (state->ram_bottom > 0 ? c64_memory : state->ram));
586		memory_set_bankptr(machine, "bank2", (state->ram_bottom > 0x400 ? c64_memory : state->ram) + 0x400);
	586	memory_set_bankptr(machine, "bank1", (state->ram_bottom > 0 ? state->memory : state->ram));
	587	memory_set_bankptr(machine, "bank2", (state->ram_bottom > 0x400 ? state->memory : state->ram) + 0x400);
587	588
588		memory_set_bankptr(machine, "bank3", (state->ram_bottom > 0x1000 ? c64_memory : state->ram) + 0x1000);
589		memory_set_bankptr(machine, "bank4", (state->ram_bottom > 0x2000 ? c64_memory : state->ram) + 0x2000);
	589	memory_set_bankptr(machine, "bank3", (state->ram_bottom > 0x1000 ? state->memory : state->ram) + 0x1000);
	590	memory_set_bankptr(machine, "bank4", (state->ram_bottom > 0x2000 ? state->memory : state->ram) + 0x2000);
590	591	memory_set_bankptr(machine, "bank5", state->ram + 0x4000);
591	592
592	593	if (MMU_TOP)
r9686	r9687
597	598	if (state->ram_top > 0xc000)
598	599	memory_set_bankptr(machine, "bank6", state->ram + 0xc000);
599	600	else
600		memory_set_bankptr(machine, "bank6", c64_memory + 0xc000);
	601	memory_set_bankptr(machine, "bank6", state->memory + 0xc000);
601	602
602	603	if (state->ram_top > 0xe000)
603	604	memory_set_bankptr(machine, "bank7", state->ram + 0xe000);
604	605	else
605		memory_set_bankptr(machine, "bank7", c64_memory + 0xd000);
	606	memory_set_bankptr(machine, "bank7", state->memory + 0xd000);
606	607
607	608	if (state->ram_top > 0xf000)
608	609	memory_set_bankptr(machine, "bank8", state->ram + 0xf000);
609	610	else
610		memory_set_bankptr(machine, "bank8", c64_memory + 0xe000);
	611	memory_set_bankptr(machine, "bank8", state->memory + 0xe000);
611	612
612	613	if (state->ram_top > 0xff05)
613	614	memory_set_bankptr(machine, "bank9", state->ram + 0xff05);
614	615	else
615		memory_set_bankptr(machine, "bank9", c64_memory + 0xff05);
	616	memory_set_bankptr(machine, "bank9", state->memory + 0xff05);
616	617
617	618	if ( (( (input_port_read(machine, "SPECIAL") & 0x06) == 0x02 ) && (MMU_RAM_ADDR >= 0x40000))
618	619	|| (( (input_port_read(machine, "SPECIAL") & 0x06) == 0x00) && (MMU_RAM_ADDR >= 0x20000)) )
r9686	r9687
627	628	if (state->c64mode)
628	629	{
629	630	/* mmu works also in c64 mode, but this can wait */
630		state->ram = c64_memory;
	631	state->ram = state->memory;
631	632	state->va1617 = 0;
632	633	state->ram_bottom = 0;
633	634	state->ram_top = 0x10000;
634	635
635		memory_set_bankptr(machine, "bank1", c64_memory);
636		memory_set_bankptr(machine, "bank2", c64_memory + 0x100);
	636	memory_set_bankptr(machine, "bank1", state->memory);
	637	memory_set_bankptr(machine, "bank2", state->memory + 0x100);
637	638
638		memory_set_bankptr(machine, "bank3", c64_memory + 0x200);
639		memory_set_bankptr(machine, "bank4", c64_memory + 0x400);
640		memory_set_bankptr(machine, "bank5", c64_memory + 0x1000);
641		memory_set_bankptr(machine, "bank6", c64_memory + 0x2000);
	639	memory_set_bankptr(machine, "bank3", state->memory + 0x200);
	640	memory_set_bankptr(machine, "bank4", state->memory + 0x400);
	641	memory_set_bankptr(machine, "bank5", state->memory + 0x1000);
	642	memory_set_bankptr(machine, "bank6", state->memory + 0x2000);
642	643
643		memory_set_bankptr(machine, "bank7", c64_memory + 0x4000);
	644	memory_set_bankptr(machine, "bank7", state->memory + 0x4000);
644	645
645		memory_set_bankptr(machine, "bank12", c64_memory + 0xc000);
	646	memory_set_bankptr(machine, "bank12", state->memory + 0xc000);
646	647
647	648	c128_bankswitch_64(machine, reset);
648	649	}
649	650	else
650	651	{
651		state->ram = c64_memory + MMU_RAM_ADDR;
	652	state->ram = state->memory + MMU_RAM_ADDR;
652	653	state->va1617 = MMU_VIC_ADDR;
653		memory_set_bankptr(machine, "bank1", c64_memory + state->mmu_page0);
654		memory_set_bankptr(machine, "bank2", c64_memory + state->mmu_page1);
	654	memory_set_bankptr(machine, "bank1", state->memory + state->mmu_page0);
	655	memory_set_bankptr(machine, "bank2", state->memory + state->mmu_page1);
655	656	if (MMU_BOTTOM)
656	657	{
657	658	state->ram_bottom = MMU_SIZE;
658	659	}
659	660	else
660	661	state->ram_bottom = 0;
661		memory_set_bankptr(machine, "bank3", (state->ram_bottom > 0x200 ? c64_memory : state->ram) + 0x200);
662		memory_set_bankptr(machine, "bank4", (state->ram_bottom > 0x400 ? c64_memory : state->ram) + 0x400);
663		memory_set_bankptr(machine, "bank5", (state->ram_bottom > 0x1000 ? c64_memory : state->ram) + 0x1000);
664		memory_set_bankptr(machine, "bank6", (state->ram_bottom > 0x2000 ? c64_memory : state->ram) + 0x2000);
	662	memory_set_bankptr(machine, "bank3", (state->ram_bottom > 0x200 ? state->memory : state->ram) + 0x200);
	663	memory_set_bankptr(machine, "bank4", (state->ram_bottom > 0x400 ? state->memory : state->ram) + 0x400);
	664	memory_set_bankptr(machine, "bank5", (state->ram_bottom > 0x1000 ? state->memory : state->ram) + 0x1000);
	665	memory_set_bankptr(machine, "bank6", (state->ram_bottom > 0x2000 ? state->memory : state->ram) + 0x2000);
665	666
666	667	if (MMU_RAM_LO)
667	668	{
r9686	r9687
669	670	}
670	671	else
671	672	{
672		memory_set_bankptr(machine, "bank7", state->basic);
	673	memory_set_bankptr(machine, "bank7", state->c128_basic);
673	674	}
674	675
675	676	if (MMU_RAM_MID)
r9686	r9687
679	680	}
680	681	else if (MMU_ROM_MID)
681	682	{
682		memory_set_bankptr(machine, "bank8", state->basic + 0x4000);
683		memory_set_bankptr(machine, "bank9", state->basic + 0x6000);
	683	memory_set_bankptr(machine, "bank8", state->c128_basic + 0x4000);
	684	memory_set_bankptr(machine, "bank9", state->c128_basic + 0x6000);
684	685	}
685	686	else if (MMU_INTERNAL_ROM_MID)
686	687	{
r9686	r9687
722	723	}
723	724	else
724	725	{
725		memory_set_bankptr(machine, "bank12", c64_memory + 0xc000);
	726	memory_set_bankptr(machine, "bank12", state->memory + 0xc000);
726	727	}
727	728	if (!MMU_IO_ON)
728	729	{
r9686	r9687
732	733	}
733	734	else
734	735	{
735		memory_set_bankptr(machine, "bank13", c64_memory + 0xd000);
	736	memory_set_bankptr(machine, "bank13", state->memory + 0xd000);
736	737	}
737	738	}
738	739	if (state->ram_top > 0xe000)
r9686	r9687
741	742	}
742	743	else
743	744	{
744		memory_set_bankptr(machine, "bank14", c64_memory + 0xe000);
	745	memory_set_bankptr(machine, "bank14", state->memory + 0xe000);
745	746	}
746	747	if (state->ram_top > 0xff05)
747	748	{
r9686	r9687
749	750	}
750	751	else
751	752	{
752		memory_set_bankptr(machine, "bank16", c64_memory + 0xff05);
	753	memory_set_bankptr(machine, "bank16", state->memory + 0xff05);
753	754	}
754	755	}
755	756	else if (MMU_ROM_HI)
756	757	{
757	758	memory_set_bankptr(machine, "bank12", state->editor);
758	759	if (!MMU_IO_ON) {
759		memory_set_bankptr(machine, "bank13", state->chargen);
	760	memory_set_bankptr(machine, "bank13", state->c128_chargen);
760	761	}
761		memory_set_bankptr(machine, "bank14", state->kernal);
762		memory_set_bankptr(machine, "bank16", state->kernal + 0x1f05);
	762	memory_set_bankptr(machine, "bank14", state->c128_kernal);
	763	memory_set_bankptr(machine, "bank16", state->c128_kernal + 0x1f05);
763	764	}
764	765	else if (MMU_INTERNAL_ROM_HI)
765	766	{
r9686	r9687
903	904	data = state->mmu[offset] | 6;
904	905	if ( /*disk enable signal */ 0)
905	906	data &= ~8;
906		if (!c64_game)
	907	if (!state->game)
907	908	data &= ~0x10;
908		if (!c64_exrom)
	909	if (!state->exrom)
909	910	data &= ~0x20;
910	911	if (input_port_read(space->machine, "SPECIAL") & 0x10)
911	912	data &= ~0x80;
r9686	r9687
1006	1007	{
1007	1008	c128_state *state = space->machine->driver_data<c128_state>();
1008	1009	if (offset + 0xe000 >= state->ram_top)
1009		c64_memory[0xe000 + offset] = data;
	1010	state->memory[0xe000 + offset] = data;
1010	1011	else if (state->ram != NULL)
1011	1012	state->ram[0xe000 + offset] = data;
1012	1013	}
r9686	r9687
1017	1018	if (!state->c64mode)
1018	1019	c128_mmu8722_ff00_w(space, offset, data);
1019	1020	else if (state->ram!=NULL)
1020		c64_memory[0xff00 + offset] = data;
	1021	state->memory[0xff00 + offset] = data;
1021	1022	}
1022	1023
1023	1024	WRITE8_HANDLER( c128_write_ff05 )
1024	1025	{
1025	1026	c128_state *state = space->machine->driver_data<c128_state>();
1026	1027	if (offset + 0xff05 >= state->ram_top)
1027		c64_memory[0xff05 + offset] = data;
	1028	state->memory[0xff05 + offset] = data;
1028	1029	else if (state->ram!=NULL)
1029	1030	state->ram[0xff05 + offset] = data;
1030	1031	}
r9686	r9687
1042	1043	/* main memory configuration to include */
1043	1044	if (state->c64mode)
1044	1045	{
1045		if (!c64_game && c64_exrom)
	1046	if (!state->game && state->exrom)
1046	1047	{
1047	1048	if (offset < 0x3000)
1048		return c64_memory[offset];
1049		return c64_romh[offset & 0x1fff];
	1049	return state->memory[offset];
	1050	return state->romh[offset & 0x1fff];
1050	1051	}
1051		if (((c64_vicaddr - c64_memory + offset) & 0x7000) == 0x1000)
1052		return c64_chargen[offset & 0xfff];
1053		return c64_vicaddr[offset];
	1052	if (((state->vicaddr - state->memory + offset) & 0x7000) == 0x1000)
	1053	return state->chargen[offset & 0xfff];
	1054	return state->vicaddr[offset];
1054	1055	}
1055		if (!(c64_port6510 & 4) && (((c128_vicaddr - c64_memory + offset) & 0x7000) == 0x1000))
1056		return state->chargen[offset & 0xfff];
1057		return c128_vicaddr[offset];
	1056	if (!(c64_port6510 & 4) && (((state->c128_vicaddr - state->memory + offset) & 0x7000) == 0x1000))
	1057	return state->c128_chargen[offset & 0xfff];
	1058	return state->c128_vicaddr[offset];
1058	1059	}
1059	1060
1060	1061	int c128_dma_read_color(running_machine *machine, int offset)
r9686	r9687
1063	1064	UINT8 c64_port6510 = m6510_get_port(machine->device<legacy_cpu_device>("m8502"));
1064	1065
1065	1066	if (state->c64mode)
1066		return c64_colorram[offset & 0x3ff] & 0xf;
	1067	return state->colorram[offset & 0x3ff] & 0xf;
1067	1068	else
1068		return c64_colorram[(offset & 0x3ff)|((c64_port6510 & 0x3) << 10)] & 0xf;
	1069	return state->colorram[(offset & 0x3ff)|((c64_port6510 & 0x3) << 10)] & 0xf;
1069	1070	}
1070	1071
1071	1072	/* 2008-09-01
r9686	r9687
1093	1094
1094	1095	state->c64_port_data = data;
1095	1096
1096		if (c64_tape_on)
	1097	if (state->tape_on)
1097	1098	{
1098	1099	if (direction & 0x08)
1099	1100	{
r9686	r9687
1117	1118
1118	1119	c128_bankswitch_64(device->machine, 0);
1119	1120
1120		c64_memory[0x000] = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->read_byte(0);
1121		c64_memory[0x001] = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->read_byte(1);
	1121	state->memory[0x000] = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->read_byte(0);
	1122	state->memory[0x001] = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->read_byte(1);
1122	1123
1123	1124	}
1124	1125
r9686	r9687
1147	1148	UINT8 *ram = memory_region(machine, "maincpu");
1148	1149	int i;
1149	1150
1150		c64_memory = ram;
	1151	state->memory = ram;
1151	1152
1152		state->basic = ram + 0x100000;
1153		c64_basic = ram + 0x108000;
1154		c64_kernal = ram + 0x10a000;
	1153	state->c128_basic = ram + 0x100000;
	1154	state->basic = ram + 0x108000;
	1155	state->kernal = ram + 0x10a000;
1155	1156	state->editor = ram + 0x10c000;
1156	1157	state->z80 = ram + 0x10d000;
1157		state->kernal = ram + 0x10e000;
	1158	state->c128_kernal = ram + 0x10e000;
1158	1159	state->internal_function = ram + 0x110000;
1159	1160	state->external_function = ram + 0x118000;
1160		c64_chargen = ram + 0x120000;
1161		state->chargen = ram + 0x121000;
1162		c64_colorram = ram + 0x122000;
	1161	state->chargen = ram + 0x120000;
	1162	state->c128_chargen = ram + 0x121000;
	1163	state->colorram = ram + 0x122000;
1163	1164	state->vdcram = ram + 0x122800;
1164	1165
1165		c64_tape_on = 1;
1166		c64_game = 1;
1167		c64_exrom = 1;
1168		c64_pal = 0;
	1166	state->tape_on = 1;
	1167	state->game = 1;
	1168	state->exrom = 1;
	1169	state->pal = 0;
1169	1170	state->c64mode = 0;
1170		state->cia1_on = 1;
1171	1171	state->vicirq = 0;
1172	1172
1173	1173	state->monitor = -1;
r9686	r9687
1179	1179	for (i = 0; i < 0x100; i++)
1180	1180	gfx[i] = i;
1181	1181
1182		if (c64_tape_on)
	1182	if (state->tape_on)
1183	1183	state->datasette_timer = timer_alloc(machine, c64_tape_timer, NULL);
1184	1184	}
1185	1185
r9686	r9687
1196	1196
1197	1197	DRIVER_INIT( c128pal )
1198	1198	{
	1199	c128_state *state = machine->driver_data<c128_state>();
1199	1200	running_device *vic2e = machine->device("vic2e");
1200	1201	running_device *vdc8563 = machine->device("vdc8563");
1201	1202
1202	1203	c128_common_driver_init(machine);
1203		c64_pal = 1;
	1204	state->pal = 1;
1204	1205
1205	1206	vic2_set_rastering(vic2e, 1);
1206	1207	vdc8563_set_rastering(vdc8563, 0);
r9686	r9687
1243	1244	MACHINE_RESET( c128 )
1244	1245	{
1245	1246	c128_state *state = machine->driver_data<c128_state>();
1246		c128_vicaddr = c64_vicaddr = c64_memory;
	1247	state->c128_vicaddr = state->vicaddr = state->memory;
1247	1248	state->c64mode = 0;
1248	1249	c128_mmu8722_reset(machine);
1249	1250	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
r9686	r9687
1273	1274	{
1274	1275	vic2_set_rastering(vic2e, 1);
1275	1276	vdc8563_set_rastering(vdc8563, 0);
1276		if (c64_pal)
	1277	if (state->pal)
1277	1278	device->machine->primary_screen->set_visible_area(0, VIC6569_VISIBLECOLUMNS - 1, 0, VIC6569_VISIBLELINES - 1);
1278	1279	else
1279	1280	device->machine->primary_screen->set_visible_area(0, VIC6567_VISIBLECOLUMNS - 1, 0, VIC6567_VISIBLELINES - 1);

src/mess/machine/c64.c

r9686	r9687
42	42	#define log_cart 0
43	43
44	44	/* expansion port lines input */
45		int c64_pal;
46		UINT8 c64_game, c64_exrom;
47	45
48	46	/* cpu port */
49		UINT8 *c64_vicaddr, *c128_vicaddr;
50		UINT8 *c64_memory;
51		UINT8 *c64_colorram;
52		UINT8 *c64_basic;
53		UINT8 *c64_kernal;
54		UINT8 *c64_chargen;
55		UINT8 *c64_roml = 0;
56		UINT8 *c64_romh = 0;
57		static UINT8 *c64_io_mirror = NULL;
58	47
59		static UINT8 c64_port_data;
60	48
61		static UINT8 *roml = 0, *romh = 0;
62		static int ultimax;
63		int c64_tape_on;
64		static int c64_cia1_on;
65		static int c64_io_enabled;
66		static int is_sx64;            // temporary workaround until we implement full vc1541 emulation for every c64 set
67	49
68		static UINT8 vicirq;
69		static int old_level;
70		static int old_data, old_exrom, old_game;
71
72	50	static void c64_nmi( running_machine *machine )
73	51	{
74	52	static int nmilevel = 0;
r9686	r9687
122	100
123	101	static void c64_irq( running_machine *machine, int level )
124	102	{
125		if (level != old_level)
	103	c64_state *state = machine->driver_data<c64_state>();
	104	if (level != state->old_level)
126	105	{
127	106	DBG_LOG(machine, 3, "mos6510", ("irq %s\n", level ? "start" : "end"));
128	107	cputag_set_input_line(machine, "maincpu", M6510_IRQ_LINE, level);
129		old_level = level;
	108	state->old_level = level;
130	109	}
131	110	}
132	111
133	112	static void c64_cia0_interrupt( running_device *device, int level )
134	113	{
135		c64_irq (device->machine, level || vicirq);
	114	c64_state *state = device->machine->driver_data<c64_state>();
	115	c64_irq (device->machine, level || state->vicirq);
136	116	}
137	117
138	118	void c64_vic_interrupt( running_machine *machine, int level )
139	119	{
	120	c64_state *state = machine->driver_data<c64_state>();
140	121	running_device *cia_0 = machine->device("cia_0");
141	122	#if 1
142		if (level != vicirq)
	123	if (level != state->vicirq)
143	124	{
144	125	c64_irq(machine, level || mos6526_irq_r(cia_0));
145		vicirq = level;
	126	state->vicirq = level;
146	127	}
147	128	#endif
148	129	}
r9686	r9687
213	194
214	195	static WRITE8_DEVICE_HANDLER( c64_cia1_port_a_w )
215	196	{
	197	c64_state *state = device->machine->driver_data<c64_state>();
216	198	static const int helper[4] = {0xc000, 0x8000, 0x4000, 0x0000};
217	199	running_device *serbus = device->machine->device("iec");
218	200
219	201	cbm_iec_clk_w(serbus, device, !(data & 0x10));
220	202	cbm_iec_data_w(serbus, device, !(data & 0x20));
221	203	cbm_iec_atn_w(serbus, device, !(data & 0x08));
222		c64_vicaddr = c64_memory + helper[data & 0x03];
	204	state->vicaddr = state->memory + helper[data & 0x03];
223	205	}
224	206
225	207	static void c64_cia1_interrupt( running_device *device, int level )
r9686	r9687
259	241
260	242	***********************************************/
261	243
262		static UINT8 *c64_io_ram_w_ptr;
263		static UINT8 *c64_io_ram_r_ptr;
264	244
265	245	WRITE8_HANDLER( c64_write_io )
266	246	{
	247	c64_state *state = space->machine->driver_data<c64_state>();
267	248	running_device *cia_0 = space->machine->device("cia_0");
268	249	running_device *cia_1 = space->machine->device("cia_1");
269	250	running_device *sid = space->machine->device("sid6581");
270	251	running_device *vic2 = space->machine->device("vic2");
271	252
272		c64_io_mirror[offset] = data;
	253	state->io_mirror[offset] = data;
273	254	if (offset < 0x400)
274	255	vic2_port_w(vic2, offset & 0x3ff, data);
275	256	else if (offset < 0x800)
276	257	sid6581_w(sid, offset & 0x3ff, data);
277	258	else if (offset < 0xc00)
278		c64_colorram[offset & 0x3ff] = data | 0xf0;
	259	state->colorram[offset & 0x3ff] = data | 0xf0;
279	260	else if (offset < 0xd00)
280	261	mos6526_w(cia_0, offset, data);
281	262	else if (offset < 0xe00)
282	263	{
283		if (c64_cia1_on)
	264	if (state->cia1_on)
284	265	mos6526_w(cia_1, offset, data);
285	266	else
286	267	DBG_LOG(space->machine, 1, "io write", ("%.3x %.2x\n", offset, data));
r9686	r9687
293	274
294	275	WRITE8_HANDLER( c64_ioarea_w )
295	276	{
296		if (c64_io_enabled)
	277	c64_state *state = space->machine->driver_data<c64_state>();
	278	if (state->io_enabled)
297	279	c64_write_io(space, offset, data);
298	280	else
299		c64_io_ram_w_ptr[offset] = data;
	281	state->io_ram_w_ptr[offset] = data;
300	282	}
301	283
302	284	READ8_HANDLER( c64_read_io )
303	285	{
	286	c64_state *state = space->machine->driver_data<c64_state>();
304	287	running_device *cia_0 = space->machine->device("cia_0");
305	288	running_device *cia_1 = space->machine->device("cia_1");
306	289	running_device *sid = space->machine->device("sid6581");
r9686	r9687
313	296	return sid6581_r(sid, offset & 0x3ff);
314	297
315	298	else if (offset < 0xc00)
316		return c64_colorram[offset & 0x3ff];
	299	return state->colorram[offset & 0x3ff];
317	300
318	301	else if (offset < 0xd00)
319	302	{
r9686	r9687
325	308	return mos6526_r(cia_0, offset);
326	309	}
327	310
328		else if (c64_cia1_on && (offset < 0xe00))
	311	else if (state->cia1_on && (offset < 0xe00))
329	312	return mos6526_r(cia_1, offset);
330	313
331	314	DBG_LOG(space->machine, 1, "io read", ("%.3x\n", offset));
r9686	r9687
335	318
336	319	READ8_HANDLER( c64_ioarea_r )
337	320	{
338		return c64_io_enabled ? c64_read_io(space, offset) : c64_io_ram_r_ptr[offset];
	321	c64_state *state = space->machine->driver_data<c64_state>();
	322	return state->io_enabled ? c64_read_io(space, offset) : state->io_ram_r_ptr[offset];
339	323	}
340	324
341	325
r9686	r9687
454	438
455	439	static void c64_bankswitch( running_machine *machine, int reset )
456	440	{
	441	c64_state *state = machine->driver_data<c64_state>();
457	442	int loram, hiram, charen;
458	443	int ultimax_mode = 0;
459	444	int data = m6510_get_port(machine->device<legacy_cpu_device>("maincpu")) & 0x07;
460	445
461	446	/* If nothing has changed or reset = 0, don't do anything */
462		if ((old_data == data) && (old_exrom == c64_exrom) && (old_game == c64_game) && !reset)
	447	if ((state->old_data == data) && (state->old_exrom == state->exrom) && (state->old_game == state->game) && !reset)
463	448	return;
464	449
465	450	/* Are we in Ultimax mode? */
466		if (!c64_game && c64_exrom)
	451	if (!state->game && state->exrom)
467	452	ultimax_mode = 1;
468	453
469	454	DBG_LOG(machine, 1, "bankswitch", ("%d\n", data & 7));
470	455	loram  = (data & 1) ? 1 : 0;
471	456	hiram  = (data & 2) ? 1 : 0;
472	457	charen = (data & 4) ? 1 : 0;
473		logerror("Bankswitch mode || charen, ultimax\n");
474		logerror("%d, %d, %d, %d  ||   %d,      %d  \n", loram, hiram, c64_game, c64_exrom, charen, ultimax_mode);
	458	logerror("Bankswitch mode || charen, state->ultimax\n");
	459	logerror("%d, %d, %d, %d  ||   %d,      %d  \n", loram, hiram, state->game, state->exrom, charen, ultimax_mode);
475	460
476	461	if (ultimax_mode)
477	462	{
478		c64_io_enabled = 1;      // charen has no effect in ultimax_mode
	463	state->io_enabled = 1;      // charen has no effect in ultimax_mode
479	464
480		memory_set_bankptr(machine, "bank1", roml);
481		memory_set_bankptr(machine, "bank2", c64_memory + 0x8000);
482		memory_set_bankptr(machine, "bank3", c64_memory + 0xa000);
483		memory_set_bankptr(machine, "bank4", romh);
	465	memory_set_bankptr(machine, "bank1", state->roml);
	466	memory_set_bankptr(machine, "bank2", state->memory + 0x8000);
	467	memory_set_bankptr(machine, "bank3", state->memory + 0xa000);
	468	memory_set_bankptr(machine, "bank4", state->romh);
484	469	memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0);
485	470	}
486	471	else
487	472	{
488	473	/* 0x8000-0x9000 */
489		if (loram && hiram && !c64_exrom)
	474	if (loram && hiram && !state->exrom)
490	475	{
491		memory_set_bankptr(machine, "bank1", roml);
492		memory_set_bankptr(machine, "bank2", c64_memory + 0x8000);
	476	memory_set_bankptr(machine, "bank1", state->roml);
	477	memory_set_bankptr(machine, "bank2", state->memory + 0x8000);
493	478	}
494	479	else
495	480	{
496		memory_set_bankptr(machine, "bank1", c64_memory + 0x8000);
497		memory_set_bankptr(machine, "bank2", c64_memory + 0x8000);
	481	memory_set_bankptr(machine, "bank1", state->memory + 0x8000);
	482	memory_set_bankptr(machine, "bank2", state->memory + 0x8000);
498	483	}
499	484
500	485	/* 0xa000 */
501		if (hiram && !c64_game && !c64_exrom)
502		memory_set_bankptr(machine, "bank3", romh);
	486	if (hiram && !state->game && !state->exrom)
	487	memory_set_bankptr(machine, "bank3", state->romh);
503	488
504		else if (loram && hiram && c64_game)
505		memory_set_bankptr(machine, "bank3", c64_basic);
	489	else if (loram && hiram && state->game)
	490	memory_set_bankptr(machine, "bank3", state->basic);
506	491
507	492	else
508		memory_set_bankptr(machine, "bank3", c64_memory + 0xa000);
	493	memory_set_bankptr(machine, "bank3", state->memory + 0xa000);
509	494
510	495	/* 0xd000 */
511	496	// RAM
512		if (!loram && !hiram && (c64_game || !c64_exrom))
	497	if (!loram && !hiram && (state->game || !state->exrom))
513	498	{
514		c64_io_enabled = 0;
515		c64_io_ram_r_ptr = c64_memory + 0xd000;
516		c64_io_ram_w_ptr = c64_memory + 0xd000;
	499	state->io_enabled = 0;
	500	state->io_ram_r_ptr = state->memory + 0xd000;
	501	state->io_ram_w_ptr = state->memory + 0xd000;
517	502	}
518	503	// IO/RAM
519		else if (loram && !hiram && !c64_game)   // remember we cannot be in ultimax_mode, no need of !c64_exrom
	504	else if (loram && !hiram && !state->game)   // remember we cannot be in ultimax_mode, no need of !state->exrom
520	505	{
521		c64_io_enabled = 1;
522		c64_io_ram_r_ptr = (!charen) ? c64_chargen : c64_memory + 0xd000;
523		c64_io_ram_w_ptr = c64_memory + 0xd000;
	506	state->io_enabled = 1;
	507	state->io_ram_r_ptr = (!charen) ? state->chargen : state->memory + 0xd000;
	508	state->io_ram_w_ptr = state->memory + 0xd000;
524	509	}
525	510	// IO/C
526	511	else
527	512	{
528		c64_io_enabled = charen ? 1 : 0;
	513	state->io_enabled = charen ? 1 : 0;
529	514
530	515	if (!charen)
531	516	{
532		c64_io_ram_r_ptr = c64_chargen;
533		c64_io_ram_w_ptr = c64_memory + 0xd000;
	517	state->io_ram_r_ptr = state->chargen;
	518	state->io_ram_w_ptr = state->memory + 0xd000;
534	519	}
535	520	}
536	521
537	522	/* 0xe000-0xf000 */
538		memory_set_bankptr(machine, "bank4", hiram ? c64_kernal : c64_memory + 0xe000);
539		memory_set_bankptr(machine, "bank5", c64_memory + 0xe000);
	523	memory_set_bankptr(machine, "bank4", hiram ? state->kernal : state->memory + 0xe000);
	524	memory_set_bankptr(machine, "bank5", state->memory + 0xe000);
540	525	}
541	526
542	527	/* make sure the opbase function gets called each time */
543	528	/* NPW 15-May-2008 - Another hack in the C64 drivers broken! */
544	529	/* opbase->mem_max = 0xcfff; */
545	530
546		old_game = c64_game;
547		old_exrom = c64_exrom;
548		old_data = data;
	531	state->old_game = state->game;
	532	state->old_exrom = state->exrom;
	533	state->old_data = data;
549	534	}
550	535
551	536	/**
r9686	r9687
561	546	p6,7 not available on M6510
562	547	*/
563	548
564		static emu_timer *datasette_timer;
565
566	549	void c64_m6510_port_write( running_device *device, UINT8 direction, UINT8 data )
567	550	{
	551	c64_state *state = device->machine->driver_data<c64_state>();
	552
568	553	/* if line is marked as input then keep current value */
569		data = (c64_port_data & ~direction) | (data & direction);
	554	data = (state->port_data & ~direction) | (data & direction);
570	555
571	556	/* resistors make P0,P1,P2 go high when respective line is changed to input */
572	557	if (!(direction & 0x04))
r9686	r9687
578	563	if (!(direction & 0x01))
579	564	data |= 0x01;
580	565
581		c64_port_data = data;
	566	state->port_data = data;
582	567
583		if (c64_tape_on)
	568	if (state->tape_on)
584	569	{
585	570	if (direction & 0x08)
586	571	{
r9686	r9687
592	577	if(!(data & 0x20))
593	578	{
594	579	cassette_change_state(device->machine->device("cassette"), CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);
595		timer_adjust_periodic(datasette_timer, attotime_zero, 0, ATTOTIME_IN_HZ(44100));
	580	timer_adjust_periodic(state->datasette_timer, attotime_zero, 0, ATTOTIME_IN_HZ(44100));
596	581	}
597	582	else
598	583	{
599	584	cassette_change_state(device->machine->device("cassette"), CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
600		timer_reset(datasette_timer, attotime_never);
	585	timer_reset(state->datasette_timer, attotime_never);
601	586	}
602	587	}
603	588	}
604	589
605		if (!ultimax)
	590	if (!state->ultimax)
606	591	c64_bankswitch(device->machine, 0);
607	592
608		c64_memory[0x000] = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->read_byte(0);
609		c64_memory[0x001] = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->read_byte(1);
	593	state->memory[0x000] = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->read_byte(0);
	594	state->memory[0x001] = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->read_byte(1);
610	595
611	596	}
612	597
613	598	UINT8 c64_m6510_port_read( running_device *device, UINT8 direction )
614	599	{
615		UINT8 data = c64_port_data;
	600	c64_state *state = device->machine->driver_data<c64_state>();
	601	UINT8 data = state->port_data;
616	602
617		if (c64_tape_on)
	603	if (state->tape_on)
618	604	{
619	605	if ((cassette_get_state(device->machine->device("cassette")) & CASSETTE_MASK_UISTATE) != CASSETTE_STOPPED)
620	606	data &= ~0x10;
r9686	r9687
742	728
743	729	READ8_HANDLER( c64_colorram_read )
744	730	{
745		return c64_colorram[offset & 0x3ff];
	731	c64_state *state = space->machine->driver_data<c64_state>();
	732	return state->colorram[offset & 0x3ff];
746	733	}
747	734
748	735	WRITE8_HANDLER( c64_colorram_write )
749	736	{
750		c64_colorram[offset & 0x3ff] = data | 0xf0;
	737	c64_state *state = space->machine->driver_data<c64_state>();
	738	state->colorram[offset & 0x3ff] = data | 0xf0;
751	739	}
752	740
753	741	TIMER_CALLBACK( c64_tape_timer )
r9686	r9687
760	748
761	749	static void c64_common_driver_init( running_machine *machine )
762	750	{
	751	c64_state *state = machine->driver_data<c64_state>();
763	752	cbm_common_init();
764		c64_game = 1;
765		c64_exrom = 1;
766		old_data = -1;
	753	state->game = 1;
	754	state->exrom = 1;
	755	state->old_data = -1;
767	756
768		if (!ultimax)
	757	if (!state->ultimax)
769	758	{
770	759	UINT8 *mem = memory_region(machine, "maincpu");
771		c64_basic    = mem + 0x10000;
772		c64_kernal   = mem + 0x12000;
773		c64_chargen  = mem + 0x14000;
774		c64_colorram = mem + 0x15000;
775		c64_roml     = mem + 0x15400;
776		c64_romh     = mem + 0x17400;
	760	state->basic    = mem + 0x10000;
	761	state->kernal   = mem + 0x12000;
	762	state->chargen  = mem + 0x14000;
	763	state->colorram = mem + 0x15000;
	764	state->c64_roml     = mem + 0x15400;
	765	state->c64_romh     = mem + 0x17400;
777	766	}
778	767
779		if (c64_tape_on)
780		datasette_timer = timer_alloc(machine, c64_tape_timer, NULL);
	768	if (state->tape_on)
	769	state->datasette_timer = timer_alloc(machine, c64_tape_timer, NULL);
781	770
782	771	// "cyberload" tape loader check the e000-ffff ram; the init ram need to return different value
783	772	{
784	773	int i;
785	774	for (i = 0; i < 0x2000; i += 0x40)
786		memset(c64_memory + (0xe000 + i), ((i & 0x40) >> 6) * 0xff, 0x40);
	775	memset(state->memory + (0xe000 + i), ((i & 0x40) >> 6) * 0xff, 0x40);
787	776	}
788	777	}
789	778
790	779	DRIVER_INIT( c64 )
791	780	{
792		ultimax = 0;
793		is_sx64 = 0;
794		c64_pal = 0;
795		c64_cia1_on = 1;
796		c64_tape_on = 1;
	781	c64_state *state = machine->driver_data<c64_state>();
	782	state->ultimax = 0;
	783	state->is_sx64 = 0;
	784	state->pal = 0;
	785	state->cia1_on = 1;
	786	state->tape_on = 1;
797	787	c64_common_driver_init(machine);
798	788	}
799	789
800	790	DRIVER_INIT( c64pal )
801	791	{
802		ultimax = 0;
803		is_sx64 = 0;
804		c64_pal = 1;
805		c64_cia1_on = 1;
806		c64_tape_on = 1;
	792	c64_state *state = machine->driver_data<c64_state>();
	793	state->ultimax = 0;
	794	state->is_sx64 = 0;
	795	state->pal = 1;
	796	state->cia1_on = 1;
	797	state->tape_on = 1;
807	798	c64_common_driver_init(machine);
808	799	}
809	800
810	801	DRIVER_INIT( ultimax )
811	802	{
812		ultimax = 1;
813		is_sx64 = 0;
814		c64_pal = 0;
815		c64_cia1_on = 0;
816		c64_tape_on = 1;
	803	c64_state *state = machine->driver_data<c64_state>();
	804	state->ultimax = 1;
	805	state->is_sx64 = 0;
	806	state->pal = 0;
	807	state->cia1_on = 0;
	808	state->tape_on = 1;
817	809	c64_common_driver_init(machine);
818	810	}
819	811
820	812	DRIVER_INIT( c64gs )
821	813	{
822		ultimax = 0;
823		is_sx64 = 0;
824		c64_pal = 1;
825		c64_cia1_on = 1;
826		c64_tape_on = 0;
	814	c64_state *state = machine->driver_data<c64_state>();
	815	state->ultimax = 0;
	816	state->is_sx64 = 0;
	817	state->pal = 1;
	818	state->cia1_on = 1;
	819	state->tape_on = 0;
827	820	c64_common_driver_init(machine);
828	821	}
829	822
830	823	DRIVER_INIT( sx64 )
831	824	{
832		ultimax = 0;
833		is_sx64 = 1;
834		c64_pal = 1;
835		c64_cia1_on = 1;
836		c64_tape_on = 0;
	825	c64_state *state = machine->driver_data<c64_state>();
	826	state->ultimax = 0;
	827	state->is_sx64 = 1;
	828	state->pal = 1;
	829	state->cia1_on = 1;
	830	state->tape_on = 0;
837	831	c64_common_driver_init(machine);
838	832	}
839	833
840	834	MACHINE_START( c64 )
841	835	{
842		c64_port_data = 0x17;
	836	c64_state *state = machine->driver_data<c64_state>();
	837	state->port_data = 0x17;
843	838
844		c64_io_mirror = auto_alloc_array(machine, UINT8, 0x1000);
845		c64_io_enabled = 0;
	839	state->io_mirror = auto_alloc_array(machine, UINT8, 0x1000);
	840	state->io_enabled = 0;
846	841
847		c64_vicaddr = c64_memory;
848		vicirq = 0;
	842	state->vicaddr = state->memory;
	843	state->vicirq = 0;
849	844
850		if (!ultimax)
	845	if (!state->ultimax)
851	846	c64_bankswitch(machine, 1);
852	847	}
853	848
r9686	r9687
994	989	*****************************************/
995	990	};
996	991
997		#define C64_MAX_ROMBANK 64 // .crt files contain multiple 'CHIPs', i.e. rom banks (of variable size) with headers. Known carts have at most 64 'CHIPs'.
998
999		typedef struct {
1000		int addr, size, index, start;
1001		} C64_ROM;
1002
1003		typedef struct _c64_cart_t c64_cart_t;
1004		struct _c64_cart_t {
1005		C64_ROM     bank[C64_MAX_ROMBANK];
1006		INT8        game;
1007		INT8        exrom;
1008		UINT8       mapper;
1009		UINT8       n_banks;
1010		};
1011
1012		static c64_cart_t c64_cart;
1013
1014	992	static DEVICE_IMAGE_UNLOAD( c64_cart )
1015	993	{
	994	c64_state *state = image.device().machine->driver_data<c64_state>();
1016	995	int i;
1017	996
1018	997	for (i = 0; i < C64_MAX_ROMBANK; i++)
1019	998	{
1020		c64_cart.bank[i].size = 0;
1021		c64_cart.bank[i].addr = 0;
1022		c64_cart.bank[i].index = 0;
1023		c64_cart.bank[i].start = 0;
	999	state->cart.bank[i].size = 0;
	1000	state->cart.bank[i].addr = 0;
	1001	state->cart.bank[i].index = 0;
	1002	state->cart.bank[i].start = 0;
1024	1003	}
1025	1004	}
1026	1005
1027	1006
1028	1007	static DEVICE_START( c64_cart )
1029	1008	{
	1009	c64_state *state = device->machine->driver_data<c64_state>();
1030	1010	/* In the first slot we can load a .crt file. In this case we want
1031	1011	to use game & exrom values from the header, not the default ones. */
1032		c64_cart.game = -1;
1033		c64_cart.exrom = -1;
1034		c64_cart.mapper = GENERIC_CRT;
1035		c64_cart.n_banks = 0;
	1012	state->cart.game = -1;
	1013	state->cart.exrom = -1;
	1014	state->cart.mapper = GENERIC_CRT;
	1015	state->cart.n_banks = 0;
1036	1016	}
1037	1017
1038	1018	static int c64_crt_load( device_image_interface &image )
1039	1019	{
	1020	c64_state *state = image.device().machine->driver_data<c64_state>();
1040	1021	int size = image.length(), test, i = 0, ii;
1041	1022	int _80_loaded = 0, _90_loaded = 0, a0_loaded = 0, b0_loaded = 0, e0_loaded = 0, f0_loaded = 0;
1042	1023	const char *filetype = image.filetype();
r9686	r9687
1057	1038	/* 0x16-0x17 is Hardware type */
1058	1039	image.fseek(0x16, SEEK_SET);
1059	1040	image.fread(&c64_cart_type, 2);
1060		c64_cart.mapper = BIG_ENDIANIZE_INT16(c64_cart_type);
	1041	state->cart.mapper = BIG_ENDIANIZE_INT16(c64_cart_type);
1061	1042
1062	1043	/* If it is unsupported cart type, warn the user */
1063		switch (c64_cart.mapper)
	1044	switch (state->cart.mapper)
1064	1045	{
1065	1046	case SIMONS_BASIC:   /* Type #  4 */
1066	1047	case OCEAN_1:      /* Type #  5 */
r9686	r9687
1074	1055	case DOMARK:      /* Type # 19 */
1075	1056	case COMAL_80:      /* Type # 21 */
1076	1057	case GENERIC_CRT:      /* Type #  0 */
1077		printf("Currently supported cart type (Type %d)\n", c64_cart.mapper);
	1058	printf("Currently supported cart type (Type %d)\n", state->cart.mapper);
1078	1059	break;
1079	1060
1080	1061	default:
r9686	r9687
1087	1068	case FINAL_CART_I:   /* Type # 13 */
1088	1069	case MAGIC_FORMEL:   /* Type # 14 */
1089	1070	case SUPER_SNAP_5:   /* Type # 20 */
1090		printf("Currently unsupported cart type (Type %d)\n", c64_cart.mapper);
	1071	printf("Currently unsupported cart type (Type %d)\n", state->cart.mapper);
1091	1072	break;
1092	1073	}
1093	1074
1094	1075	/* 0x18 is EXROM */
1095	1076	image.fseek(0x18, SEEK_SET);
1096		image.fread(&c64_cart.exrom, 1);
	1077	image.fread(&state->cart.exrom, 1);
1097	1078
1098	1079	/* 0x19 is GAME */
1099		image.fread(&c64_cart.game, 1);
	1080	image.fread(&state->cart.game, 1);
1100	1081
1101	1082	/* We can pass to the data: it starts from 0x40 */
1102	1083	image.fseek(0x40, SEEK_SET);
1103	1084	j = 0x40;
1104	1085
1105	1086	logerror("Loading cart %s size:%.4x\n", image.filename(), size);
1106		logerror("Header info: EXROM %d, GAME %d, Cart Type %d \n", c64_cart.exrom, c64_cart.game, c64_cart_type);
	1087	logerror("Header info: EXROM %d, GAME %d, Cart Type %d \n", state->cart.exrom, state->cart.game, c64_cart_type);
1107	1088
1108	1089
1109	1090	/* Data in a .crt image are organized in blocks called 'CHIP':
r9686	r9687
1146	1127	logerror("Loading CHIP data at %.4x size:%.4x\n", address, chip_data_size);
1147	1128
1148	1129	/* Store data, address & size of the CHIP block */
1149		c64_cart.bank[i].addr = address;
1150		c64_cart.bank[i].index = chip_bank_index;
1151		c64_cart.bank[i].size = chip_data_size;
1152		c64_cart.bank[i].start = new_start;
	1130	state->cart.bank[i].addr = address;
	1131	state->cart.bank[i].index = chip_bank_index;
	1132	state->cart.bank[i].size = chip_data_size;
	1133	state->cart.bank[i].start = new_start;
1153	1134
1154		test = image.fread(cart_cpy + new_start, c64_cart.bank[i].size);
1155		new_start += c64_cart.bank[i].size;
	1135	test = image.fread(cart_cpy + new_start, state->cart.bank[i].size);
	1136	new_start += state->cart.bank[i].size;
1156	1137
1157	1138	/* Does CHIP contain any data? */
1158		if (test != c64_cart.bank[i].size)
	1139	if (test != state->cart.bank[i].size)
1159	1140	return IMAGE_INIT_FAIL;
1160	1141
1161	1142	/* Advance to the next CHIP block */
r9686	r9687
1178	1159	logerror("loading %s rom at %.4x size:%.4x\n", image.filename(), address, size);
1179	1160
1180	1161	/* Store data, address & size */
1181		c64_cart.bank[0].addr = address;
1182		c64_cart.bank[0].size = size;
1183		c64_cart.bank[0].start = new_start;
	1162	state->cart.bank[0].addr = address;
	1163	state->cart.bank[0].size = size;
	1164	state->cart.bank[0].start = new_start;
1184	1165
1185		test = image.fread(cart_cpy + new_start, c64_cart.bank[0].size);
1186		new_start += c64_cart.bank[0].size;
	1166	test = image.fread(cart_cpy + new_start, state->cart.bank[0].size);
	1167	new_start += state->cart.bank[0].size;
1187	1168
1188	1169	/* Does cart contain any data? */
1189		if (test != c64_cart.bank[0].size)
	1170	if (test != state->cart.bank[0].size)
1190	1171	return IMAGE_INIT_FAIL;
1191	1172	}
1192	1173
1193		c64_cart.n_banks = i; // this is also needed so that we only set mappers if a cart is present!
	1174	state->cart.n_banks = i; // this is also needed so that we only set mappers if a cart is present!
1194	1175
1195	1176	/* If we load a .crt file, use EXROM & GAME from the header! */
1196		if ((c64_cart.exrom != -1) && (c64_cart.game != -1))
	1177	if ((state->cart.exrom != -1) && (state->cart.game != -1))
1197	1178	{
1198		c64_exrom = c64_cart.exrom;
1199		c64_game  = c64_cart.game;
	1179	state->exrom = state->cart.exrom;
	1180	state->game  = state->cart.game;
1200	1181	}
1201	1182
1202	1183	/* Finally load the cart */
1203		roml = c64_roml;
1204		romh = c64_romh;
	1184	state->roml = state->c64_roml;
	1185	state->romh = state->c64_romh;
1205	1186
1206		memset(roml, 0, 0x2000);
1207		memset(romh, 0, 0x2000);
	1187	memset(state->roml, 0, 0x2000);
	1188	memset(state->romh, 0, 0x2000);
1208	1189
1209		switch (c64_cart.mapper)
	1190	switch (state->cart.mapper)
1210	1191	{
1211	1192	default:
1212		if (!c64_game && c64_exrom && (c64_cart.n_banks == 1))
	1193	if (!state->game && state->exrom && (state->cart.n_banks == 1))
1213	1194	{
1214		memcpy(romh, cart_cpy, 0x2000);
	1195	memcpy(state->romh, cart_cpy, 0x2000);
1215	1196	}
1216	1197	else
1217	1198	{
1218	1199	// we first attempt to load the first 'CHIPs' with address 0x8000-0xb000 and 0xe000-0xf000, otherwise we load the first (or first two) 'CHIPs' of the image
1219		for (ii = 0; ii < c64_cart.n_banks; ii++)
	1200	for (ii = 0; ii < state->cart.n_banks; ii++)
1220	1201	{
1221		if (c64_cart.bank[ii].addr == 0x8000 && !_80_loaded)
	1202	if (state->cart.bank[ii].addr == 0x8000 && !_80_loaded)
1222	1203	{
1223		memcpy(roml, cart_cpy + c64_cart.bank[ii].start, c64_cart.bank[ii].size);
	1204	memcpy(state->roml, cart_cpy + state->cart.bank[ii].start, state->cart.bank[ii].size);
1224	1205	_80_loaded = 1;
1225		if (c64_cart.bank[ii].size > 0x1000)
	1206	if (state->cart.bank[ii].size > 0x1000)
1226	1207	_90_loaded = 1;
1227		if (c64_cart.bank[ii].size > 0x2000)
	1208	if (state->cart.bank[ii].size > 0x2000)
1228	1209	a0_loaded = 1;
1229		if (c64_cart.bank[ii].size > 0x3000)
	1210	if (state->cart.bank[ii].size > 0x3000)
1230	1211	b0_loaded = 1;
1231	1212	//                  printf("addr 0x8000: 80 %d, 90 %d, a0 %d, b0 %d\n", _80_loaded, _90_loaded, a0_loaded, b0_loaded);
1232	1213	}
1233	1214
1234		if (c64_cart.bank[ii].addr == 0x9000 && !_90_loaded)
	1215	if (state->cart.bank[ii].addr == 0x9000 && !_90_loaded)
1235	1216	{
1236		memcpy(roml + 0x1000, cart_cpy + c64_cart.bank[ii].start, c64_cart.bank[ii].size);
	1217	memcpy(state->roml + 0x1000, cart_cpy + state->cart.bank[ii].start, state->cart.bank[ii].size);
1237	1218	_90_loaded = 1;
1238		if (c64_cart.bank[ii].size > 0x1000)
	1219	if (state->cart.bank[ii].size > 0x1000)
1239	1220	a0_loaded = 1;
1240		if (c64_cart.bank[ii].size > 0x2000)
	1221	if (state->cart.bank[ii].size > 0x2000)
1241	1222	b0_loaded = 1;
1242	1223	//                  printf("addr 0x9000: 80 %d, 90 %d, a0 %d, b0 %d\n", _80_loaded, _90_loaded, a0_loaded, b0_loaded);
1243	1224	}
1244	1225
1245		if (c64_cart.bank[ii].addr == 0xa000 && !a0_loaded)
	1226	if (state->cart.bank[ii].addr == 0xa000 && !a0_loaded)
1246	1227	{
1247		memcpy(roml + 0x2000, cart_cpy + c64_cart.bank[ii].start, c64_cart.bank[ii].size);
	1228	memcpy(state->roml + 0x2000, cart_cpy + state->cart.bank[ii].start, state->cart.bank[ii].size);
1248	1229	a0_loaded = 1;
1249		if (c64_cart.bank[ii].size > 0x1000)
	1230	if (state->cart.bank[ii].size > 0x1000)
1250	1231	b0_loaded = 1;
1251	1232	//                  printf("addr 0xa000: 80 %d, 90 %d, a0 %d, b0 %d\n", _80_loaded, _90_loaded, a0_loaded, b0_loaded);
1252	1233	}
1253	1234
1254		if (c64_cart.bank[ii].addr == 0xb000 && !b0_loaded)
	1235	if (state->cart.bank[ii].addr == 0xb000 && !b0_loaded)
1255	1236	{
1256		memcpy(roml + 0x3000, cart_cpy + c64_cart.bank[ii].start, c64_cart.bank[ii].size);
	1237	memcpy(state->roml + 0x3000, cart_cpy + state->cart.bank[ii].start, state->cart.bank[ii].size);
1257	1238	b0_loaded = 1;
1258	1239	//                  printf("addr 0xb000: 80 %d, 90 %d, a0 %d, b0 %d\n", _80_loaded, _90_loaded, a0_loaded, b0_loaded);
1259	1240	}
1260	1241
1261		if (c64_cart.bank[ii].addr == 0xe000 && !e0_loaded)
	1242	if (state->cart.bank[ii].addr == 0xe000 && !e0_loaded)
1262	1243	{
1263		memcpy(romh, cart_cpy + c64_cart.bank[ii].start, c64_cart.bank[ii].size);
	1244	memcpy(state->romh, cart_cpy + state->cart.bank[ii].start, state->cart.bank[ii].size);
1264	1245	e0_loaded = 1;
1265		if (c64_cart.bank[ii].size > 0x1000)
	1246	if (state->cart.bank[ii].size > 0x1000)
1266	1247	f0_loaded = 1;
1267	1248	//                  printf("addr 0xe000: e0 %d, f0 %d\n", e0_loaded, f0_loaded);
1268	1249	}
1269	1250
1270		if (c64_cart.bank[ii].addr == 0xf000 && !f0_loaded)
	1251	if (state->cart.bank[ii].addr == 0xf000 && !f0_loaded)
1271	1252	{
1272		memcpy(romh + 0x1000, cart_cpy + c64_cart.bank[ii].start, c64_cart.bank[ii].size);
	1253	memcpy(state->romh + 0x1000, cart_cpy + state->cart.bank[ii].start, state->cart.bank[ii].size);
1273	1254	f0_loaded = 1;
1274	1255	//                  printf("addr 0xe000: e0 %d, f0 %d\n", e0_loaded, f0_loaded);
1275	1256	}
r9686	r9687
1287	1268
1288	1269	static DEVICE_IMAGE_LOAD( max_cart )
1289	1270	{
	1271	c64_state *state = image.device().machine->driver_data<c64_state>();
1290	1272	int result = IMAGE_INIT_PASS;
1291	1273
1292	1274	if (image.software_entry() != NULL)
r9686	r9687
1294	1276	UINT32 size;
1295	1277
1296	1278	// setup Ultimax mode
1297		c64_exrom = 1;
1298		c64_game  = 0;
	1279	state->exrom = 1;
	1280	state->game  = 0;
1299	1281
1300		roml = c64_roml;
1301		romh = c64_romh;
	1282	state->roml = state->c64_roml;
	1283	state->romh = state->c64_romh;
1302	1284
1303		memset(roml, 0, 0x2000);
1304		memset(romh, 0, 0x2000);
	1285	memset(state->roml, 0, 0x2000);
	1286	memset(state->romh, 0, 0x2000);
1305	1287
1306	1288	// is there anything to load at 0x8000?
1307	1289	size = image.get_software_region_length("roml");
1308	1290	if (size)
1309		memcpy(roml, image.get_software_region("roml"), size);
	1291	memcpy(state->roml, image.get_software_region("roml"), size);
1310	1292
1311	1293	// is there anything to load at 0xe000?
1312	1294	size = image.get_software_region_length("romh");
1313	1295	if (size)
1314		memcpy(romh, image.get_software_region("romh"), size);
	1296	memcpy(state->romh, image.get_software_region("romh"), size);
1315	1297	}
1316	1298	else
1317	1299	result = c64_crt_load(image);
r9686	r9687
1322	1304
1323	1305	static WRITE8_HANDLER( fc3_bank_w )
1324	1306	{
	1307	c64_state *state = space->machine->driver_data<c64_state>();
1325	1308	// Type # 3
1326	1309	// working:
1327	1310	// not working:
r9686	r9687
1335	1318	logerror("Warning: This cart type should have at most 4 banks and the cart looked for bank %d... Something strange is going on!\n", bank);
1336	1319	else
1337	1320	{
1338		memcpy(roml, cart + bank * 0x4000, 0x2000);
1339		memcpy(romh, cart + bank * 0x4000 + 0x2000, 0x2000);
	1321	memcpy(state->roml, cart + bank * 0x4000, 0x2000);
	1322	memcpy(state->romh, cart + bank * 0x4000 + 0x2000, 0x2000);
1340	1323	/*
1341	1324	if (log_cart)
1342	1325	{
1343		logerror("bank %d of size %d successfully loaded at %d!\n", bank, c64_cart.bank[bank].size, c64_cart.bank[bank].addr);
1344		if (c64_cart.bank[bank].index != bank)
1345		logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", c64_cart.bank[bank].index, bank);
	1326	logerror("bank %d of size %d successfully loaded at %d!\n", bank, state->cart.bank[bank].size, state->cart.bank[bank].addr);
	1327	if (state->cart.bank[bank].index != bank)
	1328	logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", state->cart.bank[bank].index, bank);
1346	1329	}
1347	1330	*/
1348	1331	}
r9686	r9687
1351	1334
1352	1335	static WRITE8_HANDLER( ocean1_bank_w )
1353	1336	{
	1337	c64_state *state = space->machine->driver_data<c64_state>();
1354	1338	// Type # 5
1355	1339	// working: Double Dragon, Ghostbusters, Terminator 2
1356	1340	// not working: Pang, Robocop 2, Toki
r9686	r9687
1358	1342	UINT8 bank = data & 0x3f;
1359	1343	UINT8 *cart = memory_region(space->machine, "user1");
1360	1344
1361		switch (c64_cart.bank[bank].addr)
	1345	switch (state->cart.bank[bank].addr)
1362	1346	{
1363	1347	case 0x8000:
1364		memcpy(roml, cart + bank * 0x2000, c64_cart.bank[bank].size);
	1348	memcpy(state->roml, cart + bank * 0x2000, state->cart.bank[bank].size);
1365	1349	break;
1366	1350	case 0xa000:
1367		memcpy(roml + 0x2000, cart + bank * 0x2000, c64_cart.bank[bank].size);
	1351	memcpy(state->roml + 0x2000, cart + bank * 0x2000, state->cart.bank[bank].size);
1368	1352	break;
1369	1353	case 0xe000:
1370		memcpy(romh, cart + bank * 0x2000, c64_cart.bank[bank].size);
	1354	memcpy(state->romh, cart + bank * 0x2000, state->cart.bank[bank].size);
1371	1355	break;
1372	1356	default:
1373		logerror("Unexpected loading address (%x) for bank %x\n", c64_cart.bank[bank].addr, bank);
	1357	logerror("Unexpected loading address (%x) for bank %x\n", state->cart.bank[bank].addr, bank);
1374	1358	break;
1375	1359	}
1376	1360	/*
1377	1361	if (log_cart)
1378	1362	{
1379		logerror("bank %d of size %d successfully loaded at %d!\n", bank, c64_cart.bank[bank].size, c64_cart.bank[bank].addr);
1380		if (c64_cart.bank[bank].index != bank)
1381		logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", c64_cart.bank[bank].index, bank);
	1363	logerror("bank %d of size %d successfully loaded at %d!\n", bank, state->cart.bank[bank].size, state->cart.bank[bank].addr);
	1364	if (state->cart.bank[bank].index != bank)
	1365	logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", state->cart.bank[bank].index, bank);
1382	1366	}
1383	1367	*/
1384	1368	}
1385	1369
1386	1370	static WRITE8_HANDLER( funplay_bank_w )
1387	1371	{
	1372	c64_state *state = space->machine->driver_data<c64_state>();
1388	1373	// Type # 7
1389	1374	// working:
1390	1375	// not working:
r9686	r9687
1397	1382	logerror("Reserved value written\n");
1398	1383	else
1399	1384	{
1400		/* bank number is not the value written, but c64_cart.bank[bank].index IS the value written! */
	1385	/* bank number is not the value written, but state->cart.bank[bank].index IS the value written! */
1401	1386	real_bank = ((bank & 0x01) << 3) + ((bank & 0x38) >> 3);
1402	1387
1403		memcpy(roml, cart + real_bank * 0x2000, 0x2000);
	1388	memcpy(state->roml, cart + real_bank * 0x2000, 0x2000);
1404	1389	/*
1405	1390	if (log_cart)
1406	1391	{
1407		logerror("bank %d of size %d successfully loaded at %d!\n", bank, c64_cart.bank[bank].size, c64_cart.bank[bank].addr);
1408		if (c64_cart.bank[bank].index != bank)
1409		logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", c64_cart.bank[bank].index, bank);
	1392	logerror("bank %d of size %d successfully loaded at %d!\n", bank, state->cart.bank[bank].size, state->cart.bank[bank].addr);
	1393	if (state->cart.bank[bank].index != bank)
	1394	logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", state->cart.bank[bank].index, bank);
1410	1395	}
1411	1396	*/
1412	1397	}
r9686	r9687
1414	1399
1415	1400	static WRITE8_HANDLER( supergames_bank_w )
1416	1401	{
	1402	c64_state *state = space->machine->driver_data<c64_state>();
1417	1403	// Type # 8
1418	1404	// working:
1419	1405	// not working:
r9686	r9687
1423	1409
1424	1410	if (data & 0x04)
1425	1411	{
1426		c64_game = 0;
1427		c64_exrom = 0;
	1412	state->game = 0;
	1413	state->exrom = 0;
1428	1414	}
1429	1415	else
1430	1416	{
1431		c64_game = 0;
1432		c64_exrom = 0;
	1417	state->game = 0;
	1418	state->exrom = 0;
1433	1419	}
1434	1420
1435	1421	if (data == 0xc)
1436	1422	{
1437		c64_game = 1;
1438		c64_exrom = 1;
	1423	state->game = 1;
	1424	state->exrom = 1;
1439	1425	}
1440	1426
1441	1427	if (bit2)
1442	1428	{
1443		memcpy(roml, cart + bank * 0x4000, 0x2000);
1444		memcpy(romh, cart + bank * 0x4000 + 0x2000, 0x2000);
	1429	memcpy(state->roml, cart + bank * 0x4000, 0x2000);
	1430	memcpy(state->romh, cart + bank * 0x4000 + 0x2000, 0x2000);
1445	1431	}
1446	1432	else
1447	1433	{
1448		memcpy(roml, cart + bank * 0x4000, 0x2000);
1449		memcpy(romh, cart + bank * 0x4000 + 0x2000, 0x2000);
	1434	memcpy(state->roml, cart + bank * 0x4000, 0x2000);
	1435	memcpy(state->romh, cart + bank * 0x4000 + 0x2000, 0x2000);
1450	1436	}
1451	1437	}
1452	1438
1453	1439	static WRITE8_HANDLER( c64gs_bank_w )
1454	1440	{
	1441	c64_state *state = space->machine->driver_data<c64_state>();
1455	1442	// Type # 15
1456	1443	// working:
1457	1444	// not working: The Last Ninja Remix
r9686	r9687
1462	1449	if (bank > 0x3f)
1463	1450	logerror("Warning: This cart type should have at most 64 banks and the cart looked for bank %d... Something strange is going on!\n", bank);
1464	1451
1465		memcpy(roml, cart + bank * 0x2000, 0x2000);
	1452	memcpy(state->roml, cart + bank * 0x2000, 0x2000);
1466	1453	/*
1467	1454	if (log_cart)
1468	1455	{
1469		logerror("bank %d of size %d successfully loaded at %d!\n", bank, c64_cart.bank[bank].size, c64_cart.bank[bank].addr);
1470		if (c64_cart.bank[bank].index != bank)
1471		logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", c64_cart.bank[bank].index, bank);
	1456	logerror("bank %d of size %d successfully loaded at %d!\n", bank, state->cart.bank[bank].size, state->cart.bank[bank].addr);
	1457	if (state->cart.bank[bank].index != bank)
	1458	logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", state->cart.bank[bank].index, bank);
1472	1459	}
1473	1460	*/
1474	1461	}
1475	1462
1476	1463	static READ8_HANDLER( dinamic_bank_r )
1477	1464	{
	1465	c64_state *state = space->machine->driver_data<c64_state>();
1478	1466	// Type # 17
1479	1467	// working: Satan
1480	1468	// not working:
r9686	r9687
1485	1473	if (bank > 0xf)
1486	1474	logerror("Warning: This cart type should have 16 banks and the cart looked for bank %d... Something strange is going on!\n", bank);
1487	1475
1488		memcpy(roml, cart + bank * 0x2000, 0x2000);
	1476	memcpy(state->roml, cart + bank * 0x2000, 0x2000);
1489	1477	/*
1490	1478	if (log_cart)
1491	1479	{
1492		logerror("bank %d of size %d successfully loaded at %d!\n", bank, c64_cart.bank[bank].size, c64_cart.bank[bank].addr);
1493		if (c64_cart.bank[bank].index != bank)
1494		logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", c64_cart.bank[bank].index, bank);
	1480	logerror("bank %d of size %d successfully loaded at %d!\n", bank, state->cart.bank[bank].size, state->cart.bank[bank].addr);
	1481	if (state->cart.bank[bank].index != bank)
	1482	logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", state->cart.bank[bank].index, bank);
1495	1483	}
1496	1484	*/
1497	1485	return 0;
r9686	r9687
1499	1487
1500	1488	static READ8_HANDLER( zaxxon_bank_r )
1501	1489	{
	1490	c64_state *state = space->machine->driver_data<c64_state>();
1502	1491	// Type # 18
1503	1492	// working:
1504	1493	// not working:
r9686	r9687
1511	1500	else
1512	1501	bank = 1;
1513	1502
1514		// c64_game = 0;
1515		// c64_exrom = 0;
	1503	// state->game = 0;
	1504	// state->exrom = 0;
1516	1505
1517		memcpy(romh, cart + bank * 0x2000 + 0x1000, 0x2000);
	1506	memcpy(state->romh, cart + bank * 0x2000 + 0x1000, 0x2000);
1518	1507
1519	1508	return cart[offset & 0x0fff];
1520	1509	}
1521	1510
1522	1511	static WRITE8_HANDLER( domark_bank_w )
1523	1512	{
	1513	c64_state *state = space->machine->driver_data<c64_state>();
1524	1514	// Type # 19
1525	1515	// working:
1526	1516	// not working:
r9686	r9687
1530	1520
1531	1521	if (data & 0x80)
1532	1522	{
1533		c64_game = 1;
1534		c64_exrom = 1;
	1523	state->game = 1;
	1524	state->exrom = 1;
1535	1525	}
1536	1526	else
1537	1527	{
1538		c64_game = 1;
1539		c64_exrom = 0;
1540		memcpy(roml, cart + bank * 0x2000, 0x2000);
	1528	state->game = 1;
	1529	state->exrom = 0;
	1530	memcpy(state->roml, cart + bank * 0x2000, 0x2000);
1541	1531	}
1542	1532	}
1543	1533
1544	1534	static WRITE8_HANDLER( comal80_bank_w )
1545	1535	{
	1536	c64_state *state = space->machine->driver_data<c64_state>();
1546	1537	// Type # 21
1547	1538	// working: Comal 80
1548	1539	// not working:
r9686	r9687
1557	1548	{
1558	1549	bank &= 0x03;
1559	1550
1560		memcpy(roml, cart + bank * 0x4000, 0x4000);
	1551	memcpy(state->roml, cart + bank * 0x4000, 0x4000);
1561	1552	/*
1562	1553	if (log_cart)
1563	1554	{
1564		logerror("bank %d of size %d successfully loaded at %d!\n", bank, c64_cart.bank[bank].size, c64_cart.bank[bank].addr);
1565		if (c64_cart.bank[bank].index != bank)
1566		logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", c64_cart.bank[bank].index, bank);
	1555	logerror("bank %d of size %d successfully loaded at %d!\n", bank, state->cart.bank[bank].size, state->cart.bank[bank].addr);
	1556	if (state->cart.bank[bank].index != bank)
	1557	logerror("Warning: According to the CHIP info this should be bank %d, but we are loading it as bank %d!\n", state->cart.bank[bank].index, bank);
1567	1558	}
1568	1559	*/
1569	1560	}
r9686	r9687
1571	1562
1572	1563	static void setup_c64_custom_mappers(running_machine *machine)
1573	1564	{
	1565	c64_state *state = machine->driver_data<c64_state>();
1574	1566	address_space *space = cputag_get_address_space( machine, "maincpu", ADDRESS_SPACE_PROGRAM );
1575	1567
1576		switch (c64_cart.mapper)
	1568	switch (state->cart.mapper)
1577	1569	{
1578	1570	case ACTION_REPLAY:   /* Type #  1 not working */
1579	1571	break;
r9686	r9687
1633	1625
1634	1626	MACHINE_RESET( c64 )
1635	1627	{
1636		if (c64_cart.n_banks)
	1628	c64_state *state = machine->driver_data<c64_state>();
	1629	if (state->cart.n_banks)
1637	1630	setup_c64_custom_mappers(machine);
1638	1631	}
1639	1632

src/mess/video/vic4567.c

r9686	r9687
1556	1556	if (M)                                                      \
1557	1557	{                                                           \
1558	1558	if (M & 0x01)                                           \
1559		colors[0] = vic3->c64_mem_r(VIC3_ADDR(0) + offset);        \
	1559	colors[0] = vic3->c64_mem_r(device->machine, VIC3_ADDR(0) + offset);        \
1560	1560	if (M & 0x02)                                           \
1561		colors[1] = vic3->c64_mem_r(VIC3_ADDR(1) + offset) << 1;     \
	1561	colors[1] = vic3->c64_mem_r(device->machine, VIC3_ADDR(1) + offset) << 1;     \
1562	1562	if (M & 0x04)                                           \
1563		colors[2] = vic3->c64_mem_r(VIC3_ADDR(2) + offset) << 2;     \
	1563	colors[2] = vic3->c64_mem_r(device->machine, VIC3_ADDR(2) + offset) << 2;     \
1564	1564	if (M & 0x08)                                           \
1565		colors[3] = vic3->c64_mem_r(VIC3_ADDR(3) + offset) << 3;     \
	1565	colors[3] = vic3->c64_mem_r(device->machine, VIC3_ADDR(3) + offset) << 3;     \
1566	1566	if (M & 0x10)                                           \
1567		colors[4] = vic3->c64_mem_r(VIC3_ADDR(4) + offset) << 4;     \
	1567	colors[4] = vic3->c64_mem_r(device->machine, VIC3_ADDR(4) + offset) << 4;     \
1568	1568	if (M & 0x20)                                           \
1569		colors[5] = vic3->c64_mem_r(VIC3_ADDR(5) + offset) << 5;     \
	1569	colors[5] = vic3->c64_mem_r(device->machine, VIC3_ADDR(5) + offset) << 5;     \
1570	1570	if (M & 0x40)                                           \
1571		colors[6] = vic3->c64_mem_r(VIC3_ADDR(6) + offset) << 6;     \
	1571	colors[6] = vic3->c64_mem_r(device->machine, VIC3_ADDR(6) + offset) << 6;     \
1572	1572	if (M & 0x80)                                           \
1573		colors[7] = vic3->c64_mem_r(VIC3_ADDR(7) + offset) << 7;     \
	1573	colors[7] = vic3->c64_mem_r(device->machine, VIC3_ADDR(7) + offset) << 7;     \
1574	1574	for (i = 7; i >= 0; i--)                                \
1575	1575	{                                                       \
1576	1576	p = 0;                                              \
r9686	r9687
1647	1647	break;
1648	1648	default:
1649	1649	if (VIC3_BITPLANES_MASK & 0x01)
1650		colors[0] = vic3->c64_mem_r(VIC3_BITPLANE_IADDR(0) + offset);
	1650	colors[0] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_IADDR(0) + offset);
1651	1651
1652	1652	if (VIC3_BITPLANES_MASK & 0x02)
1653		colors[1] = vic3->c64_mem_r(VIC3_BITPLANE_IADDR(1) + offset) << 1;
	1653	colors[1] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_IADDR(1) + offset) << 1;
1654	1654
1655	1655	if (VIC3_BITPLANES_MASK & 0x04)
1656		colors[2] = vic3->c64_mem_r(VIC3_BITPLANE_IADDR(2) + offset) << 2;
	1656	colors[2] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_IADDR(2) + offset) << 2;
1657	1657
1658	1658	if (VIC3_BITPLANES_MASK & 0x08)
1659		colors[3] = vic3->c64_mem_r(VIC3_BITPLANE_IADDR(3) + offset) << 3;
	1659	colors[3] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_IADDR(3) + offset) << 3;
1660	1660
1661	1661	if (VIC3_BITPLANES_MASK & 0x10)
1662		colors[4] = vic3->c64_mem_r(VIC3_BITPLANE_IADDR(4) + offset) << 4;
	1662	colors[4] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_IADDR(4) + offset) << 4;
1663	1663
1664	1664	if (VIC3_BITPLANES_MASK & 0x20)
1665		colors[5] = vic3->c64_mem_r(VIC3_BITPLANE_IADDR(5) + offset) << 5;
	1665	colors[5] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_IADDR(5) + offset) << 5;
1666	1666
1667	1667	if (VIC3_BITPLANES_MASK & 0x40)
1668		colors[6] = vic3->c64_mem_r(VIC3_BITPLANE_IADDR(6) + offset) << 6;
	1668	colors[6] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_IADDR(6) + offset) << 6;
1669	1669
1670	1670	if (VIC3_BITPLANES_MASK & 0x80)
1671		colors[7] = vic3->c64_mem_r(VIC3_BITPLANE_IADDR(7) + offset) << 7;
	1671	colors[7] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_IADDR(7) + offset) << 7;
1672	1672
1673	1673	for (i = 7; i >= 0; i--)
1674	1674	{
r9686	r9687
1719	1719	break;
1720	1720	default:
1721	1721	if (VIC3_BITPLANES_MASK & 0x01)
1722		colors[0] = vic3->c64_mem_r(VIC3_BITPLANE_ADDR(0) + offset);
	1722	colors[0] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_ADDR(0) + offset);
1723	1723
1724	1724	if (VIC3_BITPLANES_MASK & 0x02)
1725		colors[1] = vic3->c64_mem_r(VIC3_BITPLANE_ADDR(1) + offset) << 1;
	1725	colors[1] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_ADDR(1) + offset) << 1;
1726	1726
1727	1727	if (VIC3_BITPLANES_MASK & 0x04)
1728		colors[2] = vic3->c64_mem_r(VIC3_BITPLANE_ADDR(2) + offset) << 2;
	1728	colors[2] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_ADDR(2) + offset) << 2;
1729	1729
1730	1730	if (VIC3_BITPLANES_MASK & 0x08)
1731		colors[3] = vic3->c64_mem_r(VIC3_BITPLANE_ADDR(3) + offset) << 3;
	1731	colors[3] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_ADDR(3) + offset) << 3;
1732	1732
1733	1733	if (VIC3_BITPLANES_MASK & 0x10)
1734		colors[4] = vic3->c64_mem_r(VIC3_BITPLANE_ADDR(4) + offset) << 4;
	1734	colors[4] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_ADDR(4) + offset) << 4;
1735	1735
1736	1736	if (VIC3_BITPLANES_MASK & 0x20)
1737		colors[5] = vic3->c64_mem_r(VIC3_BITPLANE_ADDR(5) + offset) << 5;
	1737	colors[5] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_ADDR(5) + offset) << 5;
1738	1738
1739	1739	if (VIC3_BITPLANES_MASK & 0x40)
1740		colors[6] = vic3->c64_mem_r(VIC3_BITPLANE_ADDR(6) + offset) << 6;
	1740	colors[6] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_ADDR(6) + offset) << 6;
1741	1741
1742	1742	if (VIC3_BITPLANES_MASK & 0x80)
1743		colors[7] = vic3->c64_mem_r(VIC3_BITPLANE_ADDR(7) + offset) << 7;
	1743	colors[7] = vic3->c64_mem_r(device->machine, VIC3_BITPLANE_ADDR(7) + offset) << 7;
1744	1744
1745	1745	for (i = 7; i >= 0; i--)
1746	1746	{

src/mess/video/vic4567.h

r9686	r9687
24	24
25	25	typedef void (*vic3_port_changed_callback) (running_machine *, int);
26	26
27		typedef UINT8 (*vic3_c64mem_callback)(int offset);
	27	typedef UINT8 (*vic3_c64mem_callback)(running_machine *machine, int offset);
28	28
29	29	typedef enum
30	30	{

src/mess/video/vic6567.c

r9686	r9687
74	74	#include "emu.h"
75	75	#include "video/vic6567.h"
76	76
77		static UINT8 rdy_cycles = 0;
78
79	77	typedef struct _vic2_state  vic2_state;
80	78	struct _vic2_state
81	79	{
r9686	r9687
84	82	screen_device *screen;         // screen which sets bitmap properties
85	83	running_device *cpu;
86	84
	85	UINT8 rdy_cycles;
87	86	UINT8 reg[0x80];
88	87
89	88	int on;                        /* rastering of the screen */
r9686	r9687
999	998	vic2_state *vic2 = (vic2_state *)ptr;
1000	999	int i;
1001	1000	UINT8 mask;
1002		static int adjust[9] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
	1001	//static int adjust[9] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
1003	1002
1004	1003	UINT8 cpu_cycles = machine->device<cpu_device>("maincpu")->total_cycles() & 0xff;
1005	1004	UINT8 vic_cycles = (vic2->cycles_counter + 1) & 0xff;
1006	1005	vic2->cycles_counter++;
1007	1006
1008		//  printf("%02x %02x %02x\n",cpu_cycles,vic_cycles,rdy_cycles);
1009		/*
	1007	//  printf("%02x %02x %02x\n",cpu_cycles,vic_cycles,vic2->rdy_cycles);
	1008	#if 0
1010	1009	if (input_code_pressed(machine, KEYCODE_X))
1011	1010	{
1012	1011	if (input_code_pressed_once(machine, KEYCODE_Q)) adjust[1]++;
r9686	r9687
1030	1029	if (input_code_pressed_once(machine, KEYCODE_Z)) printf("b:%02x 1:%02x 2:%02x 3:%02x 4:%02x 5:%02x 6:%02x 7:%02x 8:%02x\n",
1031	1030	adjust[0],adjust[1],adjust[2],adjust[3],adjust[4],adjust[5],adjust[6],adjust[7],adjust[8]);
1032	1031	}
1033		*/
	1032	#define adjust(x) adjust[x]
	1033	#else
	1034	#define adjust(x) 0
	1035	#endif
1034	1036
1035	1037	switch(vic2->cycle)
1036	1038	{
r9686	r9687
1071	1073	else
1072	1074	vic2_resume_cpu(machine, vic2);
1073	1075
1074		if (vic2->spr_dma_on & 0x08) rdy_cycles += (2 + adjust[1]);
	1076	if (vic2->spr_dma_on & 0x08) vic2->rdy_cycles += (2 + adjust(1));
1075	1077
1076	1078	vic2->cycle++;
1077	1079	break;
r9686	r9687
1117	1119	else
1118	1120	vic2_resume_cpu(machine, vic2);
1119	1121
1120		if (vic2->spr_dma_on & 0x10) rdy_cycles += (2 + adjust[2]);
	1122	if (vic2->spr_dma_on & 0x10) vic2->rdy_cycles += (2 + adjust(2));
1121	1123
1122	1124	vic2->cycle++;
1123	1125	break;
r9686	r9687
1142	1144	else
1143	1145	vic2_resume_cpu(machine, vic2);
1144	1146
1145		if (vic2->spr_dma_on & 0x20) rdy_cycles += (2 + adjust[3]);
	1147	if (vic2->spr_dma_on & 0x20) vic2->rdy_cycles += (2 + adjust(3));
1146	1148
1147	1149	vic2->cycle++;
1148	1150	break;
r9686	r9687
1167	1169	else
1168	1170	vic2_resume_cpu(machine, vic2);
1169	1171
1170		if (vic2->spr_dma_on & 0x40) rdy_cycles += (2 + adjust[4]);
	1172	if (vic2->spr_dma_on & 0x40) vic2->rdy_cycles += (2 + adjust(4));
1171	1173
1172	1174	vic2->cycle++;
1173	1175	break;
r9686	r9687
1192	1194	else
1193	1195	vic2_resume_cpu(machine, vic2);
1194	1196
1195		if (vic2->spr_dma_on & 0x80) rdy_cycles += (2 + adjust[5]);
	1197	if (vic2->spr_dma_on & 0x80) vic2->rdy_cycles += (2 + adjust(5));
1196	1198
1197	1199	vic2->cycle++;
1198	1200	break;
r9686	r9687
1234	1236	vic2->raster_x = 0xfffc;
1235	1237
1236	1238	if ((vic2->rdy_workaround_cb(machine) == 0 ) && (vic2->is_bad_line))
1237		rdy_cycles += (43+adjust[0]);
	1239	vic2->rdy_cycles += (43+adjust(0));
1238	1240
1239	1241	vic2->cycle++;
1240	1242	break;
r9686	r9687
1249	1251	vic2->vc = vic2->vc_base;
1250	1252
1251	1253	if ((vic2->rdy_workaround_cb(machine) == 1 ) && (vic2->is_bad_line))
1252		rdy_cycles += (42+adjust[0]);
	1254	vic2->rdy_cycles += (42+adjust(0));
1253	1255
1254	1256	vic2->cycle++;
1255	1257	break;
r9686	r9687
1269	1271	vic2_matrix_access(machine, vic2);
1270	1272
1271	1273	if ((vic2->rdy_workaround_cb(machine) == 2 ) && (vic2->is_bad_line))
1272		rdy_cycles += (41+adjust[0]);
	1274	vic2->rdy_cycles += (41+adjust(0));
1273	1275
1274	1276	vic2->cycle++;
1275	1277	break;
r9686	r9687
1293	1295	vic2_matrix_access(machine, vic2);
1294	1296
1295	1297	if ((vic2->rdy_workaround_cb(machine) == 3 ) && (vic2->is_bad_line))
1296		rdy_cycles += (40+adjust[0]);
	1298	vic2->rdy_cycles += (40+adjust(0));
1297	1299
1298	1300	vic2->cycle++;
1299	1301	break;
r9686	r9687
1330	1332	vic2_matrix_access(machine, vic2);
1331	1333
1332	1334	if ((vic2->rdy_workaround_cb(machine) == 4 ) && (vic2->is_bad_line))
1333		rdy_cycles += (40+adjust[0]);
	1335	vic2->rdy_cycles += (40+adjust(0));
1334	1336
1335	1337	vic2->cycle++;
1336	1338	break;
r9686	r9687
1503	1505	else
1504	1506	vic2_resume_cpu(machine, vic2);
1505	1507
1506		if (vic2->spr_dma_on & 0x01) rdy_cycles += (2 + adjust[6]);
	1508	if (vic2->spr_dma_on & 0x01) vic2->rdy_cycles += (2 + adjust(6));
1507	1509
1508	1510	vic2->cycle++;
1509	1511	break;
r9686	r9687
1560	1562	else
1561	1563	vic2_resume_cpu(machine, vic2);
1562	1564
1563		if (vic2->spr_dma_on & 0x02) rdy_cycles += (2 + adjust[7]);
	1565	if (vic2->spr_dma_on & 0x02) vic2->rdy_cycles += (2 + adjust(7));
1564	1566
1565	1567	vic2->cycle++;
1566	1568	break;
r9686	r9687
1585	1587	else
1586	1588	vic2_resume_cpu(machine, vic2);
1587	1589
1588		if (vic2->spr_dma_on & 0x04) rdy_cycles += (2 + adjust[8]);
	1590	if (vic2->spr_dma_on & 0x04) vic2->rdy_cycles += (2 + adjust(8));
1589	1591
1590	1592	vic2->cycle++;
1591	1593	break;
r9686	r9687
1606	1608	vic2->cycle = 1;
1607	1609	}
1608	1610
1609		if ((cpu_cycles == vic_cycles) && (rdy_cycles > 0))
	1611	if ((cpu_cycles == vic_cycles) && (vic2->rdy_cycles > 0))
1610	1612	{
1611		device_spin_until_time (machine->firstcpu, machine->device<cpu_device>("maincpu")->cycles_to_attotime(rdy_cycles));
1612		rdy_cycles = 0;
	1613	device_spin_until_time (machine->firstcpu, machine->device<cpu_device>("maincpu")->cycles_to_attotime(vic2->rdy_cycles));
	1614	vic2->rdy_cycles = 0;
1613	1615	}
1614	1616
1615	1617	vic2->raster_x += 8;

src/mess/includes/c65.h

r9686	r9687
7	7	#ifndef C65_H_
8	8	#define C65_H_
9	9
	10	#include "includes/c64.h"
10	11	#include "machine/6526cia.h"
11	12
12	13	typedef struct
r9686	r9687
36	37	UINT8 reg;
37	38	} expansion_ram_t;
38	39
39		class c65_state : public driver_device
	40	class c65_state : public c64_state
40	41	{
41	42	public:
42	43	c65_state(running_machine &machine, const driver_device_config_base &config)
43		: driver_device(machine, config) { }
	44	: c64_state(machine, config) { }
44	45
45	46	UINT8 *chargen;
46	47	UINT8 *interface;
r9686	r9687
48	49	int c64mode;
49	50	UINT8 _6511_port;
50	51	UINT8 keyline;
51		UINT8 vicirq;
52		int old_level;
53	52	int old_value;
54		int old_data;
55	53	int nmilevel;
56	54	dma_t dma;
57	55	int dump_dma;
r9686	r9687
72	70	/*extern UINT8 *c65_graphics; */
73	71
74	72	void c65_bankswitch (running_machine *machine);
75		void c65_colorram_write (int offset, int value);
	73	//void c65_colorram_write (running_machine *machine, int offset, int value);
76	74
77	75	int c65_dma_read(running_machine *machine, int offset);
78	76	int c65_dma_read_color(running_machine *machine, int offset);

src/mess/includes/c128.h

r9686	r9687
14	14	#ifndef __C128_H__
15	15	#define __C128_H__
16	16
	17	#include "includes/c64.h"
17	18	#include "machine/6526cia.h"
18	19
19		class c128_state : public driver_device
	20	class c128_state : public c64_state
20	21	{
21	22	public:
22	23	c128_state(running_machine &machine, const driver_device_config_base &config)
23		: driver_device(machine, config) { }
	24	: c64_state(machine, config) { }
24	25
25		UINT8 *basic;
26		UINT8 *kernal;
27		UINT8 *chargen;
	26	UINT8 *c128_basic;
	27	UINT8 *c128_kernal;
	28	UINT8 *c128_chargen;
28	29	UINT8 *z80;
29	30	UINT8 *editor;
30	31	UINT8 *internal_function;
r9686	r9687
45	46	int sp1;
46	47	int data_out;
47	48	int va1617;
48		int cia1_on;
49	49	int monitor;
50		UINT8 vicirq;
51	50	int nmilevel;
52		int old_level;
53		int old_data;
54		int old_exrom;
55		int old_game;
56		emu_timer *datasette_timer;
57	51	};
58	52
59	53

src/mess/includes/c64.h

r9686	r9687
16	16	#include "machine/6526cia.h"
17	17	#include "devices/cartslot.h"
18	18
	19	#define C64_MAX_ROMBANK 64 // .crt files contain multiple 'CHIPs', i.e. rom banks (of variable size) with headers. Known carts have at most 64 'CHIPs'.
	20
	21	typedef struct {
	22	int addr, size, index, start;
	23	} C64_ROM;
	24
	25	typedef struct _c64_cart_t c64_cart_t;
	26	struct _c64_cart_t {
	27	C64_ROM     bank[C64_MAX_ROMBANK];
	28	INT8        game;
	29	INT8        exrom;
	30	UINT8       mapper;
	31	UINT8       n_banks;
	32	};
	33
	34	class c64_state : public driver_device
	35	{
	36	public:
	37	c64_state(running_machine &machine, const driver_device_config_base &config)
	38	: driver_device(machine, config) { }
	39
	40	int old_level;
	41	int old_data;
	42	int old_exrom;
	43	int old_game;
	44	UINT8 vicirq;
	45	emu_timer *datasette_timer;
	46	UINT8 *colorram;
	47	UINT8 *basic;
	48	UINT8 *kernal;
	49	UINT8 *chargen;
	50	UINT8 *memory;
	51	int pal;
	52	int tape_on;
	53	UINT8 *c64_roml;
	54	UINT8 *c64_romh;
	55	UINT8 *vicaddr;
	56	UINT8 *c128_vicaddr;
	57	UINT8 game;
	58	UINT8 exrom;
	59	UINT8 *io_mirror;
	60	UINT8 port_data;
	61	UINT8 *roml;
	62	UINT8 *romh;
	63	int ultimax;
	64	int cia1_on;
	65	int io_enabled;
	66	int is_sx64;
	67	UINT8 *io_ram_w_ptr;
	68	UINT8 *io_ram_r_ptr;
	69	c64_cart_t cart;
	70	};
	71
	72
19	73	/*----------- defined in machine/c64.c -----------*/
20	74
21	75	/* private area */
22		extern UINT8 *c64_colorram;
23		extern UINT8 *c64_basic;
24		extern UINT8 *c64_kernal;
25		extern UINT8 *c64_chargen;
26		extern UINT8 *c64_memory;
27	76
28	77	UINT8 c64_m6510_port_read(running_device *device, UINT8 direction);
29	78	void c64_m6510_port_write(running_device *device, UINT8 direction, UINT8 data);
r9686	r9687
51	100	int c64_paddle_read (running_device *device, int which);
52	101	void c64_vic_interrupt (running_machine *machine, int level);
53	102
54		extern int c64_pal;
55		extern int c64_tape_on;
56		extern UINT8 *c64_roml;
57		extern UINT8 *c64_romh;
58		extern UINT8 *c64_vicaddr, *c128_vicaddr;
59		extern UINT8 c64_game, c64_exrom;
60	103	extern const mos6526_interface c64_ntsc_cia0, c64_pal_cia0;
61	104	extern const mos6526_interface c64_ntsc_cia1, c64_pal_cia1;
62	105

src/mess/drivers/c65.c

r9686	r9687
84	84	AM_RANGE(0x0dc00, 0x0dfff) AM_READ_BANK("bank8") AM_WRITE_BANK("bank9")
85	85	AM_RANGE(0x0e000, 0x0ffff) AM_READ_BANK("bank10") AM_WRITE_BANK("bank15")
86	86	AM_RANGE(0x10000, 0x1f7ff) AM_RAM
87		AM_RANGE(0x1f800, 0x1ffff) AM_RAM AM_BASE(&c64_colorram)
	87	AM_RANGE(0x1f800, 0x1ffff) AM_RAM AM_BASE_MEMBER(c65_state, colorram)
88	88
89	89	AM_RANGE(0x20000, 0x23fff) AM_ROM /* &c65_dos,     maps to 0x8000    */
90	90	AM_RANGE(0x24000, 0x28fff) AM_ROM /* reserved */
91	91	AM_RANGE(0x29000, 0x29fff) AM_ROM AM_BASE_MEMBER(c65_state, chargen)
92		AM_RANGE(0x2a000, 0x2bfff) AM_ROM AM_BASE(&c64_basic)
	92	AM_RANGE(0x2a000, 0x2bfff) AM_ROM AM_BASE_MEMBER(c65_state, basic)
93	93	AM_RANGE(0x2c000, 0x2cfff) AM_ROM AM_BASE_MEMBER(c65_state, interface)
94		AM_RANGE(0x2d000, 0x2dfff) AM_ROM AM_BASE(&c64_chargen)
95		AM_RANGE(0x2e000, 0x2ffff) AM_ROM AM_BASE(&c64_kernal)
	94	AM_RANGE(0x2d000, 0x2dfff) AM_ROM AM_BASE_MEMBER(c65_state, chargen)
	95	AM_RANGE(0x2e000, 0x2ffff) AM_ROM AM_BASE_MEMBER(c65_state, kernal)
96	96
97	97	AM_RANGE(0x30000, 0x31fff) AM_ROM /*&c65_monitor,     monitor maps to 0x6000    */
98	98	AM_RANGE(0x32000, 0x37fff) AM_ROM /*&c65_basic, */
r9686	r9687
236	236	return input_port_read(machine, "OTHER") & 0x04;
237	237	}
238	238
239		static UINT8 c65_c64_mem_r( int offset )
	239	static UINT8 c65_c64_mem_r( running_machine *machine, int offset )
240	240	{
241		return c64_memory[offset];
	241	c65_state *state = machine->driver_data<c65_state>();
	242	return state->memory[offset];
242	243	}
243	244
244	245	static const vic3_interface c65_vic3_ntsc_intf = {

src/mess/drivers/c128.c

r9686	r9687
235	235	#if 0
236	236	AM_RANGE(0x10000, 0x1ffff) AM_WRITEONLY
237	237	AM_RANGE(0x20000, 0xfffff) AM_WRITEONLY      /* or nothing */
238		AM_RANGE(0x100000, 0x107fff) AM_BASE_MEMBER(c128_state, basic)   /* maps to 0x4000 */
239		AM_RANGE(0x108000, 0x109fff) AM_BASE(&c64_basic)   /* maps to 0xa000 */
240		AM_RANGE(0x10a000, 0x10bfff) AM_BASE(&c64_kernal)   /* maps to 0xe000 */
	238	AM_RANGE(0x100000, 0x107fff) AM_BASE_MEMBER(c128_state, c128_basic)   /* maps to 0x4000 */
	239	AM_RANGE(0x108000, 0x109fff) AM_BASE_MEMBER(c128_state, basic)   /* maps to 0xa000 */
	240	AM_RANGE(0x10a000, 0x10bfff) AM_BASE_MEMBER(c128_state, kernal)   /* maps to 0xe000 */
241	241	AM_RANGE(0x10c000, 0x10cfff) AM_BASE_MEMBER(c128_state, editor)
242	242	AM_RANGE(0x10d000, 0x10dfff) AM_BASE_MEMBER(c128_state, z80)      /* maps to z80 0 */
243		AM_RANGE(0x10e000, 0x10ffff) AM_BASE_MEMBER(c128_state, kernal)
	243	AM_RANGE(0x10e000, 0x10ffff) AM_BASE_MEMBER(c128_state, c128_kernal)
244	244	AM_RANGE(0x110000, 0x117fff) AM_BASE_MEMBER(c128_state, internal_function)
245	245	AM_RANGE(0x118000, 0x11ffff) AM_BASE_MEMBER(c128_state, external_function)
246		AM_RANGE(0x120000, 0x120fff) AM_BASE(&c64_chargen)
247		AM_RANGE(0x121000, 0x121fff) AM_BASE_MEMBER(c128_state, chargen)
248		AM_RANGE(0x122000, 0x1227ff) AM_BASE(&c64_colorram)
	246	AM_RANGE(0x120000, 0x120fff) AM_BASE_MEMBER(c128_state, chargen)
	247	AM_RANGE(0x121000, 0x121fff) AM_BASE_MEMBER(c128_state, c128_chargen)
	248	AM_RANGE(0x122000, 0x1227ff) AM_BASE_MEMBER(c128_state, colorram)
249	249	AM_RANGE(0x122800, 0x1327ff) AM_BASE_MEMBER(c128_state, vdcram)
250	250	/* 2 kbyte by 8 bits, only 1 kbyte by 4 bits used) */
251	251	#endif

src/mess/drivers/c64.c

r9686	r9687
399	399	*************************************/
400	400
401	401	static ADDRESS_MAP_START(ultimax_mem , ADDRESS_SPACE_PROGRAM, 8)
402		AM_RANGE(0x0000, 0x0fff) AM_RAM AM_BASE(&c64_memory)
403		AM_RANGE(0x8000, 0x9fff) AM_ROM AM_BASE(&c64_roml)
	402	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_BASE_MEMBER(c64_state, memory)
	403	AM_RANGE(0x8000, 0x9fff) AM_ROM AM_BASE_MEMBER(c64_state, c64_roml)
404	404	AM_RANGE(0xd000, 0xd3ff) AM_DEVREADWRITE("vic2", vic2_port_r, vic2_port_w)
405	405	AM_RANGE(0xd400, 0xd7ff) AM_DEVREADWRITE("sid6581", sid6581_r, sid6581_w)
406		AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE( c64_colorram_write) AM_BASE(&c64_colorram) /* colorram  */
	406	AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE( c64_colorram_write) AM_BASE_MEMBER(c64_state, colorram) /* colorram  */
407	407	AM_RANGE(0xdc00, 0xdcff) AM_DEVREADWRITE("cia_0", mos6526_r, mos6526_w)
408		AM_RANGE(0xe000, 0xffff) AM_ROM AM_BASE(&c64_romh)            /* ram or kernel rom */
	408	AM_RANGE(0xe000, 0xffff) AM_ROM AM_BASE_MEMBER(c64_state, c64_romh)            /* ram or kernel rom */
409	409	ADDRESS_MAP_END
410	410
411	411	static ADDRESS_MAP_START(c64_mem, ADDRESS_SPACE_PROGRAM, 8)
412		AM_RANGE(0x0000, 0x7fff) AM_RAM AM_BASE(&c64_memory)
	412	AM_RANGE(0x0000, 0x7fff) AM_RAM AM_BASE_MEMBER(c64_state, memory)
413	413	AM_RANGE(0x8000, 0x9fff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank2")      /* ram or external roml */
414	414	AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank3") AM_WRITEONLY            /* ram or basic rom or external romh */
415	415	AM_RANGE(0xc000, 0xcfff) AM_RAM
r9686	r9687
591	591
592	592	static int c64_dma_read( running_machine *machine, int offset )
593	593	{
594		if (!c64_game && c64_exrom)
	594	c64_state *state = machine->driver_data<c64_state>();
	595	if (!state->game && state->exrom)
595	596	{
596	597	if (offset < 0x3000)
597		return c64_memory[offset];
	598	return state->memory[offset];
598	599
599		return c64_romh[offset & 0x1fff];
	600	return state->c64_romh[offset & 0x1fff];
600	601	}
601	602
602		if (((c64_vicaddr - c64_memory + offset) & 0x7000) == 0x1000)
603		return c64_chargen[offset & 0xfff];
	603	if (((state->vicaddr - state->memory + offset) & 0x7000) == 0x1000)
	604	return state->chargen[offset & 0xfff];
604	605
605		return c64_vicaddr[offset];
	606	return state->vicaddr[offset];
606	607	}
607	608
608	609	static int c64_dma_read_ultimax( running_machine *machine, int offset )
609	610	{
	611	c64_state *state = machine->driver_data<c64_state>();
610	612	if (offset < 0x3000)
611		return c64_memory[offset];
	613	return state->memory[offset];
612	614
613		return c64_romh[offset & 0x1fff];
	615	return state->c64_romh[offset & 0x1fff];
614	616	}
615	617
616	618	static int c64_dma_read_color( running_machine *machine, int offset )
617	619	{
618		return c64_colorram[offset & 0x3ff] & 0xf;
	620	c64_state *state = machine->driver_data<c64_state>();
	621	return state->colorram[offset & 0x3ff] & 0xf;
619	622	}
620	623
621	624	static UINT8 c64_rdy_cb( running_machine *machine )
r9686	r9687
669	672	*
670	673	*************************************/
671	674
672		static MACHINE_CONFIG_START( c64, driver_device )
	675	static MACHINE_CONFIG_START( c64, c64_state )
673	676	/* basic machine hardware */
674	677	MDRV_CPU_ADD("maincpu", M6510, VIC6567_CLOCK)
675	678	MDRV_CPU_PROGRAM_MAP(c64_mem)
r9686	r9687
721	724	MDRV_FRAGMENT_ADD(c64_cartslot)
722	725	MACHINE_CONFIG_END
723	726
724		static MACHINE_CONFIG_START( c64pal, driver_device )
	727	static MACHINE_CONFIG_START( c64pal, c64_state )
725	728	MDRV_CPU_ADD( "maincpu", M6510, VIC6569_CLOCK)
726	729	MDRV_CPU_PROGRAM_MAP(c64_mem)
727	730	MDRV_CPU_CONFIG( c64_m6510_interface )

docs/messnew.txt

r9686	r9687
37	37	- [C64] Added known good dumps softlist for cartridges. Not hooked up
38	38	to driver code yet. [Curt Coder]
39	39
	40	- [C64] Multisession fixes.  [Atari Ace]
	41
40	42	- [CHANNELF/LYNX/SPECIAL/SVISION/WSWAN] Tokenized audio state.  [Atari Ace]
41	43
42	44	- [GENESIS] Added support for several genesis PCB carts [El Barto]

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