src/mess/machine/pce.c
| r9153 | r9154 | |
| 100 | 100 | int adpcm_write_ptr; |
| 101 | 101 | UINT8 adpcm_write_buf; |
| 102 | 102 | int adpcm_length; |
| 103 | | int adpcm_clock_count; |
| 104 | 103 | int adpcm_clock_divider; |
| 105 | 104 | UINT32 msm_start_addr; |
| 106 | 105 | UINT32 msm_end_addr; |
| r9153 | r9154 | |
| 495 | 494 | if ( pce_cd.msm_idle ) |
| 496 | 495 | return; |
| 497 | 496 | |
| 498 | | if ( ! pce_cd.adpcm_clock_count ) |
| 499 | | { |
| 500 | | /* Supply new ADPCM data */ |
| 501 | | msm_data = (pce_cd.msm_nibble) ? (pce_cd.adpcm_ram[pce_cd.msm_start_addr] & 0x0f) : ((pce_cd.adpcm_ram[pce_cd.msm_start_addr] & 0xf0) >> 4); |
| 497 | /* Supply new ADPCM data */ |
| 498 | msm_data = (pce_cd.msm_nibble) ? (pce_cd.adpcm_ram[pce_cd.msm_start_addr] & 0x0f) : ((pce_cd.adpcm_ram[pce_cd.msm_start_addr] & 0xf0) >> 4); |
| 502 | 499 | |
| 503 | | msm5205_data_w(device, msm_data); |
| 504 | | pce_cd.msm_nibble ^= 1; |
| 500 | msm5205_data_w(device, msm_data); |
| 501 | pce_cd.msm_nibble ^= 1; |
| 505 | 502 | |
| 506 | | if(pce_cd.msm_nibble == 0) |
| 503 | if(pce_cd.msm_nibble == 0) |
| 504 | { |
| 505 | pce_cd.msm_start_addr++; |
| 506 | |
| 507 | if(pce_cd.msm_start_addr == pce_cd.msm_half_addr) |
| 507 | 508 | { |
| 508 | | pce_cd.msm_start_addr++; |
| 509 | //pce_cd_set_irq_line( device->machine, PCE_CD_IRQ_SAMPLE_FULL_PLAY, CLEAR_LINE ); |
| 510 | //pce_cd_set_irq_line( device->machine, PCE_CD_IRQ_SAMPLE_HALF_PLAY, ASSERT_LINE ); |
| 511 | } |
| 509 | 512 | |
| 510 | | if(pce_cd.msm_start_addr == pce_cd.msm_half_addr) |
| 511 | | { |
| 512 | | //pce_cd_set_irq_line( device->machine, PCE_CD_IRQ_SAMPLE_FULL_PLAY, CLEAR_LINE ); |
| 513 | | //pce_cd_set_irq_line( device->machine, PCE_CD_IRQ_SAMPLE_HALF_PLAY, ASSERT_LINE ); |
| 514 | | } |
| 515 | | |
| 516 | | if(pce_cd.msm_start_addr > pce_cd.msm_end_addr) |
| 517 | | { |
| 518 | | //pce_cd_set_irq_line( device->machine, PCE_CD_IRQ_SAMPLE_HALF_PLAY, CLEAR_LINE ); |
| 519 | | //pce_cd_set_irq_line( device->machine, PCE_CD_IRQ_SAMPLE_FULL_PLAY, CLEAR_LINE ); |
| 520 | | adpcm_stop(device->machine); |
| 521 | | msm5205_reset_w(device, 1); |
| 522 | | } |
| 513 | if(pce_cd.msm_start_addr > pce_cd.msm_end_addr) |
| 514 | { |
| 515 | //pce_cd_set_irq_line( device->machine, PCE_CD_IRQ_SAMPLE_HALF_PLAY, CLEAR_LINE ); |
| 516 | //pce_cd_set_irq_line( device->machine, PCE_CD_IRQ_SAMPLE_FULL_PLAY, CLEAR_LINE ); |
| 517 | adpcm_stop(device->machine); |
| 518 | msm5205_reset_w(device, 1); |
| 523 | 519 | } |
| 524 | 520 | } |
| 525 | | else |
| 526 | | { |
| 527 | | /* Make sure the sample does not change */ |
| 528 | | msm5205_data_w(device, msm_data); |
| 529 | | } |
| 530 | | |
| 531 | | pce_cd.adpcm_clock_count = ( pce_cd.adpcm_clock_count + 1 ) % pce_cd.adpcm_clock_divider; |
| 532 | 521 | } |
| 533 | 522 | |
| 534 | 523 | #define SCSI_STATUS_OK 0x00 |
| r9153 | r9154 | |
| 1214 | 1203 | pce_cd.adpcm_ram = auto_alloc_array(machine, UINT8, PCE_ADPCM_RAM_SIZE ); |
| 1215 | 1204 | memset( pce_cd.adpcm_ram, 0, PCE_ADPCM_RAM_SIZE ); |
| 1216 | 1205 | pce_cd.adpcm_clock_divider = 1; |
| 1206 | msm5205_change_clock_w(machine->device("msm5205"), (PCE_CD_CLOCK / 6) / pce_cd.adpcm_clock_divider); |
| 1217 | 1207 | |
| 1218 | 1208 | /* Set up cd command buffer */ |
| 1219 | 1209 | pce_cd.command_buffer = auto_alloc_array(machine, UINT8, PCE_CD_COMMAND_BUFFER_SIZE ); |
| r9153 | r9154 | |
| 1389 | 1379 | } |
| 1390 | 1380 | break; |
| 1391 | 1381 | case 0x0E: /* ADPCM playback rate */ |
| 1392 | | pce_cd.adpcm_clock_divider = 16 - ( data & 0x0F ); |
| 1393 | | pce_cd.adpcm_clock_count = pce_cd.adpcm_clock_divider - 1; |
| 1382 | pce_cd.adpcm_clock_divider = 0x10 - ( data & 0x0F ); |
| 1383 | msm5205_change_clock_w(space->machine->device("msm5205"), (PCE_CD_CLOCK / 6) / pce_cd.adpcm_clock_divider); |
| 1394 | 1384 | break; |
| 1395 | 1385 | case 0x0F: /* ADPCM and CD audio fade timer */ |
| 1396 | 1386 | break; |