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r8282 Tuesday 15th June, 2010 at 22:14:38 UTC by Fabio Priuli
[NES] some more work on PCB initialization code

[src/mess/machine]

nes_pcb.c nes_unif.c

src/mess/machine/nes_pcb.c

r8281	r8282
644	644
645	645	/*************************************************************
646	646
647		Nihon Bussan UNROM
	647	Nihon Bussan UNROM M5
648	648
649	649	Games: Crazy Climber Jpn
650	650
r8281	r8282
662	662	{
663	663	LOG_MMC(("uxrom_cc_w, offset: %04x, data: %02x\n", offset, data));
664	664
665		prg16_cdef(space->machine, data & 0x07);
	665	prg16_cdef(space->machine, data);
666	666	}
667	667
668	668	/*************************************************************
r8281	r8282
831	831	{
832	832	running_machine *machine = space->machine;
833	833	nes_state *state = (nes_state *)machine->driver_data;
834		UINT8 bank = BIT(state->mmc_reg[0], 4) ? BIT(state->mmc_reg[1], 4) : BIT(state->mmc_reg[0], 3);
	834	UINT8 bank = BIT(state->mmc_reg[0], 4) ? BIT(state->mmc_reg[1], 4) : BIT(state->mmc_reg[1], 3);
835	835
836	836	switch (board)
837	837	{
r8281	r8282
2103	2103	prg16_89ab(space->machine, data);
2104	2104	break;
2105	2105	default:
2106		LOG_MMC(("ntbrom_w uncaught offset: %04x, data: %02x\n", offset, data));
	2106	LOG_MMC(("ntbrom_w uncaught write, offset: %04x, data: %02x\n", offset, data));
2107	2107	break;
2108	2108	}
2109	2109	}
r8281	r8282
2669	2669	if (offset < 0x4000)
2670	2670	{
2671	2671	set_nt_mirroring(space->machine, BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
2672		prg16_cdef(space->machine, data & 0x0f);
	2672	prg16_cdef(space->machine, data);
2673	2673	}
2674	2674	}
2675	2675
r8281	r8282
6081	6081
6082	6082	/*************************************************************
6083	6083
	6084	Tengen 800008 Board
	6085
	6086	iNES: mapper 3?
	6087
	6088	In MESS: Supported.
	6089
	6090	*************************************************************/
	6091
	6092	static WRITE8_HANDLER( tengen_800008_w )
	6093	{
	6094	LOG_MMC(("tengen_800008_w, offset: %04x, data: %02x\n", offset, data));
	6095
	6096	prg32(space->machine, data >> 3);
	6097	chr8(space->machine, data, CHRROM);
	6098	}
	6099
	6100	/*************************************************************
	6101
6084	6102	Tengen 800032 Board
6085	6103
6086	6104	Games: Klax, Road Runner, Rolling Thunder, Shinobi, Skulls
r8281	r8282
9987	10005	#define NES_WRITEONLY(a) \
9988	10006	{a, NULL}
9989	10007
9990		// further review needed for: TXROM, PXROM, FXROM, all multicart pcb, many unl/btl pcbs
	10008	// further review needed for: TXROM, PXROM, FXROM, Bandai LZ93D50, Irem G-101, Konami VRC3
	10009	// all multicart pcb, many unl/btl pcbs
9991	10010	static const nes_pcb_intf nes_intf_list[] =
9992	10011	{
9993	10012	{ STD_NROM,             NES_NOACCESS, NES_NOACCESS, NES_NOACCESS,                         NULL, NULL, NULL },
r8281	r8282
9997	10016	{ STD_UN1ROM,           NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(un1rom_w),              NULL, NULL, NULL },
9998	10017	{ STD_CPROM,            NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(cprom_w),               NULL, NULL, NULL },
9999	10018	{ STD_CNROM,            NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(cnrom_w),               NULL, NULL, NULL },
10000		{ TENGEN_800008,        NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(cnrom_w),               NULL, NULL, NULL },
10001	10019	{ BANDAI_PT554,         NES_NOACCESS, NES_WRITEONLY(bandai_pt554_m_w), NES_WRITEONLY(cnrom_w), NULL, NULL, NULL },
10002	10020	{ STD_AXROM,            NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(axrom_w),               NULL, NULL, NULL },
10003	10021	{ STD_PXROM,            NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(pxrom_w),               mmc2_latch, NULL, NULL },
r8281	r8282
10113	10131	{ RUMBLESTATION_BOARD,  NES_NOACCESS, NES_WRITEONLY(rumblestation_m_w), NES_WRITEONLY(rumblestation_w),      NULL, NULL, NULL },
10114	10132	{ SUPERGAME_BOOGERMAN,  NES_WRITEONLY(sgame_boog_l_w), NES_NOACCESS, NES_WRITEONLY(sgame_boog_w), NULL, NULL, mmc3_irq },
10115	10133	{ SUPERGAME_LIONKING,   NES_NOACCESS, NES_WRITEONLY(sgame_lion_m_w), NES_WRITEONLY(sgame_lion_w), NULL, NULL, mmc3_irq },
	10134	{ TENGEN_800008,        NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tengen_800008_w),       NULL, NULL, NULL },
10116	10135	{ TENGEN_800032,        NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tengen_800032_w),       NULL, NULL, tengen_800032_irq },
10117	10136	{ TENGEN_800037,        NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(tengen_800037_w),       NULL, NULL, tengen_800032_irq },
10118	10137	{ TXC_22211A,           {txc_22211_l_w, txc_22211_l_r}, NES_NOACCESS, NES_WRITEONLY(txc_22211_w), NULL, NULL, NULL },

src/mess/machine/nes_unif.c

r8281	r8282
160	160
161	161	switch (idx)
162	162	{
163		// mapper 0
164		case STD_NROM:
	163	case STD_NROM:   // mapper 0
165	164	case HVC_FAMBASIC:
166	165	case GG_NROM:
167	166	prg32(machine, 0);
168	167	break;
169		// mapper 1, 155
170		case STD_SXROM:
	168	case STD_UXROM:   // mapper 2
	169	case STD_UN1ROM:   // mapper 94
	170	prg32(machine, 0);
	171	break;
	172	case UXROM_CC:   // mapper 180
	173	prg32(machine, 0);
	174	break;
	175	case STD_CNROM:   // mapper 3, 185
	176	case BANDAI_PT554:
	177	case TENGEN_800008:
	178	prg32(machine, 0);
	179	break;
	180	case STD_CPROM:   // mapper 13
	181	chr4_0(machine, 0, CHRRAM);
	182	chr4_4(machine, 0, CHRRAM);
	183	prg32(machine, 0);
	184	break;
	185	case STD_AXROM:   // mapper 7
	186	set_nt_mirroring(machine, PPU_MIRROR_LOW);
	187	prg32(machine, 0);
	188	break;
	189	case STD_BXROM:   // mapper 34
	190	prg32(machine, 0);
	191	break;
	192	case STD_GXROM:   // mapper 66
	193	case STD_MXROM:
	194	prg32(machine, 0);
	195	break;
	196	case STD_SXROM:   // mapper 1, 155
171	197	case STD_SOROM:
172	198	case STD_SXROM_A:
173	199	state->mmc_latch1 = 0;
174	200	state->mmc_count = 0;
175	201	state->mmc_reg[0] = 0x0f;
176		state->mmc_reg[1] = state->mmc_reg[2] = 0;
177		state->mmc_reg[3] = 0x10;
	202	state->mmc_reg[1] = state->mmc_reg[2] = state->mmc_reg[3] = 0;
178	203	set_nt_mirroring(machine, PPU_MIRROR_HORZ);
179	204	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
180	205	mmc1_set_chr(machine);
181	206	mmc1_set_prg(machine);
	207	wram_bank(machine, 0, (idx == STD_SOROM) ? NES_WRAM : NES_BATTERY);
182	208	break;
183		// mapper 2
184		case STD_UXROM:
	209	case STD_PXROM:   // mapper 9
	210	state->MMC2_regs[0] = state->MMC2_regs[2] = 0;
	211	state->MMC2_regs[1] = state->MMC2_regs[3] = 0;
	212	state->mmc_latch1 = state->mmc_latch2 = 0xfe;
	213	prg8_89(machine, 0);
	214	prg8_ab(machine, (state->prg_chunks << 1) - 3);
	215	prg8_cd(machine, (state->prg_chunks << 1) - 2);
	216	prg8_ef(machine, (state->prg_chunks << 1) - 1);
	217	break;
	218	case STD_FXROM: // mapper 10
	219	state->MMC2_regs[0] = state->MMC2_regs[2] = 0;
	220	state->MMC2_regs[1] = state->MMC2_regs[3] = 0;
	221	state->mmc_latch1 = state->mmc_latch2 = 0xfe;
185	222	prg16_89ab(machine, 0);
186	223	prg16_cdef(machine, state->prg_chunks - 1);
187	224	break;
188		// mapper 3, 185
189		case STD_CNROM:
190		case BANDAI_PT554:
191		case TENGEN_800008:
192		prg32(machine, 0);
193		break;
194		// mapper 4
195		case STD_HKROM:
196		case STD_TXROM:
	225	case STD_TXROM:   // mapper 4
197	226	case STD_TVROM:
198		// mapper 206
199		case STD_DXROM:
200		case STD_DRROM:
201		mapper_initialize(machine, 4);
	227	case STD_HKROM:   // MMC6
	228	case REXSOFT_DBZ5:   // mapper 12
	229	case WAIXING_TYPE_A:   // mapper 74
	230	case STD_TXSROM:   // mapper 118
	231	case STD_TQROM:   // mapper 119
	232	case WAIXING_TYPE_B:   // mapper 191
	233	case WAIXING_TYPE_C:   // mapper 192
	234	case WAIXING_TYPE_D:   // mapper 194
	235	case WAIXING_TYPE_E:   // mapper 195
	236	case WAIXING_TYPE_H:   // mapper 245
	237	case BTL_SUPERBROS11:   // mapper 196
	238	case NITRA_TDA:   // mapper 250
	239	if (state->four_screen_vram)   // only TXROM and DXROM have 4-screen mirroring
	240	{
	241	set_nt_page(machine, 0, CART_NTRAM, 0, 1);
	242	set_nt_page(machine, 1, CART_NTRAM, 1, 1);
	243	set_nt_page(machine, 2, CART_NTRAM, 2, 1);
	244	set_nt_page(machine, 3, CART_NTRAM, 3, 1);
	245	}
	246	state->mmc_prg_bank[0] = state->mmc_prg_bank[2] = 0xfe;   // prg_bank[2] & prg_bank[3] remain always the same in most MMC3 variants
	247	state->mmc_prg_bank[1] = state->mmc_prg_bank[3] = 0xff;   // but some pirate clone mappers change them after writing certain registers
	248	state->mmc_latch1 = 0;
	249	state->mmc_latch2 = 0x80;
	250	state->mmc_prg_base = state->mmc_chr_base = 0;
	251	state->mmc_prg_mask = state->mmc_chr_mask = 0xff;   // these could be init'ed as xxx_chunks-1 and they would work the same
	252	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	253	mmc3_set_prg(machine, state->mmc_prg_base, state->mmc_prg_mask);
	254	mmc3_set_chr(machine, state->mmc_chr_source, state->mmc_chr_base, state->mmc_chr_mask);
202	255	break;
203		// mapper 5
204		case STD_EXROM:
	256	case PAL_ZZ:   // mapper 37
	257	state->mmc_prg_bank[0] = state->mmc_prg_bank[2] = 0xfe;
	258	state->mmc_prg_bank[1] = state->mmc_prg_bank[3] = 0xff;
	259	state->mmc_latch1 = 0;
	260	state->mmc_latch2 = 0x80;
	261	state->mmc_prg_base = state->mmc_chr_base = 0;
	262	state->mmc_prg_mask = 0x07;
	263	state->mmc_chr_mask = 0x7f;
	264	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	265	mmc3_set_prg(machine, state->mmc_prg_base, state->mmc_prg_mask);
	266	mmc3_set_chr(machine, state->mmc_chr_source, state->mmc_chr_base, state->mmc_chr_mask);
	267	break;
	268	case NES_QJ:   // mapper 47
	269	state->mmc_prg_bank[0] = state->mmc_prg_bank[2] = 0xfe;
	270	state->mmc_prg_bank[1] = state->mmc_prg_bank[3] = 0xff;
	271	state->mmc_latch1 = 0;
	272	state->mmc_latch2 = 0x80;
	273	state->mmc_prg_base = state->mmc_chr_base = 0;
	274	state->mmc_prg_mask = 0x0f;
	275	state->mmc_chr_mask = 0x7f;
	276	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	277	mmc3_set_prg(machine, state->mmc_prg_base, state->mmc_prg_mask);
	278	mmc3_set_chr(machine, state->mmc_chr_source, state->mmc_chr_base, state->mmc_chr_mask);
	279	break;
	280	case STD_EXROM:   // mapper 5
205	281	state->MMC5_rom_bank_mode = 3;
206	282	state->MMC5_vrom_bank_mode = 0;
207	283	state->MMC5_vram_protect = 0;
r8281	r8282
213	289	prg16_89ab(machine, state->prg_chunks - 2);
214	290	prg16_cdef(machine, state->prg_chunks - 1);
215	291	break;
216		// mapper 7
217		case STD_AXROM:
218		set_nt_mirroring(machine, PPU_MIRROR_LOW);
	292	case STD_NXROM:      // mapper 68
	293	state->mmc_reg[0] = state->mmc_latch1 = state->mmc_latch2 = 0;
219	294	prg16_89ab(machine, 0);
220	295	prg16_cdef(machine, state->prg_chunks - 1);
221	296	break;
222		// mapper 9
223		case STD_PXROM:
224		state->MMC2_regs[0] = state->MMC2_regs[2] = 0;
225		state->MMC2_regs[1] = state->MMC2_regs[3] = 0;
226		state->mmc_latch1 = state->mmc_latch2 = 0xfe;
	297	case STD_JXROM:      // mapper 69
	298	case SUNSOFT_5B:
	299	case SUNSOFT_FME7:
	300	prg16_89ab(machine, 0);
	301	prg16_cdef(machine, state->prg_chunks - 1);
	302	break;
	303	case NAMCOT_34X3:   // mapper 88
	304	case STD_DXROM:   // mapper 206
	305	case STD_DRROM:
	306	if (state->four_screen_vram)   // only TXROM and DXROM have 4-screen mirroring
	307	{
	308	set_nt_page(machine, 0, CART_NTRAM, 0, 1);
	309	set_nt_page(machine, 1, CART_NTRAM, 1, 1);
	310	set_nt_page(machine, 2, CART_NTRAM, 2, 1);
	311	set_nt_page(machine, 3, CART_NTRAM, 3, 1);
	312	}
	313	prg8_89(machine, 0xc);
	314	prg8_ab(machine, 0xd);
	315	prg8_cd(machine, 0xe);
	316	prg8_ef(machine, 0xf);
	317	break;
	318	case NAMCOT_3453:   // mapper 154
	319	prg16_89ab(machine, state->prg_chunks - 2);
	320	prg16_cdef(machine, state->prg_chunks - 1);
	321	break;
	322	case NAMCOT_3446:   // mapper 76
227	323	prg8_89(machine, 0);
228		prg8_ab(machine, (state->prg_chunks << 1) - 3);
229		prg8_cd(machine, (state->prg_chunks << 1) - 2);
230		prg8_ef(machine, (state->prg_chunks << 1) - 1);
	324	prg8_ab(machine, 1);
	325	prg16_cdef(machine, state->prg_chunks - 1);
	326	chr2_0(machine, 0, CHRROM);
	327	chr2_2(machine, 1, CHRROM);
	328	chr2_4(machine, 2, CHRROM);
	329	chr2_6(machine, 3, CHRROM);
	330	state->mmc_latch1 = 0;
231	331	break;
232		// mapper 10
233		case STD_FXROM:
234		state->MMC2_regs[0] = state->MMC2_regs[2] = 0;
235		state->MMC2_regs[1] = state->MMC2_regs[3] = 0;
236		state->mmc_latch1 = state->mmc_latch2 = 0xfe;
	332	case NAMCOT_3425:   // mapper 95
237	333	prg16_89ab(machine, 0);
238	334	prg16_cdef(machine, state->prg_chunks - 1);
239	335	break;
240		// mapper 11
241		case DIS_74X377:
	336	case DIS_74X377:   // mapper 11
242	337	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;   // NINA-07 has no CHRROM
243	338	prg32(machine, 0);
244	339	break;
245		// mapper 12
246		case REXSOFT_DBZ5:
247		// mapper 74
248		case WAIXING_TYPE_A:
249		// mapper 118
250		case STD_TXSROM:
251		// mapper 119
252		case STD_TQROM:
253		// mapper 191
254		case WAIXING_TYPE_B:
255		// mapper 192
256		case WAIXING_TYPE_C:
257		// mapper 194
258		case WAIXING_TYPE_D:
259		// mapper 195
260		case WAIXING_TYPE_E:
261		// mapper 196
262		case BTL_SUPERBROS11:
263		// mapper 245
264		case WAIXING_TYPE_H:
265		// mapper 250
266		case NITRA_TDA:
267		mapper_initialize(machine, 12);
	340	case DIS_74X139X74:   // mapper 87
	341	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	342	prg16_89ab(machine, 0);
	343	prg16_cdef(machine, state->prg_chunks - 1);
268	344	break;
269		// mapper 13
270		case STD_CPROM:
271		chr4_0(machine, 0, CHRRAM);
	345	case DIS_74X161X138:   // mapper 38
272	346	prg32(machine, 0);
273	347	break;
274		// mapper 14
275		case REXSOFT_SL1632:
276		state->mmc_extra_bank[2] = 0xfe;
277		state->mmc_extra_bank[3] = 0xff;
278		state->mmc_extra_bank[0] = state->mmc_extra_bank[1] = state->mmc_extra_bank[4] = state->mmc_extra_bank[5] = state->mmc_extra_bank[6] = 0;
279		state->mmc_extra_bank[7] = state->mmc_extra_bank[8] = state->mmc_extra_bank[9] = state->mmc_extra_bank[0xa] = state->mmc_extra_bank[0xb] = 0;
280		state->map14_reg[0] = state->map14_reg[1] = 0;
281		state->mmc_prg_bank[0] = state->mmc_prg_bank[2] = 0xfe;
282		state->mmc_prg_bank[1] = state->mmc_prg_bank[3] = 0xff;
283		state->mmc_latch1 = 0;
284		state->mmc_latch2 = 0x80;
285		state->mmc_prg_base = state->mmc_chr_base = 0;
286		state->mmc_prg_mask = state->mmc_chr_mask = 0xff;
287		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
288		mmc3_set_prg(machine, state->mmc_prg_base, state->mmc_prg_mask);
289		mmc3_set_chr(machine, state->mmc_chr_source, state->mmc_chr_base, state->mmc_chr_mask);
	348	case DIS_74X161X161X32:   // mapper 152
	349	prg16_89ab(machine, 0);
	350	prg16_cdef(machine, state->prg_chunks - 1);
	351	chr8(machine, 0, CHRROM);
290	352	break;
291		// mapper 15
292		case WAIXING_PS2:
293		set_nt_mirroring(machine, PPU_MIRROR_VERT);
294		prg32(machine, 0);
	353	case DIS_74X161X161X32_A:   // mapper 70
	354	prg16_89ab(machine, state->prg_chunks - 2);
	355	prg16_cdef(machine, state->prg_chunks - 1);
295	356	break;
296		// mapper 16, 157
297		case BANDAI_LZ93:
	357	case BANDAI_LZ93:   // mapper 16, 157
298	358	case BANDAI_DATACH:
299	359	state->mmc_latch1 = 0;
300	360	prg16_89ab(machine, 0);
301	361	prg16_cdef(machine, state->prg_chunks - 1);
302	362	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
303	363	break;
304		// mapper 18
305		case JALECO_SS88006:
	364	case BANDAI_JUMP2:   // mapper 153
	365	for (i = 0; i < 8; i++)
	366	state->mmc_reg[i] = 0;
306	367	state->mmc_latch1 = 0;
307	368	prg16_89ab(machine, 0);
308	369	prg16_cdef(machine, state->prg_chunks - 1);
309	370	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	371	state->mmc_latch1 = 0;
	372	fjump2_set_prg(machine);
310	373	break;
311		// mapper 19
312		case NAMCOT_163:
	374	case BANDAI_FCG:
313	375	state->mmc_latch1 = 0;
314	376	prg16_89ab(machine, 0);
315	377	prg16_cdef(machine, state->prg_chunks - 1);
316	378	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
317		set_nt_mirroring(machine, PPU_MIRROR_VERT);
	379	state->mmc_latch1 = 0;
318	380	break;
319		// mapper 32
320		case IREM_G101_A:
	381	case BANDAI_OEKAKIDS:   // mapper 96
	382	prg32(machine, 0);
	383	break;
	384	case BANDAI_KARAOKE:   // mapper 188
	385	prg16_89ab(machine, 0);
	386	prg16_cdef(machine, (state->prg_chunks - 1) ^ 0x08);
	387	break;
	388	case IREM_LROG017:   // mapper 77
	389	prg32(machine, 0);
	390	chr2_2(machine, 0, CHRROM);
	391	chr2_4(machine, 1, CHRROM);
	392	chr2_6(machine, 2, CHRROM);
	393	break;
	394	case IREM_HOLYDIV:   // mapper 78
	395	prg16_89ab(machine, 0);
	396	prg16_cdef(machine, state->prg_chunks - 1);
	397	break;
	398	case IREM_TAM_S1:   // mapper 97
	399	prg16_89ab(machine, state->prg_chunks - 1);
	400	prg16_cdef(machine, 0);
	401	break;
	402	case IREM_G101_A:   // mapper 32
321	403	set_nt_mirroring(machine, PPU_MIRROR_HIGH);  // needed by Major League
322	404	case IREM_G101:
323	405	state->mmc_latch1 = 0;
324	406	prg16_89ab(machine, 0);
	407	prg16_89ab(machine, 0);
325	408	prg16_cdef(machine, state->prg_chunks - 1);
326	409	break;
327		// mapper 33
328		case TAITO_TC0190FMC:
329		// mapper 48
330		case TAITO_TC0190FMCP:
	410	case IREM_H3001:   // mapper 65
	411	prg16_89ab(machine, 0);
	412	prg16_cdef(machine, state->prg_chunks - 1);
	413	break;
	414	case JALECO_SS88006:   // mapper 18
	415	state->mmc_latch1 = 0;
	416	prg16_89ab(machine, 0);
	417	prg16_cdef(machine, state->prg_chunks - 1);
331	418	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	419	break;
	420	case JALECO_JF11:   // mapper 140
	421	case JALECO_JF13:   // mapper 86
	422	case JALECO_JF16:   // mapper 78
	423	case JALECO_JF17:   // mapper 72
	424	case JALECO_JF19:   // mapper 92
	425	prg32(machine, 0);
	426	break;
	427	case KONAMI_VRC1:   // mapper 75
	428	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
332	429	prg16_89ab(machine, 0);
333	430	prg16_cdef(machine, state->prg_chunks - 1);
334	431	break;
335		// mapper 34
336		case STD_BXROM:
	432	case KONAMI_VRC3:   // mapper 73
	433	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	434	prg16_89ab(machine, 0);
	435	prg16_cdef(machine, state->prg_chunks - 1);
	436	break;
	437	case KONAMI_VRC7:   // mapper 85
	438	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	439	prg8_89(machine, 0);
	440	prg8_ab(machine, 0);
	441	prg8_cd(machine, 0);
	442	prg8_ef(machine, 0xff);
	443	break;
	444	case NAMCOT_163:   // mapper 19
	445	state->mmc_latch1 = 0;
	446	prg16_89ab(machine, 0);
	447	prg16_cdef(machine, state->prg_chunks - 1);
	448	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	449	set_nt_mirroring(machine, PPU_MIRROR_VERT);
	450	break;
	451	case SUNSOFT_1:   // mapper 184
337	452	prg32(machine, 0);
338	453	break;
339		// mapper 35
340		case UNL_SC127:
341		prg32(machine, 0xff);
	454	case SUNSOFT_2_A:   // mapper 93
	455	prg16_89ab(machine, 0);
	456	prg16_cdef(machine, state->prg_chunks - 1);
342	457	break;
343		// mapper 37
344		case PAL_ZZ:
	458	case SUNSOFT_2_B:   // mapper 89
	459	prg16_89ab(machine, 0);
	460	prg16_cdef(machine, state->prg_chunks - 1);
	461	set_nt_mirroring(machine, PPU_MIRROR_LOW);
	462	break;
	463	case SUNSOFT_3:   // mapper 67
	464	prg16_89ab(machine, 0);
	465	prg16_cdef(machine, state->prg_chunks - 1);
	466	break;
	467	case TAITO_TC0190FMC:   // mapper 33
	468	case TAITO_TC0190FMCP:   // mapper 48
	469	case TAITO_X1_005:   // mapper 80
	470	case TAITO_X1_005_A:   // mapper 207
	471	case TAITO_X1_017:   // mapper 82
	472	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
	473	prg16_89ab(machine, 0);
	474	prg16_cdef(machine, state->prg_chunks - 1);
	475	break;
	476	// mapper 14
	477	case REXSOFT_SL1632:
	478	state->mmc_extra_bank[2] = 0xfe;
	479	state->mmc_extra_bank[3] = 0xff;
	480	state->mmc_extra_bank[0] = state->mmc_extra_bank[1] = state->mmc_extra_bank[4] = state->mmc_extra_bank[5] = state->mmc_extra_bank[6] = 0;
	481	state->mmc_extra_bank[7] = state->mmc_extra_bank[8] = state->mmc_extra_bank[9] = state->mmc_extra_bank[0xa] = state->mmc_extra_bank[0xb] = 0;
	482	state->map14_reg[0] = state->map14_reg[1] = 0;
345	483	state->mmc_prg_bank[0] = state->mmc_prg_bank[2] = 0xfe;
346	484	state->mmc_prg_bank[1] = state->mmc_prg_bank[3] = 0xff;
347	485	state->mmc_latch1 = 0;
348	486	state->mmc_latch2 = 0x80;
349	487	state->mmc_prg_base = state->mmc_chr_base = 0;
350		state->mmc_prg_mask = 0x07;
351		state->mmc_chr_mask = 0x7f;
	488	state->mmc_prg_mask = state->mmc_chr_mask = 0xff;
352	489	state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
353	490	mmc3_set_prg(machine, state->mmc_prg_base, state->mmc_prg_mask);
354	491	mmc3_set_chr(machine, state->mmc_chr_source, state->mmc_chr_base, state->mmc_chr_mask);
355	492	break;
356		// mapper 38
357		case DIS_74X161X138:
	493	// mapper 15
	494	case WAIXING_PS2:
	495	set_nt_mirroring(machine, PPU_MIRROR_VERT);
358	496	prg32(machine, 0);
359	497	break;
	498
	499	// mapper 35
	500	case UNL_SC127:
	501	prg32(machine, 0xff);
	502	break;
	503
360	504	// mapper 40
361	505	case BTL_SMB2A:
362	506	prg8_67(machine, 0xfe);
r8281	r8282
385	529	break;
386	530	// mapper 44
387	531	case BMC_SUPERBIG_7IN1:
388		// mapper 47
389		case NES_QJ:
390	532	// mapper 49
391	533	case BMC_SUPERHIK_4IN1:
392	534	state->mmc_prg_bank[0] = state->mmc_prg_bank[2] = 0xfe;
r8281	r8282
482	624	prg16_89ab(machine, state->prg_chunks - 1);
483	625	prg16_cdef(machine, state->prg_chunks - 1);
484	626	break;
485		// mapper 65
486		case IREM_H3001:
487		prg16_89ab(machine, 0);
488		prg16_cdef(machine, state->prg_chunks - 1);
489		break;
490		// mapper 66
491		case STD_GXROM:
492		case STD_MXROM:
493		prg32(machine, 0);
494		break;
495		// mapper 67
496		case SUNSOFT_3:
497		prg16_89ab(machine, 0);
498		prg16_cdef(machine, state->prg_chunks - 1);
499		break;
500		// mapper 68
501		case STD_NXROM:
502		state->mmc_reg[0] = state->mmc_latch1 = state->mmc_latch2 = 0;
503		prg16_89ab(machine, 0);
504		prg16_cdef(machine, state->prg_chunks - 1);
505		break;
506		// mapper 69
507		case STD_JXROM:
508		case SUNSOFT_5B:
509		case SUNSOFT_FME7:
510		prg16_89ab(machine, 0);
511		prg16_cdef(machine, state->prg_chunks - 1);
512		break;
513		// mapper 70
514		case DIS_74X161X161X32_A:
515		prg16_89ab(machine, state->prg_chunks - 2);
516		prg16_cdef(machine, state->prg_chunks - 1);
517		break;
518	627	// mapper 71
519	628	case CAMERICA_BF9093:
520	629	case CAMERICA_BF9097:
r8281	r8282
522	631	prg16_89ab(machine, 0);
523	632	prg16_cdef(machine, state->prg_chunks - 1);
524	633	break;
525		// mapper 72
526		case JALECO_JF17:
527		prg16_89ab(machine, 0);
528		prg16_cdef(machine, state->prg_chunks - 1);
529		break;
530		// mapper 73
531		case KONAMI_VRC3:
532		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
533		prg16_89ab(machine, 0);
534		prg16_cdef(machine, state->prg_chunks - 1);
535		break;
536		// mapper 75
537		case KONAMI_VRC1:
538		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
539		prg16_89ab(machine, 0);
540		prg16_cdef(machine, state->prg_chunks - 1);
541		break;
542		// mapper 76
543		case NAMCOT_3446:
544		prg8_89(machine, 0);
545		prg8_ab(machine, 1);
546		//cd is bankable, but this should init all banks just fine.
547		prg16_cdef(machine, state->prg_chunks - 1);
548		chr2_0(machine, 0, CHRROM);
549		chr2_2(machine, 1, CHRROM);
550		chr2_4(machine, 2, CHRROM);
551		chr2_6(machine, 3, CHRROM);
552		state->mmc_latch1 = 0;
553		break;
554		// mapper 77
555		case IREM_LROG017:
556		prg32(machine, 0);
557		chr2_2(machine, 0, CHRROM);
558		chr2_4(machine, 1, CHRROM);
559		chr2_6(machine, 2, CHRROM);
560		break;
561		// mapper 78
562		case IREM_HOLYDIV:
563		case JALECO_JF16:
564		prg16_89ab(machine, 0);
565		prg16_cdef(machine, state->prg_chunks - 1);
566		break;
	634
567	635	// mapper 79 (& 146)
568	636	case AVE_NINA06:
569	637	set_nt_mirroring(machine, PPU_MIRROR_HORZ);
570	638	chr8(machine, 0, CHRROM);
571	639	prg32(machine, 0);
572	640	break;
573		// mapper 80
574		case TAITO_X1_005:
575		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
576		prg16_89ab(machine, 0);
577		prg16_cdef(machine, state->prg_chunks - 1);
578		break;
579		// mapper 82
580		case TAITO_X1_017:
581		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
582		prg16_89ab(machine, 0);
583		prg16_cdef(machine, state->prg_chunks - 1);
584		break;
	641
585	642	// mapper 83
586	643	case CONY_BOARD:
587	644	state->mapper83_reg[9] = 0x0f;
588	645	prg8_cd(machine, 0x1e);
589	646	prg8_ef(machine, 0x1f);
590	647	break;
591		// mapper 85
592		case KONAMI_VRC7:
593		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
594		prg16_89ab(machine, 0);
595		prg16_cdef(machine, state->prg_chunks - 1);
596		break;
597		// mapper 86
598		case JALECO_JF13:
599		prg32(machine, 0);
600		break;
601		// mapper 87
602		case DIS_74X139X74:
603		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
604		prg16_89ab(machine, 0);
605		prg16_cdef(machine, state->prg_chunks - 1);
606		break;
607		// mapper 88
608		case NAMCOT_34X3:
609		prg8_89(machine, 0xc);
610		prg8_ab(machine, 0xd);
611		prg8_cd(machine, 0xe);
612		prg8_ef(machine, 0xf);
613		break;
614		// mapper 89
615		case SUNSOFT_2_B:
616		prg16_89ab(machine, 0);
617		prg16_cdef(machine, state->prg_chunks - 1);
618		set_nt_mirroring(machine, PPU_MIRROR_LOW);
619		break;
	648
620	649	// mapper 91
621	650	case UNL_MK2:
622	651	set_nt_mirroring(machine, PPU_MIRROR_VERT);
623	652	prg16_89ab(machine, state->prg_chunks - 1);
624	653	prg16_cdef(machine, state->prg_chunks - 1);
625	654	break;
626		// mapper 92
627		case JALECO_JF19:
628		prg16_89ab(machine, 0);
629		prg16_cdef(machine, state->prg_chunks - 1);
630		break;
631		// mapper 93
632		case SUNSOFT_2_A:
633		prg16_89ab(machine, 0);
634		prg16_cdef(machine, state->prg_chunks - 1);
635		break;
636		// mapper 94
637		case STD_UN1ROM:
638		prg16_89ab(machine, 0);
639		prg16_cdef(machine, state->prg_chunks - 1);
640		break;
641		// mapper 95
642		case NAMCOT_3425:
643		prg16_89ab(machine, 0);
644		prg16_cdef(machine, state->prg_chunks - 1);
645		break;
646		// mapper 96
647		case BANDAI_OEKAKIDS:
648		prg32(machine, 0);
649		break;
650		// mapper 97
651		case IREM_TAM_S1:
652		prg16_89ab(machine, state->prg_chunks - 1);
653		prg16_cdef(machine, state->prg_chunks - 1);
654		break;
	655
655	656	// mapper 104
656	657	case CAMERICA_GOLDENFIVE:
657	658	prg16_89ab(machine, 0x00);
r8281	r8282
787	788	chr8(machine, 0, state->mmc_chr_source);
788	789	set_nt_mirroring(machine, PPU_MIRROR_VERT);
789	790	break;
790		// mapper 117
791		case JALECO_JF11:
792		prg32(machine, 0);
793		break;
794	791	// mapper 143
795	792	case SACHEN_TCA01:
796	793	prg16_89ab(machine, 0);
r8281	r8282
808	805	chr8(machine, 0, CHRROM);
809	806	set_nt_mirroring(machine, PPU_MIRROR_VERT);
810	807	break;
811		// mapper 152
812		case DIS_74X161X161X32:
813		prg16_89ab(machine, 0);
814		prg16_cdef(machine, state->prg_chunks - 1);
815		chr8(machine, 0, CHRROM);
816		break;
817		// mapper 153
818		case BANDAI_JUMP2:
819		for (i = 0; i < 8; i++)
820		state->mmc_reg[i] = 0;
821		state->mmc_latch1 = 0;
822		prg16_89ab(machine, 0);
823		prg16_cdef(machine, state->prg_chunks - 1);
824		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
825		state->mmc_latch1 = 0;
826		fjump2_set_prg(machine);
827		break;
828		case BANDAI_FCG:
829		state->mmc_latch1 = 0;
830		prg16_89ab(machine, 0);
831		prg16_cdef(machine, state->prg_chunks - 1);
832		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
833		state->mmc_latch1 = 0;
834		break;
835		// mapper 154
836		case NAMCOT_3453:
837		prg16_89ab(machine, state->prg_chunks - 2);
838		prg16_cdef(machine, state->prg_chunks - 1);
839		break;
840	808	// mapper 156
841	809	case OPENCORP_DAOU306:
842	810	prg16_89ab(machine, state->prg_chunks - 2);
r8281	r8282
882	850	case HENGEDIANZI_XJZB:
883	851	prg32(machine, 0);
884	852	break;
885		// mapper 180
886		case UXROM_CC:
887		prg16_89ab(machine, 0);
888		prg16_cdef(machine, 0);
889		break;
890	853	// mapper 182
891	854	case HOSENKAN_BOARD:
892	855	prg32(machine, (state->prg_chunks - 1) >> 1);
893	856	break;
894		// mapper 184
895		case SUNSOFT_1:
896		prg32(machine, 0);
897		break;
	857
898	858	// mapper 187
899	859	case UNL_KOF96:
900	860	state->mmc_prg_bank[0] = state->mmc_prg_bank[2] = 0xfe;
r8281	r8282
908	868	kof96_set_prg(machine, state->mmc_prg_base, state->mmc_prg_mask);
909	869	kof96_set_chr(machine, state->mmc_chr_source, state->mmc_chr_base, state->mmc_chr_mask);
910	870	break;
911		// mapper 188
912		case BANDAI_KARAOKE:
913		prg16_89ab(machine, 0);
914		prg16_cdef(machine, (state->prg_chunks - 1) ^ 0x08);
915		break;
916	871	// mapper 189
917	872	case TXC_TW:
918	873	state->mmc_latch1 = 0;
r8281	r8282
1004	959	mmc3_set_prg(machine, state->mmc_prg_base, state->mmc_prg_mask);
1005	960	mmc3_set_chr(machine, state->mmc_chr_source, state->mmc_chr_base, state->mmc_chr_mask);
1006	961	break;
1007		// mapper 207
1008		case TAITO_X1_005_A:
1009		state->mmc_chr_source = state->chr_chunks ? CHRROM : CHRRAM;
1010		prg16_89ab(machine, 0);
1011		prg16_cdef(machine, state->prg_chunks - 1);
1012		break;
	962
1013	963	// mapper 208
1014	964	case GOUDER_37017:
1015	965	state->mmc_prg_bank[0] = state->mmc_prg_bank[2] = 0xfe;

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