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r8281 Tuesday 15th June, 2010 at 17:25:18 UTC by Fabio Priuli
[NES] some refactorization in CHR RAM handling

[src/mess/includes]	nes.h
[src/mess/machine]	nes.c nes_mmc.c nes_unif.c

src/mess/includes/nes.h

r8280	r8281
203	203	/* load-time cart variables which remain constant */
204	204	UINT16 prg_chunks;      // iNES 2.0 allows for more chunks (a recently dumped multigame cart has 256 chunks of both PRG & CHR!)
205	205	UINT16 chr_chunks;
	206	UINT16 vram_chunks;
206	207	UINT8 trainer;
207	208	UINT8 battery;         // if there is PRG RAM with battery backup
208	209	UINT32 battery_size;

src/mess/machine/nes.c

r8280	r8281
147	147	state_save_register_global_pointer(machine, state->extended_ntram, 0x2000);
148	148	}
149	149
150		printf("SRAM %d PRGRAM %d bank5 %d\n", state->battery_bank5_start, state->prgram_bank5_start, state->prg_bank[4]);
151	150	// there are still some quirk about writes to bank5... I hope to fix them soon. (mappers 34,45,52,246 have both mid_w and WRAM-->check)
152	151	if (state->mmc_write_mid)
153	152	memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, nes_mid_mapper_w);
r8280	r8281
622	621
623	622	state->rom = memory_region(image->machine, "maincpu");
624	623	state->vrom = memory_region(image->machine, "gfx1");
	624
	625	state->vram_chunks = memory_region_length(image->machine, "gfx2") / 0x2000;
625	626	state->vram = memory_region(image->machine, "gfx2");
626	627	// FIXME: this should only be allocated if there is actual wram in the cart (i.e. if state->prg_ram = 1)!
627	628	// or if there is a trainer, I think
r8280	r8281
917	918	/* Free the regions that were allocated by the ROM loader */
918	919	memory_region_free(image->machine, "maincpu");
919	920	memory_region_free(image->machine, "gfx1");
	921	memory_region_free(image->machine, "gfx2");
920	922
921	923	/* Allocate them again, and copy PRG/CHR from temp buffers */
922	924	/* Take care of PRG */
r8280	r8281
928	930	if (state->prg_chunks == 1)
929	931	memcpy(&state->rom[0x14000], &state->rom[0x10000], 0x4000);
930	932
931		/* Take care of CHR */
	933	/* Take care of CHR ROM */
932	934	if (state->chr_chunks)
933	935	{
934	936	memory_region_alloc(image->machine, "gfx1", state->chr_chunks * 0x2000, 0);
935	937	state->vrom = memory_region(image->machine, "gfx1");
936		memcpy(&state->vrom[0x00000], &temp_prg[0x00000], state->chr_chunks * 0x2000);
	938	memcpy(&state->vrom[0x00000], &temp_chr[0x00000], state->chr_chunks * 0x2000);
937	939	}
938	940
939		state->vram = memory_region(image->machine, "gfx2");
	941	/* Take care of CHR RAM */
	942	if (state->vram_chunks)
	943	{
	944	memory_region_alloc(image->machine, "gfx2", state->vram_chunks * 0x2000, 0);
	945	state->vram = memory_region(image->machine, "gfx2");
	946	}
	947
940	948	// FIXME: this should only be allocated if there is actual wram in the cart (i.e. if state->prg_ram = 1)!
941	949	state->wram_size = 0x10000;
942	950	state->wram = auto_alloc_array(image->machine, UINT8, state->wram_size);
r8280	r8281
989	997	{
990	998	UINT32 prg_size = image_get_software_region_length(image, "prg");
991	999	UINT32 chr_size = image_get_software_region_length(image, "chr");
	1000	UINT32 vram_size = image_get_software_region_length(image, "vram");
992	1001
993	1002	/* Free the regions that were allocated by the ROM loader */
994	1003	memory_region_free(image->machine, "maincpu");
995	1004	memory_region_free(image->machine, "gfx1");
	1005	memory_region_free(image->machine, "gfx2");
996	1006
997	1007	/* Allocate them again with the proper size */
998	1008	memory_region_alloc(image->machine, "maincpu", 0x10000 + prg_size, 0);
r8280	r8281
1006	1016	if (chr_size)
1007	1017	memory_region_alloc(image->machine, "gfx1", chr_size, 0);
1008	1018
	1019	if (vram_size)
	1020	memory_region_alloc(image->machine, "gfx2", vram_size, 0);
	1021
1009	1022	state->rom = memory_region(image->machine, "maincpu");
1010	1023	state->vrom = memory_region(image->machine, "gfx1");
1011	1024	state->vram = memory_region(image->machine, "gfx2");
r8280	r8281
1017	1030
1018	1031	state->prg_chunks = prg_size / 0x4000;
1019	1032	state->chr_chunks = chr_size / 0x2000;
	1033	state->vram_chunks = vram_size / 0x2000;
1020	1034
1021	1035	state->format = 3;
1022	1036	state->mapper = 0;      // this allows us to set up memory handlers without duplicating code (for the moment)
r8280	r8281
1054	1068	printf("PCB Feature: %s\n", image_get_feature(image));
1055	1069	printf("PRG chunks: %d\n", state->prg_chunks);
1056	1070	printf("CHR chunks: %d\n", state->chr_chunks);
	1071	printf("VRAM: Present %s, size: %d\n", state->vram_chunks ? "Yes" : "No", vram_size);
1057	1072	printf("NVWRAM: Present %s, size: %d\n", state->battery ? "Yes" : "No", state->battery_size);
1058	1073	printf("WRAM:   Present %s, size: %d\n", state->prg_ram ? "Yes" : "No", state->wram_size);
1059	1074	#endif

src/mess/machine/nes_unif.c

r8280	r8281
118	118	{ "UNL-KS7017",                 0,    0, CHRRAM_0,  NT_X,  UNSUPPORTED_BOARD},
119	119	{ "UNL-KS7032",                 0,    0, CHRRAM_0,  NT_X,  UNSUPPORTED_BOARD}, //  mapper 142
120	120	{ "UNL-DANCE",                  0,    0, CHRRAM_0,  NT_X,  UNSUPPORTED_BOARD},
121		{ "UNL-603-5052",               0,    0, 0,         0,     UNSUPPORTED_BOARD}, // mapper 238?
	121	{ "UNL-603-5052",               0,    0, CHRRAM_0,  NT_X,  UNSUPPORTED_BOARD}, // mapper 238?
122	122	{ "UNL-EDU2000",               32,    0, CHRRAM_8,  NT_Y,  UNSUPPORTED_BOARD /*UNL_EDU2K*/},
123	123	{ "UNL-H2288",                  0,    0, CHRRAM_0,  NT_X,  UNSUPPORTED_BOARD},   // mapper 123
124	124	{ "UNL-SHERO",                  0,    0, CHRRAM_8,  NT_4SCR_2K, UNSUPPORTED_BOARD /*SACHEN_SHERO*/},
r8280	r8281
1312	1312
1313	1313	state->mapper = 0;   // this allows us to set up memory handlers without duplicating code (for the moment)
1314	1314	state->pcb_id = unif_board->board_idx;
1315		state->battery = unif_board->nvwram;   // we should implement WRAM banks based on the size of this...
	1315	state->battery = unif_board->nvwram;   // we should implement battery banks based on the size of this...
1316	1316	state->battery_size = NES_BATTERY_SIZE; // FIXME: we should allow for smaller battery!
1317	1317	state->prg_ram = unif_board->wram;   // we should implement WRAM banks based on the size of this...
1318	1318	// state->hard_mirroring = unif_board->nt;
1319	1319	state->four_screen_vram = (unif_board->nt == NT_4SCR_2K || unif_board->nt == NT_4SCR_4K) ? 1 : 0;
	1320
	1321	if (unif_board->chrram <= CHRRAM_8)
	1322	state->vram_chunks = 1;
	1323	else if (unif_board->chrram == CHRRAM_16)
	1324	state->vram_chunks = 2;
	1325	else if (unif_board->chrram == CHRRAM_32)
	1326	state->vram_chunks = 4;
1320	1327	}

src/mess/machine/nes_mmc.c

r8280	r8281
442	442
443	443	/* CHR ROM in 1K, 2K, 4K or 8K blocks */
444	444
	445	// this can be probably removed later, but it is useful while testing xml and unf handling with VRAM & VROM
	446	INLINE void chr_sanity_check( running_machine *machine, int source )
	447	{
	448	nes_state *state = (nes_state *)machine->driver_data;
	449
	450	if (source == CHRRAM && state->vram == NULL)
	451	fatalerror("CHRRAM bankswitch with no VRAM");
	452
	453	if (source == CHRROM && state->vrom == NULL)
	454	fatalerror("CHRROM bankswitch with no VROM");
	455	}
	456
445	457	static void chr8( running_machine *machine, int bank, int source )
446	458	{
447	459	nes_state *state = (nes_state *)machine->driver_data;
448	460	int i;
449	461
450		bank &= (state->chr_chunks - 1);
451		for (i = 0; i < 8; i++)
	462	chr_sanity_check(machine, source);
	463
	464	if (source == CHRRAM)
452	465	{
453		state->chr_map[i].source = source;
454		state->chr_map[i].origin = (bank * 0x2000) + (i * 0x400); // for save state uses!
455
456		if (source == CHRRAM)
	466	bank &= (state->vram_chunks - 1);
	467	for (i = 0; i < 8; i++)
	468	{
	469	state->chr_map[i].source = source;
	470	state->chr_map[i].origin = (bank * 0x2000) + (i * 0x400); // for save state uses!
457	471	state->chr_map[i].access = &state->vram[state->chr_map[i].origin];
458		else
	472	}
	473	}
	474	else
	475	{
	476	bank &= (state->chr_chunks - 1);
	477	for (i = 0; i < 8; i++)
	478	{
	479	state->chr_map[i].source = source;
	480	state->chr_map[i].origin = (bank * 0x2000) + (i * 0x400); // for save state uses!
459	481	state->chr_map[i].access = &state->vrom[state->chr_map[i].origin];
	482	}
460	483	}
461	484	}
462	485
r8280	r8281
465	488	nes_state *state = (nes_state *)machine->driver_data;
466	489	int i;
467	490
468		bank &= ((state->chr_chunks << 1) - 1);
469		for (i = 0; i < 4; i++)
	491	chr_sanity_check(machine, source);
	492
	493	if (source == CHRRAM)
470	494	{
471		state->chr_map[i + start].source = source;
472		state->chr_map[i + start].origin = (bank * 0x1000) + (i * 0x400); // for save state uses!
473
474		if (source == CHRRAM)
	495	bank &= ((state->vram_chunks << 1) - 1);
	496	for (i = 0; i < 4; i++)
	497	{
	498	state->chr_map[i + start].source = source;
	499	state->chr_map[i + start].origin = (bank * 0x1000) + (i * 0x400); // for save state uses!
475	500	state->chr_map[i + start].access = &state->vram[state->chr_map[i + start].origin];
476		else
	501	}
	502	}
	503	else
	504	{
	505	bank &= ((state->chr_chunks << 1) - 1);
	506	for (i = 0; i < 4; i++)
	507	{
	508	state->chr_map[i + start].source = source;
	509	state->chr_map[i + start].origin = (bank * 0x1000) + (i * 0x400); // for save state uses!
477	510	state->chr_map[i + start].access = &state->vrom[state->chr_map[i + start].origin];
	511	}
478	512	}
479	513	}
480	514
r8280	r8281
493	527	nes_state *state = (nes_state *)machine->driver_data;
494	528	int i;
495	529
496		bank &= ((state->chr_chunks << 2) - 1);
497		for (i = 0; i < 2; i++)
	530	chr_sanity_check(machine, source);
	531
	532	if (source == CHRRAM)
498	533	{
499		state->chr_map[i + start].source = source;
500		state->chr_map[i + start].origin = (bank * 0x800) + (i * 0x400);
501
502		if (source == CHRRAM)
	534	bank &= ((state->vram_chunks << 2) - 1);
	535	for (i = 0; i < 2; i++)
	536	{
	537	state->chr_map[i + start].source = source;
	538	state->chr_map[i + start].origin = (bank * 0x800) + (i * 0x400); // for save state uses!
503	539	state->chr_map[i + start].access = &state->vram[state->chr_map[i + start].origin];
504		else
	540	}
	541	}
	542	else
	543	{
	544	bank &= ((state->chr_chunks << 2) - 1);
	545	for (i = 0; i < 2; i++)
	546	{
	547	state->chr_map[i + start].source = source;
	548	state->chr_map[i + start].origin = (bank * 0x800) + (i * 0x400); // for save state uses!
505	549	state->chr_map[i + start].access = &state->vrom[state->chr_map[i + start].origin];
	550	}
506	551	}
507	552	}
508	553
r8280	r8281
530	575	{
531	576	nes_state *state = (nes_state *)machine->driver_data;
532	577
533		state->chr_map[start].source = source;
534		bank &= ((state->chr_chunks << 3) - 1);
535		state->chr_map[start].origin = bank * 0x400;
536
	578	chr_sanity_check(machine, source);
	579
537	580	if (source == CHRRAM)
	581	{
	582	bank &= ((state->vram_chunks << 3) - 1);
	583	state->chr_map[start].source = source;
	584	state->chr_map[start].origin = (bank * 0x400); // for save state uses!
538	585	state->chr_map[start].access = &state->vram[state->chr_map[start].origin];
	586	}
539	587	else
	588	{
	589	bank &= ((state->chr_chunks << 3) - 1);
	590	state->chr_map[start].source = source;
	591	state->chr_map[start].origin = (bank * 0x400); // for save state uses!
540	592	state->chr_map[start].access = &state->vrom[state->chr_map[start].origin];
	593	}
541	594	}
542	595
543	596	static void chr1_0 (running_machine *machine, int bank, int source)

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