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r14847 Tuesday 3rd April, 2012 at 11:36:38 UTC by Miodrag Milanović
little cleanup (no whatsnew)
[src/mame/drivers]acommand.c aristmk4.c blitz68k.c firefox.c limenko.c peplus.c royalmah.c spool99.c vcombat.c
[src/mess/drivers]fp6000.c ip20.c jr100.c mmodular.c mz2500.c pc6001.c pc9801.c sgi_ip2.c

src/mame/drivers/firefox.c
r14846r14847
398398
399399WRITE8_MEMBER(firefox_state::nvram_w)
400400{
401   m_nvram_1c->write(*&space, offset, data >> 4);
402   m_nvram_1d->write(*&space, offset, data & 0xf);
401   m_nvram_1c->write(space, offset, data >> 4);
402   m_nvram_1d->write(space, offset, data & 0xf);
403403}
404404
405405READ8_MEMBER(firefox_state::nvram_r)
406406{
407   return (m_nvram_1c->read(*&space, offset) << 4) | (m_nvram_1d->read(*&space, offset) & 0x0f);
407   return (m_nvram_1c->read(space, offset) << 4) | (m_nvram_1d->read(space, offset) & 0x0f);
408408}
409409
410410WRITE8_MEMBER(firefox_state::novram_recall_w)
src/mame/drivers/aristmk4.c
r14846r14847
526526{
527527   /* uncomment this code once RTC is fixed */
528528
529   //return machine().device<mc146818_device>("rtc")->read(*&space,1);
529   //return machine().device<mc146818_device>("rtc")->read(space,1);
530530   return 0;   // OK for now, the aussie version has no RTC on the MB so this is valid.
531531}
532532
r14846r14847
536536   mc146818_device *mc = machine().device<mc146818_device>("rtc");
537537   if(m_rtc_data_strobe)
538538   {
539      mc->write(*&space,1,data);
539      mc->write(space,1,data);
540540      //logerror("rtc protocol write data: %02X\n",data);
541541   }
542542   else
543543   {
544      mc->write(*&space,0,data);
544      mc->write(space,0,data);
545545      //logerror("rtc protocol write address: %02X\n",data);
546546   }
547547}
src/mame/drivers/acommand.c
r14846r14847
321321         return input_port_read(machine(), "IN0");
322322      case 0x0014/2:
323323      case 0x0016/2:
324         return machine().device<okim6295_device>("oki1")->read(*&space,0);
324         return machine().device<okim6295_device>("oki1")->read(space,0);
325325      case 0x0018/2:
326326      case 0x001a/2:
327         return machine().device<okim6295_device>("oki2")->read(*&space,0);
327         return machine().device<okim6295_device>("oki2")->read(space,0);
328328      case 0x0040/2:
329329         /*
330330                "Upper switch / Under Switch"
r14846r14847
413413         if(ACCESSING_BITS_0_7)
414414         {
415415            okim6295_device *oki1 = machine().device<okim6295_device>("oki1");
416            oki1->write(*&space,0,data);
416            oki1->write(space,0,data);
417417         }
418418         break;
419419      case 0x18/2:
r14846r14847
421421         if(ACCESSING_BITS_0_7)
422422         {
423423            okim6295_device *oki2 = machine().device<okim6295_device>("oki2");
424            oki2->write(*&space,0,data);
424            oki2->write(space,0,data);
425425         }
426426         break;
427427      case 0x1c/2:
src/mame/drivers/vcombat.c
r14846r14847
311311      return;
312312
313313   if (m_crtc_select == 0)
314      crtc->address_w(*&space, 0, data >> 8);
314      crtc->address_w(space, 0, data >> 8);
315315   else
316      crtc->register_w(*&space, 0, data >> 8);
316      crtc->register_w(space, 0, data >> 8);
317317
318318   m_crtc_select ^= 1;
319319}
src/mame/drivers/spool99.c
r14846r14847
178178//          case 0xafe5: return 1;
179179//          case 0xafe6: return 1;
180180         case 0xafe7: return machine().device<eeprom_device>("eeprom")->read_bit();
181         case 0xaff8: return machine().device<okim6295_device>("oki")->read(*&space,0);
181         case 0xaff8: return machine().device<okim6295_device>("oki")->read(space,0);
182182      }
183183   }
184184//  printf("%04x %d\n",offset+0xaf00,io_switch);
r14846r14847
239239         case 0xa725: return input_port_read(machine(),"HOLD3");
240240         case 0xa726: return input_port_read(machine(),"HOLD4");
241241         case 0xa727: return input_port_read(machine(),"HOLD2");
242         case 0xa780: return machine().device<okim6295_device>("oki")->read(*&space,0);
242         case 0xa780: return machine().device<okim6295_device>("oki")->read(space,0);
243243         case 0xa7a0: return input_port_read(machine(),"HOLD1");
244244         case 0xa7a1: return input_port_read(machine(),"HOLD5");
245245         case 0xa7a2: return input_port_read(machine(),"START");
src/mame/drivers/limenko.c
r14846r14847
224224   if(m_spotty_sound_cmd == 0xf7)
225225      return soundlatch_r(space,0);
226226   else
227      return machine().device<okim6295_device>("oki")->read(*&space,0);
227      return machine().device<okim6295_device>("oki")->read(space,0);
228228}
229229
230230static ADDRESS_MAP_START( spotty_sound_io_map, AS_IO, 8, limenko_state )
src/mame/drivers/blitz68k.c
r14846r14847
841841{
842842   mc6845_device *mc6845 = machine().device<mc6845_device>("crtc");
843843   if (offset)
844      return mc6845->register_r(*&space, 0);
844      return mc6845->register_r(space, 0);
845845   else
846      return mc6845->status_r(*&space, 0);
846      return mc6845->status_r(space, 0);
847847}
848848
849849WRITE8_MEMBER(blitz68k_state::crtc_w)
850850{
851851   mc6845_device *mc6845 = machine().device<mc6845_device>("crtc");
852852   if (offset)
853      mc6845->register_w(*&space, 0, data);
853      mc6845->register_w(space, 0, data);
854854   else
855      mc6845->address_w(*&space, 0, data);
855      mc6845->address_w(space, 0, data);
856856}
857857
858858static WRITE16_DEVICE_HANDLER( crtc_lpen_w )
src/mame/drivers/peplus.c
r14846r14847
369369   m_bg_tilemap->mark_tile_dirty(m_vid_address);
370370
371371   /* An access here triggers a device read !*/
372   machine().device<mc6845_device>("crtc")->register_r(*&space, 0);
372   machine().device<mc6845_device>("crtc")->register_r(space, 0);
373373}
374374
375375WRITE8_MEMBER(peplus_state::peplus_io_w)
src/mame/drivers/royalmah.c
r14846r14847
11851185   {
11861186      msm6242_device *rtc = machine().device<msm6242_device>("rtc");
11871187
1188      return rtc->read(*&space, offset & 0xf);
1188      return rtc->read(space, offset & 0xf);
11891189   }
11901190
11911191   logerror("%04X: unmapped IO read at %04X\n", cpu_get_pc(&space.device()), offset);
r14846r14847
12071207   {
12081208      msm6242_device *rtc = machine().device<msm6242_device>("rtc");
12091209
1210      rtc->write(*&space, offset & 0xf,data);
1210      rtc->write(space, offset & 0xf,data);
12111211      return;
12121212   }
12131213
src/mess/drivers/pc9801.c
r14846r14847
651651   }
652652   else // odd
653653   {
654      return machine().device<i8255_device>("ppi8255_sys")->read(*&space, (offset & 6) >> 1);
654      return machine().device<i8255_device>("ppi8255_sys")->read(space, (offset & 6) >> 1);
655655   }
656656}
657657
r14846r14847
666666   }
667667   else // odd
668668   {
669      machine().device<i8255_device>("ppi8255_sys")->write(*&space, (offset & 6) >> 1,data);
669      machine().device<i8255_device>("ppi8255_sys")->write(space, (offset & 6) >> 1,data);
670670   }
671671}
672672
r14846r14847
675675
676676   if((offset & 1) == 0)
677677   {
678      return machine().device<i8255_device>("ppi8255_prn")->read(*&space, (offset & 6) >> 1);
678      return machine().device<i8255_device>("ppi8255_prn")->read(space, (offset & 6) >> 1);
679679   }
680680   else // odd
681681   {
r14846r14847
704704{
705705   if((offset & 1) == 0)
706706   {
707      machine().device<i8255_device>("ppi8255_prn")->write(*&space, (offset & 6) >> 1,data);
707      machine().device<i8255_device>("ppi8255_prn")->write(space, (offset & 6) >> 1,data);
708708   }
709709   else // odd
710710   {
r14846r14847
729729   }
730730   else // odd
731731   {
732      return machine().device<i8255_device>("ppi8255_fdd")->read(*&space, (offset & 6) >> 1);
732      return machine().device<i8255_device>("ppi8255_fdd")->read(space, (offset & 6) >> 1);
733733   }
734734}
735735
r14846r14847
746746   }
747747   else // odd
748748   {
749      machine().device<i8255_device>("ppi8255_fdd")->write(*&space, (offset & 6) >> 1,data);
749      machine().device<i8255_device>("ppi8255_fdd")->write(space, (offset & 6) >> 1,data);
750750   }
751751}
752752
r14846r14847
755755
756756   if((offset & 1) == 0)
757757   {
758      return m_hgdc1->read(*&space, (offset & 2) >> 1); // upd7220 character port
758      return m_hgdc1->read(space, (offset & 2) >> 1); // upd7220 character port
759759   }
760760   else // odd
761761   {
r14846r14847
769769
770770   if((offset & 1) == 0)
771771   {
772      m_hgdc1->write(*&space, (offset & 2) >> 1,data); // upd7220 character port
772      m_hgdc1->write(space, (offset & 2) >> 1,data); // upd7220 character port
773773   }
774774   else // odd
775775   {
r14846r14847
891891      {
892892         case 0x00:
893893         case 0x02:
894            return m_hgdc2->read(*&space, (offset & 2) >> 1);
894            return m_hgdc2->read(space, (offset & 2) >> 1);
895895         /* bitmap palette clut read */
896896         case 0x04:
897897            return m_vram_disp & 1;
r14846r14847
932932      {
933933         case 0x00:
934934         case 0x02:
935            m_hgdc2->write(*&space, (offset & 2) >> 1,data);
935            m_hgdc2->write(space, (offset & 2) >> 1,data);
936936            return;
937937         case 0x04: m_vram_disp = data & 1; return;
938938         case 0x06:
939939            m_vram_bank = data & 1;
940            //m_hgdc2->bank_w(*&space, 0,(data & 1) << 2); //TODO: check me
940            //m_hgdc2->bank_w(space, 0,(data & 1) << 2); //TODO: check me
941941            return;
942942         /* bitmap palette clut write */
943943         case 0x08:
r14846r14847
10051005   {
10061006      switch((offset & 6) + 1)
10071007      {
1008         case 1: return m_sio->data_r(*&space, 0);
1009         case 3: return m_sio->status_r(*&space, 0);
1008         case 1: return m_sio->data_r(space, 0);
1009         case 3: return m_sio->status_r(space, 0);
10101010      }
10111011      printf("Read to undefined port [%02x]\n",offset+0x90);
10121012      return 0xff;
r14846r14847
10431043   {
10441044      switch((offset & 6) + 1)
10451045      {
1046         case 1: m_sio->data_w(*&space, 0, data); return;
1047         case 3: m_sio->control_w(*&space, 0, data); return;
1046         case 1: m_sio->data_w(space, 0, data); return;
1047         case 3: m_sio->control_w(space, 0, data); return;
10481048      }
10491049      printf("Write to undefined port [%02x] <- %02x\n",offset+0x90,data);
10501050   }
src/mess/drivers/pc6001.c
r14846r14847
777777      return res;
778778   }
779779
780   return m_ppi->read(*&space, offset);
780   return m_ppi->read(space, offset);
781781}
782782
783783WRITE8_MEMBER(pc6001_state::nec_ppi8255_w)
r14846r14847
811811            memory_set_bankptr(machine(), "bank1", &gfx_data[0]);
812812      }
813813   }
814   m_ppi->write(*&space,offset,data);
814   m_ppi->write(space,offset,data);
815815}
816816
817817static ADDRESS_MAP_START(pc6001_map, AS_PROGRAM, 8, pc6001_state )
r14846r14847
11631163         }
11641164      }
11651165   }
1166   m_ppi->write(*&space,offset,data);
1166   m_ppi->write(space,offset,data);
11671167}
11681168
11691169static void vram_bank_change(running_machine &machine,UINT8 vram_bank)
r14846r14847
15971597            memory_set_bankptr(machine(), "bank1", &gfx_data[0]);
15981598      }
15991599   }
1600   m_ppi->write(*&space,offset,data);
1600   m_ppi->write(space,offset,data);
16011601}
16021602
16031603
src/mess/drivers/mz2500.c
r14846r14847
14421442{
14431443   UINT8 rtc_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
14441444
1445   return m_rtc->read(*&space, rtc_index);
1445   return m_rtc->read(space, rtc_index);
14461446}
14471447
14481448WRITE8_MEMBER(mz2500_state::rp5c15_8_w)
14491449{
14501450   UINT8 rtc_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
14511451
1452   m_rtc->write(*&space, rtc_index, data);
1452   m_rtc->write(space, rtc_index, data);
14531453}
14541454
14551455
src/mess/drivers/fp6000.c
r14846r14847
152152{
153153
154154   m_crtc_index = data;
155   m_mc6845->address_w(*&space, offset, data);
155   m_mc6845->address_w(space, offset, data);
156156}
157157
158158WRITE8_MEMBER(fp6000_state::fp6000_6845_data_w)
159159{
160160
161161   m_crtc_vreg[m_crtc_index] = data;
162   m_mc6845->register_w(*&space, offset, data);
162   m_mc6845->register_w(space, offset, data);
163163}
164164
165165static ADDRESS_MAP_START(fp6000_map, AS_PROGRAM, 16, fp6000_state )
src/mess/drivers/jr100.c
r14846r14847
7474      }
7575   }
7676   via6522_device *via = machine().device<via6522_device>("via");
77   via->write(*&space,offset,data);
77   via->write(space,offset,data);
7878}
7979
8080static ADDRESS_MAP_START(jr100_mem, AS_PROGRAM, 8, jr100_state )
src/mess/drivers/sgi_ip2.c
r14846r14847
170170READ8_MEMBER(sgi_ip2_state::sgi_ip2_clock_ctl_r)
171171{
172172   mc146818_device *rtc = machine().device<mc146818_device>("rtc");
173   UINT8 ret = rtc->read(*&space, 1);
173   UINT8 ret = rtc->read(space, 1);
174174   verboselog(machine(), 1, "sgi_ip2_clock_ctl_r: %02x\n", ret);
175175   return ret;
176176}
r14846r14847
179179{
180180   verboselog(machine(), 1, "sgi_ip2_clock_ctl_w: %02x\n", data);
181181   mc146818_device *rtc = machine().device<mc146818_device>("rtc");
182   rtc->write(*&space, 1, data);
182   rtc->write(space, 1, data);
183183}
184184
185185READ8_MEMBER(sgi_ip2_state::sgi_ip2_clock_data_r)
186186{
187187   mc146818_device *rtc = machine().device<mc146818_device>("rtc");
188   UINT8 ret = rtc->read(*&space, 0);
188   UINT8 ret = rtc->read(space, 0);
189189
190190   verboselog(machine(), 1, "sgi_ip2_clock_data_r: %02x\n", ret);
191191   return ret;
r14846r14847
195195{
196196   verboselog(machine(), 1, "sgi_ip2_clock_data_w: %02x\n", data);
197197   mc146818_device *rtc = machine().device<mc146818_device>("rtc");
198   rtc->write(*&space, 0, data);
198   rtc->write(space, 0, data);
199199}
200200
201201
src/mess/drivers/mmodular.c
r14846r14847
237237   if (BIT(data,1)) {
238238      hd44780_device *hd44780 = machine().device<hd44780_device>("hd44780");
239239      if (BIT(data,0)) {
240         hd44780->data_write(*&space, 128, lcd_char);
240         hd44780->data_write(space, 128, lcd_char);
241241      } else {
242         hd44780->control_write(*&space, 128, lcd_char);
242         hd44780->control_write(space, 128, lcd_char);
243243      }
244244   }
245245
r14846r14847
328328   {
329329      hd44780_device *hd44780 = machine().device<hd44780_device>("hd44780");
330330      if(BIT(sfortea_latch,0)) {
331         hd44780->data_write(*&space, 128, data);
331         hd44780->data_write(space, 128, data);
332332         logerror("LCD DTA = %02x\n",data);
333333      } else {
334334         if (BIT(data,7)) {
335335            if ((data & 0x7f) >= 0x40) data -= 56;  // adjust for 16x1 display as 2 sets of 8
336336         }
337         hd44780->control_write(*&space, 128, data);
337         hd44780->control_write(space, 128, data);
338338         logerror("LCD CMD = %02x\n",data);
339339      }
340340   }
r14846r14847
345345   hd44780_device *hd44780 = machine().device<hd44780_device>("hd44780");
346346
347347   if (offset) {
348      hd44780->data_write(*&space, 128, data);
348      hd44780->data_write(space, 128, data);
349349   } else {
350      hd44780->control_write(*&space, 128, data);
350      hd44780->control_write(space, 128, data);
351351   }
352352}
353353
r14846r14847
393393      if (BIT(data,7)) {
394394         if ((data & 0x7f) >= 0x40) data -= 56;  // adjust for 16x1 display as 2 sets of 8
395395      }
396      hd44780->control_write(*&space, 128, data);
396      hd44780->control_write(space, 128, data);
397397//      logerror("Control %02x\n", data);
398398//      printf("Control %02x\n", data);
399399   } else {
400      hd44780->data_write(*&space, 128, data);
400      hd44780->data_write(space, 128, data);
401401//      printf("LCDdata %04x [%c]\n", data,data);
402402//      logerror("LCDdata %04x [%c]\n", data,data);
403403   }
src/mess/drivers/ip20.c
r14846r14847
165165   case 0x0d00:
166166      verboselog(machine(), 2, "HPC DUART0 Channel B Control Read\n" );
167167//      return 0x00000004;
168      return 0x7c; //scc->reg_r(*&space, 0);
168      return 0x7c; //scc->reg_r(space, 0);
169169   case 0x0d04:
170170      verboselog(machine(), 2, "HPC DUART0 Channel B Data Read\n" );
171171//      return 0;
172172      scc = machine().device<scc8530_t>("scc");
173      return scc->reg_r(*&space, 2);
173      return scc->reg_r(space, 2);
174174   case 0x0d08:
175175      verboselog(machine(), 2, "HPC DUART0 Channel A Control Read (%08x)\n", mem_mask    );
176176//      return 0x40;
177      return 0x7c; //scc->reg_r(*&space, 1);
177      return 0x7c; //scc->reg_r(space, 1);
178178   case 0x0d0c:
179179      verboselog(machine(), 2, "HPC DUART0 Channel A Data Read\n" );
180180//      return 0;
181181      scc = machine().device<scc8530_t>("scc");
182      return scc->reg_r(*&space, 3);
182      return scc->reg_r(space, 3);
183183   case 0x0d10:
184184//      verboselog(machine, 2, "HPC DUART1 Channel B Control Read\n" );
185185      return 0x00000004;
r14846r14847
361361   case 0x0d00:
362362      verboselog(machine(), 2, "HPC DUART0 Channel B Control Write: %08x (%08x)\n", data, mem_mask );
363363      scc = machine().device<scc8530_t>("scc");
364      scc->reg_w(*&space, 0, data);
364      scc->reg_w(space, 0, data);
365365      break;
366366   case 0x0d04:
367367      verboselog(machine(), 2, "HPC DUART0 Channel B Data Write: %08x (%08x)\n", data, mem_mask );
368368      scc = machine().device<scc8530_t>("scc");
369      scc->reg_w(*&space, 2, data);
369      scc->reg_w(space, 2, data);
370370      break;
371371   case 0x0d08:
372372      verboselog(machine(), 2, "HPC DUART0 Channel A Control Write: %08x (%08x)\n", data, mem_mask );
373373      scc = machine().device<scc8530_t>("scc");
374      scc->reg_w(*&space, 1, data);
374      scc->reg_w(space, 1, data);
375375      break;
376376   case 0x0d0c:
377377      verboselog(machine(), 2, "HPC DUART0 Channel A Data Write: %08x (%08x)\n", data, mem_mask );
378378      scc = machine().device<scc8530_t>("scc");
379      scc->reg_w(*&space, 3, data);
379      scc->reg_w(space, 3, data);
380380      break;
381381   case 0x0d10:
382382      if( ( data & 0x000000ff ) >= 0x00000020 )

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