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r9907 Monday 3rd January, 2011 at 15:43:41 UTC by Curt Coder
Added skeleton driver for Osborne 4 Vixen.
[docs]messnew.txt
[src/emu/drivers]xtal.h
[src/mess]mess.mak messdriv.c
[src/mess/drivers]vixen.c*
[src/mess/includes]vixen.h*

src/emu/drivers/xtal.h
r9906r9907
135135   XTAL_21_4772MHz    = 21477270,      /* BMC bowling, some Data East 90's games, Vtech Socrates; NTSC color subcarrier * 6 */
136136   XTAL_22MHz        = 22000000,
137137   XTAL_22_1184MHz      = 22118400,
138   XTAL_23_9616MHz      = 23961600,      /* Osborne 4 (Vixen) */
138139   XTAL_24MHz        = 24000000,      /* Mario, 80's Data East games, 80's Konami games */
139140   XTAL_24_576MHz     = 24576000,      /* Pole Position h/w, Model 3 CPU board */
140141   XTAL_24_8832MHz    = 24883200,      /* DEC VT100 */
src/mess/includes/vixen.h
r0r9907
1#pragma once
2
3#ifndef __VIXEN__
4#define __VIXEN__
5
6#define Z8400A_TAG      "5f"
7#define FDC1797_TAG      "5n"
8#define P8155H_TAG      "2n"
9#define DISCRETE_TAG   "discrete"
10#define SCREEN_TAG      "screen"
11
12class vixen_state : public driver_device
13{
14public:
15   vixen_state(running_machine &machine, const driver_device_config_base &config)
16      : driver_device(machine, config),
17        m_maincpu(*this, Z8400A_TAG),
18        m_fdc(*this, FDC1797_TAG),
19        m_discrete(*this, DISCRETE_TAG),
20        m_ram(*this, "messram"),
21        m_floppy0(*this, FLOPPY_0),
22        m_floppy1(*this, FLOPPY_1)
23   { }
24
25   required_device<cpu_device> m_maincpu;
26   required_device<device_t> m_fdc;
27   required_device<device_t> m_discrete;
28   required_device<device_t> m_ram;
29   required_device<device_t> m_floppy0;
30   required_device<device_t> m_floppy1;
31
32   virtual void machine_start();
33   virtual void machine_reset();
34
35   virtual void video_start();
36   virtual bool video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
37
38   void update_interrupt();
39
40   DECLARE_READ8_MEMBER( status_r );
41   DECLARE_WRITE8_MEMBER( cmd_w );
42   DECLARE_READ8_MEMBER( i8155_pa_r );
43   DECLARE_WRITE8_MEMBER( i8155_pb_w );
44   DECLARE_WRITE8_MEMBER( i8155_pc_w );
45   DECLARE_WRITE_LINE_MEMBER( fdint_w );
46
47   // memory state
48   int m_reset;
49
50   // keyboard state
51   UINT8 m_col;
52
53   // interrupt state
54   UINT8 m_cmd;
55   int m_fdint;
56   int m_vsync;
57
58   // video state
59   int m_alt;
60   int m_256;
61   UINT8 *m_video_ram;
62   const UINT8 *m_sync_rom;
63   const UINT8 *m_char_rom;
64};
65
66#endif
src/mess/messdriv.c
r9906r9907
18321832   DRIVER( mikrolab )
18331833   DRIVER( dim68k )
18341834   DRIVER( okean240 )
1835   DRIVER( vixen )
18351836   DRIVER( pt68k4 )
18361837   
18371838#endif /* DRIVER_RECURSIVE */
src/mess/mess.mak
r9906r9907
12201220   $(MESS_DRIVERS)/osborne1.o   \
12211221   $(MESS_MACHINE)/osborne1.o   \
12221222   $(MESS_DRIVERS)/osbexec.o   \
1223   $(MESS_DRIVERS)/vixen.o      \
12231224
12241225$(MESSOBJ)/osi.a:            \
12251226   $(MESS_DRIVERS)/osi.o      \
src/mess/drivers/vixen.c
r0r9907
1/*
2
3Osborne-4 "Vixen"
4
5Main PCB Layout
6---------------
7
8TODO
9
10Notes:
11    Relevant IC's shown.
12
13    CPU      - Zilog Z8400APS Z80A CPU
14   FDC      - SMC FDC1797
15   8155   - Intel P8155H
16   ROM0   -
17   ROM1,2   - AMD AM2732-1DC 4Kx8 EPROM
18   CN1      - keyboard connector
19   CN2      -
20   CN3      -
21   CN4      - floppy connector
22   CN5      - power connector
23   CN6      - composite video connector
24   SW1      - reset switch
25   SW2      -
26
27
28I/O PCB Layout
29--------------
30
31TODO
32
33Notes:
34    Relevant IC's shown.
35
36   8155   - Intel P8155H
37   8251   - AMD P8251A
38   CN1      - IEEE488 connector
39   CN2      - RS232 connector
40   CN3      -
41
42*/
43
44/*
45
46   TODO:
47
48   - force fetch from ROM at reset
49   - frame rate should be ~60Hz
50   - video line buffer
51   - vsync
52   - floppy
53   - interrupts
54   - keyboard
55   - I/O board (8155 for IEEE488, 8251 for RS-232)
56   - PCB layouts
57   
58*/
59
60#define ADDRESS_MAP_MODERN
61
62#include "emu.h"
63#include "cpu/z80/z80.h"
64#include "devices/flopdrv.h"
65#include "devices/messram.h"
66#include "machine/i8155.h"
67#include "machine/wd17xx.h"
68#include "sound/discrete.h"
69#include "includes/vixen.h"
70
71
72
73//**************************************************************************
74//   INTERRUPTS
75//**************************************************************************
76
77//-------------------------------------------------
78//  update_interrupt -
79//-------------------------------------------------
80
81void vixen_state::update_interrupt()
82{
83   int state = ((!BIT(m_cmd, 0) & m_fdint) | m_vsync) ? ASSERT_LINE : CLEAR_LINE;
84
85   cpu_set_input_line(m_maincpu, INPUT_LINE_IRQ0, state);
86}
87
88
89//-------------------------------------------------
90//  status_r - status read
91//-------------------------------------------------
92
93READ8_MEMBER( vixen_state::status_r )
94{
95   /*
96     
97      bit      description
98
99      0      CMD D0
100      1      CMD D1
101      2      VSYNC
102      3     
103      4     
104      5     
105      6     
106      7     
107
108   */
109
110   UINT8 data = 0;
111   
112   // command
113   data |= m_cmd & 0x03;
114
115   // vertical sync
116   data |= m_vsync << 2;
117
118   return data;
119}
120
121
122//-------------------------------------------------
123//  cmd_w - command write
124//-------------------------------------------------
125
126WRITE8_MEMBER( vixen_state::cmd_w )
127{
128   /*
129     
130      bit      description
131
132      0      VSYNC clear
133      1      FDINT enable
134      2     
135      3     
136      4     
137      5     
138      6     
139      7     
140
141   */
142
143   m_cmd = data;
144
145   if (BIT(data, 0))
146   {
147      // clear vertical sync
148      m_vsync = 0;
149   }
150
151   update_interrupt();
152}
153
154
155
156//**************************************************************************
157//   ADDRESS MAPS
158//**************************************************************************
159
160//-------------------------------------------------
161//  ADDRESS_MAP( vixen_mem )
162//-------------------------------------------------
163
164static ADDRESS_MAP_START( vixen_mem, ADDRESS_SPACE_PROGRAM, 8, vixen_state )
165   ADDRESS_MAP_UNMAP_HIGH
166   AM_RANGE(0x0000, 0xefff) AM_RAM
167   AM_RANGE(0xf000, 0xffff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank2") AM_BASE(m_video_ram)
168ADDRESS_MAP_END
169
170
171//-------------------------------------------------
172//  ADDRESS_MAP( vixen_io )
173//-------------------------------------------------
174
175static ADDRESS_MAP_START( vixen_io, ADDRESS_SPACE_IO, 8, vixen_state )
176   ADDRESS_MAP_GLOBAL_MASK(0xff)
177   AM_RANGE(0x00, 0x03) AM_DEVREADWRITE_LEGACY(FDC1797_TAG, wd17xx_r, wd17xx_w)
178   AM_RANGE(0x04, 0x04) AM_MIRROR(0x03) AM_READWRITE(status_r, cmd_w)
179   AM_RANGE(0x08, 0x08) AM_MIRROR(0x04) AM_DEVREADWRITE(P8155H_TAG, i8155_device, memory_r, memory_w)
180   AM_RANGE(0x09, 0x09) AM_MIRROR(0x04) AM_DEVREADWRITE(P8155H_TAG, i8155_device, io_r, io_w)
181//   AM_RANGE(0x10, 0x17) aux1
182//   AM_RANGE(0x18, 0x1f) aux2
183//   AM_RANGE(0x20, 0x27) port0
184//   AM_RANGE(0x28, 0x2f) port1
185//   AM_RANGE(0x30, 0x37) port2
186//   AM_RANGE(0x38, 0x3f) port3
187ADDRESS_MAP_END
188
189
190
191//**************************************************************************
192//   INPUT PORTS
193//**************************************************************************
194
195//-------------------------------------------------
196//  INPUT_PORTS( vixen )
197//-------------------------------------------------
198
199INPUT_PORTS_START( vixen )
200   PORT_START("ROW0")
201   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
202   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
203   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
204   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
205   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
206   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
207   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
208   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
209
210   PORT_START("ROW1")
211   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
212   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
213   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
214   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
215   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
216   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
217   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
218   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
219
220   PORT_START("ROW2")
221   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
222   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
223   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
224   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
225   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
226   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
227   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
228   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
229
230   PORT_START("ROW3")
231   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
232   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
233   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
234   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
235   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
236   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
237   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
238   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
239
240   PORT_START("ROW4")
241   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
242   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
243   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
244   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
245   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
246   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
247   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
248   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
249
250   PORT_START("ROW5")
251   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
252   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
253   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
254   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
255   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
256   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
257   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
258   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
259
260   PORT_START("ROW6")
261   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
262   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
263   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
264   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
265   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
266   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
267   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
268   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
269
270   PORT_START("ROW7")
271   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
272   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
273   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
274   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
275   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
276   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
277   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
278   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
279INPUT_PORTS_END
280
281
282
283//**************************************************************************
284//   VIDEO
285//**************************************************************************
286
287//-------------------------------------------------
288//  VIDEO_START( vixenc )
289//-------------------------------------------------
290
291void vixen_state::video_start()
292{
293   // find memory regions
294   m_sync_rom = machine->region("video")->base();
295   m_char_rom = machine->region("chargen")->base();
296
297   // register for state saving
298   state_save_register_global(machine, m_alt);
299   state_save_register_global(machine, m_256);
300   state_save_register_global(machine, m_vsync);
301   state_save_register_global_pointer(machine, m_video_ram, 0x1000);
302}
303
304
305//-------------------------------------------------
306//  VIDEO_UPDATE( vixen )
307//-------------------------------------------------
308
309bool vixen_state::video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
310{
311   for (int txadr = 0; txadr < 27; txadr++)
312   {
313      for (int scan = 0; scan < 16; scan++)
314      {
315         for (int chadr = 0; chadr < 128; chadr++)
316         {
317            UINT16 sync_addr = (txadr << 7) | chadr;
318            UINT8 sync_data = m_sync_rom[sync_addr];
319            int blank = BIT(sync_data, 4);
320            /*
321            int clrchadr = BIT(sync_data, 7);
322            int hsync = BIT(sync_data, 6);
323            int clrtxadr = BIT(sync_data, 5);
324            int vsync = BIT(sync_data, 3);
325            int comp_sync = BIT(sync_data, 2);
326
327            logerror("SYNC %03x:%02x TXADR %u SCAN %u CHADR %u : COMPSYNC %u VSYNC %u BLANK %u CLRTXADR %u HSYNC %u CLRCHADR %u\n",
328               sync_addr,sync_data,txadr,scan,chadr,comp_sync,vsync,blank,clrtxadr,hsync,clrchadr);
329            */
330
331            int reverse = 0;
332            int y = (txadr << 4) | scan;
333
334            UINT16 video_addr = chadr + txadr * 40;
335            UINT8 video_data = m_video_ram[video_addr];
336            UINT16 char_addr = 0;
337
338            if (m_256)
339            {
340               char_addr = (BIT(video_data, 7) << 11) | (scan << 7) | (video_data & 0x7f);
341               reverse = m_alt;
342            }
343            else
344            {
345               char_addr = (scan << 7) | (video_data & 0x7f);
346               reverse = BIT(video_data, 7);
347            }
348           
349            UINT8 char_data = m_char_rom[char_addr];
350
351            for (int x = 0; x < 8; x++)
352            {
353               int color = (BIT(char_data, 7 - x) ^ reverse) & !blank;
354               
355               *BITMAP_ADDR16(&bitmap, y, chadr * 8 + x) = color;
356            }
357         }
358      }
359   }
360
361   return 0;
362}
363
364
365
366//**************************************************************************
367//   VIDEO
368//**************************************************************************
369
370//-------------------------------------------------
371//  DISCRETE_SOUND( vixen )
372//-------------------------------------------------
373
374static DISCRETE_SOUND_START( vixen )
375   DISCRETE_INPUT_LOGIC(NODE_01)
376   DISCRETE_SQUAREWAVE(NODE_02, NODE_01, XTAL_23_9616MHz/15360, 100, 50, 0, 90)
377   DISCRETE_OUTPUT(NODE_02, 5000)
378DISCRETE_SOUND_END
379
380
381
382//**************************************************************************
383//   DEVICE CONFIGURATION
384//**************************************************************************
385
386//-------------------------------------------------
387//  I8155_INTERFACE( i8155_intf )
388//-------------------------------------------------
389
390READ8_MEMBER( vixen_state::i8155_pa_r )
391{
392   UINT8 data = 0xff;
393
394   if (!BIT(m_col, 0)) data &= input_port_read(machine, "ROW0");
395   if (!BIT(m_col, 1)) data &= input_port_read(machine, "ROW1");
396   if (!BIT(m_col, 2)) data &= input_port_read(machine, "ROW2");
397   if (!BIT(m_col, 3)) data &= input_port_read(machine, "ROW3");
398   if (!BIT(m_col, 4)) data &= input_port_read(machine, "ROW4");
399   if (!BIT(m_col, 5)) data &= input_port_read(machine, "ROW5");
400   if (!BIT(m_col, 6)) data &= input_port_read(machine, "ROW6");
401   if (!BIT(m_col, 7)) data &= input_port_read(machine, "ROW7");
402
403   return data;
404}
405
406WRITE8_MEMBER( vixen_state::i8155_pb_w )
407{
408   m_col = data;
409}
410
411WRITE8_MEMBER( vixen_state::i8155_pc_w )
412{
413   /*
414     
415      bit      description
416
417      0      DSEL1
418      1      DSEL2
419      2      DDEN
420      3      ALT CHARSET
421      4      256 CHARS
422      5      BEEP ENB
423      6     
424      7     
425
426   */
427
428   // drive select
429   wd17xx_set_drive(m_fdc, data & 0x03);
430
431   // density select
432   wd17xx_dden_w(m_fdc, BIT(data, 2));
433
434   // charset
435   m_alt = BIT(data, 3);
436   m_256 = BIT(data, 4);
437
438   // beep enable
439   discrete_sound_w(m_discrete, NODE_01, !BIT(data, 5));
440}
441
442static I8155_INTERFACE( i8155_intf )
443{
444   DEVCB_DRIVER_MEMBER(vixen_state, i8155_pa_r),
445   DEVCB_NULL,
446   DEVCB_NULL,
447   DEVCB_DRIVER_MEMBER(vixen_state, i8155_pb_w),
448   DEVCB_NULL,
449   DEVCB_DRIVER_MEMBER(vixen_state, i8155_pc_w),
450   DEVCB_NULL
451};
452
453
454//-------------------------------------------------
455//  wd17xx_interface fdc_intf
456//-------------------------------------------------
457
458WRITE_LINE_MEMBER( vixen_state::fdint_w )
459{
460   m_fdint = state;
461   update_interrupt();
462}
463
464static const floppy_config vixen_floppy_config =
465{
466    DEVCB_NULL,
467   DEVCB_NULL,
468    DEVCB_NULL,
469    DEVCB_NULL,
470    DEVCB_NULL,
471    FLOPPY_STANDARD_5_25_SSDD_40,
472    FLOPPY_OPTIONS_NAME(default),
473    NULL
474};
475
476static const wd17xx_interface fdc_intf =
477{
478   DEVCB_NULL,
479    DEVCB_DRIVER_LINE_MEMBER(vixen_state, fdint_w),
480   DEVCB_NULL,
481   { FLOPPY_0, FLOPPY_1, NULL, NULL }
482};
483
484
485
486//**************************************************************************
487//   MACHINE INITIALIZATION
488//**************************************************************************
489
490//-------------------------------------------------
491//  MACHINE_START( vixen )
492//-------------------------------------------------
493
494void vixen_state::machine_start()
495{
496   // configure memory banking
497   memory_configure_bank(machine, "bank1", 0, 1, m_video_ram, 0);
498   memory_configure_bank(machine, "bank1", 1, 1, machine->region(Z8400A_TAG)->base(), 0);
499   memory_configure_bank(machine, "bank2", 0, 1, m_video_ram, 0);
500   memory_set_bank(machine, "bank2", 0);
501
502   // register for state saving
503   state_save_register_global(machine, m_reset);
504   state_save_register_global(machine, m_col);
505   state_save_register_global(machine, m_cmd);
506   state_save_register_global(machine, m_fdint);
507}
508
509
510//-------------------------------------------------
511//  MACHINE_RESET( vixen )
512//-------------------------------------------------
513
514void vixen_state::machine_reset()
515{
516   memory_set_bank(machine, "bank1", 1);
517
518   m_reset = 1;
519}
520
521
522
523//**************************************************************************
524//   MACHINE CONFIGURATION
525//**************************************************************************
526
527//-------------------------------------------------
528//  MACHINE_CONFIG( vixen )
529//-------------------------------------------------
530
531static MACHINE_CONFIG_START( vixen, vixen_state )
532    // basic machine hardware
533    MCFG_CPU_ADD(Z8400A_TAG, Z80, XTAL_23_9616MHz/6)
534    MCFG_CPU_PROGRAM_MAP(vixen_mem)
535    MCFG_CPU_IO_MAP(vixen_io)
536   
537    // video hardware
538   MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)
539   MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
540   MCFG_SCREEN_RAW_PARAMS(XTAL_23_9616MHz/2, 96*8, 0*8, 81*8, 27*16, 0*16, 26*16)
541
542   MCFG_PALETTE_LENGTH(2)
543   MCFG_PALETTE_INIT(monochrome_amber)
544
545   // sound hardware
546   MCFG_SPEAKER_STANDARD_MONO("mono")
547   MCFG_SOUND_ADD(DISCRETE_TAG, DISCRETE, 0)
548   MCFG_SOUND_CONFIG_DISCRETE(vixen)
549   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
550
551   // devices
552   MCFG_I8155_ADD(P8155H_TAG, XTAL_23_9616MHz/6, i8155_intf)
553   MCFG_WD179X_ADD(FDC1797_TAG, fdc_intf)
554   MCFG_FLOPPY_2_DRIVES_ADD(vixen_floppy_config)
555   
556   // internal ram
557   MCFG_RAM_ADD("messram")
558   MCFG_RAM_DEFAULT_SIZE("64K")
559MACHINE_CONFIG_END
560
561
562
563//**************************************************************************
564//   ROMS
565//**************************************************************************
566
567//-------------------------------------------------
568//  ROM( vixen )
569//-------------------------------------------------
570
571ROM_START( vixen )
572    ROM_REGION( 0x1000, Z8400A_TAG, 0 )
573   ROM_LOAD( "osborne 4 mon rom v1.04 3p40082-03 a0a9.4c", 0x0000, 0x1000, CRC(5f1038ce) SHA1(e6809fac23650bbb4689e58edc768d917d80a2df) ) // OSBORNE 4 MON ROM / V1.04  3P40082-03 / A0A9 (c) OCC 1985
574
575    ROM_REGION( 0x1000, "video", 0 )
576   ROM_LOAD( "v1.10.3j", 0x0000, 0x1000, CRC(1f93e2d7) SHA1(0c479bfd3ac8d9959c285c020d0096930a9c6867) )
577
578   ROM_REGION( 0x1000, "chargen", 0 )
579   ROM_LOAD( "v1.00 l.1j", 0x0000, 0x1000, CRC(f97c50d9) SHA1(39f73afad68508c4b8a4d241c064f9978098d8f2) )
580ROM_END
581
582
583
584//**************************************************************************
585//   DRIVER INITIALIZATION
586//**************************************************************************
587
588//-------------------------------------------------
589//  DRIVER_INIT( vixen )
590//-------------------------------------------------
591/*
592DIRECT_UPDATE_HANDLER( vixen_direct_update_handler )
593{
594   vixen_state *state = machine->driver_data<vixen_state>();
595
596   if (state->m_reset)
597   {
598      direct.explicit_configure(0x0000, 0xffff, 0x10000, machine->region(Z8400A_TAG)->base());
599      state->m_reset = 0;
600
601      return ~0;
602   }
603   
604   return address;
605}
606
607static DRIVER_INIT( vixen )
608{
609   address_space *program = machine->device<cpu_device>(Z8400A_TAG)->space(AS_PROGRAM);
610   program->set_direct_update_handler(direct_update_delegate_create_static(vixen_direct_update_handler, *machine));
611}
612*/
613
614
615//**************************************************************************
616//   SYSTEM DRIVERS
617//**************************************************************************
618
619//    YEAR  NAME    PARENT  COMPAT   MACHINE    INPUT    INIT    COMPANY   FULLNAME       FLAGS
620COMP( 1984, vixen,  0,       0,    vixen,    vixen,     0,  "Osborne",   "Vixen",      GAME_NOT_WORKING )
docs/messnew.txt
r9906r9907
4040- Okean-240
4141- NEC PC-8300 [Incog]
4242- Peripheral Technology PT68K4
43- Osborne 4 Vixen [Curt Coder]
4344
4445
46
4547System Driver Changes:
4648----------------------
4749- [A2600] Fixed a bug that could cause crashes on exits.  (bug #1948)

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