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r9867 Saturday 1st January, 2011 at 09:36:59 UTC by MooglyGuy
[N64] RSP Updates: [Harmony]
- Re-wrote RSP DRC memory handling to go through the core memory handlers rather than try fancy fast-RAM handling. Emulation is slower as a result but now works on 32-bit targets.
- Changed the RSP to be ENDIANNESS_BIG rather than ENDIANNESS_LITTLE, as it is big-endian.
[src/emu/cpu/rsp]rsp_dasm.c rspdrc.c
[src/mame/machine]n64.c

src/mame/machine/n64.c
r9866r9867
335335static UINT32 sp_semaphore;
336336static UINT32 dp_clock = 0;
337337
338static void sp_dma(int direction)
338static void sp_dma(running_machine *machine, int direction)
339339{
340   UINT8 *src, *dst;
340   address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
341341   int i, c;
342342
343343   if (sp_dma_length == 0)
r9866r9867
387387   {
388388        for (c=0; c <= sp_dma_count; c++)
389389        {
390            src = (UINT8*)&rdram[sp_dram_addr / 4];
391            dst = (sp_mem_addr & 0x1000) ? (UINT8*)&rsp_imem[(sp_mem_addr & 0xfff) / 4] : (UINT8*)&rsp_dmem[(sp_mem_addr & 0xfff) / 4];
390            UINT32 src = sp_dram_addr;
391            UINT32 dst = 0x04000000 | (sp_mem_addr & 0x1fff);
392392
393393         //printf("CPU %08x -> RSP %08x\n", sp_dram_addr, 0x04000000 | sp_mem_addr);
394394            for (i=0; i < sp_dma_length; i++)
395395            {
396            //printf("%02x ", src[i]);
397            dst[i] = src[i];
396            //printf("%02x ", space->read_byte((src + i)^3));
397            space->write_byte(dst + i, space->read_byte(src + i));
398398            }
399399            //printf("\n");
400400
r9866r9867
408408   {
409409        for (c=0; c <= sp_dma_count; c++)
410410        {
411            src = (sp_mem_addr & 0x1000) ? (UINT8*)&rsp_imem[(sp_mem_addr & 0xfff) / 4] : (UINT8*)&rsp_dmem[(sp_mem_addr & 0xfff) / 4];
412            dst = (UINT8*)&rdram[sp_dram_addr / 4];
411            UINT32 src = 0x04000000 | (sp_mem_addr & 0x1fff);
412            UINT32 dst = sp_dram_addr;
413413
414414         //printf("RSP %08x -> CPU %08x\n", 0x04000000 | sp_mem_addr, sp_dram_addr);
415415            for (i=0; i < sp_dma_length; i++)
416416            {
417            //printf("%02x ", src[i]);
418                dst[i] = src[i];
417            //printf("%02x ", space->read_byte((src + i)^3));
418            space->write_byte(dst + i, space->read_byte(src + i));
419419            }
420420            //printf("\n");
421421
r9866r9867
525525            sp_dma_length = data & 0xfff;
526526            sp_dma_count = (data >> 12) & 0xff;
527527            sp_dma_skip = (data >> 20) & 0xfff;
528            sp_dma(0);
528            sp_dma(device->machine, 0);
529529            break;
530530
531531         case 0x0c/4:      // SP_WR_LEN_REG
532532            sp_dma_length = data & 0xfff;
533533            sp_dma_count = (data >> 12) & 0xff;
534534            sp_dma_skip = (data >> 20) & 0xfff;
535            sp_dma(1);
535            sp_dma(device->machine, 1);
536536            break;
537537
538538            case 0x10/4:        // RSP_STATUS_REG
r9866r9867
13351335                dma_length = (dma_length + 3) & ~3;
13361336            }
13371337
1338         //mame_printf_debug("PI DMA: %08X to %08X, length %08X\n", pi_cart_addr, pi_dram_addr, dma_length);
1338         //printf("PI DMA: %08X to %08X, length %08X\n", pi_cart_addr, pi_dram_addr, dma_length);
13391339
13401340         if (pi_dram_addr != 0xffffffff)
13411341         {
r9866r9867
20222022   mips3drc_add_fastram(machine->device("maincpu"), 0x00000000, 0x007fffff, FALSE, rdram);
20232023
20242024   rspdrc_set_options(machine->device("rsp"), RSPDRC_STRICT_VERIFY);
2025   rspdrc_add_imem(machine->device("rsp"), rsp_imem);
2026   rspdrc_add_dmem(machine->device("rsp"), rsp_dmem);
20272025   rspdrc_flush_drc_cache(machine->device("rsp"));
20282026
20292027   audio_timer = timer_alloc(machine, audio_timer_callback, NULL);
src/emu/cpu/rsp/rsp_dasm.c
r9866r9867
348348CPU_DISASSEMBLE( rsp )
349349{
350350   UINT32 op = *(UINT32 *)opram;
351   op = LITTLE_ENDIANIZE_INT32(op);
351   op = BIG_ENDIANIZE_INT32(op);
352352   return rsp_dasm_one(buffer, pc, op);
353353}
src/emu/cpu/rsp/rspdrc.c
r9866r9867
135135   drcuml_codehandle *   write16;               /* write half */
136136   drcuml_codehandle *   read32;                  /* read word */
137137   drcuml_codehandle *   write32;               /* write word */
138
139   /* fast RAM */
140   void*            dmem;
141   void*            imem;
142138};
143139
144140/***************************************************************************
r9866r9867
305301    CORE CALLBACKS
306302***************************************************************************/
307303
308/* Legacy.  Needed for vector cfuncs. */
309304INLINE UINT8 READ8(rsp_state *rsp, UINT32 address)
310305{
311   UINT8* dmem = (UINT8*)rsp->impstate->dmem;
312   UINT8 ret = dmem[BYTE4_XOR_BE(address & 0x00000fff)];
313   //printf("%04xr%02x\n", address & 0x00001fff, ret);
306   UINT8 ret;
307   address = 0x04000000 | (address & 0xfff);
308   ret = rsp->program->read_byte(address);
309   //printf("%04xr%02x\n",address & 0x1fff, ret);
314310   return ret;
315311}
316312
317/* Legacy.  Needed for vector cfuncs. */
313static void cfunc_read8(void *param)
314{
315   rsp_state *rsp = (rsp_state *)param;
316   rsp->impstate->arg0 = READ8(rsp, rsp->impstate->arg0);
317}
318
318319INLINE UINT16 READ16(rsp_state *rsp, UINT32 address)
319320{
320   UINT8* dmem = (UINT8*)rsp->impstate->dmem;
321   UINT16 ret = 0;
322   address &= 0x00000fff;
323   ret  = (UINT16)dmem[BYTE4_XOR_BE(address+0)] << 8;
324   ret |= (UINT16)dmem[BYTE4_XOR_BE(address+1)];
325   //printf("%04xr%04x\n", address & 0x00001fff, ret);
321   UINT16 ret;
322   address = 0x04000000 | (address & 0xfff);
323   ret = rsp->program->read_byte(address+0) << 8;
324   ret |= rsp->program->read_byte(address+1) << 0;
325   //printf("%04xr%04x\n",address & 0x1fff, ret);
326326   return ret;
327327}
328328
329/* Legacy.  Needed for vector cfuncs. */
329static void cfunc_read16(void *param)
330{
331   rsp_state *rsp = (rsp_state *)param;
332   rsp->impstate->arg0 = READ16(rsp, rsp->impstate->arg0);
333}
334
330335INLINE UINT32 READ32(rsp_state *rsp, UINT32 address)
331336{
332   UINT8* dmem = (UINT8*)rsp->impstate->dmem;
333   UINT32 ret = 0;
334   address &= 0x00000fff;
335   ret  = (UINT32)dmem[BYTE4_XOR_BE(address+0)] << 24;
336   ret |= (UINT32)dmem[BYTE4_XOR_BE(address+1)] << 16;
337   ret |= (UINT32)dmem[BYTE4_XOR_BE(address+2)] <<  8;
338   ret |= (UINT32)dmem[BYTE4_XOR_BE(address+3)];
339   //printf("%04xr%08x\n", address & 0x00001fff, ret);
337   UINT32 ret;
338   address = 0x04000000 | (address & 0xfff);
339   ret = rsp->program->read_byte(address+0) << 24;
340   ret |= rsp->program->read_byte(address+1) << 16;
341   ret |= rsp->program->read_byte(address+2) << 8;
342   ret |= rsp->program->read_byte(address+3) << 0;
343   //printf("%04xr%08x\n",address & 0x1fff, ret);
340344   return ret;
341345}
342346
343/* Legacy.  Needed for vector cfuncs. */
344INLINE void WRITE8(rsp_state *rsp, UINT32 address, UINT8 data)
347static void cfunc_read32(void *param)
345348{
346   UINT8* dmem = (UINT8*)rsp->impstate->dmem;
347   address &= 0x00000fff;
348   //printf("%04x:%02x\n", address & 0x00001fff, data);
349   dmem[BYTE4_XOR_BE(address)] = data;
349   rsp_state *rsp = (rsp_state *)param;
350   rsp->impstate->arg0 = READ32(rsp, rsp->impstate->arg0);
350351}
351352
352/* Legacy.  Needed for vector cfuncs. */
353INLINE void WRITE16(rsp_state *rsp, UINT32 address, UINT16 data)
353INLINE void WRITE8(rsp_state *rsp, UINT32 address, UINT8 data)
354354{
355   UINT8* dmem = (UINT8*)rsp->impstate->dmem;
356   address &= 0x00000fff;
357   //printf("%04x:%04x\n", address & 0x00001fff, data);
358   dmem[BYTE4_XOR_BE(address+0)] = (UINT8)(data >> 8);
359   dmem[BYTE4_XOR_BE(address+1)] = (UINT8)(data >> 0);
355   address = 0x04000000 | (address & 0xfff);
356   //printf("%04x:%02x\n",address & 0x1fff, data);
357   rsp->program->write_byte(address, data);
360358}
361359
362/* Legacy.  Needed for vector cfuncs. */
363INLINE void WRITE32(rsp_state *rsp, UINT32 address, UINT32 data)
360static void cfunc_write8(void *param)
364361{
365   UINT8* dmem = (UINT8*)rsp->impstate->dmem;
366   address &= 0x00000fff;
367   //printf("%04x:%08x\n", address & 0x00001fff, data);
368   dmem[BYTE4_XOR_BE(address+0)] = (UINT8)(data >> 24);
369   dmem[BYTE4_XOR_BE(address+1)] = (UINT8)(data >> 16);
370   dmem[BYTE4_XOR_BE(address+2)] = (UINT8)(data >>  8);
371   dmem[BYTE4_XOR_BE(address+3)] = (UINT8)(data >>  0);
362   rsp_state *rsp = (rsp_state *)param;
363   WRITE8(rsp, rsp->impstate->arg0, (UINT8)rsp->impstate->arg1);
372364}
373365
374/*****************************************************************************/
366INLINE void WRITE16(rsp_state *rsp, UINT32 address, UINT16 data)
367{
368   address = 0x04000000 | (address & 0xfff);
375369
376/*-------------------------------------------------
377    rspdrc_set_options - configure DRC options
378-------------------------------------------------*/
370   //printf("%04x:%04x\n",address & 0x1fff, data);
371   rsp->program->write_byte(address + 0, (data >> 8) & 0xff);
372   rsp->program->write_byte(address + 1, (data >> 0) & 0xff);
373}
379374
380void rspdrc_set_options(running_device *device, UINT32 options)
375static void cfunc_write16(void *param)
381376{
382   rsp_state *rsp = get_safe_token(device);
383   rsp->impstate->drcoptions = options;
377   rsp_state *rsp = (rsp_state *)param;
378   WRITE16(rsp, rsp->impstate->arg0, (UINT16)rsp->impstate->arg1);
384379}
385380
381INLINE void WRITE32(rsp_state *rsp, UINT32 address, UINT32 data)
382{
383   address = 0x04000000 | (address & 0xfff);
386384
387/*-------------------------------------------------
388    rspdrc_add_imem - register an imem region
389-------------------------------------------------*/
385   //printf("%04x:%08x\n",address & 0x1fff, data);
386   rsp->program->write_byte(address + 0, (data >> 24) & 0xff);
387   rsp->program->write_byte(address + 1, (data >> 16) & 0xff);
388   rsp->program->write_byte(address + 2, (data >> 8) & 0xff);
389   rsp->program->write_byte(address + 3, (data >> 0) & 0xff);
390}
390391
391void rspdrc_add_imem(running_device *device, void *base)
392static void cfunc_write32(void *param)
392393{
393   rsp_state *rsp = get_safe_token(device);
394   rsp->impstate->imem = base;
394   rsp_state *rsp = (rsp_state *)param;
395   WRITE32(rsp, rsp->impstate->arg0, rsp->impstate->arg1);
395396}
396397
398/*****************************************************************************/
397399
398400/*-------------------------------------------------
399    rspdrc_add_dmem - register a dmem region
401    rspdrc_set_options - configure DRC options
400402-------------------------------------------------*/
401403
402void rspdrc_add_dmem(running_device *device, void *base)
404void rspdrc_set_options(running_device *device, UINT32 options)
403405{
404406   rsp_state *rsp = get_safe_token(device);
405   rsp->impstate->dmem = base;
407   rsp->impstate->drcoptions = options;
406408}
407409
408410
r9866r9867
411413    debugging
412414-------------------------------------------------*/
413415
414#ifdef UNUSED_FUNCTION
416#ifdef UNUSED_CODE
415417static void cfunc_printf_debug(void *param)
416418{
417419   rsp_state *rsp = (rsp_state *)param;
r9866r9867
703705
704706INLINE UINT32 IREAD32(rsp_state *rsp, UINT32 address)
705707{
706   UINT8* imem = (UINT8*)rsp->impstate->imem;
707708   UINT32 ret = 0;
708709   address &= 0x00000fff;
709   ret  = (UINT32)imem[address+0] << 24;
710   ret |= (UINT32)imem[address+1] << 16;
711   ret |= (UINT32)imem[address+2] <<  8;
712   ret |= (UINT32)imem[address+3];
713   //printf("%04xr%08x\n", address & 0x00001fff, ret);
710   address = 0x04001000 | (address & 0xfff);
711   ret = rsp->program->read_byte(address+0) << 24;
712   ret |= rsp->program->read_byte(address+1) << 16;
713   ret |= rsp->program->read_byte(address+2) << 8;
714   ret |= rsp->program->read_byte(address+3) << 0;
714715   return ret;
715716}
716717
718static void dumpvecs(rsp_state *rsp)
719{
720   /*
721   char fuck[1024];
722   rsp_dasm_one(fuck, rsp->pc, IREAD32(rsp, rsp->pc));
723   printf("%08x: %s\n", rsp->pc, fuck);
724   printf("v0:  %08x %08x %08x %08x\n", rsp->v[ 0].l[0], rsp->v[ 0].l[1], rsp->v[ 0].l[2], rsp->v[ 0].l[3]);
725   printf("v1:  %08x %08x %08x %08x\n", rsp->v[ 1].l[0], rsp->v[ 1].l[1], rsp->v[ 1].l[2], rsp->v[ 1].l[3]);
726   printf("v2:  %08x %08x %08x %08x\n", rsp->v[ 2].l[0], rsp->v[ 2].l[1], rsp->v[ 2].l[2], rsp->v[ 2].l[3]);
727   printf("v3:  %08x %08x %08x %08x\n", rsp->v[ 3].l[0], rsp->v[ 3].l[1], rsp->v[ 3].l[2], rsp->v[ 3].l[3]);
728   printf("v4:  %08x %08x %08x %08x\n", rsp->v[ 4].l[0], rsp->v[ 4].l[1], rsp->v[ 4].l[2], rsp->v[ 4].l[3]);
729   printf("v5:  %08x %08x %08x %08x\n", rsp->v[ 5].l[0], rsp->v[ 5].l[1], rsp->v[ 5].l[2], rsp->v[ 5].l[3]);
730   printf("v6:  %08x %08x %08x %08x\n", rsp->v[ 6].l[0], rsp->v[ 6].l[1], rsp->v[ 6].l[2], rsp->v[ 6].l[3]);
731   printf("v7:  %08x %08x %08x %08x\n", rsp->v[ 7].l[0], rsp->v[ 7].l[1], rsp->v[ 7].l[2], rsp->v[ 7].l[3]);
732   printf("v8:  %08x %08x %08x %08x\n", rsp->v[ 8].l[0], rsp->v[ 8].l[1], rsp->v[ 8].l[2], rsp->v[ 8].l[3]);
733   printf("v9:  %08x %08x %08x %08x\n", rsp->v[ 9].l[0], rsp->v[ 9].l[1], rsp->v[ 9].l[2], rsp->v[ 9].l[3]);
734   printf("v10: %08x %08x %08x %08x\n", rsp->v[10].l[0], rsp->v[10].l[1], rsp->v[10].l[2], rsp->v[10].l[3]);
735   printf("v11: %08x %08x %08x %08x\n", rsp->v[11].l[0], rsp->v[11].l[1], rsp->v[11].l[2], rsp->v[11].l[3]);
736   printf("v12: %08x %08x %08x %08x\n", rsp->v[12].l[0], rsp->v[12].l[1], rsp->v[12].l[2], rsp->v[12].l[3]);
737   printf("v13: %08x %08x %08x %08x\n", rsp->v[13].l[0], rsp->v[13].l[1], rsp->v[13].l[2], rsp->v[13].l[3]);
738   printf("v14: %08x %08x %08x %08x\n", rsp->v[14].l[0], rsp->v[14].l[1], rsp->v[14].l[2], rsp->v[14].l[3]);
739   printf("v15: %08x %08x %08x %08x\n", rsp->v[15].l[0], rsp->v[15].l[1], rsp->v[15].l[2], rsp->v[15].l[3]);
740   printf("v16: %08x %08x %08x %08x\n", rsp->v[16].l[0], rsp->v[16].l[1], rsp->v[16].l[2], rsp->v[16].l[3]);
741   printf("v17: %08x %08x %08x %08x\n", rsp->v[17].l[0], rsp->v[17].l[1], rsp->v[17].l[2], rsp->v[17].l[3]);
742   printf("v18: %08x %08x %08x %08x\n", rsp->v[18].l[0], rsp->v[18].l[1], rsp->v[18].l[2], rsp->v[18].l[3]);
743   printf("v19: %08x %08x %08x %08x\n", rsp->v[19].l[0], rsp->v[19].l[1], rsp->v[19].l[2], rsp->v[19].l[3]);
744   printf("v20: %08x %08x %08x %08x\n", rsp->v[20].l[0], rsp->v[20].l[1], rsp->v[20].l[2], rsp->v[20].l[3]);
745   printf("v21: %08x %08x %08x %08x\n", rsp->v[21].l[0], rsp->v[21].l[1], rsp->v[21].l[2], rsp->v[21].l[3]);
746   printf("v22: %08x %08x %08x %08x\n", rsp->v[22].l[0], rsp->v[22].l[1], rsp->v[22].l[2], rsp->v[22].l[3]);
747   printf("v23: %08x %08x %08x %08x\n", rsp->v[23].l[0], rsp->v[23].l[1], rsp->v[23].l[2], rsp->v[23].l[3]);
748   printf("v24: %08x %08x %08x %08x\n", rsp->v[24].l[0], rsp->v[24].l[1], rsp->v[24].l[2], rsp->v[24].l[3]);
749   printf("v25: %08x %08x %08x %08x\n", rsp->v[25].l[0], rsp->v[25].l[1], rsp->v[25].l[2], rsp->v[25].l[3]);
750   printf("v26: %08x %08x %08x %08x\n", rsp->v[26].l[0], rsp->v[26].l[1], rsp->v[26].l[2], rsp->v[26].l[3]);
751   printf("v27: %08x %08x %08x %08x\n", rsp->v[27].l[0], rsp->v[27].l[1], rsp->v[27].l[2], rsp->v[27].l[3]);
752   printf("v28: %08x %08x %08x %08x\n", rsp->v[28].l[0], rsp->v[28].l[1], rsp->v[28].l[2], rsp->v[28].l[3]);
753   printf("v29: %08x %08x %08x %08x\n", rsp->v[29].l[0], rsp->v[29].l[1], rsp->v[29].l[2], rsp->v[29].l[3]);
754   printf("v30: %08x %08x %08x %08x\n", rsp->v[30].l[0], rsp->v[30].l[1], rsp->v[30].l[2], rsp->v[30].l[3]);
755   printf("v31: %08x %08x %08x %08x\n", rsp->v[31].l[0], rsp->v[31].l[1], rsp->v[31].l[2], rsp->v[31].l[3]);
756   printf("\n");
757   */
758}
759
717760static void cfunc_rsp_lbv(void *param)
718761{
719762   rsp_state *rsp = (rsp_state*)param;
r9866r9867
767810      VREG_B(dest, i) = READ8(rsp, ea);
768811      ea++;
769812   }
813
814   dumpvecs(rsp);
770815}
771816
772817static void cfunc_rsp_llv(void *param)
r9866r9867
897942      VREG_B(dest, i) = READ8(rsp, ea);
898943      ea++;
899944   }
945
946   dumpvecs(rsp);
900947}
901948
902949static void cfunc_rsp_lpv(void *param)
r9866r9867
926973   {
927974      VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + i) & 0xf)) << 8;
928975   }
976
977   dumpvecs(rsp);
929978}
930979
931980static void cfunc_rsp_luv(void *param)
r9866r9867
9551004   {
9561005      VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + i) & 0xf)) << 7;
9571006   }
1007
1008   dumpvecs(rsp);
9581009}
9591010
9601011static void cfunc_rsp_lhv(void *param)
r9866r9867
9841035   {
9851036      VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + (i<<1)) & 0xf)) << 7;
9861037   }
1038
1039   dumpvecs(rsp);
9871040}
9881041
9891042static void cfunc_rsp_lfv(void *param)
r9866r9867
10201073      VREG_S(dest, i) = READ8(rsp, ea) << 7;
10211074      ea += 4;
10221075   }
1076
1077   dumpvecs(rsp);
10231078}
10241079
10251080static void cfunc_rsp_lwv(void *param)
r9866r9867
10541109      VREG_B(dest, i & 0xf) = READ8(rsp, ea);
10551110      ea += 4;
10561111   }
1112
1113   dumpvecs(rsp);
10571114}
10581115
10591116static void cfunc_rsp_ltv(void *param)
r9866r9867
10971154
10981155      ea += 2;
10991156   }
1157
1158   dumpvecs(rsp);
11001159}
11011160
11021161static int generate_lwc2(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
r9866r9867
22302289   CLEAR_ZERO_FLAGS();
22312290   CLEAR_CARRY_FLAGS();
22322291   WRITEBACK_RESULT();
2292
2293   dumpvecs(rsp);
22332294}
22342295
22352296INLINE void cfunc_rsp_vsub(void *param)
r9866r9867
22662327   CLEAR_ZERO_FLAGS();
22672328   CLEAR_CARRY_FLAGS();
22682329   WRITEBACK_RESULT();
2330
2331   dumpvecs(rsp);
22692332}
22702333
22712334INLINE void cfunc_rsp_vabs(void *param)
r9866r9867
36493712
36503713static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrite, const char *name, drcuml_codehandle **handleptr)
36513714{
3652   /* on entry, address is in I0; data for writes is in I1; mask for accesses is in I2 */
3715   /* on entry, address is in I0; data for writes is in I1 */
36533716   /* on exit, read result is in I0 */
3654   /* routine trashes I0-I3 */
3717   /* routine trashes I0-I1 */
36553718   drcuml_state *drcuml = rsp->impstate->drcuml;
36563719   drcuml_block *block;
36573720   jmp_buf errorbuf;
3658#ifdef LSB_FIRST
3659   int unaligned_case = 1;
3660#endif
36613721
36623722   /* if we get an error back, we're screwed */
36633723   if (setjmp(errorbuf) != 0)
r9866r9867
36723732   alloc_handle(drcuml, handleptr, name);
36733733   UML_HANDLE(block, *handleptr);                                       // handle  *handleptr
36743734
3735   UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));
3736   UML_OR(block, IREG(0), IREG(0), IMM(0x04000000));
3737
36753738   // write:
36763739   if (iswrite)
36773740   {
36783741      if (size == 1)
36793742      {
3680         //UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));               // mov     [arg0],i0
3681         //UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(1));               // mov     [arg1],i1
3682         //UML_MOV(block, MEM(&rsp->impstate->arg2), IMM(0));               // mov     [arg2],0
3683         //UML_MOV(block, MEM(&rsp->impstate->arg3), MEM(&rsp->pc));         // mov     [arg3],pc
3684         //UML_CALLC(block, cfunc_printf_debug, rsp);                     // callc   cfunc_printf_debug
3685#ifdef LSB_FIRST
3686         UML_XOR(block, IREG(0), IREG(0), IMM(3));                           // xor     i0,i0,3
3687#endif
3688         UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
3689         UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), BYTE);            // store   dmem,i0,i1,byte
3743         UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));            // mov     [arg0],i0 ; address
3744         UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(1));            // mov     [arg1],i1 ; data
3745         UML_CALLC(block, cfunc_write8, rsp);                     // callc   cfunc_write8
36903746      }
36913747      else if (size == 2)
36923748      {
3693         //UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));               // mov     [arg0],i0
3694         //UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(1));               // mov     [arg1],i1
3695         //UML_MOV(block, MEM(&rsp->impstate->arg2), IMM(1));               // mov     [arg2],1
3696         //UML_MOV(block, MEM(&rsp->impstate->arg3), MEM(&rsp->pc));         // mov     [arg3],pc
3697         //UML_CALLC(block, cfunc_printf_debug, rsp);                     // callc   cfunc_printf_debug
3698#ifdef LSB_FIRST
3699         UML_TEST(block, IREG(0), IMM(1));                                 // test    i0,1
3700         UML_JMPc(block, IF_NZ, unaligned_case);                              // jnz     <unaligned_case>
3701         UML_XOR(block, IREG(0), IREG(0), IMM(2));                           // xor     i0,i0,2
3702#endif
3703         UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
3704         UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), WORD_x1);         // store   dmem,i0,i1,word_x1
3705         UML_RET(block);
3706#ifdef LSB_FIRST
3707         UML_LABEL(block, unaligned_case);                              // unaligned_case:
3708         UML_AND(block, IREG(2), IREG(0), IMM(3));                           // and     i2,i0,3
3709         UML_AND(block, IREG(0), IREG(0), IMM(0xffc));                        // and     i0,i0,0xffc
3710         UML_SHL(block, IREG(2), IREG(2), IMM(3));                           // shl     i2,i2,3
3711         UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1);         // dload   i3,dmem,i0,qword_x1
3712         UML_ADD(block, IREG(2), IREG(2), IMM(48));                           // add     i2,i2,48
3713         UML_DAND(block, IREG(1), IREG(1), IMM(0xffff));                        // dand    i1,i1,0xffff
3714         UML_DROLAND(block, IREG(3), IREG(3), IREG(2), IMM(U64(0xffffffffffff0000)));// droland i3,i3,i2,~0xffff
3715         UML_DOR(block, IREG(1), IREG(1), IREG(3));                           // dor     i1,i1,i3
3716         UML_DROR(block, IREG(1), IREG(1), IREG(2));                           // dror    i1,i1,i2
3717         UML_DSTORE(block, rsp->impstate->dmem, IREG(0), IREG(1), QWORD_x1);       // dstore  dmem,i0,i1,qword_x1
3718#endif
3749         UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));            // mov     [arg0],i0 ; address
3750         UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(1));            // mov     [arg1],i1 ; data
3751         UML_CALLC(block, cfunc_write16, rsp);                     // callc   cfunc_write16
37193752      }
37203753      else if (size == 4)
37213754      {
3722         //UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));               // mov     [arg0],i0
3723         //UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(1));               // mov     [arg1],i1
3724         //UML_MOV(block, MEM(&rsp->impstate->arg2), IMM(2));               // mov     [arg2],2
3725         //UML_MOV(block, MEM(&rsp->impstate->arg3), MEM(&rsp->pc));         // mov     [arg3],pc
3726         //UML_CALLC(block, cfunc_printf_debug, rsp);                     // callc   cfunc_printf_debug
3727#ifdef LSB_FIRST
3728         UML_TEST(block, IREG(0), IMM(3));                                 // test    i0,3
3729         UML_JMPc(block, IF_NZ, unaligned_case);                              // jnz     <unaligned_case>
3730#endif
3731         UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
3732         UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), DWORD_x1);         // store   dmem,i0,i1,dword_x1
3733         UML_RET(block);
3734#ifdef LSB_FIRST
3735         UML_LABEL(block, unaligned_case);                              // unaligned_case:
3736         UML_AND(block, IREG(2), IREG(0), IMM(3));                           // and     i2,i0,3
3737         UML_AND(block, IREG(0), IREG(0), IMM(0xffc));                        // and     i0,i0,0xffc
3738         UML_SHL(block, IREG(2), IREG(2), IMM(3));                           // shl     i2,i2,3
3739         UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1);         // dload   i3,dmem,i0,qword_x1
3740         UML_DAND(block, IREG(1), IREG(1), IMM(0xffffffff));                     // dand    i1,i1,0xffffffff
3741         UML_DROLAND(block, IREG(3), IREG(3), IREG(2), IMM(U64(0xffffffff00000000)));// droland i3,i3,i2,~0xffffffff
3742         UML_DOR(block, IREG(1), IREG(1), IREG(3));                           // dor     i1,i1,i3
3743         UML_DROR(block, IREG(1), IREG(1), IREG(2));                           // dror    i1,i1,i2
3744         UML_DSTORE(block, rsp->impstate->dmem, IREG(0), IREG(1), QWORD_x1);       // dstore  dmem,i0,i1,qword_x1
3745#endif
3755         UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));            // mov     [arg0],i0 ; address
3756         UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(1));            // mov     [arg1],i1 ; data
3757         UML_CALLC(block, cfunc_write32, rsp);                     // callc   cfunc_write32
37463758      }
37473759   }
37483760   else
37493761   {
3750      UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));               // mov     [arg0],i0
37513762      if (size == 1)
37523763      {
3753         //UML_MOV(block, MEM(&rsp->impstate->arg2), IMM(3));                     // mov     [arg2],3
3754         //UML_MOV(block, MEM(&rsp->impstate->arg3), MEM(&rsp->pc));         // mov     [arg3],pc
3755#ifdef LSB_FIRST
3756         UML_XOR(block, IREG(0), IREG(0), IMM(3));                           // xor     i0,i0,3
3757#endif
3758         UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
3759         UML_LOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), BYTE);            // load    i0,dmem,i0,byte
3760         //UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(0));                     // mov     [arg1],i0
3761         //UML_CALLC(block, cfunc_printf_debug, rsp);                           // callc   cfunc_printf_debug
3764         UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));         // mov     [arg0],i0 ; address
3765         UML_CALLC(block, cfunc_read8, rsp);                     // callc   cfunc_printf_debug
3766         UML_MOV(block, IREG(0), MEM(&rsp->impstate->arg0));         // mov     i0,[arg0],i0 ; result
37623767      }
37633768      else if (size == 2)
37643769      {
3765         //UML_MOV(block, MEM(&rsp->impstate->arg2), IMM(4));                     // mov     [arg2],4
3766         //UML_MOV(block, MEM(&rsp->impstate->arg3), MEM(&rsp->pc));         // mov     [arg3],pc
3767#ifdef LSB_FIRST
3768         UML_TEST(block, IREG(0), IMM(1));                                 // test    i0,1
3769         UML_JMPc(block, IF_NZ, unaligned_case);                              // jnz     <unaligned_case>
3770         UML_XOR(block, IREG(0), IREG(0), IMM(2));                           // xor     i0,i0,2
3771#endif
3772         UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
3773         UML_LOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), WORD_x1);         // load    i0,dmem,i0,word_x1
3774         //UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(0));                     // mov     [arg1],i0
3775         //UML_CALLC(block, cfunc_printf_debug, rsp);                           // callc   cfunc_printf_debug
3776         UML_RET(block);
3777#ifdef LSB_FIRST
3778         UML_LABEL(block, unaligned_case);                              // unaligned_case:
3779         UML_AND(block, IREG(1), IREG(0), IMM(3));                           // and     i1,i0,3
3780         UML_AND(block, IREG(0), IREG(0), IMM(0xffc));                        // and     i0,i0,0xffc
3781         UML_SHL(block, IREG(1), IREG(1), IMM(3));                           // shl     i1,i1,3
3782         UML_DLOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), QWORD_x1);         // dload   i0,dmem,i0,qword_x1
3783         UML_ADD(block, IREG(1), IREG(1), IMM(48));                           // add     i1,i1,48
3784         UML_DROLAND(block, IREG(0), IREG(0), IREG(1), IMM(0xffff));               // droland i0,i0,i1,0xffff
3785#endif
3786         //UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(0));                     // mov     [arg1],i0
3787         //UML_CALLC(block, cfunc_printf_debug, rsp);                           // callc   cfunc_printf_debug
3770         UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));         // mov     [arg0],i0 ; address
3771         UML_CALLC(block, cfunc_read16, rsp);                  // callc   cfunc_read16
3772         UML_MOV(block, IREG(0), MEM(&rsp->impstate->arg0));         // mov     i0,[arg0],i0 ; result
37883773      }
37893774      else if (size == 4)
37903775      {
3791         //UML_MOV(block, MEM(&rsp->impstate->arg2), IMM(5));                     // mov     [arg2],5
3792         //UML_MOV(block, MEM(&rsp->impstate->arg3), MEM(&rsp->pc));         // mov     [arg3],pc
3793#ifdef LSB_FIRST
3794         UML_TEST(block, IREG(0), IMM(3));                                 // test    i0,3
3795         UML_JMPc(block, IF_NZ, unaligned_case);                              // jnz     <unaligned_case>
3796#endif
3797         UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
3798         UML_LOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), DWORD_x1);         // load    i0,dmem,i0,dword_x1
3799         //UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(0));                     // mov     [arg1],i0
3800         //UML_CALLC(block, cfunc_printf_debug, rsp);                           // callc   cfunc_printf_debug
3801         UML_RET(block);
3802#ifdef LSB_FIRST
3803         UML_LABEL(block, unaligned_case);                              // unaligned_case:
3804         UML_AND(block, IREG(1), IREG(0), IMM(3));                           // and     i1,i0,3
3805         UML_AND(block, IREG(0), IREG(0), IMM(0xffc));                        // and     i0,i0,0xffc
3806         UML_SHL(block, IREG(1), IREG(1), IMM(3));                           // shl     i1,i1,3
3807         UML_DLOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), QWORD_x1);         // dload   i0,dmem,i0,qword_x1
3808         UML_DROL(block, IREG(0), IREG(0), IREG(1));                           // drol    i0,i0,i1
3809#endif
3810         //UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(0));                     // mov     [arg1],i0
3811         //UML_CALLC(block, cfunc_printf_debug, rsp);                           // callc   cfunc_printf_debug
3776         UML_MOV(block, MEM(&rsp->impstate->arg0), IREG(0));         // mov     [arg0],i0 ; address
3777         UML_CALLC(block, cfunc_read32, rsp);                  // callc   cfunc_read32
3778         UML_MOV(block, IREG(0), MEM(&rsp->impstate->arg0));         // mov     i0,[arg0],i0 ; result
38123779      }
38133780   }
38143781   UML_RET(block);
r9866r9867
48134780      case CPUINFO_INT_CONTEXT_SIZE:               info->i = sizeof(rsp_state);               break;
48144781      case CPUINFO_INT_INPUT_LINES:               info->i = 1;                     break;
48154782      case CPUINFO_INT_DEFAULT_IRQ_VECTOR:         info->i = 0;                     break;
4816      case DEVINFO_INT_ENDIANNESS:               info->i = ENDIANNESS_LITTLE;               break;
4783      case DEVINFO_INT_ENDIANNESS:               info->i = ENDIANNESS_BIG;            break;
48174784      case CPUINFO_INT_CLOCK_MULTIPLIER:            info->i = 1;                     break;
48184785      case CPUINFO_INT_CLOCK_DIVIDER:               info->i = 1;                     break;
48194786      case CPUINFO_INT_MIN_INSTRUCTION_BYTES:         info->i = 4;                     break;

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