MESS SVN History

15994 Revisions

r9813 Thursday 23rd December, 2010 at 12:58:53 UTC by Nathan Woods
Updated to MAME 0.140u3 core

[docs]	messnew.txt
[src/emu]	emu.mak
[src/emu/cpu]	cpu.mak
[src/emu/cpu/f8]	f8.c
[src/emu/cpu/h83002]	h8ops.h
[src/emu/cpu/i386]	i386dasm.c
[src/emu/cpu/i86]	i286.c i86.c
[src/emu/cpu/nec]	nec.c necdasm.c necea.h necinstr.c* necinstr.h necmodrm.h necpriv.h v25.c* v25instr.c* v25instr.h* v25priv.h* v25sfr.c*
[src/emu/debug]	debugcmd.c debughlp.c
[src/emu/machine]	6850acia.c 7474.c s3c2400.c* s3c2400.h* s3c2410.c* s3c2410.h* s3c2440.c* s3c2440.h* s3c24xx.c* z80ctc.h
[src/emu/sound]	fm.c fm2612.c fmopl.c ics2115.c ym2151.c ym2413.c ymf262.c ymf271.c ymf278b.c
[src/emu/video]	mc6845.c tms9928a.c
[src/lib/util]	tagmap.h
[src/mame]	mame.mak mamedriv.c
[src/mame/audio]	8080bw.c seibu.c seibu.h
[src/mame/drivers]	20pacgal.c alpha68k.c atarisy1.c ataxx.c balsente.c bigfghtr.c cave.c cb2001.c cclimber.c centiped.c chaknpop.c csplayh5.c dai3wksi.c* dkong.c flstory.c forte2.c galdrvr.c galpani2.c ghosteo.c gyruss.c itech32.c legionna.c m107.c m72.c m90.c m92.c merit.c midqslvr.c* missile.c multfish.c namcops2.c namcos1.c namcos23.c naomi.c pachifev.c pandoras.c parodius.c pastelg.c pengadvb.c pgm.c photon2.c r2dx_v33.c* raiden2.c scobra.c segac2.c segas16b.c segas32.c sg1000a.c st0016.c stv.c tankbust.c vpoker.c vsnes.c
[src/mame/includes]	flstory.h multfish.h* raiden2.h segas32.h
[src/mame/machine]	naomibd.c segas32.c seicop.c seicop.h
[src/mame/video]	flstory.c m107.c pgm.c vball.c
[src/osd/sdl]	drawogl.c

src/mame/audio/seibu.c
r9812	r9813
299	299
300	300	WRITE8_HANDLER( seibu_irq_clear_w )
301	301	{
302		update_irq_lines(space->machine, VECTOR_INIT);
	302	/* Denjin Makai and SD Gundam doesn't like this, it's tied to the rst18 ack ONLY so it could be related to it. */
	303	//update_irq_lines(space->machine, VECTOR_INIT);
303	304	}
304	305
305	306	WRITE8_HANDLER( seibu_rst10_ack_w )
r9812	r9813
338	339	update_irq_lines(machine, VECTOR_INIT);
339	340	if (romlength > 0x10000)
340	341	memory_configure_bank(machine, "bank1", 0, (romlength - 0x10000) / 0x8000, rom + 0x10000, 0x8000);
	342
	343	/* Denjin Makai definitely needs this at start-up, it never writes to the bankswitch */
	344	memory_set_bank(machine, "bank1", 0);
341	345	}
342	346
343	347	/***************************************************************************/
r9812	r9813
406	410	main2sub[offset] = data;
407	411	break;
408	412	case 4:
409		if (strcmp(space->machine->gamedrv->name, "sdgndmps") == 0)
410		update_irq_lines(space->machine, RST10_ASSERT);
411	413	update_irq_lines(space->machine, RST18_ASSERT);
412	414	break;
413	415	case 2: //Sengoku Mahjong writes here
r9812	r9813
525	527	AM_RANGE(0x401a, 0x401a) AM_NOP
526	528	ADDRESS_MAP_END
527	529
	530	ADDRESS_MAP_START( seibu_newzeroteam_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	531	AM_RANGE(0x0000, 0x1fff) AM_ROM
	532	AM_RANGE(0x2000, 0x27ff) AM_RAM
	533	AM_RANGE(0x4000, 0x4000) AM_WRITE(seibu_pending_w)
	534	AM_RANGE(0x4001, 0x4001) AM_WRITE(seibu_irq_clear_w)
	535	AM_RANGE(0x4002, 0x4002) AM_WRITE(seibu_rst10_ack_w)
	536	AM_RANGE(0x4003, 0x4003) AM_WRITE(seibu_rst18_ack_w)
	537	AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ymsnd", ym3812_r, ym3812_w)
	538	AM_RANGE(0x4010, 0x4011) AM_READ(seibu_soundlatch_r)
	539	AM_RANGE(0x4012, 0x4012) AM_READ(seibu_main_data_pending_r)
	540	AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
	541	AM_RANGE(0x4018, 0x4019) AM_WRITE(seibu_main_data_w)
	542	AM_RANGE(0x401a, 0x401a) AM_WRITE(seibu_bank_w)
	543	AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w)
	544	AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE_MODERN("oki", okim6295_device, read, write)
	545	AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
	546	ADDRESS_MAP_END
528	547
529	548	ADDRESS_MAP_START( seibu3_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
530	549	AM_RANGE(0x0000, 0x1fff) AM_ROM

src/mame/audio/seibu.h
r9812	r9813
33	33	ADDRESS_MAP_EXTERN(seibu_sound_map, 8);
34	34	ADDRESS_MAP_EXTERN(seibu2_sound_map, 8);
35	35	ADDRESS_MAP_EXTERN(seibu2_raiden2_sound_map, 8);
	36	ADDRESS_MAP_EXTERN(seibu_newzeroteam_sound_map, 8);
36	37	ADDRESS_MAP_EXTERN(seibu3_sound_map, 8);
37	38	ADDRESS_MAP_EXTERN(seibu3_adpcm_sound_map, 8);
38	39
r9812	r9813
87	88	MDRV_CPU_ADD("audiocpu", Z80, freq) \
88	89	MDRV_CPU_PROGRAM_MAP(seibu2_raiden2_sound_map) \
89	90
	91	#define SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(freq) \
	92	MDRV_CPU_ADD("audiocpu", Z80, freq) \
	93	MDRV_CPU_PROGRAM_MAP(seibu_newzeroteam_sound_map) \
	94
90	95	#define SEIBU3_SOUND_SYSTEM_CPU(freq) \
91	96	MDRV_CPU_ADD("audiocpu", Z80, freq) \
92	97	MDRV_CPU_PROGRAM_MAP(seibu3_sound_map) \

src/mame/audio/8080bw.c
r9812	r9813
874	874	state->schaser_background_disable = (data >> 3) & 0x01;
875	875	state->schaser_background_select = (data >> 4) & 0x01;
876	876
877		state->c8080bw_flip_screen = data & 0x20;
	877	state->c8080bw_flip_screen = (data & 0x20) && (input_port_read(space->machine, CABINET_PORT_TAG) & 0x01);
878	878
879	879	state->port_2_last_extra = data;
880	880	}

src/mame/machine/segas32.c
r9812	r9813
12	12
13	13	#define xxxx 0x00
14	14
15		~~static~~ const UINT8 ga2_v25_opcode_table[256] = {
	15	const UINT8 ga2_v25_opcode_table[256] = {
16	16	xxxx,xxxx,0xEA,xxxx,xxxx,0x8B,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,
17	17	xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0xFA,
18	18	xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x49,xxxx,xxxx,xxxx,
r9812	r9813
33	33
34	34	#undef xxxx
35	35
36		~~static~~ void nec_v25_cp~~u_dec~~rypt(running_machine *machine)
	36	void decrypt_ga2_protrom(running_machine *machine)
37	37	{
38	38	int i;
39		address_space *space = cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM);
40	39	UINT8 *rom = memory_region(machine, "mcu");
41		UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x10000);
42	40	UINT8* temp = auto_alloc_array(machine, UINT8, 0x100000);
43	41
44		// set CPU3 opcode base
45		space->set_decrypted_region(0x00000, 0x0ffff, decrypted);
46		space->set_decrypted_region(0xf0000, 0xfffff, decrypted);
47
48	42	// make copy of ROM so original can be overwritten
49	43	memcpy(temp, rom, 0x10000);
50	44
	45	// unscramble the address lines
51	46	for(i = 0; i < 0x10000; i++)
52		{
53		int j = BITSWAP16(i, 14, 11, 15, 12, 13, 4, 3, 7, 5, 10, 2, 8, 9, 6, 1, 0);
	47	rom[i] = temp[BITSWAP16(i, 14, 11, 15, 12, 13, 4, 3, 7, 5, 10, 2, 8, 9, 6, 1, 0)];
54	48
55		// normal ROM data with address swap undone
56		rom[i] = temp[j];
57
58		// decryped opcodes with address swap undone
59		decrypted[i] = ga2_v25_opcode_table[ temp[j] ];
60		}
61
62	49	auto_free(machine, temp);
63	50	}
64	51
65		void decrypt_ga2_protrom(running_machine *machine)
66		{
67		nec_v25_cpu_decrypt(machine);
68		}
69
70
71	52	WRITE16_HANDLER( ga2_dpram_w )
72	53	{
73	54	/* does it ever actually write.. */

src/mame/machine/naomibd.c
r9812	r9813
271	271	{ "sstrkfgt", 0, 0x132303, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
272	272	{ "suchie3", 0, 0x0368e1, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
273	273	{ "toyfight", 0, 0x02ca85, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
	274	{ "vf4cart", 0, 0x2ef2f96, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
274	275	{ "vtennis", 0, 0x03eb15, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
275	276	{ "vonot", 0, 0x010715, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
276	277	{ "wldkicks", 0, 0xae2901, { 0, 0, 0, 0xffffffff, 0xffffffff, 0xffffffff } },
r9812	r9813
1187	1188	accordingly the s-boxes' definitions. So the order of the bits in the keys is arbitrary, and the s-boxes values have been
1188	1189	chosen so as to make the key for CAPSNK equal to 0.
1189	1190
1190		It can be observed that some sboxes have incomplete tables (a 255 value indicate an unknown value). It's unclear whether or
1191		not they are used by the cipher, as the bits of the recovered keys as of november/2010 show small randomness and big correlations,
1192		making possible that some unseen bits could make the decryption need those incomplete parts. Even if not, as of november/2010, there are one
1193		s-box which have an incomplete table which definitely could be being used by some carts: the 1st s-box of the 1st round of the 1st FN.
1194		It is incomplete because we haven't located any game using that part of the s-box
1195		till now, but definitively it could be being used by some still-not-analyzed carts.
	1191	It can be observed that a couple of sboxes have incomplete tables (a 255 value indicate an unknown value). The recovered keys
	1192	as of december/2010 show small randomness and big correlations, making possible that some unseen bits could make the
	1193	decryption need those incomplete parts.
1196	1194
1197	1195	When bit #1 of the heading control bits is set to 1, an additional decompression step seems to be carried out. As of
1198	1196	february/2010, Deunan Knute has put some work on analyzing the decompression algorithm, but probably much more work will
r9812	r9813
1223	1221	{
1224	1222	{
1225	1223	0,3,2,2,1,3,1,2,3,2,1,2,1,2,3,1,3,2,2,0,2,1,3,0,0,3,2,3,2,1,2,0,
1226		2,3,1,1,2,2,1,1,1,0,2,3,3,0,2,1,
1227		// potentially used, but we haven't located any game using it
1228		255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,
	1224	2,3,1,1,2,2,1,1,1,0,2,3,3,0,2,1,1,1,1,1,3,0,3,2,1,0,1,2,0,3,1,3,
1229	1225	},
1230	1226	{3,4,5,7,-1,-1},
1231	1227	{0,4}
r9812	r9813
1271	1267	{
1272	1268	{
1273	1269	2,0,1,0,0,3,2,0,3,3,1,2,1,3,0,2,0,2,0,0,0,2,3,1,3,1,1,2,3,0,3,0,
1274		// unused?
1275		255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,
	1270	3,0,2,0,0,2,2,1,0,2,3,3,1,3,1,0,1,3,3,0,0,1,3,1,0,2,0,3,2,1,0,1,
1276	1271	},
1277	1272	{0,1,3,4,6,-1},
1278	1273	{1,5}
r9812	r9813
1527	1522	},
1528	1523	};
1529	1524
1530		static const int fn1_game_key_scheduling[36][2] =
	1525	static const int fn1_game_key_scheduling[38][2] =
1531	1526	{
1532	1527	{1,29}, {1,71}, {2,4}, {2,54}, {3,8}, {4,56}, {4,73}, {5,11},
1533	1528	{6,51}, {7,92}, {8,89}, {9,9}, {9,10}, {9,39}, {9,41}, {9,58},
1534	1529	{9,59}, {9,86}, {10,90}, {11,6}, {12,64}, {13,49}, {14,44}, {15,40},
1535	1530	{16,69}, {17,15}, {18,23}, {18,43}, {19,82}, {20,81}, {21,32}, {21,61},
1536		{22,5}, {23,66}, {24,13}, {24,45}
	1531	{22,5}, {23,66}, {24,13}, {24,45}, {25,12}, {25,35}
1537	1532	};
1538	1533
1539		static const int fn2_game_key_scheduling[33][2] =
	1534	static const int fn2_game_key_scheduling[34][2] =
1540	1535	{
1541	1536	{0,0}, {1,3}, {2,11}, {3,20}, {4,22}, {5,23}, {6,29}, {7,38},
1542	1537	{8,39}, {9,47}, {9,55}, {9,86}, {9,87}, {9,90}, {10,50}, {10,53},
1543	1538	{11,57}, {12,59}, {13,61}, {13,64}, {14,63}, {15,67}, {16,72}, {17,83},
1544	1539	{18,88}, {19,94}, {20,35}, {21,17}, {21,92}, {22,6}, {22,11}, {23,85},
1545		{24,16}
	1540	{24,16}, {25,25}
1546	1541	};
1547	1542
1548	1543	static const int fn1_sequence_key_scheduling[20][2] =
r9812	r9813
1606	1601	memset(fn1_subkeys,0,sizeof(UINT32)*4);
1607	1602	memset(fn2_subkeys,0,sizeof(UINT32)*4);
1608	1603
1609		for (j=0; j<36; ++j)
	1604	for (j=0; j<38; ++j)
1610	1605	{
1611	1606	if (BIT(game_key, fn1_game_key_scheduling[j][0])!=0)
1612	1607	{
r9812	r9813
1616	1611	}
1617	1612	}
1618	1613
1619		for (j=0; j<33; ++j)
	1614	for (j=0; j<34; ++j)
1620	1615	{
1621	1616	if (BIT(game_key, fn2_game_key_scheduling[j][0])!=0)
1622	1617	{

src/mame/machine/seicop.c
r9812	r9813
2431	2431	static WRITE16_HANDLER( generic_cop_w )
2432	2432	{
2433	2433	static UINT32 temp32;
	2434	static UINT32 dma_src,dma_dst,dma_size,dma_trigger,dma_src_param;
2434	2435
2435	2436	switch (offset)
2436	2437	{
r9812	r9813
2464	2465	case (0x03a/2): { cop_43a = data; break; }
2465	2466	case (0x03c/2): { cop_43c = data; break; }
2466	2467
2467		/* Layer Clearing */
	2468	/* DMA / layer clearing */
	2469	case (0x076/2):
	2470	dma_src_param = data * 0x400;
	2471	break;
	2472
2468	2473	case (0x078/2): /* clear address */
2469	2474	{
2470	2475	cop_clearfill_address[cop_clearfill_lasttrigger] = data; // << 6 to get actual address
	2476	dma_src = data << 6;
2471	2477	seibu_cop_log("%06x: COPX set layer clear address to %04x (actual %08x)\n", cpu_get_pc(space->cpu), data, data<<6);
2472	2478	break;
2473	2479	}
r9812	r9813
2476	2482	{
2477	2483	cop_clearfill_length[cop_clearfill_lasttrigger] = data;
2478	2484	seibu_cop_log("%06x: COPX set layer clear length to %04x (actual %08x)\n", cpu_get_pc(space->cpu), data, data<<5);
2479
	2485	dma_size = data << 5;
2480	2486	break;
2481	2487	}
2482	2488
r9812	r9813
2484	2490	{
2485	2491	cop_clearfill_value[cop_clearfill_lasttrigger] = data;
2486	2492	seibu_cop_log("%06x: COPX set layer clear value to %04x (actual %08x)\n", cpu_get_pc(space->cpu), data, data<<6);
	2493	dma_dst = data << 6;
2487	2494	break;
2488	2495	}
2489	2496
r9812	r9813
2498	2505	cop_clearfill_lasttrigger = 0;
2499	2506	}
2500	2507
	2508	dma_trigger = data; //dmach according to Olympic Soccer '92
	2509
2501	2510	break;
2502	2511	}
2503	2512
r9812	r9813
2564	2573	{
2565	2574	seibu_cop_log("%06x: COPX execute current layer clear??? %04x\n", cpu_get_pc(space->cpu), data);
2566	2575
	2576	//printf("SRC: %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",dma_src,dma_dst,dma_size,dma_trigger);
	2577
	2578	if (dma_trigger & 0x80)
	2579	{
	2580	static UINT32 src,dst,size,i;
	2581
	2582	/* TODO: understand all the differences between triggers!
	2583	0x80 is used by Legionnaire (plain DMA)
	2584	0x81 is used by SD Gundam and Godzilla (unknown purpose)
	2585	0x86 is used by Seibu Cup Soccer (doesn't yet work)
	2586	0x87 is used by Denjin Makai (DMA with inverted word endianess)
	2587	*/
	2588
	2589	//if(dma_trigger != 0x87)
	2590	// printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",dma_src,dma_src_param,dma_dst,dma_size,dma_trigger);
	2591
	2592	if(dma_trigger == 0x81)
	2593	return;
	2594
	2595	src = dma_src + dma_src_param;
	2596	dst = dma_dst;
	2597	size = (dma_size - dma_dst + 0x20)/2;
	2598
	2599	for(i = 0;i < size;i++)
	2600	{
	2601	space->write_word(dst, space->read_word(src));
	2602	src+=2;
	2603	dst+=2;
	2604	}
	2605
	2606	return;
	2607	}
	2608
	2609	/* Seibu Cup Soccer trigger this*/
	2610	if (dma_trigger == 0x0e)
	2611	{
	2612	static UINT32 src,dst,size,i;
	2613
	2614	src = dma_src;
	2615	dst = dma_dst;
	2616	size = ((dma_size - dma_dst) / 0x20) + 1;
	2617
	2618	for(i=0;i<size;i++)
	2619	{
	2620	space->write_dword(dst+0x00, space->read_dword(src+0x00));
	2621	space->write_dword(dst+0x04, space->read_dword(src+0x04));
	2622	space->write_dword(dst+0x08, space->read_dword(src+0x08));
	2623	space->write_dword(dst+0x0c, space->read_dword(src+0x0c));
	2624	space->write_dword(dst+0x10, space->read_dword(src+0x10));
	2625	space->write_dword(dst+0x14, space->read_dword(src+0x14));
	2626	space->write_dword(dst+0x18, space->read_dword(src+0x18));
	2627	space->write_dword(dst+0x1c, space->read_dword(src+0x1c));
	2628
	2629	//printf("%08x %08x\n",src,dst);
	2630
	2631	dst+=0x20;
	2632	src+=0x20;
	2633	}
	2634
	2635	return;
	2636	}
	2637
2567	2638	// I think the value it writes here must match the other value for anything to happen.. maybe */
2568	2639	//if (data!=cop_clearfill_value[cop_clearfill_lasttrigger]) break;
	2640
2569	2641	if ((cop_clearfill_lasttrigger==0x14) \|\| (cop_clearfill_lasttrigger==0x15)) return;
2570	2642
	2643	//printf("SRC: %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",dma_src,dma_dst,dma_size,dma_trigger);
	2644
2571	2645	/* do the fill */
2572	2646	if (cop_clearfill_value[cop_clearfill_lasttrigger]==0x0000)
2573	2647	{
r9812	r9813
2581	2655	space->write_word(i, 0x0000);
2582	2656	}
2583	2657	}
	2658
2584	2659	break;
2585	2660	}
2586	2661	}
r9812	r9813
2720	2795	//case (0x1b4/2):
2721	2796	// return cop_mcu_ram[offset];
2722	2797
2723		/* returning 0xffff for some inputs for now, breaks coinage but
2724		allows cupsoc to boot */
	2798	case (0x340/2): return input_port_read(space->machine, "DSW1");
	2799	case (0x344/2): return input_port_read(space->machine, "PLAYERS12");
	2800	case (0x348/2): return input_port_read(space->machine, "PLAYERS34");
	2801	case (0x34c/2): return input_port_read(space->machine, "SYSTEM");
	2802	case (0x354/2): return 0xffff;
	2803	case (0x35c/2): return input_port_read(space->machine, "DSW2");
	2804
	2805	case (0x308/2): return seibu_main_word_r(space,2,0xffff);
	2806	case (0x30c/2): return seibu_main_word_r(space,3,0xffff);
	2807	case (0x314/2): return seibu_main_word_r(space,5,0xffff);
	2808	}
	2809	}
	2810
	2811	WRITE16_HANDLER( cupsoc_mcu_w )
	2812	{
	2813	COMBINE_DATA(&cop_mcu_ram[offset]);
	2814
	2815	seibu_cop_log("%06x: Legionna write data %04x at offset %04x\n", cpu_get_pc(space->cpu), data, offset*2);
	2816
	2817	switch (offset)
	2818	{
	2819	default:
	2820	generic_cop_w(space, offset, data, mem_mask);
	2821	break;
	2822
	2823	/*********************************************************************
	2824	400-5ff - Protection writes
	2825	*********************************************************************/
	2826
	2827	#if 0
	2828	/* Trigger Macro Command */
	2829	case (0x100/2):
	2830	{
	2831	switch(cop_mcu_ram[offset])
	2832	{
	2833	/???/
	2834	case 0x8100:
	2835	{
	2836	UINT32 src = cop_register[0];
	2837	space->write_word(src+0x36,0xffc0);
	2838	break;
	2839	}
	2840	case 0x8900:
	2841	{
	2842	UINT32 src = cop_register[0];
	2843	space->write_word(src+0x36,0xff80);
	2844	break;
	2845	}
	2846	/Right/
	2847	case 0x0205:
	2848	{
	2849	UINT32 src = cop_register[0];
	2850	INT16 y = space->read_word(src+0x4);
	2851	INT16 x = space->read_word(src+0x8);
	2852	INT16 y_rel = space->read_word(src+0x10);
	2853	INT16 x_rel = space->read_word(src+0x14);
	2854	space->write_word(src+0x4,(y+y_rel));
	2855	space->write_word(src+0x8,(x+x_rel));
	2856	/*logerror("%08x %08x %08x %08x %08x\n",cop_register[0],
	2857	space->read_word(cop_reg[0]+0x4),
	2858	space->read_word(cop_reg[0]+0x8),
	2859	space->read_word(cop_reg[0]+0x10),
	2860	space->read_word(cop_reg[0]+0x14));*/
	2861	break;
	2862	}
	2863	/???/
	2864	case 0x3bb0:
	2865	{
	2866	//UINT32 dst = cop_register[0];
	2867	//UINT32 dst = cop_register[1];
	2868	//space->write_word(dst, mame_rand(space->machine)/space->read_word(src)/);
	2869	//space->write_word(dst+2,mame_rand(space->machine)/space->read_word(src+2)/);
	2870	//space->write_word(dst+4,mame_rand(space->machine)/space->read_word(src+4)/);
	2871	//space->write_word(dst+6,mame_rand(space->machine)/space->read_word(src+6)/);
	2872	//logerror("%04x\n",cop_register[0]);
	2873	break;
	2874	}
	2875	default:
	2876	//logerror("%04x\n",data);
	2877	break;
	2878	}
	2879	break;
	2880	}
	2881	#endif
	2882
	2883	/* Video Regs */
	2884	case (0x204/2):
	2885	{
	2886	//C.R.T. Controller
	2887	/*
	2888	data = setting
	2889	0x01e = 320x256 ---- ---x xxx-
	2890	0x0e1 = 320x256 REVERSE ---- xxx- ---x
	2891	0x016 = 320x240 ---- ---x -xx-
	2892	0x0e9 = 320x240 REVERSE ---- xxx- x--x
	2893	0x004 = 320x224 ---- ---- -x--
	2894	0x10b = 320x224 REVERSE ---x ---- x-xx
	2895	For now we use this by cases and not per bits.
	2896	*/
	2897
	2898	switch(data)
	2899	{
	2900	case 0x0000:
	2901	case 0x001e: CRT_MODE(320,256,0); break;
	2902	case 0x00e1: CRT_MODE(320,256,1); break;
	2903	case 0x0016: CRT_MODE(320,240,0); break;
	2904	case 0x00e9: CRT_MODE(320,240,1); break;
	2905	case 0x0004: CRT_MODE(320,224,0); break;
	2906	case 0x010b: CRT_MODE(320,224,1); break;
	2907	default:
	2908	#ifdef MAME_DEBUG
	2909	popmessage("Warning: Undefined CRT Mode %04x",data);
	2910	#endif
	2911	CRT_MODE(320,256,0);
	2912	}
	2913	break;
	2914	}
	2915
	2916	case (0x21c/2): { grainbow_pri_n = cop_mcu_ram[offset]; break; }
	2917	case (0x220/2): { legionna_scrollram16[0] = cop_mcu_ram[offset]; break; }
	2918	case (0x222/2): { legionna_scrollram16[1] = cop_mcu_ram[offset]; break; }
	2919	case (0x224/2): { legionna_scrollram16[2] = cop_mcu_ram[offset]; break; }
	2920	case (0x226/2): { legionna_scrollram16[3] = cop_mcu_ram[offset]; break; }
	2921	case (0x228/2): { legionna_scrollram16[4] = cop_mcu_ram[offset]; break; }
	2922	case (0x22a/2): { legionna_scrollram16[5] = cop_mcu_ram[offset]; break; }
	2923	//case (0x238/2): { legionna_scrollram16[6] = cop_mcu_ram[offset]; break; }
	2924	//case (0x23a/2): { legionna_scrollram16[7] = cop_mcu_ram[offset]; break; }
	2925
	2926	case (0x300/2): { seibu_main_word_w(space,0,cop_mcu_ram[offset],0x00ff); break; }
	2927	case (0x304/2): { seibu_main_word_w(space,1,cop_mcu_ram[offset],0x00ff); break; }
	2928	case (0x310/2): { seibu_main_word_w(space,4,cop_mcu_ram[offset],0x00ff); break; }
	2929	case (0x318/2): { seibu_main_word_w(space,6,cop_mcu_ram[offset],0x00ff); break; }
	2930	}
	2931	}
	2932
	2933	READ16_HANDLER( cupsocs_mcu_r )
	2934	{
	2935	switch (offset)
	2936	{
	2937	default:
	2938	return generic_cop_r(space, offset, mem_mask);
	2939
	2940	//case (0x07e/2):
	2941	//case (0x1b0/2):
	2942	//case (0x1b4/2):
	2943	// return cop_mcu_ram[offset];
	2944
2725	2945	case (0x300/2): return input_port_read(space->machine, "DSW1");
2726	2946	case (0x304/2): return input_port_read(space->machine, "PLAYERS12");
2727	2947	case (0x308/2): return input_port_read(space->machine, "PLAYERS34");
r9812	r9813
2729	2949	case (0x314/2): return 0xffff;
2730	2950	case (0x31c/2): return input_port_read(space->machine, "DSW2");
2731	2951
2732		case (0x340/2): return 0xffff;
2733		case (0x344/2): return 0xffff;
2734		case (0x348/2): return 0xffff;//seibu_main_word_r(space,2,0xffff);
2735		case (0x34c/2): return 0xffff;//seibu_main_word_r(space,3,0xffff);
2736		case (0x354/2): return 0xffff;//seibu_main_word_r(space,5,0xffff);
2737		case (0x35c/2): return 0xffff;
	2952	case (0x348/2): return seibu_main_word_r(space,2,0xffff);
	2953	case (0x34c/2): return seibu_main_word_r(space,3,0xffff);
	2954	case (0x354/2): return seibu_main_word_r(space,5,0xffff);
2738	2955	}
2739	2956	}
2740	2957
2741		WRITE16_HANDLER( cupsoc_mcu_w )
	2958	WRITE16_HANDLER( cupsocs_mcu_w )
2742	2959	{
2743	2960	COMBINE_DATA(&cop_mcu_ram[offset]);
2744	2961
r9812	r9813
2754	2971	400-5ff - Protection writes
2755	2972	*********************************************************************/
2756	2973
	2974	#if 0
2757	2975	/* Trigger Macro Command */
2758	2976	case (0x100/2):
2759	2977	{
r9812	r9813
2807	3025	}
2808	3026	break;
2809	3027	}
	3028	#endif
2810	3029
2811	3030	/* Video Regs */
2812	3031	case (0x204/2):
r9812	r9813
2840	3059	}
2841	3060	break;
2842	3061	}
2843		/*TODO: what's going on here,some scroll values aren't sent in these locations
2844		but somewhere else?*/
2845		case (0x22c/2): { legionna_scrollram16[0] = cop_mcu_ram[offset]; break; }
2846		case (0x22e/2): { legionna_scrollram16[1] = cop_mcu_ram[offset]; break; }
2847		case (0x230/2): { legionna_scrollram16[2] = cop_mcu_ram[offset]; break; }
2848		case (0x232/2): { legionna_scrollram16[3] = cop_mcu_ram[offset]; break; }
2849		case (0x234/2): { legionna_scrollram16[4] = cop_mcu_ram[offset]; break; }
2850		case (0x236/2): { legionna_scrollram16[5] = cop_mcu_ram[offset]; break; }
2851		case (0x238/2): { legionna_scrollram16[6] = cop_mcu_ram[offset]; break; }
2852		case (0x23a/2): { legionna_scrollram16[7] = cop_mcu_ram[offset]; break; }
2853	3062
	3063	case (0x25c/2): { grainbow_pri_n = cop_mcu_ram[offset]; break; }
	3064	case (0x260/2): { legionna_scrollram16[0] = cop_mcu_ram[offset]; break; }
	3065	case (0x262/2): { legionna_scrollram16[1] = cop_mcu_ram[offset]; break; }
	3066	case (0x264/2): { legionna_scrollram16[2] = cop_mcu_ram[offset]; break; }
	3067	case (0x266/2): { legionna_scrollram16[3] = cop_mcu_ram[offset]; break; }
	3068	case (0x268/2): { legionna_scrollram16[4] = cop_mcu_ram[offset]; break; }
	3069	case (0x26a/2): { legionna_scrollram16[5] = cop_mcu_ram[offset]; break; }
	3070	//case (0x238/2): { legionna_scrollram16[6] = cop_mcu_ram[offset]; break; }
	3071	//case (0x23a/2): { legionna_scrollram16[7] = cop_mcu_ram[offset]; break; }
	3072
2854	3073	case (0x340/2): { seibu_main_word_w(space,0,cop_mcu_ram[offset],0x00ff); break; }
2855	3074	case (0x344/2): { seibu_main_word_w(space,1,cop_mcu_ram[offset],0x00ff); break; }
2856	3075	case (0x350/2): { seibu_main_word_w(space,4,cop_mcu_ram[offset],0x00ff); break; }

src/mame/machine/seicop.h
r9812	r9813
7	7	WRITE16_HANDLER( heatbrl_mcu_w );
8	8	READ16_HANDLER( cupsoc_mcu_r );
9	9	WRITE16_HANDLER( cupsoc_mcu_w );
	10	READ16_HANDLER( cupsocs_mcu_r );
	11	WRITE16_HANDLER( cupsocs_mcu_w );
10	12	READ16_HANDLER( godzilla_mcu_r );
11	13	WRITE16_HANDLER( godzilla_mcu_w );
12	14	READ16_HANDLER( denjinmk_mcu_r );

src/mame/mamedriv.c
r9812	r9813
465	465
466	466	DRIVER( pastelg ) /* (c) 1985 */
467	467	DRIVER( 3ds ) /* (c) 1985 */
	468	DRIVER( galds ) /* (c) 1985 */
468	469
469	470	DRIVER( crystalg ) /* (c) 1986 */
470	471	DRIVER( crystal2 ) /* (c) 1986 */
r9812	r9813
770	771	DRIVER( dspirita ) /* (c) 1987 (Atari license) */
771	772	DRIVER( blazer ) /* (c) 1987 (Japan) */
772	773	DRIVER( quester ) /* (c) 1987 (Japan) */
	774	DRIVER( questers ) /* (c) 1987 (Japan) */
773	775	DRIVER( pacmania ) /* (c) 1987 */
774	776	DRIVER( pacmaniaj ) /* (c) 1987 (Japan) */
775	777	DRIVER( galaga88 ) /* (c) 1987 */
r9812	r9813
957	959	DRIVER( timecrs2b ) /* April 1998 */
958	960	DRIVER( timecrs2c ) /* April 1998 */
959	961	DRIVER( panicprk ) /* May 1998 */
960		/* Race On - September 1998 */
	962	DRIVER( raceon ) /* Race On - September 1998 */
961	963	DRIVER( gunwars ) /* September 1998 */
962	964	/* Angler King - March 1999 */
963	965	DRIVER( 500gp ) /* March 1999 */
r9812	r9813
966	968	/* Guitar Jam - July 1999 */
967	969	DRIVER( crszone ) /* Crisis Zone - December 1999 */
968	970	DRIVER( crszonea ) /* Crisis Zone - December 1999 */
	971	DRIVER( crszoneb ) /* Crisis Zone - December 1999 */
969	972
970	973	/* Namco System 246 */
971	974	DRIVER( sys246 )
r9812	r9813
1816	1819	DRIVER( onna34ro ) /* A52 (c) 1985 Taito Corporation (Japan) */
1817	1820	DRIVER( onna34roa ) /* A52 (c) 1985 Taito Corporation (Japan) */
1818	1821	DRIVER( victnine ) /* A16 (c) 1985 Taito Corporation (Japan) */
	1822	DRIVER( rumba ) /* A23 (c) 1985 Taito Corporation (Japan) */
1819	1823	DRIVER( gladiatr ) /* QB (c) 1986 Taito America Corporation (US) */
1820	1824	DRIVER( ogonsiro ) /* QB (c) 1986 Taito Corporation (Japan) */
1821	1825	DRIVER( greatgur ) /* QB (c) 1986 Taito Corporation (Japan?) */
r9812	r9813
3603	3607	DRIVER( wcbowl16 ) /* (c) 1995 Incredible Technologies */
3604	3608	DRIVER( wcbowl140 ) /* (c) 1995 Incredible Technologies */
3605	3609	DRIVER( wcbowl15 ) /* (c) 1995 Incredible Technologies */
	3610	DRIVER( wcbowl14 ) /* (c) 1995 Incredible Technologies */
3606	3611	DRIVER( wcbowl13 ) /* (c) 1995 Incredible Technologies */
3607	3612	DRIVER( wcbowl12 ) /* (c) 1995 Incredible Technologies */
3608	3613	DRIVER( sftm ) /* (c) 1995 Capcom/Incredible Technologies */
r9812	r9813
3677	3682	DRIVER( pigouta ) /* (c) 1990 Leland */
3678	3683	DRIVER( ataxx ) /* (c) 1990 Leland */
3679	3684	DRIVER( ataxxa ) /* (c) 1990 Leland */
	3685	DRIVER( ataxxe ) /* (c) 1990 Leland */
3680	3686	DRIVER( ataxxj ) /* (c) 1990 Leland */
3681	3687	DRIVER( wsf ) /* (c) 1990 Leland */
3682	3688	DRIVER( indyheat ) /* (c) 1991 Leland */
r9812	r9813
4689	4695	DRIVER( sprtjam ) /* 2000.12 Sports Jam */
4690	4696	/* 2000.12 Derby Owners Club 2000 ver.2 */
4691	4697	/* 2000.?? World Kicks New ver. */
4692		DRIVER( derbyocw ) /* 2001.?? Derby Owners Club World Edition (Rev. C) */
	4698	DRIVER( derbyocw ) /* 2001.?? Derby Owners Club World Edition (Rev. D) */
	4699	DRIVER( drbyocwc ) /* 2001.?? Derby Owners Club World Edition (Rev. C) */
4693	4700	DRIVER( f355twn2 ) /* 2001.01 F355 Challenge 2 */
4694	4701	DRIVER( gwing2 ) /* 2001.01 Giga Wing 2 */
4695	4702	DRIVER( csmash ) /* 2001.01 Cosmic Smash */
r9812	r9813
5434	5441	DRIVER( pandoras ) /* GX328 (c) 1984 + Interlogic */
5435	5442	DRIVER( gyruss ) /* GX347 (c) 1983 */
5436	5443	DRIVER( gyrussce ) /* GX347 (c) 1983 + Centuri license */
	5444	DRIVER( gyrussb ) /* bootleg or actual Taito NZ license? */
5437	5445	DRIVER( venus ) /* bootleg */
5438	5446	DRIVER( trackfld ) /* GX361 (c) 1983 */
5439	5447	DRIVER( trackfldc ) /* GX361 (c) 1983 + Centuri license */
r9812	r9813
5571	5579	DRIVER( suratka ) /* GX911 (c) 1990 (Asia) */
5572	5580	DRIVER( suratkj ) /* GX911 (c) 1990 (Japan) */
5573	5581	DRIVER( parodius ) /* GX955 (c) 1990 (World) */
	5582	DRIVER( parodiusa ) /* GX955 (c) 1990 (World) */
5574	5583	DRIVER( parodiusj ) /* GX955 (c) 1990 (Japan) */
5575	5584	DRIVER( rollerg ) /* GX999 (c) 1991 (US) */
5576	5585	DRIVER( rollergj ) /* GX999 (c) 1991 (Japan) */
r9812	r9813
7207	7216	DRIVER( gauntdl24 ) /* (c) 1999 Midway Games */
7208	7217	DRIVER( cartfury ) /* (c) 2000 Midway Games */
7209	7218
	7219	/* Midway Quicksilver */
	7220	DRIVER( hydrthnd ) /* (c) 1999 Midway Games */
	7221	DRIVER( offrthnd ) /* (c) 2000 Midway Games */
	7222
7210	7223	/* Midway Touchmaster / Galaxy Games */
7211	7224	DRIVER( tm ) /* (c) 1996 Midway Games */
7212	7225	DRIVER( tmdo ) /* (c) 1996 Midway Games */
r9812	r9813
7378	7391	DRIVER( raiden2c ) /* (c) 1993 Seibu Kaihatsu */
7379	7392	DRIVER( raiden2d ) /* (c) 1993 Seibu Kaihatsu */
7380	7393	DRIVER( raiden2e ) /* (c) 1993 Seibu Kaihatsu */
	7394	DRIVER( raiden2f ) /* (c) 1993 Seibu Kaihatsu */
7381	7395	DRIVER( raidndx ) /* (c) 1994 Seibu Kaihatsu */
7382	7396	DRIVER( raidndxj ) /* (c) 1994 Seibu Kaihatsu */
7383	7397	DRIVER( raidndxu ) /* (c) 1994 Seibu Kaihatsu + Fabtek license */
r9812	r9813
7806	7820	DRIVER( galpani2 ) /* (c) 1993 Kaneko */
7807	7821	DRIVER( galpani2g ) /* (c) 1993 Kaneko */
7808	7822	DRIVER( galpani2t ) /* (c) 1993 Kaneko */
	7823	DRIVER( galpani2i ) /* (c) 1993 Kaneko */
7809	7824	DRIVER( galpani2j ) /* (c) 1993 Kaneko */
7810	7825	DRIVER( gp2quiz ) /* (c) 1993 Kaneko */
7811	7826	DRIVER( gp2se ) /* (c) 1994 Kaneko */
r9812	r9813
8030	8045	DRIVER( watrball ) /* (c) 1996 ABM */
8031	8046
8032	8047	/* Sun Electronics / SunSoft games */
	8048	DRIVER( dai3wksi ) /* 1979.09 Dai San Wakusei (The Third Planet) */
8033	8049	DRIVER( speakres ) /* [Sun Electronics] */
8034	8050	DRIVER( stratvox ) /* [1980 Sun Electronics] Taito */
8035	8051	DRIVER( stratvoxb ) /* bootleg */
r9812	r9813
8065	8081	1978.12 (GT)Block Challenger
8066	8082	1979.04 Galaxy Force
8067	8083	1979.07 Run Away
8068		1979.09 Dai San Wakusei (The Third Planet)
8069	8084	1979.12 Warp 1
8070	8085	1980.10 Cosmo Police (Cosmopolis?)
8071	8086	*/
r9812	r9813
8602	8617	DRIVER( keta )
8603	8618	DRIVER( ketb )
8604	8619	DRIVER( ddp3 )
	8620	DRIVER( ddp3a )
	8621	DRIVER( ddp3b )
8605	8622	DRIVER( ddp3blk )
8606	8623	DRIVER( espgal )
8607	8624	DRIVER( orleg2 ) /* (c) 2007 */
r9812	r9813
9261	9278	DRIVER( trvwz3v ) /* (c) 1985 Merit */
9262	9279	DRIVER( trvwz4 ) /* (c) 1985 Merit */
9263	9280	DRIVER( trvwz4a ) /* (c) 1985 Merit */
	9281	DRIVER( dtrvwz5 ) /* (c) 1987 Merit */
9264	9282	DRIVER( tictac ) /* (c) 1985 Merit */
	9283	DRIVER( tictacv ) /* (c) 1985 Merit */
9265	9284	DRIVER( phrcraze ) /* (c) 1986 Merit */
9266	9285	DRIVER( phrcrazea ) /* (c) 1986 Merit */
9267	9286	DRIVER( phrcrazeb ) /* (c) 1986 Merit */
r9812	r9813
10130	10149	DRIVER( moneymacv1 )/* (c) 200? Amcoe */
10131	10150	DRIVER( moneymacd2 )/* (c) 200? Amcoe */
10132	10151	DRIVER( moneymacv2 )/* (c) 200? Amcoe */
10133		//DRIVER( atworld ) /* (c) 2007 Amcoe - Around The World (year listed on Amcoe web site) */
10134		//DRIVER( atworldd1 ) /* (c) 2007 Amcoe (year listed on Amcoe web site) */
10135	10152
10136	10153
10137	10154	DRIVER( chsuper3 ) /* unknown */
r9812	r9813
10233	10250	/* Fruit Cocktail */
10234	10251	//DRIVER( fcockt ) /* (c) 2003 */
10235	10252	//DRIVER( fcockt_2 ) /* (c) 2003 */
10236		//DRIVER( fcockt_3 ) /* (c) 2003 */
	10253	DRIVER( fcockt_3 ) /* (c) 2003 */
10237	10254	//DRIVER( fcockt_4 ) /* (c) 2003 */
10238	10255	DRIVER( fcockt_5 ) /* (c) 2003 */
10239	10256	DRIVER( fcockt_6 ) /* (c) 2003 */
r9812	r9813
10246	10263
10247	10264	/* Lucky Haunter */
10248	10265	//DRIVER( lhaunt ) /* (c) 2003 */
10249		//DRIVER( lhaunt_2 ) /* (c) 2003 */
	10266	DRIVER( lhaunt_2 ) /* (c) 2003 */
10250	10267	//DRIVER( lhaunt_3 ) /* (c) 2003 */
10251	10268	DRIVER( lhaunt_4 ) /* (c) 2003 */
10252	10269	DRIVER( lhaunt_5 ) /* (c) 2003 */
r9812	r9813
10279	10296	DRIVER( sweetl_2 ) /* (c) 2004 */
10280	10297
10281	10298	/* Resident */
10282		//DRIVER( resdnt ) /* (c) 2004 */
	10299	DRIVER( resdnt ) /* (c) 2004 */
10283	10300	DRIVER( resdnt_2 ) /* (c) 2004 */
10284	10301	DRIVER( resdnt_3 ) /* (c) 2004 */
10285	10302
10286	10303	/* Island */
10287	10304	DRIVER( island ) /* (c) 2005 */
	10305	DRIVER( island_2 ) /* (c) 2005 */
10288	10306
10289	10307	/* Pirate */
10290	10308	//DRIVER( pirate ) /* (c) 2005 */
r9812	r9813
10308	10326
10309	10327	/* Gnome */
10310	10328	DRIVER( gnome ) /* (c) 2007 */
	10329	DRIVER( gnome_2 ) /* (c) 2007 */
10311	10330
	10331	/* Sweet Life 2 */
	10332	DRIVER( sweetl2 ) /* (c) 2007 */
	10333
10312	10334	/* Igrosoft bootleg sets */
10313	10335
10314	10336	DRIVER( mfish_3a ) /* bootleg - Multifish */
r9812	r9813
10402	10424	DRIVER( gnomec ) /* bootleg */
10403	10425	DRIVER( gnomed ) /* bootleg */
10404	10426	DRIVER( gnomee ) /* bootleg */
	10427	DRIVER( gnome_2a ) /* bootleg */
	10428
10405	10429	/* Disney */
10406	10430	DRIVER( cdi ) /* Base unit */
10407	10431	DRIVER( quizard ) /* (c) Disney 1996 */

src/mame/includes/multfish.h
r0	r9813
	1	/*************************************************************************
	2
	3	Igrosoft
	4
	5	*************************************************************************/
	6
	7	class multfish_state : public driver_device
	8	{
	9	public:
	10	multfish_state(running_machine &machine, const driver_device_config_base &config)
	11	: driver_device(machine, config) { }
	12
	13	/* Video related */
	14
	15	UINT8* vid;
	16
	17	int disp_enable;
	18	int xor_paltype;
	19	int xor_palette;
	20
	21	tilemap_t *tilemap;
	22	tilemap_t *reel_tilemap;
	23
	24	/* Misc related */
	25
	26	UINT8 rambk;
	27
	28	UINT8 hopper_motor;
	29	UINT8 hopper;
	30
	31	};

src/mame/includes/flstory.h
r9812	r9813
72	72	VIDEO_UPDATE( flstory );
73	73	VIDEO_START( victnine );
74	74	VIDEO_UPDATE( victnine );
	75	VIDEO_START( rumba );
	76	VIDEO_UPDATE( rumba );
75	77
76	78	WRITE8_HANDLER( flstory_videoram_w );
77	79	READ8_HANDLER( flstory_palette_r );

src/mame/includes/raiden2.h
r9812	r9813
10	10	DECLARE_WRITE16_MEMBER( cop_dma_v1_w );
11	11	DECLARE_WRITE16_MEMBER( cop_dma_v2_w );
12	12	DECLARE_WRITE16_MEMBER( cop_scale_w );
	13	DECLARE_WRITE16_MEMBER( cop_dma_adr_rel_w );
13	14	DECLARE_WRITE16_MEMBER( cop_dma_adr_w );
14	15	DECLARE_WRITE16_MEMBER( cop_dma_size_w );
15	16	DECLARE_WRITE16_MEMBER( cop_dma_v3_w );
r9812	r9813
26	27	DECLARE_WRITE16_MEMBER( cop_cmd_w );
27	28	DECLARE_READ16_MEMBER ( cop_itoa_digits_r );
28	29	DECLARE_READ16_MEMBER ( cop_status_r );
	30	DECLARE_READ16_MEMBER ( cop_dist_r );
	31	DECLARE_READ16_MEMBER ( cop_angle_r );
29	32	DECLARE_WRITE16_MEMBER ( cop_dma_trigger_w );
30	33	DECLARE_WRITE16_MEMBER ( cop_tile_bank_2_w );
	34	DECLARE_WRITE16_MEMBER ( tilemap_enable_w );
31	35	DECLARE_WRITE16_MEMBER ( tile_scroll_w );
32	36	DECLARE_WRITE16_MEMBER ( tile_bank_01_w );
33	37	DECLARE_WRITE16_MEMBER ( raiden2_background_w );
34	38	DECLARE_WRITE16_MEMBER ( raiden2_foreground_w );
35		DECLARE_WRITE16_MEMBER ( raiden2_midground_w );
36		DECLARE_WRITE16_MEMBER ( raiden2_text_w );
	39	DECLARE_WRITE16_MEMBER ( raiden2_midground_w );
	40	DECLARE_WRITE16_MEMBER ( raiden2_text_w );
37	41
38	42	DECLARE_WRITE16_MEMBER( sprcpt_val_1_w );
39	43	DECLARE_WRITE16_MEMBER( sprcpt_val_2_w );
r9812	r9813
54	58	DECLARE_READ16_MEMBER( rdx_v33_unknown2_r );
55	59	DECLARE_READ16_MEMBER( nzerotea_unknown_r );
56	60
	61	DECLARE_READ16_MEMBER( raiden2_sound_comms_r );
	62	DECLARE_WRITE16_MEMBER( raiden2_sound_comms_w );
	63
57	64	void common_reset();
58	65
59	66	tilemap_t background_layer,midground_layer,foreground_layer,text_layer;
60	67	UINT16 back_data,fore_data,mid_data, text_data;
61	68	int bg_bank, fg_bank, mid_bank;
	69	UINT16 raiden2_tilemap_enable;
62	70
63	71	UINT16 scrollvals[6];
64	72	UINT32 cop_regs[4], cop_itoa;
65		UINT16 cop_status, cop_scale, cop_itoa_digit_count;
	73	UINT16 cop_status, cop_scale, cop_itoa_digit_count, cop_angle, cop_dist;
66	74	UINT8 cop_itoa_digits[10];
67		UINT16 cop_dma_mode, cop_dma_adr, cop_dma_size, cop_dma_v1, cop_dma_v2, cop_dma_v3;
	75	UINT16 cop_dma_mode, cop_dma_adr, cop_dma_size, cop_dma_v1, cop_dma_v2, cop_dma_v3,cop_dma_adr_rel;
68	76	UINT16 sprites[0x800], sprites_cur_start;
69	77
70	78	UINT16 cop_func_trigger[0x100/8]; /* function trigger */

src/mame/includes/segas32.h
r9812	r9813
29	29	READ16_HANDLER( dbzvrvs_protection_r );
30	30	WRITE16_HANDLER( dbzvrvs_protection_w );
31	31
	32	extern const UINT8 ga2_v25_opcode_table[];
32	33	void decrypt_ga2_protrom(running_machine *machine);
33	34	READ16_HANDLER( ga2_dpram_r );
34	35	WRITE16_HANDLER( ga2_dpram_w );

src/mame/mame.mak
r9812	r9813
898	898	$(DRIVERS)/mcr.o $(MACHINE)/mcr.o $(AUDIO)/mcr.o $(VIDEO)/mcr.o \
899	899	$(DRIVERS)/mcr3.o $(VIDEO)/mcr3.o \
900	900	$(DRIVERS)/mcr68.o $(MACHINE)/mcr68.o $(VIDEO)/mcr68.o \
	901	$(DRIVERS)/midqslvr.o \
901	902	$(DRIVERS)/midtunit.o $(MACHINE)/midtunit.o $(VIDEO)/midtunit.o \
902	903	$(DRIVERS)/midvunit.o $(VIDEO)/midvunit.o \
903	904	$(DRIVERS)/midwunit.o $(MACHINE)/midwunit.o \
r9812	r9813
1187	1188	$(DRIVERS)/panicr.o \
1188	1189	$(DRIVERS)/raiden.o $(VIDEO)/raiden.o \
1189	1190	$(DRIVERS)/raiden2.o $(MACHINE)/r2crypt.o \
	1191	$(DRIVERS)/r2dx_v33.o \
1190	1192	$(DRIVERS)/seibuspi.o $(MACHINE)/seibuspi.o $(VIDEO)/seibuspi.o \
1191	1193	$(VIDEO)/sei_crtc.o \
1192	1194	$(DRIVERS)/sengokmj.o \
r9812	r9813
1252	1254
1253	1255	$(MAMEOBJ)/sun.a: \
1254	1256	$(DRIVERS)/arabian.o $(VIDEO)/arabian.o \
	1257	$(DRIVERS)/dai3wksi.o \
1255	1258	$(DRIVERS)/ikki.o $(VIDEO)/ikki.o \
1256	1259	$(DRIVERS)/kangaroo.o $(VIDEO)/kangaroo.o \
1257	1260	$(DRIVERS)/markham.o $(VIDEO)/markham.o \

src/mame/video/flstory.c
r9812	r9813
40	40	flags);
41	41	}
42	42
	43	static TILE_GET_INFO( get_rumba_tile_info )
	44	{
	45	flstory_state *state = machine->driver_data<flstory_state>();
	46	int code = state->videoram[tile_index * 2];
	47	int attr = state->videoram[tile_index * 2 + 1];
	48	int tile_number = code + ((attr & 0xc0) << 2) + 0x400 + 0x800 * state->char_bank;
	49	int col = (attr & 0x0f);
43	50
	51	tileinfo->category = (attr & 0x20) >> 5;
	52	tileinfo->group = (attr & 0x20) >> 5;
	53	SET_TILE_INFO(
	54	0,
	55	tile_number,
	56	col,
	57	0);
	58	}
	59
44	60	VIDEO_START( flstory )
45	61	{
46	62	flstory_state *state = machine->driver_data<flstory_state>();
r9812	r9813
56	72	state_save_register_global_pointer(machine, machine->generic.paletteram2.u8, 0x200);
57	73	}
58	74
	75	VIDEO_START( rumba )
	76	{
	77	flstory_state *state = machine->driver_data<flstory_state>();
	78	state->bg_tilemap = tilemap_create(machine, get_rumba_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	79	// tilemap_set_transparent_pen(state->bg_tilemap, 15);
	80	tilemap_set_transmask(state->bg_tilemap, 0, 0x3fff, 0xc000); /* split type 0 has pens 0-13 transparent in front half */
	81	tilemap_set_transmask(state->bg_tilemap, 1, 0x8000, 0x7fff); /* split type 1 has pen 15 transparent in front half */
	82	tilemap_set_scroll_cols(state->bg_tilemap, 32);
	83
	84	machine->generic.paletteram.u8 = auto_alloc_array(machine, UINT8, 0x200);
	85	machine->generic.paletteram2.u8 = auto_alloc_array(machine, UINT8, 0x200);
	86	state_save_register_global_pointer(machine, machine->generic.paletteram.u8, 0x200);
	87	state_save_register_global_pointer(machine, machine->generic.paletteram2.u8, 0x200);
	88	}
	89
59	90	VIDEO_START( victnine )
60	91	{
61	92	flstory_state *state = machine->driver_data<flstory_state>();
r9812	r9813
256	287	victnine_draw_sprites(screen->machine, bitmap, cliprect);
257	288	return 0;
258	289	}
	290
	291	VIDEO_UPDATE( rumba )
	292	{
	293	flstory_state *state = screen->machine->driver_data<flstory_state>();
	294	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0 \| TILEMAP_DRAW_LAYER1, 0);
	295	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 1 \| TILEMAP_DRAW_LAYER1, 0);
	296	victnine_draw_sprites(screen->machine, bitmap, cliprect);
	297	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0 \| TILEMAP_DRAW_LAYER0, 0);
	298	victnine_draw_sprites(screen->machine, bitmap, cliprect);
	299	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 1 \| TILEMAP_DRAW_LAYER0, 0);
	300	return 0;
	301	}

src/mame/video/pgm.c
r9812	r9813
261	261	if (xpos > 0x3ff) xpos -=0x800;
262	262	if (ypos > 0x1ff) ypos -=0x400;
263	263
264		if (hi~~gh == 0~~) break; /* is this right? */
	264	if (!sprite_source[4]) break; /* is this right? */
265	265
266	266	//if ((priority == 1) && (pri == 0)) break;
267	267
r9812	r9813
303	303	colour = (state->tx_videoram[tile_index * 2 + 1] & 0x3e) >> 1;
304	304	flipyx = (state->tx_videoram[tile_index * 2 + 1] & 0xc0) >> 6;
305	305
306		if (tileno > 0xbfff) { tileno -= 0xc000 ; tileno += 0x20000; } /* not sure about this */
307
308	306	SET_TILE_INFO(0,tileno,colour,TILE_FLIPYX(flipyx));
309	307	}
310	308
r9812	r9813
325	323	int tileno, colour, flipyx;
326	324
327	325	tileno = state->bg_videoram[tile_index *2] & 0xffff;
328		if (tileno > 0x7ff)
329		tileno += 0x1000; /* Tiles 0x800+ come from the GAME Roms */
	326
330	327	colour = (state->bg_videoram[tile_index * 2 + 1] & 0x3e) >> 1;
331	328	flipyx = (state->bg_videoram[tile_index * 2 + 1] & 0xc0) >> 6;
332	329

src/mame/video/vball.c
r9812	r9813
53	53	bg_tilemap = tilemap_create(machine, get_bg_tile_info,background_scan, 8, 8,64,64);
54	54
55	55	tilemap_set_scroll_rows(bg_tilemap,32);
	56	vball_gfxset=0;
56	57	vb_bgprombank=0xff;
57	58	vb_spprombank=0xff;
58	59	}

src/mame/video/m107.c
r9812	r9813
30	30	Playfield control:
31	31	Bit 0x0f00: Playfield location in VRAM (in steps of 0x1000)
32	32	Bit 0x0080: 0 = Playfield enable, 1 = disable
33		Bit 0x0002: 1 = Rowscroll enable, 0 = disable
	33	Bit 0x0002: 1 = Rowselect enable, 0 = disable
	34	Bit 0x0001: 1 = Rowscroll enable, 0 = disable
34	35
35	36	*****************************************************************************/
36	37
r9812	r9813
53	54	UINT16 *m107_vram_data;
54	55	UINT16 m107_raster_irq_position;
55	56	UINT8 m107_spritesystem;
	57	UINT8 m107_sprite_display;
56	58
57	59
58	60	/*****************************************************************************/
r9812	r9813
97	99
98	100	COMBINE_DATA(&m107_control[offset]);
99	101
100		switch (offset)
	102	switch (offset*2)
101	103	{
102		case 0x08: /* Playfield 1 (top layer) */
103		case 0x09: /* Playfield 2 */
104		case 0x0a: /* Playfield 3 */
105		case 0x0b: /* Playfield 4 (bottom layer) */
	104	case 0x10: /* Playfield 1 (top layer) */
	105	case 0x12: /* Playfield 2 */
	106	case 0x14: /* Playfield 3 */
	107	case 0x16: /* Playfield 4 (bottom layer) */
106	108	layer = &pf_layer[offset - 0x08];
107	109
108	110	/* update VRAM base (bits 8-11) */
r9812	r9813
114	116	/* mark everything dirty of the VRAM base changes */
115	117	if ((old ^ m107_control[offset]) & 0x0f00)
116	118	tilemap_mark_all_tiles_dirty(layer->tmap);
	119
	120	if(m107_control[offset] & 0xf07c)
	121	printf("%04x %02x\n",m107_control[offset],offset*2);
	122
117	123	break;
118	124
119		case 0x0f:
	125	case 0x18:
	126	case 0x1a:
	127	case 0x1c:
	128	break;
	129
	130	case 0x1e:
120	131	m107_raster_irq_position = m107_control[offset] - 128;
121	132	break;
122	133	}
r9812	r9813
152	163
153	164	/*****************************************************************************/
154	165
155		static void draw_sprites(running_machine machine, bitmap_t bitmap, const rectangle *cliprect~~, int pri~~)
	166	static void draw_sprites(running_machine machine, bitmap_t bitmap, const rectangle *cliprect)
156	167	{
157	168	int offs;
158	169	UINT8 *rom = memory_region(machine, "user1");
159	170
160		for (offs = 0~~x800-4~~;offs >= 0;offs -= 4)
	171	for (offs = 0;offs < 0x800;offs += 4)
161	172	{
162		int x,y,sprite,colour,fx,fy,y_multi,i,s_ptr;
	173	int x,y,sprite,colour,fx,fy,y_multi,i,s_ptr,pri_mask;
163	174
164		if (((m107_spriteram[offs+2]&0x80)==0x80) && pri==0) continue;
165		if (((m107_spriteram[offs+2]&0x80)==0x00) && pri==1) continue;
	175	pri_mask = (!(m107_spriteram[offs+2]&0x80)) ? 2 : 0;
166	176
167	177	y=m107_spriteram[offs+0];
168	178	x=m107_spriteram[offs+3];
r9812	r9813
177	187	y = 384 - 16 - y;
178	188
179	189	colour=m107_spriteram[offs+2]&0x7f;
180		fx=m107_spriteram[offs+2]&0x100;
181		fy=m107_spriteram[offs+2]&0x200;
	190	fx=(m107_spriteram[offs+2]>>8)&0x1;
	191	fy=(m107_spriteram[offs+2]>>8)&0x2;
182	192	y_multi=(m107_spriteram[offs+0]>>11)&0x3;
183	193
184	194	if (m107_spritesystem == 0)
r9812	r9813
190	200
191	201	for (i=0; i<y_multi; i++)
192	202	{
193		drawgfx_transpen(bitmap,cliprect,machine->gfx[1],
	203	pdrawgfx_transpen(bitmap,cliprect,machine->gfx[1],
194	204	sprite + s_ptr,
195	205	colour,
196	206	fx,fy,
197		x,y-i*16,0);
	207	x,y-i*16,
	208	machine->priority_bitmap,pri_mask,0);
	209
	210	/* wrap-around y */
	211	pdrawgfx_transpen(bitmap,cliprect,machine->gfx[1],
	212	sprite + s_ptr,
	213	colour,
	214	fx,fy,
	215	x,(y-i*16) - 0x200,
	216	machine->priority_bitmap,pri_mask,0);
	217
198	218	if (fy) s_ptr++; else s_ptr--;
199	219	}
200	220	}
r9812	r9813
206	226	{
207	227	while (rom_offs < 0x40000) /* safety check */
208	228	{
	229	/*
	230	[1]
	231	x--- ---- end of block marker
	232	---- --x- Flip Y
	233	---- ---x Flip X
	234	[2]
	235	xxxx xxxx Y offs lo byte
	236	[3]
	237	---- xxx- height (1/2/4/8)
	238	---- ---x Y offs hi byte
	239	[4]
	240	xxxx xxxx sprite number lo byte
	241	[5]
	242	xxxx xxxx sprite number hi byte
	243	[6]
	244	xxxx xxxx X offs lo byte
	245	[7]
	246	---- ---x X offs hi byte
	247	*/
	248
209	249	int xdisp = rom[rom_offs+6]+256*rom[rom_offs+7];
210	250	int ydisp = rom[rom_offs+2]+256*rom[rom_offs+3];
211	251	int ffx=fx^(rom[rom_offs+1]&1);
212	252	int ffy=fy^(rom[rom_offs+1]&2);
213	253	sprite=rom[rom_offs+4]+256*rom[rom_offs+5];
214	254	y_multi=1<<((rom[rom_offs+3]>>1)&0x3);
215		if (fx) xdisp = -xdisp;
	255	if (fx) xdisp = -xdisp-16;
216	256	if (fy) ydisp = -ydisp - (16*y_multi-1);
217	257	if (!ffy) sprite+=y_multi-1;
218	258	for (i=0; i<y_multi; i++)
219	259	{
220		drawgfx_transpen(bitmap,cliprect,machine->gfx[1],
	260	pdrawgfx_transpen(bitmap,cliprect,machine->gfx[1],
221	261	sprite+(ffy?i:-i),
222	262	colour,
223	263	ffx,ffy,
224		(x+xdisp)&0x1ff,(y-ydisp-16*i)&0x1ff,0);
	264	(x+xdisp)&0x1ff,(y-ydisp-16*i)&0x1ff,
	265	machine->priority_bitmap,pri_mask,0);
	266
	267	/* wrap-around y */
	268	pdrawgfx_transpen(bitmap,cliprect,machine->gfx[1],
	269	sprite+(ffy?i:-i),
	270	colour,
	271	ffx,ffy,
	272	(x+xdisp)&0x1ff,((y-ydisp-16*i)&0x1ff)-0x200,
	273	machine->priority_bitmap,pri_mask,0);
225	274	}
226	275
227	276	if (rom[rom_offs+1]&0x80) break; /* end of block */
r9812	r9813
240	289	int laynum;
241	290	int i;
242	291
243		/* Playfield 4 rowscroll data is 0xde800 - 0xdebff???
244		Playfield 3 rowscroll data is 0xdf800 - 0xdfbff
245		Playfield 2 rowscroll data is 0xdf400 - 0xdf7ff
246		Playfield 1 rowscroll data is 0xde800 - 0xdebff ??
	292	/*
	293	rowscroll is at 0xde000 - 0xde7ff, every layer has dedicated 0x200 bytes inside this area, enabled with bit 0 of the layer video register
	294	rowselect is at 0xde800 - 0xdefff, every layer has dedicated 0x200 bytes inside this area, enabled with bit 1 of the layer video register
	295	Perhaps 0xdf000 - 0xdffff and bit 2-3 are respectively colscroll and colselect?
247	296	*/
248	297
249	298	for (laynum = 0; laynum < 4; laynum++)
250	299	{
251	300	pf_layer_info *layer = &pf_layer[laynum];
252	301
253		if (m107_control[0x08 + laynum] & 0x02)
	302	int scrolly = m107_control[0 + 2 * laynum];
	303	int scrollx = m107_control[1 + 2 * laynum];
	304
	305	if (m107_control[0x08 + laynum] & 0x01) //used by World PK Soccer goal scrolling and Fire Barrel sea wave effect (stage 2) / canyon parallax effect (stage 6)
254	306	{
255		const UINT16 scrolldata = m107_vram_data + (0xe800 + 0x400 laynum) / 2;
	307	const UINT16 scrolldata = m107_vram_data + (0xe000 + 0x200 laynum) / 2;
256	308
257	309	tilemap_set_scroll_rows(layer->tmap, 512);
258	310	for (i = 0; i < 512; i++)
259		tilemap_set_scrollx(layer->tmap, i, scrolldata[i] + m107_control[1 + 2 * laynum]);
	311	tilemap_set_scrollx(layer->tmap, i, scrolldata[((i+0xff80)-(scrolly))&0x1ff] + scrollx);
	312
260	313	}
261	314	else
262	315	{
263	316	tilemap_set_scroll_rows(layer->tmap, 1);
264		tilemap_set_scrollx(layer->tmap, 0, ~~m107_~~c~~ont~~rol[1 + 2 * l~~aynum]~~);
	317	tilemap_set_scrollx(layer->tmap, 0, scrollx);
265	318	}
266	319
267		tilemap_set_scrolly(layer->tmap, 0, ~~m107_~~c~~ont~~rol[0 + 2 * lay~~num]~~);
	320	tilemap_set_scrolly(layer->tmap, 0,scrolly);
268	321	}
269	322	}
270	323
271	324	/*****************************************************************************/
272	325
	326	static void m107_tilemap_draw(running_machine machine, bitmap_t bitmap, const rectangle *cliprect, int laynum, int category,int opaque)
	327	{
	328	int line;
	329	rectangle clip;
	330	const rectangle &visarea = machine->primary_screen->visible_area();
	331	clip.min_x = visarea.min_x;
	332	clip.max_x = visarea.max_x;
	333	clip.min_y = visarea.min_y;
	334	clip.max_y = visarea.max_y;
	335
	336	if (m107_control[0x08 + laynum] & 0x02)
	337	{
	338	for (line = cliprect->min_y; line <= cliprect->max_y;line++)
	339	{
	340	const UINT16 scrolldata = m107_vram_data + (0xe800 + 0x200 laynum) / 2;
	341	clip.min_y = clip.max_y = line;
	342
	343	tilemap_set_scrollx(pf_layer[laynum].tmap,0, m107_control[1 + 2 * laynum]);
	344	tilemap_set_scrolly(pf_layer[laynum].tmap,0, (m107_control[0 + 2 * laynum] + scrolldata[line]));
	345
	346	tilemap_draw(bitmap, &clip, pf_layer[laynum].tmap, category \| opaque, category);
	347	}
	348	}
	349	else
	350	tilemap_draw(bitmap, cliprect, pf_layer[laynum].tmap, category \| opaque, category);
	351	}
	352
	353
273	354	static void m107_screenrefresh(running_machine machine, bitmap_t bitmap, const rectangle *cliprect)
274	355	{
	356	bitmap_fill(machine->priority_bitmap, cliprect, 0);
	357
275	358	if ((~m107_control[0x0b] >> 7) & 1)
276	359	{
277		tilemap_draw(bitmap, cliprect, pf_layer[3].tmap, 0, 0);
278		tilemap_draw(bitmap, cliprect, pf_layer[3].tmap, 1, 0);
	360	m107_tilemap_draw(machine, bitmap, cliprect, 3, 0,0);
	361	m107_tilemap_draw(machine, bitmap, cliprect, 3, 1,0);
279	362	}
280	363	else
281	364	bitmap_fill(bitmap, cliprect, 0);
282	365
283		tilemap_draw(bitmap, cliprect, pf_layer[2].tmap, 0, 0);
284		tilemap_draw(bitmap, cliprect, pf_layer[2].tmap, 1, 0);
	366	/* note: the opaque flag is used if layer 3 is disabled, noticeable in World PK Soccer title and gameplay screens */
	367	m107_tilemap_draw(machine, bitmap, cliprect, 2, 0,(((m107_control[0x0b] >> 7) & 1) ? TILEMAP_DRAW_OPAQUE : 0));
	368	m107_tilemap_draw(machine, bitmap, cliprect, 1, 0,0);
	369	m107_tilemap_draw(machine, bitmap, cliprect, 0, 0,0);
	370	m107_tilemap_draw(machine, bitmap, cliprect, 2, 1,0);
	371	m107_tilemap_draw(machine, bitmap, cliprect, 1, 1,0);
	372	m107_tilemap_draw(machine, bitmap, cliprect, 0, 1,0);
285	373
286		tilemap_draw(bitmap, cliprect, pf_layer[1].tmap, 0, 0);
287		tilemap_draw(bitmap, cliprect, pf_layer[0].tmap, 0, 0);
	374	if(m107_sprite_display)
	375	draw_sprites(machine, bitmap, cliprect);
288	376
289		draw_sprites(machine, bitmap, cliprect, 0);
290		tilemap_draw(bitmap, cliprect, pf_layer[1].tmap, 1, 0);
291		tilemap_draw(bitmap, cliprect, pf_layer[0].tmap, 1, 0);
292
293		draw_sprites(machine, bitmap, cliprect, 1);
294
295	377	/* This hardware probably has more priority values - but I haven't found
296	378	any used yet */
297	379	}
r9812	r9813
301	383	WRITE16_HANDLER( m107_spritebuffer_w )
302	384	{
303	385	if (ACCESSING_BITS_0_7) {
	386	/*
	387	TODO: this register looks a lot more complex than how the game uses it. All of them seems to test various bit combinations during POST.
	388	*/
304	389	// logerror("%04x: buffered spriteram\n",cpu_get_pc(space->cpu));
	390	m107_sprite_display = (!(data & 0x1000));
	391
305	392	memcpy(m107_spriteram,space->machine->generic.spriteram.u16,0x1000);
306	393	}
307	394	}

src/mame/drivers/csplayh5.c
r9812	r9813
108	108	#if USE_H8
109	109	static READ16_HANDLER( test_r )
110	110	{
111		return ~~0;//~~mame_rand(space->machine);
	111	return mame_rand(space->machine);
112	112	}
113	113
114	114	static ADDRESS_MAP_START( csplayh5_sub_map, ADDRESS_SPACE_PROGRAM, 16 )

src/mame/drivers/balsente.c
r9812	r9813
2227	2227	GAME( 1986, spiker, 0, balsente, spiker, spiker, ROT0, "Bally/Sente", "Spiker", GAME_SUPPORTS_SAVE )
2228	2228
2229	2229	/* Board: Unknown */
	2230	GAME( 1986, shrike, 0, shrike, shrike, shrike, ROT0, "Bally/Sente", "Shrike Avenger (prototype)", GAME_SUPPORTS_SAVE )
2230	2231	GAME( 1986, stompin, 0, balsente, stompin, stompin, ROT0, "Bally/Sente", "Stompin'", GAME_SUPPORTS_SAVE )
2231	2232	GAME( 1987, rescraid, 0, balsente, rescraid, rescraid, ROT0, "Bally Midway", "Rescue Raider", GAME_SUPPORTS_SAVE )
2232	2233	GAME( 1987, rescraida,rescraid, balsente, rescraid, rescraid, ROT0, "Bally Midway", "Rescue Raider (stand-alone)", GAME_SUPPORTS_SAVE )
2233	2234	GAME( 198?, grudge, 0, balsente, grudge, grudge, ROT0, "Bally Midway", "Grudge Match (prototype)", GAME_SUPPORTS_SAVE )
2234		GAME( 198?, shrike, 0, shrike, shrike, shrike, ROT0, "Bally/Sente", "Shrike Avenger (prototype)", GAME_SUPPORTS_SAVE )

src/mame/drivers/cclimber.c
r9812	r9813
1577	1577	/* 0x3800-0x3fff - empty */
1578	1578
1579	1579	ROM_REGION( 0x1000, "gfx2", 0 )
1580		ROM_LOAD( "rp10.6a", 0x0000, 0x0800, CRC(59747c31) SHA1(92acf07489f3e17f0c1769a0df15b6ddb117830f) )
1581		ROM_LOAD( "rp11.6c", 0x0800, 0x0800, CRC(065651a5) SHA1(5c2f9b44d8819d2f792525c06b5c341fe07329c0) )
	1580	ROM_LOAD( "rp11.6c", 0x0000, 0x0800, CRC(065651a5) SHA1(5c2f9b44d8819d2f792525c06b5c341fe07329c0) )
	1581	ROM_LOAD( "rp10.6a", 0x0800, 0x0800, CRC(59747c31) SHA1(92acf07489f3e17f0c1769a0df15b6ddb117830f) )
1582	1582
1583	1583	ROM_REGION( 0x0060, "proms", 0 )
1584	1584	ROM_LOAD( "bprom1.9n", 0x0000, 0x0020, CRC(f9a2383b) SHA1(4d88c177740efdb27708474c9ee0fcdca5a78c36) )
r9812	r9813
1629	1629	/* 0x3800-0x3fff - empty */
1630	1630
1631	1631	ROM_REGION( 0x1000, "gfx2", 0 )
1632		ROM_LOAD( "rp10.6a", 0x0000, 0x0800, CRC(59747c31) SHA1(92acf07489f3e17f0c1769a0df15b6ddb117830f) )
1633		ROM_LOAD( "rp11.6c", 0x0800, 0x0800, CRC(065651a5) SHA1(5c2f9b44d8819d2f792525c06b5c341fe07329c0) )
	1632	ROM_LOAD( "rp11.6c", 0x0000, 0x0800, CRC(065651a5) SHA1(5c2f9b44d8819d2f792525c06b5c341fe07329c0) )
	1633	ROM_LOAD( "rp10.6a", 0x0800, 0x0800, CRC(59747c31) SHA1(92acf07489f3e17f0c1769a0df15b6ddb117830f) )
1634	1634
1635	1635	ROM_REGION( 0x0060, "proms", 0 )
1636	1636	ROM_LOAD( "bprom1.9n", 0x0000, 0x0020, CRC(f9a2383b) SHA1(4d88c177740efdb27708474c9ee0fcdca5a78c36) )

src/mame/drivers/forte2.c
r9812	r9813
94	94	vdp_interrupt
95	95	};
96	96
	97	static STATE_POSTLOAD ( forte2 )
	98	{
	99	TMS9928A_post_load(machine);
	100	}
	101
97	102	static MACHINE_START( forte2 )
98	103	{
99	104	TMS9928A_configure(&tms9928a_interface);
r9812	r9813
102	107
103	108	/* register for save states */
104	109	state_save_register_global(machine, forte2_input_mask);
	110	state_save_register_postload(machine, forte2, NULL);
105	111	}
106	112
107	113	static MACHINE_RESET( forte2 )
r9812	r9813
130	136	MDRV_SCREEN_MODIFY("screen")
131	137	MDRV_SCREEN_REFRESH_RATE((float)XTAL_10_738635MHz/2/342/262)
132	138	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
133		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(4458)) /* 70 lines */
	139	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(4395)) /* 69 lines */
134	140
135	141	/* sound hardware */
136	142	MDRV_SPEAKER_STANDARD_MONO("mono")

src/mame/drivers/namcops2.c
r9812	r9813
332	332	SYSTEM246_BIOS
333	333
334	334	ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
335		ROM_LOAD( "scp1vera.ic002", 0x000000, 0x800000, NO_DUMP )
336		ROM_LOAD( "scp1vera_spr.ic002", 0x800000, 0x040000, NO_DUMP )
	335	ROM_LOAD( "scp1vera.ic002", 0x000000, 0x800000, CRC(4743a999) SHA1(97ae15d75dd9b80411d101b97dd215e31de56390) )
	336	ROM_LOAD( "scp1vera_spr.ic002", 0x800000, 0x040000, CRC(b7094978) SHA1(1e4903cd5f594c13dad2fd74666ba35c62550044) )
337	337
338	338	DISK_REGION("dvd")
339	339	DISK_IMAGE_READONLY( "scp1cd0", 0, SHA1(19fa70ba22787704c40f0a8f27bc841218bbc99b) )

src/mame/drivers/photon2.c
r9812	r9813
361	361	ROM_LOAD( "brod13.bin", 0xa000, 0x2000, CRC(1177cd17) SHA1(58c5c09a7b857ce6311339c4d0f4d8c1a7e232a3) )
362	362	ROM_END
363	363
364		GAME( 19??, kok, 0, photon2, photon2, 0, ROT0, "<unknown>", "Povar / Sobrat' Buran / Agroprom (Arcade multi-game bootleg of ZX Spectrum 'Cookie', 'Jetpac' & 'Pssst')", 0 ) // originals (c)1983 ACG / Ultimate
365		GAME( 19??, black, 0, photon2, black, 0, ROT0, "<unknown>", "Czernyj Korabl (Arcade bootleg of ZX Spectrum 'Blackbeard')", 0 ) // original (c)1988 Toposoft
366		GAME( 19??, brod, 0, photon2, black, 0, ROT0, "<unknown>", "Brodjaga (Arcade bootleg of ZX Spectrum 'Inspector Gadget and the Circus of Fear')", 0 ) // original (c)1987 BEAM software
	364	GAME( 19??, kok, 0, photon2, photon2, 0, ROT0, "bootleg", "Povar / Sobrat' Buran / Agroprom (Arcade multi-game bootleg of ZX Spectrum 'Cookie', 'Jetpac' & 'Pssst')", 0 ) // originals (c)1983 ACG / Ultimate
	365	GAME( 19??, black, 0, photon2, black, 0, ROT0, "bootleg", "Czernyj Korabl (Arcade bootleg of ZX Spectrum 'Blackbeard')", 0 ) // original (c)1988 Toposoft
	366	GAME( 19??, brod, 0, photon2, black, 0, ROT0, "bootleg", "Brodjaga (Arcade bootleg of ZX Spectrum 'Inspector Gadget and the Circus of Fear')", 0 ) // original (c)1987 BEAM software

src/mame/drivers/ataxx.c
r9812	r9813
427	427	ROM_LOAD16_WORD( "eeprom-ataxx.bin", 0x0000, 0x0100, CRC(989cdb8c) SHA1(13b30a328e71a195960e98e50d1657a8b6860dcf) )
428	428	ROM_END
429	429
	430	ROM_START( ataxxe )
	431	ROM_REGION( 0x30000, "master", 0 )
	432	ROM_LOAD( "euro_ataxx_u38_3079.bin", 0x00000, 0x20000, CRC(16aef3b7) SHA1(b2de1e3fd032ab8cc5ed995522f528f0b3283d8a) )
	433	ROM_RELOAD( 0x10000, 0x20000 )
430	434
	435	ROM_REGION( 0x60000, "slave", 0 )
	436	ROM_LOAD( "e-302-31012-01.u111", 0x00000, 0x20000, CRC(9a3297cc) SHA1(1dfa0bacd2f2b18d44bfc2d55c40291c1b142f8f) )
	437	ROM_LOAD( "e-302-31013-01.u112", 0x20000, 0x20000, CRC(7e7c3e2f) SHA1(a7e31e1f1b09414c40ab9ace5e9bffbdbaee8704) )
	438	ROM_LOAD( "e-302-31014-01.u113", 0x40000, 0x20000, CRC(8cf3e101) SHA1(672a3a0ca0f5334cf614bc49cbc1ae5ccea54cbe) )
	439
	440	ROM_REGION( 0x100000, "audiocpu", 0 )
	441	ROM_LOAD16_BYTE( "302-38003-01.u15", 0x20001, 0x20000, CRC(db266d3f) SHA1(31c9baf4548b23e1e1939069620a937ee98a7b09) )
	442	ROM_LOAD16_BYTE( "302-38001-01.u1", 0x20000, 0x20000, CRC(d6db2724) SHA1(d3c7b45b165eb7c9a6369863b273ecac5c31ca65) )
	443	ROM_LOAD16_BYTE( "302-38004-01.u16", 0x60001, 0x20000, CRC(2b127f56) SHA1(909fed387ad6bb1d83f9cee271e6dc851ac50525) )
	444	ROM_RELOAD( 0xc0001, 0x20000 )
	445	ROM_LOAD16_BYTE( "302-38002-01.u2", 0x60000, 0x20000, CRC(1b63b882) SHA1(cb04e641fc173f787a0f48c98f5198db265c26d8) )
	446	ROM_RELOAD( 0xc0000, 0x20000 )
	447
	448	ROM_REGION( 0xc0000, "gfx1", 0 )
	449	ROM_LOAD( "e-302-31006-01.u98", 0x00000, 0x20000, CRC(59d0f2ae) SHA1(8da5dc006e192af98458227e79421b6a07ac1cdc) )
	450	ROM_LOAD( "e-302-31007-01.u99", 0x20000, 0x20000, CRC(6ab7db25) SHA1(25c2fa23b99ac4bab5a9b851c2087de44512a5c2) )
	451	ROM_LOAD( "e-302-31008-01.u100", 0x40000, 0x20000, CRC(2352849e) SHA1(f49394b6efb6a87d86516ec0a5ddd582f96f7e5d) )
	452	ROM_LOAD( "e-302-31009-01.u101", 0x60000, 0x20000, CRC(4c31e02b) SHA1(2d8dd97a2a737bafb44dced7ce3eef22d7d14cbe) )
	453	ROM_LOAD( "e-302-31010-01.u102", 0x80000, 0x20000, CRC(a951228c) SHA1(7ec5cf4d0aa3702be9236d155bea373a06c0be03) )
	454	ROM_LOAD( "e-302-31011-01.u103", 0xa0000, 0x20000, CRC(ed326164) SHA1(8706192f525ece200587cee7e7beb4a1975bf63e) )
	455
	456	ROM_REGION( 0x00001, "user1", ROMREGION_ERASEFF ) /* X-ROM (data used by main processor) */
	457	/* Empty / not used */
	458
	459	ROM_REGION16_BE( 0x100, "eeprom", 0 )
	460	ROM_LOAD16_WORD( "eeprom-ataxxe.bin", 0x0000, 0x0100, CRC(8df1dee1) SHA1(876c5d5d506c31fdf4c3e611a1869b50ceadc6fd) )
	461	ROM_END
	462
	463
431	464	ROM_START( ataxxj )
432	465	ROM_REGION( 0x30000, "master", 0 )
433	466	ROM_LOAD( "ataxxj.u38", 0x00000, 0x20000, CRC(513fa7d4) SHA1(1aada72214c0165d76667935855bf996a5b3d55b) )
r9812	r9813
439	472	ROM_LOAD( "e-302-31014-01.u113", 0x40000, 0x20000, CRC(8cf3e101) SHA1(672a3a0ca0f5334cf614bc49cbc1ae5ccea54cbe) )
440	473
441	474	ROM_REGION( 0x100000, "audiocpu", 0 )
442		ROM_LOAD16_BYTE( "ataxxj.u15", 0x20001, 0x20000, CRC(db266d3f) SHA1(31c9baf4548b23e1e1939069620a937ee98a7b09) )
443		ROM_LOAD16_BYTE( "ataxxj.u1", 0x20000, 0x20000, CRC(d6db2724) SHA1(d3c7b45b165eb7c9a6369863b273ecac5c31ca65) )
444		ROM_LOAD16_BYTE( "ataxxj.u16", 0x60001, 0x20000, CRC(2b127f56) SHA1(909fed387ad6bb1d83f9cee271e6dc851ac50525) )
	475	ROM_LOAD16_BYTE( "302-38003-01.u15", 0x20001, 0x20000, CRC(db266d3f) SHA1(31c9baf4548b23e1e1939069620a937ee98a7b09) )
	476	ROM_LOAD16_BYTE( "302-38001-01.u1", 0x20000, 0x20000, CRC(d6db2724) SHA1(d3c7b45b165eb7c9a6369863b273ecac5c31ca65) )
	477	ROM_LOAD16_BYTE( "302-38004-01.u16", 0x60001, 0x20000, CRC(2b127f56) SHA1(909fed387ad6bb1d83f9cee271e6dc851ac50525) )
445	478	ROM_RELOAD( 0xc0001, 0x20000 )
446		ROM_LOAD16_BYTE( "~~ataxxj~~.u2", 0x60000, 0x20000, CRC(1b63b882) SHA1(cb04e641fc173f787a0f48c98f5198db265c26d8) )
	479	ROM_LOAD16_BYTE( "302-38002-01.u2", 0x60000, 0x20000, CRC(1b63b882) SHA1(cb04e641fc173f787a0f48c98f5198db265c26d8) )
447	480	ROM_RELOAD( 0xc0000, 0x20000 )
448	481
449	482	ROM_REGION( 0xc0000, "gfx1", 0 )
r9812	r9813
757	790
758	791	GAME( 1990, ataxx, 0, ataxx, ataxx, ataxx, ROT0, "Leland Corp.", "Ataxx (set 1)", 0 )
759	792	GAME( 1990, ataxxa, ataxx, ataxx, ataxx, ataxx, ROT0, "Leland Corp.", "Ataxx (set 2)", 0 )
	793	GAME( 1990, ataxxe, ataxx, ataxx, ataxx, ataxx, ROT0, "Leland Corp.", "Ataxx (Europe)", 0 )
760	794	GAME( 1990, ataxxj, ataxx, ataxx, ataxx, ataxxj, ROT0, "Leland Corp.", "Ataxx (Japan)", 0 )
761	795	GAME( 1990, wsf, 0, wsf, wsf, wsf, ROT0, "Leland Corp.", "World Soccer Finals", 0 )
762	796	GAME( 1991, indyheat, 0, wsf, indyheat, indyheat, ROT0, "Leland Corp.", "Danny Sullivan's Indy Heat", 0 )

src/mame/drivers/pgm.c
r9812	r9813
704	704
705	705	AM_RANGE(0x700006, 0x700007) AM_WRITENOP // Watchdog?
706	706
707		// AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) AM_SHARE("sram") /* Main Ram */
708		AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_BASE(&pgm_mainram) AM_SHARE("sram") /* Main Ram */
709		/* 0x880000 - 0x89ffff seems to be protection related, maybe they just happen to access protection results
710		via a mirror tho. */
	707	AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) AM_SHARE("sram") /* Main Ram */
711	708
712	709	AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_READWRITE(pgm_videoram_r, pgm_videoram_w) AM_BASE_MEMBER(pgm_state, videoram) /* IGS023 VIDEO CHIP */
713	710	AM_RANGE(0xa00000, 0xa011ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
r9812	r9813
1075	1072	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
1076	1073
1077	1074	PORT_START("Region")
	1075	PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
	1076	INPUT_PORTS_END
	1077
	1078	static INPUT_PORTS_START( orlegend )
	1079	PORT_INCLUDE ( pgm )
	1080
	1081	PORT_MODIFY("Region")
1078	1082	PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Region ) )
1079	1083	PORT_DIPSETTING( 0x0000, DEF_STR( World ) )
1080	1084	PORT_DIPSETTING( 0x0001, "World (duplicate)" ) // again?
r9812	r9813
1372	1376	MDRV_CPU_PROGRAM_MAP(pgm_mem)
1373	1377	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
1374	1378
1375		MDRV_CPU_ADD("soundcpu", Z80, 8468000)
	1379	MDRV_CPU_ADD("soundcpu", Z80, 33868800/4)
1376	1380	MDRV_CPU_PROGRAM_MAP(z80_mem)
1377	1381	MDRV_CPU_IO_MAP(z80_io)
1378	1382
r9812	r9813
1382	1386
1383	1387	/* video hardware */
1384	1388	MDRV_SCREEN_ADD("screen", RASTER)
1385		MDRV_SCREEN_REFRESH_RATE(60)
	1389	MDRV_SCREEN_REFRESH_RATE(60) // killing blade won't boot (just displays 'error') if this is lower than 59.9 or higher than 60.1 .. are actual PGM boards different to the Cave one?
1386	1390	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
1387	1391	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
1388	1392	MDRV_SCREEN_SIZE(648, 648)
r9812	r9813
1486	1490	MDRV_CPU_PROGRAM_MAP(svg_arm7_map)
1487	1491	MACHINE_CONFIG_END
1488	1492
	1493	class cavepgm_state : public pgm_state
	1494	{
	1495	public:
	1496	cavepgm_state(running_machine &machine, const driver_device_config_base &config)
	1497	: pgm_state(machine, config) {
1489	1498
1490		static MACHINE_CONFIG_DERIVED( cavepgm, pgm )
	1499	ddp3internal_slot = 0;
	1500	}
1491	1501
1492		MDRV_CPU_MODIFY("maincpu")
	1502	UINT16 value0, value1, valuekey, ddp3lastcommand;
	1503	UINT32 valueresponse;
	1504	int ddp3internal_slot;
	1505	UINT32 ddp3slots[0x100];
	1506	INT16 ddp3thrust;
	1507	};
	1508
	1509	static MACHINE_START( cavepgm )
	1510	{
	1511	MACHINE_START_CALL(pgm);
	1512
	1513	cavepgm_state *state = machine->driver_data<cavepgm_state>();
	1514
	1515	state_save_register_global(machine, state->value0);
	1516	state_save_register_global(machine, state->value1);
	1517	state_save_register_global(machine, state->valuekey);
	1518	state_save_register_global(machine, state->valueresponse);
	1519	state_save_register_global(machine, state->ddp3internal_slot);
	1520	state_save_register_global_array(machine, state->ddp3slots);
	1521	}
	1522
	1523	static MACHINE_CONFIG_START( cavepgm, cavepgm_state )
	1524
	1525	/* basic machine hardware */
	1526	MDRV_CPU_ADD("maincpu", M68000, 20000000)
	1527
1493	1528	MDRV_CPU_PROGRAM_MAP(cavepgm_mem)
1494	1529	MDRV_CPU_VBLANK_INT_HACK(drgw_interrupt,2)
1495	1530
1496		MACHINE_CONFIG_END
	1531	MDRV_CPU_ADD("soundcpu", Z80, 33868800/4)
	1532	MDRV_CPU_PROGRAM_MAP(z80_mem)
	1533	MDRV_CPU_IO_MAP(z80_io)
1497	1534
	1535	MDRV_MACHINE_START( cavepgm )
	1536	MDRV_MACHINE_RESET( pgm )
	1537	MDRV_NVRAM_ADD_0FILL("sram")
1498	1538
	1539	/* video hardware */
	1540	MDRV_SCREEN_ADD("screen", RASTER)
	1541	MDRV_SCREEN_REFRESH_RATE(59.17) // verified on pcb
	1542	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	1543	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	1544	MDRV_SCREEN_SIZE(648, 648)
	1545	MDRV_SCREEN_VISIBLE_AREA(08, 568-1, 08, 288-1)
1499	1546
	1547	MDRV_GFXDECODE(pgm)
	1548	MDRV_PALETTE_LENGTH(0x1200/2)
	1549
	1550	MDRV_VIDEO_START(pgm)
	1551	MDRV_VIDEO_EOF(pgm)
	1552	MDRV_VIDEO_UPDATE(pgm)
	1553
	1554	/sound hardware /
	1555	MDRV_SPEAKER_STANDARD_MONO("mono")
	1556	MDRV_SOUND_ADD("ics", ICS2115, 0)
	1557	MDRV_SOUND_CONFIG(pgm_ics2115_interface)
	1558	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 5.0)
	1559	MACHINE_CONFIG_END
	1560
1500	1561	/* Rom Loading ***********************************************************/
1501	1562
1502	1563	/* take note of "gfx2" needed for expanding the 32x32x5bpp data and
r9812	r9813
1539	1600
1540	1601	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1541	1602	PGM_VIDEO_BIOS
1542		ROM_LOAD( "t0100.rom", 0x400000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
	1603	ROM_LOAD( "t0100.rom", 0x180000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
1543	1604
1544	1605	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
1545	1606	ROM_LOAD( "a0100.rom", 0x0000000, 0x400000, CRC(8b3bd88a) SHA1(42db3a60c6ba9d83ebe2008c8047d094027f65a7) )
r9812	r9813
1566	1627
1567	1628	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1568	1629	PGM_VIDEO_BIOS
1569		ROM_LOAD( "t0100.rom", 0x400000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
	1630	ROM_LOAD( "t0100.rom", 0x180000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
1570	1631
1571	1632	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
1572	1633	ROM_LOAD( "a0100.rom", 0x0000000, 0x400000, CRC(8b3bd88a) SHA1(42db3a60c6ba9d83ebe2008c8047d094027f65a7) )
r9812	r9813
1593	1654
1594	1655	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1595	1656	PGM_VIDEO_BIOS
1596		ROM_LOAD( "t0100.rom", 0x400000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
	1657	ROM_LOAD( "t0100.rom", 0x180000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
1597	1658
1598	1659	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
1599	1660	ROM_LOAD( "a0100.rom", 0x0000000, 0x400000, CRC(8b3bd88a) SHA1(42db3a60c6ba9d83ebe2008c8047d094027f65a7) )
r9812	r9813
1620	1681
1621	1682	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1622	1683	PGM_VIDEO_BIOS
1623		ROM_LOAD( "t0100.rom", 0x400000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
	1684	ROM_LOAD( "t0100.rom", 0x180000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
1624	1685
1625	1686	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
1626	1687	ROM_LOAD( "a0100.rom", 0x0000000, 0x400000, CRC(8b3bd88a) SHA1(42db3a60c6ba9d83ebe2008c8047d094027f65a7) )
r9812	r9813
1684	1745
1685	1746	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1686	1747	PGM_VIDEO_BIOS
1687		ROM_LOAD( "t0100.rom", 0x400000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
	1748	ROM_LOAD( "t0100.rom", 0x180000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
1688	1749
1689	1750	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
1690	1751	ROM_LOAD( "a0100.rom", 0x0000000, 0x400000, CRC(8b3bd88a) SHA1(42db3a60c6ba9d83ebe2008c8047d094027f65a7) )
r9812	r9813
1747	1808
1748	1809	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1749	1810	PGM_VIDEO_BIOS
1750		ROM_LOAD( "t0100.rom", 0x400000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
	1811	ROM_LOAD( "t0100.rom", 0x180000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )
1751	1812
1752	1813	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
1753	1814	ROM_LOAD( "a0100.rom", 0x0000000, 0x400000, CRC(8b3bd88a) SHA1(42db3a60c6ba9d83ebe2008c8047d094027f65a7) )
r9812	r9813
1841	1902
1842	1903	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1843	1904	PGM_VIDEO_BIOS
1844		ROM_LOAD( "pgmt0200.u7", 0x400000, 0x400000, CRC(b0f6534d) SHA1(174cacd81169a0e0d14790ac06d03caed737e05d) )
	1905	ROM_LOAD( "pgmt0200.u7", 0x180000, 0x400000, CRC(b0f6534d) SHA1(174cacd81169a0e0d14790ac06d03caed737e05d) )
1845	1906
1846	1907	ROM_REGION( 0x400000, "sprcol", 0 ) /* Sprite Colour Data */
1847	1908	ROM_LOAD( "pgma0200.u5", 0x0000000, 0x400000, CRC(13b95069) SHA1(4888b06002afb18eab81c010e9362629045767af) )
r9812	r9813
1860	1921
1861	1922	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1862	1923	PGM_VIDEO_BIOS
1863		ROM_LOAD( "pgmt0200.u7", 0x400000, 0x400000, CRC(b0f6534d) SHA1(174cacd81169a0e0d14790ac06d03caed737e05d) )
	1924	ROM_LOAD( "pgmt0200.u7", 0x180000, 0x400000, CRC(b0f6534d) SHA1(174cacd81169a0e0d14790ac06d03caed737e05d) )
1864	1925
1865	1926	ROM_REGION( 0x400000, "sprcol", 0 ) /* Sprite Colour Data */
1866	1927	ROM_LOAD( "pgma0200.u5", 0x0000000, 0x400000, CRC(13b95069) SHA1(4888b06002afb18eab81c010e9362629045767af) )
r9812	r9813
1879	1940
1880	1941	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1881	1942	PGM_VIDEO_BIOS
1882		ROM_LOAD( "pgmt0200.u7", 0x400000, 0x400000, CRC(b0f6534d) SHA1(174cacd81169a0e0d14790ac06d03caed737e05d) )
	1943	ROM_LOAD( "pgmt0200.u7", 0x180000, 0x400000, CRC(b0f6534d) SHA1(174cacd81169a0e0d14790ac06d03caed737e05d) )
1883	1944
1884	1945	ROM_REGION( 0x400000, "sprcol", 0 ) /* Sprite Colour Data */
1885	1946	ROM_LOAD( "pgma0200.u5", 0x0000000, 0x400000, CRC(13b95069) SHA1(4888b06002afb18eab81c010e9362629045767af) )
r9812	r9813
1898	1959
1899	1960	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1900	1961	PGM_VIDEO_BIOS
1901		ROM_LOAD( "pgmt0200.u7", 0x400000, 0x400000, CRC(b0f6534d) SHA1(174cacd81169a0e0d14790ac06d03caed737e05d) )
	1962	ROM_LOAD( "pgmt0200.u7", 0x180000, 0x400000, CRC(b0f6534d) SHA1(174cacd81169a0e0d14790ac06d03caed737e05d) )
1902	1963
1903	1964	ROM_REGION( 0x400000, "sprcol", 0 ) /* Sprite Colour Data */
1904	1965	ROM_LOAD( "pgma0200.u5", 0x0000000, 0x400000, CRC(13b95069) SHA1(4888b06002afb18eab81c010e9362629045767af) )
r9812	r9813
1939	2000
1940	2001	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1941	2002	PGM_VIDEO_BIOS
1942		ROM_LOAD( "dw3t0400.u18", 0x400000, 0x400000, CRC(b70f3357) SHA1(8733969d7d21f540f295a9f747a4bb8f0d325cf0) )
	2003	ROM_LOAD( "dw3t0400.u18", 0x180000, 0x400000, CRC(b70f3357) SHA1(8733969d7d21f540f295a9f747a4bb8f0d325cf0) )
1943	2004
1944	2005	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
1945	2006	ROM_LOAD( "dw3a0400.u9", 0x0000000, 0x400000, CRC(dd7bfd40) SHA1(fb7ec5bf89a413c5208716083762a725ff63f5db) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
1965	2026
1966	2027	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
1967	2028	PGM_VIDEO_BIOS
1968		ROM_LOAD( "dw3t0400.u18", 0x400000, 0x400000, CRC(b70f3357) SHA1(8733969d7d21f540f295a9f747a4bb8f0d325cf0) )
	2029	ROM_LOAD( "dw3t0400.u18", 0x180000, 0x400000, CRC(b70f3357) SHA1(8733969d7d21f540f295a9f747a4bb8f0d325cf0) )
1969	2030
1970	2031	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
1971	2032	ROM_LOAD( "dw3a0400.u9", 0x0000000, 0x400000, CRC(dd7bfd40) SHA1(fb7ec5bf89a413c5208716083762a725ff63f5db) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2013	2074
2014	2075	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2015	2076	PGM_VIDEO_BIOS
2016		ROM_LOAD( "dw3t0400.u18", 0x400000, 0x400000, CRC(b70f3357) SHA1(8733969d7d21f540f295a9f747a4bb8f0d325cf0) )
	2077	ROM_LOAD( "dw3t0400.u18", 0x180000, 0x400000, CRC(b70f3357) SHA1(8733969d7d21f540f295a9f747a4bb8f0d325cf0) )
2017	2078
2018	2079	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
2019	2080	ROM_LOAD( "dw3a0400.u9", 0x0000000, 0x400000, CRC(dd7bfd40) SHA1(fb7ec5bf89a413c5208716083762a725ff63f5db) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2065	2126
2066	2127	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2067	2128	PGM_VIDEO_BIOS
2068		ROM_LOAD( "ex_t0400.u18", 0x400000, 0x200000, CRC(9ecc950d) SHA1(fd97f43818a3eb18254636166871fa09bd0d6c07) )
	2129	ROM_LOAD( "ex_t0400.u18", 0x180000, 0x200000, CRC(9ecc950d) SHA1(fd97f43818a3eb18254636166871fa09bd0d6c07) )
2069	2130
2070	2131	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
2071	2132	ROM_LOAD( "ex_a0400.u9", 0x0000000, 0x400000, CRC(dd7bfd40) SHA1(fb7ec5bf89a413c5208716083762a725ff63f5db) )
r9812	r9813
2092	2153
2093	2154	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2094	2155	PGM_VIDEO_BIOS
2095		ROM_LOAD( "t0600.rom", 0x400000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
	2156	ROM_LOAD( "t0600.rom", 0x180000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
2096	2157
2097	2158	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
2098	2159	ROM_LOAD( "a0600.rom", 0x0000000, 0x0800000, CRC(d8167834) SHA1(fa55a99629d03b2ea253392352f70d2c8639a991) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2119	2180
2120	2181	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2121	2182	PGM_VIDEO_BIOS
2122		ROM_LOAD( "t0600.rom", 0x400000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
	2183	ROM_LOAD( "t0600.rom", 0x180000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
2123	2184
2124	2185	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
2125	2186	ROM_LOAD( "a0600.rom", 0x0000000, 0x0800000, CRC(d8167834) SHA1(fa55a99629d03b2ea253392352f70d2c8639a991) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2181	2242
2182	2243	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2183	2244	PGM_VIDEO_BIOS
2184		ROM_LOAD( "t0600.rom", 0x400000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
	2245	ROM_LOAD( "t0600.rom", 0x180000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
2185	2246
2186	2247	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
2187	2248	ROM_LOAD( "a0600.rom", 0x0000000, 0x0800000, CRC(d8167834) SHA1(fa55a99629d03b2ea253392352f70d2c8639a991) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2208	2269
2209	2270	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2210	2271	PGM_VIDEO_BIOS
2211		ROM_LOAD( "t0600.rom", 0x400000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
	2272	ROM_LOAD( "t0600.rom", 0x180000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
2212	2273
2213	2274	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
2214	2275	ROM_LOAD( "a0600.rom", 0x0000000, 0x0800000, CRC(d8167834) SHA1(fa55a99629d03b2ea253392352f70d2c8639a991) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2270	2331
2271	2332	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2272	2333	PGM_VIDEO_BIOS
2273		ROM_LOAD( "t0600.rom", 0x400000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
	2334	ROM_LOAD( "t0600.rom", 0x180000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
2274	2335
2275	2336	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
2276	2337	ROM_LOAD( "a0600.rom", 0x0000000, 0x0800000, CRC(d8167834) SHA1(fa55a99629d03b2ea253392352f70d2c8639a991) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2297	2358
2298	2359	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2299	2360	PGM_VIDEO_BIOS
2300		ROM_LOAD( "t0600.rom", 0x400000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
	2361	ROM_LOAD( "t0600.rom", 0x180000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
2301	2362
2302	2363	/* all roms below need checking to see if they're the same on this board */
2303	2364	ROM_REGION( 0x1e00000, "sprcol", 0 ) /* Sprite Colour Data */
r9812	r9813
2328	2389
2329	2390	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2330	2391	PGM_VIDEO_BIOS
2331		ROM_LOAD( "t0600.rom", 0x400000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
	2392	ROM_LOAD( "t0600.rom", 0x180000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
2332	2393
2333	2394	/* all roms below need checking to see if they're the same on this board */
2334	2395	ROM_REGION( 0x1e00000, "sprcol", 0 ) /* Sprite Colour Data */
r9812	r9813
2360	2421
2361	2422	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2362	2423	PGM_VIDEO_BIOS
2363		ROM_LOAD( "lsqh2_t01.rom",0x400000, 0x800000, CRC(d498d97f) SHA1(97a7b6d2ed1170449e7c2899448af7cbbca4c94f) )
	2424	ROM_LOAD( "lsqh2_t01.rom",0x180000, 0x800000, CRC(d498d97f) SHA1(97a7b6d2ed1170449e7c2899448af7cbbca4c94f) )
2364	2425	ROM_IGNORE( 0x800000 ) // second half identical
2365	2426
2366	2427	ROM_REGION( 0x3000000, "sprcol", 0 ) /* Sprite Colour Data */
r9812	r9813
2389	2450
2390	2451	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2391	2452	PGM_VIDEO_BIOS
2392		ROM_LOAD( "lsqh2_t01.rom",0x400000, 0x800000, CRC(d498d97f) SHA1(97a7b6d2ed1170449e7c2899448af7cbbca4c94f) )
	2453	ROM_LOAD( "lsqh2_t01.rom",0x180000, 0x800000, CRC(d498d97f) SHA1(97a7b6d2ed1170449e7c2899448af7cbbca4c94f) )
2393	2454	ROM_IGNORE( 0x800000 ) // second half identical
2394	2455
2395	2456	ROM_REGION( 0x3000000, "sprcol", 0 ) /* Sprite Colour Data */
r9812	r9813
2418	2479
2419	2480	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2420	2481	PGM_VIDEO_BIOS
2421		ROM_LOAD( "lsqh2_t01.rom",0x400000, 0x800000, CRC(d498d97f) SHA1(97a7b6d2ed1170449e7c2899448af7cbbca4c94f) )
	2482	ROM_LOAD( "lsqh2_t01.rom",0x180000, 0x800000, CRC(d498d97f) SHA1(97a7b6d2ed1170449e7c2899448af7cbbca4c94f) )
2422	2483	ROM_IGNORE( 0x800000 ) // second half identical
2423	2484
2424	2485	ROM_REGION( 0x3000000, "sprcol", 0 ) /* Sprite Colour Data */
r9812	r9813
2447	2508
2448	2509	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2449	2510	PGM_VIDEO_BIOS
2450		ROM_LOAD( "lsqh2_t01.rom",0x400000, 0x800000, CRC(d498d97f) SHA1(97a7b6d2ed1170449e7c2899448af7cbbca4c94f) )
	2511	ROM_LOAD( "lsqh2_t01.rom",0x180000, 0x800000, CRC(d498d97f) SHA1(97a7b6d2ed1170449e7c2899448af7cbbca4c94f) )
2451	2512	ROM_IGNORE( 0x800000 ) // second half identical
2452	2513
2453	2514	ROM_REGION( 0x3000000, "sprcol", 0 ) /* Sprite Colour Data */
r9812	r9813
2487	2548
2488	2549	ROM_REGION( 0x480000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2489	2550	PGM_VIDEO_BIOS
2490		ROM_LOAD( "t0700.rom", 0x400000, 0x080000, CRC(93943b4d) SHA1(3b439903853727d45d62c781af6073024eb3c5a3) )
	2551	ROM_LOAD( "t0700.rom", 0x180000, 0x080000, CRC(93943b4d) SHA1(3b439903853727d45d62c781af6073024eb3c5a3) )
2491	2552
2492	2553	ROM_REGION( 0x1080000, "sprcol", 0 ) /* Sprite Colour Data */
2493	2554	ROM_LOAD( "a0700.l", 0x0000000, 0x0400000, CRC(26a9ae9c) SHA1(c977c89db6fdf47ee260ff687b80375caeab975c) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2517	2578
2518	2579	ROM_REGION( 0x480000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2519	2580	PGM_VIDEO_BIOS
2520		ROM_LOAD( "t0700.rom", 0x400000, 0x080000, CRC(93943b4d) SHA1(3b439903853727d45d62c781af6073024eb3c5a3) )
	2581	ROM_LOAD( "t0700.rom", 0x180000, 0x080000, CRC(93943b4d) SHA1(3b439903853727d45d62c781af6073024eb3c5a3) )
2521	2582
2522	2583	ROM_REGION( 0x1080000, "sprcol", 0 ) /* Sprite Colour Data */
2523	2584	ROM_LOAD( "a0700.l", 0x0000000, 0x0400000, CRC(26a9ae9c) SHA1(c977c89db6fdf47ee260ff687b80375caeab975c) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2579	2640
2580	2641	ROM_REGION( 0x480000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2581	2642	PGM_VIDEO_BIOS
2582		ROM_LOAD( "t0700.rom", 0x400000, 0x080000, CRC(93943b4d) SHA1(3b439903853727d45d62c781af6073024eb3c5a3) )
	2643	ROM_LOAD( "t0700.rom", 0x180000, 0x080000, CRC(93943b4d) SHA1(3b439903853727d45d62c781af6073024eb3c5a3) )
2583	2644
2584	2645	ROM_REGION( 0x1080000, "sprcol", 0 ) /* Sprite Colour Data */
2585	2646	ROM_LOAD( "a0700.l", 0x0000000, 0x0400000, CRC(26a9ae9c) SHA1(c977c89db6fdf47ee260ff687b80375caeab975c) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
2739	2800
2740	2801	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2741	2802	PGM_VIDEO_BIOS
2742		ROM_LOAD( "t0300.u14", 0x400000, 0x400000, CRC(0922f7d9) SHA1(4302b4b7369e13f315fad14f7d6cad1321101d24) )
	2803	ROM_LOAD( "t0300.u14", 0x180000, 0x400000, CRC(0922f7d9) SHA1(4302b4b7369e13f315fad14f7d6cad1321101d24) )
2743	2804
2744	2805	ROM_REGION( 0x2000000, "sprcol", 0 ) /* Sprite Colour Data */
2745	2806	ROM_LOAD( "a0300.u9", 0x0000000, 0x0400000, CRC(3f9455d3) SHA1(3718ce00ad93975383aafc14e5a74dc297b011a1) )
r9812	r9813
2775	2836
2776	2837	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2777	2838	PGM_VIDEO_BIOS
2778		ROM_LOAD( "t0300.u14", 0x400000, 0x400000, CRC(0922f7d9) SHA1(4302b4b7369e13f315fad14f7d6cad1321101d24) )
	2839	ROM_LOAD( "t0300.u14", 0x180000, 0x400000, CRC(0922f7d9) SHA1(4302b4b7369e13f315fad14f7d6cad1321101d24) )
2779	2840
2780	2841	ROM_REGION( 0x2000000, "sprcol", 0 ) /* Sprite Colour Data */
2781	2842	ROM_LOAD( "a0300.u9", 0x0000000, 0x0400000, CRC(3f9455d3) SHA1(3718ce00ad93975383aafc14e5a74dc297b011a1) )
r9812	r9813
2863	2924
2864	2925	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2865	2926	PGM_VIDEO_BIOS
2866		ROM_LOAD( "t0800.u5", 0x400000, 0x200000, CRC(f9d84e59) SHA1(80ec77025ac5bf355b1a60f2a678dd4c56071f6b) )
	2927	ROM_LOAD( "t0800.u5", 0x180000, 0x200000, CRC(f9d84e59) SHA1(80ec77025ac5bf355b1a60f2a678dd4c56071f6b) )
2867	2928
2868	2929	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
2869	2930	ROM_LOAD( "a0800.u1", 0x0000000, 0x0400000, CRC(e1e6ec40) SHA1(390432431f144ef63424a426582b311765a61771) )
r9812	r9813
2950	3011
2951	3012	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2952	3013	PGM_VIDEO_BIOS
2953		ROM_LOAD( "t0500.rom", 0x400000, 0x400000, CRC(d881726c) SHA1(a82517e665996f7b7017c940f1fcf016fccb65c2) )
2954		ROM_LOAD( "t0501.rom", 0x800000, 0x200000, CRC(d2106864) SHA1(65d827135b87d82196433aea3279608ee263feca) )
	3014	ROM_LOAD( "t0500.rom", 0x180000, 0x400000, CRC(d881726c) SHA1(a82517e665996f7b7017c940f1fcf016fccb65c2) )
	3015	ROM_LOAD( "t0501.rom", 0x580000, 0x200000, CRC(d2106864) SHA1(65d827135b87d82196433aea3279608ee263feca) )
2955	3016
2956	3017	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
2957	3018	ROM_LOAD( "a0500.rom", 0x0000000, 0x400000, CRC(80a59197) SHA1(7d0108e2f0d0347d43ace2d96c0388202c05fdfb) )
r9812	r9813
2992	3053
2993	3054	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
2994	3055	PGM_VIDEO_BIOS
2995		ROM_LOAD( "t0500.rom", 0x400000, 0x400000, CRC(d881726c) SHA1(a82517e665996f7b7017c940f1fcf016fccb65c2) )
2996		ROM_LOAD( "t0501.rom", 0x800000, 0x200000, CRC(d2106864) SHA1(65d827135b87d82196433aea3279608ee263feca) )
	3056	ROM_LOAD( "t0500.rom", 0x180000, 0x400000, CRC(d881726c) SHA1(a82517e665996f7b7017c940f1fcf016fccb65c2) )
	3057	ROM_LOAD( "t0501.rom", 0x580000, 0x200000, CRC(d2106864) SHA1(65d827135b87d82196433aea3279608ee263feca) )
2997	3058
2998	3059	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
2999	3060	ROM_LOAD( "a0500.rom", 0x0000000, 0x400000, CRC(80a59197) SHA1(7d0108e2f0d0347d43ace2d96c0388202c05fdfb) )
r9812	r9813
3031	3092
3032	3093	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3033	3094	PGM_VIDEO_BIOS
3034		ROM_LOAD( "t0500.rom", 0x400000, 0x400000, CRC(d881726c) SHA1(a82517e665996f7b7017c940f1fcf016fccb65c2) )
3035		ROM_LOAD( "t0501.rom", 0x800000, 0x200000, CRC(d2106864) SHA1(65d827135b87d82196433aea3279608ee263feca) )
	3095	ROM_LOAD( "t0500.rom", 0x180000, 0x400000, CRC(d881726c) SHA1(a82517e665996f7b7017c940f1fcf016fccb65c2) )
	3096	ROM_LOAD( "t0501.rom", 0x580000, 0x200000, CRC(d2106864) SHA1(65d827135b87d82196433aea3279608ee263feca) )
3036	3097
3037	3098	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
3038	3099	ROM_LOAD( "a0500.rom", 0x0000000, 0x400000, CRC(80a59197) SHA1(7d0108e2f0d0347d43ace2d96c0388202c05fdfb) )
r9812	r9813
3068	3129
3069	3130	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3070	3131	PGM_VIDEO_BIOS
3071		ROM_LOAD( "t1200.rom", 0x400000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
	3132	ROM_LOAD( "t1200.rom", 0x180000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
3072	3133
3073	3134	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3074	3135	ROM_LOAD( "a1200.rom", 0x0000000, 0x0800000, CRC(ceeb81d8) SHA1(5476729443fc1bc9593ae10fbf7cbc5d7290b017) )
r9812	r9813
3099	3160
3100	3161	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3101	3162	PGM_VIDEO_BIOS
3102		ROM_LOAD( "t1200.rom", 0x400000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
	3163	ROM_LOAD( "t1200.rom", 0x180000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
3103	3164
3104	3165	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3105	3166	ROM_LOAD( "a1200.rom", 0x0000000, 0x0800000, CRC(ceeb81d8) SHA1(5476729443fc1bc9593ae10fbf7cbc5d7290b017) )
r9812	r9813
3131	3192
3132	3193	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3133	3194	PGM_VIDEO_BIOS
3134		ROM_LOAD( "t1200.rom", 0x400000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
	3195	ROM_LOAD( "t1200.rom", 0x180000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
3135	3196
3136	3197	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3137	3198	ROM_LOAD( "a1200.rom", 0x0000000, 0x0800000, CRC(ceeb81d8) SHA1(5476729443fc1bc9593ae10fbf7cbc5d7290b017) )
r9812	r9813
3163	3224
3164	3225	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3165	3226	PGM_VIDEO_BIOS
3166		ROM_LOAD( "t1200.rom", 0x400000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
	3227	ROM_LOAD( "t1200.rom", 0x180000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
3167	3228
3168	3229	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3169	3230	ROM_LOAD( "a1200.rom", 0x0000000, 0x0800000, CRC(ceeb81d8) SHA1(5476729443fc1bc9593ae10fbf7cbc5d7290b017) )
r9812	r9813
3194	3255
3195	3256	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3196	3257	PGM_VIDEO_BIOS
3197		ROM_LOAD( "t1200.rom", 0x400000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
	3258	ROM_LOAD( "t1200.rom", 0x180000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
3198	3259
3199	3260	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3200	3261	ROM_LOAD( "a1200.rom", 0x0000000, 0x0800000, CRC(ceeb81d8) SHA1(5476729443fc1bc9593ae10fbf7cbc5d7290b017) )
r9812	r9813
3225	3286
3226	3287	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3227	3288	PGM_VIDEO_BIOS
3228		ROM_LOAD( "t1200.rom", 0x400000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
	3289	ROM_LOAD( "t1200.rom", 0x180000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
3229	3290
3230	3291	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3231	3292	ROM_LOAD( "a1200.rom", 0x0000000, 0x0800000, CRC(ceeb81d8) SHA1(5476729443fc1bc9593ae10fbf7cbc5d7290b017) )
r9812	r9813
3256	3317
3257	3318	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3258	3319	PGM_VIDEO_BIOS
3259		ROM_LOAD( "t1200.rom", 0x400000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
	3320	ROM_LOAD( "t1200.rom", 0x180000, 0x800000, CRC(d7e26609) SHA1(bdad810f82fcf1d50a8791bdc495374ec5a309c6) )
3260	3321
3261	3322	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3262	3323	ROM_LOAD( "a1200.rom", 0x0000000, 0x0800000, CRC(ceeb81d8) SHA1(5476729443fc1bc9593ae10fbf7cbc5d7290b017) )
r9812	r9813
3303	3364
3304	3365	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3305	3366	PGM_VIDEO_BIOS
3306		ROM_LOAD( "t1300.u21", 0x400000, 0x800000, CRC(e748f0cb) SHA1(5843bee3a17c33648ce904af2b98c6a90aff7393) )
	3367	ROM_LOAD( "t1300.u21", 0x180000, 0x800000, CRC(e748f0cb) SHA1(5843bee3a17c33648ce904af2b98c6a90aff7393) )
3307	3368
3308	3369	ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */
3309	3370	ROM_LOAD( "a1300.u1", 0x0000000, 0x0800000, CRC(fc87a405) SHA1(115c21ecc56997652e527c92654076870bc9fa51) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
3330	3391
3331	3392	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3332	3393	PGM_VIDEO_BIOS
3333		ROM_LOAD( "t1300.u21", 0x400000, 0x800000, CRC(e748f0cb) SHA1(5843bee3a17c33648ce904af2b98c6a90aff7393) )
	3394	ROM_LOAD( "t1300.u21", 0x180000, 0x800000, CRC(e748f0cb) SHA1(5843bee3a17c33648ce904af2b98c6a90aff7393) )
3334	3395
3335	3396	ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */
3336	3397	ROM_LOAD( "a1300.u1", 0x0000000, 0x0800000, CRC(fc87a405) SHA1(115c21ecc56997652e527c92654076870bc9fa51) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
3357	3418
3358	3419	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3359	3420	PGM_VIDEO_BIOS
3360		ROM_LOAD( "t1300.u21", 0x400000, 0x800000, CRC(e748f0cb) SHA1(5843bee3a17c33648ce904af2b98c6a90aff7393) )
	3421	ROM_LOAD( "t1300.u21", 0x180000, 0x800000, CRC(e748f0cb) SHA1(5843bee3a17c33648ce904af2b98c6a90aff7393) )
3361	3422
3362	3423	ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */
3363	3424	ROM_LOAD( "a1300.u1", 0x0000000, 0x0800000, CRC(fc87a405) SHA1(115c21ecc56997652e527c92654076870bc9fa51) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
3406	3467
3407	3468	ROM_REGION( 0x600000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3408	3469	PGM_VIDEO_BIOS
3409		ROM_LOAD( "2001.u11", 0x400000, 0x200000, CRC(1dd8d1e9) SHA1(13dc5d8e541bbd6eef9f477aa288978bccf7ebb3) )
	3470	ROM_LOAD( "2001.u11", 0x180000, 0x200000, CRC(1dd8d1e9) SHA1(13dc5d8e541bbd6eef9f477aa288978bccf7ebb3) )
3410	3471
3411	3472	ROM_REGION( 0x400000, "sprcol", 0 ) /* Sprite Colour Data */
3412	3473	ROM_LOAD( "2001.u2", 0x000000, 0x200000, CRC(d11c733c) SHA1(8faad32e8e215631a2263bdd51a9ae434540d028) )
r9812	r9813
3487	3548
3488	3549	ROM_REGION( 0x600000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3489	3550	PGM_VIDEO_BIOS
3490		ROM_LOAD( "t0900.u9", 0x400000, 0x200000, CRC(70615611) SHA1(a46d4aa71396947b427f9ba4ba0e636876c09d6b) )
	3551	ROM_LOAD( "t0900.u9", 0x180000, 0x200000, CRC(70615611) SHA1(a46d4aa71396947b427f9ba4ba0e636876c09d6b) )
3491	3552
3492	3553	ROM_REGION( 0x400000, "sprcol", 0 ) /* Sprite Colour Data */
3493	3554	ROM_LOAD( "a0900.u3", 0x0000000, 0x0400000, CRC(14911251) SHA1(e0d10ef50c408dbcf0907f81d4f0e49aeb651a6c) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
3574	3635
3575	3636	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3576	3637	PGM_VIDEO_BIOS
3577		ROM_LOAD( "t1000.u3", 0x400000, 0x800000, CRC(bbf879b5) SHA1(bd9a6aea34ad4001e89e62ff4b7a2292eb833c00) )
	3638	ROM_LOAD( "t1000.u3", 0x180000, 0x800000, CRC(bbf879b5) SHA1(bd9a6aea34ad4001e89e62ff4b7a2292eb833c00) )
3578	3639
3579	3640	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3580	3641	ROM_LOAD( "a1000.u3", 0x0000000, 0x0800000, CRC(43577ac8) SHA1(6eea8b455985d5bac74dcc9943cdc3c0902de6cc) )
r9812	r9813
3606	3667
3607	3668	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3608	3669	PGM_VIDEO_BIOS
3609		ROM_LOAD( "t1000.u3", 0x400000, 0x800000, CRC(bbf879b5) SHA1(bd9a6aea34ad4001e89e62ff4b7a2292eb833c00) )
	3670	ROM_LOAD( "t1000.u3", 0x180000, 0x800000, CRC(bbf879b5) SHA1(bd9a6aea34ad4001e89e62ff4b7a2292eb833c00) )
3610	3671
3611	3672	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3612	3673	ROM_LOAD( "a1000.u3", 0x0000000, 0x0800000, CRC(43577ac8) SHA1(6eea8b455985d5bac74dcc9943cdc3c0902de6cc) )
r9812	r9813
3638	3699
3639	3700	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3640	3701	PGM_VIDEO_BIOS
3641		ROM_LOAD( "t1000.u3", 0x400000, 0x800000, CRC(bbf879b5) SHA1(bd9a6aea34ad4001e89e62ff4b7a2292eb833c00) )
	3702	ROM_LOAD( "t1000.u3", 0x180000, 0x800000, CRC(bbf879b5) SHA1(bd9a6aea34ad4001e89e62ff4b7a2292eb833c00) )
3642	3703
3643	3704	ROM_REGION( 0x2800000, "sprcol", 0 ) /* Sprite Colour Data */
3644	3705	ROM_LOAD( "a1000.u3", 0x0000000, 0x0800000, CRC(43577ac8) SHA1(6eea8b455985d5bac74dcc9943cdc3c0902de6cc) )
r9812	r9813
3721	3782
3722	3783	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3723	3784	PGM_VIDEO_BIOS
3724		ROM_LOAD( "t04501.u29", 0x400000, 0x800000, CRC(900eaaac) SHA1(4033cb7b28fcadb92d5af3ea7fdd1c22747618fd) )
	3785	ROM_LOAD( "t04501.u29", 0x180000, 0x800000, CRC(900eaaac) SHA1(4033cb7b28fcadb92d5af3ea7fdd1c22747618fd) )
3725	3786
3726	3787	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
3727	3788	ROM_LOAD( "a04501.u3", 0x0000000, 0x0800000, CRC(9741bea6) SHA1(e3e904249be228628c8c2bd3495cda23586dc048) )
r9812	r9813
3752	3813
3753	3814	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3754	3815	PGM_VIDEO_BIOS
3755		ROM_LOAD( "t04501.u29", 0x400000, 0x800000, CRC(900eaaac) SHA1(4033cb7b28fcadb92d5af3ea7fdd1c22747618fd) )
	3816	ROM_LOAD( "t04501.u29", 0x180000, 0x800000, CRC(900eaaac) SHA1(4033cb7b28fcadb92d5af3ea7fdd1c22747618fd) )
3756	3817
3757	3818	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
3758	3819	ROM_LOAD( "a04501.u3", 0x0000000, 0x0800000, CRC(9741bea6) SHA1(e3e904249be228628c8c2bd3495cda23586dc048) )
r9812	r9813
3781	3842
3782	3843	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3783	3844	PGM_VIDEO_BIOS
3784		ROM_LOAD( "t04601.u33", 0x400000, 0x800000, CRC(e5dab371) SHA1(2e3c93958eb0326b6b84b95c2168626f26bbac76) )
	3845	ROM_LOAD( "t04601.u33", 0x180000, 0x800000, CRC(e5dab371) SHA1(2e3c93958eb0326b6b84b95c2168626f26bbac76) )
3785	3846
3786	3847	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
3787	3848	ROM_LOAD( "a04601.u2", 0x0000000, 0x0800000, CRC(d9b2e004) SHA1(8e1882b800fe9f12d7d49303e7417ba5b6f8ef85) )
r9812	r9813
3810	3871
3811	3872	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3812	3873	PGM_VIDEO_BIOS
3813		ROM_LOAD( "t04601.u33", 0x400000, 0x800000, CRC(e5dab371) SHA1(2e3c93958eb0326b6b84b95c2168626f26bbac76) )
	3874	ROM_LOAD( "t04601.u33", 0x180000, 0x800000, CRC(e5dab371) SHA1(2e3c93958eb0326b6b84b95c2168626f26bbac76) )
3814	3875
3815	3876	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
3816	3877	ROM_LOAD( "a04601.u2", 0x0000000, 0x0800000, CRC(d9b2e004) SHA1(8e1882b800fe9f12d7d49303e7417ba5b6f8ef85) )
r9812	r9813
3836	3897
3837	3898	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3838	3899	PGM_VIDEO_BIOS
3839		ROM_LOAD( "t05301.rom", 0x400000, 0x800000, CRC(8257bbb0) SHA1(b48067b7e7081a15fddf21739b641d677c2df3d9) )
	3900	ROM_LOAD( "t05301.rom", 0x180000, 0x800000, CRC(8257bbb0) SHA1(b48067b7e7081a15fddf21739b641d677c2df3d9) )
3840	3901
3841	3902	ROM_REGION( 0x2000000, "sprcol", 0 ) /* Sprite Colour Data */
3842	3903	ROM_LOAD( "a05301.rom", 0x0000000, 0x0800000, CRC(57946fd2) SHA1(5d79bc71a1881f3099821a9b255a5f271e0eeff6) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
3863	3924
3864	3925	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3865	3926	PGM_VIDEO_BIOS
3866		ROM_LOAD( "t0600.rom", 0x400000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
	3927	ROM_LOAD( "t0600.rom", 0x180000, 0x800000, CRC(4acc1ad6) SHA1(0668dbd5e856c2406910c6b7382548b37c631780) )
3867	3928
3868	3929	ROM_REGION( 0x2000000, "sprcol", 0 ) /* Sprite Colour Data */
3869	3930	ROM_LOAD( "a0600.rom", 0x0000000, 0x0800000, CRC(d8167834) SHA1(fa55a99629d03b2ea253392352f70d2c8639a991) ) // FIXED BITS (xxxxxxxx1xxxxxxx)
r9812	r9813
3894	3955
3895	3956	ROM_REGION( 0x800000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3896	3957	PGM_VIDEO_BIOS
3897		ROM_LOAD( "t05701w032.bin",0x400000, 0x400000, CRC(567c714f) SHA1(b25b20e1ec9f077d6f7b9d41723a68d0d461bef2) )
	3958	ROM_LOAD( "t05701w032.bin",0x180000, 0x400000, CRC(567c714f) SHA1(b25b20e1ec9f077d6f7b9d41723a68d0d461bef2) )
3898	3959
3899	3960	ROM_REGION( 0x1800000, "sprcol", 0 ) /* Sprite Colour Data */
3900	3961	ROM_LOAD( "a05701w064.bin", 0x0000000, 0x0800000, CRC(8c0c992c) SHA1(28391e50ca4400060676f1524bd49ede373292da) )
r9812	r9813
3924	3985
3925	3986	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3926	3987	PGM_VIDEO_BIOS
3927		ROM_LOAD( "t05601w016.bin",0x400000, 0x200000, CRC(03e110dc) SHA1(41c8f286e9303b24ba6235b341371c298226fb6a) )
	3988	ROM_LOAD( "t05601w016.bin",0x180000, 0x200000, CRC(03e110dc) SHA1(41c8f286e9303b24ba6235b341371c298226fb6a) )
3928	3989
3929	3990	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
3930	3991	ROM_LOAD( "a05601w064.bin", 0x0000000, 0x0800000, CRC(ea6453e4) SHA1(b5c82edafa8008ad59b5f2219511947d078d446e) )
r9812	r9813
3956	4017
3957	4018	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3958	4019	PGM_VIDEO_BIOS
3959		ROM_LOAD( "t01w64m.u29",0x400000, 0x800000, CRC(2d3feb8b) SHA1(9832b1c46b1ee73febf5c5c8913859f4e0581665) )
	4020	ROM_LOAD( "t01w64m.u29",0x180000, 0x800000, CRC(2d3feb8b) SHA1(9832b1c46b1ee73febf5c5c8913859f4e0581665) )
3960	4021
3961	4022	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
3962	4023	ROM_LOAD( "a01w64m.u5", 0x0000000, 0x0800000, CRC(bbaa3df3) SHA1(a72268d3989e96d571242279922291d0dc72db28) )
r9812	r9813
3972	4033
3973	4034
3974	4035
	4036	/* all known revisions of ketsui have roms marked v100, even when the actual game revision is upgraded */
3975	4037
3976		/* all revisions of ketsui have roms marked v100, even when the actual game revision is upgraded */
3977
3978	4038	ROM_START( ket )
3979	4039	ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */
3980	4040	/* doesn't use a separate BIOS rom */
3981	4041	ROM_LOAD16_WORD_SWAP( "ketsui_v100.u38", 0x000000, 0x200000, CRC(dfe62f3b) SHA1(baa58d1ce47a707f84f65779ac0689894793e9d9) )
3982	4042
3983
3984	4043	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
3985	4044	ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP )
3986	4045
r9812	r9813
3989	4048
3990	4049	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
3991	4050	ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details
3992		ROM_LOAD( "t~~ext-~~1.u19", 0x400000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) )
	4051	ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1
3993	4052
3994	4053	ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */
3995		ROM_LOAD( "image-1.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) )
3996		ROM_LOAD( "image-2.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) )
	4054	ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1
	4055	ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2
3997	4056
3998	4057	ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */
3999		ROM_LOAD( "b~~itmap-~~1.u1", 0x0000000, 0x0800000, CRC(b~~73634f4~~) SHA1(~~43b~~7~~442~~1~~39ee6bce~~1~~ff2b~~774e3bbd272d1cb6d1f) )
	4058	ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1
4000	4059
4001	4060	ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */
4002	4061	/* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */
4003		ROM_LOAD( "music-1.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) )
	4062	ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1
	4063
	4064	ROM_REGION( 0x20000, "sram", 0 ) /* default settings */
	4065	ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) )
4004	4066	ROM_END
4005	4067
4006	4068	ROM_START( keta )
r9812	r9813
4016	4078
4017	4079	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
4018	4080	ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details
4019		ROM_LOAD( "t~~ext-~~1.u19", 0x400000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) )
	4081	ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1
4020	4082
4021	4083	ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */
4022		ROM_LOAD( "image-1.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) )
4023		ROM_LOAD( "image-2.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) )
	4084	ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1
	4085	ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2
4024	4086
4025	4087	ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */
4026		ROM_LOAD( "b~~itmap-~~1.u1", 0x0000000, 0x0800000, CRC(b~~73634f4~~) SHA1(~~43b~~7~~442~~1~~39ee6bce~~1~~ff2b~~774e3bbd272d1cb6d1f) )
	4088	ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1
4027	4089
4028	4090	ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */
4029	4091	/* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */
4030		ROM_LOAD( "music-1.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) )
	4092	ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1
	4093
	4094	ROM_REGION( 0x20000, "sram", 0 ) /* default settings */
	4095	ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) )
4031	4096	ROM_END
4032	4097
4033	4098	ROM_START( ketb )
r9812	r9813
4043	4108
4044	4109	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
4045	4110	ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details
4046		ROM_LOAD( "t~~ext-~~1.u19", 0x400000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) )
	4111	ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1
4047	4112
4048	4113	ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */
4049		ROM_LOAD( "image-1.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) )
4050		ROM_LOAD( "image-2.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) )
	4114	ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1
	4115	ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2
4051	4116
4052	4117	ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */
4053		ROM_LOAD( "b~~itmap-~~1.u1", 0x0000000, 0x0800000, CRC(b~~73634f4~~) SHA1(~~43b~~7~~442~~1~~39ee6bce~~1~~ff2b~~774e3bbd272d1cb6d1f) )
	4118	ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1
4054	4119
4055	4120	ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */
4056	4121	/* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */
4057		ROM_LOAD( "music-1.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) )
	4122	ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1
	4123
	4124	ROM_REGION( 0x20000, "sram", 0 ) /* default settings */
	4125	ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) )
4058	4126	ROM_END
4059	4127
4060	4128	ROM_START( espgal )
r9812	r9813
4069	4137	/* no external protection rom */
4070	4138
4071	4139	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
4072		ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details
4073		ROM_LOAD( "text-1.u19", 0x400000, 0x800000, NO_DUMP )
	4140	ROM_LOAD( "t01s.u18", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details
	4141	ROM_LOAD( "t04801w064.u19", 0x180000, 0x800000, CRC(6021c79e) SHA1(fbc340dafb18aa3094de29b881318a5a9794e4bc) ) //text-1
4074	4142
4075	4143	ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */
4076		ROM_LOAD( "image-1.u7", 0x0000000, 0x0800000, NO_DUMP )
4077		ROM_LOAD( "image-2.u8", 0x0800000, 0x0800000, NO_DUMP )
	4144	ROM_LOAD( "a04801w064.u7", 0x0000000, 0x0800000, CRC(26dd4932) SHA1(9bbabb5a53cb5ba88397cc2c258980f3b70314ce) ) //image-1
	4145	ROM_LOAD( "a04802w064.u8", 0x0800000, 0x0800000, CRC(0e6bf7a9) SHA1(a7541e2b5a0df2bc62a5b347e54dbc2ed1922db2) ) //image-2
4078	4146
4079	4147	ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */
4080		ROM_LOAD( "b~~itmap-~~1.u1", 0x0000000, 0x0800000, ~~NO_DUMP~~ )
	4148	ROM_LOAD( "b04801w064.u1", 0x0000000, 0x0800000, CRC(98dce13a) SHA1(61d48b7117459f7babc022b68231f6928177a71d) ) //bitmap-1
4081	4149
4082	4150	ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */
4083	4151	/* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */
4084		ROM_LOAD( "~~music-~~1.u17", 0x400000, 0x400000, ~~NO_DUMP~~ )
	4152	ROM_LOAD( "w04801b032.u17", 0x400000, 0x400000, CRC(60298536) SHA1(6b7333f16cce778c5725dbdf75a5446f0906397a) ) //music-1
4085	4153	ROM_END
4086	4154
4087	4155	ROM_START( ddp3 )
4088	4156	ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */
4089	4157	ROM_LOAD16_WORD_SWAP( "ddp3_bios.u37", 0x00000, 0x080000, CRC(b3cc5c8f) SHA1(02d9511cf71e4a0d6ca8fd9a1ef2c79b0d001824) ) // uses a standard PGM bios with the startup logos hacked out
4090		ROM_LOAD16_WORD_SWAP( "ddp3_~~d_d_~~1_0.u36", 0x100000, 0x200000, CRC(5~~d3f85~~ba) SHA1(4c~~24ea2~~06140863d45~~617~~97503~~669~~2~~1442~~e1d2b8) )
	4158	ROM_LOAD16_WORD_SWAP( "ddp3_v101.u36", 0x100000, 0x200000, CRC(195b5c1e) SHA1(f18d791c034b0a3d85888a92fb5d326ee3deb04f) ) // yes this one was actually marked v101 which goes against the standard Cave marking system
4091	4159
4092	4160	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
4093	4161	ROM_LOAD( "ddp3_igs027a.bin", 0x000000, 0x04000, NO_DUMP )
r9812	r9813
4097	4165
4098	4166	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
4099	4167	ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM bios
4100		ROM_LOAD( "t04401w064.u19",0x400000, 0x800000, CRC(3a95f19c) SHA1(fd3c47cf0b8b1e20c6bec4be68a089fc8bbf4dbe) )
	4168	ROM_LOAD( "t04401w064.u19",0x180000, 0x800000, CRC(3a95f19c) SHA1(fd3c47cf0b8b1e20c6bec4be68a089fc8bbf4dbe) ) //text-1
4101	4169
4102	4170	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
4103		ROM_LOAD( "a04401w064.u7", 0x0000000, 0x0800000, CRC(ed229794) SHA1(1cf1863495a18c7c7d277a9be43ec116b00960b0) )
4104		ROM_LOAD( "a04402w064.u8", 0x0800000, 0x0800000, CRC(f7816273) SHA1(dfa76e29cfe4fc03a9c0e1d932b244581f3bb9c4) )
	4171	ROM_LOAD( "a04401w064.u7", 0x0000000, 0x0800000, CRC(ed229794) SHA1(1cf1863495a18c7c7d277a9be43ec116b00960b0) ) //image-1
	4172	ROM_LOAD( "a04402w064.u8", 0x0800000, 0x0800000, BAD_DUMP CRC(f7816273) SHA1(dfa76e29cfe4fc03a9c0e1d932b244581f3bb9c4) ) //image-2 - bad dump: checksum does not match rom label
4105	4173
4106	4174	ROM_REGION( 0x1000000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */
4107		ROM_LOAD( "b04401w064.u1", 0x0000000, 0x0800000, CRC(830aab7d) SHA1(1829197457b401b203360a76ee345108df9c4b24) )
	4175	ROM_LOAD( "b04401w064.u1", 0x0000000, 0x0800000, BAD_DUMP CRC(830aab7d) SHA1(1829197457b401b203360a76ee345108df9c4b24) ) //bitmap-1 - bad dump: checksum does not match rom label
4108	4176
4109	4177	ROM_REGION( 0x1000000, "ics", 0 ) /* Samples - (8 bit mono 11025Hz) - */
4110	4178	ROM_LOAD( "pgm_m01s.rom", 0x000000, 0x200000, CRC(45ae7159) SHA1(d3ed3ff3464557fd0df6b069b2e431528b0ebfa8) ) // same as standard PGM bios
4111		ROM_LOAD( "m04401b032.u17", 0x400000, 0x400000, CRC(a118560c) SHA1(3e99bb2adbc9d464d79aa8723f0d40305ea821ca) )
	4179	ROM_LOAD( "m04401b032.u17", 0x400000, 0x400000, BAD_DUMP CRC(a118560c) SHA1(3e99bb2adbc9d464d79aa8723f0d40305ea821ca) ) //music-1 - bad dump: checksum does not match rom label
	4180
	4181	ROM_REGION( 0x20000, "sram", 0 ) /* default settings */
	4182	ROM_LOAD( "ddp3_defaults.nv", 0x0000000, 0x020000, CRC(571e96c0) SHA1(348940c77ca348213331b85b9b1d3aabb96a528a) )
4112	4183	ROM_END
4113	4184
	4185
	4186	ROM_START( ddp3a )
	4187	ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */
	4188	ROM_LOAD16_WORD_SWAP( "ddp3_bios.u37", 0x00000, 0x080000, CRC(b3cc5c8f) SHA1(02d9511cf71e4a0d6ca8fd9a1ef2c79b0d001824) ) // uses a standard PGM bios with the startup logos hacked out
	4189	ROM_LOAD16_WORD_SWAP( "ddp3_d_d_1_0.u36", 0x100000, 0x200000, CRC(5d3f85ba) SHA1(4c24ea206140863d456179750366921442e1d2b8) ) // marked v100
	4190
	4191	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
	4192	ROM_LOAD( "ddp3_igs027a.bin", 0x000000, 0x04000, NO_DUMP )
	4193
	4194	ROM_REGION32_LE( 0x400000, "user1", ROMREGION_ERASE00 )
	4195	/* no external protection rom */
	4196
	4197	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
	4198	ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM bios
	4199	ROM_LOAD( "t04401w064.u19",0x180000, 0x800000, CRC(3a95f19c) SHA1(fd3c47cf0b8b1e20c6bec4be68a089fc8bbf4dbe) ) //text-1
	4200
	4201	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
	4202	ROM_LOAD( "a04401w064.u7", 0x0000000, 0x0800000, CRC(ed229794) SHA1(1cf1863495a18c7c7d277a9be43ec116b00960b0) ) //image-1
	4203	ROM_LOAD( "a04402w064.u8", 0x0800000, 0x0800000, BAD_DUMP CRC(f7816273) SHA1(dfa76e29cfe4fc03a9c0e1d932b244581f3bb9c4) ) //image-2 - bad dump: checksum does not match rom label
	4204
	4205	ROM_REGION( 0x1000000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */
	4206	ROM_LOAD( "b04401w064.u1", 0x0000000, 0x0800000, BAD_DUMP CRC(830aab7d) SHA1(1829197457b401b203360a76ee345108df9c4b24) ) //bitmap-1 - bad dump: checksum does not match rom label
	4207
	4208	ROM_REGION( 0x1000000, "ics", 0 ) /* Samples - (8 bit mono 11025Hz) - */
	4209	ROM_LOAD( "pgm_m01s.rom", 0x000000, 0x200000, CRC(45ae7159) SHA1(d3ed3ff3464557fd0df6b069b2e431528b0ebfa8) ) // same as standard PGM bios
	4210	ROM_LOAD( "m04401b032.u17", 0x400000, 0x400000, BAD_DUMP CRC(a118560c) SHA1(3e99bb2adbc9d464d79aa8723f0d40305ea821ca) ) //music-1 - bad dump: checksum does not match rom label
	4211
	4212	ROM_REGION( 0x20000, "sram", 0 ) /* default settings */
	4213	ROM_LOAD( "ddp3_defaults.nv", 0x0000000, 0x020000, CRC(571e96c0) SHA1(348940c77ca348213331b85b9b1d3aabb96a528a) )
	4214	ROM_END
	4215
	4216	ROM_START( ddp3b )
	4217	ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */
	4218	ROM_LOAD16_WORD_SWAP( "ddp3_bios.u37", 0x00000, 0x080000, CRC(b3cc5c8f) SHA1(02d9511cf71e4a0d6ca8fd9a1ef2c79b0d001824) ) // uses a standard PGM bios with the startup logos hacked out
	4219	ROM_LOAD16_WORD_SWAP( "dd v100.bin", 0x100000, 0x200000, CRC(7da0c1e4) SHA1(aca2fe35ba0ab3628900fa2aba2d22fc4fd7046d) ) // marked v100
	4220
	4221	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
	4222	ROM_LOAD( "ddp3_igs027a.bin", 0x000000, 0x04000, NO_DUMP )
	4223
	4224	ROM_REGION32_LE( 0x400000, "user1", ROMREGION_ERASE00 )
	4225	/* no external protection rom */
	4226
	4227	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
	4228	ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM bios
	4229	ROM_LOAD( "t04401w064.u19",0x180000, 0x800000, CRC(3a95f19c) SHA1(fd3c47cf0b8b1e20c6bec4be68a089fc8bbf4dbe) ) //text-1
	4230
	4231	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
	4232	ROM_LOAD( "a04401w064.u7", 0x0000000, 0x0800000, CRC(ed229794) SHA1(1cf1863495a18c7c7d277a9be43ec116b00960b0) ) //image-1
	4233	ROM_LOAD( "a04402w064.u8", 0x0800000, 0x0800000, BAD_DUMP CRC(f7816273) SHA1(dfa76e29cfe4fc03a9c0e1d932b244581f3bb9c4) ) //image-2 - bad dump: checksum does not match rom label
	4234
	4235	ROM_REGION( 0x1000000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */
	4236	ROM_LOAD( "b04401w064.u1", 0x0000000, 0x0800000, BAD_DUMP CRC(830aab7d) SHA1(1829197457b401b203360a76ee345108df9c4b24) ) //bitmap-1 - bad dump: checksum does not match rom label
	4237
	4238	ROM_REGION( 0x1000000, "ics", 0 ) /* Samples - (8 bit mono 11025Hz) - */
	4239	ROM_LOAD( "pgm_m01s.rom", 0x000000, 0x200000, CRC(45ae7159) SHA1(d3ed3ff3464557fd0df6b069b2e431528b0ebfa8) ) // same as standard PGM bios
	4240	ROM_LOAD( "m04401b032.u17", 0x400000, 0x400000, BAD_DUMP CRC(a118560c) SHA1(3e99bb2adbc9d464d79aa8723f0d40305ea821ca) ) //music-1 - bad dump: checksum does not match rom label
	4241
	4242	ROM_REGION( 0x20000, "sram", 0 ) /* default settings */
	4243	ROM_LOAD( "ddp3_defaults.nv", 0x0000000, 0x020000, CRC(571e96c0) SHA1(348940c77ca348213331b85b9b1d3aabb96a528a) )
	4244	ROM_END
	4245
4114	4246	/* this expects Magic values in NVRAM to boot */
4115	4247	ROM_START( ddp3blk )
4116	4248	ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */
r9812	r9813
4125	4257
4126	4258	ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
4127	4259	ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM bios
4128		ROM_LOAD( "t04401w064.u19",0x400000, 0x800000, CRC(3a95f19c) SHA1(fd3c47cf0b8b1e20c6bec4be68a089fc8bbf4dbe) )
	4260	ROM_LOAD( "t04401w064.u19",0x180000, 0x800000, CRC(3a95f19c) SHA1(fd3c47cf0b8b1e20c6bec4be68a089fc8bbf4dbe) ) //text-1
4129	4261
4130	4262	ROM_REGION( 0x1c00000, "sprcol", 0 ) /* Sprite Colour Data */
4131		ROM_LOAD( "a04401w064.u7", 0x0000000, 0x0800000, CRC(ed229794) SHA1(1cf1863495a18c7c7d277a9be43ec116b00960b0) )
4132		ROM_LOAD( "a04402w064.u8", 0x0800000, 0x0800000, CRC(f7816273) SHA1(dfa76e29cfe4fc03a9c0e1d932b244581f3bb9c4) )
	4263	ROM_LOAD( "a04401w064.u7", 0x0000000, 0x0800000, CRC(ed229794) SHA1(1cf1863495a18c7c7d277a9be43ec116b00960b0) ) //image-1
	4264	ROM_LOAD( "a04402w064.u8", 0x0800000, 0x0800000, BAD_DUMP CRC(f7816273) SHA1(dfa76e29cfe4fc03a9c0e1d932b244581f3bb9c4) ) //image-2 - bad dump: checksum does not match rom label
4133	4265
4134	4266	ROM_REGION( 0x1000000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */
4135		ROM_LOAD( "b04401w064.u1", 0x0000000, 0x0800000, CRC(830aab7d) SHA1(1829197457b401b203360a76ee345108df9c4b24) )
	4267	ROM_LOAD( "b04401w064.u1", 0x0000000, 0x0800000, BAD_DUMP CRC(830aab7d) SHA1(1829197457b401b203360a76ee345108df9c4b24) ) //bitmap-1 - bad dump: checksum does not match rom label
4136	4268
4137	4269	ROM_REGION( 0x1000000, "ics", 0 ) /* Samples - (8 bit mono 11025Hz) - */
4138	4270	ROM_LOAD( "pgm_m01s.rom", 0x000000, 0x200000, CRC(45ae7159) SHA1(d3ed3ff3464557fd0df6b069b2e431528b0ebfa8) ) // same as standard PGM bios
4139		ROM_LOAD( "m04401b032.u17", 0x400000, 0x400000, CRC(a118560c) SHA1(3e99bb2adbc9d464d79aa8723f0d40305ea821ca) )
	4271	ROM_LOAD( "m04401b032.u17", 0x400000, 0x400000, BAD_DUMP CRC(a118560c) SHA1(3e99bb2adbc9d464d79aa8723f0d40305ea821ca) ) //music-1 - bad dump: checksum does not match rom label
4140	4272
4141	4273	ROM_REGION( 0x20000, "sram", 0 ) /* NVRAM with factory programmed values - needed to boot */
4142		ROM_LOAD( "ddp3blk.nv", 0x0000000, 0x020000, CRC(b9ce04e8) SHA1(adb6f026c~~686~~4~~8f2f~~7418~~e6d6~~93a6~~eda~~6d89d69d) )
	4274	ROM_LOAD( "ddp3blk_defaults.nv", 0x0000000, 0x020000, CRC(a1651904) SHA1(5b80d3c4c764895c40953a66161d4dd84f742604) )
4143	4275	ROM_END
4144	4276
4145	4277	/* this is on PGM2, the main board contains 2 custom ASICs, no roms or other kind of bios, I don't know how compatible the
r9812	r9813
4479	4611	kov2_latch_init(machine);
4480	4612	}
4481	4613
	4614
	4615	static UINT16 *ddp2_protram;
	4616	static int ddp2_asic27_0xd10000 = 0;
	4617
	4618	// ARM comms latch
	4619	static WRITE16_HANDLER ( ddp2_asic27_0xd10000_w )
	4620	{
	4621	//int pc = cpu_get_pc(space->cpu);
	4622
	4623	//logerror("%06x: ddp2_asic27_0xd10000_w %04x, %04x\n", pc, offset*2,data);
	4624
	4625	ddp2_asic27_0xd10000=data;
	4626	}
	4627
	4628	// ARM comms latch
	4629	static READ16_HANDLER ( ddp2_asic27_0xd10000_r )
	4630	{
	4631	//int pc = cpu_get_pc(space->cpu);
	4632
	4633	//logerror("%06x: d100000_prot_r %04x, %04x\n", pc, offset*2,ddp2_asic27_0xd10000);
	4634
	4635	ddp2_asic27_0xd10000++;
	4636	ddp2_asic27_0xd10000&=0x7f;
	4637	return ddp2_asic27_0xd10000;
	4638	}
	4639
	4640	// Shared with ARM
	4641	static READ16_HANDLER(ddp2_protram_r)
	4642	{
	4643	//int pc = cpu_get_pc(space->cpu);
	4644
	4645	//logerror("%06x prot_r %04x, %04x\n", pc, offset*2,ddp2_protram[offset]);
	4646
	4647	if (offset == 0x02/2) return input_port_read(space->machine, "Region");
	4648
	4649	if (offset == 0x1f00/2) return 0;
	4650
	4651	return ddp2_protram[offset];
	4652	}
	4653
	4654	// Shared with ARM
	4655	static WRITE16_HANDLER(ddp2_protram_w)
	4656	{
	4657	//int pc = cpu_get_pc(space->cpu);
	4658
	4659	//logerror("%06x: prot_w %04x, %02x\n", pc, offset*2,data);
	4660
	4661	COMBINE_DATA(&ddp2_protram[offset]);
	4662
	4663	ddp2_protram[0x10/2] = 0;
	4664	ddp2_protram[0x20/2] = 1;
	4665	}
	4666
4482	4667	static DRIVER_INIT( ddp2 )
4483	4668	{
4484	4669	pgm_basic_init(machine);
4485	4670	pgm_ddp2_decrypt(machine);
4486		kov2_latch_init(machine);
	4671	//kov2_latch_init(machine);
	4672
	4673	// should actually be kov2-like, but keep this simulation for now just to demonstrate it. It will need the internal ARM rom to work properly.
	4674	ddp2_protram = auto_alloc_array(machine, UINT16, 0x10000);
	4675	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd00000, 0xd0ffff, 0, 0, ddp2_protram_r, ddp2_protram_w);
	4676	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd10000, 0xd10001, 0, 0, ddp2_asic27_0xd10000_r, ddp2_asic27_0xd10000_w);
	4677
4487	4678	}
4488	4679
4489	4680	static void svg_basic_init(running_machine *machine)
r9812	r9813
5443	5634	kovsh_latch_init(machine);
5444	5635	}
5445	5636
5446		/* this is based on the puzzle star simulation,
5447		at least for how it communicates with the device..
	5637	/*
	5638	in Ketsui (ket) @ 000A719C (move.w)
5448	5639
5449		please don't driver_data this, it's temporary code, and just
5450		becomes and absolute pain to work with if bits of it end
5451		up all over the place, and near impossible to read with state->
5452		before everything.
	5640	if you change D0 to 0x12
	5641	the game will runs to "Asic27 Test" mode
5453	5642
	5643	bp A71A0,1,{d0=0x12;g}
5454	5644	*/
5455		static UINT16 value0, value1, valuekey, ddp3lastcommand;
5456		static UINT32 valueresponse;
5457	5645
5458	5646	static WRITE16_HANDLER( ddp3_asic_w )
5459	5647	{
	5648	cavepgm_state *state = space->machine->driver_data<cavepgm_state>();
5460	5649
5461	5650	if (offset == 0)
5462	5651	{
5463		value0 = data;
	5652	state->value0 = data;
5464	5653	return;
5465	5654	}
5466	5655	else if (offset == 1)
5467	5656	{
5468	5657	UINT16 realkey;
5469	5658	if ((data >> 8) == 0xff)
5470		valuekey = 0xff00;
5471		realkey = valuekey >> 8;
5472		realkey \|= valuekey;
	5659	state->valuekey = 0xff00;
	5660	realkey = state->valuekey >> 8;
	5661	realkey \|= state->valuekey;
5473	5662	{
5474		valuekey += 0x0100;
5475		valuekey &= 0xff00;
5476		if (valuekey == 0xff00)
5477		valuekey = 0x0100;
	5663	state->valuekey += 0x0100;
	5664	state->valuekey &= 0xff00;
	5665	if (state->valuekey == 0xff00)
	5666	state->valuekey = 0x0100;
5478	5667	}
5479	5668	data ^= realkey;
5480		value1 = data;
5481		value0 ^= realkey;
	5669	state->value1 = data;
	5670	state->value0 ^= realkey;
5482	5671
5483		ddp3lastcommand = value1 & 0xff;
	5672	state->ddp3lastcommand = state->value1 & 0xff;
5484	5673
5485		/* typical frame (ddp3) (all 3 games use only these commands? for the most part of levels espgal just issues 8e)
	5674	/* typical frame (state->ddp3) (all 3 games use only these commands? for the most part of levels espgal just issues 8e)
5486	5675	vbl
5487	5676	145f28 command 67
5488	5677	145f70 command e5
r9812	r9813
5492	5681	145ec0 command 8e
5493	5682	*/
5494	5683
5495		switch (ddp3lastcommand)
	5684	switch (state->ddp3lastcommand)
5496	5685	{
5497	5686	default:
5498		printf("%06x command %02x \| %04x\n", cpu_get_pc(space->cpu), ddp3lastcommand, value0);
5499		valueresponse = 0x880000;
	5687	printf("%06x command %02x \| %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
	5688	state->valueresponse = 0x880000;
5500	5689	break;
5501	5690
5502	5691	case 0x40:
5503		case 0x67:
5504		case 0x8e:
5505		case 0xe5:
5506		printf("%06x command %02x \| %04x\n", cpu_get_pc(space->cpu), ddp3lastcommand, value0);
5507		valueresponse = 0x880000;
	5692	state->valueresponse = 0x880000;
	5693	state->ddp3slots[(state->value0>>10)&0x1F]=
	5694	(state->ddp3slots[(state->value0>>5)&0x1F]+
	5695	state->ddp3slots[(state->value0>>0)&0x1F])&0xffffff;
5508	5696	break;
5509	5697
	5698	case 0x67: // set high bits
	5699	// printf("%06x command %02x \| %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
	5700	state->valueresponse = 0x880000;
	5701	state->ddp3internal_slot = (state->value0 & 0xff00)>>8;
	5702	state->ddp3slots[state->ddp3internal_slot] = (state->value0 & 0x00ff) << 16;
	5703	break;
	5704
	5705	case 0xe5: // set low bits for operation?
	5706	// printf("%06x command %02x \| %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
	5707	state->valueresponse = 0x880000;
	5708	state->ddp3slots[state->ddp3internal_slot] \|= (state->value0 & 0xffff);
	5709	break;
	5710
	5711
	5712	case 0x8e: // read back result of operations
	5713	// printf("%06x command %02x \| %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
	5714	state->valueresponse = state->ddp3slots[state->value0&0xff];
	5715	break;
	5716
	5717
5510	5718	case 0x99: // reset?
5511		valuekey = 0x100;
5512		valueresponse = 0x00880000;
	5719	state->valuekey = 0x100;
	5720	state->valueresponse = 0x00880000;
5513	5721	break;
5514	5722
5515	5723	}
r9812	r9813
5523	5731
5524	5732	static READ16_HANDLER( ddp3_asic_r )
5525	5733	{
	5734	cavepgm_state *state = space->machine->driver_data<cavepgm_state>();
5526	5735
5527	5736	if (offset == 0)
5528	5737	{
5529		UINT16 d = valueresponse & 0xffff;
5530		UINT16 realkey = valuekey >> 8;
5531		realkey \|= valuekey;
	5738	UINT16 d = state->valueresponse & 0xffff;
	5739	UINT16 realkey = state->valuekey >> 8;
	5740	realkey \|= state->valuekey;
5532	5741	d ^= realkey;
5533	5742
5534	5743	return d;
r9812	r9813
5536	5745	}
5537	5746	else if (offset == 1)
5538	5747	{
5539		UINT16 d = valueresponse >> 16;
5540		UINT16 realkey = valuekey >> 8;
5541		realkey \|= valuekey;
	5748	UINT16 d = state->valueresponse >> 16;
	5749	UINT16 realkey = state->valuekey >> 8;
	5750	realkey \|= state->valuekey;
5542	5751	d ^= realkey;
5543	5752	return d;
5544	5753
r9812	r9813
5546	5755	return 0xffff;
5547	5756	}
5548	5757
5549		static READ16_HANDLER( ddp3_ram_mirror_r )
5550		{
5551		// HACK!
5552		// this should be a mirror of main ram, at least according to the standard PGM map.
5553		// returning 0x0000 for all values read from here allows the games to run for a bit longer tho
5554		printf("%06x ddp3_ram_mirror_r would return %04x returning 0x0000 instead\n", cpu_get_pc(space->cpu), pgm_mainram[offset]);
5555		return 0x0000;
5556		//return pgm_mainram[offset];
5557		}
5558	5758
5559	5759	void install_asic27a_ddp3(running_machine* machine)
5560	5760	{
5561	5761	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x500000, 0x500005, 0, 0, ddp3_asic_r, ddp3_asic_w);
5562		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880000, 0x89ffff, 0, 0, ddp3_ram_mirror_r);
5563	5762	}
5564	5763
5565	5764	void install_asic27a_ket(running_machine* machine)
5566	5765	{
5567	5766	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400000, 0x400005, 0, 0, ddp3_asic_r, ddp3_asic_w);
5568		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880000, 0x89ffff, 0, 0, ddp3_ram_mirror_r);
5569	5767	}
5570	5768
5571	5769	void install_asic27a_espgal(running_machine* machine)
5572	5770	{
5573	5771	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400000, 0x400005, 0, 0, ddp3_asic_r, ddp3_asic_w);
5574		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880000, 0x89ffff, 0, 0, ddp3_ram_mirror_r);
5575	5772	}
5576	5773
5577	5774
r9812	r9813
5607	5804	-----------------------------------------------------------------------------------------------------------------------*/
5608	5805
5609	5806	// the version numbering on these is a mess... date srings from ROM (and in some cases even those are missing..)
5610		GAME( 1997, orlegend, pgm, pgm, pgm, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 126)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 01/14/98 18:16:38 - runs as World
5611		GAME( 1997, orlegende, orlegend, pgm, pgm, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 07/14/97 11:19:45 - runs as World
5612		GAME( 1997, orlegendc, orlegend, pgm, pgm, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112, Chinese Board)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 05/05/97 10:08:21 - runs as World, Korea, China
5613		GAME( 1997, orlegendca, orlegend, pgm, pgm, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. ???, Chinese Board)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 04/02/97 13:35:43 - runs as HongKong, China, China
5614		GAME( 1997, orlegend111c, orlegend, pgm, pgm, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 111, Chinese Board)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 no date! - runs as HongKong, China, China
	5807	GAME( 1997, orlegend, pgm, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 126)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 01/14/98 18:16:38 - runs as World
	5808	GAME( 1997, orlegende, orlegend, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 07/14/97 11:19:45 - runs as World
	5809	GAME( 1997, orlegendc, orlegend, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112, Chinese Board)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 05/05/97 10:08:21 - runs as World, Korea, China
	5810	GAME( 1997, orlegendca, orlegend, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. ???, Chinese Board)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 04/02/97 13:35:43 - runs as HongKong, China, China
	5811	GAME( 1997, orlegend111c, orlegend, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 111, Chinese Board)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0001 no date! - runs as HongKong, China, China
5615	5812	GAME( 1997, orlegend105k, orlegend, pgm, orld105k, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 105, Korean Board)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // V0000 no date! - runs as Korea
5616	5813
5617	5814	GAME( 1997, drgw2, pgm, drgw2, pgm, drgw2, ROT0, "IGS", "Dragon World II (ver. 110X, Export)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) // This set still has protection issues!
r9812	r9813
5627	5824	GAME( 1999, kovsh103, kovsh, kov, sango, kovsh, ROT0, "IGS", "Knights of Valour Super Heroes / Sangoku Senki Super Heroes (ver. 103, CN)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // 68k V103, China internal ROM
5628	5825	// nasty modern asian bootleg of Knights of Valour Super Heroes with characters ripped from SNK's The King of Fighters series!
5629	5826	GAME( 1999, kovqhsgs, kovsh, kov, sango, kovqhsgs, ROT0, "bootleg", "Knights of Valour: Quan Huang San Guo Special / Sangoku Senki: Quan Huang San Guo Special (ver. 303CN)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
5630		// these 3 don't seem to work with the KovSH ARM rom.. do they have their own protection, or expect a newer version?
5631		GAME( 1999, kovlsqh2, kovsh, kov, sango, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Quan Huang 2 / Sangoku Senki: Luan Shi Quan Huang 2 (ver. 200CN)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5632		GAME( 1999, kovlsjb, kovsh, kov, sango, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Jie Ba / Sangoku Senki: Luan Shi Jie Ba (ver. 200CN)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5633		GAME( 1999, kovlsjba, kovsh, kov, sango, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Jie Ba / Sangoku Senki: Luan Shi Jie Ba (alt ver. 200CN)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5634	5827
5635	5828	GAME( 2000, kov2, pgm, kov2, sango, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 107, 102, 100HK)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // 05/10/01 14:24:08 V107 (Ext. Arm V102, Int. Arm V100HK)
5636	5829	GAME( 2000, kov2106, kov2, kov2, sango, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 106, 102, 100KH)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // 02/27/01 13:26:46 V106 (Ext. Arm V102, Int. Arm V100HK)
r9812	r9813
5681	5874	GAME( 2001, kov2p, pgm, kov2, sango, kov2p, ROT0, "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M204XX)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5682	5875	GAME( 2001, kov2p205, kov2p, kov2, sango, kov2p, ROT0, "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M205XX)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5683	5876
5684		GAME( 2001, ddp2, pgm, kov2, ddp2, ddp2, ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 102)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5685		GAME( 2001, ddp2101, ddp2, kov2, ddp2, ddp2, ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 101)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5686		GAME( 2001, ddp2100, ddp2, kov2, ddp2, ddp2, ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 100)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	5877	GAME( 2001, ddp2, pgm, kov_disabled_arm, ddp2, ddp2, ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 102)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	5878	GAME( 2001, ddp2101, ddp2, kov_disabled_arm, ddp2, ddp2, ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 101)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	5879	GAME( 2001, ddp2100, ddp2, kov_disabled_arm, ddp2, ddp2, ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 100)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5687	5880
5688	5881	GAME( 2001, dw2001, pgm, kov_disabled_arm, sango, dw2001, ROT0, "IGS", "Dragon World 2001", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) // V0000 02/21/01 16:05:16
5689	5882
r9812	r9813
5700	5893	GAME( 2004, oldsplus, pgm, kov, olds, oldsplus, ROT0, "IGS", "Oriental Legend Special Plus / Xi You Shi E Zhuan Super Plus", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5701	5894
5702	5895	GAME( 2004, kovshp, pgm, kov, sango, kovshp, ROT0, "IGS", "Knights of Valour Super Heroes Plus / Sangoku Senki Super Heroes Plus (ver. 100)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	5896	// these bootlegs are clones of this instead
	5897	GAME( 2004, kovlsqh2, kovshp, kov, sango, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Quan Huang 2 / Sangoku Senki: Luan Shi Quan Huang 2 (ver. 200CN)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	5898	GAME( 2004, kovlsjb, kovshp, kov, sango, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Jie Ba / Sangoku Senki: Luan Shi Jie Ba (ver. 200CN)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	5899	GAME( 2004, kovlsjba, kovshp, kov, sango, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Jie Ba / Sangoku Senki: Luan Shi Jie Ba (alt ver. 200CN)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5703	5900
5704	5901	GAME( 2005, killbldp, pgm, svg, sango, killbldp, ROT0, "IGS", "The Killing Blade Plus (ver. 300)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5705	5902
r9812	r9813
5708	5905	GAME( 2005, svg, pgm, svg, sango, svg, ROT0, "IGS", "S.V.G. - Spectral vs Generation (ver. 200)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
5709	5906
5710	5907	/* these don't use an External ARM rom, and don't have any weak internal functions which would allow the internal ROM to be read out */
5711		GAME( 2002, ddp3, 0, cavepgm, ddp2, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE )
5712		GAME( 2002, ddp3blk, ddp3, cavepgm, ddp2, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (Black Label)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE )
5713	5908
	5909	GAME( 2002, ddp3, 0, cavepgm, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (V101)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // Displays "2002.04.05.Master Ver"
	5910	// is there a v101 without the . after 05?
	5911	GAME( 2002, ddp3a, ddp3, cavepgm, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (V100, second revision)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // Displays "2002.04.05.Master Ver"
	5912	GAME( 2002, ddp3b, ddp3, cavepgm, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (V100, first revision)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // Displays "2002.04.05 Master Ver"
	5913	GAME( 2002, ddp3blk, ddp3, cavepgm, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (Black Label)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // Displays "2002.04.05.Master Ver" (old) or "2002.10.07 Black Ver" (new)
	5914
5714	5915	// the exact text of the 'version' shows which revision of the game it is; the newest has 2 '.' symbols in the string, the oldest, none.
5715		GAME( 2002, ket, 0, cavepgm, ddp2, ket, ROT270, "Cave", "Ketsui", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) // Displays 2003/01/01. Master Ver.
5716		GAME( 2002, keta, ket, cavepgm, ddp2, ket, ROT270, "Cave", "Ketsui (older)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) // Displays 2003/01/01 Master Ver.
5717		GAME( 2002, ketb, ket, cavepgm, ddp2, ket, ROT270, "Cave", "Ketsui (first revision)", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE ) // Displays 2003/01/01 Master Ver
	5916	GAME( 2002, ket, 0, cavepgm, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (V100, third revision)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // Displays "2003/01/01. Master Ver."
	5917	GAME( 2002, keta, ket, cavepgm, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (V100, second revision)",GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE) // Displays "2003/01/01 Master Ver."
	5918	GAME( 2002, ketb, ket, cavepgm, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (V100, first revision)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE) // Displays "2003/01/01 Master Ver"
5718	5919
5719		GAME( 2002, espgal, 0, cavepgm, ddp2, espgal, ROT270, "Cave", "EspGaluda", GAME_IMPERFECT_SOUND \| GAME_~~UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_~~SUPPORTS_SAVE )
	5920	GAME( 2003, espgal, 0, cavepgm, pgm, espgal, ROT270, "Cave", "EspGaluda (V100, first revision)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // Displays "2003/10/15 Master Ver"
5720	5921
5721	5922	/* PGM2 */
5722	5923	GAME( 2007, orleg2, 0, pgm, pgm, 0, ROT0, "IGS", "Oriental Legend 2", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING \| GAME_SUPPORTS_SAVE )

src/mame/drivers/pengadvb.c
r9812	r9813
235	235	vdp_interrupt
236	236	};
237	237
	238	static STATE_POSTLOAD ( pengadvb )
	239	{
	240	TMS9928A_post_load(machine);
	241	mem_map_banks(machine);
	242	}
	243
238	244	static MACHINE_START( pengadvb )
239	245	{
240	246	TMS9928A_configure(&tms9928a_interface);
r9812	r9813
242	248	state_save_register_global_pointer(machine, main_mem, 0x4000);
243	249	state_save_register_global(machine, mem_map);
244	250	state_save_register_global_array(machine, mem_banks);
	251	state_save_register_postload(machine, pengadvb, NULL);
245	252	}
246	253
247	254	static MACHINE_RESET( pengadvb )
r9812	r9813
276	283	MDRV_SCREEN_MODIFY("screen")
277	284	MDRV_SCREEN_REFRESH_RATE((float)XTAL_10_738635MHz/2/342/262)
278	285	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
279		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(4458)) /* 70 lines */
	286	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(4395)) /* 69 lines */
280	287
281	288	/* sound hardware */
282	289	MDRV_SPEAKER_STANDARD_MONO("mono")

src/mame/drivers/st0016.c
r9812	r9813
691	691	GAME( 1995, koikois, 0, st0016, koikois, renju, ROT0, "Visco", "Koi Koi Shimasho", GAME_IMPERFECT_GRAPHICS)
692	692	/* Not working */
693	693	GAME( 1994, mayjinsn, 0, mayjinsn, st0016, mayjinsn, ROT0, "Seta", "Mayjinsen",GAME_IMPERFECT_GRAPHICS\|GAME_NOT_WORKING)
694		GAME( 199?, dcrown, 0, st0016, renju, renju, ROT0, "unknown", "Dream Crown", GAME_NOT_WORKING)
	694	GAME( 199?, dcrown, 0, st0016, renju, renju, ROT0, "<unknown>", "Dream Crown", GAME_NOT_WORKING)

src/mame/drivers/centiped.c
r9812	r9813
416	416	Off On On For every 5 coins, add 1 coin
417	417	------------------------------------------
418	418
	419	Maze Invaders:
	420
	421	- The controls are somewhat like Food Fight in the way that they need to be
	422	'calibrated' as you play or before you start by pushing a couple seconds in
	423	each direction to assign the boundries.
	424
	425	- The second button makes an audible tone while playing the game but does
	426	not appear to be used in any capacity in the game. The prototype cabinet
	427	(looks like it was made from a Tempest cabinet shell) shows 2 buttons,
	428	so it is mapped.
	429
	430	http://www.atarigames.com/safestuff/mazeinvaders.html
	431
419	432	***************************************************************************/
420	433
421	434	#include "emu.h"
r9812	r9813
898	911	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
899	912
900	913	PORT_START("DSW1")
901		PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("N9:1,2")
	914	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("N9:!1,!2")
902	915	PORT_DIPSETTING( 0x00, DEF_STR( English ) )
903	916	PORT_DIPSETTING( 0x01, DEF_STR( German ) )
904	917	PORT_DIPSETTING( 0x02, DEF_STR( French ) )
905	918	PORT_DIPSETTING( 0x03, DEF_STR( Spanish ) )
906		PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("N9:3,4")
	919	PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("N9:!3,!4")
907	920	PORT_DIPSETTING( 0x00, "2" )
908	921	PORT_DIPSETTING( 0x04, "3" )
909	922	PORT_DIPSETTING( 0x08, "4" )
910	923	PORT_DIPSETTING( 0x0c, "5" )
911		PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("N9:5,6")
	924	PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("N9:!5,!6")
912	925	PORT_DIPSETTING( 0x00, "10000" )
913	926	PORT_DIPSETTING( 0x10, "12000" )
914	927	PORT_DIPSETTING( 0x20, "15000" )
915	928	PORT_DIPSETTING( 0x30, "20000" )
916		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("N9:7")
	929	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("N9:!7")
917	930	PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
918	931	PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
919		PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("N9:8")
	932	PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("N9:!8")
920	933	PORT_DIPSETTING( 0x00, "1" )
921	934	PORT_DIPSETTING( 0x80, "2" )
922	935
923	936	PORT_START("DSW2")
924		PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("N8:1,2")
	937	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("N8:!1,!2")
925	938	PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
926	939	PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
927	940	PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
928	941	PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
929		PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("N8:3,4")
	942	PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("N8:!3,!4")
930	943	PORT_DIPSETTING( 0x00, "*1" )
931	944	PORT_DIPSETTING( 0x04, "*4" )
932	945	PORT_DIPSETTING( 0x08, "*5" )
933	946	PORT_DIPSETTING( 0x0c, "*6" )
934		PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("N8:5")
	947	PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("N8:!5")
935	948	PORT_DIPSETTING( 0x00, "*1" )
936	949	PORT_DIPSETTING( 0x10, "*2" )
937		PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("N8:6,7,8")
	950	PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("N8:!6,!7,!8")
938	951	PORT_DIPSETTING( 0x00, DEF_STR( None ) )
939	952	PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
940	953	PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
r9812	r9813
959	972	PORT_INCLUDE( centiped )
960	973
961	974	PORT_MODIFY("DSW1")
962		PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("N9:1,2")
	975	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("N9:!1,!2")
963	976	PORT_DIPSETTING( 0x00, DEF_STR( English ) )
964	977	PORT_DIPSETTING( 0x01, DEF_STR( German ) )
965	978	PORT_DIPSETTING( 0x02, DEF_STR( French ) )
r9812	r9813
981	994	PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
982	995
983	996	PORT_MODIFY("DSW1")
984		PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:1,2")
	997	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:!1,!2")
985	998	PORT_DIPSETTING( 0x00, DEF_STR( English ) )
986	999	PORT_DIPSETTING( 0x01, DEF_STR( German ) )
987	1000	PORT_DIPSETTING( 0x02, DEF_STR( French ) )
988	1001	PORT_DIPSETTING( 0x03, DEF_STR( Spanish ) )
989		PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3,4")
	1002	PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!3,!4")
990	1003	PORT_DIPSETTING( 0x00, "2" )
991	1004	PORT_DIPSETTING( 0x04, "3" )
992	1005	PORT_DIPSETTING( 0x08, "4" )
993	1006	PORT_DIPSETTING( 0x0c, "5" )
994		PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:5,6")
	1007	PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:!5,!6")
995	1008	PORT_DIPSETTING( 0x00, "10000" )
996	1009	PORT_DIPSETTING( 0x10, "12000" )
997	1010	PORT_DIPSETTING( 0x20, "15000" )
998	1011	PORT_DIPSETTING( 0x30, "20000" )
999		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7")
	1012	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!7")
1000	1013	PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
1001	1014	PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
1002		PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("SW1:8")
	1015	PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("SW1:!8")
1003	1016	PORT_DIPSETTING( 0x00, "1" )
1004	1017	PORT_DIPSETTING( 0x80, "2" )
1005	1018
1006	1019	PORT_MODIFY("DSW2")
1007		PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:1,2")
	1020	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!1,!2")
1008	1021	PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
1009	1022	PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
1010	1023	PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
1011	1024	PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
1012		PORT_DIPNAME( 0x1c, 0x00, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("SW2:3,4,5")
	1025	PORT_DIPNAME( 0x1c, 0x00, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("SW2:!3,!4,!5")
1013	1026	PORT_DIPSETTING( 0x00, "Untimed" )
1014	1027	PORT_DIPSETTING( 0x04, "1 Minute" )
1015	1028	PORT_DIPSETTING( 0x08, "2 Minutes" )
r9812	r9813
1018	1031	PORT_DIPSETTING( 0x14, "5 Minutes" )
1019	1032	PORT_DIPSETTING( 0x18, "6 Minutes" )
1020	1033	PORT_DIPSETTING( 0x1c, "7 Minutes" )
1021		PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:6,7,8")
	1034	PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!6,!7,!8")
1022	1035	PORT_DIPSETTING( 0x00, DEF_STR( None ) )
1023	1036	PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
1024	1037	PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
r9812	r9813
1045	1058	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1046	1059
1047	1060	PORT_MODIFY("DSW1")
1048		PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
	1061	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!1,!2")
1049	1062	PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
1050	1063	PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
1051	1064	PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
1052	1065	PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
1053		PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("SW1:3,4")
	1066	PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("SW1:!3,!4")
1054	1067	PORT_DIPSETTING( 0x00, "*3" )
1055	1068	PORT_DIPSETTING( 0x04, "*7" )
1056	1069	PORT_DIPSETTING( 0x08, "*1/2" )
1057	1070	PORT_DIPSETTING( 0x0c, "*6" )
1058		PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:5,6")
	1071	PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:!5,!6")
1059	1072	PORT_DIPSETTING( 0x00, DEF_STR( English ) )
1060	1073	PORT_DIPSETTING( 0x10, DEF_STR( German ) )
1061	1074	PORT_DIPSETTING( 0x20, DEF_STR( French ) )
1062	1075	PORT_DIPSETTING( 0x30, DEF_STR( Spanish ) )
1063		PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:7,8")
	1076	PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!7,!8")
1064	1077	PORT_DIPSETTING( 0x00, "2" )
1065	1078	PORT_DIPSETTING( 0x40, "3" )
1066	1079	PORT_DIPSETTING( 0x80, "4" )
1067	1080	PORT_DIPSETTING( 0xc0, "5" )
1068	1081
1069	1082	PORT_MODIFY("DSW2")
1070		PORT_DIPNAME( 0x01, 0x00, "Left Coin" ) PORT_DIPLOCATION("SW2:1")
	1083	PORT_DIPNAME( 0x01, 0x00, "Left Coin" ) PORT_DIPLOCATION("SW2:!1")
1071	1084	PORT_DIPSETTING( 0x00, "*1" )
1072	1085	PORT_DIPSETTING( 0x01, "*2" )
1073		PORT_DIPNAME( 0x0e, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:2,3,4")
	1086	PORT_DIPNAME( 0x0e, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!2,!3,!4")
1074	1087	PORT_DIPSETTING( 0x00, DEF_STR( None ) )
1075	1088	PORT_DIPSETTING( 0x02, "3 credits/2 coins" )
1076	1089	PORT_DIPSETTING( 0x04, "5 credits/4 coins" )
1077	1090	PORT_DIPSETTING( 0x06, "6 credits/4 coins" )
1078	1091	PORT_DIPSETTING( 0x08, "6 credits/5 coins" )
1079	1092	PORT_DIPSETTING( 0x0a, "4 credits/3 coins" )
1080		PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5,6")
	1093	PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:!5,!6")
1081	1094	PORT_DIPSETTING( 0x00, "10000" )
1082	1095	PORT_DIPSETTING( 0x10, "12000" )
1083	1096	PORT_DIPSETTING( 0x20, "15000" )
1084	1097	PORT_DIPSETTING( 0x30, "20000" )
1085		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7")
	1098	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:!7")
1086	1099	PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
1087	1100	PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
1088		PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("SW2:8")
	1101	PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("SW2:!8")
1089	1102	PORT_DIPSETTING( 0x00, "1" )
1090	1103	PORT_DIPSETTING( 0x80, "2" )
1091	1104	INPUT_PORTS_END
r9812	r9813
1093	1106
1094	1107	static INPUT_PORTS_START( milliped )
1095	1108	PORT_START("IN0") /* $2000 / / see port 6 for x trackball */
1096		PORT_DIPNAME(0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("P8:1,2")
	1109	PORT_DIPNAME(0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("P8:!1,!2")
1097	1110	PORT_DIPSETTING( 0x00, DEF_STR( English ) )
1098	1111	PORT_DIPSETTING( 0x01, DEF_STR( German ) )
1099	1112	PORT_DIPSETTING( 0x02, DEF_STR( French ) )
1100	1113	PORT_DIPSETTING( 0x03, DEF_STR( Spanish ) )
1101		PORT_DIPNAME(0x0c, 0x04, "Bonus" ) PORT_DIPLOCATION("P8:3,4")
	1114	PORT_DIPNAME(0x0c, 0x04, "Bonus" ) PORT_DIPLOCATION("P8:!3,!4")
1102	1115	PORT_DIPSETTING( 0x00, "0" )
1103	1116	PORT_DIPSETTING( 0x04, "0 1x" )
1104	1117	PORT_DIPSETTING( 0x08, "0 1x 2x" )
r9812	r9813
1106	1119	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
1107	1120	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
1108	1121	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_VBLANK )
1109		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
	1122	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
1110	1123
1111	1124	PORT_START("IN1") /* $2001 / / see port 7 for y trackball */
1112	1125	/* these bits are unused */
1113	1126	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
1114	1127	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
1115		PORT_DIPNAME(0x04, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("P8:7")
	1128	PORT_DIPNAME(0x04, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("P8:!7")
1116	1129	PORT_DIPSETTING( 0x00, "1" )
1117	1130	PORT_DIPSETTING( 0x04, "2" )
1118		PORT_DIPNAME(0x08, 0x00, "Coin Counters" ) PORT_DIPLOCATION("P8:8")
	1131	PORT_DIPNAME(0x08, 0x00, "Coin Counters" ) PORT_DIPLOCATION("P8:!8")
1119	1132	PORT_DIPSETTING( 0x00, "1" )
1120	1133	PORT_DIPSETTING( 0x08, "2" )
1121	1134	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
1122	1135	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1123	1136	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1124		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
	1137	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
1125	1138
1126	1139	PORT_START("IN2") /* $2010 */
1127	1140	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
r9812	r9813
1147	1160	PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
1148	1161
1149	1162	PORT_START("DSW1") /* $0408 */
1150		PORT_DIPNAME(0x01, 0x00, "Millipede Head" ) PORT_DIPLOCATION("D5:1")
	1163	PORT_DIPNAME(0x01, 0x00, "Millipede Head" ) PORT_DIPLOCATION("D5:!1")
1151	1164	PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
1152	1165	PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
1153		PORT_DIPNAME(0x02, 0x00, "Beetle" ) PORT_DIPLOCATION("D5:2")
	1166	PORT_DIPNAME(0x02, 0x00, "Beetle" ) PORT_DIPLOCATION("D5:!2")
1154	1167	PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
1155	1168	PORT_DIPSETTING( 0x02, DEF_STR( Hard ) )
1156		PORT_DIPNAME(0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("D5:3,4")
	1169	PORT_DIPNAME(0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("D5:!3,!4")
1157	1170	PORT_DIPSETTING( 0x00, "2" )
1158	1171	PORT_DIPSETTING( 0x04, "3" )
1159	1172	PORT_DIPSETTING( 0x08, "4" )
1160	1173	PORT_DIPSETTING( 0x0c, "5" )
1161		PORT_DIPNAME(0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("D5:5,6")
	1174	PORT_DIPNAME(0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("D5:!5,!6")
1162	1175	PORT_DIPSETTING( 0x00, "12000" )
1163	1176	PORT_DIPSETTING( 0x10, "15000" )
1164	1177	PORT_DIPSETTING( 0x20, "20000" )
1165	1178	PORT_DIPSETTING( 0x30, DEF_STR( None ) )
1166		PORT_DIPNAME(0x40, 0x00, "Spider" ) PORT_DIPLOCATION("D5:7")
	1179	PORT_DIPNAME(0x40, 0x00, "Spider" ) PORT_DIPLOCATION("D5:!7")
1167	1180	PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
1168	1181	PORT_DIPSETTING( 0x40, DEF_STR( Hard ) )
1169		PORT_DIPNAME(0x80, 0x00, "Starting Score Select" ) PORT_DIPLOCATION("D5:8")
	1182	PORT_DIPNAME(0x80, 0x00, "Starting Score Select" ) PORT_DIPLOCATION("D5:!8")
1170	1183	PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1171	1184	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1172	1185
1173	1186	PORT_START("DSW2") /* $0808 */
1174		PORT_DIPNAME(0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("B5:1,2")
	1187	PORT_DIPNAME(0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("B5:!1,!2")
1175	1188	PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
1176	1189	PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
1177	1190	PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
1178	1191	PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
1179		PORT_DIPNAME(0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("B5:3,4")
	1192	PORT_DIPNAME(0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("B5:!3,!4")
1180	1193	PORT_DIPSETTING( 0x00, "*1" )
1181	1194	PORT_DIPSETTING( 0x04, "*4" )
1182	1195	PORT_DIPSETTING( 0x08, "*5" )
1183	1196	PORT_DIPSETTING( 0x0c, "*6" )
1184		PORT_DIPNAME(0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("B5:5")
	1197	PORT_DIPNAME(0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("B5:!5")
1185	1198	PORT_DIPSETTING( 0x00, "*1" )
1186	1199	PORT_DIPSETTING( 0x10, "*2" )
1187		PORT_DIPNAME(0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("B5:6,7,8")
	1200	PORT_DIPNAME(0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("B5:!6,!7,!8")
1188	1201	PORT_DIPSETTING( 0x00, DEF_STR( None ) )
1189	1202	PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
1190	1203	PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
r9812	r9813
1210	1223	static INPUT_PORTS_START( warlords )
1211	1224	PORT_START("IN0")
1212	1225	PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
1213		PORT_DIPNAME( 0x10, 0x00, "Diag Step" ) /* Not referenced */
	1226	PORT_DIPNAME( 0x10, 0x00, "Diag Step" ) /* Not referenced */
1214	1227	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1215	1228	PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1216	1229	PORT_SERVICE( 0x20, IP_ACTIVE_LOW )
r9812	r9813
1230	1243	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
1231	1244
1232	1245	PORT_START("DSW1")
1233		PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("J2:1,2")
	1246	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("J2:1,2")
1234	1247	PORT_DIPSETTING( 0x00, DEF_STR( English ) )
1235	1248	PORT_DIPSETTING( 0x01, DEF_STR( French ) )
1236	1249	PORT_DIPSETTING( 0x02, DEF_STR( Spanish ) )
1237	1250	PORT_DIPSETTING( 0x03, DEF_STR( German ) )
1238		PORT_DIPNAME( 0x04, 0x00, "Music" ) PORT_DIPLOCATION("J2:3")
	1251	PORT_DIPNAME( 0x04, 0x00, "Music" ) PORT_DIPLOCATION("J2:3")
1239	1252	PORT_DIPSETTING( 0x00, "End of game" )
1240	1253	PORT_DIPSETTING( 0x04, "High score only" )
1241		PORT_BIT( 0xC8, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_DIPLOCATION("J2:4,7,8")
1242		PORT_DIPNAME( 0x30, 0x00, "Credits" ) PORT_DIPLOCATION("J2:5,6")
	1254	PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "J2:4" )
	1255	PORT_DIPNAME( 0x30, 0x00, "Credits" ) PORT_DIPLOCATION("J2:5,6")
1243	1256	PORT_DIPSETTING( 0x00, "1p/2p = 1 credit" )
1244	1257	PORT_DIPSETTING( 0x10, "1p = 1, 2p = 2" )
1245	1258	PORT_DIPSETTING( 0x20, "1p/2p = 2 credits" )
	1259	PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x00, "J2:7" )
	1260	PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x00, "J2:8" )
1246	1261
	1262
1247	1263	PORT_START("DSW2")
1248		PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("M2:1,2")
	1264	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("M2:1,2")
1249	1265	PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
1250	1266	PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
1251	1267	PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
1252	1268	PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
1253		PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("M2:3,4")
	1269	PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("M2:3,4")
1254	1270	PORT_DIPSETTING( 0x00, "*1" )
1255	1271	PORT_DIPSETTING( 0x04, "*4" )
1256	1272	PORT_DIPSETTING( 0x08, "*5" )
1257	1273	PORT_DIPSETTING( 0x0c, "*6" )
1258		PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("M2:5")
	1274	PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("M2:5")
1259	1275	PORT_DIPSETTING( 0x00, "*1" )
1260	1276	PORT_DIPSETTING( 0x10, "*2" )
1261		PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("M2:6,7,8")
	1277	PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("M2:6,7,8")
1262	1278	PORT_DIPSETTING( 0x00, DEF_STR( None ) )
1263	1279	PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
1264	1280	PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
r9812	r9813
1282	1298
1283	1299	static INPUT_PORTS_START( mazeinv )
1284	1300	PORT_START("IN0")
1285		PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) )
	1301	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW0:!1,!2")
1286	1302	PORT_DIPSETTING( 0x00, DEF_STR( English ) )
1287	1303	PORT_DIPSETTING( 0x01, DEF_STR( German ) )
1288	1304	PORT_DIPSETTING( 0x02, DEF_STR( French ) )
1289	1305	PORT_DIPSETTING( 0x03, DEF_STR( Spanish ) )
1290		PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
1291		PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1292		PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1293		PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
1294		PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1295		PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1296		PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
1297		PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1298		PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1299		PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
1300		PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1301		PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1302		PORT_DIPNAME( 0x40, 0x00, "Minimum credits" )
	1306	PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW0:!3" )
	1307	PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW0:!4" )
	1308	PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x00, "SW0:!5" )
	1309	PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "SW0:!6" )
	1310	PORT_DIPNAME( 0x40, 0x00, "Minimum credits" ) PORT_DIPLOCATION("SW0:!7")
1303	1311	PORT_DIPSETTING( 0x00, "1" )
1304	1312	PORT_DIPSETTING( 0x40, "2" )
1305	1313	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
r9812	r9813
1308	1316	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1309	1317
1310	1318	PORT_START("IN2")
1311		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
1312		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1319	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Reacts in test mode */
	1320	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
1313	1321	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
1314	1322	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
1315	1323	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 )
1316		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 )
1317		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 )
1318		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
	1324	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
	1325	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
	1326	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 )
1319	1327
1320	1328	PORT_START("IN3")
1321		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
1322		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
1323		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	1329	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Reacts in test mode */
	1330	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
	1331	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Reacts in test mode */
1324	1332	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
1325		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
1326		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
1327		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
	1333	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
	1334	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Does something, activates a second analog range in test mode */
	1335	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
1328	1336	PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
1329	1337
1330	1338	PORT_START("DSW1")
1331		PORT_DIPNAME( 0x03, 0x00, "Doors for bonus" )
	1339	PORT_DIPNAME( 0x03, 0x00, "Doors for bonus" ) PORT_DIPLOCATION("SW1:!1,!2")
1332	1340	PORT_DIPSETTING( 0x00, "10" )
1333	1341	PORT_DIPSETTING( 0x01, "12" )
1334	1342	PORT_DIPSETTING( 0x02, "14" )
1335	1343	PORT_DIPSETTING( 0x03, "16" )
1336		PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) )
	1344	PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!3,!4")
1337	1345	PORT_DIPSETTING( 0x00, "2" )
1338	1346	PORT_DIPSETTING( 0x04, "3" )
1339	1347	PORT_DIPSETTING( 0x08, "4" )
1340	1348	PORT_DIPSETTING( 0x0c, "5" )
1341		PORT_DIPNAME( 0x30, 0x00, "Extra life at" )
	1349	PORT_DIPNAME( 0x30, 0x00, "Extra life at" ) PORT_DIPLOCATION("SW1:!5,!6")
1342	1350	PORT_DIPSETTING( 0x00, "20000" )
1343	1351	PORT_DIPSETTING( 0x10, "25000" )
1344	1352	PORT_DIPSETTING( 0x20, "30000" )
1345	1353	PORT_DIPSETTING( 0x30, "Never" )
1346		PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Difficulty ) )
1347		PORT_DIPSETTING( 0x00, DEF_STR( Easier ) )
	1354	PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!7,!8")
	1355	PORT_DIPSETTING( 0x00, DEF_STR( Easiest ) )
1348	1356	PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
1349	1357	PORT_DIPSETTING( 0x80, DEF_STR( Hard ) )
1350	1358	PORT_DIPSETTING( 0xc0, DEF_STR( Harder ) )
1351	1359
1352	1360	PORT_START("DSW2")
1353		PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) )
	1361	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!1,!2")
1354	1362	PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
1355	1363	PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
1356	1364	PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
1357	1365	PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
1358		PORT_DIPNAME( 0x0c, 0x00, "~~Right~~ Coin" )
	1366	PORT_DIPNAME( 0x0c, 0x00, "Coin 2" ) PORT_DIPLOCATION("SW2:!3,!4")
1359	1367	PORT_DIPSETTING( 0x00, "*1" )
1360	1368	PORT_DIPSETTING( 0x04, "*4" )
1361	1369	PORT_DIPSETTING( 0x08, "*5" )
1362	1370	PORT_DIPSETTING( 0x0c, "*6" )
1363		PORT_DIPNAME( 0x10, 0x00, "~~Left~~ Coin" )
	1371	PORT_DIPNAME( 0x10, 0x00, "Coin 3" ) PORT_DIPLOCATION("SW2:!5")
1364	1372	PORT_DIPSETTING( 0x00, "*1" )
1365	1373	PORT_DIPSETTING( 0x10, "*2" )
1366		PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" )
	1374	PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!6,!7,!8")
1367	1375	PORT_DIPSETTING( 0x00, DEF_STR( None ) )
1368	1376	PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
1369	1377	PORT_DIPSETTING( 0x40, "5 credits/4 coins" )

src/mame/drivers/namcos23.c
r9812	r9813
83	83
84	84	/*
85	85
86		Namco System 23 and Super System 23 Hardware Overview (last updated 7th ~~Mar~~ch, 2010 at 12.53am)
	86	Namco System 23 and Super System 23 Hardware Overview (last updated 12th December 2010 at 2.56pm)
87	87	Namco, 1997 - 2000
88	88
89		Note! This document is a Work-In-Progress and will be updated from time to time when more dumps are available.
	89	Note! This document is a Work-In-Progress and will be updated from time to time when more games are available.
90	90
91	91	This document covers all the known Namco Gorgon / System 23 / Super System 23 games, including....
92	92	Final Furlong Namco, 1997 System 22.5/Gorgon
r9812	r9813
97	97	Panic Park Namco, 1998 System 23
98	98	*Angler King Namco, 1999 System 23
99	99	Gunmen Wars Namco, 1998 Super System 23
100		*Race On! Namco, 1998 Super System 23
	100	Race On! Namco, 1998 Super System 23
101	101	500 GP Namco, 1998 Super System 23
102	102	Final Furlong 2 Namco, 1999 Super System 23
103	103	*Guitar Jam Namco, 1999 Super System 23
104	104	Crisis Zone Namco, 2000 System 23 Evolution 2
105	105
106		* - denotes not dumped yet (and hardware type not confirmed, they might not be System 23 hardware).
	106	* - denotes not dumped yet (and hardware type not confirmed, they might not be on System 23 hardware).
107	107	If you can help with the remaining undumped S22.5/S23/SS23 games, please contact me at http://guru.mameworld.info/
108	108
109		The system comprises the following main boards....
110		- EMI PCB Small PCB with some connectors, including power in, video out, network in/out, sound out (to AMP PCB)
	109	A System 23 unit is comprised of some of the following pieces....
	110	- V185B EMI PCB Small PCB bolted to the metal box with several connectors including power in, video out, network in/out, sound out
	111	(to AMP PCB) used with most of the S23/SS23 games that use a single main PCB and no other control PCBs.
	112	- V198 EMI PCB Small PCB bolted to the metal box with several connectors (power/video/sound etc) plus a couple of extra
	113	ones for the CCD camera and feedback board. It is connected to the main and GMEN boards on the other side via
	114	2 multi-pin connectors (used only with games that use the GMEN board)
111	115	- BASS AMP PCB Power AMP PCB for general sounds and bass
112	116	- SYSTEM23 MAIN PCB Main PCB for System 23 \
113		or SystemSuper23 MAIN(1) PCB Main PCB for Super System 23 /
114		or System23Evolution2 PCB Main PCB for System 23 Evolution 2 / Note the 3 main boards are similar, but not exactly the same.
	117	or SystemSuper23 MAIN(1) PCB Main PCB for Super System 23 / Note the 3 main boards are similar, but not exactly the same.
	118	or System23Evolution2 PCB Main PCB for System 23 Evolution 2 /
115	119	- MSPM(FR*) PCB A small plug-in daughterboard that holds FLASHROMs containing Main CPU and Sound CPU programs
116	120	- FCA PCB Controls & I/O interface board used with a few Super System 23 games only. Contains mostly transistors,
117	121	caps, resistors, several connectors, an MCU and a PIC16F84.
r9812	r9813
125	129	Note that in Super System23, the MEM(M) PCB is re-used from System23.
126	130	On Super System23, there is a sticker over the System23 part labelled 'SystemSuper23' and one
127	131	PAL is not populated.
128		- GMEN PCB A large board that sits on top of the main board and the ROM board sits on top of it, containing
129		a SH2 CPU, some RAM and a few CPLDs/FPGAs. This controls the camera in Gunmen Wars.
	132	- GMEN PCB A large board that sits on top of the main board containing a SH2 CPU, some RAM and a few CPLDs/FPGAs.
	133	This controls the video overlay from the CCD camera in Gunmen Wars, Race On! and Final Furlong 2.
	134	The ROM board plugs in on top of this board.
	135	- V194 STR PCB Used with Race On! to control the steering feed-back. An identical re-labelled PCB (V257) with
	136	different SOP44 ROMs is used with Wangan Midnight (Chihiro) and Ridge Racer V (System 246)
130	137
131	138	The metal box housing these PCB's is approximately the same size as Super System 22. However, the box is mostly
132	139	empty. All of the CPU/Video/DSP hardware is located on the main PCB which is the same size as the
r9812	r9813
162	169
163	170	When the SUB-CPU connects there are numerous POST screens that test almost all of the main components.
164	171
165		On System23, the bootup sequence is shorter. The screen remains blank while the SDRAM is being checked. LEDS 1-8 turn off in sequence 8-1
166		The bank of 8 LEDs on the main board cycles from left to right to left repeatedly (almost all S23/SS23 games seem to do this in fact).
167		After that, the bootup sequence is mostly the same as SS23.
	172	On System23, the bootup sequence is shorter. The screen remains blank while the SDRAM is being checked (i.e. 1st screen mentioned above is not shown).
	173	LEDS 1-8 turn off in sequence 8-1. The bank of 8 LEDs on the main board cycles from left to right to left repeatedly (almost all S23/SS23 games seem
	174	to do this in fact). After that, the bootup sequence is mostly the same as SS23.
168	175	When the game is running some games just cycle the 8 LEDs left/right/left etc. Others cycle the LEDs in pairs just one LED position
169	176	left/right/left etc. Those crazy Namco guys really like LEDs.
170	177
r9812	r9813
559	566	\| \|-------\| LT1180 LED1 LED5-12 \|
560	567	\|----------------------------------------------------------------------------\|
561	568	Notes:
562		This board is used only on Gunmen Wars to control the CCD camera. The main board does it's usual POST
563		then the board fires up, LED1 lights red and the LEDs 5-12 go crazy pulsing left to right from the middle outwards.
564		The main board uploads a loader program, then the Main SH2 program. After completion LED 3 lights green and then.....
565		it doesn't work. LED 2 lights orange for a second then extinguishes, then the main board resets :-/
	569	This board controls the video overlay from the CCD camera in Gunmen Wars, Race ON! and Final Furlong 2.
	570	The main board does it's usual POST then the board fires up, LED1 lights red and the LEDs 5-12 go crazy pulsing left to right from
	571	the middle outwards. The main board uploads a loader program, then the Main SH2 program. After completion LED 3 lights green and then
	572	LED 2 lights orange for a second then extinguishes then the main board resets :-/
	573	It doesn't boot up for unknown reasons but likely another PCB is missing from somewhere in the cabinet or the GMEN PCB is faulty.
566	574
567	575	SH2 - Hitachi HD6417604 SH2 CPU (QFP144, clock input 28.7MHz)
568	576	N341024 - NKK 128k x8 SRAM (x4, SOP32)
r9812	r9813
571	579	HM5118165 - Hitachi 16MBit SDRAM (x2, TSSOP44/50)
572	580	C446 - Namco Custom IC (QFP160)
573	581	TSOP48 - Not-populated position for a 29F400 512k x8 TSOP48 flash ROM
574		3771 - Fujitsu MB3771 System Reset IC (SOIC4)
	582	3771 - Fujitsu MB3771 System Reset IC (SOIC8)
575	583	MD8402 - Fuji MD8402A IEEE 1394 'Firewire' Physical Channel Interface IC (TQFP100)
576	584	MD8412 - Fuji MD8412A IEEE 1394 'Firewire' Link Layer Controller IC (TQFP100)
577	585	VXP3220A - Micronis Intermetall VXP3220A Video Pixel Decoder IC (PLCC44)
r9812	r9813
615	623
616	624	Game Code and revision
617	625	----------------------------------
618		Time Crisis 2 TSS2 Ver.B
619		Time Crisis 2 TSS3 Ver.B
620		Gunmen Wars GM1 Ver.A
621		Downhill Bikers DH3 Ver.A
622		Motocross Go! MG3 Ver.A
623		Panic Park PNP2 Ver.A
	626	Time Crisis 2 TSS2 Ver.B (for System 23)
	627	Time Crisis 2 TSS3 Ver.B (for System 23)
	628	Gunmen Wars GM1 Ver.A (for Super System 23)
	629	Downhill Bikers DH3 Ver.A (for System 23)
	630	Motocross Go! MG3 Ver.A (for System 23)
	631	Panic Park PNP2 Ver.A (for System 23)
	632	Race On! RO2 Ver.A (for Super System 23)
624	633
625	634	Type 2:
626	635	MSPM(FRA) PCB 8699017501 (8699017401)
r9812	r9813
644	653	----------------------------------
645	654	GP500 5GP3 Ver.C (for Super System 23)
646	655	Time Crisis 2 TSS4 Ver.A (for Super System 23)
647		Final Furlong 2 FFS1 Ver.?
648		Final Furlong 2 FFS2 Ver.?
	656	Final Furlong 2 FFS1 Ver.? (for Super System 23)
	657	Final Furlong 2 FFS2 Ver.? (for Super System 23)
649	658
650	659	Type 3:
651	660	MSPM(FRC) PCB 8699019800 (8699019700)
r9812	r9813
668	677
669	678	Game Code and revision Notes
670	679	-----------------------------------------------------------------------
	680	Crisis Zone CSZO4 Ver.B Serialsed ROMs, IC2 not populated
671	681	Crisis Zone CSZO3 Ver.B Serialsed ROMs, IC2 not populated
672	682	Crisis Zone CSZO2 Ver.A Serialsed ROMs, IC2 not populated
673	683
r9812	r9813
679	689	Sticker (500GP) - 8672961100
680	690	Sticker (Time Crisis 2) - 8660962302
681	691	Sticker (Crisis Zone) - 8672961100 .... same as 500GP
	692	Sticker (Race On!) - 8672961100 .... same as 500GP
682	693	\|----------------------------------------------------------------------------\|
683	694	\| KEYCUS MTBH.2M CGLL.4M CGLL.5M CCRL.7M PAL(3) \|
684	695	\| \|
r9812	r9813
741	752	Gunmen Wars GM1 KC018 3A, 3C, 4A, 4C, 2A, 2F and 2M not populated.
742	753	Motocross Go! MG1 KC??? 3A, 3C, 4A, 4C, 4F and 7F not populated.
743	754	Panic Park PNP1 KC015 3A, 3C, 4A, 4C, 2M and 2F not populated.
	755	Race On! RO1 KC017 2M and 2F not populated.
744	756	Time Crisis 2 TSS1 KC010 3A and 3C not populated.
745	757
746	758	I/O PCBs
747	759	--------
748	760
749	761	FCA PCB 8662969102 (8662979102)
750		(Used with 500 GP so far. Another identical board is se~~cure~~d ~~for~~ ~~a d~~ifferent ~~but~~ ~~unkn~~own ~~gam~~e)
	762	(Used with 500GP so far. Another identical board is used with Ridge Racer V on System 246)
751	763	\|---------------------------------------------------\|
752	764	\| J101 J106 \|
753	765	\| 4.9152MHz \|
r9812	r9813
768	780	JP1 - 3 pin jumper, set to 'NORM'. Alt setting 'WR'
769	781	3771 - Fujitsu MB3771 System Reset IC (SOIC8)
770	782	PIC16F84 - Microchip PIC16F84 PIC (SOIC20)
771		- For 500 GP stamped 'CAP10'
772		- For unknown stamped 'CAP11'
	783	- For 500GP stamped 'CAP10'
	784	- For Ridge Racer V (on System 246) stamped 'CAP11'
773	785	MCU - Fujitsu MB90F574 Microcontroller (QFP120)
774	786	- For 500 GP stamped 'FCAF10'
775		- For ~~unkn~~own stamped 'FCAF11'
	787	- For Ridge Racer V (on System 246) stamped 'FCAF11'
776	788	ADM485 - Analog Devices ADM485 +5V Low Power EIA RS-485 Transceiver (SOIC8)
777	789
778	790
r9812	r9813
805	817	27C1001 - 128k x8 EPROM (DIP32)
806	818	- For Downhill Bikers labelled 'ASC3 IO-C'
807	819	- For Panic Park labelled 'ASC3 IO-C'
	820	- For Race On! labelled 'ASC5 IO-A'
808	821	- For Gunmen Wars labelled 'ASC5 IO-A'
809	822	62256 - 32k x8 SRAM (SOP28)
810	823	EPM7096 - Altera EPM7096 CPLD with sticker 'ASCA,DR1' (PLCC68)
811	824	ADM485 - Analog Devices ADM485 +5V Low Power EIA RS-485 Transceiver (SOIC8)
812		J102/J103- Standard USB A and B connectors. These are not populated on most games, but are populated for use with Motocross Go!
	825	J102/J103- Standard USB A and B connectors. These are not populated on most games, but are populated for
	826	use with Motocross Go! on the ASCA-3A PCB.
813	827
814	828
815	829	I/O Boards for gun games
r9812	r9813
848	862
849	863	This board is used only on Time Crisis II.
850	864	Note the gun is a standard light gun.
851		--------------
852	865
	866
853	867	Type 2:
854	868
855	869	V221 MIU PCB
r9812	r9813
899	913
900	914	This board is used on Crisis Zone (System 23 Evolution2) and Time Crisis 3 (System 246)
901	915	Note both games use a CCD camera for the gun sensor.
902		--------------
903	916
904	917
905		Namco Gorgon-based games
906		------------------------
	918	Drive/Feedback PCB
	919	------------------
907	920
908		Rapid River, Final Furlong (both Namco, 1997)
909
910		These games run on hardware called "GORGON". It appears to have similar
911		capabilities to System 23 but like Super System 22 has sprites also.
912		(System 23 doesn't have sprites). The PCBs are about two times larger
913		than System 23.
914
915		The system comprises Main PCB, ROM PCB and I/O PCB all located inside
916		a metal box with 3 separate power supplies for 5V, 12V and 3.3V. Main
917		input power is 115V.
918		Rapid River is controlled by rotating a paddle (for thrust) and turning it
919		sideways (moves left/right).
920		The rotation action is done with a 5K potentiometer whereby the thrust
921		is achieved by moving the pot from full left to full right continuously.
922		The left/right turning movement is just another 5K potentiometer connected
923		to the column of the paddle center shaft.
924		There are also some buttons just for test mode, including SELECT, UP & DOWN
925		The player's seat has movement controlled by a compressor and several
926		potentiometers. On bootup, the system tests the seat movement and displays
927		a warning if it's not working. Pressing START allows the game to continue
928		and function normally without the seat movement.
929
930		The other game on this system (Final Furlong) and is a horse racing game.
931		To control the horse you rock it forwards and backwards continually (it's very tiring
932		to play this game).
933		This would activate possibly one or two 5K potentiometers inside the horse body.
934		Just like a real horse you need to control the speed so your horse lasts the entire race.
935		If you rock too much, a message on screen says 'Too Fast'. To steer the horse turn the
936		head sideways using the reins. There would be another 5K potentiometer in the head
937		to activate the turning direction.
938
939
940		Main PCB
941		--------
942
943		8664960102 (8664970102) GORGON MAIN PCB
944		\|------------------------------------------------------------------------------------------------------\|
945		\| J4 J5 J6 \|
946		\| \|---------\| \|---------\| \|------\| \|---------\| \|
947		\| \|---------\| \|------\| \| \| \| \| \|C401 \| \| \|HM534251 HM534251 \|
948		\| CXD1178Q\| \| \|C381 \| \| C374 \| \|------\| \| C417 \| \| \| \| 304 \|HM534251 HM534251 \|
949		\| \| C404 \| \| \| \| \| \|C435 \| \| \| \|------\| \| \|HM534251 HM534251 \|
950		\| \| \| \|------\| \| \| \| \| \| \| \|------\| \| \| \|
951		\| \| \| \|---------\| \|------\| \|---------\| \|C400 \| \|---------\| \|
952		\| \|---------\| \|---------\| \|------\| \| \| \|---------\| \|
953		\| \| \| \|C435 \| 341256 \|------\| \| \|HM534251 HM534251 \|
954		\| \| C397 \| \| \| \|------\| \| 304 \|HM534251 HM534251 \|
955		\| 341256 341256 341256 \| \| \|------\| 341256 \|C401 \| \| \|HM534251 HM534251 \|
956		\| M5M51008 341256 \| \| \|---------\| \| \| \| \| \|
957		\| \|---------\| \| \| \|------\| \|------\| \|---------\| \|
958		\| M5M51008 341256 \|------\| \| C403 \| \|C406 \| \|------\| \|---------\| \|
959		\|ADM485 \|---------\| \|C379 \| \| \| \| \| \|C400 \| \| \|HM534251 HM534251 \|
960		\| \| \| \| \| \| \| \|------\| \| \| \| 304 \|HM534251 HM534251 \|
961		\| M5M51008 \| C300 \| \|------\| \|---------\| \|------\| \| \|HM534251 HM534251 \|
962		\| \| \| LH540204 LH540204 \|------\| \| \| \|
963		\| M5M51008 \| \|341256 \|------\| \|C401 \| \|---------\| \|
964		\|J1 HCPL0611 \|---------\|341256 \|C407 \| \| \| \|---------\| \|
965		\| DS8921 PST575 PST575 \| \| \|------\| \| \| \|
966		\| DS8921 \|------\| \|------\| \| 304 \|HM534251 HM534251 \|
967		\| M5M51008 \|C400 \| \| \|HM534251 HM534251 \|
968		\| CY7C128 CY2291S \| \| \| \| \|
969		\| \|------\|M5M51008 14.31818MHz \|------\| \|---------\| \|
970		\| \|C422 \| J9 M5M5256 \|------\| \|---------\| 3V_BATT \|
971		\| \| \|341256 \|C400 \| \| \| \|
972		\| \|------\|341256 \| \| \| C399 \|341256 LEDS(8) \|
973		\| \|------\| \|--------\| \|------\| \| \|341256 \|
974		\| \|C352 \| \|ALTERA \| \|------\| \| \| \|
975		\| ADM485 DSW1(2) \|------\| \| \| \|EPM7128 \| \|C401 \| \|---------\| DSW3(2) DSW5(8)\|
976		\| 2061ASC \|C416 \| \|------\| \| \| \| \| \|---------\| \|---------\| \|
977		\| 14.7456MHz \| \| \|--------\| \|------\| \| \| \|NKK \| \|
978		\|PAL \|-----\| \|------\| \|------\| D4516161 \| C413 \| \|NR4650 \| \|
979		\| \|H8/ \| \|C361 \| D4516161 \| \| \|LQF-13B \| \|
980		\| \|3002 \| \| \|LC321664 \| \| \| \| \|
981		\| J10 \|-----\| \|------\| J8 \|---------\| \|---------\| \|
982		\|------------------------------------------------------------------------------------------------------\|
	921	V194 STR PCB
	922	2487960102 (2487970102)
	923	\|----------------------------------------------------------\|
	924	\| RO1_STR-0A.IC16 TRANSFORMER J105 \|
	925	\| DIP42 \|
	926	\| LED N341256 FUSE \|
	927	\| LED FUSE BF150G8E\|
	928	\| N341256 \|
	929	\| \|
	930	\|RESET_SW 32MHz 7815 K2682\|
	931	\| MB3771 \|
	932	\|J101 DSW2(4, all off) \|
	933	\| MB90242A \|
	934	\| LED MB3773 HP3150 \|
	935	\| LED K2682\|
	936	\| HP3150 \|
	937	\| EPM7064 \|
	938	\|J104 MAX232 LM393 \|
	939	\| LED JP1 O O-O \|
	940	\| LED HP3150 K2682\|
	941	\| \|
	942	\| HP3150 \|
	943	\| \|
	944	\|J103 \|
	945	\| UPC358 LM393 UPC358 K2682\|
	946	\| J102 J106 \|
	947	\|----------------------------------------------------------\|
983	948	Notes:
984		NKK NR4650 - R4600-based 64bit RISC CPU (Main CPU, QFP208, clock input source = CY2291S)
985		H8/3002 - Hitachi H8/3002 HD6413002F17 (Sound CPU, QFP100, running at 14.7456MHz)
986		EPM7128 - Altera EPM7128 FPGA labelled 'GOR-M1' (PLCC84)
987		PAL - PALCE16V8H stamped 'GOR-M3' (PLCC20)
988		HM534251 - Hitachi HM534251 256k x4 Dynamic Video RAM (SOJ28)
989		N341256 - NKK 32k x8 SRAM (SOJ28)
990		M5M5256 - Mitsubishi 32k x8 SRAM (SOP28)
991		D4516161 - NEC uPD4516161AG5-A80 1M x16 (16MBit) SDRAM (SSOP50)
992		LC321664 - Sanyo 64k x16 EDO DRAM (SOJ40)
993		M5M51008 - Mitsubishi 128k x8 SRAM (SOP32)
994		CY7C128 - Cypress 2k x8 SRAM (SOJ28)
995		LH540204 - Sharp CMOS 4096 x 9 Asynchronous FIFO (PLCC32)
996		2061ASC-1- IC Designs 2061ASC-1 programmable clock generator (SOIC16)
997		DS8921 - Dallas Semiconductor DS8921 RS-422/423 Differential Line Driver and Receiver Pair (SOIC8)
998		HCPL0611 - Fairchild HCPL0611 High Speed 10MBits/sec Logic Gate Optocoupler (SOIC8)
999		ADM485 - Analog Devices ADM485 5V Low Power EIA RS-485 Transceiver (SOIC8)
1000		PST575 - System Reset IC (SOIC8)
1001		CXD1178Q - Sony CXD1178Q 8-bit RGB 3-channel D/A converter (QFP48)
1002		J1 - 64 pin connector for connection of I/O board
1003		J4/J5/J6 \
1004		J8/J9 / Custom NAMCO connectors for connection of MEM(M1) PCB
1005		J10 - Custom NAMCO connector for MSPM(FR) PCB
	949	This board is used with Race On! (and Wangan Midnight on Chihiro and Ridge Racer V on System 246) to control the
	950	steering feed-back motor. It may be used with other System 23/Super System 23 driving/racing games too but no
	951	other games are confirmed at the moment.
1006	952
	953	RO1_STR-0A.IC16 - Fujitsu MB29F400TC 512k x8 flash ROM (SOP44)
	954	- Labelled 'RO1 STR-0A' for Race On!
	955	- Labelled 'RR3 STR-0A' for Ridge Racer V (on System 246)
	956	EPM7064 - Altera EPM7064 CPLD labelled 'STR-DR1' (PLCC44)
	957	N341256 - NKK 32k x8 SRAM (SOP28)
	958	K2682 - 2SK2682 N-Channel Silicon MOSFET
	959	BF150G8E - Large power transistor(?) connected to the transformer
	960	UPC358 - NEC uPC358 Dual operational amplifier (SOIC8)
	961	LM393 - National LM393 Low Power Low Offset Voltage Dual Comparator (SOIC8)
	962	MAX232 - Maxim MAX232 dual serial to TTL logic level driver/receiver (SOIC16)
	963	HP3150 - ? (DIP8)
	964	MB3773 - Fujitsu MB3773 Power Supply Monitor with Watch Dog Timer and Reset (SOIC8)
	965	MB3771 - Fujitsu MB3771 System Reset IC (SOIC8)
	966	DIP42 - Unpopulated DIP42 socket for 27C4096 EPROM
	967	MB90242A - Fujitsu MB90242A 16-Bit CISC ROM-less F2MC-16F Family Microcontroller optimized for mechatronics control applications (TQFP80)
	968	J101 - 8 pin connector (purpose unknown)
	969	J102 - 3 pin connector input from potentiometer connected to the steering wheel mechanism
	970	J103 - Power input connector (5v/GND/12v)
	971	J104 - 6 pin connector joined with a cable to J6 on the V198 EMI PCB. This cable is the I/O connection to/from the main board.
	972	J105 - 110VAC power input
	973	J106 - DC variable power output to feed-back motor
1007	974
1008		Namco Custom ICs
1009		----------------
1010		C300 (QFP160)
1011		304 (x4, QFP120)
1012		C352 (QFP100)
1013		C361 (QFP120)
1014		C374 (QFP160)
1015		C379 (QFP64)
1016		C381 (QFP144)
1017		C397 (QFP160)
1018		C399 (QFP160)
1019		C400 (QFP100)
1020		C401 (x4, QFP64)
1021		C403 (QFP136)
1022		C404 (QFP208)
1023		C406 (QFP120)
1024		C407 (QFP64)
1025		C413 (QFP208)
1026		C416 (QFP176)
1027		C417 (QFP208)
1028		C422 (QFP64)
1029		C435 (x2, TQFP144)
1030
1031
1032		Program ROM PCB
1033		---------------
1034
1035		MSPM(FR) PCB 8699015200 (8699015100)
1036		\|--------------------------\|
1037		\| J1 \|
1038		\| \|
1039		\| IC3 IC1 \|
1040		\| \|
1041		\| \|
1042		\| IC2 \|
1043		\|--------------------------\|
1044		Notes:
1045		J1 - Connector to plug into Main PCB
1046		IC1 \
1047		IC2 / Main Program (Fujitsu 29F016 16MBit FlashROM, TSOP48)
1048		IC3 - Sound Program (Fujitsu 29F400T 4MBit FlashROM, TSOP48)
1049
1050		Games that use this PCB include...
1051
1052		Game Code and revision
1053		--------------------------------
1054		Rapid River RD2 Ver.C
1055		Rapid River RD3 Ver.C
1056		Final Furlong FF2 Ver.A
1057
1058		ROM PCB
1059		-------
1060
1061		MEM(M1) PCB
1062		8664960202 (8664970202)
1063		\|--------------------------------------------------------\|
1064		\| J2(TEXTURE) J3(POINT) J5(SPRITE) \|
1065		\| PAL1 \|
1066		\| \|
1067		\| \|
1068		\| \|
1069		\| CCRL.11A \|
1070		\| CCRL.11E PT3L.12J PT3H.12L SPRLL.12P SPRLL.12T \|
1071		\| CCRH.11B \|
1072		\| CCRH.11F \|
1073		\| PT2L.11J PT2H.11L SPRLM.11P SPRLM.11T \|
1074		\| \|
1075		\| \|
1076		\| PT1L.10J PT1H.10L SPRUM.10P SPRUM.10T \|
1077		\| PAL2 PAL3 \|
1078		\| \|
1079		\| PT0L.9J PT0H.9L SPRUU.9P SPRUU.9T \|
1080		\| JP7 JP9 \|
1081		\| JP6 JP8 \|
1082		\| CGLL.8B CGLL.8F \|
1083		\| \|
1084		\| \|
1085		\| CGLM.7B CGLM.7F \|
1086		\| JP2 JP4 \|
1087		\| JP1 JP3 \|
1088		\| CGUM.6B CGUM.6F \|
1089		\| J1(WAVE) \|
1090		\| \|
1091		\| CGUU.5B CGUU.5F WAVEH.3S \|
1092		\| \|
1093		\| MTBH.5J WAVEL.2S \|
1094		\| MTAH.3J JP5 \|
1095		\| MTBL.2J \|
1096		\| MTAL.1J KEYCUS \|
1097		\| \|
1098		\| J4(MOTION) \|
1099		\|--------------------------------------------------------\|
1100		Notes:
1101		PAL1 - PALCE16V8H stamped 'SS22M1' (PLCC20)
1102		PAL2 - PALCE20V8H stamped 'SS22M2' (PLCC32)
1103		PAL3 - PALCE20V8H stamped 'SS22M2' (PLCC32)
1104		KEYCUS - for Rapid River: MACH211 CPLD stamped 'KC012' (PLCC44)
1105		KEYCUS - for Final Furlong: MACH211 CPLD stamped 'KC011' (PLCC44)
1106		J1->J5 - Custom NAMCO connectors for joining ROM PCB to Main PCB
1107		JP1/JP2 \
1108		JP3/JP4 \|
1109		JP5 \| Jumpers to set ROM sizes (32M/64M)
1110		JP6/JP7 \|
1111		JP8/JP9 /
1112
1113		ROMs
1114		----
1115		PT* - Point ROMs, sizes configurable to either 16M or 32M (SOP44)
1116		MT* - Motion ROMs, sizes configurable to either 32M or 64M (SOP44)
1117		CG* - Texture ROMs, sizes configurable to either 32M or 64M (SOP44)
1118		CCR* - Texture Tilemap ROMs, sizes fixed at 16M (SOP44)
1119		SPR* - Sprite ROMs, sizes configurable to either 32M or 64M (SOP44)
1120		WAVE*- Wave ROMs, sizes configurable to either 32M or 64M (SOP44)
1121
1122		I/O PCB
1123		-------
1124
1125		V187 ASCA-2A PCB
1126		2477960102 (2477970102)
1127		\|--------------------------------------------------------\|
1128		\| J105 \|
1129		\| \|-------\| 14.7456MHz \|
1130		\| J104 \|ALTERA \| ADM485 PST592 \|
1131		\| \|EPM7064\| \|-------\| \|
1132		\| \| \| \| \| \|
1133		\| \|-------\| \| C78 \| \|
1134		\| LC78815 \| \| \|
1135		\| \|-------\| \|
1136		\| MB87078 \|---\| \|
1137		\| LA4705 \|IC1\| 62256 \|
1138		\| \|---\| \|
1139		\| J101 J102 \|
1140		\|--------------------------------------------------------\|
1141		Notes:
1142		IC1 - Atmel AT29C020 2MBit EEPROM labelled 'ASCA1 I/O-A' (PLCC32)
1143		C78 - Namco Custom MCU, positively identified as a Hitachi H8/3334 (PLCC84)
1144		EPM7064 - Altera EPM7064LC68-15 PLD, labelled 'ASCA DR0' (PLCC68)
1145		PST592 - System Reset IC (SOIC4)
1146		ADM485 - Analog Devices +ADM485 5V Low Power EIA RS-485 Transceiver (SOIC8)
1147		MB87078 - Fujitsu MB87078 Electronic Volume Control IC (SOIC24)
1148		LC78815 - Sanyo LM78815 2-Channel 16-Bit D/A Converter (SOIC20)
1149		J101 - 34 pin flat cable connector for filter board
1150		J102 - 50 pin flat cable connector for filter board
1151		J104 - 8 pin power connector (+5V, +12V, +3.3V)
1152		J105 - 64 pin connector for connection of Main PCB
1153
1154	975	*/
1155	976
1156	977	#include "emu.h"
r9812	r9813
2837	2658	(!strcmp(machine->gamedrv->name, "downhill")) \|\|
2838	2659	(!strcmp(machine->gamedrv->name, "finfurl2")) \|\|
2839	2660	(!strcmp(machine->gamedrv->name, "finfurl2j")) \|\|
	2661	(!strcmp(machine->gamedrv->name, "raceon")) \|\|
2840	2662	(!strcmp(machine->gamedrv->name, "crszone")) \|\|
2841		(!strcmp(machine->gamedrv->name, "crszone2")) \|\|
	2663	(!strcmp(machine->gamedrv->name, "crszonea")) \|\|
	2664	(!strcmp(machine->gamedrv->name, "crszoneb")) \|\|
2842	2665	(!strcmp(machine->gamedrv->name, "timecrs2b")) \|\|
2843	2666	(!strcmp(machine->gamedrv->name, "timecrs2")))
2844	2667	{
r9812	r9813
3437	3260	ROM_LOAD( "5gp1waveh.2a", 0x800000, 0x800000, CRC(1e3523e8) SHA1(cb3d0d389fcbfb728fad29cfc36ef654d28d553a) )
3438	3261	ROM_END
3439	3262
	3263	ROM_START( raceon )
	3264	ROM_REGION32_BE( 0x400000, "user1", 0 ) /* 4 megs for main R4650 code */
	3265	ROM_LOAD16_BYTE( "ro2vera.ic2", 0x000000, 0x200000, CRC(08b94548) SHA1(6363f1724540c2671555bc5bb11e22611614baf5) )
	3266	ROM_LOAD16_BYTE( "ro2vera.ic1", 0x000001, 0x200000, CRC(4270884b) SHA1(82e4d4376907ee5dbabe047b9d2279f08cff5f71) )
	3267
	3268	ROM_REGION( 0x80000, "audiocpu", 0 ) /* Hitachi H8/3002 MCU code */
	3269	ROM_LOAD16_WORD_SWAP( "ro2vera.ic3", 0x000000, 0x080000, CRC(a763ecb7) SHA1(6b1ab63bb56342abbf7ddd7d17d413779fbafce1) )
	3270
	3271	ROM_REGION( 0x40000, "ioboard", 0 ) /* I/O board HD643334 H8/3334 MCU code */
	3272	ROM_LOAD( "asc5_io-a.ic14", 0x000000, 0x020000, CRC(5964767f) SHA1(320db5e78ae23c5f94e368432d51573b409995db) )
	3273
	3274	ROM_REGION( 0x80000, "ffb", 0 ) /* STR steering force-feedback board code */
	3275	ROM_LOAD( "ro1_str-0a.ic16", 0x000000, 0x080000, CRC(27d39e1f) SHA1(6161cbb27c964ffab1db3b3c1f073ec514876e61) )
	3276
	3277	ROM_REGION32_BE( 0x2000000, "data", 0 ) /* data roms */
	3278	ROM_LOAD16_BYTE( "ro1mtah.2j", 0x000000, 0x800000, CRC(216abfb1) SHA1(8db7b17dc6441adc7a4ec8b941d5a84d73c735d6) )
	3279	ROM_LOAD16_BYTE( "ro1mtal.2h", 0x000001, 0x800000, CRC(17646306) SHA1(8d1af777f8e884b650efee8e4c26e032e1c088b7) )
	3280
	3281	ROM_REGION( 0x2000000, "textile", 0 ) /* texture tiles */
	3282	ROM_LOAD( "ro1cgll.4m", 0x0000000, 0x800000, CRC(12c64936) SHA1(14a0d3d336f2fbe7992eedb3900748763368bc6b) )
	3283	ROM_LOAD( "ro1cglm.4k", 0x0800000, 0x800000, CRC(7e8bb4fc) SHA1(46a7940989576239a720fde8ec4e4b623b0b6fe6) )
	3284	ROM_LOAD( "ro1cgum.4j", 0x1000000, 0x800000, CRC(b9767735) SHA1(87fec452998a782db2cf00d369149b200a00d163) )
	3285	ROM_LOAD( "ro1cguu.4f", 0x1800000, 0x800000, CRC(8fef8bd4) SHA1(6870590f585dc8d87ebe5181da870715c9c4fee3) )
	3286
	3287	ROM_REGION16_LE( 0x400000, "textilemapl", 0 ) /* texture tilemap 0-15*/
	3288	ROM_LOAD( "ro1ccrl.7f", 0x000000, 0x400000, CRC(fe50e424) SHA1(8317c998db687e1c40398e0005a037dcded19c25) )
	3289
	3290	ROM_REGION( 0x200000, "textilemaph", 0 ) /* texture tilemap 16-17 + attr */
	3291	ROM_LOAD( "ro1ccrh.7e", 0x000000, 0x200000, CRC(1c958de2) SHA1(4893350999d5d377e68b9577187828de7a4c77c2) )
	3292
	3293	ROM_REGION32_LE( 0x2000000, "pointrom", 0 ) /* 3D model data */
	3294	ROM_LOAD32_WORD_SWAP( "ro1pt0h.7a", 0x0000000, 0x400000, CRC(6ef742ab) SHA1(500ce413b2463a555237de7bcc9627d1082c9b52) )
	3295	ROM_LOAD32_WORD_SWAP( "ro1pt0l.7c", 0x0000002, 0x400000, CRC(f4b88bd0) SHA1(cc642d959645730b03ef01e6dbb5d0077bce7163) )
	3296	ROM_LOAD32_WORD_SWAP( "ro1pt1h.5a", 0x0800000, 0x400000, CRC(428bf573) SHA1(6be159e1cf7ef38639610c347fd2322ab9911a70) )
	3297	ROM_LOAD32_WORD_SWAP( "ro1pt1l.5c", 0x0800002, 0x400000, CRC(f3df1d13) SHA1(9f96c99bd3537940a532d3dccb69a1c7d8c6be63) )
	3298	ROM_LOAD32_WORD_SWAP( "ro1pt2h.4a", 0x1000000, 0x400000, CRC(e1abdbc9) SHA1(91827af01cb83f4422d7329c8eea52bb57d7d57e) )
	3299	ROM_LOAD32_WORD_SWAP( "ro1pt2l.4c", 0x1000002, 0x400000, CRC(c64f5cdc) SHA1(e7261f3a56718f304127cc85c08d0b32525dc1cd) )
	3300	ROM_LOAD32_WORD_SWAP( "ro1pt3h.3a", 0x1800000, 0x400000, CRC(ef4685f6) SHA1(930037cac4aae9892278aa322844d03c773c70f7) )
	3301	ROM_LOAD32_WORD_SWAP( "ro1pt3l.3c", 0x1800002, 0x400000, CRC(07d27009) SHA1(770001bee9d7ace337db8a42bf377678b2b5d5fb) )
	3302
	3303	ROM_REGION( 0x1000000, "c352", 0 ) /* C352 PCM samples */
	3304	ROM_LOAD( "ro1wavel.2c", 0x000000, 0x800000, CRC(c6aca840) SHA1(09a021459b6326fe161ffcee36376648a5bf0e00) )
	3305	ROM_LOAD( "ro2waveh.2a", 0x800000, 0x800000, CRC(ceecbf0d) SHA1(f0a5e57c04b661685833b209bd5e072666068391) )
	3306
	3307	ROM_REGION( 0x800000, "spares", 0 ) /* duplicate ROMs for the second texel pipeline on the PCB, not used for emulation */
	3308	ROM_LOAD( "ro1ccrl.7m", 0x000000, 0x400000, CRC(fe50e424) SHA1(8317c998db687e1c40398e0005a037dcded19c25) )
	3309	ROM_LOAD( "ro1ccrh.7k", 0x000000, 0x200000, CRC(1c958de2) SHA1(4893350999d5d377e68b9577187828de7a4c77c2) )
	3310	ROM_LOAD( "ro1cgll.5m", 0x000000, 0x800000, CRC(12c64936) SHA1(14a0d3d336f2fbe7992eedb3900748763368bc6b) )
	3311	ROM_LOAD( "ro1cglm.5k", 0x000000, 0x800000, CRC(7e8bb4fc) SHA1(46a7940989576239a720fde8ec4e4b623b0b6fe6) )
	3312	ROM_LOAD( "ro1cgum.5j", 0x000000, 0x800000, CRC(b9767735) SHA1(87fec452998a782db2cf00d369149b200a00d163) )
	3313	ROM_LOAD( "ro1cguu.5f", 0x000000, 0x800000, CRC(8fef8bd4) SHA1(6870590f585dc8d87ebe5181da870715c9c4fee3) )
	3314	ROM_END
	3315
3440	3316	ROM_START( finfurl2 )
3441	3317	ROM_REGION32_BE( 0x400000, "user1", 0 ) /* 4 megs for main R4650 code */
3442	3318	ROM_LOAD16_BYTE( "29f016.ic2", 0x000000, 0x200000, CRC(13cbc545) SHA1(3e67a7bfbb1c1374e8e3996a0c09e4861b0dca14) )
r9812	r9813
3716	3592	ROM_LOAD( "csz1ccrh.7k", 0x000000, 0x200000, CRC(bc2fa03c) SHA1(e63d8e75494a383bf9a213edfa9c472a010f8efe) )
3717	3593	ROM_END
3718	3594
	3595	ROM_START( crszoneb )
	3596	ROM_REGION32_BE( 0x800000, "user1", 0 ) /* 4 megs for main R4650 code */
	3597	ROM_LOAD16_WORD_SWAP( "cszo4verb.ic4", 0x400000, 0x400000, CRC(6192533d) SHA1(d102b91fe193bf255ea4e57a2bd964aa1cdfd21d) )
	3598	ROM_CONTINUE( 0x000000, 0x400000 )
	3599
	3600	ROM_REGION( 0x80000, "audiocpu", 0 ) /* Hitachi H8/3002 MCU code */
	3601	ROM_LOAD16_WORD_SWAP( "cszo3verb.ic1", 0x000000, 0x080000, CRC(c790743b) SHA1(5fa7b83a7a1b1105a3aa0870b782cf2741b7d11c) )
	3602
	3603	ROM_REGION( 0x40000, "ioboard", 0 ) /* I/O board HD643334 H8/3334 MCU code. "MIU-I/O;Ver2.05;JPN,GUN-EXTENTION" */
	3604	ROM_LOAD( "csz1prg0a.8f", 0x000000, 0x020000, CRC(8edc36b3) SHA1(b5df211988d856572fcc313480e693c8561784e4) )
	3605
	3606	ROM_REGION32_BE( 0x2000000, "data", 0 ) /* data roms */
	3607	ROM_LOAD16_BYTE( "csz1mtah.2j", 0x0000000, 0x800000, CRC(66b076ad) SHA1(edd32e0b380f01a9626d32f5eec860f841c8be8a) )
	3608	ROM_LOAD16_BYTE( "csz1mtal.2h", 0x0000001, 0x800000, CRC(38dc639a) SHA1(aa9b5b35174c1b007a57a4bd7a53bc3f479b5b71) )
	3609	ROM_LOAD16_BYTE( "csz1mtbh.2m", 0x1000000, 0x800000, CRC(bdec4188) SHA1(a098651fbd8a69a0afc17f4b6c93350926cacd6b) )
	3610	ROM_LOAD16_BYTE( "csz1mtbl.2f", 0x1000001, 0x800000, CRC(9c8f8d7a) SHA1(f61bcc9763df15428c82931a605ee40334d5ad98) )
	3611
	3612	ROM_REGION( 0x2000000, "textile", 0 ) /* texture tiles */
	3613	ROM_LOAD( "csz1cgll.4m", 0x0000000, 0x800000, CRC(0bcd41f2) SHA1(80b74f9398e8bd074f79a14490d06cfeb875c874) )
	3614	ROM_LOAD( "csz1cglm.4k", 0x0800000, 0x800000, CRC(d4af93d1) SHA1(0df37b793ce8da02d14f714722382786ae5d3ce2) )
	3615	ROM_LOAD( "csz1cgum.4j", 0x1000000, 0x800000, CRC(913c98b5) SHA1(b952dbc19053796077d4f33e8da836893e933b12) )
	3616	ROM_LOAD( "csz1cguu.5f", 0x1800000, 0x800000, CRC(e1d1bf24) SHA1(daf2c68e2d9a8f313d262d221cc990c93dfdf22f) )
	3617
	3618	ROM_REGION16_LE( 0x400000, "textilemapl", 0 ) /* texture tilemap 0-15 */
	3619	ROM_LOAD( "csz1ccrl.7f", 0x000000, 0x400000, CRC(1c20768d) SHA1(6cf4280e26f3625d6f750837bf344163e7e93c3d) )
	3620
	3621	ROM_REGION( 0x200000, "textilemaph", 0 ) /* texture tilemap 16-17 + attr */
	3622	ROM_LOAD( "csz1ccrh.7e", 0x000000, 0x200000, CRC(bc2fa03c) SHA1(e63d8e75494a383bf9a213edfa9c472a010f8efe) )
	3623
	3624	ROM_REGION32_BE( 0x2000000, "pointrom", 0 ) /* 3D model data */
	3625	ROM_LOAD32_WORD_SWAP( "csz1pt0h.7a", 0x0000000, 0x400000, CRC(e82f1abb) SHA1(b1c57152cc27835e06e429fd1659fe0973638142) )
	3626	ROM_LOAD32_WORD_SWAP( "csz1pt0l.7c", 0x0000002, 0x400000, CRC(b0d66afe) SHA1(7cda4eebf1bb1191d17e4b5e616be2fbe4ae9328) )
	3627	ROM_LOAD32_WORD_SWAP( "csz1pt1h.5a", 0x0800000, 0x400000, CRC(e54f80ad) SHA1(3b3fbb3001e630d800b02ec8e653d74878ac5116) )
	3628	ROM_LOAD32_WORD_SWAP( "csz1pt1l.5c", 0x0800002, 0x400000, CRC(527171c8) SHA1(0b2ce3858f40bdedf1543309a6bc28d780415250) )
	3629	ROM_LOAD32_WORD_SWAP( "csz1pt2h.4a", 0x1000000, 0x400000, CRC(e295137a) SHA1(37b18af1b3d9f0e69b45135f89b49a1ceec79127) )
	3630	ROM_LOAD32_WORD_SWAP( "csz1pt2l.4c", 0x1000002, 0x400000, CRC(c87d6dbd) SHA1(686f39073c521d6b21ef8bc1161b41b680697c63) )
	3631	ROM_LOAD32_WORD_SWAP( "csz1pt3h.3a", 0x1800000, 0x400000, CRC(05f65bdf) SHA1(0c349fe5381fe7aeb81f9365a2b44a212f6bd33e) )
	3632	ROM_LOAD32_WORD_SWAP( "csz1pt3l.3c", 0x1800002, 0x400000, CRC(5d077c0f) SHA1(a4fd0167d89bf9417766405726e0334e7c7eaec3) )
	3633
	3634	ROM_REGION( 0x1000000, "c352", 0 ) /* C352 PCM samples */
	3635	ROM_LOAD( "csz1wavel.2c", 0x000000, 0x800000, CRC(d0d74132) SHA1(a293d93bca8e12e388a088a592cfa7bcb9a976f7) )
	3636	ROM_LOAD( "csz1waveh.2a", 0x800000, 0x800000, CRC(de9d14a8) SHA1(e5006861928bb1d29bf80c7304f1a6d044b094fd) )
	3637
	3638	ROM_REGION( 0x800000, "dups", 0 ) /* duplicate roms */
	3639	ROM_LOAD( "csz1cguu.4f", 0x000000, 0x800000, CRC(e1d1bf24) SHA1(daf2c68e2d9a8f313d262d221cc990c93dfdf22f) )
	3640	ROM_LOAD( "csz1cgum.5j", 0x000000, 0x800000, CRC(913c98b5) SHA1(b952dbc19053796077d4f33e8da836893e933b12) )
	3641	ROM_LOAD( "csz1cgll.5m", 0x000000, 0x800000, CRC(0bcd41f2) SHA1(80b74f9398e8bd074f79a14490d06cfeb875c874) )
	3642	ROM_LOAD( "csz1cglm.5k", 0x000000, 0x800000, CRC(d4af93d1) SHA1(0df37b793ce8da02d14f714722382786ae5d3ce2) )
	3643	ROM_LOAD( "csz1ccrl.7m", 0x000000, 0x400000, CRC(1c20768d) SHA1(6cf4280e26f3625d6f750837bf344163e7e93c3d) )
	3644	ROM_LOAD( "csz1ccrh.7k", 0x000000, 0x200000, CRC(bc2fa03c) SHA1(e63d8e75494a383bf9a213edfa9c472a010f8efe) )
	3645	ROM_END
	3646
3719	3647	ROM_START( crszonea )
3720	3648	ROM_REGION32_BE( 0x800000, "user1", 0 ) /* 4 megs for main R4650 code */
3721	3649	ROM_LOAD16_WORD_SWAP( "cszo2vera.ic4", 0x400000, 0x400000, CRC(1426d8d0) SHA1(e8049df1b2db1180f9edf6e5fa9fe8692ae81086) )
r9812	r9813
3779	3707	GAME( 1997, timecrs2c,timecrs2, ss23io, ss23, ss23, ROT0, "Namco", "Time Crisis 2 (TSS4 Ver. A)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
3780	3708	GAME( 1998, panicprk, 0, s23, s23, ss23, ROT0, "Namco", "Panic Park (PNP2 Ver. A)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
3781	3709	GAME( 1998, gunwars, 0, gmen, ss23, ss23, ROT0, "Namco", "Gunmen Wars (GM1 Ver. A)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
	3710	GAME( 1998, raceon, 0, gmen, ss23, ss23, ROT0, "Namco", "Race On! (RO2 Ver. A)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
3782	3711	GAME( 1998, 500gp, 0, ss23, ss23, ss23, ROT0, "Namco", "500 GP (5GP3 Ver. C)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
3783	3712	GAME( 1999, finfurl2, 0, gmen, ss23, ss23, ROT0, "Namco", "Final Furlong 2 (World)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
3784	3713	GAME( 1999, finfurl2j,finfurl2, gmen, ss23, ss23, ROT0, "Namco", "Final Furlong 2 (Japan)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
3785	3714	GAME( 2000, crszone, 0, ss23e2, ss23, ss23, ROT0, "Namco", "Crisis Zone (CSZO3 Ver. B)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
3786	3715	GAME( 2000, crszonea, crszone,ss23e2, ss23, ss23, ROT0, "Namco", "Crisis Zone (CSZO2 Ver. A)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
	3716	GAME( 2000, crszoneb, crszone,ss23e2, ss23, ss23, ROT0, "Namco", "Crisis Zone (CSZO4 Ver. B)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND )
3787	3717

src/mame/drivers/naomi.c
r9812	r9813
2204	2204	ROM_LOAD16_WORD_SWAP_BIOS( 4, "epr-23608c.bin", 0x000000, 0x200000, CRC(6ef1dd8e) SHA1(25ef957ec1c58fdaff5e89102002bca6c38832c5) ) \
2205	2205	ROM_SYSTEM_BIOS( 5, "bios5", "epr-23608b (Export)" ) \
2206	2206	ROM_LOAD16_WORD_SWAP_BIOS( 5, "epr-23608b.bin", 0x000000, 0x200000, CRC(a554b1e3) SHA1(343b727a3619d1c75a9b6d4cc156a9050447f155) ) \
2207		ROM_SYSTEM_BIOS( 6, "bios6", "epr-23608 (Export)" ) \
2208		ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-23608.bin", 0x000000, 0x200000, CRC(929cc3a6) SHA1(47d00c818de23f733a4a33b1bbc72eb8aa729246) ) \
2209		ROM_SYSTEM_BIOS( 7, "bios7", "epr-23607b (USA)" ) \
2210		ROM_LOAD16_WORD_SWAP_BIOS( 7, "epr-23607b.bin", 0x000000, 0x200000, CRC(f308c5e9) SHA1(5470ab1cee6afecbd8ca8cf40f8fbe4ec2cb1471) ) \
2211		ROM_SYSTEM_BIOS( 8, "bios8", "epr-23607 (USA)" ) \
2212		ROM_LOAD16_WORD_SWAP_BIOS( 8, "epr-23607.bin", 0x000000, 0x200000, CRC(2b55add2) SHA1(547de5f97d3183c8cd069c4fa3c09f13d8b637d9) ) \
	2207	ROM_SYSTEM_BIOS( 6, "bios6", "epr-23608a (Export)" ) \
	2208	ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-23608a.bin", 0x000000, 0x200000, CRC(e8f884d1) SHA1(28f4de747bb3cf860b9ebf897322fbc5d7c1e156) ) \
	2209	ROM_SYSTEM_BIOS( 7, "bios7", "epr-23608 (Export)" ) \
	2210	ROM_LOAD16_WORD_SWAP_BIOS( 8, "epr-23608.bin", 0x000000, 0x200000, CRC(929cc3a6) SHA1(47d00c818de23f733a4a33b1bbc72eb8aa729246) ) \
	2211	ROM_SYSTEM_BIOS( 8, "bios8", "epr-23607b (USA)" ) \
	2212	ROM_LOAD16_WORD_SWAP_BIOS( 8, "epr-23607b.bin", 0x000000, 0x200000, CRC(f308c5e9) SHA1(5470ab1cee6afecbd8ca8cf40f8fbe4ec2cb1471) ) \
	2213	ROM_SYSTEM_BIOS( 9, "bios9", "epr-23607 (USA)" ) \
	2214	ROM_LOAD16_WORD_SWAP_BIOS( 9, "epr-23607.bin", 0x000000, 0x200000, CRC(2b55add2) SHA1(547de5f97d3183c8cd069c4fa3c09f13d8b637d9) ) \
2213	2215
2214	2216	/* First half is BIOS, second half is game settings and is blanked/reprogrammed by the BIOS as necessary */
2215	2217	#define AW_BIOS \
r9812	r9813
2708	2710	NAOMI_DEFAULT_EEPROM
2709	2711
2710	2712	ROM_REGION( 0x7800000, "user1", ROMREGION_ERASEFF)
	2713	ROM_LOAD( "epr-22336d.ic22",0x000000, 0x0400000, CRC(e6c0cb0c) SHA1(b8c7fe62cb370793fd5ed0af27c18d36e9c0ce54) )
	2714	ROM_LOAD( "mpr-22328.ic1", 0x0800000, 0x1000000, CRC(179cec02) SHA1(cbaba86082370a082d2e9f18427691d5cfa0e4f0) )
	2715	ROM_LOAD( "mpr-22329.ic2", 0x1800000, 0x1000000, CRC(e0d5b98c) SHA1(5bf1ac0d895fd7725d170a54f01cd717a5e54110) )
	2716	ROM_LOAD( "mpr-22330.ic3", 0x2800000, 0x1000000, CRC(6737cd62) SHA1(08429ca39fef3b36cb491813ddcd0feef3b24372) )
	2717	ROM_LOAD( "mpr-22331.ic4", 0x3800000, 0x1000000, CRC(8fb5cbcf) SHA1(c4e6cbbe7d3549e1841654b41b1946b9bc356e74) )
	2718	ROM_LOAD( "mpr-22332.ic5", 0x4800000, 0x1000000, CRC(c5e365a8) SHA1(5839ea24b8fd02552931175d35e2ceca75fca089) )
	2719	ROM_LOAD( "mpr-22337.ic6", 0x5800000, 0x1000000, CRC(87ca3a2f) SHA1(2ffc01597107eb60dfa7aa49d51f203b51a44334) )
	2720	ROM_LOAD( "mpr-22338.ic7", 0x6800000, 0x1000000, CRC(4bda7303) SHA1(db27d91ef811d741cfdb5c0196e61be722c2f5bd) )
	2721	ROM_END
	2722
	2723	ROM_START( drbyocwc )
	2724	ROM_REGION( 0x200000, "maincpu", 0)
	2725	NAOMI_BIOS
	2726	NAOMI_DEFAULT_EEPROM
	2727
	2728	ROM_REGION( 0x7800000, "user1", ROMREGION_ERASEFF)
2711	2729	ROM_LOAD( "epr-22336c.ic22", 0x000000, 0x400000, CRC(50053f82) SHA1(5b31abb480043ece3645b2479ba566ac6592acd8) )
2712	2730	ROM_LOAD( "mpr-22328.ic1", 0x0800000, 0x1000000, CRC(179cec02) SHA1(cbaba86082370a082d2e9f18427691d5cfa0e4f0) )
2713	2731	ROM_LOAD( "mpr-22329.ic2", 0x1800000, 0x1000000, CRC(e0d5b98c) SHA1(5bf1ac0d895fd7725d170a54f01cd717a5e54110) )
r9812	r9813
4925	4943	/* 00??C */ GAME( 2001, inunoos, naomi, naomi, naomi, naomi, ROT0, "Sega", "Inu no Osanpo", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )
4926	4944	/* 0083C */ GAME( 2001, derbyoc2, naomi, naomi, naomi, naomi, ROT0, "Sega", "Derby Owners Club II (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )
4927	4945	/* 0084C */ GAME( 2001, vtenis2c, naomi, naomi, naomi, naomi, ROT0, "Sega", "Power Smash 2 / Virtua Tennis 2 (cartridge)", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )
4928		/* 0088C */ GAME( 2001, derbyocw, naomi, naomi, naomi, naomi, ROT0, "Sega", "Derby Owners Club World Edition (JPN, USA, EXP, KOR, AUS) (Rev C)", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )
	4946	/* 0088C */ GAME( 2001, derbyocw, naomi, naomi, naomi, naomi, ROT0, "Sega", "Derby Owners Club World Edition (JPN, USA, EXP, KOR, AUS) (Rev D)", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )
	4947	/* 0088C */ GAME( 2001, drbyocwc, derbyocw, naomi, naomi, naomi, ROT0, "Sega", "Derby Owners Club World Edition (JPN, USA, EXP, KOR, AUS) (Rev C)", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )
4929	4948	/* 0098C */ GAME( 2001, shootopl, naomi, naomi, naomi, naomi, ROT0, "Sega", "Shootout Pool", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )
4930	4949	/* 0128C */ GAME( 2001, shootpl, naomi, naomi, naomi, naomi, ROT0, "Sega", "Shootout Pool (JPN, USA, KOR, AUS) / Shootout Pool Prize (EXP)", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )
4931	4950	/* 0???C */ GAME( 2001, shootplm, naomi, naomi, naomi, naomi, ROT0, "Sega", "Shootout Pool Medal", GAME_UNEMULATED_PROTECTION\|GAME_IMPERFECT_GRAPHICS\|GAME_IMPERFECT_SOUND\|GAME_NOT_WORKING )

src/mame/drivers/stv.c
r9812	r9813
4053	4053	GAME( 1995, fhboxers, stvbios, stv, stv, fhboxers, ROT0, "Sega", "Funky Head Boxers (JUETBKAL 951218 V1.000)", GAME_NO_SOUND \| GAME_IMPERFECT_GRAPHICS )
4054	4054	GAME( 1994, gaxeduel, stvbios, stv, stv, gaxeduel, ROT0, "Sega", "Golden Axe - The Duel (JUETL 950117 V1.000)", GAME_IMPERFECT_SOUND )
4055	4055	GAME( 1998, grdforce, stvbios, stv, stv, grdforce, ROT0, "Success", "Guardian Force (JUET 980318 V0.105)", GAME_IMPERFECT_SOUND \| GAME_IMPERFECT_GRAPHICS )
4056		GAME( 1998, groovef, stvbios, stv, stv, groovef, ROT0, "Atlus", "~~Power Instinct 3 -~~ Groove On Fight (J 970416 V1.001)", GAME_IMPERFECT_SOUND \| GAME_IMPERFECT_GRAPHICS )
	4056	GAME( 1998, groovef, stvbios, stv, stv, groovef, ROT0, "Atlus", "Groove on Fight - Gouketsuji Ichizoku 3 (J 970416 V1.001)", GAME_IMPERFECT_SOUND \| GAME_IMPERFECT_GRAPHICS )
4057	4057	GAME( 1997, hanagumi, stvbios, stv, stv, hanagumi, ROT0, "Sega", "Hanagumi Taisen Columns - Sakura Wars (J 971007 V1.010)", GAME_IMPERFECT_GRAPHICS \| GAME_IMPERFECT_SOUND )
4058	4058	GAME( 1996, introdon, stvbios, stv, stv, stv, ROT0, "Sunsoft / Success", "Karaoke Quiz Intro Don Don! (J 960213 V1.000)", GAME_IMPERFECT_SOUND \| GAME_IMPERFECT_GRAPHICS )
4059	4059	GAME( 1995, kiwames, stvbios, stv, stvmp, stv, ROT0, "Athena", "Pro Mahjong Kiwame S (J 951020 V1.208)", GAME_IMPERFECT_SOUND \| GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/dai3wksi.c
r0	r9813
	1	/*
	2
	3	-Galaxy Force
	4	-Run Away
	5	--------------------------
	6	Dai San Wakusei Meteor
	7	(c)1979 Sun Electronics
	8	SIV-01-B
	9
	10	TVG_13.6 [8e8b40b1]
	11	TVG_14.7 [d48cbabe]
	12	TVG_15.8 [cf44bd60]
	13	TVG_16.9 [ae723f56]
	14	--------------------------
	15	-Warp 1
	16
	17
	18	Dumped by Chack'n
	19	01/04/2009
	20
	21	Written by Hau
	22	02/18/2009
	23	12/14/2010
	24
	25	Discrete by Andy
	26	11/11/2009
	27
	28
	29	Driver Notes:
	30
	31	- Two player games are automatically displayed in cocktail mode.
	32	Is this by design (a cocktail only romset)?
	33
	34	- Discrete audio needs adding to replace hardcoded samples
	35
	36	*/
	37
	38	#include "emu.h"
	39	#include "cpu/z80/z80.h"
	40	#include "sound/samples.h"
	41	#include "machine/rescap.h"
	42	#include "sound/sn76477.h"
	43
	44
	45	class dai3wksi_state : public driver_device
	46	{
	47	public:
	48	dai3wksi_state(running_machine &machine, const driver_device_config_base &config)
	49	: driver_device(machine, config) { }
	50
	51	/* video */
	52	UINT8 * dai3wksi_videoram;
	53	size_t dai3wksi_videoram_size;
	54	int dai3wksi_flipscreen;
	55	int dai3wksi_redscreen;
	56	int dai3wksi_redterop;
	57
	58	/* sound */
	59	UINT8 port_last1;
	60	UINT8 port_last2;
	61	int enabled_sound;
	62	int sound3_counter;
	63	};
	64
	65
	66	/*************************************
	67	*
	68	* Video system
	69	*
	70	*************************************/
	71
	72
	73	static const UINT8 vr_prom1[6482]={
	74	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	75	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	76	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	77	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 4,4,4,4,4,4,4,4, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	78	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 4,4,4,4,4,4,4,4, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	79	3, 3,3,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	80	3, 3,3,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	81	3, 3,3,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	82
	83	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	84	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	85	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	86	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 4,4,4,4,4,4,4,4, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	87	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 4,4,4,4,4,4,4,4, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	88	3, 3,3,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	89	3, 3,3,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	90	3, 3,3,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 5,5,5,5,5,5,5,5, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	91	};
	92
	93	static const UINT8 vr_prom2[6482]={
	94	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	95	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	96	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	97	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	98	6, 6,6,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	99	3, 3,3,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	100	3, 3,3,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	101	3, 3,3,6,6,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	102
	103	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	104	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	105	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	106	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	107	6, 6,6,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	108	3, 3,3,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	109	3, 3,3,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	110	3, 3,3,2,2,6,6,6,6, 6,6,6,6,6,6,6,6, 3,3,3,3,3,3,3,3, 7,7,7,7,7,7,7,7, 3,3,3,3,3,3,3,3, 2,2,2,2,2,2,2,2, 6,6,6,6,6,6,6,6, 4,4,4,4,4,4,4,
	111	};
	112
	113
	114	static void dai3wksi_get_pens(pen_t *pens)
	115	{
	116	offs_t i;
	117
	118	for (i = 0; i <= 7; i++)
	119	{
	120	pens[i] = MAKE_RGB(pal1bit(i >> 1), pal1bit(i >> 2), pal1bit(i >> 0));
	121	}
	122	}
	123
	124
	125	static VIDEO_UPDATE( dai3wksi )
	126	{
	127	dai3wksi_state *state = screen->machine->driver_data<dai3wksi_state>();
	128	offs_t offs;
	129	pen_t pens[8];
	130
	131	dai3wksi_get_pens(pens);
	132
	133	for (offs = 0; offs < state->dai3wksi_videoram_size; offs++)
	134	{
	135	offs_t i;
	136
	137	UINT8 x = offs << 2;
	138	UINT8 y = offs >> 6;
	139	UINT8 data = state->dai3wksi_videoram[offs];
	140	UINT8 color;
	141	int value = (x >> 2) + ((y >> 5) << 6) + 64 * 8 * (state->dai3wksi_redterop ? 1 : 0);
	142
	143	if (state->dai3wksi_redscreen)
	144	{
	145	color = 0x02;
	146	} else {
	147	if (input_port_read(screen->machine, "IN2") & 0x03)
	148	color = vr_prom2[value];
	149	else
	150	color = vr_prom1[value];
	151	}
	152
	153	for (i = 0; i <= 3; i++)
	154	{
	155	pen_t pen = (data & (1 << i)) ? pens[color] : pens[0];
	156
	157	if (state->dai3wksi_flipscreen)
	158	*BITMAP_ADDR32(bitmap, 255-y, 255-x) = pen;
	159	else
	160	*BITMAP_ADDR32(bitmap, y, x) = pen;
	161
	162	x++;
	163	}
	164	}
	165
	166	return 0;
	167	}
	168
	169
	170	/*************************************
	171	*
	172	* Audio system
	173	*
	174	*************************************/
	175
	176	#define SAMPLE_SOUND1 0
	177	#define SAMPLE_SOUND2 1
	178	#define SAMPLE_SOUND3_1 2
	179	#define SAMPLE_SOUND3_2 3
	180	#define SAMPLE_SOUND4 4
	181	#define SAMPLE_SOUND5 5
	182	#define SAMPLE_SOUND6_1 6
	183	#define SAMPLE_SOUND6_2 7
	184
	185	#define CHANNEL_SOUND1 0
	186	#define CHANNEL_SOUND2 1
	187	#define CHANNEL_SOUND3 2
	188	#define CHANNEL_SOUND4 3
	189	#define CHANNEL_SOUND5 4
	190	#define CHANNEL_SOUND6 5
	191
	192
	193	static WRITE8_HANDLER( dai3wksi_audio_1_w )
	194	{
	195	dai3wksi_state *state = space->machine->driver_data<dai3wksi_state>();
	196	running_device *samples = space->machine->device("samples");
	197	UINT8 rising_bits = data & ~state->port_last1;
	198
	199	state->enabled_sound = data & 0x80;
	200
	201	if ((rising_bits & 0x20) && state->enabled_sound)
	202	{
	203	if (data & 0x04)
	204	sample_start(samples, CHANNEL_SOUND5, SAMPLE_SOUND5, 0);
	205	else
	206	sample_start(samples, CHANNEL_SOUND5, SAMPLE_SOUND5, 1);
	207	}
	208	if (!(data & 0x20) && (state->port_last1 & 0x20))
	209	sample_stop(samples, CHANNEL_SOUND5);
	210
	211	state->port_last1 = data;
	212	}
	213
	214	static WRITE8_HANDLER( dai3wksi_audio_2_w )
	215	{
	216	dai3wksi_state *state = space->machine->driver_data<dai3wksi_state>();
	217	running_device *samples = space->machine->device("samples");
	218	UINT8 rising_bits = data & ~state->port_last2;
	219
	220	state->dai3wksi_flipscreen = data & 0x10;
	221	state->dai3wksi_redscreen = ~data & 0x20;
	222	state->dai3wksi_redterop = data & 0x40;
	223
	224	if (state->enabled_sound)
	225	{
	226	if (rising_bits & 0x01) sample_start(samples, CHANNEL_SOUND1, SAMPLE_SOUND1, 0);
	227	if (rising_bits & 0x02) sample_start(samples, CHANNEL_SOUND2, SAMPLE_SOUND2, 0);
	228	if (rising_bits & 0x08) sample_start(samples, CHANNEL_SOUND4, SAMPLE_SOUND4, 0);
	229	if (rising_bits & 0x04)
	230	{
	231	if (!state->sound3_counter)
	232	sample_start(samples, CHANNEL_SOUND3, SAMPLE_SOUND3_1, 0);
	233	else
	234	sample_start(samples, CHANNEL_SOUND3, SAMPLE_SOUND3_2, 0);
	235
	236	state->sound3_counter ^= 1;
	237	}
	238	}
	239
	240	state->port_last2 = data;
	241	}
	242
	243	static WRITE8_HANDLER( dai3wksi_audio_3_w )
	244	{
	245	dai3wksi_state *state = space->machine->driver_data<dai3wksi_state>();
	246	running_device *samples = space->machine->device("samples");
	247
	248	if (state->enabled_sound)
	249	{
	250	if (data & 0x40)
	251	sample_start(samples, CHANNEL_SOUND6, SAMPLE_SOUND6_1, 0);
	252	else if (data & 0x80)
	253	sample_start(samples, CHANNEL_SOUND6, SAMPLE_SOUND6_2, 0);
	254	}
	255	}
	256
	257
	258	static const char *const dai3wksi_sample_names[] =
	259	{
	260	"*dai3wksi",
	261	"1.wav",
	262	"2.wav",
	263	"3.wav",
	264	"3-2.wav",
	265	"4.wav",
	266	"5.wav",
	267	"6.wav",
	268	"6-2.wav",
	269	0
	270	};
	271
	272
	273	static const samples_interface dai3wksi_samples_interface =
	274	{
	275	6, /* 6 channels */
	276	dai3wksi_sample_names
	277	};
	278
	279
	280	static MACHINE_CONFIG_FRAGMENT( dai3wksi_audio )
	281	MDRV_SPEAKER_STANDARD_MONO("mono")
	282
	283	MDRV_SOUND_ADD("samples", SAMPLES, 0)
	284	MDRV_SOUND_CONFIG(dai3wksi_samples_interface)
	285	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
	286	MACHINE_CONFIG_END
	287
	288
	289	/*************************************
	290	*
	291	* Memory handlers
	292	*
	293	*************************************/
	294
	295	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
	296	AM_RANGE(0x0000, 0x1bff) AM_ROM
	297	AM_RANGE(0x2000, 0x23ff) AM_RAM
	298	AM_RANGE(0x2400, 0x24ff) AM_MIRROR(0x100) AM_READ_PORT("IN0")
	299	AM_RANGE(0x2800, 0x28ff) AM_MIRROR(0x100) AM_READ_PORT("IN1")
	300	AM_RANGE(0x3000, 0x3000) AM_WRITE(dai3wksi_audio_1_w)
	301	AM_RANGE(0x3400, 0x3400) AM_WRITE(dai3wksi_audio_2_w)
	302	AM_RANGE(0x3800, 0x3800) AM_WRITE(dai3wksi_audio_3_w)
	303	AM_RANGE(0x8000, 0xbfff) AM_RAM AM_BASE_SIZE_MEMBER(dai3wksi_state, dai3wksi_videoram, dai3wksi_videoram_size)
	304	ADDRESS_MAP_END
	305
	306
	307	/*************************************
	308	*
	309	* Port definitions
	310	*
	311	*************************************/
	312
	313	static INPUT_PORTS_START( dai3wksi )
	314	PORT_START("IN0")
	315	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
	316	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
	317	PORT_SERVICE( 0x04, IP_ACTIVE_HIGH )
	318	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
	319	PORT_DIPNAME( 0x10, 0x00, "DIPSW #7" ) PORT_DIPLOCATION("SW1:7")
	320	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
	321	PORT_DIPSETTING( 0x10, DEF_STR( On ) )
	322	PORT_DIPNAME( 0x20, 0x00, "DIPSW #8" ) PORT_DIPLOCATION("SW1:8")
	323	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
	324	PORT_DIPSETTING( 0x20, DEF_STR( On ) )
	325	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
	326	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 )
	327
	328	PORT_START("IN1")
	329	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START2 )
	330	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 )
	331	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
	332	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
	333	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
	334	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
	335	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
	336	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
	337
	338	/* dummy port (colormap) */
	339	PORT_START("IN2")
	340	PORT_DIPNAME( 0x01, 0x00, "DIPSW #1" ) PORT_DIPLOCATION("SW1:1")
	341	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
	342	PORT_DIPSETTING( 0x01, DEF_STR( On ) )
	343	PORT_DIPNAME( 0x02, 0x00, "DIPSW #2" ) PORT_DIPLOCATION("SW1:2")
	344	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
	345	PORT_DIPSETTING( 0x02, DEF_STR( On ) )
	346	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	347	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	348	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	349	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	350	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	351	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	352	INPUT_PORTS_END
	353
	354
	355	/*************************************
	356	*
	357	* Machine drivers
	358	*
	359	*************************************/
	360
	361	static MACHINE_START( dai3wksi )
	362	{
	363	dai3wksi_state *state = machine->driver_data<dai3wksi_state>();
	364
	365	state_save_register_global(machine, state->port_last1);
	366	state_save_register_global(machine, state->port_last2);
	367	state_save_register_global(machine, state->enabled_sound);
	368	state_save_register_global(machine, state->sound3_counter);
	369	}
	370
	371	static MACHINE_RESET( dai3wksi )
	372	{
	373	dai3wksi_state *state = machine->driver_data<dai3wksi_state>();
	374
	375	state->port_last1 = 0;
	376	state->port_last2 = 0;
	377	state->enabled_sound = 0;
	378	state->sound3_counter = 0;
	379	}
	380
	381
	382	static MACHINE_CONFIG_START( dai3wksi, dai3wksi_state )
	383
	384	/* basic machine hardware */
	385	MDRV_CPU_ADD("maincpu", Z80, XTAL_10MHz/4 ) /* Confirmed on PCB */
	386	MDRV_CPU_PROGRAM_MAP(main_map)
	387	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
	388
	389	MDRV_MACHINE_START(dai3wksi)
	390	MDRV_MACHINE_RESET(dai3wksi)
	391
	392	/* video hardware */
	393	MDRV_VIDEO_UPDATE(dai3wksi)
	394
	395	MDRV_SCREEN_ADD("screen", RASTER)
	396	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
	397	MDRV_SCREEN_SIZE(256, 256)
	398	MDRV_SCREEN_VISIBLE_AREA(4, 251, 8, 247)
	399	MDRV_SCREEN_REFRESH_RATE(60)
	400
	401	/* audio hardware */
	402	MDRV_FRAGMENT_ADD(dai3wksi_audio)
	403	MACHINE_CONFIG_END
	404
	405
	406	/*************************************
	407	*
	408	* ROM definitions
	409	*
	410	*************************************/
	411
	412	ROM_START( dai3wksi )
	413	ROM_REGION( 0x10000, "maincpu", 0 )
	414	ROM_LOAD( "tvg_13.6", 0x0000, 0x0800, CRC(8e8b40b1) SHA1(25b9223486dd348ea302e8e8f1d47c804a88b142) )
	415	ROM_LOAD( "tvg_14.7", 0x0800, 0x0800, CRC(d48cbabe) SHA1(64b571cd778fc7d67a5fa998a0defd36c04f111f) )
	416	ROM_LOAD( "tvg_15.8", 0x1000, 0x0800, CRC(cf44bd60) SHA1(61e0b3f9c4a1f9da1de57fb8276d4fc9e43b8f24) )
	417	ROM_LOAD( "tvg_16.9", 0x1800, 0x0400, CRC(ae723f56) SHA1(c25c27d6144533b2b2a888bfa8dbf48ed8d8b09a) )
	418	ROM_END
	419
	420
	421	/*************************************
	422	*
	423	* Game drivers
	424	*
	425	*************************************/
	426
	427	GAME(1979, dai3wksi, 0, dai3wksi, dai3wksi, 0, ROT270, "Sun Electronics", "Dai San Wakusei Meteor", GAME_WRONG_COLORS \| GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )

src/mame/drivers/namcos1.c
r9812	r9813
1507	1507	ROM_LOAD( "qs1_o1.bin", 0x20000, 0x10000, CRC(e4aab0ca) SHA1(e4765dd369b02492dbb9955cc082f24665a01635) )
1508	1508	ROM_END
1509	1509
	1510	ROM_START( questers )
	1511	ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 176k for the sound cpu */
	1512	ROM_LOAD( "qs1_s0.bin", 0x0c000, 0x10000, CRC(c2ef3af9) SHA1(aa0766aad450660e216d817e41e030141e8d1f48) )
	1513
	1514	ROM_REGION( 0x400000, "user1", 0 ) /* 4M for ROMs */
	1515	/* 000000-07ffff empty */
	1516	/* 080000-0fffff empty */
	1517	/* 100000-17ffff empty */
	1518	/* 180000-1fffff empty */
	1519	/* 200000-27ffff empty */
	1520	ROM_LOAD_512( "qs2_p5.bin", 0x280000, CRC(15661fe7) SHA1(e3071981231dd84407d1cc90f3b248d2989406b3) )
	1521	ROM_LOAD_512( "qs2_p6.bin", 0x300000, CRC(19e0fc20) SHA1(bc824dd7f88ccfa2e97ae05897e6535cf6876fab) )
	1522	ROM_LOAD_512( "qs2_p7.bin", 0x380000, CRC(4f6ad716) SHA1(759b4eee1a24029efc2e813a648f6fbc22a17fab) )
	1523
	1524	ROM_REGION( 0xd0000, "mcu", 0 ) /* the MCU & voice */
	1525	ROM_LOAD( "cus64-64a1.mcu", 0x0f000, 0x01000, CRC(ffb5c0bd) SHA1(7a38c0cc2553c627f4ec507fb6e807cf7d537c02) ) /* internal 63701 MCU code */
	1526	ROM_LOAD_HS( "qs1_v0.bin", 0x10000, 0x10000, CRC(6a2f3038) SHA1(00870da9b7f65536ff052c32da2d553f8c6b994b) )
	1527
	1528	ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */
	1529	ROM_LOAD( "qs1_c8.bin", 0x00000, 0x10000, CRC(06730d54) SHA1(53d79c27e2f1b192b1de781b6b5024eb1e8126ad) )
	1530
	1531	ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */
	1532	ROM_LOAD( "qs1_c0.bin", 0x00000, 0x20000, CRC(ca69bd7a) SHA1(98130f06e3d7b480b76bf28a4e252b4aaa1e1b3e) )
	1533	ROM_LOAD( "qs1_c1.bin", 0x20000, 0x20000, CRC(d660ba71) SHA1(738d225c0e2b91c785fde0c33a0520a672933659) )
	1534	ROM_LOAD( "qs1_c2.bin", 0x40000, 0x20000, CRC(4686f656) SHA1(8628a18bf7154b8edaf7cfbee2d8881a28690bff) )
	1535
	1536	ROM_REGION( 0x100000, "gfx3", 0 ) /* sprites */
	1537	ROM_LOAD( "qs1_o0.bin", 0x00000, 0x10000, CRC(e24f0bf1) SHA1(31f37f853fe27c24cfeaa059f8959dfea37911cb) )
	1538	ROM_LOAD( "qs1_o1.bin", 0x20000, 0x10000, CRC(e4aab0ca) SHA1(e4765dd369b02492dbb9955cc082f24665a01635) )
	1539	ROM_END
1510	1540	/* Pac-Mania */
1511	1541	ROM_START( pacmania )
1512	1542	ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 176k for the sound cpu */
1513		ROM_LOAD( "pnx_s0.bin", 0x0c000, 0x10000, CRC(c10370fa) SHA1(f819a31075d3c8df5deee2919cd446b9e678c47d) )
1514		ROM_LOAD( "pnx_s1.bin", 0x1c000, 0x10000, CRC(f761ed5a) SHA1(1487932c86a6094ed01d5032904fd7ae3435d09c) )
	1543	ROM_LOAD( "pn2_s0.bin", 0x0c000, 0x10000, CRC(c10370fa) SHA1(f819a31075d3c8df5deee2919cd446b9e678c47d) )
	1544	ROM_LOAD( "pn2_s1.bin", 0x1c000, 0x10000, CRC(f761ed5a) SHA1(1487932c86a6094ed01d5032904fd7ae3435d09c) )
1515	1545
1516	1546	ROM_REGION( 0x400000, "user1", 0 ) /* 4M for ROMs */
1517	1547	/* 000000-07ffff empty */
r9812	r9813
1521	1551	/* 200000-27ffff empty */
1522	1552	/* 280000-2fffff empty */
1523	1553	ROM_LOAD_1024( "pn_prg-6.bin", 0x300000, CRC(fe94900c) SHA1(5ce726baafc5ed24ea4cae33232c97637afb486b) )
1524		ROM_LOAD_512 ( "pnx_p7.bin", 0x380000, CRC(462fa4fd) SHA1(b27bee1ac64ac204c85703c3822de7dbda11b75e) )
	1554	ROM_LOAD_512 ( "pn2_p7.bin", 0x380000, CRC(462fa4fd) SHA1(b27bee1ac64ac204c85703c3822de7dbda11b75e) )
1525	1555
1526	1556	ROM_REGION( 0xd0000, "mcu", 0 ) /* the MCU & voice */
1527	1557	ROM_LOAD( "cus64-64a1.mcu", 0x0f000, 0x01000, CRC(ffb5c0bd) SHA1(7a38c0cc2553c627f4ec507fb6e807cf7d537c02) ) /* internal 63701 MCU code */
1528		ROM_LOAD_HS( "pnx_v0.bin", 0x10000, 0x10000, CRC(1ad5788f) SHA1(f6b1ccdcc3db11c0ab83e3ff24e772cd2b491468) )
	1558	ROM_LOAD_HS( "pn2_v0.bin", 0x10000, 0x10000, CRC(1ad5788f) SHA1(f6b1ccdcc3db11c0ab83e3ff24e772cd2b491468) )
1529	1559
1530	1560	ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */
1531		ROM_LOAD( "pn1_c8.bin", 0x00000, 0x10000, CRC(f3afd65d) SHA1(51daefd8685b49c464130b9e7d93e31cfdda724e) )
	1561	ROM_LOAD( "pn2_c8.bin", 0x00000, 0x10000, CRC(f3afd65d) SHA1(51daefd8685b49c464130b9e7d93e31cfdda724e) )
1532	1562
1533	1563	ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */
1534	1564	ROM_LOAD( "pn_chr-0.bin", 0x00000, 0x20000, CRC(7c57644c) SHA1(77d9cc9ffbed47a941e4c5e5645d7d1126f6c302) )
r9812	r9813
2683	2713	GAME( 1987, dspirita, dspirit, ns1, dspirit, dspirit, ROT90, "Namco (Atari license)", "Dragon Spirit (Atari license)", 0 )
2684	2714	GAME( 1987, blazer, 0, ns1, ns1, blazer, ROT90, "Namco", "Blazer (Japan)", 0 )
2685	2715	GAME( 1987, quester, 0, ns1, quester, quester, ROT90, "Namco", "Quester (Japan)", 0 )
	2716	GAME( 1987, questers, quester, ns1, quester, quester, ROT90, "Namco", "Quester Special Edition (Japan)", 0 )
2686	2717	GAME( 1987, pacmania, 0, ns1, pacmania, pacmania, ROT270, "Namco", "Pac-Mania", 0 )
2687	2718	GAME( 1987, pacmaniaj,pacmania, ns1, pacmania, pacmania, ROT90, "Namco", "Pac-Mania (Japan)", 0 )
2688	2719	GAME( 1987, galaga88, 0, ns1, galaga88, galaga88, ROT270, "Namco", "Galaga '88", 0 )

src/mame/drivers/galdrvr.c
r9812	r9813
1		/*************************************
	1	/*************************************
2	2	*
3	3	* Input Ports
4	4	* Galaxian-derived games
r9812	r9813
2306	2306	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
2307	2307
2308	2308	PORT_START("IN1")
2309		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) )
	2309	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("H2:2")
2310	2310	PORT_DIPSETTING( 0x00, DEF_STR( No ) )
2311	2311	PORT_DIPSETTING( 0x01, "4 Times" )
2312		PORT_DIPNAME( 0x02, 0x00, DEF_STR( Lives ) )
	2312	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("H2:1")
2313	2313	PORT_DIPSETTING( 0x00, "3" )
2314	2314	PORT_DIPSETTING( 0x02, "4" )
2315	2315	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
r9812	r9813
2321	2321
2322	2322	PORT_START("IN2")
2323	2323	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
2324		PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) ) /* see notes */
	2324	PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H2:4,5") /* see notes */
2325	2325	PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
2326	2326	PORT_DIPSETTING( 0x06, DEF_STR( 4C_3C ) )
2327	2327	PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
2328	2328	PORT_DIPSETTING( 0x00, "99 Credits" )
2329		PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) )
	2329	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("H2:3")
2330	2330	PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
2331	2331	PORT_DIPSETTING( 0x08, DEF_STR( Cocktail ) )
2332	2332	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
r9812	r9813
2343	2343	PORT_INCLUDE(scobra)
2344	2344
2345	2345	PORT_MODIFY("IN1")
2346		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) )
	2346	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("H2:2")
2347	2347	PORT_DIPSETTING( 0x00, DEF_STR( No ) )
2348	2348	PORT_DIPSETTING( 0x01, "255 Times" )
2349		PORT_DIPNAME( 0x02, 0x00, DEF_STR( Lives ) )
	2349	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("H2:1")
2350	2350	PORT_DIPSETTING( 0x00, "3" )
2351	2351	PORT_DIPSETTING( 0x02, "5" )
2352	2352	INPUT_PORTS_END
r9812	r9813
2652	2652	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
2653	2653
2654	2654	PORT_START("IN1")
2655		PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) )
	2655	PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("H2:1,2")
2656	2656	PORT_DIPSETTING( 0x01, "3" )
2657	2657	PORT_DIPSETTING( 0x02, "5" )
2658	2658	PORT_DIPSETTING( 0x03, DEF_STR( Free_Play ) ) /* see notes */
r9812	r9813
2666	2666
2667	2667	PORT_START("IN2")
2668	2668	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
2669		PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) )
	2669	PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H2:4,5")
2670	2670	PORT_DIPSETTING( 0x02, "A 1/1 B 1/1" )
2671	2671	PORT_DIPSETTING( 0x00, "A 1/2 B 2/1" )
2672	2672	PORT_DIPSETTING( 0x04, "A 1/3 B 3/1" )
2673	2673	PORT_DIPSETTING( 0x06, "A 1/4 B 4/1" )
2674		PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) /* see notes */
	2674	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("H2:3") /* see notes */
2675	2675	PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
2676	2676	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
2677	2677	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
r9812	r9813
4742	4742
4743	4743	ROM_REGION( 0x2000, "samples", 0 ) /* samples */
4744	4744	ROM_LOAD( "my07", 0x0000, 0x1000, CRC(522a2920) SHA1(a64d821a8ff6bd6e2b0bdb1e632181e65a97363b) )
4745		ROM_LOAD( "my06~~.4r~~", 0x1000, 0x1000, CRC(4162~~be4~~d) SHA1(8~~4fa~~8651796e4~~98a~~37893ea90ef~~51b~~274c~~70e568~~) )
	4745	ROM_LOAD( "my06", 0x1000, 0x1000, CRC(6d2dd711) SHA1(82e7c7b10258f651943173c968c7fa2bdf937ca9) )
4746	4746	ROM_END
4747	4747
4748	4748	ROM_START( mshuttlej2 )
r9812	r9813
6140	6140	GAME( 1982, monsterz, 0, sfx, sfx, sfx, ORIENTATION_FLIP_X, "Nihon Game", "Monster Zero", GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND \| GAME_NOT_WORKING )
6141	6141
6142	6142
6143		/* scobra */
	6143	/*
	6144	Super Cobra
	6145
	6146	CPU/Video Board: A969
	6147	Sound Board: A970
	6148	*/
6144	6149	GAME( 1981, scobra, 0, scobra, scobra, scobra, ROT90, "Konami", "Super Cobra", GAME_SUPPORTS_SAVE )
6145	6150	GAME( 1981, scobrase, scobra, scobra, scobra, scobra, ROT90, "Konami (Sega license)", "Super Cobra (Sega)", GAME_SUPPORTS_SAVE )
6146	6151	GAME( 1981, scobras, scobra, scobra, scobras, scobra, ROT90, "Konami (Stern Electronics license)", "Super Cobra (Stern Electronics)", GAME_SUPPORTS_SAVE )
r9812	r9813
6155	6160
6156	6161	GAME( 1982, tazmania, 0, scobra, tazmania, scobra, ROT90, "Stern Electronics", "Tazz-Mania (set 1)", GAME_SUPPORTS_SAVE )
6157	6162
	6163	/*
	6164	Anteater
	6165
	6166	CPU/Video Board: A969 (Has various wire mods)
	6167	Sound Board: A970
	6168	*/
6158	6169	GAME( 1982, anteater, 0, anteater, anteater, anteater, ROT90, "Stern Electronics (Tago license)", "Anteater", GAME_SUPPORTS_SAVE )
6159	6170
6160	6171	GAME( 1982, calipso, 0, scobra, calipso, calipso, ROT90, "Stern Electronics (Tago license)", "Calipso", GAME_SUPPORTS_SAVE )
6161	6172
	6173	/*
	6174	Lost Tomb
	6175
	6176	CPU/Video Board: A969 (Has various wire mods)
	6177	Sound Board: A2048
	6178	*/
6162	6179	GAME( 1982, losttomb, 0, scobra, losttomb, losttomb, ROT90, "Stern Electronics", "Lost Tomb (easy)", GAME_SUPPORTS_SAVE )
6163	6180	GAME( 1982, losttombh, losttomb, scobra, losttomb, losttomb, ROT90, "Stern Electronics", "Lost Tomb (hard)", GAME_SUPPORTS_SAVE )
6164	6181

src/mame/drivers/vsnes.c
r9812	r9813
1790	1790	1B or 6B e
1791	1791	*/
1792	1792
1793		ROM_START( suprmrio )
	1793	ROM_START( suprmrio ) /* Vs. Super Mario Bros. (Set ?) */
1794	1794	ROM_REGION( 0x10000,"maincpu", 0 ) /* 6502 memory */
1795		ROM_LOAD( "mds-sm4.1d", 0x8000, 0x2000, CRC(be4d5436) SHA1(08162a7c987f1939d09bebdb676f596c86abf465) )
1796		ROM_LOAD( "mds-sm4.1c", 0xa000, 0x2000, CRC(0011fc5a) SHA1(5c2c49938a12affc03e64e5bdab307998be20020) )
1797		ROM_LOAD( "mds-sm4.1b", 0xc000, 0x2000, CRC(b1b87893) SHA1(8563ceaca664cf4495ef1020c07179ca7e4af9f3) )
1798		ROM_LOAD( "mds-sm4.1a", 0xe000, 0x2000, CRC(1abf053c) SHA1(f17db88ce0c9bf1ed88dc16b9650f11d10835cec) )
	1795	ROM_LOAD( "mds-sm4.1d or 6d", 0x8000, 0x2000, CRC(be4d5436) SHA1(08162a7c987f1939d09bebdb676f596c86abf465) )
	1796	ROM_LOAD( "mds-sm4.1c or 6c", 0xa000, 0x2000, CRC(0011fc5a) SHA1(5c2c49938a12affc03e64e5bdab307998be20020) )
	1797	ROM_LOAD( "mds-sm4.1b or 6b", 0xc000, 0x2000, CRC(b1b87893) SHA1(8563ceaca664cf4495ef1020c07179ca7e4af9f3) )
	1798	ROM_LOAD( "mds-sm4.1a or 6a", 0xe000, 0x2000, CRC(1abf053c) SHA1(f17db88ce0c9bf1ed88dc16b9650f11d10835cec) )
1799	1799
1800	1800	ROM_REGION( 0x4000,"gfx1", 0 ) /* PPU memory */
1801		ROM_LOAD( "mds-sm4.2b", 0x0000, 0x2000, CRC(42418d40) SHA1(22ab61589742cfa4cc6856f7205d7b4b8310bc4d) )
1802		ROM_LOAD( "mds-sm4.2a", 0x2000, 0x2000, CRC(15506b86) SHA1(69ecf7a3cc8bf719c1581ec7c0d68798817d416f) )
	1801	ROM_LOAD( "mds-sm4.2b or 8b", 0x0000, 0x2000, CRC(42418d40) SHA1(22ab61589742cfa4cc6856f7205d7b4b8310bc4d) )
	1802	ROM_LOAD( "mds-sm4.2a or 8a", 0x2000, 0x2000, CRC(15506b86) SHA1(69ecf7a3cc8bf719c1581ec7c0d68798817d416f) )
1803	1803
1804	1804	PALETTE_2C04_0004
1805	1805	ROM_END
1806	1806
1807		ROM_START( suprmrioa )
	1807	ROM_START( suprmrioa ) /* Vs. Super Mario Bros. (Set E) */
1808	1808	ROM_REGION( 0x10000,"maincpu", 0 ) /* 6502 memory */
1809		ROM_LOAD( "mds-sm4.1d", 0x8000, 0x2000, CRC(be4d5436) SHA1(08162a7c987f1939d09bebdb676f596c86abf465) )
1810		ROM_LOAD( "mds-sm4.1c", 0xa000, 0x2000, CRC(5e3fb550) SHA1(de4494e4dd52f7f7b04cf1d9019fd89fb90eaca9) ) /* this rom differs by TWO BYTES from the other version in suprmrio. this version has been dumped/observed on two known boards and one anonymous board */
1811		ROM_LOAD( "mds-sm4.1b", 0xc000, 0x2000, CRC(b1b87893) SHA1(8563ceaca664cf4495ef1020c07179ca7e4af9f3) )
1812		ROM_LOAD( "mds-sm4.1a", 0xe000, 0x2000, CRC(1abf053c) SHA1(f17db88ce0c9bf1ed88dc16b9650f11d10835cec) )
	1809	ROM_LOAD( "mds-sm4-4 e.1d or 6d", 0x8000, 0x2000, CRC(be4d5436) SHA1(08162a7c987f1939d09bebdb676f596c86abf465) )
	1810	ROM_LOAD( "mds-sm4-4 e.1c or 6c", 0xa000, 0x2000, CRC(5e3fb550) SHA1(de4494e4dd52f7f7b04cf1d9019fd89fb90eaca9) ) /* this rom differs by TWO BYTES from the other version in suprmrio. this version has been dumped/observed on two known boards and one anonymous board */
	1811	ROM_LOAD( "mds-sm4-4 e.1b or 6b", 0xc000, 0x2000, CRC(b1b87893) SHA1(8563ceaca664cf4495ef1020c07179ca7e4af9f3) )
	1812	ROM_LOAD( "mds-sm4-4 e.1a or 6a", 0xe000, 0x2000, CRC(1abf053c) SHA1(f17db88ce0c9bf1ed88dc16b9650f11d10835cec) )
1813	1813
1814	1814	ROM_REGION( 0x4000,"gfx1", 0 ) /* PPU memory */
1815		ROM_LOAD( "mds-sm4.2b", 0x0000, 0x2000, CRC(42418d40) SHA1(22ab61589742cfa4cc6856f7205d7b4b8310bc4d) )
1816		ROM_LOAD( "mds-sm4.2a", 0x2000, 0x2000, CRC(15506b86) SHA1(69ecf7a3cc8bf719c1581ec7c0d68798817d416f) )
	1815	ROM_LOAD( "mds-sm4-4 e.2b or 8b", 0x0000, 0x2000, CRC(42418d40) SHA1(22ab61589742cfa4cc6856f7205d7b4b8310bc4d) )
	1816	ROM_LOAD( "mds-sm4-4 e.2a or 8a", 0x2000, 0x2000, CRC(15506b86) SHA1(69ecf7a3cc8bf719c1581ec7c0d68798817d416f) )
1817	1817
1818	1818	PALETTE_2C04_0004
1819	1819	ROM_END
r9812	r9813
2249	2249
2250	2250	ROM_START( cstlevna )
2251	2251	ROM_REGION( 0x30000,"maincpu", 0 ) /* 6502 memory */
2252		ROM_LOAD( "mds-cv.~~prg~~", 0x10000, 0x20000, CRC(ffbef374) SHA1(9eb3b75e7b45df51b8bcd29df84689a7e8557f4f) )
	2252	ROM_LOAD( "mds-cv.u7", 0x10000, 0x20000, CRC(ffbef374) SHA1(9eb3b75e7b45df51b8bcd29df84689a7e8557f4f) )
2253	2253
2254	2254	/* No cart gfx - uses vram */
2255	2255
r9812	r9813
2629	2629	GAME( 1985, machridrj,machridr, vsnes, machridj, vsnormal, ROT0, "Nintendo", "Vs. Mach Rider (Japan, Fighting Course Version)", GAME_IMPERFECT_GRAPHICS )
2630	2630	GAME( 1986, rbibb, 0, vsnes, rbibb, rbibb, ROT0, "Namco", "Vs. Atari R.B.I. Baseball (set 1)", 0 )
2631	2631	GAME( 1986, rbibba, rbibb, vsnes, rbibb, rbibb, ROT0, "Namco", "Vs. Atari R.B.I. Baseball (set 2)", 0 )
2632		GAME( 1986, suprmrio, 0, vsnes, suprmrio, vsnormal, ROT0, "Nintendo", "Vs. Super Mario Bros.", 0 )
2633		GAME( 1986, suprmrioa,suprmrio, vsnes, suprmrio, vsnormal, ROT0, "Nintendo", "Vs. Super Mario Bros. (alt)", 0 )
	2632	GAME( 1986, suprmrio, 0, vsnes, suprmrio, vsnormal, ROT0, "Nintendo", "Vs. Super Mario Bros. (Set ?)", 0 )
	2633	GAME( 1986, suprmrioa,suprmrio, vsnes, suprmrio, vsnormal, ROT0, "Nintendo", "Vs. Super Mario Bros. (Set E)", 0 )
2634	2634	GAME( 1986, suprmriobl,suprmrio,vsnes, suprmrio, vsnormal, ROT0, "bootleg", "Vs. Super Mario Bros. (bootleg with Z80, set 1)", GAME_NOT_WORKING )
2635	2635	GAME( 1986, suprmriobl2,suprmrio,vsnes, suprmrio, vsnormal, ROT0, "bootleg", "Vs. Super Mario Bros. (bootleg with Z80, set 2)", GAME_NOT_WORKING )
2636	2636	GAME( 1988, skatekds, suprmrio, vsnes, suprmrio, vsnormal, ROT0, "hack", "Vs. Skate Kids. (Graphic hack of Super Mario Bros.)", 0 )

src/mame/drivers/missile.c
r9812	r9813
325	325	as well as set 2. Missile Command set 1 will not work with the SMA board. It would
326	326	appear set 1 and set 2 as labeled by mame are reversed.
327	327
	328	****************************************************************************
	329
	330	Super Missile Attack Board Layout
	331
	332	\|-------------------------------\|
	333	\| \|
	334	A \| 2716 74LS138 2716 \|
	335	\| \|
	336	B \| 2716 63S141 63S141 2716 \|
	337	\| \|
	338	C \| 2716 2716 \|
	339	\| PAL \|
	340	D \| HDR28 2716 \|
	341	\| 74148 \|
	342	E \| HDR28 2716 \|
	343	\| \|
	344	\|-------------------------------\|
	345
	346	1 2 3 4 5
	347
328	348	*****************************************************************************************/
329	349
330	350	#include "emu.h"
r9812	r9813
1034	1054
1035	1055	ROM_START( missile )
1036	1056	ROM_REGION( 0x8000, "maincpu", 0 )
1037		ROM_LOAD( "035820.02", 0x5000, 0x0800, CRC(7a62ce6a) SHA1(9a39978138dc28fdefe193bfae1b226391e471db) )
1038		ROM_LOAD( "035821.02", 0x5800, 0x0800, CRC(df3bd57f) SHA1(0916925d3c94d766d33f0e4badf6b0add835d748) )
1039		ROM_LOAD( "035822.02", 0x6000, 0x0800, CRC(a1cd384a) SHA1(a1dd0953423750a0fbc6e3dccbf2ca64ef5a1f54) )
1040		ROM_LOAD( "035823.02", 0x6800, 0x0800, CRC(82e552bb) SHA1(d0f22894f779c74ceef644c9f03d840d9545efea) )
1041		ROM_LOAD( "035824.02", 0x7000, 0x0800, CRC(606e42e0) SHA1(9718f84a73c66b4e8ef7805a7ab638a7380624e1) )
1042		ROM_LOAD( "035825.02", 0x7800, 0x0800, CRC(f752eaeb) SHA1(0339a6ce6744d2091cc7e07675e509b202b0f380) )
	1057	ROM_LOAD( "035820-02.h1", 0x5000, 0x0800, CRC(7a62ce6a) SHA1(9a39978138dc28fdefe193bfae1b226391e471db) )
	1058	ROM_LOAD( "035821-02.jk1", 0x5800, 0x0800, CRC(df3bd57f) SHA1(0916925d3c94d766d33f0e4badf6b0add835d748) )
	1059	ROM_LOAD( "035822-02.kl1", 0x6000, 0x0800, CRC(a1cd384a) SHA1(a1dd0953423750a0fbc6e3dccbf2ca64ef5a1f54) )
	1060	ROM_LOAD( "035823-02.ln1", 0x6800, 0x0800, CRC(82e552bb) SHA1(d0f22894f779c74ceef644c9f03d840d9545efea) )
	1061	ROM_LOAD( "035824-02.np1", 0x7000, 0x0800, CRC(606e42e0) SHA1(9718f84a73c66b4e8ef7805a7ab638a7380624e1) )
	1062	ROM_LOAD( "035825-02.r1", 0x7800, 0x0800, CRC(f752eaeb) SHA1(0339a6ce6744d2091cc7e07675e509b202b0f380) )
1043	1063
1044	1064	ROM_REGION( 0x0020, "proms", 0 )
1045		ROM_LOAD( "035826.01", 0x0000, 0x0020, CRC(86a22140) SHA1(2beebf7855e29849ada1823eae031fc98220bc43) )
	1065	ROM_LOAD( "035826-01.l6", 0x0000, 0x0020, CRC(86a22140) SHA1(2beebf7855e29849ada1823eae031fc98220bc43) )
1046	1066	ROM_END
1047	1067
1048	1068
r9812	r9813
1051	1071	ROM_LOAD( "35820-01.h1", 0x5000, 0x0800, CRC(41cbb8f2) SHA1(5dcb58276c08d75d36baadb6cefe30d4916de9b0) )
1052	1072	ROM_LOAD( "35821-01.jk1", 0x5800, 0x0800, CRC(728702c8) SHA1(6f25af7133d3ec79029117162649f94e93f36e0e) )
1053	1073	ROM_LOAD( "35822-01.kl1", 0x6000, 0x0800, CRC(28f0999f) SHA1(eb52b11c6757c8dc3be88b276ea4dc7dfebf7cf7) )
1054		ROM_LOAD( "35823-01.mn1", 0x6800, 0x0800, CRC(bcc93c94) SHA1(f0daa5d2835a856e2038612e755dc7ded28fc923) )
	1074	ROM_LOAD( "35823-01.ln1", 0x6800, 0x0800, CRC(bcc93c94) SHA1(f0daa5d2835a856e2038612e755dc7ded28fc923) )
1055	1075	ROM_LOAD( "35824-01.np1", 0x7000, 0x0800, CRC(0ca089c8) SHA1(7f69ee990fd4fa1f2fceca7fc66fcaa02e4d2314) )
1056	1076	ROM_LOAD( "35825-01.r1", 0x7800, 0x0800, CRC(428cf0d5) SHA1(03cabbef50c33852fbbf38dd3eecaf70a82df82f) )
1057	1077
1058	1078	ROM_REGION( 0x0020, "proms", 0 )
1059		ROM_LOAD( "035826.01", 0x0000, 0x0020, CRC(86a22140) SHA1(2beebf7855e29849ada1823eae031fc98220bc43) )
	1079	ROM_LOAD( "035826-01.l6", 0x0000, 0x0020, CRC(86a22140) SHA1(2beebf7855e29849ada1823eae031fc98220bc43) )
1060	1080	ROM_END
1061	1081
1062	1082
1063	1083	ROM_START( suprmatk )
1064		ROM_REGION( 0x9000, "maincpu", 0 )
1065		ROM_LOAD( "035820.02", 0x5000, 0x0800, CRC(7a62ce6a) SHA1(9a39978138dc28fdefe193bfae1b226391e471db) )
1066		ROM_LOAD( "035821.02", 0x5800, 0x0800, CRC(df3bd57f) SHA1(0916925d3c94d766d33f0e4badf6b0add835d748) )
1067		ROM_LOAD( "035822.02", 0x6000, 0x0800, CRC(a1cd384a) SHA1(a1dd0953423750a0fbc6e3dccbf2ca64ef5a1f54) )
1068		ROM_LOAD( "035823.02", 0x6800, 0x0800, CRC(82e552bb) SHA1(d0f22894f779c74ceef644c9f03d840d9545efea) )
1069		ROM_LOAD( "035824.02", 0x7000, 0x0800, CRC(606e42e0) SHA1(9718f84a73c66b4e8ef7805a7ab638a7380624e1) )
1070		ROM_LOAD( "035825.02", 0x7800, 0x0800, CRC(f752eaeb) SHA1(0339a6ce6744d2091cc7e07675e509b202b0f380) )
1071		ROM_LOAD( "e0.rom", 0x8000, 0x0800, CRC(d0b20179) SHA1(e2a9855899b6ff96b8dba169e0ab83f00a95919f) )
1072		ROM_LOAD( "e1.rom", 0x8800, 0x0800, CRC(c6c818a3) SHA1(b9c92a85c07dd343d990e196d37b92d92a85a5e0) )
	1084	ROM_REGION( 0x9000, "maincpu", 0 ) /* ROM's located on the enhancement board */
	1085	ROM_LOAD( "035820-02.c1", 0x5000, 0x0800, CRC(7a62ce6a) SHA1(9a39978138dc28fdefe193bfae1b226391e471db) )
	1086	ROM_LOAD( "035821-02.b1", 0x5800, 0x0800, CRC(df3bd57f) SHA1(0916925d3c94d766d33f0e4badf6b0add835d748) )
	1087	ROM_LOAD( "035822-02.a1", 0x6000, 0x0800, CRC(a1cd384a) SHA1(a1dd0953423750a0fbc6e3dccbf2ca64ef5a1f54) )
	1088	ROM_LOAD( "035823-02.a5", 0x6800, 0x0800, CRC(82e552bb) SHA1(d0f22894f779c74ceef644c9f03d840d9545efea) )
	1089	ROM_LOAD( "035824-02.b5", 0x7000, 0x0800, CRC(606e42e0) SHA1(9718f84a73c66b4e8ef7805a7ab638a7380624e1) )
	1090	ROM_LOAD( "035825-02.c5", 0x7800, 0x0800, CRC(f752eaeb) SHA1(0339a6ce6744d2091cc7e07675e509b202b0f380) )
	1091	ROM_LOAD( "e0.d5", 0x8000, 0x0800, CRC(d0b20179) SHA1(e2a9855899b6ff96b8dba169e0ab83f00a95919f) )
	1092	ROM_LOAD( "e1.e5", 0x8800, 0x0800, CRC(c6c818a3) SHA1(b9c92a85c07dd343d990e196d37b92d92a85a5e0) )
1073	1093
1074		ROM_REGION( 0x0020, "proms", 0 )
1075		ROM_LOAD( "035826.01", 0x0000, 0x0020, CRC(86a22140) SHA1(2beebf7855e29849ada1823eae031fc98220bc43) )
	1094	ROM_REGION( 0x0020, "proms", 0 ) /* PROM located on the Missile Command board */
	1095	ROM_LOAD( "035826-01.l6", 0x0000, 0x0020, CRC(86a22140) SHA1(2beebf7855e29849ada1823eae031fc98220bc43) )
	1096
	1097	ROM_REGION( 0x0200, "proms2", 0 ) /* 63S141 PROMs located on the enhancement board */
	1098	ROM_LOAD( "63s141.b2", 0x0000, 0x0100, CRC(2de8ee4d) SHA1(ff28c007df9c52227dfce76af6f7b1dfac3c2296) )
	1099	ROM_LOAD( "63s141.b4", 0x0100, 0x0100, CRC(390fc532) SHA1(f9adde3f18f3db225ac3f3771c38ff139ef0a65e) )
1076	1100	ROM_END
1077	1101
1078	1102
r9812	r9813
1086	1110	ROM_LOAD( "035825.sma", 0x7800, 0x0800, CRC(1298213d) SHA1(c8e4301704e3700c339557f2a833e70f6a068d5e) )
1087	1111
1088	1112	ROM_REGION( 0x0020, "proms", 0 )
1089		ROM_LOAD( "035826.01", 0x0000, 0x0020, CRC(86a22140) SHA1(2beebf7855e29849ada1823eae031fc98220bc43) )
	1113	ROM_LOAD( "035826-01.l6", 0x0000, 0x0020, CRC(86a22140) SHA1(2beebf7855e29849ada1823eae031fc98220bc43) )
1090	1114	ROM_END
1091	1115
1092	1116

src/mame/drivers/m72.c
r9812	r9813
2318	2318	static MACHINE_CONFIG_START( cosmccop, driver_device )
2319	2319
2320	2320	/* basic machine hardware */
2321		MDRV_CPU_ADD("maincpu", V30,MASTER_CLOCK/2/2)
	2321	MDRV_CPU_ADD("maincpu", V35,MASTER_CLOCK/2/2)
2322	2322	MDRV_CPU_PROGRAM_MAP(kengo_map)
2323	2323	MDRV_CPU_IO_MAP(kengo_portmap)
2324	2324

src/mame/drivers/legionna.c
r9812	r9813
17	17	TODO
18	18	----
19	19
20		Unemulated prote~~ction~~ me~~sses~~ up both games.
	20	Check work RAM boundaries, they are likely to be too generous right now
21	21
22		Sound System isn't working properly, hangs / denjinmk isn't happy with status without a hack
23	22
24
25	23	Legionnaire
26	24	-----------
27	25
28		Foreground tiles screwy (screen after character selection screen).
29
30	26	Need 16 px off top of vis area?
31	27
32		The 0x104000 area appears to be extra paletteram?
33	28
34
35	29	Denjin Makai
36	30	------------
37	31
38		Palette Ram format correct,but color offset wrong?
39		Probably protection related,game updates paletteram with rom data (or bad program rom?)..
	32	- Palette Ram format correct,but color offset wrong? Probably protection related,game updates paletteram with rom data (or bad program rom?)..
40	33
41		Need a sound kludge to start.
	34	- Needs to patch a sound-related comm to make this to work, same as SD Gundam Psycho Salamander No Kyoui (68k never writes to port 6 for whatever reason).
42	35
	36	- There are a bunch of unemulated registers, one of them seems to be a brightness control of some sort. Needs a PCB side-by-side test.
43	37
	38	- backdrop color is ugly, especially noticeable in the port harbour stage (level 4). It should be dark blue or black but it's currently grey.
	39
	40	- there are some ROM writes from time to time, could be a coding bug or something related to the protection.
	41
44	42	Godzilla
45	43	--------
46	44
r9812	r9813
89	87	AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
90	88	AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
91	89	AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
92		AM_RANGE(0x104000, 0x104fff) AM_RAM /* T~~he 4000-4fff~~ are~~a con~~ta~~ins PALETTE~~ words a~~nd may b~~e extra palette~~ram~~? */
	90	AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) /* palette xRRRRxGGGGxBBBBx ? */
93	91	AM_RANGE(0x105000, 0x105fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
94		AM_RANGE(0x106000, 0x106fff) AM_RAM /* is this used outside inits ?? */
95		AM_RANGE(0x107000, 0x107fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) /* palette xRRRRxGGGGxBBBBx ? */
	92	AM_RANGE(0x106000, 0x107fff) AM_RAM
96	93	AM_RANGE(0x108000, 0x11ffff) AM_RAM /* main ram */
97	94	ADDRESS_MAP_END
98	95
r9812	r9813
144	141	AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
145	142	AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
146	143	AM_RANGE(0x102800, 0x103fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
147		AM_RANGE(0x104000, 0x104fff) AM_RAM
	144	AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
148	145	AM_RANGE(0x105000, 0x105fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
149	146	AM_RANGE(0x106000, 0x107fff) AM_RAM
150	147	AM_RANGE(0x108000, 0x11dfff) AM_RAM
151		AM_RANGE(0x11e000, 0x11efff) AM_RAM~~_WRITE(denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)~~
	148	AM_RANGE(0x11e000, 0x11efff) AM_RAM
152	149	AM_RANGE(0x11f000, 0x11ffff) AM_RAM
153	150	ADDRESS_MAP_END
154	151
r9812	r9813
177	174	AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
178	175	AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
179	176	AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
180		AM_RANGE(0x104000, 0x104fff) AM_RAM~~_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) /<according to the debug mode,there is a DMA that copies from here to the paletteram>/~~
	177	AM_RANGE(0x104000, 0x104fff) AM_RAM
181	178	AM_RANGE(0x105000, 0x106fff) AM_RAM
182	179	AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
183	180	AM_RANGE(0x107800, 0x107fff) AM_RAM /Ani Dsp(?) Ram/
184	181	AM_RANGE(0x108000, 0x10ffff) AM_RAM
185	182	AM_RANGE(0x110000, 0x119fff) AM_RAM
186		AM_RANGE(0x11a000, 0x11dfff) AM_RAM~~//AM_READWRITE(copdxbl_1_r,copdxbl_1_w) AM_BASE(&work_ram)/shared with the COP MCU too!/~~
	183	AM_RANGE(0x11a000, 0x11dfff) AM_RAM
187	184	AM_RANGE(0x11e000, 0x11ffff) AM_RAM /Stack Ram/
188	185	ADDRESS_MAP_END
189	186
	187	static ADDRESS_MAP_START( cupsocs_mem, ADDRESS_SPACE_PROGRAM, 16 )
	188	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	189	AM_RANGE(0x100000, 0x1003ff) AM_RAM
	190	AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(cupsocs_mcu_r,cupsocs_mcu_w) AM_BASE(&cop_mcu_ram)
	191	AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
	192	AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
	193	AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
	194	AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
	195	AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
	196	AM_RANGE(0x104000, 0x104fff) AM_RAM
	197	AM_RANGE(0x105000, 0x106fff) AM_RAM
	198	AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
	199	AM_RANGE(0x107800, 0x107fff) AM_RAM /Ani Dsp(?) Ram/
	200	AM_RANGE(0x108000, 0x10ffff) AM_RAM
	201	AM_RANGE(0x110000, 0x119fff) AM_RAM
	202	AM_RANGE(0x11a000, 0x11dfff) AM_RAM
	203	AM_RANGE(0x11e000, 0x11ffff) AM_RAM /Stack Ram/
	204	ADDRESS_MAP_END
	205
190	206	static ADDRESS_MAP_START( cupsocbl_mem, ADDRESS_SPACE_PROGRAM, 16 )
191	207	AM_RANGE(0x000000, 0x0fffff) AM_ROM
192	208	//AM_RANGE(0x100000, 0x1003ff) AM_RAM
r9812	r9813
196	212	AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
197	213	AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
198	214	AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
199		AM_RANGE(0x104000, 0x104fff) AM_RAM~~_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) /<according to the debug mode,there is a DMA that copies from here to the paletteram>/~~
	215	AM_RANGE(0x104000, 0x104fff) AM_RAM
200	216	AM_RANGE(0x105000, 0x106fff) AM_RAM
201	217	AM_RANGE(0x107000, 0x1077ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
202	218	AM_RANGE(0x107800, 0x107fff) AM_RAM /Ani Dsp(?) Ram/
203	219	AM_RANGE(0x108000, 0x10ffff) AM_RAM
204	220	AM_RANGE(0x110000, 0x119fff) AM_RAM
205		AM_RANGE(0x11a000, 0x11dfff) AM_RAM~~//AM_READWRITE(copdxbl_1_r,copdxbl_1_w) AM_BASE(&work_ram)/shared with the COP MCU too!/~~
	221	AM_RANGE(0x11a000, 0x11dfff) AM_RAM
206	222	AM_RANGE(0x11e000, 0x11ffff) AM_RAM /Stack Ram/
207	223	ADDRESS_MAP_END
208	224
r9812	r9813
668	684	INPUT_PORTS_END
669	685
670	686	static INPUT_PORTS_START( denjinmk )
671		SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
	687	PORT_START("COIN") /* coin inputs read through sound cpu, an impulse of 4 frame is too much for this game, especially for coin 2 */
	688	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2)
	689	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(2)
672	690
673	691	PORT_START("DSW1")
674	692	PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
r9812	r9813
686	704	PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
687	705	PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
688	706	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
689		PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
690		PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
691		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
692		PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
693		PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
694		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
695		PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Service_Mode ) )
696		PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
697		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	707	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) )
	708	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	709	PORT_DIPSETTING( 0x0020, DEF_STR( On ) )
	710	PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
	711	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Language ) ) //it actually skips the story entirely, so just remain JP as default
	712	PORT_DIPSETTING( 0x0080, DEF_STR( Japanese ) )
	713	PORT_DIPSETTING( 0x0000, DEF_STR( English ) )
698	714
699	715	PORT_DIPNAME( 0x0f00, 0x0f00, DEF_STR( Coin_A ) )
700	716	PORT_DIPSETTING( 0x0200, DEF_STR( 4C_1C ) )
701	717	PORT_DIPSETTING( 0x0500, DEF_STR( 3C_1C ) )
702	718	PORT_DIPSETTING( 0x0800, DEF_STR( 2C_1C ) )
703		PORT_DIPSETTING( 0x0600, "3c 5c" )
	719	PORT_DIPSETTING( 0x0600, "3 Coins / 5 Credits" )
704	720	PORT_DIPSETTING( 0x0400, DEF_STR( 3C_2C ) )
705	721	PORT_DIPSETTING( 0x0100, DEF_STR( 4C_3C ) )
706		PORT_DIPSETTING( 0x0f00, DEF_STR( 1C_1C ))
	722	PORT_DIPSETTING( 0x0f00, DEF_STR( 1C_1C ) )
707	723	PORT_DIPSETTING( 0x0300, DEF_STR( 3C_4C ) )
708	724	PORT_DIPSETTING( 0x0700, DEF_STR( 2C_3C ) )
709		PORT_DIPSETTING( 0x0e00, DEF_STR( 1C_2C ))
710		PORT_DIPSETTING( 0x0d00, DEF_STR( 1C_3C ))
711		PORT_DIPSETTING( 0x0c00, DEF_STR( 1C_4C ))
712		PORT_DIPSETTING( 0x0b00, DEF_STR( 1C_5C ))
713		PORT_DIPSETTING( 0x0a00, DEF_STR( 1C_6C ))
714		PORT_DIPSETTING( 0x0900, DEF_STR( 1C_7C ))
	725	PORT_DIPSETTING( 0x0e00, DEF_STR( 1C_2C ) )
	726	PORT_DIPSETTING( 0x0d00, DEF_STR( 1C_3C ) )
	727	PORT_DIPSETTING( 0x0c00, DEF_STR( 1C_4C ) )
	728	PORT_DIPSETTING( 0x0b00, DEF_STR( 1C_5C ) )
	729	PORT_DIPSETTING( 0x0a00, DEF_STR( 1C_6C ) )
	730	PORT_DIPSETTING( 0x0900, DEF_STR( 1C_7C ) )
715	731	PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) )
716	732	PORT_DIPNAME( 0xf000, 0xf000, DEF_STR( Coin_B ) )
	733	PORT_DIPSETTING( 0x2000, DEF_STR( 4C_1C ) )
	734	PORT_DIPSETTING( 0x5000, DEF_STR( 3C_1C ) )
	735	PORT_DIPSETTING( 0x8000, DEF_STR( 2C_1C ) )
	736	PORT_DIPSETTING( 0x6000, "3 Coins / 5 Credits" )
	737	PORT_DIPSETTING( 0x4000, DEF_STR( 3C_2C ) )
	738	PORT_DIPSETTING( 0x1000, DEF_STR( 4C_3C ) )
	739	PORT_DIPSETTING( 0xf000, DEF_STR( 1C_1C ) )
	740	PORT_DIPSETTING( 0x3000, DEF_STR( 3C_4C ) )
	741	PORT_DIPSETTING( 0x7000, DEF_STR( 2C_3C ) )
	742	PORT_DIPSETTING( 0xe000, DEF_STR( 1C_2C ) )
	743	PORT_DIPSETTING( 0xd000, DEF_STR( 1C_3C ) )
	744	PORT_DIPSETTING( 0xc000, DEF_STR( 1C_4C ) )
	745	PORT_DIPSETTING( 0xb000, DEF_STR( 1C_5C ) )
	746	PORT_DIPSETTING( 0xa000, DEF_STR( 1C_6C ) )
	747	PORT_DIPSETTING( 0x9000, DEF_STR( 1C_7C ) )
717	748	PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) )
718		PORT_DIPSETTING( 0x1000, "1" )
719		PORT_DIPSETTING( 0x2000, "2" )
720		PORT_DIPSETTING( 0x3000, "3" )
721		PORT_DIPSETTING( 0x4000, "4" )
722		PORT_DIPSETTING( 0x5000, "5" )
723		PORT_DIPSETTING( 0x6000, "6" )
724		PORT_DIPSETTING( 0x7000, "7" )
725		PORT_DIPSETTING( 0x8000, "8" )
726		PORT_DIPSETTING( 0x9000, "9" )
727		PORT_DIPSETTING( 0xa000, "a" )
728		PORT_DIPSETTING( 0xb000, "b" )
729		PORT_DIPSETTING( 0xc000, "c" )
730		PORT_DIPSETTING( 0xd000, "d" )
731		PORT_DIPSETTING( 0xe000, "e" )
732		PORT_DIPSETTING( 0xf000, "f" )
733	749
734	750	PORT_START("PLAYERS12")
735	751	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
r9812	r9813
779	795	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
780	796
781	797	PORT_START("DSW2")
782		PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
783		PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
784		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
785		PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
786		PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
787		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
788		PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
789		PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
790		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
791		PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
792		PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
793		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
794		PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
795		PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
796		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
797		PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
798		PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
799		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
800		PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
801		PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
802		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
803		PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
804		PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
805		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
806		PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
807		PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
808		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
809		PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
810		PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
811		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
812		PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
813		PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
814		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
815		PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
816		PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
817		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
818		PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
819		PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
820		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
821		PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
822		PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
823		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
824		PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
825		PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
826		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
827		PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
828		PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
829		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	798	PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED ) //unused according to the test mode
830	799	INPUT_PORTS_END
831	800
832	801
r9812	r9813
997	966	128*8
998	967	};
999	968
	969	static const gfx_layout legionna_tilelayout2 =
	970	{
	971	16,16,
	972	RGN_FRAC(1,1),
	973	4,
	974	{ 04, 14, 24, 34 },
	975	{ 3, 2, 1, 0, 16+3, 16+2, 16+1, 16+0,
	976	648+3, 648+2, 648+1, 648+0, 648+16+3, 648+16+2, 648+16+1, 648+16+0 },
	977	{ 032, 132, 232, 332, 432, 532, 632, 732,
	978	832, 932, 1032, 1132, 1232, 1332, 1432, 1532 },
	979	128*8
	980	};
	981
1000	982	static const gfx_layout legionna_spritelayout =
1001	983	{
1002	984	16,16,
r9812	r9813
1011	993	};
1012	994
1013	995	static GFXDECODE_START( legionna )
1014		GFXDECODE_ENTRY( "gfx1", 0, legionna_new_charlayout, 48*16, 16 )
1015		GFXDECODE_ENTRY( "gfx3", 0, legionna_tilelayout, 0*16, 16 )
1016		GFXDECODE_ENTRY( "gfx4", 0, legionna_tilelayout, 32*16, 16 )
1017		GFXDECODE_ENTRY( "gfx2", 0, legionna_spritelayout, 016, 816 )
1018		GFXDECODE_ENTRY( "gfx5", 0, legionna_tilelayout, 32*16, 16 )
	996	GFXDECODE_ENTRY( "gfx1", 0, legionna_new_charlayout, 48*16, 16 )
	997	GFXDECODE_ENTRY( "gfx3", 0, legionna_tilelayout, 0*16, 16 )
	998	GFXDECODE_ENTRY( "gfx4", 0, legionna_tilelayout, 32*16, 16 )
	999	GFXDECODE_ENTRY( "gfx2", 0, legionna_spritelayout, 016, 816 )
	1000	GFXDECODE_ENTRY( "gfx5", 0, legionna_tilelayout2, 32*16, 16 )
1019	1001	GFXDECODE_ENTRY( "gfx6", 0, legionna_tilelayout, 16*16, 16 )
1020	1002	GFXDECODE_END
1021	1003
r9812	r9813
1028	1010	GFXDECODE_ENTRY( "gfx6", 0, legionna_tilelayout, 16*16, 16 )
1029	1011	GFXDECODE_END
1030	1012
	1013
	1014	static const gfx_layout cupsocsb_spritelayout =
	1015	{
	1016	16,16,
	1017	RGN_FRAC(1,1),
	1018	4,
	1019	{ 0,1,2,3 },
	1020	{ 4,0,12,8,20,16,28,24, 512+4, 512+0, 512+12, 512+8, 512+20, 512+16, 512+28, 512+24 },
	1021	{ 032, 132, 232, 332, 432, 532, 632, 732, 832, 932, 1032, 1132, 1232, 1332, 1432, 1532 },
	1022	32*32
	1023	};
	1024
	1025	static const gfx_layout cupsocsb_8x8_tilelayout =
	1026	{
	1027	8,8,
	1028	RGN_FRAC(1,1),
	1029	4,
	1030	{ 8,12,0,4 },
	1031	{ 0,3,2,1,16,19,18,17 },
	1032	{ 032, 132, 232, 332, 432, 532, 632, 732 },
	1033	8*32
	1034	};
	1035
	1036
	1037	static const gfx_layout cupsocsb_tilelayout =
	1038	{
	1039	16,16,
	1040	RGN_FRAC(1,1),
	1041	4,
	1042	{ 8,12,0,4 },
	1043	{ 0,3,2,1,16,19,18,17, 512+0,512+3,512+2,512+1,512+16,512+19,512+18,512+17 },
	1044	{ 032, 132, 232, 332, 432, 532, 632, 732, 832, 932, 1032, 1132, 1232, 1332, 1432, 1532 },
	1045	32*32
	1046	};
	1047
	1048
	1049	static GFXDECODE_START( heatbrl_csb )
	1050	GFXDECODE_ENTRY( "gfx1", 0, cupsocsb_8x8_tilelayout, 48*16, 16 )
	1051	GFXDECODE_ENTRY( "gfx3", 0, cupsocsb_tilelayout, 0*16, 16 )
	1052	GFXDECODE_ENTRY( "gfx4", 0, cupsocsb_tilelayout, 3216, 16 ) / unused */
	1053	GFXDECODE_ENTRY( "gfx2", 0, cupsocsb_spritelayout, 016, 816 )
	1054	GFXDECODE_ENTRY( "gfx5", 0, cupsocsb_tilelayout, 32*16, 16 )
	1055	GFXDECODE_ENTRY( "gfx6", 0, cupsocsb_tilelayout, 16*16, 16 )
	1056	GFXDECODE_END
	1057
	1058
1031	1059	static GFXDECODE_START( grainbow )
1032	1060	GFXDECODE_ENTRY( "gfx1", 0, legionna_new_charlayout, 48*16, 16 )
1033		GFXDECODE_ENTRY( "gfx3", 0, legionna_tilelayout, 0*16, 16 )
1034		GFXDECODE_ENTRY( "gfx4", 0, legionna_tilelayout, 3216, 16 ) / unused */
1035		GFXDECODE_ENTRY( "gfx2", 0, legionna_spritelayout, 016, 816 )
1036		GFXDECODE_ENTRY( "gfx5", 0, legionna_tilelayout, 32*16, 16 )
1037		GFXDECODE_ENTRY( "gfx6", 0, legionna_tilelayout, 16*16, 16 )
	1061	GFXDECODE_ENTRY( "gfx3", 0, legionna_tilelayout, 0*16, 16 )
	1062	GFXDECODE_ENTRY( "gfx4", 0, legionna_tilelayout, 3216, 16 ) / unused */
	1063	GFXDECODE_ENTRY( "gfx2", 0, legionna_spritelayout, 016, 816 )
	1064	GFXDECODE_ENTRY( "gfx5", 0, legionna_tilelayout, 32*16, 16 )
	1065	GFXDECODE_ENTRY( "gfx6", 0, legionna_tilelayout, 16*16, 16 )
1038	1066	GFXDECODE_END
1039	1067
1040	1068	/*****************************************************************************/
r9812	r9813
1227	1255	SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
1228	1256	MACHINE_CONFIG_END
1229	1257
	1258	static MACHINE_CONFIG_DERIVED( cupsocs, cupsoc )
	1259	MDRV_CPU_MODIFY("maincpu")
	1260	MDRV_CPU_PROGRAM_MAP(cupsocs_mem)
	1261	MACHINE_CONFIG_END
1230	1262
1231	1263	static MACHINE_CONFIG_START( cupsocbl, driver_device )
1232	1264
r9812	r9813
1253	1285	MDRV_SCREEN_SIZE(408, 328)
1254	1286	MDRV_SCREEN_VISIBLE_AREA(08, 408-1, 08, 328-1)
1255	1287
1256		MDRV_GFXDECODE(heatbrl)
	1288	MDRV_GFXDECODE(heatbrl_csb)
1257	1289	MDRV_PALETTE_LENGTH(128*16)
1258	1290
1259	1291	MDRV_VIDEO_START(cupsoc)
r9812	r9813
2023	2055	ROM_LOAD16_BYTE( "sc_05.bin", 0x00000, 0x80000, CRC(2f977dff) SHA1(4d8d6e7d06ce17bb7292072965911f8b1f1067e2) )
2024	2056
2025	2057	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code */
2026		/First part is full of $FF,a bad dump?/
2027	2058	ROM_LOAD( "sc_01.bin", 0x000000, 0x08000, CRC(cea39d6d) SHA1(f0b79c03ffafdd1e57673d6d4836becbe415110b) )
2028	2059	ROM_CONTINUE( 0x000000, 0x08000 )
2029	2060
2030		ROM_REGION( 0x020000, "gfx1", 0 )
2031		ROM_LOAD16_BYTE( "seibu6.7x", 0x000000, 0x010000, CRC(21c1e1b8) SHA1(30928c8ef98bf32ba0bf795ddadba1c95fcffe9d) )
2032		ROM_LOAD16_BYTE( "seibu5.7y", 0x000001, 0x010000, CRC(955d9fd7) SHA1(782451e8e85f7ba285d6cacd9d3fdcf48bde60bc) )
	2061	ROM_REGION( 0x200000, "gfx2", ROMREGION_INVERT ) /* bootleg sprite gfx */
	2062	ROM_LOAD( "sc_07.bin", 0x000000, 0x080000, CRC(dcb29d01) SHA1(72b4234622605f0ab03f21fdb6a61c6dac36000d) )
	2063	ROM_LOAD( "sc_06.bin", 0x080000, 0x080000, CRC(2dc70e05) SHA1(f1d0beb8428a7e1d7c7818e6719abdc543b2fa80) )
	2064	ROM_COPY( "gfx2", 0x00000, 0x100000, 0x100000 )
2033	2065
2034		ROM_REGION( 0x200000, "gfx2", 0 )
2035		ROM_LOAD( "obj.8c", 0x000000, 0x100000, CRC(e2377895) SHA1(1d1c7f31a08a464139cdaf383a5e1ade0717dc9f) )
2036		ROM_RELOAD( 0x100000, 0x100000 )
	2066	ROM_REGION( 0x200000, "test1", 0 ) /* bootleg tile gfx */
	2067	ROM_LOAD16_BYTE( "sc_09.bin", 0x000000, 0x080000, CRC(695b6342) SHA1(dfccb43789021ba2568b9284ae61e64f7f89b152) )
	2068	ROM_LOAD16_BYTE( "sc_10.bin", 0x000001, 0x080000, CRC(27e172b8) SHA1(ed86db2f42c8061607d46f2407b0130aaf692a02) )
	2069	ROM_LOAD16_BYTE( "sc_08.bin", 0x100000, 0x080000, CRC(637120f3) SHA1(b4b2ad192e46ff80d4cb440d7fb6dac215a353ed) )
	2070	ROM_LOAD16_BYTE( "sc_11.bin", 0x100001, 0x080000, CRC(0cd5ca5e) SHA1(a59665e543e9383355de2576e6693348ec356591) )
2037	2071
2038		ROM_REGION( 0x100000, "gfx3", 0 ) /* MBK tiles */
2039		ROM_LOAD( "back-1.4y", 0x000000, 0x100000, CRC(3dfea0ec) SHA1(8f41d267e488e07831946ef898d593897f10bfe2) )
	2072	ROM_REGION( 0x020000, "gfx1", ROMREGION_INVERT )
	2073	ROM_COPY( "test1", 0x080000, 0x00000, 0x020000 )
2040	2074
2041		ROM_REGION( 0x100000, "gfx4", 0 ) /* not used */
	2075	ROM_REGION( 0x100000, "gfx3", ROMREGION_INVERT ) /* MBK tiles */
	2076	ROM_COPY( "test1", 0x000000, 0x00000, 0x080000 )
	2077	ROM_COPY( "test1", 0x100000, 0x80000, 0x080000 )
	2078
	2079	ROM_REGION( 0x100000, "gfx4", ROMREGION_INVERT ) /* not used */
2042	2080	ROM_COPY("gfx3",0x00000,0x00000,0x100000)
2043	2081
2044		ROM_REGION( 0x080000, "gfx5", 0 ) /* BK3 tiles */
2045		ROM_LOAD( "back-2.6y", 0x000000, 0x080000, CRC(e07712af) SHA1(2a0285d6a1e0141838e898252b8d922a6263b05f) )
	2082	ROM_REGION( 0x080000, "gfx5", ROMREGION_INVERT ) /* BK3 tiles */
	2083	ROM_COPY( "test1", 0x180000, 0x00000, 0x080000 )
2046	2084
2047		ROM_REGION( 0x080000, "gfx6", 0 ) /* LBK tiles */
	2085	ROM_REGION( 0x080000, "gfx6", ROMREGION_INVERT ) /* LBK tiles */
2048	2086	ROM_COPY( "gfx5", 0x00000, 0x00000, 0x080000 )
2049	2087
2050		/bootleg GFX roms,for now load the original roms/
2051		ROM_REGION( 0x500000, "user2", 0 )
2052		ROM_LOAD( "sc_07.bin", 0x000000, 0x080000, CRC(dcb29d01) SHA1(72b4234622605f0ab03f21fdb6a61c6dac36000d) )
2053		ROM_LOAD( "sc_06.bin", 0x080000, 0x080000, CRC(2dc70e05) SHA1(f1d0beb8428a7e1d7c7818e6719abdc543b2fa80) )
2054		ROM_LOAD( "sc_13.bin", 0x100000, 0x010000, CRC(229bddd8) SHA1(0924bf29db9c5a970546f154e7752697fdce6a58) )
2055		ROM_LOAD( "sc_12.bin", 0x110000, 0x010000, CRC(dabfa826) SHA1(0db587c846755491b169ef7751ba8e7cdc2607e6) )
2056		ROM_LOAD( "sc_08.bin", 0x200000, 0x080000, CRC(637120f3) SHA1(b4b2ad192e46ff80d4cb440d7fb6dac215a353ed) )
2057		ROM_LOAD( "sc_09.bin", 0x280000, 0x080000, CRC(695b6342) SHA1(dfccb43789021ba2568b9284ae61e64f7f89b152) )
2058		ROM_LOAD( "sc_14.bin", 0x300000, 0x080000, CRC(566086c2) SHA1(b7d09ce978f99ecc0d1975b31330ed49317701d5) )
2059		ROM_LOAD( "sc_15.bin", 0x380000, 0x080000, CRC(8fd87e65) SHA1(acc9fd0289fa9ab60bec16d3e642039380e5180a) )
2060		ROM_LOAD( "sc_10.bin", 0x400000, 0x080000, CRC(27e172b8) SHA1(ed86db2f42c8061607d46f2407b0130aaf692a02) )
2061		ROM_LOAD( "sc_11.bin", 0x480000, 0x080000, CRC(0cd5ca5e) SHA1(a59665e543e9383355de2576e6693348ec356591) )
2062
2063	2088	ROM_REGION( 0x100000, "adpcm", ROMREGION_ERASEFF ) /* ADPCM samples */
2064	2089	ROM_LOAD( "sc_02.bin", 0x000000, 0x020000, CRC(a70d4f03) SHA1(c2482e624c8a828a94206a36d10c1021ad8ca1d0) )
2065	2090	ROM_LOAD( "sc_03.bin", 0x080000, 0x080000, CRC(6e254d12) SHA1(857779dbd276b688201a8ea3afd5817e38acad2e) )
r9812	r9813
2075	2100	ROM_COPY( "adpcm", 0xc0000, 0x1a0000, 0x20000 )
2076	2101	ROM_COPY( "adpcm", 0x00000, 0x1c0000, 0x20000 ) //bank 7
2077	2102	ROM_COPY( "adpcm", 0xe0000, 0x1e0000, 0x20000 )
	2103
	2104
	2105	/* what are these, they're not gfx... */
	2106	ROM_REGION( 0x500000, "unknown0", 0 )
	2107	ROM_LOAD16_BYTE( "sc_13.bin", 0x00000, 0x010000, CRC(229bddd8) SHA1(0924bf29db9c5a970546f154e7752697fdce6a58) )
	2108	ROM_LOAD16_BYTE( "sc_12.bin", 0x00001, 0x010000, CRC(dabfa826) SHA1(0db587c846755491b169ef7751ba8e7cdc2607e6) )
	2109
	2110	/* what are these, they're not gfx... */
	2111	ROM_REGION( 0x500000, "unknown1", 0 )
	2112	ROM_LOAD16_BYTE( "sc_15.bin", 0x00000, 0x080000, CRC(8fd87e65) SHA1(acc9fd0289fa9ab60bec16d3e642039380e5180a) )
	2113	ROM_LOAD16_BYTE( "sc_14.bin", 0x00001, 0x080000, CRC(566086c2) SHA1(b7d09ce978f99ecc0d1975b31330ed49317701d5) )
2078	2114	ROM_END
2079	2115
2080	2116	/* slight changes in the program roms compared to above set, all remaining roms were the same */
r9812	r9813
2087	2123	ROM_LOAD( "sc_01.bin", 0x000000, 0x08000, CRC(cea39d6d) SHA1(f0b79c03ffafdd1e57673d6d4836becbe415110b) )
2088	2124	ROM_CONTINUE( 0x000000, 0x08000 )
2089	2125
2090		ROM_REGION( 0x020000, "gfx1", 0 )
2091		ROM_LOAD16_BYTE( "seibu6.7x", 0x000000, 0x010000, CRC(21c1e1b8) SHA1(30928c8ef98bf32ba0bf795ddadba1c95fcffe9d) )
2092		ROM_LOAD16_BYTE( "seibu5.7y", 0x000001, 0x010000, CRC(955d9fd7) SHA1(782451e8e85f7ba285d6cacd9d3fdcf48bde60bc) )
	2126	ROM_REGION( 0x200000, "gfx2", ROMREGION_INVERT ) /* bootleg sprite gfx */
	2127	ROM_LOAD( "sc_07.bin", 0x000000, 0x080000, CRC(dcb29d01) SHA1(72b4234622605f0ab03f21fdb6a61c6dac36000d) )
	2128	ROM_LOAD( "sc_06.bin", 0x080000, 0x080000, CRC(2dc70e05) SHA1(f1d0beb8428a7e1d7c7818e6719abdc543b2fa80) )
	2129	ROM_COPY( "gfx2", 0x00000, 0x100000, 0x100000 )
2093	2130
2094		ROM_REGION( 0x200000, "gfx2", 0 )
2095		ROM_LOAD( "obj.8c", 0x000000, 0x100000, CRC(e2377895) SHA1(1d1c7f31a08a464139cdaf383a5e1ade0717dc9f) )
2096		ROM_RELOAD( 0x100000, 0x100000 )
	2131	ROM_REGION( 0x200000, "test1", 0 ) /* bootleg tile gfx */
	2132	ROM_LOAD16_BYTE( "sc_09.bin", 0x000000, 0x080000, CRC(695b6342) SHA1(dfccb43789021ba2568b9284ae61e64f7f89b152) )
	2133	ROM_LOAD16_BYTE( "sc_10.bin", 0x000001, 0x080000, CRC(27e172b8) SHA1(ed86db2f42c8061607d46f2407b0130aaf692a02) )
	2134	ROM_LOAD16_BYTE( "sc_08.bin", 0x100000, 0x080000, CRC(637120f3) SHA1(b4b2ad192e46ff80d4cb440d7fb6dac215a353ed) )
	2135	ROM_LOAD16_BYTE( "sc_11.bin", 0x100001, 0x080000, CRC(0cd5ca5e) SHA1(a59665e543e9383355de2576e6693348ec356591) )
2097	2136
2098		ROM_REGION( 0x100000, "gfx3", 0 ) /* MBK tiles */
2099		ROM_LOAD( "back-1.4y", 0x000000, 0x100000, CRC(3dfea0ec) SHA1(8f41d267e488e07831946ef898d593897f10bfe2) )
	2137	ROM_REGION( 0x020000, "gfx1", ROMREGION_INVERT )
	2138	ROM_COPY( "test1", 0x080000, 0x00000, 0x020000 )
2100	2139
2101		ROM_REGION( 0x100000, "gfx4", 0 ) /* not used */
	2140	ROM_REGION( 0x100000, "gfx3", ROMREGION_INVERT ) /* MBK tiles */
	2141	ROM_COPY( "test1", 0x000000, 0x00000, 0x080000 )
	2142	ROM_COPY( "test1", 0x100000, 0x80000, 0x080000 )
	2143
	2144	ROM_REGION( 0x100000, "gfx4", ROMREGION_INVERT ) /* not used */
2102	2145	ROM_COPY("gfx3",0x00000,0x00000,0x100000)
2103	2146
2104		ROM_REGION( 0x080000, "gfx5", 0 ) /* BK3 tiles */
2105		ROM_LOAD( "back-2.6y", 0x000000, 0x080000, CRC(e07712af) SHA1(2a0285d6a1e0141838e898252b8d922a6263b05f) )
	2147	ROM_REGION( 0x080000, "gfx5", ROMREGION_INVERT ) /* BK3 tiles */
	2148	ROM_COPY( "test1", 0x180000, 0x00000, 0x080000 )
2106	2149
2107		ROM_REGION( 0x080000, "gfx6", 0 ) /* LBK tiles */
	2150	ROM_REGION( 0x080000, "gfx6", ROMREGION_INVERT ) /* LBK tiles */
2108	2151	ROM_COPY( "gfx5", 0x00000, 0x00000, 0x080000 )
2109	2152
2110		/bootleg GFX roms,for now load the original roms/
2111		ROM_REGION( 0x500000, "user2", 0 )
2112		ROM_LOAD( "sc_07.bin", 0x000000, 0x080000, CRC(dcb29d01) SHA1(72b4234622605f0ab03f21fdb6a61c6dac36000d) )
2113		ROM_LOAD( "sc_06.bin", 0x080000, 0x080000, CRC(2dc70e05) SHA1(f1d0beb8428a7e1d7c7818e6719abdc543b2fa80) )
2114		ROM_LOAD( "sc_13.bin", 0x100000, 0x010000, CRC(229bddd8) SHA1(0924bf29db9c5a970546f154e7752697fdce6a58) )
2115		ROM_LOAD( "sc_12.bin", 0x110000, 0x010000, CRC(dabfa826) SHA1(0db587c846755491b169ef7751ba8e7cdc2607e6) )
2116		ROM_LOAD( "sc_08.bin", 0x200000, 0x080000, CRC(637120f3) SHA1(b4b2ad192e46ff80d4cb440d7fb6dac215a353ed) )
2117		ROM_LOAD( "sc_09.bin", 0x280000, 0x080000, CRC(695b6342) SHA1(dfccb43789021ba2568b9284ae61e64f7f89b152) )
2118		ROM_LOAD( "sc_14.bin", 0x300000, 0x080000, CRC(566086c2) SHA1(b7d09ce978f99ecc0d1975b31330ed49317701d5) )
2119		ROM_LOAD( "sc_15.bin", 0x380000, 0x080000, CRC(8fd87e65) SHA1(acc9fd0289fa9ab60bec16d3e642039380e5180a) )
2120		ROM_LOAD( "sc_10.bin", 0x400000, 0x080000, CRC(27e172b8) SHA1(ed86db2f42c8061607d46f2407b0130aaf692a02) )
2121		ROM_LOAD( "sc_11.bin", 0x480000, 0x080000, CRC(0cd5ca5e) SHA1(a59665e543e9383355de2576e6693348ec356591) )
2122
2123	2153	ROM_REGION( 0x100000, "adpcm", ROMREGION_ERASEFF ) /* ADPCM samples */
2124	2154	ROM_LOAD( "sc_02.bin", 0x000000, 0x020000, CRC(a70d4f03) SHA1(c2482e624c8a828a94206a36d10c1021ad8ca1d0) )
2125	2155	ROM_LOAD( "sc_03.bin", 0x080000, 0x080000, CRC(6e254d12) SHA1(857779dbd276b688201a8ea3afd5817e38acad2e) )
r9812	r9813
2135	2165	ROM_COPY( "adpcm", 0xc0000, 0x1a0000, 0x20000 )
2136	2166	ROM_COPY( "adpcm", 0x00000, 0x1c0000, 0x20000 ) //bank 7
2137	2167	ROM_COPY( "adpcm", 0xe0000, 0x1e0000, 0x20000 )
	2168
	2169
	2170	/* what are these, they're not gfx... */
	2171	ROM_REGION( 0x500000, "unknown0", 0 )
	2172	ROM_LOAD16_BYTE( "sc_13.bin", 0x00000, 0x010000, CRC(229bddd8) SHA1(0924bf29db9c5a970546f154e7752697fdce6a58) )
	2173	ROM_LOAD16_BYTE( "sc_12.bin", 0x00001, 0x010000, CRC(dabfa826) SHA1(0db587c846755491b169ef7751ba8e7cdc2607e6) )
	2174
	2175	/* what are these, they're not gfx... */
	2176	ROM_REGION( 0x500000, "unknown1", 0 )
	2177	ROM_LOAD16_BYTE( "sc_15.bin", 0x00000, 0x080000, CRC(8fd87e65) SHA1(acc9fd0289fa9ab60bec16d3e642039380e5180a) )
	2178	ROM_LOAD16_BYTE( "sc_14.bin", 0x00001, 0x080000, CRC(566086c2) SHA1(b7d09ce978f99ecc0d1975b31330ed49317701d5) )
2138	2179	ROM_END
2139	2180
2140		#define CUPSOC_DEBUG_MODE 1
	2181	#define CUPSOC_DEBUG_MODE
2141	2182
2142	2183	static DRIVER_INIT( cupsoc )
2143	2184	{
r9812	r9813
2174	2215
2175	2216	GAME( 1993, godzilla, 0, godzilla, godzilla, 0, ROT0, "Banpresto", "Godzilla", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
2176	2217	GAME( 1993, grainbow, 0, grainbow, grainbow, 0, ROT0, "Banpresto", "SD Gundam Sangokushi Rainbow Tairiku Senki", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
2177		GAME( 1993, denjinmk, 0, denjinmk, denjinmk, denjinmk, ROT0, "Banpresto", "Denjin Makai", GAME_~~UNE~~M~~ULATED_~~PROTECT~~ION \| GAME~~_~~NOT_WO~~RKING )
	2218	GAME( 1993, denjinmk, 0, denjinmk, denjinmk, denjinmk, ROT0, "Banpresto", "Denjin Makai", GAME_IMPERFECT_GRAPHICS )
2178	2219
2179	2220	GAME( 1992, cupsoc, 0, cupsoc, cupsoc, 0, ROT0, "Seibu Kaihatsu", "Seibu Cup Soccer (set 1)", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
2180	2221	GAME( 1992, cupsoca, cupsoc, cupsoc, cupsoc, 0, ROT0, "Seibu Kaihatsu", "Seibu Cup Soccer (set 2)", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
2181		GAME( 1992, cupsocs, cupsoc, cupsoc, cupsoc, 0, ROT0, "Seibu Kaihatsu", "Seibu Cup Soccer :Selection: (set 1)", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
2182		GAME( 1992, cupsocs2, cupsoc, cupsoc, cupsoc, 0, ROT0, "Seibu Kaihatsu", "Seibu Cup Soccer :Selection: (set 2)", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
	2222	GAME( 1992, cupsocs, cupsoc, cupsocs, cupsoc, 0, ROT0, "Seibu Kaihatsu", "Seibu Cup Soccer :Selection: (set 1)", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
	2223	GAME( 1992, cupsocs2, cupsoc, cupsocs, cupsoc, 0, ROT0, "Seibu Kaihatsu", "Seibu Cup Soccer :Selection: (set 2)", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
2183	2224	GAME( 1992, cupsocsb, cupsoc, cupsocbl, cupsoc, cupsoc, ROT0, "bootleg", "Seibu Cup Soccer :Selection: (bootleg, set 1)", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
2184	2225	GAME( 1992, cupsocsb2,cupsoc, cupsocbl, cupsoc, cupsoc, ROT0, "bootleg", "Seibu Cup Soccer :Selection: (bootleg, set 2)", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
2185		GAME( 1992, olysoc92, cupsoc, cupsoc, cupsoc, 0, ROT0, "Seibu Kaihatsu", "Olympic Soccer '92", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )
	2226	GAME( 1992, olysoc92, cupsoc, cupsoc, cupsoc, 0, ROT0, "Seibu Kaihatsu", "Olympic Soccer '92", GAME_UNEMULATED_PROTECTION \| GAME_NOT_WORKING )

src/mame/drivers/m90.c
r9812	r9813
689	689	/* Basic hardware -- no decryption table is setup for CPU */
690	690	static MACHINE_CONFIG_START( m90, driver_device )
691	691	/* basic machine hardware */
692		MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
	692	MDRV_CPU_ADD("maincpu", V35,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
693	693	MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map)
694	694	MDRV_CPU_IO_MAP(m90_main_cpu_io_map)
695	695	MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
r9812	r9813
763	763
764	764
765	765	static const nec_config bomberman_config ={ bomberman_decryption_table, };
766		static MACHINE_CONFIG_START( bombrman, driver_device )
767
768		/* basic machine hardware */
769		MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
	766	static MACHINE_CONFIG_DERIVED( bombrman, m90 )
	767	MDRV_CPU_MODIFY("maincpu")
770	768	MDRV_CPU_CONFIG(bomberman_config)
771		MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map)
772		MDRV_CPU_IO_MAP(m90_main_cpu_io_map)
773		MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
774
775		MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
776		MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map)
777		MDRV_CPU_IO_MAP(m90_sound_cpu_io_map)
778		MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128) /* clocked by V1? (Vigilante) */
779		/* IRQs are generated by main Z80 and YM2151 */
780		MDRV_SOUND_START(m72)
781		MDRV_SOUND_RESET(m72)
782
783		/* video hardware */
784		MDRV_SCREEN_ADD("screen", RASTER)
785		MDRV_SCREEN_REFRESH_RATE(60)
786		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
787		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
788		MDRV_SCREEN_SIZE(648, 648)
	769	MDRV_SCREEN_MODIFY("screen")
789	770	MDRV_SCREEN_VISIBLE_AREA(108, 508-1, 178, 478-1)
790
791		MDRV_GFXDECODE(m90)
792		MDRV_PALETTE_LENGTH(512)
793
794		MDRV_VIDEO_START(m90)
795		MDRV_VIDEO_UPDATE(m90)
796
797		/* sound hardware */
798		MDRV_SPEAKER_STANDARD_MONO("mono")
799
800		MDRV_SOUND_ADD("ymsnd", YM2151, XTAL_3_579545MHz) /* verified on pcb */
801		MDRV_SOUND_CONFIG(ym2151_config)
802		MDRV_SOUND_ROUTE(0, "mono", 0.15)
803		MDRV_SOUND_ROUTE(1, "mono", 0.15)
804
805		MDRV_SOUND_ADD("dac", DAC, 0)
806		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
807	771	MACHINE_CONFIG_END
808	772
809	773	static const nec_config dynablaster_config ={ dynablaster_decryption_table, };
r9812	r9813
811	775	static MACHINE_CONFIG_START( bbmanw, driver_device )
812	776
813	777	/* basic machine hardware */
814		MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
	778	MDRV_CPU_ADD("maincpu", V35,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
815	779	MDRV_CPU_CONFIG(dynablaster_config)
816	780	MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map)
817	781	MDRV_CPU_IO_MAP(m90_main_cpu_io_map)

src/mame/drivers/r2dx_v33.c
r0	r9813
	1	/*
	2
	3	Raiden 2 / DX V33 Version
	4
	5	Temporary split from raiden2.c, it'll be re-merged at some point.
	6
	7	Note:
	8	Please don't do any state machine refactoring of this.
	9
	10	0x430-0x433
	11	1) appears to control where the first enemies turns, if clockwise or anticlockwise
	12	2) ...
	13
	14	Raiden 2 / DX checks if there's the string "RAIDEN" at start-up inside the eeprom, otherwise it dies.
	15	Then it puts settings at 0x9e08 and 0x9e0a (bp 91acb)
	16
	17	*/
	18
	19	#include "emu.h"
	20	#include "cpu/nec/nec.h"
	21	#include "cpu/z80/z80.h"
	22	#include "audio/seibu.h"
	23	#include "machine/eeprom.h"
	24	#include "sound/okim6295.h"
	25	#include "includes/raiden2.h"
	26
	27	static UINT16 *seibu_crtc_regs;
	28	static UINT16 bg_vram,md_vram,fg_vram,tx_vram;
	29	static tilemap_t bg_tilemap,md_tilemap,fg_tilemap,tx_tilemap;
	30
	31	static TILE_GET_INFO( get_bg_tile_info )
	32	{
	33	int tile = bg_vram[tile_index];
	34	int color = (tile>>12)&0xf;
	35
	36	tile &= 0xfff;
	37
	38	SET_TILE_INFO(1,tile + 0x0000,color,0);
	39	}
	40
	41	static TILE_GET_INFO( get_md_tile_info )
	42	{
	43	int tile = md_vram[tile_index];
	44	int color = (tile>>12)&0xf;
	45
	46	tile &= 0xfff;
	47
	48	SET_TILE_INFO(2,tile + 0x2000,color,0);
	49	}
	50
	51	static TILE_GET_INFO( get_fg_tile_info )
	52	{
	53	int tile = fg_vram[tile_index];
	54	int color = (tile>>12)&0xf;
	55
	56	tile &= 0xfff;
	57
	58	SET_TILE_INFO(3,tile + 0x1000,color,0);
	59	}
	60
	61	static TILE_GET_INFO( get_tx_tile_info )
	62	{
	63	int tile = tx_vram[tile_index];
	64	int color = (tile>>12)&0xf;
	65
	66	tile &= 0xfff;
	67
	68	SET_TILE_INFO(4,tile,color,0);
	69	}
	70
	71	/* copied from Legionnaire */
	72	static void draw_sprites(running_machine machine, bitmap_t bitmap,const rectangle *cliprect,int pri)
	73	{
	74	UINT16 *spriteram16 = machine->generic.spriteram.u16;
	75	int offs,fx,fy,x,y,color,sprite;
	76	// int cur_pri;
	77	int dx,dy,ax,ay;
	78
	79	for (offs = 0x400-4;offs >= 0;offs -= 4)
	80	{
	81	UINT16 data = spriteram16[offs];
	82	//if (!(data &0x8000)) continue;
	83
	84	//cur_pri = (spriteram16[offs+1] & 0xc000) >> 14;
	85	//if (cur_pri!=pri) continue;
	86
	87	sprite = spriteram16[offs+1];
	88
	89	//sprite &= 0x7fff;
	90	//if(data & 0x8000) sprite \|= 0x4000;
	91	//if(spriteram16[offs+3] & 0x8000) sprite \|= 0x8000;//tile banking?,used in Denjin Makai
	92
	93	y = spriteram16[offs+3];
	94	x = spriteram16[offs+2];
	95
	96	x&=0xfff;
	97	y&=0xfff;
	98
	99	if (x&0x8000) x-=0x10000;
	100	if (y&0x8000) y-=0x10000;
	101
	102	color = (data &0x3f);
	103	fx = (data &0x8000) >> 15;
	104	fy = (data &0x0800) >> 11;
	105	dx = ((data &0x0700) >> 8) + 1;
	106	dy = ((data &0x7000) >> 12) + 1;
	107
	108	if (!fx)
	109	{
	110	if(!fy)
	111	{
	112	for (ax=0; ax<dx; ax++)
	113	for (ay=0; ay<dy; ay++)
	114	{
	115	drawgfx_transpen(bitmap,cliprect,machine->gfx[0],
	116	sprite++,
	117	color,fx,fy,x+ax16,y+ay16,15);
	118	}
	119	}
	120	else
	121	{
	122	for (ax=0; ax<dx; ax++)
	123	for (ay=0; ay<dy; ay++)
	124	{
	125	drawgfx_transpen(bitmap,cliprect,machine->gfx[0],
	126	sprite++,
	127	color,fx,fy,x+ax16,y+(dy-ay-1)16,15);
	128	}
	129	}
	130	}
	131	else
	132	{
	133	if(!fy)
	134	{
	135	for (ax=0; ax<dx; ax++)
	136	for (ay=0; ay<dy; ay++)
	137	{
	138	drawgfx_transpen(bitmap,cliprect,machine->gfx[0],
	139	sprite++,
	140	color,fx,fy,x+(dx-ax-1)16,y+ay16,15);
	141	}
	142	}
	143	else
	144	{
	145	for (ax=0; ax<dx; ax++)
	146	for (ay=0; ay<dy; ay++)
	147	{
	148	drawgfx_transpen(bitmap,cliprect,machine->gfx[0],
	149	sprite++,
	150	color,fx,fy,x+(dx-ax-1)16,y+(dy-ay-1)16,15);
	151	}
	152	}
	153	}
	154	}
	155	}
	156
	157	static VIDEO_START( rdx_v33 )
	158	{
	159	bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows,16,16,32,32);
	160	md_tilemap = tilemap_create(machine, get_md_tile_info, tilemap_scan_rows,16,16,32,32);
	161	fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows,16,16,32,32);
	162	tx_tilemap = tilemap_create(machine, get_tx_tile_info, tilemap_scan_rows,8, 8, 64,32);
	163
	164	tilemap_set_transparent_pen(bg_tilemap, 15);
	165	tilemap_set_transparent_pen(md_tilemap, 15);
	166	tilemap_set_transparent_pen(fg_tilemap, 15);
	167	tilemap_set_transparent_pen(tx_tilemap, 15);
	168	}
	169
	170	static VIDEO_UPDATE( rdx_v33 )
	171	{
	172	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
	173
	174	tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
	175	tilemap_draw(bitmap, cliprect, md_tilemap, 0, 0);
	176	tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
	177
	178	draw_sprites(screen->machine,bitmap,cliprect,0);
	179
	180	tilemap_draw(bitmap, cliprect, tx_tilemap, 0, 0);
	181
	182	/* debug DMA processing */
	183	if(0)
	184	{
	185	static UINT32 src_addr = 0x100000;
	186	static int frame;
	187	address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	188
	189	//if(input_code_pressed_once(screen->machine,KEYCODE_A))
	190	// src_addr+=0x800;
	191
	192	//if(input_code_pressed_once(screen->machine,KEYCODE_S))
	193	// src_addr-=0x800;
	194
	195	frame++;
	196
	197	popmessage("%08x 0",src_addr);
	198
	199	//if(input_code_pressed_once(screen->machine,KEYCODE_Z))
	200	if(frame == 5)
	201	{
	202	int i,data;
	203	static UINT8 *rom = memory_region(space->machine,"mainprg");
	204
	205	for(i=0;i<0x800;i+=2)
	206	{
	207	data = rom[src_addr+i+0];
	208	space->write_byte(i+0xd000+0, data);
	209	data = rom[src_addr+i+1];
	210	space->write_byte(i+0xd000+1, data);
	211	}
	212
	213	popmessage("%08x 1",src_addr);
	214	tilemap_mark_all_tiles_dirty(bg_tilemap);
	215	frame = 0;
	216	src_addr+=0x800;
	217	}
	218	}
	219	return 0;
	220	}
	221
	222	WRITE16_DEVICE_HANDLER( rdx_v33_eeprom_w )
	223	{
	224	if (ACCESSING_BITS_0_7)
	225	{
	226	eeprom_set_clock_line(device, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
	227	eeprom_write_bit(device, data & 0x20);
	228	eeprom_set_cs_line(device, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
	229
	230	if (data&0xc7) logerror("eeprom_w extra bits used %04x\n",data);
	231	}
	232	else
	233	{
	234	logerror("eeprom_w MSB used %04x",data);
	235	}
	236	}
	237
	238	/* new zero team uses the copd3 protection... and uploads a 0x400 byte table, probably the mcu code, encrypted */
	239
	240
	241	static UINT16 mcu_prog[0x800];
	242	static int mcu_prog_offs = 0;
	243
	244	WRITE16_HANDLER( mcu_prog_w )
	245	{
	246	mcu_prog[mcu_prog_offs*2] = data;
	247	}
	248
	249	WRITE16_HANDLER( mcu_prog_w2 )
	250	{
	251	mcu_prog[mcu_prog_offs*2+1] = data;
	252
	253	// both new zero team and raiden2/dx v33 version upload the same table..
	254	#if 0
	255	{
	256	char tmp[64];
	257	FILE *fp;
	258	sprintf(tmp,"cop3_%s.data", space->machine->gamedrv->name);
	259
	260	fp=fopen(tmp, "w+b");
	261	if (fp)
	262	{
	263	fwrite(mcu_prog, 0x400, 2, fp);
	264	fclose(fp);
	265	}
	266	}
	267	#endif
	268	}
	269
	270	WRITE16_HANDLER( mcu_prog_offs_w )
	271	{
	272	mcu_prog_offs = data;
	273	}
	274
	275	static WRITE16_HANDLER( rdx_bg_vram_w )
	276	{
	277	COMBINE_DATA(&bg_vram[offset]);
	278	tilemap_mark_tile_dirty(bg_tilemap, offset);
	279	}
	280
	281	static WRITE16_HANDLER( rdx_md_vram_w )
	282	{
	283	COMBINE_DATA(&md_vram[offset]);
	284	tilemap_mark_tile_dirty(md_tilemap, offset);
	285	}
	286
	287	static WRITE16_HANDLER( rdx_fg_vram_w )
	288	{
	289	COMBINE_DATA(&fg_vram[offset]);
	290	tilemap_mark_tile_dirty(fg_tilemap, offset);
	291	}
	292
	293	static WRITE16_HANDLER( rdx_tx_vram_w )
	294	{
	295	COMBINE_DATA(&tx_vram[offset]);
	296	tilemap_mark_tile_dirty(tx_tilemap, offset);
	297	}
	298
	299	static READ16_HANDLER( rdx_v33_unknown_r )
	300	{
	301	return mame_rand(space->machine);
	302	}
	303
	304
	305	static UINT16 mcu_xval,mcu_yval;
	306
	307	/* something sent to the MCU for X/Y global screen calculating ... */
	308	static WRITE16_HANDLER( mcu_xval_w )
	309	{
	310	mcu_xval = data;
	311	//popmessage("%04x %04x",mcu_xval,mcu_yval);
	312	}
	313
	314	static WRITE16_HANDLER( mcu_yval_w )
	315	{
	316	mcu_yval = data;
	317	//popmessage("%04x %04x",mcu_xval,mcu_yval);
	318	}
	319
	320	static UINT16 mcu_data[9];
	321
	322	/* 0x400-0x407 seems some DMA hook-up, 0x420-0x427 looks like some x/y sprite calculation routine */
	323	static WRITE16_HANDLER( mcu_table_w )
	324	{
	325	mcu_data[offset] = data;
	326
	327	//popmessage("%04x %04x %04x %04x \| %04x %04x %04x %04x",mcu_data[0/2],mcu_data[2/2],mcu_data[4/2],mcu_data[6/2],mcu_data[8/2],mcu_data[0xa/2],mcu_data[0xc/2],mcu_data[0xe/2]);
	328	}
	329
	330	static WRITE16_HANDLER( mcu_table2_w )
	331	{
	332	mcu_data[offset+4] = data;
	333
	334	//popmessage("%04x %04x %04x %04x \| %04x %04x %04x %04x",mcu_data[0/2],mcu_data[2/2],mcu_data[4/2],mcu_data[6/2],mcu_data[8/2],mcu_data[0xa/2],mcu_data[0xc/2],mcu_data[0xe/2]);
	335	}
	336
	337
	338	static ADDRESS_MAP_START( rdx_v33_map, ADDRESS_SPACE_PROGRAM, 16 )
	339	AM_RANGE(0x00000, 0x003ff) AM_RAM // vectors copied here
	340
	341	AM_RANGE(0x00400, 0x00407) AM_WRITE(mcu_table_w)
	342	AM_RANGE(0x00420, 0x00429) AM_WRITE(mcu_table2_w)
	343
	344	/* results from cop? */
	345	AM_RANGE(0x00430, 0x00431) AM_READ(rdx_v33_unknown_r)
	346	AM_RANGE(0x00432, 0x00433) AM_READ(rdx_v33_unknown_r)
	347	AM_RANGE(0x00434, 0x00435) AM_READ(rdx_v33_unknown_r)
	348	AM_RANGE(0x00436, 0x00437) AM_READ(rdx_v33_unknown_r)
	349
	350	AM_RANGE(0x00600, 0x0064f) AM_RAM AM_BASE(&seibu_crtc_regs)
	351	AM_RANGE(0x00650, 0x0068f) AM_RAM //???
	352
	353	AM_RANGE(0x0068e, 0x0068f) AM_WRITENOP // synch for the MCU?
	354	AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
	355	AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
	356	// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
	357	// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
	358	AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
	359	AM_RANGE(0x006be, 0x006bf) AM_WRITENOP // MCU program related
	360	AM_RANGE(0x006d8, 0x006d9) AM_WRITE(mcu_xval_w)
	361	AM_RANGE(0x006da, 0x006db) AM_WRITE(mcu_yval_w)
	362	// AM_RANGE(0x006dc, 0x006dd) AM_READ(rdx_v33_unknown2_r)
	363	// AM_RANGE(0x006de, 0x006df) AM_WRITE(mcu_unkaa_w) // mcu command related?
	364
	365	AM_RANGE(0x00700, 0x00701) AM_DEVWRITE("eeprom", rdx_v33_eeprom_w)
	366	// AM_RANGE(0x00740, 0x00741) AM_READ(rdx_v33_unknown2_r)
	367	AM_RANGE(0x00744, 0x00745) AM_READ_PORT("INPUT")
	368	AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
	369	AM_RANGE(0x00762, 0x00763) AM_READNOP
	370
	371	AM_RANGE(0x00780, 0x00781) AM_DEVREADWRITE8_MODERN("oki", okim6295_device, read, write, 0x00ff) // single OKI chip on this version
	372
	373	AM_RANGE(0x00800, 0x00fff) AM_RAM // copies eeprom here?
	374	AM_RANGE(0x01000, 0x0bfff) AM_RAM
	375
	376	AM_RANGE(0x0c000, 0x0c7ff) AM_RAM AM_BASE_GENERIC(spriteram)
	377	AM_RANGE(0x0c800, 0x0cfff) AM_RAM
	378	AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(rdx_bg_vram_w) AM_BASE(&bg_vram)
	379	AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(rdx_md_vram_w) AM_BASE(&md_vram)
	380	AM_RANGE(0x0e000, 0x0e7ff) AM_RAM_WRITE(rdx_fg_vram_w) AM_BASE(&fg_vram)
	381	AM_RANGE(0x0e800, 0x0f7ff) AM_RAM_WRITE(rdx_tx_vram_w) AM_BASE(&tx_vram)
	382	AM_RANGE(0x0f800, 0x0ffff) AM_RAM /* Stack area */
	383	AM_RANGE(0x10000, 0x1efff) AM_RAM
	384	AM_RANGE(0x1f000, 0x1ffff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
	385
	386	AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("bank1")
	387	AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x40000 )
	388	ADDRESS_MAP_END
	389
	390	static READ16_HANDLER( nzerotea_sound_comms_r )
	391	{
	392	switch(offset+0x780)
	393	{
	394	case (0x788/2): return seibu_main_word_r(space,2,0xffff);
	395	case (0x78c/2): return seibu_main_word_r(space,3,0xffff);
	396	case (0x794/2): return seibu_main_word_r(space,5,0xffff);
	397	}
	398
	399	return 0xffff;
	400	}
	401
	402
	403	static WRITE16_HANDLER( nzerotea_sound_comms_w )
	404	{
	405	switch(offset+0x780)
	406	{
	407	case (0x780/2): { seibu_main_word_w(space,0,data,0x00ff); break; }
	408	case (0x784/2): { seibu_main_word_w(space,1,data,0x00ff); break; }
	409	//case (0x790/2): { seibu_main_word_w(space,4,data,0x00ff); break; }
	410	case (0x794/2): { seibu_main_word_w(space,4,data,0x00ff); break; }
	411	case (0x798/2): { seibu_main_word_w(space,6,data,0x00ff); break; }
	412	}
	413	}
	414
	415	static ADDRESS_MAP_START( nzerotea_map, ADDRESS_SPACE_PROGRAM, 16 )
	416	AM_RANGE(0x00000, 0x003ff) AM_RAM //stack area
	417
	418	/* results from cop? */
	419	AM_RANGE(0x00430, 0x00431) AM_READ(rdx_v33_unknown_r)
	420	AM_RANGE(0x00432, 0x00433) AM_READ(rdx_v33_unknown_r)
	421	AM_RANGE(0x00434, 0x00435) AM_READ(rdx_v33_unknown_r)
	422	AM_RANGE(0x00436, 0x00437) AM_READ(rdx_v33_unknown_r)
	423
	424	AM_RANGE(0x00400, 0x00407) AM_WRITE(mcu_table_w)
	425	AM_RANGE(0x00420, 0x00427) AM_WRITE(mcu_table2_w)
	426
	427	AM_RANGE(0x00600, 0x0064f) AM_RAM AM_BASE(&seibu_crtc_regs)
	428
	429	AM_RANGE(0x0068e, 0x0068f) AM_WRITENOP // synch for the MCU?
	430	AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
	431	AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
	432	// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
	433	// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
	434	AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
	435	// AM_RANGE(0x006d8, 0x006d9) AM_WRITE(bbbbll_w) // scroll?
	436	// AM_RANGE(0x006dc, 0x006dd) AM_READ(nzerotea_unknown_r)
	437	// AM_RANGE(0x006de, 0x006df) AM_WRITE(mcu_unkaa_w) // mcu command related?
	438	//AM_RANGE(0x00700, 0x00701) AM_DEVWRITE("eeprom", rdx_v33_eeprom_w)
	439	AM_RANGE(0x00740, 0x00741) AM_READ_PORT("DSW")
	440	AM_RANGE(0x00744, 0x00745) AM_READ_PORT("INPUT")
	441	AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
	442	// AM_RANGE(0x00762, 0x00763) AM_READ(nzerotea_unknown_r)
	443
	444	AM_RANGE(0x00780, 0x0079f) AM_READWRITE(nzerotea_sound_comms_r,nzerotea_sound_comms_w)
	445
	446	AM_RANGE(0x00800, 0x00fff) AM_RAM
	447	AM_RANGE(0x01000, 0x0bfff) AM_RAM
	448
	449	AM_RANGE(0x0c000, 0x0c7ff) AM_RAM AM_BASE_GENERIC(spriteram)
	450	AM_RANGE(0x0c800, 0x0cfff) AM_RAM
	451	AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(rdx_bg_vram_w) AM_BASE(&bg_vram)
	452	AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(rdx_md_vram_w) AM_BASE(&md_vram)
	453	AM_RANGE(0x0e000, 0x0e7ff) AM_RAM_WRITE(rdx_fg_vram_w) AM_BASE(&fg_vram)
	454	AM_RANGE(0x0e800, 0x0f7ff) AM_RAM_WRITE(rdx_tx_vram_w) AM_BASE(&tx_vram)
	455	AM_RANGE(0x0f800, 0x0ffff) AM_RAM /* Stack area */
	456	AM_RANGE(0x10000, 0x1efff) AM_RAM
	457	AM_RANGE(0x1f000, 0x1ffff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
	458
	459	AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("bank1")
	460	AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x40000 )
	461	ADDRESS_MAP_END
	462
	463	static INTERRUPT_GEN( rdx_v33_interrupt )
	464	{
	465	cpu_set_input_line_and_vector(device, 0, HOLD_LINE, 0xc0/4); /* VBL */
	466	}
	467
	468	static const gfx_layout rdx_v33_charlayout =
	469	{
	470	8,8,
	471	RGN_FRAC(1,1),
	472	4,
	473	{ 8,12,0,4 },
	474	{ 3,2,1,0,19,18,17,16 },
	475	{ STEP8(0,32) },
	476	32*8
	477	};
	478
	479
	480	static const gfx_layout rdx_v33_tilelayout =
	481	{
	482	16,16,
	483	RGN_FRAC(1,1),
	484	4,
	485	{ 8,12,0,4 },
	486	{
	487	3,2,1,0,
	488	19,18,17,16,
	489	3+648, 2+648, 1+648, 0+648,
	490	19+648,18+648,17+648,16+648,
	491	},
	492	{ STEP16(0,32) },
	493	128*8
	494	};
	495
	496	static const gfx_layout rdx_v33_spritelayout =
	497	{
	498	16, 16,
	499	RGN_FRAC(1,1),
	500	4,
	501	{ STEP4(0,1) },
	502	{ 4, 0, 12, 8, 20, 16, 28, 24, 36, 32, 44, 40, 52, 48, 60, 56 },
	503	{ STEP16(0,64) },
	504	16164
	505	};
	506
	507	static GFXDECODE_START( rdx_v33 )
	508	GFXDECODE_ENTRY( "gfx3", 0x00000, rdx_v33_spritelayout, 0x000, 0x40 )
	509	GFXDECODE_ENTRY( "gfx2", 0x00000, rdx_v33_tilelayout, 0x400, 0x10 )
	510	GFXDECODE_ENTRY( "gfx2", 0x00000, rdx_v33_tilelayout, 0x500, 0x10 )
	511	GFXDECODE_ENTRY( "gfx2", 0x00000, rdx_v33_tilelayout, 0x600, 0x10 )
	512	GFXDECODE_ENTRY( "gfx1", 0x00000, rdx_v33_charlayout, 0x700, 0x10 )
	513	GFXDECODE_ENTRY( "gfx1", 0x00000, rdx_v33_tilelayout, 0x700, 0x10 ) // debugging, to be removed
	514	GFXDECODE_END
	515
	516	static INPUT_PORTS_START( rdx_v33 )
	517	PORT_START("SYSTEM")
	518	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
	519	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
	520	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
	521	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
	522	PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eeprom_read_bit)
	523	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
	524	PORT_DIPNAME( 0x0040, 0x0040, "Test Mode" )
	525	PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
	526	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	527	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
	528	PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
	529	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	530	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
	531
	532	PORT_START("INPUT")
	533	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
	534	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
	535	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
	536	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
	537	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
	538	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
	539	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
	540	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN1 )
	541	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
	542	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
	543	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
	544	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
	545	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	546	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
	547	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
	548	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN2 )
	549	INPUT_PORTS_END
	550
	551
	552	static INPUT_PORTS_START( nzerotea )
	553
	554	SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
	555
	556	PORT_START("SYSTEM")
	557	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
	558	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
	559	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
	560	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
	561	//PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eeprom_read_bit)
	562	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
	563	PORT_DIPNAME( 0x0040, 0x0040, "Test Mode" )
	564	PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
	565	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	566	PORT_BIT( 0xff80, IP_ACTIVE_LOW, IPT_UNUSED )
	567
	568	PORT_START("INPUT")
	569	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
	570	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
	571	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
	572	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
	573	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
	574	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
	575	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
	576	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
	577	PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
	578	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	579	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
	580	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
	581	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
	582	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
	583	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	584	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
	585	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
	586	PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
	587	PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
	588	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	589
	590	PORT_START("DSW")
	591	PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
	592	PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
	593	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	594	PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
	595	PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
	596	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	597	PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
	598	PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
	599	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	600	PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
	601	PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
	602	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	603	PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
	604	PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
	605	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	606	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
	607	PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
	608	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	609	PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
	610	PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
	611	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	612	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Service_Mode ) )
	613	PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
	614	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	615	PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
	616	PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
	617	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	618	PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
	619	PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
	620	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	621	PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
	622	PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
	623	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	624	PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
	625	PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
	626	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	627	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
	628	PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
	629	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	630	PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
	631	PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
	632	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	633	PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
	634	PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
	635	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	636	PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
	637	PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
	638	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	639	INPUT_PORTS_END
	640
	641
	642	static MACHINE_CONFIG_START( rdx_v33, driver_device )
	643
	644	/* basic machine hardware */
	645	MDRV_CPU_ADD("maincpu", V33, 32000000/2 ) // ?
	646	MDRV_CPU_PROGRAM_MAP(rdx_v33_map)
	647	MDRV_CPU_VBLANK_INT("screen", rdx_v33_interrupt)
	648
	649	//MDRV_MACHINE_RESET(rdx_v33)
	650
	651	MDRV_EEPROM_93C46_ADD("eeprom")
	652
	653	/* video hardware */
	654	MDRV_SCREEN_ADD("screen", RASTER)
	655	MDRV_SCREEN_REFRESH_RATE(60)
	656	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
	657	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	658	MDRV_SCREEN_SIZE(648, 648)
	659	MDRV_SCREEN_VISIBLE_AREA(08, 408-1, 08, 308-1)
	660
	661	MDRV_GFXDECODE(rdx_v33)
	662	MDRV_PALETTE_LENGTH(2048)
	663
	664	MDRV_VIDEO_START(rdx_v33)
	665	MDRV_VIDEO_UPDATE(rdx_v33)
	666
	667	/* sound hardware */
	668	MDRV_SPEAKER_STANDARD_MONO("mono")
	669
	670	MDRV_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified
	671	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
	672	MACHINE_CONFIG_END
	673
	674	static MACHINE_CONFIG_START( nzerotea, driver_device )
	675
	676	/* basic machine hardware */
	677	MDRV_CPU_ADD("maincpu", V33,XTAL_32MHz/2) /* verified on pcb */
	678	MDRV_CPU_PROGRAM_MAP(nzerotea_map)
	679	MDRV_CPU_VBLANK_INT("screen", rdx_v33_interrupt)
	680
	681	MDRV_MACHINE_RESET(seibu_sound)
	682
	683	// SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(14318180/4)
	684	SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(14318180/4)
	685
	686	/* video hardware */
	687	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
	688
	689	MDRV_SCREEN_ADD("screen", RASTER)
	690	MDRV_SCREEN_REFRESH_RATE(55.47) /* verified on pcb */
	691	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate *//2)
	692	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	693	MDRV_SCREEN_SIZE(648, 648)
	694	MDRV_SCREEN_VISIBLE_AREA(08, 408-1, 0, 32*8-1)
	695	MDRV_GFXDECODE(rdx_v33)
	696	MDRV_PALETTE_LENGTH(2048)
	697
	698	MDRV_VIDEO_START(rdx_v33)
	699	MDRV_VIDEO_UPDATE(rdx_v33)
	700
	701	/* sound hardware */
	702	// SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(28636360/8,28636360/28,1,2)
	703	SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
	704
	705	MACHINE_CONFIG_END
	706
	707
	708	static DRIVER_INIT(rdx_v33)
	709	{
	710	memory_configure_bank(machine, "bank1", 0, 0x20, memory_region(machine, "mainprg"), 0x20000);
	711
	712	raiden2_decrypt_sprites(machine);
	713
	714	memory_set_bank(machine, "bank1", 1);
	715	}
	716
	717	static DRIVER_INIT(nzerotea)
	718	{
	719	memory_configure_bank(machine, "bank1", 0, 2, memory_region(machine, "mainprg"), 0x20000);
	720
	721	raiden2_decrypt_sprites(machine);
	722
	723	memory_set_bank(machine, "bank1", 1);
	724
	725	}
	726
	727	/*
	728
	729	Raiden DX
	730	Seibu Kaihatsu, 1993/1996
	731
	732	Note! PCB seems like an updated version. It uses _entirely_ SMD technology and
	733	is smaller than the previous hardware. I guess the game is still popular, so
	734	Seibu re-manufactured it using newer technology to meet demand.
	735	Previous version hardware is similar to Heated Barrel/Legionairre/Seibu Cup Soccer etc.
	736	It's possible that the BG and OBJ ROMs from this set can be used to complete the
	737	previous (incomplete) dump that runs on the V30 hardware, since most GFX chips are the same.
	738
	739	PCB ID: (C) 1996 JJ4-China-Ver2.0 SEIBU KAIHATSU INC., MADE IN JAPAN
	740	CPU : NEC 70136AL-16 (V33)
	741	SOUND : Oki M6295
	742	OSC : 28.636360MHz
	743	RAM : CY7C199-15 (28 Pin SOIC, x11)
	744	Breakdown of RAM locations...
	745	(x2 near SIE150)
	746	(x3 near SEI252)
	747	(x2 near SEI0200)
	748	(x4 near SEI360)
	749
	750	DIPs : 8 position (x1)
	751	1-6 OFF (NOT USED)
	752	7 OFF = Normal Mode , ON = Test/Setting Mode
	753	8 OFF = Normal Screen, ON = FLIP Screen
	754
	755	OTHER : Controls are 8-way + 3 Buttons
	756	Amtel 93C46 EEPROM (SOIC8)
	757	PALCE16V8 (x1, near BG ROM, SOIC20)
	758	SEIBU SEI360 SB06-1937 (160 pin PQFP)
	759	SEIBI SIE150 (100 pin PQFP, Note SIE, not a typo)
	760	SEIBU SEI252 (208 pin PQFP)
	761	SEIBU SEI333 (208 pin PQFP)
	762	SEIBU SEI0200 TC110G21AF (100 pin PQFP)
	763
	764	Note: Most of the custom SEIBU chips are the same as the ones used on the
	765	previous version hardware.
	766
	767	ROMs : (filename is PCB label, extension is PCB 'u' location)
	768
	769	ROM ROM Probably Byte
	770	Filename Label Type Used... Note C'sum
	771	---------------------------------------------------------------------------------
	772	PCM.099 RAIDEN-X SOUND LH538100 (SOP32) Oki Samples 0 8539h
	773	FIX.613 RAIDEN-X FIX LH532048 (SOP40) ? (BG?) 1 182Dh
	774	COPX_D3.357 RAIDEN-X 333 LH530800A (SOP32) Protection? 2 CEE4h
	775	PRG.223 RAIDEN-X CHR-4A1 MX23C3210 (SOP44) V33 program 3 F276h
	776	OBJ1.724 RAIDEN-X CHR1 MX23C3210 (SOP44) Motion Objects 4 4148h
	777	OBJ2.725 RAIDEN-X CHR2 MX23C3210 (SOP44) Motion Objects 4 00C3h
	778	BG.612 RAIDEN-X CHR3 MX23C3210 (SOP44) Backgrounds 5 3280h
	779
	780
	781	Notes
	782	0. Located near Oki M6295
	783	1. Located near SEI0200 and BG ROM
	784	2. Located near SEI333
	785	3. Located near V33 and SEI333
	786	4. Located near V33 and SEI252
	787	5. Located near FIX ROM and SEI0200
	788
	789	*/
	790
	791
	792	ROM_START( r2dx_v33 )
	793	ROM_REGION( 0x400000, "mainprg", 0 ) /* v33 main cpu */
	794	ROM_LOAD("prg.223", 0x000000, 0x400000, CRC(b3dbcf98) SHA1(30d6ec2090531c8c579dff74c4898889902d7d87) )
	795
	796	ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
	797
	798	// ROM_REGION( 0x20000, "cpu1", ROMREGION_ERASE00 ) /* 64k code for sound Z80 */
	799	/* nothing? no z80*/
	800
	801	ROM_REGION( 0x040000, "gfx1", 0 ) /* chars */
	802	ROM_LOAD( "fix.613", 0x000000, 0x040000, CRC(3da27e39) SHA1(3d446990bf36dd0a3f8fadb68b15bed54904c8b5) )
	803
	804	ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
	805	ROM_LOAD( "bg.612", 0x000000, 0x400000, CRC(162c61e9) SHA1(bd0a6a29804b84196ba6bf3402e9f30a25da9269) )
	806
	807	ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
	808	ROM_LOAD32_WORD( "obj1.724", 0x000000, 0x400000, CRC(7d218985) SHA1(777241a533defcbea3d7e735f309478d260bad52) )
	809	ROM_LOAD32_WORD( "obj2.725", 0x000002, 0x400000, CRC(b09434d9) SHA1(da75252b7693ab791fece4c10b8a4910edb76c88) )
	810
	811	ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
	812	ROM_LOAD( "pcm.099", 0x00000, 0x100000, CRC(97ca2907) SHA1(bfe8189300cf72089d0beaeab8b1a0a1a4f0a5b6) )
	813
	814	ROM_REGION( 0x40000, "user2", 0 ) /* COPX */
	815	ROM_LOAD( "copx_d3.357", 0x00000, 0x20000, CRC(fa2cf3ad) SHA1(13eee40704d3333874b6e3da9ee7d969c6dc662a) )
	816
	817	ROM_REGION16_BE( 0x80, "eeprom", 0 )
	818	ROM_LOAD16_WORD( "eeprom-r2dx_v33.bin", 0x0000, 0x0080, CRC(ba454777) SHA1(101c5364e8664d17bfb1e759515d135a2673d67e) )
	819	ROM_END
	820
	821	/* Different hardware, uses COPX-D3 for protection */
	822	ROM_START( nzerotea )
	823	ROM_REGION( 0x100000, "mainprg", 0 ) /* v30 main cpu */
	824	ROM_LOAD16_BYTE("prg1", 0x000000, 0x80000, CRC(3c7d9410) SHA1(25f2121b6c2be73f11263934266901ed5d64d2ee) )
	825	ROM_LOAD16_BYTE("prg2", 0x000001, 0x80000, CRC(6cba032d) SHA1(bf5d488cd578fff09e62e3650efdee7658033e3f) )
	826
	827	ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
	828
	829	ROM_REGION( 0x40000, "user2", 0 ) /* COPX */
	830	/* not from this set, assumed to be the same */
	831	ROM_LOAD( "copx-d3.bin", 0x00000, 0x20000, BAD_DUMP CRC(fa2cf3ad) SHA1(13eee40704d3333874b6e3da9ee7d969c6dc662a) )
	832
	833	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
	834	ROM_LOAD( "sound", 0x000000, 0x08000, CRC(7ec1fbc3) SHA1(48299d6530f641b18764cc49e283c347d0918a47) )
	835	ROM_CONTINUE( 0x010000, 0x08000 ) /* banked stuff */
	836	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
	837
	838	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
	839	ROM_LOAD16_BYTE( "fix1", 0x000000, 0x010000, CRC(0c4895b0) SHA1(f595dbe5a19edb8a06ea60105ee26b95db4a2619) )
	840	ROM_LOAD16_BYTE( "fix2", 0x000001, 0x010000, CRC(07d8e387) SHA1(52f54a6a4830592784cdf643a5f255aa3db53e50) )
	841
	842	ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
	843	ROM_LOAD( "back-1", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
	844	ROM_LOAD( "back-2", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
	845
	846	ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
	847	ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
	848	ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
	849
	850	ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
	851	ROM_LOAD( "6.pcm", 0x00000, 0x40000, CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) )
	852	ROM_END
	853
	854	// newer PCB, with V33 CPU and COPD3 protection, but weak sound hardware. - was marked as Raiden DX New in the rom dump, but boots as Raiden 2 New version, is it switchable?
	855	GAME( 1996, r2dx_v33, 0, rdx_v33, rdx_v33, rdx_v33, ROT270, "Seibu Kaihatsu", "Raiden II / DX (newer V33 PCB)", GAME_NOT_WORKING\|GAME_NO_SOUND)
	856
	857	// 'V33 system type_b' - uses V33 CPU, COPX-D3 external protection rom, but still has the proper sound system
	858	GAME( 1997, nzerotea, zeroteam, nzerotea, nzerotea, nzerotea, ROT0, "Seibu Kaihatsu", "New Zero Team", GAME_NOT_WORKING\|GAME_NO_SOUND) // this uses a v33 and COPD3

src/mame/drivers/segas32.c
r9812	r9813
2232	2232	MACHINE_CONFIG_END
2233	2233
2234	2234
	2235	static const nec_config ga2_v25_config ={ ga2_v25_opcode_table, };
	2236
2235	2237	static MACHINE_CONFIG_DERIVED( system32_v25, system32 )
2236	2238
2237	2239	/* add a V25 for protection */
2238	2240	MDRV_CPU_ADD("mcu", V25, 10000000)
2239	2241	MDRV_CPU_PROGRAM_MAP(ga2_v25_map)
	2242	MDRV_CPU_CONFIG(ga2_v25_config)
2240	2243	MACHINE_CONFIG_END
2241	2244
2242	2245
r9812	r9813
2475	2478	**************************************************************************************************************************
2476	2479	**************************************************************************************************************************
2477	2480	Arabian Fight
2478		protected via a custom V20 with encrypted code
	2481	protected via a custom V25 with encrypted code
2479	2482	*/
2480	2483
2481	2484	ROM_START( arabfgt )
r9812	r9813
2542	2545
2543	2546	/**************************************************************************************************************************
2544	2547	Arabian Fight (Japan)
2545		protected via a custom V20 with encrypted code
	2548	protected via a custom V25 with encrypted code
2546	2549	*/
2547	2550	ROM_START( arabfgtj )
2548	2551	ROM_REGION( 0x200000, "maincpu", 0 ) /* v60 code + data */
r9812	r9813
2818	2821	**************************************************************************************************************************
2819	2822	**************************************************************************************************************************
2820	2823	Golden Axe: The Return of Death Adder
2821		protected via a custom V20 with encrypted code
	2824	protected via a custom V25 with encrypted code
2822	2825	*/
2823	2826	ROM_START( ga2 )
2824	2827	ROM_REGION( 0x200000, "maincpu", 0 ) /* v60 code + data */
r9812	r9813
2853	2856
2854	2857	/**************************************************************************************************************************
2855	2858	Golden Axe: The Return of Death Adder (U.S.)
2856		protected via a custom V20 with encrypted code
	2859	protected via a custom V25 with encrypted code
2857	2860	Sega Game ID codes:
2858	2861	Game: 833-8932-02 GOLDEN AXE II AC USA
2859	2862	Rom board: 833-8933-01
r9812	r9813
2893	2896
2894	2897	/**************************************************************************************************************************
2895	2898	Golden Axe: The Return of Death Adder (Japan)
2896		protected via a custom V20 with encrypted code
	2899	protected via a custom V25 with encrypted code
2897	2900	*/
2898	2901	ROM_START( ga2j )
2899	2902	ROM_REGION( 0x200000, "maincpu", 0 ) /* v60 code + data */

src/mame/drivers/pandoras.c
r9812	r9813
145	145	AM_RANGE(0x2000, 0x2000) AM_WRITE(pandoras_cpub_irqtrigger_w) /* cause FIRQ on CPU B */
146	146	AM_RANGE(0x2001, 0x2001) AM_WRITE(watchdog_reset_w) /* watchdog reset */
147	147	AM_RANGE(0x4000, 0x5fff) AM_ROM /* space for diagnostic ROM */
148		AM_RANGE(0x6000, 0x67ff) AM_RAM AM_SHARE("share4") /* Shared RAM with CPU B */
	148	AM_RANGE(0x6000, 0x67ff) AM_RAM AM_SHARE("share4") /* Shared RAM with CPU B */
149	149	AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
150	150	ADDRESS_MAP_END
151	151
152	152	static ADDRESS_MAP_START( pandoras_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
153	153	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("share1") /* Work RAM (Shared with CPU A) */
154		AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE("share2") /* Color RAM (shared with CPU A) */
155		AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE("share3") /* Video RAM (shared with CPU A) */
	154	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE("share2") /* Color RAM (shared with CPU A) */
	155	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE("share3") /* Video RAM (shared with CPU A) */
156	156	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("DSW1")
157	157	AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w) /* INT control */
158	158	AM_RANGE(0x1a00, 0x1a00) AM_READ_PORT("SYSTEM")
r9812	r9813
163	163	// AM_RANGE(0x1e00, 0x1e00) AM_READNOP /* ??? seems to be important */
164	164	AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog_reset_w) /* watchdog reset */
165	165	AM_RANGE(0xa000, 0xa000) AM_WRITE(pandoras_cpua_irqtrigger_w) /* cause FIRQ on CPU A */
166		AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_SHARE("share4") /* Shared RAM with the CPU A */
	166	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_SHARE("share4") /* Shared RAM with the CPU A */
167	167	AM_RANGE(0xe000, 0xffff) AM_ROM /* ROM */
168	168	ADDRESS_MAP_END
169	169
r9812	r9813
172	172	AM_RANGE(0x2000, 0x23ff) AM_RAM /* RAM */
173	173	AM_RANGE(0x4000, 0x4000) AM_READ(soundlatch_r) /* soundlatch_r */
174	174	AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("aysnd", ay8910_address_w) /* AY-8910 */
175		AM_RANGE(0x6001, 0x6001) AM_DEVREAD("aysnd", ay8910_r) /* AY-8910 */
176		AM_RANGE(0x6002, 0x6002) AM_DEVWRITE("aysnd", ay8910_data_w) /* AY-8910 */
	175	AM_RANGE(0x6001, 0x6001) AM_DEVREAD("aysnd", ay8910_r) /* AY-8910 */
	176	AM_RANGE(0x6002, 0x6002) AM_DEVWRITE("aysnd", ay8910_data_w) /* AY-8910 */
177	177	AM_RANGE(0x8000, 0x8000) AM_WRITE(pandoras_i8039_irqtrigger_w) /* cause INT on the 8039 */
178	178	AM_RANGE(0xa000, 0xa000) AM_WRITE(soundlatch2_w) /* sound command to the 8039 */
179	179	ADDRESS_MAP_END
r9812	r9813
367	367	MDRV_CPU_PROGRAM_MAP(pandoras_i8039_map)
368	368	MDRV_CPU_IO_MAP(pandoras_i8039_io_map)
369	369
370		MDRV_QUANTUM_TIME(HZ(3000)) /* slices per frame */
	370	MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame - needed for correct synchronization of the sound CPUs */
371	371
372	372	MDRV_MACHINE_START(pandoras)
373	373	MDRV_MACHINE_RESET(pandoras)

src/mame/drivers/m92.c
r9812	r9813
181	181	62256: 32K x8 SRAM
182	182
183	183	Custom chips:
184		NANAO 08J27261A1 (PLCC84, encrypted V30 sound CPU, clocked at 14.31818MHz on pins 78 & 79)
	184	NANAO 08J27261A1 (PLCC84, encrypted V35 sound CPU, clocked at 14.31818MHz on pins 78 & 79)
185	185	NANAO GA23 (QFP180)
186	186
187	187
r9812	r9813
924	924	MDRV_CPU_PROGRAM_MAP(m92_map)
925	925	MDRV_CPU_IO_MAP(m92_portmap)
926	926
927		MDRV_CPU_ADD("soundcpu" ,V30, 14318180/2) /* 14.31818 MHz */
	927	MDRV_CPU_ADD("soundcpu" ,V35, 14318180/2) /* 14.31818 MHz */
928	928	MDRV_CPU_PROGRAM_MAP(sound_map)
929	929
930	930	MDRV_MACHINE_START(m92)
r9812	r9813
1293	1293	ROM_LOAD16_BYTE( "gf_h1-c.5l", 0x040001, 0x20000, CRC(c84188b7) SHA1(ff710be742f610d90538db296acdd435260bef12) )
1294	1294	ROM_LOAD16_BYTE( "gf_l1-c.5j", 0x040000, 0x20000, CRC(b189f72a) SHA1(f17d87349a57e1a4b20c4947e41edd7c39eaca13) )
1295	1295
1296		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1296	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1297	1297	ROM_LOAD16_BYTE( "gf_sh0.rom", 0x000001, 0x010000, CRC(3f8f16e0) SHA1(a9f568c1b585c2cf13b21716954dac0a89936fc6) )
1298	1298	ROM_LOAD16_BYTE( "gf_sl0.rom", 0x000000, 0x010000, CRC(db0b13a3) SHA1(6723026010610b706725a5284a7b8d70fe479dae) )
1299	1299
r9812	r9813
1320	1320	ROM_LOAD16_BYTE( "gfb_h1-e.5l", 0x040001, 0x20000, CRC(d9744f5d) SHA1(056d6e6e9874c33dcebe2e0ec946117d5eaa5d76) )
1321	1321	ROM_LOAD16_BYTE( "gfb_l1-e.5j", 0x040000, 0x20000, CRC(a0f7b61b) SHA1(5fc7fc3f57e82a9ae4e1f3c3e8e3e3b0bd3ff8f5) )
1322	1322
1323		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1323	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1324	1324	ROM_LOAD16_BYTE( "gf_sh0.rom",0x000001, 0x010000, CRC(3f8f16e0) SHA1(a9f568c1b585c2cf13b21716954dac0a89936fc6) )
1325	1325	ROM_LOAD16_BYTE( "gf_sl0.rom",0x000000, 0x010000, CRC(db0b13a3) SHA1(6723026010610b706725a5284a7b8d70fe479dae) )
1326	1326
r9812	r9813
1347	1347	ROM_LOAD16_BYTE( "gf_h1-d.5l", 0x040001, 0x20000, CRC(08a3736c) SHA1(0ae904cf486a371f8b635c1f9dc5201e38a73f5a) )
1348	1348	ROM_LOAD16_BYTE( "gf_l1-d.5j", 0x040000, 0x20000, CRC(435f524f) SHA1(65c282ec50123747880850bc32c7ace0471ed9f2) )
1349	1349
1350		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1350	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1351	1351	ROM_LOAD16_BYTE( "gf_sh0.rom",0x000001, 0x010000, CRC(3f8f16e0) SHA1(a9f568c1b585c2cf13b21716954dac0a89936fc6) )
1352	1352	ROM_LOAD16_BYTE( "gf_sl0.rom",0x000000, 0x010000, CRC(db0b13a3) SHA1(6723026010610b706725a5284a7b8d70fe479dae) )
1353	1353
r9812	r9813
1455	1455	ROM_LOAD16_BYTE( "h-h1.rom", 0x080001, 0x020000, CRC(264ba1f0) SHA1(49ecf9b3e5375629607fb747abe264406065580b) )
1456	1456	ROM_LOAD16_BYTE( "h-l1.rom", 0x080000, 0x020000, CRC(f9913731) SHA1(be7871d6843e76f66fae6b501c5ee83ccc366463) )
1457	1457
1458		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1458	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1459	1459	ROM_LOAD16_BYTE( "h-sh0.rom", 0x000001, 0x010000, CRC(86a4e56e) SHA1(61163010e713be64368a4126f17d33cbdcf0c5ed) )
1460	1460	ROM_LOAD16_BYTE( "h-sl0.rom", 0x000000, 0x010000, CRC(10fd9676) SHA1(1b51181a8f0711997e107e9a8b8f44341d08ea81) )
1461	1461
r9812	r9813
1482	1482	ROM_LOAD16_BYTE( "h-h1.rom", 0x080001, 0x020000, CRC(264ba1f0) SHA1(49ecf9b3e5375629607fb747abe264406065580b) )
1483	1483	ROM_LOAD16_BYTE( "h-l1.rom", 0x080000, 0x020000, CRC(f9913731) SHA1(be7871d6843e76f66fae6b501c5ee83ccc366463) )
1484	1484
1485		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1485	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1486	1486	ROM_LOAD16_BYTE( "h-sh0.rom", 0x000001, 0x010000, CRC(86a4e56e) SHA1(61163010e713be64368a4126f17d33cbdcf0c5ed) )
1487	1487	ROM_LOAD16_BYTE( "h-sl0.rom", 0x000000, 0x010000, CRC(10fd9676) SHA1(1b51181a8f0711997e107e9a8b8f44341d08ea81) )
1488	1488
r9812	r9813
1509	1509	ROM_LOAD16_BYTE( "h-h1.rom", 0x080001, 0x020000, CRC(264ba1f0) SHA1(49ecf9b3e5375629607fb747abe264406065580b) )
1510	1510	ROM_LOAD16_BYTE( "h-l1.rom", 0x080000, 0x020000, CRC(f9913731) SHA1(be7871d6843e76f66fae6b501c5ee83ccc366463) )
1511	1511
1512		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1512	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1513	1513	ROM_LOAD16_BYTE( "h-sh0-a.3l", 0x000001, 0x010000, CRC(bd3d1f61) SHA1(0c884a0b5519f9c0823128872baf7b0c4078e5c4) )
1514	1514	ROM_LOAD16_BYTE( "h-sl0-a.3n", 0x000000, 0x010000, CRC(76371def) SHA1(b7a86fd4eecdd8a538c32e08cd920c27bd50924b) )
1515	1515
r9812	r9813
1561	1561	ROM_LOAD16_BYTE( "rtl-h1-d.bin", 0x080001, 0x020000, CRC(352ff444) SHA1(e302bc8dbf80abe5c1aaf02e92473fc72a796e72) )
1562	1562	ROM_LOAD16_BYTE( "rtl-l1-d.bin", 0x080000, 0x020000, CRC(fd34ea46) SHA1(aca12d46ebff94505d03884e45805e84bbece6a7) )
1563	1563
1564		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1564	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1565	1565	ROM_LOAD16_BYTE( "rtl-sh0a.bin", 0x000001, 0x010000, CRC(e518b4e3) SHA1(44ec1d6b27bc3e49ad967f43960398ba1a19c5e3) )
1566	1566	ROM_LOAD16_BYTE( "rtl-sl0a.bin", 0x000000, 0x010000, CRC(896f0d36) SHA1(9246b1a5a8717dd823340d4cb79012a3df6fa4b7) )
1567	1567
r9812	r9813
1588	1588	ROM_LOAD16_BYTE( "rtl-h1-d.bin", 0x080001, 0x020000, CRC(352ff444) SHA1(e302bc8dbf80abe5c1aaf02e92473fc72a796e72) )
1589	1589	ROM_LOAD16_BYTE( "rtl-l1-d.bin", 0x080000, 0x020000, CRC(fd34ea46) SHA1(aca12d46ebff94505d03884e45805e84bbece6a7) )
1590	1590
1591		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1591	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1592	1592	ROM_LOAD16_BYTE( "rtl-sh0a.bin", 0x000001, 0x010000, CRC(e518b4e3) SHA1(44ec1d6b27bc3e49ad967f43960398ba1a19c5e3) )
1593	1593	ROM_LOAD16_BYTE( "rtl-sl0a.bin", 0x000000, 0x010000, CRC(896f0d36) SHA1(9246b1a5a8717dd823340d4cb79012a3df6fa4b7) )
1594	1594
r9812	r9813
1615	1615	ROM_LOAD16_BYTE( "mr-h1-b.bin", 0x080001, 0x010000, CRC(e17649b9) SHA1(fb09a0ccd22475d81ba667c88d1b5eb7cc64728f) )
1616	1616	ROM_LOAD16_BYTE( "mr-l1-b.bin", 0x080000, 0x010000, CRC(a87c62b4) SHA1(d3cae0f420faeb4556767b6ad817fc39d31b7273) )
1617	1617
1618		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1618	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1619	1619	ROM_LOAD16_BYTE( "mr-sh0.bin", 0x000001, 0x010000, CRC(50d335e4) SHA1(a1a92e95fbd6b99d904a82cea4a1ff6fd2ac8dde) )
1620	1620	ROM_LOAD16_BYTE( "mr-sl0.bin", 0x000000, 0x010000, CRC(0fa32721) SHA1(1561ddd2597592060b8a78f1dff6cbb25fb7cd2e) )
1621	1621
r9812	r9813
1642	1642	ROM_LOAD16_BYTE( "mr-h1.bin", 0x080001, 0x010000, CRC(c9532b60) SHA1(b83322ba7bb3eea4c64dd65b3c0a5cade61841d8) )
1643	1643	ROM_LOAD16_BYTE( "mr-l1.bin", 0x080000, 0x010000, CRC(6349b520) SHA1(406620d9c63ce3d6801105c8122e1d0bbe6152ad) )
1644	1644
1645		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1645	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1646	1646	ROM_LOAD16_BYTE( "mr-sh0.bin", 0x000001, 0x010000, CRC(50d335e4) SHA1(a1a92e95fbd6b99d904a82cea4a1ff6fd2ac8dde) )
1647	1647	ROM_LOAD16_BYTE( "mr-sl0.bin", 0x000000, 0x010000, CRC(0fa32721) SHA1(1561ddd2597592060b8a78f1dff6cbb25fb7cd2e) )
1648	1648
r9812	r9813
1669	1669	ROM_LOAD16_BYTE( "h1", 0x080001, 0x010000, CRC(4dcb085b) SHA1(7c053f5ef2978e574d3d2d9f5c12035473d13c3b) )
1670	1670	ROM_LOAD16_BYTE( "l1", 0x080000, 0x010000, CRC(88df4f70) SHA1(f55769a107fe3f5446d8268f66e895b02727c61e) )
1671	1671
1672		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1672	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1673	1673	// older revision code? rev 3.31, doesn't work?
1674	1674	ROM_LOAD16_BYTE( "sh0", 0x000001, 0x010000, CRC(fc7221ee) SHA1(4e714f31ce0d1bb2f6c649a26af748f96912848e) )
1675	1675	ROM_LOAD16_BYTE( "sl0", 0x000000, 0x010000, CRC(65c809e6) SHA1(45a860b250219a15aa8a2177251f4d3f2e559b9e) )
r9812	r9813
1698	1698	ROM_LOAD16_BYTE( "uc_h1.rom", 0x080001, 0x020000, CRC(8d29bcd6) SHA1(470b77d1b8f88824bac294bd12a205a23dad2287) )
1699	1699	ROM_LOAD16_BYTE( "uc_l1.rom", 0x080000, 0x020000, CRC(a8a402d8) SHA1(0b40fb69f0a3e24e6b60117d2d2fd4cc170bc621) )
1700	1700
1701		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1701	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1702	1702	ROM_LOAD16_BYTE( "uc_sh0.rom", 0x000001, 0x010000, CRC(df90b198) SHA1(6b334457f06f6b9cfb355ba3d399bebb37b5733e) )
1703	1703	ROM_LOAD16_BYTE( "uc_sl0.rom", 0x000000, 0x010000, CRC(96c11aac) SHA1(16c47b4f97f0532fff30bb163f26d8cf6b923a2e) )
1704	1704
r9812	r9813
1725	1725	ROM_LOAD16_BYTE( "uc_h1-g.rom", 0x080001, 0x020000, CRC(6b8ca2de) SHA1(1096b93bbaa4c97d4900e8c083cde99195cad5ba) )
1726	1726	ROM_LOAD16_BYTE( "uc_l1-g.rom", 0x080000, 0x020000, CRC(2bdec7dd) SHA1(58817099e74fd5bc299b7bc14d83ee75ed200b53) )
1727	1727
1728		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1728	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1729	1729	ROM_LOAD16_BYTE( "uc_sh0.rom", 0x000001, 0x010000, CRC(df90b198) SHA1(6b334457f06f6b9cfb355ba3d399bebb37b5733e) )
1730	1730	ROM_LOAD16_BYTE( "uc_sl0.rom", 0x000000, 0x010000, CRC(96c11aac) SHA1(16c47b4f97f0532fff30bb163f26d8cf6b923a2e) )
1731	1731
r9812	r9813
1766	1766	ROM_LOAD16_BYTE( "uc_h1.ic27", 0x080001, 0x020000, CRC(79d79742) SHA1(f9c03c4d42b5b3d0f0185462868b04f1bb679f90) )
1767	1767	ROM_LOAD16_BYTE( "uc_l1.ic38", 0x080000, 0x020000, CRC(37211581) SHA1(b8fdff96b2c7d5cf2975dcf81c00581ccb595c15) )
1768	1768
1769		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1769	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1770	1770	ROM_LOAD16_BYTE( "uc_sh0.ic30", 0x000001, 0x010000, CRC(f0ca1b03) SHA1(07154a2c747091f8be23587c109d91ed1672da6e) )
1771	1771	ROM_LOAD16_BYTE( "uc_sl0.ic31", 0x000000, 0x010000, CRC(d1661723) SHA1(bdc00196aa2074e7b21e5949f73e9f2b93d76fd9) )
1772	1772
r9812	r9813
1793	1793	ROM_LOAD16_BYTE( "uc_h1_a.ic27", 0x080001, 0x020000, CRC(83f78dea) SHA1(6d197c3ea76beac31c3ea6e54a3ffea9d6c0c653) )
1794	1794	ROM_LOAD16_BYTE( "uc_l1_a.ic38", 0x080000, 0x020000, CRC(19628280) SHA1(e6c06cb7c37e46a7db3b4f318e836aa5a2390eda) )
1795	1795
1796		ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V30 = NANAO custom D80001 (?) */
	1796	ROM_REGION( 0x100000, "soundcpu", 0 ) /* 1MB for the audio CPU - encrypted V35 = NANAO custom D80001 (?) */
1797	1797	ROM_LOAD16_BYTE( "uc_sh0.ic30", 0x000001, 0x010000, CRC(f0ca1b03) SHA1(07154a2c747091f8be23587c109d91ed1672da6e) )
1798	1798	ROM_LOAD16_BYTE( "uc_sl0.ic31", 0x000000, 0x010000, CRC(d1661723) SHA1(bdc00196aa2074e7b21e5949f73e9f2b93d76fd9) )
1799	1799

src/mame/drivers/multfish.c
r9812	r9813
59	59	Sound: File KC98C72 (compatible to YM2149 / AY3-9810)
60	60	OSC: 24MHz
61	61	RAM: UMC UM61256AK-15 (x2 on mainboard, one on the HEAD)
62		NVRAM: Timekeeper M48T35-70PC1
	62	NVRAM: Timekeeper M48T35-70PC1 (used as main Z80 RAM)
63	63	Other: ADM ADM690AN (Microprocessor Supervisory Circuit AKA Watchdog timer)
64	64	VGA connector for video output
65	65
r9812	r9813
88	88
89	89	Todo:
90	90	-------------------------------------------------------------------------
	91	Layouts
91	92
92	93	NOTE:
93		Revision information comes from dat files, not all of them can be tested
94		becuase some program rom revisions don't seem to be dumped.
	94	Revision information comes from Igrosoft's website, not all of them can be
	95	tested becuase some program rom revisions don't seem to be dumped.
95	96
96	97	For sets where the program rom hasn't been verified, the MD5 hash is given
97		but not the CRC32 hash. These sets are excluded using the 'ALL_REVISIONS'
98		"#if" statements but listed in the driver below.
	98	but not the CRC32 hash.
99	99
100	100	Banking addresses are likely controlled via a GAL/PAL and was added at some
101	101	point to try and prevent rom swaps and conversions. Many of the hacked sets
r9812	r9813
166	166	+---+-----------------+---+---+------------------+---+
167	167	*/
168	168
169		#define ALL_REVISIONS 0
170		#define multfish_ROM_SIZE 0x80000
171
172	169	#include "emu.h"
173	170	#include "sound/ay8910.h"
174	171	#include "cpu/z80/z80.h"
175		#include "machine/~~nvra~~m.h"
	172	#include "machine/timekpr.h"
176	173
177		#define multfish_VIDRAM_SIZE (0x2000*0x10)
178		#define multfish_BRAM_SIZE (0x2000*0x10)
	174	#define multfish_ROM_SIZE 0x80000
	175	#define multfish_VIDRAM_SIZE (0x2000*0x04)
179	176
180		static UINT8* multfish_vid;
181		static UINT8* multfish_bram;
	177	class multfish_state : public driver_device
	178	{
	179	public:
	180	multfish_state(running_machine &machine, const driver_device_config_base &config)
	181	: driver_device(machine, config) { }
182	182
183		static int multfish_disp_enable;
184		static int multfish_xor_paltype;
185		static int multfish_xor_palette;
	183	/* Video related */
186	184
187		/* Vid~~eo Part */~~
	185	UINT8* vid;
188	186
189		static tilemap_t *multfish_tilemap;
190		static tilemap_t *multfish_reel_tilemap;
	187	int disp_enable;
	188	int xor_paltype;
	189	int xor_palette;
191	190
	191	tilemap_t *tilemap;
	192	tilemap_t *reel_tilemap;
192	193
	194	/* Misc related */
	195
	196	UINT8 rambk;
	197
	198	UINT8 hopper_motor;
	199	UINT8 hopper;
	200
	201	};
	202
193	203	static TILE_GET_INFO( get_multfish_tile_info )
194	204	{
195		int code = multfish_vid[tile_index2+0x0000] \| (multfish_vid[tile_index2+0x0001] << 8);
196		int attr = multfish_vid[tile_index2+0x1000] \| (multfish_vid[tile_index2+0x1001] << 8);
	205	multfish_state *state = machine->driver_data<multfish_state>();
	206	int code = state->vid[tile_index2+0x0000] \| (state->vid[tile_index2+0x0001] << 8);
	207	int attr = state->vid[tile_index2+0x1000] \| (state->vid[tile_index2+0x1001] << 8);
197	208
198	209	tileinfo->category = (attr&0x100)>>8;
199	210
r9812	r9813
206	217
207	218	static TILE_GET_INFO( get_multfish_reel_tile_info )
208	219	{
209		int code = multfish_vid[tile_index2+0x2000] \| (multfish_vid[tile_index2+0x2001] << 8);
	220	multfish_state *state = machine->driver_data<multfish_state>();
	221	int code = state->vid[tile_index2+0x2000] \| (state->vid[tile_index2+0x2001] << 8);
210	222
211	223	SET_TILE_INFO(
212	224	0,
r9812	r9813
217	229
218	230	static VIDEO_START(multfish)
219	231	{
220		multfish_vid = auto_alloc_array(machine, UINT8, multfish_VIDRAM_SIZE);
221		memset(multfish_vid,0x00,multfish_VIDRAM_SIZE);
222		state_save_register_global_pointer(machine, multfish_vid, multfish_VIDRAM_SIZE);
	232	multfish_state *state = machine->driver_data<multfish_state>();
223	233
224		multfish_bram = auto_alloc_array(machine, UINT8, multfish_BRAM_SIZE);
225		memset(multfish_bram,0x00,multfish_BRAM_SIZE);
226		state_save_register_global_pointer(machine, multfish_bram, multfish_BRAM_SIZE);
	234	state->vid = auto_alloc_array(machine, UINT8, multfish_VIDRAM_SIZE);
	235	memset(state->vid,0x00,multfish_VIDRAM_SIZE);
	236	state_save_register_global_pointer(machine, state->vid, multfish_VIDRAM_SIZE);
227	237
228		multfish_tilemap = tilemap_create(machine,get_multfish_tile_info,tilemap_scan_rows,16,16, 64, 32);
229		tilemap_set_transparent_pen(multfish_tilemap,255);
	238	state->tilemap = tilemap_create(machine,get_multfish_tile_info,tilemap_scan_rows,16,16, 64, 32);
	239	tilemap_set_transparent_pen(state->tilemap,255);
230	240
231		multfish_reel_tilemap = tilemap_create(machine,get_multfish_reel_tile_info,tilemap_scan_rows,16,16, 64, 64);
232		tilemap_set_transparent_pen(multfish_reel_tilemap,255);
233		tilemap_set_scroll_cols(multfish_reel_tilemap, 64);
	241	state->reel_tilemap = tilemap_create(machine,get_multfish_reel_tile_info,tilemap_scan_rows,16,16, 64, 64);
	242	tilemap_set_transparent_pen(state->reel_tilemap,255);
	243	tilemap_set_scroll_cols(state->reel_tilemap, 64);
234	244	}
235	245
236	246	static VIDEO_UPDATE(multfish)
237	247	{
	248	multfish_state *state = screen->machine->driver_data<multfish_state>();
238	249	int i;
	250
239	251	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
240	252
241		if (!~~multfi~~sh_disp_enable) return 0;
	253	if (!state->disp_enable) return 0;
242	254
243	255	/* Draw lower part of static tilemap (low pri tiles) */
244		tilemap_draw(bitmap,cliprect,~~multfi~~sh_tilemap,TILEMAP_DRAW_CATEGORY(1),0);
	256	tilemap_draw(bitmap,cliprect,state->tilemap,TILEMAP_DRAW_CATEGORY(1),0);
245	257
246	258	/* Setup the column scroll and draw the reels */
247	259	for (i=0;i<64;i++)
248	260	{
249		int colscroll = (multfish_vid[i2] \| multfish_vid[i2+1] << 8);
250		tilemap_set_scrolly(multfish_reel_tilemap, i, colscroll );
	261	int colscroll = (state->vid[i2] \| state->vid[i2+1] << 8);
	262	tilemap_set_scrolly(state->reel_tilemap, i, colscroll );
251	263	}
252		tilemap_draw(bitmap,cliprect,~~multfi~~sh_reel_tilemap,0,0);
	264	tilemap_draw(bitmap,cliprect,state->reel_tilemap,0,0);
253	265
254	266	/* Draw upper part of static tilemap (high pri tiles) */
255		tilemap_draw(bitmap,cliprect,~~multfi~~sh_tilemap,TILEMAP_DRAW_CATEGORY(0),0);
	267	tilemap_draw(bitmap,cliprect,state->tilemap,TILEMAP_DRAW_CATEGORY(0),0);
256	268
257	269	return 0;
258	270	}
259	271
260	272	static WRITE8_HANDLER( multfish_vid_w )
261	273	{
262		multfish_~~vid[off~~set]=data;
	274	multfish_state *state = space->machine->driver_data<multfish_state>();
263	275
	276	state->vid[offset]=data;
	277
264	278	// 0x0000 - 0x1fff is normal tilemap
265	279	if (offset < 0x2000)
266	280	{
267		tilemap_mark_tile_dirty(~~multfi~~sh_tilemap,(offset&0xfff)/2);
	281	tilemap_mark_tile_dirty(state->tilemap,(offset&0xfff)/2);
268	282
269	283	}
270	284	// 0x2000 - 0x2fff is for the reels
271	285	else if (offset < 0x4000)
272	286	{
273		tilemap_mark_tile_dirty(~~multfi~~sh_reel_tilemap,(offset&0x1fff)/2);
	287	tilemap_mark_tile_dirty(state->reel_tilemap,(offset&0x1fff)/2);
274	288	}
275	289	else if (offset < 0x6000)
276	290	{
277	291	int r,g,b;
278	292	int coldat;
279	293
280		coldat = ~~multfi~~sh_vid[(offset&0xfffe)] \| (~~multfi~~sh_vid[(offset&0xfffe)^1] << 8);
	294	coldat = state->vid[(offset&0xfffe)] \| (state->vid[(offset&0xfffe)^1] << 8);
281	295
282	296	/* xor and bitswap palette */
283		switch (~~multfi~~sh_xor_paltype) {
	297	switch (state->xor_paltype) {
284	298	case 1:
285		coldat ^= ~~multfi~~sh_xor_palette;
	299	coldat ^= state->xor_palette;
286	300	coldat ^= ((coldat&0x2) >>1) \| ((coldat&0x80) >>3) ;
287	301	coldat = BITSWAP16(coldat,10,15,5,13,8,12,11,2,0,4,7,14,9,3,1,6);
288	302	break;
289	303	case 2:
290		coldat ^= ~~multfi~~sh_xor_palette;
	304	coldat ^= state->xor_palette;
291	305	coldat ^= ((coldat&0x0001) <<1) ^ ((coldat&0x0010) <<1) ^ ((coldat&0x0010) <<2) ^ ((coldat&0x0020) <<1) ^ ((coldat&0x0080) >>1);
292	306	coldat = BITSWAP16(coldat,4,10,13,14,8,11,15,12,2,6,5,0,7,3,1,9);
293	307	break;
r9812	r9813
310	324	memory_set_bank(space->machine, "bank1", data & 0x0f);
311	325	}
312	326
313		static UINT8 rambk = 0;
314		static UINT8 otherrambk = 0;
	327	static READ8_DEVICE_HANDLER( multfish_timekeeper_r )
	328	{
	329	return timekeeper_r(device, offset + 0x6000);
	330	}
315	331
	332	static WRITE8_DEVICE_HANDLER( multfish_timekeeper_w )
	333	{
	334	timekeeper_w(device, offset + 0x6000, data);
	335	}
	336
316	337	static READ8_HANDLER( bankedram_r )
317	338	{
318		if ((otherrambk & 0x80) == 0x00)
	339	multfish_state *state = space->machine->driver_data<multfish_state>();
	340
	341	if ((state->rambk & 0x80) == 0x00)
319	342	{
320		return ~~mul~~tfish_bram[offset+0x2000*rambk];
	343	return timekeeper_r(space->machine->device("m48t35"), offset + 0x2000*(state->rambk & 0x03));
321	344	}
322	345	else
323	346	{
324		return ~~multfi~~sh_vid[offset+0x2000*rambk];
	347	return state->vid[offset+0x2000*(state->rambk & 0x03)];
325	348	}
326	349
327	350	}
328	351
329	352	static WRITE8_HANDLER( bankedram_w )
330	353	{
331		if ((otherrambk & 0x80) == 0x00)
	354	multfish_state *state = space->machine->driver_data<multfish_state>();
	355
	356	if ((state->rambk & 0x80) == 0x00)
332	357	{
333		~~mul~~tfi~~sh_b~~ram[offset+0x2000*rambk] = data;
	358	timekeeper_w(space->machine->device("m48t35"), offset + 0x2000*(state->rambk & 0x03), data);
334	359	}
335	360	else
336	361	{
337		multfish_vid_w(space, offset+0x2000*rambk, data);
	362	multfish_vid_w(space, offset+0x2000*(state->rambk & 0x03), data);
338	363	}
339	364	}
340	365
341	366	static WRITE8_HANDLER( multfish_rambank_w )
342	367	{
343		rambk = data & 0x0f;
344		otherrambk = data & 0xf0;
	368	multfish_state *state = space->machine->driver_data<multfish_state>();
	369
	370	state->rambk = data;
345	371	}
346	372
347	373
r9812	r9813
352	378	return space->machine->primary_screen->vpos();
353	379	}
354	380
355		static UINT8 multfish_hopper_motor = 0;
356		static UINT8 multfish_hopper = 0;
357
358	381	static CUSTOM_INPUT( multfish_hopper_r )
359	382	{
360		if ( multfish_hopper_motor != 0 )
	383	multfish_state *state = field->port->machine->driver_data<multfish_state>();
	384
	385	if ( state->hopper_motor != 0 )
361	386	{
362		multfish_hopper++;
363		return multfish_hopper>>4;
	387	state->hopper++;
	388	return state->hopper>>4;
364	389	}
365	390	else
366	391	{
r9812	r9813
377	402	---- -X-- Bill Acceptor Lock 24B
378	403	---X ---- Hopper Motor 33B
379	404	*/
380		multfish_hopper_motor = data & 0x10;
	405	multfish_state *state = space->machine->driver_data<multfish_state>();
	406
	407	state->hopper_motor = data & 0x10;
381	408	coin_lockout_w(space->machine, 0, data & 0x01);
382	409	coin_lockout_w(space->machine, 1, data & 0x01);
383	410	coin_lockout_w(space->machine, 2, data & 0x01);
r9812	r9813
388	415	coin_lockout_w(space->machine, 7, data & 0x04);
389	416	}
390	417
391		INLINE ~~UINT8 mak~~e_~~bcd(UINT8~~ ~~data~~)
	418	static WRITE8_HANDLER( rollfr_hopper_w )
392	419	{
393		return ((data / 10) << 4) \| (data % 10);
394		}
	420	/*
	421	By default RollFruit use inverted coinlock bit.
	422	*/
	423	multfish_state *state = space->machine->driver_data<multfish_state>();
395	424
396		static READ8_HANDLER(multfish_rtc_r)
397		{
398
399		system_time systime;
400
401		space->machine->current_datetime(systime);
402		switch (offset)
403		{
404		case 0:
405		return 0;
406		case 1:
407		return make_bcd(systime.local_time.second);
408		case 2:
409		return make_bcd(systime.local_time.minute);
410		case 3:
411		return make_bcd(systime.local_time.hour);
412		case 4:
413		return make_bcd(systime.local_time.weekday);
414		case 5:
415		return make_bcd(systime.local_time.mday);
416		case 6:
417		return make_bcd(systime.local_time.month+1);
418		case 7:
419		return make_bcd(systime.local_time.year % 100);
420		default:
421		return 0;
422		}
	425	state->hopper_motor = data & 0x10;
	426	coin_lockout_w(space->machine, 0, !data & 0x01);
	427	coin_lockout_w(space->machine, 1, !data & 0x01);
	428	coin_lockout_w(space->machine, 2, !data & 0x01);
	429	coin_lockout_w(space->machine, 3, !data & 0x01);
	430	coin_lockout_w(space->machine, 4, data & 0x04);
	431	coin_lockout_w(space->machine, 5, data & 0x04);
	432	coin_lockout_w(space->machine, 6, data & 0x04);
	433	coin_lockout_w(space->machine, 7, data & 0x04);
423	434	}
424	435
425		~~static W~~RITE8_HAN~~DLER~~(mu~~ltfi~~s~~h_r~~t~~c_w~~)
	436	DRIVER_INIT( customl )
426	437	{
427
428		}
429
430
431		DRIVER_INIT( igrosoft )
432		{
433		multfish_xor_paltype = 0;
434		}
435
436		DRIVER_INIT( custom_altera )
437		{
438	438	/*
439	439	rom 1
440	440	swap msb/lsb
r9812	r9813
551	551	auto_free(machine, temprom);
552	552	}
553	553
554		DRIVER_INIT( ~~island2~~_altera )
	554	INLINE void roment_decodel(UINT8 romptr, UINT8 tmprom, UINT8 xor_data, UINT32 xor_add)
555	555	{
556		multfish_xor_palette = 0x8bf7;
557		multfish_xor_paltype = 1;
	556	UINT32 i, jscr;
	557
	558	for (i = 0; i < multfish_ROM_SIZE; i++)
	559	{
	560	jscr = BITSWAP24(i,23,22,21,20,19,16,18,17,14,15,12,13,11,8,10,9,6,7,4,5,3,2,1,0) ^ xor_add ^ 8;
	561	tmprom[i] = romptr[jscr] ^ xor_data;
	562	}
	563	memcpy(romptr,tmprom,multfish_ROM_SIZE);
	564	}
	565	INLINE void roment_decodeh(UINT8 romptr, UINT8 tmprom, UINT8 xor_data, UINT32 xor_add)
	566	{
	567	UINT32 i, jscr;
	568
	569	for (i = 0; i < multfish_ROM_SIZE; i++)
	570	{
	571	jscr = BITSWAP24(i,23,22,21,20,19,16,18,17,14,15,12,13,11,8,10,9,6,7,4,5,2,3,1,0) ^ xor_add;
	572	tmprom[i] = romptr[jscr] ^ xor_data;
	573	}
	574	memcpy(romptr,tmprom,multfish_ROM_SIZE);
	575	}
	576
	577	static void ent_decode(running_machine *machine, UINT8 xor12, UINT8 xor34, UINT8 xor56, UINT8 xor78, UINT32 xor_addr)
	578	{
	579	UINT8 *multfish_gfx = memory_region(machine, "gfx");
	580	UINT8 *temprom = auto_alloc_array(machine, UINT8, multfish_ROM_SIZE);
	581
	582	/* ROMs decode */
	583	roment_decodel(&multfish_gfx[0x000000], temprom, xor12, xor_addr);
	584	roment_decodel(&multfish_gfx[0x100000], temprom, xor12, xor_addr);
	585	roment_decodel(&multfish_gfx[0x200000], temprom, xor34, xor_addr);
	586	roment_decodel(&multfish_gfx[0x300000], temprom, xor34, xor_addr);
	587	roment_decodeh(&multfish_gfx[0x080000], temprom, xor56, xor_addr);
	588	roment_decodeh(&multfish_gfx[0x180000], temprom, xor56, xor_addr);
	589	roment_decodeh(&multfish_gfx[0x280000], temprom, xor78, xor_addr);
	590	roment_decodeh(&multfish_gfx[0x380000], temprom, xor78, xor_addr);
	591
	592	auto_free(machine, temprom);
	593	}
	594
	595	DRIVER_INIT( island2l )
	596	{
	597	multfish_state *state = machine->driver_data<multfish_state>();
	598
	599	state->xor_palette = 0x8bf7;
	600	state->xor_paltype = 1;
558	601	lottery_decode(machine, 0xff, 0x11, 0x77, 0xee, 0x44c40);
559	602	}
560		DRIVER_INIT( keks_al~~tera~~ )
	603	DRIVER_INIT( keksl )
561	604	{
562		multfish_xor_palette = 0x41f3;
563		multfish_xor_paltype = 1;
	605	multfish_state *state = machine->driver_data<multfish_state>();
	606
	607	state->xor_palette = 0x41f3;
	608	state->xor_paltype = 1;
564	609	lottery_decode(machine, 0xdd, 0xaa, 0x22, 0x55, 0x2cac0);
565	610	}
566		DRIVER_INIT( pirate2_al~~tera~~ )
	611	DRIVER_INIT( pirate2l )
567	612	{
568		multfish_xor_palette = 0x8bfb;
569		multfish_xor_paltype = 1;
	613	multfish_state *state = machine->driver_data<multfish_state>();
	614
	615	state->xor_palette = 0x8bfb;
	616	state->xor_paltype = 1;
570	617	lottery_decode(machine, 0xaa, 0x11, 0x22, 0xee, 0x48480);
571	618	}
572		DRIVER_INIT( cockt~~ail~~2_al~~tera~~ )
	619	DRIVER_INIT( fcockt2l )
573	620	{
574		multfish_xor_palette = 0xedfb;
575		multfish_xor_paltype = 1;
	621	multfish_state *state = machine->driver_data<multfish_state>();
	622
	623	state->xor_palette = 0xedfb;
	624	state->xor_paltype = 1;
576	625	lottery_decode(machine, 0x55, 0x11, 0xff, 0xee, 0x78780);
577	626	}
578		DRIVER_INIT( sweetl2_al~~tera~~ )
	627	DRIVER_INIT( sweetl2l )
579	628	{
580		multfish_xor_palette = 0x4bf7;
581		multfish_xor_paltype = 1;
	629	multfish_state *state = machine->driver_data<multfish_state>();
	630
	631	state->xor_palette = 0x4bf7;
	632	state->xor_paltype = 1;
582	633	lottery_decode(machine, 0xdd, 0x33, 0x33, 0x77, 0x00800);
583	634	}
584		DRIVER_INIT( gnome_al~~tera~~ )
	635	DRIVER_INIT( gnomel )
585	636	{
586		multfish_xor_palette = 0x49ff;
587		multfish_xor_paltype = 1;
	637	multfish_state *state = machine->driver_data<multfish_state>();
	638
	639	state->xor_palette = 0x49ff;
	640	state->xor_paltype = 1;
588	641	lottery_decode(machine, 0xcc, 0x22, 0x33, 0x66, 0x14940);
589	642	}
590		DRIVER_INIT( crzmonent~~_altera~~ )
	643	DRIVER_INIT( crzmonent )
591	644	{
592		multfish_xor_palette = 0x1cdb;
593		multfish_xor_paltype = 2;
	645	multfish_state *state = machine->driver_data<multfish_state>();
	646
	647	state->xor_palette = 0x1cdb;
	648	state->xor_paltype = 2;
594	649	}
595		DRIVER_INIT( resdntent~~_altera~~ )
	650	DRIVER_INIT( resdntent )
596	651	{
597		multfish_xor_palette = 0x6edb;
598		multfish_xor_paltype = 2;
	652	multfish_state *state = machine->driver_data<multfish_state>();
	653
	654	state->xor_palette = 0x6edb;
	655	state->xor_paltype = 2;
599	656	}
600		DRIVER_INIT( gnomeent~~_altera~~ )
	657	DRIVER_INIT( gnomeent )
601	658	{
602		multfish_xor_palette = 0x9edb;
603		multfish_xor_paltype = 2;
	659	multfish_state *state = machine->driver_data<multfish_state>();
	660
	661	state->xor_palette = 0x9edb;
	662	state->xor_paltype = 2;
604	663	}
	664	DRIVER_INIT( lhauntent )
	665	{
	666	multfish_state *state = machine->driver_data<multfish_state>();
605	667
	668	state->xor_palette = 0x1adb;
	669	state->xor_paltype = 2;
	670	ent_decode(machine, 0x22, 0x44, 0x44, 0xbb, 0x24240);
	671	}
	672
606	673	static ADDRESS_MAP_START( multfish_map, ADDRESS_SPACE_PROGRAM, 8 )
607	674	AM_RANGE(0x0000, 0x7fff) AM_ROM AM_WRITE(multfish_vid_w)
608	675	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
609		AM_RANGE(0xc000, 0xdff7) AM_RAM AM_SHARE("nvram")
610		AM_RANGE(0xdff8, 0xdfff) AM_READWRITE(multfish_rtc_r, multfish_rtc_w)
611		AM_RANGE(0xe000, 0xffff) AM_READWRITE(bankedram_r, bankedram_w) // FIXME: actualy here SRAM
	676	AM_RANGE(0xc000, 0xdfff) AM_DEVREADWRITE("m48t35", multfish_timekeeper_r, multfish_timekeeper_w)
	677	AM_RANGE(0xe000, 0xffff) AM_READWRITE(bankedram_r, bankedram_w)
612	678	ADDRESS_MAP_END
613	679
614	680	// According to control panel the user buttons are arranged as
r9812	r9813
684	750	PORT_START("IN5")
685	751	PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
686	752	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_IMPULSE(2) // COIN D (19 B)
687		PORT_DIPNAME( 0x04, 0x04, "S Reserve (15 B)" )
	753	PORT_DIPNAME( 0x04, 0x04, "S Reserve (16 B)" )
688	754	PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
689	755	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
690	756	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP_ALL ) PORT_NAME("Bet / Double / Cancel")
r9812	r9813
833	899
834	900	static WRITE8_HANDLER( multfish_dispenable_w )
835	901	{
	902	multfish_state *state = space->machine->driver_data<multfish_state>();
836	903	//popmessage("multfish_f4_w %02x",data); // display enable?
837		~~multfi~~sh_disp_enable = data;
	904	state->disp_enable = data;
838	905	}
839	906
840	907	static ADDRESS_MAP_START( multfish_portmap, ADDRESS_SPACE_IO, 8 )
r9812	r9813
868	935	AM_RANGE(0xa0, 0xa0) AM_WRITE(multfish_bank_w) // Crazy Monkey 2 banking
869	936	AM_RANGE(0xb0, 0xb0) AM_WRITE(multfish_bank_w) // Fruit Cocktail 2 lottery banking
870	937	AM_RANGE(0xb1, 0xb1) AM_WRITE(multfish_bank_w) // Crazy Monkey Ent banking
	938	AM_RANGE(0xb2, 0xb2) AM_WRITE(multfish_bank_w) // Lacky Haunter Ent banking
871	939	AM_RANGE(0xb6, 0xb6) AM_WRITE(multfish_bank_w) // Resident Ent banking
872	940	AM_RANGE(0xbf, 0xbf) AM_WRITE(multfish_bank_w) // Gnome Ent banking
873	941	AM_RANGE(0xc7, 0xc7) AM_WRITE(multfish_bank_w) // Resident lottery banking
r9812	r9813
891	959	AM_RANGE(0xf8, 0xfd) AM_WRITE(multfish_bank_w)
892	960	ADDRESS_MAP_END
893	961
	962	static ADDRESS_MAP_START( rollfr_portmap, ADDRESS_SPACE_IO, 8 )
	963	AM_RANGE(0x33, 0x33) AM_WRITE(rollfr_hopper_w)
	964	AM_IMPORT_FROM(multfish_portmap)
	965	ADDRESS_MAP_END
894	966
895	967	static const gfx_layout tiles16x16_layout =
896	968	{
r9812	r9813
915	987	GFXDECODE_ENTRY( "gfx", 0, tiles16x16_layout, 0, 16 )
916	988	GFXDECODE_END
917	989
	990	static MACHINE_START( multfish )
	991	{
	992	multfish_state *state = machine->driver_data<multfish_state>();
	993
	994	state_save_register_global(machine, state->disp_enable);
	995	state_save_register_global(machine, state->rambk);
	996	state_save_register_global(machine, state->hopper_motor);
	997	state_save_register_global(machine, state->hopper);
	998	}
	999
918	1000	static MACHINE_RESET( multfish )
919	1001	{
	1002	multfish_state *state = machine->driver_data<multfish_state>();
	1003
920	1004	memory_configure_bank(machine, "bank1", 0, 16, memory_region(machine, "maincpu"), 0x4000);
921	1005	memory_set_bank(machine, "bank1", 0);
	1006
	1007	state->disp_enable = 0;
	1008	state->rambk = 0;
	1009	state->hopper_motor = 0;
	1010	state->hopper = 0;
922	1011	}
923	1012
924	1013	static const ay8910_interface ay8910_config =
r9812	r9813
932	1021	};
933	1022
934	1023
935		static MACHINE_CONFIG_START( multfish, dri~~ver~~_~~devic~~e )
	1024	static MACHINE_CONFIG_START( multfish, multfish_state )
936	1025	/* basic machine hardware */
937		MDRV_CPU_ADD("maincpu", Z80,~~6000000)~~ ~~/* 6~~ MHz? */
	1026	MDRV_CPU_ADD("maincpu", Z80, XTAL_24MHz/4)
938	1027	MDRV_CPU_PROGRAM_MAP(multfish_map)
939	1028	MDRV_CPU_IO_MAP(multfish_portmap)
940	1029	MDRV_CPU_VBLANK_INT("screen",irq0_line_hold)
941	1030
	1031	MDRV_MACHINE_START( multfish )
942	1032	MDRV_MACHINE_RESET( multfish )
	1033
943	1034	/* video hardware */
944	1035	MDRV_SCREEN_ADD("screen", RASTER)
945	1036	MDRV_SCREEN_REFRESH_RATE(60)
r9812	r9813
950	1041	MDRV_GFXDECODE(multfish)
951	1042	MDRV_PALETTE_LENGTH(0x1000)
952	1043
953		MDRV_NVRAM_ADD_0FILL("nvram")
954
955	1044	MDRV_VIDEO_START(multfish)
956	1045	MDRV_VIDEO_UPDATE(multfish)
957	1046
r9812	r9813
959	1048	MDRV_SOUND_ADD("aysnd", AY8910, 6000000/4)
960	1049	MDRV_SOUND_CONFIG(ay8910_config)
961	1050	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
	1051
	1052	MDRV_M48T35_ADD( "m48t35" )
962	1053	MACHINE_CONFIG_END
963	1054
	1055	static MACHINE_CONFIG_DERIVED( rollfr, multfish )
	1056	MDRV_CPU_MODIFY("maincpu")
	1057	MDRV_CPU_IO_MAP(rollfr_portmap)
	1058	MACHINE_CONFIG_END
964	1059
965	1060	static MACHINE_RESET( island2a )
966	1061	{
967	1062	MACHINE_RESET_CALL(multfish);
968	1063
969		// this set expects these values set before it will boot
970		// protection added on this bootleg?
971		multfish_bram[0x2003] = 0x01;
972		multfish_bram[0x4003] = 0x02;
	1064	// this set needs preprogrammed data in timekeeper
	1065	timekeeper_w(machine->device("m48t35"), 0x2003 , 0x01);
	1066	timekeeper_w(machine->device("m48t35"), 0x4003 , 0x02);
973	1067	}
974	1068	static MACHINE_CONFIG_DERIVED( island2a, multfish )
975	1069
r9812	r9813
982	1076	/* Rom Naming note:
983	1077
984	1078	The GFX ROMs do not have labels, for clarity we name
985		them a~~fter~~ ~~the~~ first revision ~~on w~~hich the~~y were u~~sed
	1079	them as on Igrosoft web-site hash tables.
986	1080
	1081	code roms:
	1082	xx_m_xxxxxx.rom - world relase
	1083	xx_xxxxxx.rom - release for Russia (or for all, if the game does not have different roms for different regions)
	1084	xx_l_xxxxxx.rom - lottery game
	1085	xx_e_xxxxxx.rom - entertainment game
	1086
	1087	graphics roms:
	1088	xxxxxxxx_m.00x - roms for world relase
	1089	xxxxxxxx.00x - release for Russia (or for all, if the game does not have special gfx-sets for different regions)
	1090	xxxxxxxx_loto.00x - lottery sets
	1091	xxxxxxxx_ent.00x - entertainment sets
	1092
	1093
987	1094	*/
988	1095
989	1096	/*********************************************************
r9812	r9813
995	1102	ROM_LOAD( "mf021120.rom", 0x00000, 0x40000, MD5(6021e2bfa67abdfc0beb7f291fdc9d9c) SHA1(eb7eb5aae00a77edcf328f460970eb180d86d058) )
996	1103
997	1104	ROM_REGION( 0x400000, "gfx", 0 )
998		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
999		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1000		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1001		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1002		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1003		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1004		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1005		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1105	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1106	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1107	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1108	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1109	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1110	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1111	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1112	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1006	1113	ROM_END
1007	1114
1008	1115	ROM_START( mfish_2 ) // 021121
r9812	r9813
1010	1117	ROM_LOAD( "mf021121.rom", 0x00000, 0x40000, MD5(727dc01459f6745caa2b19fbd4432055) SHA1(87a1fb81330cf4b66e17702c22fda694ebff58eb) )
1011	1118
1012	1119	ROM_REGION( 0x400000, "gfx", 0 )
1013		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1014		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1015		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1016		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1017		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1018		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1019		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1020		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1120	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1121	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1122	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1123	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1124	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1125	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1126	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1127	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1021	1128	ROM_END
1022	1129
1023	1130	ROM_START( mfish_3 ) // 021124
r9812	r9813
1025	1132	ROM_LOAD( "mf021124.rom", 0x00000, 0x40000, CRC(59fd16f5) SHA1(ea132f68e9c09c40369d4cc02c670ee6e26bdcbe) )
1026	1133
1027	1134	ROM_REGION( 0x400000, "gfx", 0 )
1028		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1029		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1030		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1031		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1032		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1033		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1034		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1035		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1135	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1136	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1137	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1138	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1139	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1140	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1141	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1142	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1036	1143	ROM_END
1037	1144
1038	1145
r9812	r9813
1041	1148	ROM_LOAD( "mf021219.rom", 0x00000, 0x40000, MD5(c8810d803d320d9fefa46588c8ef28c0) SHA1(887d456b2ba89560329457d9eaea26fb72223a38) )
1042	1149
1043	1150	ROM_REGION( 0x400000, "gfx", 0 )
1044		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1045		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1046		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1047		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1048		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1049		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1050		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1051		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1151	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1152	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1153	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1154	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1155	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1156	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1157	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1158	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1052	1159	ROM_END
1053	1160
1054	1161	ROM_START( mfish_5 ) // 021227
r9812	r9813
1056	1163	ROM_LOAD( "mf021227.rom", 0x00000, 0x40000, MD5(1bbdff5bd2b89a0c9c474286c55d16db) SHA1(58b74c41a88a781da01dba52744dc74e41deae70) )
1057	1164
1058	1165	ROM_REGION( 0x400000, "gfx", 0 )
1059		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1060		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1061		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1062		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1063		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1064		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1065		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1066		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1166	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1167	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1168	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1169	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1170	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1171	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1172	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1173	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1067	1174	ROM_END
1068	1175
1069	1176	ROM_START( mfish_6 ) // 030124
r9812	r9813
1071	1178	ROM_LOAD( "mf030124.rom", 0x00000, 0x40000, CRC(554c9cda) SHA1(b119b086bad3f6f8acc64a5809ce449800615406) )
1072	1179
1073	1180	ROM_REGION( 0x400000, "gfx", 0 )
1074		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1075		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1076		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1077		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1078		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1079		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1080		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1081		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1181	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1182	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1183	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1184	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1185	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1186	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1187	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1188	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1082	1189	ROM_END
1083	1190
1084	1191	ROM_START( mfish_7 ) // 030511
r9812	r9813
1086	1193	ROM_LOAD( "mf030511.rom", 0x00000, 0x40000, MD5(a910910ce7963a4385e31769789842f7) SHA1(06b3e3875f036782983e29e305f67a36f78a4f06) )
1087	1194
1088	1195	ROM_REGION( 0x400000, "gfx", 0 )
1089		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1090		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1091		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1092		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1093		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1094		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1095		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1096		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1196	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1197	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1198	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1199	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1200	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1201	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1202	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1203	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1097	1204	ROM_END
1098	1205
1099	1206	ROM_START( mfish_8 ) // 030522
r9812	r9813
1101	1208	ROM_LOAD( "mf030522.rom", 0x00000, 0x40000, MD5(17dc6bf0308a4ac53bdff0ade1216235) SHA1(fa80e12275b960374c84518bcaa1e32d0a4ff437) )
1102	1209
1103	1210	ROM_REGION( 0x400000, "gfx", 0 )
1104		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1105		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1106		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1107		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1108		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1109		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1110		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1111		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1211	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1212	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1213	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1214	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1215	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1216	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1217	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1218	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1112	1219	ROM_END
1113	1220
1114	1221	ROM_START( mfish_9 ) // 031026
r9812	r9813
1116	1223	ROM_LOAD( "mf031026.rom", 0x00000, 0x40000, MD5(a0a31829705ad78786f7c1bd36cee0cf) SHA1(451b390793f89188afe2b6e82fc02b474fb97a7c) )
1117	1224
1118	1225	ROM_REGION( 0x400000, "gfx", 0 )
1119		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1120		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1121		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1122		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1123		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1124		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1125		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1126		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1226	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1227	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1228	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1229	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1230	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1231	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1232	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1233	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1127	1234	ROM_END
1128	1235
1129	1236	ROM_START( mfish_10 ) // 031117
r9812	r9813
1131	1238	ROM_LOAD( "mf031117.rom", 0x00000, 0x40000, MD5(531a3e63c46be33a151c06bdd9479655) SHA1(1d244a332af0fb6aa593a246211ff2b6d2c48a59) )
1132	1239
1133	1240	ROM_REGION( 0x400000, "gfx", 0 )
1134		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1135		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1136		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1137		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1138		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1139		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1140		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1141		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1241	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1242	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1243	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1244	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1245	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1246	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1247	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1248	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1142	1249	ROM_END
1143	1250
1144	1251	ROM_START( mfish_11 ) // 031124
r9812	r9813
1146	1253	ROM_LOAD( "mf031124.rom", 0x00000, 0x40000, CRC(1d60d37a) SHA1(c0d1b541c4b076bbc810ad637acb4a2663a919ba) )
1147	1254
1148	1255	ROM_REGION( 0x400000, "gfx", 0 )
1149		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1150		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1151		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1152		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1153		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1154		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1155		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1156		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1256	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1257	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1258	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1259	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1260	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1261	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1262	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1263	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1157	1264	ROM_END
1158	1265
1159	1266	ROM_START( mfish_12 ) // 040308
r9812	r9813
1161	1268	ROM_LOAD( "mf040308.rom", 0x00000, 0x40000, CRC(adb9c1d9) SHA1(88c69f48766dc7c98a6f03c1a0a4aa63b76560b6) )
1162	1269
1163	1270	ROM_REGION( 0x400000, "gfx", 0 )
1164		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1165		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1166		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1167		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1168		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1169		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1170		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1171		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1271	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1272	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1273	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1274	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1275	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1276	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1277	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1278	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1172	1279	ROM_END
1173	1280
1174
1175	1281	ROM_START( mfish_13 ) // 040316
1176	1282	ROM_REGION( 0x40000, "maincpu", 0 )
1177	1283	ROM_LOAD( "mf040316.rom", 0x00000, 0x40000, CRC(1acf9f4f) SHA1(c1f4d1c51632a45b533d19c8b6f63d337d84d9cd) )
1178	1284
1179	1285	ROM_REGION( 0x400000, "gfx", 0 )
1180		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
1181		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
1182		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
1183		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
1184		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
1185		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
1186		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
1187		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	1286	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	1287	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	1288	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	1289	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	1290	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	1291	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	1292	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	1293	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
1188	1294	ROM_END
1189	1295
1190	1296
1191	1297	/*********************************************************
1192	1298	Crazy Monkey
1193	1299
1194		Roms 1-4 were changed after the 070315 update.
1195		The official list of hashes shows the 070315 updated roms.
	1300	"Russia" sets use different gfx roms 1-4.
	1301	The official list of hashes shows the both roms.
1196	1302
1197	1303	**********************************************************/
1198	1304
1199	1305	ROM_START( crzmon ) // 030217
1200	1306	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1201		ROM_LOAD( "cm030217.rom", 0x00000, 0x40000, MD5(5e2e4eec4cb20437a3e389003f8e2bb7) SHA1(75787f32aa4c8e8ff7bc11c57a37ad5a65f71c52) )
	1307	ROM_LOAD( "cm_m_030217.rom", 0x00000, 0x40000, MD5(5e2e4eec4cb20437a3e389003f8e2bb7) SHA1(75787f32aa4c8e8ff7bc11c57a37ad5a65f71c52) )
1202	1308
1203	1309	ROM_REGION( 0x400000, "gfx", 0 )
1204		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
1205		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
1206		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
1207		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
1208		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1209		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1210		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1211		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1310	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	1311	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	1312	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	1313	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	1314	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1315	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1316	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1317	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1212	1318	ROM_END
1213	1319
1214	1320	ROM_START( crzmon_2 ) // 030225
1215	1321	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1216		ROM_LOAD( "cm030225.rom", 0x00000, 0x40000, MD5(8f8d0ca97b5a2ad255d36094a6b30e0e) SHA1(3627a3d6a4a50ed8544456d53ab5a489af389a19) )
	1322	ROM_LOAD( "cm_m_030225.rom", 0x00000, 0x40000, MD5(8f8d0ca97b5a2ad255d36094a6b30e0e) SHA1(3627a3d6a4a50ed8544456d53ab5a489af389a19) )
1217	1323
1218	1324	ROM_REGION( 0x400000, "gfx", 0 )
1219		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
1220		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
1221		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
1222		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
1223		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1224		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1225		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1226		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1325	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	1326	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	1327	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	1328	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	1329	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1330	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1331	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1332	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1227	1333	ROM_END
1228	1334
1229	1335	ROM_START( crzmon_3 ) // 030227
1230	1336	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1231		ROM_LOAD( "cm030227.rom", 0x00000, 0x40000, MD5(e2704337640db28a92b9946209eec2b1) SHA1(4f8cd68dd2b6abeaabc9b45da18469cc6e7ac74d) )
	1337	ROM_LOAD( "cm_m_030227.rom", 0x00000, 0x40000, MD5(e2704337640db28a92b9946209eec2b1) SHA1(4f8cd68dd2b6abeaabc9b45da18469cc6e7ac74d) )
1232	1338
1233	1339	ROM_REGION( 0x400000, "gfx", 0 )
1234		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
1235		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
1236		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
1237		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
1238		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1239		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1240		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1241		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1340	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	1341	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	1342	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	1343	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	1344	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1345	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1346	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1347	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1242	1348	ROM_END
1243	1349
1244	1350	ROM_START( crzmon_4 ) // 030404
1245	1351	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1246		ROM_LOAD( "cm030404.rom", 0x00000, 0x40000, MD5(a3a9fce896f75cf9f8046c68a70a098d) SHA1(fd99caa2b6ef7218563db4f3b755e34dd551e05f) )
	1352	ROM_LOAD( "cm_m_030404.rom", 0x00000, 0x40000, MD5(a3a9fce896f75cf9f8046c68a70a098d) SHA1(fd99caa2b6ef7218563db4f3b755e34dd551e05f) )
1247	1353
1248	1354	ROM_REGION( 0x400000, "gfx", 0 )
1249		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
1250		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
1251		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
1252		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
1253		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1254		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1255		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1256		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1355	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	1356	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	1357	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	1358	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	1359	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1360	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1361	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1362	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1257	1363	ROM_END
1258	1364
1259	1365	ROM_START( crzmon_5 ) // 030421
1260	1366	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1261		ROM_LOAD( "cm030421.rom", 0x00000, 0x40000, CRC(6826564E) SHA1(6559e45e3ec39c1d201ed54a10fdb5c6aeff6582) )
	1367	ROM_LOAD( "cm_m_030421.rom", 0x00000, 0x40000, CRC(6826564E) SHA1(6559e45e3ec39c1d201ed54a10fdb5c6aeff6582) )
1262	1368
1263	1369	ROM_REGION( 0x400000, "gfx", 0 )
1264		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
1265		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
1266		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
1267		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
1268		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1269		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1270		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1271		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1370	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	1371	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	1372	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	1373	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	1374	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1375	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1376	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1377	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1272	1378	ROM_END
1273	1379
1274	1380	ROM_START( crzmon_6 ) // 031016
1275	1381	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1276		ROM_LOAD( "cm031016.rom", 0x00000, 0x40000, MD5(36901e462cd3a9d221a9cefcdf377cbe) SHA1(2f2a5ecbb311ade75f8fdc322c6e63836d4119c3) )
	1382	ROM_LOAD( "cm_m_031016.rom", 0x00000, 0x40000, MD5(36901e462cd3a9d221a9cefcdf377cbe) SHA1(2f2a5ecbb311ade75f8fdc322c6e63836d4119c3) )
1277	1383
1278	1384	ROM_REGION( 0x400000, "gfx", 0 )
1279		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
1280		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
1281		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
1282		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
1283		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1284		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1285		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1286		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1385	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	1386	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	1387	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	1388	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	1389	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1390	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1391	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1392	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1287	1393	ROM_END
1288	1394
1289	1395	ROM_START( crzmon_7 ) // 031110
1290	1396	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1291		ROM_LOAD( "cm031110.rom", 0x00000, 0x40000, CRC(d3e67980) SHA1(f0daa91abdde211a2ff61414d84386b763c30949) )
	1397	ROM_LOAD( "cm_m_031110.rom", 0x00000, 0x40000, CRC(d3e67980) SHA1(f0daa91abdde211a2ff61414d84386b763c30949) )
1292	1398
1293	1399	ROM_REGION( 0x400000, "gfx", 0 )
1294		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
1295		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
1296		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
1297		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
1298		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1299		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1300		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1301		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1400	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	1401	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	1402	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	1403	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	1404	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1405	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1406	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1407	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1302	1408	ROM_END
1303	1409
1304	1410	ROM_START( crzmon_8 ) // 050120
1305	1411	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1306		ROM_LOAD( "cm050120.rom", 0x00000, 0x40000, CRC(9af1e03f) SHA1(caadf48a36da48f4e126b286f6f5498005d8182a) )
	1412	ROM_LOAD( "cm_m_050120.rom", 0x00000, 0x40000, CRC(9af1e03f) SHA1(caadf48a36da48f4e126b286f6f5498005d8182a) )
1307	1413
1308	1414	ROM_REGION( 0x400000, "gfx", 0 )
1309		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
1310		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
1311		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
1312		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
1313		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1314		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1315		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1316		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1415	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	1416	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	1417	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	1418	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	1419	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1420	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1421	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1422	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1317	1423	ROM_END
1318	1424
1319
1320
1321	1425	ROM_START( crzmon_9 ) // 070315
1322	1426	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1323		ROM_LOAD( "cm070315.rom", 0x00000, 0x40000, CRC(5b2310b0) SHA1(b9bcb45bd97cbf1546c938512709bae44501447d) )
	1427	ROM_LOAD( "cm_070315.rom", 0x00000, 0x40000, CRC(5b2310b0) SHA1(b9bcb45bd97cbf1546c938512709bae44501447d) )
1324	1428
1325	1429	ROM_REGION( 0x400000, "gfx", 0 )
1326		ROM_LOAD( "1_070315", 0x000000, 0x80000, CRC(665ae6a1) SHA1(2ef2d657918d66d303d45d2d82430d13108f3fad) )
1327		ROM_LOAD( "2_070315", 0x100000, 0x80000, CRC(1a8e235a) SHA1(6d562cc5250283fc0c8ca7e103231a2e5bab4c69) )
1328		ROM_LOAD( "3_070315", 0x200000, 0x80000, CRC(415133eb) SHA1(227f7c8858fd5b928fdde691017104d3bd69910a) )
1329		ROM_LOAD( "4_070315", 0x300000, 0x80000, CRC(ec45fe14) SHA1(4a0fc87e2f19ea05c9a5746bb4ca7cafe5592d33) )
1330		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
1331		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
1332		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
1333		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	1430	ROM_LOAD( "crazymonkey.001", 0x000000, 0x80000, CRC(665ae6a1) SHA1(2ef2d657918d66d303d45d2d82430d13108f3fad) )
	1431	ROM_LOAD( "crazymonkey.002", 0x100000, 0x80000, CRC(1a8e235a) SHA1(6d562cc5250283fc0c8ca7e103231a2e5bab4c69) )
	1432	ROM_LOAD( "crazymonkey.003", 0x200000, 0x80000, CRC(415133eb) SHA1(227f7c8858fd5b928fdde691017104d3bd69910a) )
	1433	ROM_LOAD( "crazymonkey.004", 0x300000, 0x80000, CRC(ec45fe14) SHA1(4a0fc87e2f19ea05c9a5746bb4ca7cafe5592d33) )
	1434	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	1435	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	1436	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	1437	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
1334	1438	ROM_END
1335	1439
1336	1440
1337
1338
1339	1441	/*********************************************************
1340	1442	Fruit Cocktail
1341	1443
1342		All the roms were changed after the 070305 update.
1343		The official list of hashes shows the 070305 updated roms.
	1444	"Russia" sets use different gfx roms.
	1445	The official list of hashes shows only updated roms.
1344	1446
1345	1447	**********************************************************/
1346	1448
1347	1449	ROM_START( fcockt ) // 030505
1348	1450	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1349		ROM_LOAD( "fc030505.rom", 0x00000, 0x40000, MD5(5ee5ad269498787e5eb69194874b6544) SHA1(cc65334e8dfae5ffef1d73bd5085e3555905e259) )
	1451	ROM_LOAD( "fc_m_030505.rom", 0x00000, 0x40000, MD5(5ee5ad269498787e5eb69194874b6544) SHA1(cc65334e8dfae5ffef1d73bd5085e3555905e259) )
1350	1452
1351	1453	ROM_REGION( 0x400000, "gfx", 0 )
1352		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
1353		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
1354		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
1355		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
1356		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
1357		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
1358		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
1359		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	1454	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	1455	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	1456	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	1457	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	1458	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	1459	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	1460	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	1461	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
1360	1462	ROM_END
1361	1463
1362	1464	ROM_START( fcockt_2 ) // 030512
1363	1465	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1364		ROM_LOAD( "fc030512.rom", 0x00000, 0x40000, MD5(e94917c5935641601f17a3fe56dedb17) SHA1(c23ebcf64609a56a029f05101185f3adf73cdadd) )
	1466	ROM_LOAD( "fc_m_030512.rom", 0x00000, 0x40000, MD5(e94917c5935641601f17a3fe56dedb17) SHA1(c23ebcf64609a56a029f05101185f3adf73cdadd) )
1365	1467
1366	1468	ROM_REGION( 0x400000, "gfx", 0 )
1367		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
1368		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
1369		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
1370		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
1371		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
1372		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
1373		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
1374		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	1469	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	1470	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	1471	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	1472	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	1473	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	1474	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	1475	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	1476	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
1375	1477	ROM_END
1376	1478
1377	1479	ROM_START( fcockt_3 ) // 030623
1378	1480	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1379		ROM_LOAD( "fc030623.rom", 0x00000, 0x40000, ~~MD5~~(~~f787356afecbe~~0~~2dcfcd89~~06~~0cc30daf~~) SHA1(b95c5e06cf41762802199e1b55a5eda2243c9af7) )
	1481	ROM_LOAD( "fc_m_030623.rom", 0x00000, 0x40000, CRC(00A267B2) SHA1(b95c5e06cf41762802199e1b55a5eda2243c9af7) )
1380	1482
1381	1483	ROM_REGION( 0x400000, "gfx", 0 )
1382		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
1383		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
1384		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
1385		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
1386		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
1387		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
1388		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
1389		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	1484	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	1485	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	1486	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	1487	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	1488	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	1489	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	1490	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	1491	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
1390	1492	ROM_END
1391	1493
1392	1494	ROM_START( fcockt_4 ) // 031028
1393	1495	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1394		ROM_LOAD( "fc031028.rom", 0x00000, 0x40000, MD5(ffab543f86538d4717da7cf20d97e3d1) SHA1(18a0ac6e3c6f1d6ae7aeae5322e6b6617923cfdf) )
	1496	ROM_LOAD( "fc_m_031028.rom", 0x00000, 0x40000, MD5(ffab543f86538d4717da7cf20d97e3d1) SHA1(18a0ac6e3c6f1d6ae7aeae5322e6b6617923cfdf) )
1395	1497
1396	1498	ROM_REGION( 0x400000, "gfx", 0 )
1397		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
1398		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
1399		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
1400		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
1401		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
1402		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
1403		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
1404		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	1499	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	1500	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	1501	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	1502	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	1503	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	1504	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	1505	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	1506	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
1405	1507	ROM_END
1406	1508
1407	1509	ROM_START( fcockt_5 ) // 031111
1408	1510	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1409		ROM_LOAD( "fc031111.rom", 0x00000, 0x40000, CRC(feef74bf) SHA1(7cc9aeb88a2923f6c5c176abcd6c6b241b353eab) )
	1511	ROM_LOAD( "fc_m_031111.rom", 0x00000, 0x40000, CRC(feef74bf) SHA1(7cc9aeb88a2923f6c5c176abcd6c6b241b353eab) )
1410	1512
1411	1513	ROM_REGION( 0x400000, "gfx", 0 )
1412		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
1413		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
1414		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
1415		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
1416		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
1417		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
1418		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
1419		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	1514	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	1515	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	1516	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	1517	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	1518	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	1519	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	1520	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	1521	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
1420	1522	ROM_END
1421	1523
1422	1524	ROM_START( fcockt_6 ) // 040216
1423	1525	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1424		ROM_LOAD( "fc040216.rom", 0x00000, 0x40000, CRC(d12b0201) SHA1(09f4b0b5239609ebf13e643782d1881920a1203d) )
	1526	ROM_LOAD( "fc_m_040216.rom", 0x00000, 0x40000, CRC(d12b0201) SHA1(09f4b0b5239609ebf13e643782d1881920a1203d) )
1425	1527
1426	1528	ROM_REGION( 0x400000, "gfx", 0 )
1427		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
1428		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
1429		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
1430		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
1431		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
1432		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
1433		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
1434		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	1529	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	1530	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	1531	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	1532	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	1533	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	1534	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	1535	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	1536	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
1435	1537	ROM_END
1436	1538
1437	1539	ROM_START( fcockt_7 ) // 050118
1438	1540	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1439		ROM_LOAD( "fc050118.rom", 0x00000, 0x40000, CRC(356b140a) SHA1(d6e671b5c7fa6592f80b90b289cce0afe1a9cea3) )
	1541	ROM_LOAD( "fc_m_050118.rom", 0x00000, 0x40000, CRC(356b140a) SHA1(d6e671b5c7fa6592f80b90b289cce0afe1a9cea3) )
1440	1542
1441	1543	ROM_REGION( 0x400000, "gfx", 0 )
1442		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
1443		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
1444		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
1445		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
1446		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
1447		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
1448		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
1449		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	1544	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	1545	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	1546	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	1547	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	1548	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	1549	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	1550	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	1551	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
1450	1552	ROM_END
1451	1553
1452
1453	1554	ROM_START( fcockt_8 ) // 060111
1454	1555	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1455		ROM_LOAD( "fc060111.rom", 0x00000, 0x40000, CRC(a4af79e3) SHA1(28f40573d6c61e1937b8d05da94e197da5236f57) )
	1556	ROM_LOAD( "fc_m_060111.rom", 0x00000, 0x40000, CRC(a4af79e3) SHA1(28f40573d6c61e1937b8d05da94e197da5236f57) )
1456	1557
1457	1558	ROM_REGION( 0x400000, "gfx", 0 )
1458		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
1459		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
1460		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
1461		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
1462		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
1463		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
1464		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
1465		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	1559	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	1560	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	1561	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	1562	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	1563	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	1564	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	1565	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	1566	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
1466	1567	ROM_END
1467	1568
1468
1469
1470
1471	1569	ROM_START( fcockt_9 ) // 070305
1472	1570	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1473		ROM_LOAD( "fc070305.rom", 0x00000, 0x40000, CRC(4eb835d9) SHA1(406b2fcad0ca587eacee123ac4b040cb6f6db18c) )
	1571	ROM_LOAD( "fc_070305.rom", 0x00000, 0x40000, CRC(4eb835d9) SHA1(406b2fcad0ca587eacee123ac4b040cb6f6db18c) )
1474	1572
1475	1573	ROM_REGION( 0x400000, "gfx", 0 )
1476		ROM_LOAD( "1_070305", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
1477		ROM_LOAD( "2_070305", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
1478		ROM_LOAD( "3_070305", 0x200000, 0x80000, CRC(01fc1a18) SHA1(4f73c6cde6ed741cc8c1bc32442f572ee7ba208a) )
1479		ROM_LOAD( "4_070305", 0x300000, 0x80000, CRC(68daa864) SHA1(b05c455e23ace80e102699616b75f3a0946c04bc) )
1480		ROM_LOAD( "5_070305", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
1481		ROM_LOAD( "6_070305", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
1482		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) ) // this remains the same
1483		ROM_LOAD( "8_070305", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
	1574	ROM_LOAD( "fruitcocktail.001", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
	1575	ROM_LOAD( "fruitcocktail.002", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
	1576	ROM_LOAD( "fruitcocktail.003", 0x200000, 0x80000, CRC(01fc1a18) SHA1(4f73c6cde6ed741cc8c1bc32442f572ee7ba208a) )
	1577	ROM_LOAD( "fruitcocktail.004", 0x300000, 0x80000, CRC(68daa864) SHA1(b05c455e23ace80e102699616b75f3a0946c04bc) )
	1578	ROM_LOAD( "fruitcocktail.005", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
	1579	ROM_LOAD( "fruitcocktail.006", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
	1580	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) ) // this remains the same
	1581	ROM_LOAD( "fruitcocktail.008", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
1484	1582	ROM_END
1485	1583
1486	1584	ROM_START( fcockt_10 ) // 070517
1487	1585	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1488		ROM_LOAD( "fc070517.rom", 0x00000, 0x40000, CRC(8b43f765) SHA1(86412c37252cf1f12a3acd9359bbf1cdcf52da9f) )
	1586	ROM_LOAD( "fc_070517.rom", 0x00000, 0x40000, CRC(8b43f765) SHA1(86412c37252cf1f12a3acd9359bbf1cdcf52da9f) )
1489	1587
1490	1588	ROM_REGION( 0x400000, "gfx", 0 )
1491		ROM_LOAD( "1_070305", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
1492		ROM_LOAD( "2_070305", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
1493		ROM_LOAD( "3_070305", 0x200000, 0x80000, CRC(01fc1a18) SHA1(4f73c6cde6ed741cc8c1bc32442f572ee7ba208a) )
1494		ROM_LOAD( "4_070305", 0x300000, 0x80000, CRC(68daa864) SHA1(b05c455e23ace80e102699616b75f3a0946c04bc) )
1495		ROM_LOAD( "5_070305", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
1496		ROM_LOAD( "6_070305", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
1497		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) ) // this remains the same
1498		ROM_LOAD( "8_070305", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
	1589	ROM_LOAD( "fruitcocktail.001", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
	1590	ROM_LOAD( "fruitcocktail.002", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
	1591	ROM_LOAD( "fruitcocktail.003", 0x200000, 0x80000, CRC(01fc1a18) SHA1(4f73c6cde6ed741cc8c1bc32442f572ee7ba208a) )
	1592	ROM_LOAD( "fruitcocktail.004", 0x300000, 0x80000, CRC(68daa864) SHA1(b05c455e23ace80e102699616b75f3a0946c04bc) )
	1593	ROM_LOAD( "fruitcocktail.005", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
	1594	ROM_LOAD( "fruitcocktail.006", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
	1595	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) ) // this remains the same
	1596	ROM_LOAD( "fruitcocktail.008", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
1499	1597	ROM_END
1500	1598
1501	1599	ROM_START( fcockt_11 ) // 070822
1502	1600	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1503		ROM_LOAD( "fc070822.rom", 0x00000, 0x40000, CRC(f156657d) SHA1(bd538e714a87461bdf84df18ae3f8caeee876747) )
	1601	ROM_LOAD( "fc_070822.rom", 0x00000, 0x40000, CRC(f156657d) SHA1(bd538e714a87461bdf84df18ae3f8caeee876747) )
1504	1602
1505	1603	ROM_REGION( 0x400000, "gfx", 0 )
1506		ROM_LOAD( "1_070305", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
1507		ROM_LOAD( "2_070305", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
1508		ROM_LOAD( "3_070305", 0x200000, 0x80000, CRC(01fc1a18) SHA1(4f73c6cde6ed741cc8c1bc32442f572ee7ba208a) )
1509		ROM_LOAD( "4_070305", 0x300000, 0x80000, CRC(68daa864) SHA1(b05c455e23ace80e102699616b75f3a0946c04bc) )
1510		ROM_LOAD( "5_070305", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
1511		ROM_LOAD( "6_070305", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
1512		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) ) // this remains the same
1513		ROM_LOAD( "8_070305", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
	1604	ROM_LOAD( "fruitcocktail.001", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
	1605	ROM_LOAD( "fruitcocktail.002", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
	1606	ROM_LOAD( "fruitcocktail.003", 0x200000, 0x80000, CRC(01fc1a18) SHA1(4f73c6cde6ed741cc8c1bc32442f572ee7ba208a) )
	1607	ROM_LOAD( "fruitcocktail.004", 0x300000, 0x80000, CRC(68daa864) SHA1(b05c455e23ace80e102699616b75f3a0946c04bc) )
	1608	ROM_LOAD( "fruitcocktail.005", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
	1609	ROM_LOAD( "fruitcocktail.006", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
	1610	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) ) // this remains the same
	1611	ROM_LOAD( "fruitcocktail.008", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
1514	1612	ROM_END
1515	1613
1516	1614	ROM_START( fcockt_12 ) // 070911
1517	1615	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1518		ROM_LOAD( "fc070911.rom", 0x00000, 0x40000, CRC(17c015bb) SHA1(5369549853f1c463b999bb4ff9d06c5d8e467c5b) )
	1616	ROM_LOAD( "fc_070911.rom", 0x00000, 0x40000, CRC(17c015bb) SHA1(5369549853f1c463b999bb4ff9d06c5d8e467c5b) )
1519	1617
1520	1618	ROM_REGION( 0x400000, "gfx", 0 )
1521		ROM_LOAD( "1_070305", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
1522		ROM_LOAD( "2_070305", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
1523		ROM_LOAD( "3_070305", 0x200000, 0x80000, CRC(01fc1a18) SHA1(4f73c6cde6ed741cc8c1bc32442f572ee7ba208a) )
1524		ROM_LOAD( "4_070305", 0x300000, 0x80000, CRC(68daa864) SHA1(b05c455e23ace80e102699616b75f3a0946c04bc) )
1525		ROM_LOAD( "5_070305", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
1526		ROM_LOAD( "6_070305", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
1527		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) ) // this remains the same
1528		ROM_LOAD( "8_070305", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
	1619	ROM_LOAD( "fruitcocktail.001", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
	1620	ROM_LOAD( "fruitcocktail.002", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
	1621	ROM_LOAD( "fruitcocktail.003", 0x200000, 0x80000, CRC(01fc1a18) SHA1(4f73c6cde6ed741cc8c1bc32442f572ee7ba208a) )
	1622	ROM_LOAD( "fruitcocktail.004", 0x300000, 0x80000, CRC(68daa864) SHA1(b05c455e23ace80e102699616b75f3a0946c04bc) )
	1623	ROM_LOAD( "fruitcocktail.005", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
	1624	ROM_LOAD( "fruitcocktail.006", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
	1625	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) ) // this remains the same
	1626	ROM_LOAD( "fruitcocktail.008", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
1529	1627	ROM_END
1530	1628
1531	1629
1532
1533	1630	/*********************************************************
1534	1631	Lucky Haunter
1535	1632
1536		Roms 1-4 were changed after the 070402 update.
1537		The official list of hashes shows the 070402 updated roms.
	1633	"Russia" sets use different gfx roms 1-4.
	1634	The official list of hashes shows only updated roms.
1538	1635
1539	1636	**********************************************************/
1540	1637
1541	1638	ROM_START( lhaunt ) // 030707
1542	1639	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1543		ROM_LOAD( "lh030707.rom", 0x00000, 0x40000, MD5(f2e42fb479888c21351e3029025e6700) SHA1(c7b8e1b98cd0aa665d62c1652716993539c9f3ef) )
	1640	ROM_LOAD( "lh_m_030707.rom", 0x00000, 0x40000, MD5(f2e42fb479888c21351e3029025e6700) SHA1(c7b8e1b98cd0aa665d62c1652716993539c9f3ef) )
1544	1641
1545	1642	ROM_REGION( 0x400000, "gfx", 0 )
1546		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
1547		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
1548		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
1549		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
1550		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1551		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1552		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1553		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	1643	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	1644	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	1645	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	1646	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	1647	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	1648	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	1649	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	1650	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1554	1651	ROM_END
1555	1652
1556
1557	1653	ROM_START( lhaunt_2 ) // 030804
1558	1654	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1559		ROM_LOAD( "lh030804.rom", 0x00000, 0x40000, ~~MD5~~(~~0135~~2~~f3dd0e~~7~~d301f8edfb170600e~~2a1) SHA1(b75702a678d716cd0ccb1f2d1e58c1d3e9f7ca98) )
	1655	ROM_LOAD( "lh_m_030804.rom", 0x00000, 0x40000, CRC(2A9A7267) SHA1(b75702a678d716cd0ccb1f2d1e58c1d3e9f7ca98) )
1560	1656
1561	1657	ROM_REGION( 0x400000, "gfx", 0 )
1562		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
1563		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
1564		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
1565		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
1566		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1567		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1568		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1569		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	1658	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	1659	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	1660	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	1661	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	1662	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	1663	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	1664	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	1665	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1570	1666	ROM_END
1571	1667
1572	1668	ROM_START( lhaunt_3 ) // 031027
1573	1669	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1574		ROM_LOAD( "lh031027.rom", 0x00000, 0x40000, MD5(49b1cf6f89d03b36c5f80d0ccfc23aa2) SHA1(caec736dde2878588ab197ba37801cf7a9ed975b) )
	1670	ROM_LOAD( "lh_m_031027.rom", 0x00000, 0x40000, MD5(49b1cf6f89d03b36c5f80d0ccfc23aa2) SHA1(caec736dde2878588ab197ba37801cf7a9ed975b) )
1575	1671
1576	1672	ROM_REGION( 0x400000, "gfx", 0 )
1577		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
1578		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
1579		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
1580		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
1581		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1582		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1583		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1584		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	1673	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	1674	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	1675	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	1676	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	1677	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	1678	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	1679	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	1680	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1585	1681	ROM_END
1586	1682
1587	1683	ROM_START( lhaunt_4 ) // 031111
1588	1684	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1589		ROM_LOAD( "lh031111.rom", 0x00000, 0x40000, CRC(fc357b75) SHA1(512e4f57612851284bb93ba97c276cbc7cb758d9) )
	1685	ROM_LOAD( "lh_m_031111.rom", 0x00000, 0x40000, CRC(fc357b75) SHA1(512e4f57612851284bb93ba97c276cbc7cb758d9) )
1590	1686
1591	1687	ROM_REGION( 0x400000, "gfx", 0 )
1592		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
1593		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
1594		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
1595		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
1596		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1597		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1598		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1599		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	1688	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	1689	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	1690	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	1691	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	1692	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	1693	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	1694	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	1695	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1600	1696	ROM_END
1601	1697
1602	1698	ROM_START( lhaunt_5 ) // 040216
1603	1699	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1604		ROM_LOAD( "lh040216.rom", 0x00000, 0x40000, CRC(558d8345) SHA1(30a87902b291413b1e6eaad6bf4964c54e391e23) )
	1700	ROM_LOAD( "lh_m_040216.rom", 0x00000, 0x40000, CRC(558d8345) SHA1(30a87902b291413b1e6eaad6bf4964c54e391e23) )
1605	1701
1606	1702	ROM_REGION( 0x400000, "gfx", 0 )
1607		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
1608		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
1609		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
1610		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
1611		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1612		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1613		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1614		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	1703	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	1704	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	1705	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	1706	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	1707	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	1708	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	1709	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	1710	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1615	1711	ROM_END
1616	1712
1617		ROM_START( lhaunt_5a ) // 040216 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
1618		ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1619		ROM_LOAD( "lh040216a.rom", 0x00000, 0x40000, CRC(2a6c7ff9) SHA1(4a0137c7df5003e8fd843d5489d416d15f001f46) ) /* Not officially listed on Igrosoft's web site hash page */
1620
1621		ROM_REGION( 0x400000, "gfx", 0 )
1622		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
1623		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
1624		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
1625		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
1626		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1627		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1628		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1629		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1630		ROM_END
1631
1632	1713	ROM_START( lhaunt_6 ) // 040825
1633	1714	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1634		ROM_LOAD( "lh040825.rom", 0x00000, 0x40000, CRC(f9924fa1) SHA1(57a1730fef4963d30f3991f27021647a8c681952) )
	1715	ROM_LOAD( "lh_m_040825.rom", 0x00000, 0x40000, CRC(f9924fa1) SHA1(57a1730fef4963d30f3991f27021647a8c681952) )
1635	1716
1636	1717	ROM_REGION( 0x400000, "gfx", 0 )
1637		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
1638		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
1639		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
1640		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
1641		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1642		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1643		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1644		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	1718	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	1719	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	1720	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	1721	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	1722	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	1723	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	1724	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	1725	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1645	1726	ROM_END
1646	1727
1647	1728	ROM_START( lhaunt_7 ) // 070402
1648	1729	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1649		ROM_LOAD( "lh070402.rom", 0x00000, 0x40000, CRC(16e921d9) SHA1(66849020a451d0c1dc4ac310e98fa7ef6a962548) )
	1730	ROM_LOAD( "lh_070402.rom", 0x00000, 0x40000, CRC(16e921d9) SHA1(66849020a451d0c1dc4ac310e98fa7ef6a962548) )
1650	1731
1651	1732	ROM_REGION( 0x400000, "gfx", 0 )
1652		ROM_LOAD( "1_070402", 0x000000, 0x80000, CRC(c541ce0f) SHA1(5b5ad171168f204e1a4892a4be06a4983dcfc5e5) )
1653		ROM_LOAD( "2_070402", 0x100000, 0x80000, CRC(ea49e52f) SHA1(7c6b0da1c4ebca5439dda7d38882055b47d00169) )
1654		ROM_LOAD( "3_070402", 0x200000, 0x80000, CRC(f601cd05) SHA1(b983d703ff5f5795ed60248cd4affc91f983072c) )
1655		ROM_LOAD( "4_070402", 0x300000, 0x80000, CRC(10040104) SHA1(966abcccb67949b73f84ffc85ead70b10856fa5b) )
1656		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1657		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1658		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1659		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	1733	ROM_LOAD( "luckyhaunter.001", 0x000000, 0x80000, CRC(c541ce0f) SHA1(5b5ad171168f204e1a4892a4be06a4983dcfc5e5) )
	1734	ROM_LOAD( "luckyhaunter.002", 0x100000, 0x80000, CRC(ea49e52f) SHA1(7c6b0da1c4ebca5439dda7d38882055b47d00169) )
	1735	ROM_LOAD( "luckyhaunter.003", 0x200000, 0x80000, CRC(f601cd05) SHA1(b983d703ff5f5795ed60248cd4affc91f983072c) )
	1736	ROM_LOAD( "luckyhaunter.004", 0x300000, 0x80000, CRC(10040104) SHA1(966abcccb67949b73f84ffc85ead70b10856fa5b) )
	1737	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	1738	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	1739	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	1740	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1660	1741	ROM_END
1661	1742
1662	1743	ROM_START( lhaunt_8 ) // 070604
1663	1744	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1664		ROM_LOAD( "lh070604.rom", 0x00000, 0x40000, CRC(a9e80888) SHA1(57fdfc1149db1555808040a7a902dec5f1389943) )
	1745	ROM_LOAD( "lh_070604.rom", 0x00000, 0x40000, CRC(a9e80888) SHA1(57fdfc1149db1555808040a7a902dec5f1389943) )
1665	1746
1666	1747	ROM_REGION( 0x400000, "gfx", 0 )
1667		ROM_LOAD( "1_070402", 0x000000, 0x80000, CRC(c541ce0f) SHA1(5b5ad171168f204e1a4892a4be06a4983dcfc5e5) )
1668		ROM_LOAD( "2_070402", 0x100000, 0x80000, CRC(ea49e52f) SHA1(7c6b0da1c4ebca5439dda7d38882055b47d00169) )
1669		ROM_LOAD( "3_070402", 0x200000, 0x80000, CRC(f601cd05) SHA1(b983d703ff5f5795ed60248cd4affc91f983072c) )
1670		ROM_LOAD( "4_070402", 0x300000, 0x80000, CRC(10040104) SHA1(966abcccb67949b73f84ffc85ead70b10856fa5b) )
1671		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
1672		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
1673		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
1674		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	1748	ROM_LOAD( "luckyhaunter.001", 0x000000, 0x80000, CRC(c541ce0f) SHA1(5b5ad171168f204e1a4892a4be06a4983dcfc5e5) )
	1749	ROM_LOAD( "luckyhaunter.002", 0x100000, 0x80000, CRC(ea49e52f) SHA1(7c6b0da1c4ebca5439dda7d38882055b47d00169) )
	1750	ROM_LOAD( "luckyhaunter.003", 0x200000, 0x80000, CRC(f601cd05) SHA1(b983d703ff5f5795ed60248cd4affc91f983072c) )
	1751	ROM_LOAD( "luckyhaunter.004", 0x300000, 0x80000, CRC(10040104) SHA1(966abcccb67949b73f84ffc85ead70b10856fa5b) )
	1752	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	1753	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	1754	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	1755	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
1675	1756	ROM_END
1676	1757
	1758
	1759
1677	1760	/*********************************************************
1678	1761	Garage
1679	1762
1680		Roms 1-4 were changed after the 070213 update.
1681		The official list of hashes shows the 070213 updated roms.
	1763	"Russia" sets use different gfx roms 1-4.
	1764	The official list of hashes shows only updated roms.
1682	1765
1683	1766	**********************************************************/
1684	1767
1685	1768	ROM_START( garage ) // 040122
1686	1769	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1687		ROM_LOAD( "gg040122.rom", 0x00000, 0x40000, MD5(b1fca0a1293d6891171b168ade2112c0) SHA1(327e55d1f4bdc0ad0556faa2fbdaa05b9a5f1c16) )
	1770	ROM_LOAD( "gg_m_040122.rom", 0x00000, 0x40000, MD5(b1fca0a1293d6891171b168ade2112c0) SHA1(327e55d1f4bdc0ad0556faa2fbdaa05b9a5f1c16) )
1688	1771
1689	1772	ROM_REGION( 0x400000, "gfx", 0 )
1690		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
1691		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
1692		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
1693		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
1694		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
1695		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
1696		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
1697		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	1773	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	1774	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	1775	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	1776	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	1777	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	1778	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	1779	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	1780	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
1698	1781	ROM_END
1699	1782
1700	1783	ROM_START( garage_2 ) // 040123
1701	1784	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1702		ROM_LOAD( "gg040123.rom", 0x00000, 0x40000, MD5(7b66e7c7b9ddf74bd344a626c64fce5e) SHA1(3051c99d22cfe46b532fcc59a0b98eec186f4a76) )
	1785	ROM_LOAD( "gg_m_040123.rom", 0x00000, 0x40000, MD5(7b66e7c7b9ddf74bd344a626c64fce5e) SHA1(3051c99d22cfe46b532fcc59a0b98eec186f4a76) )
1703	1786
1704	1787	ROM_REGION( 0x400000, "gfx", 0 )
1705		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
1706		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
1707		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
1708		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
1709		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
1710		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
1711		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
1712		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	1788	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	1789	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	1790	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	1791	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	1792	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	1793	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	1794	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	1795	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
1713	1796	ROM_END
1714	1797
1715	1798	ROM_START( garage_3 ) // 040216
1716	1799	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1717		ROM_LOAD( "gg040216.rom", 0x00000, 0x40000, MD5(9d89036118ece87c98bb9b64021014ff) SHA1(321c4106ce07e195a05eacdef6387d61d5e58bb9) )
	1800	ROM_LOAD( "gg_m_040216.rom", 0x00000, 0x40000, MD5(9d89036118ece87c98bb9b64021014ff) SHA1(321c4106ce07e195a05eacdef6387d61d5e58bb9) )
1718	1801
1719	1802	ROM_REGION( 0x400000, "gfx", 0 )
1720		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
1721		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
1722		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
1723		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
1724		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
1725		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
1726		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
1727		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	1803	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	1804	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	1805	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	1806	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	1807	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	1808	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	1809	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	1810	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
1728	1811	ROM_END
1729	1812
1730	1813	ROM_START( garage_4 ) // 040219
1731	1814	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1732		ROM_LOAD( "gg040219.rom", 0x00000, 0x40000, CRC(49fe4a55) SHA1(df55df0065b4718d2b0c7ff3da85f5d66c2dd95f) )
	1815	ROM_LOAD( "gg_m_040219.rom", 0x00000, 0x40000, CRC(49fe4a55) SHA1(df55df0065b4718d2b0c7ff3da85f5d66c2dd95f) )
1733	1816
1734	1817	ROM_REGION( 0x400000, "gfx", 0 )
1735		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
1736		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
1737		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
1738		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
1739		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
1740		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
1741		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
1742		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	1818	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	1819	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	1820	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	1821	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	1822	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	1823	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	1824	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	1825	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
1743	1826	ROM_END
1744	1827
1745
1746	1828	ROM_START( garage_5 ) // 050311
1747	1829	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1748		ROM_LOAD( "gg050311.rom", 0x00000, 0x40000, CRC(405aee88) SHA1(356a8c309434ae4ad6b6fab97aeaece8aa60a730) )
	1830	ROM_LOAD( "gg_m_050311.rom", 0x00000, 0x40000, CRC(405aee88) SHA1(356a8c309434ae4ad6b6fab97aeaece8aa60a730) )
1749	1831
1750	1832	ROM_REGION( 0x400000, "gfx", 0 )
1751		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
1752		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
1753		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
1754		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
1755		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
1756		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
1757		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
1758		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	1833	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	1834	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	1835	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	1836	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	1837	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	1838	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	1839	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	1840	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
1759	1841	ROM_END
1760	1842
1761
1762	1843	ROM_START( garage_6 ) // 070213
1763	1844	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1764		ROM_LOAD( "gg070213.rom", 0x00000, 0x40000, CRC(2ae974c3) SHA1(61076d4154befffd3f90ae32b9bfa0e8d003ae72) )
	1845	ROM_LOAD( "gg_070213.rom", 0x00000, 0x40000, CRC(2ae974c3) SHA1(61076d4154befffd3f90ae32b9bfa0e8d003ae72) )
1765	1846
1766	1847	ROM_REGION( 0x400000, "gfx", 0 )
1767		ROM_LOAD( "1_070213", 0x000000, 0x80000, CRC(15349b8c) SHA1(4f59e67114d7440dab82655787a6df9404bcb4b2) )
1768		ROM_LOAD( "2_070213", 0x100000, 0x80000, CRC(634d1f94) SHA1(d979b0c22c7722eea8789296e9bd3f65b27a2b50) )
1769		ROM_LOAD( "3_070213", 0x200000, 0x80000, CRC(3fb65c28) SHA1(0b3cacc8907267be84051c562bce1fc82701a5d5) )
1770		ROM_LOAD( "4_070213", 0x300000, 0x80000, CRC(fc489452) SHA1(ac421f99c3ac3c9b7adf274881c00cbee65b6df5) )
1771		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
1772		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
1773		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
1774		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	1848	ROM_LOAD( "garage.001", 0x000000, 0x80000, CRC(15349b8c) SHA1(4f59e67114d7440dab82655787a6df9404bcb4b2) )
	1849	ROM_LOAD( "garage.002", 0x100000, 0x80000, CRC(634d1f94) SHA1(d979b0c22c7722eea8789296e9bd3f65b27a2b50) )
	1850	ROM_LOAD( "garage.003", 0x200000, 0x80000, CRC(3fb65c28) SHA1(0b3cacc8907267be84051c562bce1fc82701a5d5) )
	1851	ROM_LOAD( "garage.004", 0x300000, 0x80000, CRC(fc489452) SHA1(ac421f99c3ac3c9b7adf274881c00cbee65b6df5) )
	1852	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	1853	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	1854	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	1855	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
1775	1856	ROM_END
1776	1857
1777	1858	ROM_START( garage_7 ) // 070329
1778	1859	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1779		ROM_LOAD( "gg070329.rom", 0x00000, 0x40000, CRC(2bd50a8f) SHA1(b0c66eb0ae40b87f81ee5bb66dc4ff7d7acd14bd) )
	1860	ROM_LOAD( "gg_070329.rom", 0x00000, 0x40000, CRC(2bd50a8f) SHA1(b0c66eb0ae40b87f81ee5bb66dc4ff7d7acd14bd) )
1780	1861
1781	1862	ROM_REGION( 0x400000, "gfx", 0 )
1782		ROM_LOAD( "1_070213", 0x000000, 0x80000, CRC(15349b8c) SHA1(4f59e67114d7440dab82655787a6df9404bcb4b2) )
1783		ROM_LOAD( "2_070213", 0x100000, 0x80000, CRC(634d1f94) SHA1(d979b0c22c7722eea8789296e9bd3f65b27a2b50) )
1784		ROM_LOAD( "3_070213", 0x200000, 0x80000, CRC(3fb65c28) SHA1(0b3cacc8907267be84051c562bce1fc82701a5d5) )
1785		ROM_LOAD( "4_070213", 0x300000, 0x80000, CRC(fc489452) SHA1(ac421f99c3ac3c9b7adf274881c00cbee65b6df5) )
1786		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
1787		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
1788		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
1789		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	1863	ROM_LOAD( "garage.001", 0x000000, 0x80000, CRC(15349b8c) SHA1(4f59e67114d7440dab82655787a6df9404bcb4b2) )
	1864	ROM_LOAD( "garage.002", 0x100000, 0x80000, CRC(634d1f94) SHA1(d979b0c22c7722eea8789296e9bd3f65b27a2b50) )
	1865	ROM_LOAD( "garage.003", 0x200000, 0x80000, CRC(3fb65c28) SHA1(0b3cacc8907267be84051c562bce1fc82701a5d5) )
	1866	ROM_LOAD( "garage.004", 0x300000, 0x80000, CRC(fc489452) SHA1(ac421f99c3ac3c9b7adf274881c00cbee65b6df5) )
	1867	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	1868	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	1869	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	1870	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
1790	1871	ROM_END
1791	1872
1792	1873
1793
1794	1874	/*********************************************************
1795	1875	Rock Climber
1796	1876
1797		Roms 1-4 were changed after the 070322 update.
1798		The official list of hashes shows the 070322 updated roms.
	1877	"Russia" sets use different gfx roms 1-4.
	1878	The official list of hashes shows only updated roms.
1799	1879
1800
1801	1880	**********************************************************/
1802	1881
1803	1882	ROM_START( rclimb ) // 040815
1804	1883	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1805		ROM_LOAD( "rc040815.rom", 0x00000, 0x40000, CRC(5efd5c86) SHA1(593e64bfe57ba271c04bdd2a35c9484c4efaaa00))
	1884	ROM_LOAD( "rc_m_040815.rom", 0x00000, 0x40000, CRC(5efd5c86) SHA1(593e64bfe57ba271c04bdd2a35c9484c4efaaa00))
1806	1885
1807	1886	ROM_REGION( 0x400000, "gfx", 0 )
1808		ROM_LOAD( "1_040815", 0x000000, 0x80000, CRC(934f18c7) SHA1(da3a7cddc68e104d415d947e89c0e7f0d067c056) )
1809		ROM_LOAD( "2_040815", 0x100000, 0x80000, CRC(7364bd2b) SHA1(c0edfd3b8de813c95fe5d6072662fa0e39fec89e) )
1810		ROM_LOAD( "3_040815", 0x200000, 0x80000, CRC(e7befb17) SHA1(8a214680142cd657784a667ab3f6422165fea224) )
1811		ROM_LOAD( "4_040815", 0x300000, 0x80000, CRC(dc6d43a0) SHA1(62fc47136775f3fa9369857ec91fe897a1f1ebd6) )
1812		ROM_LOAD( "5_040815", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
1813		ROM_LOAD( "6_040815", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
1814		ROM_LOAD( "7_040815", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
1815		ROM_LOAD( "8_040815", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
	1887	ROM_LOAD( "rockclimber_m.001", 0x000000, 0x80000, CRC(934f18c7) SHA1(da3a7cddc68e104d415d947e89c0e7f0d067c056) )
	1888	ROM_LOAD( "rockclimber_m.002", 0x100000, 0x80000, CRC(7364bd2b) SHA1(c0edfd3b8de813c95fe5d6072662fa0e39fec89e) )
	1889	ROM_LOAD( "rockclimber_m.003", 0x200000, 0x80000, CRC(e7befb17) SHA1(8a214680142cd657784a667ab3f6422165fea224) )
	1890	ROM_LOAD( "rockclimber_m.004", 0x300000, 0x80000, CRC(dc6d43a0) SHA1(62fc47136775f3fa9369857ec91fe897a1f1ebd6) )
	1891	ROM_LOAD( "rockclimber_m.005", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
	1892	ROM_LOAD( "rockclimber_m.006", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
	1893	ROM_LOAD( "rockclimber_m.007", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
	1894	ROM_LOAD( "rockclimber_m.008", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
1816	1895	ROM_END
1817	1896
1818	1897	ROM_START( rclimb_2 ) // 040823
1819	1898	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1820		ROM_LOAD( "rc040823.rom", 0x00000, 0x40000, MD5(f3f5edf6f838f07f4848fbcf9e566a38) SHA1(31cf4d7f50102d35556817273893182e30c9a70c) )
	1899	ROM_LOAD( "rc_m_040823.rom", 0x00000, 0x40000, MD5(f3f5edf6f838f07f4848fbcf9e566a38) SHA1(31cf4d7f50102d35556817273893182e30c9a70c) )
1821	1900
1822	1901	ROM_REGION( 0x400000, "gfx", 0 )
1823		ROM_LOAD( "1_040815", 0x000000, 0x80000, CRC(934f18c7) SHA1(da3a7cddc68e104d415d947e89c0e7f0d067c056) )
1824		ROM_LOAD( "2_040815", 0x100000, 0x80000, CRC(7364bd2b) SHA1(c0edfd3b8de813c95fe5d6072662fa0e39fec89e) )
1825		ROM_LOAD( "3_040815", 0x200000, 0x80000, CRC(e7befb17) SHA1(8a214680142cd657784a667ab3f6422165fea224) )
1826		ROM_LOAD( "4_040815", 0x300000, 0x80000, CRC(dc6d43a0) SHA1(62fc47136775f3fa9369857ec91fe897a1f1ebd6) )
1827		ROM_LOAD( "5_040815", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
1828		ROM_LOAD( "6_040815", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
1829		ROM_LOAD( "7_040815", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
1830		ROM_LOAD( "8_040815", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
	1902	ROM_LOAD( "rockclimber_m.001", 0x000000, 0x80000, CRC(934f18c7) SHA1(da3a7cddc68e104d415d947e89c0e7f0d067c056) )
	1903	ROM_LOAD( "rockclimber_m.002", 0x100000, 0x80000, CRC(7364bd2b) SHA1(c0edfd3b8de813c95fe5d6072662fa0e39fec89e) )
	1904	ROM_LOAD( "rockclimber_m.003", 0x200000, 0x80000, CRC(e7befb17) SHA1(8a214680142cd657784a667ab3f6422165fea224) )
	1905	ROM_LOAD( "rockclimber_m.004", 0x300000, 0x80000, CRC(dc6d43a0) SHA1(62fc47136775f3fa9369857ec91fe897a1f1ebd6) )
	1906	ROM_LOAD( "rockclimber_m.005", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
	1907	ROM_LOAD( "rockclimber_m.006", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
	1908	ROM_LOAD( "rockclimber_m.007", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
	1909	ROM_LOAD( "rockclimber_m.008", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
1831	1910	ROM_END
1832	1911
1833	1912	ROM_START( rclimb_3 ) // 040827
1834	1913	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1835		ROM_LOAD( "rc040827.rom", 0x00000, 0x40000, CRC(3ba55647) SHA1(56e96be0d9782da4b3d5d911ea67962257626ae0) )
	1914	ROM_LOAD( "rc_m_040827.rom", 0x00000, 0x40000, CRC(3ba55647) SHA1(56e96be0d9782da4b3d5d911ea67962257626ae0) )
1836	1915
1837	1916	ROM_REGION( 0x400000, "gfx", 0 )
1838		ROM_LOAD( "1_040815", 0x000000, 0x80000, CRC(934f18c7) SHA1(da3a7cddc68e104d415d947e89c0e7f0d067c056) )
1839		ROM_LOAD( "2_040815", 0x100000, 0x80000, CRC(7364bd2b) SHA1(c0edfd3b8de813c95fe5d6072662fa0e39fec89e) )
1840		ROM_LOAD( "3_040815", 0x200000, 0x80000, CRC(e7befb17) SHA1(8a214680142cd657784a667ab3f6422165fea224) )
1841		ROM_LOAD( "4_040815", 0x300000, 0x80000, CRC(dc6d43a0) SHA1(62fc47136775f3fa9369857ec91fe897a1f1ebd6) )
1842		ROM_LOAD( "5_040815", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
1843		ROM_LOAD( "6_040815", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
1844		ROM_LOAD( "7_040815", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
1845		ROM_LOAD( "8_040815", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
	1917	ROM_LOAD( "rockclimber_m.001", 0x000000, 0x80000, CRC(934f18c7) SHA1(da3a7cddc68e104d415d947e89c0e7f0d067c056) )
	1918	ROM_LOAD( "rockclimber_m.002", 0x100000, 0x80000, CRC(7364bd2b) SHA1(c0edfd3b8de813c95fe5d6072662fa0e39fec89e) )
	1919	ROM_LOAD( "rockclimber_m.003", 0x200000, 0x80000, CRC(e7befb17) SHA1(8a214680142cd657784a667ab3f6422165fea224) )
	1920	ROM_LOAD( "rockclimber_m.004", 0x300000, 0x80000, CRC(dc6d43a0) SHA1(62fc47136775f3fa9369857ec91fe897a1f1ebd6) )
	1921	ROM_LOAD( "rockclimber_m.005", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
	1922	ROM_LOAD( "rockclimber_m.006", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
	1923	ROM_LOAD( "rockclimber_m.007", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
	1924	ROM_LOAD( "rockclimber_m.008", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
1846	1925	ROM_END
1847	1926
1848
1849	1927	ROM_START( rclimb_4 ) // 070322
1850	1928	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1851		ROM_LOAD( "rc070322.rom", 0x00000, 0x40000, CRC(200fcc35) SHA1(a9f71c5a3cb328f6522436693364d85586cca796) )
	1929	ROM_LOAD( "rc_070322.rom", 0x00000, 0x40000, CRC(200fcc35) SHA1(a9f71c5a3cb328f6522436693364d85586cca796) )
1852	1930
1853	1931	ROM_REGION( 0x400000, "gfx", 0 )
1854		ROM_LOAD( "1_070322", 0x000000, 0x80000, CRC(2c6c10b6) SHA1(b2f96fb90a5f2150d84fe5012414c74fcbde81d1) )
1855		ROM_LOAD( "2_070322", 0x100000, 0x80000, CRC(7def062a) SHA1(d418f5e8b80680ecdc10159322c83d298c96cf4d) )
1856		ROM_LOAD( "3_070322", 0x200000, 0x80000, CRC(313a6490) SHA1(96430117f45cc0a34a7dbc51c0df032595451390) )
1857		ROM_LOAD( "4_070322", 0x300000, 0x80000, CRC(0cfaa33f) SHA1(df289b816fdb094228d518e823a3e660f5b8a0b6) )
1858		ROM_LOAD( "5_040815", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
1859		ROM_LOAD( "6_040815", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
1860		ROM_LOAD( "7_040815", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
1861		ROM_LOAD( "8_040815", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
	1932	ROM_LOAD( "rockclimber.001", 0x000000, 0x80000, CRC(2c6c10b6) SHA1(b2f96fb90a5f2150d84fe5012414c74fcbde81d1) )
	1933	ROM_LOAD( "rockclimber.002", 0x100000, 0x80000, CRC(7def062a) SHA1(d418f5e8b80680ecdc10159322c83d298c96cf4d) )
	1934	ROM_LOAD( "rockclimber.003", 0x200000, 0x80000, CRC(313a6490) SHA1(96430117f45cc0a34a7dbc51c0df032595451390) )
	1935	ROM_LOAD( "rockclimber.004", 0x300000, 0x80000, CRC(0cfaa33f) SHA1(df289b816fdb094228d518e823a3e660f5b8a0b6) )
	1936	ROM_LOAD( "rockclimber_m.005", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
	1937	ROM_LOAD( "rockclimber_m.006", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
	1938	ROM_LOAD( "rockclimber_m.007", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
	1939	ROM_LOAD( "rockclimber_m.008", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
1862	1940	ROM_END
1863	1941
1864	1942	ROM_START( rclimb_5 ) // 070621
1865	1943	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1866		ROM_LOAD( "rc070621.rom", 0x00000, 0x40000, CRC(7f5223a6) SHA1(9aaed66ce6cd12faad09e2b74f8ae764a9707be7) )
	1944	ROM_LOAD( "rc_070621.rom", 0x00000, 0x40000, CRC(7f5223a6) SHA1(9aaed66ce6cd12faad09e2b74f8ae764a9707be7) )
1867	1945
1868	1946	ROM_REGION( 0x400000, "gfx", 0 )
1869		ROM_LOAD( "1_070322", 0x000000, 0x80000, CRC(2c6c10b6) SHA1(b2f96fb90a5f2150d84fe5012414c74fcbde81d1) )
1870		ROM_LOAD( "2_070322", 0x100000, 0x80000, CRC(7def062a) SHA1(d418f5e8b80680ecdc10159322c83d298c96cf4d) )
1871		ROM_LOAD( "3_070322", 0x200000, 0x80000, CRC(313a6490) SHA1(96430117f45cc0a34a7dbc51c0df032595451390) )
1872		ROM_LOAD( "4_070322", 0x300000, 0x80000, CRC(0cfaa33f) SHA1(df289b816fdb094228d518e823a3e660f5b8a0b6) )
1873		ROM_LOAD( "5_040815", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
1874		ROM_LOAD( "6_040815", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
1875		ROM_LOAD( "7_040815", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
1876		ROM_LOAD( "8_040815", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
	1947	ROM_LOAD( "rockclimber.001", 0x000000, 0x80000, CRC(2c6c10b6) SHA1(b2f96fb90a5f2150d84fe5012414c74fcbde81d1) )
	1948	ROM_LOAD( "rockclimber.002", 0x100000, 0x80000, CRC(7def062a) SHA1(d418f5e8b80680ecdc10159322c83d298c96cf4d) )
	1949	ROM_LOAD( "rockclimber.003", 0x200000, 0x80000, CRC(313a6490) SHA1(96430117f45cc0a34a7dbc51c0df032595451390) )
	1950	ROM_LOAD( "rockclimber.004", 0x300000, 0x80000, CRC(0cfaa33f) SHA1(df289b816fdb094228d518e823a3e660f5b8a0b6) )
	1951	ROM_LOAD( "rockclimber_m.005", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
	1952	ROM_LOAD( "rockclimber_m.006", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
	1953	ROM_LOAD( "rockclimber_m.007", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
	1954	ROM_LOAD( "rockclimber_m.008", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
1877	1955	ROM_END
1878	1956
1879
1880
1881	1957	/*********************************************************
1882	1958	Sweet Life
1883	1959	**********************************************************/
1884	1960
1885	1961	ROM_START( sweetl ) // 041220
1886	1962	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1887		ROM_LOAD( "sl041220.rom", 0x00000, 0x40000, CRC(851b85c6) SHA1(a5db94d94fe82d06f3fac1c16aed5358fcb92f29) )
	1963	ROM_LOAD( "sl_m_041220.rom", 0x00000, 0x40000, CRC(851b85c6) SHA1(a5db94d94fe82d06f3fac1c16aed5358fcb92f29) )
1888	1964
1889	1965	ROM_REGION( 0x400000, "gfx", 0 )
1890		ROM_LOAD( "1_041220", 0x000000, 0x80000, CRC(a096c786) SHA1(81f6b083cb089e9412a8506889196354c670d945) )
1891		ROM_LOAD( "2_041220", 0x100000, 0x80000, CRC(c5e1e22c) SHA1(973ad27681a0f3beee7084b1b85fc9deb79d638e) )
1892		ROM_LOAD( "3_041220", 0x200000, 0x80000, CRC(af335323) SHA1(b8afdce231a8ec0f313cc47e00a27f05461bbbc4) )
1893		ROM_LOAD( "4_041220", 0x300000, 0x80000, CRC(a35c7503) SHA1(78f7a868660bbaa066e8e9e341db52018aaf3af1) )
1894		ROM_LOAD( "5_041220", 0x080000, 0x80000, CRC(e2d6b632) SHA1(65d05e55671b8c335cae2dfbf6a6f5bd8cc90e2c) )
1895		ROM_LOAD( "6_041220", 0x180000, 0x80000, CRC(d34e0905) SHA1(cc4afe64fb9052a31f759be41ff07a727e0a9093) )
1896		ROM_LOAD( "7_041220", 0x280000, 0x80000, CRC(978b67bb) SHA1(87357d5832588f00272bd76df736c06c599f3853) )
1897		ROM_LOAD( "8_041220", 0x380000, 0x80000, CRC(75954355) SHA1(e6ef2b70d859b61e8e3d1751de8558b8778e502d) )
	1966	ROM_LOAD( "sweetlife.001", 0x000000, 0x80000, CRC(a096c786) SHA1(81f6b083cb089e9412a8506889196354c670d945) )
	1967	ROM_LOAD( "sweetlife.002", 0x100000, 0x80000, CRC(c5e1e22c) SHA1(973ad27681a0f3beee7084b1b85fc9deb79d638e) )
	1968	ROM_LOAD( "sweetlife.003", 0x200000, 0x80000, CRC(af335323) SHA1(b8afdce231a8ec0f313cc47e00a27f05461bbbc4) )
	1969	ROM_LOAD( "sweetlife.004", 0x300000, 0x80000, CRC(a35c7503) SHA1(78f7a868660bbaa066e8e9e341db52018aaf3af1) )
	1970	ROM_LOAD( "sweetlife.005", 0x080000, 0x80000, CRC(e2d6b632) SHA1(65d05e55671b8c335cae2dfbf6a6f5bd8cc90e2c) )
	1971	ROM_LOAD( "sweetlife.006", 0x180000, 0x80000, CRC(d34e0905) SHA1(cc4afe64fb9052a31f759be41ff07a727e0a9093) )
	1972	ROM_LOAD( "sweetlife.007", 0x280000, 0x80000, CRC(978b67bb) SHA1(87357d5832588f00272bd76df736c06c599f3853) )
	1973	ROM_LOAD( "sweetlife.008", 0x380000, 0x80000, CRC(75954355) SHA1(e6ef2b70d859b61e8e3d1751de8558b8778e502d) )
1898	1974	ROM_END
1899	1975
1900
1901	1976	ROM_START( sweetl_2 ) // 070412
1902	1977	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1903		ROM_LOAD( "sl070412.rom", 0x00000, 0x40000, CRC(2d2cd8ec) SHA1(40f7778c6eb4681452635249a708e9dbc15c9045) )
	1978	ROM_LOAD( "sl_070412.rom", 0x00000, 0x40000, CRC(2d2cd8ec) SHA1(40f7778c6eb4681452635249a708e9dbc15c9045) )
1904	1979
1905	1980	ROM_REGION( 0x400000, "gfx", 0 )
1906		ROM_LOAD( "1_041220", 0x000000, 0x80000, CRC(a096c786) SHA1(81f6b083cb089e9412a8506889196354c670d945) )
1907		ROM_LOAD( "2_041220", 0x100000, 0x80000, CRC(c5e1e22c) SHA1(973ad27681a0f3beee7084b1b85fc9deb79d638e) )
1908		ROM_LOAD( "3_041220", 0x200000, 0x80000, CRC(af335323) SHA1(b8afdce231a8ec0f313cc47e00a27f05461bbbc4) )
1909		ROM_LOAD( "4_041220", 0x300000, 0x80000, CRC(a35c7503) SHA1(78f7a868660bbaa066e8e9e341db52018aaf3af1) )
1910		ROM_LOAD( "5_041220", 0x080000, 0x80000, CRC(e2d6b632) SHA1(65d05e55671b8c335cae2dfbf6a6f5bd8cc90e2c) )
1911		ROM_LOAD( "6_041220", 0x180000, 0x80000, CRC(d34e0905) SHA1(cc4afe64fb9052a31f759be41ff07a727e0a9093) )
1912		ROM_LOAD( "7_041220", 0x280000, 0x80000, CRC(978b67bb) SHA1(87357d5832588f00272bd76df736c06c599f3853) )
1913		ROM_LOAD( "8_041220", 0x380000, 0x80000, CRC(75954355) SHA1(e6ef2b70d859b61e8e3d1751de8558b8778e502d) )
	1981	ROM_LOAD( "sweetlife.001", 0x000000, 0x80000, CRC(a096c786) SHA1(81f6b083cb089e9412a8506889196354c670d945) )
	1982	ROM_LOAD( "sweetlife.002", 0x100000, 0x80000, CRC(c5e1e22c) SHA1(973ad27681a0f3beee7084b1b85fc9deb79d638e) )
	1983	ROM_LOAD( "sweetlife.003", 0x200000, 0x80000, CRC(af335323) SHA1(b8afdce231a8ec0f313cc47e00a27f05461bbbc4) )
	1984	ROM_LOAD( "sweetlife.004", 0x300000, 0x80000, CRC(a35c7503) SHA1(78f7a868660bbaa066e8e9e341db52018aaf3af1) )
	1985	ROM_LOAD( "sweetlife.005", 0x080000, 0x80000, CRC(e2d6b632) SHA1(65d05e55671b8c335cae2dfbf6a6f5bd8cc90e2c) )
	1986	ROM_LOAD( "sweetlife.006", 0x180000, 0x80000, CRC(d34e0905) SHA1(cc4afe64fb9052a31f759be41ff07a727e0a9093) )
	1987	ROM_LOAD( "sweetlife.007", 0x280000, 0x80000, CRC(978b67bb) SHA1(87357d5832588f00272bd76df736c06c599f3853) )
	1988	ROM_LOAD( "sweetlife.008", 0x380000, 0x80000, CRC(75954355) SHA1(e6ef2b70d859b61e8e3d1751de8558b8778e502d) )
1914	1989	ROM_END
1915	1990
1916	1991
r9812	r9813
1918	1993	Sweet Life 2
1919	1994	**********************************************************/
1920	1995
1921		/* no supported sets */
	1996	ROM_START( sweetl2 ) // 071217
	1997	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
	1998	ROM_LOAD( "sl2_071217.rom", 0x00000, 0x40000, CRC(b6299b02) SHA1(7051f9034bf3181d6f3dc66c0048c4a57685d2a8) )
1922	1999
	2000	ROM_REGION( 0x400000, "gfx", 0 )
	2001	ROM_LOAD( "sweetlife2.001", 0x000000, 0x80000, CRC(b1e6157c) SHA1(e042aaaf85b13865d56d1709be280f5a3d5c95e3) )
	2002	ROM_LOAD( "sweetlife2.002", 0x100000, 0x80000, CRC(8bc54047) SHA1(9179cf02376fec77ae50b5603de66754237698f8) )
	2003	ROM_LOAD( "sweetlife2.003", 0x200000, 0x80000, CRC(709c5d34) SHA1(d702576d70ebef667c77376effecc02abbaaa8cd) )
	2004	ROM_LOAD( "sweetlife2.004", 0x300000, 0x80000, CRC(7bcfa2ce) SHA1(8df894e9b7afa52e47e4dabd1802e878bbbeaa80) )
	2005	ROM_LOAD( "sweetlife2.005", 0x080000, 0x80000, CRC(5c385d43) SHA1(ddb362e5894d146ce90acbaafe9dd7aad2a7c242) )
	2006	ROM_LOAD( "sweetlife2.006", 0x180000, 0x80000, CRC(868fe1cb) SHA1(692679f8242950e009c30cc084c4ddc5d1963502) )
	2007	ROM_LOAD( "sweetlife2.007", 0x280000, 0x80000, CRC(6ce87282) SHA1(586e08994db4ca2b967d47b16ba5b458e240d30f) )
	2008	ROM_LOAD( "sweetlife2.008", 0x380000, 0x80000, CRC(c2ad2b74) SHA1(c78e3ca5d15acb17ee671d2205405f287ad9c464) )
	2009	ROM_END
	2010
	2011
	2012
1923	2013	/*********************************************************
1924	2014	Resident
1925	2015
1926		Roms 1-4 were changed after the 070222 update.
1927		The official list of hashes shows the 070222 updated roms.
	2016	"Russia" sets use different gfx roms 1-4.
	2017	The official list of hashes shows both roms.
1928	2018
1929	2019	**********************************************************/
1930	2020
1931	2021	ROM_START( resdnt ) // 040415
1932	2022	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1933		ROM_LOAD( "rs040415.rom", 0x00000, 0x40000, ~~MD5~~(a46~~e993839a~~7~~ce5c4a3d9~~0~~ba0e961e69~~) SHA1(b9f07bc2765d4f366e548007e51b9f605c884ba1) )
	2023	ROM_LOAD( "rs_m_040415.rom", 0x00000, 0x40000, CRC(2E06F70C) SHA1(b9f07bc2765d4f366e548007e51b9f605c884ba1) )
1934	2024
1935	2025	ROM_REGION( 0x400000, "gfx", 0 )
1936		ROM_LOAD( "1_040415", 0x000000, 0x80000, CRC(e0645da6) SHA1(dd72f4830d8011f603aa6d430f34ac2598005281) )
1937		ROM_LOAD( "2_040415", 0x100000, 0x80000, CRC(dd8de247) SHA1(498c5b931ce65e289f52d8864b603166f81e3dc4) )
1938		ROM_LOAD( "3_040415", 0x200000, 0x80000, CRC(0d346ec2) SHA1(e2456b28825c54c5e16829525627c40611c0083d) )
1939		ROM_LOAD( "4_040415", 0x300000, 0x80000, CRC(1f95aad9) SHA1(51d003288d5ff23b3c981fbaa99d29b66dd2c101) )
1940		ROM_LOAD( "5_040415", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
1941		ROM_LOAD( "6_040415", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
1942		ROM_LOAD( "7_040415", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
1943		ROM_LOAD( "8_040415", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
	2026	ROM_LOAD( "resident_m.001", 0x000000, 0x80000, CRC(e0645da6) SHA1(dd72f4830d8011f603aa6d430f34ac2598005281) )
	2027	ROM_LOAD( "resident_m.002", 0x100000, 0x80000, CRC(dd8de247) SHA1(498c5b931ce65e289f52d8864b603166f81e3dc4) )
	2028	ROM_LOAD( "resident_m.003", 0x200000, 0x80000, CRC(0d346ec2) SHA1(e2456b28825c54c5e16829525627c40611c0083d) )
	2029	ROM_LOAD( "resident_m.004", 0x300000, 0x80000, CRC(1f95aad9) SHA1(51d003288d5ff23b3c981fbaa99d29b66dd2c101) )
	2030	ROM_LOAD( "resident_m.005", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
	2031	ROM_LOAD( "resident_m.006", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
	2032	ROM_LOAD( "resident_m.007", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
	2033	ROM_LOAD( "resident_m.008", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
1944	2034	ROM_END
1945	2035
1946	2036	ROM_START( resdnt_2 ) // 040513
1947	2037	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1948		ROM_LOAD( "rs040513.rom", 0x00000, 0x40000, CRC(95f74cb3) SHA1(2e4862ac0ad86899b8ce12580ebd217dfb74f6a2) )
	2038	ROM_LOAD( "rs_m_040513.rom", 0x00000, 0x40000, CRC(95f74cb3) SHA1(2e4862ac0ad86899b8ce12580ebd217dfb74f6a2) )
1949	2039
1950	2040	ROM_REGION( 0x400000, "gfx", 0 )
1951		ROM_LOAD( "1_040415", 0x000000, 0x80000, CRC(e0645da6) SHA1(dd72f4830d8011f603aa6d430f34ac2598005281) )
1952		ROM_LOAD( "2_040415", 0x100000, 0x80000, CRC(dd8de247) SHA1(498c5b931ce65e289f52d8864b603166f81e3dc4) )
1953		ROM_LOAD( "3_040415", 0x200000, 0x80000, CRC(0d346ec2) SHA1(e2456b28825c54c5e16829525627c40611c0083d) )
1954		ROM_LOAD( "4_040415", 0x300000, 0x80000, CRC(1f95aad9) SHA1(51d003288d5ff23b3c981fbaa99d29b66dd2c101) )
1955		ROM_LOAD( "5_040415", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
1956		ROM_LOAD( "6_040415", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
1957		ROM_LOAD( "7_040415", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
1958		ROM_LOAD( "8_040415", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
	2041	ROM_LOAD( "resident_m.001", 0x000000, 0x80000, CRC(e0645da6) SHA1(dd72f4830d8011f603aa6d430f34ac2598005281) )
	2042	ROM_LOAD( "resident_m.002", 0x100000, 0x80000, CRC(dd8de247) SHA1(498c5b931ce65e289f52d8864b603166f81e3dc4) )
	2043	ROM_LOAD( "resident_m.003", 0x200000, 0x80000, CRC(0d346ec2) SHA1(e2456b28825c54c5e16829525627c40611c0083d) )
	2044	ROM_LOAD( "resident_m.004", 0x300000, 0x80000, CRC(1f95aad9) SHA1(51d003288d5ff23b3c981fbaa99d29b66dd2c101) )
	2045	ROM_LOAD( "resident_m.005", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
	2046	ROM_LOAD( "resident_m.006", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
	2047	ROM_LOAD( "resident_m.007", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
	2048	ROM_LOAD( "resident_m.008", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
1959	2049	ROM_END
1960	2050
1961	2051	ROM_START( resdnt_3 ) // 070222
1962	2052	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
1963		ROM_LOAD( "rs070222.rom", 0x00000, 0x40000, CRC(8aec434e) SHA1(e83c57bbde3379b4d09aa615f2f3fc82d5c5a3cb) )
	2053	ROM_LOAD( "rs_070222.rom", 0x00000, 0x40000, CRC(8aec434e) SHA1(e83c57bbde3379b4d09aa615f2f3fc82d5c5a3cb) )
1964	2054
1965	2055	ROM_REGION( 0x400000, "gfx", 0 )
1966		ROM_LOAD( "1_070222", 0x000000, 0x80000, CRC(5a1a24f1) SHA1(da601ed84603b880d2ce4b98784067531d5294b2) )
1967		ROM_LOAD( "2_070222", 0x100000, 0x80000, CRC(9a8bfa95) SHA1(392690b7031ce2c8ff87843befeefa0e68ae8fce) )
1968		ROM_LOAD( "3_070222", 0x200000, 0x80000, CRC(0d0db860) SHA1(93bc2b0bb51d754e19f58d8388c837ba2c7ba5ee) )
1969		ROM_LOAD( "4_070222", 0x300000, 0x80000, CRC(1d3a5b92) SHA1(c8bebca6beb225911c26e30e090d66b724733d59) )
1970		ROM_LOAD( "5_040415", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
1971		ROM_LOAD( "6_040415", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
1972		ROM_LOAD( "7_040415", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
1973		ROM_LOAD( "8_040415", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
	2056	ROM_LOAD( "resident.001", 0x000000, 0x80000, CRC(5a1a24f1) SHA1(da601ed84603b880d2ce4b98784067531d5294b2) )
	2057	ROM_LOAD( "resident.002", 0x100000, 0x80000, CRC(9a8bfa95) SHA1(392690b7031ce2c8ff87843befeefa0e68ae8fce) )
	2058	ROM_LOAD( "resident.003", 0x200000, 0x80000, CRC(0d0db860) SHA1(93bc2b0bb51d754e19f58d8388c837ba2c7ba5ee) )
	2059	ROM_LOAD( "resident.004", 0x300000, 0x80000, CRC(1d3a5b92) SHA1(c8bebca6beb225911c26e30e090d66b724733d59) )
	2060	ROM_LOAD( "resident_m.005", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
	2061	ROM_LOAD( "resident_m.006", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
	2062	ROM_LOAD( "resident_m.007", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
	2063	ROM_LOAD( "resident_m.008", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
1974	2064	ROM_END
1975	2065
	2066
	2067
1976	2068	/*********************************************************
1977	2069	Roll Fruit
1978	2070
r9812	r9813
1986	2078	ROM_LOAD( "rf5-030821.rom", 0x00000, 0x40000, MD5(ef4e9d1845676fe655d2f415ca7bd953) SHA1(5e9c2235ea4207086db23870993d8e28356c9eb8) )
1987	2079
1988	2080	ROM_REGION( 0x400000, "gfx", 0 )
1989		ROM_LOAD( "1_030821", 0x000000, 0x80000, CRC(caeb1fc3) SHA1(14b9f99f892849faecb3327e572dc134e1065463) )
1990		ROM_LOAD( "2_030821", 0x100000, 0x80000, CRC(f017c200) SHA1(a247bbbd1c4ca99978dcc705bd62590815a891f2) )
1991		ROM_LOAD( "3_030821", 0x200000, 0x80000, CRC(a2d6df11) SHA1(c2553136252aebe3b3ce0b5c33e740d0e27fb7b2) )
1992		ROM_LOAD( "4_030821", 0x300000, 0x80000, CRC(cd3c928a) SHA1(4c50ce17bd5714149eae91279a0133059397b776) )
1993		ROM_LOAD( "5_030821", 0x080000, 0x80000, CRC(24c7362a) SHA1(684b7b370fcad07bf74bddffaf432bd52e5d29e2) )
1994		ROM_LOAD( "6_030821", 0x180000, 0x80000, CRC(d6a61904) SHA1(73700e88358ed9bccbb63643b7daaff416737e43) )
1995		ROM_LOAD( "7_030821", 0x280000, 0x80000, CRC(81e3480b) SHA1(c0f006cf2a4747359cb79f14976ac3411951af1c) )
1996		ROM_LOAD( "8_030821", 0x380000, 0x80000, CRC(ed3558b8) SHA1(8ec808069053f0c07d81c45090b2ba22ef8e9c32) )
	2081	ROM_LOAD( "roll_fruit5.001", 0x000000, 0x80000, CRC(caeb1fc3) SHA1(14b9f99f892849faecb3327e572dc134e1065463) )
	2082	ROM_LOAD( "roll_fruit5.002", 0x100000, 0x80000, CRC(f017c200) SHA1(a247bbbd1c4ca99978dcc705bd62590815a891f2) )
	2083	ROM_LOAD( "roll_fruit5.003", 0x200000, 0x80000, CRC(a2d6df11) SHA1(c2553136252aebe3b3ce0b5c33e740d0e27fb7b2) )
	2084	ROM_LOAD( "roll_fruit5.004", 0x300000, 0x80000, CRC(cd3c928a) SHA1(4c50ce17bd5714149eae91279a0133059397b776) )
	2085	ROM_LOAD( "roll_fruit5.005", 0x080000, 0x80000, CRC(24c7362a) SHA1(684b7b370fcad07bf74bddffaf432bd52e5d29e2) )
	2086	ROM_LOAD( "roll_fruit5.006", 0x180000, 0x80000, CRC(d6a61904) SHA1(73700e88358ed9bccbb63643b7daaff416737e43) )
	2087	ROM_LOAD( "roll_fruit5.007", 0x280000, 0x80000, CRC(81e3480b) SHA1(c0f006cf2a4747359cb79f14976ac3411951af1c) )
	2088	ROM_LOAD( "roll_fruit5.008", 0x380000, 0x80000, CRC(ed3558b8) SHA1(8ec808069053f0c07d81c45090b2ba22ef8e9c32) )
1997	2089	ROM_END
1998	2090
1999	2091	ROM_START( rollfr_2 ) // 040318
r9812	r9813
2001	2093	ROM_LOAD( "rf5-040318.rom", 0x00000, 0x40000, CRC(d8efd395) SHA1(71edd1541df400fef97abacabb10d882ace4c8b0) )
2002	2094
2003	2095	ROM_REGION( 0x400000, "gfx", 0 )
2004		ROM_LOAD( "1_030821", 0x000000, 0x80000, CRC(caeb1fc3) SHA1(14b9f99f892849faecb3327e572dc134e1065463) )
2005		ROM_LOAD( "2_030821", 0x100000, 0x80000, CRC(f017c200) SHA1(a247bbbd1c4ca99978dcc705bd62590815a891f2) )
2006		ROM_LOAD( "3_030821", 0x200000, 0x80000, CRC(a2d6df11) SHA1(c2553136252aebe3b3ce0b5c33e740d0e27fb7b2) )
2007		ROM_LOAD( "4_030821", 0x300000, 0x80000, CRC(cd3c928a) SHA1(4c50ce17bd5714149eae91279a0133059397b776) )
2008		ROM_LOAD( "5_030821", 0x080000, 0x80000, CRC(24c7362a) SHA1(684b7b370fcad07bf74bddffaf432bd52e5d29e2) )
2009		ROM_LOAD( "6_030821", 0x180000, 0x80000, CRC(d6a61904) SHA1(73700e88358ed9bccbb63643b7daaff416737e43) )
2010		ROM_LOAD( "7_030821", 0x280000, 0x80000, CRC(81e3480b) SHA1(c0f006cf2a4747359cb79f14976ac3411951af1c) )
2011		ROM_LOAD( "8_030821", 0x380000, 0x80000, CRC(ed3558b8) SHA1(8ec808069053f0c07d81c45090b2ba22ef8e9c32) )
	2096	ROM_LOAD( "roll_fruit5.001", 0x000000, 0x80000, CRC(caeb1fc3) SHA1(14b9f99f892849faecb3327e572dc134e1065463) )
	2097	ROM_LOAD( "roll_fruit5.002", 0x100000, 0x80000, CRC(f017c200) SHA1(a247bbbd1c4ca99978dcc705bd62590815a891f2) )
	2098	ROM_LOAD( "roll_fruit5.003", 0x200000, 0x80000, CRC(a2d6df11) SHA1(c2553136252aebe3b3ce0b5c33e740d0e27fb7b2) )
	2099	ROM_LOAD( "roll_fruit5.004", 0x300000, 0x80000, CRC(cd3c928a) SHA1(4c50ce17bd5714149eae91279a0133059397b776) )
	2100	ROM_LOAD( "roll_fruit5.005", 0x080000, 0x80000, CRC(24c7362a) SHA1(684b7b370fcad07bf74bddffaf432bd52e5d29e2) )
	2101	ROM_LOAD( "roll_fruit5.006", 0x180000, 0x80000, CRC(d6a61904) SHA1(73700e88358ed9bccbb63643b7daaff416737e43) )
	2102	ROM_LOAD( "roll_fruit5.007", 0x280000, 0x80000, CRC(81e3480b) SHA1(c0f006cf2a4747359cb79f14976ac3411951af1c) )
	2103	ROM_LOAD( "roll_fruit5.008", 0x380000, 0x80000, CRC(ed3558b8) SHA1(8ec808069053f0c07d81c45090b2ba22ef8e9c32) )
2012	2104	ROM_END
2013	2105
2014	2106
r9812	r9813
2018	2110
2019	2111	ROM_START( island ) // 050713
2020	2112	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2021		ROM_LOAD( "is050713.rom", 0x00000, 0x40000, CRC(26c7013e) SHA1(5d604f5b4859e9e82830424a1e21f32a9e49bf34) )
	2113	ROM_LOAD( "is_m_050713.rom", 0x00000, 0x40000, CRC(26c7013e) SHA1(5d604f5b4859e9e82830424a1e21f32a9e49bf34) )
2022	2114
2023	2115	ROM_REGION( 0x400000, "gfx", 0 )
2024		ROM_LOAD( "1_050713", 0x000000, 0x80000, CRC(dbe8cdda) SHA1(4747cf0d85afdef22d3ba9fa5e75b39548725745) )
2025		ROM_LOAD( "2_050713", 0x100000, 0x80000, CRC(64064745) SHA1(91a7bc7204a8f7a7512eeaf4906da20a9f587565) )
2026		ROM_LOAD( "3_050713", 0x200000, 0x80000, CRC(1d993f68) SHA1(b0459d3941d50668f7533909e3f3da91453d3efd) )
2027		ROM_LOAD( "4_050713", 0x300000, 0x80000, CRC(a4739404) SHA1(8f7ffcc13dcb35adfa8060ab1930d07195b6110c) )
2028		ROM_LOAD( "5_050713", 0x080000, 0x80000, CRC(d016eb31) SHA1(a84f18af470f72730b241b9031cd6131c8a03db2) )
2029		ROM_LOAD( "6_050713", 0x180000, 0x80000, CRC(0faaa968) SHA1(0f05546e6e0559e24c6afdde65b3feeb66b6adff) )
2030		ROM_LOAD( "7_050713", 0x280000, 0x80000, CRC(d7277a6c) SHA1(d96a0befc965ad22087381982305d68208978a7e) )
2031		ROM_LOAD( "8_050713", 0x380000, 0x80000, CRC(ac6fba48) SHA1(64dd03d624f16da52bc7fa0702246e91ae39a806) )
	2116	ROM_LOAD( "island.001", 0x000000, 0x80000, CRC(dbe8cdda) SHA1(4747cf0d85afdef22d3ba9fa5e75b39548725745) )
	2117	ROM_LOAD( "island.002", 0x100000, 0x80000, CRC(64064745) SHA1(91a7bc7204a8f7a7512eeaf4906da20a9f587565) )
	2118	ROM_LOAD( "island.003", 0x200000, 0x80000, CRC(1d993f68) SHA1(b0459d3941d50668f7533909e3f3da91453d3efd) )
	2119	ROM_LOAD( "island.004", 0x300000, 0x80000, CRC(a4739404) SHA1(8f7ffcc13dcb35adfa8060ab1930d07195b6110c) )
	2120	ROM_LOAD( "island.005", 0x080000, 0x80000, CRC(d016eb31) SHA1(a84f18af470f72730b241b9031cd6131c8a03db2) )
	2121	ROM_LOAD( "island.006", 0x180000, 0x80000, CRC(0faaa968) SHA1(0f05546e6e0559e24c6afdde65b3feeb66b6adff) )
	2122	ROM_LOAD( "island.007", 0x280000, 0x80000, CRC(d7277a6c) SHA1(d96a0befc965ad22087381982305d68208978a7e) )
	2123	ROM_LOAD( "island.008", 0x380000, 0x80000, CRC(ac6fba48) SHA1(64dd03d624f16da52bc7fa0702246e91ae39a806) )
2032	2124	ROM_END
2033	2125
2034	2126	ROM_START( island_2 ) // 070409
2035	2127	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2036		ROM_LOAD( "is070409.rom", 0x00000, 0x40000, CRC(b6790aeb) SHA1(b80d0e4ae003473ac623183439737d6159f59274) )
	2128	ROM_LOAD( "is_070409.rom", 0x00000, 0x40000, CRC(b6790aeb) SHA1(b80d0e4ae003473ac623183439737d6159f59274) )
2037	2129
2038	2130	ROM_REGION( 0x400000, "gfx", 0 )
2039		ROM_LOAD( "1_050713", 0x000000, 0x80000, CRC(dbe8cdda) SHA1(4747cf0d85afdef22d3ba9fa5e75b39548725745) )
2040		ROM_LOAD( "2_050713", 0x100000, 0x80000, CRC(64064745) SHA1(91a7bc7204a8f7a7512eeaf4906da20a9f587565) )
2041		ROM_LOAD( "3_050713", 0x200000, 0x80000, CRC(1d993f68) SHA1(b0459d3941d50668f7533909e3f3da91453d3efd) )
2042		ROM_LOAD( "4_050713", 0x300000, 0x80000, CRC(a4739404) SHA1(8f7ffcc13dcb35adfa8060ab1930d07195b6110c) )
2043		ROM_LOAD( "5_050713", 0x080000, 0x80000, CRC(d016eb31) SHA1(a84f18af470f72730b241b9031cd6131c8a03db2) )
2044		ROM_LOAD( "6_050713", 0x180000, 0x80000, CRC(0faaa968) SHA1(0f05546e6e0559e24c6afdde65b3feeb66b6adff) )
2045		ROM_LOAD( "7_050713", 0x280000, 0x80000, CRC(d7277a6c) SHA1(d96a0befc965ad22087381982305d68208978a7e) )
2046		ROM_LOAD( "8_050713", 0x380000, 0x80000, CRC(ac6fba48) SHA1(64dd03d624f16da52bc7fa0702246e91ae39a806) )
	2131	ROM_LOAD( "island.001", 0x000000, 0x80000, CRC(dbe8cdda) SHA1(4747cf0d85afdef22d3ba9fa5e75b39548725745) )
	2132	ROM_LOAD( "island.002", 0x100000, 0x80000, CRC(64064745) SHA1(91a7bc7204a8f7a7512eeaf4906da20a9f587565) )
	2133	ROM_LOAD( "island.003", 0x200000, 0x80000, CRC(1d993f68) SHA1(b0459d3941d50668f7533909e3f3da91453d3efd) )
	2134	ROM_LOAD( "island.004", 0x300000, 0x80000, CRC(a4739404) SHA1(8f7ffcc13dcb35adfa8060ab1930d07195b6110c) )
	2135	ROM_LOAD( "island.005", 0x080000, 0x80000, CRC(d016eb31) SHA1(a84f18af470f72730b241b9031cd6131c8a03db2) )
	2136	ROM_LOAD( "island.006", 0x180000, 0x80000, CRC(0faaa968) SHA1(0f05546e6e0559e24c6afdde65b3feeb66b6adff) )
	2137	ROM_LOAD( "island.007", 0x280000, 0x80000, CRC(d7277a6c) SHA1(d96a0befc965ad22087381982305d68208978a7e) )
	2138	ROM_LOAD( "island.008", 0x380000, 0x80000, CRC(ac6fba48) SHA1(64dd03d624f16da52bc7fa0702246e91ae39a806) )
2047	2139	ROM_END
2048	2140
2049	2141
r9812	r9813
2053	2145
2054	2146	ROM_START( island2 ) // 060529
2055	2147	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2056		ROM_LOAD( "is2_060529.rom", 0x00000, 0x40000, CRC(4ccddabd) SHA1(ae5902734488b7ddfa0f7bbf9b800d25b2b657b5) )
	2148	ROM_LOAD( "is2_m_060529.rom", 0x00000, 0x40000, CRC(4ccddabd) SHA1(ae5902734488b7ddfa0f7bbf9b800d25b2b657b5) )
2057	2149
2058	2150	ROM_REGION( 0x400000, "gfx", 0 )
2059		ROM_LOAD( "1_060529", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
2060		ROM_LOAD( "2_060529", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
2061		ROM_LOAD( "3_060529", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
2062		ROM_LOAD( "4_060529", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
2063		ROM_LOAD( "5_060529", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
2064		ROM_LOAD( "6_060529", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
2065		ROM_LOAD( "7_060529", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
2066		ROM_LOAD( "8_060529", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
	2151	ROM_LOAD( "island2.001", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
	2152	ROM_LOAD( "island2.002", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
	2153	ROM_LOAD( "island2.003", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
	2154	ROM_LOAD( "island2.004", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
	2155	ROM_LOAD( "island2.005", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
	2156	ROM_LOAD( "island2.006", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
	2157	ROM_LOAD( "island2.007", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
	2158	ROM_LOAD( "island2.008", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
2067	2159	ROM_END
2068	2160
2069
2070	2161	ROM_START( island2_2 ) // 061214
2071	2162	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2072		ROM_LOAD( "is2_061214.rom", 0x00000, 0x40000, MD5(566eb61392eaf72e7c311dceb92cdb11) SHA1(dd416d831c3773f044b355efcb1121f7eb81932b) )
	2163	ROM_LOAD( "is2_m_061214.rom", 0x00000, 0x40000, MD5(566eb61392eaf72e7c311dceb92cdb11) SHA1(dd416d831c3773f044b355efcb1121f7eb81932b) )
2073	2164
2074	2165	ROM_REGION( 0x400000, "gfx", 0 )
2075		ROM_LOAD( "1_060529", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
2076		ROM_LOAD( "2_060529", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
2077		ROM_LOAD( "3_060529", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
2078		ROM_LOAD( "4_060529", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
2079		ROM_LOAD( "5_060529", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
2080		ROM_LOAD( "6_060529", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
2081		ROM_LOAD( "7_060529", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
2082		ROM_LOAD( "8_060529", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
	2166	ROM_LOAD( "island2.001", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
	2167	ROM_LOAD( "island2.002", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
	2168	ROM_LOAD( "island2.003", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
	2169	ROM_LOAD( "island2.004", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
	2170	ROM_LOAD( "island2.005", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
	2171	ROM_LOAD( "island2.006", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
	2172	ROM_LOAD( "island2.007", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
	2173	ROM_LOAD( "island2.008", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
2083	2174	ROM_END
2084	2175
2085	2176	ROM_START( island2_3 ) // 061218
2086	2177	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2087		ROM_LOAD( "is2_061218.rom", 0x00000, 0x40000, CRC(f16cecc5) SHA1(c9caa265295837deb83d1454daf586f3d0be0ee6) )
	2178	ROM_LOAD( "is2_m_061218.rom", 0x00000, 0x40000, CRC(f16cecc5) SHA1(c9caa265295837deb83d1454daf586f3d0be0ee6) )
2088	2179
2089	2180	ROM_REGION( 0x400000, "gfx", 0 )
2090		ROM_LOAD( "1_060529", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
2091		ROM_LOAD( "2_060529", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
2092		ROM_LOAD( "3_060529", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
2093		ROM_LOAD( "4_060529", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
2094		ROM_LOAD( "5_060529", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
2095		ROM_LOAD( "6_060529", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
2096		ROM_LOAD( "7_060529", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
2097		ROM_LOAD( "8_060529", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
	2181	ROM_LOAD( "island2.001", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
	2182	ROM_LOAD( "island2.002", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
	2183	ROM_LOAD( "island2.003", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
	2184	ROM_LOAD( "island2.004", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
	2185	ROM_LOAD( "island2.005", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
	2186	ROM_LOAD( "island2.006", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
	2187	ROM_LOAD( "island2.007", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
	2188	ROM_LOAD( "island2.008", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
2098	2189	ROM_END
2099	2190
2100
2101	2191	ROM_START( island2_4 ) // 070205
2102	2192	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2103	2193	ROM_LOAD( "is2_070205.rom", 0x00000, 0x40000, CRC(bc3e619b) SHA1(4a8e01d60f73e58b2c6cfa739a0a8fce60e565cc) )
2104	2194
2105	2195	ROM_REGION( 0x400000, "gfx", 0 )
2106		ROM_LOAD( "1_060529", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
2107		ROM_LOAD( "2_060529", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
2108		ROM_LOAD( "3_060529", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
2109		ROM_LOAD( "4_060529", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
2110		ROM_LOAD( "5_060529", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
2111		ROM_LOAD( "6_060529", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
2112		ROM_LOAD( "7_060529", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
2113		ROM_LOAD( "8_060529", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
	2196	ROM_LOAD( "island2.001", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
	2197	ROM_LOAD( "island2.002", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
	2198	ROM_LOAD( "island2.003", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
	2199	ROM_LOAD( "island2.004", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
	2200	ROM_LOAD( "island2.005", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
	2201	ROM_LOAD( "island2.006", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
	2202	ROM_LOAD( "island2.007", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
	2203	ROM_LOAD( "island2.008", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
2114	2204	ROM_END
2115	2205
2116	2206
r9812	r9813
2121	2211
2122	2212	ROM_START( pirate ) // 051229
2123	2213	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2124		ROM_LOAD( "pr051229.rom", 0x00000, 0x40000, MD5(d813af59a7a356800470b109a41b978f) SHA1(d1286cba474ccbbff8358ba2fd6917d43d101674) )
	2214	ROM_LOAD( "pr_m_051229.rom", 0x00000, 0x40000, MD5(d813af59a7a356800470b109a41b978f) SHA1(d1286cba474ccbbff8358ba2fd6917d43d101674) )
2125	2215
2126	2216	ROM_REGION( 0x400000, "gfx", 0 )
2127		ROM_LOAD( "1_051229", 0x000000, 0x80000, CRC(d2199619) SHA1(8c67ef7d0e305ae0783302ba9a1cb56cdcf4bc09) )
2128		ROM_LOAD( "2_051229", 0x100000, 0x80000, CRC(ce5c6548) SHA1(ef1cd6ae36cc1abcf010762dc89a255cd817d016) )
2129		ROM_LOAD( "3_051229", 0x200000, 0x80000, CRC(d6a8338d) SHA1(6a0e41309dc909decf8bd49cf13cbeca95f0314a) )
2130		ROM_LOAD( "4_051229", 0x300000, 0x80000, CRC(590b8cf6) SHA1(b2778f6e1b7bcf7f33ced43f999eff983e5a6af4) )
2131		ROM_LOAD( "5_051229", 0x080000, 0x80000, CRC(bf9f1267) SHA1(b0947bd7d31301ffbe80cbaf1e96c3476f6f9ca3) )
2132		ROM_LOAD( "6_051229", 0x180000, 0x80000, CRC(b0cdf7eb) SHA1(cf6bd20fb40cf0d87eeb6f1502fb73d9760c9140) )
2133		ROM_LOAD( "7_051229", 0x280000, 0x80000, CRC(6c4a9510) SHA1(e10bf8475ff7c73ba90b904b9214b285a5b2669f) )
2134		ROM_LOAD( "8_051229", 0x380000, 0x80000, CRC(cc2edac2) SHA1(24bacd9e092a83945a8def3a254ec66758d71ff5) )
	2217	ROM_LOAD( "pirate.001", 0x000000, 0x80000, CRC(d2199619) SHA1(8c67ef7d0e305ae0783302ba9a1cb56cdcf4bc09) )
	2218	ROM_LOAD( "pirate.002", 0x100000, 0x80000, CRC(ce5c6548) SHA1(ef1cd6ae36cc1abcf010762dc89a255cd817d016) )
	2219	ROM_LOAD( "pirate.003", 0x200000, 0x80000, CRC(d6a8338d) SHA1(6a0e41309dc909decf8bd49cf13cbeca95f0314a) )
	2220	ROM_LOAD( "pirate.004", 0x300000, 0x80000, CRC(590b8cf6) SHA1(b2778f6e1b7bcf7f33ced43f999eff983e5a6af4) )
	2221	ROM_LOAD( "pirate.005", 0x080000, 0x80000, CRC(bf9f1267) SHA1(b0947bd7d31301ffbe80cbaf1e96c3476f6f9ca3) )
	2222	ROM_LOAD( "pirate.006", 0x180000, 0x80000, CRC(b0cdf7eb) SHA1(cf6bd20fb40cf0d87eeb6f1502fb73d9760c9140) )
	2223	ROM_LOAD( "pirate.007", 0x280000, 0x80000, CRC(6c4a9510) SHA1(e10bf8475ff7c73ba90b904b9214b285a5b2669f) )
	2224	ROM_LOAD( "pirate.008", 0x380000, 0x80000, CRC(cc2edac2) SHA1(24bacd9e092a83945a8def3a254ec66758d71ff5) )
2135	2225	ROM_END
2136	2226
2137	2227	ROM_START( pirate_2 ) // 060210
2138	2228	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2139		ROM_LOAD( "pr060210.rom", 0x00000, 0x40000, CRC(5684d67d) SHA1(4cbd103bcd071df26830d56760ef477b9a652857) )
	2229	ROM_LOAD( "pr_m_060210.rom", 0x00000, 0x40000, CRC(5684d67d) SHA1(4cbd103bcd071df26830d56760ef477b9a652857) )
2140	2230
2141	2231	ROM_REGION( 0x400000, "gfx", 0 )
2142		ROM_LOAD( "1_051229", 0x000000, 0x80000, CRC(d2199619) SHA1(8c67ef7d0e305ae0783302ba9a1cb56cdcf4bc09) )
2143		ROM_LOAD( "2_051229", 0x100000, 0x80000, CRC(ce5c6548) SHA1(ef1cd6ae36cc1abcf010762dc89a255cd817d016) )
2144		ROM_LOAD( "3_051229", 0x200000, 0x80000, CRC(d6a8338d) SHA1(6a0e41309dc909decf8bd49cf13cbeca95f0314a) )
2145		ROM_LOAD( "4_051229", 0x300000, 0x80000, CRC(590b8cf6) SHA1(b2778f6e1b7bcf7f33ced43f999eff983e5a6af4) )
2146		ROM_LOAD( "5_051229", 0x080000, 0x80000, CRC(bf9f1267) SHA1(b0947bd7d31301ffbe80cbaf1e96c3476f6f9ca3) )
2147		ROM_LOAD( "6_051229", 0x180000, 0x80000, CRC(b0cdf7eb) SHA1(cf6bd20fb40cf0d87eeb6f1502fb73d9760c9140) )
2148		ROM_LOAD( "7_051229", 0x280000, 0x80000, CRC(6c4a9510) SHA1(e10bf8475ff7c73ba90b904b9214b285a5b2669f) )
2149		ROM_LOAD( "8_051229", 0x380000, 0x80000, CRC(cc2edac2) SHA1(24bacd9e092a83945a8def3a254ec66758d71ff5) )
	2232	ROM_LOAD( "pirate.001", 0x000000, 0x80000, CRC(d2199619) SHA1(8c67ef7d0e305ae0783302ba9a1cb56cdcf4bc09) )
	2233	ROM_LOAD( "pirate.002", 0x100000, 0x80000, CRC(ce5c6548) SHA1(ef1cd6ae36cc1abcf010762dc89a255cd817d016) )
	2234	ROM_LOAD( "pirate.003", 0x200000, 0x80000, CRC(d6a8338d) SHA1(6a0e41309dc909decf8bd49cf13cbeca95f0314a) )
	2235	ROM_LOAD( "pirate.004", 0x300000, 0x80000, CRC(590b8cf6) SHA1(b2778f6e1b7bcf7f33ced43f999eff983e5a6af4) )
	2236	ROM_LOAD( "pirate.005", 0x080000, 0x80000, CRC(bf9f1267) SHA1(b0947bd7d31301ffbe80cbaf1e96c3476f6f9ca3) )
	2237	ROM_LOAD( "pirate.006", 0x180000, 0x80000, CRC(b0cdf7eb) SHA1(cf6bd20fb40cf0d87eeb6f1502fb73d9760c9140) )
	2238	ROM_LOAD( "pirate.007", 0x280000, 0x80000, CRC(6c4a9510) SHA1(e10bf8475ff7c73ba90b904b9214b285a5b2669f) )
	2239	ROM_LOAD( "pirate.008", 0x380000, 0x80000, CRC(cc2edac2) SHA1(24bacd9e092a83945a8def3a254ec66758d71ff5) )
2150	2240	ROM_END
2151	2241
2152	2242	ROM_START( pirate_3 ) // 060803
2153	2243	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2154		ROM_LOAD( "pr060803.rom", 0x00000, 0x40000, CRC(1de68707) SHA1(99dd3c5186ed8ba6c17e9f5479df93173da527e0) )
	2244	ROM_LOAD( "pr_m_060803.rom", 0x00000, 0x40000, CRC(1de68707) SHA1(99dd3c5186ed8ba6c17e9f5479df93173da527e0) )
2155	2245
2156	2246	ROM_REGION( 0x400000, "gfx", 0 )
2157		ROM_LOAD( "1_051229", 0x000000, 0x80000, CRC(d2199619) SHA1(8c67ef7d0e305ae0783302ba9a1cb56cdcf4bc09) )
2158		ROM_LOAD( "2_051229", 0x100000, 0x80000, CRC(ce5c6548) SHA1(ef1cd6ae36cc1abcf010762dc89a255cd817d016) )
2159		ROM_LOAD( "3_051229", 0x200000, 0x80000, CRC(d6a8338d) SHA1(6a0e41309dc909decf8bd49cf13cbeca95f0314a) )
2160		ROM_LOAD( "4_051229", 0x300000, 0x80000, CRC(590b8cf6) SHA1(b2778f6e1b7bcf7f33ced43f999eff983e5a6af4) )
2161		ROM_LOAD( "5_051229", 0x080000, 0x80000, CRC(bf9f1267) SHA1(b0947bd7d31301ffbe80cbaf1e96c3476f6f9ca3) )
2162		ROM_LOAD( "6_051229", 0x180000, 0x80000, CRC(b0cdf7eb) SHA1(cf6bd20fb40cf0d87eeb6f1502fb73d9760c9140) )
2163		ROM_LOAD( "7_051229", 0x280000, 0x80000, CRC(6c4a9510) SHA1(e10bf8475ff7c73ba90b904b9214b285a5b2669f) )
2164		ROM_LOAD( "8_051229", 0x380000, 0x80000, CRC(cc2edac2) SHA1(24bacd9e092a83945a8def3a254ec66758d71ff5) )
	2247	ROM_LOAD( "pirate.001", 0x000000, 0x80000, CRC(d2199619) SHA1(8c67ef7d0e305ae0783302ba9a1cb56cdcf4bc09) )
	2248	ROM_LOAD( "pirate.002", 0x100000, 0x80000, CRC(ce5c6548) SHA1(ef1cd6ae36cc1abcf010762dc89a255cd817d016) )
	2249	ROM_LOAD( "pirate.003", 0x200000, 0x80000, CRC(d6a8338d) SHA1(6a0e41309dc909decf8bd49cf13cbeca95f0314a) )
	2250	ROM_LOAD( "pirate.004", 0x300000, 0x80000, CRC(590b8cf6) SHA1(b2778f6e1b7bcf7f33ced43f999eff983e5a6af4) )
	2251	ROM_LOAD( "pirate.005", 0x080000, 0x80000, CRC(bf9f1267) SHA1(b0947bd7d31301ffbe80cbaf1e96c3476f6f9ca3) )
	2252	ROM_LOAD( "pirate.006", 0x180000, 0x80000, CRC(b0cdf7eb) SHA1(cf6bd20fb40cf0d87eeb6f1502fb73d9760c9140) )
	2253	ROM_LOAD( "pirate.007", 0x280000, 0x80000, CRC(6c4a9510) SHA1(e10bf8475ff7c73ba90b904b9214b285a5b2669f) )
	2254	ROM_LOAD( "pirate.008", 0x380000, 0x80000, CRC(cc2edac2) SHA1(24bacd9e092a83945a8def3a254ec66758d71ff5) )
2165	2255	ROM_END
2166	2256
2167	2257	ROM_START( pirate_4 ) // 070412
2168	2258	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2169		ROM_LOAD( "pr070412.rom", 0x00000, 0x40000, CRC(31909fb2) SHA1(f9ebad0de53645f7ed854147d8227a3b5b9224f4) )
	2259	ROM_LOAD( "pr_070412.rom", 0x00000, 0x40000, CRC(31909fb2) SHA1(f9ebad0de53645f7ed854147d8227a3b5b9224f4) )
2170	2260
2171	2261	ROM_REGION( 0x400000, "gfx", 0 )
2172		ROM_LOAD( "1_051229", 0x000000, 0x80000, CRC(d2199619) SHA1(8c67ef7d0e305ae0783302ba9a1cb56cdcf4bc09) )
2173		ROM_LOAD( "2_051229", 0x100000, 0x80000, CRC(ce5c6548) SHA1(ef1cd6ae36cc1abcf010762dc89a255cd817d016) )
2174		ROM_LOAD( "3_051229", 0x200000, 0x80000, CRC(d6a8338d) SHA1(6a0e41309dc909decf8bd49cf13cbeca95f0314a) )
2175		ROM_LOAD( "4_051229", 0x300000, 0x80000, CRC(590b8cf6) SHA1(b2778f6e1b7bcf7f33ced43f999eff983e5a6af4) )
2176		ROM_LOAD( "5_051229", 0x080000, 0x80000, CRC(bf9f1267) SHA1(b0947bd7d31301ffbe80cbaf1e96c3476f6f9ca3) )
2177		ROM_LOAD( "6_051229", 0x180000, 0x80000, CRC(b0cdf7eb) SHA1(cf6bd20fb40cf0d87eeb6f1502fb73d9760c9140) )
2178		ROM_LOAD( "7_051229", 0x280000, 0x80000, CRC(6c4a9510) SHA1(e10bf8475ff7c73ba90b904b9214b285a5b2669f) )
2179		ROM_LOAD( "8_051229", 0x380000, 0x80000, CRC(cc2edac2) SHA1(24bacd9e092a83945a8def3a254ec66758d71ff5) )
	2262	ROM_LOAD( "pirate.001", 0x000000, 0x80000, CRC(d2199619) SHA1(8c67ef7d0e305ae0783302ba9a1cb56cdcf4bc09) )
	2263	ROM_LOAD( "pirate.002", 0x100000, 0x80000, CRC(ce5c6548) SHA1(ef1cd6ae36cc1abcf010762dc89a255cd817d016) )
	2264	ROM_LOAD( "pirate.003", 0x200000, 0x80000, CRC(d6a8338d) SHA1(6a0e41309dc909decf8bd49cf13cbeca95f0314a) )
	2265	ROM_LOAD( "pirate.004", 0x300000, 0x80000, CRC(590b8cf6) SHA1(b2778f6e1b7bcf7f33ced43f999eff983e5a6af4) )
	2266	ROM_LOAD( "pirate.005", 0x080000, 0x80000, CRC(bf9f1267) SHA1(b0947bd7d31301ffbe80cbaf1e96c3476f6f9ca3) )
	2267	ROM_LOAD( "pirate.006", 0x180000, 0x80000, CRC(b0cdf7eb) SHA1(cf6bd20fb40cf0d87eeb6f1502fb73d9760c9140) )
	2268	ROM_LOAD( "pirate.007", 0x280000, 0x80000, CRC(6c4a9510) SHA1(e10bf8475ff7c73ba90b904b9214b285a5b2669f) )
	2269	ROM_LOAD( "pirate.008", 0x380000, 0x80000, CRC(cc2edac2) SHA1(24bacd9e092a83945a8def3a254ec66758d71ff5) )
2180	2270	ROM_END
2181	2271
2182	2272
r9812	r9813
2186	2276
2187	2277	ROM_START( pirate2 ) // 061005
2188	2278	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2189		ROM_LOAD( "pr2_061005.rom", 0x00000, 0x40000, CRC(4ad0a29a) SHA1(72950da5f201a393a4761a8696cfc210725df23f) )
	2279	ROM_LOAD( "pr2_m_061005.rom", 0x00000, 0x40000, CRC(4ad0a29a) SHA1(72950da5f201a393a4761a8696cfc210725df23f) )
2190	2280
2191	2281	ROM_REGION( 0x400000, "gfx", 0 )
2192		ROM_LOAD( "1_061005", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
2193		ROM_LOAD( "2_061005", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
2194		ROM_LOAD( "3_061005", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
2195		ROM_LOAD( "4_061005", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
2196		ROM_LOAD( "5_061005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
2197		ROM_LOAD( "6_061005", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
2198		ROM_LOAD( "7_061005", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
2199		ROM_LOAD( "8_061005", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
	2282	ROM_LOAD( "pirate2.001", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
	2283	ROM_LOAD( "pirate2.002", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
	2284	ROM_LOAD( "pirate2.003", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
	2285	ROM_LOAD( "pirate2.004", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
	2286	ROM_LOAD( "pirate2.005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
	2287	ROM_LOAD( "pirate2.006", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
	2288	ROM_LOAD( "pirate2.007", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
	2289	ROM_LOAD( "pirate2.008", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
2200	2290	ROM_END
2201	2291
2202
2203	2292	ROM_START( pirate2_2 ) // 070126
2204	2293	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2205	2294	ROM_LOAD( "pr2_070126.rom", 0x00000, 0x40000, CRC(5abf1580) SHA1(0f5c2ed4f52070dcbeb3adf0d209088e2822696d) )
2206	2295
2207	2296	ROM_REGION( 0x400000, "gfx", 0 )
2208		ROM_LOAD( "1_061005", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
2209		ROM_LOAD( "2_061005", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
2210		ROM_LOAD( "3_061005", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
2211		ROM_LOAD( "4_061005", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
2212		ROM_LOAD( "5_061005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
2213		ROM_LOAD( "6_061005", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
2214		ROM_LOAD( "7_061005", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
2215		ROM_LOAD( "8_061005", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
	2297	ROM_LOAD( "pirate2.001", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
	2298	ROM_LOAD( "pirate2.002", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
	2299	ROM_LOAD( "pirate2.003", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
	2300	ROM_LOAD( "pirate2.004", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
	2301	ROM_LOAD( "pirate2.005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
	2302	ROM_LOAD( "pirate2.006", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
	2303	ROM_LOAD( "pirate2.007", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
	2304	ROM_LOAD( "pirate2.008", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
2216	2305	ROM_END
2217	2306
2218	2307
	2308
2219	2309	/*********************************************************
2220	2310	Keks
2221	2311
2222		Roms 1-4 were changed after the 070119 update.
2223		The official list of hashes shows the 070119 updated roms.
	2312	"Russia" sets use different gfx roms 1-4.
	2313	The official list of hashes shows only updated roms.
2224	2314
2225	2315	**********************************************************/
2226	2316
2227	2317	ROM_START( keks ) // 060328
2228	2318	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2229		ROM_LOAD( "ks060328.rom", 0x00000, 0x40000, CRC(bcf77f77) SHA1(26b09994907c41be957a0b7442cfb1807b27d7be) )
	2319	ROM_LOAD( "ks_m_060328.rom", 0x00000, 0x40000, CRC(bcf77f77) SHA1(26b09994907c41be957a0b7442cfb1807b27d7be) )
2230	2320
2231	2321	ROM_REGION( 0x400000, "gfx", 0 )
2232		ROM_LOAD( "1_060328", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
2233		ROM_LOAD( "2_060328", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
2234		ROM_LOAD( "3_060328", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
2235		ROM_LOAD( "4_060328", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
2236		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
2237		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
2238		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
2239		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	2322	ROM_LOAD( "keks_m.001", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
	2323	ROM_LOAD( "keks_m.002", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
	2324	ROM_LOAD( "keks_m.003", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
	2325	ROM_LOAD( "keks_m.004", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
	2326	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	2327	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	2328	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	2329	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
2240	2330	ROM_END
2241	2331
2242	2332
2243	2333	ROM_START( keks_2 ) // 060403
2244	2334	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2245		ROM_LOAD( "ks060403.rom", 0x00000, 0x40000, CRC(7abb9392) SHA1(f7a0ba5bcc7566f706e911486fa9cf3e62b86b8b) )
	2335	ROM_LOAD( "ks_m_060403.rom", 0x00000, 0x40000, CRC(7abb9392) SHA1(f7a0ba5bcc7566f706e911486fa9cf3e62b86b8b) )
2246	2336
2247	2337	ROM_REGION( 0x400000, "gfx", 0 )
2248		ROM_LOAD( "1_060328", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
2249		ROM_LOAD( "2_060328", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
2250		ROM_LOAD( "3_060328", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
2251		ROM_LOAD( "4_060328", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
2252		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
2253		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
2254		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
2255		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	2338	ROM_LOAD( "keks_m.001", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
	2339	ROM_LOAD( "keks_m.002", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
	2340	ROM_LOAD( "keks_m.003", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
	2341	ROM_LOAD( "keks_m.004", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
	2342	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	2343	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	2344	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	2345	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
2256	2346	ROM_END
2257	2347
2258	2348	ROM_START( keks_3 ) // 070119
2259	2349	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2260		ROM_LOAD( "ks070119.rom", 0x00000, 0x40000, CRC(1cf8fdaa) SHA1(a7f1242d19c5fb5a6fccacc06dd9d27f3352fe24) )
	2350	ROM_LOAD( "ks_070119.rom", 0x00000, 0x40000, CRC(1cf8fdaa) SHA1(a7f1242d19c5fb5a6fccacc06dd9d27f3352fe24) )
2261	2351
2262	2352	ROM_REGION( 0x400000, "gfx", 0 )
2263		ROM_LOAD( "1_070119", 0x000000, 0x80000, CRC(fc399595) SHA1(037afd4a613cd58d4a28627b9e395d48c3fa866a) )
2264		ROM_LOAD( "2_070119", 0x100000, 0x80000, CRC(474b36e7) SHA1(e1e62acd4a706b2654fc1249850806b612fc1419) )
2265		ROM_LOAD( "3_070119", 0x200000, 0x80000, CRC(7f885e3d) SHA1(09bb4690e86ed4a29eef75ee4e5753ce40a164dd) )
2266		ROM_LOAD( "4_070119", 0x300000, 0x80000, CRC(a0fc654b) SHA1(3354bdb7aa372816a766b0d36408543de7d3482f) )
2267		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
2268		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
2269		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
2270		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	2353	ROM_LOAD( "keks.001", 0x000000, 0x80000, CRC(fc399595) SHA1(037afd4a613cd58d4a28627b9e395d48c3fa866a) )
	2354	ROM_LOAD( "keks.002", 0x100000, 0x80000, CRC(474b36e7) SHA1(e1e62acd4a706b2654fc1249850806b612fc1419) )
	2355	ROM_LOAD( "keks.003", 0x200000, 0x80000, CRC(7f885e3d) SHA1(09bb4690e86ed4a29eef75ee4e5753ce40a164dd) )
	2356	ROM_LOAD( "keks.004", 0x300000, 0x80000, CRC(a0fc654b) SHA1(3354bdb7aa372816a766b0d36408543de7d3482f) )
	2357	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	2358	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	2359	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	2360	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
2271	2361	ROM_END
2272	2362
	2363
	2364
2273	2365	/*********************************************************
2274	2366	Gnome
2275	2367	**********************************************************/
2276	2368
2277	2369	ROM_START( gnome ) // 070906
2278	2370	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2279		ROM_LOAD( "gn070906.rom", 0x00000, 0x40000, CRC(8fe48f72) SHA1(cc3c74be120359ecfc42a5e96eff95c2da1e8f4c) )
	2371	ROM_LOAD( "gn_070906.rom", 0x00000, 0x40000, CRC(8fe48f72) SHA1(cc3c74be120359ecfc42a5e96eff95c2da1e8f4c) )
2280	2372
2281	2373	ROM_REGION( 0x400000, "gfx", 0 )
2282		ROM_LOAD( "1_070906", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
2283		ROM_LOAD( "2_070906", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
2284		ROM_LOAD( "3_070906", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
2285		ROM_LOAD( "4_070906", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
2286		ROM_LOAD( "5_070906", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
2287		ROM_LOAD( "6_070906", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
2288		ROM_LOAD( "7_070906", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
2289		ROM_LOAD( "8_070906", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
	2374	ROM_LOAD( "gnome.001", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
	2375	ROM_LOAD( "gnome.002", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
	2376	ROM_LOAD( "gnome.003", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
	2377	ROM_LOAD( "gnome.004", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
	2378	ROM_LOAD( "gnome.005", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
	2379	ROM_LOAD( "gnome.006", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
	2380	ROM_LOAD( "gnome.007", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
	2381	ROM_LOAD( "gnome.008", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
2290	2382	ROM_END
2291	2383
	2384	ROM_START( gnome_2 ) // 071115
	2385	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
	2386	ROM_LOAD( "gn_071115.rom", 0x00000, 0x40000, CRC(2fb768b8) SHA1(b0aadf057bd8a5b6cdcef5baed190c3d222256ca) )
2292	2387
	2388	ROM_REGION( 0x400000, "gfx", 0 )
	2389	ROM_LOAD( "gnome.001", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
	2390	ROM_LOAD( "gnome.002", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
	2391	ROM_LOAD( "gnome.003", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
	2392	ROM_LOAD( "gnome.004", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
	2393	ROM_LOAD( "gnome.005", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
	2394	ROM_LOAD( "gnome.006", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
	2395	ROM_LOAD( "gnome.007", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
	2396	ROM_LOAD( "gnome.008", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
	2397	ROM_END
	2398
	2399
2293	2400	/*********************************************************
2294	2401	Fruit Cocktail 2
2295	2402
2296		Roms 4-8 were changed 11/19/2008 (listed below as non "a" roms)
	2403	Roms 4-8 were changed 11/19/2008 (listed below as non "old" roms)
2297	2404
2298	2405	The Igrosoft web site explains:
2299	2406	The wrong representation of the number of free games
r9812	r9813
2303	2410
2304	2411	/* no supported sets */
2305	2412
	2413
	2414
2306	2415	/*********************************************************
2307	2416	Crazy Monkey 2
2308	2417	**********************************************************/
r9812	r9813
2365	2474
2366	2475
2367	2476	#define mfish_parent mfish_3
2368		//GAME( 2002, mfish, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (021120)", 0 ) /* World */
2369		//GAME( 2002, mfish_2, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (021121)", 0 ) /* World */
2370		GAME( 2002, mfish_3, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (021124)", 0 ) /* World */
2371		//GAME( 2002, mfish_4, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (021219)", 0 ) /* World */
2372		//GAME( 2002, mfish_5, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (021227)", 0 ) /* World */
2373		GAME( 2002, mfish_6, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (030124)", 0 ) /* World */
2374		//GAME( 2002, mfish_7, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (030511)", 0 ) /* World */
2375		//GAME( 2002, mfish_8, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (030522)", 0 ) /* World */
2376		//GAME( 2002, mfish_9, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (031026)", 0 ) /* World */
2377		//GAME( 2002, mfish_10, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (031117)", 0 ) /* World */
2378		GAME( 2002, mfish_11, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (031124)", 0 ) /* World */
2379		GAME( 2002, mfish_12, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (040308)", 0 ) /* World */
2380		GAME( 2002, mfish_13, mfish_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Multi Fish (040316)", 0 ) /* World */
	2477	//GAME( 2002, mfish, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (021120)", GAME_SUPPORTS_SAVE ) /* World */
	2478	//GAME( 2002, mfish_2, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (021121)", GAME_SUPPORTS_SAVE ) /* World */
	2479	GAME( 2002, mfish_3, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (021124)", GAME_SUPPORTS_SAVE ) /* World */
	2480	//GAME( 2002, mfish_4, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (021219)", GAME_SUPPORTS_SAVE ) /* World */
	2481	//GAME( 2002, mfish_5, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (021227)", GAME_SUPPORTS_SAVE ) /* World */
	2482	GAME( 2002, mfish_6, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (030124)", GAME_SUPPORTS_SAVE ) /* World */
	2483	//GAME( 2002, mfish_7, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (030511)", GAME_SUPPORTS_SAVE ) /* World */
	2484	//GAME( 2002, mfish_8, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (030522)", GAME_SUPPORTS_SAVE ) /* World */
	2485	//GAME( 2002, mfish_9, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (031026)", GAME_SUPPORTS_SAVE ) /* World */
	2486	//GAME( 2002, mfish_10, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (031117)", GAME_SUPPORTS_SAVE ) /* World */
	2487	GAME( 2002, mfish_11, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (031124)", GAME_SUPPORTS_SAVE ) /* World */
	2488	GAME( 2002, mfish_12, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (040308)", GAME_SUPPORTS_SAVE ) /* World */
	2489	GAME( 2002, mfish_13, mfish_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Multi Fish (040316)", GAME_SUPPORTS_SAVE ) /* World */
2381	2490
2382	2491	#define crzmon_parent crzmon_5
2383		//GAME( 2003, crzmon, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (030217 World)", 0 ) /* World */
2384		//GAME( 2003, crzmon_2, crzmon_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (030225 World)", 0 ) /* World */
2385		//GAME( 2003, crzmon_3, crzmon_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (030227 World)", 0 ) /* World */
2386		//GAME( 2003, crzmon_4, crzmon_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (030404 World)", 0 ) /* World */
2387		GAME( 2003, crzmon_5, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (030421 World)", 0 ) /* World */
2388		//GAME( 2003, crzmon_6, crzmon_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (031016 World)", 0 ) /* World */
2389		GAME( 2003, crzmon_7, crzmon_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (031110 World)", 0 ) /* World */
2390		GAME( 2003, crzmon_8, crzmon_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (050120 World)", 0 ) /* World */
2391		GAME( 2003, crzmon_9, crzmon_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Crazy Monkey (070315 Russia)", 0 ) /* Russia */
	2492	//GAME( 2003, crzmon, crzmon_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (030217 World)", GAME_SUPPORTS_SAVE ) /* World */
	2493	//GAME( 2003, crzmon_2, crzmon_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (030225 World)", GAME_SUPPORTS_SAVE ) /* World */
	2494	//GAME( 2003, crzmon_3, crzmon_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (030227 World)", GAME_SUPPORTS_SAVE ) /* World */
	2495	//GAME( 2003, crzmon_4, crzmon_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (030404 World)", GAME_SUPPORTS_SAVE ) /* World */
	2496	GAME( 2003, crzmon_5, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (030421 World)", GAME_SUPPORTS_SAVE ) /* World */
	2497	//GAME( 2003, crzmon_6, crzmon_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (031016 World)", GAME_SUPPORTS_SAVE ) /* World */
	2498	GAME( 2003, crzmon_7, crzmon_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (031110 World)", GAME_SUPPORTS_SAVE ) /* World */
	2499	GAME( 2003, crzmon_8, crzmon_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (050120 World)", GAME_SUPPORTS_SAVE ) /* World */
	2500	GAME( 2003, crzmon_9, crzmon_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Crazy Monkey (070315 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2392	2501
2393		#define fcockt_parent fcockt_5
2394		//GAME( 2003, fcockt, fcockt_parent multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (030505 World)", 0 ) /* World */
2395		//GAME( 2003, fcockt_2, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (030512 World)", 0 ) /* World */
2396		//GAME( 2003, fcockt_3, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (030623 World)", 0 ) /* World */
2397		//GAME( 2003, fcockt_4, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (031028 World)", 0 ) /* World */
2398		GAME( 2003, fcockt_5, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (031111 World)", 0 ) /* World */
2399		GAME( 2003, fcockt_6, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (040216 World)", 0 ) /* World */
2400		GAME( 2003, fcockt_7, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (050118 World)", 0 ) /* World */
2401		GAME( 2003, fcockt_8, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (060111 World)", 0 ) /* World */
2402		GAME( 2003, fcockt_9, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (070305 Russia)", 0 ) /* Russia */
2403		GAME( 2003, fcockt_10, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (070517 Russia)", 0 ) /* Russia */
2404		GAME( 2003, fcockt_11, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (070822 Russia)", 0 ) /* Russia */
2405		GAME( 2003, fcockt_12, fcockt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Fruit Cocktail (070911 Russia)", 0 ) /* Russia */
	2502	#define fcockt_parent fcockt_3
	2503	//GAME( 2003, fcockt, fcockt_parent multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (030505 World)", GAME_SUPPORTS_SAVE ) /* World */
	2504	//GAME( 2003, fcockt_2, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (030512 World)", GAME_SUPPORTS_SAVE ) /* World */
	2505	GAME( 2003, fcockt_3, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (030623 World)", GAME_SUPPORTS_SAVE ) /* World */
	2506	//GAME( 2003, fcockt_4, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (031028 World)", GAME_SUPPORTS_SAVE ) /* World */
	2507	GAME( 2003, fcockt_5, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (031111 World)", GAME_SUPPORTS_SAVE ) /* World */
	2508	GAME( 2003, fcockt_6, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (040216 World)", GAME_SUPPORTS_SAVE ) /* World */
	2509	GAME( 2003, fcockt_7, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (050118 World)", GAME_SUPPORTS_SAVE ) /* World */
	2510	GAME( 2003, fcockt_8, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (060111 World)", GAME_SUPPORTS_SAVE ) /* World */
	2511	GAME( 2003, fcockt_9, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (070305 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
	2512	GAME( 2003, fcockt_10, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (070517 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
	2513	GAME( 2003, fcockt_11, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (070822 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
	2514	GAME( 2003, fcockt_12, fcockt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Fruit Cocktail (070911 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2406	2515
	2516	#define lhaunt_parent lhaunt_2
	2517	//GAME( 2003, lhaunt, lhaunt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Lucky Haunter (030707 World)", GAME_SUPPORTS_SAVE ) /* World */
	2518	GAME( 2003, lhaunt_2, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Lucky Haunter (030804 World)", GAME_SUPPORTS_SAVE ) /* World */
	2519	//GAME( 2003, lhaunt_3, lhaunt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Lucky Haunter (031027 World)", GAME_SUPPORTS_SAVE ) /* World */
	2520	GAME( 2003, lhaunt_4, lhaunt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Lucky Haunter (031111 World)", GAME_SUPPORTS_SAVE ) /* World */
	2521	GAME( 2003, lhaunt_5, lhaunt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Lucky Haunter (040216 World)", GAME_SUPPORTS_SAVE ) /* World */
	2522	GAME( 2003, lhaunt_6, lhaunt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Lucky Haunter (040825 World)", GAME_SUPPORTS_SAVE ) /* World */
	2523	GAME( 2003, lhaunt_7, lhaunt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Lucky Haunter (070402 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
	2524	GAME( 2003, lhaunt_8, lhaunt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Lucky Haunter (070604 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2407	2525
2408		#define lhaunt_parent lhaunt_4
2409		//GAME( 2003, lhaunt, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Lucky Haunter (030707 World)", 0 ) /* World */
2410		//GAME( 2003, lhaunt_2, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Lucky Haunter (030804 World)", 0 ) /* World */
2411		//GAME( 2003, lhaunt_3, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Lucky Haunter (031027 World)", 0 ) /* World */
2412		GAME( 2003, lhaunt_4, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Lucky Haunter (031111 World)", 0 ) /* World */
2413		GAME( 2003, lhaunt_5, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Lucky Haunter (040216 World)", 0 ) /* World */
2414		GAME( 2003, lhaunt_6, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Lucky Haunter (040825 World)", 0 ) /* World */
2415		GAME( 2003, lhaunt_7, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Lucky Haunter (070402 Russia)", 0 ) /* Russia */
2416		GAME( 2003, lhaunt_8, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Lucky Haunter (070604 Russia)", 0 ) /* Russia */
2417
2418	2526	#define rollfr_parent rollfr_2
2419		//GAME( 2003, rollfr, rollfr_parent, multfish, rollfr, igrosoft, ROT0, "Igrosoft", "Roll Fruit (030821)", 0 ) /* World */
2420		GAME( 2003, rollfr_2, 0, multfish, rollfr, igrosoft, ROT0, "Igrosoft", "Roll Fruit (040318)", 0 ) /* World */
	2527	//GAME( 2003, rollfr, rollfr_parent, rollfr, rollfr, 0, ROT0, "Igrosoft", "Roll Fruit (030821)", GAME_SUPPORTS_SAVE ) /* World */
	2528	GAME( 2003, rollfr_2, 0, rollfr, rollfr, 0, ROT0, "Igrosoft", "Roll Fruit (040318)", GAME_SUPPORTS_SAVE ) /* World */
2421	2529
2422	2530	#define garage_parent garage_4
2423		//GAME( 2004, garage, garage_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Garage (040122 World)", 0 ) /* World */
2424		//GAME( 2004, garage_2, garage_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Garage (040123 World)", 0 ) /* World */
2425		//GAME( 2004, garage_3, garage_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Garage (040216 World)", 0 ) /* World */
2426		GAME( 2004, garage_4, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Garage (040219 World)", 0 ) /* World */
2427		GAME( 2004, garage_5, garage_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Garage (050311 World)", 0 ) /* World */
2428		GAME( 2004, garage_6, garage_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Garage (070213 Russia)", 0 ) /* Russia */
2429		GAME( 2004, garage_7, garage_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Garage (070329 Russia)", 0 ) /* Russia */
	2531	//GAME( 2004, garage, garage_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Garage (040122 World)", GAME_SUPPORTS_SAVE ) /* World */
	2532	//GAME( 2004, garage_2, garage_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Garage (040123 World)", GAME_SUPPORTS_SAVE ) /* World */
	2533	//GAME( 2004, garage_3, garage_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Garage (040216 World)", GAME_SUPPORTS_SAVE ) /* World */
	2534	GAME( 2004, garage_4, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Garage (040219 World)", GAME_SUPPORTS_SAVE ) /* World */
	2535	GAME( 2004, garage_5, garage_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Garage (050311 World)", GAME_SUPPORTS_SAVE ) /* World */
	2536	GAME( 2004, garage_6, garage_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Garage (070213 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
	2537	GAME( 2004, garage_7, garage_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Garage (070329 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2430	2538
2431	2539	#define rclimb_parent rclimb
2432		GAME( 2004, rclimb, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Rock Climber (040815 World)", 0 ) /* World */
2433		//GAME( 2004, rclimb_2, rclimb_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Rock Climber (040823 World)", 0 ) /* World */
2434		GAME( 2004, rclimb_3, rclimb_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Rock Climber (040827 World)", 0 ) /* World */
2435		GAME( 2004, rclimb_4, rclimb_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Rock Climber (070322 Russia)", 0 ) /* Russia */
2436		GAME( 2004, rclimb_5, rclimb_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Rock Climber (070621 Russia)", 0 ) /* Russia */
	2540	GAME( 2004, rclimb, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Rock Climber (040815 World)", GAME_SUPPORTS_SAVE ) /* World */
	2541	//GAME( 2004, rclimb_2, rclimb_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Rock Climber (040823 World)", GAME_SUPPORTS_SAVE ) /* World */
	2542	GAME( 2004, rclimb_3, rclimb_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Rock Climber (040827 World)", GAME_SUPPORTS_SAVE ) /* World */
	2543	GAME( 2004, rclimb_4, rclimb_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Rock Climber (070322 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
	2544	GAME( 2004, rclimb_5, rclimb_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Rock Climber (070621 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2437	2545
	2546
2438	2547	#define sweetl_parent sweetl
2439		GAME( 2004, sweetl, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Sweet Life (041220 World)", 0 ) /* World */
2440		GAME( 2004, sweetl_2, sweetl_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Sweet Life (070412 Russia)", 0 ) /* Russia */
	2548	GAME( 2004, sweetl, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Sweet Life (041220 World)", GAME_SUPPORTS_SAVE ) /* World */
	2549	GAME( 2004, sweetl_2, sweetl_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Sweet Life (070412 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2441	2550
2442		#define resdnt_parent resdnt_2
2443		//GAME( 2004, resdnt, resdnt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Resident (040415 World)", 0 ) /* World */
2444		GAME( 2004, resdnt_2, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Resident (040513 World)", 0 ) /* World */
2445		GAME( 2004, resdnt_3, resdnt_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Resident (070222 Russia)", 0 ) /* Russia */
	2551	#define resdnt_parent resdnt
	2552	GAME( 2004, resdnt, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Resident (040415 World)", GAME_SUPPORTS_SAVE ) /* World */
	2553	GAME( 2004, resdnt_2, resdnt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Resident (040513 World)", GAME_SUPPORTS_SAVE ) /* World */
	2554	GAME( 2004, resdnt_3, resdnt_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Resident (070222 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2446	2555
2447	2556	#define island_parent island
2448		GAME( 2005, island, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Island (050713 World)", 0 ) /* World */
	2557	GAME( 2005, island, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Island (050713 World)", GAME_SUPPORTS_SAVE ) /* World */
	2558	GAME( 2005, island_2, island_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Island (070409 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2449	2559
2450	2560	#define pirate_parent pirate_2
2451		//GAME( 2005, pirate, pirate_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Pirate (051229 World)", 0 ) /* World */
2452		GAME( 2005, pirate_2, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Pirate (060210 World)", 0 ) /* World */
2453		GAME( 2005, pirate_3, pirate_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Pirate (060803 World)", 0 ) /* World */
2454		GAME( 2005, pirate_4, pirate_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Pirate (070412 Russia)", 0 ) /* Russia */
	2561	//GAME( 2005, pirate, pirate_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Pirate (051229 World)", GAME_SUPPORTS_SAVE ) /* World */
	2562	GAME( 2005, pirate_2, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Pirate (060210 World)", GAME_SUPPORTS_SAVE ) /* World */
	2563	GAME( 2005, pirate_3, pirate_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Pirate (060803 World)", GAME_SUPPORTS_SAVE ) /* World */
	2564	GAME( 2005, pirate_4, pirate_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Pirate (070412 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2455	2565
2456	2566	#define island2_parent island2
2457		GAME( 2006, island2, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Island 2 (060529 World)", 0 ) /* World */
2458		//GAME( 2006, island2_2, island2_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Island 2 (061214 World)", 0 ) /* World */
2459		GAME( 2006, island2_3, island2_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Island 2 (061218 World)", 0 ) /* World */
2460		GAME( 2006, island2_4, island2_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Island 2 (070205 Russia)", 0 ) /* Russia */
	2567	GAME( 2006, island2, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Island 2 (060529 World)", GAME_SUPPORTS_SAVE ) /* World */
	2568	//GAME( 2006, island2_2, island2_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Island 2 (061214 World)", GAME_SUPPORTS_SAVE ) /* World */
	2569	GAME( 2006, island2_3, island2_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Island 2 (061218 World)", GAME_SUPPORTS_SAVE ) /* World */
	2570	GAME( 2006, island2_4, island2_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Island 2 (070205 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2461	2571
	2572
2462	2573	#define pirate2_parent pirate2
2463		GAME( 2006, pirate2, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Pirate 2 (061005 World)", 0 ) /* World */
2464		GAME( 2006, pirate2_2, pirate2_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Pirate 2 (070126 Russia)", 0 ) /* Russia */
	2574	GAME( 2006, pirate2, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Pirate 2 (061005 World)", GAME_SUPPORTS_SAVE ) /* World */
	2575	GAME( 2006, pirate2_2, pirate2_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Pirate 2 (070126 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2465	2576
	2577
2466	2578	#define keks_parent keks
2467		GAME( 2006, keks, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Keks (060328 World)", 0 ) /* World */
2468		GAME( 2006, keks_2, keks_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Keks (060403 World)", 0 ) /* World */
2469		GAME( 2006, keks_3, keks_parent, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Keks (070119 Russia)", 0 ) /* Russia */
	2579	GAME( 2006, keks, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Keks (060328 World)", GAME_SUPPORTS_SAVE ) /* World */
	2580	GAME( 2006, keks_2, keks_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Keks (060403 World)", GAME_SUPPORTS_SAVE ) /* World */
	2581	GAME( 2006, keks_3, keks_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Keks (070119 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2470	2582
	2583
2471	2584	#define gnome_parent gnome
2472		GAME( 2007, gnome, 0, multfish, multfish, igrosoft, ROT0, "Igrosoft", "Gnome (070906 Russia)", 0 ) /* Russia */
	2585	GAME( 2007, gnome, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Gnome (070906 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
	2586	GAME( 2007, gnome_2, gnome_parent, multfish, multfish, 0, ROT0, "Igrosoft", "Gnome (071115 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
2473	2587
2474	2588
	2589	#define sweetl2_parent sweetl2
	2590	GAME( 2007, sweetl2, 0, multfish, multfish, 0, ROT0, "Igrosoft", "Sweet Life 2 (071217 Russia)", GAME_SUPPORTS_SAVE ) /* Russia */
	2591
	2592
2475	2593	/*************************************************************************************************************************************************************/
2476	2594	/*************************************************************************************************************************************************************/
2477	2595	/*************************************************************************************************************************************************************/
r9812	r9813
2492	2610	ROM_LOAD( "bootleg_mf021124a.rom", 0x00000, 0x40000, CRC(31344b4e) SHA1(33c7f30b55d22c087a02e840456d475177df8bf1) ) /* Not officially listed on Igrosoft's web site hash page */
2493	2611
2494	2612	ROM_REGION( 0x400000, "gfx", 0 )
2495		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
2496		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
2497		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
2498		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
2499		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
2500		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
2501		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
2502		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	2613	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	2614	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	2615	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	2616	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	2617	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	2618	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	2619	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	2620	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
2503	2621	ROM_END
2504	2622
2505
2506	2623	ROM_START( mfish_12a ) // 040308 bank F9
2507	2624	ROM_REGION( 0x40000, "maincpu", 0 )
2508	2625	ROM_LOAD( "bootleg_mf040308a.rom", 0x00000, 0x40000, CRC(44537648) SHA1(7bce6085778ff0b21c052ae91703de3b78b8eed0) ) /* Not officially listed on Igrosoft's web site hash page */
2509	2626
2510	2627	ROM_REGION( 0x400000, "gfx", 0 )
2511		ROM_LOAD( "1_021120", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
2512		ROM_LOAD( "2_021120", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
2513		ROM_LOAD( "3_021120", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
2514		ROM_LOAD( "4_021120", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
2515		ROM_LOAD( "5_021120", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
2516		ROM_LOAD( "6_021120", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
2517		ROM_LOAD( "7_021120", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
2518		ROM_LOAD( "8_021120", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
	2628	ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
	2629	ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
	2630	ROM_LOAD( "multi_fish.003", 0x200000, 0x80000, CRC(33759c2a) SHA1(6afcee2e00a27542fc9751702abcc84cd7d3a2a8) )
	2631	ROM_LOAD( "multi_fish.004", 0x300000, 0x80000, CRC(d0053546) SHA1(01c69be0c594947d57648f491904a3b6938a5570) )
	2632	ROM_LOAD( "multi_fish.005", 0x080000, 0x80000, CRC(6f632872) SHA1(949661cb234855a9c86403e9893c5d9f465ddd79) )
	2633	ROM_LOAD( "multi_fish.006", 0x180000, 0x80000, CRC(023c1193) SHA1(98cf2732f9542b0bb3bee324611f6d3143ef1dc4) )
	2634	ROM_LOAD( "multi_fish.007", 0x280000, 0x80000, CRC(9afdc2d3) SHA1(b112fd2005354c9f97d77030bdb6f99d7b5c8050) )
	2635	ROM_LOAD( "multi_fish.008", 0x380000, 0x80000, CRC(29f1a326) SHA1(5e268411cab888c0727aaf8ae7d0b435d2efd189) )
2519	2636	ROM_END
2520	2637
2521	2638
	2639
2522	2640	ROM_START( crzmon_7a ) // 031110 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
2523	2641	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2524		ROM_LOAD( "bootleg_cm031110a.rom", 0x00000, 0x40000, CRC(80666246) SHA1(e15a210b11ba769ca4fd637c962932417555dc0e) ) /* Not officially listed on Igrosoft's web site hash page */
	2642	ROM_LOAD( "bootleg_cm_m_031110a.rom", 0x00000, 0x40000, CRC(80666246) SHA1(e15a210b11ba769ca4fd637c962932417555dc0e) ) /* Not officially listed on Igrosoft's web site hash page */
2525	2643
2526	2644	ROM_REGION( 0x400000, "gfx", 0 )
2527		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
2528		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
2529		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
2530		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
2531		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
2532		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
2533		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
2534		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	2645	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	2646	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	2647	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	2648	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	2649	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	2650	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	2651	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	2652	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
2535	2653	ROM_END
2536	2654
2537	2655	ROM_START( crzmon_7b ) // 031110 backdoor 1,5 5,5 1,7 3,2 3,3 3,4
2538	2656	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2539		ROM_LOAD( "bootleg_cm031110b.rom", 0x00000, 0x40000, CRC(bb6f4f85) SHA1(a2f44632f857392eb422412b55a19decae4c8620) ) /* Not officially listed on Igrosoft's web site hash page */
	2657	ROM_LOAD( "bootleg_cm_m_031110b.rom", 0x00000, 0x40000, CRC(bb6f4f85) SHA1(a2f44632f857392eb422412b55a19decae4c8620) ) /* Not officially listed on Igrosoft's web site hash page */
2540	2658
2541	2659	ROM_REGION( 0x400000, "gfx", 0 )
2542		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
2543		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
2544		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
2545		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
2546		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
2547		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
2548		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
2549		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	2660	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	2661	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	2662	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	2663	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	2664	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	2665	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	2666	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	2667	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
2550	2668	ROM_END
2551	2669
2552
2553
2554
2555	2670	ROM_START( crzmon_8a ) // 050120 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
2556	2671	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2557		ROM_LOAD( "bootleg_cm050120a.rom", 0x00000, 0x40000, CRC(e20a6997) SHA1(50e0f0f354dd6db2be64d42e36b4043915c4276b) ) /* Not officially listed on Igrosoft's web site hash page */
	2672	ROM_LOAD( "bootleg_cm_m_050120a.rom", 0x00000, 0x40000, CRC(e20a6997) SHA1(50e0f0f354dd6db2be64d42e36b4043915c4276b) ) /* Not officially listed on Igrosoft's web site hash page */
2558	2673
2559	2674	ROM_REGION( 0x400000, "gfx", 0 )
2560		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
2561		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
2562		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
2563		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
2564		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
2565		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
2566		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
2567		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	2675	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	2676	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	2677	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	2678	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	2679	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	2680	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	2681	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	2682	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
2568	2683	ROM_END
2569	2684
2570	2685	ROM_START( crzmon_8b ) // 050120 changed version text to 070315
2571	2686	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2572		ROM_LOAD( "bootleg_cm050120b.rom", 0x00000, 0x40000, CRC(9350d184) SHA1(ccb79bb6c5e9025d64fe07c02334c43d75ee3334) ) /* Not officially listed on Igrosoft's web site hash page */
	2687	ROM_LOAD( "bootleg_cm_m_050120b.rom", 0x00000, 0x40000, CRC(9350d184) SHA1(ccb79bb6c5e9025d64fe07c02334c43d75ee3334) ) /* Not officially listed on Igrosoft's web site hash page */
2573	2688
2574	2689	ROM_REGION( 0x400000, "gfx", 0 )
2575		ROM_LOAD( "1_030217", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
2576		ROM_LOAD( "2_030217", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
2577		ROM_LOAD( "3_030217", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
2578		ROM_LOAD( "4_030217", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
2579		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
2580		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
2581		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
2582		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	2690	ROM_LOAD( "crazymonkey_m.001", 0x000000, 0x80000, CRC(683f2be3) SHA1(6fdba4ec07752bf049787a11638895352e9d5f10) )
	2691	ROM_LOAD( "crazymonkey_m.002", 0x100000, 0x80000, CRC(e21ce6a4) SHA1(942ffe323ddbcaaad887cb5bc9f356550926083b) )
	2692	ROM_LOAD( "crazymonkey_m.003", 0x200000, 0x80000, CRC(c3d0e3d5) SHA1(5b0cb436c6b0bac1213c1df56702fa7f16856106) )
	2693	ROM_LOAD( "crazymonkey_m.004", 0x300000, 0x80000, CRC(f79df52c) SHA1(b99fa9f61849b62668bf9edff1c80212a9108b15) )
	2694	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	2695	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	2696	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	2697	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
2583	2698	ROM_END
2584	2699
2585	2700	ROM_START( crzmon_8c ) // 050120 custom alteras, modified graphics, changed version text to "VIDEO GAME-1 CM01"
2586	2701	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2587		ROM_LOAD( "bootleg_cm050120c.rom", 0x00000, 0x40000, CRC(231008a7) SHA1(81f77644ba971946cfdf40e6f886652550b10bae) ) /* Not officially listed on Igrosoft's web site hash page */
	2702	ROM_LOAD( "bootleg_cm_m_050120c.rom", 0x00000, 0x40000, CRC(231008a7) SHA1(81f77644ba971946cfdf40e6f886652550b10bae) ) /* Not officially listed on Igrosoft's web site hash page */
2588	2703
2589	2704	ROM_REGION( 0x400000, "gfx", 0 )
2590	2705	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(6595a293) SHA1(87b6adc837ca7540dd1ae10b544bd753abc95c38) )
r9812	r9813
2599	2714
2600	2715	ROM_START( crzmon_8d ) // 050120 modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
2601	2716	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2602		ROM_LOAD( "bootleg_cm050120d.rom", 0x00000, 0x40000, CRC(ad37f261) SHA1(0e03bf6134b59340cb43b7d3bdd0e746ebfb112a) ) /* Not officially listed on Igrosoft's web site hash page */
	2717	ROM_LOAD( "bootleg_cm_m_050120d.rom", 0x00000, 0x40000, CRC(ad37f261) SHA1(0e03bf6134b59340cb43b7d3bdd0e746ebfb112a) ) /* Not officially listed on Igrosoft's web site hash page */
2603	2718
2604	2719	ROM_REGION( 0x400000, "gfx", 0 )
2605	2720	ROM_LOAD( "bootleg_1e", 0x000000, 0x80000, CRC(0a087fce) SHA1(32bb353a45ea39e16fafb78bb10dbd3d330365a6) )
2606	2721	ROM_LOAD( "bootleg_2e", 0x100000, 0x80000, CRC(210c9cf0) SHA1(ede3cdb9be7dddd4619cd91e1eb51656ba49e250) )
2607	2722	ROM_LOAD( "bootleg_3e", 0x200000, 0x80000, CRC(08f5933a) SHA1(16a232c634778e4a5f39c6890606ad402b2a52ca) )
2608	2723	ROM_LOAD( "bootleg_4e", 0x300000, 0x80000, CRC(e12abf21) SHA1(cc015cdda4e1693eb1452c9d11996dbd8b906610) )
2609		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
2610		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
2611		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
2612		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	2724	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	2725	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	2726	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	2727	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
2613	2728	ROM_END
2614	2729
2615	2730	ROM_START( crzmon_8e ) // 050120 modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-CM2"
2616	2731	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2617		ROM_LOAD( "bootleg_cm050120e.rom", 0x00000, 0x40000, CRC(b4b79f13) SHA1(7efb67eb66e18885760422a239f2f56052aa7aa2) ) /* Not officially listed on Igrosoft's web site hash page */
	2732	ROM_LOAD( "bootleg_cm_m_050120e.rom", 0x00000, 0x40000, CRC(b4b79f13) SHA1(7efb67eb66e18885760422a239f2f56052aa7aa2) ) /* Not officially listed on Igrosoft's web site hash page */
2618	2733
2619	2734	ROM_REGION( 0x400000, "gfx", 0 )
2620	2735	ROM_LOAD( "bootleg_1f", 0x000000, 0x80000, CRC(a2825411) SHA1(ad2d8bdd7b8031e69d3357911b4be7913cdde668) )
2621	2736	ROM_LOAD( "bootleg_2f", 0x100000, 0x80000, CRC(2a446252) SHA1(4d4daa22421a9ac5a577afdbd257e38b034270c9) )
2622	2737	ROM_LOAD( "bootleg_3f", 0x200000, 0x80000, CRC(12fa2d2c) SHA1(b3e91cf796e177204c1fde64b83ab389c8b71724) )
2623	2738	ROM_LOAD( "bootleg_4f", 0x300000, 0x80000, CRC(12e0981f) SHA1(e69e8c635573aedfa177aa6fb2b3188c6fa265b5) )
2624		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
2625		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
2626		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
2627		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	2739	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	2740	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	2741	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	2742	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
2628	2743	ROM_END
2629	2744
2630	2745	ROM_START( crzmon_8f ) // 050120 custom_alteras, modified graphics, many texts changed, changed version text to "LOTOS CM01"
2631	2746	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2632		ROM_LOAD( "bootleg_cm050120f.rom", 0x00000, 0x40000, CRC(1ea2e07e) SHA1(964b7381573918880b1b537ab5f8006702d2eedb) ) /* Not officially listed on Igrosoft's web site hash page */
	2747	ROM_LOAD( "bootleg_cm_m_050120f.rom", 0x00000, 0x40000, CRC(1ea2e07e) SHA1(964b7381573918880b1b537ab5f8006702d2eedb) ) /* Not officially listed on Igrosoft's web site hash page */
2633	2748
2634	2749	ROM_REGION( 0x400000, "gfx", 0 )
2635	2750	ROM_LOAD( "bootleg_1g", 0x000000, 0x80000, CRC(88ef6dfb) SHA1(a8e323b363f30f8b3ec1f57dbffbedd0a868dc91) )
r9812	r9813
2645	2760
2646	2761	ROM_START( crzmon_9a ) // 070315 custom alteras, modified graphics, changed version text to "VIDEO GAME-1 O01"
2647	2762	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2648		ROM_LOAD( "bootleg_cm070315a.rom", 0x00000, 0x40000, CRC(1c4ea4ac) SHA1(ffbc5345170afdca9154a8a53c2887439b04b489) ) /* Not officially listed on Igrosoft's web site hash page */
	2763	ROM_LOAD( "bootleg_cm_070315a.rom", 0x00000, 0x40000, CRC(1c4ea4ac) SHA1(ffbc5345170afdca9154a8a53c2887439b04b489) ) /* Not officially listed on Igrosoft's web site hash page */
2649	2764
2650	2765	ROM_REGION( 0x400000, "gfx", 0 )
2651	2766	ROM_LOAD( "bootleg_1c", 0x000000, 0x80000, CRC(449253a7) SHA1(766e3b9b9585ee8c3b952033e5fb78c256075925) )
r9812	r9813
2660	2775
2661	2776	ROM_START( crzmon_9b ) // 070315 modified graphics, changed version text to "VIDEO GAME-1 O01" (crzmon_9a, decoded gfx)
2662	2777	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2663		ROM_LOAD( "bootleg_cm070315a.rom", 0x00000, 0x40000, CRC(1c4ea4ac) SHA1(ffbc5345170afdca9154a8a53c2887439b04b489) ) /* Not officially listed on Igrosoft's web site hash page */
	2778	ROM_LOAD( "bootleg_cm_070315a.rom", 0x00000, 0x40000, CRC(1c4ea4ac) SHA1(ffbc5345170afdca9154a8a53c2887439b04b489) ) /* Not officially listed on Igrosoft's web site hash page */
2664	2779
2665	2780	ROM_REGION( 0x400000, "gfx", 0 )
2666	2781	ROM_LOAD( "bootleg_1d", 0x000000, 0x80000, CRC(19e03366) SHA1(0050d54f816a10f03b3e76b8472038d39ebe6fc7) )
2667	2782	ROM_LOAD( "bootleg_2d", 0x100000, 0x80000, CRC(57a08a6a) SHA1(f8691f35efe61ad2e0e22f60a626dec38f6da49c) )
2668	2783	ROM_LOAD( "bootleg_3d", 0x200000, 0x80000, CRC(2c3bd0c9) SHA1(181f8c84478ad06af941710142bd3c3ab808455b) )
2669	2784	ROM_LOAD( "bootleg_4d", 0x300000, 0x80000, CRC(d054838f) SHA1(21c2466d45706a80563fc5873d64a7b1abe8da94) )
2670		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
2671		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
2672		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
2673		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	2785	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	2786	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	2787	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	2788	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
2674	2789	ROM_END
2675	2790
2676	2791	ROM_START( crzmon_9c ) // 070315 payout percentage 70%
2677	2792	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2678		ROM_LOAD( "bootleg_cm070315b.rom", 0x00000, 0x40000, CRC(d49d3d36) SHA1(00c1ddac53ada6905fe1a8c450158c87c87f33d6) ) /* Not officially listed on Igrosoft's web site hash page */
	2793	ROM_LOAD( "bootleg_cm_070315b.rom", 0x00000, 0x40000, CRC(d49d3d36) SHA1(00c1ddac53ada6905fe1a8c450158c87c87f33d6) ) /* Not officially listed on Igrosoft's web site hash page */
2679	2794
2680	2795	ROM_REGION( 0x400000, "gfx", 0 )
2681		ROM_LOAD( "1_070315", 0x000000, 0x80000, CRC(665ae6a1) SHA1(2ef2d657918d66d303d45d2d82430d13108f3fad) )
2682		ROM_LOAD( "2_070315", 0x100000, 0x80000, CRC(1a8e235a) SHA1(6d562cc5250283fc0c8ca7e103231a2e5bab4c69) )
2683		ROM_LOAD( "3_070315", 0x200000, 0x80000, CRC(415133eb) SHA1(227f7c8858fd5b928fdde691017104d3bd69910a) )
2684		ROM_LOAD( "4_070315", 0x300000, 0x80000, CRC(ec45fe14) SHA1(4a0fc87e2f19ea05c9a5746bb4ca7cafe5592d33) )
2685		ROM_LOAD( "5_030217", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
2686		ROM_LOAD( "6_030217", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
2687		ROM_LOAD( "7_030217", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
2688		ROM_LOAD( "8_030217", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
	2796	ROM_LOAD( "crazymonkey.001", 0x000000, 0x80000, CRC(665ae6a1) SHA1(2ef2d657918d66d303d45d2d82430d13108f3fad) )
	2797	ROM_LOAD( "crazymonkey.002", 0x100000, 0x80000, CRC(1a8e235a) SHA1(6d562cc5250283fc0c8ca7e103231a2e5bab4c69) )
	2798	ROM_LOAD( "crazymonkey.003", 0x200000, 0x80000, CRC(415133eb) SHA1(227f7c8858fd5b928fdde691017104d3bd69910a) )
	2799	ROM_LOAD( "crazymonkey.004", 0x300000, 0x80000, CRC(ec45fe14) SHA1(4a0fc87e2f19ea05c9a5746bb4ca7cafe5592d33) )
	2800	ROM_LOAD( "crazymonkey_m.005", 0x080000, 0x80000, CRC(9d4d2a94) SHA1(c714e110de628b343dfc7fff23befaa1276056a9) )
	2801	ROM_LOAD( "crazymonkey_m.006", 0x180000, 0x80000, CRC(a15f0fee) SHA1(3f06d5a1a41e1335bcc7586a5ea95b9b734155c0) )
	2802	ROM_LOAD( "crazymonkey_m.007", 0x280000, 0x80000, CRC(715a2528) SHA1(6c4c72592568ecbaa9518fb7271d2714dd22dbbb) )
	2803	ROM_LOAD( "crazymonkey_m.008", 0x380000, 0x80000, CRC(6fdb6fd5) SHA1(f40916112365de258956ec033aff79aae1f58690) )
2689	2804	ROM_END
2690	2805
2691	2806
2692	2807
2693	2808	ROM_START( fcockt_6a ) // 040216 bank F8
2694	2809	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2695		ROM_LOAD( "bootleg_fc040216a.rom", 0x00000, 0x40000, CRC(58e7a0c6) SHA1(8022f92af05e9ff6999ff936bad6048d6c264086) ) /* Not officially listed on Igrosoft's web site hash page */
	2810	ROM_LOAD( "bootleg_fc_m_040216a.rom", 0x00000, 0x40000, CRC(58e7a0c6) SHA1(8022f92af05e9ff6999ff936bad6048d6c264086) ) /* Not officially listed on Igrosoft's web site hash page */
2696	2811
2697	2812	ROM_REGION( 0x400000, "gfx", 0 )
2698		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
2699		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
2700		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
2701		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
2702		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2703		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2704		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2705		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2813	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	2814	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	2815	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	2816	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	2817	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2818	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2819	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2820	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2706	2821	ROM_END
2707	2822
2708	2823	ROM_START( fcockt_6b ) // 040216 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
2709	2824	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2710		ROM_LOAD( "bootleg_fc040216b.rom", 0x00000, 0x40000, CRC(0f6bcf03) SHA1(6c8765f836f1d899aec3be9c842d5064fd70a435) ) /* Not officially listed on Igrosoft's web site hash page */
	2825	ROM_LOAD( "bootleg_fc_m_040216b.rom", 0x00000, 0x40000, CRC(0f6bcf03) SHA1(6c8765f836f1d899aec3be9c842d5064fd70a435) ) /* Not officially listed on Igrosoft's web site hash page */
2711	2826
2712	2827	ROM_REGION( 0x400000, "gfx", 0 )
2713		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
2714		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
2715		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
2716		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
2717		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2718		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2719		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2720		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2828	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	2829	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	2830	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	2831	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	2832	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2833	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2834	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2835	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2721	2836	ROM_END
2722	2837
2723	2838	ROM_START( fcockt_6c ) // 040216 modified graphics, some code changes, description says "for Lat-02 terminals", older set
2724	2839	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2725		ROM_LOAD( "bootleg_fc040216c.rom", 0x00000, 0x40000, CRC(890940db) SHA1(5180d711fb3222e3d86c691cb8a23eed6ea0030e) ) /* Not officially listed on Igrosoft's web site hash page */
	2840	ROM_LOAD( "bootleg_fc_m_040216c.rom", 0x00000, 0x40000, CRC(890940db) SHA1(5180d711fb3222e3d86c691cb8a23eed6ea0030e) ) /* Not officially listed on Igrosoft's web site hash page */
2726	2841
2727	2842	ROM_REGION( 0x400000, "gfx", 0 )
2728	2843	ROM_LOAD( "bootleg_1c", 0x000000, 0x80000, CRC(3ac27b83) SHA1(72a06f217158367e97d226b3479896319aa3e089) )
2729	2844	ROM_LOAD( "bootleg_2c", 0x100000, 0x80000, CRC(d00183b8) SHA1(cb4a6f8fdf3b4f1540e53b956e676a9c2c2e1de0) )
2730	2845	ROM_LOAD( "bootleg_3c", 0x200000, 0x80000, CRC(c509f3c6) SHA1(4a0553e971d7e17971e0d66ff0ed04f29bc42ca7) )
2731	2846	ROM_LOAD( "bootleg_4c", 0x300000, 0x80000, CRC(5baa91fa) SHA1(dd0ef9972f6f372a6ed8280c887384b0cfa9bce6) )
2732		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2733		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2734		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2735		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2847	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2848	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2849	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2850	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2736	2851	ROM_END
2737	2852
2738	2853	ROM_START( fcockt_6d ) // 040216 modified graphics, some code changes, changed version text to "VIDEO GAME-1 FR01", description says "for Lat-02 terminals", newer set
2739	2854	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2740		ROM_LOAD( "bootleg_fc040216d.rom", 0x00000, 0x40000, CRC(c1db9659) SHA1(ff01794b7007b5b0c5e77f9a40d87fb6b125143c) ) /* Not officially listed on Igrosoft's web site hash page */
	2855	ROM_LOAD( "bootleg_fc_m_040216d.rom", 0x00000, 0x40000, CRC(c1db9659) SHA1(ff01794b7007b5b0c5e77f9a40d87fb6b125143c) ) /* Not officially listed on Igrosoft's web site hash page */
2741	2856
2742	2857	ROM_REGION( 0x400000, "gfx", 0 )
2743	2858	ROM_LOAD( "bootleg_1d", 0x000000, 0x80000, CRC(72ce6a0c) SHA1(e9a6adc9e077fd2a6242282af3d2edc2d3db2a68) )
2744	2859	ROM_LOAD( "bootleg_2d", 0x100000, 0x80000, CRC(ca1b02c7) SHA1(bc0f2fdf6f6a21d53150642ee155197e94f159aa) )
2745	2860	ROM_LOAD( "bootleg_3d", 0x200000, 0x80000, CRC(1f1af38e) SHA1(37877bd13c628f3664f6fd9b2597134735e5397c) )
2746	2861	ROM_LOAD( "bootleg_4d", 0x300000, 0x80000, CRC(e3696471) SHA1(1065dbca6ffb962329dd8faf41a40ac75358216b) )
2747		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2748		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2749		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2750		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2862	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2863	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2864	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2865	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2751	2866	ROM_END
2752	2867
2753
2754
2755
2756	2868	ROM_START( fcockt_7a ) // 050118 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
2757	2869	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2758		ROM_LOAD( "bootleg_fc050118a.rom", 0x00000, 0x40000, CRC(eb2bd908) SHA1(b8e9ef469767fb9e95ff181876ffeaee4b7b9361) ) /* Not officially listed on Igrosoft's web site hash page */
	2870	ROM_LOAD( "bootleg_fc_m_050118a.rom", 0x00000, 0x40000, CRC(eb2bd908) SHA1(b8e9ef469767fb9e95ff181876ffeaee4b7b9361) ) /* Not officially listed on Igrosoft's web site hash page */
2759	2871
2760	2872	ROM_REGION( 0x400000, "gfx", 0 )
2761		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
2762		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
2763		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
2764		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
2765		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2766		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2767		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2768		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2873	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	2874	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	2875	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	2876	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	2877	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2878	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2879	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2880	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2769	2881	ROM_END
2770	2882
2771	2883	ROM_START( fcockt_7b ) // 050118 custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 FR01"
2772	2884	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2773		ROM_LOAD( "bootleg_fc050118b.rom", 0x00000, 0x40000, CRC(5f3067f9) SHA1(db5eb951e481ac169b1b0c2439e6553cd7845383) ) /* Not officially listed on Igrosoft's web site hash page */
	2885	ROM_LOAD( "bootleg_fc_m_050118b.rom", 0x00000, 0x40000, CRC(5f3067f9) SHA1(db5eb951e481ac169b1b0c2439e6553cd7845383) ) /* Not officially listed on Igrosoft's web site hash page */
2774	2886
2775	2887	ROM_REGION( 0x400000, "gfx", 0 )
2776	2888	ROM_LOAD( "bootleg_1e", 0x000000, 0x80000, CRC(8d8d246a) SHA1(c422a7fb06bf4e94c0fec9de5e6f07ad756c9f02) )
r9812	r9813
2785	2897
2786	2898	ROM_START( fcockt_7c ) // 050118 payout percentage 40%
2787	2899	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2788		ROM_LOAD( "bootleg_fc050118c.rom", 0x00000, 0x40000, CRC(65ce8d61) SHA1(f8b63d0cc5ad314013dad4d566a08c87430817d7) ) /* Not officially listed on Igrosoft's web site hash page */
	2900	ROM_LOAD( "bootleg_fc_m_050118c.rom", 0x00000, 0x40000, CRC(65ce8d61) SHA1(f8b63d0cc5ad314013dad4d566a08c87430817d7) ) /* Not officially listed on Igrosoft's web site hash page */
2789	2901
2790	2902	ROM_REGION( 0x400000, "gfx", 0 )
2791		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
2792		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
2793		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
2794		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
2795		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2796		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2797		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2798		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2903	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	2904	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	2905	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	2906	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	2907	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2908	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2909	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2910	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2799	2911	ROM_END
2800	2912
2801	2913	ROM_START( fcockt_7d ) // 050118 payout percentage 60%
2802	2914	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2803		ROM_LOAD( "bootleg_fc050118d.rom", 0x00000, 0x40000, CRC(f13165ce) SHA1(5340be60a1f1d530b164eddf9d2717ac752253b9) ) /* Not officially listed on Igrosoft's web site hash page */
	2915	ROM_LOAD( "bootleg_fc_m_050118d.rom", 0x00000, 0x40000, CRC(f13165ce) SHA1(5340be60a1f1d530b164eddf9d2717ac752253b9) ) /* Not officially listed on Igrosoft's web site hash page */
2804	2916
2805	2917	ROM_REGION( 0x400000, "gfx", 0 )
2806		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
2807		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
2808		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
2809		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
2810		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2811		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2812		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2813		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2918	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	2919	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	2920	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	2921	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	2922	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2923	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2924	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2925	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2814	2926	ROM_END
2815	2927
2816	2928	ROM_START( fcockt_7e ) // 050118 payout percentage 70%
2817	2929	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2818		ROM_LOAD( "bootleg_fc050118e.rom", 0x00000, 0x40000, CRC(0f25d1d3) SHA1(2b16a06f6126d110f8664d0874476b687265bb91) ) /* Not officially listed on Igrosoft's web site hash page */
	2930	ROM_LOAD( "bootleg_fc_m_050118e.rom", 0x00000, 0x40000, CRC(0f25d1d3) SHA1(2b16a06f6126d110f8664d0874476b687265bb91) ) /* Not officially listed on Igrosoft's web site hash page */
2819	2931
2820	2932	ROM_REGION( 0x400000, "gfx", 0 )
2821		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
2822		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
2823		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
2824		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
2825		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2826		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2827		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2828		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2933	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	2934	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	2935	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	2936	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	2937	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2938	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2939	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2940	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2829	2941	ROM_END
2830	2942
2831	2943	ROM_START( fcockt_7f ) // 050118 changed version text to 070305
2832	2944	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2833		ROM_LOAD( "bootleg_fc050118f.rom", 0x00000, 0x40000, CRC(a6be3c68) SHA1(53cd6d4d2860ba75c95fa1609efa9ff8ea5e2048) ) /* Not officially listed on Igrosoft's web site hash page */
	2945	ROM_LOAD( "bootleg_fc_m_050118f.rom", 0x00000, 0x40000, CRC(a6be3c68) SHA1(53cd6d4d2860ba75c95fa1609efa9ff8ea5e2048) ) /* Not officially listed on Igrosoft's web site hash page */
2834	2946
2835	2947	ROM_REGION( 0x400000, "gfx", 0 )
2836		ROM_LOAD( "1_030505", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
2837		ROM_LOAD( "2_030505", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
2838		ROM_LOAD( "3_030505", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
2839		ROM_LOAD( "4_030505", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
2840		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2841		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2842		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2843		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2948	ROM_LOAD( "fruitcocktail_m.001", 0x000000, 0x80000, CRC(da72c0bb) SHA1(41c9eebccce82520dfe41d6a3a574b2890945ffa) )
	2949	ROM_LOAD( "fruitcocktail_m.002", 0x100000, 0x80000, CRC(6239ba9d) SHA1(22486ad30c28341784e7e490255247b82782b72e) )
	2950	ROM_LOAD( "fruitcocktail_m.003", 0x200000, 0x80000, CRC(2c14a464) SHA1(5fce2f4ef95c5054b055db94399946257bc7321f) )
	2951	ROM_LOAD( "fruitcocktail_m.004", 0x300000, 0x80000, CRC(115898f4) SHA1(55b93bddaeede1c2f6b18083a6a2e6329af087cc) )
	2952	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2953	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2954	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2955	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2844	2956	ROM_END
2845	2957
2846	2958	ROM_START( fcockt_7g ) // 050118 modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-FC2"
2847	2959	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2848		ROM_LOAD( "bootleg_fc050118g.rom", 0x00000, 0x40000, CRC(e9d1b425) SHA1(caf76dda7bf2383ce44b81c560d91dbde4d7421e) ) /* Not officially listed on Igrosoft's web site hash page */
	2960	ROM_LOAD( "bootleg_fc_m_050118g.rom", 0x00000, 0x40000, CRC(e9d1b425) SHA1(caf76dda7bf2383ce44b81c560d91dbde4d7421e) ) /* Not officially listed on Igrosoft's web site hash page */
2849	2961
2850	2962	ROM_REGION( 0x400000, "gfx", 0 )
2851	2963	ROM_LOAD( "bootleg_1h", 0x000000, 0x80000, CRC(5144f9a3) SHA1(e530bb6e1e7c44f7378d6923286f78a74ac34ad4) )
2852	2964	ROM_LOAD( "bootleg_2h", 0x100000, 0x80000, CRC(c9e57914) SHA1(44e2c3e8739b8943babb18fd7483a84d170cb85e) )
2853	2965	ROM_LOAD( "bootleg_3h", 0x200000, 0x80000, CRC(f18c6fce) SHA1(632fc7b3b9927071081b66ac0fd01f85e1290266) )
2854	2966	ROM_LOAD( "bootleg_4h", 0x300000, 0x80000, CRC(9ac3e603) SHA1(f2fab6122d7304543e804b56878f067952f5963d) )
2855		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2856		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2857		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2858		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2967	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2968	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2969	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2970	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2859	2971	ROM_END
2860	2972
2861	2973	ROM_START( fcockt_7h ) // 050118 modified graphics, many texts changed, changed version text to "LOTOS FR01"
2862	2974	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2863		ROM_LOAD( "bootleg_fc050118h.rom", 0x00000, 0x40000, CRC(fb191121) SHA1(e08587ac260bc57b16fbb7c7022ae7849946565b) ) /* Not officially listed on Igrosoft's web site hash page */
	2975	ROM_LOAD( "bootleg_fc_m_050118h.rom", 0x00000, 0x40000, CRC(fb191121) SHA1(e08587ac260bc57b16fbb7c7022ae7849946565b) ) /* Not officially listed on Igrosoft's web site hash page */
2864	2976
2865	2977	ROM_REGION( 0x400000, "gfx", 0 )
2866	2978	ROM_LOAD( "bootleg_1i", 0x000000, 0x80000, CRC(5186689f) SHA1(afaacaaff8b4ba37bba4c0fb800c953fa1a37b04) )
2867	2979	ROM_LOAD( "bootleg_2i", 0x100000, 0x80000, CRC(7263bb27) SHA1(38e46d40b76e83311472192aadcc7daf65a407b1) )
2868	2980	ROM_LOAD( "bootleg_3i", 0x200000, 0x80000, CRC(02a6e05e) SHA1(dd1f4d50bb46fd3e3b3d8dcb14c5f5084ecf2e35) )
2869	2981	ROM_LOAD( "bootleg_4i", 0x300000, 0x80000, CRC(99b28f09) SHA1(85eb3788fd413c5d2a131982e158e5e552a930b4) )
2870		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2871		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2872		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2873		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	2982	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	2983	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	2984	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2985	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2874	2986	ROM_END
2875	2987
2876
2877
2878	2988	ROM_START( fcockt_8a ) // 060111 modified graphics, many texts changed, changed version text to "LOTO COCKTAIL V01-0001"
2879	2989	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2880		ROM_LOAD( "bootleg_fc060111a.rom", 0x00000, 0x40000, CRC(d594f40a) SHA1(291c4a84ba90df5a50205c67874f69efb3346194) ) /* Not officially listed on Igrosoft's web site hash page */
	2990	ROM_LOAD( "bootleg_fc_m_060111a.rom", 0x00000, 0x40000, CRC(d594f40a) SHA1(291c4a84ba90df5a50205c67874f69efb3346194) ) /* Not officially listed on Igrosoft's web site hash page */
2881	2991
2882	2992	ROM_REGION( 0x400000, "gfx", 0 )
2883	2993	ROM_LOAD( "bootleg_1f", 0x000000, 0x80000, CRC(4e905563) SHA1(63f2e74947fd4918d0fa744db85ca646686bd459) )
r9812	r9813
2886	2996	ROM_LOAD( "bootleg_4f", 0x300000, 0x80000, CRC(b65f200c) SHA1(16a3c612a6c6ed1d2956ebba55a933aa2c905974) )
2887	2997	ROM_LOAD( "bootleg_5", 0x080000, 0x80000, CRC(64b547e3) SHA1(285421fa3aa67a16cf6a9dadb20d74e6a8471dc0) )
2888	2998	ROM_LOAD( "bootleg_6", 0x180000, 0x80000, CRC(965d6363) SHA1(5c229238a09ec54147d492e9843595962ce79952) )
2889		ROM_LOAD( "7_030~~505~~", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	2999	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2890	3000	ROM_LOAD( "bootleg_8", 0x380000, 0x80000, CRC(8384e4d4) SHA1(83d0bbbd7cca7328a66a69cf802632fd8d22d5b8) )
2891	3001	ROM_END
2892	3002
2893	3003	ROM_START( fcockt_8b ) // 060111 modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
2894	3004	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2895		ROM_LOAD( "bootleg_fc060111b.rom", 0x00000, 0x40000, CRC(71796ce6) SHA1(e4f4140cce3dbe7735c13b23682e23c9e1331f3a) ) /* Not officially listed on Igrosoft's web site hash page */
	3005	ROM_LOAD( "bootleg_fc_m_060111b.rom", 0x00000, 0x40000, CRC(71796ce6) SHA1(e4f4140cce3dbe7735c13b23682e23c9e1331f3a) ) /* Not officially listed on Igrosoft's web site hash page */
2896	3006
2897	3007	ROM_REGION( 0x400000, "gfx", 0 )
2898	3008	ROM_LOAD( "bootleg_1g", 0x000000, 0x80000, CRC(5b658094) SHA1(13801c3267772cecb22578fa6f01c20fe5da687d) )
2899	3009	ROM_LOAD( "bootleg_2g", 0x100000, 0x80000, CRC(4bbad46c) SHA1(d44d224c18922a7837a47894d2e679a64be7f3cb) )
2900	3010	ROM_LOAD( "bootleg_3g", 0x200000, 0x80000, CRC(38ad449a) SHA1(eebb826a702cf7a6373a8ef51b4d40ceac758204) )
2901	3011	ROM_LOAD( "bootleg_4g", 0x300000, 0x80000, CRC(4e676629) SHA1(c85ea9322bdc375f26771b3996d8ca69c43b4d2c) )
2902		ROM_LOAD( "5_030505", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
2903		ROM_LOAD( "6_030505", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
2904		ROM_LOAD( "7_030505", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
2905		ROM_LOAD( "8_030505", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
	3012	ROM_LOAD( "fruitcocktail_m.005", 0x080000, 0x80000, CRC(f0176b60) SHA1(f764aea00ed306a28cacc62f8d2db9cc42895db8) )
	3013	ROM_LOAD( "fruitcocktail_m.006", 0x180000, 0x80000, CRC(ef24f255) SHA1(6ff924627c179868a25f180f79cd57182b72d9d4) )
	3014	ROM_LOAD( "fruitcocktail_m.007", 0x280000, 0x80000, CRC(20f87a15) SHA1(cb60866a3543668f3592c270b445dee881d78128) )
	3015	ROM_LOAD( "fruitcocktail_m.008", 0x380000, 0x80000, CRC(d282e42e) SHA1(eac9c3eaef39b1805f863ade5da47d6274d20a55) )
2906	3016	ROM_END
2907	3017
2908	3018
	3019
2909	3020	ROM_START( lhaunt_4a ) // 031111 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
2910	3021	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2911		ROM_LOAD( "bootleg_lh031111a.rom", 0x00000, 0x40000, CRC(83d487c9) SHA1(5b88745d06acba542e2d0660298c9058f2bdfa3f) ) /* Not officially listed on Igrosoft's web site hash page */
	3022	ROM_LOAD( "bootleg_lh_m_031111a.rom", 0x00000, 0x40000, CRC(83d487c9) SHA1(5b88745d06acba542e2d0660298c9058f2bdfa3f) ) /* Not officially listed on Igrosoft's web site hash page */
2912	3023
2913	3024	ROM_REGION( 0x400000, "gfx", 0 )
2914		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
2915		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
2916		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
2917		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
2918		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
2919		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
2920		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
2921		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	3025	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	3026	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	3027	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	3028	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	3029	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	3030	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	3031	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	3032	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
2922	3033	ROM_END
2923	3034
	3035	ROM_START( lhaunt_5a ) // 040216 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	3036	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
	3037	ROM_LOAD( "bootleg_lh_m_040216a.rom", 0x00000, 0x40000, CRC(2a6c7ff9) SHA1(4a0137c7df5003e8fd843d5489d416d15f001f46) ) /* Not officially listed on Igrosoft's web site hash page */
2924	3038
	3039	ROM_REGION( 0x400000, "gfx", 0 )
	3040	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	3041	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	3042	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	3043	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	3044	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	3045	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	3046	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	3047	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	3048	ROM_END
2925	3049
2926	3050	ROM_START( lhaunt_6a ) // 040825 backdoor 1,5 9,1 5,1 1,5 3,3 3,4
2927	3051	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2928		ROM_LOAD( "bootleg_lh040825a.rom", 0x00000, 0x40000, CRC(18ba5704) SHA1(3c77ed129db0e5181217167b76292f8e4ee78728) ) /* Not officially listed on Igrosoft's web site hash page */
	3052	ROM_LOAD( "bootleg_lh_m_040825a.rom", 0x00000, 0x40000, CRC(18ba5704) SHA1(3c77ed129db0e5181217167b76292f8e4ee78728) ) /* Not officially listed on Igrosoft's web site hash page */
2929	3053
2930	3054	ROM_REGION( 0x400000, "gfx", 0 )
2931		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
2932		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
2933		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
2934		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
2935		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
2936		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
2937		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
2938		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	3055	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	3056	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	3057	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	3058	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	3059	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	3060	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	3061	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	3062	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
2939	3063	ROM_END
2940	3064
2941	3065	ROM_START( lhaunt_6b ) // 040825 custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 PB01"
2942	3066	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2943		ROM_LOAD( "bootleg_lh040825b.rom", 0x00000, 0x40000, CRC(71bc9811) SHA1(64dc0d81aec657b8c722e530ad5858d831ab7d51) ) /* Not officially listed on Igrosoft's web site hash page */
	3067	ROM_LOAD( "bootleg_lh_m_040825b.rom", 0x00000, 0x40000, CRC(71bc9811) SHA1(64dc0d81aec657b8c722e530ad5858d831ab7d51) ) /* Not officially listed on Igrosoft's web site hash page */
2944	3068
2945	3069	ROM_REGION( 0x400000, "gfx", 0 )
2946	3070	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(82e0dd1a) SHA1(7f99fe1e5d304fadae9f1f46ebe8680787c9175b) )
r9812	r9813
2955	3079
2956	3080	ROM_START( lhaunt_6c ) // 040825 changed version text to 070604
2957	3081	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2958		ROM_LOAD( "bootleg_lh040825c.rom", 0x00000, 0x40000, CRC(b2b027c2) SHA1(18e5d7b396103a7301b2a6641ca3d85ab2091d2e) ) /* Not officially listed on Igrosoft's web site hash page */
	3082	ROM_LOAD( "bootleg_lh_m_040825c.rom", 0x00000, 0x40000, CRC(b2b027c2) SHA1(18e5d7b396103a7301b2a6641ca3d85ab2091d2e) ) /* Not officially listed on Igrosoft's web site hash page */
2959	3083
2960	3084	ROM_REGION( 0x400000, "gfx", 0 )
2961		ROM_LOAD( "1_030707", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
2962		ROM_LOAD( "2_030707", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
2963		ROM_LOAD( "3_030707", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
2964		ROM_LOAD( "4_030707", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
2965		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
2966		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
2967		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
2968		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	3085	ROM_LOAD( "luckyhaunter_m.001", 0x000000, 0x80000, CRC(5f1000c6) SHA1(05154d786caf7f5fb9ed90c7d3391cec42e871f8) )
	3086	ROM_LOAD( "luckyhaunter_m.002", 0x100000, 0x80000, CRC(b18abebc) SHA1(66c28fd3f338360b9236dcf414548bfb53655951) )
	3087	ROM_LOAD( "luckyhaunter_m.003", 0x200000, 0x80000, CRC(2e67a1d9) SHA1(a3eff78f25e4e4878706d7c9e4ca71f6914006c6) )
	3088	ROM_LOAD( "luckyhaunter_m.004", 0x300000, 0x80000, CRC(90c963f6) SHA1(2a9c689315cdfb67425f0710511dc0e0241741a7) )
	3089	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	3090	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	3091	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	3092	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
2969	3093	ROM_END
2970	3094
2971	3095	ROM_START( lhaunt_6d ) // 040825 modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
2972	3096	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2973		ROM_LOAD( "bootleg_lh040825d.rom", 0x00000, 0x40000, CRC(bf442051) SHA1(0c96b5cbf24dc8786feae658f23518bef6c0d589) ) /* Not officially listed on Igrosoft's web site hash page */
	3097	ROM_LOAD( "bootleg_lh_m_040825d.rom", 0x00000, 0x40000, CRC(bf442051) SHA1(0c96b5cbf24dc8786feae658f23518bef6c0d589) ) /* Not officially listed on Igrosoft's web site hash page */
2974	3098
2975	3099	ROM_REGION( 0x400000, "gfx", 0 )
2976	3100	ROM_LOAD( "bootleg_1c", 0x000000, 0x80000, CRC(9ff7618e) SHA1(1c191a211f2391f5aa5786c2071dc34d909bbe46) )
2977	3101	ROM_LOAD( "bootleg_2c", 0x100000, 0x80000, CRC(094e040f) SHA1(254348b1690ce82bb2551006365d630fb82413c2) )
2978	3102	ROM_LOAD( "bootleg_3c", 0x200000, 0x80000, CRC(47f7d726) SHA1(d43797c50fa0a8f25a5cd198e906f67d9f3e9a13) )
2979	3103	ROM_LOAD( "bootleg_4c", 0x300000, 0x80000, CRC(1aa0998f) SHA1(078c09774ac3664a76d83b28596d0e07f3f7b9e2) )
2980		ROM_LOAD( "5_030707", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
2981		ROM_LOAD( "6_030707", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
2982		ROM_LOAD( "7_030707", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
2983		ROM_LOAD( "8_030707", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
	3104	ROM_LOAD( "luckyhaunter_m.005", 0x080000, 0x80000, CRC(b50c90a3) SHA1(74749f4ffb5b0630631b511fc3230c6e7b50dc3b) )
	3105	ROM_LOAD( "luckyhaunter_m.006", 0x180000, 0x80000, CRC(4eaaab64) SHA1(9fed16f8e0308200fd16c4b1e511e1bf6c22ae66) )
	3106	ROM_LOAD( "luckyhaunter_m.007", 0x280000, 0x80000, CRC(64d16ba9) SHA1(3b897183d6e0f1256be7657441f234fc72077682) )
	3107	ROM_LOAD( "luckyhaunter_m.008", 0x380000, 0x80000, CRC(1bdf6252) SHA1(7b5ae82a95a744b236e109024d47b526dccf9c14) )
2984	3108	ROM_END
2985	3109
2986	3110	ROM_START( lhaunt_6e ) // 040825 modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-LH2"
2987	3111	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
2988		ROM_LOAD( "bootleg_lh040825e.rom", 0x00000, 0x40000, CRC(087d4172) SHA1(ec9ca4192031d8b8e3cbaf809e8d1643978481f3) ) /* Not officially listed on Igrosoft's web site hash page */
	3112	ROM_LOAD( "bootleg_lh_m_040825e.rom", 0x00000, 0x40000, CRC(087d4172) SHA1(ec9ca4192031d8b8e3cbaf809e8d1643978481f3) ) /* Not officially listed on Igrosoft's web site hash page */
2989	3113
2990	3114	ROM_REGION( 0x400000, "gfx", 0 )
2991	3115	ROM_LOAD( "bootleg_1d", 0x000000, 0x80000, CRC(41e22133) SHA1(b3d88b62fed9aa4ea5bbdff3f92a4120a239cfb0) )
r9812	r9813
3000	3124
3001	3125	ROM_START( lhaunt_6f ) // 040825 custom alteras, modified graphics, many texts changed, changed version text to "LOTOS PB01"
3002	3126	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3003		ROM_LOAD( "bootleg_lh040825f.rom", 0x00000, 0x40000, CRC(7033af62) SHA1(c6b859672816f650eb88bc363e6f6d3a197eb99c) ) /* Not officially listed on Igrosoft's web site hash page */
	3127	ROM_LOAD( "bootleg_lh_m_040825f.rom", 0x00000, 0x40000, CRC(7033af62) SHA1(c6b859672816f650eb88bc363e6f6d3a197eb99c) ) /* Not officially listed on Igrosoft's web site hash page */
3004	3128
3005	3129	ROM_REGION( 0x400000, "gfx", 0 )
3006	3130	ROM_LOAD( "bootleg_1e", 0x000000, 0x80000, CRC(c7b0191a) SHA1(d33ababbefcb39f4e6b063f448b8a08b015d6f24) )
r9812	r9813
3017	3141
3018	3142	ROM_START( garage_4a ) // 040219 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3019	3143	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3020		ROM_LOAD( "bootleg_gg040219a.rom", 0x00000, 0x40000, CRC(e16b213a) SHA1(af0d78116d985efe5f09eb86eb67df2535765527) ) /* Not officially listed on Igrosoft's web site hash page */
	3144	ROM_LOAD( "bootleg_gg_m_040219a.rom", 0x00000, 0x40000, CRC(e16b213a) SHA1(af0d78116d985efe5f09eb86eb67df2535765527) ) /* Not officially listed on Igrosoft's web site hash page */
3021	3145
3022	3146	ROM_REGION( 0x400000, "gfx", 0 )
3023		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
3024		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
3025		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
3026		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
3027		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
3028		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
3029		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
3030		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	3147	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	3148	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	3149	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	3150	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	3151	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	3152	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	3153	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	3154	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
3031	3155	ROM_END
3032	3156
3033	3157	ROM_START( garage_4b ) // 040219 changed version text to 070329
3034	3158	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3035		ROM_LOAD( "bootleg_gg040219b.rom", 0x00000, 0x40000, CRC(b8ebf3b6) SHA1(14c5263571123d251125723b32861bef578de67b) ) /* Not officially listed on Igrosoft's web site hash page */
	3159	ROM_LOAD( "bootleg_gg_m_040219b.rom", 0x00000, 0x40000, CRC(b8ebf3b6) SHA1(14c5263571123d251125723b32861bef578de67b) ) /* Not officially listed on Igrosoft's web site hash page */
3036	3160
3037	3161	ROM_REGION( 0x400000, "gfx", 0 )
3038		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
3039		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
3040		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
3041		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
3042		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
3043		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
3044		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
3045		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	3162	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	3163	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	3164	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	3165	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	3166	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	3167	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	3168	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	3169	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
3046	3170	ROM_END
3047	3171
3048	3172	ROM_START( garage_4c ) // 040219 modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-GG2"
3049	3173	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3050		ROM_LOAD( "bootleg_gg040219c.rom", 0x00000, 0x40000, CRC(2e0ee194) SHA1(2dab6f80cd81b34792c1d347e17c2410bf22a48b) ) /* Not officially listed on Igrosoft's web site hash page */
	3174	ROM_LOAD( "bootleg_gg_m_040219c.rom", 0x00000, 0x40000, CRC(2e0ee194) SHA1(2dab6f80cd81b34792c1d347e17c2410bf22a48b) ) /* Not officially listed on Igrosoft's web site hash page */
3051	3175
3052	3176	ROM_REGION( 0x400000, "gfx", 0 )
3053	3177	ROM_LOAD( "bootleg_1d", 0x000000, 0x80000, CRC(63cf83f8) SHA1(ac96acd353049e77855cee618521fdba17e1b3f1) )
r9812	r9813
3060	3184	ROM_LOAD( "bootleg_8d", 0x380000, 0x80000, CRC(15fcac6d) SHA1(3c1f44225686b42eba5229fb0ad03d2592c09203) )
3061	3185	ROM_END
3062	3186
3063
3064	3187	ROM_START( garage_5a ) // 050311 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3065	3188	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3066		ROM_LOAD( "bootleg_gg050311a.rom", 0x00000, 0x40000, CRC(874a2c27) SHA1(9bf586314f375c2c6f7d79557cc777ac3559cb64) ) /* Not officially listed on Igrosoft's web site hash page */
	3189	ROM_LOAD( "bootleg_gg_m_050311a.rom", 0x00000, 0x40000, CRC(874a2c27) SHA1(9bf586314f375c2c6f7d79557cc777ac3559cb64) ) /* Not officially listed on Igrosoft's web site hash page */
3067	3190
3068	3191	ROM_REGION( 0x400000, "gfx", 0 )
3069		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
3070		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
3071		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
3072		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
3073		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
3074		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
3075		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
3076		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	3192	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	3193	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	3194	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	3195	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	3196	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	3197	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	3198	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	3199	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
3077	3200	ROM_END
3078	3201
3079	3202	ROM_START( garage_5b ) // 050311 custom alteras, modified graphics, changed version text to "VIDEO GAME-1 GA01"
3080	3203	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3081		ROM_LOAD( "bootleg_gg050311b.rom", 0x00000, 0x40000, CRC(79f9a8e7) SHA1(f6ddd586b72ca004ac18284a0394d5a9d56fbc19) ) /* Not officially listed on Igrosoft's web site hash page */
	3204	ROM_LOAD( "bootleg_gg_m_050311b.rom", 0x00000, 0x40000, CRC(79f9a8e7) SHA1(f6ddd586b72ca004ac18284a0394d5a9d56fbc19) ) /* Not officially listed on Igrosoft's web site hash page */
3082	3205
3083	3206	ROM_REGION( 0x400000, "gfx", 0 )
3084	3207	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(df71e54b) SHA1(e5899151aea13b527e4f0819609be6d9ee8cc1b2) )
r9812	r9813
3093	3216
3094	3217	ROM_START( garage_5c ) // 050311 payout percentage 70%
3095	3218	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3096		ROM_LOAD( "bootleg_gg050311c.rom", 0x00000, 0x40000, CRC(039af644) SHA1(548e2990f15d6f7f68758a91aae5bf297a220698) ) /* Not officially listed on Igrosoft's web site hash page */
	3219	ROM_LOAD( "bootleg_gg_m_050311c.rom", 0x00000, 0x40000, CRC(039af644) SHA1(548e2990f15d6f7f68758a91aae5bf297a220698) ) /* Not officially listed on Igrosoft's web site hash page */
3097	3220
3098	3221	ROM_REGION( 0x400000, "gfx", 0 )
3099		ROM_LOAD( "1_040122", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
3100		ROM_LOAD( "2_040122", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
3101		ROM_LOAD( "3_040122", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
3102		ROM_LOAD( "4_040122", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
3103		ROM_LOAD( "5_040122", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
3104		ROM_LOAD( "6_040122", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
3105		ROM_LOAD( "7_040122", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
3106		ROM_LOAD( "8_040122", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
	3222	ROM_LOAD( "garage_m.001", 0x000000, 0x80000, CRC(57acd4bc) SHA1(8796f463787c359cce6ac09c1b6895f871bbb7c9) )
	3223	ROM_LOAD( "garage_m.002", 0x100000, 0x80000, CRC(6d591fa3) SHA1(ddbdf87e0e88dc848b963fbfcb6e14d7b3b9efdc) )
	3224	ROM_LOAD( "garage_m.003", 0x200000, 0x80000, CRC(6a15eeda) SHA1(ac35a20893b0518a159207401f6b7f58e3de45fa) )
	3225	ROM_LOAD( "garage_m.004", 0x300000, 0x80000, CRC(38f2cd3c) SHA1(5a4463ac352e4e340c6aaa61102841541e9f4c48) )
	3226	ROM_LOAD( "garage_m.005", 0x080000, 0x80000, CRC(5bf85bc5) SHA1(ff9d2b9cbcd2af6f5fda972e387820d830c196a9) )
	3227	ROM_LOAD( "garage_m.006", 0x180000, 0x80000, CRC(e5082b26) SHA1(6547409d39dd51498ce8e3f82ff813a8ac3c6522) )
	3228	ROM_LOAD( "garage_m.007", 0x280000, 0x80000, CRC(dfa2ceb1) SHA1(ec7de8a8f6e7785a563df973841cc1f1603f79fc) )
	3229	ROM_LOAD( "garage_m.008", 0x380000, 0x80000, CRC(90c5416b) SHA1(583bfb517bc2e30d7b7903aa19fc3b4b5188d7d2) )
3107	3230	ROM_END
3108	3231
3109	3232	ROM_START( garage_5d ) // 050311 modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3110	3233	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3111		ROM_LOAD( "bootleg_gg050311d.rom", 0x00000, 0x40000, CRC(00db1210) SHA1(90eb11d6055b464546657233b44a6783c34161ae) ) /* Not officially listed on Igrosoft's web site hash page */
	3234	ROM_LOAD( "bootleg_gg_m_050311d.rom", 0x00000, 0x40000, CRC(00db1210) SHA1(90eb11d6055b464546657233b44a6783c34161ae) ) /* Not officially listed on Igrosoft's web site hash page */
3112	3235
3113	3236	ROM_REGION( 0x400000, "gfx", 0 )
3114	3237	ROM_LOAD( "bootleg_1c", 0x000000, 0x80000, CRC(e3deb6f3) SHA1(a1fe01040bd8f4b08268e2b99cfa240e50dce00b) )
r9812	r9813
3123	3246
3124	3247	ROM_START( garage_5e ) // 050311 custom alteras, modified graphics, many texts changed, changed version text to "LOTOS GA01"
3125	3248	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3126		ROM_LOAD( "bootleg_gg050311e.rom", 0x00000, 0x40000, CRC(2c7971ba) SHA1(512c6a76d22ba46c9bbb6cc1255f156a8d20befe) ) /* Not officially listed on Igrosoft's web site hash page */
	3249	ROM_LOAD( "bootleg_gg_m_050311e.rom", 0x00000, 0x40000, CRC(2c7971ba) SHA1(512c6a76d22ba46c9bbb6cc1255f156a8d20befe) ) /* Not officially listed on Igrosoft's web site hash page */
3127	3250
3128	3251	ROM_REGION( 0x400000, "gfx", 0 )
3129	3252	ROM_LOAD( "bootleg_1e", 0x000000, 0x80000, CRC(c89cc739) SHA1(31e62dd6ef841dc3f2a3da3e89649b7250cc3a6d) )
r9812	r9813
3138	3261
3139	3262
3140	3263
3141
3142	3264	ROM_START( rclimb_3a ) // 040827 backdoor 1,5 9,1 5,1 1,5 3,3 3,4
3143	3265	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3144		ROM_LOAD( "bootleg_rc040827a.rom", 0x00000, 0x40000, CRC(6420f8b4) SHA1(64e4018dbea245ddc06a65fb2f8cf38e77f60999) ) /* Not officially listed on Igrosoft's web site hash page */
	3266	ROM_LOAD( "bootleg_rc_m_040827a.rom", 0x00000, 0x40000, CRC(6420f8b4) SHA1(64e4018dbea245ddc06a65fb2f8cf38e77f60999) ) /* Not officially listed on Igrosoft's web site hash page */
3145	3267
3146	3268	ROM_REGION( 0x400000, "gfx", 0 )
3147		ROM_LOAD( "1_040815", 0x000000, 0x80000, CRC(934f18c7) SHA1(da3a7cddc68e104d415d947e89c0e7f0d067c056) )
3148		ROM_LOAD( "2_040815", 0x100000, 0x80000, CRC(7364bd2b) SHA1(c0edfd3b8de813c95fe5d6072662fa0e39fec89e) )
3149		ROM_LOAD( "3_040815", 0x200000, 0x80000, CRC(e7befb17) SHA1(8a214680142cd657784a667ab3f6422165fea224) )
3150		ROM_LOAD( "4_040815", 0x300000, 0x80000, CRC(dc6d43a0) SHA1(62fc47136775f3fa9369857ec91fe897a1f1ebd6) )
3151		ROM_LOAD( "5_040815", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
3152		ROM_LOAD( "6_040815", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
3153		ROM_LOAD( "7_040815", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
3154		ROM_LOAD( "8_040815", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
	3269	ROM_LOAD( "rockclimber_m.001", 0x000000, 0x80000, CRC(934f18c7) SHA1(da3a7cddc68e104d415d947e89c0e7f0d067c056) )
	3270	ROM_LOAD( "rockclimber_m.002", 0x100000, 0x80000, CRC(7364bd2b) SHA1(c0edfd3b8de813c95fe5d6072662fa0e39fec89e) )
	3271	ROM_LOAD( "rockclimber_m.003", 0x200000, 0x80000, CRC(e7befb17) SHA1(8a214680142cd657784a667ab3f6422165fea224) )
	3272	ROM_LOAD( "rockclimber_m.004", 0x300000, 0x80000, CRC(dc6d43a0) SHA1(62fc47136775f3fa9369857ec91fe897a1f1ebd6) )
	3273	ROM_LOAD( "rockclimber_m.005", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
	3274	ROM_LOAD( "rockclimber_m.006", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
	3275	ROM_LOAD( "rockclimber_m.007", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
	3276	ROM_LOAD( "rockclimber_m.008", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
3155	3277	ROM_END
3156	3278
3157	3279	ROM_START( rclimb_3b ) // 040827 - new service menu
3158	3280	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3159		ROM_LOAD( "bootleg_rc040827.rom", 0x00000, 0x40000, CRC(3ba55647) SHA1(56e96be0d9782da4b3d5d911ea67962257626ae0) ) /* Not officially listed on Igrosoft's web site hash page */
	3281	ROM_LOAD( "bootleg_rc_m_040827.rom", 0x00000, 0x40000, CRC(3ba55647) SHA1(56e96be0d9782da4b3d5d911ea67962257626ae0) ) /* Not officially listed on Igrosoft's web site hash page */
3160	3282
3161	3283	ROM_REGION( 0x400000, "gfx", 0 )
3162	3284	ROM_LOAD( "bootleg_rc1_.bin", 0x000000, 0x80000, CRC(4bc00c66) SHA1(e4d89c2b188f253b642ae341a1a4c04af33024c8) )
r9812	r9813
3171	3293
3172	3294	ROM_START( rclimb_3c ) // 040827 custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 SK01"
3173	3295	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3174		ROM_LOAD( "bootleg_rc040827c.rom", 0x00000, 0x40000, CRC(4b8b3e0e) SHA1(6554073d589de67807c3b3779c1f2fa610aa03df) ) /* Not officially listed on Igrosoft's web site hash page */
	3296	ROM_LOAD( "bootleg_rc_m_040827c.rom", 0x00000, 0x40000, CRC(4b8b3e0e) SHA1(6554073d589de67807c3b3779c1f2fa610aa03df) ) /* Not officially listed on Igrosoft's web site hash page */
3175	3297
3176	3298	ROM_REGION( 0x400000, "gfx", 0 )
3177	3299	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(a66e718a) SHA1(84493efde5a70032e709ebde5635ed50e151d2ab) )
r9812	r9813
3186	3308
3187	3309	ROM_START( rclimb_3d ) // 040827 modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3188	3310	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3189		ROM_LOAD( "bootleg_rc040827d.rom", 0x00000, 0x40000, CRC(b7796cff) SHA1(a180397d8827adbc161e282a4ee6d064d4837199) ) /* Not officially listed on Igrosoft's web site hash page */
	3311	ROM_LOAD( "bootleg_rc_m_040827d.rom", 0x00000, 0x40000, CRC(b7796cff) SHA1(a180397d8827adbc161e282a4ee6d064d4837199) ) /* Not officially listed on Igrosoft's web site hash page */
3190	3312
3191	3313	ROM_REGION( 0x400000, "gfx", 0 )
3192	3314	ROM_LOAD( "bootleg_1c", 0x000000, 0x80000, CRC(b846d5c8) SHA1(235ebe08ef89b308dd9642ebb8ce0eb102ffaf7d) )
3193	3315	ROM_LOAD( "bootleg_2c", 0x100000, 0x80000, CRC(600cfee9) SHA1(b0f251cd9e6bff195f44bd70a961ccc489688574) )
3194	3316	ROM_LOAD( "bootleg_3c", 0x200000, 0x80000, CRC(d8394c53) SHA1(a20862c0753cba6b5f4db03c9a208381c769a3e5) )
3195	3317	ROM_LOAD( "bootleg_4c", 0x300000, 0x80000, CRC(7b0911b8) SHA1(25fa9b021cc041eccbbf0af1ec613895cc79a973) )
3196		ROM_LOAD( "5_040815", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
3197		ROM_LOAD( "6_040815", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
3198		ROM_LOAD( "7_040815", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
3199		ROM_LOAD( "8_040815", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
	3318	ROM_LOAD( "rockclimber_m.005", 0x080000, 0x80000, CRC(ea127c3d) SHA1(a6391eed69a4723b68d727f59b6baebe51633e66) )
	3319	ROM_LOAD( "rockclimber_m.006", 0x180000, 0x80000, CRC(277fa273) SHA1(6320e6c5b5e48dc451cc48189054c42d85e8ccc1) )
	3320	ROM_LOAD( "rockclimber_m.007", 0x280000, 0x80000, CRC(3ca7f69a) SHA1(878cca181d915dc3548d5285a4bbb51aef31a64e) )
	3321	ROM_LOAD( "rockclimber_m.008", 0x380000, 0x80000, CRC(8cf6b4c2) SHA1(4c36c217b83c82acfdd615f5547bf597af7b8833) )
3200	3322	ROM_END
3201	3323
3202	3324	ROM_START( rclimb_3e ) // 040827 custom alteras, modified graphics, many texts changed, changed version text to "LOTOS SK01"
3203	3325	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3204		ROM_LOAD( "bootleg_rc040827e.rom", 0x00000, 0x40000, CRC(0ae53856) SHA1(af6b744addc8fb429464e5dbe28c8ebcd2925dec) ) /* Not officially listed on Igrosoft's web site hash page */
	3326	ROM_LOAD( "bootleg_rc_m_040827e.rom", 0x00000, 0x40000, CRC(0ae53856) SHA1(af6b744addc8fb429464e5dbe28c8ebcd2925dec) ) /* Not officially listed on Igrosoft's web site hash page */
3205	3327
3206	3328	ROM_REGION( 0x400000, "gfx", 0 )
3207	3329	ROM_LOAD( "bootleg_1d", 0x000000, 0x80000, CRC(085caab6) SHA1(32a6a9160f9a175ba74ef60d36e1715efe7599b4) )
r9812	r9813
3218	3340
3219	3341	ROM_START( sweetla ) // 041220 backdoor 1,5 9,1 5,3 1,5 3,3 3,4
3220	3342	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3221		ROM_LOAD( "bootleg_sl041220a.rom", 0x00000, 0x40000, CRC(920fd9fe) SHA1(0b5ad099ae4c8e3ba0f99baf8fc9322cae24e9d2) ) /* Not officially listed on Igrosoft's web site hash page */
	3343	ROM_LOAD( "bootleg_sl_m_041220a.rom", 0x00000, 0x40000, CRC(920fd9fe) SHA1(0b5ad099ae4c8e3ba0f99baf8fc9322cae24e9d2) ) /* Not officially listed on Igrosoft's web site hash page */
3222	3344
3223	3345	ROM_REGION( 0x400000, "gfx", 0 )
3224		ROM_LOAD( "1_041220", 0x000000, 0x80000, CRC(a096c786) SHA1(81f6b083cb089e9412a8506889196354c670d945) )
3225		ROM_LOAD( "2_041220", 0x100000, 0x80000, CRC(c5e1e22c) SHA1(973ad27681a0f3beee7084b1b85fc9deb79d638e) )
3226		ROM_LOAD( "3_041220", 0x200000, 0x80000, CRC(af335323) SHA1(b8afdce231a8ec0f313cc47e00a27f05461bbbc4) )
3227		ROM_LOAD( "4_041220", 0x300000, 0x80000, CRC(a35c7503) SHA1(78f7a868660bbaa066e8e9e341db52018aaf3af1) )
3228		ROM_LOAD( "5_041220", 0x080000, 0x80000, CRC(e2d6b632) SHA1(65d05e55671b8c335cae2dfbf6a6f5bd8cc90e2c) )
3229		ROM_LOAD( "6_041220", 0x180000, 0x80000, CRC(d34e0905) SHA1(cc4afe64fb9052a31f759be41ff07a727e0a9093) )
3230		ROM_LOAD( "7_041220", 0x280000, 0x80000, CRC(978b67bb) SHA1(87357d5832588f00272bd76df736c06c599f3853) )
3231		ROM_LOAD( "8_041220", 0x380000, 0x80000, CRC(75954355) SHA1(e6ef2b70d859b61e8e3d1751de8558b8778e502d) )
	3346	ROM_LOAD( "sweetlife.001", 0x000000, 0x80000, CRC(a096c786) SHA1(81f6b083cb089e9412a8506889196354c670d945) )
	3347	ROM_LOAD( "sweetlife.002", 0x100000, 0x80000, CRC(c5e1e22c) SHA1(973ad27681a0f3beee7084b1b85fc9deb79d638e) )
	3348	ROM_LOAD( "sweetlife.003", 0x200000, 0x80000, CRC(af335323) SHA1(b8afdce231a8ec0f313cc47e00a27f05461bbbc4) )
	3349	ROM_LOAD( "sweetlife.004", 0x300000, 0x80000, CRC(a35c7503) SHA1(78f7a868660bbaa066e8e9e341db52018aaf3af1) )
	3350	ROM_LOAD( "sweetlife.005", 0x080000, 0x80000, CRC(e2d6b632) SHA1(65d05e55671b8c335cae2dfbf6a6f5bd8cc90e2c) )
	3351	ROM_LOAD( "sweetlife.006", 0x180000, 0x80000, CRC(d34e0905) SHA1(cc4afe64fb9052a31f759be41ff07a727e0a9093) )
	3352	ROM_LOAD( "sweetlife.007", 0x280000, 0x80000, CRC(978b67bb) SHA1(87357d5832588f00272bd76df736c06c599f3853) )
	3353	ROM_LOAD( "sweetlife.008", 0x380000, 0x80000, CRC(75954355) SHA1(e6ef2b70d859b61e8e3d1751de8558b8778e502d) )
3232	3354	ROM_END
3233	3355
3234	3356	ROM_START( sweetlb ) // 041220 bank F9, changed version text to 070412
3235	3357	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3236		ROM_LOAD( "bootleg_sl041220b.rom", 0x00000, 0x40000, CRC(53f1a0e1) SHA1(a00a8e8d95bd2be27313c1421d40120ee79ff29d) ) /* Not officially listed on Igrosoft's web site hash page */
	3358	ROM_LOAD( "bootleg_sl_m_041220b.rom", 0x00000, 0x40000, CRC(53f1a0e1) SHA1(a00a8e8d95bd2be27313c1421d40120ee79ff29d) ) /* Not officially listed on Igrosoft's web site hash page */
3237	3359
3238	3360	ROM_REGION( 0x400000, "gfx", 0 )
3239		ROM_LOAD( "1_041220", 0x000000, 0x80000, CRC(a096c786) SHA1(81f6b083cb089e9412a8506889196354c670d945) )
3240		ROM_LOAD( "2_041220", 0x100000, 0x80000, CRC(c5e1e22c) SHA1(973ad27681a0f3beee7084b1b85fc9deb79d638e) )
3241		ROM_LOAD( "3_041220", 0x200000, 0x80000, CRC(af335323) SHA1(b8afdce231a8ec0f313cc47e00a27f05461bbbc4) )
3242		ROM_LOAD( "4_041220", 0x300000, 0x80000, CRC(a35c7503) SHA1(78f7a868660bbaa066e8e9e341db52018aaf3af1) )
3243		ROM_LOAD( "5_041220", 0x080000, 0x80000, CRC(e2d6b632) SHA1(65d05e55671b8c335cae2dfbf6a6f5bd8cc90e2c) )
3244		ROM_LOAD( "6_041220", 0x180000, 0x80000, CRC(d34e0905) SHA1(cc4afe64fb9052a31f759be41ff07a727e0a9093) )
3245		ROM_LOAD( "7_041220", 0x280000, 0x80000, CRC(978b67bb) SHA1(87357d5832588f00272bd76df736c06c599f3853) )
3246		ROM_LOAD( "8_041220", 0x380000, 0x80000, CRC(75954355) SHA1(e6ef2b70d859b61e8e3d1751de8558b8778e502d) )
	3361	ROM_LOAD( "sweetlife.001", 0x000000, 0x80000, CRC(a096c786) SHA1(81f6b083cb089e9412a8506889196354c670d945) )
	3362	ROM_LOAD( "sweetlife.002", 0x100000, 0x80000, CRC(c5e1e22c) SHA1(973ad27681a0f3beee7084b1b85fc9deb79d638e) )
	3363	ROM_LOAD( "sweetlife.003", 0x200000, 0x80000, CRC(af335323) SHA1(b8afdce231a8ec0f313cc47e00a27f05461bbbc4) )
	3364	ROM_LOAD( "sweetlife.004", 0x300000, 0x80000, CRC(a35c7503) SHA1(78f7a868660bbaa066e8e9e341db52018aaf3af1) )
	3365	ROM_LOAD( "sweetlife.005", 0x080000, 0x80000, CRC(e2d6b632) SHA1(65d05e55671b8c335cae2dfbf6a6f5bd8cc90e2c) )
	3366	ROM_LOAD( "sweetlife.006", 0x180000, 0x80000, CRC(d34e0905) SHA1(cc4afe64fb9052a31f759be41ff07a727e0a9093) )
	3367	ROM_LOAD( "sweetlife.007", 0x280000, 0x80000, CRC(978b67bb) SHA1(87357d5832588f00272bd76df736c06c599f3853) )
	3368	ROM_LOAD( "sweetlife.008", 0x380000, 0x80000, CRC(75954355) SHA1(e6ef2b70d859b61e8e3d1751de8558b8778e502d) )
3247	3369	ROM_END
3248	3370
3249	3371
3250	3372
	3373
3251	3374	ROM_START( resdnt_2a ) // 040513 backdoor 1,5 9,1 5,1 1,5 3,3 3,4
3252	3375	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3253		ROM_LOAD( "bootleg_rs040513a.rom", 0x00000, 0x40000, CRC(5b6480d7) SHA1(e54ddc822819136687d613ce4f38dd98f3e01bb5) ) /* Not officially listed on Igrosoft's web site hash page */
	3376	ROM_LOAD( "bootleg_rs_m_040513a.rom", 0x00000, 0x40000, CRC(5b6480d7) SHA1(e54ddc822819136687d613ce4f38dd98f3e01bb5) ) /* Not officially listed on Igrosoft's web site hash page */
3254	3377
3255	3378	ROM_REGION( 0x400000, "gfx", 0 )
3256		ROM_LOAD( "1_040415", 0x000000, 0x80000, CRC(e0645da6) SHA1(dd72f4830d8011f603aa6d430f34ac2598005281) )
3257		ROM_LOAD( "2_040415", 0x100000, 0x80000, CRC(dd8de247) SHA1(498c5b931ce65e289f52d8864b603166f81e3dc4) )
3258		ROM_LOAD( "3_040415", 0x200000, 0x80000, CRC(0d346ec2) SHA1(e2456b28825c54c5e16829525627c40611c0083d) )
3259		ROM_LOAD( "4_040415", 0x300000, 0x80000, CRC(1f95aad9) SHA1(51d003288d5ff23b3c981fbaa99d29b66dd2c101) )
3260		ROM_LOAD( "5_040415", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
3261		ROM_LOAD( "6_040415", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
3262		ROM_LOAD( "7_040415", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
3263		ROM_LOAD( "8_040415", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
	3379	ROM_LOAD( "resident_m.001", 0x000000, 0x80000, CRC(e0645da6) SHA1(dd72f4830d8011f603aa6d430f34ac2598005281) )
	3380	ROM_LOAD( "resident_m.002", 0x100000, 0x80000, CRC(dd8de247) SHA1(498c5b931ce65e289f52d8864b603166f81e3dc4) )
	3381	ROM_LOAD( "resident_m.003", 0x200000, 0x80000, CRC(0d346ec2) SHA1(e2456b28825c54c5e16829525627c40611c0083d) )
	3382	ROM_LOAD( "resident_m.004", 0x300000, 0x80000, CRC(1f95aad9) SHA1(51d003288d5ff23b3c981fbaa99d29b66dd2c101) )
	3383	ROM_LOAD( "resident_m.005", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
	3384	ROM_LOAD( "resident_m.006", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
	3385	ROM_LOAD( "resident_m.007", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
	3386	ROM_LOAD( "resident_m.008", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
3264	3387	ROM_END
3265	3388
3266	3389	ROM_START( resdnt_2b ) // 040513 custom alteras, modified graphics, changed version text to "VIDEO GAME-1 SE01"
3267	3390	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3268		ROM_LOAD( "bootleg_rs040513b.rom", 0x00000, 0x40000, CRC(2f8b2249) SHA1(4fb34888a99946937791fdba4659d256e862598b) ) /* Not officially listed on Igrosoft's web site hash page */
	3391	ROM_LOAD( "bootleg_rs_m_040513b.rom", 0x00000, 0x40000, CRC(2f8b2249) SHA1(4fb34888a99946937791fdba4659d256e862598b) ) /* Not officially listed on Igrosoft's web site hash page */
3269	3392
3270	3393	ROM_REGION( 0x400000, "gfx", 0 )
3271	3394	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(529ac635) SHA1(76cb5b04d61a1e5cb358b55a1b8a5602edd2841a) )
r9812	r9813
3280	3403
3281	3404	ROM_START( resdnt_2c ) // 040513 custom alteras, modified graphics, changed version text to "VIDEO GAME-1 SE01"
3282	3405	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3283		ROM_LOAD( "bootleg_rs040513b.rom", 0x00000, 0x40000, CRC(2f8b2249) SHA1(4fb34888a99946937791fdba4659d256e862598b) ) /* Not officially listed on Igrosoft's web site hash page */
	3406	ROM_LOAD( "bootleg_rs_m_040513b.rom", 0x00000, 0x40000, CRC(2f8b2249) SHA1(4fb34888a99946937791fdba4659d256e862598b) ) /* Not officially listed on Igrosoft's web site hash page */
3284	3407
3285	3408	ROM_REGION( 0x400000, "gfx", 0 )
3286	3409	ROM_LOAD( "bootleg_1c", 0x000000, 0x80000, CRC(31bdf1c6) SHA1(b4c1555cd1cd1eaec5e39ed5879a99633fca5c46) )
r9812	r9813
3295	3418
3296	3419	ROM_START( resdnt_2d ) // 040513 custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 SE01"
3297	3420	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3298		ROM_LOAD( "bootleg_rs040513d.rom", 0x00000, 0x40000, CRC(3481a7b0) SHA1(fb9fa5aea082c80a232d09a938c8b0007e582cc7) ) /* Not officially listed on Igrosoft's web site hash page */
	3421	ROM_LOAD( "bootleg_rs_m_040513d.rom", 0x00000, 0x40000, CRC(3481a7b0) SHA1(fb9fa5aea082c80a232d09a938c8b0007e582cc7) ) /* Not officially listed on Igrosoft's web site hash page */
3299	3422
3300	3423	ROM_REGION( 0x400000, "gfx", 0 )
3301	3424	ROM_LOAD( "bootleg_1d", 0x000000, 0x80000, CRC(e13336d0) SHA1(a427a3eeecf29d7760ffb0955719f282b6688f79) )
r9812	r9813
3310	3433
3311	3434	ROM_START( resdnt_2e ) // 040513 modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3312	3435	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3313		ROM_LOAD( "bootleg_rs040513e.rom", 0x00000, 0x40000, CRC(83fb15e2) SHA1(59b2fbc218802787bc4c7a6324248d1c4bea459b) ) /* Not officially listed on Igrosoft's web site hash page */
	3436	ROM_LOAD( "bootleg_rs_m_040513e.rom", 0x00000, 0x40000, CRC(83fb15e2) SHA1(59b2fbc218802787bc4c7a6324248d1c4bea459b) ) /* Not officially listed on Igrosoft's web site hash page */
3314	3437
3315	3438	ROM_REGION( 0x400000, "gfx", 0 )
3316	3439	ROM_LOAD( "bootleg_1e", 0x000000, 0x80000, CRC(7e9cb8a1) SHA1(5d089b41897dbb90b8209e60c0746196033b8945) )
3317	3440	ROM_LOAD( "bootleg_2e", 0x100000, 0x80000, CRC(474c2a5d) SHA1(54e317706d1b4328ff006dcace11a112b9533b8f) )
3318	3441	ROM_LOAD( "bootleg_3e", 0x200000, 0x80000, CRC(8407a51d) SHA1(d790efa0cd4c38c26e95bf10c63a751694840c52) )
3319	3442	ROM_LOAD( "bootleg_4e", 0x300000, 0x80000, CRC(65f51297) SHA1(799762a7833510a4c513bd3ffb5bd4e541608cca) )
3320		ROM_LOAD( "5_040415", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
3321		ROM_LOAD( "6_040415", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
3322		ROM_LOAD( "7_040415", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
3323		ROM_LOAD( "8_040415", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
	3443	ROM_LOAD( "resident_m.005", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
	3444	ROM_LOAD( "resident_m.006", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
	3445	ROM_LOAD( "resident_m.007", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
	3446	ROM_LOAD( "resident_m.008", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
3324	3447	ROM_END
3325	3448
3326	3449	ROM_START( resdnt_2f ) // 040513 modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-RS2"
3327	3450	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3328		ROM_LOAD( "bootleg_rs040513f.rom", 0x00000, 0x40000, CRC(2f711769) SHA1(07333d5837484107681561a2434c8668ec77a7f4) ) /* Not officially listed on Igrosoft's web site hash page */
	3451	ROM_LOAD( "bootleg_rs_m_040513f.rom", 0x00000, 0x40000, CRC(2f711769) SHA1(07333d5837484107681561a2434c8668ec77a7f4) ) /* Not officially listed on Igrosoft's web site hash page */
3329	3452
3330	3453	ROM_REGION( 0x400000, "gfx", 0 )
3331	3454	ROM_LOAD( "bootleg_1f", 0x000000, 0x80000, CRC(8cefec30) SHA1(3bf400bdff230e2af83c377617e162818a8c70a4) )
3332	3455	ROM_LOAD( "bootleg_2f", 0x100000, 0x80000, CRC(5318fc74) SHA1(8c6f6f0de426228ca24d552b246f5d0f5feb8611) )
3333	3456	ROM_LOAD( "bootleg_3f", 0x200000, 0x80000, CRC(5ff2bf17) SHA1(c0e23e02cd4e39fb2a99af64a002474f1bc48131) )
3334	3457	ROM_LOAD( "bootleg_4f", 0x300000, 0x80000, CRC(9e9a90fa) SHA1(dadacfded904401a1f1f0e31c8218763fd01cff8) )
3335		ROM_LOAD( "5_040415", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
3336		ROM_LOAD( "6_040415", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
3337		ROM_LOAD( "7_040415", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
3338		ROM_LOAD( "8_040415", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
	3458	ROM_LOAD( "resident_m.005", 0x080000, 0x80000, CRC(0cfe7d44) SHA1(9f0e4925e815ff9f79188f18e78c0a7b377daa3f) )
	3459	ROM_LOAD( "resident_m.006", 0x180000, 0x80000, CRC(7437904f) SHA1(630c79cd6a990ce7658a1ffabba5a27efba985a1) )
	3460	ROM_LOAD( "resident_m.007", 0x280000, 0x80000, CRC(6e94728a) SHA1(ab414879cb957d9bc8d653b5e3bb2bbf91139ec0) )
	3461	ROM_LOAD( "resident_m.008", 0x380000, 0x80000, CRC(a9f55043) SHA1(4771df3d45bdc0a21b1c479f45e09ac5bab6c94f) )
3339	3462	ROM_END
3340	3463
3341	3464	ROM_START( resdnt_2g ) // 040513 custom alteras, modified graphics, many texts changed, changed version text to "LOTOS SE01"
3342	3465	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3343		ROM_LOAD( "bootleg_rs040513g.rom", 0x00000, 0x40000, CRC(3c061c32) SHA1(c71376da261f1f69cfa78a243444ea9963f9000e) ) /* Not officially listed on Igrosoft's web site hash page */
	3466	ROM_LOAD( "bootleg_rs_m_040513g.rom", 0x00000, 0x40000, CRC(3c061c32) SHA1(c71376da261f1f69cfa78a243444ea9963f9000e) ) /* Not officially listed on Igrosoft's web site hash page */
3344	3467
3345	3468	ROM_REGION( 0x400000, "gfx", 0 )
3346	3469	ROM_LOAD( "bootleg_1g", 0x000000, 0x80000, CRC(f98cda01) SHA1(c8bb11230d4659ae57429ed3ec56dd26af2a6332) )
r9812	r9813
3357	3480
3358	3481	ROM_START( islanda ) // 050713 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3359	3482	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3360		ROM_LOAD( "bootleg_is050713a.rom", 0x00000, 0x40000, CRC(d3d62cb3) SHA1(2ceb83ac9d59a570435220f06e8317057bb46608) ) /* Not officially listed on Igrosoft's web site hash page */
	3483	ROM_LOAD( "bootleg_is_m_050713a.rom", 0x00000, 0x40000, CRC(d3d62cb3) SHA1(2ceb83ac9d59a570435220f06e8317057bb46608) ) /* Not officially listed on Igrosoft's web site hash page */
3361	3484
3362	3485	ROM_REGION( 0x400000, "gfx", 0 )
3363		ROM_LOAD( "1_050713", 0x000000, 0x80000, CRC(dbe8cdda) SHA1(4747cf0d85afdef22d3ba9fa5e75b39548725745) )
3364		ROM_LOAD( "2_050713", 0x100000, 0x80000, CRC(64064745) SHA1(91a7bc7204a8f7a7512eeaf4906da20a9f587565) )
3365		ROM_LOAD( "3_050713", 0x200000, 0x80000, CRC(1d993f68) SHA1(b0459d3941d50668f7533909e3f3da91453d3efd) )
3366		ROM_LOAD( "4_050713", 0x300000, 0x80000, CRC(a4739404) SHA1(8f7ffcc13dcb35adfa8060ab1930d07195b6110c) )
3367		ROM_LOAD( "5_050713", 0x080000, 0x80000, CRC(d016eb31) SHA1(a84f18af470f72730b241b9031cd6131c8a03db2) )
3368		ROM_LOAD( "6_050713", 0x180000, 0x80000, CRC(0faaa968) SHA1(0f05546e6e0559e24c6afdde65b3feeb66b6adff) )
3369		ROM_LOAD( "7_050713", 0x280000, 0x80000, CRC(d7277a6c) SHA1(d96a0befc965ad22087381982305d68208978a7e) )
3370		ROM_LOAD( "8_050713", 0x380000, 0x80000, CRC(ac6fba48) SHA1(64dd03d624f16da52bc7fa0702246e91ae39a806) )
	3486	ROM_LOAD( "island.001", 0x000000, 0x80000, CRC(dbe8cdda) SHA1(4747cf0d85afdef22d3ba9fa5e75b39548725745) )
	3487	ROM_LOAD( "island.002", 0x100000, 0x80000, CRC(64064745) SHA1(91a7bc7204a8f7a7512eeaf4906da20a9f587565) )
	3488	ROM_LOAD( "island.003", 0x200000, 0x80000, CRC(1d993f68) SHA1(b0459d3941d50668f7533909e3f3da91453d3efd) )
	3489	ROM_LOAD( "island.004", 0x300000, 0x80000, CRC(a4739404) SHA1(8f7ffcc13dcb35adfa8060ab1930d07195b6110c) )
	3490	ROM_LOAD( "island.005", 0x080000, 0x80000, CRC(d016eb31) SHA1(a84f18af470f72730b241b9031cd6131c8a03db2) )
	3491	ROM_LOAD( "island.006", 0x180000, 0x80000, CRC(0faaa968) SHA1(0f05546e6e0559e24c6afdde65b3feeb66b6adff) )
	3492	ROM_LOAD( "island.007", 0x280000, 0x80000, CRC(d7277a6c) SHA1(d96a0befc965ad22087381982305d68208978a7e) )
	3493	ROM_LOAD( "island.008", 0x380000, 0x80000, CRC(ac6fba48) SHA1(64dd03d624f16da52bc7fa0702246e91ae39a806) )
3371	3494	ROM_END
3372	3495
3373	3496	ROM_START( islandb ) // 050713 custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 OS01"
3374	3497	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3375		ROM_LOAD( "bootleg_is050713b.rom", 0x00000, 0x40000, CRC(535d4283) SHA1(d4823b1487aa9c7f07e84968de563a8c18f3e770) ) /* Not officially listed on Igrosoft's web site hash page */
	3498	ROM_LOAD( "bootleg_is_m_050713b.rom", 0x00000, 0x40000, CRC(535d4283) SHA1(d4823b1487aa9c7f07e84968de563a8c18f3e770) ) /* Not officially listed on Igrosoft's web site hash page */
3376	3499
3377	3500	ROM_REGION( 0x400000, "gfx", 0 )
3378	3501	ROM_LOAD( "bootleg_1a", 0x000000, 0x80000, CRC(95195fdc) SHA1(4ef22f9d6e539555303f042e53c42acf658a6027) )
r9812	r9813
3387	3510
3388	3511	ROM_START( islandc ) // 050713 custom alteras, modified graphics, many texts changed, changed version text to "LOTOS OS01"
3389	3512	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3390		ROM_LOAD( "bootleg_is050713c.rom", 0x00000, 0x40000, CRC(c879a78e) SHA1(61bf87f50cbf4105330e57e1af7802100286d888) ) /* Not officially listed on Igrosoft's web site hash page */
	3513	ROM_LOAD( "bootleg_is_m_050713c.rom", 0x00000, 0x40000, CRC(c879a78e) SHA1(61bf87f50cbf4105330e57e1af7802100286d888) ) /* Not officially listed on Igrosoft's web site hash page */
3391	3514
3392	3515	ROM_REGION( 0x400000, "gfx", 0 )
3393	3516	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(eccf5648) SHA1(7b9dc15e8fac9dcc8a14bda52df4d03462a242d0) )
r9812	r9813
3401	3524	ROM_END
3402	3525
3403	3526
	3527
3404	3528	ROM_START( island2a ) // 060529 bank F9
3405	3529	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3406		ROM_LOAD( "bootleg_is2_060529a.rom", 0x00000, 0x40000, CRC(4341d65c) SHA1(e7120c805d7dbf0fee5d18243ddf2cfa19a0d88c) ) /* Not officially listed on Igrosoft's web site hash page */
	3530	ROM_LOAD( "bootleg_is2_m_060529a.rom", 0x00000, 0x40000, CRC(4341d65c) SHA1(e7120c805d7dbf0fee5d18243ddf2cfa19a0d88c) ) /* Not officially listed on Igrosoft's web site hash page */
3407	3531
3408	3532	ROM_REGION( 0x400000, "gfx", 0 )
3409		ROM_LOAD( "1_060529", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
3410		ROM_LOAD( "2_060529", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
3411		ROM_LOAD( "3_060529", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
3412		ROM_LOAD( "4_060529", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
3413		ROM_LOAD( "5_060529", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
3414		ROM_LOAD( "6_060529", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
3415		ROM_LOAD( "7_060529", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
3416		ROM_LOAD( "8_060529", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
	3533	ROM_LOAD( "island2.001", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
	3534	ROM_LOAD( "island2.002", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
	3535	ROM_LOAD( "island2.003", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
	3536	ROM_LOAD( "island2.004", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
	3537	ROM_LOAD( "island2.005", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
	3538	ROM_LOAD( "island2.006", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
	3539	ROM_LOAD( "island2.007", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
	3540	ROM_LOAD( "island2.008", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
3417	3541	ROM_END
3418	3542
3419	3543	ROM_START( island2b ) // 060529 bank F9, changed version text to 070205, skip some start tests
3420	3544	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3421		ROM_LOAD( "bootleg_is2_060529b.rom", 0x00000, 0x40000, CRC(617d9a35) SHA1(96947342216872984e13e9997552f8411b268467) ) /* Not officially listed on Igrosoft's web site hash page */
	3545	ROM_LOAD( "bootleg_is2_m_060529b.rom", 0x00000, 0x40000, CRC(617d9a35) SHA1(96947342216872984e13e9997552f8411b268467) ) /* Not officially listed on Igrosoft's web site hash page */
3422	3546
3423	3547	ROM_REGION( 0x400000, "gfx", 0 )
3424		ROM_LOAD( "1_060529", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
3425		ROM_LOAD( "2_060529", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
3426		ROM_LOAD( "3_060529", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
3427		ROM_LOAD( "4_060529", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
3428		ROM_LOAD( "5_060529", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
3429		ROM_LOAD( "6_060529", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
3430		ROM_LOAD( "7_060529", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
3431		ROM_LOAD( "8_060529", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
	3548	ROM_LOAD( "island2.001", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
	3549	ROM_LOAD( "island2.002", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
	3550	ROM_LOAD( "island2.003", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
	3551	ROM_LOAD( "island2.004", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
	3552	ROM_LOAD( "island2.005", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
	3553	ROM_LOAD( "island2.006", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
	3554	ROM_LOAD( "island2.007", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
	3555	ROM_LOAD( "island2.008", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
3432	3556	ROM_END
3433	3557
3434	3558	ROM_START( island2c ) // 060529 bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3435	3559	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3436		ROM_LOAD( "bootleg_is2_060529c.rom", 0x00000, 0x40000, CRC(cbf1ec14) SHA1(ec6dc40deacc1a1e0bbe2778d834fb5eb392ca04) ) /* Not officially listed on Igrosoft's web site hash page */
	3560	ROM_LOAD( "bootleg_is2_m_060529c.rom", 0x00000, 0x40000, CRC(cbf1ec14) SHA1(ec6dc40deacc1a1e0bbe2778d834fb5eb392ca04) ) /* Not officially listed on Igrosoft's web site hash page */
3437	3561
3438	3562	ROM_REGION( 0x400000, "gfx", 0 )
3439	3563	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(4ee179af) SHA1(77e48ff2a45bb4eb8f68b92044791f6f4fad09f5) )
r9812	r9813
3446	3570	ROM_LOAD( "bootleg_8", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
3447	3571	ROM_END
3448	3572
3449
3450
3451	3573	ROM_START( island2_3a ) // 061218 bank F9, modified graphics, changed version text to "VIDEO GAME-1 OS2-01"
3452	3574	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3453		ROM_LOAD( "bootleg_is2_061218a.rom", 0x00000, 0x40000, CRC(f190c856) SHA1(c3b762c8b2e24a75b91e93a6c058d8a4a86de60e) ) /* Not officially listed on Igrosoft's web site hash page */
	3575	ROM_LOAD( "bootleg_is2_m_061218a.rom", 0x00000, 0x40000, CRC(f190c856) SHA1(c3b762c8b2e24a75b91e93a6c058d8a4a86de60e) ) /* Not officially listed on Igrosoft's web site hash page */
3454	3576
3455	3577	ROM_REGION( 0x400000, "gfx", 0 )
3456	3578	ROM_LOAD( "bootleg_1a", 0x000000, 0x80000, CRC(ea6c4724) SHA1(f0054dc2e0d7c49e5ca96ce5aaf4c08ddb9d56d9) )
r9812	r9813
3468	3590	ROM_LOAD( "bootleg_is2_070205a.rom", 0x00000, 0x40000, CRC(9bafe560) SHA1(c7238f822d26645207953798c87e67127de1b443) ) /* Not officially listed on Igrosoft's web site hash page */
3469	3591
3470	3592	ROM_REGION( 0x400000, "gfx", 0 )
3471		ROM_LOAD( "1_060529", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
3472		ROM_LOAD( "2_060529", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
3473		ROM_LOAD( "3_060529", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
3474		ROM_LOAD( "4_060529", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
3475		ROM_LOAD( "5_060529", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
3476		ROM_LOAD( "6_060529", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
3477		ROM_LOAD( "7_060529", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
3478		ROM_LOAD( "8_060529", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
	3593	ROM_LOAD( "island2.001", 0x000000, 0x80000, CRC(f8dd9fe9) SHA1(0cf67fbca107b255011fded6390507d12cbac514) )
	3594	ROM_LOAD( "island2.002", 0x100000, 0x80000, CRC(4f9607c0) SHA1(cd3e7b4a88f46231a115c9d18a26b5e30fea74e4) )
	3595	ROM_LOAD( "island2.003", 0x200000, 0x80000, CRC(bceccdba) SHA1(5cf3b51ccfe317ca57d770bff0204b0ee83d1173) )
	3596	ROM_LOAD( "island2.004", 0x300000, 0x80000, CRC(15fdecc7) SHA1(6882ea10f117c85544df51d9abd67ef52db91d95) )
	3597	ROM_LOAD( "island2.005", 0x080000, 0x80000, CRC(2d4905aa) SHA1(c4a1e4db61e8af6cf0fb70aabe5e3896ab5227ca) )
	3598	ROM_LOAD( "island2.006", 0x180000, 0x80000, CRC(55e285d9) SHA1(ba58963441c65220700cd8057e6afe3f5f8faa4f) )
	3599	ROM_LOAD( "island2.007", 0x280000, 0x80000, CRC(edd72be6) SHA1(fb1e63f59e8565c23ae43630fa572fbc022c878f) )
	3600	ROM_LOAD( "island2.008", 0x380000, 0x80000, CRC(c336d608) SHA1(55391183c6d95ecea81354efa70641350860d1f5) )
3479	3601	ROM_END
3480	3602
3481	3603
3482	3604
3483	3605	ROM_START( pirate2a ) // 061005 bank F9
3484	3606	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3485		ROM_LOAD( "bootleg_pr2_061005a.rom", 0x00000, 0x40000, CRC(2271eb23) SHA1(6a3e01b59df08a23e5f53ee9b9e473b9f5f5e3b6) ) /* Not officially listed on Igrosoft's web site hash page */
	3607	ROM_LOAD( "bootleg_pr2_m_061005a.rom", 0x00000, 0x40000, CRC(2271eb23) SHA1(6a3e01b59df08a23e5f53ee9b9e473b9f5f5e3b6) ) /* Not officially listed on Igrosoft's web site hash page */
3486	3608
3487	3609	ROM_REGION( 0x400000, "gfx", 0 )
3488		ROM_LOAD( "1_061005", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
3489		ROM_LOAD( "2_061005", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
3490		ROM_LOAD( "3_061005", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
3491		ROM_LOAD( "4_061005", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
3492		ROM_LOAD( "5_061005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
3493		ROM_LOAD( "6_061005", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
3494		ROM_LOAD( "7_061005", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
3495		ROM_LOAD( "8_061005", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
	3610	ROM_LOAD( "pirate2.001", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
	3611	ROM_LOAD( "pirate2.002", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
	3612	ROM_LOAD( "pirate2.003", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
	3613	ROM_LOAD( "pirate2.004", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
	3614	ROM_LOAD( "pirate2.005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
	3615	ROM_LOAD( "pirate2.006", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
	3616	ROM_LOAD( "pirate2.007", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
	3617	ROM_LOAD( "pirate2.008", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
3496	3618	ROM_END
3497	3619
3498	3620	ROM_START( pirate2b ) // 061005 bank F9, skip raster beam position check
3499	3621	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3500		ROM_LOAD( "bootleg_pr2_061005b.rom", 0x00000, 0x40000, CRC(379f890e) SHA1(0fd05c1bf08fd3e6694f18ffe2ea9741cf465617) ) /* Not officially listed on Igrosoft's web site hash page */
	3622	ROM_LOAD( "bootleg_pr2_m_061005b.rom", 0x00000, 0x40000, CRC(379f890e) SHA1(0fd05c1bf08fd3e6694f18ffe2ea9741cf465617) ) /* Not officially listed on Igrosoft's web site hash page */
3501	3623
3502	3624	ROM_REGION( 0x400000, "gfx", 0 )
3503		ROM_LOAD( "1_061005", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
3504		ROM_LOAD( "2_061005", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
3505		ROM_LOAD( "3_061005", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
3506		ROM_LOAD( "4_061005", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
3507		ROM_LOAD( "5_061005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
3508		ROM_LOAD( "6_061005", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
3509		ROM_LOAD( "7_061005", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
3510		ROM_LOAD( "8_061005", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
	3625	ROM_LOAD( "pirate2.001", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
	3626	ROM_LOAD( "pirate2.002", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
	3627	ROM_LOAD( "pirate2.003", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
	3628	ROM_LOAD( "pirate2.004", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
	3629	ROM_LOAD( "pirate2.005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
	3630	ROM_LOAD( "pirate2.006", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
	3631	ROM_LOAD( "pirate2.007", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
	3632	ROM_LOAD( "pirate2.008", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
3511	3633	ROM_END
3512	3634
3513	3635	ROM_START( pirate2c ) // 061005 bank F9, changed version text to 070126
3514	3636	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3515		ROM_LOAD( "bootleg_pr2_061005c.rom", 0x00000, 0x40000, CRC(7c4339df) SHA1(80e2f97629bc963f044c1697c65777a3fd038edc) ) /* Not officially listed on Igrosoft's web site hash page */
	3637	ROM_LOAD( "bootleg_pr2_m_061005c.rom", 0x00000, 0x40000, CRC(7c4339df) SHA1(80e2f97629bc963f044c1697c65777a3fd038edc) ) /* Not officially listed on Igrosoft's web site hash page */
3516	3638
3517	3639	ROM_REGION( 0x400000, "gfx", 0 )
3518		ROM_LOAD( "1_061005", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
3519		ROM_LOAD( "2_061005", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
3520		ROM_LOAD( "3_061005", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
3521		ROM_LOAD( "4_061005", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
3522		ROM_LOAD( "5_061005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
3523		ROM_LOAD( "6_061005", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
3524		ROM_LOAD( "7_061005", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
3525		ROM_LOAD( "8_061005", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
	3640	ROM_LOAD( "pirate2.001", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
	3641	ROM_LOAD( "pirate2.002", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
	3642	ROM_LOAD( "pirate2.003", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
	3643	ROM_LOAD( "pirate2.004", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
	3644	ROM_LOAD( "pirate2.005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
	3645	ROM_LOAD( "pirate2.006", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
	3646	ROM_LOAD( "pirate2.007", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
	3647	ROM_LOAD( "pirate2.008", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
3526	3648	ROM_END
3527	3649
3528	3650	ROM_START( pirate2d ) // 061005 bank F9, changed version text to 070126
3529	3651	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3530		ROM_LOAD( "bootleg_pr2_061005d.rom", 0x00000, 0x40000, CRC(16620bb2) SHA1(bf3a26b06595e51fa37f2f8099a12e906a6ca439) ) /* Not officially listed on Igrosoft's web site hash page */
	3652	ROM_LOAD( "bootleg_pr2_m_061005d.rom", 0x00000, 0x40000, CRC(16620bb2) SHA1(bf3a26b06595e51fa37f2f8099a12e906a6ca439) ) /* Not officially listed on Igrosoft's web site hash page */
3531	3653
3532	3654	ROM_REGION( 0x400000, "gfx", 0 )
3533		ROM_LOAD( "1_061005", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
3534		ROM_LOAD( "2_061005", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
3535		ROM_LOAD( "3_061005", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
3536		ROM_LOAD( "4_061005", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
3537		ROM_LOAD( "5_061005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
3538		ROM_LOAD( "6_061005", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
3539		ROM_LOAD( "7_061005", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
3540		ROM_LOAD( "8_061005", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
	3655	ROM_LOAD( "pirate2.001", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
	3656	ROM_LOAD( "pirate2.002", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
	3657	ROM_LOAD( "pirate2.003", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
	3658	ROM_LOAD( "pirate2.004", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
	3659	ROM_LOAD( "pirate2.005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
	3660	ROM_LOAD( "pirate2.006", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
	3661	ROM_LOAD( "pirate2.007", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
	3662	ROM_LOAD( "pirate2.008", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
3541	3663	ROM_END
3542	3664
3543	3665	ROM_START( pirate2e ) // 061005 bank F9, changed version text to 070126, skip some start tests
3544	3666	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3545		ROM_LOAD( "bootleg_pr2_061005e.rom", 0x00000, 0x40000, CRC(f36edf02) SHA1(25ff61eb80b54298037b4a90d7fc93e8530e0815) ) /* Not officially listed on Igrosoft's web site hash page */
	3667	ROM_LOAD( "bootleg_pr2_m_061005e.rom", 0x00000, 0x40000, CRC(f36edf02) SHA1(25ff61eb80b54298037b4a90d7fc93e8530e0815) ) /* Not officially listed on Igrosoft's web site hash page */
3546	3668
3547	3669	ROM_REGION( 0x400000, "gfx", 0 )
3548		ROM_LOAD( "1_061005", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
3549		ROM_LOAD( "2_061005", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
3550		ROM_LOAD( "3_061005", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
3551		ROM_LOAD( "4_061005", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
3552		ROM_LOAD( "5_061005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
3553		ROM_LOAD( "6_061005", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
3554		ROM_LOAD( "7_061005", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
3555		ROM_LOAD( "8_061005", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
	3670	ROM_LOAD( "pirate2.001", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
	3671	ROM_LOAD( "pirate2.002", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
	3672	ROM_LOAD( "pirate2.003", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
	3673	ROM_LOAD( "pirate2.004", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
	3674	ROM_LOAD( "pirate2.005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
	3675	ROM_LOAD( "pirate2.006", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
	3676	ROM_LOAD( "pirate2.007", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
	3677	ROM_LOAD( "pirate2.008", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
3556	3678	ROM_END
3557	3679
3558	3680	ROM_START( pirate2f ) // 061005 custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 PR01"
3559	3681	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3560		ROM_LOAD( "bootleg_pr2_061005f.rom", 0x00000, 0x40000, CRC(99960a9f) SHA1(0facd5d1f297d4433d6abefc61cfa2867826e90c) ) /* Not officially listed on Igrosoft's web site hash page */
	3682	ROM_LOAD( "bootleg_pr2_m_061005f.rom", 0x00000, 0x40000, CRC(99960a9f) SHA1(0facd5d1f297d4433d6abefc61cfa2867826e90c) ) /* Not officially listed on Igrosoft's web site hash page */
3561	3683
3562	3684	ROM_REGION( 0x400000, "gfx", 0 )
3563	3685	ROM_LOAD( "bootleg_1a", 0x000000, 0x80000, CRC(011522da) SHA1(c1ce09208b3144cbc38d4afa922a049043a93df6) )
r9812	r9813
3572	3694
3573	3695	ROM_START( pirate2g ) // 061005 bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3574	3696	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3575		ROM_LOAD( "bootleg_pr2_061005g.rom", 0x00000, 0x40000, CRC(60170053) SHA1(4aca8fd8466199467a5c0020cdbb4379ae38cee4) ) /* Not officially listed on Igrosoft's web site hash page */
	3697	ROM_LOAD( "bootleg_pr2_m_061005g.rom", 0x00000, 0x40000, CRC(60170053) SHA1(4aca8fd8466199467a5c0020cdbb4379ae38cee4) ) /* Not officially listed on Igrosoft's web site hash page */
3576	3698
3577	3699	ROM_REGION( 0x400000, "gfx", 0 )
3578	3700	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(76d3bc6f) SHA1(a748f5d1219fe3f332cebbf1dfb8014a15800135) )
r9812	r9813
3587	3709
3588	3710	ROM_START( pirate2h ) // 061005 custom alteras, modified graphics, many texts changed, changed version text to "LOTOS PR01"
3589	3711	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3590		ROM_LOAD( "bootleg_pr2_061005h.rom", 0x00000, 0x40000, CRC(6dadb485) SHA1(9b61ad0f117dc84af8b7b3523275e5cb48c521e5) ) /* Not officially listed on Igrosoft's web site hash page */
	3712	ROM_LOAD( "bootleg_pr2_m_061005h.rom", 0x00000, 0x40000, CRC(6dadb485) SHA1(9b61ad0f117dc84af8b7b3523275e5cb48c521e5) ) /* Not officially listed on Igrosoft's web site hash page */
3591	3713
3592	3714	ROM_REGION( 0x400000, "gfx", 0 )
3593	3715	ROM_LOAD( "bootleg_1d", 0x000000, 0x80000, CRC(d830ed6d) SHA1(4cdde127912d250201665534e6371dcfc500dc10) )
r9812	r9813
3605	3727	ROM_LOAD( "bootleg_pr2_070126a.rom", 0x00000, 0x40000, CRC(7131239b) SHA1(8210defd0987951a0dfe5b3ca6fcee580257475e) ) /* Not officially listed on Igrosoft's web site hash page */
3606	3728
3607	3729	ROM_REGION( 0x400000, "gfx", 0 )
3608		ROM_LOAD( "1_061005", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
3609		ROM_LOAD( "2_061005", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
3610		ROM_LOAD( "3_061005", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
3611		ROM_LOAD( "4_061005", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
3612		ROM_LOAD( "5_061005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
3613		ROM_LOAD( "6_061005", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
3614		ROM_LOAD( "7_061005", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
3615		ROM_LOAD( "8_061005", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
	3730	ROM_LOAD( "pirate2.001", 0x000000, 0x80000, CRC(106e7cba) SHA1(289a3ae38b895c83600c920bee0c2dd46e941eac) )
	3731	ROM_LOAD( "pirate2.002", 0x100000, 0x80000, CRC(076a290f) SHA1(2f9bb74e081262e535c8ed9a31589d6a919f5d15) )
	3732	ROM_LOAD( "pirate2.003", 0x200000, 0x80000, CRC(13a91fe7) SHA1(6e127b3827a9271ad19986714747be9367125f62) )
	3733	ROM_LOAD( "pirate2.004", 0x300000, 0x80000, CRC(5ac8c531) SHA1(1da91b9a71a9a8681577342660bfa85e5bbc99bc) )
	3734	ROM_LOAD( "pirate2.005", 0x080000, 0x80000, CRC(98012c74) SHA1(2a5b466353eef3a5cfc9f98eceb7523b00d0204a) )
	3735	ROM_LOAD( "pirate2.006", 0x180000, 0x80000, CRC(366e1465) SHA1(440230d5306c4b424f27839b7fb9c8a5bb922dcc) )
	3736	ROM_LOAD( "pirate2.007", 0x280000, 0x80000, CRC(21fb963e) SHA1(e3f7fb13f326699e34aebcc3ee07016f7cfe6e46) )
	3737	ROM_LOAD( "pirate2.008", 0x380000, 0x80000, CRC(40c59448) SHA1(774af0f376864ec5948904df338bc7493eaed392) )
3616	3738	ROM_END
3617	3739
3618	3740
3619	3741
3620	3742	ROM_START( keksa ) // 060328 bank F9
3621	3743	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3622		ROM_LOAD( "bootleg_ks060328a.rom", 0x00000, 0x40000, CRC(7b387386) SHA1(d6bfc3b0d1f74723902d96dbcb69865cb5274cd0) ) /* Not officially listed on Igrosoft's web site hash page */
	3744	ROM_LOAD( "bootleg_ks_m_060328a.rom", 0x00000, 0x40000, CRC(7b387386) SHA1(d6bfc3b0d1f74723902d96dbcb69865cb5274cd0) ) /* Not officially listed on Igrosoft's web site hash page */
3623	3745
3624	3746	ROM_REGION( 0x400000, "gfx", 0 )
3625		ROM_LOAD( "1_060328", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
3626		ROM_LOAD( "2_060328", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
3627		ROM_LOAD( "3_060328", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
3628		ROM_LOAD( "4_060328", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
3629		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3630		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3631		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3632		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3747	ROM_LOAD( "keks_m.001", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
	3748	ROM_LOAD( "keks_m.002", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
	3749	ROM_LOAD( "keks_m.003", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
	3750	ROM_LOAD( "keks_m.004", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
	3751	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3752	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3753	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3754	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3633	3755	ROM_END
3634	3756
3635	3757	ROM_START( keksb ) // 060328 backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3636	3758	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3637		ROM_LOAD( "bootleg_ks060328b.rom", 0x00000, 0x40000, CRC(661c7ee9) SHA1(f07902c4a3ba5fce5bc7fe666d90deb852e40b4c) ) /* Not officially listed on Igrosoft's web site hash page */
	3759	ROM_LOAD( "bootleg_ks_m_060328b.rom", 0x00000, 0x40000, CRC(661c7ee9) SHA1(f07902c4a3ba5fce5bc7fe666d90deb852e40b4c) ) /* Not officially listed on Igrosoft's web site hash page */
3638	3760
3639	3761	ROM_REGION( 0x400000, "gfx", 0 )
3640		ROM_LOAD( "1_060328", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
3641		ROM_LOAD( "2_060328", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
3642		ROM_LOAD( "3_060328", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
3643		ROM_LOAD( "4_060328", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
3644		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3645		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3646		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3647		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3762	ROM_LOAD( "keks_m.001", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
	3763	ROM_LOAD( "keks_m.002", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
	3764	ROM_LOAD( "keks_m.003", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
	3765	ROM_LOAD( "keks_m.004", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
	3766	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3767	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3768	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3769	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3648	3770	ROM_END
3649	3771
3650	3772	ROM_START( keksc ) // 060328 bank F9, changed version text to 070119
3651	3773	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3652		ROM_LOAD( "bootleg_ks060328c.rom", 0x00000, 0x40000, CRC(fc70d26e) SHA1(0430ad20b797412967c2e82779eb7f0e9170f77c) ) /* Not officially listed on Igrosoft's web site hash page */
	3774	ROM_LOAD( "bootleg_ks_m_060328c.rom", 0x00000, 0x40000, CRC(fc70d26e) SHA1(0430ad20b797412967c2e82779eb7f0e9170f77c) ) /* Not officially listed on Igrosoft's web site hash page */
3653	3775
3654	3776	ROM_REGION( 0x400000, "gfx", 0 )
3655		ROM_LOAD( "1_060328", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
3656		ROM_LOAD( "2_060328", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
3657		ROM_LOAD( "3_060328", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
3658		ROM_LOAD( "4_060328", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
3659		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3660		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3661		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3662		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3777	ROM_LOAD( "keks_m.001", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
	3778	ROM_LOAD( "keks_m.002", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
	3779	ROM_LOAD( "keks_m.003", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
	3780	ROM_LOAD( "keks_m.004", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
	3781	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3782	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3783	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3784	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3663	3785	ROM_END
3664	3786
3665
3666
3667	3787	ROM_START( keks_2a ) // 060403 bank F9
3668	3788	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3669		ROM_LOAD( "bootleg_ks060403a.rom", 0x00000, 0x40000, CRC(bd749f63) SHA1(dc3ba624b186370896d3ecf5968a82a17aa019d0) ) /* Not officially listed on Igrosoft's web site hash page */
	3789	ROM_LOAD( "bootleg_ks_m_060403a.rom", 0x00000, 0x40000, CRC(bd749f63) SHA1(dc3ba624b186370896d3ecf5968a82a17aa019d0) ) /* Not officially listed on Igrosoft's web site hash page */
3670	3790
3671	3791	ROM_REGION( 0x400000, "gfx", 0 )
3672		ROM_LOAD( "1_060328", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
3673		ROM_LOAD( "2_060328", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
3674		ROM_LOAD( "3_060328", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
3675		ROM_LOAD( "4_060328", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
3676		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3677		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3678		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3679		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3792	ROM_LOAD( "keks_m.001", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
	3793	ROM_LOAD( "keks_m.002", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
	3794	ROM_LOAD( "keks_m.003", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
	3795	ROM_LOAD( "keks_m.004", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
	3796	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3797	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3798	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3799	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3680	3800	ROM_END
3681	3801
3682	3802	ROM_START( keks_2b ) // 060403 bank F9, changed version text to 070119
3683	3803	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3684		ROM_LOAD( "bootleg_ks060403b.rom", 0x00000, 0x40000, CRC(d089de90) SHA1(9208f411cd97fef89b52019f9655e7d006f91303) ) /* Not officially listed on Igrosoft's web site hash page */
	3804	ROM_LOAD( "bootleg_ks_m_060403b.rom", 0x00000, 0x40000, CRC(d089de90) SHA1(9208f411cd97fef89b52019f9655e7d006f91303) ) /* Not officially listed on Igrosoft's web site hash page */
3685	3805
3686	3806	ROM_REGION( 0x400000, "gfx", 0 )
3687		ROM_LOAD( "1_060328", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
3688		ROM_LOAD( "2_060328", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
3689		ROM_LOAD( "3_060328", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
3690		ROM_LOAD( "4_060328", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
3691		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3692		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3693		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3694		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3807	ROM_LOAD( "keks_m.001", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
	3808	ROM_LOAD( "keks_m.002", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
	3809	ROM_LOAD( "keks_m.003", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
	3810	ROM_LOAD( "keks_m.004", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
	3811	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3812	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3813	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3814	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3695	3815	ROM_END
3696	3816
3697	3817	ROM_START( keks_2c ) // 060403 custom alteras, modified graphics, bank F9, changed version text to "VIDEO GAME-1 KS01"
3698	3818	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3699		ROM_LOAD( "bootleg_ks060403c.rom", 0x00000, 0x40000, CRC(ba7f429a) SHA1(6ad7a345b292f2081e49081374c74afc7430bd14) ) /* Not officially listed on Igrosoft's web site hash page */
	3819	ROM_LOAD( "bootleg_ks_m_060403c.rom", 0x00000, 0x40000, CRC(ba7f429a) SHA1(6ad7a345b292f2081e49081374c74afc7430bd14) ) /* Not officially listed on Igrosoft's web site hash page */
3700	3820
3701	3821	ROM_REGION( 0x400000, "gfx", 0 )
3702	3822	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(2844b89e) SHA1(75b59e6272ef42438a3734e45f131f449ed0aa46) )
r9812	r9813
3711	3831
3712	3832	ROM_START( keks_2d ) // 060403 modified graphics, bank F9, changed version text to "VIDEO GAME-1 KS01" (keks_2c, decoded gfx)
3713	3833	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3714		ROM_LOAD( "bootleg_ks060403c.rom", 0x00000, 0x40000, CRC(ba7f429a) SHA1(6ad7a345b292f2081e49081374c74afc7430bd14) ) /* Not officially listed on Igrosoft's web site hash page */
	3834	ROM_LOAD( "bootleg_ks_m_060403c.rom", 0x00000, 0x40000, CRC(ba7f429a) SHA1(6ad7a345b292f2081e49081374c74afc7430bd14) ) /* Not officially listed on Igrosoft's web site hash page */
3715	3835
3716	3836	ROM_REGION( 0x400000, "gfx", 0 )
3717	3837	ROM_LOAD( "bootleg_1c", 0x000000, 0x80000, CRC(04ad2c2f) SHA1(ea0819dad0971629056ba0e6cb599415f1d34ad6) )
3718	3838	ROM_LOAD( "bootleg_2c", 0x100000, 0x80000, CRC(8d0b747d) SHA1(6c40f3abe8bd20d6405829879fbe4718d85d4ba0) )
3719	3839	ROM_LOAD( "bootleg_3c", 0x200000, 0x80000, CRC(10a43238) SHA1(9404eefad2c62730a771b2521e893bbc78c4ca71) )
3720	3840	ROM_LOAD( "bootleg_4c", 0x300000, 0x80000, CRC(878b2553) SHA1(1b31c1b67496099c0b955865b63881e4a558c320) )
3721		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3722		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3723		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3724		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3841	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3842	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3843	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3844	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3725	3845	ROM_END
3726	3846
3727	3847	ROM_START( keks_2e ) // 060403 bank F9, payout percentage 60%
3728	3848	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3729		ROM_LOAD( "bootleg_ks060403d.rom", 0x00000, 0x40000, CRC(358e5b48) SHA1(6a91d9ee515401ebe7a8dd7d95f43c4df1c13677) ) /* Not officially listed on Igrosoft's web site hash page */
	3849	ROM_LOAD( "bootleg_ks_m_060403d.rom", 0x00000, 0x40000, CRC(358e5b48) SHA1(6a91d9ee515401ebe7a8dd7d95f43c4df1c13677) ) /* Not officially listed on Igrosoft's web site hash page */
3730	3850
3731	3851	ROM_REGION( 0x400000, "gfx", 0 )
3732		ROM_LOAD( "1_060328", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
3733		ROM_LOAD( "2_060328", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
3734		ROM_LOAD( "3_060328", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
3735		ROM_LOAD( "4_060328", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
3736		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3737		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3738		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3739		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3852	ROM_LOAD( "keks_m.001", 0x000000, 0x80000, CRC(f4c20f66) SHA1(bed42ef01dfaa9d5d6ebb703e44ce7c11b8a373c) )
	3853	ROM_LOAD( "keks_m.002", 0x100000, 0x80000, CRC(b7ec3fac) SHA1(c3c62690487a6056415c46888bde8254efca836f) )
	3854	ROM_LOAD( "keks_m.003", 0x200000, 0x80000, CRC(5b6e8568) SHA1(003297e9cd080d91fe6751286eabd3a2f37ceb76) )
	3855	ROM_LOAD( "keks_m.004", 0x300000, 0x80000, CRC(9dc32736) SHA1(7b2091ae802431d1c959b859a58e0076d32abef0) )
	3856	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3857	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3858	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3859	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3740	3860	ROM_END
3741	3861
3742	3862	ROM_START( keks_2f ) // 060403 bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3743	3863	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3744		ROM_LOAD( "bootleg_ks060403e.rom", 0x00000, 0x40000, CRC(80882337) SHA1(af942e27247b0d492799013a623080c02e7213cb) ) /* Not officially listed on Igrosoft's web site hash page */
	3864	ROM_LOAD( "bootleg_ks_m_060403e.rom", 0x00000, 0x40000, CRC(80882337) SHA1(af942e27247b0d492799013a623080c02e7213cb) ) /* Not officially listed on Igrosoft's web site hash page */
3745	3865
3746	3866	ROM_REGION( 0x400000, "gfx", 0 )
3747	3867	ROM_LOAD( "bootleg_1d", 0x000000, 0x80000, CRC(82c5f8e9) SHA1(0fbc1b314e15f93c62c3cd79ece453086c506878) )
r9812	r9813
3750	3870	ROM_LOAD( "bootleg_4d", 0x300000, 0x80000, CRC(aa552b3c) SHA1(7b051b2cece5a5e84020466827576ca8272f4f96) )
3751	3871	ROM_LOAD( "bootleg_5d", 0x080000, 0x80000, CRC(53fa2420) SHA1(2faf775c5bc1ff8683d4a70b236c77d6295167e1) )
3752	3872	ROM_LOAD( "bootleg_6d", 0x180000, 0x80000, CRC(baa7cce5) SHA1(1aacc85498f026358085caa854c2caaad3de5abf) )
3753		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3754		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3873	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3874	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3755	3875	ROM_END
3756	3876
3757	3877	ROM_START( keks_2g ) // 060403 custom alteras, modified graphics, bank F9, many texts changed, changed version text to "LOTOS KS01"
3758	3878	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3759		ROM_LOAD( "bootleg_ks060403f.rom", 0x00000, 0x40000, CRC(9fd765ab) SHA1(ff061fe3d5d547c25d4ca830ec1f94025ab4e7f5) ) /* Not officially listed on Igrosoft's web site hash page */
	3879	ROM_LOAD( "bootleg_ks_m_060403f.rom", 0x00000, 0x40000, CRC(9fd765ab) SHA1(ff061fe3d5d547c25d4ca830ec1f94025ab4e7f5) ) /* Not officially listed on Igrosoft's web site hash page */
3760	3880
3761	3881	ROM_REGION( 0x400000, "gfx", 0 )
3762	3882	ROM_LOAD( "bootleg_1f", 0x000000, 0x80000, CRC(6c9bf198) SHA1(40155c3574f9968e272c6f1af90d663d2a686511) )
r9812	r9813
3771	3891
3772	3892	ROM_START( keks_3a ) // 070119 bank F9
3773	3893	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3774		ROM_LOAD( "bootleg_ks070119a.rom", 0x00000, 0x40000, CRC(9325fea5) SHA1(1d396e63d51a81eae75df1ae2646cacac7f49f66) ) /* Not officially listed on Igrosoft's web site hash page */
	3894	ROM_LOAD( "bootleg_ks_070119a.rom", 0x00000, 0x40000, CRC(9325fea5) SHA1(1d396e63d51a81eae75df1ae2646cacac7f49f66) ) /* Not officially listed on Igrosoft's web site hash page */
3775	3895
3776	3896	ROM_REGION( 0x400000, "gfx", 0 )
3777		ROM_LOAD( "1_070119", 0x000000, 0x80000, CRC(fc399595) SHA1(037afd4a613cd58d4a28627b9e395d48c3fa866a) )
3778		ROM_LOAD( "2_070119", 0x100000, 0x80000, CRC(474b36e7) SHA1(e1e62acd4a706b2654fc1249850806b612fc1419) )
3779		ROM_LOAD( "3_070119", 0x200000, 0x80000, CRC(7f885e3d) SHA1(09bb4690e86ed4a29eef75ee4e5753ce40a164dd) )
3780		ROM_LOAD( "4_070119", 0x300000, 0x80000, CRC(a0fc654b) SHA1(3354bdb7aa372816a766b0d36408543de7d3482f) )
3781		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3782		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3783		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3784		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3897	ROM_LOAD( "keks.001", 0x000000, 0x80000, CRC(fc399595) SHA1(037afd4a613cd58d4a28627b9e395d48c3fa866a) )
	3898	ROM_LOAD( "keks.002", 0x100000, 0x80000, CRC(474b36e7) SHA1(e1e62acd4a706b2654fc1249850806b612fc1419) )
	3899	ROM_LOAD( "keks.003", 0x200000, 0x80000, CRC(7f885e3d) SHA1(09bb4690e86ed4a29eef75ee4e5753ce40a164dd) )
	3900	ROM_LOAD( "keks.004", 0x300000, 0x80000, CRC(a0fc654b) SHA1(3354bdb7aa372816a766b0d36408543de7d3482f) )
	3901	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3902	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3903	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3904	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3785	3905	ROM_END
3786	3906
3787	3907	ROM_START( keks_3b ) // 070119 bank F9
3788	3908	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3789		ROM_LOAD( "bootleg_ks070119b.rom", 0x00000, 0x40000, CRC(13fcf022) SHA1(885e5097e5cb5805f2172adc41f2f20d109b2d10) ) /* Not officially listed on Igrosoft's web site hash page */
	3909	ROM_LOAD( "bootleg_ks_070119b.rom", 0x00000, 0x40000, CRC(13fcf022) SHA1(885e5097e5cb5805f2172adc41f2f20d109b2d10) ) /* Not officially listed on Igrosoft's web site hash page */
3790	3910
3791	3911	ROM_REGION( 0x400000, "gfx", 0 )
3792		ROM_LOAD( "1_070119", 0x000000, 0x80000, CRC(fc399595) SHA1(037afd4a613cd58d4a28627b9e395d48c3fa866a) )
3793		ROM_LOAD( "2_070119", 0x100000, 0x80000, CRC(474b36e7) SHA1(e1e62acd4a706b2654fc1249850806b612fc1419) )
3794		ROM_LOAD( "3_070119", 0x200000, 0x80000, CRC(7f885e3d) SHA1(09bb4690e86ed4a29eef75ee4e5753ce40a164dd) )
3795		ROM_LOAD( "4_070119", 0x300000, 0x80000, CRC(a0fc654b) SHA1(3354bdb7aa372816a766b0d36408543de7d3482f) )
3796		ROM_LOAD( "5_060328", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
3797		ROM_LOAD( "6_060328", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
3798		ROM_LOAD( "7_060328", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
3799		ROM_LOAD( "8_060328", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
	3912	ROM_LOAD( "keks.001", 0x000000, 0x80000, CRC(fc399595) SHA1(037afd4a613cd58d4a28627b9e395d48c3fa866a) )
	3913	ROM_LOAD( "keks.002", 0x100000, 0x80000, CRC(474b36e7) SHA1(e1e62acd4a706b2654fc1249850806b612fc1419) )
	3914	ROM_LOAD( "keks.003", 0x200000, 0x80000, CRC(7f885e3d) SHA1(09bb4690e86ed4a29eef75ee4e5753ce40a164dd) )
	3915	ROM_LOAD( "keks.004", 0x300000, 0x80000, CRC(a0fc654b) SHA1(3354bdb7aa372816a766b0d36408543de7d3482f) )
	3916	ROM_LOAD( "keks_m.005", 0x080000, 0x80000, CRC(c5b09267) SHA1(7fd0988e63752fdbb31fde60b4726cfd63149622) )
	3917	ROM_LOAD( "keks_m.006", 0x180000, 0x80000, CRC(583da5fd) SHA1(645228db20cdaacb53bfc68731fd1a66a6a8cf56) )
	3918	ROM_LOAD( "keks_m.007", 0x280000, 0x80000, CRC(311c166a) SHA1(5f0ad8d755a6141964d818b98b3f156cbda8fb0d) )
	3919	ROM_LOAD( "keks_m.008", 0x380000, 0x80000, CRC(f69b0831) SHA1(75392349ef02a39cf883206938e2c615445065fc) )
3800	3920	ROM_END
3801	3921
	3922
	3923
3802	3924	ROM_START( gnomea ) // 070906 bank F9
3803	3925	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3804		ROM_LOAD( "bootleg_gn070906a.rom", 0x00000, 0x40000, CRC(5e7f1d53) SHA1(0548db91e8b1cd2f4f292095b4aad3b59cc25fb8) ) /* Not officially listed on Igrosoft's web site hash page */
	3926	ROM_LOAD( "bootleg_gn_070906a.rom", 0x00000, 0x40000, CRC(5e7f1d53) SHA1(0548db91e8b1cd2f4f292095b4aad3b59cc25fb8) ) /* Not officially listed on Igrosoft's web site hash page */
3805	3927
3806	3928	ROM_REGION( 0x400000, "gfx", 0 )
3807		ROM_LOAD( "1_070906", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
3808		ROM_LOAD( "2_070906", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
3809		ROM_LOAD( "3_070906", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
3810		ROM_LOAD( "4_070906", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
3811		ROM_LOAD( "5_070906", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
3812		ROM_LOAD( "6_070906", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
3813		ROM_LOAD( "7_070906", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
3814		ROM_LOAD( "8_070906", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
	3929	ROM_LOAD( "gnome.001", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
	3930	ROM_LOAD( "gnome.002", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
	3931	ROM_LOAD( "gnome.003", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
	3932	ROM_LOAD( "gnome.004", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
	3933	ROM_LOAD( "gnome.005", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
	3934	ROM_LOAD( "gnome.006", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
	3935	ROM_LOAD( "gnome.007", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
	3936	ROM_LOAD( "gnome.008", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
3815	3937	ROM_END
3816	3938
3817	3939	ROM_START( gnomeb ) // 070906 bank F9
3818	3940	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3819		ROM_LOAD( "bootleg_gn070906b.rom", 0x00000, 0x40000, CRC(0baeb2f7) SHA1(799576a1cf49681d81967678643c17dc0e09be78) ) /* Not officially listed on Igrosoft's web site hash page */
	3941	ROM_LOAD( "bootleg_gn_070906b.rom", 0x00000, 0x40000, CRC(0baeb2f7) SHA1(799576a1cf49681d81967678643c17dc0e09be78) ) /* Not officially listed on Igrosoft's web site hash page */
3820	3942
3821	3943	ROM_REGION( 0x400000, "gfx", 0 )
3822		ROM_LOAD( "1_070906", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
3823		ROM_LOAD( "2_070906", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
3824		ROM_LOAD( "3_070906", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
3825		ROM_LOAD( "4_070906", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
3826		ROM_LOAD( "5_070906", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
3827		ROM_LOAD( "6_070906", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
3828		ROM_LOAD( "7_070906", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
3829		ROM_LOAD( "8_070906", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
	3944	ROM_LOAD( "gnome.001", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
	3945	ROM_LOAD( "gnome.002", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
	3946	ROM_LOAD( "gnome.003", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
	3947	ROM_LOAD( "gnome.004", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
	3948	ROM_LOAD( "gnome.005", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
	3949	ROM_LOAD( "gnome.006", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
	3950	ROM_LOAD( "gnome.007", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
	3951	ROM_LOAD( "gnome.008", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
3830	3952	ROM_END
3831	3953
3832	3954	ROM_START( gnomec ) // 070906 bank F9
3833	3955	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3834		ROM_LOAD( "bootleg_gn070906c.rom", 0x00000, 0x40000, CRC(37b4a5e2) SHA1(baffba15c5ba0f139b74e3dedd1d68e14fc7b370) ) /* Not officially listed on Igrosoft's web site hash page */
	3956	ROM_LOAD( "bootleg_gn_070906c.rom", 0x00000, 0x40000, CRC(37b4a5e2) SHA1(baffba15c5ba0f139b74e3dedd1d68e14fc7b370) ) /* Not officially listed on Igrosoft's web site hash page */
3835	3957
3836	3958	ROM_REGION( 0x400000, "gfx", 0 )
3837		ROM_LOAD( "1_070906", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
3838		ROM_LOAD( "2_070906", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
3839		ROM_LOAD( "3_070906", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
3840		ROM_LOAD( "4_070906", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
3841		ROM_LOAD( "5_070906", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
3842		ROM_LOAD( "6_070906", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
3843		ROM_LOAD( "7_070906", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
3844		ROM_LOAD( "8_070906", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
	3959	ROM_LOAD( "gnome.001", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
	3960	ROM_LOAD( "gnome.002", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
	3961	ROM_LOAD( "gnome.003", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
	3962	ROM_LOAD( "gnome.004", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
	3963	ROM_LOAD( "gnome.005", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
	3964	ROM_LOAD( "gnome.006", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
	3965	ROM_LOAD( "gnome.007", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
	3966	ROM_LOAD( "gnome.008", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
3845	3967	ROM_END
3846	3968
3847	3969	ROM_START( gnomed ) // 070906 custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 GN01"
3848	3970	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3849		ROM_LOAD( "bootleg_gn070906d.rom", 0x00000, 0x40000, CRC(12682805) SHA1(58a5c365e56ce3d679fe88f2930471ac63549d85) ) /* Not officially listed on Igrosoft's web site hash page */
	3971	ROM_LOAD( "bootleg_gn_070906d.rom", 0x00000, 0x40000, CRC(12682805) SHA1(58a5c365e56ce3d679fe88f2930471ac63549d85) ) /* Not officially listed on Igrosoft's web site hash page */
3850	3972
3851	3973	ROM_REGION( 0x400000, "gfx", 0 )
3852	3974	ROM_LOAD( "bootleg_1a", 0x000000, 0x80000, CRC(55a8b1ba) SHA1(0b6c906435e260178292014a9e160a364bbcd6ad) )
r9812	r9813
3861	3983
3862	3984	ROM_START( gnomee ) // 070906 custom alteras, modified graphics, bank F9, many texts changed, changed version text to "LOTOS GN01"
3863	3985	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
3864		ROM_LOAD( "bootleg_gn070906e.rom", 0x00000, 0x40000, CRC(33fbae84) SHA1(4b8fde65042de38b24c77665b76782db4efccf0f) ) /* Not officially listed on Igrosoft's web site hash page */
	3986	ROM_LOAD( "bootleg_gn_070906e.rom", 0x00000, 0x40000, CRC(33fbae84) SHA1(4b8fde65042de38b24c77665b76782db4efccf0f) ) /* Not officially listed on Igrosoft's web site hash page */
3865	3987
3866	3988	ROM_REGION( 0x400000, "gfx", 0 )
3867	3989	ROM_LOAD( "bootleg_1b", 0x000000, 0x80000, CRC(414b537c) SHA1(65cc2a3bca8792387a83323f51b7345ee1be1125) )
r9812	r9813
3874	3996	ROM_LOAD( "bootleg_8a", 0x380000, 0x80000, CRC(658becb6) SHA1(7280ce53796326a48da8e461de8f78ea78a2f8c2) )
3875	3997	ROM_END
3876	3998
3877		GAME( 2002, mfish_3a, mfish_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Multi Fish (bootleg, 021124, banking address hack)", 0 ) // bank F9
3878		GAME( 2002, mfish_12a, mfish_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Multi Fish (bootleg, 040308, banking address hack)", 0 ) // bank F9
	3999	ROM_START( gnome_2a ) // 071115 bank F9
	4000	ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
	4001	ROM_LOAD( "bootleg_gn_071115a.rom", 0x00000, 0x40000, CRC(97e74228) SHA1(6b4d108c6c59ec335c14f0e5ab990cc8782ed236) ) /* Not officially listed on Igrosoft's web site hash page */
3879	4002
3880		GAME( 2003, crzmon_7a, crzmon_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Crazy Monkey (bootleg, 031110, backdoor set 1)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3881		GAME( 2003, crzmon_7b, crzmon_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Crazy Monkey (bootleg, 031110, backdoor set 2)", 0 ) // backdoor 1,5 5,5 1,7 3,2 3,3 3,4
3882		GAME( 2003, crzmon_8a, crzmon_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3883		GAME( 2003, crzmon_8b, crzmon_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, changed version text)", 0 ) // changed version text to 070315
3884		GAME( 2003, crzmon_8c, crzmon_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, VIDEO GAME-1 CM01)", 0 ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 CM01"
3885		GAME( 2003, crzmon_8d, crzmon_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, LOTTOGAME (I))", 0 ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3886		GAME( 2003, crzmon_8e, crzmon_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, LOTO PROGRAM V-CM2)", 0 ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-CM2"
3887		GAME( 2003, crzmon_8f, crzmon_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, LOTOS CM01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS CM01"
3888		GAME( 2003, crzmon_9a, crzmon_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Crazy Monkey (bootleg, 070315, VIDEO GAME-1 O01 set 1)", 0 ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 O01"
3889		GAME( 2003, crzmon_9b, crzmon_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Crazy Monkey (bootleg, 070315, VIDEO GAME-1 O01 set 2)", 0 ) // modified graphics, changed version text to "VIDEO GAME-1 O01" (crzmon_9a, decoded gfx)
3890		GAME( 2003, crzmon_9c, crzmon_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Crazy Monkey (bootleg, 070315, payout percentage 70)", 0 ) // payout percentage 70%
	4003	ROM_REGION( 0x400000, "gfx", 0 )
	4004	ROM_LOAD( "gnome.001", 0x000000, 0x80000, CRC(6ed866d7) SHA1(68d75d24d98e6d533cb26ceac0a680203cb26069) )
	4005	ROM_LOAD( "gnome.002", 0x100000, 0x80000, CRC(f6e5e6f0) SHA1(9751e8df87f14a252595547d24b8dd865ee4f08d) )
	4006	ROM_LOAD( "gnome.003", 0x200000, 0x80000, CRC(f8beb972) SHA1(3afbca8ce7e69d2dadae05f69205a6fd9036cf6a) )
	4007	ROM_LOAD( "gnome.004", 0x300000, 0x80000, CRC(83357c38) SHA1(45cd31c4f02f9d7b1888701c2146d1e7229b6cb5) )
	4008	ROM_LOAD( "gnome.005", 0x080000, 0x80000, CRC(687ad3e3) SHA1(23941a4f40c45029b9a43451f78b04c03c3cd7da) )
	4009	ROM_LOAD( "gnome.006", 0x180000, 0x80000, CRC(7ef2b88a) SHA1(7e7de60fc6791731d7cfd6a50e2bc5af1bf5e4b2) )
	4010	ROM_LOAD( "gnome.007", 0x280000, 0x80000, CRC(71976bdf) SHA1(c44dbfa75a0f12893b3177907fc93b3d5e8ad390) )
	4011	ROM_LOAD( "gnome.008", 0x380000, 0x80000, CRC(c86a1586) SHA1(e622bca8dc618ca8edc1a7daa9c8286383caebef) )
	4012	ROM_END
3891	4013
3892		GAME( 2003, fcockt_6a, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 040216, banking address hack)", 0 ) // bank F8
3893		GAME( 2003, fcockt_6b, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 040216, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3894		GAME( 2003, fcockt_6c, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 040216, LotoRossy+)", 0 ) // modified graphics, some code changes, description says "for Lat-02 terminals", older set
3895		GAME( 2003, fcockt_6d, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 040216, VIDEO GAME-1 FR01)", 0 ) // modified graphics, some code changes, changed version text to "VIDEO GAME-1 FR01", description says "for Lat-02 terminals", newer set
3896		GAME( 2003, fcockt_7a, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3897		GAME( 2003, fcockt_7b, fcockt_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, VIDEO GAME-1 FR01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 FR01"
3898		GAME( 2003, fcockt_7c, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, payout percentage 40)", 0 ) // payout percentage 40%
3899		GAME( 2003, fcockt_7d, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, payout percentage 60)", 0 ) // payout percentage 60%
3900		GAME( 2003, fcockt_7e, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, payout percentage 70)", 0 ) // payout percentage 70%
3901		GAME( 2003, fcockt_7f, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, changed version text)", 0 ) // changed version text to 070305
3902		GAME( 2003, fcockt_7g, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, LOTO PROGRAM V-FC2)", 0 ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-FC2"
3903		GAME( 2003, fcockt_7h, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, LOTOS FR01)", 0 ) // modified graphics, many texts changed, changed version text to "LOTOS FR01"
3904		GAME( 2003, fcockt_8a, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 060111, LOTO COCKTAIL V01-0001)", 0 ) // modified graphics, many texts changed, changed version text to "LOTO COCKTAIL V01-0001"
3905		GAME( 2003, fcockt_8b, fcockt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Fruit Cocktail (bootleg, 060111, LOTTOGAME (I))", 0 ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3906	4014
3907		GAME( 2003, lhaunt_4a, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Lucky Haunter (bootleg, 031111, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3908		GAME( 2003, lhaunt_5a, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Lucky Haunter (bootleg, 040216, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3909		GAME( 2003, lhaunt_6a, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, backdoor)", 0 ) // backdoor 1,5 9,1 5,1 1,5 3,3 3,4
3910		GAME( 2003, lhaunt_6b, lhaunt_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, VIDEO GAME-1 PB01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 PB01"
3911		GAME( 2003, lhaunt_6c, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, changed version text)", 0 ) // changed version text to 070604
3912		GAME( 2003, lhaunt_6d, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, LOTTOGAME (I))", 0 ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3913		GAME( 2003, lhaunt_6e, lhaunt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, LOTO PROGRAM V-LH2)", 0 ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-LH2"
3914		GAME( 2003, lhaunt_6f, lhaunt_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, LOTOS PB01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS PB01"
3915	4015
3916		GAME( 2004, garage_4a, garage_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Garage (bootleg, 040219, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3917		GAME( 2004, garage_4b, garage_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Garage (bootleg, 040219, changed version text)", 0 ) // changed version text to 070329
3918		GAME( 2004, garage_4c, garage_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Garage (bootleg, 040219, LOTO PROGRAM V-GG2)", 0 ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-GG2"
3919		GAME( 2004, garage_5a, garage_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Garage (bootleg, 050311, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3920		GAME( 2004, garage_5b, garage_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Garage (bootleg, 050311, VIDEO GAME-1 GA01)", 0 ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 GA01"
3921		GAME( 2004, garage_5c, garage_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Garage (bootleg, 050311, payout percentage 70)", 0 ) // payout percentage 70%
3922		GAME( 2004, garage_5d, garage_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Garage (bootleg, 050311, LOTTOGAME (I))", 0 ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3923		GAME( 2004, garage_5e, garage_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Garage (bootleg, 050311, LOTOS GA01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS GA01"
3924	4016
3925		GAME( 2004, rclimb_3a, rclimb_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Rock Climber (bootleg, 040827, backdoor)", 0 ) // backdoor 1,5 9,1 5,1 1,5 3,3 3,4
3926		GAME( 2004, rclimb_3b, rclimb_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Rock Climber (bootleg, 040827, new service menu)", 0 ) // new service menu
3927		GAME( 2004, rclimb_3c, rclimb_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Rock Climber (bootleg, 040827, VIDEO GAME-1 SK01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 SK01"
3928		GAME( 2004, rclimb_3d, rclimb_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Rock Climber (bootleg, 040827, LOTTOGAME (I))", 0 ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3929		GAME( 2004, rclimb_3e, rclimb_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Rock Climber (bootleg, 040827, LOTOS SK01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS SK01"
	4017	GAME( 2002, mfish_3a, mfish_parent, multfish, multfish, 0, ROT0, "bootleg", "Multi Fish (bootleg, 021124, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F9
	4018	GAME( 2002, mfish_12a, mfish_parent, multfish, multfish, 0, ROT0, "bootleg", "Multi Fish (bootleg, 040308, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F9
3930	4019
3931		GAME( 2004, sweetla, sweetl_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Sweet Life (bootleg, 041220, backdoor)", 0 ) // backdoor 1,5 9,1 5,3 1,5 3,3 3,4
3932		GAME( 2004, sweetlb, sweetl_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Sweet Life (bootleg, 041220, banking address hack, changed version text)", 0 ) // bank F9, changed version text to 070412
	4020	GAME( 2003, crzmon_7a, crzmon_parent, multfish, multfish, 0, ROT0, "bootleg", "Crazy Monkey (bootleg, 031110, backdoor set 1)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4021	GAME( 2003, crzmon_7b, crzmon_parent, multfish, multfish, 0, ROT0, "bootleg", "Crazy Monkey (bootleg, 031110, backdoor set 2)", GAME_SUPPORTS_SAVE ) // backdoor 1,5 5,5 1,7 3,2 3,3 3,4
	4022	GAME( 2003, crzmon_8a, crzmon_parent, multfish, multfish, 0, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4023	GAME( 2003, crzmon_8b, crzmon_parent, multfish, multfish, 0, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, changed version text)", GAME_SUPPORTS_SAVE ) // changed version text to 070315
	4024	GAME( 2003, crzmon_8c, crzmon_parent, multfish, multfish, customl, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, VIDEO GAME-1 CM01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 CM01"
	4025	GAME( 2003, crzmon_8d, crzmon_parent, multfish, multfish, 0, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
	4026	GAME( 2003, crzmon_8e, crzmon_parent, multfish, multfish, 0, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, LOTO PROGRAM V-CM2)", GAME_SUPPORTS_SAVE ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-CM2"
	4027	GAME( 2003, crzmon_8f, crzmon_parent, multfish, multfish, customl, ROT0, "bootleg", "Crazy Monkey (bootleg, 050120, LOTOS CM01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS CM01"
	4028	GAME( 2003, crzmon_9a, crzmon_parent, multfish, multfish, customl, ROT0, "bootleg", "Crazy Monkey (bootleg, 070315, VIDEO GAME-1 O01 set 1)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 O01"
	4029	GAME( 2003, crzmon_9b, crzmon_parent, multfish, multfish, 0, ROT0, "bootleg", "Crazy Monkey (bootleg, 070315, VIDEO GAME-1 O01 set 2)", GAME_SUPPORTS_SAVE ) // modified graphics, changed version text to "VIDEO GAME-1 O01" (crzmon_9a, decoded gfx)
	4030	GAME( 2003, crzmon_9c, crzmon_parent, multfish, multfish, 0, ROT0, "bootleg", "Crazy Monkey (bootleg, 070315, payout percentage 70)", GAME_SUPPORTS_SAVE ) // payout percentage 70%
3933	4031
3934		GAME( 2004, resdnt_2a, resdnt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Resident (bootleg, 040513, backdoor)", 0 ) // backdoor 1,5 9,1 5,1 1,5 3,3 3,4
3935		GAME( 2004, resdnt_2b, resdnt_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Resident (bootleg, 040513, VIDEO GAME-1 SE01 set 1)", 0 ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 SE01"
3936		GAME( 2004, resdnt_2c, resdnt_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Resident (bootleg, 040513, VIDEO GAME-1 SE01 set 2)", 0 ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 SE01"
3937		GAME( 2004, resdnt_2d, resdnt_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Resident (bootleg, 040513, VIDEO GAME-1 SE01 set 3)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 SE01"
3938		GAME( 2004, resdnt_2e, resdnt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Resident (bootleg, 040513, LOTTOGAME (I))", 0 ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3939		GAME( 2004, resdnt_2f, resdnt_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Resident (bootleg, 040513, LOTO PROGRAM V-RS2)", 0 ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-RS2"
3940		GAME( 2004, resdnt_2g, resdnt_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Resident (bootleg, 040513, LOTOS SE01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS SE01"
	4032	GAME( 2003, fcockt_6a, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 040216, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F8
	4033	GAME( 2003, fcockt_6b, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 040216, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4034	GAME( 2003, fcockt_6c, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 040216, LotoRossy+)", GAME_SUPPORTS_SAVE ) // modified graphics, some code changes, description says "for Lat-02 terminals", older set
	4035	GAME( 2003, fcockt_6d, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 040216, VIDEO GAME-1 FR01)", GAME_SUPPORTS_SAVE ) // modified graphics, some code changes, changed version text to "VIDEO GAME-1 FR01", description says "for Lat-02 terminals", newer set
	4036	GAME( 2003, fcockt_7a, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4037	GAME( 2003, fcockt_7b, fcockt_parent, multfish, multfish, customl, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, VIDEO GAME-1 FR01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 FR01"
	4038	GAME( 2003, fcockt_7c, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, payout percentage 40)", GAME_SUPPORTS_SAVE ) // payout percentage 40%
	4039	GAME( 2003, fcockt_7d, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, payout percentage 60)", GAME_SUPPORTS_SAVE ) // payout percentage 60%
	4040	GAME( 2003, fcockt_7e, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, payout percentage 70)", GAME_SUPPORTS_SAVE ) // payout percentage 70%
	4041	GAME( 2003, fcockt_7f, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, changed version text)", GAME_SUPPORTS_SAVE ) // changed version text to 070305
	4042	GAME( 2003, fcockt_7g, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, LOTO PROGRAM V-FC2)", GAME_SUPPORTS_SAVE ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-FC2"
	4043	GAME( 2003, fcockt_7h, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 050118, LOTOS FR01)", GAME_SUPPORTS_SAVE ) // modified graphics, many texts changed, changed version text to "LOTOS FR01"
	4044	GAME( 2003, fcockt_8a, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 060111, LOTO COCKTAIL V01-0001)", GAME_SUPPORTS_SAVE ) // modified graphics, many texts changed, changed version text to "LOTO COCKTAIL V01-0001"
	4045	GAME( 2003, fcockt_8b, fcockt_parent, multfish, multfish, 0, ROT0, "bootleg", "Fruit Cocktail (bootleg, 060111, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3941	4046
3942		GAME( 2005, islanda, island_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Island (bootleg, 050713, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3943		GAME( 2005, islandb, island_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Island (bootleg, 050713, VIDEO GAME-1 OS01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 OS01"
3944		GAME( 2005, islandc, island_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Island (bootleg, 050713, LOTOS OS01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS OS01"
	4047	GAME( 2003, lhaunt_4a, lhaunt_parent, multfish, multfish, 0, ROT0, "bootleg", "Lucky Haunter (bootleg, 031111, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4048	GAME( 2003, lhaunt_5a, lhaunt_parent, multfish, multfish, 0, ROT0, "bootleg", "Lucky Haunter (bootleg, 040216, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4049	GAME( 2003, lhaunt_6a, lhaunt_parent, multfish, multfish, 0, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,5 9,1 5,1 1,5 3,3 3,4
	4050	GAME( 2003, lhaunt_6b, lhaunt_parent, multfish, multfish, customl, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, VIDEO GAME-1 PB01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 PB01"
	4051	GAME( 2003, lhaunt_6c, lhaunt_parent, multfish, multfish, 0, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, changed version text)", GAME_SUPPORTS_SAVE ) // changed version text to 070604
	4052	GAME( 2003, lhaunt_6d, lhaunt_parent, multfish, multfish, 0, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
	4053	GAME( 2003, lhaunt_6e, lhaunt_parent, multfish, multfish, 0, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, LOTO PROGRAM V-LH2)", GAME_SUPPORTS_SAVE ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-LH2"
	4054	GAME( 2003, lhaunt_6f, lhaunt_parent, multfish, multfish, customl, ROT0, "bootleg", "Lucky Haunter (bootleg, 040825, LOTOS PB01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS PB01"
3945	4055
3946		GAME( 2006, island2a, island2_parent, island2a, multfish, igrosoft, ROT0, "bootleg", "Island 2 (bootleg, 060529, banking address hack)", 0 ) // bank F9 (not standart, game not work)
3947		GAME( 2006, island2b, island2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Island 2 (bootleg, 060529, banking address hack, changed version text)", 0 ) // bank F9, changed version text to 070205, skip some start tests
3948		GAME( 2006, island2c, island2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Island 2 (bootleg, 060529, LOTTOGAME (I))", 0 ) // bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3949		GAME( 2006, island2_3a, island2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Island 2 (bootleg, 061218, VIDEO GAME-1 OS2-01)", 0 ) // bank F9, modified graphics, changed version text to "VIDEO GAME-1 OS2-01"
3950		GAME( 2006, island2_4a, island2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Island 2 (bootleg, 070205, banking address hack)", 0 ) // bank F9
	4056	GAME( 2004, garage_4a, garage_parent, multfish, multfish, 0, ROT0, "bootleg", "Garage (bootleg, 040219, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4057	GAME( 2004, garage_4b, garage_parent, multfish, multfish, 0, ROT0, "bootleg", "Garage (bootleg, 040219, changed version text)", GAME_SUPPORTS_SAVE ) // changed version text to 070329
	4058	GAME( 2004, garage_4c, garage_parent, multfish, multfish, 0, ROT0, "bootleg", "Garage (bootleg, 040219, LOTO PROGRAM V-GG2)", GAME_SUPPORTS_SAVE ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-GG2"
	4059	GAME( 2004, garage_5a, garage_parent, multfish, multfish, 0, ROT0, "bootleg", "Garage (bootleg, 050311, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4060	GAME( 2004, garage_5b, garage_parent, multfish, multfish, customl, ROT0, "bootleg", "Garage (bootleg, 050311, VIDEO GAME-1 GA01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 GA01"
	4061	GAME( 2004, garage_5c, garage_parent, multfish, multfish, 0, ROT0, "bootleg", "Garage (bootleg, 050311, payout percentage 70)", GAME_SUPPORTS_SAVE ) // payout percentage 70%
	4062	GAME( 2004, garage_5d, garage_parent, multfish, multfish, 0, ROT0, "bootleg", "Garage (bootleg, 050311, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
	4063	GAME( 2004, garage_5e, garage_parent, multfish, multfish, customl, ROT0, "bootleg", "Garage (bootleg, 050311, LOTOS GA01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS GA01"
3951	4064
3952		GAME( 2006, pirate2a, pirate2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack set 1)", 0 ) // bank F9
3953		GAME( 2006, pirate2b, pirate2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack set 2)", 0 ) // bank F9, skip raster beam position check
3954		GAME( 2006, pirate2c, pirate2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack, changed version text set 1)", 0 ) // bank F9, changed version text to 070126
3955		GAME( 2006, pirate2d, pirate2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack, changed version text set 2)", 0 ) // bank F9, changed version text to 070126
3956		GAME( 2006, pirate2e, pirate2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack, changed version text set 3)", 0 ) // bank F9, changed version text to 070126, skip some start tests
3957		GAME( 2006, pirate2f, pirate2_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, VIDEO GAME-1 PR01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 PR01"
3958		GAME( 2006, pirate2g, pirate2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, LOTTOGAME (I))", 0 ) // bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3959		GAME( 2006, pirate2h, pirate2_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, LOTOS PR01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS PR01"
3960		GAME( 2006, pirate2_2a, pirate2_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Pirate 2 (bootleg, 070126, banking address hack)", 0 ) // bank F9
	4065	GAME( 2004, rclimb_3a, rclimb_parent, multfish, multfish, 0, ROT0, "bootleg", "Rock Climber (bootleg, 040827, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,5 9,1 5,1 1,5 3,3 3,4
	4066	GAME( 2004, rclimb_3b, rclimb_parent, multfish, multfish, 0, ROT0, "bootleg", "Rock Climber (bootleg, 040827, new service menu)", GAME_SUPPORTS_SAVE ) // new service menu
	4067	GAME( 2004, rclimb_3c, rclimb_parent, multfish, multfish, customl, ROT0, "bootleg", "Rock Climber (bootleg, 040827, VIDEO GAME-1 SK01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 SK01"
	4068	GAME( 2004, rclimb_3d, rclimb_parent, multfish, multfish, 0, ROT0, "bootleg", "Rock Climber (bootleg, 040827, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
	4069	GAME( 2004, rclimb_3e, rclimb_parent, multfish, multfish, customl, ROT0, "bootleg", "Rock Climber (bootleg, 040827, LOTOS SK01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS SK01"
3961	4070
3962		GAME( 2006, keksa, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 060328, banking address hack)", 0 ) // bank F9
3963		GAME( 2006, keksb, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 060328, backdoor)", 0 ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
3964		GAME( 2006, keksc, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 060328, banking address hack, changed version text)", 0 ) // bank F9, changed version text to 070119
3965		GAME( 2006, keks_2a, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 060403, banking address hack)", 0 ) // bank F9
3966		GAME( 2006, keks_2b, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 060403, banking address hack, changed version text)", 0 ) // bank F9, changed version text to 070119
3967		GAME( 2006, keks_2c, keks_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Keks (bootleg, 060403, VIDEO GAME-1 KS01 set 1)", 0 ) // custom alteras, modified graphics, bank F9, changed version text to "VIDEO GAME-1 KS01"
3968		GAME( 2006, keks_2d, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 060403, VIDEO GAME-1 KS01 set 2)", 0 ) // modified graphics, bank F9, changed version text to "VIDEO GAME-1 KS01" (keks_2c, decoded gfx)
3969		GAME( 2006, keks_2e, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 060403, banking address hack, payout percentage 60)", 0 ) // bank F9, payout percentage 60%
3970		GAME( 2006, keks_2f, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 060403, LOTTOGAME (I))", 0 ) // bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
3971		GAME( 2006, keks_2g, keks_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Keks (bootleg, 060403, LOTOS KS01)", 0 ) // custom alteras, modified graphics, bank F9, many texts changed, changed version text to "LOTOS KS01"
3972		GAME( 2006, keks_3a, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 070119, banking address hack set 1)", 0 ) // bank F9
3973		GAME( 2006, keks_3b, keks_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Keks (bootleg, 070119, banking address hack set 2)", 0 ) // bank F9
	4071	GAME( 2004, sweetla, sweetl_parent, multfish, multfish, 0, ROT0, "bootleg", "Sweet Life (bootleg, 041220, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,5 9,1 5,3 1,5 3,3 3,4
	4072	GAME( 2004, sweetlb, sweetl_parent, multfish, multfish, 0, ROT0, "bootleg", "Sweet Life (bootleg, 041220, banking address hack, changed version text)", GAME_SUPPORTS_SAVE ) // bank F9, changed version text to 070412
3974	4073
3975		GAME( 2007, gnomea, gnome_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Gnome (bootleg, 070906, banking address hack set 1)", 0 ) // bank F9
3976		GAME( 2007, gnomeb, gnome_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Gnome (bootleg, 070906, banking address hack set 2)", 0 ) // bank F9
3977		GAME( 2007, gnomec, gnome_parent, multfish, multfish, igrosoft, ROT0, "bootleg", "Gnome (bootleg, 070906, banking address hack set 3)", 0 ) // bank F9
3978		GAME( 2007, gnomed, gnome_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Gnome (bootleg, 070906, VIDEO GAME-1 GN01)", 0 ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 GN01"
3979		GAME( 2007, gnomee, gnome_parent, multfish, multfish, custom_altera, ROT0, "bootleg", "Gnome (bootleg, 070906, LOTOS GN01)", 0 ) // custom alteras, modified graphics, bank F9, many texts changed, changed version text to "LOTOS GN01"
	4074	GAME( 2004, resdnt_2a, resdnt_parent, multfish, multfish, 0, ROT0, "bootleg", "Resident (bootleg, 040513, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,5 9,1 5,1 1,5 3,3 3,4
	4075	GAME( 2004, resdnt_2b, resdnt_parent, multfish, multfish, customl, ROT0, "bootleg", "Resident (bootleg, 040513, VIDEO GAME-1 SE01 set 1)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 SE01"
	4076	GAME( 2004, resdnt_2c, resdnt_parent, multfish, multfish, customl, ROT0, "bootleg", "Resident (bootleg, 040513, VIDEO GAME-1 SE01 set 2)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, changed version text to "VIDEO GAME-1 SE01"
	4077	GAME( 2004, resdnt_2d, resdnt_parent, multfish, multfish, customl, ROT0, "bootleg", "Resident (bootleg, 040513, VIDEO GAME-1 SE01 set 3)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 SE01"
	4078	GAME( 2004, resdnt_2e, resdnt_parent, multfish, multfish, 0, ROT0, "bootleg", "Resident (bootleg, 040513, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
	4079	GAME( 2004, resdnt_2f, resdnt_parent, multfish, multfish, 0, ROT0, "bootleg", "Resident (bootleg, 040513, LOTO PROGRAM V-RS2)", GAME_SUPPORTS_SAVE ) // modified graphics, many texts changed, changed version text to "LOTO PROGRAM V-RS2"
	4080	GAME( 2004, resdnt_2g, resdnt_parent, multfish, multfish, customl, ROT0, "bootleg", "Resident (bootleg, 040513, LOTOS SE01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS SE01"
	4081
	4082	GAME( 2005, islanda, island_parent, multfish, multfish, 0, ROT0, "bootleg", "Island (bootleg, 050713, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4083	GAME( 2005, islandb, island_parent, multfish, multfish, customl, ROT0, "bootleg", "Island (bootleg, 050713, VIDEO GAME-1 OS01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 OS01"
	4084	GAME( 2005, islandc, island_parent, multfish, multfish, customl, ROT0, "bootleg", "Island (bootleg, 050713, LOTOS OS01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS OS01"
	4085
	4086	GAME( 2006, island2a, island2_parent, island2a, multfish, 0, ROT0, "bootleg", "Island 2 (bootleg, 060529, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F9 (not standart, game not work)
	4087	GAME( 2006, island2b, island2_parent, multfish, multfish, 0, ROT0, "bootleg", "Island 2 (bootleg, 060529, banking address hack, changed version text)", GAME_SUPPORTS_SAVE ) // bank F9, changed version text to 070205, skip some start tests
	4088	GAME( 2006, island2c, island2_parent, multfish, multfish, 0, ROT0, "bootleg", "Island 2 (bootleg, 060529, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
	4089	GAME( 2006, island2_3a, island2_parent, multfish, multfish, 0, ROT0, "bootleg", "Island 2 (bootleg, 061218, VIDEO GAME-1 OS2-01)", GAME_SUPPORTS_SAVE ) // bank F9, modified graphics, changed version text to "VIDEO GAME-1 OS2-01"
	4090	GAME( 2006, island2_4a, island2_parent, multfish, multfish, 0, ROT0, "bootleg", "Island 2 (bootleg, 070205, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F9
	4091
	4092	GAME( 2006, pirate2a, pirate2_parent, multfish, multfish, 0, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack set 1)", GAME_SUPPORTS_SAVE ) // bank F9
	4093	GAME( 2006, pirate2b, pirate2_parent, multfish, multfish, 0, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack set 2)", GAME_SUPPORTS_SAVE ) // bank F9, skip raster beam position check
	4094	GAME( 2006, pirate2c, pirate2_parent, multfish, multfish, 0, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack, changed version text set 1)", GAME_SUPPORTS_SAVE ) // bank F9, changed version text to 070126
	4095	GAME( 2006, pirate2d, pirate2_parent, multfish, multfish, 0, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack, changed version text set 2)", GAME_SUPPORTS_SAVE ) // bank F9, changed version text to 070126
	4096	GAME( 2006, pirate2e, pirate2_parent, multfish, multfish, 0, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, banking address hack, changed version text set 3)", GAME_SUPPORTS_SAVE ) // bank F9, changed version text to 070126, skip some start tests
	4097	GAME( 2006, pirate2f, pirate2_parent, multfish, multfish, customl, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, VIDEO GAME-1 PR01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 PR01"
	4098	GAME( 2006, pirate2g, pirate2_parent, multfish, multfish, 0, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
	4099	GAME( 2006, pirate2h, pirate2_parent, multfish, multfish, customl, ROT0, "bootleg", "Pirate 2 (bootleg, 061005, LOTOS PR01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "LOTOS PR01"
	4100	GAME( 2006, pirate2_2a, pirate2_parent, multfish, multfish, 0, ROT0, "bootleg", "Pirate 2 (bootleg, 070126, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F9
	4101
	4102	GAME( 2006, keksa, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 060328, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F9
	4103	GAME( 2006, keksb, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 060328, backdoor)", GAME_SUPPORTS_SAVE ) // backdoor 1,1 1,3 1,5 1,7 3,3 3,4
	4104	GAME( 2006, keksc, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 060328, banking address hack, changed version text)", GAME_SUPPORTS_SAVE ) // bank F9, changed version text to 070119
	4105	GAME( 2006, keks_2a, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 060403, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F9
	4106	GAME( 2006, keks_2b, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 060403, banking address hack, changed version text)", GAME_SUPPORTS_SAVE ) // bank F9, changed version text to 070119
	4107	GAME( 2006, keks_2c, keks_parent, multfish, multfish, customl, ROT0, "bootleg", "Keks (bootleg, 060403, VIDEO GAME-1 KS01 set 1)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, bank F9, changed version text to "VIDEO GAME-1 KS01"
	4108	GAME( 2006, keks_2d, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 060403, VIDEO GAME-1 KS01 set 2)", GAME_SUPPORTS_SAVE ) // modified graphics, bank F9, changed version text to "VIDEO GAME-1 KS01" (keks_2c, decoded gfx)
	4109	GAME( 2006, keks_2e, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 060403, banking address hack, payout percentage 60)", GAME_SUPPORTS_SAVE ) // bank F9, payout percentage 60%
	4110	GAME( 2006, keks_2f, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 060403, LOTTOGAME (I))", GAME_SUPPORTS_SAVE ) // bank F9, modified graphics, changed version text to "MDS_is_the_best_ LOTTOGAME (I)"
	4111	GAME( 2006, keks_2g, keks_parent, multfish, multfish, customl, ROT0, "bootleg", "Keks (bootleg, 060403, LOTOS KS01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, bank F9, many texts changed, changed version text to "LOTOS KS01"
	4112	GAME( 2006, keks_3a, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 070119, banking address hack set 1)", GAME_SUPPORTS_SAVE ) // bank F9
	4113	GAME( 2006, keks_3b, keks_parent, multfish, multfish, 0, ROT0, "bootleg", "Keks (bootleg, 070119, banking address hack set 2)", GAME_SUPPORTS_SAVE ) // bank F9
	4114
	4115	GAME( 2007, gnomea, gnome_parent, multfish, multfish, 0, ROT0, "bootleg", "Gnome (bootleg, 070906, banking address hack set 1)", GAME_SUPPORTS_SAVE ) // bank F9
	4116	GAME( 2007, gnomeb, gnome_parent, multfish, multfish, 0, ROT0, "bootleg", "Gnome (bootleg, 070906, banking address hack set 2)", GAME_SUPPORTS_SAVE ) // bank F9
	4117	GAME( 2007, gnomec, gnome_parent, multfish, multfish, 0, ROT0, "bootleg", "Gnome (bootleg, 070906, banking address hack set 3)", GAME_SUPPORTS_SAVE ) // bank F9
	4118	GAME( 2007, gnomed, gnome_parent, multfish, multfish, customl, ROT0, "bootleg", "Gnome (bootleg, 070906, VIDEO GAME-1 GN01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, many texts changed, changed version text to "VIDEO GAME-1 GN01"
	4119	GAME( 2007, gnomee, gnome_parent, multfish, multfish, customl, ROT0, "bootleg", "Gnome (bootleg, 070906, LOTOS GN01)", GAME_SUPPORTS_SAVE ) // custom alteras, modified graphics, bank F9, many texts changed, changed version text to "LOTOS GN01"
	4120	GAME( 2007, gnome_2a, gnome_parent, multfish, multfish, 0, ROT0, "bootleg", "Gnome (bootleg, 071115, banking address hack)", GAME_SUPPORTS_SAVE ) // bank F9
	4121

src/mame/drivers/galpani2.c
r9812	r9813
577	577	static MACHINE_CONFIG_START( galpani2, driver_device )
578	578
579	579	/* basic machine hardware */
580		MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
	580	MDRV_CPU_ADD("maincpu", M68000, XTAL_27MHz/2) /* Confirmed on galpani2i PCB */
581	581	MDRV_CPU_PROGRAM_MAP(galpani2_mem1)
582	582	MDRV_CPU_VBLANK_INT_HACK(galpani2_interrupt1,GALPANI2_INTERRUPTS_NUM)
583	583	//MDRV_QUANTUM_PERFECT_CPU("maincpu")
584	584
585		MDRV_CPU_ADD("sub", M68000, XTAL_16MHz)
	585	MDRV_CPU_ADD("sub", M68000, XTAL_27MHz/2) /* Confirmed on galpani2i PCB */
586	586	MDRV_CPU_PROGRAM_MAP(galpani2_mem2)
587	587	MDRV_CPU_VBLANK_INT_HACK(galpani2_interrupt2,GALPANI2_INTERRUPTS_NUM2)
588	588
r9812	r9813
607	607	/* sound hardware */
608	608	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
609	609
610		MDRV_OKIM6295_ADD("oki1", XTAL_16MHz/8, OKIM6295_PIN7_~~LOW~~) // clock fre~~que~~ncy & pin ~~7 not ver~~ified
	610	MDRV_OKIM6295_ADD("oki1", XTAL_20MHz/10, OKIM6295_PIN7_HIGH) /* Confirmed on galpani2i PCB */
611	611	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
612	612
613		MDRV_OKIM6295_ADD("oki2", XTAL_16MHz/8, OKIM6295_PIN7_~~LOW~~) // clock fre~~que~~ncy & pin ~~7 not ver~~ified
	613	MDRV_OKIM6295_ADD("oki2", XTAL_20MHz/10, OKIM6295_PIN7_HIGH) /* Confirmed on galpani2i PCB */
614	614	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
615	615	MACHINE_CONFIG_END
616	616
r9812	r9813
626	626	//POST's displayed checksums (ROM $0-$FFFFF) or (ROM $0-$FFFFF even)/(ROM $1-$FFFFF odd)
627	627	//
628	628	//galpani2 = 6A6C bkg layer offset
629		//galpan2g = 15A3 bkg layer offset
630		//galpan2t = 18A3 bkg layer offset
631		//galpan2j = 08E1 / A582 bkg layer OK has demo
	629	//galpani2g= 15A3 bkg layer offset
	630	//galpani2i= 54FC bkg layer offset
	631	//galpani2t= 18A3 bkg layer offset
	632	//galpani2j= 08E1 / A582 bkg layer OK has demo
632	633	//gp2quiz = 78D6 / 84A0 bkg layer OK has demo
633	634	//gp2se = 6D8C / FCE4 (Japan) bkg layer unknown
634	635
r9812	r9813
733	734	ROM_CONTINUE( 0x200000, 0x080000 )
734	735	ROM_END
735	736
	737	// from Single board PCB
	738	ROM_START( galpani2i )
	739	ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */
	740	ROM_LOAD16_BYTE( "g000i1u165", 0x000000, 0x080000, CRC(b802ad64) SHA1(a0bef1f037a72c379f43ff6d22e441d988b68fcc) )
	741	ROM_LOAD16_BYTE( "g001i1u164", 0x000001, 0x080000, CRC(d342fe5c) SHA1(7add3488d1e8eaec9e1f5cc47e4e7147822923bc) )
	742
	743	ROM_REGION( 0x40000, "sub", 0 ) /* CPU#2 Code */
	744	ROM_LOAD16_BYTE( "g002a2.u64-1", 0x000000, 0x020000, CRC(c0b94eaf) SHA1(4f3a65b238b31ee8d256b7025253f01eaf6e55d5) )
	745	ROM_LOAD16_BYTE( "g003a2.u63-1", 0x000001, 0x020000, CRC(0d30725d) SHA1(d4614f9ffb930c4ea36cb3fbacffe63060e92402) )
	746
	747	ROM_REGION16_BE( 0x2000000, "user1", 0 ) /* Backgrounds (CPU2) */
	748	ROM_LOAD( "gp2-300a.052", 0x0000000, 0x100000, CRC(09ebedba) SHA1(3c06614633f0da03facb5199deac492b8ce07257) )
	749	ROM_LOAD( "gp2-300b.053", 0x0100000, 0x100000, CRC(d7d12920) SHA1(4b6e01cc0ac5192758f4b3d26f102905b2b5e8ac) )
	750	ROM_LOAD( "gp2-301.035", 0x0200000, 0x200000, CRC(e71e749d) SHA1(420c4c085e89d9641a84e34fa870df2bc02165b6) )
	751	ROM_LOAD( "gp2-302.036", 0x0400000, 0x200000, CRC(832ebbb0) SHA1(a753285d874fcab979e70d6a289cf9fcd48affc6) )
	752	ROM_LOAD( "gp2-303.037", 0x0600000, 0x200000, CRC(36c872d0) SHA1(e0aa3089dfa1765ba70ce60e8696b1ba87c95703) )
	753	ROM_LOAD( "gp2-304.038", 0x0800000, 0x200000, CRC(7200f918) SHA1(6d23bd371b32319fdd08923deb81278b36b9cd79) )
	754	ROM_LOAD( "gp2-305.039", 0x0a00000, 0x200000, CRC(a308dc4b) SHA1(db40329c383c765471941ab89fded6b8789d29c7) )
	755	ROM_LOAD( "gp2-306.040", 0x0c00000, 0x200000, CRC(cd294225) SHA1(c51c95d5edd5e5d7191ccbfa1ba2e92199bb04b9) )
	756	ROM_LOAD( "gp2-307.041", 0x0e00000, 0x200000, CRC(0fda01af) SHA1(ca30d995ff8d83b46c05898a2ecde3f08a95c788) )
	757	ROM_LOAD( "gp2-308.042", 0x1000000, 0x200000, CRC(3c806376) SHA1(5c440a0cfd5d5c07ff074bc0c2563956d256a80e) )
	758	ROM_LOAD16_BYTE( "gp2-309a.050", 0x1200000, 0x100000, CRC(2c025ec3) SHA1(bc25ad92415e662d6b0f845aa4621a733fbf5a48) )
	759	ROM_LOAD16_BYTE( "gp2-309b.051", 0x1200001, 0x100000, CRC(e8bf1730) SHA1(0d9a446aecc19a43368550348745c9b167ec4941) )
	760	ROM_LOAD( "gp2-310a.055", 0x1400000, 0x100000, CRC(01eca246) SHA1(19cb35d7873b84486f9105127a1e3cf3235d3109) )
	761
	762	ROM_REGION( 0x480000, "gfx1", 0 ) /* Sprites */
	763	ROM_LOAD( "gp2-200.046", 0x080000, 0x080000, CRC(11b49470) SHA1(d11c2374a7c9b9b0d1f27c29759b16630700561d) )
	764	ROM_CONTINUE( 0x000000, 0x080000 )
	765	ROM_LOAD( "gp2-201.047", 0x180000, 0x080000, CRC(2f6392b4) SHA1(67446974c00481a7a806f4bc5b10eb6e442a1186) )
	766	ROM_CONTINUE( 0x100000, 0x080000 )
	767	ROM_LOAD( "gp2-202.048", 0x280000, 0x080000, CRC(c8177181) SHA1(30d0a49334e370eb1b45d2eb6501df3f857a95d5) )
	768	ROM_CONTINUE( 0x200000, 0x080000 )
	769	ROM_LOAD( "gp2-203.049", 0x380000, 0x080000, CRC(14e0cb38) SHA1(d9a778ebf0c6b67bee5f6f7016cb9ead96c6a992) )
	770	ROM_CONTINUE( 0x300000, 0x080000 )
	771	ROM_LOAD( "gp2-204a.u188", 0x400000, 0x080000, CRC(ba83c918) SHA1(04a70dc7e33d853d84b88dc82c9b066696475cee) ) // why doesn't this match the asia set?
	772
	773	ROM_REGION( 0x1c0000, "oki1", 0 ) /* Samples */
	774	ROM_LOAD( "gp2-100.043", 0x040000, 0x100000, CRC(4235ac5b) SHA1(7e35831523fbb2d0587b9ab93c13b2b43dc481a8) ) // $10 x $10000
	775	ROM_COPY( "oki1", 0x0c0000, 0, 0x40000 )
	776	/* Sound samples: unknown load position, but included here to retain the rom in this set */
	777	ROM_LOAD( "g104i1u062-0", 0x140000, 0x080000, CRC(117ee59e) SHA1(7deb9b71363ff0bf239f9ad21171ddd9bfc49eb4) ) // $8 x $10000, 1st is just audio data, no header (Italian samples?)
	778
	779	ROM_REGION( 0x300000, "oki2", 0 ) /* Samples */
	780	ROM_LOAD( "gp2-102.045", 0x180000, 0x080000, CRC(b4bee779) SHA1(a41098e4b8e48577719dc4bd7f09f5e893e8b388) ) // $8 x $40000
	781	ROM_CONTINUE( 0x000000, 0x180000 )
	782	ROM_LOAD( "gp2-101.044", 0x280000, 0x080000, CRC(f75ba6a0) SHA1(91cc0c019a7ebfa2562bbe570af029f00b5e0699) ) // $4 x $40000
	783	ROM_CONTINUE( 0x200000, 0x080000 )
	784	ROM_END
	785
736	786	ROM_START( galpani2g )
737	787	ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */
738	788	ROM_LOAD16_BYTE( "g000g1.u133-0", 0x000000, 0x080000, CRC(5a9c4886) SHA1(6fbc443612e72bafc5cac30de78c72815db20c4c) )
r9812	r9813
916	966	ROM_LOAD( "gp2-101-0044.u60", 0x200000, 0x100000, CRC(3c45134f) SHA1(a5362bfcc6beb6e776c1bce4544475f8947fccea) )
917	967	ROM_END
918	968
	969
919	970	ROM_START( gp2quiz )
920	971	ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */
921	972	ROM_LOAD16_BYTE( "g000e3.u165-3", 0x000000, 0x080000, CRC(b6de2653) SHA1(a24daf5e6b6b268f60b1dbb374861c85f642cea5) )
r9812	r9813
949	1000	ROM_END
950	1001
951	1002	GAME( 1993, galpani2, 0, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II (Asia)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION )
952		GAME( 1993, galpani2g, galpani2, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II (German)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION )
	1003	GAME( 1993, galpani2g, galpani2, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II (Germany)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION )
	1004	GAME( 1993, galpani2i, galpani2, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II (Italy)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION )
953	1005	GAME( 1993, galpani2t, galpani2, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II (Taiwan)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION )
954		GAME( 1993, galpani2j, galpani2, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II (Japan)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION ) // it is a 'quiz edition' but the title screen doesn't say that??
955		GAME( 1993, gp2quiz, 0, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II - Quiz Version (Japan)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION ) // this one has 'quiz edition' on the title screen
	1006	GAME( 1993, galpani2j, galpani2, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II (Japan)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION ) // it is a 'quiz edition' but the title screen doesn't say, maybe all Japanese versions have the Quiz
	1007
	1008	GAME( 1993, gp2quiz, 0, galpani2, galpani2, 0, ROT90, "Kaneko", "Gals Panic II - Quiz Version", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION ) // this one has 'quiz edition' on the title screen
	1009
956	1010	GAME( 1994, gp2se, 0, galpani2, gp2se, 0, ROT90, "Kaneko", "Gals Panic II' - Special Edition (Japan)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION )

src/mame/drivers/midqslvr.c
r0	r9813
	1	/***************************************************************************
	2
	3	Midway Quicksilver skeleton driver
	4
	5	Main CPU : Intel Celeron 333/366MHz
	6	Motherboard : Intel SE44BX-2
	7	RAM : 64MB
	8	Graphics Chips : Quantum Obsidian 3DFX
	9	Storage : Hard Drive
	10	***************************************************************************/
	11
	12	#include "emu.h"
	13	#include "cpu/i386/i386.h"
	14	#include "memconv.h"
	15	#include "devconv.h"
	16	#include "machine/8237dma.h"
	17	#include "machine/pic8259.h"
	18	#include "machine/pit8253.h"
	19	#include "machine/mc146818.h"
	20	#include "machine/pcshare.h"
	21	#include "machine/pci.h"
	22	#include "machine/8042kbdc.h"
	23	#include "machine/pckeybrd.h"
	24	#include "machine/idectrl.h"
	25
	26	static VIDEO_START(midqslvr)
	27	{
	28	}
	29
	30	static VIDEO_UPDATE(midqslvr)
	31	{
	32	return 0;
	33	}
	34
	35	static ADDRESS_MAP_START(midqslvr_map, ADDRESS_SPACE_PROGRAM, 32)
	36	AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
	37	AM_RANGE(0xfff80000, 0xffffffff) AM_ROM AM_REGION("user1", 0) /* System BIOS */
	38	ADDRESS_MAP_END
	39
	40	static ADDRESS_MAP_START(midqslvr_io, ADDRESS_SPACE_IO, 32)
	41	ADDRESS_MAP_END
	42
	43	static INPUT_PORTS_START( midqslvr )
	44	INPUT_PORTS_END
	45
	46	static MACHINE_CONFIG_START( midqslvr, driver_device )
	47	MDRV_CPU_ADD("maincpu", PENTIUM, 333000000) // actually Celeron 333
	48	MDRV_CPU_PROGRAM_MAP(midqslvr_map)
	49	MDRV_CPU_IO_MAP(midqslvr_io)
	50
	51	/* video hardware */
	52	MDRV_SCREEN_ADD("screen", RASTER)
	53	MDRV_SCREEN_REFRESH_RATE(60)
	54	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	55	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	56	MDRV_SCREEN_SIZE(640, 480)
	57	MDRV_SCREEN_VISIBLE_AREA(0, 639, 0, 199)
	58	MDRV_PALETTE_LENGTH(16)
	59
	60	MDRV_VIDEO_START(midqslvr)
	61	MDRV_VIDEO_UPDATE(midqslvr)
	62	MACHINE_CONFIG_END
	63
	64	ROM_START( offrthnd )
	65	ROM_REGION32_LE(0x80000, "user1", 0)
	66	ROM_LOAD( "lh28f004sct.u8b1", 0x000000, 0x080000, CRC(ab04a343) SHA1(ba77933400fe470f45ab187bc0d315922caadb12) )
	67
	68	DISK_REGION( "disk" )
	69	DISK_IMAGE( "offrthnd", 0, SHA1(d88f1c5b75361a1e310565a8a5a09c674a4a1a22) )
	70	ROM_END
	71
	72	ROM_START( hydrthnd )
	73	ROM_REGION32_LE(0x80000, "user1", 0)
	74	ROM_LOAD( "lh28f004sct.u8b1", 0x000000, 0x080000, CRC(ab04a343) SHA1(ba77933400fe470f45ab187bc0d315922caadb12) )
	75
	76	DISK_REGION( "disk" )
	77	DISK_IMAGE( "hydro", 0, SHA1(3e9956dd4a62f540ea2900f857611ff9f035b76a) )
	78	ROM_END
	79
	80	GAME(1999, hydrthnd, 0, midqslvr, midqslvr, 0, ROT0, "Midway Games", "Hydro Thunder", GAME_NO_SOUND\|GAME_NOT_WORKING)
	81	GAME(2000, offrthnd, 0, midqslvr, midqslvr, 0, ROT0, "Midway Games", "Offroad Thunder", GAME_NO_SOUND\|GAME_NOT_WORKING)

src/mame/drivers/itech32.c
r9812	r9813
7	7	Golden Tee variants & World Class Bowling Deluxe additions by Brian A. Troha
8	8
9	9	Games supported:
10		* Time Killers (2 sets)
	10	* Time Killers (3 sets)
11	11	* Bloodstorm (4 sets)
12	12	* Hard Yardage (2 sets)
13	13	* Pairs (3 sets)
14	14	* Driver's Edge (1 set)
15		* World Class Bowling (9 sets)
	15	* World Class Bowling (10 sets)
16	16	* Street Fighter: The Movie (4 sets)
17	17	* Shuffleshot (3 sets)
18	18	* Golden Tee 3D Golf (11 sets)
r9812	r9813
2416	2416	ROM_END
2417	2417
2418	2418
	2419	ROM_START( wcbowl14 ) /* Version 1.4 (3-tier board set: P/N 1059 Rev 3, P/N 1079 Rev 1 & P/N 1060 Rev 0) */
	2420	ROM_REGION16_BE( 0x80000, "user1", 0 )
	2421	ROM_LOAD16_BYTE( "wcb_v14.u83", 0x00000, 0x20000, CRC(7086131f) SHA1(86fe6f725785a5b1a0fc13ca60823f30713253bc) ) /* Labeled as "WCB V1.4 (U83)" */
	2422	ROM_LOAD16_BYTE( "wcb_v14.u88", 0x00001, 0x20000, CRC(0225aac1) SHA1(dd37ff8405e98c61acd042d23be93de24af37884) ) /* Labeled as "WCB V1.4 (U88)" */
	2423
	2424	ROM_REGION( 0x28000, "soundcpu", 0 )
	2425	ROM_LOAD( "wcb_snd2.u17", 0x10000, 0x18000, CRC(c14907ba) SHA1(e52fb87c1f9b5847efc0ef15eb7e6c04dcf38110) ) /* Labeled as "WCB SND V2.0" */
	2426	ROM_CONTINUE( 0x08000, 0x08000 )
	2427
	2428	ROM_REGION( 0x880000, "gfx1", 0 )
	2429	/* No known set specificly checks for this, however the GROM data may be in the form of four 8 Meg roms:
	2430	ROM_LOAD32_BYTE( "wcb8grom.0_0", 0x000000, 0x100000, CRC(40837737) SHA1(f073943ec6f84285a8559553fb292ec1f8a629d0) ) Labeled as "WCB GROM0_0 *" ect
	2431	ROM_LOAD32_BYTE( "wcb8grom.0_1", 0x000001, 0x100000, CRC(1615aee8) SHA1(6184919371a894b1d6f2e06a2b328cb55abed4a9) )
	2432	ROM_LOAD32_BYTE( "wcb8grom.0_2", 0x000002, 0x100000, CRC(d8e0b06e) SHA1(4981c0cf16df68a1b4da7ebf65ca587c21292478) )
	2433	ROM_LOAD32_BYTE( "wcb8grom.0_3", 0x000003, 0x100000, CRC(0348a7f0) SHA1(462f77514c0e9a28da63732a4f31e9483d4c483e) )
	2434	*/
	2435	ROM_LOAD32_BYTE( "wcb_grm0.0", 0x000000, 0x080000, CRC(5d79aaae) SHA1(e1bf5c46843f69b8bac41dde73d89ba59b4c8b7f) )
	2436	ROM_LOAD32_BYTE( "wcb_grm0.1", 0x000001, 0x080000, CRC(e26dcedb) SHA1(15441b97dd3d50d28007062fe28841fa3f762ec9) )
	2437	ROM_LOAD32_BYTE( "wcb_grm0.2", 0x000002, 0x080000, CRC(32735875) SHA1(4017a8577d8efa8c5b95bd30723ebbf6ecaeba2b) )
	2438	ROM_LOAD32_BYTE( "wcb_grm0.3", 0x000003, 0x080000, CRC(019d0ab8) SHA1(3281eada296ad746da80ef6e5909c50b03b90d08) )
	2439	ROM_LOAD32_BYTE( "wcb_grm1.0", 0x200000, 0x080000, CRC(8bd31762) SHA1(a7274c8173b4fb04a6aed0b6a622b52a811a8c83) )
	2440	ROM_LOAD32_BYTE( "wcb_grm1.1", 0x200001, 0x080000, CRC(b3f761fc) SHA1(5880ca1423cea9a7ca3d0875c8db33787f4056d4) )
	2441	ROM_LOAD32_BYTE( "wcb_grm1.2", 0x200002, 0x080000, CRC(c22f44ad) SHA1(b25b11346ee1812b2be79105faf64faa0302c105) )
	2442	ROM_LOAD32_BYTE( "wcb_grm1.3", 0x200003, 0x080000, CRC(036084c4) SHA1(6d2e402d2f4565e037a2676ba676e4b1da2b5dfe) )
	2443	ROM_FILL( 0x400000, 0x480000, 0xff )
	2444
	2445	ROM_REGION16_BE( 0x400000, "ensoniq.0", ROMREGION_ERASE00 )
	2446	ROM_LOAD16_BYTE( "ensoniq.2mx", 0x000000, 0x200000, CRC(0814ab80) SHA1(e92525f7cf58cf480510c278fea705f67225e58f) ) /* Ensoniq 2MX16U 1350901801 */
	2447
	2448	ROM_REGION16_BE( 0x400000, "ensoniq.2", ROMREGION_ERASE00 )
	2449	ROM_LOAD16_BYTE( "wcb_srm.0", 0x000000, 0x080000, CRC(115bcd1f) SHA1(c321bf3145c11de1351c8f9cd554ab3d6600e854) )
	2450	ROM_LOAD16_BYTE( "wcb_srm.1", 0x100000, 0x080000, CRC(87a4a4d8) SHA1(60db2f466686481857eb39b90ac7a19d0a96adac) )
	2451	ROM_END
	2452
	2453
2419	2454	ROM_START( wcbowl13 ) /* Version 1.3 (3-tier board set: P/N 1059 Rev 3, P/N 1079 Rev 1 & P/N 1060 Rev 0) */
2420	2455	ROM_REGION16_BE( 0x80000, "user1", 0 )
2421	2456	ROM_LOAD16_BYTE( "wcb_v13.u83", 0x00000, 0x20000, CRC(2b6d284e) SHA1(339951661509d07b69c670b7249f30a616872bdf) ) /* Labeled as "WCB V1.3 (U83)" */
r9812	r9813
4194	4229	GAME( 1995, wcbowl161, wcbowl, sftm, shufbowl, wcbowln, ROT0, "Incredible Technologies", "World Class Bowling (v1.61)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
4195	4230	GAME( 1995, wcbowl16, wcbowl, sftm, shufbowl, wcbowln, ROT0, "Incredible Technologies", "World Class Bowling (v1.6)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
4196	4231	GAME( 1995, wcbowl15, wcbowl, bloodstm, wcbowl, wcbowl, ROT0, "Incredible Technologies", "World Class Bowling (v1.5)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
	4232	GAME( 1995, wcbowl14, wcbowl, bloodstm, wcbowl, wcbowl, ROT0, "Incredible Technologies", "World Class Bowling (v1.4)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
4197	4233	GAME( 1995, wcbowl13, wcbowl, bloodstm, wcbowl, wcbowl, ROT0, "Incredible Technologies", "World Class Bowling (v1.3)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
4198	4234	GAME( 1995, wcbowl12, wcbowl, bloodstm, wcbowl, wcbowl, ROT0, "Incredible Technologies", "World Class Bowling (v1.2)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
4199	4235	GAME( 1995, sftm, 0, sftm, sftm, sftm, ROT0, "Capcom / Incredible Technologies", "Street Fighter: The Movie (v1.12)" , 0) /* PIC 16C54 labeled as ITSF-1 */

src/mame/drivers/chaknpop.c
r9812	r9813
10	10	#include "sound/ay8910.h"
11	11	#include "includes/chaknpop.h"
12	12
13
14	13	/***************************************************************************
15	14
16	15	Memory Handler(s)
r9812	r9813
274	273	static MACHINE_CONFIG_START( chaknpop, chaknpop_state )
275	274
276	275	/* basic machine hardware */
277		/* the real board is 3.072MHz, but it is faster for MAME */
278		//MDRV_CPU_ADD("maincpu", Z80, 18432000 / 6) /* 3.072 MHz */
279		MDRV_CPU_ADD("maincpu", Z80, 2350000)
280		//MDRV_CPU_ADD("maincpu", Z80, 2760000)
	276	MDRV_CPU_ADD("maincpu", Z80, XTAL_18MHz / 6) /* Verified on PCB */
281	277	MDRV_CPU_PROGRAM_MAP(chaknpop_map)
282	278	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
283	279
r9812	r9813
302	298	/* sound hardware */
303	299	MDRV_SPEAKER_STANDARD_MONO("mono")
304	300
305		MDRV_SOUND_ADD("ay1", AY8910, 18~~432000~~ / 12)
	301	MDRV_SOUND_ADD("ay1", AY8910, XTAL_18MHz / 12) /* Verified on PCB */
306	302	MDRV_SOUND_CONFIG(ay8910_interface_1)
307	303	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
308	304
309		MDRV_SOUND_ADD("ay2", AY8910, 18~~432000~~ / 12)
	305	MDRV_SOUND_ADD("ay2", AY8910, XTAL_18MHz / 12) /* Verified on PCB */
310	306	MDRV_SOUND_CONFIG(ay8910_interface_2)
311	307	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
312	308	MACHINE_CONFIG_END

src/mame/drivers/dkong.c
r9812	r9813
3146	3146	/* EPOS */
3147	3147	GAME( 1984, drakton, 0, drakton, drakton, drakton, ROT90, "Epos Corporation", "Drakton (DK conversion)", GAME_SUPPORTS_SAVE )
3148	3148	GAME( 1984, drktnjr, drakton, drktnjr, drakton, drakton, ROT90, "Epos Corporation", "Drakton (DKJr conversion)", GAME_SUPPORTS_SAVE )
3149		GAME( 1985, strtheat, 0, strtheat, strtheat, strtheat, ROT90, "Epos Corporation", "Street Heat - Cardinal Amusements", ~~GAME_SU~~P~~PORTS_SAV~~E )
	3149	GAME( 1985, strtheat, 0, strtheat, strtheat, strtheat, ROT90, "Epos Corporation", "Street Heat", GAME_SUPPORTS_SAVE ) // distributed by Cardinal Amusements Products (a division of Epos Corporation)

src/mame/drivers/20pacgal.c
r9812	r9813
37	37
38	38	Note: The "correct" size of the roms are 27C020 for the program rom and 27C256 for the
39	39	graphics rom. However genuine boards have been found with larger roms containing
40		the same data with the extra rom space banked out.
	40	the same data with the extra rom space blanked out.
41	41
42	42	Known issues/to-do's:
43	43	* Starfield is not 100% accurate

src/mame/drivers/scobra.c
r9812	r9813
1212	1212	ROM_LOAD( "colr6f.cpu", 0x0000, 0x0020, CRC(fce333c7) SHA1(f63a214dc47c5e7c80db000b0b6a261ca8da6629) )
1213	1213	ROM_END
1214	1214
	1215	/*
	1216	Rescue
	1217
	1218	CPU/Video Board: A969 (Has various wire mods)
	1219	Sound Board: ?
	1220	*/
	1221
1215	1222	ROM_START( rescue )
1216	1223	ROM_REGION( 0x10000, "maincpu", 0 )
1217	1224	ROM_LOAD( "rb15acpu.bin", 0x0000, 0x1000, CRC(d7e654ba) SHA1(6bcf7a6d86bc2de9a304f0aa9542fdcb58ca73dd) )

src/mame/drivers/flstory.c
r9812	r9813
158	158	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_MEMBER(flstory_state, workram) /* work RAM */
159	159	ADDRESS_MAP_END
160	160
	161	static UINT8 mcu_cmd,mcu_counter,mcu_b4_cmd;
	162	static UINT8 mcu_param;
	163	static UINT8 mcu_b2_res,mcu_b1_res,mcu_bb_res,mcu_b5_res,mcu_b6_res;
161	164
	165	static READ8_HANDLER( rumba_mcu_r )
	166	{
	167	//printf("PC=%04x R %02x\n",cpu_get_pc(space->cpu),mcu_cmd);
	168
	169	if((mcu_cmd & 0xf0) == 0x00) // end packet cmd, value returned is meaningless (probably used for main <-> mcu comms syncronization)
	170	return 0;
	171
	172	switch(mcu_cmd)
	173	{
	174	case 0x73: return 0xa4; //initial MCU check
	175	case 0x33: return mcu_b2_res; //0xb2 result
	176	case 0x31: return mcu_b1_res; //0xb1 result
	177
	178	case 0x35: mcu_b5_res = 1; mcu_b6_res = 1; return 0;
	179	case 0x36: return mcu_b4_cmd; //0xb4 command, extra protection for lives (first play only), otherwise game gives one extra life at start-up (!)
	180	case 0x37: return mcu_b5_res; //0xb4 / 0xb5 / 0xb6 result y value
	181	case 0x38: return mcu_b6_res; //x value
	182
	183	case 0x3b: return mcu_bb_res; //0xbb result
	184	case 0x40: return 0;
	185	case 0x41: return 0;
	186	case 0x42:
	187	{
	188	/* TODO: subtle behaviour for transitioning from level 16 to level 17 (loop clear?). Command is:
	189	0xc0 -> param -> 0xc1 -> param -> ... 0xc7 -> param -> 0x0e (end of packet) then reads at 0x40 -> 0x41 and 0x42
	190
	191	Params written doesn't make any sense, they are copies from RAM addresses at 0xe450-7 and they looks like ... garbage.
	192	It's possible that all of this it just increments by one an internal RAM address in the MCU and then it sends a six when this counter
	193	has bits 0-3 == 0 (BCD operation?), but then the question is ... how it determines game over?
	194
	195	According to a PCB test, game should roll back to level 1 layout but level counter should say "17" instead of current "11". Some of these ports also appears to control
	196	game-play speed and who is playing between player 1 and 2.
	197	*/
	198	//static UINT8 level_val;
	199
	200	//level_val = space->read_byte(0xe247);
	201
	202	//popmessage("%02x",level_val);
	203
	204	//if((level_val & 0x0f) == 0x00)
	205	// return 0; //6
	206
	207	return 0;
	208	}
	209	//case 0x42: return 0x06;
	210	//default: printf("PC=%04x R %02x\n",cpu_get_pc(space->cpu),mcu_cmd); break;
	211	}
	212
	213	return 0;
	214	}
	215
	216	static WRITE8_HANDLER( rumba_mcu_w )
	217	{
	218	//if((mcu_cmd & 0xf0) == 0xc0)
	219	// printf("%02x ",data);
	220
	221	//if(mcu_cmd == 0x42)
	222	// printf("\n");
	223
	224	if(mcu_param)
	225	{
	226	mcu_param = 0; // clear param
	227
	228	//printf("%02x %02x\n",mcu_cmd,data);
	229
	230	switch(mcu_cmd)
	231	{
	232	case 0xb0: // counter, used by command 0xb1 (and something else?
	233	{
	234	/*
	235	sends 0xb0 -> param then 0xb1 -> param -> 0x01 (end of cmd packet?) finally 0x31 for reply
	236	*/
	237
	238	mcu_counter = data;
	239
	240	break;
	241	}
	242	case 0xb1: // player death sequence, controls X position
	243	{
	244	mcu_b1_res = data;
	245
	246	/* TODO: this is pretty hard to simulate ... */
	247	if(mcu_counter >= 0x10)
	248	mcu_b1_res++; // left
	249	else if(mcu_counter >= 0x08)
	250	mcu_b1_res--; // right
	251	else
	252	mcu_b1_res++; // left again
	253
	254	break;
	255	}
	256	case 0xb2: // player sprite hook-up param when he throws the wheel
	257	{
	258	/*
	259	sends 0xb2 -> param -> 0x02 (end of cmd packet?) then 0x33 for reply
	260	*/
	261
	262	switch(data)
	263	{
	264	case 1: mcu_b2_res = 0xaa; break; //left
	265	case 2: mcu_b2_res = 0xaa; break; //right
	266	case 4: mcu_b2_res = 0xab; break; //down
	267	case 8: mcu_b2_res = 0xa9; break; //up
	268	}
	269	break;
	270	}
	271	case 0xbb: // when you start a level, lives
	272	{
	273	/*
	274	sends 0xbb -> param -> 0x04 (end of cmd packet?) then 0x3b for reply
	275	*/
	276
	277	mcu_bb_res = data;
	278	//printf("PC=%04x W %02x -> %02x\n",cpu_get_pc(space->cpu),mcu_cmd,data);
	279	break;
	280	}
	281	case 0xb4: // when the bird touches the top / bottom / left / right of the screen, for correct repositioning
	282	{
	283	mcu_b4_cmd = data;
	284
	285	//popmessage("%02x",mcu_b4_cmd);
	286
	287	/*
	288	sends 0xb4 -> param -> 0xb5 -> param (bird X coord) -> 0xb6 -> param (bird Y coord) ->
	289	*/
	290
	291	#if 0
	292	switch(data)
	293	{
	294	case 1: break; // from up to down
	295	case 2: break; // from left to right
	296	case 3: break; // from right to left
	297	case 4: break; // from down to up
	298	}
	299	#endif
	300	break;
	301	}
	302	case 0xb5: // bird X coord
	303	{
	304	/* TODO: values might be off by one */
	305	mcu_b5_res = data;
	306
	307	if(mcu_b4_cmd == 3) // from right to left
	308	mcu_b5_res = 0x0d;
	309
	310	if(mcu_b4_cmd == 2) // from left to right
	311	mcu_b5_res = 0xe4;
	312
	313	break;
	314	}
	315	case 0xb6: // bird Y coord
	316	{
	317	mcu_b6_res = data;
	318
	319	if(mcu_b4_cmd == 1) // from up to down
	320	mcu_b6_res = 0x04;
	321
	322	if(mcu_b4_cmd == 4) // from down to up
	323	mcu_b6_res = 0xdc;
	324
	325	break;
	326	}
	327	}
	328
	329	//if((mcu_cmd & 0xf0) == 0xc0)
	330	// printf("%02x ",data);
	331
	332	//if(mcu_cmd == 0xc7)
	333	// printf("\n");
	334
	335	return;
	336	}
	337
	338	mcu_cmd = data;
	339
	340	if(((data & 0xf0) == 0xb0 \|\| (data & 0xf0) == 0xc0) && mcu_param == 0)
	341	mcu_param = 1;
	342	}
	343
	344	static ADDRESS_MAP_START( rumba_map, ADDRESS_SPACE_PROGRAM, 8 )
	345	AM_RANGE(0x0000, 0xbfff) AM_ROM
	346	AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(flstory_videoram_w) AM_BASE_SIZE_MEMBER(flstory_state, videoram, videoram_size)
	347	// AM_RANGE(0xc800, 0xcfff) AM_RAM /* unknown */
	348	AM_RANGE(0xd000, 0xd000) AM_READWRITE(rumba_mcu_r, rumba_mcu_w)
	349	AM_RANGE(0xd001, 0xd001) AM_WRITENOP /* watchdog? */
	350	// AM_RANGE(0xd002, 0xd002) AM_NOP /* unknown read & coin lock out? */
	351	AM_RANGE(0xd400, 0xd400) AM_READWRITE(from_snd_r, sound_command_w)
	352	AM_RANGE(0xd401, 0xd401) AM_READ(snd_flag_r)
	353	// AM_RANGE(0xd403, 0xd403) AM_READNOP /* unknown */
	354	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
	355	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
	356	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
	357	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("SYSTEM")
	358	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("P1")
	359	AM_RANGE(0xd805, 0xd805) AM_READ_PORT("EXTRA_P1") /* also mcu */
	360	AM_RANGE(0xd806, 0xd806) AM_READ_PORT("P2")
	361	AM_RANGE(0xd807, 0xd807) AM_READ_PORT("EXTRA_P2")
	362	// AM_RANGE(0xda00, 0xda00) AM_WRITEONLY
	363	AM_RANGE(0xdc00, 0xdc9f) AM_RAM AM_BASE_SIZE_MEMBER(flstory_state, spriteram, spriteram_size)
	364	AM_RANGE(0xdca0, 0xdcbf) AM_RAM_WRITE(flstory_scrlram_w) AM_BASE_MEMBER(flstory_state, scrlram)
	365	AM_RANGE(0xdce0, 0xdce0) AM_READWRITE(victnine_gfxctrl_r, victnine_gfxctrl_w)
	366	// AM_RANGE(0xdce1, 0xdce1) AM_WRITENOP /* unknown */
	367	AM_RANGE(0xdd00, 0xdeff) AM_READWRITE(flstory_palette_r, flstory_palette_w)
	368	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_MEMBER(flstory_state, workram) /* work RAM */
	369	ADDRESS_MAP_END
	370
	371
162	372	static MACHINE_RESET( ta7630 )
163	373	{
164	374	flstory_state *state = machine->driver_data<flstory_state>();
r9812	r9813
608	818	INPUT_PORTS_END
609	819
610	820
	821
	822	static INPUT_PORTS_START( rumba )
	823	PORT_START("DSW0") /* D800 */
	824	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Bonus_Life ) )
	825	PORT_DIPSETTING( 0x00, "20000 50000" )
	826	PORT_DIPSETTING( 0x01, "10000 60000" )
	827	PORT_DIPSETTING( 0x02, "10000 40000" )
	828	PORT_DIPSETTING( 0x03, "10000 20000" )
	829	PORT_DIPNAME(0x04, 0x04, DEF_STR( Free_Play ) )
	830	PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
	831	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	832	PORT_DIPNAME( 0x18, 0x18, DEF_STR( Lives ) )
	833	PORT_DIPSETTING( 0x18, "3" )
	834	PORT_DIPSETTING( 0x10, "4" )
	835	PORT_DIPSETTING( 0x08, "5" )
	836	PORT_DIPSETTING( 0x00, "6")
	837	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	838	PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
	839	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	840	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	841	PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
	842	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	843	PORT_DIPNAME(0x80, 0x80, DEF_STR( Cabinet ) )
	844	PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
	845	PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
	846
	847
	848	PORT_START("DSW1") /* D801 */
	849	PORT_DIPNAME(0x0f, 0x00, DEF_STR( Coin_A ) )
	850	PORT_DIPSETTING( 0x0f, DEF_STR( 9C_1C ) )
	851	PORT_DIPSETTING( 0x0e, DEF_STR( 8C_1C ) )
	852	PORT_DIPSETTING( 0x0d, DEF_STR( 7C_1C ) )
	853	PORT_DIPSETTING( 0x0c, DEF_STR( 6C_1C ) )
	854	PORT_DIPSETTING( 0x0b, DEF_STR( 5C_1C ) )
	855	PORT_DIPSETTING( 0x0a, DEF_STR( 4C_1C ) )
	856	PORT_DIPSETTING( 0x09, DEF_STR( 3C_1C ) )
	857	PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
	858	PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
	859	PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
	860	PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) )
	861	PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) )
	862	PORT_DIPSETTING( 0x04, DEF_STR( 1C_5C ) )
	863	PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) )
	864	PORT_DIPSETTING( 0x06, DEF_STR( 1C_7C ) )
	865	PORT_DIPSETTING( 0x07, DEF_STR( 1C_8C ) )
	866	PORT_DIPNAME(0xf0, 0x00, DEF_STR( Coin_B ) )
	867	PORT_DIPSETTING( 0xf0, DEF_STR( 9C_1C ) )
	868	PORT_DIPSETTING( 0xe0, DEF_STR( 8C_1C ) )
	869	PORT_DIPSETTING( 0xd0, DEF_STR( 7C_1C ) )
	870	PORT_DIPSETTING( 0xc0, DEF_STR( 6C_1C ) )
	871	PORT_DIPSETTING( 0xb0, DEF_STR( 5C_1C ) )
	872	PORT_DIPSETTING( 0xa0, DEF_STR( 4C_1C ) )
	873	PORT_DIPSETTING( 0x90, DEF_STR( 3C_1C ) )
	874	PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
	875	PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
	876	PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
	877	PORT_DIPSETTING( 0x20, DEF_STR( 1C_3C ) )
	878	PORT_DIPSETTING( 0x30, DEF_STR( 1C_4C ) )
	879	PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) )
	880	PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ) )
	881	PORT_DIPSETTING( 0x60, DEF_STR( 1C_7C ) )
	882	PORT_DIPSETTING( 0x70, DEF_STR( 1C_8C ) )
	883
	884	PORT_START("DSW2") /* D802 */
	885	PORT_DIPNAME( 0x01, 0x01, "Training Stage" )
	886	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
	887	PORT_DIPSETTING( 0x01, DEF_STR( On ) )
	888	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	889	PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
	890	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	891	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Language ) )
	892	PORT_DIPSETTING( 0x04, DEF_STR( Japanese ) )
	893	PORT_DIPSETTING( 0x00, DEF_STR( English ) )
	894	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	895	PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
	896	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	897	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	898	PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
	899	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	900	PORT_DIPNAME( 0x20, 0x20, "Copyright String" )
	901	PORT_DIPSETTING( 0x20, "Taito Corp. MCMLXXXIV" )
	902	PORT_DIPSETTING( 0x00, "Taito Corporation" )
	903	PORT_DIPNAME( 0x40, 0x40, "Infinite Lives" ) //???
	904	PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
	905	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	906	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	907	PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
	908	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	909
	910	PORT_START("SYSTEM") /* D803 */
	911	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
	912	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
	913	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
	914	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
	915	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
	916	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
	917	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	918	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	919
	920	PORT_START("P1") /* D804 */
	921	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // A
	922	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) // C
	923	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
	924	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
	925	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
	926	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
	927	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	928	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	929
	930	PORT_START("EXTRA_P1") /* D805 */
	931	/* bits 0,1 are MCU related:
	932	- bit 0: mcu is ready to receive data from main cpu
	933	- bit 1: mcu has sent data to the main cpu */
	934	PORT_BIT( 0x03, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(victnine_mcu_status_bit01_r, NULL)
	935	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	936	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	937	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
	938	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	939	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	940	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	941
	942	PORT_START("P2") /* D806 */
	943	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL // A
	944	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL // C
	945	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
	946	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
	947	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
	948	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
	949	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	950	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	951
	952	PORT_START("EXTRA_P2") /* D807 */
	953	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	954	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	955	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	956	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	957	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
	958	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	959	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	960	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	961	INPUT_PORTS_END
	962
	963
611	964	static const gfx_layout charlayout =
612	965	{
613	966	8,8,
r9812	r9813
906	1259	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.20)
907	1260	MACHINE_CONFIG_END
908	1261
	1262	static MACHINE_RESET( rumba )
	1263	{
	1264	MACHINE_RESET_CALL(flstory);
	1265	mcu_cmd = 0;
	1266	}
909	1267
	1268	static MACHINE_CONFIG_START( rumba, flstory_state )
	1269
	1270	/* basic machine hardware */
	1271	MDRV_CPU_ADD("maincpu", Z80,8000000/2) /* 4 MHz */
	1272	MDRV_CPU_PROGRAM_MAP(rumba_map)
	1273	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
	1274
	1275	MDRV_CPU_ADD("audiocpu", Z80,8000000/2) /* 4 MHz */
	1276	MDRV_CPU_PROGRAM_MAP(sound_map)
	1277	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2) /* IRQ generated by ??? */
	1278	/* NMI generated by the main CPU */
	1279	// MDRV_CPU_ADD("mcu", M68705,18432000/6) /* ??? */
	1280
	1281	// MDRV_CPU_PROGRAM_MAP(m68705_map)
	1282
	1283	MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
	1284	/* synchronization of the CPUs */
	1285	MDRV_MACHINE_START(flstory)
	1286	MDRV_MACHINE_RESET(rumba)
	1287
	1288	/* video hardware */
	1289	MDRV_SCREEN_ADD("screen", RASTER)
	1290	MDRV_SCREEN_REFRESH_RATE(60)
	1291	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	1292	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	1293	MDRV_SCREEN_SIZE(328, 328)
	1294	MDRV_SCREEN_VISIBLE_AREA(08, 328-1, 28, 308-1)
	1295
	1296	MDRV_GFXDECODE(flstory)
	1297	MDRV_PALETTE_LENGTH(512)
	1298
	1299	MDRV_VIDEO_START(rumba)
	1300	MDRV_VIDEO_UPDATE(rumba)
	1301
	1302	/* sound hardware */
	1303	MDRV_SPEAKER_STANDARD_MONO("mono")
	1304
	1305	MDRV_SOUND_ADD("aysnd", AY8910, 8000000/4)
	1306	MDRV_SOUND_CONFIG(ay8910_config)
	1307	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
	1308
	1309	MDRV_SOUND_ADD("msm", MSM5232, 2000000)
	1310	MDRV_SOUND_CONFIG(msm5232_config)
	1311	MDRV_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
	1312	MDRV_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
	1313	MDRV_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
	1314	MDRV_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
	1315	MDRV_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
	1316	MDRV_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
	1317	MDRV_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
	1318	MDRV_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
	1319	// pin 1 SOLO 8' not mapped
	1320	// pin 2 SOLO 16' not mapped
	1321	// pin 22 Noise Output not mapped
	1322
	1323	MDRV_SOUND_ADD("dac", DAC, 0)
	1324	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.20)
	1325	MACHINE_CONFIG_END
	1326
910	1327	/***************************************************************************
911	1328
912	1329	Game driver(s)
r9812	r9813
1131	1548	ROM_END
1132	1549
1133	1550
	1551	/*
	1552
	1553	RUMBA LUMBER by TAITO (1984)
	1554
	1555	Hardware similar to Fairyland Story except for the video board.
	1556	Wiring is the classic Taito one.
	1557	All clocks has been verified using a frequency counter.
	1558	Hardware is capable of playing samples (TTL circuit)
	1559
	1560
	1561	SOUND BOARD J1100022A / K1100066A
	1562
	1563	Xtal: 8mhz
	1564	Z80 NEC D780C-1 running at 8/2 = 4mhz
	1565	YM2149 running at 8/4 = 2mhz pin 26 high
	1566	OKI M5232 running at 8/4 = 2mhz
	1567	2764 EPROM A23-08-1
	1568	2764 EPROM A23-09
	1569	2764 EPROM A23-10
	1570
	1571	CPU BOARD J1100024A / K1100065A
	1572
	1573	Xtal 8mhz
	1574	Z80 NEC D780C-1 running at 8/2 = 4mhz
	1575	MCU A23-11 MC68705P5S running at 18.432/6 = 3.072mhz
	1576	27128 EPROM A23-01-1
	1577	27128 EPROM A23-02-1
	1578	27128 EPROM A23-03-1
	1579
	1580	VIDEO BOARD J1100023A / K1100064A
	1581
	1582	xtal: 18.432mhz
	1583	2764 EPROM A23-04
	1584	2764 EPROM A23-05
	1585	2764 EPROM A23-06 (I cannot get a constant read,a couple of bytes differ everytime)
	1586	2764 EPROM A23-07
	1587
	1588	VSYNC = 60.55hz
	1589
	1590	Dumped by Corrado Tomaselli on 9/12/2010
	1591
	1592	*/
	1593
	1594	ROM_START( rumba )
	1595	ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for the first CPU */
	1596	ROM_LOAD( "a23_01-1.bin", 0x0000, 0x4000, CRC(4bea6e18) SHA1(b9a85e65105773b5f93dcc5fc1e7c588b2d25056) )
	1597	ROM_LOAD( "a23_02-1.bin", 0x4000, 0x4000, CRC(08f98c6f) SHA1(f2a850b1138cfefab6ff1d1adcda9e084f52e9c2) )
	1598	ROM_LOAD( "a23_03-1.bin", 0x8000, 0x4000, CRC(ab595427) SHA1(1ff51740e1c7915e1f79a55801d11c8fdce764c8) )
	1599
	1600	ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the second CPU */
	1601	ROM_LOAD( "a23_08-1.bin", 0x0000, 0x2000, CRC(a18eae00) SHA1(6ac1ad07bb5a97c6edaaf0e1fb842e1741f4cf1e) )
	1602	ROM_LOAD( "a23_09.bin", 0x2000, 0x2000, CRC(d0a101d3) SHA1(c92bb1ce67bec394fd8ce303d9e61eac12493b5d) )
	1603	ROM_LOAD( "a23_10.bin", 0x4000, 0x2000, CRC(f9447bd4) SHA1(68c02249ca0e5b923cddb4bff8d090963b9c78e4) )
	1604
	1605	ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
	1606	ROM_LOAD( "a23-11.mc68705p5s", 0x0000, 0x0800, NO_DUMP )
	1607
	1608	ROM_REGION( 0x8000, "gfx1", ROMREGION_INVERT )
	1609	ROM_LOAD( "a23_07.bin", 0x02000, 0x2000, CRC(c98fbea6) SHA1(edd1e0b2551f726018ca6e0b2cf629046a482711) )
	1610	ROM_LOAD( "a23_06.bin", 0x00000, 0x2000, CRC(bf1e3a7f) SHA1(1258be10739cee6e6a8b2ce4d39f89bff1ea7f16) ) // should be a good read
	1611	ROM_LOAD( "a23_05.bin", 0x06000, 0x2000, CRC(b40db231) SHA1(85204efc05e95334576807e4dab866f4f40081e6) )
	1612	ROM_LOAD( "a23_04.bin", 0x04000, 0x2000, CRC(1d4f001f) SHA1(c3245650e57138ed89e7de8289fe37c5d933ddca) )
	1613	ROM_END
	1614
	1615
1134	1616	GAME( 1985, flstory, 0, flstory, flstory, 0, ROT180, "Taito", "The FairyLand Story", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1135	1617	GAME( 1985, flstoryj, flstory, flstory, flstory, 0, ROT180, "Taito", "The FairyLand Story (Japan)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1136	1618	GAME( 1985, onna34ro, 0, onna34ro, onna34ro, 0, ROT0, "Taito", "Onna Sansirou - Typhoon Gal (set 1)", GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1137	1619	GAME( 1985, onna34roa, onna34ro, onna34ro, onna34ro, 0, ROT0, "Taito", "Onna Sansirou - Typhoon Gal (set 2)", GAME_UNEMULATED_PROTECTION \| GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1138	1620	GAME( 1984, victnine, 0, victnine, victnine, 0, ROT0, "Taito", "Victorious Nine", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
	1621	GAME( 1984, rumba, 0, rumba, rumba, 0, ROT270, "Taito", "Rumba Lumber", GAME_IMPERFECT_SOUND \| GAME_UNEMULATED_PROTECTION )

src/mame/drivers/pachifev.c
r9812	r9813
376	376	MDRV_FRAGMENT_ADD(tms9928a)
377	377	MDRV_SCREEN_MODIFY("screen")
378	378	MDRV_SCREEN_REFRESH_RATE((float)XTAL_10_738635MHz/2/342/262)
379		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* ~~not~~ ~~accurat~~e */
	379	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(4395)) /* 69 lines */
380	380
381	381	/* sound hardware */
382	382	MDRV_SPEAKER_STANDARD_MONO("mono")

src/mame/drivers/raiden2.c
r9812	r9813
6	6	value of 0x80 puts 0x00000-0x1ffff at 0x20000 - 0x3ffff
7	7	value of 0x00 puts 0x20000-0x3ffff at 0x20000 - 0x3ffff
8	8
	9	TODO (xsedae):
	10	- sprite DMA params doesn't quite work well with this and zeroteam (hardcode src to 0xf000 and size to 0x800).
	11	- sprite ROMs are badly dumped (half size);
	12	- sprite X kludge needs to be removed somehow;
	13	- apparently the only real usage of the sprite protection in xsedae is on the field map (sprite goes in the wrong direction);
	14
9	15	*/
10	16
11	17	/*
r9812	r9813
93	99	Raiden 2
94	100	Raiden DX
95	101	Zero Team
	102	X Se Dae Quiz
96	103
97	104	+ varients
98	105
r9812	r9813
123	130	Sprite Encryption - this is 99% complete for Raiden 2 / DX, just a few bad
124	131	bits remain. No decryption support for Zero Team yet.
125	132
126		Sound - the main sets should use a variant of the Seibu Sound System, with
127		an extra OKI6295, currently no sound is hooked up in these sets. The V33
128		set uses weaker sound hardware which is emulated.
129
130	133	Video emulation - used to be more complete than it is now, tile banking is
131	134	currently broken.
132	135
133	136	Low Priority
134	137
135
136	138	*/
137	139
138	140	#define ADDRESS_MAP_MODERN
r9812	r9813
189	191	cop_latch_trigger = data;
190	192	}
191	193
	194	WRITE16_MEMBER(raiden2_state::cop_dma_adr_rel_w)
	195	{
	196	COMBINE_DATA(&cop_dma_adr_rel);
	197	}
	198
192	199	WRITE16_MEMBER(raiden2_state::cop_dma_v1_w)
193	200	{
194	201	COMBINE_DATA(&cop_dma_v1);
r9812	r9813
232	239	sprites_cur_start = rsize;
233	240	break;
234	241	}
	242	case 0x82: {
	243	UINT32 src,dst,size;
	244	int i;
	245
	246	src = (cop_dma_adr << 6) + (cop_dma_adr_rel * 0x400);
	247	dst = (cop_dma_v3 << 6);
	248	size = ((cop_dma_size << 5) - (cop_dma_v3 << 6) + 0x20)/2;
	249
	250	//printf("%08x %08x %08x\n",src,dst,size);
	251
	252	for(i = 0;i < size;i++)
	253	{
	254	space.write_word(dst, space.read_word(src));
	255	src+=2;
	256	dst+=2;
	257	}
	258
	259	break;
235	260	}
	261	case 0x09: {
	262	UINT32 src,dst,size;
	263	int i;
	264
	265	src = (cop_dma_adr << 6);
	266	dst = (cop_dma_v3 << 6);
	267	size = ((cop_dma_size << 5) - (cop_dma_v3 << 6) + 0x20)/2;
	268
	269	// printf("%08x %08x %08x\n",src,dst,size);
	270
	271	for(i = 0;i < size;i++)
	272	{
	273	space.write_word(dst, space.read_word(src));
	274	src+=2;
	275	dst+=2;
	276	}
	277
	278	break;
	279	}
	280	}
236	281	}
237	282
238	283	WRITE16_MEMBER(raiden2_state::cop_itoa_low_w)
r9812	r9813
274	319	return cop_status;
275	320	}
276	321
	322	READ16_MEMBER(raiden2_state::cop_angle_r)
	323	{
	324	return cop_angle;
	325	}
	326
	327	READ16_MEMBER(raiden2_state::cop_dist_r)
	328	{
	329	return cop_dist;
	330	}
	331
277	332	WRITE16_MEMBER(raiden2_state::cop_scale_w)
278	333	{
279	334	COMBINE_DATA(&cop_scale);
r9812	r9813
308	363	space.write_dword(cop_regs[0] + 4 + offset4, space.read_dword(cop_regs[0] + 4 + offset4) + space.read_dword(cop_regs[0] + 16 + offset*4));
309	364	break;
310	365
	366	case 0x130e:
311	367	case 0x138e: { // 130e 0005 bf7f 0010 - 0984 0aa4 0d82 0aa2 039b 0b9a 0b9a 0a9a
312	368	int dx = space.read_dword(cop_regs[1]+4) - space.read_dword(cop_regs[0]+4);
313	369	int dy = space.read_dword(cop_regs[1]+8) - space.read_dword(cop_regs[0]+8);
314		if(!dy)
	370	if(!dy) {
315	371	cop_status \|= 0x8000;
316		else {
317		UINT8 angle = atan(double(dx)/double(dy)) * 128 / M_PI;
318		if(dx<0)
319		angle += 0x80;
320		space.write_byte(cop_regs[0]+0x34, angle);
	372	cop_angle = 0;
	373	} else {
	374	cop_angle = atan(double(dx)/double(dy)) * 128 / M_PI;
	375	if(dy<0)
	376	cop_angle += 0x80;
321	377	}
	378	dx = dx >> 16;
	379	dy = dy >> 16;
	380	cop_dist = sqrt((double)(dxdx+dydy));
	381
	382	if(data & 0x0080) {
	383	space.write_byte(cop_regs[0]+0x34, cop_angle);
	384	space.write_word(cop_regs[0]+0x38, cop_dist);
	385	}
322	386	break;
323	387	}
324	388
325	389	case 0x3bb0: { // 3bb0 0004 007f 0038 - 0f9c 0b9c 0b9c 0b9c 0b9c 0b9c 0b9c 099c
326		int dx = (space.read_dword(cop_regs[1]+4) - space.read_dword(cop_regs[0]+4)) >> 16;
327		int dy = (space.read_dword(cop_regs[1]+8) - space.read_dword(cop_regs[0]+8)) >> 16;
328		space.write_word(cop_regs[0]+0x38, sqrt((double)(dxdx+dydy)));
	390	// called systematically after 130e/138e, no results expected it seems
329	391	break;
330	392	}
331	393
r9812	r9813
508	570	tilemap_mark_tile_dirty(text_layer, offset);
509	571	}
510	572
	573	WRITE16_MEMBER(raiden2_state::tilemap_enable_w)
	574	{
	575	COMBINE_DATA(&raiden2_tilemap_enable);
	576	}
	577
511	578	WRITE16_MEMBER(raiden2_state::tile_scroll_w)
512	579	{
513	580	COMBINE_DATA(scrollvals + offset);
r9812	r9813
623	690	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
624	691
625	692	if (!input_code_pressed(screen->machine, KEYCODE_Q))
626		tilemap_draw(bitmap, cliprect, state->background_layer, 0, 0);
	693	{
	694	if (!(state->raiden2_tilemap_enable & 1))
	695	tilemap_draw(bitmap, cliprect, state->background_layer, 0, 0);
	696	}
	697
627	698	if (!input_code_pressed(screen->machine, KEYCODE_W))
628		tilemap_draw(bitmap, cliprect, state->midground_layer, 0, 0);
	699	{
	700	if (!(state->raiden2_tilemap_enable & 2))
	701	tilemap_draw(bitmap, cliprect, state->midground_layer, 0, 0);
	702	}
	703
629	704	if (!input_code_pressed(screen->machine, KEYCODE_E))
630		tilemap_draw(bitmap, cliprect, state->foreground_layer, 0, 0);
	705	{
	706	if (!(state->raiden2_tilemap_enable & 4))
	707	tilemap_draw(bitmap, cliprect, state->foreground_layer, 0, 0);
	708	}
631	709
632	710	if (!input_code_pressed(screen->machine, KEYCODE_S))
633		state->draw_sprites(screen->machine, bitmap, cliprect, 0);
	711	{
	712	//if (!(raiden2_tilemap_enable & 0x10))
	713	state->draw_sprites(screen->machine, bitmap, cliprect, 0);
	714	}
634	715
635	716	if (!input_code_pressed(screen->machine, KEYCODE_A))
636		tilemap_draw(bitmap, cliprect, state->text_layer, 0, 0);
	717	{
	718	if (!(state->raiden2_tilemap_enable & 8))
	719	tilemap_draw(bitmap, cliprect, state->text_layer, 0, 0);
	720	}
637	721
638	722	return 0;
639	723	}
r9812	r9813
778	862	//cop_init();
779	863	}
780	864
	865	static MACHINE_RESET(zeroteam)
	866	{
	867	raiden2_state *state = machine->driver_data<raiden2_state>();
	868	state->bg_bank = 0;
	869	state->fg_bank = 2;
	870	state->mid_bank = 1;
	871	sprcpt_init();
	872	MACHINE_RESET_CALL(seibu_sound);
781	873
	874	//cop_init();
	875	}
782	876
783		/* MEMORY MAPS */
	877	READ16_MEMBER(raiden2_state::raiden2_sound_comms_r)
	878	{
	879	switch(offset)
	880	{
	881	case (0x008/2): return seibu_main_word_r(&space,2,0xffff);
	882	case (0x00c/2): return seibu_main_word_r(&space,3,0xffff);
	883	case (0x014/2): return seibu_main_word_r(&space,5,0xffff);
	884	}
784	885
785		static ADDRESS_MAP_START( raiden2_mem, ADDRESS_SPACE_PROGRAM, 16, raiden2_state )
786		AM_RANGE(0x00000, 0x003ff) AM_RAM
	886	return 0xffff;
	887	}
787	888
	889	WRITE16_MEMBER(raiden2_state::raiden2_sound_comms_w)
	890	{
	891	switch(offset)
	892	{
	893	case (0x000/2): { seibu_main_word_w(&space,0,data,0x00ff); break; }
	894	case (0x004/2): { seibu_main_word_w(&space,1,data,0x00ff); break; }
	895	case (0x010/2): { seibu_main_word_w(&space,4,data,0x00ff); break; }
	896	case (0x018/2): { seibu_main_word_w(&space,6,data,0x00ff); break; }
	897	}
	898	}
	899
	900
	901	/* MEMORY MAPS */
	902	static ADDRESS_MAP_START( raiden2_cop_mem, ADDRESS_SPACE_PROGRAM, 16, raiden2_state )
788	903	AM_RANGE(0x00420, 0x00421) AM_WRITE(cop_itoa_low_w)
789	904	AM_RANGE(0x00422, 0x00423) AM_WRITE(cop_itoa_high_w)
790	905	AM_RANGE(0x00424, 0x00425) AM_WRITE(cop_itoa_digit_count_w)
r9812	r9813
797	912	AM_RANGE(0x0043c, 0x0043d) AM_WRITE(cop_pgm_trigger_w)
798	913	AM_RANGE(0x00444, 0x00445) AM_WRITE(cop_scale_w)
799	914	AM_RANGE(0x00470, 0x00471) AM_WRITE(cop_tile_bank_2_w)
	915
	916	AM_RANGE(0x00476, 0x00477) AM_WRITE(cop_dma_adr_rel_w)
800	917	AM_RANGE(0x00478, 0x00479) AM_WRITE(cop_dma_adr_w)
801	918	AM_RANGE(0x0047a, 0x0047b) AM_WRITE(cop_dma_size_w)
802	919	AM_RANGE(0x0047c, 0x0047d) AM_WRITE(cop_dma_v3_w)
r9812	r9813
806	923	AM_RANGE(0x00500, 0x00503) AM_WRITE(cop_cmd_w)
807	924	AM_RANGE(0x00590, 0x00599) AM_READ(cop_itoa_digits_r)
808	925	AM_RANGE(0x005b0, 0x005b1) AM_READ(cop_status_r)
	926	AM_RANGE(0x005b2, 0x005b3) AM_READ(cop_dist_r)
	927	AM_RANGE(0x005b4, 0x005b5) AM_READ(cop_angle_r)
809	928
	929	AM_RANGE(0x0061c, 0x0061d) AM_WRITE(tilemap_enable_w)
810	930	AM_RANGE(0x00620, 0x0062b) AM_WRITE(tile_scroll_w)
811	931	AM_RANGE(0x006a0, 0x006a3) AM_WRITE(sprcpt_val_1_w)
812	932	AM_RANGE(0x006a4, 0x006a7) AM_WRITE(sprcpt_data_3_w)
r9812	r9813
819	939	AM_RANGE(0x006cc, 0x006cd) AM_WRITE(tile_bank_01_w)
820	940	AM_RANGE(0x006ce, 0x006cf) AM_WRITE(sprcpt_flags_2_w)
821	941	AM_RANGE(0x006fc, 0x006fd) AM_WRITE(cop_dma_trigger_w)
	942	ADDRESS_MAP_END
822	943
	944	static ADDRESS_MAP_START( raiden2_mem, ADDRESS_SPACE_PROGRAM, 16, raiden2_state )
	945	AM_RANGE(0x00000, 0x003ff) AM_RAM
	946
	947	AM_IMPORT_FROM( raiden2_cop_mem )
	948
	949	AM_RANGE(0x00700, 0x0071f) AM_READWRITE(raiden2_sound_comms_r,raiden2_sound_comms_w)
	950
823	951	AM_RANGE(0x00740, 0x00741) AM_READ_PORT("DSW")
824	952	AM_RANGE(0x00744, 0x00745) AM_READ_PORT("CONTROLS")
825	953	AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
826	954
827		AM_RANGE(0x00700, 0x0cfff) AM_RAM
	955	AM_RANGE(0x00800, 0x0cfff) AM_RAM
828	956
829	957	AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(raiden2_background_w) AM_BASE(back_data)
830	958	AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(raiden2_foreground_w) AM_BASE(fore_data)
r9812	r9813
839	967	AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x40000)
840	968	ADDRESS_MAP_END
841	969
842		/* new zero team uses the copd3 protection... and uploads a 0x400 byte table, probably the mcu code, encrypted */
	970	static ADDRESS_MAP_START( zeroteam_mem, ADDRESS_SPACE_PROGRAM, 16, raiden2_state )
	971	AM_RANGE(0x00000, 0x003ff) AM_RAM
843	972
	973	AM_RANGE(0x00470, 0x00471) AM_WRITENOP
	974	AM_RANGE(0x006cc, 0x006cd) AM_WRITENOP
844	975
845		static UINT16 mcu_prog[0x400];
846		static int mcu_prog_offs = 0;
	976	AM_IMPORT_FROM( raiden2_cop_mem )
847	977
848		WRITE16_MEMBER(raiden2_state::mcu_prog_w )
849		{
850		mcu_prog[mcu_prog_offs*2] = data;
851		}
	978	AM_RANGE(0x00700, 0x0071f) AM_READWRITE(raiden2_sound_comms_r,raiden2_sound_comms_w)
852	979
853		WRITE16_MEMBER(raiden2_state::mcu_prog_w2 )
854		{
855		mcu_prog[mcu_prog_offs*2+1] = data;
	980	AM_RANGE(0x00740, 0x00741) AM_READ_PORT("DSW")
	981	AM_RANGE(0x00744, 0x00745) AM_READ_PORT("CONTROLS")
	982	AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
856	983
857		// both new zero team and raiden2/dx v33 version upload the same table..
858		#if 1
859		{
860		char tmp[64];
861		FILE *fp;
862		sprintf(tmp,"cop3_%s.data", space.machine->gamedrv->name);
	984	AM_RANGE(0x0b800, 0x0bfff) AM_RAM_WRITE(raiden2_background_w) AM_BASE(back_data)
	985	AM_RANGE(0x0c000, 0x0c7ff) AM_RAM_WRITE(raiden2_foreground_w) AM_BASE(fore_data)
	986	AM_RANGE(0x0c800, 0x0cfff) AM_RAM_WRITE(raiden2_midground_w) AM_BASE(mid_data)
	987	AM_RANGE(0x0d000, 0x0dfff) AM_RAM_WRITE(raiden2_text_w) AM_BASE(text_data)
	988	AM_RANGE(0x0e000, 0x0efff) AM_RAM AM_WRITE_LEGACY(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
863	989
864		fp=fopen(tmp, "w+b");
865		if (fp)
866		{
867		fwrite(mcu_prog, 0x400, 2, fp);
868		fclose(fp);
869		}
870		}
871		#endif
872		}
	990	AM_RANGE(0x00800, 0x0ffff) AM_RAM
	991	AM_RANGE(0x10000, 0x1ffff) AM_RAM
873	992
874		WRITE16_MEMBER(raiden2_state::mcu_prog_offs_w )
875		{
876		mcu_prog_offs = data;
877		}
	993	AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("mainbank")
	994	AM_RANGE(0x40000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x40000)
	995	ADDRESS_MAP_END
878	996
	997	static ADDRESS_MAP_START( xsedae_mem, ADDRESS_SPACE_PROGRAM, 16, raiden2_state )
	998	AM_RANGE(0x00000, 0x003ff) AM_RAM
879	999
	1000	AM_RANGE(0x00470, 0x00471) AM_WRITENOP
	1001	AM_RANGE(0x006cc, 0x006cd) AM_WRITENOP
880	1002
	1003	AM_IMPORT_FROM( raiden2_cop_mem )
	1004
	1005	AM_RANGE(0x00700, 0x0071f) AM_READWRITE(raiden2_sound_comms_r,raiden2_sound_comms_w)
	1006
	1007	AM_RANGE(0x00740, 0x00741) AM_READ_PORT("DSW")
	1008	AM_RANGE(0x00744, 0x00745) AM_READ_PORT("CONTROLS")
	1009	AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
	1010
	1011	AM_RANGE(0x0b800, 0x0bfff) AM_RAM_WRITE(raiden2_background_w) AM_BASE(back_data)
	1012	AM_RANGE(0x0c000, 0x0c7ff) AM_RAM_WRITE(raiden2_foreground_w) AM_BASE(fore_data)
	1013	AM_RANGE(0x0c800, 0x0cfff) AM_RAM_WRITE(raiden2_midground_w) AM_BASE(mid_data)
	1014	AM_RANGE(0x0d000, 0x0dfff) AM_RAM_WRITE(raiden2_text_w) AM_BASE(text_data)
	1015	AM_RANGE(0x0e000, 0x0efff) AM_RAM AM_WRITE_LEGACY(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
	1016
	1017	AM_RANGE(0x00800, 0x0ffff) AM_RAM
	1018	AM_RANGE(0x10000, 0x1ffff) AM_RAM
	1019
	1020	AM_RANGE(0x20000, 0xfffff) AM_ROM AM_REGION("mainprg", 0x20000)
	1021	ADDRESS_MAP_END
	1022
	1023
881	1024	READ16_MEMBER(raiden2_state::rdx_v33_system_r )
882	1025	{
883	1026	return input_port_read(space.machine, "SYSTEM");
r9812	r9813
905	1048	}
906	1049
907	1050
908		static ADDRESS_MAP_START( nzerotea_mem, ADDRESS_SPACE_PROGRAM, 16, raiden2_state )
909		// AM_RANGE(0x00400, 0x007ff) AM_READWRITE(raiden2_mcu_r, raiden2_mcu_w) AM_BASE(&cop_mcu_ram)
910
911		/* results from cop? */
912		AM_RANGE(0x00430, 0x00431) AM_READ(nzerotea_unknown_r)
913		AM_RANGE(0x00432, 0x00433) AM_READ(nzerotea_unknown_r)
914		AM_RANGE(0x00434, 0x00435) AM_READ(nzerotea_unknown_r)
915		AM_RANGE(0x00436, 0x00437) AM_READ(nzerotea_unknown_r)
916		AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
917		AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
918		AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
919		AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
920		AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
921		// AM_RANGE(0x006d8, 0x006d9) AM_WRITE(bbbbll_w) // scroll?
922		AM_RANGE(0x006dc, 0x006dd) AM_READ(nzerotea_unknown_r)
923		// AM_RANGE(0x006de, 0x006df) AM_WRITE(mcu_unkaa_w) // mcu command related?
924		//AM_RANGE(0x00700, 0x00701) AM_DEVWRITE("eeprom", rdx_v33_eeprom_w)
925		AM_RANGE(0x00740, 0x00741) AM_READ(nzerotea_unknown_r)
926		AM_RANGE(0x00744, 0x00745) AM_READ(r2_playerin_r)
927		AM_RANGE(0x0074c, 0x0074d) AM_READ(rdx_v33_system_r)
928		AM_RANGE(0x00762, 0x00763) AM_READ(nzerotea_unknown_r)
929
930		AM_RANGE(0x00788, 0x00789) AM_READ(nzerotea_unknown_r)
931		AM_RANGE(0x00794, 0x00795) AM_READ(nzerotea_unknown_r)
932
933		AM_RANGE(0x00000, 0x0bfff) AM_RAM
934		// AM_RANGE(0x00000, 0x003ff) AM_RAM
935
936		AM_RANGE(0x0c000, 0x0cfff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
937		AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(raiden2_background_w) AM_BASE(back_data)
938		AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(raiden2_foreground_w) AM_BASE(fore_data)
939		AM_RANGE(0x0e000, 0x0e7ff) AM_RAM_WRITE(raiden2_midground_w) AM_BASE(mid_data)
940		AM_RANGE(0x0e800, 0x0f7ff) AM_RAM_WRITE(raiden2_text_w) AM_BASE(text_data)
941		AM_RANGE(0x0f800, 0x0ffff) AM_RAM /* Stack area */
942
943		AM_RANGE(0x10000, 0x1efff) AM_RAM
944		AM_RANGE(0x1f000, 0x1ffff) AM_RAM AM_WRITE_LEGACY(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
945
946		AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("bank1")
947		AM_RANGE(0x40000, 0xfffff) AM_ROMBANK("bank2")
948		ADDRESS_MAP_END
949
950
951
952	1051	/* INPUT PORTS */
953	1052
954	1053	static INPUT_PORTS_START( raiden2 )
r9812	r9813
1104	1203	PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNUSED )
1105	1204	INPUT_PORTS_END
1106	1205
	1206	static INPUT_PORTS_START( zeroteam )
	1207	PORT_INCLUDE( raiden2 )
1107	1208
	1209	PORT_MODIFY("DSW")
	1210	PORT_DIPNAME( 0x0001, 0x0001, "DSW0" )
	1211	PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
	1212	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1213	PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
	1214	PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
	1215	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1216	PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
	1217	PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
	1218	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1219	PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
	1220	PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
	1221	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1222	PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
	1223	PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
	1224	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1225	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
	1226	PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
	1227	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1228	PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
	1229	PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
	1230	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1231	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
	1232	PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
	1233	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1234	PORT_DIPNAME( 0x0100, 0x0100, "DSW1" )
	1235	PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
	1236	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1237	PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
	1238	PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
	1239	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1240	PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
	1241	PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
	1242	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1243	PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
	1244	PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
	1245	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1246	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
	1247	PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
	1248	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1249	PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
	1250	PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
	1251	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1252	PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
	1253	PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
	1254	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1255	PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
	1256	PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
	1257	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1258	INPUT_PORTS_END
1108	1259
	1260	static INPUT_PORTS_START( xsedae )
	1261	PORT_INCLUDE( raiden2 )
	1262
	1263	PORT_MODIFY("DSW")
	1264	PORT_DIPNAME( 0x0001, 0x0001, "DSW0" )
	1265	PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
	1266	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1267	PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
	1268	PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
	1269	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1270	PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
	1271	PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
	1272	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1273	PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
	1274	PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
	1275	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1276	PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
	1277	PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
	1278	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1279	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
	1280	PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
	1281	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1282	PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
	1283	PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
	1284	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1285	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
	1286	PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
	1287	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1288	PORT_DIPNAME( 0x0100, 0x0100, "DSW1" )
	1289	PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
	1290	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1291	PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
	1292	PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
	1293	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1294	PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
	1295	PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
	1296	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1297	PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
	1298	PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
	1299	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1300	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
	1301	PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
	1302	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1303	PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
	1304	PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
	1305	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1306	PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
	1307	PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
	1308	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1309	PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
	1310	PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
	1311	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
	1312	INPUT_PORTS_END
	1313
1109	1314	/*************************************
1110	1315	*
1111	1316	* Graphics layouts
r9812	r9813
1196	1401
1197	1402	MACHINE_CONFIG_END
1198	1403
	1404	static MACHINE_CONFIG_DERIVED( xsedae, raiden2 )
	1405	MDRV_CPU_MODIFY("maincpu")
	1406	MDRV_CPU_PROGRAM_MAP(xsedae_mem)
1199	1407
	1408	MDRV_MACHINE_RESET(zeroteam)
1200	1409
1201		static MACHINE_CONFIG_DERIVED( nzerotea, raiden2 )
	1410	MDRV_SCREEN_MODIFY("screen")
	1411	MDRV_SCREEN_VISIBLE_AREA(08, 408-1, 0, 32*8-1)
1202	1412
	1413	MACHINE_CONFIG_END
	1414
	1415	static MACHINE_CONFIG_START( zeroteam, raiden2_state )
	1416
1203	1417	/* basic machine hardware */
1204		MDRV_DEVICE_MODIFY("maincpu") // also change it to a v33!
1205		MDRV_CPU_PROGRAM_MAP(nzerotea_mem)
	1418	MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2) /* verified on pcb */
	1419	MDRV_CPU_PROGRAM_MAP(zeroteam_mem)
1206	1420	MDRV_CPU_VBLANK_INT("screen", raiden2_interrupt)
	1421
	1422	MDRV_MACHINE_RESET(zeroteam)
	1423
	1424	SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(14318180/4)
	1425
	1426
	1427	/* video hardware */
	1428	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
	1429
	1430	MDRV_SCREEN_ADD("screen", RASTER)
	1431	MDRV_SCREEN_REFRESH_RATE(55.47) /* verified on pcb */
	1432	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate *//2)
	1433	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	1434	MDRV_SCREEN_SIZE(648, 648)
	1435	MDRV_SCREEN_VISIBLE_AREA(08, 408-1, 0, 32*8-1)
	1436	MDRV_GFXDECODE(raiden2)
	1437	MDRV_PALETTE_LENGTH(2048)
	1438
	1439	MDRV_VIDEO_START(raiden2)
	1440	MDRV_VIDEO_UPDATE(raiden2)
	1441
	1442	/* sound hardware */
	1443	SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
1207	1444	MACHINE_CONFIG_END
1208	1445
1209	1446	/* ROM LOADING */
r9812	r9813
1296	1533	ROM_LOAD( "copx-d2.u0313", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Soldered MASK ROM */
1297	1534
1298	1535	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1299		ROM_LOAD( "seibu5.u1110", 0x000000, 0x10000, CRC(8f130589) SHA1(e58c8beaf9f27f063ffbcb0ab4600123c25ce6f3) )
	1536	ROM_LOAD( "seibu5.u1110", 0x000000, 0x08000, CRC(8f130589) SHA1(e58c8beaf9f27f063ffbcb0ab4600123c25ce6f3) )
	1537	ROM_CONTINUE(0x10000,0x8000)
	1538	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1300	1539
1301	1540	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1302	1541	ROM_LOAD( "seibu7.u0724", 0x000000, 0x020000, CRC(c9ec9469) SHA1(a29f480a1bee073be7a177096ef58e1887a5af24) ) /* PCB silkscreened FX0 */
r9812	r9813
1364	1603	ROM_LOAD( "copx-d2.u0313", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Soldered MASK ROM */
1365	1604
1366	1605	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1367		ROM_LOAD( "seibu5.u1110", 0x000000, 0x10000, CRC(8f130589) SHA1(e58c8beaf9f27f063ffbcb0ab4600123c25ce6f3) )
	1606	ROM_LOAD( "seibu5.u1110", 0x000000, 0x08000, CRC(8f130589) SHA1(e58c8beaf9f27f063ffbcb0ab4600123c25ce6f3) )
	1607	ROM_CONTINUE(0x10000,0x8000)
	1608	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1368	1609
1369	1610	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1370	1611	ROM_LOAD( "seibu7.u0724", 0x000000, 0x020000, CRC(c9ec9469) SHA1(a29f480a1bee073be7a177096ef58e1887a5af24) ) /* PCB silkscreened FX0 */
r9812	r9813
1397	1638	ROM_LOAD( "copx-d2.u0313", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Soldered MASK ROM */
1398	1639
1399	1640	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1400		ROM_LOAD( "seibu5", 0x000000, 0x10000, CRC(5db9f922) SHA1(8257aab98657fe44df19d2a48d85fcf65b3d98c6) )
	1641	ROM_LOAD( "seibu5", 0x000000, 0x08000, CRC(5db9f922) SHA1(8257aab98657fe44df19d2a48d85fcf65b3d98c6) )
	1642	ROM_CONTINUE(0x10000,0x8000)
	1643	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1401	1644
1402	1645	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1403	1646	ROM_LOAD( "seibu7.u0724", 0x000000, 0x020000, CRC(c9ec9469) SHA1(a29f480a1bee073be7a177096ef58e1887a5af24) ) /* PCB silkscreened FX0 */
r9812	r9813
1448	1691	ROM_LOAD( "copx-d2.u0313", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Soldered MASK ROM */
1449	1692
1450	1693	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1451		ROM_LOAD( "r2_snd.bin", 0x000000, 0x10000, CRC(6bad0a3e) SHA1(eb7ae42353e1984cd60b569c26cdbc3b025a7da6) )
	1694	ROM_LOAD( "r2_snd.bin", 0x000000, 0x08000, CRC(6bad0a3e) SHA1(eb7ae42353e1984cd60b569c26cdbc3b025a7da6) )
	1695	ROM_CONTINUE(0x10000,0x8000)
	1696	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1452	1697
1453	1698	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1454	1699	ROM_LOAD( "r2_fx0.bin", 0x000000, 0x020000, CRC(c709bdf6) SHA1(0468d90412b7590d67eaadc0a5e3537cd5e73943) )
r9812	r9813
1481	1726	ROM_LOAD( "copx-d2.u0313", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Soldered MASK ROM */
1482	1727
1483	1728	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1484		ROM_LOAD( "r2.5", 0x000000, 0x10000, CRC(f5f835af) SHA1(5be82ebc582d0da919e9ae1b9e64528bb295efc7) )
	1729	ROM_LOAD( "r2.5", 0x000000, 0x08000, CRC(f5f835af) SHA1(5be82ebc582d0da919e9ae1b9e64528bb295efc7) )
	1730	ROM_CONTINUE(0x10000,0x8000)
	1731	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1485	1732
1486	1733	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1487	1734	ROM_LOAD( "r2.7", 0x000000, 0x020000, CRC(c7aa4d00) SHA1(9ad99d3891598c1ea3f12318400ee67666da56dd) )
r9812	r9813
1503	1750	ROM_LOAD( "raiden_2_pcm.u1018", 0x00000, 0x40000, CRC(8cf0d17e) SHA1(0fbe0b1e1ca5360c7c8329331408e3d799b4714c) ) /* Soldered MASK ROM */
1504	1751	ROM_END
1505	1752
	1753	ROM_START( raiden2f ) // same as raiden2e, different region
	1754	ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
	1755	ROM_LOAD16_BYTE("seibu_1.uo211", 0x000000, 0x80000, CRC(d7041be4) SHA1(3cf97132fba6f7b00c9059265f4e9f0bf1505b71) )
	1756	ROM_RELOAD(0x100000, 0x80000)
	1757	ROM_LOAD16_BYTE("seibu_2.uo212", 0x000001, 0x80000, CRC(beb71ddb) SHA1(471399ead1cdc27ac2a1139f9616f828efd14626) )
	1758	ROM_RELOAD(0x100001, 0x80000)
	1759
	1760	ROM_REGION( 0x40000, "user2", 0 ) /* COPX */
	1761	ROM_LOAD( "copx-d2.u0313", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Soldered MASK ROM */
	1762
	1763	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
	1764	ROM_LOAD( "r2.5", 0x000000, 0x08000, CRC(f5f835af) SHA1(5be82ebc582d0da919e9ae1b9e64528bb295efc7) )
	1765	ROM_CONTINUE(0x10000,0x8000)
	1766	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
	1767
	1768	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
	1769	ROM_LOAD( "r2.7", 0x000000, 0x020000, CRC(c7aa4d00) SHA1(9ad99d3891598c1ea3f12318400ee67666da56dd) )
	1770
	1771	ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
	1772	ROM_LOAD( "raiden_2_seibu_bg-1.u0714", 0x000000, 0x200000, CRC(e61ad38e) SHA1(63b06cd38db946ad3fc5c1482dc863ef80b58fec) ) /* Soldered MASK ROM */
	1773	ROM_LOAD( "raiden_2_seibu_bg-2.u075", 0x200000, 0x200000, CRC(a694a4bb) SHA1(39c2614d0effc899fe58f735604283097769df77) ) /* Soldered MASK ROM */
	1774
	1775	ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
	1776	ROM_LOAD32_WORD( "raiden_2_seibu_obj-1.u0811", 0x000000, 0x200000, CRC(ff08ef0b) SHA1(a1858430e8171ca8bab785457ef60e151b5e5cf1) ) /* Soldered MASK ROM */
	1777	ROM_LOAD32_WORD( "raiden_2_seibu_obj-2.u082", 0x000002, 0x200000, CRC(638eb771) SHA1(9774cc070e71668d7d1d20795502dccd21ca557b) ) /* Soldered MASK ROM */
	1778	ROM_LOAD32_WORD( "raiden_2_seibu_obj-3.u0837", 0x400000, 0x200000, CRC(897a0322) SHA1(abb2737a2446da5b364fc2d96524b43d808f4126) ) /* Soldered MASK ROM */
	1779	ROM_LOAD32_WORD( "raiden_2_seibu_obj-4.u0836", 0x400002, 0x200000, CRC(b676e188) SHA1(19cc838f1ccf9c4203cd0e5365e5d99ff3a4ff0f) ) /* Soldered MASK ROM */
	1780
	1781	ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */
	1782	ROM_LOAD( "r2.6", 0x00000, 0x40000, CRC(fab9f8e4) SHA1(b1eff154c4f766b2d272ac6a57f8d54c9e39e3bb) )
	1783
	1784	ROM_REGION( 0x100000, "oki2", 0 ) /* ADPCM samples */
	1785	ROM_LOAD( "raiden_2_pcm.u1018", 0x00000, 0x40000, CRC(8cf0d17e) SHA1(0fbe0b1e1ca5360c7c8329331408e3d799b4714c) ) /* Soldered MASK ROM */
	1786	ROM_END
	1787
	1788
1506	1789	/* Raiden DX sets */
1507	1790
1508	1791	ROM_START( raidndx )
r9812	r9813
1516	1799	ROM_LOAD( "copx-d2.6s", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Shared with original Raiden 2 */
1517	1800
1518	1801	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1519		ROM_LOAD( "dx_5.5b", 0x000000, 0x10000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1802	ROM_LOAD( "dx_5.5b", 0x000000, 0x08000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1803	ROM_CONTINUE(0x10000,0x8000)
	1804	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1520	1805
1521	1806	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1522	1807	ROM_LOAD( "dx_7.4s", 0x000000, 0x020000, CRC(c73986d4) SHA1(d29345077753bda53560dedc95dd23f329e521d9) )
r9812	r9813
1549	1834	ROM_LOAD( "copx-d2.6s", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) )
1550	1835
1551	1836	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1552		ROM_LOAD( "dx_5.5b", 0x000000, 0x10000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1837	ROM_LOAD( "dx_5.5b", 0x000000, 0x08000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1838	ROM_CONTINUE(0x10000,0x8000)
	1839	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1553	1840
1554	1841	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1555	1842	ROM_LOAD( "dx_7.4s", 0x000000, 0x020000, CRC(c73986d4) SHA1(d29345077753bda53560dedc95dd23f329e521d9) )
r9812	r9813
1582	1869	ROM_LOAD( "copx-d2.6s", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Shared with original Raiden 2 */
1583	1870
1584	1871	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1585		ROM_LOAD( "dx_5.5b", 0x000000, 0x10000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1872	ROM_LOAD( "dx_5.5b", 0x000000, 0x08000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1873	ROM_CONTINUE(0x10000,0x8000)
	1874	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1586	1875
1587	1876	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1588	1877	ROM_LOAD( "dx_7.4s", 0x000000, 0x020000, CRC(c73986d4) SHA1(d29345077753bda53560dedc95dd23f329e521d9) )
r9812	r9813
1615	1904	ROM_LOAD( "copx-d2.6s", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Shared with original Raiden 2 */
1616	1905
1617	1906	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1618		ROM_LOAD( "dx_5.5b", 0x000000, 0x10000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1907	ROM_LOAD( "dx_5.5b", 0x000000, 0x08000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1908	ROM_CONTINUE(0x10000,0x8000)
	1909	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1619	1910
1620	1911	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1621	1912	ROM_LOAD( "dx_7.4s", 0x000000, 0x020000, CRC(c73986d4) SHA1(d29345077753bda53560dedc95dd23f329e521d9) )
r9812	r9813
1648	1939	ROM_LOAD( "copx-d2.6s", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Shared with original Raiden 2 */
1649	1940
1650	1941	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1651		ROM_LOAD( "dx_5.5b", 0x000000, 0x10000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1942	ROM_LOAD( "dx_5.5b", 0x000000, 0x08000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1943	ROM_CONTINUE(0x10000,0x8000)
	1944	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1652	1945
1653	1946	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1654	1947	ROM_LOAD( "dx_7.4s", 0x000000, 0x020000, CRC(c73986d4) SHA1(d29345077753bda53560dedc95dd23f329e521d9) )
r9812	r9813
1681	1974	ROM_LOAD( "copx-d2.u0313", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) ) /* Shared with original Raiden 2 */
1682	1975
1683	1976	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1684		ROM_LOAD( "5.u1110", 0x000000, 0x10000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1977	ROM_LOAD( "5.u1110", 0x000000, 0x08000, CRC(8c46857a) SHA1(8b269cb20adf960ba4eb594d8add7739dbc9a837) )
	1978	ROM_CONTINUE(0x10000,0x8000)
	1979	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1685	1980
1686	1981	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1687	1982	ROM_LOAD( "7.u0724", 0x000000, 0x020000, CRC(c73986d4) SHA1(d29345077753bda53560dedc95dd23f329e521d9) )
r9812	r9813
1717	2012	ROM_LOAD( "copx-d2", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) )
1718	2013
1719	2014	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1720		ROM_LOAD( "sound", 0x000000, 0x10000, CRC(7ec1fbc3) SHA1(48299d6530f641b18764cc49e283c347d0918a47) ) // 5.5c
	2015	ROM_LOAD( "sound", 0x000000, 0x08000, CRC(7ec1fbc3) SHA1(48299d6530f641b18764cc49e283c347d0918a47) ) // 5.5c
	2016	ROM_CONTINUE(0x10000,0x8000)
	2017	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1721	2018
1722	2019	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1723	2020	ROM_LOAD16_BYTE( "7.5s", 0x000000, 0x010000, CRC(9f6aa0f0) SHA1(1caad7092c07723d12a07aa363ae2aa69cb6be0d) )
r9812	r9813
1731	2028	ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
1732	2029	ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
1733	2030
1734		ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */
	2031	ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
1735	2032	ROM_LOAD( "6.pcm", 0x00000, 0x40000, CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) ) // 6.4a
1736
1737		ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF ) /* ADPCM samples */
1738	2033	ROM_END
1739	2034
1740	2035	ROM_START( zeroteama )
r9812	r9813
1748	2043	ROM_LOAD( "copx-d2", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) )
1749	2044
1750	2045	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1751		ROM_LOAD( "5.bin", 0x000000, 0x10000, CRC(efc484ca) SHA1(c34b8e3e7f4c2967bc6414348993478ed637d338) )
	2046	ROM_LOAD( "5.bin", 0x000000, 0x08000, CRC(efc484ca) SHA1(c34b8e3e7f4c2967bc6414348993478ed637d338) )
	2047	ROM_CONTINUE(0x10000,0x8000)
	2048	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1752	2049
1753	2050	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1754	2051	ROM_LOAD16_BYTE( "7.bin", 0x000000, 0x010000, CRC(eb10467f) SHA1(fc7d576dc41bc878ff20f0370e669e19d54fcefb) )
r9812	r9813
1762	2059	ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
1763	2060	ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
1764	2061
1765		ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */
	2062	ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
1766	2063	ROM_LOAD( "6.pcm", 0x00000, 0x40000, CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) ) // 6.bin
1767
1768		ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF ) /* ADPCM samples */
1769	2064	ROM_END
1770	2065
1771	2066	ROM_START( zeroteams )
r9812	r9813
1779	2074	ROM_LOAD( "copx-d2", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) )
1780	2075
1781	2076	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1782		ROM_LOAD( "5_sel.bin", 0x000000, 0x10000, CRC(ed91046c) SHA1(de815c999aeeb814d3f091d5a9ac34ea9a388ddb) )
	2077	ROM_LOAD( "5_sel.bin", 0x000000, 0x08000, CRC(ed91046c) SHA1(de815c999aeeb814d3f091d5a9ac34ea9a388ddb) )
	2078	ROM_CONTINUE(0x10000,0x8000)
	2079	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1783	2080
1784	2081	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1785	2082	ROM_LOAD16_BYTE( "7.5s", 0x000000, 0x010000, CRC(9f6aa0f0) SHA1(1caad7092c07723d12a07aa363ae2aa69cb6be0d) )
r9812	r9813
1793	2090	ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
1794	2091	ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
1795	2092
1796		ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */
	2093	ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
1797	2094	ROM_LOAD( "6.pcm", 0x00000, 0x40000, CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) ) // 6.bin
1798
1799		ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF ) /* ADPCM samples */
1800	2095	ROM_END
1801	2096
1802	2097	/* set contained only program roms, was marked as 'non-encrytped' but program isn't encrypted anyway?! */
r9812	r9813
1811	2106	ROM_LOAD( "copx-d2", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) )
1812	2107
1813	2108	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1814		ROM_LOAD( "sound", 0x000000, 0x10000, CRC(7ec1fbc3) SHA1(48299d6530f641b18764cc49e283c347d0918a47) ) // 5.5c
	2109	ROM_LOAD( "sound", 0x000000, 0x08000, CRC(7ec1fbc3) SHA1(48299d6530f641b18764cc49e283c347d0918a47) ) // 5.5c
	2110	ROM_CONTINUE(0x10000,0x8000)
	2111	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1815	2112
1816	2113	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1817	2114	ROM_LOAD16_BYTE( "7.5s", 0x000000, 0x010000, CRC(9f6aa0f0) SHA1(1caad7092c07723d12a07aa363ae2aa69cb6be0d) )
r9812	r9813
1825	2122	ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
1826	2123	ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
1827	2124
1828		ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */
	2125	ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
1829	2126	ROM_LOAD( "6.pcm", 0x00000, 0x40000, CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) ) // 6.4a
1830
1831		ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF ) /* ADPCM samples */
1832	2127	ROM_END
1833	2128
1834	2129	ROM_START( zeroteamc )
r9812	r9813
1842	2137	ROM_LOAD( "copx-d2", 0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) )
1843	2138
1844	2139	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1845		ROM_LOAD( "5.bin", 0x000000, 0x10000, CRC(efc484ca) SHA1(c34b8e3e7f4c2967bc6414348993478ed637d338) )
	2140	ROM_LOAD( "5.bin", 0x000000, 0x08000, CRC(efc484ca) SHA1(c34b8e3e7f4c2967bc6414348993478ed637d338) )
	2141	ROM_CONTINUE(0x10000,0x8000)
	2142	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
1846	2143
1847	2144	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1848	2145	ROM_LOAD16_BYTE( "b7.072", 0x000000, 0x010000, CRC(30ec0241) SHA1(a0d0be9458bf97cb9764fb85c988bb816710475e) )
r9812	r9813
1856	2153	ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
1857	2154	ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
1858	2155
1859		ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */
	2156	ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
1860	2157	ROM_LOAD( "6.105", 0x00000, 0x40000, CRC(b4a6e899) SHA1(175ab656db3c3258ff10eede89890f62435d2298) )
1861
1862		ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF ) /* ADPCM samples */
1863	2158	ROM_END
1864	2159
1865		/* Different hardware, uses COPX-D3 for protection */
1866		ROM_START( nzerotea )
1867		ROM_REGION( 0x200000, "mainprg", 0 ) /* v30 main cpu */
1868		ROM_LOAD16_BYTE("prg1", 0x000000, 0x80000, CRC(3c7d9410) SHA1(25f2121b6c2be73f11263934266901ed5d64d2ee) )
1869		ROM_LOAD16_BYTE("prg2", 0x000001, 0x80000, CRC(6cba032d) SHA1(bf5d488cd578fff09e62e3650efdee7658033e3f) )
1870
1871		ROM_REGION( 0x40000, "user2", 0 ) /* COPX */
1872		/* not from this set, assumed to be the same */
1873		ROM_LOAD( "copx-d3.bin", 0x00000, 0x20000, BAD_DUMP CRC(fa2cf3ad) SHA1(13eee40704d3333874b6e3da9ee7d969c6dc662a) )
1874
1875		ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
1876		ROM_LOAD( "sound", 0x000000, 0x10000, CRC(7ec1fbc3) SHA1(48299d6530f641b18764cc49e283c347d0918a47) )
1877
1878		ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
1879		ROM_LOAD16_BYTE( "fix1", 0x000000, 0x010000, CRC(0c4895b0) SHA1(f595dbe5a19edb8a06ea60105ee26b95db4a2619) )
1880		ROM_LOAD16_BYTE( "fix2", 0x000001, 0x010000, CRC(07d8e387) SHA1(52f54a6a4830592784cdf643a5f255aa3db53e50) )
1881
1882		ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
1883		ROM_LOAD( "back-1", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
1884		ROM_LOAD( "back-2", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
1885
1886		ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
1887		ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
1888		ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
1889
1890		ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */
1891		ROM_LOAD( "6.pcm", 0x00000, 0x40000, CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) )
1892
1893		ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF ) /* ADPCM samples */
1894		ROM_END
1895
1896
1897
1898	2160	/*
1899	2161
1900		Raiden DX
1901		Seibu Kaihatsu, 1993/1996
1902
1903		Note! PCB seems like an updated version. It uses _entirely_ SMD technology and
1904		is smaller than the previous hardware. I guess the game is still popular, so
1905		Seibu re-manufactured it using newer technology to meet demand.
1906		Previous version hardware is similar to Heated Barrel/Legionairre/Seibu Cup Soccer etc.
1907		It's possible that the BG and OBJ ROMs from this set can be used to complete the
1908		previous (incomplete) dump that runs on the V30 hardware, since most GFX chips are the same.
1909
1910		PCB ID: (C) 1996 JJ4-China-Ver2.0 SEIBU KAIHATSU INC., MADE IN JAPAN
1911		CPU : NEC 70136AL-16 (V33)
1912		SOUND : Oki M6295
1913		OSC : 28.636360MHz
1914		RAM : CY7C199-15 (28 Pin SOIC, x11)
1915		Breakdown of RAM locations...
1916		(x2 near SIE150)
1917		(x3 near SEI252)
1918		(x2 near SEI0200)
1919		(x4 near SEI360)
1920
1921		DIPs : 8 position (x1)
1922		1-6 OFF (NOT USED)
1923		7 OFF = Normal Mode , ON = Test/Setting Mode
1924		8 OFF = Normal Screen, ON = FLIP Screen
1925
1926		OTHER : Controls are 8-way + 3 Buttons
1927		Amtel 93C46 EEPROM (SOIC8)
1928		PALCE16V8 (x1, near BG ROM, SOIC20)
1929		SEIBU SEI360 SB06-1937 (160 pin PQFP)
1930		SEIBI SIE150 (100 pin PQFP, Note SIE, not a typo)
1931		SEIBU SEI252 (208 pin PQFP)
1932		SEIBU SEI333 (208 pin PQFP)
1933		SEIBU SEI0200 TC110G21AF (100 pin PQFP)
1934
1935		Note: Most of the custom SEIBU chips are the same as the ones used on the
1936		previous version hardware.
1937
1938		ROMs : (filename is PCB label, extension is PCB 'u' location)
1939
1940		ROM ROM Probably Byte
1941		Filename Label Type Used... Note C'sum
1942		---------------------------------------------------------------------------------
1943		PCM.099 RAIDEN-X SOUND LH538100 (SOP32) Oki Samples 0 8539h
1944		FIX.613 RAIDEN-X FIX LH532048 (SOP40) ? (BG?) 1 182Dh
1945		COPX_D3.357 RAIDEN-X 333 LH530800A (SOP32) Protection? 2 CEE4h
1946		PRG.223 RAIDEN-X CHR-4A1 MX23C3210 (SOP44) V33 program 3 F276h
1947		OBJ1.724 RAIDEN-X CHR1 MX23C3210 (SOP44) Motion Objects 4 4148h
1948		OBJ2.725 RAIDEN-X CHR2 MX23C3210 (SOP44) Motion Objects 4 00C3h
1949		BG.612 RAIDEN-X CHR3 MX23C3210 (SOP44) Backgrounds 5 3280h
1950
1951
1952		Notes
1953		0. Located near Oki M6295
1954		1. Located near SEI0200 and BG ROM
1955		2. Located near SEI333
1956		3. Located near V33 and SEI333
1957		4. Located near V33 and SEI252
1958		5. Located near FIX ROM and SEI0200
1959
1960		*/
1961
1962
1963		ROM_START( r2dx_v33 )
1964		ROM_REGION( 0x400000, "maincpu", 0 ) /* v33 main cpu */
1965		ROM_LOAD("prg.223", 0x000000, 0x400000, CRC(b3dbcf98) SHA1(30d6ec2090531c8c579dff74c4898889902d7d87) )
1966
1967		ROM_REGION( 0x20000, "cpu1", ROMREGION_ERASE00 ) /* 64k code for sound Z80 */
1968		/* nothing? no z80*/
1969
1970		ROM_REGION( 0x040000, "gfx1", 0 ) /* chars */
1971		ROM_LOAD( "fix.613", 0x000000, 0x040000, CRC(3da27e39) SHA1(3d446990bf36dd0a3f8fadb68b15bed54904c8b5) )
1972
1973		ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
1974		ROM_LOAD( "bg.612", 0x000000, 0x400000, CRC(162c61e9) SHA1(bd0a6a29804b84196ba6bf3402e9f30a25da9269) )
1975
1976		ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */
1977		ROM_LOAD32_WORD( "obj1.724", 0x000000, 0x400000, CRC(7d218985) SHA1(777241a533defcbea3d7e735f309478d260bad52) )
1978		ROM_LOAD32_WORD( "obj2.725", 0x000002, 0x400000, CRC(b09434d9) SHA1(da75252b7693ab791fece4c10b8a4910edb76c88) )
1979
1980		ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */
1981		ROM_LOAD( "pcm.099", 0x00000, 0x100000, CRC(97ca2907) SHA1(bfe8189300cf72089d0beaeab8b1a0a1a4f0a5b6) )
1982
1983		ROM_REGION( 0x40000, "user2", 0 ) /* COPX */
1984		ROM_LOAD( "copx_d3.357", 0x00000, 0x20000, CRC(fa2cf3ad) SHA1(13eee40704d3333874b6e3da9ee7d969c6dc662a) )
1985
1986		ROM_REGION16_BE( 0x80, "eeprom", 0 )
1987		ROM_LOAD16_WORD( "eeprom-r2dx_v33.bin", 0x0000, 0x0080, CRC(ba454777) SHA1(101c5364e8664d17bfb1e759515d135a2673d67e) )
1988		ROM_END
1989
1990		/*
1991
1992	2162	X Se Dae Quiz
1993	2163	Seibu/Dream Island, 1995
1994	2164
r9812	r9813
2034	2204	ROM_REGION( 0x40000, "user2", ROMREGION_ERASEFF ) /* COPX */
2035	2205	/* Not populated */
2036	2206
2037		ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
2038		ROM_LOAD( "8.u1110", 0x000000, 0x20000, CRC(2dc2f81a) SHA1(0f6605042e0e295b4256b43dbdf5d53daebe1a9a) )
	2207	ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k code for sound Z80 */
	2208	ROM_LOAD( "8.u1110", 0x000000, 0x08000, CRC(2dc2f81a) SHA1(0f6605042e0e295b4256b43dbdf5d53daebe1a9a) )
	2209	ROM_CONTINUE(0x10000,0x8000)
	2210	ROM_CONTINUE(0x20000,0x10000) // TODO
	2211	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
2039	2212
2040	2213	ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */
2041		ROM_LOAD16_BYTE( "5.u077", 0x000000, 0x010000, CRC(478deced) SHA1(88cd72cb76bbc1c4255c3dfae4b9a10af9b050b2) )
2042		ROM_LOAD16_BYTE( "6.u072", 0x000001, 0x010000, CRC(a788402d) SHA1(8a1ac4760cf75cd2e32c1d15f36ad15cce3d411b) )
	2214	ROM_LOAD16_BYTE( "5.u077", 0x000001, 0x010000, CRC(478deced) SHA1(88cd72cb76bbc1c4255c3dfae4b9a10af9b050b2) )
	2215	ROM_LOAD16_BYTE( "6.u072", 0x000000, 0x010000, CRC(a788402d) SHA1(8a1ac4760cf75cd2e32c1d15f36ad15cce3d411b) )
2043	2216
2044	2217	ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */
2045	2218	ROM_LOAD( "bg-1.u075", 0x000000, 0x100000, CRC(ac087560) SHA1(b6473b20c55ec090961cfc46a024b3c5b707ec25) )
2046	2219	ROM_LOAD( "7.u0714", 0x100000, 0x080000, CRC(296105dc) SHA1(c2b80d681646f504b03c2dde13e37b1d820f82d2) )
2047	2220
2048	2221	ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (not encrypted) */
2049		ROM_LOAD32_WORD( "obj-1.u0811", 0x000000, 0x100000, CRC(e65f1b4e) SHA1(b04be9af41ce868e64071715252c4ff228891cf0) )
2050		ROM_LOAD32_WORD( "obj-2.u082", 0x000002, 0x100000, CRC(e753e7ad) SHA1(643ab39ac1b7df686a16b1ed6fdcb686720ca8e8) )
	2222	ROM_LOAD32_WORD( "obj-1.u0811", 0x000000, 0x100000, BAD_DUMP CRC(e65f1b4e) SHA1(b04be9af41ce868e64071715252c4ff228891cf0) ) //half size
	2223	ROM_LOAD32_WORD( "obj-2.u082", 0x000002, 0x100000, BAD_DUMP CRC(e753e7ad) SHA1(643ab39ac1b7df686a16b1ed6fdcb686720ca8e8) ) //half size
2051	2224
2052	2225	ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */
2053	2226	ROM_LOAD( "9.u105", 0x00000, 0x40000, CRC(a7a0c5f9) SHA1(7882681ac152642aa4f859071f195842068b214b) )
r9812	r9813
2061	2234	raiden2_decrypt_sprites(machine);
2062	2235	}
2063	2236
2064		static DRIVER_INIT (nzerotea)
2065		{
2066		raiden2_decrypt_sprites(machine);
2067		}
2068
2069	2237	static DRIVER_INIT (xsedae)
2070	2238	{
2071		memory_configure_bank(machine, "mainbank", 0, 2, memory_region(machine, "mainprg"), 0x20000);
	2239	/* doesn't have banking */
	2240	//memory_configure_bank(machine, "mainbank", 0, 2, memory_region(machine, "mainprg"), 0x20000);
2072	2241	}
2073	2242
2074
2075		WRITE16_DEVICE_HANDLER( rdx_v33_eeprom_w )
2076		{
2077		if (ACCESSING_BITS_0_7)
2078		{
2079		eeprom_set_clock_line(device, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
2080		eeprom_write_bit(device, data & 0x20);
2081		eeprom_set_cs_line(device, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
2082
2083		if (data&0xc7) logerror("eeprom_w extra bits used %04x\n",data);
2084		}
2085		else
2086		{
2087		logerror("eeprom_w MSB used %04x",data);
2088		}
2089		}
2090
2091
2092		static ADDRESS_MAP_START( rdx_v33_map, ADDRESS_SPACE_PROGRAM, 16, raiden2_state )
2093		AM_RANGE(0x00000, 0x003ff) AM_RAM // vectors copied here
2094
2095		/* results from cop? */
2096		AM_RANGE(0x00430, 0x00431) AM_READ(rdx_v33_unknown_r)
2097		AM_RANGE(0x00432, 0x00433) AM_READ(rdx_v33_unknown_r)
2098		AM_RANGE(0x00434, 0x00435) AM_READ(rdx_v33_unknown_r)
2099		AM_RANGE(0x00436, 0x00437) AM_READ(rdx_v33_unknown_r)
2100
2101		// AM_RANGE(0x00620, 0x00621) AM_WRITE(scroll_w) // scroll1
2102		// AM_RANGE(0x00622, 0x00623) AM_WRITE(scroll_w) // scroll1
2103
2104		// AM_RANGE(0x00624, 0x00625) AM_WRITE(scroll_w) // scroll2
2105		// AM_RANGE(0x00626, 0x00627) AM_WRITE(scroll_w) // scroll2
2106
2107		// AM_RANGE(0x00628, 0x00629) AM_WRITE(scroll_w) // scroll3
2108		// AM_RANGE(0x0062a, 0x0062b) AM_WRITE(scroll_w) // scroll3
2109
2110		AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
2111		AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
2112		AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
2113		AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
2114		AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
2115		// AM_RANGE(0x006d8, 0x006d9) AM_WRITE(bbbbll_w) // scroll?
2116		AM_RANGE(0x006dc, 0x006dd) AM_READ(rdx_v33_unknown2_r)
2117		// AM_RANGE(0x006de, 0x006df) AM_WRITE(mcu_unkaa_w) // mcu command related?
2118		AM_RANGE(0x00700, 0x00701) AM_DEVWRITE_LEGACY("eeprom", rdx_v33_eeprom_w)
2119		AM_RANGE(0x00740, 0x00741) AM_READ(rdx_v33_unknown2_r)
2120		AM_RANGE(0x00744, 0x00745) AM_READ(r2_playerin_r)
2121		AM_RANGE(0x0074c, 0x0074d) AM_READ(rdx_v33_system_r)
2122		AM_RANGE(0x00762, 0x00763) AM_READ(rdx_v33_unknown2_r)
2123
2124		AM_RANGE(0x00780, 0x00781) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) // single OKI chip on this version
2125
2126		AM_RANGE(0x00800, 0x0087f) AM_RAM // copies eeprom here?
2127		AM_RANGE(0x00880, 0x0bfff) AM_RAM
2128
2129		AM_RANGE(0x0c000, 0x0cfff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
2130		AM_RANGE(0x0d000, 0x0d7ff) AM_RAM_WRITE(raiden2_background_w) AM_BASE(back_data)
2131		AM_RANGE(0x0d800, 0x0dfff) AM_RAM_WRITE(raiden2_foreground_w) AM_BASE(fore_data)
2132		AM_RANGE(0x0e000, 0x0e7ff) AM_RAM_WRITE(raiden2_midground_w) AM_BASE(mid_data)
2133		AM_RANGE(0x0e800, 0x0f7ff) AM_RAM_WRITE(raiden2_text_w) AM_BASE(text_data)
2134		AM_RANGE(0x0f800, 0x0ffff) AM_RAM /* Stack area */
2135		AM_RANGE(0x10000, 0x1efff) AM_RAM
2136		AM_RANGE(0x1f000, 0x1ffff) AM_RAM AM_WRITE_LEGACY(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
2137
2138		/* not sure of bank sizes etc. */
2139		AM_RANGE(0x20000, 0x2ffff) AM_ROMBANK("bank1")
2140		AM_RANGE(0x30000, 0x3ffff) AM_ROMBANK("bank2")
2141		AM_RANGE(0x40000, 0x4ffff) AM_ROMBANK("bank3")
2142		AM_RANGE(0x50000, 0x5ffff) AM_ROMBANK("bank4")
2143		AM_RANGE(0x60000, 0x6ffff) AM_ROMBANK("bank5")
2144		AM_RANGE(0x70000, 0x7ffff) AM_ROMBANK("bank6")
2145		AM_RANGE(0x80000, 0x8ffff) AM_ROMBANK("bank7")
2146		AM_RANGE(0x90000, 0x9ffff) AM_ROMBANK("bank8")
2147		AM_RANGE(0xa0000, 0xaffff) AM_ROMBANK("bank9")
2148		AM_RANGE(0xb0000, 0xbffff) AM_ROMBANK("bank10")
2149		AM_RANGE(0xc0000, 0xcffff) AM_ROMBANK("bank11")
2150		AM_RANGE(0xd0000, 0xdffff) AM_ROMBANK("bank12")
2151		AM_RANGE(0xe0000, 0xeffff) AM_ROMBANK("bank13")
2152		AM_RANGE(0xf0000, 0xfffff) AM_ROMBANK("bank14")
2153		ADDRESS_MAP_END
2154
2155
2156		static INPUT_PORTS_START( rdx_v33 )
2157		PORT_START("SYSTEM")
2158		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
2159		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
2160		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
2161		PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
2162		PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eeprom_read_bit)
2163		PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
2164		PORT_DIPNAME( 0x0040, 0x0040, "Test Mode" )
2165		PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
2166		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2167		PORT_BIT( 0xff80, IP_ACTIVE_LOW, IPT_UNUSED )
2168
2169		PORT_START("INPUT")
2170		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
2171		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
2172		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
2173		PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
2174		PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
2175		PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
2176		PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
2177		PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
2178		PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
2179		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2180		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
2181		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
2182		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
2183		PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
2184		PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
2185		PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
2186		PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
2187		PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
2188		PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
2189		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2190		INPUT_PORTS_END
2191
2192
2193		static INPUT_PORTS_START( nzerotea )
2194
2195		SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
2196
2197		PORT_START("SYSTEM")
2198		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
2199		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
2200		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
2201		PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
2202		//PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eeprom_read_bit)
2203		PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
2204		PORT_DIPNAME( 0x0040, 0x0040, "Test Mode" )
2205		PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
2206		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2207		PORT_BIT( 0xff80, IP_ACTIVE_LOW, IPT_UNUSED )
2208
2209		PORT_START("INPUT")
2210		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
2211		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
2212		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
2213		PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
2214		PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
2215		PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
2216		PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
2217		PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
2218		PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
2219		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2220		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
2221		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
2222		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
2223		PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
2224		PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
2225		PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
2226		PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
2227		PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
2228		PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
2229		PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2230		INPUT_PORTS_END
2231
2232
2233		static INTERRUPT_GEN( rdx_v33_interrupt )
2234		{
2235		cpu_set_input_line_and_vector(device, 0, HOLD_LINE, 0xc0/4); /* VBL */
2236		logerror("VSYNC\n");
2237		}
2238
2239		static MACHINE_RESET( rdx_v33 )
2240		{
2241		raiden2_state *state = machine->driver_data<raiden2_state>();
2242		state->common_reset();
2243		}
2244
2245		static MACHINE_CONFIG_START( rdx_v33, raiden2_state )
2246
2247		/* basic machine hardware */
2248		MDRV_CPU_ADD("maincpu", V33, 32000000/2 ) // ?
2249		MDRV_CPU_PROGRAM_MAP(rdx_v33_map)
2250		MDRV_CPU_VBLANK_INT("screen", rdx_v33_interrupt)
2251
2252		MDRV_MACHINE_RESET(rdx_v33)
2253
2254		MDRV_EEPROM_93C46_ADD("eeprom")
2255
2256		/* video hardware */
2257		MDRV_SCREEN_ADD("screen", RASTER)
2258		MDRV_SCREEN_REFRESH_RATE(60)
2259		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
2260		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
2261		MDRV_SCREEN_SIZE(648, 648)
2262		MDRV_SCREEN_VISIBLE_AREA(58, 438-1, 1, 30*8)
2263
2264		MDRV_GFXDECODE(raiden2)
2265		MDRV_PALETTE_LENGTH(2048)
2266
2267		MDRV_VIDEO_START(raiden2)
2268		MDRV_VIDEO_UPDATE(raiden2)
2269
2270		/* sound hardware */
2271		MDRV_SPEAKER_STANDARD_MONO("mono")
2272
2273		MDRV_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified
2274		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
2275		MACHINE_CONFIG_END
2276
2277
2278
2279		static DRIVER_INIT(rdx_v33)
2280		{
2281		UINT8 *prg = memory_region(machine, "maincpu");
2282		memory_set_bankptr(machine, "bank1",&prg[0x020000]);
2283		memory_set_bankptr(machine, "bank2",&prg[0x030000]);
2284		memory_set_bankptr(machine, "bank3",&prg[0x040000]);
2285		memory_set_bankptr(machine, "bank4",&prg[0x050000]);
2286		memory_set_bankptr(machine, "bank5",&prg[0x060000]);
2287		memory_set_bankptr(machine, "bank6",&prg[0x070000]);
2288		memory_set_bankptr(machine, "bank7",&prg[0x080000]);
2289		memory_set_bankptr(machine, "bank8",&prg[0x090000]);
2290		memory_set_bankptr(machine, "bank9",&prg[0x0a0000]);
2291		memory_set_bankptr(machine, "bank10",&prg[0x0b0000]);
2292		memory_set_bankptr(machine, "bank11",&prg[0x0c0000]);
2293		memory_set_bankptr(machine, "bank12",&prg[0x0d0000]);
2294		memory_set_bankptr(machine, "bank13",&prg[0x0e0000]);
2295		memory_set_bankptr(machine, "bank14",&prg[0x0f0000]);
2296
2297		raiden2_decrypt_sprites(machine);
2298		}
2299
2300
2301	2243	/* GAME DRIVERS */
2302	2244
2303		GAME( 1993, raiden2, 0, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden II (set 1, US Fabtek)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2304		GAME( 1993, raiden2a, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden II (set 2, Metrotainment)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2305		GAME( 1993, raiden2b, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu", "Raiden II (set 3, Japan)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2306		GAME( 1993, raiden2c, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu", "Raiden II (set 4, Italy)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2307		GAME( 1993, raiden2d, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu", "Raiden II (set 5, Easy Version)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2308		GAME( 1993, raiden2e, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu", "Raiden II (set 6)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2309		GAME( 1994, raidndx, 0, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu", "Raiden DX (UK)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2310		GAME( 1994, raidndxa1,raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden DX (Asia set 1)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2311		GAME( 1994, raidndxa2,raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden DX (Asia set 2)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2312		GAME( 1994, raidndxj, raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu", "Raiden DX (Japan)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2313		GAME( 1994, raidndxu, raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden DX (US)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2314		GAME( 1994, raidndxg, raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu (Tuning license)", "Raiden DX (Germany)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2315		GAME( 1993, zeroteam, 0, raiden2, raiden2, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team (set 1)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2316		GAME( 1993, zeroteama,zeroteam,raiden2, raiden2, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team (set 2)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2317		GAME( 1993, zeroteamb,zeroteam,raiden2, raiden2, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team (set 3)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2318		GAME( 1993, zeroteamc,zeroteam,raiden2, raiden2, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team (set 4)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2319		GAME( 1993, zeroteams,zeroteam,raiden2, raiden2, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team Selection", GAME_NOT_WORKING\|GAME_NO_SOUND)
2320		GAME( 1995, xsedae, 0, raiden2, raiden2, xsedae, ROT0, "Dream Island", "X Se Dae Quiz", GAME_NOT_WORKING\|GAME_NO_SOUND)
	2245	// rev numbers at end of the line just indicate which sets are the same code revisions (just a region byte change), they don't reflect the actual order of release
	2246	GAME( 1993, raiden2, 0, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden II (set 1, US Fabtek)", GAME_NOT_WORKING) // rev 1
	2247	GAME( 1993, raiden2a, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden II (set 2, Metrotainment)", GAME_NOT_WORKING) // ^
	2248	GAME( 1993, raiden2b, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu", "Raiden II (set 3, Japan)", GAME_NOT_WORKING) // ^
	2249	GAME( 1993, raiden2c, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu", "Raiden II (set 4, Italy)", GAME_NOT_WORKING) // rev 2
	2250	GAME( 1993, raiden2d, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu", "Raiden II (set 5, Easy Version)", GAME_NOT_WORKING) // rev 3
	2251	GAME( 1993, raiden2e, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu", "Raiden II (set 6)", GAME_NOT_WORKING) // rev 4
	2252	GAME( 1993, raiden2f, raiden2, raiden2, raiden2, raiden2, ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden II (set 7, US Fabtek)", GAME_NOT_WORKING) // ^
2321	2253
2322		// 'V33 system type_b' - uses V33 CPU, COPX-D3 external protection rom, but still has the proper sound system
2323		GAME( 1993, nzerotea, zeroteam, nzerotea, nzerotea, nzerotea, ROT0, "Seibu Kaihatsu", "New Zero Team", GAME_NOT_WORKING\|GAME_NO_SOUND) // this uses a v33 and COPD3
	2254	GAME( 1994, raidndx, 0, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu", "Raiden DX (UK)", GAME_NOT_WORKING\|GAME_NO_SOUND)
	2255	GAME( 1994, raidndxa1,raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden DX (Asia set 1)", GAME_NOT_WORKING\|GAME_NO_SOUND)
	2256	GAME( 1994, raidndxa2,raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden DX (Asia set 2)", GAME_NOT_WORKING\|GAME_NO_SOUND)
	2257	GAME( 1994, raidndxj, raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu", "Raiden DX (Japan)", GAME_NOT_WORKING\|GAME_NO_SOUND)
	2258	GAME( 1994, raidndxu, raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden DX (US)", GAME_NOT_WORKING\|GAME_NO_SOUND)
	2259	GAME( 1994, raidndxg, raidndx, raiden2, raidendx, raiden2, ROT270, "Seibu Kaihatsu (Tuning license)", "Raiden DX (Germany)", GAME_NOT_WORKING\|GAME_NO_SOUND)
2324	2260
2325		// newer PCB, with V33 CPU and COPD3 protection, but weak sound hardware. - was marked as Raiden DX New in the rom dump, but boots as Raiden 2 New version, is it switchable?
2326		GAME( 1996, r2dx_v33, 0, rdx_v33, rdx_v33, rdx_v33, ROT270, "Seibu Kaihatsu", "Raiden II / DX (newer V33 PCB)", GAME_NOT_WORKING\|GAME_NO_SOUND)
	2261	GAME( 1993, zeroteam, 0, zeroteam, zeroteam, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team (set 1)", GAME_NOT_WORKING)
	2262	GAME( 1993, zeroteama,zeroteam,zeroteam, zeroteam, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team (set 2)", GAME_NOT_WORKING)
	2263	GAME( 1993, zeroteamb,zeroteam,zeroteam, zeroteam, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team (set 3)", GAME_NOT_WORKING)
	2264	GAME( 1993, zeroteamc,zeroteam,zeroteam, zeroteam, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team (set 4)", GAME_NOT_WORKING)
	2265	GAME( 1993, zeroteams,zeroteam,zeroteam, zeroteam, raiden2, ROT0, "Seibu Kaihatsu", "Zero Team Selection", GAME_NOT_WORKING)
	2266
	2267	GAME( 1995, xsedae, 0, xsedae, xsedae, xsedae, ROT0, "Dream Island", "X Se Dae Quiz", GAME_NOT_WORKING)

src/mame/drivers/vpoker.c
r9812	r9813
723	723
724	724
725	725	GAME( 198?, vpoker, 0, vpoker, vpoker, 0, ROT0, "Videotronics", "Videotronics Poker", GAME_NOT_WORKING \| GAME_NO_SOUND )
726		GAME( 198?, 5acespkr, 0, vpoker, 5acespkr, 0, ROT0, "Unknown", "5-Aces Poker", GAME_NOT_WORKING \| GAME_NO_SOUND )
	726	GAME( 198?, 5acespkr, 0, vpoker, 5acespkr, 0, ROT0, "<unknown>", "5-Aces Poker", GAME_NOT_WORKING \| GAME_NO_SOUND )

src/mame/drivers/cb2001.c
r9812	r9813
50	50	static const UINT8 cb2001_decryption_table[256] = {
51	51	0xe8,xxxx,xxxx,xxxx,0x80,0xe4,0x12,0x2f, 0x3c,xxxx,xxxx,0x23,xxxx,xxxx,xxxx,0x5f, /* 00 */
52	52	// ---- ---- **** pppp pppp pppp pppp pppp
53		0x86,xxxx,xxxx,0x27,0x1c,xxxx,xxxx,xxxx, 0x32,xxxx,0xa0,0xd3,0x3a,0x14,0x89,0x1f, /* 10 */
54		// wwww **** pppp pppp pppp pppp pppp pppp pppp pppp
	53	0x86,xxxx,xxxx,0x27,0x1c,xxxx,xxxx,xxxx, 0x32,0x40,0xa0,0xd3,0x3a,0x14,0x89,0x1f, /* 10 */
	54	// wwww **** pppp pppp pppp pppp pppp pppp pppp pppp pppp
55	55	xxxx,0x8e,xxxx,0x0f,xxxx,0x49,0xb5,xxxx, 0x56,xxxx,xxxx,0x75,0x33,0xb6,xxxx,0x39, /* 20 */
56	56	// !!!! pppp pppp pppp pppp pppp pppp pppp ****
57	57	0x89,xxxx,xxxx,xxxx,xxxx,0x22,0x5b,xxxx, xxxx,xxxx,0x74,xxxx,xxxx,0xa6,xxxx,0x74, /* 30 */
58	58	// wwww **** pppp debu pppp pppp
59	59	xxxx,0xea,xxxx,xxxx,0xd0,0xb0,0x5e,xxxx, xxxx,0xa2,xxxx,xxxx,0xa3,xxxx,xxxx,0xb3, /* 40 */
60	60	// !!!! **** pppp pppp pppp pppp pppp
61		xxxx,xxxx,0x2c,xxxx,0x9d,xxxx,0x42,0xc0, 0x04,xxxx,0xb7,xxxx,0xeb,0xab,xxxx,xxxx, /* 50 */
62		// pppp ** pppp pppp ** pppp pppp
	61	0x13,xxxx,0x2c,xxxx,0x9d,xxxx,0x42,0xc0, 0x04,xxxx,0xb7,xxxx,0xeb,0xab,xxxx,xxxx, /* 50 */
	62	// ???? pppp ** pppp pppp ** pppp pppp
63	63	xxxx,xxxx,xxxx,xxxx,0x0a,xxxx,xxxx,xxxx, 0xa1,0xa5,xxxx,xxxx,xxxx,0xbb,0xba,xxxx, /* 60 */
64	64	// pppp pppp pppp pppp pppp
65	65	0xc3,0x53,0x02,0x58,xxxx,xxxx,0x24,xxxx, 0x72,xxxx,0xf3,xxxx,xxxx,0x43,xxxx,0x34, /* 70 */
r9812	r9813
74	74	// pppp pppp pppp pppp pppp pppp **** pppp pppp
75	75	0xcb,0xec,0xee,xxxx,xxxx,0xe2,0x87,xxxx, xxxx,xxxx,0x76,0x61,0x48,xxxx,0x2e,xxxx, /* C0 */
76	76	// pppp pppp pppp pppp pppp pppp ** ** pppp
77		xxxx,0xf2,0x46,xxxx,0x60,xxxx,0x4f,0x47, 0x88,xxxx,xxxx,0x04,xxxx,0xfa,0xc7,0x8b, /* D0 */
78		// ???? pppp ** pppp pppp pppp wwww ** !!!! pppp
	77	xxxx,0xf2,0x46,xxxx,0x60,xxxx,0x4f,0x47, 0x88,xxxx,xxxx,0xff,xxxx,0xfa,0xc7,0x8b, /* D0 */
	78	// ???? pppp ** pppp pppp pppp pppp ** !!!! pppp
79	79	0x8a,0xb1,xxxx,0xc6,xxxx,0x5a,xxxx,0xb2, 0x9a,0x52,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* E0 */
80	80	// pppp gggg !!!! ** pppp pppp **
81	81	xxxx,0xae,0xfe,xxxx,xxxx,xxxx,xxxx,0x2a, xxxx,xxxx,0x04,xxxx,0x81,xxxx,xxxx,xxxx, /* F0 */
r9812	r9813
792	792
793	793	static const nec_config cb2001_config = { cb2001_decryption_table, };
794	794	static MACHINE_CONFIG_START( cb2001, driver_device )
795		MDRV_CPU_ADD("maincpu", V30, 20000000) // CPU91A-011-0016JK004; encrypted cpu like nec v25/35 used in some irem game
	795	MDRV_CPU_ADD("maincpu", V35, 20000000) // CPU91A-011-0016JK004; encrypted cpu like nec v25/35 used in some irem game
796	796	MDRV_CPU_CONFIG(cb2001_config)
797	797	MDRV_CPU_PROGRAM_MAP(cb2001_map)
798	798	MDRV_CPU_IO_MAP(cb2001_io)

src/mame/drivers/tankbust.c
r9812	r9813
325	325	static MACHINE_CONFIG_START( tankbust, driver_device )
326	326
327	327	/* basic machine hardware */
328		MDRV_CPU_ADD("maincpu", Z80, 4~~000000~~) /* 4 ~~MHz~~ ? */
	328	MDRV_CPU_ADD("maincpu", Z80, XTAL_14_31818MHz/2) /* Verified on PCB */
329	329	MDRV_CPU_PROGRAM_MAP(main_map)
330	330	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
331	331
332		MDRV_CPU_ADD("sub", Z80, 4000000) /* 3.072 MHz ? */
	332	MDRV_CPU_ADD("sub", Z80, XTAL_14_31818MHz/4) /* Verified on PCB */
	333	// MDRV_CPU_ADD("sub", Z80, XTAL_14_31818MHz/3) /* Accurate to audio recording, but apparently incorrect clock */
	334
333	335	MDRV_CPU_PROGRAM_MAP(map_cpu2)
334	336	MDRV_CPU_IO_MAP(port_map_cpu2)
335	337
r9812	r9813
357	359	/* sound hardware */
358	360	MDRV_SPEAKER_STANDARD_MONO("mono")
359	361
360		MDRV_SOUND_ADD("ay1", AY8910, ~~2000000~~)
	362	MDRV_SOUND_ADD("ay1", AY8910, XTAL_14_31818MHz/16) /* Verified on PCB */
361	363	MDRV_SOUND_CONFIG(ay8910_config)
362	364	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
363	365
364		MDRV_SOUND_ADD("ay2", AY8910, ~~2000000~~)
	366	MDRV_SOUND_ADD("ay2", AY8910, XTAL_14_31818MHz/16) /* Verified on PCB */
365	367	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
366	368	MACHINE_CONFIG_END
367	369

src/mame/drivers/pastelg.c
r9812	r9813
380	380	INPUT_PORTS_END
381	381
382	382
	383
	384	static INPUT_PORTS_START( galds )
	385	PORT_INCLUDE(threeds)
	386
	387	PORT_MODIFY("SYSTEM")
	388	// this increases the tip? (has this feature been ripped out of the parent set? there is strange corruption of the line under the 'tip' display)
	389	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	390	PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
	391	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	392	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	393	PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
	394	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	395	INPUT_PORTS_END
	396
383	397	static const ay8910_interface ay8910_config =
384	398	{
385	399	AY8910_LEGACY_OUTPUT,
r9812	r9813
394	408	static MACHINE_CONFIG_START( pastelg, driver_device )
395	409
396	410	/* basic machine hardware */
397		MDRV_CPU_ADD("maincpu", Z80, 19968000/8) /* ~~2.496~~ ~~MHz~~ ? */
	411	MDRV_CPU_ADD("maincpu", Z80, 19968000/4) /* unknown divider, galds definitely relies on this for correct voice pitch */
398	412	MDRV_CPU_PROGRAM_MAP(pastelg_map)
399	413	MDRV_CPU_IO_MAP(pastelg_io_map)
400	414	// MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt,96) // nmiclock not written, chip is 1411M1 instead of 1413M3
r9812	r9813
454	468	static MACHINE_CONFIG_START( threeds, driver_device )
455	469
456	470	/* basic machine hardware */
457		MDRV_CPU_ADD("maincpu", Z80, 19968000/8) /* ~~2.496~~ ~~MHz~~ ? */
	471	MDRV_CPU_ADD("maincpu", Z80, 19968000/4) /* unknown divider, galds definitely relies on this for correct voice pitch */
458	472	MDRV_CPU_PROGRAM_MAP(pastelg_map)
459	473	MDRV_CPU_IO_MAP(threeds_io_map)
460	474	MDRV_CPU_VBLANK_INT("screen", irq0_line_assert)
r9812	r9813
533	547	ROM_LOAD( "mb7112e.7j", 0x0020, 0x0020, CRC(181f2a88) SHA1(a75ea981127fc667bb6b9f2ae2766aa2147ff04a) )
534	548	ROM_END
535	549
	550	// might be a bootleg (or licensed) board? had a sub-board (containing only logic) marked "Sky Dragon" and there were no Nichibutsu markings on any of the PCBs or chips
	551	ROM_START( galds )
	552	ROM_REGION( 0x10000, "maincpu", 0 ) /* program */
	553	ROM_LOAD( "dg8.ic3", 0x00000, 0x04000, CRC(06c6a98f) SHA1(828deef4e725cafef5088fc2dfab63b62ae0feb0) )
	554	ROM_LOAD( "dg9.ic2", 0x04000, 0x04000, CRC(a53eca09) SHA1(001ebb04378e6d7dd5ad15b272e1346655b91eee))
	555	ROM_LOAD( "dg10.ic1", 0x08000, 0x04000, CRC(6c380c64) SHA1(3f6b037a8a40fd5c4bc3b469ee3c9f1e1bd302a0) )
536	556
537		GAME( 1985, pastelg, 0, pastelg, pastelg, pastelg, ROT0, "Nichibutsu", "Pastel Gal (Japan 851224)", 0 )
538		GAME( 1985, 3ds, 0, threeds, threeds, pastelg, ROT0, "Nichibutsu", "Three Ds - Three Dealers Casino House", 0 )
	557	ROM_REGION( 0x08000, "voice", ROMREGION_ERASE00 ) /* voice */
	558
	559	ROM_REGION( 0x38000, "gfx1", 0 ) /* gfx - the same as 3ds */
	560	ROM_LOAD( "dg1.ic11", 0x00000, 0x08000, CRC(5734ca7d) SHA1(d22b9e604cc4e2c0bb4eb32ded06bb5fa519965f) )
	561	ROM_LOAD( "dg2.ic10", 0x08000, 0x08000, CRC(c7f21718) SHA1(4b2956d499e4db63e7f2329420e3d0313e6360ed) )
	562	ROM_LOAD( "dg3.ic9", 0x10000, 0x08000, CRC(87bd0a9e) SHA1(a0443017ef4c19f0135c4f764a96457f02cda743) )
	563	ROM_LOAD( "dg4.ic8", 0x18000, 0x08000, CRC(b75ecf2b) SHA1(50b8f27988dd24ff475a500d361db3c7a7051f40) )
	564	ROM_LOAD( "dg5.ic7", 0x20000, 0x08000, CRC(22ee5cf6) SHA1(09725a73f5f107e6fcb1994d94a50748726318b0) )
	565	ROM_LOAD( "dg6.ic6", 0x28000, 0x08000, CRC(d86ebe8d) SHA1(2ede43899501ae27db26b48f53f010a4f0df0307) )
	566	ROM_LOAD( "dg7.ic5", 0x30000, 0x08000, CRC(6704950a) SHA1(fd60ff2351deb87f19e517cfaedc7ac3dd4aac8d) )
	567
	568	ROM_REGION( 0x0040, "proms", 0 ) /* color */
	569	ROM_LOAD( "mb7112e.7h", 0x0000, 0x0020, CRC(2c4f7343) SHA1(7b069c4a4d68ef308d1c1f773ece4b124428da3f) )
	570	ROM_LOAD( "mb7112e.7j", 0x0020, 0x0020, CRC(181f2a88) SHA1(a75ea981127fc667bb6b9f2ae2766aa2147ff04a) )
	571	ROM_END
	572
	573
	574
	575	GAME( 1985, pastelg, 0, pastelg, pastelg, pastelg, ROT0, "Nichibutsu", "Pastel Gal (Japan 851224)", 0 )
	576	GAME( 1985, 3ds, 0, threeds, threeds, pastelg, ROT0, "Nichibutsu", "Three Ds - Three Dealers Casino House", 0 )
	577	GAME( 1985, galds, 3ds, threeds, galds, pastelg, ROT0, "Nihon System Corp.", "Gals Ds - Three Dealers Casino House (bootleg?)", 0 )

src/mame/drivers/alpha68k.c
r9812	r9813
1998	1998	static MACHINE_CONFIG_START( kyros, alpha68k_state )
1999	1999
2000	2000	/* basic machine hardware */
2001		MDRV_CPU_ADD("maincpu", M68000, 6000000) /* 24MHz/4? */
	2001	MDRV_CPU_ADD("maincpu", M68000, XTAL_24MHz/4) /* Verified on bootleg PCB */
2002	2002	MDRV_CPU_PROGRAM_MAP(kyros_map)
2003	2003	MDRV_CPU_VBLANK_INT_HACK(alpha68k_interrupt,2)
2004	2004
2005		MDRV_CPU_ADD("audiocpu", Z80, ~~35795~~45)
	2005	MDRV_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) /* Verified on bootleg PCB */
2006	2006	MDRV_CPU_PROGRAM_MAP(kyros_sound_map)
2007	2007	MDRV_CPU_IO_MAP(kyros_sound_portmap)
2008	2008	//AT
r9812	r9813
2030	2030	//AT
2031	2031	MDRV_SPEAKER_STANDARD_MONO("mono")
2032	2032
2033		MDRV_SOUND_ADD("ym1", YM2203, ~~3000000~~)
	2033	MDRV_SOUND_ADD("ym1", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
2034	2034	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.35)
2035	2035
2036		MDRV_SOUND_ADD("ym2", YM2203, ~~3000000~~)
	2036	MDRV_SOUND_ADD("ym2", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
2037	2037	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.35)
2038	2038
2039		MDRV_SOUND_ADD("ym3", YM2203, ~~3000000~~)
	2039	MDRV_SOUND_ADD("ym3", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
2040	2040	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90)
2041	2041
2042	2042	MDRV_SOUND_ADD("dac", DAC, 0)

src/mame/drivers/atarisy1.c
r9812	r9813
165	165	NMI = latch on sound command
166	166	========================================================================
167	167
	168
	169	Game Identification (information sourced from internal Atari Vax emails)
	170
	171	All System I games are required to initialize a byte in the configuration area
	172	(at 01006E specifically) to a certain value. The utility system on the main
	173	board interrogates this byte to determine if a new game cart has been installed
	174	and clears the EEROM accordingly.
	175
	176	Here is the list, which includes confirmed (*) and unconfirmed values:
	177
	178	Diagnostic Cartridge: 255
	179	Peter Packrat: 000*
	180	Marble Madness: 001*
	181	Indiana Jones - Temple of Doom: 002*
	182	Road Runner: 003*
	183	Relief Pitcher (unreleased): 004
	184	Off-Road (unreleased): 004
	185	RoadBlasters (aka Future Vette):005*
	186
	187
168	188	****************************************************************************/
169	189
170	190

src/mame/drivers/ghosteo.c
r9812	r9813
54	54	#include "emu.h"
55	55	#include "cpu/arm7/arm7.h"
56	56	#include "cpu/arm7/arm7core.h"
	57	#include "machine/s3c2410.h"
	58	//#include "machine/smartmed.h"
	59	#include "machine/i2cmem.h"
57	60
58	61	static UINT32 *system_memory;
59		static UINT32 *flash_regs;
60		static UINT32 *lcd_control;
61		static UINT32 *io_port;
	62	static UINT32 *steppingstone;
62	63
63		//static UINT32 fifoh[16];
64		//static UINT32 fifol[12];
65
66		static struct lcd_config
67		{
68		int screen_type;
69		int bpp_mode;
70		int lcd_bank;
71		int lcd_base_u;
72		int lcd_base_sel;
73		int line_val;
74		int hoz_val;
75		int off_size;
76		int page_width;
77		} lcd;
78
79		static READ32_HANDLER( r1 )
80		{
81		// int pc = cpu_get_pc(space->cpu);
82		// if(pc != 0x9a0 && pc != 0x7b4) printf("r1 @ %X\n",pc);
83
84		return 1;
85		}
86
87		static READ32_HANDLER( r2 )
88		{
89		// int pc = cpu_get_pc(space->cpu);
90		// if(pc != 0xd64 && pc != 0xd3c )printf("r2 @ %X\n",pc);
91
92		return 2;
93		}
94
95		static UINT32 flash_addr = 0;
96		static int flash_addr_step = 0;
97
98		#define ADDR_STEP_CONFIG 4
99
100		static WRITE32_HANDLER( flash_reg_w )
101		{
102		COMBINE_DATA(&flash_regs[offset]);
103
104		switch(offset)
105		{
106		case 0:
107		//if((flash_regs[offset] & 0xff) != 0x60)
108		// printf("%08x\n",flash_regs[offset]);
109		break;
110		case 1:
111		break;
112		case 2:
113
114		switch(flash_addr_step)
115		{
116		case 0: flash_addr = data << 0; break;
117		case 1: flash_addr \|= data << 8; break;
118		case 2: flash_addr \|= data << 16; break;
119		case 3: flash_addr \|= data << 24; break;
120		}
121
122		if(flash_addr_step == (ADDR_STEP_CONFIG - 1))
123		{
124		flash_addr <<=1;
125		}
126
127		flash_addr_step = (flash_addr_step + 1) % ADDR_STEP_CONFIG;
128
129		break;
130		}
131		}
132
133		static READ32_HANDLER( flash_reg_r )
134		{
135		// always read back what it's written?
136		return flash_regs[offset];
137		}
138
139		static READ32_HANDLER( flash_r )
140		{
141		UINT8 flash = (UINT8 )memory_region(space->machine, "user1");
142		UINT8 value = flash[flash_addr];
143		flash_addr = (flash_addr + 1) % memory_region_length(space->machine, "user1");
144		return value;
145		}
146
147		static READ32_HANDLER( flash_ecc_r )
148		{
149		//TODO
150
151		if((flash_addr & 0x0fff) == 0)
152		{
153		//printf("%08x\n",flash_addr);
154		return 1;
155		}
156
157		return 0;
158		}
159
160		static WRITE32_HANDLER( debug_w )
161		{
162		#if 1
163		mame_printf_debug("%c",data & 0xff); //debug texts
164		#endif
165		}
166
167	64	/*
168		a) cpu #0 (PC=000007D0): unmapped program memory dword read from 4E000014 & 000000FF
169		b) cpu #0 (PC=000007D8): unmapped program memory dword read from 4E000014 & 0000FF00
170		c) cpu #0 (PC=000007E0): unmapped program memory dword read from 4E000014 & 00FF0000
171		1) read flash @ 0812
172		2) read flash @ 0813
173		3) read flash @ 0814
174		4) read flash @ 0815
175		5) read flash @ 0816
176		6) read flash @ 0817
177
178		a == 1
179		b == 2
180		c == 3
181		6 == 0xff
182
183		*/
184
185		// PC: 574 check -> jumps to execute code from ram
186
187		/*
188	65	Power management:
189	66	Normal, Idle, Slow & Power-off
190	67	4-ch 16 bit PWM ( Pulse Width Modulation), & 1-ch 16-bit timer for OS
r9812	r9813
206	83	24-ch external interrupts Controller (Wake-up source 16-ch)
207	84	*/
208	85
209		static READ32_HANDLER( lcd_control_r )
	86	static int security_count = 0;
	87	static const UINT8 security_data[] = { 0x01, 0xC4, 0xFF, 0x22 };
	88
	89	static UINT32 bballoon_port[20];
	90
	91	enum nand_mode_t
210	92	{
211		switch(offset)
212		{
213		case 0x00/4:
214		{
215		int line_val = space->machine->primary_screen->vpos() & 0x3ff;
216		return (lcd_control[offset] & ~(0x3ff << 18)) \| ((lcd.line_val - line_val) << 18);
217		}
	93	NAND_M_INIT, // initial state
	94	NAND_M_READ, // read page data
	95	};
218	96
219		case 0x10/4:
220		{
221		//TODO: VSTATUS, HSTATUS
	97	struct nand_t
	98	{
	99	nand_mode_t mode;
	100	int page_addr;
	101	int byte_addr;
	102	int addr_load_ptr;
	103	};
222	104
223		static int VSTATUS = 0;
224		VSTATUS ^= 0x18000;
	105	static struct nand_t nand;
225	106
226		return (lcd_control[offset] & ~0x18000) \| VSTATUS;
	107	static UINT32 s3c2410_gpio_port_r( running_device *device, int port)
	108	{
	109	UINT32 data = bballoon_port[port];
	110	switch (port)
	111	{
	112	case S3C2410_GPIO_PORT_F :
	113	{
	114	data = (data & ~0xFF) \| security_data[security_count]; // bballoon security @ 0x3001BD68
227	115	}
228
229		default:
	116	break;
	117	case S3C2410_GPIO_PORT_G :
230	118	{
231		return lcd_control[offset];
	119	data = data ^ 0x20;
	120	bballoon_port[port] = data;
232	121	}
	122	break;
233	123	}
	124	return data;
234	125	}
235	126
236		static ~~WRITE~~32_~~HANDLER~~( lcd_contro~~l_w~~ )
	127	static void s3c2410_gpio_port_w( running_device *device, int port, UINT32 data)
237	128	{
238		COMBINE_DATA(&lcd_control[offset]);
239
240		switch(offset)
	129	UINT32 old_value = bballoon_port[port];
	130	bballoon_port[port] = data;
	131	switch (port)
241	132	{
242		case ~~0x00/~~4:
	133	case S3C2410_GPIO_PORT_F :
243	134	{
244		int line_val = space->machine->primary_screen->vpos() & 0x3ff;
245		int bpp_mode = (lcd_control[offset] & 0x1e) >> 1;
246		int screen_type = (lcd_control[offset] & 0x60) >> 5;
247
248		lcd.screen_type = screen_type;
249		lcd.bpp_mode = bpp_mode;
250
251		if(bpp_mode != 12)
252		printf("bpp mode= %d\n",bpp_mode);
253
254		lcd_control[offset] = (lcd_control[offset] & ~(0x3ff << 18)) \| ((lcd.line_val - line_val) << 18);
255
256		break;
	135	switch (data)
	136	{
	137	case 0x04 : security_count = 0; break;
	138	case 0x44 : security_count = 2; break;
	139	}
257	140	}
258
259		case 0x04/4:
	141	break;
	142	case S3C2410_GPIO_PORT_G :
260	143	{
261		int line_val = (lcd_control[offset] >> 14) & 0x3ff;
262
263		lcd.line_val = line_val;
264
265		break;
	144	// 0 -> 1
	145	if (((data & 0x10) != 0) && ((old_value & 0x10) == 0))
	146	{
	147	logerror( "security_count %d -> %d\n", security_count, security_count + 1);
	148	security_count++;
	149	if (security_count > 7) security_count = 0;
	150	}
266	151	}
	152	break;
	153	}
	154	}
267	155
268		case 0x08/4:
	156	static WRITE8_DEVICE_HANDLER( s3c2410_nand_command_w )
	157	{
	158	// running_device *nand = device->machine->device( "nand");
	159	logerror( "s3c2410_nand_command_w %02X\n", data);
	160	switch (data)
	161	{
	162	case 0xFF :
269	163	{
270		int hoz_val = (lcd_control[offset] >> 8) & 0x3ff;
271
272		lcd.hoz_val = hoz_val;
273
274		break;
	164	nand.mode = NAND_M_INIT;
	165	s3c2410_pin_frnb_w( device, 1);
275	166	}
276
277		case 0x10/4:
	167	break;
	168	case 0x00 :
278	169	{
279		/*
280		int frm565 = (lcd_control[offset] >> 11) & 1;
281		int inv_vd = (lcd_control[offset] >> 7) & 1;
282		int bs_swp = (lcd_control[offset] >> 1) & 1;
283		int hw_swp = (lcd_control[offset] >> 0) & 1;
284		*/
285
286		break;
	170	nand.mode = NAND_M_READ;
	171	nand.page_addr = 0;
	172	nand.addr_load_ptr = 0;
287	173	}
	174	break;
	175	}
	176	}
288	177
289		case 0x14/4:
	178	static WRITE8_DEVICE_HANDLER( s3c2410_nand_address_w )
	179	{
	180	// running_device *nand = device->machine->device( "nand");
	181	logerror( "s3c2410_nand_address_w %02X\n", data);
	182	switch (nand.mode)
	183	{
	184	case NAND_M_INIT :
290	185	{
291		UINT32 lcd_bank = (lcd_control[offset] >> 21) & 0x1ff;
292		UINT32 lcd_base_u = (lcd_control[offset] >> 0) & 0x1fffff;
293
294		lcd.lcd_bank = lcd_bank;
295		lcd.lcd_base_u = lcd_base_u;
296
297		break;
	186	logerror( "nand: unexpected address port write\n");
298	187	}
299
300		case 0x18/4:
	188	break;
	189	case NAND_M_READ :
301	190	{
302		UINT32 lcd_base_sel = (lcd_control[offset] >> 0) & 0x1fffff;
303
304		lcd.lcd_base_sel = lcd_base_sel;
305
306		//popmessage("%08x",lcd.lcd_base_sel);
307
308		break;
	191	if (nand.addr_load_ptr == 0)
	192	{
	193	nand.byte_addr = data;
	194	}
	195	else
	196	{
	197	nand.page_addr = (nand.page_addr & ~(0xFF << ((nand.addr_load_ptr - 1) * 8))) \| (data << ((nand.addr_load_ptr - 1) * 8));
	198	}
	199	nand.addr_load_ptr++;
	200	if ((nand.mode == NAND_M_READ) && (nand.addr_load_ptr == 4))
	201	{
	202	s3c2410_pin_frnb_w( device, 0);
	203	s3c2410_pin_frnb_w( device, 1);
	204	}
309	205	}
310
311		case 0x1c/4:
312		{
313		int off_size = (lcd_control[offset] >> 11) & 0x7ff;
314		int page_width = (lcd_control[offset] >> 0) & 0x7ff;
315
316		lcd.off_size = off_size;
317		lcd.page_width = page_width;
318
319		break;
320		}
	206	break;
321	207	}
322	208	}
323	209
324
325		static READ32_HANDLER( io_port_r )
	210	static READ8_DEVICE_HANDLER( s3c2410_nand_data_r )
326	211	{
327		// printf("%08x\n",offset*4);
328
329		switch(offset)
	212	// running_device *nand = device->machine->device( "nand");
	213	UINT8 data = 0;
	214	switch (nand.mode)
330	215	{
331
332		case 0x64/4:
	216	case NAND_M_INIT :
333	217	{
334		static int input = 0;
335		input ^= 0x20;
336
337		// bits from 15-0 can be configured as input/output/...
338		//return input;
339
340		return (io_port[offset] & ~0x20) \| input;
	218	logerror( "nand: unexpected address port read\n");
341	219	}
342
343		default:
	220	break;
	221	case NAND_M_READ :
344	222	{
345		return io_port[offset];
	223	UINT8 flash = (UINT8 )memory_region( device->machine, "user1");
	224	if (nand.byte_addr < 0x200)
	225	{
	226	data = (flash + nand.page_addr 0x200 + nand.byte_addr);
	227	}
	228	else
	229	{
	230	if ((nand.byte_addr >= 0x200) && (nand.byte_addr < 0x204))
	231	{
	232	UINT8 mecc[4];
	233	s3c2410_nand_calculate_mecc( flash + nand.page_addr * 0x200, 0x200, mecc);
	234	data = mecc[nand.byte_addr-0x200];
	235	}
	236	else
	237	{
	238	data = 0xFF;
	239	}
	240	}
	241	nand.byte_addr++;
	242	if (nand.byte_addr == 0x210)
	243	{
	244	nand.byte_addr = 0;
	245	nand.page_addr++;
	246	if (nand.page_addr == 0x10000) nand.page_addr = 0;
	247	}
346	248	}
	249	break;
347	250	}
	251	logerror( "s3c2410_nand_data_r %02X\n", data);
	252	return data;
348	253	}
349	254
350		static WRITE32_HANDLER( io_~~por~~t_w )
	255	static WRITE8_DEVICE_HANDLER( s3c2410_nand_data_w )
351	256	{
352		COMBINE_DATA(&io_port[offset]);
353		// printf("[%08x] <- %08x\n",offset*4,data);
	257	// running_device *nand = device->machine->device( "nand");
	258	logerror( "s3c2410_nand_data_w %02X\n", data);
354	259	}
355	260
	261	static WRITE_LINE_DEVICE_HANDLER( s3c2410_i2c_scl_w )
	262	{
	263	running_device *i2cmem = device->machine->device( "i2cmem");
	264	// logerror( "s3c2410_i2c_scl_w %d\n", state ? 1 : 0);
	265	i2cmem_scl_write( i2cmem, state);
	266	}
356	267
357		static ADDRESS_MAP_START( bballoon_map, ADDRESS_SPACE_PROGRAM, 32 )
358		AM_RANGE(0x00000000, 0x00000fff) AM_ROM AM_REGION("user1", 0)
359		AM_RANGE(0x30000000, 0x31ffffff) AM_RAM AM_BASE(&system_memory)
360		AM_RANGE(0x40000000, 0x40000fff) AM_ROM AM_REGION("user1", 0) // mirror? seems so
361		AM_RANGE(0x48000000, 0x48000033) AM_RAM // memory controller
362
363		AM_RANGE(0x4d000000, 0x4d00001f) AM_READWRITE(lcd_control_r,lcd_control_w) AM_BASE(&lcd_control)
364
365		AM_RANGE(0x4e000000, 0x4e00000b) AM_READWRITE(flash_reg_r, flash_reg_w) AM_BASE(&flash_regs)
366		AM_RANGE(0x4e00000c, 0x4e00000f) AM_READ(flash_r)
367		AM_RANGE(0x4e000010, 0x4e000013) AM_READ(r1)
368		AM_RANGE(0x4e000014, 0x4e000017) AM_READ(flash_ecc_r)
369
370		AM_RANGE(0x50000010, 0x50000013) AM_READ(r2)
371
372		AM_RANGE(0x50000020, 0x50000023) AM_WRITE(debug_w)
373		//AM_RANGE(0x51000040, 0x51000043) AM_READ() // a timer...
374
375		AM_RANGE(0x56000000, 0x56000093) AM_READWRITE(io_port_r, io_port_w) AM_BASE(&io_port)
376
377		ADDRESS_MAP_END
378
379		static INPUT_PORTS_START( bballoon )
380		INPUT_PORTS_END
381
382		static int irq_en = 0;
383
384		static VIDEO_START( bballoon )
	268	static READ_LINE_DEVICE_HANDLER( s3c2410_i2c_sda_r )
385	269	{
	270	running_device *i2cmem = device->machine->device( "i2cmem");
	271	int state;
	272	state = i2cmem_sda_read( i2cmem);
	273	// logerror( "s3c2410_i2c_sda_r %d\n", state ? 1 : 0);
	274	return state;
	275	}
386	276
	277	static WRITE_LINE_DEVICE_HANDLER( s3c2410_i2c_sda_w )
	278	{
	279	running_device *i2cmem = device->machine->device( "i2cmem");
	280	// logerror( "s3c2410_i2c_sda_w %d\n", state ? 1 : 0);
	281	i2cmem_sda_write( i2cmem, state);
387	282	}
388		static int b=0;
389		static VIDEO_UPDATE( bballoon )
	283
	284	static WRITE32_HANDLER( sound_w )
390	285	{
391		if(~~input_code_pressed_once~~(~~screen-~~>ma~~chine,~~ ~~KEYCODE_Q~~))
	286	if ((data >= 0x20) && (data <= 0x7F))
392	287	{
393		irq_en ^= 1;
394		printf("en = %d\n",irq_en);
	288	logerror( "sound_w: music %d\n", data - 0x20);
395	289	}
396
397		if(input_code_pressed(screen->machine, KEYCODE_W))
	290	else if ((data >= 0x80) && (data <= 0xFF))
398	291	{
399
400		printf("b = %d\n",++b);
	292	logerror( "sound_w: effect %d\n", data - 0x80);
401	293	}
402
403		if(input_code_pressed(screen->machine, KEYCODE_E))
	294	else
404	295	{
405
406		printf("b = %d\n",--b);
	296	logerror( "sound_w: unknown (%d)\n", data);
407	297	}
	298	}
408	299
409		if(lcd_control[0] & 1)
410		{
411		// output enabled
	300	static ADDRESS_MAP_START( bballoon_map, ADDRESS_SPACE_PROGRAM, 32 )
	301	AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_BASE(&steppingstone) AM_MIRROR(0x40000000)
	302	AM_RANGE(0x10000000, 0x10000003) AM_READ_PORT("10000000")
	303	AM_RANGE(0x10100000, 0x10100003) AM_READ_PORT("10100000")
	304	AM_RANGE(0x10200000, 0x10200003) AM_READ_PORT("10200000")
	305	AM_RANGE(0x10300000, 0x10300003) AM_WRITE(sound_w)
	306	AM_RANGE(0x30000000, 0x31ffffff) AM_RAM AM_BASE(&system_memory) AM_MIRROR(0x02000000)
	307	ADDRESS_MAP_END
412	308
413		//bballoon setup
414		//TFT 16bpp
415		//5:6:5 format
416		//normal
417		//bs swap disabled
418		//hw swap enabled
	309	/*
	310	static INPUT_PORTS_START( bballoon )
	311	PORT_START("10000000")
	312	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
	313	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
	314	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
	315	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
	316	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
	317	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
	318	PORT_BIT( 0xFFFFFFC0, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
	319	PORT_START("10100000")
	320	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
	321	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
	322	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
	323	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
	324	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	325	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
	326	PORT_BIT( 0xFFFFFFC0, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
	327	PORT_START("10200000")
	328	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
	329	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
	330	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_START1 )
	331	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 )
	332	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_START3 )
	333	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_SERVICE1 ) // "test button"
	334	PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_START4 )
	335	PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_SERVICE2 ) // "service button"
	336	PORT_BIT( 0xFFFFFF00, IP_ACTIVE_LOW, IPT_START5 )
	337	INPUT_PORTS_END
	338	*/
419	339
420		int start_addr = (lcd.lcd_bank << 22) - 0x30000000;
	340	static INPUT_PORTS_START( bballoon )
	341	PORT_START("10000000")
	342	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
	343	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
	344	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
	345	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
	346	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
	347	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
	348	PORT_BIT( 0xFFFFFFC0, IP_ACTIVE_LOW, IPT_UNUSED )
	349	PORT_START("10100000")
	350	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
	351	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
	352	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
	353	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
	354	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	355	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
	356	PORT_BIT( 0xFFFFFFC0, IP_ACTIVE_LOW, IPT_UNUSED )
	357	PORT_START("10200000")
	358	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
	359	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
	360	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_START1 )
	361	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 )
	362	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_SERVICE1 )
	363	PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_SERVICE2 )
	364	PORT_BIT( 0xFFFFFF50, IP_ACTIVE_LOW, IPT_UNUSED )
	365	INPUT_PORTS_END
421	366
422		//popmessage("%08x %08x %08x",lcd.lcd_bank,lcd.lcd_base_sel,lcd.lcd_base_u);
	367	/*
	368	static NAND_INTERFACE( bballoon_nand_intf )
	369	{
	370	DEVCB_DEVICE_LINE("s3c2410", s3c2410_pin_frnb_w)
	371	};
	372	*/
423	373
424		if(start_addr > 0x1ffffff)
425		printf("max = %X\n",start_addr);
426		else
427		{
428		UINT32* videoram = system_memory + start_addr/4 + lcd.lcd_base_u/4;
429		int x,y,count;
	374	static const s3c2410_interface bballoon_s3c2410_intf =
	375	{
	376	// GPIO (port read / port write)
	377	{ s3c2410_gpio_port_r, s3c2410_gpio_port_w },
	378	// I2C (scl write / sda read / sda write)
	379	{ s3c2410_i2c_scl_w, s3c2410_i2c_sda_r, s3c2410_i2c_sda_w },
	380	// ADC (data read)
	381	{ NULL },
	382	// I2S (data write)
	383	{ NULL },
	384	// NAND (command write, address write, data read, data write)
	385	{ s3c2410_nand_command_w, s3c2410_nand_address_w, s3c2410_nand_data_r, s3c2410_nand_data_w }
	386	};
430	387
431		//popmessage("%08x %08x %d",lcd.lcd_base_u,lcd.lcd_base_sel,test);
	388	static const i2cmem_interface i2cmem_interface =
	389	{
	390	I2CMEM_SLAVE_ADDRESS, 0, 256
	391	};
432	392
433		/temp until I understand.../
434		switch(lcd.lcd_base_sel)
435		{
436		case 0x1aac00: count = -81920; break;
437		case 0x192c00: count = -57344; break;
438		default: count = 0;
439		}
440		//count = test;//lcd.lcd_base_sel/4;
441	393
442		for (y=0;y <= 600;y++)
443		{
444		for (x=0;x < 400;x++)
445		{
446		UINT32 color;
447		UINT32 b;
448		UINT32 g;
449		UINT32 r;
	394	running_device* s3c2410;
450	395
451		color = (videoram[count] >> 16) & 0xffff;
	396	static READ32_HANDLER( bballoon_speedup_r )
	397	{
	398	UINT32 ret = s3c24xx_lcd_r(s3c2410, offset+0x10/4, mem_mask);
452	399
453		b = (color & 0x001f) << 3;
454		g = (color & 0x07e0) >> 3;
455		r = (color & 0xf800) >> 8;
456		if(((x*2)+1)<cliprect->max_x && y<cliprect->max_y)
457		BITMAP_ADDR32(bitmap, y, x2+1) = b \| (g<<8) \| (r<<16);
458	400
459		c~~olor~~ = ~~vid~~eoram[cou~~nt] & 0xffff~~;
	401	int pc = cpu_get_pc(space->cpu);
460	402
461		b = (color & 0x001f) << 3;
462		g = (color & 0x07e0) >> 3;
463		r = (color & 0xf800) >> 8;
464		if(((x*2)+0)<cliprect->max_x && y<cliprect->max_y)
465		BITMAP_ADDR32(bitmap, y, x2+0) = b \| (g<<8) \| (r<<16);
466
467		count++;
468		}
469		}
470		}
471
	403	// these are vblank waits
	404	if (pc == 0x3001c0e4 \|\| pc == 0x3001c0d8)
	405	{
	406	// BnB Arcade
	407	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(20));
472	408	}
473		else
	409	else if (pc == 0x3002b580 \|\| pc == 0x3002b550)
474	410	{
475		// output disabled
	411	// Happy Tour
	412	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(20));
476	413	}
	414	//else
	415	// printf("speedup %08x %08x\n", pc, ret);
477	416
478		return 0;
	417	return ret;
479	418	}
480	419
481		static INTE~~RRUPT~~_GEN( bballoon~~_interrupt~~ )
	420	static MACHINE_RESET( bballoon )
482	421	{
483		if(irq_en)
484		cpu_set_input_line(device, ARM7_IRQ_LINE, HOLD_LINE);
485		//cpu_set_input_line(device, ARM7_FIRQ_LINE, HOLD_LINE);
486
487		// irq_en = 0;
	422	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4d000010, 0x4d000013, 0, 0, bballoon_speedup_r);
	423	s3c2410 = machine->device("s3c2410");
488	424	}
489	425
490	426	static MACHINE_CONFIG_START( bballoon, driver_device )
491	427
492	428	/* basic machine hardware */
493		MDRV_CPU_ADD("maincpu", ARM7, 24000000)
	429	MDRV_CPU_ADD("maincpu", ARM9, 200000000)
494	430	MDRV_CPU_PROGRAM_MAP(bballoon_map)
495		MDRV_CPU_VBLANK_INT("screen", bballoon_interrupt)
496	431
497
498	432	MDRV_SCREEN_ADD("screen", RASTER)
499	433	MDRV_SCREEN_REFRESH_RATE(60)
500	434	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
501	435	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
502		MDRV_SCREEN_SIZE(~~320~~, 256)
	436	MDRV_SCREEN_SIZE(455, 262)
503	437	MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 256-1)
504		// MDRV_SCREEN_SIZE(1024, 1024)
505		// MDRV_SCREEN_VISIBLE_AREA(0, 1023, 0, 1023)
506	438
507	439	MDRV_PALETTE_LENGTH(256)
508	440
509		MDRV_VIDEO_START(bballoon)
510		MDRV_VIDEO_UPDATE(bballoon)
	441	MDRV_MACHINE_RESET( bballoon )
511	442
	443	MDRV_VIDEO_START(s3c2410)
	444	MDRV_VIDEO_UPDATE(s3c2410)
	445
	446	MDRV_S3C2410_ADD("s3c2410", 12000000, bballoon_s3c2410_intf)
	447
	448	// MDRV_NAND_ADD("nand", 0xEC, 0x75)
	449	// MDRV_DEVICE_CONFIG(bballoon_nand_intf)
	450
	451	// MDRV_I2CMEM_ADD("i2cmem", 0xA0, 0, 0x100, NULL)
	452	MDRV_I2CMEM_ADD("i2cmem", i2cmem_interface)
	453
512	454	/* sound hardware */
513	455	MACHINE_CONFIG_END
514	456
r9812	r9813
556	498	see eolith.c and vegaeo.c drivers
557	499	*/
558	500
	501	// The NAND dumps are missing the ECC data. We calculate it on the fly, because the games require it, but really it should be dumped hence the 'BAD DUMP' flags
559	502	ROM_START( bballoon )
560	503	ROM_REGION( 0x2000000, "user1", 0 ) /* ARM 32 bit code */
561		ROM_LOAD( "flash.u1", 0x000000, 0x2000000, CRC(73285634) SHA1(4d0210c1bebdf3113a99978ffbcd77d6ee854168) )
	504	ROM_LOAD( "flash.u1", 0x000000, 0x2000000, BAD_DUMP CRC(73285634) SHA1(4d0210c1bebdf3113a99978ffbcd77d6ee854168) ) // missing ECC data
562	505
563	506	// banked every 0x10000 bytes ?
564	507	ROM_REGION( 0x080000, "user2", 0 )
r9812	r9813
573	516
574	517	ROM_START( hapytour ) /* Same hardware: GHOST Ver1.1 2003.03.28 */
575	518	ROM_REGION( 0x2000000, "user1", 0 ) /* ARM 32 bit code */
576		ROM_LOAD( "flash.u1", 0x000000, 0x2000000, CRC(49deb7f9) SHA1(708a27d7177cf6261a49ded975c2bbb6c2427742) )
	519	ROM_LOAD( "flash.u1", 0x000000, 0x2000000, BAD_DUMP CRC(49deb7f9) SHA1(708a27d7177cf6261a49ded975c2bbb6c2427742) ) // missing ECC data
577	520
578	521	// banked every 0x10000 bytes ?
579	522	ROM_REGION( 0x080000, "user2", 0 )
r9812	r9813
588	531
589	532	static DRIVER_INIT( bballoon )
590	533	{
591		UINT8 flash = (UINT8 )memory_region(machine, "user1");
592
593		// nop flash ECC checks
594
595		flash[0x844+0] = 0x00;
596		flash[0x844+1] = 0x00;
597		flash[0x844+2] = 0xA0;
598		flash[0x844+3] = 0xE1;
599
600		flash[0x850+0] = 0x00;
601		flash[0x850+1] = 0x00;
602		flash[0x850+2] = 0xA0;
603		flash[0x850+3] = 0xE1;
604
605		flash[0x860+0] = 0x00;
606		flash[0x860+1] = 0x00;
607		flash[0x860+2] = 0xA0;
608		flash[0x860+3] = 0xE1;
609
610		flash[0x86c+0] = 0x00;
611		flash[0x86c+1] = 0x00;
612		flash[0x86c+2] = 0xA0;
613		flash[0x86c+3] = 0xE1;
	534	memcpy( steppingstone, memory_region( machine, "user1"), 4 * 1024);
614	535	}
615	536
616		GAME( 2003, bballoon, 0, bballoon, bballoon, bballoon, ROT0, "Eolith", "Balloon & Balloon", GAME_NO_SOUND \| GAME_NOT_WORKING )
617		GAME( 2005, hapytour, 0, bballoon, bballoon, 0, ROT0, "GAV Company", "Happy Tour", GAME_NO_SOUND \| GAME_NOT_WORKING ) /* Likely will need simular flash ECC check patches */
	537	GAME( 2003, bballoon, 0, bballoon, bballoon, bballoon, ROT0, "Eolith", "BnB Arcade", GAME_NO_SOUND )
	538	GAME( 2005, hapytour, 0, bballoon, bballoon, bballoon, ROT0, "GAV Company", "Happy Tour", GAME_NO_SOUND )

src/mame/drivers/sg1000a.c
r9812	r9813
277	277	MDRV_SCREEN_MODIFY("screen")
278	278	MDRV_SCREEN_REFRESH_RATE((float)XTAL_10_738635MHz/2/342/262)
279	279	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
280		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* ~~not~~ ~~accurat~~e */)
	280	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(4395)) /* 69 lines */
281	281
282	282	/* sound hardware */
283	283	MDRV_SPEAKER_STANDARD_MONO("mono")

src/mame/drivers/merit.c
r9812	r9813
478	478	AM_RANGE(0xf800, 0xfbff) AM_READWRITE(palette_r, palette_w)
479	479	ADDRESS_MAP_END
480	480
	481	static ADDRESS_MAP_START( dtrvwz5_map, ADDRESS_SPACE_PROGRAM, 8 )
	482	AM_RANGE(0x0000, 0x7fff) AM_ROM
	483	AM_RANGE(0x8000, 0x9fff) AM_RAM AM_SHARE("nvram")
	484	AM_RANGE(0xb000, 0xb0ff) AM_ROM /* protection? code jumps here */
	485	AM_RANGE(0xc004, 0xc007) AM_MIRROR(0x1df0) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w)
	486	AM_RANGE(0xc008, 0xc00b) AM_MIRROR(0x1df0) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w)
	487	AM_RANGE(0xce00, 0xceff) AM_READWRITE(questions_r, high_offset_w)
	488	AM_RANGE(0xd600, 0xd6ff) AM_WRITE(low_offset_w)
	489	AM_RANGE(0xda00, 0xdaff) AM_WRITE(med_offset_w)
	490	AM_RANGE(0xe000, 0xe000) AM_MIRROR(0x05f0) AM_DEVWRITE("crtc", mc6845_address_w)
	491	AM_RANGE(0xe001, 0xe001) AM_MIRROR(0x05f0) AM_DEVWRITE("crtc", mc6845_register_w)
	492	AM_RANGE(0xe800, 0xefff) AM_RAM AM_BASE(&ram_attr)
	493	AM_RANGE(0xf000, 0xf7ff) AM_RAM AM_BASE(&ram_video)
	494	AM_RANGE(0xf800, 0xfbff) AM_READWRITE(palette_r, palette_w)
	495	ADDRESS_MAP_END
	496
481	497	static ADDRESS_MAP_START( couple_map, ADDRESS_SPACE_PROGRAM, 8 )
482	498	AM_RANGE(0x0000, 0x7fff) AM_ROM
483	499	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1")
r9812	r9813
791	807	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
792	808	INPUT_PORTS_END
793	809
	810	static INPUT_PORTS_START( dtrvwh5 )
	811	PORT_INCLUDE( trivia )
	812
	813	PORT_MODIFY("DSW")
	814	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
	815	PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
	816	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	817	PORT_DIPNAME( 0x02, 0x02, "Answers Shown" )
	818	PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
	819	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	820	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
	821	PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
	822	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	823	PORT_DIPNAME( 0x08, 0x08, "Hi Scores Retained" )
	824	PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
	825	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	826	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
	827	PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
	828	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	829	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
	830	PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
	831	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	832	PORT_DIPNAME( 0x80, 0x80, "Coctail Type" )
	833	PORT_DIPSETTING( 0x80, "Regular Coctail" )
	834	PORT_DIPSETTING( 0x00, "Single Side Coctail" )
	835	INPUT_PORTS_END
	836
794	837	static INPUT_PORTS_START( pitboss )
795	838	PORT_START("IN0")
796	839	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_Z) PORT_NAME("P1/P2 Button 1")
r9812	r9813
1243	1286	MDRV_CPU_IO_MAP(trvwhiz_io_map)
1244	1287	MACHINE_CONFIG_END
1245	1288
	1289	static MACHINE_CONFIG_DERIVED( dtrvwz5, pitboss )
	1290
	1291	MDRV_CPU_MODIFY("maincpu")
	1292	MDRV_CPU_PROGRAM_MAP(dtrvwz5_map)
	1293	MDRV_CPU_IO_MAP(tictac_io_map)
	1294	MACHINE_CONFIG_END
	1295
1246	1296	static MACHINE_CONFIG_DERIVED( phrcraze, pitboss )
1247	1297
1248	1298	MDRV_CPU_MODIFY("maincpu")
r9812	r9813
1649	1699	ROM_LOAD( "merit2_5.0", 0x08000, 0x8000, CRC(e07d139f) SHA1(e364dcc628719c1bcdc119bdb2f3c98b5538c411) ) // sex trivia III
1650	1700	ROM_END
1651	1701
	1702	ROM_START( dtrvwz5 )
	1703	ROM_REGION( 0x10000, "maincpu", 0 )
	1704	ROM_LOAD( "6221-70_u5-0a.u5", 0x0000, 0x8000, CRC(e5917a71) SHA1(2acebe337600cd490da1c6fb2d83e2e378e584f1) )
	1705
	1706	ROM_REGION( 0x6000, "gfx1", 0 )
	1707	ROM_LOAD( "trv3.u39", 0x0000, 0x2000, CRC(81a34357) SHA1(87ae9db78f043dbdcd1d50473fc09284eceaf884) )
	1708	ROM_LOAD( "trv3.u38", 0x2000, 0x2000, CRC(c4082020) SHA1(744dc8745f3d54754184571b64664ee5c1497fb4) )
	1709	ROM_LOAD( "trv3.u37", 0x4000, 0x2000, CRC(5e5e6fb3) SHA1(c182233367de6c9cda0e49a5958bb07460a5f300) )
	1710
	1711	ROM_REGION( 0x2000, "gfx2", 0 )
	1712	ROM_LOAD( "trv3.u40", 0x0000, 0x2000, CRC(a2c934f2) SHA1(214cc1f47c11618457a7885712585c977107cab7) )
	1713
	1714	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
	1715	ROM_LOAD( "tw5-06_fif-1.1", 0x08000, 0x8000, CRC(300f245c) SHA1(9c380000ba5a6c826025e32f0e46932e234b46bc) )
	1716	ROM_LOAD( "tw5-06_fif-2.2", 0x18000, 0x8000, CRC(99ee9cbe) SHA1(d6a4a604a070436b0acb1c774687f6c2266c8807) )
	1717	ROM_LOAD( "tw5-06_six-1.3", 0x28000, 0x8000, CRC(87354939) SHA1(6e3de6df944da75e28d36dce3cca9b45a8936bf4) )
	1718	ROM_LOAD( "tw5-06_six-2.4", 0x38000, 0x8000, CRC(ea8ed7ae) SHA1(2c084a88773e6f611a6cc6d847b9d74f5c8bfc77) )
	1719	ROM_LOAD( "tw5-06_sev-1.5", 0x48000, 0x8000, CRC(fd5099aa) SHA1(81e978597aa348c77001f72763744491cfdad1d1) )
	1720	ROM_LOAD( "tw5-06_sev-2.6", 0x58000, 0x8000, CRC(523520c8) SHA1(7dff9cda1ade5d3b4e573e77b7ec93ee8ae13c86) )
	1721	ROM_LOAD( "tw5-06_eig-1.7", 0x68000, 0x8000, CRC(3a2a4562) SHA1(45565622d7057047b02050dcd34ff6f02663507d) )
	1722	ROM_LOAD( "tw5-06_eig-2.8", 0x78000, 0x8000, CRC(cb7e9035) SHA1(d3344fb318f2241c07933c4b8e3525c219ea3aa6) )
	1723	ROM_LOAD( "tw5-06_sx5-1.9", 0x88000, 0x8000, CRC(6ae2a208) SHA1(3cc935e616c247c6885319acc6a6ca92ee6fc3c0) )
	1724	ROM_LOAD( "tw5-06_sx5-2.10", 0x98000, 0x8000, CRC(790184fc) SHA1(9c8b56852b31d3312f26a5901487f6b31d9e9b4f) )
	1725	ROM_END
	1726
1652	1727	/*
1653	1728
1654	1729	crt200 rev e-1
r9812	r9813
1697	1772	ROM_LOAD( "merit.pba", 0x98000, 0x8000, CRC(6eda81f4) SHA1(6d64344691e3e52035a7d30fb3e762f0bd397db7) )
1698	1773	ROM_END
1699	1774
	1775	ROM_START( tictacv )
	1776	ROM_REGION( 0x10000, "maincpu", 0 )
	1777	ROM_LOAD( "6221-22_u5-0.u5", 0x00000, 0x8000, CRC(c3acd686) SHA1(0c652e88675e2098be2f26e8f1acefc9e69d630f) )
	1778
	1779	ROM_REGION( 0x6000, "gfx1", 0 )
	1780	ROM_LOAD( "ttts_u-39.u39", 0x00000, 0x2000, CRC(20103ed6) SHA1(52741ba8e3b57a32446d3bf4d6f6d8368954fd54) )
	1781	ROM_LOAD( "ttts_u-38.u38", 0x02000, 0x2000, CRC(32e791b9) SHA1(f206aef25b3a9b7042d804e628c356f7d8d3cdbe) )
	1782	ROM_LOAD( "ttts_u-37.u37", 0x04000, 0x2000, CRC(adf19f83) SHA1(af2c0b9782f8e93a7c5e2a5ecc937694773d8ad0) )
	1783
	1784	ROM_REGION( 0x2000, "gfx2", 0 )
	1785	ROM_LOAD( "ttts_u-40.u40", 0x00000, 0x2000, CRC(c7071c98) SHA1(88e1b26f198cfbbd86b492356f60fc1b81b38d97) )
	1786
	1787	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
	1788	ROM_LOAD( "gen-004_01a.7", 0x08000, 0x8000, CRC(d1584173) SHA1(7a2190203f478f446cc70c473c345e7cc332e049) ) /* Trivia catagories are: */
	1789	ROM_LOAD( "gen-004_02a.8", 0x18000, 0x8000, CRC(d00ab1fd) SHA1(c94269c8a478e88f71aeca94c6f20fc05a9c62bd) ) /* General Interest, Sports, Entertainment & Sex Trivia III */
	1790	ROM_LOAD( "spo-004_01a.1", 0x28000, 0x8000, CRC(71b398a9) SHA1(5ea07c409afd52c7d08592b30ff0ff3b72c3f8c3) )
	1791	ROM_LOAD( "spo-004_02a.2", 0x38000, 0x8000, CRC(eb34672f) SHA1(c472fc4445fc434029a2740dfc1d9ab9b1ef9f87) )
	1792	ROM_LOAD( "spo-004_03a.3", 0x48000, 0x8000, CRC(8eea30b9) SHA1(fe1d0332106631f56bc6c57a888da9e4e63fa52f) )
	1793	ROM_LOAD( "ent-004_01.4", 0x58000, 0x8000, CRC(3f45064d) SHA1(de109ac0b19fd1cd7f0020cc174c2da21708108c) )
	1794	ROM_LOAD( "ent-004_02a.5", 0x68000, 0x8000, CRC(f1c446cd) SHA1(9a6f18defbb64e202ae12e1a59502b8f2d6a58a6) )
	1795	ROM_LOAD( "ent-004_03.6", 0x78000, 0x8000, CRC(206cfc0d) SHA1(78f6b684713459a617096aa3ffe6e9e62583938c) )
	1796	ROM_END
	1797
1700	1798	ROM_START( phrcraze )
1701	1799	ROM_REGION( 0x10000, "maincpu", 0 )
1702	1800	ROM_LOAD( "phrz.11", 0x00000, 0x8000, CRC(ccd33a0c) SHA1(869b66af4369f3b4bc19336ca2b8104c7f652de7) )
r9812	r9813
1939	2037	memory_set_bankptr(machine, "bank1",ROM + 0x10000 + (0x2000 * 2));
1940	2038	}
1941	2039
	2040	static DRIVER_INIT( dtrvwz5 )
	2041	{
	2042	int i;
	2043	UINT8 *ROM = memory_region(machine, "maincpu");
	2044	/* fill b000 - b0ff with ret 0xc9 */
	2045	for ( i = 0xb000; i < 0xb100; i++ )
	2046	ROM[i] = 0xc9;
	2047
	2048	ROM[0xb000] = 0xc9; /* ret */
	2049
	2050	/* called by subroutine which reads inputs */
	2051	ROM[0xb001] = 0x7a; /* ld a,d */
	2052	ROM[0xb002] = 0xa4; /* and h */
	2053	ROM[0xb003] = 0x47; /* ld b,a */
	2054	ROM[0xb004] = 0x7b; /* ld a,e */
	2055	ROM[0xb005] = 0xa5; /* and l */
	2056	ROM[0xb006] = 0x4f; /* ld c,a */
	2057	ROM[0xb007] = 0x7a; /* ld a,d */
	2058	ROM[0xb008] = 0xb4; /* or h */
	2059	ROM[0xb009] = 0x57; /* ld d,a */
	2060	ROM[0xb00a] = 0x7b; /* ld a,e */
	2061	ROM[0xb00b] = 0xb5; /* or l */
	2062	ROM[0xb00c] = 0x5f; /* ld e,a */
	2063	ROM[0xb00a] = 0xc9; /* ret */
	2064
	2065	decryption_key = 6;
	2066	}
	2067
1942	2068	GAME( 1983, pitboss, 0, pitboss, pitboss, 0, ROT0, "Merit", "The Pit Boss (Set 1)", GAME_SUPPORTS_SAVE \| GAME_IMPERFECT_GRAPHICS )
1943	2069	GAME( 1983, pitbossa, pitboss, pitboss, pitboss, 0, ROT0, "Merit", "The Pit Boss (Set 2)", GAME_SUPPORTS_SAVE \| GAME_IMPERFECT_GRAPHICS )
1944	2070	GAME( 1983, pitbossb, pitboss, pitboss, pitboss, 0, ROT0, "Merit", "The Pit Boss (Set 3)", GAME_SUPPORTS_SAVE \| GAME_IMPERFECT_GRAPHICS )
r9812	r9813
1962	2088	GAME( 1985, trvwz4, 0, trvwhziv, trvwhziv, key_5, ROT90, "Merit", "Trivia ? Whiz (Edition 4) (question set 1)", GAME_SUPPORTS_SAVE )
1963	2089	GAME( 1985, trvwz4a, trvwz4, trvwhziv, trvwhziv, key_5, ROT90, "Merit", "Trivia ? Whiz (Edition 4) (question set 2)", GAME_SUPPORTS_SAVE )
1964	2090
1965		GAME( 1985, tictac, 0, tictac, tictac, key_4, ROT0, "Merit", "Tic Tac Trivia", GAME_SUPPORTS_SAVE )
	2091	GAME( 1985, tictac, 0, tictac, tictac, key_4, ROT0, "Merit", "Tic Tac Trivia (Horizontal)", GAME_SUPPORTS_SAVE )
	2092	GAME( 1985, tictacv, tictac, tictac, tictac, key_4, ROT90, "Merit", "Tic Tac Trivia (Vertical)", GAME_SUPPORTS_SAVE )
1966	2093
1967	2094	GAME( 1986, phrcraze, 0, phrcraze, phrcraze, key_7, ROT0, "Merit", "Phraze Craze (set 1)", GAME_SUPPORTS_SAVE )
1968	2095	GAME( 1986, phrcrazea,phrcraze,phrcraze, phrcraze, key_7, ROT0, "Merit", "Phraze Craze (set 2)", GAME_SUPPORTS_SAVE )
r9812	r9813
1974	2101
1975	2102	GAME( 1986, dodge, 0, dodge, couple, 0, ROT0, "Merit", "Dodge City", GAME_SUPPORTS_SAVE \| GAME_IMPERFECT_GRAPHICS \| GAME_NOT_WORKING )
1976	2103
	2104	GAME( 1987, dtrvwz5, 0, dtrvwz5, dtrvwh5, dtrvwz5,ROT0, "Merit", "Deluxe Trivia ? Whiz (Edition 5)", GAME_SUPPORTS_SAVE )
	2105
1977	2106	GAME( 1988, couple, 0, couple, couple, couple, ROT0, "Merit", "The Couples (Set 1)", GAME_IMPERFECT_GRAPHICS \| GAME_UNEMULATED_PROTECTION )
1978	2107	GAME( 1988, couplep, couple, couple, couplep, couple, ROT0, "Merit", "The Couples (Set 2)", GAME_IMPERFECT_GRAPHICS \| GAME_UNEMULATED_PROTECTION )
1979	2108	GAME( 1988, couplei, couple, couple, couple, couple, ROT0, "Merit", "The Couples (Set 3)", GAME_IMPERFECT_GRAPHICS \| GAME_UNEMULATED_PROTECTION )

src/mame/drivers/parodius.c
r9812	r9813
367	367	ROM_LOAD( "955d04.bin", 0x00000, 0x80000, CRC(e671491a) SHA1(79e71cb5212eb7d14d3479b0734ea0270473a66d) )
368	368	ROM_END
369	369
	370	ROM_START( parodiusa ) /* Earlier version? */
	371	ROM_REGION( 0x48000, "maincpu", 0 ) /* code + banked roms + palette RAM */
	372	ROM_LOAD( "2.f5", 0x10000, 0x20000, CRC(26a6410b) SHA1(06de782f593ab0da6d65376b66e273d6410c6c56) )
	373	ROM_LOAD( "3.h5", 0x30000, 0x18000, CRC(9410dbf2) SHA1(1c4d9317f83c33bace929a841ff4093d7178c428) )
	374	ROM_CONTINUE( 0x08000, 0x08000 )
	375
	376	ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the sound CPU */
	377	ROM_LOAD( "955e03.bin", 0x0000, 0x10000, CRC(940aa356) SHA1(e7466f049be48861fd2d929eed786bd48782b5bb) )
	378
	379	ROM_REGION( 0x100000, "gfx1", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
	380	ROM_LOAD( "955d07.bin", 0x000000, 0x080000, CRC(89473fec) SHA1(0da18c4b078c3a30233a6f5c2b90032168136f58) ) /* characters */
	381	ROM_LOAD( "955d08.bin", 0x080000, 0x080000, CRC(43d5cda1) SHA1(2c51bad4857d1d31456c6dc1e7d41326ea35468b) ) /* characters */
	382
	383	ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
	384	ROM_LOAD( "955d05.bin", 0x000000, 0x080000, CRC(7a1e55e0) SHA1(7a0e04ebde28d1e7b60aef3de926dc0e78662b1e) ) /* sprites */
	385	ROM_LOAD( "955d06.bin", 0x080000, 0x080000, CRC(f4252875) SHA1(490f2e19b30cf8724e4b03b8d9f089c470ec13bd) ) /* sprites */
	386
	387	ROM_REGION( 0x80000, "k053260", 0 ) /* 053260 samples */
	388	ROM_LOAD( "955d04.bin", 0x00000, 0x80000, CRC(e671491a) SHA1(79e71cb5212eb7d14d3479b0734ea0270473a66d) )
	389	ROM_END
	390
370	391	ROM_START( parodiusj )
371	392	ROM_REGION( 0x48000, "maincpu", 0 ) /* code + banked roms + palette RAM */
372	393	ROM_LOAD( "955e01.bin", 0x10000, 0x20000, CRC(49baa334) SHA1(8902fbb2228111b15de6537bd168241933df134d) )
r9812	r9813
402	423	memory_set_bank(device->machine, "bank1", (lines & 0x0f) ^ 0x0f);
403	424	}
404	425
405		GAME( 1990, parodius, 0, parodius, parodius, 0, ROT0, "Konami", "Parodius DA! (World)", GAME_SUPPORTS_SAVE )
	426	GAME( 1990, parodius, 0, parodius, parodius, 0, ROT0, "Konami", "Parodius DA! (World, set 1)", GAME_SUPPORTS_SAVE )
	427	GAME( 1990, parodiusa, parodius, parodius, parodius, 0, ROT0, "Konami", "Parodius DA! (World, set 2)", GAME_SUPPORTS_SAVE )
406	428	GAME( 1990, parodiusj, parodius, parodius, parodius, 0, ROT0, "Konami", "Parodius DA! (Japan)", GAME_SUPPORTS_SAVE )

src/mame/drivers/segac2.c
r9812	r9813
9	9	Sega's C2 was used between 1989 and 1994, the hardware being very similar to that
10	10	used by the Sega MegaDrive/Genesis Home Console Sega produced around the same time.
11	11
12		The Columns manual call this system 'System 14' instead of system C/C2.
	12	The Columns and Bloxeed (USA) manual call this system 'System 14' instead of system C/C2.
13	13
14	14
15	15	todo: fill in protection chip data
16	16
17	17	Year Game Developer Protection Chip Board Number
18		==== ==================== ================ =============== ===== ======
	18	==== ==================== ================ =============== ===== =========
19	19	1989 Bloxeed Sega / Elorg n/a C
	20	1989 Bloxeed (USA) Sega / Elorg 317-0140 C 171-5880B
20	21	1990 Columns Sega 317-0149 C 171-5880B
21	22	1990 Columns II Sega 317-0160 C
22	23	1990 ThunderForce AC Sega / Technosoft 317-0172 C2
23	24	1990 Borench Sega 317-0173 C2
24	25	1991 Twin Squash Sega 317-0193 C2
25	26	1992 Ribbit! Sega 317-0178 C2
26		1992 Puyo Puyo Sega / Compile 317-0203 C2
	27	1992 Puyo Puyo Sega / Compile 317-0203 C2 171-5992A
27	28	1992 Tant-R (Japan) Sega 317-0211 C2
28	29	1992 Tant-R (Korea) Sega ? C2
29	30	1994 PotoPoto (Japan) Sega 317-0218 C2
r9812	r9813
76	77
77	78	#include "includes/megadriv.h"
78	79
79		#define XL1_CLOCK 640000
80		#define XL2_CLOCK 53693175
	80	#define XL1_CLOCK XTAL_640kHz
	81	#define XL2_CLOCK XTAL_53_693175MHz
81	82
82	83
83	84	#define LOG_PROTECTION 1
r9812	r9813
1434	1435
1435	1436	ROM_START( bloxeedu ) /* Bloxeed USA (C System Version) (c)1989 Sega / Elorg */
1436	1437	ROM_REGION( 0x200000, "maincpu", 0 )
1437		ROM_LOAD16_BYTE( "epr12997a.32", 0x000000, 0x020000, CRC(23655bc9) SHA1(32fc1f75a43aa49dc656d40d34ec10f3f0a2bdb3) )
1438		ROM_LOAD16_BYTE( "epr12996a.31", 0x000001, 0x020000, CRC(83c83f0c) SHA1(ca8e2ad7cceabd8de7a91b91cb92eafb6dd3171f) )
1439		ROM_LOAD16_BYTE( "epr12993.34", 0x040000, 0x020000, CRC(487bc8fc) SHA1(3fb205bf56f35443e993e08b39c1a08c13ca5e3b) )
1440		ROM_LOAD16_BYTE( "epr12992.33", 0x040001, 0x020000, CRC(19b0084c) SHA1(b3ba0f3d8d39a19aa66edb24885ea21192e22704) )
	1438	ROM_LOAD16_BYTE( "epr-12997a.ic32", 0x000000, 0x020000, CRC(23655bc9) SHA1(32fc1f75a43aa49dc656d40d34ec10f3f0a2bdb3) )
	1439	ROM_LOAD16_BYTE( "epr-12996a.ic31", 0x000001, 0x020000, CRC(83c83f0c) SHA1(ca8e2ad7cceabd8de7a91b91cb92eafb6dd3171f) )
	1440	ROM_LOAD16_BYTE( "epr-12993.ic34", 0x040000, 0x020000, CRC(487bc8fc) SHA1(3fb205bf56f35443e993e08b39c1a08c13ca5e3b) )
	1441	ROM_LOAD16_BYTE( "epr-12992.ic33", 0x040001, 0x020000, CRC(19b0084c) SHA1(b3ba0f3d8d39a19aa66edb24885ea21192e22704) )
	1442
	1443	ROM_REGION( 0x0004, "pals", 0 )
	1444	ROM_LOAD( "315-5393.ic24", 0x0000, 0x0001, NO_DUMP ) /* PALCE16V8H-25PC */
	1445	ROM_LOAD( "315-5394.ic25", 0x0000, 0x0001, NO_DUMP ) /* PALCE16V8H-25PC */
	1446	ROM_LOAD( "315-5395.ic26", 0x0000, 0x0001, NO_DUMP ) /* PALCE16V8H-25PC */
	1447	ROM_LOAD( "317-0140.ic27", 0x0000, 0x0001, NO_DUMP ) /* EPM4032DC (Protection Chip) */
1441	1448	ROM_END
1442	1449
1443	1450
r9812	r9813
1618	1625	ROM_LOAD( "epr-15196.4", 0x000000, 0x020000, CRC(79112b3b) SHA1(fc3a202e1e2ff39950d4af689b7fcca86c301805) )
1619	1626	ROM_END
1620	1627
1621		ROM_START( puyoj ) /* Puyo Puyo (c)1992 Sega / Compile */
	1628	ROM_START( puyoj ) /* Puyo Puyo (Rev B) (c)1992 Sega / Compile */
1622	1629	ROM_REGION( 0x200000, "maincpu", 0 )
1623	1630	ROM_LOAD16_BYTE( "epr-15036b.32", 0x000000, 0x020000, CRC(5310ca1b) SHA1(dcfe2bf7476b640dfb790e8716e75b483d535e48) )
1624	1631	ROM_LOAD16_BYTE( "epr-15035b.31", 0x000001, 0x020000, CRC(bc62e400) SHA1(12bb6031574838a28889f6edb31dbb689265287c) )
r9812	r9813
1632	1639
1633	1640	ROM_START( puyoja ) /* Puyo Puyo (Rev A) (c)1992 Sega / Compile */
1634	1641	ROM_REGION( 0x200000, "maincpu", 0 )
1635		ROM_LOAD16_BYTE( "epr-15036a.32", 0x000000, 0x020000, CRC(61b35257) SHA1(e09a7e992999befc88fc7928a478d1e2d14d7b08) )
1636		ROM_LOAD16_BYTE( "epr-15035a.31", 0x000001, 0x020000, CRC(dfebb6d9) SHA1(6f685729ef4660c2eba409c5236c6d2f313eef5b) )
	1642	ROM_LOAD16_BYTE( "epr-15036a.ic32", 0x000000, 0x020000, CRC(61b35257) SHA1(e09a7e992999befc88fc7928a478d1e2d14d7b08) )
	1643	ROM_LOAD16_BYTE( "epr-15035a.ic31", 0x000001, 0x020000, CRC(dfebb6d9) SHA1(6f685729ef4660c2eba409c5236c6d2f313eef5b) )
1637	1644	/* 0x040000 - 0x100000 Empty */
1638		ROM_LOAD16_BYTE( "epr-15038.34", 0x100000, 0x020000, CRC(3b9eea0c) SHA1(e3e6148c1769834cc0061932eb035daa79673144) )
1639		ROM_LOAD16_BYTE( "epr-15037.33", 0x100001, 0x020000, CRC(be2f7974) SHA1(77027ced7a62f94e9fc6e8a0a4ac0c62f7ea813b) )
	1645	ROM_LOAD16_BYTE( "epr-15038.ic34", 0x100000, 0x020000, CRC(3b9eea0c) SHA1(e3e6148c1769834cc0061932eb035daa79673144) )
	1646	ROM_LOAD16_BYTE( "epr-15037.ic33", 0x100001, 0x020000, CRC(be2f7974) SHA1(77027ced7a62f94e9fc6e8a0a4ac0c62f7ea813b) )
1640	1647
1641	1648	ROM_REGION( 0x020000, "upd", 0 )
1642		ROM_LOAD( "epr-15034.4", 0x000000, 0x020000, CRC(5688213b) SHA1(f3f234e482871ca903a782e51008f3bfed04ee63) )
	1649	ROM_LOAD( "epr-15034.ic4", 0x000000, 0x020000, CRC(5688213b) SHA1(f3f234e482871ca903a782e51008f3bfed04ee63) )
	1650
	1651	ROM_REGION( 0x0004, "pals", 0 )
	1652	ROM_LOAD( "315-5452.ic24", 0x0000, 0x0001, NO_DUMP ) /* PALCE16V8H-25PC */
	1653	ROM_LOAD( "315-5394.ic25", 0x0000, 0x0001, NO_DUMP ) /* PALCE16V8H-25PC */
	1654	ROM_LOAD( "315-5395.ic26", 0x0000, 0x0001, NO_DUMP ) /* PALCE16V8H-25PC */
	1655	ROM_LOAD( "317-0203.ic27", 0x0000, 0x0001, NO_DUMP ) /* EPM4032DC-25 (Protection Chip) */
1643	1656	ROM_END
1644	1657
1645	1658	ROM_START( puyobl ) /* Puyo Puyo (c)1992 Sega / Compile Bootleg */

src/mame/drivers/gyruss.c
r9812	r9813
656	656	ROM_LOAD( "gyrussk.pr2", 0x0120, 0x0100, CRC(de823a81) SHA1(1af94b2a6a319a89b238a5076a2867f1cfd279b0) ) /* character lookup table */
657	657	ROM_END
658	658
	659	ROM_START( gyrussb ) /* PCB has stickers stating "TAITO (NEW ZEALAND) LTD" */
	660	ROM_REGION( 0x10000, "maincpu", 0 )
	661	ROM_LOAD( "1.bin", 0x0000, 0x2000, CRC(6bc21c10) SHA1(9d44f766398b9994f90edb2ffb272b4f22564854) ) /* Labeled as "1", minor code patch / redirection */
	662	ROM_LOAD( "gyrussk.2", 0x2000, 0x2000, CRC(a4ec03e4) SHA1(08c33ad7fcc2ad5e5787a1050284e3f8164f4618) ) /* Labeled as "2" */
	663	ROM_LOAD( "gyrussk.3", 0x4000, 0x2000, CRC(27454a98) SHA1(030c7df225652ee20d5ef64d005eb011dc89a27d) ) /* Labeled as "3" */
	664	/* the diagnostics ROM would go here */
	665
	666	ROM_REGION( 0x10000, "sub", 0 )
	667	ROM_LOAD( "gyrussk.9", 0xe000, 0x2000, CRC(822bf27e) SHA1(36d5bea2392a7d3476dd797dc05602705cfa23ef) ) /* Labeled as "9" */
	668
	669	ROM_REGION( 0x10000, "audiocpu", 0 )
	670	ROM_LOAD( "gyrussk.1a", 0x0000, 0x2000, CRC(f4ae1c17) SHA1(ae568c96a31d910afe30d2b7eeb9ed1ed07290e3) ) /* Labeled as "11" */
	671	ROM_LOAD( "gyrussk.2a", 0x2000, 0x2000, CRC(ba498115) SHA1(9cd1f42898cc590f39ba7cb3c975b0b3d3062eba) ) /* Labeled as "12" */
	672	/* the diagnostics ROM would go here */
	673
	674	ROM_REGION( 0x1000, "audio2", 0 ) /* 8039 */
	675	ROM_LOAD( "gyrussk.3a", 0x0000, 0x1000, CRC(3f9b5dea) SHA1(6e807da02c2885b18e8cc2199f12f6be9040bf75) ) /* Labeled as "13" */
	676
	677	ROM_REGION( 0x8000, "gfx1", 0 )
	678	ROM_LOAD( "gyrussk.6", 0x0000, 0x2000, CRC(c949db10) SHA1(fcb8bcbd2bdd751fecb322a33c8a92fb6f07a7ab) ) /* Labeled as "6" */
	679	ROM_LOAD( "gyrussk.5", 0x2000, 0x2000, CRC(4f22411a) SHA1(763bcd039f8c1838a0d7da7d4dadc14a26e25596) ) /* Labeled as "5" */
	680	ROM_LOAD( "gyrussk.8", 0x4000, 0x2000, CRC(47cd1fbc) SHA1(8203c4ff0b1cd7b4dbc708e300bfeac1e7366e09) ) /* Labeled as "8" */
	681	ROM_LOAD( "gyrussk.7", 0x6000, 0x2000, CRC(8e8d388c) SHA1(8f2928d71c02aba977d67575d6e34d69bda2b9d4) ) /* Labeled as "7" */
	682
	683	ROM_REGION( 0x2000, "gfx2", 0 )
	684	ROM_LOAD( "gyrussk.4", 0x0000, 0x2000, CRC(27d8329b) SHA1(564ff945465a23d93a93137ad277298770dfa06a) ) /* Labeled as "4" */
	685
	686	ROM_REGION( 0x0220, "proms", 0 )
	687	ROM_LOAD( "gyrussk.pr3", 0x0000, 0x0020, CRC(98782db3) SHA1(b891e43b25187faca8002919ccb44d744daa3594) ) /* palette */
	688	ROM_LOAD( "gyrussk.pr1", 0x0020, 0x0100, CRC(7ed057de) SHA1(c04069ae1e2c62f9b3048844cd8cf5e1b03b7d3c) ) /* sprite lookup table */
	689	ROM_LOAD( "gyrussk.pr2", 0x0120, 0x0100, CRC(de823a81) SHA1(1af94b2a6a319a89b238a5076a2867f1cfd279b0) ) /* character lookup table */
	690	ROM_END
	691
659	692	ROM_START( venus )
660	693	ROM_REGION( 0x10000, "maincpu", 0 )
661	694	ROM_LOAD( "r1", 0x0000, 0x2000, CRC(d030abb1) SHA1(14a70e15f5df9ef957779771d8915203d3828532) )
r9812	r9813
698	731
699	732	GAME( 1983, gyruss, 0, gyruss, gyruss, gyruss, ROT90, "Konami", "Gyruss (Konami)", GAME_SUPPORTS_SAVE )
700	733	GAME( 1983, gyrussce, gyruss, gyruss, gyrussce, gyruss, ROT90, "Konami (Centuri license)", "Gyruss (Centuri)", GAME_SUPPORTS_SAVE )
	734	GAME( 1983, gyrussb, gyruss, gyruss, gyruss, gyruss, ROT90, "bootleg", "Gyruss", GAME_SUPPORTS_SAVE ) /* Supposed Taito NZ license, but (c) Konami */
701	735	GAME( 1983, venus, gyruss, gyruss, gyruss, gyruss, ROT90, "bootleg", "Venus", GAME_SUPPORTS_SAVE )

src/mame/drivers/segas16b.c
r9812	r9813
4224	4224	ROM_LOAD16_BYTE( "epr-11012.a6", 0x020000, 0x08000, CRC(3992f159) SHA1(50686b394693ab01cbd159ae661f326c8eee50b8) )
4225	4225	ROM_LOAD16_BYTE( "epr-11009.a3", 0x020001, 0x08000, CRC(df199999) SHA1(2669e923aa4f1bedc788401f44ad19c318658f00) )
4226	4226
4227		ROM_REGION( 0x2000, "user1", 0 ) /* decryption key -- still WIP */
4228		ROM_LOAD( "317-0041.key", 0x0000, 0x2000, BAD_DUMP CRC(a30ae46c) SHA1(5e7361ab1f1d30c59d7f29152bc6f7175a0aa102) )
	4227	ROM_REGION( 0x2000, "user1", 0 ) /* decryption key */
	4228	ROM_LOAD( "317-0041.key", 0x0000, 0x2000, CRC(361ee427) SHA1(5964485ef8478b05534ca2f9b161828e3befbecf) )
4229	4229
4230	4230	ROM_REGION( 0x30000, "gfx1", 0 ) /* tiles */
4231	4231	ROM_LOAD( "epr-10994.b9", 0x00000, 0x10000, CRC(3035468a) SHA1(778366815a2a74188d72d64c5e1e95215bc4ca81) )
r9812	r9813
6594	6594	GAME( 1989, bayroutej, bayroute, system16b, bayroute, generic_5704, ROT0, "Sunsoft / Sega", "Bay Route (set 2, Japan, FD1094 317-0115)", 0 )
6595	6595	GAME( 1989, bayroute1, bayroute, system16b, bayroute, generic_5358, ROT0, "Sunsoft / Sega", "Bay Route (set 1, US, unprotected)", 0 )
6596	6596
6597		GAME( 1987, bullet, 0, system16b, bullet, generic_5358_small, ROT0, "Sega", "Bullet (FD1094 317-0041)", ~~GAME_UNEMULATED_PROTECTION~~ )
	6597	GAME( 1987, bullet, 0, system16b, bullet, generic_5358_small, ROT0, "Sega", "Bullet (FD1094 317-0041)", 0 )
6598	6598	/* Charon */
6599	6599	GAME( 1991, cotton, 0, system16b, cotton, generic_5704, ROT0, "Sega / Success", "Cotton (set 3, World, FD1094 317-0181a)", 0 )
6600	6600	GAME( 1991, cottonu, cotton, system16b, cotton, generic_5704, ROT0, "Sega / Success", "Cotton (set 2, US, FD1094 317-0180)", 0 )

src/mame/drivers/m107.c
r9812	r9813
159	159	cputag_set_input_line_and_vector(space->machine, "maincpu", 0, HOLD_LINE, M107_IRQ_3);
160	160	}
161	161
	162	static WRITE16_HANDLER( m107_sound_reset_w )
	163	{
	164	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, (data) ? CLEAR_LINE : ASSERT_LINE);
	165	}
	166
162	167	/*****************************************************************************/
163	168
164	169	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
r9812	r9813
185	190	AM_RANGE(0xa0, 0xaf) AM_WRITENOP /* Written with 0's in interrupt */
186	191	AM_RANGE(0xb0, 0xb1) AM_WRITE(m107_spritebuffer_w)
187	192	AM_RANGE(0xc0, 0xc3) AM_READNOP /* Only wpksoc: ticket related? */
	193	AM_RANGE(0xc0, 0xc1) AM_WRITE(m107_sound_reset_w)
188	194	ADDRESS_MAP_END
189	195
	196	/* same as M107 but with an extra i/o board */
	197	static WRITE16_HANDLER( wpksoc_output_w )
	198	{
	199	/*
	200	x--- ---- ?
	201	---- --xx lamps
	202	*/
	203	if(data & 0x7c)
	204	popmessage("%04x",data);
	205	}
	206
	207	static ADDRESS_MAP_START( wpksoc_map, ADDRESS_SPACE_PROGRAM, 16 )
	208	AM_RANGE(0xf0000, 0xf0001) AM_READ_PORT("WPK_DSW0")
	209	AM_RANGE(0xf0002, 0xf0003) AM_READ_PORT("WPK_DSW1")
	210	AM_RANGE(0xf0004, 0xf0005) AM_READ_PORT("WPK_DSW2")
	211	AM_IMPORT_FROM(main_map)
	212	ADDRESS_MAP_END
	213
	214	static ADDRESS_MAP_START( wpksoc_io_map, ADDRESS_SPACE_IO, 16 )
	215	AM_RANGE(0x22, 0x23) AM_WRITE(wpksoc_output_w)
	216	AM_RANGE(0xc0, 0xc1) AM_READ_PORT("WPK_IN0")
	217	AM_RANGE(0xc2, 0xc3) AM_READ_PORT("WPK_IN1")
	218	AM_IMPORT_FROM(main_portmap)
	219	ADDRESS_MAP_END
	220
190	221	/******************************************************************************/
191	222
192	223	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 16 )
r9812	r9813
204	235
205	236	static INPUT_PORTS_START( m107_2player )
206	237	PORT_START("P1_P2")
207		IREM_GENERIC_JOYSTICKS_2_BUTTONS(1, 2)
	238	IREM_GENERIC_JOYSTICKS_3_BUTTONS(1, 2)
208	239
209	240	PORT_START("COINS_DSW3")
210	241	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
r9812	r9813
214	245	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SERVICE1 )
215	246	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SERVICE )
216	247	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED )
217		PORT_BIT( 0x0080, IP_ACTIVE_~~LOW~~, IPT_VBLANK )
	248	PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_VBLANK ) //this is sprite flag on Irem M92, if this is active low then Dream Soccer '94 is unplayably slow
218	249
219	250	/* DIP switch bank 3 */
220	251	PORT_DIPUNKNOWN_DIPLOC( 0x0100, 0x0100, "SW3:1" )
r9812	r9813
293	324	PORT_INCLUDE(m107_2player)
294	325
295	326	PORT_MODIFY("COINS_DSW3")
	327	PORT_DIPNAME( 0x0c00, 0x0800, "Rapid Fire" ) PORT_DIPLOCATION("SW3:3,4")
	328	PORT_DIPSETTING( 0x0000, "Button 1 Normal, Button 3 Rapid Fire" )
	329	PORT_DIPSETTING( 0x0400, "Button 1 Rapid Fire, Button 3 No Function" )
	330	PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
	331	PORT_DIPSETTING( 0x0c00, DEF_STR( Off ) )
296	332	PORT_DIPNAME( 0x1000, 0x0000, "Continuous Play" ) PORT_DIPLOCATION("SW3:5")
297	333	PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
298	334	PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
r9812	r9813
365	401	INPUT_PORTS_END
366	402
367	403	static INPUT_PORTS_START( wpksoc )
368		PORT_INCLUDE(m107_2player)
	404	PORT_START("P1_P2")
	405	PORT_BIT(0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
	406
	407	PORT_START("COINS_DSW3")
	408	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
	409	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
	410	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 )
	411	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 )
	412	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SERVICE1 )
	413	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SERVICE )
	414	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED )
	415	PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_VBLANK ) //this is sprite flag on Irem M92, if this is active low then Dream Soccer '94 is unplayably slow
	416	PORT_DIPNAME( 0x0100, 0x0000, "DSW3" )
	417	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	418	PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
	419	PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )
	420	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	421	PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
	422	PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )
	423	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	424	PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
	425	PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )
	426	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	427	PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
	428	PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) )
	429	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	430	PORT_DIPSETTING( 0x1000, DEF_STR( On ) )
	431	PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) )
	432	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	433	PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
	434	PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) )
	435	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	436	PORT_DIPSETTING( 0x4000, DEF_STR( On ) )
	437	PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) )
	438	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	439	PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
	440
	441	PORT_START("DSW")
	442	PORT_DIPNAME( 0x0001, 0x0000, "DSW1" )
	443	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	444	PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
	445	PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) )
	446	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	447	PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
	448	PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) )
	449	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	450	PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
	451	PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) )
	452	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	453	PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
	454	PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) )
	455	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	456	PORT_DIPSETTING( 0x0010, DEF_STR( On ) )
	457	PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Unknown ) )
	458	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	459	PORT_DIPSETTING( 0x0020, DEF_STR( On ) )
	460	PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Unknown ) )
	461	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	462	PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
	463	PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) )
	464	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	465	PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
	466	PORT_DIPNAME( 0x0100, 0x0000, "DSW2" )
	467	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	468	PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
	469	PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )
	470	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	471	PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
	472	PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )
	473	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	474	PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
	475	PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )
	476	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	477	PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
	478	PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) )
	479	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	480	PORT_DIPSETTING( 0x1000, DEF_STR( On ) )
	481	PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) )
	482	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	483	PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
	484	PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) )
	485	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	486	PORT_DIPSETTING( 0x4000, DEF_STR( On ) )
	487	PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) )
	488	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	489	PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
	490
	491	PORT_START("P3_P4")
	492	PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
	493
	494	PORT_START("WPK_DSW0")
	495	PORT_DIPNAME( 0x0001, 0x0000, "WPK_DSW0-0" )
	496	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	497	PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
	498	PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) )
	499	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	500	PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
	501	PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) )
	502	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	503	PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
	504	PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) )
	505	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	506	PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
	507	PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) )
	508	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	509	PORT_DIPSETTING( 0x0010, DEF_STR( On ) )
	510	PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Unknown ) )
	511	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	512	PORT_DIPSETTING( 0x0020, DEF_STR( On ) )
	513	PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Demo_Sounds ) )
	514	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	515	PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
	516	PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) )
	517	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	518	PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
	519	PORT_DIPNAME( 0x0100, 0x0000, "WPK_DSW0-1" )
	520	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	521	PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
	522	PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )
	523	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	524	PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
	525	PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )
	526	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	527	PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
	528	PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )
	529	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	530	PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
	531	PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) )
	532	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	533	PORT_DIPSETTING( 0x1000, DEF_STR( On ) )
	534	PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) )
	535	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	536	PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
	537	PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) )
	538	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	539	PORT_DIPSETTING( 0x4000, DEF_STR( On ) )
	540	PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) )
	541	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	542	PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
	543
	544	PORT_START("WPK_DSW1")
	545	PORT_DIPNAME( 0x0001, 0x0000, "WPK_DSW1-0" )
	546	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	547	PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
	548	PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) )
	549	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	550	PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
	551	PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) )
	552	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	553	PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
	554	PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) )
	555	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	556	PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
	557	PORT_DIPNAME( 0x00f0, 0x0000, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
	558	PORT_DIPSETTING( 0xa0^0xf0, DEF_STR( 6C_1C ) )
	559	PORT_DIPSETTING( 0xb0^0xf0, DEF_STR( 5C_1C ) )
	560	PORT_DIPSETTING( 0xc0^0xf0, DEF_STR( 4C_1C ) )
	561	PORT_DIPSETTING( 0xd0^0xf0, DEF_STR( 3C_1C ) )
	562	PORT_DIPSETTING( 0xe0^0xf0, DEF_STR( 2C_1C ) )
	563	PORT_DIPSETTING( 0x10^0xf0, "2 Coins to Start/1 to Continue")
	564	PORT_DIPSETTING( 0x30^0xf0, DEF_STR( 3C_2C ) )
	565	PORT_DIPSETTING( 0x20^0xf0, DEF_STR( 4C_3C ) )
	566	PORT_DIPSETTING( 0xf0^0xf0, DEF_STR( 1C_1C ) )
	567	PORT_DIPSETTING( 0x40^0xf0, DEF_STR( 2C_3C ) )
	568	PORT_DIPSETTING( 0x90^0xf0, DEF_STR( 1C_2C ) )
	569	PORT_DIPSETTING( 0x80^0xf0, DEF_STR( 1C_3C ) )
	570	PORT_DIPSETTING( 0x70^0xf0, DEF_STR( 1C_4C ) )
	571	PORT_DIPSETTING( 0x60^0xf0, DEF_STR( 1C_5C ) )
	572	PORT_DIPSETTING( 0x50^0xf0, DEF_STR( 1C_6C ) )
	573	PORT_DIPSETTING( 0x00^0xf0, DEF_STR( Free_Play ) )
	574	PORT_DIPNAME( 0x0100, 0x0000, "WPK_DSW1-1" )
	575	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	576	PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
	577	PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )
	578	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	579	PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
	580	PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )
	581	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	582	PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
	583	PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )
	584	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	585	PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
	586	PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) )
	587	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	588	PORT_DIPSETTING( 0x1000, DEF_STR( On ) )
	589	PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) )
	590	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	591	PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
	592	PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) )
	593	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	594	PORT_DIPSETTING( 0x4000, DEF_STR( On ) )
	595	PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) )
	596	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	597	PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
	598
	599	PORT_START("WPK_DSW2")
	600	PORT_DIPNAME( 0x0001, 0x0000, "WPK_DSW2-0" )
	601	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	602	PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
	603	PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) )
	604	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	605	PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
	606	PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) )
	607	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	608	PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
	609	PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) )
	610	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	611	PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
	612	PORT_DIPNAME( 0x00f0, 0x0000, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:5,6,7,8")
	613	PORT_DIPSETTING( 0xa0^0xf0, DEF_STR( 6C_1C ) )
	614	PORT_DIPSETTING( 0xb0^0xf0, DEF_STR( 5C_1C ) )
	615	PORT_DIPSETTING( 0xc0^0xf0, DEF_STR( 4C_1C ) )
	616	PORT_DIPSETTING( 0xd0^0xf0, DEF_STR( 3C_1C ) )
	617	PORT_DIPSETTING( 0xe0^0xf0, DEF_STR( 2C_1C ) )
	618	PORT_DIPSETTING( 0x10^0xf0, "2 Coins to Start/1 to Continue")
	619	PORT_DIPSETTING( 0x30^0xf0, DEF_STR( 3C_2C ) )
	620	PORT_DIPSETTING( 0x20^0xf0, DEF_STR( 4C_3C ) )
	621	PORT_DIPSETTING( 0xf0^0xf0, DEF_STR( 1C_1C ) )
	622	PORT_DIPSETTING( 0x40^0xf0, DEF_STR( 2C_3C ) )
	623	PORT_DIPSETTING( 0x90^0xf0, DEF_STR( 1C_2C ) )
	624	PORT_DIPSETTING( 0x80^0xf0, DEF_STR( 1C_3C ) )
	625	PORT_DIPSETTING( 0x70^0xf0, DEF_STR( 1C_4C ) )
	626	PORT_DIPSETTING( 0x60^0xf0, DEF_STR( 1C_5C ) )
	627	PORT_DIPSETTING( 0x50^0xf0, DEF_STR( 1C_6C ) )
	628	PORT_DIPSETTING( 0x00^0xf0, DEF_STR( Free_Play ) )
	629	PORT_DIPNAME( 0x0100, 0x0000, "WPK_DSW2-1" )
	630	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	631	PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
	632	PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )
	633	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	634	PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
	635	PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )
	636	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	637	PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
	638	PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )
	639	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	640	PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
	641	PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) )
	642	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	643	PORT_DIPSETTING( 0x1000, DEF_STR( On ) )
	644	PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) )
	645	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	646	PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
	647	PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) )
	648	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	649	PORT_DIPSETTING( 0x4000, DEF_STR( On ) )
	650	PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) )
	651	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	652	PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
	653
	654	PORT_START("WPK_IN0")
	655	PORT_DIPNAME( 0x0001, 0x0000, "WPK_IN0-0" )
	656	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	657	PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
	658	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) // motor status?
	659	PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) )
	660	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	661	PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
	662	PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) )
	663	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	664	PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
	665	PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) )
	666	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	667	PORT_DIPSETTING( 0x0010, DEF_STR( On ) )
	668	PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Unknown ) )
	669	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	670	PORT_DIPSETTING( 0x0020, DEF_STR( On ) )
	671	PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Unknown ) )
	672	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	673	PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
	674	PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) )
	675	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	676	PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
	677	PORT_DIPNAME( 0x0100, 0x0000, "WPK_IN0-1" )
	678	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	679	PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
	680	PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )
	681	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	682	PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
	683	PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )
	684	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	685	PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
	686	PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )
	687	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	688	PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
	689	PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) )
	690	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	691	PORT_DIPSETTING( 0x1000, DEF_STR( On ) )
	692	PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) )
	693	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	694	PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
	695	PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) )
	696	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	697	PORT_DIPSETTING( 0x4000, DEF_STR( On ) )
	698	PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) )
	699	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	700	PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
	701
	702	PORT_START("WPK_IN1")
	703	PORT_DIPNAME( 0x0001, 0x0000, "WPK_IN1-0" )
	704	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	705	PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
	706	PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) )
	707	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	708	PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
	709	PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) )
	710	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	711	PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
	712	PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) )
	713	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	714	PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
	715	PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) )
	716	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	717	PORT_DIPSETTING( 0x0010, DEF_STR( On ) )
	718	PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Unknown ) )
	719	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	720	PORT_DIPSETTING( 0x0020, DEF_STR( On ) )
	721	PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Unknown ) )
	722	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	723	PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
	724	PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) )
	725	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	726	PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
	727	PORT_DIPNAME( 0x0100, 0x0000, "WPK_IN1-1" )
	728	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	729	PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
	730	PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )
	731	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	732	PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
	733	PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )
	734	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	735	PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
	736	PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )
	737	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	738	PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
	739	PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) )
	740	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	741	PORT_DIPSETTING( 0x1000, DEF_STR( On ) )
	742	PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) )
	743	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	744	PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
	745	PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) )
	746	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	747	PORT_DIPSETTING( 0x4000, DEF_STR( On ) )
	748	PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) )
	749	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	750	PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
369	751	INPUT_PORTS_END
370	752
371	753	/***************************************************************************/
r9812	r9813
442	824	MDRV_CPU_PROGRAM_MAP(main_map)
443	825	MDRV_CPU_IO_MAP(main_portmap)
444	826
445		MDRV_CPU_ADD("soundcpu", V30, 14318000/2)
	827	MDRV_CPU_ADD("soundcpu", V35, 14318000/2)
446	828	MDRV_CPU_PROGRAM_MAP(sound_map)
447	829	MDRV_CPU_CONFIG(firebarr_config)
448	830
r9812	r9813
493	875
494	876	static const nec_config wpksoc_config ={ leagueman_decryption_table, };
495	877	static MACHINE_CONFIG_DERIVED( wpksoc, firebarr )
	878	MDRV_CPU_MODIFY("maincpu")
	879	MDRV_CPU_PROGRAM_MAP(wpksoc_map)
	880	MDRV_CPU_IO_MAP(wpksoc_io_map)
	881
496	882	MDRV_CPU_MODIFY("soundcpu")
497	883	MDRV_CPU_CONFIG(wpksoc_config)
498	884	MACHINE_CONFIG_END
r9812	r9813
669	1055
670	1056	/***************************************************************************/
671	1057
672		GAME( 1993, firebarr, 0, firebarr, firebarr, firebarr, ROT270, "Irem", "Fire Barrel (Japan)", GAME_IMPERFECT_SOUND \| GAME_IMPERFECT_GRAPHICS )
673		GAME( 1994, dsoccr94, 0, dsoccr94, dsoccr94, dsoccr94, ROT0, "Irem (Data East Corporation license)", "Dream Soccer '94", 0 )
	1058	GAME( 1993, firebarr, 0, firebarr, firebarr, firebarr, ROT270, "Irem", "Fire Barrel (Japan)", 0 )
	1059	// Air Assault : World version of Fire Barrel, seen on location at the London Trocadero
	1060	GAME( 1994, dsoccr94, 0, dsoccr94, dsoccr94, dsoccr94, ROT0, "Irem (Data East Corporation license)", "Dream Soccer '94 (M107 Hardware)", 0 )
674	1061	GAME( 1995, wpksoc, 0, wpksoc, wpksoc, wpksoc, ROT0, "Jaleco", "World PK Soccer", GAME_NOT_WORKING \| GAME_IMPERFECT_GRAPHICS )
675	1062	GAME( 1994, kftgoal, wpksoc, wpksoc, wpksoc, wpksoc, ROT0, "Jaleco", "Kick for the Goal", GAME_NOT_WORKING \| GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/cave.c
r9812	r9813
19	19	Year + Game License PCB Tilemaps Sprites Other
20	20	-----------------------------------------------------------------------------------------
21	21	94 Mazinger Z Banpresto ? 038 9335EX706 013 9341E7009 Z80
22		94 PowerInstinct 2 Atlus ATG02? 038 9429WX709 013 Z80 NMK 112
23		95 P.I. Legends Atlus AT047G2-B 038 9429WX709 013 9341E7009 Z80 NMK 112
	22	94 Power Instinct 2 Atlus ATG02? 038 9429WX709 013 Z80 NMK 112
	23	95 Gogetsuji Legends Atlus AT047G2-B 038 9429WX709 013 9341E7009 Z80 NMK 112
24	24	95 Metamoqester Banpresto BP947A 038 9437WX711 013 9346E7002 Z80
25	25	95 Sailor Moon Banpresto BP945A 038 9437WX711 013 9346E7002 Z80
26	26	95 Donpachi Atlus AT-C01DP-2 038 9429WX727 013 8647-01 NMK 112
r9812	r9813
4657	4657	GAME( 1995, metmqstr, 0, metmqstr, metmqstr, metmqstr, ROT0, "Banpresto / Pandorabox", "Metamoqester (International)", 0 )
4658	4658	GAME( 1995, nmaster, metmqstr, metmqstr, metmqstr, metmqstr, ROT0, "Banpresto / Pandorabox", "Oni - The Ninja Master (Japan)", 0 )
4659	4659
4660		GAME( 1995, plegends, 0, pwrinst2, metmqstr, pwrinst2j,ROT0, "Atlus", "Power Instinct Legends (US, Ver. 95/06/20)", 0 )
4661		GAME( 1995, plegendsj, plegends, pwrinst2, metmqstr, pwrinst2j,ROT0, "Atlus", "Gouketsuji Ichizoku Saikyou Densetsu (Japan, Ver. 95/06/20)", 0 )
	4660	GAME( 1995, plegends, 0, pwrinst2, metmqstr, pwrinst2j,ROT0, "Atlus", "Gogetsuji Legends (US, Ver. 95/06/20)", 0 )
	4661	GAME( 1995, plegendsj, plegends, pwrinst2, metmqstr, pwrinst2j,ROT0, "Atlus", "Gouketsuji Gaiden - Saikyou Densetsu (Japan, Ver. 95/06/20)", 0 )
4662	4662
4663	4663	// The EEPROM determines the region, program roms are the same between sets
4664	4664	GAME( 1995, sailormn, 0, sailormn, cave, sailormn, ROT0, "Banpresto", "Pretty Soldier Sailor Moon (Ver. 95/03/22B, Europe)", 0 )

src/mame/drivers/bigfghtr.c
r9812	r9813
139	139
140	140	/* misc */
141	141	int read_latch;
	142	UINT8 mcu_input_snippet;
	143	UINT8 mcu_jsr_snippet;
142	144	};
143	145
144	146
r9812	r9813
325	327	flip_screen_set(space->machine, state->vreg & 0x1000);
326	328	}
327	329
328		static READ16_HANDLER( latch_r )
329		{
330		bigfghtr_state *state = space->machine->driver_data<bigfghtr_state>();
331	330
332		state->read_latch = 1;
333		return 0;
334		}
335
336
337	331	static WRITE16_HANDLER( sharedram_w )
338	332	{
339	333	bigfghtr_state *state = space->machine->driver_data<bigfghtr_state>();
340	334	COMBINE_DATA(&state->sharedram[offset]);
	335
	336	switch(offset)
	337	{
	338	case 0x40/2:
	339	state->mcu_input_snippet = (data == 0x100);
	340	state->mcu_jsr_snippet = (data == 0x300);
	341	break;
	342	}
341	343	}
342	344
343	345	static READ16_HANDLER(sharedram_r)
344	346	{
345	347	bigfghtr_state *state = space->machine->driver_data<bigfghtr_state>();
346		switch(offset)
	348
	349	if(state->mcu_input_snippet)
347	350	{
348		case 0x40/2:
349		if(state->read_latch)
	351	switch(offset+0x600/2)
350	352	{
351		state->read_latch = 0;
352		return mame_rand(space->machine);
	353	case 0x640/2:
	354	if(state->read_latch)
	355	{
	356	state->read_latch = 0;
	357	return mame_rand(space->machine); // TODO
	358	}
	359	break;
	360
	361	case 0x642/2:
	362	return (input_port_read(space->machine, "DSW0") & 0xffff) ^ 0xffff;
	363
	364	case 0x644/2:
	365	return (input_port_read(space->machine, "DSW1") & 0xffff) ^ 0xffff;
	366
	367	case 0x646/2:
	368	return (input_port_read(space->machine, "P1") & 0xffff) ^ 0xffff;
	369
	370	case 0x648/2:
	371	return (input_port_read(space->machine, "P2") & 0xffff) ^ 0xffff;
353	372	}
354		~~break;~~
	373	}
355	374
356		case 0x46/2:
357		return (input_port_read(space->machine, "P1") & 0xffff) ^ 0xffff;
	375	if(state->mcu_jsr_snippet)
	376	{
	377	switch(offset+0x600/2)
	378	{
	379	case 0x640/2:
	380	if(state->read_latch)
	381	{
	382	state->read_latch = 0;
	383	return mame_rand(space->machine); // TODO
	384	}
	385	break;
	386	case 0x642/2:
	387	return (input_port_read(space->machine, "DSW0") & 0xffff) ^ 0xffff;
358	388
	389	case 0x644/2:
	390	return (input_port_read(space->machine, "DSW1") & 0xffff) ^ 0xffff;
	391
	392	case 0x646/2:
	393	return (input_port_read(space->machine, "P1") & 0xffff) ^ 0xffff;
	394
	395	case 0x648/2:
	396	return (input_port_read(space->machine, "P2") & 0xffff) ^ 0xffff;
	397
	398	/*
	399	protection controls where the program code should jump to.
	400
	401	example snippet:
	402	00DB2A: 41FA FE86 lea (-$17a,PC), A0; ($d9b2) ;base program vector
	403	00DB2E: 4DF9 0008 0E2A lea $80e2a.l, A6 ;base RAM vector, used by the i8751 to send the value, this value is added to the above A0
	404	00DB34: 3039 0008 0E62 move.w $80e62.l, D0 ;number of snippets to execute
	405	00DB3A: 6100 00F0 bsr $dc2c
	406	*/
	407
	408	/* bp daee, A0 = 0xdd02, A6 = 0x808ca, D0 = 0x80902 */
	409	//case 0x902/2:
	410	// return 0x0001;
	411	//case (0x90a+0x24)/2:
	412	// return 0x0001;
	413	//case (0x902+8)/2:
	414	// return 0x0004; // 0xf86a
	415
	416	/* bp db02, A0 = 0xdc2e, A6 = 0x80912, D0 = 0x8094a */
	417	//case 0x94a/2:
	418	// return 1;
	419	//case (0x94a+8)/2:
	420	// return 0x00dc; // 0xd62e
	421
	422	/* bp db16, A0 = 0xda86, A6 = 0x80c22, D0 = 0x80c5a */
	423	//case 0xc5a/2:
	424	// return 1;
	425	//case (0xc5a+8)/2:
	426	// return 0x0288; // 0x345f4
	427
	428	/* bp db2a, A0 = 0xd9b2, A6 = 0x80e2a, D0 = 0x80e62 */
	429
	430	/* bp db3e, A0 = 0xd8da, A6 = 0x81132, D0 = 0x8116a */
	431
	432	/* bp db52, A0 = 0xd806, A6 = 0x8133a, D0 = 0x81372 */
	433
	434	/* bp db66, A0 = 0xd7aa, A6 = 0x81742, D0 = 0x8177a */
	435
	436	/* bp db7a, A0 = 0xd746, A6 = 0x81b4a, D0 = 0x81b82 */
	437
	438	/* bp db8e, A0 = 0xd672, A6 = 0x81f52, D0 = 0x81f8a */
	439
	440	/* bp dba4, A0 = 0xd5ae, A6 = 0x8205a, D0 = 0x82092 */
	441
	442	/* bp dbba, A0 = 0xd5be, A6 = 0x82862, D0 = 0x8289a */
	443
	444	/* bp dbd0, A0 = 0xd512, A6 = 0x8296a, D0 = 0x829a2 */
	445
	446	/* bp dbe6, A0 = 0xd466, A6 = 0x82d72, D0 = 0x82daa */
	447
	448	/* bp dbfc, A0 = 0xd43e, A6 = 0x8357a, D0 = 0x835b2 */
	449
	450	/* following is separated from the others, dunno why ... */
	451	/* bp dc14, A0 = 0xd3aa, A6 = 0x835a2, D0 = 0x835b2 */
	452
	453
	454	/*case 0x
	455	case 0x94a/2:
	456	return 0x0002*4;
	457	case (0x90a+2*0x40)/2:
	458	case (0x90a+3*0x40)/2:
	459	return 0x0003*4;
	460	case (0x90a+4*0x40)/2:
	461	return 0x000c*4; // 0x13d74
	462	case (0x90a+5*0x40)/2:
	463	return 0x000d*4; // 0x130f6
	464	case (0x90a+6*0x40)/2:
	465	return 0x000e*4; // 0x1817e
	466	case (0x90a+7*0x40)/2:
	467	return 0x0010*4; // 0x15924
	468	//case (0x90a+0x25)/2:
	469	// return 2;*/
	470	}
359	471	}
	472
360	473	return state->sharedram[offset];
361	474	}
362	475
	476	static READ16_HANDLER( latch_r )
	477	{
	478	bigfghtr_state *state = space->machine->driver_data<bigfghtr_state>();
	479
	480	state->read_latch = 1;
	481	return 0;
	482	}
	483
363	484	static ADDRESS_MAP_START( mainmem, ADDRESS_SPACE_PROGRAM, 16 )
364	485	AM_RANGE(0x000000, 0x07ffff) AM_ROM
365	486	AM_RANGE(0x080000, 0x0805ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
366		AM_RANGE(0x080600, 0x080fff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE_MEMBER(bigfghtr_state, sharedram)
367		AM_RANGE(0x081000, 0x085fff) AM_RAM //??
	487	AM_RANGE(0x080600, 0x083fff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE_MEMBER(bigfghtr_state, sharedram)
	488	AM_RANGE(0x084000, 0x085fff) AM_RAM //??
368	489	AM_RANGE(0x086000, 0x086fff) AM_RAM_WRITE(bg_videoram_w) AM_BASE_MEMBER(bigfghtr_state, bg_videoram)
369	490	AM_RANGE(0x087000, 0x087fff) AM_RAM_WRITE(fg_videoram_w) AM_BASE_MEMBER(bigfghtr_state, fg_videoram)
370	491	AM_RANGE(0x088000, 0x089fff) AM_RAM_WRITE(text_videoram_w) AM_BASE_MEMBER(bigfghtr_state, text_videoram)
r9812	r9813
434	555	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
435	556	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
436	557	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_SERVICE1 )
437		PORT_SERVICE( 0x0200, IP_ACTIVE_LOW )
	558	PORT_SERVICE_NO_TOGGLE( 0x0200, IP_ACTIVE_LOW )
438	559	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_TILT )
439	560	PORT_BIT( 0xf800, IP_ACTIVE_LOW, IPT_UNKNOWN )
440	561
r9812	r9813
666	787	ROM_LOAD( "tf.13h", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) ) /* Prom is a N82S129AN type */
667	788	ROM_END
668	789
669
670		static DRIVER_INIT( skyrobo )
671		{
672		//RAM TESTS
673		UINT16 RAM = (UINT16 )memory_region(machine, "maincpu");
674		RAM[0x2e822 / 2] = 0x4ef9;
675		RAM[0x2e824 / 2] = 0x0002;
676		RAM[0x2e826 / 2] = 0xe9ae;
677		}
678
679
680		static DRIVER_INIT( bigfghtr )
681		{
682		//RAM TESTS
683		UINT16 RAM = (UINT16 )memory_region(machine, "maincpu");
684		RAM[0x2e8cc / 2] = 0x4ef9;
685		RAM[0x2e8ce / 2] = 0x0002;
686		RAM[0x2e8d0 / 2] = 0xea58;
687		}
688
689		GAME( 1989, skyrobo, 0, bigfghtr, bigfghtr, skyrobo, ROT0, "Nichibutsu", "Sky Robo", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_SUPPORTS_SAVE )
690		GAME( 1989, bigfghtr, skyrobo, bigfghtr, bigfghtr, bigfghtr, ROT0, "Nichibutsu", "Tatakae! Big Fighter", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_SUPPORTS_SAVE )
	790	GAME( 1989, skyrobo, 0, bigfghtr, bigfghtr, 0, ROT0, "Nichibutsu", "Sky Robo", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_SUPPORTS_SAVE )
	791	GAME( 1989, bigfghtr, skyrobo, bigfghtr, bigfghtr, 0, ROT0, "Nichibutsu", "Tatakae! Big Fighter (Japan)", GAME_NOT_WORKING \| GAME_UNEMULATED_PROTECTION \| GAME_SUPPORTS_SAVE )

src/osd/sdl/drawogl.c
r9812	r9813
3225	3225	sdl_info sdl = (sdl_info ) window->dxdata;
3226	3226
3227	3227	//FIXME: Handled in drawogl_window_draw as well
3228		sdl->blittimer = 2;
	3228	sdl->blittimer = 3;
3229	3229	}
3230	3230
3231	3231

src/emu/debug/debugcmd.c
r9812	r9813
1834	1834	CHEAT_DECREASEOF,
1835	1835	CHEAT_INCREASEOF,
1836	1836	CHEAT_SMALLEROF,
1837		CHEAT_GREATEROF
	1837	CHEAT_GREATEROF,
	1838	CHEAT_CHANGEDBY
1838	1839	};
1839	1840
1840	1841	if (cheat.cpu == 0)
r9812	r9813
1869	1870	condition = CHEAT_SMALLEROF;
1870	1871	else if (!strcmp(param[0], "greaterof") \|\| !strcmp(param[0], "gt") \|\| !strcmp(param[0], ">"))
1871	1872	condition = CHEAT_GREATEROF;
	1873	else if (!strcmp(param[0], "changedby") \|\| !strcmp(param[0], "ch") \|\| !strcmp(param[0], "~"))
	1874	condition = CHEAT_CHANGEDBY;
1872	1875	else
1873	1876	{
1874	1877	debug_console_printf(machine, "Invalid condition type\n");
r9812	r9813
1955	1958	else
1956	1959	disable_byte = ((UINT64)cheat_value <= (UINT64)comp_value);
1957	1960	break;
	1961	case CHEAT_CHANGEDBY:
	1962	if (cheat_value > comp_byte)
	1963	disable_byte = (cheat_value != comp_byte + comp_value);
	1964	else
	1965	disable_byte = (cheat_value != comp_byte - comp_value);
	1966	break;
1958	1967	}
1959	1968
1960	1969	if (disable_byte)

src/emu/debug/debughlp.c
r9812	r9813
1113	1113	" greaterof [gt]\n"
1114	1114	" without <comparisonvalue> this condition is invalid\n"
1115	1115	" with <comparisonvalue> search for all bytes that are larger than the <comparisonvalue>.\n"
	1116	" changedby [ch, ~]\n"
	1117	" without <comparisonvalue> this condition is invalid\n"
	1118	" with <comparisonvalue> search for all bytes that have changed by the <comparisonvalue> since the last search.\n"
1116	1119	"\n"
1117	1120	"Examples:\n"
1118	1121	"\n"
r9812	r9813
1156	1159	" greaterof [gt]\n"
1157	1160	" without <comparisonvalue> this condition is invalid.\n"
1158	1161	" with <comparisonvalue> search for all bytes that are larger than the <comparisonvalue>.\n"
	1162	" changedby [ch, ~]\n"
	1163	" without <comparisonvalue> this condition is invalid\n"
	1164	" with <comparisonvalue> search for all bytes that have changed by the <comparisonvalue> since the initial search.\n"
1159	1165	"\n"
1160	1166	"Examples:\n"
1161	1167	"\n"

src/emu/cpu/h83002/h8ops.h
r9812	r9813
64	64	static UINT16 h8_rotxl16(h83xx_state *h8, UINT16 src);
65	65	static UINT32 h8_rotxl32(h83xx_state *h8, UINT32 src);
66	66
	67	static UINT16 h8_rotr16(h83xx_state *h8, UINT16 src);
	68
67	69	static UINT8 h8_rotxr8(h83xx_state *h8, UINT8 src);
68	70	static UINT16 h8_rotxr16(h83xx_state *h8, UINT16 src);
69	71
r9812	r9813
520	522	h8_set_ccr(h8, udata8);
521	523	H8_IFETCH_TIMING(1)
522	524	break;
	525	case 0x7:
523	526	// ldc
	527	h8_set_ccr(h8, opcode & 0xff);
	528	H8_IFETCH_TIMING(1)
	529	break;
524	530	case 0x8:
525	531	// add.b rx, ry
526	532	dstreg = opcode & 0xf;
r9812	r9813
884	890	h8_setreg16(h8, opcode & 0xf, udata16);
885	891	H8_IFETCH_TIMING(1);
886	892	break;
	893	case 0x9:
	894	// rotr.w Rx
	895	udata16 = h8_getreg16(h8, opcode & 0xf);
	896	udata16 = h8_rotr16(h8, udata16);
	897	h8_setreg16(h8, opcode & 0xf, udata16);
	898	H8_IFETCH_TIMING(1);
	899	break;
887	900	default:
888	901	logerror("H8/3xx: Unk. group 1 3 %x\n", opcode);
889	902	h8->h8err = 1;
r9812	r9813
2826	2839	return res;
2827	2840	}
2828	2841
	2842	static UINT16 h8_rotr16(h83xx_state *h8, UINT16 src)
	2843	{
	2844	UINT16 res;
	2845
	2846	// rotate right, not through carry
	2847	res = src>>1;
	2848	if (src & 1) res \|= 0x8000; // put cflag in upper bit
	2849	h8->h8cflag = src & 1;
	2850
	2851	// N and Z modified
	2852	h8->h8nflag = (res>>15) & 1;
	2853	h8->h8vflag = 0;
	2854
	2855	// zflag
	2856	if(res==0)
	2857	{
	2858	h8->h8zflag = 1;
	2859	}
	2860	else
	2861	{
	2862	h8->h8zflag = 0;
	2863	}
	2864
	2865	return res;
	2866	}
	2867
2829	2868	static UINT16 h8_rotxr16(h83xx_state *h8, UINT16 src)
2830	2869	{
2831	2870	UINT16 res;

src/emu/cpu/cpu.mak
r9812	r9813
1147	1147	ifneq ($(filter NEC,$(CPUS)),)
1148	1148	OBJDIRS += $(CPUOBJ)/nec
1149	1149	CPUOBJS += $(CPUOBJ)/nec/nec.o
	1150	CPUOBJS += $(CPUOBJ)/nec/v25.o
	1151	CPUOBJS += $(CPUOBJ)/nec/v25sfr.o
1150	1152	DASMOBJS += $(CPUOBJ)/nec/necdasm.o
1151	1153	endif
1152	1154
r9812	r9813
1159	1161	$(CPUOBJ)/nec/nec.o: $(CPUSRC)/nec/nec.c \
1160	1162	$(CPUSRC)/nec/nec.h \
1161	1163	$(CPUSRC)/nec/necea.h \
1162		$(CPUSRC)/nec/nechost.h \
	1164	$(CPUSRC)/nec/necinstr.c \
1163	1165	$(CPUSRC)/nec/necinstr.h \
1164	1166	$(CPUSRC)/nec/necmodrm.h \
1165	1167	$(CPUSRC)/nec/necpriv.h
1166	1168
	1169	$(CPUOBJ)/nec/v25.o: $(CPUSRC)/nec/v25.c \
	1170	$(CPUSRC)/nec/nec.h \
	1171	$(CPUSRC)/nec/necea.h \
	1172	$(CPUSRC)/nec/necinstr.c \
	1173	$(CPUSRC)/nec/v25instr.c \
	1174	$(CPUSRC)/nec/v25instr.h \
	1175	$(CPUSRC)/nec/necmodrm.h \
	1176	$(CPUSRC)/nec/v25priv.h
	1177
	1178	$(CPUOBJ)/nec/v25sfr.o: $(CPUSRC)/nec/v25sfr.c \
	1179	$(CPUSRC)/nec/nec.h \
	1180	$(CPUSRC)/nec/v25priv.h
	1181
1167	1182	$(CPUOBJ)/v30mz/v30mz.o: $(CPUSRC)/v30mz/v30mz.c \
1168	1183	$(CPUSRC)/v30mz/v30mz.h \
1169	1184	$(CPUSRC)/v30mz/necmodrm.h \

src/emu/cpu/i86/i86.c
r9812	r9813
342	342
343	343	static CPU_DISASSEMBLE( i8086 )
344	344	{
345		return i386_dasm_one(buffer, pc, oprom, 16);
	345	return i386_dasm_one(buffer, pc, oprom, 1);
346	346	}
347	347
348	348
r9812	r9813
557	557	case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
558	558	case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
559	559	case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
560		case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 16; break;
	560	case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
561	561	case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
562	562	case CPUINFO_INT_MAX_CYCLES: info->i = 50; break;
563	563

src/emu/cpu/i86/i286.c
r9812	r9813
246	246
247	247	static CPU_DISASSEMBLE( i80286 )
248	248	{
249		return i386_dasm_one(buffer, pc, oprom, 16);
	249	return i386_dasm_one(buffer, pc, oprom, 2);
250	250	}
251	251
252	252	static CPU_INIT( i80286 )
r9812	r9813
401	401	case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
402	402	case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
403	403	case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
404		case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 15; break;
	404	case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
405	405	case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
406	406	case CPUINFO_INT_MAX_CYCLES: info->i = 50; break;
407	407

src/emu/cpu/i386/i386dasm.c
r9812	r9813
1092	1092
1093	1093	static int address_size;
1094	1094	static int operand_size;
	1095	static int max_length;
1095	1096	static UINT64 pc;
1096	1097	static UINT8 modrm;
1097	1098	static UINT32 segment;
r9812	r9813
1106	1107
1107	1108	INLINE UINT8 FETCH(void)
1108	1109	{
1109		if ((opcode_ptr - opcode_ptr_base) + 1 > 15)
	1110	if ((opcode_ptr - opcode_ptr_base) + 1 > max_length)
1110	1111	return 0xff;
1111	1112	pc++;
1112	1113	return *opcode_ptr++;
r9812	r9813
1115	1116	INLINE UINT16 FETCH16(void)
1116	1117	{
1117	1118	UINT16 d;
1118		if ((opcode_ptr - opcode_ptr_base) + 2 > 15)
	1119	if ((opcode_ptr - opcode_ptr_base) + 2 > max_length)
1119	1120	return 0xffff;
1120	1121	d = opcode_ptr[0] \| (opcode_ptr[1] << 8);
1121	1122	opcode_ptr += 2;
r9812	r9813
1126	1127	INLINE UINT32 FETCH32(void)
1127	1128	{
1128	1129	UINT32 d;
1129		if ((opcode_ptr - opcode_ptr_base) + 4 > 15)
	1130	if ((opcode_ptr - opcode_ptr_base) + 4 > max_length)
1130	1131	return 0xffffffff;
1131	1132	d = opcode_ptr[0] \| (opcode_ptr[1] << 8) \| (opcode_ptr[2] << 16) \| (opcode_ptr[3] << 24);
1132	1133	opcode_ptr += 4;
r9812	r9813
1136	1137
1137	1138	INLINE UINT8 FETCHD(void)
1138	1139	{
1139		if ((opcode_ptr - opcode_ptr_base) + 1 > 15)
	1140	if ((opcode_ptr - opcode_ptr_base) + 1 > max_length)
1140	1141	return 0xff;
1141	1142	pc++;
1142	1143	return *opcode_ptr++;
r9812	r9813
1145	1146	INLINE UINT16 FETCHD16(void)
1146	1147	{
1147	1148	UINT16 d;
1148		if ((opcode_ptr - opcode_ptr_base) + 2 > 15)
	1149	if ((opcode_ptr - opcode_ptr_base) + 2 > max_length)
1149	1150	return 0xffff;
1150	1151	d = opcode_ptr[0] \| (opcode_ptr[1] << 8);
1151	1152	opcode_ptr += 2;
r9812	r9813
1156	1157	INLINE UINT32 FETCHD32(void)
1157	1158	{
1158	1159	UINT32 d;
1159		if ((opcode_ptr - opcode_ptr_base) + 4 > 15)
	1160	if ((opcode_ptr - opcode_ptr_base) + 4 > max_length)
1160	1161	return 0xffffffff;
1161	1162	d = opcode_ptr[0] \| (opcode_ptr[1] << 8) \| (opcode_ptr[2] << 16) \| (opcode_ptr[3] << 24);
1162	1163	opcode_ptr += 4;
r9812	r9813
2128	2129	UINT8 op;
2129	2130
2130	2131	opcode_ptr = opcode_ptr_base = oprom;
2131		address_size = (mode == 16) ? 0 : (mode == 32) ? 1 : 2;
2132		operand_size = (mode == 16) ? 0 : 1;
	2132	switch(mode)
	2133	{
	2134	case 1: /* 8086/8088/80186/80188 */
	2135	address_size = 0;
	2136	operand_size = 0;
	2137	max_length = 8; /* maximum without redundant prefixes - not enforced by chip */
	2138	break;
	2139	case 2: /* 80286 */
	2140	address_size = 0;
	2141	operand_size = 0;
	2142	max_length = 10;
	2143	break;
	2144	case 16: /* 80386+ 16-bit code segment */
	2145	address_size = 0;
	2146	operand_size = 0;
	2147	max_length = 15;
	2148	break;
	2149	case 32: /* 80386+ 32-bit code segment */
	2150	address_size = 1;
	2151	operand_size = 1;
	2152	max_length = 15;
	2153	break;
	2154	case 64: /* x86_64 */
	2155	address_size = 2;
	2156	operand_size = 1;
	2157	max_length = 15;
	2158	break;
	2159	}
2133	2160	pc = eip;
2134	2161	dasm_flags = 0;
2135	2162	segment = 0;

src/emu/cpu/nec/necea.h
r9812	r9813
3	3	static UINT16 EO;
4	4	static UINT16 E16;
5	5
6		static unsigned EA_000(nec_state_t *nec_state) { EO=nec_state->regs.w[BW]+nec_state->regs.w[IX]; EA=DefaultBase(DS0)+EO; return EA; }
7		static unsigned EA_001(nec_state_t *nec_state) { EO=nec_state->regs.w[BW]+nec_state->regs.w[IY]; EA=DefaultBase(DS0)+EO; return EA; }
8		static unsigned EA_002(nec_state_t *nec_state) { EO=nec_state->regs.w[BP]+nec_state->regs.w[IX]; EA=DefaultBase(SS)+EO; return EA; }
9		static unsigned EA_003(nec_state_t *nec_state) { EO=nec_state->regs.w[BP]+nec_state->regs.w[IY]; EA=DefaultBase(SS)+EO; return EA; }
10		static unsigned EA_004(nec_state_t *nec_state) { EO=nec_state->regs.w[IX]; EA=DefaultBase(DS0)+EO; return EA; }
11		static unsigned EA_005(nec_state_t *nec_state) { EO=nec_state->regs.w[IY]; EA=DefaultBase(DS0)+EO; return EA; }
	6	static unsigned EA_000(nec_state_t *nec_state) { EO=Wreg(BW)+Wreg(IX); EA=DefaultBase(DS0)+EO; return EA; }
	7	static unsigned EA_001(nec_state_t *nec_state) { EO=Wreg(BW)+Wreg(IY); EA=DefaultBase(DS0)+EO; return EA; }
	8	static unsigned EA_002(nec_state_t *nec_state) { EO=Wreg(BP)+Wreg(IX); EA=DefaultBase(SS)+EO; return EA; }
	9	static unsigned EA_003(nec_state_t *nec_state) { EO=Wreg(BP)+Wreg(IY); EA=DefaultBase(SS)+EO; return EA; }
	10	static unsigned EA_004(nec_state_t *nec_state) { EO=Wreg(IX); EA=DefaultBase(DS0)+EO; return EA; }
	11	static unsigned EA_005(nec_state_t *nec_state) { EO=Wreg(IY); EA=DefaultBase(DS0)+EO; return EA; }
12	12	static unsigned EA_006(nec_state_t *nec_state) { EO=FETCH(); EO+=FETCH()<<8; EA=DefaultBase(DS0)+EO; return EA; }
13		static unsigned EA_007(nec_state_t *nec_state) { EO=~~nec_state->~~reg~~s.w[~~BW]; EA=DefaultBase(DS0)+EO; return EA; }
	13	static unsigned EA_007(nec_state_t *nec_state) { EO=Wreg(BW); EA=DefaultBase(DS0)+EO; return EA; }
14	14
15		static unsigned EA_100(nec_state_t *nec_state) { EO=(nec_state->regs.w[BW]+nec_state->regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
16		static unsigned EA_101(nec_state_t *nec_state) { EO=(nec_state->regs.w[BW]+nec_state->regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
17		static unsigned EA_102(nec_state_t *nec_state) { EO=(nec_state->regs.w[BP]+nec_state->regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
18		static unsigned EA_103(nec_state_t *nec_state) { EO=(nec_state->regs.w[BP]+nec_state->regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
19		static unsigned EA_104(nec_state_t *nec_state) { EO=(nec_state->regs.w[IX]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
20		static unsigned EA_105(nec_state_t *nec_state) { EO=(nec_state->regs.w[IY]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
21		static unsigned EA_106(nec_state_t *nec_state) { EO=(nec_state->regs.w[BP]+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
22		static unsigned EA_107(nec_state_t *nec_state) { EO=(nec_state->regs.w[BW]+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
	15	static unsigned EA_100(nec_state_t *nec_state) { EO=(Wreg(BW)+Wreg(IX)+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
	16	static unsigned EA_101(nec_state_t *nec_state) { EO=(Wreg(BW)+Wreg(IY)+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
	17	static unsigned EA_102(nec_state_t *nec_state) { EO=(Wreg(BP)+Wreg(IX)+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
	18	static unsigned EA_103(nec_state_t *nec_state) { EO=(Wreg(BP)+Wreg(IY)+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
	19	static unsigned EA_104(nec_state_t *nec_state) { EO=(Wreg(IX)+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
	20	static unsigned EA_105(nec_state_t *nec_state) { EO=(Wreg(IY)+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
	21	static unsigned EA_106(nec_state_t *nec_state) { EO=(Wreg(BP)+(INT8)FETCH()); EA=DefaultBase(SS)+EO; return EA; }
	22	static unsigned EA_107(nec_state_t *nec_state) { EO=(Wreg(BW)+(INT8)FETCH()); EA=DefaultBase(DS0)+EO; return EA; }
23	23
24		static unsigned EA_200(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BW]+nec_state->regs.w[IX]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
25		static unsigned EA_201(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BW]+nec_state->regs.w[IY]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
26		static unsigned EA_202(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BP]+nec_state->regs.w[IX]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
27		static unsigned EA_203(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BP]+nec_state->regs.w[IY]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
28		static unsigned EA_204(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[IX]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
29		static unsigned EA_205(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[IY]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
30		static unsigned EA_206(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BP]+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
31		static unsigned EA_207(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=nec_state->regs.w[BW]+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
	24	static unsigned EA_200(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=Wreg(BW)+Wreg(IX)+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
	25	static unsigned EA_201(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=Wreg(BW)+Wreg(IY)+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
	26	static unsigned EA_202(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=Wreg(BP)+Wreg(IX)+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
	27	static unsigned EA_203(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=Wreg(BP)+Wreg(IY)+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
	28	static unsigned EA_204(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=Wreg(IX)+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
	29	static unsigned EA_205(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=Wreg(IY)+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
	30	static unsigned EA_206(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=Wreg(BP)+(INT16)E16; EA=DefaultBase(SS)+EO; return EA; }
	31	static unsigned EA_207(nec_state_t *nec_state) { E16=FETCH(); E16+=FETCH()<<8; EO=Wreg(BW)+(INT16)E16; EA=DefaultBase(DS0)+EO; return EA; }
32	32
33	33	static unsigned (const GetEA[192])(nec_state_t )={
34	34	EA_000, EA_001, EA_002, EA_003, EA_004, EA_005, EA_006, EA_007,

src/emu/cpu/nec/v25instr.h
r0	r9813
	1	static void i_add_br8(nec_state_t *nec_state);
	2	static void i_add_wr16(nec_state_t *nec_state);
	3	static void i_add_r8b(nec_state_t *nec_state);
	4	static void i_add_r16w(nec_state_t *nec_state);
	5	static void i_add_ald8(nec_state_t *nec_state);
	6	static void i_add_axd16(nec_state_t *nec_state);
	7	static void i_push_es(nec_state_t *nec_state);
	8	static void i_pop_es(nec_state_t *nec_state);
	9	static void i_or_br8(nec_state_t *nec_state);
	10	static void i_or_r8b(nec_state_t *nec_state);
	11	static void i_or_wr16(nec_state_t *nec_state);
	12	static void i_or_r16w(nec_state_t *nec_state);
	13	static void i_or_ald8(nec_state_t *nec_state);
	14	static void i_or_axd16(nec_state_t *nec_state);
	15	static void i_push_cs(nec_state_t *nec_state);
	16	ATTR_UNUSED static void i_pre_nec(nec_state_t *nec_state);
	17	static void i_pre_v25(nec_state_t *nec_state);
	18	static void i_adc_br8(nec_state_t *nec_state);
	19	static void i_adc_wr16(nec_state_t *nec_state);
	20	static void i_adc_r8b(nec_state_t *nec_state);
	21	static void i_adc_r16w(nec_state_t *nec_state);
	22	static void i_adc_ald8(nec_state_t *nec_state);
	23	static void i_adc_axd16(nec_state_t *nec_state);
	24	static void i_push_ss(nec_state_t *nec_state);
	25	static void i_pop_ss(nec_state_t *nec_state);
	26	static void i_sbb_br8(nec_state_t *nec_state);
	27	static void i_sbb_wr16(nec_state_t *nec_state);
	28	static void i_sbb_r8b(nec_state_t *nec_state);
	29	static void i_sbb_r16w(nec_state_t *nec_state);
	30	static void i_sbb_ald8(nec_state_t *nec_state);
	31	static void i_sbb_axd16(nec_state_t *nec_state);
	32	static void i_push_ds(nec_state_t *nec_state);
	33	static void i_pop_ds(nec_state_t *nec_state);
	34	static void i_and_br8(nec_state_t *nec_state);
	35	static void i_and_r8b(nec_state_t *nec_state);
	36	static void i_and_wr16(nec_state_t *nec_state);
	37	static void i_and_r16w(nec_state_t *nec_state);
	38	static void i_and_ald8(nec_state_t *nec_state);
	39	static void i_and_axd16(nec_state_t *nec_state);
	40	static void i_es(nec_state_t *nec_state);
	41	static void i_daa(nec_state_t *nec_state);
	42	static void i_sub_br8(nec_state_t *nec_state);
	43	static void i_sub_wr16(nec_state_t *nec_state);
	44	static void i_sub_r8b(nec_state_t *nec_state);
	45	static void i_sub_r16w(nec_state_t *nec_state);
	46	static void i_sub_ald8(nec_state_t *nec_state);
	47	static void i_sub_axd16(nec_state_t *nec_state);
	48	static void i_cs(nec_state_t *nec_state);
	49	static void i_das(nec_state_t *nec_state);
	50	static void i_xor_br8(nec_state_t *nec_state);
	51	static void i_xor_r8b(nec_state_t *nec_state);
	52	static void i_xor_wr16(nec_state_t *nec_state);
	53	static void i_xor_r16w(nec_state_t *nec_state);
	54	static void i_xor_ald8(nec_state_t *nec_state);
	55	static void i_xor_axd16(nec_state_t *nec_state);
	56	static void i_ss(nec_state_t *nec_state);
	57	static void i_aaa(nec_state_t *nec_state);
	58	static void i_cmp_br8(nec_state_t *nec_state);
	59	static void i_cmp_wr16(nec_state_t *nec_state);
	60	static void i_cmp_r8b(nec_state_t *nec_state);
	61	static void i_cmp_r16w(nec_state_t *nec_state);
	62	static void i_cmp_ald8(nec_state_t *nec_state);
	63	static void i_cmp_axd16(nec_state_t *nec_state);
	64	static void i_ds(nec_state_t *nec_state);
	65	static void i_aas(nec_state_t *nec_state);
	66	static void i_inc_ax(nec_state_t *nec_state);
	67	static void i_inc_cx(nec_state_t *nec_state);
	68	static void i_inc_dx(nec_state_t *nec_state);
	69	static void i_inc_bx(nec_state_t *nec_state);
	70	static void i_inc_sp(nec_state_t *nec_state);
	71	static void i_inc_bp(nec_state_t *nec_state);
	72	static void i_inc_si(nec_state_t *nec_state);
	73	static void i_inc_di(nec_state_t *nec_state);
	74	static void i_dec_ax(nec_state_t *nec_state);
	75	static void i_dec_cx(nec_state_t *nec_state);
	76	static void i_dec_dx(nec_state_t *nec_state);
	77	static void i_dec_bx(nec_state_t *nec_state);
	78	static void i_dec_sp(nec_state_t *nec_state);
	79	static void i_dec_bp(nec_state_t *nec_state);
	80	static void i_dec_si(nec_state_t *nec_state);
	81	static void i_dec_di(nec_state_t *nec_state);
	82	static void i_push_ax(nec_state_t *nec_state);
	83	static void i_push_cx(nec_state_t *nec_state);
	84	static void i_push_dx(nec_state_t *nec_state);
	85	static void i_push_bx(nec_state_t *nec_state);
	86	static void i_push_sp(nec_state_t *nec_state);
	87	static void i_push_bp(nec_state_t *nec_state);
	88	static void i_push_si(nec_state_t *nec_state);
	89	static void i_push_di(nec_state_t *nec_state);
	90	static void i_pop_ax(nec_state_t *nec_state);
	91	static void i_pop_cx(nec_state_t *nec_state);
	92	static void i_pop_dx(nec_state_t *nec_state);
	93	static void i_pop_bx(nec_state_t *nec_state);
	94	static void i_pop_sp(nec_state_t *nec_state);
	95	static void i_pop_bp(nec_state_t *nec_state);
	96	static void i_pop_si(nec_state_t *nec_state);
	97	static void i_pop_di(nec_state_t *nec_state);
	98	static void i_pusha(nec_state_t *nec_state);
	99	static void i_popa(nec_state_t *nec_state);
	100	static void i_chkind(nec_state_t *nec_state);
	101	static void i_brkn(nec_state_t *nec_state);
	102	static void i_repnc(nec_state_t *nec_state);
	103	static void i_repc(nec_state_t *nec_state);
	104	static void i_push_d16(nec_state_t *nec_state);
	105	static void i_imul_d16(nec_state_t *nec_state);
	106	static void i_push_d8(nec_state_t *nec_state);
	107	static void i_imul_d8(nec_state_t *nec_state);
	108	static void i_insb(nec_state_t *nec_state);
	109	static void i_insw(nec_state_t *nec_state);
	110	static void i_outsb(nec_state_t *nec_state);
	111	static void i_outsw(nec_state_t *nec_state);
	112	static void i_jo(nec_state_t *nec_state);
	113	static void i_jno(nec_state_t *nec_state);
	114	static void i_jc(nec_state_t *nec_state);
	115	static void i_jnc(nec_state_t *nec_state);
	116	static void i_jz(nec_state_t *nec_state);
	117	static void i_jnz(nec_state_t *nec_state);
	118	static void i_jce(nec_state_t *nec_state);
	119	static void i_jnce(nec_state_t *nec_state);
	120	static void i_js(nec_state_t *nec_state);
	121	static void i_jns(nec_state_t *nec_state);
	122	static void i_jp(nec_state_t *nec_state);
	123	static void i_jnp(nec_state_t *nec_state);
	124	static void i_jl(nec_state_t *nec_state);
	125	static void i_jnl(nec_state_t *nec_state);
	126	static void i_jle(nec_state_t *nec_state);
	127	static void i_jnle(nec_state_t *nec_state);
	128	static void i_80pre(nec_state_t *nec_state);
	129	static void i_82pre(nec_state_t *nec_state);
	130	static void i_81pre(nec_state_t *nec_state);
	131	static void i_83pre(nec_state_t *nec_state);
	132	static void i_test_br8(nec_state_t *nec_state);
	133	static void i_test_wr16(nec_state_t *nec_state);
	134	static void i_xchg_br8(nec_state_t *nec_state);
	135	static void i_xchg_wr16(nec_state_t *nec_state);
	136	static void i_mov_br8(nec_state_t *nec_state);
	137	static void i_mov_r8b(nec_state_t *nec_state);
	138	static void i_mov_wr16(nec_state_t *nec_state);
	139	static void i_mov_r16w(nec_state_t *nec_state);
	140	static void i_mov_wsreg(nec_state_t *nec_state);
	141	static void i_lea(nec_state_t *nec_state);
	142	static void i_mov_sregw(nec_state_t *nec_state);
	143	static void i_invalid(nec_state_t *nec_state);
	144	static void i_popw(nec_state_t *nec_state);
	145	static void i_nop(nec_state_t *nec_state);
	146	static void i_xchg_axcx(nec_state_t *nec_state);
	147	static void i_xchg_axdx(nec_state_t *nec_state);
	148	static void i_xchg_axbx(nec_state_t *nec_state);
	149	static void i_xchg_axsp(nec_state_t *nec_state);
	150	static void i_xchg_axbp(nec_state_t *nec_state);
	151	static void i_xchg_axsi(nec_state_t *nec_state);
	152	static void i_xchg_axdi(nec_state_t *nec_state);
	153	static void i_cbw(nec_state_t *nec_state);
	154	static void i_cwd(nec_state_t *nec_state);
	155	static void i_call_far(nec_state_t *nec_state);
	156	static void i_pushf(nec_state_t *nec_state);
	157	static void i_popf(nec_state_t *nec_state);
	158	static void i_sahf(nec_state_t *nec_state);
	159	static void i_lahf(nec_state_t *nec_state);
	160	static void i_mov_aldisp(nec_state_t *nec_state);
	161	static void i_mov_axdisp(nec_state_t *nec_state);
	162	static void i_mov_dispal(nec_state_t *nec_state);
	163	static void i_mov_dispax(nec_state_t *nec_state);
	164	static void i_movsb(nec_state_t *nec_state);
	165	static void i_movsw(nec_state_t *nec_state);
	166	static void i_cmpsb(nec_state_t *nec_state);
	167	static void i_cmpsw(nec_state_t *nec_state);
	168	static void i_test_ald8(nec_state_t *nec_state);
	169	static void i_test_axd16(nec_state_t *nec_state);
	170	static void i_stosb(nec_state_t *nec_state);
	171	static void i_stosw(nec_state_t *nec_state);
	172	static void i_lodsb(nec_state_t *nec_state);
	173	static void i_lodsw(nec_state_t *nec_state);
	174	static void i_scasb(nec_state_t *nec_state);
	175	static void i_scasw(nec_state_t *nec_state);
	176	static void i_mov_ald8(nec_state_t *nec_state);
	177	static void i_mov_cld8(nec_state_t *nec_state);
	178	static void i_mov_dld8(nec_state_t *nec_state);
	179	static void i_mov_bld8(nec_state_t *nec_state);
	180	static void i_mov_ahd8(nec_state_t *nec_state);
	181	static void i_mov_chd8(nec_state_t *nec_state);
	182	static void i_mov_dhd8(nec_state_t *nec_state);
	183	static void i_mov_bhd8(nec_state_t *nec_state);
	184	static void i_mov_axd16(nec_state_t *nec_state);
	185	static void i_mov_cxd16(nec_state_t *nec_state);
	186	static void i_mov_dxd16(nec_state_t *nec_state);
	187	static void i_mov_bxd16(nec_state_t *nec_state);
	188	static void i_mov_spd16(nec_state_t *nec_state);
	189	static void i_mov_bpd16(nec_state_t *nec_state);
	190	static void i_mov_sid16(nec_state_t *nec_state);
	191	static void i_mov_did16(nec_state_t *nec_state);
	192	static void i_rotshft_bd8(nec_state_t *nec_state);
	193	static void i_rotshft_wd8(nec_state_t *nec_state);
	194	static void i_ret_d16(nec_state_t *nec_state);
	195	static void i_ret(nec_state_t *nec_state);
	196	static void i_les_dw(nec_state_t *nec_state);
	197	static void i_lds_dw(nec_state_t *nec_state);
	198	static void i_mov_bd8(nec_state_t *nec_state);
	199	static void i_mov_wd16(nec_state_t *nec_state);
	200	static void i_enter(nec_state_t *nec_state);
	201	static void i_leave(nec_state_t *nec_state);
	202	static void i_retf_d16(nec_state_t *nec_state);
	203	static void i_retf(nec_state_t *nec_state);
	204	static void i_int3(nec_state_t *nec_state);
	205	static void i_int(nec_state_t *nec_state);
	206	static void i_into(nec_state_t *nec_state);
	207	static void i_iret(nec_state_t *nec_state);
	208	static void i_rotshft_b(nec_state_t *nec_state);
	209	static void i_rotshft_w(nec_state_t *nec_state);
	210	static void i_rotshft_bcl(nec_state_t *nec_state);
	211	static void i_rotshft_wcl(nec_state_t *nec_state);
	212	static void i_aam(nec_state_t *nec_state);
	213	static void i_aad(nec_state_t *nec_state);
	214	static void i_setalc(nec_state_t *nec_state);
	215	static void i_trans(nec_state_t *nec_state);
	216	static void i_fpo(nec_state_t *nec_state);
	217	static void i_loopne(nec_state_t *nec_state);
	218	static void i_loope(nec_state_t *nec_state);
	219	static void i_loop(nec_state_t *nec_state);
	220	static void i_jcxz(nec_state_t *nec_state);
	221	static void i_inal(nec_state_t *nec_state);
	222	static void i_inax(nec_state_t *nec_state);
	223	static void i_outal(nec_state_t *nec_state);
	224	static void i_outax(nec_state_t *nec_state);
	225	static void i_call_d16(nec_state_t *nec_state);
	226	static void i_jmp_d16(nec_state_t *nec_state);
	227	static void i_jmp_far(nec_state_t *nec_state);
	228	static void i_jmp_d8(nec_state_t *nec_state);
	229	static void i_inaldx(nec_state_t *nec_state);
	230	static void i_inaxdx(nec_state_t *nec_state);
	231	static void i_outdxal(nec_state_t *nec_state);
	232	static void i_outdxax(nec_state_t *nec_state);
	233	static void i_lock(nec_state_t *nec_state);
	234	static void i_brks(nec_state_t *nec_state);
	235	static void i_repne(nec_state_t *nec_state);
	236	static void i_repe(nec_state_t *nec_state);
	237	static void i_hlt(nec_state_t *nec_state);
	238	static void i_cmc(nec_state_t *nec_state);
	239	static void i_f6pre(nec_state_t *nec_state);
	240	static void i_f7pre(nec_state_t *nec_state);
	241	static void i_clc(nec_state_t *nec_state);
	242	static void i_stc(nec_state_t *nec_state);
	243	static void i_di(nec_state_t *nec_state);
	244	static void i_ei(nec_state_t *nec_state);
	245	static void i_cld(nec_state_t *nec_state);
	246	static void i_std(nec_state_t *nec_state);
	247	static void i_fepre(nec_state_t *nec_state);
	248	static void i_ffpre(nec_state_t *nec_state);
	249
	250	static void i_wait(nec_state_t *nec_state);
	251
	252	static void (const nec_instruction[256])(nec_state_t nec_state) =
	253	{
	254	i_add_br8, /* 0x00 */
	255	i_add_wr16, /* 0x01 */
	256	i_add_r8b, /* 0x02 */
	257	i_add_r16w, /* 0x03 */
	258	i_add_ald8, /* 0x04 */
	259	i_add_axd16, /* 0x05 */
	260	i_push_es, /* 0x06 */
	261	i_pop_es, /* 0x07 */
	262	i_or_br8, /* 0x08 */
	263	i_or_wr16, /* 0x09 */
	264	i_or_r8b, /* 0x0a */
	265	i_or_r16w, /* 0x0b */
	266	i_or_ald8, /* 0x0c */
	267	i_or_axd16, /* 0x0d */
	268	i_push_cs, /* 0x0e */
	269	i_pre_v25, /* 0x0f */
	270	i_adc_br8, /* 0x10 */
	271	i_adc_wr16, /* 0x11 */
	272	i_adc_r8b, /* 0x12 */
	273	i_adc_r16w, /* 0x13 */
	274	i_adc_ald8, /* 0x14 */
	275	i_adc_axd16, /* 0x15 */
	276	i_push_ss, /* 0x16 */
	277	i_pop_ss, /* 0x17 */
	278	i_sbb_br8, /* 0x18 */
	279	i_sbb_wr16, /* 0x19 */
	280	i_sbb_r8b, /* 0x1a */
	281	i_sbb_r16w, /* 0x1b */
	282	i_sbb_ald8, /* 0x1c */
	283	i_sbb_axd16, /* 0x1d */
	284	i_push_ds, /* 0x1e */
	285	i_pop_ds, /* 0x1f */
	286	i_and_br8, /* 0x20 */
	287	i_and_wr16, /* 0x21 */
	288	i_and_r8b, /* 0x22 */
	289	i_and_r16w, /* 0x23 */
	290	i_and_ald8, /* 0x24 */
	291	i_and_axd16, /* 0x25 */
	292	i_es, /* 0x26 */
	293	i_daa, /* 0x27 */
	294	i_sub_br8, /* 0x28 */
	295	i_sub_wr16, /* 0x29 */
	296	i_sub_r8b, /* 0x2a */
	297	i_sub_r16w, /* 0x2b */
	298	i_sub_ald8, /* 0x2c */
	299	i_sub_axd16, /* 0x2d */
	300	i_cs, /* 0x2e */
	301	i_das, /* 0x2f */
	302	i_xor_br8, /* 0x30 */
	303	i_xor_wr16, /* 0x31 */
	304	i_xor_r8b, /* 0x32 */
	305	i_xor_r16w, /* 0x33 */
	306	i_xor_ald8, /* 0x34 */
	307	i_xor_axd16, /* 0x35 */
	308	i_ss, /* 0x36 */
	309	i_aaa, /* 0x37 */
	310	i_cmp_br8, /* 0x38 */
	311	i_cmp_wr16, /* 0x39 */
	312	i_cmp_r8b, /* 0x3a */
	313	i_cmp_r16w, /* 0x3b */
	314	i_cmp_ald8, /* 0x3c */
	315	i_cmp_axd16, /* 0x3d */
	316	i_ds, /* 0x3e */
	317	i_aas, /* 0x3f */
	318	i_inc_ax, /* 0x40 */
	319	i_inc_cx, /* 0x41 */
	320	i_inc_dx, /* 0x42 */
	321	i_inc_bx, /* 0x43 */
	322	i_inc_sp, /* 0x44 */
	323	i_inc_bp, /* 0x45 */
	324	i_inc_si, /* 0x46 */
	325	i_inc_di, /* 0x47 */
	326	i_dec_ax, /* 0x48 */
	327	i_dec_cx, /* 0x49 */
	328	i_dec_dx, /* 0x4a */
	329	i_dec_bx, /* 0x4b */
	330	i_dec_sp, /* 0x4c */
	331	i_dec_bp, /* 0x4d */
	332	i_dec_si, /* 0x4e */
	333	i_dec_di, /* 0x4f */
	334	i_push_ax, /* 0x50 */
	335	i_push_cx, /* 0x51 */
	336	i_push_dx, /* 0x52 */
	337	i_push_bx, /* 0x53 */
	338	i_push_sp, /* 0x54 */
	339	i_push_bp, /* 0x55 */
	340	i_push_si, /* 0x56 */
	341	i_push_di, /* 0x57 */
	342	i_pop_ax, /* 0x58 */
	343	i_pop_cx, /* 0x59 */
	344	i_pop_dx, /* 0x5a */
	345	i_pop_bx, /* 0x5b */
	346	i_pop_sp, /* 0x5c */
	347	i_pop_bp, /* 0x5d */
	348	i_pop_si, /* 0x5e */
	349	i_pop_di, /* 0x5f */
	350	i_pusha, /* 0x60 */
	351	i_popa, /* 0x61 */
	352	i_chkind, /* 0x62 */
	353	i_brkn, /* 0x63 - V25S/V35S only */
	354	i_repnc, /* 0x64 */
	355	i_repc, /* 0x65 */
	356	i_invalid, /* 0x66 */
	357	i_invalid, /* 0x67 */
	358	i_push_d16, /* 0x68 */
	359	i_imul_d16, /* 0x69 */
	360	i_push_d8, /* 0x6a */
	361	i_imul_d8, /* 0x6b */
	362	i_insb, /* 0x6c */
	363	i_insw, /* 0x6d */
	364	i_outsb, /* 0x6e */
	365	i_outsw, /* 0x6f */
	366	i_jo, /* 0x70 */
	367	i_jno, /* 0x71 */
	368	i_jc, /* 0x72 */
	369	i_jnc, /* 0x73 */
	370	i_jz, /* 0x74 */
	371	i_jnz, /* 0x75 */
	372	i_jce, /* 0x76 */
	373	i_jnce, /* 0x77 */
	374	i_js, /* 0x78 */
	375	i_jns, /* 0x79 */
	376	i_jp, /* 0x7a */
	377	i_jnp, /* 0x7b */
	378	i_jl, /* 0x7c */
	379	i_jnl, /* 0x7d */
	380	i_jle, /* 0x7e */
	381	i_jnle, /* 0x7f */
	382	i_80pre, /* 0x80 */
	383	i_81pre, /* 0x81 */
	384	i_82pre, /* 0x82 */
	385	i_83pre, /* 0x83 */
	386	i_test_br8, /* 0x84 */
	387	i_test_wr16, /* 0x85 */
	388	i_xchg_br8, /* 0x86 */
	389	i_xchg_wr16, /* 0x87 */
	390	i_mov_br8, /* 0x88 */
	391	i_mov_wr16, /* 0x89 */
	392	i_mov_r8b, /* 0x8a */
	393	i_mov_r16w, /* 0x8b */
	394	i_mov_wsreg, /* 0x8c */
	395	i_lea, /* 0x8d */
	396	i_mov_sregw, /* 0x8e */
	397	i_popw, /* 0x8f */
	398	i_nop, /* 0x90 */
	399	i_xchg_axcx, /* 0x91 */
	400	i_xchg_axdx, /* 0x92 */
	401	i_xchg_axbx, /* 0x93 */
	402	i_xchg_axsp, /* 0x94 */
	403	i_xchg_axbp, /* 0x95 */
	404	i_xchg_axsi, /* 0x96 */
	405	i_xchg_axdi, /* 0x97 */
	406	i_cbw, /* 0x98 */
	407	i_cwd, /* 0x99 */
	408	i_call_far, /* 0x9a */
	409	i_wait, /* 0x9b */
	410	i_pushf, /* 0x9c */
	411	i_popf, /* 0x9d */
	412	i_sahf, /* 0x9e */
	413	i_lahf, /* 0x9f */
	414	i_mov_aldisp, /* 0xa0 */
	415	i_mov_axdisp, /* 0xa1 */
	416	i_mov_dispal, /* 0xa2 */
	417	i_mov_dispax, /* 0xa3 */
	418	i_movsb, /* 0xa4 */
	419	i_movsw, /* 0xa5 */
	420	i_cmpsb, /* 0xa6 */
	421	i_cmpsw, /* 0xa7 */
	422	i_test_ald8, /* 0xa8 */
	423	i_test_axd16, /* 0xa9 */
	424	i_stosb, /* 0xaa */
	425	i_stosw, /* 0xab */
	426	i_lodsb, /* 0xac */
	427	i_lodsw, /* 0xad */
	428	i_scasb, /* 0xae */
	429	i_scasw, /* 0xaf */
	430	i_mov_ald8, /* 0xb0 */
	431	i_mov_cld8, /* 0xb1 */
	432	i_mov_dld8, /* 0xb2 */
	433	i_mov_bld8, /* 0xb3 */
	434	i_mov_ahd8, /* 0xb4 */
	435	i_mov_chd8, /* 0xb5 */
	436	i_mov_dhd8, /* 0xb6 */
	437	i_mov_bhd8, /* 0xb7 */
	438	i_mov_axd16, /* 0xb8 */
	439	i_mov_cxd16, /* 0xb9 */
	440	i_mov_dxd16, /* 0xba */
	441	i_mov_bxd16, /* 0xbb */
	442	i_mov_spd16, /* 0xbc */
	443	i_mov_bpd16, /* 0xbd */
	444	i_mov_sid16, /* 0xbe */
	445	i_mov_did16, /* 0xbf */
	446	i_rotshft_bd8, /* 0xc0 */
	447	i_rotshft_wd8, /* 0xc1 */
	448	i_ret_d16, /* 0xc2 */
	449	i_ret, /* 0xc3 */
	450	i_les_dw, /* 0xc4 */
	451	i_lds_dw, /* 0xc5 */
	452	i_mov_bd8, /* 0xc6 */
	453	i_mov_wd16, /* 0xc7 */
	454	i_enter, /* 0xc8 */
	455	i_leave, /* 0xc9 */
	456	i_retf_d16, /* 0xca */
	457	i_retf, /* 0xcb */
	458	i_int3, /* 0xcc */
	459	i_int, /* 0xcd */
	460	i_into, /* 0xce */
	461	i_iret, /* 0xcf */
	462	i_rotshft_b, /* 0xd0 */
	463	i_rotshft_w, /* 0xd1 */
	464	i_rotshft_bcl, /* 0xd2 */
	465	i_rotshft_wcl, /* 0xd3 */
	466	i_aam, /* 0xd4 */
	467	i_aad, /* 0xd5 */
	468	i_setalc, /* 0xd6 */
	469	i_trans, /* 0xd7 */
	470	i_fpo, /* 0xd8 */
	471	i_fpo, /* 0xd9 */
	472	i_fpo, /* 0xda */
	473	i_fpo, /* 0xdb */
	474	i_fpo, /* 0xdc */
	475	i_fpo, /* 0xdd */
	476	i_fpo, /* 0xde */
	477	i_fpo, /* 0xdf */
	478	i_loopne, /* 0xe0 */
	479	i_loope, /* 0xe1 */
	480	i_loop, /* 0xe2 */
	481	i_jcxz, /* 0xe3 */
	482	i_inal, /* 0xe4 */
	483	i_inax, /* 0xe5 */
	484	i_outal, /* 0xe6 */
	485	i_outax, /* 0xe7 */
	486	i_call_d16, /* 0xe8 */
	487	i_jmp_d16, /* 0xe9 */
	488	i_jmp_far, /* 0xea */
	489	i_jmp_d8, /* 0xeb */
	490	i_inaldx, /* 0xec */
	491	i_inaxdx, /* 0xed */
	492	i_outdxal, /* 0xee */
	493	i_outdxax, /* 0xef */
	494	i_lock, /* 0xf0 */
	495	i_brks, /* 0xf1 */
	496	i_repne, /* 0xf2 */
	497	i_repe, /* 0xf3 */
	498	i_hlt, /* 0xf4 */
	499	i_cmc, /* 0xf5 */
	500	i_f6pre, /* 0xf6 */
	501	i_f7pre, /* 0xf7 */
	502	i_clc, /* 0xf8 */
	503	i_stc, /* 0xf9 */
	504	i_di, /* 0xfa */
	505	i_ei, /* 0xfb */
	506	i_cld, /* 0xfc */
	507	i_std, /* 0xfd */
	508	i_fepre, /* 0xfe */
	509	i_ffpre /* 0xff */
	510	};

src/emu/cpu/nec/v25priv.h
r0	r9813
	1	#define NEC_NMI_INT_VECTOR 2
	2
	3	/* Cpu types, steps of 8 to help the cycle count calculation */
	4	#define V33_TYPE 0
	5	#define V30_TYPE 8
	6	#define V20_TYPE 16
	7
	8	#ifndef FALSE
	9	#define FALSE 0
	10	#define TRUE 1
	11	#endif
	12
	13	/* internal RAM and register banks */
	14	typedef union
	15	{
	16	UINT16 w[128];
	17	UINT8 b[256];
	18	} internalram;
	19
	20	typedef struct _v25_state_t v25_state_t;
	21	struct _v25_state_t
	22	{
	23	internalram ram;
	24	offs_t fetch_xor;
	25
	26	UINT16 ip;
	27
	28	INT32 SignVal;
	29	UINT32 AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
	30	UINT8 IBRK, F0, F1, TF, IF, DF, MF; /* 0 or 1 valued flags */
	31	UINT8 RB; /* current register bank */
	32	UINT32 int_vector;
	33	UINT32 pending_irq;
	34	UINT32 nmi_state;
	35	UINT32 irq_state;
	36	UINT32 poll_state;
	37	UINT32 mode_state;
	38	UINT8 no_interrupt;
	39
	40	/* special function registers */
	41	UINT8 PRC, IDB;
	42
	43	device_irq_callback irq_callback;
	44	legacy_cpu_device *device;
	45	address_space *program;
	46	direct_read_data *direct;
	47	address_space *io;
	48	int icount;
	49
	50	const nec_config *config;
	51
	52	UINT8 prefetch_size;
	53	UINT8 prefetch_cycles;
	54	INT8 prefetch_count;
	55	UINT8 prefetch_reset;
	56	UINT32 chip_type;
	57
	58	UINT32 prefix_base; /* base address of the latest prefix segment */
	59	UINT8 seg_prefix; /* prefix segment indicator */
	60	};
	61
	62	typedef enum {
	63	DS1 = 0x0E/2,
	64	PS = 0x0C/2,
	65	SS = 0x0A/2,
	66	DS0 = 0x08/2,
	67	} SREGS;
	68
	69	typedef enum {
	70	AW = 0x1E/2,
	71	CW = 0x1C/2,
	72	DW = 0x1A/2,
	73	BW = 0x18/2,
	74	SP = 0x16/2,
	75	BP = 0x14/2,
	76	IX = 0x12/2,
	77	IY = 0x10/2,
	78	} WREGS;
	79
	80	typedef enum {
	81	AL = NATIVE_ENDIAN_VALUE_LE_BE(0x1E, 0x1F),
	82	AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1F, 0x1E),
	83	CL = NATIVE_ENDIAN_VALUE_LE_BE(0x1C, 0x1D),
	84	CH = NATIVE_ENDIAN_VALUE_LE_BE(0x1D, 0x1C),
	85	DL = NATIVE_ENDIAN_VALUE_LE_BE(0x1A, 0x1B),
	86	DH = NATIVE_ENDIAN_VALUE_LE_BE(0x1B, 0x1A),
	87	BL = NATIVE_ENDIAN_VALUE_LE_BE(0x18, 0x19),
	88	BH = NATIVE_ENDIAN_VALUE_LE_BE(0x19, 0x18),
	89	} BREGS;
	90
	91	#define Sreg(x) nec_state->ram.w[(nec_state->RB << 4) + (x)]
	92	#define Wreg(x) nec_state->ram.w[(nec_state->RB << 4) + (x)]
	93	#define Breg(x) nec_state->ram.b[(nec_state->RB << 5) + (x)]
	94
	95	#define PC(n) ((Sreg(PS)<<4)+(n)->ip)
	96
	97	/* parameter x = result, y = source 1, z = source 2 */
	98
	99	#define SetTF(x) (nec_state->TF = (x))
	100	#define SetIF(x) (nec_state->IF = (x))
	101	#define SetDF(x) (nec_state->DF = (x))
	102	#define SetMD(x) (nec_state->MF = (x)) /* OB [19.07.99] Mode Flag V30 */
	103
	104	#define SetCFB(x) (nec_state->CarryVal = (x) & 0x100)
	105	#define SetCFW(x) (nec_state->CarryVal = (x) & 0x10000)
	106	#define SetAF(x,y,z) (nec_state->AuxVal = ((x) ^ ((y) ^ (z))) & 0x10)
	107	#define SetSF(x) (nec_state->SignVal = (x))
	108	#define SetZF(x) (nec_state->ZeroVal = (x))
	109	#define SetPF(x) (nec_state->ParityVal = (x))
	110
	111	#define SetSZPF_Byte(x) (nec_state->SignVal=nec_state->ZeroVal=nec_state->ParityVal=(INT8)(x))
	112	#define SetSZPF_Word(x) (nec_state->SignVal=nec_state->ZeroVal=nec_state->ParityVal=(INT16)(x))
	113
	114	#define SetOFW_Add(x,y,z) (nec_state->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
	115	#define SetOFB_Add(x,y,z) (nec_state->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
	116	#define SetOFW_Sub(x,y,z) (nec_state->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
	117	#define SetOFB_Sub(x,y,z) (nec_state->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
	118
	119	#define ADDB { UINT32 res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
	120	#define ADDW { UINT32 res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
	121
	122	#define SUBB { UINT32 res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
	123	#define SUBW { UINT32 res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
	124
	125	#define ORB dst\|=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Byte(dst)
	126	#define ORW dst\|=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Word(dst)
	127
	128	#define ANDB dst&=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Byte(dst)
	129	#define ANDW dst&=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Word(dst)
	130
	131	#define XORB dst^=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Byte(dst)
	132	#define XORW dst^=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Word(dst)
	133
	134	#define CF (nec_state->CarryVal!=0)
	135	#define SF (nec_state->SignVal<0)
	136	#define ZF (nec_state->ZeroVal==0)
	137	#define PF parity_table[(BYTE)nec_state->ParityVal]
	138	#define AF (nec_state->AuxVal!=0)
	139	#define OF (nec_state->OverVal!=0)
	140
	141	/************************************************************************/
	142
	143	int v25_read_byte(v25_state_t *nec_state, unsigned a);
	144	int v25_read_word(v25_state_t *nec_state, unsigned a);
	145	void v25_write_byte(v25_state_t *nec_state, unsigned a, unsigned d);
	146	void v25_write_word(v25_state_t *nec_state, unsigned a, unsigned d);
	147
	148	#define read_mem_byte(a) v25_read_byte(nec_state,(a))
	149	#define read_mem_word(a) v25_read_word(nec_state,(a))
	150	#define write_mem_byte(a,d) v25_write_byte(nec_state,(a),(d))
	151	#define write_mem_word(a,d) v25_write_word(nec_state,(a),(d))
	152
	153	#define read_port_byte(a) nec_state->io->read_byte(a)
	154	#define read_port_word(a) nec_state->io->read_word_unaligned(a)
	155	#define write_port_byte(a,d) nec_state->io->write_byte((a),(d))
	156	#define write_port_word(a,d) nec_state->io->write_word_unaligned((a),(d))
	157
	158	/************************************************************************/
	159
	160	#define CHANGE_PC do { EMPTY_PREFETCH(); } while (0)
	161
	162	#define SegBase(Seg) (Sreg(Seg) << 4)
	163
	164	#define DefaultBase(Seg) ((nec_state->seg_prefix && (Seg==DS0 \|\| Seg==SS)) ? nec_state->prefix_base : Sreg(Seg) << 4)
	165
	166	#define GetMemB(Seg,Off) (read_mem_byte(DefaultBase(Seg) + (Off)))
	167	#define GetMemW(Seg,Off) (read_mem_word(DefaultBase(Seg) + (Off)))
	168
	169	#define PutMemB(Seg,Off,x) { write_mem_byte(DefaultBase(Seg) + (Off), (x)); }
	170	#define PutMemW(Seg,Off,x) { write_mem_word(DefaultBase(Seg) + (Off), (x)); }
	171
	172	/* prefetch timing */
	173
	174	#define FETCH() fetch(nec_state)
	175	#define FETCH_XOR(a) ((a) ^ nec_state->fetch_xor)
	176	#define FETCHWORD() fetchword(nec_state)
	177	#define EMPTY_PREFETCH() nec_state->prefetch_reset = 1
	178
	179
	180	#define PUSH(val) { Wreg(SP)-=2; write_mem_word((((Sreg(SS)<<4)+Wreg(SP))),val); }
	181	#define POP(var) { var = read_mem_word((((Sreg(SS)<<4)+Wreg(SP)))); Wreg(SP)+=2; }
	182
	183	#define GetModRM UINT32 ModRM=FETCH()
	184
	185	/* Cycle count macros:
	186	CLK - cycle count is the same on all processors
	187	CLKS - cycle count differs between processors, list all counts
	188	CLKW - cycle count for word read/write differs for odd/even source/destination address
	189	CLKM - cycle count for reg/mem instructions
	190	CLKR - cycle count for reg/mem instructions with different counts for odd/even addresses
	191
	192
	193	Prefetch & buswait time is not emulated.
	194	Extra cycles for PUSH'ing or POP'ing registers to odd addresses is not emulated.
	195	*/
	196
	197	#define CLK(all) nec_state->icount-=all
	198	#define CLKS(v20,v30,v33) { const UINT32 ccount=(v20<<16)\|(v30<<8)\|v33; nec_state->icount-=(ccount>>nec_state->chip_type)&0x7f; }
	199	#define CLKW(v20o,v30o,v33o,v20e,v30e,v33e,addr) { const UINT32 ocount=(v20o<<16)\|(v30o<<8)\|v33o, ecount=(v20e<<16)\|(v30e<<8)\|v33e; nec_state->icount-=(addr&1)?((ocount>>nec_state->chip_type)&0x7f):((ecount>>nec_state->chip_type)&0x7f); }
	200	#define CLKM(v20,v30,v33,v20m,v30m,v33m) { const UINT32 ccount=(v20<<16)\|(v30<<8)\|v33, mcount=(v20m<<16)\|(v30m<<8)\|v33m; nec_state->icount-=( ModRM >=0xc0 )?((ccount>>nec_state->chip_type)&0x7f):((mcount>>nec_state->chip_type)&0x7f); }
	201	#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall,addr) { const UINT32 ocount=(v20o<<16)\|(v30o<<8)\|v33o, ecount=(v20e<<16)\|(v30e<<8)\|v33e; if (ModRM >=0xc0) nec_state->icount-=vall; else nec_state->icount-=(addr&1)?((ocount>>nec_state->chip_type)&0x7f):((ecount>>nec_state->chip_type)&0x7f); }
	202
	203	/************************************************************************/
	204	#define CompressFlags() (WORD)(CF \| (nec_state->IBRK << 1) \| (PF << 2) \| (nec_state->F0 << 3) \| (AF << 4) \
	205	\| (nec_state->F1 << 5) \| (ZF << 6) \| (SF << 7) \| (nec_state->TF << 8) \| (nec_state->IF << 9) \
	206	\| (nec_state->DF << 10) \| (OF << 11) \| (nec_state->RB << 12) \| (nec_state->MF << 15))
	207
	208	#define ExpandFlags(f) \
	209	{ \
	210	nec_state->CarryVal = (f) & 0x0001; \
	211	nec_state->IBRK = ((f) & 0x0002) == 0x0002; \
	212	nec_state->ParityVal = !((f) & 0x0004); \
	213	nec_state->F0 = ((f) & 0x0008) == 0x0008; \
	214	nec_state->AuxVal = (f) & 0x0010; \
	215	nec_state->F1 = ((f) & 0x0020) == 0x0020; \
	216	nec_state->ZeroVal = !((f) & 0x0040); \
	217	nec_state->SignVal = (f) & 0x0080 ? -1 : 0; \
	218	nec_state->TF = ((f) & 0x0100) == 0x0100; \
	219	nec_state->IF = ((f) & 0x0200) == 0x0200; \
	220	nec_state->DF = ((f) & 0x0400) == 0x0400; \
	221	nec_state->OverVal = (f) & 0x0800; \
	222	/* RB only changes on interrupts, so skip it */ \
	223	nec_state->MF = ((f) & 0x8000) == 0x8000; \
	224	}
	225
	226	#define IncWordReg(Reg) \
	227	unsigned tmp = (unsigned)Wreg(Reg); \
	228	unsigned tmp1 = tmp+1; \
	229	nec_state->OverVal = (tmp == 0x7fff); \
	230	SetAF(tmp1,tmp,1); \
	231	SetSZPF_Word(tmp1); \
	232	Wreg(Reg)=tmp1
	233
	234	#define DecWordReg(Reg) \
	235	unsigned tmp = (unsigned)Wreg(Reg); \
	236	unsigned tmp1 = tmp-1; \
	237	nec_state->OverVal = (tmp == 0x8000); \
	238	SetAF(tmp1,tmp,1); \
	239	SetSZPF_Word(tmp1); \
	240	Wreg(Reg)=tmp1
	241
	242	#define JMP(flag) \
	243	int tmp; \
	244	EMPTY_PREFETCH(); \
	245	tmp = (int)((INT8)FETCH()); \
	246	if (flag) \
	247	{ \
	248	static const UINT8 table[3]={3,10,10}; \
	249	nec_state->ip = (WORD)(nec_state->ip+tmp); \
	250	nec_state->icount-=table[nec_state->chip_type/8]; \
	251	CHANGE_PC; \
	252	return; \
	253	}
	254
	255	#define ADJ4(param1,param2) \
	256	if (AF \|\| ((Breg(AL) & 0xf) > 9)) \
	257	{ \
	258	UINT16 tmp; \
	259	tmp = Breg(AL) + param1; \
	260	Breg(AL) = tmp; \
	261	nec_state->AuxVal = 1; \
	262	nec_state->CarryVal \|= tmp & 0x100; \
	263	} \
	264	if (CF \|\| (Breg(AL)>0x9f)) \
	265	{ \
	266	Breg(AL) += param2; \
	267	nec_state->CarryVal = 1; \
	268	} \
	269	SetSZPF_Byte(Breg(AL))
	270
	271	#define ADJB(param1,param2) \
	272	if (AF \|\| ((Breg(AL) & 0xf) > 9)) \
	273	{ \
	274	Breg(AL) += param1; \
	275	Breg(AH) += param2; \
	276	nec_state->AuxVal = 1; \
	277	nec_state->CarryVal = 1; \
	278	} \
	279	else \
	280	{ \
	281	nec_state->AuxVal = 0; \
	282	nec_state->CarryVal = 0; \
	283	} \
	284	Breg(AL) &= 0x0F
	285
	286	#define BITOP_BYTE \
	287	ModRM = FETCH(); \
	288	if (ModRM >= 0xc0) { \
	289	tmp=Breg(Mod_RM.RM.b[ModRM]); \
	290	} \
	291	else { \
	292	(*GetEA[ModRM])(nec_state); \
	293	tmp=read_mem_byte(EA); \
	294	}
	295
	296	#define BITOP_WORD \
	297	ModRM = FETCH(); \
	298	if (ModRM >= 0xc0) { \
	299	tmp=Wreg(Mod_RM.RM.w[ModRM]); \
	300	} \
	301	else { \
	302	(*GetEA[ModRM])(nec_state); \
	303	tmp=read_mem_word(EA); \
	304	}
	305
	306	#define BIT_NOT \
	307	if (tmp & (1<<tmp2)) \
	308	tmp &= ~(1<<tmp2); \
	309	else \
	310	tmp \|= (1<<tmp2)
	311
	312	#define XchgAWReg(Reg) \
	313	WORD tmp; \
	314	tmp = Wreg(Reg); \
	315	Wreg(Reg) = Wreg(AW); \
	316	Wreg(AW) = tmp
	317
	318	#define ROL_BYTE nec_state->CarryVal = dst & 0x80; dst = (dst << 1)+CF
	319	#define ROL_WORD nec_state->CarryVal = dst & 0x8000; dst = (dst << 1)+CF
	320	#define ROR_BYTE nec_state->CarryVal = dst & 0x1; dst = (dst >> 1)+(CF<<7)
	321	#define ROR_WORD nec_state->CarryVal = dst & 0x1; dst = (dst >> 1)+(CF<<15)
	322	#define ROLC_BYTE dst = (dst << 1) + CF; SetCFB(dst)
	323	#define ROLC_WORD dst = (dst << 1) + CF; SetCFW(dst)
	324	#define RORC_BYTE dst = (CF<<8)+dst; nec_state->CarryVal = dst & 0x01; dst >>= 1
	325	#define RORC_WORD dst = (CF<<16)+dst; nec_state->CarryVal = dst & 0x01; dst >>= 1
	326	#define SHL_BYTE(c) nec_state->icount-=c; dst <<= c; SetCFB(dst); SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
	327	#define SHL_WORD(c) nec_state->icount-=c; dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
	328	#define SHR_BYTE(c) nec_state->icount-=c; dst >>= c-1; nec_state->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
	329	#define SHR_WORD(c) nec_state->icount-=c; dst >>= c-1; nec_state->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
	330	#define SHRA_BYTE(c) nec_state->icount-=c; dst = ((INT8)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT8)((BYTE)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
	331	#define SHRA_WORD(c) nec_state->icount-=c; dst = ((INT16)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT16)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
	332
	333	#define DIVUB \
	334	uresult = Wreg(AW); \
	335	uresult2 = uresult % tmp; \
	336	if ((uresult /= tmp) > 0xff) { \
	337	nec_interrupt(nec_state, 0,0); break; \
	338	} else { \
	339	Breg(AL) = uresult; \
	340	Breg(AH) = uresult2; \
	341	}
	342
	343	#define DIVB \
	344	result = (INT16)Wreg(AW); \
	345	result2 = result % (INT16)((INT8)tmp); \
	346	if ((result /= (INT16)((INT8)tmp)) > 0xff) { \
	347	nec_interrupt(nec_state, 0,0); break; \
	348	} else { \
	349	Breg(AL) = result; \
	350	Breg(AH) = result2; \
	351	}
	352
	353	#define DIVUW \
	354	uresult = (((UINT32)Wreg(DW)) << 16) \| Wreg(AW);\
	355	uresult2 = uresult % tmp; \
	356	if ((uresult /= tmp) > 0xffff) { \
	357	nec_interrupt(nec_state, 0,0); break; \
	358	} else { \
	359	Wreg(AW)=uresult; \
	360	Wreg(DW)=uresult2; \
	361	}
	362
	363	#define DIVW \
	364	result = ((UINT32)Wreg(DW) << 16) + Wreg(AW); \
	365	result2 = result % (INT32)((INT16)tmp); \
	366	if ((result /= (INT32)((INT16)tmp)) > 0xffff) { \
	367	nec_interrupt(nec_state, 0,0); break; \
	368	} else { \
	369	Wreg(AW)=result; \
	370	Wreg(DW)=result2; \
	371	}
	372
	373	#define ADD4S { \
	374	int i,v1,v2,result; \
	375	int count = (Breg(CL)+1)/2; \
	376	unsigned di = Wreg(IY); \
	377	unsigned si = Wreg(IX); \
	378	static const UINT8 table[3]={18,19,19}; \
	379	if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for add4s\n",PC(nec_state)); \
	380	nec_state->ZeroVal = nec_state->CarryVal = 0; \
	381	for (i=0;i<count;i++) { \
	382	nec_state->icount-=table[nec_state->chip_type/8]; \
	383	tmp = GetMemB(DS0, si); \
	384	tmp2 = GetMemB(DS1, di); \
	385	v1 = (tmp>>4)*10 + (tmp&0xf); \
	386	v2 = (tmp2>>4)*10 + (tmp2&0xf); \
	387	result = v1+v2+nec_state->CarryVal; \
	388	nec_state->CarryVal = result > 99 ? 1 : 0; \
	389	result = result % 100; \
	390	v1 = ((result/10)<<4) \| (result % 10); \
	391	PutMemB(DS1, di,v1); \
	392	if (v1) nec_state->ZeroVal = 1; \
	393	si++; \
	394	di++; \
	395	} \
	396	}
	397
	398	#define SUB4S { \
	399	int count = (Breg(CL)+1)/2; \
	400	int i,v1,v2,result; \
	401	unsigned di = Wreg(IY); \
	402	unsigned si = Wreg(IX); \
	403	static const UINT8 table[3]={18,19,19}; \
	404	if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for sub4s\n",PC(nec_state)); \
	405	nec_state->ZeroVal = nec_state->CarryVal = 0; \
	406	for (i=0;i<count;i++) { \
	407	nec_state->icount-=table[nec_state->chip_type/8]; \
	408	tmp = GetMemB(DS1, di); \
	409	tmp2 = GetMemB(DS0, si); \
	410	v1 = (tmp>>4)*10 + (tmp&0xf); \
	411	v2 = (tmp2>>4)*10 + (tmp2&0xf); \
	412	if (v1 < (v2+nec_state->CarryVal)) { \
	413	v1+=100; \
	414	result = v1-(v2+nec_state->CarryVal); \
	415	nec_state->CarryVal = 1; \
	416	} else { \
	417	result = v1-(v2+nec_state->CarryVal); \
	418	nec_state->CarryVal = 0; \
	419	} \
	420	v1 = ((result/10)<<4) \| (result % 10); \
	421	PutMemB(DS1, di,v1); \
	422	if (v1) nec_state->ZeroVal = 1; \
	423	si++; \
	424	di++; \
	425	} \
	426	}
	427
	428	#define CMP4S { \
	429	int count = (Breg(CL)+1)/2; \
	430	int i,v1,v2,result; \
	431	unsigned di = Wreg(IY); \
	432	unsigned si = Wreg(IX); \
	433	static const UINT8 table[3]={14,19,19}; \
	434	if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for cmp4s\n",PC(nec_state)); \
	435	nec_state->ZeroVal = nec_state->CarryVal = 0; \
	436	for (i=0;i<count;i++) { \
	437	nec_state->icount-=table[nec_state->chip_type/8]; \
	438	tmp = GetMemB(DS1, di); \
	439	tmp2 = GetMemB(DS0, si); \
	440	v1 = (tmp>>4)*10 + (tmp&0xf); \
	441	v2 = (tmp2>>4)*10 + (tmp2&0xf); \
	442	if (v1 < (v2+nec_state->CarryVal)) { \
	443	v1+=100; \
	444	result = v1-(v2+nec_state->CarryVal); \
	445	nec_state->CarryVal = 1; \
	446	} else { \
	447	result = v1-(v2+nec_state->CarryVal); \
	448	nec_state->CarryVal = 0; \
	449	} \
	450	v1 = ((result/10)<<4) \| (result % 10); \
	451	if (v1) nec_state->ZeroVal = 1; \
	452	si++; \
	453	di++; \
	454	} \
	455	}

src/emu/cpu/nec/nec.c
r9812	r9813
111	111	typedef UINT16 WORD;
112	112	typedef UINT32 DWORD;
113	113
114		#include "necpriv.h"
115	114	#include "nec.h"
	115	#include "necpriv.h"
116	116
117		#define PC(n) ((~~(n)->s~~regs[PS]<<4)+(n)->ip)
	117	#define PC(n) ((Sreg(PS)<<4)+(n)->ip)
118	118
119		/* default configuration */
120		static const nec_config default_config =
121		{
122		NULL
123		};
124
125	119	extern int necv_dasm_one(char buffer, UINT32 eip, const UINT8 oprom, const nec_config *config);
126	120
127		/* NEC registers */
128		typedef union
129		{ /* eight general registers */
130		UINT16 w[8]; /* viewed as 16 bits registers */
131		UINT8 b[16]; /* or as 8 bit registers */
132		} necbasicregs;
133
134		typedef struct _nec_state_t nec_state_t;
135		struct _nec_state_t
136		{
137		necbasicregs regs;
138		offs_t fetch_xor;
139		UINT16 sregs[4];
140
141		UINT16 ip;
142
143		INT32 SignVal;
144		UINT32 AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
145		UINT8 TF, IF, DF, MF; /* 0 or 1 valued flags / / OB[19.07.99] added Mode Flag V30 */
146		UINT32 int_vector;
147		UINT32 pending_irq;
148		UINT32 nmi_state;
149		UINT32 irq_state;
150		UINT32 poll_state;
151		UINT8 no_interrupt;
152
153		device_irq_callback irq_callback;
154		legacy_cpu_device *device;
155		address_space *program;
156		direct_read_data *direct;
157		address_space *io;
158		int icount;
159
160		const nec_config *config;
161
162		UINT8 prefetch_size;
163		UINT8 prefetch_cycles;
164		INT8 prefetch_count;
165		UINT8 prefetch_reset;
166		UINT32 chip_type;
167
168		UINT32 prefix_base; /* base address of the latest prefix segment */
169		UINT8 seg_prefix; /* prefix segment indicator */
170
171		};
172
173	121	INLINE nec_state_t get_safe_token(running_device device)
174	122	{
175	123	assert(device != NULL);
176	124	assert(device->type() == V20 \|\|
177		device->type() == V25 \|\|
178	125	device->type() == V30 \|\|
179		device->type() == V33 \|\|
180		device->type() == V35);
	126	device->type() == V33);
181	127	return (nec_state_t )downcast<legacy_cpu_device >(device)->token();
182	128	}
183	129
r9812	r9813
199	145	/* The implementation is not accurate, but comes close.
200	146	* It does not respect that the V30 will fetch two bytes
201	147	* at once directly, but instead uses only 2 cycles instead
202		* of 4. There are however only very few sources publicy
	148	* of 4. There are however only very few sources publicly
203	149	* available and they are vague.
204	150	*/
205	151	while (nec_state->prefetch_count<0)
r9812	r9813
229	175	INLINE UINT8 fetch(nec_state_t *nec_state)
230	176	{
231	177	prefetch(nec_state);
232		return nec_state->direct->read_raw_byte(FETCH_XOR((~~nec_state->s~~regs[PS]<<4)+nec_state->ip++));
	178	return nec_state->direct->read_raw_byte(FETCH_XOR((Sreg(PS)<<4)+nec_state->ip++));
233	179	}
234	180
235	181	INLINE UINT16 fetchword(nec_state_t *nec_state)
r9812	r9813
245	191
246	192	static UINT8 parity_table[256];
247	193
248		#include "emu.h"
249
250	194	static UINT8 fetchop(nec_state_t *nec_state)
251	195	{
252		UINT8 ret;
253
254	196	prefetch(nec_state);
255		ret = nec_state->direct->read_decrypted_byte(FETCH_XOR( ( nec_state->sregs[PS]<<4)+nec_state->ip++));
256
257		if (nec_state->MF == 1)
258		if (nec_state->config->v25v35_decryptiontable)
259		{
260		ret = nec_state->config->v25v35_decryptiontable[ret];
261		}
262		return ret;
	197	return nec_state->direct->read_decrypted_byte(FETCH_XOR( ( Sreg(PS)<<4)+nec_state->ip++));
263	198	}
264	199
265	200
r9812	r9813
279	214	nec_state->TF = 0;
280	215	nec_state->IF = 0;
281	216	nec_state->DF = 0;
282		nec_state->MF = 0;
	217	nec_state->MF = 1;
283	218	nec_state->SignVal = 0;
284	219	nec_state->int_vector = 0;
285	220	nec_state->pending_irq = 0;
r9812	r9813
293	228	nec_state->ParityVal = 0;
294	229
295	230
296		~~nec_state->s~~regs[PS] = 0xffff;
	231	Sreg(PS) = 0xffff;
297	232
298	233	CHANGE_PC;
299	234
r9812	r9813
305	240	}
306	241
307	242	nec_state->ZeroVal = nec_state->ParityVal = 1;
308		SetMD(1); /* set the mode-flag = native mode */
309	243
310		/* for v25+ / v35+ there is an internal decryption table */
311		//nec_state->config->v25v35_decryptiontable = gussun_test_decryption_table;
312
313	244	for (i = 0; i < 256; i++)
314	245	{
315	246	Mod_RM.reg.b[i] = reg_name[(i & 0x38) >> 3];
r9812	r9813
330	261
331	262	}
332	263
333		static void nec_interrupt(nec_state_t *nec_state, unsigned int_num,~~BOOLE~~AN md~~_flag~~)
	264	static void nec_interrupt(nec_state_t *nec_state, unsigned int_num, ATTR_UNUSED unsigned mode)
334	265	{
335	266	UINT32 dest_seg, dest_off;
336	267
337	268	i_pushf(nec_state);
338	269	nec_state->TF = nec_state->IF = 0;
339		if (md_flag) SetMD(0); /* clear Mode-flag = start 8080 emulation mode */
340	270
341	271	if (int_num == -1)
342	272	{
r9812	r9813
349	279	dest_off = read_mem_word(int_num*4);
350	280	dest_seg = read_mem_word(int_num*4+2);
351	281
352		PUSH(~~nec_state->s~~regs[PS]);
	282	PUSH(Sreg(PS));
353	283	PUSH(nec_state->ip);
354	284	nec_state->ip = (WORD)dest_off;
355		~~nec_state->s~~regs[PS] = (WORD)dest_seg;
	285	Sreg(PS) = (WORD)dest_seg;
356	286	CHANGE_PC;
357	287	}
358	288
r9812	r9813
381	311	/* OPCODES */
382	312	/****************************************************************************/
383	313
384		#~~def~~ine ~~OP(~~n~~um,func_nam~~e~~) stati~~c voi~~d fu~~n~~c_name(nec_~~st~~ate_t *ne~~c~~_state)~~
	314	#include "necinstr.c"
385	315
386		OP( 0x00, i_add_br8 ) { DEF_br8; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
387		OP( 0x01, i_add_wr16 ) { DEF_wr16; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
388		OP( 0x02, i_add_r8b ) { DEF_r8b; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
389		OP( 0x03, i_add_r16w ) { DEF_r16w; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
390		OP( 0x04, i_add_ald8 ) { DEF_ald8; ADDB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); }
391		OP( 0x05, i_add_axd16) { DEF_axd16; ADDW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); }
392		OP( 0x06, i_push_es ) { PUSH(nec_state->sregs[DS1]); CLKS(12,8,3); }
393		OP( 0x07, i_pop_es ) { POP(nec_state->sregs[DS1]); CLKS(12,8,5); }
394
395		OP( 0x08, i_or_br8 ) { DEF_br8; ORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
396		OP( 0x09, i_or_wr16 ) { DEF_wr16; ORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
397		OP( 0x0a, i_or_r8b ) { DEF_r8b; ORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
398		OP( 0x0b, i_or_r16w ) { DEF_r16w; ORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
399		OP( 0x0c, i_or_ald8 ) { DEF_ald8; ORB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); }
400		OP( 0x0d, i_or_axd16 ) { DEF_axd16; ORW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); }
401		OP( 0x0e, i_push_cs ) { PUSH(nec_state->sregs[PS]); CLKS(12,8,3); }
402		OP( 0x0f, i_pre_nec ) { UINT32 ModRM, tmp, tmp2;
403		switch (FETCH()) {
404		case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = nec_state->regs.b[CL] & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
405		case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = nec_state->regs.b[CL] & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
406		case 0x12 : BITOP_BYTE; CLKS(5,5,4); tmp2 = nec_state->regs.b[CL] & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
407		case 0x13 : BITOP_WORD; CLKS(5,5,4); tmp2 = nec_state->regs.b[CL] & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
408		case 0x14 : BITOP_BYTE; CLKS(4,4,4); tmp2 = nec_state->regs.b[CL] & 0x7; tmp \|= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
409		case 0x15 : BITOP_WORD; CLKS(4,4,4); tmp2 = nec_state->regs.b[CL] & 0xf; tmp \|= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
410		case 0x16 : BITOP_BYTE; CLKS(4,4,4); tmp2 = nec_state->regs.b[CL] & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
411		case 0x17 : BITOP_WORD; CLKS(4,4,4); tmp2 = nec_state->regs.b[CL] & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
412
413		case 0x18 : BITOP_BYTE; CLKS(4,4,4); tmp2 = (FETCH()) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
414		case 0x19 : BITOP_WORD; CLKS(4,4,4); tmp2 = (FETCH()) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
415		case 0x1a : BITOP_BYTE; CLKS(6,6,4); tmp2 = (FETCH()) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
416		case 0x1b : BITOP_WORD; CLKS(6,6,4); tmp2 = (FETCH()) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
417		case 0x1c : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; tmp \|= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
418		case 0x1d : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; tmp \|= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
419		case 0x1e : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
420		case 0x1f : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
421
422		case 0x20 : ADD4S; CLKS(7,7,2); break;
423		case 0x22 : SUB4S; CLKS(7,7,2); break;
424		case 0x26 : CMP4S; CLKS(7,7,2); break;
425		case 0x28 : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp <<= 4; tmp \|= nec_state->regs.b[AL] & 0xf; nec_state->regs.b[AL] = (nec_state->regs.b[AL] & 0xf0) \| ((tmp>>8)&0xf); tmp &= 0xff; PutbackRMByte(ModRM,tmp); CLKM(13,13,9,28,28,15); break;
426		case 0x2a : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp2 = (nec_state->regs.b[AL] & 0xf)<<4; nec_state->regs.b[AL] = (nec_state->regs.b[AL] & 0xf0) \| (tmp&0xf); tmp = tmp2 \| (tmp>>4); PutbackRMByte(ModRM,tmp); CLKM(17,17,13,32,32,19); break;
427		case 0x31 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield INS\n",PC(nec_state)); break;
428		case 0x33 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield EXT\n",PC(nec_state)); break;
429		case 0x92 : CLK(2); break; /* V25/35 FINT */
430		case 0xe0 : ModRM = FETCH(); ModRM=0; logerror("%06x: V33 unimplemented BRKXA (break to expansion address)\n",PC(nec_state)); break;
431		case 0xf0 : ModRM = FETCH(); ModRM=0; logerror("%06x: V33 unimplemented RETXA (return from expansion address)\n",PC(nec_state)); break;
432		case 0xff : ModRM = FETCH(); ModRM=0; logerror("%06x: unimplemented BRKEM (break to 8080 emulation mode)\n",PC(nec_state)); break;
433		default: logerror("%06x: Unknown V20 instruction\n",PC(nec_state)); break;
434		}
435		}
436
437		OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
438		OP( 0x11, i_adc_wr16 ) { DEF_wr16; src+=CF; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
439		OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
440		OP( 0x13, i_adc_r16w ) { DEF_r16w; src+=CF; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
441		OP( 0x14, i_adc_ald8 ) { DEF_ald8; src+=CF; ADDB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); }
442		OP( 0x15, i_adc_axd16) { DEF_axd16; src+=CF; ADDW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); }
443		OP( 0x16, i_push_ss ) { PUSH(nec_state->sregs[SS]); CLKS(12,8,3); }
444		OP( 0x17, i_pop_ss ) { POP(nec_state->sregs[SS]); CLKS(12,8,5); nec_state->no_interrupt=1; }
445
446		OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
447		OP( 0x19, i_sbb_wr16 ) { DEF_wr16; src+=CF; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
448		OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
449		OP( 0x1b, i_sbb_r16w ) { DEF_r16w; src+=CF; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
450		OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; src+=CF; SUBB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); }
451		OP( 0x1d, i_sbb_axd16) { DEF_axd16; src+=CF; SUBW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); }
452		OP( 0x1e, i_push_ds ) { PUSH(nec_state->sregs[DS0]); CLKS(12,8,3); }
453		OP( 0x1f, i_pop_ds ) { POP(nec_state->sregs[DS0]); CLKS(12,8,5); }
454
455		OP( 0x20, i_and_br8 ) { DEF_br8; ANDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
456		OP( 0x21, i_and_wr16 ) { DEF_wr16; ANDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
457		OP( 0x22, i_and_r8b ) { DEF_r8b; ANDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
458		OP( 0x23, i_and_r16w ) { DEF_r16w; ANDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
459		OP( 0x24, i_and_ald8 ) { DEF_ald8; ANDB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); }
460		OP( 0x25, i_and_axd16) { DEF_axd16; ANDW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); }
461		OP( 0x26, i_es ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS1]<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
462		OP( 0x27, i_daa ) { ADJ4(6,0x60); CLKS(3,3,2); }
463
464		OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
465		OP( 0x29, i_sub_wr16 ) { DEF_wr16; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
466		OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
467		OP( 0x2b, i_sub_r16w ) { DEF_r16w; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
468		OP( 0x2c, i_sub_ald8 ) { DEF_ald8; SUBB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); }
469		OP( 0x2d, i_sub_axd16) { DEF_axd16; SUBW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); }
470		OP( 0x2e, i_cs ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[PS]<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
471		OP( 0x2f, i_das ) { ADJ4(-6,-0x60); CLKS(3,3,2); }
472
473		OP( 0x30, i_xor_br8 ) { DEF_br8; XORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
474		OP( 0x31, i_xor_wr16 ) { DEF_wr16; XORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
475		OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
476		OP( 0x33, i_xor_r16w ) { DEF_r16w; XORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
477		OP( 0x34, i_xor_ald8 ) { DEF_ald8; XORB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); }
478		OP( 0x35, i_xor_axd16) { DEF_axd16; XORW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); }
479		OP( 0x36, i_ss ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[SS]<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
480		OP( 0x37, i_aaa ) { ADJB(6, (nec_state->regs.b[AL] > 0xf9) ? 2 : 1); CLKS(7,7,4); }
481
482		OP( 0x38, i_cmp_br8 ) { DEF_br8; SUBB; CLKM(2,2,2,11,11,6); }
483		OP( 0x39, i_cmp_wr16 ) { DEF_wr16; SUBW; CLKR(15,15,8,15,11,6,2,EA);}
484		OP( 0x3a, i_cmp_r8b ) { DEF_r8b; SUBB; CLKM(2,2,2,11,11,6); }
485		OP( 0x3b, i_cmp_r16w ) { DEF_r16w; SUBW; CLKR(15,15,8,15,11,6,2,EA); }
486		OP( 0x3c, i_cmp_ald8 ) { DEF_ald8; SUBB; CLKS(4,4,2); }
487		OP( 0x3d, i_cmp_axd16) { DEF_axd16; SUBW; CLKS(4,4,2); }
488		OP( 0x3e, i_ds ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS0]<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
489		OP( 0x3f, i_aas ) { ADJB(-6, (nec_state->regs.b[AL] < 6) ? -2 : -1); CLKS(7,7,4); }
490
491		OP( 0x40, i_inc_ax ) { IncWordReg(AW); CLK(2); }
492		OP( 0x41, i_inc_cx ) { IncWordReg(CW); CLK(2); }
493		OP( 0x42, i_inc_dx ) { IncWordReg(DW); CLK(2); }
494		OP( 0x43, i_inc_bx ) { IncWordReg(BW); CLK(2); }
495		OP( 0x44, i_inc_sp ) { IncWordReg(SP); CLK(2); }
496		OP( 0x45, i_inc_bp ) { IncWordReg(BP); CLK(2); }
497		OP( 0x46, i_inc_si ) { IncWordReg(IX); CLK(2); }
498		OP( 0x47, i_inc_di ) { IncWordReg(IY); CLK(2); }
499
500		OP( 0x48, i_dec_ax ) { DecWordReg(AW); CLK(2); }
501		OP( 0x49, i_dec_cx ) { DecWordReg(CW); CLK(2); }
502		OP( 0x4a, i_dec_dx ) { DecWordReg(DW); CLK(2); }
503		OP( 0x4b, i_dec_bx ) { DecWordReg(BW); CLK(2); }
504		OP( 0x4c, i_dec_sp ) { DecWordReg(SP); CLK(2); }
505		OP( 0x4d, i_dec_bp ) { DecWordReg(BP); CLK(2); }
506		OP( 0x4e, i_dec_si ) { DecWordReg(IX); CLK(2); }
507		OP( 0x4f, i_dec_di ) { DecWordReg(IY); CLK(2); }
508
509		OP( 0x50, i_push_ax ) { PUSH(nec_state->regs.w[AW]); CLKS(12,8,3); }
510		OP( 0x51, i_push_cx ) { PUSH(nec_state->regs.w[CW]); CLKS(12,8,3); }
511		OP( 0x52, i_push_dx ) { PUSH(nec_state->regs.w[DW]); CLKS(12,8,3); }
512		OP( 0x53, i_push_bx ) { PUSH(nec_state->regs.w[BW]); CLKS(12,8,3); }
513		OP( 0x54, i_push_sp ) { PUSH(nec_state->regs.w[SP]); CLKS(12,8,3); }
514		OP( 0x55, i_push_bp ) { PUSH(nec_state->regs.w[BP]); CLKS(12,8,3); }
515		OP( 0x56, i_push_si ) { PUSH(nec_state->regs.w[IX]); CLKS(12,8,3); }
516		OP( 0x57, i_push_di ) { PUSH(nec_state->regs.w[IY]); CLKS(12,8,3); }
517
518		OP( 0x58, i_pop_ax ) { POP(nec_state->regs.w[AW]); CLKS(12,8,5); }
519		OP( 0x59, i_pop_cx ) { POP(nec_state->regs.w[CW]); CLKS(12,8,5); }
520		OP( 0x5a, i_pop_dx ) { POP(nec_state->regs.w[DW]); CLKS(12,8,5); }
521		OP( 0x5b, i_pop_bx ) { POP(nec_state->regs.w[BW]); CLKS(12,8,5); }
522		OP( 0x5c, i_pop_sp ) { POP(nec_state->regs.w[SP]); CLKS(12,8,5); }
523		OP( 0x5d, i_pop_bp ) { POP(nec_state->regs.w[BP]); CLKS(12,8,5); }
524		OP( 0x5e, i_pop_si ) { POP(nec_state->regs.w[IX]); CLKS(12,8,5); }
525		OP( 0x5f, i_pop_di ) { POP(nec_state->regs.w[IY]); CLKS(12,8,5); }
526
527		OP( 0x60, i_pusha ) {
528		unsigned tmp=nec_state->regs.w[SP];
529		PUSH(nec_state->regs.w[AW]);
530		PUSH(nec_state->regs.w[CW]);
531		PUSH(nec_state->regs.w[DW]);
532		PUSH(nec_state->regs.w[BW]);
533		PUSH(tmp);
534		PUSH(nec_state->regs.w[BP]);
535		PUSH(nec_state->regs.w[IX]);
536		PUSH(nec_state->regs.w[IY]);
537		CLKS(67,35,20);
538		}
539		OP( 0x61, i_popa ) {
540		unsigned tmp;
541		POP(nec_state->regs.w[IY]);
542		POP(nec_state->regs.w[IX]);
543		POP(nec_state->regs.w[BP]);
544		POP(tmp);
545		POP(nec_state->regs.w[BW]);
546		POP(nec_state->regs.w[DW]);
547		POP(nec_state->regs.w[CW]);
548		POP(nec_state->regs.w[AW]);
549		CLKS(75,43,22);
550		}
551		OP( 0x62, i_chkind ) {
552		UINT32 low,high,tmp;
553		GetModRM;
554		low = GetRMWord(ModRM);
555		high= GetnextRMWord;
556		tmp= RegWord(ModRM);
557		if (tmp<low \|\| tmp>high) {
558		nec_interrupt(nec_state, 5,0);
559		}
560		nec_state->icount-=20;
561		logerror("%06x: bound %04x high %04x low %04x tmp\n",PC(nec_state),high,low,tmp);
562		}
563		OP( 0x63, i_brkn ) { nec_interrupt(nec_state, FETCH(),1); CLKS(50,50,24); } // timing not verified, used by riskchal / gussun
564		OP( 0x64, i_repnc ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->regs.w[CW];
565		switch(next) { /* Segments */
566		case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS1]<<4; next = fetchop(nec_state); CLK(2); break;
567		case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[PS]<<4; next = fetchop(nec_state); CLK(2); break;
568		case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[SS]<<4; next = fetchop(nec_state); CLK(2); break;
569		case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS0]<<4; next = fetchop(nec_state); CLK(2); break;
570		}
571
572		switch(next) {
573		case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
574		case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
575		case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
576		case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
577		case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
578		case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
579		case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
580		case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
581		case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
582		case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
583		case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
584		case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
585		case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
586		case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && !CF); nec_state->regs.w[CW]=c; break;
587		default: logerror("%06x: REPNC invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
588		}
589		nec_state->seg_prefix=FALSE;
590		}
591
592		OP( 0x65, i_repc ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->regs.w[CW];
593		switch(next) { /* Segments */
594		case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS1]<<4; next = fetchop(nec_state); CLK(2); break;
595		case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[PS]<<4; next = fetchop(nec_state); CLK(2); break;
596		case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[SS]<<4; next = fetchop(nec_state); CLK(2); break;
597		case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS0]<<4; next = fetchop(nec_state); CLK(2); break;
598		}
599
600		switch(next) {
601		case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
602		case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
603		case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
604		case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
605		case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
606		case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
607		case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
608		case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
609		case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
610		case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
611		case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
612		case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
613		case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
614		case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && CF); nec_state->regs.w[CW]=c; break;
615		default: logerror("%06x: REPC invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
616		}
617		nec_state->seg_prefix=FALSE;
618		}
619
620		OP( 0x68, i_push_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(tmp); CLKW(12,12,5,12,8,5,nec_state->regs.w[SP]); }
621		OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; tmp = FETCHWORD(); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?38:47;}
622		OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH())); PUSH(tmp); CLKW(11,11,5,11,7,3,nec_state->regs.w[SP]); }
623		OP( 0x6b, i_imul_d8 ) { UINT32 src2; DEF_r16w; src2= (WORD)((INT16)((INT8)FETCH())); dst = (INT32)((INT16)src)*(INT32)((INT16)src2); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?31:39; }
624		OP( 0x6c, i_insb ) { PutMemB(DS1,nec_state->regs.w[IY],read_port_byte(nec_state->regs.w[DW])); nec_state->regs.w[IY]+= -2 * nec_state->DF + 1; CLK(8); }
625		OP( 0x6d, i_insw ) { PutMemW(DS1,nec_state->regs.w[IY],read_port_word(nec_state->regs.w[DW])); nec_state->regs.w[IY]+= -4 * nec_state->DF + 2; CLKS(18,10,8); }
626		OP( 0x6e, i_outsb ) { write_port_byte(nec_state->regs.w[DW],GetMemB(DS0,nec_state->regs.w[IX])); nec_state->regs.w[IX]+= -2 * nec_state->DF + 1; CLK(8); }
627		OP( 0x6f, i_outsw ) { write_port_word(nec_state->regs.w[DW],GetMemW(DS0,nec_state->regs.w[IX])); nec_state->regs.w[IX]+= -4 * nec_state->DF + 2; CLKS(18,10,8); }
628
629		OP( 0x70, i_jo ) { JMP( OF); CLKS(4,4,3); }
630		OP( 0x71, i_jno ) { JMP(!OF); CLKS(4,4,3); }
631		OP( 0x72, i_jc ) { JMP( CF); CLKS(4,4,3); }
632		OP( 0x73, i_jnc ) { JMP(!CF); CLKS(4,4,3); }
633		OP( 0x74, i_jz ) { JMP( ZF); CLKS(4,4,3); }
634		OP( 0x75, i_jnz ) { JMP(!ZF); CLKS(4,4,3); }
635		OP( 0x76, i_jce ) { JMP(CF \|\| ZF); CLKS(4,4,3); }
636		OP( 0x77, i_jnce ) { JMP(!(CF \|\| ZF)); CLKS(4,4,3); }
637		OP( 0x78, i_js ) { JMP( SF); CLKS(4,4,3); }
638		OP( 0x79, i_jns ) { JMP(!SF); CLKS(4,4,3); }
639		OP( 0x7a, i_jp ) { JMP( PF); CLKS(4,4,3); }
640		OP( 0x7b, i_jnp ) { JMP(!PF); CLKS(4,4,3); }
641		OP( 0x7c, i_jl ) { JMP((SF!=OF)&&(!ZF)); CLKS(4,4,3); }
642		OP( 0x7d, i_jnl ) { JMP((ZF)\|\|(SF==OF)); CLKS(4,4,3); }
643		OP( 0x7e, i_jle ) { JMP((ZF)\|\|(SF!=OF)); CLKS(4,4,3); }
644		OP( 0x7f, i_jnle ) { JMP((SF==OF)&&(!ZF)); CLKS(4,4,3); }
645
646		OP( 0x80, i_80pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = FETCH();
647		if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKS(13,13,6) else CLKS(18,18,7)
648		switch (ModRM & 0x38) {
649		case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
650		case 0x08: ORB; PutbackRMByte(ModRM,dst); break;
651		case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break;
652		case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break;
653		case 0x20: ANDB; PutbackRMByte(ModRM,dst); break;
654		case 0x28: SUBB; PutbackRMByte(ModRM,dst); break;
655		case 0x30: XORB; PutbackRMByte(ModRM,dst); break;
656		case 0x38: SUBB; break; /* CMP */
657		}
658		}
659
660		OP( 0x81, i_81pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = FETCH(); src+= (FETCH() << 8);
661		if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKW(17,17,8,17,13,6,EA) else CLKW(26,26,11,26,18,7,EA)
662		switch (ModRM & 0x38) {
663		case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
664		case 0x08: ORW; PutbackRMWord(ModRM,dst); break;
665		case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break;
666		case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break;
667		case 0x20: ANDW; PutbackRMWord(ModRM,dst); break;
668		case 0x28: SUBW; PutbackRMWord(ModRM,dst); break;
669		case 0x30: XORW; PutbackRMWord(ModRM,dst); break;
670		case 0x38: SUBW; break; /* CMP */
671		}
672		}
673
674		OP( 0x82, i_82pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = (BYTE)((INT8)FETCH());
675		if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKS(13,13,6) else CLKS(18,18,7)
676		switch (ModRM & 0x38) {
677		case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
678		case 0x08: ORB; PutbackRMByte(ModRM,dst); break;
679		case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break;
680		case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break;
681		case 0x20: ANDB; PutbackRMByte(ModRM,dst); break;
682		case 0x28: SUBB; PutbackRMByte(ModRM,dst); break;
683		case 0x30: XORB; PutbackRMByte(ModRM,dst); break;
684		case 0x38: SUBB; break; /* CMP */
685		}
686		}
687
688		OP( 0x83, i_83pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = (WORD)((INT16)((INT8)FETCH()));
689		if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKW(17,17,8,17,13,6,EA) else CLKW(26,26,11,26,18,7,EA)
690		switch (ModRM & 0x38) {
691		case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
692		case 0x08: ORW; PutbackRMWord(ModRM,dst); break;
693		case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break;
694		case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break;
695		case 0x20: ANDW; PutbackRMWord(ModRM,dst); break;
696		case 0x28: SUBW; PutbackRMWord(ModRM,dst); break;
697		case 0x30: XORW; PutbackRMWord(ModRM,dst); break;
698		case 0x38: SUBW; break; /* CMP */
699		}
700		}
701
702		OP( 0x84, i_test_br8 ) { DEF_br8; ANDB; CLKM(2,2,2,10,10,6); }
703		OP( 0x85, i_test_wr16 ) { DEF_wr16; ANDW; CLKR(14,14,8,14,10,6,2,EA); }
704		OP( 0x86, i_xchg_br8 ) { DEF_br8; RegByte(ModRM)=dst; PutbackRMByte(ModRM,src); CLKM(3,3,3,16,18,8); }
705		OP( 0x87, i_xchg_wr16 ) { DEF_wr16; RegWord(ModRM)=dst; PutbackRMWord(ModRM,src); CLKR(24,24,12,24,16,8,3,EA); }
706
707		OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLKM(2,2,2,9,9,3); }
708		OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLKR(13,13,5,13,9,3,2,EA); }
709		OP( 0x8a, i_mov_r8b ) { UINT8 src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLKM(2,2,2,11,11,5); }
710		OP( 0x8b, i_mov_r16w ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); RegWord(ModRM)=src; CLKR(15,15,7,15,11,5,2,EA); }
711		OP( 0x8c, i_mov_wsreg ) { GetModRM; PutRMWord(ModRM,nec_state->sregs[(ModRM & 0x38) >> 3]); CLKR(14,14,5,14,10,3,2,EA); }
712		OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH(); (void)(*GetEA[ModRM])(nec_state); RegWord(ModRM)=EO; CLKS(4,4,2); }
713		OP( 0x8e, i_mov_sregw ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); CLKR(15,15,7,15,11,5,2,EA);
714		switch (ModRM & 0x38) {
715		case 0x00: nec_state->sregs[DS1] = src; break; /* mov es,ew */
716		case 0x08: nec_state->sregs[PS] = src; break; /* mov cs,ew */
717		case 0x10: nec_state->sregs[SS] = src; break; /* mov ss,ew */
718		case 0x18: nec_state->sregs[DS0] = src; break; /* mov ds,ew */
719		default: logerror("%06x: Mov Sreg - Invalid register\n",PC(nec_state));
720		}
721		nec_state->no_interrupt=1;
722		}
723		OP( 0x8f, i_popw ) { UINT16 tmp; GetModRM; POP(tmp); PutRMWord(ModRM,tmp); nec_state->icount-=21; }
724		OP( 0x90, i_nop ) { CLK(3); }
725		OP( 0x91, i_xchg_axcx ) { XchgAWReg(CW); CLK(3); }
726		OP( 0x92, i_xchg_axdx ) { XchgAWReg(DW); CLK(3); }
727		OP( 0x93, i_xchg_axbx ) { XchgAWReg(BW); CLK(3); }
728		OP( 0x94, i_xchg_axsp ) { XchgAWReg(SP); CLK(3); }
729		OP( 0x95, i_xchg_axbp ) { XchgAWReg(BP); CLK(3); }
730		OP( 0x96, i_xchg_axsi ) { XchgAWReg(IX); CLK(3); }
731		OP( 0x97, i_xchg_axdi ) { XchgAWReg(IY); CLK(3); }
732
733		OP( 0x98, i_cbw ) { nec_state->regs.b[AH] = (nec_state->regs.b[AL] & 0x80) ? 0xff : 0; CLK(2); }
734		OP( 0x99, i_cwd ) { nec_state->regs.w[DW] = (nec_state->regs.b[AH] & 0x80) ? 0xffff : 0; CLK(4); }
735		OP( 0x9a, i_call_far ) { UINT32 tmp, tmp2; tmp = FETCHWORD(); tmp2 = FETCHWORD(); PUSH(nec_state->sregs[PS]); PUSH(nec_state->ip); nec_state->ip = (WORD)tmp; nec_state->sregs[PS] = (WORD)tmp2; CHANGE_PC; CLKW(29,29,13,29,21,9,nec_state->regs.w[SP]); }
736		OP( 0x9b, i_wait ) { if (!nec_state->poll_state) nec_state->ip--; CLK(5); }
737		OP( 0x9c, i_pushf ) { UINT16 tmp = CompressFlags(); PUSH( tmp ); CLKS(12,8,3); }
738		OP( 0x9d, i_popf ) { UINT32 tmp; POP(tmp); ExpandFlags(tmp); CLKS(12,8,5); if (nec_state->TF) nec_trap(nec_state); }
739		OP( 0x9e, i_sahf ) { UINT32 tmp = (CompressFlags() & 0xff00) \| (nec_state->regs.b[AH] & 0xd5); ExpandFlags(tmp); CLKS(3,3,2); }
740		OP( 0x9f, i_lahf ) { nec_state->regs.b[AH] = CompressFlags() & 0xff; CLKS(3,3,2); }
741
742		OP( 0xa0, i_mov_aldisp ) { UINT32 addr; addr = FETCHWORD(); nec_state->regs.b[AL] = GetMemB(DS0, addr); CLKS(10,10,5); }
743		OP( 0xa1, i_mov_axdisp ) { UINT32 addr; addr = FETCHWORD(); nec_state->regs.w[AW] = GetMemW(DS0, addr); CLKW(14,14,7,14,10,5,addr); }
744		OP( 0xa2, i_mov_dispal ) { UINT32 addr; addr = FETCHWORD(); PutMemB(DS0, addr, nec_state->regs.b[AL]); CLKS(9,9,3); }
745		OP( 0xa3, i_mov_dispax ) { UINT32 addr; addr = FETCHWORD(); PutMemW(DS0, addr, nec_state->regs.w[AW]); CLKW(13,13,5,13,9,3,addr); }
746		OP( 0xa4, i_movsb ) { UINT32 tmp = GetMemB(DS0,nec_state->regs.w[IX]); PutMemB(DS1,nec_state->regs.w[IY], tmp); nec_state->regs.w[IY] += -2 * nec_state->DF + 1; nec_state->regs.w[IX] += -2 * nec_state->DF + 1; CLKS(8,8,6); }
747		OP( 0xa5, i_movsw ) { UINT32 tmp = GetMemW(DS0,nec_state->regs.w[IX]); PutMemW(DS1,nec_state->regs.w[IY], tmp); nec_state->regs.w[IY] += -4 * nec_state->DF + 2; nec_state->regs.w[IX] += -4 * nec_state->DF + 2; CLKS(16,16,10); }
748		OP( 0xa6, i_cmpsb ) { UINT32 src = GetMemB(DS1, nec_state->regs.w[IY]); UINT32 dst = GetMemB(DS0, nec_state->regs.w[IX]); SUBB; nec_state->regs.w[IY] += -2 * nec_state->DF + 1; nec_state->regs.w[IX] += -2 * nec_state->DF + 1; CLKS(14,14,14); }
749		OP( 0xa7, i_cmpsw ) { UINT32 src = GetMemW(DS1, nec_state->regs.w[IY]); UINT32 dst = GetMemW(DS0, nec_state->regs.w[IX]); SUBW; nec_state->regs.w[IY] += -4 * nec_state->DF + 2; nec_state->regs.w[IX] += -4 * nec_state->DF + 2; CLKS(14,14,14); }
750
751		OP( 0xa8, i_test_ald8 ) { DEF_ald8; ANDB; CLKS(4,4,2); }
752		OP( 0xa9, i_test_axd16 ) { DEF_axd16; ANDW; CLKS(4,4,2); }
753		OP( 0xaa, i_stosb ) { PutMemB(DS1,nec_state->regs.w[IY],nec_state->regs.b[AL]); nec_state->regs.w[IY] += -2 * nec_state->DF + 1; CLKS(4,4,3); }
754		OP( 0xab, i_stosw ) { PutMemW(DS1,nec_state->regs.w[IY],nec_state->regs.w[AW]); nec_state->regs.w[IY] += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,nec_state->regs.w[IY]); }
755		OP( 0xac, i_lodsb ) { nec_state->regs.b[AL] = GetMemB(DS0,nec_state->regs.w[IX]); nec_state->regs.w[IX] += -2 * nec_state->DF + 1; CLKS(4,4,3); }
756		OP( 0xad, i_lodsw ) { nec_state->regs.w[AW] = GetMemW(DS0,nec_state->regs.w[IX]); nec_state->regs.w[IX] += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,nec_state->regs.w[IX]); }
757		OP( 0xae, i_scasb ) { UINT32 src = GetMemB(DS1, nec_state->regs.w[IY]); UINT32 dst = nec_state->regs.b[AL]; SUBB; nec_state->regs.w[IY] += -2 * nec_state->DF + 1; CLKS(4,4,3); }
758		OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(DS1, nec_state->regs.w[IY]); UINT32 dst = nec_state->regs.w[AW]; SUBW; nec_state->regs.w[IY] += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,nec_state->regs.w[IY]); }
759
760		OP( 0xb0, i_mov_ald8 ) { nec_state->regs.b[AL] = FETCH(); CLKS(4,4,2); }
761		OP( 0xb1, i_mov_cld8 ) { nec_state->regs.b[CL] = FETCH(); CLKS(4,4,2); }
762		OP( 0xb2, i_mov_dld8 ) { nec_state->regs.b[DL] = FETCH(); CLKS(4,4,2); }
763		OP( 0xb3, i_mov_bld8 ) { nec_state->regs.b[BL] = FETCH(); CLKS(4,4,2); }
764		OP( 0xb4, i_mov_ahd8 ) { nec_state->regs.b[AH] = FETCH(); CLKS(4,4,2); }
765		OP( 0xb5, i_mov_chd8 ) { nec_state->regs.b[CH] = FETCH(); CLKS(4,4,2); }
766		OP( 0xb6, i_mov_dhd8 ) { nec_state->regs.b[DH] = FETCH(); CLKS(4,4,2); }
767		OP( 0xb7, i_mov_bhd8 ) { nec_state->regs.b[BH] = FETCH(); CLKS(4,4,2); }
768
769		OP( 0xb8, i_mov_axd16 ) { nec_state->regs.b[AL] = FETCH(); nec_state->regs.b[AH] = FETCH(); CLKS(4,4,2); }
770		OP( 0xb9, i_mov_cxd16 ) { nec_state->regs.b[CL] = FETCH(); nec_state->regs.b[CH] = FETCH(); CLKS(4,4,2); }
771		OP( 0xba, i_mov_dxd16 ) { nec_state->regs.b[DL] = FETCH(); nec_state->regs.b[DH] = FETCH(); CLKS(4,4,2); }
772		OP( 0xbb, i_mov_bxd16 ) { nec_state->regs.b[BL] = FETCH(); nec_state->regs.b[BH] = FETCH(); CLKS(4,4,2); }
773		OP( 0xbc, i_mov_spd16 ) { nec_state->regs.b[SPL] = FETCH(); nec_state->regs.b[SPH] = FETCH(); CLKS(4,4,2); }
774		OP( 0xbd, i_mov_bpd16 ) { nec_state->regs.b[BPL] = FETCH(); nec_state->regs.b[BPH] = FETCH(); CLKS(4,4,2); }
775		OP( 0xbe, i_mov_sid16 ) { nec_state->regs.b[IXL] = FETCH(); nec_state->regs.b[IXH] = FETCH(); CLKS(4,4,2); }
776		OP( 0xbf, i_mov_did16 ) { nec_state->regs.b[IYL] = FETCH(); nec_state->regs.b[IYH] = FETCH(); CLKS(4,4,2); }
777
778		OP( 0xc0, i_rotshft_bd8 ) {
779		UINT32 src, dst; UINT8 c;
780		GetModRM; src = (unsigned)GetRMByte(ModRM); dst=src;
781		c=FETCH();
782		CLKM(7,7,2,19,19,6);
783		if (c) switch (ModRM & 0x38) {
784		case 0x00: do { ROL_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
785		case 0x08: do { ROR_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
786		case 0x10: do { ROLC_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
787		case 0x18: do { RORC_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
788		case 0x20: SHL_BYTE(c); break;
789		case 0x28: SHR_BYTE(c); break;
790		case 0x30: logerror("%06x: Undefined opcode 0xc0 0x30 (SHLA)\n",PC(nec_state)); break;
791		case 0x38: SHRA_BYTE(c); break;
792		}
793		}
794
795		OP( 0xc1, i_rotshft_wd8 ) {
796		UINT32 src, dst; UINT8 c;
797		GetModRM; src = (unsigned)GetRMWord(ModRM); dst=src;
798		c=FETCH();
799		CLKM(7,7,2,27,19,6);
800		if (c) switch (ModRM & 0x38) {
801		case 0x00: do { ROL_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
802		case 0x08: do { ROR_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
803		case 0x10: do { ROLC_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
804		case 0x18: do { RORC_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
805		case 0x20: SHL_WORD(c); break;
806		case 0x28: SHR_WORD(c); break;
807		case 0x30: logerror("%06x: Undefined opcode 0xc1 0x30 (SHLA)\n",PC(nec_state)); break;
808		case 0x38: SHRA_WORD(c); break;
809		}
810		}
811
812		OP( 0xc2, i_ret_d16 ) { UINT32 count = FETCH(); count += FETCH() << 8; POP(nec_state->ip); nec_state->regs.w[SP]+=count; CHANGE_PC; CLKS(24,24,10); }
813		OP( 0xc3, i_ret ) { POP(nec_state->ip); CHANGE_PC; CLKS(19,19,10); }
814		OP( 0xc4, i_les_dw ) { GetModRM; WORD tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; nec_state->sregs[DS1] = GetnextRMWord; CLKW(26,26,14,26,18,10,EA); }
815		OP( 0xc5, i_lds_dw ) { GetModRM; WORD tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; nec_state->sregs[DS0] = GetnextRMWord; CLKW(26,26,14,26,18,10,EA); }
816		OP( 0xc6, i_mov_bd8 ) { GetModRM; PutImmRMByte(ModRM); nec_state->icount-=(ModRM >=0xc0 )?4:11; }
817		OP( 0xc7, i_mov_wd16 ) { GetModRM; PutImmRMWord(ModRM); nec_state->icount-=(ModRM >=0xc0 )?4:15; }
818
819		OP( 0xc8, i_enter ) {
820		UINT32 nb = FETCH();
821		UINT32 i,level;
822
823		nec_state->icount-=23;
824		nb += FETCH() << 8;
825		level = FETCH();
826		PUSH(nec_state->regs.w[BP]);
827		nec_state->regs.w[BP]=nec_state->regs.w[SP];
828		nec_state->regs.w[SP] -= nb;
829		for (i=1;i<level;i++) {
830		PUSH(GetMemW(SS,nec_state->regs.w[BP]-i*2));
831		nec_state->icount-=16;
832		}
833		if (level) PUSH(nec_state->regs.w[BP]);
834		}
835		OP( 0xc9, i_leave ) {
836		nec_state->regs.w[SP]=nec_state->regs.w[BP];
837		POP(nec_state->regs.w[BP]);
838		nec_state->icount-=8;
839		}
840		OP( 0xca, i_retf_d16 ) { UINT32 count = FETCH(); count += FETCH() << 8; POP(nec_state->ip); POP(nec_state->sregs[PS]); nec_state->regs.w[SP]+=count; CHANGE_PC; CLKS(32,32,16); }
841		OP( 0xcb, i_retf ) { POP(nec_state->ip); POP(nec_state->sregs[PS]); CHANGE_PC; CLKS(29,29,16); }
842		OP( 0xcc, i_int3 ) { nec_interrupt(nec_state, 3,0); CLKS(50,50,24); }
843		OP( 0xcd, i_int ) { nec_interrupt(nec_state, FETCH(),0); CLKS(50,50,24); }
844		OP( 0xce, i_into ) { if (OF) { nec_interrupt(nec_state, 4,0); CLKS(52,52,26); } else CLK(3); }
845		OP( 0xcf, i_iret ) { POP(nec_state->ip); POP(nec_state->sregs[PS]); i_popf(nec_state); SetMD(1); CHANGE_PC; CLKS(39,39,19); }
846
847		OP( 0xd0, i_rotshft_b ) {
848		UINT32 src, dst; GetModRM; src = (UINT32)GetRMByte(ModRM); dst=src;
849		CLKM(6,6,2,16,16,7);
850		switch (ModRM & 0x38) {
851		case 0x00: ROL_BYTE; PutbackRMByte(ModRM,(BYTE)dst); nec_state->OverVal = (src^dst)&0x80; break;
852		case 0x08: ROR_BYTE; PutbackRMByte(ModRM,(BYTE)dst); nec_state->OverVal = (src^dst)&0x80; break;
853		case 0x10: ROLC_BYTE; PutbackRMByte(ModRM,(BYTE)dst); nec_state->OverVal = (src^dst)&0x80; break;
854		case 0x18: RORC_BYTE; PutbackRMByte(ModRM,(BYTE)dst); nec_state->OverVal = (src^dst)&0x80; break;
855		case 0x20: SHL_BYTE(1); nec_state->OverVal = (src^dst)&0x80; break;
856		case 0x28: SHR_BYTE(1); nec_state->OverVal = (src^dst)&0x80; break;
857		case 0x30: logerror("%06x: Undefined opcode 0xd0 0x30 (SHLA)\n",PC(nec_state)); break;
858		case 0x38: SHRA_BYTE(1); nec_state->OverVal = 0; break;
859		}
860		}
861
862		OP( 0xd1, i_rotshft_w ) {
863		UINT32 src, dst; GetModRM; src = (UINT32)GetRMWord(ModRM); dst=src;
864		CLKM(6,6,2,24,16,7);
865		switch (ModRM & 0x38) {
866		case 0x00: ROL_WORD; PutbackRMWord(ModRM,(WORD)dst); nec_state->OverVal = (src^dst)&0x8000; break;
867		case 0x08: ROR_WORD; PutbackRMWord(ModRM,(WORD)dst); nec_state->OverVal = (src^dst)&0x8000; break;
868		case 0x10: ROLC_WORD; PutbackRMWord(ModRM,(WORD)dst); nec_state->OverVal = (src^dst)&0x8000; break;
869		case 0x18: RORC_WORD; PutbackRMWord(ModRM,(WORD)dst); nec_state->OverVal = (src^dst)&0x8000; break;
870		case 0x20: SHL_WORD(1); nec_state->OverVal = (src^dst)&0x8000; break;
871		case 0x28: SHR_WORD(1); nec_state->OverVal = (src^dst)&0x8000; break;
872		case 0x30: logerror("%06x: Undefined opcode 0xd1 0x30 (SHLA)\n",PC(nec_state)); break;
873		case 0x38: SHRA_WORD(1); nec_state->OverVal = 0; break;
874		}
875		}
876
877		OP( 0xd2, i_rotshft_bcl ) {
878		UINT32 src, dst; UINT8 c; GetModRM; src = (UINT32)GetRMByte(ModRM); dst=src;
879		c=nec_state->regs.b[CL];
880		CLKM(7,7,2,19,19,6);
881		if (c) switch (ModRM & 0x38) {
882		case 0x00: do { ROL_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
883		case 0x08: do { ROR_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
884		case 0x10: do { ROLC_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
885		case 0x18: do { RORC_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
886		case 0x20: SHL_BYTE(c); break;
887		case 0x28: SHR_BYTE(c); break;
888		case 0x30: logerror("%06x: Undefined opcode 0xd2 0x30 (SHLA)\n",PC(nec_state)); break;
889		case 0x38: SHRA_BYTE(c); break;
890		}
891		}
892
893		OP( 0xd3, i_rotshft_wcl ) {
894		UINT32 src, dst; UINT8 c; GetModRM; src = (UINT32)GetRMWord(ModRM); dst=src;
895		c=nec_state->regs.b[CL];
896		CLKM(7,7,2,27,19,6);
897		if (c) switch (ModRM & 0x38) {
898		case 0x00: do { ROL_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
899		case 0x08: do { ROR_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
900		case 0x10: do { ROLC_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
901		case 0x18: do { RORC_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
902		case 0x20: SHL_WORD(c); break;
903		case 0x28: SHR_WORD(c); break;
904		case 0x30: logerror("%06x: Undefined opcode 0xd3 0x30 (SHLA)\n",PC(nec_state)); break;
905		case 0x38: SHRA_WORD(c); break;
906		}
907		}
908
909		OP( 0xd4, i_aam ) { UINT32 mult=FETCH(); mult=0; nec_state->regs.b[AH] = nec_state->regs.b[AL] / 10; nec_state->regs.b[AL] %= 10; SetSZPF_Word(nec_state->regs.w[AW]); CLKS(15,15,12); }
910		OP( 0xd5, i_aad ) { UINT32 mult=FETCH(); mult=0; nec_state->regs.b[AL] = nec_state->regs.b[AH] * 10 + nec_state->regs.b[AL]; nec_state->regs.b[AH] = 0; SetSZPF_Byte(nec_state->regs.b[AL]); CLKS(7,7,8); }
911		OP( 0xd6, i_setalc ) { nec_state->regs.b[AL] = (CF)?0xff:0x00; nec_state->icount-=3; logerror("%06x: Undefined opcode (SETALC)\n",PC(nec_state)); }
912		OP( 0xd7, i_trans ) { UINT32 dest = (nec_state->regs.w[BW]+nec_state->regs.b[AL])&0xffff; nec_state->regs.b[AL] = GetMemB(DS0, dest); CLKS(9,9,5); }
913		OP( 0xd8, i_fpo ) { GetModRM; nec_state->icount-=2; logerror("%06x: Unimplemented floating point control %04x\n",PC(nec_state),ModRM); }
914
915		OP( 0xe0, i_loopne ) { INT8 disp = (INT8)FETCH(); nec_state->regs.w[CW]--; if (!ZF && nec_state->regs.w[CW]) { nec_state->ip = (WORD)(nec_state->ip+disp); /CHANGE_PC;/ CLKS(14,14,6); } else CLKS(5,5,3); }
916		OP( 0xe1, i_loope ) { INT8 disp = (INT8)FETCH(); nec_state->regs.w[CW]--; if ( ZF && nec_state->regs.w[CW]) { nec_state->ip = (WORD)(nec_state->ip+disp); /CHANGE_PC;/ CLKS(14,14,6); } else CLKS(5,5,3); }
917		OP( 0xe2, i_loop ) { INT8 disp = (INT8)FETCH(); nec_state->regs.w[CW]--; if (nec_state->regs.w[CW]) { nec_state->ip = (WORD)(nec_state->ip+disp); /CHANGE_PC;/ CLKS(13,13,6); } else CLKS(5,5,3); }
918		OP( 0xe3, i_jcxz ) { INT8 disp = (INT8)FETCH(); if (nec_state->regs.w[CW] == 0) { nec_state->ip = (WORD)(nec_state->ip+disp); /CHANGE_PC;/ CLKS(13,13,6); } else CLKS(5,5,3); }
919		OP( 0xe4, i_inal ) { UINT8 port = FETCH(); nec_state->regs.b[AL] = read_port_byte(port); CLKS(9,9,5); }
920		OP( 0xe5, i_inax ) { UINT8 port = FETCH(); nec_state->regs.w[AW] = read_port_word(port); CLKW(13,13,7,13,9,5,port); }
921		OP( 0xe6, i_outal ) { UINT8 port = FETCH(); write_port_byte(port, nec_state->regs.b[AL]); CLKS(8,8,3); }
922		OP( 0xe7, i_outax ) { UINT8 port = FETCH(); write_port_word(port, nec_state->regs.w[AW]); CLKW(12,12,5,12,8,3,port); }
923
924		OP( 0xe8, i_call_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(nec_state->ip); nec_state->ip = (WORD)(nec_state->ip+(INT16)tmp); CHANGE_PC; nec_state->icount-=24; }
925		OP( 0xe9, i_jmp_d16 ) { UINT32 tmp; tmp = FETCHWORD(); nec_state->ip = (WORD)(nec_state->ip+(INT16)tmp); CHANGE_PC; nec_state->icount-=15; }
926		OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; tmp = FETCHWORD(); tmp1 = FETCHWORD(); nec_state->sregs[PS] = (WORD)tmp1; nec_state->ip = (WORD)tmp; CHANGE_PC; nec_state->icount-=27; }
927		OP( 0xeb, i_jmp_d8 ) { int tmp = (int)((INT8)FETCH()); nec_state->icount-=12; nec_state->ip = (WORD)(nec_state->ip+tmp); }
928		OP( 0xec, i_inaldx ) { nec_state->regs.b[AL] = read_port_byte(nec_state->regs.w[DW]); CLKS(8,8,5);}
929		OP( 0xed, i_inaxdx ) { nec_state->regs.w[AW] = read_port_word(nec_state->regs.w[DW]); CLKW(12,12,7,12,8,5,nec_state->regs.w[DW]); }
930		OP( 0xee, i_outdxal ) { write_port_byte(nec_state->regs.w[DW], nec_state->regs.b[AL]); CLKS(8,8,3); }
931		OP( 0xef, i_outdxax ) { write_port_word(nec_state->regs.w[DW], nec_state->regs.w[AW]); CLKW(12,12,5,12,8,3,nec_state->regs.w[DW]); }
932
933		OP( 0xf0, i_lock ) { logerror("%06x: Warning - BUSLOCK\n",PC(nec_state)); nec_state->no_interrupt=1; CLK(2); }
934		OP( 0xf2, i_repne ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->regs.w[CW];
935		switch(next) { /* Segments */
936		case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS1]<<4; next = fetchop(nec_state); CLK(2); break;
937		case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[PS]<<4; next = fetchop(nec_state); CLK(2); break;
938		case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[SS]<<4; next = fetchop(nec_state); CLK(2); break;
939		case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS0]<<4; next = fetchop(nec_state); CLK(2); break;
940		}
941
942		switch(next) {
943		case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
944		case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
945		case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
946		case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
947		case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
948		case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
949		case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && ZF==0); nec_state->regs.w[CW]=c; break;
950		case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && ZF==0); nec_state->regs.w[CW]=c; break;
951		case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
952		case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
953		case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
954		case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
955		case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && ZF==0); nec_state->regs.w[CW]=c; break;
956		case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && ZF==0); nec_state->regs.w[CW]=c; break;
957		default: logerror("%06x: REPNE invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
958		}
959		nec_state->seg_prefix=FALSE;
960		}
961		OP( 0xf3, i_repe ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->regs.w[CW];
962		switch(next) { /* Segments */
963		case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS1]<<4; next = fetchop(nec_state); CLK(2); break;
964		case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[PS]<<4; next = fetchop(nec_state); CLK(2); break;
965		case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[SS]<<4; next = fetchop(nec_state); CLK(2); break;
966		case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS0]<<4; next = fetchop(nec_state); CLK(2); break;
967		}
968
969		switch(next) {
970		case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
971		case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
972		case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
973		case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
974		case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
975		case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
976		case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && ZF==1); nec_state->regs.w[CW]=c; break;
977		case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && ZF==1); nec_state->regs.w[CW]=c; break;
978		case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
979		case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
980		case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
981		case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0); nec_state->regs.w[CW]=c; break;
982		case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && ZF==1); nec_state->regs.w[CW]=c; break;
983		case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && ZF==1); nec_state->regs.w[CW]=c; break;
984		default: logerror("%06x: REPE invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
985		}
986		nec_state->seg_prefix=FALSE;
987		}
988		OP( 0xf4, i_hlt ) { logerror("%06x: HALT\n",PC(nec_state)); nec_state->icount=0; }
989		OP( 0xf5, i_cmc ) { nec_state->CarryVal = !CF; CLK(2); }
990		OP( 0xf6, i_f6pre ) { UINT32 tmp; UINT32 uresult,uresult2; INT32 result,result2;
991		GetModRM; tmp = GetRMByte(ModRM);
992		switch (ModRM & 0x38) {
993		case 0x00: tmp &= FETCH(); nec_state->CarryVal = nec_state->OverVal = 0; SetSZPF_Byte(tmp); nec_state->icount-=(ModRM >=0xc0 )?4:11; break; /* TEST */
994		case 0x08: logerror("%06x: Undefined opcode 0xf6 0x08\n",PC(nec_state)); break;
995		case 0x10: PutbackRMByte(ModRM,~tmp); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */
996		case 0x18: nec_state->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Byte(tmp); PutbackRMByte(ModRM,tmp&0xff); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NEG */
997		case 0x20: uresult = nec_state->regs.b[AL]tmp; nec_state->regs.w[AW]=(WORD)uresult; nec_state->CarryVal=nec_state->OverVal=(nec_state->regs.b[AH]!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; / MULU */
998		case 0x28: result = (INT16)((INT8)nec_state->regs.b[AL])(INT16)((INT8)tmp); nec_state->regs.w[AW]=(WORD)result; nec_state->CarryVal=nec_state->OverVal=(nec_state->regs.b[AH]!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; / MUL */
999		case 0x30: if (tmp) { DIVUB; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break;
1000		case 0x38: if (tmp) { DIVB; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break;
1001		}
1002		}
1003
1004		OP( 0xf7, i_f7pre ) { UINT32 tmp,tmp2; UINT32 uresult,uresult2; INT32 result,result2;
1005		GetModRM; tmp = GetRMWord(ModRM);
1006		switch (ModRM & 0x38) {
1007		case 0x00: tmp2 = FETCHWORD(); tmp &= tmp2; nec_state->CarryVal = nec_state->OverVal = 0; SetSZPF_Word(tmp); nec_state->icount-=(ModRM >=0xc0 )?4:11; break; /* TEST */
1008		case 0x08: logerror("%06x: Undefined opcode 0xf7 0x08\n",PC(nec_state)); break;
1009		case 0x10: PutbackRMWord(ModRM,~tmp); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */
1010		case 0x18: nec_state->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Word(tmp); PutbackRMWord(ModRM,tmp&0xffff); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NEG */
1011		case 0x20: uresult = nec_state->regs.w[AW]tmp; nec_state->regs.w[AW]=uresult&0xffff; nec_state->regs.w[DW]=((UINT32)uresult)>>16; nec_state->CarryVal=nec_state->OverVal=(nec_state->regs.w[DW]!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; / MULU */
1012		case 0x28: result = (INT32)((INT16)nec_state->regs.w[AW])(INT32)((INT16)tmp); nec_state->regs.w[AW]=result&0xffff; nec_state->regs.w[DW]=result>>16; nec_state->CarryVal=nec_state->OverVal=(nec_state->regs.w[DW]!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; / MUL */
1013		case 0x30: if (tmp) { DIVUW; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break;
1014		case 0x38: if (tmp) { DIVW; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break;
1015		}
1016		}
1017
1018		OP( 0xf8, i_clc ) { nec_state->CarryVal = 0; CLK(2); }
1019		OP( 0xf9, i_stc ) { nec_state->CarryVal = 1; CLK(2); }
1020		OP( 0xfa, i_di ) { SetIF(0); CLK(2); }
1021		OP( 0xfb, i_ei ) { SetIF(1); CLK(2); }
1022		OP( 0xfc, i_cld ) { SetDF(0); CLK(2); }
1023		OP( 0xfd, i_std ) { SetDF(1); CLK(2); }
1024		OP( 0xfe, i_fepre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMByte(ModRM);
1025		switch(ModRM & 0x38) {
1026		case 0x00: tmp1 = tmp+1; nec_state->OverVal = (tmp==0x7f); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(2,2,2,16,16,7); break; /* INC */
1027		case 0x08: tmp1 = tmp-1; nec_state->OverVal = (tmp==0x80); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(2,2,2,16,16,7); break; /* DEC */
1028		default: logerror("%06x: FE Pre with unimplemented mod\n",PC(nec_state));
1029		}
1030		}
1031		OP( 0xff, i_ffpre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMWord(ModRM);
1032		switch(ModRM & 0x38) {
1033		case 0x00: tmp1 = tmp+1; nec_state->OverVal = (tmp==0x7fff); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(2,2,2,24,16,7); break; /* INC */
1034		case 0x08: tmp1 = tmp-1; nec_state->OverVal = (tmp==0x8000); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(2,2,2,24,16,7); break; /* DEC */
1035		case 0x10: PUSH(nec_state->ip); nec_state->ip = (WORD)tmp; CHANGE_PC; nec_state->icount-=(ModRM >=0xc0 )?16:20; break; /* CALL */
1036		case 0x18: tmp1 = nec_state->sregs[PS]; nec_state->sregs[PS] = GetnextRMWord; PUSH(tmp1); PUSH(nec_state->ip); nec_state->ip = tmp; CHANGE_PC; nec_state->icount-=(ModRM >=0xc0 )?16:26; break; /* CALL FAR */
1037		case 0x20: nec_state->ip = tmp; CHANGE_PC; nec_state->icount-=13; break; /* JMP */
1038		case 0x28: nec_state->ip = tmp; nec_state->sregs[PS] = GetnextRMWord; CHANGE_PC; nec_state->icount-=15; break; /* JMP FAR */
1039		case 0x30: PUSH(tmp); nec_state->icount-=4; break;
1040		default: logerror("%06x: FF Pre with unimplemented mod\n",PC(nec_state));
1041		}
1042		}
1043
1044		static void i_invalid(nec_state_t *nec_state)
1045		{
1046		nec_state->icount-=10;
1047		logerror("%06x: Invalid Opcode\n",PC(nec_state));
1048		}
1049
1050	316	/*****************************************************************************/
1051	317
1052	318	static void set_irq_line(nec_state_t *nec_state, int irqline, int state)
r9812	r9813
1083	349
1084	350	static CPU_DISASSEMBLE( nec )
1085	351	{
1086		nec_state_t *nec_state = get_safe_token(device);
1087
1088		return necv_dasm_one(buffer, pc, oprom, nec_state->config);
	352	return necv_dasm_one(buffer, pc, oprom, NULL);
1089	353	}
1090	354
1091	355	static void nec_init(legacy_cpu_device *device, device_irq_callback irqcallback, int type)
1092	356	{
1093		const nec_config config = device->baseconfig().static_config() ? (const nec_config )device->baseconfig().static_config() : &default_config;
1094	357	nec_state_t *nec_state = get_safe_token(device);
1095	358
1096		nec_state->config = config;
1097
1098
1099	359	state_save_register_device_item_array(device, 0, nec_state->regs.w);
1100	360	state_save_register_device_item_array(device, 0, nec_state->sregs);
1101	361
r9812	r9813
1144	404	if (nec_state->no_interrupt)
1145	405	nec_state->no_interrupt--;
1146	406
1147		debugger_instruction_hook(device, (~~nec_state->s~~regs[PS]<<4) + nec_state->ip);
	407	debugger_instruction_hook(device, (Sreg(PS)<<4) + nec_state->ip);
1148	408	prev_ICount = nec_state->icount;
1149	409	nec_instruction[fetchop(nec_state)](nec_state);
1150	410	do_prefetch(nec_state, prev_ICount);
r9812	r9813
1209	469
1210	470	case CPUINFO_INT_PC:
1211	471	case CPUINFO_INT_REGISTER + NEC_PC:
1212		if( info->i - (~~nec_state->s~~regs[PS]<<4) < 0x10000 )
	472	if( info->i - (Sreg(PS)<<4) < 0x10000 )
1213	473	{
1214		nec_state->ip = info->i - (~~nec_state->s~~regs[PS]<<4);
	474	nec_state->ip = info->i - (Sreg(PS)<<4);
1215	475	}
1216	476	else
1217	477	{
1218		~~nec_state->s~~regs[PS] = info->i >> 4;
	478	Sreg(PS) = info->i >> 4;
1219	479	nec_state->ip = info->i & 0x0000f;
1220	480	}
1221	481	break;
1222	482	case CPUINFO_INT_REGISTER + NEC_IP: nec_state->ip = info->i; break;
1223	483	case CPUINFO_INT_SP:
1224		if( info->i - (~~nec_state->s~~regs[SS]<<4) < 0x10000 )
	484	if( info->i - (Sreg(SS)<<4) < 0x10000 )
1225	485	{
1226		~~nec_state->~~reg~~s.w[~~SP] = info->i - (~~nec_state->s~~regs[SS]<<4);
	486	Wreg(SP) = info->i - (Sreg(SS)<<4);
1227	487	}
1228	488	else
1229	489	{
1230		nec_state->sregs[SS] = info->i >> 4;
1231		nec_state->regs.w[SP] = info->i & 0x0000f;
	490	Sreg(SS) = info->i >> 4;
	491	Wreg(SP) = info->i & 0x0000f;
1232	492	}
1233	493	break;
1234		case CPUINFO_INT_REGISTER + NEC_SP: ~~nec_state->~~reg~~s.w[~~SP] = info->i; break;
	494	case CPUINFO_INT_REGISTER + NEC_SP: Wreg(SP) = info->i; break;
1235	495	case CPUINFO_INT_REGISTER + NEC_FLAGS: ExpandFlags(info->i); break;
1236		case CPUINFO_INT_REGISTER + NEC_AW: nec_state->regs.w[AW] = info->i; break;
1237		case CPUINFO_INT_REGISTER + NEC_CW: nec_state->regs.w[CW] = info->i; break;
1238		case CPUINFO_INT_REGISTER + NEC_DW: nec_state->regs.w[DW] = info->i; break;
1239		case CPUINFO_INT_REGISTER + NEC_BW: nec_state->regs.w[BW] = info->i; break;
1240		case CPUINFO_INT_REGISTER + NEC_BP: nec_state->regs.w[BP] = info->i; break;
1241		case CPUINFO_INT_REGISTER + NEC_IX: nec_state->regs.w[IX] = info->i; break;
1242		case CPUINFO_INT_REGISTER + NEC_IY: nec_state->regs.w[IY] = info->i; break;
1243		case CPUINFO_INT_REGISTER + NEC_ES: nec_state->sregs[DS1] = info->i; break;
1244		case CPUINFO_INT_REGISTER + NEC_CS: nec_state->sregs[PS] = info->i; break;
1245		case CPUINFO_INT_REGISTER + NEC_SS: nec_state->sregs[SS] = info->i; break;
1246		case CPUINFO_INT_REGISTER + NEC_DS: nec_state->sregs[DS0] = info->i; break;
	496	case CPUINFO_INT_REGISTER + NEC_AW: Wreg(AW) = info->i; break;
	497	case CPUINFO_INT_REGISTER + NEC_CW: Wreg(CW) = info->i; break;
	498	case CPUINFO_INT_REGISTER + NEC_DW: Wreg(DW) = info->i; break;
	499	case CPUINFO_INT_REGISTER + NEC_BW: Wreg(BW) = info->i; break;
	500	case CPUINFO_INT_REGISTER + NEC_BP: Wreg(BP) = info->i; break;
	501	case CPUINFO_INT_REGISTER + NEC_IX: Wreg(IX) = info->i; break;
	502	case CPUINFO_INT_REGISTER + NEC_IY: Wreg(IY) = info->i; break;
	503	case CPUINFO_INT_REGISTER + NEC_ES: Sreg(DS1) = info->i; break;
	504	case CPUINFO_INT_REGISTER + NEC_CS: Sreg(PS) = info->i; break;
	505	case CPUINFO_INT_REGISTER + NEC_SS: Sreg(SS) = info->i; break;
	506	case CPUINFO_INT_REGISTER + NEC_DS: Sreg(DS0) = info->i; break;
1247	507	case CPUINFO_INT_REGISTER + NEC_VECTOR: nec_state->int_vector = info->i; break;
1248	508	}
1249	509	}
r9812	r9813
1290	550	case CPUINFO_INT_PREVIOUSPC: /* not supported */ break;
1291	551
1292	552	case CPUINFO_INT_PC:
1293		case CPUINFO_INT_REGISTER + NEC_PC: info->i = ((~~nec_state->s~~regs[PS]<<4) + nec_state->ip); break;
	553	case CPUINFO_INT_REGISTER + NEC_PC: info->i = ((Sreg(PS)<<4) + nec_state->ip); break;
1294	554	case CPUINFO_INT_REGISTER + NEC_IP: info->i = nec_state->ip; break;
1295		case CPUINFO_INT_SP: info->i = (nec_state->sregs[SS]<<4) + nec_state->regs.w[SP]; break;
1296		case CPUINFO_INT_REGISTER + NEC_SP: info->i = nec_state->regs.w[SP]; break;
	555	case CPUINFO_INT_SP: info->i = (Sreg(SS)<<4) + Wreg(SP); break;
	556	case CPUINFO_INT_REGISTER + NEC_SP: info->i = Wreg(SP); break;
1297	557	case CPUINFO_INT_REGISTER + NEC_FLAGS: info->i = CompressFlags(); break;
1298		case CPUINFO_INT_REGISTER + NEC_AW: info->i = nec_state->regs.w[AW]; break;
1299		case CPUINFO_INT_REGISTER + NEC_CW: info->i = nec_state->regs.w[CW]; break;
1300		case CPUINFO_INT_REGISTER + NEC_DW: info->i = nec_state->regs.w[DW]; break;
1301		case CPUINFO_INT_REGISTER + NEC_BW: info->i = nec_state->regs.w[BW]; break;
1302		case CPUINFO_INT_REGISTER + NEC_BP: info->i = nec_state->regs.w[BP]; break;
1303		case CPUINFO_INT_REGISTER + NEC_IX: info->i = nec_state->regs.w[IX]; break;
1304		case CPUINFO_INT_REGISTER + NEC_IY: info->i = nec_state->regs.w[IY]; break;
1305		case CPUINFO_INT_REGISTER + NEC_ES: info->i = nec_state->sregs[DS1]; break;
1306		case CPUINFO_INT_REGISTER + NEC_CS: info->i = nec_state->sregs[PS]; break;
1307		case CPUINFO_INT_REGISTER + NEC_SS: info->i = nec_state->sregs[SS]; break;
1308		case CPUINFO_INT_REGISTER + NEC_DS: info->i = nec_state->sregs[DS0]; break;
	558	case CPUINFO_INT_REGISTER + NEC_AW: info->i = Wreg(AW); break;
	559	case CPUINFO_INT_REGISTER + NEC_CW: info->i = Wreg(CW); break;
	560	case CPUINFO_INT_REGISTER + NEC_DW: info->i = Wreg(DW); break;
	561	case CPUINFO_INT_REGISTER + NEC_BW: info->i = Wreg(BW); break;
	562	case CPUINFO_INT_REGISTER + NEC_BP: info->i = Wreg(BP); break;
	563	case CPUINFO_INT_REGISTER + NEC_IX: info->i = Wreg(IX); break;
	564	case CPUINFO_INT_REGISTER + NEC_IY: info->i = Wreg(IY); break;
	565	case CPUINFO_INT_REGISTER + NEC_ES: info->i = Sreg(DS1); break;
	566	case CPUINFO_INT_REGISTER + NEC_CS: info->i = Sreg(PS); break;
	567	case CPUINFO_INT_REGISTER + NEC_SS: info->i = Sreg(SS); break;
	568	case CPUINFO_INT_REGISTER + NEC_DS: info->i = Sreg(DS0); break;
1309	569	case CPUINFO_INT_REGISTER + NEC_VECTOR: info->i = nec_state->int_vector; break;
1310	570	case CPUINFO_INT_REGISTER + NEC_PENDING: info->i = nec_state->pending_irq; break;
1311	571
r9812	r9813
1329	589	case CPUINFO_STR_FLAGS:
1330	590	flags = CompressFlags();
1331	591	sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
1332		flags & 0x8000 ? 'M':'.',
	592	flags & 0x8000 ? 'N':'E',
1333	593	flags & 0x4000 ? '?':'.',
1334	594	flags & 0x2000 ? '?':'.',
1335	595	flags & 0x1000 ? '?':'.',
r9812	r9813
1343	603	flags & 0x0010 ? 'A':'.',
1344	604	flags & 0x0008 ? '?':'.',
1345	605	flags & 0x0004 ? 'P':'.',
1346		flags & 0x0002 ? 'N':'.',
	606	flags & 0x0002 ? '.':'?',
1347	607	flags & 0x0001 ? 'C':'.');
1348	608	break;
1349	609
1350		case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s, "PC:%04X", (~~nec_state->s~~regs[PS]<<4) + nec_state->ip); break;
	610	case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s, "PC:%04X", (Sreg(PS)<<4) + nec_state->ip); break;
1351	611	case CPUINFO_STR_REGISTER + NEC_IP: sprintf(info->s, "IP:%04X", nec_state->ip); break;
1352		case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s, "SP:%04X", ~~nec_state->~~reg~~s.w[~~SP]); break;
	612	case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s, "SP:%04X", Wreg(SP)); break;
1353	613	case CPUINFO_STR_REGISTER + NEC_FLAGS: sprintf(info->s, "F:%04X", CompressFlags()); break;
1354		case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s, "AW:%04X", nec_state->regs.w[AW]); break;
1355		case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s, "CW:%04X", nec_state->regs.w[CW]); break;
1356		case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s, "DW:%04X", nec_state->regs.w[DW]); break;
1357		case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s, "BW:%04X", nec_state->regs.w[BW]); break;
1358		case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s, "BP:%04X", nec_state->regs.w[BP]); break;
1359		case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s, "IX:%04X", nec_state->regs.w[IX]); break;
1360		case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s, "IY:%04X", nec_state->regs.w[IY]); break;
1361		case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s, "DS1:%04X", nec_state->sregs[DS1]); break;
1362		case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s, "PS:%04X", nec_state->sregs[PS]); break;
1363		case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s, "SS:%04X", nec_state->sregs[SS]); break;
1364		case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s, "DS0:%04X", nec_state->sregs[DS0]); break;
	614	case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s, "AW:%04X", Wreg(AW)); break;
	615	case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s, "CW:%04X", Wreg(CW)); break;
	616	case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s, "DW:%04X", Wreg(DW)); break;
	617	case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s, "BW:%04X", Wreg(BW)); break;
	618	case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s, "BP:%04X", Wreg(BP)); break;
	619	case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s, "IX:%04X", Wreg(IX)); break;
	620	case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s, "IY:%04X", Wreg(IY)); break;
	621	case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s, "DS1:%04X", Sreg(DS1)); break;
	622	case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s, "PS:%04X", Sreg(PS)); break;
	623	case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s, "SS:%04X", Sreg(SS)); break;
	624	case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s, "DS0:%04X", Sreg(DS0)); break;
1365	625	case CPUINFO_STR_REGISTER + NEC_VECTOR: sprintf(info->s, "V:%02X", nec_state->int_vector); break;
1366	626	}
1367	627	}
r9812	r9813
1394	654	* CPU-specific set_info
1395	655	**************************************************************************/
1396	656
1397		CPU_GET_INFO( v25 )
1398		{
1399		switch (state)
1400		{
1401		/* --- the following bits of info are returned as 64-bit signed integers --- */
1402		case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
1403		case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
1404
1405		/* --- the following bits of info are returned as pointers to data or functions --- */
1406		case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v20); break;
1407
1408		/* --- the following bits of info are returned as NULL-terminated strings --- */
1409		case DEVINFO_STR_NAME: strcpy(info->s, "V25"); break;
1410
1411		default: CPU_GET_INFO_CALL(nec); break;
1412		}
1413		}
1414
1415
1416		/**************************************************************************
1417		* CPU-specific set_info
1418		**************************************************************************/
1419
1420	657	CPU_GET_INFO( v30 )
1421	658	{
1422	659	switch (state)
r9812	r9813
1450	687	}
1451	688	}
1452	689
1453
1454		/**************************************************************************
1455		* CPU-specific set_info
1456		**************************************************************************/
1457
1458		CPU_GET_INFO( v35 )
1459		{
1460		switch (state)
1461		{
1462		/* --- the following bits of info are returned as pointers to data or functions --- */
1463		case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v30); break;
1464
1465		/* --- the following bits of info are returned as NULL-terminated strings --- */
1466		case DEVINFO_STR_NAME: strcpy(info->s, "V35"); break;
1467
1468		default: CPU_GET_INFO_CALL(nec); break;
1469		}
1470		}
1471
1472	690	DEFINE_LEGACY_CPU_DEVICE(V20, v20);
1473		DEFINE_LEGACY_CPU_DEVICE(V25, v25);
1474	691	DEFINE_LEGACY_CPU_DEVICE(V30, v30);
1475	692	DEFINE_LEGACY_CPU_DEVICE(V33, v33);
1476		DEFINE_LEGACY_CPU_DEVICE(V35, v35);

src/emu/cpu/nec/necinstr.c
r0	r9813
	1	#define OP(num,func_name) static void func_name(nec_state_t *nec_state)
	2
	3	OP( 0x00, i_add_br8 ) { DEF_br8; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
	4	OP( 0x01, i_add_wr16 ) { DEF_wr16; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
	5	OP( 0x02, i_add_r8b ) { DEF_r8b; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
	6	OP( 0x03, i_add_r16w ) { DEF_r16w; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
	7	OP( 0x04, i_add_ald8 ) { DEF_ald8; ADDB; Breg(AL)=dst; CLKS(4,4,2); }
	8	OP( 0x05, i_add_axd16) { DEF_axd16; ADDW; Wreg(AW)=dst; CLKS(4,4,2); }
	9	OP( 0x06, i_push_es ) { PUSH(Sreg(DS1)); CLKS(12,8,3); }
	10	OP( 0x07, i_pop_es ) { POP(Sreg(DS1)); CLKS(12,8,5); }
	11
	12	OP( 0x08, i_or_br8 ) { DEF_br8; ORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
	13	OP( 0x09, i_or_wr16 ) { DEF_wr16; ORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
	14	OP( 0x0a, i_or_r8b ) { DEF_r8b; ORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
	15	OP( 0x0b, i_or_r16w ) { DEF_r16w; ORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
	16	OP( 0x0c, i_or_ald8 ) { DEF_ald8; ORB; Breg(AL)=dst; CLKS(4,4,2); }
	17	OP( 0x0d, i_or_axd16 ) { DEF_axd16; ORW; Wreg(AW)=dst; CLKS(4,4,2); }
	18	OP( 0x0e, i_push_cs ) { PUSH(Sreg(PS)); CLKS(12,8,3); }
	19	OP( 0x0f, i_pre_nec ) { UINT32 ModRM, tmp, tmp2;
	20	switch (FETCH()) {
	21	case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = Breg(CL) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
	22	case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = Breg(CL) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
	23	case 0x12 : BITOP_BYTE; CLKS(5,5,4); tmp2 = Breg(CL) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
	24	case 0x13 : BITOP_WORD; CLKS(5,5,4); tmp2 = Breg(CL) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
	25	case 0x14 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; tmp \|= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
	26	case 0x15 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; tmp \|= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
	27	case 0x16 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
	28	case 0x17 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
	29
	30	case 0x18 : BITOP_BYTE; CLKS(4,4,4); tmp2 = (FETCH()) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
	31	case 0x19 : BITOP_WORD; CLKS(4,4,4); tmp2 = (FETCH()) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
	32	case 0x1a : BITOP_BYTE; CLKS(6,6,4); tmp2 = (FETCH()) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
	33	case 0x1b : BITOP_WORD; CLKS(6,6,4); tmp2 = (FETCH()) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
	34	case 0x1c : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; tmp \|= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
	35	case 0x1d : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; tmp \|= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
	36	case 0x1e : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
	37	case 0x1f : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
	38
	39	case 0x20 : ADD4S; CLKS(7,7,2); break;
	40	case 0x22 : SUB4S; CLKS(7,7,2); break;
	41	case 0x26 : CMP4S; CLKS(7,7,2); break;
	42	case 0x28 : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp <<= 4; tmp \|= Breg(AL) & 0xf; Breg(AL) = (Breg(AL) & 0xf0) \| ((tmp>>8)&0xf); tmp &= 0xff; PutbackRMByte(ModRM,tmp); CLKM(13,13,9,28,28,15); break;
	43	case 0x2a : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp2 = (Breg(AL) & 0xf)<<4; Breg(AL) = (Breg(AL) & 0xf0) \| (tmp&0xf); tmp = tmp2 \| (tmp>>4); PutbackRMByte(ModRM,tmp); CLKM(17,17,13,32,32,19); break;
	44	case 0x31 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield INS\n",PC(nec_state)); break;
	45	case 0x33 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield EXT\n",PC(nec_state)); break;
	46	case 0x92 : CLK(2); break; /* V25/35 FINT */
	47	case 0xe0 : ModRM = FETCH(); ModRM=0; logerror("%06x: V33 unimplemented BRKXA (break to expansion address)\n",PC(nec_state)); break;
	48	case 0xf0 : ModRM = FETCH(); ModRM=0; logerror("%06x: V33 unimplemented RETXA (return from expansion address)\n",PC(nec_state)); break;
	49	case 0xff : ModRM = FETCH(); ModRM=0; logerror("%06x: unimplemented BRKEM (break to 8080 emulation mode)\n",PC(nec_state)); break;
	50	default: logerror("%06x: Unknown V20 instruction\n",PC(nec_state)); break;
	51	}
	52	}
	53
	54	OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
	55	OP( 0x11, i_adc_wr16 ) { DEF_wr16; src+=CF; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
	56	OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
	57	OP( 0x13, i_adc_r16w ) { DEF_r16w; src+=CF; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
	58	OP( 0x14, i_adc_ald8 ) { DEF_ald8; src+=CF; ADDB; Breg(AL)=dst; CLKS(4,4,2); }
	59	OP( 0x15, i_adc_axd16) { DEF_axd16; src+=CF; ADDW; Wreg(AW)=dst; CLKS(4,4,2); }
	60	OP( 0x16, i_push_ss ) { PUSH(Sreg(SS)); CLKS(12,8,3); }
	61	OP( 0x17, i_pop_ss ) { POP(Sreg(SS)); CLKS(12,8,5); nec_state->no_interrupt=1; }
	62
	63	OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
	64	OP( 0x19, i_sbb_wr16 ) { DEF_wr16; src+=CF; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
	65	OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
	66	OP( 0x1b, i_sbb_r16w ) { DEF_r16w; src+=CF; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
	67	OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; src+=CF; SUBB; Breg(AL)=dst; CLKS(4,4,2); }
	68	OP( 0x1d, i_sbb_axd16) { DEF_axd16; src+=CF; SUBW; Wreg(AW)=dst; CLKS(4,4,2); }
	69	OP( 0x1e, i_push_ds ) { PUSH(Sreg(DS0)); CLKS(12,8,3); }
	70	OP( 0x1f, i_pop_ds ) { POP(Sreg(DS0)); CLKS(12,8,5); }
	71
	72	OP( 0x20, i_and_br8 ) { DEF_br8; ANDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
	73	OP( 0x21, i_and_wr16 ) { DEF_wr16; ANDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
	74	OP( 0x22, i_and_r8b ) { DEF_r8b; ANDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
	75	OP( 0x23, i_and_r16w ) { DEF_r16w; ANDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
	76	OP( 0x24, i_and_ald8 ) { DEF_ald8; ANDB; Breg(AL)=dst; CLKS(4,4,2); }
	77	OP( 0x25, i_and_axd16) { DEF_axd16; ANDW; Wreg(AW)=dst; CLKS(4,4,2); }
	78	OP( 0x26, i_es ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
	79	OP( 0x27, i_daa ) { ADJ4(6,0x60); CLKS(3,3,2); }
	80
	81	OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
	82	OP( 0x29, i_sub_wr16 ) { DEF_wr16; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
	83	OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
	84	OP( 0x2b, i_sub_r16w ) { DEF_r16w; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
	85	OP( 0x2c, i_sub_ald8 ) { DEF_ald8; SUBB; Breg(AL)=dst; CLKS(4,4,2); }
	86	OP( 0x2d, i_sub_axd16) { DEF_axd16; SUBW; Wreg(AW)=dst; CLKS(4,4,2); }
	87	OP( 0x2e, i_cs ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
	88	OP( 0x2f, i_das ) { ADJ4(-6,-0x60); CLKS(3,3,2); }
	89
	90	OP( 0x30, i_xor_br8 ) { DEF_br8; XORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
	91	OP( 0x31, i_xor_wr16 ) { DEF_wr16; XORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
	92	OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
	93	OP( 0x33, i_xor_r16w ) { DEF_r16w; XORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
	94	OP( 0x34, i_xor_ald8 ) { DEF_ald8; XORB; Breg(AL)=dst; CLKS(4,4,2); }
	95	OP( 0x35, i_xor_axd16) { DEF_axd16; XORW; Wreg(AW)=dst; CLKS(4,4,2); }
	96	OP( 0x36, i_ss ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
	97	OP( 0x37, i_aaa ) { ADJB(6, (Breg(AL) > 0xf9) ? 2 : 1); CLKS(7,7,4); }
	98
	99	OP( 0x38, i_cmp_br8 ) { DEF_br8; SUBB; CLKM(2,2,2,11,11,6); }
	100	OP( 0x39, i_cmp_wr16 ) { DEF_wr16; SUBW; CLKR(15,15,8,15,11,6,2,EA);}
	101	OP( 0x3a, i_cmp_r8b ) { DEF_r8b; SUBB; CLKM(2,2,2,11,11,6); }
	102	OP( 0x3b, i_cmp_r16w ) { DEF_r16w; SUBW; CLKR(15,15,8,15,11,6,2,EA); }
	103	OP( 0x3c, i_cmp_ald8 ) { DEF_ald8; SUBB; CLKS(4,4,2); }
	104	OP( 0x3d, i_cmp_axd16) { DEF_axd16; SUBW; CLKS(4,4,2); }
	105	OP( 0x3e, i_ds ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
	106	OP( 0x3f, i_aas ) { ADJB(-6, (Breg(AL) < 6) ? -2 : -1); CLKS(7,7,4); }
	107
	108	OP( 0x40, i_inc_ax ) { IncWordReg(AW); CLK(2); }
	109	OP( 0x41, i_inc_cx ) { IncWordReg(CW); CLK(2); }
	110	OP( 0x42, i_inc_dx ) { IncWordReg(DW); CLK(2); }
	111	OP( 0x43, i_inc_bx ) { IncWordReg(BW); CLK(2); }
	112	OP( 0x44, i_inc_sp ) { IncWordReg(SP); CLK(2); }
	113	OP( 0x45, i_inc_bp ) { IncWordReg(BP); CLK(2); }
	114	OP( 0x46, i_inc_si ) { IncWordReg(IX); CLK(2); }
	115	OP( 0x47, i_inc_di ) { IncWordReg(IY); CLK(2); }
	116
	117	OP( 0x48, i_dec_ax ) { DecWordReg(AW); CLK(2); }
	118	OP( 0x49, i_dec_cx ) { DecWordReg(CW); CLK(2); }
	119	OP( 0x4a, i_dec_dx ) { DecWordReg(DW); CLK(2); }
	120	OP( 0x4b, i_dec_bx ) { DecWordReg(BW); CLK(2); }
	121	OP( 0x4c, i_dec_sp ) { DecWordReg(SP); CLK(2); }
	122	OP( 0x4d, i_dec_bp ) { DecWordReg(BP); CLK(2); }
	123	OP( 0x4e, i_dec_si ) { DecWordReg(IX); CLK(2); }
	124	OP( 0x4f, i_dec_di ) { DecWordReg(IY); CLK(2); }
	125
	126	OP( 0x50, i_push_ax ) { PUSH(Wreg(AW)); CLKS(12,8,3); }
	127	OP( 0x51, i_push_cx ) { PUSH(Wreg(CW)); CLKS(12,8,3); }
	128	OP( 0x52, i_push_dx ) { PUSH(Wreg(DW)); CLKS(12,8,3); }
	129	OP( 0x53, i_push_bx ) { PUSH(Wreg(BW)); CLKS(12,8,3); }
	130	OP( 0x54, i_push_sp ) { PUSH(Wreg(SP)); CLKS(12,8,3); }
	131	OP( 0x55, i_push_bp ) { PUSH(Wreg(BP)); CLKS(12,8,3); }
	132	OP( 0x56, i_push_si ) { PUSH(Wreg(IX)); CLKS(12,8,3); }
	133	OP( 0x57, i_push_di ) { PUSH(Wreg(IY)); CLKS(12,8,3); }
	134
	135	OP( 0x58, i_pop_ax ) { POP(Wreg(AW)); CLKS(12,8,5); }
	136	OP( 0x59, i_pop_cx ) { POP(Wreg(CW)); CLKS(12,8,5); }
	137	OP( 0x5a, i_pop_dx ) { POP(Wreg(DW)); CLKS(12,8,5); }
	138	OP( 0x5b, i_pop_bx ) { POP(Wreg(BW)); CLKS(12,8,5); }
	139	OP( 0x5c, i_pop_sp ) { POP(Wreg(SP)); CLKS(12,8,5); }
	140	OP( 0x5d, i_pop_bp ) { POP(Wreg(BP)); CLKS(12,8,5); }
	141	OP( 0x5e, i_pop_si ) { POP(Wreg(IX)); CLKS(12,8,5); }
	142	OP( 0x5f, i_pop_di ) { POP(Wreg(IY)); CLKS(12,8,5); }
	143
	144	OP( 0x60, i_pusha ) {
	145	unsigned tmp=Wreg(SP);
	146	PUSH(Wreg(AW));
	147	PUSH(Wreg(CW));
	148	PUSH(Wreg(DW));
	149	PUSH(Wreg(BW));
	150	PUSH(tmp);
	151	PUSH(Wreg(BP));
	152	PUSH(Wreg(IX));
	153	PUSH(Wreg(IY));
	154	CLKS(67,35,20);
	155	}
	156	OP( 0x61, i_popa ) {
	157	unsigned tmp;
	158	POP(Wreg(IY));
	159	POP(Wreg(IX));
	160	POP(Wreg(BP));
	161	POP(tmp);
	162	POP(Wreg(BW));
	163	POP(Wreg(DW));
	164	POP(Wreg(CW));
	165	POP(Wreg(AW));
	166	CLKS(75,43,22);
	167	}
	168	OP( 0x62, i_chkind ) {
	169	UINT32 low,high,tmp;
	170	GetModRM;
	171	low = GetRMWord(ModRM);
	172	high= GetnextRMWord;
	173	tmp= RegWord(ModRM);
	174	if (tmp<low \|\| tmp>high) {
	175	nec_interrupt(nec_state, 5,0);
	176	}
	177	nec_state->icount-=20;
	178	logerror("%06x: bound %04x high %04x low %04x tmp\n",PC(nec_state),high,low,tmp);
	179	}
	180	OP( 0x64, i_repnc ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
	181	switch(next) { /* Segments */
	182	case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
	183	case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
	184	case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
	185	case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
	186	}
	187
	188	switch(next) {
	189	case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	190	case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	191	case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	192	case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	193	case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	194	case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	195	case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	196	case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	197	case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	198	case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	199	case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	200	case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	201	case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	202	case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
	203	default: logerror("%06x: REPNC invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
	204	}
	205	nec_state->seg_prefix=FALSE;
	206	}
	207
	208	OP( 0x65, i_repc ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
	209	switch(next) { /* Segments */
	210	case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
	211	case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
	212	case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
	213	case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
	214	}
	215
	216	switch(next) {
	217	case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	218	case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	219	case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	220	case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	221	case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	222	case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	223	case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	224	case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	225	case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	226	case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	227	case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	228	case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	229	case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	230	case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
	231	default: logerror("%06x: REPC invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
	232	}
	233	nec_state->seg_prefix=FALSE;
	234	}
	235
	236	OP( 0x68, i_push_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(tmp); CLKW(12,12,5,12,8,5,Wreg(SP)); }
	237	OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; tmp = FETCHWORD(); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?38:47;}
	238	OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH())); PUSH(tmp); CLKW(11,11,5,11,7,3,Wreg(SP)); }
	239	OP( 0x6b, i_imul_d8 ) { UINT32 src2; DEF_r16w; src2= (WORD)((INT16)((INT8)FETCH())); dst = (INT32)((INT16)src)*(INT32)((INT16)src2); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?31:39; }
	240	OP( 0x6c, i_insb ) { PutMemB(DS1,Wreg(IY),read_port_byte(Wreg(DW))); Wreg(IY)+= -2 * nec_state->DF + 1; CLK(8); }
	241	OP( 0x6d, i_insw ) { PutMemW(DS1,Wreg(IY),read_port_word(Wreg(DW))); Wreg(IY)+= -4 * nec_state->DF + 2; CLKS(18,10,8); }
	242	OP( 0x6e, i_outsb ) { write_port_byte(Wreg(DW),GetMemB(DS0,Wreg(IX))); Wreg(IX)+= -2 * nec_state->DF + 1; CLK(8); }
	243	OP( 0x6f, i_outsw ) { write_port_word(Wreg(DW),GetMemW(DS0,Wreg(IX))); Wreg(IX)+= -4 * nec_state->DF + 2; CLKS(18,10,8); }
	244
	245	OP( 0x70, i_jo ) { JMP( OF); CLKS(4,4,3); }
	246	OP( 0x71, i_jno ) { JMP(!OF); CLKS(4,4,3); }
	247	OP( 0x72, i_jc ) { JMP( CF); CLKS(4,4,3); }
	248	OP( 0x73, i_jnc ) { JMP(!CF); CLKS(4,4,3); }
	249	OP( 0x74, i_jz ) { JMP( ZF); CLKS(4,4,3); }
	250	OP( 0x75, i_jnz ) { JMP(!ZF); CLKS(4,4,3); }
	251	OP( 0x76, i_jce ) { JMP(CF \|\| ZF); CLKS(4,4,3); }
	252	OP( 0x77, i_jnce ) { JMP(!(CF \|\| ZF)); CLKS(4,4,3); }
	253	OP( 0x78, i_js ) { JMP( SF); CLKS(4,4,3); }
	254	OP( 0x79, i_jns ) { JMP(!SF); CLKS(4,4,3); }
	255	OP( 0x7a, i_jp ) { JMP( PF); CLKS(4,4,3); }
	256	OP( 0x7b, i_jnp ) { JMP(!PF); CLKS(4,4,3); }
	257	OP( 0x7c, i_jl ) { JMP((SF!=OF)&&(!ZF)); CLKS(4,4,3); }
	258	OP( 0x7d, i_jnl ) { JMP((ZF)\|\|(SF==OF)); CLKS(4,4,3); }
	259	OP( 0x7e, i_jle ) { JMP((ZF)\|\|(SF!=OF)); CLKS(4,4,3); }
	260	OP( 0x7f, i_jnle ) { JMP((SF==OF)&&(!ZF)); CLKS(4,4,3); }
	261
	262	OP( 0x80, i_80pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = FETCH();
	263	if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKS(13,13,6) else CLKS(18,18,7)
	264	switch (ModRM & 0x38) {
	265	case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
	266	case 0x08: ORB; PutbackRMByte(ModRM,dst); break;
	267	case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break;
	268	case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break;
	269	case 0x20: ANDB; PutbackRMByte(ModRM,dst); break;
	270	case 0x28: SUBB; PutbackRMByte(ModRM,dst); break;
	271	case 0x30: XORB; PutbackRMByte(ModRM,dst); break;
	272	case 0x38: SUBB; break; /* CMP */
	273	}
	274	}
	275
	276	OP( 0x81, i_81pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = FETCH(); src+= (FETCH() << 8);
	277	if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKW(17,17,8,17,13,6,EA) else CLKW(26,26,11,26,18,7,EA)
	278	switch (ModRM & 0x38) {
	279	case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
	280	case 0x08: ORW; PutbackRMWord(ModRM,dst); break;
	281	case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break;
	282	case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break;
	283	case 0x20: ANDW; PutbackRMWord(ModRM,dst); break;
	284	case 0x28: SUBW; PutbackRMWord(ModRM,dst); break;
	285	case 0x30: XORW; PutbackRMWord(ModRM,dst); break;
	286	case 0x38: SUBW; break; /* CMP */
	287	}
	288	}
	289
	290	OP( 0x82, i_82pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = (BYTE)((INT8)FETCH());
	291	if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKS(13,13,6) else CLKS(18,18,7)
	292	switch (ModRM & 0x38) {
	293	case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
	294	case 0x08: ORB; PutbackRMByte(ModRM,dst); break;
	295	case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break;
	296	case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break;
	297	case 0x20: ANDB; PutbackRMByte(ModRM,dst); break;
	298	case 0x28: SUBB; PutbackRMByte(ModRM,dst); break;
	299	case 0x30: XORB; PutbackRMByte(ModRM,dst); break;
	300	case 0x38: SUBB; break; /* CMP */
	301	}
	302	}
	303
	304	OP( 0x83, i_83pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = (WORD)((INT16)((INT8)FETCH()));
	305	if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKW(17,17,8,17,13,6,EA) else CLKW(26,26,11,26,18,7,EA)
	306	switch (ModRM & 0x38) {
	307	case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
	308	case 0x08: ORW; PutbackRMWord(ModRM,dst); break;
	309	case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break;
	310	case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break;
	311	case 0x20: ANDW; PutbackRMWord(ModRM,dst); break;
	312	case 0x28: SUBW; PutbackRMWord(ModRM,dst); break;
	313	case 0x30: XORW; PutbackRMWord(ModRM,dst); break;
	314	case 0x38: SUBW; break; /* CMP */
	315	}
	316	}
	317
	318	OP( 0x84, i_test_br8 ) { DEF_br8; ANDB; CLKM(2,2,2,10,10,6); }
	319	OP( 0x85, i_test_wr16 ) { DEF_wr16; ANDW; CLKR(14,14,8,14,10,6,2,EA); }
	320	OP( 0x86, i_xchg_br8 ) { DEF_br8; RegByte(ModRM)=dst; PutbackRMByte(ModRM,src); CLKM(3,3,3,16,18,8); }
	321	OP( 0x87, i_xchg_wr16 ) { DEF_wr16; RegWord(ModRM)=dst; PutbackRMWord(ModRM,src); CLKR(24,24,12,24,16,8,3,EA); }
	322
	323	OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLKM(2,2,2,9,9,3); }
	324	OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLKR(13,13,5,13,9,3,2,EA); }
	325	OP( 0x8a, i_mov_r8b ) { UINT8 src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLKM(2,2,2,11,11,5); }
	326	OP( 0x8b, i_mov_r16w ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); RegWord(ModRM)=src; CLKR(15,15,7,15,11,5,2,EA); }
	327	OP( 0x8c, i_mov_wsreg ) { GetModRM;
	328	switch (ModRM & 0x38) {
	329	case 0x00: PutRMWord(ModRM,Sreg(DS1)); CLKR(14,14,5,14,10,3,2,EA); break;
	330	case 0x08: PutRMWord(ModRM,Sreg(PS)); CLKR(14,14,5,14,10,3,2,EA); break;
	331	case 0x10: PutRMWord(ModRM,Sreg(SS)); CLKR(14,14,5,14,10,3,2,EA); break;
	332	case 0x18: PutRMWord(ModRM,Sreg(DS0)); CLKR(14,14,5,14,10,3,2,EA); break;
	333	default: logerror("%06x: MOV Sreg - Invalid register\n",PC(nec_state));
	334	}
	335	}
	336	OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH(); (void)(*GetEA[ModRM])(nec_state); RegWord(ModRM)=EO; CLKS(4,4,2); }
	337	OP( 0x8e, i_mov_sregw ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); CLKR(15,15,7,15,11,5,2,EA);
	338	switch (ModRM & 0x38) {
	339	case 0x00: Sreg(DS1) = src; break; /* mov es,ew */
	340	case 0x08: Sreg(PS) = src; break; /* mov cs,ew */
	341	case 0x10: Sreg(SS) = src; break; /* mov ss,ew */
	342	case 0x18: Sreg(DS0) = src; break; /* mov ds,ew */
	343	default: logerror("%06x: MOV Sreg - Invalid register\n",PC(nec_state));
	344	}
	345	nec_state->no_interrupt=1;
	346	}
	347	OP( 0x8f, i_popw ) { UINT16 tmp; GetModRM; POP(tmp); PutRMWord(ModRM,tmp); nec_state->icount-=21; }
	348	OP( 0x90, i_nop ) { CLK(3); }
	349	OP( 0x91, i_xchg_axcx ) { XchgAWReg(CW); CLK(3); }
	350	OP( 0x92, i_xchg_axdx ) { XchgAWReg(DW); CLK(3); }
	351	OP( 0x93, i_xchg_axbx ) { XchgAWReg(BW); CLK(3); }
	352	OP( 0x94, i_xchg_axsp ) { XchgAWReg(SP); CLK(3); }
	353	OP( 0x95, i_xchg_axbp ) { XchgAWReg(BP); CLK(3); }
	354	OP( 0x96, i_xchg_axsi ) { XchgAWReg(IX); CLK(3); }
	355	OP( 0x97, i_xchg_axdi ) { XchgAWReg(IY); CLK(3); }
	356
	357	OP( 0x98, i_cbw ) { Breg(AH) = (Breg(AL) & 0x80) ? 0xff : 0; CLK(2); }
	358	OP( 0x99, i_cwd ) { Wreg(DW) = (Breg(AH) & 0x80) ? 0xffff : 0; CLK(4); }
	359	OP( 0x9a, i_call_far ) { UINT32 tmp, tmp2; tmp = FETCHWORD(); tmp2 = FETCHWORD(); PUSH(Sreg(PS)); PUSH(nec_state->ip); nec_state->ip = (WORD)tmp; Sreg(PS) = (WORD)tmp2; CHANGE_PC; CLKW(29,29,13,29,21,9,Wreg(SP)); }
	360	OP( 0x9b, i_wait ) { if (!nec_state->poll_state) nec_state->ip--; CLK(5); }
	361	OP( 0x9c, i_pushf ) { UINT16 tmp = CompressFlags(); PUSH( tmp ); CLKS(12,8,3); }
	362	OP( 0x9d, i_popf ) { UINT32 tmp; POP(tmp); ExpandFlags(tmp); CLKS(12,8,5); if (nec_state->TF) nec_trap(nec_state); }
	363	OP( 0x9e, i_sahf ) { UINT32 tmp = (CompressFlags() & 0xff00) \| (Breg(AH) & 0xd5); ExpandFlags(tmp); CLKS(3,3,2); }
	364	OP( 0x9f, i_lahf ) { Breg(AH) = CompressFlags() & 0xff; CLKS(3,3,2); }
	365
	366	OP( 0xa0, i_mov_aldisp ) { UINT32 addr; addr = FETCHWORD(); Breg(AL) = GetMemB(DS0, addr); CLKS(10,10,5); }
	367	OP( 0xa1, i_mov_axdisp ) { UINT32 addr; addr = FETCHWORD(); Wreg(AW) = GetMemW(DS0, addr); CLKW(14,14,7,14,10,5,addr); }
	368	OP( 0xa2, i_mov_dispal ) { UINT32 addr; addr = FETCHWORD(); PutMemB(DS0, addr, Breg(AL)); CLKS(9,9,3); }
	369	OP( 0xa3, i_mov_dispax ) { UINT32 addr; addr = FETCHWORD(); PutMemW(DS0, addr, Wreg(AW)); CLKW(13,13,5,13,9,3,addr); }
	370	OP( 0xa4, i_movsb ) { UINT32 tmp = GetMemB(DS0,Wreg(IX)); PutMemB(DS1,Wreg(IY), tmp); Wreg(IY) += -2 * nec_state->DF + 1; Wreg(IX) += -2 * nec_state->DF + 1; CLKS(8,8,6); }
	371	OP( 0xa5, i_movsw ) { UINT32 tmp = GetMemW(DS0,Wreg(IX)); PutMemW(DS1,Wreg(IY), tmp); Wreg(IY) += -4 * nec_state->DF + 2; Wreg(IX) += -4 * nec_state->DF + 2; CLKS(16,16,10); }
	372	OP( 0xa6, i_cmpsb ) { UINT32 src = GetMemB(DS1, Wreg(IY)); UINT32 dst = GetMemB(DS0, Wreg(IX)); SUBB; Wreg(IY) += -2 * nec_state->DF + 1; Wreg(IX) += -2 * nec_state->DF + 1; CLKS(14,14,14); }
	373	OP( 0xa7, i_cmpsw ) { UINT32 src = GetMemW(DS1, Wreg(IY)); UINT32 dst = GetMemW(DS0, Wreg(IX)); SUBW; Wreg(IY) += -4 * nec_state->DF + 2; Wreg(IX) += -4 * nec_state->DF + 2; CLKS(14,14,14); }
	374
	375	OP( 0xa8, i_test_ald8 ) { DEF_ald8; ANDB; CLKS(4,4,2); }
	376	OP( 0xa9, i_test_axd16 ) { DEF_axd16; ANDW; CLKS(4,4,2); }
	377	OP( 0xaa, i_stosb ) { PutMemB(DS1,Wreg(IY),Breg(AL)); Wreg(IY) += -2 * nec_state->DF + 1; CLKS(4,4,3); }
	378	OP( 0xab, i_stosw ) { PutMemW(DS1,Wreg(IY),Wreg(AW)); Wreg(IY) += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
	379	OP( 0xac, i_lodsb ) { Breg(AL) = GetMemB(DS0,Wreg(IX)); Wreg(IX) += -2 * nec_state->DF + 1; CLKS(4,4,3); }
	380	OP( 0xad, i_lodsw ) { Wreg(AW) = GetMemW(DS0,Wreg(IX)); Wreg(IX) += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,Wreg(IX)); }
	381	OP( 0xae, i_scasb ) { UINT32 src = GetMemB(DS1, Wreg(IY)); UINT32 dst = Breg(AL); SUBB; Wreg(IY) += -2 * nec_state->DF + 1; CLKS(4,4,3); }
	382	OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(DS1, Wreg(IY)); UINT32 dst = Wreg(AW); SUBW; Wreg(IY) += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
	383
	384	OP( 0xb0, i_mov_ald8 ) { Breg(AL) = FETCH(); CLKS(4,4,2); }
	385	OP( 0xb1, i_mov_cld8 ) { Breg(CL) = FETCH(); CLKS(4,4,2); }
	386	OP( 0xb2, i_mov_dld8 ) { Breg(DL) = FETCH(); CLKS(4,4,2); }
	387	OP( 0xb3, i_mov_bld8 ) { Breg(BL) = FETCH(); CLKS(4,4,2); }
	388	OP( 0xb4, i_mov_ahd8 ) { Breg(AH) = FETCH(); CLKS(4,4,2); }
	389	OP( 0xb5, i_mov_chd8 ) { Breg(CH) = FETCH(); CLKS(4,4,2); }
	390	OP( 0xb6, i_mov_dhd8 ) { Breg(DH) = FETCH(); CLKS(4,4,2); }
	391	OP( 0xb7, i_mov_bhd8 ) { Breg(BH) = FETCH(); CLKS(4,4,2); }
	392
	393	OP( 0xb8, i_mov_axd16 ) { Breg(AL) = FETCH(); Breg(AH) = FETCH(); CLKS(4,4,2); }
	394	OP( 0xb9, i_mov_cxd16 ) { Breg(CL) = FETCH(); Breg(CH) = FETCH(); CLKS(4,4,2); }
	395	OP( 0xba, i_mov_dxd16 ) { Breg(DL) = FETCH(); Breg(DH) = FETCH(); CLKS(4,4,2); }
	396	OP( 0xbb, i_mov_bxd16 ) { Breg(BL) = FETCH(); Breg(BH) = FETCH(); CLKS(4,4,2); }
	397	OP( 0xbc, i_mov_spd16 ) { Wreg(SP) = FETCHWORD(); CLKS(4,4,2); }
	398	OP( 0xbd, i_mov_bpd16 ) { Wreg(BP) = FETCHWORD(); CLKS(4,4,2); }
	399	OP( 0xbe, i_mov_sid16 ) { Wreg(IX) = FETCHWORD(); CLKS(4,4,2); }
	400	OP( 0xbf, i_mov_did16 ) { Wreg(IY) = FETCHWORD(); CLKS(4,4,2); }
	401
	402	OP( 0xc0, i_rotshft_bd8 ) {
	403	UINT32 src, dst; UINT8 c;
	404	GetModRM; src = (unsigned)GetRMByte(ModRM); dst=src;
	405	c=FETCH();
	406	CLKM(7,7,2,19,19,6);
	407	if (c) switch (ModRM & 0x38) {
	408	case 0x00: do { ROL_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
	409	case 0x08: do { ROR_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
	410	case 0x10: do { ROLC_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
	411	case 0x18: do { RORC_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
	412	case 0x20: SHL_BYTE(c); break;
	413	case 0x28: SHR_BYTE(c); break;
	414	case 0x30: logerror("%06x: Undefined opcode 0xc0 0x30 (SHLA)\n",PC(nec_state)); break;
	415	case 0x38: SHRA_BYTE(c); break;
	416	}
	417	}
	418
	419	OP( 0xc1, i_rotshft_wd8 ) {
	420	UINT32 src, dst; UINT8 c;
	421	GetModRM; src = (unsigned)GetRMWord(ModRM); dst=src;
	422	c=FETCH();
	423	CLKM(7,7,2,27,19,6);
	424	if (c) switch (ModRM & 0x38) {
	425	case 0x00: do { ROL_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
	426	case 0x08: do { ROR_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
	427	case 0x10: do { ROLC_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
	428	case 0x18: do { RORC_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
	429	case 0x20: SHL_WORD(c); break;
	430	case 0x28: SHR_WORD(c); break;
	431	case 0x30: logerror("%06x: Undefined opcode 0xc1 0x30 (SHLA)\n",PC(nec_state)); break;
	432	case 0x38: SHRA_WORD(c); break;
	433	}
	434	}
	435
	436	OP( 0xc2, i_ret_d16 ) { UINT32 count = FETCH(); count += FETCH() << 8; POP(nec_state->ip); Wreg(SP)+=count; CHANGE_PC; CLKS(24,24,10); }
	437	OP( 0xc3, i_ret ) { POP(nec_state->ip); CHANGE_PC; CLKS(19,19,10); }
	438	OP( 0xc4, i_les_dw ) { GetModRM; WORD tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; Sreg(DS1) = GetnextRMWord; CLKW(26,26,14,26,18,10,EA); }
	439	OP( 0xc5, i_lds_dw ) { GetModRM; WORD tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; Sreg(DS0) = GetnextRMWord; CLKW(26,26,14,26,18,10,EA); }
	440	OP( 0xc6, i_mov_bd8 ) { GetModRM; PutImmRMByte(ModRM); nec_state->icount-=(ModRM >=0xc0 )?4:11; }
	441	OP( 0xc7, i_mov_wd16 ) { GetModRM; PutImmRMWord(ModRM); nec_state->icount-=(ModRM >=0xc0 )?4:15; }
	442
	443	OP( 0xc8, i_enter ) {
	444	UINT32 nb = FETCH();
	445	UINT32 i,level;
	446
	447	nec_state->icount-=23;
	448	nb += FETCH() << 8;
	449	level = FETCH();
	450	PUSH(Wreg(BP));
	451	Wreg(BP)=Wreg(SP);
	452	Wreg(SP) -= nb;
	453	for (i=1;i<level;i++) {
	454	PUSH(GetMemW(SS,Wreg(BP)-i*2));
	455	nec_state->icount-=16;
	456	}
	457	if (level) PUSH(Wreg(BP));
	458	}
	459	OP( 0xc9, i_leave ) {
	460	Wreg(SP)=Wreg(BP);
	461	POP(Wreg(BP));
	462	nec_state->icount-=8;
	463	}
	464	OP( 0xca, i_retf_d16 ) { UINT32 count = FETCH(); count += FETCH() << 8; POP(nec_state->ip); POP(Sreg(PS)); Wreg(SP)+=count; CHANGE_PC; CLKS(32,32,16); }
	465	OP( 0xcb, i_retf ) { POP(nec_state->ip); POP(Sreg(PS)); CHANGE_PC; CLKS(29,29,16); }
	466	OP( 0xcc, i_int3 ) { nec_interrupt(nec_state, 3,0); CLKS(50,50,24); }
	467	OP( 0xcd, i_int ) { nec_interrupt(nec_state, FETCH(),0); CLKS(50,50,24); }
	468	OP( 0xce, i_into ) { if (OF) { nec_interrupt(nec_state, 4,0); CLKS(52,52,26); } else CLK(3); }
	469	OP( 0xcf, i_iret ) { POP(nec_state->ip); POP(Sreg(PS)); i_popf(nec_state); CHANGE_PC; CLKS(39,39,19); }
	470
	471	OP( 0xd0, i_rotshft_b ) {
	472	UINT32 src, dst; GetModRM; src = (UINT32)GetRMByte(ModRM); dst=src;
	473	CLKM(6,6,2,16,16,7);
	474	switch (ModRM & 0x38) {
	475	case 0x00: ROL_BYTE; PutbackRMByte(ModRM,(BYTE)dst); nec_state->OverVal = (src^dst)&0x80; break;
	476	case 0x08: ROR_BYTE; PutbackRMByte(ModRM,(BYTE)dst); nec_state->OverVal = (src^dst)&0x80; break;
	477	case 0x10: ROLC_BYTE; PutbackRMByte(ModRM,(BYTE)dst); nec_state->OverVal = (src^dst)&0x80; break;
	478	case 0x18: RORC_BYTE; PutbackRMByte(ModRM,(BYTE)dst); nec_state->OverVal = (src^dst)&0x80; break;
	479	case 0x20: SHL_BYTE(1); nec_state->OverVal = (src^dst)&0x80; break;
	480	case 0x28: SHR_BYTE(1); nec_state->OverVal = (src^dst)&0x80; break;
	481	case 0x30: logerror("%06x: Undefined opcode 0xd0 0x30 (SHLA)\n",PC(nec_state)); break;
	482	case 0x38: SHRA_BYTE(1); nec_state->OverVal = 0; break;
	483	}
	484	}
	485
	486	OP( 0xd1, i_rotshft_w ) {
	487	UINT32 src, dst; GetModRM; src = (UINT32)GetRMWord(ModRM); dst=src;
	488	CLKM(6,6,2,24,16,7);
	489	switch (ModRM & 0x38) {
	490	case 0x00: ROL_WORD; PutbackRMWord(ModRM,(WORD)dst); nec_state->OverVal = (src^dst)&0x8000; break;
	491	case 0x08: ROR_WORD; PutbackRMWord(ModRM,(WORD)dst); nec_state->OverVal = (src^dst)&0x8000; break;
	492	case 0x10: ROLC_WORD; PutbackRMWord(ModRM,(WORD)dst); nec_state->OverVal = (src^dst)&0x8000; break;
	493	case 0x18: RORC_WORD; PutbackRMWord(ModRM,(WORD)dst); nec_state->OverVal = (src^dst)&0x8000; break;
	494	case 0x20: SHL_WORD(1); nec_state->OverVal = (src^dst)&0x8000; break;
	495	case 0x28: SHR_WORD(1); nec_state->OverVal = (src^dst)&0x8000; break;
	496	case 0x30: logerror("%06x: Undefined opcode 0xd1 0x30 (SHLA)\n",PC(nec_state)); break;
	497	case 0x38: SHRA_WORD(1); nec_state->OverVal = 0; break;
	498	}
	499	}
	500
	501	OP( 0xd2, i_rotshft_bcl ) {
	502	UINT32 src, dst; UINT8 c; GetModRM; src = (UINT32)GetRMByte(ModRM); dst=src;
	503	c=Breg(CL);
	504	CLKM(7,7,2,19,19,6);
	505	if (c) switch (ModRM & 0x38) {
	506	case 0x00: do { ROL_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
	507	case 0x08: do { ROR_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
	508	case 0x10: do { ROLC_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
	509	case 0x18: do { RORC_BYTE; c--; CLK(1); } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break;
	510	case 0x20: SHL_BYTE(c); break;
	511	case 0x28: SHR_BYTE(c); break;
	512	case 0x30: logerror("%06x: Undefined opcode 0xd2 0x30 (SHLA)\n",PC(nec_state)); break;
	513	case 0x38: SHRA_BYTE(c); break;
	514	}
	515	}
	516
	517	OP( 0xd3, i_rotshft_wcl ) {
	518	UINT32 src, dst; UINT8 c; GetModRM; src = (UINT32)GetRMWord(ModRM); dst=src;
	519	c=Breg(CL);
	520	CLKM(7,7,2,27,19,6);
	521	if (c) switch (ModRM & 0x38) {
	522	case 0x00: do { ROL_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
	523	case 0x08: do { ROR_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
	524	case 0x10: do { ROLC_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
	525	case 0x18: do { RORC_WORD; c--; CLK(1); } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break;
	526	case 0x20: SHL_WORD(c); break;
	527	case 0x28: SHR_WORD(c); break;
	528	case 0x30: logerror("%06x: Undefined opcode 0xd3 0x30 (SHLA)\n",PC(nec_state)); break;
	529	case 0x38: SHRA_WORD(c); break;
	530	}
	531	}
	532
	533	OP( 0xd4, i_aam ) { UINT32 mult=FETCH(); mult=0; Breg(AH) = Breg(AL) / 10; Breg(AL) %= 10; SetSZPF_Word(Wreg(AW)); CLKS(15,15,12); }
	534	OP( 0xd5, i_aad ) { UINT32 mult=FETCH(); mult=0; Breg(AL) = Breg(AH) * 10 + Breg(AL); Breg(AH) = 0; SetSZPF_Byte(Breg(AL)); CLKS(7,7,8); }
	535	OP( 0xd6, i_setalc ) { Breg(AL) = (CF)?0xff:0x00; nec_state->icount-=3; logerror("%06x: Undefined opcode (SETALC)\n",PC(nec_state)); }
	536	OP( 0xd7, i_trans ) { UINT32 dest = (Wreg(BW)+Breg(AL))&0xffff; Breg(AL) = GetMemB(DS0, dest); CLKS(9,9,5); }
	537	OP( 0xd8, i_fpo ) { GetModRM; nec_state->icount-=2; logerror("%06x: Unimplemented floating point control %04x\n",PC(nec_state),ModRM); }
	538
	539	OP( 0xe0, i_loopne ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if (!ZF && Wreg(CW)) { nec_state->ip = (WORD)(nec_state->ip+disp); /CHANGE_PC;/ CLKS(14,14,6); } else CLKS(5,5,3); }
	540	OP( 0xe1, i_loope ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if ( ZF && Wreg(CW)) { nec_state->ip = (WORD)(nec_state->ip+disp); /CHANGE_PC;/ CLKS(14,14,6); } else CLKS(5,5,3); }
	541	OP( 0xe2, i_loop ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if (Wreg(CW)) { nec_state->ip = (WORD)(nec_state->ip+disp); /CHANGE_PC;/ CLKS(13,13,6); } else CLKS(5,5,3); }
	542	OP( 0xe3, i_jcxz ) { INT8 disp = (INT8)FETCH(); if (Wreg(CW) == 0) { nec_state->ip = (WORD)(nec_state->ip+disp); /CHANGE_PC;/ CLKS(13,13,6); } else CLKS(5,5,3); }
	543	OP( 0xe4, i_inal ) { UINT8 port = FETCH(); Breg(AL) = read_port_byte(port); CLKS(9,9,5); }
	544	OP( 0xe5, i_inax ) { UINT8 port = FETCH(); Wreg(AW) = read_port_word(port); CLKW(13,13,7,13,9,5,port); }
	545	OP( 0xe6, i_outal ) { UINT8 port = FETCH(); write_port_byte(port, Breg(AL)); CLKS(8,8,3); }
	546	OP( 0xe7, i_outax ) { UINT8 port = FETCH(); write_port_word(port, Wreg(AW)); CLKW(12,12,5,12,8,3,port); }
	547
	548	OP( 0xe8, i_call_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(nec_state->ip); nec_state->ip = (WORD)(nec_state->ip+(INT16)tmp); CHANGE_PC; nec_state->icount-=24; }
	549	OP( 0xe9, i_jmp_d16 ) { UINT32 tmp; tmp = FETCHWORD(); nec_state->ip = (WORD)(nec_state->ip+(INT16)tmp); CHANGE_PC; nec_state->icount-=15; }
	550	OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; tmp = FETCHWORD(); tmp1 = FETCHWORD(); Sreg(PS) = (WORD)tmp1; nec_state->ip = (WORD)tmp; CHANGE_PC; nec_state->icount-=27; }
	551	OP( 0xeb, i_jmp_d8 ) { int tmp = (int)((INT8)FETCH()); nec_state->icount-=12; nec_state->ip = (WORD)(nec_state->ip+tmp); }
	552	OP( 0xec, i_inaldx ) { Breg(AL) = read_port_byte(Wreg(DW)); CLKS(8,8,5);}
	553	OP( 0xed, i_inaxdx ) { Wreg(AW) = read_port_word(Wreg(DW)); CLKW(12,12,7,12,8,5,Wreg(DW)); }
	554	OP( 0xee, i_outdxal ) { write_port_byte(Wreg(DW), Breg(AL)); CLKS(8,8,3); }
	555	OP( 0xef, i_outdxax ) { write_port_word(Wreg(DW), Wreg(AW)); CLKW(12,12,5,12,8,3,Wreg(DW)); }
	556
	557	OP( 0xf0, i_lock ) { logerror("%06x: Warning - BUSLOCK\n",PC(nec_state)); nec_state->no_interrupt=1; CLK(2); }
	558	OP( 0xf2, i_repne ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
	559	switch(next) { /* Segments */
	560	case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
	561	case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
	562	case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
	563	case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
	564	}
	565
	566	switch(next) {
	567	case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	568	case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	569	case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	570	case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	571	case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	572	case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	573	case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
	574	case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
	575	case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	576	case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	577	case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	578	case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	579	case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
	580	case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
	581	default: logerror("%06x: REPNE invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
	582	}
	583	nec_state->seg_prefix=FALSE;
	584	}
	585	OP( 0xf3, i_repe ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
	586	switch(next) { /* Segments */
	587	case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
	588	case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
	589	case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
	590	case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
	591	}
	592
	593	switch(next) {
	594	case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	595	case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	596	case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	597	case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	598	case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	599	case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	600	case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
	601	case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
	602	case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	603	case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	604	case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	605	case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
	606	case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
	607	case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
	608	default: logerror("%06x: REPE invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
	609	}
	610	nec_state->seg_prefix=FALSE;
	611	}
	612	OP( 0xf4, i_hlt ) { logerror("%06x: HALT\n",PC(nec_state)); nec_state->icount=0; }
	613	OP( 0xf5, i_cmc ) { nec_state->CarryVal = !CF; CLK(2); }
	614	OP( 0xf6, i_f6pre ) { UINT32 tmp; UINT32 uresult,uresult2; INT32 result,result2;
	615	GetModRM; tmp = GetRMByte(ModRM);
	616	switch (ModRM & 0x38) {
	617	case 0x00: tmp &= FETCH(); nec_state->CarryVal = nec_state->OverVal = 0; SetSZPF_Byte(tmp); nec_state->icount-=(ModRM >=0xc0 )?4:11; break; /* TEST */
	618	case 0x08: logerror("%06x: Undefined opcode 0xf6 0x08\n",PC(nec_state)); break;
	619	case 0x10: PutbackRMByte(ModRM,~tmp); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */
	620	case 0x18: nec_state->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Byte(tmp); PutbackRMByte(ModRM,tmp&0xff); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NEG */
	621	case 0x20: uresult = Breg(AL)tmp; Wreg(AW)=(WORD)uresult; nec_state->CarryVal=nec_state->OverVal=(Breg(AH)!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; / MULU */
	622	case 0x28: result = (INT16)((INT8)Breg(AL))(INT16)((INT8)tmp); Wreg(AW)=(WORD)result; nec_state->CarryVal=nec_state->OverVal=(Breg(AH)!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; / MUL */
	623	case 0x30: if (tmp) { DIVUB; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break;
	624	case 0x38: if (tmp) { DIVB; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break;
	625	}
	626	}
	627
	628	OP( 0xf7, i_f7pre ) { UINT32 tmp,tmp2; UINT32 uresult,uresult2; INT32 result,result2;
	629	GetModRM; tmp = GetRMWord(ModRM);
	630	switch (ModRM & 0x38) {
	631	case 0x00: tmp2 = FETCHWORD(); tmp &= tmp2; nec_state->CarryVal = nec_state->OverVal = 0; SetSZPF_Word(tmp); nec_state->icount-=(ModRM >=0xc0 )?4:11; break; /* TEST */
	632	case 0x08: logerror("%06x: Undefined opcode 0xf7 0x08\n",PC(nec_state)); break;
	633	case 0x10: PutbackRMWord(ModRM,~tmp); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */
	634	case 0x18: nec_state->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Word(tmp); PutbackRMWord(ModRM,tmp&0xffff); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NEG */
	635	case 0x20: uresult = Wreg(AW)tmp; Wreg(AW)=uresult&0xffff; Wreg(DW)=((UINT32)uresult)>>16; nec_state->CarryVal=nec_state->OverVal=(Wreg(DW)!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; / MULU */
	636	case 0x28: result = (INT32)((INT16)Wreg(AW))(INT32)((INT16)tmp); Wreg(AW)=result&0xffff; Wreg(DW)=result>>16; nec_state->CarryVal=nec_state->OverVal=(Wreg(DW)!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; / MUL */
	637	case 0x30: if (tmp) { DIVUW; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break;
	638	case 0x38: if (tmp) { DIVW; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break;
	639	}
	640	}
	641
	642	OP( 0xf8, i_clc ) { nec_state->CarryVal = 0; CLK(2); }
	643	OP( 0xf9, i_stc ) { nec_state->CarryVal = 1; CLK(2); }
	644	OP( 0xfa, i_di ) { SetIF(0); CLK(2); }
	645	OP( 0xfb, i_ei ) { SetIF(1); CLK(2); }
	646	OP( 0xfc, i_cld ) { SetDF(0); CLK(2); }
	647	OP( 0xfd, i_std ) { SetDF(1); CLK(2); }
	648	OP( 0xfe, i_fepre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMByte(ModRM);
	649	switch(ModRM & 0x38) {
	650	case 0x00: tmp1 = tmp+1; nec_state->OverVal = (tmp==0x7f); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(2,2,2,16,16,7); break; /* INC */
	651	case 0x08: tmp1 = tmp-1; nec_state->OverVal = (tmp==0x80); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(2,2,2,16,16,7); break; /* DEC */
	652	default: logerror("%06x: FE Pre with unimplemented mod\n",PC(nec_state));
	653	}
	654	}
	655	OP( 0xff, i_ffpre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMWord(ModRM);
	656	switch(ModRM & 0x38) {
	657	case 0x00: tmp1 = tmp+1; nec_state->OverVal = (tmp==0x7fff); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(2,2,2,24,16,7); break; /* INC */
	658	case 0x08: tmp1 = tmp-1; nec_state->OverVal = (tmp==0x8000); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(2,2,2,24,16,7); break; /* DEC */
	659	case 0x10: PUSH(nec_state->ip); nec_state->ip = (WORD)tmp; CHANGE_PC; nec_state->icount-=(ModRM >=0xc0 )?16:20; break; /* CALL */
	660	case 0x18: tmp1 = Sreg(PS); Sreg(PS) = GetnextRMWord; PUSH(tmp1); PUSH(nec_state->ip); nec_state->ip = tmp; CHANGE_PC; nec_state->icount-=(ModRM >=0xc0 )?16:26; break; /* CALL FAR */
	661	case 0x20: nec_state->ip = tmp; CHANGE_PC; nec_state->icount-=13; break; /* JMP */
	662	case 0x28: nec_state->ip = tmp; Sreg(PS) = GetnextRMWord; CHANGE_PC; nec_state->icount-=15; break; /* JMP FAR */
	663	case 0x30: PUSH(tmp); nec_state->icount-=4; break;
	664	default: logerror("%06x: FF Pre with unimplemented mod\n",PC(nec_state));
	665	}
	666	}
	667
	668	static void i_invalid(nec_state_t *nec_state)
	669	{
	670	nec_state->icount-=10;
	671	logerror("%06x: Invalid Opcode\n",PC(nec_state));
	672	}

src/emu/cpu/nec/v25sfr.c
r0	r9813
	1	/****************************************************************************
	2
	3	NEC V25/V35 special function registers and internal ram access
	4
	5	****************************************************************************/
	6
	7	#include "emu.h"
	8	#include "nec.h"
	9	#include "v25priv.h"
	10
	11	#define RAMEN (nec_state->PRC & 0x40)
	12
	13	int read_sfr(v25_state_t *nec_state, unsigned o)
	14	{
	15	switch(o)
	16	{
	17	case 0xEA: /* FLAG */
	18	return ((nec_state->F0 << 3) \| (nec_state->F1 << 5));
	19	case 0xEB: /* PRC */
	20	return nec_state->PRC;
	21	break;
	22	case 0xFF: /* IDB */
	23	return nec_state->IDB;
	24	break;
	25	default:
	26	logerror("%06x: Read from special function register %02x\n",PC(nec_state),o);
	27	return 0;
	28	}
	29	}
	30
	31	void write_sfr(v25_state_t *nec_state, unsigned o, unsigned d)
	32	{
	33	switch(o)
	34	{
	35	case 0xEA: /* FLAG */
	36	nec_state->F0 = ((d & 0x08) == 0x08); \
	37	nec_state->F1 = ((d & 0x20) == 0x20); \
	38	break;
	39	case 0xEB: /* PRC */
	40	nec_state->PRC = d & 0x4F;
	41	break;
	42	case 0xFF: /* IDB */
	43	nec_state->IDB = d;
	44	break;
	45	default:
	46	logerror("%06x: Wrote %02x to special function register %02x\n",PC(nec_state),d,o);
	47	}
	48	}
	49
	50	int v25_read_byte(v25_state_t *nec_state, unsigned a)
	51	{
	52	unsigned page = a >> 8;
	53	unsigned offs = a & 0xff;
	54
	55	if(RAMEN && page == (nec_state->IDB << 4 \| 0xE))
	56	return nec_state->ram.b[BYTE_XOR_LE(offs)];
	57
	58	if(a == 0xFFFFF \|\| page == (nec_state->IDB << 4 \| 0xF))
	59	return read_sfr(nec_state, offs);
	60
	61	return nec_state->program->read_byte(a);
	62	}
	63
	64	int v25_read_word(v25_state_t *nec_state, unsigned a)
	65	{
	66	if( a & 1 )
	67	return (v25_read_byte(nec_state, a) \| (v25_read_byte(nec_state, a + 1) << 8));
	68
	69	unsigned page = a >> 8;
	70	unsigned offs = a & 0xff;
	71
	72	if(RAMEN && page == (nec_state->IDB << 4 \| 0xE))
	73	return nec_state->ram.w[offs/2];
	74
	75	if(page == (nec_state->IDB << 4 \| 0xF))
	76	return (read_sfr(nec_state, offs) \| (read_sfr(nec_state, offs+1) << 8));
	77
	78	if(a == 0xFFFFE) /* not sure about this */
	79	return (nec_state->program->read_byte(a) \| (read_sfr(nec_state, 0xFF) << 8));
	80
	81	return nec_state->program->read_word(a);
	82	}
	83
	84	void v25_write_byte(v25_state_t *nec_state, unsigned a, unsigned d)
	85	{
	86	unsigned page = a >> 8;
	87	unsigned offs = a & 0xff;
	88
	89	if(RAMEN && page == (nec_state->IDB << 4 \| 0xE))
	90	{
	91	nec_state->ram.b[BYTE_XOR_LE(offs)] = d;
	92	return;
	93	}
	94
	95	if(a == 0xFFFFF \|\| page == (nec_state->IDB << 4 \| 0xF))
	96	{
	97	write_sfr(nec_state, offs, d);
	98	return;
	99	}
	100
	101	nec_state->program->write_byte(a, d);
	102	}
	103
	104	void v25_write_word(v25_state_t *nec_state, unsigned a, unsigned d)
	105	{
	106	if( a & 1 )
	107	{
	108	v25_write_byte(nec_state, a, d & 0xff);
	109	v25_write_byte(nec_state, a + 1, d >> 8);
	110	return;
	111	}
	112
	113	unsigned page = a >> 8;
	114	unsigned offs = a & 0xff;
	115
	116	if(RAMEN && page == (nec_state->IDB << 4 \| 0xE))
	117	{
	118	nec_state->ram.w[offs/2] = d;
	119	return;
	120	}
	121
	122	if(page == (nec_state->IDB << 4 \| 0xF))
	123	{
	124	write_sfr(nec_state, offs, d & 0xff);
	125	write_sfr(nec_state, offs + 1, d >> 8);
	126	return;
	127	}
	128
	129	if(a == 0xFFFFE) /* not sure about this */
	130	{
	131	nec_state->program->write_byte(a, d & 0xff);
	132	write_sfr(nec_state, 0xFF, d >> 8);
	133	return;
	134	}
	135
	136	nec_state->program->write_word(a, d);
	137	}

src/emu/cpu/nec/necmodrm.h
r9812	r9813
9	9	} RM;
10	10	} Mod_RM;
11	11
12		#define RegWord(ModRM) nec_state->regs.w[Mod_RM.reg.w[ModRM]]
13		#define RegByte(ModRM) nec_state->regs.b[Mod_RM.reg.b[ModRM]]
	12	#define RegWord(ModRM) Wreg(Mod_RM.reg.w[ModRM])
	13	#define RegByte(ModRM) Breg(Mod_RM.reg.b[ModRM])
14	14
15	15	#define GetRMWord(ModRM) \
16		((ModRM) >= 0xc0 ? ~~nec_state->~~reg~~s.w[~~Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(nec_state), read_mem_word( EA ) ))
	16	((ModRM) >= 0xc0 ? Wreg(Mod_RM.RM.w[ModRM]) : ( (*GetEA[ModRM])(nec_state), read_mem_word( EA ) ))
17	17
18	18	#define PutbackRMWord(ModRM,val) \
19	19	{ \
20		if (ModRM >= 0xc0) ~~nec_state->~~reg~~s.w[~~Mod_RM.RM.w[ModRM]]=val; \
	20	if (ModRM >= 0xc0) Wreg(Mod_RM.RM.w[ModRM])=val; \
21	21	else write_mem_word(EA,val); \
22	22	}
23	23
r9812	r9813
26	26	#define PutRMWord(ModRM,val) \
27	27	{ \
28	28	if (ModRM >= 0xc0) \
29		~~nec_state->~~reg~~s.w[~~Mod_RM.RM.w[ModRM]]=val; \
	29	Wreg(Mod_RM.RM.w[ModRM])=val; \
30	30	else { \
31	31	(*GetEA[ModRM])(nec_state); \
32	32	write_mem_word( EA ,val); \
r9812	r9813
37	37	{ \
38	38	WORD val; \
39	39	if (ModRM >= 0xc0) \
40		~~nec_state->~~reg~~s.w[~~Mod_RM.RM.w[ModRM]] = FETCHWORD(); \
	40	Wreg(Mod_RM.RM.w[ModRM]) = FETCHWORD(); \
41	41	else { \
42	42	(*GetEA[ModRM])(nec_state); \
43	43	val = FETCHWORD(); \
r9812	r9813
46	46	}
47	47
48	48	#define GetRMByte(ModRM) \
49		((ModRM) >= 0xc0 ? ~~nec_state->~~reg~~s.b[~~Mod_RM.RM.b[ModRM]] : read_mem_byte( (*GetEA[ModRM])(nec_state) ))
	49	((ModRM) >= 0xc0 ? Breg(Mod_RM.RM.b[ModRM]) : read_mem_byte( (*GetEA[ModRM])(nec_state) ))
50	50
51	51	#define PutRMByte(ModRM,val) \
52	52	{ \
53	53	if (ModRM >= 0xc0) \
54		~~nec_state->~~reg~~s.b[~~Mod_RM.RM.b[ModRM]]=val; \
	54	Breg(Mod_RM.RM.b[ModRM])=val; \
55	55	else \
56	56	write_mem_byte( (*GetEA[ModRM])(nec_state) ,val); \
57	57	}
r9812	r9813
59	59	#define PutImmRMByte(ModRM) \
60	60	{ \
61	61	if (ModRM >= 0xc0) \
62		~~nec_state->~~reg~~s.b[~~Mod_RM.RM.b[ModRM]]=FETCH(); \
	62	Breg(Mod_RM.RM.b[ModRM])=FETCH(); \
63	63	else { \
64	64	(*GetEA[ModRM])(nec_state); \
65	65	write_mem_byte( EA , FETCH() ); \
r9812	r9813
69	69	#define PutbackRMByte(ModRM,val) \
70	70	{ \
71	71	if (ModRM >= 0xc0) \
72		~~nec_state->~~reg~~s.b[~~Mod_RM.RM.b[ModRM]]=val; \
	72	Breg(Mod_RM.RM.b[ModRM])=val; \
73	73	else \
74	74	write_mem_byte(EA,val); \
75	75	}
r9812	r9813
96	96
97	97	#define DEF_ald8 \
98	98	UINT32 src = FETCH(); \
99		UINT32 dst = ~~nec_state->~~reg~~s.b[~~AL]
	99	UINT32 dst = Breg(AL)
100	100
101	101	#define DEF_axd16 \
102	102	UINT32 src = FETCH(); \
103		UINT32 dst = ~~nec_state->~~reg~~s.w[~~AW]; \
	103	UINT32 dst = Wreg(AW); \
104	104	src += (FETCH() << 8)

src/emu/cpu/nec/necdasm.c
r9812	r9813
881	881	#define MODRM_REG1 ((modrm >> 3) & 0x7)
882	882	#define MODRM_REG2 (modrm & 0x7)
883	883
	884	#define MAX_LENGTH 8
	885
884	886	INLINE UINT8 FETCH(void)
885	887	{
886		if ((opcode_ptr - opcode_ptr_base) + 1 > 15)
	888	if ((opcode_ptr - opcode_ptr_base) + 1 > MAX_LENGTH)
887	889	return 0xff;
888	890	pc++;
889	891	return *opcode_ptr++;
r9812	r9813
892	894	INLINE UINT16 FETCH16(void)
893	895	{
894	896	UINT16 d;
895		if ((opcode_ptr - opcode_ptr_base) + 2 > 15)
	897	if ((opcode_ptr - opcode_ptr_base) + 2 > MAX_LENGTH)
896	898	return 0xffff;
897	899	d = opcode_ptr[0] \| (opcode_ptr[1] << 8);
898	900	opcode_ptr += 2;
r9812	r9813
902	904
903	905	INLINE UINT8 FETCHD(void)
904	906	{
905		if ((opcode_ptr - opcode_ptr_base) + 1 > 15)
	907	if ((opcode_ptr - opcode_ptr_base) + 1 > MAX_LENGTH)
906	908	return 0xff;
907	909	pc++;
908	910	return *opcode_ptr++;
r9812	r9813
911	913	INLINE UINT16 FETCHD16(void)
912	914	{
913	915	UINT16 d;
914		if ((opcode_ptr - opcode_ptr_base) + 2 > 15)
	916	if ((opcode_ptr - opcode_ptr_base) + 2 > MAX_LENGTH)
915	917	return 0xffff;
916	918	d = opcode_ptr[0] \| (opcode_ptr[1] << 8);
917	919	opcode_ptr += 2;

src/emu/cpu/nec/necinstr.h
r9812	r9813
97	97	static void i_pusha(nec_state_t *nec_state);
98	98	static void i_popa(nec_state_t *nec_state);
99	99	static void i_chkind(nec_state_t *nec_state);
100		static void i_brkn(nec_state_t *nec_state);
101	100	static void i_repnc(nec_state_t *nec_state);
102	101	static void i_repc(nec_state_t *nec_state);
103	102	static void i_push_d16(nec_state_t *nec_state);
r9812	r9813
348	347	i_pusha, /* 0x60 */
349	348	i_popa, /* 0x61 */
350	349	i_chkind, /* 0x62 */
351		i_~~brk~~n, /* 0x63 ~~- V25S/V35S only~~ */
	350	i_invalid, /* 0x63 */
352	351	i_repnc, /* 0x64 */
353	352	i_repc, /* 0x65 */
354	353	i_invalid, /* 0x66 */

src/emu/cpu/nec/necpriv.h
r9812	r9813
1
2		typedef enum { DS1, PS, SS, DS0 } SREGS;
3		typedef enum { AW, CW, DW, BW, SP, BP, IX, IY } WREGS;
4
5	1	#define NEC_NMI_INT_VECTOR 2
6	2
7	3	/* Cpu types, steps of 8 to help the cycle count calculation */
r9812	r9813
14	10	#define TRUE 1
15	11	#endif
16	12
	13	/* NEC registers */
	14	typedef union
	15	{ /* eight general registers */
	16	UINT16 w[8]; /* viewed as 16 bits registers */
	17	UINT8 b[16]; /* or as 8 bit registers */
	18	} necbasicregs;
	19
	20	typedef struct _nec_state_t nec_state_t;
	21	struct _nec_state_t
	22	{
	23	necbasicregs regs;
	24	offs_t fetch_xor;
	25	UINT16 sregs[4];
	26
	27	UINT16 ip;
	28
	29	INT32 SignVal;
	30	UINT32 AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
	31	UINT8 TF, IF, DF, MF; /* 0 or 1 valued flags */
	32	UINT32 int_vector;
	33	UINT32 pending_irq;
	34	UINT32 nmi_state;
	35	UINT32 irq_state;
	36	UINT32 poll_state;
	37	UINT8 no_interrupt;
	38
	39	device_irq_callback irq_callback;
	40	legacy_cpu_device *device;
	41	address_space *program;
	42	direct_read_data *direct;
	43	address_space *io;
	44	int icount;
	45
	46	UINT8 prefetch_size;
	47	UINT8 prefetch_cycles;
	48	INT8 prefetch_count;
	49	UINT8 prefetch_reset;
	50	UINT32 chip_type;
	51
	52	UINT32 prefix_base; /* base address of the latest prefix segment */
	53	UINT8 seg_prefix; /* prefix segment indicator */
	54	};
	55
	56	typedef enum { DS1, PS, SS, DS0 } SREGS;
	57	typedef enum { AW, CW, DW, BW, SP, BP, IX, IY } WREGS;
17	58	typedef enum {
18	59	AL = NATIVE_ENDIAN_VALUE_LE_BE(0x0, 0x1),
19	60	AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1, 0x0),
r9812	r9813
23	64	DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4),
24	65	BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7),
25	66	BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6),
26		SPL = NATIVE_ENDIAN_VALUE_LE_BE(0x8, 0x9),
27		SPH = NATIVE_ENDIAN_VALUE_LE_BE(0x9, 0x8),
28		BPL = NATIVE_ENDIAN_VALUE_LE_BE(0xa, 0xb),
29		BPH = NATIVE_ENDIAN_VALUE_LE_BE(0xb, 0xa),
30		IXL = NATIVE_ENDIAN_VALUE_LE_BE(0xc, 0xd),
31		IXH = NATIVE_ENDIAN_VALUE_LE_BE(0xd, 0xc),
32		IYL = NATIVE_ENDIAN_VALUE_LE_BE(0xe, 0xf),
33		IYH = NATIVE_ENDIAN_VALUE_LE_BE(0xf, 0xe)
34	67	} BREGS;
35	68
	69	#define Sreg(x) nec_state->sregs[x]
	70	#define Wreg(x) nec_state->regs.w[x]
	71	#define Breg(x) nec_state->regs.b[x]
	72
36	73	/* parameter x = result, y = source 1, z = source 2 */
37	74
38	75	#define SetTF(x) (nec_state->TF = (x))
r9812	r9813
76	113	#define PF parity_table[(BYTE)nec_state->ParityVal]
77	114	#define AF (nec_state->AuxVal!=0)
78	115	#define OF (nec_state->OverVal!=0)
79		#define MD (nec_state->MF!=0)
80	116
81	117	/************************************************************************/
82	118
r9812	r9813
94	130
95	131	#define CHANGE_PC do { EMPTY_PREFETCH(); } while (0)
96	132
97		#define SegBase(Seg) (~~nec_state->s~~regs[Seg] << 4)
	133	#define SegBase(Seg) (Sreg(Seg) << 4)
98	134
99		#define DefaultBase(Seg) ((nec_state->seg_prefix && (Seg==DS0 \|\| Seg==SS)) ? nec_state->prefix_base : ~~nec_state->s~~regs[Seg] << 4)
	135	#define DefaultBase(Seg) ((nec_state->seg_prefix && (Seg==DS0 \|\| Seg==SS)) ? nec_state->prefix_base : Sreg(Seg) << 4)
100	136
101	137	#define GetMemB(Seg,Off) (read_mem_byte(DefaultBase(Seg) + (Off)))
102	138	#define GetMemW(Seg,Off) (read_mem_word(DefaultBase(Seg) + (Off)))
r9812	r9813
112	148	#define EMPTY_PREFETCH() nec_state->prefetch_reset = 1
113	149
114	150
115		#define PUSH(val) { nec_state->regs.w[SP]-=2; write_mem_word((((nec_state->sregs[SS]<<4)+nec_state->regs.w[SP])),val); }
116		#define POP(var) { var = read_mem_word((((nec_state->sregs[SS]<<4)+nec_state->regs.w[SP]))); nec_state->regs.w[SP]+=2; }
	151	#define PUSH(val) { Wreg(SP)-=2; write_mem_word((((Sreg(SS)<<4)+Wreg(SP))),val); }
	152	#define POP(var) { var = read_mem_word((((Sreg(SS)<<4)+Wreg(SP)))); Wreg(SP)+=2; }
117	153
118	154	#define GetModRM UINT32 ModRM=FETCH()
119	155
r9812	r9813
136	172	#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall,addr) { const UINT32 ocount=(v20o<<16)\|(v30o<<8)\|v33o, ecount=(v20e<<16)\|(v30e<<8)\|v33e; if (ModRM >=0xc0) nec_state->icount-=vall; else nec_state->icount-=(addr&1)?((ocount>>nec_state->chip_type)&0x7f):((ecount>>nec_state->chip_type)&0x7f); }
137	173
138	174	/************************************************************************/
139		#define CompressFlags() (WORD)(CF \| (PF << 2) \| (AF << 4) \| (ZF << 6) \
	175	#define CompressFlags() (WORD)(CF \| 0x02 \| (PF << 2) \| (AF << 4) \| (ZF << 6) \
140	176	\| (SF << 7) \| (nec_state->TF << 8) \| (nec_state->IF << 9) \
141		\| (nec_state->DF << 10) \| (OF << 11)\| (MD << 15))
	177	\| (nec_state->DF << 10) \| (OF << 11) \| (nec_state->MF << 15))
142	178
143	179	#define ExpandFlags(f) \
144	180	{ \
145		nec_state->CarryVal = (f) & 1; \
146		nec_state->ParityVal = !((f) & 4); \
147		nec_state->AuxVal = (f) & 16; \
148		nec_state->ZeroVal = !((f) & 64); \
149		nec_state->SignVal = (f) & 128 ? -1 : 0; \
150		nec_state->TF = ((f) & 256) == 256; \
151		nec_state->IF = ((f) & 512) == 512; \
152		nec_state->DF = ((f) & 1024) == 1024; \
153		nec_state->OverVal = (f) & 2048; \
	181	nec_state->CarryVal = (f) & 0x0001; \
	182	nec_state->ParityVal = !((f) & 0x0004); \
	183	nec_state->AuxVal = (f) & 0x0010; \
	184	nec_state->ZeroVal = !((f) & 0x0040); \
	185	nec_state->SignVal = (f) & 0x0080 ? -1 : 0; \
	186	nec_state->TF = ((f) & 0x0100) == 0x0100; \
	187	nec_state->IF = ((f) & 0x0200) == 0x0200; \
	188	nec_state->DF = ((f) & 0x0400) == 0x0400; \
	189	nec_state->OverVal = (f) & 0x0800; \
154	190	nec_state->MF = ((f) & 0x8000) == 0x8000; \
155	191	}
156	192
157	193	#define IncWordReg(Reg) \
158		unsigned tmp = (unsigned)~~nec_state->~~reg~~s.w[~~Reg]; \
	194	unsigned tmp = (unsigned)Wreg(Reg); \
159	195	unsigned tmp1 = tmp+1; \
160	196	nec_state->OverVal = (tmp == 0x7fff); \
161	197	SetAF(tmp1,tmp,1); \
162	198	SetSZPF_Word(tmp1); \
163		~~nec_state->~~reg~~s.w[~~Reg]=tmp1
	199	Wreg(Reg)=tmp1
164	200
165	201	#define DecWordReg(Reg) \
166		unsigned tmp = (unsigned)~~nec_state->~~reg~~s.w[~~Reg]; \
	202	unsigned tmp = (unsigned)Wreg(Reg); \
167	203	unsigned tmp1 = tmp-1; \
168	204	nec_state->OverVal = (tmp == 0x8000); \
169	205	SetAF(tmp1,tmp,1); \
170	206	SetSZPF_Word(tmp1); \
171		~~nec_state->~~reg~~s.w[~~Reg]=tmp1
	207	Wreg(Reg)=tmp1
172	208
173	209	#define JMP(flag) \
174	210	int tmp; \
r9812	r9813
184	220	}
185	221
186	222	#define ADJ4(param1,param2) \
187		if (AF \|\| ((~~nec_state->~~reg~~s.b[~~AL] & 0xf) > 9)) \
	223	if (AF \|\| ((Breg(AL) & 0xf) > 9)) \
188	224	{ \
189	225	UINT16 tmp; \
190		tmp = nec_state->regs.b[AL] + param1; \
191		nec_state->regs.b[AL] = tmp; \
	226	tmp = Breg(AL) + param1; \
	227	Breg(AL) = tmp; \
192	228	nec_state->AuxVal = 1; \
193	229	nec_state->CarryVal \|= tmp & 0x100; \
194	230	} \
195		if (CF \|\| (~~nec_state->~~reg~~s.b[~~AL]>0x9f)) \
	231	if (CF \|\| (Breg(AL)>0x9f)) \
196	232	{ \
197		~~nec_state->~~reg~~s.b[~~AL] += param2; \
	233	Breg(AL) += param2; \
198	234	nec_state->CarryVal = 1; \
199	235	} \
200		SetSZPF_Byte(~~nec_state->~~reg~~s.b[~~AL])
	236	SetSZPF_Byte(Breg(AL))
201	237
202	238	#define ADJB(param1,param2) \
203		if (AF \|\| ((~~nec_state->~~reg~~s.b[~~AL] & 0xf) > 9)) \
	239	if (AF \|\| ((Breg(AL) & 0xf) > 9)) \
204	240	{ \
205		nec_state->regs.b[AL] += param1; \
206		nec_state->regs.b[AH] += param2; \
	241	Breg(AL) += param1; \
	242	Breg(AH) += param2; \
207	243	nec_state->AuxVal = 1; \
208	244	nec_state->CarryVal = 1; \
209	245	} \
r9812	r9813
212	248	nec_state->AuxVal = 0; \
213	249	nec_state->CarryVal = 0; \
214	250	} \
215		~~nec_state->~~reg~~s.b[~~AL] &= 0x0F
	251	Breg(AL) &= 0x0F
216	252
217	253	#define BITOP_BYTE \
218	254	ModRM = FETCH(); \
219	255	if (ModRM >= 0xc0) { \
220		tmp=~~nec_state->~~reg~~s.b[~~Mod_RM.RM.b[ModRM]]; \
	256	tmp=Breg(Mod_RM.RM.b[ModRM]); \
221	257	} \
222	258	else { \
223	259	(*GetEA[ModRM])(nec_state); \
r9812	r9813
227	263	#define BITOP_WORD \
228	264	ModRM = FETCH(); \
229	265	if (ModRM >= 0xc0) { \
230		tmp=~~nec_state->~~reg~~s.w[~~Mod_RM.RM.w[ModRM]]; \
	266	tmp=Wreg(Mod_RM.RM.w[ModRM]); \
231	267	} \
232	268	else { \
233	269	(*GetEA[ModRM])(nec_state); \
r9812	r9813
242	278
243	279	#define XchgAWReg(Reg) \
244	280	WORD tmp; \
245		tmp = nec_state->regs.w[Reg]; \
246		nec_state->regs.w[Reg] = nec_state->regs.w[AW]; \
247		nec_state->regs.w[AW] = tmp
	281	tmp = Wreg(Reg); \
	282	Wreg(Reg) = Wreg(AW); \
	283	Wreg(AW) = tmp
248	284
249	285	#define ROL_BYTE nec_state->CarryVal = dst & 0x80; dst = (dst << 1)+CF
250	286	#define ROL_WORD nec_state->CarryVal = dst & 0x8000; dst = (dst << 1)+CF
r9812	r9813
262	298	#define SHRA_WORD(c) nec_state->icount-=c; dst = ((INT16)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT16)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
263	299
264	300	#define DIVUB \
265		uresult = ~~nec_state->~~reg~~s.w[~~AW]; \
	301	uresult = Wreg(AW); \
266	302	uresult2 = uresult % tmp; \
267	303	if ((uresult /= tmp) > 0xff) { \
268	304	nec_interrupt(nec_state, 0,0); break; \
269	305	} else { \
270		nec_state->regs.b[AL] = uresult; \
271		nec_state->regs.b[AH] = uresult2; \
	306	Breg(AL) = uresult; \
	307	Breg(AH) = uresult2; \
272	308	}
273	309
274	310	#define DIVB \
275		result = (INT16)~~nec_state->~~reg~~s.w[~~AW]; \
	311	result = (INT16)Wreg(AW); \
276	312	result2 = result % (INT16)((INT8)tmp); \
277	313	if ((result /= (INT16)((INT8)tmp)) > 0xff) { \
278	314	nec_interrupt(nec_state, 0,0); break; \
279	315	} else { \
280		nec_state->regs.b[AL] = result; \
281		nec_state->regs.b[AH] = result2; \
	316	Breg(AL) = result; \
	317	Breg(AH) = result2; \
282	318	}
283	319
284	320	#define DIVUW \
285		uresult = (((UINT32)~~nec_state->~~reg~~s.w[~~DW]) << 16) \| ~~nec_state->~~reg~~s.w[~~AW];\
	321	uresult = (((UINT32)Wreg(DW)) << 16) \| Wreg(AW);\
286	322	uresult2 = uresult % tmp; \
287	323	if ((uresult /= tmp) > 0xffff) { \
288	324	nec_interrupt(nec_state, 0,0); break; \
289	325	} else { \
290		nec_state->regs.w[AW]=uresult; \
291		nec_state->regs.w[DW]=uresult2; \
	326	Wreg(AW)=uresult; \
	327	Wreg(DW)=uresult2; \
292	328	}
293	329
294	330	#define DIVW \
295		result = ((UINT32)~~nec_state->~~reg~~s.w[~~DW] << 16) + ~~nec_state->~~reg~~s.w[~~AW]; \
	331	result = ((UINT32)Wreg(DW) << 16) + Wreg(AW); \
296	332	result2 = result % (INT32)((INT16)tmp); \
297	333	if ((result /= (INT32)((INT16)tmp)) > 0xffff) { \
298	334	nec_interrupt(nec_state, 0,0); break; \
299	335	} else { \
300		nec_state->regs.w[AW]=result; \
301		nec_state->regs.w[DW]=result2; \
	336	Wreg(AW)=result; \
	337	Wreg(DW)=result2; \
302	338	}
303	339
304	340	#define ADD4S { \
305	341	int i,v1,v2,result; \
306		int count = (nec_state->regs.b[CL]+1)/2; \
307		unsigned di = nec_state->regs.w[IY]; \
308		unsigned si = nec_state->regs.w[IX]; \
	342	int count = (Breg(CL)+1)/2; \
	343	unsigned di = Wreg(IY); \
	344	unsigned si = Wreg(IX); \
309	345	static const UINT8 table[3]={18,19,19}; \
310	346	if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for add4s\n",PC(nec_state)); \
311	347	nec_state->ZeroVal = nec_state->CarryVal = 0; \
r9812	r9813
327	363	}
328	364
329	365	#define SUB4S { \
330		int count = (~~nec_state->~~reg~~s.b[~~CL]+1)/2; \
	366	int count = (Breg(CL)+1)/2; \
331	367	int i,v1,v2,result; \
332		unsigned di = nec_state->regs.w[IY]; \
333		unsigned si = nec_state->regs.w[IX]; \
	368	unsigned di = Wreg(IY); \
	369	unsigned si = Wreg(IX); \
334	370	static const UINT8 table[3]={18,19,19}; \
335	371	if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for sub4s\n",PC(nec_state)); \
336	372	nec_state->ZeroVal = nec_state->CarryVal = 0; \
r9812	r9813
357	393	}
358	394
359	395	#define CMP4S { \
360		int count = (~~nec_state->~~reg~~s.b[~~CL]+1)/2; \
	396	int count = (Breg(CL)+1)/2; \
361	397	int i,v1,v2,result; \
362		unsigned di = nec_state->regs.w[IY]; \
363		unsigned si = nec_state->regs.w[IX]; \
	398	unsigned di = Wreg(IY); \
	399	unsigned si = Wreg(IX); \
364	400	static const UINT8 table[3]={14,19,19}; \
365	401	if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for cmp4s\n",PC(nec_state)); \
366	402	nec_state->ZeroVal = nec_state->CarryVal = 0; \

src/emu/cpu/nec/v25.c
r0	r9813
	1	/****************************************************************************
	2
	3	NEC V25/V35 emulator
	4
	5	---------------------------------------------
	6
	7	TODO:
	8
	9	Using V20/V30 cycle counts for now. Cycle counts change
	10	depending on whether the internal RAM access is enabled.
	11	Also, the clock divider can be changed to 1/2, 1/4 or 1/8.
	12
	13	IBRK flag (trap I/O instructions) included but not implemented.
	14
	15	Most special function registers not implemented yet.
	16
	17	It would be nice if the internal ram area was viewable in the debugger.
	18
	19	****************************************************************************/
	20
	21	#include "emu.h"
	22	#include "debugger.h"
	23
	24	typedef UINT8 BOOLEAN;
	25	typedef UINT8 BYTE;
	26	typedef UINT16 WORD;
	27	typedef UINT32 DWORD;
	28
	29	#include "nec.h"
	30	#include "v25priv.h"
	31
	32	/* default configuration */
	33	static const nec_config default_config =
	34	{
	35	NULL
	36	};
	37
	38	extern int necv_dasm_one(char buffer, UINT32 eip, const UINT8 oprom, const nec_config *config);
	39
	40	INLINE v25_state_t get_safe_token(running_device device)
	41	{
	42	assert(device != NULL);
	43	assert(device->type() == V25 \|\| device->type() == V35);
	44	return (v25_state_t )downcast<legacy_cpu_device >(device)->token();
	45	}
	46
	47	/* The interrupt number of a pending external interrupt pending NMI is 2. */
	48	/* For INTR interrupts, the level is caught on the bus during an INTA cycle */
	49
	50	#define INT_IRQ 0x01
	51	#define NMI_IRQ 0x02
	52
	53	INLINE void prefetch(v25_state_t *nec_state)
	54	{
	55	nec_state->prefetch_count--;
	56	}
	57
	58	static void do_prefetch(v25_state_t *nec_state, int previous_ICount)
	59	{
	60	int diff = previous_ICount - (int) nec_state->icount;
	61
	62	/* The implementation is not accurate, but comes close.
	63	* It does not respect that the V30 will fetch two bytes
	64	* at once directly, but instead uses only 2 cycles instead
	65	* of 4. There are however only very few sources publicly
	66	* available and they are vague.
	67	*/
	68	while (nec_state->prefetch_count<0)
	69	{
	70	nec_state->prefetch_count++;
	71	if (diff>nec_state->prefetch_cycles)
	72	diff -= nec_state->prefetch_cycles;
	73	else
	74	nec_state->icount -= nec_state->prefetch_cycles;
	75	}
	76
	77	if (nec_state->prefetch_reset)
	78	{
	79	nec_state->prefetch_count = 0;
	80	nec_state->prefetch_reset = 0;
	81	return;
	82	}
	83
	84	while (diff>=nec_state->prefetch_cycles && nec_state->prefetch_count < nec_state->prefetch_size)
	85	{
	86	diff -= nec_state->prefetch_cycles;
	87	nec_state->prefetch_count++;
	88	}
	89
	90	}
	91
	92	INLINE UINT8 fetch(v25_state_t *nec_state)
	93	{
	94	prefetch(nec_state);
	95	return nec_state->direct->read_raw_byte(FETCH_XOR((Sreg(PS)<<4)+nec_state->ip++));
	96	}
	97
	98	INLINE UINT16 fetchword(v25_state_t *nec_state)
	99	{
	100	UINT16 r = FETCH();
	101	r \|= (FETCH()<<8);
	102	return r;
	103	}
	104
	105	#define nec_state_t v25_state_t
	106
	107	#include "v25instr.h"
	108	#include "necea.h"
	109	#include "necmodrm.h"
	110
	111	static UINT8 parity_table[256];
	112
	113	static UINT8 fetchop(v25_state_t *nec_state)
	114	{
	115	UINT8 ret;
	116
	117	prefetch(nec_state);
	118	ret = nec_state->direct->read_decrypted_byte(FETCH_XOR( ( Sreg(PS)<<4)+nec_state->ip++));
	119
	120	if (nec_state->MF == 0)
	121	if (nec_state->config->v25v35_decryptiontable)
	122	{
	123	ret = nec_state->config->v25v35_decryptiontable[ret];
	124	}
	125	return ret;
	126	}
	127
	128
	129
	130	/***************************************************************************/
	131
	132	static CPU_RESET( v25 )
	133	{
	134	v25_state_t *nec_state = get_safe_token(device);
	135	unsigned int i,j,c;
	136
	137	static const WREGS wreg_name[8]={ AW, CW, DW, BW, SP, BP, IX, IY };
	138	static const BREGS breg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH };
	139
	140	memset( &nec_state->ram.w, 0, sizeof(nec_state->ram.w));
	141
	142	nec_state->ip = 0;
	143	nec_state->IBRK = 1;
	144	nec_state->F0 = 0;
	145	nec_state->F1 = 0;
	146	nec_state->TF = 0;
	147	nec_state->IF = 0;
	148	nec_state->DF = 0;
	149	nec_state->RB = 7;
	150	nec_state->SignVal = 0;
	151	nec_state->int_vector = 0;
	152	nec_state->pending_irq = 0;
	153	nec_state->nmi_state = 0;
	154	nec_state->irq_state = 0;
	155	nec_state->poll_state = 0;
	156	nec_state->mode_state = nec_state->MF = (nec_state->config->v25v35_decryptiontable) ? 0 : 1;
	157	nec_state->AuxVal = 0;
	158	nec_state->OverVal = 0;
	159	nec_state->ZeroVal = 0;
	160	nec_state->CarryVal = 0;
	161	nec_state->ParityVal = 0;
	162
	163	nec_state->PRC = 0x4E;
	164	nec_state->IDB = 0xFF;
	165
	166	Sreg(PS) = 0xffff;
	167
	168	CHANGE_PC;
	169
	170	for (i = 0;i < 256; i++)
	171	{
	172	for (j = i, c = 0; j > 0; j >>= 1)
	173	if (j & 1) c++;
	174	parity_table[i] = !(c & 1);
	175	}
	176
	177	nec_state->ZeroVal = nec_state->ParityVal = 1;
	178
	179	for (i = 0; i < 256; i++)
	180	{
	181	Mod_RM.reg.b[i] = breg_name[(i & 0x38) >> 3];
	182	Mod_RM.reg.w[i] = wreg_name[(i & 0x38) >> 3];
	183	}
	184
	185	for (i = 0xc0; i < 0x100; i++)
	186	{
	187	Mod_RM.RM.w[i] = wreg_name[i & 7];
	188	Mod_RM.RM.b[i] = breg_name[i & 7];
	189	}
	190
	191	nec_state->poll_state = 1;
	192	}
	193
	194	static CPU_EXIT( v25 )
	195	{
	196
	197	}
	198
	199	static void nec_interrupt(v25_state_t *nec_state, unsigned int_num, unsigned mode)
	200	{
	201	UINT32 dest_seg, dest_off;
	202
	203	i_pushf(nec_state);
	204	nec_state->TF = nec_state->IF = 0;
	205
	206	switch(mode)
	207	{
	208	case 0:
	209	nec_state->MF = nec_state->mode_state;
	210	break;
	211	case 1: /* BRKN: force native mode */
	212	nec_state->MF = 1;
	213	break;
	214	case 2: /* BRKS: force secure mode */
	215	if (nec_state->config->v25v35_decryptiontable)
	216	nec_state->MF = 0;
	217	else
	218	logerror("%06x: BRKS executed with no decryption table\n",PC(nec_state));
	219	}
	220
	221	if (int_num == -1)
	222	{
	223	int_num = (*nec_state->irq_callback)(nec_state->device, 0);
	224
	225	nec_state->irq_state = CLEAR_LINE;
	226	nec_state->pending_irq &= ~INT_IRQ;
	227	}
	228
	229	dest_off = read_mem_word(int_num*4);
	230	dest_seg = read_mem_word(int_num*4+2);
	231
	232	PUSH(Sreg(PS));
	233	PUSH(nec_state->ip);
	234	nec_state->ip = (WORD)dest_off;
	235	Sreg(PS) = (WORD)dest_seg;
	236	CHANGE_PC;
	237	}
	238
	239	static void nec_trap(v25_state_t *nec_state)
	240	{
	241	nec_instruction[fetchop(nec_state)](nec_state);
	242	nec_interrupt(nec_state, 1,0);
	243	}
	244
	245	static void external_int(v25_state_t *nec_state)
	246	{
	247	if( nec_state->pending_irq & NMI_IRQ )
	248	{
	249	nec_interrupt(nec_state, NEC_NMI_INT_VECTOR,0);
	250	nec_state->pending_irq &= ~NMI_IRQ;
	251	}
	252	else if( nec_state->pending_irq )
	253	{
	254	/* the actual vector is retrieved after pushing flags */
	255	/* and clearing the IF */
	256	nec_interrupt(nec_state, (UINT32)-1,0);
	257	}
	258	}
	259
	260	/****************************************************************************/
	261	/* OPCODES */
	262	/****************************************************************************/
	263
	264	#include "necinstr.c"
	265	#include "v25instr.c"
	266
	267	/*****************************************************************************/
	268
	269	static void set_irq_line(v25_state_t *nec_state, int irqline, int state)
	270	{
	271	if (irqline == INPUT_LINE_NMI)
	272	{
	273	if( nec_state->nmi_state == state ) return;
	274	nec_state->nmi_state = state;
	275	if (state != CLEAR_LINE)
	276	{
	277	nec_state->pending_irq \|= NMI_IRQ;
	278	}
	279	}
	280	else
	281	{
	282	nec_state->irq_state = state;
	283	if (state == CLEAR_LINE)
	284	{
	285	// if (!nec_state->IF) NS010718 fix interrupt request loss
	286	nec_state->pending_irq &= ~INT_IRQ;
	287	}
	288	else
	289	{
	290	// if (nec_state->IF) NS010718 fix interrupt request loss
	291	nec_state->pending_irq \|= INT_IRQ;
	292	}
	293	}
	294	}
	295
	296	static void set_poll_line(v25_state_t *nec_state, int state)
	297	{
	298	nec_state->poll_state = state;
	299	}
	300
	301	static CPU_DISASSEMBLE( v25 )
	302	{
	303	v25_state_t *nec_state = get_safe_token(device);
	304
	305	return necv_dasm_one(buffer, pc, oprom, nec_state->config);
	306	}
	307
	308	static void v25_init(legacy_cpu_device *device, device_irq_callback irqcallback, int type)
	309	{
	310	const nec_config config = device->baseconfig().static_config() ? (const nec_config )device->baseconfig().static_config() : &default_config;
	311	v25_state_t *nec_state = get_safe_token(device);
	312
	313	nec_state->config = config;
	314
	315
	316	state_save_register_device_item_array(device, 0, nec_state->ram.w);
	317
	318	state_save_register_device_item(device, 0, nec_state->ip);
	319	state_save_register_device_item(device, 0, nec_state->IBRK);
	320	state_save_register_device_item(device, 0, nec_state->F0);
	321	state_save_register_device_item(device, 0, nec_state->F1);
	322	state_save_register_device_item(device, 0, nec_state->TF);
	323	state_save_register_device_item(device, 0, nec_state->IF);
	324	state_save_register_device_item(device, 0, nec_state->DF);
	325	state_save_register_device_item(device, 0, nec_state->MF);
	326	state_save_register_device_item(device, 0, nec_state->RB);
	327	state_save_register_device_item(device, 0, nec_state->PRC);
	328	state_save_register_device_item(device, 0, nec_state->IDB);
	329	state_save_register_device_item(device, 0, nec_state->SignVal);
	330	state_save_register_device_item(device, 0, nec_state->int_vector);
	331	state_save_register_device_item(device, 0, nec_state->pending_irq);
	332	state_save_register_device_item(device, 0, nec_state->nmi_state);
	333	state_save_register_device_item(device, 0, nec_state->irq_state);
	334	state_save_register_device_item(device, 0, nec_state->poll_state);
	335	state_save_register_device_item(device, 0, nec_state->mode_state);
	336	state_save_register_device_item(device, 0, nec_state->AuxVal);
	337	state_save_register_device_item(device, 0, nec_state->OverVal);
	338	state_save_register_device_item(device, 0, nec_state->ZeroVal);
	339	state_save_register_device_item(device, 0, nec_state->CarryVal);
	340	state_save_register_device_item(device, 0, nec_state->ParityVal);
	341
	342	nec_state->irq_callback = irqcallback;
	343	nec_state->device = device;
	344	nec_state->program = device->space(AS_PROGRAM);
	345	nec_state->direct = &nec_state->program->direct();
	346	nec_state->io = device->space(AS_IO);
	347	}
	348
	349
	350
	351	static CPU_EXECUTE( v25 )
	352	{
	353	v25_state_t *nec_state = get_safe_token(device);
	354	int prev_ICount;
	355
	356	while(nec_state->icount>0) {
	357	/* Dispatch IRQ */
	358	if (nec_state->pending_irq && nec_state->no_interrupt==0)
	359	{
	360	if (nec_state->pending_irq & NMI_IRQ)
	361	external_int(nec_state);
	362	else if (nec_state->IF)
	363	external_int(nec_state);
	364	}
	365
	366	/* No interrupt allowed between last instruction and this one */
	367	if (nec_state->no_interrupt)
	368	nec_state->no_interrupt--;
	369
	370	debugger_instruction_hook(device, (Sreg(PS)<<4) + nec_state->ip);
	371	prev_ICount = nec_state->icount;
	372	nec_instruction[fetchop(nec_state)](nec_state);
	373	do_prefetch(nec_state, prev_ICount);
	374	}
	375	}
	376
	377	/* Wrappers for the different CPU types */
	378	static CPU_INIT( v25 )
	379	{
	380	v25_state_t *nec_state = get_safe_token(device);
	381
	382	v25_init(device, irqcallback, 0);
	383	nec_state->fetch_xor = 0;
	384	nec_state->chip_type=V20_TYPE;
	385	nec_state->prefetch_size = 4; /* 3 words */
	386	nec_state->prefetch_cycles = 4; /* four cycles per byte */
	387	}
	388
	389	static CPU_INIT( v35 )
	390	{
	391	v25_state_t *nec_state = get_safe_token(device);
	392
	393	v25_init(device, irqcallback, 1);
	394	nec_state->fetch_xor = BYTE_XOR_LE(0);
	395	nec_state->chip_type=V30_TYPE;
	396	nec_state->prefetch_size = 6; /* 3 words */
	397	nec_state->prefetch_cycles = 2; /* two cycles per byte / four per word */
	398
	399	}
	400
	401
	402
	403	/**************************************************************************
	404	* Generic set_info
	405	**************************************************************************/
	406
	407	static CPU_SET_INFO( v25 )
	408	{
	409	v25_state_t *nec_state = get_safe_token(device);
	410
	411	switch (state)
	412	{
	413	/* --- the following bits of info are set as 64-bit signed integers --- */
	414	case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(nec_state, 0, info->i); break;
	415	case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(nec_state, INPUT_LINE_NMI, info->i); break;
	416	case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: set_poll_line(nec_state, info->i); break;
	417
	418	case CPUINFO_INT_PC:
	419	case CPUINFO_INT_REGISTER + NEC_PC:
	420	if( info->i - (Sreg(PS)<<4) < 0x10000 )
	421	{
	422	nec_state->ip = info->i - (Sreg(PS)<<4);
	423	}
	424	else
	425	{
	426	Sreg(PS) = info->i >> 4;
	427	nec_state->ip = info->i & 0x0000f;
	428	}
	429	break;
	430	case CPUINFO_INT_REGISTER + NEC_IP: nec_state->ip = info->i; break;
	431	case CPUINFO_INT_SP:
	432	if( info->i - (Sreg(SS)<<4) < 0x10000 )
	433	{
	434	Wreg(SP) = info->i - (Sreg(SS)<<4);
	435	}
	436	else
	437	{
	438	Sreg(SS) = info->i >> 4;
	439	Wreg(SP) = info->i & 0x0000f;
	440	}
	441	break;
	442	case CPUINFO_INT_REGISTER + NEC_SP: Wreg(SP) = info->i; break;
	443	case CPUINFO_INT_REGISTER + NEC_FLAGS: ExpandFlags(info->i); break;
	444	case CPUINFO_INT_REGISTER + NEC_AW: Wreg(AW) = info->i; break;
	445	case CPUINFO_INT_REGISTER + NEC_CW: Wreg(CW) = info->i; break;
	446	case CPUINFO_INT_REGISTER + NEC_DW: Wreg(DW) = info->i; break;
	447	case CPUINFO_INT_REGISTER + NEC_BW: Wreg(BW) = info->i; break;
	448	case CPUINFO_INT_REGISTER + NEC_BP: Wreg(BP) = info->i; break;
	449	case CPUINFO_INT_REGISTER + NEC_IX: Wreg(IX) = info->i; break;
	450	case CPUINFO_INT_REGISTER + NEC_IY: Wreg(IY) = info->i; break;
	451	case CPUINFO_INT_REGISTER + NEC_ES: Sreg(DS1) = info->i; break;
	452	case CPUINFO_INT_REGISTER + NEC_CS: Sreg(PS) = info->i; break;
	453	case CPUINFO_INT_REGISTER + NEC_SS: Sreg(SS) = info->i; break;
	454	case CPUINFO_INT_REGISTER + NEC_DS: Sreg(DS0) = info->i; break;
	455	case CPUINFO_INT_REGISTER + NEC_VECTOR: nec_state->int_vector = info->i; break;
	456	}
	457	}
	458
	459
	460
	461	/**************************************************************************
	462	* Generic get_info
	463	**************************************************************************/
	464
	465	static CPU_GET_INFO( v25v35 )
	466	{
	467	v25_state_t *nec_state = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
	468	int flags;
	469
	470	switch (state)
	471	{
	472	/* --- the following bits of info are returned as 64-bit signed integers --- */
	473	case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(v25_state_t); break;
	474	case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
	475	case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
	476	case DEVINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
	477	case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
	478	case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
	479	case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
	480	case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
	481	case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
	482	case CPUINFO_INT_MAX_CYCLES: info->i = 80; break;
	483
	484	case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
	485	case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
	486	case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
	487	case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
	488	case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
	489	case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
	490	case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
	491	case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
	492	case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
	493
	494	case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break;
	495	case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = nec_state->nmi_state; break;
	496	case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: info->i = nec_state->poll_state; break;
	497
	498	case CPUINFO_INT_PREVIOUSPC: /* not supported */ break;
	499
	500	case CPUINFO_INT_PC:
	501	case CPUINFO_INT_REGISTER + NEC_PC: info->i = ((Sreg(PS)<<4) + nec_state->ip); break;
	502	case CPUINFO_INT_REGISTER + NEC_IP: info->i = nec_state->ip; break;
	503	case CPUINFO_INT_SP: info->i = (Sreg(SS)<<4) + Wreg(SP); break;
	504	case CPUINFO_INT_REGISTER + NEC_SP: info->i = Wreg(SP); break;
	505	case CPUINFO_INT_REGISTER + NEC_FLAGS: info->i = CompressFlags(); break;
	506	case CPUINFO_INT_REGISTER + NEC_AW: info->i = Wreg(AW); break;
	507	case CPUINFO_INT_REGISTER + NEC_CW: info->i = Wreg(CW); break;
	508	case CPUINFO_INT_REGISTER + NEC_DW: info->i = Wreg(DW); break;
	509	case CPUINFO_INT_REGISTER + NEC_BW: info->i = Wreg(BW); break;
	510	case CPUINFO_INT_REGISTER + NEC_BP: info->i = Wreg(BP); break;
	511	case CPUINFO_INT_REGISTER + NEC_IX: info->i = Wreg(IX); break;
	512	case CPUINFO_INT_REGISTER + NEC_IY: info->i = Wreg(IY); break;
	513	case CPUINFO_INT_REGISTER + NEC_ES: info->i = Sreg(DS1); break;
	514	case CPUINFO_INT_REGISTER + NEC_CS: info->i = Sreg(PS); break;
	515	case CPUINFO_INT_REGISTER + NEC_SS: info->i = Sreg(SS); break;
	516	case CPUINFO_INT_REGISTER + NEC_DS: info->i = Sreg(DS0); break;
	517	case CPUINFO_INT_REGISTER + NEC_VECTOR: info->i = nec_state->int_vector; break;
	518	case CPUINFO_INT_REGISTER + NEC_PENDING: info->i = nec_state->pending_irq; break;
	519
	520	/* --- the following bits of info are returned as pointers to data or functions --- */
	521	case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v25); break;
	522	case CPUINFO_FCT_INIT: /* set per-CPU */ break;
	523	case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(v25); break;
	524	case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(v25); break;
	525	case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(v25); break;
	526	case CPUINFO_FCT_BURN: info->burn = NULL; break;
	527	case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v25); break;
	528	case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_state->icount; break;
	529
	530	/* --- the following bits of info are returned as NULL-terminated strings --- */
	531	case DEVINFO_STR_NAME: strcpy(info->s, "NEC"); break;
	532	case DEVINFO_STR_FAMILY: strcpy(info->s, "NEC V-Series"); break;
	533	case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
	534	case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
	535	case DEVINFO_STR_CREDITS: strcpy(info->s, "Alex W. Jackson, based on NEC V emulator by Bryan McPhail"); break;
	536
	537	case CPUINFO_STR_FLAGS:
	538	flags = CompressFlags();
	539	sprintf(info->s, "%c %d %c%c%c%c%c%c%c%c%c%c%c%c",
	540	flags & 0x8000 ? 'N':'S',
	541	(flags & 0x7000) >> 12,
	542	flags & 0x0800 ? 'O':'.',
	543	flags & 0x0400 ? 'D':'.',
	544	flags & 0x0200 ? 'I':'.',
	545	flags & 0x0100 ? 'T':'.',
	546	flags & 0x0080 ? 'S':'.',
	547	flags & 0x0040 ? 'Z':'.',
	548	flags & 0x0020 ? '1':'.',
	549	flags & 0x0010 ? 'A':'.',
	550	flags & 0x0008 ? '0':'.',
	551	flags & 0x0004 ? 'P':'.',
	552	flags & 0x0002 ? '.':'I',
	553	flags & 0x0001 ? 'C':'.');
	554	break;
	555
	556	case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s, "PC:%04X", (Sreg(PS)<<4) + nec_state->ip); break;
	557	case CPUINFO_STR_REGISTER + NEC_IP: sprintf(info->s, "IP:%04X", nec_state->ip); break;
	558	case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s, "SP:%04X", Wreg(SP)); break;
	559	case CPUINFO_STR_REGISTER + NEC_FLAGS: sprintf(info->s, "F:%04X", CompressFlags()); break;
	560	case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s, "AW:%04X", Wreg(AW)); break;
	561	case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s, "CW:%04X", Wreg(CW)); break;
	562	case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s, "DW:%04X", Wreg(DW)); break;
	563	case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s, "BW:%04X", Wreg(BW)); break;
	564	case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s, "BP:%04X", Wreg(BP)); break;
	565	case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s, "IX:%04X", Wreg(IX)); break;
	566	case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s, "IY:%04X", Wreg(IY)); break;
	567	case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s, "DS1:%04X", Sreg(DS1)); break;
	568	case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s, "PS:%04X", Sreg(PS)); break;
	569	case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s, "SS:%04X", Sreg(SS)); break;
	570	case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s, "DS0:%04X", Sreg(DS0)); break;
	571	case CPUINFO_STR_REGISTER + NEC_VECTOR: sprintf(info->s, "V:%02X", nec_state->int_vector); break;
	572	}
	573	}
	574
	575
	576	/**************************************************************************
	577	* CPU-specific set_info
	578	**************************************************************************/
	579
	580	CPU_GET_INFO( v25 )
	581	{
	582	switch (state)
	583	{
	584	/* --- the following bits of info are returned as 64-bit signed integers --- */
	585	case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
	586	case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
	587
	588	/* --- the following bits of info are returned as pointers to data or functions --- */
	589	case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v25); break;
	590
	591	/* --- the following bits of info are returned as NULL-terminated strings --- */
	592	case DEVINFO_STR_NAME: strcpy(info->s, "V25"); break;
	593
	594	default: CPU_GET_INFO_CALL(v25v35); break;
	595	}
	596	}
	597
	598
	599	/**************************************************************************
	600	* CPU-specific set_info
	601	**************************************************************************/
	602
	603	CPU_GET_INFO( v35 )
	604	{
	605	switch (state)
	606	{
	607	/* --- the following bits of info are returned as 64-bit signed integers --- */
	608	case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
	609	case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
	610
	611	/* --- the following bits of info are returned as pointers to data or functions --- */
	612	case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v35); break;
	613
	614	/* --- the following bits of info are returned as NULL-terminated strings --- */
	615	case DEVINFO_STR_NAME: strcpy(info->s, "V35"); break;
	616
	617	default: CPU_GET_INFO_CALL(v25v35); break;
	618	}
	619	}
	620
	621	DEFINE_LEGACY_CPU_DEVICE(V25, v25);
	622	DEFINE_LEGACY_CPU_DEVICE(V35, v35);

src/emu/cpu/nec/v25instr.c
r0	r9813
	1	OP( 0x0f, i_pre_v25 ) { UINT32 ModRM, tmp, tmp2;
	2	switch (FETCH()) {
	3	case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = Breg(CL) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
	4	case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = Breg(CL) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
	5	case 0x12 : BITOP_BYTE; CLKS(5,5,4); tmp2 = Breg(CL) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
	6	case 0x13 : BITOP_WORD; CLKS(5,5,4); tmp2 = Breg(CL) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
	7	case 0x14 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; tmp \|= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
	8	case 0x15 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; tmp \|= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
	9	case 0x16 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
	10	case 0x17 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
	11
	12	case 0x18 : BITOP_BYTE; CLKS(4,4,4); tmp2 = (FETCH()) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
	13	case 0x19 : BITOP_WORD; CLKS(4,4,4); tmp2 = (FETCH()) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
	14	case 0x1a : BITOP_BYTE; CLKS(6,6,4); tmp2 = (FETCH()) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
	15	case 0x1b : BITOP_WORD; CLKS(6,6,4); tmp2 = (FETCH()) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
	16	case 0x1c : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; tmp \|= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
	17	case 0x1d : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; tmp \|= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
	18	case 0x1e : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
	19	case 0x1f : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
	20
	21	case 0x20 : ADD4S; CLKS(7,7,2); break;
	22	case 0x22 : SUB4S; CLKS(7,7,2); break;
	23	case 0x26 : CMP4S; CLKS(7,7,2); break;
	24	case 0x28 : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp <<= 4; tmp \|= Breg(AL) & 0xf; Breg(AL) = (Breg(AL) & 0xf0) \| ((tmp>>8)&0xf); tmp &= 0xff; PutbackRMByte(ModRM,tmp); CLKM(13,13,9,28,28,15); break;
	25	case 0x2a : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp2 = (Breg(AL) & 0xf)<<4; Breg(AL) = (Breg(AL) & 0xf0) \| (tmp&0xf); tmp = tmp2 \| (tmp>>4); PutbackRMByte(ModRM,tmp); CLKM(17,17,13,32,32,19); break;
	26	case 0x31 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield INS\n",PC(nec_state)); break;
	27	case 0x33 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield EXT\n",PC(nec_state)); break;
	28	case 0x92 : CLK(2); break; /* V25/35 FINT */
	29	default: logerror("%06x: Unknown V25 instruction\n",PC(nec_state)); break;
	30	}
	31	}
	32
	33	OP( 0x63, i_brkn ) { nec_interrupt(nec_state, FETCH(),1); CLKS(50,50,24); }
	34	OP( 0xF1, i_brks ) { nec_interrupt(nec_state, FETCH(),2); CLKS(50,50,24); }

src/emu/cpu/f8/f8.c
r9812	r9813
288	288	* must move the contents of the data bus into the low order
289	289	* byte of PC0.
290	290	*/
291		cpustate->irq_vector = (*cpustate->irq_callback)(cpustate->device, ~~F8_INPUT_LINE_INT_REQ~~);
	291	cpustate->irq_vector = (*cpustate->irq_callback)(cpustate->device, 0);
292	292	cpustate->dbus = cpustate->irq_vector & 0x00ff;
293	293	cpustate->pc1 = cpustate->pc0;
294	294	cpustate->pc0 = (cpustate->pc0 & 0xff00) \| cpustate->dbus;

src/emu/video/mc6845.c
r9812	r9813
54	54	#define MODE_DISPLAY_ENABLE_SKEW(d) (((d)->mode_control & 0x10) != 0)
55	55	#define MODE_ROW_COLUMN_ADDRESSING(d) (((d)->mode_control & 0x04) != 0)
56	56
57		/* capabilities / / MC6845 MC6845-1 C6545-1 R6545-1 H46505 HD6845 SY6545-1 SY6845E */
	57	/* capabilities / / MC6845 MC6845-1 C6545-1 R6545-1 H46505 HD6845 SY6545-1 SY6845E */
58	58	static const int supports_disp_start_addr_r[NUM_TYPES] = { TRUE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE };
59	59	static const int supports_vert_sync_width[NUM_TYPES] = { FALSE, TRUE, TRUE, TRUE, FALSE, TRUE, TRUE, TRUE };
60	60	static const int supports_status_reg_d5[NUM_TYPES] = { FALSE, FALSE, TRUE, TRUE, FALSE, FALSE, TRUE, TRUE };

src/emu/video/tms9928a.c
r9812	r9813
135	135
136	136	typedef struct {
137	137	/* TMS9928A internal settings */
138		UINT8 ReadAhead,Regs[8],StatusReg,~~FirstByte,~~latch,INT;
	138	UINT8 ReadAhead,Regs[8],StatusReg,latch,INT;
139	139	INT32 Addr;
140	140	int colour,pattern,nametbl,spriteattribute,spritepattern;
141	141	int colourmask,patternmask;
r9812	r9813
173	173	tms.spritepattern = tms.spriteattribute = 0;
174	174	tms.colourmask = tms.patternmask = 0;
175	175	tms.Addr = tms.ReadAhead = tms.INT = 0;
176		tms.FirstByte = 0;
177	176	tms.latch = 0;
178	177	}
179	178
r9812	r9813
222	221	state_save_register_item(machine, "tms9928a", NULL, 0, tms.Regs[7]);
223	222	state_save_register_item(machine, "tms9928a", NULL, 0, tms.StatusReg);
224	223	state_save_register_item(machine, "tms9928a", NULL, 0, tms.ReadAhead);
225		state_save_register_item(machine, "tms9928a", NULL, 0, tms.FirstByte);
226	224	state_save_register_item(machine, "tms9928a", NULL, 0, tms.latch);
227	225	state_save_register_item(machine, "tms9928a", NULL, 0, tms.Addr);
228	226	state_save_register_item(machine, "tms9928a", NULL, 0, tms.INT);
r9812	r9813
282	280	WRITE8_HANDLER (TMS9928A_register_w) {
283	281	int reg;
284	282
285		if (tms.latch) {
286		if (data & 0x80) {
287		/* register write */
	283	if (tms.latch) {
	284	/* set high part of read/write address */
	285	tms.Addr = ((UINT16)data << 8 \| (tms.Addr & 0xff)) & (tms.vramsize - 1);
	286
	287	if (data & 0x80) {
	288	/* register write */
288	289	reg = data & 7;
289		/if (tms.FirstByte != tms.Regs[reg])/ /* Removed to fix ColecoVision MESS Driver*/
290		change_register (space->machine, reg, tms.FirstByte);
291		} else {
292		/* set read/write address */
293		tms.Addr = ((UINT16)data << 8 \| tms.FirstByte) & (tms.vramsize - 1);
294		if ( !(data & 0x40) ) {
	290	change_register (space->machine, reg, tms.Addr & 0xff);
	291	} else {
	292	if ( !(data & 0x40) ) {
295	293	/* read ahead */
296	294	TMS9928A_vram_r (space,0);
297		}
298		}
299		tms.latch = 0;
300		} else {
301		tms.FirstByte = data;
	295	}
	296	}
	297	tms.latch = 0;
	298	} else {
	299	/* set low part of read/write address */
	300	tms.Addr = ((tms.Addr & 0xff00) \| data) & (tms.vramsize - 1);
302	301	tms.latch = 1;
303		}
	302	}
304	303	}
305	304
306	305	static void change_register (running_machine *machine, int reg, UINT8 val) {

src/emu/sound/ym2413.c
r9812	r9813
164	164
165	165
166	166
167		typedef struct{
	167	typedef struct
	168	{
168	169	UINT32 ar; /* attack rate: AR<<2 */
169	170	UINT32 dr; /* decay rate: DR<<2 */
170	171	UINT32 rr; /* release rate:RR<<2 */
r9812	r9813
208	209	unsigned int wavetable;
209	210	} OPLL_SLOT;
210	211
211		typedef struct{
	212	typedef struct
	213	{
212	214	OPLL_SLOT SLOT[2];
213	215	/* phase generator state */
214	216	UINT32 block_fnum; /* block+fnum */
r9812	r9813
219	221	} OPLL_CH;
220	222
221	223	/* chip state */
222		typedef struct {
	224	typedef struct
	225	{
223	226	OPLL_CH P_CH[9]; /* OPLL chips have 9 channels*/
224	227	UINT8 instvol_r[9]; /* instrument/volume (or volume/volume in percussive mode)*/
225	228
r9812	r9813
231	234	UINT8 rhythm; /* Rhythm mode */
232	235
233	236	/* LFO */
	237	UINT32 LFO_AM;
	238	INT32 LFO_PM;
234	239	UINT32 lfo_am_cnt;
235	240	UINT32 lfo_am_inc;
236	241	UINT32 lfo_pm_cnt;
r9812	r9813
263	268	int rate; /* sampling rate (Hz) */
264	269	double freqbase; /* frequency base */
265	270	running_device *device;
	271
	272	signed int output[2];
	273	signed int outchan;
	274
266	275	} YM2413;
267	276
268	277	/* key scale level */
r9812	r9813
609	618	static int num_lock = 0;
610	619
611	620	/* work table */
612		static void cur_chip = NULL; / current chip pointer */
613		static OPLL_SLOT SLOT7_1,SLOT7_2,SLOT8_1,SLOT8_2;
	621	#define SLOT7_1 (&chip->P_CH[7].SLOT[SLOT1])
	622	#define SLOT7_2 (&chip->P_CH[7].SLOT[SLOT2])
	623	#define SLOT8_1 (&chip->P_CH[8].SLOT[SLOT1])
	624	#define SLOT8_2 (&chip->P_CH[8].SLOT[SLOT2])
614	625
615		static signed int output[2];
616		static signed int outchan;
617	626
618		static UINT32 LFO_AM;
619		static INT32 LFO_PM;
620
621
622		INLINE int limit( int val, int max, int min ) {
	627	INLINE int limit( int val, int max, int min )
	628	{
623	629	if ( val > max )
624	630	val = max;
625	631	else if ( val < min )
r9812	r9813
637	643	if (chip->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
638	644	chip->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH);
639	645
640		LFO_AM = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ] >> 1;
	646	chip->LFO_AM = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ] >> 1;
641	647
642	648	chip->lfo_pm_cnt += chip->lfo_pm_inc;
643		LFO_PM = (chip->lfo_pm_cnt>>LFO_SH) & 7;
	649	chip->LFO_PM = (chip->lfo_pm_cnt>>LFO_SH) & 7;
644	650	}
645	651
646	652	/* advance to next sample */
r9812	r9813
817	823
818	824	unsigned int fnum_lfo = 8*((CH->block_fnum&0x01c0) >> 6);
819	825	unsigned int block_fnum = CH->block_fnum * 2;
820		signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + fnum_lfo ];
	826	signed int lfo_fn_table_index_offset = lfo_pm_table[chip->LFO_PM + fnum_lfo ];
821	827
822	828	if (lfo_fn_table_index_offset) /* LFO phase modulation active */
823	829	{
r9812	r9813
904	910	}
905	911
906	912
907		#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask))
	913	#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (chip->LFO_AM & (OP)->AMmask))
908	914
909	915	/* calculate output */
910		INLINE void chan_calc( OPLL_CH *CH )
	916	INLINE void chan_calc( YM2413 chip, OPLL_CH CH )
911	917	{
912	918	OPLL_SLOT *SLOT;
913	919	unsigned int env;
r9812	r9813
934	940
935	941	/* SLOT 2 */
936	942
937		outchan=0;
	943	chip->outchan=0;
938	944
939	945	SLOT++;
940	946	env = volume_calc(SLOT);
941	947	if( env < ENV_QUIET )
942	948	{
943	949	signed int outp = op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
944		output[0] += outp;
945		outchan = outp;
946		//output[0] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
	950	chip->output[0] += outp;
	951	chip->outchan = outp;
	952	//chip->output[0] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
947	953	}
948	954	}
949	955
r9812	r9813
984	990
985	991	/* calculate rhythm */
986	992
987		INLINE void rhythm_calc( OPLL_CH *CH, unsigned int noise )
	993	INLINE void rhythm_calc( YM2413 chip, OPLL_CH CH, unsigned int noise )
988	994	{
989	995	OPLL_SLOT *SLOT;
990	996	signed int out;
r9812	r9813
1021	1027	SLOT++;
1022	1028	env = volume_calc(SLOT);
1023	1029	if( env < ENV_QUIET )
1024		output[1] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable) * 2;
	1030	chip->output[1] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable) * 2;
1025	1031
1026	1032
1027	1033	/* Phase generation is based on: */
r9812	r9813
1089	1095	phase = 0xd0>>2;
1090	1096	}
1091	1097
1092		output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
	1098	chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
1093	1099	}
1094	1100
1095	1101	/* Snare Drum (verified on real YM3812) */
r9812	r9813
1110	1116	if (noise)
1111	1117	phase ^= 0x100;
1112	1118
1113		output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2;
	1119	chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2;
1114	1120	}
1115	1121
1116	1122	/* Tom Tom (verified on real YM3812) */
1117	1123	env = volume_calc(SLOT8_1);
1118	1124	if( env < ENV_QUIET )
1119		output[1] += op_calc(SLOT8_1->phase, env, 0, SLOT8_1->wavetable) * 2;
	1125	chip->output[1] += op_calc(SLOT8_1->phase, env, 0, SLOT8_1->wavetable) * 2;
1120	1126
1121	1127	/* Top Cymbal (verified on real YM2413) */
1122	1128	env = volume_calc(SLOT8_2);
r9812	r9813
1143	1149	if (res2)
1144	1150	phase = 0x300;
1145	1151
1146		output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
	1152	chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
1147	1153	}
1148	1154
1149	1155	}
r9812	r9813
1923	1929
1924	1930	/* first time */
1925	1931
1926		cur_chip = NULL;
1927	1932	/* allocate total level table (128kb space) */
1928	1933	if( !init_tables() )
1929	1934	{
r9812	r9813
1950	1955
1951	1956	/* last time */
1952	1957
1953		cur_chip = NULL;
1954	1958	OPLCloseTable();
1955	1959
1956	1960	if (cymfile)
r9812	r9813
2119	2123
2120	2124	int i;
2121	2125
2122		if( (void *)chip != cur_chip ){
2123		cur_chip = (void *)chip;
2124		/* rhythm slots */
2125		SLOT7_1 = &chip->P_CH[7].SLOT[SLOT1];
2126		SLOT7_2 = &chip->P_CH[7].SLOT[SLOT2];
2127		SLOT8_1 = &chip->P_CH[8].SLOT[SLOT1];
2128		SLOT8_2 = &chip->P_CH[8].SLOT[SLOT2];
2129		}
2130
2131
2132	2126	for( i=0; i < length ; i++ )
2133	2127	{
2134	2128	int mo,ro;
2135	2129
2136		output[0] = 0;
2137		output[1] = 0;
	2130	chip->output[0] = 0;
	2131	chip->output[1] = 0;
2138	2132
2139	2133	advance_lfo(chip);
2140	2134
2141	2135	/* FM part */
2142		chan_calc(&chip->P_CH[0]);
	2136	chan_calc(chip, &chip->P_CH[0]);
2143	2137	//SAVE_SEPARATE_CHANNEL(0);
2144		chan_calc(&chip->P_CH[1]);
2145		chan_calc(&chip->P_CH[2]);
2146		chan_calc(&chip->P_CH[3]);
2147		chan_calc(&chip->P_CH[4]);
2148		chan_calc(&chip->P_CH[5]);
	2138	chan_calc(chip, &chip->P_CH[1]);
	2139	chan_calc(chip, &chip->P_CH[2]);
	2140	chan_calc(chip, &chip->P_CH[3]);
	2141	chan_calc(chip, &chip->P_CH[4]);
	2142	chan_calc(chip, &chip->P_CH[5]);
2149	2143
2150	2144	if(!rhythm)
2151	2145	{
2152		chan_calc(&chip->P_CH[6]);
2153		chan_calc(&chip->P_CH[7]);
2154		chan_calc(&chip->P_CH[8]);
	2146	chan_calc(chip, &chip->P_CH[6]);
	2147	chan_calc(chip, &chip->P_CH[7]);
	2148	chan_calc(chip, &chip->P_CH[8]);
2155	2149	}
2156	2150	else /* Rhythm part */
2157	2151	{
2158		rhythm_calc(&chip->P_CH[0], (chip->noise_rng>>0)&1 );
	2152	rhythm_calc(chip, &chip->P_CH[0], (chip->noise_rng>>0)&1 );
2159	2153	}
2160	2154
2161		mo = output[0];
2162		ro = output[1];
	2155	mo = chip->output[0];
	2156	ro = chip->output[1];
2163	2157
2164	2158	mo >>= FINAL_SH;
2165	2159	ro >>= FINAL_SH;

src/emu/sound/fm2612.c
r9812	r9813
670	670	UINT32 lfo_timer_overflow; /* LFO timer overflows every N samples (depends on LFO frequency) */
671	671	UINT32 LFO_AM; /* current LFO AM step */
672	672	UINT32 LFO_PM; /* current LFO PM step */
	673
	674	INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
	675	INT32 mem; /* one sample delay memory */
	676	INT32 out_fm[8]; /* outputs of working channels */
	677
673	678	} FM_OPN;
674	679
675	680	/* here's the virtual YM2612 */
r9812	r9813
685	690	INT32 dacout;
686	691	} YM2612;
687	692
688		/* current chip state */
689		static INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
690		static INT32 mem; /* one sample delay memory */
691
692		static INT32 out_fm[8]; /* outputs of working channels */
693
694	693	/* log output level */
695	694	#define LOG_ERR 3 /* ERROR */
696	695	#define LOG_WAR 2 /* WARNING */
r9812	r9813
1025	1024
1026	1025
1027	1026	/* set algorithm connection */
1028		static void setup_connection( FM_CH *CH, int ch )
	1027	static void setup_connection( FM_OPN OPN, FM_CH CH, int ch )
1029	1028	{
1030		INT32 *carrier = &out_fm[ch];
	1029	INT32 *carrier = &OPN->out_fm[ch];
1031	1030
1032	1031	INT32 **om1 = &CH->connect1;
1033	1032	INT32 **om2 = &CH->connect3;
r9812	r9813
1035	1034
1036	1035	INT32 **memc = &CH->mem_connect;
1037	1036
1038		switch( CH->ALGO ){
	1037	switch( CH->ALGO )
	1038	{
1039	1039	case 0:
1040	1040	/* M1---C1---MEM---M2---C2---OUT */
1041		*om1 = &c1;
1042		*oc1 = &mem;
1043		*om2 = &c2;
1044		*memc= &m2;
	1041	*om1 = &OPN->c1;
	1042	*oc1 = &OPN->mem;
	1043	*om2 = &OPN->c2;
	1044	*memc= &OPN->m2;
1045	1045	break;
1046	1046	case 1:
1047	1047	/* M1------+-MEM---M2---C2---OUT */
1048	1048	/* C1-+ */
1049		*om1 = &mem;
1050		*oc1 = &mem;
1051		*om2 = &c2;
1052		*memc= &m2;
	1049	*om1 = &OPN->mem;
	1050	*oc1 = &OPN->mem;
	1051	*om2 = &OPN->c2;
	1052	*memc= &OPN->m2;
1053	1053	break;
1054	1054	case 2:
1055	1055	/* M1-----------------+-C2---OUT */
1056	1056	/* C1---MEM---M2-+ */
1057		*om1 = &c2;
1058		*oc1 = &mem;
1059		*om2 = &c2;
1060		*memc= &m2;
	1057	*om1 = &OPN->c2;
	1058	*oc1 = &OPN->mem;
	1059	*om2 = &OPN->c2;
	1060	*memc= &OPN->m2;
1061	1061	break;
1062	1062	case 3:
1063	1063	/* M1---C1---MEM------+-C2---OUT */
1064	1064	/* M2-+ */
1065		*om1 = &c1;
1066		*oc1 = &mem;
1067		*om2 = &c2;
1068		*memc= &c2;
	1065	*om1 = &OPN->c1;
	1066	*oc1 = &OPN->mem;
	1067	*om2 = &OPN->c2;
	1068	*memc= &OPN->c2;
1069	1069	break;
1070	1070	case 4:
1071	1071	/* M1---C1-+-OUT */
1072	1072	/* M2---C2-+ */
1073	1073	/* MEM: not used */
1074		*om1 = &c1;
	1074	*om1 = &OPN->c1;
1075	1075	*oc1 = carrier;
1076		*om2 = &c2;
1077		memc= &mem; / store it anywhere where it will not be used */
	1076	*om2 = &OPN->c2;
	1077	memc= &OPN->mem; / store it anywhere where it will not be used */
1078	1078	break;
1079	1079	case 5:
1080	1080	/* +----C1----+ */
r9812	r9813
1083	1083	om1 = 0; / special mark */
1084	1084	*oc1 = carrier;
1085	1085	*om2 = carrier;
1086		*memc= &m2;
	1086	*memc= &OPN->m2;
1087	1087	break;
1088	1088	case 6:
1089	1089	/* M1---C1-+ */
1090	1090	/* M2-+-OUT */
1091	1091	/* C2-+ */
1092	1092	/* MEM: not used */
1093		*om1 = &c1;
	1093	*om1 = &OPN->c1;
1094	1094	*oc1 = carrier;
1095	1095	*om2 = carrier;
1096		memc= &mem; / store it anywhere where it will not be used */
	1096	memc= &OPN->mem; / store it anywhere where it will not be used */
1097	1097	break;
1098	1098	case 7:
1099	1099	/* M1-+ */
r9812	r9813
1104	1104	*om1 = carrier;
1105	1105	*oc1 = carrier;
1106	1106	*om2 = carrier;
1107		memc= &mem; / store it anywhere where it will not be used */
	1107	memc= &OPN->mem; / store it anywhere where it will not be used */
1108	1108	break;
1109	1109	}
1110	1110
r9812	r9813
1554	1554	/* Changed from INLINE to static to work around gcc 4.2.1 codegen bug */
1555	1555	static void refresh_fc_eg_chan(FM_OPN OPN, FM_CH CH )
1556	1556	{
1557		if( CH->SLOT[SLOT1].Incr==-1){
	1557	if( CH->SLOT[SLOT1].Incr==-1)
	1558	{
1558	1559	int fc = CH->fc;
1559	1560	int kc = CH->kcode;
1560	1561	refresh_fc_eg_slot(OPN, &CH->SLOT[SLOT1] , fc , kc );
r9812	r9813
1592	1593	{
1593	1594	UINT32 AM = OPN->LFO_AM >> CH->ams;
1594	1595
1595		m2 = c1 = c2 = mem = 0;
	1596	OPN->m2 = OPN->c1 = OPN->c2 = OPN->mem = 0;
1596	1597
1597	1598	CH->mem_connect = CH->mem_value; / restore delayed sample (MEM) value to m2 or c2 */
1598	1599
r9812	r9813
1601	1602	INT32 out = CH->op1_out[0] + CH->op1_out[1];
1602	1603	CH->op1_out[0] = CH->op1_out[1];
1603	1604
1604		if( !CH->connect1 ){
	1605	if( !CH->connect1 )
	1606	{
1605	1607	/* algorithm 5 */
1606		mem = c1 = c2 = CH->op1_out[0];
1607		}else{
	1608	OPN->mem = OPN->c1 = OPN->c2 = CH->op1_out[0];
	1609	}
	1610	else
	1611	{
1608	1612	/* other algorithms */
1609	1613	*CH->connect1 += CH->op1_out[0];
1610	1614	}
r9812	r9813
1622	1626
1623	1627	eg_out = volume_calc(&CH->SLOT[SLOT3]);
1624	1628	if( eg_out < ENV_QUIET ) /* SLOT 3 */
1625		*CH->connect3 += op_calc(CH->SLOT[SLOT3].phase, eg_out, m2);
	1629	*CH->connect3 += op_calc(CH->SLOT[SLOT3].phase, eg_out, OPN->m2);
1626	1630
1627	1631	eg_out = volume_calc(&CH->SLOT[SLOT2]);
1628	1632	if( eg_out < ENV_QUIET ) /* SLOT 2 */
1629		*CH->connect2 += op_calc(CH->SLOT[SLOT2].phase, eg_out, c1);
	1633	*CH->connect2 += op_calc(CH->SLOT[SLOT2].phase, eg_out, OPN->c1);
1630	1634
1631	1635	eg_out = volume_calc(&CH->SLOT[SLOT4]);
1632	1636	if( eg_out < ENV_QUIET ) /* SLOT 4 */
1633		*CH->connect4 += op_calc(CH->SLOT[SLOT4].phase, eg_out, c2);
	1637	*CH->connect4 += op_calc(CH->SLOT[SLOT4].phase, eg_out, OPN->c2);
1634	1638
1635	1639
1636	1640	/* store current MEM */
1637		CH->mem_value = mem;
	1641	CH->mem_value = OPN->mem;
1638	1642
1639	1643	/* update phase counters AFTER output calculations */
1640	1644	if(CH->pms)
r9812	r9813
1727	1731	UINT8 c;
1728	1732	FM_CH *CH;
1729	1733
1730		switch(r){
	1734	switch(r)
	1735	{
1731	1736	case 0x21: /* Test */
1732	1737	break;
1733	1738	case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/YM2612) */
r9812	r9813
1909	1914	break;
1910	1915
1911	1916	case 0xa0:
1912		switch( OPN_SLOT(r) ){
	1917	switch( OPN_SLOT(r) )
	1918	{
1913	1919	case 0: /* 0xa0-0xa2 : FNUM1 */
1914	1920	{
1915	1921	UINT32 fn = (((UINT32)( (OPN->ST.fn_h)&7))<<8) + v;
r9812	r9813
1949	1955	break;
1950	1956
1951	1957	case 0xb0:
1952		switch( OPN_SLOT(r) ){
	1958	switch( OPN_SLOT(r) )
	1959	{
1953	1960	case 0: /* 0xb0-0xb2 : FB,ALGO */
1954	1961	{
1955	1962	int feedback = (v>>3)&7;
1956	1963	CH->ALGO = v&7;
1957	1964	CH->FB = feedback ? feedback+6 : 0;
1958		setup_connection( CH, c );
	1965	setup_connection( OPN, CH, c );
1959	1966	}
1960	1967	break;
1961	1968	case 1: /* 0xb4-0xb6 : L , R , AMS , PMS (YM2612/YM2610B/YM2610/YM2608) */
r9812	r9813
2164	2171	/*******************************************************************************/
2165	2172	/* YM2612 local section */
2166	2173	/*******************************************************************************/
2167		static int dacen;
2168	2174
2169	2175	/* Generate samples for one of the YM2612s */
2170	2176	void ym2612_update_one(void chip, FMSAMPLE *buffer, int length)
2171	2177	{
2172	2178	YM2612 F2612 = (YM2612 )chip;
2173	2179	FM_OPN *OPN = &F2612->OPN;
	2180	INT32 *out_fm = OPN->out_fm;
2174	2181	int i;
2175	2182	FMSAMPLE bufL,bufR;
2176		INT32 dacout = F2612->dacout;
2177	2183	FM_CH *cch[6];
2178	2184	int lt,rt;
2179	2185
r9812	r9813
2187	2193	cch[3] = &F2612->CH[3];
2188	2194	cch[4] = &F2612->CH[4];
2189	2195	cch[5] = &F2612->CH[5];
2190		/* DAC mode */
2191		dacen = F2612->dacen;
2192	2196
2193	2197	/* refresh PG and EG */
2194	2198	refresh_fc_eg_chan( OPN, cch[0] );
r9812	r9813
2233	2237	chan_calc(F2612, OPN, cch[2]);
2234	2238	chan_calc(F2612, OPN, cch[3]);
2235	2239	chan_calc(F2612, OPN, cch[4]);
2236		if( dacen )
2237		*cch[5]->connect4 += dacout;
	2240	if( F2612->dacen )
	2241	*cch[5]->connect4 += F2612->dacout;
2238	2242	else
2239	2243	chan_calc(F2612, OPN, cch[5]);
2240	2244
r9812	r9813
2455	2459
2456	2460	v &= 0xff; /* adjust to 8 bit bus */
2457	2461
2458		switch( a&3){
	2462	switch( a&3)
	2463	{
2459	2464	case 0: /* address port 0 */
2460	2465	F2612->OPN.ST.address = v;
2461	2466	F2612->addr_A1 = 0;
r9812	r9813
2515	2520	{
2516	2521	YM2612 F2612 = (YM2612 )chip;
2517	2522
2518		switch( a&3){
	2523	switch( a&3)
	2524	{
2519	2525	case 0: /* status 0 */
2520	2526	return FM_STATUS_FLAG(&F2612->OPN.ST);
2521	2527	case 1:

src/emu/sound/ymf262.c
r9812	r9813
141	141	#define OPL3_TYPE_YMF262 (0) /* 36 operators, 8 waveforms */
142	142
143	143
144		typedef struct{
	144	typedef struct
	145	{
145	146	UINT32 ar; /* attack rate: AR<<2 */
146	147	UINT32 dr; /* decay rate: DR<<2 */
147	148	UINT32 rr; /* release rate:RR<<2 */
r9812	r9813
191	192
192	193	} OPL3_SLOT;
193	194
194		typedef struct{
	195	typedef struct
	196	{
195	197	OPL3_SLOT SLOT[2];
196	198
197	199	UINT32 block_fnum; /* block+fnum */
r9812	r9813
216	218	} OPL3_CH;
217	219
218	220	/* OPL3 state */
219		typedef struct {
	221	typedef struct
	222	{
220	223	OPL3_CH P_CH[18]; /* OPL3 chips have 18 channels */
221	224
222	225	UINT32 pan[184]; / channels output masks (0xffffffff = enable); 4 masks per one channel */
223	226	UINT32 pan_ctrl_value[18]; /* output control values 1 per one channel (1 value contains 4 masks) */
224	227
	228	signed int chanout[18];
	229	signed int phase_modulation; /* phase modulation input (SLOT 2) */
	230	signed int phase_modulation2; /* phase modulation input (SLOT 3 in 4 operator channels) */
	231
225	232	UINT32 eg_cnt; /* global envelope generator counter */
226	233	UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/288 (288=836) /
227	234	UINT32 eg_timer_add; /* step of eg_timer */
r9812	r9813
230	237	UINT32 fn_tab[1024]; /* fnumber->increment counter */
231	238
232	239	/* LFO */
	240	UINT32 LFO_AM;
	241	INT32 LFO_PM;
	242
233	243	UINT8 lfo_am_depth;
234	244	UINT8 lfo_pm_depth_range;
235	245	UINT32 lfo_am_cnt;
r9812	r9813
586	596	static int num_lock = 0;
587	597
588	598	/* work table */
589		static void cur_chip = NULL; / current chip point */
590		static OPL3_SLOT SLOT7_1,SLOT7_2,SLOT8_1,SLOT8_2;
	599	#define SLOT7_1 (&chip->P_CH[7].SLOT[SLOT1])
	600	#define SLOT7_2 (&chip->P_CH[7].SLOT[SLOT2])
	601	#define SLOT8_1 (&chip->P_CH[8].SLOT[SLOT1])
	602	#define SLOT8_2 (&chip->P_CH[8].SLOT[SLOT2])
591	603
592		static signed int phase_modulation; /* phase modulation input (SLOT 2) */
593		static signed int phase_modulation2; /* phase modulation input (SLOT 3 in 4 operator channels) */
594		static signed int chanout[18]; /* 18 channels */
595	604
596	605
597		static UINT32 LFO_AM;
598		static INT32 LFO_PM;
599	606
600	607
601
602	608	INLINE int limit( int val, int max, int min ) {
603	609	if ( val > max )
604	610	val = max;
r9812	r9813
664	670	tmp = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ];
665	671
666	672	if (chip->lfo_am_depth)
667		LFO_AM = tmp;
	673	chip->LFO_AM = tmp;
668	674	else
669		LFO_AM = tmp>>2;
	675	chip->LFO_AM = tmp>>2;
670	676
671	677	chip->lfo_pm_cnt += chip->lfo_pm_inc;
672		LFO_PM = ((chip->lfo_pm_cnt>>LFO_SH) & 7) \| chip->lfo_pm_depth_range;
	678	chip->LFO_PM = ((chip->lfo_pm_cnt>>LFO_SH) & 7) \| chip->lfo_pm_depth_range;
673	679	}
674	680
675	681	/* advance to next sample */
r9812	r9813
784	790
785	791	unsigned int fnum_lfo = (block_fnum&0x0380) >> 7;
786	792
787		signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + 16*fnum_lfo ];
	793	signed int lfo_fn_table_index_offset = lfo_pm_table[chip->LFO_PM + 16*fnum_lfo ];
788	794
789	795	if (lfo_fn_table_index_offset) /* LFO phase modulation active */
790	796	{
r9812	r9813
864	870	}
865	871
866	872
867		#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask))
	873	#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (chip->LFO_AM & (OP)->AMmask))
868	874
869	875	/* calculate output of a standard 2 operator channel
870	876	(or 1st part of a 4-op channel) */
871		INLINE void chan_calc( OPL3_CH *CH )
	877	INLINE void chan_calc( OPL3 chip, OPL3_CH CH )
872	878	{
873	879	OPL3_SLOT *SLOT;
874	880	unsigned int env;
875	881	signed int out;
876	882
877		phase_modulation = 0;
878		phase_modulation2= 0;
	883	chip->phase_modulation = 0;
	884	chip->phase_modulation2= 0;
879	885
880	886	/* SLOT 1 */
881	887	SLOT = &CH->SLOT[SLOT1];
r9812	r9813
896	902	SLOT++;
897	903	env = volume_calc(SLOT);
898	904	if( env < ENV_QUIET )
899		*SLOT->connect += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable);
	905	*SLOT->connect += op_calc(SLOT->Cnt, env, chip->phase_modulation, SLOT->wavetable);
900	906
901		//logerror("out1=%5i vol1=%4i\n", op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable), env );
	907	//logerror("out1=%5i vol1=%4i\n", op_calc(SLOT->Cnt, env, chip->phase_modulation, SLOT->wavetable), env );
902	908
903	909	}
904	910
905	911	/* calculate output of a 2nd part of 4-op channel */
906		INLINE void chan_calc_ext( OPL3_CH *CH )
	912	INLINE void chan_calc_ext( OPL3 chip, OPL3_CH CH )
907	913	{
908	914	OPL3_SLOT *SLOT;
909	915	unsigned int env;
910	916
911		phase_modulation = 0;
	917	chip->phase_modulation = 0;
912	918
913	919	/* SLOT 1 */
914	920	SLOT = &CH->SLOT[SLOT1];
915	921	env = volume_calc(SLOT);
916	922	if( env < ENV_QUIET )
917		*SLOT->connect += op_calc(SLOT->Cnt, env, phase_modulation2, SLOT->wavetable );
	923	*SLOT->connect += op_calc(SLOT->Cnt, env, chip->phase_modulation2, SLOT->wavetable );
918	924
919	925	/* SLOT 2 */
920	926	SLOT++;
921	927	env = volume_calc(SLOT);
922	928	if( env < ENV_QUIET )
923		*SLOT->connect += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable);
	929	*SLOT->connect += op_calc(SLOT->Cnt, env, chip->phase_modulation, SLOT->wavetable);
924	930
925	931	}
926	932
r9812	r9813
961	967
962	968	/* calculate rhythm */
963	969
964		INLINE void chan_calc_rhythm( OPL3_CH *CH, unsigned int noise )
	970	INLINE void chan_calc_rhythm( OPL3 chip, OPL3_CH CH, unsigned int noise )
965	971	{
966	972	OPL3_SLOT *SLOT;
	973	signed int *chanout = chip->chanout;
967	974	signed int out;
968	975	unsigned int env;
969	976
r9812	r9813
975	982	- output sample always is multiplied by 2
976	983	*/
977	984
978		phase_modulation = 0;
	985	chip->phase_modulation = 0;
979	986
980	987	/* SLOT 1 */
981	988	SLOT = &CH[6].SLOT[SLOT1];
r9812	r9813
985	992	SLOT->op1_out[0] = SLOT->op1_out[1];
986	993
987	994	if (!SLOT->CON)
988		phase_modulation = SLOT->op1_out[0];
	995	chip->phase_modulation = SLOT->op1_out[0];
989	996	//else ignore output of operator 1
990	997
991	998	SLOT->op1_out[1] = 0;
r9812	r9813
1000	1007	SLOT++;
1001	1008	env = volume_calc(SLOT);
1002	1009	if( env < ENV_QUIET )
1003		chanout[6] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable) * 2;
	1010	chanout[6] += op_calc(SLOT->Cnt, env, chip->phase_modulation, SLOT->wavetable) * 2;
1004	1011
1005	1012
1006	1013	/* Phase generation is based on: */
r9812	r9813
1614	1621	static void OPL3WriteReg(OPL3 *chip, int r, int v)
1615	1622	{
1616	1623	OPL3_CH *CH;
	1624	signed int *chanout = chip->chanout;
1617	1625	unsigned int ch_offset = 0;
1618	1626	int slot;
1619	1627	int block_fnum;
r9812	r9813
2102	2110	case 0:
2103	2111	/* 1 -> 2 -> 3 -> 4 - out */
2104	2112
2105		CH->SLOT[SLOT1].connect = &phase_modulation;
2106		CH->SLOT[SLOT2].connect = &phase_modulation2;
2107		(CH+3)->SLOT[SLOT1].connect = &phase_modulation;
	2113	CH->SLOT[SLOT1].connect = &chip->phase_modulation;
	2114	CH->SLOT[SLOT2].connect = &chip->phase_modulation2;
	2115	(CH+3)->SLOT[SLOT1].connect = &chip->phase_modulation;
2108	2116	(CH+3)->SLOT[SLOT2].connect = &chanout[ chan_no + 3 ];
2109	2117	break;
2110	2118	case 1:
2111	2119	/* 1 -> 2 -\
2112	2120	3 -> 4 -+- out */
2113	2121
2114		CH->SLOT[SLOT1].connect = &phase_modulation;
	2122	CH->SLOT[SLOT1].connect = &chip->phase_modulation;
2115	2123	CH->SLOT[SLOT2].connect = &chanout[ chan_no ];
2116		(CH+3)->SLOT[SLOT1].connect = &phase_modulation;
	2124	(CH+3)->SLOT[SLOT1].connect = &chip->phase_modulation;
2117	2125	(CH+3)->SLOT[SLOT2].connect = &chanout[ chan_no + 3 ];
2118	2126	break;
2119	2127	case 2:
r9812	r9813
2121	2129	2 -> 3 -> 4 -+- out */
2122	2130
2123	2131	CH->SLOT[SLOT1].connect = &chanout[ chan_no ];
2124		CH->SLOT[SLOT2].connect = &phase_modulation2;
2125		(CH+3)->SLOT[SLOT1].connect = &phase_modulation;
	2132	CH->SLOT[SLOT2].connect = &chip->phase_modulation2;
	2133	(CH+3)->SLOT[SLOT1].connect = &chip->phase_modulation;
2126	2134	(CH+3)->SLOT[SLOT2].connect = &chanout[ chan_no + 3 ];
2127	2135	break;
2128	2136	case 3:
r9812	r9813
2130	2138	2 -> 3 -+- out
2131	2139	4 ------/ */
2132	2140	CH->SLOT[SLOT1].connect = &chanout[ chan_no ];
2133		CH->SLOT[SLOT2].connect = &phase_modulation2;
	2141	CH->SLOT[SLOT2].connect = &chip->phase_modulation2;
2134	2142	(CH+3)->SLOT[SLOT1].connect = &chanout[ chan_no + 3 ];
2135	2143	(CH+3)->SLOT[SLOT2].connect = &chanout[ chan_no + 3 ];
2136	2144	break;
r9812	r9813
2139	2147	else
2140	2148	{
2141	2149	/* 2 operators mode */
2142		CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &phase_modulation;
	2150	CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &chip->phase_modulation;
2143	2151	CH->SLOT[SLOT2].connect = &chanout[(r&0xf)+ch_offset];
2144	2152	}
2145	2153	break;
r9812	r9813
2154	2162	case 0:
2155	2163	/* 1 -> 2 -> 3 -> 4 - out */
2156	2164
2157		(CH-3)->SLOT[SLOT1].connect = &phase_modulation;
2158		(CH-3)->SLOT[SLOT2].connect = &phase_modulation2;
2159		CH->SLOT[SLOT1].connect = &phase_modulation;
	2165	(CH-3)->SLOT[SLOT1].connect = &chip->phase_modulation;
	2166	(CH-3)->SLOT[SLOT2].connect = &chip->phase_modulation2;
	2167	CH->SLOT[SLOT1].connect = &chip->phase_modulation;
2160	2168	CH->SLOT[SLOT2].connect = &chanout[ chan_no ];
2161	2169	break;
2162	2170	case 1:
2163	2171	/* 1 -> 2 -\
2164	2172	3 -> 4 -+- out */
2165	2173
2166		(CH-3)->SLOT[SLOT1].connect = &phase_modulation;
	2174	(CH-3)->SLOT[SLOT1].connect = &chip->phase_modulation;
2167	2175	(CH-3)->SLOT[SLOT2].connect = &chanout[ chan_no - 3 ];
2168		CH->SLOT[SLOT1].connect = &phase_modulation;
	2176	CH->SLOT[SLOT1].connect = &chip->phase_modulation;
2169	2177	CH->SLOT[SLOT2].connect = &chanout[ chan_no ];
2170	2178	break;
2171	2179	case 2:
r9812	r9813
2173	2181	2 -> 3 -> 4 -+- out */
2174	2182
2175	2183	(CH-3)->SLOT[SLOT1].connect = &chanout[ chan_no - 3 ];
2176		(CH-3)->SLOT[SLOT2].connect = &phase_modulation2;
2177		CH->SLOT[SLOT1].connect = &phase_modulation;
	2184	(CH-3)->SLOT[SLOT2].connect = &chip->phase_modulation2;
	2185	CH->SLOT[SLOT1].connect = &chip->phase_modulation;
2178	2186	CH->SLOT[SLOT2].connect = &chanout[ chan_no ];
2179	2187	break;
2180	2188	case 3:
r9812	r9813
2182	2190	2 -> 3 -+- out
2183	2191	4 ------/ */
2184	2192	(CH-3)->SLOT[SLOT1].connect = &chanout[ chan_no - 3 ];
2185		(CH-3)->SLOT[SLOT2].connect = &phase_modulation2;
	2193	(CH-3)->SLOT[SLOT2].connect = &chip->phase_modulation2;
2186	2194	CH->SLOT[SLOT1].connect = &chanout[ chan_no ];
2187	2195	CH->SLOT[SLOT2].connect = &chanout[ chan_no ];
2188	2196	break;
r9812	r9813
2191	2199	else
2192	2200	{
2193	2201	/* 2 operators mode */
2194		CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &phase_modulation;
	2202	CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &chip->phase_modulation;
2195	2203	CH->SLOT[SLOT2].connect = &chanout[(r&0xf)+ch_offset];
2196	2204	}
2197	2205	break;
2198	2206
2199	2207	default:
2200	2208	/* 2 operators mode */
2201		CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &phase_modulation;
	2209	CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &chip->phase_modulation;
2202	2210	CH->SLOT[SLOT2].connect = &chanout[(r&0xf)+ch_offset];
2203	2211	break;
2204	2212	}
r9812	r9813
2206	2214	else
2207	2215	{
2208	2216	/* OPL2 mode - always 2 operators mode */
2209		CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &phase_modulation;
	2217	CH->SLOT[SLOT1].connect = CH->SLOT[SLOT1].CON ? &chanout[(r&0xf)+ch_offset] : &chip->phase_modulation;
2210	2218	CH->SLOT[SLOT2].connect = &chanout[(r&0xf)+ch_offset];
2211	2219	}
2212	2220	break;
r9812	r9813
2250	2258
2251	2259	/* first time */
2252	2260
2253		cur_chip = NULL;
2254
2255	2261	if( !init_tables() )
2256	2262	{
2257	2263	num_lock--;
r9812	r9813
2276	2282	if(num_lock) return;
2277	2283
2278	2284	/* last time */
2279
2280		cur_chip = NULL;
2281	2285	OPLCloseTable();
2282	2286
2283	2287	if (LOG_CYM_FILE)
r9812	r9813
2517	2521	*/
2518	2522	void ymf262_update_one(void _chip, OPL3SAMPLE *buffers, int length)
2519	2523	{
	2524	int i;
2520	2525	OPL3 chip = (OPL3 )_chip;
	2526	signed int *chanout = chip->chanout;
2521	2527	UINT8 rhythm = chip->rhythm&0x20;
2522	2528
2523	2529	OPL3SAMPLE *ch_a = buffers[0];
r9812	r9813
2525	2531	OPL3SAMPLE *ch_c = buffers[2];
2526	2532	OPL3SAMPLE *ch_d = buffers[3];
2527	2533
2528		int i;
2529
2530		if( (void *)chip != cur_chip ){
2531		cur_chip = (void *)chip;
2532		/* rhythm slots */
2533		SLOT7_1 = &chip->P_CH[7].SLOT[SLOT1];
2534		SLOT7_2 = &chip->P_CH[7].SLOT[SLOT2];
2535		SLOT8_1 = &chip->P_CH[8].SLOT[SLOT1];
2536		SLOT8_2 = &chip->P_CH[8].SLOT[SLOT2];
2537		}
2538	2534	for( i=0; i < length ; i++ )
2539	2535	{
2540	2536	int a,b,c,d;
r9812	r9813
2543	2539	advance_lfo(chip);
2544	2540
2545	2541	/* clear channel outputs */
2546		memset(chanout, 0, sizeof(sign~~ed in~~t) * 18);
	2542	memset(chip->chanout, 0, sizeof(chip->chanout));
2547	2543
2548	2544	#if 1
2549	2545	/* register set #1 */
2550		chan_calc(&chip->P_CH[0]); /* extended 4op ch#0 part 1 or 2op ch#0 */
	2546	chan_calc(chip, &chip->P_CH[0]); /* extended 4op ch#0 part 1 or 2op ch#0 */
2551	2547	if (chip->P_CH[0].extended)
2552		chan_calc_ext(&chip->P_CH[3]); /* extended 4op ch#0 part 2 */
	2548	chan_calc_ext(chip, &chip->P_CH[3]); /* extended 4op ch#0 part 2 */
2553	2549	else
2554		chan_calc(&chip->P_CH[3]); /* standard 2op ch#3 */
	2550	chan_calc(chip, &chip->P_CH[3]); /* standard 2op ch#3 */
2555	2551
2556	2552
2557		chan_calc(&chip->P_CH[1]); /* extended 4op ch#1 part 1 or 2op ch#1 */
	2553	chan_calc(chip, &chip->P_CH[1]); /* extended 4op ch#1 part 1 or 2op ch#1 */
2558	2554	if (chip->P_CH[1].extended)
2559		chan_calc_ext(&chip->P_CH[4]); /* extended 4op ch#1 part 2 */
	2555	chan_calc_ext(chip, &chip->P_CH[4]); /* extended 4op ch#1 part 2 */
2560	2556	else
2561		chan_calc(&chip->P_CH[4]); /* standard 2op ch#4 */
	2557	chan_calc(chip, &chip->P_CH[4]); /* standard 2op ch#4 */
2562	2558
2563	2559
2564		chan_calc(&chip->P_CH[2]); /* extended 4op ch#2 part 1 or 2op ch#2 */
	2560	chan_calc(chip, &chip->P_CH[2]); /* extended 4op ch#2 part 1 or 2op ch#2 */
2565	2561	if (chip->P_CH[2].extended)
2566		chan_calc_ext(&chip->P_CH[5]); /* extended 4op ch#2 part 2 */
	2562	chan_calc_ext(chip, &chip->P_CH[5]); /* extended 4op ch#2 part 2 */
2567	2563	else
2568		chan_calc(&chip->P_CH[5]); /* standard 2op ch#5 */
	2564	chan_calc(chip, &chip->P_CH[5]); /* standard 2op ch#5 */
2569	2565
2570	2566
2571	2567	if(!rhythm)
2572	2568	{
2573		chan_calc(&chip->P_CH[6]);
2574		chan_calc(&chip->P_CH[7]);
2575		chan_calc(&chip->P_CH[8]);
	2569	chan_calc(chip, &chip->P_CH[6]);
	2570	chan_calc(chip, &chip->P_CH[7]);
	2571	chan_calc(chip, &chip->P_CH[8]);
2576	2572	}
2577	2573	else /* Rhythm part */
2578	2574	{
2579		chan_calc_rhythm(&chip->P_CH[0], (chip->noise_rng>>0)&1 );
	2575	chan_calc_rhythm(chip, &chip->P_CH[0], (chip->noise_rng>>0)&1 );
2580	2576	}
2581	2577
2582	2578	/* register set #2 */
2583		chan_calc(&chip->P_CH[ 9]);
	2579	chan_calc(chip, &chip->P_CH[ 9]);
2584	2580	if (chip->P_CH[9].extended)
2585		chan_calc_ext(&chip->P_CH[12]);
	2581	chan_calc_ext(chip, &chip->P_CH[12]);
2586	2582	else
2587		chan_calc(&chip->P_CH[12]);
	2583	chan_calc(chip, &chip->P_CH[12]);
2588	2584
2589	2585
2590		chan_calc(&chip->P_CH[10]);
	2586	chan_calc(chip, &chip->P_CH[10]);
2591	2587	if (chip->P_CH[10].extended)
2592		chan_calc_ext(&chip->P_CH[13]);
	2588	chan_calc_ext(chip, &chip->P_CH[13]);
2593	2589	else
2594		chan_calc(&chip->P_CH[13]);
	2590	chan_calc(chip, &chip->P_CH[13]);
2595	2591
2596	2592
2597		chan_calc(&chip->P_CH[11]);
	2593	chan_calc(chip, &chip->P_CH[11]);
2598	2594	if (chip->P_CH[11].extended)
2599		chan_calc_ext(&chip->P_CH[14]);
	2595	chan_calc_ext(chip, &chip->P_CH[14]);
2600	2596	else
2601		chan_calc(&chip->P_CH[14]);
	2597	chan_calc(chip, &chip->P_CH[14]);
2602	2598
2603	2599
2604	2600	/* channels 15,16,17 are fixed 2-operator channels only */
2605		chan_calc(&chip->P_CH[15]);
2606		chan_calc(&chip->P_CH[16]);
2607		chan_calc(&chip->P_CH[17]);
	2601	chan_calc(chip, &chip->P_CH[15]);
	2602	chan_calc(chip, &chip->P_CH[16]);
	2603	chan_calc(chip, &chip->P_CH[17]);
2608	2604	#endif
2609	2605
2610	2606	/* accumulator register set #1 */

src/emu/sound/ymf271.c
r9812	r9813
122	122	static INT16 *wavetable[8];
123	123	static double plfo_table[4][8][LFO_LENGTH];
124	124	static int alfo_table[4][LFO_LENGTH];
125		static INT32 *mix;
126	125
127	126	#define ENV_ATTACK 0
128	127	#define ENV_DECAY1 1
r9812	r9813
709	708	int i, j;
710	709	int op;
711	710	INT32 *mixp;
	711	INT32 mix[48000*2];
712	712	YMF271Chip chip = (YMF271Chip )param;
713	713
714	714	memset(mix, 0, sizeof(mix[0])samples2);
r9812	r9813
1403	1403
1404	1404	static UINT8 ymf271_read_ext_memory(YMF271Chip *chip, UINT32 address)
1405	1405	{
1406		if( chip->ext_mem_read.read ) {
	1406	if( chip->ext_mem_read.read )
	1407	{
1407	1408	return devcb_call_read8(&chip->ext_mem_read, address);
1408		} else {
	1409	}
	1410	else
	1411	{
1409	1412	if( address < 0x800000)
1410	1413	return chip->rom[address];
1411	1414	}
r9812	r9813
1671	1674	tri_wave = ((i % (LFO_LENGTH/2)) * ALFO_MAX) / (LFO_LENGTH/2);
1672	1675	alfo_table[3][i] = (i < (LFO_LENGTH/2)) ? ALFO_MAX-tri_wave : tri_wave;
1673	1676	}
1674
1675		mix = auto_alloc_array(machine, INT32, 48000*2);
1676	1677	}
1677	1678
1678	1679	static void init_state(YMF271Chip chip, running_device device)

src/emu/sound/ym2151.c
r9812	r9813
24	24
25	25
26	26	/* struct describing a single operator */
27		typedef struct{
	27	typedef struct
	28	{
28	29	UINT32 phase; /* accumulated operator phase */
29	30	UINT32 freq; /* operator frequency count */
30	31	INT32 dt1; /* current DT1 (detune 1 phase inc/decrement) value */
r9812	r9813
78	79
79	80	typedef struct
80	81	{
	82	signed int chanout[8];
	83	signed int m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
	84	signed int mem; /* one sample delay memory */
	85
81	86	YM2151Operator oper[32]; /* the 32 operators */
82	87
83	88	UINT32 pan[16]; /* channels output masks (0xffffffff = enable) */
r9812	r9813
476	481
477	482
478	483
479		/* these variables stay here for speedup purposes only */
480		static YM2151 * PSG;
481		static signed int chanout[8];
482		static signed int m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
483		static signed int mem; /* one sample delay memory */
484	484
485
486	485	/* save output as raw 16-bit sample */
487	486	/* #define SAVE_SAMPLE */
488	487	/* #define SAVE_SEPARATE_CHANNELS */
r9812	r9813
752	751	} \
753	752	}
754	753
755		INLINE void envelope_KONKOFF(YM2151Operator * op, int v)
	754	INLINE void envelope_KONKOFF(YM2151 PSG, YM2151Operator op, int v)
756	755	{
757	756	if (v&0x08) /* M1 */
758	757	KEY_ON (op+0, 1)
r9812	r9813
856	855
857	856
858	857
859		INLINE void set_connect( YM2151Operator *om1, int cha, int v)
	858	INLINE void set_connect(YM2151 PSG, YM2151Operator om1, int cha, int v)
860	859	{
861	860	YM2151Operator *om2 = om1+1;
862	861	YM2151Operator *oc1 = om1+2;
r9812	r9813
869	868	{
870	869	case 0:
871	870	/* M1---C1---MEM---M2---C2---OUT */
872		om1->connect = &c1;
873		oc1->connect = &mem;
874		om2->connect = &c2;
875		om1->mem_connect = &m2;
	871	om1->connect = &PSG->c1;
	872	oc1->connect = &PSG->mem;
	873	om2->connect = &PSG->c2;
	874	om1->mem_connect = &PSG->m2;
876	875	break;
877	876
878	877	case 1:
879	878	/* M1------+-MEM---M2---C2---OUT */
880	879	/* C1-+ */
881		om1->connect = &mem;
882		oc1->connect = &mem;
883		om2->connect = &c2;
884		om1->mem_connect = &m2;
	880	om1->connect = &PSG->mem;
	881	oc1->connect = &PSG->mem;
	882	om2->connect = &PSG->c2;
	883	om1->mem_connect = &PSG->m2;
885	884	break;
886	885
887	886	case 2:
888	887	/* M1-----------------+-C2---OUT */
889	888	/* C1---MEM---M2-+ */
890		om1->connect = &c2;
891		oc1->connect = &mem;
892		om2->connect = &c2;
893		om1->mem_connect = &m2;
	889	om1->connect = &PSG->c2;
	890	oc1->connect = &PSG->mem;
	891	om2->connect = &PSG->c2;
	892	om1->mem_connect = &PSG->m2;
894	893	break;
895	894
896	895	case 3:
897	896	/* M1---C1---MEM------+-C2---OUT */
898	897	/* M2-+ */
899		om1->connect = &c1;
900		oc1->connect = &mem;
901		om2->connect = &c2;
902		om1->mem_connect = &c2;
	898	om1->connect = &PSG->c1;
	899	oc1->connect = &PSG->mem;
	900	om2->connect = &PSG->c2;
	901	om1->mem_connect = &PSG->c2;
903	902	break;
904	903
905	904	case 4:
906	905	/* M1---C1-+-OUT */
907	906	/* M2---C2-+ */
908	907	/* MEM: not used */
909		om1->connect = &c1;
910		oc1->connect = &chanout[cha];
911		om2->connect = &c2;
912		om1->mem_connect = &mem; /* store it anywhere where it will not be used */
	908	om1->connect = &PSG->c1;
	909	oc1->connect = &PSG->chanout[cha];
	910	om2->connect = &PSG->c2;
	911	om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
913	912	break;
914	913
915	914	case 5:
r9812	r9813
917	916	/* M1-+-MEM---M2-+-OUT */
918	917	/* +----C2----+ */
919	918	om1->connect = 0; /* special mark */
920		oc1->connect = &chanout[cha];
921		om2->connect = &chanout[cha];
922		om1->mem_connect = &m2;
	919	oc1->connect = &PSG->chanout[cha];
	920	om2->connect = &PSG->chanout[cha];
	921	om1->mem_connect = &PSG->m2;
923	922	break;
924	923
925	924	case 6:
r9812	r9813
927	926	/* M2-+-OUT */
928	927	/* C2-+ */
929	928	/* MEM: not used */
930		om1->connect = &c1;
931		oc1->connect = &chanout[cha];
932		om2->connect = &chanout[cha];
933		om1->mem_connect = &mem; /* store it anywhere where it will not be used */
	929	om1->connect = &PSG->c1;
	930	oc1->connect = &PSG->chanout[cha];
	931	om2->connect = &PSG->chanout[cha];
	932	om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
934	933	break;
935	934
936	935	case 7:
r9812	r9813
939	938	/* M2-+ */
940	939	/* C2-+ */
941	940	/* MEM: not used*/
942		om1->connect = &chanout[cha];
943		oc1->connect = &chanout[cha];
944		om2->connect = &chanout[cha];
945		om1->mem_connect = &mem; /* store it anywhere where it will not be used */
	941	om1->connect = &PSG->chanout[cha];
	942	oc1->connect = &PSG->chanout[cha];
	943	om2->connect = &PSG->chanout[cha];
	944	om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
946	945	break;
947	946	}
948	947	}
r9812	r9813
1062	1061	}
1063	1062
1064	1063
1065		switch(r & 0xe0){
	1064	switch(r & 0xe0)
	1065	{
1066	1066	case 0x00:
1067	1067	switch(r){
1068	1068	case 0x01: /* LFO reset(bit 1), Test Register (other bits) */
r9812	r9813
1071	1071	break;
1072	1072
1073	1073	case 0x08:
1074		PSG = chip; /* PSG is used in KEY_ON macro */
1075		envelope_KONKOFF(&chip->oper[ (v&7)*4 ], v );
	1074	envelope_KONKOFF(chip, &chip->oper[ (v&7)*4 ], v );
1076	1075	break;
1077	1076
1078	1077	case 0x0f: /* noise mode enable, noise period */
r9812	r9813
1120	1119	#endif
1121	1120	}
1122	1121
1123		if (v&0x02){ /* load and start timer B */
	1122	if (v&0x02)
	1123	{ /* load and start timer B */
1124	1124	#ifdef USE_MAME_TIMERS
1125	1125	/* ASG 980324: added a real timer */
1126	1126	/* start timer _only_ if it wasn't already started (it will reload time value next round) */
r9812	r9813
1136	1136	chip->tim_B_val = chip->tim_B_tab[ chip->timer_B_index ];
1137	1137	}
1138	1138	#endif
1139		}else{ /* stop timer B */
	1139	}
	1140	else
	1141	{ /* stop timer B */
1140	1142	#ifdef USE_MAME_TIMERS
1141	1143	/* ASG 980324: added a real timer */
1142	1144	timer_enable(chip->timer_B, 0);
r9812	r9813
1145	1147	#endif
1146	1148	}
1147	1149
1148		if (v&0x01){ /* load and start timer A */
	1150	if (v&0x01)
	1151	{ /* load and start timer A */
1149	1152	#ifdef USE_MAME_TIMERS
1150	1153	/* ASG 980324: added a real timer */
1151	1154	/* start timer _only_ if it wasn't already started (it will reload time value next round) */
r9812	r9813
1161	1164	chip->tim_A_val = chip->tim_A_tab[ chip->timer_A_index ];
1162	1165	}
1163	1166	#endif
1164		}else{ /* stop timer A */
	1167	}
	1168	else
	1169	{ /* stop timer A */
1165	1170	#ifdef USE_MAME_TIMERS
1166	1171	/* ASG 980324: added a real timer */
1167	1172	timer_enable(chip->timer_A, 0);
r9812	r9813
1199	1204
1200	1205	case 0x20:
1201	1206	op = &chip->oper[ (r&7) * 4 ];
1202		switch(r & 0x18){
	1207	switch(r & 0x18)
	1208	{
1203	1209	case 0x00: /* RL enable, Feedback, Connection */
1204	1210	op->fb_shift = ((v>>3)&7) ? ((v>>3)&7)+6:0;
1205	1211	chip->pan[ (r&7)*2 ] = (v & 0x40) ? ~0 : 0;
1206	1212	chip->pan[ (r&7)*2 +1 ] = (v & 0x80) ? ~0 : 0;
1207	1213	chip->connect[r&7] = v&7;
1208		set_connect(op, r&7, v&7);
	1214	set_connect(chip, op, r&7, v&7);
1209	1215	break;
1210	1216
1211	1217	case 0x08: /* Key Code */
r9812	r9813
1382	1388	int j;
1383	1389
1384	1390	for (j=0; j<8; j++)
1385		set_connect(&YM2151_chip->oper[j*4], j, YM2151_chip->connect[j]);
	1391	set_connect(YM2151_chip, &YM2151_chip->oper[j*4], j, YM2151_chip->connect[j]);
1386	1392	}
1387	1393
1388	1394	static void ym2151_state_save_register( YM2151 chip, running_device device )
r9812	r9813
1680	1686
1681	1687	#define volume_calc(OP) ((OP)->tl + ((UINT32)(OP)->volume) + (AM & (OP)->AMmask))
1682	1688
1683		INLINE void chan_calc(unsigned int chan)
	1689	INLINE void chan_calc(YM2151 *PSG, unsigned int chan)
1684	1690	{
1685	1691	YM2151Operator *op;
1686	1692	unsigned int env;
1687	1693	UINT32 AM = 0;
1688	1694
1689		m2 = c1 = c2 = mem = 0;
	1695	PSG->m2 = PSG->c1 = PSG->c2 = PSG->mem = 0;
1690	1696	op = &PSG->oper[chan4]; / M1 */
1691	1697
1692	1698	op->mem_connect = op->mem_value; / restore delayed sample (MEM) value to m2 or c2 */
r9812	r9813
1700	1706
1701	1707	if (!op->connect)
1702	1708	/* algorithm 5 */
1703		mem = c1 = c2 = op->fb_out_prev;
	1709	PSG->mem = PSG->c1 = PSG->c2 = op->fb_out_prev;
1704	1710	else
1705	1711	/* other algorithms */
1706	1712	*op->connect = op->fb_out_prev;
r9812	r9813
1716	1722
1717	1723	env = volume_calc(op+1); /* M2 */
1718	1724	if (env < ENV_QUIET)
1719		*(op+1)->connect += op_calc(op+1, env, m2);
	1725	*(op+1)->connect += op_calc(op+1, env, PSG->m2);
1720	1726
1721	1727	env = volume_calc(op+2); /* C1 */
1722	1728	if (env < ENV_QUIET)
1723		*(op+2)->connect += op_calc(op+2, env, c1);
	1729	*(op+2)->connect += op_calc(op+2, env, PSG->c1);
1724	1730
1725	1731	env = volume_calc(op+3); /* C2 */
1726	1732	if (env < ENV_QUIET)
1727		chanout[chan] += op_calc(op+3, env, c2);
	1733	PSG->chanout[chan] += op_calc(op+3, env, PSG->c2);
1728	1734
1729	1735	/* M1 */
1730		op->mem_value = mem;
	1736	op->mem_value = PSG->mem;
1731	1737	}
1732		INLINE void chan7_calc(void)
	1738
	1739	INLINE void chan7_calc(YM2151 *PSG)
1733	1740	{
1734	1741	YM2151Operator *op;
1735	1742	unsigned int env;
1736	1743	UINT32 AM = 0;
1737	1744
1738		m2 = c1 = c2 = mem = 0;
	1745	PSG->m2 = PSG->c1 = PSG->c2 = PSG->mem = 0;
1739	1746	op = &PSG->oper[74]; / M1 */
1740	1747
1741	1748	op->mem_connect = op->mem_value; / restore delayed sample (MEM) value to m2 or c2 */
r9812	r9813
1749	1756
1750	1757	if (!op->connect)
1751	1758	/* algorithm 5 */
1752		mem = c1 = c2 = op->fb_out_prev;
	1759	PSG->mem = PSG->c1 = PSG->c2 = op->fb_out_prev;
1753	1760	else
1754	1761	/* other algorithms */
1755	1762	*op->connect = op->fb_out_prev;
r9812	r9813
1765	1772
1766	1773	env = volume_calc(op+1); /* M2 */
1767	1774	if (env < ENV_QUIET)
1768		*(op+1)->connect += op_calc(op+1, env, m2);
	1775	*(op+1)->connect += op_calc(op+1, env, PSG->m2);
1769	1776
1770	1777	env = volume_calc(op+2); /* C1 */
1771	1778	if (env < ENV_QUIET)
1772		*(op+2)->connect += op_calc(op+2, env, c1);
	1779	*(op+2)->connect += op_calc(op+2, env, PSG->c1);
1773	1780
1774	1781	env = volume_calc(op+3); /* C2 */
1775	1782	if (PSG->noise & 0x80)
r9812	r9813
1779	1786	noiseout = 0;
1780	1787	if (env < 0x3ff)
1781	1788	noiseout = (env ^ 0x3ff) * 2; /* range of the YM2151 noise output is -2044 to 2040 */
1782		chanout[7] += ((PSG->noise_rng&0x10000) ? noiseout: -noiseout); /* bit 16 -> output */
	1789	PSG->chanout[7] += ((PSG->noise_rng&0x10000) ? noiseout: -noiseout); /* bit 16 -> output */
1783	1790	}
1784	1791	else
1785	1792	{
1786	1793	if (env < ENV_QUIET)
1787		chanout[7] += op_calc(op+3, env, c2);
	1794	PSG->chanout[7] += op_calc(op+3, env, PSG->c2);
1788	1795	}
1789	1796	/* M1 */
1790		op->mem_value = mem;
	1797	op->mem_value = PSG->mem;
1791	1798	}
1792	1799
1793	1800
r9812	r9813
1999	2006	--
2000	2007	*/
2001	2008
2002		INLINE void advance_eg(~~void~~)
	2009	INLINE void advance_eg(YM2151 *PSG)
2003	2010	{
2004	2011	YM2151Operator *op;
2005	2012	unsigned int i;
r9812	r9813
2083	2090	}
2084	2091
2085	2092
2086		INLINE void advance(~~void~~)
	2093	INLINE void advance(YM2151 *PSG)
2087	2094	{
2088	2095	YM2151Operator *op;
2089	2096	unsigned int i;
r9812	r9813
2123	2130	/* square */
2124	2131	/* AM: 255, 0 */
2125	2132	/* PM: 128,-128 (LFP = exactly +PMD, -PMD) */
2126		if (i<128){
	2133	if (i<128)
	2134	{
2127	2135	a = 255;
2128	2136	p = 128;
2129		}else{
	2137	}
	2138	else
	2139	{
2130	2140	a = 0;
2131	2141	p = -128;
2132	2142	}
r9812	r9813
2367	2377	*/
2368	2378	void ym2151_update_one(void chip, SAMP *buffers, int length)
2369	2379	{
	2380	YM2151 PSG = (YM2151 )chip;
	2381	signed int *chanout = PSG->chanout;
2370	2382	int i;
2371	2383	signed int outl,outr;
2372	2384	SAMP bufL, bufR;
r9812	r9813
2374	2386	bufL = buffers[0];
2375	2387	bufR = buffers[1];
2376	2388
2377		PSG = (YM2151 *)chip;
2378
2379	2389	#ifdef USE_MAME_TIMERS
2380	2390	/* ASG 980324 - handled by real timers now */
2381	2391	#else
r9812	r9813
2397	2407
2398	2408	for (i=0; i<length; i++)
2399	2409	{
2400		advance_eg();
	2410	advance_eg(PSG);
2401	2411
2402	2412	chanout[0] = 0;
2403	2413	chanout[1] = 0;
r9812	r9813
2408	2418	chanout[6] = 0;
2409	2419	chanout[7] = 0;
2410	2420
2411		chan_calc(0);
	2421	chan_calc(PSG, 0);
2412	2422	SAVE_SINGLE_CHANNEL(0)
2413		chan_calc(1);
	2423	chan_calc(PSG, 1);
2414	2424	SAVE_SINGLE_CHANNEL(1)
2415		chan_calc(2);
	2425	chan_calc(PSG, 2);
2416	2426	SAVE_SINGLE_CHANNEL(2)
2417		chan_calc(3);
	2427	chan_calc(PSG, 3);
2418	2428	SAVE_SINGLE_CHANNEL(3)
2419		chan_calc(4);
	2429	chan_calc(PSG, 4);
2420	2430	SAVE_SINGLE_CHANNEL(4)
2421		chan_calc(5);
	2431	chan_calc(PSG, 5);
2422	2432	SAVE_SINGLE_CHANNEL(5)
2423		chan_calc(6);
	2433	chan_calc(PSG, 6);
2424	2434	SAVE_SINGLE_CHANNEL(6)
2425		chan7_calc();
	2435	chan7_calc(PSG);
2426	2436	SAVE_SINGLE_CHANNEL(7)
2427	2437
2428	2438	outl = chanout[0] & PSG->pan[0];
r9812	r9813
2474	2484	}
2475	2485	}
2476	2486	#endif
2477		advance();
	2487	advance(PSG);
2478	2488	}
2479	2489	}
2480	2490

src/emu/sound/fmopl.c
r9812	r9813
198	198
199	199
200	200
201		typedef struct{
	201	typedef struct
	202	{
202	203	UINT32 ar; /* attack rate: AR<<2 */
203	204	UINT32 dr; /* decay rate: DR<<2 */
204	205	UINT32 rr; /* release rate:RR<<2 */
r9812	r9813
238	239	UINT16 wavetable;
239	240	} OPL_SLOT;
240	241
241		typedef struct{
	242	typedef struct
	243	{
242	244	OPL_SLOT SLOT[2];
243	245	/* phase generator state */
244	246	UINT32 block_fnum; /* block+fnum */
r9812	r9813
248	250	} OPL_CH;
249	251
250	252	/* OPL state */
251		typedef struct fm_opl_f {
	253	typedef struct
	254	{
252	255	/* FM channel slots */
253	256	OPL_CH P_CH[9]; /* OPL/OPL2 chips have 9 channels*/
254	257
r9812	r9813
262	265	UINT32 fn_tab[1024]; /* fnumber->increment counter */
263	266
264	267	/* LFO */
	268	UINT32 LFO_AM;
	269	INT32 LFO_PM;
	270
265	271	UINT8 lfo_am_depth;
266	272	UINT8 lfo_pm_depth_range;
267	273	UINT32 lfo_am_cnt;
r9812	r9813
313	319	double freqbase; /* frequency base */
314	320	attotime TimerBase; /* Timer base time (==sampling time)*/
315	321	running_device *device;
	322
	323	signed int phase_modulation; /* phase modulation input (SLOT 2) */
	324	signed int output[1];
	325	#if BUILD_Y8950
	326	INT32 output_deltat[4]; /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */
	327	#endif
316	328	} FM_OPL;
317	329
318	330
r9812	r9813
627	639	static int num_lock = 0;
628	640
629	641
630		static void cur_chip = NULL; / current chip pointer */
631		static OPL_SLOT SLOT7_1, SLOT7_2, SLOT8_1, SLOT8_2;
	642	#define SLOT7_1 (&OPL->P_CH[7].SLOT[SLOT1])
	643	#define SLOT7_2 (&OPL->P_CH[7].SLOT[SLOT2])
	644	#define SLOT8_1 (&OPL->P_CH[8].SLOT[SLOT1])
	645	#define SLOT8_2 (&OPL->P_CH[8].SLOT[SLOT2])
632	646
633		static signed int phase_modulation; /* phase modulation input (SLOT 2) */
634		static signed int output[1];
635	647
636		#if BUILD_Y8950
637		static INT32 output_deltat[4]; /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */
638		#endif
639	648
640		static UINT32 LFO_AM;
641		static INT32 LFO_PM;
642	649
643
644
645	650	INLINE int limit( int val, int max, int min ) {
646	651	if ( val > max )
647	652	val = max;
r9812	r9813
707	712	tmp = lfo_am_table[ OPL->lfo_am_cnt >> LFO_SH ];
708	713
709	714	if (OPL->lfo_am_depth)
710		LFO_AM = tmp;
	715	OPL->LFO_AM = tmp;
711	716	else
712		LFO_AM = tmp>>2;
	717	OPL->LFO_AM = tmp>>2;
713	718
714	719	OPL->lfo_pm_cnt += OPL->lfo_pm_inc;
715		LFO_PM = ((OPL->lfo_pm_cnt>>LFO_SH) & 7) \| OPL->lfo_pm_depth_range;
	720	OPL->LFO_PM = ((OPL->lfo_pm_cnt>>LFO_SH) & 7) \| OPL->lfo_pm_depth_range;
716	721	}
717	722
718	723	/* advance to next sample */
r9812	r9813
822	827
823	828	unsigned int fnum_lfo = (block_fnum&0x0380) >> 7;
824	829
825		signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + 16*fnum_lfo ];
	830	signed int lfo_fn_table_index_offset = lfo_pm_table[OPL->LFO_PM + 16*fnum_lfo ];
826	831
827	832	if (lfo_fn_table_index_offset) /* LFO phase modulation active */
828	833	{
r9812	r9813
902	907	}
903	908
904	909
905		#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask))
	910	#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (OPL->LFO_AM & (OP)->AMmask))
906	911
907	912	/* calculate output */
908		INLINE void OPL_CALC_CH( OPL_CH *CH )
	913	INLINE void OPL_CALC_CH( FM_OPL OPL, OPL_CH CH )
909	914	{
910	915	OPL_SLOT *SLOT;
911	916	unsigned int env;
912	917	signed int out;
913	918
914		phase_modulation = 0;
	919	OPL->phase_modulation = 0;
915	920
916	921	/* SLOT 1 */
917	922	SLOT = &CH->SLOT[SLOT1];
r9812	r9813
931	936	SLOT++;
932	937	env = volume_calc(SLOT);
933	938	if( env < ENV_QUIET )
934		output[0] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable);
	939	OPL->output[0] += op_calc(SLOT->Cnt, env, OPL->phase_modulation, SLOT->wavetable);
935	940	}
936	941
937	942	/*
r9812	r9813
971	976
972	977	/* calculate rhythm */
973	978
974		INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
	979	INLINE void OPL_CALC_RH( FM_OPL OPL, OPL_CH CH, unsigned int noise )
975	980	{
976	981	OPL_SLOT *SLOT;
977	982	signed int out;
r9812	r9813
985	990	- output sample always is multiplied by 2
986	991	*/
987	992
988		phase_modulation = 0;
	993	OPL->phase_modulation = 0;
989	994	/* SLOT 1 */
990	995	SLOT = &CH[6].SLOT[SLOT1];
991	996	env = volume_calc(SLOT);
r9812	r9813
994	999	SLOT->op1_out[0] = SLOT->op1_out[1];
995	1000
996	1001	if (!SLOT->CON)
997		phase_modulation = SLOT->op1_out[0];
	1002	OPL->phase_modulation = SLOT->op1_out[0];
998	1003	/* else ignore output of operator 1 */
999	1004
1000	1005	SLOT->op1_out[1] = 0;
r9812	r9813
1009	1014	SLOT++;
1010	1015	env = volume_calc(SLOT);
1011	1016	if( env < ENV_QUIET )
1012		output[0] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable) * 2;
	1017	OPL->output[0] += op_calc(SLOT->Cnt, env, OPL->phase_modulation, SLOT->wavetable) * 2;
1013	1018
1014	1019
1015	1020	/* Phase generation is based on: */
r9812	r9813
1077	1082	phase = 0xd0>>2;
1078	1083	}
1079	1084
1080		output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
	1085	OPL->output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
1081	1086	}
1082	1087
1083	1088	/* Snare Drum (verified on real YM3812) */
r9812	r9813
1098	1103	if (noise)
1099	1104	phase ^= 0x100;
1100	1105
1101		output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2;
	1106	OPL->output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2;
1102	1107	}
1103	1108
1104	1109	/* Tom Tom (verified on real YM3812) */
1105	1110	env = volume_calc(SLOT8_1);
1106	1111	if( env < ENV_QUIET )
1107		output[0] += op_calc(SLOT8_1->Cnt, env, 0, SLOT8_1->wavetable) * 2;
	1112	OPL->output[0] += op_calc(SLOT8_1->Cnt, env, 0, SLOT8_1->wavetable) * 2;
1108	1113
1109	1114	/* Top Cymbal (verified on real YM3812) */
1110	1115	env = volume_calc(SLOT8_2);
r9812	r9813
1131	1136	if (res2)
1132	1137	phase = 0x300;
1133	1138
1134		output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
	1139	OPL->output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
1135	1140	}
1136
1137	1141	}
1138	1142
1139	1143
r9812	r9813
1697	1701	CH = &OPL->P_CH[r&0x0f];
1698	1702	CH->SLOT[SLOT1].FB = (v>>1)&7 ? ((v>>1)&7) + 7 : 0;
1699	1703	CH->SLOT[SLOT1].CON = v&1;
1700		CH->SLOT[SLOT1].connect1 = CH->SLOT[SLOT1].CON ? &output[0] : &phase_modulation;
	1704	CH->SLOT[SLOT1].connect1 = CH->SLOT[SLOT1].CON ? &OPL->output[0] : &OPL->phase_modulation;
1701	1705	break;
1702	1706	case 0xe0: /* waveform select */
1703	1707	/* simply ignore write to the waveform select register if selecting not enabled in test register */
r9812	r9813
1729	1733
1730	1734	/* first time */
1731	1735
1732		cur_chip = NULL;
1733	1736	/* allocate total level table (128kb space) */
1734	1737	if( !init_tables() )
1735	1738	{
r9812	r9813
1756	1759
1757	1760	/* last time */
1758	1761
1759		cur_chip = NULL;
1760	1762	OPLCloseTable();
1761	1763
1762	1764	if (cymfile)
r9812	r9813
1801	1803	YM_DELTAT *DELTAT = OPL->deltat;
1802	1804
1803	1805	DELTAT->freqbase = OPL->freqbase;
1804		DELTAT->output_pointer = &output_deltat[0];
	1806	DELTAT->output_pointer = &OPL->output_deltat[0];
1805	1807	DELTAT->portshift = 5;
1806	1808	DELTAT->output_range = 1<<23;
1807	1809	YM_DELTAT_ADPCM_Reset(DELTAT,0,YM_DELTAT_EMULATION_MODE_NORMAL);
r9812	r9813
1854	1856	SLOT->TLL = SLOT->TL + (CH->ksl_base >> SLOT->ksl);
1855	1857
1856	1858	/* Connect output */
1857		SLOT->connect1 = SLOT->CON ? &output[0] : &phase_modulation;
	1859	SLOT->connect1 = SLOT->CON ? &OPL->output[0] : &OPL->phase_modulation;
1858	1860	}
1859	1861	}
1860	1862	#if BUILD_Y8950
r9812	r9813
2224	2226	OPLSAMPLE *buf = buffer;
2225	2227	int i;
2226	2228
2227		if( (void *)OPL != cur_chip ){
2228		cur_chip = (void *)OPL;
2229		/* rhythm slots */
2230		SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
2231		SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
2232		SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
2233		SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
2234		}
2235	2229	for( i=0; i < length ; i++ )
2236	2230	{
2237	2231	int lt;
2238	2232
2239		output[0] = 0;
	2233	OPL->output[0] = 0;
2240	2234
2241	2235	advance_lfo(OPL);
2242	2236
2243	2237	/* FM part */
2244		OPL_CALC_CH(&OPL->P_CH[0]);
2245		OPL_CALC_CH(&OPL->P_CH[1]);
2246		OPL_CALC_CH(&OPL->P_CH[2]);
2247		OPL_CALC_CH(&OPL->P_CH[3]);
2248		OPL_CALC_CH(&OPL->P_CH[4]);
2249		OPL_CALC_CH(&OPL->P_CH[5]);
	2238	OPL_CALC_CH(OPL, &OPL->P_CH[0]);
	2239	OPL_CALC_CH(OPL, &OPL->P_CH[1]);
	2240	OPL_CALC_CH(OPL, &OPL->P_CH[2]);
	2241	OPL_CALC_CH(OPL, &OPL->P_CH[3]);
	2242	OPL_CALC_CH(OPL, &OPL->P_CH[4]);
	2243	OPL_CALC_CH(OPL, &OPL->P_CH[5]);
2250	2244
2251	2245	if(!rhythm)
2252	2246	{
2253		OPL_CALC_CH(&OPL->P_CH[6]);
2254		OPL_CALC_CH(&OPL->P_CH[7]);
2255		OPL_CALC_CH(&OPL->P_CH[8]);
	2247	OPL_CALC_CH(OPL, &OPL->P_CH[6]);
	2248	OPL_CALC_CH(OPL, &OPL->P_CH[7]);
	2249	OPL_CALC_CH(OPL, &OPL->P_CH[8]);
2256	2250	}
2257	2251	else /* Rhythm part */
2258	2252	{
2259		OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
	2253	OPL_CALC_RH(OPL, &OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
2260	2254	}
2261	2255
2262		lt = output[0];
	2256	lt = OPL->output[0];
2263	2257
2264	2258	lt >>= FINAL_SH;
2265	2259
r9812	r9813
2359	2353	OPLSAMPLE *buf = buffer;
2360	2354	int i;
2361	2355
2362		if( (void *)OPL != cur_chip ){
2363		cur_chip = (void *)OPL;
2364		/* rhythm slots */
2365		SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
2366		SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
2367		SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
2368		SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
2369		}
2370	2356	for( i=0; i < length ; i++ )
2371	2357	{
2372	2358	int lt;
2373	2359
2374		output[0] = 0;
	2360	OPL->output[0] = 0;
2375	2361
2376	2362	advance_lfo(OPL);
2377	2363
2378	2364	/* FM part */
2379		OPL_CALC_CH(&OPL->P_CH[0]);
2380		OPL_CALC_CH(&OPL->P_CH[1]);
2381		OPL_CALC_CH(&OPL->P_CH[2]);
2382		OPL_CALC_CH(&OPL->P_CH[3]);
2383		OPL_CALC_CH(&OPL->P_CH[4]);
2384		OPL_CALC_CH(&OPL->P_CH[5]);
	2365	OPL_CALC_CH(OPL, &OPL->P_CH[0]);
	2366	OPL_CALC_CH(OPL, &OPL->P_CH[1]);
	2367	OPL_CALC_CH(OPL, &OPL->P_CH[2]);
	2368	OPL_CALC_CH(OPL, &OPL->P_CH[3]);
	2369	OPL_CALC_CH(OPL, &OPL->P_CH[4]);
	2370	OPL_CALC_CH(OPL, &OPL->P_CH[5]);
2385	2371
2386	2372	if(!rhythm)
2387	2373	{
2388		OPL_CALC_CH(&OPL->P_CH[6]);
2389		OPL_CALC_CH(&OPL->P_CH[7]);
2390		OPL_CALC_CH(&OPL->P_CH[8]);
	2374	OPL_CALC_CH(OPL, &OPL->P_CH[6]);
	2375	OPL_CALC_CH(OPL, &OPL->P_CH[7]);
	2376	OPL_CALC_CH(OPL, &OPL->P_CH[8]);
2391	2377	}
2392	2378	else /* Rhythm part */
2393	2379	{
2394		OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
	2380	OPL_CALC_RH(OPL, &OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
2395	2381	}
2396	2382
2397		lt = output[0];
	2383	lt = OPL->output[0];
2398	2384
2399	2385	lt >>= FINAL_SH;
2400	2386
r9812	r9813
2522	2508	YM_DELTAT *DELTAT = OPL->deltat;
2523	2509	OPLSAMPLE *buf = buffer;
2524	2510
2525		if( (void *)OPL != cur_chip ){
2526		cur_chip = (void *)OPL;
2527		/* rhythm slots */
2528		SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
2529		SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
2530		SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
2531		SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
2532
2533		}
2534	2511	for( i=0; i < length ; i++ )
2535	2512	{
2536	2513	int lt;
2537	2514
2538		output[0] = 0;
2539		output_deltat[0] = 0;
	2515	OPL->output[0] = 0;
	2516	OPL->output_deltat[0] = 0;
2540	2517
2541	2518	advance_lfo(OPL);
2542	2519
r9812	r9813
2545	2522	YM_DELTAT_ADPCM_CALC(DELTAT);
2546	2523
2547	2524	/* FM part */
2548		OPL_CALC_CH(&OPL->P_CH[0]);
2549		OPL_CALC_CH(&OPL->P_CH[1]);
2550		OPL_CALC_CH(&OPL->P_CH[2]);
2551		OPL_CALC_CH(&OPL->P_CH[3]);
2552		OPL_CALC_CH(&OPL->P_CH[4]);
2553		OPL_CALC_CH(&OPL->P_CH[5]);
	2525	OPL_CALC_CH(OPL, &OPL->P_CH[0]);
	2526	OPL_CALC_CH(OPL, &OPL->P_CH[1]);
	2527	OPL_CALC_CH(OPL, &OPL->P_CH[2]);
	2528	OPL_CALC_CH(OPL, &OPL->P_CH[3]);
	2529	OPL_CALC_CH(OPL, &OPL->P_CH[4]);
	2530	OPL_CALC_CH(OPL, &OPL->P_CH[5]);
2554	2531
2555	2532	if(!rhythm)
2556	2533	{
2557		OPL_CALC_CH(&OPL->P_CH[6]);
2558		OPL_CALC_CH(&OPL->P_CH[7]);
2559		OPL_CALC_CH(&OPL->P_CH[8]);
	2534	OPL_CALC_CH(OPL, &OPL->P_CH[6]);
	2535	OPL_CALC_CH(OPL, &OPL->P_CH[7]);
	2536	OPL_CALC_CH(OPL, &OPL->P_CH[8]);
2560	2537	}
2561	2538	else /* Rhythm part */
2562	2539	{
2563		OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
	2540	OPL_CALC_RH(OPL, &OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
2564	2541	}
2565	2542
2566		lt = output[0] + (output_deltat[0]>>11);
	2543	lt = OPL->output[0] + (OPL->output_deltat[0]>>11);
2567	2544
2568	2545	lt >>= FINAL_SH;
2569	2546

src/emu/sound/ics2115.c
r9812	r9813
177	177
178	178	static void recalc_timer(ics2115_state *chip, int timer)
179	179	{
180		UINT64 period = 1000000000 * chip->timer[timer].scale*chip->timer[timer].preset / 33868800;
181		if (period)
182		period = 1000000000/62.8206;
	180	UINT64 period;
183	181
	182	if(chip->timer[timer].scale) {
	183	int sc = chip->timer[timer].scale;
	184	UINT64 counter = UINT64(((sc & 31)+1) * (chip->timer[timer].preset+1)) << (4+(sc >> 5));
	185	period = 1000000000 * counter / 33868800;
	186	} else
	187	period = 0;
	188
184	189	if (period)
185	190	{
186	191	if (ICS2115LOGERROR) logerror("ICS2115: timer %d freq=%fHz\n", timer, 1.0/(period / 1000000000.0));

src/emu/sound/fm.c
r9812	r9813
652	652	UINT32 fn_max; /* maximal phase increment (used for phase overflow) */
653	653
654	654	/* LFO */
	655	UINT32 LFO_AM; /* runtime LFO calculations helper */
	656	INT32 LFO_PM; /* runtime LFO calculations helper */
	657
655	658	UINT32 lfo_cnt;
656	659	UINT32 lfo_inc;
657	660
658	661	UINT32 lfo_freq[8]; /* LFO FREQ table */
659		} FM_OPN;
660	662
	663	INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
	664	INT32 mem; /* one sample delay memory */
661	665
	666	INT32 out_fm[8]; /* outputs of working channels */
662	667
663		/* current chip state */
664		static INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
665		static INT32 mem; /* one sample delay memory */
666
667		static INT32 out_fm[8]; /* outputs of working channels */
668
669	668	#if (BUILD_YM2608\|\|BUILD_YM2610\|\|BUILD_YM2610B)
670		static INT32 out_adpcm[4]; /* channel output NONE,LEFT,RIGHT or CENTER for YM2608/YM2610 ADPCM */
671		static INT32 out_delta[4]; /* channel output NONE,LEFT,RIGHT or CENTER for YM2608/YM2610 DELTAT*/
	669	INT32 out_adpcm[4]; /* channel output NONE,LEFT,RIGHT or CENTER for YM2608/YM2610 ADPCM */
	670	INT32 out_delta[4]; /* channel output NONE,LEFT,RIGHT or CENTER for YM2608/YM2610 DELTAT*/
672	671	#endif
	672	} FM_OPN;
673	673
674		static UINT32 LFO_AM; /* runtime LFO calculations helper */
675		static INT32 LFO_PM; /* runtime LFO calculations helper */
676	674
	675
	676	/* current chip state */
	677
677	678	/* log output level */
678	679	#define LOG_ERR 3 /* ERROR */
679	680	#define LOG_WAR 2 /* WARNING */
r9812	r9813
885	886	}
886	887
887	888	/* set algorithm connection */
888		static void setup_connection( FM_CH *CH, int ch )
	889	static void setup_connection( FM_OPN OPN, FM_CH CH, int ch )
889	890	{
890		INT32 *carrier = &out_fm[ch];
	891	INT32 *carrier = &OPN->out_fm[ch];
891	892
892	893	INT32 **om1 = &CH->connect1;
893	894	INT32 **om2 = &CH->connect3;
r9812	r9813
895	896
896	897	INT32 **memc = &CH->mem_connect;
897	898
898		switch( CH->ALGO ){
	899	switch( CH->ALGO )
	900	{
899	901	case 0:
900	902	/* M1---C1---MEM---M2---C2---OUT */
901		*om1 = &c1;
902		*oc1 = &mem;
903		*om2 = &c2;
904		*memc= &m2;
	903	*om1 = &OPN->c1;
	904	*oc1 = &OPN->mem;
	905	*om2 = &OPN->c2;
	906	*memc= &OPN->m2;
905	907	break;
906	908	case 1:
907	909	/* M1------+-MEM---M2---C2---OUT */
908	910	/* C1-+ */
909		*om1 = &mem;
910		*oc1 = &mem;
911		*om2 = &c2;
912		*memc= &m2;
	911	*om1 = &OPN->mem;
	912	*oc1 = &OPN->mem;
	913	*om2 = &OPN->c2;
	914	*memc= &OPN->m2;
913	915	break;
914	916	case 2:
915	917	/* M1-----------------+-C2---OUT */
916	918	/* C1---MEM---M2-+ */
917		*om1 = &c2;
918		*oc1 = &mem;
919		*om2 = &c2;
920		*memc= &m2;
	919	*om1 = &OPN->c2;
	920	*oc1 = &OPN->mem;
	921	*om2 = &OPN->c2;
	922	*memc= &OPN->m2;
921	923	break;
922	924	case 3:
923	925	/* M1---C1---MEM------+-C2---OUT */
924	926	/* M2-+ */
925		*om1 = &c1;
926		*oc1 = &mem;
927		*om2 = &c2;
928		*memc= &c2;
	927	*om1 = &OPN->c1;
	928	*oc1 = &OPN->mem;
	929	*om2 = &OPN->c2;
	930	*memc= &OPN->c2;
929	931	break;
930	932	case 4:
931	933	/* M1---C1-+-OUT */
932	934	/* M2---C2-+ */
933	935	/* MEM: not used */
934		*om1 = &c1;
	936	*om1 = &OPN->c1;
935	937	*oc1 = carrier;
936		*om2 = &c2;
937		memc= &mem; / store it anywhere where it will not be used */
	938	*om2 = &OPN->c2;
	939	memc= &OPN->mem; / store it anywhere where it will not be used */
938	940	break;
939	941	case 5:
940	942	/* +----C1----+ */
r9812	r9813
943	945	om1 = 0; / special mark */
944	946	*oc1 = carrier;
945	947	*om2 = carrier;
946		*memc= &m2;
	948	*memc= &OPN->m2;
947	949	break;
948	950	case 6:
949	951	/* M1---C1-+ */
950	952	/* M2-+-OUT */
951	953	/* C2-+ */
952	954	/* MEM: not used */
953		*om1 = &c1;
	955	*om1 = &OPN->c1;
954	956	*oc1 = carrier;
955	957	*om2 = carrier;
956		memc= &mem; / store it anywhere where it will not be used */
	958	memc= &OPN->mem; / store it anywhere where it will not be used */
957	959	break;
958	960	case 7:
959	961	/* M1-+ */
r9812	r9813
964	966	*om1 = carrier;
965	967	*oc1 = carrier;
966	968	*om2 = carrier;
967		memc= &mem; / store it anywhere where it will not be used */
	969	memc= &OPN->mem; / store it anywhere where it will not be used */
968	970	break;
969	971	}
970	972
r9812	r9813
1085	1087	/* triangle */
1086	1088	/* AM: 0 to 126 step +2, 126 to 0 step -2 */
1087	1089	if (pos<64)
1088		LFO_AM = (pos&63) * 2;
	1090	OPN->LFO_AM = (pos&63) * 2;
1089	1091	else
1090		LFO_AM = 126 - ((pos&63) * 2);
	1092	OPN->LFO_AM = 126 - ((pos&63) * 2);
1091	1093	}
1092	1094
1093	1095	/* PM works with 4 times slower clock */
r9812	r9813
1095	1097	/* update PM when LFO output changes */
1096	1098	/if (prev_pos != pos)/ /* can't use global lfo_pm for this optimization, must be chip->lfo_pm instead*/
1097	1099	{
1098		LFO_PM = pos;
	1100	OPN->LFO_PM = pos;
1099	1101	}
1100	1102
1101	1103	}
1102	1104	else
1103	1105	{
1104		LFO_AM = 0;
1105		LFO_PM = 0;
	1106	OPN->LFO_AM = 0;
	1107	OPN->LFO_PM = 0;
1106	1108	}
1107	1109	}
1108	1110
r9812	r9813
1261	1263	INLINE void update_phase_lfo_slot(FM_OPN OPN, FM_SLOT SLOT, INT32 pms, UINT32 block_fnum)
1262	1264	{
1263	1265	UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8;
1264		INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + pms + LFO_PM ];
	1266	INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + pms + OPN->LFO_PM ];
1265	1267
1266	1268	if (lfo_fn_table_index_offset) /* LFO phase modulation active */
1267	1269	{
r9812	r9813
1297	1299	UINT32 block_fnum = CH->block_fnum;
1298	1300
1299	1301	UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8;
1300		INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + CH->pms + LFO_PM ];
	1302	INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + CH->pms + OPN->LFO_PM ];
1301	1303
1302	1304	if (lfo_fn_table_index_offset) /* LFO phase modulation active */
1303	1305	{
r9812	r9813
1347	1349	{
1348	1350	unsigned int eg_out;
1349	1351
1350		UINT32 AM = LFO_AM >> CH->ams;
	1352	UINT32 AM = OPN->LFO_AM >> CH->ams;
1351	1353
1352	1354
1353		m2 = c1 = c2 = mem = 0;
	1355	OPN->m2 = OPN->c1 = OPN->c2 = OPN->mem = 0;
1354	1356
1355	1357	CH->mem_connect = CH->mem_value; / restore delayed sample (MEM) value to m2 or c2 */
1356	1358
r9812	r9813
1359	1361	INT32 out = CH->op1_out[0] + CH->op1_out[1];
1360	1362	CH->op1_out[0] = CH->op1_out[1];
1361	1363
1362		if( !CH->connect1 ){
	1364	if( !CH->connect1 )
	1365	{
1363	1366	/* algorithm 5 */
1364		mem = c1 = c2 = CH->op1_out[0];
	1367	OPN->mem = OPN->c1 = OPN->c2 = CH->op1_out[0];
1365	1368	}
1366	1369	else
1367	1370	{
r9812	r9813
1381	1384
1382	1385	eg_out = volume_calc(&CH->SLOT[SLOT3]);
1383	1386	if( eg_out < ENV_QUIET ) /* SLOT 3 */
1384		*CH->connect3 += op_calc(CH->SLOT[SLOT3].phase, eg_out, m2);
	1387	*CH->connect3 += op_calc(CH->SLOT[SLOT3].phase, eg_out, OPN->m2);
1385	1388
1386	1389	eg_out = volume_calc(&CH->SLOT[SLOT2]);
1387	1390	if( eg_out < ENV_QUIET ) /* SLOT 2 */
1388		*CH->connect2 += op_calc(CH->SLOT[SLOT2].phase, eg_out, c1);
	1391	*CH->connect2 += op_calc(CH->SLOT[SLOT2].phase, eg_out, OPN->c1);
1389	1392
1390	1393	eg_out = volume_calc(&CH->SLOT[SLOT4]);
1391	1394	if( eg_out < ENV_QUIET ) /* SLOT 4 */
1392		*CH->connect4 += op_calc(CH->SLOT[SLOT4].phase, eg_out, c2);
	1395	*CH->connect4 += op_calc(CH->SLOT[SLOT4].phase, eg_out, OPN->c2);
1393	1396
1394	1397
1395	1398	/* store current MEM */
1396		CH->mem_value = mem;
	1399	CH->mem_value = OPN->mem;
1397	1400
1398	1401	/* update phase counters AFTER output calculations */
1399	1402	if(CH->pms)
r9812	r9813
1460	1463	/* Changed from INLINE to static to work around gcc 4.2.1 codegen bug */
1461	1464	static void refresh_fc_eg_chan(FM_OPN OPN, FM_CH CH )
1462	1465	{
1463		if( CH->SLOT[SLOT1].Incr==-1){
	1466	if( CH->SLOT[SLOT1].Incr==-1)
	1467	{
1464	1468	int fc = CH->fc;
1465	1469	int kc = CH->kcode;
1466	1470	refresh_fc_eg_slot(OPN, &CH->SLOT[SLOT1] , fc , kc );
r9812	r9813
1482	1486	#endif
1483	1487
1484	1488	/* DeTune table */
1485		for (d = 0;d <= 3;d++){
1486		for (i = 0;i <= 31;i++){
	1489	for (d = 0;d <= 3;d++)
	1490	{
	1491	for (i = 0;i <= 31;i++)
	1492	{
1487	1493	rate = ((double)dttable[d32 + i]) SIN_LEN * ST->freqbase * (1<<FREQ_SH) / ((double)(1<<20));
1488	1494	ST->dt_tab[d][i] = (INT32) rate;
1489	1495	ST->dt_tab[d+4][i] = -ST->dt_tab[d][i];
r9812	r9813
1783	1789	UINT8 c;
1784	1790	FM_CH *CH;
1785	1791
1786		switch(r){
	1792	switch(r)
	1793	{
1787	1794	case 0x21: /* Test */
1788	1795	break;
1789	1796	case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/YM2612) */
r9812	r9813
1842	1849
1843	1850	SLOT = &(CH->SLOT[OPN_SLOT(r)]);
1844	1851
1845		switch( r & 0xf0 ) {
	1852	switch( r & 0xf0 )
	1853	{
1846	1854	case 0x30: /* DET , MUL */
1847	1855	set_det_mul(&OPN->ST,CH,SLOT,v);
1848	1856	break;
r9812	r9813
1954	1962	break;
1955	1963
1956	1964	case 0xa0:
1957		switch( OPN_SLOT(r) ){
	1965	switch( OPN_SLOT(r) )
	1966	{
1958	1967	case 0: /* 0xa0-0xa2 : FNUM1 */
1959	1968	{
1960	1969	UINT32 fn = (((UINT32)( (OPN->ST.fn_h)&7))<<8) + v;
r9812	r9813
1994	2003	break;
1995	2004
1996	2005	case 0xb0:
1997		switch( OPN_SLOT(r) ){
	2006	switch( OPN_SLOT(r) )
	2007	{
1998	2008	case 0: /* 0xb0-0xb2 : FB,ALGO */
1999	2009	{
2000	2010	int feedback = (v>>3)&7;
2001	2011	CH->ALGO = v&7;
2002	2012	CH->FB = feedback ? feedback+6 : 0;
2003		setup_connection( CH, c );
	2013	setup_connection( OPN, CH, c );
2004	2014	}
2005	2015	break;
2006	2016	case 1: /* 0xb4-0xb6 : L , R , AMS , PMS (YM2612/YM2610B/YM2610/YM2608) */
r9812	r9813
2114	2124	refresh_fc_eg_slot(OPN, &cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
2115	2125	refresh_fc_eg_slot(OPN, &cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
2116	2126	}
2117		}else refresh_fc_eg_chan( OPN, cch[2] );
	2127	}
	2128	else
	2129	refresh_fc_eg_chan( OPN, cch[2] );
2118	2130
2119	2131
2120	2132	/* YM2203 doesn't have LFO so we must keep these globals at 0 level */
2121		LFO_AM = 0;
2122		LFO_PM = 0;
	2133	OPN->LFO_AM = 0;
	2134	OPN->LFO_PM = 0;
2123	2135
2124	2136	/* buffering */
2125	2137	for (i=0; i < length ; i++)
2126	2138	{
2127	2139	/* clear outputs */
2128		out_fm[0] = 0;
2129		out_fm[1] = 0;
2130		out_fm[2] = 0;
	2140	OPN->out_fm[0] = 0;
	2141	OPN->out_fm[1] = 0;
	2142	OPN->out_fm[2] = 0;
2131	2143
2132	2144	/* advance envelope generator */
2133	2145	OPN->eg_timer += OPN->eg_timer_add;
r9812	r9813
2150	2162	{
2151	2163	int lt;
2152	2164
2153		lt = out_fm[0] + out_fm[1] + out_fm[2];
	2165	lt = OPN->out_fm[0] + OPN->out_fm[1] + OPN->out_fm[2];
2154	2166
2155	2167	lt >>= FINAL_SH;
2156	2168
r9812	r9813
2410	2422	UINT8 adpcm_arrivedEndAddress;
2411	2423	YM_DELTAT deltaT; /* Delta-T ADPCM unit */
2412	2424
2413		UINT8 flagmask; /* YM2608 only */
2414		UINT8 irqmask; /* YM2608 only */
	2425	UINT8 flagmask; /* YM2608 only */
	2426	UINT8 irqmask; /* YM2608 only */
2415	2427	} YM2610;
2416	2428
2417	2429	/* here is the virtual YM2608 */
r9812	r9813
2422	2434	#define ADPCM_SHIFT (16) /* frequency step rate */
2423	2435	#define ADPCMA_ADDRESS_SHIFT 8 /* adpcm A address shift */
2424	2436
2425		static const UINT8 *pcmbufA;
2426		static UINT32 pcmsizeA;
2427
2428
2429	2437	/* Algorithm and tables verified on real YM2608 and YM2610 */
2430	2438
2431	2439	/* usual ADPCM table (16 * 1.1^N) */
r9812	r9813
2447	2455	static int jedi_table[ 49*16 ];
2448	2456
2449	2457
2450		static void Init_ADPCMATable(void){
2451
	2458	static void Init_ADPCMATable(void)
	2459	{
2452	2460	int step, nib;
2453	2461
2454	2462	for (step = 0; step < 49; step++)
r9812	r9813
2487	2495	return;
2488	2496	}
2489	2497	#if 0
2490		if ( ch->now_addr > (pcmsizeA<<1) ) {
	2498	if ( ch->now_addr > (F2610->pcmsizeA<<1) )
	2499	{
2491	2500	LOG(LOG_WAR,("YM2610: Attempting to play past adpcm rom size!\n" ));
2492	2501	return;
2493	2502	}
r9812	r9813
2496	2505	data = ch->now_data & 0x0f;
2497	2506	else
2498	2507	{
2499		ch->now_data = *(pcmbufA+(ch->now_addr>>1));
	2508	ch->now_data = *(F2610->pcmbuf+(ch->now_addr>>1));
2500	2509	data = (ch->now_data >> 4) & 0x0f;
2501	2510	}
2502	2511
r9812	r9813
2530	2539	UINT8 c = r&0x07;
2531	2540
2532	2541	F2610->adpcmreg[r] = v&0xff; /* stock data */
2533		switch( r ){
	2542	switch( r )
	2543	{
2534	2544	case 0x00: /* DM,--,C5,C4,C3,C2,C1,C0 */
2535	2545	if( !(v&0x80) )
2536	2546	{
r9812	r9813
2548	2558	adpcm[c].adpcm_out = 0;
2549	2559	adpcm[c].flag = 1;
2550	2560
2551		if(F2610->pcmbuf==NULL){ /* Check ROM Mapped */
	2561	if(F2610->pcmbuf==NULL)
	2562	{ /* Check ROM Mapped */
2552	2563	logerror("YM2608-YM2610: ADPCM-A rom not mapped\n");
2553	2564	adpcm[c].flag = 0;
2554		} else{
2555		if(adpcm[c].end >= F2610->pcm_size){ /* Check End in Range */
	2565	}
	2566	else
	2567	{
	2568	if(adpcm[c].end >= F2610->pcm_size)
	2569	{ /* Check End in Range */
2556	2570	logerror("YM2610: ADPCM-A end out of range: $%08x\n",adpcm[c].end);
2557	2571	/adpcm[c].end = F2610->pcm_size-1;/ /* JB: DO NOT uncomment this, otherwise you will break the comparison in the ADPCM_CALC_CHA() */
2558	2572	}
r9812	r9813
2597	2611	default:
2598	2612	c = r&0x07;
2599	2613	if( c >= 0x06 ) return;
2600		switch( r&0x38 ){
	2614	switch( r&0x38 )
	2615	{
2601	2616	case 0x08: /* B7=L,B6=R, B4-0=IL */
2602	2617	{
2603	2618	int volume;
r9812	r9813
2617	2632	adpcm[c].vol_shift = 1 + (volume >> 3); /* Yamaha engineers used the approximation: each -6 dB is close to divide by two (shift right) */
2618	2633	}
2619	2634
2620		adpcm[c].pan = &out_adpcm[(v>>6)&0x03];
	2635	adpcm[c].pan = &F2610->OPN.out_adpcm[(v>>6)&0x03];
2621	2636
2622	2637	/* calc pcm * volume data */
2623	2638	adpcm[c].adpcm_out = ((adpcm[c].adpcm_acc * adpcm[c].vol_mul) >> adpcm[c].vol_shift) & ~3; /* multiply, shift and mask out low 2 bits */
r9812	r9813
3260	3275	int i,j;
3261	3276	FMSAMPLE bufL,bufR;
3262	3277	FM_CH *cch[6];
	3278	INT32 *out_fm = OPN->out_fm;
3263	3279
3264	3280	/* set bufer */
3265	3281	bufL = buffer[0];
r9812	r9813
3271	3287	cch[3] = &F2608->CH[3];
3272	3288	cch[4] = &F2608->CH[4];
3273	3289	cch[5] = &F2608->CH[5];
3274		/* setup adpcm rom address */
3275		pcmbufA = F2608->pcmbuf;
3276		pcmsizeA = F2608->pcm_size;
3277	3290
3278	3291	/* refresh PG and EG */
3279	3292	refresh_fc_eg_chan( OPN, cch[0] );
r9812	r9813
3288	3301	refresh_fc_eg_slot(OPN, &cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
3289	3302	refresh_fc_eg_slot(OPN, &cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
3290	3303	}
3291		}else refresh_fc_eg_chan( OPN, cch[2] );
	3304	}
	3305	else
	3306	refresh_fc_eg_chan( OPN, cch[2] );
3292	3307	refresh_fc_eg_chan( OPN, cch[3] );
3293	3308	refresh_fc_eg_chan( OPN, cch[4] );
3294	3309	refresh_fc_eg_chan( OPN, cch[5] );
r9812	r9813
3301	3316	advance_lfo(OPN);
3302	3317
3303	3318	/* clear output acc. */
3304		out_adpcm[OUTD_LEFT] = out_adpcm[OUTD_RIGHT]= out_adpcm[OUTD_CENTER] = 0;
3305		out_delta[OUTD_LEFT] = out_delta[OUTD_RIGHT]= out_delta[OUTD_CENTER] = 0;
	3319	OPN->out_adpcm[OUTD_LEFT] = OPN->out_adpcm[OUTD_RIGHT] = OPN->out_adpcm[OUTD_CENTER] = 0;
	3320	OPN->out_delta[OUTD_LEFT] = OPN->out_delta[OUTD_RIGHT] = OPN->out_delta[OUTD_CENTER] = 0;
3306	3321	/* clear outputs */
3307	3322	out_fm[0] = 0;
3308	3323	out_fm[1] = 0;
r9812	r9813
3349	3364	{
3350	3365	int lt,rt;
3351	3366
3352		lt = out_adpcm[OUTD_LEFT] + out_adpcm[OUTD_CENTER];
3353		rt = out_adpcm[OUTD_RIGHT] + out_adpcm[OUTD_CENTER];
3354		lt += (out_delta[OUTD_LEFT] + out_delta[OUTD_CENTER])>>9;
3355		rt += (out_delta[OUTD_RIGHT] + out_delta[OUTD_CENTER])>>9;
	3367	lt = OPN->out_adpcm[OUTD_LEFT] + OPN->out_adpcm[OUTD_CENTER];
	3368	rt = OPN->out_adpcm[OUTD_RIGHT] + OPN->out_adpcm[OUTD_CENTER];
	3369	lt += (OPN->out_delta[OUTD_LEFT] + OPN->out_delta[OUTD_CENTER])>>9;
	3370	rt += (OPN->out_delta[OUTD_RIGHT] + OPN->out_delta[OUTD_CENTER])>>9;
3356	3371	lt += ((out_fm[0]>>1) & OPN->pan[0]); /* shift right verified on real YM2608 */
3357	3372	rt += ((out_fm[0]>>1) & OPN->pan[1]);
3358	3373	lt += ((out_fm[1]>>1) & OPN->pan[2]);
r9812	r9813
3588	3603	F2608->adpcm[i].now_step = 0;
3589	3604	/* F2608->adpcm[i].delta = 21866; */
3590	3605	F2608->adpcm[i].vol_mul = 0;
3591		F2608->adpcm[i].pan = &out_adpcm[OUTD_CENTER]; /* default center */
	3606	F2608->adpcm[i].pan = &OPN->out_adpcm[OUTD_CENTER]; /* default center */
3592	3607	F2608->adpcm[i].flagMask = 0;
3593	3608	F2608->adpcm[i].flag = 0;
3594	3609	F2608->adpcm[i].adpcm_acc = 0;
r9812	r9813
3601	3616
3602	3617	/* DELTA-T unit */
3603	3618	DELTAT->freqbase = OPN->ST.freqbase;
3604		DELTAT->output_pointer = out_delta;
	3619	DELTAT->output_pointer = OPN->out_delta;
3605	3620	DELTAT->portshift = 5; /* always 5bits shift / / ASG */
3606	3621	DELTAT->output_range = 1<<23;
3607	3622	YM_DELTAT_ADPCM_Reset(DELTAT,OUTD_CENTER,YM_DELTAT_EMULATION_MODE_NORMAL);
r9812	r9813
3713	3728	int addr = F2608->OPN.ST.address;
3714	3729	UINT8 ret = 0;
3715	3730
3716		switch( a&3 ){
	3731	switch( a&3 )
	3732	{
3717	3733	case 0: /* status 0 : YM2203 compatible */
3718	3734	/* BUSY:x:x:x:x:x:FLAGB:FLAGA */
3719	3735	ret = FM_STATUS_FLAG(&F2608->OPN.ST) & 0x83;
r9812	r9813
3800	3816	int i,j;
3801	3817	FMSAMPLE bufL,bufR;
3802	3818	FM_CH *cch[4];
	3819	INT32 *out_fm = OPN->out_fm;
3803	3820
3804	3821	/* buffer setup */
3805	3822	bufL = buffer[0];
r9812	r9813
3809	3826	cch[1] = &F2610->CH[2];
3810	3827	cch[2] = &F2610->CH[4];
3811	3828	cch[3] = &F2610->CH[5];
3812		/* setup adpcm rom address */
3813		pcmbufA = F2610->pcmbuf;
3814		pcmsizeA = F2610->pcm_size;
3815	3829
3816	3830	#ifdef YM2610B_WARNING
3817	3831	#define FM_KEY_IS(SLOT) ((SLOT)->key)
r9812	r9813
3835	3849	refresh_fc_eg_slot(OPN, &cch[1]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
3836	3850	refresh_fc_eg_slot(OPN, &cch[1]->SLOT[SLOT4] , cch[1]->fc , cch[1]->kcode );
3837	3851	}
3838		}else refresh_fc_eg_chan( OPN, cch[1] );
	3852	}
	3853	else
	3854	refresh_fc_eg_chan( OPN, cch[1] );
3839	3855	refresh_fc_eg_chan( OPN, cch[2] );
3840	3856	refresh_fc_eg_chan( OPN, cch[3] );
3841	3857
r9812	r9813
3846	3862	advance_lfo(OPN);
3847	3863
3848	3864	/* clear output acc. */
3849		out_adpcm[OUTD_LEFT] = out_adpcm[OUTD_RIGHT]= out_adpcm[OUTD_CENTER] = 0;
3850		out_delta[OUTD_LEFT] = out_delta[OUTD_RIGHT]= out_delta[OUTD_CENTER] = 0;
	3865	OPN->out_adpcm[OUTD_LEFT] = OPN->out_adpcm[OUTD_RIGHT] = OPN->out_adpcm[OUTD_CENTER] = 0;
	3866	OPN->out_delta[OUTD_LEFT] = OPN->out_delta[OUTD_RIGHT] = OPN->out_delta[OUTD_CENTER] = 0;
3851	3867	/* clear outputs */
3852	3868	out_fm[1] = 0;
3853	3869	out_fm[2] = 0;
r9812	r9813
3888	3904	{
3889	3905	int lt,rt;
3890	3906
3891		lt = out_adpcm[OUTD_LEFT] + out_adpcm[OUTD_CENTER];
3892		rt = out_adpcm[OUTD_RIGHT] + out_adpcm[OUTD_CENTER];
3893		lt += (out_delta[OUTD_LEFT] + out_delta[OUTD_CENTER])>>9;
3894		rt += (out_delta[OUTD_RIGHT] + out_delta[OUTD_CENTER])>>9;
	3907	lt = OPN->out_adpcm[OUTD_LEFT] + OPN->out_adpcm[OUTD_CENTER];
	3908	rt = OPN->out_adpcm[OUTD_RIGHT] + OPN->out_adpcm[OUTD_CENTER];
	3909	lt += (OPN->out_delta[OUTD_LEFT] + OPN->out_delta[OUTD_CENTER])>>9;
	3910	rt += (OPN->out_delta[OUTD_RIGHT] + OPN->out_delta[OUTD_CENTER])>>9;
3895	3911
3896	3912
3897	3913	lt += ((out_fm[1]>>1) & OPN->pan[2]); /* the shift right was verified on real chip */
r9812	r9813
3937	3953	int i,j;
3938	3954	FMSAMPLE bufL,bufR;
3939	3955	FM_CH *cch[6];
	3956	INT32 *out_fm = OPN->out_fm;
3940	3957
3941	3958	/* buffer setup */
3942	3959	bufL = buffer[0];
r9812	r9813
3948	3965	cch[3] = &F2610->CH[3];
3949	3966	cch[4] = &F2610->CH[4];
3950	3967	cch[5] = &F2610->CH[5];
3951		/* setup adpcm rom address */
3952		pcmbufA = F2610->pcmbuf;
3953		pcmsizeA = F2610->pcm_size;
3954	3968
3955	3969	/* refresh PG and EG */
3956	3970	refresh_fc_eg_chan( OPN, cch[0] );
r9812	r9813
3965	3979	refresh_fc_eg_slot(OPN, &cch[2]->SLOT[SLOT3] , OPN->SL3.fc[0] , OPN->SL3.kcode[0] );
3966	3980	refresh_fc_eg_slot(OPN, &cch[2]->SLOT[SLOT4] , cch[2]->fc , cch[2]->kcode );
3967	3981	}
3968		}else refresh_fc_eg_chan( OPN, cch[2] );
	3982	}
	3983	else
	3984	refresh_fc_eg_chan( OPN, cch[2] );
3969	3985	refresh_fc_eg_chan( OPN, cch[3] );
3970	3986	refresh_fc_eg_chan( OPN, cch[4] );
3971	3987	refresh_fc_eg_chan( OPN, cch[5] );
r9812	r9813
3977	3993	advance_lfo(OPN);
3978	3994
3979	3995	/* clear output acc. */
3980		out_adpcm[OUTD_LEFT] = out_adpcm[OUTD_RIGHT]= out_adpcm[OUTD_CENTER] = 0;
3981		out_delta[OUTD_LEFT] = out_delta[OUTD_RIGHT]= out_delta[OUTD_CENTER] = 0;
	3996	OPN->out_adpcm[OUTD_LEFT] = OPN->out_adpcm[OUTD_RIGHT] = OPN->out_adpcm[OUTD_CENTER] = 0;
	3997	OPN->out_delta[OUTD_LEFT] = OPN->out_delta[OUTD_RIGHT] = OPN->out_delta[OUTD_CENTER] = 0;
3982	3998	/* clear outputs */
3983	3999	out_fm[0] = 0;
3984	4000	out_fm[1] = 0;
r9812	r9813
4025	4041	{
4026	4042	int lt,rt;
4027	4043
4028		lt = out_adpcm[OUTD_LEFT] + out_adpcm[OUTD_CENTER];
4029		rt = out_adpcm[OUTD_RIGHT] + out_adpcm[OUTD_CENTER];
4030		lt += (out_delta[OUTD_LEFT] + out_delta[OUTD_CENTER])>>9;
4031		rt += (out_delta[OUTD_RIGHT] + out_delta[OUTD_CENTER])>>9;
	4044	lt = OPN->out_adpcm[OUTD_LEFT] + OPN->out_adpcm[OUTD_CENTER];
	4045	rt = OPN->out_adpcm[OUTD_RIGHT] + OPN->out_adpcm[OUTD_CENTER];
	4046	lt += (OPN->out_delta[OUTD_LEFT] + OPN->out_delta[OUTD_CENTER])>>9;
	4047	rt += (OPN->out_delta[OUTD_RIGHT] + OPN->out_delta[OUTD_CENTER])>>9;
4032	4048
4033	4049	lt += ((out_fm[0]>>1) & OPN->pan[0]); /* the shift right is verified on YM2610 */
4034	4050	rt += ((out_fm[0]>>1) & OPN->pan[1]);
r9812	r9813
4255	4271	}
4256	4272	for(i = 0x26 ; i >= 0x20 ; i-- ) OPNWriteReg(OPN,i,0);
4257	4273	/** ADPCM work initial **/
4258		for( i = 0; i < 6 ; i++ ){
	4274	for( i = 0; i < 6 ; i++ )
	4275	{
4259	4276	F2610->adpcm[i].step = (UINT32)((float)(1<<ADPCM_SHIFT)*((float)F2610->OPN.ST.freqbase)/3.0);
4260	4277	F2610->adpcm[i].now_addr = 0;
4261	4278	F2610->adpcm[i].now_step = 0;
r9812	r9813
4263	4280	F2610->adpcm[i].end = 0;
4264	4281	/* F2610->adpcm[i].delta = 21866; */
4265	4282	F2610->adpcm[i].vol_mul = 0;
4266		F2610->adpcm[i].pan = &out_adpcm[OUTD_CENTER]; /* default center */
	4283	F2610->adpcm[i].pan = &OPN->out_adpcm[OUTD_CENTER]; /* default center */
4267	4284	F2610->adpcm[i].flagMask = 1<<i;
4268	4285	F2610->adpcm[i].flag = 0;
4269	4286	F2610->adpcm[i].adpcm_acc = 0;
r9812	r9813
4276	4293
4277	4294	/* DELTA-T unit */
4278	4295	DELTAT->freqbase = OPN->ST.freqbase;
4279		DELTAT->output_pointer = out_delta;
	4296	DELTAT->output_pointer = OPN->out_delta;
4280	4297	DELTAT->portshift = 8; /* allways 8bits shift */
4281	4298	DELTAT->output_range = 1<<23;
4282	4299	YM_DELTAT_ADPCM_Reset(DELTAT,OUTD_CENTER,YM_DELTAT_EMULATION_MODE_YM2610);
r9812	r9813
4295	4312
4296	4313	v &= 0xff; /* adjust to 8 bit bus */
4297	4314
4298		switch( a&3 ){
	4315	switch( a&3 )
	4316	{
4299	4317	case 0: /* address port 0 */
4300	4318	OPN->ST.address = v;
4301	4319	F2610->addr_A1 = 0;
r9812	r9813
4394	4412	int addr = F2610->OPN.ST.address;
4395	4413	UINT8 ret = 0;
4396	4414
4397		switch( a&3){
	4415	switch( a&3)
	4416	{
4398	4417	case 0: /* status 0 : YM2203 compatible */
4399	4418	ret = FM_STATUS_FLAG(&F2610->OPN.ST) & 0x83;
4400	4419	break;

src/emu/sound/ymf278b.c
r9812	r9813
136	136	return (YMF278BChip )downcast<legacy_device_base >(device)->token();
137	137	}
138	138
139		static INT32 *mix;
140
141	139	static int ymf278b_compute_rate(YMF278BSlot *slot, int val)
142	140	{
143	141	int res, oct;
r9812	r9813
269	267	const UINT8 *rombase;
270	268	INT32 *mixp;
271	269	INT32 vl, vr;
	270	INT32 mix[44100*2];
272	271
273	272	memset(mix, 0, sizeof(mix[0])samples2);
274	273
r9812	r9813
672	671	chip->timer_b = timer_alloc(device->machine, ymf278b_timer_b_tick, chip);
673	672	chip->irq_line = CLEAR_LINE;
674	673	chip->clock = device->clock();
675
676		mix = auto_alloc_array(device->machine, INT32, 44100*2);
677	674	}
678	675
679	676	static void ymf278b_register_save_state(running_device device, YMF278BChip chip)

src/emu/emu.mak
r9812	r9813
191	191	$(EMUMACHINE)/roc10937.o \
192	192	$(EMUMACHINE)/rp5h01.o \
193	193	$(EMUMACHINE)/rtc65271.o \
	194	$(EMUMACHINE)/s3c2400.o \
	195	$(EMUMACHINE)/s3c2410.o \
	196	$(EMUMACHINE)/s3c2440.o \
194	197	$(EMUMACHINE)/scsi.o \
195	198	$(EMUMACHINE)/scsicd.o \
196	199	$(EMUMACHINE)/scsidev.o \
r9812	r9813
268	271	$(EMUOBJ)/video.o: $(EMUSRC)/rendersw.c
269	272	$(EMUVIDEO)/v9938.o: $(EMUSRC)/video/v9938mod.c
270	273
	274	$(EMUMACHINE)/s3c2400.o: $(EMUSRC)/machine/s3c24xx.c
	275	$(EMUMACHINE)/s3c2410.o: $(EMUSRC)/machine/s3c24xx.c
	276	$(EMUMACHINE)/s3c2440.o: $(EMUSRC)/machine/s3c24xx.c
271	277
	278
272	279	#-------------------------------------------------
273	280	# core layouts
274	281	#-------------------------------------------------

src/emu/machine/7474.c
r9812	r9813
327	327	m_output = -1;
328	328	m_last_clock = 1;
329	329	m_last_output = -1;
	330	m_last_output_comp = -1;
330	331	}

src/emu/machine/s3c2400.c
r0	r9813
	1	/*******************************************************************************
	2
	3	Samsung S3C2400
	4
	5	(c) 2010 Tim Schuerewegen
	6
	7	*******************************************************************************/
	8
	9	#include "emu.h"
	10	#include "cpu/arm7/arm7.h"
	11	#include "cpu/arm7/arm7core.h"
	12	#include "s3c2400.h"
	13	#include "sound/dac.h"
	14
	15	#define VERBOSE_LEVEL ( 0 )
	16
	17	INLINE void ATTR_PRINTF(3,4) verboselog( running_machine machine, int n_level, const char s_fmt, ...)
	18	{
	19	if (VERBOSE_LEVEL >= n_level)
	20	{
	21	va_list v;
	22	char buf[32768];
	23	va_start( v, s_fmt);
	24	vsprintf( buf, s_fmt, v);
	25	va_end( v);
	26	logerror( "%s: %s", cpuexec_describe_context( machine), buf);
	27	}
	28	}
	29
	30	#include "machine/s3c2400.h"
	31
	32	#define DEVICE_S3C2400
	33	#include "machine/s3c24xx.c"
	34	#undef DEVICE_S3C2400
	35
	36	VIDEO_START( s3c2400 )
	37	{
	38	running_device *device = machine->device( S3C2400_TAG);
	39	s3c24xx_video_start( device, machine);
	40	}
	41
	42	VIDEO_UPDATE( s3c2400 )
	43	{
	44	running_device *device = screen->machine->device( S3C2400_TAG);
	45	return s3c24xx_video_update( device, screen, bitmap, cliprect);
	46	}
	47
	48	DEVICE_START( s3c2400 )
	49	{
	50	const address_space *space = cputag_get_address_space( device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	51	DEVICE_START_CALL(s3c24xx);
	52	memory_install_readwrite32_device_handler( space, device, 0x14000000, 0x1400003b, 0, 0, s3c24xx_memcon_r, s3c24xx_memcon_w);
	53	memory_install_readwrite32_device_handler( space, device, 0x14200000, 0x1420005b, 0, 0, s3c24xx_usb_host_r, s3c24xx_usb_host_w);
	54	memory_install_readwrite32_device_handler( space, device, 0x14400000, 0x14400017, 0, 0, s3c24xx_irq_r, s3c24xx_irq_w);
	55	memory_install_readwrite32_device_handler( space, device, 0x14600000, 0x1460001b, 0, 0, s3c24xx_dma_0_r, s3c24xx_dma_0_w);
	56	memory_install_readwrite32_device_handler( space, device, 0x14600020, 0x1460003b, 0, 0, s3c24xx_dma_1_r, s3c24xx_dma_1_w);
	57	memory_install_readwrite32_device_handler( space, device, 0x14600040, 0x1460005b, 0, 0, s3c24xx_dma_2_r, s3c24xx_dma_2_w);
	58	memory_install_readwrite32_device_handler( space, device, 0x14600060, 0x1460007b, 0, 0, s3c24xx_dma_3_r, s3c24xx_dma_3_w);
	59	memory_install_readwrite32_device_handler( space, device, 0x14800000, 0x14800017, 0, 0, s3c24xx_clkpow_r, s3c24xx_clkpow_w);
	60	memory_install_readwrite32_device_handler( space, device, 0x14a00000, 0x14a003ff, 0, 0, s3c24xx_lcd_r, s3c24xx_lcd_w);
	61	memory_install_readwrite32_device_handler( space, device, 0x14a00400, 0x14a007ff, 0, 0, s3c24xx_lcd_palette_r, s3c24xx_lcd_palette_w);
	62	memory_install_readwrite32_device_handler( space, device, 0x15000000, 0x1500002b, 0, 0, s3c24xx_uart_0_r, s3c24xx_uart_0_w);
	63	memory_install_readwrite32_device_handler( space, device, 0x15004000, 0x1500402b, 0, 0, s3c24xx_uart_1_r, s3c24xx_uart_1_w);
	64	memory_install_readwrite32_device_handler( space, device, 0x15100000, 0x15100043, 0, 0, s3c24xx_pwm_r, s3c24xx_pwm_w);
	65	memory_install_readwrite32_device_handler( space, device, 0x15200140, 0x152001fb, 0, 0, s3c24xx_usb_device_r, s3c24xx_usb_device_w);
	66	memory_install_readwrite32_device_handler( space, device, 0x15300000, 0x1530000b, 0, 0, s3c24xx_wdt_r, s3c24xx_wdt_w);
	67	memory_install_readwrite32_device_handler( space, device, 0x15400000, 0x1540000f, 0, 0, s3c24xx_iic_r, s3c24xx_iic_w);
	68	memory_install_readwrite32_device_handler( space, device, 0x15508000, 0x15508013, 0, 0, s3c24xx_iis_r, s3c24xx_iis_w);
	69	memory_install_readwrite32_device_handler( space, device, 0x15600000, 0x1560005b, 0, 0, s3c24xx_gpio_r, s3c24xx_gpio_w);
	70	memory_install_readwrite32_device_handler( space, device, 0x15700040, 0x1570008b, 0, 0, s3c24xx_rtc_r, s3c24xx_rtc_w);
	71	memory_install_readwrite32_device_handler( space, device, 0x15800000, 0x15800007, 0, 0, s3c24xx_adc_r, s3c24xx_adc_w);
	72	memory_install_readwrite32_device_handler( space, device, 0x15900000, 0x15900017, 0, 0, s3c24xx_spi_0_r, s3c24xx_spi_0_w);
	73	memory_install_readwrite32_device_handler( space, device, 0x15a00000, 0x15a0003f, 0, 0, s3c24xx_mmc_r, s3c24xx_mmc_w);
	74	}
	75
	76	DEVICE_GET_INFO( s3c2400 )
	77	{
	78	switch ( state )
	79	{
	80	/* --- the following bits of info are returned as pointers to data or functions --- */
	81	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(s3c2400); break;
	82	/* --- the following bits of info are returned as NULL-terminated strings --- */
	83	case DEVINFO_STR_NAME: strcpy(info->s, "Samsung S3C2400"); break;
	84	/* --- default --- */
	85	default: DEVICE_GET_INFO_CALL(s3c24xx); break;
	86	}
	87	}
	88
	89	void s3c2400_uart_fifo_w( running_device *device, int uart, UINT8 data)
	90	{
	91	s3c24xx_uart_fifo_w( device, uart, data);
	92	}

src/emu/machine/s3c2400.h
r0	r9813
	1	/*******************************************************************************
	2
	3	Samsung S3C2400 private data
	4
	5	*******************************************************************************/
	6
	7	#ifndef __S3C2400_H__
	8	#define __S3C2400_H__
	9
	10	/*******************************************************************************
	11	MACROS / CONSTANTS
	12	*******************************************************************************/
	13
	14	#define S3C2400_TAG "s3c2400"
	15
	16	#define S3C2400 DEVICE_GET_INFO_NAME( s3c2400 )
	17
	18	#define MDRV_S3C2400_ADD(_tag, _clock, _config) \
	19	MDRV_DEVICE_ADD(_tag, S3C2400, _clock) \
	20	MDRV_DEVICE_CONFIG(_config)
	21
	22	#define S3C2400_INTERFACE(name) \
	23	const s3c2400_interface(name) =
	24
	25	enum
	26	{
	27	S3C2400_GPIO_PORT_A = 0,
	28	S3C2400_GPIO_PORT_B,
	29	S3C2400_GPIO_PORT_C,
	30	S3C2400_GPIO_PORT_D,
	31	S3C2400_GPIO_PORT_E,
	32	S3C2400_GPIO_PORT_F,
	33	S3C2400_GPIO_PORT_G
	34	};
	35
	36	/*******************************************************************************
	37	TYPE DEFINITIONS
	38	*******************************************************************************/
	39
	40	typedef UINT32 (s3c24xx_gpio_port_r_func)( running_device device, int port);
	41	typedef void (s3c24xx_gpio_port_w_func)( running_device device, int port, UINT32 data);
	42
	43	typedef struct _s3c2400_interface_gpio s3c2400_interface_gpio;
	44	struct _s3c2400_interface_gpio
	45	{
	46	s3c24xx_gpio_port_r_func port_r;
	47	s3c24xx_gpio_port_w_func port_w;
	48	};
	49
	50	typedef struct _s3c2400_interface_i2c s3c2400_interface_i2c;
	51	struct _s3c2400_interface_i2c
	52	{
	53	write_line_device_func scl_w;
	54	read_line_device_func sda_r;
	55	write_line_device_func sda_w;
	56	};
	57
	58	typedef struct _s3c2400_interface_adc s3c2400_interface_adc;
	59	struct _s3c2400_interface_adc
	60	{
	61	read32_device_func data_r;
	62	};
	63
	64	typedef struct _s3c2400_interface_i2s s3c2400_interface_i2s;
	65	struct _s3c2400_interface_i2s
	66	{
	67	write16_device_func data_w;
	68	};
	69
	70	typedef struct _s3c2400_interface s3c2400_interface;
	71	struct _s3c2400_interface
	72	{
	73	s3c2400_interface_gpio gpio;
	74	s3c2400_interface_i2c i2c;
	75	s3c2400_interface_adc adc;
	76	s3c2400_interface_i2s i2s;
	77	};
	78
	79	/*******************************************************************************
	80	PROTOTYPES
	81	*******************************************************************************/
	82
	83	DEVICE_GET_INFO( s3c2400 );
	84
	85	VIDEO_START( s3c2400 );
	86	VIDEO_UPDATE( s3c2400 );
	87
	88	void s3c2400_uart_fifo_w( running_device *device, int uart, UINT8 data);
	89
	90	/*******************************************************************************
	91	MACROS & CONSTANTS
	92	*******************************************************************************/
	93
	94	/* Memory Controller */
	95
	96	#define S3C24XX_BASE_MEMCON 0x14000000
	97
	98	/* USB Host Controller */
	99
	100	#define S3C24XX_BASE_USBHOST 0x14200000
	101
	102	/* Interrupt Controller */
	103
	104	#define S3C24XX_BASE_INT 0x14400000
	105
	106	#define S3C24XX_SRCPND (0x00 / 4) // Interrupt Request Status
	107	#define S3C24XX_INTMOD (0x04 / 4) // Interrupt Mode Control
	108	#define S3C24XX_INTMSK (0x08 / 4) // Interrupt Mask Control
	109	#define S3C24XX_PRIORITY (0x0C / 4) // IRQ Priority Control
	110	#define S3C24XX_INTPND (0x10 / 4) // Interrupt Request Status
	111	#define S3C24XX_INTOFFSET (0x14 / 4) // Interrupt Request Source Offset
	112
	113	/* DMA */
	114
	115	#define S3C24XX_BASE_DMA_0 0x14600000
	116	#define S3C24XX_BASE_DMA_1 0x14600020
	117	#define S3C24XX_BASE_DMA_2 0x14600040
	118	#define S3C24XX_BASE_DMA_3 0x14600060
	119
	120	#define S3C24XX_DISRC (0x00 / 4) // DMA Initial Source
	121	#define S3C24XX_DIDST (0x04 / 4) // DMA Initial Destination
	122	#define S3C24XX_DCON (0x08 / 4) // DMA Control
	123	#define S3C24XX_DSTAT (0x0C / 4) // DMA Count
	124	#define S3C24XX_DCSRC (0x10 / 4) // DMA Current Source Address
	125	#define S3C24XX_DCDST (0x14 / 4) // DMA Current Destination Address
	126	#define S3C24XX_DMASKTRIG (0x18 / 4) // DMA Mask Trigger
	127
	128	/* Clock & Power Management */
	129
	130	#define S3C24XX_BASE_CLKPOW 0x14800000
	131
	132	#define S3C24XX_LOCKTIME (0x00 / 4) // PLL Lock Time Counter
	133	#define S3C24XX_MPLLCON (0x04 / 4) // MPLL Control
	134	#define S3C24XX_UPLLCON (0x08 / 4) // UPLL Control
	135	#define S3C24XX_CLKCON (0x0C / 4) // Clock Generator Control
	136	#define S3C24XX_CLKSLOW (0x10 / 4) // Slow Clock Control
	137	#define S3C24XX_CLKDIVN (0x14 / 4) // Clock Divider Control
	138
	139	/* LCD Controller */
	140
	141	#define S3C24XX_BASE_LCD 0x14a00000
	142	#define S3C24XX_BASE_LCDPAL 0x14a00400
	143
	144	#define S3C24XX_LCDCON1 (0x00 / 4) // LCD Control 1
	145	#define S3C24XX_LCDCON2 (0x04 / 4) // LCD Control 2
	146	#define S3C24XX_LCDCON3 (0x08 / 4) // LCD Control 3
	147	#define S3C24XX_LCDCON4 (0x0C / 4) // LCD Control 4
	148	#define S3C24XX_LCDCON5 (0x10 / 4) // LCD Control 5
	149	#define S3C24XX_LCDSADDR1 (0x14 / 4) // STN/TFT: Frame Buffer Start Address 1
	150	#define S3C24XX_LCDSADDR2 (0x18 / 4) // STN/TFT: Frame Buffer Start Address 2
	151	#define S3C24XX_LCDSADDR3 (0x1C / 4) // STN/TFT: Virtual Screen Address Set
	152	#define S3C24XX_REDLUT (0x20 / 4) // STN: Red Lookup Table
	153	#define S3C24XX_GREENLUT (0x24 / 4) // STN: Green Lookup Table
	154	#define S3C24XX_BLUELUT (0x28 / 4) // STN: Blue Lookup Table
	155	#define S3C24XX_DITHMODE (0x4C / 4) // STN: Dithering Mode
	156	#define S3C24XX_TPAL (0x50 / 4) // TFT: Temporary Palette
	157
	158	/* UART */
	159
	160	#define S3C24XX_BASE_UART_0 0x15000000
	161	#define S3C24XX_BASE_UART_1 0x15004000
	162
	163	#define S3C24XX_ULCON (0x00 / 4) // UART Line Control
	164	#define S3C24XX_UCON (0x04 / 4) // UART Control
	165	#define S3C24XX_UFCON (0x08 / 4) // UART FIFO Control
	166	#define S3C24XX_UMCON (0x0C / 4) // UART Modem Control
	167	#define S3C24XX_UTRSTAT (0x10 / 4) // UART Tx/Rx Status
	168	#define S3C24XX_UERSTAT (0x14 / 4) // UART Rx Error Status
	169	#define S3C24XX_UFSTAT (0x18 / 4) // UART FIFO Status
	170	#define S3C24XX_UMSTAT (0x1C / 4) // UART Modem Status
	171	#define S3C24XX_UTXH (0x20 / 4) // UART Transmission Hold
	172	#define S3C24XX_URXH (0x24 / 4) // UART Receive Buffer
	173	#define S3C24XX_UBRDIV (0x28 / 4) // UART Baud Rate Divisor
	174
	175	/* PWM Timer */
	176
	177	#define S3C24XX_BASE_PWM 0x15100000
	178
	179	#define S3C24XX_TCFG0 (0x00 / 4) // Timer Configuration
	180	#define S3C24XX_TCFG1 (0x04 / 4) // Timer Configuration
	181	#define S3C24XX_TCON (0x08 / 4) // Timer Control
	182	#define S3C24XX_TCNTB0 (0x0C / 4) // Timer Count Buffer 0
	183	#define S3C24XX_TCMPB0 (0x10 / 4) // Timer Compare Buffer 0
	184	#define S3C24XX_TCNTO0 (0x14 / 4) // Timer Count Observation 0
	185	#define S3C24XX_TCNTB1 (0x18 / 4) // Timer Count Buffer 1
	186	#define S3C24XX_TCMPB1 (0x1C / 4) // Timer Compare Buffer 1
	187	#define S3C24XX_TCNTO1 (0x20 / 4) // Timer Count Observation 1
	188	#define S3C24XX_TCNTB2 (0x24 / 4) // Timer Count Buffer 2
	189	#define S3C24XX_TCMPB2 (0x28 / 4) // Timer Compare Buffer 2
	190	#define S3C24XX_TCNTO2 (0x2C / 4) // Timer Count Observation 2
	191	#define S3C24XX_TCNTB3 (0x30 / 4) // Timer Count Buffer 3
	192	#define S3C24XX_TCMPB3 (0x34 / 4) // Timer Compare Buffer 3
	193	#define S3C24XX_TCNTO3 (0x38 / 4) // Timer Count Observation 3
	194	#define S3C24XX_TCNTB4 (0x3C / 4) // Timer Count Buffer 4
	195	#define S3C24XX_TCNTO4 (0x40 / 4) // Timer Count Observation 4
	196
	197	/* USB Device */
	198
	199	#define S3C24XX_BASE_USBDEV 0x15200140
	200
	201	/* Watchdog Timer */
	202
	203	#define S3C24XX_BASE_WDT 0x15300000
	204
	205	#define S3C24XX_WTCON (0x00 / 4) // Watchdog Timer Mode
	206	#define S3C24XX_WTDAT (0x04 / 4) // Watchdog Timer Data
	207	#define S3C24XX_WTCNT (0x08 / 4) // Watchdog Timer Count
	208
	209	/* IIC */
	210
	211	#define S3C24XX_BASE_IIC 0x15400000
	212
	213	#define S3C24XX_IICCON (0x00 / 4) // IIC Control
	214	#define S3C24XX_IICSTAT (0x04 / 4) // IIC Status
	215	#define S3C24XX_IICADD (0x08 / 4) // IIC Address
	216	#define S3C24XX_IICDS (0x0C / 4) // IIC Data Shift
	217
	218	/* IIS */
	219
	220	#define S3C24XX_BASE_IIS 0x15508000
	221
	222	#define S3C24XX_IISCON (0x00 / 4) // IIS Control
	223	#define S3C24XX_IISMOD (0x04 / 4) // IIS Mode
	224	#define S3C24XX_IISPSR (0x08 / 4) // IIS Prescaler
	225	#define S3C24XX_IISFCON (0x0C / 4) // IIS FIFO Control
	226	#define S3C24XX_IISFIFO (0x10 / 4) // IIS FIFO Entry
	227
	228	/* I/O Port */
	229
	230	#define S3C24XX_BASE_GPIO 0x15600000
	231
	232	#define S3C24XX_GPACON (0x00 / 4) // Port A Control
	233	#define S3C24XX_GPADAT (0x04 / 4) // Port A Data
	234	#define S3C24XX_GPBCON (0x08 / 4) // Port B Control
	235	#define S3C24XX_GPBDAT (0x0C / 4) // Port B Data
	236	#define S3C24XX_GPBUP (0x10 / 4) // Pull-up Control B
	237	#define S3C24XX_GPCCON (0x14 / 4) // Port C Control
	238	#define S3C24XX_GPCDAT (0x18 / 4) // Port C Data
	239	#define S3C24XX_GPCUP (0x1C / 4) // Pull-up Control C
	240	#define S3C24XX_GPDCON (0x20 / 4) // Port D Control
	241	#define S3C24XX_GPDDAT (0x24 / 4) // Port D Data
	242	#define S3C24XX_GPDUP (0x28 / 4) // Pull-up Control D
	243	#define S3C24XX_GPECON (0x2C / 4) // Port E Control
	244	#define S3C24XX_GPEDAT (0x30 / 4) // Port E Data
	245	#define S3C24XX_GPEUP (0x34 / 4) // Pull-up Control E
	246	#define S3C24XX_GPFCON (0x38 / 4) // Port F Control
	247	#define S3C24XX_GPFDAT (0x3C / 4) // Port F Data
	248	#define S3C24XX_GPFUP (0x40 / 4) // Pull-up Control F
	249	#define S3C24XX_GPGCON (0x44 / 4) // Port G Control
	250	#define S3C24XX_GPGDAT (0x48 / 4) // Port G Data
	251	#define S3C24XX_GPGUP (0x4C / 4) // Pull-up Control G
	252	#define S3C24XX_OPENCR (0x50 / 4) // Open Drain Enable
	253	#define S3C24XX_MISCCR (0x54 / 4) // Miscellaneous Control
	254	#define S3C24XX_EXTINT (0x58 / 4) // External Interrupt Control
	255
	256	#define S3C24XX_GPADAT_MASK 0x0003FFFF
	257	#define S3C24XX_GPBDAT_MASK 0x0000FFFF
	258	#define S3C24XX_GPCDAT_MASK 0x0000FFFF
	259	#define S3C24XX_GPDDAT_MASK 0x000007FF
	260	#define S3C24XX_GPEDAT_MASK 0x00000FFF
	261	#define S3C24XX_GPFDAT_MASK 0x0000007F
	262	#define S3C24XX_GPGDAT_MASK 0x000003FF
	263
	264	/* RTC */
	265
	266	#define S3C24XX_BASE_RTC 0x15700040
	267
	268	#define S3C24XX_RTCCON (0x00 / 4) // RTC Control
	269	#define S3C24XX_TICNT (0x04 / 4) // Tick Time count
	270	#define S3C24XX_RTCALM (0x10 / 4) // RTC Alarm Control
	271	#define S3C24XX_ALMSEC (0x14 / 4) // Alarm Second
	272	#define S3C24XX_ALMMIN (0x18 / 4) // Alarm Minute
	273	#define S3C24XX_ALMHOUR (0x1C / 4) // Alarm Hour
	274	#define S3C24XX_ALMDAY (0x20 / 4) // Alarm Day
	275	#define S3C24XX_ALMMON (0x24 / 4) // Alarm Month
	276	#define S3C24XX_ALMYEAR (0x28 / 4) // Alarm Year
	277	#define S3C24XX_RTCRST (0x2C / 4) // RTC Round Reset
	278	#define S3C24XX_BCDSEC (0x30 / 4) // BCD Second
	279	#define S3C24XX_BCDMIN (0x34 / 4) // BCD Minute
	280	#define S3C24XX_BCDHOUR (0x38 / 4) // BCD Hour
	281	#define S3C24XX_BCDDAY (0x3C / 4) // BCD Day
	282	#define S3C24XX_BCDDOW (0x40 / 4) // BCD Day of Week
	283	#define S3C24XX_BCDMON (0x44 / 4) // BCD Month
	284	#define S3C24XX_BCDYEAR (0x48 / 4) // BCD Year
	285
	286	/* A/D Converter */
	287
	288	#define S3C24XX_BASE_ADC 0x15800000
	289
	290	#define S3C24XX_ADCCON (0x00 / 4) // ADC Control
	291	#define S3C24XX_ADCDAT (0x04 / 4) // ADC Data
	292
	293	/* SPI */
	294
	295	#define S3C24XX_BASE_SPI_0 0x15900000
	296
	297	#define S3C24XX_SPCON (0x00 / 4) // SPI Control
	298	#define S3C24XX_SPSTA (0x04 / 4) // SPI Status
	299	#define S3C24XX_SPPIN (0x08 / 4) // SPI Pin Control
	300	#define S3C24XX_SPPRE (0x0C / 4) // SPI Baud Rate Prescaler
	301	#define S3C24XX_SPTDAT (0x10 / 4) // SPI Tx Data
	302	#define S3C24XX_SPRDAT (0x14 / 4) // SPI Rx Data
	303
	304	/* MMC Interface */
	305
	306	#define S3C24XX_BASE_MMC 0x15a00000
	307
	308	/* ... */
	309
	310	#define S3C24XX_INT_ADC 31
	311	#define S3C24XX_INT_RTC 30
	312	#define S3C24XX_INT_UTXD1 29
	313	#define S3C24XX_INT_UTXD0 28
	314	#define S3C24XX_INT_IIC 27
	315	#define S3C24XX_INT_USBH 26
	316	#define S3C24XX_INT_USBD 25
	317	#define S3C24XX_INT_URXD1 24
	318	#define S3C24XX_INT_URXD0 23
	319	#define S3C24XX_INT_SPI 22
	320	#define S3C24XX_INT_MMC 21
	321	#define S3C24XX_INT_DMA3 20
	322	#define S3C24XX_INT_DMA2 19
	323	#define S3C24XX_INT_DMA1 18
	324	#define S3C24XX_INT_DMA0 17
	325	#define S3C24XX_INT_RESERVED 16
	326	#define S3C24XX_INT_UERR 15
	327	#define S3C24XX_INT_TIMER4 14
	328	#define S3C24XX_INT_TIMER3 13
	329	#define S3C24XX_INT_TIMER2 12
	330	#define S3C24XX_INT_TIMER1 11
	331	#define S3C24XX_INT_TIMER0 10
	332	#define S3C24XX_INT_WDT 9
	333	#define S3C24XX_INT_TICK 8
	334	#define S3C24XX_INT_EINT7 7
	335	#define S3C24XX_INT_EINT6 6
	336	#define S3C24XX_INT_EINT5 5
	337	#define S3C24XX_INT_EINT4 4
	338	#define S3C24XX_INT_EINT3 3
	339	#define S3C24XX_INT_EINT2 2
	340	#define S3C24XX_INT_EINT1 1
	341	#define S3C24XX_INT_EINT0 0
	342
	343	#define S3C24XX_BPPMODE_STN_01 0x00
	344	#define S3C24XX_BPPMODE_STN_02 0x01
	345	#define S3C24XX_BPPMODE_STN_04 0x02
	346	#define S3C24XX_BPPMODE_STN_08 0x03
	347	#define S3C24XX_BPPMODE_STN_12_P 0x04
	348	#define S3C24XX_BPPMODE_STN_12_U 0x05
	349	#define S3C24XX_BPPMODE_STN_16 0x06
	350	#define S3C24XX_BPPMODE_TFT_01 0x08
	351	#define S3C24XX_BPPMODE_TFT_02 0x09
	352	#define S3C24XX_BPPMODE_TFT_04 0x0A
	353	#define S3C24XX_BPPMODE_TFT_08 0x0B
	354	#define S3C24XX_BPPMODE_TFT_16 0x0C
	355	#define S3C24XX_BPPMODE_TFT_24 0x0D
	356
	357	#define S3C24XX_PNRMODE_STN_04_DS 0
	358	#define S3C24XX_PNRMODE_STN_04_SS 1
	359	#define S3C24XX_PNRMODE_STN_08_SS 2
	360	#define S3C24XX_PNRMODE_TFT 3
	361
	362	#define S3C24XX_GPIO_PORT_A S3C2400_GPIO_PORT_A
	363	#define S3C24XX_GPIO_PORT_B S3C2400_GPIO_PORT_B
	364	#define S3C24XX_GPIO_PORT_C S3C2400_GPIO_PORT_C
	365	#define S3C24XX_GPIO_PORT_D S3C2400_GPIO_PORT_D
	366	#define S3C24XX_GPIO_PORT_E S3C2400_GPIO_PORT_E
	367	#define S3C24XX_GPIO_PORT_F S3C2400_GPIO_PORT_F
	368	#define S3C24XX_GPIO_PORT_G S3C2400_GPIO_PORT_G
	369
	370	/*******************************************************************************
	371	TYPE DEFINITIONS
	372	*******************************************************************************/
	373
	374	typedef struct
	375	{
	376	UINT32 data[0x34/4];
	377	} s3c24xx_memcon_regs_t;
	378
	379	typedef struct
	380	{
	381	UINT32 data[0x5C/4];
	382	} s3c24xx_usbhost_regs_t;
	383
	384	typedef struct
	385	{
	386	UINT32 srcpnd;
	387	UINT32 intmod;
	388	UINT32 intmsk;
	389	UINT32 priority;
	390	UINT32 intpnd;
	391	UINT32 intoffset;
	392	} s3c24xx_irq_regs_t;
	393
	394	typedef struct
	395	{
	396	UINT32 disrc;
	397	UINT32 didst;
	398	UINT32 dcon;
	399	UINT32 dstat;
	400	UINT32 dcsrc;
	401	UINT32 dcdst;
	402	UINT32 dmasktrig;
	403	} s3c24xx_dma_regs_t;
	404
	405	typedef struct
	406	{
	407	UINT32 locktime;
	408	UINT32 mpllcon;
	409	UINT32 upllcon;
	410	UINT32 clkcon;
	411	UINT32 clkslow;
	412	UINT32 clkdivn;
	413	} s3c24xx_clkpow_regs_t;
	414
	415	typedef struct
	416	{
	417	UINT32 lcdcon1;
	418	UINT32 lcdcon2;
	419	UINT32 lcdcon3;
	420	UINT32 lcdcon4;
	421	UINT32 lcdcon5;
	422	UINT32 lcdsaddr1;
	423	UINT32 lcdsaddr2;
	424	UINT32 lcdsaddr3;
	425	UINT32 redlut;
	426	UINT32 greenlut;
	427	UINT32 bluelut;
	428	UINT32 reserved[8];
	429	UINT32 dithmode;
	430	UINT32 tpal;
	431	} s3c24xx_lcd_regs_t;
	432
	433	typedef struct
	434	{
	435	UINT32 data[0x400/4];
	436	} s3c24xx_lcdpal_regs_t;
	437
	438	typedef struct
	439	{
	440	UINT32 ulcon;
	441	UINT32 ucon;
	442	UINT32 ufcon;
	443	UINT32 umcon;
	444	UINT32 utrstat;
	445	UINT32 uerstat;
	446	UINT32 ufstat;
	447	UINT32 umstat;
	448	UINT32 utxh;
	449	UINT32 urxh;
	450	UINT32 ubrdiv;
	451	} s3c24xx_uart_regs_t;
	452
	453	typedef struct
	454	{
	455	UINT32 tcfg0;
	456	UINT32 tcfg1;
	457	UINT32 tcon;
	458	UINT32 tcntb0;
	459	UINT32 tcmpb0;
	460	UINT32 tcnto0;
	461	UINT32 tcntb1;
	462	UINT32 tcmpb1;
	463	UINT32 tcnto1;
	464	UINT32 tcntb2;
	465	UINT32 tcmpb2;
	466	UINT32 tcnto2;
	467	UINT32 tcntb3;
	468	UINT32 tcmpb3;
	469	UINT32 tcnto3;
	470	UINT32 tcntb4;
	471	UINT32 tcnto4;
	472	} s3c24xx_pwm_regs_t;
	473
	474	typedef struct
	475	{
	476	UINT32 data[0xBC/4];
	477	} s3c24xx_usbdev_regs_t;
	478
	479	typedef struct
	480	{
	481	UINT32 wtcon;
	482	UINT32 wtdat;
	483	UINT32 wtcnt;
	484	} s3c24xx_wdt_regs_t;
	485
	486	typedef struct
	487	{
	488	UINT32 iiccon;
	489	UINT32 iicstat;
	490	UINT32 iicadd;
	491	UINT32 iicds;
	492	} s3c24xx_iic_regs_t;
	493
	494	typedef struct
	495	{
	496	UINT32 iiscon;
	497	UINT32 iismod;
	498	UINT32 iispsr;
	499	UINT32 iisfcon;
	500	UINT32 iisfifo;
	501	} s3c24xx_iis_regs_t;
	502
	503	typedef struct
	504	{
	505	UINT32 gpacon;
	506	UINT32 gpadat;
	507	UINT32 gpbcon;
	508	UINT32 gpbdat;
	509	UINT32 gpbup;
	510	UINT32 gpccon;
	511	UINT32 gpcdat;
	512	UINT32 gpcup;
	513	UINT32 gpdcon;
	514	UINT32 gpddat;
	515	UINT32 gpdup;
	516	UINT32 gpecon;
	517	UINT32 gpedat;
	518	UINT32 gpeup;
	519	UINT32 gpfcon;
	520	UINT32 gpfdat;
	521	UINT32 gpfup;
	522	UINT32 gpgcon;
	523	UINT32 gpgdat;
	524	UINT32 gpgup;
	525	UINT32 opencr;
	526	UINT32 misccr;
	527	UINT32 extint;
	528	} s3c24xx_gpio_regs_t;
	529
	530	typedef struct
	531	{
	532	UINT32 rtccon;
	533	UINT32 ticnt;
	534	UINT32 reserved[2];
	535	UINT32 rtcalm;
	536	UINT32 almsec;
	537	UINT32 almmin;
	538	UINT32 almhour;
	539	UINT32 almday;
	540	UINT32 almmon;
	541	UINT32 almyear;
	542	UINT32 rtcrst;
	543	UINT32 bcdsec;
	544	UINT32 bcdmin;
	545	UINT32 bcdhour;
	546	UINT32 bcdday;
	547	UINT32 bcddow;
	548	UINT32 bcdmon;
	549	UINT32 bcdyear;
	550	} s3c24xx_rtc_regs_t;
	551
	552	typedef struct
	553	{
	554	UINT32 adccon;
	555	UINT32 adcdat;
	556	} s3c24xx_adc_regs_t;
	557
	558	typedef struct
	559	{
	560	UINT32 spcon;
	561	UINT32 spsta;
	562	UINT32 sppin;
	563	UINT32 sppre;
	564	UINT32 sptdat;
	565	UINT32 sprdat;
	566	} s3c24xx_spi_regs_t;
	567
	568	typedef struct
	569	{
	570	UINT32 data[0x40/4];
	571	} s3c24xx_mmc_regs_t;
	572
	573	typedef struct
	574	{
	575	s3c24xx_memcon_regs_t regs;
	576	} s3c24xx_memcon_t;
	577
	578	typedef struct
	579	{
	580	s3c24xx_usbhost_regs_t regs;
	581	} s3c24xx_usbhost_t;
	582
	583	typedef struct
	584	{
	585	s3c24xx_irq_regs_t regs;
	586	} s3c24xx_irq_t;
	587
	588	typedef struct
	589	{
	590	s3c24xx_dma_regs_t regs;
	591	emu_timer *timer;
	592	} s3c24xx_dma_t;
	593
	594	typedef struct
	595	{
	596	s3c24xx_clkpow_regs_t regs;
	597	} s3c24xx_clkpow_t;
	598
	599	typedef struct
	600	{
	601	s3c24xx_lcd_regs_t regs;
	602	emu_timer *timer;
	603	bitmap_t *bitmap[2];
	604	UINT32 vramaddr_cur;
	605	UINT32 vramaddr_max;
	606	UINT32 offsize;
	607	UINT32 pagewidth_cur;
	608	UINT32 pagewidth_max;
	609	UINT32 bppmode;
	610	UINT32 bswp, hwswp;
	611	int vpos, hpos;
	612	double framerate;
	613	UINT32 tpal;
	614	UINT32 hpos_min, hpos_max, vpos_min, vpos_max;
	615	UINT32 dma_data, dma_bits;
	616	} s3c24xx_lcd_t;
	617
	618	typedef struct
	619	{
	620	s3c24xx_lcdpal_regs_t regs;
	621	} s3c24xx_lcdpal_t;
	622
	623	typedef struct
	624	{
	625	s3c24xx_uart_regs_t regs;
	626	} s3c24xx_uart_t;
	627
	628	typedef struct
	629	{
	630	s3c24xx_pwm_regs_t regs;
	631	emu_timer *timer[5];
	632	UINT32 cnt[5];
	633	UINT32 cmp[5];
	634	UINT32 freq[5];
	635	} s3c24xx_pwm_t;
	636
	637	typedef struct
	638	{
	639	s3c24xx_usbdev_regs_t regs;
	640	} s3c24xx_usbdev_t;
	641
	642	typedef struct
	643	{
	644	s3c24xx_wdt_regs_t regs;
	645	emu_timer *timer;
	646	} s3c24xx_wdt_t;
	647
	648	typedef struct
	649	{
	650	s3c24xx_iic_regs_t regs;
	651	emu_timer *timer;
	652	int count;
	653	} s3c24xx_iic_t;
	654
	655	typedef struct
	656	{
	657	s3c24xx_iis_regs_t regs;
	658	emu_timer *timer;
	659	UINT16 fifo[16/2];
	660	int fifo_index;
	661	} s3c24xx_iis_t;
	662
	663	typedef struct
	664	{
	665	s3c24xx_gpio_regs_t regs;
	666	} s3c24xx_gpio_t;
	667
	668	typedef struct
	669	{
	670	s3c24xx_rtc_regs_t regs;
	671	emu_timer *timer_tick_count;
	672	emu_timer *timer_update;
	673	} s3c24xx_rtc_t;
	674
	675	typedef struct
	676	{
	677	s3c24xx_adc_regs_t regs;
	678	} s3c24xx_adc_t;
	679
	680	typedef struct
	681	{
	682	s3c24xx_spi_regs_t regs;
	683	} s3c24xx_spi_t;
	684
	685	typedef struct
	686	{
	687	s3c24xx_mmc_regs_t regs;
	688	} s3c24xx_mmc_t;
	689
	690	typedef struct
	691	{
	692	const s3c2400_interface *iface;
	693	s3c24xx_memcon_t memcon;
	694	s3c24xx_usbhost_t usbhost;
	695	s3c24xx_irq_t irq;
	696	s3c24xx_dma_t dma[4];
	697	s3c24xx_clkpow_t clkpow;
	698	s3c24xx_lcd_t lcd;
	699	s3c24xx_lcdpal_t lcdpal;
	700	s3c24xx_uart_t uart[2];
	701	s3c24xx_pwm_t pwm;
	702	s3c24xx_usbdev_t usbdev;
	703	s3c24xx_wdt_t wdt;
	704	s3c24xx_iic_t iic;
	705	s3c24xx_iis_t iis;
	706	s3c24xx_gpio_t gpio;
	707	s3c24xx_rtc_t rtc;
	708	s3c24xx_adc_t adc;
	709	s3c24xx_spi_t spi[1];
	710	s3c24xx_mmc_t mmc;
	711	} s3c24xx_t;
	712
	713	#endif

src/emu/machine/6850acia.c
r9812	r9813
736	736
737	737
738	738	/*-------------------------------------------------
739		set_rx_clock - set receiver clock
	739	set_rx_clock - set receiver clock
740	740	-------------------------------------------------*/
741	741
742	742	void acia6850_device::set_rx_clock(int clock)
r9812	r9813
763	763
764	764
765	765	/*-------------------------------------------------
766		set_tx_clock - set receiver clock
	766	set_tx_clock - set receiver clock
767	767	-------------------------------------------------*/
768	768
769	769	void acia6850_device::set_tx_clock(int clock)

src/emu/machine/s3c2410.c
r0	r9813
	1	/*******************************************************************************
	2
	3	Samsung S3C2410
	4
	5	(c) 2010 Tim Schuerewegen
	6
	7	*******************************************************************************/
	8
	9	#include "emu.h"
	10	#include "cpu/arm7/arm7.h"
	11	#include "cpu/arm7/arm7core.h"
	12	#include "s3c2410.h"
	13	#include "sound/dac.h"
	14
	15	#define VERBOSE_LEVEL ( 0 )
	16
	17	INLINE void ATTR_PRINTF(3,4) verboselog( running_machine machine, int n_level, const char s_fmt, ...)
	18	{
	19	if (VERBOSE_LEVEL >= n_level)
	20	{
	21	va_list v;
	22	char buf[32768];
	23	va_start( v, s_fmt);
	24	vsprintf( buf, s_fmt, v);
	25	va_end( v);
	26	logerror( "%s: %s", cpuexec_describe_context( machine), buf);
	27	}
	28	}
	29
	30	#include "machine/s3c2410.h"
	31
	32	#define DEVICE_S3C2410
	33	#include "machine/s3c24xx.c"
	34	#undef DEVICE_S3C2410
	35
	36	VIDEO_START( s3c2410 )
	37	{
	38	running_device *device = machine->device( S3C2410_TAG);
	39	s3c24xx_video_start( device, machine);
	40	}
	41
	42	VIDEO_UPDATE( s3c2410 )
	43	{
	44	running_device *device = screen->machine->device( S3C2410_TAG);
	45	return s3c24xx_video_update( device, screen, bitmap, cliprect);
	46	}
	47
	48	DEVICE_START( s3c2410 )
	49	{
	50	const address_space *space = cputag_get_address_space( device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	51	DEVICE_START_CALL(s3c24xx);
	52	memory_install_readwrite32_device_handler( space, device, 0x48000000, 0x4800003b, 0, 0, s3c24xx_memcon_r, s3c24xx_memcon_w);
	53	memory_install_readwrite32_device_handler( space, device, 0x49000000, 0x4900005b, 0, 0, s3c24xx_usb_host_r, s3c24xx_usb_host_w);
	54	memory_install_readwrite32_device_handler( space, device, 0x4a000000, 0x4a00001f, 0, 0, s3c24xx_irq_r, s3c24xx_irq_w);
	55	memory_install_readwrite32_device_handler( space, device, 0x4b000000, 0x4b000023, 0, 0, s3c24xx_dma_0_r, s3c24xx_dma_0_w);
	56	memory_install_readwrite32_device_handler( space, device, 0x4b000040, 0x4b000063, 0, 0, s3c24xx_dma_1_r, s3c24xx_dma_1_w);
	57	memory_install_readwrite32_device_handler( space, device, 0x4b000080, 0x4b0000a3, 0, 0, s3c24xx_dma_2_r, s3c24xx_dma_2_w);
	58	memory_install_readwrite32_device_handler( space, device, 0x4b0000c0, 0x4b0000e3, 0, 0, s3c24xx_dma_3_r, s3c24xx_dma_3_w);
	59	memory_install_readwrite32_device_handler( space, device, 0x4c000000, 0x4c000017, 0, 0, s3c24xx_clkpow_r, s3c24xx_clkpow_w);
	60	memory_install_readwrite32_device_handler( space, device, 0x4d000000, 0x4d000063, 0, 0, s3c24xx_lcd_r, s3c24xx_lcd_w);
	61	memory_install_readwrite32_device_handler( space, device, 0x4d000400, 0x4d0007ff, 0, 0, s3c24xx_lcd_palette_r, s3c24xx_lcd_palette_w);
	62	memory_install_readwrite32_device_handler( space, device, 0x4e000000, 0x4e000017, 0, 0, s3c24xx_nand_r, s3c24xx_nand_w);
	63	memory_install_readwrite32_device_handler( space, device, 0x50000000, 0x5000002b, 0, 0, s3c24xx_uart_0_r, s3c24xx_uart_0_w);
	64	memory_install_readwrite32_device_handler( space, device, 0x50004000, 0x5000402b, 0, 0, s3c24xx_uart_1_r, s3c24xx_uart_1_w);
	65	memory_install_readwrite32_device_handler( space, device, 0x50008000, 0x5000802b, 0, 0, s3c24xx_uart_2_r, s3c24xx_uart_2_w);
	66	memory_install_readwrite32_device_handler( space, device, 0x51000000, 0x51000043, 0, 0, s3c24xx_pwm_r, s3c24xx_pwm_w);
	67	memory_install_readwrite32_device_handler( space, device, 0x52000140, 0x5200026f, 0, 0, s3c24xx_usb_device_r, s3c24xx_usb_device_w);
	68	memory_install_readwrite32_device_handler( space, device, 0x53000000, 0x5300000b, 0, 0, s3c24xx_wdt_r, s3c24xx_wdt_w);
	69	memory_install_readwrite32_device_handler( space, device, 0x54000000, 0x5400000f, 0, 0, s3c24xx_iic_r, s3c24xx_iic_w);
	70	memory_install_readwrite32_device_handler( space, device, 0x55000000, 0x55000013, 0, 0, s3c24xx_iis_r, s3c24xx_iis_w);
	71	memory_install_readwrite32_device_handler( space, device, 0x56000000, 0x560000bf, 0, 0, s3c24xx_gpio_r, s3c24xx_gpio_w);
	72	memory_install_readwrite32_device_handler( space, device, 0x57000040, 0x5700008b, 0, 0, s3c24xx_rtc_r, s3c24xx_rtc_w);
	73	memory_install_readwrite32_device_handler( space, device, 0x58000000, 0x58000013, 0, 0, s3c24xx_adc_r, s3c24xx_adc_w);
	74	memory_install_readwrite32_device_handler( space, device, 0x59000000, 0x59000017, 0, 0, s3c24xx_spi_0_r, s3c24xx_spi_0_w);
	75	memory_install_readwrite32_device_handler( space, device, 0x59000020, 0x59000037, 0, 0, s3c24xx_spi_1_r, s3c24xx_spi_1_w);
	76	memory_install_readwrite32_device_handler( space, device, 0x5a000000, 0x5a000043, 0, 0, s3c24xx_sdi_r, s3c24xx_sdi_w);
	77	}
	78
	79	DEVICE_GET_INFO( s3c2410 )
	80	{
	81	switch ( state )
	82	{
	83	/* --- the following bits of info are returned as pointers to data or functions --- */
	84	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(s3c2410); break;
	85	/* --- the following bits of info are returned as NULL-terminated strings --- */
	86	case DEVINFO_STR_NAME: strcpy(info->s, "Samsung S3C2410"); break;
	87	/* --- default --- */
	88	default: DEVICE_GET_INFO_CALL(s3c24xx); break;
	89	}
	90	}
	91
	92	void s3c2410_uart_fifo_w( running_device *device, int uart, UINT8 data)
	93	{
	94	s3c24xx_uart_fifo_w( device, uart, data);
	95	}
	96
	97	void s3c2410_touch_screen( running_device *device, int state)
	98	{
	99	s3c24xx_touch_screen( device, state);
	100	}
	101
	102	WRITE_LINE_DEVICE_HANDLER( s3c2410_pin_frnb_w )
	103	{
	104	s3c24xx_pin_frnb_w( device, state);
	105	}
	106
	107	void s3c2410_nand_calculate_mecc( UINT8 data, UINT32 size, UINT8 mecc)
	108	{
	109	mecc[0] = mecc[1] = mecc[2] = mecc[3] = 0;
	110	for (int i = 0; i < size; i++) nand_update_mecc( mecc, i, data[i]);
	111	}
	112
	113	DEFINE_LEGACY_DEVICE(S3C2410, s3c2410);

src/emu/machine/s3c2410.h
r0	r9813
	1	/*******************************************************************************
	2
	3	Samsung S3C2410 private data
	4
	5	*******************************************************************************/
	6
	7	#ifndef __S3C2410_H__
	8	#define __S3C2410_H__
	9
	10	#include "devlegcy.h"
	11
	12	/*******************************************************************************
	13	MACROS / CONSTANTS
	14	*******************************************************************************/
	15
	16	#define S3C2410_TAG "s3c2410"
	17
	18	#define MDRV_S3C2410_ADD(_tag, _clock, _config) \
	19	MDRV_DEVICE_ADD(_tag, S3C2410, _clock) \
	20	MDRV_DEVICE_CONFIG(_config)
	21
	22	#define S3C2410_INTERFACE(name) \
	23	const s3c2410_interface(name) =
	24
	25	enum
	26	{
	27	S3C2410_GPIO_PORT_A = 0,
	28	S3C2410_GPIO_PORT_B,
	29	S3C2410_GPIO_PORT_C,
	30	S3C2410_GPIO_PORT_D,
	31	S3C2410_GPIO_PORT_E,
	32	S3C2410_GPIO_PORT_F,
	33	S3C2410_GPIO_PORT_G,
	34	S3C2410_GPIO_PORT_H
	35	};
	36
	37	DECLARE_LEGACY_DEVICE(S3C2410, s3c2410);
	38
	39	READ32_DEVICE_HANDLER( s3c24xx_lcd_r );
	40
	41	/*******************************************************************************
	42	TYPE DEFINITIONS
	43	*******************************************************************************/
	44
	45	typedef UINT32 (s3c24xx_gpio_port_r_func)( running_device device, int port);
	46	typedef void (s3c24xx_gpio_port_w_func)( running_device device, int port, UINT32 data);
	47
	48	typedef struct _s3c2410_interface_gpio s3c2410_interface_gpio;
	49	struct _s3c2410_interface_gpio
	50	{
	51	s3c24xx_gpio_port_r_func port_r;
	52	s3c24xx_gpio_port_w_func port_w;
	53	};
	54
	55	typedef struct _s3c2410_interface_i2c s3c2410_interface_i2c;
	56	struct _s3c2410_interface_i2c
	57	{
	58	write_line_device_func scl_w;
	59	read_line_device_func sda_r;
	60	write_line_device_func sda_w;
	61	};
	62
	63	typedef struct _s3c2410_interface_adc s3c2410_interface_adc;
	64	struct _s3c2410_interface_adc
	65	{
	66	read32_device_func data_r;
	67	};
	68
	69	typedef struct _s3c2410_interface_i2s s3c2410_interface_i2s;
	70	struct _s3c2410_interface_i2s
	71	{
	72	write16_device_func data_w;
	73	};
	74
	75	typedef struct _s3c2410_interface_nand s3c2410_interface_nand;
	76	struct _s3c2410_interface_nand
	77	{
	78	write8_device_func command_w;
	79	write8_device_func address_w;
	80	read8_device_func data_r;
	81	write8_device_func data_w;
	82	};
	83
	84	typedef struct _s3c2410_interface s3c2410_interface;
	85	struct _s3c2410_interface
	86	{
	87	s3c2410_interface_gpio gpio;
	88	s3c2410_interface_i2c i2c;
	89	s3c2410_interface_adc adc;
	90	s3c2410_interface_i2s i2s;
	91	s3c2410_interface_nand nand;
	92	};
	93
	94	/*******************************************************************************
	95	PROTOTYPES
	96	*******************************************************************************/
	97
	98	DEVICE_GET_INFO( s3c2410 );
	99
	100	VIDEO_START( s3c2410 );
	101	VIDEO_UPDATE( s3c2410 );
	102
	103	void s3c2410_uart_fifo_w( running_device *device, int uart, UINT8 data);
	104	void s3c2410_touch_screen( running_device *device, int state);
	105
	106	WRITE_LINE_DEVICE_HANDLER( s3c2410_pin_frnb_w );
	107
	108	void s3c2410_nand_calculate_mecc( UINT8 data, UINT32 size, UINT8 mecc);
	109
	110	/*******************************************************************************
	111	MACROS & CONSTANTS
	112	*******************************************************************************/
	113
	114	/* Memory Controller */
	115
	116	#define S3C24XX_BASE_MEMCON 0x48000000
	117
	118	/* USB Host Controller */
	119
	120	#define S3C24XX_BASE_USBHOST 0x49000000
	121
	122	/* Interrupt Controller */
	123
	124	#define S3C24XX_BASE_INT 0x4A000000
	125
	126	#define S3C24XX_SRCPND (0x00 / 4) // Interrupt Request Status
	127	#define S3C24XX_INTMOD (0x04 / 4) // Interrupt Mode Control
	128	#define S3C24XX_INTMSK (0x08 / 4) // Interrupt Mask Control
	129	#define S3C24XX_PRIORITY (0x0C / 4) // IRQ Priority Control
	130	#define S3C24XX_INTPND (0x10 / 4) // Interrupt Request Status
	131	#define S3C24XX_INTOFFSET (0x14 / 4) // Interrupt Request Source Offset
	132	#define S3C24XX_SUBSRCPND (0x18 / 4) // Sub Source Pending
	133	#define S3C24XX_INTSUBMSK (0x1C / 4) // Interrupt Sub Mask
	134
	135	/* DMA */
	136
	137	#define S3C24XX_BASE_DMA_0 0x4B000000
	138	#define S3C24XX_BASE_DMA_1 0x4B000040
	139	#define S3C24XX_BASE_DMA_2 0x4B000080
	140	#define S3C24XX_BASE_DMA_3 0x4B0000C0
	141
	142	#define S3C24XX_DISRC (0x00 / 4) // DMA Initial Source
	143	#define S3C24XX_DISRCC (0x04 / 4) // DMA Initial Source Control
	144	#define S3C24XX_DIDST (0x08 / 4) // DMA Initial Destination
	145	#define S3C24XX_DIDSTC (0x0C / 4) // DMA Initial Destination Control
	146	#define S3C24XX_DCON (0x10 / 4) // DMA Control
	147	#define S3C24XX_DSTAT (0x14 / 4) // DMA Count
	148	#define S3C24XX_DCSRC (0x18 / 4) // DMA Current Source
	149	#define S3C24XX_DCDST (0x1C / 4) // DMA Current Destination
	150	#define S3C24XX_DMASKTRIG (0x20 / 4) // DMA Mask Trigger
	151
	152	/* Clock & Power Management */
	153
	154	#define S3C24XX_BASE_CLKPOW 0x4C000000
	155
	156	#define S3C24XX_LOCKTIME (0x00 / 4) // PLL Lock Time Counter
	157	#define S3C24XX_MPLLCON (0x04 / 4) // MPLL Control
	158	#define S3C24XX_UPLLCON (0x08 / 4) // UPLL Control
	159	#define S3C24XX_CLKCON (0x0C / 4) // Clock Generator Control
	160	#define S3C24XX_CLKSLOW (0x10 / 4) // Slow Clock Control
	161	#define S3C24XX_CLKDIVN (0x14 / 4) // Clock Divider Control
	162
	163	/* LCD Controller */
	164
	165	#define S3C24XX_BASE_LCD 0x4D000000
	166	#define S3C24XX_BASE_LCDPAL 0x4D000400
	167
	168	#define S3C24XX_LCDCON1 (0x00 / 4) // LCD Control 1
	169	#define S3C24XX_LCDCON2 (0x04 / 4) // LCD Control 2
	170	#define S3C24XX_LCDCON3 (0x08 / 4) // LCD Control 3
	171	#define S3C24XX_LCDCON4 (0x0C / 4) // LCD Control 4
	172	#define S3C24XX_LCDCON5 (0x10 / 4) // LCD Control 5
	173	#define S3C24XX_LCDSADDR1 (0x14 / 4) // STN/TFT: Frame Buffer Start Address 1
	174	#define S3C24XX_LCDSADDR2 (0x18 / 4) // STN/TFT: Frame Buffer Start Address 2
	175	#define S3C24XX_LCDSADDR3 (0x1C / 4) // STN/TFT: Virtual Screen Address Set
	176	#define S3C24XX_REDLUT (0x20 / 4) // STN: Red Lookup Table
	177	#define S3C24XX_GREENLUT (0x24 / 4) // STN: Green Lookup Table
	178	#define S3C24XX_BLUELUT (0x28 / 4) // STN: Blue Lookup Table
	179	#define S3C24XX_DITHMODE (0x4C / 4) // STN: Dithering Mode
	180	#define S3C24XX_TPAL (0x50 / 4) // TFT: Temporary Palette
	181	#define S3C24XX_LCDINTPND (0x54 / 4) // LCD Interrupt Pending
	182	#define S3C24XX_LCDSRCPND (0x58 / 4) // LCD Interrupt Source
	183	#define S3C24XX_LCDINTMSK (0x5C / 4) // LCD Interrupt Mask
	184	#define S3C24XX_LPCSEL (0x60 / 4) // LPC3600 Control
	185
	186	/* NAND Flash */
	187
	188	#define S3C24XX_BASE_NAND 0x4E000000
	189
	190	#define S3C24XX_NFCONF (0x00 / 4) // NAND Flash Configuration
	191	#define S3C24XX_NFCMD (0x04 / 4) // NAND Flash Command
	192	#define S3C24XX_NFADDR (0x08 / 4) // NAND Flash Address
	193	#define S3C24XX_NFDATA (0x0C / 4) // NAND Flash Data
	194	#define S3C24XX_NFSTAT (0x10 / 4) // NAND Flash Operation Status
	195	#define S3C24XX_NFECC (0x14 / 4) // NAND Flash ECC
	196
	197	/* UART */
	198
	199	#define S3C24XX_BASE_UART_0 0x50000000
	200	#define S3C24XX_BASE_UART_1 0x50004000
	201	#define S3C24XX_BASE_UART_2 0x50008000
	202
	203	#define S3C24XX_ULCON (0x00 / 4) // UART Line Control
	204	#define S3C24XX_UCON (0x04 / 4) // UART Control
	205	#define S3C24XX_UFCON (0x08 / 4) // UART FIFO Control
	206	#define S3C24XX_UMCON (0x0C / 4) // UART Modem Control
	207	#define S3C24XX_UTRSTAT (0x10 / 4) // UART Tx/Rx Status
	208	#define S3C24XX_UERSTAT (0x14 / 4) // UART Rx Error Status
	209	#define S3C24XX_UFSTAT (0x18 / 4) // UART FIFO Status
	210	#define S3C24XX_UMSTAT (0x1C / 4) // UART Modem Status
	211	#define S3C24XX_UTXH (0x20 / 4) // UART Transmission Hold
	212	#define S3C24XX_URXH (0x24 / 4) // UART Receive Buffer
	213	#define S3C24XX_UBRDIV (0x28 / 4) // UART Baud Rate Divisor
	214
	215	/* PWM Timer */
	216
	217	#define S3C24XX_BASE_PWM 0x51000000
	218
	219	#define S3C24XX_TCFG0 (0x00 / 4) // Timer Configuration
	220	#define S3C24XX_TCFG1 (0x04 / 4) // Timer Configuration
	221	#define S3C24XX_TCON (0x08 / 4) // Timer Control
	222	#define S3C24XX_TCNTB0 (0x0C / 4) // Timer Count Buffer 0
	223	#define S3C24XX_TCMPB0 (0x10 / 4) // Timer Compare Buffer 0
	224	#define S3C24XX_TCNTO0 (0x14 / 4) // Timer Count Observation 0
	225	#define S3C24XX_TCNTB1 (0x18 / 4) // Timer Count Buffer 1
	226	#define S3C24XX_TCMPB1 (0x1C / 4) // Timer Compare Buffer 1
	227	#define S3C24XX_TCNTO1 (0x20 / 4) // Timer Count Observation 1
	228	#define S3C24XX_TCNTB2 (0x24 / 4) // Timer Count Buffer 2
	229	#define S3C24XX_TCMPB2 (0x28 / 4) // Timer Compare Buffer 2
	230	#define S3C24XX_TCNTO2 (0x2C / 4) // Timer Count Observation 2
	231	#define S3C24XX_TCNTB3 (0x30 / 4) // Timer Count Buffer 3
	232	#define S3C24XX_TCMPB3 (0x34 / 4) // Timer Compare Buffer 3
	233	#define S3C24XX_TCNTO3 (0x38 / 4) // Timer Count Observation 3
	234	#define S3C24XX_TCNTB4 (0x3C / 4) // Timer Count Buffer 4
	235	#define S3C24XX_TCNTO4 (0x40 / 4) // Timer Count Observation 4
	236
	237	/* USB Device */
	238
	239	#define S3C24XX_BASE_USBDEV 0x52000140
	240
	241	/* Watchdog Timer */
	242
	243	#define S3C24XX_BASE_WDT 0x53000000
	244
	245	#define S3C24XX_WTCON (0x00 / 4) // Watchdog Timer Mode
	246	#define S3C24XX_WTDAT (0x04 / 4) // Watchdog Timer Data
	247	#define S3C24XX_WTCNT (0x08 / 4) // Watchdog Timer Count
	248
	249	/* IIC */
	250
	251	#define S3C24XX_BASE_IIC 0x54000000
	252
	253	#define S3C24XX_IICCON (0x00 / 4) // IIC Control
	254	#define S3C24XX_IICSTAT (0x04 / 4) // IIC Status
	255	#define S3C24XX_IICADD (0x08 / 4) // IIC Address
	256	#define S3C24XX_IICDS (0x0C / 4) // IIC Data Shift
	257
	258	/* IIS */
	259
	260	#define S3C24XX_BASE_IIS 0x55000000
	261
	262	#define S3C24XX_IISCON (0x00 / 4) // IIS Control
	263	#define S3C24XX_IISMOD (0x04 / 4) // IIS Mode
	264	#define S3C24XX_IISPSR (0x08 / 4) // IIS Prescaler
	265	#define S3C24XX_IISFCON (0x0C / 4) // IIS FIFO Control
	266	#define S3C24XX_IISFIFO (0x10 / 4) // IIS FIFO Entry
	267
	268	/* I/O Port */
	269
	270	#define S3C24XX_BASE_GPIO 0x56000000
	271
	272	#define S3C24XX_GPACON (0x00 / 4) // Port A Control
	273	#define S3C24XX_GPADAT (0x04 / 4) // Port A Data
	274	#define S3C24XX_GPBCON (0x10 / 4) // Port B Control
	275	#define S3C24XX_GPBDAT (0x14 / 4) // Port B Data
	276	#define S3C24XX_GPBUP (0x18 / 4) // Pull-up Control B
	277	#define S3C24XX_GPCCON (0x20 / 4) // Port C Control
	278	#define S3C24XX_GPCDAT (0x24 / 4) // Port C Data
	279	#define S3C24XX_GPCUP (0x28 / 4) // Pull-up Control C
	280	#define S3C24XX_GPDCON (0x30 / 4) // Port D Control
	281	#define S3C24XX_GPDDAT (0x34 / 4) // Port D Data
	282	#define S3C24XX_GPDUP (0x38 / 4) // Pull-up Control D
	283	#define S3C24XX_GPECON (0x40 / 4) // Port E Control
	284	#define S3C24XX_GPEDAT (0x44 / 4) // Port E Data
	285	#define S3C24XX_GPEUP (0x48 / 4) // Pull-up Control E
	286	#define S3C24XX_GPFCON (0x50 / 4) // Port F Control
	287	#define S3C24XX_GPFDAT (0x54 / 4) // Port F Data
	288	#define S3C24XX_GPFUP (0x58 / 4) // Pull-up Control F
	289	#define S3C24XX_GPGCON (0x60 / 4) // Port G Control
	290	#define S3C24XX_GPGDAT (0x64 / 4) // Port G Data
	291	#define S3C24XX_GPGUP (0x68 / 4) // Pull-up Control G
	292	#define S3C24XX_GPHCON (0x70 / 4) // Port H Control
	293	#define S3C24XX_GPHDAT (0x74 / 4) // Port H Data
	294	#define S3C24XX_GPHUP (0x78 / 4) // Pull-up Control H
	295	#define S3C24XX_MISCCR (0x80 / 4) // Miscellaneous Control
	296	#define S3C24XX_DCLKCON (0x84 / 4) // DCLK0/1 Control
	297	#define S3C24XX_EXTINT0 (0x88 / 4) // External Interrupt Control Register 0
	298	#define S3C24XX_EXTINT1 (0x8C / 4) // External Interrupt Control Register 1
	299	#define S3C24XX_EXTINT2 (0x90 / 4) // External Interrupt Control Register 2
	300	#define S3C24XX_EINTFLT0 (0x94 / 4) // Reserved
	301	#define S3C24XX_EINTFLT1 (0x98 / 4) // Reserved
	302	#define S3C24XX_EINTFLT2 (0x9C / 4) // External Interrupt Filter Control Register 2
	303	#define S3C24XX_EINTFLT3 (0xA0 / 4) // External Interrupt Filter Control Register 3
	304	#define S3C24XX_EINTMASK (0xA4 / 4) // External Interrupt Mask
	305	#define S3C24XX_EINTPEND (0xA8 / 4) // External Interrupt Pending
	306	#define S3C24XX_GSTATUS0 (0xAC / 4) // External Pin Status
	307	#define S3C24XX_GSTATUS1 (0xB0 / 4) // Chip ID
	308	#define S3C24XX_GSTATUS2 (0xB4 / 4) // Reset Status
	309	#define S3C24XX_GSTATUS3 (0xB8 / 4) // Inform Register
	310	#define S3C24XX_GSTATUS4 (0xBC / 4) // Inform Register
	311
	312	#define S3C24XX_GPADAT_MASK 0x007FFFFF
	313	#define S3C24XX_GPBDAT_MASK 0x000007FF
	314	#define S3C24XX_GPCDAT_MASK 0x0000FFFF
	315	#define S3C24XX_GPDDAT_MASK 0x0000FFFF
	316	#define S3C24XX_GPEDAT_MASK 0x0000FFFF
	317	#define S3C24XX_GPFDAT_MASK 0x000000FF
	318	#define S3C24XX_GPGDAT_MASK 0x0000FFFF
	319	#define S3C24XX_GPHDAT_MASK 0x000007FF
	320
	321	/* RTC */
	322
	323	#define S3C24XX_BASE_RTC 0x57000040
	324
	325	#define S3C24XX_RTCCON (0x00 / 4) // RTC Control
	326	#define S3C24XX_TICNT (0x04 / 4) // Tick Time count
	327	#define S3C24XX_RTCALM (0x10 / 4) // RTC Alarm Control
	328	#define S3C24XX_ALMSEC (0x14 / 4) // Alarm Second
	329	#define S3C24XX_ALMMIN (0x18 / 4) // Alarm Minute
	330	#define S3C24XX_ALMHOUR (0x1C / 4) // Alarm Hour
	331	#define S3C24XX_ALMDAY (0x20 / 4) // Alarm Day
	332	#define S3C24XX_ALMMON (0x24 / 4) // Alarm Month
	333	#define S3C24XX_ALMYEAR (0x28 / 4) // Alarm Year
	334	#define S3C24XX_RTCRST (0x2C / 4) // RTC Round Reset
	335	#define S3C24XX_BCDSEC (0x30 / 4) // BCD Second
	336	#define S3C24XX_BCDMIN (0x34 / 4) // BCD Minute
	337	#define S3C24XX_BCDHOUR (0x38 / 4) // BCD Hour
	338	#define S3C24XX_BCDDAY (0x3C / 4) // BCD Day
	339	#define S3C24XX_BCDDOW (0x40 / 4) // BCD Day of Week
	340	#define S3C24XX_BCDMON (0x44 / 4) // BCD Month
	341	#define S3C24XX_BCDYEAR (0x48 / 4) // BCD Year
	342
	343	/* A/D Converter */
	344
	345	#define S3C24XX_BASE_ADC 0x58000000
	346
	347	#define S3C24XX_ADCCON (0x00 / 4) // ADC Control
	348	#define S3C24XX_ADCTSC (0x04 / 4) // ADC Touch Screen Control
	349	#define S3C24XX_ADCDLY (0x08 / 4) // ADC Start or Interval Delay
	350	#define S3C24XX_ADCDAT0 (0x0C / 4) // ADC Conversion Data
	351	#define S3C24XX_ADCDAT1 (0x10 / 4) // ADC Conversion Data
	352
	353	/* SPI */
	354
	355	#define S3C24XX_BASE_SPI_0 0x59000000
	356	#define S3C24XX_BASE_SPI_1 0x59000020
	357
	358	#define S3C24XX_SPCON (0x00 / 4) // SPI Control
	359	#define S3C24XX_SPSTA (0x04 / 4) // SPI Status
	360	#define S3C24XX_SPPIN (0x08 / 4) // SPI Pin Control
	361	#define S3C24XX_SPPRE (0x0C / 4) // SPI Baud Rate Prescaler
	362	#define S3C24XX_SPTDAT (0x10 / 4) // SPI Tx Data
	363	#define S3C24XX_SPRDAT (0x14 / 4) // SPI Rx Data
	364
	365	/* SD Interface */
	366
	367	#define S3C24XX_BASE_SDI 0x5A000000
	368
	369	/* ... */
	370
	371	#define S3C24XX_INT_ADC 31
	372	#define S3C24XX_INT_RTC 30
	373	#define S3C24XX_INT_SPI1 29
	374	#define S3C24XX_INT_UART0 28
	375	#define S3C24XX_INT_IIC 27
	376	#define S3C24XX_INT_USBH 26
	377	#define S3C24XX_INT_USBD 25
	378	#define S3C24XX_INT_24 24
	379	#define S3C24XX_INT_UART1 23
	380	#define S3C24XX_INT_SPI0 22
	381	#define S3C24XX_INT_SDI 21
	382	#define S3C24XX_INT_DMA3 20
	383	#define S3C24XX_INT_DMA2 19
	384	#define S3C24XX_INT_DMA1 18
	385	#define S3C24XX_INT_DMA0 17
	386	#define S3C24XX_INT_LCD 16
	387	#define S3C24XX_INT_UART2 15
	388	#define S3C24XX_INT_TIMER4 14
	389	#define S3C24XX_INT_TIMER3 13
	390	#define S3C24XX_INT_TIMER2 12
	391	#define S3C24XX_INT_TIMER1 11
	392	#define S3C24XX_INT_TIMER0 10
	393	#define S3C24XX_INT_WDT 9
	394	#define S3C24XX_INT_TICK 8
	395	#define S3C24XX_INT_BATT_FLT 7
	396	#define S3C24XX_INT_6 6
	397	#define S3C24XX_INT_EINT8_23 5
	398	#define S3C24XX_INT_EINT4_7 4
	399	#define S3C24XX_INT_EINT3 3
	400	#define S3C24XX_INT_EINT2 2
	401	#define S3C24XX_INT_EINT1 1
	402	#define S3C24XX_INT_EINT0 0
	403
	404	#define S3C24XX_SUBINT_ADC 10
	405	#define S3C24XX_SUBINT_TC 9
	406	#define S3C24XX_SUBINT_ERR2 8
	407	#define S3C24XX_SUBINT_TXD2 7
	408	#define S3C24XX_SUBINT_RXD2 6
	409	#define S3C24XX_SUBINT_ERR1 5
	410	#define S3C24XX_SUBINT_TXD1 4
	411	#define S3C24XX_SUBINT_RXD1 3
	412	#define S3C24XX_SUBINT_ERR0 2
	413	#define S3C24XX_SUBINT_TXD0 1
	414	#define S3C24XX_SUBINT_RXD0 0
	415
	416	static const UINT32 MAP_SUBINT_TO_INT[11] =
	417	{
	418	S3C24XX_INT_UART0, S3C24XX_INT_UART0, S3C24XX_INT_UART0,
	419	S3C24XX_INT_UART1, S3C24XX_INT_UART1, S3C24XX_INT_UART1,
	420	S3C24XX_INT_UART2, S3C24XX_INT_UART2, S3C24XX_INT_UART2,
	421	S3C24XX_INT_ADC, S3C24XX_INT_ADC
	422	};
	423
	424	#define S3C24XX_BPPMODE_STN_01 0x00
	425	#define S3C24XX_BPPMODE_STN_02 0x01
	426	#define S3C24XX_BPPMODE_STN_04 0x02
	427	#define S3C24XX_BPPMODE_STN_08 0x03
	428	#define S3C24XX_BPPMODE_STN_12_P 0x04
	429	#define S3C24XX_BPPMODE_STN_12_U 0x05
	430	#define S3C24XX_BPPMODE_STN_16 0x06
	431	#define S3C24XX_BPPMODE_TFT_01 0x08
	432	#define S3C24XX_BPPMODE_TFT_02 0x09
	433	#define S3C24XX_BPPMODE_TFT_04 0x0A
	434	#define S3C24XX_BPPMODE_TFT_08 0x0B
	435	#define S3C24XX_BPPMODE_TFT_16 0x0C
	436	#define S3C24XX_BPPMODE_TFT_24 0x0D
	437
	438	#define S3C24XX_PNRMODE_STN_04_DS 0
	439	#define S3C24XX_PNRMODE_STN_04_SS 1
	440	#define S3C24XX_PNRMODE_STN_08_SS 2
	441	#define S3C24XX_PNRMODE_TFT 3
	442
	443	#define S3C24XX_GPIO_PORT_A S3C2410_GPIO_PORT_A
	444	#define S3C24XX_GPIO_PORT_B S3C2410_GPIO_PORT_B
	445	#define S3C24XX_GPIO_PORT_C S3C2410_GPIO_PORT_C
	446	#define S3C24XX_GPIO_PORT_D S3C2410_GPIO_PORT_D
	447	#define S3C24XX_GPIO_PORT_E S3C2410_GPIO_PORT_E
	448	#define S3C24XX_GPIO_PORT_F S3C2410_GPIO_PORT_F
	449	#define S3C24XX_GPIO_PORT_G S3C2410_GPIO_PORT_G
	450	#define S3C24XX_GPIO_PORT_H S3C2410_GPIO_PORT_H
	451
	452	/*******************************************************************************
	453	TYPE DEFINITIONS
	454	*******************************************************************************/
	455
	456	typedef struct
	457	{
	458	UINT32 data[0x34/4];
	459	} s3c24xx_memcon_regs_t;
	460
	461	typedef struct
	462	{
	463	UINT32 data[0x5C/4];
	464	} s3c24xx_usbhost_regs_t;
	465
	466	typedef struct
	467	{
	468	UINT32 srcpnd;
	469	UINT32 intmod;
	470	UINT32 intmsk;
	471	UINT32 priority;
	472	UINT32 intpnd;
	473	UINT32 intoffset;
	474	UINT32 subsrcpnd;
	475	UINT32 intsubmsk;
	476	} s3c24xx_irq_regs_t;
	477
	478	typedef struct
	479	{
	480	UINT32 disrc;
	481	UINT32 disrcc;
	482	UINT32 didst;
	483	UINT32 didstc;
	484	UINT32 dcon;
	485	UINT32 dstat;
	486	UINT32 dcsrc;
	487	UINT32 dcdst;
	488	UINT32 dmasktrig;
	489	} s3c24xx_dma_regs_t;
	490
	491	typedef struct
	492	{
	493	UINT32 locktime;
	494	UINT32 mpllcon;
	495	UINT32 upllcon;
	496	UINT32 clkcon;
	497	UINT32 clkslow;
	498	UINT32 clkdivn;
	499	} s3c24xx_clkpow_regs_t;
	500
	501	typedef struct
	502	{
	503	UINT32 lcdcon1;
	504	UINT32 lcdcon2;
	505	UINT32 lcdcon3;
	506	UINT32 lcdcon4;
	507	UINT32 lcdcon5;
	508	UINT32 lcdsaddr1;
	509	UINT32 lcdsaddr2;
	510	UINT32 lcdsaddr3;
	511	UINT32 redlut;
	512	UINT32 greenlut;
	513	UINT32 bluelut;
	514	UINT32 reserved[8];
	515	UINT32 dithmode;
	516	UINT32 tpal;
	517	UINT32 lcdintpnd;
	518	UINT32 lcdsrcpnd;
	519	UINT32 lcdintmsk;
	520	UINT32 lpcsel;
	521	} s3c24xx_lcd_regs_t;
	522
	523	typedef struct
	524	{
	525	UINT32 data[0x400/4];
	526	} s3c24xx_lcdpal_regs_t;
	527
	528	typedef struct
	529	{
	530	UINT32 nfconf;
	531	UINT32 nfcmd;
	532	UINT32 nfaddr;
	533	UINT32 nfdata;
	534	UINT32 nfstat;
	535	UINT32 nfecc;
	536	} s3c24xx_nand_regs_t;
	537
	538	typedef struct
	539	{
	540	UINT32 ulcon;
	541	UINT32 ucon;
	542	UINT32 ufcon;
	543	UINT32 umcon;
	544	UINT32 utrstat;
	545	UINT32 uerstat;
	546	UINT32 ufstat;
	547	UINT32 umstat;
	548	UINT32 utxh;
	549	UINT32 urxh;
	550	UINT32 ubrdiv;
	551	} s3c24xx_uart_regs_t;
	552
	553	typedef struct
	554	{
	555	UINT32 tcfg0;
	556	UINT32 tcfg1;
	557	UINT32 tcon;
	558	UINT32 tcntb0;
	559	UINT32 tcmpb0;
	560	UINT32 tcnto0;
	561	UINT32 tcntb1;
	562	UINT32 tcmpb1;
	563	UINT32 tcnto1;
	564	UINT32 tcntb2;
	565	UINT32 tcmpb2;
	566	UINT32 tcnto2;
	567	UINT32 tcntb3;
	568	UINT32 tcmpb3;
	569	UINT32 tcnto3;
	570	UINT32 tcntb4;
	571	UINT32 tcnto4;
	572	} s3c24xx_pwm_regs_t;
	573
	574	typedef struct
	575	{
	576	UINT32 data[0x130/4];
	577	} s3c24xx_usbdev_regs_t;
	578
	579	typedef struct
	580	{
	581	UINT32 wtcon;
	582	UINT32 wtdat;
	583	UINT32 wtcnt;
	584	} s3c24xx_wdt_regs_t;
	585
	586	typedef struct
	587	{
	588	UINT32 iiccon;
	589	UINT32 iicstat;
	590	UINT32 iicadd;
	591	UINT32 iicds;
	592	} s3c24xx_iic_regs_t;
	593
	594	typedef struct
	595	{
	596	UINT32 iiscon;
	597	UINT32 iismod;
	598	UINT32 iispsr;
	599	UINT32 iisfcon;
	600	UINT32 iisfifo;
	601	} s3c24xx_iis_regs_t;
	602
	603	typedef struct
	604	{
	605	UINT32 gpacon;
	606	UINT32 gpadat;
	607	UINT32 pad_08;
	608	UINT32 pad_0c;
	609	UINT32 gpbbon;
	610	UINT32 gpbdat;
	611	UINT32 gpbup;
	612	UINT32 pad_1c;
	613	UINT32 gpccon;
	614	UINT32 gpcdat;
	615	UINT32 gpcup;
	616	UINT32 pad_2c;
	617	UINT32 gpdcon;
	618	UINT32 gpddat;
	619	UINT32 gpdup;
	620	UINT32 pad_3c;
	621	UINT32 gpecon;
	622	UINT32 gpedat;
	623	UINT32 gpeup;
	624	UINT32 pad_4c;
	625	UINT32 gpfcon;
	626	UINT32 gpfdat;
	627	UINT32 gpfup;
	628	UINT32 pad_5c;
	629	UINT32 gpgcon;
	630	UINT32 gpgdat;
	631	UINT32 gpgup;
	632	UINT32 pad_6c;
	633	UINT32 gphcon;
	634	UINT32 gphdat;
	635	UINT32 gphup;
	636	UINT32 pad_7c;
	637	UINT32 misccr;
	638	UINT32 dclkcon;
	639	UINT32 extint0;
	640	UINT32 extint1;
	641	UINT32 extint2;
	642	UINT32 eintflt0;
	643	UINT32 eintflt1;
	644	UINT32 eintflt2;
	645	UINT32 eintflt3;
	646	UINT32 eintmask;
	647	UINT32 eintpend;
	648	UINT32 gstatus0;
	649	UINT32 gstatus1;
	650	UINT32 gstatus2;
	651	UINT32 gstatus3;
	652	UINT32 gstatus4;
	653	} s3c24xx_gpio_regs_t;
	654
	655	typedef struct
	656	{
	657	UINT32 rtccon;
	658	UINT32 ticnt;
	659	UINT32 reserved[2];
	660	UINT32 rtcalm;
	661	UINT32 almsec;
	662	UINT32 almmin;
	663	UINT32 almhour;
	664	UINT32 almday;
	665	UINT32 almmon;
	666	UINT32 almyear;
	667	UINT32 rtcrst;
	668	UINT32 bcdsec;
	669	UINT32 bcdmin;
	670	UINT32 bcdhour;
	671	UINT32 bcdday;
	672	UINT32 bcddow;
	673	UINT32 bcdmon;
	674	UINT32 bcdyear;
	675	} s3c24xx_rtc_regs_t;
	676
	677	typedef struct
	678	{
	679	UINT32 adccon;
	680	UINT32 adctsc;
	681	UINT32 adcdly;
	682	UINT32 adcdat0;
	683	UINT32 adcdat1;
	684	} s3c24xx_adc_regs_t;
	685
	686	typedef struct
	687	{
	688	UINT32 spcon;
	689	UINT32 spsta;
	690	UINT32 sppin;
	691	UINT32 sppre;
	692	UINT32 sptdat;
	693	UINT32 sprdat;
	694	} s3c24xx_spi_regs_t;
	695
	696	typedef struct
	697	{
	698	UINT32 data[0x44/4];
	699	} s3c24xx_sdi_regs_t;
	700
	701	typedef struct
	702	{
	703	s3c24xx_memcon_regs_t regs;
	704	} s3c24xx_memcon_t;
	705
	706	typedef struct
	707	{
	708	s3c24xx_usbhost_regs_t regs;
	709	} s3c24xx_usbhost_t;
	710
	711	typedef struct
	712	{
	713	s3c24xx_irq_regs_t regs;
	714	} s3c24xx_irq_t;
	715
	716	typedef struct
	717	{
	718	s3c24xx_dma_regs_t regs;
	719	emu_timer *timer;
	720	} s3c24xx_dma_t;
	721
	722	typedef struct
	723	{
	724	s3c24xx_clkpow_regs_t regs;
	725	} s3c24xx_clkpow_t;
	726
	727	typedef struct
	728	{
	729	s3c24xx_lcd_regs_t regs;
	730	emu_timer *timer;
	731	bitmap_t *bitmap[2];
	732	UINT32 vramaddr_cur;
	733	UINT32 vramaddr_max;
	734	UINT32 offsize;
	735	UINT32 pagewidth_cur;
	736	UINT32 pagewidth_max;
	737	UINT32 bppmode;
	738	UINT32 bswp, hwswp;
	739	int vpos, hpos;
	740	double framerate;
	741	UINT32 tpal;
	742	UINT32 hpos_min, hpos_max, vpos_min, vpos_max;
	743	UINT32 dma_data, dma_bits;
	744	} s3c24xx_lcd_t;
	745
	746	typedef struct
	747	{
	748	s3c24xx_lcdpal_regs_t regs;
	749	} s3c24xx_lcdpal_t;
	750
	751	typedef struct
	752	{
	753	s3c24xx_nand_regs_t regs;
	754	UINT8 mecc[3];
	755	int pos;
	756	} s3c24xx_nand_t;
	757
	758	typedef struct
	759	{
	760	s3c24xx_uart_regs_t regs;
	761	} s3c24xx_uart_t;
	762
	763	typedef struct
	764	{
	765	s3c24xx_pwm_regs_t regs;
	766	emu_timer *timer[5];
	767	UINT32 cnt[5];
	768	UINT32 cmp[5];
	769	UINT32 freq[5];
	770	} s3c24xx_pwm_t;
	771
	772	typedef struct
	773	{
	774	s3c24xx_usbdev_regs_t regs;
	775	} s3c24xx_usbdev_t;
	776
	777	typedef struct
	778	{
	779	s3c24xx_wdt_regs_t regs;
	780	emu_timer *timer;
	781	} s3c24xx_wdt_t;
	782
	783	typedef struct
	784	{
	785	s3c24xx_iic_regs_t regs;
	786	emu_timer *timer;
	787	int count;
	788	} s3c24xx_iic_t;
	789
	790	typedef struct
	791	{
	792	s3c24xx_iis_regs_t regs;
	793	emu_timer *timer;
	794	UINT16 fifo[16/2];
	795	int fifo_index;
	796	} s3c24xx_iis_t;
	797
	798	typedef struct
	799	{
	800	s3c24xx_gpio_regs_t regs;
	801	} s3c24xx_gpio_t;
	802
	803	typedef struct
	804	{
	805	s3c24xx_rtc_regs_t regs;
	806	emu_timer *timer_tick_count;
	807	emu_timer *timer_update;
	808	} s3c24xx_rtc_t;
	809
	810	typedef struct
	811	{
	812	s3c24xx_adc_regs_t regs;
	813	} s3c24xx_adc_t;
	814
	815	typedef struct
	816	{
	817	s3c24xx_spi_regs_t regs;
	818	} s3c24xx_spi_t;
	819
	820	typedef struct
	821	{
	822	s3c24xx_sdi_regs_t regs;
	823	} s3c24xx_sdi_t;
	824
	825	typedef struct
	826	{
	827	const s3c2410_interface *iface;
	828	s3c24xx_memcon_t memcon;
	829	s3c24xx_usbhost_t usbhost;
	830	s3c24xx_irq_t irq;
	831	s3c24xx_dma_t dma[4];
	832	s3c24xx_clkpow_t clkpow;
	833	s3c24xx_lcd_t lcd;
	834	s3c24xx_lcdpal_t lcdpal;
	835	s3c24xx_nand_t nand;
	836	s3c24xx_uart_t uart[3];
	837	s3c24xx_pwm_t pwm;
	838	s3c24xx_usbdev_t usbdev;
	839	s3c24xx_wdt_t wdt;
	840	s3c24xx_iic_t iic;
	841	s3c24xx_iis_t iis;
	842	s3c24xx_gpio_t gpio;
	843	s3c24xx_rtc_t rtc;
	844	s3c24xx_adc_t adc;
	845	s3c24xx_spi_t spi[2];
	846	s3c24xx_sdi_t sdi;
	847	} s3c24xx_t;
	848
	849	#endif

src/emu/machine/s3c2440.c
r0	r9813
	1	/*******************************************************************************
	2
	3	Samsung S3C2440
	4
	5	(c) 2010 Tim Schuerewegen
	6
	7	*******************************************************************************/
	8
	9	#include "emu.h"
	10	#include "cpu/arm7/arm7.h"
	11	#include "cpu/arm7/arm7core.h"
	12	#include "s3c2440.h"
	13	#include "sound/dac.h"
	14
	15	#define VERBOSE_LEVEL ( 0 )
	16
	17	INLINE void ATTR_PRINTF(3,4) verboselog( running_machine machine, int n_level, const char s_fmt, ...)
	18	{
	19	if (VERBOSE_LEVEL >= n_level)
	20	{
	21	va_list v;
	22	char buf[32768];
	23	va_start( v, s_fmt);
	24	vsprintf( buf, s_fmt, v);
	25	va_end( v);
	26	logerror( "%s: %s", cpuexec_describe_context( machine), buf);
	27	}
	28	}
	29
	30	#include "machine/s3c2440.h"
	31
	32	#define DEVICE_S3C2440
	33	#include "machine/s3c24xx.c"
	34	#undef DEVICE_S3C2440
	35
	36	VIDEO_START( s3c2440 )
	37	{
	38	running_device *device = machine->device( S3C2440_TAG);
	39	s3c24xx_video_start( device, machine);
	40	}
	41
	42	VIDEO_UPDATE( s3c2440 )
	43	{
	44	running_device *device = screen->machine->device( S3C2440_TAG);
	45	return s3c24xx_video_update( device, screen, bitmap, cliprect);
	46	}
	47
	48	DEVICE_START( s3c2440 )
	49	{
	50	const address_space *space = cputag_get_address_space( device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	51	memory_install_readwrite32_device_handler( space, device, 0x48000000, 0x4800003b, 0, 0, s3c24xx_memcon_r, s3c24xx_memcon_w);
	52	memory_install_readwrite32_device_handler( space, device, 0x49000000, 0x4900005b, 0, 0, s3c24xx_usb_host_r, s3c24xx_usb_host_w);
	53	memory_install_readwrite32_device_handler( space, device, 0x4a000000, 0x4a00001f, 0, 0, s3c24xx_irq_r, s3c24xx_irq_w);
	54	memory_install_readwrite32_device_handler( space, device, 0x4b000000, 0x4b000023, 0, 0, s3c24xx_dma_0_r, s3c24xx_dma_0_w);
	55	memory_install_readwrite32_device_handler( space, device, 0x4b000040, 0x4b000063, 0, 0, s3c24xx_dma_1_r, s3c24xx_dma_1_w);
	56	memory_install_readwrite32_device_handler( space, device, 0x4b000080, 0x4b0000a3, 0, 0, s3c24xx_dma_2_r, s3c24xx_dma_2_w);
	57	memory_install_readwrite32_device_handler( space, device, 0x4b0000c0, 0x4b0000e3, 0, 0, s3c24xx_dma_3_r, s3c24xx_dma_3_w);
	58	memory_install_readwrite32_device_handler( space, device, 0x4c000000, 0x4c00001b, 0, 0, s3c24xx_clkpow_r, s3c24xx_clkpow_w);
	59	memory_install_readwrite32_device_handler( space, device, 0x4d000000, 0x4d000063, 0, 0, s3c24xx_lcd_r, s3c24xx_lcd_w);
	60	memory_install_readwrite32_device_handler( space, device, 0x4d000400, 0x4d0007ff, 0, 0, s3c24xx_lcd_palette_r, s3c24xx_lcd_palette_w);
	61	memory_install_readwrite32_device_handler( space, device, 0x4e000000, 0x4e00003f, 0, 0, s3c24xx_nand_r, s3c24xx_nand_w);
	62	memory_install_readwrite32_device_handler( space, device, 0x4f000000, 0x4f0000a3, 0, 0, s3c24xx_cam_r, s3c24xx_cam_w);
	63	memory_install_readwrite32_device_handler( space, device, 0x50000000, 0x5000002b, 0, 0, s3c24xx_uart_0_r, s3c24xx_uart_0_w);
	64	memory_install_readwrite32_device_handler( space, device, 0x50004000, 0x5000402b, 0, 0, s3c24xx_uart_1_r, s3c24xx_uart_1_w);
	65	memory_install_readwrite32_device_handler( space, device, 0x50008000, 0x5000802b, 0, 0, s3c24xx_uart_2_r, s3c24xx_uart_2_w);
	66	memory_install_readwrite32_device_handler( space, device, 0x51000000, 0x51000043, 0, 0, s3c24xx_pwm_r, s3c24xx_pwm_w);
	67	memory_install_readwrite32_device_handler( space, device, 0x52000140, 0x5200026f, 0, 0, s3c24xx_usb_device_r, s3c24xx_usb_device_w);
	68	memory_install_readwrite32_device_handler( space, device, 0x53000000, 0x5300000b, 0, 0, s3c24xx_wdt_r, s3c24xx_wdt_w);
	69	memory_install_readwrite32_device_handler( space, device, 0x54000000, 0x54000013, 0, 0, s3c24xx_iic_r, s3c24xx_iic_w);
	70	memory_install_readwrite32_device_handler( space, device, 0x55000000, 0x55000013, 0, 0, s3c24xx_iis_r, s3c24xx_iis_w);
	71	memory_install_readwrite32_device_handler( space, device, 0x56000000, 0x560000df, 0, 0, s3c24xx_gpio_r, s3c24xx_gpio_w);
	72	memory_install_readwrite32_device_handler( space, device, 0x57000040, 0x5700008b, 0, 0, s3c24xx_rtc_r, s3c24xx_rtc_w);
	73	memory_install_readwrite32_device_handler( space, device, 0x58000000, 0x58000017, 0, 0, s3c24xx_adc_r, s3c24xx_adc_w);
	74	memory_install_readwrite32_device_handler( space, device, 0x59000000, 0x59000017, 0, 0, s3c24xx_spi_0_r, s3c24xx_spi_0_w);
	75	memory_install_readwrite32_device_handler( space, device, 0x59000020, 0x59000037, 0, 0, s3c24xx_spi_1_r, s3c24xx_spi_1_w);
	76	memory_install_readwrite32_device_handler( space, device, 0x5a000000, 0x5a000043, 0, 0, s3c24xx_sdi_r, s3c24xx_sdi_w);
	77	memory_install_readwrite32_device_handler( space, device, 0x5b000000, 0x5b00001f, 0, 0, s3c24xx_ac97_r, s3c24xx_ac97_w);
	78	DEVICE_START_CALL(s3c24xx);
	79	}
	80
	81	DEVICE_GET_INFO( s3c2440 )
	82	{
	83	switch ( state )
	84	{
	85	/* --- the following bits of info are returned as pointers to data or functions --- */
	86	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(s3c2440); break;
	87	/* --- the following bits of info are returned as NULL-terminated strings --- */
	88	case DEVINFO_STR_NAME: strcpy(info->s, "Samsung S3C2440"); break;
	89	/* --- default --- */
	90	default: DEVICE_GET_INFO_CALL(s3c24xx); break;
	91	}
	92	}
	93
	94	void s3c2440_uart_fifo_w( running_device *device, int uart, UINT8 data)
	95	{
	96	s3c24xx_uart_fifo_w( device, uart, data);
	97	}
	98
	99	void s3c2440_touch_screen( running_device *device, int state)
	100	{
	101	s3c24xx_touch_screen( device, state);
	102	}
	103
	104	void s3c2440_request_irq( running_device *device, UINT32 int_type)
	105	{
	106	s3c24xx_request_irq( device, int_type);
	107	}
	108
	109	void s3c2440_request_eint( running_device *device, UINT32 number)
	110	{
	111	s3c24xx_request_eint( device, number);
	112	}
	113
	114	WRITE_LINE_DEVICE_HANDLER( s3c2440_pin_frnb_w )
	115	{
	116	s3c24xx_pin_frnb_w( device, state);
	117	}

src/emu/machine/s3c2440.h
r0	r9813
	1	/*******************************************************************************
	2
	3	Samsung S3C2440 private data
	4
	5	*******************************************************************************/
	6
	7	#ifndef __S3C2440_H__
	8	#define __S3C2440_H__
	9
	10	/*******************************************************************************
	11	MACROS / CONSTANTS
	12	*******************************************************************************/
	13
	14	#define S3C2440_TAG "s3c2440"
	15
	16	#define S3C2440 DEVICE_GET_INFO_NAME( s3c2440 )
	17
	18	#define MDRV_S3C2440_ADD(_tag, _clock, _config) \
	19	MDRV_DEVICE_ADD(_tag, S3C2440, _clock) \
	20	MDRV_DEVICE_CONFIG(_config)
	21
	22	#define S3C2440_INTERFACE(name) \
	23	const s3c2440_interface(name) =
	24
	25	enum
	26	{
	27	S3C2440_GPIO_PORT_A = 0,
	28	S3C2440_GPIO_PORT_B,
	29	S3C2440_GPIO_PORT_C,
	30	S3C2440_GPIO_PORT_D,
	31	S3C2440_GPIO_PORT_E,
	32	S3C2440_GPIO_PORT_F,
	33	S3C2440_GPIO_PORT_G,
	34	S3C2440_GPIO_PORT_H,
	35	S3C2440_GPIO_PORT_J
	36	};
	37
	38	/*******************************************************************************
	39	TYPE DEFINITIONS
	40	*******************************************************************************/
	41
	42	typedef UINT32 (s3c24xx_gpio_port_r_func)( running_device device, int port);
	43	typedef void (s3c24xx_gpio_port_w_func)( running_device device, int port, UINT32 data);
	44
	45	typedef struct _s3c2440_interface_gpio s3c2440_interface_gpio;
	46	struct _s3c2440_interface_gpio
	47	{
	48	s3c24xx_gpio_port_r_func port_r;
	49	s3c24xx_gpio_port_w_func port_w;
	50	};
	51
	52	typedef struct _s3c2440_interface_i2c s3c2440_interface_i2c;
	53	struct _s3c2440_interface_i2c
	54	{
	55	write_line_device_func scl_w;
	56	read_line_device_func sda_r;
	57	write_line_device_func sda_w;
	58	};
	59
	60	typedef struct _s3c2440_interface_adc s3c2440_interface_adc;
	61	struct _s3c2440_interface_adc
	62	{
	63	read32_device_func data_r;
	64	};
	65
	66	typedef struct _s3c2440_interface_i2s s3c2440_interface_i2s;
	67	struct _s3c2440_interface_i2s
	68	{
	69	write16_device_func data_w;
	70	};
	71
	72	typedef struct _s3c2440_interface_nand s3c2440_interface_nand;
	73	struct _s3c2440_interface_nand
	74	{
	75	write8_device_func command_w;
	76	write8_device_func address_w;
	77	read8_device_func data_r;
	78	write8_device_func data_w;
	79	};
	80
	81	typedef struct _s3c2440_interface s3c2440_interface;
	82	struct _s3c2440_interface
	83	{
	84	s3c2440_interface_gpio gpio;
	85	s3c2440_interface_i2c i2c;
	86	s3c2440_interface_adc adc;
	87	s3c2440_interface_i2s i2s;
	88	s3c2440_interface_nand nand;
	89	};
	90
	91	/*******************************************************************************
	92	PROTOTYPES
	93	*******************************************************************************/
	94
	95	DEVICE_GET_INFO( s3c2440 );
	96
	97	VIDEO_START( s3c2440 );
	98	VIDEO_UPDATE( s3c2440 );
	99
	100	void s3c2440_uart_fifo_w( running_device *device, int uart, UINT8 data);
	101	void s3c2440_touch_screen( running_device *device, int state);
	102	void s3c2440_request_irq( running_device *device, UINT32 int_type);
	103	void s3c2440_request_eint( running_device *device, UINT32 number);
	104
	105	WRITE_LINE_DEVICE_HANDLER( s3c2440_pin_frnb_w );
	106
	107	/*******************************************************************************
	108	MACROS & CONSTANTS
	109	*******************************************************************************/
	110
	111	/* Memory Controller */
	112
	113	#define S3C24XX_BASE_MEMCON 0x48000000
	114
	115	/* USB Host Controller */
	116
	117	#define S3C24XX_BASE_USBHOST 0x49000000
	118
	119	/* Interrupt Controller */
	120
	121	#define S3C24XX_BASE_INT 0x4A000000
	122
	123	#define S3C24XX_SRCPND (0x00 / 4) // Interrupt Request Status
	124	#define S3C24XX_INTMOD (0x04 / 4) // Interrupt Mode Control
	125	#define S3C24XX_INTMSK (0x08 / 4) // Interrupt Mask Control
	126	#define S3C24XX_PRIORITY (0x0C / 4) // IRQ Priority Control
	127	#define S3C24XX_INTPND (0x10 / 4) // Interrupt Request Status
	128	#define S3C24XX_INTOFFSET (0x14 / 4) // Interrupt Request Source Offset
	129	#define S3C24XX_SUBSRCPND (0x18 / 4) // Sub Source Pending
	130	#define S3C24XX_INTSUBMSK (0x1C / 4) // Interrupt Sub Mask
	131
	132	/* DMA */
	133
	134	#define S3C24XX_BASE_DMA_0 0x4B000000
	135	#define S3C24XX_BASE_DMA_1 0x4B000040
	136	#define S3C24XX_BASE_DMA_2 0x4B000080
	137	#define S3C24XX_BASE_DMA_3 0x4B0000C0
	138
	139	#define S3C24XX_DISRC (0x00 / 4) // DMA Initial Source
	140	#define S3C24XX_DISRCC (0x04 / 4) // DMA Initial Source Control
	141	#define S3C24XX_DIDST (0x08 / 4) // DMA Initial Destination
	142	#define S3C24XX_DIDSTC (0x0C / 4) // DMA Initial Destination Control
	143	#define S3C24XX_DCON (0x10 / 4) // DMA Control
	144	#define S3C24XX_DSTAT (0x14 / 4) // DMA Count
	145	#define S3C24XX_DCSRC (0x18 / 4) // DMA Current Source
	146	#define S3C24XX_DCDST (0x1C / 4) // DMA Current Destination
	147	#define S3C24XX_DMASKTRIG (0x20 / 4) // DMA Mask Trigger
	148
	149	/* Clock & Power Management */
	150
	151	#define S3C24XX_BASE_CLKPOW 0x4C000000
	152
	153	#define S3C24XX_LOCKTIME (0x00 / 4) // PLL Lock Time Counter
	154	#define S3C24XX_MPLLCON (0x04 / 4) // MPLL Control
	155	#define S3C24XX_UPLLCON (0x08 / 4) // UPLL Control
	156	#define S3C24XX_CLKCON (0x0C / 4) // Clock Generator Control
	157	#define S3C24XX_CLKSLOW (0x10 / 4) // Slow Clock Control
	158	#define S3C24XX_CLKDIVN (0x14 / 4) // Clock Divider Control
	159	#define S3C24XX_CAMDIVN (0x18 / 4) // Camera Clock Divider Control
	160
	161	/* LCD Controller */
	162
	163	#define S3C24XX_BASE_LCD 0x4D000000
	164	#define S3C24XX_BASE_LCDPAL 0x4D000400
	165
	166	#define S3C24XX_LCDCON1 (0x00 / 4) // LCD Control 1
	167	#define S3C24XX_LCDCON2 (0x04 / 4) // LCD Control 2
	168	#define S3C24XX_LCDCON3 (0x08 / 4) // LCD Control 3
	169	#define S3C24XX_LCDCON4 (0x0C / 4) // LCD Control 4
	170	#define S3C24XX_LCDCON5 (0x10 / 4) // LCD Control 5
	171	#define S3C24XX_LCDSADDR1 (0x14 / 4) // STN/TFT: Frame Buffer Start Address 1
	172	#define S3C24XX_LCDSADDR2 (0x18 / 4) // STN/TFT: Frame Buffer Start Address 2
	173	#define S3C24XX_LCDSADDR3 (0x1C / 4) // STN/TFT: Virtual Screen Address Set
	174	#define S3C24XX_REDLUT (0x20 / 4) // STN: Red Lookup Table
	175	#define S3C24XX_GREENLUT (0x24 / 4) // STN: Green Lookup Table
	176	#define S3C24XX_BLUELUT (0x28 / 4) // STN: Blue Lookup Table
	177	#define S3C24XX_DITHMODE (0x4C / 4) // STN: Dithering Mode
	178	#define S3C24XX_TPAL (0x50 / 4) // TFT: Temporary Palette
	179	#define S3C24XX_LCDINTPND (0x54 / 4) // LCD Interrupt Pending
	180	#define S3C24XX_LCDSRCPND (0x58 / 4) // LCD Interrupt Source
	181	#define S3C24XX_LCDINTMSK (0x5C / 4) // LCD Interrupt Mask
	182	#define S3C24XX_TCONSEL (0x60 / 4) // TCON (LPC3600/LCC3600) Control
	183
	184	/* NAND Flash */
	185
	186	#define S3C24XX_BASE_NAND 0x4E000000
	187
	188	#define S3C24XX_NFCONF (0x00 / 4) // NAND Flash Configuration
	189	#define S3C24XX_NFCONT (0x04 / 4) // NAND Flash Control
	190	#define S3C24XX_NFCMD (0x08 / 4) // NAND Flash Command
	191	#define S3C24XX_NFADDR (0x0C / 4) // NAND Flash Address
	192	#define S3C24XX_NFDATA (0x10 / 4) // NAND Flash Data
	193	#define S3C24XX_NFMECCD0 (0x14 / 4) // NAND Flash Main Area ECC0/1
	194	#define S3C24XX_NFMECCD1 (0x18 / 4) // NAND Flash Main Area ECC2/3
	195	#define S3C24XX_NFSECCD (0x1C / 4) // NAND Flash Spare Area Ecc
	196	#define S3C24XX_NFSTAT (0x20 / 4) // NAND Flash Operation Status
	197	#define S3C24XX_NFESTAT0 (0x24 / 4) // NAND Flash ECC Status For I/O[7:0]
	198	#define S3C24XX_NFESTAT1 (0x28 / 4) // NAND Flash ECC Status For I/O[15:8]
	199	#define S3C24XX_NFMECC0 (0x2C / 4) // NAND Flash Main Area ECC0 Status
	200	#define S3C24XX_NFMECC1 (0x30 / 4) // NAND Flash Main Area ECC1 Status
	201	#define S3C24XX_NFSECC (0x34 / 4) // NAND Flash Spare Area ECC Status
	202	#define S3C24XX_NFSBLK (0x38 / 4) // NAND Flash Start Block Address
	203	#define S3C24XX_NFEBLK (0x3C / 4) // NAND Flash End Block Address
	204
	205	/* Camera Interface */
	206
	207	#define S3C24XX_BASE_CAM 0x4F000000
	208
	209	/* UART */
	210
	211	#define S3C24XX_BASE_UART_0 0x50000000
	212	#define S3C24XX_BASE_UART_1 0x50004000
	213	#define S3C24XX_BASE_UART_2 0x50008000
	214
	215	#define S3C24XX_ULCON (0x00 / 4) // UART Line Control
	216	#define S3C24XX_UCON (0x04 / 4) // UART Control
	217	#define S3C24XX_UFCON (0x08 / 4) // UART FIFO Control
	218	#define S3C24XX_UMCON (0x0C / 4) // UART Modem Control
	219	#define S3C24XX_UTRSTAT (0x10 / 4) // UART Tx/Rx Status
	220	#define S3C24XX_UERSTAT (0x14 / 4) // UART Rx Error Status
	221	#define S3C24XX_UFSTAT (0x18 / 4) // UART FIFO Status
	222	#define S3C24XX_UMSTAT (0x1C / 4) // UART Modem Status
	223	#define S3C24XX_UTXH (0x20 / 4) // UART Transmission Hold
	224	#define S3C24XX_URXH (0x24 / 4) // UART Receive Buffer
	225	#define S3C24XX_UBRDIV (0x28 / 4) // UART Baud Rate Divisor
	226
	227	/* PWM Timer */
	228
	229	#define S3C24XX_BASE_PWM 0x51000000
	230
	231	#define S3C24XX_TCFG0 (0x00 / 4) // Timer Configuration
	232	#define S3C24XX_TCFG1 (0x04 / 4) // Timer Configuration
	233	#define S3C24XX_TCON (0x08 / 4) // Timer Control
	234	#define S3C24XX_TCNTB0 (0x0C / 4) // Timer Count Buffer 0
	235	#define S3C24XX_TCMPB0 (0x10 / 4) // Timer Compare Buffer 0
	236	#define S3C24XX_TCNTO0 (0x14 / 4) // Timer Count Observation 0
	237	#define S3C24XX_TCNTB1 (0x18 / 4) // Timer Count Buffer 1
	238	#define S3C24XX_TCMPB1 (0x1C / 4) // Timer Compare Buffer 1
	239	#define S3C24XX_TCNTO1 (0x20 / 4) // Timer Count Observation 1
	240	#define S3C24XX_TCNTB2 (0x24 / 4) // Timer Count Buffer 2
	241	#define S3C24XX_TCMPB2 (0x28 / 4) // Timer Compare Buffer 2
	242	#define S3C24XX_TCNTO2 (0x2C / 4) // Timer Count Observation 2
	243	#define S3C24XX_TCNTB3 (0x30 / 4) // Timer Count Buffer 3
	244	#define S3C24XX_TCMPB3 (0x34 / 4) // Timer Compare Buffer 3
	245	#define S3C24XX_TCNTO3 (0x38 / 4) // Timer Count Observation 3
	246	#define S3C24XX_TCNTB4 (0x3C / 4) // Timer Count Buffer 4
	247	#define S3C24XX_TCNTO4 (0x40 / 4) // Timer Count Observation 4
	248
	249	/* USB Device */
	250
	251	#define S3C24XX_BASE_USBDEV 0x52000140
	252
	253	/* Watchdog Timer */
	254
	255	#define S3C24XX_BASE_WDT 0x53000000
	256
	257	#define S3C24XX_WTCON (0x00 / 4) // Watchdog Timer Mode
	258	#define S3C24XX_WTDAT (0x04 / 4) // Watchdog Timer Data
	259	#define S3C24XX_WTCNT (0x08 / 4) // Watchdog Timer Count
	260
	261	/* IIC */
	262
	263	#define S3C24XX_BASE_IIC 0x54000000
	264
	265	#define S3C24XX_IICCON (0x00 / 4) // IIC Control
	266	#define S3C24XX_IICSTAT (0x04 / 4) // IIC Status
	267	#define S3C24XX_IICADD (0x08 / 4) // IIC Address
	268	#define S3C24XX_IICDS (0x0C / 4) // IIC Data Shift
	269	#define S3C24XX_IICLC (0x10 / 4) // IIC Multi-Master Line Control
	270
	271	/* IIS */
	272
	273	#define S3C24XX_BASE_IIS 0x55000000
	274
	275	#define S3C24XX_IISCON (0x00 / 4) // IIS Control
	276	#define S3C24XX_IISMOD (0x04 / 4) // IIS Mode
	277	#define S3C24XX_IISPSR (0x08 / 4) // IIS Prescaler
	278	#define S3C24XX_IISFCON (0x0C / 4) // IIS FIFO Control
	279	#define S3C24XX_IISFIFO (0x10 / 4) // IIS FIFO Entry
	280
	281	/* I/O Port */
	282
	283	#define S3C24XX_BASE_GPIO 0x56000000
	284
	285	#define S3C24XX_GPACON (0x00 / 4) // Port A Control
	286	#define S3C24XX_GPADAT (0x04 / 4) // Port A Data
	287	#define S3C24XX_GPBCON (0x10 / 4) // Port B Control
	288	#define S3C24XX_GPBDAT (0x14 / 4) // Port B Data
	289	#define S3C24XX_GPBUP (0x18 / 4) // Pull-up Control B
	290	#define S3C24XX_GPCCON (0x20 / 4) // Port C Control
	291	#define S3C24XX_GPCDAT (0x24 / 4) // Port C Data
	292	#define S3C24XX_GPCUP (0x28 / 4) // Pull-up Control C
	293	#define S3C24XX_GPDCON (0x30 / 4) // Port D Control
	294	#define S3C24XX_GPDDAT (0x34 / 4) // Port D Data
	295	#define S3C24XX_GPDUP (0x38 / 4) // Pull-up Control D
	296	#define S3C24XX_GPECON (0x40 / 4) // Port E Control
	297	#define S3C24XX_GPEDAT (0x44 / 4) // Port E Data
	298	#define S3C24XX_GPEUP (0x48 / 4) // Pull-up Control E
	299	#define S3C24XX_GPFCON (0x50 / 4) // Port F Control
	300	#define S3C24XX_GPFDAT (0x54 / 4) // Port F Data
	301	#define S3C24XX_GPFUP (0x58 / 4) // Pull-up Control F
	302	#define S3C24XX_GPGCON (0x60 / 4) // Port G Control
	303	#define S3C24XX_GPGDAT (0x64 / 4) // Port G Data
	304	#define S3C24XX_GPGUP (0x68 / 4) // Pull-up Control G
	305	#define S3C24XX_GPHCON (0x70 / 4) // Port H Control
	306	#define S3C24XX_GPHDAT (0x74 / 4) // Port H Data
	307	#define S3C24XX_GPHUP (0x78 / 4) // Pull-up Control H
	308	#define S3C24XX_MISCCR (0x80 / 4) // Miscellaneous Control
	309	#define S3C24XX_DCLKCON (0x84 / 4) // DCLK0/1 Control
	310	#define S3C24XX_EXTINT0 (0x88 / 4) // External Interrupt Control Register 0
	311	#define S3C24XX_EXTINT1 (0x8C / 4) // External Interrupt Control Register 1
	312	#define S3C24XX_EXTINT2 (0x90 / 4) // External Interrupt Control Register 2
	313	#define S3C24XX_EINTFLT0 (0x94 / 4) // Reserved
	314	#define S3C24XX_EINTFLT1 (0x98 / 4) // Reserved
	315	#define S3C24XX_EINTFLT2 (0x9C / 4) // External Interrupt Filter Control Register 2
	316	#define S3C24XX_EINTFLT3 (0xA0 / 4) // External Interrupt Filter Control Register 3
	317	#define S3C24XX_EINTMASK (0xA4 / 4) // External Interrupt Mask
	318	#define S3C24XX_EINTPEND (0xA8 / 4) // External Interrupt Pending
	319	#define S3C24XX_GSTATUS0 (0xAC / 4) // External Pin Status
	320	#define S3C24XX_GSTATUS1 (0xB0 / 4) // Chip ID
	321	#define S3C24XX_GSTATUS2 (0xB4 / 4) // Reset Status
	322	#define S3C24XX_GSTATUS3 (0xB8 / 4) // Inform Register
	323	#define S3C24XX_GSTATUS4 (0xBC / 4) // Inform Register
	324	#define S3C24XX_MSLCON (0xCC / 4) // Memory Sleep Control Register
	325	#define S3C24XX_GPJCON (0xD0 / 4) // Port J Control
	326	#define S3C24XX_GPJDAT (0xD4 / 4) // Port J Data
	327	#define S3C24XX_GPJUP (0xD8 / 4) // Pull-up Control J
	328
	329	#define S3C24XX_GPADAT_MASK 0x01FFFFFF
	330	#define S3C24XX_GPBDAT_MASK 0x000007FF
	331	#define S3C24XX_GPCDAT_MASK 0x0000FFFF
	332	#define S3C24XX_GPDDAT_MASK 0x0000FFFF
	333	#define S3C24XX_GPEDAT_MASK 0x0000FFFF
	334	#define S3C24XX_GPFDAT_MASK 0x000000FF
	335	#define S3C24XX_GPGDAT_MASK 0x0000FFFF
	336	#define S3C24XX_GPHDAT_MASK 0x000007FF
	337	#define S3C24XX_GPJDAT_MASK 0x0000FFFF
	338
	339	/* RTC */
	340
	341	#define S3C24XX_BASE_RTC 0x57000040
	342
	343	#define S3C24XX_RTCCON (0x00 / 4) // RTC Control
	344	#define S3C24XX_TICNT (0x04 / 4) // Tick Time count
	345	#define S3C24XX_RTCALM (0x10 / 4) // RTC Alarm Control
	346	#define S3C24XX_ALMSEC (0x14 / 4) // Alarm Second
	347	#define S3C24XX_ALMMIN (0x18 / 4) // Alarm Minute
	348	#define S3C24XX_ALMHOUR (0x1C / 4) // Alarm Hour
	349	#define S3C24XX_ALMDAY (0x20 / 4) // Alarm Day
	350	#define S3C24XX_ALMMON (0x24 / 4) // Alarm Month
	351	#define S3C24XX_ALMYEAR (0x28 / 4) // Alarm Year
	352	#define S3C24XX_BCDSEC (0x30 / 4) // BCD Second
	353	#define S3C24XX_BCDMIN (0x34 / 4) // BCD Minute
	354	#define S3C24XX_BCDHOUR (0x38 / 4) // BCD Hour
	355	#define S3C24XX_BCDDAY (0x3C / 4) // BCD Day
	356	#define S3C24XX_BCDDOW (0x40 / 4) // BCD Day of Week
	357	#define S3C24XX_BCDMON (0x44 / 4) // BCD Month
	358	#define S3C24XX_BCDYEAR (0x48 / 4) // BCD Year
	359
	360	/* A/D Converter */
	361
	362	#define S3C24XX_BASE_ADC 0x58000000
	363
	364	#define S3C24XX_ADCCON (0x00 / 4) // ADC Control
	365	#define S3C24XX_ADCTSC (0x04 / 4) // ADC Touch Screen Control
	366	#define S3C24XX_ADCDLY (0x08 / 4) // ADC Start or Interval Delay
	367	#define S3C24XX_ADCDAT0 (0x0C / 4) // ADC Conversion Data
	368	#define S3C24XX_ADCDAT1 (0x10 / 4) // ADC Conversion Data
	369	#define S3C24XX_ADCUPDN (0x14 / 4) // Stylus up or down interrupt status
	370
	371	/* SPI */
	372
	373	#define S3C24XX_BASE_SPI_0 0x59000000
	374	#define S3C24XX_BASE_SPI_1 0x59000020
	375
	376	#define S3C24XX_SPCON (0x00 / 4) // SPI Control
	377	#define S3C24XX_SPSTA (0x04 / 4) // SPI Status
	378	#define S3C24XX_SPPIN (0x08 / 4) // SPI Pin Control
	379	#define S3C24XX_SPPRE (0x0C / 4) // SPI Baud Rate Prescaler
	380	#define S3C24XX_SPTDAT (0x10 / 4) // SPI Tx Data
	381	#define S3C24XX_SPRDAT (0x14 / 4) // SPI Rx Data
	382
	383	/* SD Interface */
	384
	385	#define S3C24XX_BASE_SDI 0x5A000000
	386
	387	/* AC97 Interface */
	388
	389	#define S3C24XX_BASE_AC97 0x5B000000
	390
	391	/* ... */
	392
	393	#define S3C24XX_INT_ADC 31
	394	#define S3C24XX_INT_RTC 30
	395	#define S3C24XX_INT_SPI1 29
	396	#define S3C24XX_INT_UART0 28
	397	#define S3C24XX_INT_IIC 27
	398	#define S3C24XX_INT_USBH 26
	399	#define S3C24XX_INT_USBD 25
	400	#define S3C24XX_INT_NFCON 24
	401	#define S3C24XX_INT_UART1 23
	402	#define S3C24XX_INT_SPI0 22
	403	#define S3C24XX_INT_SDI 21
	404	#define S3C24XX_INT_DMA3 20
	405	#define S3C24XX_INT_DMA2 19
	406	#define S3C24XX_INT_DMA1 18
	407	#define S3C24XX_INT_DMA0 17
	408	#define S3C24XX_INT_LCD 16
	409	#define S3C24XX_INT_UART2 15
	410	#define S3C24XX_INT_TIMER4 14
	411	#define S3C24XX_INT_TIMER3 13
	412	#define S3C24XX_INT_TIMER2 12
	413	#define S3C24XX_INT_TIMER1 11
	414	#define S3C24XX_INT_TIMER0 10
	415	#define S3C24XX_INT_WDT_AC97 9
	416	#define S3C24XX_INT_TICK 8
	417	#define S3C24XX_INT_BATT_FLT 7
	418	#define S3C24XX_INT_CAM 6
	419	#define S3C24XX_INT_EINT8_23 5
	420	#define S3C24XX_INT_EINT4_7 4
	421	#define S3C24XX_INT_EINT3 3
	422	#define S3C24XX_INT_EINT2 2
	423	#define S3C24XX_INT_EINT1 1
	424	#define S3C24XX_INT_EINT0 0
	425
	426	#define S3C24XX_SUBINT_AC97 14
	427	#define S3C24XX_SUBINT_WDT 13
	428	#define S3C24XX_SUBINT_CAM_P 12
	429	#define S3C24XX_SUBINT_CAM_C 11
	430	#define S3C24XX_SUBINT_ADC_S 10
	431	#define S3C24XX_SUBINT_TC 9
	432	#define S3C24XX_SUBINT_ERR2 8
	433	#define S3C24XX_SUBINT_TXD2 7
	434	#define S3C24XX_SUBINT_RXD2 6
	435	#define S3C24XX_SUBINT_ERR1 5
	436	#define S3C24XX_SUBINT_TXD1 4
	437	#define S3C24XX_SUBINT_RXD1 3
	438	#define S3C24XX_SUBINT_ERR0 2
	439	#define S3C24XX_SUBINT_TXD0 1
	440	#define S3C24XX_SUBINT_RXD0 0
	441
	442	static const UINT32 MAP_SUBINT_TO_INT[15] =
	443	{
	444	S3C24XX_INT_UART0, S3C24XX_INT_UART0, S3C24XX_INT_UART0,
	445	S3C24XX_INT_UART1, S3C24XX_INT_UART1, S3C24XX_INT_UART1,
	446	S3C24XX_INT_UART2, S3C24XX_INT_UART2, S3C24XX_INT_UART2,
	447	S3C24XX_INT_ADC, S3C24XX_INT_ADC,
	448	S3C24XX_INT_CAM, S3C24XX_INT_CAM,
	449	S3C24XX_INT_WDT_AC97, S3C24XX_INT_WDT_AC97
	450	};
	451
	452	#define S3C24XX_BPPMODE_STN_01 0x00
	453	#define S3C24XX_BPPMODE_STN_02 0x01
	454	#define S3C24XX_BPPMODE_STN_04 0x02
	455	#define S3C24XX_BPPMODE_STN_08 0x03
	456	#define S3C24XX_BPPMODE_STN_12_P 0x04
	457	#define S3C24XX_BPPMODE_STN_12_U 0x05
	458	#define S3C24XX_BPPMODE_STN_16 0x06
	459	#define S3C24XX_BPPMODE_TFT_01 0x08
	460	#define S3C24XX_BPPMODE_TFT_02 0x09
	461	#define S3C24XX_BPPMODE_TFT_04 0x0A
	462	#define S3C24XX_BPPMODE_TFT_08 0x0B
	463	#define S3C24XX_BPPMODE_TFT_16 0x0C
	464	#define S3C24XX_BPPMODE_TFT_24 0x0D
	465
	466	#define S3C24XX_PNRMODE_STN_04_DS 0
	467	#define S3C24XX_PNRMODE_STN_04_SS 1
	468	#define S3C24XX_PNRMODE_STN_08_SS 2
	469	#define S3C24XX_PNRMODE_TFT 3
	470
	471	#define S3C24XX_GPIO_PORT_A S3C2440_GPIO_PORT_A
	472	#define S3C24XX_GPIO_PORT_B S3C2440_GPIO_PORT_B
	473	#define S3C24XX_GPIO_PORT_C S3C2440_GPIO_PORT_C
	474	#define S3C24XX_GPIO_PORT_D S3C2440_GPIO_PORT_D
	475	#define S3C24XX_GPIO_PORT_E S3C2440_GPIO_PORT_E
	476	#define S3C24XX_GPIO_PORT_F S3C2440_GPIO_PORT_F
	477	#define S3C24XX_GPIO_PORT_G S3C2440_GPIO_PORT_G
	478	#define S3C24XX_GPIO_PORT_H S3C2440_GPIO_PORT_H
	479	#define S3C24XX_GPIO_PORT_J S3C2440_GPIO_PORT_J
	480
	481	/*******************************************************************************
	482	TYPE DEFINITIONS
	483	*******************************************************************************/
	484
	485	typedef struct
	486	{
	487	UINT32 data[0x34/4];
	488	} s3c24xx_memcon_regs_t;
	489
	490	typedef struct
	491	{
	492	UINT32 data[0x5C/4];
	493	} s3c24xx_usbhost_regs_t;
	494
	495	typedef struct
	496	{
	497	UINT32 srcpnd;
	498	UINT32 intmod;
	499	UINT32 intmsk;
	500	UINT32 priority;
	501	UINT32 intpnd;
	502	UINT32 intoffset;
	503	UINT32 subsrcpnd;
	504	UINT32 intsubmsk;
	505	} s3c24xx_irq_regs_t;
	506
	507	typedef struct
	508	{
	509	UINT32 disrc;
	510	UINT32 disrcc;
	511	UINT32 didst;
	512	UINT32 didstc;
	513	UINT32 dcon;
	514	UINT32 dstat;
	515	UINT32 dcsrc;
	516	UINT32 dcdst;
	517	UINT32 dmasktrig;
	518	} s3c24xx_dma_regs_t;
	519
	520	typedef struct
	521	{
	522	UINT32 locktime;
	523	UINT32 mpllcon;
	524	UINT32 upllcon;
	525	UINT32 clkcon;
	526	UINT32 clkslow;
	527	UINT32 clkdivn;
	528	UINT32 camdivn;
	529	} s3c24xx_clkpow_regs_t;
	530
	531	typedef struct
	532	{
	533	UINT32 lcdcon1;
	534	UINT32 lcdcon2;
	535	UINT32 lcdcon3;
	536	UINT32 lcdcon4;
	537	UINT32 lcdcon5;
	538	UINT32 lcdsaddr1;
	539	UINT32 lcdsaddr2;
	540	UINT32 lcdsaddr3;
	541	UINT32 redlut;
	542	UINT32 greenlut;
	543	UINT32 bluelut;
	544	UINT32 reserved[8];
	545	UINT32 dithmode;
	546	UINT32 tpal;
	547	UINT32 lcdintpnd;
	548	UINT32 lcdsrcpnd;
	549	UINT32 lcdintmsk;
	550	UINT32 tconsel;
	551	} s3c24xx_lcd_regs_t;
	552
	553	typedef struct
	554	{
	555	UINT32 data[0x400/4];
	556	} s3c24xx_lcdpal_regs_t;
	557
	558	typedef struct
	559	{
	560	UINT32 nfconf;
	561	UINT32 nfcont;
	562	UINT32 nfcmd;
	563	UINT32 nfaddr;
	564	UINT32 nfdata;
	565	UINT32 nfmeccd0;
	566	UINT32 nfmeccd1;
	567	UINT32 nfseccd;
	568	UINT32 nfstat;
	569	UINT32 nfestat0;
	570	UINT32 nfestat1;
	571	UINT32 nfmecc0;
	572	UINT32 nfmecc1;
	573	UINT32 nfsecc;
	574	UINT32 nfsblk;
	575	UINT32 nfeblk;
	576	} s3c24xx_nand_regs_t;
	577
	578	typedef struct
	579	{
	580	UINT32 data[0xA4/4];
	581	} s3c24xx_cam_regs_t;
	582
	583	typedef struct
	584	{
	585	UINT32 ulcon;
	586	UINT32 ucon;
	587	UINT32 ufcon;
	588	UINT32 umcon;
	589	UINT32 utrstat;
	590	UINT32 uerstat;
	591	UINT32 ufstat;
	592	UINT32 umstat;
	593	UINT32 utxh;
	594	UINT32 urxh;
	595	UINT32 ubrdiv;
	596	} s3c24xx_uart_regs_t;
	597
	598	typedef struct
	599	{
	600	UINT32 tcfg0;
	601	UINT32 tcfg1;
	602	UINT32 tcon;
	603	UINT32 tcntb0;
	604	UINT32 tcmpb0;
	605	UINT32 tcnto0;
	606	UINT32 tcntb1;
	607	UINT32 tcmpb1;
	608	UINT32 tcnto1;
	609	UINT32 tcntb2;
	610	UINT32 tcmpb2;
	611	UINT32 tcnto2;
	612	UINT32 tcntb3;
	613	UINT32 tcmpb3;
	614	UINT32 tcnto3;
	615	UINT32 tcntb4;
	616	UINT32 tcnto4;
	617	} s3c24xx_pwm_regs_t;
	618
	619	typedef struct
	620	{
	621	UINT32 data[0x130/4];
	622	} s3c24xx_usbdev_regs_t;
	623
	624	typedef struct
	625	{
	626	UINT32 wtcon;
	627	UINT32 wtdat;
	628	UINT32 wtcnt;
	629	} s3c24xx_wdt_regs_t;
	630
	631	typedef struct
	632	{
	633	UINT32 iiccon;
	634	UINT32 iicstat;
	635	UINT32 iicadd;
	636	UINT32 iicds;
	637	UINT32 iiclc;
	638	} s3c24xx_iic_regs_t;
	639
	640	typedef struct
	641	{
	642	UINT32 iiscon;
	643	UINT32 iismod;
	644	UINT32 iispsr;
	645	UINT32 iisfcon;
	646	UINT32 iisfifo;
	647	} s3c24xx_iis_regs_t;
	648
	649	typedef struct
	650	{
	651	UINT32 gpacon;
	652	UINT32 gpadat;
	653	UINT32 pad_08;
	654	UINT32 pad_0c;
	655	UINT32 gpbbon;
	656	UINT32 gpbdat;
	657	UINT32 gpbup;
	658	UINT32 pad_1c;
	659	UINT32 gpccon;
	660	UINT32 gpcdat;
	661	UINT32 gpcup;
	662	UINT32 pad_2c;
	663	UINT32 gpdcon;
	664	UINT32 gpddat;
	665	UINT32 gpdup;
	666	UINT32 pad_3c;
	667	UINT32 gpecon;
	668	UINT32 gpedat;
	669	UINT32 gpeup;
	670	UINT32 pad_4c;
	671	UINT32 gpfcon;
	672	UINT32 gpfdat;
	673	UINT32 gpfup;
	674	UINT32 pad_5c;
	675	UINT32 gpgcon;
	676	UINT32 gpgdat;
	677	UINT32 gpgup;
	678	UINT32 pad_6c;
	679	UINT32 gphcon;
	680	UINT32 gphdat;
	681	UINT32 gphup;
	682	UINT32 pad_7c;
	683	UINT32 misccr;
	684	UINT32 dclkcon;
	685	UINT32 extint0;
	686	UINT32 extint1;
	687	UINT32 extint2;
	688	UINT32 eintflt0;
	689	UINT32 eintflt1;
	690	UINT32 eintflt2;
	691	UINT32 eintflt3;
	692	UINT32 eintmask;
	693	UINT32 eintpend;
	694	UINT32 gstatus0;
	695	UINT32 gstatus1;
	696	UINT32 gstatus2;
	697	UINT32 gstatus3;
	698	UINT32 gstatus4;
	699	UINT32 pad_c0;
	700	UINT32 pad_c4;
	701	UINT32 pad_c8;
	702	UINT32 mslcon;
	703	UINT32 gpjcon;
	704	UINT32 gpjdat;
	705	UINT32 gpjup;
	706	} s3c24xx_gpio_regs_t;
	707
	708	typedef struct
	709	{
	710	UINT32 rtccon;
	711	UINT32 ticnt;
	712	UINT32 reserved[2];
	713	UINT32 rtcalm;
	714	UINT32 almsec;
	715	UINT32 almmin;
	716	UINT32 almhour;
	717	UINT32 almday;
	718	UINT32 almmon;
	719	UINT32 almyear;
	720	UINT32 rtcrst;
	721	UINT32 bcdsec;
	722	UINT32 bcdmin;
	723	UINT32 bcdhour;
	724	UINT32 bcdday;
	725	UINT32 bcddow;
	726	UINT32 bcdmon;
	727	UINT32 bcdyear;
	728	} s3c24xx_rtc_regs_t;
	729
	730	typedef struct
	731	{
	732	UINT32 adccon;
	733	UINT32 adctsc;
	734	UINT32 adcdly;
	735	UINT32 adcdat0;
	736	UINT32 adcdat1;
	737	UINT32 adcupdn;
	738	} s3c24xx_adc_regs_t;
	739
	740	typedef struct
	741	{
	742	UINT32 spcon;
	743	UINT32 spsta;
	744	UINT32 sppin;
	745	UINT32 sppre;
	746	UINT32 sptdat;
	747	UINT32 sprdat;
	748	} s3c24xx_spi_regs_t;
	749
	750	typedef struct
	751	{
	752	UINT32 data[0x44/4];
	753	} s3c24xx_sdi_regs_t;
	754
	755	typedef struct
	756	{
	757	UINT32 data[0x20/4];
	758	} s3c24xx_ac97_regs_t;
	759
	760	typedef struct
	761	{
	762	s3c24xx_memcon_regs_t regs;
	763	} s3c24xx_memcon_t;
	764
	765	typedef struct
	766	{
	767	s3c24xx_usbhost_regs_t regs;
	768	} s3c24xx_usbhost_t;
	769
	770	typedef struct
	771	{
	772	s3c24xx_irq_regs_t regs;
	773	} s3c24xx_irq_t;
	774
	775	typedef struct
	776	{
	777	s3c24xx_dma_regs_t regs;
	778	emu_timer *timer;
	779	} s3c24xx_dma_t;
	780
	781	typedef struct
	782	{
	783	s3c24xx_clkpow_regs_t regs;
	784	} s3c24xx_clkpow_t;
	785
	786	typedef struct
	787	{
	788	s3c24xx_lcd_regs_t regs;
	789	emu_timer *timer;
	790	bitmap_t *bitmap[2];
	791	UINT32 vramaddr_cur;
	792	UINT32 vramaddr_max;
	793	UINT32 offsize;
	794	UINT32 pagewidth_cur;
	795	UINT32 pagewidth_max;
	796	UINT32 bppmode;
	797	UINT32 bswp, hwswp;
	798	int vpos, hpos;
	799	double framerate;
	800	UINT32 tpal;
	801	UINT32 hpos_min, hpos_max, vpos_min, vpos_max;
	802	UINT32 dma_data, dma_bits;
	803	} s3c24xx_lcd_t;
	804
	805	typedef struct
	806	{
	807	s3c24xx_lcdpal_regs_t regs;
	808	} s3c24xx_lcdpal_t;
	809
	810	typedef struct
	811	{
	812	s3c24xx_nand_regs_t regs;
	813	UINT8 mecc[4];
	814	UINT8 secc[2];
	815	int pos;
	816	} s3c24xx_nand_t;
	817
	818	typedef struct
	819	{
	820	s3c24xx_cam_regs_t regs;
	821	} s3c24xx_cam_t;
	822
	823	typedef struct
	824	{
	825	s3c24xx_uart_regs_t regs;
	826	} s3c24xx_uart_t;
	827
	828	typedef struct
	829	{
	830	s3c24xx_pwm_regs_t regs;
	831	emu_timer *timer[5];
	832	UINT32 cnt[5];
	833	UINT32 cmp[5];
	834	UINT32 freq[5];
	835	} s3c24xx_pwm_t;
	836
	837	typedef struct
	838	{
	839	s3c24xx_usbdev_regs_t regs;
	840	} s3c24xx_usbdev_t;
	841
	842	typedef struct
	843	{
	844	s3c24xx_wdt_regs_t regs;
	845	emu_timer *timer;
	846	} s3c24xx_wdt_t;
	847
	848	typedef struct
	849	{
	850	s3c24xx_iic_regs_t regs;
	851	emu_timer *timer;
	852	int count;
	853	} s3c24xx_iic_t;
	854
	855	typedef struct
	856	{
	857	s3c24xx_iis_regs_t regs;
	858	emu_timer *timer;
	859	UINT16 fifo[16/2];
	860	int fifo_index;
	861	} s3c24xx_iis_t;
	862
	863	typedef struct
	864	{
	865	s3c24xx_gpio_regs_t regs;
	866	} s3c24xx_gpio_t;
	867
	868	typedef struct
	869	{
	870	s3c24xx_rtc_regs_t regs;
	871	emu_timer *timer_tick_count;
	872	emu_timer *timer_update;
	873	} s3c24xx_rtc_t;
	874
	875	typedef struct
	876	{
	877	s3c24xx_adc_regs_t regs;
	878	} s3c24xx_adc_t;
	879
	880	typedef struct
	881	{
	882	s3c24xx_spi_regs_t regs;
	883	} s3c24xx_spi_t;
	884
	885	typedef struct
	886	{
	887	s3c24xx_sdi_regs_t regs;
	888	} s3c24xx_sdi_t;
	889
	890	typedef struct
	891	{
	892	s3c24xx_ac97_regs_t regs;
	893	} s3c24xx_ac97_t;
	894
	895	typedef struct
	896	{
	897	const s3c2440_interface *iface;
	898	s3c24xx_memcon_t memcon;
	899	s3c24xx_usbhost_t usbhost;
	900	s3c24xx_irq_t irq;
	901	s3c24xx_dma_t dma[4];
	902	s3c24xx_clkpow_t clkpow;
	903	s3c24xx_lcd_t lcd;
	904	s3c24xx_lcdpal_t lcdpal;
	905	s3c24xx_nand_t nand;
	906	s3c24xx_cam_t cam;
	907	s3c24xx_uart_t uart[3];
	908	s3c24xx_pwm_t pwm;
	909	s3c24xx_usbdev_t usbdev;
	910	s3c24xx_wdt_t wdt;
	911	s3c24xx_iic_t iic;
	912	s3c24xx_iis_t iis;
	913	s3c24xx_gpio_t gpio;
	914	s3c24xx_rtc_t rtc;
	915	s3c24xx_adc_t adc;
	916	s3c24xx_spi_t spi[2];
	917	s3c24xx_sdi_t sdi;
	918	s3c24xx_ac97_t ac97;
	919	} s3c24xx_t;
	920
	921	#endif

src/emu/machine/s3c24xx.c
r0	r9813
	1	/*******************************************************************************
	2
	3	Samsung S3C2400 / S3C2410 / S3C2440
	4
	5	*******************************************************************************/
	6
	7	#include "emu.h"
	8	#include "cpu/arm7/arm7.h"
	9	#include "cpu/arm7/arm7core.h"
	10	//#include "includes/s3c24xx.h"
	11	#include "coreutil.h"
	12
	13	/*******************************************************************************
	14	MACROS & CONSTANTS
	15	*******************************************************************************/
	16
	17	//#define UART_PRINTF
	18
	19	#define CLOCK_MULTIPLIER 1
	20
	21	#define BIT(x,n) (((x)>>(n))&1)
	22	#define BITS(x,m,n) (((x)>>(n))&(((UINT32)1<<((m)-(n)+1))-1))
	23	#define CLR_BITS(x,m,n) ((x) & ~((((UINT32)1 << ((m) - (n) + 1)) - 1) << n))
	24
	25	#if defined(DEVICE_S3C2400)
	26
	27	#define S3C24XX_TPAL_GET_TPALEN(x) BIT(x,16)
	28	#define S3C24XX_TPAL_GET_TPALVAL(x) BITS(x,15,0)
	29
	30	#else
	31
	32	#define S3C24XX_TPAL_GET_TPALEN(x) BIT(x,24)
	33	#define S3C24XX_TPAL_GET_TPALVAL(x) BITS(x,23,0)
	34
	35	#endif
	36
	37	#define S3C24XX_DCON_GET_TC(x) BITS(x,19,0)
	38	#define S3C24XX_DCON_GET_DSZ(x) BITS(x,21,20)
	39	#define S3C24XX_DCON_GET_RELOAD(x) BIT(x,22)
	40	#define S3C24XX_DCON_GET_SWHWSEL(x) BIT(x,23)
	41
	42	#define S3C24XX_DSTAT_GET_CURR_TC(x) BITS(x,19,0)
	43	#define S3C24XX_DSTAT_SET_CURR_TC(x,m) (CLR_BITS(x,19,0) \| m)
	44
	45	#define S3C24XX_DMASKTRIG_GET_ON_OFF(x) BIT(x,1)
	46
	47	#if defined(DEVICE_S3C2400)
	48
	49	#define S3C24XX_DCON_GET_HWSRCSEL(x) BITS(x,25,24)
	50	#define S3C24XX_DCON_GET_SERVMODE(x) BIT(x,26)
	51	#define S3C24XX_DCON_GET_TSZ(x) BIT(x,27)
	52	#define S3C24XX_DCON_GET_INT(x) BIT(x,28)
	53
	54	#define S3C24XX_DISRC_GET_SADDR(x) BITS(x,28,0)
	55
	56	#define S3C24XX_DIDST_GET_DADDR(x) BITS(x,28,0)
	57
	58	#define S3C24XX_DCSRC_GET_CURR_SRC(x) BITS(x,28,0)
	59	#define S3C24XX_DCSRC_SET_CURR_SRC(x,m) (CLR_BITS(x,28,0) \| m)
	60
	61	#define S3C24XX_DCDST_GET_CURR_DST(x) BITS(x,28,0)
	62	#define S3C24XX_DCDST_SET_CURR_DST(x,m) (CLR_BITS(x,28,0) \| m)
	63
	64	#else
	65
	66	#define S3C24XX_DCON_GET_HWSRCSEL(x) BITS(x,26,24)
	67	#define S3C24XX_DCON_GET_SERVMODE(x) BIT(x,27)
	68	#define S3C24XX_DCON_GET_TSZ(x) BIT(x,28)
	69	#define S3C24XX_DCON_GET_INT(x) BIT(x,29)
	70
	71	#define S3C24XX_DISRC_GET_SADDR(x) BITS(x,30,0)
	72
	73	#define S3C24XX_DIDST_GET_DADDR(x) BITS(x,30,0)
	74
	75	#define S3C24XX_DCSRC_GET_CURR_SRC(x) BITS(x,30,0)
	76	#define S3C24XX_DCSRC_SET_CURR_SRC(x,m) (CLR_BITS(x,30,0) \| m)
	77
	78	#define S3C24XX_DCDST_GET_CURR_DST(x) BITS(x,30,0)
	79	#define S3C24XX_DCDST_SET_CURR_DST(x,m) (CLR_BITS(x,30,0) \| m)
	80
	81	#endif
	82
	83	/***************************************************************************
	84	TYPE DEFINITIONS
	85	***************************************************************************/
	86
	87	#if defined(DEVICE_S3C2400)
	88	typedef s3c2400_interface s3c24xx_interface;
	89	#elif defined(DEVICE_S3C2410)
	90	typedef s3c2410_interface s3c24xx_interface;
	91	#elif defined(DEVICE_S3C2440)
	92	typedef s3c2440_interface s3c24xx_interface;
	93	#endif
	94
	95	/***************************************************************************
	96	PROTOTYPES
	97	***************************************************************************/
	98
	99	static UINT32 s3c24xx_get_fclk( running_device *device);
	100	static UINT32 s3c24xx_get_hclk( running_device *device);
	101	static UINT32 s3c24xx_get_pclk( running_device *device);
	102
	103	static void s3c24xx_dma_request_iis( running_device *device);
	104	static void s3c24xx_dma_request_pwm( running_device *device);
	105
	106	/***************************************************************************
	107	INLINE FUNCTIONS
	108	***************************************************************************/
	109
	110	INLINE s3c24xx_t get_token( running_device device)
	111	{
	112	assert(device != NULL);
	113	return (s3c24xx_t )downcast<legacy_device_base >(device)->token();
	114	}
	115
	116	/***************************************************************************
	117	IMPLEMENTATION
	118	***************************************************************************/
	119
	120	/* ... */
	121
	122	static void s3c24xx_reset( running_device *device)
	123	{
	124	fatalerror( "s3c24xx_reset\n");
	125	}
	126
	127	/* LCD Controller */
	128
	129	static rgb_t s3c24xx_get_color_tft_16( running_device *device, UINT16 data)
	130	{
	131	s3c24xx_t *s3c24xx = get_token( device);
	132	if ((s3c24xx->lcd.regs.lcdcon5 & (1 << 11)) == 0)
	133	{
	134	UINT8 r, g, b, i;
	135	r = (BITS( data, 15, 11) << 3);
	136	g = (BITS( data, 10, 6) << 3);
	137	b = (BITS( data, 5, 1) << 3);
	138	i = BIT( data, 1) << 2;
	139	return MAKE_RGB( r \| i, g \| i, b \| i);
	140	}
	141	else
	142	{
	143	UINT8 r, g, b;
	144	r = BITS( data, 15, 11) << 3;
	145	g = BITS( data, 10, 5) << 2;
	146	b = BITS( data, 4, 0) << 3;
	147	return MAKE_RGB( r, g, b);
	148	}
	149	}
	150
	151	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	152
	153	static rgb_t s3c24xx_get_color_tft_24( running_device *device, UINT32 data)
	154	{
	155	UINT8 r, g, b;
	156	r = BITS( data, 23, 16);
	157	g = BITS( data, 15, 8);
	158	b = BITS( data, 7, 0);
	159	return MAKE_RGB( r, g, b);
	160	}
	161
	162	#endif
	163
	164	static rgb_t s3c24xx_get_color_stn_12( running_device *device, UINT16 data)
	165	{
	166	UINT8 r, g, b;
	167	r = BITS( data, 11, 8) << 4;
	168	g = BITS( data, 7, 4) << 4;
	169	b = BITS( data, 3, 0) << 4;
	170	return MAKE_RGB( r, g, b);
	171	}
	172
	173	static rgb_t s3c24xx_get_color_stn_08( running_device *device, UINT8 data)
	174	{
	175	s3c24xx_t *s3c24xx = get_token( device);
	176	UINT8 r, g, b;
	177	r = ((s3c24xx->lcd.regs.redlut >> (BITS( data, 7, 5) << 2)) & 0xF) << 4;
	178	g = ((s3c24xx->lcd.regs.greenlut >> (BITS( data, 4, 2) << 2)) & 0xF) << 4;
	179	b = ((s3c24xx->lcd.regs.bluelut >> (BITS( data, 1, 0) << 2)) & 0xF) << 4;
	180	return MAKE_RGB( r, g, b);
	181	}
	182
	183	static rgb_t s3c24xx_get_color_stn_01( running_device *device, UINT8 data)
	184	{
	185	if ((data & 1) == 0)
	186	{
	187	return RGB_BLACK;
	188	}
	189	else
	190	{
	191	return RGB_WHITE;
	192	}
	193	}
	194
	195	static rgb_t s3c24xx_get_color_stn_02( running_device *device, UINT8 data)
	196	{
	197	s3c24xx_t *s3c24xx = get_token( device);
	198	UINT8 r, g, b;
	199	r = g = b = ((s3c24xx->lcd.regs.bluelut >> (BITS( data, 1, 0) << 2)) & 0xF) << 4;
	200	return MAKE_RGB( r, g, b);
	201	}
	202
	203	static rgb_t s3c24xx_get_color_stn_04( running_device *device, UINT8 data)
	204	{
	205	UINT8 r, g, b;
	206	r = g = b = BITS( data, 3, 0) << 4;
	207	return MAKE_RGB( r, g, b);
	208	}
	209
	210	static rgb_t s3c24xx_get_color_tpal( running_device *device)
	211	{
	212	s3c24xx_t *s3c24xx = get_token( device);
	213	#if defined(DEVICE_S3C2400)
	214	return s3c24xx_get_color_tft_16( device, S3C24XX_TPAL_GET_TPALVAL( s3c24xx->lcd.tpal));
	215	#else
	216	return s3c24xx_get_color_tft_24( device, S3C24XX_TPAL_GET_TPALVAL( s3c24xx->lcd.tpal));
	217	#endif
	218	}
	219
	220	static void s3c24xx_lcd_dma_reload( running_device *device)
	221	{
	222	s3c24xx_t *s3c24xx = get_token( device);
	223	s3c24xx->lcd.vramaddr_cur = s3c24xx->lcd.regs.lcdsaddr1 << 1;
	224	s3c24xx->lcd.vramaddr_max = ((s3c24xx->lcd.regs.lcdsaddr1 & 0xFFE00000) \| s3c24xx->lcd.regs.lcdsaddr2) << 1;
	225	s3c24xx->lcd.offsize = BITS( s3c24xx->lcd.regs.lcdsaddr3, 21, 11);
	226	s3c24xx->lcd.pagewidth_cur = 0;
	227	s3c24xx->lcd.pagewidth_max = BITS( s3c24xx->lcd.regs.lcdsaddr3, 10, 0);
	228	verboselog( device->machine, 3, "LCD - vramaddr %08X %08X offsize %08X pagewidth %08X\n", s3c24xx->lcd.vramaddr_cur, s3c24xx->lcd.vramaddr_max, s3c24xx->lcd.offsize, s3c24xx->lcd.pagewidth_max);
	229	s3c24xx->lcd.dma_data = 0;
	230	s3c24xx->lcd.dma_bits = 0;
	231	}
	232
	233	static void s3c24xx_lcd_dma_init( running_device *device)
	234	{
	235	s3c24xx_t *s3c24xx = get_token( device);
	236	s3c24xx_lcd_dma_reload( device);
	237	s3c24xx->lcd.bppmode = BITS( s3c24xx->lcd.regs.lcdcon1, 4, 1);
	238	s3c24xx->lcd.bswp = BIT( s3c24xx->lcd.regs.lcdcon5, 1);
	239	s3c24xx->lcd.hwswp = BIT( s3c24xx->lcd.regs.lcdcon5, 0);
	240	s3c24xx->lcd.tpal = s3c24xx->lcd.regs.tpal;
	241	verboselog( device->machine, 3, "LCD - bppmode %d hwswp %d bswp %d\n", s3c24xx->lcd.bppmode, s3c24xx->lcd.hwswp, s3c24xx->lcd.bswp);
	242	s3c24xx->lcd.dma_data = 0;
	243	s3c24xx->lcd.dma_bits = 0;
	244	}
	245
	246	/*
	247	static UINT32 s3c24xx_lcd_dma_read( running_device *device)
	248	{
	249	s3c24xx_t *s3c24xx = get_token( device);
	250	address_space* space = cputag_get_address_space( device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	251	UINT8 *vram, data[4];
	252	vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
	253	for (int i = 0; i < 2; i++)
	254	{
	255	data[i2+0] = vram++;
	256	data[i2+1] = vram++;
	257	s3c24xx->lcd.vramaddr_cur += 2;
	258	s3c24xx->lcd.pagewidth_cur++;
	259	if (s3c24xx->lcd.pagewidth_cur >= s3c24xx->lcd.pagewidth_max)
	260	{
	261	s3c24xx->lcd.vramaddr_cur += s3c24xx->lcd.offsize << 1;
	262	s3c24xx->lcd.pagewidth_cur = 0;
	263	vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
	264	}
	265	}
	266	if (s3c24xx->lcd.hwswp == 0)
	267	{
	268	if (s3c24xx->lcd.bswp == 0)
	269	{
	270	return (data[3] << 24) \| (data[2] << 16) \| (data[1] << 8) \| (data[0] << 0);
	271	}
	272	else
	273	{
	274	return (data[0] << 24) \| (data[1] << 16) \| (data[2] << 8) \| (data[3] << 0);
	275	}
	276	}
	277	else
	278	{
	279	if (s3c24xx->lcd.bswp == 0)
	280	{
	281	return (data[1] << 24) \| (data[0] << 16) \| (data[3] << 8) \| (data[2] << 0);
	282	}
	283	else
	284	{
	285	return (data[2] << 24) \| (data[3] << 16) \| (data[0] << 8) \| (data[1] << 0);
	286	}
	287	}
	288	}
	289	*/
	290
	291	static UINT32 s3c24xx_lcd_dma_read( running_device *device)
	292	{
	293	s3c24xx_t *s3c24xx = get_token( device);
	294	address_space* space = cputag_get_address_space( device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	295	UINT8 *vram, data[4];
	296	vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
	297	for (int i = 0; i < 2; i++)
	298	{
	299	if (s3c24xx->lcd.hwswp == 0)
	300	{
	301	if (s3c24xx->lcd.bswp == 0)
	302	{
	303	if ((s3c24xx->lcd.vramaddr_cur & 2) == 0)
	304	{
	305	data[i2+0] = (vram + 3);
	306	data[i2+1] = (vram + 2);
	307	}
	308	else
	309	{
	310	data[i2+0] = (vram - 1);
	311	data[i2+1] = (vram - 2);
	312	}
	313	}
	314	else
	315	{
	316	data[i2+0] = (vram + 0);
	317	data[i2+1] = (vram + 1);
	318	}
	319	}
	320	else
	321	{
	322	if (s3c24xx->lcd.bswp == 0)
	323	{
	324	data[i2+0] = (vram + 1);
	325	data[i2+1] = (vram + 0);
	326	}
	327	else
	328	{
	329	if ((s3c24xx->lcd.vramaddr_cur & 2) == 0)
	330	{
	331	data[i2+0] = (vram + 2);
	332	data[i2+1] = (vram + 3);
	333	}
	334	else
	335	{
	336	data[i2+0] = (vram - 2);
	337	data[i2+1] = (vram - 1);
	338	}
	339	}
	340	}
	341	s3c24xx->lcd.vramaddr_cur += 2;
	342	s3c24xx->lcd.pagewidth_cur++;
	343	if (s3c24xx->lcd.pagewidth_cur >= s3c24xx->lcd.pagewidth_max)
	344	{
	345	s3c24xx->lcd.vramaddr_cur += s3c24xx->lcd.offsize << 1;
	346	s3c24xx->lcd.pagewidth_cur = 0;
	347	vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
	348	}
	349	else
	350	{
	351	vram += 2;
	352	}
	353	}
	354	return (data[0] << 24) \| (data[1] << 16) \| (data[2] << 8) \| (data[3] << 0);
	355	}
	356
	357	static UINT32 s3c24xx_lcd_dma_read_bits( running_device *device, int count)
	358	{
	359	s3c24xx_t *s3c24xx = get_token( device);
	360	UINT32 data;
	361	if (count <= s3c24xx->lcd.dma_bits)
	362	{
	363	s3c24xx->lcd.dma_bits -= count;
	364	data = BITS( s3c24xx->lcd.dma_data, 31, 32 - count);
	365	s3c24xx->lcd.dma_data = s3c24xx->lcd.dma_data << count;
	366	}
	367	else
	368	{
	369	if (s3c24xx->lcd.dma_bits == 0)
	370	{
	371	if (count == 32)
	372	{
	373	data = s3c24xx_lcd_dma_read( device);
	374	}
	375	else
	376	{
	377	UINT32 temp = s3c24xx_lcd_dma_read( device);
	378	data = BITS( temp, 31, 32 - count);
	379	s3c24xx->lcd.dma_data = temp << count;
	380	s3c24xx->lcd.dma_bits = 32 - count;
	381	}
	382	}
	383	else
	384	{
	385	UINT32 temp = s3c24xx_lcd_dma_read( device);
	386	data = (s3c24xx->lcd.dma_data >> (32 - count)) \| BITS( temp, 31, 32 - (count - s3c24xx->lcd.dma_bits));
	387	s3c24xx->lcd.dma_data = temp << (count - s3c24xx->lcd.dma_bits);
	388	s3c24xx->lcd.dma_bits = 32 - (count - s3c24xx->lcd.dma_bits);
	389	}
	390	}
	391	return data;
	392	}
	393
	394	static void s3c24xx_lcd_render_tpal( running_device *device)
	395	{
	396	s3c24xx_t *s3c24xx = get_token( device);
	397	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	398	UINT32 color = s3c24xx_get_color_tpal( device);
	399	for (int y = s3c24xx->lcd.vpos_min; y <= s3c24xx->lcd.vpos_max; y++)
	400	{
	401	UINT32 *scanline = BITMAP_ADDR32( bitmap, y, s3c24xx->lcd.hpos_min);
	402	for (int x = s3c24xx->lcd.hpos_min; x <= s3c24xx->lcd.hpos_max; x++)
	403	{
	404	*scanline++ = color;
	405	}
	406	}
	407	}
	408
	409	static void s3c24xx_lcd_render_stn_01( running_device *device)
	410	{
	411	s3c24xx_t *s3c24xx = get_token( device);
	412	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	413	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	414	for (int i = 0; i < 4; i++)
	415	{
	416	UINT32 data = s3c24xx_lcd_dma_read( device);
	417	for (int j = 0; j < 32; j++)
	418	{
	419	*scanline++ = s3c24xx_get_color_stn_01( device, (data >> 31) & 0x01);
	420	data = data << 1;
	421	s3c24xx->lcd.hpos++;
	422	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 4))
	423	{
	424	s3c24xx->lcd.vpos++;
	425	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	426	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	427	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	428	}
	429	}
	430	}
	431	}
	432
	433	static void s3c24xx_lcd_render_stn_02( running_device *device)
	434	{
	435	s3c24xx_t *s3c24xx = get_token( device);
	436	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	437	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	438	for (int i = 0; i < 4; i++)
	439	{
	440	UINT32 data = s3c24xx_lcd_dma_read( device);
	441	for (int j = 0; j < 16; j++)
	442	{
	443	*scanline++ = s3c24xx_get_color_stn_02( device, (data >> 30) & 0x03);
	444	data = data << 2;
	445	s3c24xx->lcd.hpos++;
	446	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 3))
	447	{
	448	s3c24xx->lcd.vpos++;
	449	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	450	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	451	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	452	}
	453	}
	454	}
	455	}
	456
	457	static void s3c24xx_lcd_render_stn_04( running_device *device)
	458	{
	459	s3c24xx_t *s3c24xx = get_token( device);
	460	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	461	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	462	for (int i = 0; i < 4; i++)
	463	{
	464	UINT32 data = s3c24xx_lcd_dma_read( device);
	465	for (int j = 0; j < 8; j++)
	466	{
	467	*scanline++ = s3c24xx_get_color_stn_04( device, (data >> 28) & 0x0F);
	468	data = data << 4;
	469	s3c24xx->lcd.hpos++;
	470	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 2))
	471	{
	472	s3c24xx->lcd.vpos++;
	473	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	474	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	475	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	476	}
	477	}
	478	}
	479	}
	480
	481	static void s3c24xx_lcd_render_stn_08( running_device *device)
	482	{
	483	s3c24xx_t *s3c24xx = get_token( device);
	484	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	485	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	486	for (int i = 0; i < 4; i++)
	487	{
	488	UINT32 data = s3c24xx_lcd_dma_read( device);
	489	for (int j = 0; j < 4; j++)
	490	{
	491	*scanline++ = s3c24xx_get_color_stn_08( device, (data >> 24) & 0xFF);
	492	data = data << 8;
	493	s3c24xx->lcd.hpos++;
	494	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 1))
	495	{
	496	s3c24xx->lcd.vpos++;
	497	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	498	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	499	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	500	}
	501	}
	502	}
	503	}
	504
	505	static void s3c24xx_lcd_render_stn_12_p( running_device *device)
	506	{
	507	s3c24xx_t *s3c24xx = get_token( device);
	508	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	509	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	510	for (int i = 0; i < 16; i++)
	511	{
	512	*scanline++ = s3c24xx_get_color_stn_12( device, s3c24xx_lcd_dma_read_bits( device, 12));
	513	s3c24xx->lcd.hpos++;
	514	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max * 16 / 12))
	515	{
	516	s3c24xx->lcd.vpos++;
	517	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	518	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	519	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	520	}
	521	}
	522	}
	523
	524	static void s3c24xx_lcd_render_tft_01( running_device *device)
	525	{
	526	s3c24xx_t *s3c24xx = get_token( device);
	527	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	528	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	529	for (int i = 0; i < 4; i++)
	530	{
	531	UINT32 data = s3c24xx_lcd_dma_read( device);
	532	for (int j = 0; j < 32; j++)
	533	{
	534	*scanline++ = palette_get_color( device->machine, (data >> 31) & 0x01);
	535	data = data << 1;
	536	s3c24xx->lcd.hpos++;
	537	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 4))
	538	{
	539	s3c24xx->lcd.vpos++;
	540	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	541	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	542	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	543	}
	544	}
	545	}
	546	}
	547
	548	static void s3c24xx_lcd_render_tft_02( running_device *device)
	549	{
	550	s3c24xx_t *s3c24xx = get_token( device);
	551	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	552	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	553	for (int i = 0; i < 4; i++)
	554	{
	555	UINT32 data = s3c24xx_lcd_dma_read( device);
	556	for (int j = 0; j < 16; j++)
	557	{
	558	*scanline++ = palette_get_color( device->machine, (data >> 30) & 0x03);
	559	data = data << 2;
	560	s3c24xx->lcd.hpos++;
	561	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 3))
	562	{
	563	s3c24xx->lcd.vpos++;
	564	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	565	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	566	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	567	}
	568	}
	569	}
	570	}
	571
	572	static void s3c24xx_lcd_render_tft_04( running_device *device)
	573	{
	574	s3c24xx_t *s3c24xx = get_token( device);
	575	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	576	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	577	for (int i = 0; i < 4; i++)
	578	{
	579	UINT32 data = s3c24xx_lcd_dma_read( device);
	580	for (int j = 0; j < 8; j++)
	581	{
	582	*scanline++ = palette_get_color( device->machine, (data >> 28) & 0x0F);
	583	data = data << 4;
	584	s3c24xx->lcd.hpos++;
	585	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 2))
	586	{
	587	s3c24xx->lcd.vpos++;
	588	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	589	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	590	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	591	}
	592	}
	593	}
	594	}
	595
	596	static void s3c24xx_lcd_render_tft_08( running_device *device)
	597	{
	598	s3c24xx_t *s3c24xx = get_token( device);
	599	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	600	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	601	for (int i = 0; i < 4; i++)
	602	{
	603	UINT32 data = s3c24xx_lcd_dma_read( device);
	604	for (int j = 0; j < 4; j++)
	605	{
	606	*scanline++ = palette_get_color( device->machine, (data >> 24) & 0xFF);
	607	data = data << 8;
	608	s3c24xx->lcd.hpos++;
	609	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 1))
	610	{
	611	s3c24xx->lcd.vpos++;
	612	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	613	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	614	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	615	}
	616	}
	617	}
	618	}
	619
	620	static void s3c24xx_lcd_render_tft_16( running_device *device)
	621	{
	622	s3c24xx_t *s3c24xx = get_token( device);
	623	bitmap_t *bitmap = s3c24xx->lcd.bitmap[0];
	624	UINT32 *scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	625	for (int i = 0; i < 4; i++)
	626	{
	627	UINT32 data = s3c24xx_lcd_dma_read( device);
	628	for (int j = 0; j < 2; j++)
	629	{
	630	*scanline++ = s3c24xx_get_color_tft_16( device, (data >> 16) & 0xFFFF);
	631	data = data << 16;
	632	s3c24xx->lcd.hpos++;
	633	if (s3c24xx->lcd.hpos >= s3c24xx->lcd.hpos_min + (s3c24xx->lcd.pagewidth_max << 0))
	634	{
	635	s3c24xx->lcd.vpos++;
	636	if (s3c24xx->lcd.vpos > s3c24xx->lcd.vpos_max) s3c24xx->lcd.vpos = s3c24xx->lcd.vpos_min;
	637	s3c24xx->lcd.hpos = s3c24xx->lcd.hpos_min;
	638	scanline = BITMAP_ADDR32( bitmap, s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	639	}
	640	}
	641	}
	642	}
	643
	644	static TIMER_CALLBACK( s3c24xx_lcd_timer_exp )
	645	{
	646	running_device device = (running_device )ptr;
	647	s3c24xx_t *s3c24xx = get_token( device);
	648	screen_device *screen = machine->primary_screen;
	649	UINT32 tpalen;
	650	verboselog( machine, 2, "LCD timer callback\n");
	651	s3c24xx->lcd.vpos = screen->vpos();
	652	s3c24xx->lcd.hpos = screen->hpos();
	653	verboselog( machine, 3, "LCD - vpos %d hpos %d\n", s3c24xx->lcd.vpos, s3c24xx->lcd.hpos);
	654	tpalen = S3C24XX_TPAL_GET_TPALEN( s3c24xx->lcd.tpal);
	655	if (tpalen == 0)
	656	{
	657	if (s3c24xx->lcd.vramaddr_cur >= s3c24xx->lcd.vramaddr_max)
	658	{
	659	s3c24xx_lcd_dma_reload( device);
	660	}
	661	verboselog( machine, 3, "LCD - vramaddr %08X\n", s3c24xx->lcd.vramaddr_cur);
	662	while (s3c24xx->lcd.vramaddr_cur < s3c24xx->lcd.vramaddr_max)
	663	{
	664	switch (s3c24xx->lcd.bppmode)
	665	{
	666	case S3C24XX_BPPMODE_STN_01 : s3c24xx_lcd_render_stn_01( device); break;
	667	case S3C24XX_BPPMODE_STN_02 : s3c24xx_lcd_render_stn_02( device); break;
	668	case S3C24XX_BPPMODE_STN_04 : s3c24xx_lcd_render_stn_04( device); break;
	669	case S3C24XX_BPPMODE_STN_08 : s3c24xx_lcd_render_stn_08( device); break;
	670	case S3C24XX_BPPMODE_STN_12_P : s3c24xx_lcd_render_stn_12_p( device); break;
	671	case S3C24XX_BPPMODE_TFT_01 : s3c24xx_lcd_render_tft_01( device); break;
	672	case S3C24XX_BPPMODE_TFT_02 : s3c24xx_lcd_render_tft_02( device); break;
	673	case S3C24XX_BPPMODE_TFT_04 : s3c24xx_lcd_render_tft_04( device); break;
	674	case S3C24XX_BPPMODE_TFT_08 : s3c24xx_lcd_render_tft_08( device); break;
	675	case S3C24XX_BPPMODE_TFT_16 : s3c24xx_lcd_render_tft_16( device); break;
	676	default : verboselog( machine, 0, "s3c24xx_lcd_timer_exp: bppmode %d not supported\n", s3c24xx->lcd.bppmode); break;
	677	}
	678	if ((s3c24xx->lcd.vpos == s3c24xx->lcd.vpos_min) && (s3c24xx->lcd.hpos == s3c24xx->lcd.hpos_min)) break;
	679	}
	680	}
	681	else
	682	{
	683	s3c24xx_lcd_render_tpal( device);
	684	}
	685	timer_adjust_oneshot( s3c24xx->lcd.timer, screen->time_until_pos( s3c24xx->lcd.vpos, s3c24xx->lcd.hpos), 0);
	686	}
	687
	688	static void s3c24xx_video_start( running_device device, running_machine machine)
	689	{
	690	s3c24xx_t *s3c24xx = get_token( device);
	691	screen_device *screen = machine->primary_screen;
	692	s3c24xx->lcd.bitmap[0] = screen->alloc_compatible_bitmap();
	693	s3c24xx->lcd.bitmap[1] = screen->alloc_compatible_bitmap();
	694	}
	695
	696	static void bitmap_blend( bitmap_t bitmap_dst, bitmap_t bitmap_src_1, bitmap_t *bitmap_src_2)
	697	{
	698	for (int y = 0; y < bitmap_dst->height; y++)
	699	{
	700	UINT32 *line0 = BITMAP_ADDR32( bitmap_src_1, y, 0);
	701	UINT32 *line1 = BITMAP_ADDR32( bitmap_src_2, y, 0);
	702	UINT32 *line2 = BITMAP_ADDR32( bitmap_dst, y, 0);
	703	for (int x = 0; x < bitmap_dst->width; x++)
	704	{
	705	UINT32 color0 = line0[x];
	706	UINT32 color1 = line1[x];
	707	UINT16 r0 = (color0 >> 16) & 0x000000ff;
	708	UINT16 g0 = (color0 >> 8) & 0x000000ff;
	709	UINT16 b0 = (color0 >> 0) & 0x000000ff;
	710	UINT16 r1 = (color1 >> 16) & 0x000000ff;
	711	UINT16 g1 = (color1 >> 8) & 0x000000ff;
	712	UINT16 b1 = (color1 >> 0) & 0x000000ff;
	713	UINT8 r = (UINT8)((r0 + r1) >> 1);
	714	UINT8 g = (UINT8)((g0 + g1) >> 1);
	715	UINT8 b = (UINT8)((b0 + b1) >> 1);
	716	line2[x] = (r << 16) \| (g << 8) \| b;
	717	}
	718	}
	719	}
	720
	721	static UINT32 s3c24xx_video_update( running_device device, screen_device screen, bitmap_t bitmap, const rectangle cliprect)
	722	{
	723	s3c24xx_t *s3c24xx = get_token( device);
	724	if (s3c24xx->lcd.framerate >= 1195)
	725	{
	726	bitmap_blend( bitmap, s3c24xx->lcd.bitmap[0], s3c24xx->lcd.bitmap[1]);
	727	copybitmap( s3c24xx->lcd.bitmap[1], s3c24xx->lcd.bitmap[0], 0, 0, 0, 0, cliprect);
	728	}
	729	else
	730	{
	731	copybitmap( bitmap, s3c24xx->lcd.bitmap[0], 0, 0, 0, 0, cliprect);
	732	}
	733	s3c24xx_lcd_dma_init( device);
	734	return 0;
	735	}
	736
	737	READ32_DEVICE_HANDLER( s3c24xx_lcd_r )
	738	{
	739	s3c24xx_t *s3c24xx = get_token( device);
	740	UINT32 data = ((UINT32*)&s3c24xx->lcd.regs)[offset];
	741	switch (offset)
	742	{
	743	case S3C24XX_LCDCON1 :
	744	{
	745	// make sure line counter is going
	746	UINT32 vpos = device->machine->primary_screen->vpos();
	747	if (vpos < s3c24xx->lcd.vpos_min) vpos = s3c24xx->lcd.vpos_min;
	748	if (vpos > s3c24xx->lcd.vpos_max) vpos = s3c24xx->lcd.vpos_max;
	749	data = (data & ~0xFFFC0000) \| ((s3c24xx->lcd.vpos_max - vpos) << 18);
	750	}
	751	break;
	752	case S3C24XX_LCDCON5 :
	753	{
	754	UINT32 vpos = device->machine->primary_screen->vpos();
	755	data = data & ~0x00018000;
	756	if (vpos < s3c24xx->lcd.vpos_min) data = data \| 0x00000000;
	757	if (vpos > s3c24xx->lcd.vpos_max) data = data \| 0x00018000;
	758	// todo: 00 = VSYNC, 01 = BACK Porch, 10 = ACTIVE, 11 = FRONT Porch
	759	}
	760	break;
	761	}
	762	if (offset != S3C24XX_LCDCON5)
	763	verboselog( device->machine, 9, "(LCD) %08X -> %08X\n", S3C24XX_BASE_LCD + (offset << 2), data);
	764	return data;
	765	}
	766
	767	static void s3c24xx_lcd_configure_tft( running_device *device)
	768	{
	769	s3c24xx_t *s3c24xx = get_token( device);
	770	screen_device *screen = device->machine->primary_screen;
	771	UINT32 vspw, vbpd, lineval, vfpd, hspw, hbpd, hfpd, hozval, clkval, hclk;
	772	double framerate, vclk;
	773	UINT32 width, height;
	774	rectangle visarea;
	775	verboselog( device->machine, 5, "s3c24xx_lcd_configure_tft\n");
	776	vspw = BITS( s3c24xx->lcd.regs.lcdcon2, 5, 0);
	777	vbpd = BITS( s3c24xx->lcd.regs.lcdcon2, 31, 24);
	778	lineval = BITS( s3c24xx->lcd.regs.lcdcon2, 23, 14);
	779	vfpd = BITS( s3c24xx->lcd.regs.lcdcon2, 13, 6);
	780	hspw = BITS( s3c24xx->lcd.regs.lcdcon4, 7, 0);
	781	hbpd = BITS( s3c24xx->lcd.regs.lcdcon3, 25, 19);
	782	hfpd = BITS( s3c24xx->lcd.regs.lcdcon3, 7, 0);
	783	hozval = BITS( s3c24xx->lcd.regs.lcdcon3, 18, 8);
	784	clkval = BITS( s3c24xx->lcd.regs.lcdcon1, 17, 8);
	785	hclk = s3c24xx_get_hclk( device);
	786	verboselog( device->machine, 3, "LCD - vspw %d vbpd %d lineval %d vfpd %d hspw %d hbpd %d hfpd %d hozval %d clkval %d hclk %d\n", vspw, vbpd, lineval, vfpd, hspw, hbpd, hfpd, hozval, clkval, hclk);
	787	vclk = (double)(hclk / ((clkval + 1) * 2));
	788	verboselog( device->machine, 3, "LCD - vclk %f\n", vclk);
	789	framerate = vclk / (((vspw + 1) + (vbpd + 1) + (lineval + 1) + (vfpd + 1)) * ((hspw + 1) + (hbpd + 1) + (hozval + 1) + (hfpd + 1)));
	790	verboselog( device->machine, 3, "LCD - framerate %f\n", framerate);
	791	s3c24xx->lcd.framerate = framerate;
	792	width = (hspw + 1) + (hbpd + 1) + (hozval + 1) + (hfpd + 1);
	793	height = (vspw + 1) + (vbpd + 1) + (lineval + 1) + (vfpd + 1);
	794	visarea.min_x = (hspw + 1) + (hbpd + 1);
	795	visarea.min_y = (vspw + 1) + (vbpd + 1);
	796	visarea.max_x = visarea.min_x + (hozval + 1) - 1;
	797	visarea.max_y = visarea.min_y + (lineval + 1) - 1;
	798	verboselog( device->machine, 3, "LCD - visarea min_x %d min_y %d max_x %d max_y %d\n", visarea.min_x, visarea.min_y, visarea.max_x, visarea.max_y);
	799	verboselog( device->machine, 3, "video_screen_configure %d %d %f\n", width, height, s3c24xx->lcd.framerate);
	800	s3c24xx->lcd.hpos_min = (hspw + 1) + (hbpd + 1);
	801	s3c24xx->lcd.hpos_max = s3c24xx->lcd.hpos_min + (hozval + 1) - 1;
	802	s3c24xx->lcd.vpos_min = (vspw + 1) + (vbpd + 1);
	803	s3c24xx->lcd.vpos_max = s3c24xx->lcd.vpos_min + (lineval + 1) - 1;
	804	screen->configure( width, height, visarea, HZ_TO_ATTOSECONDS( s3c24xx->lcd.framerate));
	805	}
	806
	807	static void s3c24xx_lcd_configure_stn( running_device *device)
	808	{
	809	s3c24xx_t *s3c24xx = get_token( device);
	810	screen_device *screen = device->machine->primary_screen;
	811	UINT32 pnrmode, bppmode, clkval, lineval, wdly, hozval, lineblank, wlh, hclk;
	812	double vclk, framerate;
	813	UINT32 width, height;
	814	rectangle visarea;
	815	verboselog( device->machine, 5, "s3c24xx_lcd_configure_stn\n");
	816	pnrmode = BITS( s3c24xx->lcd.regs.lcdcon1, 6, 5);
	817	bppmode = BITS( s3c24xx->lcd.regs.lcdcon1, 4, 1);
	818	clkval = BITS( s3c24xx->lcd.regs.lcdcon1, 17, 8);
	819	lineval = BITS( s3c24xx->lcd.regs.lcdcon2, 23, 14);
	820	wdly = BITS( s3c24xx->lcd.regs.lcdcon3, 20, 19);
	821	hozval = BITS( s3c24xx->lcd.regs.lcdcon3, 18, 8);
	822	lineblank = BITS( s3c24xx->lcd.regs.lcdcon3, 7, 0);
	823	wlh = BITS( s3c24xx->lcd.regs.lcdcon4, 1, 0);
	824	hclk = s3c24xx_get_hclk( device);
	825	verboselog( device->machine, 3, "LCD - pnrmode %d bppmode %d clkval %d lineval %d wdly %d hozval %d lineblank %d wlh %d hclk %d\n", pnrmode, bppmode, clkval, lineval, wdly, hozval, lineblank, wlh, hclk);
	826	vclk = (double)(hclk / ((clkval + 0) * 2));
	827	verboselog( device->machine, 3, "LCD - vclk %f\n", vclk);
	828	framerate = 1 / (((1 / vclk) * (hozval + 1) + (1 / hclk) * ((1 << (4 + wlh)) + (1 << (4 + wdly)) + (lineblank * 8))) * (lineval + 1));
	829	verboselog( device->machine, 3, "LCD - framerate %f\n", framerate);
	830	switch (pnrmode)
	831	{
	832	case S3C24XX_PNRMODE_STN_04_SS : width = ((hozval + 1) * 4); break;
	833	case S3C24XX_PNRMODE_STN_04_DS : width = ((hozval + 1) * 4); break;
	834	case S3C24XX_PNRMODE_STN_08_SS : width = ((hozval + 1) * 8 / 3); break;
	835	default : width = 0; break;
	836	}
	837	height = lineval + 1;
	838	s3c24xx->lcd.framerate = framerate;
	839	visarea.min_x = 0;
	840	visarea.min_y = 0;
	841	visarea.max_x = width - 1;
	842	visarea.max_y = height - 1;
	843	verboselog( device->machine, 3, "LCD - visarea min_x %d min_y %d max_x %d max_y %d\n", visarea.min_x, visarea.min_y, visarea.max_x, visarea.max_y);
	844	verboselog( device->machine, 3, "video_screen_configure %d %d %f\n", width, height, s3c24xx->lcd.framerate);
	845	s3c24xx->lcd.hpos_min = 0;
	846	s3c24xx->lcd.hpos_max = width - 1;
	847	s3c24xx->lcd.vpos_min = 0;
	848	s3c24xx->lcd.vpos_max = height - 1;
	849	screen->configure( width, height, visarea, HZ_TO_ATTOSECONDS( s3c24xx->lcd.framerate));
	850	}
	851
	852	static void s3c24xx_lcd_configure( running_device *device)
	853	{
	854	s3c24xx_t *s3c24xx = get_token( device);
	855	UINT32 bppmode;
	856	verboselog( device->machine, 5, "s3c24xx_lcd_configure\n");
	857	bppmode = BITS( s3c24xx->lcd.regs.lcdcon1, 4, 1);
	858	if ((bppmode & (1 << 3)) == 0)
	859	{
	860	s3c24xx_lcd_configure_stn( device);
	861	}
	862	else
	863	{
	864	s3c24xx_lcd_configure_tft( device);
	865	}
	866	}
	867
	868	static void s3c24xx_lcd_start( running_device *device)
	869	{
	870	s3c24xx_t *s3c24xx = get_token( device);
	871	screen_device *screen = device->machine->primary_screen;
	872	verboselog( device->machine, 1, "LCD start\n");
	873	s3c24xx_lcd_configure( device);
	874	s3c24xx_lcd_dma_init( device);
	875	timer_adjust_oneshot( s3c24xx->lcd.timer, screen->time_until_pos( s3c24xx->lcd.vpos_min, s3c24xx->lcd.hpos_min), 0);
	876	}
	877
	878	static void s3c24xx_lcd_stop( running_device *device)
	879	{
	880	s3c24xx_t *s3c24xx = get_token( device);
	881	verboselog( device->machine, 1, "LCD stop\n");
	882	timer_adjust_oneshot( s3c24xx->lcd.timer, attotime_never, 0);
	883	}
	884
	885	static void s3c24xx_lcd_recalc( running_device *device)
	886	{
	887	s3c24xx_t *s3c24xx = get_token( device);
	888	if (s3c24xx->lcd.regs.lcdcon1 & (1 << 0))
	889	{
	890	s3c24xx_lcd_start( device);
	891	}
	892	else
	893	{
	894	s3c24xx_lcd_stop( device);
	895	}
	896	}
	897
	898	static WRITE32_DEVICE_HANDLER( s3c24xx_lcd_w )
	899	{
	900	s3c24xx_t *s3c24xx = get_token( device);
	901	UINT32 old_value = ((UINT32*)&s3c24xx->lcd.regs)[offset];
	902	verboselog( device->machine, 9, "(LCD) %08X <- %08X\n", S3C24XX_BASE_LCD + (offset << 2), data);
	903	COMBINE_DATA(&((UINT32*)&s3c24xx->lcd.regs)[offset]);
	904	switch (offset)
	905	{
	906	case S3C24XX_LCDCON1 :
	907	{
	908	if ((old_value & (1 << 0)) != (data & (1 << 0)))
	909	{
	910	s3c24xx_lcd_recalc( device);
	911	}
	912	}
	913	break;
	914	}
	915	}
	916
	917	/* LCD Palette */
	918
	919	static READ32_DEVICE_HANDLER( s3c24xx_lcd_palette_r )
	920	{
	921	s3c24xx_t *s3c24xx = get_token( device);
	922	UINT32 data = s3c24xx->lcdpal.regs.data[offset];
	923	verboselog( device->machine, 9, "(LCD) %08X -> %08X\n", S3C24XX_BASE_LCDPAL + (offset << 2), data);
	924	return data;
	925	}
	926
	927	static WRITE32_DEVICE_HANDLER( s3c24xx_lcd_palette_w )
	928	{
	929	s3c24xx_t *s3c24xx = get_token( device);
	930	verboselog( device->machine, 9, "(LCD) %08X <- %08X\n", S3C24XX_BASE_LCDPAL + (offset << 2), data);
	931	COMBINE_DATA(&s3c24xx->lcdpal.regs.data[offset]);
	932	if (mem_mask != 0xffffffff)
	933	{
	934	verboselog( device->machine, 0, "s3c24xx_lcd_palette_w: unknown mask %08x\n", mem_mask);
	935	}
	936	palette_set_color( device->machine, offset, s3c24xx_get_color_tft_16( device, data & 0xFFFF));
	937	}
	938
	939	/* Clock & Power Management */
	940
	941	static UINT32 s3c24xx_get_fclk( running_device *device)
	942	{
	943	s3c24xx_t *s3c24xx = get_token( device);
	944	UINT32 data, mdiv, pdiv, sdiv;
	945	data = s3c24xx->clkpow.regs.mpllcon;
	946	mdiv = BITS( data, 19, 12);
	947	pdiv = BITS( data, 9, 4);
	948	sdiv = BITS( data, 1, 0);
	949	#if defined(DEVICE_S3C2400) \|\| defined(DEVICE_S3C2410)
	950	return (UINT32)((double)(1 * (mdiv + 8) * device->clock()) / (double)((pdiv + 2) * (1 << sdiv)));
	951	#else
	952	return (UINT32)((double)(2 * (mdiv + 8) * device->clock()) / (double)((pdiv + 2) * (1 << sdiv)));
	953	#endif
	954	}
	955
	956	static UINT32 s3c24xx_get_hclk( running_device *device)
	957	{
	958	s3c24xx_t *s3c24xx = get_token( device);
	959	#if defined(DEVICE_S3C2400) \|\| defined(DEVICE_S3C2410)
	960	return s3c24xx_get_fclk( device) / (BIT( s3c24xx->clkpow.regs.clkdivn, 1) + 1);
	961	#else
	962	switch (BITS( s3c24xx->clkpow.regs.clkdivn, 2, 1))
	963	{
	964	case 0 : return s3c24xx_get_fclk( device) / 1;
	965	case 1 : return s3c24xx_get_fclk( device) / 2;
	966	case 2 : return s3c24xx_get_fclk( device) / (4 * (BIT( s3c24xx->clkpow.regs.camdivn, 9) + 1));
	967	case 3 : return s3c24xx_get_fclk( device) / (3 * (BIT( s3c24xx->clkpow.regs.camdivn, 8) + 1));
	968	}
	969	return 0;
	970	#endif
	971	}
	972
	973	static UINT32 s3c24xx_get_pclk( running_device *device)
	974	{
	975	s3c24xx_t *s3c24xx = get_token( device);
	976	return s3c24xx_get_hclk( device) / (1 << BIT( s3c24xx->clkpow.regs.clkdivn, 0));
	977	}
	978
	979	static READ32_DEVICE_HANDLER( s3c24xx_clkpow_r )
	980	{
	981	s3c24xx_t *s3c24xx = get_token( device);
	982	UINT32 data = ((UINT32*)&s3c24xx->clkpow.regs)[offset];
	983	verboselog( device->machine, 9, "(CLKPOW) %08X -> %08X\n", S3C24XX_BASE_CLKPOW + (offset << 2), data);
	984	return data;
	985	}
	986
	987	static WRITE32_DEVICE_HANDLER( s3c24xx_clkpow_w )
	988	{
	989	s3c24xx_t *s3c24xx = get_token( device);
	990	verboselog( device->machine, 9, "(CLKPOW) %08X <- %08X\n", S3C24XX_BASE_CLKPOW + (offset << 2), data);
	991	COMBINE_DATA(&((UINT32*)&s3c24xx->clkpow.regs)[offset]);
	992	switch (offset)
	993	{
	994	case S3C24XX_MPLLCON :
	995	{
	996	verboselog( device->machine, 5, "CLKPOW - fclk %d hclk %d pclk %d\n", s3c24xx_get_fclk( device), s3c24xx_get_hclk( device), s3c24xx_get_pclk( device));
	997	cputag_set_clock( device->machine, "maincpu", s3c24xx_get_fclk( device) * CLOCK_MULTIPLIER);
	998	}
	999	break;
	1000	}
	1001	}
	1002
	1003	/* Interrupt Controller */
	1004
	1005	static void s3c24xx_check_pending_irq( running_device *device)
	1006	{
	1007	s3c24xx_t *s3c24xx = get_token( device);
	1008	UINT32 temp = s3c24xx->irq.regs.srcpnd & ~s3c24xx->irq.regs.intmsk;
	1009	if (temp != 0)
	1010	{
	1011	UINT32 int_type = 0;
	1012	while ((temp & 1) == 0)
	1013	{
	1014	int_type++;
	1015	temp = temp >> 1;
	1016	}
	1017	s3c24xx->irq.regs.intpnd \|= (1 << int_type);
	1018	s3c24xx->irq.regs.intoffset = int_type;
	1019	cputag_set_input_line( device->machine, "maincpu", ARM7_IRQ_LINE, ASSERT_LINE);
	1020	}
	1021	else
	1022	{
	1023	cputag_set_input_line( device->machine, "maincpu", ARM7_IRQ_LINE, CLEAR_LINE);
	1024	}
	1025	}
	1026
	1027	static void s3c24xx_request_irq( running_device *device, UINT32 int_type)
	1028	{
	1029	s3c24xx_t *s3c24xx = get_token( device);
	1030	verboselog( device->machine, 5, "request irq %d\n", int_type);
	1031	s3c24xx->irq.regs.srcpnd \|= (1 << int_type);
	1032	s3c24xx_check_pending_irq( device);
	1033	}
	1034
	1035	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	1036
	1037	static void s3c24xx_check_pending_subirq( running_device *device)
	1038	{
	1039	s3c24xx_t *s3c24xx = get_token( device);
	1040	UINT32 temp = s3c24xx->irq.regs.subsrcpnd & ~s3c24xx->irq.regs.intsubmsk;
	1041	if (temp != 0)
	1042	{
	1043	UINT32 int_type = 0;
	1044	while ((temp & 1) == 0)
	1045	{
	1046	int_type++;
	1047	temp = temp >> 1;
	1048	}
	1049	s3c24xx_request_irq( device, MAP_SUBINT_TO_INT[int_type]);
	1050	}
	1051	}
	1052
	1053	ATTR_UNUSED static void s3c24xx_request_subirq( running_device *device, UINT32 int_type)
	1054	{
	1055	s3c24xx_t *s3c24xx = get_token( device);
	1056	verboselog( device->machine, 5, "request subirq %d\n", int_type);
	1057	s3c24xx->irq.regs.subsrcpnd \|= (1 << int_type);
	1058	s3c24xx_check_pending_subirq( device);
	1059	}
	1060
	1061	static void s3c24xx_check_pending_eint( running_device *device)
	1062	{
	1063	s3c24xx_t *s3c24xx = get_token( device);
	1064	UINT32 temp = s3c24xx->gpio.regs.eintpend & ~s3c24xx->gpio.regs.eintmask;
	1065	if (temp != 0)
	1066	{
	1067	UINT32 int_type = 0;
	1068	while ((temp & 1) == 0)
	1069	{
	1070	int_type++;
	1071	temp = temp >> 1;
	1072	}
	1073	if (int_type < 8)
	1074	{
	1075	s3c24xx_request_irq( device, S3C24XX_INT_EINT4_7);
	1076	}
	1077	else
	1078	{
	1079	s3c24xx_request_irq( device, S3C24XX_INT_EINT8_23);
	1080	}
	1081	}
	1082	}
	1083
	1084	ATTR_UNUSED static void s3c24xx_request_eint( running_device *device, UINT32 number)
	1085	{
	1086	s3c24xx_t *s3c24xx = get_token( device);
	1087	verboselog( device->machine, 5, "request external interrupt %d\n", number);
	1088	if (number < 4)
	1089	{
	1090	s3c24xx_request_irq( device, S3C24XX_INT_EINT0 + number);
	1091	}
	1092	else
	1093	{
	1094	s3c24xx->gpio.regs.eintpend \|= (1 << number);
	1095	s3c24xx_check_pending_eint( device);
	1096	}
	1097	}
	1098
	1099	#endif
	1100
	1101	static READ32_DEVICE_HANDLER( s3c24xx_irq_r )
	1102	{
	1103	s3c24xx_t *s3c24xx = get_token( device);
	1104	UINT32 data = ((UINT32*)&s3c24xx->irq.regs)[offset];
	1105	verboselog( device->machine, 9, "(IRQ) %08X -> %08X\n", S3C24XX_BASE_INT + (offset << 2), data);
	1106	return data;
	1107	}
	1108
	1109	static WRITE32_DEVICE_HANDLER( s3c24xx_irq_w )
	1110	{
	1111	s3c24xx_t *s3c24xx = get_token( device);
	1112	UINT32 old_value = ((UINT32*)&s3c24xx->irq.regs)[offset];
	1113	verboselog( device->machine, 9, "(IRQ) %08X <- %08X\n", S3C24XX_BASE_INT + (offset << 2), data);
	1114	COMBINE_DATA(&((UINT32*)&s3c24xx->irq.regs)[offset]);
	1115	switch (offset)
	1116	{
	1117	case S3C24XX_SRCPND :
	1118	{
	1119	s3c24xx->irq.regs.srcpnd = (old_value & ~data); // clear only the bit positions of SRCPND corresponding to those set to one in the data
	1120	s3c24xx_check_pending_irq( device);
	1121	}
	1122	break;
	1123	case S3C24XX_INTMSK :
	1124	{
	1125	s3c24xx_check_pending_irq( device);
	1126	}
	1127	break;
	1128	case S3C24XX_INTPND :
	1129	{
	1130	s3c24xx->irq.regs.intpnd = (old_value & ~data); // clear only the bit positions of INTPND corresponding to those set to one in the data
	1131	}
	1132	break;
	1133	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	1134	case S3C24XX_SUBSRCPND :
	1135	{
	1136	s3c24xx->irq.regs.subsrcpnd = (old_value & ~data); // clear only the bit positions of SRCPND corresponding to those set to one in the data
	1137	s3c24xx_check_pending_subirq( device);
	1138	}
	1139	break;
	1140	case S3C24XX_INTSUBMSK :
	1141	{
	1142	s3c24xx_check_pending_subirq( device);
	1143	}
	1144	break;
	1145	#endif
	1146	}
	1147	}
	1148
	1149	/* PWM Timer */
	1150
	1151	static UINT16 s3c24xx_pwm_calc_observation( running_device *device, int ch)
	1152	{
	1153	s3c24xx_t *s3c24xx = get_token( device);
	1154	double timeleft, x1, x2;
	1155	UINT32 cnto;
	1156	timeleft = attotime_to_double( timer_timeleft( s3c24xx->pwm.timer[ch]));
	1157	// printf( "timeleft %f freq %d cntb %d cmpb %d\n", timeleft, s3c24xx->pwm.freq[ch], s3c24xx->pwm.cnt[ch], s3c24xx->pwm.cmp[ch]);
	1158	x1 = 1 / ((double)s3c24xx->pwm.freq[ch] / (s3c24xx->pwm.cnt[ch]- s3c24xx->pwm.cmp[ch] + 1));
	1159	x2 = x1 / timeleft;
	1160	// printf( "x1 %f\n", x1);
	1161	cnto = s3c24xx->pwm.cmp[ch] + ((s3c24xx->pwm.cnt[ch]- s3c24xx->pwm.cmp[ch]) / x2);
	1162	// printf( "cnto %d\n", cnto);
	1163	return cnto;
	1164	}
	1165
	1166	static READ32_DEVICE_HANDLER( s3c24xx_pwm_r )
	1167	{
	1168	s3c24xx_t *s3c24xx = get_token( device);
	1169	UINT32 data = ((UINT32*)&s3c24xx->pwm.regs)[offset];
	1170	switch (offset)
	1171	{
	1172	case S3C24XX_TCNTO0 :
	1173	{
	1174	data = (data & ~0x0000FFFF) \| s3c24xx_pwm_calc_observation( device, 0);
	1175	}
	1176	break;
	1177	case S3C24XX_TCNTO1 :
	1178	{
	1179	data = (data & ~0x0000FFFF) \| s3c24xx_pwm_calc_observation( device, 1);
	1180	}
	1181	break;
	1182	case S3C24XX_TCNTO2 :
	1183	{
	1184	data = (data & ~0x0000FFFF) \| s3c24xx_pwm_calc_observation( device, 2);
	1185	}
	1186	break;
	1187	case S3C24XX_TCNTO3 :
	1188	{
	1189	data = (data & ~0x0000FFFF) \| s3c24xx_pwm_calc_observation( device, 3);
	1190	}
	1191	break;
	1192	case S3C24XX_TCNTO4 :
	1193	{
	1194	data = (data & ~0x0000FFFF) \| s3c24xx_pwm_calc_observation( device, 4);
	1195	}
	1196	break;
	1197	}
	1198	verboselog( device->machine, 9, "(PWM) %08X -> %08X\n", S3C24XX_BASE_PWM + (offset << 2), data);
	1199	return data;
	1200	}
	1201
	1202	static void s3c24xx_pwm_start( running_device *device, int timer)
	1203	{
	1204	s3c24xx_t *s3c24xx = get_token( device);
	1205	const int mux_table[] = { 2, 4, 8, 16};
	1206	const int prescaler_shift[] = { 0, 0, 8, 8, 8};
	1207	const int mux_shift[] = { 0, 4, 8, 12, 16};
	1208	UINT32 pclk, prescaler, mux, cnt, cmp, auto_reload;
	1209	double freq, hz;
	1210	verboselog( device->machine, 1, "PWM %d start\n", timer);
	1211	pclk = s3c24xx_get_pclk( device);
	1212	prescaler = (s3c24xx->pwm.regs.tcfg0 >> prescaler_shift[timer]) & 0xFF;
	1213	mux = (s3c24xx->pwm.regs.tcfg1 >> mux_shift[timer]) & 0x0F;
	1214	if (mux < 4)
	1215	{
	1216	freq = (double)pclk / (prescaler + 1) / mux_table[mux];
	1217	}
	1218	else
	1219	{
	1220	// todo
	1221	freq = (double)pclk / (prescaler + 1) / 1;
	1222	}
	1223	switch (timer)
	1224	{
	1225	case 0 :
	1226	{
	1227	cnt = BITS( s3c24xx->pwm.regs.tcntb0, 15, 0);
	1228	cmp = BITS( s3c24xx->pwm.regs.tcmpb0, 15, 0);
	1229	auto_reload = BIT( s3c24xx->pwm.regs.tcon, 3);
	1230	}
	1231	break;
	1232	case 1 :
	1233	{
	1234	cnt = BITS( s3c24xx->pwm.regs.tcntb1, 15, 0);
	1235	cmp = BITS( s3c24xx->pwm.regs.tcmpb1, 15, 0);
	1236	auto_reload = BIT( s3c24xx->pwm.regs.tcon, 11);
	1237	}
	1238	break;
	1239	case 2 :
	1240	{
	1241	cnt = BITS( s3c24xx->pwm.regs.tcntb2, 15, 0);
	1242	cmp = BITS( s3c24xx->pwm.regs.tcmpb2, 15, 0);
	1243	auto_reload = BIT( s3c24xx->pwm.regs.tcon, 15);
	1244	}
	1245	break;
	1246	case 3 :
	1247	{
	1248	cnt = BITS( s3c24xx->pwm.regs.tcntb3, 15, 0);
	1249	cmp = BITS( s3c24xx->pwm.regs.tcmpb3, 15, 0);
	1250	auto_reload = BIT( s3c24xx->pwm.regs.tcon, 19);
	1251	}
	1252	break;
	1253	case 4 :
	1254	{
	1255	cnt = BITS( s3c24xx->pwm.regs.tcntb4, 15, 0);
	1256	cmp = 0;
	1257	auto_reload = BIT( s3c24xx->pwm.regs.tcon, 22);
	1258	}
	1259	break;
	1260	default :
	1261	{
	1262	cnt = cmp = auto_reload = 0;
	1263	}
	1264	break;
	1265	}
	1266	// hz = freq / (cnt - cmp + 1);
	1267	if (cnt < 2)
	1268	{
	1269	hz = freq;
	1270	}
	1271	else
	1272	{
	1273	hz = freq / cnt;
	1274	}
	1275	verboselog( device->machine, 5, "PWM %d - pclk=%d prescaler=%d div=%d freq=%f cnt=%d cmp=%d auto_reload=%d hz=%f\n", timer, pclk, prescaler, mux_table[mux], freq, cnt, cmp, auto_reload, hz);
	1276	s3c24xx->pwm.cnt[timer] = cnt;
	1277	s3c24xx->pwm.cmp[timer] = cmp;
	1278	s3c24xx->pwm.freq[timer] = freq;
	1279	if (auto_reload)
	1280	{
	1281	timer_adjust_periodic( s3c24xx->pwm.timer[timer], ATTOTIME_IN_HZ( hz), timer, ATTOTIME_IN_HZ( hz));
	1282	}
	1283	else
	1284	{
	1285	timer_adjust_oneshot( s3c24xx->pwm.timer[timer], ATTOTIME_IN_HZ( hz), timer);
	1286	}
	1287	}
	1288
	1289	static void s3c24xx_pwm_stop( running_device *device, int timer)
	1290	{
	1291	s3c24xx_t *s3c24xx = get_token( device);
	1292	verboselog( device->machine, 1, "PWM %d stop\n", timer);
	1293	timer_adjust_oneshot( s3c24xx->pwm.timer[timer], attotime_never, 0);
	1294	}
	1295
	1296	static void s3c24xx_pwm_recalc( running_device *device, int timer)
	1297	{
	1298	s3c24xx_t *s3c24xx = get_token( device);
	1299	const int tcon_shift[] = { 0, 8, 12, 16, 20};
	1300	if (s3c24xx->pwm.regs.tcon & (1 << tcon_shift[timer]))
	1301	{
	1302	s3c24xx_pwm_start( device, timer);
	1303	}
	1304	else
	1305	{
	1306	s3c24xx_pwm_stop( device, timer);
	1307	}
	1308	}
	1309
	1310	static WRITE32_DEVICE_HANDLER( s3c24xx_pwm_w )
	1311	{
	1312	s3c24xx_t *s3c24xx = get_token( device);
	1313	UINT32 old_value = ((UINT32*)&s3c24xx->pwm.regs)[offset];
	1314	verboselog( device->machine, 9, "(PWM) %08X <- %08X\n", S3C24XX_BASE_PWM + (offset << 2), data);
	1315	COMBINE_DATA(&((UINT32*)&s3c24xx->pwm.regs)[offset]);
	1316	switch (offset)
	1317	{
	1318	case S3C24XX_TCON :
	1319	{
	1320	if ((data & (1 << 0)) != (old_value & (1 << 0)))
	1321	{
	1322	s3c24xx_pwm_recalc( device, 0);
	1323	}
	1324	if ((data & (1 << 8)) != (old_value & (1 << 8)))
	1325	{
	1326	s3c24xx_pwm_recalc( device, 1);
	1327	}
	1328	if ((data & (1 << 12)) != (old_value & (1 << 12)))
	1329	{
	1330	s3c24xx_pwm_recalc( device, 2);
	1331	}
	1332	if ((data & (1 << 16)) != (old_value & (1 << 16)))
	1333	{
	1334	s3c24xx_pwm_recalc( device, 3);
	1335	}
	1336	if ((data & (1 << 20)) != (old_value & (1 << 20)))
	1337	{
	1338	s3c24xx_pwm_recalc( device, 4);
	1339	}
	1340	}
	1341	break;
	1342	}
	1343	}
	1344
	1345	static TIMER_CALLBACK( s3c24xx_pwm_timer_exp )
	1346	{
	1347	running_device device = (running_device )ptr;
	1348	s3c24xx_t *s3c24xx = get_token( device);
	1349	int ch = param;
	1350	const int ch_int[] = { S3C24XX_INT_TIMER0, S3C24XX_INT_TIMER1, S3C24XX_INT_TIMER2, S3C24XX_INT_TIMER3, S3C24XX_INT_TIMER4 };
	1351	verboselog( machine, 2, "PWM %d timer callback\n", ch);
	1352	if (BITS( s3c24xx->pwm.regs.tcfg1, 23, 20) == (ch + 1))
	1353	{
	1354	s3c24xx_dma_request_pwm( device);
	1355	}
	1356	else
	1357	{
	1358	s3c24xx_request_irq( device, ch_int[ch]);
	1359	}
	1360	}
	1361
	1362	/* DMA */
	1363
	1364	static void s3c24xx_dma_reload( running_device *device, int ch)
	1365	{
	1366	s3c24xx_t *s3c24xx = get_token( device);
	1367	s3c24xx_dma_regs_t *regs = &s3c24xx->dma[ch].regs;
	1368	regs->dstat = S3C24XX_DSTAT_SET_CURR_TC( regs->dstat, S3C24XX_DCON_GET_TC( regs->dcon));
	1369	regs->dcsrc = S3C24XX_DCSRC_SET_CURR_SRC( regs->dcsrc, S3C24XX_DISRC_GET_SADDR( regs->disrc));
	1370	regs->dcdst = S3C24XX_DCDST_SET_CURR_DST( regs->dcdst, S3C24XX_DIDST_GET_DADDR( regs->didst));
	1371	}
	1372
	1373	static void s3c24xx_dma_trigger( running_device *device, int ch)
	1374	{
	1375	s3c24xx_t *s3c24xx = get_token( device);
	1376	s3c24xx_dma_regs_t *regs = &s3c24xx->dma[ch].regs;
	1377	UINT32 curr_tc, curr_src, curr_dst;
	1378	address_space *space = cputag_get_address_space( device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1379	int dsz, inc_src, inc_dst, servmode, tsz;
	1380	const UINT32 ch_int[] = { S3C24XX_INT_DMA0, S3C24XX_INT_DMA1, S3C24XX_INT_DMA2, S3C24XX_INT_DMA3};
	1381	verboselog( device->machine, 5, "DMA %d trigger\n", ch);
	1382	curr_tc = S3C24XX_DSTAT_GET_CURR_TC( regs->dstat);
	1383	dsz = S3C24XX_DCON_GET_DSZ( regs->dcon);
	1384	curr_src = S3C24XX_DCSRC_GET_CURR_SRC( regs->dcsrc);
	1385	curr_dst = S3C24XX_DCDST_GET_CURR_DST( regs->dcdst);
	1386	servmode = S3C24XX_DCON_GET_SERVMODE( regs->dcon);
	1387	tsz = S3C24XX_DCON_GET_TSZ( regs->dcon);
	1388	#if defined(DEVICE_S3C2400)
	1389	inc_src = BIT( regs->disrc, 29);
	1390	inc_dst = BIT( regs->didst, 29);
	1391	#else
	1392	inc_src = BIT( regs->disrcc, 0);
	1393	inc_dst = BIT( regs->didstc, 0);
	1394	#endif
	1395	verboselog( device->machine, 5, "DMA %d - curr_src %08X curr_dst %08X curr_tc %d dsz %d\n", ch, curr_src, curr_dst, curr_tc, dsz);
	1396	while (curr_tc > 0)
	1397	{
	1398	curr_tc--;
	1399	for (int i = 0; i < 1 << (tsz << 1); i++)
	1400	{
	1401	switch (dsz)
	1402	{
	1403	case 0 : space->write_byte( curr_dst, space->read_byte( curr_src)); break;
	1404	case 1 : space->write_word( curr_dst, space->read_word( curr_src)); break;
	1405	case 2 : space->write_dword( curr_dst, space->read_dword( curr_src)); break;
	1406	}
	1407	if (inc_src == 0) curr_src += (1 << dsz);
	1408	if (inc_dst == 0) curr_dst += (1 << dsz);
	1409	}
	1410	if (servmode == 0) break;
	1411	}
	1412	regs->dcsrc = S3C24XX_DCSRC_SET_CURR_SRC( regs->dcsrc, curr_src);
	1413	regs->dcdst = S3C24XX_DCDST_SET_CURR_DST( regs->dcdst, curr_dst);
	1414	regs->dstat = S3C24XX_DSTAT_SET_CURR_TC( regs->dstat, curr_tc);
	1415	if (curr_tc == 0)
	1416	{
	1417	if (S3C24XX_DCON_GET_RELOAD( regs->dcon) == 0)
	1418	{
	1419	s3c24xx_dma_reload( device, ch);
	1420	}
	1421	else
	1422	{
	1423	regs->dmasktrig &= ~(1 << 1); // clear on/off
	1424	}
	1425	if (S3C24XX_DCON_GET_INT( regs->dcon) != 0)
	1426	{
	1427	s3c24xx_request_irq( device, ch_int[ch]);
	1428	}
	1429	}
	1430	}
	1431
	1432	static void s3c24xx_dma_request_iis( running_device *device)
	1433	{
	1434	s3c24xx_t *s3c24xx = get_token( device);
	1435	s3c24xx_dma_regs_t *regs = &s3c24xx->dma[2].regs;
	1436	verboselog( device->machine, 5, "s3c24xx_dma_request_iis\n");
	1437	if ((S3C24XX_DMASKTRIG_GET_ON_OFF( regs->dmasktrig) != 0) && (S3C24XX_DCON_GET_SWHWSEL( regs->dcon) != 0) && (S3C24XX_DCON_GET_HWSRCSEL( regs->dcon) == 0))
	1438	{
	1439	s3c24xx_dma_trigger( device, 2);
	1440	}
	1441	}
	1442
	1443	static void s3c24xx_dma_request_pwm( running_device *device)
	1444	{
	1445	s3c24xx_t *s3c24xx = get_token( device);
	1446	verboselog( device->machine, 5, "s3c24xx_dma_request_pwm\n");
	1447	for (int i = 0; i < 4; i++)
	1448	{
	1449	if (i != 1)
	1450	{
	1451	s3c24xx_dma_regs_t *regs = &s3c24xx->dma[i].regs;
	1452	if ((S3C24XX_DMASKTRIG_GET_ON_OFF( regs->dmasktrig) != 0) && (S3C24XX_DCON_GET_SWHWSEL( regs->dcon) != 0) && (S3C24XX_DCON_GET_HWSRCSEL( regs->dcon) == 3))
	1453	{
	1454	s3c24xx_dma_trigger( device, i);
	1455	}
	1456	}
	1457	}
	1458	}
	1459
	1460	static void s3c24xx_dma_start( running_device *device, int ch)
	1461	{
	1462	s3c24xx_t *s3c24xx = get_token( device);
	1463	UINT32 addr_src, addr_dst, tc;
	1464	s3c24xx_dma_regs_t *regs = &s3c24xx->dma[ch].regs;
	1465	UINT32 dsz, tsz, reload;
	1466	int inc_src, inc_dst, _int, servmode, swhwsel, hwsrcsel;
	1467	verboselog( device->machine, 1, "DMA %d start\n", ch);
	1468	addr_src = S3C24XX_DISRC_GET_SADDR( regs->disrc);
	1469	addr_dst = S3C24XX_DIDST_GET_DADDR( regs->didst);
	1470	tc = S3C24XX_DCON_GET_TC( regs->dcon);
	1471	_int = S3C24XX_DCON_GET_INT( regs->dcon);
	1472	servmode = S3C24XX_DCON_GET_SERVMODE( regs->dcon);
	1473	hwsrcsel = S3C24XX_DCON_GET_HWSRCSEL( regs->dcon);
	1474	swhwsel = S3C24XX_DCON_GET_SWHWSEL( regs->dcon);
	1475	reload = S3C24XX_DCON_GET_RELOAD( regs->dcon);
	1476	dsz = S3C24XX_DCON_GET_DSZ( regs->dcon);
	1477	tsz = S3C24XX_DCON_GET_TSZ( regs->dcon);
	1478	#if defined(DEVICE_S3C2400)
	1479	inc_src = BIT( regs->disrc, 29);
	1480	inc_dst = BIT( regs->didst, 29);
	1481	#else
	1482	inc_src = BIT( regs->disrcc, 0);
	1483	inc_dst = BIT( regs->didstc, 0);
	1484	#endif
	1485	verboselog( device->machine, 5, "DMA %d - addr_src %08X inc_src %d addr_dst %08X inc_dst %d int %d tsz %d servmode %d hwsrcsel %d swhwsel %d reload %d dsz %d tc %d\n", ch, addr_src, inc_src, addr_dst, inc_dst, _int, tsz, servmode, hwsrcsel, swhwsel, reload, dsz, tc);
	1486	verboselog( device->machine, 5, "DMA %d - copy %08X bytes from %08X (%s) to %08X (%s)\n", ch, (tc << dsz) << (tsz << 1), addr_src, inc_src ? "fix" : "inc", addr_dst, inc_dst ? "fix" : "inc");
	1487	s3c24xx_dma_reload( device, ch);
	1488	if (swhwsel == 0)
	1489	{
	1490	s3c24xx_dma_trigger( device, ch);
	1491	}
	1492	}
	1493
	1494	static void s3c24xx_dma_stop( running_device *device, int ch)
	1495	{
	1496	verboselog( device->machine, 1, "DMA %d stop\n", ch);
	1497	}
	1498
	1499	static void s3c24xx_dma_recalc( running_device *device, int ch)
	1500	{
	1501	s3c24xx_t *s3c24xx = get_token( device);
	1502	if ((s3c24xx->dma[ch].regs.dmasktrig & (1 << 1)) != 0)
	1503	{
	1504	s3c24xx_dma_start( device, ch);
	1505	}
	1506	else
	1507	{
	1508	s3c24xx_dma_stop( device, ch);
	1509	}
	1510	}
	1511
	1512	static UINT32 s3c24xx_dma_r( running_device *device, UINT32 ch, UINT32 offset)
	1513	{
	1514	s3c24xx_t *s3c24xx = get_token( device);
	1515	return ((UINT32*)&s3c24xx->dma[ch].regs)[offset];
	1516	}
	1517
	1518	static void s3c24xx_dma_w( running_device *device, UINT32 ch, UINT32 offset, UINT32 data, UINT32 mem_mask)
	1519	{
	1520	s3c24xx_t *s3c24xx = get_token( device);
	1521	UINT32 old_value = ((UINT32*)&s3c24xx->dma[ch].regs)[offset];
	1522	COMBINE_DATA(&((UINT32*)&s3c24xx->dma[ch].regs)[offset]);
	1523	switch (offset)
	1524	{
	1525	case S3C24XX_DCON :
	1526	{
	1527	/* --- is this code necessary ???
	1528	if ((data & (1 << 22)) != 0) // reload
	1529	{
	1530	s3c24xx_dma_regs_t *regs = &s3c24xx->dma[ch].regs;
	1531	regs->dmasktrig &= ~(1 << 1); // clear on/off
	1532	}
	1533	*/
	1534	}
	1535	break;
	1536	case S3C24XX_DMASKTRIG :
	1537	{
	1538	if ((old_value & (1 << 1)) != (data & (1 << 1)))
	1539	{
	1540	s3c24xx_dma_recalc( device, ch);
	1541	}
	1542	}
	1543	break;
	1544	}
	1545	}
	1546
	1547	static READ32_DEVICE_HANDLER( s3c24xx_dma_0_r )
	1548	{
	1549	UINT32 data = s3c24xx_dma_r( device, 0, offset);
	1550	verboselog( device->machine, 9, "(DMA 0) %08X -> %08X\n", S3C24XX_BASE_DMA_0 + (offset << 2), data);
	1551	return data;
	1552	}
	1553
	1554	static READ32_DEVICE_HANDLER( s3c24xx_dma_1_r )
	1555	{
	1556	UINT32 data = s3c24xx_dma_r( device, 1, offset);
	1557	verboselog( device->machine, 9, "(DMA 1) %08X -> %08X\n", S3C24XX_BASE_DMA_1 + (offset << 2), data);
	1558	return data;
	1559	}
	1560
	1561	static READ32_DEVICE_HANDLER( s3c24xx_dma_2_r )
	1562	{
	1563	UINT32 data = s3c24xx_dma_r( device, 2, offset);
	1564	verboselog( device->machine, 9, "(DMA 2) %08X -> %08X\n", S3C24XX_BASE_DMA_2 + (offset << 2), data);
	1565	return data;
	1566	}
	1567
	1568	static READ32_DEVICE_HANDLER( s3c24xx_dma_3_r )
	1569	{
	1570	UINT32 data = s3c24xx_dma_r( device, 3, offset);
	1571	verboselog( device->machine, 9, "(DMA 3) %08X -> %08X\n", S3C24XX_BASE_DMA_3 + (offset << 2), data);
	1572	return data;
	1573	}
	1574
	1575	static WRITE32_DEVICE_HANDLER( s3c24xx_dma_0_w )
	1576	{
	1577	verboselog( device->machine, 9, "(DMA 0) %08X <- %08X\n", S3C24XX_BASE_DMA_0 + (offset << 2), data);
	1578	s3c24xx_dma_w( device, 0, offset, data, mem_mask);
	1579	}
	1580
	1581	static WRITE32_DEVICE_HANDLER( s3c24xx_dma_1_w )
	1582	{
	1583	verboselog( device->machine, 9, "(DMA 1) %08X <- %08X\n", S3C24XX_BASE_DMA_1 + (offset << 2), data);
	1584	s3c24xx_dma_w( device, 1, offset, data, mem_mask);
	1585	}
	1586
	1587	static WRITE32_DEVICE_HANDLER( s3c24xx_dma_2_w )
	1588	{
	1589	verboselog( device->machine, 9, "(DMA 2) %08X <- %08X\n", S3C24XX_BASE_DMA_2 + (offset << 2), data);
	1590	s3c24xx_dma_w( device, 2, offset, data, mem_mask);
	1591	}
	1592
	1593	static WRITE32_DEVICE_HANDLER( s3c24xx_dma_3_w )
	1594	{
	1595	verboselog( device->machine, 9, "(DMA 3) %08X <- %08X\n", S3C24XX_BASE_DMA_3 + (offset << 2), data);
	1596	s3c24xx_dma_w( device, 3, offset, data, mem_mask);
	1597	}
	1598
	1599	static TIMER_CALLBACK( s3c24xx_dma_timer_exp )
	1600	{
	1601	int ch = param;
	1602	verboselog( machine, 2, "DMA %d timer callback\n", ch);
	1603	}
	1604
	1605	/* I/O Port */
	1606
	1607	INLINE UINT32 iface_gpio_port_r( running_device *device, int port)
	1608	{
	1609	s3c24xx_t *s3c24xx = get_token( device);
	1610	if (s3c24xx->iface->gpio.port_r)
	1611	{
	1612	return (s3c24xx->iface->gpio.port_r)( device, port);
	1613	}
	1614	else
	1615	{
	1616	return 0;
	1617	}
	1618	}
	1619
	1620	INLINE void iface_gpio_port_w( running_device *device, int port, UINT32 data)
	1621	{
	1622	s3c24xx_t *s3c24xx = get_token( device);
	1623	if (s3c24xx->iface->gpio.port_w)
	1624	{
	1625	(s3c24xx->iface->gpio.port_w)( device, port, data);
	1626	}
	1627	}
	1628
	1629	static READ32_DEVICE_HANDLER( s3c24xx_gpio_r )
	1630	{
	1631	s3c24xx_t *s3c24xx = get_token( device);
	1632	UINT32 data = ((UINT32*)&s3c24xx->gpio.regs)[offset];
	1633	switch (offset)
	1634	{
	1635	case S3C24XX_GPADAT :
	1636	{
	1637	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_A) & S3C24XX_GPADAT_MASK;
	1638	}
	1639	break;
	1640	case S3C24XX_GPBDAT :
	1641	{
	1642	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_B) & S3C24XX_GPBDAT_MASK;
	1643	}
	1644	break;
	1645	case S3C24XX_GPCDAT :
	1646	{
	1647	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_C) & S3C24XX_GPCDAT_MASK;
	1648	}
	1649	break;
	1650	case S3C24XX_GPDDAT :
	1651	{
	1652	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_D) & S3C24XX_GPDDAT_MASK;
	1653	}
	1654	break;
	1655	case S3C24XX_GPEDAT :
	1656	{
	1657	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_E) & S3C24XX_GPEDAT_MASK;
	1658	}
	1659	break;
	1660	case S3C24XX_GPFDAT :
	1661	{
	1662	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_F) & S3C24XX_GPFDAT_MASK;
	1663	}
	1664	break;
	1665	case S3C24XX_GPGDAT :
	1666	{
	1667	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_G) & S3C24XX_GPGDAT_MASK;
	1668	}
	1669	break;
	1670	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	1671	case S3C24XX_GPHDAT :
	1672	{
	1673	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_H) & S3C24XX_GPHDAT_MASK;
	1674	}
	1675	break;
	1676	#endif
	1677	#if defined(DEVICE_S3C2440)
	1678	case S3C24XX_GPJDAT :
	1679	{
	1680	data = iface_gpio_port_r( device, S3C24XX_GPIO_PORT_J) & S3C24XX_GPJDAT_MASK;
	1681	}
	1682	break;
	1683	#endif
	1684	}
	1685	verboselog( device->machine, 9, "(GPIO) %08X -> %08X\n", S3C24XX_BASE_GPIO + (offset << 2), data);
	1686	return data;
	1687	}
	1688
	1689	static WRITE32_DEVICE_HANDLER( s3c24xx_gpio_w )
	1690	{
	1691	s3c24xx_t *s3c24xx = get_token( device);
	1692	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	1693	UINT32 old_value = ((UINT32*)&s3c24xx->gpio.regs)[offset];
	1694	#endif
	1695	verboselog( device->machine, 9, "(GPIO) %08X <- %08X\n", S3C24XX_BASE_GPIO + (offset << 2), data);
	1696	COMBINE_DATA(&((UINT32*)&s3c24xx->gpio.regs)[offset]);
	1697	switch (offset)
	1698	{
	1699	case S3C24XX_GPADAT :
	1700	{
	1701	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_A, data & S3C24XX_GPADAT_MASK);
	1702	}
	1703	break;
	1704	case S3C24XX_GPBDAT :
	1705	{
	1706	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_B, data & S3C24XX_GPBDAT_MASK);
	1707	}
	1708	break;
	1709	case S3C24XX_GPCDAT :
	1710	{
	1711	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_C, data & S3C24XX_GPCDAT_MASK);
	1712	}
	1713	break;
	1714	case S3C24XX_GPDDAT :
	1715	{
	1716	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_D, data & S3C24XX_GPDDAT_MASK);
	1717	}
	1718	break;
	1719	case S3C24XX_GPEDAT :
	1720	{
	1721	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_E, data & S3C24XX_GPEDAT_MASK);
	1722	}
	1723	break;
	1724	case S3C24XX_GPFDAT :
	1725	{
	1726	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_F, data & S3C24XX_GPFDAT_MASK);
	1727	}
	1728	break;
	1729	case S3C24XX_GPGDAT :
	1730	{
	1731	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_G, data & S3C24XX_GPGDAT_MASK);
	1732	}
	1733	break;
	1734	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	1735	case S3C24XX_GPHDAT :
	1736	{
	1737	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_H, data & S3C24XX_GPHDAT_MASK);
	1738	}
	1739	break;
	1740	case S3C24XX_EINTPEND :
	1741	{
	1742	s3c24xx->gpio.regs.eintpend = (old_value & ~data);
	1743	s3c24xx_check_pending_eint( device);
	1744	}
	1745	break;
	1746	case S3C24XX_EINTMASK :
	1747	{
	1748	s3c24xx_check_pending_eint( device);
	1749	}
	1750	break;
	1751	#endif
	1752	#if defined(DEVICE_S3C2440)
	1753	case S3C24XX_GPJDAT :
	1754	{
	1755	iface_gpio_port_w( device, S3C24XX_GPIO_PORT_J, data & S3C24XX_GPJDAT_MASK);
	1756	}
	1757	break;
	1758	#endif
	1759	}
	1760	}
	1761
	1762	/* Memory Controller */
	1763
	1764	static READ32_DEVICE_HANDLER( s3c24xx_memcon_r )
	1765	{
	1766	s3c24xx_t *s3c24xx = get_token( device);
	1767	UINT32 data = s3c24xx->memcon.regs.data[offset];
	1768	verboselog( device->machine, 9, "(MEMCON) %08X -> %08X\n", S3C24XX_BASE_MEMCON + (offset << 2), data);
	1769	return data;
	1770	}
	1771
	1772	static WRITE32_DEVICE_HANDLER( s3c24xx_memcon_w )
	1773	{
	1774	s3c24xx_t *s3c24xx = get_token( device);
	1775	verboselog( device->machine, 9, "(MEMCON) %08X <- %08X\n", S3C24XX_BASE_MEMCON + (offset << 2), data);
	1776	COMBINE_DATA(&s3c24xx->memcon.regs.data[offset]);
	1777	}
	1778
	1779	/* USB Host Controller */
	1780
	1781	static READ32_DEVICE_HANDLER( s3c24xx_usb_host_r )
	1782	{
	1783	s3c24xx_t *s3c24xx = get_token( device);
	1784	UINT32 data = s3c24xx->usbhost.regs.data[offset];
	1785	switch (offset)
	1786	{
	1787	// HcCommandStatus
	1788	case 0x08 / 4 :
	1789	{
	1790	data = data & ~(1 << 0); // [bit 0] HostControllerReset
	1791	}
	1792	break;
	1793	}
	1794	verboselog( device->machine, 9, "(USB H) %08X -> %08X\n", S3C24XX_BASE_USBHOST + (offset << 2), data);
	1795	return data;
	1796	}
	1797
	1798	static WRITE32_DEVICE_HANDLER( s3c24xx_usb_host_w )
	1799	{
	1800	s3c24xx_t *s3c24xx = get_token( device);
	1801	verboselog( device->machine, 9, "(USB H) %08X <- %08X\n", S3C24XX_BASE_USBHOST + (offset << 2), data);
	1802	COMBINE_DATA(&s3c24xx->usbhost.regs.data[offset]);
	1803	}
	1804
	1805	/* UART */
	1806
	1807	static UINT32 s3c24xx_uart_r( running_device *device, UINT32 ch, UINT32 offset)
	1808	{
	1809	s3c24xx_t *s3c24xx = get_token( device);
	1810	UINT32 data = ((UINT32*)&s3c24xx->uart[ch].regs)[offset];
	1811	switch (offset)
	1812	{
	1813	case S3C24XX_UTRSTAT :
	1814	{
	1815	data = (data & ~0x00000006) \| 0x00000004 \| 0x00000002; // [bit 2] Transmitter empty / [bit 1] Transmit buffer empty
	1816	}
	1817	break;
	1818	case S3C24XX_URXH :
	1819	{
	1820	UINT8 rxdata = data & 0xFF;
	1821	verboselog( device->machine, 5, "UART %d read %02X (%c)\n", ch, rxdata, ((rxdata >= 32) && (rxdata < 128)) ? (char)rxdata : '?');
	1822	s3c24xx->uart[ch].regs.utrstat &= ~1; // [bit 0] Receive buffer data ready
	1823	}
	1824	break;
	1825	}
	1826	return data;
	1827	}
	1828
	1829	static void s3c24xx_uart_w( running_device *device, UINT32 ch, UINT32 offset, UINT32 data, UINT32 mem_mask)
	1830	{
	1831	s3c24xx_t *s3c24xx = get_token( device);
	1832	COMBINE_DATA(&((UINT32*)&s3c24xx->uart[ch].regs)[offset]);
	1833	switch (offset)
	1834	{
	1835	case S3C24XX_UTXH :
	1836	{
	1837	UINT8 txdata = data & 0xFF;
	1838	verboselog( device->machine, 5, "UART %d write %02X (%c)\n", ch, txdata, ((txdata >= 32) && (txdata < 128)) ? (char)txdata : '?');
	1839	#ifdef UART_PRINTF
	1840	printf( "%c", ((txdata >= 32) && (txdata < 128)) ? (char)txdata : '?');
	1841	#endif
	1842	}
	1843	break;
	1844	}
	1845	}
	1846
	1847	static READ32_DEVICE_HANDLER( s3c24xx_uart_0_r )
	1848	{
	1849	UINT32 data = s3c24xx_uart_r( device, 0, offset);
	1850	// verboselog( device->machine, 9, "(UART 0) %08X -> %08X\n", S3C24XX_BASE_UART_0 + (offset << 2), data);
	1851	return data;
	1852	}
	1853
	1854	static READ32_DEVICE_HANDLER( s3c24xx_uart_1_r )
	1855	{
	1856	UINT32 data = s3c24xx_uart_r( device, 1, offset);
	1857	// verboselog( device->machine, 9, "(UART 1) %08X -> %08X\n", S3C24XX_BASE_UART_1 + (offset << 2), data);
	1858	return data;
	1859	}
	1860
	1861	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	1862
	1863	static READ32_DEVICE_HANDLER( s3c24xx_uart_2_r )
	1864	{
	1865	UINT32 data = s3c24xx_uart_r( device, 2, offset);
	1866	// verboselog( device->machine, 9, "(UART 2) %08X -> %08X\n", S3C24XX_BASE_UART_2 + (offset << 2), data);
	1867	return data;
	1868	}
	1869
	1870	#endif
	1871
	1872	static WRITE32_DEVICE_HANDLER( s3c24xx_uart_0_w )
	1873	{
	1874	// verboselog( device->machine, 9, "(UART 0) %08X <- %08X\n", S3C24XX_BASE_UART_0 + (offset << 2), data);
	1875	s3c24xx_uart_w( device, 0, offset, data, mem_mask);
	1876	}
	1877
	1878	static WRITE32_DEVICE_HANDLER( s3c24xx_uart_1_w )
	1879	{
	1880	// verboselog( device->machine, 9, "(UART 1) %08X <- %08X\n", S3C24XX_BASE_UART_1 + (offset << 2), data);
	1881	s3c24xx_uart_w( device, 1, offset, data, mem_mask);
	1882	}
	1883
	1884	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	1885
	1886	static WRITE32_DEVICE_HANDLER( s3c24xx_uart_2_w )
	1887	{
	1888	// verboselog( device->machine, 9, "(UART 2) %08X <- %08X\n", S3C24XX_BASE_UART_2 + (offset << 2), data);
	1889	s3c24xx_uart_w( device, 2, offset, data, mem_mask);
	1890	}
	1891
	1892	#endif
	1893
	1894	static void s3c24xx_uart_fifo_w( running_device *device, int uart, UINT8 data)
	1895	{
	1896	// printf( "s3c24xx_uart_fifo_w (%c)\n", data);
	1897	s3c24xx_t *s3c24xx = get_token( device);
	1898	s3c24xx->uart[uart].regs.urxh = data;
	1899	s3c24xx->uart[uart].regs.utrstat \|= 1; // [bit 0] Receive buffer data ready
	1900	}
	1901
	1902	/* USB Device */
	1903
	1904	static READ32_DEVICE_HANDLER( s3c24xx_usb_device_r )
	1905	{
	1906	s3c24xx_t *s3c24xx = get_token( device);
	1907	UINT32 data = s3c24xx->usbdev.regs.data[offset];
	1908	verboselog( device->machine, 9, "(USB D) %08X -> %08X\n", S3C24XX_BASE_USBDEV + (offset << 2), data);
	1909	return data;
	1910	}
	1911
	1912	static WRITE32_DEVICE_HANDLER( s3c24xx_usb_device_w )
	1913	{
	1914	s3c24xx_t *s3c24xx = get_token( device);
	1915	verboselog( device->machine, 9, "(USB D) %08X <- %08X\n", S3C24XX_BASE_USBDEV + (offset << 2), data);
	1916	COMBINE_DATA(&s3c24xx->usbdev.regs.data[offset]);
	1917	}
	1918
	1919	/* Watchdog Timer */
	1920
	1921	static READ32_DEVICE_HANDLER( s3c24xx_wdt_r )
	1922	{
	1923	s3c24xx_t *s3c24xx = get_token( device);
	1924	UINT32 data = ((UINT32*)&s3c24xx->wdt.regs)[offset];
	1925	switch (offset)
	1926	{
	1927	case S3C24XX_WTCNT :
	1928	{
	1929	data = 0;
	1930	}
	1931	break;
	1932	}
	1933	verboselog( device->machine, 9, "(WDT) %08X -> %08X\n", S3C24XX_BASE_WDT + (offset << 2), data);
	1934	return data;
	1935	}
	1936
	1937	static void s3c24xx_wdt_start( running_device *device)
	1938	{
	1939	s3c24xx_t *s3c24xx = get_token( device);
	1940	UINT32 pclk, prescaler, clock;
	1941	double freq, hz;
	1942	verboselog( device->machine, 1, "WDT start\n");
	1943	pclk = s3c24xx_get_pclk( device);
	1944	prescaler = BITS( s3c24xx->wdt.regs.wtcon, 15, 8);
	1945	clock = 16 << BITS( s3c24xx->wdt.regs.wtcon, 4, 3);
	1946	freq = (double)pclk / (prescaler + 1) / clock;
	1947	hz = freq / s3c24xx->wdt.regs.wtcnt;
	1948	verboselog( device->machine, 5, "WDT pclk %d prescaler %d clock %d freq %f hz %f\n", pclk, prescaler, clock, freq, hz);
	1949	timer_adjust_periodic( s3c24xx->wdt.timer, ATTOTIME_IN_HZ( hz), 0, ATTOTIME_IN_HZ( hz));
	1950	}
	1951
	1952	static void s3c24xx_wdt_stop( running_device *device)
	1953	{
	1954	s3c24xx_t *s3c24xx = get_token( device);
	1955	verboselog( device->machine, 1, "WDT stop\n");
	1956	timer_adjust_oneshot( s3c24xx->wdt.timer, attotime_never, 0);
	1957	}
	1958
	1959	static void s3c24xx_wdt_recalc( running_device *device)
	1960	{
	1961	s3c24xx_t *s3c24xx = get_token( device);
	1962	if ((s3c24xx->wdt.regs.wtcon & (1 << 5)) != 0)
	1963	{
	1964	s3c24xx_wdt_start( device);
	1965	}
	1966	else
	1967	{
	1968	s3c24xx_wdt_stop( device);
	1969	}
	1970	}
	1971
	1972	static WRITE32_DEVICE_HANDLER( s3c24xx_wdt_w )
	1973	{
	1974	s3c24xx_t *s3c24xx = get_token( device);
	1975	UINT32 old_value = ((UINT32*)&s3c24xx->wdt.regs)[offset];
	1976	verboselog( device->machine, 9, "(WDT) %08X <- %08X\n", S3C24XX_BASE_WDT + (offset << 2), data);
	1977	COMBINE_DATA(&((UINT32*)&s3c24xx->wdt.regs)[offset]);
	1978	switch (offset)
	1979	{
	1980	case S3C24XX_WTCON :
	1981	{
	1982	if ((data & (1 << 5)) != (old_value & (1 << 5)))
	1983	{
	1984	s3c24xx_wdt_recalc( device);
	1985	}
	1986	}
	1987	break;
	1988	}
	1989	}
	1990
	1991	static TIMER_CALLBACK( s3c24xx_wdt_timer_exp )
	1992	{
	1993	running_device device = (running_device )ptr;
	1994	s3c24xx_t *s3c24xx = get_token( device);
	1995	verboselog( machine, 2, "WDT timer callback\n");
	1996	if ((s3c24xx->wdt.regs.wtcon & (1 << 2)) != 0)
	1997	{
	1998	#if defined(DEVICE_S3C2400) \|\| defined(DEVICE_S3C2410)
	1999	s3c24xx_request_irq( device, S3C24XX_INT_WDT);
	2000	#else
	2001	s3c24xx_request_subirq( device, S3C24XX_SUBINT_WDT);
	2002	#endif
	2003	}
	2004	if ((s3c24xx->wdt.regs.wtcon & (1 << 0)) != 0)
	2005	{
	2006	s3c24xx_reset( device);
	2007	}
	2008	}
	2009
	2010	/* IIC */
	2011
	2012	INLINE void iface_i2c_scl_w( running_device *device, int state)
	2013	{
	2014	s3c24xx_t *s3c24xx = get_token( device);
	2015	if (s3c24xx->iface->i2c.scl_w)
	2016	{
	2017	(s3c24xx->iface->i2c.scl_w)( device, state);
	2018	}
	2019	}
	2020
	2021	INLINE void iface_i2c_sda_w( running_device *device, int state)
	2022	{
	2023	s3c24xx_t *s3c24xx = get_token( device);
	2024	if (s3c24xx->iface->i2c.sda_w)
	2025	{
	2026	(s3c24xx->iface->i2c.sda_w)( device, state);
	2027	}
	2028	}
	2029
	2030	INLINE int iface_i2c_sda_r( running_device *device)
	2031	{
	2032	s3c24xx_t *s3c24xx = get_token( device);
	2033	if (s3c24xx->iface->i2c.sda_r)
	2034	{
	2035	return (s3c24xx->iface->i2c.sda_r)( device);
	2036	}
	2037	else
	2038	{
	2039	return 0;
	2040	}
	2041	}
	2042
	2043	static void i2c_send_start( running_device *device)
	2044	{
	2045	verboselog( device->machine, 5, "i2c_send_start\n");
	2046	iface_i2c_sda_w( device, 1);
	2047	iface_i2c_scl_w( device, 1);
	2048	iface_i2c_sda_w( device, 0);
	2049	iface_i2c_scl_w( device, 0);
	2050	}
	2051
	2052	static void i2c_send_stop( running_device *device)
	2053	{
	2054	verboselog( device->machine, 5, "i2c_send_stop\n");
	2055	iface_i2c_sda_w( device, 0);
	2056	iface_i2c_scl_w( device, 1);
	2057	iface_i2c_sda_w( device, 1);
	2058	iface_i2c_scl_w( device, 0);
	2059	}
	2060
	2061	static UINT8 i2c_receive_byte( running_device *device, int ack)
	2062	{
	2063	UINT8 data = 0;
	2064	verboselog( device->machine, 5, "i2c_receive_byte ...\n");
	2065	iface_i2c_sda_w( device, 1);
	2066	for (int i = 0; i < 8; i++)
	2067	{
	2068	iface_i2c_scl_w( device, 1);
	2069	data = (data << 1) + (iface_i2c_sda_r( device) ? 1 : 0);
	2070	iface_i2c_scl_w( device, 0);
	2071	}
	2072	verboselog( device->machine, 5, "recv data %02X\n", data);
	2073	verboselog( device->machine, 5, "send ack %d\n", ack);
	2074	iface_i2c_sda_w( device, ack ? 0 : 1);
	2075	iface_i2c_scl_w( device, 1);
	2076	iface_i2c_scl_w( device, 0);
	2077	return data;
	2078	}
	2079
	2080	static int i2c_send_byte( running_device *device, UINT8 data)
	2081	{
	2082	int ack;
	2083	verboselog( device->machine, 5, "i2c_send_byte ...\n");
	2084	verboselog( device->machine, 5, "send data %02X\n", data);
	2085	for (int i = 0; i < 8; i++)
	2086	{
	2087	iface_i2c_sda_w( device, (data & 0x80) ? 1 : 0);
	2088	data = data << 1;
	2089	iface_i2c_scl_w( device, 1);
	2090	iface_i2c_scl_w( device, 0);
	2091	}
	2092	iface_i2c_sda_w( device, 1); // ack bit
	2093	iface_i2c_scl_w( device, 1);
	2094	ack = iface_i2c_sda_r( device);
	2095	verboselog( device->machine, 5, "recv ack %d\n", ack);
	2096	iface_i2c_scl_w( device, 0);
	2097	return ack;
	2098	}
	2099
	2100	static void iic_start( running_device *device)
	2101	{
	2102	s3c24xx_t *s3c24xx = get_token( device);
	2103	int mode_selection;
	2104	verboselog( device->machine, 1, "IIC start\n");
	2105	i2c_send_start( device);
	2106	mode_selection = BITS( s3c24xx->iic.regs.iicstat, 7, 6);
	2107	switch (mode_selection)
	2108	{
	2109	case 2 : i2c_send_byte( device, s3c24xx->iic.regs.iicds \| 0x01); break;
	2110	case 3 : i2c_send_byte( device, s3c24xx->iic.regs.iicds & 0xFE); break;
	2111	}
	2112	timer_adjust_oneshot( s3c24xx->iic.timer, ATTOTIME_IN_USEC( 1), 0);
	2113	}
	2114
	2115	static void iic_stop( running_device *device)
	2116	{
	2117	s3c24xx_t *s3c24xx = get_token( device);
	2118	verboselog( device->machine, 1, "IIC stop\n");
	2119	i2c_send_stop( device);
	2120	timer_adjust_oneshot( s3c24xx->iic.timer, attotime_never, 0);
	2121	}
	2122
	2123	static void iic_resume( running_device *device)
	2124	{
	2125	s3c24xx_t *s3c24xx = get_token( device);
	2126	int mode_selection;
	2127	verboselog( device->machine, 1, "IIC resume\n");
	2128	mode_selection = BITS( s3c24xx->iic.regs.iicstat, 7, 6);
	2129	switch (mode_selection)
	2130	{
	2131	case 2 : s3c24xx->iic.regs.iicds = i2c_receive_byte( device, BIT( s3c24xx->iic.regs.iiccon, 7)); break;
	2132	case 3 : i2c_send_byte( device, s3c24xx->iic.regs.iicds & 0xFF); break;
	2133	}
	2134	timer_adjust_oneshot( s3c24xx->iic.timer, ATTOTIME_IN_USEC( 1), 0);
	2135	}
	2136
	2137	static READ32_DEVICE_HANDLER( s3c24xx_iic_r )
	2138	{
	2139	s3c24xx_t *s3c24xx = get_token( device);
	2140	UINT32 data = ((UINT32*)&s3c24xx->iic.regs)[offset];
	2141	switch (offset)
	2142	{
	2143	case S3C24XX_IICSTAT :
	2144	{
	2145	data = data & ~0x0000000F;
	2146	}
	2147	break;
	2148	}
	2149	verboselog( device->machine, 9, "(IIC) %08X -> %08X\n", S3C24XX_BASE_IIC + (offset << 2), data);
	2150	return data;
	2151	}
	2152
	2153	static WRITE32_DEVICE_HANDLER( s3c24xx_iic_w )
	2154	{
	2155	s3c24xx_t *s3c24xx = get_token( device);
	2156	UINT32 old_value = ((UINT32*)&s3c24xx->iic.regs)[offset];
	2157	verboselog( device->machine, 9, "(IIC) %08X <- %08X\n", S3C24XX_BASE_IIC + (offset << 2), data);
	2158	COMBINE_DATA(&((UINT32*)&s3c24xx->iic.regs)[offset]);
	2159	switch (offset)
	2160	{
	2161	case S3C24XX_IICCON :
	2162	{
	2163	int interrupt_pending_flag;
	2164	#if 0
	2165	const int div_table[] = { 16, 512};
	2166	int enable_interrupt, transmit_clock_value, tx_clock_source_selection
	2167	double clock;
	2168	transmit_clock_value = (data >> 0) & 0xF;
	2169	tx_clock_source_selection = (data >> 6) & 1;
	2170	enable_interrupt = (data >> 5) & 1;
	2171	clock = (double)s3c24xx_get_pclk( device) / div_table[tx_clock_source_selection] / (transmit_clock_value + 1);
	2172	#endif
	2173	interrupt_pending_flag = BIT( old_value, 4);
	2174	if (interrupt_pending_flag != 0)
	2175	{
	2176	interrupt_pending_flag = BIT( data, 4);
	2177	if (interrupt_pending_flag == 0)
	2178	{
	2179	int start_stop_condition;
	2180	start_stop_condition = BIT( s3c24xx->iic.regs.iicstat, 5);
	2181	if (start_stop_condition != 0)
	2182	{
	2183	if (s3c24xx->iic.count == 0)
	2184	{
	2185	iic_start( device);
	2186
	2187	}
	2188	else
	2189	{
	2190	iic_resume( device);
	2191	}
	2192	}
	2193	else
	2194	{
	2195	iic_stop( device);
	2196	}
	2197	}
	2198	}
	2199	}
	2200	break;
	2201	case S3C24XX_IICSTAT :
	2202	{
	2203	int interrupt_pending_flag;
	2204	s3c24xx->iic.count = 0;
	2205	interrupt_pending_flag = BIT( s3c24xx->iic.regs.iiccon, 4);
	2206	if (interrupt_pending_flag == 0)
	2207	{
	2208	int start_stop_condition;
	2209	start_stop_condition = BIT( data, 5);
	2210	if (start_stop_condition != 0)
	2211	{
	2212	if (s3c24xx->iic.count == 0)
	2213	{
	2214	iic_start( device);
	2215
	2216	}
	2217	else
	2218	{
	2219	iic_resume( device);
	2220	}
	2221	}
	2222	else
	2223	{
	2224	iic_stop( device);
	2225	}
	2226	}
	2227	}
	2228	break;
	2229	}
	2230	}
	2231
	2232	static TIMER_CALLBACK( s3c24xx_iic_timer_exp )
	2233	{
	2234	running_device device = (running_device )ptr;
	2235	s3c24xx_t *s3c24xx = get_token( device);
	2236	int enable_interrupt;
	2237	verboselog( machine, 2, "IIC timer callback\n");
	2238	s3c24xx->iic.count++;
	2239	enable_interrupt = BIT( s3c24xx->iic.regs.iiccon, 5);
	2240	if (enable_interrupt)
	2241	{
	2242	s3c24xx->iic.regs.iiccon \|= (1 << 4); // [bit 4] interrupt is pending
	2243	s3c24xx_request_irq( device, S3C24XX_INT_IIC);
	2244	}
	2245	}
	2246
	2247	/* IIS */
	2248
	2249	INLINE void iface_i2s_data_w( running_device *device, int ch, UINT16 data)
	2250	{
	2251	s3c24xx_t *s3c24xx = get_token( device);
	2252	if (s3c24xx->iface->i2s.data_w)
	2253	{
	2254	(s3c24xx->iface->i2s.data_w)( device, ch, data, 0);
	2255	}
	2256	}
	2257
	2258	static void s3c24xx_iis_start( running_device *device)
	2259	{
	2260	s3c24xx_t *s3c24xx = get_token( device);
	2261	const UINT32 codeclk_table[] = { 256, 384};
	2262	double freq;
	2263	int pclk, prescaler_enable, prescaler_control_a, prescaler_control_b, codeclk;
	2264	verboselog( device->machine, 1, "IIS start\n");
	2265	prescaler_enable = BIT( s3c24xx->iis.regs.iiscon, 1);
	2266	prescaler_control_a = BITS( s3c24xx->iis.regs.iispsr, 9, 5);
	2267	prescaler_control_b = BITS( s3c24xx->iis.regs.iispsr, 4, 0);
	2268	codeclk = BIT( s3c24xx->iis.regs.iismod, 2);
	2269	pclk = s3c24xx_get_pclk( device);
	2270	freq = ((double)pclk / (prescaler_control_a + 1) / codeclk_table[codeclk]) * 2; // why do I have to multiply by two?
	2271	verboselog( device->machine, 5, "IIS - pclk %d psc_enable %d psc_a %d psc_b %d codeclk %d freq %f\n", pclk, prescaler_enable, prescaler_control_a, prescaler_control_b, codeclk_table[codeclk], freq);
	2272	timer_adjust_periodic( s3c24xx->iis.timer, ATTOTIME_IN_HZ( freq), 0, ATTOTIME_IN_HZ( freq));
	2273	}
	2274
	2275	static void s3c24xx_iis_stop( running_device *device)
	2276	{
	2277	s3c24xx_t *s3c24xx = get_token( device);
	2278	verboselog( device->machine, 1, "IIS stop\n");
	2279	timer_adjust_oneshot( s3c24xx->iis.timer, attotime_never, 0);
	2280	}
	2281
	2282	static void s3c24xx_iis_recalc( running_device *device)
	2283	{
	2284	s3c24xx_t *s3c24xx = get_token( device);
	2285	if ((s3c24xx->iis.regs.iiscon & (1 << 0)) != 0)
	2286	{
	2287	s3c24xx_iis_start( device);
	2288	}
	2289	else
	2290	{
	2291	s3c24xx_iis_stop( device);
	2292	}
	2293	}
	2294
	2295	static READ32_DEVICE_HANDLER( s3c24xx_iis_r )
	2296	{
	2297	s3c24xx_t *s3c24xx = get_token( device);
	2298	UINT32 data = ((UINT32*)&s3c24xx->iis.regs)[offset];
	2299	#if 0
	2300	switch (offset)
	2301	{
	2302	case S3C24XX_IISCON :
	2303	{
	2304	data = data & ~1; // hack for mp3 player
	2305	}
	2306	break;
	2307	}
	2308	#endif
	2309	verboselog( device->machine, 9, "(IIS) %08X -> %08X\n", S3C24XX_BASE_IIS + (offset << 2), data);
	2310	return data;
	2311	}
	2312
	2313	static WRITE32_DEVICE_HANDLER( s3c24xx_iis_w )
	2314	{
	2315	s3c24xx_t *s3c24xx = get_token( device);
	2316	UINT32 old_value = ((UINT32*)&s3c24xx->iis.regs)[offset];
	2317	verboselog( device->machine, 9, "(IIS) %08X <- %08X\n", S3C24XX_BASE_IIS + (offset << 2), data);
	2318	COMBINE_DATA(&((UINT32*)&s3c24xx->iis.regs)[offset]);
	2319	switch (offset)
	2320	{
	2321	case S3C24XX_IISCON :
	2322	{
	2323	if ((old_value & (1 << 0)) != (data & (1 << 0)))
	2324	{
	2325	s3c24xx_iis_recalc( device);
	2326	}
	2327	}
	2328	break;
	2329	case S3C24XX_IISFIFO :
	2330	{
	2331	if (ACCESSING_BITS_16_31)
	2332	{
	2333	s3c24xx->iis.fifo[s3c24xx->iis.fifo_index++] = BITS( data, 31, 16);
	2334	}
	2335	if (ACCESSING_BITS_0_15)
	2336	{
	2337	s3c24xx->iis.fifo[s3c24xx->iis.fifo_index++] = BITS( data, 15, 0);
	2338	}
	2339	if (s3c24xx->iis.fifo_index == 2)
	2340	{
	2341	s3c24xx->iis.fifo_index = 0;
	2342	iface_i2s_data_w( device, 0, s3c24xx->iis.fifo[0]);
	2343	iface_i2s_data_w( device, 1, s3c24xx->iis.fifo[1]);
	2344	}
	2345	}
	2346	break;
	2347	}
	2348	}
	2349
	2350	static TIMER_CALLBACK( s3c24xx_iis_timer_exp )
	2351	{
	2352	running_device device = (running_device )ptr;
	2353	verboselog( machine, 2, "IIS timer callback\n");
	2354	s3c24xx_dma_request_iis( device);
	2355	}
	2356
	2357	/* RTC */
	2358
	2359	static void s3c24xx_rtc_init( running_device *device)
	2360	{
	2361	s3c24xx_t *s3c24xx = get_token( device);
	2362	s3c24xx->rtc.regs.bcdsec = dec_2_bcd( 0);
	2363	s3c24xx->rtc.regs.bcdmin = dec_2_bcd( 0);
	2364	s3c24xx->rtc.regs.bcdhour = dec_2_bcd( 0);
	2365	s3c24xx->rtc.regs.bcdday = dec_2_bcd( 1);
	2366	s3c24xx->rtc.regs.bcddow = dec_2_bcd( 1);
	2367	s3c24xx->rtc.regs.bcdmon = dec_2_bcd( 1);
	2368	s3c24xx->rtc.regs.bcdyear = dec_2_bcd( 4);
	2369	}
	2370
	2371	static READ32_DEVICE_HANDLER( s3c24xx_rtc_r )
	2372	{
	2373	s3c24xx_t *s3c24xx = get_token( device);
	2374	UINT32 data = ((UINT32*)&s3c24xx->rtc.regs)[offset];
	2375	verboselog( device->machine, 9, "(RTC) %08X -> %08X\n", S3C24XX_BASE_RTC + (offset << 2), data);
	2376	return data;
	2377	}
	2378
	2379	static void s3c24xx_rtc_recalc( running_device *device)
	2380	{
	2381	s3c24xx_t *s3c24xx = get_token( device);
	2382	if (s3c24xx->rtc.regs.ticnt & (1 << 7))
	2383	{
	2384	UINT32 ttc;
	2385	double freq;
	2386	ttc = BITS( s3c24xx->rtc.regs.ticnt, 6, 0);
	2387	freq = 128 / (ttc + 1);
	2388	// printf( "ttc %d freq %f\n", ttc, freq);
	2389	timer_adjust_periodic( s3c24xx->rtc.timer_tick_count, ATTOTIME_IN_HZ( freq), 0, ATTOTIME_IN_HZ( freq));
	2390	}
	2391	else
	2392	{
	2393	timer_adjust_oneshot( s3c24xx->rtc.timer_tick_count, attotime_never, 0);
	2394	}
	2395	}
	2396
	2397	static WRITE32_DEVICE_HANDLER( s3c24xx_rtc_w )
	2398	{
	2399	s3c24xx_t *s3c24xx = get_token( device);
	2400	verboselog( device->machine, 9, "(RTC) %08X <- %08X\n", S3C24XX_BASE_RTC + (offset << 2), data);
	2401	COMBINE_DATA(&((UINT32*)&s3c24xx->rtc.regs)[offset]);
	2402	switch (offset)
	2403	{
	2404	case S3C24XX_TICNT :
	2405	{
	2406	s3c24xx_rtc_recalc( device);
	2407	}
	2408	break;
	2409	}
	2410	}
	2411
	2412	static TIMER_CALLBACK( s3c24xx_rtc_timer_tick_count_exp )
	2413	{
	2414	running_device device = (running_device )ptr;
	2415	verboselog( machine, 2, "RTC timer callback (tick count)\n");
	2416	s3c24xx_request_irq( device, S3C24XX_INT_TICK);
	2417	}
	2418
	2419	static void s3c24xx_rtc_update( running_device *device)
	2420	{
	2421	s3c24xx_t *s3c24xx = get_token( device);
	2422	UINT32 bcdday_max;
	2423	// increase second
	2424	s3c24xx->rtc.regs.bcdsec = bcd_adjust( s3c24xx->rtc.regs.bcdsec + 1);
	2425	if (s3c24xx->rtc.regs.bcdsec >= 0x60)
	2426	{
	2427	s3c24xx->rtc.regs.bcdsec = 0;
	2428	// increase minute
	2429	s3c24xx->rtc.regs.bcdmin = bcd_adjust( s3c24xx->rtc.regs.bcdmin + 1);
	2430	if (s3c24xx->rtc.regs.bcdmin >= 0x60)
	2431	{
	2432	s3c24xx->rtc.regs.bcdmin = 0;
	2433	// increase hour
	2434	s3c24xx->rtc.regs.bcdhour = bcd_adjust( s3c24xx->rtc.regs.bcdhour + 1);
	2435	if (s3c24xx->rtc.regs.bcdhour >= 0x24)
	2436	{
	2437	s3c24xx->rtc.regs.bcdhour = 0;
	2438	// increase day-of-week
	2439	s3c24xx->rtc.regs.bcddow = (s3c24xx->rtc.regs.bcddow % 7) + 1;
	2440	// increase day
	2441	s3c24xx->rtc.regs.bcdday = bcd_adjust( s3c24xx->rtc.regs.bcdday + 1);
	2442	bcdday_max = dec_2_bcd( gregorian_days_in_month( bcd_2_dec( s3c24xx->rtc.regs.bcdmon), bcd_2_dec( s3c24xx->rtc.regs.bcdyear) + 2000));
	2443	if (s3c24xx->rtc.regs.bcdday > bcdday_max)
	2444	{
	2445	s3c24xx->rtc.regs.bcdday = 1;
	2446	// increase month
	2447	s3c24xx->rtc.regs.bcdmon = bcd_adjust( s3c24xx->rtc.regs.bcdmon + 1);
	2448	if (s3c24xx->rtc.regs.bcdmon >= 0x12)
	2449	{
	2450	s3c24xx->rtc.regs.bcdmon = 1;
	2451	// increase year
	2452	s3c24xx->rtc.regs.bcdyear = bcd_adjust( s3c24xx->rtc.regs.bcdyear + 1);
	2453	if (s3c24xx->rtc.regs.bcdyear >= 0x100)
	2454	{
	2455	s3c24xx->rtc.regs.bcdyear = 0;
	2456	}
	2457	}
	2458	}
	2459	}
	2460	}
	2461	}
	2462	verboselog( device->machine, 5, "RTC - %04d/%02d/%02d %02d:%02d:%02d\n", bcd_2_dec( s3c24xx->rtc.regs.bcdyear) + 2000, bcd_2_dec( s3c24xx->rtc.regs.bcdmon), bcd_2_dec( s3c24xx->rtc.regs.bcdday), bcd_2_dec( s3c24xx->rtc.regs.bcdhour), bcd_2_dec( s3c24xx->rtc.regs.bcdmin), bcd_2_dec( s3c24xx->rtc.regs.bcdsec));
	2463	}
	2464
	2465	static void s3c24xx_rtc_check_alarm( running_device *device)
	2466	{
	2467	s3c24xx_t *s3c24xx = get_token( device);
	2468	if (s3c24xx->rtc.regs.rtcalm & 0x40)
	2469	{
	2470	int isalarm = 1;
	2471	isalarm = isalarm && (((s3c24xx->rtc.regs.rtcalm & 0x20) == 0) \|\| (s3c24xx->rtc.regs.almyear == s3c24xx->rtc.regs.bcdyear));
	2472	isalarm = isalarm && (((s3c24xx->rtc.regs.rtcalm & 0x10) == 0) \|\| (s3c24xx->rtc.regs.almmon == s3c24xx->rtc.regs.bcdmon));
	2473	isalarm = isalarm && (((s3c24xx->rtc.regs.rtcalm & 0x08) == 0) \|\| (s3c24xx->rtc.regs.almday == s3c24xx->rtc.regs.bcdday));
	2474	isalarm = isalarm && (((s3c24xx->rtc.regs.rtcalm & 0x04) == 0) \|\| (s3c24xx->rtc.regs.almhour == s3c24xx->rtc.regs.bcdhour));
	2475	isalarm = isalarm && (((s3c24xx->rtc.regs.rtcalm & 0x02) == 0) \|\| (s3c24xx->rtc.regs.almmin == s3c24xx->rtc.regs.bcdmin));
	2476	isalarm = isalarm && (((s3c24xx->rtc.regs.rtcalm & 0x01) == 0) \|\| (s3c24xx->rtc.regs.almsec == s3c24xx->rtc.regs.bcdsec));
	2477	if (isalarm != 0)
	2478	{
	2479	s3c24xx_request_irq( device, S3C24XX_INT_RTC);
	2480	}
	2481	}
	2482	}
	2483
	2484	static TIMER_CALLBACK( s3c24xx_rtc_timer_update_exp )
	2485	{
	2486	running_device device = (running_device )ptr;
	2487	verboselog( machine, 2, "RTC timer callback (update)\n");
	2488	s3c24xx_rtc_update( device);
	2489	s3c24xx_rtc_check_alarm( device);
	2490	}
	2491
	2492	/* A/D Converter */
	2493
	2494	static UINT32 iface_adc_data_r( running_device *device, int ch)
	2495	{
	2496	s3c24xx_t *s3c24xx = get_token( device);
	2497	if (s3c24xx->iface->adc.data_r)
	2498	{
	2499	return (s3c24xx->iface->adc.data_r)( device, ch, 0);
	2500	}
	2501	else
	2502	{
	2503	return 0;
	2504	}
	2505	}
	2506
	2507	static READ32_DEVICE_HANDLER( s3c24xx_adc_r )
	2508	{
	2509	s3c24xx_t *s3c24xx = get_token( device);
	2510	UINT32 data = ((UINT32*)&s3c24xx->adc.regs)[offset];
	2511	switch (offset)
	2512	{
	2513	#if defined(DEVICE_S3C2400)
	2514	case S3C24XX_ADCDAT :
	2515	{
	2516	data = (data & ~0x3FF) \| (iface_adc_data_r( device, 0) & 0x3FF);
	2517	}
	2518	break;
	2519	#else
	2520	case S3C24XX_ADCDAT0 :
	2521	{
	2522	data = (data & ~0x3FF) \| (iface_adc_data_r( device, 0) & 0x3FF);
	2523	}
	2524	break;
	2525	case S3C24XX_ADCDAT1 :
	2526	{
	2527	data = (data & ~0x3FF) \| (iface_adc_data_r( device, 1) & 0x3FF);
	2528	}
	2529	break;
	2530	#endif
	2531	}
	2532	verboselog( device->machine, 9, "(ADC) %08X -> %08X\n", S3C24XX_BASE_ADC + (offset << 2), data);
	2533	return data;
	2534	}
	2535
	2536	static void s3c24xx_adc_start( running_device *device)
	2537	{
	2538	s3c24xx_t *s3c24xx = get_token( device);
	2539	verboselog( device->machine, 1, "ADC start\n");
	2540	s3c24xx->adc.regs.adccon &= ~(1 << 0); // A/D conversion is completed
	2541	s3c24xx->adc.regs.adccon \|= (1 << 15); // End of A/D conversion
	2542	}
	2543
	2544	static WRITE32_DEVICE_HANDLER( s3c24xx_adc_w )
	2545	{
	2546	s3c24xx_t *s3c24xx = get_token( device);
	2547	UINT32 old_value = ((UINT32*)&s3c24xx->adc.regs)[offset];
	2548	verboselog( device->machine, 9, "(ADC) %08X <- %08X\n", S3C24XX_BASE_ADC + (offset << 2), data);
	2549	COMBINE_DATA(&((UINT32*)&s3c24xx->adc.regs)[offset]);
	2550	switch (offset)
	2551	{
	2552	case S3C24XX_ADCCON :
	2553	{
	2554	if (((old_value & (1 << 0)) == 0) && ((data & (1 << 0)) != 0))
	2555	{
	2556	s3c24xx_adc_start( device);
	2557	}
	2558	}
	2559	break;
	2560	}
	2561	}
	2562
	2563	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	2564
	2565	static void s3c24xx_touch_screen( running_device *device, int state)
	2566	{
	2567	s3c24xx_t *s3c24xx = get_token( device);
	2568	s3c24xx->adc.regs.adcdat0 = ((state ? 0 : 1) << 15);
	2569	s3c24xx->adc.regs.adcdat1 = ((state ? 0 : 1) << 15);
	2570	s3c24xx_request_subirq( device, S3C24XX_SUBINT_TC);
	2571	}
	2572
	2573	#endif
	2574
	2575	/* SPI */
	2576
	2577	static UINT32 s3c24xx_spi_r( running_device *device, UINT32 ch, UINT32 offset)
	2578	{
	2579	s3c24xx_t *s3c24xx = get_token( device);
	2580	UINT32 data = ((UINT32*)&s3c24xx->spi[ch].regs)[offset];
	2581	switch (offset)
	2582	{
	2583	case S3C24XX_SPSTA :
	2584	{
	2585	data = data \| (1 << 0); // [bit 0] Transfer Ready Flag
	2586	}
	2587	break;
	2588	}
	2589	return data;
	2590	}
	2591
	2592	static void s3c24xx_spi_w( running_device *device, UINT32 ch, UINT32 offset, UINT32 data, UINT32 mem_mask)
	2593	{
	2594	s3c24xx_t *s3c24xx = get_token( device);
	2595	COMBINE_DATA(&((UINT32*)&s3c24xx->spi[ch].regs)[offset]);
	2596	}
	2597
	2598	static READ32_DEVICE_HANDLER( s3c24xx_spi_0_r )
	2599	{
	2600	UINT32 data = s3c24xx_spi_r( device, 0, offset);
	2601	verboselog( device->machine, 9, "(SPI 0) %08X -> %08X\n", S3C24XX_BASE_SPI_0 + (offset << 2), data);
	2602	return data;
	2603	}
	2604
	2605	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	2606
	2607	static READ32_DEVICE_HANDLER( s3c24xx_spi_1_r )
	2608	{
	2609	UINT32 data = s3c24xx_spi_r( device, 1, offset);
	2610	verboselog( device->machine, 9, "(SPI 1) %08X -> %08X\n", S3C24XX_BASE_SPI_1 + (offset << 2), data);
	2611	return data;
	2612	}
	2613
	2614	#endif
	2615
	2616	static WRITE32_DEVICE_HANDLER( s3c24xx_spi_0_w )
	2617	{
	2618	verboselog( device->machine, 9, "(SPI 0) %08X <- %08X\n", S3C24XX_BASE_SPI_0 + (offset << 2), data);
	2619	s3c24xx_spi_w( device, 0, offset, data, mem_mask);
	2620	}
	2621
	2622	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	2623
	2624	static WRITE32_DEVICE_HANDLER( s3c24xx_spi_1_w )
	2625	{
	2626	verboselog( device->machine, 9, "(SPI 1) %08X <- %08X\n", S3C24XX_BASE_SPI_1 + (offset << 2), data);
	2627	s3c24xx_spi_w( device, 1, offset, data, mem_mask);
	2628	}
	2629
	2630	#endif
	2631
	2632	/* MMC Interface */
	2633
	2634	#if defined(DEVICE_S3C2400)
	2635
	2636	static READ32_DEVICE_HANDLER( s3c24xx_mmc_r )
	2637	{
	2638	s3c24xx_t *s3c24xx = get_token( device);
	2639	UINT32 data = s3c24xx->mmc.regs.data[offset];
	2640	verboselog( device->machine, 9, "(MMC) %08X -> %08X\n", S3C24XX_BASE_MMC + (offset << 2), data);
	2641	return data;
	2642	}
	2643
	2644	static WRITE32_DEVICE_HANDLER( s3c24xx_mmc_w )
	2645	{
	2646	s3c24xx_t *s3c24xx = get_token( device);
	2647	verboselog( device->machine, 9, "(MMC) %08X <- %08X\n", S3C24XX_BASE_MMC + (offset << 2), data);
	2648	COMBINE_DATA(&s3c24xx->mmc.regs.data[offset]);
	2649	}
	2650
	2651	#endif
	2652
	2653	/* SD Interface */
	2654
	2655	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	2656
	2657	static READ32_DEVICE_HANDLER( s3c24xx_sdi_r )
	2658	{
	2659	s3c24xx_t *s3c24xx = get_token( device);
	2660	UINT32 data = s3c24xx->sdi.regs.data[offset];
	2661	verboselog( device->machine, 9, "(SDI) %08X -> %08X\n", S3C24XX_BASE_SDI + (offset << 2), data);
	2662	return data;
	2663	}
	2664
	2665	static WRITE32_DEVICE_HANDLER( s3c24xx_sdi_w )
	2666	{
	2667	s3c24xx_t *s3c24xx = get_token( device);
	2668	verboselog( device->machine, 9, "(SDI) %08X <- %08X\n", S3C24XX_BASE_SDI + (offset << 2), data);
	2669	COMBINE_DATA(&s3c24xx->sdi.regs.data[offset]);
	2670	}
	2671
	2672	#endif
	2673
	2674	/* NAND Flash */
	2675
	2676	#if defined(DEVICE_S3C2410) \|\| defined(DEVICE_S3C2440)
	2677
	2678	INLINE void iface_nand_command_w( running_device *device, UINT8 data)
	2679	{
	2680	s3c24xx_t *s3c24xx = get_token( device);
	2681	if (s3c24xx->iface->nand.command_w)
	2682	{
	2683	(s3c24xx->iface->nand.command_w)( device, 0, data);
	2684	}
	2685	}
	2686
	2687	INLINE void iface_nand_address_w( running_device *device, UINT8 data)
	2688	{
	2689	s3c24xx_t *s3c24xx = get_token( device);
	2690	if (s3c24xx->iface->nand.address_w)
	2691	{
	2692	(s3c24xx->iface->nand.address_w)( device, 0, data);
	2693	}
	2694	}
	2695
	2696	INLINE UINT8 iface_nand_data_r( running_device *device)
	2697	{
	2698	s3c24xx_t *s3c24xx = get_token( device);
	2699	if (s3c24xx->iface->nand.data_r)
	2700	{
	2701	return (s3c24xx->iface->nand.data_r)( device, 0);
	2702	}
	2703	else
	2704	{
	2705	return 0;
	2706	}
	2707	}
	2708
	2709	INLINE void iface_nand_data_w( running_device *device, UINT8 data)
	2710	{
	2711	s3c24xx_t *s3c24xx = get_token( device);
	2712	if (s3c24xx->iface->nand.data_w)
	2713	{
	2714	(s3c24xx->iface->nand.data_w)( device, 0, data);
	2715	}
	2716	}
	2717
	2718	static void nand_update_mecc( UINT8 *ecc, int pos, UINT8 data)
	2719	{
	2720	int bit[8];
	2721	UINT8 temp;
	2722	bit[0] = (data >> 0) & 1;
	2723	bit[1] = (data >> 1) & 1;
	2724	bit[2] = (data >> 2) & 1;
	2725	bit[3] = (data >> 3) & 1;
	2726	bit[4] = (data >> 4) & 1;
	2727	bit[5] = (data >> 5) & 1;
	2728	bit[6] = (data >> 6) & 1;
	2729	bit[7] = (data >> 7) & 1;
	2730	// column parity
	2731	ecc[2] ^= ((bit[6] ^ bit[4] ^ bit[2] ^ bit[0]) << 2);
	2732	ecc[2] ^= ((bit[7] ^ bit[5] ^ bit[3] ^ bit[1]) << 3);
	2733	ecc[2] ^= ((bit[5] ^ bit[4] ^ bit[1] ^ bit[0]) << 4);
	2734	ecc[2] ^= ((bit[7] ^ bit[6] ^ bit[3] ^ bit[2]) << 5);
	2735	ecc[2] ^= ((bit[3] ^ bit[2] ^ bit[1] ^ bit[0]) << 6);
	2736	ecc[2] ^= ((bit[7] ^ bit[6] ^ bit[5] ^ bit[4]) << 7);
	2737	// line parity
	2738	temp = bit[7] ^ bit[6] ^ bit[5] ^ bit[4] ^ bit[3] ^ bit[2] ^ bit[1] ^ bit[0];
	2739	if (pos & 0x001) ecc[0] ^= (temp << 1); else ecc[0] ^= (temp << 0);
	2740	if (pos & 0x002) ecc[0] ^= (temp << 3); else ecc[0] ^= (temp << 2);
	2741	if (pos & 0x004) ecc[0] ^= (temp << 5); else ecc[0] ^= (temp << 4);
	2742	if (pos & 0x008) ecc[0] ^= (temp << 7); else ecc[0] ^= (temp << 6);
	2743	if (pos & 0x010) ecc[1] ^= (temp << 1); else ecc[1] ^= (temp << 0);
	2744	if (pos & 0x020) ecc[1] ^= (temp << 3); else ecc[1] ^= (temp << 2);
	2745	if (pos & 0x040) ecc[1] ^= (temp << 5); else ecc[1] ^= (temp << 4);
	2746	if (pos & 0x080) ecc[1] ^= (temp << 7); else ecc[1] ^= (temp << 6);
	2747	if (pos & 0x100) ecc[2] ^= (temp << 1); else ecc[2] ^= (temp << 0);
	2748	if (pos & 0x200) ecc[3] ^= (temp << 5); else ecc[3] ^= (temp << 4);
	2749	if (pos & 0x400) ecc[3] ^= (temp << 7); else ecc[3] ^= (temp << 6);
	2750	}
	2751
	2752	#if defined(DEVICE_S3C2440)
	2753
	2754	static void nand_update_secc( UINT8 *ecc, int pos, UINT8 data)
	2755	{
	2756	int bit[8];
	2757	UINT8 temp;
	2758	bit[0] = (data >> 0) & 1;
	2759	bit[1] = (data >> 1) & 1;
	2760	bit[2] = (data >> 2) & 1;
	2761	bit[3] = (data >> 3) & 1;
	2762	bit[4] = (data >> 4) & 1;
	2763	bit[5] = (data >> 5) & 1;
	2764	bit[6] = (data >> 6) & 1;
	2765	bit[7] = (data >> 7) & 1;
	2766	// column parity
	2767	ecc[1] ^= ((bit[6] ^ bit[4] ^ bit[2] ^ bit[0]) << 6);
	2768	ecc[1] ^= ((bit[7] ^ bit[5] ^ bit[3] ^ bit[1]) << 7);
	2769	ecc[0] ^= ((bit[5] ^ bit[4] ^ bit[1] ^ bit[0]) << 0);
	2770	ecc[0] ^= ((bit[7] ^ bit[6] ^ bit[3] ^ bit[2]) << 1);
	2771	ecc[0] ^= ((bit[3] ^ bit[2] ^ bit[1] ^ bit[0]) << 2);
	2772	ecc[0] ^= ((bit[7] ^ bit[6] ^ bit[5] ^ bit[4]) << 3);
	2773	// line parity
	2774	temp = bit[7] ^ bit[6] ^ bit[5] ^ bit[4] ^ bit[3] ^ bit[2] ^ bit[1] ^ bit[0];
	2775	if (pos & 0x001) ecc[0] ^= (temp << 5); else ecc[0] ^= (temp << 4);
	2776	if (pos & 0x002) ecc[0] ^= (temp << 7); else ecc[0] ^= (temp << 6);
	2777	if (pos & 0x004) ecc[1] ^= (temp << 3); else ecc[1] ^= (temp << 2);
	2778	if (pos & 0x008) ecc[1] ^= (temp << 5); else ecc[1] ^= (temp << 4);
	2779	}
	2780
	2781	#endif
	2782
	2783	static void s3c24xx_nand_update_ecc( running_device *device, UINT8 data)
	2784	{
	2785	s3c24xx_t *s3c24xx = get_token( device);
	2786	UINT8 temp[4];
	2787	#if defined(DEVICE_S3C2410)
	2788	temp[0] = s3c24xx->nand.mecc[0];
	2789	temp[1] = s3c24xx->nand.mecc[1];
	2790	temp[2] = s3c24xx->nand.mecc[2];
	2791	nand_update_mecc( s3c24xx->nand.mecc, s3c24xx->nand.pos++, data);
	2792	verboselog( device->machine, 5, "NAND - MECC %03X - %02X %02X %02X -> %02X %02X %02X\n", s3c24xx->nand.pos - 1, temp[0], temp[1], temp[2], s3c24xx->nand.mecc[0], s3c24xx->nand.mecc[1], s3c24xx->nand.mecc[2]);
	2793	if (s3c24xx->nand.pos == 512) s3c24xx->nand.pos = 0;
	2794	#else
	2795	if ((s3c24xx->nand.regs.nfcont & (1 << 5)) == 0)
	2796	{
	2797	temp[0] = s3c24xx->nand.mecc[0];
	2798	temp[1] = s3c24xx->nand.mecc[1];
	2799	temp[2] = s3c24xx->nand.mecc[2];
	2800	temp[3] = s3c24xx->nand.mecc[3];
	2801	nand_update_mecc( s3c24xx->nand.mecc, s3c24xx->nand.pos++, data);
	2802	verboselog( device->machine, 5, "NAND - MECC %03X - %02X %02X %02X %02X -> %02X %02X %02X %02X\n", s3c24xx->nand.pos - 1, temp[0], temp[1], temp[2], temp[3], s3c24xx->nand.mecc[0], s3c24xx->nand.mecc[1], s3c24xx->nand.mecc[2], s3c24xx->nand.mecc[3]);
	2803	if (s3c24xx->nand.pos == 2048) s3c24xx->nand.pos = 0;
	2804	}
	2805	if ((s3c24xx->nand.regs.nfcont & (1 << 6)) == 0)
	2806	{
	2807	temp[0] = s3c24xx->nand.secc[0];
	2808	temp[1] = s3c24xx->nand.secc[1];
	2809	nand_update_secc( s3c24xx->nand.secc, s3c24xx->nand.pos++, data);
	2810	verboselog( device->machine, 5, "NAND - SECC %02X - %02X %02X -> %02X %02X\n", s3c24xx->nand.pos - 1, temp[0], temp[1], s3c24xx->nand.secc[0], s3c24xx->nand.secc[1]);
	2811	if (s3c24xx->nand.pos == 16) s3c24xx->nand.pos = 0;
	2812	}
	2813	#endif
	2814	}
	2815
	2816	static void s3c24xx_nand_command_w( running_device *device, UINT8 data)
	2817	{
	2818	verboselog( device->machine, 5, "NAND write command %02X\n", data);
	2819	iface_nand_command_w( device, data);
	2820	}
	2821
	2822	static void s3c24xx_nand_address_w( running_device *device, UINT8 data)
	2823	{
	2824	verboselog( device->machine, 5, "NAND write address %02X\n", data);
	2825	iface_nand_address_w( device, data);
	2826	}
	2827
	2828	static UINT8 s3c24xx_nand_data_r( running_device *device)
	2829	{
	2830	UINT8 data = iface_nand_data_r( device);
	2831	verboselog( device->machine, 5, "NAND data read %02X\n", data);
	2832	s3c24xx_nand_update_ecc( device, data);
	2833	return data;
	2834	}
	2835
	2836	static void s3c24xx_nand_data_w( running_device *device, UINT8 data)
	2837	{
	2838	verboselog( device->machine, 5, "NAND write data %02X\n", data);
	2839	iface_nand_data_w( device, data);
	2840	s3c24xx_nand_update_ecc( device, data);
	2841	}
	2842
	2843	static READ32_DEVICE_HANDLER( s3c24xx_nand_r )
	2844	{
	2845	s3c24xx_t *s3c24xx = get_token( device);
	2846	UINT32 data = ((UINT32*)&s3c24xx->nand.regs)[offset];
	2847	switch (offset)
	2848	{
	2849	case S3C24XX_NFDATA :
	2850	{
	2851	data = 0;
	2852	if ((mem_mask & 0x000000FF) != 0) data = data \| (s3c24xx_nand_data_r( device) << 0);
	2853	if ((mem_mask & 0x0000FF00) != 0) data = data \| (s3c24xx_nand_data_r( device) << 8);
	2854	if ((mem_mask & 0x00FF0000) != 0) data = data \| (s3c24xx_nand_data_r( device) << 16);
	2855	if ((mem_mask & 0xFF000000) != 0) data = data \| (s3c24xx_nand_data_r( device) << 24);
	2856	}
	2857	break;
	2858	#if defined(DEVICE_S3C2410)
	2859	case S3C24XX_NFECC :
	2860	{
	2861	data = (s3c24xx->nand.mecc[2] << 16) \| (s3c24xx->nand.mecc[1] << 8) \| (s3c24xx->nand.mecc[0] << 0);
	2862	//data = 0xFFFFFFFF;
	2863	}
	2864	break;
	2865	#endif
	2866	#if defined(DEVICE_S3C2440)
	2867	case S3C24XX_NFMECC0 :
	2868	{
	2869
	2870	data = (s3c24xx->nand.mecc[3] << 24) \| (s3c24xx->nand.mecc[2] << 16) \| (s3c24xx->nand.mecc[1] << 8) \| (s3c24xx->nand.mecc[0] << 0);
	2871	}
	2872	break;
	2873	case S3C24XX_NFSECC :
	2874	{
	2875	data = (s3c24xx->nand.secc[1] << 8) \| (s3c24xx->nand.secc[0] << 0);
	2876	}
	2877	break;
	2878	case S3C24XX_NFESTAT0 :
	2879	{
	2880	data &= ~0x000000F; // no main/spare ECC errors
	2881	}
	2882	break;
	2883	case S3C24XX_NFESTAT1 :
	2884	{
	2885	data &= ~0x000000F; // no main/spare ECC errors
	2886	}
	2887	break;
	2888	#endif
	2889	}
	2890	verboselog( device->machine, 9, "(NAND) %08X -> %08X (%08X)\n", S3C24XX_BASE_NAND + (offset << 2), data, mem_mask);
	2891	return data;
	2892	}
	2893
	2894	static void s3c24xx_nand_init_ecc( running_device *device)
	2895	{
	2896	s3c24xx_t *s3c24xx = get_token( device);
	2897	verboselog( device->machine, 5, "NAND - init ecc\n");
	2898	#if defined(DEVICE_S3C2410)
	2899	s3c24xx->nand.mecc[0] = 0;
	2900	s3c24xx->nand.mecc[1] = 0;
	2901	s3c24xx->nand.mecc[2] = 0;
	2902	#else
	2903	s3c24xx->nand.mecc[0] = 0;
	2904	s3c24xx->nand.mecc[1] = 0;
	2905	s3c24xx->nand.mecc[2] = 0;
	2906	s3c24xx->nand.mecc[3] = 0;
	2907	s3c24xx->nand.secc[0] = 0;
	2908	s3c24xx->nand.secc[1] = 0;
	2909	#endif
	2910	s3c24xx->nand.pos = 0;
	2911	}
	2912
	2913	static WRITE32_DEVICE_HANDLER( s3c24xx_nand_w )
	2914	{
	2915	s3c24xx_t *s3c24xx = get_token( device);
	2916	UINT32 old_value = ((UINT32*)&s3c24xx->nand.regs)[offset];
	2917	verboselog( device->machine, 9, "(NAND) %08X <- %08X\n", S3C24XX_BASE_NAND + (offset << 2), data);
	2918	COMBINE_DATA(&((UINT32*)&s3c24xx->nand.regs)[offset]);
	2919	switch (offset)
	2920	{
	2921	#if defined(DEVICE_S3C2410)
	2922	case S3C24XX_NFCONF :
	2923	{
	2924	if ((data & (1 << 12)) != 0)
	2925	{
	2926	s3c24xx_nand_init_ecc( device);
	2927	}
	2928	}
	2929	break;
	2930	#endif
	2931	#if defined(DEVICE_S3C2440)
	2932	case S3C24XX_NFCONT :
	2933	{
	2934	if ((data & (1 << 4)) != 0)
	2935	{
	2936	s3c24xx_nand_init_ecc( device);
	2937	}
	2938	}
	2939	break;
	2940	#endif
	2941	case S3C24XX_NFSTAT :
	2942	{
	2943	s3c24xx->nand.regs.nfstat = (s3c24xx->nand.regs.nfstat & ~0x03) \| (old_value & 0x03);
	2944	#if defined(DEVICE_S3C2440)
	2945	if ((data & (1 << 2)) != 0)
	2946	{
	2947	s3c24xx->nand.regs.nfstat &= ~(1 << 2); // "RnB_TransDetect, to clear this value write 1"
	2948	}
	2949	#endif
	2950	}
	2951	break;
	2952	case S3C24XX_NFCMD :
	2953	{
	2954	s3c24xx_nand_command_w( device, data);
	2955	}
	2956	break;
	2957	case S3C24XX_NFADDR :
	2958	{
	2959	s3c24xx_nand_address_w( device, data);
	2960	}
	2961	break;
	2962	case S3C24XX_NFDATA :
	2963	{
	2964	if ((mem_mask & 0x000000FF) != 0) s3c24xx_nand_data_w( device, (data >> 0) & 0xFF);
	2965	if ((mem_mask & 0x0000FF00) != 0) s3c24xx_nand_data_w( device, (data >> 8) & 0xFF);
	2966	if ((mem_mask & 0x00FF0000) != 0) s3c24xx_nand_data_w( device, (data >> 16) & 0xFF);
	2967	if ((mem_mask & 0xFF000000) != 0) s3c24xx_nand_data_w( device, (data >> 24) & 0xFF);
	2968	}
	2969	break;
	2970	}
	2971	}
	2972
	2973	ATTR_UNUSED static WRITE_LINE_DEVICE_HANDLER( s3c24xx_pin_frnb_w )
	2974	{
	2975	s3c24xx_t *s3c24xx = get_token( device);
	2976	#if defined(DEVICE_S3C2440)
	2977	if ((BIT( s3c24xx->nand.regs.nfstat, 0) == 0) && (state != 0))
	2978	{
	2979	s3c24xx->nand.regs.nfstat \|= (1 << 2);
	2980	if (BIT( s3c24xx->nand.regs.nfcont, 9) != 0)
	2981	{
	2982	s3c24xx_request_irq( device, S3C24XX_INT_NFCON);
	2983	}
	2984	}
	2985	#endif
	2986	if (state == 0)
	2987	{
	2988	s3c24xx->nand.regs.nfstat &= ~(1 << 0);
	2989	}
	2990	else
	2991	{
	2992	s3c24xx->nand.regs.nfstat \|= (1 << 0);
	2993	}
	2994	}
	2995
	2996	#endif
	2997
	2998	/* Camera Interface */
	2999
	3000	#if defined(DEVICE_S3C2440)
	3001
	3002	static READ32_DEVICE_HANDLER( s3c24xx_cam_r )
	3003	{
	3004	s3c24xx_t *s3c24xx = get_token( device);
	3005	UINT32 data = s3c24xx->cam.regs.data[offset];
	3006	verboselog( device->machine, 9, "(CAM) %08X -> %08X\n", S3C24XX_BASE_CAM + (offset << 2), data);
	3007	return data;
	3008	}
	3009
	3010	static WRITE32_DEVICE_HANDLER( s3c24xx_cam_w )
	3011	{
	3012	s3c24xx_t *s3c24xx = get_token( device);
	3013	verboselog( device->machine, 9, "(CAM) %08X <- %08X\n", S3C24XX_BASE_CAM + (offset << 2), data);
	3014	COMBINE_DATA(&s3c24xx->cam.regs.data[offset]);
	3015	}
	3016
	3017	#endif
	3018
	3019	/* AC97 Interface */
	3020
	3021	#if defined(DEVICE_S3C2440)
	3022
	3023	static READ32_DEVICE_HANDLER( s3c24xx_ac97_r )
	3024	{
	3025	s3c24xx_t *s3c24xx = get_token( device);
	3026	UINT32 data = s3c24xx->ac97.regs.data[offset];
	3027	verboselog( device->machine, 9, "(AC97) %08X -> %08X\n", S3C24XX_BASE_AC97 + (offset << 2), data);
	3028	return data;
	3029	}
	3030
	3031	static WRITE32_DEVICE_HANDLER( s3c24xx_ac97_w )
	3032	{
	3033	s3c24xx_t *s3c24xx = get_token( device);
	3034	verboselog( device->machine, 9, "(AC97) %08X <- %08X\n", S3C24XX_BASE_AC97 + (offset << 2), data);
	3035	COMBINE_DATA(&s3c24xx->ac97.regs.data[offset]);
	3036	}
	3037
	3038	#endif
	3039
	3040	// ...
	3041
	3042	static DEVICE_RESET( s3c24xx )
	3043	{
	3044	s3c24xx_t *s3c24xx = get_token( device);
	3045	s3c24xx->iis.fifo_index = 0;
	3046	// s3c24xx->iic.data_index = 0;
	3047	}
	3048
	3049	static DEVICE_START( s3c24xx )
	3050	{
	3051	s3c24xx_t *s3c24xx = get_token( device);
	3052	s3c24xx->iface = (const s3c24xx_interface *)device->baseconfig().static_config();
	3053	for (int i = 0; i < 5; i++) s3c24xx->pwm.timer[i] = timer_alloc( device->machine, s3c24xx_pwm_timer_exp, (void*)device);
	3054	for (int i = 0; i < 4; i++) s3c24xx->dma[i].timer = timer_alloc( device->machine, s3c24xx_dma_timer_exp, (void*)device);
	3055	s3c24xx->iic.timer = timer_alloc( device->machine, s3c24xx_iic_timer_exp, (void*)device);
	3056	s3c24xx->iis.timer = timer_alloc( device->machine, s3c24xx_iis_timer_exp, (void*)device);
	3057	s3c24xx->lcd.timer = timer_alloc( device->machine, s3c24xx_lcd_timer_exp, (void*)device);
	3058	s3c24xx->rtc.timer_tick_count = timer_alloc( device->machine, s3c24xx_rtc_timer_tick_count_exp, (void*)device);
	3059	s3c24xx->rtc.timer_update = timer_alloc( device->machine, s3c24xx_rtc_timer_update_exp, (void*)device);
	3060	s3c24xx->wdt.timer = timer_alloc( device->machine, s3c24xx_wdt_timer_exp, (void*)device);
	3061	timer_adjust_periodic( s3c24xx->rtc.timer_update, ATTOTIME_IN_MSEC( 1000), 0, ATTOTIME_IN_MSEC( 1000));
	3062	s3c24xx_rtc_init( device);
	3063	}
	3064
	3065	static DEVICE_GET_INFO( s3c24xx )
	3066	{
	3067	switch ( state )
	3068	{
	3069	/* --- the following bits of info are returned as 64-bit signed integers --- */
	3070	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(s3c24xx_t); break;
	3071	case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = 0; break;
	3072	// case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
	3073	/* --- the following bits of info are returned as pointers to data or functions --- */
	3074	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(s3c24xx); break;
	3075	case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(s3c24xx); break;
	3076	/* --- the following bits of info are returned as NULL-terminated strings --- */
	3077	case DEVINFO_STR_FAMILY: strcpy(info->s, "S3C24XX"); break;
	3078	case DEVINFO_STR_VERSION: strcpy(info->s, "1.00"); break;
	3079	case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
	3080	case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright the MESS Team"); break;
	3081	}
	3082	}

src/emu/machine/z80ctc.h
r9812	r9813
4	4
5	5	Copyright Nicola Salmoria and the MAME Team.
6	6	Visit http://mamedev.org for licensing and usage restrictions.
7
	7
8	8	****************************************************************************
9	9	_____ _____
10	10	D4 1 \|* \_/ \| 28 D3
r9812	r9813
21	21	_INT 12 \| \| 17 _RESET
22	22	IEI 13 \| \| 16 _CE
23	23	_M1 14 \|_____________\| 15 CLK
24
	24
25	25	***************************************************************************/
26	26
27	27	#ifndef __Z80CTC_H__

src/lib/util/tagmap.h
r9812	r9813
164	164
165	165	INLINE UINT32 tagmap_hash(const char *string)
166	166	{
167		UINT32 hash = (string~~[0] << 5)~~ + ~~string[1]~~;
	167	UINT32 hash = *string++;
168	168	char c;
169	169
170		if (strlen(string) > 2)
171		{
172		string += 2;
173		while ((c = *string++) != 0)
174		hash = ((hash << 5) \| (hash >> 27)) + c;
175		}
	170	while ((c = *string++) != 0)
	171	hash = ((hash << 5) \| (hash >> 27)) + c;
176	172
177	173	return hash;
178	174	}

docs/messnew.txt
r9812	r9813
122	122
123	123	Source Changes:
124	124	----------------
125		- The core is based on MAME 0.140u2. This incorporates all features of the
	125	- The core is based on MAME 0.140u3. This incorporates all features of the
126	126	update to this core. [MAME team]
127	127
128	128	- Added UTF-8 constants for Swedish/Finnish keyboard accented

15994 Revisions