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r9715 Friday 3rd December, 2010 at 14:26:50 UTC by Curt Coder
[QL] Refactored driver to define ADDRESS_MAP_MODERN, refactored ZX8301 into a C++ device, and cleaned up memory handling.

[docs]	messnew.txt
[src/mess/drivers]	ql.c
[src/mess/includes]	ql.h
[src/mess/video]	zx8301.c zx8301.h

src/mess/video/zx8301.c

r9714	r9715
11	11
12	12	TODO:
13	13
14		- use resnet for colors
	14	- wait state on memory access during video update
15	15	- proper video timing
	16	- get rid of flash timer
16	17
17	18	*/
18	19
19	20	#include "emu.h"
20	21	#include "zx8301.h"
21	22
22		/***************************************************************************
23		PARAMETERS
24		***************************************************************************/
25	23
	24
	25	//**************************************************************************
	26	//   MACROS / CONSTANTS
	27	//**************************************************************************
	28
26	29	#define LOG 0
27	30
	31
	32	// low resolution palette
28	33	static const int ZX8301_COLOR_MODE4[] = { 0, 2, 4, 7 };
29	34
30		/***************************************************************************
31		TYPE DEFINITIONS
32		***************************************************************************/
33	35
34		typedef struct _zx8301_t zx8301_t;
35		struct _zx8301_t
	36
	37	//**************************************************************************
	38	//  GLOBAL VARIABLES
	39	//**************************************************************************
	40
	41	// devices
	42	const device_type ZX8301 = zx8301_device_config::static_alloc_device_config;
	43
	44
	45	// default address map
	46	static ADDRESS_MAP_START( zx8301, 0, 8 )
	47	AM_RANGE(0x00000, 0x1ffff) AM_RAM
	48	ADDRESS_MAP_END
	49
	50
	51
	52	//**************************************************************************
	53	//  DEVICE CONFIGURATION
	54	//**************************************************************************
	55
	56	//-------------------------------------------------
	57	//  zx8301_device_config - constructor
	58	//-------------------------------------------------
	59
	60	zx8301_device_config::zx8301_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
	61	: device_config(mconfig, static_alloc_device_config, "Sinclair ZX8301", tag, owner, clock),
	62	device_config_memory_interface(mconfig, *this),
	63	m_space_config("videoram", ENDIANNESS_LITTLE, 8, 17, 0, NULL, *ADDRESS_MAP_NAME(zx8301))
36	64	{
37		devcb_resolved_read8      in_ram_func;
38		devcb_resolved_write8      out_ram_func;
39		devcb_resolved_write_line   out_vsync_func;
	65	}
40	66
41		screen_device *screen;   /* screen */
42	67
43		int dispoff;               /* display off */
44		int mode8;                  /* mode8 active */
45		int base;                  /* video ram base address */
46		int flash;                  /* flash */
47		int vsync;                  /* vertical sync */
48		int vda;                  /* valid data address */
	68	//-------------------------------------------------
	69	//  static_alloc_device_config - allocate a new
	70	//  configuration object
	71	//-------------------------------------------------
49	72
50		/* timers */
51		emu_timer *flash_timer;         /* flash timer */
52		emu_timer *vsync_timer;         /* vertical sync timer */
	73	device_config *zx8301_device_config::static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
	74	{
	75	return global_alloc(zx8301_device_config(mconfig, tag, owner, clock));
	76	}
53	77
54		running_device *cpu;
55		};
56	78
57		/***************************************************************************
58		INLINE FUNCTIONS
59		***************************************************************************/
	79	//-------------------------------------------------
	80	//  alloc_device - allocate a new device object
	81	//-------------------------------------------------
60	82
61		INLINE zx8301_t *get_safe_token(running_device *device)
	83	device_t *zx8301_device_config::alloc_device(running_machine &machine) const
62	84	{
63		assert(device != NULL);
	85	return auto_alloc(&machine, zx8301_device(machine, *this));
	86	}
64	87
65		return (zx8301_t *)downcast<legacy_device_base *>(device)->token();
	88
	89	//-------------------------------------------------
	90	//  memory_space_config - return a description of
	91	//  any address spaces owned by this device
	92	//-------------------------------------------------
	93
	94	const address_space_config *zx8301_device_config::memory_space_config(int spacenum) const
	95	{
	96	return (spacenum == 0) ? &m_space_config : NULL;
66	97	}
67	98
68		INLINE const zx8301_interface *get_interface(running_device *device)
	99
	100	//-------------------------------------------------
	101	//  device_config_complete - perform any
	102	//  operations now that the configuration is
	103	//  complete
	104	//-------------------------------------------------
	105
	106	void zx8301_device_config::device_config_complete()
69	107	{
70		assert(device != NULL);
71		assert((device->type() == ZX8301));
72		return (const zx8301_interface *) device->baseconfig().static_config();
	108	// inherit a copy of the static data
	109	const zx8301_interface *intf = reinterpret_cast<const zx8301_interface *>(static_config());
	110	if (intf != NULL)
	111	*static_cast<zx8301_interface *>(this) = *intf;
	112
	113	// or initialize to defaults if none provided
	114	else
	115	{
	116	memset(&out_vsync_func, 0, sizeof(out_vsync_func));
	117	}
73	118	}
74	119
75		/***************************************************************************
76		IMPLEMENTATION
77		***************************************************************************/
78	120
79		/*-------------------------------------------------
80		TIMER_CALLBACK( zx8301_flash_tick )
81		-------------------------------------------------*/
82	121
83		static TIMER_CALLBACK( zx8301_flash_tick )
	122	//**************************************************************************
	123	//  INLINE HELPERS
	124	//**************************************************************************
	125
	126	//-------------------------------------------------
	127	//  readbyte - read a byte at the given address
	128	//-------------------------------------------------
	129
	130	inline UINT8 zx8301_device::readbyte(offs_t address)
84	131	{
85		zx8301_t *zx8301 = get_safe_token((running_device *)ptr);
	132	return space()->read_byte(address);
	133	}
86	134
87		zx8301->flash = !zx8301->flash;
	135
	136	//-------------------------------------------------
	137	//  writebyte - write a byte at the given address
	138	//-------------------------------------------------
	139
	140	inline void zx8301_device::writebyte(offs_t address, UINT8 data)
	141	{
	142	space()->write_byte(address, data);
88	143	}
89	144
90		/*-------------------------------------------------
91		TIMER_CALLBACK( zx8301_vsync_tick )
92		-------------------------------------------------*/
93	145
94		static TIMER_CALLBACK( zx8301_vsync_tick )
	146
	147	//**************************************************************************
	148	//  LIVE DEVICE
	149	//**************************************************************************
	150
	151	//-------------------------------------------------
	152	//  zx8301_device - constructor
	153	//-------------------------------------------------
	154
	155	zx8301_device::zx8301_device(running_machine &_machine, const zx8301_device_config &config)
	156	: device_t(_machine, config),
	157	device_memory_interface(_machine, config, *this),
	158	m_dispoff(1),
	159	m_mode8(0),
	160	m_base(0),
	161	m_flash(1),
	162	m_vsync(1),
	163	m_vda(0),
	164	m_config(config)
95	165	{
96		zx8301_t *zx8301 = get_safe_token((running_device *)ptr);
	166	}
97	167
98		//zx8301->vsync = !zx8301->vsync;
99	168
100		devcb_call_write_line(&zx8301->out_vsync_func, zx8301->vsync);
	169	//-------------------------------------------------
	170	//  device_start - device-specific startup
	171	//-------------------------------------------------
	172
	173	void zx8301_device::device_start()
	174	{
	175	// get the CPU
	176	m_cpu = machine->device<cpu_device>(m_config.cpu_tag);
	177	assert(m_cpu != NULL);
	178
	179	// get the screen device
	180	m_screen = machine->device<screen_device>(m_config.screen_tag);
	181	assert(m_screen != NULL);
	182
	183	// resolve callbacks
	184	devcb_resolve_write_line(&m_out_vsync_func, &m_config.out_vsync_func, this);
	185
	186	// allocate timers
	187	m_vsync_timer = device_timer_alloc(*this, TIMER_VSYNC);
	188	m_flash_timer = device_timer_alloc(*this, TIMER_FLASH);
	189
	190	// adjust timer periods
	191	timer_adjust_periodic(m_vsync_timer, attotime_zero, 0, ATTOTIME_IN_HZ(50));
	192	timer_adjust_periodic(m_flash_timer, ATTOTIME_IN_HZ(2), 0, ATTOTIME_IN_HZ(2));
	193
	194	// register for state saving
	195	state_save_register_device_item(this, 0, m_dispoff);
	196	state_save_register_device_item(this, 0, m_mode8);
	197	state_save_register_device_item(this, 0, m_base);
	198	state_save_register_device_item(this, 0, m_flash);
	199	state_save_register_device_item(this, 0, m_vsync);
	200	state_save_register_device_item(this, 0, m_vda);
101	201	}
102	202
103		/*-------------------------------------------------
104		PALETTE_INIT( zx8301 )
105		-------------------------------------------------*/
106	203
107		PALETTE_INIT( zx8301 )
	204	//-------------------------------------------------
	205	//  device_timer - handler timer events
	206	//-------------------------------------------------
	207
	208	void zx8301_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
108	209	{
109		palette_set_color_rgb(machine, 0, 0x00, 0x00, 0x00 ); // black
110		palette_set_color_rgb(machine, 1, 0x00, 0x00, 0xff ); // blue
111		palette_set_color_rgb(machine, 2, 0xff, 0x00, 0x00 ); // red
112		palette_set_color_rgb(machine, 3, 0xff, 0x00, 0xff ); // magenta
113		palette_set_color_rgb(machine, 4, 0x00, 0xff, 0x00 ); // green
114		palette_set_color_rgb(machine, 5, 0x00, 0xff, 0xff ); // cyan
115		palette_set_color_rgb(machine, 6, 0xff, 0xff, 0x00 ); // yellow
116		palette_set_color_rgb(machine, 7, 0xff, 0xff, 0xff ); // white
	210	switch (id)
	211	{
	212	case TIMER_VSYNC:
	213	//m_vsync = !m_vsync;
	214	devcb_call_write_line(&m_out_vsync_func, m_vsync);
	215	break;
	216
	217	case TIMER_FLASH:
	218	m_flash = !m_flash;
	219	break;
	220	}
117	221	}
118	222
119		/*-------------------------------------------------
120		zx8301_control_w - display control register
121		-------------------------------------------------*/
122	223
123		WRITE8_DEVICE_HANDLER( zx8301_control_w )
	224	//-------------------------------------------------
	225	//  control_w - display control register
	226	//-------------------------------------------------
	227
	228	WRITE8_MEMBER( zx8301_device::control_w )
124	229	{
125		zx8301_t *zx8301 = get_safe_token(device);
	230	/*
126	231
	232	bit      description
	233
	234	0
	235	1      display off
	236	2
	237	3      graphics mode
	238	4
	239	5
	240	6
	241	7      display base address
	242
	243	*/
	244
127	245	if (LOG) logerror("ZX8301 Control: %02x\n", data);
128	246
129		zx8301->dispoff = BIT(data, 1);
130		zx8301->mode8 = BIT(data, 3);
131		zx8301->base = BIT(data, 7);
	247	// display off
	248	m_dispoff = BIT(data, 1);
	249
	250	// graphics mode
	251	m_mode8 = BIT(data, 3);
	252
	253	// display base address
	254	m_base = BIT(data, 7);
132	255	}
133	256
134		/*-------------------------------------------------
135		zx8301_ram_r - RAM access
136		-------------------------------------------------*/
137	257
138		READ8_DEVICE_HANDLER( zx8301_ram_r )
	258	//-------------------------------------------------
	259	//  data_r - RAM read
	260	//-------------------------------------------------
	261
	262	READ8_MEMBER( zx8301_device::data_r )
139	263	{
140		zx8301_t *zx8301 = get_safe_token(device);
141
142	264	if (LOG) logerror("ZX8301 RAM Read: %06x\n", offset);
143	265
144		if (zx8301->vda)
	266	if (m_vda)
145	267	{
146		cpu_spinuntil_time(zx8301->cpu, zx8301->screen->time_until_pos(256, 0));
	268	cpu_spinuntil_time(m_cpu, m_screen->time_until_pos(256, 0));
147	269	}
148	270
149		return devcb_call_read8(&zx8301->in_ram_func, offset);
	271	return readbyte(offset);
150	272	}
151	273
152		/*-------------------------------------------------
153		zx8301_ram_w - RAM access
154		-------------------------------------------------*/
155	274
156		WRITE8_DEVICE_HANDLER( zx8301_ram_w )
	275	//-------------------------------------------------
	276	//  data_w - RAM write
	277	//-------------------------------------------------
	278
	279	WRITE8_MEMBER( zx8301_device::data_w )
157	280	{
158		zx8301_t *zx8301 = get_safe_token(device);
159
160	281	if (LOG) logerror("ZX8301 RAM Write: %06x = %02x\n", offset, data);
161	282
162		if (zx8301->vda)
	283	if (m_vda)
163	284	{
164		cpu_spinuntil_time(zx8301->cpu, zx8301->screen->time_until_pos(256, 0));
	285	cpu_spinuntil_time(m_cpu, m_screen->time_until_pos(256, 0));
165	286	}
166	287
167		devcb_call_write8(&zx8301->out_ram_func, offset, data);
	288	writebyte(offset, data);
168	289	}
169	290
170		/*-------------------------------------------------
171		zx8301_draw_line_mode4 - high resolution
172		line drawing routine
173		-------------------------------------------------*/
174	291
175		static void zx8301_draw_line_mode4(running_device *device, bitmap_t *bitmap, int y, UINT16 da)
	292	//-------------------------------------------------
	293	//  draw_line_mode4 - draw mode 4 line
	294	//-------------------------------------------------
	295
	296	void zx8301_device::draw_line_mode4(bitmap_t *bitmap, int y, UINT16 da)
176	297	{
177		zx8301_t *zx8301 = get_safe_token(device);
178
179		int word, pixel, x = 0;
180
181		for (word = 0; word < 64; word++)
	298	for (int word = 0; word < 64; word++)
182	299	{
183		UINT8 byte_high = devcb_call_read8(&zx8301->in_ram_func, da++);
184		UINT8 byte_low = devcb_call_read8(&zx8301->in_ram_func, da++);
	300	UINT8 byte_high = readbyte(da++);
	301	UINT8 byte_low = readbyte(da++);
185	302
186		for (pixel = 0; pixel < 8; pixel++)
	303	for (int pixel = 0; pixel < 8; pixel++)
187	304	{
	305	int x = 0;
188	306	int red = BIT(byte_low, 7);
189	307	int green = BIT(byte_high, 7);
190	308	int color = (green << 1) | red;
r9714	r9715
197	315	}
198	316	}
199	317
200		/*-------------------------------------------------
201		zx8301_draw_line_mode4 - low resolution
202		line drawing routine
203		-------------------------------------------------*/
204	318
205		static void zx8301_draw_line_mode8(running_device *device, bitmap_t *bitmap, int y, UINT16 da)
	319	//-------------------------------------------------
	320	//  draw_line_mode8 - draw mode 8 line
	321	//-------------------------------------------------
	322
	323	void zx8301_device::draw_line_mode8(bitmap_t *bitmap, int y, UINT16 da)
206	324	{
207		zx8301_t *zx8301 = get_safe_token(device);
208
209		int word, pixel, x = 0;
210
211		for (word = 0; word < 64; word++)
	325	for (int word = 0; word < 64; word++)
212	326	{
213		UINT8 byte_high = devcb_call_read8(&zx8301->in_ram_func, da++);
214		UINT8 byte_low = devcb_call_read8(&zx8301->in_ram_func, da++);
	327	UINT8 byte_high = readbyte(da++);
	328	UINT8 byte_low = readbyte(da++);
215	329
216		for (pixel = 0; pixel < 4; pixel++)
	330	for (int pixel = 0; pixel < 4; pixel++)
217	331	{
	332	int x = 0;
218	333	int red = BIT(byte_low, 7);
219	334	int green = BIT(byte_high, 7);
220	335	int blue = BIT(byte_low, 6);
r9714	r9715
222	337
223	338	int color = (green << 2) | (red << 1) | blue;
224	339
225		if (flash && zx8301->flash)
	340	if (flash && m_flash)
226	341	{
227	342	color = 0;
228	343	}
r9714	r9715
236	351	}
237	352	}
238	353
239		/*-------------------------------------------------
240		zx8301_draw_screen - draw screen
241		-------------------------------------------------*/
242	354
243		static void zx8301_draw_screen(running_device *device, bitmap_t *bitmap)
	355	//-------------------------------------------------
	356	//  update_screen -
	357	//-------------------------------------------------
	358
	359	void zx8301_device::update_screen(bitmap_t *bitmap, const rectangle *cliprect)
244	360	{
245		zx8301_t *zx8301 = get_safe_token(device);
	361	if (!m_dispoff)
	362	{
	363	UINT32 da = m_base << 15;
246	364
247		UINT32 da = zx8301->base << 15;
248		int y;
	365	for (int y = 0; y < 256; y++)
	366	{
	367	if (m_mode8)
	368	{
	369	draw_line_mode8(bitmap, y, da);
	370	}
	371	else
	372	{
	373	draw_line_mode4(bitmap, y, da);
	374	}
249	375
250		zx8301->vda = 1;
251
252		for (y = 0; y < 256; y++)
253		{
254		if (zx8301->mode8)
255		{
256		zx8301_draw_line_mode8(device, bitmap, y, da);
	376	da += 128;
257	377	}
258		else
259		{
260		zx8301_draw_line_mode4(device, bitmap, y, da);
261		}
262
263		da += 128;
264	378	}
265
266		zx8301->vda = 0;
267		}
268
269		/*-------------------------------------------------
270		zx8301_draw_screen - screen update
271		-------------------------------------------------*/
272
273		void zx8301_update(running_device *device, bitmap_t *bitmap, const rectangle *cliprect)
274		{
275		zx8301_t *zx8301 = get_safe_token(device);
276
277		if (!zx8301->dispoff)
278		{
279		zx8301_draw_screen(device, bitmap);
280		}
281	379	else
282	380	{
283		bitmap_fill(bitmap, cliprect, get_black_pen(zx8301->screen->machine));
	381	bitmap_fill(bitmap, cliprect, get_black_pen(machine));
284	382	}
285	383	}
286
287		/*-------------------------------------------------
288		DEVICE_START( zx8301 )
289		-------------------------------------------------*/
290
291		static DEVICE_START( zx8301 )
292		{
293		zx8301_t *zx8301 = get_safe_token(device);
294		const zx8301_interface *intf = get_interface(device);
295
296		/* resolve callbacks */
297		devcb_resolve_read8(&zx8301->in_ram_func, &intf->in_ram_func, device);
298		devcb_resolve_write8(&zx8301->out_ram_func, &intf->out_ram_func, device);
299		devcb_resolve_write_line(&zx8301->out_vsync_func, &intf->out_vsync_func, device);
300
301		/* set initial values */
302		zx8301->vsync = 1;
303
304		/* get the cpu */
305		zx8301->cpu = device->machine->device(intf->cpu_tag);
306
307		/* get the screen device */
308		zx8301->screen = device->machine->device<screen_device>(intf->screen_tag);
309		assert(zx8301->screen != NULL);
310
311		/* create the timers */
312		zx8301->vsync_timer = timer_alloc(device->machine, zx8301_vsync_tick, (void *)device);
313		timer_adjust_periodic(zx8301->vsync_timer, attotime_zero, 0, ATTOTIME_IN_HZ(50)); // HACK
314
315		zx8301->flash_timer = timer_alloc(device->machine, zx8301_flash_tick, (void *)device);
316		timer_adjust_periodic(zx8301->flash_timer, ATTOTIME_IN_HZ(2), 0, ATTOTIME_IN_HZ(2));
317
318		/* register for state saving */
319		state_save_register_item(device->machine, "zx8301", device->tag(), 0, zx8301->dispoff);
320		state_save_register_item(device->machine, "zx8301", device->tag(), 0, zx8301->mode8);
321		state_save_register_item(device->machine, "zx8301", device->tag(), 0, zx8301->base);
322		state_save_register_item(device->machine, "zx8301", device->tag(), 0, zx8301->flash);
323		state_save_register_item(device->machine, "zx8301", device->tag(), 0, zx8301->vsync);
324		state_save_register_item(device->machine, "zx8301", device->tag(), 0, zx8301->vda);
325		}
326
327		/*-------------------------------------------------
328		DEVICE_RESET( zx8301 )
329		-------------------------------------------------*/
330
331		static DEVICE_RESET( zx8301 )
332		{
333		//  zx8301_t *zx8301 = get_safe_token(device);
334		}
335
336		/*-------------------------------------------------
337		DEVICE_GET_INFO( zx8301 )
338		-------------------------------------------------*/
339
340		DEVICE_GET_INFO( zx8301 )
341		{
342		switch (state)
343		{
344		/* --- the following bits of info are returned as 64-bit signed integers --- */
345		case DEVINFO_INT_TOKEN_BYTES:               info->i = sizeof(zx8301_t);                  break;
346		case DEVINFO_INT_INLINE_CONFIG_BYTES:         info->i = 0;                           break;
347
348		/* --- the following bits of info are returned as pointers to data or functions --- */
349		case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(zx8301);      break;
350		case DEVINFO_FCT_STOP:                     /* Nothing */                           break;
351		case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(zx8301);      break;
352
353		/* --- the following bits of info are returned as NULL-terminated strings --- */
354		case DEVINFO_STR_NAME:                     strcpy(info->s, "Sinclair ZX8301");            break;
355		case DEVINFO_STR_FAMILY:                  strcpy(info->s, "Sinclair QL");               break;
356		case DEVINFO_STR_VERSION:                  strcpy(info->s, "1.0");                     break;
357		case DEVINFO_STR_SOURCE_FILE:               strcpy(info->s, __FILE__);                  break;
358		case DEVINFO_STR_CREDITS:                  strcpy(info->s, "Copyright MESS Team");         break;
359		}
360		}
361
362		DEFINE_LEGACY_DEVICE(ZX8301, zx8301);

src/mess/video/zx8301.h

r9714	r9715
30	30
31	31	**********************************************************************/
32	32
	33	#pragma once
	34
33	35	#ifndef __ZX8301__
34	36	#define __ZX8301__
35	37
36	38	#include "emu.h"
37		#include "devcb.h"
38	39
39		/***************************************************************************
40		MACROS / CONSTANTS
41		***************************************************************************/
42	40
43		DECLARE_LEGACY_DEVICE(ZX8301, zx8301);
44	41
	42	///*************************************************************************
	43	//   MACROS / CONSTANTS
	44	///*************************************************************************
	45
	46
	47
	48
	49	///*************************************************************************
	50	//  INTERFACE CONFIGURATION MACROS
	51	///*************************************************************************
	52
45	53	#define MDRV_ZX8301_ADD(_tag, _clock, _config) \
46	54	MDRV_DEVICE_ADD(_tag, ZX8301, _clock) \
47	55	MDRV_DEVICE_CONFIG(_config)
r9714	r9715
49	57	#define ZX8301_INTERFACE(name) \
50	58	const zx8301_interface(name) =
51	59
52		/***************************************************************************
53		TYPE DEFINITIONS
54		***************************************************************************/
55	60
56		typedef struct _zx8301_interface zx8301_interface;
57		struct _zx8301_interface
58		{
59		const char *cpu_tag;      /* cpu we are working with */
60		const char *screen_tag;      /* screen we are acting on */
61	61
62		/* this gets called for every memory read */
63		devcb_read8         in_ram_func;
	62	///*************************************************************************
	63	//   TYPE DEFINITIONS
	64	///*************************************************************************
64	65
65		/* this gets called for every memory write */
66		devcb_write8      out_ram_func;
	66	// ======================> zx8301_interface
67	67
68		/* this gets called for every change of the VSYNC pin (pin 11) */
	68	struct zx8301_interface
	69	{
	70	const char *cpu_tag;
	71	const char *screen_tag;
	72
69	73	devcb_write_line   out_vsync_func;
70	74	};
71	75
72		/***************************************************************************
73		PROTOTYPES
74		***************************************************************************/
75	76
76		/* register access */
77		WRITE8_DEVICE_HANDLER( zx8301_control_w );
78	77
79		/* palette initialization */
80		PALETTE_INIT( zx8301 );
	78	// ======================> zx8301_device_config
81	79
82		/* memory access */
83		READ8_DEVICE_HANDLER( zx8301_ram_r );
84		WRITE8_DEVICE_HANDLER( zx8301_ram_w );
	80	class zx8301_device_config :   public device_config,
	81	public device_config_memory_interface,
	82	public zx8301_interface
	83	{
	84	friend class zx8301_device;
85	85
86		/* screen update */
87		void zx8301_update(running_device *device, bitmap_t *bitmap, const rectangle *cliprect);
	86	// construction/destruction
	87	zx8301_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
88	88
	89	public:
	90	// allocators
	91	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	92	virtual device_t *alloc_device(running_machine &machine) const;
	93
	94	protected:
	95	// device_config overrides
	96	virtual void device_config_complete();
	97
	98	// device_config_memory_interface overrides
	99	virtual const address_space_config *memory_space_config(int spacenum = 0) const;
	100
	101	// address space configurations
	102	const address_space_config      m_space_config;
	103	};
	104
	105
	106
	107	// ======================> zx8301_device
	108
	109	class zx8301_device :   public device_t,
	110	public device_memory_interface
	111	{
	112	friend class zx8301_device_config;
	113
	114	// construction/destruction
	115	zx8301_device(running_machine &_machine, const zx8301_device_config &_config);
	116
	117	public:
	118	DECLARE_WRITE8_MEMBER( control_w );
	119	DECLARE_READ8_MEMBER( data_r );
	120	DECLARE_WRITE8_MEMBER( data_w );
	121
	122	void update_screen(bitmap_t *bitmap, const rectangle *cliprect);
	123
	124	protected:
	125	// device-level overrides
	126	virtual void device_start();
	127	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
	128
	129	inline UINT8 readbyte(offs_t address);
	130	inline void writebyte(offs_t address, UINT8 data);
	131
	132	void draw_line_mode4(bitmap_t *bitmap, int y, UINT16 da);
	133	void draw_line_mode8(bitmap_t *bitmap, int y, UINT16 da);
	134
	135	private:
	136	static const device_timer_id TIMER_VSYNC = 0;
	137	static const device_timer_id TIMER_FLASH = 1;
	138
	139	devcb_resolved_write_line   m_out_vsync_func;
	140
	141	cpu_device *m_cpu;
	142	screen_device *m_screen;
	143	address_space *m_data;
	144
	145	int m_dispoff;               // display off
	146	int m_mode8;               // mode8 active
	147	int m_base;                  // video ram base address
	148	int m_flash;               // flash
	149	int m_vsync;               // vertical sync
	150	int m_vda;                  // valid data address
	151
	152	emu_timer *m_vsync_timer;      // vertical sync timer
	153	emu_timer *m_flash_timer;      // flash timer
	154
	155	const zx8301_device_config &m_config;
	156	};
	157
	158
	159	// device type definition
	160	extern const device_type ZX8301;
	161
	162
	163
89	164	#endif

src/mess/includes/ql.h

r9714	r9715
8	8	#define I8051_TAG   "i8051"
9	9	#define ZX8301_TAG   "ic22"
10	10	#define ZX8302_TAG   "ic23"
	11	#define SPEAKER_TAG   "speaker"
11	12
12	13	#define MDV1_TAG   "mdv1"
13	14	#define MDV2_TAG   "mdv2"
r9714	r9715
22	23	{
23	24	public:
24	25	ql_state(running_machine &machine, const driver_device_config_base &config)
25		: driver_device(machine, config) { }
	26	: driver_device(machine, config),
	27	m_maincpu(*this, M68008_TAG),
	28	m_ipc(*this, I8749_TAG),
	29	m_zx8301(*this, ZX8301_TAG),
	30	m_zx8302(*this, ZX8302_TAG),
	31	m_speaker(*this, SPEAKER_TAG),
	32	m_ram(*this, "messram")
	33	{ }
26	34
	35	required_device<cpu_device> m_maincpu;
	36	required_device<cpu_device> m_ipc;
	37	required_device<zx8301_device> m_zx8301;
	38	required_device<running_device> m_zx8302;
	39	required_device<running_device> m_speaker;
	40	required_device<running_device> m_ram;
	41
	42	virtual void machine_start();
	43
	44	virtual bool video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
	45
	46	DECLARE_WRITE8_MEMBER( ipc_w );
	47	DECLARE_WRITE8_MEMBER( ipc_port1_w );
	48	DECLARE_WRITE8_MEMBER( ipc_port2_w );
	49	DECLARE_READ8_MEMBER( ipc_port2_r );
	50	DECLARE_READ8_MEMBER( ipc_t1_r );
	51	DECLARE_READ8_MEMBER( ipc_bus_r );
	52	DECLARE_READ8_MEMBER( ql_ram_r );
	53	DECLARE_WRITE8_MEMBER( ql_ram_w );
	54	DECLARE_WRITE_LINE_MEMBER( ql_baudx4_w );
	55	DECLARE_WRITE_LINE_MEMBER( ql_comdata_w );
	56
27	57	/* IPC state */
28		UINT8 keylatch;
29		int ser1_txd;
30		int ser1_dtr;
31		int ser2_rxd;
32		int ser2_cts;
33		int ipl;
34		int comctl;
35		int comdata;
36		int baudx4;
37
38		/* devices */
39		running_device *zx8301;
40		running_device *zx8302;
	58	UINT8 m_keylatch;
	59	int m_ser1_txd;
	60	int m_ser1_dtr;
	61	int m_ser2_rxd;
	62	int m_ser2_cts;
	63	int m_ipl;
	64	int m_comdata;
	65	int m_baudx4;
41	66	};
42	67
43	68	#endif

src/mess/drivers/ql.c

r9714	r9715
10	10
11	11	TODO:
12	12
	13	- use resnet.h to create palette
13	14	- Tyche bios is broken
14	15	- several disk interfaces (720K/1.44MB/3.2MB)
15	16	- discrete sound
r9714	r9715
37	38
38	39	*/
39	40
	41	#define ADDRESS_MAP_MODERN
	42
40	43	#include "emu.h"
41		#include "cpu/mcs51/mcs51.h"
42		#include "includes/ql.h"
43		#include "cpu/mcs48/mcs48.h"
44	44	#include "cpu/m68000/m68000.h"
45		#include "devices/flopdrv.h"
46		#include "formats/basicdsk.h"
	45	#include "cpu/mcs48/mcs48.h"
	46	#include "cpu/mcs51/mcs51.h"
47	47	#include "devices/cartslot.h"
	48	#include "devices/flopdrv.h"
	49	#include "devices/messram.h"
48	50	#include "devices/microdrv.h"
49		#include "devices/snapquik.h"
	51	#include "formats/basicdsk.h"
	52	#include "machine/zx8302.h"
50	53	#include "sound/speaker.h"
51	54	#include "video/zx8301.h"
52		#include "machine/zx8302.h"
53		#include "devices/messram.h"
	55	#include "includes/ql.h"
54	56
55		static QUICKLOAD_LOAD( ql );
56
57	57	/* Intelligent Peripheral Controller (IPC) */
58	58
59		static WRITE8_HANDLER( ipc_w )
	59	WRITE8_MEMBER( ql_state::ipc_w )
60	60	{
61		ql_state *state = space->machine->driver_data<ql_state>();
62
63		// pulse COMCTL line
64
65		zx8302_comctl_w(state->zx8302, 0);
66		zx8302_comctl_w(state->zx8302, 1);
	61	zx8302_comctl_w(m_zx8302, 0);
	62	zx8302_comctl_w(m_zx8302, 1);
67	63	}
68	64
69		static WRITE8_HANDLER( ipc_port1_w )
	65	WRITE8_MEMBER( ql_state::ipc_port1_w )
70	66	{
71	67	/*
72	68
r9714	r9715
83	79
84	80	*/
85	81
86		ql_state *state = space->machine->driver_data<ql_state>();
87
88		state->keylatch = data;
	82	m_keylatch = data;
89	83	}
90	84
91		static WRITE8_HANDLER( ipc_port2_w )
	85	WRITE8_MEMBER( ql_state::ipc_port2_w )
92	86	{
93	87	/*
94	88
r9714	r9715
105	99
106	100	*/
107	101
108		running_device *speaker = space->machine->device("speaker");
109		ql_state *state = space->machine->driver_data<ql_state>();
110
111	102	int ipl = (BIT(data, 2) << 1) | BIT(data, 3);
112	103
113		if (ipl != state->ipl)
	104	if (ipl != m_ipl)
114	105	{
115	106	switch (ipl)
116	107	{
117	108	case 0:
118		cputag_set_input_line(space->machine, M68008_TAG, M68K_IRQ_7, ASSERT_LINE);
	109	cpu_set_input_line(m_maincpu, M68K_IRQ_7, ASSERT_LINE);
119	110	break;
120	111
121	112	case 1:
122	113	// CTRL-ALT-7 pressed
123		cputag_set_input_line(space->machine, M68008_TAG, M68K_IRQ_5, ASSERT_LINE);
	114	cpu_set_input_line(m_maincpu, M68K_IRQ_5, ASSERT_LINE);
124	115	break;
125	116
126	117	case 2:
127		cputag_set_input_line(space->machine, M68008_TAG, M68K_IRQ_2, ASSERT_LINE);
	118	cpu_set_input_line(m_maincpu, M68K_IRQ_2, ASSERT_LINE);
128	119	break;
129	120
130	121	case 3:
131		cputag_set_input_line(space->machine, M68008_TAG, M68K_IRQ_7, CLEAR_LINE);
	122	cpu_set_input_line(m_maincpu, M68K_IRQ_7, CLEAR_LINE);
132	123	break;
133	124	}
134	125
135		state->ipl = ipl;
	126	m_ipl = ipl;
136	127	}
137	128
138		speaker_level_w(speaker, BIT(data, 1));
	129	speaker_level_w(m_speaker, BIT(data, 1));
139	130
140		state->ser2_cts = BIT(data, 4);
141		state->ser1_dtr = BIT(data, 5);
	131	m_ser2_cts = BIT(data, 4);
	132	m_ser1_dtr = BIT(data, 5);
142	133
143		state->comdata = BIT(data, 7);
	134	m_comdata = BIT(data, 7);
144	135
145		zx8302_comdata_w(state->zx8302, BIT(data, 7));
	136	zx8302_comdata_w(m_zx8302, BIT(data, 7));
146	137	}
147	138
148		static READ8_HANDLER( ipc_port2_r )
	139	READ8_MEMBER( ql_state::ipc_port2_r )
149	140	{
150	141	/*
151	142
r9714	r9715
162	153
163	154	*/
164	155
165		ql_state *state = space->machine->driver_data<ql_state>();
	156	int irq = (m_ser2_rxd | m_ser1_txd);
166	157
167		int irq = (state->ser2_rxd | state->ser1_txd);
	158	cpu_set_input_line(m_ipc, INPUT_LINE_IRQ0, irq);
168	159
169		cputag_set_input_line(space->machine, I8749_TAG, INPUT_LINE_IRQ0, irq);
170
171		return (state->comdata << 7) | irq;
	160	return (m_comdata << 7) | irq;
172	161	}
173	162
174		static READ8_HANDLER( ipc_t1_r )
	163	READ8_MEMBER( ql_state::ipc_t1_r )
175	164	{
176		ql_state *state = space->machine->driver_data<ql_state>();
177
178		return state->baudx4;
	165	return m_baudx4;
179	166	}
180	167
181		static READ8_HANDLER( ipc_bus_r )
	168	READ8_MEMBER( ql_state::ipc_bus_r )
182	169	{
183		ql_state *state = space->machine->driver_data<ql_state>();
184
185	170	/*
186	171
187	172	bit     description
r9714	r9715
199	184
200	185	UINT8 data = 0;
201	186
202		if (BIT(state->keylatch, 0)) data |= input_port_read(space->machine, "ROW0") | input_port_read(space->machine, "JOY0");
203		if (BIT(state->keylatch, 1)) data |= input_port_read(space->machine, "ROW1") | input_port_read(space->machine, "JOY1");
204		if (BIT(state->keylatch, 2)) data |= input_port_read(space->machine, "ROW2");
205		if (BIT(state->keylatch, 3)) data |= input_port_read(space->machine, "ROW3");
206		if (BIT(state->keylatch, 4)) data |= input_port_read(space->machine, "ROW4");
207		if (BIT(state->keylatch, 5)) data |= input_port_read(space->machine, "ROW5");
208		if (BIT(state->keylatch, 6)) data |= input_port_read(space->machine, "ROW6");
209		if (BIT(state->keylatch, 7)) data |= input_port_read(space->machine, "ROW7");
	187	if (BIT(m_keylatch, 0)) data |= input_port_read(machine, "ROW0") | input_port_read(machine, "JOY0");
	188	if (BIT(m_keylatch, 1)) data |= input_port_read(machine, "ROW1") | input_port_read(machine, "JOY1");
	189	if (BIT(m_keylatch, 2)) data |= input_port_read(machine, "ROW2");
	190	if (BIT(m_keylatch, 3)) data |= input_port_read(machine, "ROW3");
	191	if (BIT(m_keylatch, 4)) data |= input_port_read(machine, "ROW4");
	192	if (BIT(m_keylatch, 5)) data |= input_port_read(machine, "ROW5");
	193	if (BIT(m_keylatch, 6)) data |= input_port_read(machine, "ROW6");
	194	if (BIT(m_keylatch, 7)) data |= input_port_read(machine, "ROW7");
210	195
211	196	return data;
212	197	}
213	198
214	199	/* Memory Maps */
215	200
216		static ADDRESS_MAP_START( ql_map, ADDRESS_SPACE_PROGRAM, 8 )
	201	static ADDRESS_MAP_START( ql_map, ADDRESS_SPACE_PROGRAM, 8, ql_state )
217	202	AM_RANGE(0x000000, 0x00bfff) AM_ROM   // 48K System ROM
218		AM_RANGE(0x00c000, 0x00ffff) AM_ROMBANK("bank1") // 16K Cartridge ROM
	203	AM_RANGE(0x00c000, 0x00ffff) AM_ROM // 16K Cartridge ROM
219	204	AM_RANGE(0x010000, 0x017fff) AM_UNMAP // 32K Expansion I/O
220		AM_RANGE(0x018000, 0x018003) AM_DEVREAD(ZX8302_TAG, zx8302_rtc_r)
221		AM_RANGE(0x018000, 0x018001) AM_DEVWRITE(ZX8302_TAG, zx8302_rtc_w)
222		AM_RANGE(0x018002, 0x018002) AM_DEVWRITE(ZX8302_TAG, zx8302_control_w)
223		AM_RANGE(0x018003, 0x018003) AM_DEVWRITE(ZX8302_TAG, zx8302_ipc_command_w)
224		AM_RANGE(0x018020, 0x018020) AM_DEVREADWRITE(ZX8302_TAG, zx8302_status_r, zx8302_mdv_control_w)
225		AM_RANGE(0x018021, 0x018021) AM_DEVREADWRITE(ZX8302_TAG, zx8302_irq_status_r, zx8302_irq_acknowledge_w)
226		AM_RANGE(0x018022, 0x018022) AM_DEVREADWRITE(ZX8302_TAG, zx8302_mdv_track_r, zx8302_data_w)
227		AM_RANGE(0x018023, 0x018023) AM_DEVREAD(ZX8302_TAG, zx8302_mdv_track_r) AM_WRITENOP
228		AM_RANGE(0x018063, 0x018063) AM_DEVWRITE(ZX8301_TAG, zx8301_control_w)
	205	AM_RANGE(0x018000, 0x018003) AM_DEVREAD_LEGACY(ZX8302_TAG, zx8302_rtc_r)
	206	AM_RANGE(0x018000, 0x018001) AM_DEVWRITE_LEGACY(ZX8302_TAG, zx8302_rtc_w)
	207	AM_RANGE(0x018002, 0x018002) AM_DEVWRITE_LEGACY(ZX8302_TAG, zx8302_control_w)
	208	AM_RANGE(0x018003, 0x018003) AM_DEVWRITE_LEGACY(ZX8302_TAG, zx8302_ipc_command_w)
	209	AM_RANGE(0x018020, 0x018020) AM_DEVREADWRITE_LEGACY(ZX8302_TAG, zx8302_status_r, zx8302_mdv_control_w)
	210	AM_RANGE(0x018021, 0x018021) AM_DEVREADWRITE_LEGACY(ZX8302_TAG, zx8302_irq_status_r, zx8302_irq_acknowledge_w)
	211	AM_RANGE(0x018022, 0x018022) AM_DEVREADWRITE_LEGACY(ZX8302_TAG, zx8302_mdv_track_r, zx8302_data_w)
	212	AM_RANGE(0x018023, 0x018023) AM_DEVREAD_LEGACY(ZX8302_TAG, zx8302_mdv_track_r) AM_WRITENOP
	213	AM_RANGE(0x018063, 0x018063) AM_DEVWRITE(ZX8301_TAG, zx8301_device, control_w)
229	214	AM_RANGE(0x01c000, 0x01ffff) AM_UNMAP // 16K Expansion I/O
230		AM_RANGE(0x020000, 0x03ffff) AM_DEVREADWRITE(ZX8301_TAG, zx8301_ram_r, zx8301_ram_w)
231		AM_RANGE(0x040000, 0x0fffff) AM_RAMBANK("bank2")
	215	AM_RANGE(0x020000, 0x03ffff) AM_DEVREADWRITE(ZX8301_TAG, zx8301_device, data_r, data_w)
	216	AM_RANGE(0x040000, 0x0fffff) AM_RAM
232	217	ADDRESS_MAP_END
233	218
234		static ADDRESS_MAP_START( ipc_io_map, ADDRESS_SPACE_IO, 8 )
	219	static ADDRESS_MAP_START( ipc_io_map, ADDRESS_SPACE_IO, 8, ql_state )
235	220	AM_RANGE(0x00, 0x7f) AM_WRITE(ipc_w)
236	221	AM_RANGE(0x27, 0x28) AM_READNOP // IPC reads these to set P0 (bus) to Hi-Z mode
237	222	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(ipc_port1_w)
r9714	r9715
470	455
471	456	/* ZX8301 Interface */
472	457
473		static READ8_HANDLER( ql_ram_r )
474		{
475		return messram_get_ptr(space->machine->device("messram"))[offset];
476		}
477
478		static WRITE8_HANDLER( ql_ram_w )
479		{
480		messram_get_ptr(space->machine->device("messram"))[offset] = data;
481		}
482
483	458	static ZX8301_INTERFACE( ql_zx8301_intf )
484	459	{
485	460	M68008_TAG,
486	461	SCREEN_TAG,
487		DEVCB_MEMORY_HANDLER(M68008_TAG, PROGRAM, ql_ram_r),
488		DEVCB_MEMORY_HANDLER(M68008_TAG, PROGRAM, ql_ram_w),
489	462	DEVCB_DEVICE_LINE(ZX8302_TAG, zx8302_vsync_w)
490	463	};
491	464
492	465	/* ZX8302 Interface */
493	466
494		static WRITE_LINE_DEVICE_HANDLER( ql_baudx4_w )
	467	WRITE_LINE_MEMBER( ql_state::ql_baudx4_w )
495	468	{
496		ql_state *driver_state = device->machine->driver_data<ql_state>();
497
498		driver_state->baudx4 = state;
	469	m_baudx4 = state;
499	470	}
500	471
501		static WRITE_LINE_DEVICE_HANDLER( ql_comdata_w )
	472	WRITE_LINE_MEMBER( ql_state::ql_comdata_w )
502	473	{
503		ql_state *driver_state = device->machine->driver_data<ql_state>();
504
505		driver_state->comdata = state;
	474	m_comdata = state;
506	475	}
507	476
508	477	static ZX8302_INTERFACE( ql_zx8302_intf )
r9714	r9715
511	480	MDV1_TAG,
512	481	MDV2_TAG,
513	482	DEVCB_CPU_INPUT_LINE(M68008_TAG, M68K_IRQ_2),
514		DEVCB_LINE(ql_baudx4_w),
515		DEVCB_LINE(ql_comdata_w)
	483	DEVCB_DRIVER_LINE_MEMBER(ql_state, ql_baudx4_w),
	484	DEVCB_DRIVER_LINE_MEMBER(ql_state, ql_comdata_w)
516	485	};
517	486
518		static VIDEO_UPDATE( ql )
	487	static PALETTE_INIT( ql )
519	488	{
520		ql_state *state = screen->machine->driver_data<ql_state>();
	489	palette_set_color_rgb(machine, 0, 0x00, 0x00, 0x00 ); // black
	490	palette_set_color_rgb(machine, 1, 0x00, 0x00, 0xff ); // blue
	491	palette_set_color_rgb(machine, 2, 0xff, 0x00, 0x00 ); // red
	492	palette_set_color_rgb(machine, 3, 0xff, 0x00, 0xff ); // magenta
	493	palette_set_color_rgb(machine, 4, 0x00, 0xff, 0x00 ); // green
	494	palette_set_color_rgb(machine, 5, 0x00, 0xff, 0xff ); // cyan
	495	palette_set_color_rgb(machine, 6, 0xff, 0xff, 0x00 ); // yellow
	496	palette_set_color_rgb(machine, 7, 0xff, 0xff, 0xff ); // white
	497	}
521	498
522		zx8301_update(state->zx8301, bitmap, cliprect);
	499	bool ql_state::video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
	500	{
	501	m_zx8301->update_screen(&bitmap, &cliprect);
523	502
524	503	return 0;
525	504	}
526	505
527	506	/* Machine Drivers */
528	507
529		static MACHINE_START( ql )
	508	void ql_state::machine_start()
530	509	{
531		ql_state *state = machine->driver_data<ql_state>();
	510	address_space *program = cpu_get_address_space(m_maincpu, ADDRESS_SPACE_PROGRAM);
532	511
533		address_space *program = cputag_get_address_space(machine, M68008_TAG, ADDRESS_SPACE_PROGRAM);
534
535		/* configure ROM cartridge */
536
537		memory_unmap_readwrite(program, 0x00c000, 0x00ffff, 0, 0);
538		memory_configure_bank(machine, "bank1", 0, 1, memory_region(machine, M68008_TAG) + 0x00c000, 0);
539		memory_set_bank(machine, "bank1", 0);
540
541		/* configure RAM */
542
543		switch (messram_get_size(machine->device("messram")))
	512	// configure RAM
	513	switch (messram_get_size(m_ram))
544	514	{
545	515	case 128*1024:
546	516	memory_unmap_readwrite(program, 0x040000, 0x0fffff, 0, 0);
547	517	break;
548	518
549	519	case 192*1024:
550		memory_install_readwrite_bank(program, 0x040000, 0x04ffff, 0, 0, "bank2");
551	520	memory_unmap_readwrite(program, 0x050000, 0x0fffff, 0, 0);
552	521	break;
553	522
554	523	case 256*1024:
555		memory_install_readwrite_bank(program, 0x040000, 0x05ffff, 0, 0, "bank2");
556	524	memory_unmap_readwrite(program, 0x060000, 0x0fffff, 0, 0);
557	525	break;
558	526
559	527	case 384*1024:
560		memory_install_readwrite_bank(program, 0x040000, 0x07ffff, 0, 0, "bank2");
561	528	memory_unmap_readwrite(program, 0x080000, 0x0fffff, 0, 0);
562	529	break;
563	530
564	531	case 640*1024:
565		memory_install_readwrite_bank(program, 0x040000, 0x0bffff, 0, 0, "bank2");
566	532	memory_unmap_readwrite(program, 0x0c0000, 0x0fffff, 0, 0);
567	533	break;
568
569		case 896*1024:
570		memory_install_readwrite_bank(program, 0x040000, 0x0fffff, 0, 0, "bank2");
571		break;
572	534	}
573	535
574		memory_configure_bank(machine, "bank2", 0, 1, memory_region(machine, M68008_TAG) + 0x050000, 0);
575		memory_set_bank(machine, "bank2", 0);
576
577		// find devices
578
579		state->zx8301 = machine->device(ZX8301_TAG);
580		state->zx8302 = machine->device(ZX8302_TAG);
581
582	536	// register for state saving
583
584		state_save_register_global(machine, state->keylatch);
585		state_save_register_global(machine, state->ser1_txd);
586		state_save_register_global(machine, state->ser1_dtr);
587		state_save_register_global(machine, state->ser2_rxd);
588		state_save_register_global(machine, state->ser2_cts);
589		state_save_register_global(machine, state->ipl);
590		state_save_register_global(machine, state->comdata);
591		state_save_register_global(machine, state->comctl);
592		state_save_register_global(machine, state->baudx4);
	537	state_save_register_global(machine, m_keylatch);
	538	state_save_register_global(machine, m_ser1_txd);
	539	state_save_register_global(machine, m_ser1_dtr);
	540	state_save_register_global(machine, m_ser2_rxd);
	541	state_save_register_global(machine, m_ser2_cts);
	542	state_save_register_global(machine, m_ipl);
	543	state_save_register_global(machine, m_comdata);
	544	state_save_register_global(machine, m_baudx4);
593	545	}
594	546
595		static DEVICE_IMAGE_LOAD( ql_cart )
596		{
597		//  UINT8 *ptr = memory_region(image.device().machine, M68008_TAG) + 0x00c000;
598		//  int filesize = image.length();
599		//
600		//  if (filesize <= 16 * 1024)
601		//  {
602		//      if (image.fread( ptr, filesize) == filesize)
603		//      {
604		//          memory_install_read_bank(cputag_get_address_space(image.device().machine, M68008_TAG, ADDRESS_SPACE_PROGRAM), 0x00c000, 0x00ffff, 0, 0, "bank1");
605		//          memory_unmap_write(cputag_get_address_space(image.device().machine, M68008_TAG, ADDRESS_SPACE_PROGRAM), 0x00c000, 0x00ffff, 0, 0);
606		//
607		//          return IMAGE_INIT_PASS;
608		//      }
609		//  }
610		//
611		return IMAGE_INIT_FAIL;
612		}
613
614
615		static FLOPPY_OPTIONS_START(ql)
	547	static FLOPPY_OPTIONS_START( ql )
616	548	FLOPPY_OPTION(ql, "dsk", "SSSD disk image", basicdsk_identify_default, basicdsk_construct_default,
617	549	HEADS([1])
618	550	TRACKS([40])
r9714	r9715
658	590	};
659	591
660	592	static MACHINE_CONFIG_START( ql, ql_state )
661
662	593	// basic machine hardware
663	594	MDRV_CPU_ADD(M68008_TAG, M68008, X1/2)
664	595	MDRV_CPU_PROGRAM_MAP(ql_map)
r9714	r9715
666	597	MDRV_CPU_ADD(I8749_TAG, I8749, X4)
667	598	MDRV_CPU_IO_MAP(ipc_io_map)
668	599
669		MDRV_MACHINE_START(ql)
670
671	600	MDRV_ZX8302_ADD(ZX8302_TAG, X1, ql_zx8302_intf)
672	601
673	602	MDRV_DEVICE_ADD(MDV1_TAG, MICRODRIVE, 0)
674	603	MDRV_DEVICE_ADD(MDV2_TAG, MICRODRIVE, 0)
675	604
676	605	// video hardware
677
678	606	MDRV_SCREEN_ADD(SCREEN_TAG, RASTER)
679	607	MDRV_SCREEN_REFRESH_RATE(50.08)
680	608	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
r9714	r9715
683	611	MDRV_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
684	612
685	613	MDRV_PALETTE_LENGTH(8)
686		MDRV_PALETTE_INIT(zx8301)
687		MDRV_VIDEO_UPDATE(ql)
	614	MDRV_PALETTE_INIT(ql)
688	615
689	616	MDRV_ZX8301_ADD(ZX8301_TAG, X1, ql_zx8301_intf)
690	617
r9714	r9715
693	620	MDRV_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
694	621	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
695	622
696		/* quickload */
697		MDRV_QUICKLOAD_ADD("quickload", ql, "bas", 0)
698
699	623	/* cartridge */
700	624	MDRV_CARTSLOT_ADD("cart")
701		MDRV_CARTSLOT_EXTENSION_LIST("bin")
	625	MDRV_CARTSLOT_EXTENSION_LIST("bin,rom")
702	626	MDRV_CARTSLOT_NOT_MANDATORY
703		MDRV_CARTSLOT_LOAD(ql_cart)
704	627
705	628	MDRV_FLOPPY_2_DRIVES_ADD(ql_floppy_config)
706	629
r9714	r9715
711	634	MACHINE_CONFIG_END
712	635
713	636	static MACHINE_CONFIG_DERIVED( ql_ntsc, ql )
714
715	637	MDRV_SCREEN_MODIFY(SCREEN_TAG)
716	638	MDRV_SCREEN_REFRESH_RATE(60)
717	639	MDRV_SCREEN_SIZE(960, 262)
r9714	r9715
719	641	MACHINE_CONFIG_END
720	642
721	643	static MACHINE_CONFIG_DERIVED( opd, ql )
722
723	644	/* internal ram */
724	645	MDRV_RAM_MODIFY("messram")
725	646	MDRV_RAM_DEFAULT_SIZE("128K")
r9714	r9715
727	648	MACHINE_CONFIG_END
728	649
729	650	static MACHINE_CONFIG_DERIVED( megaopd, ql )
730
731	651	/* internal ram */
732	652	MDRV_RAM_MODIFY("messram")
733	653	MDRV_RAM_DEFAULT_SIZE("256K")
r9714	r9715
735	655
736	656	/* ROMs */
737	657
738		#define ROM_IPC   \
739		ROM_REGION( 0x800, I8749_TAG, 0 )\
740		ROM_LOAD( "ipc8049.ic24", 0x0000, 0x0800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
741
742	658	ROM_START( ql )
743		ROM_REGION( 0x400000, M68008_TAG, 0 )
744		ROM_SYSTEM_BIOS( 0, "default", "v1.10 (JS)" )
745		ROMX_LOAD( "ql.js 0000.ic33", 0x000000, 0x008000, CRC(1bbad3b8) SHA1(59fd4372771a630967ee102760f4652904d7d5fa), ROM_BIOS(1) )
746		ROMX_LOAD( "ql.js 8000.ic34", 0x008000, 0x004000, CRC(c970800e) SHA1(b8c9203026a7de6a44bd0942ec9343e8b222cb41), ROM_BIOS(1) )
747
748		ROM_SYSTEM_BIOS( 1, "tb", "v1.0? (TB)" )
749		ROMX_LOAD( "tb.ic33", 0x000000, 0x008000, BAD_DUMP CRC(1c86d688) SHA1(7df8028e6671afc4ebd5f65bf6c2d6019181f239), ROM_BIOS(2) )
750		ROMX_LOAD( "tb.ic34", 0x008000, 0x004000, BAD_DUMP CRC(de7f9669) SHA1(9d6bc0b794541a4cec2203256ae92c7e68d1011d), ROM_BIOS(2) )
751
752		ROM_SYSTEM_BIOS( 2, "jm", "v1.03 (JM)" )
753		ROMX_LOAD( "ql.jm 0000.ic33", 0x000000, 0x008000, CRC(1f8e840a) SHA1(7929e716dfe88318bbe99e34f47d039957fe3cc0), ROM_BIOS(3) )
754		ROMX_LOAD( "ql.jm 8000.ic34", 0x008000, 0x004000, CRC(9168a2e9) SHA1(1e7c47a59fc40bd96dfefc2f4d86827c15f0199e), ROM_BIOS(3) )
755
756		ROM_SYSTEM_BIOS( 3, "ah", "v1.02 (AH)" )
757		ROMX_LOAD( "ah.ic33.1", 0x000000, 0x004000, BAD_DUMP CRC(a9b4d2df) SHA1(142d6f01a9621aff5e0ad678bd3cbf5cde0db801), ROM_BIOS(4) )
758		ROMX_LOAD( "ah.ic33.2", 0x004000, 0x004000, BAD_DUMP CRC(36488e4e) SHA1(ff6f597b30ea03ce480a3d6728fd1d858da34d6a), ROM_BIOS(4) )
759		ROMX_LOAD( "ah.ic34",   0x008000, 0x004000, BAD_DUMP CRC(61259d4c) SHA1(bdd10d111e7ba488551a27c8d3b2743917ff1307), ROM_BIOS(4) )
760
761		ROM_SYSTEM_BIOS( 4, "pm", "v1.01 (PM)" )
762		ROMX_LOAD( "pm.ic33", 0x000000, 0x008000, NO_DUMP, ROM_BIOS(5) )
763		ROMX_LOAD( "pm.ic34", 0x008000, 0x004000, NO_DUMP, ROM_BIOS(5) )
764
765		ROM_SYSTEM_BIOS( 5, "fb", "v1.00 (FB)" )
766		ROMX_LOAD( "fb.ic33", 0x000000, 0x008000, NO_DUMP, ROM_BIOS(6) )
767		ROMX_LOAD( "fb.ic34", 0x008000, 0x004000, NO_DUMP, ROM_BIOS(6) )
768
	659	ROM_REGION( 0x10000, M68008_TAG, 0 )
	660	ROM_DEFAULT_BIOS("js")
	661	ROM_SYSTEM_BIOS( 0, "fb", "v1.00 (FB)" )
	662	ROMX_LOAD( "fb.ic33", 0x0000, 0x8000, NO_DUMP, ROM_BIOS(1) )
	663	ROMX_LOAD( "fb.ic34", 0x8000, 0x4000, NO_DUMP, ROM_BIOS(1) )
	664	ROM_SYSTEM_BIOS( 1, "pm", "v1.01 (PM)" )
	665	ROMX_LOAD( "pm.ic33", 0x0000, 0x8000, NO_DUMP, ROM_BIOS(2) )
	666	ROMX_LOAD( "pm.ic34", 0x8000, 0x4000, NO_DUMP, ROM_BIOS(2) )
	667	ROM_SYSTEM_BIOS( 2, "ah", "v1.02 (AH)" )
	668	ROMX_LOAD( "ah.ic33.1", 0x0000, 0x4000, BAD_DUMP CRC(a9b4d2df) SHA1(142d6f01a9621aff5e0ad678bd3cbf5cde0db801), ROM_BIOS(3) )
	669	ROMX_LOAD( "ah.ic33.2", 0x4000, 0x4000, BAD_DUMP CRC(36488e4e) SHA1(ff6f597b30ea03ce480a3d6728fd1d858da34d6a), ROM_BIOS(3) )
	670	ROMX_LOAD( "ah.ic34",   0x8000, 0x4000, BAD_DUMP CRC(61259d4c) SHA1(bdd10d111e7ba488551a27c8d3b2743917ff1307), ROM_BIOS(3) )
	671	ROM_SYSTEM_BIOS( 3, "jm", "v1.03 (JM)" )
	672	ROMX_LOAD( "ql.jm 0000.ic33", 0x0000, 0x8000, CRC(1f8e840a) SHA1(7929e716dfe88318bbe99e34f47d039957fe3cc0), ROM_BIOS(4) )
	673	ROMX_LOAD( "ql.jm 8000.ic34", 0x8000, 0x4000, CRC(9168a2e9) SHA1(1e7c47a59fc40bd96dfefc2f4d86827c15f0199e), ROM_BIOS(4) )
	674	ROM_SYSTEM_BIOS( 4, "tb", "v1.0? (TB)" )
	675	ROMX_LOAD( "tb.ic33", 0x0000, 0x8000, BAD_DUMP CRC(1c86d688) SHA1(7df8028e6671afc4ebd5f65bf6c2d6019181f239), ROM_BIOS(5) )
	676	ROMX_LOAD( "tb.ic34", 0x8000, 0x4000, BAD_DUMP CRC(de7f9669) SHA1(9d6bc0b794541a4cec2203256ae92c7e68d1011d), ROM_BIOS(5) )
	677	ROM_SYSTEM_BIOS( 5, "js", "v1.10 (JS)" )
	678	ROMX_LOAD( "ql.js 0000.ic33", 0x0000, 0x8000, CRC(1bbad3b8) SHA1(59fd4372771a630967ee102760f4652904d7d5fa), ROM_BIOS(6) )
	679	ROMX_LOAD( "ql.js 8000.ic34", 0x8000, 0x4000, CRC(c970800e) SHA1(b8c9203026a7de6a44bd0942ec9343e8b222cb41), ROM_BIOS(6) )
769	680	ROM_SYSTEM_BIOS( 6, "tyche", "v2.05 (Tyche)" )
770		ROMX_LOAD( "tyche.rom", 0x000000, 0x010000, CRC(8724b495) SHA1(5f33a1bc3f23fd09c31844b65bc3aca7616f180a), ROM_BIOS(7) )
771
	681	ROMX_LOAD( "tyche.rom", 0x0000, 0x010000, CRC(8724b495) SHA1(5f33a1bc3f23fd09c31844b65bc3aca7616f180a), ROM_BIOS(7) )
772	682	ROM_SYSTEM_BIOS( 7, "min189", "Minerva v1.89" )
773		ROMX_LOAD( "minerva.rom", 0x000000, 0x00c000, BAD_DUMP CRC(930befe3) SHA1(84a99c4df13b97f90baf1ec8cb6c2e52e3e1bb4d), ROM_BIOS(8) )
	683	ROMX_LOAD( "minerva.rom", 0x0000, 0x00c000, BAD_DUMP CRC(930befe3) SHA1(84a99c4df13b97f90baf1ec8cb6c2e52e3e1bb4d), ROM_BIOS(8) )
	684	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
774	685
775		ROM_IPC
776		/*
777		ROM_REGION( 0x400, "plds", 0 )
	686	ROM_REGION( 0x800, I8749_TAG, 0 )
	687	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	688
	689	ROM_REGION( 0x400, "plds", 0 )
778	690	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
779		*/
780	691	ROM_END
781	692
782	693	ROM_START( ql_us )
783		ROM_REGION( 0x400000, M68008_TAG, 0 )
784		ROM_LOAD( "jsu.ic33", 0x000000, 0x008000, BAD_DUMP CRC(e397f49f) SHA1(c06f92eabaf3e6dd298c51cb7f7535d8ef0ef9c5) )
785		ROM_LOAD( "jsu.ic34", 0x008000, 0x004000, BAD_DUMP CRC(3debbacc) SHA1(9fbc3e42ec463fa42f9c535d63780ff53a9313ec) )
	694	ROM_REGION( 0x10000, M68008_TAG, 0 )
	695	ROM_LOAD( "jsu.ic33", 0x0000, 0x8000, BAD_DUMP CRC(e397f49f) SHA1(c06f92eabaf3e6dd298c51cb7f7535d8ef0ef9c5) )
	696	ROM_LOAD( "jsu.ic34", 0x8000, 0x4000, BAD_DUMP CRC(3debbacc) SHA1(9fbc3e42ec463fa42f9c535d63780ff53a9313ec) )
	697	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
786	698
787		ROM_IPC
	699	ROM_REGION( 0x800, I8749_TAG, 0 )
	700	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	701
	702	ROM_REGION( 0x400, "plds", 0 )
	703	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
788	704	ROM_END
789	705
790	706	ROM_START( ql_es )
791		ROM_REGION( 0x400000, M68008_TAG, 0 )
792		ROM_LOAD( "mge.ic33", 0x000000, 0x008000, BAD_DUMP CRC(d5293bde) SHA1(bf5af7e53a472d4e9871f182210787d601db0634) )
793		ROM_LOAD( "mge.ic34", 0x008000, 0x004000, BAD_DUMP CRC(a694f8d7) SHA1(bd2868656008de85d7c191598588017ae8aa3339) )
	707	ROM_REGION( 0x10000, M68008_TAG, 0 )
	708	ROM_LOAD( "mge.ic33", 0x0000, 0x8000, BAD_DUMP CRC(d5293bde) SHA1(bf5af7e53a472d4e9871f182210787d601db0634) )
	709	ROM_LOAD( "mge.ic34", 0x8000, 0x4000, BAD_DUMP CRC(a694f8d7) SHA1(bd2868656008de85d7c191598588017ae8aa3339) )
	710	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
794	711
795		ROM_IPC
	712	ROM_REGION( 0x800, I8749_TAG, 0 )
	713	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	714
	715	ROM_REGION( 0x400, "plds", 0 )
	716	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
796	717	ROM_END
797	718
798	719	ROM_START( ql_fr )
799		ROM_REGION( 0x400000, M68008_TAG, 0 )
800		ROM_LOAD( "mgf.ic33", 0x000000, 0x008000, NO_DUMP )
801		ROM_LOAD( "mgf.ic34", 0x008000, 0x004000, NO_DUMP )
	720	ROM_REGION( 0x10000, M68008_TAG, 0 )
	721	ROM_LOAD( "mgf.ic33", 0x0000, 0x8000, NO_DUMP )
	722	ROM_LOAD( "mgf.ic34", 0x8000, 0x4000, NO_DUMP )
	723	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
802	724
803		ROM_IPC
	725	ROM_REGION( 0x800, I8749_TAG, 0 )
	726	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	727
	728	ROM_REGION( 0x400, "plds", 0 )
	729	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
804	730	ROM_END
805	731
806	732	ROM_START( ql_de )
807		ROM_REGION( 0x400000, M68008_TAG, 0 )
808		ROM_SYSTEM_BIOS( 0, "default", "v1.10 (MG)" )
809		ROMX_LOAD( "mgg.ic33", 0x000000, 0x008000, BAD_DUMP CRC(b4e468fd) SHA1(cd02a3cd79af90d48b65077d0571efc2f12f146e), ROM_BIOS(1) )
810		ROMX_LOAD( "mgg.ic34", 0x008000, 0x004000, BAD_DUMP CRC(54959d40) SHA1(ffc0be9649f26019d7be82925c18dc699259877f), ROM_BIOS(1) )
811
	733	ROM_REGION( 0x10000, M68008_TAG, 0 )
	734	ROM_SYSTEM_BIOS( 0, "mg", "v1.10 (MG)" )
	735	ROMX_LOAD( "mgg.ic33", 0x0000, 0x8000, BAD_DUMP CRC(b4e468fd) SHA1(cd02a3cd79af90d48b65077d0571efc2f12f146e), ROM_BIOS(1) )
	736	ROMX_LOAD( "mgg.ic34", 0x8000, 0x4000, BAD_DUMP CRC(54959d40) SHA1(ffc0be9649f26019d7be82925c18dc699259877f), ROM_BIOS(1) )
812	737	ROM_SYSTEM_BIOS( 1, "mf", "v1.14 (MF)" )
813		ROMX_LOAD( "mf.ic33", 0x000000, 0x008000, BAD_DUMP CRC(49c40563) SHA1(d3bcd0614cf9b52e9d7fc2832e11463e5030476b), ROM_BIOS(2) )
814		ROMX_LOAD( "mf.ic34", 0x008000, 0x004000, BAD_DUMP CRC(5974616b) SHA1(c3603768c08535c25f077eed02fb80128aff13d9), ROM_BIOS(2) )
815
	738	ROMX_LOAD( "mf.ic33", 0x0000, 0x8000, BAD_DUMP CRC(49c40563) SHA1(d3bcd0614cf9b52e9d7fc2832e11463e5030476b), ROM_BIOS(2) )
	739	ROMX_LOAD( "mf.ic34", 0x8000, 0x4000, BAD_DUMP CRC(5974616b) SHA1(c3603768c08535c25f077eed02fb80128aff13d9), ROM_BIOS(2) )
816	740	ROM_SYSTEM_BIOS( 2, "ultramg", "Ultrasoft" )
817		ROMX_LOAD( "ultramg.rom", 0x000000, 0x00c000, BAD_DUMP CRC(ad12463b) SHA1(0561b3bc7ce090f3101b2142ee957c18c250eefa), ROM_BIOS(3) )
	741	ROMX_LOAD( "ultramg.rom", 0x0000, 0x00c000, BAD_DUMP CRC(ad12463b) SHA1(0561b3bc7ce090f3101b2142ee957c18c250eefa), ROM_BIOS(3) )
	742	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
818	743
819		ROM_IPC
	744	ROM_REGION( 0x800, I8749_TAG, 0 )
	745	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	746
	747	ROM_REGION( 0x400, "plds", 0 )
	748	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
820	749	ROM_END
821	750
822	751	ROM_START( ql_it )
823		ROM_REGION( 0x400000, M68008_TAG, 0 )
824		ROM_LOAD( "mgi.ic33", 0x000000, 0x008000, BAD_DUMP CRC(d5293bde) SHA1(bf5af7e53a472d4e9871f182210787d601db0634) )
825		ROM_LOAD( "mgi.ic34", 0x008000, 0x004000, BAD_DUMP CRC(a2fdfb83) SHA1(162b1052737500f3c13497cdf0f813ba006bdae9) )
	752	ROM_REGION( 0x10000, M68008_TAG, 0 )
	753	ROM_LOAD( "mgi.ic33", 0x0000, 0x8000, BAD_DUMP CRC(d5293bde) SHA1(bf5af7e53a472d4e9871f182210787d601db0634) )
	754	ROM_LOAD( "mgi.ic34", 0x8000, 0x4000, BAD_DUMP CRC(a2fdfb83) SHA1(162b1052737500f3c13497cdf0f813ba006bdae9) )
	755	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
826	756
827		ROM_IPC
	757	ROM_REGION( 0x800, I8749_TAG, 0 )
	758	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	759
	760	ROM_REGION( 0x400, "plds", 0 )
	761	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
828	762	ROM_END
829	763
830	764	ROM_START( ql_se )
831		ROM_REGION( 0x400000, M68008_TAG, 0 )
832		ROM_LOAD( "mgs.ic33", 0x000000, 0x008000, NO_DUMP )
833		ROM_LOAD( "mgs.ic34", 0x008000, 0x004000, NO_DUMP )
	765	ROM_REGION( 0x10000, M68008_TAG, 0 )
	766	ROM_LOAD( "mgs.ic33", 0x0000, 0x8000, NO_DUMP )
	767	ROM_LOAD( "mgs.ic34", 0x8000, 0x4000, NO_DUMP )
	768	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
834	769
835		ROM_IPC
	770	ROM_REGION( 0x800, I8749_TAG, 0 )
	771	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	772
	773	ROM_REGION( 0x400, "plds", 0 )
	774	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
836	775	ROM_END
837	776
838	777	ROM_START( ql_gr )
839		ROM_REGION( 0x400000, M68008_TAG, 0 )
840		ROM_LOAD( "efp.ic33", 0x000000, 0x008000, BAD_DUMP CRC(eb181641) SHA1(43c1e0215cf540cbbda240b1048910ff55681059) )
841		ROM_LOAD( "efp.ic34", 0x008000, 0x004000, BAD_DUMP CRC(4c3b34b7) SHA1(f9dc571d2d4f68520b306ecc7516acaeea69ec0d) )
	778	ROM_REGION( 0x10000, M68008_TAG, 0 )
	779	ROM_LOAD( "efp.ic33", 0x0000, 0x8000, BAD_DUMP CRC(eb181641) SHA1(43c1e0215cf540cbbda240b1048910ff55681059) )
	780	ROM_LOAD( "efp.ic34", 0x8000, 0x4000, BAD_DUMP CRC(4c3b34b7) SHA1(f9dc571d2d4f68520b306ecc7516acaeea69ec0d) )
	781	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
842	782
843		ROM_IPC
	783	ROM_REGION( 0x800, I8749_TAG, 0 )
	784	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	785
	786	ROM_REGION( 0x400, "plds", 0 )
	787	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
844	788	ROM_END
845	789
846	790	ROM_START( ql_dk )
847		ROM_REGION( 0x400000, M68008_TAG, 0 )
848		ROM_LOAD( "mgd.ic33",  0x000000, 0x008000, BAD_DUMP CRC(f57755eb) SHA1(dc57939ffb8741e17967a1d2479c339750ec7ff6) )
849		ROM_LOAD( "mgd.ic34",  0x008000, 0x004000, BAD_DUMP CRC(1892465a) SHA1(0ff3046b5276da6639d3fe79b22ae25cc265d540) )
850		ROM_LOAD( "extra.rom", 0x01c000, 0x004000, NO_DUMP )
	791	ROM_REGION( 0x10000, M68008_TAG, 0 )
	792	ROM_LOAD( "mgd.ic33",  0x0000, 0x8000, BAD_DUMP CRC(f57755eb) SHA1(dc57939ffb8741e17967a1d2479c339750ec7ff6) )
	793	ROM_LOAD( "mgd.ic34",  0x8000, 0x4000, BAD_DUMP CRC(1892465a) SHA1(0ff3046b5276da6639d3fe79b22ae25cc265d540) )
	794	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR | ROM_OPTIONAL)
851	795
852		ROM_IPC
	796	ROM_REGION( 0x4000, "extra", 0 )
	797	ROM_LOAD( "extra.rom", 0x0000, 0x4000, NO_DUMP ) // located at 0x1c000 in M68008 memory map
	798
	799	ROM_REGION( 0x800, I8749_TAG, 0 )
	800	ROM_LOAD( "ipc8049.ic24", 0x000, 0x800, CRC(6a0d1f20) SHA1(fcb1c97ee7c66e5b6d8fbb57c06fd2f6509f2e1b) )
	801
	802	ROM_REGION( 0x400, "plds", 0 )
	803	ROM_LOAD( "hal16l8.ic38", 0x0000, 0x0400, NO_DUMP )
853	804	ROM_END
854	805
855	806	ROM_START( tonto )
r9714	r9715
894	845	ROM_LOAD( "rompack-5.rom", 0x020000, 0x008000, NO_DUMP )
895	846	ROM_END
896	847
897		/* System Configuration */
898
899		static QUICKLOAD_LOAD( ql )
900		{
901		image.fread(messram_get_ptr(image.device().machine->device("messram")), 128*1024);
902
903		return IMAGE_INIT_PASS;
904		}
905
906	848	/* Computer Drivers */
907	849
908	850	/*    YEAR  NAME    PARENT  COMPAT  MACHINE     INPUT   INIT    COMPANY                     FULLNAME        FLAGS */
r9714	r9715
915	857	COMP( 1985, ql_se,  ql,     0,      ql,         ql_se,  0,      "Sinclair Research Ltd",    "QL (Sweden)",  GAME_NOT_WORKING )
916	858	COMP( 1985, ql_dk,  ql,     0,      ql,         ql_dk,  0,      "Sinclair Research Ltd",    "QL (Denmark)", GAME_NOT_WORKING )
917	859	COMP( 1985, ql_gr,  ql,     0,      ql,         ql,     0,      "Sinclair Research Ltd",    "QL (Greece)",  GAME_SUPPORTS_SAVE )
918		// last two did not used system config
919	860	COMP( 1984, tonto,  0,      0,      opd,      ql,      0,      "British Telecom Business Systems", "Merlin M1800 Tonto", GAME_NOT_WORKING )
920	861	COMP( 1986, megaopd,tonto,   0,      megaopd,   ql,      0,      "International Computer Limited", "MegaOPD (USA)", GAME_NOT_WORKING )

docs/messnew.txt

r9714	r9715
35	35
36	36	- [AMU880] Fixed keyboard. [Curt Coder]
37	37
38		- [C64] Added known good dumps softlist for cartridges. Not hooked up
	38	- [C64] Added known good dumps software list for cartridges. Not hooked up
39	39	to driver code yet. [Curt Coder]
40	40
41	41	- [C64] Multisession fixes.  [Atari Ace]
r9714	r9715
50	50
51	51	- [PC8201] Added support for 128KB ROM cassettes. [Curt Coder]
52	52
53		- [PC8201] Added option ROM softlist. [Curt Coder]
	53	- [PC8201] Added a software list for option ROMs. [Curt Coder]
54	54
55	55	- [SMS] Improved Light Phaser emulation and converted it to use timers
56	56	that control when the beam will reach the aim area, to run the function
r9714	r9715
65	65	selecting the Segascope views from the Video Options menu). The option
66	66	is turned off by default, being inaccurate [Enik Land, Fabio Priuli]
67	67
68		- [TANDY200] Limited video RAM to 8 KB per hardware. [Curt Coder]
	68	- [TANDY200] Limited video RAM to 8 KB as per hardware. [Curt Coder]
69	69
70		- [TANDY200] Added option ROM softlist. [Curt Coder]
	70	- [TANDY200] Added a software list for option ROMs. [Curt Coder]
71	71
72		- [TRSM100] Added option ROM softlist. [Curt Coder]
	72	- [TRSM100] Added a software list for option ROMs. [Curt Coder]
73	73
74	74
75	75
76
77	76	Imgtool Changes:
78	77	----------------
79	78	(none)
r9714	r9715
103	102	- Refactored the following drivers to define ADDRESS_MAP_MODERN:
104	103	abc80, advision, amu880, bw12, bw14, bw2, kc85, trsm100, tandy102,
105	104	tandy200, pc8201a, mm1m6, sg1000, sc3000, sf7000, tandy2k, v1050,
106		victor9k, vidbrain, xerox820, xerox820ii, xor100. [Curt Coder]
	105	victor9k, vidbrain, ql, xerox820, xerox820ii, xor100. [Curt Coder]
107	106
	107	- Allowed the use of either decimal or hexadecimal values for <dataarea> size,
	108	<rom> size, and <rom> offset in software lists. [Curt Coder]
108	109
	110	- Enabled loading ROMs from software lists to ROM_CART_LOAD entries. [Curt Coder]
109	111
	112
	113
110	114	0.140
111	115
112	116	New System Drivers Supported:

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