MESS SVN History

15994 Revisions

r9470 Friday 29th October, 2010 at 10:20:11 UTC by Curt Coder
[ABC800] Refactored to define ADDRESS_MAP_MODERN.

[docs]	messnew.txt
[src/mess/drivers]	abc80x.c
[src/mess/includes]	abc80x.h
[src/mess/video]	abc800.c abc802.c abc806.c

src/mess/video/abc800.c
r9469	r9470
8	8
9	9	TODO:
10	10
11		- abc800c
	11	- check compatibility with new MC6845
	12	- ABC800C video: http://www.qsl.net/zl1vfo/teletext.htm
12	13
13	14	*/
14	15
r9469	r9470
16	17	#include "includes/abc80x.h"
17	18	#include "machine/z80dart.h"
18	19	#include "video/mc6845.h"
	20	#include "video/saa5050.h"
19	21
20		/* Palette Initialization */
21	22
22		static PALETTE_INIT( abc800m )
	23
	24	// these are needed because the MC6845 emulation does
	25	// not position the active display area correctly
	26	#define HORIZONTAL_PORCH_HACK 115
	27	#define VERTICAL_PORCH_HACK 29
	28
	29
	30
	31	//**************************************************************************
	32	// HIGH RESOLUTION GRAPHICS
	33	//**************************************************************************
	34
	35	//-------------------------------------------------
	36	// abc800_hrs_w - high resolution scanline write
	37	//-------------------------------------------------
	38
	39	WRITE8_MEMBER( abc800_state::hrs_w )
23	40	{
24		palette_set_color_rgb(machine, 0, 0x00, 0x00, 0x00); // black
25		palette_set_color_rgb(machine, 1, 0xff, 0xff, 0x00); // yellow
	41	m_hrs = data;
26	42	}
27	43
	44
	45	//-------------------------------------------------
	46	// abc800_hrc_w - high resolution color write
	47	//-------------------------------------------------
	48
	49	WRITE8_MEMBER( abc800_state::hrc_w )
	50	{
	51	m_fgctl = data;
	52	}
	53
	54
	55
	56	//**************************************************************************
	57	// ABC 800 COLOR
	58	//**************************************************************************
	59
	60	//-------------------------------------------------
	61	// PALETTE_INIT( abc800c )
	62	//-------------------------------------------------
	63
28	64	static PALETTE_INIT( abc800c )
29	65	{
30	66	palette_set_color_rgb(machine, 0, 0x00, 0x00, 0x00); // black
r9469	r9470
37	73	palette_set_color_rgb(machine, 7, 0xff, 0xff, 0xff); // white
38	74	}
39	75
40		/* External Interface */
41	76
42		WRITE8_HANDLER( abc800_hrs_w )
	77	//-------------------------------------------------
	78	// abc800m_hr_update - color high resolution
	79	// screen update
	80	//-------------------------------------------------
	81
	82	static void abc800c_hr_update(running_machine machine, bitmap_t bitmap, const rectangle *cliprect)
43	83	{
44		abc800_state *state = ~~space->~~machine->driver_data<abc800_state>();
	84	abc800_state *state = machine->driver_data<abc800_state>();
45	85
46		state->hrs = data;
47		}
	86	UINT16 addr = 0;
	87	int sx, y, dot;
48	88
49		WRITE8_HANDLER( abc800_hrc_w )
50		{
51		abc800_state *state = space->machine->driver_data<abc800_state>();
	89	for (y = state->m_hrs; y < MIN(cliprect->max_y + 1, state->m_hrs + 240); y++)
	90	{
	91	int x = 0;
52	92
53		state->fgctl = data;
	93	for (sx = 0; sx < 64; sx++)
	94	{
	95	UINT8 data = state->m_video_ram[addr++];
	96
	97	for (dot = 0; dot < 4; dot++)
	98	{
	99	UINT16 fgctl_addr = ((state->m_fgctl & 0x7f) << 2) \| ((data >> 6) & 0x03);
	100	int color = state->fgctl_prom[fgctl_addr] & 0x07;
	101
	102	*BITMAP_ADDR16(bitmap, y, x++) = color;
	103
	104	data <<= 2;
	105	}
	106	}
	107	}
54	108	}
55	109
56		/* MC6845 Row Update */
57	110
58		static MC6845_UPDATE_ROW( abc800m_update_row )
	111	//-------------------------------------------------
	112	// VIDEO_START( abc800c )
	113	//-------------------------------------------------
	114
	115	static VIDEO_START( abc800c )
59	116	{
60		abc800_state *state = ~~device->~~machine->driver_data<abc800_state>();
	117	abc800_state *state = machine->driver_data<abc800_state>();
61	118
62		int column;
	119	// find memory regions
	120	state->m_char_rom = memory_region(machine, MC6845_TAG);
	121	state->fgctl_prom = memory_region(machine, "hru2");
63	122
64		/* prevent wraparound */
65		if (y >= 240) return;
	123	// register for state saving
	124	state_save_register_global(machine, state->m_hrs);
	125	state_save_register_global(machine, state->m_fgctl);
	126	}
66	127
67		y += 29;
68	128
69		for (column = 0; column < x_count; column++)
70		{
71		int bit;
	129	//-------------------------------------------------
	130	// VIDEO_UPDATE( abc800c )
	131	//-------------------------------------------------
72	132
73		UINT16 address = (state->charram[(ma + column) & 0x7ff] << 4) \| (ra & 0x0f);
74		UINT8 data = (state->char_rom[address & 0x7ff] & 0x3f);
	133	static VIDEO_UPDATE( abc800c )
	134	{
	135	abc800_state *state = screen->machine->driver_data<abc800_state>();
75	136
76		if (column == cursor_x)
77		{
78		data = 0x3f;
79		}
	137	// clear screen
	138	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
80	139
81		data <<= 2;
	140	// draw HR graphics
	141	abc800c_hr_update(screen->machine, bitmap, cliprect);
82	142
83		for (bit = 0; bit < ABC800_CHAR_WIDTH; bit++)
84		{
85		int x = 115 + (column * ABC800_CHAR_WIDTH) + bit;
	143	if (!BIT(state->m_fgctl, 7))
	144	{
	145	// draw text
	146	saa5050_update(state->m_trom, bitmap, cliprect);
	147	}
86	148
87		if (BIT(data, 7))
88		{
89		*BITMAP_ADDR16(bitmap, y, x) = 1;
90		}
91
92		data <<= 1;
93		}
94		}
	149	return 0;
95	150	}
96	151
97		static WRITE_LINE_DEVICE_HANDLER( vs_w )
98		{
99		abc800_state *driver_state = device->machine->driver_data<abc800_state>();
100	152
101		z80dart_rib_w(driver_state->z80dart, state);
102		}
	153	//-------------------------------------------------
	154	// saa5050_interface trom_intf
	155	//-------------------------------------------------
103	156
104		/* MC6845 Interfaces */
105
106		static const mc6845_interface crtc_intf =
	157	static const saa5050_interface trom_intf =
107	158	{
108	159	SCREEN_TAG,
109		ABC800_CHAR_WIDTH,
110		NULL,
111		abc800m_update_row,
112		NULL,
113		DEVCB_NULL,
114		DEVCB_NULL,
115		DEVCB_NULL,
116		DEVCB_LINE(vs_w),
117		NULL
	160	0, // starting gfxnum
	161	40, 24 - 1, 40, // x, y, size
	162	0 // rev y order
118	163	};
119	164
120		/* ABC 800 C */
121	165
122		static void abc800c_update(running_machine machine, bitmap_t bitmap, const rectangle *cliprect)
	166	//-------------------------------------------------
	167	// MACHINE_CONFIG_FRAGMENT( abc800c_video )
	168	//-------------------------------------------------
	169
	170	MACHINE_CONFIG_FRAGMENT( abc800c_video )
	171	MDRV_SCREEN_ADD(SCREEN_TAG, RASTER)
	172	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	173
	174	MDRV_SCREEN_REFRESH_RATE(60)
	175	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
	176	MDRV_SCREEN_SIZE(640, 400)
	177	MDRV_SCREEN_VISIBLE_AREA(0,640-1, 0, 400-1)
	178
	179	MDRV_PALETTE_LENGTH(8)
	180	MDRV_PALETTE_INIT(abc800c)
	181
	182	MDRV_VIDEO_START(abc800c)
	183	MDRV_VIDEO_UPDATE(abc800c)
	184
	185	MDRV_GFXDECODE(saa5050)
	186
	187	MDRV_SAA5050_ADD(SAA5052_TAG, trom_intf)
	188	MACHINE_CONFIG_END
	189
	190
	191
	192	//**************************************************************************
	193	// ABC 800 MONOCHROME
	194	//**************************************************************************
	195
	196	//-------------------------------------------------
	197	// PALETTE_INIT( abc800m )
	198	//-------------------------------------------------
	199
	200	static PALETTE_INIT( abc800m )
123	201	{
	202	palette_set_color_rgb(machine, 0, 0x00, 0x00, 0x00); // black
	203	palette_set_color_rgb(machine, 1, 0xff, 0xff, 0x00); // yellow
124	204	}
125	205
126		/* HR */
127	206
	207	//-------------------------------------------------
	208	// abc800m_hr_update - monochrome high resolution
	209	// screen update
	210	//-------------------------------------------------
	211
128	212	static void abc800m_hr_update(running_machine machine, bitmap_t bitmap, const rectangle *cliprect)
129	213	{
130	214	abc800_state *state = machine->driver_data<abc800_state>();
r9469	r9470
132	216	UINT16 addr = 0;
133	217	int sx, y, dot;
134	218
135		for (y = state->hrs + 29; y < MIN(cliprect->max_y + 1, state->hrs + 29 + 240); y++)
	219	for (y = state->m_hrs + VERTICAL_PORCH_HACK; y < MIN(cliprect->max_y + 1, state->m_hrs + VERTICAL_PORCH_HACK + 240); y++)
136	220	{
137		int x = ~~115~~;
	221	int x = HORIZONTAL_PORCH_HACK;
138	222
139	223	for (sx = 0; sx < 64; sx++)
140	224	{
141		UINT8 data = state->videoram[addr++];
	225	UINT8 data = state->m_video_ram[addr++];
142	226
143	227	for (dot = 0; dot < 4; dot++)
144	228	{
145		UINT16 fgctl_addr = ((state->fgctl & 0x7f) << 2) \| ((data >> 6) & 0x03);
	229	UINT16 fgctl_addr = ((state->m_fgctl & 0x7f) << 2) \| ((data >> 6) & 0x03);
146	230	int color = (state->fgctl_prom[fgctl_addr] & 0x07) ? 1 : 0;
147	231
148	232	*BITMAP_ADDR16(bitmap, y, x++) = color;
r9469	r9470
154	238	}
155	239	}
156	240
157		static void abc800c_hr_update(running_machine machine, bitmap_t bitmap, const rectangle *cliprect)
	241
	242	//-------------------------------------------------
	243	// MC6845_UPDATE_ROW( abc800m_update_row )
	244	//-------------------------------------------------
	245
	246	static MC6845_UPDATE_ROW( abc800m_update_row )
158	247	{
159		abc800_state *state = machine->driver_data<abc800_state>();
	248	abc800_state *state = device->machine->driver_data<abc800_state>();
160	249
161		UINT16 addr = 0;
162		int sx, y, dot;
	250	int column;
163	251
164		for (y = state->hrs; y < MIN(cliprect->max_y + 1, state->hrs + 240); y++)
	252	// prevent wraparound
	253	if (y >= 240) return;
	254
	255	y += VERTICAL_PORCH_HACK;
	256
	257	for (column = 0; column < x_count; column++)
165	258	{
166		int ~~x = 0~~;
	259	int bit;
167	260
168		for (sx = 0; sx < 64; sx++)
	261	UINT16 address = (state->m_char_ram[(ma + column) & 0x7ff] << 4) \| (ra & 0x0f);
	262	UINT8 data = (state->m_char_rom[address & 0x7ff] & 0x3f);
	263
	264	if (column == cursor_x)
169	265	{
170		UINT8 data = state->videoram[addr++];
	266	data = 0x3f;
	267	}
171	268
172		for (dot = 0; dot < 4; dot++)
173		{
174		UINT16 fgctl_addr = ((state->fgctl & 0x7f) << 2) \| ((data >> 6) & 0x03);
175		int color = state->fgctl_prom[fgctl_addr] & 0x07;
	269	data <<= 2;
176	270
177		*BITMAP_ADDR16(bitmap, y, x++) = color;
	271	for (bit = 0; bit < ABC800_CHAR_WIDTH; bit++)
	272	{
	273	int x = HORIZONTAL_PORCH_HACK + (column * ABC800_CHAR_WIDTH) + bit;
178	274
179		data <<= 2;
	275	if (BIT(data, 7))
	276	{
	277	*BITMAP_ADDR16(bitmap, y, x) = 1;
180	278	}
	279
	280	data <<= 1;
181	281	}
182	282	}
183	283	}
184	284
185		/* Video Start */
186	285
187		static VIDEO_START( abc800c )
188		{
189		abc800_state *state = machine->driver_data<abc800_state>();
	286	//-------------------------------------------------
	287	// mc6845_interface crtc_intf
	288	//-------------------------------------------------
190	289
191		/* find memory regions */
192		state->char_rom = memory_region(machine, "chargen");
193		state->fgctl_prom = memory_region(machine, "fgctl");
194
195		/* register for state saving */
196		state_save_register_global(machine, state->hrs);
197		state_save_register_global(machine, state->fgctl);
198		}
199
200		static VIDEO_START( abc800m )
	290	static const mc6845_interface crtc_intf =
201	291	{
202		VIDEO_START_CALL(abc800c);
	292	SCREEN_TAG,
	293	ABC800_CHAR_WIDTH,
	294	NULL,
	295	abc800m_update_row,
	296	NULL,
	297	DEVCB_NULL,
	298	DEVCB_NULL,
	299	DEVCB_NULL,
	300	DEVCB_DEVICE_LINE(Z80DART_TAG, z80dart_rib_w),
	301	NULL
	302	};
203	303
204		abc800_state *state = machine->driver_data<abc800_state>();
205	304
206		/* find devices */
207		state->mc6845 = machine->device(MC6845_TAG);
208		}
	305	//-------------------------------------------------
	306	// VIDEO_UPDATE( abc800m )
	307	//-------------------------------------------------
209	308
210		/* Video Update */
211
212	309	static VIDEO_UPDATE( abc800m )
213	310	{
214	311	abc800_state *state = screen->machine->driver_data<abc800_state>();
215	312
216		/* expand visible area to workaround MC6845 */
	313	// HACK expand visible area to workaround MC6845
217	314	screen->set_visible_area(0, 767, 0, 311);
218	315
219		/* clear screen */
	316	// clear screen
220	317	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
221	318
222		/* draw HR graphics */
	319	// draw HR graphics
223	320	abc800m_hr_update(screen->machine, bitmap, cliprect);
224	321
225		if (!BIT(state->fgctl, 7))
	322	if (!BIT(state->m_fgctl, 7))
226	323	{
227		/* draw text */
228		mc6845_update(state->mc6845, bitmap, cliprect);
	324	// draw text
	325	mc6845_update(state->m_crtc, bitmap, cliprect);
229	326	}
230	327
231	328	return 0;
232	329	}
233	330
234		static VIDEO_UPDATE( abc800c )
235		{
236		abc800_state *state = screen->machine->driver_data<abc800_state>();
237	331
238		/* clear screen */
239		bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
	332	//-------------------------------------------------
	333	// MACHINE_CONFIG_FRAGMENT( abc800m_video )
	334	//-------------------------------------------------
240	335
241		/* draw HR graphics */
242		abc800c_hr_update(screen->machine, bitmap, cliprect);
243
244		if (!BIT(state->fgctl, 7))
245		{
246		/* draw text */
247		abc800c_update(screen->machine, bitmap, cliprect);
248		}
249
250		return 0;
251		}
252
253		/* Machine Drivers */
254
255	336	MACHINE_CONFIG_FRAGMENT( abc800m_video )
256	337	MDRV_MC6845_ADD(MC6845_TAG, MC6845, ABC800_CCLK, crtc_intf)
257	338
r9469	r9470
264	345	MDRV_SCREEN_VISIBLE_AREA(0,640-1, 0, 400-1)
265	346
266	347	MDRV_PALETTE_LENGTH(2)
267
268	348	MDRV_PALETTE_INIT(abc800m)
269		MDRV_VIDEO_START(abc800m)
270		MDRV_VIDEO_UPDATE(abc800m)
271		MACHINE_CONFIG_END
272	349
273		MACHINE_CONFIG_FRAGMENT( abc800c_video )
274		MDRV_SCREEN_ADD(SCREEN_TAG, RASTER)
275		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
276
277		MDRV_SCREEN_REFRESH_RATE(60)
278		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
279		MDRV_SCREEN_SIZE(640, 400)
280		MDRV_SCREEN_VISIBLE_AREA(0,640-1, 0, 400-1)
281
282		MDRV_PALETTE_LENGTH(8)
283
284		MDRV_PALETTE_INIT(abc800c)
285	350	MDRV_VIDEO_START(abc800c)
286		MDRV_VIDEO_UPDATE(abc800c)
	351	MDRV_VIDEO_UPDATE(abc800m)
287	352	MACHINE_CONFIG_END

src/mess/video/abc802.c
r9469	r9470
4	4	*
5	5	****************************************************************************/
6	6
	7	/*
	8
	9	TODO:
	10
	11	- check compatibility with new MC6845
	12
	13	*/
	14
7	15	#include "emu.h"
8	16	#include "includes/abc80x.h"
9	17	#include "machine/z80dart.h"
10	18	#include "video/mc6845.h"
11	19
12		/* MC6845 Row Update */
13	20
	21
	22	// these are needed because the MC6845 emulation does
	23	// not position the active display area correctly
	24	#define HORIZONTAL_PORCH_HACK 121
	25	#define VERTICAL_PORCH_HACK 29
	26
	27
	28
	29	//-------------------------------------------------
	30	// MC6845_UPDATE_ROW( abc802_update_row )
	31	//-------------------------------------------------
	32
14	33	static MC6845_UPDATE_ROW( abc802_update_row )
15	34	{
16	35	/*
r9469	r9470
54	73
55	74	abc802_state *state = device->machine->driver_data<abc802_state>();
56	75
57		int column;
58	76	int rf = 0, rc = 0, rg = 0;
59	77
60		/* prevent wraparound */
	78	// prevent wraparound
61	79	if (y >= 240) return;
62	80
63		y += 29;
	81	y += VERTICAL_PORCH_HACK;
64	82
65		for (column = 0; column < x_count; column++)
	83	for (int column = 0; column < x_count; column++)
66	84	{
67		int bit;
68
69		UINT8 code = state->charram[(ma + column) & 0x7ff];
	85	UINT8 code = state->m_char_ram[(ma + column) & 0x7ff];
70	86	UINT16 address = code << 4;
71	87	UINT8 ra_latch = ra;
72	88	UINT8 data;
r9469	r9470
78	94	ra_latch = 0x0f;
79	95	}
80	96
81		if ((state->flshclk && rf) \|\| rc)
	97	if ((state->m_flshclk && rf) \|\| rc)
82	98	{
83	99	ra_latch = 0x0e;
84	100	}
r9469	r9470
88	104	address \|= 0x800;
89	105	}
90	106
91		data = state->char_rom[(address + ra_latch) & 0x1fff];
	107	data = state->m_char_rom[(address + ra_latch) & 0x1fff];
92	108
93	109	if (data & ABC802_ATE)
94	110	{
r9469	r9470
98	114	switch (attr)
99	115	{
100	116	case 0x00:
101		/* Row Graphic */
	117	// Row Graphic
102	118	rg = value;
103	119	break;
104	120
105	121	case 0x01:
106		/* Row Flash */
	122	// Row Flash
107	123	rf = value;
108	124	break;
109	125
110	126	case 0x02:
111		/* Row Clear */
	127	// Row Clear
112	128	rc = value;
113	129	break;
114	130
115	131	case 0x03:
116		/* undefined */
	132	// undefined
117	133	break;
118	134	}
119	135	}
r9469	r9470
121	137	{
122	138	data <<= 2;
123	139
124		if (state->mux80_40)
	140	if (state->m_80_40_mux)
125	141	{
126		for (bit = 0; bit < ABC800_CHAR_WIDTH; bit++)
	142	for (int bit = 0; bit < ABC800_CHAR_WIDTH; bit++)
127	143	{
128		int x = ~~121~~ + ((column + 3) * ABC800_CHAR_WIDTH) + bit;
	144	int x = HORIZONTAL_PORCH_HACK + ((column + 3) * ABC800_CHAR_WIDTH) + bit;
129	145	int color = BIT(data, 7) ^ ri;
130	146
131	147	*BITMAP_ADDR16(bitmap, y, x) = color;
r9469	r9470
135	151	}
136	152	else
137	153	{
138		for (bit = 0; bit < ABC800_CHAR_WIDTH; bit++)
	154	for (int bit = 0; bit < ABC800_CHAR_WIDTH; bit++)
139	155	{
140		int x = ~~121~~ + ((column + 3) * ABC800_CHAR_WIDTH) + (bit << 1);
	156	int x = HORIZONTAL_PORCH_HACK + ((column + 3) * ABC800_CHAR_WIDTH) + (bit << 1);
141	157	int color = BIT(data, 7) ^ ri;
142	158
143	159	*BITMAP_ADDR16(bitmap, y, x) = color;
r9469	r9470
152	168	}
153	169	}
154	170
155		static WRITE_LINE_DEVICE_HANDLER( vs_w )
	171
	172	//-------------------------------------------------
	173	// vs_w - vertical sync write
	174	//-------------------------------------------------
	175
	176	WRITE_LINE_MEMBER( abc802_state::vs_w )
156	177	{
157		abc802_state *driver_state = device->machine->driver_data<abc802_state>();
158
159	178	if (!state)
160	179	{
161		/* flash clock */
162		if (driver_state->flshclk_ctr & 0x20)
	180	// flash clock
	181	if (m_flshclk_ctr & 0x20)
163	182	{
164		driver_state->flshclk = !driver_state->flshclk;
165		driver_state->flshclk_ctr = 0;
	183	m_flshclk = !m_flshclk;
	184	m_flshclk_ctr = 0;
166	185	}
167	186	else
168	187	{
169		~~driver~~_~~state->~~flshclk_ctr++;
	188	m_flshclk_ctr++;
170	189	}
171	190	}
172	191
173		/* signal _DEW to DART */
174		z80dart_rib_w(driver_state->z80dart, !state);
	192	// signal _DEW to DART
	193	z80dart_rib_w(m_dart, !state);
175	194	}
176	195
177		/* MC6845 Interfaces */
178	196
	197	//-------------------------------------------------
	198	// mc6845_interface crtc_intf
	199	//-------------------------------------------------
	200
179	201	static const mc6845_interface crtc_intf =
180	202	{
181	203	SCREEN_TAG,
r9469	r9470
186	208	DEVCB_NULL,
187	209	DEVCB_NULL,
188	210	DEVCB_NULL,
189		DEVCB_LINE(vs_w),
	211	DEVCB_DRIVER_LINE_MEMBER(abc802_state, vs_w),
190	212	NULL
191	213	};
192	214
193		/* Video Start */
194	215
195		static VIDEO_START( abc802 )
	216	//-------------------------------------------------
	217	// VIDEO_START( abc802 )
	218	//-------------------------------------------------
	219
	220	void abc802_state::video_start()
196	221	{
197		abc802_state *state = machine->driver_data<abc802_state>();
	222	// find memory regions
	223	m_char_rom = memory_region(machine, MC6845_TAG);
198	224
199		/* find devices */
200		state->mc6845 = machine->device(MC6845_TAG);
	225	// register for state saving
	226	state_save_register_global(machine, m_flshclk_ctr);
	227	state_save_register_global(machine, m_flshclk);
	228	state_save_register_global(machine, m_80_40_mux);
	229	}
201	230
202		/* find memory regions */
203		state->char_rom = memory_region(machine, "chargen");
204	231
205		/* register for state saving */
206		state_save_register_global(machine, state->flshclk_ctr);
207		state_save_register_global(machine, state->flshclk);
208		state_save_register_global(machine, state->mux80_40);
209		}
	232	//-------------------------------------------------
	233	// VIDEO_UPDATE( abc802 )
	234	//-------------------------------------------------
210	235
211		/* Video Update */
212
213		static VIDEO_UPDATE( abc802 )
	236	bool abc802_state::video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
214	237	{
215		abc802_state *state = screen->machine->driver_data<abc802_state>();
	238	// HACK expand visible area to workaround MC6845
	239	screen.set_visible_area(0, 767, 0, 311);
216	240
217		/* expand visible area to workaround MC6845 */
218		screen->set_visible_area(0, 767, 0, 311);
	241	// draw text
	242	mc6845_update(m_crtc, &bitmap, &cliprect);
219	243
220		/* draw text */
221		mc6845_update(state->mc6845, bitmap, cliprect);
222
223	244	return 0;
224	245	}
225	246
226		/* Machine Drivers */
227	247
	248	//-------------------------------------------------
	249	// MACHINE_CONFIG_FRAGMENT( abc802_video )
	250	//-------------------------------------------------
	251
228	252	MACHINE_CONFIG_FRAGMENT( abc802_video )
229	253	MDRV_MC6845_ADD(MC6845_TAG, MC6845, ABC800_CCLK, crtc_intf)
230	254
r9469	r9470
237	261	MDRV_SCREEN_VISIBLE_AREA(0,640-1, 0, 400-1)
238	262
239	263	MDRV_PALETTE_LENGTH(2)
240
241	264	MDRV_PALETTE_INIT(monochrome_amber)
242		MDRV_VIDEO_START(abc802)
243		MDRV_VIDEO_UPDATE(abc802)
244	265	MACHINE_CONFIG_END

src/mess/video/abc806.c
r9469	r9470
8	8
9	9	TODO:
10	10
	11	- check compatibility with new MC6845
11	12	- HRU II PROM reading
12	13
13	14	*/
r9469	r9470
18	19	#include "machine/e0516.h"
19	20	#include "video/mc6845.h"
20	21
21		/* Palette Initialization */
22	22
	23
	24	// these are needed because the MC6845 emulation does
	25	// not position the active display area correctly
	26	#define HORIZONTAL_PORCH_HACK 109
	27	#define VERTICAL_PORCH_HACK 27
	28
	29
	30
	31	//-------------------------------------------------
	32	// PALETTE_INIT( abc806 )
	33	//-------------------------------------------------
	34
23	35	static PALETTE_INIT( abc806 )
24	36	{
25	37	palette_set_color_rgb(machine, 0, 0x00, 0x00, 0x00); // black
r9469	r9470
32	44	palette_set_color_rgb(machine, 7, 0xff, 0xff, 0xff); // white
33	45	}
34	46
35		/* High Resolution Screen Select */
36	47
37		WRITE8_HANDLER( abc806_hrs_w )
	48	//-------------------------------------------------
	49	// abc806_hrs_w - high resolution memory banking
	50	//-------------------------------------------------
	51
	52	WRITE8_MEMBER( abc806_state::hrs_w )
38	53	{
39	54	/*
40	55
r9469	r9470
51	66
52	67	*/
53	68
54		abc806_state *state = space->machine->driver_data<abc806_state>();
55
56		state->hrs = data;
	69	m_hrs = data;
57	70	}
58	71
59		/* High Resolution Palette */
60	72
61		WRITE8_HANDLER( abc806_hrc_w )
	73	//-------------------------------------------------
	74	// abc806_hrc_w - high resolution color write
	75	//-------------------------------------------------
	76
	77	WRITE8_MEMBER( abc806_state::hrc_w )
62	78	{
63		abc806_state *state = space->machine->driver_data<abc806_state>();
64
65	79	int reg = (offset >> 8) & 0x0f;
66	80
67		~~state->~~hrc[reg] = data;
	81	m_hrc[reg] = data;
68	82	}
69	83
70		/* Character Memory */
71	84
72		READ8_HANDLER( abc806_charram_r )
	85	//-------------------------------------------------
	86	// abc806_charram_r - character RAM read
	87	//-------------------------------------------------
	88
	89	READ8_MEMBER( abc806_state::charram_r )
73	90	{
74		~~abc806~~_stat~~e *s~~tate = ~~space->~~mac~~hine->d~~r~~iver~~_da~~ta<abc806_~~s~~tat~~e~~>()~~;
	91	m_attr_data = m_color_ram[offset];
75	92
76		state->attr_data = state->colorram[offset];
77
78		return state->charram[offset];
	93	return m_char_ram[offset];
79	94	}
80	95
81		WRITE8_HANDLER( abc806_charram_w )
	96
	97	//-------------------------------------------------
	98	// abc806_charram_w - character RAM write
	99	//-------------------------------------------------
	100
	101	WRITE8_MEMBER( abc806_state::charram_w )
82	102	{
83		abc806_state *state = space->machine->driver_data<abc806_state>();
84
85		state->colorram[offset] = state->attr_data;
86		state->charram[offset] = data;
	103	m_color_ram[offset] = m_attr_data;
	104	m_char_ram[offset] = data;
87	105	}
88	106
89		/* Attribute Memory */
90	107
91		READ8_HANDLER( abc806_ami_r )
	108	//-------------------------------------------------
	109	// abc806_ami_r - attribute memory read
	110	//-------------------------------------------------
	111
	112	READ8_MEMBER( abc806_state::ami_r )
92	113	{
93		abc806_state *state = space->machine->driver_data<abc806_state>();
94
95		return state->attr_data;
	114	return m_attr_data;
96	115	}
97	116
98		WRITE8_HANDLER( abc806_amo_w )
	117
	118	//-------------------------------------------------
	119	// abc806_amo_w - attribute memory write
	120	//-------------------------------------------------
	121
	122	WRITE8_MEMBER( abc806_state::amo_w )
99	123	{
100		abc806_state *state = space->machine->driver_data<abc806_state>();
101
102		state->attr_data = data;
	124	m_attr_data = data;
103	125	}
104	126
105		/* High Resolution Palette / Real-Time Clock */
106	127
107		READ8_HANDLER( abc806_cli_r )
	128	//-------------------------------------------------
	129	// abc806_cli_r - palette PROM read
	130	//-------------------------------------------------
	131
	132	READ8_MEMBER( abc806_state::cli_r )
108	133	{
109		abc806_state *state = space->machine->driver_data<abc806_state>();
110
111	134	/*
112	135
113	136	bit description
r9469	r9470
123	146
124	147	*/
125	148
126		UINT16 hru2_addr = (state->hru2_a8 << 8) \| (offset >> 8);
127		UINT8 data = state->hru2_prom[hru2_addr] & 0x0f;
	149	UINT16 hru2_addr = (m_hru2_a8 << 8) \| (offset >> 8);
	150	UINT8 data = m_hru2_prom[hru2_addr] & 0x0f;
128	151
129		data \|= e0516_dio_r(st~~ate->e0516~~) << 7;
	152	data \|= e0516_dio_r(m_rtc) << 7;
130	153
131	154	return data;
132	155	}
133	156
134		/* Special */
135	157
136		READ8_HANDLER( abc806_sti_r )
	158	//-------------------------------------------------
	159	// abc806_sti_r - protection device read
	160	//-------------------------------------------------
	161
	162	READ8_MEMBER( abc806_state::sti_r )
137	163	{
138	164	/*
139	165
r9469	r9470
153	179	return 0x7f;
154	180	}
155	181
156		WRITE8_HANDLER( abc806_sto_w )
	182
	183	//-------------------------------------------------
	184	// abc806_sto_w -
	185	//-------------------------------------------------
	186
	187	WRITE8_MEMBER( abc806_state::sto_w )
157	188	{
158		abc806_state *state = space->machine->driver_data<abc806_state>();
159
160	189	int level = BIT(data, 7);
161	190
162	191	switch (data & 0x07)
163	192	{
164	193	case 0:
165		/* external memory enable */
166		state->eme = level;
	194	// external memory enable
	195	m_eme = level;
167	196	break;
168	197	case 1:
169		/* 40/80 column display */
170		state->_40 = level;
	198	// 40/80 column display
	199	m_40 = level;
171	200	break;
172	201	case 2:
173		/* HRU II address line 8, PROT A0 */
174		state->hru2_a8 = level;
	202	// HRU II address line 8, PROT A0
	203	m_hru2_a8 = level;
175	204	break;
176	205	case 3:
177		/* PROT INI */
	206	// PROT INI
178	207	break;
179	208	case 4:
180		/* text display enable */
181		state->txoff = level;
	209	// text display enable
	210	m_txoff = level;
182	211	break;
183	212	case 5:
184		/* RTC chip select */
185		e0516_cs_w(state->e0516, !level);
	213	// RTC chip select
	214	e0516_cs_w(m_rtc, !level);
186	215	break;
187	216	case 6:
188		/* RTC clock */
189		e0516_clk_w(state->e0516, level);
	217	// RTC clock
	218	e0516_clk_w(m_rtc, level);
190	219	break;
191	220	case 7:
192		/* RTC data in, PROT DIN */
193		e0516_dio_w(state->e0516, level);
	221	// RTC data in, PROT DIN
	222	e0516_dio_w(m_rtc, level);
194	223	break;
195	224	}
196	225	}
197	226
198		/* Sync Delay */
199	227
200		WRITE8_HANDLER( abc806_sso_w )
	228	//-------------------------------------------------
	229	// abc806_sso_w - sync offset write
	230	//-------------------------------------------------
	231
	232	WRITE8_MEMBER( abc806_state::sso_w )
201	233	{
202		abc806_state *state = space->machine->driver_data<abc806_state>();
203
204		state->sync = data & 0x3f;
	234	m_sync = data & 0x3f;
205	235	}
206	236
207		/* MC6845 */
208	237
	238	//-------------------------------------------------
	239	// MC6845_UPDATE_ROW( abc806_update_row )
	240	//-------------------------------------------------
	241
209	242	static MC6845_UPDATE_ROW( abc806_update_row )
210	243	{
211	244	abc806_state *state = device->machine->driver_data<abc806_state>();
212	245
213		int column;
214
215	246	UINT8 old_data = 0xff;
216	247	int fg_color = 7;
217	248	int bg_color = 0;
218	249	int underline = 0;
219	250	int flash = 0;
220		int e5 = state->_40;
221		int e6 = state->_40;
	251	int e5 = state->m_40;
	252	int e6 = state->m_40;
222	253	int th = 0;
223	254
224		/* prevent wraparound */
	255	// prevent wraparound
225	256	if (y >= 240) return;
226	257
227		y += state->sync + 27;
	258	y += state->m_sync + VERTICAL_PORCH_HACK;
228	259
229		for (column = 0; column < x_count; column++)
	260	for (int column = 0; column < x_count; column++)
230	261	{
231		UINT8 data = state->charram[(ma + column) & 0x7ff];
232		UINT8 attr = state->colorram[(ma + column) & 0x7ff];
233		UINT16 rad_addr, chargen_addr;
234		UINT8 rad_data, chargen_data;
235		int bit, x;
	262	UINT8 data = state->m_char_ram[(ma + column) & 0x7ff];
	263	UINT8 attr = state->m_color_ram[(ma + column) & 0x7ff];
	264	UINT16 rad_addr;
	265	UINT8 rad_data;
236	266
237	267	if ((attr & 0x07) == ((attr >> 3) & 0x07))
238	268	{
239		/* special case */
	269	// special case
240	270
241	271	switch (attr >> 6)
242	272	{
243	273	case 0:
244		/* use previously selected attributes */
	274	// use previously selected attributes
245	275	break;
246	276	case 1:
247		/* reserved for future use */
	277	// reserved for future use
248	278	break;
249	279	case 2:
250		/* blank */
	280	// blank
251	281	fg_color = 0;
252	282	bg_color = 0;
253	283	underline = 0;
254	284	flash = 0;
255	285	break;
256	286	case 3:
257		/* double width */
	287	// double width
258	288	e5 = BIT(attr, 0);
259	289	e6 = BIT(attr, 1);
260	290
261		/* read attributes from next byte */
262		attr = state->colorram[(ma + column + 1) & 0x7ff];
	291	// read attributes from next byte
	292	attr = state->m_color_ram[(ma + column + 1) & 0x7ff];
263	293
264	294	if (attr != 0x00)
265	295	{
r9469	r9470
273	303	}
274	304	else
275	305	{
276		/* normal case */
277
	306	// normal case
278	307	fg_color = attr & 0x07;
279	308	bg_color = (attr >> 3) & 0x07;
280	309	underline = BIT(attr, 6);
281	310	flash = BIT(attr, 7);
282		e5 = state->_40;
283		e6 = state->_40;
	311	e5 = state->m_40;
	312	e6 = state->m_40;
284	313	}
285	314
286	315	if (column == cursor_x)
r9469	r9470
289	318	}
290	319	else
291	320	{
292		rad_addr = (e6 << 8) \| (e5 << 7) \| (flash << 6) \| (underline << 5) \| (state->flshclk << 4) \| ra;
293		rad_data = state->rad_prom[rad_addr] & 0x0f;
	321	rad_addr = (e6 << 8) \| (e5 << 7) \| (flash << 6) \| (underline << 5) \| (state->m_flshclk << 4) \| ra;
	322	rad_data = state->m_rad_prom[rad_addr] & 0x0f;
294	323
295	324	rad_data = ra; // HACK because the RAD prom is not dumped yet
296	325	}
297	326
298		chargen_addr = (th << 12) \| (data << 4) \| rad_data;
299		chargen_data = state->char_rom[chargen_addr & 0xfff] << 2;
300		x = 109 + (column + 4) * ABC800_CHAR_WIDTH;
	327	UINT16 chargen_addr = (th << 12) \| (data << 4) \| rad_data;
	328	UINT8 chargen_data = state->m_char_rom[chargen_addr & 0xfff] << 2;
	329	int x = HORIZONTAL_PORCH_HACK + (column + 4) * ABC800_CHAR_WIDTH;
301	330
302		for (bit = 0; bit < ABC800_CHAR_WIDTH; bit++)
	331	for (int bit = 0; bit < ABC800_CHAR_WIDTH; bit++)
303	332	{
304	333	int color = BIT(chargen_data, 7) ? fg_color : bg_color;
305	334
r9469	r9470
322	351	}
323	352	}
324	353
325		static WRITE_LINE_DEVICE_HANDLER( hs_w )
	354
	355	//-------------------------------------------------
	356	// hs_w - horizontal sync write
	357	//-------------------------------------------------
	358
	359	WRITE_LINE_MEMBER( abc806_state::hs_w )
326	360	{
327		abc806_state *driver_state = device->machine->driver_data<abc806_state>();
328
329	361	int vsync;
330	362
331	363	if (!state)
332	364	{
333		~~driver~~_~~state->~~v50_addr++;
	365	m_v50_addr++;
334	366
335		/* clock current vsync value into the shift register */
336		driver_state->vsync_shift <<= 1;
337		driver_state->vsync_shift = (driver_state->vsync_shift & 0xfffffffel) \| driver_state->vsync;
	367	// clock current vsync value into the shift register
	368	m_vsync_shift <<= 1;
	369	m_vsync_shift \|= m_vsync;
338	370
339		vsync = BIT(~~driver~~_~~state->~~vsync_shift, ~~driver~~_~~state->~~sync);
	371	vsync = BIT(m_vsync_shift, m_sync);
340	372
341		if (!~~driver~~_~~state->~~d_vsync && vsync)
	373	if (!m_d_vsync && vsync)
342	374	{
343		/* clear V50 address */
344		driver_state->v50_addr = 0;
	375	// clear V50 address
	376	m_v50_addr = 0;
345	377	}
346		else if (~~driver~~_~~state->~~d_vsync && !vsync)
	378	else if (m_d_vsync && !vsync)
347	379	{
348		/* flash clock */
349		if (driver_state->flshclk_ctr & 0x20)
	380	// flash clock
	381	if (m_flshclk_ctr & 0x20)
350	382	{
351		driver_state->flshclk = !driver_state->flshclk;
352		driver_state->flshclk_ctr = 0;
	383	m_flshclk = !m_flshclk;
	384	m_flshclk_ctr = 0;
353	385	}
354	386	else
355	387	{
356		~~driver~~_~~state->~~flshclk_ctr++;
	388	m_flshclk_ctr++;
357	389	}
358	390	}
359	391
360		if (~~driver~~_~~state->~~d_vsync != vsync)
	392	if (m_d_vsync != vsync)
361	393	{
362		/* signal _DEW to DART */
363		z80dart_rib_w(driver_state->z80dart, !vsync);
	394	// signal _DEW to DART
	395	z80dart_rib_w(m_dart, !vsync);
364	396	}
365	397
366		~~driver~~_~~state->~~d_vsync = vsync;
	398	m_d_vsync = vsync;
367	399	}
368	400	}
369	401
370		static WRITE_LINE_DEVICE_HANDLER( vs_w )
	402
	403	//-------------------------------------------------
	404	// vs_w - vertical sync write
	405	//-------------------------------------------------
	406
	407	WRITE_LINE_MEMBER( abc806_state::vs_w )
371	408	{
372		abc806_state *driver_state = device->machine->driver_data<abc806_state>();
373
374		driver_state->vsync = state;
	409	m_vsync = state;
375	410	}
376	411
377		/* MC6845 Interfaces */
378	412
	413	//-------------------------------------------------
	414	// mc6845_interface crtc_intf
	415	//-------------------------------------------------
	416
379	417	static const mc6845_interface crtc_intf =
380	418	{
381	419	SCREEN_TAG,
r9469	r9470
385	423	NULL,
386	424	DEVCB_NULL,
387	425	DEVCB_NULL,
388		DEVCB_LINE(hs_w),
389		DEVCB_LINE(vs_w),
	426	DEVCB_DRIVER_LINE_MEMBER(abc806_state, hs_w),
	427	DEVCB_DRIVER_LINE_MEMBER(abc806_state, vs_w),
390	428	NULL
391	429	};
392	430
393		/* HR */
394	431
395		static void abc806_hr_update(running_machine machine, bitmap_t bitmap, const rectangle *cliprect)
	432	//-------------------------------------------------
	433	// hr_update - high resolution screen update
	434	//-------------------------------------------------
	435
	436	void abc806_state::hr_update(bitmap_t bitmap, const rectangle cliprect)
396	437	{
397		~~abc806_state~~ *state = mach~~ine->d~~r~~iver_data<abc806_~~s~~tate>(~~);
	438	UINT32 addr = (m_hrs & 0x0f) << 15;
398	439
399		UINT32 addr = (state->hrs & 0x0f) << 15;
400		int sx, y, pixel;
401
402		for (y = state->sync + 27; y < MIN(cliprect->max_y + 1, state->sync + 27 + 240); y++)
	440	for (int y = m_sync + VERTICAL_PORCH_HACK; y < MIN(cliprect->max_y + 1, m_sync + VERTICAL_PORCH_HACK + 240); y++)
403	441	{
404		for (sx = 0; sx < 128; sx++)
	442	for (int sx = 0; sx < 128; sx++)
405	443	{
406		UINT8 data = state->videoram[addr++];
407		UINT16 dot = (state->hrc[data >> 4] << 8) \| state->hrc[data & 0x0f];
	444	UINT8 data = m_video_ram[addr++];
	445	UINT16 dot = (m_hrc[data >> 4] << 8) \| m_hrc[data & 0x0f];
408	446
409		for (pixel = 0; pixel < 4; pixel++)
	447	for (int pixel = 0; pixel < 4; pixel++)
410	448	{
411		int x = ~~109~~ + (ABC800_CHAR_WIDTH * 4) - 16 + (sx * 4) + pixel;
	449	int x = HORIZONTAL_PORCH_HACK + (ABC800_CHAR_WIDTH * 4) - 16 + (sx * 4) + pixel;
412	450
413	451	if (BIT(dot, 15) \|\| *BITMAP_ADDR16(bitmap, y, x) == 0)
414	452	{
r9469	r9470
421	459	}
422	460	}
423	461
424		/* Video Start */
425	462
426		static VIDEO_START(abc806)
	463	//-------------------------------------------------
	464	// VIDEO_START( abc806 )
	465	//-------------------------------------------------
	466
	467	void abc806_state::video_start()
427	468	{
428		abc806_state *state = machine->driver_data<abc806_state>();
429
430		int i;
431
432		/* initialize variables */
433		for (i = 0; i < 16; i++)
	469	// initialize variables
	470	for (int i = 0; i < 16; i++)
434	471	{
435		~~state->~~hrc[i] = 0;
	472	m_hrc[i] = 0;
436	473	}
437	474
438		state->sync = 10;
439		state->d_vsync = 1;
440		state->vsync = 1;
441		state->_40 = 1;
	475	m_sync = 10;
	476	m_d_vsync = 1;
	477	m_vsync = 1;
	478	m_40 = 1;
442	479
443		/* find devices */
444		state->mc6845 = machine->device(MC6845_TAG);
	480	// find memory regions
	481	m_char_rom = memory_region(machine, MC6845_TAG);
	482	m_rad_prom = memory_region(machine, "rad");
	483	m_hru2_prom = memory_region(machine, "hru2");
445	484
446		/* find memory regions */
447		state->char_rom = memory_region(machine, "chargen");
448		state->rad_prom = memory_region(machine, "rad");
449		state->hru2_prom = memory_region(machine, "hru2");
	485	// allocate memory
	486	m_char_ram = auto_alloc_array(machine, UINT8, ABC806_CHAR_RAM_SIZE);
	487	m_color_ram = auto_alloc_array(machine, UINT8, ABC806_ATTR_RAM_SIZE);
450	488
451		/* allocate memory */
452		state->charram = auto_alloc_array(machine, UINT8, ABC806_CHAR_RAM_SIZE);
453		state->colorram = auto_alloc_array(machine, UINT8, ABC806_ATTR_RAM_SIZE);
454
455		/* register for state saving */
456		state_save_register_global_pointer(machine, state->charram, ABC806_CHAR_RAM_SIZE);
457		state_save_register_global_pointer(machine, state->colorram, ABC806_ATTR_RAM_SIZE);
458		state_save_register_global_pointer(machine, state->videoram, ABC806_VIDEO_RAM_SIZE);
459		state_save_register_global(machine, state->txoff);
460		state_save_register_global(machine, state->_40);
461		state_save_register_global(machine, state->flshclk_ctr);
462		state_save_register_global(machine, state->flshclk);
463		state_save_register_global(machine, state->attr_data);
464		state_save_register_global(machine, state->hrs);
465		state_save_register_global_array(machine, state->hrc);
466		state_save_register_global(machine, state->sync);
467		state_save_register_global(machine, state->v50_addr);
468		state_save_register_global(machine, state->hru2_a8);
469		state_save_register_global(machine, state->vsync_shift);
470		state_save_register_global(machine, state->vsync);
471		state_save_register_global(machine, state->d_vsync);
	489	// register for state saving
	490	state_save_register_global_pointer(machine, m_char_ram, ABC806_CHAR_RAM_SIZE);
	491	state_save_register_global_pointer(machine, m_color_ram, ABC806_ATTR_RAM_SIZE);
	492	state_save_register_global_pointer(machine, m_video_ram, ABC806_VIDEO_RAM_SIZE);
	493	state_save_register_global(machine, m_txoff);
	494	state_save_register_global(machine, m_40);
	495	state_save_register_global(machine, m_flshclk_ctr);
	496	state_save_register_global(machine, m_flshclk);
	497	state_save_register_global(machine, m_attr_data);
	498	state_save_register_global(machine, m_hrs);
	499	state_save_register_global_array(machine, m_hrc);
	500	state_save_register_global(machine, m_sync);
	501	state_save_register_global(machine, m_v50_addr);
	502	state_save_register_global(machine, m_hru2_a8);
	503	state_save_register_global(machine, m_vsync_shift);
	504	state_save_register_global(machine, m_vsync);
	505	state_save_register_global(machine, m_d_vsync);
472	506	}
473	507
474		/* Video Update */
475	508
476		static VIDEO_UPDATE( abc806 )
	509	//-------------------------------------------------
	510	// VIDEO_UPDATE( abc806 )
	511	//-------------------------------------------------
	512
	513	bool abc806_state::video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
477	514	{
478		abc806_state *state = screen->machine->driver_data<abc806_state>();
	515	// HACK expand visible area to workaround MC6845
	516	screen.set_visible_area(0, 767, 0, 311);
479	517
480		/* expand visible area to workaround MC6845 */
481		screen->set_visible_area(0, 767, 0, 311);
	518	// clear screen
	519	bitmap_fill(&bitmap, &cliprect, 0);
482	520
483		/* clear screen */
484		bitmap_fill(bitmap, cliprect, 0);
485
486		if (!state->txoff)
	521	if (!m_txoff)
487	522	{
488		/* draw text */
489		mc6845_update(state->mc6845, bitmap, cliprect);
	523	// draw text
	524	mc6845_update(m_crtc, &bitmap, &cliprect);
490	525	}
491	526
492		/* draw HR graphics */
493		abc806_hr_update(screen->machine, bitmap, cliprect);
	527	// draw HR graphics
	528	hr_update(&bitmap, &cliprect);
494	529
495	530	return 0;
496	531	}
497	532
498		/* Machine Drivers */
499	533
	534	//-------------------------------------------------
	535	// MACHINE_CONFIG_FRAGMENT( abc806_video )
	536	//-------------------------------------------------
	537
500	538	MACHINE_CONFIG_FRAGMENT( abc806_video )
501	539	MDRV_MC6845_ADD(MC6845_TAG, MC6845, ABC800_CCLK, crtc_intf)
502	540
r9469	r9470
511	549	MDRV_PALETTE_LENGTH(8)
512	550
513	551	MDRV_PALETTE_INIT(abc806)
514		MDRV_VIDEO_START(abc806)
515		MDRV_VIDEO_UPDATE(abc806)
516	552	MACHINE_CONFIG_END

src/mess/includes/abc80x.h
r9469	r9470
1		/*****************************************************************************
2		*
3		* includes/abc80x.h
4		*
5		****************************************************************************/
	1	#pragma once
6	2
7		#ifndef __ABC80X__
8		#define __ABC80X__
	3	#ifndef __ABC800__
	4	#define __ABC800__
9	5
	6	#include "machine/abc77.h"
	7	#include "machine/z80ctc.h"
	8	#include "machine/z80dart.h"
	9
	10
	11
	12	//**************************************************************************
	13	// MACROS / CONSTANTS
	14	//**************************************************************************
	15
10	16	#define ABC800_X01 XTAL_12MHz
11	17	#define ABC806_X02 XTAL_32_768kHz
12	18
r9469	r9470
24	30	#define ABC806_ATTR_RAM_SIZE 0x800
25	31	#define ABC806_VIDEO_RAM_SIZE 0x20000
26	32
	33	#define ABC800_CHAR_WIDTH 6
	34	#define ABC800_CCLK ABC800_X01/ABC800_CHAR_WIDTH
	35
27	36	#define SCREEN_TAG "screen"
28	37	#define Z80_TAG "z80"
29	38	#define I8048_TAG "i8048"
30	39	#define E0516_TAG "j13"
31	40	#define MC6845_TAG "b12"
	41	#define SAA5052_TAG "5c"
32	42	#define Z80CTC_TAG "z80ctc"
33	43	#define Z80SIO_TAG "z80sio"
34	44	#define Z80DART_TAG "z80dart"
35	45	#define ABCBUS_TAG "abcbus"
36	46	#define CASSETTE_TAG "cassette"
37	47
38		#define ABC800_CHAR_WIDTH 6
39		#define ABC800_CCLK ABC800_X01/ABC800_CHAR_WIDTH
40	48
	49
	50	//**************************************************************************
	51	// TYPE DEFINITIONS
	52	//**************************************************************************
	53
	54	// ======================> abc800_state
	55
41	56	class abc800_state : public driver_device
42	57	{
43	58	public:
44	59	abc800_state(running_machine &machine, const driver_device_config_base &config)
45		: driver_device(machine, config) { }
	60	: driver_device(machine, config),
	61	m_maincpu(*this, Z80_TAG),
	62	m_ctc(*this, Z80CTC_TAG),
	63	m_dart(*this, Z80DART_TAG),
	64	m_sio(*this, Z80SIO_TAG),
	65	m_crtc(*this, MC6845_TAG),
	66	m_trom(*this, SAA5052_TAG),
	67	m_discrete(*this, "discrete"),
	68	m_ram(*this, "messram")
	69	{ }
46	70
47		/* cpu state */
48		int fetch_charram; /* opcode fetched from character RAM region (0x7800-0x7fff) */
	71	required_device<cpu_device> m_maincpu;
	72	required_device<running_device> m_ctc;
	73	required_device<running_device> m_dart;
	74	required_device<running_device> m_sio;
	75	optional_device<running_device> m_crtc;
	76	optional_device<running_device> m_trom;
	77	required_device<running_device> m_discrete;
	78	required_device<running_device> m_ram;
49	79
50		/* video state */
51		UINT8 charram; / character RAM */
52		UINT8 videoram; / HR video RAM */
53		const UINT8 char_rom; / character generator ROM */
54		const UINT8 fgctl_prom; / foreground control PROM */
55		UINT8 hrs; /* HR picture start scanline */
56		UINT8 fgctl; /* HR foreground control */
	80	virtual void machine_start();
	81	virtual void machine_reset();
	82
	83	void bankswitch();
57	84
58		/* keyboard state */
59		int kb_row;
60		int kb_txd;
61		int kb_clk;
62		int kb_stb;
	85	DECLARE_READ8_MEMBER( pling_r );
	86	DECLARE_READ_LINE_MEMBER( keyboard_txd_r );
	87	DECLARE_READ8_MEMBER( keyboard_col_r );
	88	DECLARE_WRITE8_MEMBER( keyboard_row_w );
	89	DECLARE_WRITE8_MEMBER( keyboard_ctrl_w );
	90	DECLARE_READ8_MEMBER( keyboard_t1_r );
	91	DECLARE_WRITE8_MEMBER( hrs_w );
	92	DECLARE_WRITE8_MEMBER( hrc_w );
63	93
64		/* sound state */
65		int pling; /* pling */
	94	// cpu state
	95	int m_fetch_charram; // opcode fetched from character RAM region (0x7800-0x7fff)
66	96
67		/* serial state */
68		int z80sio_rxcb;
69		int z80sio_txcb;
	97	// video state
	98	UINT8 *m_char_ram; // character RAM
	99	UINT8 *m_video_ram; // HR video RAM
	100	const UINT8 *m_char_rom; // character generator ROM
	101	const UINT8 *fgctl_prom; // foreground control PROM
	102	UINT8 m_hrs; // HR picture start scanline
	103	UINT8 m_fgctl; // HR foreground control
70	104
71		/* devices */
72		running_device *z80ctc;
73		running_device *z80dart;
74		running_device *z80sio;
75		running_device *abc77;
76		running_device *mc6845;
77		running_device *cassette;
	105	// keyboard state
	106	int m_kb_row;
	107	int m_kb_txd;
	108	int m_kb_clk;
	109	int m_kb_stb;
	110
	111	// sound state
	112	int m_pling; // pling
	113
	114	// serial state
	115	int m_sio_rxcb;
	116	int m_sio_txcb;
78	117	};
79	118
	119
	120	// ======================> abc802_state
	121
80	122	class abc802_state : public driver_device
81	123	{
82	124	public:
83	125	abc802_state(running_machine &machine, const driver_device_config_base &config)
84		: driver_device(machine, config) { }
	126	: driver_device(machine, config),
	127	m_maincpu(*this, Z80_TAG),
	128	m_ctc(*this, Z80CTC_TAG),
	129	m_dart(*this, Z80DART_TAG),
	130	m_sio(*this, Z80SIO_TAG),
	131	m_crtc(*this, MC6845_TAG),
	132	abc77(*this, ABC77_TAG),
	133	m_discrete(*this, "discrete"),
	134	m_ram(*this, "messram")
	135	{ }
85	136
86		/* cpu state */
87		int lrs; /* low RAM select */
	137	required_device<cpu_device> m_maincpu;
	138	required_device<running_device> m_ctc;
	139	required_device<running_device> m_dart;
	140	required_device<running_device> m_sio;
	141	required_device<running_device> m_crtc;
	142	optional_device<running_device> abc77;
	143	required_device<running_device> m_discrete;
	144	required_device<running_device> m_ram;
88	145
89		/* video state */
90		UINT8 charram; / character RAM */
91		const UINT8 char_rom; / character generator ROM */
	146	virtual void machine_start();
	147	virtual void machine_reset();
92	148
93		int flshclk_ctr; /* flash clock counter */
94		int flshclk; /* flash clock */
95		int mux80_40; /* 40/80 column mode */
	149	virtual void video_start();
	150	virtual bool video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
96	151
97		/* sound state */
98		int pling; /* pling */
	152	void bankswitch();
99	153
100		/* devices */
101		running_device *z80ctc;
102		running_device *z80dart;
103		running_device *z80sio;
104		running_device *abc77;
105		running_device *mc6845;
106		running_device *cassette;
	154	DECLARE_READ8_MEMBER( pling_r );
	155	DECLARE_WRITE_LINE_MEMBER( lrs_w );
	156	DECLARE_WRITE_LINE_MEMBER( mux80_40_w );
	157	DECLARE_WRITE_LINE_MEMBER( vs_w );
	158
	159	// cpu state
	160	int m_lrs; // low RAM select
	161
	162	// video state
	163	UINT8 *m_char_ram; // character RAM
	164	const UINT8 *m_char_rom; // character generator ROM
	165
	166	int m_flshclk_ctr; // flash clock counter
	167	int m_flshclk; // flash clock
	168	int m_80_40_mux; // 40/80 column mode
	169
	170	// sound state
	171	int m_pling; // pling
107	172	};
108	173
	174
	175	// ======================> abc806_state
	176
109	177	class abc806_state : public driver_device
110	178	{
111	179	public:
112	180	abc806_state(running_machine &machine, const driver_device_config_base &config)
113		: driver_device(machine, config) { }
	181	: driver_device(machine, config),
	182	m_maincpu(*this, Z80_TAG),
	183	m_ctc(*this, Z80CTC_TAG),
	184	m_dart(*this, Z80DART_TAG),
	185	m_sio(*this, Z80SIO_TAG),
	186	m_crtc(*this, MC6845_TAG),
	187	m_rtc(*this, E0516_TAG),
	188	abc77(*this, ABC77_TAG),
	189	m_ram(*this, "messram")
	190	{ }
114	191
115		/* memory state */
116		int keydtr; /* keyboard DTR */
117		int eme; /* extended memory enable */
118		int fetch_charram; /* opcode fetched from character RAM region (0x7800-0x7fff) */
119		UINT8 map[16]; /* memory page register */
	192	required_device<cpu_device> m_maincpu;
	193	required_device<running_device> m_ctc;
	194	required_device<running_device> m_dart;
	195	required_device<running_device> m_sio;
	196	required_device<running_device> m_crtc;
	197	required_device<running_device> m_rtc;
	198	optional_device<running_device> abc77;
	199	required_device<running_device> m_ram;
	200
	201	virtual void machine_start();
	202	virtual void machine_reset();
120	203
121		/* video state */
122		UINT8 charram; / character RAM */
123		UINT8 colorram; / attribute RAM */
124		UINT8 videoram; / HR video RAM */
125		const UINT8 rad_prom; / line address PROM */
126		const UINT8 hru2_prom; / HR palette PROM */
127		const UINT8 char_rom; / character generator ROM */
	204	virtual void video_start();
	205	virtual bool video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
	206
	207	void bankswitch();
	208	void hr_update(bitmap_t bitmap, const rectangle cliprect);
128	209
129		int txoff; /* text display enable */
130		int _40; /* 40/80 column mode */
131		int flshclk_ctr; /* flash clock counter */
132		int flshclk; /* flash clock */
133		UINT8 attr_data; /* attribute data latch */
134		UINT8 hrs; /* HR memory mapping */
135		UINT8 hrc[16]; /* HR palette */
136		UINT8 sync; /* line synchronization delay */
137		UINT8 v50_addr; /* vertical sync PROM address */
138		int hru2_a8; /* HRU II PROM address line 8 */
139		UINT32 vsync_shift; /* vertical sync shift register */
140		int vsync; /* vertical sync */
141		int d_vsync; /* delayed vertical sync */
	210	DECLARE_READ8_MEMBER( mai_r );
	211	DECLARE_WRITE8_MEMBER( mao_w );
	212	DECLARE_WRITE8_MEMBER( hrs_w );
	213	DECLARE_WRITE8_MEMBER( hrc_w );
	214	DECLARE_READ8_MEMBER( charram_r );
	215	DECLARE_WRITE8_MEMBER( charram_w );
	216	DECLARE_READ8_MEMBER( ami_r );
	217	DECLARE_WRITE8_MEMBER( amo_w );
	218	DECLARE_READ8_MEMBER( cli_r );
	219	DECLARE_WRITE8_MEMBER( sso_w );
	220	DECLARE_READ8_MEMBER( sti_r );
	221	DECLARE_WRITE8_MEMBER( sto_w );
	222	DECLARE_WRITE_LINE_MEMBER( keydtr_w );
	223	DECLARE_WRITE_LINE_MEMBER( hs_w );
	224	DECLARE_WRITE_LINE_MEMBER( vs_w );
142	225
143		/* devices */
144		running_device *z80ctc;
145		running_device *z80dart;
146		running_device *z80sio;
147		running_device *mc6845;
148		running_device *abc77;
149		running_device *e0516;
150		running_device *cassette;
	226	// memory state
	227	int m_keydtr; // keyboard DTR
	228	int m_eme; // extended memory enable
	229	int m_fetch_charram; // opcode fetched from character RAM region (0x7800-0x7fff)
	230	UINT8 m_map[16]; // memory page register
	231
	232	// video state
	233	UINT8 *m_char_ram; // character RAM
	234	UINT8 *m_color_ram; // attribute RAM
	235	UINT8 *m_video_ram; // HR video RAM
	236	const UINT8 *m_rad_prom; // line address PROM
	237	const UINT8 *m_hru2_prom; // HR palette PROM
	238	const UINT8 *m_char_rom; // character generator ROM
	239
	240	int m_txoff; // text display enable
	241	int m_40; // 40/80 column mode
	242	int m_flshclk_ctr; // flash clock counter
	243	int m_flshclk; // flash clock
	244	UINT8 m_attr_data; // attribute data latch
	245	UINT8 m_hrs; // HR memory mapping
	246	UINT8 m_hrc[16]; // HR palette
	247	UINT8 m_sync; // line synchronization delay
	248	UINT8 m_v50_addr; // vertical sync PROM address
	249	int m_hru2_a8; // HRU II PROM address line 8
	250	UINT32 m_vsync_shift; // vertical sync shift register
	251	int m_vsync; // vertical sync
	252	int m_d_vsync; // delayed vertical sync
151	253	};
152	254
	255
	256
	257	//**************************************************************************
	258	// THESE SHOULD BE MEMBER FUNCTIONS
	259	//**************************************************************************
	260
153	261	/----------- defined in video/abc800.c -----------/
154	262
155	263	WRITE8_HANDLER( abc800_hrs_w );
r9469	r9470
166	274
167	275	MACHINE_CONFIG_EXTERN(abc806_video);
168	276
169		WRITE8_HANDLER( abc806_hrs_w );
170		WRITE8_HANDLER( abc806_hrc_w );
171
172		READ8_HANDLER( abc806_charram_r );
173		WRITE8_HANDLER( abc806_charram_w );
174
175		READ8_HANDLER( abc806_ami_r );
176		WRITE8_HANDLER( abc806_amo_w );
177
178		READ8_HANDLER( abc806_cli_r );
179		WRITE8_HANDLER( abc806_sso_w );
180
181		READ8_HANDLER( abc806_sti_r );
182		WRITE8_HANDLER( abc806_sto_w );
183
184		#endif /* __ABC80X__ */
	277	#endif

src/mess/drivers/abc80x.c
r9469	r9470
1	1	/*
2	2
3		Luxor ABC 800M
	3	Luxor ABC 800C/800M
4	4
5	5	Main PCB Layout
6	6	---------------
7	7
8		55 10970-02 (video board)
9
10	8	\|-----------------------\|-----------------------------------\|
11	9	\| 4116 4116 \| \|
12	10	\| 4116 4116 \| \|
13	11	\| 4116 4116 \| \|
14		\| 4116 4116 \|C Z80 Z80CTC \|
15		\| 4116 4116 \|N \|
16		\| 4116 4116 \|1 \|
	12	\| 4116 4116 \| Z80 Z80CTC \|
	13	\| 4116 4116 \|CN1 \|
	14	\| 4116 4116 \| \|
17	15	\| 4116 4116 \| Z80DART \|
18	16	\| \| CN6 \|
19	17	\| ROM3 ROM7 \| \|
r9469	r9470
26	24	\| CN7 \|
27	25	\|-------------------------------------------\| CN3 \|
28	26	\| \| \|
29		\| 2114 \| \|
30		\| 2114 \| CN4 \|
31		\| 12MHz\| \|
32		\| 2114 \| \|
33		\| 2114 \| CN5 \|
34	27	\| \| \|
35		\| ~~CRTC~~ ~~ROM8~~ \| \|
	28	\| \| CN4 \|
36	29	\| \| \|
	30	\| VIDEO BOARD \| \|
	31	\| \| CN5 \|
	32	\| \| \|
	33	\| \| \|
	34	\| \| \|
37	35	\|-------------------------------------------\|---------------\|
38	36
39	37	Notes:
40		~~Import~~ant IC's shown.
	38	Relevant IC's shown.
41	39
42	40	Z80 - ? Z80A CPU (labeled "Z80A (800) KASS.")
43	41	Z80CTC - Sharp LH0082A Z80A-CTC
44	42	Z80DART - SGS Z8470AB1 Z80A-DART
45	43	Z8OSIO2 - SGS Z8442AB1 Z80A-SIO/2
46	44	4116 - Toshiba TMS4116-20NL 1Kx8 RAM
47		2114 - Toshiba TMM314AP-1 1Kx4 RAM
48		CRTC - Hitachi HD46505SP CRTC
49	45	ROM0 - NEC D2732D 4Kx8 EPROM "ABC M-12"
50	46	ROM1 - NEC D2732D 4Kx8 EPROM "ABC 1-12"
51	47	ROM2 - NEC D2732D 4Kx8 EPROM "ABC 2-12"
r9469	r9470
54	50	ROM5 - NEC D2732D 4Kx8 EPROM "ABC 5-12"
55	51	ROM6 - Hitachi HN462732G 4Kx8 EPROM "ABC 6-52"
56	52	ROM7 - NEC D2732D 4Kx8 EPROM "ABC 7-22"
57		ROM8 - NEC D2716D 2Kx8 EPROM "VUM SE"
58	53	CN1 - ABC bus connector
59	54	CN2 - tape connector
60	55	CN3 - RS-232 channel B connector
r9469	r9470
64	59	CN7 - video board connector
65	60
66	61
	62	Video PCB Layout (Color)
	63	------------------------
	64
	65	55 10789-01
	66
	67	\|-------------------------------------------\|
	68	\| \|
	69	\| \|
	70	\| 2114 \|
	71	\| \|
	72	\| 2114 TROM \|
	73	\| \|
	74	\| 12MHz TIC \|
	75	\| \|
	76	\| \|
	77	\|-------------------------------------------\|
	78
	79	Notes:
	80	Relevant IC's shown.
	81
	82	2114 - GTE Microcircuits 2114-2CB 1Kx4 RAM
	83	TIC - Philips SAA5020 Teletext Timing Chain
	84	TROM - Philips SAA5052 Teletext Character Generator w/Swedish Character Set
	85
	86
	87	Video PCB Layout (Monochrome)
	88	-----------------------------
	89
	90	55 10790-02
	91
	92	\|-------------------------------------------\|
	93	\| \|
	94	\| 2114 \|
	95	\| 2114 \|
	96	\| 12MHz\|
	97	\| 2114 \|
	98	\| 2114 \|
	99	\| \|
	100	\| CRTC ROM0 \|
	101	\| \|
	102	\|-------------------------------------------\|
	103
	104	Notes:
	105	Relevant IC's shown.
	106
	107	2114 - Toshiba TMM314AP-1 1Kx4 RAM
	108	CRTC - Hitachi HD46505SP CRTC
	109	ROM0 - NEC D2716D 2Kx8 EPROM "VUM SE"
	110
	111
	112	Video PCB Layout (High Resolution)
	113	----------------------------------
	114
	115	55 10791-01
	116
	117	\|-------------------------------------------\|
	118	\| \|
	119	\| 4116 PROM1 \|
	120	\| 4116 \|
	121	\| 4116 \|
	122	\| 4116 \|
	123	\| 4116 \|
	124	\| 4116 \|
	125	\| 4116 \|
	126	\| 4116 PROM0 \|
	127	\|-------------------------------------------\|
	128
	129	Notes:
	130	Relevant IC's shown.
	131
	132	4116 - Motorola MCM4116AC25 1Kx8 RAM
	133	PROM0 - some kind of PROM "HRU I"
	134	PROM1 - some kind of PROM "HRU II"
	135
	136
	137	UNI-800 PCB Layout
	138	------------------
	139
	140	8120 821025 REV.3
	141
	142	\|-------------------------------------------\|
	143	\| \|
	144	\| 4164 PROM0 CN3 \|
	145	\| 4164 \|
	146	\| 4164 \|
	147	\| 4164 \|
	148	\| 4164 \|
	149	\| 4164 \|
	150	\|CN1 4164 CN2 \|
	151	\| 4164 \|
	152	\|-------------------------------------------\|
	153
	154	Notes:
	155	Relevant IC's shown.
	156
	157	4164 - Hitachi HM4864P-2 64Kx1 RAM
	158	PROM0 - some kind of PROM ".800 1.2"
	159	CN1 - 2x6 pin PCB header
	160	CN2 - 2x10 pin PCB header
	161	CN3 - 2x10 pin PCB header
	162
	163
67	164	Keyboard PCB Layout
68	165	-------------------
69	166
r9469	r9470
128	225
129	226	TODO:
130	227
131		- check compatibility with new MC6845
	228	- update Z80 DART/CTC/SIO references to use new device system
	229	- rewrite abc806 bankswitch to use install_ram/rom
132	230	- ABC800 keyboard: T1 clock frequency, caps lock led, keydown
133	231	- ABC802/806 ABC77 keyboard
134		- find ROMs for ABC800C
135	232	- hard disks (ABC-850 10MB, ABC-852 20MB, ABC-856 60MB)
136	233
137	234	*/
138	235
139		/* Core includes */
	236	#define ADDRESS_MAP_MODERN
	237
140	238	#include "emu.h"
141	239	#include "includes/abc80x.h"
142
143		/* Components */
144	240	#include "cpu/z80/z80.h"
145	241	#include "cpu/z80/z80daisy.h"
146	242	#include "cpu/mcs48/mcs48.h"
	243	#include "devices/cassette.h"
	244	#include "devices/printer.h"
	245	#include "devices/messram.h"
147	246	#include "machine/serial.h"
148	247	#include "machine/z80ctc.h"
149	248	#include "machine/z80dart.h"
r9469	r9470
152	251	#include "machine/abc77.h"
153	252	#include "machine/abc830.h"
154	253	#include "video/mc6845.h"
	254	#include "video/saa5050.h"
155	255	#include "sound/discrete.h"
156	256
157		/* Devices */
158		#include "devices/cassette.h"
159		#include "devices/printer.h"
160		#include "devices/messram.h"
161	257
162		/* Discrete Sound */
163	258
164		static DISCRETE_SOUND_START( abc800 )
165		DISCRETE_INPUT_LOGIC(NODE_01)
166		DISCRETE_OUTPUT(NODE_01, 5000)
167		DISCRETE_SOUND_END
	259	//**************************************************************************
	260	// KEYBOARD HACK
	261	//**************************************************************************
168	262
169		/* Keyboard HACK */
	263	static INPUT_PORTS_START( fake_keyboard )
	264	PORT_START("ROW0")
	265	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
	266	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"')
	267	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
	268	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("4 \xC2\xA4") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR(0x00A4)
	269	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
	270	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&')
	271	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('/')
	272	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(')
170	273
171		enum
172		{
173		CHANNEL_A = 0,
174		CHANNEL_B
175		};
	274	PORT_START("ROW1")
	275	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')')
	276	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=')
	277	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('+') PORT_CHAR('?')
	278	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(0x00E9) PORT_CHAR(0x00C9)
	279	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('<') PORT_CHAR('>')
	280	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
	281	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
	282	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
176	283
	284	PORT_START("ROW2")
	285	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
	286	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
	287	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
	288	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
	289	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
	290	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
	291	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
	292	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR(0x00E5) PORT_CHAR(0x00C5)
	293
	294	PORT_START("ROW3")
	295	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(0x00FC) PORT_CHAR(0x00DC)
	296	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r')
	297	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
	298	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
	299	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
	300	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
	301	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
	302	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
	303
	304	PORT_START("ROW4")
	305	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
	306	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
	307	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
	308	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(0x00F6) PORT_CHAR(0x00D6)
	309	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(0x00E4) PORT_CHAR(0x00C4)
	310	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\'') PORT_CHAR('*')
	311	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x90") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
	312	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
	313
	314	PORT_START("ROW5")
	315	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
	316	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
	317	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
	318	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
	319	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
	320	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
	321	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR(';')
	322	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR(':')
	323
	324	PORT_START("ROW6")
	325	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('_')
	326	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x92") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
	327	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
	328	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
	329	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
	330	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
	331	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
	332	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
	333
	334	PORT_START("ROW7")
	335	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("LEFT SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
	336	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("RIGHT SHIFT") PORT_CODE(KEYCODE_RSHIFT)
	337	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("UPPER CASE") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) PORT_TOGGLE
	338	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
	339	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
	340	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
	341	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
	342	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
	343	INPUT_PORTS_END
	344
177	345	static int keylatch;
178	346
179	347	static const UINT8 abc800_keycodes[7*4][8] =
r9469	r9470
254	422	{
255	423	if (keycode != keylatch)
256	424	{
257		z80dart_device *~~z80~~dart = machine->device<z80dart_device>(Z80DART_TAG);
	425	z80dart_device *m_dart = machine->device<z80dart_device>(Z80DART_TAG);
258	426
259		z80dart_dcdb_w(z80dart, 0);
260		z80dart->receive_data(CHANNEL_B, keycode);
	427	z80dart_dcdb_w(m_dart, 0);
	428	m_dart->receive_data(1, keycode);
261	429
262	430	keylatch = keycode;
263	431	}
r9469	r9470
266	434	{
267	435	if (keylatch)
268	436	{
269		z80dart_device *~~z80~~dart = machine->device<z80dart_device>(Z80DART_TAG);
	437	z80dart_device *m_dart = machine->device<z80dart_device>(Z80DART_TAG);
270	438
271		z80dart_dcdb_w(z80dart, 1);
272		z80dart->receive_data(CHANNEL_B, 0);
	439	z80dart_dcdb_w(m_dart, 1);
	440	m_dart->receive_data(1, 0);
273	441
274	442	keylatch = 0;
275	443	}
r9469	r9470
281	449	scan_keyboard(timer.machine);
282	450	}
283	451
284		/* Memory Banking */
285	452
286		static void abc800_bankswitch(running_machine *machine)
	453
	454	//**************************************************************************
	455	// SOUND
	456	//**************************************************************************
	457
	458	//-------------------------------------------------
	459	// DISCRETE_SOUND( abc800 )
	460	//-------------------------------------------------
	461
	462	static DISCRETE_SOUND_START( abc800 )
	463	DISCRETE_INPUT_LOGIC(NODE_01)
	464	DISCRETE_OUTPUT(NODE_01, 5000)
	465	DISCRETE_SOUND_END
	466
	467
	468	//-------------------------------------------------
	469	// pling_r - speaker read
	470	//-------------------------------------------------
	471
	472	READ8_MEMBER( abc800_state::pling_r )
287	473	{
288		abc800_state *state = machine->driver_data<abc800_state>();
289		address_space *program = cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM);
	474	m_pling = !m_pling;
290	475
291		if (state->fetch_charram)
	476	discrete_sound_w(m_discrete, NODE_01, m_pling);
	477
	478	return 0xff;
	479	}
	480
	481
	482	//-------------------------------------------------
	483	// pling_r - speaker read
	484	//-------------------------------------------------
	485
	486	READ8_MEMBER( abc802_state::pling_r )
	487	{
	488	m_pling = !m_pling;
	489
	490	discrete_sound_w(m_discrete, NODE_01, m_pling);
	491
	492	return 0xff;
	493	}
	494
	495
	496
	497	//**************************************************************************
	498	// MEMORY BANKING
	499	//**************************************************************************
	500
	501	//-------------------------------------------------
	502	// bankswitch
	503	//-------------------------------------------------
	504
	505	void abc800_state::bankswitch()
	506	{
	507	address_space *program = cpu_get_address_space(m_maincpu, ADDRESS_SPACE_PROGRAM);
	508
	509	if (m_fetch_charram)
292	510	{
293		/* HR video RAM selected */
294		memory_install_ram(program, 0x0000, 0x3fff, 0, 0, state->videoram);
	511	// HR video RAM selected
	512	memory_install_ram(program, 0x0000, 0x3fff, 0, 0, m_video_ram);
295	513	}
296	514	else
297	515	{
298		/* BASIC ROM selected */
	516	// BASIC ROM selected
299	517	memory_install_rom(program, 0x0000, 0x3fff, 0, 0, memory_region(machine, Z80_TAG));
300	518	}
301	519	}
302	520
303		static void abc802_bankswitch(running_machine *machine)
	521
	522	//-------------------------------------------------
	523	// bankswitch
	524	//-------------------------------------------------
	525
	526	void abc802_state::bankswitch()
304	527	{
305		abc802_state *state = machine->driver_data<abc802_state>();
306		address_space *program = cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM);
	528	address_space *program = cpu_get_address_space(m_maincpu, ADDRESS_SPACE_PROGRAM);
307	529
308		if (~~state->~~lrs)
	530	if (m_lrs)
309	531	{
310		/* ROM and video RAM selected */
	532	// ROM and video RAM selected
311	533	memory_install_rom(program, 0x0000, 0x77ff, 0, 0, memory_region(machine, Z80_TAG));
312		memory_install_ram(program, 0x7800, 0x7fff, 0, 0, ~~state->~~charram);
	534	memory_install_ram(program, 0x7800, 0x7fff, 0, 0, m_char_ram);
313	535	}
314	536	else
315	537	{
316		/* low RAM selected */
317		memory_install_ram(program, 0x0000, 0x7fff, 0, 0, messram_get_ptr(machine->device("messram")));
	538	// low RAM selected
	539	memory_install_ram(program, 0x0000, 0x7fff, 0, 0, messram_get_ptr(m_ram));
318	540	}
319	541	}
320	542
321		static void abc806_bankswitch(running_machine *machine)
	543
	544	//-------------------------------------------------
	545	// bankswitch
	546	//-------------------------------------------------
	547
	548	void abc806_state::bankswitch()
322	549	{
323		abc806_state *state = machine->driver_data<abc806_state>();
324		address_space *program = cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM);
325		UINT32 videoram_mask = messram_get_size(machine->device("messram")) - (32 * 1024) - 1;
	550	address_space *program = cpu_get_address_space(m_maincpu, ADDRESS_SPACE_PROGRAM);
	551	UINT32 videoram_mask = messram_get_size(m_ram) - (32 * 1024) - 1;
326	552	int bank;
327	553	char bank_name[10];
328	554
329		if (!~~state->~~keydtr)
	555	if (!m_keydtr)
330	556	{
331		/* 32K block mapping */
	557	// 32K block mapping
332	558
333		UINT32 videoram_start = (~~state->~~hrs & 0xf0) << 11;
	559	UINT32 videoram_start = (m_hrs & 0xf0) << 11;
334	560
335	561	for (bank = 1; bank <= 8; bank++)
336	562	{
337		/* 0x0000-0x7FFF is video RAM */
	563	// 0x0000-0x7FFF is video RAM
338	564
339	565	UINT16 start_addr = 0x1000 * (bank - 1);
340	566	UINT16 end_addr = start_addr + 0xfff;
r9469	r9470
343	569	//logerror("%04x-%04x: Video RAM %04x (32K)\n", start_addr, end_addr, videoram_offset);
344	570
345	571	memory_install_readwrite_bank(program, start_addr, end_addr, 0, 0, bank_name);
346		memory_configure_bank(machine, bank_name, 1, 1, ~~state->~~videoram + videoram_offset, 0);
	572	memory_configure_bank(machine, bank_name, 1, 1, m_video_ram + videoram_offset, 0);
347	573	memory_set_bank(machine, bank_name, 1);
348	574	}
349	575
350	576	for (bank = 9; bank <= 16; bank++)
351	577	{
352		/* 0x8000-0xFFFF is main RAM */
	578	// 0x8000-0xFFFF is main RAM
353	579
354	580	UINT16 start_addr = 0x1000 * (bank - 1);
355	581	UINT16 end_addr = start_addr + 0xfff;
r9469	r9470
362	588	}
363	589	else
364	590	{
365		/* 4K block mapping */
	591	// 4K block mapping
366	592
367	593	for (bank = 1; bank <= 16; bank++)
368	594	{
369	595	UINT16 start_addr = 0x1000 * (bank - 1);
370	596	UINT16 end_addr = start_addr + 0xfff;
371		UINT8 map = ~~state->~~map[bank - 1];
	597	UINT8 map = m_map[bank - 1];
372	598	UINT32 videoram_offset = ((map & 0x7f) << 12) & videoram_mask;
373	599	sprintf(bank_name,"bank%d",bank);
374		if (BIT(map, 7) && ~~state->~~eme)
	600	if (BIT(map, 7) && m_eme)
375	601	{
376		/* map to video RAM */
	602	// map to video RAM
377	603	//logerror("%04x-%04x: Video RAM %04x (4K)\n", start_addr, end_addr, videoram_offset);
378	604
379	605	memory_install_readwrite_bank(program, start_addr, end_addr, 0, 0, bank_name);
380		memory_configure_bank(machine, bank_name, 1, 1, ~~state->~~videoram + videoram_offset, 0);
	606	memory_configure_bank(machine, bank_name, 1, 1, m_video_ram + videoram_offset, 0);
381	607	memory_set_bank(machine, bank_name, 1);
382	608	}
383	609	else
384	610	{
385		/* map to ROM/RAM */
	611	// map to ROM/RAM
386	612
387	613	switch (bank)
388	614	{
389	615	case 1: case 2: case 3: case 4: case 5: case 6: case 7:
390		/* ROM */
	616	// ROM
391	617	//logerror("%04x-%04x: ROM (4K)\n", start_addr, end_addr);
392	618
393	619	memory_install_read_bank(program, start_addr, end_addr, 0, 0, bank_name);
r9469	r9470
396	622	break;
397	623
398	624	case 8:
399		/* ROM/char RAM */
	625	// ROM/char RAM
400	626	//logerror("%04x-%04x: ROM (4K)\n", start_addr, end_addr);
401	627
402	628	memory_install_read_bank(program, 0x7000, 0x77ff, 0, 0, bank_name);
403	629	memory_unmap_write(program, 0x7000, 0x77ff, 0, 0);
404		~~mem~~ory_install_~~readwrite8_~~handler(~~program,~~ 0x7800, 0x7fff, 0, 0, abc806_charram_r, abc806_charram_w);
	630	program->install_handler(0x7800, 0x7fff, 0, 0, read8_delegate_create(abc806_state, charram_r, this), write8_delegate_create(abc806_state, charram_w, this));
405	631	memory_set_bank(machine, bank_name, 0);
406	632	break;
407	633
408	634	default:
409		/* work RAM */
	635	// work RAM
410	636	//logerror("%04x-%04x: Work RAM (4K)\n", start_addr, end_addr);
411	637
412	638	memory_install_readwrite_bank(program, start_addr, end_addr, 0, 0, bank_name);
r9469	r9470
417	643	}
418	644	}
419	645
420		if (~~state->~~fetch_charram)
	646	if (m_fetch_charram)
421	647	{
422		/* 30K block mapping */
	648	// 30K block mapping
423	649
424		UINT32 videoram_start = (~~state->~~hrs & 0xf0) << 11;
	650	UINT32 videoram_start = (m_hrs & 0xf0) << 11;
425	651
426	652	for (bank = 1; bank <= 8; bank++)
427	653	{
428		/* 0x0000-0x77FF is video RAM */
	654	// 0x0000-0x77FF is video RAM
429	655
430	656	UINT16 start_addr = 0x1000 * (bank - 1);
431	657	UINT16 end_addr = start_addr + 0xfff;
r9469	r9470
436	662	if (start_addr == 0x7000)
437	663	{
438	664	memory_install_readwrite_bank(program, 0x7000, 0x77ff, 0, 0, bank_name);
439		~~mem~~ory_install_~~readwrite8_~~handler(~~program,~~ 0x7800, 0x7fff, 0, 0, abc806_charram_r, abc806_charram_w);
	665	program->install_handler(0x7800, 0x7fff, 0, 0, read8_delegate_create(abc806_state, charram_r, this), write8_delegate_create(abc806_state, charram_w, this));
440	666	}
441	667	else
442	668	{
443	669	memory_install_readwrite_bank(program, start_addr, end_addr, 0, 0, bank_name);
444	670	}
445	671
446		memory_configure_bank(machine, bank_name, 1, 1, ~~state->~~videoram + videoram_offset, 0);
	672	memory_configure_bank(machine, bank_name, 1, 1, m_video_ram + videoram_offset, 0);
447	673	memory_set_bank(machine, bank_name, 1);
448	674	}
449	675	}
450	676	}
451	677
452		static READ8_HANDLER( abc806_mai_r )
	678
	679	//-------------------------------------------------
	680	// mai_r - memory bank map read
	681	//-------------------------------------------------
	682
	683	READ8_MEMBER( abc806_state::mai_r )
453	684	{
454		abc806_state *state = space->machine->driver_data<abc806_state>();
455
456	685	int bank = offset >> 12;
457	686
458		return ~~state->~~map[bank];
	687	return m_map[bank];
459	688	}
460	689
461		static WRITE8_HANDLER( abc806_mao_w )
	690
	691	//-------------------------------------------------
	692	// mao_w - memory bank map write
	693	//-------------------------------------------------
	694
	695	WRITE8_MEMBER( abc806_state::mao_w )
462	696	{
463	697	/*
464	698
r9469	r9470
475	709
476	710	*/
477	711
478		abc806_state *state = space->machine->driver_data<abc806_state>();
479
480	712	int bank = offset >> 12;
481	713
482		~~state->~~map[bank] = data;
	714	m_map[bank] = data;
483	715
484		ab~~c806_b~~ankswitch(~~space->machine~~);
	716	bankswitch();
485	717	}
486	718
487		/* Pling */
488	719
489		static READ8_HANDLER( abc800_pling_r )
490		{
491		running_device *discrete = space->machine->device("discrete");
492		abc800_state *state = space->machine->driver_data<abc800_state>();
493	720
494		state->pling = !state->pling;
	721	//**************************************************************************
	722	// INTEGRATED KEYBOARD
	723	//**************************************************************************
495	724
496		discrete_sound_w(discrete, NODE_01, state->pling);
	725	//-------------------------------------------------
	726	// TIMER_DEVICE_CALLBACK( keyboard_t1_tick )
	727	//-------------------------------------------------
497	728
498		return 0xff;
499		}
500
501		static READ8_HANDLER( abc802_pling_r )
	729	static TIMER_DEVICE_CALLBACK( keyboard_t1_tick )
502	730	{
503		running_device *discrete = space->machine->device("discrete");
504		abc802_state *state = space->machine->driver_data<abc802_state>();
	731	abc800_state *state = timer.machine->driver_data<abc800_state>();
505	732
506		state->pl~~ing~~ = !state->pl~~ing~~;
	733	state->m_kb_clk = !state->m_kb_clk;
507	734
508		discrete_sound_w(discrete, NODE_01, state->pling);
509
510		return 0xff;
	735	z80dart_rxtxcb_w(state->m_dart, state->m_kb_clk);
511	736	}
512	737
513		/* Keyboard */
514	738
515		static TIMER_DEVICE_CALLBACK( keyboard_t1_tick )
	739	//-------------------------------------------------
	740	// keyboard_txd_r - keyboard transmit data read
	741	//-------------------------------------------------
	742
	743	READ_LINE_MEMBER( abc800_state::keyboard_txd_r )
516	744	{
517		abc800_state *state = timer.machine->driver_data<abc800_state>();
518
519		state->kb_clk = !state->kb_clk;
520
521		z80dart_rxtxcb_w(state->z80dart, state->kb_clk);
	745	return m_kb_txd;
522	746	}
523	747
524		static READ_LINE_DEVICE_HANDLER( keyboard_txd_r )
525		{
526		abc800_state *state = device->machine->driver_data<abc800_state>();
527	748
528		return state->kb_txd;
529		}
	749	//-------------------------------------------------
	750	// keyboard_rxd_w - keyboard receive data write
	751	//-------------------------------------------------
530	752
531	753	static WRITE_LINE_DEVICE_HANDLER( keyboard_rxd_w )
532	754	{
533	755	cpu_set_input_line(device, MCS48_INPUT_IRQ, state ? CLEAR_LINE : ASSERT_LINE);
534	756	}
535	757
536		static READ8_HANDLER( keyboard_col_r )
	758
	759	//-------------------------------------------------
	760	// keyboard_col_r - keyboard column data read
	761	//-------------------------------------------------
	762
	763	READ8_MEMBER( abc800_state::keyboard_col_r )
537	764	{
538		abc800_state *state = space->machine->driver_data<abc800_state>();
539
540	765	static const char *const ABC800_KEY_ROW[] = { "Y0", "Y1", "Y2", "Y3", "Y4", "Y5", "Y6", "Y7", "Y8", "Y9", "Y10", "Y11" };
541	766	UINT8 data = 0xff;
542	767
543		if (~~state->~~kb_stb && ~~state->~~kb_row < 12)
	768	if (m_kb_stb && m_kb_row < 12)
544	769	{
545		data = input_port_read(~~space->~~machine, ABC800_KEY_ROW[~~state->~~kb_row]);
	770	data = input_port_read(&m_machine, ABC800_KEY_ROW[m_kb_row]);
546	771	}
547	772
548	773	return data;
549	774	}
550	775
551		static WRITE8_HANDLER( keyboard_row_w )
	776
	777	//-------------------------------------------------
	778	// keyboard_row_w - keyboard row write
	779	//-------------------------------------------------
	780
	781	WRITE8_MEMBER( abc800_state::keyboard_row_w )
552	782	{
553	783	/*
554	784
r9469	r9470
565	795
566	796	*/
567	797
568		abc800_state *state = space->machine->driver_data<abc800_state>();
569
570	798	// keyboard row
571		if (!~~state->~~kb_stb)
	799	if (!m_kb_stb)
572	800	{
573		~~state->~~kb_row = data & 0x0f;
	801	m_kb_row = data & 0x0f;
574	802	}
575	803	}
576	804
577		static WRITE8_HANDLER( keyboard_ctrl_w )
	805
	806	//-------------------------------------------------
	807	// keyboard_ctrl_w - keyboard control write
	808	//-------------------------------------------------
	809
	810	WRITE8_MEMBER( abc800_state::keyboard_ctrl_w )
578	811	{
579	812	/*
580	813
r9469	r9470
591	824
592	825	*/
593	826
594		abc800_state *state = space->machine->driver_data<abc800_state>();
595
596	827	// TxD
597		~~state->~~kb_txd = !BIT(data, 4);
	828	m_kb_txd = !BIT(data, 4);
598	829
599	830	// keydown
600		z80dart_dcdb_w(~~state->z80~~dart, !BIT(data, 5));
	831	z80dart_dcdb_w(m_dart, !BIT(data, 5));
601	832
602	833	// strobe
603		~~state->~~kb_stb = BIT(data, 6);
	834	m_kb_stb = BIT(data, 6);
604	835	}
605	836
606		static READ8_HANDLER( keyboard_t1_r )
	837
	838	//-------------------------------------------------
	839	// keyboard_t1_r - keyboard T1 timer read
	840	//-------------------------------------------------
	841
	842	READ8_MEMBER( abc800_state::keyboard_t1_r )
607	843	{
608		abc800_state *state = space->machine->driver_data<abc800_state>();
609
610		return state->kb_clk;
	844	return m_kb_clk;
611	845	}
612	846
613		/* Memory Maps */
614	847
615		// ABC 800M
616	848
617		static ADDRESS_MAP_START( abc800m_map, ADDRESS_SPACE_PROGRAM, 8 )
	849	//**************************************************************************
	850	// ADDRESS MAPS
	851	//**************************************************************************
	852
	853	//-------------------------------------------------
	854	// ADDRESS_MAP( abc800c_mem )
	855	//-------------------------------------------------
	856
	857	static ADDRESS_MAP_START( abc800c_mem, ADDRESS_SPACE_PROGRAM, 8, abc800_state )
618	858	ADDRESS_MAP_UNMAP_HIGH
619		AM_RANGE(0x0000, 0x3fff) AM_RAM AM_BASE_MEMBER(abc800_state, videoram)
620		AM_RANGE(0x4000, 0x77ff) AM_ROM
621		AM_RANGE(0x7800, 0x7fff) AM_RAM AM_BASE_MEMBER(abc800_state, charram)
	859	AM_RANGE(0x0000, 0x3fff) AM_RAM AM_BASE(m_video_ram)
	860	AM_RANGE(0x4000, 0x7bff) AM_ROM
	861	AM_RANGE(0x7c00, 0x7fff) AM_DEVREADWRITE_LEGACY(SAA5052_TAG, saa5050_videoram_r, saa5050_videoram_w)
622	862	AM_RANGE(0x8000, 0xffff) AM_RAM
623	863	ADDRESS_MAP_END
624	864
625		static ADDRESS_MAP_START( abc800m_io_map, ADDRESS_SPACE_IO, 8 )
	865
	866	//-------------------------------------------------
	867	// ADDRESS_MAP( abc800c_io )
	868	//-------------------------------------------------
	869
	870	static ADDRESS_MAP_START( abc800c_io, ADDRESS_SPACE_IO, 8, abc800_state )
626	871	ADDRESS_MAP_UNMAP_HIGH
627	872	ADDRESS_MAP_GLOBAL_MASK(0xff)
628		AM_RANGE(0x00, 0x00) AM_MIRROR(0x18) AM_DEVREADWRITE(ABCBUS_TAG, abcbus_inp_r, abcbus_utp_w)
629		AM_RANGE(0x01, 0x01) AM_MIRROR(0x18) AM_DEVREADWRITE(ABCBUS_TAG, abcbus_stat_r, abcbus_cs_w)
630		AM_RANGE(0x02, 0x02) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c1_w)
631		AM_RANGE(0x03, 0x03) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c2_w)
632		AM_RANGE(0x04, 0x04) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c3_w)
633		AM_RANGE(0x05, 0x05) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c4_w)
634		AM_RANGE(0x05, 0x05) AM_MIRROR(0x18) AM_READ(abc800_pling_r)
635		AM_RANGE(0x06, 0x06) AM_MIRROR(0x18) AM_WRITE(abc800_hrs_w)
636		AM_RANGE(0x07, 0x07) AM_MIRROR(0x18) AM_DEVREAD(ABCBUS_TAG, abcbus_rst_r) AM_WRITE(abc800_hrc_w)
637		AM_RANGE(0x20, 0x23) AM_MIRROR(0x0c) AM_DEVREADWRITE(Z80DART_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
638		AM_RANGE(0x31, 0x31) AM_MIRROR(0x06) AM_DEVREAD(MC6845_TAG, mc6845_register_r)
639		AM_RANGE(0x38, 0x38) AM_MIRROR(0x06) AM_DEVWRITE(MC6845_TAG, mc6845_address_w)
640		AM_RANGE(0x39, 0x39) AM_MIRROR(0x06) AM_DEVWRITE(MC6845_TAG, mc6845_register_w)
641		AM_RANGE(0x40, 0x43) AM_MIRROR(0x1c) AM_DEVREADWRITE(Z80SIO_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
642		AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
	873	AM_RANGE(0x00, 0x00) AM_MIRROR(0x18) AM_DEVREADWRITE_LEGACY(ABCBUS_TAG, abcbus_inp_r, abcbus_utp_w)
	874	AM_RANGE(0x01, 0x01) AM_MIRROR(0x18) AM_DEVREADWRITE_LEGACY(ABCBUS_TAG, abcbus_stat_r, abcbus_cs_w)
	875	AM_RANGE(0x02, 0x02) AM_MIRROR(0x18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c1_w)
	876	AM_RANGE(0x03, 0x03) AM_MIRROR(0x18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c2_w)
	877	AM_RANGE(0x04, 0x04) AM_MIRROR(0x18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c3_w)
	878	AM_RANGE(0x05, 0x05) AM_MIRROR(0x18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c4_w)
	879	AM_RANGE(0x05, 0x05) AM_MIRROR(0x18) AM_READ(pling_r)
	880	AM_RANGE(0x06, 0x06) AM_MIRROR(0x18) AM_WRITE(hrs_w)
	881	AM_RANGE(0x07, 0x07) AM_MIRROR(0x18) AM_DEVREAD_LEGACY(ABCBUS_TAG, abcbus_rst_r) AM_WRITE(hrc_w)
	882	AM_RANGE(0x20, 0x23) AM_MIRROR(0x0c) AM_DEVREADWRITE_LEGACY(Z80DART_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
	883	AM_RANGE(0x40, 0x43) AM_MIRROR(0x1c) AM_DEVREADWRITE_LEGACY(Z80SIO_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
	884	AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_DEVREADWRITE_LEGACY(Z80CTC_TAG, z80ctc_r, z80ctc_w)
643	885	ADDRESS_MAP_END
644	886
645		static ADDRESS_MAP_START( keyboard_io_map, ADDRESS_SPACE_IO, 8 )
	887
	888	//-------------------------------------------------
	889	// ADDRESS_MAP( abc800_keyboard_io )
	890	//-------------------------------------------------
	891
	892	static ADDRESS_MAP_START( abc800_keyboard_io, ADDRESS_SPACE_IO, 8, abc800_state )
646	893	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(keyboard_col_r, keyboard_row_w)
647	894	AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(keyboard_ctrl_w)
648	895	AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(keyboard_t1_r)
649	896	ADDRESS_MAP_END
650	897
651		// ABC 800C
652	898
653		static ADDRESS_MAP_START( abc800c_map, ADDRESS_SPACE_PROGRAM, 8 )
	899	//-------------------------------------------------
	900	// ADDRESS_MAP( abc800m_mem )
	901	//-------------------------------------------------
	902
	903	static ADDRESS_MAP_START( abc800m_mem, ADDRESS_SPACE_PROGRAM, 8, abc800_state )
654	904	ADDRESS_MAP_UNMAP_HIGH
655		AM_RANGE(0x0000, 0x3fff) AM_RAM AM_BASE_MEMBER(abc800_state, videoram)
656		AM_RANGE(0x4000, 0x7bff) AM_ROM
657		AM_RANGE(0x7c00, 0x7fff) AM_RAM AM_BASE_MEMBER(abc800_state, charram)
	905	AM_RANGE(0x0000, 0x3fff) AM_RAM AM_BASE(m_video_ram)
	906	AM_RANGE(0x4000, 0x77ff) AM_ROM
	907	AM_RANGE(0x7800, 0x7fff) AM_RAM AM_BASE(m_char_ram)
658	908	AM_RANGE(0x8000, 0xffff) AM_RAM
659	909	ADDRESS_MAP_END
660	910
661		static ADDRESS_MAP_START( abc800c_io_map, ADDRESS_SPACE_IO, 8 )
662		ADDRESS_MAP_UNMAP_HIGH
663		ADDRESS_MAP_GLOBAL_MASK(0xff)
664		AM_RANGE(0x00, 0x00) AM_MIRROR(0x18) AM_DEVREADWRITE(ABCBUS_TAG, abcbus_inp_r, abcbus_utp_w)
665		AM_RANGE(0x01, 0x01) AM_MIRROR(0x18) AM_DEVREADWRITE(ABCBUS_TAG, abcbus_stat_r, abcbus_cs_w)
666		AM_RANGE(0x02, 0x02) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c1_w)
667		AM_RANGE(0x03, 0x03) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c2_w)
668		AM_RANGE(0x04, 0x04) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c3_w)
669		AM_RANGE(0x05, 0x05) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c4_w)
670		AM_RANGE(0x05, 0x05) AM_MIRROR(0x18) AM_READ(abc800_pling_r)
671		AM_RANGE(0x06, 0x06) AM_MIRROR(0x18) AM_WRITE(abc800_hrs_w)
672		AM_RANGE(0x07, 0x07) AM_MIRROR(0x18) AM_DEVREAD(ABCBUS_TAG, abcbus_rst_r) AM_WRITE(abc800_hrc_w)
673		AM_RANGE(0x20, 0x23) AM_MIRROR(0x0c) AM_DEVREADWRITE(Z80DART_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
674		AM_RANGE(0x40, 0x43) AM_MIRROR(0x1c) AM_DEVREADWRITE(Z80SIO_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
675		AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
	911
	912	//-------------------------------------------------
	913	// ADDRESS_MAP( abc800m_io )
	914	//-------------------------------------------------
	915
	916	static ADDRESS_MAP_START( abc800m_io, ADDRESS_SPACE_IO, 8, abc800_state )
	917	AM_IMPORT_FROM( abc800c_io )
	918	AM_RANGE(0x31, 0x31) AM_MIRROR(0x06) AM_DEVREAD_LEGACY(MC6845_TAG, mc6845_register_r)
	919	AM_RANGE(0x38, 0x38) AM_MIRROR(0x06) AM_DEVWRITE_LEGACY(MC6845_TAG, mc6845_address_w)
	920	AM_RANGE(0x39, 0x39) AM_MIRROR(0x06) AM_DEVWRITE_LEGACY(MC6845_TAG, mc6845_register_w)
676	921	ADDRESS_MAP_END
677	922
678		// ABC 802
679	923
680		static ADDRESS_MAP_START( abc802_map, ADDRESS_SPACE_PROGRAM, 8 )
	924	//-------------------------------------------------
	925	// ADDRESS_MAP( abc802_mem )
	926	//-------------------------------------------------
	927
	928	static ADDRESS_MAP_START( abc802_mem, ADDRESS_SPACE_PROGRAM, 8, abc802_state )
681	929	ADDRESS_MAP_UNMAP_HIGH
682	930	AM_RANGE(0x0000, 0x77ff) AM_ROM
683		AM_RANGE(0x7800, 0x7fff) AM_RAM AM_BASE~~_MEMBER~~(~~abc802~~_~~state,~~ charram)
	931	AM_RANGE(0x7800, 0x7fff) AM_RAM AM_BASE(m_char_ram)
684	932	AM_RANGE(0x8000, 0xffff) AM_RAM
685	933	ADDRESS_MAP_END
686	934
687		static ADDRESS_MAP_START( abc802_io_map, ADDRESS_SPACE_IO, 8 )
	935
	936	//-------------------------------------------------
	937	// ADDRESS_MAP( abc802_io )
	938	//-------------------------------------------------
	939
	940	static ADDRESS_MAP_START( abc802_io, ADDRESS_SPACE_IO, 8, abc802_state )
688	941	ADDRESS_MAP_UNMAP_HIGH
689	942	ADDRESS_MAP_GLOBAL_MASK(0xff)
690		AM_RANGE(0x00, 0x00) AM_MIRROR(0x18) AM_DEVREADWRITE(ABCBUS_TAG, abcbus_inp_r, abcbus_utp_w)
691		AM_RANGE(0x01, 0x01) AM_MIRROR(0x18) AM_DEVREADWRITE(ABCBUS_TAG, abcbus_stat_r, abcbus_cs_w)
692		AM_RANGE(0x02, 0x02) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c1_w)
693		AM_RANGE(0x03, 0x03) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c2_w)
694		AM_RANGE(0x04, 0x04) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c3_w)
695		AM_RANGE(0x05, 0x05) AM_MIRROR(0x18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c4_w)
696		AM_RANGE(0x05, 0x05) AM_MIRROR(0x08) AM_READ(abc802_pling_r)
697		AM_RANGE(0x07, 0x07) AM_MIRROR(0x18) AM_DEVREAD(ABCBUS_TAG, abcbus_rst_r)
698		AM_RANGE(0x20, 0x23) AM_MIRROR(0x0c) AM_DEVREADWRITE(Z80DART_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
699		AM_RANGE(0x31, 0x31) AM_MIRROR(0x06) AM_DEVREAD(MC6845_TAG, mc6845_register_r)
700		AM_RANGE(0x38, 0x38) AM_MIRROR(0x06) AM_DEVWRITE(MC6845_TAG, mc6845_address_w)
701		AM_RANGE(0x39, 0x39) AM_MIRROR(0x06) AM_DEVWRITE(MC6845_TAG, mc6845_register_w)
702		AM_RANGE(0x40, 0x43) AM_MIRROR(0x1c) AM_DEVREADWRITE(Z80SIO_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
703		AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
	943	AM_RANGE(0x00, 0x00) AM_MIRROR(0x18) AM_DEVREADWRITE_LEGACY(ABCBUS_TAG, abcbus_inp_r, abcbus_utp_w)
	944	AM_RANGE(0x01, 0x01) AM_MIRROR(0x18) AM_DEVREADWRITE_LEGACY(ABCBUS_TAG, abcbus_stat_r, abcbus_cs_w)
	945	AM_RANGE(0x02, 0x02) AM_MIRROR(0x18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c1_w)
	946	AM_RANGE(0x03, 0x03) AM_MIRROR(0x18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c2_w)
	947	AM_RANGE(0x04, 0x04) AM_MIRROR(0x18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c3_w)
	948	AM_RANGE(0x05, 0x05) AM_MIRROR(0x18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c4_w)
	949	AM_RANGE(0x05, 0x05) AM_MIRROR(0x08) AM_READ(pling_r)
	950	AM_RANGE(0x07, 0x07) AM_MIRROR(0x18) AM_DEVREAD_LEGACY(ABCBUS_TAG, abcbus_rst_r)
	951	AM_RANGE(0x20, 0x23) AM_MIRROR(0x0c) AM_DEVREADWRITE_LEGACY(Z80DART_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
	952	AM_RANGE(0x31, 0x31) AM_MIRROR(0x06) AM_DEVREAD_LEGACY(MC6845_TAG, mc6845_register_r)
	953	AM_RANGE(0x38, 0x38) AM_MIRROR(0x06) AM_DEVWRITE_LEGACY(MC6845_TAG, mc6845_address_w)
	954	AM_RANGE(0x39, 0x39) AM_MIRROR(0x06) AM_DEVWRITE_LEGACY(MC6845_TAG, mc6845_register_w)
	955	AM_RANGE(0x40, 0x43) AM_MIRROR(0x1c) AM_DEVREADWRITE_LEGACY(Z80SIO_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
	956	AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_DEVREADWRITE_LEGACY(Z80CTC_TAG, z80ctc_r, z80ctc_w)
704	957	ADDRESS_MAP_END
705	958
706		// ABC 806
707	959
708		static ADDRESS_MAP_START( abc806_map, ADDRESS_SPACE_PROGRAM, 8 )
	960	//-------------------------------------------------
	961	// ADDRESS_MAP( abc806_mem )
	962	//-------------------------------------------------
	963
	964	static ADDRESS_MAP_START( abc806_mem, ADDRESS_SPACE_PROGRAM, 8, abc806_state )
709	965	ADDRESS_MAP_UNMAP_HIGH
710	966	AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("bank1")
711	967	AM_RANGE(0x1000, 0x1fff) AM_RAMBANK("bank2")
r9469	r9470
725	981	AM_RANGE(0xf000, 0xffff) AM_RAMBANK("bank16")
726	982	ADDRESS_MAP_END
727	983
728		static ADDRESS_MAP_START( abc806_io_map, ADDRESS_SPACE_IO, 8 )
	984
	985	//-------------------------------------------------
	986	// ADDRESS_MAP( abc806_io )
	987	//-------------------------------------------------
	988
	989	static ADDRESS_MAP_START( abc806_io, ADDRESS_SPACE_IO, 8, abc806_state )
729	990	ADDRESS_MAP_UNMAP_HIGH
730		AM_RANGE(0x00, 0x00) AM_MIRROR(0xff18) AM_DEVREADWRITE(ABCBUS_TAG, abcbus_inp_r, abcbus_utp_w)
731		AM_RANGE(0x01, 0x01) AM_MIRROR(0xff18) AM_DEVREADWRITE(ABCBUS_TAG, abcbus_stat_r, abcbus_cs_w)
732		AM_RANGE(0x02, 0x02) AM_MIRROR(0xff18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c1_w)
733		AM_RANGE(0x03, 0x03) AM_MIRROR(0xff18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c2_w)
734		AM_RANGE(0x04, 0x04) AM_MIRROR(0xff18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c3_w)
735		AM_RANGE(0x05, 0x05) AM_MIRROR(0xff18) AM_DEVWRITE(ABCBUS_TAG, abcbus_c4_w)
736		AM_RANGE(0x06, 0x06) AM_MIRROR(0xff18) AM_WRITE(abc806_hrs_w)
737		AM_RANGE(0x07, 0x07) AM_MIRROR(0xff18) AM_DEVREAD(ABCBUS_TAG, abcbus_rst_r) AM_WRITE(abc806_hrc_w)
738		AM_RANGE(0x20, 0x23) AM_MIRROR(0xff0c) AM_DEVREADWRITE(Z80DART_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
739		AM_RANGE(0x31, 0x31) AM_MIRROR(0xff06) AM_DEVREAD(MC6845_TAG, mc6845_register_r)
740		AM_RANGE(0x34, 0x34) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_READWRITE(abc806_mai_r, abc806_mao_w)
741		AM_RANGE(0x35, 0x35) AM_MIRROR(0xff00) AM_READWRITE(abc806_ami_r, abc806_amo_w)
742		AM_RANGE(0x36, 0x36) AM_MIRROR(0xff00) AM_READWRITE(abc806_sti_r, abc806_sto_w)
743		AM_RANGE(0x37, 0x37) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_READWRITE(abc806_cli_r, abc806_sso_w)
744		AM_RANGE(0x38, 0x38) AM_MIRROR(0xff06) AM_DEVWRITE(MC6845_TAG, mc6845_address_w)
745		AM_RANGE(0x39, 0x39) AM_MIRROR(0xff06) AM_DEVWRITE(MC6845_TAG, mc6845_register_w)
746		AM_RANGE(0x40, 0x43) AM_MIRROR(0xff1c) AM_DEVREADWRITE(Z80SIO_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
747		AM_RANGE(0x60, 0x63) AM_MIRROR(0xff1c) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
	991	AM_RANGE(0x00, 0x00) AM_MIRROR(0xff18) AM_DEVREADWRITE_LEGACY(ABCBUS_TAG, abcbus_inp_r, abcbus_utp_w)
	992	AM_RANGE(0x01, 0x01) AM_MIRROR(0xff18) AM_DEVREADWRITE_LEGACY(ABCBUS_TAG, abcbus_stat_r, abcbus_cs_w)
	993	AM_RANGE(0x02, 0x02) AM_MIRROR(0xff18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c1_w)
	994	AM_RANGE(0x03, 0x03) AM_MIRROR(0xff18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c2_w)
	995	AM_RANGE(0x04, 0x04) AM_MIRROR(0xff18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c3_w)
	996	AM_RANGE(0x05, 0x05) AM_MIRROR(0xff18) AM_DEVWRITE_LEGACY(ABCBUS_TAG, abcbus_c4_w)
	997	AM_RANGE(0x06, 0x06) AM_MIRROR(0xff18) AM_WRITE(hrs_w)
	998	AM_RANGE(0x07, 0x07) AM_MIRROR(0xff18) AM_DEVREAD_LEGACY(ABCBUS_TAG, abcbus_rst_r) AM_WRITE(hrc_w)
	999	AM_RANGE(0x20, 0x23) AM_MIRROR(0xff0c) AM_DEVREADWRITE_LEGACY(Z80DART_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
	1000	AM_RANGE(0x31, 0x31) AM_MIRROR(0xff06) AM_DEVREAD_LEGACY(MC6845_TAG, mc6845_register_r)
	1001	AM_RANGE(0x34, 0x34) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_READWRITE(mai_r, mao_w)
	1002	AM_RANGE(0x35, 0x35) AM_MIRROR(0xff00) AM_READWRITE(ami_r, amo_w)
	1003	AM_RANGE(0x36, 0x36) AM_MIRROR(0xff00) AM_READWRITE(sti_r, sto_w)
	1004	AM_RANGE(0x37, 0x37) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_READWRITE(cli_r, sso_w)
	1005	AM_RANGE(0x38, 0x38) AM_MIRROR(0xff06) AM_DEVWRITE_LEGACY(MC6845_TAG, mc6845_address_w)
	1006	AM_RANGE(0x39, 0x39) AM_MIRROR(0xff06) AM_DEVWRITE_LEGACY(MC6845_TAG, mc6845_register_w)
	1007	AM_RANGE(0x40, 0x43) AM_MIRROR(0xff1c) AM_DEVREADWRITE_LEGACY(Z80SIO_TAG, z80dart_ba_cd_r, z80dart_ba_cd_w)
	1008	AM_RANGE(0x60, 0x63) AM_MIRROR(0xff1c) AM_DEVREADWRITE_LEGACY(Z80CTC_TAG, z80ctc_r, z80ctc_w)
748	1009	ADDRESS_MAP_END
749	1010
750		/* Input Ports */
751	1011
	1012
	1013	//**************************************************************************
	1014	// INPUT PORTS
	1015	//**************************************************************************
	1016
	1017	//-------------------------------------------------
	1018	// INPUT_PORTS( abc800 )
	1019	//-------------------------------------------------
	1020
752	1021	INPUT_PORTS_START( abc800 )
753	1022	PORT_START("Y0")
754	1023	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
r9469	r9470
880	1149	//PORT_INCLUDE(luxor_55_21046)
881	1150	INPUT_PORTS_END
882	1151
883		static INPUT_PORTS_START( fake_keyboard )
884		PORT_START("ROW0")
885		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
886		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"')
887		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
888		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("4 \xC2\xA4") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR(0x00A4)
889		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
890		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&')
891		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('/')
892		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(')
893	1152
894		PORT_START("ROW1")
895		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')')
896		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=')
897		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('+') PORT_CHAR('?')
898		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(0x00E9) PORT_CHAR(0x00C9)
899		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('<') PORT_CHAR('>')
900		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
901		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
902		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
	1153	//-------------------------------------------------
	1154	// INPUT_PORTS( abc802 )
	1155	//-------------------------------------------------
903	1156
904		PORT_START("ROW2")
905		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
906		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
907		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
908		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
909		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
910		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
911		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
912		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR(0x00E5) PORT_CHAR(0x00C5)
913
914		PORT_START("ROW3")
915		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(0x00FC) PORT_CHAR(0x00DC)
916		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r')
917		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
918		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
919		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
920		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
921		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
922		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
923
924		PORT_START("ROW4")
925		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
926		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
927		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
928		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(0x00F6) PORT_CHAR(0x00D6)
929		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(0x00E4) PORT_CHAR(0x00C4)
930		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\'') PORT_CHAR('*')
931		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x90") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
932		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
933
934		PORT_START("ROW5")
935		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
936		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
937		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
938		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
939		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
940		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
941		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR(';')
942		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR(':')
943
944		PORT_START("ROW6")
945		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('_')
946		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x92") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
947		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
948		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
949		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
950		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
951		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
952		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
953
954		PORT_START("ROW7")
955		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("LEFT SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
956		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("RIGHT SHIFT") PORT_CODE(KEYCODE_RSHIFT)
957		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("UPPER CASE") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) PORT_TOGGLE
958		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
959		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
960		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
961		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
962		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
963		INPUT_PORTS_END
964
965	1157	static INPUT_PORTS_START( abc802 )
966	1158	PORT_INCLUDE(fake_keyboard)
967	1159
r9469	r9470
989	1181	//PORT_INCLUDE(luxor_55_21046)
990	1182	INPUT_PORTS_END
991	1183
	1184
	1185	//-------------------------------------------------
	1186	// INPUT_PORTS( abc806 )
	1187	//-------------------------------------------------
	1188
992	1189	static INPUT_PORTS_START( abc806 )
993	1190	PORT_INCLUDE(fake_keyboard)
994	1191
r9469	r9470
1002	1199	//PORT_INCLUDE(luxor_55_21046)
1003	1200	INPUT_PORTS_END
1004	1201
1005		/* ABC 77 */
1006	1202
	1203
	1204	//**************************************************************************
	1205	// DEVICE CONFIGURATION
	1206	//**************************************************************************
	1207
	1208
	1209	//-------------------------------------------------
	1210	// ABC77_INTERFACE( abc800_abc77_intf )
	1211	//-------------------------------------------------
	1212
1007	1213	static ABC77_INTERFACE( abc800_abc77_intf )
1008	1214	{
1009	1215	DEVCB_NULL,
r9469	r9470
1011	1217	DEVCB_DEVICE_LINE(Z80DART_TAG, z80dart_dcdb_w)
1012	1218	};
1013	1219
1014		/* Z80 CTC */
1015	1220
	1221	//-------------------------------------------------
	1222	// Z80CTC_INTERFACE( ctc_intf )
	1223	//-------------------------------------------------
	1224
1016	1225	static TIMER_DEVICE_CALLBACK( ctc_tick )
1017	1226	{
1018	1227	running_device *z80ctc = timer.machine->device(Z80CTC_TAG);
r9469	r9470
1029	1238
1030	1239	static WRITE_LINE_DEVICE_HANDLER( ctc_z0_w )
1031	1240	{
1032		running_device *~~z80~~sio = device->machine->device(Z80SIO_TAG);
	1241	running_device *sio = device->machine->device(Z80SIO_TAG);
1033	1242
1034		static int ~~z80~~sio_rxcb, ~~z80~~sio_txcb; // FIXME
	1243	static int m_sio_rxcb, m_sio_txcb; // FIXME
1035	1244
1036	1245	UINT8 sb = input_port_read(device->machine, "SB");
1037	1246
1038	1247	if (BIT(sb, 2))
1039	1248	{
1040		/* connected to SIO/2 TxCA, CTC CLK/TRG3 */
1041		z80dart_txca_w(z80sio, state);
	1249	// connected to SIO/2 TxCA, CTC CLK/TRG3
	1250	z80dart_txca_w(sio, state);
1042	1251	z80ctc_trg3_w(device, state);
1043	1252	}
1044	1253
1045		/* connected to SIO/2 RxCB through a thingy */
1046		//z80sio_rxcb = ?
1047		z80dart_rxcb_w(z80sio, z80sio_rxcb);
	1254	// connected to SIO/2 RxCB through a thingy
	1255	//m_sio_rxcb = ?
	1256	z80dart_rxcb_w(sio, m_sio_rxcb);
1048	1257
1049		/* connected to SIO/2 TxCB through a JK divide by 2 */
1050		z80sio_txcb = !z80sio_txcb;
1051		z80dart_txcb_w(z80sio, z80sio_txcb);
	1258	// connected to SIO/2 TxCB through a JK divide by 2
	1259	m_sio_txcb = !m_sio_txcb;
	1260	z80dart_txcb_w(sio, m_sio_txcb);
1052	1261	}
1053	1262
1054	1263	static WRITE_LINE_DEVICE_HANDLER( ctc_z1_w )
1055	1264	{
1056		running_device *~~z80~~sio = device->machine->device(Z80SIO_TAG);
	1265	running_device *sio = device->machine->device(Z80SIO_TAG);
1057	1266
1058	1267	UINT8 sb = input_port_read(device->machine, "SB");
1059	1268
1060	1269	if (BIT(sb, 3))
1061	1270	{
1062		/* connected to SIO/2 RxCA */
1063		z80dart_rxca_w(z80sio, state);
	1271	// connected to SIO/2 RxCA
	1272	z80dart_rxca_w(sio, state);
1064	1273	}
1065	1274
1066	1275	if (BIT(sb, 4))
1067	1276	{
1068		/* connected to SIO/2 TxCA, CTC CLK/TRG3 */
1069		z80dart_txca_w(z80sio, state);
	1277	// connected to SIO/2 TxCA, CTC CLK/TRG3
	1278	z80dart_txca_w(sio, state);
1070	1279	z80ctc_trg3_w(device, state);
1071	1280	}
1072	1281	}
1073	1282
1074	1283	static WRITE_LINE_DEVICE_HANDLER( ctc_z2_w )
1075	1284	{
1076		running_device *~~z80~~dart = device->machine->device(Z80DART_TAG);
	1285	running_device *m_dart = device->machine->device(Z80DART_TAG);
1077	1286
1078		/* connected to DART channel A clock inputs */
1079		z80dart_rxca_w(z80dart, state);
1080		z80dart_txca_w(z80dart, state);
	1287	// connected to DART channel A clock inputs
	1288	z80dart_rxca_w(m_dart, state);
	1289	z80dart_txca_w(m_dart, state);
1081	1290	}
1082	1291
1083	1292	static Z80CTC_INTERFACE( ctc_intf )
1084	1293	{
1085		0, /* timer disables */
1086		DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
1087		DEVCB_LINE(ctc_z0_w), /* ZC/TO0 callback */
1088		DEVCB_LINE(ctc_z1_w), /* ZC/TO1 callback */
1089		DEVCB_LINE(ctc_z2_w) /* ZC/TO2 callback */
	1294	0, // timer disables
	1295	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), // interrupt handler
	1296	DEVCB_LINE(ctc_z0_w), // ZC/TO0 callback
	1297	DEVCB_LINE(ctc_z1_w), // ZC/TO1 callback
	1298	DEVCB_LINE(ctc_z2_w) // ZC/TO2 callback
1090	1299	};
1091	1300
1092		/* Z80 SIO/2 */
1093	1301
	1302	//-------------------------------------------------
	1303	// Z80DART_INTERFACE( sio_intf )
	1304	//-------------------------------------------------
	1305
1094	1306	static READ_LINE_DEVICE_HANDLER( dfd_in_r )
1095	1307	{
1096	1308	return cassette_input(device) > 0.0;
r9469	r9470
1127	1339	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0)
1128	1340	};
1129	1341
1130		/* Z80 DART */
1131	1342
	1343	//-------------------------------------------------
	1344	// Z80DART_INTERFACE( abc800_dart_intf )
	1345	//-------------------------------------------------
	1346
1132	1347	static Z80DART_INTERFACE( abc800_dart_intf )
1133	1348	{
1134	1349	0, 0, 0, 0,
r9469	r9470
1140	1355	DEVCB_NULL,
1141	1356	DEVCB_NULL,
1142	1357
1143		DEVCB_LINE(keyboard_txd_r),
	1358	DEVCB_DRIVER_LINE_MEMBER(abc800_state, keyboard_txd_r),
1144	1359	DEVCB_DEVICE_LINE(I8048_TAG, keyboard_rxd_w),
1145	1360	DEVCB_NULL,
1146	1361	DEVCB_NULL,
r9469	r9470
1150	1365	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0)
1151	1366	};
1152	1367
1153		static WRITE_LINE_DEVICE_HANDLER( abc802_dart_dtrb_r )
	1368
	1369	//-------------------------------------------------
	1370	// Z80DART_INTERFACE( abc802_dart_intf )
	1371	//-------------------------------------------------
	1372
	1373	WRITE_LINE_MEMBER( abc802_state::lrs_w )
1154	1374	{
1155		~~abc802~~_~~state *d~~r~~iver_~~s~~tate~~ = ~~device->machine->driver_data<abc802_~~state~~>()~~;
	1375	m_lrs = state;
1156	1376
1157		/* low RAM select */
1158		driver_state->lrs = state;
1159
1160		abc802_bankswitch(device->machine);
	1377	bankswitch();
1161	1378	}
1162	1379
1163		~~static~~ WRITE_LINE_DE~~VIC~~E~~_HANDLE~~R( abc802_dart_~~rtsb~~_r )
	1380	WRITE_LINE_MEMBER( abc802_state::mux80_40_w )
1164	1381	{
1165		abc802_state *driver_state = device->machine->driver_data<abc802_state>();
1166
1167		/* _MUX 80/40 */
1168		driver_state->mux80_40 = state;
	1382	m_80_40_mux = state;
1169	1383	}
1170	1384
1171	1385	static Z80DART_INTERFACE( abc802_dart_intf )
r9469	r9470
1179	1393	DEVCB_NULL,
1180	1394	DEVCB_NULL,
1181	1395
1182		DEVCB_NULL, /* DEVCB_DEVICE_LINE(ABC77_TAG, abc77_txd_r), */
1183		DEVCB_NULL, /* DEVCB_DEVICE_LINE(ABC77_TAG, abc77_rxd_w), */
1184		DEVCB_LINE(abc802_dart_dtrb_r),
1185		DEVCB_LINE(abc802_dart_rtsb_r),
	1396	DEVCB_NULL, // DEVCB_DEVICE_LINE(ABC77_TAG, abc77_txd_r),
	1397	DEVCB_NULL, // DEVCB_DEVICE_LINE(ABC77_TAG, abc77_rxd_w),
	1398	DEVCB_DRIVER_LINE_MEMBER(abc802_state, lrs_w),
	1399	DEVCB_DRIVER_LINE_MEMBER(abc802_state, mux80_40_w),
1186	1400	DEVCB_NULL,
1187	1401	DEVCB_NULL,
1188	1402
1189	1403	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0)
1190	1404	};
1191	1405
1192		static WRITE_LINE_DEVICE_HANDLER( abc806_dart_dtrb_w )
	1406
	1407	//-------------------------------------------------
	1408	// Z80DART_INTERFACE( abc806_dart_intf )
	1409	//-------------------------------------------------
	1410
	1411	WRITE_LINE_MEMBER( abc806_state::keydtr_w )
1193	1412	{
1194		~~abc806~~_~~stat~~e *d~~river_s~~t~~ate~~ = ~~device->machine->driver_data<abc806_~~state~~>()~~;
	1413	m_keydtr = state;
1195	1414
1196		driver_state->keydtr = state;
1197
1198		abc806_bankswitch(device->machine);
	1415	bankswitch();
1199	1416	}
1200	1417
1201	1418	static Z80DART_INTERFACE( abc806_dart_intf )
r9469	r9470
1209	1426	DEVCB_NULL,
1210	1427	DEVCB_NULL,
1211	1428
1212		DEVCB_NULL, /* DEVCB_DEVICE_LINE(ABC77_TAG, abc77_txd_r), */
1213		DEVCB_NULL, /* DEVCB_DEVICE_LINE(ABC77_TAG, abc77_rxd_w), */
1214		DEVCB_LINE(abc806_dart_dtrb_w),
	1429	DEVCB_NULL, // DEVCB_DEVICE_LINE(ABC77_TAG, abc77_txd_r),
	1430	DEVCB_NULL, // DEVCB_DEVICE_LINE(ABC77_TAG, abc77_rxd_w),
	1431	DEVCB_DRIVER_LINE_MEMBER(abc806_state, keydtr_w),
1215	1432	DEVCB_NULL,
1216	1433	DEVCB_NULL,
1217	1434	DEVCB_NULL,
r9469	r9470
1219	1436	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0)
1220	1437	};
1221	1438
1222		/* Z80 Daisy Chain */
1223	1439
	1440	//-------------------------------------------------
	1441	// z80_daisy_config abc800_daisy_chain
	1442	//-------------------------------------------------
	1443
1224	1444	static const z80_daisy_config abc800_daisy_chain[] =
1225	1445	{
1226	1446	{ Z80CTC_TAG },
r9469	r9470
1229	1449	{ NULL }
1230	1450	};
1231	1451
1232		/* Cassette */
1233	1452
	1453	//-------------------------------------------------
	1454	// cassette_config abc800_cassette_config
	1455	//-------------------------------------------------
	1456
1234	1457	static const cassette_config abc800_cassette_config =
1235	1458	{
1236	1459	cassette_default_formats,
r9469	r9470
1239	1462	NULL
1240	1463	};
1241	1464
1242		/* ABC BUS */
1243	1465
	1466	//-------------------------------------------------
	1467	// ABCBUS_DAISY( abcbus_daisy )
	1468	//-------------------------------------------------
	1469
1244	1470	static ABCBUS_DAISY( abcbus_daisy )
1245	1471	{
1246	1472	{ LUXOR_55_21046_ABCBUS("luxor_55_21046") },
1247	1473	{ NULL }
1248	1474	};
1249	1475
1250		/* Machine Initialization */
1251	1476
1252		static MACHINE_START( abc800 )
1253		{
1254		abc800_state *state = machine->driver_data<abc800_state>();
1255	1477
1256		/* find devices */
1257		state->z80ctc = machine->device(Z80CTC_TAG);
1258		state->z80dart = machine->device(Z80DART_TAG);
1259		state->z80sio = machine->device(Z80SIO_TAG);
1260		state->abc77 = machine->device(ABC77_TAG);
1261		state->cassette = machine->device(CASSETTE_TAG);
	1478	//**************************************************************************
	1479	// MACHINE INITIALIZATION
	1480	//**************************************************************************
1262	1481
1263		/* initialize values */
1264		state->kb_txd = 1;
	1482	//-------------------------------------------------
	1483	// machine_start
	1484	//-------------------------------------------------
1265	1485
1266		/* register for state saving */
1267		state_save_register_global(machine, state->fetch_charram);
1268		state_save_register_global(machine, state->kb_row);
1269		state_save_register_global(machine, state->kb_txd);
1270		state_save_register_global(machine, state->kb_clk);
1271		state_save_register_global(machine, state->kb_stb);
1272		state_save_register_global(machine, state->pling);
1273		state_save_register_global(machine, state->z80sio_rxcb);
1274		state_save_register_global(machine, state->z80sio_txcb);
	1486	void abc800_state::machine_start()
	1487	{
	1488	// initialize values
	1489	m_kb_txd = 1;
	1490
	1491	// register for state saving
	1492	state_save_register_global(machine, m_fetch_charram);
	1493	state_save_register_global(machine, m_kb_row);
	1494	state_save_register_global(machine, m_kb_txd);
	1495	state_save_register_global(machine, m_kb_clk);
	1496	state_save_register_global(machine, m_kb_stb);
	1497	state_save_register_global(machine, m_pling);
	1498	state_save_register_global(machine, m_sio_rxcb);
	1499	state_save_register_global(machine, m_sio_txcb);
1275	1500	}
1276	1501
1277		static MACHINE_RESET( abc800 )
	1502
	1503	//-------------------------------------------------
	1504	// machine_reset
	1505	//-------------------------------------------------
	1506
	1507	void abc800_state::machine_reset()
1278	1508	{
1279		abc800_state *state = machine->driver_data<abc800_state>();
	1509	m_fetch_charram = 0;
	1510	bankswitch();
1280	1511
1281		state->fetch_charram = 0;
1282		abc800_bankswitch(machine);
	1512	z80dart_ria_w(m_dart, 1);
1283	1513
1284		z80dart_ria_w(state->z80dart, 1);
1285
1286		/* 50/60 Hz */
1287		z80dart_ctsb_w(state->z80dart, 0); // 0 = 50Hz, 1 = 60Hz
	1514	// 50/60 Hz
	1515	z80dart_ctsb_w(m_dart, 0); // 0 = 50Hz, 1 = 60Hz
1288	1516	}
1289	1517
1290		static MACHINE_START( abc802 )
1291		{
1292		abc802_state *state = machine->driver_data<abc802_state>();
1293	1518
1294		/* find devices */
1295		state->z80ctc = machine->device(Z80CTC_TAG);
1296		state->z80dart = machine->device(Z80DART_TAG);
1297		state->z80sio = machine->device(Z80SIO_TAG);
1298		state->abc77 = machine->device(ABC77_TAG);
1299		state->cassette = machine->device(CASSETTE_TAG);
	1519	//-------------------------------------------------
	1520	// machine_start
	1521	//-------------------------------------------------
1300	1522
1301		/* register for state saving */
1302		state_save_register_global(machine, state->lrs);
1303		state_save_register_global(machine, state->pling);
	1523	void abc802_state::machine_start()
	1524	{
	1525	// register for state saving
	1526	state_save_register_global(machine, m_lrs);
	1527	state_save_register_global(machine, m_pling);
1304	1528	}
1305	1529
1306		static MACHINE_RESET( abc802 )
	1530
	1531	//-------------------------------------------------
	1532	// machine_reset
	1533	//-------------------------------------------------
	1534
	1535	void abc802_state::machine_reset()
1307	1536	{
1308		abc802_state *state = machine->driver_data<abc802_state>();
1309
1310	1537	UINT8 config = input_port_read(machine, "CONFIG");
1311	1538
1312		/* memory banking */
1313		state->lrs = 1;
1314		abc802_bankswitch(machine);
	1539	// memory banking
	1540	m_lrs = 1;
	1541	bankswitch();
1315	1542
1316		/* clear screen time out (S1) */
1317		z80dart_dcdb_w(state->z80sio, BIT(config, 0));
	1543	// clear screen time out (S1)
	1544	z80dart_dcdb_w(m_sio, BIT(config, 0));
1318	1545
1319		/* unknown (S2) */
1320		z80dart_ctsb_w(state->z80sio, BIT(config, 1));
	1546	// unknown (S2)
	1547	z80dart_ctsb_w(m_sio, BIT(config, 1));
1321	1548
1322		/* 40/80 char (S3) */
1323		z80dart_ria_w(state->z80dart, BIT(config, 2)); // 0 = 40, 1 = 80
	1549	// 40/80 char (S3)
	1550	z80dart_ria_w(m_dart, BIT(config, 2)); // 0 = 40, 1 = 80
1324	1551
1325		/* 50/60 Hz */
1326		z80dart_ctsb_w(state->z80dart, BIT(config, 3)); // 0 = 50Hz, 1 = 60Hz
	1552	// 50/60 Hz
	1553	z80dart_ctsb_w(m_dart, BIT(config, 3)); // 0 = 50Hz, 1 = 60Hz
1327	1554	}
1328	1555
1329		static MACHINE_START( abc806 )
	1556
	1557	//-------------------------------------------------
	1558	// machine_start
	1559	//-------------------------------------------------
	1560
	1561	void abc806_state::machine_start()
1330	1562	{
1331		abc806_state *state = machine->driver_data<abc806_state>();
1332
1333	1563	UINT8 *mem = memory_region(machine, Z80_TAG);
1334		UINT32 videoram_size = messram_get_size(m~~achine->device("mess~~ram")) - (32 * 1024);
	1564	UINT32 videoram_size = messram_get_size(m_ram) - (32 * 1024);
1335	1565	int bank;
1336	1566	char bank_name[10];
1337	1567
1338		/* find devices */
1339		state->z80ctc = machine->device(Z80CTC_TAG);
1340		state->z80dart = machine->device(Z80DART_TAG);
1341		state->z80sio = machine->device(Z80SIO_TAG);
1342		state->e0516 = machine->device(E0516_TAG);
1343		state->abc77 = machine->device(ABC77_TAG);
1344		state->cassette = machine->device(CASSETTE_TAG);
	1568	// setup memory banking
	1569	m_video_ram = auto_alloc_array(machine, UINT8, videoram_size);
1345	1570
1346		/* setup memory banking */
1347		state->videoram = auto_alloc_array(machine, UINT8, videoram_size);
1348
1349	1571	for (bank = 1; bank <= 16; bank++)
1350	1572	{
1351	1573	sprintf(bank_name,"bank%d",bank);
1352	1574	memory_configure_bank(machine, bank_name, 0, 1, mem + (0x1000 * (bank - 1)), 0);
1353		memory_configure_bank(machine, bank_name, 1, 1, ~~state->~~videoram, 0);
	1575	memory_configure_bank(machine, bank_name, 1, 1, m_video_ram, 0);
1354	1576	memory_set_bank(machine, bank_name, 0);
1355	1577	}
1356	1578
1357		/* register for state saving */
1358		state_save_register_global(machine, state->keydtr);
1359		state_save_register_global(machine, state->eme);
1360		state_save_register_global(machine, state->fetch_charram);
1361		state_save_register_global_array(machine, state->map);
	1579	// register for state saving
	1580	state_save_register_global(machine, m_keydtr);
	1581	state_save_register_global(machine, m_eme);
	1582	state_save_register_global(machine, m_fetch_charram);
	1583	state_save_register_global_array(machine, m_map);
1362	1584	}
1363	1585
1364		static MACHINE_RESET( abc806 )
	1586
	1587	//-------------------------------------------------
	1588	// machine_reset
	1589	//-------------------------------------------------
	1590
	1591	void abc806_state::machine_reset()
1365	1592	{
1366		abc806_state *state = machine->driver_data<abc806_state>();
1367
1368		/* setup memory banking */
	1593	// setup memory banking
1369	1594	int bank;
1370	1595	char bank_name[10];
1371	1596
r9469	r9470
1375	1600	memory_set_bank(machine, bank_name, 0);
1376	1601	}
1377	1602
1378		ab~~c806_b~~ankswitch(~~machine~~);
	1603	bankswitch();
1379	1604
1380		/* clear STO lines */
1381		state->eme = 0;
1382		state->_40 = 0;
1383		state->hru2_a8 = 0;
1384		state->txoff = 0;
1385		e0516_cs_w(state->e0516, 1);
1386		e0516_clk_w(state->e0516, 1);
1387		e0516_dio_w(state->e0516, 1);
	1605	// clear STO lines
	1606	m_eme = 0;
	1607	m_40 = 0;
	1608	m_hru2_a8 = 0;
	1609	m_txoff = 0;
	1610	e0516_cs_w(m_rtc, 1);
	1611	e0516_clk_w(m_rtc, 1);
	1612	e0516_dio_w(m_rtc, 1);
1388	1613
1389		z80dart_ria_w(~~state->z80~~dart, 1);
	1614	z80dart_ria_w(m_dart, 1);
1390	1615
1391		/* 50/60 Hz */
1392		z80dart_ctsb_w(state->z80dart, 0); // 0 = 50Hz, 1 = 60Hz
	1616	// 50/60 Hz
	1617	z80dart_ctsb_w(m_dart, 0); // 0 = 50Hz, 1 = 60Hz
1393	1618	}
1394	1619
1395		/* Machine Drivers */
1396	1620
	1621
	1622	//**************************************************************************
	1623	// MACHINE DRIVERS
	1624	//**************************************************************************
	1625
	1626	//-------------------------------------------------
	1627	// MACHINE_CONFIG( abc800 )
	1628	//-------------------------------------------------
	1629
1397	1630	static MACHINE_CONFIG_START( abc800, abc800_state )
1398		/* basic machine hardware */
	1631	// basic machine hardware
1399	1632	MDRV_CPU_ADD(Z80_TAG, Z80, ABC800_X01/2/2)
1400	1633	MDRV_CPU_CONFIG(abc800_daisy_chain)
1401		MDRV_CPU_PROGRAM_MAP(abc800m_map)
1402		MDRV_CPU_IO_MAP(abc800m_io_map)
	1634	MDRV_CPU_PROGRAM_MAP(abc800m_mem)
	1635	MDRV_CPU_IO_MAP(abc800m_io)
1403	1636
1404	1637	MDRV_CPU_ADD(I8048_TAG, I8048, XTAL_5_9904MHz)
1405		MDRV_CPU_IO_MAP(keyboard_io~~_map~~)
	1638	MDRV_CPU_IO_MAP(abc800_keyboard_io)
1406	1639
1407		MDRV_MACHINE_START(abc800)
1408		MDRV_MACHINE_RESET(abc800)
1409
1410		/* sound hardware */
	1640	// sound hardware
1411	1641	MDRV_SPEAKER_STANDARD_MONO("mono")
1412	1642	MDRV_SOUND_ADD("discrete", DISCRETE, 0)
1413	1643	MDRV_SOUND_CONFIG_DISCRETE(abc800)
1414	1644	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
1415	1645
1416		/* peripheral hardware */
	1646	// peripheral hardware
1417	1647	MDRV_Z80CTC_ADD(Z80CTC_TAG, ABC800_X01/2/2, ctc_intf)
1418	1648	MDRV_TIMER_ADD_PERIODIC("ctc", ctc_tick, HZ(ABC800_X01/2/2/2))
1419	1649	MDRV_Z80SIO2_ADD(Z80SIO_TAG, ABC800_X01/2/2, sio_intf)
r9469	r9470
1422	1652	MDRV_CASSETTE_ADD(CASSETTE_TAG, abc800_cassette_config)
1423	1653	MDRV_TIMER_ADD_PERIODIC("keyboard_t1", keyboard_t1_tick, HZ(XTAL_5_9904MHz/(3*5)/20)) // TODO correct frequency?
1424	1654
1425		/* ABC bus */
	1655	// ABC bus
1426	1656	MDRV_ABCBUS_ADD(ABCBUS_TAG, abcbus_daisy, Z80_TAG)
1427	1657	MDRV_ABC830_ADD("luxor_55_21046", ABCBUS_TAG, DRIVE_BASF_6106_08)
1428	1658
1429		/* internal ram */
	1659	// internal ram
1430	1660	MDRV_RAM_ADD("messram")
1431	1661	MDRV_RAM_DEFAULT_SIZE("16K")
1432	1662	MDRV_RAM_EXTRA_OPTIONS("32K")
1433	1663	MACHINE_CONFIG_END
1434	1664
	1665
	1666	//-------------------------------------------------
	1667	// MACHINE_CONFIG( abc800m )
	1668	//-------------------------------------------------
	1669
1435	1670	static MACHINE_CONFIG_DERIVED( abc800m, abc800 )
1436		/* video hardware */
	1671	// video hardware
1437	1672	MDRV_FRAGMENT_ADD(abc800m_video)
1438	1673	MACHINE_CONFIG_END
1439	1674
	1675
	1676	//-------------------------------------------------
	1677	// MACHINE_CONFIG( abc800c )
	1678	//-------------------------------------------------
	1679
1440	1680	static MACHINE_CONFIG_DERIVED( abc800c, abc800 )
1441		/* basic machine hardware */
	1681	// basic machine hardware
1442	1682	MDRV_CPU_MODIFY(Z80_TAG)
1443		MDRV_CPU_PROGRAM_MAP(abc800c_map)
1444		MDRV_CPU_IO_MAP(abc800c_io_map)
	1683	MDRV_CPU_PROGRAM_MAP(abc800c_mem)
	1684	MDRV_CPU_IO_MAP(abc800c_io)
1445	1685
1446		/* video hardware */
	1686	// video hardware
1447	1687	MDRV_FRAGMENT_ADD(abc800c_video)
1448	1688	MACHINE_CONFIG_END
1449	1689
	1690
	1691	//-------------------------------------------------
	1692	// MACHINE_CONFIG( abc802 )
	1693	//-------------------------------------------------
	1694
1450	1695	static MACHINE_CONFIG_START( abc802, abc802_state )
1451		/* basic machine hardware */
	1696	// basic machine hardware
1452	1697	MDRV_CPU_ADD(Z80_TAG, Z80, ABC800_X01/2/2)
1453	1698	MDRV_CPU_CONFIG(abc800_daisy_chain)
1454		MDRV_CPU_PROGRAM_MAP(abc802_map)
1455		MDRV_CPU_IO_MAP(abc802_io_map)
	1699	MDRV_CPU_PROGRAM_MAP(abc802_mem)
	1700	MDRV_CPU_IO_MAP(abc802_io)
1456	1701
1457		MDRV_MACHINE_START(abc802)
1458		MDRV_MACHINE_RESET(abc802)
1459
1460		/* video hardware */
	1702	// video hardware
1461	1703	MDRV_FRAGMENT_ADD(abc802_video)
1462	1704
1463		/* sound hardware */
	1705	// sound hardware
1464	1706	MDRV_SPEAKER_STANDARD_MONO("mono")
1465	1707	MDRV_SOUND_ADD("discrete", DISCRETE, 0)
1466	1708	MDRV_SOUND_CONFIG_DISCRETE(abc800)
1467	1709	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
1468	1710
1469		/* peripheral hardware */
	1711	// peripheral hardware
1470	1712	MDRV_Z80CTC_ADD(Z80CTC_TAG, ABC800_X01/2/2, ctc_intf)
1471	1713	MDRV_TIMER_ADD_PERIODIC("ctc", ctc_tick, HZ(ABC800_X01/2/2/2))
1472	1714	MDRV_Z80SIO2_ADD(Z80SIO_TAG, ABC800_X01/2/2, sio_intf)
1473	1715	MDRV_Z80DART_ADD(Z80DART_TAG, ABC800_X01/2/2, abc802_dart_intf)
1474		// MDRV_ABC77_ADD(abc800_abc77_intf)
	1716	//MDRV_ABC77_ADD(abc800_abc77_intf)
1475	1717	MDRV_PRINTER_ADD("printer")
1476	1718	MDRV_CASSETTE_ADD(CASSETTE_TAG, abc800_cassette_config)
1477	1719
1478		/* ABC bus */
	1720	// ABC bus
1479	1721	MDRV_ABCBUS_ADD(ABCBUS_TAG, abcbus_daisy, Z80_TAG)
1480	1722	MDRV_ABC834_ADD("luxor_55_21046", ABCBUS_TAG)
1481	1723
1482		/* fake keyboard */
	1724	// fake keyboard
1483	1725	MDRV_TIMER_ADD_PERIODIC("keyboard", keyboard_tick, USEC(2500))
1484	1726
1485		/* internal ram */
	1727	// internal ram
1486	1728	MDRV_RAM_ADD("messram")
1487	1729	MDRV_RAM_DEFAULT_SIZE("64K")
1488	1730	MACHINE_CONFIG_END
1489	1731
	1732
	1733	//-------------------------------------------------
	1734	// MACHINE_CONFIG( abc806 )
	1735	//-------------------------------------------------
	1736
1490	1737	static MACHINE_CONFIG_START( abc806, abc806_state )
1491		/* basic machine hardware */
	1738	// basic machine hardware
1492	1739	MDRV_CPU_ADD(Z80_TAG, Z80, ABC800_X01/2/2)
1493	1740	MDRV_CPU_CONFIG(abc800_daisy_chain)
1494		MDRV_CPU_PROGRAM_MAP(abc806_map)
1495		MDRV_CPU_IO_MAP(abc806_io_map)
	1741	MDRV_CPU_PROGRAM_MAP(abc806_mem)
	1742	MDRV_CPU_IO_MAP(abc806_io)
1496	1743
1497		MDRV_MACHINE_START(abc806)
1498		MDRV_MACHINE_RESET(abc806)
1499
1500		/* video hardware */
	1744	// video hardware
1501	1745	MDRV_FRAGMENT_ADD(abc806_video)
1502	1746
1503		/* sound hardware */
	1747	// sound hardware
1504	1748	MDRV_SPEAKER_STANDARD_MONO("mono")
1505	1749
1506		/* peripheral hardware */
	1750	// peripheral hardware
1507	1751	MDRV_E0516_ADD(E0516_TAG, ABC806_X02)
1508	1752	MDRV_Z80CTC_ADD(Z80CTC_TAG, ABC800_X01/2/2, ctc_intf)
1509	1753	MDRV_TIMER_ADD_PERIODIC("ctc", ctc_tick, HZ(ABC800_X01/2/2/2))
1510	1754	MDRV_Z80SIO2_ADD(Z80SIO_TAG, ABC800_X01/2/2, sio_intf)
1511	1755	MDRV_Z80DART_ADD(Z80DART_TAG, ABC800_X01/2/2, abc806_dart_intf)
1512		// MDRV_ABC77_ADD(abc800_abc77_intf)
	1756	//MDRV_ABC77_ADD(abc800_abc77_intf)
1513	1757	MDRV_PRINTER_ADD("printer")
1514	1758	MDRV_CASSETTE_ADD(CASSETTE_TAG, abc800_cassette_config)
1515	1759
1516		/* ABC bus */
	1760	// ABC bus
1517	1761	MDRV_ABCBUS_ADD(ABCBUS_TAG, abcbus_daisy, Z80_TAG)
1518	1762	MDRV_ABC832_ADD("luxor_55_21046", ABCBUS_TAG, DRIVE_TEAC_FD55F)
1519	1763
1520		/* fake keyboard */
	1764	// fake keyboard
1521	1765	MDRV_TIMER_ADD_PERIODIC("keyboard", keyboard_tick, USEC(2500))
1522	1766
1523		/* internal ram */
	1767	// internal ram
1524	1768	MDRV_RAM_ADD("messram")
1525	1769	MDRV_RAM_DEFAULT_SIZE("160K") // 32KB + 128KB
1526	1770	MDRV_RAM_EXTRA_OPTIONS("544K") // 32KB + 512KB
1527	1771	MACHINE_CONFIG_END
1528	1772
1529		/* ROMs */
1530	1773
	1774
	1775	//**************************************************************************
	1776	// ROMS
	1777	//**************************************************************************
	1778
1531	1779	/*
1532	1780
1533	1781	ABC800 DOS ROMs
r9469	r9470
1555	1803
1556	1804	*/
1557	1805
	1806
	1807	//-------------------------------------------------
	1808	// ROM( abc800c )
	1809	//-------------------------------------------------
	1810
	1811	ROM_START( abc800c )
	1812	ROM_REGION( 0x8000, Z80_TAG, 0 )
	1813	ROM_LOAD( "abc c-1.1m", 0x0000, 0x1000, NO_DUMP )
	1814	ROM_LOAD( "abc 1-1.1l", 0x1000, 0x1000, NO_DUMP )
	1815	ROM_LOAD( "abc 2-1.1k", 0x2000, 0x1000, NO_DUMP )
	1816	ROM_LOAD( "abc 3-1.1j", 0x3000, 0x1000, NO_DUMP )
	1817	ROM_LOAD( "abc 4-1.2m", 0x4000, 0x1000, NO_DUMP )
	1818	ROM_LOAD( "abc 5-1.2l", 0x5000, 0x1000, NO_DUMP )
	1819	ROM_LOAD( "abc 6-1.2k", 0x6000, 0x1000, NO_DUMP )
	1820	ROM_LOAD( "abc 7-22.2j", 0x7000, 0x1000, CRC(774511ab) SHA1(5171e43213a402c2d96dee33453c8306ac1aafc8) )
	1821
	1822	ROM_REGION( 0x400, I8048_TAG, 0 )
	1823	ROM_LOAD( "8048-132.z9", 0x0000, 0x0400, CRC(05c4dce5) SHA1(1824c5d304bbd09f97056cfa408e1b18b5219ba2) )
	1824
	1825	ROM_REGION( 0x1000, "gfx1", 0 )
	1826	ROM_LOAD( "saa5052.5c", 0x0140, 0x08c0, BAD_DUMP CRC(78c17e3e) SHA1(4e1c59dc484505de1dc0b1ba7e5f70a54b0d4ccc) ) // copied from p2000t driver
	1827
	1828	ROM_REGION( 0x20, "hru", 0 )
	1829	ROM_LOAD( "hru i.4g", 0x0000, 0x0020, NO_DUMP )
	1830
	1831	ROM_REGION( 0x200, "hru2", 0 )
	1832	ROM_LOAD( "hru ii.3a", 0x0000, 0x0200, BAD_DUMP CRC(7a19de8d) SHA1(e7cc49e749b37f7d7dd14f3feda53eae843a8fe0) )
	1833	ROM_END
	1834
	1835
	1836	//-------------------------------------------------
	1837	// ROM( abc800m )
	1838	//-------------------------------------------------
	1839
1558	1840	ROM_START( abc800m )
1559	1841	ROM_REGION( 0x8000, Z80_TAG, 0 )
1560	1842	ROM_LOAD( "abc m-12.1m", 0x0000, 0x1000, CRC(f85b274c) SHA1(7d0f5639a528d8d8130a22fe688d3218c77839dc) )
r9469	r9470
1563	1845	ROM_LOAD( "abc 3-12.1j", 0x3000, 0x1000, CRC(3ea2b5ee) SHA1(5a51ac4a34443e14112a6bae16c92b5eb636603f) )
1564	1846	ROM_LOAD( "abc 4-12.2m", 0x4000, 0x1000, CRC(695cb626) SHA1(9603ce2a7b2d7b1cbeb525f5493de7e5c1e5a803) )
1565	1847	ROM_LOAD( "abc 5-12.2l", 0x5000, 0x1000, CRC(b4b02358) SHA1(95338efa3b64b2a602a03bffc79f9df297e9534a) )
1566		ROM_LOAD( "abc 6-13.2k", 0x6000, 0x1000, CRC(6fa71fb6) SHA1(b037dfb3de7b65d244c6357cd146376d4237dab6) )
	1848	ROM_LOAD_OPTIONAL( "abc 6-11.2k", 0x6000, 0x1000, NO_DUMP )
	1849	ROM_LOAD_OPTIONAL( "abc 6-12.2k", 0x6000, 0x1000, NO_DUMP )
	1850	ROM_LOAD_OPTIONAL( "abc 6-13.2k", 0x6000, 0x1000, CRC(6fa71fb6) SHA1(b037dfb3de7b65d244c6357cd146376d4237dab6) )
	1851	ROM_LOAD_OPTIONAL( "abc 6-14.2k", 0x6000, 0x1000, NO_DUMP )
	1852	ROM_LOAD_OPTIONAL( "abc 6-15.2k", 0x6000, 0x1000, NO_DUMP )
1567	1853	ROM_LOAD( "abc 6-52.2k", 0x6000, 0x1000, CRC(c311b57a) SHA1(4bd2a541314e53955a0d53ef2f9822a202daa485) )
1568		ROM_LOAD( "abc 7-21.2j", 0x7000, 0x1000, CRC(fd137866) SHA1(3ac914d90db1503f61397c0ea26914eb38725044) )
	1854	ROM_LOAD_OPTIONAL( "abc 7-21.2j", 0x7000, 0x1000, CRC(fd137866) SHA1(3ac914d90db1503f61397c0ea26914eb38725044) )
1569	1855	ROM_LOAD( "abc 7-22.2j", 0x7000, 0x1000, CRC(774511ab) SHA1(5171e43213a402c2d96dee33453c8306ac1aafc8) )
1570	1856
1571	1857	ROM_REGION( 0x400, I8048_TAG, 0 )
1572	1858	ROM_LOAD( "8048-132.z9", 0x0000, 0x0400, CRC(05c4dce5) SHA1(1824c5d304bbd09f97056cfa408e1b18b5219ba2) )
1573	1859
1574		ROM_REGION( 0x800, ~~"chargen"~~, 0 )
	1860	ROM_REGION( 0x800, MC6845_TAG, 0 )
1575	1861	ROM_LOAD( "vum se.7c", 0x0000, 0x0800, CRC(f9152163) SHA1(997313781ddcbbb7121dbf9eb5f2c6b4551fc799) )
1576	1862
1577		ROM_REGION( 0x200, "fgctl", 0 )
1578		ROM_LOAD( "fgctl.bin", 0x0000, 0x0200, BAD_DUMP CRC(7a19de8d) SHA1(e7cc49e749b37f7d7dd14f3feda53eae843a8fe0) )
	1863	ROM_REGION( 0x20, "hru", 0 )
	1864	ROM_LOAD( "hru i.4g", 0x0000, 0x0020, NO_DUMP )
	1865
	1866	ROM_REGION( 0x200, "hru2", 0 )
	1867	ROM_LOAD( "hru ii.3a", 0x0000, 0x0200, BAD_DUMP CRC(7a19de8d) SHA1(e7cc49e749b37f7d7dd14f3feda53eae843a8fe0) )
1579	1868	ROM_END
1580	1869
1581		#define rom_abc800c rom_abc800m
1582	1870
	1871	//-------------------------------------------------
	1872	// ROM( abc802 )
	1873	//-------------------------------------------------
	1874
1583	1875	ROM_START( abc802 )
1584	1876	ROM_REGION( 0x8000, Z80_TAG, 0 )
1585	1877	ROM_LOAD( "abc 02-11.9f", 0x0000, 0x2000, CRC(b86537b2) SHA1(4b7731ef801f9a03de0b5acd955f1e4a1828355d) )
r9469	r9470
1590	1882	ROM_SYSTEM_BIOS( 1, "v20", "UDF-DOS v6.20" )
1591	1883	ROMX_LOAD( "abc 32-31.14f", 0x6000, 0x2000, CRC(fc8be7a8) SHA1(a1d4cb45cf5ae21e636dddfa70c99bfd2050ad60), ROM_BIOS(2) )
1592	1884	ROM_SYSTEM_BIOS( 2, "mica", "MICA DOS v6.20" )
1593		ROMX_LOAD( "mica820.14f", 0x6000, 0x2000, CRC(edf998af) SHA1(daae7e1ff6ef3e0ddb83e932f324c56f4a98f79b), ROM_BIOS(3) )
	1885	ROMX_LOAD( "mica820.14f", 0x6000, 0x2000, CRC(edf998af) SHA1(daae7e1ff6ef3e0ddb83e932f324c56f4a98f79b), ROM_BIOS(3) )
1594	1886
1595		ROM_REGION( 0x2000, "chargen", 0 )
1596		ROM_LOAD( "abc t2-11.3g", 0x0000, 0x2000, CRC(e21601ee) SHA1(2e838ebd7692e5cb9ba4e80fe2aa47ea2584133a) ) // 64 90191-01
	1887	ROM_REGION( 0x2000, MC6845_TAG, 0 )
	1888	ROM_LOAD( "abc t2-11.3g", 0x0000, 0x2000, CRC(e21601ee) SHA1(2e838ebd7692e5cb9ba4e80fe2aa47ea2584133a) ) // 64 90191-01
1597	1889
1598	1890	ROM_REGION( 0x400, "plds", 0 )
1599	1891	ROM_LOAD( "abc p2-11.2g", 0x0000, 0x0400, NO_DUMP ) // PAL16R4
1600	1892	ROM_END
1601	1893
	1894
	1895	//-------------------------------------------------
	1896	// ROM( abc806 )
	1897	//-------------------------------------------------
	1898
1602	1899	ROM_START( abc806 )
1603	1900	ROM_REGION( 0x10000, Z80_TAG, 0 )
1604	1901	ROM_LOAD( "abc 06-11.1m", 0x0000, 0x1000, CRC(27083191) SHA1(9b45592273a5673e4952c6fe7965fc9398c49827) ) // BASIC PROM ABC 06-11 "64 90231-02"
r9469	r9470
1612	1909	ROM_SYSTEM_BIOS( 1, "v20", "UDF-DOS v.20" )
1613	1910	ROMX_LOAD( "abc 66-31.2k", 0x6000, 0x1000, CRC(a2e38260) SHA1(0dad83088222cb076648e23f50fec2fddc968883), ROM_BIOS(2) )
1614	1911	ROM_SYSTEM_BIOS( 2, "mica", "MICA DOS v.20" )
1615		ROMX_LOAD( "mica2006.2k", 0x6000, 0x1000, CRC(58bc2aa8) SHA1(0604bd2396f7d15fcf3d65888b4b673f554037c0), ROM_BIOS(3) )
	1912	ROMX_LOAD( "mica2006.2k", 0x6000, 0x1000, CRC(58bc2aa8) SHA1(0604bd2396f7d15fcf3d65888b4b673f554037c0), ROM_BIOS(3) )
1616	1913	ROM_SYSTEM_BIOS( 3, "catnet", "CAT-NET" )
1617		ROMX_LOAD( "cmd8_5.2k", 0x6000, 0x1000, CRC(25430ef7) SHA1(03a36874c23c215a19b0be14ad2f6b3b5fb2c839), ROM_BIOS(4) )
1618		ROM_LOAD( "abc 76-11.2j", 0x7000, 0x1000, CRC(3eb5f6a1) SHA1(02d4e38009c71b84952eb3b8432ad32a98a7fe16) ) // Options-PROM ABC 76-11 "64 90238-02"
	1914	ROMX_LOAD( "cmd8_5.2k", 0x6000, 0x1000, CRC(25430ef7) SHA1(03a36874c23c215a19b0be14ad2f6b3b5fb2c839), ROM_BIOS(4) )
	1915	ROM_LOAD_OPTIONAL( "abc 76-11.2j", 0x7000, 0x1000, CRC(3eb5f6a1) SHA1(02d4e38009c71b84952eb3b8432ad32a98a7fe16) ) // Options-PROM ABC 76-11 "64 90238-02"
1619	1916	ROM_LOAD( "abc 76-xx.2j", 0x7000, 0x1000, CRC(b364cc49) SHA1(9a2c373778856a31902cdbd2ae3362c200a38e24) ) // Enhanced Options-PROM
1620	1917
1621		ROM_REGION( 0x1000, "chargen", 0 )
1622		ROM_LOAD( "abc t6-11.7c", 0x0000, 0x1000, CRC(b17c51c5) SHA1(e466e80ec989fbd522c89a67d274b8f0bed1ff72) ) // 64 90243-01
	1918	ROM_REGION( 0x1000, MC6845_TAG, 0 )
	1919	ROM_LOAD( "abc t6-11.7c", 0x0000, 0x1000, CRC(b17c51c5) SHA1(e466e80ec989fbd522c89a67d274b8f0bed1ff72) ) // 64 90243-01
1623	1920
1624	1921	ROM_REGION( 0x200, "rad", 0 )
1625		ROM_LOAD( "64 90241-01.9b", 0x0000, 0x0200, NO_DUMP ) // "RAD" 7621/7643 (82S131/82S137), character line address
	1922	ROM_LOAD( "64 90241-01.9b", 0x0000, 0x0200, NO_DUMP ) // "RAD" 7621/7643 (82S131/82S137), character line address
1626	1923
1627	1924	ROM_REGION( 0x20, "hru", 0 )
1628		ROM_LOAD( "64 90128-01.6e", 0x0000, 0x0020, NO_DUMP ) // "HRU I" 7603 (82S123), HR horizontal timing and video memory access
	1925	ROM_LOAD( "64 90128-01.6e", 0x0000, 0x0020, NO_DUMP ) // "HRU I" 7603 (82S123), HR horizontal timing and video memory access
1629	1926
1630	1927	ROM_REGION( 0x200, "hru2", 0 )
1631		ROM_LOAD( "fgctl.bin", 0x0000, 0x0200, BAD_DUMP CRC(7a19de8d) SHA1(e7cc49e749b37f7d7dd14f3feda53eae843a8fe0) )
1632		// ROM_LOAD( "64 90127-01.12g", 0x0000, 0x0200, NO_DUMP ) // "HRU II" 7621 (82S131), ABC800C HR compatibility mode palette
	1928	ROM_LOAD( "64 90127-01.12g", 0x0000, 0x0200, BAD_DUMP CRC(7a19de8d) SHA1(e7cc49e749b37f7d7dd14f3feda53eae843a8fe0) ) // "HRU II" 7621 (82S131), ABC800C HR compatibility mode palette
1633	1929
1634	1930	ROM_REGION( 0x400, "v50", 0 )
1635		ROM_LOAD( "64 90242-01.7e", 0x0000, 0x0200, NO_DUMP ) // "V50" 7621 (82S131), HR vertical timing 50Hz
1636		ROM_LOAD( "64 90319-01.7e", 0x0200, 0x0200, NO_DUMP ) // "V60" 7621 (82S131), HR vertical timing 60Hz
	1931	ROM_LOAD( "64 90242-01.7e", 0x0000, 0x0200, NO_DUMP ) // "V50" 7621 (82S131), HR vertical timing 50Hz
	1932	ROM_LOAD( "64 90319-01.7e", 0x0200, 0x0200, NO_DUMP ) // "V60" 7621 (82S131), HR vertical timing 60Hz
1637	1933
1638	1934	ROM_REGION( 0x400, "plds", 0 )
1639	1935	ROM_LOAD( "64 90225-01.11c", 0x0000, 0x0400, NO_DUMP ) // "VIDEO ATTRIBUTE" 40033A (?)
1640		ROM_LOAD( "64 90239-01.1b", 0x0000, 0x0400, NO_DUMP ) // "ABC P3-11" PAL16R4, color encoder
1641		ROM_LOAD( "64 90240-01.2d", 0x0000, 0x0400, NO_DUMP ) // "ABC P4-11" PAL16L8, memory mapper
	1936	ROM_LOAD( "64 90239-01.1b", 0x0000, 0x0400, NO_DUMP ) // "ABC P3-11" PAL16R4, color encoder
	1937	ROM_LOAD( "64 90240-01.2d", 0x0000, 0x0400, NO_DUMP ) // "ABC P4-11" PAL16L8, memory mapper
1642	1938	ROM_END
1643	1939
1644		/* Driver Initialization */
1645	1940
	1941
	1942	//**************************************************************************
	1943	// DRIVER INITIALIZATION
	1944	//**************************************************************************
	1945
	1946	//-------------------------------------------------
	1947	// DRIVER_INIT( abc800c )
	1948	//-------------------------------------------------
	1949
1646	1950	DIRECT_UPDATE_HANDLER( abc800c_direct_update_handler )
1647	1951	{
1648	1952	abc800_state *state = machine->driver_data<abc800_state>();
r9469	r9470
1651	1955	{
1652	1956	direct.explicit_configure(0x7c00, 0x7fff, 0x3ff, memory_region(machine, Z80_TAG) + 0x7c00);
1653	1957
1654		if (!state->fetch_charram)
	1958	if (!state->m_fetch_charram)
1655	1959	{
1656		state->fetch_charram = 1;
1657		abc800_bankswitch(machine);
	1960	state->m_fetch_charram = 1;
	1961	state->bankswitch();
1658	1962	}
1659	1963
1660	1964	return ~0;
1661	1965	}
1662	1966
1663		if (state->fetch_charram)
	1967	if (state->m_fetch_charram)
1664	1968	{
1665		state->fetch_charram = 0;
1666		abc800_bankswitch(machine);
	1969	state->m_fetch_charram = 0;
	1970	state->bankswitch();
1667	1971	}
1668	1972
1669	1973	return address;
1670	1974	}
1671	1975
	1976	static DRIVER_INIT( abc800c )
	1977	{
	1978	address_space *program = machine->device<cpu_device>(Z80_TAG)->space(AS_PROGRAM);
	1979	program->set_direct_update_handler(direct_update_delegate_create_static(abc800c_direct_update_handler, *machine));
	1980	}
	1981
	1982
	1983	//-------------------------------------------------
	1984	// DRIVER_INIT( abc800m )
	1985	//-------------------------------------------------
	1986
1672	1987	DIRECT_UPDATE_HANDLER( abc800m_direct_update_handler )
1673	1988	{
1674	1989	abc800_state *state = machine->driver_data<abc800_state>();
r9469	r9470
1677	1992	{
1678	1993	direct.explicit_configure(0x7800, 0x7fff, 0x7ff, memory_region(machine, Z80_TAG) + 0x7800);
1679	1994
1680		if (!state->fetch_charram)
	1995	if (!state->m_fetch_charram)
1681	1996	{
1682		state->fetch_charram = 1;
1683		abc800_bankswitch(machine);
	1997	state->m_fetch_charram = 1;
	1998	state->bankswitch();
1684	1999	}
1685	2000
1686	2001	return ~0;
1687	2002	}
1688	2003
1689		if (state->fetch_charram)
	2004	if (state->m_fetch_charram)
1690	2005	{
1691		state->fetch_charram = 0;
1692		abc800_bankswitch(machine);
	2006	state->m_fetch_charram = 0;
	2007	state->bankswitch();
1693	2008	}
1694	2009
1695	2010	return address;
1696	2011	}
1697	2012
	2013	static DRIVER_INIT( abc800m )
	2014	{
	2015	address_space *program = machine->device<cpu_device>(Z80_TAG)->space(AS_PROGRAM);
	2016	program->set_direct_update_handler(direct_update_delegate_create_static(abc800m_direct_update_handler, *machine));
	2017	}
	2018
	2019
	2020	//-------------------------------------------------
	2021	// DRIVER_INIT( abc802 )
	2022	//-------------------------------------------------
	2023
1698	2024	DIRECT_UPDATE_HANDLER( abc802_direct_update_handler )
1699	2025	{
1700	2026	abc802_state *state = machine->driver_data<abc802_state>();
1701	2027
1702		if (state->lrs)
	2028	if (state->m_lrs)
1703	2029	{
1704	2030	if (address >= 0x7800 && address < 0x8000)
1705	2031	{
r9469	r9470
1711	2037	return address;
1712	2038	}
1713	2039
	2040	static DRIVER_INIT( abc802 )
	2041	{
	2042	address_space *program = machine->device<cpu_device>(Z80_TAG)->space(AS_PROGRAM);
	2043	program->set_direct_update_handler(direct_update_delegate_create_static(abc802_direct_update_handler, *machine));
	2044	}
	2045
	2046
	2047	//-------------------------------------------------
	2048	// DRIVER_INIT( abc806 )
	2049	//-------------------------------------------------
	2050
1714	2051	DIRECT_UPDATE_HANDLER( abc806_direct_update_handler )
1715	2052	{
1716	2053	abc806_state *state = machine->driver_data<abc806_state>();
r9469	r9470
1719	2056	{
1720	2057	direct.explicit_configure(0x7800, 0x7fff, 0x7ff, memory_region(machine, Z80_TAG) + 0x7800);
1721	2058
1722		if (!state->fetch_charram)
	2059	if (!state->m_fetch_charram)
1723	2060	{
1724		state->fetch_charram = 1;
1725		abc806_bankswitch(machine);
	2061	state->m_fetch_charram = 1;
	2062	state->bankswitch();
1726	2063	}
1727	2064
1728	2065	return ~0;
1729	2066	}
1730	2067
1731		if (state->fetch_charram)
	2068	if (state->m_fetch_charram)
1732	2069	{
1733		state->fetch_charram = 0;
1734		abc806_bankswitch(machine);
	2070	state->m_fetch_charram = 0;
	2071	state->bankswitch();
1735	2072	}
1736	2073
1737	2074	return address;
1738	2075	}
1739	2076
1740		static DRIVER_INIT( abc800c )
	2077	static DRIVER_INIT( abc806 )
1741	2078	{
1742	2079	address_space *program = machine->device<cpu_device>(Z80_TAG)->space(AS_PROGRAM);
1743		program->set_direct_update_handler(direct_update_delegate_create_static(abc800c_direct_update_handler, *machine));
	2080	program->set_direct_update_handler(direct_update_delegate_create_static(abc806_direct_update_handler, *machine));
1744	2081	}
1745	2082
1746		static DRIVER_INIT( abc800m )
1747		{
1748		address_space *program = machine->device<cpu_device>(Z80_TAG)->space(AS_PROGRAM);
1749		program->set_direct_update_handler(direct_update_delegate_create_static(abc800m_direct_update_handler, *machine));
1750		}
1751	2083
1752		static DRIVER_INIT( abc802 )
1753		{
1754		address_space *program = machine->device<cpu_device>(Z80_TAG)->space(AS_PROGRAM);
1755		program->set_direct_update_handler(direct_update_delegate_create_static(abc802_direct_update_handler, *machine));
1756		}
1757	2084
1758		static DRIVER_INIT( abc806 )
1759		{
1760		address_space *program = machine->device<cpu_device>(Z80_TAG)->space(AS_PROGRAM);
1761		program->set_direct_update_handler(direct_update_delegate_create_static(abc806_direct_update_handler, *machine));
1762		}
	2085	//**************************************************************************
	2086	// SYSTEM DRIVERS
	2087	//**************************************************************************
1763	2088
1764		/* System Drivers */
1765
1766		/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
	2089	// YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS
1767	2090	COMP( 1981, abc800m, 0, 0, abc800m, abc800, abc800m, "Luxor Datorer AB", "ABC 800 M/HR", GAME_SUPPORTS_SAVE )
1768	2091	COMP( 1981, abc800c, abc800m, 0, abc800c, abc800, abc800c, "Luxor Datorer AB", "ABC 800 C/HR", GAME_SUPPORTS_SAVE \| GAME_NOT_WORKING )
1769	2092	COMP( 1983, abc802, 0, 0, abc802, abc802, abc802, "Luxor Datorer AB", "ABC 802", GAME_SUPPORTS_SAVE )

docs/messnew.txt
r9469	r9470
60	60	- [ABC800] Emulated the "fast" floppy disk controller. Note that only raw
61	61	sector dumps work currently (td0 not supported). [Curt Coder, exon]
62	62
	63	- [ABC800] Refactored drivers to define ADDRESS_MAP_MODERN. [Curt Coder]
	64
63	65	- [ABC806] Added enhanced options ROM. [exon, Curt Coder]
64	66
65	67	- [ATARIST] Added several language variants. [Curt Coder]

15994 Revisions