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r9368 Wednesday 13th October, 2010 at 10:25:16 UTC by Robbbert
[MBEE] Moved non-video routines from video to machine. Added TODO notes. 128k - added banking and the proper rom.

[src/mess/drivers]	mbee.c
[src/mess/includes]	mbee.h
[src/mess/machine]	mbee.c
[src/mess/video]	mbee.c

src/mess/machine/mbee.c

r9367	r9368
16	16	static size_t mbee_size;
17	17	static UINT8 mbee_clock_pulse;
18	18	static UINT8 fdc_status = 0;
	19	static UINT8 mbee_0a;
19	20	static running_device *mbee_fdc;
20	21	static mc146818_device *mbee_rtc;
21	22	static running_device *mbee_z80pio;
r9367	r9368
268	269
269	270	/***********************************************************
270	271
271		256 Memory Banking
	272	256TC Memory Banking
272	273
	274	Bits 0, 1 and 5 select which bank goes into 0000-7FFF.
	275	Bit 2 disables ROM, replacing it with RAM.
	276	Bit 3 disables Video, replacing it with RAM.
	277	Bit 4 switches the video circuits between F000-FFFF and
	278	8000-8FFF.
	279
	280	In case of a clash, video overrides ROM which overrides RAM.
	281
273	282	************************************************************/
274	283
	284	WRITE8_HANDLER( mbee256_50_w )
	285	{
	286	address_space *mem = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
275	287
	288	// primary low banks
	289	memory_set_bank(space->machine, "boot", (data & 3) | ((data & 0x20) >> 3));
	290	memory_set_bank(space->machine, "bank1", (data & 3) | ((data & 0x20) >> 3));
276	291
	292	// 9000-EFFF
	293	memory_set_bank(space->machine, "bank9", (data & 4) ? 1 : 0);
277	294
	295	// 8000-8FFF, F000-FFFF
	296	memory_unmap_readwrite (mem, 0x8000, 0x87ff, 0, 0);
	297	memory_unmap_readwrite (mem, 0x8800, 0x8fff, 0, 0);
	298	memory_unmap_readwrite (mem, 0xf000, 0xf7ff, 0, 0);
	299	memory_unmap_readwrite (mem, 0xf800, 0xffff, 0, 0);
278	300
	301	switch (data & 0x1c)
	302	{
	303	case 0x00:
	304	memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
	305	memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
	306	memory_install_readwrite8_handler (mem, 0xf000, 0xf7ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
	307	memory_install_readwrite8_handler (mem, 0xf800, 0xffff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
	308	memory_set_bank(space->machine, "bank8l", 0); // rom
	309	memory_set_bank(space->machine, "bank8h", 0); // rom
	310	break;
	311	case 0x04:
	312	memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
	313	memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
	314	memory_install_readwrite8_handler (mem, 0xf000, 0xf7ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
	315	memory_install_readwrite8_handler (mem, 0xf800, 0xffff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
	316	memory_set_bank(space->machine, "bank8l", 1); // ram
	317	memory_set_bank(space->machine, "bank8h", 1); // ram
	318	break;
	319	case 0x08:
	320	case 0x18:
	321	memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
	322	memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
	323	memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
	324	memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
	325	memory_set_bank(space->machine, "bank8l", 0); // rom
	326	memory_set_bank(space->machine, "bank8h", 0); // rom
	327	memory_set_bank(space->machine, "bankfl", 0); // ram
	328	memory_set_bank(space->machine, "bankfh", 0); // ram
	329	break;
	330	case 0x0c:
	331	case 0x1c:
	332	memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
	333	memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
	334	memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
	335	memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
	336	memory_set_bank(space->machine, "bank8l", 1); // ram
	337	memory_set_bank(space->machine, "bank8h", 1); // ram
	338	memory_set_bank(space->machine, "bankfl", 0); // ram
	339	memory_set_bank(space->machine, "bankfh", 0); // ram
	340	break;
	341	case 0x10:
	342	case 0x14:
	343	memory_install_readwrite8_handler (mem, 0x8000, 0x87ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
	344	memory_install_readwrite8_handler (mem, 0x8800, 0x8fff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
	345	memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
	346	memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
	347	memory_set_bank(space->machine, "bankfl", 0); // ram
	348	memory_set_bank(space->machine, "bankfh", 0); // ram
	349	break;
	350	}
	351	}
	352
279	353	/***********************************************************
280	354
	355	128k Memory Banking
	356
	357	The only difference to the 256TC is that bit 5 switches
	358	between rom2 and rom3. Since neither of these is dumped,
	359	this bit is not emulated. If it was, this scheme is used:
	360
	361	Low - rom2 occupies C000-FFFF
	362	High - ram = C000-DFFF, rom3 = E000-FFFF.
	363
	364	************************************************************/
	365
	366	WRITE8_HANDLER( mbee128_50_w )
	367	{
	368	address_space *mem = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	369
	370	// primary low banks
	371	memory_set_bank(space->machine, "boot", (data & 3));
	372	memory_set_bank(space->machine, "bank1", (data & 3));
	373
	374	// 9000-EFFF
	375	memory_set_bank(space->machine, "bank9", (data & 4) ? 1 : 0);
	376
	377	// 8000-8FFF, F000-FFFF
	378	memory_unmap_readwrite (mem, 0x8000, 0x87ff, 0, 0);
	379	memory_unmap_readwrite (mem, 0x8800, 0x8fff, 0, 0);
	380	memory_unmap_readwrite (mem, 0xf000, 0xf7ff, 0, 0);
	381	memory_unmap_readwrite (mem, 0xf800, 0xffff, 0, 0);
	382
	383	switch (data & 0x1c)
	384	{
	385	case 0x00:
	386	memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
	387	memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
	388	memory_install_readwrite8_handler (mem, 0xf000, 0xf7ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
	389	memory_install_readwrite8_handler (mem, 0xf800, 0xffff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
	390	memory_set_bank(space->machine, "bank8l", 0); // rom
	391	memory_set_bank(space->machine, "bank8h", 0); // rom
	392	break;
	393	case 0x04:
	394	memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
	395	memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
	396	memory_install_readwrite8_handler (mem, 0xf000, 0xf7ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
	397	memory_install_readwrite8_handler (mem, 0xf800, 0xffff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
	398	memory_set_bank(space->machine, "bank8l", 1); // ram
	399	memory_set_bank(space->machine, "bank8h", 1); // ram
	400	break;
	401	case 0x08:
	402	case 0x18:
	403	memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
	404	memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
	405	memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
	406	memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
	407	memory_set_bank(space->machine, "bank8l", 0); // rom
	408	memory_set_bank(space->machine, "bank8h", 0); // rom
	409	memory_set_bank(space->machine, "bankfl", 0); // ram
	410	memory_set_bank(space->machine, "bankfh", 0); // ram
	411	break;
	412	case 0x0c:
	413	case 0x1c:
	414	memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
	415	memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
	416	memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
	417	memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
	418	memory_set_bank(space->machine, "bank8l", 1); // ram
	419	memory_set_bank(space->machine, "bank8h", 1); // ram
	420	memory_set_bank(space->machine, "bankfl", 0); // ram
	421	memory_set_bank(space->machine, "bankfh", 0); // ram
	422	break;
	423	case 0x10:
	424	case 0x14:
	425	memory_install_readwrite8_handler (mem, 0x8000, 0x87ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
	426	memory_install_readwrite8_handler (mem, 0x8800, 0x8fff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
	427	memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
	428	memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
	429	memory_set_bank(space->machine, "bankfl", 0); // ram
	430	memory_set_bank(space->machine, "bankfh", 0); // ram
	431	break;
	432	}
	433	}
	434
	435
	436	/***********************************************************
	437
	438	64k Memory Banking
	439
	440	Bit 2 disables ROM, replacing it with RAM.
	441
	442	Due to lack of documentation, it is not possible to know
	443	if other bits are used.
	444
	445	************************************************************/
	446
	447	WRITE8_HANDLER( mbee64_50_w )
	448	{
	449	if (data & 4)
	450	{
	451	memory_set_bank(space->machine, "boot", 0);
	452	memory_set_bank(space->machine, "bankl", 0);
	453	memory_set_bank(space->machine, "bankh", 0);
	454	}
	455	else
	456	{
	457	memory_set_bank(space->machine, "bankl", 1);
	458	memory_set_bank(space->machine, "bankh", 1);
	459	}
	460	}
	461
	462
	463	/***********************************************************
	464
	465	ROM Banking on older models
	466
	467	Set A to 0 or 1 then read the port to switch between the
	468	halves of the Telcom ROM.
	469
	470	Output the PAK number to choose an optional PAK ROM.
	471
	472	The bios will support 256 PAKs, although normally only
	473	8 are available in hardware. Each PAK is normally a 4K
	474	ROM. If 8K ROMs are used, the 2nd half becomes PAK+8,
	475	thus 16 PAKs in total. This is what we support.
	476
	477	************************************************************/
	478
	479	READ8_HANDLER ( mbeeic_0a_r )
	480	{
	481	return mbee_0a;
	482	}
	483
	484	WRITE8_HANDLER ( mbeeic_0a_w )
	485	{
	486	mbee_0a = data;
	487	memory_set_bank(space->machine, "pak", data & 15);
	488	}
	489
	490	READ8_HANDLER ( mbeepc_telcom_low_r )
	491	{
	492	/* Read of port 0A - set Telcom rom to first half */
	493	memory_set_bank(space->machine, "telcom", 0);
	494	return mbee_0a;
	495	}
	496
	497	READ8_HANDLER ( mbeepc_telcom_high_r )
	498	{
	499	/* Read of port 10A - set Telcom rom to 2nd half */
	500	memory_set_bank(space->machine, "telcom", 1);
	501	return mbee_0a;
	502	}
	503
	504
	505	/***********************************************************
	506
281	507	Machine
282	508
283	509	************************************************************/
r9367	r9368
319	545	mbee_fdc = machine->device("wd179x");
320	546	}
321	547
	548	MACHINE_RESET( mbee128 )
	549	{
	550	address_space *mem = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	551	mbee_z80pio = machine->device("z80pio");
	552	mbee_speaker = machine->device("speaker");
	553	mbee_cassette = machine->device("cassette");
	554	mbee_printer = machine->device("centronics");
	555	mbee_fdc = machine->device("wd179x");
	556	mbee128_50_w(mem,0,0); // set banks to default
	557	memory_set_bank(machine, "boot", 4); // boot time
	558	}
	559
322	560	MACHINE_RESET( mbee256 )
323	561	{
324	562	UINT8 i;
r9367	r9368
451	689	mbee_size = 0xf000;
452	690	}
453	691
	692	DRIVER_INIT( mbee128 )
	693	{
	694	UINT8 *RAM = memory_region(machine, "maincpu");
	695	memory_configure_bank(machine, "boot", 0, 4, &RAM[0x0000],  0x8000); // standard banks 0000
	696	memory_configure_bank(machine, "bank1", 0, 4, &RAM[0x1000],  0x8000); // standard banks 1000
	697	memory_configure_bank(machine, "bank8l", 1, 1, &RAM[0x0000],  0x0000); // shadow ram
	698	memory_configure_bank(machine, "bank8h", 1, 1, &RAM[0x0800],  0x0000); // shadow ram
	699	memory_configure_bank(machine, "bank9", 1, 1, &RAM[0x1000],  0x0000); // shadow ram
	700	memory_configure_bank(machine, "bankfl", 0, 1, &RAM[0xf000],  0x0000); // shadow ram
	701	memory_configure_bank(machine, "bankfh", 0, 1, &RAM[0xf800],  0x0000); // shadow ram
	702
	703	RAM = memory_region(machine, "bootrom");
	704	memory_configure_bank(machine, "bank9", 0, 1, &RAM[0x1000], 0x0000); // rom
	705	memory_configure_bank(machine, "boot", 4, 1, &RAM[0x0000], 0x0000); // rom at boot for 4usec
	706	memory_configure_bank(machine, "bank8l", 0, 1, &RAM[0x0000],  0x0000); // rom
	707	memory_configure_bank(machine, "bank8h", 0, 1, &RAM[0x0800],  0x0000); // rom
	708	}
	709
454	710	DRIVER_INIT( mbee256 )
455	711	{
456	712	UINT8 *RAM = memory_region(machine, "maincpu");

src/mess/video/mbee.c

r9367	r9368
69	69	static UINT8 *videoram;
70	70	static UINT8 *attribram;
71	71	static UINT8 mbee_08;
72		static UINT8 mbee_0a;
73	72	static UINT8 mbee_0b;
74	73	static UINT8 mbee_1c;
75	74	static UINT8 is_premium;
r9367	r9368
78	77	static void mc6845_screen_configure(running_machine *machine);
79	78
80	79
	80	/***********************************************************
	81
	82	Handlers of video, colour, and attribute RAM
	83
	84	************************************************************/
	85
81	86	READ8_HANDLER( mbee_low_r )
82	87	{
83	88	if (mbee_0b & 1)
r9367	r9368
137	142	gfxram[0x0800 | offset] = data;
138	143	}
139	144
140		READ8_HANDLER ( mbeeic_0a_r )
141		{
142		return mbee_0a;
143		}
144
145		WRITE8_HANDLER ( mbeeic_0a_w )
146		{
147		mbee_0a = data;
148		memory_set_bank(space->machine, "pak", data & 15);
149		}
150
151		READ8_HANDLER ( mbeepc_telcom_low_r )
152		{
153		/* Read of port 0A - set Telcom rom to first half */
154		memory_set_bank(space->machine, "telcom", 0);
155		return mbee_0a;
156		}
157
158		READ8_HANDLER ( mbeepc_telcom_high_r )
159		{
160		/* Read of port 10A - set Telcom rom to 2nd half */
161		memory_set_bank(space->machine, "telcom", 1);
162		return mbee_0a;
163		}
164
165	145	READ8_HANDLER ( mbeeppc_1c_r )
166	146	{
167	147	return mbee_1c;
r9367	r9368
178	158	memory_set_bank(space->machine, "basic", (data & 0x20) ? 1 : 0);
179	159	}
180	160
181		WRITE8_HANDLER( mbee64_50_w )
182		{
183		/* This does a number of other things in the 128k (and later) models - not sure if
184		they exist in the 64k */
185
186		if (data & 4)
187		{
188		memory_set_bank(space->machine, "boot", 0);
189		memory_set_bank(space->machine, "bankl", 0);
190		memory_set_bank(space->machine, "bankh", 0);
191		}
192		else
193		{
194		memory_set_bank(space->machine, "bankl", 1);
195		memory_set_bank(space->machine, "bankh", 1);
196		}
197		}
198
199	161	WRITE8_HANDLER( mbee256_1c_w )
200	162	{
201	163	/*  d7 extended graphics (1=allow attributes and pcg banks)
r9367	r9368
206	168	mbee_1c = data;
207	169	}
208	170
209		WRITE8_HANDLER( mbee256_50_w )
210		{
211		address_space *mem = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
212
213		// primary low banks
214		memory_set_bank(space->machine, "boot", (data & 3) | ((data & 0x20) >> 3));
215		memory_set_bank(space->machine, "bank1", (data & 3) | ((data & 0x20) >> 3));
216
217		// 9000-EFFF
218		memory_set_bank(space->machine, "bank9", (data & 4) ? 1 : 0);
219
220		memory_unmap_readwrite (mem, 0x8000, 0x87ff, 0, 0);
221		memory_unmap_readwrite (mem, 0x8800, 0x8fff, 0, 0);
222		memory_unmap_readwrite (mem, 0xf000, 0xf7ff, 0, 0);
223		memory_unmap_readwrite (mem, 0xf800, 0xffff, 0, 0);
224
225		switch (data & 0x1c)
226		{
227		case 0x00:
228		memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
229		memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
230		memory_install_readwrite8_handler (mem, 0xf000, 0xf7ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
231		memory_install_readwrite8_handler (mem, 0xf800, 0xffff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
232		memory_set_bank(space->machine, "bank8l", 0); // rom
233		memory_set_bank(space->machine, "bank8h", 0); // rom
234		break;
235		case 0x04:
236		memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
237		memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
238		memory_install_readwrite8_handler (mem, 0xf000, 0xf7ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
239		memory_install_readwrite8_handler (mem, 0xf800, 0xffff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
240		memory_set_bank(space->machine, "bank8l", 1); // ram
241		memory_set_bank(space->machine, "bank8h", 1); // ram
242		break;
243		case 0x08:
244		case 0x18:
245		memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
246		memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
247		memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
248		memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
249		memory_set_bank(space->machine, "bank8l", 0); // rom
250		memory_set_bank(space->machine, "bank8h", 0); // rom
251		memory_set_bank(space->machine, "bankfl", 0); // ram
252		memory_set_bank(space->machine, "bankfh", 0); // ram
253		break;
254		case 0x0c:
255		case 0x1c:
256		memory_install_read_bank (mem, 0x8000, 0x87ff, 0, 0, "bank8l");
257		memory_install_read_bank (mem, 0x8800, 0x8fff, 0, 0, "bank8h");
258		memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
259		memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
260		memory_set_bank(space->machine, "bank8l", 1); // ram
261		memory_set_bank(space->machine, "bank8h", 1); // ram
262		memory_set_bank(space->machine, "bankfl", 0); // ram
263		memory_set_bank(space->machine, "bankfh", 0); // ram
264		break;
265		case 0x10:
266		case 0x14:
267		memory_install_readwrite8_handler (mem, 0x8000, 0x87ff, 0, 0, mbeeppc_low_r, mbeeppc_low_w);
268		memory_install_readwrite8_handler (mem, 0x8800, 0x8fff, 0, 0, mbeeppc_high_r, mbeeppc_high_w);
269		memory_install_read_bank (mem, 0xf000, 0xf7ff, 0, 0, "bankfl");
270		memory_install_read_bank (mem, 0xf800, 0xffff, 0, 0, "bankfh");
271		memory_set_bank(space->machine, "bankfl", 0); // ram
272		memory_set_bank(space->machine, "bankfh", 0); // ram
273		break;
274		}
275		}
276
277
278	171	READ8_HANDLER( mbeeppc_low_r )
279	172	{
280	173	if (mbee_1c & 16)
r9367	r9368
311	204	}
312	205
313	206
	207	/***********************************************************
	208
	209	CRTC-driven keyboard
	210
	211	************************************************************/
	212
314	213	static const char *const keynames[] = { "LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7" };
315	214
316	215	/* The direction keys are used by the pc85 menu. Do not know what uses the "insert" key. */
r9367	r9368
372	271	}
373	272
374	273
	274	/***********************************************************
	275
	276	CRTC registers
	277
	278	************************************************************/
	279
375	280	READ8_HANDLER ( m6545_status_r )
376	281	{
377	282	screen_device *screen = screen_first(*space->machine);
r9367	r9368
581	486	}
582	487	}
583	488
584		/* The 6845 can produce a variety of cursor shapes - all are emulated here
585		Need to find out if the 6545 works the same way */
	489
	490
	491	/***********************************************************
	492
	493	The 6845 can produce a variety of cursor shapes - all
	494	are emulated here.
	495
	496	Need to find out if the 6545 works the same way.
	497
	498	************************************************************/
	499
586	500	static void mc6845_cursor_configure(void)
587	501	{
588	502	UINT8 i,curs_type=0,r9,r10,r11;
r9367	r9368
617	531	if (curs_type == 3) for (i = r11; i < r10;i++) mc6845_cursor[i]=0; // now take a bite out of the middle
618	532	}
619	533
620		/* Resize the screen within the limits of the hardware. Expand the image to fill the screen area */
	534
	535
	536	/***********************************************************
	537
	538	Resize the screen within the limits of the hardware.
	539	Expand the image to fill the screen area.
	540
	541	************************************************************/
	542
621	543	static void mc6845_screen_configure(running_machine *machine)
622	544	{
623	545	rectangle visarea;
r9367	r9368
637	559	if (bytes < 0x800) machine->primary_screen->set_visible_area(0, width, 0, height);
638	560	}
639	561
	562
	563
	564	/***********************************************************
	565
	566	Video
	567
	568	************************************************************/
	569
640	570	VIDEO_START( mbee )
641	571	{
642	572	videoram = memory_region(machine, "videoram");
r9367	r9368
837	767	}
838	768
839	769
	770	/***********************************************************
	771
	772	Palette
	773
	774	************************************************************/
	775
840	776	PALETTE_INIT( mbeeic )
841	777	{
842	778	UINT16 i;

src/mess/includes/mbee.h

r9367	r9368
42	42	DRIVER_INIT( mbeeppc );
43	43	DRIVER_INIT( mbee56 );
44	44	DRIVER_INIT( mbee64 );
	45	DRIVER_INIT( mbee128 );
45	46	DRIVER_INIT( mbee256 );
46	47	MACHINE_RESET( mbee );
47	48	MACHINE_RESET( mbee64 );
	49	MACHINE_RESET( mbee128 );
48	50	MACHINE_RESET( mbee256 );
49	51	WRITE8_HANDLER( mbee_04_w );
50	52	WRITE8_HANDLER( mbee_06_w );
51	53	READ8_HANDLER( mbee_07_r );
	54	READ8_HANDLER( mbeeic_0a_r );
	55	WRITE8_HANDLER( mbeeic_0a_w );
	56	READ8_HANDLER( mbeepc_telcom_low_r );
	57	READ8_HANDLER( mbeepc_telcom_high_r );
52	58	READ8_HANDLER( mbee256_speed_low_r );
53	59	READ8_HANDLER( mbee256_speed_high_r );
54	60	READ8_HANDLER( mbee256_18_r );
	61	WRITE8_HANDLER( mbee64_50_w );
	62	WRITE8_HANDLER( mbee128_50_w );
	63	WRITE8_HANDLER( mbee256_50_w );
55	64
56	65	READ8_HANDLER ( mbee_fdc_status_r );
57	66	WRITE8_HANDLER ( mbee_fdc_motor_w );
r9367	r9368
77	86	WRITE8_HANDLER( mbeeic_08_w );
78	87	READ8_HANDLER( mbee_0b_r );
79	88	WRITE8_HANDLER( mbee_0b_w );
80		READ8_HANDLER( mbeeic_0a_r );
81		WRITE8_HANDLER( mbeeic_0a_w );
82		READ8_HANDLER( mbeepc_telcom_low_r );
83		READ8_HANDLER( mbeepc_telcom_high_r );
84	89	READ8_HANDLER( mbeeppc_1c_r );
85	90	WRITE8_HANDLER( mbeeppc_1c_w );
86	91	WRITE8_HANDLER( mbee256_1c_w );
r9367	r9368
88	93	READ8_HANDLER( mbeeppc_high_r );
89	94	WRITE8_HANDLER( mbeeppc_high_w );
90	95	WRITE8_HANDLER( mbeeppc_low_w );
91		WRITE8_HANDLER( mbee64_50_w );
92		WRITE8_HANDLER( mbee256_50_w );
93	96
94	97
95	98	VIDEO_START( mbee );

src/mess/drivers/mbee.c

r9367	r9368
6	6
7	7	Brett Selwood, Andrew Davies (technical assistance)
8	8
9		Various fixes by Robbbert.
	9	Various additions by Robbbert.
10	10
11	11	Thanks to The Bee Board (http://microbee.no-ip.com/beeboard), who
12	12	through a very dedicated community, have provided us with rom dumps,
r9367	r9368
61	61
62	62	These early colour computers have a PROM to create the foreground palette.
63	63
64		TODO:
65		- Printer is working, but with improper code. This needs to be fixed.
66		05-Oct-2010 printer hack commented out for now.. it doesn't work any more
67		- Roms for mbeepc to be checked (I think they are correct)
68		- Fix Paste (it loses most of the characters)
69		- Fix the rtc (it's in as per the manuals, but it is completely ignored)
70		- Get details on the many other models not currently emulated
71		- 256TC keyboard IRQ is active all the time, it needs to be fully understood.
72	64
73	65	Notes about the printer:
74	66	- When computer turned on, defaults to 1200 baud serial printer
r9367	r9368
76	68	- After you mount/create a printfile, you can LPRINT and LLIST.
77	69
78	70
	71	***************************************************************************
	72
	73	TODO/not working:
	74
	75	- Printer needs to be understood and fixed.
	76
	77	- Roms for mbeepc to be checked against ubee512
	78
	79	- Fix Paste (it loses most of the characters)
	80
	81	- RTC for 256TC works, but it is supposed to be an option on other
	82	models. It is being completely ignored.
	83
	84	- Most early models have a clock in Telcom, and in the menu. It doesn't
	85	work.
	86
	87	- 256TC keyboard IRQ is active all the time, it needs to be rewritten
	88
	89	- The Monitor program on 128k and 256TC crashes the system. This appears
	90	to be a MAME core bug involving the z80pio.
	91
	92	- Keyboard on EDASM on bankswitched models locks up. This also is
	93	suspected to be a core bug, since the identical edasm works on the
	94	non-bankswitch model.
	95
79	96	***************************************************************************/
80	97
81	98	#include "emu.h"
r9367	r9368
161	178	AM_RANGE(0xf800, 0xffff) AM_READWRITE(mbeeic_high_r, mbeeic_high_w)
162	179	ADDRESS_MAP_END
163	180
164		static ADDRESS_MAP_START(mbee256_mem, ADDRESS_SPACE_PROGRAM, 8)
	181	static ADDRESS_MAP_START(mbee128_mem, ADDRESS_SPACE_PROGRAM, 8)
165	182	AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
166	183	AM_RANGE(0x1000, 0x7fff) AM_RAMBANK("bank1")
167	184	AM_RANGE(0x8000, 0x87ff) AM_RAMBANK("bank8l")
r9367	r9368
236	253	AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x10) AM_READWRITE(m6545_status_r, m6545_index_w)
237	254	AM_RANGE(0x0d, 0x0d) AM_MIRROR(0x10) AM_READWRITE(m6545_data_r, m6545_data_w)
238	255	AM_RANGE(0x44, 0x47) AM_DEVREADWRITE("wd179x", wd17xx_r, wd17xx_w)
239		AM_RANGE(0x48, 0x48) AM_READWRITE(mbee_fdc_status_r, mbee_fdc_motor_w)
	256	AM_RANGE(0x48, 0x4f) AM_READWRITE(mbee_fdc_status_r, mbee_fdc_motor_w)
240	257	ADDRESS_MAP_END
241	258
242	259	static ADDRESS_MAP_START(mbee64_io, ADDRESS_SPACE_IO, 8)
r9367	r9368
248	265	AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x10) AM_READWRITE(m6545_status_r, m6545_index_w)
249	266	AM_RANGE(0x0d, 0x0d) AM_MIRROR(0x10) AM_READWRITE(m6545_data_r, m6545_data_w)
250	267	AM_RANGE(0x44, 0x47) AM_DEVREADWRITE("wd179x", wd17xx_r, wd17xx_w)
251		AM_RANGE(0x48, 0x48) AM_READWRITE(mbee_fdc_status_r, mbee_fdc_motor_w)
252		AM_RANGE(0x50, 0x50) AM_WRITE(mbee64_50_w)
	268	AM_RANGE(0x48, 0x4f) AM_READWRITE(mbee_fdc_status_r, mbee_fdc_motor_w)
	269	AM_RANGE(0x50, 0x57) AM_WRITE(mbee64_50_w)
253	270	ADDRESS_MAP_END
254	271
	272	static ADDRESS_MAP_START(mbee128_io, ADDRESS_SPACE_IO, 8)
	273	ADDRESS_MAP_GLOBAL_MASK(0xff)
	274	ADDRESS_MAP_UNMAP_HIGH
	275	AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
	276	AM_RANGE(0x08, 0x08) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
	277	AM_RANGE(0x0b, 0x0b) AM_READWRITE(mbee_0b_r, mbee_0b_w)
	278	AM_RANGE(0x0c, 0x0c) AM_READWRITE(m6545_status_r, m6545_index_w)
	279	AM_RANGE(0x0d, 0x0d) AM_READWRITE(m6545_data_r, m6545_data_w)
	280	AM_RANGE(0x1c, 0x1f) AM_READWRITE(mbeeppc_1c_r,mbee256_1c_w)
	281	AM_RANGE(0x44, 0x47) AM_DEVREADWRITE("wd179x", wd17xx_r, wd17xx_w)
	282	AM_RANGE(0x48, 0x4f) AM_READWRITE(mbee_fdc_status_r, mbee_fdc_motor_w)
	283	AM_RANGE(0x50, 0x57) AM_WRITE(mbee128_50_w)
	284	ADDRESS_MAP_END
	285
255	286	static ADDRESS_MAP_START(mbee256_io, ADDRESS_SPACE_IO, 8)
256	287	ADDRESS_MAP_UNMAP_HIGH
257	288	AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff00) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
r9367	r9368
681	712	MDRV_FLOPPY_2_DRIVES_ADD(mbee_floppy_config)
682	713	MACHINE_CONFIG_END
683	714
684		static MACHINE_CONFIG_DERIVED( mbee64, mbeeic )
	715	static MACHINE_CONFIG_DERIVED( mbee64, mbee56 )
685	716	MDRV_CPU_MODIFY( "maincpu" )
686	717	MDRV_CPU_PROGRAM_MAP(mbee64_mem)
687	718	MDRV_CPU_IO_MAP(mbee64_io)
688	719	MDRV_MACHINE_RESET( mbee64 )
	720	MACHINE_CONFIG_END
	721
	722	static MACHINE_CONFIG_DERIVED( mbee128, mbeeppc )
	723	MDRV_CPU_MODIFY( "maincpu" )
	724	MDRV_CPU_PROGRAM_MAP(mbee128_mem)
	725	MDRV_CPU_IO_MAP(mbee128_io)
	726	MDRV_MACHINE_RESET( mbee128 )
689	727	MDRV_WD179X_ADD("wd179x", mbee_wd17xx_interface )
690	728	MDRV_FLOPPY_2_DRIVES_ADD(mbee_floppy_config)
691	729	MACHINE_CONFIG_END
692	730
693		static MACHINE_CONFIG_DERIVED( mbee256, mbeeppc )
	731	static MACHINE_CONFIG_DERIVED( mbee256, mbee128 )
694	732	MDRV_CPU_MODIFY( "maincpu" )
695		MDRV_CPU_PROGRAM_MAP(mbee256_mem)
696	733	MDRV_CPU_IO_MAP(mbee256_io)
697	734	MDRV_MACHINE_RESET( mbee256 )
698	735	MDRV_MC146818_ADD( "rtc", MC146818_STANDARD )
699		MDRV_WD179X_ADD("wd179x", mbee_wd17xx_interface )
700		MDRV_FLOPPY_2_DRIVES_ADD(mbee_floppy_config)
701	736	MACHINE_CONFIG_END
702	737
703	738	/* Unused roms:
r9367	r9368
710	745	ROM_LOAD_OPTIONAL("telcom11.rom", 0xe000,  0x1000, CRC(15516499) SHA1(2d4953f994b66c5d3b1d457b8c92d9a0a69eb8b8) )
711	746	Telcom 1.1 for the mbeeic (It could have 1.0, 1.1 or 1.2)
712	747
	748	ROM_LOAD("bn54.bin",              0x0000,  0x2000, CRC(995c53db) SHA1(46e1a5cfd5795b8cf528bacf9dc79398ff7d64af) )
	749	ROM_LOAD("bn56.bin",              0x0000,  0x2000, CRC(3f76769d) SHA1(cfae2069d739c26fe39f734d9f705a3c965d1e6f) )
	750	These are alternate boot roms for the 128k. They have no menu, and look just like the 64k/56k bootup.
	751
	752
713	753	*/
714	754
715	755
r9367	r9368
931	971	ROM_REGION(0x10000,"maincpu", ROMREGION_ERASEFF)
932	972
933	973	ROM_REGION(0x7000,"bootrom", ROMREGION_ERASEFF)
934		ROM_LOAD("rom1.bin",              0x0000,  0x2000, CRC(995c53db) SHA1(46e1a5cfd5795b8cf528bacf9dc79398ff7d64af) )
	974	ROM_LOAD("bn54.bin",              0x0000,  0x2000, CRC(995c53db) SHA1(46e1a5cfd5795b8cf528bacf9dc79398ff7d64af) )
935	975
936	976	ROM_REGION(0x2000, "gfx", 0)
937	977	ROM_LOAD("charrom.bin",           0x1000,  0x1000, CRC(1f9fcee4) SHA1(e57ac94e03638075dde68a0a8c834a4f84ba47b0) )
r9367	r9368
949	989	ROM_REGION(0x20000,"maincpu", ROMREGION_ERASEFF)
950	990
951	991	ROM_REGION(0x7000,"bootrom", ROMREGION_ERASEFF)
952		ROM_LOAD("rom1.bin",              0x0000,  0x2000, CRC(995c53db) SHA1(46e1a5cfd5795b8cf528bacf9dc79398ff7d64af) )
	992	ROM_LOAD("bn60.bin",              0x0000,  0x2000, CRC(ed15d4ee) SHA1(3ea42b63d42b9a4c5402676dee8912ad1f906bda) )
953	993
954		ROM_REGION(0x2000, "gfx", 0)
	994	ROM_REGION(0x9800, "gfx", 0)
955	995	ROM_LOAD("charrom.bin",           0x1000,  0x1000, CRC(1f9fcee4) SHA1(e57ac94e03638075dde68a0a8c834a4f84ba47b0) )
956	996	ROM_RELOAD( 0x0000, 0x1000 )
957	997
958		ROM_REGION( 0x0040, "proms", 0 )
959		ROM_LOAD( "82s123.ic7",           0x0000,  0x0020, CRC(61b9c16c) SHA1(0ee72377831c21339360c376f7248861d476dc20) )
960		ROM_LOAD_OPTIONAL( "82s123.ic16", 0x0020,  0x0020, CRC(4e779985) SHA1(cd2579cf65032c30b3fe7d6d07b89d4633687481) )   /* video switching prom, not needed for emulation purposes */
961
962	998	ROM_REGION( 0x0800, "videoram", ROMREGION_ERASE00 )
963	999	ROM_REGION( 0x0800, "colorram", ROMREGION_ERASE00 )
	1000	ROM_REGION( 0x0800, "attrib", ROMREGION_ERASE00 )
964	1001	ROM_END
965	1002
966	1003	ROM_START( mbee256 )
r9367	r9368
995	1032	COMP( 1986, mbeeppc,  mbee,   0,   mbeeppc,  mbee,     mbeeppc,      "Applied Technology",  "Microbee 32 Premium PC85" , 0 )
996	1033	COMP( 1986, mbee56,   mbee,   0,   mbee56,   mbee,     mbee56,       "Applied Technology",  "Microbee 56k" , GAME_NOT_WORKING )
997	1034	COMP( 1986, mbee64,   mbee,   0,   mbee64,   mbee,     mbee64,       "Applied Technology",  "Microbee 64k" , GAME_NOT_WORKING )
998		COMP( 1986, mbee128,  mbee,   0,   mbee64,  mbee,     mbee64,       "Applied Technology",  "Microbee 128k" , GAME_NOT_WORKING )
	1035	COMP( 1986, mbee128,  mbee,   0,   mbee128,  mbee,     mbee128,       "Applied Technology",  "Microbee 128k" , GAME_NOT_WORKING )
999	1036	COMP( 1987, mbee256,  mbee,   0,   mbee256,  mbee256,  mbee256,       "Applied Technology",  "Microbee 256TC" , GAME_NOT_WORKING )
1000	1037

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