src/mame/drivers/megadriv.c
| r9306 | r9307 | |
| 36 | 36 | |
| 37 | 37 | Fix 32X support (not used by any arcade systems?) |
| 38 | 38 | - this seems to require far greater sync and timing accuracy on rom / ram access than MAME can provide |
| 39 | | - World Series Baseball 95 (and others) are odd, they write data to the normal DRAM framebuffer |
| 40 | | expecting it to act like the 'overwrite area' (where 00 bytes ignored) this can't be right.. |
| 39 | - split NTSC / PAL drivers |
| 40 | - 36greatju: missing backup ram, has issues with golfer select due of that |
| 41 | - afterbju: black screen, has a bug with Master SH-2 code snippet at 060037f8 (R0 should be 0x3ff but it's instead 0x3fff****) |
| 42 | - bcracers: write to undefined PWM register? |
| 43 | - cosmiccp: black screen, Master SH-2 stalls on a RTS? (unchecked) |
| 44 | - eccodemo: black screen after the Sega logo, faulty comms check |
| 45 | - fifa96 / nbajamte: dies on the gameplay, waiting for a comm change that never occurs; |
| 46 | - nbajamte: missing I2C hookup, startup fails due of that (same I2C type as plain MD version); |
| 47 | - nflquart: black screen, missing h irq? |
| 48 | - sangoku4: black screen after the Sega logo |
| 49 | - sharrierju: black screen; |
| 50 | - soulstar: hangs almost soon, it just plays the BGM and shows a galaxy background; |
| 51 | - tempo: intro is too fast, mostly noticeable with the PWM sound that cuts off too early when it gets to the title screen; |
| 52 | - tmek: gameplay is clearly too fast |
| 53 | - vfju: dies when a match starts or when attempts to enter into attract mode, master SH-2 jumps to a misaligned vector; |
| 54 | - vham: Master SH-2 crashes when entering into gameplay |
| 55 | - vrdxu: no 3d gfxs |
| 56 | - wwfraw: writes fb data to the cart area and expects it to be read back, kludging the cart area to be writeable makes the 32x gfxs to appear |
| 57 | - wwfwre: no 32x gfxs |
| 58 | - xmen: black screen after that you choose the level |
| 41 | 59 | |
| 42 | | |
| 43 | | |
| 44 | 60 | Add PicoDrive support (not arcade) |
| 45 | 61 | |
| 46 | 62 | Change SegaC2 to use the VDP emulation here |
| r9306 | r9307 | |
| 2428 | 2444 | |
| 2429 | 2445 | static READ16_HANDLER( _32x_68k_dram_overwrite_r ) |
| 2430 | 2446 | { |
| 2431 | | return _32x_access_dram[offset+0x10000]; |
| 2447 | return _32x_access_dram[offset]; |
| 2432 | 2448 | } |
| 2433 | 2449 | |
| 2434 | 2450 | static WRITE16_HANDLER( _32x_68k_dram_overwrite_w ) |
| 2435 | 2451 | { |
| 2436 | | COMBINE_DATA(&_32x_access_dram[offset+0x10000]); |
| 2452 | //COMBINE_DATA(&_32x_access_dram[offset+0x10000]); |
| 2437 | 2453 | |
| 2438 | 2454 | if (ACCESSING_BITS_8_15) |
| 2439 | 2455 | { |
| r9306 | r9307 | |
| 2570 | 2586 | printf("Fifo block a isn't filled!\n"); |
| 2571 | 2587 | |
| 2572 | 2588 | if (current_fifo_readblock == fifo_block_b && !fifo_block_b_full) |
| 2573 | | printf("Fifo block b isn't filled!\n"); |
| 2589 | printf("%08x Fifo block b isn't filled!\n",cpu_get_pc(space->cpu)); |
| 2574 | 2590 | |
| 2575 | 2591 | |
| 2576 | 2592 | if (current_fifo_read_pos==4) |
| r9306 | r9307 | |
| 2617 | 2633 | case 0x02/2: // a1510a / 400a |
| 2618 | 2634 | dreq_src_addr[offset&1] = ((offset&1) == 0) ? (data & 0xff) : (data & 0xfffe); |
| 2619 | 2635 | |
| 2620 | | if((dreq_src_addr[0]<<16)|dreq_src_addr[1]) |
| 2621 | | printf("DREQ set SRC = %08x\n",(dreq_src_addr[0]<<16)|dreq_src_addr[1]); |
| 2636 | //if((dreq_src_addr[0]<<16)|dreq_src_addr[1]) |
| 2637 | // printf("DREQ set SRC = %08x\n",(dreq_src_addr[0]<<16)|dreq_src_addr[1]); |
| 2622 | 2638 | |
| 2623 | 2639 | break; |
| 2624 | 2640 | |
| r9306 | r9307 | |
| 2626 | 2642 | case 0x06/2: // a1510e / 400e |
| 2627 | 2643 | dreq_dst_addr[offset&1] = ((offset&1) == 0) ? (data & 0xff) : (data & 0xffff); |
| 2628 | 2644 | |
| 2629 | | if((dreq_dst_addr[0]<<16)|dreq_dst_addr[1]) |
| 2630 | | printf("DREQ set DST = %08x\n",(dreq_dst_addr[0]<<16)|dreq_dst_addr[1]); |
| 2645 | //if((dreq_dst_addr[0]<<16)|dreq_dst_addr[1]) |
| 2646 | // printf("DREQ set DST = %08x\n",(dreq_dst_addr[0]<<16)|dreq_dst_addr[1]); |
| 2631 | 2647 | |
| 2632 | 2648 | break; |
| 2633 | 2649 | |
| r9306 | r9307 | |
| 3212 | 3228 | break; |
| 3213 | 3229 | |
| 3214 | 3230 | case 0x0a/2: |
| 3215 | | // bit 0 is the framebuffer select; |
| 3231 | // bit 0 is the framebuffer select, change is delayed until vblank; |
| 3216 | 3232 | _32x_a1518a_reg = (_32x_a1518a_reg & 0xfffe) | (data & 1); |
| 3217 | 3233 | |
| 3218 | 3234 | if (_32x_a1518a_reg & 1) |
| r9306 | r9307 | |
| 3643 | 3659 | AM_RANGE(0x04020000, 0x0403ffff) AM_READWRITE(_32x_sh2_framebuffer_overwrite_dram_r, _32x_sh2_framebuffer_overwrite_dram_w) |
| 3644 | 3660 | |
| 3645 | 3661 | AM_RANGE(0x06000000, 0x0603ffff) AM_RAM AM_SHARE("share10") |
| 3646 | | AM_RANGE(0x02000000, 0x023fffff) AM_RAM AM_REGION("gamecart_sh2", 0) // program is writeable (wwfraw) |
| 3662 | AM_RANGE(0x02000000, 0x023fffff) AM_ROM AM_REGION("gamecart_sh2", 0) // program is writeable (wwfraw) |
| 3647 | 3663 | |
| 3648 | | AM_RANGE(0x22000000, 0x223fffff) AM_RAM AM_REGION("gamecart_sh2", 0) // cart mirror (fifa96) |
| 3664 | AM_RANGE(0x22000000, 0x223fffff) AM_ROM AM_REGION("gamecart_sh2", 0) // cart mirror (fifa96) |
| 3649 | 3665 | |
| 3650 | 3666 | AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM |
| 3651 | 3667 | ADDRESS_MAP_END |
| r9306 | r9307 | |
| 3672 | 3688 | AM_RANGE(0x04020000, 0x0403ffff) AM_READWRITE(_32x_sh2_framebuffer_overwrite_dram_r, _32x_sh2_framebuffer_overwrite_dram_w) |
| 3673 | 3689 | |
| 3674 | 3690 | AM_RANGE(0x06000000, 0x0603ffff) AM_RAM AM_SHARE("share10") |
| 3675 | | AM_RANGE(0x02000000, 0x023fffff) AM_RAM AM_REGION("gamecart_sh2", 0) // program is writeable (wwfraw) |
| 3691 | AM_RANGE(0x02000000, 0x023fffff) AM_ROM AM_REGION("gamecart_sh2", 0) // program is writeable (wwfraw) |
| 3676 | 3692 | |
| 3677 | | AM_RANGE(0x22000000, 0x223fffff) AM_RAM AM_REGION("gamecart_sh2", 0) // cart mirror (fifa96) |
| 3693 | AM_RANGE(0x22000000, 0x223fffff) AM_ROM AM_REGION("gamecart_sh2", 0) // cart mirror (fifa96) |
| 3678 | 3694 | |
| 3679 | 3695 | AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM |
| 3680 | 3696 | ADDRESS_MAP_END |
| r9306 | r9307 | |
| 6301 | 6317 | |
| 6302 | 6318 | } |
| 6303 | 6319 | |
| 6304 | | if (megadrive_vblank_flag>=224) |
| 6305 | | megadrive_vblank_flag = 1; |
| 6320 | #if 0 |
| 6321 | if(_32x_is_connected) |
| 6322 | { |
| 6323 | if (genesis_scanline_counter >= megadrive_irq6_scanline) |
| 6324 | { |
| 6325 | _32x_a1518a_reg = (_32x_a1518a_reg & 0xfffe) | (_32x_fb_swap & 1); |
| 6306 | 6326 | |
| 6307 | | if (megadrive_vblank_flag>=236) |
| 6308 | | megadrive_vblank_flag = 0; |
| 6327 | if (_32x_fb_swap & 1) |
| 6328 | { |
| 6329 | _32x_access_dram = _32x_dram0; |
| 6330 | _32x_display_dram = _32x_dram1; |
| 6331 | } |
| 6332 | else |
| 6333 | { |
| 6334 | _32x_display_dram = _32x_dram0; |
| 6335 | _32x_access_dram = _32x_dram1; |
| 6336 | } |
| 6337 | } |
| 6338 | } |
| 6339 | #endif |
| 6309 | 6340 | |
| 6310 | 6341 | // if (genesis_scanline_counter==0) irq4counter = MEGADRIVE_REG0A_HINT_VALUE; |
| 6311 | 6342 | // irq4counter = MEGADRIVE_REG0A_HINT_VALUE; |