src/mame/drivers/megadriv.c
| r9254 | r9255 | |
|---|
| 2988 | 2988 | // 0 = every line |
| 2989 | 2989 | /**********************************************************************************************/ |
| 2990 | 2990 | |
| 2991 | static UINT16 hcount; |
| 2992 | |
| 2993 | static READ16_HANDLER( _32x_sh2_common_4004_r ) |
| 2994 | { |
| 2995 | return hcount; |
| 2996 | } |
| 2997 | |
| 2998 | static WRITE16_HANDLER( _32x_sh2_common_4004_w ) |
| 2999 | { |
| 3000 | hcount = data & 0xff; |
| 3001 | } |
| 3002 | |
| 3003 | |
| 2991 | 3004 | /**********************************************************************************************/ |
| 2992 | 3005 | // SH2 side 4006 |
| 2993 | 3006 | // DReq Control Register |
| 2994 | 3007 | /**********************************************************************************************/ |
| 2995 | 3008 | |
| 3009 | static READ16_HANDLER( _32x_sh2_common_4006_r ) |
| 3010 | { |
| 3011 | printf("DREQ read!\n"); |
| 3012 | return 0; |
| 3013 | } |
| 3014 | |
| 3015 | static WRITE16_HANDLER( _32x_sh2_common_4006_w ) |
| 3016 | { |
| 3017 | printf("DREQ write!\n"); |
| 3018 | } |
| 3019 | |
| 2996 | 3020 | /**********************************************************************************************/ |
| 2997 | 3021 | // SH2 side 4008 |
| 2998 | 3022 | // 68k To SH2 DReq Source Address Register ( High Bits ) |
| r9254 | r9255 | |
|---|
| 3342 | 3366 | _32X_MAP_READHANDLERS(slave_4000,common_4002) // _32x_sh2_slave_4000_common_4002_r |
| 3343 | 3367 | _32X_MAP_WRITEHANDLERS(slave_4000,common_4002) // _32x_sh2_slave_4000_common_4002_w |
| 3344 | 3368 | |
| 3369 | _32X_MAP_READHANDLERS(common_4004,common_4006) |
| 3370 | _32X_MAP_WRITEHANDLERS(common_4004,common_4006) |
| 3371 | |
| 3345 | 3372 | _32X_MAP_WRITEHANDLERS(master_4014,master_4016) // _32x_sh2_master_4014_master_4016_w |
| 3346 | 3373 | _32X_MAP_WRITEHANDLERS(master_4018,master_401a) // _32x_sh2_master_4018_master_401a_w |
| 3347 | 3374 | _32X_MAP_WRITEHANDLERS(master_401c,master_401e) // _32x_sh2_master_401c_master_401e_w |
| r9254 | r9255 | |
|---|
| 3387 | 3414 | AM_RANGE(0x00000000, 0x00003fff) AM_ROM |
| 3388 | 3415 | |
| 3389 | 3416 | AM_RANGE(0x00004000, 0x00004003) AM_READWRITE( _32x_sh2_master_4000_common_4002_r, _32x_sh2_master_4000_common_4002_w ) |
| 3417 | AM_RANGE(0x00004004, 0x00004007) AM_READWRITE( _32x_sh2_common_4004_common_4006_r, _32x_sh2_common_4004_common_4006_w) |
| 3390 | 3418 | |
| 3391 | 3419 | AM_RANGE(0x00004010, 0x00004013) AM_READ( _32x_sh2_common_4010_common_4012_r ) |
| 3392 | 3420 | |
| r9254 | r9255 | |
|---|
| 3416 | 3444 | AM_RANGE(0x00000000, 0x00003fff) AM_ROM |
| 3417 | 3445 | |
| 3418 | 3446 | AM_RANGE(0x00004000, 0x00004003) AM_READWRITE( _32x_sh2_slave_4000_common_4002_r, _32x_sh2_slave_4000_common_4002_w ) |
| 3447 | AM_RANGE(0x00004004, 0x00004007) AM_READWRITE( _32x_sh2_common_4004_common_4006_r, _32x_sh2_common_4004_common_4006_w) |
| 3419 | 3448 | |
| 3420 | 3449 | AM_RANGE(0x00004010, 0x00004013) AM_READ( _32x_sh2_common_4010_common_4012_r ) |
| 3421 | 3450 | |