src/emu/cpu/m68000/m68kfpu.c
| r9200 | r9201 | |
|---|
| 314 | 314 | case 0x15: |
| 315 | 315 | case 0x05: return (z || (n && !nan)); // Less Than or Equal |
| 316 | 316 | |
| 317 | case 0x16: |
| 318 | case 0x06: return !nan && !z; |
| 319 | |
| 320 | case 0x17: |
| 321 | case 0x07: return !nan; |
| 322 | |
| 323 | case 0x18: |
| 324 | case 0x08: return nan; |
| 325 | |
| 326 | case 0x19: |
| 327 | case 0x09: return nan || z; |
| 328 | |
| 317 | 329 | case 0x1a: |
| 318 | 330 | case 0x0a: return (nan || !(n || z)); // Not Less Than or Equal |
| 319 | 331 | |
| r9200 | r9201 | |
|---|
| 1182 | 1194 | m68k->remaining_cycles -= 3; |
| 1183 | 1195 | break; |
| 1184 | 1196 | } |
| 1197 | case 0x1e: // FGETEXP |
| 1198 | { |
| 1199 | floatx80 temp = source; |
| 1200 | INT16 temp2; |
| 1201 | |
| 1202 | temp2 = source.high; // get the exponent |
| 1203 | temp2 -= 0x3fff; // take off the bias |
| 1204 | REG_FP[dst] = double_to_fx80((double)temp2); |
| 1205 | SET_CONDITION_CODES(m68k, REG_FP[dst]); |
| 1206 | m68k->remaining_cycles -= 6; |
| 1207 | } |
| 1185 | 1208 | case 0x20: // FDIV |
| 1186 | 1209 | { |
| 1187 | 1210 | REG_FP[dst] = floatx80_div(REG_FP[dst], source); |