src/mess/machine/pce.c
| r9075 | r9076 | |
|---|
| 117 | 117 | UINT32 acard_base_addr; |
| 118 | 118 | UINT16 acard_addr_offset; |
| 119 | 119 | UINT16 acard_addr_inc; |
| 120 | UINT32 acard_shift; |
| 121 | UINT8 acard_shift_reg; |
| 120 | 122 | |
| 121 | 123 | UINT32 current_frame; |
| 122 | 124 | UINT32 end_frame; |
| r9075 | r9076 | |
|---|
| 1301 | 1303 | { |
| 1302 | 1304 | switch(offset & 0x2ef) |
| 1303 | 1305 | { |
| 1306 | case 0x2e0: return (pce_cd.acard_shift >> 0) & 0xff; |
| 1307 | case 0x2e1: return (pce_cd.acard_shift >> 8) & 0xff; |
| 1308 | case 0x2e2: return (pce_cd.acard_shift >> 16) & 0xff; |
| 1309 | case 0x2e3: return (pce_cd.acard_shift >> 24) & 0xff; |
| 1310 | case 0x2e4: return (pce_cd.acard_shift_reg); |
| 1304 | 1311 | case 0x2e5: return pce_cd.acard_latch; |
| 1305 | 1312 | case 0x2ee: return 0x10; |
| 1306 | 1313 | case 0x2ef: return 0x51; |
| r9075 | r9076 | |
|---|
| 1330 | 1337 | else |
| 1331 | 1338 | { |
| 1332 | 1339 | pce_cd.acard_addr_offset += pce_cd.acard_addr_inc; |
| 1333 | | |
| 1334 | 1340 | } |
| 1335 | 1341 | } |
| 1336 | 1342 | |
| r9075 | r9076 | |
|---|
| 1344 | 1350 | case 0x07: return (pce_cd.acard_addr_inc >> 0) & 0xff; |
| 1345 | 1351 | case 0x08: return (pce_cd.acard_addr_inc >> 8) & 0xff; |
| 1346 | 1352 | case 0x09: return pce_cd.acard_ctrl; |
| 1353 | default: return 0; |
| 1347 | 1354 | } |
| 1348 | 1355 | |
| 1349 | 1356 | return 0; |
| r9075 | r9076 | |
|---|
| 1357 | 1364 | { |
| 1358 | 1365 | switch(offset & 0x0f) |
| 1359 | 1366 | { |
| 1367 | case 0: pce_cd.acard_shift = (data & 0xff) | (pce_cd.acard_shift & 0xffffff00); break; |
| 1368 | case 1: pce_cd.acard_shift = (data << 8) | (pce_cd.acard_shift & 0xffff00ff); break; |
| 1369 | case 2: pce_cd.acard_shift = (data << 16) | (pce_cd.acard_shift & 0xff00ffff); break; |
| 1370 | case 3: pce_cd.acard_shift = (data << 24) | (pce_cd.acard_shift & 0x00ffffff); break; |
| 1371 | case 4: |
| 1372 | { |
| 1373 | pce_cd.acard_shift_reg = data & 0x0f; |
| 1374 | |
| 1375 | if(pce_cd.acard_shift_reg != 0) |
| 1376 | { |
| 1377 | pce_cd.acard_shift = (pce_cd.acard_shift_reg < 8) ? |
| 1378 | (pce_cd.acard_shift << pce_cd.acard_shift_reg) |
| 1379 | : (pce_cd.acard_shift >> (16 - pce_cd.acard_shift_reg)); |
| 1380 | } |
| 1381 | } |
| 1382 | break; |
| 1360 | 1383 | case 5: pce_cd.acard_latch = data; break; |
| 1361 | 1384 | } |
| 1362 | 1385 | } |
| r9075 | r9076 | |
|---|
| 1381 | 1404 | else |
| 1382 | 1405 | { |
| 1383 | 1406 | pce_cd.acard_addr_offset += pce_cd.acard_addr_inc; |
| 1384 | | |
| 1385 | 1407 | } |
| 1386 | 1408 | } |
| 1387 | 1409 | |
| r9075 | r9076 | |
|---|
| 1394 | 1416 | case 0x06: |
| 1395 | 1417 | pce_cd.acard_addr_offset = (data << 8) | (pce_cd.acard_addr_offset & 0x00ff); |
| 1396 | 1418 | |
| 1419 | if((pce_cd.acard_ctrl & 0x60) == 0x40) |
| 1420 | { |
| 1421 | pce_cd.acard_base_addr += pce_cd.acard_addr_offset + ((pce_cd.acard_ctrl & 0x08) ? 0xff0000 : 0); |
| 1422 | pce_cd.acard_base_addr &= 0xffffff; |
| 1423 | } |
| 1397 | 1424 | break; |
| 1398 | 1425 | case 0x07: pce_cd.acard_addr_inc = (data & 0xff) | (pce_cd.acard_addr_inc & 0xff00); break; |
| 1399 | 1426 | case 0x08: pce_cd.acard_addr_inc = (data << 8) | (pce_cd.acard_addr_inc & 0x00ff); break; |
| 1400 | 1427 | case 0x09: pce_cd.acard_ctrl = data & 0x7f; break; |
| 1428 | case 0x0a: |
| 1429 | if((pce_cd.acard_ctrl & 0x60) == 0x60) |
| 1430 | { |
| 1431 | pce_cd.acard_base_addr += pce_cd.acard_addr_offset; |
| 1432 | pce_cd.acard_base_addr &= 0xffffff; |
| 1433 | } |
| 1434 | break; |
| 1401 | 1435 | } |
| 1402 | 1436 | } |
| 1403 | 1437 | } |