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r8963 Monday 30th August, 2010 at 21:14:47 UTC by Nathan Woods
Updated to MAME 0.139u2 core (need to fix mk1)

[docs]	messnew.txt
[src/emu]	addrmap.c addrmap.h delegate.c delegate.h devintrf.c devintrf.h devlegcy.c diexec.c dimemory.c disound.c emucore.h machine.h mconfig.c memory.c memory.h profiler.c profiler.h sound.c validity.c video.c video.h
[src/emu/cpu/dsp56k]	dsp56dsm.c dsp56k.c inst.c inst.h opcode.h pmove.c pmove.h tables.c tables.h
[src/emu/cpu/hcd62121]	hcd62121.c hcd62121_ops.h
[src/emu/cpu/m6800]	m6800.c
[src/emu/cpu/m68000]	m68kcpu.c
[src/emu/cpu/m6809]	m6809.c
[src/emu/cpu/sm8500]	sm8500.c
[src/emu/cpu/v60]	v60.c
[src/emu/machine]	6522via.c 6522via.h 6526cia.c 6532riot.c 6821pia.c 6840ptm.c 6850acia.c 74123.c 7474.c 7474.h 8237dma.c 8237dma.h 8255ppi.c 8255ppi.h 8257dma.c 8257dma.h devhelpr.h ds1302.c ds1302.h ds2404.c ds2404.h eeprom.c f3853.c f3853.h i2cmem.c i8243.c i8243.h ins8154.c ins8154.h k033906.c k033906.h k056230.c k056230.h pci.c pci.h timekpr.c timekpr.h z80dart.c
[src/emu/sound]	bsmt2000.c k053260.c
[src/lib/util]	astring.h
[src/mame]	mame.mak mamedriv.c
[src/mame/audio]	8080bw.c cage.c cage.h dcs.c gottlieb.c harddriv.c leland.c mario.c segasnd.c seibu.c snk6502.c williams.c
[src/mame/drivers]	20pacgal.c 39in1.c ace.c aleck64.c alg.c alpha68k.c appoooh.c arabian.c aristmk4.c aristmk5.c artmagic.c asterix.c asteroid.c astrocde.c atarig42.c atarigt.c atarisy2.c atarisy4.c attckufo.c badlands.c bagman.c balsente.c bbusters.c beathead.c berzerk.c bfcobra.c bigfghtr.c btime.c btoads.c bwidow.c bzone.c cabal.c calchase.c calomega.c calorie.c cdi.c centiped.c chihiro.c cojag.c combatsc.c commando.c coolpool.c coolridr.c cps1.c cps2.c cps3.c crbaloon.c crospang.c crshrace.c crystal.c cshooter.c cvs.c darkmist.c ddayjlc.c ddenlovr.c dec8.c deco32.c decocass.c dkong.c dooyong.c enigma2.c eolithsp.c ertictac.c exidy.c exterm.c fastlane.c firetrap.c flstory.c freekick.c funworld.c galaga.c galaxia.c galaxian.c galpani2.c gamecstl.c gameplan.c gauntlet.c gei.c goldnpkr.c goldstar.c guab.c harddriv.c hng64.c homedata.c hotstuff.c* hshavoc.c hyprduel.c igs011.c itech32.c itech8.c itgamble.c jack.c jalmah.c jangou.c karnov.c kchamp.c kinst.c konamigx.c konamim2.c kyugo.c ladybug.c laserbat.c leland.c lethal.c liberate.c littlerb.c lockon.c m10.c m72.c magictg.c mainsnk.c malzak.c mappy.c mario.c mediagx.c megadriv.c megadrvb.c* metalmx.c metro.c mhavoc.c mikie.c mil4000.c missile.c mitchell.c model2.c model3.c moo.c mouser.c mpu4drvr.c mrflea.c multigam.c namcona1.c namcops2.c namcos1.c namcos11.c namcos12.c namcos21.c namcos22.c namcos23.c naomi.c nbmj9195.c neodrvr.c neogeo.c ninjakd2.c niyanpai.c norautp.c nycaptor.c nyny.c offtwall.c omegrace.c pachifev.c pacman.c pcat_dyn.c pcktgal.c pcxt.c pengo.c photoply.c pinkiri8.c playmark.c plygonet.c polepos.c policetr.c prehisle.c progolf.c pturn.c qix.c quantum.c quasar.c quizpun2.c r2dtank.c raiden.c raiden2.c realbrk.c renegade.c safarir.c savquest.c* seattle.c segae.c segag80r.c segag80v.c segahang.c segamsys.c segaorun.c segas16a.c segas16b.c segas18.c segas24.c segas32.c segaxbd.c segaybd.c seibuspi.c seta.c seta2.c sf.c shaolins.c shootout.c skeetsht.c skimaxx.c slapfght.c snk.c snk6502.c snk68.c sothello.c spacefb.c speglsht.c spiders.c srmp5.c srumbler.c sshangha.c starwars.c statriv2.c stv.c suna16.c suna8.c supertnk.c suprnova.c system1.c system16.c taito_l.c taito_x.c taitogn.c taitojc.c taitowlf.c tcl.c tecmo.c tempest.c thunderj.c tiamc1.c tickee.c tigeroad.c tmnt.c toaplan1.c toaplan2.c toki.c tomcat.c trackfld.c turrett.c twinkle.c tx1.c vamphalf.c vcombat.c vegas.c vendetta.c vp101.c wardner.c wecleman.c williams.c wiz.c wwfwfest.c xtheball.c yunsun16.c zac2650.c zaxxon.c
[src/mame/includes]	archimds.h artmagic.h atarigt.h bbusters.h* beathead.h btoads.h dooyong.h eolithsp.h exterm.h gaelcrpt.h galaxian.h harddriv.h hng64.h jpmimpct.h karnov.h mainsnk.h* midtunit.h midyunit.h model3.h ojankohs.h plygonet.h prehisle.h* segag80v.h segas24.h seta.h slapstic.h snk.h snk6502.h snk68.h* toaplan1.h toaplan2.h trackfld.h williams.h
[src/mame/machine]	archimds.c asic65.c atarigen.c bagman.c balsente.c cclimber.c cps2crpt.c deco102.c fd1089.c fddebug.c gaelcrpt.c galaxold.c harddriv.c irobot.c kaneko16.c konami1.c konamigx.c konppc.c mc8123.c mcr.c mhavoc.c micro3d.c midwayic.c midwayic.h midyunit.c model1.c namcos1.c namcos2.c pitnrun.c s16fd.c s24fd.c scramble.c segacrp2.c segacrpt.c segaic16.c segas24.c segas32.c seicop.c slapstic.c starwars.c stfight.c tait8741.c taitosj.c tatsumi.c tnzs.c toaplan1.c twincobr.c vsnes.c williams.c
[src/mame/video]	archimds.c armedf.c artmagic.c atarisy1.c avgdvg.c avgdvg.h bbusters.c beathead.c bionicc.c blktiger.c blstroid.c btoads.c buggychl.c cischeat.c combatsc.c commando.c cps1.c crshrace.c dogfgt.c dooyong.c dynduke.c exedexes.c exterm.c gaelco2.c galaxian.c genesis.c gng.c gp9001.c gp9001.h harddriv.c hng64.c homedata.c itech32.c itech8.c jpmimpct.c lastduel.c leland.c lwings.c mainsnk.c mcatadv.c midtunit.c midyunit.c model3.c namcos22.c ojankohs.c popeye.c ppu2c0x.c prehisle.c psikyosh.c redalert.c segag80v.c segas32.c shangha3.c sidearms.c simpsons.c skydiver.c snk.c snk6502.c snk68.c srumbler.c taito_b.c tia.c tigeroad.c toaplan1.c toaplan2.c trackfld.c twin16.c twincobr.c vertigo.c vrender0.c williams.c zac2650.c zaxxon.c
[src/mess]	mess.mak
[src/osd/sdl]	debugosx.m

src/mame/audio/cage.c

r8962	r8963
237	237	}
238	238
239	239
240		static void update_dma_state(const address_space *space)
	240	static void update_dma_state(address_space *space)
241	241	{
242	242	/* determine the new enabled state */
243	243	int enabled = ((tms32031_io_regs[DMA_GLOBAL_CTL] & 3) == 3) && (tms32031_io_regs[DMA_TRANSFER_COUNT] != 0);
r8962	r8963
260	260	inc = (tms32031_io_regs[DMA_GLOBAL_CTL] >> 4) & 1;
261	261	for (i = 0; i < tms32031_io_regs[DMA_TRANSFER_COUNT]; i++)
262	262	{
263		sound_data[i % STACK_SOUND_BUFSIZE] = memory_read_dword(space, addr * 4);
	263	sound_data[i % STACK_SOUND_BUFSIZE] = space->read_dword(addr * 4);
264	264	addr += inc;
265	265	if (i % STACK_SOUND_BUFSIZE == STACK_SOUND_BUFSIZE - 1)
266	266	dmadac_transfer(&dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
r8962	r8963
517	517	}
518	518
519	519
520		UINT16 main_from_cage_r(const address_space *space)
	520	UINT16 main_from_cage_r(address_space *space)
521	521	{
522	522	if (LOG_COMM)
523	523	logerror("%s:main read data = %04X\n", cpuexec_describe_context(space->machine), soundlatch_word_r(space, 0, 0));

src/mame/audio/cage.h

r8962	r8963
14	14	void cage_set_irq_handler(void (*irqhandler)(running_machine *, int));
15	15	void cage_reset_w(int state);
16	16
17		UINT16 main_from_cage_r(const address_space *space);
	17	UINT16 main_from_cage_r(address_space *space);
18	18	UINT16 cage_control_r(void);
19	19	void main_to_cage_w(UINT16 data);
20	20	void cage_control_w(running_machine *machine, UINT16 data);

src/mame/audio/segasnd.c

r8962	r8963
11	11
12	12	#include "emu.h"
13	13	#include "streams.h"
14		#include "includes/segag80v.h"
15	14	#include "cpu/mcs48/mcs48.h"
16	15	#include "sound/sp0250.h"
17	16	#include "segasnd.h"

src/mame/audio/leland.c

r8962	r8963
380	380
381	381	static STREAM_UPDATE( leland_80186_dma_update )
382	382	{
383		const address_space *dmaspace = (const address_space *)param;
	383	address_space *dmaspace = (address_space *)param;
384	384	stream_sample_t *buffer = outputs[0];
385	385	int i, j;
386	386
r8962	r8963
429	429	/* sample-rate convert to the output frequency */
430	430	for (j = 0; j < samples && count > 0; j++)
431	431	{
432		buffer[j] += ((int)memory_read_byte(dmaspace, source) - 0x80) * volume;
	432	buffer[j] += ((int)dmaspace->read_byte(source) - 0x80) * volume;
433	433	frac += step;
434	434	source += frac >> 24;
435	435	count -= frac >> 24;
r8962	r8963
514	514	static DEVICE_START( common_sh_start )
515	515	{
516	516	running_machine *machine = device->machine;
517		const address_space *dmaspace = cputag_get_address_space(machine, "audiocpu", AS_PROGRAM);
	517	address_space *dmaspace = cputag_get_address_space(machine, "audiocpu", AS_PROGRAM);
518	518	int i;
519	519
520	520	/* determine which sound hardware is installed */

src/mame/audio/seibu.c

r8962	r8963
104	104
105	105	void seibu_sound_decrypt(running_machine *machine,const char *cpu,int length)
106	106	{
107		const address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
	107	address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
108	108	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
109	109	UINT8 *rom = memory_region(machine, cpu);
110	110	int i;
111	111
112		memory_set_decrypted_region(space, 0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
	112	space->set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
113	113
114	114	for (i = 0;i < length;i++)
115	115	{

src/mame/audio/dcs.c

r8962	r8963
285	285	struct _dcs_state
286	286	{
287	287	cpu_device *cpu;
288		const address_space *program;
289		const address_space *data;
	288	address_space *program;
	289	address_space *data;
290	290	UINT8      rev;
291	291	offs_t      polling_offset;
292	292	UINT32      polling_count;
r8962	r8963
1778	1778	{
1779	1779	/* Road Burners: @ 28: JMP $0032  18032F, same code at $32 */
1780	1780
1781		if (memory_read_dword(dcs.program, 0x18*4) == 0x0c0030 &&      /* ENA SEC_REG */
1782		memory_read_dword(dcs.program, 0x19*4) == 0x804828 &&      /* SI = DM($0482) */
1783		memory_read_dword(dcs.program, 0x1a*4) == 0x904828 &&      /* DM($0482) = SI */
1784		memory_read_dword(dcs.program, 0x1b*4) == 0x0C0020 &&      /* DIS SEC_REG */
1785		memory_read_dword(dcs.program, 0x1c*4) == 0x0A001F)         /* RTI */
	1781	if (dcs.program->read_dword(0x18*4) == 0x0c0030 &&      /* ENA SEC_REG */
	1782	dcs.program->read_dword(0x19*4) == 0x804828 &&      /* SI = DM($0482) */
	1783	dcs.program->read_dword(0x1a*4) == 0x904828 &&      /* DM($0482) = SI */
	1784	dcs.program->read_dword(0x1b*4) == 0x0C0020 &&      /* DIS SEC_REG */
	1785	dcs.program->read_dword(0x1c*4) == 0x0A001F)         /* RTI */
1786	1786	{
1787	1787	dcs.timer_ignore = TRUE;
1788	1788	}
r8962	r8963
1952	1952
1953	1953	for (i = 0; i < count; i++)
1954	1954	{
1955		buffer[i] = memory_read_word(dcs.data, reg * 2);
	1955	buffer[i] = dcs.data->read_word(reg * 2);
1956	1956	reg += dcs.incs;
1957	1957	}
1958	1958
r8962	r8963
2252	2252	if (transfer.writes_left & 1)
2253	2253	transfer.temp = data;
2254	2254	else
2255		memory_write_dword(dcs.program, transfer.start++ * 4, (transfer.temp << 8) | (data & 0xff));
	2255	dcs.program->write_dword(transfer.start++ * 4, (transfer.temp << 8) | (data & 0xff));
2256	2256	}
2257	2257	else
2258		memory_write_word(dcs.data, transfer.start++ * 2, data);
	2258	dcs.data->write_word(transfer.start++ * 2, data);
2259	2259
2260	2260	/* if we're done, start a timer to send the response words */
2261	2261	if (transfer.state == 0)
r8962	r8963
2270	2270
2271	2271	static TIMER_CALLBACK( s2_ack_callback )
2272	2272	{
2273		const address_space *space = cpu_get_address_space(dcs.cpu, ADDRESS_SPACE_PROGRAM);
	2273	address_space *space = cpu_get_address_space(dcs.cpu, ADDRESS_SPACE_PROGRAM);
2274	2274
2275	2275	/* if the output is full, stall for a usec */
2276	2276	if (IS_OUTPUT_FULL())

src/mame/audio/gottlieb.c

r8962	r8963
42	42
43	43
44	44	static void gottlieb1_sh_w(running_device *riot, UINT8 data);
45		static void gottlieb2_sh_w(const address_space *space, UINT8 data);
	45	static void gottlieb2_sh_w(address_space *space, UINT8 data);
46	46	static void trigger_sample(running_device *samples, UINT8 data);
47	47
48	48
r8962	r8963
369	369	*
370	370	*************************************/
371	371
372		static void gottlieb2_sh_w(const address_space *space, UINT8 data)
	372	static void gottlieb2_sh_w(address_space *space, UINT8 data)
373	373	{
374	374	/* when data is not 0xff, the transparent latch at A3 allows it to pass through unmolested */
375	375	if (data != 0xff)

src/mame/audio/8080bw.c

r8962	r8963
908	908	static STATE_POSTLOAD( schaser_reinit_555_time_remain )
909	909	{
910	910	mw8080bw_state *state = machine->driver_data<mw8080bw_state>();
911		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	911	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
912	912	state->schaser_effect_555_time_remain = double_to_attotime(state->schaser_effect_555_time_remain_savable);
913	913	schaser_sh_port_2_w(space, 0, state->port_2_last_extra);
914	914	}
r8962	r8963
931	931	MACHINE_RESET( schaser_sh )
932	932	{
933	933	mw8080bw_state *state = machine->driver_data<mw8080bw_state>();
934		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	934	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
935	935
936	936	state->schaser_effect_555_is_low = 0;
937	937	timer_adjust_oneshot(state->schaser_effect_555_timer, attotime_never, 0);

src/mame/audio/snk6502.c

r8962	r8963
42	42	INT16   form[16];
43	43	} TONE;
44	44
45		static TONE tone_channels[CHANNELS];
46		static INT32 tone_clock_expire;
47		static INT32 tone_clock;
48		static sound_stream * tone_stream;
	45	typedef struct _snk6502_sound_state snk6502_sound_state;
	46	struct _snk6502_sound_state
	47	{
	48	TONE tone_channels[CHANNELS];
	49	INT32 tone_clock_expire;
	50	INT32 tone_clock;
	51	sound_stream * tone_stream;
49	52
50		static int Sound0StopOnRollover;
51		static UINT8 LastPort1;
	53	running_device *samples;
	54	UINT8 *ROM;
	55	int Sound0StopOnRollover;
	56	UINT8 LastPort1;
52	57
	58	int hd38880_cmd;
	59	UINT32 hd38880_addr;
	60	int hd38880_data_bytes;
	61	double hd38880_speed;
	62	};
53	63
54	64	static const char *const sasuke_sample_names[] =
55	65	{
r8962	r8963
372	382	DISCRETE_OUTPUT(NODE_23, 32760.0/12)
373	383	DISCRETE_SOUND_END
374	384
	385	INLINE snk6502_sound_state *get_safe_token( running_device *device )
	386	{
	387	assert(device != NULL);
	388	assert(device->type() == SOUND_SNK6502);
375	389
376		INLINE void validate_tone_channel(running_machine *machine, int channel)
	390	return (snk6502_sound_state *)downcast<legacy_device_base *>(device)->token();
	391	}
	392
	393	INLINE void validate_tone_channel(snk6502_sound_state *state, int channel)
377	394	{
	395	TONE *tone_channels = state->tone_channels;
	396
378	397	if (!tone_channels[channel].mute)
379	398	{
380		UINT8 *ROM = memory_region(machine, "snk6502");
381		UINT8 romdata = ROM[tone_channels[channel].base + tone_channels[channel].offset];
	399	UINT8 romdata = state->ROM[tone_channels[channel].base + tone_channels[channel].offset];
382	400
383	401	if (romdata != 0xff)
384	402	tone_channels[channel].sample_step = tone_channels[channel].sample_rate / (256 - romdata);
r8962	r8963
390	408	static STREAM_UPDATE( snk6502_tone_update )
391	409	{
392	410	stream_sample_t *buffer = outputs[0];
	411	snk6502_sound_state *state = get_safe_token(device);
	412	TONE *tone_channels = state->tone_channels;
393	413	int i;
394	414
395	415	for (i = 0; i < CHANNELS; i++)
396		validate_tone_channel(device->machine, i);
	416	validate_tone_channel(state, i);
397	417
398	418	while (samples-- > 0)
399	419	{
r8962	r8963
420	440
421	441	*buffer++ = data;
422	442
423		tone_clock += FRAC_ONE;
424		if (tone_clock >= tone_clock_expire)
	443	state->tone_clock += FRAC_ONE;
	444	if (state->tone_clock >= state->tone_clock_expire)
425	445	{
426	446	for (i = 0; i < CHANNELS; i++)
427	447	{
428	448	tone_channels[i].offset++;
429	449	tone_channels[i].offset &= tone_channels[i].mask;
430	450
431		validate_tone_channel(device->machine, i);
	451	validate_tone_channel(state, i);
432	452	}
433	453
434		if (tone_channels[0].offset == 0 && Sound0StopOnRollover)
	454	if (tone_channels[0].offset == 0 && state->Sound0StopOnRollover)
435	455	tone_channels[0].mute = 1;
436	456
437		tone_clock -= tone_clock_expire;
	457	state->tone_clock -= state->tone_clock_expire;
438	458	}
439	459
440	460	}
441	461	}
442	462
443	463
444		static void sasuke_build_waveform(int mask)
	464	static void sasuke_build_waveform(snk6502_sound_state *state, int mask)
445	465	{
	466	TONE *tone_channels = state->tone_channels;
446	467	int bit0, bit1, bit2, bit3;
447	468	int base;
448	469	int i;
r8962	r8963
483	504	tone_channels[0].form[i] *= 65535 / 16;
484	505	}
485	506
486		static void satansat_build_waveform(int mask)
	507	static void satansat_build_waveform(snk6502_sound_state *state, int mask)
487	508	{
	509	TONE *tone_channels = state->tone_channels;
488	510	int bit0, bit1, bit2, bit3;
489	511	int base;
490	512	int i;
r8962	r8963
521	543	tone_channels[1].form[i] *= 65535 / 16;
522	544	}
523	545
524		static void build_waveform(int channel, int mask)
	546	static void build_waveform(snk6502_sound_state *state, int channel, int mask)
525	547	{
	548	TONE *tone_channels = state->tone_channels;
526	549	int bit0, bit1, bit2, bit3;
527	550	int base;
528	551	int i;
r8962	r8963
596	619	tone_channels[channel].form[i] *= 65535 / 160;
597	620	}
598	621
599		void snk6502_set_music_freq(int freq)
	622	void snk6502_set_music_freq(running_machine *machine, int freq)
600	623	{
	624	running_device *device = machine->device("snk6502");
	625	snk6502_sound_state *state = get_safe_token(device);
	626	TONE *tone_channels = state->tone_channels;
	627
601	628	int i;
602	629
603	630	for (i = 0; i < CHANNELS; i++)
r8962	r8963
610	637	tone_channels[i].sample_cur = 0;
611	638	tone_channels[i].sample_rate = (double)(freq * 8) / SAMPLE_RATE * FRAC_ONE;
612	639
613		build_waveform(i, 1);
	640	build_waveform(state, i, 1);
614	641	}
615	642	}
616	643
617		void snk6502_set_music_clock(double clock_time)
	644	void snk6502_set_music_clock(running_machine *machine, double clock_time)
618	645	{
619		tone_clock_expire = clock_time * SAMPLE_RATE * FRAC_ONE;
620		tone_clock = 0;
	646	running_device *device = machine->device("snk6502");
	647	snk6502_sound_state *state = get_safe_token(device);
	648
	649	state->tone_clock_expire = clock_time * SAMPLE_RATE * FRAC_ONE;
	650	state->tone_clock = 0;
621	651	}
622	652
623	653	static DEVICE_START( snk6502_sound )
624	654	{
	655	snk6502_sound_state *state = get_safe_token(device);
	656
	657	state->samples = device->machine->device("samples");
	658	state->ROM = memory_region(device->machine, "snk6502");
	659
625	660	// adjusted
626		snk6502_set_music_freq(43000);
	661	snk6502_set_music_freq(device->machine, 43000);
627	662
628	663	// 38.99 Hz update (according to schematic)
629		snk6502_set_music_clock(M_LN2 * (RES_K(18) * 2 + RES_K(1)) * CAP_U(1));
	664	snk6502_set_music_clock(device->machine, M_LN2 * (RES_K(18) * 2 + RES_K(1)) * CAP_U(1));
630	665
631		tone_stream = stream_create(device, 0, 1, SAMPLE_RATE, NULL, snk6502_tone_update);
	666	state->tone_stream = stream_create(device, 0, 1, SAMPLE_RATE, NULL, snk6502_tone_update);
632	667	}
633	668
634	669	DEVICE_GET_INFO( snk6502_sound )
635	670	{
636	671	switch (state)
637	672	{
	673	/* --- the following bits of info are returned as 64-bit signed integers --- */
	674	case DEVINFO_INT_TOKEN_BYTES:               info->i = sizeof(snk6502_sound_state);         break;
	675
638	676	/* --- the following bits of info are returned as pointers to data or functions --- */
639	677	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(snk6502_sound);   break;
640	678
r8962	r8963
644	682	}
645	683	}
646	684
647		int snk6502_music0_playing(void)
	685	int snk6502_music0_playing(running_machine *machine)
648	686	{
	687	running_device *device = machine->device("snk6502");
	688	snk6502_sound_state *state = get_safe_token(device);
	689	TONE *tone_channels = state->tone_channels;
	690
649	691	return tone_channels[0].mute;
650	692	}
651	693
652	694
653	695	WRITE8_HANDLER( sasuke_sound_w )
654	696	{
655		running_device *samples = space->machine->device("samples");
	697	running_device *device = space->machine->device("snk6502");
	698	snk6502_sound_state *state = get_safe_token(device);
	699	running_device *samples = state->samples;
	700	TONE *tone_channels = state->tone_channels;
	701
656	702	switch (offset)
657	703	{
658	704	case 0:
r8962	r8963
669	715	7   reset counter
670	716	*/
671	717
672		if ((~data & 0x01) && (LastPort1 & 0x01))
	718	if ((~data & 0x01) && (state->LastPort1 & 0x01))
673	719	sample_start(samples, 0, 0, 0);
674		if ((~data & 0x02) && (LastPort1 & 0x02))
	720	if ((~data & 0x02) && (state->LastPort1 & 0x02))
675	721	sample_start(samples, 1, 1, 0);
676		if ((~data & 0x04) && (LastPort1 & 0x04))
	722	if ((~data & 0x04) && (state->LastPort1 & 0x04))
677	723	sample_start(samples, 2, 2, 0);
678		if ((~data & 0x08) && (LastPort1 & 0x08))
	724	if ((~data & 0x08) && (state->LastPort1 & 0x08))
679	725	sample_start(samples, 3, 3, 0);
680	726
681		if ((data & 0x80) && (~LastPort1 & 0x80))
	727	if ((data & 0x80) && (~state->LastPort1 & 0x80))
682	728	{
683	729	tone_channels[0].offset = 0;
684	730	tone_channels[0].mute = 0;
685	731	}
686	732
687		if ((~data & 0x80) && (LastPort1 & 0x80))
	733	if ((~data & 0x80) && (state->LastPort1 & 0x80))
688	734	tone_channels[0].mute = 1;
689	735
690		LastPort1 = data;
	736	state->LastPort1 = data;
691	737	break;
692	738
693	739	case 1:
r8962	r8963
708	754	tone_channels[0].base = 0x0000 + ((data & 0x70) << 4);
709	755	tone_channels[0].mask = 0xff;
710	756
711		Sound0StopOnRollover = 1;
	757	state->Sound0StopOnRollover = 1;
712	758
713	759	/* bit 1-3 sound0 waveform control */
714		sasuke_build_waveform((data & 0x0e) >> 1);
	760	sasuke_build_waveform(state, (data & 0x0e) >> 1);
715	761	break;
716	762	}
717	763	}
718	764
719	765	WRITE8_HANDLER( satansat_sound_w )
720	766	{
721		running_device *samples = space->machine->device("samples");
	767	running_device *device = space->machine->device("snk6502");
	768	snk6502_sound_state *state = get_safe_token(device);
	769	running_device *samples = state->samples;
	770	TONE *tone_channels = state->tone_channels;
	771
722	772	switch (offset)
723	773	{
724	774	case 0:
r8962	r8963
732	782	/* bit 1 = to 76477 */
733	783
734	784	/* bit 2 = analog sound trigger */
735		if (data & 0x04 && !(LastPort1 & 0x04))
	785	if (data & 0x04 && !(state->LastPort1 & 0x04))
736	786	sample_start(samples, 0, 1, 0);
737	787
738	788	if (data & 0x08)
r8962	r8963
742	792	}
743	793
744	794	/* bit 4-6 sound0 waveform control */
745		sasuke_build_waveform((data & 0x70) >> 4);
	795	sasuke_build_waveform(state, (data & 0x70) >> 4);
746	796
747	797	/* bit 7 sound1 waveform control */
748		satansat_build_waveform((data & 0x80) >> 7);
	798	satansat_build_waveform(state, (data & 0x80) >> 7);
749	799
750		LastPort1 = data;
	800	state->LastPort1 = data;
751	801	break;
752	802	case 1:
753	803	/*
r8962	r8963
761	811	tone_channels[1].base = 0x0800 + ((data & 0x60) << 4);
762	812	tone_channels[1].mask = 0x1ff;
763	813
764		Sound0StopOnRollover = 1;
	814	state->Sound0StopOnRollover = 1;
765	815
766	816	if (data & 0x01)
767	817	tone_channels[0].mute = 0;
r8962	r8963
781	831
782	832	WRITE8_HANDLER( vanguard_sound_w )
783	833	{
784		running_device *samples = space->machine->device("samples");
	834	running_device *device = space->machine->device("snk6502");
	835	snk6502_sound_state *state = get_safe_token(device);
	836	running_device *samples = state->samples;
	837	TONE *tone_channels = state->tone_channels;
	838
785	839	switch (offset)
786	840	{
787	841	case 0:
r8962	r8963
802	856	tone_channels[0].base = ((data & 0x07) << 8);
803	857	tone_channels[0].mask = 0xff;
804	858
805		Sound0StopOnRollover = 1;
	859	state->Sound0StopOnRollover = 1;
806	860
807	861	/* play noise samples requested by sound command byte */
808	862	/* SHOT A */
809		if (data & 0x20 && !(LastPort1 & 0x20))
	863	if (data & 0x20 && !(state->LastPort1 & 0x20))
810	864	sample_start(samples, 1, 0, 0);
811		else if (!(data & 0x20) && LastPort1 & 0x20)
	865	else if (!(data & 0x20) && state->LastPort1 & 0x20)
812	866	sample_stop(samples, 1);
813	867
814	868	/* BOMB */
815		if (data & 0x80 && !(LastPort1 & 0x80))
	869	if (data & 0x80 && !(state->LastPort1 & 0x80))
816	870	sample_start(samples, 2, 1, 0);
817	871
818	872	if (data & 0x08)
r8962	r8963
829	883	/* SHOT B */
830	884	sn76477_enable_w(space->machine->device("sn76477.2"), (data & 0x40) ? 0 : 1);
831	885
832		LastPort1 = data;
	886	state->LastPort1 = data;
833	887	break;
834	888	case 1:
835	889	/*
r8962	r8963
871	925	7   AS 8    (sound1 waveform)
872	926	*/
873	927
874		build_waveform(0, (data & 0x3) | ((data & 4) << 1) | ((data & 8) >> 1));
875		build_waveform(1, data >> 4);
	928	build_waveform(state, 0, (data & 0x3) | ((data & 4) << 1) | ((data & 8) >> 1));
	929	build_waveform(state, 1, data >> 4);
876	930	}
877	931	}
878	932
879	933	WRITE8_HANDLER( fantasy_sound_w )
880	934	{
	935	running_device *device = space->machine->device("snk6502");
	936	snk6502_sound_state *state = get_safe_token(device);
	937	TONE *tone_channels = state->tone_channels;
	938
881	939	switch (offset)
882	940	{
883	941	case 0:
r8962	r8963
898	956	tone_channels[0].base = 0x0000 + ((data & 0x07) << 8);
899	957	tone_channels[0].mask = 0xff;
900	958
901		Sound0StopOnRollover = 0;
	959	state->Sound0StopOnRollover = 0;
902	960
903	961	if (data & 0x08)
904	962	tone_channels[0].mute = 0;
r8962	r8963
919	977	/* BOMB */
920	978	discrete_sound_w(space->machine->device("discrete"), FANTASY_BOMB_EN, data & 0x80);
921	979
922		LastPort1 = data;
	980	state->LastPort1 = data;
923	981	break;
924	982	case 1:
925	983	/*
r8962	r8963
961	1019	7   AS 8    (sound1 waveform)
962	1020	*/
963	1021
964		build_waveform(0, (data & 0x9) | ((data & 2) << 1) | ((data & 4) >> 1));
965		build_waveform(1, data >> 4);
	1022	build_waveform(state, 0, (data & 0x9) | ((data & 2) << 1) | ((data & 4) >> 1));
	1023	build_waveform(state, 1, data >> 4);
966	1024	break;
967	1025	case 3:
968	1026	/*
r8962	r8963
1012	1070	#define HD38880_CMV   0x20
1013	1071	#define HD68880_SYBS   0x0f
1014	1072
1015		static int   hd38880_cmd;
1016		static UINT32   hd38880_addr;
1017		static int   hd38880_data_bytes;
1018		static double   hd38880_speed;
1019	1073
1020
1021	1074	static void snk6502_speech_w(running_machine *machine, UINT8 data, const UINT16 *table, int start)
1022	1075	{
1023	1076	/*
r8962	r8963
1032	1085	7
1033	1086	*/
1034	1087
	1088	running_device *device = machine->device("snk6502");
	1089	snk6502_sound_state *state = get_safe_token(device);
	1090	running_device *samples = state->samples;
	1091
1035	1092	if ((data & HD38880_CTP) && (data & HD38880_CMV))
1036	1093	{
1037		running_device *samples = machine->device("samples");
1038	1094	data &= HD68880_SYBS;
1039	1095
1040		switch (hd38880_cmd)
	1096	switch (state->hd38880_cmd)
1041	1097	{
1042	1098	case 0:
1043	1099	switch (data)
r8962	r8963
1045	1101	case HD38880_START:
1046	1102	logerror("speech: START\n");
1047	1103
1048		if (hd38880_data_bytes == 5 && !sample_playing(samples, 0))
	1104	if (state->hd38880_data_bytes == 5 && !sample_playing(samples, 0))
1049	1105	{
1050	1106	int i;
1051	1107
1052	1108	for (i = 0; i < 16; i++)
1053	1109	{
1054		if (table[i] && table[i] == hd38880_addr)
	1110	if (table[i] && table[i] == state->hd38880_addr)
1055	1111	{
1056		running_device *samples = machine->device("samples");
1057	1112	sample_start(samples, 0, start + i, 0);
1058	1113	break;
1059	1114	}
r8962	r8963
1071	1126	break;
1072	1127
1073	1128	case HD38880_SYSPD:
1074		hd38880_cmd = data;
	1129	state->hd38880_cmd = data;
1075	1130	break;
1076	1131
1077	1132	case HD38880_CONDT:
r8962	r8963
1079	1134	break;
1080	1135
1081	1136	case HD38880_ADSET:
1082		hd38880_cmd = data;
1083		hd38880_addr = 0;
1084		hd38880_data_bytes = 0;
	1137	state->hd38880_cmd = data;
	1138	state->hd38880_addr = 0;
	1139	state->hd38880_data_bytes = 0;
1085	1140	break;
1086	1141
1087	1142	case HD38880_READ:
r8962	r8963
1089	1144	break;
1090	1145
1091	1146	case HD38880_INT1:
1092		hd38880_cmd = data;
	1147	state->hd38880_cmd = data;
1093	1148	break;
1094	1149
1095	1150	case HD38880_INT2:
1096		hd38880_cmd = data;
	1151	state->hd38880_cmd = data;
1097	1152	break;
1098	1153
1099	1154	case 0:
r8962	r8963
1118	1173	if ((data & 2) && (data & 8))
1119	1174	logerror("speech:   use external pitch control\n");
1120	1175
1121		hd38880_cmd = 0;
	1176	state->hd38880_cmd = 0;
1122	1177	break;
1123	1178
1124	1179	case HD38880_INT2:
r8962	r8963
1129	1184	logerror("speech:   %sable repeat\n", data & 2 ? "en" : "dis");
1130	1185	logerror("speech:   %d operations\n", ((data & 8) == 0) || (data & 1) ? 10 : 8);
1131	1186
1132		hd38880_cmd = 0;
	1187	state->hd38880_cmd = 0;
1133	1188	break;
1134	1189
1135	1190	case HD38880_SYSPD:
1136		hd38880_speed = ((double)(data + 1)) / 10.0;
1137		logerror("speech: SYSPD: %1.1f\n", hd38880_speed);
1138		hd38880_cmd = 0;
	1191	state->hd38880_speed = ((double)(data + 1)) / 10.0;
	1192	logerror("speech: SYSPD: %1.1f\n", state->hd38880_speed);
	1193	state->hd38880_cmd = 0;
1139	1194	break;
1140	1195
1141	1196	case HD38880_ADSET:
1142		hd38880_addr |= (data << (hd38880_data_bytes++ * 4));
1143		if (hd38880_data_bytes == 5)
	1197	state->hd38880_addr |= (data << (state->hd38880_data_bytes++ * 4));
	1198	if (state->hd38880_data_bytes == 5)
1144	1199	{
1145		logerror("speech: ADSET: 0x%05x\n", hd38880_addr);
1146		hd38880_cmd = 0;
	1200	logerror("speech: ADSET: 0x%05x\n", state->hd38880_addr);
	1201	state->hd38880_cmd = 0;
1147	1202	}
1148	1203	break;
1149	1204	}

src/mame/audio/harddriv.c

r8962	r8963
242	242	READ16_HANDLER( hdsnd68k_320ports_r )
243	243	{
244	244	harddriv_state *state = space->machine->driver_data<harddriv_state>();
245		const address_space *iospace = cpu_get_address_space(state->sounddsp, ADDRESS_SPACE_IO);
246		return memory_read_word(iospace, (offset & 7) << 1);
	245	address_space *iospace = cpu_get_address_space(state->sounddsp, ADDRESS_SPACE_IO);
	246	return iospace->read_word((offset & 7) << 1);
247	247	}
248	248
249	249
250	250	WRITE16_HANDLER( hdsnd68k_320ports_w )
251	251	{
252	252	harddriv_state *state = space->machine->driver_data<harddriv_state>();
253		const address_space *iospace = cpu_get_address_space(state->sounddsp, ADDRESS_SPACE_IO);
254		memory_write_word(iospace, (offset & 7) << 1, data);
	253	address_space *iospace = cpu_get_address_space(state->sounddsp, ADDRESS_SPACE_IO);
	254	iospace->write_word((offset & 7) << 1, data);
255	255	}
256	256
257	257

src/mame/audio/williams.c

r8962	r8963
486	486
487	487	void williams_cvsd_reset_w(int state)
488	488	{
489		const address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
	489	address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
490	490
491	491	/* going high halts the CPU */
492	492	if (state)
r8962	r8963
581	581
582	582	void williams_narc_data_w(int data)
583	583	{
584		const address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
	584	address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
585	585
586	586	soundlatch_w(space, 0, data & 0xff);
587	587	cpu_set_input_line(sound_cpu, INPUT_LINE_NMI, (data & 0x100) ? CLEAR_LINE : ASSERT_LINE);
r8962	r8963
598	598	/* going high halts the CPU */
599	599	if (state)
600	600	{
601		const address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
	601	address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
602	602	narc_master_bank_select_w(space, 0, 0);
603	603	narc_slave_bank_select_w(space, 0, 0);
604	604	init_audio_state(space->machine);
r8962	r8963
668	668
669	669	void williams_adpcm_data_w(int data)
670	670	{
671		const address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
	671	address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
672	672	soundlatch_w(space, 0, data & 0xff);
673	673	if (!(data & 0x200))
674	674	{
r8962	r8963
684	684	/* going high halts the CPU */
685	685	if (state)
686	686	{
687		const address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
	687	address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
688	688	adpcm_bank_select_w(space, 0, 0);
689	689	init_audio_state(space->machine);
690	690	cpu_set_input_line(sound_cpu, INPUT_LINE_RESET, ASSERT_LINE);

src/mame/audio/mario.c

r8962	r8963
448	448	*
449	449	****************************************************************/
450	450
451		static void set_ea(const address_space *space, int ea)
	451	static void set_ea(address_space *space, int ea)
452	452	{
453	453	mario_state   *state = space->machine->driver_data<mario_state>();
454	454	//printf("ea: %d\n", ea);
r8962	r8963
489	489	static SOUND_RESET( mario )
490	490	{
491	491	mario_state   *state = machine->driver_data<mario_state>();
492		const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	492	address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
493	493
494	494	#if USE_8039
495	495	set_ea(machine, 1);

src/mame/machine/micro3d.c

r8962	r8963
746	746	DRIVER_INIT( micro3d )
747	747	{
748	748	micro3d_state *state = machine->driver_data<micro3d_state>();
749		const address_space *space = cputag_get_address_space(machine, "drmath", ADDRESS_SPACE_DATA);
	749	address_space *space = cputag_get_address_space(machine, "drmath", ADDRESS_SPACE_DATA);
750	750
751	751	i8051_set_serial_tx_callback(machine->device("audiocpu"), data_from_i8031);
752	752	i8051_set_serial_rx_callback(machine->device("audiocpu"), data_to_i8031);
r8962	r8963
755	755
756	756	/* The Am29000 program seems to rely on RAM from 0x00470000 onwards being
757	757	non-zero on a reset, otherwise the 3D object data doesn't get uploaded! */
758		memory_write_dword(space, 0x00470000, 0xa5a5a5a5);
	758	space->write_dword(0x00470000, 0xa5a5a5a5);
759	759
760	760	state->mc68901.timer_a = timer_alloc(machine, mfp_timer_a_cb, NULL);
761	761
r8962	r8963
767	767
768	768	DRIVER_INIT( botssa )
769	769	{
770		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	770	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
771	771
772	772	/* Required to pass the hardware version check */
773	773	memory_install_read16_handler(space, 0x140000, 0x140001, 0, 0, botssa_140000_r );

src/mame/machine/segacrp2.c

r8962	r8963
60	60	};
61	61
62	62
63		const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
	63	address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
64	64	UINT8 *rom = memory_region(machine, cputag);
65	65	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x8000);
66	66
67		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypted);
	67	space->set_decrypted_region(0x0000, 0x7fff, decrypted);
68	68
69	69
70	70	for (A = 0x0000;A < 0x8000;A++)

src/mame/machine/fd1089.c

r8962	r8963
404	404
405	405	static void sys16_decrypt(running_machine *machine, const UINT8 *key,int cputype)
406	406	{
407		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	407	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
408	408	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
409	409	int size = memory_region_length(machine, "maincpu");
410	410	int A;
411	411	decrypted = auto_alloc_array(machine, UINT16, size/2);
412	412
413	413	machine->add_notifier(MACHINE_NOTIFY_EXIT, clear_decrypted);
414		memory_set_decrypted_region(space, 0x000000, size - 1, decrypted);
	414	space->set_decrypted_region(0x000000, size - 1, decrypted);
415	415
416	416	for (A = 0;A < size;A+=2)
417	417	{

src/mame/machine/s16fd.c

r8962	r8963
45	45	if (fd1094_set_decrypted != NULL)
46	46	(*fd1094_set_decrypted)(machine, (UINT8 *)fd1094_userregion);
47	47	else
48		memory_set_decrypted_region(cputag_get_address_space(machine, fd1094_cputag, ADDRESS_SPACE_PROGRAM), 0, fd1094_cpuregionsize - 1, fd1094_userregion);
	48	machine->device<cpu_device>(fd1094_cputag)->space(AS_PROGRAM)->set_decrypted_region(0, fd1094_cpuregionsize - 1, fd1094_userregion);
49	49	}
50	50
51	51	/* this function checks the cache to see if the current state is cached,

src/mame/machine/asic65.c

r8962	r8963
144	144
145	145	void asic65_reset(running_machine *machine, int state)
146	146	{
147		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	147	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
148	148
149	149	/* rom-based means reset and clear states */
150	150	if (asic65.cpu != NULL)

src/mame/machine/tnzs.c

r8962	r8963
667	667	static STATE_POSTLOAD( tnzs_postload )
668	668	{
669	669	tnzs_state *state = machine->driver_data<tnzs_state>();
670		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	670	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
671	671
672	672	memory_set_bank(machine, "bank1", state->bank1);
673	673	memory_set_bank(machine, "bank2", state->bank2);

src/mame/machine/midyunit.c

r8962	r8963
95	95	{
96	96	if (data == 0x500)
97	97	{
98		prot_result = memory_read_word(space, TOBYTE(0x10a4390)) << 4;
	98	prot_result = space->read_word(TOBYTE(0x10a4390)) << 4;
99	99	logerror("  desired result = %04X\n", prot_result);
100	100	}
101	101	}

src/mame/machine/segas32.c

r8962	r8963
36	36	static void nec_v25_cpu_decrypt(running_machine *machine)
37	37	{
38	38	int i;
39		const address_space *space = cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM);
	39	address_space *space = cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM);
40	40	UINT8 *rom = memory_region(machine, "mcu");
41		UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x100000);
	41	UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x10000);
42	42	UINT8* temp = auto_alloc_array(machine, UINT8, 0x100000);
43	43
44	44	// set CPU3 opcode base
45		memory_set_decrypted_region(space, 0x00000, 0xfffff, decrypted);
	45	space->set_decrypted_region(0x00000, 0x0ffff, decrypted);
	46	space->set_decrypted_region(0xf0000, 0xfffff, decrypted);
46	47
47	48	// make copy of ROM so original can be overwritten
48	49	memcpy(temp, rom, 0x10000);
r8962	r8963
58	59	decrypted[i] = ga2_v25_opcode_table[ temp[j] ];
59	60	}
60	61
61		memcpy(rom+0xf0000, rom, 0x10000);
62		memcpy(decrypted+0xf0000, decrypted, 0x10000);
63
64	62	auto_free(machine, temp);
65	63	}
66	64
r8962	r8963
228	226
229	227	void darkedge_fd1149_vblank(running_device *device)
230	228	{
231		const address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
	229	address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
232	230
233		memory_write_word(space, 0x20f072, 0);
234		memory_write_word(space, 0x20f082, 0);
	231	space->write_word(0x20f072, 0);
	232	space->write_word(0x20f082, 0);
235	233
236		if( memory_read_byte(space, 0x20a12c) != 0 )
	234	if( space->read_byte(0x20a12c) != 0 )
237	235	{
238		memory_write_byte(space, 0x20a12c, memory_read_byte(space, 0x20a12c)-1 );
	236	space->write_byte(0x20a12c, space->read_byte(0x20a12c)-1 );
239	237
240		if( memory_read_byte(space, 0x20a12c) == 0 )
241		memory_write_byte(space, 0x20a12e, 1);
	238	if( space->read_byte(0x20a12c) == 0 )
	239	space->write_byte(0x20a12e, 1);
242	240	}
243	241	}
244	242
r8962	r8963
267	265
268	266	WRITE16_HANDLER( dbzvrvs_protection_w )
269	267	{
270		memory_write_word( space, 0x2080c8, memory_read_word( space, 0x200044 ) );
	268	space->write_word( 0x2080c8, space->read_word( 0x200044 ) );
271	269	}
272	270
273	271
r8962	r8963
331	329	// Map team browser selection to opponent browser selection
332	330	// using same lookup table that V60 uses for sound sample mapping.
333	331	case 0:
334		memory_write_byte( space, 0x20f708, memory_read_word( space, 0x7bbc0 + data*2 ) );
	332	space->write_byte( 0x20f708, space->read_word( 0x7bbc0 + data*2 ) );
335	333	break;
336	334
337	335	// move on to team browser
338	336	case 4/2:
339		memory_write_byte( space, 0x200016, data & 0xff );
	337	space->write_byte( 0x200016, data & 0xff );
340	338	break;
341	339
342	340	default:

src/mame/machine/mhavoc.c

r8962	r8963
5	5	***************************************************************************/
6	6
7	7	#include "emu.h"
8		#include "video/avgdvg.h"
9	8	#include "sound/tms5220.h"
10	9	#include "cpu/m6502/m6502.h"
11	10	#include "includes/mhavoc.h"
r8962	r8963
101	100
102	101	MACHINE_RESET( mhavoc )
103	102	{
104		const address_space *space = cputag_get_address_space(machine, "alpha", ADDRESS_SPACE_PROGRAM);
	103	address_space *space = cputag_get_address_space(machine, "alpha", ADDRESS_SPACE_PROGRAM);
105	104	has_gamma_cpu = (machine->device("gamma") != NULL);
106	105
107	106	memory_configure_bank(machine, "bank1", 0, 1, mhavoc_zram0, 0);

src/mame/machine/twincobr.c

r8962	r8963
67	67	{
68	68	/* DSP can read data from main CPU RAM via DSP IO port 1 */
69	69
70		const address_space *mainspace;
	70	address_space *mainspace;
71	71	UINT16 input_data = 0;
72	72	switch (main_ram_seg) {
73	73	case 0x30000:
74	74	case 0x40000:
75	75	case 0x50000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
76		input_data = memory_read_word(mainspace, main_ram_seg + dsp_addr_w);
	76	input_data = mainspace->read_word(main_ram_seg + dsp_addr_w);
77	77	break;
78	78	default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
79	79	}
r8962	r8963
83	83
84	84	WRITE16_HANDLER( twincobr_dsp_w )
85	85	{
86		const address_space *mainspace;
	86	address_space *mainspace;
87	87
88	88	/* Data written to main CPU RAM via DSP IO port 1 */
89	89	dsp_execute = 0;
r8962	r8963
91	91	case 0x30000:   if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
92	92	case 0x40000:
93	93	case 0x50000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
94		memory_write_word(mainspace, main_ram_seg + dsp_addr_w, data);
	94	mainspace->write_word(main_ram_seg + dsp_addr_w, data);
95	95	break;
96	96	default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
97	97	}
r8962	r8963
117	117	{
118	118	/* DSP can read data from main CPU RAM via DSP IO port 1 */
119	119
120		const address_space *mainspace;
	120	address_space *mainspace;
121	121	UINT16 input_data = 0;
122	122	switch (main_ram_seg) {
123	123	case 0x7000:
124	124	case 0x8000:
125	125	case 0xa000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
126		input_data =  memory_read_byte(mainspace, main_ram_seg + (dsp_addr_w + 0))
127		| (memory_read_byte(mainspace, main_ram_seg + (dsp_addr_w + 1)) << 8);
	126	input_data =  mainspace->read_byte(main_ram_seg + (dsp_addr_w + 0))
	127	| (mainspace->read_byte(main_ram_seg + (dsp_addr_w + 1)) << 8);
128	128	break;
129	129	default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
130	130	}
r8962	r8963
134	134
135	135	WRITE16_HANDLER( wardner_dsp_w )
136	136	{
137		const address_space *mainspace;
	137	address_space *mainspace;
138	138
139	139	/* Data written to main CPU RAM via DSP IO port 1 */
140	140	dsp_execute = 0;
r8962	r8963
142	142	case 0x7000:   if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
143	143	case 0x8000:
144	144	case 0xa000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
145		memory_write_byte(mainspace, main_ram_seg + (dsp_addr_w + 0), (data & 0xff));
146		memory_write_byte(mainspace, main_ram_seg + (dsp_addr_w + 1), ((data >> 8) & 0xff));
	145	mainspace->write_byte(main_ram_seg + (dsp_addr_w + 0), (data & 0xff));
	146	mainspace->write_byte(main_ram_seg + (dsp_addr_w + 1), ((data >> 8) & 0xff));
147	147	break;
148	148	default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
149	149	}
r8962	r8963
271	271	}
272	272
273	273
274		static void toaplan0_coin_dsp_w(const address_space *space, int offset, int data)
	274	static void toaplan0_coin_dsp_w(address_space *space, int offset, int data)
275	275	{
276	276	if (data > 1)
277	277	LOG(("%s:Writing %08x to %08x.\n",cpuexec_describe_context(space->machine),data,toaplan_port_type[toaplan_main_cpu] - offset));

src/mame/machine/konppc.c

r8962	r8963
212	212	return dsp_comm_ppc[board][offset];
213	213	}
214	214
215		static void dsp_comm_sharc_w(const address_space *space, int board, int offset, UINT32 data)
	215	static void dsp_comm_sharc_w(address_space *space, int board, int offset, UINT32 data)
216	216	{
217	217	if (offset >= 2)
218	218	{
r8962	r8963
351	351
352	352	/*****************************************************************************/
353	353
354		static UINT32 nwk_fifo_r(const address_space *space, int board)
	354	static UINT32 nwk_fifo_r(address_space *space, int board)
355	355	{
356	356	const char *dsptag = (board == 0) ? "dsp" : "dsp2";
357	357	running_device *device = space->machine->device(dsptag);

src/mame/machine/irobot.c

r8962	r8963
588	588	UINT32 SP = 0;
589	589	UINT32 icount = 0;
590	590
591		profiler_mark_start(PROFILER_USER1);
	591	g_profiler.start(PROFILER_USER1);
592	592
593	593	while ((prevop->flags & (FL_DPSEL | FL_carry)) != (FL_DPSEL | FL_carry))
594	594	{
r8962	r8963
841	841	irmb_latch = Y;
842	842	}
843	843	}
844		profiler_mark_end();
	844	g_profiler.stop();
845	845
846	846	logerror("%d instructions for Mathbox \n", icount);
847	847

src/mame/machine/midwayic.c

r8962	r8963
205	205	}
206	206
207	207
208		UINT8 midway_serial_pic_r(const address_space *space)
	208	UINT8 midway_serial_pic_r(address_space *space)
209	209	{
210	210	logerror("%s:security R = %04X\n", cpuexec_describe_context(space->machine), serial.buffer);
211	211	serial.status = 1;
r8962	r8963
213	213	}
214	214
215	215
216		void midway_serial_pic_w(const address_space *space, UINT8 data)
	216	void midway_serial_pic_w(address_space *space, UINT8 data)
217	217	{
218	218	logerror("%s:security W = %04X\n", cpuexec_describe_context(space->machine), data);
219	219
r8962	r8963
293	293	}
294	294
295	295
296		UINT8 midway_serial_pic2_status_r(const address_space *space)
	296	UINT8 midway_serial_pic2_status_r(address_space *space)
297	297	{
298	298	UINT8 result = 0;
299	299
r8962	r8963
312	312	}
313	313
314	314
315		UINT8 midway_serial_pic2_r(const address_space *space)
	315	UINT8 midway_serial_pic2_r(address_space *space)
316	316	{
317	317	UINT8 result = 0;
318	318
r8962	r8963
332	332	}
333	333
334	334
335		void midway_serial_pic2_w(const address_space *space, UINT8 data)
	335	void midway_serial_pic2_w(address_space *space, UINT8 data)
336	336	{
337	337	running_machine *machine = space->machine;
338	338	static FILE *nvramlog;

src/mame/machine/segas24.c

r8962	r8963
27	27
28	28	static UINT8  (*system24temp_sys16_io_io_r)(running_machine *machine, int port);
29	29	static void   (*system24temp_sys16_io_io_w)(running_machine *machine, int port, UINT8 data);
30		static void   (*system24temp_sys16_io_cnt_w)(const address_space *space, UINT8 data);
	30	static void   (*system24temp_sys16_io_cnt_w)(address_space *space, UINT8 data);
31	31	static READ16_HANDLER ((*system24temp_sys16_io_iod_r));
32	32	static WRITE16_HANDLER((*system24temp_sys16_io_iod_w));
33	33	static UINT8 system24temp_sys16_io_cnt, system24temp_sys16_io_dir;
34	34
35	35	void system24temp_sys16_io_set_callbacks(UINT8 (*io_r)(running_machine *machine, int port),
36	36	void  (*io_w)(running_machine *machine, int port, UINT8 data),
37		void  (*cnt_w)(const address_space *space, UINT8 data),
	37	void  (*cnt_w)(address_space *space, UINT8 data),
38	38	read16_space_func iod_r,
39	39	write16_space_func iod_w)
40	40	{

src/mame/machine/midwayic.h

r8962	r8963
9	9	void midway_serial_pic_init(running_machine *machine, int upper);
10	10	void midway_serial_pic_reset_w(int state);
11	11	UINT8 midway_serial_pic_status_r(void);
12		UINT8 midway_serial_pic_r(const address_space *space);
13		void midway_serial_pic_w(const address_space *space, UINT8 data);
	12	UINT8 midway_serial_pic_r(address_space *space);
	13	void midway_serial_pic_w(address_space *space, UINT8 data);
14	14
15	15
16	16	/* 2nd generation Midway serial/NVRAM/RTC PIC */
17	17	void midway_serial_pic2_init(running_machine *machine, int upper, int yearoffs);
18	18	void midway_serial_pic2_set_default_nvram(const UINT8 *nvram);
19		UINT8 midway_serial_pic2_status_r(const address_space *space);
20		UINT8 midway_serial_pic2_r(const address_space *space);
21		void midway_serial_pic2_w(const address_space *space, UINT8 data);
	19	UINT8 midway_serial_pic2_status_r(address_space *space);
	20	UINT8 midway_serial_pic2_r(address_space *space);
	21	void midway_serial_pic2_w(address_space *space, UINT8 data);
22	22	NVRAM_HANDLER( midway_serial_pic2 );
23	23
24	24

src/mame/machine/konamigx.c

r8962	r8963
45	45
46	46	lim = adr+bsize*count;
47	47	for(i=adr; i<lim; i+=2)
48		memory_write_word(space, i, prot_data[0x1a/2]);
	48	space->write_word(i, prot_data[0x1a/2]);
49	49	break;
50	50
51	51	// WARNING: The following cases are speculation based with questionable accuracy!(AAT)
r8962	r8963
76	76	// let's hope GCC will inline the mem24bew calls
77	77	for (src=adr; src<srcend; src+=bsize)
78	78	{
79		cx1 = (short)memory_read_word(space, src);
80		sx1 = (short)memory_read_word(space, src + 2);
81		wx1 = (short)memory_read_word(space, src + 4);
	79	cx1 = (short)space->read_word(src);
	80	sx1 = (short)space->read_word(src + 2);
	81	wx1 = (short)space->read_word(src + 4);
82	82
83		cy1 = (short)memory_read_word(space, src + 6);
84		sy1 = (short)memory_read_word(space, src + 8);
85		wy1 = (short)memory_read_word(space, src +10);
	83	cy1 = (short)space->read_word(src + 6);
	84	sy1 = (short)space->read_word(src + 8);
	85	wy1 = (short)space->read_word(src +10);
86	86
87		cz1 = (short)memory_read_word(space, src +12);
88		sz1 = (short)memory_read_word(space, src +14);
89		wz1 = (short)memory_read_word(space, src +16);
	87	cz1 = (short)space->read_word(src +12);
	88	sz1 = (short)space->read_word(src +14);
	89	wz1 = (short)space->read_word(src +16);
90	90
91	91	count = i = src + skip;
92	92	tgt = src + bsize;
93	93
94		for (; count<tgt; count++) memory_write_byte(space, count, 0);
	94	for (; count<tgt; count++) space->write_byte(count, 0);
95	95
96	96	for (; tgt<tgtend; i++, tgt+=bsize)
97	97	{
98		c2 = (short)memory_read_word(space, tgt);
99		s2 = (short)memory_read_word(space, tgt + 2);
100		w2 = (short)memory_read_word(space, tgt + 4);
	98	c2 = (short)space->read_word(tgt);
	99	s2 = (short)space->read_word(tgt + 2);
	100	w2 = (short)space->read_word(tgt + 4);
101	101	if (abs((cx1+sx1)-(c2+s2))>=wx1+w2) continue; // X rejection
102	102
103		c2 = (short)memory_read_word(space, tgt + 6);
104		s2 = (short)memory_read_word(space, tgt + 8);
105		w2 = (short)memory_read_word(space, tgt +10);
	103	c2 = (short)space->read_word(tgt + 6);
	104	s2 = (short)space->read_word(tgt + 8);
	105	w2 = (short)space->read_word(tgt +10);
106	106	if (abs((cy1+sy1)-(c2+s2))>=wy1+w2) continue; // Y rejection
107	107
108		c2 = (short)memory_read_word(space, tgt +12);
109		s2 = (short)memory_read_word(space, tgt +14);
110		w2 = (short)memory_read_word(space, tgt +16);
	108	c2 = (short)space->read_word(tgt +12);
	109	s2 = (short)space->read_word(tgt +14);
	110	w2 = (short)space->read_word(tgt +16);
111	111	if (abs((cz1+sz1)-(c2+s2))>=wz1+w2) continue; // Z rejection
112	112
113		memory_write_byte(space, i, 0x80); // collision confirmed
	113	space->write_byte(i, 0x80); // collision confirmed
114	114	}
115	115	}
116	116	break;
r8962	r8963
184	184	if (element_size == 1)
185	185	for (i=src_count; i; i--)
186	186	{
187		memory_write_byte(space, dst_addr, memory_read_byte(space, src_addr));
	187	space->write_byte(dst_addr, space->read_byte(src_addr));
188	188	src_addr += src_skip;
189	189	dst_addr += dst_skip;
190	190	}
191	191	else for (i=src_count; i; i--)
192	192	{
193		memory_write_word(space, dst_addr, memory_read_word(space, src_addr));
	193	space->write_word(dst_addr, space->read_word(src_addr));
194	194	src_addr += src_skip;
195	195	dst_addr += dst_skip;
196	196	}
r8962	r8963
215	215
216	216	for (i=mod_count; i; i--)
217	217	{
218		mod_val  = memory_read_word(space, mod_addr);
	218	mod_val  = space->read_word(mod_addr);
219	219	mod_addr += mod_skip;
220	220
221		mod_data = memory_read_word(space, src_addr);
	221	mod_data = space->read_word(src_addr);
222	222	src_addr += src_skip;
223	223
224	224	mod_data += mod_val;
225	225
226		memory_write_word(space, dst_addr, mod_data);
	226	space->write_word(dst_addr, mod_data);
227	227	dst_addr += dst_skip;
228	228	}
229	229	break;
r8962	r8963
468	468	if(mode == 0x93)
469	469	for(i1=0; i1 <= sz2; i1++)
470	470	for(i2=0; i2 < db; i2+=4) {
471		memory_write_dword(space, da, memory_read_dword(space, sa) ^ x);
	471	space->write_dword(da, space->read_dword(sa) ^ x);
472	472	da += 4;
473	473	sa += 4;
474	474	}
475	475	else if(mode == 0x8f)
476	476	for(i1=0; i1 <= sz2; i1++)
477	477	for(i2=0; i2 < db; i2+=4) {
478		memory_write_dword(space, da, x);
	478	space->write_dword(da, x);
479	479	da += 4;
480	480	}
481	481	}

src/mame/machine/toaplan1.c

r8962	r8963
22	22	TOAPLAN1_REGION_OTHER
23	23	};
24	24
25		static UINT8 toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER+1][2][4];
26		static UINT8 toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER+1][2][4];
	25	static const UINT8 toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER+1][2][4] =
	26	{
	27	{ { 1, 1, 2, 2 }, { 1, 1, 2, 2 } },   /* TOAPLAN1_REGION_JAPAN */
	28	{ { 1, 1, 2, 2 }, { 1, 1, 2, 2 } },   /* TOAPLAN1_REGION_US */
	29	{ { 1, 2, 3, 4 }, { 1, 1, 1, 1 } },   /* TOAPLAN1_REGION_WORLD */
	30	{ { 1, 1, 1, 1 }, { 1, 1, 1, 1 } }   /* TOAPLAN1_REGION_OTHER */
	31	};
27	32
	33	static const UINT8 toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER+1][2][4] =
	34	{
	35	{ { 1, 2, 1, 3 }, { 1, 2, 1, 3 } },   /* TOAPLAN1_REGION_JAPAN */
	36	{ { 1, 2, 1, 3 }, { 1, 2, 1, 3 } },   /* TOAPLAN1_REGION_US */
	37	{ { 1, 1, 1, 1 }, { 2, 3, 4, 6 } },   /* TOAPLAN1_REGION_WORLD */
	38	{ { 1, 1, 1, 1 }, { 1, 1, 1, 1 } },   /* TOAPLAN1_REGION_OTHER */
	39	};
28	40
29		static int toaplan1_coin_count; /* coin count increments on startup ? , so dont count it */
30		static int toaplan1_intenable;
31	41
32		static int demonwld_dsp_on;
33		static int demonwld_dsp_BIO;
34		static int dsp_execute;                 /* Demon world */
35		static UINT32 dsp_addr_w, main_ram_seg; /* Demon world */
36
37		static UINT8 vimana_coins[2];
38		static UINT8 vimana_credits;
39		static UINT8 vimana_latch;
40
41
42		int toaplan1_unk_reset_port;
43
44		UINT8 *toaplan1_sharedram;
45
46
47
48	42	INTERRUPT_GEN( toaplan1_interrupt )
49	43	{
50		if (toaplan1_intenable)
	44	toaplan1_state *state = device->machine->driver_data<toaplan1_state>();
	45
	46	if (state->intenable)
51	47	cpu_set_input_line(device, 4, HOLD_LINE);
52	48	}
53	49
r8962	r8963
55	51	{
56	52	if (ACCESSING_BITS_0_7)
57	53	{
58		toaplan1_intenable = data & 0xff;
	54	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	55	state->intenable = data & 0xff;
59	56	}
60	57	}
61	58
62	59
63	60	WRITE16_HANDLER( demonwld_dsp_addrsel_w )
64	61	{
	62	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	63
65	64	/* This sets the main CPU RAM address the DSP should */
66	65	/*  read/write, via the DSP IO port 0 */
67	66	/* Top three bits of data need to be shifted left 9 places */
r8962	r8963
70	69	/* Lower thirteen bits of this data is shifted left one position */
71	70	/*  to move it to an even address word boundary */
72	71
73		main_ram_seg = ((data & 0xe000) << 9);
74		dsp_addr_w   = ((data & 0x1fff) << 1);
75		logerror("DSP PC:%04x IO write %04x (%08x) at port 0\n",cpu_get_previouspc(space->cpu),data,main_ram_seg + dsp_addr_w);
	72	state->main_ram_seg = ((data & 0xe000) << 9);
	73	state->dsp_addr_w   = ((data & 0x1fff) << 1);
	74	logerror("DSP PC:%04x IO write %04x (%08x) at port 0\n", cpu_get_previouspc(space->cpu), data, state->main_ram_seg + state->dsp_addr_w);
76	75	}
77	76
78	77	READ16_HANDLER( demonwld_dsp_r )
79	78	{
80	79	/* DSP can read data from main CPU RAM via DSP IO port 1 */
81	80
82		const address_space *mainspace;
	81	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	82	address_space *mainspace;
83	83	UINT16 input_data = 0;
84		switch (main_ram_seg) {
	84
	85	switch (state->main_ram_seg) {
85	86	case 0xc00000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
86		input_data = memory_read_word(mainspace, main_ram_seg + dsp_addr_w);
	87	input_data = mainspace->read_word(state->main_ram_seg + state->dsp_addr_w);
87	88	break;
88		default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w);
	89	default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n", cpu_get_previouspc(space->cpu), state->main_ram_seg + state->dsp_addr_w);
89	90	}
90		logerror("DSP PC:%04x IO read %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),input_data,main_ram_seg + dsp_addr_w);
	91	logerror("DSP PC:%04x IO read %04x at %08x (port 1)\n", cpu_get_previouspc(space->cpu), input_data, state->main_ram_seg + state->dsp_addr_w);
91	92	return input_data;
92	93	}
93	94
94	95	WRITE16_HANDLER( demonwld_dsp_w )
95	96	{
96		const address_space *mainspace;
	97	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	98	address_space *mainspace;
97	99
98	100	/* Data written to main CPU RAM via DSP IO port 1 */
99		dsp_execute = 0;
100		switch (main_ram_seg) {
101		case 0xc00000:   if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
	101	state->dsp_execute = 0;
	102	switch (state->main_ram_seg) {
	103	case 0xc00000:   if ((state->dsp_addr_w < 3) && (data == 0)) state->dsp_execute = 1;
102	104	mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
103		memory_write_word(mainspace, main_ram_seg + dsp_addr_w, data);
	105	mainspace->write_word(state->main_ram_seg + state->dsp_addr_w, data);
104	106	break;
105		default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w);
	107	default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n", cpu_get_previouspc(space->cpu), state->main_ram_seg + state->dsp_addr_w);
106	108	}
107		logerror("DSP PC:%04x IO write %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),data,main_ram_seg + dsp_addr_w);
	109	logerror("DSP PC:%04x IO write %04x at %08x (port 1)\n", cpu_get_previouspc(space->cpu), data, state->main_ram_seg + state->dsp_addr_w);
108	110	}
109	111
110	112	WRITE16_HANDLER( demonwld_dsp_bio_w )
r8962	r8963
114	116	/*              Actually only DSP data bit 15 controls this */
115	117	/* data 0x0000  means set DSP BIO line active and disable */
116	118	/*              communication to main processor*/
117		logerror("DSP PC:%04x IO write %04x at port 3\n",cpu_get_previouspc(space->cpu),data);
	119
	120	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	121
	122	logerror("DSP PC:%04x IO write %04x at port 3\n", cpu_get_previouspc(space->cpu), data);
118	123	if (data & 0x8000) {
119		demonwld_dsp_BIO = CLEAR_LINE;
	124	state->dsp_BIO = CLEAR_LINE;
120	125	}
121	126	if (data == 0) {
122		if (dsp_execute) {
	127	if (state->dsp_execute) {
123	128	logerror("Turning 68000 on\n");
124	129	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
125		dsp_execute = 0;
	130	state->dsp_execute = 0;
126	131	}
127		demonwld_dsp_BIO = ASSERT_LINE;
	132	state->dsp_BIO = ASSERT_LINE;
128	133	}
129	134	}
130	135
131	136	READ16_HANDLER ( demonwld_BIO_r )
132	137	{
133		return demonwld_dsp_BIO;
	138	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	139
	140	return state->dsp_BIO;
134	141	}
135	142
136	143
137	144	static void demonwld_dsp(running_machine *machine, int enable)
138	145	{
139		demonwld_dsp_on = enable;
	146	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	147
	148	state->dsp_on = enable;
140	149	if (enable)
141	150	{
142	151	logerror("Turning DSP on and 68000 off\n");
r8962	r8963
151	160	cputag_set_input_line(machine, "dsp", INPUT_LINE_HALT, ASSERT_LINE);
152	161	}
153	162	}
	163
154	164	static STATE_POSTLOAD( demonwld_restore_dsp )
155	165	{
156		demonwld_dsp(machine, demonwld_dsp_on);
	166	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	167	demonwld_dsp(machine, state->dsp_on);
157	168	}
158	169
159	170	WRITE16_HANDLER( demonwld_dsp_ctrl_w )
r8962	r8963
187	198
188	199	READ16_HANDLER ( vimana_system_port_r )
189	200	{
	201	static const UINT8 vimana_region[16] =
	202	{
	203	TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_US   , TOAPLAN1_REGION_WORLD, TOAPLAN1_REGION_JAPAN,
	204	TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_US   ,
	205	TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER,
	206	TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_JAPAN
	207	};
	208
	209	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
190	210	int data, p, r, d, slot, reg, dsw;
191	211
192		UINT8 vimana_region[16] = { TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_US   , TOAPLAN1_REGION_WORLD, TOAPLAN1_REGION_JAPAN,
193		TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_US   ,
194		TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER,
195		TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_JAPAN };
196
197	212	slot = -1;
198	213	d = input_port_read(space->machine, "DSWA");
199	214	r = input_port_read(space->machine, "TJUMP");
200	215	p = input_port_read(space->machine, "SYSTEM");
201		vimana_latch ^= p;
202		data = (vimana_latch & p);
	216	state->vimana_latch ^= p;
	217	data = (state->vimana_latch & p);
203	218
204	219	/* simulate the mcu keeping track of credits based on region and coinage settings */
205	220	/* latch so it doesn't add more than one coin per keypress */
206	221	if (d & 0x04)   /* "test mode" ON */
207	222	{
208		vimana_coins[0] = vimana_coins[1] = 0;
209		vimana_credits = 0;
	223	state->vimana_coins[0] = state->vimana_coins[1] = 0;
	224	state->vimana_credits = 0;
210	225	}
211	226	else            /* "test mode" OFF */
212	227	{
213	228	if (data & 0x02)      /* TILT */
214	229	{
215		vimana_coins[0] = vimana_coins[1] = 0;
216		vimana_credits = 0;
	230	state->vimana_coins[0] = state->vimana_coins[1] = 0;
	231	state->vimana_credits = 0;
217	232	}
218	233	if (data & 0x01)      /* SERVICE1 */
219	234	{
220		vimana_credits++ ;
	235	state->vimana_credits++ ;
221	236	}
222	237	if (data & 0x08)      /* COIN1 */
223	238	{
r8962	r8963
232	247	{
233	248	reg = vimana_region[r];
234	249	dsw = (d & 0xf0) >> (4 + 2 * slot);
235		vimana_coins[slot]++;
236		if (vimana_coins[slot] >= toaplan1_coins_for_credit[reg][slot][dsw])
	250	state->vimana_coins[slot]++;
	251	if (state->vimana_coins[slot] >= toaplan1_coins_for_credit[reg][slot][dsw])
237	252	{
238		vimana_credits += toaplan1_credits_for_coin[reg][slot][dsw];
239		vimana_coins[slot] -= toaplan1_coins_for_credit[reg][slot][dsw];
	253	state->vimana_credits += toaplan1_credits_for_coin[reg][slot][dsw];
	254	state->vimana_coins[slot] -= toaplan1_coins_for_credit[reg][slot][dsw];
240	255	}
241	256	coin_counter_w(space->machine, slot, 1);
242	257	coin_counter_w(space->machine, slot, 0);
243	258	}
244	259
245		if (vimana_credits >= 9)
246		vimana_credits = 9;
	260	if (state->vimana_credits >= 9)
	261	state->vimana_credits = 9;
247	262	}
248	263
249		coin_lockout_global_w(space->machine, (vimana_credits >= 9));
	264	coin_lockout_global_w(space->machine, (state->vimana_credits >= 9));
250	265
251		vimana_latch = p;
	266	state->vimana_latch = p;
252	267
253	268	return p & 0xffff;
254	269	}
r8962	r8963
260	275	{
261	276	case 0:  data = 0xff; break;
262	277	case 1:  data = 0x00; break;
263		case 2:  data = vimana_credits; break;
	278	case 2:
	279	{
	280	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	281	data = state->vimana_credits;
	282	break;
	283	}
264	284	}
265	285	return data & 0xff;
266	286	}
r8962	r8963
271	291	{
272	292	case 0:   break;
273	293	case 1:   break;
274		case 2:   if (ACCESSING_BITS_0_7)
275		{
276		vimana_credits = data & 0xff;
277		coin_lockout_global_w(space->machine, (vimana_credits >= 9));
278		}
279		break;
	294	case 2:
	295	if (ACCESSING_BITS_0_7)
	296	{
	297	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	298	state->vimana_credits = data & 0xff;
	299	coin_lockout_global_w(space->machine, (state->vimana_credits >= 9));
	300	}
	301	break;
280	302	}
281	303	}
282	304
283	305	READ16_HANDLER( toaplan1_shared_r )
284	306	{
285		return toaplan1_sharedram[offset] & 0xff;
	307	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	308	return state->sharedram[offset] & 0xff;
286	309	}
287	310
288	311	WRITE16_HANDLER( toaplan1_shared_w )
289	312	{
290	313	if (ACCESSING_BITS_0_7)
291	314	{
292		toaplan1_sharedram[offset] = data & 0xff;
	315	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	316	state->sharedram[offset] = data & 0xff;
293	317	}
294	318	}
295	319
r8962	r8963
311	335
312	336	WRITE8_HANDLER( rallybik_coin_w )
313	337	{
	338	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	339
314	340	switch (data) {
315		case 0x08: if (toaplan1_coin_count) { coin_counter_w(space->machine, 0,1); coin_counter_w(space->machine, 0,0); } break;
316		case 0x09: if (toaplan1_coin_count) { coin_counter_w(space->machine, 2,1); coin_counter_w(space->machine, 2,0); } break;
317		case 0x0a: if (toaplan1_coin_count) { coin_counter_w(space->machine, 1,1); coin_counter_w(space->machine, 1,0); } break;
318		case 0x0b: if (toaplan1_coin_count) { coin_counter_w(space->machine, 3,1); coin_counter_w(space->machine, 3,0); } break;
319		case 0x0c: coin_lockout_w(space->machine, 0,1); coin_lockout_w(space->machine, 2,1); break;
320		case 0x0d: coin_lockout_w(space->machine, 0,0); coin_lockout_w(space->machine, 2,0); break;
321		case 0x0e: coin_lockout_w(space->machine, 1,1); coin_lockout_w(space->machine, 3,1); break;
322		case 0x0f: coin_lockout_w(space->machine, 1,0); coin_lockout_w(space->machine, 3,0); toaplan1_coin_count=1; break;
	341	case 0x08: if (state->coin_count) { coin_counter_w(space->machine, 0, 1); coin_counter_w(space->machine, 0, 0); } break;
	342	case 0x09: if (state->coin_count) { coin_counter_w(space->machine, 2, 1); coin_counter_w(space->machine, 2, 0); } break;
	343	case 0x0a: if (state->coin_count) { coin_counter_w(space->machine, 1, 1); coin_counter_w(space->machine, 1, 0); } break;
	344	case 0x0b: if (state->coin_count) { coin_counter_w(space->machine, 3, 1); coin_counter_w(space->machine, 3, 0); } break;
	345	case 0x0c: coin_lockout_w(space->machine, 0, 1); coin_lockout_w(space->machine, 2, 1); break;
	346	case 0x0d: coin_lockout_w(space->machine, 0, 0); coin_lockout_w(space->machine, 2, 0); break;
	347	case 0x0e: coin_lockout_w(space->machine, 1, 1); coin_lockout_w(space->machine, 3, 1); break;
	348	case 0x0f: coin_lockout_w(space->machine, 1, 0); coin_lockout_w(space->machine, 3, 0); state->coin_count=1; break;
323	349	default:   logerror("PC:%04x  Writing unknown data (%04x) to coin count/lockout port\n",cpu_get_previouspc(space->cpu),data); break;
324	350	}
325	351	}
r8962	r8963
367	393	}
368	394
369	395
370		static void toaplan1_init_coinage_tables(running_machine *machine)
	396	MACHINE_RESET( toaplan1 )
371	397	{
372		/* Japan */
373		toaplan1_coins_for_credit[TOAPLAN1_REGION_JAPAN][0][0] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_JAPAN][0][0] = 1;
374		toaplan1_coins_for_credit[TOAPLAN1_REGION_JAPAN][0][1] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_JAPAN][0][1] = 2;
375		toaplan1_coins_for_credit[TOAPLAN1_REGION_JAPAN][0][2] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_JAPAN][0][2] = 1;
376		toaplan1_coins_for_credit[TOAPLAN1_REGION_JAPAN][0][3] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_JAPAN][0][3] = 3;
377		toaplan1_coins_for_credit[TOAPLAN1_REGION_JAPAN][1][0] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_JAPAN][1][0] = 1;
378		toaplan1_coins_for_credit[TOAPLAN1_REGION_JAPAN][1][1] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_JAPAN][1][1] = 2;
379		toaplan1_coins_for_credit[TOAPLAN1_REGION_JAPAN][1][2] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_JAPAN][1][2] = 1;
380		toaplan1_coins_for_credit[TOAPLAN1_REGION_JAPAN][1][3] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_JAPAN][1][3] = 3;
381		/* US = Japan */
382		toaplan1_coins_for_credit[TOAPLAN1_REGION_US   ][0][0] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_US   ][0][0] = 1;
383		toaplan1_coins_for_credit[TOAPLAN1_REGION_US   ][0][1] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_US   ][0][1] = 2;
384		toaplan1_coins_for_credit[TOAPLAN1_REGION_US   ][0][2] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_US   ][0][2] = 1;
385		toaplan1_coins_for_credit[TOAPLAN1_REGION_US   ][0][3] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_US   ][0][3] = 3;
386		toaplan1_coins_for_credit[TOAPLAN1_REGION_US   ][1][0] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_US   ][1][0] = 1;
387		toaplan1_coins_for_credit[TOAPLAN1_REGION_US   ][1][1] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_US   ][1][1] = 2;
388		toaplan1_coins_for_credit[TOAPLAN1_REGION_US   ][1][2] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_US   ][1][2] = 1;
389		toaplan1_coins_for_credit[TOAPLAN1_REGION_US   ][1][3] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_US   ][1][3] = 3;
390		/* World */
391		toaplan1_coins_for_credit[TOAPLAN1_REGION_WORLD][0][0] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_WORLD][0][0] = 1;
392		toaplan1_coins_for_credit[TOAPLAN1_REGION_WORLD][0][1] = 2; toaplan1_credits_for_coin[TOAPLAN1_REGION_WORLD][0][1] = 1;
393		toaplan1_coins_for_credit[TOAPLAN1_REGION_WORLD][0][2] = 3; toaplan1_credits_for_coin[TOAPLAN1_REGION_WORLD][0][2] = 1;
394		toaplan1_coins_for_credit[TOAPLAN1_REGION_WORLD][0][3] = 4; toaplan1_credits_for_coin[TOAPLAN1_REGION_WORLD][0][3] = 1;
395		toaplan1_coins_for_credit[TOAPLAN1_REGION_WORLD][1][0] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_WORLD][1][0] = 2;
396		toaplan1_coins_for_credit[TOAPLAN1_REGION_WORLD][1][1] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_WORLD][1][1] = 3;
397		toaplan1_coins_for_credit[TOAPLAN1_REGION_WORLD][1][2] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_WORLD][1][2] = 4;
398		toaplan1_coins_for_credit[TOAPLAN1_REGION_WORLD][1][3] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_WORLD][1][3] = 6;
399		/* Other - as it is an unknown or invalid setting, I set everything to 1C_1C */
400		toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER][0][0] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER][0][0] = 1;
401		toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER][0][1] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER][0][1] = 1;
402		toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER][0][2] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER][0][2] = 1;
403		toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER][0][3] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER][0][3] = 1;
404		toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER][1][0] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER][1][0] = 1;
405		toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER][1][1] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER][1][1] = 1;
406		toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER][1][2] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER][1][2] = 1;
407		toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER][1][3] = 1; toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER][1][3] = 1;
408		}
	398	toaplan1_state *state = machine->driver_data<toaplan1_state>();
409	399
410		MACHINE_RESET( toaplan1 )
411		{
412		toaplan1_intenable = 0;
413		toaplan1_coin_count = 0;
414		toaplan1_unk_reset_port = 0;
	400	state->intenable = 0;
	401	state->coin_count = 0;
	402	state->unk_reset_port = 0;
415	403	coin_lockout_global_w(machine, 0);
416	404	}
	405
417	406	void toaplan1_driver_savestate(running_machine *machine)
418	407	{
419		state_save_register_global(machine, toaplan1_intenable);
420		state_save_register_global(machine, toaplan1_coin_count);
421		state_save_register_global(machine, toaplan1_unk_reset_port);
	408	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	409
	410	state_save_register_global(machine, state->intenable);
	411	state_save_register_global(machine, state->coin_count);
	412	state_save_register_global(machine, state->unk_reset_port);
422	413	}
423	414
424	415	MACHINE_RESET( zerowing )   /* Hack for ZeroWing and OutZone. See the video driver */
425	416	{
	417	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	418
426	419	MACHINE_RESET_CALL(toaplan1);
427		toaplan1_unk_reset_port = 1;
	420	state->unk_reset_port = 1;
428	421	}
429	422
430	423	MACHINE_RESET( demonwld )
431	424	{
	425	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	426
432	427	MACHINE_RESET_CALL(toaplan1);
433		dsp_addr_w = 0;
434		main_ram_seg = 0;
435		dsp_execute = 0;
	428	state->dsp_addr_w = 0;
	429	state->main_ram_seg = 0;
	430	state->dsp_execute = 0;
436	431	}
	432
437	433	void demonwld_driver_savestate(running_machine *machine)
438	434	{
439		state_save_register_global(machine, demonwld_dsp_on);
440		state_save_register_global(machine, dsp_addr_w);
441		state_save_register_global(machine, main_ram_seg);
442		state_save_register_global(machine, demonwld_dsp_BIO);
443		state_save_register_global(machine, dsp_execute);
	435	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	436
	437	state_save_register_global(machine, state->dsp_on);
	438	state_save_register_global(machine, state->dsp_addr_w);
	439	state_save_register_global(machine, state->main_ram_seg);
	440	state_save_register_global(machine, state->dsp_BIO);
	441	state_save_register_global(machine, state->dsp_execute);
444	442	state_save_register_postload(machine, demonwld_restore_dsp, NULL);
445	443	}
446	444
447	445	MACHINE_RESET( vimana )
448	446	{
	447	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	448
449	449	MACHINE_RESET_CALL(toaplan1);
450		toaplan1_init_coinage_tables(machine);
451		vimana_coins[0] = vimana_coins[1] = 0;
452		vimana_credits = 0;
453		vimana_latch = 0;
	450	state->vimana_coins[0] = state->vimana_coins[1] = 0;
	451	state->vimana_credits = 0;
	452	state->vimana_latch = 0;
454	453	}
	454
455	455	void vimana_driver_savestate(running_machine *machine)
456	456	{
457		state_save_register_global(machine, vimana_coins[0]);
458		state_save_register_global(machine, vimana_coins[1]);
459		state_save_register_global(machine, vimana_credits);
460		state_save_register_global(machine, vimana_latch);
	457	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	458
	459	state_save_register_global(machine, state->vimana_coins[0]);
	460	state_save_register_global(machine, state->vimana_coins[1]);
	461	state_save_register_global(machine, state->vimana_credits);
	462	state_save_register_global(machine, state->vimana_latch);
461	463	}

src/mame/machine/scramble.c

r8962	r8963
140	140
141	141	READ8_HANDLER( hunchbks_mirror_r )
142	142	{
143		return memory_read_byte(space, 0x1000+offset);
	143	return space->read_byte(0x1000+offset);
144	144	}
145	145
146	146	WRITE8_HANDLER( hunchbks_mirror_w )
147	147	{
148		memory_write_byte(space, 0x1000+offset,data);
	148	space->write_byte(0x1000+offset,data);
149	149	}
150	150
151	151	const ppi8255_interface scramble_ppi_0_intf =

src/mame/machine/pitnrun.c

r8962	r8963
106	106
107	107	WRITE8_HANDLER( pitnrun_68705_portB_w )
108	108	{
109		const address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	109	address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
110	110	if (~data & 0x02)
111	111	{
112	112	/* 68705 is going to read data from the Z80 */
r8962	r8963
121	121	}
122	122	if (~data & 0x10)
123	123	{
124		memory_write_byte(cpu0space, address, portA_out);
	124	cpu0space->write_byte(address, portA_out);
125	125	}
126	126	if (~data & 0x20)
127	127	{
128		portA_in = memory_read_byte(cpu0space, address);
	128	portA_in = cpu0space->read_byte(address);
129	129	}
130	130	if (~data & 0x40)
131	131	{

src/mame/machine/konami1.c

r8962	r8963
42	42
43	43	UINT8 *konami1_decode(running_machine *machine, const char *cpu)
44	44	{
45		const address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
	45	address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
46	46	const UINT8 *rom = memory_region(machine, cpu);
47	47	int size = memory_region_length(machine, cpu);
48	48	int A;
49	49
50	50	UINT8 *decrypted = auto_alloc_array(machine, UINT8, size);
51		memory_set_decrypted_region(space, 0x0000, 0xffff, decrypted);
	51	space->set_decrypted_region(0x0000, 0xffff, decrypted);
52	52
53	53	for (A = 0;A < size;A++)
54	54	{

src/mame/machine/fddebug.c

r8962	r8963
277	277	static void execute_fdclist(running_machine *machine, int ref, int params, const char **param);
278	278	static void execute_fdcsearch(running_machine *machine, int ref, int params, const char **param);
279	279
280		static fd1094_possibility *try_all_possibilities(const address_space *space, int basepc, int offset, int length, UINT8 *instrbuffer, UINT8 *keybuffer, fd1094_possibility *possdata);
	280	static fd1094_possibility *try_all_possibilities(address_space *space, int basepc, int offset, int length, UINT8 *instrbuffer, UINT8 *keybuffer, fd1094_possibility *possdata);
281	281	static void tag_possibility(running_machine *machine, fd1094_possibility *possdata, UINT8 status);
282	282
283	283	static void perform_constrained_search(running_machine *machine);
r8962	r8963
287	287	static UINT32 reconstruct_base_seed(int keybaseaddr, UINT32 startseed);
288	288
289	289	static void build_optable(running_machine *machine);
290		static int validate_ea(const address_space *space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags);
291		static int validate_opcode(const address_space *space, UINT32 pc, const UINT8 *opdata, int maxwords);
	290	static int validate_ea(address_space *space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags);
	291	static int validate_opcode(address_space *space, UINT32 pc, const UINT8 *opdata, int maxwords);
292	292
293	293
294	294
r8962	r8963
429	429	0=no, 1=yes, 2=unlikely
430	430	-----------------------------------------------*/
431	431
432		INLINE int pc_is_valid(const address_space *space, UINT32 pc, UINT32 flags)
	432	INLINE int pc_is_valid(address_space *space, UINT32 pc, UINT32 flags)
433	433	{
434	434	/* if we're odd or out of range, fail */
435	435	if ((pc & 1) == 1)
436	436	return 0;
437	437	if (pc & 0xff000000)
438	438	return 0;
439		if (memory_decrypted_read_ptr(space, pc) == NULL)
	439	if (space->direct().read_decrypted_ptr(pc) == NULL)
440	440	return 0;
441	441	return 1;
442	442	}
r8962	r8963
447	447	valid? 0=no, 1=yes, 2=unlikely
448	448	-----------------------------------------------*/
449	449
450		INLINE int addr_is_valid(const address_space *space, UINT32 addr, UINT32 flags)
	450	INLINE int addr_is_valid(address_space *space, UINT32 addr, UINT32 flags)
451	451	{
452	452	/* if this a JMP, the address is a PC */
453	453	if (flags & OF_JMP)
r8962	r8963
460	460	return 0;
461	461
462	462	/* if we're invalid, fail */
463		if (strcmp(memory_get_handler_string(space, 0, addr), "segaic16_memory_mapper_lsb_r") == 0)
	463	if (strcmp(const_cast<address_space *>(space)->get_handler_string(ROW_READ, addr), "segaic16_memory_mapper_lsb_r") == 0)
464	464	return 2;
465	465
466	466	return 1;
r8962	r8963
1052	1052
1053	1053	static void execute_fdsearch(running_machine *machine, int ref, int params, const char **param)
1054	1054	{
1055		const address_space *space = cpu_get_address_space(debug_cpu_get_visible_cpu(machine), ADDRESS_SPACE_PROGRAM);
	1055	address_space *space = cpu_get_address_space(debug_cpu_get_visible_cpu(machine), ADDRESS_SPACE_PROGRAM);
1056	1056	int pc = cpu_get_pc(space->cpu);
1057	1057	int length, first = TRUE;
1058	1058	UINT8 instrdata[2];
r8962	r8963
1178	1178
1179	1179	static void execute_fddasm(running_machine *machine, int ref, int params, const char **param)
1180	1180	{
1181		const address_space *space = cpu_get_address_space(debug_cpu_get_visible_cpu(machine), ADDRESS_SPACE_PROGRAM);
	1181	address_space *space = cpu_get_address_space(debug_cpu_get_visible_cpu(machine), ADDRESS_SPACE_PROGRAM);
1182	1182	int origstate = fd1094_set_state(keyregion, -1);
1183	1183	const char *filename;
1184	1184	int skipped = FALSE;
r8962	r8963
1385	1385	length
1386	1386	-----------------------------------------------*/
1387	1387
1388		static fd1094_possibility *try_all_possibilities(const address_space *space, int basepc, int offset, int length, UINT8 *instrbuffer, UINT8 *keybuffer, fd1094_possibility *possdata)
	1388	static fd1094_possibility *try_all_possibilities(address_space *space, int basepc, int offset, int length, UINT8 *instrbuffer, UINT8 *keybuffer, fd1094_possibility *possdata)
1389	1389	{
1390	1390	UINT8 keymask, keystat;
1391	1391	UINT16 possvalue[4];
r8962	r8963
2226	2226	valid or not, and return the length
2227	2227	-----------------------------------------------*/
2228	2228
2229		static int validate_ea(const address_space *space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags)
	2229	static int validate_ea(address_space *space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags)
2230	2230	{
2231	2231	UINT32 addr;
2232	2232	int valid;
r8962	r8963
2296	2296	the length specified
2297	2297	-----------------------------------------------*/
2298	2298
2299		static int validate_opcode(const address_space *space, UINT32 pc, const UINT8 *opdata, int maxwords)
	2299	static int validate_opcode(address_space *space, UINT32 pc, const UINT8 *opdata, int maxwords)
2300	2300	{
2301	2301	UINT32 immvalue = 0;
2302	2302	int iffy = FALSE;

src/mame/machine/namcos1.c

r8962	r8963
678	678	"bank9", "bank10", "bank11", "bank12", "bank13", "bank14", "bank15", "bank16"
679	679	};
680	680	static const char *const cputags[] = { "maincpu", "sub" };
681		const address_space *space = cputag_get_address_space(machine, cputags[(banknum >> 3) & 1], ADDRESS_SPACE_PROGRAM);
	681	address_space *space = cputag_get_address_space(machine, cputags[(banknum >> 3) & 1], ADDRESS_SPACE_PROGRAM);
682	682	int bankstart = (banknum & 7) * 0x2000;
683	683
684	684	/* for BANK handlers , memory direct and OP-code base */

src/mame/machine/segaic16.c

r8962	r8963
83	83
84	84	/* read original encrypted memory at that address */
85	85	recurse = 1;
86		result = memory_read_word_16be(space, cpu_get_pc(space->cpu));
	86	result = space->read_word(cpu_get_pc(space->cpu));
87	87	recurse = 0;
88	88	return result;
89	89	}
r8962	r8963
163	163	}
164	164
165	165
166		static void memory_mapper_w(const address_space *space, struct memory_mapper_chip *chip, offs_t offset, UINT8 data)
	166	static void memory_mapper_w(address_space *space, struct memory_mapper_chip *chip, offs_t offset, UINT8 data)
167	167	{
168	168	UINT8 oldval;
169	169
r8962	r8963
212	212	/*   02 - read data into latches 00,01 from 2 * (address in 07,08,09) */
213	213	if (data == 0x01)
214	214	{
215		const address_space *targetspace = cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM);
	215	address_space *targetspace = cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM);
216	216	offs_t addr = (chip->regs[0x0a] << 17) | (chip->regs[0x0b] << 9) | (chip->regs[0x0c] << 1);
217		memory_write_word(targetspace, addr, (chip->regs[0x00] << 8) | chip->regs[0x01]);
	217	targetspace->write_word(addr, (chip->regs[0x00] << 8) | chip->regs[0x01]);
218	218	}
219	219	else if (data == 0x02)
220	220	{
221		const address_space *targetspace = cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM);
	221	address_space *targetspace = cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM);
222	222	offs_t addr = (chip->regs[0x07] << 17) | (chip->regs[0x08] << 9) | (chip->regs[0x09] << 1);
223	223	UINT16 result;
224		result = memory_read_word(targetspace, addr);
	224	result = targetspace->read_word(addr);
225	225	chip->regs[0x00] = result >> 8;
226	226	chip->regs[0x01] = result;
227	227	}
r8962	r8963
295	295	static void update_memory_mapping(running_machine *machine, struct memory_mapper_chip *chip, int decrypt)
296	296	{
297	297	int rgnum;
	298	address_space *space = cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM);
298	299
299	300	if (LOG_MEMORY_MAP) mame_printf_debug("----\nRemapping:\n");
300	301
301	302	/* first reset everything back to the beginning */
302		memory_install_readwrite16_handler(cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM), 0x000000, 0xffffff, 0, 0, segaic16_memory_mapper_lsb_r, segaic16_memory_mapper_lsb_w);
	303	memory_install_readwrite16_handler(space, 0x000000, 0xffffff, 0, 0, segaic16_memory_mapper_lsb_r, segaic16_memory_mapper_lsb_w);
303	304
304	305	/* loop over the regions */
305	306	for (rgnum = 0; chip->map[rgnum].regbase != 0; rgnum++)
r8962	r8963
328	329
329	330	/* map it */
330	331	if (read != NULL)
331		memory_install_read16_handler(cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM), region_start, region_end, 0, region_mirror, read);
	332	memory_install_read16_handler(space, region_start, region_end, 0, region_mirror, read);
332	333	else if (readbank != NULL)
333		memory_install_read_bank(cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM), region_start, region_end, 0, region_mirror, readbank);
	334	memory_install_read_bank(space, region_start, region_end, 0, region_mirror, readbank);
	335	else
	336	memory_install_read16_handler(space, region_start, region_end, 0, region_mirror, segaic16_open_bus_r);
	337
334	338	if (write != NULL)
335		memory_install_write16_handler(cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM), region_start, region_end, 0, region_mirror, write);
	339	memory_install_write16_handler(space, region_start, region_end, 0, region_mirror, write);
336	340	else if (writebank != NULL)
337		memory_install_write_bank(cpu_get_address_space(chip->cpu, ADDRESS_SPACE_PROGRAM), region_start, region_end, 0, region_mirror, writebank);
	341	memory_install_write_bank(space, region_start, region_end, 0, region_mirror, writebank);
	342	else
	343	memory_unmap_write(space, region_start, region_end, 0, region_mirror);
338	344
339	345	/* set the bank pointer */
340	346	if (readbank != NULL)

src/mame/machine/stfight.c

r8962	r8963
49	49
50	50	DRIVER_INIT( empcity )
51	51	{
52		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	52	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
53	53	UINT8 *rom = memory_region(machine, "maincpu");
54	54	int A;
55	55
56	56	decrypt = auto_alloc_array(machine, UINT8, 0x8000);
57		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	57	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
58	58
59	59	for (A = 0;A < 0x8000;A++)
60	60	{
r8962	r8963
93	93
94	94	MACHINE_RESET( stfight )
95	95	{
96		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	96	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
97	97	adpcm_data_offs = adpcm_data_end = 0;
98	98	toggle = 0;
99	99	fm_data = 0;

src/mame/machine/tait8741.c

r8962	r8963
122	122	}
123	123
124	124	/* 8741 update */
125		static void taito8741_update(const address_space *space, int num)
	125	static void taito8741_update(address_space *space, int num)
126	126	{
127	127	I8741 *st,*sst;
128	128	int next = num;
r8962	r8963
273	273	}
274	274
275	275	/* read status port */
276		static int I8741_status_r(const address_space *space, int num)
	276	static int I8741_status_r(address_space *space, int num)
277	277	{
278	278	I8741 *st = &taito8741[num];
279	279	taito8741_update(space, num);
r8962	r8963
282	282	}
283	283
284	284	/* read data port */
285		static int I8741_data_r(const address_space *space, int num)
	285	static int I8741_data_r(address_space *space, int num)
286	286	{
287	287	I8741 *st = &taito8741[num];
288	288	int ret = st->toData;
r8962	r8963
302	302	}
303	303
304	304	/* Write data port */
305		static void I8741_data_w(const address_space *space, int num, int data)
	305	static void I8741_data_w(address_space *space, int num, int data)
306	306	{
307	307	I8741 *st = &taito8741[num];
308	308	LOG(("%s:8741-%d DATA Write %02x\n",cpuexec_describe_context(space->machine),num,data));
r8962	r8963
313	313	}
314	314
315	315	/* Write command port */
316		static void I8741_command_w(const address_space *space, int num, int data)
	316	static void I8741_command_w(address_space *space, int num, int data)
317	317	{
318	318	I8741 *st = &taito8741[num];
319	319	LOG(("%s:8741-%d CMD Write %02x\n",cpuexec_describe_context(space->machine),num,data));
r8962	r8963
444	444	}
445	445	}
446	446
447		static void josvolly_8741_w(const address_space *space, int num, int offset, int data)
	447	static void josvolly_8741_w(address_space *space, int num, int offset, int data)
448	448	{
449	449	JV8741 *mcu = &i8741[num];
450	450
r8962	r8963
507	507	josvolly_8741_do(space->machine, num);
508	508	}
509	509
510		static INT8 josvolly_8741_r(const address_space *space,int num,int offset)
	510	static INT8 josvolly_8741_r(address_space *space,int num,int offset)
511	511	{
512	512	JV8741 *mcu = &i8741[num];
513	513	int ret;
r8962	r8963
548	548	cyclemb_mcu.rst = 1;
549	549	}
550	550
551		static void cyclemb_8741_w(const address_space *space, int num, int offset, int data)
	551	static void cyclemb_8741_w(address_space *space, int num, int offset, int data)
552	552	{
553	553	if(offset == 1) //command port
554	554	{
r8962	r8963
590	590	}
591	591	}
592	592
593		static INT8 cyclemb_8741_r(const address_space *space,int num,int offset)
	593	static INT8 cyclemb_8741_r(address_space *space,int num,int offset)
594	594	{
595	595	if(offset == 1) //status port
596	596	{

src/mame/machine/deco102.c

r8962	r8963
50	50	void deco102_decrypt_cpu(running_machine *machine, const char *cputag, int address_xor, int data_select_xor, int opcode_select_xor)
51	51	{
52	52	int i;
53		const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
	53	address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
54	54	UINT16 *rom = (UINT16 *)memory_region(machine, cputag);
55	55	int size = memory_region_length(machine, cputag);
56	56	UINT16 *opcodes = auto_alloc_array(machine, UINT16, size / 2);
r8962	r8963
58	58
59	59	memcpy(buf, rom, size);
60	60
61		memory_set_decrypted_region(space, 0, size - 1, opcodes);
	61	space->set_decrypted_region(0, size - 1, opcodes);
62	62	m68k_set_encrypted_opcode_range(machine->device(cputag), 0, size);
63	63
64	64	for (i = 0; i < size / 2; i++)

src/mame/machine/balsente.c

r8962	r8963
132	132
133	133	MACHINE_RESET( balsente )
134	134	{
135		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	135	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
136	136	balsente_state *state = machine->driver_data<balsente_state>();
137	137	int numbanks;
138	138

src/mame/machine/vsnes.c

r8962	r8963
201	201
202	202	MACHINE_START( vsnes )
203	203	{
204		const address_space *ppu1_space = cpu_get_address_space(machine->device("ppu1"), ADDRESS_SPACE_PROGRAM);
	204	address_space *ppu1_space = cpu_get_address_space(machine->device("ppu1"), ADDRESS_SPACE_PROGRAM);
205	205	int i;
206	206
207	207	/* establish nametable ram */

src/mame/machine/taitosj.c

r8962	r8963
44	44
45	45	MACHINE_RESET( taitosj )
46	46	{
47		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	47	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
48	48	/* set the default ROM bank (many games only have one bank and */
49	49	/* never write to the bank selector register) */
50	50	taitosj_bankswitch_w(space, 0, 0);
r8962	r8963
216	216	}
217	217	if (~data & 0x10)
218	218	{
219		const address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	219	address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
220	220	LOG(("%04x: 68705 write %02x to address %04x\n",cpu_get_pc(space->cpu), portA_out, address));
221	221
222		memory_write_byte(cpu0space, address, portA_out);
	222	cpu0space->write_byte(address, portA_out);
223	223
224	224	/* increase low 8 bits of latched address for burst writes */
225	225	address = (address & 0xff00) | ((address + 1) & 0xff);
226	226	}
227	227	if (~data & 0x20)
228	228	{
229		const address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
230		portA_in = memory_read_byte(cpu0space, address);
	229	address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	230	portA_in = cpu0space->read_byte(address);
231	231	LOG(("%04x: 68705 read %02x from address %04x\n", cpu_get_pc(space->cpu), portA_in, address));
232	232	}
233	233	if (~data & 0x40)

src/mame/machine/mc8123.c

r8962	r8963
377	377
378	378	void mc8123_decrypt_rom(running_machine *machine, const char *cpu, const char *keyrgn, const char *bankname, int numbanks)
379	379	{
380		const address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
	380	address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
381	381	int fixed_length = numbanks == 1 ? 0xc000 : 0x8000;
382	382	UINT8 *decrypted1 = auto_alloc_array(machine, UINT8, fixed_length);
383	383	UINT8 *decrypted2 = numbanks > 1 ? auto_alloc_array(machine, UINT8, 0x4000 * numbanks) : 0;
r8962	r8963
385	385	UINT8 *key = memory_region(machine, keyrgn);
386	386	int A, bank;
387	387
388		memory_set_decrypted_region(space, 0x0000, fixed_length-1, decrypted1);
	388	space->set_decrypted_region(0x0000, fixed_length-1, decrypted1);
389	389
390	390	for (A = 0x0000;A < fixed_length;A++)
391	391	{

src/mame/machine/atarigen.c

r8962	r8963
491	491	}
492	492
493	493
494		static DIRECT_UPDATE_HANDLER( atarigen_slapstic_setdirect )
	494	DIRECT_UPDATE_HANDLER( atarigen_slapstic_setdirect )
495	495	{
496		atarigen_state *state = space->machine->driver_data<atarigen_state>();
	496	atarigen_state *state = machine->driver_data<atarigen_state>();
497	497
498	498	/* if we jump to an address in the slapstic region, tweak the slapstic
499	499	at that address and return ~0; this will cause us to be called on
r8962	r8963
501	501	address &= ~state->slapstic_mirror;
502	502	if (address >= state->slapstic_base && address < state->slapstic_base + 0x8000)
503	503	{
504		offs_t pc = cpu_get_previouspc(space->cpu);
	504	offs_t pc = cpu_get_previouspc(&direct.space().device());
505	505	if (pc != state->slapstic_last_pc || address != state->slapstic_last_address)
506	506	{
507	507	state->slapstic_last_pc = pc;
508	508	state->slapstic_last_address = address;
509		atarigen_slapstic_r(space, (address >> 1) & 0x3fff, 0xffff);
	509	atarigen_slapstic_r(&direct.space(), (address >> 1) & 0x3fff, 0xffff);
510	510	}
511	511	return ~0;
512	512	}
r8962	r8963
548	548	/* install an opcode base handler if we are a 68000 or variant */
549	549	state->slapstic_base = base;
550	550	state->slapstic_mirror = mirror;
551		memory_set_direct_update_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), atarigen_slapstic_setdirect);
	551
	552	address_space *space = downcast<cpu_device *>(device)->space(AS_PROGRAM);
	553	space->set_direct_update_handler(direct_update_delegate_create_static(atarigen_slapstic_setdirect, *device->machine));
552	554	}
553	555	}
554	556
r8962	r8963
800	802	static TIMER_CALLBACK( delayed_sound_reset )
801	803	{
802	804	atarigen_state *state = machine->driver_data<atarigen_state>();
803		const address_space *space = cpu_get_address_space(state->sound_cpu, ADDRESS_SPACE_PROGRAM);
	805	address_space *space = cpu_get_address_space(state->sound_cpu, ADDRESS_SPACE_PROGRAM);
804	806
805	807	/* unhalt and reset the sound CPU */
806	808	if (param == 0)

src/mame/machine/namcos2.c

r8962	r8963
110	110
111	111	MACHINE_RESET( namcos2 )
112	112	{
113		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	113	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
114	114	mFinalLapProtCount = 0;
115	115	namcos2_mcu_analog_ctrl = 0;
116	116	namcos2_mcu_analog_data = 0xaa;
r8962	r8963
486	486	}
487	487
488	488	static UINT16
489		ReadWriteC148( const address_space *space, offs_t offset, UINT16 data, int bWrite )
	489	ReadWriteC148( address_space *space, offs_t offset, UINT16 data, int bWrite )
490	490	{
491	491	offs_t addr = ((offset * 2) + 0x1c0000) & 0x1fe000;
492	492	running_device *altcpu = NULL;

src/mame/machine/cclimber.c

r8962	r8963
6	6
7	7	static void cclimber_decode(running_machine *machine, const UINT8 convtable[8][16])
8	8	{
9		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	9	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
10	10	UINT8 *rom = memory_region(machine, "maincpu");
11	11	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
12	12	int A;
13	13
14		memory_set_decrypted_region(space, 0x0000, 0xffff, decrypt);
	14	space->set_decrypted_region(0x0000, 0xffff, decrypt);
15	15
16	16	for (A = 0x0000;A < 0x10000;A++)
17	17	{

src/mame/machine/mcr.c

r8962	r8963
592	592
593	593	WRITE_LINE_DEVICE_HANDLER( zwackery_ca2_w )
594	594	{
595		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	595	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
596	596	csdeluxe_data_w(space, 0, (state << 4) | zwackery_sound_data);
597	597	}
598	598

src/mame/machine/s24fd.c

r8962	r8963
55	55	{
56	56	/* copy cached state */
57	57	s24_fd1094_userregion = s24_fd1094_cacheregion[i];
58		memory_set_decrypted_region(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0, s24_fd1094_cpuregionsize - 1, s24_fd1094_userregion);
	58	machine->device<cpu_device>("sub")->space(AS_PROGRAM)->set_decrypted_region(0, s24_fd1094_cpuregionsize - 1, s24_fd1094_userregion);
59	59	m68k_set_encrypted_opcode_range(machine->device("sub"), 0, s24_fd1094_cpuregionsize);
60	60
61	61	return;
r8962	r8963
76	76
77	77	/* copy newly decrypted data to user region */
78	78	s24_fd1094_userregion = s24_fd1094_cacheregion[fd1094_current_cacheposition];
79		memory_set_decrypted_region(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0, s24_fd1094_cpuregionsize - 1, s24_fd1094_userregion);
	79	machine->device<cpu_device>("sub")->space(AS_PROGRAM)->set_decrypted_region(0, s24_fd1094_cpuregionsize - 1, s24_fd1094_userregion);
80	80	m68k_set_encrypted_opcode_range(machine->device("sub"), 0, s24_fd1094_cpuregionsize);
81	81
82	82	fd1094_current_cacheposition++;

src/mame/machine/tatsumi.c

r8962	r8963
74	74
75	75	READ16_HANDLER( apache3_v30_v20_r )
76	76	{
77		const address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	77	address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
78	78
79	79	/* Each V20 byte maps to a V30 word */
80	80	if ((tatsumi_control_word & 0xe0) == 0xe0)
r8962	r8963
85	85	offset += 0x00000; // main ram
86	86	else
87	87	logerror("%08x: unmapped read z80 rom %08x\n", cpu_get_pc(space->cpu), offset);
88		return 0xff00 | memory_read_byte(targetspace, offset);
	88	return 0xff00 | targetspace->read_byte(offset);
89	89	}
90	90
91	91	WRITE16_HANDLER( apache3_v30_v20_w )
92	92	{
93		const address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	93	address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
94	94
95	95	if ((tatsumi_control_word & 0xe0) != 0x80)
96	96	logerror("%08x: write unmapped v30 rom %08x\n", cpu_get_pc(space->cpu), offset);
r8962	r8963
98	98	/* Only 8 bits of the V30 data bus are connected - ignore writes to the other half */
99	99	if (ACCESSING_BITS_0_7)
100	100	{
101		memory_write_byte(targetspace, offset, data & 0xff);
	101	targetspace->write_byte(offset, data & 0xff);
102	102	}
103	103	}
104	104
r8962	r8963
150	150
151	151	READ16_HANDLER( roundup_v30_z80_r )
152	152	{
153		const address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	153	address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
154	154
155	155	/* Each Z80 byte maps to a V30 word */
156	156	if (tatsumi_control_word & 0x20)
157	157	offset += 0x8000; /* Upper half */
158	158
159		return 0xff00 | memory_read_byte(targetspace, offset);
	159	return 0xff00 | targetspace->read_byte(offset);
160	160	}
161	161
162	162	WRITE16_HANDLER( roundup_v30_z80_w )
163	163	{
164		const address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	164	address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
165	165
166	166	/* Only 8 bits of the V30 data bus are connected - ignore writes to the other half */
167	167	if (ACCESSING_BITS_0_7)
r8962	r8963
169	169	if (tatsumi_control_word & 0x20)
170	170	offset += 0x8000; /* Upper half of Z80 address space */
171	171
172		memory_write_byte(targetspace, offset, data & 0xff);
	172	targetspace->write_byte(offset, data & 0xff);
173	173	}
174	174	}
175	175
r8962	r8963
345	345	// self-test in Tatsumi games.  Needs fixed, but hack it here for now.
346	346	READ8_DEVICE_HANDLER(tatsumi_hack_ym2151_r)
347	347	{
348		const address_space *space = cputag_get_address_space(device->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	348	address_space *space = cputag_get_address_space(device->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
349	349	int r=ym2151_status_port_r(device,0);
350	350
351	351	if (cpu_get_pc(space->cpu)==0x2aca || cpu_get_pc(space->cpu)==0x29fe
r8962	r8963
359	359	// Mame really should emulate the OKI status reads even with Mame sound off.
360	360	READ8_DEVICE_HANDLER(tatsumi_hack_oki_r)
361	361	{
362		const address_space *space = cputag_get_address_space(device->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	362	address_space *space = cputag_get_address_space(device->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
363	363	int r=okim6295_r(device,0);
364	364
365	365	if (cpu_get_pc(space->cpu)==0x2b70 || cpu_get_pc(space->cpu)==0x2bb5

src/mame/machine/archimds.c

r8962	r8963
267	267	page = (offset<<2) / page_sizes[memc_pagesize];
268	268	poffs = (offset<<2) % page_sizes[memc_pagesize];
269	269
270		//      printf("Reading offset %x (addr %x): page %x (size %d %d) offset %x ==> %x %x\n", offset, offset<<2, page, memc_pagesize, page_sizes[memc_pagesize], poffs, memc_pages[page], memc_pages[page]*page_sizes[memc_pagesize]);
	270	//      printf("Reading offset %x (addr %x): page %x (size %d %d) offset %x ==> %x %x\n", offset, offset<<2, page, memc_pagesize, page_sizes[memc_pagesize], poffs, memc_pages[page], memc_pages[page]*page_sizes[memc_pagesize]);
271	271
272	272	if (memc_pages[page] != -1)
273	273	{
r8962	r8963
339	339
340	340	void archimedes_driver_init(running_machine *machine)
341	341	{
342		//   address_space *space = machine->device<arm_device>("maincpu")->space(AS_PROGRAM);
343		//   space->set_direct_update_handler(direct_update_delegate_create_static(a310_setopbase, *machine));
	342	//  address_space *space = machine->device<arm_device>("maincpu")->space(AS_PROGRAM);
	343	//  space->set_direct_update_handler(direct_update_delegate_create_static(a310_setopbase, *machine));
344	344	}
345	345
346	346	static const char *const ioc_regnames[] =
r8962	r8963
711	711	{
712	712	/* sanity checks - first pass */
713	713	/*
714		total cycles + border end
715		*/
	714	total cycles + border end
	715	*/
716	716	if(vidc_regs[VIDC_HCR] && vidc_regs[VIDC_HBER] &&
717	717	vidc_regs[VIDC_VCR] && vidc_regs[VIDC_VBER])
718	718	{
719	719	/* sanity checks - second pass */
720	720	/*
721		total cycles >= border end >= border start
722		*/
	721	total cycles >= border end >= border start
	722	*/
723	723	if((vidc_regs[VIDC_HCR] >= vidc_regs[VIDC_HBER]) &&
724	724	(vidc_regs[VIDC_HBER] >= vidc_regs[VIDC_HBSR]) &&
725	725	(vidc_regs[VIDC_VCR] >= vidc_regs[VIDC_VBER]) &&
r8962	r8963
810	810	{
811	811	vidc_stereo_reg[(reg >> 2) & 7] = val & 0x07;
812	812
813		//      popmessage("%02x %02x %02x %02x %02x %02x %02x %02x",vidc_stereo_reg[0],vidc_stereo_reg[1],vidc_stereo_reg[2],vidc_stereo_reg[3]
814		//      ,vidc_stereo_reg[4],vidc_stereo_reg[5],vidc_stereo_reg[6],vidc_stereo_reg[7]);
	813	//      popmessage("%02x %02x %02x %02x %02x %02x %02x %02x",vidc_stereo_reg[0],vidc_stereo_reg[1],vidc_stereo_reg[2],vidc_stereo_reg[3]
	814	//      ,vidc_stereo_reg[4],vidc_stereo_reg[5],vidc_stereo_reg[6],vidc_stereo_reg[7]);
815	815	}
816	816	else if (reg >= 0x80 && reg <= 0xbc)
817	817	{
818	818	switch(reg)
819	819	{
820		case VIDC_HCR:  vidc_regs[VIDC_HCR] =  ((val >> 14)<<1)+1;    break;
821		//         case VIDC_HSWR: vidc_regs[VIDC_HSWR] = (val >> 14)+1;    break;
822		case VIDC_HBSR: vidc_regs[VIDC_HBSR] = ((val >> 14)<<1)+1;    break;
	820	case VIDC_HCR:  vidc_regs[VIDC_HCR] =  ((val >> 14)<<1)+1;   break;
	821	//          case VIDC_HSWR: vidc_regs[VIDC_HSWR] = (val >> 14)+1;   break;
	822	case VIDC_HBSR: vidc_regs[VIDC_HBSR] = ((val >> 14)<<1)+1;   break;
823	823	case VIDC_HDSR: vidc_regs[VIDC_HDSR] = (val >> 14);    break;
824	824	case VIDC_HDER: vidc_regs[VIDC_HDER] = (val >> 14);    break;
825		case VIDC_HBER: vidc_regs[VIDC_HBER] = ((val >> 14)<<1)+1;    break;
826		//         #define VIDC_HCSR      0x98
827		//         #define VIDC_HIR      0x9c
	825	case VIDC_HBER: vidc_regs[VIDC_HBER] = ((val >> 14)<<1)+1;   break;
	826	//          #define VIDC_HCSR       0x98
	827	//          #define VIDC_HIR        0x9c
828	828
829	829	case VIDC_VCR:  vidc_regs[VIDC_VCR] = ((val >> 14)<<1)+1;   break;
830		//         #define VIDC_VSWR      0xa4
831		case VIDC_VBSR: vidc_regs[VIDC_VBSR] = (val >> 14)+1;    break;
	830	//          #define VIDC_VSWR       0xa4
	831	case VIDC_VBSR: vidc_regs[VIDC_VBSR] = (val >> 14)+1;   break;
832	832	case VIDC_VDSR: vidc_regs[VIDC_VDSR] = (val >> 14)+1;   break;
833	833	case VIDC_VDER: vidc_regs[VIDC_VDER] = (val >> 14)+1;   break;
834	834	case VIDC_VBER: vidc_regs[VIDC_VBER] = (val >> 14)+1;   break;
835		//         #define VIDC_VCSR      0xb8
836		//         #define VIDC_VCER      0xbc
	835	//          #define VIDC_VCSR       0xb8
	836	//          #define VIDC_VCER       0xbc
837	837	}
838	838
839	839
r8962	r8963
1000	1000	break;
1001	1001	}
1002	1002
1003		//   log >>= (12 + memc_pagesize);
	1003	//  log >>= (12 + memc_pagesize);
1004	1004
1005	1005	// always make sure ROM mode is disconnected when this occurs
1006	1006	memc_latchrom = 0;

src/mame/machine/galaxold.c

r8962	r8963
319	319	DRIVER_INIT( moonqsr )
320	320	{
321	321	offs_t i;
322		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	322	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
323	323	UINT8 *rom = memory_region(machine, "maincpu");
324	324	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
325	325
326		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	326	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
327	327
328	328	for (i = 0;i < 0x8000;i++)
329	329	decrypt[i] = decode_mooncrst(rom[i],i);
r8962	r8963
397	397
398	398	DRIVER_INIT( 4in1 )
399	399	{
400		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	400	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
401	401	offs_t i, len = memory_region_length(machine, "maincpu");
402	402	UINT8 *RAM = memory_region(machine, "maincpu");
403	403

src/mame/machine/gaelcrpt.c

r8962	r8963
120	120
121	121
122	122
123		UINT16 gaelco_decrypt(const address_space *space, int offset, int data, int param1, int param2)
	123	UINT16 gaelco_decrypt(address_space *space, int offset, int data, int param1, int param2)
124	124	{
125	125	static int lastpc, lastoffset, lastencword, lastdecword;
126	126

src/mame/machine/harddriv.c

r8962	r8963
689	689	}
690	690
691	691
692		INLINE void stmsp_sync_w(const address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int which)
	692	INLINE void stmsp_sync_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int which)
693	693	{
694	694	harddriv_state *state = space->machine->driver_data<harddriv_state>();
695	695	UINT16 newdata = state->stmsp_sync[which][offset];
r8962	r8963
1164	1164
1165	1165	while (count68k > 0 && state->adsp_data_memory[0x16e6] > 0)
1166	1166	{
1167		memory_write_word(space, destaddr, state->ds3_gdata);
	1167	space->write_word(destaddr, state->ds3_gdata);
1168	1168	{
1169	1169	state->adsp_data_memory[0x16e6]--;
1170	1170	state->ds3_gdata = state->adsp_pgm_memory[i6] >> 8;

src/mame/machine/segacrpt.c

r8962	r8963
217	217	{
218	218	int A;
219	219
220		const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
	220	address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
221	221	int length = memory_region_length(machine, cputag);
222	222	int cryptlen = MIN(length, 0x8000);
223	223	UINT8 *rom = memory_region(machine, cputag);
224	224	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0xc000);
225	225
226		memory_set_decrypted_region(space, 0x0000, cryptlen - 1, decrypted);
	226	space->set_decrypted_region(0x0000, cryptlen - 1, decrypted);
227	227
228	228	for (A = 0x0000;A < cryptlen;A++)
229	229	{
r8962	r8963
439	439
440	440	int A;
441	441
442		const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
	442	address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
443	443	UINT8 *rom = memory_region(machine, regiontag);
444	444	int bankstart;
445	445	decrypted = auto_alloc_array(machine, UINT8, 0x6000*3);
r8962	r8963
473	473
474	474	memory_configure_bank(machine, "bank1",0,3, memory_region(machine, regiontag),0x6000);
475	475	memory_configure_bank_decrypted(machine, "bank1",0,3,decrypted,0x6000);
476		memory_set_decrypted_region(space, 0x0000, 0x5fff, decrypted);
	476	space->set_decrypted_region(0x0000, 0x5fff, decrypted);
477	477	memory_set_bank(space->machine, "bank1", 0);
478	478	}
479	479
r8962	r8963
797	797
798	798	int A;
799	799
800		const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
	800	address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
801	801	UINT8 *rom = memory_region(machine, cputag);
802	802	decrypted = auto_alloc_array(machine, UINT8, 0x9000);
803	803
r8962	r8963
832	832
833	833	memory_configure_bank(machine, "bank1",0,8, memory_region(machine, cputag)+0x7000,0x0400);
834	834	memory_configure_bank_decrypted(machine, "bank1",0,8,decrypted+0x7000,0x0400);
835		memory_set_decrypted_region(space, 0x0000, 0x6bff, decrypted);
	835	space->set_decrypted_region(0x0000, 0x6bff, decrypted);
836	836	memory_set_bank(space->machine, "bank1", 0);
837	837	}
838	838

src/mame/machine/kaneko16.c

r8962	r8963
1714	1714
1715	1715
1716	1716
1717		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1717	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1718	1718	UINT8* rom = memory_region(machine,"cpu1");
1719	1719	UINT8 numregions;
1720	1720	UINT16 length;
r8962	r8963
1814	1814	//printf("save to eeprom\n");
1815	1815
1816	1816	{
1817		const address_space *eeprom_space = space->machine->device<eeprom_device>("eeprom")->space();
	1817	address_space *eeprom_space = space->machine->device<eeprom_device>("eeprom")->space();
1818	1818
1819	1819	for (i=0;i<0x80;i++)
1820	1820	{
1821		memory_write_byte(eeprom_space, i, memory_read_byte(space, calc3_eeprom_addr+0x200000+i));
	1821	eeprom_space->write_byte(i, space->read_byte(calc3_eeprom_addr+0x200000+i));
1822	1822	}
1823	1823
1824	1824	}
r8962	r8963
1918	1918	{
1919	1919	if (space)
1920	1920	{
1921		memory_write_byte(space, dstoffset+i, dat);
	1921	space->write_byte(dstoffset+i, dat);
1922	1922	}
1923	1923
1924	1924	// debug, used to output tables at the start
r8962	r8963
1992	1992	{
1993	1993	if (space)
1994	1994	{
1995		memory_write_byte(space, dstoffset+i, dat);
	1995	space->write_byte(dstoffset+i, dat);
1996	1996	}
1997	1997
1998	1998	// debug, used to output tables at the start
r8962	r8963
2107	2107	{
2108	2108	UINT16 mcu_command;
2109	2109	int i;
2110		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2110	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2111	2111
2112	2112	if ( calc3_mcu_status != (1|2|4|8) )   return;
2113	2113
2114		if (calc3_dsw_addr) memory_write_byte(space, calc3_dsw_addr+0x200000, ( ~input_port_read(machine, "DSW1"))&0xff); // // DSW // dsw actually updates in realtime - mcu reads+writes it every frame
	2114	if (calc3_dsw_addr) space->write_byte(calc3_dsw_addr+0x200000, ( ~input_port_read(machine, "DSW1"))&0xff); // // DSW // dsw actually updates in realtime - mcu reads+writes it every frame
2115	2115
2116	2116
2117	2117	//calc3_mcu_status = 0;
r8962	r8963
2152	2152	printf("Calc 3 Init Command - %04x ROM Checksum Address\n",  cakc3_checkumaddress);
2153	2153	printf("Calc 3 Init Command - %08x Data Write Address\n",  calc3_writeaddress);
2154	2154	#endif
2155		//      memory_write_byte(space, calc3_dsw_addr+0x200000, ( ~input_port_read(machine, "DSW1"))&0xff); // // DSW // dsw actually updates in realtime - mcu reads+writes it every frame
	2155	//      space->write_byte(calc3_dsw_addr+0x200000, ( ~input_port_read(machine, "DSW1"))&0xff); // // DSW // dsw actually updates in realtime - mcu reads+writes it every frame
2156	2156
2157	2157	kaneko16_mcu_ram[cakc3_checkumaddress / 2] = calc3_mcu_crc;            // MCU Rom Checksum!
2158	2158
r8962	r8963
2164	2164	*/
2165	2165
2166	2166	{
2167		const address_space *eeprom_space = space->machine->device<eeprom_device>("eeprom")->space();
	2167	address_space *eeprom_space = space->machine->device<eeprom_device>("eeprom")->space();
2168	2168
2169	2169	for (i=0;i<0x80;i++)
2170	2170	{
2171		memory_write_byte(space, calc3_eeprom_addr+0x200000+i, memory_read_byte(eeprom_space, i));
	2171	space->write_byte(calc3_eeprom_addr+0x200000+i, eeprom_space->read_byte(i));
2172	2172	}
2173	2173
2174	2174	}
r8962	r8963
2207	2207	printf("writing back address %08x to %08x %08x\n", calc3_writeaddress_current, commandaddr,write);
2208	2208	#endif
2209	2209
2210		memory_write_byte(space,write+0x200000, data_header[0]);
2211		memory_write_byte(space,write+0x200001, data_header[1]);
	2210	space->write_byte(write+0x200000, data_header[0]);
	2211	space->write_byte(write+0x200001, data_header[1]);
2212	2212
2213	2213	write=commandaddr+(char)commandunk;
2214		memory_write_word(space,write+0x200000, (calc3_writeaddress_current>>16)&0xffff);
2215		memory_write_word(space,write+0x200002,  (calc3_writeaddress_current&0xffff));
	2214	space->write_word(write+0x200000, (calc3_writeaddress_current>>16)&0xffff);
	2215	space->write_word(write+0x200002,  (calc3_writeaddress_current&0xffff));
2216	2216
2217	2217	calc3_writeaddress_current += ((length+3)&(~1));
2218	2218	}

src/mame/machine/williams.c

r8962	r8963
441	441
442	442	static STATE_POSTLOAD( williams2_postload )
443	443	{
444		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	444	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
445	445	williams2_bank_select_w(space, 0, vram_bank);
446	446	}
447	447
r8962	r8963
460	460
461	461	MACHINE_RESET( williams2 )
462	462	{
463		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	463	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
464	464
465	465	/* make sure our banking is reset */
466	466	williams2_bank_select_w(space, 0, 0);
r8962	r8963
725	725
726	726	static STATE_POSTLOAD( defender_postload )
727	727	{
728		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	728	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
729	729	defender_bank_select_w(space, 0, vram_bank);
730	730	}
731	731
r8962	r8963
743	743
744	744	MACHINE_RESET( defender )
745	745	{
746		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	746	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
747	747
748	748	MACHINE_RESET_CALL(williams_common);
749	749

src/mame/machine/cps2crpt.c

r8962	r8963
632	632
633	633	static void cps2_decrypt(running_machine *machine, const UINT32 *master_key, UINT32 upper_limit)
634	634	{
635		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	635	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
636	636	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
637	637	int length = memory_region_length(machine, "maincpu");
638	638	UINT16 *dec = auto_alloc_array(machine, UINT16, length/2);
r8962	r8963
720	720	}
721	721	}
722	722
723		memory_set_decrypted_region(space, 0x000000, length - 1, dec);
	723	space->set_decrypted_region(0x000000, length - 1, dec);
724	724	m68k_set_encrypted_opcode_range(machine->device("maincpu"), 0, length);
725	725	}
726	726

src/mame/machine/starwars.c

r8962	r8963
10	10	#include "emu.h"
11	11	#include "includes/starwars.h"
12	12	#include "machine/x2212.h"
13		#include "video/avgdvg.h"
14	13
15	14
16	15	/* Control select values for ADC_R */

src/mame/machine/model1.c

r8962	r8963
42	42	static UINT32 *ram_data;
43	43	static float tgp_vr_base[4];
44	44
45		static UINT32 fifoout_pop(const address_space *space)
	45	static UINT32 fifoout_pop(address_space *space)
46	46	{
47	47	UINT32 v;
48	48	if(fifoout_wpos == fifoout_rpos) {
r8962	r8963
88	88	return v;
89	89	}
90	90
91		static void fifoin_push(const address_space *space, UINT32 data)
	91	static void fifoin_push(address_space *space, UINT32 data)
92	92	{
93	93	//  logerror("TGP FIFOIN write %08x (%x)\n", data, cpu_get_pc(space->cpu));
94	94	fifoin_data[fifoin_wpos++] = data;
r8962	r8963
2010	2010	return 1;
2011	2011	}
2012	2012
2013		static void copro_fifoin_push(const address_space *space, UINT32 data)
	2013	static void copro_fifoin_push(address_space *space, UINT32 data)
2014	2014	{
2015	2015	if (copro_fifoin_num == FIFO_SIZE)
2016	2016	{
r8962	r8963
2028	2028	copro_fifoin_num++;
2029	2029	}
2030	2030
2031		static UINT32 copro_fifoout_pop(const address_space *space)
	2031	static UINT32 copro_fifoout_pop(address_space *space)
2032	2032	{
2033	2033	UINT32 r;
2034	2034

src/mame/machine/seicop.c

r8962	r8963
1505	1505	/*      -the second value should be end of calculation (in other words,check everything between the two values) */
1506	1506	#define PLAYER 0
1507	1507	#define ENEMY 1
1508		static void protection_move_jsr(const address_space *space,UINT32 work_ram,UINT8 k)
	1508	static void protection_move_jsr(address_space *space,UINT32 work_ram,UINT8 k)
1509	1509	{
1510	1510	static UINT32 move_data,x_data,y_data;
1511	1511	/*Read the movement data to execute*/
1512		move_data = ((memory_read_word(space, work_ram+0x34)<<16) & 0xffff0000) |
1513		(memory_read_word(space, work_ram+0x36) & 0xffff);
	1512	move_data = ((space->read_word(work_ram+0x34)<<16) & 0xffff0000) |
	1513	(space->read_word(work_ram+0x36) & 0xffff);
1514	1514
1515	1515	/*Read the x/y axis of the sprite to change*/
1516		x_data = (memory_read_word(space, work_ram+0x8));
1517		y_data = (memory_read_word(space, work_ram+0x4));
	1516	x_data = (space->read_word(work_ram+0x8));
	1517	y_data = (space->read_word(work_ram+0x4));
1518	1518	/*it's bit sensitive AFAIK*/
1519	1519	/*move_data hi-word on player
1520	1520	$17 = walk floor
r8962	r8963
1556	1556	break;
1557	1557	}
1558	1558	/*Write the new values to the sprite x/y data*/
1559		memory_write_word(space, work_ram+0x8,x_data);
1560		memory_write_word(space, work_ram+0x4,y_data);
	1559	space->write_word(work_ram+0x8,x_data);
	1560	space->write_word(work_ram+0x4,y_data);
1561	1561	}
1562	1562
1563	1563
1564	1564	static UINT16 hit_check;
1565	1565
1566		static void protection_hit_jsr(const address_space *space,UINT32 work_ram1,UINT32 work_ram2)
	1566	static void protection_hit_jsr(address_space *space,UINT32 work_ram1,UINT32 work_ram2)
1567	1567	{
1568	1568	int x1,y1,x2,y2/*,hit1,hit2*/;
1569		x1 = (memory_read_word(space, work_ram1+0x8));
1570		y1 = (memory_read_word(space, work_ram1+0x4));
1571		//hit1 = (memory_read_word(space, work_ram1-));//this sprite is attacking
1572		x2 = (memory_read_word(space, work_ram2+0x8));
1573		y2 = (memory_read_word(space, work_ram2+0x4));
1574		//hit2 = (memory_read_word(space));
	1569	x1 = (space->read_word(work_ram1+0x8));
	1570	y1 = (space->read_word(work_ram1+0x4));
	1571	//hit1 = (space->read_word(work_ram1-));//this sprite is attacking
	1572	x2 = (space->read_word(work_ram2+0x8));
	1573	y2 = (space->read_word(work_ram2+0x4));
	1574	//hit2 = (space));
1575	1575
1576	1576	popmessage("%08x:x=%04x y=%04x %08x:x=%04x y=%04x",work_ram1,x1,y1,work_ram2,x2,y2);
1577	1577
r8962	r8963
1585	1585	}
1586	1586
1587	1587	/*directional movement protection*/
1588		static void moveprot_jsr(const address_space *space)
	1588	static void moveprot_jsr(address_space *space)
1589	1589	{
1590	1590	static INT16 x_axis,y_axis;
1591	1591	static UINT16 move_data,distance,move_type;
1592		move_data = memory_read_word(space, cop_register[0]+0x36);
1593		x_axis = memory_read_word(space, cop_register[0]+0x08);
1594		y_axis = memory_read_word(space, cop_register[0]+0x04);
	1592	move_data = space->read_word(cop_register[0]+0x36);
	1593	x_axis = space->read_word(cop_register[0]+0x08);
	1594	y_axis = space->read_word(cop_register[0]+0x04);
1595	1595
1596	1596	distance = (move_data & 0xf);
1597	1597	move_type = (move_data & 0xf0)>>4;
1598	1598	switch(move_type)
1599	1599	{
1600	1600	case 0x0f://right
1601		memory_write_word(space, cop_register[0]+0x08,x_axis+distance);
1602		//memory_write_word(space, 0x110004,);
	1601	space->write_word(cop_register[0]+0x08,x_axis+distance);
	1602	//space->write_word(0x110004,);
1603	1603	break;
1604	1604	case 0x0b://up
1605		memory_write_word(space, cop_register[0]+0x04,y_axis-distance);
	1605	space->write_word(cop_register[0]+0x04,y_axis-distance);
1606	1606	break;
1607	1607	case 0x07://left
1608		memory_write_word(space, cop_register[0]+0x08,x_axis-distance);
	1608	space->write_word(cop_register[0]+0x08,x_axis-distance);
1609	1609	break;
1610	1610	case 0x03://down
1611		memory_write_word(space, cop_register[0]+0x04,y_axis+distance);
	1611	space->write_word(cop_register[0]+0x04,y_axis+distance);
1612	1612	break;
1613	1613	case 0x0d://up-right
1614		memory_write_word(space, cop_register[0]+0x08,x_axis+distance);
1615		memory_write_word(space, cop_register[0]+0x04,y_axis-distance);
	1614	space->write_word(cop_register[0]+0x08,x_axis+distance);
	1615	space->write_word(cop_register[0]+0x04,y_axis-distance);
1616	1616	break;
1617	1617	case 0x09://up-left
1618		memory_write_word(space, cop_register[0]+0x04,y_axis-distance);
1619		memory_write_word(space, cop_register[0]+0x08,x_axis-distance);
	1618	space->write_word(cop_register[0]+0x04,y_axis-distance);
	1619	space->write_word(cop_register[0]+0x08,x_axis-distance);
1620	1620	break;
1621	1621	case 0x01://down-right
1622		memory_write_word(space, cop_register[0]+0x04,y_axis+distance);
1623		memory_write_word(space, cop_register[0]+0x08,x_axis+distance);
	1622	space->write_word(cop_register[0]+0x04,y_axis+distance);
	1623	space->write_word(cop_register[0]+0x08,x_axis+distance);
1624	1624	break;
1625	1625	case 0x05://down-left
1626		memory_write_word(space, cop_register[0]+0x04,y_axis+distance);
1627		memory_write_word(space, cop_register[0]+0x08,x_axis-distance);
	1626	space->write_word(cop_register[0]+0x04,y_axis+distance);
	1627	space->write_word(cop_register[0]+0x08,x_axis-distance);
1628	1628	break;
1629	1629	default:
1630	1630	logerror("Warning: \"0x205\" command called with move_type parameter = %02x\n",move_type);
r8962	r8963
1632	1632	//down-right
1633	1633	//down-left
1634	1634	}
1635		//memory_write_word(space, 0x110008,x_axis+tmp);
1636		//memory_write_word(space, 0x110004,y_axis+tmp);
	1635	//space->write_word(0x110008,x_axis+tmp);
	1636	//space->write_word(0x110004,y_axis+tmp);
1637	1637
1638		//memory_write_word(space, 0x110008,x_axis);
1639		//memory_write_word(space, 0x110004,y_axis);
	1638	//space->write_word(0x110008,x_axis);
	1639	//space->write_word(0x110004,y_axis);
1640	1640	}
1641	1641
1642	1642	/*
r8962	r8963
1651	1651
1652	1652	*/
1653	1653	/*sprite "look" protection*/
1654		static void move2prot_jsr(const address_space *space)
	1654	static void move2prot_jsr(address_space *space)
1655	1655	{
1656	1656	static INT16 x_pl,y_pl,x_en,y_en,res;
1657		x_pl = memory_read_word(space, cop_register[1]+0x8);
1658		y_pl = memory_read_word(space, cop_register[1]+0x4);
1659		x_en = memory_read_word(space, cop_register[0]+0x8);
1660		y_en = memory_read_word(space, cop_register[0]+0x4);
	1657	x_pl = space->read_word(cop_register[1]+0x8);
	1658	y_pl = space->read_word(cop_register[1]+0x4);
	1659	x_en = space->read_word(cop_register[0]+0x8);
	1660	y_en = space->read_word(cop_register[0]+0x4);
1661	1661
1662	1662	res = 0;
1663	1663	if(x_en > x_pl)
r8962	r8963
1669	1669	//if(y_en > y_pl)
1670	1670	//  res|=0x40;
1671	1671
1672		memory_write_word(space, cop_register[0]+0x36,res);
	1672	space->write_word(cop_register[0]+0x36,res);
1673	1673	}
1674	1674
1675	1675	#ifdef UNUSED_FUNCTION
1676	1676	/*"To point" movement protection*/
1677		static void move3x_prot_jsr(const address_space *space)
	1677	static void move3x_prot_jsr(address_space *space)
1678	1678	{
1679	1679	static INT16 x_pl,x_en,x_dis;
1680		x_pl = memory_read_word(space, cop_register[1]+0x8);
1681		x_en = memory_read_word(space, cop_register[0]+0x8);
1682		x_dis = ((memory_read_word(space, cop_register[0]+0x34) & 0xf0) >> 4);
	1680	x_pl = space->read_word(cop_register[1]+0x8);
	1681	x_en = space->read_word(cop_register[0]+0x8);
	1682	x_dis = ((space->read_word(cop_register[0]+0x34) & 0xf0) >> 4);
1683	1683
1684	1684	if(x_en > x_pl)
1685	1685	x_dis^=0xffff;
1686	1686
1687		memory_write_word(space, cop_register[0]+0x36,-0x40);/*enable command*/
1688		memory_write_word(space, cop_register[0]+0x14,x_dis);
	1687	space->write_word(cop_register[0]+0x36,-0x40);/*enable command*/
	1688	space->write_word(cop_register[0]+0x14,x_dis);
1689	1689	}
1690	1690
1691		static void move3y_prot_jsr(const address_space *space)
	1691	static void move3y_prot_jsr(address_space *space)
1692	1692	{
1693	1693	static INT16 y_pl,y_en,y_dis;
1694		y_pl = memory_read_word(space, cop_register[1]+0x4);
1695		y_en = memory_read_word(space, cop_register[0]+0x4);
1696		y_dis = (memory_read_word(space, cop_register[0]+0x34) & 0xf);
	1694	y_pl = space->read_word(cop_register[1]+0x4);
	1695	y_en = space->read_word(cop_register[0]+0x4);
	1696	y_dis = (space->read_word(cop_register[0]+0x34) & 0xf);
1697	1697
1698	1698	if(y_en > y_pl)
1699	1699	y_dis^=0xffff;
1700	1700
1701		memory_write_word(space, cop_register[0]+0x36,-0x80);/*enable command*/
1702		memory_write_word(space, cop_register[0]+0x10,y_dis);
	1701	space->write_word(cop_register[0]+0x36,-0x80);/*enable command*/
	1702	space->write_word(cop_register[0]+0x10,y_dis);
1703	1703	}
1704	1704	#endif
1705	1705
r8962	r8963
1804	1804
1805	1805	static UINT16 s_i;
1806	1806
1807		static void dma_transfer(const address_space *space)
	1807	static void dma_transfer(address_space *space)
1808	1808	{
1809	1809	static UINT16 rel_xy;
1810	1810	static UINT16 abs_x,abs_y;
r8962	r8963
1813	1813	//for(s_i = dma_size;s_i > 0;s_i--)
1814	1814	{
1815	1815	/*Sprite Color*/
1816		param = memory_read_word(space, 0x100400) & 0x3f;
	1816	param = space->read_word(0x100400) & 0x3f;
1817	1817	/*Write the entire parameters [offs+0]*/
1818		memory_write_word(space, cop_register[5]+4,memory_read_word(space, dma_src) + param);
	1818	space->write_word(cop_register[5]+4,space->read_word(dma_src) + param);
1819	1819	/*Sprite Priority (guess)*/
1820		//param = ((memory_read_word(space, 0x100400) & 0x40) ? 0x4000 : 0);
	1820	//param = ((space->read_word(0x100400) & 0x40) ? 0x4000 : 0);
1821	1821	/*Write the sprite number [offs+1]*/
1822		memory_write_word(space, cop_register[5]+6,memory_read_word(space, dma_src+2));
	1822	space->write_word(cop_register[5]+6,space->read_word(dma_src+2));
1823	1823	/*Sprite Relative x/y coords*/
1824		rel_xy = memory_read_word(space, dma_src+4); /*???*/
	1824	rel_xy = space->read_word(dma_src+4); /*???*/
1825	1825	/*temporary hardwired,it should point to 0x4c0/0x4a0*/
1826		abs_x = (memory_read_word(space, 0x110008) - memory_read_word(space, 0x10048e));
1827		abs_y = (memory_read_word(space, 0x110004) - memory_read_word(space, 0x10048c));
1828		memory_write_word(space, cop_register[5]+8,((rel_xy & 0x7f) + (abs_x) - ((rel_xy & 0x80) ? 0x80 : 0)) & 0x1ff);
1829		memory_write_word(space, cop_register[5]+10,(((rel_xy & 0x7f00) >> 8) + (abs_y) + (0x10) - ((rel_xy & 0x8000) ? 0x80 : 0)) & 0x1ff);
	1826	abs_x = (space->read_word(0x110008) - space->read_word(0x10048e));
	1827	abs_y = (space->read_word(0x110004) - space->read_word(0x10048c));
	1828	space->write_word(cop_register[5]+8,((rel_xy & 0x7f) + (abs_x) - ((rel_xy & 0x80) ? 0x80 : 0)) & 0x1ff);
	1829	space->write_word(cop_register[5]+10,(((rel_xy & 0x7f00) >> 8) + (abs_y) + (0x10) - ((rel_xy & 0x8000) ? 0x80 : 0)) & 0x1ff);
1830	1830	cop_register[5]+=8;
1831	1831	dma_src+=6;
1832	1832	}
r8962	r8963
1834	1834
1835	1835
1836	1836	/*
1837		switch(memory_read_word(space, cop_register[2]))
	1837	switch(space->read_word(cop_register[2]))
1838	1838	{
1839	1839	case 0xb4: xparam = 0x0c/2; break;
1840	1840	case 0xb8: xparam = 0x10/2; break;
r8962	r8963
1861	1861	return num;
1862	1862	}
1863	1863
1864		static UINT16 hit_check_jsr(const address_space *space)
	1864	static UINT16 hit_check_jsr(address_space *space)
1865	1865	{
1866	1866	static INT16 xsrc,xdst,ysrc,ydst,xparam,yparam;
1867		xsrc = (memory_read_word(space, 0x110008));
1868		ysrc = (memory_read_word(space, 0x110004));
1869		xdst = (memory_read_word(space, 0x110048));
1870		ydst = (memory_read_word(space, 0x110044));
	1867	xsrc = (space->read_word(0x110008));
	1868	ysrc = (space->read_word(0x110004));
	1869	xdst = (space->read_word(0x110048));
	1870	ydst = (space->read_word(0x110044));
1871	1871
1872	1872	/*Here we check the destination sprite width*/
1873	1873	/*0x4a4/0x4c4*/
1874		xparam = check_calc(memory_read_word(space, cop_register[2]));
	1874	xparam = check_calc(space->read_word(cop_register[2]));
1875	1875	/*Here we check the destination sprite height*/
1876	1876	/*0x4a6/0x4c6*/
1877		yparam = check_calc(memory_read_word(space, cop_register[3]));
	1877	yparam = check_calc(space->read_word(cop_register[3]));
1878	1878
1879	1879	if(!xparam || !yparam)
1880		popmessage("SRC:%04x %04x DST:%04x %04x V:%08x %08x",xsrc,ysrc,xdst,ydst,memory_read_word(space, cop_register[2]),memory_read_word(space, cop_register[3]));
	1880	popmessage("SRC:%04x %04x DST:%04x %04x V:%08x %08x",xsrc,ysrc,xdst,ydst,space->read_word(cop_register[2]),space->read_word(cop_register[3]));
1881	1881	if(xdst >= (xsrc-xparam) && ydst >= (ysrc-yparam) &&
1882	1882	xdst <= (xsrc+xparam) && ydst <= (ysrc+yparam))
1883	1883	return 0;//sprites collide
r8962	r8963
1897	1897	/*Heated Barrel*/
1898	1898	/*command 0x8100 will check for the direction of the sprite*/
1899	1899	/*command 0x8900 will check the "point" movement*/
1900		static void cop2_move3_prot(const address_space *space)
	1900	static void cop2_move3_prot(address_space *space)
1901	1901	{
1902	1902	static INT16 x_pl,x_en;
1903	1903	static INT16 y_pl,y_en;
1904	1904	static INT16 x_dis,y_dis;
1905	1905	static INT16 dir,dis;
1906		x_pl = memory_read_word(space, cop_register[1]+0x8);
1907		x_en = memory_read_word(space, cop_register[0]+0x8);
1908		dis = ((memory_read_word(space, cop_register[0]+0x34) & 0xf0) >> 4);
1909		y_pl = memory_read_word(space, cop_register[1]+0x4);
1910		y_en = memory_read_word(space, cop_register[0]+0x4);
	1906	x_pl = space->read_word(cop_register[1]+0x8);
	1907	x_en = space->read_word(cop_register[0]+0x8);
	1908	dis = ((space->read_word(cop_register[0]+0x34) & 0xf0) >> 4);
	1909	y_pl = space->read_word(cop_register[1]+0x4);
	1910	y_en = space->read_word(cop_register[0]+0x4);
1911	1911
1912	1912	/*
1913	1913	xxxx ---- select the direction of the enemy sprite
r8962	r8963
1946	1946	dir = DOWN;
1947	1947	}
1948	1948
1949		memory_write_word(space, cop_register[0]+0x36,dir);
	1949	space->write_word(cop_register[0]+0x36,dir);
1950	1950
1951	1951	/*TODO*/
1952	1952	x_dis = (x_pl-x_en);
r8962	r8963
1970	1970	//if(x_en > x_pl)
1971	1971	//  x_dis^=0xffff;
1972	1972
1973		memory_write_word(space, cop_register[0]+0x10,y_dis);
1974		memory_write_word(space, cop_register[0]+0x14,x_dis);
	1973	space->write_word(cop_register[0]+0x10,y_dis);
	1974	space->write_word(cop_register[0]+0x14,x_dis);
1975	1975	}
1976	1976
1977	1977	/**/
1978		static UINT16 cop2_hit_prot(const address_space *space)
	1978	static UINT16 cop2_hit_prot(address_space *space)
1979	1979	{
1980	1980	static INT16 xsrc,xdst;
1981	1981	static INT16 ysrc,ydst;
r8962	r8963
1983	1983	static INT16 param1,param2;
1984	1984	static INT16 val;
1985	1985
1986		param1 = memory_read_word(space, cop_register[2]);
1987		param2 = memory_read_word(space, cop_register[3]);
	1986	param1 = space->read_word(cop_register[2]);
	1987	param2 = space->read_word(cop_register[3]);
1988	1988
1989		xsrc = memory_read_word(space, cop_register[0]+0x8) + memory_read_word(space, cop_register[0]+0x14);
1990		ysrc = memory_read_word(space, cop_register[0]+0x4) + memory_read_word(space, cop_register[0]+0x10);
1991		xdst = memory_read_word(space, cop_register[1]+0x8) + memory_read_word(space, cop_register[1]+0x14);
1992		ydst = memory_read_word(space, cop_register[1]+0x4) + memory_read_word(space, cop_register[1]+0x10);
	1989	xsrc = space->read_word(cop_register[0]+0x8) + space->read_word(cop_register[0]+0x14);
	1990	ysrc = space->read_word(cop_register[0]+0x4) + space->read_word(cop_register[0]+0x10);
	1991	xdst = space->read_word(cop_register[1]+0x8) + space->read_word(cop_register[1]+0x14);
	1992	ydst = space->read_word(cop_register[1]+0x4) + space->read_word(cop_register[1]+0x10);
1993	1993
1994	1994	//  xp = (param1 & 0x00f0) >> 4;
1995	1995	//  yp = (param1 & 0x0f00) >> 8;
r8962	r8963
2014	2014	return 3;
2015	2015	}
2016	2016
2017		static void cop2_move2_prot(const address_space *space)
	2017	static void cop2_move2_prot(address_space *space)
2018	2018	{
2019	2019	static INT16 xsrc,ysrc;
2020	2020	static INT16 param2;
2021	2021
2022		xsrc = memory_read_word(space, cop_register[0]+0x14);
2023		ysrc = memory_read_word(space, cop_register[0]+0x10);
2024		param2 = memory_read_word(space, cop_register[3]);
	2022	xsrc = space->read_word(cop_register[0]+0x14);
	2023	ysrc = space->read_word(cop_register[0]+0x10);
	2024	param2 = space->read_word(cop_register[3]);
2025	2025
2026	2026	switch(param2)
2027	2027	{
r8962	r8963
2035	2035	case 0x18:  ysrc++; xsrc++; break; //down-right
2036	2036	}
2037	2037
2038		memory_write_word(space, cop_register[0]+0x14,xsrc);
2039		memory_write_word(space, cop_register[0]+0x10,ysrc);
	2038	space->write_word(cop_register[0]+0x14,xsrc);
	2039	space->write_word(cop_register[0]+0x10,ysrc);
2040	2040	}
2041	2041
2042	2042
r8962	r8963
2246	2246
2247	2247	INLINE UINT32 r32(offs_t address)
2248	2248	{
2249		return   (memory_read_word(space, address + 0) << 0) |
2250		(memory_read_word(space, address + 2) << 16);
	2249	return   (space->read_word(address + 0) << 0) |
	2250	(space->read_word(address + 2) << 16);
2251	2251	}
2252	2252
2253	2253	INLINE void w32(offs_t address, UINT32 data)
2254	2254	{
2255		memory_write_word(space, address + 0, data >> 0);
2256		memory_write_word(space, address + 2, data >> 16);
	2255	space->write_word(address + 0, data >> 0);
	2256	space->write_word(address + 2, data >> 16);
2257	2257	}
2258	2258
2259	2259
r8962	r8963
2325	2325	int count = (cop_ram_r(cop, 0x47a) + 1) << 5;
2326	2326	COP_LOG(("%05X:COP RAM clear from %05X to %05X\n", cpu_get_pc(space->cpu), addr, addr + count));
2327	2327	while (count--)
2328		memory_write_byte(space, addr++, 0);
	2328	space->write_byte(addr++, 0);
2329	2329	}
2330	2330	else
2331	2331	{
r8962	r8963
2578	2578
2579	2579	for (i=address;i<address+length;i+=2)
2580	2580	{
2581		memory_write_word(space, i, 0x0000);
	2581	space->write_word(i, 0x0000);
2582	2582	}
2583	2583	}
2584	2584	break;
r8962	r8963
2763	2763	case 0x8100:
2764	2764	{
2765	2765	UINT32 src = cop_register[0];
2766		memory_write_word(space, src+0x36,0xffc0);
	2766	space->write_word(src+0x36,0xffc0);
2767	2767	break;
2768	2768	}
2769	2769	case 0x8900:
2770	2770	{
2771	2771	UINT32 src = cop_register[0];
2772		memory_write_word(space, src+0x36,0xff80);
	2772	space->write_word(src+0x36,0xff80);
2773	2773	break;
2774	2774	}
2775	2775	/*Right*/
2776	2776	case 0x0205:
2777	2777	{
2778	2778	UINT32 src = cop_register[0];
2779		INT16 y = memory_read_word(space, src+0x4);
2780		INT16 x = memory_read_word(space, src+0x8);
2781		INT16 y_rel = memory_read_word(space, src+0x10);
2782		INT16 x_rel = memory_read_word(space, src+0x14);
2783		memory_write_word(space, src+0x4,(y+y_rel));
2784		memory_write_word(space, src+0x8,(x+x_rel));
	2779	INT16 y = space->read_word(src+0x4);
	2780	INT16 x = space->read_word(src+0x8);
	2781	INT16 y_rel = space->read_word(src+0x10);
	2782	INT16 x_rel = space->read_word(src+0x14);
	2783	space->write_word(src+0x4,(y+y_rel));
	2784	space->write_word(src+0x8,(x+x_rel));
2785	2785	/*logerror("%08x %08x %08x %08x %08x\n",cop_register[0],
2786		memory_read_word(space, cop_reg[0]+0x4),
2787		memory_read_word(space, cop_reg[0]+0x8),
2788		memory_read_word(space, cop_reg[0]+0x10),
2789		memory_read_word(space, cop_reg[0]+0x14));*/
	2786	space->read_word(cop_reg[0]+0x4),
	2787	space->read_word(cop_reg[0]+0x8),
	2788	space->read_word(cop_reg[0]+0x10),
	2789	space->read_word(cop_reg[0]+0x14));*/
2790	2790	break;
2791	2791	}
2792	2792	/*???*/
r8962	r8963
2794	2794	{
2795	2795	//UINT32 dst = cop_register[0];
2796	2796	//UINT32 dst = cop_register[1];
2797		//memory_write_word(space, dst,  mame_rand(space->machine)/*memory_read_word(space, src)*/);
2798		//memory_write_word(space, dst+2,mame_rand(space->machine)/*memory_read_word(space, src+2)*/);
2799		//memory_write_word(space, dst+4,mame_rand(space->machine)/*memory_read_word(space, src+4)*/);
2800		//memory_write_word(space, dst+6,mame_rand(space->machine)/*memory_read_word(space, src+6)*/);
	2797	//space->write_word(dst,  mame_rand(space->machine)/*space->read_word(src)*/);
	2798	//space->write_word(dst+2,mame_rand(space->machine)/*space->read_word(src+2)*/);
	2799	//space->write_word(dst+4,mame_rand(space->machine)/*space->read_word(src+4)*/);
	2800	//space->write_word(dst+6,mame_rand(space->machine)/*space->read_word(src+6)*/);
2801	2801	//logerror("%04x\n",cop_register[0]);
2802	2802	break;
2803	2803	}
r8962	r8963
3038	3038	dma_src+=4;
3039	3039	//cop_register[5]+=4;
3040	3040	s_i = dma_size;
3041		//cop_register[5]+=((memory_read_word(space, 0x110000) & 0x000f) * 8);
3042		//memory_write_word(space, 0x1004c8,cop_register[5] & 0xffff);
	3041	//cop_register[5]+=((space->read_word(0x110000) & 0x000f) * 8);
	3042	//space->write_word(0x1004c8,cop_register[5] & 0xffff);
3043	3043	//dma_status = 1;
3044	3044	break;
3045	3045	}
r8962	r8963
3237	3237	{
3238	3238	static UINT16 xy_data[2];
3239	3239	static UINT8 k;
3240		xy_data[0] = memory_read_word(space, cop_register[2]);
3241		xy_data[1] = memory_read_word(space, cop_register[3]);
	3240	xy_data[0] = space->read_word(cop_register[2]);
	3241	xy_data[1] = space->read_word(cop_register[3]);
3242	3242	k = (cop_mcu_ram[offset] == 0x0205) ? ENEMY : PLAYER;
3243	3243	protection_move_jsr(space,cop_register[0],k);
3244	3244	//protection_move_jsr(space,cop_register[1]); //???

src/mame/machine/slapstic.c

r8962	r8963
864	864	*
865	865	*************************************/
866	866
867		static int alt2_kludge(const address_space *space, offs_t offset)
	867	static int alt2_kludge(address_space *space, offs_t offset)
868	868	{
869	869	/* Of the 3 alternate addresses, only the middle one needs to actually hit
870	870	in the slapstic region; the first and third ones can be anywhere in the
r8962	r8963
879	879	if (MATCHES_MASK_VALUE(cpu_get_pc(space->cpu) >> 1, slapstic.alt1))
880	880	{
881	881	/* now look for a move.w (An),(An) or cmpm.w (An)+,(An)+ */
882		UINT16 opcode = memory_decrypted_read_word(space, cpu_get_previouspc(space->cpu) & 0xffffff);
	882	UINT16 opcode = space->direct().read_decrypted_word(cpu_get_previouspc(space->cpu) & 0xffffff);
883	883	if ((opcode & 0xf1f8) == 0x3090 || (opcode & 0xf1f8) == 0xb148)
884	884	{
885	885	/* fetch the value of the register for the second operand, and see */
r8962	r8963
911	911	*
912	912	*************************************/
913	913
914		int slapstic_tweak(const address_space *space, offs_t offset)
	914	int slapstic_tweak(address_space *space, offs_t offset)
915	915	{
916	916	/* reset is universal */
917	917	if (offset == 0x0000)

src/mame/machine/bagman.c

r8962	r8963
219	219
220	220	MACHINE_RESET( bagman )
221	221	{
222		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	222	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
223	223	bagman_pal16r6_w(space, 0, 1);   /*pin 2*/
224	224	bagman_pal16r6_w(space, 1, 1);   /*pin 3*/
225	225	bagman_pal16r6_w(space, 2, 1);   /*pin 4*/

src/mame/mamedriv.c

r8962	r8963
449	449	DRIVER( jngolady )   /* (c) 1984 */
450	450	DRIVER( cntrygrl )   /* (c) 1984 Royal Denshi */
451	451	DRIVER( cntrygrla ) /* (c) 1984 */
	452	DRIVER( roylcrdn )   /* (c) 1985 */
452	453	DRIVER( fruitbun )   /* (c) 1984 */
453	454	DRIVER( luckygrl )   /* (c) 1984 Wing? */
454	455	DRIVER( nightgal )   /* (c) 1984 */
r8962	r8963
1068	1069	DRIVER( dkongjo )   /* (c) 1981 Nintendo */
1069	1070	DRIVER( dkongjo1 )   /* (c) 1981 Nintendo */
1070	1071	DRIVER( dkongf )   /* hack from Jeff's Romhack */
	1072	DRIVER( dkongx )   /* hack */
	1073	DRIVER( dkongx11 )   /* hack */
1071	1074	DRIVER( dkongjr )   /* (c) 1982 Nintendo of America */
1072	1075	DRIVER( dkongjrj )   /* (c) 1982 Nintendo */
1073	1076	DRIVER( dkongjnrj )   /* (c) 1982 Nintendo */
r8962	r8963
2494	2497	DRIVER( srdmissn )   /* (c) 1986 Taito Corporation */
2495	2498	DRIVER( fx )      /* bootleg */
2496	2499	DRIVER( legend )   /* no copyright notice [1986 Sega/Coreland] (Arcade TV Game List - P.104, Left, 14 from top) */
	2500	DRIVER( legendb )   /* no copyright notice [1986 Sega/Coreland] (Arcade TV Game List - P.104, Left, 14 from top) */
2497	2501	DRIVER( airwolf )   /* (c) 1987 Kyugo */
2498	2502	DRIVER( airwolfa )   /* (c) 1987 Kyugo */
2499	2503	DRIVER( skywolf )   /* bootleg */
r8962	r8963
2723	2727	DRIVER( kod )      /* 11/07/1991 (c) 1991 (World) */
2724	2728	DRIVER( kodu )      /* 10/09/1991 (c) 1991 (US)    */
2725	2729	DRIVER( kodj )      /* 05/08/1991 (c) 1991 (Japan) */
	2730	DRIVER( kodja )      /* 05/08/1991 (c) 1991 (Japan) */
2726	2731	DRIVER( kodb )      /* bootleg */
2727	2732	DRIVER( captcomm )   /* 02/12/1991 (c) 1991 (World) */
2728	2733	DRIVER( captcommr1 )   /* 14/10/1991 (c) 1991 (World) */
r8962	r8963
2733	2738	DRIVER( knights )   /* 27/11/1991 (c) 1991 (World) */
2734	2739	DRIVER( knightsu )   /* 27/11/1991 (c) 1991 (US)    */
2735	2740	DRIVER( knightsj )   /* 27/11/1991 (c) 1991 (Japan) */
	2741	DRIVER( knightsja )   /* 27/11/1991 (c) 1991 (Japan) */
2736	2742	DRIVER( knightsb )   /* bootleg */
2737		DRIVER( sf2ce )      /* 13/03/1992 (c) 1992 (World) */
	2743	DRIVER( sf2ce )      /* 13/05/1992 (c) 1992 (World) */
	2744	DRIVER( sf2ceea )   /* 13/03/1992 (c) 1992 (World) */
2738	2745	DRIVER( sf2ceua )   /* 13/03/1992 (c) 1992 (US)    */
2739	2746	DRIVER( sf2ceub )   /* 13/05/1992 (c) 1992 (US)    */
2740	2747	DRIVER( sf2ceuc )   /* 03/08/1992 (c) 1992 (US)    */
r8962	r8963
3035	3042	/* CPS2 'Phoenix' bootlegs */
3036	3043	DRIVER( ssf2ud )
3037	3044	DRIVER( ddtodd )
	3045	DRIVER( ecofghtrd )
3038	3046	DRIVER( avspd )
3039	3047	DRIVER( dstlku1d )
3040	3048	DRIVER( ringdstd )
r8962	r8963
3044	3052	DRIVER( mshud )
3045	3053	DRIVER( 19xxd )
3046	3054	DRIVER( sfz2ad )
	3055	DRIVER( sfz2jd )
	3056	DRIVER( spf2td )
3047	3057	DRIVER( spf2xjd )
3048	3058	DRIVER( ddsomud )
3049	3059	DRIVER( megamn2d )
r8962	r8963
3053	3063	DRIVER( vsavd )
3054	3064	DRIVER( mvscud )
3055	3065	DRIVER( sfa3ud )
3056		DRIVER( gwingjd )
	3066	DRIVER( gigawingd )
	3067	DRIVER( gigawingjd )
3057	3068	DRIVER( 1944d )
3058		DRIVER( progerjd )
	3069	DRIVER( progearud )
	3070	DRIVER( progearjd )
	3071	DRIVER( progearjbl )
3059	3072	DRIVER( hsf2d )
3060	3073	DRIVER( ssf2tbd )
3061	3074	DRIVER( ssf2xjd )
r8962	r8963
3063	3076	DRIVER( armwar1d )
3064	3077	DRIVER( dimahoud )
3065	3078	DRIVER( mmatrixd )
	3079	DRIVER( vhunt2d )
	3080	DRIVER( vsav2d )
	3081	DRIVER( csclub1d )
	3082	DRIVER( cybotsud )
	3083	DRIVER( mshvsfu1d )
	3084	DRIVER( sfz3jr2d )
3066	3085
3067		/* Capcom CPS3 games */
	3086	/* Capcom CPS3 games */
3068	3087	DRIVER( sfiii )      /* 04/02/1997 (c) 1997 Capcom */
3069	3088	DRIVER( sfiiij )   /* 04/02/1997 (c) 1997 Capcom */
3070	3089	DRIVER( sfiii2 )   /* 30/09/1997 (c) 1997 Capcom */
r8962	r8963
4651	4670	DRIVER( wsbbgd )   /* 2001.06 Super Major League */
4652	4671	DRIVER( spkrbtl )   /* 2001.07 Spikers Battle */
4653	4672	DRIVER( gunsur2 )   /* 2001.07 Gun Survivor 2: Bio Hazard Code Veronica */
4654		/* 2001.07 Dokidoki Idol Star Seeker */
	4673	DRIVER( starseek )   /* 2001.07 Dokidoki Idol Star Seeker */
4655	4674	DRIVER( cvs2gd )   /* 2001.08 Capcom vs. SNK 2 */
4656	4675	DRIVER( gundmxgd )   /* 2001.09 Kidou Senshi Gundam Renpou vs. Zeon DX */
4657	4676	/* 2001.09 Alien Front */
r8962	r8963
5412	5431	DRIVER( roadf2 )   /* GX461 (c) 1984 */
5413	5432	DRIVER( yiear )      /* GX407 (c) 1985 */
5414	5433	DRIVER( yiear2 )   /* GX407 (c) 1985 */
	5434	DRIVER( yieartf )   /* GX361 (c) 1985 */
5415	5435	DRIVER( kicker )   /* GX477 (c) 1985 */
5416	5436	DRIVER( shaolins )   /* GX477 (c) 1985 */
5417	5437	DRIVER( shaolinb )   /* bootleg */
r8962	r8963
6362	6382	DRIVER( vanguardc )   /* (c) 1981 SNK + Centuri */
6363	6383	DRIVER( vanguardj )   /* (c) 1981 SNK */
6364	6384	DRIVER( fantasy )   /* (c) 1981 SNK */
6365		DRIVER( fantasyu )   /* (c) 1981 Rock-ola */
	6385	DRIVER( fantasyu )   /* (c) 1981 Rock-Ola */
6366	6386	DRIVER( fantasyj )   /* (c) 1981 SNK */
6367	6387	DRIVER( pballoon )   /* (c) 1982 SNK */
	6388	DRIVER( pballoonr )   /* (c) 1982 SNK (Rock-Ola license) */
6368	6389	DRIVER( nibbler )   /* (c) 1982 Rock-ola */
6369	6390	DRIVER( nibblera )   /* (c) 1982 Rock-ola */
6370	6391	DRIVER( nibblerb )   /* (c) 1982 Rock-ola */
r8962	r8963
6478	6499	DRIVER( kotm )      /* 0016 (c) 1991 SNK */
6479	6500	DRIVER( kotmh )      /* 0016 (c) 1991 SNK */
6480	6501	DRIVER( sengoku )   /* 0017 (c) 1991 SNK */
6481		DRIVER( sengokh )   /* 0017 (c) 1991 SNK */
	6502	DRIVER( sengokuh )   /* 0017 (c) 1991 SNK */
6482	6503	DRIVER( burningf )   /* 0018 (c) 1991 SNK */
6483	6504	DRIVER( burningfh )   /* 0018 (c) 1991 SNK */
6484	6505	DRIVER( lbowling )   /* 0019 (c) 1990 SNK */
r8962	r8963
6531	6552	DRIVER( aof2a )      /* 0056 (c) 1994 SNK */
6532	6553	DRIVER( wh2 )      /* 0057 (c) 1993 ADK */
6533	6554	DRIVER( fatfursp )   /* 0058 (c) 1993 SNK */
6534		DRIVER( fatfursa )   /* 0058 (c) 1993 SNK */
	6555	DRIVER( fatfurspa )   /* 0058 (c) 1993 SNK */
6535	6556	DRIVER( savagere )   /* 0059 (c) 1995 SNK */
6536	6557	DRIVER( fightfev )   /* 0060 (c) 1994 Viccom */
6537	6558	DRIVER( fightfeva )   /* 0060 (c) 1994 Viccom */
r8962	r8963
6540	6561	DRIVER( samsho2 )   /* 0063 (c) 1994 SNK */
6541	6562	DRIVER( samsho2k )   /* 0063 (c) 1994 SNK (Korean hack) */
6542	6563	DRIVER( wh2j )      /* 0064 (c) 1994 ADK / SNK */
6543		DRIVER( wh2jh )      /* 0064 (c) 1994 ADK / SNK */
6544	6564	DRIVER( wjammers )   /* 0065 (c) 1994 Data East Corporation */
6545	6565	DRIVER( karnovr )   /* 0066 (c) 1994 Data East Corporation */
6546	6566	DRIVER( gururin )   /* 0067 (c) 1994 Face */
r8962	r8963
6633	6653	DRIVER( irrmaze )   /* 0236 (c) 1997 SNK / Saurus */
6634	6654	DRIVER( popbounc )   /* 0237 (c) 1997 Video System Co. */
6635	6655	DRIVER( shocktro )   /* 0238 (c) 1997 Saurus */
6636		DRIVER( shocktra )   /* 0238 (c) 1997 Saurus */
	6656	DRIVER( shocktroa )   /* 0238 (c) 1997 Saurus */
6637	6657	DRIVER( blazstar )   /* 0239 (c) 1998 Yumekobo */
6638	6658	DRIVER( rbff2 )      /* 0240 (c) 1998 SNK */
6639	6659	DRIVER( rbff2h )   /* 0240 (c) 1998 SNK */
r8962	r8963
6653	6673	DRIVER( ctomaday )   /* 0249 (c) 1999 Visco */
6654	6674	DRIVER( mslugx )   /* 0250 (c) 1999 SNK */
6655	6675	DRIVER( kof99 )      /* 0251 (c) 1999 SNK */
6656		DRIVER( kof99a )   /* 0251 (c) 1999 SNK */
	6676	DRIVER( kof99h )   /* 0251 (c) 1999 SNK */
6657	6677	DRIVER( kof99e )   /* 0251 (c) 1999 SNK */
6658	6678	DRIVER( kof99k )   /* 0152 (c) 1999 SNK */
6659	6679	DRIVER( kof99p )   /* 0251 (c) 1999 SNK */
r8962	r8963
6786	6806	DRIVER( skyadvntu )   /* Alpha-68K96V  'SA' (c) 1989 SNK of America licensed from Alpha */
6787	6807	DRIVER( skyadvntj )   /* Alpha-68K96V  'SA' (c) 1989 Alpha Denshi Co. */
6788	6808	DRIVER( gangwars )   /* Alpha-68K96V       (c) 1989 Alpha Denshi Co. */
6789		DRIVER( gangwarsb )   /* Alpha-68K96V bootleg */
	6809	DRIVER( gangwarsu )   /* Alpha-68K96V       (c) 1989 Alpha Denshi Co. */
6790	6810	DRIVER( sbasebal )   /* Alpha-68K96V       (c) 1989 SNK of America licensed from Alpha */
6791	6811	DRIVER( tnextspc )   /* A8003 'NS' (c) 1989 */
6792	6812	DRIVER( tnextspcj )   /* A8003 'NS' (c) 1989 */
r8962	r8963
7352	7372	DRIVER( rdftu )      /* (c) 1996 Seibu Kaihatsu (Fabtek license) */
7353	7373	DRIVER( rdftau )   /* (c) 1996 Seibu Kaihatsu */
7354	7374	DRIVER( rdftj )      /* (c) 1996 Seibu Kaihatsu */
7355		DRIVER( rdftdi )   /* (c) 1996 Seibu Kaihatsu (Dream Island license) */
	7375	DRIVER( rdftadi )   /* (c) 1996 Seibu Kaihatsu (Dream Island license) */
	7376	DRIVER( rdftam )   /* (c) 1996 Seibu Kaihatsu (Metrotainment license) */
7356	7377	DRIVER( rdftit )   /* (c) 1996 Seibu Kaihatsu */
7357	7378	DRIVER( rdfta )      /* (c) 1996 Seibu Kaihatsu */
7358	7379
r8962	r8963
7370	7391	DRIVER( rfjetu )   /* (c) 1998 Seibu Kaihatsu (Fabtek license) */
7371	7392	DRIVER( rfjeta )   /* (c) 1998 Seibu Kaihatsu (Dream Island license) */
7372	7393	DRIVER( rfjetj )   /* (c) 1998 Seibu Kaihatsu */
7373		DRIVER( rfjetus )   /* (c) 1998 Seibu Kaihatsu (Fabtek license) */
	7394	DRIVER( rfjets )   /* (c) 1998 Seibu Kaihatsu */
7374	7395	DRIVER( rfjet2kc )   /* (c) 2000 Seibu Kaihatsu */
7375	7396
7376	7397	DRIVER( ejsakura )   /* (c) 1999 Seibu Kaihatsu */
r8962	r8963
8972	8993	DRIVER( sextriv2 )   /* (c) 1985 Kinky Kit and Game Co. */
8973	8994	DRIVER( geimulti )   /* (c) 1992 Grayhound Electronics */
8974	8995	DRIVER( sprtauth )   /* (c) 1982 Classic Games */
8975		DRIVER( suprpokr )
	8996	DRIVER( suprpokr )  /* (c) 1986 Grayhound Electronics */
	8997	DRIVER( suprpkr1 )  /* (c) 1986 Grayhound Electronics */
8976	8998	DRIVER( dribling )   /* (c) 1983 Model Racing */
8977	8999	DRIVER( driblingo )   /* (c) 1983 Olympia */
8978	9000	DRIVER( ace )      /* [1976 Allied Leisure] */
r8962	r8963
9485	9507	DRIVER( comg230 )   /* (c) 1984 Cal Omega Inc. */
9486	9508	DRIVER( comg236 )   /* (c) 1984 Cal Omega Inc. */
9487	9509	DRIVER( comg239 )   /* (c) 1985 Cal Omega / Casino Electronics Inc. */
	9510	DRIVER( comg240 )   /* (c) 1985 Cal Omega / Casino Electronics Inc. */
9488	9511	DRIVER( comg246 )   /* (c) 1985 Cal Omega Inc. */
9489	9512	DRIVER( comg272a )   /* (c) 1985 Cal Omega Inc. */
9490	9513	DRIVER( comg272b )   /* (c) 1985 Cal Omega Inc. */
	9514	DRIVER( comg5108 )   /* (c) 1985 Cal Omega Inc. */
9491	9515	DRIVER( comg903d )   /* (c) 198? Cal Omega Inc. */
9492	9516	DRIVER( comg905d )   /* (c) 198? Cal Omega Inc. */
9493	9517	DRIVER( elgrande )   /* (c) 1982 Tuni Electro Service / E.T. Marketing */
r8962	r8963
9712	9736	DRIVER( caswin )   /* (c) 1985 */
9713	9737
9714	9738	/* Aristocrat Mk4 hardware */
	9739	DRIVER( 3bagflvt )   /* (c) 1994 */
9715	9740	DRIVER( 3bagflnz )   /* (c) 1994 */
9716	9741	DRIVER( blkrhino )   /* (c) 1996 */
9717	9742	DRIVER( coralr2 )   /* (c) 2002 */
r8962	r8963
9729	9754	DRIVER( ffortune )   /* (c) 1998 */
9730	9755
9731	9756	/* Aristocrat Mk5 hardware */
	9757	DRIVER( aristmk5 )   /* (c) 1995 */
	9758
9732	9759	DRIVER( swthrt2v )   /* (c) 1995 */
9733	9760	DRIVER( enchfrst )   /* (c) 1995 */
9734	9761	DRIVER( dolphntr )   /* (c) 1996 */
r8962	r8963
10302	10329	/* Blitz System Inc. */
10303	10330	DRIVER( megadpkr )   /* (c) 1990 Blitz System Inc */
10304	10331
	10332	/* Video Fun Games Ltd. */
	10333	DRIVER( genie )      /* (c) 198? Video Fun Games Ltd. */
	10334
	10335	/* Olympic Video Gaming */
	10336	DRIVER( hotstuff )
	10337
	10338	/* Interactive Light */
	10339	DRIVER( savquest )
	10340
10305	10341	#endif   /* DRIVER_RECURSIVE */

src/mame/includes/mainsnk.h

r0	r8963
	1	class mainsnk_state : public driver_data_t
	2	{
	3	public:
	4	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, mainsnk_state(machine)); }
	5
	6	mainsnk_state(running_machine &machine)
	7	: driver_data_t(machine) { }
	8
	9	tilemap_t *tx_tilemap;
	10	tilemap_t *bg_tilemap;
	11	UINT8 *spriteram;
	12	UINT8 *fgram;
	13	UINT8 *bgram;
	14
	15	int sound_cpu_busy;
	16	UINT32 bg_tile_offset;
	17	};
	18
	19
	20	/*----------- defined in video/mainsnk.c -----------*/
	21
	22	WRITE8_HANDLER(mainsnk_c600_w);
	23	WRITE8_HANDLER(mainsnk_fgram_w);
	24	WRITE8_HANDLER(mainsnk_bgram_w);
	25	VIDEO_START(mainsnk);
	26	VIDEO_UPDATE(mainsnk);

src/mame/includes/midyunit.h

r8962	r8963
54	54	WRITE16_HANDLER( midyunit_vram_w );
55	55	READ16_HANDLER( midyunit_vram_r );
56	56
57		void midyunit_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
58		void midyunit_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
	57	void midyunit_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
	58	void midyunit_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
59	59
60	60	WRITE16_HANDLER( midyunit_control_w );
61	61	WRITE16_HANDLER( midyunit_paletteram_w );

src/mame/includes/artmagic.h

r8962	r8963
13	13
14	14	VIDEO_START( artmagic );
15	15
16		void artmagic_to_shiftreg(const address_space *space, offs_t address, UINT16 *data);
17		void artmagic_from_shiftreg(const address_space *space, offs_t address, UINT16 *data);
	16	void artmagic_to_shiftreg(address_space *space, offs_t address, UINT16 *data);
	17	void artmagic_from_shiftreg(address_space *space, offs_t address, UINT16 *data);
18	18
19	19	READ16_HANDLER( artmagic_blitter_r );
20	20	WRITE16_HANDLER( artmagic_blitter_w );

src/mame/includes/exterm.h

r8962	r8963
12	12	PALETTE_INIT( exterm );
13	13	void exterm_scanline_update(screen_device &screen, bitmap_t *bitmap, int scanline, const tms34010_display_params *params);
14	14
15		void exterm_to_shiftreg_master(const address_space *space, UINT32 address, UINT16* shiftreg);
16		void exterm_from_shiftreg_master(const address_space *space, UINT32 address, UINT16* shiftreg);
17		void exterm_to_shiftreg_slave(const address_space *space, UINT32 address, UINT16* shiftreg);
18		void exterm_from_shiftreg_slave(const address_space *space, UINT32 address, UINT16* shiftreg);
	15	void exterm_to_shiftreg_master(address_space *space, UINT32 address, UINT16* shiftreg);
	16	void exterm_from_shiftreg_master(address_space *space, UINT32 address, UINT16* shiftreg);
	17	void exterm_to_shiftreg_slave(address_space *space, UINT32 address, UINT16* shiftreg);
	18	void exterm_from_shiftreg_slave(address_space *space, UINT32 address, UINT16* shiftreg);

src/mame/includes/midtunit.h

r8962	r8963
47	47	READ16_HANDLER( midtunit_vram_data_r );
48	48	READ16_HANDLER( midtunit_vram_color_r );
49	49
50		void midtunit_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
51		void midtunit_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
	50	void midtunit_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
	51	void midtunit_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
52	52
53	53	WRITE16_HANDLER( midtunit_control_w );
54	54	WRITE16_HANDLER( midwunit_control_w );

src/mame/includes/trackfld.h

r8962	r8963
32	32	tilemap_t  *bg_tilemap;
33	33	int      bg_bank, sprite_bank1, sprite_bank2;   // trackfld
34	34	int      old_gfx_bank;               // needed by atlantol
	35	int       sprites_gfx_banked;
35	36
36
37	37	/* sound-related */
38	38	int      SN76496_latch;
39	39	int      last_addr;
r8962	r8963
81	81	PALETTE_INIT( trackfld );
82	82	VIDEO_START( trackfld );
83	83	VIDEO_UPDATE( trackfld );
	84	VIDEO_START( atlantol );
84	85
85
86	86	/*----------- defined in video/hyperspt.c -----------*/
87	87
88	88	WRITE8_HANDLER( hyperspt_videoram_w );
r8962	r8963
94	94	VIDEO_UPDATE( hyperspt );
95	95	VIDEO_START( roadf );
96	96
97
98	97	/*----------- defined in video/sbasketb.c -----------*/
99	98
100	99	WRITE8_HANDLER( sbasketb_videoram_w );

src/mame/includes/karnov.h

r8962	r8963
39	39	KARNOV = 0,
40	40	KARNOVJ,
41	41	CHELNOV,
	42	CHELNOVU,
42	43	CHELNOVJ,
43		CHELNOVW,
44	44	WNDRPLNT
45	45	};
46	46

src/mame/includes/prehisle.h

r0	r8963
	1	class prehisle_state : public driver_data_t
	2	{
	3	public:
	4	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, prehisle_state(machine)); }
	5
	6	prehisle_state(running_machine &machine)
	7	: driver_data_t(machine) { }
	8
	9
	10	UINT16 *spriteram;
	11	UINT16 *videoram;
	12	UINT16 *bg_videoram16;
	13	UINT16 invert_controls;
	14
	15	tilemap_t *bg2_tilemap;
	16	tilemap_t *bg_tilemap;
	17	tilemap_t *fg_tilemap;
	18	};
	19
	20
	21	/*----------- defined in video/prehisle.c -----------*/
	22
	23	WRITE16_HANDLER( prehisle_bg_videoram16_w );
	24	WRITE16_HANDLER( prehisle_fg_videoram16_w );
	25	WRITE16_HANDLER( prehisle_control16_w );
	26	READ16_HANDLER( prehisle_control16_r );
	27
	28	VIDEO_START( prehisle );
	29	VIDEO_UPDATE( prehisle );

src/mame/includes/galaxian.h

r8962	r8963
56	56
57	57	WRITE8_HANDLER( galaxian_gfxbank_w );
58	58
59		TIMER_CALLBACK( galaxian_stars_blink_timer );
	59	TIMER_DEVICE_CALLBACK( galaxian_stars_blink_timer );
60	60
61	61	/* video extension callbacks */
62	62	typedef void (*galaxian_extend_tile_info_func)(UINT16 *code, UINT8 *color, UINT8 attrib, UINT8 x);

src/mame/includes/bbusters.h

r0	r8963
	1	class bbusters_state : public driver_data_t
	2	{
	3	public:
	4	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, bbusters_state(machine)); }
	5
	6	bbusters_state(running_machine &machine)
	7	: driver_data_t(machine) { }
	8
	9	UINT16 *videoram;
	10	UINT16 *ram;
	11	UINT16 *eprom_data;
	12	int sound_status;
	13	int gun_select;
	14
	15	tilemap_t *fix_tilemap;
	16	tilemap_t *pf1_tilemap;
	17	tilemap_t *pf2_tilemap;
	18	const UINT8 *scale_table_ptr;
	19	UINT8 scale_line_count;
	20
	21	UINT16 *pf1_data;
	22	UINT16 *pf2_data;
	23	UINT16 *pf1_scroll_data;
	24	UINT16 *pf2_scroll_data;
	25	};
	26
	27
	28	/*----------- defined in video/bbusters.c -----------*/
	29
	30	VIDEO_START( bbuster );
	31	VIDEO_START( mechatt );
	32	VIDEO_UPDATE( bbuster );
	33	VIDEO_UPDATE( mechatt );
	34
	35	WRITE16_HANDLER( bbusters_pf1_w );
	36	WRITE16_HANDLER( bbusters_pf2_w );
	37	WRITE16_HANDLER( bbusters_video_w );

src/mame/includes/snk.h

r8962	r8963
4	4
5	5	*************************************************************************/
6	6
	7	class snk_state : public driver_data_t
	8	{
	9	public:
	10	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, snk_state(machine)); }
	11
	12	snk_state(running_machine &machine)
	13	: driver_data_t(machine) { }
	14
	15	int countryc_trackball;
	16	int last_value[2];
	17	int cp_count[2];
	18
	19	int marvins_sound_busy_flag;
	20	// FIXME this should be initialised on machine reset
	21	int sound_status;
	22
	23	UINT8 *spriteram;
	24	UINT8 *tx_videoram;
	25	UINT8 *fg_videoram;
	26	UINT8 *bg_videoram;
	27
	28	tilemap_t *tx_tilemap;
	29	tilemap_t *fg_tilemap;
	30	tilemap_t *bg_tilemap;
	31	int fg_scrollx, fg_scrolly, bg_scrollx, bg_scrolly;
	32	int sp16_scrollx, sp16_scrolly, sp32_scrollx, sp32_scrolly;
	33	UINT8 sprite_split_point;
	34	int num_sprites, yscroll_mask;
	35	UINT32 bg_tile_offset;
	36	UINT32 tx_tile_offset;
	37	int is_psychos;
	38
	39	UINT8 drawmode_table[16];
	40	UINT8 empty_tile[16*16];
	41	};
	42
	43
7	44	/*----------- defined in video/snk.c -----------*/
8	45
9	46	extern PALETTE_INIT( tnk3 );
r8962	r8963
55	92	extern WRITE8_HANDLER( tdfever_sp_scroll_msb_w );
56	93	extern WRITE8_HANDLER( tdfever_spriteram_w );
57	94
58		extern UINT8 *snk_tx_videoram;
59		extern UINT8 *snk_fg_videoram;
60		extern UINT8 *snk_bg_videoram;
61	95	extern WRITE8_HANDLER( snk_tx_videoram_w );
62	96	extern WRITE8_HANDLER( snk_bg_videoram_w );
63	97	extern WRITE8_HANDLER( marvins_fg_videoram_w );

src/mame/includes/toaplan1.h

r8962	r8963
4	4	****************************************************************************/
5	5
6	6
	7	class toaplan1_state : public driver_data_t
	8	{
	9	public:
	10	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, toaplan1_state(machine)); }
	11
	12	toaplan1_state(running_machine &machine)
	13	: driver_data_t(machine) { }
	14
	15	int unk_reset_port;
	16	UINT16 *colorram1;
	17	UINT16 *colorram2;
	18	size_t colorram1_size;
	19	size_t colorram2_size;
	20
	21	UINT8 *sharedram;
	22
	23	int coin_count; /* coin count increments on startup ? , so dont count it */
	24	int intenable;
	25
	26	/* Demon world */
	27	int dsp_on;
	28	int dsp_BIO;
	29	int dsp_execute;
	30	UINT32 dsp_addr_w;
	31	UINT32 main_ram_seg;
	32
	33	UINT8 vimana_coins[2];
	34	UINT8 vimana_credits;
	35	UINT8 vimana_latch;
	36
	37	UINT16 *pf4_tilevram16;   /*  ||  Drawn in this order */
	38	UINT16 *pf3_tilevram16;   /*  ||  */
	39	UINT16 *pf2_tilevram16;   /* \||/ */
	40	UINT16 *pf1_tilevram16;   /*  \/  */
	41
	42	size_t spriteram_size;
	43	UINT16 *spriteram;
	44	UINT16 *buffered_spriteram;
	45	UINT16 *spritesizeram16;
	46	UINT16 *buffered_spritesizeram16;
	47
	48	INT32 bcu_flipscreen;      /* Tile   controller flip flag */
	49	INT32 fcu_flipscreen;      /* Sprite controller flip flag */
	50
	51	INT32 pf_voffs;
	52	INT32 spriteram_offs;
	53
	54	INT32 pf1_scrollx;
	55	INT32 pf1_scrolly;
	56	INT32 pf2_scrollx;
	57	INT32 pf2_scrolly;
	58	INT32 pf3_scrollx;
	59	INT32 pf3_scrolly;
	60	INT32 pf4_scrollx;
	61	INT32 pf4_scrolly;
	62	INT32 scrollx_offs1;
	63	INT32 scrollx_offs2;
	64	INT32 scrollx_offs3;
	65	INT32 scrollx_offs4;
	66	INT32 scrolly_offs;
	67
	68
	69	#ifdef MAME_DEBUG
	70	int display_pf1;
	71	int display_pf2;
	72	int display_pf3;
	73	int display_pf4;
	74	int displog;
	75	#endif
	76
	77	INT32 tiles_offsetx;
	78	INT32 tiles_offsety;
	79
	80	int reset;      /* Hack! See toaplan1_bcu_control below */
	81
	82	tilemap_t *pf1_tilemap, *pf2_tilemap, *pf3_tilemap, *pf4_tilemap;
	83
	84	// an empty tile, so that we can safely disable tiles
	85	UINT8        empty_tile[8*8];
	86	};
	87
	88
7	89	/*----------- defined in machine/toaplan1.c -----------*/
8	90
9	91	INTERRUPT_GEN( toaplan1_interrupt );
r8962	r8963
31	113	MACHINE_RESET( vimana );
32	114	MACHINE_RESET( zerowing );   /* hack for ZeroWing/OutZone. See video */
33	115
34		extern void toaplan1_driver_savestate(running_machine *machine);
35		extern void demonwld_driver_savestate(running_machine *machine);
36		extern void vimana_driver_savestate(running_machine *machine);
	116	void toaplan1_driver_savestate(running_machine *machine);
	117	void demonwld_driver_savestate(running_machine *machine);
	118	void vimana_driver_savestate(running_machine *machine);
37	119
38	120
39		extern int toaplan1_unk_reset_port;
40
41		extern UINT8 *toaplan1_sharedram;
42
43
44
45	121	/*----------- defined in video/toaplan1.c -----------*/
46	122
47	123	READ16_HANDLER ( toaplan1_frame_done_r );
r8962	r8963
78	154	VIDEO_UPDATE( rallybik );
79	155	VIDEO_UPDATE( toaplan1 );
80	156	VIDEO_UPDATE( demonwld );
81
82
83		extern UINT16 *toaplan1_colorram1;
84		extern UINT16 *toaplan1_colorram2;
85		extern size_t toaplan1_colorram1_size;
86		extern size_t toaplan1_colorram2_size;

src/mame/includes/jpmimpct.h

r8962	r8963
11	11	READ16_HANDLER( jpmimpct_bt477_r );
12	12	WRITE16_HANDLER( jpmimpct_bt477_w );
13	13
14		void jpmimpct_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
15		void jpmimpct_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
	14	void jpmimpct_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
	15	void jpmimpct_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
16	16	void jpmimpct_scanline_update(screen_device &screen, bitmap_t *bitmap, int scanline, const tms34010_display_params *params);
17	17
18	18	VIDEO_START( jpmimpct );

src/mame/includes/model3.h

r8962	r8963
36	36	WRITE64_HANDLER(real3d_display_list_w);
37	37	WRITE64_HANDLER(real3d_polygon_ram_w);
38	38	void real3d_display_list_end(running_machine *machine);
39		void real3d_display_list1_dma(const address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
40		void real3d_display_list2_dma(const address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
41		void real3d_vrom_texture_dma(const address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
42		void real3d_texture_fifo_dma(const address_space *space, UINT32 src, int length, int byteswap);
43		void real3d_polygon_ram_dma(const address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
	39	void real3d_display_list1_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
	40	void real3d_display_list2_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
	41	void real3d_vrom_texture_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
	42	void real3d_texture_fifo_dma(address_space *space, UINT32 src, int length, int byteswap);
	43	void real3d_polygon_ram_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);

src/mame/includes/beathead.h

r8962	r8963
5	5	*************************************************************************/
6	6
7	7	#include "machine/atarigen.h"
	8	#include "cpu/asap/asap.h"
	9	#include "audio/atarijsa.h"
8	10
9	11	class beathead_state : public atarigen_state
10	12	{
r8962	r8963
12	14	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, beathead_state(machine)); }
13	15
14	16	beathead_state(running_machine &machine)
15		: atarigen_state(machine) { }
	17	: atarigen_state(machine),
	18	m_maincpu(*machine.device<asap_device>("maincpu")) { }
16	19
17		UINT32 *      vram_bulk_latch;
18		UINT32 *      palette_select;
	20	virtual void machine_start();
	21	virtual void machine_reset();
19	22
20		UINT32         finescroll;
21		offs_t         vram_latch_offset;
	23	virtual void video_start();
	24	virtual bool video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
22	25
23		offs_t         hsyncram_offset;
24		offs_t         hsyncram_start;
25		UINT8         hsyncram[0x800];
	26	asap_device &   m_maincpu;
26	27
27		UINT32 *      ram_base;
28		UINT32 *      rom_base;
	28	UINT32 *      m_videoram;
	29	UINT32 *      m_paletteram;
29	30
30		double         hblank_offset;
	31	UINT32 *      m_vram_bulk_latch;
	32	UINT32 *      m_palette_select;
31	33
32		UINT8         irq_line_state;
33		UINT8         irq_enable[3];
34		UINT8         irq_state[3];
	34	UINT32         m_finescroll;
	35	offs_t         m_vram_latch_offset;
35	36
36		UINT8         eeprom_enabled;
37		};
	37	offs_t         m_hsyncram_offset;
	38	offs_t         m_hsyncram_start;
	39	UINT8         m_hsyncram[0x800];
38	40
	41	UINT32 *      m_ram_base;
	42	UINT32 *      m_rom_base;
39	43
40		/*----------- defined in video/beathead.c -----------*/
	44	double         m_hblank_offset;
41	45
42		VIDEO_START( beathead );
43		VIDEO_UPDATE( beathead );
	46	UINT8         m_irq_line_state;
	47	UINT8         m_irq_enable[3];
	48	UINT8         m_irq_state[3];
44	49
45		WRITE32_HANDLER( beathead_vram_transparent_w );
46		WRITE32_HANDLER( beathead_vram_bulk_w );
47		WRITE32_HANDLER( beathead_vram_latch_w );
48		WRITE32_HANDLER( beathead_vram_copy_w );
49		WRITE32_HANDLER( beathead_finescroll_w );
50		WRITE32_HANDLER( beathead_palette_w );
51		READ32_HANDLER( beathead_hsync_ram_r );
52		WRITE32_HANDLER( beathead_hsync_ram_w );
	50	UINT8         m_eeprom_enabled;
	51
	52	UINT32 *      m_speedup_data;
	53	UINT32 *      m_movie_speedup_data;
	54
	55	// in drivers/beathead.c
	56	void update_interrupts();
	57	DECLARE_WRITE32_MEMBER( interrupt_control_w );
	58	DECLARE_READ32_MEMBER( interrupt_control_r );
	59	DECLARE_WRITE32_MEMBER( eeprom_data_w );
	60	DECLARE_WRITE32_MEMBER( eeprom_enable_w );
	61	DECLARE_READ32_MEMBER( input_2_r );
	62	DECLARE_READ32_MEMBER( sound_data_r );
	63	DECLARE_WRITE32_MEMBER( sound_data_w );
	64	DECLARE_WRITE32_MEMBER( sound_reset_w );
	65	DECLARE_WRITE32_MEMBER( coin_count_w );
	66	DECLARE_READ32_MEMBER( speedup_r );
	67	DECLARE_READ32_MEMBER( movie_speedup_r );
	68
	69	// in video/beathead.c
	70	DECLARE_WRITE32_MEMBER( vram_transparent_w );
	71	DECLARE_WRITE32_MEMBER( vram_bulk_w );
	72	DECLARE_WRITE32_MEMBER( vram_latch_w );
	73	DECLARE_WRITE32_MEMBER( vram_copy_w );
	74	DECLARE_WRITE32_MEMBER( finescroll_w );
	75	DECLARE_WRITE32_MEMBER( palette_w );
	76	DECLARE_READ32_MEMBER( hsync_ram_r );
	77	DECLARE_WRITE32_MEMBER( hsync_ram_w );
	78	};

src/mame/includes/toaplan2.h

r8962	r8963
	1	/**************** Machine stuff ******************/
	2	//#define USE_HD64x180          /* Define if CPU support is available */
	3	//#define USE_ENCRYPTED_V25S    /* Define to enable V25 even on games where it is encrypted */
	4
	5	/* sub cpu */
	6	#define CPU_2_NONE      0x00
	7	#define CPU_2_Z80      0x5a
	8	#define CPU_2_HD647180   0xa5
	9	#define CPU_2_V25      0xff
	10
1	11	/* vdp related */
2	12
3	13	// mixing debug, render each VDP to it's own screen - be sure to recompile both driver and video after changing
4		#define DUAL_SCREEN_VDPS
	14	//#define DUAL_SCREEN_VDPS
5	15
6	16	#include "video/gp9001.h"
7	17
r8962	r8963
20	30
21	31	gp9001vdp_device* vdp0;
22	32	gp9001vdp_device* vdp1;
	33
	34	UINT8 *z80_shared_ram;
	35	UINT16 *shared_ram16;   /* Really 8bit RAM connected to Z180 */
	36
	37	#ifndef USE_ENCRYPTED_V25S
	38	UINT16 *V25_shared_ram;         /* Really 8bit RAM connected to Z180 */
	39	#endif
	40	UINT8* batsugun_share;
	41	#ifdef USE_ENCRYPTED_V25S
	42	UINT8* batsugun_share2;
	43	#endif
	44
	45	int sub_cpu_type;
	46	running_device *sub_cpu;
	47
	48	UINT16 mcu_data;
	49	UINT16 video_status;
	50	INT8 old_p1_paddle_h;      /* For Ghox */
	51	INT8 old_p2_paddle_h;
	52	INT8 current_bank;         /* Z80 bank used in Battle Garegga and Batrider */
	53
	54	int sndirq_line;      /* IRQ4 for batrider, IRQ2 for bbakraid */
	55	UINT16 z80_busreq;
	56	int unlimited_ver;
	57
	58	UINT16 *txvideoram16;
	59	UINT16 *txvideoram16_offs;
	60	UINT16 *txscrollram16;
	61	UINT16 *tx_gfxram16;
	62
	63	size_t tx_vram_size;
	64	size_t tx_offs_vram_size;
	65	size_t tx_scroll_vram_size;
	66	size_t paletteram16_size;
	67
	68	bitmap_t* custom_priority_bitmap;
	69	bitmap_t* secondary_render_bitmap;
	70
	71	tilemap_t *tx_tilemap;   /* Tilemap for extra-text-layer */
	72	UINT8 tx_flip;
	73	int display_tx;
	74	int displog;
23	75	};
24	76
25	77
r8962	r8963
30	82	void fixeight_okisnd_w(running_device *device, int data);
31	83	void batsugun_okisnd_w(running_device *device, int data);
32	84
33		/*----------- defined in drivers/toaplan2.c -----------*/
34	85
35		extern int toaplan2_sub_cpu;
36
37	86	/*----------- defined in video/toaplan2.c -----------*/
38	87
39		extern UINT16 *toaplan2_txvideoram16;
40		extern UINT16 *toaplan2_txvideoram16_offs;
41		extern UINT16 *toaplan2_txscrollram16;
42		extern UINT16 *toaplan2_tx_gfxram16;
43
44		extern  size_t toaplan2_tx_vram_size;
45		extern  size_t toaplan2_tx_offs_vram_size;
46		extern  size_t toaplan2_tx_scroll_vram_size;
47		extern  size_t batrider_paletteram16_size;
48
49	88	VIDEO_EOF( toaplan2 );
50	89	VIDEO_START( toaplan2 );
51	90	VIDEO_START( truxton2 );

src/mame/includes/btoads.h

r8962	r8963
34	34	READ16_HANDLER( btoads_vram_fg_display_r );
35	35	READ16_HANDLER( btoads_vram_fg_draw_r );
36	36
37		void btoads_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
38		void btoads_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
	37	void btoads_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
	38	void btoads_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
39	39
40	40	void btoads_scanline_update(screen_device &screen, bitmap_t *bitmap, int scanline, const tms34010_display_params *params);

src/mame/includes/gaelcrpt.h

r8962	r8963
1	1	/*----------- defined in machine/gaelcrpt.c -----------*/
2	2
3		UINT16 gaelco_decrypt(const address_space *space, int offset, int data, int param1, int param2);
	3	UINT16 gaelco_decrypt(address_space *space, int offset, int data, int param1, int param2);

src/mame/includes/slapstic.h

r8962	r8963
15	15	void slapstic_reset(void);
16	16
17	17	int slapstic_bank(void);
18		int slapstic_tweak(const address_space *space, offs_t offset);
	18	int slapstic_tweak(address_space *space, offs_t offset);

src/mame/includes/ojankohs.h

r8962	r8963
57	57	VIDEO_UPDATE( ojankohs );
58	58	VIDEO_UPDATE( ojankoc );
59	59
60		void ojankoc_flipscreen(const address_space *space, int data);
	60	void ojankoc_flipscreen(address_space *space, int data);
61	61

src/mame/includes/seta.h

r8962	r8963
51	51	tilemap_t *tilemap_3;   // Layer 1
52	52	int tilemaps_flip;
53	53	int samples_bank;
	54	int taitox_banknum;
54	55
55	56	uPD71054_state uPD71054;
56	57	const game_offset *global_offsets;

src/mame/includes/plygonet.h

r8962	r8963
18	18	UINT16* dsp56k_bank04_ram;
19	19	int cur_sound_region;
20	20
21		direct_update_func dsp56k_update_handler;
	21	direct_update_delegate dsp56k_update_handler;
22	22
23	23	/* TTL text plane stuff */
24	24	int ttl_gfx_index;

src/mame/includes/segag80v.h

r8962	r8963
17	17
18	18	/*----------- defined in video/segag80v.c -----------*/
19	19
20		VIDEO_START( sega );
21		VIDEO_UPDATE( sega );
	20	extern UINT8 *segag80v_vectorram;
	21	extern size_t segag80v_vectorram_size;
	22
	23	VIDEO_START( segag80v );
	24	VIDEO_UPDATE( segag80v );

src/mame/includes/snk6502.h

r8962	r8963
10	10	#include "sound/sn76477.h"
11	11
12	12
	13	class snk6502_state : public driver_data_t
	14	{
	15	public:
	16	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, snk6502_state(machine)); }
	17
	18	snk6502_state(running_machine &machine)
	19	: driver_data_t(machine) { }
	20
	21	UINT8 sasuke_counter;
	22
	23	UINT8 *videoram;
	24	UINT8 *colorram;
	25	UINT8 *videoram2;
	26	UINT8 *charram;
	27
	28	int charbank;
	29	int backcolor;
	30	tilemap_t *bg_tilemap;
	31	tilemap_t *fg_tilemap;
	32
	33	rgb_t palette[64];
	34	};
	35
	36
13	37	/*----------- defined in audio/snk6502.c -----------*/
14	38
15	39	extern const samples_interface sasuke_samples_interface;
r8962	r8963
32	56
33	57	DECLARE_LEGACY_SOUND_DEVICE(SNK6502, snk6502_sound);
34	58
35		void snk6502_set_music_clock(double clock_time);
36		void snk6502_set_music_freq(int freq);
37		int snk6502_music0_playing(void);
	59	void snk6502_set_music_clock(running_machine *machine, double clock_time);
	60	void snk6502_set_music_freq(running_machine *machine, int freq);
	61	int snk6502_music0_playing(running_machine *machine);
38	62
39	63	DISCRETE_SOUND_EXTERN( fantasy );
40	64
41	65
42	66	/*----------- defined in video/snk6502.c -----------*/
43	67
44		extern UINT8 *snk6502_videoram;
45		extern UINT8 *snk6502_colorram;
46		extern UINT8 *snk6502_videoram2;
47		extern UINT8 *snk6502_charram;
48
49	68	WRITE8_HANDLER( snk6502_videoram_w );
50	69	WRITE8_HANDLER( snk6502_videoram2_w );
51	70	WRITE8_HANDLER( snk6502_colorram_w );
r8962	r8963
57	76	PALETTE_INIT( snk6502 );
58	77	VIDEO_START( snk6502 );
59	78	VIDEO_UPDATE( snk6502 );
	79	VIDEO_START( pballoon );
60	80
61	81	WRITE8_HANDLER( satansat_b002_w );
62	82	WRITE8_HANDLER( satansat_backcolor_w );

src/mame/includes/harddriv.h

r8962	r8963
75	75	UINT16 *            gsp_paletteram_hi;
76	76	size_t               gsp_vram_size;
77	77
78		/* driver state */
79		UINT32 *            rddsp32_speedup;
80		offs_t               rddsp32_speedup_pc;
81
82	78	/* machine state */
83	79	UINT8               irq_state;
84	80	UINT8               gsp_irq_state;
r8962	r8963
338	334	/*----------- defined in video/harddriv.c -----------*/
339	335
340	336	VIDEO_START( harddriv );
341		void hdgsp_write_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
342		void hdgsp_read_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg);
	337	void hdgsp_write_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
	338	void hdgsp_read_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
343	339
344	340	READ16_HANDLER( hdgsp_control_lo_r );
345	341	WRITE16_HANDLER( hdgsp_control_lo_w );

src/mame/includes/snk68.h

r0	r8963
	1	class snk68_state : public driver_data_t
	2	{
	3	public:
	4	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, snk68_state(machine)); }
	5
	6	snk68_state(running_machine &machine)
	7	: driver_data_t(machine) { }
	8
	9	int invert_controls;
	10	int sound_status;
	11
	12	UINT16* pow_fg_videoram;
	13
	14	UINT16 *spriteram;
	15	UINT16 *paletteram;
	16	int sprite_flip_axis;
	17	tilemap_t *fg_tilemap;
	18	int flipscreen;
	19	UINT32 fg_tile_offset;
	20	};
	21
	22
	23	/*----------- defined in video/snk68.c -----------*/
	24
	25	VIDEO_START( pow );
	26	VIDEO_START( searchar );
	27	VIDEO_UPDATE( pow );
	28	WRITE16_HANDLER( pow_paletteram16_word_w );
	29	WRITE16_HANDLER( pow_flipscreen16_w );
	30	WRITE16_HANDLER( searchar_flipscreen16_w );
	31	READ16_HANDLER( pow_spriteram_r );
	32	WRITE16_HANDLER( pow_spriteram_w );
	33	READ16_HANDLER( pow_fg_videoram_r );
	34	WRITE16_HANDLER( pow_fg_videoram_w );
	35	WRITE16_HANDLER( searchar_fg_videoram_w );

src/mame/includes/eolithsp.h

r8962	r8963
1	1	/*----------- defined in drivers/eolithsp.c -----------*/
2	2
3		void eolith_speedup_read(const address_space *space);
	3	void eolith_speedup_read(address_space *space);
4	4	void init_eolith_speedup(running_machine *machine);
5	5	INTERRUPT_GEN( eolith_speedup );
6	6	CUSTOM_INPUT( eolith_speedup_getvblank );

src/mame/includes/segas24.h

r8962	r8963
9	9
10	10	void system24temp_sys16_io_set_callbacks(UINT8 (*io_r)(running_machine *machine, int port),
11	11	void  (*io_w)(running_machine *machine, int port, UINT8 data),
12		void  (*cnt_w)(const address_space *space, UINT8 data),
	12	void  (*cnt_w)(address_space *space, UINT8 data),
13	13	read16_space_func iod_r,
14	14	write16_space_func iod_w);
15	15	READ16_HANDLER ( system24temp_sys16_io_r );

src/mame/includes/hng64.h

r8962	r8963
3	3	#define RACING_MCU 3
4	4	#define SAMSHO_MCU 4
5	5
6		/*----------- defined in drivers/hng64.c -----------*/
	6	class hng64_state : public driver_data_t
	7	{
	8	public:
	9	static driver_data_t *alloc(running_machine &machine) { return auto_alloc_clear(&machine, hng64_state(machine)); }
7	10
8		extern int hng64_mcu_type;
	11	hng64_state(running_machine &machine)
	12	: driver_data_t(machine) { }
9	13
	14	int mcu_type;
	15	UINT32 *mainram;
	16	UINT32 *cart;
	17	UINT32 *rombase;
	18
	19	UINT32 *dualport;
	20	UINT16 *soundram;
	21	UINT32 *sysregs;
	22
	23	/* Communications stuff */
	24	UINT32 *com_ram;
	25	UINT8  *com_op_base;
	26	UINT8  *com_mmu_mem;
	27	UINT8  *com_virtual_mem;
	28	UINT32 com_shared_a;
	29	UINT32 com_shared_b;
	30
	31	INT32 dma_start;
	32	INT32 dma_dst;
	33	INT32 dma_len;
	34
	35	UINT32 mcu_fake_time;
	36	UINT16 mcu_en;
	37
	38	UINT32 activeBuffer;
	39	UINT32 no_machine_error_code;
	40	int interrupt_level_request;
	41
	42	UINT32 unk_vreg_toggle;
	43	UINT32 p1_trig;
	44
	45	/* 3D stuff */
	46	UINT32 *_3d_1;
	47	UINT32 *_3d_2;
	48	UINT32 *dl;
	49	//UINT32 *q2;
	50
	51	UINT32 *spriteram;
	52	UINT32 *videoregs;
	53	UINT32 *spriteregs;
	54	UINT32 *videoram;
	55	UINT32 *tcram;
	56	UINT32 *_3dregs;
	57	UINT8 screen_dis;
	58
	59	tilemap_t *tilemap0_8x8;
	60	tilemap_t *tilemap1_8x8;
	61	tilemap_t *tilemap2_8x8;
	62	tilemap_t *tilemap3_8x8;
	63
	64	tilemap_t *tilemap0_16x16;
	65	tilemap_t *tilemap1_16x16;
	66	tilemap_t *tilemap2_16x16;
	67	tilemap_t *tilemap3_16x16;
	68
	69	tilemap_t *tilemap0_16x16_alt;
	70	tilemap_t *tilemap1_16x16_alt;
	71	tilemap_t *tilemap2_16x16_alt;
	72	tilemap_t *tilemap3_16x16_alt;
	73
	74	UINT8 additive_tilemap_debug;
	75
	76	// 3d display buffers
	77	// (Temporarily global - someday they will live with the proper bit-depth in the memory map)
	78	float *depthBuffer3d;
	79	UINT32 *colorBuffer3d;
	80
	81	UINT32 old_animmask;
	82	UINT32 old_animbits;
	83	UINT16 old_tileflags0;
	84	UINT16 old_tileflags1;
	85	UINT16 old_tileflags2;
	86	UINT16 old_tileflags3;
	87
	88	UINT32 dls[2][0x81];
	89
	90	// 3d State
	91	int paletteState3d;
	92	float projectionMatrix[16];
	93	float modelViewMatrix[16];
	94	float cameraMatrix[16];
	95
	96	float lightStrength;
	97	float lightVector[3];
	98
	99	};
	100
	101
	102	/*----------- defined in video/hng64.c -----------*/
	103
	104	WRITE32_HANDLER( hng64_videoram_w );
10	105	void hng64_command3d(running_machine* machine, const UINT16* packet);
11	106
	107	VIDEO_START( hng64 );
	108	VIDEO_UPDATE( hng64 );

src/mame/includes/archimds.h

r8962	r8963
71	71	#define CONTROL         0x00/4
72	72	#define KART         0x04/4 // Keyboard Asynchronous Receiver Transmitter
73	73
74		#define IRQ_STATUS_A    0x10/4
	74	#define IRQ_STATUS_A   0x10/4
75	75	#define IRQ_REQUEST_A   0x14/4
76		#define IRQ_MASK_A       0x18/4
	76	#define IRQ_MASK_A      0x18/4
77	77	#define IRQ_STATUS_B   0x20/4
78	78	#define IRQ_REQUEST_B   0x24/4
79	79	#define IRQ_MASK_B      0x28/4

src/mame/includes/dooyong.h

r8962	r8963
1	1	/*----------- defined in video/dooyong.c -----------*/
2	2
3	3	extern UINT8 *dooyong_txvideoram;
	4	extern UINT8 *paletteram_flytiger;
4	5
5	6	WRITE8_HANDLER( dooyong_bgscroll8_w );
6	7	WRITE8_HANDLER( dooyong_fgscroll8_w );
r8962	r8963
16	17	WRITE8_HANDLER( lastday_ctrl_w );
17	18	WRITE8_HANDLER( pollux_ctrl_w );
18	19	WRITE8_HANDLER( primella_ctrl_w );
	20	WRITE8_HANDLER( paletteram_flytiger_w );
19	21	WRITE8_HANDLER( flytiger_ctrl_w );
20	22	WRITE16_HANDLER( rshark_ctrl_w );
21	23

src/mame/includes/williams.h

r8962	r8963
9	9
10	10	/*----------- defined in drivers/williams.c -----------*/
11	11
12		void defender_install_io_space(const address_space *space);
	12	void defender_install_io_space(address_space *space);
13	13
14	14
15	15	/*----------- defined in machine/williams.c -----------*/

src/mame/includes/atarigt.h

r8962	r8963
36	36
37	37	UINT32 *      mo_command;
38	38
39		void         (*protection_w)(const address_space *space, offs_t offset, UINT16 data);
40		void         (*protection_r)(const address_space *space, offs_t offset, UINT16 *data);
	39	void         (*protection_w)(address_space *space, offs_t offset, UINT16 data);
	40	void         (*protection_r)(address_space *space, offs_t offset, UINT16 *data);
41	41	};
42	42
43	43

src/mame/mame.mak

r8962	r8963
57	57	CPUS += TMS340X0
58	58	CPUS += TMS9900
59	59	CPUS += Z8000
	60	#CPUS += Z8001
60	61	CPUS += TMS32010
61	62	CPUS += TMS32025
62	63	CPUS += TMS32031
r8962	r8963
222	223	SOUNDS += CDP1864
223	224	SOUNDS += ZSG2
224	225	SOUNDS += MOS656X
	226	SOUNDS += S2636
225	227
226	228	#-------------------------------------------------
227	229	# this is the list of driver libraries that
r8962	r8963
374	376	$(DRIVERS)/aristmk4.o \
375	377	$(DRIVERS)/aristmk5.o \
376	378	$(MACHINE)/archimds.o \
	379	$(VIDEO)/archimds.o \
377	380
378	381	$(MAMEOBJ)/atari.a: \
379	382	$(DRIVERS)/atarigx2.o $(VIDEO)/atarigx2.o \
r8962	r8963
1112	1115	$(DRIVERS)/deniam.o $(VIDEO)/deniam.o \
1113	1116	$(DRIVERS)/dotrikun.o \
1114	1117	$(VIDEO)/genesis.o \
1115		$(DRIVERS)/genesisb.o \
1116	1118	$(DRIVERS)/gpworld.o \
1117	1119	$(DRIVERS)/hikaru.o \
1118	1120	$(DRIVERS)/hshavoc.o \
1119	1121	$(DRIVERS)/kopunch.o $(VIDEO)/kopunch.o \
1120	1122	$(DRIVERS)/megadriv.o \
	1123	$(DRIVERS)/megadrvb.o \
1121	1124	$(DRIVERS)/megaplay.o \
1122	1125	$(DRIVERS)/megatech.o \
1123	1126	$(DRIVERS)/model1.o $(MACHINE)/model1.o $(VIDEO)/model1.o \
r8962	r8963
1148	1151	$(DRIVERS)/system1.o $(VIDEO)/system1.o \
1149	1152	$(DRIVERS)/system16.o $(VIDEO)/system16.o \
1150	1153	$(DRIVERS)/timetrv.o \
1151		$(DRIVERS)/topshoot.o \
1152	1154	$(DRIVERS)/turbo.o $(AUDIO)/turbo.o $(VIDEO)/turbo.o \
1153	1155	$(DRIVERS)/vicdual.o $(AUDIO)/vicdual.o $(VIDEO)/vicdual.o \
1154	1156	$(DRIVERS)/zaxxon.o $(AUDIO)/zaxxon.o $(VIDEO)/zaxxon.o \
r8962	r8963
1547	1549	$(DRIVERS)/hitpoker.o \
1548	1550	$(DRIVERS)/homedata.o $(VIDEO)/homedata.o \
1549	1551	$(DRIVERS)/hotblock.o \
	1552	$(DRIVERS)/hotstuff.o \
1550	1553	$(DRIVERS)/ilpag.o \
1551	1554	$(DRIVERS)/imolagp.o \
1552	1555	$(DRIVERS)/intrscti.o \
r8962	r8963
1620	1623	$(DRIVERS)/re900.o \
1621	1624	$(DRIVERS)/rgum.o \
1622	1625	$(DRIVERS)/roul.o \
	1626	$(DRIVERS)/savquest.o \
1623	1627	$(DRIVERS)/sfbonus.o \
1624	1628	$(DRIVERS)/shangkid.o $(VIDEO)/shangkid.o \
1625	1629	$(DRIVERS)/skeetsht.o \

src/mame/video/blktiger.c

r8962	r8963
247	247
248	248	VIDEO_EOF( blktiger )
249	249	{
250		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	250	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
251	251
252	252	buffer_spriteram_w(space, 0, 0);
253	253	}

src/mame/video/dynduke.c

r8962	r8963
244	244
245	245	VIDEO_EOF( dynduke )
246	246	{
247		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	247	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
248	248
249	249	buffer_spriteram16_w(space, 0, 0, 0xffff); // Could be a memory location instead
250	250	}

src/mame/video/mainsnk.c

r8962	r8963
1	1	#include "emu.h"
	2	#include "includes/mainsnk.h"
2	3
3		static tilemap_t *tx_tilemap;
4		static tilemap_t *bg_tilemap;
5		UINT8 *mainsnk_fgram;
6		UINT8 *mainsnk_bgram;
7	4
8
9		static UINT32 bg_tile_offset;
10
11
12	5	static TILEMAP_MAPPER( marvins_tx_scan_cols )
13	6	{
14	7	// tilemap is 36x28, the central part is from the first RAM page and the
r8962	r8963
22	15
23	16	static TILE_GET_INFO( get_tx_tile_info )
24	17	{
25		int code = mainsnk_fgram[tile_index];
	18	mainsnk_state *state = machine->driver_data<mainsnk_state>();
	19	int code = state->fgram[tile_index];
	20
26	21	SET_TILE_INFO(0,
27	22	code,
28	23	0,
r8962	r8963
31	26
32	27	static TILE_GET_INFO( get_bg_tile_info )
33	28	{
34		int code = (mainsnk_bgram[tile_index]);
	29	mainsnk_state *state = machine->driver_data<mainsnk_state>();
	30	int code = (state->bgram[tile_index]);
35	31
36	32	SET_TILE_INFO(
37	33	0,
38		bg_tile_offset + code,
	34	state->bg_tile_offset + code,
39	35	0,
40	36	0);
41	37	}
r8962	r8963
43	39
44	40	VIDEO_START(mainsnk)
45	41	{
46		tx_tilemap = tilemap_create(machine, get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
47		bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_cols,    8, 8, 32, 32);
	42	mainsnk_state *state = machine->driver_data<mainsnk_state>();
48	43
49		tilemap_set_transparent_pen(tx_tilemap,15);
50		tilemap_set_scrolldy(tx_tilemap, 8, 8);
	44	state->tx_tilemap = tilemap_create(machine, get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
	45	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_cols,    8, 8, 32, 32);
51	46
52		tilemap_set_scrolldx(bg_tilemap, 16, 16);
53		tilemap_set_scrolldy(bg_tilemap,  8,  8);
	47	tilemap_set_transparent_pen(state->tx_tilemap, 15);
	48	tilemap_set_scrolldy(state->tx_tilemap, 8, 8);
	49
	50	tilemap_set_scrolldx(state->bg_tilemap, 16, 16);
	51	tilemap_set_scrolldy(state->bg_tilemap,  8,  8);
54	52	}
55	53
56	54
57	55	WRITE8_HANDLER(mainsnk_c600_w)
58	56	{
	57	mainsnk_state *state = space->machine->driver_data<mainsnk_state>();
59	58	int bank;
	59	int total_elements = space->machine->gfx[0]->total_elements;
60	60
61	61	flip_screen_set(space->machine, ~data & 0x80);
62	62
63		tilemap_set_palette_offset(bg_tilemap, (data & 0x07) << 4);
64		tilemap_set_palette_offset(tx_tilemap, (data & 0x07) << 4);
	63	tilemap_set_palette_offset(state->bg_tilemap, (data & 0x07) << 4);
	64	tilemap_set_palette_offset(state->tx_tilemap, (data & 0x07) << 4);
65	65
66	66	bank = 0;
67		if (space->machine->gfx[0]->total_elements == 0x400)   // mainsnk
	67	if (total_elements == 0x400)   // mainsnk
68	68	bank = ((data & 0x30) >> 4);
69		else if (space->machine->gfx[0]->total_elements == 0x800)   // canvas
	69	else if (total_elements == 0x800)   // canvas
70	70	bank = ((data & 0x40) >> 6) | ((data & 0x30) >> 3);
71	71
72		if (bg_tile_offset != (bank << 8))
	72	if (state->bg_tile_offset != (bank << 8))
73	73	{
74		bg_tile_offset = bank << 8;
75		tilemap_mark_all_tiles_dirty(bg_tilemap);
	74	state->bg_tile_offset = bank << 8;
	75	tilemap_mark_all_tiles_dirty(state->bg_tilemap);
76	76	}
77	77	}
78	78
79	79	WRITE8_HANDLER( mainsnk_fgram_w )
80	80	{
81		mainsnk_fgram[offset] = data;
82		tilemap_mark_tile_dirty(tx_tilemap,offset);
	81	mainsnk_state *state = space->machine->driver_data<mainsnk_state>();
	82
	83	state->fgram[offset] = data;
	84	tilemap_mark_tile_dirty(state->tx_tilemap, offset);
83	85	}
84	86
85	87	WRITE8_HANDLER( mainsnk_bgram_w )
86	88	{
87		mainsnk_bgram[offset] = data;
88		tilemap_mark_tile_dirty(bg_tilemap,offset);
	89	mainsnk_state *state = space->machine->driver_data<mainsnk_state>();
	90
	91	state->bgram[offset] = data;
	92	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
89	93	}
90	94
91	95
92	96
93	97	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int scrollx, int scrolly )
94	98	{
	99	mainsnk_state *state = machine->driver_data<mainsnk_state>();
95	100	const gfx_element *gfx = machine->gfx[1];
96	101	const UINT8 *source, *finish;
97		source =  machine->generic.spriteram.u8;
	102	source =  state->spriteram;
98	103	finish =  source + 25*4;
99	104
100	105	while( source<finish )
r8962	r8963
134	139
135	140	VIDEO_UPDATE(mainsnk)
136	141	{
137		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
138		draw_sprites(screen->machine,bitmap,cliprect, 0,0 );
139		tilemap_draw(bitmap,cliprect,tx_tilemap,0,0);
	142	mainsnk_state *state = screen->machine->driver_data<mainsnk_state>();
140	143
	144	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
	145	draw_sprites(screen->machine, bitmap, cliprect, 0, 0);
	146	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
	147
141	148	return 0;
142	149	}

src/mame/video/midyunit.c

r8962	r8963
200	200	*
201	201	*************************************/
202	202
203		void midyunit_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	203	void midyunit_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
204	204	{
205	205	memcpy(shiftreg, &local_videoram[address >> 3], 2 * 512 * sizeof(UINT16));
206	206	}
207	207
208	208
209		void midyunit_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	209	void midyunit_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
210	210	{
211	211	memcpy(&local_videoram[address >> 3], shiftreg, 2 * 512 * sizeof(UINT16));
212	212	}
r8962	r8963
469	469	}
470	470	}
471	471
472		profiler_mark_start(PROFILER_USER1);
	472	g_profiler.start(PROFILER_USER1);
473	473
474	474	/* fill in the basic data */
475	475	dma_state.rowbytes = (INT16)dma_register[DMA_ROWBYTES];
r8962	r8963
541	541	/* signal we're done */
542	542	timer_set(space->machine, ATTOTIME_IN_NSEC(41 * dma_state.width * dma_state.height), NULL, 0, dma_callback);
543	543
544		profiler_mark_end();
	544	g_profiler.stop();
545	545	}
546	546
547	547

src/mame/video/artmagic.c

r8962	r8963
61	61	blitter_base = (UINT16 *)memory_region(machine, "gfx1");
62	62	blitter_mask = memory_region_length(machine, "gfx1")/2 - 1;
63	63
64		tlc34076_state_save(machine);
65	64	state_save_register_global_array(machine, artmagic_xor);
66	65	state_save_register_global(machine, artmagic_is_stoneball);
67	66	state_save_register_global_array(machine, blitter_data);
r8962	r8963
76	75	*
77	76	*************************************/
78	77
79		void artmagic_to_shiftreg(const address_space *space, offs_t address, UINT16 *data)
	78	void artmagic_to_shiftreg(address_space *space, offs_t address, UINT16 *data)
80	79	{
81	80	UINT16 *vram = address_to_vram(&address);
82	81	if (vram)
r8962	r8963
84	83	}
85	84
86	85
87		void artmagic_from_shiftreg(const address_space *space, offs_t address, UINT16 *data)
	86	void artmagic_from_shiftreg(address_space *space, offs_t address, UINT16 *data)
88	87	{
89	88	UINT16 *vram = address_to_vram(&address);
90	89	if (vram)
r8962	r8963
201	200	}
202	201	#endif
203	202
204		profiler_mark_start(PROFILER_VIDEO);
	203	g_profiler.start(PROFILER_VIDEO);
205	204
206	205	last = 0;
207	206	sy = y;
r8962	r8963
306	305	offset += w/4;
307	306	}
308	307
309		profiler_mark_end();
	308	g_profiler.stop();
310	309
311	310	#if (!INSTANT_BLIT)
312	311	blitter_busy_until = attotime_add(timer_get_time(machine), ATTOTIME_IN_NSEC(w*h*20));
r8962	r8963
356	355	offs_t offset = (params->rowaddr << 12) & 0x7ff000;
357	356	UINT16 *vram = address_to_vram(&offset);
358	357	UINT32 *dest = BITMAP_ADDR32(bitmap, scanline, 0);
359		const rgb_t *pens = tlc34076_get_pens();
	358	const rgb_t *pens = tlc34076_get_pens(screen.machine->device("tlc34076"));
360	359	int coladdr = params->coladdr << 1;
361	360	int x;
362	361

src/mame/video/twincobr.c

r8962	r8963
505	505
506	506	VIDEO_EOF( toaplan0 )
507	507	{
508		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	508	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
509	509
510	510	/* Spriteram is always 1 frame ahead, suggesting spriteram buffering.
511	511	There are no CPU output registers that control this so we

src/mame/video/exterm.c

r8962	r8963
36	36	*
37	37	*************************************/
38	38
39		void exterm_to_shiftreg_master(const address_space *space, UINT32 address, UINT16 *shiftreg)
	39	void exterm_to_shiftreg_master(address_space *space, UINT32 address, UINT16 *shiftreg)
40	40	{
41	41	memcpy(shiftreg, &exterm_master_videoram[TOWORD(address)], 256 * sizeof(UINT16));
42	42	}
43	43
44	44
45		void exterm_from_shiftreg_master(const address_space *space, UINT32 address, UINT16 *shiftreg)
	45	void exterm_from_shiftreg_master(address_space *space, UINT32 address, UINT16 *shiftreg)
46	46	{
47	47	memcpy(&exterm_master_videoram[TOWORD(address)], shiftreg, 256 * sizeof(UINT16));
48	48	}
49	49
50	50
51		void exterm_to_shiftreg_slave(const address_space *space, UINT32 address, UINT16 *shiftreg)
	51	void exterm_to_shiftreg_slave(address_space *space, UINT32 address, UINT16 *shiftreg)
52	52	{
53	53	memcpy(shiftreg, &exterm_slave_videoram[TOWORD(address)], 256 * 2 * sizeof(UINT8));
54	54	}
55	55
56	56
57		void exterm_from_shiftreg_slave(const address_space *space, UINT32 address, UINT16 *shiftreg)
	57	void exterm_from_shiftreg_slave(address_space *space, UINT32 address, UINT16 *shiftreg)
58	58	{
59	59	memcpy(&exterm_slave_videoram[TOWORD(address)], shiftreg, 256 * 2 * sizeof(UINT8));
60	60	}

src/mame/video/midtunit.c

r8962	r8963
220	220	*
221	221	*************************************/
222	222
223		void midtunit_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	223	void midtunit_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
224	224	{
225	225	memcpy(shiftreg, &local_videoram[address >> 3], 2 * 512 * sizeof(UINT16));
226	226	}
227	227
228	228
229		void midtunit_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	229	void midtunit_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
230	230	{
231	231	memcpy(&local_videoram[address >> 3], shiftreg, 2 * 512 * sizeof(UINT16));
232	232	}
r8962	r8963
687	687	if (!(command & 0x8000))
688	688	return;
689	689
690		profiler_mark_start(PROFILER_USER1);
	690	g_profiler.start(PROFILER_USER1);
691	691
692	692	/* determine bpp */
693	693	bpp = (command >> 12) & 7;
r8962	r8963
795	795	skipdma:
796	796	timer_set(space->machine, ATTOTIME_IN_NSEC(41 * pixels), NULL, 0, dma_callback);
797	797
798		profiler_mark_end();
	798	g_profiler.stop();
799	799	}
800	800
801	801

src/mame/video/exedexes.c

r8962	r8963
247	247
248	248	VIDEO_EOF( exedexes )
249	249	{
250		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	250	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
251	251
252	252	buffer_spriteram_w(space, 0, 0);
253	253	}

src/mame/video/itech32.c

r8962	r8963
1202	1202	{
1203	1203	/* command 1: blit raw data */
1204	1204	case 1:
1205		profiler_mark_start(PROFILER_USER1);
	1205	g_profiler.start(PROFILER_USER1);
1206	1206	if (BLIT_LOGGING) logblit(machine, "Blit Raw");
1207	1207
1208	1208	if (is_drivedge)
r8962	r8963
1215	1215	if (enable_latch[1]) draw_raw(videoplane[1], color_latch[1]);
1216	1216	}
1217	1217
1218		profiler_mark_end();
	1218	g_profiler.stop();
1219	1219	break;
1220	1220
1221	1221	/* command 2: blit RLE-compressed data */
1222	1222	case 2:
1223		profiler_mark_start(PROFILER_USER2);
	1223	g_profiler.start(PROFILER_USER2);
1224	1224	if (BLIT_LOGGING) logblit(machine, "Blit RLE");
1225	1225
1226	1226	if (enable_latch[0]) draw_rle(videoplane[0], color_latch[0]);
1227	1227	if (enable_latch[1]) draw_rle(videoplane[1], color_latch[1]);
1228	1228
1229		profiler_mark_end();
	1229	g_profiler.stop();
1230	1230	break;
1231	1231
1232	1232	/* command 3: set up raw data transfer */
r8962	r8963
1248	1248
1249	1249	/* command 6: perform shift register copy */
1250	1250	case 6:
1251		profiler_mark_start(PROFILER_USER3);
	1251	g_profiler.start(PROFILER_USER3);
1252	1252	if (BLIT_LOGGING) logblit(machine, "ShiftReg");
1253	1253
1254	1254	if (is_drivedge)
r8962	r8963
1261	1261	if (enable_latch[1]) shiftreg_clear(videoplane[1], NULL);
1262	1262	}
1263	1263
1264		profiler_mark_end();
	1264	g_profiler.stop();
1265	1265	break;
1266	1266
1267	1267	default:

src/mame/video/vertigo.c

r8962	r8963
482	482
483	483	if (irq4) vector_clear_list();
484	484
485		profiler_mark_start(PROFILER_USER1);
	485	g_profiler.start(PROFILER_USER1);
486	486
487	487	while (cycles--)
488	488	{
r8962	r8963
658	658	}
659	659	}
660	660
661		profiler_mark_end();
	661	g_profiler.stop();
662	662	}

src/mame/video/zaxxon.c

r8962	r8963
304	304	/* this is just a guess; the chip is hardwired to the spriteram */
305	305	while (count-- >= 0)
306	306	{
307		UINT8 daddr = memory_read_byte(space, saddr + 0) * 4;
308		spriteram[(daddr + 0) & 0xff] = memory_read_byte(space, saddr + 1);
309		spriteram[(daddr + 1) & 0xff] = memory_read_byte(space, saddr + 2);
310		spriteram[(daddr + 2) & 0xff] = memory_read_byte(space, saddr + 3);
311		spriteram[(daddr + 3) & 0xff] = memory_read_byte(space, saddr + 4);
	307	UINT8 daddr = space->read_byte(saddr + 0) * 4;
	308	spriteram[(daddr + 0) & 0xff] = space->read_byte(saddr + 1);
	309	spriteram[(daddr + 1) & 0xff] = space->read_byte(saddr + 2);
	310	spriteram[(daddr + 2) & 0xff] = space->read_byte(saddr + 3);
	311	spriteram[(daddr + 3) & 0xff] = space->read_byte(saddr + 4);
312	312	saddr += 0x20;
313	313	}
314	314	}

src/mame/video/trackfld.c

r8962	r8963
179	179	trackfld_state *state = machine->driver_data<trackfld_state>();
180	180	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
181	181	tilemap_set_scroll_rows(state->bg_tilemap, 32);
	182	state->sprites_gfx_banked = 0;
182	183	}
183	184
	185
	186	VIDEO_START( atlantol )
	187	{
	188	trackfld_state *state = machine->driver_data<trackfld_state>();
	189	VIDEO_START_CALL( trackfld );
	190	state->sprites_gfx_banked = 1;
	191	}
	192
	193
	194
184	195	static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
185	196	{
186	197	trackfld_state *state = machine->driver_data<trackfld_state>();
r8962	r8963
193	204	int attr = spriteram_2[offs];
194	205	int code = spriteram[offs + 1];
195	206	int color = attr & 0x0f;
	207	if (!state->sprites_gfx_banked)
	208	if (attr&1) code|=0x100; // extra tile# bit for the yiear conversion, trackfld doesn't have this many sprites so it will just get masked
196	209	int flipx = ~attr & 0x40;
197	210	int flipy = attr & 0x80;
198	211	int sx = spriteram[offs] - 1;
r8962	r8963
208	221	/* proving that this is a hardware related "feature" */
209	222	sy += 1;
210	223
	224	// to fix the title screen in yieartf it would have to be like this, the same as yiear.c, this should be verified on the hw
	225	//
	226	//if (offs < 0x26)
	227	//{
	228	//  sy++;   /* fix title screen & garbage at the bottom of the screen */
	229	//}
	230
	231
211	232	drawgfx_transmask(bitmap, cliprect,
212	233	machine->gfx[0],
213	234	code + state->sprite_bank1 + state->sprite_bank2, color,
r8962	r8963
225	246	}
226	247	}
227	248
	249
	250
228	251	VIDEO_UPDATE( trackfld )
229	252	{
230	253	trackfld_state *state = screen->machine->driver_data<trackfld_state>();
r8962	r8963
241	264	draw_sprites(screen->machine, bitmap, cliprect);
242	265	return 0;
243	266	}
	267

src/mame/video/lwings.c

r8962	r8963
293	293
294	294	VIDEO_EOF( lwings )
295	295	{
296		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	296	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
297	297
298	298	buffer_spriteram_w(space, 0, 0);
299	299	}

src/mame/video/armedf.c

r8962	r8963
368	368
369	369	VIDEO_EOF( armedf )
370	370	{
371		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	371	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
372	372
373	373	buffer_spriteram16_w(space, 0, 0, 0xffff);
374	374	}

src/mame/video/redalert.c

r8962	r8963
71	71
72	72	offs_t offs;
73	73	double scaler;
74		double bitmap_weight[1];
	74	double bitmap_weight[2];
75	75	double charmap_rg_weights[3];
76	76	double charmap_b_weights[2];
77	77	double back_r_weight[1];

src/mame/video/prehisle.c

r8962	r8963
7	7	***************************************************************************/
8	8
9	9	#include "emu.h"
	10	#include "includes/prehisle.h"
10	11
11	12
12		UINT16 *prehisle_bg_videoram16;
13
14		static UINT16 invert_controls;
15
16		static tilemap_t *bg2_tilemap, *bg_tilemap, *fg_tilemap;
17
18
19	13	WRITE16_HANDLER( prehisle_bg_videoram16_w )
20	14	{
21		COMBINE_DATA(&prehisle_bg_videoram16[offset]);
22		tilemap_mark_tile_dirty(bg_tilemap, offset);
	15	prehisle_state *state = space->machine->driver_data<prehisle_state>();
	16
	17	COMBINE_DATA(&state->bg_videoram16[offset]);
	18	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
23	19	}
24	20
25	21	WRITE16_HANDLER( prehisle_fg_videoram16_w )
26	22	{
27		COMBINE_DATA(&space->machine->generic.videoram.u16[offset]);
28		tilemap_mark_tile_dirty(fg_tilemap, offset);
	23	prehisle_state *state = space->machine->driver_data<prehisle_state>();
	24
	25	COMBINE_DATA(&state->videoram[offset]);
	26	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
29	27	}
30	28
31	29	READ16_HANDLER( prehisle_control16_r )
32	30	{
	31	prehisle_state *state = space->machine->driver_data<prehisle_state>();
	32
33	33	switch (offset)
34	34	{
35	35	case 0x08: return input_port_read(space->machine, "P2");                  // Player 2
36	36	case 0x10: return input_port_read(space->machine, "COIN");                  // Coins, Tilt, Service
37		case 0x20: return input_port_read(space->machine, "P1") ^ invert_controls;      // Player 1
	37	case 0x20: return input_port_read(space->machine, "P1") ^ state->invert_controls;      // Player 1
38	38	case 0x21: return input_port_read(space->machine, "DSW0");                  // DIPs
39	39	case 0x22: return input_port_read(space->machine, "DSW1");                  // DIPs + VBLANK
40	40	default: return 0;
r8962	r8963
43	43
44	44	WRITE16_HANDLER( prehisle_control16_w )
45	45	{
	46	prehisle_state *state = space->machine->driver_data<prehisle_state>();
46	47	int scroll = 0;
47	48
48	49	COMBINE_DATA(&scroll);
49	50
50	51	switch (offset)
51	52	{
52		case 0x00: tilemap_set_scrolly(bg_tilemap, 0, scroll); break;
53		case 0x08: tilemap_set_scrollx(bg_tilemap, 0, scroll); break;
54		case 0x10: tilemap_set_scrolly(bg2_tilemap, 0, scroll); break;
55		case 0x18: tilemap_set_scrollx(bg2_tilemap, 0, scroll); break;
56		case 0x23: invert_controls = data ? 0x00ff : 0x0000; break;
	53	case 0x00: tilemap_set_scrolly(state->bg_tilemap, 0, scroll); break;
	54	case 0x08: tilemap_set_scrollx(state->bg_tilemap, 0, scroll); break;
	55	case 0x10: tilemap_set_scrolly(state->bg2_tilemap, 0, scroll); break;
	56	case 0x18: tilemap_set_scrollx(state->bg2_tilemap, 0, scroll); break;
	57	case 0x23: state->invert_controls = data ? 0x00ff : 0x0000; break;
57	58	case 0x28: coin_counter_w(space->machine, 0, data & 1); break;
58	59	case 0x29: coin_counter_w(space->machine, 1, data & 1); break;
59	60	case 0x30: flip_screen_set(space->machine, data & 0x01); break;
r8962	r8963
75	76
76	77	static TILE_GET_INFO( get_bg_tile_info )
77	78	{
78		int attr = prehisle_bg_videoram16[tile_index];
	79	prehisle_state *state = machine->driver_data<prehisle_state>();
	80	int attr = state->bg_videoram16[tile_index];
79	81	int code = attr & 0x7ff;
80	82	int color = attr >> 12;
81	83	int flags = (attr & 0x800) ? TILE_FLIPY : 0;
r8962	r8963
85	87
86	88	static TILE_GET_INFO( get_fg_tile_info )
87	89	{
88		int attr = machine->generic.videoram.u16[tile_index];
	90	prehisle_state *state = machine->driver_data<prehisle_state>();
	91	int attr = state->videoram[tile_index];
89	92	int code = attr & 0xfff;
90	93	int color = attr >> 12;
91	94
r8962	r8963
94	97
95	98	VIDEO_START( prehisle )
96	99	{
97		bg2_tilemap = tilemap_create(machine, get_bg2_tile_info, tilemap_scan_cols,
	100	prehisle_state *state = machine->driver_data<prehisle_state>();
	101
	102	state->bg2_tilemap = tilemap_create(machine, get_bg2_tile_info, tilemap_scan_cols,
98	103	16, 16, 1024, 32);
99	104
100		bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_cols,
	105	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_cols,
101	106	16, 16, 256, 32);
102	107
103		fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows,
	108	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows,
104	109	8, 8, 32, 32);
105	110
106		tilemap_set_transparent_pen(bg_tilemap, 15);
107		tilemap_set_transparent_pen(fg_tilemap, 15);
	111	tilemap_set_transparent_pen(state->bg_tilemap, 15);
	112	tilemap_set_transparent_pen(state->fg_tilemap, 15);
108	113
109	114	/* register for saving */
110		state_save_register_global(machine, invert_controls);
	115	state_save_register_global(machine, state->invert_controls);
111	116	}
112	117
113	118	/* sprite layout
r8962	r8963
125	130	*/
126	131	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int foreground )
127	132	{
128		UINT16 *spriteram16 = machine->generic.spriteram.u16;
	133	prehisle_state *state = machine->driver_data<prehisle_state>();
	134	UINT16 *spriteram16 = state->spriteram;
129	135	int offs;
130	136
131	137	for (offs = 0; offs < 1024; offs += 4)
r8962	r8963
160	166
161	167	VIDEO_UPDATE( prehisle )
162	168	{
163		tilemap_draw(bitmap, cliprect, bg2_tilemap, 0, 0);
	169	prehisle_state *state = screen->machine->driver_data<prehisle_state>();
	170
	171	tilemap_draw(bitmap, cliprect, state->bg2_tilemap, 0, 0);
164	172	draw_sprites(screen->machine, bitmap, cliprect, 0);
165		tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
	173	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
166	174	draw_sprites(screen->machine, bitmap, cliprect, 1);
167		tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
	175	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
168	176	return 0;
169	177	}

src/mame/video/simpsons.c

r8962	r8963
97	97	void simpsons_video_banking( running_machine *machine, int bank )
98	98	{
99	99	simpsons_state *state = machine->driver_data<simpsons_state>();
100		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	100	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
101	101
102	102	if (bank & 1)
103	103	{

src/mame/video/taito_b.c

r8962	r8963
28	28	static void hitice_clear_pixel_bitmap( running_machine *machine )
29	29	{
30	30	int i;
31		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	31	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
32	32
33	33	for (i = 0; i < 0x40000; i++)
34	34	hitice_pixelram_w(space, i, 0, 0xffff);
r8962	r8963
258	258	UINT8 video_control = tc0180vcu_get_videoctrl(state->tc0180vcu, 0);
259	259	UINT8 framebuffer_page = tc0180vcu_get_fb_page(state->tc0180vcu, 0);
260	260
261		profiler_mark_start(PROFILER_USER1);
	261	g_profiler.start(PROFILER_USER1);
262	262
263	263	priority <<= 4;
264	264
r8962	r8963
266	266	{
267	267	if (priority)
268	268	{
269		profiler_mark_end();
	269	g_profiler.stop();
270	270	return;
271	271	}
272	272
r8962	r8963
352	352	}
353	353	}
354	354	}
355		profiler_mark_end();
	355	g_profiler.stop();
356	356	}
357	357
358	358	VIDEO_UPDATE( taitob )

src/mame/video/cps1.c

r8962	r8963
21	21
22	22	NAME                                                     Year  B-board #       B-board PALs      C-board #            CPS-B #          C-board PALs
23	23	-------------------------------------------------------  ----  ---------  ---------------------  -----------  -----------------------  ------------
24		Forgotten Worlds (World)                                1988  88621B-2   LW621            LWIO  None         CPS-B-01  DL-0411-10001  N/A
	24	Forgotten Worlds (World, B-Board 88621B-2)               1988  88621B-2   LW621            LWIO  None         CPS-B-01  DL-0411-10001  N/A
25	25	Forgotten Worlds (USA, B-Board 88621B-2)                       88621B-2   LW621            LWIO  None         CPS-B-01  DL-0411-10001  N/A
26	26	Forgotten Worlds (USA, B-Board 88618B-?)                       88618B-?   LWCHR            LWIO  None         CPS-B-01  DL-0411-10001  N/A
27	27	Lost Worlds (Japan Old Ver.)                                   88618B-2   LWCHR            LWIO  None         CPS-B-01  DL-0411-10001  N/A
r8962	r8963
71	71	Magic Sword: Heroic Fantasy (World 900623)               1990  89624B-3   MS24B            IOB1  88622-C-5    CPS-B-13  DL-0411-10008  None
72	72	Magic Sword: Heroic Fantasy (World 900725)                     89624B-3   MS24B            IOB1  88622-C-5    CPS-B-13  DL-0411-10008  None
73	73	Magic Sword: Heroic Fantasy (USA 900725)                       89624B-3   MS24B            IOB1  88622-C-5    CPS-B-13  DL-0411-10008  None
74		Magic Sword (Japan 900623)                                     89625B-1   MS22B            IOB1  88622-C-5    CPS-B-13  DL-0411-10008  None
	74	Magic Sword: Heroic Fantasy (Japan 900623)                     89625B-1   MS22B            IOB1  88622-C-5    CPS-B-13  DL-0411-10008  None
75	75
76	76	Carrier Air Wing (World 901009)                          1990  89624B-3   CA24B            IOB1  88622-C-5    CPS-B-16  DL-0411-10011  None
77	77	Carrier Air Wing (World 901012)                                89624B-3   CA24B            IOB1  88622-C-5    CPS-B-16  DL-0411-10011  None
r8962	r8963
83	83
84	84	Street Fighter II: The World Warrior (World 910214)      1991  90629B-2   STF29            IOB1  90632C-1     CPS-B-17  DL-0411-10012  C632
85	85	Street Fighter II: The World Warrior (World 910522)            90629B-3   STF29            IOB1  90632C-1     CPS-B-11  DL-0411-10004  C632
86		Street Fighter II: The World Warrior (USA 910206)              90629B-?   STF29            IOB1  ?            CPS-B-17  DL-0411-10012  C632
	86	Street Fighter II: The World Warrior (USA 910206)              90629B-2   STF29            IOB1  90632C-1     CPS-B-17  DL-0411-10012  C632
87	87	Street Fighter II: The World Warrior (USA 910214)              90629B-3   STF29            IOB1  90632C-1     CPS-B-17  DL-0411-10012  C632
88	88	Street Fighter II: The World Warrior (USA 910228)              90629B-3   STF29            IOB2  90632C-1     CPS-B-18  DL-0411-10013  C632B
89	89	Street Fighter II: The World Warrior (USA 910318)              90629B-?   STF29            IOB1  ?            CPS-B-05  DL-0411-10006  C632
r8962	r8963
100	100
101	101	The King of Dragons* (World 910711)                      1991  90629B-3   KD29B            IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
102	102	The King of Dragons* (USA 910910)                              90629B-3   KD29B            IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
103		The King of Dragons* (Japan 910805)                            90629B-3   KD29B            IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
	103	The King of Dragons* (Japan 910805, B-Board 89625B-1)          89625B-1   KD22B            IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
	104	The King of Dragons* (Japan 910805, B-Board 90629B-3)          90629B-3   KD29B            IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
104	105
105	106	Captain Commando* (World 911014)                         1991  91635B-2   CC63B    CCPRG   IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
106	107	Captain Commando* (World 911202)                               91635B-2   CC63B    CCPRG1  IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632B   IOC1
r8962	r8963
110	111
111	112	Knights of the Round* (World 911127)                     1991  91635B-2   KR63B    BPRG1   IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
112	113	Knights of the Round* (USA 911127)                             91635B-2   KR63B    BPRG1   IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
113		Knights of the Round* (Japan 911127)                           91634B-2   KR63B    BPRG1   IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
	114	Knights of the Round* (Japan 911127, B-Board 89625B-1)         89625B-1   KR22B            LWIO  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
	115	Knights of the Round* (Japan 911127, B-Board 91634B-2)         91634B-2   KR63B    BPRG1   IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
114	116
115	117	Street Fighter II': Champion Edition (World 920313)      1992  91635B-2   S9263B   BPRG1   IOB1  92631C-6     CPS-B-21  DL-0921-10014  C632    IOC1
	118	Street Fighter II': Champion Edition (World 920513)            91635B-2   S9263B   BPRG1   IOB1  92631C-6     CPS-B-21  DL-0921-10014  C632    IOC1
116	119	Street Fighter II': Champion Edition (USA 920313)              91635B-2   S9263B   BPRG1   IOB1  92631C-6     CPS-B-21  DL-0921-10014  C632    IOC1
117	120	Street Fighter II': Champion Edition (USA 920513)              91635B-2   S9263B   BPRG1   IOB1  92631C-6     CPS-B-21  DL-0921-10014  C632    IOC1
118	121	Street Fighter II': Champion Edition (USA 920803)              91635B-?   S9263B   BPRG1   IOB1  ?            CPS-B-21  DL-0921-10014  C632    IOC1
r8962	r8963
126	129	Varth: Operation Thunderstorm* (Japan 920714)                  88622B-3   VA22B            LWIO  92641C-1     CPS-B-21  DL-0921-10014          IOC1
127	130
128	131	Quiz & Dragons: Capcom Quiz Game* (USA 920701)           1992  89625B-1   QD22B            IOB1  92641C-1     CPS-B-21  DL-0921-10014          IOC1
129		Quiz & Dragons: Capcom Quiz Game* (Japan 940921)         1994  ?          ?                IOB1  ?            CPS-B-21  DL-0921-10014
	132	Quiz & Dragons: Capcom Quiz Game* (Japan 940921)         1994  91634B-2   QD63B    BPRG1   IOB1  90631C-5     CPS-B-21  DL-0921-10014  C632    IOC1
130	133
131	134	Warriors of Fate* (World 921002)                         1992  91635B-?   TK263B   BPRG1   IOB1  ?            CPS-B-21  DL-0921-10014
132	135	Warriors of Fate* (USA 921031)                                 91635B-2   TK263B   BPRG1   IOB1  92641C-1     CPS-B-21  DL-0921-10014          IOC1
r8962	r8963
1153	1156	};
1154	1157
1155	1158
1156		#define mapper_qadj   { 0x8000, 0, 0, 0 }, mapper_qadj_table
1157		static const struct gfx_range mapper_qadj_table[] =
	1159	#define mapper_QD63B   { 0x8000, 0, 0, 0 }, mapper_QD63B_table
	1160	static const struct gfx_range mapper_QD63B_table[] =
1158	1161	{
1159	1162	/* type                              start   end     bank */
1160	1163	{ GFXTYPE_SCROLL1,                   0x0000, 0x07ff, 0 },
r8962	r8963
1250	1253
1251	1254	static const struct CPS1config cps1_config_table[]=
1252	1255	{
1253		/* name        CPSB          gfx mapper   in2  in3  out2   kludge */
1254		{"forgottn",   CPS_B_01,     mapper_LW621 },
1255		{"forgottnu",  CPS_B_01,     mapper_LW621 },
1256		{"forgottnua", CPS_B_01,     mapper_LWCHR },
1257		{"lostwrld",   CPS_B_01,     mapper_LWCHR },
1258		{"lostwrldo",  CPS_B_01,     mapper_LWCHR },
1259		{"ghouls",     CPS_B_01,     mapper_DM620 },
1260		{"ghoulsu",    CPS_B_01,     mapper_DM620 },
1261		{"daimakai",   CPS_B_01,     mapper_DM22A },   // equivalent to DM620
1262		{"daimakair",  CPS_B_21_DEF, mapper_DAM63B },   // equivalent to DM620, also CPS_B_21_DEF is equivalent to CPS_B_01
1263		{"strider",    CPS_B_01,     mapper_ST24M1 },
1264		{"striderua",  CPS_B_01,     mapper_ST24M1 },   // wrong, this set uses ST24B2, still non dumped
1265		{"striderj",   CPS_B_01,     mapper_ST22B },   // equivalent to ST24M1
1266		{"striderjr",  CPS_B_21_DEF, mapper_ST24M1 },   // wrong, this set uses STH63B, still non dumped
1267		{"dynwar",     CPS_B_02,     mapper_TK22B },   // wrong, this set uses TK24B1, dumped but equations still not added
1268		{"dynwara",    CPS_B_02,     mapper_TK22B },
1269		{"dynwarj",    CPS_B_02,     mapper_TK22B },
1270		{"willow",     CPS_B_03,     mapper_WL24B },
1271		{"willowj",    CPS_B_03,     mapper_WL24B },   // wrong, this set uses WL22B, still non dumped
1272		{"willowje",   CPS_B_03,     mapper_WL24B },
1273		{"ffight",     CPS_B_04,     mapper_S224B },
1274		{"ffightu",    CPS_B_04,     mapper_S224B },
1275		{"ffightua",   CPS_B_01,     mapper_S224B },
1276		{"ffightub",   CPS_B_05,     mapper_S224B },
1277		{"ffightj",    CPS_B_04,     mapper_S224B },   // wrong, this set uses S222B, still non dumped
1278		{"ffightj1",   CPS_B_01,     mapper_S224B },   // wrong, this set uses S222B, still non dumped
1279		{"ffightj2",   CPS_B_02,     mapper_S224B },   // wrong, this set uses S222B, still non dumped
1280		{"ffightjh",   CPS_B_01,     mapper_S224B },   // wrong, ffightjh hack doesn't even use the S222B PAL, since replaced with a GAL.
1281		{"1941",       CPS_B_05,     mapper_YI24B },
1282		{"1941j",      CPS_B_05,     mapper_YI24B },   // PAL used could be YI22B
1283		{"unsquad",    CPS_B_11,     mapper_AR24B },
1284		{"area88",     CPS_B_11,     mapper_AR22B },   // equivalent to AR24B
1285		{"area88r",    CPS_B_21_DEF, mapper_AR22B },   // wrong, this set uses ARA63B, still non dumped
1286		{"mercs",      CPS_B_12,     mapper_O224B,  0x36, 0, 0x34 },
1287		{"mercsu",     CPS_B_12,     mapper_O224B,  0x36, 0, 0x34 },
1288		{"mercsua",    CPS_B_12,     mapper_O224B,  0x36, 0, 0x34 },
1289		{"mercsj",     CPS_B_12,     mapper_O224B,  0x36, 0, 0x34 },   // wrong, this set uses O222B, still non dumped
1290		{"msword",     CPS_B_13,     mapper_MS24B },
1291		{"mswordr1",   CPS_B_13,     mapper_MS24B },
1292		{"mswordu",    CPS_B_13,     mapper_MS24B },
1293		{"mswordj",    CPS_B_13,     mapper_MS24B },   // wrong, this set uses MS22B, still non dumped
1294		{"mtwins",     CPS_B_14,     mapper_CK24B },
1295		{"chikij",     CPS_B_14,     mapper_CK24B },   // PAL used could be CK22B
1296		{"nemo",       CPS_B_15,     mapper_NM24B },
1297		{"nemoj",      CPS_B_15,     mapper_NM24B },   // wrong, this set uses NM22B, still non dumped
1298		{"cawing",     CPS_B_16,     mapper_CA24B },
1299		{"cawingr1",   CPS_B_16,     mapper_CA24B },
1300		{"cawingu",    CPS_B_16,     mapper_CA24B },
1301		{"cawingj",    CPS_B_16,     mapper_CA22B },   // equivalent to CA24B
1302		{"sf2",        CPS_B_11,     mapper_STF29,  0x36 },
1303		{"sf2eb",      CPS_B_17,     mapper_STF29,  0x36 },
1304		{"sf2ebbl",    CPS_B_17,     mapper_STF29,  0x36, 0, 0, 1  },
1305		{"sf2ua",      CPS_B_17,     mapper_STF29,  0x36 },
1306		{"sf2ub",      CPS_B_17,     mapper_STF29,  0x36 },
1307		{"sf2ud",      CPS_B_05,     mapper_STF29,  0x36 },
1308		{"sf2ue",      CPS_B_18,     mapper_STF29,  0x3c },
1309		{"sf2uf",      CPS_B_15,     mapper_STF29,  0x36 },
1310		{"sf2ui",      CPS_B_14,     mapper_STF29,  0x36 },
1311		{"sf2uk",      CPS_B_17,     mapper_STF29,  0x36 },   // check CPS_B
1312		{"sf2j",       CPS_B_13,     mapper_STF29,  0x36 },
1313		{"sf2ja",      CPS_B_17,     mapper_STF29,  0x36 },
1314		{"sf2jc",      CPS_B_12,     mapper_STF29,  0x36 },
1315		{"sf2qp1",     CPS_B_17,     mapper_STF29,  0x36 },
1316		{"sf2thndr",   CPS_B_17,     mapper_STF29,  0x36 },
	1256	/* name         CPSB          gfx mapper   in2  in3  out2   kludge */
	1257	{"forgottn",    CPS_B_01,     mapper_LW621 },
	1258	{"forgottnu",   CPS_B_01,     mapper_LW621 },
	1259	{"forgottnua",  CPS_B_01,     mapper_LWCHR },
	1260	{"lostwrld",    CPS_B_01,     mapper_LWCHR },
	1261	{"lostwrldo",   CPS_B_01,     mapper_LWCHR },
	1262	{"ghouls",      CPS_B_01,     mapper_DM620 },
	1263	{"ghoulsu",     CPS_B_01,     mapper_DM620 },
	1264	{"daimakai",    CPS_B_01,     mapper_DM22A },   // equivalent to DM620
	1265	{"daimakair",   CPS_B_21_DEF, mapper_DAM63B },   // equivalent to DM620, also CPS_B_21_DEF is equivalent to CPS_B_01
	1266	{"strider",     CPS_B_01,     mapper_ST24M1 },
	1267	{"striderua",   CPS_B_01,     mapper_ST24M1 },   // wrong, this set uses ST24B2, still non dumped
	1268	{"striderj",    CPS_B_01,     mapper_ST22B },   // equivalent to ST24M1
	1269	{"striderjr",   CPS_B_21_DEF, mapper_ST24M1 },   // wrong, this set uses STH63B, still non dumped
	1270	{"dynwar",      CPS_B_02,     mapper_TK22B },   // wrong, this set uses TK24B1, dumped but equations still not added
	1271	{"dynwara",     CPS_B_02,     mapper_TK22B },
	1272	{"dynwarj",     CPS_B_02,     mapper_TK22B },
	1273	{"willow",      CPS_B_03,     mapper_WL24B },
	1274	{"willowj",     CPS_B_03,     mapper_WL24B },   // wrong, this set uses WL22B, still non dumped
	1275	{"willowje",    CPS_B_03,     mapper_WL24B },
	1276	{"ffight",      CPS_B_04,     mapper_S224B },
	1277	{"ffightu",     CPS_B_04,     mapper_S224B },
	1278	{"ffightua",    CPS_B_01,     mapper_S224B },
	1279	{"ffightub",    CPS_B_05,     mapper_S224B },
	1280	{"ffightj",     CPS_B_04,     mapper_S224B },   // wrong, this set uses S222B, still non dumped
	1281	{"ffightj1",    CPS_B_01,     mapper_S224B },   // wrong, this set uses S222B, still non dumped
	1282	{"ffightj2",    CPS_B_02,     mapper_S224B },   // wrong, this set uses S222B, still non dumped
	1283	{"ffightjh",    CPS_B_01,     mapper_S224B },   // wrong, ffightjh hack doesn't even use the S222B PAL, since replaced with a GAL.
	1284	{"1941",        CPS_B_05,     mapper_YI24B },
	1285	{"1941j",       CPS_B_05,     mapper_YI24B },   // PAL used could be YI22B
	1286	{"unsquad",     CPS_B_11,     mapper_AR24B },
	1287	{"area88",      CPS_B_11,     mapper_AR22B },   // equivalent to AR24B
	1288	{"area88r",     CPS_B_21_DEF, mapper_AR22B },   // wrong, this set uses ARA63B, still non dumped
	1289	{"mercs",       CPS_B_12,     mapper_O224B,  0x36, 0, 0x34 },
	1290	{"mercsu",      CPS_B_12,     mapper_O224B,  0x36, 0, 0x34 },
	1291	{"mercsua",     CPS_B_12,     mapper_O224B,  0x36, 0, 0x34 },
	1292	{"mercsj",      CPS_B_12,     mapper_O224B,  0x36, 0, 0x34 },   // wrong, this set uses O222B, still non dumped
	1293	{"msword",      CPS_B_13,     mapper_MS24B },
	1294	{"mswordr1",    CPS_B_13,     mapper_MS24B },
	1295	{"mswordu",     CPS_B_13,     mapper_MS24B },
	1296	{"mswordj",     CPS_B_13,     mapper_MS24B },   // wrong, this set uses MS22B, still non dumped
	1297	{"mtwins",      CPS_B_14,     mapper_CK24B },
	1298	{"chikij",      CPS_B_14,     mapper_CK24B },   // PAL used could be CK22B
	1299	{"nemo",        CPS_B_15,     mapper_NM24B },
	1300	{"nemoj",       CPS_B_15,     mapper_NM24B },   // wrong, this set uses NM22B, still non dumped
	1301	{"cawing",      CPS_B_16,     mapper_CA24B },
	1302	{"cawingr1",    CPS_B_16,     mapper_CA24B },
	1303	{"cawingu",     CPS_B_16,     mapper_CA24B },
	1304	{"cawingj",     CPS_B_16,     mapper_CA22B },   // equivalent to CA24B
	1305	{"sf2",         CPS_B_11,     mapper_STF29,  0x36 },
	1306	{"sf2eb",       CPS_B_17,     mapper_STF29,  0x36 },
	1307	{"sf2ebbl",     CPS_B_17,     mapper_STF29,  0x36, 0, 0, 1  },
	1308	{"sf2ua",       CPS_B_17,     mapper_STF29,  0x36 },
	1309	{"sf2ub",       CPS_B_17,     mapper_STF29,  0x36 },
	1310	{"sf2ud",       CPS_B_05,     mapper_STF29,  0x36 },
	1311	{"sf2ue",       CPS_B_18,     mapper_STF29,  0x3c },
	1312	{"sf2uf",       CPS_B_15,     mapper_STF29,  0x36 },
	1313	{"sf2ui",       CPS_B_14,     mapper_STF29,  0x36 },
	1314	{"sf2uk",       CPS_B_17,     mapper_STF29,  0x36 },   // check CPS_B
	1315	{"sf2j",        CPS_B_13,     mapper_STF29,  0x36 },
	1316	{"sf2ja",       CPS_B_17,     mapper_STF29,  0x36 },
	1317	{"sf2jc",       CPS_B_12,     mapper_STF29,  0x36 },
	1318	{"sf2qp1",      CPS_B_17,     mapper_STF29,  0x36 },
	1319	{"sf2thndr",    CPS_B_17,     mapper_STF29,  0x36 },
1317	1320
1318	1321	/* from here onwards the CPS-B board has suicide battery and multiply protection */
1319	1322
1320		{"3wonders",   CPS_B_21_BT1, mapper_RT24B },
1321		{"3wondersu",  CPS_B_21_BT1, mapper_RT24B },
1322		{"wonder3",    CPS_B_21_BT1, mapper_RT22B },   // equivalent to RT24B
1323		{"3wondersh",  CPS_B_02    , mapper_RT24B },   /* Not 100% sure of the CPS B-ID */
1324		{"kod",        CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },
1325		{"kodu",       CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },
1326		{"kodj",       CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },
1327		{"kodb",       CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },   /* bootleg, doesn't use multiply protection */
1328		{"captcomm",   CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
1329		{"captcommr1", CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
1330		{"captcommu",  CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
1331		{"captcommj",  CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
1332		{"captcommjr1",CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
1333		{"captcommb",  CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
1334		{"knights",    CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },
1335		{"knightsu",   CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },
1336		{"knightsj",   CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },
1337		{"knightsb",   CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },   // wrong, knightsb bootleg doesn't use the KR63B PAL
1338		{"sf2ce",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
1339		{"sf2ceua",    CPS_B_21_DEF, mapper_S9263B, 0x36 },
1340		{"sf2ceub",    CPS_B_21_DEF, mapper_S9263B, 0x36 },
1341		{"sf2ceuc",    CPS_B_21_DEF, mapper_S9263B, 0x36 },
1342		{"sf2cej",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
1343		{"sf2rb",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
1344		{"sf2rb2",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
1345		{"sf2rb3",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
1346		{"sf2red",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
1347		{"sf2v004",    CPS_B_21_DEF, mapper_S9263B, 0x36 },
1348		{"sf2acc",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
1349		{"sf2accp2",   CPS_B_21_DEF, mapper_S9263B, 0x36 },
1350		{"sf2dkot2",   CPS_B_21_DEF, mapper_S9263B, 0x36 },
1351		{"sf2m1",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
1352		{"sf2m2",      CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
1353		{"sf2m3",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
1354		{"sf2m4",      HACK_B_1,     mapper_S9263B, 0x36, 0, 0, 1 },
1355		{"sf2m5",      CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
1356		{"sf2m6",      CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
1357		{"sf2m7",      CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
1358		{"sf2yyc",     CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
1359		{"sf2koryu",   CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
1360		{"sf2mdt",     CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
1361		{"varth",      CPS_B_04,     mapper_VA63B },   /* CPSB test has been patched out (60=0008) register is also written to, possibly leftover from development */   // wrong, this set uses VA24B, still non dumped
1362		{"varthr1",    CPS_B_04,     mapper_VA63B },   /* CPSB test has been patched out (60=0008) register is also written to, possibly leftover from development */   // wrong, this set uses VA24B, still non dumped
1363		{"varthu",     CPS_B_04,     mapper_VA63B },   /* CPSB test has been patched out (60=0008) register is also written to, possibly leftover from development */
1364		{"varthj",     CPS_B_21_BT5, mapper_VA22B },   /* CPSB test has been patched out (72=0001) register is also written to, possibly leftover from development */
1365		{"cworld2j",   CPS_B_21_BT6, mapper_Q522B,  0x36, 0, 0x34 },   /* (ports 36, 34 probably leftover input code from another game) */
1366		{"wof",        CPS_B_21_DEF, mapper_TK263B },
1367		{"wofa",       CPS_B_21_DEF, mapper_TK263B },
1368		{"wofu",       CPS_B_21_QS1, mapper_TK263B },
1369		{"wofj",       CPS_B_21_QS1, mapper_TK263B },
1370		{"wofhfh",     CPS_B_21_DEF, mapper_TK263B, 0x36 },   /* Chinese bootleg */
1371		{"dino",       CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
1372		{"dinou",      CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
1373		{"dinoj",      CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
1374		{"dinopic",    CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
1375		{"dinopic2",   CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
1376		{"dinohunt",   CPS_B_21_DEF, mapper_CD63B },   /* Chinese bootleg */
1377		{"punisher",   CPS_B_21_QS3, mapper_PS63B },
1378		{"punisheru",  CPS_B_21_QS3, mapper_PS63B },
1379		{"punisherj",  CPS_B_21_QS3, mapper_PS63B },
1380		{"punipic",    CPS_B_21_QS3, mapper_PS63B },
1381		{"punipic2",   CPS_B_21_QS3, mapper_PS63B },
1382		{"punipic3",   CPS_B_21_QS3, mapper_PS63B },
1383		{"punisherbz", CPS_B_21_DEF, mapper_PS63B },   /* Chinese bootleg */
1384		{"slammast",   CPS_B_21_QS4, mapper_MB63B },
1385		{"slammastu",  CPS_B_21_QS4, mapper_MB63B },
1386		{"mbomberj",   CPS_B_21_QS4, mapper_MB63B },
1387		{"mbombrd",    CPS_B_21_QS5, mapper_MB63B },
1388		{"mbombrdj",   CPS_B_21_QS5, mapper_MB63B },
1389		{"sf2hf",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
1390		{"sf2hfu",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
1391		{"sf2hfj",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
1392		{"qad",        CPS_B_21_BT7, mapper_QD22B,  0x36 },   /* TODO: layer enable (port 36 probably leftover input code from another game) */
1393		{"qadj",       CPS_B_21_DEF, mapper_qadj,   0x36, 0x38, 0x34 },   /* (ports 36, 38, 34 probably leftover input code from another game) */
1394		{"qtono2j",    CPS_B_21_DEF, mapper_qtono2j,0x36, 0x38, 0x34 },   /* (ports 36, 38, 34 probably leftover input code from another game) */
1395		{"megaman",    CPS_B_21_DEF, mapper_RCM63B },
1396		{"rockmanj",   CPS_B_21_DEF, mapper_RCM63B },
1397		{"pnickj",     CPS_B_21_DEF, mapper_PKB10B },
1398		{"pang3",      CPS_B_21_DEF, mapper_pang3 },   /* EEPROM port is among the CPS registers (handled by DRIVER_INIT) */   // should use one of these three CP1B1F,CP1B8K,CP1B9KA still not dumped
1399		{"pang3n",     CPS_B_21_DEF, mapper_pang3 },   /* EEPROM port is among the CPS registers (handled by DRIVER_INIT) */   // should use one of these three CP1B1F,CP1B8K,CP1B9KA still not dumped
1400		{"pang3j",     CPS_B_21_DEF, mapper_pang3 },   /* EEPROM port is among the CPS registers (handled by DRIVER_INIT) */   // should use one of these three CP1B1F,CP1B8K,CP1B9KA still not dumped
	1323	{"3wonders",    CPS_B_21_BT1, mapper_RT24B },
	1324	{"3wondersu",   CPS_B_21_BT1, mapper_RT24B },
	1325	{"wonder3",     CPS_B_21_BT1, mapper_RT22B },   // equivalent to RT24B
	1326	{"3wondersh",   CPS_B_02    , mapper_RT24B },   /* Not 100% sure of the CPS B-ID */
	1327	{"kod",         CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },
	1328	{"kodu",        CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },
	1329	{"kodj",        CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },
	1330	{"kodja",       CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },   // wrong, this set uses KD22B, still non dumped
	1331	{"kodb",        CPS_B_21_BT2, mapper_KD29B,  0x36, 0, 0x34 },   /* bootleg, doesn't use multiply protection */
	1332	{"captcomm",    CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
	1333	{"captcommr1",  CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
	1334	{"captcommu",   CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
	1335	{"captcommj",   CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
	1336	{"captcommjr1", CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
	1337	{"captcommb",   CPS_B_21_BT3, mapper_CC63B,  0x36, 0x38, 0x34 },
	1338	{"knights",     CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },
	1339	{"knightsu",    CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },
	1340	{"knightsj",    CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },
	1341	{"knightsja",   CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },   // wrong, this set uses KR22B, still non dumped
	1342	{"knightsb",    CPS_B_21_BT4, mapper_KR63B,  0x36, 0, 0x34 },   // wrong, knightsb bootleg doesn't use the KR63B PAL
	1343	{"sf2ce",       CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1344	{"sf2ceea",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1345	{"sf2ceua",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1346	{"sf2ceub",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1347	{"sf2ceuc",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1348	{"sf2cej",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1349	{"sf2rb",       CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1350	{"sf2rb2",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1351	{"sf2rb3",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1352	{"sf2red",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1353	{"sf2v004",     CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1354	{"sf2acc",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1355	{"sf2accp2",    CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1356	{"sf2dkot2",    CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1357	{"sf2m1",       CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1358	{"sf2m2",       CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
	1359	{"sf2m3",       CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1360	{"sf2m4",       HACK_B_1,     mapper_S9263B, 0x36, 0, 0, 1 },
	1361	{"sf2m5",       CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
	1362	{"sf2m6",       CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
	1363	{"sf2m7",       CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
	1364	{"sf2yyc",      CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
	1365	{"sf2koryu",    CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
	1366	{"sf2mdt",      CPS_B_21_DEF, mapper_S9263B, 0x36, 0, 0, 1 },
	1367	{"varth",       CPS_B_04,     mapper_VA63B },   /* CPSB test has been patched out (60=0008) register is also written to, possibly leftover from development */   // wrong, this set uses VA24B, still non dumped
	1368	{"varthr1",     CPS_B_04,     mapper_VA63B },   /* CPSB test has been patched out (60=0008) register is also written to, possibly leftover from development */   // wrong, this set uses VA24B, still non dumped
	1369	{"varthu",      CPS_B_04,     mapper_VA63B },   /* CPSB test has been patched out (60=0008) register is also written to, possibly leftover from development */
	1370	{"varthj",      CPS_B_21_BT5, mapper_VA22B },   /* CPSB test has been patched out (72=0001) register is also written to, possibly leftover from development */
	1371	{"cworld2j",    CPS_B_21_BT6, mapper_Q522B,  0x36, 0, 0x34 },   /* (ports 36, 34 probably leftover input code from another game) */
	1372	{"wof",         CPS_B_21_DEF, mapper_TK263B },
	1373	{"wofa",        CPS_B_21_DEF, mapper_TK263B },
	1374	{"wofu",        CPS_B_21_QS1, mapper_TK263B },
	1375	{"wofj",        CPS_B_21_QS1, mapper_TK263B },
	1376	{"wofhfh",      CPS_B_21_DEF, mapper_TK263B, 0x36 },   /* Chinese bootleg */
	1377	{"dino",        CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
	1378	{"dinou",       CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
	1379	{"dinoj",       CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
	1380	{"dinopic",     CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
	1381	{"dinopic2",    CPS_B_21_QS2, mapper_CD63B },   /* layer enable never used */
	1382	{"dinohunt",    CPS_B_21_DEF, mapper_CD63B },   /* Chinese bootleg */
	1383	{"punisher",    CPS_B_21_QS3, mapper_PS63B },
	1384	{"punisheru",   CPS_B_21_QS3, mapper_PS63B },
	1385	{"punisherj",   CPS_B_21_QS3, mapper_PS63B },
	1386	{"punipic",     CPS_B_21_QS3, mapper_PS63B },
	1387	{"punipic2",    CPS_B_21_QS3, mapper_PS63B },
	1388	{"punipic3",    CPS_B_21_QS3, mapper_PS63B },
	1389	{"punisherbz",  CPS_B_21_DEF, mapper_PS63B },   /* Chinese bootleg */
	1390	{"slammast",    CPS_B_21_QS4, mapper_MB63B },
	1391	{"slammastu",   CPS_B_21_QS4, mapper_MB63B },
	1392	{"mbomberj",    CPS_B_21_QS4, mapper_MB63B },
	1393	{"mbombrd",     CPS_B_21_QS5, mapper_MB63B },
	1394	{"mbombrdj",    CPS_B_21_QS5, mapper_MB63B },
	1395	{"sf2hf",       CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1396	{"sf2hfu",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1397	{"sf2hfj",      CPS_B_21_DEF, mapper_S9263B, 0x36 },
	1398	{"qad",         CPS_B_21_BT7, mapper_QD22B,  0x36 },   /* TODO: layer enable (port 36 probably leftover input code from another game) */
	1399	{"qadj",        CPS_B_21_DEF, mapper_QD63B,  0x36, 0x38, 0x34 },   /* (ports 36, 38, 34 probably leftover input code from another game) */
	1400	{"qtono2j",     CPS_B_21_DEF, mapper_qtono2j,0x36, 0x38, 0x34 },   /* (ports 36, 38, 34 probably leftover input code from another game) */
	1401	{"megaman",     CPS_B_21_DEF, mapper_RCM63B },
	1402	{"rockmanj",    CPS_B_21_DEF, mapper_RCM63B },
	1403	{"pnickj",      CPS_B_21_DEF, mapper_PKB10B },
	1404	{"pang3",       CPS_B_21_DEF, mapper_pang3 },   /* EEPROM port is among the CPS registers (handled by DRIVER_INIT) */   // should use one of these three CP1B1F,CP1B8K,CP1B9KA still not dumped
	1405	{"pang3n",      CPS_B_21_DEF, mapper_pang3 },   /* EEPROM port is among the CPS registers (handled by DRIVER_INIT) */   // should use one of these three CP1B1F,CP1B8K,CP1B9KA still not dumped
	1406	{"pang3j",      CPS_B_21_DEF, mapper_pang3 },   /* EEPROM port is among the CPS registers (handled by DRIVER_INIT) */   // should use one of these three CP1B1F,CP1B8K,CP1B9KA still not dumped
1401	1407	#ifdef MESS
1402		{"sfzch",      CPS_B_21_DEF, mapper_sfzch },   // not an arcade game and no more in MAME, should not be removed?
	1408	{"sfzch",      CPS_B_21_DEF, mapper_sfzch },   /* Actually a CPS1 based home consol game, so it's not supported in MAME, but used in MESS */
1403	1409	#endif
1404	1410
1405	1411	/* CPS2 games */
1406		{"cps2",       CPS_B_21_DEF, mapper_cps2 },
	1412	{"cps2",        CPS_B_21_DEF, mapper_cps2 },
1407	1413
1408	1414	{0}      /* End of table */
1409	1415	};
r8962	r8963
2414	2420
2415	2421	DRAWSPRITE(
2416	2422	//                                      code + nxs + 0x10 * nys,
2417		(code & ~0xf) + ((code + nxs) & 0xf) + 0x10 * nys,   // fix 00406: qadj: When playing as the ninja, there is one broekn frame in his animation loop when walking.
	2423	(code & ~0xf) + ((code + nxs) & 0xf) + 0x10 * nys,   // fix 00406: qadj: When playing as the ninja, there is one broken frame in his animation loop when walking.
2418	2424	(col & 0x1f),
2419	2425	0,0,
2420	2426	sx,sy);

src/mame/video/itech8.c

r8962	r8963
216	216
217	217	WRITE8_HANDLER( itech8_palette_w )
218	218	{
219		tlc34076_w(space, offset/2, data);
	219	tlc34076_w(space->machine->device("tlc34076"), offset/2, data);
220	220	}
221	221
222	222
r8962	r8963
308	308	*
309	309	*************************************/
310	310
311		static void perform_blit(const address_space *space)
	311	static void perform_blit(address_space *space)
312	312	{
313	313	offs_t addr = tms_state.regs[TMS34061_XYADDRESS] | ((tms_state.regs[TMS34061_XYOFFSET] & 0x300) << 8);
314	314	UINT8 shift = (BLITTER_FLAGS & BLITFLAG_SHIFT) ? 4 : 0;
r8962	r8963
625	625	{
626	626	UINT32 page_offset;
627	627	int x, y;
628		const rgb_t *pens = tlc34076_get_pens();
	628	const rgb_t *pens = tlc34076_get_pens(screen->machine->device("tlc34076"));
629	629
630	630	/* first get the current display state */
631	631	tms34061_get_display_state(&tms_state);
r8962	r8963
708	708	{
709	709	UINT32 page_offset;
710	710	int x, y;
711		const rgb_t *pens = tlc34076_get_pens();
	711	const rgb_t *pens = tlc34076_get_pens(screen->machine->device("tlc34076"));
712	712
713	713	/* first get the current display state */
714	714	tms34061_get_display_state(&tms_state);
r8962	r8963
739	739	{
740	740	UINT32 page_offset;
741	741	int x, y;
742		const rgb_t *pens = tlc34076_get_pens();
	742	const rgb_t *pens = tlc34076_get_pens(screen->machine->device("tlc34076"));
743	743
744	744	/* first get the current display state */
745	745	tms34061_get_display_state(&tms_state);

src/mame/video/galaxian.c

r8962	r8963
879	879	*
880	880	*************************************/
881	881
882		TIMER_CALLBACK( galaxian_stars_blink_timer )
	882	TIMER_DEVICE_CALLBACK( galaxian_stars_blink_timer )
883	883	{
884	884	stars_blink_state++;
885	885	}

src/mame/video/bbusters.c

r8962	r8963
22	22	***************************************************************************/
23	23
24	24	#include "emu.h"
	25	#include "includes/bbusters.h"
25	26
26		static tilemap_t *fix_tilemap,*pf1_tilemap,*pf2_tilemap;
27		static const UINT8 *scale_table_ptr;
28		static UINT8 scale_line_count;
29	27
30		UINT16 *bbusters_pf1_data,*bbusters_pf2_data,*bbusters_pf1_scroll_data,*bbusters_pf2_scroll_data;
31
32	28	/******************************************************************************/
33	29
34	30	static TILE_GET_INFO( get_bbusters_tile_info )
35	31	{
36		UINT16 tile=machine->generic.videoram.u16[tile_index];
	32	bbusters_state *state = machine->driver_data<bbusters_state>();
	33	UINT16 tile = state->videoram[tile_index];
	34
37	35	SET_TILE_INFO(0,tile&0xfff,tile>>12,0);
38	36	}
39	37
40	38	static TILE_GET_INFO( get_pf1_tile_info )
41	39	{
42		UINT16 tile=bbusters_pf1_data[tile_index];
	40	bbusters_state *state = machine->driver_data<bbusters_state>();
	41	UINT16 tile = state->pf1_data[tile_index];
	42
43	43	SET_TILE_INFO(3,tile&0xfff,tile>>12,0);
44	44	}
45	45
46	46	static TILE_GET_INFO( get_pf2_tile_info )
47	47	{
48		UINT16 tile=bbusters_pf2_data[tile_index];
	48	bbusters_state *state = machine->driver_data<bbusters_state>();
	49	UINT16 tile = state->pf2_data[tile_index];
	50
49	51	SET_TILE_INFO(4,tile&0xfff,tile>>12,0);
50	52	}
51	53
52	54	WRITE16_HANDLER( bbusters_video_w )
53	55	{
54		COMBINE_DATA(&space->machine->generic.videoram.u16[offset]);
55		tilemap_mark_tile_dirty(fix_tilemap,offset);
	56	bbusters_state *state = space->machine->driver_data<bbusters_state>();
	57
	58	COMBINE_DATA(&state->videoram[offset]);
	59	tilemap_mark_tile_dirty(state->fix_tilemap, offset);
56	60	}
57	61
58	62	WRITE16_HANDLER( bbusters_pf1_w )
59	63	{
60		COMBINE_DATA(&bbusters_pf1_data[offset]);
61		tilemap_mark_tile_dirty(pf1_tilemap,offset);
	64	bbusters_state *state = space->machine->driver_data<bbusters_state>();
	65
	66	COMBINE_DATA(&state->pf1_data[offset]);
	67	tilemap_mark_tile_dirty(state->pf1_tilemap, offset);
62	68	}
63	69
64	70	WRITE16_HANDLER( bbusters_pf2_w )
65	71	{
66		COMBINE_DATA(&bbusters_pf2_data[offset]);
67		tilemap_mark_tile_dirty(pf2_tilemap,offset);
	72	bbusters_state *state = space->machine->driver_data<bbusters_state>();
	73
	74	COMBINE_DATA(&state->pf2_data[offset]);
	75	tilemap_mark_tile_dirty(state->pf2_tilemap, offset);
68	76	}
69	77
70	78	/******************************************************************************/
71	79
72	80	VIDEO_START( bbuster )
73	81	{
74		fix_tilemap = tilemap_create(machine, get_bbusters_tile_info,tilemap_scan_rows,8,8,32,32);
75		pf1_tilemap = tilemap_create(machine, get_pf1_tile_info,tilemap_scan_cols,16,16,128,32);
76		pf2_tilemap = tilemap_create(machine, get_pf2_tile_info,tilemap_scan_cols,16,16,128,32);
	82	bbusters_state *state = machine->driver_data<bbusters_state>();
77	83
78		tilemap_set_transparent_pen(pf1_tilemap, 15);
79		tilemap_set_transparent_pen(fix_tilemap, 15);
	84	state->fix_tilemap = tilemap_create(machine, get_bbusters_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	85	state->pf1_tilemap = tilemap_create(machine, get_pf1_tile_info, tilemap_scan_cols, 16, 16, 128, 32);
	86	state->pf2_tilemap = tilemap_create(machine, get_pf2_tile_info, tilemap_scan_cols, 16, 16, 128, 32);
	87
	88	tilemap_set_transparent_pen(state->pf1_tilemap, 15);
	89	tilemap_set_transparent_pen(state->fix_tilemap, 15);
80	90	}
81	91
82	92	VIDEO_START( mechatt )
83	93	{
84		fix_tilemap = tilemap_create(machine, get_bbusters_tile_info,tilemap_scan_rows,8,8,32,32);
85		pf1_tilemap = tilemap_create(machine, get_pf1_tile_info,tilemap_scan_cols,16,16,256,32);
86		pf2_tilemap = tilemap_create(machine, get_pf2_tile_info,tilemap_scan_cols,16,16,256,32);
	94	bbusters_state *state = machine->driver_data<bbusters_state>();
87	95
88		tilemap_set_transparent_pen(pf1_tilemap, 15);
89		tilemap_set_transparent_pen(fix_tilemap, 15);
	96	state->fix_tilemap = tilemap_create(machine, get_bbusters_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	97	state->pf1_tilemap = tilemap_create(machine, get_pf1_tile_info, tilemap_scan_cols, 16, 16, 256, 32);
	98	state->pf2_tilemap = tilemap_create(machine, get_pf2_tile_info, tilemap_scan_cols, 16, 16, 256, 32);
	99
	100	tilemap_set_transparent_pen(state->pf1_tilemap, 15);
	101	tilemap_set_transparent_pen(state->fix_tilemap, 15);
90	102	}
91	103
92	104	/******************************************************************************/
r8962	r8963
146	158
147	159	static void bbusters_draw_block(running_machine *machine, bitmap_t *dest,int x,int y,int size,int flipx,int flipy,UINT32 sprite,int color,int bank,int block)
148	160	{
	161	bbusters_state *state = machine->driver_data<bbusters_state>();
149	162	gfx_element *gfx = machine->gfx[bank];
150	163	pen_t pen_base = gfx->color_base + gfx->color_granularity * (color % gfx->total_colors);
151		UINT32 xinc=(scale_line_count * 0x10000 ) / size;
	164	UINT32 xinc=(state->scale_line_count * 0x10000 ) / size;
152	165	UINT8 pixel;
153	166	int x_index;
154	167	int dy=y;
155		int sx,ex=scale_line_count;
	168	int sx, ex = state->scale_line_count;
156	169
157		while (scale_line_count) {
	170	while (state->scale_line_count) {
158	171
159	172	if (dy>=16 && dy<240) {
160	173	UINT16 *destline = BITMAP_ADDR16(dest, dy, 0);
161		UINT8 srcline=*scale_table_ptr;
	174	UINT8 srcline=*state->scale_table_ptr;
162	175	const UINT8 *srcptr=0;
163	176
164	177	if (!flipy)
r8962	r8963
185	198	}
186	199
187	200	dy++;
188		scale_table_ptr--;
189		scale_line_count--;
	201	state->scale_table_ptr--;
	202	state->scale_line_count--;
190	203	}
191	204	}
192	205
193	206	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const UINT16 *source, int bank, int colval, int colmask)
194	207	{
	208	bbusters_state *state = machine->driver_data<bbusters_state>();
195	209	const UINT8 *scale_table=memory_region(machine, "user1");
196	210	int offs;
197	211
r8962	r8963
237	251	switch ((source[offs+0]>>8)&0x3) {
238	252	case 0:
239	253	scale=source[offs+0]&0x7;
240		scale_table_ptr=scale_table+0x387f+(0x80*scale);
241		scale_line_count=0x10-scale;
	254	state->scale_table_ptr = scale_table+0x387f+(0x80*scale);
	255	state->scale_line_count = 0x10-scale;
242	256	bbusters_draw_block(machine,bitmap,x,y,16,fx,fy,sprite,colour,bank,block);
243	257	break;
244	258	case 1: /* 2 x 2 */
245	259	scale=source[offs+0]&0xf;
246		scale_table_ptr=scale_table+0x707f+(0x80*scale);
247		scale_line_count=0x20-scale;
	260	state->scale_table_ptr = scale_table+0x707f+(0x80*scale);
	261	state->scale_line_count = 0x20-scale;
248	262	bbusters_draw_block(machine,bitmap,x,y,32,fx,fy,sprite,colour,bank,block);
249	263	break;
250	264	case 2: /* 64 by 64 block (2 x 2) x 2 */
251	265	scale=source[offs+0]&0x1f;
252		scale_table_ptr=scale_table+0xa07f+(0x80*scale);
253		scale_line_count=0x40-scale;
	266	state->scale_table_ptr = scale_table+0xa07f+(0x80*scale);
	267	state->scale_line_count = 0x40-scale;
254	268	bbusters_draw_block(machine,bitmap,x,y,64,fx,fy,sprite,colour,bank,block);
255	269	break;
256	270	case 3: /* 2 x 2 x 2 x 2 */
257	271	scale=source[offs+0]&0x3f;
258		scale_table_ptr=scale_table+0xc07f+(0x80*scale);
259		scale_line_count=0x80-scale;
	272	state->scale_table_ptr = scale_table+0xc07f+(0x80*scale);
	273	state->scale_line_count = 0x80-scale;
260	274	bbusters_draw_block(machine,bitmap,x,y,128,fx,fy,sprite,colour,bank,block);
261	275	break;
262	276	}
r8962	r8963
267	281
268	282	VIDEO_UPDATE( bbuster )
269	283	{
270		tilemap_set_scrollx( pf1_tilemap,0, bbusters_pf1_scroll_data[0] );
271		tilemap_set_scrolly( pf1_tilemap,0, bbusters_pf1_scroll_data[1] );
272		tilemap_set_scrollx( pf2_tilemap,0, bbusters_pf2_scroll_data[0] );
273		tilemap_set_scrolly( pf2_tilemap,0, bbusters_pf2_scroll_data[1] );
	284	bbusters_state *state = screen->machine->driver_data<bbusters_state>();
274	285
275		tilemap_draw(bitmap,cliprect,pf2_tilemap,0,0);
276		//  draw_sprites(screen->machine,bitmap,screen->machine->generic.buffered_spriteram2.u16,2,0x8,0x8);
277		tilemap_draw(bitmap,cliprect,pf1_tilemap,0,0);
278		draw_sprites(screen->machine,bitmap,screen->machine->generic.buffered_spriteram2.u16,2,0,0);
279		draw_sprites(screen->machine,bitmap,screen->machine->generic.buffered_spriteram.u16,1,0,0);
280		tilemap_draw(bitmap,cliprect,fix_tilemap,0,0);
	286	tilemap_set_scrollx(state->pf1_tilemap, 0, state->pf1_scroll_data[0]);
	287	tilemap_set_scrolly(state->pf1_tilemap, 0, state->pf1_scroll_data[1]);
	288	tilemap_set_scrollx(state->pf2_tilemap, 0, state->pf2_scroll_data[0]);
	289	tilemap_set_scrolly(state->pf2_tilemap, 0, state->pf2_scroll_data[1]);
	290
	291	tilemap_draw(bitmap, cliprect, state->pf2_tilemap, 0, 0);
	292	//draw_sprites(screen->machine, bitmap, screen->machine->generic.buffered_spriteram2.u16, 2, 0x8, 0x8);
	293	tilemap_draw(bitmap, cliprect, state->pf1_tilemap, 0, 0);
	294	draw_sprites(screen->machine, bitmap, screen->machine->generic.buffered_spriteram2.u16, 2, 0, 0);
	295	draw_sprites(screen->machine, bitmap, screen->machine->generic.buffered_spriteram.u16, 1, 0, 0);
	296	tilemap_draw(bitmap, cliprect, state->fix_tilemap, 0, 0);
281	297	return 0;
282	298	}
283	299
284	300	VIDEO_UPDATE( mechatt )
285	301	{
286		tilemap_set_scrollx( pf1_tilemap,0, bbusters_pf1_scroll_data[0] );
287		tilemap_set_scrolly( pf1_tilemap,0, bbusters_pf1_scroll_data[1] );
288		tilemap_set_scrollx( pf2_tilemap,0, bbusters_pf2_scroll_data[0] );
289		tilemap_set_scrolly( pf2_tilemap,0, bbusters_pf2_scroll_data[1] );
	302	bbusters_state *state = screen->machine->driver_data<bbusters_state>();
290	303
291		tilemap_draw(bitmap,cliprect,pf2_tilemap,0,0);
292		tilemap_draw(bitmap,cliprect,pf1_tilemap,0,0);
293		draw_sprites(screen->machine,bitmap,screen->machine->generic.buffered_spriteram.u16,1,0,0);
294		tilemap_draw(bitmap,cliprect,fix_tilemap,0,0);
	304	tilemap_set_scrollx(state->pf1_tilemap, 0, state->pf1_scroll_data[0]);
	305	tilemap_set_scrolly(state->pf1_tilemap, 0, state->pf1_scroll_data[1]);
	306	tilemap_set_scrollx(state->pf2_tilemap, 0, state->pf2_scroll_data[0]);
	307	tilemap_set_scrolly(state->pf2_tilemap, 0, state->pf2_scroll_data[1]);
	308
	309	tilemap_draw(bitmap, cliprect, state->pf2_tilemap, 0, 0);
	310	tilemap_draw(bitmap, cliprect, state->pf1_tilemap, 0, 0);
	311	draw_sprites(screen->machine, bitmap, screen->machine->generic.buffered_spriteram.u16, 1, 0, 0);
	312	tilemap_draw(bitmap, cliprect, state->fix_tilemap, 0, 0);
295	313	return 0;
296	314	}

src/mame/video/snk.c

r8962	r8963
22	22
23	23	*******************************************************************************/
24	24
25		UINT8 *snk_tx_videoram;
26		UINT8 *snk_fg_videoram;
27		UINT8 *snk_bg_videoram;
28	25
29		static tilemap_t *tx_tilemap;
30		static tilemap_t *fg_tilemap;
31		static tilemap_t *bg_tilemap;
32		static int fg_scrollx, fg_scrolly, bg_scrollx, bg_scrolly;
33		static int sp16_scrollx, sp16_scrolly, sp32_scrollx, sp32_scrolly;
34		static UINT8 sprite_split_point;
35		static int num_sprites, yscroll_mask;
36		static UINT32 bg_tile_offset;
37		static UINT32 tx_tile_offset;
38		static int is_psychos;
39
40		static UINT8 empty_tile[16*16];
41		static UINT8 drawmode_table[16];
42
43	26	/**************************************************************************************/
44	27
45	28	PALETTE_INIT( tnk3 )
r8962	r8963
88	71
89	72	static TILE_GET_INFO( marvins_get_tx_tile_info )
90	73	{
91		int code = snk_tx_videoram[tile_index];
	74	snk_state *state = machine->driver_data<snk_state>();
	75	int code = state->tx_videoram[tile_index];
92	76	int color = code >> 5;
	77
93	78	SET_TILE_INFO(0,
94		tx_tile_offset + code,
	79	state->tx_tile_offset + code,
95	80	color,
96	81	tile_index & 0x400 ? TILE_FORCE_LAYER0 : 0);
97	82	}
98	83
99	84	static TILE_GET_INFO( ikari_get_tx_tile_info )
100	85	{
101		int code = snk_tx_videoram[tile_index];
	86	snk_state *state = machine->driver_data<snk_state>();
	87	int code = state->tx_videoram[tile_index];
	88
102	89	SET_TILE_INFO(0,
103		tx_tile_offset + code,
	90	state->tx_tile_offset + code,
104	91	0,
105	92	tile_index & 0x400 ? TILE_FORCE_LAYER0 : 0);
106	93	}
107	94
108	95	static TILE_GET_INFO( gwar_get_tx_tile_info )
109	96	{
110		int code = snk_tx_videoram[tile_index];
	97	snk_state *state = machine->driver_data<snk_state>();
	98	int code = state->tx_videoram[tile_index];
	99
111	100	SET_TILE_INFO(0,
112		tx_tile_offset + code,
	101	state->tx_tile_offset + code,
113	102	0,
114	103	0);
115	104	}
r8962	r8963
117	106
118	107	static TILE_GET_INFO( marvins_get_fg_tile_info )
119	108	{
120		int code = snk_fg_videoram[tile_index];
	109	snk_state *state = machine->driver_data<snk_state>();
	110	int code = state->fg_videoram[tile_index];
	111
121	112	SET_TILE_INFO(1,
122	113	code,
123	114	0,
r8962	r8963
126	117
127	118	static TILE_GET_INFO( marvins_get_bg_tile_info )
128	119	{
129		int code = snk_bg_videoram[tile_index];
	120	snk_state *state = machine->driver_data<snk_state>();
	121	int code = state->bg_videoram[tile_index];
	122
130	123	SET_TILE_INFO(2,
131	124	code,
132	125	0,
r8962	r8963
136	129
137	130	static TILE_GET_INFO( aso_get_bg_tile_info )
138	131	{
139		int code = snk_bg_videoram[tile_index];
	132	snk_state *state = machine->driver_data<snk_state>();
	133	int code = state->bg_videoram[tile_index];
	134
140	135	SET_TILE_INFO(1,
141		bg_tile_offset + code,
	136	state->bg_tile_offset + code,
142	137	0,
143	138	0);
144	139	}
145	140
146	141	static TILE_GET_INFO( tnk3_get_bg_tile_info )
147	142	{
148		int attr = snk_bg_videoram[2*tile_index+1];
149		int code = snk_bg_videoram[2*tile_index] | ((attr & 0x30) << 4);
	143	snk_state *state = machine->driver_data<snk_state>();
	144	int attr = state->bg_videoram[2*tile_index+1];
	145	int code = state->bg_videoram[2*tile_index] | ((attr & 0x30) << 4);
150	146	int color = (attr & 0xf) ^ 8;
	147
151	148	SET_TILE_INFO(1,
152	149	code,
153	150	color,
r8962	r8963
156	153
157	154	static TILE_GET_INFO( ikari_get_bg_tile_info )
158	155	{
159		int attr = snk_bg_videoram[2*tile_index+1];
160		int code = snk_bg_videoram[2*tile_index] | ((attr & 0x03) << 8);
	156	snk_state *state = machine->driver_data<snk_state>();
	157	int attr = state->bg_videoram[2*tile_index+1];
	158	int code = state->bg_videoram[2*tile_index] | ((attr & 0x03) << 8);
161	159	int color = (attr & 0x70) >> 4;
	160
162	161	SET_TILE_INFO(1,
163	162	code,
164	163	color,
r8962	r8963
167	166
168	167	static TILE_GET_INFO( gwar_get_bg_tile_info )
169	168	{
170		int attr = snk_bg_videoram[2*tile_index+1];
171		int code = snk_bg_videoram[2*tile_index] | ((attr & 0x0f) << 8);
	169	snk_state *state = machine->driver_data<snk_state>();
	170	int attr = state->bg_videoram[2*tile_index+1];
	171	int code = state->bg_videoram[2*tile_index] | ((attr & 0x0f) << 8);
172	172	int color = (attr & 0xf0) >> 4;
173	173
174		if (is_psychos)   // psychos has a separate palette bank bit
	174	if (state->is_psychos)   // psychos has a separate palette bank bit
175	175	color &= 7;
176	176
177	177	SET_TILE_INFO(1,
r8962	r8963
183	183	// (still call SET_TILE_INFO, otherwise problems might occur on boot when
184	184	// the tile data hasn't been initialised)
185	185	if (code >= machine->gfx[1]->total_elements)
186		tileinfo->pen_data = empty_tile;
	186	tileinfo->pen_data = state->empty_tile;
187	187	}
188	188
189	189
r8962	r8963
191	191
192	192	static VIDEO_START( snk_3bpp_shadow )
193	193	{
	194	snk_state *state = machine->driver_data<snk_state>();
194	195	int i;
195	196
196	197	if(!(machine->config->m_video_attributes & VIDEO_HAS_SHADOWS))
197	198	fatalerror("driver should use VIDEO_HAS_SHADOWS");
198	199
199	200	/* prepare shadow draw table */
200		for(i = 0; i <= 5; i++) drawmode_table[i] = DRAWMODE_SOURCE;
201		drawmode_table[6] = (machine->config->m_video_attributes & VIDEO_HAS_SHADOWS) ? DRAWMODE_SHADOW : DRAWMODE_SOURCE;
202		drawmode_table[7] = DRAWMODE_NONE;
	201	for(i = 0; i <= 5; i++) state->drawmode_table[i] = DRAWMODE_SOURCE;
	202	state->drawmode_table[6] = (machine->config->m_video_attributes & VIDEO_HAS_SHADOWS) ? DRAWMODE_SHADOW : DRAWMODE_SOURCE;
	203	state->drawmode_table[7] = DRAWMODE_NONE;
203	204
204	205	for (i = 0x000;i < 0x400;i++)
205	206	machine->shadow_table[i] = i | 0x200;
r8962	r8963
207	208
208	209	static VIDEO_START( snk_4bpp_shadow )
209	210	{
	211	snk_state *state = machine->driver_data<snk_state>();
210	212	int i;
211	213
212	214	if(!(machine->config->m_video_attributes & VIDEO_HAS_SHADOWS))
213	215	fatalerror("driver should use VIDEO_HAS_SHADOWS");
214	216
215	217	/* prepare shadow draw table */
216		for(i = 0; i <= 13; i++) drawmode_table[i] = DRAWMODE_SOURCE;
217		drawmode_table[14] = DRAWMODE_SHADOW;
218		drawmode_table[15] = DRAWMODE_NONE;
	218	for(i = 0; i <= 13; i++) state->drawmode_table[i] = DRAWMODE_SOURCE;
	219	state->drawmode_table[14] = DRAWMODE_SHADOW;
	220	state->drawmode_table[15] = DRAWMODE_NONE;
219	221
220	222	/* all palette entries are not affected by shadow sprites... */
221	223	for (i = 0x000;i < 0x400;i++)
r8962	r8963
228	230
229	231	VIDEO_START( marvins )
230	232	{
	233	snk_state *state = machine->driver_data<snk_state>();
	234
231	235	VIDEO_START_CALL(snk_3bpp_shadow);
232	236
233		tx_tilemap = tilemap_create(machine, marvins_get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
234		fg_tilemap = tilemap_create(machine, marvins_get_fg_tile_info, tilemap_scan_cols,    8, 8, 64, 32);
235		bg_tilemap = tilemap_create(machine, marvins_get_bg_tile_info, tilemap_scan_cols,    8, 8, 64, 32);
	237	state->tx_tilemap = tilemap_create(machine, marvins_get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
	238	state->fg_tilemap = tilemap_create(machine, marvins_get_fg_tile_info, tilemap_scan_cols,    8, 8, 64, 32);
	239	state->bg_tilemap = tilemap_create(machine, marvins_get_bg_tile_info, tilemap_scan_cols,    8, 8, 64, 32);
236	240
237		tilemap_set_transparent_pen(tx_tilemap,15);
238		tilemap_set_scrolldy(tx_tilemap, 8, 8);
	241	tilemap_set_transparent_pen(state->tx_tilemap, 15);
	242	tilemap_set_scrolldy(state->tx_tilemap, 8, 8);
239	243
240		tilemap_set_transparent_pen(fg_tilemap,15);
241		tilemap_set_scrolldx(fg_tilemap, 15,  31);
242		tilemap_set_scrolldy(fg_tilemap,  8, -32);
	244	tilemap_set_transparent_pen(state->fg_tilemap, 15);
	245	tilemap_set_scrolldx(state->fg_tilemap, 15,  31);
	246	tilemap_set_scrolldy(state->fg_tilemap,  8, -32);
243	247
244		tilemap_set_scrolldx(bg_tilemap, 15,  31);
245		tilemap_set_scrolldy(bg_tilemap,  8, -32);
	248	tilemap_set_scrolldx(state->bg_tilemap, 15,  31);
	249	tilemap_set_scrolldy(state->bg_tilemap,  8, -32);
246	250
247		tx_tile_offset = 0;
	251	state->tx_tile_offset = 0;
248	252	}
249	253
250	254	VIDEO_START( jcross )
251	255	{
	256	snk_state *state = machine->driver_data<snk_state>();
	257
252	258	VIDEO_START_CALL(snk_3bpp_shadow);
253	259
254		tx_tilemap = tilemap_create(machine, marvins_get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
255		bg_tilemap = tilemap_create(machine, aso_get_bg_tile_info,     tilemap_scan_cols,    8, 8, 64, 64);
	260	state->tx_tilemap = tilemap_create(machine, marvins_get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
	261	state->bg_tilemap = tilemap_create(machine, aso_get_bg_tile_info,     tilemap_scan_cols,    8, 8, 64, 64);
256	262
257		tilemap_set_transparent_pen(tx_tilemap, 15);
258		tilemap_set_scrolldy(tx_tilemap, 8, 8);
	263	tilemap_set_transparent_pen(state->tx_tilemap, 15);
	264	tilemap_set_scrolldy(state->tx_tilemap, 8, 8);
259	265
260		tilemap_set_scrolldx(bg_tilemap, 15, 24);
261		tilemap_set_scrolldy(bg_tilemap,  8, -32);
	266	tilemap_set_scrolldx(state->bg_tilemap, 15, 24);
	267	tilemap_set_scrolldy(state->bg_tilemap,  8, -32);
262	268
263		num_sprites = 25;
264		yscroll_mask = 0x1ff;
265		bg_tile_offset = 0;
266		tx_tile_offset = 0;
	269	state->num_sprites = 25;
	270	state->yscroll_mask = 0x1ff;
	271	state->bg_tile_offset = 0;
	272	state->tx_tile_offset = 0;
267	273	}
268	274
269	275	VIDEO_START( sgladiat )
270	276	{
	277	snk_state *state = machine->driver_data<snk_state>();
	278
271	279	VIDEO_START_CALL(snk_3bpp_shadow);
272	280
273		tx_tilemap = tilemap_create(machine, marvins_get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
274		bg_tilemap = tilemap_create(machine, aso_get_bg_tile_info,     tilemap_scan_cols,    8, 8, 64, 32);
	281	state->tx_tilemap = tilemap_create(machine, marvins_get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
	282	state->bg_tilemap = tilemap_create(machine, aso_get_bg_tile_info,     tilemap_scan_cols,    8, 8, 64, 32);
275	283
276		tilemap_set_transparent_pen(tx_tilemap, 15);
277		tilemap_set_scrolldy(tx_tilemap, 8, 8);
	284	tilemap_set_transparent_pen(state->tx_tilemap, 15);
	285	tilemap_set_scrolldy(state->tx_tilemap, 8, 8);
278	286
279		tilemap_set_scrolldx(bg_tilemap, 15, 24);
280		tilemap_set_scrolldy(bg_tilemap,  8, -32);
	287	tilemap_set_scrolldx(state->bg_tilemap, 15, 24);
	288	tilemap_set_scrolldy(state->bg_tilemap,  8, -32);
281	289
282		num_sprites = 25;
283		yscroll_mask = 0x0ff;
284		bg_tile_offset = 0;
285		tx_tile_offset = 0;
	290	state->num_sprites = 25;
	291	state->yscroll_mask = 0x0ff;
	292	state->bg_tile_offset = 0;
	293	state->tx_tile_offset = 0;
286	294	}
287	295
288	296	VIDEO_START( hal21 )
289	297	{
	298	snk_state *state = machine->driver_data<snk_state>();
	299
290	300	VIDEO_START_CALL(jcross);
291	301
292		tilemap_set_scrolldy(bg_tilemap,  8, -32+256);
	302	tilemap_set_scrolldy(state->bg_tilemap,  8, -32+256);
293	303
294		num_sprites = 50;
295		yscroll_mask = 0x1ff;
	304	state->num_sprites = 50;
	305	state->yscroll_mask = 0x1ff;
296	306	}
297	307
298	308	VIDEO_START( aso )
299	309	{
	310	snk_state *state = machine->driver_data<snk_state>();
	311
300	312	VIDEO_START_CALL(jcross);
301	313
302		tilemap_set_scrolldx(bg_tilemap, 15+256, 24+256);
	314	tilemap_set_scrolldx(state->bg_tilemap, 15+256, 24+256);
303	315
304		num_sprites = 50;
305		yscroll_mask = 0x1ff;
	316	state->num_sprites = 50;
	317	state->yscroll_mask = 0x1ff;
306	318	}
307	319
308	320
309	321	VIDEO_START( tnk3 )
310	322	{
	323	snk_state *state = machine->driver_data<snk_state>();
	324
311	325	VIDEO_START_CALL(snk_3bpp_shadow);
312	326
313		tx_tilemap = tilemap_create(machine, marvins_get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
314		bg_tilemap = tilemap_create(machine, tnk3_get_bg_tile_info,    tilemap_scan_cols,    8, 8, 64, 64);
	327	state->tx_tilemap = tilemap_create(machine, marvins_get_tx_tile_info, marvins_tx_scan_cols, 8, 8, 36, 28);
	328	state->bg_tilemap = tilemap_create(machine, tnk3_get_bg_tile_info,    tilemap_scan_cols,    8, 8, 64, 64);
315	329
316		tilemap_set_transparent_pen(tx_tilemap, 15);
317		tilemap_set_scrolldy(tx_tilemap, 8, 8);
	330	tilemap_set_transparent_pen(state->tx_tilemap, 15);
	331	tilemap_set_scrolldy(state->tx_tilemap, 8, 8);
318	332
319		tilemap_set_scrolldx(bg_tilemap, 15, 24);
320		tilemap_set_scrolldy(bg_tilemap,  8, -32);
	333	tilemap_set_scrolldx(state->bg_tilemap, 15, 24);
	334	tilemap_set_scrolldy(state->bg_tilemap,  8, -32);
321	335
322		num_sprites = 50;
323		yscroll_mask = 0x1ff;
324		tx_tile_offset = 0;
	336	state->num_sprites = 50;
	337	state->yscroll_mask = 0x1ff;
	338	state->tx_tile_offset = 0;
325	339	}
326	340
327	341	VIDEO_START( ikari )
328	342	{
	343	snk_state *state = machine->driver_data<snk_state>();
	344
329	345	VIDEO_START_CALL(snk_3bpp_shadow);
330	346
331		tx_tilemap = tilemap_create(machine, ikari_get_tx_tile_info, marvins_tx_scan_cols,  8,  8, 36, 28);
332		bg_tilemap = tilemap_create(machine, ikari_get_bg_tile_info, tilemap_scan_cols,    16, 16, 32, 32);
	347	state->tx_tilemap = tilemap_create(machine, ikari_get_tx_tile_info, marvins_tx_scan_cols,  8,  8, 36, 28);
	348	state->bg_tilemap = tilemap_create(machine, ikari_get_bg_tile_info, tilemap_scan_cols,    16, 16, 32, 32);
333	349
334		tilemap_set_transparent_pen(tx_tilemap, 15);
335		tilemap_set_scrolldy(tx_tilemap, 8, 8);
	350	tilemap_set_transparent_pen(state->tx_tilemap, 15);
	351	tilemap_set_scrolldy(state->tx_tilemap, 8, 8);
336	352
337		tilemap_set_scrolldx(bg_tilemap, 15, 24);
338		tilemap_set_scrolldy(bg_tilemap,  8, -32);
	353	tilemap_set_scrolldx(state->bg_tilemap, 15, 24);
	354	tilemap_set_scrolldy(state->bg_tilemap,  8, -32);
339	355
340		tx_tile_offset = 0;
	356	state->tx_tile_offset = 0;
341	357	}
342	358
343	359	VIDEO_START( gwar )
344	360	{
	361	snk_state *state = machine->driver_data<snk_state>();
345	362	int i;
346	363
347	364	/* prepare drawmode table */
348		for(i = 0; i <= 14; i++) drawmode_table[i] = DRAWMODE_SOURCE;
349		drawmode_table[15] = DRAWMODE_NONE;
	365	for(i = 0; i <= 14; i++) state->drawmode_table[i] = DRAWMODE_SOURCE;
	366	state->drawmode_table[15] = DRAWMODE_NONE;
350	367
351		memset(empty_tile,0xf,sizeof(empty_tile));
	368	memset(state->empty_tile, 0xf, sizeof(state->empty_tile));
352	369
353		tx_tilemap = tilemap_create(machine, gwar_get_tx_tile_info, tilemap_scan_cols,  8,  8, 50, 32);
354		bg_tilemap = tilemap_create(machine, gwar_get_bg_tile_info, tilemap_scan_cols, 16, 16, 32, 32);
	370	state->tx_tilemap = tilemap_create(machine, gwar_get_tx_tile_info, tilemap_scan_cols,  8,  8, 50, 32);
	371	state->bg_tilemap = tilemap_create(machine, gwar_get_bg_tile_info, tilemap_scan_cols, 16, 16, 32, 32);
355	372
356		tilemap_set_transparent_pen(tx_tilemap, 15);
	373	tilemap_set_transparent_pen(state->tx_tilemap, 15);
357	374
358		tilemap_set_scrolldx(bg_tilemap, 16, 143);
359		tilemap_set_scrolldy(bg_tilemap,  0, -32);
	375	tilemap_set_scrolldx(state->bg_tilemap, 16, 143);
	376	tilemap_set_scrolldy(state->bg_tilemap,  0, -32);
360	377
361		tx_tile_offset = 0;
	378	state->tx_tile_offset = 0;
362	379
363		is_psychos = 0;
	380	state->is_psychos = 0;
364	381	}
365	382
366	383	VIDEO_START( psychos )
367	384	{
	385	snk_state *state = machine->driver_data<snk_state>();
	386
368	387	VIDEO_START_CALL(gwar);
369		is_psychos = 1;
	388	state->is_psychos = 1;
370	389	}
371	390
372	391	VIDEO_START( tdfever )
r8962	r8963
379	398
380	399	WRITE8_HANDLER( snk_tx_videoram_w )
381	400	{
382		snk_tx_videoram[offset] = data;
383		tilemap_mark_tile_dirty(tx_tilemap, offset);
	401	snk_state *state = space->machine->driver_data<snk_state>();
	402
	403	state->tx_videoram[offset] = data;
	404	tilemap_mark_tile_dirty(state->tx_tilemap, offset);
384	405	}
385	406
386	407	WRITE8_HANDLER( marvins_fg_videoram_w )
387	408	{
388		snk_fg_videoram[offset] = data;
389		tilemap_mark_tile_dirty(fg_tilemap, offset);
	409	snk_state *state = space->machine->driver_data<snk_state>();
	410
	411	state->fg_videoram[offset] = data;
	412	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
390	413	}
391	414
392	415	WRITE8_HANDLER( marvins_bg_videoram_w )
393	416	{
394		snk_bg_videoram[offset] = data;
395		tilemap_mark_tile_dirty(bg_tilemap, offset);
	417	snk_state *state = space->machine->driver_data<snk_state>();
	418
	419	state->bg_videoram[offset] = data;
	420	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
396	421	}
397	422
398	423	WRITE8_HANDLER( snk_bg_videoram_w )
399	424	{
400		snk_bg_videoram[offset] = data;
401		tilemap_mark_tile_dirty(bg_tilemap, offset >> 1);
	425	snk_state *state = space->machine->driver_data<snk_state>();
	426
	427	state->bg_videoram[offset] = data;
	428	tilemap_mark_tile_dirty(state->bg_tilemap, offset >> 1);
402	429	}
403	430
404	431
405	432	WRITE8_HANDLER( snk_fg_scrollx_w )
406	433	{
407		fg_scrollx = (fg_scrollx & ~0xff) | data;
	434	snk_state *state = space->machine->driver_data<snk_state>();
	435
	436	state->fg_scrollx = (state->fg_scrollx & ~0xff) | data;
408	437	}
409	438
410	439	WRITE8_HANDLER( snk_fg_scrolly_w )
411	440	{
412		fg_scrolly = (fg_scrolly & ~0xff) | data;
	441	snk_state *state = space->machine->driver_data<snk_state>();
	442
	443	state->fg_scrolly = (state->fg_scrolly & ~0xff) | data;
413	444	}
414	445
415	446	WRITE8_HANDLER( snk_bg_scrollx_w )
416	447	{
417		bg_scrollx = (bg_scrollx & ~0xff) | data;
	448	snk_state *state = space->machine->driver_data<snk_state>();
	449
	450	state->bg_scrollx = (state->bg_scrollx & ~0xff) | data;
418	451	}
419	452
420	453	WRITE8_HANDLER( snk_bg_scrolly_w )
421	454	{
422		bg_scrolly = (bg_scrolly & ~0xff) | data;
	455	snk_state *state = space->machine->driver_data<snk_state>();
	456
	457	state->bg_scrolly = (state->bg_scrolly & ~0xff) | data;
423	458	}
424	459
425	460	WRITE8_HANDLER( snk_sp16_scrollx_w )
426	461	{
427		sp16_scrollx = (sp16_scrollx & ~0xff) | data;
	462	snk_state *state = space->machine->driver_data<snk_state>();
	463
	464	state->sp16_scrollx = (state->sp16_scrollx & ~0xff) | data;
428	465	}
429	466
430	467	WRITE8_HANDLER( snk_sp16_scrolly_w )
431	468	{
432		sp16_scrolly = (sp16_scrolly & ~0xff) | data;
	469	snk_state *state = space->machine->driver_data<snk_state>();
	470
	471	state->sp16_scrolly = (state->sp16_scrolly & ~0xff) | data;
433	472	}
434	473
435	474	WRITE8_HANDLER( snk_sp32_scrollx_w )
436	475	{
437		sp32_scrollx = (sp32_scrollx & ~0xff) | data;
	476	snk_state *state = space->machine->driver_data<snk_state>();
	477
	478	state->sp32_scrollx = (state->sp32_scrollx & ~0xff) | data;
438	479	}
439	480
440	481	WRITE8_HANDLER( snk_sp32_scrolly_w )
441	482	{
442		sp32_scrolly = (sp32_scrolly & ~0xff) | data;
	483	snk_state *state = space->machine->driver_data<snk_state>();
	484
	485	state->sp32_scrolly = (state->sp32_scrolly & ~0xff) | data;
443	486	}
444	487
445	488	WRITE8_HANDLER( snk_sprite_split_point_w )
446	489	{
447		sprite_split_point = data;
	490	snk_state *state = space->machine->driver_data<snk_state>();
	491
	492	state->sprite_split_point = data;
448	493	}
449	494
450	495
451	496	WRITE8_HANDLER( marvins_palette_bank_w )
452	497	{
453		tilemap_set_palette_offset(bg_tilemap, data & 0x70);
454		tilemap_set_palette_offset(fg_tilemap, (data & 0x07) << 4);
	498	snk_state *state = space->machine->driver_data<snk_state>();
	499
	500	tilemap_set_palette_offset(state->bg_tilemap, data & 0x70);
	501	tilemap_set_palette_offset(state->fg_tilemap, (data & 0x07) << 4);
455	502	}
456	503
457	504	WRITE8_HANDLER( marvins_flipscreen_w )
r8962	r8963
463	510
464	511	WRITE8_HANDLER( sgladiat_flipscreen_w )
465	512	{
	513	snk_state *state = space->machine->driver_data<snk_state>();
	514
466	515	flip_screen_set(space->machine, data & 0x80);
467	516
468		tilemap_set_palette_offset(bg_tilemap, ((data & 0xf) ^ 8) << 4);
	517	tilemap_set_palette_offset(state->bg_tilemap, ((data & 0xf) ^ 8) << 4);
469	518
470	519	// other bits unknown
471	520	}
472	521
473	522	WRITE8_HANDLER( hal21_flipscreen_w )
474	523	{
	524	snk_state *state = space->machine->driver_data<snk_state>();
	525
475	526	flip_screen_set(space->machine, data & 0x80);
476	527
477		tilemap_set_palette_offset(bg_tilemap, ((data & 0xf) ^ 8) << 4);
478		if (bg_tile_offset != ((data & 0x20) << 3))
	528	tilemap_set_palette_offset(state->bg_tilemap, ((data & 0xf) ^ 8) << 4);
	529	if (state->bg_tile_offset != ((data & 0x20) << 3))
479	530	{
480		bg_tile_offset = (data & 0x20) << 3;
481		tilemap_mark_all_tiles_dirty(bg_tilemap);
	531	state->bg_tile_offset = (data & 0x20) << 3;
	532	tilemap_mark_all_tiles_dirty(state->bg_tilemap);
482	533	}
483	534
484	535	// other bits unknown
r8962	r8963
486	537
487	538	WRITE8_HANDLER( marvins_scroll_msb_w )
488	539	{
489		bg_scrollx =   (bg_scrollx   & 0xff) | ((data & 0x04) << 6);
490		fg_scrollx =   (fg_scrollx   & 0xff) | ((data & 0x02) << 7);
491		sp16_scrollx = (sp16_scrollx & 0xff) | ((data & 0x01) << 8);
	540	snk_state *state = space->machine->driver_data<snk_state>();
	541
	542	state->bg_scrollx =   (state->bg_scrollx   & 0xff) | ((data & 0x04) << 6);
	543	state->fg_scrollx =   (state->fg_scrollx   & 0xff) | ((data & 0x02) << 7);
	544	state->sp16_scrollx = (state->sp16_scrollx & 0xff) | ((data & 0x01) << 8);
492	545	}
493	546
494	547	WRITE8_HANDLER( jcross_scroll_msb_w )
495	548	{
496		bg_scrolly =   (bg_scrolly   & 0xff) | ((data & 0x10) << 4);
497		sp16_scrolly = (sp16_scrolly & 0xff) | ((data & 0x08) << 5);
498		bg_scrollx =   (bg_scrollx   & 0xff) | ((data & 0x02) << 7);
499		sp16_scrollx = (sp16_scrollx & 0xff) | ((data & 0x01) << 8);
	549	snk_state *state = space->machine->driver_data<snk_state>();
	550
	551	state->bg_scrolly =   (state->bg_scrolly   & 0xff) | ((data & 0x10) << 4);
	552	state->sp16_scrolly = (state->sp16_scrolly & 0xff) | ((data & 0x08) << 5);
	553	state->bg_scrollx =   (state->bg_scrollx   & 0xff) | ((data & 0x02) << 7);
	554	state->sp16_scrollx = (state->sp16_scrollx & 0xff) | ((data & 0x01) << 8);
500	555	}
501	556
502	557	WRITE8_HANDLER( sgladiat_scroll_msb_w )
503	558	{
504		bg_scrollx =   (bg_scrollx   & 0xff) | ((data & 0x02) << 7);
505		sp16_scrollx = (sp16_scrollx & 0xff) | ((data & 0x01) << 8);
	559	snk_state *state = space->machine->driver_data<snk_state>();
	560
	561	state->bg_scrollx =   (state->bg_scrollx   & 0xff) | ((data & 0x02) << 7);
	562	state->sp16_scrollx = (state->sp16_scrollx & 0xff) | ((data & 0x01) << 8);
506	563	}
507	564
508	565	WRITE8_HANDLER( aso_videoattrs_w )
r8962	r8963
519	576	-------X    scrollx MSB (sprites)
520	577	*/
521	578
	579	snk_state *state = space->machine->driver_data<snk_state>();
	580
522	581	flip_screen_set(space->machine, data & 0x20);
523	582
524		bg_scrolly =   (bg_scrolly   & 0xff) | ((data & 0x10) << 4);
525		sp16_scrolly = (sp16_scrolly & 0xff) | ((data & 0x08) << 5);
526		bg_scrollx =   (bg_scrollx   & 0xff) | ((data & 0x02) << 7);
527		sp16_scrollx = (sp16_scrollx & 0xff) | ((data & 0x01) << 8);
	583	state->bg_scrolly =   (state->bg_scrolly   & 0xff) | ((data & 0x10) << 4);
	584	state->sp16_scrolly = (state->sp16_scrolly & 0xff) | ((data & 0x08) << 5);
	585	state->bg_scrollx =   (state->bg_scrollx   & 0xff) | ((data & 0x02) << 7);
	586	state->sp16_scrollx = (state->sp16_scrollx & 0xff) | ((data & 0x01) << 8);
528	587	}
529	588
530	589	WRITE8_HANDLER( tnk3_videoattrs_w )
r8962	r8963
541	600	-------X    scrollx MSB (sprites)
542	601	*/
543	602
	603	snk_state *state = space->machine->driver_data<snk_state>();
	604
544	605	flip_screen_set(space->machine, data & 0x80);
545	606
546		if (tx_tile_offset != ((data & 0x40) << 2))
	607	if (state->tx_tile_offset != ((data & 0x40) << 2))
547	608	{
548		tx_tile_offset = (data & 0x40) << 2;
549		tilemap_mark_all_tiles_dirty(tx_tilemap);
	609	state->tx_tile_offset = (data & 0x40) << 2;
	610	tilemap_mark_all_tiles_dirty(state->tx_tilemap);
550	611	}
551	612
552		bg_scrolly =   (bg_scrolly   & 0xff) | ((data & 0x10) << 4);
553		sp16_scrolly = (sp16_scrolly & 0xff) | ((data & 0x08) << 5);
554		bg_scrollx =   (bg_scrollx   & 0xff) | ((data & 0x02) << 7);
555		sp16_scrollx = (sp16_scrollx & 0xff) | ((data & 0x01) << 8);
	613	state->bg_scrolly =   (state->bg_scrolly   & 0xff) | ((data & 0x10) << 4);
	614	state->sp16_scrolly = (state->sp16_scrolly & 0xff) | ((data & 0x08) << 5);
	615	state->bg_scrollx =   (state->bg_scrollx   & 0xff) | ((data & 0x02) << 7);
	616	state->sp16_scrollx = (state->sp16_scrollx & 0xff) | ((data & 0x01) << 8);
556	617	}
557	618
558	619	WRITE8_HANDLER( aso_bg_bank_w )
559	620	{
560		tilemap_set_palette_offset(bg_tilemap, ((data & 0xf) ^ 8) << 4);
561		if (bg_tile_offset != ((data & 0x30) << 4))
	621	snk_state *state = space->machine->driver_data<snk_state>();
	622
	623	tilemap_set_palette_offset(state->bg_tilemap, ((data & 0xf) ^ 8) << 4);
	624	if (state->bg_tile_offset != ((data & 0x30) << 4))
562	625	{
563		bg_tile_offset = (data & 0x30) << 4;
564		tilemap_mark_all_tiles_dirty(bg_tilemap);
	626	state->bg_tile_offset = (data & 0x30) << 4;
	627	tilemap_mark_all_tiles_dirty(state->bg_tilemap);
565	628	}
566	629	}
567	630
568	631	WRITE8_HANDLER( ikari_bg_scroll_msb_w )
569	632	{
570		bg_scrollx = (bg_scrollx & 0xff) | ((data & 0x02) << 7);
571		bg_scrolly = (bg_scrolly & 0xff) | ((data & 0x01) << 8);
	633	snk_state *state = space->machine->driver_data<snk_state>();
	634
	635	state->bg_scrollx = (state->bg_scrollx & 0xff) | ((data & 0x02) << 7);
	636	state->bg_scrolly = (state->bg_scrolly & 0xff) | ((data & 0x01) << 8);
572	637	}
573	638
574	639	WRITE8_HANDLER( ikari_sp_scroll_msb_w )
575	640	{
576		sp32_scrollx = (sp32_scrollx & 0xff) | ((data & 0x20) << 3);
577		sp16_scrollx = (sp16_scrollx & 0xff) | ((data & 0x10) << 4);
578		sp32_scrolly = (sp32_scrolly & 0xff) | ((data & 0x08) << 5);
579		sp16_scrolly = (sp16_scrolly & 0xff) | ((data & 0x04) << 6);
	641	snk_state *state = space->machine->driver_data<snk_state>();
	642
	643	state->sp32_scrollx = (state->sp32_scrollx & 0xff) | ((data & 0x20) << 3);
	644	state->sp16_scrollx = (state->sp16_scrollx & 0xff) | ((data & 0x10) << 4);
	645	state->sp32_scrolly = (state->sp32_scrolly & 0xff) | ((data & 0x08) << 5);
	646	state->sp16_scrolly = (state->sp16_scrolly & 0xff) | ((data & 0x04) << 6);
580	647	}
581	648
582	649	WRITE8_HANDLER( ikari_unknown_video_w )
r8962	r8963
587	654	hard flags test and the test grid.
588	655	Changing palette bank is necessary to fix colors in test mode. */
589	656
	657	snk_state *state = space->machine->driver_data<snk_state>();
	658
590	659	if (data != 0x20 &&   // normal
591	660	data != 0x31 &&   // ikari test
592	661	data != 0xaa)   // victroad spurious during boot
593	662	popmessage("attrs %02x contact MAMEDEV", data);
594	663
595		tilemap_set_palette_offset(tx_tilemap, (data & 0x01) << 4);
596		if (tx_tile_offset != ((data & 0x10) << 4))
	664	tilemap_set_palette_offset(state->tx_tilemap, (data & 0x01) << 4);
	665	if (state->tx_tile_offset != ((data & 0x10) << 4))
597	666	{
598		tx_tile_offset = (data & 0x10) << 4;
599		tilemap_mark_all_tiles_dirty(tx_tilemap);
	667	state->tx_tile_offset = (data & 0x10) << 4;
	668	tilemap_mark_all_tiles_dirty(state->tx_tilemap);
600	669	}
601	670	}
602	671
603	672	WRITE8_HANDLER( gwar_tx_bank_w )
604	673	{
605		tilemap_set_palette_offset(tx_tilemap, (data & 0xf) << 4);
606		if (tx_tile_offset != ((data & 0x30) << 4))
	674	snk_state *state = space->machine->driver_data<snk_state>();
	675
	676	tilemap_set_palette_offset(state->tx_tilemap, (data & 0xf) << 4);
	677	if (state->tx_tile_offset != ((data & 0x30) << 4))
607	678	{
608		tx_tile_offset = (data & 0x30) << 4;
609		tilemap_mark_all_tiles_dirty(tx_tilemap);
	679	state->tx_tile_offset = (data & 0x30) << 4;
	680	tilemap_mark_all_tiles_dirty(state->tx_tilemap);
610	681	}
611	682
612		if (is_psychos)
613		tilemap_set_palette_offset(bg_tilemap, (data & 0x80));
	683	if (state->is_psychos)
	684	tilemap_set_palette_offset(state->bg_tilemap, (data & 0x80));
614	685	}
615	686
616	687	WRITE8_HANDLER( gwar_videoattrs_w )
617	688	{
	689	snk_state *state = space->machine->driver_data<snk_state>();
	690
618	691	flip_screen_set(space->machine, data & 0x04);
619	692
620		sp32_scrollx = (sp32_scrollx & 0xff) | ((data & 0x80) << 1);
621		sp16_scrollx = (sp16_scrollx & 0xff) | ((data & 0x40) << 2);
622		sp32_scrolly = (sp32_scrolly & 0xff) | ((data & 0x20) << 3);
623		sp16_scrolly = (sp16_scrolly & 0xff) | ((data & 0x10) << 4);
624		bg_scrollx =   (bg_scrollx   & 0xff) | ((data & 0x02) << 7);
625		bg_scrolly =   (bg_scrolly   & 0xff) | ((data & 0x01) << 8);
	693	state->sp32_scrollx = (state->sp32_scrollx & 0xff) | ((data & 0x80) << 1);
	694	state->sp16_scrollx = (state->sp16_scrollx & 0xff) | ((data & 0x40) << 2);
	695	state->sp32_scrolly = (state->sp32_scrolly & 0xff) | ((data & 0x20) << 3);
	696	state->sp16_scrolly = (state->sp16_scrolly & 0xff) | ((data & 0x10) << 4);
	697	state->bg_scrollx =   (state->bg_scrollx   & 0xff) | ((data & 0x02) << 7);
	698	state->bg_scrolly =   (state->bg_scrolly   & 0xff) | ((data & 0x01) << 8);
626	699	}
627	700
628	701	WRITE8_HANDLER( gwara_videoattrs_w )
629	702	{
	703	snk_state *state = space->machine->driver_data<snk_state>();
	704
630	705	flip_screen_set(space->machine, data & 0x10);
631	706
632		bg_scrollx =   (bg_scrollx   & 0xff) | ((data & 0x02) << 7);
633		bg_scrolly =   (bg_scrolly   & 0xff) | ((data & 0x01) << 8);
	707	state->bg_scrollx =   (state->bg_scrollx   & 0xff) | ((data & 0x02) << 7);
	708	state->bg_scrolly =   (state->bg_scrolly   & 0xff) | ((data & 0x01) << 8);
634	709	}
635	710
636	711	WRITE8_HANDLER( gwara_sp_scroll_msb_w )
637	712	{
638		sp32_scrollx = (sp32_scrollx & 0xff) | ((data & 0x20) << 3);
639		sp16_scrollx = (sp16_scrollx & 0xff) | ((data & 0x10) << 4);
640		sp32_scrolly = (sp32_scrolly & 0xff) | ((data & 0x08) << 5);
641		sp16_scrolly = (sp16_scrolly & 0xff) | ((data & 0x04) << 6);
	713	snk_state *state = space->machine->driver_data<snk_state>();
	714
	715	state->sp32_scrollx = (state->sp32_scrollx & 0xff) | ((data & 0x20) << 3);
	716	state->sp16_scrollx = (state->sp16_scrollx & 0xff) | ((data & 0x10) << 4);
	717	state->sp32_scrolly = (state->sp32_scrolly & 0xff) | ((data & 0x08) << 5);
	718	state->sp16_scrolly = (state->sp16_scrolly & 0xff) | ((data & 0x04) << 6);
642	719	}
643	720
644	721	WRITE8_HANDLER( tdfever_sp_scroll_msb_w )
645	722	{
646		sp32_scrolly = (sp32_scrolly & 0xff) | ((data & 0x80) << 1);
647		sp32_scrollx = (sp32_scrollx & 0xff) | ((data & 0x40) << 2);
	723	snk_state *state = space->machine->driver_data<snk_state>();
	724
	725	state->sp32_scrolly = (state->sp32_scrolly & 0xff) | ((data & 0x80) << 1);
	726	state->sp32_scrollx = (state->sp32_scrollx & 0xff) | ((data & 0x40) << 2);
648	727	}
649	728
650	729	WRITE8_HANDLER( tdfever_spriteram_w )
651	730	{
	731	snk_state *state = space->machine->driver_data<snk_state>();
	732
652	733	/*  partial updates avoid flickers in the fsoccer radar. */
653		if (offset < 0x80 && space->machine->generic.spriteram.u8[offset] != data)
	734	if (offset < 0x80 && state->spriteram[offset] != data)
654	735	{
655	736	int vpos = space->machine->primary_screen->vpos();
656	737
r8962	r8963
658	739	space->machine->primary_screen->update_partial(vpos - 1);
659	740	}
660	741
661		space->machine->generic.spriteram.u8[offset] = data;
	742	state->spriteram[offset] = data;
662	743	}
663	744
664	745	/**************************************************************************************/
r8962	r8963
666	747	static void marvins_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect,
667	748	const int scrollx, const int scrolly, const int from, const int to)
668	749	{
	750	snk_state *state = machine->driver_data<snk_state>();
669	751	const gfx_element *gfx = machine->gfx[3];
670	752	const UINT8 *source, *finish;
671	753
672		source = machine->generic.spriteram.u8 + from*4;
673		finish = machine->generic.spriteram.u8 + to*4;
	754	source = state->spriteram + from*4;
	755	finish = state->spriteram + to*4;
674	756
675	757	while( source<finish )
676	758	{
r8962	r8963
700	782	color,
701	783	flipx, flipy,
702	784	sx, sy,
703		drawmode_table, machine->shadow_table);
	785	state->drawmode_table, machine->shadow_table);
704	786
705	787	source+=4;
706	788	}
r8962	r8963
709	791
710	792	static void tnk3_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, const int xscroll, const int yscroll)
711	793	{
712		UINT8 *spriteram = machine->generic.spriteram.u8;
	794	snk_state *state = machine->driver_data<snk_state>();
	795	UINT8 *spriteram = state->spriteram;
713	796	const gfx_element *gfx = machine->gfx[2];
714	797	const int size = gfx->width;
715	798	int tile_number, attributes, color, sx, sy;
r8962	r8963
722	805	/* sgladiat and tnk3 have 512 tiles, bit 6 is bank and bit 5 is y-flip */
723	806	/* athena has 1024 tiles, bit 6 and bit 5 are bank */
724	807
725		for (offs = 0; offs < num_sprites*4; offs += 4)
	808	for (offs = 0; offs < state->num_sprites*4; offs += 4)
726	809	{
727	810	tile_number = spriteram[offs+1];
728	811	attributes  = spriteram[offs+3];
r8962	r8963
757	840	}
758	841
759	842	sx &= 0x1ff;
760		sy &= yscroll_mask;   // sgladiat apparently has only 256 pixels of vertical scrolling range
	843	sy &= state->yscroll_mask;   // sgladiat apparently has only 256 pixels of vertical scrolling range
761	844	if (sx > 512-size) sx -= 512;
762		if (sy > (yscroll_mask+1)-size) sy -= (yscroll_mask+1);
	845	if (sy > (state->yscroll_mask+1)-size) sy -= (state->yscroll_mask+1);
763	846
764	847	drawgfx_transtable(bitmap,cliprect,gfx,
765	848	tile_number,
766	849	color,
767	850	xflip,yflip,
768	851	sx,sy,
769		drawmode_table, machine->shadow_table);
	852	state->drawmode_table, machine->shadow_table);
770	853	}
771	854	}
772	855
r8962	r8963
774	857	static void ikari_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect,
775	858	const int start, const int xscroll, const int yscroll, const UINT8 *source, const int gfxnum )
776	859	{
	860	snk_state *state = machine->driver_data<snk_state>();
777	861	const gfx_element *gfx = machine->gfx[gfxnum];
778	862	const int size = gfx->width;
779	863	int tile_number, attributes, color, sx, sy;
r8962	r8963
812	896	color,
813	897	0,0,
814	898	sx,sy,
815		drawmode_table, machine->shadow_table);
	899	state->drawmode_table, machine->shadow_table);
816	900	}
817	901	}
818	902
r8962	r8963
845	929	static void tdfever_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect,
846	930	const int xscroll, const int yscroll, const UINT8 *source, const int gfxnum, const int hw_xflip, const int from, const int to )
847	931	{
	932	snk_state *state = machine->driver_data<snk_state>();
848	933	const gfx_element *gfx = machine->gfx[gfxnum];
849	934	const int size = gfx->width;
850	935	int tile_number, attributes, sx, sy, color;
r8962	r8963
899	984	color,
900	985	flipx,flipy,
901	986	sx,sy,
902		drawmode_table, machine->shadow_table);
	987	state->drawmode_table, machine->shadow_table);
903	988	}
904	989	}
905	990
r8962	r8963
907	992
908	993	VIDEO_UPDATE( marvins )
909	994	{
910		tilemap_set_scrollx(bg_tilemap, 0, bg_scrollx);
911		tilemap_set_scrolly(bg_tilemap, 0, bg_scrolly);
912		tilemap_set_scrollx(fg_tilemap, 0, fg_scrollx);
913		tilemap_set_scrolly(fg_tilemap, 0, fg_scrolly);
	995	snk_state *state = screen->machine->driver_data<snk_state>();
914	996
915		tilemap_draw(bitmap,cliprect,bg_tilemap,0 ,0);
916		marvins_draw_sprites(screen->machine,bitmap,cliprect, sp16_scrollx, sp16_scrolly, 0, sprite_split_point>>2 );
917		tilemap_draw(bitmap,cliprect,fg_tilemap,0 ,0);
918		marvins_draw_sprites(screen->machine,bitmap,cliprect, sp16_scrollx, sp16_scrolly, sprite_split_point>>2, 25 );
919		tilemap_draw(bitmap,cliprect,tx_tilemap,0 ,0);
	997	tilemap_set_scrollx(state->bg_tilemap, 0, state->bg_scrollx);
	998	tilemap_set_scrolly(state->bg_tilemap, 0, state->bg_scrolly);
	999	tilemap_set_scrollx(state->fg_tilemap, 0, state->fg_scrollx);
	1000	tilemap_set_scrolly(state->fg_tilemap, 0, state->fg_scrolly);
920	1001
	1002	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
	1003	marvins_draw_sprites(screen->machine, bitmap, cliprect, state->sp16_scrollx, state->sp16_scrolly, 0, state->sprite_split_point>>2);
	1004	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
	1005	marvins_draw_sprites(screen->machine, bitmap, cliprect, state->sp16_scrollx, state->sp16_scrolly, state->sprite_split_point>>2, 25);
	1006	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
	1007
921	1008	return 0;
922	1009	}
923	1010
924	1011
925	1012	VIDEO_UPDATE( tnk3 )
926	1013	{
927		tilemap_set_scrollx(bg_tilemap, 0, bg_scrollx);
928		tilemap_set_scrolly(bg_tilemap, 0, bg_scrolly);
	1014	snk_state *state = screen->machine->driver_data<snk_state>();
929	1015
930		tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
931		tnk3_draw_sprites(screen->machine, bitmap, cliprect, sp16_scrollx, sp16_scrolly);
932		tilemap_draw(bitmap, cliprect, tx_tilemap, 0, 0);
	1016	tilemap_set_scrollx(state->bg_tilemap, 0, state->bg_scrollx);
	1017	tilemap_set_scrolly(state->bg_tilemap, 0, state->bg_scrolly);
933	1018
	1019	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
	1020	tnk3_draw_sprites(screen->machine, bitmap, cliprect, state->sp16_scrollx, state->sp16_scrolly);
	1021	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
	1022
934	1023	return 0;
935	1024	}
936	1025
937	1026
938	1027	VIDEO_UPDATE( ikari )
939	1028	{
940		tilemap_set_scrollx(bg_tilemap, 0, bg_scrollx);
941		tilemap_set_scrolly(bg_tilemap, 0, bg_scrolly);
	1029	snk_state *state = screen->machine->driver_data<snk_state>();
942	1030
943		tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
	1031	tilemap_set_scrollx(state->bg_tilemap, 0, state->bg_scrollx);
	1032	tilemap_set_scrolly(state->bg_tilemap, 0, state->bg_scrolly);
944	1033
945		ikari_draw_sprites(screen->machine, bitmap, cliprect,  0, sp16_scrollx, sp16_scrolly, screen->machine->generic.spriteram.u8 + 0x800, 2 );
946		ikari_draw_sprites(screen->machine, bitmap, cliprect,  0, sp32_scrollx, sp32_scrolly, screen->machine->generic.spriteram.u8,         3 );
947		ikari_draw_sprites(screen->machine, bitmap, cliprect, 25, sp16_scrollx, sp16_scrolly, screen->machine->generic.spriteram.u8 + 0x800, 2 );
	1034	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
948	1035
949		tilemap_draw(bitmap, cliprect, tx_tilemap, 0, 0);
	1036	ikari_draw_sprites(screen->machine, bitmap, cliprect,  0, state->sp16_scrollx, state->sp16_scrolly, state->spriteram + 0x800, 2 );
	1037	ikari_draw_sprites(screen->machine, bitmap, cliprect,  0, state->sp32_scrollx, state->sp32_scrolly, state->spriteram,         3 );
	1038	ikari_draw_sprites(screen->machine, bitmap, cliprect, 25, state->sp16_scrollx, state->sp16_scrolly, state->spriteram + 0x800, 2 );
	1039
	1040	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
950	1041	return 0;
951	1042	}
952	1043
953	1044
954	1045	VIDEO_UPDATE( gwar )
955	1046	{
956		tilemap_set_scrollx(bg_tilemap, 0, bg_scrollx);
957		tilemap_set_scrolly(bg_tilemap, 0, bg_scrolly);
	1047	snk_state *state = screen->machine->driver_data<snk_state>();
958	1048
959		tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
	1049	tilemap_set_scrollx(state->bg_tilemap, 0, state->bg_scrollx);
	1050	tilemap_set_scrolly(state->bg_tilemap, 0, state->bg_scrolly);
960	1051
961		tdfever_draw_sprites(screen->machine, bitmap, cliprect, sp16_scrollx, sp16_scrolly, screen->machine->generic.spriteram.u8 + 0x800, 2, 0, 0, sprite_split_point );
962		tdfever_draw_sprites(screen->machine, bitmap, cliprect, sp32_scrollx, sp32_scrolly, screen->machine->generic.spriteram.u8,         3, 0, 0, 32 );
963		tdfever_draw_sprites(screen->machine, bitmap, cliprect, sp16_scrollx, sp16_scrolly, screen->machine->generic.spriteram.u8 + 0x800, 2, 0, sprite_split_point, 64 );
	1052	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
964	1053
965		tilemap_draw(bitmap, cliprect, tx_tilemap, 0, 0);
	1054	tdfever_draw_sprites(screen->machine, bitmap, cliprect, state->sp16_scrollx, state->sp16_scrolly, state->spriteram + 0x800, 2, 0, 0, state->sprite_split_point );
	1055	tdfever_draw_sprites(screen->machine, bitmap, cliprect, state->sp32_scrollx, state->sp32_scrolly, state->spriteram,         3, 0, 0, 32 );
	1056	tdfever_draw_sprites(screen->machine, bitmap, cliprect, state->sp16_scrollx, state->sp16_scrolly, state->spriteram + 0x800, 2, 0, state->sprite_split_point, 64 );
966	1057
	1058	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
	1059
967	1060	return 0;
968	1061	}
969	1062
970	1063
971	1064	VIDEO_UPDATE( tdfever )
972	1065	{
973		tilemap_set_scrollx(bg_tilemap, 0, bg_scrollx);
974		tilemap_set_scrolly(bg_tilemap, 0, bg_scrolly);
	1066	snk_state *state = screen->machine->driver_data<snk_state>();
975	1067
976		tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
	1068	tilemap_set_scrollx(state->bg_tilemap, 0, state->bg_scrollx);
	1069	tilemap_set_scrolly(state->bg_tilemap, 0, state->bg_scrolly);
977	1070
978		tdfever_draw_sprites(screen->machine, bitmap, cliprect, sp32_scrollx, sp32_scrolly, screen->machine->generic.spriteram.u8, 2, 1, 0, 32 );
	1071	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
979	1072
980		tilemap_draw(bitmap, cliprect, tx_tilemap, 0, 0);
	1073	tdfever_draw_sprites(screen->machine, bitmap, cliprect, state->sp32_scrollx, state->sp32_scrolly, state->spriteram, 2, 1, 0, 32 );
981	1074
	1075	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
	1076
982	1077	return 0;
983	1078	}

src/mame/video/tia.c

r8962	r8963
506	506	}
507	507
508	508
509		INLINE int current_x(const address_space *space)
	509	INLINE int current_x(address_space *space)
510	510	{
511	511	return 3 * ((space->machine->firstcpu->total_cycles() - frame_cycles) % 76) - 68;
512	512	}
513	513
514	514
515		INLINE int current_y(const address_space *space)
	515	INLINE int current_y(address_space *space)
516	516	{
517	517	return (space->machine->firstcpu->total_cycles() - frame_cycles) / 76;
518	518	}

src/mame/video/leland.c

r8962	r8963
169	169	*
170	170	*************************************/
171	171
172		static int leland_vram_port_r(const address_space *space, int offset, int num)
	172	static int leland_vram_port_r(address_space *space, int offset, int num)
173	173	{
174	174	struct vram_state_data *state = vram_state + num;
175	175	int addr = state->addr;
r8962	r8963
216	216	*
217	217	*************************************/
218	218
219		static void leland_vram_port_w(const address_space *space, int offset, int data, int num)
	219	static void leland_vram_port_w(address_space *space, int offset, int data, int num)
220	220	{
221	221	struct vram_state_data *state = vram_state + num;
222	222	int addr = state->addr;
r8962	r8963
306	306
307	307	static TIMER_CALLBACK( leland_delayed_mvram_w )
308	308	{
309		const address_space *space = cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM);
	309	address_space *space = cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM);
310	310
311	311	int num = (param >> 16) & 1;
312	312	int offset = (param >> 8) & 0xff;

src/mame/video/popeye.c

r8962	r8963
281	281	static void draw_background(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
282	282	{
283	283	int offs;
284		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	284	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
285	285
286	286	if (lastflip != flip_screen_get(machine))
287	287	{

src/mame/video/toaplan1.c

r8962	r8963
129	129	#define TOAPLAN1_SPRITERAM_SIZE      0x800   /* sprite ram */
130	130	#define TOAPLAN1_SPRITESIZERAM_SIZE  0x80   /* sprite size ram */
131	131
132		static UINT16 *pf4_tilevram16;   /*  ||  Drawn in this order */
133		static UINT16 *pf3_tilevram16;   /*  ||  */
134		static UINT16 *pf2_tilevram16;   /* \||/ */
135		static UINT16 *pf1_tilevram16;   /*  \/  */
136	132
137		static UINT16 *toaplan1_spritesizeram16;
138		static UINT16 *toaplan1_buffered_spritesizeram16;
139
140		size_t toaplan1_colorram1_size;
141		size_t toaplan1_colorram2_size;
142		UINT16 *toaplan1_colorram1;
143		UINT16 *toaplan1_colorram2;
144
145		static INT32 bcu_flipscreen;      /* Tile   controller flip flag */
146		static INT32 fcu_flipscreen;      /* Sprite controller flip flag */
147
148		static INT32 pf_voffs;
149		static INT32 spriteram_offs;
150
151		static INT32 pf1_scrollx;
152		static INT32 pf1_scrolly;
153		static INT32 pf2_scrollx;
154		static INT32 pf2_scrolly;
155		static INT32 pf3_scrollx;
156		static INT32 pf3_scrolly;
157		static INT32 pf4_scrollx;
158		static INT32 pf4_scrolly;
159		static INT32 scrollx_offs1;
160		static INT32 scrollx_offs2;
161		static INT32 scrollx_offs3;
162		static INT32 scrollx_offs4;
163		static INT32 scrolly_offs;
164
165
166		#ifdef MAME_DEBUG
167		static int display_pf1;
168		static int display_pf2;
169		static int display_pf3;
170		static int display_pf4;
171		static int displog;
172		#endif
173
174		static INT32 tiles_offsetx;
175		static INT32 tiles_offsety;
176
177		static int toaplan1_reset;      /* Hack! See toaplan1_bcu_control below */
178
179		static tilemap_t *pf1_tilemap, *pf2_tilemap, *pf3_tilemap, *pf4_tilemap;
180
181
182	133	/***************************************************************************
183	134
184	135	Callbacks for the TileMap code
r8962	r8963
187	138
188	139	static TILE_GET_INFO( get_pf1_tile_info )
189	140	{
	141	toaplan1_state *state = machine->driver_data<toaplan1_state>();
190	142	int color, tile_number, attrib;
191	143
192		tile_number = pf1_tilevram16[2*tile_index+1] & 0x7fff;
193		attrib = pf1_tilevram16[2*tile_index];
	144	tile_number = state->pf1_tilevram16[2*tile_index+1] & 0x7fff;
	145	attrib = state->pf1_tilevram16[2*tile_index];
194	146	color = attrib & 0x3f;
195	147	SET_TILE_INFO(
196	148	0,
197	149	tile_number,
198	150	color,
199	151	0);
200		if (pf1_tilevram16[2*tile_index+1] & 0x8000) tileinfo->category = 0;
201		else tileinfo->category = (attrib & 0xf000) >> 12;
	152	if (state->pf1_tilevram16[2*tile_index+1] & 0x8000) tileinfo->pen_data = state->empty_tile;
	153	tileinfo->category = (attrib & 0xf000) >> 12;
202	154	}
203	155
204	156	static TILE_GET_INFO( get_pf2_tile_info )
205	157	{
	158	toaplan1_state *state = machine->driver_data<toaplan1_state>();
206	159	int color, tile_number, attrib;
207	160
208		tile_number = pf2_tilevram16[2*tile_index+1] & 0x7fff;
209		attrib = pf2_tilevram16[2*tile_index];
	161	tile_number = state->pf2_tilevram16[2*tile_index+1] & 0x7fff;
	162	attrib = state->pf2_tilevram16[2*tile_index];
210	163	color = attrib & 0x3f;
211	164	SET_TILE_INFO(
212	165	0,
213	166	tile_number,
214	167	color,
215	168	0);
216		if (pf2_tilevram16[2*tile_index+1] & 0x8000) tileinfo->category = 0;
217		else tileinfo->category = (attrib & 0xf000) >> 12;
	169	if (state->pf2_tilevram16[2*tile_index+1] & 0x8000) tileinfo->pen_data = state->empty_tile;
	170	tileinfo->category = (attrib & 0xf000) >> 12;
218	171	}
219	172
220	173	static TILE_GET_INFO( get_pf3_tile_info )
221	174	{
	175	toaplan1_state *state = machine->driver_data<toaplan1_state>();
222	176	int color, tile_number, attrib;
223	177
224		tile_number = pf3_tilevram16[2*tile_index+1] & 0x7fff;
225		attrib = pf3_tilevram16[2*tile_index];
	178	tile_number = state->pf3_tilevram16[2*tile_index+1] & 0x7fff;
	179	attrib = state->pf3_tilevram16[2*tile_index];
226	180	color = attrib & 0x3f;
227	181	SET_TILE_INFO(
228	182	0,
229	183	tile_number,
230	184	color,
231	185	0);
232		if (pf3_tilevram16[2*tile_index+1] & 0x8000) tileinfo->category = 0;
233		else tileinfo->category = (attrib & 0xf000) >> 12;
	186	if (state->pf3_tilevram16[2*tile_index+1] & 0x8000) tileinfo->pen_data = state->empty_tile;
	187	tileinfo->category = (attrib & 0xf000) >> 12;
234	188	}
235	189
236	190	static TILE_GET_INFO( get_pf4_tile_info )
237	191	{
	192	toaplan1_state *state = machine->driver_data<toaplan1_state>();
238	193	int color, tile_number, attrib;
239	194
240		tile_number = pf4_tilevram16[2*tile_index+1] & 0x7fff;
241		attrib = pf4_tilevram16[2*tile_index];
	195	tile_number = state->pf4_tilevram16[2*tile_index+1] & 0x7fff;
	196	attrib = state->pf4_tilevram16[2*tile_index];
242	197	color = attrib & 0x3f;
243	198	SET_TILE_INFO(
244	199	0,
245	200	tile_number,
246	201	color,
247	202	0);
248		if (pf4_tilevram16[2*tile_index+1] & 0x8000) tileinfo->category = 0;
249		else tileinfo->category = (attrib & 0xf000) >> 12;
	203	if (state->pf4_tilevram16[2*tile_index+1] & 0x8000) tileinfo->pen_data = state->empty_tile;
	204	tileinfo->category = (attrib & 0xf000) >> 12;
250	205	}
251	206
252	207	/***************************************************************************
r8962	r8963
257	212
258	213	static void toaplan1_create_tilemaps(running_machine *machine)
259	214	{
260		pf1_tilemap = tilemap_create(machine, get_pf1_tile_info,tilemap_scan_rows,8,8,64,64);
261		pf2_tilemap = tilemap_create(machine, get_pf2_tile_info,tilemap_scan_rows,8,8,64,64);
262		pf3_tilemap = tilemap_create(machine, get_pf3_tile_info,tilemap_scan_rows,8,8,64,64);
263		pf4_tilemap = tilemap_create(machine, get_pf4_tile_info,tilemap_scan_rows,8,8,64,64);
	215	toaplan1_state *state = machine->driver_data<toaplan1_state>();
264	216
265		tilemap_set_transparent_pen(pf1_tilemap,0);
266		tilemap_set_transparent_pen(pf2_tilemap,0);
267		tilemap_set_transparent_pen(pf3_tilemap,0);
268		tilemap_set_transparent_pen(pf4_tilemap,0);
	217	state->pf1_tilemap = tilemap_create(machine, get_pf1_tile_info, tilemap_scan_rows, 8, 8, 64, 64);
	218	state->pf2_tilemap = tilemap_create(machine, get_pf2_tile_info, tilemap_scan_rows, 8, 8, 64, 64);
	219	state->pf3_tilemap = tilemap_create(machine, get_pf3_tile_info, tilemap_scan_rows, 8, 8, 64, 64);
	220	state->pf4_tilemap = tilemap_create(machine, get_pf4_tile_info, tilemap_scan_rows, 8, 8, 64, 64);
	221
	222	tilemap_set_transparent_pen(state->pf1_tilemap, 0);
	223	tilemap_set_transparent_pen(state->pf2_tilemap, 0);
	224	tilemap_set_transparent_pen(state->pf3_tilemap, 0);
	225	tilemap_set_transparent_pen(state->pf4_tilemap, 0);
	226
	227	memset(state->empty_tile, 0x00, sizeof(state->empty_tile));
269	228	}
270	229
271	230
272	231	static void toaplan1_paletteram_alloc(running_machine *machine)
273	232	{
274		machine->generic.paletteram.u16 = auto_alloc_array(machine, UINT16, (toaplan1_colorram1_size + toaplan1_colorram2_size)/2);
	233	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	234
	235	machine->generic.paletteram.u16 = auto_alloc_array(machine, UINT16, (state->colorram1_size + state->colorram2_size)/2);
	236
	237	state_save_register_global_pointer(machine, machine->generic.paletteram.u16, (state->colorram1_size + state->colorram2_size)/2);
275	238	}
276	239
277	240	static void toaplan1_vram_alloc(running_machine *machine)
278	241	{
279		pf1_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
280		pf2_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
281		pf3_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
282		pf4_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
	242	toaplan1_state *state = machine->driver_data<toaplan1_state>();
283	243
	244	state->pf1_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
	245	state->pf2_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
	246	state->pf3_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
	247	state->pf4_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
	248
	249	state_save_register_global_pointer(machine, state->pf1_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
	250	state_save_register_global_pointer(machine, state->pf2_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
	251	state_save_register_global_pointer(machine, state->pf3_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
	252	state_save_register_global_pointer(machine, state->pf4_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
	253
284	254	#ifdef MAME_DEBUG
285		display_pf1 = 1;
286		display_pf2 = 1;
287		display_pf3 = 1;
288		display_pf4 = 1;
289		displog = 0;
	255	state->display_pf1 = 1;
	256	state->display_pf2 = 1;
	257	state->display_pf3 = 1;
	258	state->display_pf4 = 1;
	259	state->displog = 0;
290	260	#endif
291	261	}
292	262
293	263	static void toaplan1_spritevram_alloc(running_machine *machine)
294	264	{
295		machine->generic.spriteram.u16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITERAM_SIZE/2);
296		machine->generic.buffered_spriteram.u16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITERAM_SIZE/2);
297		toaplan1_spritesizeram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
298		toaplan1_buffered_spritesizeram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
	265	toaplan1_state *state = machine->driver_data<toaplan1_state>();
299	266
300		machine->generic.spriteram_size = TOAPLAN1_SPRITERAM_SIZE;
	267	state->spriteram = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITERAM_SIZE/2);
	268	state->buffered_spriteram = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITERAM_SIZE/2);
	269	state->spritesizeram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
	270	state->buffered_spritesizeram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
	271
	272	state_save_register_global_pointer(machine, state->spriteram, TOAPLAN1_SPRITERAM_SIZE/2);
	273	state_save_register_global_pointer(machine, state->buffered_spriteram, TOAPLAN1_SPRITERAM_SIZE/2);
	274	state_save_register_global_pointer(machine, state->spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
	275	state_save_register_global_pointer(machine, state->buffered_spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
	276
	277	state->spriteram_size = TOAPLAN1_SPRITERAM_SIZE;
301	278	}
302	279
303		static void toaplan1_set_scrolls(void)
	280	static void toaplan1_set_scrolls(running_machine *machine)
304	281	{
305		tilemap_set_scrollx(pf1_tilemap,0,(pf1_scrollx >> 7) - (tiles_offsetx - scrollx_offs1));
306		tilemap_set_scrollx(pf2_tilemap,0,(pf2_scrollx >> 7) - (tiles_offsetx - scrollx_offs2));
307		tilemap_set_scrollx(pf3_tilemap,0,(pf3_scrollx >> 7) - (tiles_offsetx - scrollx_offs3));
308		tilemap_set_scrollx(pf4_tilemap,0,(pf4_scrollx >> 7) - (tiles_offsetx - scrollx_offs4));
309		tilemap_set_scrolly(pf1_tilemap,0,(pf1_scrolly >> 7) - (tiles_offsety - scrolly_offs));
310		tilemap_set_scrolly(pf2_tilemap,0,(pf2_scrolly >> 7) - (tiles_offsety - scrolly_offs));
311		tilemap_set_scrolly(pf3_tilemap,0,(pf3_scrolly >> 7) - (tiles_offsety - scrolly_offs));
312		tilemap_set_scrolly(pf4_tilemap,0,(pf4_scrolly >> 7) - (tiles_offsety - scrolly_offs));
	282	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	283
	284	tilemap_set_scrollx(state->pf1_tilemap, 0, (state->pf1_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs1));
	285	tilemap_set_scrollx(state->pf2_tilemap, 0, (state->pf2_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs2));
	286	tilemap_set_scrollx(state->pf3_tilemap, 0, (state->pf3_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs3));
	287	tilemap_set_scrollx(state->pf4_tilemap, 0, (state->pf4_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs4));
	288	tilemap_set_scrolly(state->pf1_tilemap, 0, (state->pf1_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	289	tilemap_set_scrolly(state->pf2_tilemap, 0, (state->pf2_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	290	tilemap_set_scrolly(state->pf3_tilemap, 0, (state->pf3_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	291	tilemap_set_scrolly(state->pf4_tilemap, 0, (state->pf4_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
313	292	}
314	293
315	294	static STATE_POSTLOAD( rallybik_flipscreen )
316	295	{
317		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
318		rallybik_bcu_flipscreen_w(space, 0, bcu_flipscreen, 0xffff);
	296	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	297	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	298
	299	rallybik_bcu_flipscreen_w(space, 0, state->bcu_flipscreen, 0xffff);
319	300	}
320	301
321	302	static STATE_POSTLOAD( toaplan1_flipscreen )
322	303	{
323		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
324		toaplan1_bcu_flipscreen_w(space, 0, bcu_flipscreen, 0xffff);
	304	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	305	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	306
	307	toaplan1_bcu_flipscreen_w(space, 0, state->bcu_flipscreen, 0xffff);
325	308	}
326	309
	310	static void register_common(running_machine *machine)
	311	{
	312	toaplan1_state *state = machine->driver_data<toaplan1_state>();
327	313
	314	state_save_register_global(machine, state->scrollx_offs1);
	315	state_save_register_global(machine, state->scrollx_offs2);
	316	state_save_register_global(machine, state->scrollx_offs3);
	317	state_save_register_global(machine, state->scrollx_offs4);
	318	state_save_register_global(machine, state->scrolly_offs);
	319
	320	state_save_register_global(machine, state->bcu_flipscreen);
	321	state_save_register_global(machine, state->fcu_flipscreen);
	322	state_save_register_global(machine, state->reset);
	323
	324	state_save_register_global(machine, state->pf1_scrollx);
	325	state_save_register_global(machine, state->pf1_scrolly);
	326	state_save_register_global(machine, state->pf2_scrollx);
	327	state_save_register_global(machine, state->pf2_scrolly);
	328	state_save_register_global(machine, state->pf3_scrollx);
	329	state_save_register_global(machine, state->pf3_scrolly);
	330	state_save_register_global(machine, state->pf4_scrollx);
	331	state_save_register_global(machine, state->pf4_scrolly);
	332
	333	state_save_register_global(machine, state->tiles_offsetx);
	334	state_save_register_global(machine, state->tiles_offsety);
	335	state_save_register_global(machine, state->pf_voffs);
	336	state_save_register_global(machine, state->spriteram_offs);
	337	}
	338
	339
328	340	VIDEO_START( rallybik )
329	341	{
	342	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	343
330	344	toaplan1_create_tilemaps(machine);
331	345	toaplan1_paletteram_alloc(machine);
332	346	toaplan1_vram_alloc(machine);
333	347
334		scrollx_offs1 = 0x00d + 6;
335		scrollx_offs2 = 0x00d + 4;
336		scrollx_offs3 = 0x00d + 2;
337		scrollx_offs4 = 0x00d + 0;
338		scrolly_offs  = 0x111;
	348	state->buffered_spriteram = auto_alloc_array_clear(machine, UINT16, state->spriteram_size/2);
	349	state_save_register_global_pointer(machine, state->buffered_spriteram, state->spriteram_size/2);
339	350
340		bcu_flipscreen = -1;
341		toaplan1_reset = 0;
	351	state->scrollx_offs1 = 0x00d + 6;
	352	state->scrollx_offs2 = 0x00d + 4;
	353	state->scrollx_offs3 = 0x00d + 2;
	354	state->scrollx_offs4 = 0x00d + 0;
	355	state->scrolly_offs  = 0x111;
342	356
343		state_save_register_global_pointer(machine, machine->generic.paletteram.u16, (toaplan1_colorram1_size + toaplan1_colorram2_size)/2);
344		state_save_register_global_pointer(machine, pf1_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
345		state_save_register_global_pointer(machine, pf2_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
346		state_save_register_global_pointer(machine, pf3_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
347		state_save_register_global_pointer(machine, pf4_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
	357	state->bcu_flipscreen = -1;
	358	state->fcu_flipscreen = 0;
	359	state->reset = 0;
348	360
349		state_save_register_global(machine, scrollx_offs1);
350		state_save_register_global(machine, scrollx_offs2);
351		state_save_register_global(machine, scrollx_offs3);
352		state_save_register_global(machine, scrollx_offs4);
353		state_save_register_global(machine, scrolly_offs);
354		state_save_register_global(machine, bcu_flipscreen);
355		state_save_register_global(machine, pf1_scrollx);
356		state_save_register_global(machine, pf1_scrolly);
357		state_save_register_global(machine, pf2_scrollx);
358		state_save_register_global(machine, pf2_scrolly);
359		state_save_register_global(machine, pf3_scrollx);
360		state_save_register_global(machine, pf3_scrolly);
361		state_save_register_global(machine, pf4_scrollx);
362		state_save_register_global(machine, pf4_scrolly);
363		state_save_register_global(machine, tiles_offsetx);
364		state_save_register_global(machine, tiles_offsety);
365		state_save_register_global(machine, pf_voffs);
366		state_save_register_global(machine, spriteram_offs);
	361	register_common(machine);
367	362
368	363	state_save_register_postload(machine, rallybik_flipscreen, NULL);
369	364	}
370	365
371	366	VIDEO_START( toaplan1 )
372	367	{
	368	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	369
373	370	toaplan1_create_tilemaps(machine);
374	371	toaplan1_paletteram_alloc(machine);
375	372	toaplan1_vram_alloc(machine);
376	373	toaplan1_spritevram_alloc(machine);
377	374
378		scrollx_offs1 = 0x1ef + 6;
379		scrollx_offs2 = 0x1ef + 4;
380		scrollx_offs3 = 0x1ef + 2;
381		scrollx_offs4 = 0x1ef + 0;
382		scrolly_offs  = 0x101;
	375	state->scrollx_offs1 = 0x1ef + 6;
	376	state->scrollx_offs2 = 0x1ef + 4;
	377	state->scrollx_offs3 = 0x1ef + 2;
	378	state->scrollx_offs4 = 0x1ef + 0;
	379	state->scrolly_offs  = 0x101;
383	380
384		bcu_flipscreen = -1;
385		fcu_flipscreen = 0;
386		toaplan1_reset = 1;
	381	state->bcu_flipscreen = -1;
	382	state->fcu_flipscreen = 0;
	383	state->reset = 1;
387	384
388		state_save_register_global_pointer(machine, machine->generic.paletteram.u16, (toaplan1_colorram1_size + toaplan1_colorram2_size)/2);
389		state_save_register_global_pointer(machine, pf1_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
390		state_save_register_global_pointer(machine, pf2_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
391		state_save_register_global_pointer(machine, pf3_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
392		state_save_register_global_pointer(machine, pf4_tilevram16, TOAPLAN1_TILEVRAM_SIZE/2);
393		state_save_register_global_pointer(machine, machine->generic.spriteram.u16, TOAPLAN1_SPRITERAM_SIZE/2);
394		state_save_register_global_pointer(machine, machine->generic.buffered_spriteram.u16, TOAPLAN1_SPRITERAM_SIZE/2);
395		state_save_register_global_pointer(machine, toaplan1_spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
396		state_save_register_global_pointer(machine, toaplan1_buffered_spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
	385	register_common(machine);
397	386
398		state_save_register_global(machine, scrollx_offs1);
399		state_save_register_global(machine, scrollx_offs2);
400		state_save_register_global(machine, scrollx_offs3);
401		state_save_register_global(machine, scrollx_offs4);
402		state_save_register_global(machine, scrolly_offs);
403		state_save_register_global(machine, bcu_flipscreen);
404		state_save_register_global(machine, fcu_flipscreen);
405		state_save_register_global(machine, pf1_scrollx);
406		state_save_register_global(machine, pf1_scrolly);
407		state_save_register_global(machine, pf2_scrolly);
408		state_save_register_global(machine, pf2_scrollx);
409		state_save_register_global(machine, pf3_scrollx);
410		state_save_register_global(machine, pf3_scrolly);
411		state_save_register_global(machine, pf4_scrollx);
412		state_save_register_global(machine, pf4_scrolly);
413		state_save_register_global(machine, tiles_offsetx);
414		state_save_register_global(machine, tiles_offsety);
415		state_save_register_global(machine, pf_voffs);
416		state_save_register_global(machine, spriteram_offs);
417
418	387	state_save_register_postload(machine, toaplan1_flipscreen, NULL);
419	388	}
420	389
r8962	r8963
432	401
433	402	WRITE16_HANDLER( toaplan1_tile_offsets_w )
434	403	{
	404	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	405
435	406	if ( offset == 0 )
436	407	{
437		COMBINE_DATA(&tiles_offsetx);
438		logerror("Tiles_offsetx now = %08x\n",tiles_offsetx);
	408	COMBINE_DATA(&state->tiles_offsetx);
	409	logerror("Tiles_offsetx now = %08x\n", state->tiles_offsetx);
439	410	}
440	411	else
441	412	{
442		COMBINE_DATA(&tiles_offsety);
443		logerror("Tiles_offsety now = %08x\n",tiles_offsety);
	413	COMBINE_DATA(&state->tiles_offsety);
	414	logerror("Tiles_offsety now = %08x\n", state->tiles_offsety);
444	415	}
445		toaplan1_reset = 1;
446		toaplan1_set_scrolls();
	416	state->reset = 1;
	417	toaplan1_set_scrolls(space->machine);
447	418	}
448	419
449	420	WRITE16_HANDLER( rallybik_bcu_flipscreen_w )
450	421	{
451		if (ACCESSING_BITS_0_7 && (data != bcu_flipscreen))
	422	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	423
	424	if (ACCESSING_BITS_0_7 && (data != state->bcu_flipscreen))
452	425	{
453	426	logerror("Setting BCU controller flipscreen port to %04x\n",data);
454		bcu_flipscreen = data & 0x01;      /* 0x0001 = flip, 0x0000 = no flip */
	427	state->bcu_flipscreen = data & 0x01;      /* 0x0001 = flip, 0x0000 = no flip */
455	428	tilemap_set_flip_all(space->machine, (data ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0));
456		if (bcu_flipscreen)
	429	if (state->bcu_flipscreen)
457	430	{
458		scrollx_offs1 = 0x1c0 - 6;
459		scrollx_offs2 = 0x1c0 - 4;
460		scrollx_offs3 = 0x1c0 - 2;
461		scrollx_offs4 = 0x1c0 - 0;
462		scrolly_offs  = 0x0e8;
	431	state->scrollx_offs1 = 0x1c0 - 6;
	432	state->scrollx_offs2 = 0x1c0 - 4;
	433	state->scrollx_offs3 = 0x1c0 - 2;
	434	state->scrollx_offs4 = 0x1c0 - 0;
	435	state->scrolly_offs  = 0x0e8;
463	436	}
464	437	else
465	438	{
466		scrollx_offs1 = 0x00d + 6;
467		scrollx_offs2 = 0x00d + 4;
468		scrollx_offs3 = 0x00d + 2;
469		scrollx_offs4 = 0x00d + 0;
470		scrolly_offs  = 0x111;
	439	state->scrollx_offs1 = 0x00d + 6;
	440	state->scrollx_offs2 = 0x00d + 4;
	441	state->scrollx_offs3 = 0x00d + 2;
	442	state->scrollx_offs4 = 0x00d + 0;
	443	state->scrolly_offs  = 0x111;
471	444	}
472		toaplan1_set_scrolls();
	445	toaplan1_set_scrolls(space->machine);
473	446	}
474	447	}
475	448
476	449	WRITE16_HANDLER( toaplan1_bcu_flipscreen_w )
477	450	{
478		if (ACCESSING_BITS_0_7 && (data != bcu_flipscreen))
	451	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	452
	453	if (ACCESSING_BITS_0_7 && (data != state->bcu_flipscreen))
479	454	{
480	455	logerror("Setting BCU controller flipscreen port to %04x\n",data);
481		bcu_flipscreen = data & 0x01;      /* 0x0001 = flip, 0x0000 = no flip */
	456	state->bcu_flipscreen = data & 0x01;      /* 0x0001 = flip, 0x0000 = no flip */
482	457	tilemap_set_flip_all(space->machine, (data ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0));
483		if (bcu_flipscreen)
	458	if (state->bcu_flipscreen)
484	459	{
485	460	const rectangle &visarea = space->machine->primary_screen->visible_area();
486	461
487		scrollx_offs1 = 0x151 - 6;
488		scrollx_offs2 = 0x151 - 4;
489		scrollx_offs3 = 0x151 - 2;
490		scrollx_offs4 = 0x151 - 0;
491		scrolly_offs  = 0x1ef;
492		scrolly_offs += ((visarea.max_y + 1) - ((visarea.max_y + 1) - visarea.min_y)) * 2;   /* Horizontal games are offset so adjust by +0x20 */
	462	state->scrollx_offs1 = 0x151 - 6;
	463	state->scrollx_offs2 = 0x151 - 4;
	464	state->scrollx_offs3 = 0x151 - 2;
	465	state->scrollx_offs4 = 0x151 - 0;
	466	state->scrolly_offs  = 0x1ef;
	467	state->scrolly_offs += ((visarea.max_y + 1) - ((visarea.max_y + 1) - visarea.min_y)) * 2;   /* Horizontal games are offset so adjust by +0x20 */
493	468	}
494	469	else
495	470	{
496		scrollx_offs1 = 0x1ef + 6;
497		scrollx_offs2 = 0x1ef + 4;
498		scrollx_offs3 = 0x1ef + 2;
499		scrollx_offs4 = 0x1ef + 0;
500		scrolly_offs  = 0x101;
	471	state->scrollx_offs1 = 0x1ef + 6;
	472	state->scrollx_offs2 = 0x1ef + 4;
	473	state->scrollx_offs3 = 0x1ef + 2;
	474	state->scrollx_offs4 = 0x1ef + 0;
	475	state->scrolly_offs  = 0x101;
501	476	}
502		toaplan1_set_scrolls();
	477	toaplan1_set_scrolls(space->machine);
503	478	}
504	479	}
505	480
r8962	r8963
507	482	{
508	483	if (ACCESSING_BITS_8_15)
509	484	{
	485	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	486
510	487	logerror("Setting FCU controller flipscreen port to %04x\n",data);
511		fcu_flipscreen = data & 0x8000;   /* 0x8000 = flip, 0x0000 = no flip */
	488	state->fcu_flipscreen = data & 0x8000;   /* 0x8000 = flip, 0x0000 = no flip */
512	489	}
513	490	}
514	491
515	492	READ16_HANDLER( toaplan1_spriteram_offs_r ) /// this aint really needed ?
516	493	{
517		return spriteram_offs;
	494	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	495
	496	return state->spriteram_offs;
518	497	}
519	498
520	499	WRITE16_HANDLER( toaplan1_spriteram_offs_w )
521	500	{
522		COMBINE_DATA(&spriteram_offs);
	501	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	502
	503	COMBINE_DATA(&state->spriteram_offs);
523	504	}
524	505
525	506
526	507	/* tile palette */
527	508	READ16_HANDLER( toaplan1_colorram1_r )
528	509	{
529		return toaplan1_colorram1[offset];
	510	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	511
	512	return state->colorram1[offset];
530	513	}
531	514
532	515	WRITE16_HANDLER( toaplan1_colorram1_w )
533	516	{
534		COMBINE_DATA(&toaplan1_colorram1[offset]);
535		paletteram16_xBBBBBGGGGGRRRRR_word_w(space,offset, data, mem_mask);
	517	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	518
	519	COMBINE_DATA(&state->colorram1[offset]);
	520	paletteram16_xBBBBBGGGGGRRRRR_word_w(space, offset, data, mem_mask);
536	521	}
537	522
538	523	/* sprite palette */
539	524	READ16_HANDLER( toaplan1_colorram2_r )
540	525	{
541		return toaplan1_colorram2[offset];
	526	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	527
	528	return state->colorram2[offset];
542	529	}
543	530
544	531	WRITE16_HANDLER( toaplan1_colorram2_w )
545	532	{
546		COMBINE_DATA(&toaplan1_colorram2[offset]);
547		paletteram16_xBBBBBGGGGGRRRRR_word_w(space,offset+(toaplan1_colorram1_size/2), data, mem_mask);
	533	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	534
	535	COMBINE_DATA(&state->colorram2[offset]);
	536	paletteram16_xBBBBBGGGGGRRRRR_word_w(space, offset+(state->colorram1_size/2), data, mem_mask);
548	537	}
549	538
550	539	READ16_HANDLER( toaplan1_spriteram16_r )
551	540	{
552		return space->machine->generic.spriteram.u16[spriteram_offs & ((TOAPLAN1_SPRITERAM_SIZE/2)-1)];
	541	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	542
	543	return state->spriteram[state->spriteram_offs & ((TOAPLAN1_SPRITERAM_SIZE/2)-1)];
553	544	}
554	545
555	546	WRITE16_HANDLER( toaplan1_spriteram16_w )
556	547	{
557		COMBINE_DATA(&space->machine->generic.spriteram.u16[spriteram_offs & ((TOAPLAN1_SPRITERAM_SIZE/2)-1)]);
	548	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
558	549
	550	COMBINE_DATA(&state->spriteram[state->spriteram_offs & ((TOAPLAN1_SPRITERAM_SIZE/2)-1)]);
	551
559	552	#ifdef MAME_DEBUG
560		if (spriteram_offs >= (TOAPLAN1_SPRITERAM_SIZE/2))
	553	if (state->spriteram_offs >= (TOAPLAN1_SPRITERAM_SIZE/2))
561	554	{
562		logerror("Sprite_RAM_word_w, %08x out of range !\n", spriteram_offs);
	555	logerror("Sprite_RAM_word_w, %08x out of range !\n", state->spriteram_offs);
563	556	return;
564	557	}
565	558	#endif
566	559
567		spriteram_offs++;
	560	state->spriteram_offs++;
568	561	}
569	562
570	563	READ16_HANDLER( toaplan1_spritesizeram16_r )
571	564	{
572		return toaplan1_spritesizeram16[spriteram_offs & ((TOAPLAN1_SPRITESIZERAM_SIZE/2)-1)];
	565	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	566
	567	return state->spritesizeram16[state->spriteram_offs & ((TOAPLAN1_SPRITESIZERAM_SIZE/2)-1)];
573	568	}
574	569
575	570	WRITE16_HANDLER( toaplan1_spritesizeram16_w )
576	571	{
577		COMBINE_DATA(&toaplan1_spritesizeram16[spriteram_offs & ((TOAPLAN1_SPRITESIZERAM_SIZE/2)-1)]);
	572	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
578	573
	574	COMBINE_DATA(&state->spritesizeram16[state->spriteram_offs & ((TOAPLAN1_SPRITESIZERAM_SIZE/2)-1)]);
	575
579	576	#ifdef MAME_DEBUG
580		if (spriteram_offs >= (TOAPLAN1_SPRITESIZERAM_SIZE/2))
	577	if (state->spriteram_offs >= (TOAPLAN1_SPRITESIZERAM_SIZE/2))
581	578	{
582		logerror("Sprite_Size_RAM_word_w, %08x out of range !\n", spriteram_offs);
	579	logerror("Sprite_Size_RAM_word_w, %08x out of range !\n", state->spriteram_offs);
583	580	return;
584	581	}
585	582	#endif
586	583
587		spriteram_offs++;   /// really ? shouldn't happen on the sizeram
	584	state->spriteram_offs++;   /// really ? shouldn't happen on the sizeram
588	585	}
589	586
590	587
591	588
592	589	WRITE16_HANDLER( toaplan1_bcu_control_w )
593	590	{
	591	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	592
594	593	logerror("BCU tile controller register:%02x now = %04x\n",offset,data);
595	594
596	595	/*** Hack for Zero Wing and OutZone, to reset the sound system on */
597	596	/*** soft resets. These two games don't have a sound reset port,  */
598	597	/*** unlike the other games */
599	598
600		if (toaplan1_unk_reset_port && toaplan1_reset)
	599	if (state->unk_reset_port && state->reset)
601	600	{
602		toaplan1_reset = 0;
	601	state->reset = 0;
603	602	toaplan1_reset_sound(space,0,0,0);
604	603	}
605	604	}
606	605
607	606	READ16_HANDLER( toaplan1_tileram_offs_r )
608	607	{
609		return pf_voffs;
	608	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	609
	610	return state->pf_voffs;
610	611	}
611	612
612	613	WRITE16_HANDLER( toaplan1_tileram_offs_w )
613	614	{
	615	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	616
614	617	if (data >= 0x4000)
615	618	logerror("Hmmm, unknown video layer being selected (%08x)\n",data);
616		COMBINE_DATA(&pf_voffs);
	619	COMBINE_DATA(&state->pf_voffs);
617	620	}
618	621
619	622
620	623	READ16_HANDLER( toaplan1_tileram16_r )
621	624	{
	625	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
622	626	offs_t vram_offset;
623	627	UINT16 video_data = 0;
624	628
625		switch (pf_voffs & 0xf000)   /* Locate Layer (PlayField) */
	629	switch (state->pf_voffs & 0xf000)   /* Locate Layer (PlayField) */
626	630	{
627	631	case 0x0000:
628		vram_offset = ((pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
629		video_data = pf1_tilevram16[vram_offset];
	632	vram_offset = ((state->pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
	633	video_data = state->pf1_tilevram16[vram_offset];
630	634	break;
631	635	case 0x1000:
632		vram_offset = ((pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
633		video_data = pf2_tilevram16[vram_offset];
	636	vram_offset = ((state->pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
	637	video_data = state->pf2_tilevram16[vram_offset];
634	638	break;
635	639	case 0x2000:
636		vram_offset = ((pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
637		video_data = pf3_tilevram16[vram_offset];
	640	vram_offset = ((state->pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
	641	video_data = state->pf3_tilevram16[vram_offset];
638	642	break;
639	643	case 0x3000:
640		vram_offset = ((pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
641		video_data = pf4_tilevram16[vram_offset];
	644	vram_offset = ((state->pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
	645	video_data = state->pf4_tilevram16[vram_offset];
642	646	break;
643	647	default:
644		logerror("Hmmm, reading %04x from unknown playfield layer address %06x  Offset:%01x !!!\n",video_data,pf_voffs,offset);
	648	logerror("Hmmm, reading %04x from unknown playfield layer address %06x  Offset:%01x !!!\n", video_data, state->pf_voffs, offset);
645	649	break;
646	650	}
647	651
r8962	r8963
662	666
663	667	WRITE16_HANDLER( toaplan1_tileram16_w )
664	668	{
	669	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
665	670	offs_t vram_offset;
666	671
667		switch (pf_voffs & 0xf000)   /* Locate Layer (PlayField) */
	672	switch (state->pf_voffs & 0xf000)   /* Locate Layer (PlayField) */
668	673	{
669	674	case 0x0000:
670		vram_offset = ((pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
671		COMBINE_DATA(&pf1_tilevram16[vram_offset]);
672		tilemap_mark_tile_dirty(pf1_tilemap,vram_offset/2);
	675	vram_offset = ((state->pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
	676	COMBINE_DATA(&state->pf1_tilevram16[vram_offset]);
	677	tilemap_mark_tile_dirty(state->pf1_tilemap, vram_offset/2);
673	678	break;
674	679	case 0x1000:
675		vram_offset = ((pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
676		COMBINE_DATA(&pf2_tilevram16[vram_offset]);
677		tilemap_mark_tile_dirty(pf2_tilemap,vram_offset/2);
	680	vram_offset = ((state->pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
	681	COMBINE_DATA(&state->pf2_tilevram16[vram_offset]);
	682	tilemap_mark_tile_dirty(state->pf2_tilemap, vram_offset/2);
678	683	break;
679	684	case 0x2000:
680		vram_offset = ((pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
681		COMBINE_DATA(&pf3_tilevram16[vram_offset]);
682		tilemap_mark_tile_dirty(pf3_tilemap,vram_offset/2);
	685	vram_offset = ((state->pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
	686	COMBINE_DATA(&state->pf3_tilevram16[vram_offset]);
	687	tilemap_mark_tile_dirty(state->pf3_tilemap, vram_offset/2);
683	688	break;
684	689	case 0x3000:
685		vram_offset = ((pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
686		COMBINE_DATA(&pf4_tilevram16[vram_offset]);
687		tilemap_mark_tile_dirty(pf4_tilemap,vram_offset/2);
	690	vram_offset = ((state->pf_voffs * 2) + offset) & ((TOAPLAN1_TILEVRAM_SIZE/2)-1);
	691	COMBINE_DATA(&state->pf4_tilevram16[vram_offset]);
	692	tilemap_mark_tile_dirty(state->pf4_tilemap, vram_offset/2);
688	693	break;
689	694	default:
690		logerror("Hmmm, writing %04x to unknown playfield layer address %06x  Offset:%01x\n",data,pf_voffs,offset);
	695	logerror("Hmmm, writing %04x to unknown playfield layer address %06x  Offset:%01x\n", data, state->pf_voffs, offset);
691	696	break;
692	697	}
693	698	}
r8962	r8963
696	701
697	702	READ16_HANDLER( toaplan1_scroll_regs_r )
698	703	{
	704	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
699	705	UINT16 scroll = 0;
700	706
701	707	switch(offset)
702	708	{
703		case 00: scroll = pf1_scrollx; break;
704		case 01: scroll = pf1_scrolly; break;
705		case 02: scroll = pf2_scrollx; break;
706		case 03: scroll = pf2_scrolly; break;
707		case 04: scroll = pf3_scrollx; break;
708		case 05: scroll = pf3_scrolly; break;
709		case 06: scroll = pf4_scrollx; break;
710		case 07: scroll = pf4_scrolly; break;
	709	case 00: scroll = state->pf1_scrollx; break;
	710	case 01: scroll = state->pf1_scrolly; break;
	711	case 02: scroll = state->pf2_scrollx; break;
	712	case 03: scroll = state->pf2_scrolly; break;
	713	case 04: scroll = state->pf3_scrollx; break;
	714	case 05: scroll = state->pf3_scrolly; break;
	715	case 06: scroll = state->pf4_scrollx; break;
	716	case 07: scroll = state->pf4_scrolly; break;
711	717	default: logerror("Hmmm, reading unknown video scroll register (%08x) !!!\n",offset);
712	718	break;
713	719	}
r8962	r8963
717	723
718	724	WRITE16_HANDLER( toaplan1_scroll_regs_w )
719	725	{
	726	toaplan1_state *state = space->machine->driver_data<toaplan1_state>();
	727
720	728	switch(offset)
721	729	{
722		case 00: COMBINE_DATA(&pf1_scrollx);      /* 1D3h */
723		tilemap_set_scrollx(pf1_tilemap,0,(pf1_scrollx >> 7) - (tiles_offsetx - scrollx_offs1));
	730	case 00: COMBINE_DATA(&state->pf1_scrollx);      /* 1D3h */
	731	tilemap_set_scrollx(state->pf1_tilemap, 0, (state->pf1_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs1));
724	732	break;
725		case 01: COMBINE_DATA(&pf1_scrolly);      /* 1EBh */
726		tilemap_set_scrolly(pf1_tilemap,0,(pf1_scrolly >> 7) - (tiles_offsety - scrolly_offs));
	733	case 01: COMBINE_DATA(&state->pf1_scrolly);      /* 1EBh */
	734	tilemap_set_scrolly(state->pf1_tilemap, 0, (state->pf1_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
727	735	break;
728		case 02: COMBINE_DATA(&pf2_scrollx);      /* 1D5h */
729		tilemap_set_scrollx(pf2_tilemap,0,(pf2_scrollx >> 7) - (tiles_offsetx - scrollx_offs2));
	736	case 02: COMBINE_DATA(&state->pf2_scrollx);      /* 1D5h */
	737	tilemap_set_scrollx(state->pf2_tilemap, 0, (state->pf2_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs2));
730	738	break;
731		case 03: COMBINE_DATA(&pf2_scrolly);      /* 1EBh */
732		tilemap_set_scrolly(pf2_tilemap,0,(pf2_scrolly >> 7) - (tiles_offsety - scrolly_offs));
	739	case 03: COMBINE_DATA(&state->pf2_scrolly);      /* 1EBh */
	740	tilemap_set_scrolly(state->pf2_tilemap, 0, (state->pf2_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
733	741	break;
734		case 04: COMBINE_DATA(&pf3_scrollx);      /* 1D7h */
735		tilemap_set_scrollx(pf3_tilemap,0,(pf3_scrollx >> 7) - (tiles_offsetx - scrollx_offs3));
	742	case 04: COMBINE_DATA(&state->pf3_scrollx);      /* 1D7h */
	743	tilemap_set_scrollx(state->pf3_tilemap, 0, (state->pf3_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs3));
736	744	break;
737		case 05: COMBINE_DATA(&pf3_scrolly);      /* 1EBh */
738		tilemap_set_scrolly(pf3_tilemap,0,(pf3_scrolly >> 7) - (tiles_offsety - scrolly_offs));
	745	case 05: COMBINE_DATA(&state->pf3_scrolly);      /* 1EBh */
	746	tilemap_set_scrolly(state->pf3_tilemap, 0, (state->pf3_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
739	747	break;
740		case 06: COMBINE_DATA(&pf4_scrollx);      /* 1D9h */
741		tilemap_set_scrollx(pf4_tilemap,0,(pf4_scrollx >> 7) - (tiles_offsetx - scrollx_offs4));
	748	case 06: COMBINE_DATA(&state->pf4_scrollx);      /* 1D9h */
	749	tilemap_set_scrollx(state->pf4_tilemap, 0, (state->pf4_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs4));
742	750	break;
743		case 07: COMBINE_DATA(&pf4_scrolly);      /* 1EBh */
744		tilemap_set_scrolly(pf4_tilemap,0,(pf4_scrolly >> 7) - (tiles_offsety - scrolly_offs));
	751	case 07: COMBINE_DATA(&state->pf4_scrolly);      /* 1EBh */
	752	tilemap_set_scrolly(state->pf4_tilemap, 0, (state->pf4_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
745	753	break;
746	754	default: logerror("Hmmm, writing %08x to unknown video scroll register (%08x) !!!\n",data ,offset);
747	755	break;
r8962	r8963
754	762	static void toaplan1_log_vram(running_machine *machine)
755	763	{
756	764	#ifdef MAME_DEBUG
	765	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	766
757	767	if ( input_code_pressed(machine, KEYCODE_M) )
758	768	{
759		UINT16 *spriteram16 = machine->generic.spriteram.u16;
760		UINT16 *buffered_spriteram16 = machine->generic.buffered_spriteram.u16;
	769	UINT16 *spriteram16 = state->spriteram;
	770	UINT16 *buffered_spriteram16 = state->buffered_spriteram;
761	771	offs_t sprite_voffs;
762	772	while (input_code_pressed(machine, KEYCODE_M)) ;
763		if (toaplan1_spritesizeram16)         /* FCU controller */
	773	if (state->spritesizeram16)         /* FCU controller */
764	774	{
765	775	int schar,sattr,sxpos,sypos,bschar,bsattr,bsxpos,bsypos;
766		UINT16 *size  = (UINT16 *)(toaplan1_spritesizeram16);
767		UINT16 *bsize = (UINT16 *)(toaplan1_buffered_spritesizeram16);
	776	UINT16 *size  = (UINT16 *)(state->spritesizeram16);
	777	UINT16 *bsize = (UINT16 *)(state->buffered_spritesizeram16);
768	778	logerror("Scrolls    PF1-X  PF1-Y     PF2-X  PF2-Y     PF3-X  PF3-Y     PF4-X  PF4-Y\n");
769		logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",pf1_scrollx,pf1_scrolly,pf2_scrollx,pf2_scrolly,pf3_scrollx,pf3_scrolly,pf4_scrollx,pf4_scrolly);
770		for ( sprite_voffs = 0; sprite_voffs < (machine->generic.spriteram_size/2); sprite_voffs += 4 )
	779	logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",
	780	state->pf1_scrollx, state->pf1_scrolly, state->pf2_scrollx, state->pf2_scrolly, state->pf3_scrollx, state->pf3_scrolly, state->pf4_scrollx, state->pf4_scrolly);
	781	for ( sprite_voffs = 0; sprite_voffs < state->spriteram_size/2; sprite_voffs += 4 )
771	782	{
772	783	bschar = buffered_spriteram16[sprite_voffs];
773	784	bsattr = buffered_spriteram16[sprite_voffs + 1];
r8962	r8963
786	797	{
787	798	int schar,sattr,sxpos,sypos,bschar,bsattr,bsxpos,bsypos;
788	799	logerror("Scrolls    PF1-X  PF1-Y     PF2-X  PF2-Y     PF3-X  PF3-Y     PF4-X  PF4-Y\n");
789		logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",pf1_scrollx,pf1_scrolly,pf2_scrollx,pf2_scrolly,pf3_scrollx,pf3_scrolly,pf4_scrollx,pf4_scrolly);
790		for ( sprite_voffs = 0; sprite_voffs < (machine->generic.spriteram_size/2); sprite_voffs += 4 )
	800	logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",
	801	state->pf1_scrollx, state->pf1_scrolly, state->pf2_scrollx, state->pf2_scrolly, state->pf3_scrollx, state->pf3_scrolly, state->pf4_scrollx, state->pf4_scrolly);
	802	for ( sprite_voffs = 0; sprite_voffs < state->spriteram_size/2; sprite_voffs += 4 )
791	803	{
792	804	bschar = buffered_spriteram16[sprite_voffs];
793	805	bsattr = buffered_spriteram16[sprite_voffs + 1];
r8962	r8963
806	818
807	819	if ( input_code_pressed(machine, KEYCODE_SLASH) )
808	820	{
809		UINT16 *size  = (UINT16 *)(toaplan1_spritesizeram16);
810		UINT16 *bsize = (UINT16 *)(toaplan1_buffered_spritesizeram16);
	821	UINT16 *size  = (UINT16 *)(state->spritesizeram16);
	822	UINT16 *bsize = (UINT16 *)(state->buffered_spritesizeram16);
811	823	offs_t offs;
812	824	while (input_code_pressed(machine, KEYCODE_SLASH)) ;
813		if (toaplan1_spritesizeram16)         /* FCU controller */
	825	if (state->spritesizeram16)         /* FCU controller */
814	826	{
815	827	logerror("Scrolls    PF1-X  PF1-Y     PF2-X  PF2-Y     PF3-X  PF3-Y     PF4-X  PF4-Y\n");
816		logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",pf1_scrollx,pf1_scrolly,pf2_scrollx,pf2_scrolly,pf3_scrollx,pf3_scrolly,pf4_scrollx,pf4_scrolly);
	828	logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",
	829	state->pf1_scrollx, state->pf1_scrolly, state->pf2_scrollx, state->pf2_scrolly, state->pf3_scrollx, state->pf3_scrolly, state->pf4_scrollx, state->pf4_scrolly);
817	830	for ( offs = 0; offs < (TOAPLAN1_SPRITESIZERAM_SIZE/2); offs +=4 )
818	831	{
819	832	logerror("SizeOffs:%04x   now:%04x %04x %04x %04x    next: %04x %04x %04x %04x\n", offs,
r8962	r8963
831	844	int tchar[5], tattr[5];
832	845	while (input_code_pressed(machine, KEYCODE_N)) ;   /* BCU controller */
833	846	logerror("Scrolls    PF1-X  PF1-Y     PF2-X  PF2-Y     PF3-X  PF3-Y     PF4-X  PF4-Y\n");
834		logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",pf1_scrollx,pf1_scrolly,pf2_scrollx,pf2_scrolly,pf3_scrollx,pf3_scrolly,pf4_scrollx,pf4_scrolly);
	847	logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",
	848	state->pf1_scrollx, state->pf1_scrolly, state->pf2_scrollx, state->pf2_scrolly, state->pf3_scrollx, state->pf3_scrolly, state->pf4_scrollx, state->pf4_scrolly);
835	849	for ( tile_voffs = 0; tile_voffs < (TOAPLAN1_TILEVRAM_SIZE/2); tile_voffs += 2 )
836	850	{
837		tchar[1] = pf1_tilevram16[tile_voffs + 1];
838		tattr[1] = pf1_tilevram16[tile_voffs];
839		tchar[2] = pf2_tilevram16[tile_voffs + 1];
840		tattr[2] = pf2_tilevram16[tile_voffs];
841		tchar[3] = pf3_tilevram16[tile_voffs + 1];
842		tattr[3] = pf3_tilevram16[tile_voffs];
843		tchar[4] = pf4_tilevram16[tile_voffs + 1];
844		tattr[4] = pf4_tilevram16[tile_voffs];
	851	tchar[1] = state->pf1_tilevram16[tile_voffs + 1];
	852	tattr[1] = state->pf1_tilevram16[tile_voffs];
	853	tchar[2] = state->pf2_tilevram16[tile_voffs + 1];
	854	tattr[2] = state->pf2_tilevram16[tile_voffs];
	855	tchar[3] = state->pf3_tilevram16[tile_voffs + 1];
	856	tattr[3] = state->pf3_tilevram16[tile_voffs];
	857	tchar[4] = state->pf4_tilevram16[tile_voffs + 1];
	858	tattr[4] = state->pf4_tilevram16[tile_voffs];
845	859	//          logerror("PF3 offs:%04x   Tile:%04x  Attr:%04x\n", tile_voffs, tchar, tattr);
846	860	logerror("$(%04x)  Attr-Tile PF1:%04x-%04x  PF2:%04x-%04x  PF3:%04x-%04x  PF4:%04x-%04x\n", tile_voffs,
847	861	tattr[1], tchar[1],  tattr[2], tchar[2],
r8962	r8963
857	871	if ( input_code_pressed(machine, KEYCODE_E) )
858	872	{
859	873	while (input_code_pressed(machine, KEYCODE_E)) ;
860		displog += 1;
861		displog &= 1;
	874	state->displog += 1;
	875	state->displog &= 1;
862	876	}
863		if (displog)
	877	if (state->displog)
864	878	{
865	879	logerror("Scrolls    PF1-X  PF1-Y     PF2-X  PF2-Y     PF3-X  PF3-Y     PF4-X  PF4-Y\n");
866		logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",pf1_scrollx,pf1_scrolly,pf2_scrollx,pf2_scrolly,pf3_scrollx,pf3_scrolly,pf4_scrollx,pf4_scrolly);
	880	logerror("------>    #%04x  #%04x     #%04x  #%04x     #%04x  #%04x     #%04x  #%04x\n",
	881	state->pf1_scrollx, state->pf1_scrolly, state->pf2_scrollx, state->pf2_scrolly, state->pf3_scrollx, state->pf3_scrolly, state->pf4_scrollx, state->pf4_scrolly);
867	882	}
868	883	if ( input_code_pressed(machine, KEYCODE_B) )
869	884	{
870	885	//      while (input_code_pressed(machine, KEYCODE_B)) ;
871		scrollx_offs1 += 0x1; scrollx_offs2 += 0x1; scrollx_offs3 += 0x1; scrollx_offs4 += 0x1;
872		logerror("Scrollx_offs now = %08x\n",scrollx_offs4);
873		tilemap_set_scrollx(pf1_tilemap,0,(pf1_scrollx >> 7) - (tiles_offsetx - scrollx_offs1));
874		tilemap_set_scrollx(pf2_tilemap,0,(pf2_scrollx >> 7) - (tiles_offsetx - scrollx_offs2));
875		tilemap_set_scrollx(pf3_tilemap,0,(pf3_scrollx >> 7) - (tiles_offsetx - scrollx_offs3));
876		tilemap_set_scrollx(pf4_tilemap,0,(pf4_scrollx >> 7) - (tiles_offsetx - scrollx_offs4));
	886	state->scrollx_offs1 += 0x1; state->scrollx_offs2 += 0x1; state->scrollx_offs3 += 0x1; state->scrollx_offs4 += 0x1;
	887	logerror("Scrollx_offs now = %08x\n", state->scrollx_offs4);
	888	tilemap_set_scrollx(state->pf1_tilemap, 0, (state->pf1_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs1));
	889	tilemap_set_scrollx(state->pf2_tilemap, 0, (state->pf2_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs2));
	890	tilemap_set_scrollx(state->pf3_tilemap, 0, (state->pf3_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs3));
	891	tilemap_set_scrollx(state->pf4_tilemap, 0, (state->pf4_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs4));
877	892	}
878	893	if ( input_code_pressed(machine, KEYCODE_V) )
879	894	{
880	895	//      while (input_code_pressed(machine, KEYCODE_V)) ;
881		scrollx_offs1 -= 0x1; scrollx_offs2 -= 0x1; scrollx_offs3 -= 0x1; scrollx_offs4 -= 0x1;
882		logerror("Scrollx_offs now = %08x\n",scrollx_offs4);
883		tilemap_set_scrollx(pf1_tilemap,0,(pf1_scrollx >> 7) - (tiles_offsetx - scrollx_offs1));
884		tilemap_set_scrollx(pf2_tilemap,0,(pf2_scrollx >> 7) - (tiles_offsetx - scrollx_offs2));
885		tilemap_set_scrollx(pf3_tilemap,0,(pf3_scrollx >> 7) - (tiles_offsetx - scrollx_offs3));
886		tilemap_set_scrollx(pf4_tilemap,0,(pf4_scrollx >> 7) - (tiles_offsetx - scrollx_offs4));
	896	state->scrollx_offs1 -= 0x1; state->scrollx_offs2 -= 0x1; state->scrollx_offs3 -= 0x1; state->scrollx_offs4 -= 0x1;
	897	logerror("Scrollx_offs now = %08x\n", state->scrollx_offs4);
	898	tilemap_set_scrollx(state->pf1_tilemap, 0, (state->pf1_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs1));
	899	tilemap_set_scrollx(state->pf2_tilemap, 0, (state->pf2_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs2));
	900	tilemap_set_scrollx(state->pf3_tilemap, 0, (state->pf3_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs3));
	901	tilemap_set_scrollx(state->pf4_tilemap, 0, (state->pf4_scrollx >> 7) - (state->tiles_offsetx - state->scrollx_offs4));
887	902	}
888	903	if ( input_code_pressed(machine, KEYCODE_C) )
889	904	{
890	905	//      while (input_code_pressed(machine, KEYCODE_C)) ;
891		scrolly_offs += 0x1;
892		logerror("Scrolly_offs now = %08x\n",scrolly_offs);
893		tilemap_set_scrolly(pf1_tilemap,0,(pf1_scrolly >> 7) - (tiles_offsety - scrolly_offs));
894		tilemap_set_scrolly(pf2_tilemap,0,(pf2_scrolly >> 7) - (tiles_offsety - scrolly_offs));
895		tilemap_set_scrolly(pf3_tilemap,0,(pf3_scrolly >> 7) - (tiles_offsety - scrolly_offs));
896		tilemap_set_scrolly(pf4_tilemap,0,(pf4_scrolly >> 7) - (tiles_offsety - scrolly_offs));
	906	state->scrolly_offs += 0x1;
	907	logerror("Scrolly_offs now = %08x\n", state->scrolly_offs);
	908	tilemap_set_scrolly(state->pf1_tilemap, 0, (state->pf1_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	909	tilemap_set_scrolly(state->pf2_tilemap, 0, (state->pf2_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	910	tilemap_set_scrolly(state->pf3_tilemap, 0, (state->pf3_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	911	tilemap_set_scrolly(state->pf4_tilemap, 0, (state->pf4_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
897	912	}
898	913	if ( input_code_pressed(machine, KEYCODE_X) )
899	914	{
900	915	//      while (input_code_pressed(machine, KEYCODE_X)) ;
901		scrolly_offs -= 0x1;
902		logerror("Scrolly_offs now = %08x\n",scrolly_offs);
903		tilemap_set_scrolly(pf1_tilemap,0,(pf1_scrolly >> 7) - (tiles_offsety - scrolly_offs));
904		tilemap_set_scrolly(pf2_tilemap,0,(pf2_scrolly >> 7) - (tiles_offsety - scrolly_offs));
905		tilemap_set_scrolly(pf3_tilemap,0,(pf3_scrolly >> 7) - (tiles_offsety - scrolly_offs));
906		tilemap_set_scrolly(pf4_tilemap,0,(pf4_scrolly >> 7) - (tiles_offsety - scrolly_offs));
	916	state->scrolly_offs -= 0x1;
	917	logerror("Scrolly_offs now = %08x\n", state->scrolly_offs);
	918	tilemap_set_scrolly(state->pf1_tilemap, 0, (state->pf1_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	919	tilemap_set_scrolly(state->pf2_tilemap, 0, (state->pf2_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	920	tilemap_set_scrolly(state->pf3_tilemap, 0, (state->pf3_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
	921	tilemap_set_scrolly(state->pf4_tilemap, 0, (state->pf4_scrolly >> 7) - (state->tiles_offsety - state->scrolly_offs));
907	922	}
908	923
909	924	if ( input_code_pressed(machine, KEYCODE_L) )      /* Turn Playfield 4 on/off */
910	925	{
911	926	while (input_code_pressed(machine, KEYCODE_L)) ;
912		display_pf4 += 1;
913		display_pf4 &= 1;
914		tilemap_set_enable(pf4_tilemap, display_pf4);
	927	state->display_pf4 += 1;
	928	state->display_pf4 &= 1;
	929	tilemap_set_enable(state->pf4_tilemap, state->display_pf4);
915	930	}
916	931	if ( input_code_pressed(machine, KEYCODE_K) )      /* Turn Playfield 3 on/off */
917	932	{
918	933	while (input_code_pressed(machine, KEYCODE_K)) ;
919		display_pf3 += 1;
920		display_pf3 &= 1;
921		tilemap_set_enable(pf3_tilemap, display_pf3);
	934	state->display_pf3 += 1;
	935	state->display_pf3 &= 1;
	936	tilemap_set_enable(state->pf3_tilemap, state->display_pf3);
922	937	}
923	938	if ( input_code_pressed(machine, KEYCODE_J) )      /* Turn Playfield 2 on/off */
924	939	{
925	940	while (input_code_pressed(machine, KEYCODE_J)) ;
926		display_pf2 += 1;
927		display_pf2 &= 1;
928		tilemap_set_enable(pf2_tilemap, display_pf2);
	941	state->display_pf2 += 1;
	942	state->display_pf2 &= 1;
	943	tilemap_set_enable(state->pf2_tilemap, state->display_pf2);
929	944	}
930	945	if ( input_code_pressed(machine, KEYCODE_H) )      /* Turn Playfield 1 on/off */
931	946	{
932	947	while (input_code_pressed(machine, KEYCODE_H)) ;
933		display_pf1 += 1;
934		display_pf1 &= 1;
935		tilemap_set_enable(pf1_tilemap, display_pf1);
	948	state->display_pf1 += 1;
	949	state->display_pf1 &= 1;
	950	tilemap_set_enable(state->pf1_tilemap, state->display_pf1);
936	951	}
937	952	#endif
938	953	}
r8962	r8963
1045	1060
1046	1061	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
1047	1062	{
1048		UINT16 *source = (UINT16 *)(machine->generic.buffered_spriteram.u16);
1049		UINT16 *size   = (UINT16 *)(toaplan1_buffered_spritesizeram16);
1050
	1063	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	1064	UINT16 *source = (UINT16 *)state->buffered_spriteram;
	1065	UINT16 *size   = (UINT16 *)state->buffered_spritesizeram16;
	1066	int fcu_flipscreen = state->fcu_flipscreen;
1051	1067	int offs;
1052	1068
1053		for (offs = machine->generic.spriteram_size/2 - 4; offs >= 0; offs -= 4)
	1069	for (offs = state->spriteram_size/2 - 4; offs >= 0; offs -= 4)
1054	1070	{
1055	1071	if (!(source[offs] & 0x8000))
1056	1072	{
r8962	r8963
1112	1128
1113	1129	static void rallybik_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int priority )
1114	1130	{
1115		UINT16 *buffered_spriteram16 = machine->generic.buffered_spriteram.u16;
	1131	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	1132	UINT16 *buffered_spriteram16 = state->buffered_spriteram;
1116	1133	int offs;
1117	1134
1118		for (offs = 0; offs < (machine->generic.spriteram_size/2); offs += 4)
	1135	for (offs = 0; offs < state->spriteram_size/2; offs += 4)
1119	1136	{
1120	1137	int attrib, sx, sy, flipx, flipy;
1121	1138	int sprite, color;
r8962	r8963
1149	1166
1150	1167	VIDEO_UPDATE( rallybik )
1151	1168	{
	1169	toaplan1_state *state = screen->machine->driver_data<toaplan1_state>();
1152	1170	int priority;
1153	1171
1154	1172	toaplan1_log_vram(screen->machine);
1155	1173
1156		bitmap_fill(bitmap,cliprect,0);
	1174	bitmap_fill(bitmap,cliprect,0x120);
1157	1175
1158		tilemap_draw(bitmap,cliprect,pf1_tilemap,TILEMAP_DRAW_OPAQUE | 0,0);
1159		tilemap_draw(bitmap,cliprect,pf1_tilemap,TILEMAP_DRAW_OPAQUE | 1,0);
	1176	tilemap_draw(bitmap, cliprect, state->pf1_tilemap, TILEMAP_DRAW_OPAQUE | 0, 0);
	1177	tilemap_draw(bitmap, cliprect, state->pf1_tilemap, TILEMAP_DRAW_OPAQUE | 1, 0);
1160	1178
1161	1179	for (priority = 1; priority < 16; priority++)
1162	1180	{
1163		tilemap_draw(bitmap,cliprect,pf4_tilemap,priority,0);
1164		tilemap_draw(bitmap,cliprect,pf3_tilemap,priority,0);
1165		tilemap_draw(bitmap,cliprect,pf2_tilemap,priority,0);
1166		tilemap_draw(bitmap,cliprect,pf1_tilemap,priority,0);
	1181	tilemap_draw(bitmap, cliprect, state->pf4_tilemap, priority, 0);
	1182	tilemap_draw(bitmap, cliprect, state->pf3_tilemap, priority, 0);
	1183	tilemap_draw(bitmap, cliprect, state->pf2_tilemap, priority, 0);
	1184	tilemap_draw(bitmap, cliprect, state->pf1_tilemap, priority, 0);
1167	1185	rallybik_draw_sprites(screen->machine, bitmap,cliprect,priority << 8);
1168	1186	}
	1187
1169	1188	return 0;
1170	1189	}
1171	1190
1172	1191	VIDEO_UPDATE( toaplan1 )
1173	1192	{
	1193	toaplan1_state *state = screen->machine->driver_data<toaplan1_state>();
1174	1194	int priority;
1175	1195
1176	1196	toaplan1_log_vram(screen->machine);
r8962	r8963
1178	1198	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
1179	1199	bitmap_fill(bitmap,cliprect,0x120);
1180	1200
1181		tilemap_draw(bitmap,cliprect,pf4_tilemap,TILEMAP_DRAW_OPAQUE,0);
1182		for (priority = 8; priority < 16; priority++)
1183		tilemap_draw(bitmap,cliprect,pf1_tilemap,TILEMAP_DRAW_OPAQUE | priority,0);
	1201	// it's really correct?
	1202	tilemap_draw(bitmap, cliprect, state->pf1_tilemap, TILEMAP_DRAW_OPAQUE | 0, 0);
	1203	tilemap_draw(bitmap, cliprect, state->pf1_tilemap, TILEMAP_DRAW_OPAQUE | 1, 0);
1184	1204
1185	1205	for (priority = 1; priority < 16; priority++)
1186	1206	{
1187		tilemap_draw_primask(bitmap,cliprect,pf4_tilemap,priority,priority,0);
1188		tilemap_draw_primask(bitmap,cliprect,pf3_tilemap,priority,priority,0);
1189		tilemap_draw_primask(bitmap,cliprect,pf2_tilemap,priority,priority,0);
1190		tilemap_draw_primask(bitmap,cliprect,pf1_tilemap,priority,priority,0);
	1207	tilemap_draw_primask(bitmap, cliprect, state->pf4_tilemap, priority, priority, 0);
	1208	tilemap_draw_primask(bitmap, cliprect, state->pf3_tilemap, priority, priority, 0);
	1209	tilemap_draw_primask(bitmap, cliprect, state->pf2_tilemap, priority, priority, 0);
	1210	tilemap_draw_primask(bitmap, cliprect, state->pf1_tilemap, priority, priority, 0);
1191	1211	}
1192	1212
1193		draw_sprites(screen->machine, bitmap,cliprect);
	1213	draw_sprites(screen->machine, bitmap, cliprect);
1194	1214	return 0;
1195	1215	}
1196	1216
1197		VIDEO_UPDATE( demonwld )
1198		{
1199		int priority;
1200
1201		toaplan1_log_vram(screen->machine);
1202
1203		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
1204		bitmap_fill(bitmap,cliprect,0x120);
1205
1206		tilemap_draw(bitmap,cliprect,pf1_tilemap,TILEMAP_DRAW_OPAQUE | 0,0);
1207		tilemap_draw(bitmap,cliprect,pf1_tilemap,TILEMAP_DRAW_OPAQUE | 1,0);
1208
1209		for (priority = 1; priority < 16; priority++)
1210		{
1211		tilemap_draw_primask(bitmap,cliprect,pf4_tilemap,priority,priority,0);
1212		tilemap_draw_primask(bitmap,cliprect,pf3_tilemap,priority,priority,0);
1213		tilemap_draw_primask(bitmap,cliprect,pf2_tilemap,priority,priority,0);
1214		tilemap_draw_primask(bitmap,cliprect,pf1_tilemap,priority,priority,0);
1215		}
1216
1217		draw_sprites(screen->machine, bitmap,cliprect);
1218		return 0;
1219		}
1220
1221
1222	1217	/****************************************************************************
1223	1218	Spriteram is always 1 frame ahead, suggesting spriteram buffering.
1224	1219	There are no CPU output registers that control this so we
r8962	r8963
1227	1222
1228	1223	VIDEO_EOF( rallybik )
1229	1224	{
1230		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1231		buffer_spriteram16_w(space, 0, 0, 0xffff);
	1225	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	1226
	1227	memcpy(state->buffered_spriteram, state->spriteram, state->spriteram_size);
1232	1228	}
1233	1229
1234	1230	VIDEO_EOF( toaplan1 )
1235	1231	{
1236		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1237		buffer_spriteram16_w(space, 0, 0, 0xffff);
1238		memcpy(toaplan1_buffered_spritesizeram16, toaplan1_spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE);
	1232	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	1233
	1234	memcpy(state->buffered_spriteram, state->spriteram, state->spriteram_size);
	1235	memcpy(state->buffered_spritesizeram16, state->spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE);
1239	1236	}
1240	1237
1241	1238	VIDEO_EOF( samesame )
1242	1239	{
1243		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1244		buffer_spriteram16_w(space, 0, 0, 0xffff);
1245		memcpy(toaplan1_buffered_spritesizeram16, toaplan1_spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE);
	1240	toaplan1_state *state = machine->driver_data<toaplan1_state>();
	1241
	1242	memcpy(state->buffered_spriteram, state->spriteram, state->spriteram_size);
	1243	memcpy(state->buffered_spritesizeram16, state->spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE);
1246	1244	cputag_set_input_line(machine, "maincpu", M68K_IRQ_2, HOLD_LINE);   /* Frame done */
1247	1245	}

src/mame/video/jpmimpct.c

r8962	r8963
98	98	*
99	99	*************************************/
100	100
101		void jpmimpct_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	101	void jpmimpct_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
102	102	{
103	103	memcpy(shiftreg, &jpmimpct_vram[TOWORD(address)], 512 * sizeof(UINT16));
104	104	}
105	105
106		void jpmimpct_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	106	void jpmimpct_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
107	107	{
108	108	memcpy(&jpmimpct_vram[TOWORD(address)], shiftreg, 512 * sizeof(UINT16));
109	109	}

src/mame/video/bionicc.c

r8962	r8963
262	262
263	263	VIDEO_EOF( bionicc )
264	264	{
265		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	265	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
266	266
267	267	buffer_spriteram16_w(space, 0, 0, 0xffff);
268	268	}

src/mame/video/model3.c

r8962	r8963
814	814	//  real3d_display_list = 1;
815	815	}
816	816
817		void real3d_display_list1_dma(const address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
	817	void real3d_display_list1_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
818	818	{
819	819	int i;
820	820	int d = (dst & 0xffffff) / 4;
821	821	for(i=0; i < length; i+=4) {
822	822	UINT32 w;
823	823	if (byteswap) {
824		w = BYTE_REVERSE32(memory_read_dword(space, src));
	824	w = BYTE_REVERSE32(space->read_dword(src));
825	825	} else {
826		w = memory_read_dword(space, src);
	826	w = space->read_dword(src);
827	827	}
828	828	display_list_ram[d++] = w;
829	829	src += 4;
830	830	}
831	831	}
832	832
833		void real3d_display_list2_dma(const address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
	833	void real3d_display_list2_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
834	834	{
835	835	int i;
836	836	int d = (dst & 0xffffff) / 4;
837	837	for(i=0; i < length; i+=4) {
838	838	UINT32 w;
839	839	if (byteswap) {
840		w = BYTE_REVERSE32(memory_read_dword(space, src));
	840	w = BYTE_REVERSE32(space->read_dword(src));
841	841	} else {
842		w = memory_read_dword(space, src);
	842	w = space->read_dword(src);
843	843	}
844	844	culling_ram[d++] = w;
845	845	src += 4;
846	846	}
847	847	}
848	848
849		void real3d_vrom_texture_dma(const address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
	849	void real3d_vrom_texture_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
850	850	{
851	851	if((dst & 0xff) == 0) {
852	852
853	853	UINT32 address, header;
854	854
855	855	if (byteswap) {
856		address = BYTE_REVERSE32(memory_read_dword(space, (src+0)));
857		header = BYTE_REVERSE32(memory_read_dword(space, (src+4)));
	856	address = BYTE_REVERSE32(space->read_dword((src+0)));
	857	header = BYTE_REVERSE32(space->read_dword((src+4)));
858	858	} else {
859		address = memory_read_dword(space, (src+0));
860		header = memory_read_dword(space, (src+4));
	859	address = space->read_dword((src+0));
	860	header = space->read_dword((src+4));
861	861	}
862	862	real3d_upload_texture(space->machine, header, (UINT32*)&model3_vrom[address]);
863	863	}
864	864	}
865	865
866		void real3d_texture_fifo_dma(const address_space *space, UINT32 src, int length, int byteswap)
	866	void real3d_texture_fifo_dma(address_space *space, UINT32 src, int length, int byteswap)
867	867	{
868	868	int i;
869	869	for(i=0; i < length; i+=4) {
870	870	UINT32 w;
871	871	if (byteswap) {
872		w = BYTE_REVERSE32(memory_read_dword(space, src));
	872	w = BYTE_REVERSE32(space->read_dword(src));
873	873	} else {
874		w = memory_read_dword(space, src);
	874	w = space->read_dword(src);
875	875	}
876	876	texture_fifo[texture_fifo_pos] = w;
877	877	texture_fifo_pos++;
r8962	r8963
879	879	}
880	880	}
881	881
882		void real3d_polygon_ram_dma(const address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
	882	void real3d_polygon_ram_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
883	883	{
884	884	int i;
885	885	int d = (dst & 0xffffff) / 4;
886	886	for(i=0; i < length; i+=4) {
887	887	UINT32 w;
888	888	if (byteswap) {
889		w = BYTE_REVERSE32(memory_read_dword(space, src));
	889	w = BYTE_REVERSE32(space->read_dword(src));
890	890	} else {
891		w = memory_read_dword(space, src);
	891	w = space->read_dword(src);
892	892	}
893	893	polygon_ram[d++] = w;
894	894	src += 4;

src/mame/video/beathead.c

r8962	r8963
15	15	*
16	16	*************************************/
17	17
18		VIDEO_START( beathead )
	18	void beathead_state::video_start()
19	19	{
20		beathead_state *state = machine->driver_data<beathead_state>();
21		state_save_register_global(machine, state->finescroll);
22		state_save_register_global(machine, state->vram_latch_offset);
23		state_save_register_global(machine, state->hsyncram_offset);
24		state_save_register_global(machine, state->hsyncram_start);
25		state_save_register_global_array(machine, state->hsyncram);
	20	state_save_register_global(&m_machine, m_finescroll);
	21	state_save_register_global(&m_machine, m_vram_latch_offset);
	22	state_save_register_global(&m_machine, m_hsyncram_offset);
	23	state_save_register_global(&m_machine, m_hsyncram_start);
	24	state_save_register_global_array(&m_machine, m_hsyncram);
26	25	}
27	26
28	27
r8962	r8963
33	32	*
34	33	*************************************/
35	34
36		WRITE32_HANDLER( beathead_vram_transparent_w )
	35	WRITE32_MEMBER( beathead_state::vram_transparent_w )
37	36	{
38	37	/* writes to this area appear to handle transparency */
39	38	if (!(data & 0x000000ff)) mem_mask &= ~0x000000ff;
40	39	if (!(data & 0x0000ff00)) mem_mask &= ~0x0000ff00;
41	40	if (!(data & 0x00ff0000)) mem_mask &= ~0x00ff0000;
42	41	if (!(data & 0xff000000)) mem_mask &= ~0xff000000;
43		COMBINE_DATA(&space->machine->generic.videoram.u32[offset]);
	42	COMBINE_DATA(&m_videoram[offset]);
44	43	}
45	44
46	45
47		WRITE32_HANDLER( beathead_vram_bulk_w )
	46	WRITE32_MEMBER( beathead_state::vram_bulk_w )
48	47	{
49		beathead_state *state = space->machine->driver_data<beathead_state>();
50
51	48	/* it appears that writes to this area pass in a mask for 4 words in VRAM */
52	49	/* allowing them to be filled from a preset latch */
53	50	offset &= ~3;
r8962	r8963
55	52
56	53	/* for now, just handle the bulk fill case; the others we'll catch later */
57	54	if (data == 0x0f0f0f0f)
58		space->machine->generic.videoram.u32[offset+0] =
59		space->machine->generic.videoram.u32[offset+1] =
60		space->machine->generic.videoram.u32[offset+2] =
61		space->machine->generic.videoram.u32[offset+3] = *state->vram_bulk_latch;
	55	m_videoram[offset+0] = m_videoram[offset+1] = m_videoram[offset+2] = m_videoram[offset+3] = *m_vram_bulk_latch;
62	56	else
63	57	logerror("Detected bulk VRAM write with mask %08x\n", data);
64	58	}
65	59
66	60
67		WRITE32_HANDLER( beathead_vram_latch_w )
	61	WRITE32_MEMBER( beathead_state::vram_latch_w )
68	62	{
69	63	/* latch the address */
70		beathead_state *state = space->machine->driver_data<beathead_state>();
71		state->vram_latch_offset = (4 * offset) & 0x7ffff;
	64	m_vram_latch_offset = (4 * offset) & 0x7ffff;
72	65	}
73	66
74	67
75		WRITE32_HANDLER( beathead_vram_copy_w )
	68	WRITE32_MEMBER( beathead_state::vram_copy_w )
76	69	{
77	70	/* copy from VRAM to VRAM, for 1024 bytes */
78		beathead_state *state = space->machine->driver_data<beathead_state>();
79	71	offs_t dest_offset = (4 * offset) & 0x7ffff;
80		memcpy(&space->machine->generic.videoram.u32[dest_offset / 4], &space->machine->generic.videoram.u32[state->vram_latch_offset / 4], 0x400);
	72	memcpy(&m_videoram[dest_offset / 4], &m_videoram[m_vram_latch_offset / 4], 0x400);
81	73	}
82	74
83	75
r8962	r8963
88	80	*
89	81	*************************************/
90	82
91		WRITE32_HANDLER( beathead_finescroll_w )
	83	WRITE32_MEMBER( beathead_state::finescroll_w )
92	84	{
93		beathead_state *state = space->machine->driver_data<beathead_state>();
94		UINT32 oldword = state->finescroll;
95		UINT32 newword = COMBINE_DATA(&state->finescroll);
	85	UINT32 oldword = m_finescroll;
	86	UINT32 newword = COMBINE_DATA(&m_finescroll);
96	87
97	88	/* if VBLANK is going off on a scanline other than the last, suspend time */
98		if ((oldword & 8) && !(newword & 8) && space->machine->primary_screen->vpos() != 261)
	89	if ((oldword & 8) && !(newword & 8) && space.machine->primary_screen->vpos() != 261)
99	90	{
100		logerror("Suspending time! (scanline = %d)\n", space->machine->primary_screen->vpos());
101		cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
	91	logerror("Suspending time! (scanline = %d)\n", space.machine->primary_screen->vpos());
	92	cputag_set_input_line(space.machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
102	93	}
103	94	}
104	95
r8962	r8963
110	101	*
111	102	*************************************/
112	103
113		WRITE32_HANDLER( beathead_palette_w )
	104	WRITE32_MEMBER( beathead_state::palette_w )
114	105	{
115		int newword = COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]);
	106	int newword = COMBINE_DATA(&m_paletteram[offset]);
116	107	int r = ((newword >> 9) & 0x3e) | ((newword >> 15) & 0x01);
117	108	int g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 0x01);
118	109	int b = ((newword << 1) & 0x3e) | ((newword >> 15) & 0x01);
119		palette_set_color_rgb(space->machine, offset, pal6bit(r), pal6bit(g), pal6bit(b));
	110	palette_set_color_rgb(space.machine, offset, pal6bit(r), pal6bit(g), pal6bit(b));
120	111	}
121	112
122	113
r8962	r8963
127	118	*
128	119	*************************************/
129	120
130		READ32_HANDLER( beathead_hsync_ram_r )
	121	READ32_MEMBER( beathead_state::hsync_ram_r )
131	122	{
132		beathead_state *state = space->machine->driver_data<beathead_state>();
133
134	123	/* offset 0 is probably write-only */
135	124	if (offset == 0)
136		logerror("%08X:Unexpected HSYNC RAM read at offset 0\n", cpu_get_previouspc(space->cpu));
	125	logerror("%08X:Unexpected HSYNC RAM read at offset 0\n", cpu_get_previouspc(space.cpu));
137	126
138	127	/* offset 1 reads the data */
139	128	else
140		return state->hsyncram[state->hsyncram_offset];
	129	return m_hsyncram[m_hsyncram_offset];
141	130
142	131	return 0;
143	132	}
144	133
145		WRITE32_HANDLER( beathead_hsync_ram_w )
	134	WRITE32_MEMBER( beathead_state::hsync_ram_w )
146	135	{
147		beathead_state *state = space->machine->driver_data<beathead_state>();
148
149	136	/* offset 0 selects the address, and can specify the start address */
150	137	if (offset == 0)
151	138	{
152		COMBINE_DATA(&state->hsyncram_offset);
153		if (state->hsyncram_offset & 0x800)
154		state->hsyncram_start = state->hsyncram_offset & 0x7ff;
	139	COMBINE_DATA(&m_hsyncram_offset);
	140	if (m_hsyncram_offset & 0x800)
	141	m_hsyncram_start = m_hsyncram_offset & 0x7ff;
155	142	}
156	143
157	144	/* offset 1 writes the data */
158	145	else
159		COMBINE_DATA(&state->hsyncram[state->hsyncram_offset]);
	146	COMBINE_DATA(&m_hsyncram[m_hsyncram_offset]);
160	147	}
161	148
162	149
r8962	r8963
167	154	*
168	155	*************************************/
169	156
170		VIDEO_UPDATE( beathead )
	157	bool beathead_state::video_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
171	158	{
172		beathead_state *state = screen->machine->driver_data<beathead_state>();
173		UINT8 *videoram = screen->machine->generic.videoram.u8;
	159	UINT8 *videoram = reinterpret_cast<UINT8 *>(m_videoram);
174	160	int x, y;
175	161
176	162	/* generate the final screen */
177		for (y = cliprect->min_y; y <= cliprect->max_y; y++)
	163	for (y = cliprect.min_y; y <= cliprect.max_y; y++)
178	164	{
179		pen_t pen_base = (*state->palette_select & 0x7f) * 256;
	165	pen_t pen_base = (*m_palette_select & 0x7f) * 256;
180	166	UINT16 scanline[336];
181	167
182	168	/* blanking */
183		if (state->finescroll & 8)
184		for (x = cliprect->min_x; x <= cliprect->max_x; x++)
	169	if (m_finescroll & 8)
	170	for (x = cliprect.min_x; x <= cliprect.max_x; x++)
185	171	scanline[x] = pen_base;
186	172
187	173	/* non-blanking */
188	174	else
189	175	{
190		offs_t scanline_offset = state->vram_latch_offset + (state->finescroll & 3);
191		offs_t src = scanline_offset + cliprect->min_x;
	176	offs_t scanline_offset = m_vram_latch_offset + (m_finescroll & 3);
	177	offs_t src = scanline_offset + cliprect.min_x;
192	178
193	179	/* unswizzle the scanline first */
194		for (x = cliprect->min_x; x <= cliprect->max_x; x++)
	180	for (x = cliprect.min_x; x <= cliprect.max_x; x++)
195	181	scanline[x] = pen_base | videoram[BYTE4_XOR_LE(src++)];
196	182	}
197	183
198	184	/* then draw it */
199		draw_scanline16(bitmap, cliprect->min_x, y, cliprect->max_x - cliprect->min_x + 1, &scanline[cliprect->min_x], NULL);
	185	draw_scanline16(&bitmap, cliprect.min_x, y, cliprect.max_x - cliprect.min_x + 1, &scanline[cliprect.min_x], NULL);
200	186	}
201	187	return 0;
202	188	}

src/mame/video/mcatadv.c

r8962	r8963
241	241	mcatadv_draw_tilemap_part(state->scroll2, state->videoram2, i, state->tilemap2, bitmap, cliprect);
242	242	}
243	243
244		profiler_mark_start(PROFILER_USER1);
	244	g_profiler.start(PROFILER_USER1);
245	245	#ifdef MAME_DEBUG
246	246	if (!input_code_pressed(screen->machine, KEYCODE_E))
247	247	#endif
248	248	draw_sprites (screen->machine, bitmap, cliprect);
249		profiler_mark_end();
	249	g_profiler.stop();
250	250	return 0;
251	251	}
252	252

src/mame/video/toaplan2.c

r8962	r8963
28	28
29	29	#define RAIZING_TX_GFXRAM_SIZE  0x8000   /* GFX data decode RAM size */
30	30
31		#define CPU_2_NONE      0x00
32		#define CPU_2_Z80      0x5a
33		#define CPU_2_HD647180   0xa5
34		#define CPU_2_V25      0xff
35	31
36	32
37
38		UINT16 *toaplan2_txvideoram16;      /* Video ram for extra text layer */
39		UINT16 *toaplan2_txvideoram16_offs;   /* Text layer tile flip and positon ? */
40		UINT16 *toaplan2_txscrollram16;      /* Text layer scroll ? */
41		UINT16 *toaplan2_tx_gfxram16;         /* Text Layer RAM based tiles */
42		UINT16 *raizing_tx_gfxram16;         /* Text Layer RAM based tiles (Batrider) */
43
44		size_t toaplan2_tx_vram_size;       /* 0x2000 Text layer RAM size */
45		size_t toaplan2_tx_offs_vram_size;    /* 0x200 Text layer tile flip and positon ? */
46		size_t toaplan2_tx_scroll_vram_size; /* 0x200 Text layer scroll ? */
47		size_t batrider_paletteram16_size;
48
49
50
51		static int display_tx;
52		static UINT8 tx_flip = 0;
53
54		static tilemap_t *tx_tilemap;   /* Tilemap for extra-text-layer */
55
56	33	/***************************************************************************
57	34
58	35	Callbacks for the TileMap code
r8962	r8963
61	38
62	39	static TILE_GET_INFO( get_text_tile_info )
63	40	{
	41	toaplan2_state *state = machine->driver_data<toaplan2_state>();
64	42	int color, tile_number, attrib;
65	43
66		attrib = toaplan2_txvideoram16[tile_index];
	44	attrib = state->txvideoram16[tile_index];
67	45	tile_number = attrib & 0x3ff;
68	46	color = ((attrib >> 10) | 0x40) & 0x7f;
69	47	SET_TILE_INFO(
r8962	r8963
82	60
83	61	static void truxton2_create_tx_tilemap(running_machine *machine)
84	62	{
85		tx_tilemap = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows,8,8,64,32);
86		tilemap_set_scroll_rows(tx_tilemap,8*32);   /* line scrolling */
87		tilemap_set_scroll_cols(tx_tilemap,1);
88		tilemap_set_transparent_pen(tx_tilemap,0);
	63	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	64
	65	state->tx_tilemap = tilemap_create(machine, get_text_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
	66	tilemap_set_scroll_rows(state->tx_tilemap, 8*32);   /* line scrolling */
	67	tilemap_set_scroll_cols(state->tx_tilemap, 1);
	68	tilemap_set_transparent_pen(state->tx_tilemap, 0);
89	69	}
90	70
91	71	static void register_state_save(running_machine *machine)
92	72	{
93		state_save_register_global(machine, tx_flip);
	73	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	74
	75	state_save_register_global(machine, state->tx_flip);
94	76	}
95	77
96	78
97	79	VIDEO_START( toaplan2 )
98	80	{
	81	toaplan2_state *state = machine->driver_data<toaplan2_state>();
99	82	int width = machine->primary_screen->width();
100	83	int height = machine->primary_screen->height();
101	84
102	85	/* cache the VDP device */
103		toaplan2_state *state = machine->driver_data<toaplan2_state>();
104	86	state->vdp0 = machine->device<gp9001vdp_device>("gp9001vdp0");
105	87	state->vdp1 = machine->device<gp9001vdp_device>("gp9001vdp1");
106	88
107	89	/* our current VDP implementation needs this bitmap to work with */
108		gp9001_custom_priority_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED8);
	90	state->custom_priority_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED8);
	91	state->displog = 0; // debug flag
109	92
110		gp9001_displog = 0; // debug flag
	93	if (state->vdp0 != NULL)
	94	{
	95	state->secondary_render_bitmap = NULL;
	96	state->vdp0->custom_priority_bitmap = state->custom_priority_bitmap;
	97	state->vdp0->displog = &state->displog;
	98	}
111	99
112		display_tx = 1;
	100	if (state->vdp1 != NULL)
	101	{
	102	state->secondary_render_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	103	state->vdp1->custom_priority_bitmap = state->custom_priority_bitmap;
	104	state->vdp1->displog = &state->displog;
	105	}
113	106
	107	state->display_tx = 1;
	108
114	109	register_state_save(machine);
115	110	}
116	111
117	112	VIDEO_START( truxton2 )
118	113	{
	114	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	115
119	116	VIDEO_START_CALL( toaplan2 );
120	117
121	118	/* Create the Text tilemap for this game */
122	119	truxton2_create_tx_tilemap(machine);
123	120	if (machine->gfx[2]->srcdata == NULL)
124		gfx_element_set_source(machine->gfx[2], (UINT8 *)toaplan2_tx_gfxram16);
125		tilemap_set_scrolldx(tx_tilemap, 0x1d4 +1, 0x2a);
	121	gfx_element_set_source(machine->gfx[2], (UINT8 *)state->tx_gfxram16);
	122	tilemap_set_scrolldx(state->tx_tilemap, 0x1d4 +1, 0x2a);
126	123	}
127	124
128	125	VIDEO_START( fixeighb )
r8962	r8963
142	139	state->vdp0->extra_yoffset[2]=-15;
143	140	state->vdp0->extra_yoffset[3]=8;
144	141
145		tilemap_set_scrolldx(tx_tilemap, 0, 0);
	142	tilemap_set_scrolldx(state->tx_tilemap, 0, 0);
146	143	}
147	144
148	145	VIDEO_START( bgaregga )
149	146	{
	147	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	148
150	149	VIDEO_START_CALL( toaplan2 );
151	150
152	151	/* Create the Text tilemap for this game */
153	152	truxton2_create_tx_tilemap(machine);
154		tilemap_set_scrolldx(tx_tilemap, 0x1d4, 0x2a);
	153	tilemap_set_scrolldx(state->tx_tilemap, 0x1d4, 0x2a);
155	154	}
156	155
157	156	VIDEO_START( batrider )
r8962	r8963
162	161	state->vdp0->spriteram16_n = state->vdp0->spriteram16_new;
163	162
164	163	/* Create the Text tilemap for this game */
165		raizing_tx_gfxram16 = auto_alloc_array_clear(machine, UINT16, RAIZING_TX_GFXRAM_SIZE/2);
166		state_save_register_global_pointer(machine, raizing_tx_gfxram16, RAIZING_TX_GFXRAM_SIZE/2);
167		gfx_element_set_source(machine->gfx[2], (UINT8 *)raizing_tx_gfxram16);
	164	state->tx_gfxram16 = auto_alloc_array_clear(machine, UINT16, RAIZING_TX_GFXRAM_SIZE/2);
	165	state_save_register_global_pointer(machine, state->tx_gfxram16, RAIZING_TX_GFXRAM_SIZE/2);
	166	gfx_element_set_source(machine->gfx[2], (UINT8 *)state->tx_gfxram16);
168	167	truxton2_create_tx_tilemap(machine);
169		tilemap_set_scrolldx(tx_tilemap, 0x1d4, 0x2a);
	168	tilemap_set_scrolldx(state->tx_tilemap, 0x1d4, 0x2a);
170	169
171	170	/* Has special banking */
172	171	state->vdp0->gp9001_gfxrom_is_banked = 1;
r8962	r8963
174	173
175	174	READ16_HANDLER( toaplan2_txvideoram16_r )
176	175	{
177		return toaplan2_txvideoram16[offset];
	176	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	177
	178	return state->txvideoram16[offset];
178	179	}
179	180
180	181	WRITE16_HANDLER( toaplan2_txvideoram16_w )
181	182	{
182		COMBINE_DATA(&toaplan2_txvideoram16[offset]);
183		if (offset < (toaplan2_tx_vram_size/4))
184		tilemap_mark_tile_dirty(tx_tilemap,offset);
	183	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	184
	185	COMBINE_DATA(&state->txvideoram16[offset]);
	186	if (offset < (state->tx_vram_size/4))
	187	tilemap_mark_tile_dirty(state->tx_tilemap, offset);
185	188	}
186	189
187	190	READ16_HANDLER( toaplan2_txvideoram16_offs_r )
188	191	{
189		return toaplan2_txvideoram16_offs[offset];
	192	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	193
	194	return state->txvideoram16_offs[offset];
190	195	}
	196
191	197	WRITE16_HANDLER( toaplan2_txvideoram16_offs_w )
192	198	{
193	199	/* Besides containing flip, function of this RAM is still unknown */
r8962	r8963
195	201	/* Maybe specifies which line to draw text info (line number data is */
196	202	/*   opposite when flip bits are on) */
197	203
198		UINT16 oldword = toaplan2_txvideoram16_offs[offset];
	204	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	205	UINT16 oldword = state->txvideoram16_offs[offset];
199	206
200	207	if (oldword != data)
201	208	{
r8962	r8963
203	210	{
204	211	if (data & 0x8000)      /* Flip off */
205	212	{
206		tx_flip = 0;
207		tilemap_set_flip(tx_tilemap, tx_flip);
208		tilemap_set_scrolly(tx_tilemap, 0, 0);
	213	state->tx_flip = 0;
	214	tilemap_set_flip(state->tx_tilemap, state->tx_flip);
	215	tilemap_set_scrolly(state->tx_tilemap, 0, 0);
209	216	}
210	217	else               /* Flip on */
211	218	{
212		tx_flip = (TILEMAP_FLIPY | TILEMAP_FLIPX);
213		tilemap_set_flip(tx_tilemap, tx_flip);
214		tilemap_set_scrolly(tx_tilemap, 0, -16);
	219	state->tx_flip = (TILEMAP_FLIPY | TILEMAP_FLIPX);
	220	tilemap_set_flip(state->tx_tilemap, state->tx_flip);
	221	tilemap_set_scrolly(state->tx_tilemap, 0, -16);
215	222	}
216	223	}
217		COMBINE_DATA(&toaplan2_txvideoram16_offs[offset]);
	224	COMBINE_DATA(&state->txvideoram16_offs[offset]);
218	225	}
219	226	//  logerror("Writing %04x to text offs RAM offset %04x\n",data,offset);
220	227	}
221	228
222	229	READ16_HANDLER( toaplan2_txscrollram16_r )
223	230	{
224		return toaplan2_txscrollram16[offset];
	231	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	232
	233	return state->txscrollram16[offset];
225	234	}
	235
226	236	WRITE16_HANDLER( toaplan2_txscrollram16_w )
227	237	{
228	238	/*** Line-Scroll RAM for Text Layer ***/
229	239
	240	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
230	241	int data_tx = data;
231	242
232		tilemap_set_scrollx(tx_tilemap, offset, data_tx);
	243	tilemap_set_scrollx(state->tx_tilemap, offset, data_tx);
233	244
234	245	//  logerror("Writing %04x to text scroll RAM offset %04x\n",data,offset);
235		COMBINE_DATA(&toaplan2_txscrollram16[offset]);
	246	COMBINE_DATA(&state->txscrollram16[offset]);
236	247	}
237	248
238	249	READ16_HANDLER( toaplan2_tx_gfxram16_r )
239	250	{
240		return toaplan2_tx_gfxram16[offset];
	251	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	252
	253	return state->tx_gfxram16[offset];
241	254	}
242	255
243	256	WRITE16_HANDLER( toaplan2_tx_gfxram16_w )
244	257	{
245	258	/*** Dynamic GFX decoding for Truxton 2 / FixEight ***/
246	259
247		UINT16 oldword = toaplan2_tx_gfxram16[offset];
	260	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	261	UINT16 oldword = state->tx_gfxram16[offset];
248	262
249	263	if (oldword != data)
250	264	{
251	265	int code = offset/32;
252		COMBINE_DATA(&toaplan2_tx_gfxram16[offset]);
	266	COMBINE_DATA(&state->tx_gfxram16[offset]);
253	267	gfx_element_mark_dirty(space->machine->gfx[2], code);
254	268	}
255	269	}
256	270
257	271	READ16_HANDLER( raizing_tx_gfxram16_r )
258	272	{
	273	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	274
259	275	offset += 0x3400/2;
260		return raizing_tx_gfxram16[offset];
	276	return state->tx_gfxram16[offset];
261	277	}
	278
262	279	WRITE16_HANDLER( raizing_tx_gfxram16_w )
263	280	{
264	281	/*** Dynamic Text GFX decoding for Batrider ***/
265	282
266		UINT16 oldword = raizing_tx_gfxram16[offset + (0x3400 / 2)];
	283	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	284	UINT16 oldword;
267	285
	286	offset += 0x3400/2;
	287	oldword = state->tx_gfxram16[offset];
268	288	if (oldword != data)
269	289	{
270		offset += 0x3400/2;
271		COMBINE_DATA(&raizing_tx_gfxram16[offset]);
	290	COMBINE_DATA(&state->tx_gfxram16[offset]);
272	291	}
273	292	}
274	293
r8962	r8963
277	296	/*** Dynamic Text GFX decoding for Batrider ***/
278	297	/*** Only done once during start-up ***/
279	298
	299	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
280	300	int code;
281		UINT16 *dest = (UINT16 *)raizing_tx_gfxram16;
	301	UINT16 *dest = (UINT16 *)state->tx_gfxram16;
282	302
283		memcpy(dest, toaplan2_txvideoram16, toaplan2_tx_vram_size);
284		dest += (toaplan2_tx_vram_size/2);
285		memcpy(dest, space->machine->generic.paletteram.u16, batrider_paletteram16_size);
286		dest += (batrider_paletteram16_size/2);
287		memcpy(dest, toaplan2_txvideoram16_offs, toaplan2_tx_offs_vram_size);
288		dest += (toaplan2_tx_offs_vram_size/2);
289		memcpy(dest, toaplan2_txscrollram16, toaplan2_tx_scroll_vram_size);
	303	memcpy(dest, state->txvideoram16, state->tx_vram_size);
	304	dest += (state->tx_vram_size/2);
	305	memcpy(dest, space->machine->generic.paletteram.u16, state->paletteram16_size);
	306	dest += (state->paletteram16_size/2);
	307	memcpy(dest, state->txvideoram16_offs, state->tx_offs_vram_size);
	308	dest += (state->tx_offs_vram_size/2);
	309	memcpy(dest, state->txscrollram16, state->tx_scroll_vram_size);
290	310
291	311	/* Decode text characters; force them to update immediately */
292	312	for (code = 0; code < 1024; code++)
r8962	r8963
308	328	}
309	329	}
310	330
	331	// Dogyuun doesn't appear to require fancy mixing?
	332	VIDEO_UPDATE( toaplan2_dual )
	333	{
	334	toaplan2_state *state = screen->machine->driver_data<toaplan2_state>();
311	335
312		VIDEO_UPDATE( toaplan2 )
	336	if (state->vdp1)
	337	{
	338	gp9001_log_vram(state->vdp1, screen->machine);
	339
	340	bitmap_fill(bitmap,cliprect,0);
	341	bitmap_fill(state->custom_priority_bitmap, cliprect, 0);
	342	state->vdp1->gp9001_render_vdp(screen->machine, bitmap, cliprect);
	343	}
	344	if (state->vdp0)
	345	{
	346	gp9001_log_vram(state->vdp0, screen->machine);
	347
	348	//  bitmap_fill(bitmap,cliprect,0);
	349	bitmap_fill(state->custom_priority_bitmap, cliprect, 0);
	350	state->vdp0->gp9001_render_vdp(screen->machine, bitmap, cliprect);
	351	}
	352
	353
	354	return 0;
	355	}
	356
	357
	358	// renders to 2 bitmaps, and mixes output
	359	VIDEO_UPDATE( toaplan2_mixed )
313	360	{
314	361	toaplan2_state *state = screen->machine->driver_data<toaplan2_state>();
315	362
	363	//  bitmap_fill(bitmap,cliprect,0);
	364	//  bitmap_fill(gp9001_custom_priority_bitmap, cliprect, 0);
316	365
317	366	if (state->vdp0)
318	367	{
	368	gp9001_log_vram(state->vdp0, screen->machine);
	369
	370	bitmap_fill(bitmap,cliprect,0);
	371	bitmap_fill(state->custom_priority_bitmap, cliprect, 0);
	372	state->vdp0->gp9001_render_vdp(screen->machine, bitmap, cliprect);
	373	}
	374	if (state->vdp1)
	375	{
	376	gp9001_log_vram(state->vdp1, screen->machine);
	377
	378	bitmap_fill(state->secondary_render_bitmap,cliprect,0);
	379	bitmap_fill(state->custom_priority_bitmap, cliprect, 0);
	380	state->vdp1->gp9001_render_vdp(screen->machine, state->secondary_render_bitmap, cliprect);
	381	}
	382
	383
	384	// key test places in batsugun
	385	// level 2 - the two layers of clouds (will appear under background, or over ships if wrong)
	386	// level 3 - the special effect 'layer' which should be under everything (will appear over background if wrong)
	387	// level 4(?) - the large clouds (will obscure player if wrong)
	388	// high score entry - letters will be missing if wrong
	389	// end credits - various issues if wrong, clouds like level 2
	390	//
	391	// when implemented based directly on the PAL equation it doesn't work, however, my own equations roughly based
	392	// on that do.
	393	//
	394
	395	if (state->vdp0 && state->vdp1)
	396	{
	397	int width = screen->width();
	398	int height = screen->height();
	399	int y,x;
	400	UINT16* src_vdp0; // output buffer of vdp0
	401	UINT16* src_vdp1; // output buffer of vdp1
	402
	403	for (y=0;y<height;y++)
	404	{
	405	src_vdp0 = BITMAP_ADDR16(bitmap, y, 0);
	406	src_vdp1 = BITMAP_ADDR16(state->secondary_render_bitmap, y, 0);
	407
	408	for (x=0;x<width;x++)
	409	{
	410	UINT16 GPU0_LUTaddr = src_vdp0[x];
	411	UINT16 GPU1_LUTaddr = src_vdp1[x];
	412
	413	// these equations is derived from the PAL, but doesn't seem to work?
	414
	415	int COMPARISON = ((GPU0_LUTaddr & 0x0780) > (GPU1_LUTaddr & 0x0780));
	416
	417	// note: GPU1_LUTaddr & 0x000f - transparency check for vdp1? (gfx are 4bpp, the low 4 bits of the lookup would be the pixel data value)
	418	#if 0
	419	int result =
	420	((GPU0_LUTaddr & 0x0008) & !COMPARISON)
	421	| ((GPU0_LUTaddr & 0x0008) & !(GPU1_LUTaddr & 0x000f))
	422	| ((GPU0_LUTaddr & 0x0004) & !COMPARISON)
	423	| ((GPU0_LUTaddr & 0x0004) & !(GPU1_LUTaddr & 0x000f))
	424	| ((GPU0_LUTaddr & 0x0002) & !COMPARISON)
	425	| ((GPU0_LUTaddr & 0x0002) & !(GPU1_LUTaddr & 0x000f))
	426	| ((GPU0_LUTaddr & 0x0001) & !COMPARISON)
	427	| ((GPU0_LUTaddr & 0x0001) & !(GPU1_LUTaddr & 0x000f));
	428
	429	if (result) src_vdp0[x] = GPU0_LUTaddr;
	430	else src_vdp0[x] = GPU1_LUTaddr;
	431	#endif
	432	// this seems to work tho?
	433	if (!(GPU1_LUTaddr & 0x000f))
	434	{
	435	src_vdp0[x] = GPU0_LUTaddr;
	436	}
	437	else
	438	{
	439	if (!(GPU0_LUTaddr & 0x000f))
	440	{
	441	src_vdp0[x] = GPU1_LUTaddr; // bg pen
	442	}
	443	else
	444	{
	445	if (COMPARISON)
	446	{
	447	src_vdp0[x] = GPU1_LUTaddr;
	448	}
	449	else
	450	{
	451	src_vdp0[x] = GPU0_LUTaddr;
	452	}
	453
	454	}
	455	}
	456	}
	457	}
	458	}
	459
	460	return 0;
	461	}
	462
	463	VIDEO_UPDATE( toaplan2 )
	464	{
	465	toaplan2_state *state = screen->machine->driver_data<toaplan2_state>();
	466
	467	if (state->vdp0)
	468	{
319	469	running_device *screen1  = screen->machine->device("screen");
320	470
321	471	gp9001_log_vram(state->vdp0, screen->machine);
r8962	r8963
323	473	if (screen == screen1)
324	474	{
325	475	bitmap_fill(bitmap,cliprect,0);
326		bitmap_fill(gp9001_custom_priority_bitmap, cliprect, 0);
	476	bitmap_fill(state->custom_priority_bitmap, cliprect, 0);
327	477	state->vdp0->gp9001_render_vdp(screen->machine, bitmap, cliprect);
328	478	}
329	479	}
r8962	r8963
339	489	if (screen == screen2)
340	490	{
341	491	bitmap_fill(bitmap,cliprect,0);
342		bitmap_fill(gp9001_custom_priority_bitmap, cliprect, 0);
	492	bitmap_fill(state->custom_priority_bitmap, cliprect, 0);
343	493	state->vdp1->gp9001_render_vdp(screen->machine, bitmap, cliprect);
344	494	}
345	495	}
r8962	r8963
350	500
351	501	VIDEO_UPDATE( truxton2 )
352	502	{
	503	toaplan2_state *state = screen->machine->driver_data<toaplan2_state>();
	504
353	505	VIDEO_UPDATE_CALL(toaplan2);
354		tilemap_draw(bitmap,cliprect,tx_tilemap,0,0);
	506	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
355	507	return 0;
356	508	}
357	509
358	510
359	511	VIDEO_UPDATE( batrider )
360	512	{
	513	toaplan2_state *state = screen->machine->driver_data<toaplan2_state>();
	514
361	515	VIDEO_UPDATE_CALL( toaplan2 );
362	516
363	517	int line;
r8962	r8963
373	527	for (line = 0; line < 256;line++)
374	528	{
375	529	clip.min_y = clip.max_y = line;
376		tilemap_set_scrolly(tx_tilemap,0,toaplan2_txvideoram16_offs[line&0xff]-line);
377		tilemap_draw(bitmap,&clip,tx_tilemap,0,0);
	530	tilemap_set_scrolly(state->tx_tilemap, 0, state->txvideoram16_offs[line&0xff] - line);
	531	tilemap_draw(bitmap, &clip, state->tx_tilemap, 0, 0);
378	532	}
379	533	return 0;
380	534	}
381	535
382	536
383	537
384		/* How do the dual VDP games mix? The internal mixing of each VDP chip is independent, if you view only a single
385		VDP then the priorities for that VDP are correct, however, it is completely unclear how the priorities of the
386		two VDPs should actually mix together, as a result these games are broken for now. */
387	538	VIDEO_UPDATE( dogyuun )
388	539	{
389	540	#ifdef DUAL_SCREEN_VDPS
390	541	VIDEO_UPDATE_CALL( toaplan2 );
391	542	#else
392		toaplan2_state *state = screen->machine->driver_data<toaplan2_state>();
393
394		bitmap_fill(bitmap,cliprect,0);
395		bitmap_fill(gp9001_custom_priority_bitmap, cliprect, 0);
396
397		state->vdp1->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp1->bg_tilemap, toaplan2_primap1, batsugun_prienable0);
398		state->vdp0->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp0->bg_tilemap, toaplan2_primap1, batsugun_prienable0);
399		state->vdp1->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp1->fg_tilemap, toaplan2_primap1, batsugun_prienable0);
400		state->vdp0->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp0->fg_tilemap, toaplan2_primap1, batsugun_prienable0);
401		state->vdp1->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp1->top_tilemap, toaplan2_primap1, batsugun_prienable0);
402		state->vdp0->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp0->top_tilemap, toaplan2_primap1, batsugun_prienable0);
403
404		state->vdp1->draw_sprites(screen->machine,bitmap,cliprect, toaplan2_sprprimap1);
405		state->vdp0->draw_sprites(screen->machine,bitmap,cliprect, toaplan2_sprprimap1);
	543	VIDEO_UPDATE_CALL( toaplan2_dual );
406	544	#endif
407	545
408	546	return 0;
r8962	r8963
410	548
411	549	VIDEO_UPDATE( batsugun )
412	550	{
413		toaplan2_state *state = screen->machine->driver_data<toaplan2_state>();
414		state->vdp1->tile_limit = 0x1fff; // 0x2000-0x3fff seem to be for sprites only? (corruption on level 1 otherwise)
415
416
417	551	#ifdef DUAL_SCREEN_VDPS
418	552	VIDEO_UPDATE_CALL( toaplan2 );
419	553	#else
420		bitmap_fill(bitmap,cliprect,0);
421		bitmap_fill(gp9001_custom_priority_bitmap, cliprect, 0);
422
423
424		state->vdp1->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp1->bg_tilemap, toaplan2_primap1, batsugun_prienable0);
425		state->vdp0->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp0->bg_tilemap, toaplan2_primap1, batsugun_prienable0);
426		state->vdp1->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp1->fg_tilemap, toaplan2_primap1, batsugun_prienable0);
427		state->vdp0->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp0->fg_tilemap, toaplan2_primap1, batsugun_prienable0);
428		state->vdp1->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp1->top_tilemap, toaplan2_primap1, batsugun_prienable0);
429		state->vdp0->toaplan2_draw_custom_tilemap( screen->machine, bitmap, state->vdp0->top_tilemap, toaplan2_primap1, batsugun_prienable0);
430
431		state->vdp1->draw_sprites(screen->machine,bitmap,cliprect, toaplan2_sprprimap1);
432		state->vdp0->draw_sprites(screen->machine,bitmap,cliprect, toaplan2_sprprimap1);
	554	VIDEO_UPDATE_CALL( toaplan2_mixed );
433	555	#endif
434	556
435	557	return 0;

src/mame/video/btoads.c

r8962	r8963
150	150
151	151	WRITE16_HANDLER( btoads_paletteram_w )
152	152	{
153		tlc34076_lsb_w(space, offset/2, data, mem_mask);
	153	tlc34076_w(space->machine->device("tlc34076"), offset/2, data);
154	154	}
155	155
156	156
157	157	READ16_HANDLER( btoads_paletteram_r )
158	158	{
159		return tlc34076_lsb_r(space, offset/2, mem_mask);
	159	return tlc34076_r(space->machine->device("tlc34076"), offset/2);
160	160	}
161	161
162	162
r8962	r8963
284	284	*
285	285	*************************************/
286	286
287		void btoads_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	287	void btoads_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
288	288	{
289	289	address &= ~0x40000000;
290	290
r8962	r8963
311	311	}
312	312
313	313
314		void btoads_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	314	void btoads_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
315	315	{
316	316	address &= ~0x40000000;
317	317
r8962	r8963
350	350	UINT16 *bg1_base = &btoads_vram_bg1[(fulladdr + (yscroll1 << 10)) & 0x3fc00];
351	351	UINT8 *spr_base = &vram_fg_display[fulladdr & 0x3fc00];
352	352	UINT32 *dst = BITMAP_ADDR32(bitmap, scanline, 0);
353		const rgb_t *pens = tlc34076_get_pens();
	353	const rgb_t *pens = tlc34076_get_pens(screen.machine->device("tlc34076"));
354	354	int coladdr = fulladdr & 0x3ff;
355	355	int x;
356	356

src/mame/video/lastduel.c

r8962	r8963
308	308
309	309	VIDEO_EOF( lastduel )
310	310	{
311		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	311	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
312	312
313	313	/* Spriteram is always 1 frame ahead, suggesting buffering.  I can't find
314	314	a register to control this so I assume it happens automatically

src/mame/video/cischeat.c

r8962	r8963
1336	1336	if (msk != 0) megasys1_active_layers &= msk;
1337	1337	#if 1
1338	1338	{
1339		const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1339	address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1340	1340
1341	1341	popmessage("Cmd: %04X Pos:%04X Lim:%04X Inp:%04X",
1342	1342	scudhamm_motor_command,

src/mame/video/namcos22.c

r8962	r8963
172	172	} /* Clamp256 */
173	173
174	174	#ifdef MAME_DEBUG
175		static void Dump( const address_space *space, FILE *f, unsigned addr1, unsigned addr2, const char *name );
	175	static void Dump( address_space *space, FILE *f, unsigned addr1, unsigned addr2, const char *name );
176	176	#endif
177	177
178	178	static struct
r8962	r8963
2273	2273	FILE *f = fopen( "dump.txt", "wb" );
2274	2274	if( f )
2275	2275	{
2276		const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2276	address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2277	2277
2278	2278	{
2279	2279	int i,bank;
r8962	r8963
2323	2323	FILE *f = fopen( "dump.txt", "wb" );
2324	2324	if( f )
2325	2325	{
2326		const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2326	address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2327	2327
2328	2328	//         Dump(space, f,0x90000000, 0x90000003, "led?" );
2329	2329	//         Dump(space, f,0x90010000, 0x90017fff, "cz_ram");
r8962	r8963
2395	2395
2396	2396	#ifdef MAME_DEBUG
2397	2397	static void
2398		Dump( const address_space *space, FILE *f, unsigned addr1, unsigned addr2, const char *name )
	2398	Dump( address_space *space, FILE *f, unsigned addr1, unsigned addr2, const char *name )
2399	2399	{
2400	2400	unsigned addr;
2401	2401	fprintf( f, "%s:\n", name );
r8962	r8963
2406	2406	int i;
2407	2407	for( i=0; i<16; i++ )
2408	2408	{
2409		data[i] = memory_read_byte(space, addr+i );
	2409	data[i] = space->read_byte(addr+i );
2410	2410	if( data[i] )
2411	2411	{
2412	2412	bHasNonZero = 1;

src/mame/video/atarisy1.c

r8962	r8963
386	386
387	387	TIMER_DEVICE_CALLBACK( atarisy1_int3off_callback )
388	388	{
389		const address_space *space = cputag_get_address_space(timer.machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	389	address_space *space = cputag_get_address_space(timer.machine, "maincpu", ADDRESS_SPACE_PROGRAM);
390	390
391	391	/* clear the state */
392	392	atarigen_scanline_int_ack_w(space, 0, 0, 0xffff);

src/mame/video/commando.c

r8962	r8963
147	147
148	148	VIDEO_EOF( commando )
149	149	{
150		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	150	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
151	151
152	152	buffer_spriteram_w(space, 0, 0);
153	153	}

src/mame/video/skydiver.c

r8962	r8963
17	17
18	18	MACHINE_RESET( skydiver )
19	19	{
20		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	20	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
21	21
22	22	/* reset all latches */
23	23	skydiver_start_lamp_1_w(space, 0, 0);

src/mame/video/gng.c

r8962	r8963
152	152
153	153	VIDEO_EOF( gng )
154	154	{
155		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	155	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
156	156
157	157	buffer_spriteram_w(space, 0, 0);
158	158	}

src/mame/video/ojankohs.c

r8962	r8963
192	192
193	193	******************************************************************************/
194	194
195		void ojankoc_flipscreen( const address_space *space, int data )
	195	void ojankoc_flipscreen( address_space *space, int data )
196	196	{
197	197	ojankohs_state *state = space->machine->driver_data<ojankohs_state>();
198	198	int x, y;
r8962	r8963
332	332
333	333	if (state->screen_refresh)
334	334	{
335		const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	335	address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
336	336
337	337	/* redraw bitmap */
338	338	for (offs = 0; offs < 0x8000; offs++)

src/mame/video/segag80v.c

r8962	r8963
5	5	*************************************************************************/
6	6
7	7	#include "emu.h"
8		#include "avgdvg.h"
9	8	#include "video/vector.h"
10	9	#include "includes/segag80v.h"
11	10
r8962	r8963
16	15	#define IRQ_CLOCK         (U34_CLOCK/0x1f788)   /* 40Hz interrupt */
17	16
18	17
	18	UINT8 *segag80v_vectorram;
	19	size_t segag80v_vectorram_size;
19	20	static int min_x, min_y;
20	21
21	22
r8962	r8963
114	115	UINT8 *sintable = memory_region(machine, "proms");
115	116	double total_time = 1.0 / (double)IRQ_CLOCK;
116	117	UINT16 symaddr = 0;
	118	UINT8 *vectorram = segag80v_vectorram;
117	119
118	120	vector_clear_list();
119	121
r8962	r8963
323	325
324	326	***************************************************************************/
325	327
326		VIDEO_START( sega )
	328	VIDEO_START( segag80v )
327	329	{
328		assert_always(vectorram_size != 0, "vectorram==0");
	330	assert_always(segag80v_vectorram_size != 0, "segag80v_vectorram==0");
329	331
330	332	min_x =machine->primary_screen->visible_area().min_x;
331	333	min_y =machine->primary_screen->visible_area().min_y;
r8962	r8963
334	336	}
335	337
336	338
337		VIDEO_UPDATE( sega )
	339	VIDEO_UPDATE( segag80v )
338	340	{
339	341	sega_generate_vector_list(screen->machine);
340	342	VIDEO_UPDATE_CALL(vector);

src/mame/video/sidearms.c

r8962	r8963
368	368
369	369	VIDEO_EOF( sidearms )
370	370	{
371		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	371	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
372	372
373	373	buffer_spriteram_w(space, 0, 0);
374	374	}

src/mame/video/dogfgt.c

r8962	r8963
224	224
225	225	if (state->lastflip != flip_screen_get(screen->machine) || state->lastpixcolor != state->pixcolor)
226	226	{
227		const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	227	address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
228	228
229	229	state->lastflip = flip_screen_get(screen->machine);
230	230	state->lastpixcolor = state->pixcolor;

src/mame/video/avgdvg.c

r8962	r8963
22	22	*
23	23	*************************************/
24	24
25		UINT8 *tempest_colorram;
26		UINT8 *mhavoc_colorram;
27		UINT16 *quantum_colorram;
	25	UINT8 *avgdvg_vectorram;
	26	size_t avgdvg_vectorram_size;
28	27
29		UINT16 *quantum_vectorram;
	28	UINT8 *avgdvg_colorram;
30	29
31	30
32	31
r8962	r8963
229	228	/*
230	229	* DVG uses low bit of state for address
231	230	*/
232		vg->data = vectorram[(vg->pc << 1) | (vg->state_latch & 1)];
	231	vg->data = avgdvg_vectorram[(vg->pc << 1) | (vg->state_latch & 1)];
233	232	}
234	233
235	234	static UINT8 dvg_state_addr(vgdata *vg)
r8962	r8963
464	463
465	464	static void avg_data(vgdata *vg)
466	465	{
467		vg->data = vectorram[vg->pc ^ 1];
	466	vg->data = avgdvg_vectorram[vg->pc ^ 1];
468	467	}
469	468
470	469	static void starwars_data(vgdata *vg)
471	470	{
472		vg->data = vectorram[vg->pc];
	471	vg->data = avgdvg_vectorram[vg->pc];
473	472	}
474	473
475	474	static void quantum_data(vgdata *vg)
476	475	{
477		vg->data = quantum_vectorram[vg->pc >> 1];
	476	vg->data = ((UINT16 *)avgdvg_vectorram)[vg->pc >> 1];
478	477	}
479	478
480	479	static void mhavoc_data(vgdata *vg)
r8962	r8963
488	487	}
489	488	else
490	489	{
491		vg->data = vectorram[vg->pc ^ 1];
	490	vg->data = avgdvg_vectorram[vg->pc ^ 1];
492	491	}
493	492	}
494	493
r8962	r8963
962	961
963	962	if ((vg->op & 5) == 0)
964	963	{
965		data = tempest_colorram[vg->color];
	964	data = avgdvg_colorram[vg->color];
966	965	bit3 = (~data >> 3) & 1;
967	966	bit2 = (~data >> 2) & 1;
968	967	bit1 = (~data >> 1) & 1;
r8962	r8963
1015	1014	{
1016	1015	vg->xpos += dx/2;
1017	1016	vg->ypos -= dy/2;
1018		data = mhavoc_colorram[0xf +
	1017	data = avgdvg_colorram[0xf +
1019	1018	(((vg->spkl_shift & 1) << 3)
1020	1019	| (vg->spkl_shift & 4)
1021	1020	| ((vg->spkl_shift & 0x10) >> 3)
r8962	r8963
1043	1042	{
1044	1043	vg->xpos += (dx * cycles) >> 4;
1045	1044	vg->ypos -= (dy * cycles) >> 4;
1046		data = mhavoc_colorram[vg->color];
	1045	data = avgdvg_colorram[vg->color];
1047	1046
1048	1047	bit3 = (~data >> 3) & 1;
1049	1048	bit2 = (~data >> 2) & 1;
r8962	r8963
1094	1093
1095	1094	if ((vg->op & 5) == 0)
1096	1095	{
1097		data = quantum_colorram[vg->color];
	1096	data = ((UINT16 *)avgdvg_colorram)[vg->color];
1098	1097	bit3 = (~data >> 3) & 1;
1099	1098	bit2 = (~data >> 2) & 1;
1100	1099	bit1 = (~data >> 1) & 1;
r8962	r8963
1485	1484
1486	1485	state_save_register_item(machine, "AVG", NULL, 0, flip_x);
1487	1486	state_save_register_item(machine, "AVG", NULL, 0, flip_y);
1488
	1487	state_save_register_item_pointer(machine, "AVG", NULL, 0, avgdvg_vectorram, avgdvg_vectorram_size);
1489	1488	}
1490	1489
1491	1490	static VIDEO_START( avg_common )
r8962	r8963
1536	1535
1537	1536	register_state (machine);
1538	1537
1539		state_save_register_item_pointer(machine, "AVG", NULL, 0, vectorram, vectorram_size);
1540
1541	1538	VIDEO_START_CALL(vector);
1542	1539	}
1543	1540
r8962	r8963
1545	1542	{
1546	1543	vgc = &avg_default;
1547	1544	VIDEO_START_CALL(avg_common);
1548
1549		state_save_register_item_pointer(machine, "AVG", NULL, 0, vectorram, vectorram_size);
1550	1545	}
1551	1546
1552	1547	VIDEO_START( avg_starwars )
r8962	r8963
1559	1554	{
1560	1555	vgc = &avg_tempest;
1561	1556	VIDEO_START_CALL(avg_common);
1562
1563		state_save_register_item_pointer(machine, "AVG", NULL, 0, vectorram, vectorram_size);
1564	1557	}
1565	1558
1566	1559	VIDEO_START( avg_mhavoc )
1567	1560	{
1568	1561	vgc = &avg_mhavoc;
1569	1562	VIDEO_START_CALL(avg_common);
1570
1571		state_save_register_item_pointer(machine, "AVG", NULL, 0, vectorram, vectorram_size);
1572	1563	}
1573	1564
1574	1565	VIDEO_START( avg_bzone )
1575	1566	{
1576	1567	vgc = &avg_bzone;
1577	1568	VIDEO_START_CALL(avg_common);
1578
1579		state_save_register_item_pointer(machine, "AVG", NULL, 0, vectorram, vectorram_size);
1580	1569	}
1581	1570
1582	1571	VIDEO_START( avg_quantum )

src/mame/video/avgdvg.h

r8962	r8963
1	1	#ifndef __AVGDVG__
2	2	#define __AVGDVG__
3	3
4		extern UINT8 *tempest_colorram;
5		extern UINT8 *mhavoc_colorram;
6		extern UINT16 *quantum_colorram;
7		extern UINT16 *quantum_vectorram;
	4	extern UINT8 *avgdvg_vectorram;
	5	extern size_t avgdvg_vectorram_size;
	6	extern UINT8 *avgdvg_colorram;
8	7
9	8	CUSTOM_INPUT( avgdvg_done_r );
10	9	WRITE8_HANDLER( avgdvg_go_w );

src/mame/video/snk6502.c

r8962	r8963
10	10	#include "includes/snk6502.h"
11	11
12	12
13		UINT8 *snk6502_videoram;
14		UINT8 *snk6502_colorram;
15		UINT8 *snk6502_videoram2;
16		UINT8 *snk6502_charram;
17
18		static int charbank;
19		static int backcolor;
20
21		static tilemap_t *bg_tilemap;
22		static tilemap_t *fg_tilemap;
23
24		static rgb_t palette[64];
25
26	13	#define TOTAL_COLORS(m,gfxn) ((m)->gfx[gfxn]->total_colors * (m)->gfx[gfxn]->color_granularity)
27	14	#define COLOR(m,gfxn,offs) ((m)->config->m_gfxdecodeinfo[gfxn].color_codes_start + offs)
28	15
r8962	r8963
37	24	***************************************************************************/
38	25	PALETTE_INIT( snk6502 )
39	26	{
	27	snk6502_state *state = machine->driver_data<snk6502_state>();
40	28	int i;
41	29
42	30	for (i = 0; i < machine->total_colors(); i++)
r8962	r8963
45	33
46	34	/* red component */
47	35
48		bit0 = (*color_prom >> 0) & 0x01;
49		bit1 = (*color_prom >> 1) & 0x01;
50		bit2 = (*color_prom >> 2) & 0x01;
	36	bit0 = (*color_prom >> 0) & 0x01;
	37	bit1 = (*color_prom >> 1) & 0x01;
	38	bit2 = (*color_prom >> 2) & 0x01;
51	39
52	40	r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
53	41
54	42	/* green component */
55	43
56		bit0 = (*color_prom >> 3) & 0x01;
57		bit1 = (*color_prom >> 4) & 0x01;
58		bit2 = (*color_prom >> 5) & 0x01;
	44	bit0 = (*color_prom >> 3) & 0x01;
	45	bit1 = (*color_prom >> 4) & 0x01;
	46	bit2 = (*color_prom >> 5) & 0x01;
59	47
60	48	g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
61	49
62	50	/* blue component */
63	51
64	52	bit0 = 0;
65		bit1 = (*color_prom >> 6) & 0x01;
66		bit2 = (*color_prom >> 7) & 0x01;
	53	bit1 = (*color_prom >> 6) & 0x01;
	54	bit2 = (*color_prom >> 7) & 0x01;
67	55
68	56	b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
69	57
70		palette[i] = MAKE_RGB(r, g, b);
	58	state->palette[i] = MAKE_RGB(r, g, b);
71	59
72	60	color_prom++;
73	61	}
74	62
75		backcolor = 0;   /* background color can be changed by the game */
	63	state->backcolor = 0;   /* background color can be changed by the game */
76	64
77	65	for (i = 0; i < TOTAL_COLORS(machine,0); i++)
78		palette_set_color(machine, COLOR(machine, 0, i), palette[i]);
	66	palette_set_color(machine, COLOR(machine, 0, i), state->palette[i]);
79	67
80	68	for (i = 0; i < TOTAL_COLORS(machine,1); i++)
81	69	{
82	70	if (i % 4 == 0)
83		palette_set_color(machine, COLOR(machine, 1, i), palette[4 * backcolor + 0x20]);
	71	palette_set_color(machine, COLOR(machine, 1, i), state->palette[4 * state->backcolor + 0x20]);
84	72	else
85		palette_set_color(machine, COLOR(machine, 1, i), palette[i + 0x20]);
	73	palette_set_color(machine, COLOR(machine, 1, i), state->palette[i + 0x20]);
86	74	}
87	75	}
88	76
89	77	WRITE8_HANDLER( snk6502_videoram_w )
90	78	{
91		snk6502_videoram[offset] = data;
92		tilemap_mark_tile_dirty(bg_tilemap, offset);
	79	snk6502_state *state = space->machine->driver_data<snk6502_state>();
	80
	81	state->videoram[offset] = data;
	82	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
93	83	}
94	84
95	85	WRITE8_HANDLER( snk6502_videoram2_w )
96	86	{
97		snk6502_videoram2[offset] = data;
98		tilemap_mark_tile_dirty(fg_tilemap, offset);
	87	snk6502_state *state = space->machine->driver_data<snk6502_state>();
	88
	89	state->videoram2[offset] = data;
	90	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
99	91	}
100	92
101	93	WRITE8_HANDLER( snk6502_colorram_w )
102	94	{
103		snk6502_colorram[offset] = data;
104		tilemap_mark_tile_dirty(bg_tilemap, offset);
105		tilemap_mark_tile_dirty(fg_tilemap, offset);
	95	snk6502_state *state = space->machine->driver_data<snk6502_state>();
	96
	97	state->colorram[offset] = data;
	98	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
	99	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
106	100	}
107	101
108	102	WRITE8_HANDLER( snk6502_charram_w )
109	103	{
110		if (snk6502_charram[offset] != data)
	104	snk6502_state *state = space->machine->driver_data<snk6502_state>();
	105
	106	if (state->charram[offset] != data)
111	107	{
112		snk6502_charram[offset] = data;
	108	state->charram[offset] = data;
113	109	gfx_element_mark_dirty(space->machine->gfx[0], (offset/8) % 256);
114	110	}
115	111	}
r8962	r8963
117	113
118	114	WRITE8_HANDLER( snk6502_flipscreen_w )
119	115	{
	116	snk6502_state *state = space->machine->driver_data<snk6502_state>();
120	117	int bank;
121	118
122	119	/* bits 0-2 select background color */
123	120
124		if (backcolor != (data & 7))
	121	if (state->backcolor != (data & 7))
125	122	{
126	123	int i;
127	124
128		backcolor = data & 7;
	125	state->backcolor = data & 7;
129	126
130	127	for (i = 0;i < 32;i += 4)
131		palette_set_color(space->machine, COLOR(space->machine, 1, i), palette[4 * backcolor + 0x20]);
	128	palette_set_color(space->machine, COLOR(space->machine, 1, i), state->palette[4 * state->backcolor + 0x20]);
132	129	}
133	130
134	131	/* bit 3 selects char bank */
135	132
136	133	bank = (~data & 0x08) >> 3;
137	134
138		if (charbank != bank)
	135	if (state->charbank != bank)
139	136	{
140		charbank = bank;
	137	state->charbank = bank;
141	138	tilemap_mark_all_tiles_dirty_all(space->machine);
142	139	}
143	140
r8962	r8963
152	149
153	150	WRITE8_HANDLER( snk6502_scrollx_w )
154	151	{
155		tilemap_set_scrollx(bg_tilemap, 0, data);
	152	snk6502_state *state = space->machine->driver_data<snk6502_state>();
	153
	154	tilemap_set_scrollx(state->bg_tilemap, 0, data);
156	155	}
157	156
158	157	WRITE8_HANDLER( snk6502_scrolly_w )
159	158	{
160		tilemap_set_scrolly(bg_tilemap, 0, data);
	159	snk6502_state *state = space->machine->driver_data<snk6502_state>();
	160
	161	tilemap_set_scrolly(state->bg_tilemap, 0, data);
161	162	}
162	163
163	164
164	165	static TILE_GET_INFO( get_bg_tile_info )
165	166	{
166		int code = snk6502_videoram[tile_index] + 256 * charbank;
167		int color = (snk6502_colorram[tile_index] & 0x38) >> 3;
	167	snk6502_state *state = machine->driver_data<snk6502_state>();
	168	int code = state->videoram[tile_index] + 256 * state->charbank;
	169	int color = (state->colorram[tile_index] & 0x38) >> 3;
168	170
169	171	SET_TILE_INFO(1, code, color, 0);
170	172	}
171	173
172	174	static TILE_GET_INFO( get_fg_tile_info )
173	175	{
174		int code = snk6502_videoram2[tile_index];
175		int color = snk6502_colorram[tile_index] & 0x07;
	176	snk6502_state *state = machine->driver_data<snk6502_state>();
	177	int code = state->videoram2[tile_index];
	178	int color = state->colorram[tile_index] & 0x07;
176	179
177	180	SET_TILE_INFO(0, code, color, 0);
178	181	}
179	182
180	183	VIDEO_START( snk6502 )
181	184	{
182		bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
183		fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	185	snk6502_state *state = machine->driver_data<snk6502_state>();
184	186
185		tilemap_set_transparent_pen(fg_tilemap, 0);
	187	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	188	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
186	189
187		gfx_element_set_source(machine->gfx[0], snk6502_charram);
	190	tilemap_set_transparent_pen(state->fg_tilemap, 0);
	191
	192	gfx_element_set_source(machine->gfx[0], state->charram);
188	193	}
189	194
	195	VIDEO_START( pballoon )
	196	{
	197	snk6502_state *state = machine->driver_data<snk6502_state>();
	198
	199	VIDEO_START_CALL( snk6502 );
	200
	201	tilemap_set_scrolldy(state->bg_tilemap, -24, 0);
	202	tilemap_set_scrolldy(state->fg_tilemap, -24, 0);
	203	}
	204
	205
190	206	VIDEO_UPDATE( snk6502 )
191	207	{
192		tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
193		tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
	208	snk6502_state *state = screen->machine->driver_data<snk6502_state>();
	209
	210	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
	211	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
194	212	return 0;
195	213	}
196	214
r8962	r8963
198	216
199	217	PALETTE_INIT( satansat )
200	218	{
	219	snk6502_state *state = machine->driver_data<snk6502_state>();
201	220	int i;
202	221
203	222	for (i = 0; i < machine->total_colors(); i++)
r8962	r8963
206	225
207	226	/* red component */
208	227
209		bit0 = (*color_prom >> 0) & 0x01;
210		bit1 = (*color_prom >> 1) & 0x01;
211		bit2 = (*color_prom >> 2) & 0x01;
	228	bit0 = (*color_prom >> 0) & 0x01;
	229	bit1 = (*color_prom >> 1) & 0x01;
	230	bit2 = (*color_prom >> 2) & 0x01;
212	231
213	232	r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
214	233
215	234	/* green component */
216	235
217		bit0 = (*color_prom >> 3) & 0x01;
218		bit1 = (*color_prom >> 4) & 0x01;
219		bit2 = (*color_prom >> 5) & 0x01;
	236	bit0 = (*color_prom >> 3) & 0x01;
	237	bit1 = (*color_prom >> 4) & 0x01;
	238	bit2 = (*color_prom >> 5) & 0x01;
220	239
221	240	g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
222	241
223	242	/* blue component */
224	243
225	244	bit0 = 0;
226		bit1 = (*color_prom >> 6) & 0x01;
227		bit2 = (*color_prom >> 7) & 0x01;
	245	bit1 = (*color_prom >> 6) & 0x01;
	246	bit2 = (*color_prom >> 7) & 0x01;
228	247
229	248	b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
230	249
231		palette[i] = MAKE_RGB(r, g, b);
	250	state->palette[i] = MAKE_RGB(r, g, b);
232	251
233	252	color_prom++;
234	253	}
235	254
236		backcolor = 0;   /* background color can be changed by the game */
	255	state->backcolor = 0;   /* background color can be changed by the game */
237	256
238	257	for (i = 0; i < TOTAL_COLORS(machine,0); i++)
239		palette_set_color(machine, COLOR(machine, 0, i), palette[4 * (i % 4) + (i / 4)]);
	258	palette_set_color(machine, COLOR(machine, 0, i), state->palette[4 * (i % 4) + (i / 4)]);
240	259
241	260	for (i = 0; i < TOTAL_COLORS(machine,1); i++)
242	261	{
243	262	if (i % 4 == 0)
244		palette_set_color(machine, COLOR(machine, 1, i), palette[backcolor + 0x10]);
	263	palette_set_color(machine, COLOR(machine, 1, i), state->palette[state->backcolor + 0x10]);
245	264	else
246		palette_set_color(machine, COLOR(machine, 1, i), palette[4 * (i % 4) + (i / 4) + 0x10]);
	265	palette_set_color(machine, COLOR(machine, 1, i), state->palette[4 * (i % 4) + (i / 4) + 0x10]);
247	266	}
248	267	}
249	268
r8962	r8963
268	287
269	288	WRITE8_HANDLER( satansat_backcolor_w )
270	289	{
	290	snk6502_state *state = space->machine->driver_data<snk6502_state>();
	291
271	292	/* bits 0-1 select background color. Other bits unused. */
272	293
273		if (backcolor != (data & 0x03))
	294	if (state->backcolor != (data & 0x03))
274	295	{
275	296	int i;
276	297
277		backcolor = data & 0x03;
	298	state->backcolor = data & 0x03;
278	299
279	300	for (i = 0; i < 16; i += 4)
280		palette_set_color(space->machine, COLOR(space->machine, 1, i), palette[backcolor + 0x10]);
	301	palette_set_color(space->machine, COLOR(space->machine, 1, i), state->palette[state->backcolor + 0x10]);
281	302	}
282	303	}
283	304
284	305	static TILE_GET_INFO( satansat_get_bg_tile_info )
285	306	{
286		int code = snk6502_videoram[tile_index];
287		int color = (snk6502_colorram[tile_index] & 0x0c) >> 2;
	307	snk6502_state *state = machine->driver_data<snk6502_state>();
	308	int code = state->videoram[tile_index];
	309	int color = (state->colorram[tile_index] & 0x0c) >> 2;
288	310
289	311	SET_TILE_INFO(1, code, color, 0);
290	312	}
291	313
292	314	static TILE_GET_INFO( satansat_get_fg_tile_info )
293	315	{
294		int code = snk6502_videoram2[tile_index];
295		int color = snk6502_colorram[tile_index] & 0x03;
	316	snk6502_state *state = machine->driver_data<snk6502_state>();
	317	int code = state->videoram2[tile_index];
	318	int color = state->colorram[tile_index] & 0x03;
296	319
297	320	SET_TILE_INFO(0, code, color, 0);
298	321	}
299	322
300	323	VIDEO_START( satansat )
301	324	{
302		bg_tilemap = tilemap_create(machine, satansat_get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
303		fg_tilemap = tilemap_create(machine, satansat_get_fg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	325	snk6502_state *state = machine->driver_data<snk6502_state>();
304	326
305		tilemap_set_transparent_pen(fg_tilemap, 0);
	327	state->bg_tilemap = tilemap_create(machine, satansat_get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	328	state->fg_tilemap = tilemap_create(machine, satansat_get_fg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
306	329
307		gfx_element_set_source(machine->gfx[0], snk6502_charram);
	330	tilemap_set_transparent_pen(state->fg_tilemap, 0);
	331
	332	gfx_element_set_source(machine->gfx[0], state->charram);
308	333	}

src/mame/video/blstroid.c

r8962	r8963
90	90
91	91	static TIMER_CALLBACK( irq_off )
92	92	{
93		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	93	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
94	94
95	95	/* clear the interrupt */
96	96	atarigen_scanline_int_ack_w(space, 0, 0, 0xffff);

src/mame/video/harddriv.c

r8962	r8963
96	96	*
97	97	*************************************/
98	98
99		void hdgsp_write_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	99	void hdgsp_write_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
100	100	{
101	101	harddriv_state *state = space->machine->driver_data<harddriv_state>();
102	102
r8962	r8963
124	124	}
125	125
126	126
127		void hdgsp_read_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	127	void hdgsp_read_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
128	128	{
129	129	harddriv_state *state = space->machine->driver_data<harddriv_state>();
130	130

src/mame/video/snk68.c

r8962	r8963
13	13	***************************************************************************/
14	14
15	15	#include "emu.h"
	16	#include "includes/snk68.h"
16	17
17		UINT16* pow_fg_videoram;
18	18
19		static int sprite_flip_axis;
20		static tilemap_t *fg_tilemap;
21		static int flipscreen;
22		static UINT32 fg_tile_offset;
23
24	19	/***************************************************************************
25	20
26	21	Callbacks for the TileMap code
r8962	r8963
29	24
30	25	static TILE_GET_INFO( get_pow_tile_info )
31	26	{
32		int tile = fg_tile_offset + (pow_fg_videoram[2*tile_index] & 0xff);
33		int color = pow_fg_videoram[2*tile_index+1] & 0x07;
	27	snk68_state *state = machine->driver_data<snk68_state>();
	28	int tile = state->fg_tile_offset + (state->pow_fg_videoram[2*tile_index] & 0xff);
	29	int color = state->pow_fg_videoram[2*tile_index+1] & 0x07;
34	30
35	31	SET_TILE_INFO(0, tile, color, 0);
36	32	}
37	33
38	34	static TILE_GET_INFO( get_searchar_tile_info )
39	35	{
40		int data = pow_fg_videoram[2*tile_index];
	36	snk68_state *state = machine->driver_data<snk68_state>();
	37	int data = state->pow_fg_videoram[2*tile_index];
41	38	int tile = data & 0x7ff;
42	39	int color = (data & 0x7000) >> 12;
43	40
r8962	r8963
55	52
56	53	static void common_video_start(running_machine *machine)
57	54	{
58		tilemap_set_transparent_pen(fg_tilemap,0);
	55	snk68_state *state = machine->driver_data<snk68_state>();
59	56
60		tilemap_set_scrolldx(fg_tilemap, 0, machine->primary_screen->width() - 256);
61		tilemap_set_scrolldy(fg_tilemap, 0, machine->primary_screen->height() - 256);
	57	tilemap_set_transparent_pen(state->fg_tilemap, 0);
	58
	59	tilemap_set_scrolldx(state->fg_tilemap, 0, machine->primary_screen->width() - 256);
	60	tilemap_set_scrolldy(state->fg_tilemap, 0, machine->primary_screen->height() - 256);
62	61	}
63	62
64	63	VIDEO_START( pow )
65	64	{
66		fg_tilemap = tilemap_create(machine, get_pow_tile_info,tilemap_scan_cols,8,8,32,32);
67		fg_tile_offset = 0;
	65	snk68_state *state = machine->driver_data<snk68_state>();
68	66
	67	state->fg_tilemap = tilemap_create(machine, get_pow_tile_info, tilemap_scan_cols, 8, 8, 32, 32);
	68	state->fg_tile_offset = 0;
	69
69	70	common_video_start(machine);
70	71	}
71	72
72	73	VIDEO_START( searchar )
73	74	{
74		fg_tilemap = tilemap_create(machine, get_searchar_tile_info,tilemap_scan_cols,8,8,32,32);
	75	snk68_state *state = machine->driver_data<snk68_state>();
75	76
	77	state->fg_tilemap = tilemap_create(machine, get_searchar_tile_info, tilemap_scan_cols, 8, 8, 32, 32);
	78
76	79	common_video_start(machine);
77	80	}
78	81
r8962	r8963
84	87
85	88	READ16_HANDLER( pow_spriteram_r )
86	89	{
	90	snk68_state *state = space->machine->driver_data<snk68_state>();
	91
87	92	// streetsj expects the MSB of every 32-bit word to be FF. Presumably RAM
88	93	// exists only for 3 bytes out of 4 and the fourth is unmapped.
89	94	if (!(offset & 1))
90		return space->machine->generic.spriteram.u16[offset] | 0xff00;
	95	return state->spriteram[offset] | 0xff00;
91	96	else
92		return space->machine->generic.spriteram.u16[offset];
	97	return state->spriteram[offset];
93	98	}
94	99
95	100	WRITE16_HANDLER( pow_spriteram_w )
96	101	{
97		UINT16 *spriteram16 = space->machine->generic.spriteram.u16;
	102	snk68_state *state = space->machine->driver_data<snk68_state>();
	103	UINT16 *spriteram16 = state->spriteram;
98	104	UINT16 newword = spriteram16[offset];
99	105
100	106	if (!(offset & 1))
r8962	r8963
115	121
116	122	READ16_HANDLER( pow_fg_videoram_r )
117	123	{
	124	snk68_state *state = space->machine->driver_data<snk68_state>();
	125
118	126	// RAM is only 8-bit
119		return pow_fg_videoram[offset] | 0xff00;
	127	return state->pow_fg_videoram[offset] | 0xff00;
120	128	}
121	129
122	130	WRITE16_HANDLER( pow_fg_videoram_w )
123	131	{
	132	snk68_state *state = space->machine->driver_data<snk68_state>();
	133
124	134	data |= 0xff00;
125		COMBINE_DATA(&pow_fg_videoram[offset]);
126		tilemap_mark_tile_dirty(fg_tilemap, offset >> 1);
	135	COMBINE_DATA(&state->pow_fg_videoram[offset]);
	136	tilemap_mark_tile_dirty(state->fg_tilemap, offset >> 1);
127	137	}
128	138
129	139	WRITE16_HANDLER( searchar_fg_videoram_w )
130	140	{
	141	snk68_state *state = space->machine->driver_data<snk68_state>();
	142
131	143	// RAM is full 16-bit, though only half of it is used by the hardware
132		COMBINE_DATA(&pow_fg_videoram[offset]);
133		tilemap_mark_tile_dirty(fg_tilemap, offset >> 1);
	144	COMBINE_DATA(&state->pow_fg_videoram[offset]);
	145	tilemap_mark_tile_dirty(state->fg_tilemap, offset >> 1);
134	146	}
135	147
136	148	WRITE16_HANDLER( pow_flipscreen16_w )
137	149	{
138	150	if (ACCESSING_BITS_0_7)
139	151	{
140		flipscreen = data & 0x08;
141		tilemap_set_flip_all(space->machine, flipscreen ? (TILEMAP_FLIPX | TILEMAP_FLIPY) : 0);
	152	snk68_state *state = space->machine->driver_data<snk68_state>();
	153	state->flipscreen = data & 0x08;
	154	tilemap_set_flip_all(space->machine, state->flipscreen ? (TILEMAP_FLIPX | TILEMAP_FLIPY) : 0);
142	155
143		sprite_flip_axis = data & 0x04;   // for streetsm? though might not be present on this board
	156	state->sprite_flip_axis = data & 0x04;   // for streetsm? though might not be present on this board
144	157
145		if (fg_tile_offset != ((data & 0x70) << 4))
	158	if (state->fg_tile_offset != ((data & 0x70) << 4))
146	159	{
147		fg_tile_offset = (data & 0x70) << 4;
148		tilemap_mark_all_tiles_dirty(fg_tilemap);
	160	state->fg_tile_offset = (data & 0x70) << 4;
	161	tilemap_mark_all_tiles_dirty(state->fg_tilemap);
149	162	}
150	163	}
151	164	}
r8962	r8963
154	167	{
155	168	if (ACCESSING_BITS_0_7)
156	169	{
157		flipscreen = data & 0x08;
158		tilemap_set_flip_all(space->machine, flipscreen ? (TILEMAP_FLIPX | TILEMAP_FLIPY) : 0);
	170	snk68_state *state = space->machine->driver_data<snk68_state>();
159	171
160		sprite_flip_axis = data & 0x04;
	172	state->flipscreen = data & 0x08;
	173	tilemap_set_flip_all(space->machine, state->flipscreen ? (TILEMAP_FLIPX | TILEMAP_FLIPY) : 0);
	174
	175	state->sprite_flip_axis = data & 0x04;
161	176	}
162	177	}
163	178
164	179	WRITE16_HANDLER( pow_paletteram16_word_w )
165	180	{
	181	snk68_state *state = space->machine->driver_data<snk68_state>();
166	182	UINT16 newword;
167	183	int r,g,b;
168	184
169		COMBINE_DATA(&space->machine->generic.paletteram.u16[offset]);
170		newword = space->machine->generic.paletteram.u16[offset];
	185	COMBINE_DATA(&state->paletteram[offset]);
	186	newword = state->paletteram[offset];
171	187
172	188	r = ((newword >> 7) & 0x1e) | ((newword >> 14) & 0x01);
173	189	g = ((newword >> 3) & 0x1e) | ((newword >> 13) & 0x01) ;
r8962	r8963
185	201
186	202	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int group)
187	203	{
188		UINT16 *spriteram16 = machine->generic.spriteram.u16;
	204	snk68_state *state = machine->driver_data<snk68_state>();
	205	UINT16 *spriteram16 = state->spriteram;
	206	int flipscreen = state->flipscreen;
	207	int sprite_flip_axis = state->sprite_flip_axis;
189	208	const UINT16* tiledata = &spriteram16[0x800*group];
190	209
191	210	// pow has 0x4000 tiles and independent x/y flipping
r8962	r8963
271	290
272	291	VIDEO_UPDATE( pow )
273	292	{
	293	snk68_state *state = screen->machine->driver_data<snk68_state>();
	294
274	295	bitmap_fill(bitmap, cliprect, 0x7ff);
275	296
276	297	/* This appears to be the correct priority order */
r8962	r8963
278	299	draw_sprites(screen->machine, bitmap, cliprect, 3);
279	300	draw_sprites(screen->machine, bitmap, cliprect, 1);
280	301
281		tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
	302	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
282	303	return 0;
283	304	}

src/mame/video/vrender0.c

r8962	r8963
397	397	TILENAME(16,1,2),
398	398	};
399	399
400		#define Packet(i) memory_read_word(space, PacketPtr + 2 * i)
	400	#define Packet(i) space->read_word(PacketPtr + 2 * i)
401	401
402	402	//Returns TRUE if the operation was a flip (sync or async)
403	403	int vrender0_ProcessPacket(running_device *device, UINT32 PacketPtr, UINT16 *Dest, UINT8 *TEXTURE)
404	404	{
405	405	vr0video_state *vr0 = get_safe_token(device);
406		const address_space *space = cpu_get_address_space(vr0->cpu, ADDRESS_SPACE_PROGRAM);
	406	address_space *space = cpu_get_address_space(vr0->cpu, ADDRESS_SPACE_PROGRAM);
407	407	UINT32 Dx = Packet(1) & 0x3ff;
408	408	UINT32 Dy = Packet(2) & 0x1ff;
409	409	UINT32 Endx = Packet(3) & 0x3ff;

src/mame/video/srumbler.c

r8962	r8963
170	170
171	171	VIDEO_EOF( srumbler )
172	172	{
173		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	173	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
174	174
175	175	buffer_spriteram_w(space,0,0);
176	176	}

src/mame/video/tigeroad.c

r8962	r8963
165	165
166	166	VIDEO_EOF( tigeroad )
167	167	{
168		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	168	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
169	169
170	170	buffer_spriteram16_w(space, 0, 0, 0xffff);
171	171	}

src/mame/video/segas32.c

r8962	r8963
433	433	}
434	434
435	435
436		static void common_paletteram_w(const address_space *space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
	436	static void common_paletteram_w(address_space *space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
437	437	{
438	438	UINT16 value;
439	439	int convert;
r8962	r8963
1900	1900	int spritenum = 0;
1901	1901	UINT16 *sprite;
1902	1902
1903		profiler_mark_start(PROFILER_USER2);
	1903	g_profiler.start(PROFILER_USER2);
1904	1904
1905	1905	logerror("----\n");
1906	1906
r8962	r8963
1971	1971	}
1972	1972	}
1973	1973
1974		profiler_mark_end();
	1974	g_profiler.stop();
1975	1975	}
1976	1976
1977	1977
r8962	r8963
2460	2460	}
2461	2461
2462	2462	/* update the tilemaps */
2463		profiler_mark_start(PROFILER_USER1);
	2463	g_profiler.start(PROFILER_USER1);
2464	2464	enablemask = update_tilemaps(*screen, cliprect);
2465		profiler_mark_end();
	2465	g_profiler.stop();
2466	2466
2467	2467	/* debugging */
2468	2468	#if QWERTY_LAYER_ENABLE
r8962	r8963
2475	2475	#endif
2476	2476
2477	2477	/* do the mixing */
2478		profiler_mark_start(PROFILER_USER3);
	2478	g_profiler.start(PROFILER_USER3);
2479	2479	mix_all_layers(0, 0, bitmap, cliprect, enablemask);
2480		profiler_mark_end();
	2480	g_profiler.stop();
2481	2481
2482	2482	if (LOG_SPRITES && input_code_pressed(screen->machine, KEYCODE_L))
2483	2483	{
r8962	r8963
2640	2640	}
2641	2641
2642	2642	/* update the tilemaps */
2643		profiler_mark_start(PROFILER_USER1);
	2643	g_profiler.start(PROFILER_USER1);
2644	2644	enablemask = update_tilemaps(*screen, cliprect);
2645		profiler_mark_end();
	2645	g_profiler.stop();
2646	2646
2647	2647	/* debugging */
2648	2648	#if QWERTY_LAYER_ENABLE
r8962	r8963
2655	2655	#endif
2656	2656
2657	2657	/* do the mixing */
2658		profiler_mark_start(PROFILER_USER3);
	2658	g_profiler.start(PROFILER_USER3);
2659	2659	mix_all_layers(((screen == left_screen) ? 0 : 1), 0, bitmap, cliprect, enablemask);
2660		profiler_mark_end();
	2660	g_profiler.stop();
2661	2661
2662	2662	if (PRINTF_MIXER_DATA)
2663	2663	{

src/mame/video/psikyosh.c

r8962	r8963
438	438	cache_bitmap(tilemap_scanline, state, gfx, size, tilebank, alpha, last_bank);
439	439
440	440	/* zoomy and 'wibbly' effects - extract an entire row from tilemap */
441		profiler_mark_start(PROFILER_USER2);
	441	g_profiler.start(PROFILER_USER2);
442	442	UINT32 tilemap_line[32 * 16];
443	443	UINT32 scr_line[64 * 8];
444	444	extract_scanline32(state->bg_bitmap, 0, tilemap_scanline, width, tilemap_line);
445		profiler_mark_end();
	445	g_profiler.stop();
446	446
447	447	/* slow bit, needs optimising. apply scrollx and zoomx by assembling scanline from row */
448		profiler_mark_start(PROFILER_USER3);
	448	g_profiler.start(PROFILER_USER3);
449	449	if(zoom) {
450	450	int step = state->bg_zoom[zoom];
451	451	int jj = 0x400 << 10; // ensure +ve for mod
r8962	r8963
459	459	scr_line[ii] = tilemap_line[(ii - scrollx + 0x400) % width];
460	460	}
461	461	}
462		profiler_mark_end();
	462	g_profiler.stop();
463	463
464	464	/* blend line into output */
465		profiler_mark_start(PROFILER_USER4);
	465	g_profiler.start(PROFILER_USER4);
466	466	if(alpha == 0xff) {
467	467	draw_scanline32_transpen(bitmap, 0, scanline, scr_width, scr_line);
468	468	}
r8962	r8963
472	472	else if (alpha < 0) {
473	473	draw_scanline32_argb(bitmap, 0, scanline, scr_width, scr_line);
474	474	}
475		profiler_mark_end();
	475	g_profiler.stop();
476	476	}
477	477	}
478	478
r8962	r8963
542	542	if (!zoomx || !zoomy)
543	543	return;
544	544
545		profiler_mark_start(PROFILER_DRAWGFX);
	545	g_profiler.start(PROFILER_DRAWGFX);
546	546
547	547	assert(dest_bmp->bpp == 32);
548	548
r8962	r8963
1065	1065	}
1066	1066	}
1067	1067	}
1068		profiler_mark_end();
	1068	g_profiler.stop();
1069	1069	}
1070	1070
1071	1071
r8962	r8963
1203	1203
1204	1204	assert(bitmap->bpp == 32);
1205	1205
1206		profiler_mark_start(PROFILER_USER8);
	1206	g_profiler.start(PROFILER_USER8);
1207	1207	for (y = cliprect->min_y; y <= cliprect->max_y; y += 1) {
1208	1208
1209	1209	dstline = BITMAP_ADDR32(bitmap, y, 0);
r8962	r8963
1212	1212	for (x = cliprect->min_x; x <= cliprect->max_x; x += 1)
1213	1213	dstline[x] = linefill[y] >> 8;
1214	1214	}
1215		profiler_mark_end();
	1215	g_profiler.stop();
1216	1216	}
1217	1217
1218	1218
r8962	r8963
1231	1231	return;
1232	1232	}
1233	1233
1234		profiler_mark_start(PROFILER_USER8);
	1234	g_profiler.start(PROFILER_USER8);
1235	1235	for (y = cliprect->min_y; y <= cliprect->max_y; y += 1) {
1236	1236
1237	1237	dstline = BITMAP_ADDR32(bitmap, y, 0);
r8962	r8963
1247	1247	dstline[x] = alpha_blend_r32(dstline[x], lineblend[y] >> 8, 2 * (lineblend[y] & 0x7f));
1248	1248	}
1249	1249	}
1250		profiler_mark_end();
	1250	g_profiler.stop();
1251	1251	}
1252	1252
1253	1253
r8962	r8963
1342	1342
1343	1343	VIDEO_EOF( psikyosh )
1344	1344	{
1345		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1345	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1346	1346	buffer_spriteram32_w(space, 0, 0, 0xffffffff);
1347	1347	}
1348	1348

src/mame/video/combatsc.c

r8962	r8963
517	517
518	518	static void bootleg_draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, const UINT8 *source, int circuit )
519	519	{
520		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	520	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
521	521	const gfx_element *gfx = machine->gfx[circuit + 2];
522	522
523		int limit = circuit ? (memory_read_byte(space, 0xc2) * 256 + memory_read_byte(space, 0xc3)) : (memory_read_byte(space, 0xc0) * 256 + memory_read_byte(space, 0xc1));
	523	int limit = circuit ? (space->read_byte(0xc2) * 256 + space->read_byte(0xc3)) : (space->read_byte(0xc0) * 256 + space->read_byte(0xc1));
524	524	const UINT8 *finish;
525	525
526	526	source += 0x1000;
r8962	r8963
552	552	//          if(state->vreg == 0x23 && (attributes & 0x02)) color += 1*16;
553	553	//          if(state->vreg == 0x66 ) color += 2*16;
554	554
555		drawgfx_transpen( bitmap, cliprect, gfx,
556		number, color,
557		attributes & 0x10,0, /* flip */
558		x,y, 15 );
	555	drawgfx_transpen(   bitmap, cliprect, gfx,
	556	number, color,
	557	attributes & 0x10,0, /* flip */
	558	x, y, 15 );
559	559	}
560	560	source -= 8;
561	561	}
r8962	r8963
573	573	tilemap_set_scrollx(state->bg_tilemap[0], i, state->io_ram[0x040 + i] + 5);
574	574	tilemap_set_scrollx(state->bg_tilemap[1], i, state->io_ram[0x060 + i] + 3);
575	575	}
576		tilemap_set_scrolly(state->bg_tilemap[0], 0, state->io_ram[0x000]);
577		tilemap_set_scrolly(state->bg_tilemap[1], 0, state->io_ram[0x020]);
	576	tilemap_set_scrolly(state->bg_tilemap[0], 0, state->io_ram[0x000] + 1);
	577	tilemap_set_scrolly(state->bg_tilemap[1], 0, state->io_ram[0x020] + 1);
578	578
579	579	if (state->priority == 0)
580	580	{
581		tilemap_draw(bitmap, cliprect, state->bg_tilemap[1], TILEMAP_DRAW_OPAQUE,0);
582		bootleg_draw_sprites(screen->machine, bitmap,cliprect, state->page[1], 1);
583
	581	tilemap_draw(bitmap, cliprect, state->bg_tilemap[1], TILEMAP_DRAW_OPAQUE, 0);
	582	bootleg_draw_sprites(screen->machine, bitmap,cliprect, state->page[0], 0);
584	583	tilemap_draw(bitmap, cliprect, state->bg_tilemap[0], 0 ,0);
585		bootleg_draw_sprites(screen->machine, bitmap, cliprect, state->page[0], 0);
	584	bootleg_draw_sprites(screen->machine, bitmap,cliprect, state->page[1], 1);
586	585	}
587	586	else
588	587	{
589	588	tilemap_draw(bitmap, cliprect, state->bg_tilemap[0], TILEMAP_DRAW_OPAQUE, 0);
590	589	bootleg_draw_sprites(screen->machine, bitmap,cliprect, state->page[0], 0);
591
592		tilemap_draw(bitmap,cliprect, state->bg_tilemap[1], 0, 0);
	590	tilemap_draw(bitmap, cliprect, state->bg_tilemap[1], 0, 0);
593	591	bootleg_draw_sprites(screen->machine, bitmap,cliprect, state->page[1], 1);
594	592	}
595	593

src/mame/video/ppu2c0x.c

r8962	r8963
76	76	typedef struct _ppu2c0x_state  ppu2c0x_state;
77	77	struct _ppu2c0x_state
78	78	{
79		address_space       *space;               /* memory space */
	79	address_space      *space;               /* memory space */
80	80	bitmap_t                    *bitmap;         /* target bitmap */
81	81	UINT8                       *spriteram;         /* sprite ram */
82	82	pen_t                       *colortable;         /* color table modified at run time */

src/mame/video/buggychl.c

r8962	r8963
170	170	int offs;
171	171	const UINT8 *gfx;
172	172
173		profiler_mark_start(PROFILER_USER1);
	173	g_profiler.start(PROFILER_USER1);
174	174
175	175	gfx = memory_region(machine, "gfx2");
176	176	for (offs = 0; offs < state->spriteram_size; offs += 4)
r8962	r8963
232	232	}
233	233	}
234	234
235		profiler_mark_end();
	235	g_profiler.stop();
236	236	}
237	237
238	238

src/mame/video/homedata.c

r8962	r8963
32	32
33	33	***************************************************************************/
34	34
35		static void mrokumei_handleblit( const address_space *space, int rom_base )
	35	static void mrokumei_handleblit( address_space *space, int rom_base )
36	36	{
37	37	homedata_state *state = space->machine->driver_data<homedata_state>();
38	38	int i;
r8962	r8963
119	119	cpu_set_input_line(state->maincpu, M6809_FIRQ_LINE, HOLD_LINE);
120	120	}
121	121
122		static void reikaids_handleblit( const address_space *space, int rom_base )
	122	static void reikaids_handleblit( address_space *space, int rom_base )
123	123	{
124	124	homedata_state *state = space->machine->driver_data<homedata_state>();
125	125	int i;
r8962	r8963
217	217	cpu_set_input_line(state->maincpu, M6809_FIRQ_LINE, HOLD_LINE);
218	218	}
219	219
220		static void pteacher_handleblit( const address_space *space, int rom_base )
	220	static void pteacher_handleblit( address_space *space, int rom_base )
221	221	{
222	222	homedata_state *state = space->machine->driver_data<homedata_state>();
223	223	int i;

src/mame/video/hng64.c

r8962	r8963
1	1	#include "emu.h"
	2	#include "drawgfxm.h"
2	3	#include "includes/hng64.h"
3	4
4		#include "drawgfxm.h"
5
6	5	#define MAKE_MAME_REEEEAAALLLL_SLOW 0
7	6
8		static UINT8 additive_tilemap_debug;
9	7
10		UINT32* hng64_videoram;
11		static tilemap_t *hng64_tilemap0_8x8;
12		static tilemap_t *hng64_tilemap1_8x8;
13		static tilemap_t *hng64_tilemap2_8x8;
14		static tilemap_t *hng64_tilemap3_8x8;
15
16		static tilemap_t *hng64_tilemap0_16x16;
17		static tilemap_t *hng64_tilemap1_16x16;
18		static tilemap_t *hng64_tilemap2_16x16;
19		static tilemap_t *hng64_tilemap3_16x16;
20
21		static tilemap_t *hng64_tilemap0_16x16_alt;
22		static tilemap_t *hng64_tilemap1_16x16_alt;
23		static tilemap_t *hng64_tilemap2_16x16_alt;
24		static tilemap_t *hng64_tilemap3_16x16_alt;
25
26		UINT32 *hng64_spriteram;
27		UINT32 *hng64_videoregs;
28		UINT32 *hng64_spriteregs;
29		UINT32 *hng64_3dregs;
30		UINT32 *hng64_tcram;
31
32		UINT8 hng64_screen_dis;
33
34		// 3d display buffers
35		// (Temporarily global - someday they will live with the proper bit-depth in the memory map)
36		static float* depthBuffer3d;
37		static UINT32* colorBuffer3d;
38	8	static void clear3d(running_machine *machine);   // TODO: Inline
39	9
40	10
41		static void hng64_mark_all_tiles_dirty( int tilemap )
	11	static void hng64_mark_all_tiles_dirty( hng64_state *state, int tilemap )
42	12	{
43	13	if (tilemap == 0)
44	14	{
45		tilemap_mark_all_tiles_dirty (hng64_tilemap0_8x8);
46		tilemap_mark_all_tiles_dirty (hng64_tilemap0_16x16);
47		tilemap_mark_all_tiles_dirty (hng64_tilemap0_16x16_alt);
	15	tilemap_mark_all_tiles_dirty (state->tilemap0_8x8);
	16	tilemap_mark_all_tiles_dirty (state->tilemap0_16x16);
	17	tilemap_mark_all_tiles_dirty (state->tilemap0_16x16_alt);
48	18	}
49	19	else if (tilemap == 1)
50	20	{
51		tilemap_mark_all_tiles_dirty (hng64_tilemap1_8x8);
52		tilemap_mark_all_tiles_dirty (hng64_tilemap1_16x16);
53		tilemap_mark_all_tiles_dirty (hng64_tilemap1_16x16_alt);
	21	tilemap_mark_all_tiles_dirty (state->tilemap1_8x8);
	22	tilemap_mark_all_tiles_dirty (state->tilemap1_16x16);
	23	tilemap_mark_all_tiles_dirty (state->tilemap1_16x16_alt);
54	24	}
55	25	else if (tilemap == 2)
56	26	{
57		tilemap_mark_all_tiles_dirty (hng64_tilemap2_8x8);
58		tilemap_mark_all_tiles_dirty (hng64_tilemap2_16x16);
59		tilemap_mark_all_tiles_dirty (hng64_tilemap2_16x16_alt);
	27	tilemap_mark_all_tiles_dirty (state->tilemap2_8x8);
	28	tilemap_mark_all_tiles_dirty (state->tilemap2_16x16);
	29	tilemap_mark_all_tiles_dirty (state->tilemap2_16x16_alt);
60	30	}
61	31	else if (tilemap == 3)
62	32	{
63		tilemap_mark_all_tiles_dirty (hng64_tilemap3_8x8);
64		tilemap_mark_all_tiles_dirty (hng64_tilemap3_16x16);
65		tilemap_mark_all_tiles_dirty (hng64_tilemap3_16x16_alt);
	33	tilemap_mark_all_tiles_dirty (state->tilemap3_8x8);
	34	tilemap_mark_all_tiles_dirty (state->tilemap3_16x16);
	35	tilemap_mark_all_tiles_dirty (state->tilemap3_16x16_alt);
66	36	}
67	37	}
68	38
69		static void hng64_mark_tile_dirty( int tilemap, int tile_index )
	39	static void hng64_mark_tile_dirty( hng64_state *state, int tilemap, int tile_index )
70	40	{
71	41	if (tilemap == 0)
72	42	{
73		tilemap_mark_tile_dirty(hng64_tilemap0_8x8,tile_index);
74		tilemap_mark_tile_dirty(hng64_tilemap0_16x16,tile_index);
75		tilemap_mark_tile_dirty(hng64_tilemap0_16x16_alt,tile_index);
	43	tilemap_mark_tile_dirty(state->tilemap0_8x8, tile_index);
	44	tilemap_mark_tile_dirty(state->tilemap0_16x16, tile_index);
	45	tilemap_mark_tile_dirty(state->tilemap0_16x16_alt, tile_index);
76	46	}
77	47	else if (tilemap == 1)
78	48	{
79		tilemap_mark_tile_dirty(hng64_tilemap1_8x8,tile_index);
80		tilemap_mark_tile_dirty(hng64_tilemap1_16x16,tile_index);
81		tilemap_mark_tile_dirty(hng64_tilemap1_16x16_alt,tile_index);
	49	tilemap_mark_tile_dirty(state->tilemap1_8x8, tile_index);
	50	tilemap_mark_tile_dirty(state->tilemap1_16x16, tile_index);
	51	tilemap_mark_tile_dirty(state->tilemap1_16x16_alt, tile_index);
82	52	}
83	53	else if (tilemap == 2)
84	54	{
85		tilemap_mark_tile_dirty(hng64_tilemap2_8x8,tile_index);
86		tilemap_mark_tile_dirty(hng64_tilemap2_16x16,tile_index);
87		tilemap_mark_tile_dirty(hng64_tilemap2_16x16_alt,tile_index);
	55	tilemap_mark_tile_dirty(state->tilemap2_8x8, tile_index);
	56	tilemap_mark_tile_dirty(state->tilemap2_16x16, tile_index);
	57	tilemap_mark_tile_dirty(state->tilemap2_16x16_alt, tile_index);
88	58	}
89	59	else if (tilemap == 3)
90	60	{
91		tilemap_mark_tile_dirty(hng64_tilemap3_8x8,tile_index);
92		tilemap_mark_tile_dirty(hng64_tilemap3_16x16,tile_index);
93		tilemap_mark_tile_dirty(hng64_tilemap3_16x16_alt,tile_index);
	61	tilemap_mark_tile_dirty(state->tilemap3_8x8, tile_index);
	62	tilemap_mark_tile_dirty(state->tilemap3_16x16, tile_index);
	63	tilemap_mark_tile_dirty(state->tilemap3_16x16_alt, tile_index);
94	64	}
95	65	}
96	66
r8962	r8963
239	209
240	210	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
241	211	{
	212	hng64_state *state = machine->driver_data<hng64_state>();
242	213	const gfx_element *gfx;
243		UINT32 *source = hng64_spriteram;
244		UINT32 *finish = hng64_spriteram + 0xc000/4;
	214	UINT32 *source = state->spriteram;
	215	UINT32 *finish = state->spriteram + 0xc000/4;
245	216
246	217	// global offsets in sprite regs
247		int   spriteoffsx = (hng64_spriteregs[1]>>0)&0xffff;
248		int spriteoffsy = (hng64_spriteregs[1]>>16)&0xffff;
	218	int spriteoffsx = (state->spriteregs[1]>>0)&0xffff;
	219	int spriteoffsy = (state->spriteregs[1]>>16)&0xffff;
249	220
250		//  for (int iii = 0; iii < 0x0f; iii++)
251		//      mame_printf_debug("%.8x ", hng64_videoregs[iii]);
	221	#if 0
	222	for (int iii = 0; iii < 0x0f; iii++)
	223	mame_printf_debug("%.8x ", state->videoregs[iii]);
	224	mame_printf_debug("\n");
	225	#endif
252	226
253		//  mame_printf_debug("\n");
254
255	227	while( source<finish )
256	228	{
257	229	int tileno,chainx,chainy,xflip;
r8962	r8963
301	273	continue;
302	274	}
303	275
	276	#if 0
	277	if (!(source[4] == 0x00000000 || source[4] == 0x000000aa))
	278	mame_printf_debug("unknown : %.8x %.8x %.8x %.8x %.8x %.8x %.8x %.8x \n", source[0], source[1], source[2], source[3],
	279	source[4], source[5], source[6], source[7]);
	280	#endif
304	281
305		//      if (!(source[4] == 0x00000000 || source[4] == 0x000000aa))
306		//          mame_printf_debug("unknown : %.8x %.8x %.8x %.8x %.8x %.8x %.8x %.8x \n", source[0], source[1], source[2], source[3],
307		//                                                                         source[4], source[5], source[6], source[7]);
308
309	282	/* Calculate the zoom */
310	283	{
311	284	int zoom_factor;
312	285
313	286	/* FIXME: regular zoom mode has precision bugs, can be easily seen in Samurai Shodown 64 intro */
314		zoom_factor = (hng64_spriteregs[0] & 0x08000000) ? 0x1000 : 0x100;
	287	zoom_factor = (state->spriteregs[0] & 0x08000000) ? 0x1000 : 0x100;
315	288	if(!zoomx) zoomx=zoom_factor;
316	289	if(!zoomy) zoomy=zoom_factor;
317	290
r8962	r8963
326	299	zoomy += (int)((foomY - floor(foomY)) * (float)0x10000);
327	300	}
328	301
329		if (hng64_spriteregs[0] & 0x00800000) //bpp switch
	302	if (state->spriteregs[0] & 0x00800000) //bpp switch
330	303	{
331	304	gfx= machine->gfx[4];
332	305	}
r8962	r8963
358	331	yinc=(int)(16.0f*foomY);
359	332	}
360	333
	334	#if 0
	335	if (((source[2] & 0xffff0000) >> 16) == 0x0001)
	336	{
	337	popmessage("T %.8x %.8x %.8x %.8x %.8x", source[0], source[1], source[2], source[3], source[4]);
	338	//popmessage("T %.8x %.8x %.8x %.8x %.8x", source[0], source[1], source[2], source[3], source[4]);
	339	}
	340	#endif
361	341
362		//      if (((source[2] & 0xffff0000) >> 16) == 0x0001)
363		//      {
364		//          popmessage("T %.8x %.8x %.8x %.8x %.8x", source[0], source[1], source[2], source[3], source[4]);
365		//          // popmessage("T %.8x %.8x %.8x %.8x %.8x", source[0], source[1], source[2], source[3], source[4]);
366		//      }
367
368	342	for(ydrw=0;ydrw<=chainy;ydrw++)
369	343	{
370	344	for(xdrw=0;xdrw<=chainx;xdrw++)
r8962	r8963
391	365	tileno=(source[4]&0x0007ffff);
392	366	pal =(source[3]&0x00ff0000)>>16;
393	367
394		if (hng64_spriteregs[0] & 0x00800000) //bpp switch
	368	if (state->spriteregs[0] & 0x00800000) //bpp switch
395	369	{
396	370	gfx= machine->gfx[4];
397	371	}
r8962	r8963
457	431	*/
458	432
459	433	/* this is broken for the 'How to Play' screen in Buriki after attract, disabled for now */
460		static void transition_control(bitmap_t *bitmap, const rectangle *cliprect)
	434	static void transition_control(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
461	435	{
	436	hng64_state *state = machine->driver_data<hng64_state>();
	437	UINT32 *hng64_tcram = state->tcram;
462	438	int i, j;
463	439
464	440	//  float colorScaleR, colorScaleG, colorScaleB;
r8962	r8963
489	465	finG = (INT32)RGB_GREEN(*thePixel);
490	466	finB = (INT32)RGB_BLUE(*thePixel);
491	467
492		/*
493		// Apply the darkening pass (0x07)...
494		colorScaleR = 1.0f - (float)( hng64_tcram[0x00000007] & 0xff)        / 255.0f;
495		colorScaleG = 1.0f - (float)((hng64_tcram[0x00000007] >> 8)  & 0xff) / 255.0f;
496		colorScaleB = 1.0f - (float)((hng64_tcram[0x00000007] >> 16) & 0xff) / 255.0f;
	468	#if 0
	469	// Apply the darkening pass (0x07)...
	470	colorScaleR = 1.0f - (float)( hng64_tcram[0x00000007] & 0xff)        / 255.0f;
	471	colorScaleG = 1.0f - (float)((hng64_tcram[0x00000007] >> 8)  & 0xff) / 255.0f;
	472	colorScaleB = 1.0f - (float)((hng64_tcram[0x00000007] >> 16) & 0xff) / 255.0f;
497	473
498		finR = ((float)RGB_RED(*thePixel)   * colorScaleR);
499		finG = ((float)RGB_GREEN(*thePixel) * colorScaleG);
500		finB = ((float)RGB_BLUE(*thePixel)  * colorScaleB);
	474	finR = ((float)RGB_RED(*thePixel)   * colorScaleR);
	475	finG = ((float)RGB_GREEN(*thePixel) * colorScaleG);
	476	finB = ((float)RGB_BLUE(*thePixel)  * colorScaleB);
501	477
502	478
503		// Apply the lightening pass (0x0a)...
504		colorScaleR = 1.0f + (float)( hng64_tcram[0x0000000a] & 0xff)        / 255.0f;
505		colorScaleG = 1.0f + (float)((hng64_tcram[0x0000000a] >> 8)  & 0xff) / 255.0f;
506		colorScaleB = 1.0f + (float)((hng64_tcram[0x0000000a] >> 16) & 0xff) / 255.0f;
	479	// Apply the lightening pass (0x0a)...
	480	colorScaleR = 1.0f + (float)( hng64_tcram[0x0000000a] & 0xff)        / 255.0f;
	481	colorScaleG = 1.0f + (float)((hng64_tcram[0x0000000a] >> 8)  & 0xff) / 255.0f;
	482	colorScaleB = 1.0f + (float)((hng64_tcram[0x0000000a] >> 16) & 0xff) / 255.0f;
507	483
508		finR *= colorScaleR;
509		finG *= colorScaleG;
510		finB *= colorScaleB;
	484	finR *= colorScaleR;
	485	finG *= colorScaleG;
	486	finB *= colorScaleB;
511	487
512	488
513		// Clamp
514		if (finR > 255.0f) finR = 255.0f;
515		if (finG > 255.0f) finG = 255.0f;
516		if (finB > 255.0f) finB = 255.0f;
517		*/
	489	// Clamp
	490	if (finR > 255.0f) finR = 255.0f;
	491	if (finG > 255.0f) finG = 255.0f;
	492	if (finB > 255.0f) finB = 255.0f;
	493	#endif
518	494
519	495
520	496	// Subtractive fading
r8962	r8963
553	529	// pppppppp ff--atttt tttttttt tttttttt
554	530	#define HNG64_GET_TILE_INFO                                                    \
555	531	{                                                                              \
556		UINT16 tilemapinfo = (hng64_videoregs[reg]>>shift)&0xffff;                 \
	532	hng64_state *state = machine->driver_data<hng64_state>();                 \
	533	UINT16 tilemapinfo = (state->videoregs[reg]>>shift)&0xffff;                 \
557	534	int tileno,pal, flip;                                                      \
558	535	\
559		tileno = hng64_videoram[tile_index+(offset/4)];                            \
	536	tileno = state->videoram[tile_index+(offset/4)];                            \
560	537	\
561	538	pal = (tileno&0xff000000)>>24;                                             \
562	539	flip =(tileno&0x00c00000)>>22;                                             \
563	540	\
564	541	if (tileno&0x200000)                                                       \
565	542	{                                                                          \
566		tileno = (tileno & hng64_videoregs[0x0b]) | hng64_videoregs[0x0c];     \
	543	tileno = (tileno & state->videoregs[0x0b]) | state->videoregs[0x0c];     \
567	544	}                                                                          \
568	545	\
569	546	tileno &= 0x1fffff;                                                        \
r8962	r8963
676	653
677	654	WRITE32_HANDLER( hng64_videoram_w )
678	655	{
	656	hng64_state *state = space->machine->driver_data<hng64_state>();
679	657	int realoff;
680		COMBINE_DATA(&hng64_videoram[offset]);
681	658
	659	COMBINE_DATA(&state->videoram[offset]);
	660
682	661	realoff = offset*4;
683	662
684	663	if ((realoff>=0) && (realoff<0x10000))
685	664	{
686		hng64_mark_tile_dirty(0,offset&0x3fff);
	665	hng64_mark_tile_dirty(state, 0, offset&0x3fff);
687	666	}
688	667	else if ((realoff>=0x10000) && (realoff<0x20000))
689	668	{
690		hng64_mark_tile_dirty(1,offset&0x3fff);
	669	hng64_mark_tile_dirty(state, 1, offset&0x3fff);
691	670	}
692	671	else if ((realoff>=0x20000) && (realoff<0x30000))
693	672	{
694		hng64_mark_tile_dirty(2,offset&0x3fff);
	673	hng64_mark_tile_dirty(state, 2, offset&0x3fff);
695	674	}
696	675	else if ((realoff>=0x30000) && (realoff<0x40000))
697	676	{
698		hng64_mark_tile_dirty(3,offset&0x3fff);
	677	hng64_mark_tile_dirty(state, 3, offset&0x3fff);
699	678	}
700	679
701	680	//  if ((realoff>=0x40000)) mame_printf_debug("offsw %08x %08x\n",realoff,data);
r8962	r8963
1004	983	//if (!tmap->enable)
1005	984	//  return;
1006	985
1007		profiler_mark_start(PROFILER_TILEMAP_DRAW_ROZ);
	986	g_profiler.start(PROFILER_TILEMAP_DRAW_ROZ);
1008	987	/* configure the blit parameters */
1009	988	hng64_configure_blit_parameters(&blit, tmap, dest, cliprect, flags, priority, priority_mask, drawformat);
1010	989
r8962	r8963
1013	992
1014	993	/* then do the roz copy */
1015	994	hng64_tilemap_draw_roz_core(machine, tmap, &blit, startx, starty, incxx, incxy, incyx, incyy, wraparound);
1016		profiler_mark_end();
	995	g_profiler.stop();
1017	996	}
1018	997
1019	998
r8962	r8963
1028	1007
1029	1008	static void hng64_drawtilemap(running_machine* machine, bitmap_t *bitmap, const rectangle *cliprect, int tm )
1030	1009	{
	1010	hng64_state *state = machine->driver_data<hng64_state>();
	1011	UINT32 *hng64_videoregs = state->videoregs;
	1012	UINT32 *hng64_videoram = state->videoram;
1031	1013	tilemap_t* tilemap = 0;
1032	1014	UINT32 scrollbase = 0;
1033	1015	UINT32 tileregs = 0;
r8962	r8963
1038	1020
1039	1021	int global_dimensions = (global_tileregs&0x03000000)>>24;
1040	1022
1041		if ( (additive_tilemap_debug&(1 << tm)))
	1023	if ( (state->additive_tilemap_debug&(1 << tm)))
1042	1024	debug_blend_enabled = 1;
1043	1025
1044	1026	if ((global_dimensions != 0) && (global_dimensions != 3))
r8962	r8963
1051	1033
1052	1034	if (global_dimensions==0)
1053	1035	{
1054		if (tileregs&0x0200)   tilemap = hng64_tilemap0_16x16;
1055		else tilemap = hng64_tilemap0_8x8;
	1036	if (tileregs&0x0200)   tilemap = state->tilemap0_16x16;
	1037	else tilemap = state->tilemap0_8x8;
1056	1038	}
1057	1039	else
1058	1040	{
1059		if (tileregs&0x0200)   tilemap = hng64_tilemap0_16x16_alt;
1060		else tilemap = hng64_tilemap0_8x8; // _alt
	1041	if (tileregs&0x0200)   tilemap = state->tilemap0_16x16_alt;
	1042	else tilemap = state->tilemap0_8x8; // _alt
1061	1043	}
1062	1044	}
1063	1045	else if (tm==1)
r8962	r8963
1067	1049
1068	1050	if (global_dimensions==0)
1069	1051	{
1070		if (tileregs&0x0200)   tilemap = hng64_tilemap1_16x16;
1071		else tilemap = hng64_tilemap1_8x8;
	1052	if (tileregs&0x0200)   tilemap = state->tilemap1_16x16;
	1053	else tilemap = state->tilemap1_8x8;
1072	1054	}
1073	1055	else
1074	1056	{
1075		if (tileregs&0x0200)   tilemap = hng64_tilemap1_16x16_alt;
1076		else tilemap = hng64_tilemap1_8x8; // _alt
	1057	if (tileregs&0x0200)   tilemap = state->tilemap1_16x16_alt;
	1058	else tilemap = state->tilemap1_8x8; // _alt
1077	1059	}
1078	1060	}
1079	1061	else if (tm==2)
r8962	r8963
1083	1065
1084	1066	if (global_dimensions==0)
1085	1067	{
1086		if (tileregs&0x0200)   tilemap = hng64_tilemap2_16x16;
1087		else tilemap = hng64_tilemap2_8x8;
	1068	if (tileregs&0x0200)   tilemap = state->tilemap2_16x16;
	1069	else tilemap = state->tilemap2_8x8;
1088	1070	}
1089	1071	else
1090	1072	{
1091		if (tileregs&0x0200)   tilemap = hng64_tilemap2_16x16_alt;
1092		else tilemap = hng64_tilemap2_8x8; // _alt
	1073	if (tileregs&0x0200)   tilemap = state->tilemap2_16x16_alt;
	1074	else tilemap = state->tilemap2_8x8; // _alt
1093	1075	}
1094	1076	}
1095	1077	else if (tm==3)
r8962	r8963
1099	1081
1100	1082	if (global_dimensions==0)
1101	1083	{
1102		if (tileregs&0x0200)   tilemap = hng64_tilemap3_16x16;
1103		else tilemap = hng64_tilemap3_8x8;
	1084	if (tileregs&0x0200)   tilemap = state->tilemap3_16x16;
	1085	else tilemap = state->tilemap3_8x8;
1104	1086	}
1105	1087	else
1106	1088	{
1107		if (tileregs&0x0200)   tilemap = hng64_tilemap3_16x16_alt;
1108		else tilemap = hng64_tilemap3_8x8; // _alt
	1089	if (tileregs&0x0200)   tilemap = state->tilemap3_16x16_alt;
	1090	else tilemap = state->tilemap3_8x8; // _alt
1109	1091	}
1110	1092	}
1111	1093
r8962	r8963
1462	1444
1463	1445
1464	1446
1465		static UINT32 old_animmask = -1;
1466		static UINT32 old_animbits = -1;
1467		static UINT16 old_tileflags0 = -1;
1468		static UINT16 old_tileflags1 = -1;
1469		static UINT16 old_tileflags2 = -1;
1470		static UINT16 old_tileflags3 = -1;
1471
1472	1447	#define IMPORTANT_DIRTY_TILEFLAG_MASK (0x0600)
1473	1448
1474	1449	VIDEO_UPDATE( hng64 )
1475	1450	{
	1451	hng64_state *state = screen->machine->driver_data<hng64_state>();
	1452	UINT32 *hng64_videoregs = state->videoregs;
	1453	UINT32 *hng64_videoram = state->videoram;
	1454	UINT32 *hng64_tcram = state->tcram;
1476	1455	UINT32 animmask;
1477	1456	UINT32 animbits;
1478	1457	UINT16 tileflags0, tileflags1;
r8962	r8963
1484	1463	// but it could be useful
1485	1464	if ( input_code_pressed_once(screen->machine, KEYCODE_L) )
1486	1465	{
1487		const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1488		memory_write_byte(space, 0x2f27c8, 0x2);
	1466	address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1467	space->write_byte(0x2f27c8, 0x2);
1489	1468	}
1490	1469	#endif
1491	1470
1492	1471	bitmap_fill(bitmap, 0, hng64_tcram[0x50/4] & 0x10000 ? get_black_pen(screen->machine) : screen->machine->pens[0]); //FIXME: Is the register correct? check with HW tests
1493	1472	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0x00);
1494	1473
1495		if(hng64_screen_dis)
	1474	if (state->screen_dis)
1496	1475	return 0;
1497	1476
1498	1477	animmask = hng64_videoregs[0x0b];
r8962	r8963
1503	1482	tileflags3 = hng64_videoregs[0x03]&0xffff;
1504	1483
1505	1484	/* if the auto-animation mask or bits have changed search for tiles using them and mark as dirty */
1506		if ((old_animmask != animmask) || (old_animbits != animbits))
	1485	if ((state->old_animmask != animmask) || (state->old_animbits != animbits))
1507	1486	{
1508	1487	int tile_index;
1509	1488	for (tile_index=0;tile_index<128*128;tile_index++)
1510	1489	{
1511	1490	if (hng64_videoram[tile_index+(0x00000/4)]&0x200000)
1512	1491	{
1513		hng64_mark_tile_dirty(0,tile_index);
	1492	hng64_mark_tile_dirty(state, 0, tile_index);
1514	1493	}
1515	1494	if (hng64_videoram[tile_index+(0x10000/4)]&0x200000)
1516	1495	{
1517		hng64_mark_tile_dirty(1,tile_index);
	1496	hng64_mark_tile_dirty(state, 1, tile_index);
1518	1497	}
1519	1498	if (hng64_videoram[tile_index+(0x20000/4)]&0x200000)
1520	1499	{
1521		hng64_mark_tile_dirty(2,tile_index);
	1500	hng64_mark_tile_dirty(state, 2, tile_index);
1522	1501	}
1523	1502	if (hng64_videoram[tile_index+(0x30000/4)]&0x200000)
1524	1503	{
1525		hng64_mark_tile_dirty(3,tile_index);
	1504	hng64_mark_tile_dirty(state, 3, tile_index);
1526	1505	}
1527	1506	}
1528	1507
1529		old_animmask = animmask;
1530		old_animbits = animbits;
	1508	state->old_animmask = animmask;
	1509	state->old_animbits = animbits;
1531	1510	}
1532	1511
1533		if ((old_tileflags0&IMPORTANT_DIRTY_TILEFLAG_MASK)!=(tileflags0&IMPORTANT_DIRTY_TILEFLAG_MASK))
	1512	if ((state->old_tileflags0&IMPORTANT_DIRTY_TILEFLAG_MASK)!=(tileflags0&IMPORTANT_DIRTY_TILEFLAG_MASK))
1534	1513	{
1535		hng64_mark_all_tiles_dirty (0);
1536		old_tileflags0 = tileflags0;
	1514	hng64_mark_all_tiles_dirty(state, 0);
	1515	state->old_tileflags0 = tileflags0;
1537	1516	}
1538	1517
1539		if ((old_tileflags1&IMPORTANT_DIRTY_TILEFLAG_MASK)!=(tileflags1&IMPORTANT_DIRTY_TILEFLAG_MASK))
	1518	if ((state->old_tileflags1&IMPORTANT_DIRTY_TILEFLAG_MASK)!=(tileflags1&IMPORTANT_DIRTY_TILEFLAG_MASK))
1540	1519	{
1541		hng64_mark_all_tiles_dirty (1);
1542		old_tileflags1 = tileflags1;
	1520	hng64_mark_all_tiles_dirty(state, 1);
	1521	state->old_tileflags1 = tileflags1;
1543	1522	}
1544	1523
1545		if ((old_tileflags2&IMPORTANT_DIRTY_TILEFLAG_MASK)!=(tileflags2&IMPORTANT_DIRTY_TILEFLAG_MASK))
	1524	if ((state->old_tileflags2&IMPORTANT_DIRTY_TILEFLAG_MASK)!=(tileflags2&IMPORTANT_DIRTY_TILEFLAG_MASK))
1546	1525	{
1547		hng64_mark_all_tiles_dirty (2);
1548		old_tileflags2 = tileflags2;
	1526	hng64_mark_all_tiles_dirty(state, 2);
	1527	state->old_tileflags2 = tileflags2;
1549	1528	}
1550	1529
1551		if ((old_tileflags3&IMPORTANT_DIRTY_TILEFLAG_MASK)!=(tileflags3&IMPORTANT_DIRTY_TILEFLAG_MASK))
	1530	if ((state->old_tileflags3&IMPORTANT_DIRTY_TILEFLAG_MASK)!=(tileflags3&IMPORTANT_DIRTY_TILEFLAG_MASK))
1552	1531	{
1553		hng64_mark_all_tiles_dirty (3);
1554		old_tileflags3 = tileflags3;
	1532	hng64_mark_all_tiles_dirty(state, 3);
	1533	state->old_tileflags3 = tileflags3;
1555	1534	}
1556	1535
1557	1536	// mark all frames as dirty if for some reason we don't trust the above code
1558		//hng64_mark_all_tiles_dirty (0);
1559		//hng64_mark_all_tiles_dirty (1);
1560		//hng64_mark_all_tiles_dirty (2);
1561		//hng64_mark_all_tiles_dirty (3);
	1537	//hng64_mark_all_tiles_dirty(state, 0);
	1538	//hng64_mark_all_tiles_dirty(state, 1);
	1539	//hng64_mark_all_tiles_dirty(state, 2);
	1540	//hng64_mark_all_tiles_dirty(state, 3);
1562	1541
1563	1542	hng64_drawtilemap(screen->machine,bitmap,cliprect, 3);
1564	1543	hng64_drawtilemap(screen->machine,bitmap,cliprect, 2);
r8962	r8963
1574	1553	// Blit the color buffer into the primary bitmap
1575	1554	for (y = cliprect->min_y; y <= cliprect->max_y; y++)
1576	1555	{
1577		UINT32 *src = &colorBuffer3d[y * (cliprect->max_x-cliprect->min_x)];
	1556	UINT32 *src = &state->colorBuffer3d[y * (cliprect->max_x-cliprect->min_x)];
1578	1557	UINT32 *dst = BITMAP_ADDR32(bitmap, y, cliprect->min_x);
1579	1558
1580	1559	for (x = cliprect->min_x; x <= cliprect->max_x; x++)
r8962	r8963
1591	1570	}
1592	1571
1593	1572	if(0)
1594		transition_control(bitmap, cliprect);
	1573	transition_control(screen->machine, bitmap, cliprect);
1595	1574
1596	1575	if (0)
1597		popmessage("%08x %08x %08x %08x %08x", hng64_spriteregs[0], hng64_spriteregs[1], hng64_spriteregs[2], hng64_spriteregs[3], hng64_spriteregs[4]);
	1576	popmessage("%08x %08x %08x %08x %08x", state->spriteregs[0], state->spriteregs[1], state->spriteregs[2], state->spriteregs[3], state->spriteregs[4]);
1598	1577
1599	1578	if (0)
1600	1579	popmessage("%08x %08x TR(%04x %04x %04x %04x) SB(%04x %04x %04x %04x) %08x %08x %08x %08x %08x AA(%08x %08x) %08x %08x",
r8962	r8963
1620	1599
1621	1600	if (0)
1622	1601	popmessage("3D: %08x %08x %08x %08x : %08x %08x %08x %08x : %08x %08x %08x %08x",
1623		hng64_3dregs[0x00/4],hng64_3dregs[0x04/4],hng64_3dregs[0x08/4],hng64_3dregs[0x0c/4],
1624		hng64_3dregs[0x10/4],hng64_3dregs[0x14/4],hng64_3dregs[0x18/4],hng64_3dregs[0x1c/4],
1625		hng64_3dregs[0x20/4],hng64_3dregs[0x24/4],hng64_3dregs[0x28/4],hng64_3dregs[0x2c/4]);
	1602	state->_3dregs[0x00/4], state->_3dregs[0x04/4], state->_3dregs[0x08/4], state->_3dregs[0x0c/4],
	1603	state->_3dregs[0x10/4], state->_3dregs[0x14/4], state->_3dregs[0x18/4], state->_3dregs[0x1c/4],
	1604	state->_3dregs[0x20/4], state->_3dregs[0x24/4], state->_3dregs[0x28/4], state->_3dregs[0x2c/4]);
1626	1605
1627	1606	if (0)
1628	1607	popmessage("TC: %08x %08x %08x %08x : %08x %08x %08x %08x : %08x %08x %08x %08x : %08x %08x %08x %08x : %08x %08x %08x %08x : %08x %08x %08x %08x",
r8962	r8963
1653	1632
1654	1633	if ( input_code_pressed_once(screen->machine, KEYCODE_T) )
1655	1634	{
1656		additive_tilemap_debug ^= 1;
1657		popmessage("blend changed %02x", additive_tilemap_debug);
	1635	state->additive_tilemap_debug ^= 1;
	1636	popmessage("blend changed %02x", state->additive_tilemap_debug);
1658	1637	}
1659	1638	if ( input_code_pressed_once(screen->machine, KEYCODE_Y) )
1660	1639	{
1661		additive_tilemap_debug ^= 2;
1662		popmessage("blend changed %02x", additive_tilemap_debug);
	1640	state->additive_tilemap_debug ^= 2;
	1641	popmessage("blend changed %02x", state->additive_tilemap_debug);
1663	1642	}
1664	1643	if ( input_code_pressed_once(screen->machine, KEYCODE_U) )
1665	1644	{
1666		additive_tilemap_debug ^= 4;
1667		popmessage("blend changed %02x", additive_tilemap_debug);
	1645	state->additive_tilemap_debug ^= 4;
	1646	popmessage("blend changed %02x", state->additive_tilemap_debug);
1668	1647	}
1669	1648	if ( input_code_pressed_once(screen->machine, KEYCODE_I) )
1670	1649	{
1671		additive_tilemap_debug ^= 8;
1672		popmessage("blend changed %02x", additive_tilemap_debug);
	1650	state->additive_tilemap_debug ^= 8;
	1651	popmessage("blend changed %02x", state->additive_tilemap_debug);
1673	1652	}
1674	1653
1675	1654	return 0;
r8962	r8963
1677	1656
1678	1657	VIDEO_START( hng64 )
1679	1658	{
	1659	hng64_state *state = machine->driver_data<hng64_state>();
1680	1660	const rectangle &visarea = machine->primary_screen->visible_area();
1681	1661
1682		hng64_tilemap0_8x8       = tilemap_create(machine, get_hng64_tile0_8x8_info,   tilemap_scan_rows,  8,   8, 128,128); /* 128x128x4 = 0x10000 */
1683		hng64_tilemap0_16x16     = tilemap_create(machine, get_hng64_tile0_16x16_info, tilemap_scan_rows,  16, 16, 128,128); /* 128x128x4 = 0x10000 */
1684		hng64_tilemap0_16x16_alt = tilemap_create(machine, get_hng64_tile0_16x16_info, tilemap_scan_rows,  16, 16, 256,64); /* 128x128x4 = 0x10000 */
	1662	state->old_animmask = -1;
	1663	state->old_animbits = -1;
	1664	state->old_tileflags0 = -1;
	1665	state->old_tileflags1 = -1;
	1666	state->old_tileflags2 = -1;
	1667	state->old_tileflags3 = -1;
1685	1668
1686		hng64_tilemap1_8x8       = tilemap_create(machine, get_hng64_tile1_8x8_info,   tilemap_scan_rows,  8,   8, 128,128); /* 128x128x4 = 0x10000 */
1687		hng64_tilemap1_16x16     = tilemap_create(machine, get_hng64_tile1_16x16_info, tilemap_scan_rows,  16, 16, 128,128); /* 128x128x4 = 0x10000 */
1688		hng64_tilemap1_16x16_alt = tilemap_create(machine, get_hng64_tile1_16x16_info, tilemap_scan_rows,  16, 16, 256,64); /* 128x128x4 = 0x10000 */
	1669	state->tilemap0_8x8       = tilemap_create(machine, get_hng64_tile0_8x8_info,   tilemap_scan_rows,  8,   8, 128, 128); /* 128x128x4 = 0x10000 */
	1670	state->tilemap0_16x16     = tilemap_create(machine, get_hng64_tile0_16x16_info, tilemap_scan_rows,  16, 16, 128, 128); /* 128x128x4 = 0x10000 */
	1671	state->tilemap0_16x16_alt = tilemap_create(machine, get_hng64_tile0_16x16_info, tilemap_scan_rows,  16, 16, 256,  64); /* 128x128x4 = 0x10000 */
1689	1672
1690		hng64_tilemap2_8x8       = tilemap_create(machine, get_hng64_tile2_8x8_info,   tilemap_scan_rows,  8,   8, 128,128); /* 128x128x4 = 0x10000 */
1691		hng64_tilemap2_16x16     = tilemap_create(machine, get_hng64_tile2_16x16_info, tilemap_scan_rows,  16, 16, 128,128); /* 128x128x4 = 0x10000 */
1692		hng64_tilemap2_16x16_alt = tilemap_create(machine, get_hng64_tile2_16x16_info, tilemap_scan_rows,  16, 16, 256,64); /* 128x128x4 = 0x10000 */
	1673	state->tilemap1_8x8       = tilemap_create(machine, get_hng64_tile1_8x8_info,   tilemap_scan_rows,  8,   8, 128, 128); /* 128x128x4 = 0x10000 */
	1674	state->tilemap1_16x16     = tilemap_create(machine, get_hng64_tile1_16x16_info, tilemap_scan_rows,  16, 16, 128, 128); /* 128x128x4 = 0x10000 */
	1675	state->tilemap1_16x16_alt = tilemap_create(machine, get_hng64_tile1_16x16_info, tilemap_scan_rows,  16, 16, 256,  64); /* 128x128x4 = 0x10000 */
1693	1676
1694		hng64_tilemap3_8x8       = tilemap_create(machine, get_hng64_tile3_8x8_info,   tilemap_scan_rows,  8,   8, 128,128); /* 128x128x4 = 0x10000 */
1695		hng64_tilemap3_16x16     = tilemap_create(machine, get_hng64_tile3_16x16_info, tilemap_scan_rows,  16, 16, 128,128); /* 128x128x4 = 0x10000 */
1696		hng64_tilemap3_16x16_alt = tilemap_create(machine, get_hng64_tile3_16x16_info, tilemap_scan_rows,  16, 16, 256,64); /* 128x128x4 = 0x10000 */
	1677	state->tilemap2_8x8       = tilemap_create(machine, get_hng64_tile2_8x8_info,   tilemap_scan_rows,  8,   8, 128, 128); /* 128x128x4 = 0x10000 */
	1678	state->tilemap2_16x16     = tilemap_create(machine, get_hng64_tile2_16x16_info, tilemap_scan_rows,  16, 16, 128, 128); /* 128x128x4 = 0x10000 */
	1679	state->tilemap2_16x16_alt = tilemap_create(machine, get_hng64_tile2_16x16_info, tilemap_scan_rows,  16, 16, 256,  64); /* 128x128x4 = 0x10000 */
1697	1680
	1681	state->tilemap3_8x8       = tilemap_create(machine, get_hng64_tile3_8x8_info,   tilemap_scan_rows,  8,   8, 128, 128); /* 128x128x4 = 0x10000 */
	1682	state->tilemap3_16x16     = tilemap_create(machine, get_hng64_tile3_16x16_info, tilemap_scan_rows,  16, 16, 128, 128); /* 128x128x4 = 0x10000 */
	1683	state->tilemap3_16x16_alt = tilemap_create(machine, get_hng64_tile3_16x16_info, tilemap_scan_rows,  16, 16, 256,  64); /* 128x128x4 = 0x10000 */
1698	1684
1699		tilemap_set_transparent_pen(hng64_tilemap0_8x8,0);
1700		tilemap_set_transparent_pen(hng64_tilemap0_16x16,0);
1701		tilemap_set_transparent_pen(hng64_tilemap0_16x16_alt,0);
	1685	tilemap_set_transparent_pen(state->tilemap0_8x8, 0);
	1686	tilemap_set_transparent_pen(state->tilemap0_16x16, 0);
	1687	tilemap_set_transparent_pen(state->tilemap0_16x16_alt, 0);
1702	1688
1703		tilemap_set_transparent_pen(hng64_tilemap1_8x8,0);
1704		tilemap_set_transparent_pen(hng64_tilemap1_16x16,0);
1705		tilemap_set_transparent_pen(hng64_tilemap1_16x16_alt,0);
	1689	tilemap_set_transparent_pen(state->tilemap1_8x8, 0);
	1690	tilemap_set_transparent_pen(state->tilemap1_16x16, 0);
	1691	tilemap_set_transparent_pen(state->tilemap1_16x16_alt, 0);
1706	1692
1707		tilemap_set_transparent_pen(hng64_tilemap2_8x8,0);
1708		tilemap_set_transparent_pen(hng64_tilemap2_16x16,0);
1709		tilemap_set_transparent_pen(hng64_tilemap2_16x16_alt,0);
	1693	tilemap_set_transparent_pen(state->tilemap2_8x8, 0);
	1694	tilemap_set_transparent_pen(state->tilemap2_16x16, 0);
	1695	tilemap_set_transparent_pen(state->tilemap2_16x16_alt, 0);
1710	1696
1711		tilemap_set_transparent_pen(hng64_tilemap3_8x8,0);
1712		tilemap_set_transparent_pen(hng64_tilemap3_16x16,0);
1713		tilemap_set_transparent_pen(hng64_tilemap3_16x16_alt,0);
	1697	tilemap_set_transparent_pen(state->tilemap3_8x8, 0);
	1698	tilemap_set_transparent_pen(state->tilemap3_16x16, 0);
	1699	tilemap_set_transparent_pen(state->tilemap3_16x16_alt, 0);
1714	1700
1715	1701	// Debug switch, turn on / off additive blending on a per-tilemap basis
1716		additive_tilemap_debug = 0;
	1702	state->additive_tilemap_debug = 0;
1717	1703
1718	1704	// 3d Buffer Allocation
1719		depthBuffer3d = auto_alloc_array(machine, float,  (visarea.max_x)*(visarea.max_y));
1720		colorBuffer3d = auto_alloc_array(machine, UINT32, (visarea.max_x)*(visarea.max_y));
	1705	state->depthBuffer3d = auto_alloc_array(machine, float,  (visarea.max_x)*(visarea.max_y));
	1706	state->colorBuffer3d = auto_alloc_array(machine, UINT32, (visarea.max_x)*(visarea.max_y));
1721	1707	}
1722	1708
1723	1709
1724	1710	///////////////
1725	1711	// 3d Engine //
1726	1712	///////////////
1727		static UINT32 hng64_dls[2][0x81];
1728	1713
1729		// 3d State
1730		static int paletteState3d = 0x00;
1731		static float projectionMatrix[16];
1732		static float modelViewMatrix[16];
1733		static float cameraMatrix[16];
1734
1735		static float lightStrength;
1736		static float lightVector[3];
1737
1738	1714	struct polyVert
1739	1715	{
1740	1716	float worldCoords[4];   // World space coordinates (X Y Z 1.0)
r8962	r8963
1816	1792
1817	1793	// Operation 0001
1818	1794	// Camera transformation.
1819		static void setCameraTransformation(const UINT16* packet)
	1795	static void setCameraTransformation(hng64_state *state, const UINT16* packet)
1820	1796	{
	1797	float *cameraMatrix = state->cameraMatrix;
	1798
1821	1799	/*//////////////
1822	1800	// PACKET FORMAT
1823	1801	// [0]  - 0001 ... ID
r8962	r8963
1861	1839
1862	1840	// Operation 0010
1863	1841	// Lighting information
1864		static void setLighting(const UINT16* packet)
	1842	static void setLighting(hng64_state *state, const UINT16* packet)
1865	1843	{
	1844	float *lightVector = state->lightVector;
	1845
1866	1846	/*//////////////
1867	1847	// PACKET FORMAT
1868	1848	// [0]  - 0010 ... ID
r8962	r8963
1885	1865	if (packet[1] != 0x0000) printf("ZOMG!  packet[1] in setLighting function is non-zero!\n");
1886	1866	if (packet[2] != 0x0000) printf("ZOMG!  packet[2] in setLighting function is non-zero!\n");
1887	1867
1888		lightVector[0] = uToF(packet[3]);
1889		lightVector[1] = uToF(packet[4]);
1890		lightVector[2] = uToF(packet[5]);
1891		lightStrength = uToF(packet[9]);
	1868	lightVector[0] = uToF(packet[3]);
	1869	lightVector[1] = uToF(packet[4]);
	1870	lightVector[2] = uToF(packet[5]);
	1871	state->lightStrength = uToF(packet[9]);
1892	1872	}
1893	1873
1894	1874	// Operation 0011
1895	1875	// Palette / Model flags?
1896		static void set3dFlags(const UINT16* packet)
	1876	static void set3dFlags(hng64_state *state, const UINT16* packet)
1897	1877	{
1898	1878	/*//////////////
1899	1879	// PACKET FORMAT
r8962	r8963
1914	1894	// [14] - ???? ... ? ''  ''
1915	1895	// [15] - ???? ... ? ''  ''
1916	1896	////////////*/
1917		paletteState3d = (packet[8] & 0xff00) >> 8;
	1897	state->paletteState3d = (packet[8] & 0xff00) >> 8;
1918	1898	}
1919	1899
1920	1900	// Operation 0012
1921	1901	// Projection Matrix.
1922		static void setCameraProjectionMatrix(const UINT16* packet)
	1902	static void setCameraProjectionMatrix(hng64_state *state, const UINT16* packet)
1923	1903	{
	1904	float *projectionMatrix = state->projectionMatrix;
	1905
1924	1906	/*//////////////
1925	1907	// PACKET FORMAT
1926	1908	// [0]  - 0012 ... ID
r8962	r8963
2011	1993	// [14] - xxxx ... Transformation matrix
2012	1994	// [15] - xxxx ... Transformation matrix
2013	1995	////////////*/
	1996
	1997	hng64_state *state = machine->driver_data<hng64_state>();
2014	1998	UINT32 size[4];
2015	1999	UINT32 address[4];
2016	2000	UINT32 megaOffset;
r8962	r8963
2091	2075	return;
2092	2076	}
2093	2077
2094		/*
2095		// Debug - ajg
2096		printf("%08x : ", threeDOffset*3*2);
2097		for (int k = 0; k < 7*3; k++)
2098		{
2099		printf("%04x ", threeDPointer[k]);
2100		if ((k % 3) == 2) printf(" ");
2101		}
2102		printf("\n");
2103		*/
	2078	#if 0
	2079	// Debug - ajg
	2080	printf("%08x : ", threeDOffset*3*2);
	2081	for (int k = 0; k < 7*3; k++)
	2082	{
	2083	printf("%04x ", threeDPointer[k]);
	2084	if ((k % 3) == 2) printf(" ");
	2085	}
	2086	printf("\n");
	2087	#endif
2104	2088
2105	2089	// There are 4 hunks per address.
2106	2090	address[0] = threeDPointer[0];
r8962	r8963
2209	2193	/* FIXME: This isn't correct.
2210	2194	Buriki & Xrally need this line.  Roads Edge needs it removed.
2211	2195	So instead we're looking for a bit that is on for XRally & Buriki, but noone else. */
2212		if (hng64_3dregs[0x00/4] & 0x2000)
	2196	if (state->_3dregs[0x00/4] & 0x2000)
2213	2197	{
2214	2198	if (strcmp(machine->basename(), "roadedge"))
2215	2199	polys[*numPolys].palOffset += 0x800;
r8962	r8963
2225	2209	// Apply the dynamic palette offset if its flag is set, otherwise stick with the fixed one
2226	2210	if ((packet[1] & 0x0100))
2227	2211	{
2228		explicitPaletteValue1 = paletteState3d * 0x80;
	2212	explicitPaletteValue1 = state->paletteState3d * 0x80;
2229	2213	explicitPaletteValue2 = 0;      // This is probably hiding somewhere in operation 0011
2230		}
	2214	}
2231	2215
2232	2216	polys[*numPolys].palOffset += (explicitPaletteValue1 + explicitPaletteValue2);
2233	2217
r8962	r8963
2387	2371
2388	2372	// TODO: I'm not reading 3 necessary words here (maybe face normal) !!!
2389	2373
2390		/* DEBUG
2391		printf("0x?6 : %08x (%d/%d)\n", address[k]*3*2, l, size[k]-1);
2392		for (int m = 0; m < 13; m++)
2393		printf("%04x ", chunkOffset[m]);
2394		printf("\n");
2395		for (int m = 0; m < 13; m++)
2396		printf("%3.4f ", uToF(chunkOffset[m]));
2397		printf("\n\n");
2398		*/
	2374	#if 0
	2375	// DEBUG
	2376	printf("0x?6 : %08x (%d/%d)\n", address[k]*3*2, l, size[k]-1);
	2377	for (int m = 0; m < 13; m++)
	2378	printf("%04x ", chunkOffset[m]);
	2379	printf("\n");
2399	2380
	2381	for (int m = 0; m < 13; m++)
	2382	printf("%3.4f ", uToF(chunkOffset[m]));
	2383	printf("\n\n");
	2384	#endif
	2385
2400	2386	chunkLength = 12;
2401	2387	break;
2402	2388
r8962	r8963
2417	2403	////////////////////////////////////
2418	2404	// Perform the world transformations...
2419	2405	// !! Can eliminate this step with a matrix stack (maybe necessary?) !!
2420		setIdentity(modelViewMatrix);
2421		if (hng64_mcu_type != SAMSHO_MCU)
	2406	setIdentity(state->modelViewMatrix);
	2407	if (state->mcu_type != SAMSHO_MCU)
2422	2408	{
2423	2409	// The sams64 games transform the geometry in front of a stationary camera.
2424	2410	// This is fine in sams64_2, since it never calls the 'camera transformation' function
2425	2411	// (thus using the identity matrix for this transform), but sams64 calls the
2426	2412	// camera transformation function with rotation values.
2427	2413	// It remains to be seen what those might do...
2428		matmul4(modelViewMatrix, modelViewMatrix, cameraMatrix);
	2414	matmul4(state->modelViewMatrix, state->modelViewMatrix, state->cameraMatrix);
2429	2415	}
2430		matmul4(modelViewMatrix, modelViewMatrix, objectMatrix);
	2416	matmul4(state->modelViewMatrix, state->modelViewMatrix, objectMatrix);
2431	2417
2432	2418	// LIGHTING
2433		if (packet[1] & 0x0008 && lightStrength > 0.0f)
	2419	if (packet[1] & 0x0008 && state->lightStrength > 0.0f)
2434	2420	{
2435	2421	for (int v = 0; v < 3; v++)
2436	2422	{
2437	2423	float transformedNormal[4];
2438	2424	vecmatmul4(transformedNormal, objectMatrix, polys[*numPolys].vert[v].normal);
2439	2425	normalize(transformedNormal);
2440		normalize(lightVector);
	2426	normalize(state->lightVector);
2441	2427
2442		float intensity = vecDotProduct(transformedNormal, lightVector) * -1.0f;
	2428	float intensity = vecDotProduct(transformedNormal, state->lightVector) * -1.0f;
2443	2429	intensity = (intensity <= 0.0f) ? (0.0f) : (intensity);
2444		intensity *= lightStrength * 128.0f;    // Turns 0x0100 into 1.0
	2430	intensity *= state->lightStrength * 128.0f;    // Turns 0x0100 into 1.0
2445	2431	intensity *= 128.0;                     // Maps intensity to the range [0.0, 2.0]
2446	2432	if (intensity >= 255.0f) intensity = 255.0f;
2447	2433
r8962	r8963
2464	2450
2465	2451	// BACKFACE CULL //
2466	2452	// EMPIRICAL EVIDENCE SEEMS TO SHOW THE HNG64 HARDWARE DOES NOT BACKFACE CULL //
2467		/*
2468		float cullRay[4];
2469		float cullNorm[4];
	2453	#if 0
	2454	float cullRay[4];
	2455	float cullNorm[4];
2470	2456
2471		// Cast a ray out of the camera towards the polygon's point in eyespace.
2472		vecmatmul4(cullRay, modelViewMatrix, polys[*numPolys].vert[0].worldCoords);
2473		normalize(cullRay);
2474		// Dot product that with the normal to see if you're negative...
2475		vecmatmul4(cullNorm, modelViewMatrix, polys[*numPolys].faceNormal);
	2457	// Cast a ray out of the camera towards the polygon's point in eyespace.
	2458	vecmatmul4(cullRay, modelViewMatrix, polys[*numPolys].vert[0].worldCoords);
	2459	normalize(cullRay);
	2460	// Dot product that with the normal to see if you're negative...
	2461	vecmatmul4(cullNorm, modelViewMatrix, polys[*numPolys].faceNormal);
2476	2462
2477		float result = vecDotProduct(cullRay, cullNorm);
	2463	float result = vecDotProduct(cullRay, cullNorm);
2478	2464
2479		if (result < 0.0f)
2480		polys[*numPolys].visible = 1;
2481		else
2482		polys[*numPolys].visible = 0;
2483		*/
	2465	if (result < 0.0f)
	2466	polys[*numPolys].visible = 1;
	2467	else
	2468	polys[*numPolys].visible = 0;
	2469	#endif
2484	2470
2485	2471
2486	2472	// BEHIND-THE-CAMERA CULL //
2487		vecmatmul4(cullRay, modelViewMatrix, polys[*numPolys].vert[0].worldCoords);
	2473	vecmatmul4(cullRay, state->modelViewMatrix, polys[*numPolys].vert[0].worldCoords);
2488	2474	if (cullRay[2] > 0.0f)            // Camera is pointing down -Z
2489	2475	{
2490	2476	polys[*numPolys].visible = 0;
r8962	r8963
2497	2483	for (int m = 0; m < polys[*numPolys].n; m++)
2498	2484	{
2499	2485	// Transform and project the vertex into pre-divided homogeneous coordinates...
2500		vecmatmul4(eyeCoords, modelViewMatrix, polys[*numPolys].vert[m].worldCoords);
2501		vecmatmul4(polys[*numPolys].vert[m].clipCoords, projectionMatrix, eyeCoords);
	2486	vecmatmul4(eyeCoords, state->modelViewMatrix, polys[*numPolys].vert[m].worldCoords);
	2487	vecmatmul4(polys[*numPolys].vert[m].clipCoords, state->projectionMatrix, eyeCoords);
2502	2488	}
2503	2489
2504	2490	if (polys[*numPolys].visible)
r8962	r8963
2540	2526
2541	2527	void hng64_command3d(running_machine* machine, const UINT16* packet)
2542	2528	{
	2529	hng64_state *state = machine->driver_data<hng64_state>();
	2530
2543	2531	/* A temporary place to put some polygons.  This will optimize away if the compiler's any good. */
2544	2532	int numPolys = 0;
2545	2533	struct polygon* polys = auto_alloc_array(machine, struct polygon, 1024*5);
r8962	r8963
2551	2539	break;
2552	2540
2553	2541	case 0x0001:   // Camera transformation.
2554		setCameraTransformation(packet);
	2542	setCameraTransformation(state, packet);
2555	2543	break;
2556	2544
2557	2545	case 0x0010:   // Lighting information.
2558	2546	//if (packet[9]) printPacket(packet, 1);
2559		setLighting(packet);
	2547	setLighting(state, packet);
2560	2548	break;
2561	2549
2562	2550	case 0x0011:   // Palette / Model flags?
2563	2551	//printPacket(packet, 1); printf("\n");
2564		set3dFlags(packet);
	2552	set3dFlags(state, packet);
2565	2553	break;
2566	2554
2567	2555	case 0x0012:   // Projection Matrix
2568	2556	//printPacket(packet, 1);
2569		setCameraProjectionMatrix(packet);
	2557	setCameraProjectionMatrix(state, packet);
2570	2558	break;
2571	2559
2572	2560	case 0x0100:
2573	2561	case 0x0101:   // Geometry with full transformations
2574	2562	// HACK.  Masks out a piece of geo bbust2's drawShaded() crashes on.
2575		if (packet[2] == 0x0003 && packet[3] == 0x8f37 && hng64_mcu_type == SHOOT_MCU)
	2563	if (packet[2] == 0x0003 && packet[3] == 0x8f37 && state->mcu_type == SHOOT_MCU)
2576	2564	break;
2577	2565
2578	2566	recoverPolygonBlock(machine, packet, polys, &numPolys);
r8962	r8963
2633	2621
2634	2622	static void clear3d(running_machine *machine)
2635	2623	{
	2624	hng64_state *state = machine->driver_data<hng64_state>();
2636	2625	int i;
2637	2626
2638	2627	const rectangle &visarea = machine->primary_screen->visible_area();
r8962	r8963
2640	2629	// Clear each of the display list buffers after drawing - todo: kill!
2641	2630	for (i = 0; i < 0x81; i++)
2642	2631	{
2643		hng64_dls[0][i] = 0;
2644		hng64_dls[1][i] = 0;
	2632	state->dls[0][i] = 0;
	2633	state->dls[1][i] = 0;
2645	2634	}
2646	2635
2647	2636	// Reset the buffers...
2648	2637	for (i = 0; i < (visarea.max_x)*(visarea.max_y); i++)
2649	2638	{
2650		depthBuffer3d[i] = 100.0f;
2651		colorBuffer3d[i] = MAKE_ARGB(0,0,0,0);
	2639	state->depthBuffer3d[i] = 100.0f;
	2640	state->colorBuffer3d[i] = MAKE_ARGB(0, 0, 0, 0);
2652	2641	}
2653	2642
2654	2643	// Set some matrices to the identity...
2655		setIdentity(projectionMatrix);
2656		setIdentity(modelViewMatrix);
2657		setIdentity(cameraMatrix);
	2644	setIdentity(state->projectionMatrix);
	2645	setIdentity(state->modelViewMatrix);
	2646	setIdentity(state->cameraMatrix);
2658	2647	}
2659	2648
2660	2649	/* 3D/framebuffer video registers
r8962	r8963
2678	2667	/* 4x4 matrix multiplication */
2679	2668	static void matmul4(float *product, const float *a, const float *b )
2680	2669	{
2681		int i;
2682		for (i = 0; i < 4; i++)
2683		{
	2670	int i;
	2671	for (i = 0; i < 4; i++)
	2672	{
2684	2673	const float ai0 = a[0  + i];
2685	2674	const float ai1 = a[4  + i];
2686	2675	const float ai2 = a[8  + i];
r8962	r8963
2690	2679	product[4  + i] = ai0 * b[4 ] + ai1 * b[5 ] + ai2 * b[6 ] + ai3 * b[7 ];
2691	2680	product[8  + i] = ai0 * b[8 ] + ai1 * b[9 ] + ai2 * b[10] + ai3 * b[11];
2692	2681	product[12 + i] = ai0 * b[12] + ai1 * b[13] + ai2 * b[14] + ai3 * b[15];
2693		}
	2682	}
2694	2683	}
2695	2684
2696	2685	/* vector by 4x4 matrix multiply */
r8962	r8963
2730	2719	retVal = (float)((INT16)input) / 32768.0f;
2731	2720	return retVal;
2732	2721
2733		/*
2734		if ((INT16)input < 0)
2735		retVal = (float)((INT16)input) / 32768.0f;
2736		else
2737		retVal = (float)((INT16)input) / 32767.0f;
2738		*/
	2722	#if 0
	2723	if ((INT16)input < 0)
	2724	retVal = (float)((INT16)input) / 32768.0f;
	2725	else
	2726	retVal = (float)((INT16)input) / 32767.0f;
	2727	#endif
2739	2728	}
2740	2729
2741	2730	static void normalize(float* x)
r8962	r8963
2985	2974	}
2986	2975
2987	2976	// SHOWS THE CLIPPING //
2988		/*
2989		for (int j = 1; j < p->n-1; j++)
2990		{
2991		drawline2d(p->vert[0].clipCoords[0],   p->vert[0].clipCoords[1],   p->vert[j].clipCoords[0],   p->vert[j].clipCoords[1],   255, bitmap);
2992		drawline2d(p->vert[j].clipCoords[0],   p->vert[j].clipCoords[1],   p->vert[j+1].clipCoords[0], p->vert[j+1].clipCoords[1], 255, bitmap);
2993		drawline2d(p->vert[j+1].clipCoords[0], p->vert[j+1].clipCoords[1], p->vert[0].clipCoords[0],   p->vert[0].clipCoords[1],   255, bitmap);
2994		}
2995		*/
	2977	#if 0
	2978	for (int j = 1; j < p->n-1; j++)
	2979	{
	2980	drawline2d(p->vert[0].clipCoords[0],   p->vert[0].clipCoords[1],   p->vert[j].clipCoords[0],   p->vert[j].clipCoords[1],   255, bitmap);
	2981	drawline2d(p->vert[j].clipCoords[0],   p->vert[j].clipCoords[1],   p->vert[j+1].clipCoords[0], p->vert[j+1].clipCoords[1], 255, bitmap);
	2982	drawline2d(p->vert[j+1].clipCoords[0], p->vert[j+1].clipCoords[1], p->vert[0].clipCoords[0],   p->vert[0].clipCoords[1],   255, bitmap);
	2983	}
	2984	#endif
2996	2985	}
2997	2986	#endif
2998	2987
r8962	r8963
3028	3017	float g_start, float g_delta, float b_start, float b_delta,
3029	3018	float s_start, float s_delta, float t_start, float t_delta)
3030	3019	{
3031		float*  db = &(depthBuffer3d[(y * machine->primary_screen->visible_area().max_x) + x_start]);
3032		UINT32* cb = &(colorBuffer3d[(y * machine->primary_screen->visible_area().max_x) + x_start]);
	3020	hng64_state *state = machine->driver_data<hng64_state>();
	3021	float*  db = &(state->depthBuffer3d[(y * machine->primary_screen->visible_area().max_x) + x_start]);
	3022	UINT32* cb = &(state->colorBuffer3d[(y * machine->primary_screen->visible_area().max_x) + x_start]);
3033	3023
3034	3024	UINT8 paletteEntry = 0;
3035	3025	float t_coord, s_coord;

src/mame/video/zac2650.c

r8962	r8963
5	5	/*************************************************************/
6	6
7	7	#include "emu.h"
	8	#include "sound/s2636.h"
8	9
9	10	UINT8 *zac2650_s2636_0_ram;
10	11	static bitmap_t *spritebitmap;
r8962	r8963
38	39	zac2650_s2636_0_ram[offset] = data;
39	40	gfx_element_mark_dirty(space->machine->gfx[1], offset/8);
40	41	gfx_element_mark_dirty(space->machine->gfx[2], offset/8);
	42	if (offset == 0xc7)
	43	{
	44	s2636_soundport_w(space->machine->device("s2636snd"), 0, data);
	45	}
41	46	}
42	47
43	48	READ8_HANDLER( tinvader_port_0_r )

src/mame/video/shangha3.c

r8962	r8963
116	116	int offs;
117	117
118	118
119		profiler_mark_start(PROFILER_VIDEO);
	119	g_profiler.start(PROFILER_VIDEO);
120	120
121	121	for (offs = gfxlist_addr << 3;offs < shangha3_ram_size/2;offs += 16)
122	122	{
r8962	r8963
259	259	}
260	260	}
261	261
262		profiler_mark_end();
	262	g_profiler.stop();
263	263	}
264	264
265	265

src/mame/video/gaelco2.c

r8962	r8963
509	509
510	510	VIDEO_EOF( gaelco2 )
511	511	{
512		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	512	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
513	513
514	514	/* sprites are one frame ahead */
515	515	buffer_spriteram16_w(space, 0, 0, 0xffff);

src/mame/video/twin16.c

r8962	r8963
547	547	memcpy(twin16_sprite_buffer,&machine->generic.spriteram.u16[0x1800],0x800*sizeof(UINT16));
548	548	}
549	549	else {
550		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	550	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
551	551	buffer_spriteram16_w(space,0,0,0xffff);
552	552	}
553	553	}

src/mame/video/archimds.c

r8962	r8963
1	1	/***************************************************************************
2	2
3		Acorn Archimedes VIDC (VIDeo Controller) emulation
	3	Acorn Archimedes VIDC (VIDeo Controller) emulation
4	4
5	5	***************************************************************************/
6	6
r8962	r8963
126	126	}
127	127
128	128	return 0;
129		}
		No newline at end of file
	129	}

src/mame/video/crshrace.c

r8962	r8963
219	219
220	220	VIDEO_EOF( crshrace )
221	221	{
222		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	222	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
223	223
224	224	buffer_spriteram16_w(space, 0, 0, 0xffff);
225	225	buffer_spriteram16_2_w(space, 0, 0, 0xffff);

src/mame/video/dooyong.c

r8962	r8963
1	1	#include "emu.h"
2	2	#include "includes/dooyong.h"
3	3
4
	4	UINT8 *paletteram_flytiger;
5	5	UINT8 *dooyong_txvideoram;
6	6
7	7	static UINT8 sprites_disabled;      /* Used by lastday/lastdaya */
	8	static UINT8 flytiger_palette_bank;      /* Used by flytiger */
8	9	static UINT8 flytiger_pri;         /* Used by flytiger */
9	10	static UINT8 tx_pri;            /* Used by sadari/gundl94/primella */
10	11	static UINT16 rshark_pri;         /* Used by rshark/superx/popbingo */
r8962	r8963
176	177	//  logerror("%04x: bankswitch = %02x\n",cpu_get_pc(space->cpu),data&0xe0);
177	178	}
178	179
	180	WRITE8_HANDLER( paletteram_flytiger_w )
	181	{
	182	if (flytiger_palette_bank)
	183	{
	184	UINT16 value;
	185	paletteram_flytiger[offset] = data;
	186	value = paletteram_flytiger[offset & ~1] | (paletteram_flytiger[offset | 1] << 8);
	187	palette_set_color_rgb(space->machine, offset/2, pal5bit(value >> 10), pal5bit(value >> 5), pal5bit(value >> 0));
	188	}
	189	}
	190
179	191	WRITE8_HANDLER( flytiger_ctrl_w )
180	192	{
181	193	/* bit 0 is flip screen */
182	194	flip_screen_set(space->machine, data & 0x01);
183	195
184		/* bits 1, 2, 3 used but unknown */
	196	/* bits 1, 2 used but unknown */
185	197
	198	/* bit 3 fg palette banking: trash protection? */
	199	flytiger_palette_bank = data & 0x08;
	200
186	201	/* bit 4 changes tilemaps priority */
187	202	flytiger_pri = data & 0x10;
188	203	}
189	204
190	205	WRITE16_HANDLER( rshark_ctrl_w )
	206
191	207	{
192	208	if (ACCESSING_BITS_0_7)
193	209	{
r8962	r8963
302	318	lastday_get_tile_info(machine, tileinfo, tile_index, fg2_tilerom, fg2scroll8, fg2_gfx);
303	319	}
304	320
305		/* flytiger uses some palette banking technique or something, but we
306		don't know what it is.  For now, this is the same as the code used
307		for the other layers (hence the really strange colour). */
	321	/* flytiger uses some palette banking technique or something maybe a trash protection */
308	322
309	323	static TILE_GET_INFO( flytiger_get_fg_tile_info )
310	324	{
r8962	r8963
313	327	int offs = (tile_index + (fgscroll8[1] << 6)) * 2;
314	328	int attr = tilerom[offs];
315	329	int code = tilerom[offs + 1] | ((attr & 0x01) << 8) | ((attr & 0x80) << 2);
316		int color = (attr & 0x78) >> 3; //TODO: missing 4th bit or palette bank
	330	int color = (attr & 0x78) >> 3;
317	331	int flags = ((attr & 0x02) ? TILE_FLIPX : 0) | ((attr & 0x04) ? TILE_FLIPY : 0);
318	332
319	333	SET_TILE_INFO(fg_gfx, code, color, flags);
r8962	r8963
907	921
908	922	VIDEO_EOF( dooyong )
909	923	{
910		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	924	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
911	925
912	926	buffer_spriteram_w(space, 0, 0);
913	927	}
914	928
915	929	VIDEO_EOF( rshark )
916	930	{
917		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	931	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
918	932
919	933	buffer_spriteram16_w(space, 0, 0, 0xffff);
920	934	}

src/mame/video/williams.c

r8962	r8963
158	158	static void blitter_init(running_machine *machine, int blitter_config, const UINT8 *remap_prom);
159	159	static void create_palette_lookup(running_machine *machine);
160	160	static TILE_GET_INFO( get_tile_info );
161		static int blitter_core(const address_space *space, int sstart, int dstart, int w, int h, int data);
	161	static int blitter_core(address_space *space, int sstart, int dstart, int w, int h, int data);
162	162
163	163
164	164
r8962	r8963
603	603	*
604	604	*************************************/
605	605
606		INLINE void blit_pixel(const address_space *space, int offset, int srcdata, int data, int mask, int solid)
	606	INLINE void blit_pixel(address_space *space, int offset, int srcdata, int data, int mask, int solid)
607	607	{
608	608	/* always read from video RAM regardless of the bank setting */
609		int pix = (offset < 0xc000) ? williams_videoram[offset] : memory_read_byte(space, offset);
	609	int pix = (offset < 0xc000) ? williams_videoram[offset] : space->read_byte(offset);
610	610
611	611	/* handle transparency */
612	612	if (data & 0x08)
r8962	r8963
626	626	/* note that we have to allow blits to non-video RAM (e.g. tileram) because those */
627	627	/* are not blocked by the window enable */
628	628	if (!williams_blitter_window_enable || offset < williams_blitter_clip_address || offset >= 0xc000)
629		memory_write_byte(space, offset, pix);
	629	space->write_byte(offset, pix);
630	630	}
631	631
632	632
633		static int blitter_core(const address_space *space, int sstart, int dstart, int w, int h, int data)
	633	static int blitter_core(address_space *space, int sstart, int dstart, int w, int h, int data)
634	634	{
635	635	int source, sxadv, syadv;
636	636	int dest, dxadv, dyadv;
r8962	r8963
666	666	/* loop over the width */
667	667	for (j = w; j > 0; j--)
668	668	{
669		blit_pixel(space, dest, blitter_remap[memory_read_byte(space, source)], data, keepmask, solid);
	669	blit_pixel(space, dest, blitter_remap[space->read_byte(source)], data, keepmask, solid);
670	670	accesses += 2;
671	671
672	672	/* advance */
r8962	r8963
700	700	dest = dstart & 0xffff;
701	701
702	702	/* left edge case */
703		pixdata = blitter_remap[memory_read_byte(space, source)];
	703	pixdata = blitter_remap[space->read_byte(source)];
704	704	blit_pixel(space, dest, (pixdata >> 4) & 0x0f, data, keepmask | 0xf0, solid);
705	705	accesses += 2;
706	706
r8962	r8963
710	710	/* loop over the width */
711	711	for (j = w - 1; j > 0; j--)
712	712	{
713		pixdata = (pixdata << 8) | blitter_remap[memory_read_byte(space, source)];
	713	pixdata = (pixdata << 8) | blitter_remap[space->read_byte(source)];
714	714	blit_pixel(space, dest, (pixdata >> 4) & 0xff, data, keepmask, solid);
715	715	accesses += 2;
716	716

src/mame/video/genesis.c

r8962	r8963
43	43	static int  vdp_data_r(running_machine *machine);
44	44	static void vdp_data_w(running_machine *machine, int data);
45	45	static int  vdp_control_r(running_machine *machine);
46		static void vdp_control_w(const address_space *space, int data);
	46	static void vdp_control_w(address_space *space, int data);
47	47	static void vdp_register_w(running_machine *machine, int data, int vblank);
48		static void vdp_control_dma(const address_space *space, int data);
49		static void vdp_dma_68k(const address_space *space);
	48	static void vdp_control_dma(address_space *space, int data);
	49	static void vdp_dma_68k(address_space *space);
50	50	static void vdp_dma_fill(int);
51	51	static void vdp_dma_copy(void);
52	52
r8962	r8963
490	490	}
491	491
492	492
493		static void vdp_control_w(const address_space *space, int data)
	493	static void vdp_control_w(address_space *space, int data)
494	494	{
495	495	/* case 1: we're not expecting the 2nd half of a command */
496	496	if (!vdp_cmdpart)
r8962	r8963
629	629	}
630	630
631	631
632		static void vdp_control_dma(const address_space *space, int data)
	632	static void vdp_control_dma(address_space *space, int data)
633	633	{
634	634	if ((vdp_code & 0x20) && (genesis_vdp_regs[1] & 0x10))
635	635	{
r8962	r8963
661	661
662	662	******************************************************************************/
663	663
664		static void vdp_dma_68k(const address_space *space)
	664	static void vdp_dma_68k(address_space *space)
665	665	{
666	666	int length = genesis_vdp_regs[19] | (genesis_vdp_regs[20] << 8);
667	667	int source = (genesis_vdp_regs[21] << 1) | (genesis_vdp_regs[22] << 9) | ((genesis_vdp_regs[23] & 0x7f) << 17);
r8962	r8963
674	674	/* handle the DMA */
675	675	for (count = 0; count < length; count++)
676	676	{
677		vdp_data_w(space->machine, memory_read_word(space, source));
	677	vdp_data_w(space->machine, space->read_word(source));
678	678	source += 2;
679	679	}
680	680	}

src/mame/video/gp9001.c

r8962	r8963
128	128	#include "emu.h"
129	129	#include "gp9001.h"
130	130
131		bitmap_t* gp9001_custom_priority_bitmap;
132		int gp9001_displog = 0;
133
134	131	static WRITE16_DEVICE_HANDLER( gp9001_bg_tilemap_w )
135	132	{
136	133	gp9001vdp_device *vdp = (gp9001vdp_device*)device;
r8962	r8963
182	179	COMBINE_DATA(&vdp->spriteram16_new[offset]);
183	180	}
184	181
185		/* how to create a generic map which uses the CURRENT device? we have to create specific ones below at the moment */
186	182	static ADDRESS_MAP_START( gp9001vdp_map, 0, 16 )
187		//  AM_RANGE(0x0000, 0x0fff) AM_DEVREADWRITE( this, gp9001_bg_tilemap_r, gp9001_bg_tilemap_w)
188		//  AM_RANGE(0x1000, 0x1fff) AM_DEVREADWRITE( this, gp9001_fg_tilemap_r, gp9001_fg_tilemap_w)
189		//  AM_RANGE(0x2000, 0x2fff) AM_DEVREADWRITE( this, gp9001_top_tilemap_r, gp9001_top_tilemap_w)
190		//  AM_RANGE(0x3000, 0x37ff) AM_DEVREADWRITE( this, gp9001_spram_r, gp9001_spram_w)
191		//  AM_RANGE(0x3800, 0x3fff) AM_RAM // sprite mirror?
192		ADDRESS_MAP_END
193
194		ADDRESS_MAP_START( gp9001vdp0_map, 0, 16 )
195		AM_RANGE(0x0000, 0x0fff) AM_DEVREADWRITE("gp9001vdp0", gp9001_bg_tilemap_r, gp9001_bg_tilemap_w)
196		AM_RANGE(0x1000, 0x1fff) AM_DEVREADWRITE("gp9001vdp0", gp9001_fg_tilemap_r, gp9001_fg_tilemap_w)
197		AM_RANGE(0x2000, 0x2fff) AM_DEVREADWRITE("gp9001vdp0", gp9001_top_tilemap_r, gp9001_top_tilemap_w)
198		AM_RANGE(0x3000, 0x37ff) AM_DEVREADWRITE("gp9001vdp0", gp9001_spram_r, gp9001_spram_w)
	183	AM_RANGE(0x0000, 0x0fff) AM_DEVREADWRITE(DEVICE_SELF, gp9001_bg_tilemap_r, gp9001_bg_tilemap_w)
	184	AM_RANGE(0x1000, 0x1fff) AM_DEVREADWRITE(DEVICE_SELF, gp9001_fg_tilemap_r, gp9001_fg_tilemap_w)
	185	AM_RANGE(0x2000, 0x2fff) AM_DEVREADWRITE(DEVICE_SELF, gp9001_top_tilemap_r, gp9001_top_tilemap_w)
	186	AM_RANGE(0x3000, 0x37ff) AM_DEVREADWRITE(DEVICE_SELF, gp9001_spram_r, gp9001_spram_w)
199	187	AM_RANGE(0x3800, 0x3fff) AM_RAM // sprite mirror?
200	188	ADDRESS_MAP_END
201	189
202		ADDRESS_MAP_START( gp9001vdp1_map, 0, 16 )
203		AM_RANGE(0x0000, 0x0fff) AM_DEVREADWRITE("gp9001vdp1", gp9001_bg_tilemap_r, gp9001_bg_tilemap_w)
204		AM_RANGE(0x1000, 0x1fff) AM_DEVREADWRITE("gp9001vdp1", gp9001_fg_tilemap_r, gp9001_fg_tilemap_w)
205		AM_RANGE(0x2000, 0x2fff) AM_DEVREADWRITE("gp9001vdp1", gp9001_top_tilemap_r, gp9001_top_tilemap_w)
206		AM_RANGE(0x3000, 0x37ff) AM_DEVREADWRITE("gp9001vdp1", gp9001_spram_r, gp9001_spram_w)
207		AM_RANGE(0x3800, 0x3fff) AM_RAM // sprite mirror?
208		ADDRESS_MAP_END
209	190
210
211	191	gp9001vdp_device_config::gp9001vdp_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
212	192	: device_config(mconfig, static_alloc_device_config, "gp9001vdp_", tag, owner, clock),
213	193	device_config_memory_interface(mconfig, *this),
r8962	r8963
225	205	return auto_alloc(&machine, gp9001vdp_device(machine, *this));
226	206	}
227	207
228		void gp9001vdp_device_config::device_config_complete()
	208	void gp9001vdp_device_config::static_set_gfx_region(device_config *device, int gfxregion)
229	209	{
230		m_gfxregion = m_inline_data[0];
	210	gp9001vdp_device_config *vdp = downcast<gp9001vdp_device_config *>(device);
	211	vdp->m_gfxregion = gfxregion;
231	212	}
232	213
233	214	bool gp9001vdp_device_config::device_validity_check(const game_driver &driver) const
r8962	r8963
266	247	{
267	248	tile_number = ( vdp->gp9001_gfxrom_bank[(tile_number >> 13) & 7] << 13 ) | ( tile_number & 0x1fff );
268	249	}
269		else
270		{
271		if (tile_number>vdp->tile_limit)
272		{
273		tile_number = 0;
274		}
275		}
276	250
277	251	color = attrib & 0x0fff; // 0x0f00 priority, 0x007f colour
278	252	SET_TILE_INFO_DEVICE(
r8962	r8963
300	274	{
301	275	tile_number = ( vdp->gp9001_gfxrom_bank[(tile_number >> 13) & 7] << 13 ) | ( tile_number & 0x1fff );
302	276	}
303		else
304		{
305		if (tile_number>vdp->tile_limit) tile_number = 0;
306		}
307	277
308
309	278	color = attrib & 0x0fff; // 0x0f00 priority, 0x007f colour
310	279	SET_TILE_INFO_DEVICE(
311	280	vdp->tile_region,
r8962	r8963
328	297	{
329	298	tile_number = ( vdp->gp9001_gfxrom_bank[(tile_number >> 13) & 7] << 13 ) | ( tile_number & 0x1fff );
330	299	}
331		else
332		{
333		if (tile_number>vdp->tile_limit) tile_number = 0;
334		}
335	300
336	301	color = attrib & 0x0fff; // 0x0f00 priority, 0x007f colour
337	302	SET_TILE_INFO_DEVICE(
r8962	r8963
342	307	//tileinfo->category = (attrib & 0x0f00) >> 8;
343	308	}
344	309
345		static void create_tilemaps(gp9001vdp_device* vdp, int region)
	310	void gp9001vdp_device::create_tilemaps(int region)
346	311	{
347		vdp->tile_region = region;
	312	tile_region = region;
348	313
349		vdp->top_tilemap = tilemap_create_device(vdp, get_top0_tile_info,tilemap_scan_rows,16,16,32,32);
350		vdp->fg_tilemap = tilemap_create_device(vdp, get_fg0_tile_info,tilemap_scan_rows,16,16,32,32);
351		vdp->bg_tilemap = tilemap_create_device(vdp, get_bg0_tile_info,tilemap_scan_rows,16,16,32,32);
	314	top_tilemap = tilemap_create_device(this, get_top0_tile_info,tilemap_scan_rows,16,16,32,32);
	315	fg_tilemap = tilemap_create_device(this, get_fg0_tile_info,tilemap_scan_rows,16,16,32,32);
	316	bg_tilemap = tilemap_create_device(this, get_bg0_tile_info,tilemap_scan_rows,16,16,32,32);
352	317
353		tilemap_set_transparent_pen(vdp->top_tilemap,0);
354		tilemap_set_transparent_pen(vdp->fg_tilemap,0);
355		tilemap_set_transparent_pen(vdp->bg_tilemap,0);
	318	tilemap_set_transparent_pen(top_tilemap,0);
	319	tilemap_set_transparent_pen(fg_tilemap,0);
	320	tilemap_set_transparent_pen(bg_tilemap,0);
356	321	}
357	322
358	323
r8962	r8963
367	332
368	333	spriteram16_n = spriteram16_now;
369	334
370		create_tilemaps(this, m_gfxregion);
	335	create_tilemaps(m_gfxregion);
371	336
372	337	state_save_register_device_item_pointer(this, 0, spriteram16_new, GP9001_SPRITERAM_SIZE/2);
373	338	state_save_register_device_item_pointer(this, 0, spriteram16_now, GP9001_SPRITERAM_SIZE/2);
r8962	r8963
419	384	top_flip = 0;
420	385	sprite_flip = 0;
421	386
422		tile_limit = 0xffff;
423
424	387	/* debug */
425	388	display_bg = 1;
426	389	display_fg = 1;
r8962	r8963
438	401	{
439	402	int offs = vdp->gp9001_voffs;
440	403	vdp->gp9001_voffs++;
441		return memory_read_word_16be(vdp->space(), offs*2);
	404	return vdp->space()->read_word(offs*2);
442	405	}
443	406
444	407
r8962	r8963
446	409	{
447	410	int offs = vdp->gp9001_voffs;
448	411	vdp->gp9001_voffs++;
449		memory_write_word_masked_16be(vdp->space(), offs*2, data, mem_mask);
	412	vdp->space()->write_word(offs*2, data, mem_mask);
450	413	}
451	414
452	415	WRITE16_DEVICE_HANDLER( gp9001_devvoffs_w )
r8962	r8963
475	438	return ((device->machine->primary_screen->vpos() + 15) % 262) >= 245;
476	439	}
477	440
478		static void t2_scroll_reg_select_w(gp9001vdp_device *vdp, offs_t offset, UINT16 data, UINT16 mem_mask)
	441	WRITE16_DEVICE_HANDLER( gp9001_scroll_reg_select_w )
479	442	{
	443	gp9001vdp_device *vdp = (gp9001vdp_device *)device;
	444
480	445	if (ACCESSING_BITS_0_7)
481	446	{
482	447	vdp->gp9001_scroll_reg = data & 0x8f;
r8962	r8963
489	454	}
490	455	}
491	456
492		WRITE16_DEVICE_HANDLER( gp9001_scroll_reg_select_w )
493		{
494		gp9001vdp_device *vdp = (gp9001vdp_device *)device;
495		t2_scroll_reg_select_w(vdp, offset, data, mem_mask);
496		}
497
498	457	static void gp9001_scroll_reg_data_w(gp9001vdp_device *vdp, offs_t offset, UINT16 data, UINT16 mem_mask)
499	458	{
500	459
r8962	r8963
1032	991
1033	992	if ( input_code_pressed_once(machine, KEYCODE_E) )
1034	993	{
1035		gp9001_displog += 1;
1036		gp9001_displog &= 1;
	994	*vdp->displog += 1;
	995	*vdp->displog &= 1;
1037	996	}
1038		if (gp9001_displog)
	997	if (*vdp->displog)
1039	998	{
1040	999	logerror("Scrolls   BG-X  BG-Y   FG-X  FG-Y   TOP-X  TOP-Y   Sprite-X  Sprite-Y\n");
1041	1000
r8962	r8963
1213	1172	{
1214	1173	UINT8 pix = srcdata[count];
1215	1174	UINT16* dstptr = BITMAP_ADDR16(bitmap,drawyy,drawxx);
1216		UINT8* dstpri = BITMAP_ADDR8(gp9001_custom_priority_bitmap, drawyy, drawxx);
	1175	UINT8* dstpri = BITMAP_ADDR8(this->custom_priority_bitmap, drawyy, drawxx);
1217	1176
1218	1177	if (priority >= dstpri[0])
1219	1178	{
r8962	r8963
1265	1224
1266	1225	srcptr = BITMAP_ADDR16(tmb, realy, 0);
1267	1226	dstptr = BITMAP_ADDR16(bitmap, y, 0);
1268		dstpriptr = BITMAP_ADDR8(gp9001_custom_priority_bitmap, y, 0);
	1227	dstpriptr = BITMAP_ADDR8(this->custom_priority_bitmap, y, 0);
1269	1228
1270	1229	for (x=0;x<width;x++)
1271	1230	{
r8962	r8963
1294	1253
1295	1254
1296	1255	static const UINT8 gp9001_primap1[16] =  { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c, 0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c };
1297		//UINT8 gp9001_sprprimap1[16] =  { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f };
	1256	//static const UINT8 gp9001_sprprimap1[16] =  { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f };
1298	1257	static const UINT8 gp9001_sprprimap1[16] =  { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c, 0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c };
1299	1258
1300	1259	static const UINT8 batsugun_prienable0[16]={ 1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1 };

src/mame/video/gp9001.h

r8962	r8963
1	1	/* GP9001 Video Controller */
2	2
3		extern bitmap_t* gp9001_custom_priority_bitmap;
4
5	3	class gp9001vdp_device_config : public device_config,
6	4	public device_config_memory_interface
7	5	{
r8962	r8963
10	8	public:
11	9	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
12	10	virtual device_t *alloc_device(running_machine &machine) const;
	11	static void static_set_gfx_region(device_config *device, int gfxregion);
13	12	protected:
14		virtual void device_config_complete();
15	13	virtual bool device_validity_check(const game_driver &driver) const;
16	14	virtual const address_space_config *memory_space_config(int spacenum = 0) const;
17	15	address_space_config      m_space_config;
18	16	UINT8                  m_gfxregion;
19
20	17	};
21	18
22	19	class gp9001vdp_device : public device_t,
r8962	r8963
49	46	UINT8 top_flip;
50	47	UINT8 sprite_flip;
51	48
52		UINT16 tile_limit; // prevent bad tile in Batsugun, might be something like the CPS1 tile addressing limits?
53	49	int      tile_region; // we also use this to figure out which vdp we're using in some debug logging features
54	50	tilemap_t *top_tilemap, *fg_tilemap, *bg_tilemap;
55	51
r8962	r8963
71	67	void gp9001_draw_custom_tilemap(running_machine* machine, bitmap_t* bitmap, tilemap_t* tilemap, const UINT8* priremap, const UINT8* pri_enable );
72	68	void gp9001_render_vdp(running_machine* machine, bitmap_t* bitmap, const rectangle* cliprect);
73	69	void gp9001_video_eof(void);
	70	void create_tilemaps(int region);
74	71
75	72	// offset kludges, needed by fixeight bootleg
76	73	int extra_xoffset[4];
77	74	int extra_yoffset[4];
78	75
	76	bitmap_t *custom_priority_bitmap;
	77	int *displog;
	78
79	79	protected:
80	80	virtual void device_start();
81	81	virtual void device_reset();
r8962	r8963
96	96
97	97	ADDRESS_MAP_EXTERN( gp9001vdp0_map, 16 );
98	98	ADDRESS_MAP_EXTERN( gp9001vdp1_map, 16 );
99		extern int gp9001_displog;
100	99
101	100
102	101	/* vdp map 0, gfx region 0 */
103	102	#define MDRV_DEVICE_ADD_VDP0 \
104	103	MDRV_DEVICE_ADD("gp9001vdp0", gp9001vdp_, 0) \
105		MDRV_DEVICE_ADDRESS_MAP(0, gp9001vdp0_map) MDRV_DEVICE_INLINE_DATA16(0, 0) \
	104	gp9001vdp_device_config::static_set_gfx_region(device, 0); \
106	105
107	106	/* vdp map 1, gfx region 2 */
108	107	#define MDRV_DEVICE_ADD_VDP1 \
109	108	MDRV_DEVICE_ADD("gp9001vdp1", gp9001vdp_, 0) \
110		MDRV_DEVICE_ADDRESS_MAP(0, gp9001vdp1_map) MDRV_DEVICE_INLINE_DATA16(0, 2) \
	109	gp9001vdp_device_config::static_set_gfx_region(device, 2); \
111	110
112	111
113	112	// access to VDP

src/mame/drivers/bfcobra.c

r8962	r8963
409	409	The Flare One blitter is a simpler design with slightly different parameters
410	410	and will require hardware tests to figure everything out correctly.
411	411	*/
412		static void RunBlit(const address_space *space)
	412	static void RunBlit(address_space *space)
413	413	{
414	414	#define BLITPRG_READ(x)      blitter.x = *(blitter_get_addr(space->machine, blitter.program.addr++))
415	415

src/mame/drivers/nycaptor.c

r8962	r8963
24	24	- unknown R/W
25	25	- 13th bit in color defs (priority? bit is set for all colors in spot1,
26	26	for 3/4 screen cols in spot2 etc)
	27	- handle coin counters and coin lockout
	28
27	29	Notes :
28	30
29	31	$d000 - MCU data read/write
r8962	r8963
129	131
130	132	Stephh's additional notes (based on the game Z80 code and some tests) :
131	133
	134	1) 'nycaptor' and clones
	135
	136	1a) 'nycaptor'
	137
132	138	- You need to press SERVICE1 while resetting the game to enter the "test mode".
133	139	Note that the grid is always displayed, so it's IMPOSSIBLE to see what's in it 8(
134
135	140	- When "Infinite Bullets" is set to ON, there is no timer to reload the bullets.
136	141	- When "No Hit" Dip Switch is ON, damage is still incremented, but there are
137	142	no test made if it reaches the limit (0x0a).
138
139		- Bit 2 of 0xd802 also determines the precision of a shot
	143	- DSWC bit 2 also determines the precision of a shot
140	144	(= range around a bullet where the enemies can be killed) :
141		* 0 : small range (0x0a)
142		* 1 : high  range (0x0c)
	145	* 0 : small range (0x0a or 0x10)
	146	* 1 : high  range (0x0c or 0x12)
	147	- Even when "Coin Slots" is set to "1", pressing COIN2 will be based on "Coin B" settings.
143	148
	149	1b) 'colt'
	150
	151	- Due to patched code at 0x9fd, lives (BCD coded) settings are different than in 'nycaptor'.
	152	Display at start will be lives-1, but it will also display "0" when you select 100 lives.
	153	- The game is much harder than 'nycaptor' :
	154	* Due to the 4 'nop' instructions at 0x0b03, you can't get any extra life.
	155	* Due to patched code from 0x0bea to 0x0bf4, you lose a life as soon as you get hit
	156	by en enemy or when you shoot at an innocent.
	157	Furthermore, shooting birds kills you instead of recovering 3 "steps" of damage !
	158	- I can't tell if it's an ingame bug of this bootleg, but the game hangs after bonus stage
	159	(level 4) instead of looping back to level 1 with higher difficulty.
	160	The game also frezees sometimes for some unknown reasons.
	161
	162	2) 'cyclshtg' and clones
	163
	164	2a) 'cyclshtg'
	165
	166	- Lives (BCD coded) settings are not read from MCU, but from table at 0x0fee.
	167	- Even if it isn't mentionned in the manual, DSWB bit 7 allows you to reset damage to 0
	168	at the end of a level (check code at 0x328d).
	169	- When "Infinite Bullets" is set to ON, there is no timer to reload the bullets.
	170	However, it's hard to notice as you don't see an indicator as in 'nycaptor'.
	171	- There is a leftover from 'nycaptor' in CPU1 which reads DSWA bits 0 and 1 to determine
	172	"Bonus Lives" settings (code at 0x009b). These values are overwritten via code in CPU 0.
	173
	174	2b) 'bronx'
	175
	176	- Lives (BCD coded) settings are different than in 'cyclshtg' (table at 0x0fea).
	177	- The game is much harder than 'cyclshtg' :
	178	* You start with less lives with default settings (2 instead of 3).
	179	* Due to the 'add  a,$00' instruction at 0x1131, you can't get any extra life
	180	(when you get enough points, or even when you hit the "1UP" bonus).
	181	* Due to extra code at 0x3062, you start the game as if you had already sustained
	182	8 "steps" of damage. However, when you end a level, if "Damage Reset" Dip Switch
	183	is ON, your damage will be reset to 0.
	184	Furthermore, the game starts as if you had completed the 6 stages 8 times.
	185	* Due to the 'ld   (ix+$0e),$08' instruction at 0x32b1, you also start the
	186	other lives as if you had already sustained 8 "steps" of damage. However, again,
	187	when you end a level, if "Damage Reset" Dip Switch is ON, your damage will be reset to 0.
	188
144	189	***************************************************************************/
145	190
146	191	//#define USE_MCU
r8962	r8963
149	194	#include "emu.h"
150	195	#include "cpu/z80/z80.h"
151	196	#include "cpu/m6805/m6805.h"
	197	#include "includes/taitoipt.h"
152	198	#include "sound/ay8910.h"
153	199	#include "sound/msm5232.h"
154	200	#include "includes/nycaptor.h"
r8962	r8963
309	355	AM_RANGE(0xd400, 0xd400) AM_READWRITE(from_snd_r, sound_command_w)
310	356	AM_RANGE(0xd401, 0xd401) AM_READNOP
311	357	AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
312		AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
313		AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
314		AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
	358	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSWA")
	359	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSWB")
	360	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSWC")
315	361	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("IN0")
316	362	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
317	363	AM_RANGE(0xd805, 0xd805) AM_READ(nycaptor_mcu_status_r1)
r8962	r8963
328	374	static ADDRESS_MAP_START( nycaptor_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
329	375	AM_RANGE(0x0000, 0x7fff) AM_ROM
330	376	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(nycaptor_videoram_r, nycaptor_videoram_w) AM_BASE_SIZE_MEMBER(nycaptor_state, videoram, videoram_size)
331		AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
332		AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
333		AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
	377	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSWA")
	378	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSWB")
	379	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSWC")
334	380	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("IN0")
335	381	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
336	382	AM_RANGE(0xdc00, 0xdc9f) AM_READWRITE(nycaptor_spriteram_r, nycaptor_spriteram_w)
r8962	r8963
415	461	AM_RANGE(0xd002, 0xd002) AM_READWRITE(nycaptor_generic_control_r, cyclshtg_generic_control_w)
416	462	AM_RANGE(0xd400, 0xd400) AM_READWRITE(from_snd_r, sound_command_w)
417	463	AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
418		AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
419		AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
420		AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
	464	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSWA")
	465	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSWB")
	466	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSWC")
421	467	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("IN0")
422	468	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
423	469	AM_RANGE(0xd805, 0xd805) AM_READ(cyclshtg_mcu_status_r)
r8962	r8963
434	480	static ADDRESS_MAP_START( cyclshtg_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
435	481	AM_RANGE(0x0000, 0xbfff) AM_ROM
436	482	AM_RANGE(0xc000, 0xcfff) AM_READWRITE(nycaptor_videoram_r, nycaptor_videoram_w) AM_BASE_SIZE_MEMBER(nycaptor_state, videoram, videoram_size)
437		AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
438		AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
439		AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
	483	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSWA")
	484	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSWB")
	485	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSWC")
440	486	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("IN0")
441	487	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
442	488	AM_RANGE(0xdc00, 0xdc9f) AM_READWRITE(nycaptor_spriteram_r, nycaptor_spriteram_w)
r8962	r8963
465	511	AM_RANGE(0xd400, 0xd400) AM_READWRITE(from_snd_r, sound_command_w)
466	512	AM_RANGE(0xd401, 0xd401) AM_READ(unk_r)
467	513	AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
468		AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
469		AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
470		AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
	514	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSWA")
	515	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSWB")
	516	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSWC")
471	517	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("IN0")
472	518	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
473	519	AM_RANGE(0xd805, 0xd805) AM_READ(cyclshtg_mcu_status_r)
r8962	r8963
483	529	static ADDRESS_MAP_START( bronx_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
484	530	AM_RANGE(0x0000, 0x7fff) AM_ROM
485	531	AM_RANGE(0xc000, 0xcfff) AM_READWRITE(nycaptor_videoram_r, nycaptor_videoram_w) AM_BASE_SIZE_MEMBER(nycaptor_state, videoram, videoram_size)
486		AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
487		AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
488		AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
	532	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSWA")
	533	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSWB")
	534	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSWC")
489	535	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("IN0")
490	536	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
491	537	AM_RANGE(0xd805, 0xd805) AM_READ(cyclshtg_mcu_status_r1)
r8962	r8963
505	551	ADDRESS_MAP_END
506	552
507	553
508		/* Cycle Shooting */
509
510		static INPUT_PORTS_START( cyclshtg )
511		PORT_START("DSW0")
512		PORT_DIPNAME( 0x04, 0x04, "Test Mode" )
513		PORT_DIPSETTING(   0x04, DEF_STR( Off ) )
514		PORT_DIPSETTING(   0x00, DEF_STR( On ) )
515
516		PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
517		PORT_DIPSETTING(   0x10, DEF_STR( 2C_1C ) )
518		PORT_DIPSETTING(   0x30, DEF_STR( 1C_1C ) )
519		PORT_DIPSETTING(   0x00, DEF_STR( 2C_3C ) )
520		PORT_DIPSETTING(   0x20, DEF_STR( 1C_2C ) )
521
522		PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
523		PORT_DIPSETTING(   0x40, DEF_STR( 2C_1C ) )
524		PORT_DIPSETTING(   0xc0, DEF_STR( 1C_1C ) )
525		PORT_DIPSETTING(   0x00, DEF_STR( 2C_3C ) )
526		PORT_DIPSETTING(   0x80, DEF_STR( 1C_2C ) )
527
528		PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
529		PORT_DIPSETTING(   0x00, DEF_STR( Off ) )
530		PORT_DIPSETTING(   0x08, DEF_STR( On ) )
531
532		PORT_START("DSW1")
533
534		PORT_START("DSW2")
535
536		PORT_START("IN0")
537		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
538		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )//?
539		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
540		PORT_DIPNAME( 0x08, 0x08, DEF_STR( Tilt ) )
541		PORT_DIPSETTING(   0x08, DEF_STR( No ) )
542		PORT_DIPSETTING(   0x00, DEF_STR( Yes ) )
543		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
544		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
545		PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
546
547
548		PORT_START("IN1")
549		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
550
551		PORT_START("LIGHTX")
552		PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1)
553
554		PORT_START("LIGHTY")
555		PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(Y, -1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1)
556		INPUT_PORTS_END
557
558
	554	/* verified from Z80 code */
559	555	static INPUT_PORTS_START( nycaptor )
560		PORT_START("DSW0")
561		PORT_DIPNAME( 0x03, 0x03, DEF_STR( Bonus_Life ) )
562		PORT_DIPSETTING(   0x02, "20k, 80k then every 80k" )
563		PORT_DIPSETTING(   0x03, "50k, 150k then every 200k" )
564		PORT_DIPSETTING(   0x01, "100k, 300k then every 300k" )
565		PORT_DIPSETTING(   0x00, "150k, 300k then every 300k" )
566		PORT_DIPNAME( 0x04, 0x04, "Infinite Bullets (Cheat)")
	556	PORT_START("DSWA")
	557	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Bonus_Life ) )       /* table at 0x00e5 in CPU1 - see notes for 'colt' */
	558	PORT_DIPSETTING(   0x02, "20k 80k 80k+" )
	559	PORT_DIPSETTING(   0x03, "50k 150k 200k+" )
	560	PORT_DIPSETTING(   0x01, "100k 300k 300k+" )
	561	PORT_DIPSETTING(   0x00, "150k 300k 300k+" )
	562	PORT_DIPNAME( 0x04, 0x04, "Infinite Bullets")           /* see notes */
567	563	PORT_DIPSETTING(   0x04, DEF_STR( Off ) )
568	564	PORT_DIPSETTING(   0x00, DEF_STR( On ) )
569		PORT_DIPNAME( 0x18, 0x18, DEF_STR( Lives ) )
	565	PORT_DIPNAME( 0x18, 0x18, DEF_STR( Lives ) )            /* values are read from the MCU */
570	566	PORT_DIPSETTING(   0x08, "1" )
571	567	PORT_DIPSETTING(   0x00, "2" )
572	568	PORT_DIPSETTING(   0x18, "3" )
r8962	r8963
581	577	PORT_DIPSETTING(   0x00, DEF_STR( Off ) )
582	578	PORT_DIPSETTING(   0x80, DEF_STR( On ) )
583	579
584		PORT_START("DSW1")
	580	PORT_START("DSWB")
585	581	PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) )
586	582	PORT_DIPSETTING(   0x0f, DEF_STR( 9C_1C ) )
587	583	PORT_DIPSETTING(   0x0e, DEF_STR( 8C_1C ) )
r8962	r8963
617	613	PORT_DIPSETTING(   0x60, DEF_STR( 1C_7C ) )
618	614	PORT_DIPSETTING(   0x70, DEF_STR( 1C_8C ) )
619	615
620		PORT_START("DSW2")
	616	PORT_START("DSWC")
621	617	PORT_DIPNAME( 0x01, 0x01, "Freeze" )
622	618	PORT_DIPSETTING(   0x01, DEF_STR( Off ) )
623	619	PORT_DIPSETTING(   0x00, DEF_STR( On ) )
r8962	r8963
644	640
645	641	PORT_START("IN0")
646	642	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
647		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* IPT_START2 is some similar Taito games (eg: 'flstory') */
	643	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )            /* IPT_START2 is some similar Taito games (eg: 'flstory') */
648	644	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
649	645	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
650	646	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
651	647	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
652		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* "I/O ERROR" if active */
653		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* "I/O ERROR" if active */
	648	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )            /* "I/O ERROR" if active - code at 0x083d */
	649	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )            /* "I/O ERROR" if active - code at 0x083d */
654	650
655	651	PORT_START("IN1")
656	652	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
657		PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNUSED )
	653	PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
658	654
659	655	PORT_START("LIGHTX")
660	656	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1)
r8962	r8963
663	659	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1)
664	660	INPUT_PORTS_END
665	661
	662	/* verified from Z80 code */
	663	static INPUT_PORTS_START( colt )
	664	PORT_INCLUDE( nycaptor )
	665
	666	PORT_MODIFY("DSWA")
	667	PORT_DIPNAME( 0x18, 0x18, DEF_STR( Lives ) )            /* see notes */
	668	PORT_DIPSETTING(   0x08, "1" )
	669	PORT_DIPSETTING(   0x10, "2" )
	670	PORT_DIPSETTING(   0x18, "3" )
	671	PORT_DIPSETTING(   0x00, "100" )
	672	INPUT_PORTS_END
	673
	674
	675	/* verified from Z80 code */
	676	static INPUT_PORTS_START( cyclshtg )
	677	PORT_START("DSWA")
	678	PORT_DIPUNUSED( 0x01, IP_ACTIVE_LOW )
	679	PORT_DIPUNUSED( 0x02, IP_ACTIVE_LOW )
	680	TAITO_DSWA_BITS_2_TO_3
	681	TAITO_COINAGE_JAPAN_OLD                                 /* coinage B isn't mentionned in the manual */
	682
	683	PORT_START("DSWB")
	684	TAITO_DIFFICULTY
	685	PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Bonus_Life ) )       /* table at 0x100f - see notes for 'bronx' */
	686	PORT_DIPSETTING(   0x0c, "150k 350k 200k+" )
	687	PORT_DIPSETTING(   0x08, "200k 500k 300k+" )
	688	PORT_DIPSETTING(   0x04, "300k 700k 400k+" )
	689	PORT_DIPSETTING(   0x00, "400k 900k 500k+" )
	690	PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )            /* see notes */
	691	PORT_DIPSETTING(   0x00, "1" )
	692	PORT_DIPSETTING(   0x30, "3" )
	693	PORT_DIPSETTING(   0x10, "4" )
	694	PORT_DIPSETTING(   0x20, "5" )
	695	PORT_DIPUNUSED( 0x40, IP_ACTIVE_LOW )
	696	PORT_DIPNAME( 0x80, 0x80, "Reset Damage (Cheat)" )      /* see notes */
	697	PORT_DIPSETTING(   0x80, DEF_STR( Off ) )
	698	PORT_DIPSETTING(   0x00, DEF_STR( On ) )
	699
	700	PORT_START("DSWC")
	701	PORT_DIPUNUSED( 0x01, IP_ACTIVE_LOW )
	702	PORT_DIPUNUSED( 0x02, IP_ACTIVE_LOW )
	703	PORT_DIPUNUSED( 0x04, IP_ACTIVE_LOW )
	704	PORT_DIPUNUSED( 0x08, IP_ACTIVE_LOW )
	705	PORT_DIPNAME( 0x10, 0x10, "Infinite Bullets" )          /* see notes */
	706	PORT_DIPSETTING(   0x10, DEF_STR( Off ) )
	707	PORT_DIPSETTING(   0x00, DEF_STR( On ) )
	708	PORT_DIPUNUSED( 0x20, IP_ACTIVE_LOW )
	709	PORT_DIPUNUSED( 0x40, IP_ACTIVE_LOW )
	710	PORT_DIPUNUSED( 0x80, IP_ACTIVE_LOW )
	711
	712	PORT_START("IN0")
	713	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
	714	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )            /* IPT_START2 is some similar Taito games (eg: 'flstory') */
	715	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
	716	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
	717	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
	718	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
	719	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	720	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	721
	722	PORT_START("IN1")
	723	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
	724	PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
	725
	726	PORT_START("LIGHTX")
	727	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1)
	728
	729	PORT_START("LIGHTY")
	730	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(Y, -1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1)
	731	INPUT_PORTS_END
	732
	733	/* verified from Z80 code */
	734	static INPUT_PORTS_START( bronx )
	735	PORT_INCLUDE( cyclshtg )
	736
	737	PORT_MODIFY("DSWB")
	738	PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )            /* see notes */
	739	PORT_DIPSETTING(   0x00, "1" )
	740	PORT_DIPSETTING(   0x30, "2" )
	741	PORT_DIPSETTING(   0x10, "4" )
	742	PORT_DIPSETTING(   0x20, "5" )
	743	INPUT_PORTS_END
	744
	745
666	746	static const gfx_layout charlayout =
667	747	{
668	748	8,8,
r8962	r8963
1282	1362	ROM_LOAD( "a50_14",   0x1c000, 0x4000, CRC(24b2f1bf) SHA1(4757aec2e4b99ce33d993ce1e19ee46a4eb76e86) )
1283	1363	ROM_END
1284	1364
	1365	static DRIVER_INIT( nycaptor )
	1366	{
	1367	nycaptor_state *state = machine->driver_data<nycaptor_state>();
	1368	state->gametype = 0;
	1369	}
	1370
	1371	static DRIVER_INIT( cyclshtg )
	1372	{
	1373	nycaptor_state *state = machine->driver_data<nycaptor_state>();
	1374	state->gametype = 1;
	1375	}
	1376
1285	1377	static DRIVER_INIT( bronx )
1286	1378	{
1287	1379	nycaptor_state *state = machine->driver_data<nycaptor_state>();
r8962	r8963
1306	1398	state->gametype = 2;
1307	1399	}
1308	1400
1309		static DRIVER_INIT( nycaptor )
1310		{
1311		nycaptor_state *state = machine->driver_data<nycaptor_state>();
1312		state->gametype = 0;
1313		}
1314
1315		static DRIVER_INIT( cyclshtg )
1316		{
1317		nycaptor_state *state = machine->driver_data<nycaptor_state>();
1318		state->gametype = 1;
1319		}
1320
1321	1401	GAME( 1985, nycaptor, 0,        nycaptor, nycaptor, nycaptor, ROT0,  "Taito",   "N.Y. Captor", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
1322	1402	GAME( 1986, cyclshtg, 0,        cyclshtg, cyclshtg, cyclshtg, ROT90, "Taito",   "Cycle Shooting", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1323	1403	/* bootlegs */
1324		GAME( 1986, bronx,    cyclshtg, bronx,    cyclshtg, bronx,    ROT90, "bootleg", "Bronx", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
1325		GAME( 1986, colt ,    nycaptor, bronx,    nycaptor, colt,     ROT0,  "bootleg", "Colt", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
	1404	GAME( 1986, bronx,    cyclshtg, bronx,    bronx,    bronx,    ROT90, "bootleg", "Bronx", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1405	GAME( 1986, colt,     nycaptor, bronx,    colt,     colt,     ROT0,  "bootleg", "Colt", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )

src/mame/drivers/mitchell.c

r8962	r8963
2119	2119
2120	2120	static void bootleg_decode( running_machine *machine )
2121	2121	{
2122		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2123		memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x50000);
	2122	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2123	space->set_decrypted_region(0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x50000);
2124	2124	memory_configure_bank_decrypted(machine, "bank1", 0, 16, memory_region(machine, "maincpu") + 0x60000, 0x4000);
2125	2125	}
2126	2126

src/mame/drivers/mainsnk.c

r8962	r8963
111	111	#include "cpu/z80/z80.h"
112	112	#include "includes/snk.h"
113	113	#include "sound/ay8910.h"
	114	#include "includes/mainsnk.h"
114	115
115		extern UINT8 *mainsnk_fgram;
116		extern UINT8 *mainsnk_bgram;
117		WRITE8_HANDLER(mainsnk_c600_w);
118		WRITE8_HANDLER(mainsnk_fgram_w);
119		WRITE8_HANDLER(mainsnk_bgram_w);
120		VIDEO_START(mainsnk);
121		VIDEO_UPDATE(mainsnk);
122
123		static int sound_cpu_busy;
124
125
126	116	static WRITE8_HANDLER( sound_command_w )
127	117	{
128		sound_cpu_busy = 1;
	118	mainsnk_state *state = space->machine->driver_data<mainsnk_state>();
	119
	120	state->sound_cpu_busy = 1;
129	121	soundlatch_w(space, 0, data);
130	122	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
131	123	}
r8962	r8963
137	129
138	130	static READ8_HANDLER( sound_ack_r )
139	131	{
140		sound_cpu_busy = 0;
	132	mainsnk_state *state = space->machine->driver_data<mainsnk_state>();
	133
	134	state->sound_cpu_busy = 0;
141	135	return 0xff;
142	136	}
143	137
144	138	static CUSTOM_INPUT( mainsnk_sound_r )
145	139	{
146		return (sound_cpu_busy) ? 0x01 : 0x00;
	140	mainsnk_state *state = field->port->machine->driver_data<mainsnk_state>();
	141
	142	return (state->sound_cpu_busy) ? 0x01 : 0x00;
147	143	}
148	144
149	145
r8962	r8963
158	154	AM_RANGE(0xc500, 0xc500) AM_READ_PORT("DSW2")
159	155	AM_RANGE(0xc600, 0xc600) AM_WRITE(mainsnk_c600_w)
160	156	AM_RANGE(0xc700, 0xc700) AM_WRITE(sound_command_w)
161		AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(mainsnk_bgram_w) AM_BASE(&mainsnk_bgram)
	157	AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(mainsnk_bgram_w) AM_BASE_MEMBER(mainsnk_state, bgram)
162	158	AM_RANGE(0xdc00, 0xe7ff) AM_RAM
163		AM_RANGE(0xe800, 0xefff) AM_RAM AM_BASE_GENERIC(spriteram)
164		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(mainsnk_fgram_w) AM_BASE(&mainsnk_fgram)   // + work RAM
	159	AM_RANGE(0xe800, 0xefff) AM_RAM AM_BASE_MEMBER(mainsnk_state, spriteram)
	160	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(mainsnk_fgram_w) AM_BASE_MEMBER(mainsnk_state, fgram)   // + work RAM
165	161	ADDRESS_MAP_END
166	162
167	163	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
395	391
396	392
397	393	static MACHINE_DRIVER_START( mainsnk )
	394
	395	MDRV_DRIVER_DATA( mainsnk_state )
	396
398	397	MDRV_CPU_ADD("maincpu", Z80, 3360000)
399	398	MDRV_CPU_PROGRAM_MAP(main_map)
400	399	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)

src/mame/drivers/segaxbd.c

r8962	r8963
386	386	static TIMER_CALLBACK( delayed_sound_data_w )
387	387	{
388	388	segas1x_state *state = machine->driver_data<segas1x_state>();
389		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	389	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
390	390
391	391	soundlatch_w(space, 0, param);
392	392	cpu_set_input_line(state->soundcpu, INPUT_LINE_NMI, ASSERT_LINE);

src/mame/drivers/nbmj9195.c

r8962	r8963
496	496
497	497	static MACHINE_RESET( sailorws )
498	498	{
499		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	499	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
500	500	int i;
501	501
502	502	// initialize TMPZ84C011 PIO
r8962	r8963
509	509
510	510	static DRIVER_INIT( nbmj9195 )
511	511	{
512		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	512	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
513	513	UINT8 *ROM = memory_region(machine, "audiocpu");
514	514
515	515	// sound program patch

src/mame/drivers/skeetsht.c

r8962	r8963
47	47
48	48	state->ay = machine->device("aysnd");
49	49	state->tms = machine->device("tms");
50
51		/* Setup the Bt476 VGA RAMDAC palette chip */
52		tlc34076_reset(6);
53	50	}
54	51
55	52
r8962	r8963
66	63	static void skeetsht_scanline_update(screen_device &screen, bitmap_t *bitmap, int scanline, const tms34010_display_params *params)
67	64	{
68	65	skeetsht_state *state = screen.machine->driver_data<skeetsht_state>();
69		const rgb_t *const pens = tlc34076_get_pens();
	66	const rgb_t *const pens = tlc34076_get_pens(screen.machine->device("tlc34076"));
70	67	UINT16 *vram = &state->tms_vram[(params->rowaddr << 8) & 0x3ff00];
71	68	UINT32 *dest = BITMAP_ADDR32(bitmap, scanline, 0);
72	69	int coladdr = params->coladdr;
r8962	r8963
87	84	if (offset & 8)
88	85	offset = (offset & ~8) | 4;
89	86
90		return tlc34076_r(space, offset);
	87	return tlc34076_r(space->machine->device("tlc34076"), offset);
91	88	}
92	89
93	90	static WRITE16_HANDLER( ramdac_w )
r8962	r8963
97	94	if (offset & 8)
98	95	offset = (offset & ~8) | 4;
99	96
100		tlc34076_w(space, offset, data);
	97	tlc34076_w(space->machine->device("tlc34076"), offset, data);
101	98	}
102	99
103	100
r8962	r8963
243	240	};
244	241
245	242
	243
246	244	/*************************************
247	245	*
248	246	*  Machine driver
r8962	r8963
264	262
265	263	MDRV_MACHINE_RESET(skeetsht)
266	264
	265	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	266
267	267	MDRV_SCREEN_ADD("screen", RASTER)
268	268	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
269	269	MDRV_SCREEN_RAW_PARAMS(48000000 / 8, 156*4, 0, 100*4, 328, 0, 300) // FIXME

src/mame/drivers/arabian.c

r8962	r8963
441	441	ROM_LOAD( "ic4rev2.90", 0x6000, 0x2000, CRC(32b77b44) SHA1(9d7951e723bc65e3d607f89836f1436b99f2585b) )
442	442
443	443	ROM_REGION( 0x10000, "gfx1", 0 )
444		ROM_LOAD( "ic84.91",    0x0000, 0x2000, CRC(c4637822) SHA1(0c73d9a4db925421a535784780ad93bb0f091051) )
445		ROM_LOAD( "ic85.92",    0x2000, 0x2000, CRC(f7c6866d) SHA1(34f545c5f7c152cd59f7be0a72105f739852cd6a) )
446		ROM_LOAD( "ic86.93",    0x4000, 0x2000, CRC(71acd48d) SHA1(cd0bffed351b14c9aebbfc1d3d4d232a5b91a68f) )
447		ROM_LOAD( "ic87.94",    0x6000, 0x2000, CRC(82160b9a) SHA1(03511f6ebcf22ba709a80a565e71acf5bdecbabb) )
	444	ROM_LOAD( "tvg-91.ic84", 0x0000, 0x2000, CRC(c4637822) SHA1(0c73d9a4db925421a535784780ad93bb0f091051) )
	445	ROM_LOAD( "tvg-92.ic85", 0x2000, 0x2000, CRC(f7c6866d) SHA1(34f545c5f7c152cd59f7be0a72105f739852cd6a) )
	446	ROM_LOAD( "tvg-93.ic86", 0x4000, 0x2000, CRC(71acd48d) SHA1(cd0bffed351b14c9aebbfc1d3d4d232a5b91a68f) )
	447	ROM_LOAD( "tvg-94.ic87", 0x6000, 0x2000, CRC(82160b9a) SHA1(03511f6ebcf22ba709a80a565e71acf5bdecbabb) )
448	448	ROM_END
449	449
450	450
451	451	ROM_START( arabiana )
452	452	ROM_REGION( 0x10000, "maincpu", 0 )
453		ROM_LOAD( "ic1.87",     0x0000, 0x2000, CRC(51e9a6b1) SHA1(a2e6beab5380eed56972f5625be21b01c7e2082a) )
454		ROM_LOAD( "ic2.88",     0x2000, 0x2000, CRC(1cdcc1ab) SHA1(46886d53cc8a1c1d540fd0e1ddf1811fb256c1f3) )
455		ROM_LOAD( "ic3.89",     0x4000, 0x2000, CRC(b7b7faa0) SHA1(719418b7b7c057acb6d3060cf7061ffacf00798c) )
456		ROM_LOAD( "ic4.90",     0x6000, 0x2000, CRC(dbded961) SHA1(ecc09fa95f6dd58c4ac0e095a89ffd3aae681da4) )
	453	ROM_LOAD( "tvg-87.ic1", 0x0000, 0x2000, CRC(51e9a6b1) SHA1(a2e6beab5380eed56972f5625be21b01c7e2082a) )
	454	ROM_LOAD( "tvg-88.ic2", 0x2000, 0x2000, CRC(1cdcc1ab) SHA1(46886d53cc8a1c1d540fd0e1ddf1811fb256c1f3) )
	455	ROM_LOAD( "tvg-89.ic3", 0x4000, 0x2000, CRC(b7b7faa0) SHA1(719418b7b7c057acb6d3060cf7061ffacf00798c) )
	456	ROM_LOAD( "tvg-90.ic4", 0x6000, 0x2000, CRC(dbded961) SHA1(ecc09fa95f6dd58c4ac0e095a89ffd3aae681da4) )
457	457
458	458	ROM_REGION( 0x10000, "gfx1", 0 )
459		ROM_LOAD( "ic84.91",    0x0000, 0x2000, CRC(c4637822) SHA1(0c73d9a4db925421a535784780ad93bb0f091051) )
460		ROM_LOAD( "ic85.92",    0x2000, 0x2000, CRC(f7c6866d) SHA1(34f545c5f7c152cd59f7be0a72105f739852cd6a) )
461		ROM_LOAD( "ic86.93",    0x4000, 0x2000, CRC(71acd48d) SHA1(cd0bffed351b14c9aebbfc1d3d4d232a5b91a68f) )
462		ROM_LOAD( "ic87.94",    0x6000, 0x2000, CRC(82160b9a) SHA1(03511f6ebcf22ba709a80a565e71acf5bdecbabb) )
	459	ROM_LOAD( "tvg-91.ic84", 0x0000, 0x2000, CRC(c4637822) SHA1(0c73d9a4db925421a535784780ad93bb0f091051) )
	460	ROM_LOAD( "tvg-92.ic85", 0x2000, 0x2000, CRC(f7c6866d) SHA1(34f545c5f7c152cd59f7be0a72105f739852cd6a) )
	461	ROM_LOAD( "tvg-93.ic86", 0x4000, 0x2000, CRC(71acd48d) SHA1(cd0bffed351b14c9aebbfc1d3d4d232a5b91a68f) )
	462	ROM_LOAD( "tvg-94.ic87", 0x6000, 0x2000, CRC(82160b9a) SHA1(03511f6ebcf22ba709a80a565e71acf5bdecbabb) )
463	463	ROM_END
464	464
465	465

src/mame/drivers/hotstuff.c

r0	r8963
	1	/* TAS 5 REEL system? by Olympic Video Gaming */
	2
	3	#include "emu.h"
	4	#include "cpu/m68000/m68000.h"
	5
	6	static UINT16* hotstuff_bitmapram;
	7
	8	VIDEO_START( hotstuff )
	9	{
	10
	11	}
	12
	13	/* the first 0x20 bytes in every 0x200 (each line) of video ram are the colour data, providing a palette of 16 RGB444 colours for that line */
	14
	15	VIDEO_UPDATE( hotstuff )
	16	{
	17	int count, y,yyy,x,xxx;
	18	UINT16 row_palette_data[0x10];
	19	rgb_t row_palette_data_as_rgb32_pen_data[0x10];
	20
	21	yyy=512;xxx=512*2;
	22
	23	count = 0;
	24	for (y = 0; y < yyy; y++)
	25	{
	26	// the current palette is stored in the first 0x20 bytes of each row!
	27	int p;
	28
	29	for (p=0;p<0x10;p++)
	30	{
	31	row_palette_data[p] = hotstuff_bitmapram[count+p];
	32
	33	row_palette_data_as_rgb32_pen_data[p] = MAKE_RGB( (row_palette_data[p] & 0x0f00)>>4, (row_palette_data[p] & 0x00f0)>>0, (row_palette_data[p] & 0x000f)<<4  );
	34
	35	}
	36
	37	for(x = 0; x < xxx; x++)
	38	{
	39	{
	40	*BITMAP_ADDR32(bitmap, y, x) = row_palette_data_as_rgb32_pen_data[(hotstuff_bitmapram[count] &0xf000)>>12];
	41	x++;
	42	*BITMAP_ADDR32(bitmap, y, x) = row_palette_data_as_rgb32_pen_data[(hotstuff_bitmapram[count] &0x0f00)>>8];
	43	x++;
	44	*BITMAP_ADDR32(bitmap, y, x) = row_palette_data_as_rgb32_pen_data[(hotstuff_bitmapram[count] &0x00f0)>>4];
	45	x++;
	46	*BITMAP_ADDR32(bitmap, y, x) = row_palette_data_as_rgb32_pen_data[(hotstuff_bitmapram[count] &0x000f)>>0];
	47	}
	48
	49	count++;
	50	}
	51	}
	52
	53	return 0;
	54	}
	55
	56	static ADDRESS_MAP_START( hotstuff_map, ADDRESS_SPACE_PROGRAM, 16 )
	57	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	58
	59	AM_RANGE(0x400000, 0x40ffff) AM_RAM
	60
	61	AM_RANGE(0x980000, 0x9bffff) AM_RAM AM_BASE(&hotstuff_bitmapram)
	62	ADDRESS_MAP_END
	63
	64	static INPUT_PORTS_START( hotstuff )
	65	INPUT_PORTS_END
	66
	67	static MACHINE_DRIVER_START( hotstuff )
	68
	69	MDRV_CPU_ADD("maincpu", M68000, 16000000)
	70	MDRV_CPU_PROGRAM_MAP(hotstuff_map)
	71	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
	72
	73	MDRV_SCREEN_ADD("screen", RASTER)
	74	MDRV_SCREEN_REFRESH_RATE(60)
	75	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	76	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
	77	MDRV_SCREEN_SIZE(128*8, 64*8)
	78	MDRV_SCREEN_VISIBLE_AREA((0x10*4)+8, 101*8-1, 0*8, 33*8-1)
	79
	80	MDRV_PALETTE_LENGTH(0x200)
	81
	82	MDRV_VIDEO_START(hotstuff)
	83	MDRV_VIDEO_UPDATE(hotstuff)
	84	MACHINE_DRIVER_END
	85
	86
	87
	88	ROM_START( hotstuff )
	89	ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */
	90	ROM_LOAD16_WORD_SWAP( "hot stuff game u6 (68000).bin", 0x00000, 0x80000, CRC(65f6a72f) SHA1(3a6d489ec3bf351018e279605d42f10b0a2c61b1) )
	91
	92	ROM_REGION( 0x80000, "data", 0 ) /* 68000 Data? */
	93	ROM_LOAD16_WORD_SWAP( "hot stuff symbol u8 (68000).bin", 0x00000, 0x80000, CRC(f154a157) SHA1(92ae0fb977e2dcc0377487d768f95c6e447e990b) )
	94	ROM_END
	95
	96	GAME( ????, hotstuff,    0,        hotstuff,    hotstuff,    0, ROT0,  "Olympic Video Gaming", "Olympic Hot Stuff (TAS 5 Reel System)", GAME_NOT_WORKING | GAME_NO_SOUND )

src/mame/drivers/mediagx.c

r8962	r8963
846	846	offs_t page_offset = (((offs_t) state->dma_offset[0][state->dma_channel]) << 16)
847	847	& 0xFF0000;
848	848
849		return memory_read_byte(space, page_offset + offset);
	849	return space->read_byte(page_offset + offset);
850	850	}
851	851
852	852
r8962	r8963
856	856	offs_t page_offset = (((offs_t) state->dma_offset[0][state->dma_channel]) << 16)
857	857	& 0xFF0000;
858	858
859		memory_write_byte(space, page_offset + offset, data);
	859	space->write_byte(page_offset + offset, data);
860	860	}
861	861
862	862	static void set_dma_channel(running_device *device, int channel, int _state)
r8962	r8963
1206	1206
1207	1207	#if SPEEDUP_HACKS
1208	1208
1209		INLINE UINT32 generic_speedup(const address_space *space, int idx)
	1209	INLINE UINT32 generic_speedup(address_space *space, int idx)
1210	1210	{
1211	1211	mediagx_state *state = space->machine->driver_data<mediagx_state>();
1212	1212

src/mame/drivers/policetr.c

r8962	r8963
417	417	*
418	418	*************************************/
419	419
420		static const r3000_cpu_core config =
	420	static const r3000_cpu_core r3000_config =
421	421	{
422	422	0,      /* 1 if we have an FPU, 0 otherwise */
423	423	4096,   /* code cache size */
r8962	r8963
429	429
430	430	/* basic machine hardware */
431	431	MDRV_CPU_ADD("maincpu", R3000BE, MASTER_CLOCK/2)
432		MDRV_CPU_CONFIG(config)
	432	MDRV_CPU_CONFIG(r3000_config)
433	433	MDRV_CPU_PROGRAM_MAP(policetr_map)
434	434	MDRV_CPU_VBLANK_INT("screen", irq4_gen)
435	435

src/mame/drivers/skimaxx.c

r8962	r8963
150	150	*************************************/
151	151
152	152	// TODO: Might not be used
153		static void skimaxx_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	153	static void skimaxx_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
154	154	{
155	155	memcpy(shiftreg, &fg_buffer[TOWORD(address)], 512 * sizeof(UINT16));
156	156	}
157	157
158		static void skimaxx_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	158	static void skimaxx_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
159	159	{
160	160	memcpy(&fg_buffer[TOWORD(address)], shiftreg, 512 * sizeof(UINT16));
161	161	}

src/mame/drivers/megadrvb.c

r0	r8963
	1	/***************************************************************************
	2
	3	Sega Mega Drive/Genesis-based bootlegs
	4
	5	Games supported:
	6	* Aladdin
	7	* Mortal Kombat 3
	8	* Super Street Fighter II - The New Challengers
	9	* Top Shooter
	10
	11
	12	Aladdin PCB info
	13	================
	14
	15	CPU
	16	Main CPU 68000P10
	17	Work RAM 64kB (62256 x2)
	18	Sound CPU Z80B
	19	Sound RAM 8kB (76c88-6264 x1)
	20	Sound IC YM2612 (identified by pins,code was been erased.Named on board as TA07)
	21
	22	Other ICs
	23	Microchip PIC16C57 (probably it contains the MD modified bios)
	24	Osc 50 MHz
	25	There are present 3 flat-pack chips with code erased again and named TA04,TA05,TA06 on board,which i have
	26	identified (generically) by looking the PCB as:
	27	TA04-Intercommunication and sync generator chip
	28	TA05-Input controller
	29	TA06-VDP (probably MD clone) Uses 2x D41264 SIL package as video RAM
	30
	31	ROMs
	32
	33	M3,M4 main program
	34	M1,M2 graphics
	35	All EPROMs are 27C040
	36
	37	Notes:
	38
	39	Dip-switch 8 x1
	40
	41	------------------------
	42
	43	This ROMset comes from a bootleg PCB.The game is a coin-op conversion of the one developed for the Megadrive
	44	console.I cannot know gameplay differences since PCB is faulty.
	45
	46	However,hardware is totally different.It seems to be based on Sega Mega Drive hardware with CPU clock increased,
	47	and since exists an "unlicensed" porting of the game for this system probably the "producers" are the same.
	48
	49
	50	Stephh's notes (based on the game M68000 code and some tests) :
	51
	52	1) Useful addresses
	53
	54	- 0xffff88.b = number of credits (range 0x00-0xff but display limited to 9)
	55	- 0xff7e3c.b = lives (range 0x30-0x39)
	56	- 0xffeffa.b = energy (range 0x00-0x08)
	57	- 0xffefe0.w = apples (range 0x30-0x39 * 2 , MSB first)
	58	- 0xffefe2.w = jewels (range 0x30-0x39 * 2 , MSB first)
	59	- 0xff7e29.b to 0xff7e2e.b = score (range 0x30-0x39 * 6) - MSDigit first
	60	- 0xff7e12.b to 0xff7e15.b = ??? (range 0x30-0x33 * 3 + 0x00) - MSDigit first - see below
	61	- 0xff7e16.b to 0xff7e19.b = ??? (range 0x30-0x33 * 3 + 0x00) - MSDigit first - see below
	62	- 0xff7e21.b = difficulty (range 0x00-0x02) - see below
	63
	64	2) Adresses notes
	65
	66	- I can't tell what adresses 0xff7r12.l and 0xff7e16.l are supposed to be designed for :
	67	they are written once at the begining of each level (code at 0x1a9030) but I haven't found
	68	when they were read back (I've only played the 2 first levels though as well as the bonus level,
	69	but I also watched all demo levels till the end after the games full credits).
	70	I guess they were originally designed for bonus lives (additional and first), but no evidence.
	71	- 0xff7e21.b affects contents of 0xff7e3c.b, 0xffefe0.w, 0xff7e12.l and 0xff7e16.l :
	72
	73	Easy             Normal             Hard
	74	0xff7e21.b=0x00   0xff7e21.b=0x01   0xff7e21.b=0x02
	75	0xff7e3c.b      0x32              0x31              0x30
	76	0xffefe0.w      0x3035            0x3032            0x3030
	77	0xff7e12.l      0x30313000        0x30313200        0x30313400
	78	0xff7e16.l      0x30303900        0x30313200        0x30313500
	79
	80	3) MCU notes
	81
	82	- As I don't know how it is on real hardware, MCU simulation is more a guess than anything;
	83	anyway, the game now runs correctly (coins are handled and settings change)
	84	- Difficulty Dip Switches are correct (see code at 0x1b2680)
	85	- Coinage Dip Switches might be wrong because I don't know what the possible values can be,
	86	but setting them the way I did isn't that bad (see code at 0x1b2a50)
	87	- It's possible that writes to 0x220000 are in fact a mask for what is read back from 0x330000,
	88	but I haven't found any formula (thus the "lame" read/write handlers you may investigate)
	89
	90	4) Controls notes
	91
	92	- This game is a one player only game (same as the MegaDrive version);
	93	that's why I've "blanked" player 2 inputs which are never read.
	94	- I've labelled the buttons the same way as in 'g_aladj' with default options.
	95
	96	5) MegaDrive comparaison ('g_aladj' in HazeMD)
	97
	98	- There is no "OPTIONS" menu as the difficulty is handled via the MCU / Dip Switches.
	99	Some code has been patched but most is still there (see the texts in the ROM ares);
	100	Unfortunately, there seems to be no way to access them (no "service" button).
	101	- Even with the same settings (same value for 0xff7e21.b), lives and apples,
	102	as well as contents of 0xff7e12.l and 0xff7e16.l are really different) !
	103	Here is the same data as above for 'g_aladj' :
	104
	105	Easy             Normal             Hard
	106	0xff7e21.b=0x00   0xff7e21.b=0x01   0xff7e21.b=0x02
	107	0xff7e3c.b      0x35              0x33              0x32
	108	0xffefe0.w      0x3135            0x3130            0x3035
	109	0xff7e12.l      0x30303600        0x30303800        0x30313000
	110	0xff7e16.l      0x30303300        0x30303600        0x30303900
	111
	112	But what makes the arcade version much harder is how energy is handled : in 'g_aladj', you can
	113	be hit 8 times before you lose a life, while in 'aladbl', you lose a life as soon as you are hit !
	114	This is done via code change at 0x1aee3c and patched code at 0x1afc00 :
	115
	116	diff aladbl.asm g_aladj.asm
	117
	118	< 1AEE3C: 4EB9 001A FC00             jsr     $1afc00.l
	119	> 1AEE3C: 5339 00FF EFFA             subq.b  #1, $ffeffa.l
	120
	121	< 1AFC00: 0C39 0001 00FF F57C        cmpi.b  #$1, $fff57c.l
	122	< 1AFC08: 6700 000A                  beq     $1afc14
	123	< 1AFC0C: 4239 00FF EFFA             clr.b   $ffeffa.l
	124	< 1AFC12: 4E75                       rts
	125	< 1AFC14: 5339 00FF EFFA             subq.b  #1, $ffeffa.l
	126	< 1AFC1A: 4E75                       rts
	127
	128	Surprisingly, when you are in "demo mode", player can be again be hit 8 times
	129	before losing a life (this is the purpose of the 0xfff57c "flag") !
	130
	131	****************************************************************************
	132
	133	Top Shooter PCB info
	134	====================
	135
	136	Sun Mixing board, looks like a hacked up Genesis clone.
	137
	138	Original driver by David Haywood
	139	Inputs by Mariusz Wojcieszek
	140
	141	Top Shooter - (c)1995  - older board, look more like an actual hacked cart system, has an MCU
	142
	143	Not Dumped
	144
	145	Super Bubble Bobble (a bubble bobble rip-off from Sun Mixing, looks like it may be on this hardware)
	146
	147	TOP SHOOTER - Sun Mixing Co. Ltd. 1995
	148
	149	To me it seems like an original cartridge-based arcade board
	150	hacked to use an external ROM board and a standard JAMMA
	151	connector, but of course, I can be wrong.
	152
	153
	154	UPPER BOARD
	155
	156	_________________________________________________________
	157	|            ___________  ___________  _____      __    |
	158	| 74LS245P  |U14 Empty | |U12 ROM1  |  |IC1|      |B|   |
	159	| 74LS245P  |__________| |__________|  |___|            |
	160	| 74LS245P   ___________  ___________    _____________  |
	161	__|           |U13 Empty | |U11 ROM2  |   | AT89C51    |  |
	162	|_ J          |__________| |__________|   |____________|  |_
	163	|_ A           ______________________              _____  |_ J
	164	|_ M          | U10 MC68000P10       |             |OSC|  |_ P
	165	|_ M          | Motorola             |                    |_ 2
	166	|_ A          |______________________|            74HC00P |_
	167	|_  74LS245P   ______________________           ________  |
	168	|_            | U9 Empty             |          |HM6116L  |
	169	|_            |                      |          |_______| |_ J
	170	|_            |______________________|                    |_ P
	171	|_  74LS245P                           TD62oo3AP 74LS373P |_ 3
	172	|_                                            __________  |
	173	|_  74LS245P                                  |GALv20V8B| |
	174	|_                                    ______              |
	175	|_               _____                |DIPS|              |_ P
	176	|             |U24  |                                   |_ 1
	177	| 74LS245P                                              |
	178	| TD62oo3AP                                             |
	179	|                                                       |
	180	|_            97              ____________         _____|
	181	|_|_|_|_|_|_|_|_|_|_|_|_|_|_|           |_|_|_|_|
	182
	183
	184	IC1 = Surface scracthed out, don't know what is it
	185	U24 = Surface scratched out, seems like a PROM
	186	DIPs = Fixed as: 00001000
	187	ROMs = Toshiba TC574000AD
	188
	189	JP2, JP3 and P1 connects both boards, also another
	190	on-board connector is used, see notes for the 68K socket
	191	for the lower board.
	192
	193
	194	LOWER BOARD
	195
	196	_________________________________________________________
	197	|                                     ____ ____         |
	198	|  ___                                | I| | I|         |
	199	|  |I|                                | C| | C|         |
	200	|  |C|                                | 3| | 2|         |
	201	|  |1|                                |__| |__|         |
	202	|  |3|                                                  |__
	203	|   _                _________________________           __|
	204	|  |_|               |||||||||||||||||||||||||           __|
	205	|  IC14              ---------- SLOT ---------           __|
	206	|               ______________________                   __|
	207	|              |                      |                  __|
	208	|  ___         | 68K (to upper board) |   _______        __|
	209	|  |I|         |______________________|   |SE-94|        __|
	210	|  |C|                                    |JDDB |      _|
	211	|  |1|           _______                  |_____|      |
	212	|  |2|           |SE-93|                    IC4        |
	213	|                |JDDA |                               |
	214	|                |_____|                ___________    |_
	215	|                  IC8                  |Z8400A PS|     |
	216	|                                       |_________|     |
	217	|                  ______         _________  _________  |
	218	|                  | OSC|         | IC11  |  | IC7   |  |
	219	|            _____________        |_______|  |_______|  |
	220	|    RST    |            |           CN5        CN6     |
	221	|___________|            |______________________________|
	222
	223
	224	IC3 = IC2 = Winbond W24257V
	225	IC7  = 6264LD 9440
	226	IC11 = SE-95 JDDC
	227	IC12 = Sony CXA1634P
	228	IC13 = Sony CXA1145P
	229	IC14 = GL358 N16
	230
	231	RST is a reset button.
	232
	233	OSC = 53.693175 MHz
	234
	235	CN5 and CN6 are 9-pin connectors... serial ports?
	236
	237	There are two wires soldered directly to two connectors
	238	of the slot, going to the upper board (via P1).
	239
	240	The whole upper board is plugged using the 68000 socket,
	241	there is no 68K on the lower board.
	242
	243	There is an edge connector, but it isn't JAMMA.
	244
	245	"HK-986 (KINYO)" is written on the PCB, near the slot.
	246
	247	****************************************************************************/
	248
	249	#include "emu.h"
	250	#include "includes/megadriv.h"
	251
	252
	253	/*************************************
	254	*
	255	*  Games memory handlers
	256	*
	257	*************************************/
	258
	259	static WRITE16_HANDLER( aladbl_w )
	260	{
	261	/*
	262	Values returned from the log file :
	263	- aladbl_w : 1b2a6c - data = 6600 (each time a coin is inserted)
	264	- aladbl_w : 1b2a82 - data = 0000 (each time a coin is inserted)
	265	- aladbl_w : 1b2d18 - data = aa00 (only once on reset)
	266	- aladbl_w : 1b2d42 - data = 0000 (only once on reset)
	267	*/
	268	logerror("aladbl_w : %06x - data = %04x\n",cpu_get_pc(space->cpu),data);
	269	}
	270
	271	static READ16_HANDLER( aladbl_r )
	272	{
	273	if (cpu_get_pc(space->cpu)==0x1b2a56)
	274	{
	275	static UINT16 mcu_port;
	276
	277	mcu_port = input_port_read(space->machine, "MCU");
	278
	279	if(mcu_port & 0x100)
	280	return ((mcu_port & 0x0f) | 0x100); // coin inserted, calculate the number of coins
	281	else
	282	return (0x100); //MCU status, needed if you fall into a pitfall
	283	}
	284	if (cpu_get_pc(space->cpu)==0x1b2a72) return 0x0000;
	285	if (cpu_get_pc(space->cpu)==0x1b2d24) return (input_port_read(space->machine, "MCU") & 0x00f0) | 0x1200;    // difficulty
	286	if (cpu_get_pc(space->cpu)==0x1b2d4e) return 0x0000;
	287
	288	logerror("aladbl_r : %06x\n",cpu_get_pc(space->cpu));
	289
	290	return 0x0000;
	291	}
	292
	293
	294	static READ16_HANDLER( mk3ghw_dsw_r )
	295	{
	296	static const char *const dswname[3] = { "DSWA", "DSWB", "DSWC" };
	297	return input_port_read(space->machine, dswname[offset]);
	298	}
	299
	300	static READ16_HANDLER( ssf2ghw_dsw_r )
	301	{
	302	static const char *const dswname[3] = { "DSWA", "DSWB", "DSWC" };
	303	return input_port_read(space->machine, dswname[offset]);
	304	}
	305
	306	static READ16_HANDLER(topshoot_200051_r)
	307	{
	308	return -0x5b;
	309	}
	310
	311	/*************************************
	312	*
	313	*  Game-specific port definitions
	314	*
	315	*************************************/
	316
	317	static INPUT_PORTS_START( topshoot ) /* Top Shooter Input Ports */
	318
	319	PORT_START("IN0")
	320	PORT_BIT( 0x4f, IP_ACTIVE_LOW, IPT_UNKNOWN )
	321	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Bet") PORT_IMPULSE(1)
	322	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Start") PORT_IMPULSE(1)
	323	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Fire") PORT_IMPULSE(1)
	324
	325	PORT_START("IN1")
	326	PORT_BIT( 0xe7, IP_ACTIVE_LOW, IPT_UNKNOWN )
	327	PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
	328	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Test mode down") PORT_IMPULSE(1)
	329
	330	PORT_START("IN2")
	331	PORT_BIT( 0xfd, IP_ACTIVE_LOW, IPT_UNKNOWN )
	332	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
	333
	334	PORT_START("IN3")
	335	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
	336	PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNKNOWN )
	337	INPUT_PORTS_END
	338
	339	/*************************************
	340	*
	341	*  ROM definition(s)
	342	*
	343	*************************************/
	344
	345	ROM_START( aladbl )
	346	ROM_REGION( 0x400000, "maincpu", 0 ) /* 68000 Code */
	347	ROM_LOAD16_BYTE( "m1.bin", 0x000001, 0x080000,  CRC(5e2671e4) SHA1(54705c7614fc7b5a1065478fa41f51dd1d8045b7) )
	348	ROM_LOAD16_BYTE( "m2.bin", 0x000000, 0x080000,  CRC(142a0366) SHA1(6c94aa9936cd11ccda503b52019a6721e64a32f0) )
	349	ROM_LOAD16_BYTE( "m3.bin", 0x100001, 0x080000,  CRC(0feeeb19) SHA1(bd567a33077ab9997871d21736066140d50e3d70) )
	350	ROM_LOAD16_BYTE( "m4.bin", 0x100000, 0x080000,  CRC(bc712661) SHA1(dfd554d000399e17b4ddc69761e572195ed4e1f0))
	351	ROM_END
	352
	353	ROM_START( mk3ghw ) // roms are scrambled, we take care of the address descramble in the ROM load, and the data descramble in the init
	354	// this is bootlegged from  "Mortal Kombat 3 (4) [!].bin"
	355	ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASE00 ) /* 68000 Code */
	356	ROM_LOAD16_BYTE( "1.u1", 0x080001, 0x020000,  CRC(0dc01b23) SHA1(f1aa7ac88c8e3deb5a0a065862722e9d27b87b4c) )
	357	ROM_CONTINUE(            0x000001, 0x020000)
	358	ROM_CONTINUE(            0x0c0001, 0x020000)
	359	ROM_CONTINUE(            0x040001, 0x020000)
	360	ROM_LOAD16_BYTE( "2.u3", 0x180001, 0x040000,  CRC(50250235) SHA1(9f9e06f26163b92c76397fde43b38b3536bcb637) )
	361	ROM_CONTINUE(            0x100001, 0x040000)
	362	ROM_LOAD16_BYTE( "3.u9", 0x280001, 0x040000,  CRC(493404c1) SHA1(73f4bd1eeeee3f175f4378ab406a97f94f88880b) )
	363	ROM_CONTINUE(            0x200001, 0x040000)
	364	ROM_LOAD16_BYTE( "4.u11",0x380001, 0x040000,  CRC(a52156b8) SHA1(0990ef1fb3427a5d3c262e264feb25c1db75ed33) )
	365	ROM_CONTINUE(            0x300001, 0x040000)
	366	ROM_LOAD16_BYTE( "6.u2", 0x080000, 0x020000,  CRC(9852fd6f) SHA1(348befeca5129c5ea2c142760ec93511f98f23cc) )
	367	ROM_CONTINUE(            0x000000, 0x020000)
	368	ROM_CONTINUE(            0x0c0000, 0x020000)
	369	ROM_CONTINUE(            0x040000, 0x020000)
	370	ROM_LOAD16_BYTE( "5.u4", 0x180000, 0x040000,  CRC(ed6a6d13) SHA1(eaab912ee035ece03f7cfceb1b546004399daad5) )
	371	ROM_CONTINUE(            0x100000, 0x040000)
	372	ROM_LOAD16_BYTE( "7.u10",0x280000, 0x040000,  CRC(a124d8d1) SHA1(d391b130992701d0fae7e827ba314b8368d809de) )
	373	ROM_CONTINUE(            0x200000, 0x040000)
	374	ROM_LOAD16_BYTE( "8.u12",0x380000, 0x040000,  CRC(8176f7cc) SHA1(375e1e982b97ba709fb160b04f56f6aa2d580104) )
	375	ROM_CONTINUE(            0x300000, 0x040000)
	376	ROM_END
	377
	378	ROM_START( ssf2ghw )
	379	ROM_REGION( 0x1400000, "maincpu", 0 ) /* 68000 Code */
	380	/* Special Case, custom PCB, linear ROM mapping of 5meg */
	381	ROM_LOAD16_BYTE( "rom_a", 0x000000, 0x200000,  CRC(59726521) SHA1(3120bac17f56c01ffb9d3f9e31efa0263e3774af) )
	382	ROM_LOAD16_BYTE( "rom_b", 0x000001, 0x200000,  CRC(7dad5540) SHA1(9279068b2218d239fdd557dd959ac70e74853178) )
	383	ROM_LOAD16_BYTE( "rom_c", 0x400000, 0x080000,  CRC(deb48624) SHA1(39ffa7de7b808e0b95cb039bb381705d77420933) )
	384	ROM_LOAD16_BYTE( "rom_d", 0x400001, 0x080000,  CRC(b99f6a5b) SHA1(adbe28a7522024bc66328ac86fecf9ded3310e8e) )
	385	ROM_END
	386
	387	ROM_START( topshoot ) /* Top Shooter (c)1995 Sun Mixing */
	388	ROM_REGION( 0x200000, "maincpu", 0 )
	389	ROM_LOAD16_BYTE( "tc574000ad_u11_2.bin", 0x000000, 0x080000, CRC(b235c4d9) SHA1(fbb308a5f6e769f3277824cb6a3b50c308969ac2) )
	390	ROM_LOAD16_BYTE( "tc574000ad_u12_1.bin", 0x000001, 0x080000, CRC(e826f6ad) SHA1(23ec8bb608f954d3b915f061e7076c0c63b8259e) )
	391
	392	// not hooked up yet
	393	ROM_REGION( 0x1000, "mcu", 0 )
	394	ROM_LOAD( "89c51.bin", 0x0000, 0x1000, CRC(595475c8) SHA1(8313819ba06cc92b54f88c1ca9f34be8d1ec94d0) )
	395	ROM_END
	396
	397	/*************************************
	398	*
	399	*  Game-specific driver inits
	400	*
	401	*************************************/
	402
	403	#define ENERGY_CONSOLE_MODE 0
	404
	405	static DRIVER_INIT( aladbl )
	406	{
	407	/*
	408	* Game does a check @ 1afc00 with work RAM fff57c that makes it play like the original console version (i.e. 8 energy hits instead of 2)
	409	*/
	410	#if ENERGY_CONSOLE_MODE
	411	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
	412	rom[0x1afc08/2] = 0x6600;
	413	#endif
	414
	415	// 220000 = writes to mcu? 330000 = reads?
	416	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x220000, 0x220001, 0, 0, aladbl_w);
	417	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x330000, 0x330001, 0, 0, aladbl_r);
	418
	419	DRIVER_INIT_CALL(megadrij);
	420	}
	421
	422	// this should be correct, the areas of the ROM that differ to the original
	423	// after this decode look like intentional changes
	424	static DRIVER_INIT( mk3ghw )
	425	{
	426	int x;
	427	UINT8 *rom = memory_region(machine, "maincpu");
	428
	429	for (x=0x000001;x<0x100001;x+=2)
	430	{
	431	if (x&0x80000)
	432	{
	433	rom[x] = rom[x]^0xff;
	434	rom[x] = BITSWAP8(rom[x], 0,3,2,5,4,6,7,1);
	435	}
	436	else
	437	{
	438	rom[x] = rom[x]^0xff;
	439	rom[x] = BITSWAP8(rom[x], 4,0,7,1,3,6,2,5);
	440	}
	441	}
	442
	443	for (x=0x100001;x<0x400000;x+=2)
	444	{
	445	if (x&0x80000)
	446	{
	447	rom[x] = rom[x]^0xff;
	448	rom[x] = BITSWAP8(rom[x], 2,7,5,4,1,0,3,6);
	449	}
	450	else
	451	{
	452	rom[x] = BITSWAP8(rom[x], 6,1,4,2,7,0,3,5);
	453	}
	454	}
	455
	456	// boot vectors don't seem to be valid, so they are patched...
	457	rom[0x01] = 0x01;
	458	rom[0x00] = 0x00;
	459	rom[0x03] = 0x00;
	460	rom[0x02] = 0x00;
	461	rom[0x05] = 0x00;
	462	rom[0x04] = 0x00;
	463	rom[0x07] = 0x02;
	464	rom[0x06] = 0x10;
	465
	466	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770070, 0x770075, 0, 0, mk3ghw_dsw_r );
	467
	468	DRIVER_INIT_CALL(megadriv);
	469	}
	470
	471	static DRIVER_INIT( ssf2ghw )
	472	{
	473	memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xA130F0, 0xA130FF, 0, 0); // custom banking is disabled (!)
	474	memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400000, 0x5fffff, 0, 0, "bank5");
	475	memory_unmap_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400000, 0x5fffff, 0, 0);
	476
	477	memory_set_bankptr(machine,  "bank5", memory_region( machine, "maincpu" ) + 0x400000 );
	478
	479	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770070, 0x770075, 0, 0, ssf2ghw_dsw_r );
	480
	481	DRIVER_INIT_CALL(megadrij);
	482
	483	}
	484
	485	static DRIVER_INIT(topshoot)
	486	{
	487	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200050, 0x200051, 0, 0, topshoot_200051_r );
	488	memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200042, 0x200043, 0, 0, "IN0");
	489	memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200044, 0x200045, 0, 0, "IN1");
	490	memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200046, 0x200047, 0, 0, "IN2");
	491	memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200048, 0x200049, 0, 0, "IN3");
	492
	493	DRIVER_INIT_CALL(megadriv);
	494	}
	495
	496	/*************************************
	497	*
	498	*  Game driver(s)
	499	*
	500	*************************************/
	501
	502	GAME( 1993, aladbl,   0, megadriv,   aladbl,   aladbl,   ROT0, "bootleg / Sega",   "Aladdin (bootleg of Japanese Megadrive version)", 0)
	503	GAME( 1996, mk3ghw,   0, megadriv,   mk3ghw,   mk3ghw,   ROT0, "bootleg / Midway", "Mortal Kombat 3 (bootleg of Megadrive version)", 0)
	504	GAME( 1994, ssf2ghw,  0, megadriv,   ssf2ghw,  ssf2ghw,  ROT0, "bootleg / Capcom", "Super Street Fighter II - The New Challengers (Arcade bootleg of Japanese MegaDrive version)", 0)
	505	GAME( 1995, topshoot, 0, md_bootleg, topshoot, topshoot, ROT0, "Sun Mixing",       "Top Shooter", 0)

src/mame/drivers/seta2.c

r8962	r8963
593	593	AM_RANGE(0xc50000, 0xc5ffff) AM_RAM                        // cleared
594	594	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE_MEMBER(seta2_state, vregs)   // Video Registers
595	595	AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
596		AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)   // TMP68301 Registers
	596	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)   // TMP68301 Registers
597	597	ADDRESS_MAP_END
598	598
599	599	/***************************************************************************
r8962	r8963
632	632	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE_MEMBER(seta2_state, vregs)   // Video Registers
633	633	AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
634	634	AM_RANGE(0xfffd0a, 0xfffd0b) AM_DEVREADWRITE("eeprom", gundamex_eeprom_r,gundamex_eeprom_w)   // parallel data register
635		AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)   // TMP68301 Registers
	635	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)   // TMP68301 Registers
636	636	ADDRESS_MAP_END
637	637
638	638
r8962	r8963
694	694	AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_BASE_SIZE_MEMBER(seta2_state, spriteram, spriteram_size)   // Sprites
695	695	AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)   // Palette
696	696	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE_MEMBER(seta2_state, vregs)   // Video Registers
697		AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)   // TMP68301 Registers
	697	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)   // TMP68301 Registers
698	698	ADDRESS_MAP_END
699	699
700	700
r8962	r8963
717	717	AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_BASE_SIZE_MEMBER(seta2_state, spriteram, spriteram_size)      // Sprites
718	718	AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)   // Palette
719	719	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE_MEMBER(seta2_state, vregs)            // Video Registers
720		AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)      // TMP68301 Registers
	720	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
721	721	ADDRESS_MAP_END
722	722
723	723
r8962	r8963
740	740	AM_RANGE(0xd00000, 0xd3ffff) AM_RAM AM_BASE_SIZE_MEMBER(seta2_state, spriteram, spriteram_size)      // Sprites
741	741	AM_RANGE(0xd40000, 0xd4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)   // Palette
742	742	AM_RANGE(0xd60000, 0xd6003f) AM_WRITE(seta2_vregs_w) AM_BASE_MEMBER(seta2_state, vregs)         // Video Registers
743		AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)      // TMP68301 Registers
	743	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
744	744	ADDRESS_MAP_END
745	745
746	746
r8962	r8963
752	752	The offset to use is stored in RAM at address 0x20BA16 */
753	753	static READ16_HANDLER( pzlbowl_protection_r )
754	754	{
755		UINT32 address = (memory_read_word(space, 0x20ba16) << 16) | memory_read_word(space, 0x20ba18);
	755	UINT32 address = (space->read_word(0x20ba16) << 16) | space->read_word(0x20ba18);
756	756	return memory_region(space->machine, "maincpu")[address - 2];
757	757	}
758	758
r8962	r8963
785	785	AM_RANGE(0x840000, 0x84ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)   // Palette
786	786	AM_RANGE(0x860000, 0x86003f) AM_WRITE(seta2_vregs_w) AM_BASE_MEMBER(seta2_state, vregs)            // Video Registers
787	787	AM_RANGE(0x900000, 0x903fff) AM_DEVREADWRITE("x1snd", seta_sound_word_r,seta_sound_word_w)   // Sound
788		AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)      // TMP68301 Registers
	788	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
789	789	ADDRESS_MAP_END
790	790
791	791
r8962	r8963
811	811	AM_RANGE(0xb40000, 0xb4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)   // Palette
812	812	AM_RANGE(0xb60000, 0xb6003f) AM_WRITE(seta2_vregs_w) AM_BASE_MEMBER(seta2_state, vregs)
813	813	AM_RANGE(0xa00000, 0xa03fff) AM_DEVREADWRITE("x1snd", seta_sound_word_r,seta_sound_word_w)   // Sound
814		AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)      // TMP68301 Registers
	814	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)      // TMP68301 Registers
815	815	ADDRESS_MAP_END
816	816
817	817
r8962	r8963
857	857	AM_RANGE( 0x900000, 0x903fff ) AM_DEVREADWRITE( "x1snd", seta_sound_word_r, seta_sound_word_w   )   // Sound
858	858
859	859	AM_RANGE( 0xfffd0a, 0xfffd0b ) AM_READ_PORT("DSW2")            // parallel data register (DSW 2)
860		AM_RANGE( 0xfffc00, 0xffffff ) AM_RAM_WRITE( tmp68301_regs_w) AM_BASE(&tmp68301_regs )   // TMP68301 Registers
	860	AM_RANGE( 0xfffc00, 0xffffff ) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)   // TMP68301 Registers
861	861	ADDRESS_MAP_END
862	862
863	863

src/mame/drivers/balsente.c

r8962	r8963
2135	2135	static DRIVER_INIT( toggle )   { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
2136	2136	static DRIVER_INIT( nametune )
2137	2137	{
2138		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2138	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2139	2139	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2140	2140	expand_roms(machine, EXPAND_NONE | SWAP_HALVES); config_shooter_adc(machine, FALSE, 0 /* noanalog */);
2141	2141	}
2142	2142	static DRIVER_INIT( nstocker )
2143	2143	{
2144		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2144	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2145	2145	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2146	2146	expand_roms(machine, EXPAND_NONE | SWAP_HALVES); config_shooter_adc(machine, TRUE, 1);
2147	2147	}
2148	2148	static DRIVER_INIT( sfootbal )
2149	2149	{
2150		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2150	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2151	2151	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2152	2152	expand_roms(machine, EXPAND_ALL  | SWAP_HALVES); config_shooter_adc(machine, FALSE, 0);
2153	2153	}
2154	2154	static DRIVER_INIT( spiker )
2155	2155	{
2156		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2156	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2157	2157	memory_install_readwrite8_handler(space, 0x9f80, 0x9f8f, 0, 0, spiker_expand_r, spiker_expand_w);
2158	2158	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2159	2159	expand_roms(machine, EXPAND_ALL  | SWAP_HALVES); config_shooter_adc(machine, FALSE, 1);
2160	2160	}
2161	2161	static DRIVER_INIT( stompin )
2162	2162	{
2163		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2163	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2164	2164	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2165	2165	expand_roms(machine, 0x0c | SWAP_HALVES); config_shooter_adc(machine, FALSE, 32);
2166	2166	}
2167	2167	static DRIVER_INIT( rescraid ) { expand_roms(machine, EXPAND_NONE); config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
2168	2168	static DRIVER_INIT( grudge )
2169	2169	{
2170		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2170	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2171	2171	memory_install_read8_handler(space, 0x9400, 0x9400, 0, 0, grudge_steering_r);
2172	2172	expand_roms(machine, EXPAND_NONE); config_shooter_adc(machine, FALSE, 0);
2173	2173	}
2174	2174	static DRIVER_INIT( shrike )
2175	2175	{
2176		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2176	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2177	2177	memory_install_readwrite8_handler(space, 0x9e00, 0x9fff, 0, 0, shrike_shared_6809_r, shrike_shared_6809_w);
2178	2178	memory_install_write8_handler(space, 0x9e01, 0x9e01, 0, 0, shrike_sprite_select_w );
2179	2179	memory_install_readwrite16_handler(cputag_get_address_space(machine, "68k", ADDRESS_SPACE_PROGRAM), 0x10000, 0x1001f, 0, 0, shrike_io_68k_r, shrike_io_68k_w);

src/mame/drivers/malzak.c

r8962	r8963
65	65	#include "emu.h"
66	66	#include "cpu/s2650/s2650.h"
67	67	#include "sound/sn76477.h"
	68	#include "sound/s2636.h"
68	69	#include "video/s2636.h"
69	70	#include "video/saa5050.h"
70	71	#include "includes/malzak.h"
r8962	r8963
347	348	{
348	349	"screen",
349	350	0x100,
350		0, -16   /* -8, -16 */
	351	0, -16,   /* -8, -16 */
	352	"s2636snd_0"
351	353	};
352	354
353	355	static const s2636_interface malzac_s2636_1_config =
354	356	{
355	357	"screen",
356	358	0x100,
357		0, -16   /* -9, -16 */
	359	0, -16,   /* -9, -16 */
	360	"s2636snd_1"
358	361	};
359	362
360	363	static const saa5050_interface malzac_saa5050_intf =
r8962	r8963
432	435	MDRV_SOUND_ADD("sn2", SN76477, 0)
433	436	MDRV_SOUND_CONFIG(sn76477_intf)
434	437	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
	438
	439	MDRV_SOUND_ADD("s2636snd_0", S2636, 0)
	440	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
	441
	442	MDRV_SOUND_ADD("s2636snd_1", S2636, 0)
	443	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
435	444	MACHINE_DRIVER_END
436	445
437	446	static MACHINE_DRIVER_START( malzak2 )
r8962	r8963
489	498	ROM_END
490	499
491	500
492		GAME( 19??, malzak,   0,       malzak,  malzak,  0,        ROT0, "Kitronix", "Malzak", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
493		GAME( 19??, malzak2, malzak,   malzak2, malzak2, 0,        ROT0, "Kitronix", "Malzak II", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
	501	GAME( 19??, malzak,   0,       malzak,  malzak,  0,        ROT0, "Kitronix", "Malzak", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
	502	GAME( 19??, malzak2, malzak,   malzak2, malzak2, 0,        ROT0, "Kitronix", "Malzak II", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )

src/mame/drivers/deco32.c

r8962	r8963
495	495	static int readBitCount=0;
496	496	static int byteAddr=0;
497	497	eeprom_device *eeprom = space->machine->device<eeprom_device>("eeprom");
498		const address_space *eeprom_space = eeprom->space();
	498	address_space *eeprom_space = eeprom->space();
499	499
500	500	/* Eprom in low byte */
501	501	if (mem_mask==0x000000ff) { /* Byte write to low byte only (different from word writing including low byte) */
r8962	r8963
545	545	int d=readBitCount/8;
546	546	int m=7-(readBitCount%8);
547	547	int a=(byteAddr+d)%1024;
548		int b=memory_read_byte(eeprom_space, a);
	548	int b=eeprom_space->read_byte(a);
549	549
550	550	tattass_eprom_bit=(b>>m)&1;
551	551
r8962	r8963
562	562	int b=(buffer[24]<<7)|(buffer[25]<<6)|(buffer[26]<<5)|(buffer[27]<<4)
563	563	|(buffer[28]<<3)|(buffer[29]<<2)|(buffer[30]<<1)|(buffer[31]<<0);
564	564
565		memory_write_byte(eeprom_space, byteAddr, b);
	565	eeprom_space->write_byte(byteAddr, b);
566	566	}
567	567	lastClock=data&0x20;
568	568	return;
r8962	r8963
577	577
578	578	/* Check for read command */
579	579	if (buffer[0] && buffer[1]) {
580		tattass_eprom_bit=(memory_read_byte(eeprom_space, byteAddr)>>7)&1;
	580	tattass_eprom_bit=(eeprom_space->read_byte(byteAddr)>>7)&1;
581	581	readBitCount=1;
582	582	pendingCommand=1;
583	583	}

src/mame/drivers/tomcat.c

r8962	r8963
257	257	AM_RANGE(0x40e01a, 0x40e01b) AM_WRITE(tomcat_errh_w)
258	258	AM_RANGE(0x40e01c, 0x40e01d) AM_WRITE(tomcat_ackh_w)
259	259	AM_RANGE(0x40e01e, 0x40e01f) AM_WRITE(tomcat_txbuffh_w)
260		AM_RANGE(0x800000, 0x803fff) AM_RAM AM_BASE((UINT16**)&vectorram) AM_SIZE(&vectorram_size)
	260	AM_RANGE(0x800000, 0x803fff) AM_RAM AM_BASE((UINT16**)&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size)
261	261	AM_RANGE(0xffa000, 0xffbfff) AM_READWRITE(tomcat_shared_ram_r, tomcat_shared_ram_w)
262	262	AM_RANGE(0xffc000, 0xffcfff) AM_RAM
263	263	AM_RANGE(0xffd000, 0xffdfff) AM_DEVREADWRITE8("m48t02", timekeeper_r, timekeeper_w, 0xff00)

src/mame/drivers/zaxxon.c

r8962	r8963
1450	1450	};
1451	1451
1452	1452	int A;
1453		const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
	1453	address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
1454	1454	UINT8 *rom = memory_region(machine, cputag);
1455	1455	int size = memory_region_length(machine, cputag);
1456	1456	UINT8 *decrypt = auto_alloc_array(machine, UINT8, size);
1457	1457
1458		memory_set_decrypted_region(space, 0x0000, size - 1, decrypt);
	1458	space->set_decrypted_region(0x0000, size - 1, decrypt);
1459	1459
1460	1460	for (A = 0x0000; A < size; A++)
1461	1461	{

src/mame/drivers/norautp.c

r8962	r8963
14	14	* Noraut Deluxe Poker (console),       198?,  Noraut Ltd.
15	15	* Noraut Deluxe Poker (bootleg),       198?,  Unknown.
16	16	* Noraut Joker Poker (original),       198?,  Noraut Ltd.
17		* Noraut Joker Poker (Prologic HW),    198?,  Prologic / Noraut Ltd.
	17	* Noraut Joker Poker (Prologic HW),    198?,  Video Fun Games Ltd.
18	18	* Noraut Joker Poker (alt),            1988,  Noraut Ltd.
19	19	* Noraut Red Hot Joker Poker,          1988,  Noraut Ltd.
20	20	* Noraut Red Hot Joker Poker (alt HW), 198?,  Noraut Ltd.
r8962	r8963
848	848	AM_RANGE(0x6000, 0x67ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) /* 6116 */
849	849	ADDRESS_MAP_END
850	850
	851	#ifdef UNUSED_CODE
851	852	static ADDRESS_MAP_START( norautx8_map, ADDRESS_SPACE_PROGRAM, 8 )
852	853	AM_RANGE(0x0000, 0x7fff) AM_ROM   /* need to be checked */
853	854	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) /* 6116 */
854	855	ADDRESS_MAP_END
	856	#endif
855	857
856	858	static ADDRESS_MAP_START( kimble_map, ADDRESS_SPACE_PROGRAM, 8 )
857	859	AM_RANGE(0x0000, 0xbfff) AM_ROM
r8962	r8963
1322	1324	MACHINE_DRIVER_END
1323	1325
1324	1326
	1327	#ifdef UNUSED_CODE
1325	1328	static MACHINE_DRIVER_START( norautx8 )
1326	1329	MDRV_IMPORT_FROM(noraut_base)
1327	1330
r8962	r8963
1330	1333	MDRV_CPU_PROGRAM_MAP(norautx8_map)
1331	1334	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1332	1335	MACHINE_DRIVER_END
	1336	#endif
1333	1337
1334	1338
1335	1339	static MACHINE_DRIVER_START( kimble )
r8962	r8963
3477	3481	GAMEL( 198?, norautdx, 0,       norautp,  norautpn, 0,   ROT0, "Noraut Ltd.",              "Noraut Deluxe Poker (console)",       0,                layout_noraut12 )
3478	3482	GAMEL( 198?, norautpn, norautp, norautp,  norautpn, 0,   ROT0, "bootleg",                  "Noraut Deluxe Poker (bootleg)",       0,                layout_noraut12 )
3479	3483	GAMEL( 198?, norautjo, 0,       norautp,  mainline, 0,   ROT0, "Noraut Ltd.",              "Noraut Joker Poker (original)",       0,                layout_noraut12 )
3480		GAMEL( 198?, norautpl, 0,       norautpl, mainline, 0,   ROT0, "Prologic / Noraut Ltd.",   "Noraut Joker Poker (Prologic HW)",    0,                layout_noraut12 )
	3484	GAMEL( 198?, norautpl, 0,       norautpl, mainline, 0,   ROT0, "Video Fun Games Ltd.",     "Noraut Joker Poker (Prologic HW)",    0,                layout_noraut12 )
3481	3485	GAMEL( 1988, norautjp, norautp, norautp,  norautp,  0,   ROT0, "Noraut Ltd.",              "Noraut Joker Poker (alt)",            0,                layout_noraut11 )
3482	3486	GAMEL( 1988, norautrh, 0,       norautp,  norautrh, 0,   ROT0, "Noraut Ltd.",              "Noraut Red Hot Joker Poker",          0,                layout_noraut12 )
3483	3487	GAMEL( 198?, norautra, 0,       norautp,  norautrh, 0,   ROT0, "Noraut Ltd.",              "Noraut Red Hot Joker Poker (alt HW)", 0,                layout_noraut12 ) // 1-bet?? where??...

src/mame/drivers/karnov.c

r8962	r8963
35	35	Karnov - put 0x30 at 0x60201 to skip a level
36	36	Chelnov - level number at 0x60189 - enter a value at cartoon intro
37	37
	38
	39	Stephh's notes (based on the games M68000 code and some tests) :
	40
	41	1) 'karnov' and its clones :
	42
	43	- DSW1 bit 7 is called "No Die Mode" in the manual. It used to give invulnerability
	44	to shots (but not to falls), but it has no effect due to the "bra" instruction
	45	at 0x001334 ('karnov') or 0x00131a ('karnovj').
	46
	47	2) 'wndrplnt'
	48
	49	- There is code at 0x01c000 which tests DSW2 bit 6 which seems to act as a "Freeze"
	50	Dip Switch, but this address doesn't seem to be reached. Leftover from another game ?
	51	- DSW2 bit 7 used to give invulnerability, but it has no effect due to
	52	the "andi.w  #$7fff, D5" instruction at 0x0011a2.
	53
	54	3) 'chelnov' and its clones :
	55
	56	3a) 'chelnov'
	57
	58	- DSW2 bit 6 isn't tested in this set.
	59	- DSW2 bit 7 used to give invulnerability, but it has no effect due to
	60	the "andi.w  #$3fff, D5" instruction at 0x000ed0.
	61
	62	3b) 'chelnovu'
	63
	64	- DSW2 bit 6 freezes the game (code at 0x000654), but when you turn
	65	the Dip Swicth back to "Off", it adds credits as if COIN1 was pressed.
	66	Is that the correct behaviour ?
	67	- Even if there is a "andi.w  #$ffff, D5" instruction at 0x000ef0,
	68	DSW2 bit 7 isn't tested in this set.
	69
	70	3c) 'chelnovj'
	71
	72	- DSW2 bit 6 isn't tested in this set.
	73	- DSW2 bit 7 used to give invulnerability, but it has no effect due to
	74	the "andi.w  #$3fff, D5" instruction at 0x000ed8.
	75
38	76	*******************************************************************************/
39	77
40	78	#include "emu.h"
r8962	r8963
65	103
66	104	state->i8751_return = 0;
67	105
	106	if (data == 0x100 && state->microcontroller_id == KARNOV)   /* USA version */
	107	state->i8751_return = 0x56b;
	108
68	109	if (data == 0x100 && state->microcontroller_id == KARNOVJ)   /* Japan version */
69	110	state->i8751_return = 0x56a;
70	111
71		if (data == 0x100 && state->microcontroller_id == KARNOV)   /* USA version */
72		state->i8751_return = 0x56b;
73
74	112	if ((data & 0xf00) == 0x300)
75	113	state->i8751_return = (data & 0xff) * 0x12; /* Player sprite mapping */
76	114
r8962	r8963
164	202
165	203	state->i8751_return = 0;
166	204
	205	if (data == 0x200 && state->microcontroller_id == CHELNOV)   /* World version */
	206	state->i8751_return = 0x7736;
	207
	208	if (data == 0x200 && state->microcontroller_id == CHELNOVU)   /* USA version */
	209	state->i8751_return = 0x783e;
	210
167	211	if (data == 0x200 && state->microcontroller_id == CHELNOVJ)   /* Japan version */
168	212	state->i8751_return = 0x7734;
169	213
170		if (data == 0x200 && state->microcontroller_id == CHELNOV)   /* USA version */
171		state->i8751_return = 0x783e;
	214	if (data == 0x100 && state->microcontroller_id == CHELNOV)   /* World version */
	215	state->i8751_return = 0x71c;
172	216
173		if (data == 0x200 && state->microcontroller_id == CHELNOVW)   /* World version */
174		state->i8751_return = 0x7736;
	217	if (data == 0x100 && state->microcontroller_id == CHELNOVU)   /* USA version */
	218	state->i8751_return = 0x71b;
175	219
176	220	if (data == 0x100 && state->microcontroller_id == CHELNOVJ)   /* Japan version */
177	221	state->i8751_return = 0x71a;
178	222
179		if (data == 0x100 && state->microcontroller_id == CHELNOV)   /* USA version */
180		state->i8751_return = 0x71b;
181
182		if (data == 0x100 && state->microcontroller_id == CHELNOVW)   /* World version */
183		state->i8751_return = 0x71c;
184
185	223	if (data >= 0x6000 && data < 0x8000)
186	224	state->i8751_return = 1;  /* patched */
187	225
188		if ((data & 0xf000) == 0x1000) state->i8751_level = 1;   /* Level 1 */
	226	if ((data & 0xf000) == 0x1000) state->i8751_level = 1;      /* Level 1 */
189	227	if ((data & 0xf000) == 0x2000) state->i8751_level++;      /* Level Increment */
190	228
191	229	if ((data & 0xf000) == 0x3000)
r8962	r8963
195	233	switch (state->i8751_level)
196	234	{
197	235	case 1: /* Level 1, Sprite mapping tables */
198		if (state->microcontroller_id == CHELNOV) /* USA */
	236	if (state->microcontroller_id == CHELNOVU) /* USA */
199	237	{
200	238	if (b < 2) state->i8751_return = 0;
201	239	else if (b < 6) state->i8751_return = 1;
r8962	r8963
217	255	else state->i8751_return = 8;
218	256	}
219	257	break;
220		case 2: /* Level 2, Sprite mapping tables, USA & Japan are the same */
	258	case 2: /* Level 2, Sprite mapping tables, all sets are the same */
221	259	if (b < 3) state->i8751_return = 0;
222	260	else if (b < 9) state->i8751_return = 1;
223	261	else if (b < 0x11) state->i8751_return = 2;
r8962	r8963
226	264	else if (b < 0x28) state->i8751_return = 5;
227	265	else state->i8751_return = 6;
228	266	break;
229		case 3: /* Level 3, Sprite mapping tables, USA & Japan are the same */
	267	case 3: /* Level 3, Sprite mapping tables, all sets are the same */
230	268	if (b < 5) state->i8751_return = 0;
231	269	else if (b < 9) state->i8751_return = 1;
232	270	else if (b < 0xd) state->i8751_return = 2;
r8962	r8963
237	275	else if (b < 0x27) state->i8751_return = 7;
238	276	else state->i8751_return = 8;
239	277	break;
240		case 4: /* Level 4, Sprite mapping tables, USA & Japan are the same */
	278	case 4: /* Level 4, Sprite mapping tables, all sets are the same */
241	279	if (b < 4) state->i8751_return = 0;
242	280	else if (b < 0xc) state->i8751_return = 1;
243	281	else if (b < 0xf) state->i8751_return = 2;
r8962	r8963
247	285	else if (b < 0x29) state->i8751_return = 6;
248	286	else state->i8751_return = 7;
249	287	break;
250		case 5: /* Level 5, Sprite mapping tables */
	288	case 5: /* Level 5, Sprite mapping tables, all sets are the same */
251	289	if (b < 7) state->i8751_return = 0;
252	290	else if (b < 0xe) state->i8751_return = 1;
253	291	else if (b < 0x14) state->i8751_return = 2;
r8962	r8963
256	294	else if (b < 0x27) state->i8751_return = 5;
257	295	else state->i8751_return = 6;
258	296	break;
259		case 6: /* Level 6, Sprite mapping tables */
	297	case 6: /* Level 6, Sprite mapping tables, all sets are the same */
260	298	if (b < 3) state->i8751_return = 0;
261	299	else if (b < 0xb) state->i8751_return = 1;
262	300	else if (b < 0x11) state->i8751_return = 2;
r8962	r8963
265	303	else if (b < 0x24) state->i8751_return = 5;
266	304	else state->i8751_return = 6;
267	305	break;
268		case 7: /* Level 7, Sprite mapping tables */
	306	case 7: /* Level 7, Sprite mapping tables, all sets are the same */
269	307	if (b < 5) state->i8751_return = 0;
270	308	else if (b < 0xb) state->i8751_return = 1;
271	309	else if (b < 0x11) state->i8751_return = 2;
r8962	r8963
334	372	case 6: /* SECREQ (Interrupt & Data to i8751) */
335	373	if (state->microcontroller_id == KARNOV || state->microcontroller_id == KARNOVJ)
336	374	karnov_i8751_w(space->machine, data);
337		if (state->microcontroller_id == CHELNOV || state->microcontroller_id == CHELNOVJ || state->microcontroller_id == CHELNOVW)
	375	if (state->microcontroller_id == CHELNOV || state->microcontroller_id == CHELNOVU || state->microcontroller_id == CHELNOVJ)
338	376	chelnov_i8751_w(space->machine, data);
339	377	if (state->microcontroller_id == WNDRPLNT)
340	378	wndrplnt_i8751_w(space->machine, data);
r8962	r8963
418	456
419	457	static INPUT_PORTS_START( common )
420	458	PORT_START("P1_P2")
421		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
422		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
423		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
	459	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_8WAY
	460	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_8WAY
	461	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_8WAY
424	462	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
425	463	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 )
426	464	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 )
427	465	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 )
428	466	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED ) /* Button 4 on karnov schematics */
429	467
430		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
431		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
432		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
	468	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_8WAY PORT_COCKTAIL
	469	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_8WAY PORT_COCKTAIL
	470	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_8WAY PORT_COCKTAIL
433	471	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
434	472	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
435	473	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
r8962	r8963
448	486	INPUT_PORTS_END
449	487
450	488
	489	/* verified from M68000 code */
451	490	static INPUT_PORTS_START( karnov )
452	491	PORT_INCLUDE( common )
453	492
454	493	PORT_START("FAKE")   /* Dummy input for i8751 */
455		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 )
456		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
457		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 )
	494	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
	495	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	496	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
458	497
459	498	PORT_START("DSW")
460		PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
	499	PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) )       PORT_DIPLOCATION("SW1:1,2")
461	500	PORT_DIPSETTING(      0x0000, DEF_STR( 2C_1C ) )
462	501	PORT_DIPSETTING(      0x0003, DEF_STR( 1C_1C ) )
463	502	PORT_DIPSETTING(      0x0002, DEF_STR( 1C_2C ) )
464	503	PORT_DIPSETTING(      0x0001, DEF_STR( 1C_3C ) )
465		PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
	504	PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_B ) )       PORT_DIPLOCATION("SW1:3,4")
466	505	PORT_DIPSETTING(      0x0000, DEF_STR( 2C_1C ) )
467	506	PORT_DIPSETTING(      0x000c, DEF_STR( 1C_1C ) )
468	507	PORT_DIPSETTING(      0x0008, DEF_STR( 1C_2C ) )
469	508	PORT_DIPSETTING(      0x0004, DEF_STR( 1C_3C ) )
470		PORT_DIPUNUSED_DIPLOC( 0x0010, 0x0000, "SW1:5" )
471		PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:6")
	509	PORT_DIPUNUSED_DIPLOC( 0x0010, 0x0010, "SW1:5" )
	510	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Flip_Screen ) )  PORT_DIPLOCATION("SW1:6")
472	511	PORT_DIPSETTING(      0x0020, DEF_STR( Off ) )
473	512	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
474		PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:7")
	513	PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Cabinet ) )      PORT_DIPLOCATION("SW1:7")
475	514	PORT_DIPSETTING(      0x0000, DEF_STR( Upright ) )
476	515	PORT_DIPSETTING(      0x0040, DEF_STR( Cocktail ) )
477		PORT_DIPUNKNOWN_DIPLOC( 0x0080, 0x0080, "SW1:8" )
478		/* 0x0080 called No Die Mode according to the manual, but it doesn't seem to have any effect */
	516	PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW1:8" )        /* see notes */
479	517
480		PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
	518	PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) )        PORT_DIPLOCATION("SW2:1,2")
481	519	PORT_DIPSETTING(      0x0100, "1" )
482	520	PORT_DIPSETTING(      0x0300, "3" )
483	521	PORT_DIPSETTING(      0x0200, "5" )
484	522	PORT_DIPSETTING(      0x0000, "Infinite (Cheat)")
485		PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3,4")
486		PORT_DIPSETTING(      0x0c00, "50 K" )
487		PORT_DIPSETTING(      0x0800, "70 K" )
488		PORT_DIPSETTING(      0x0400, "90 K" )
489		PORT_DIPSETTING(      0x0000, "100 K" )
490		PORT_DIPNAME( 0x3000, 0x3000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:5,6")
	523	PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Bonus_Life ) )   PORT_DIPLOCATION("SW2:3,4")
	524	PORT_DIPSETTING(      0x0c00, "50 'K'" )
	525	PORT_DIPSETTING(      0x0800, "70 'K'" )
	526	PORT_DIPSETTING(      0x0400, "90 'K'" )
	527	PORT_DIPSETTING(      0x0000, "100 'K'" )
	528	PORT_DIPNAME( 0x3000, 0x3000, DEF_STR( Difficulty ) )   PORT_DIPLOCATION("SW2:5,6")
491	529	PORT_DIPSETTING(      0x2000, DEF_STR( Easy ) )
492	530	PORT_DIPSETTING(      0x3000, DEF_STR( Normal ) )
493	531	PORT_DIPSETTING(      0x1000, DEF_STR( Hard ) )
494	532	PORT_DIPSETTING(      0x0000, DEF_STR( Very_Hard ) )
495		PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
	533	PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
496	534	PORT_DIPSETTING(      0x0000, DEF_STR( Off ) )
497	535	PORT_DIPSETTING(      0x4000, DEF_STR( On ) )
498		PORT_DIPNAME( 0x8000, 0x8000, "Timer Speed" ) PORT_DIPLOCATION("SW2:8")
	536	PORT_DIPNAME( 0x8000, 0x8000, "Timer Speed" )           PORT_DIPLOCATION("SW2:8")
499	537	PORT_DIPSETTING(      0x8000, DEF_STR( Normal ) )
500	538	PORT_DIPSETTING(      0x0000, "Fast" )
501	539	INPUT_PORTS_END
502	540
	541
	542	/* verified from M68000 code */
503	543	static INPUT_PORTS_START( wndrplnt )
504	544	PORT_INCLUDE( common )
505	545
	546	PORT_MODIFY("P1_P2")
	547	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED )           /* BUTTON3 */
	548	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED )           /* BUTTON3 PORT_COCKTAIL */
	549
506	550	PORT_START("FAKE")   /* Dummy input for i8751 */
507		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 )
	551	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
508	552	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
509		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 )
	553	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE1 )
510	554
511	555	PORT_START("DSW")
512		PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_B ) )
	556	PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) )
513	557	PORT_DIPSETTING(      0x0000, DEF_STR( 2C_1C ) )
514	558	PORT_DIPSETTING(      0x0003, DEF_STR( 1C_1C ) )
515	559	PORT_DIPSETTING(      0x0002, DEF_STR( 1C_2C ) )
516	560	PORT_DIPSETTING(      0x0001, DEF_STR( 1C_3C ) )
517		PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_A ) )
	561	PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_B ) )
518	562	PORT_DIPSETTING(      0x0000, DEF_STR( 2C_1C ) )
519	563	PORT_DIPSETTING(      0x000c, DEF_STR( 1C_1C ) )
520	564	PORT_DIPSETTING(      0x0008, DEF_STR( 1C_2C ) )
521	565	PORT_DIPSETTING(      0x0004, DEF_STR( 1C_3C ) )
522		PORT_DIPUNKNOWN( 0x0010, 0x0000 )
	566	PORT_DIPUNUSED( 0x0010, 0x0010 )
523	567	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) )
524	568	PORT_DIPSETTING(      0x0000, DEF_STR( Off ) )
525	569	PORT_DIPSETTING(      0x0020, DEF_STR( On ) )
r8962	r8963
535	579	PORT_DIPSETTING(      0x0300, "3" )
536	580	PORT_DIPSETTING(      0x0200, "5" )
537	581	PORT_DIPSETTING(      0x0000, "Infinite (Cheat)")
538		PORT_DIPUNKNOWN( 0x0400, 0x0400 )
539		PORT_DIPUNKNOWN( 0x0800, 0x0800 )
	582	PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) )
	583	PORT_DIPSETTING(      0x0800, DEF_STR( Easy ) )
	584	PORT_DIPSETTING(      0x0c00, DEF_STR( Normal ) )
	585	PORT_DIPSETTING(      0x0400, DEF_STR( Hard ) )
	586	PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )
540	587	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Allow_Continue ) )
541	588	PORT_DIPSETTING(      0x0000, DEF_STR( No ) )
542	589	PORT_DIPSETTING(      0x1000, DEF_STR( Yes ) )
543		PORT_DIPUNKNOWN( 0x2000, 0x2000 )
544		PORT_DIPNAME( 0xc000, 0xc000, DEF_STR( Difficulty ) )
545		PORT_DIPSETTING(      0x8000, DEF_STR( Easy ) )
546		PORT_DIPSETTING(      0xc000, DEF_STR( Normal ) )
547		PORT_DIPSETTING(      0x4000, DEF_STR( Hard ) )
548		PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )
	590	PORT_DIPUNUSED( 0x2000, 0x2000 )
	591	PORT_DIPUNUSED( 0x4000, 0x4000 )                        /* see notes */
	592	PORT_DIPUNUSED( 0x8000, 0x8000 )                        /* see notes */
549	593	INPUT_PORTS_END
550	594
	595
	596	/* verified from M68000 code */
551	597	static INPUT_PORTS_START( chelnov )
552	598	PORT_INCLUDE( common )
553	599
554		PORT_MODIFY("SYSTEM")
555		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
556		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
557		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
558
559	600	PORT_START("FAKE")   /* Dummy input for i8751 */
560		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
561		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
	601	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
	602	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
562	603	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
563	604
564	605	PORT_START("DSW")
	606	PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) )
	607	PORT_DIPSETTING(      0x0003, DEF_STR( 1C_2C ) )
	608	PORT_DIPSETTING(      0x0002, DEF_STR( 1C_3C ) )
	609	PORT_DIPSETTING(      0x0001, DEF_STR( 1C_4C ) )
	610	PORT_DIPSETTING(      0x0000, DEF_STR( 1C_6C ) )
565	611	PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_B ) )
566	612	PORT_DIPSETTING(      0x0000, DEF_STR( 4C_1C ) )
567	613	PORT_DIPSETTING(      0x0004, DEF_STR( 3C_1C ) )
568	614	PORT_DIPSETTING(      0x0008, DEF_STR( 2C_1C ) )
569	615	PORT_DIPSETTING(      0x000c, DEF_STR( 1C_1C ) )
570		PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) )
571		PORT_DIPSETTING(      0x0003, DEF_STR( 1C_2C ) )
572		PORT_DIPSETTING(      0x0002, DEF_STR( 1C_3C ) )
573		PORT_DIPSETTING(      0x0001, DEF_STR( 1C_4C ) )
574		PORT_DIPSETTING(      0x0000, DEF_STR( 1C_6C ) )
575		PORT_DIPUNKNOWN( 0x0010, 0x0010 )
	616	PORT_DIPUNUSED( 0x0010, 0x0010 )
576	617	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) )
577	618	PORT_DIPSETTING(      0x0000, DEF_STR( Off ) )
578	619	PORT_DIPSETTING(      0x0020, DEF_STR( On ) )
r8962	r8963
588	629	PORT_DIPSETTING(      0x0300, "3" )
589	630	PORT_DIPSETTING(      0x0200, "5" )
590	631	PORT_DIPSETTING(      0x0000, "Infinite (Cheat)")
591		PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) )
592		PORT_DIPSETTING(      0x0400, DEF_STR( Easy ) )
593		PORT_DIPSETTING(      0x0c00, DEF_STR( Normal ) )
594		PORT_DIPSETTING(      0x0800, DEF_STR( Hard ) )
595		PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )
	632	PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) )   /* also determines "Bonus Life" settings */
	633	PORT_DIPSETTING(      0x0800, DEF_STR( Easy ) )         /* bonus life at 30k 60k 100k 150k 250k 100k+ */
	634	PORT_DIPSETTING(      0x0c00, DEF_STR( Normal ) )       /* bonus life at 50k 120k 200k 300k 100k+ */
	635	PORT_DIPSETTING(      0x0400, DEF_STR( Hard ) )         /* bonus life at 80k 160k 260k 100k+ */
	636	PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )      /* bonus life at every 100k */
596	637	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Allow_Continue ) )
597	638	PORT_DIPSETTING(      0x0000, DEF_STR( No ) )
598	639	PORT_DIPSETTING(      0x1000, DEF_STR( Yes ) )
599		PORT_DIPUNKNOWN( 0x2000, 0x2000 )
600		PORT_DIPNAME( 0x4000, 0x4000, "Freeze" )
601		PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
602		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
603		PORT_DIPUNUSED( 0x8000, 0x8000 )
	640	PORT_DIPUNUSED( 0x2000, 0x2000 )
	641	PORT_DIPUNUSED( 0x4000, 0x4000 )                        /* see notes */
	642	PORT_DIPUNUSED( 0x8000, 0x8000 )                        /* see notes */
604	643	INPUT_PORTS_END
605	644
606		static INPUT_PORTS_START( chelnovu )
607		PORT_INCLUDE( common )
	645	/* verified from M68000 code */
	646	static INPUT_PORTS_START( chelnovj )
	647	PORT_INCLUDE( chelnov )
608	648
609		PORT_MODIFY("SYSTEM")
610		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
611		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
612		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
613
614		PORT_START("FAKE")   /* Dummy input for i8751 */
615		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
616		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
617		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
618
619		PORT_START("DSW")
620		PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_B ) )
	649	PORT_MODIFY("DSW")
	650	PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) )
621	651	PORT_DIPSETTING(      0x0000, DEF_STR( 2C_1C ) )
622	652	PORT_DIPSETTING(      0x0003, DEF_STR( 1C_1C ) )
623	653	PORT_DIPSETTING(      0x0002, DEF_STR( 1C_2C ) )
624	654	PORT_DIPSETTING(      0x0001, DEF_STR( 1C_3C ) )
625		PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_A ) )
	655	PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_B ) )
626	656	PORT_DIPSETTING(      0x0000, DEF_STR( 2C_1C ) )
627	657	PORT_DIPSETTING(      0x000c, DEF_STR( 1C_1C ) )
628	658	PORT_DIPSETTING(      0x0008, DEF_STR( 1C_2C ) )
629	659	PORT_DIPSETTING(      0x0004, DEF_STR( 1C_3C ) )
630		PORT_DIPUNKNOWN( 0x0010, 0x0010 )
631		PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Demo_Sounds ) )
632		PORT_DIPSETTING(      0x0000, DEF_STR( Off ) )
633		PORT_DIPSETTING(      0x0020, DEF_STR( On ) )
634		PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) )
635		PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
636		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
637		PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Cabinet ) )
638		PORT_DIPSETTING(      0x0000, DEF_STR( Upright ) )
639		PORT_DIPSETTING(      0x0080, DEF_STR( Cocktail ) )
	660	INPUT_PORTS_END
640	661
641		PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) )
642		PORT_DIPSETTING(      0x0100, "1" )
643		PORT_DIPSETTING(      0x0300, "3" )
644		PORT_DIPSETTING(      0x0200, "5" )
645		PORT_DIPSETTING(      0x0000, "Infinite (Cheat)")
646		PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) )
647		PORT_DIPSETTING(      0x0400, DEF_STR( Easy ) )
648		PORT_DIPSETTING(      0x0c00, DEF_STR( Normal ) )
649		PORT_DIPSETTING(      0x0800, DEF_STR( Hard ) )
650		PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )
651		PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Allow_Continue ) )
652		PORT_DIPSETTING(      0x0000, DEF_STR( No ) )
653		PORT_DIPSETTING(      0x1000, DEF_STR( Yes ) )
654		PORT_DIPUNKNOWN( 0x2000, 0x2000 )
655		PORT_DIPNAME( 0x4000, 0x4000, "Freeze" )
	662	/* verified from M68000 code */
	663	static INPUT_PORTS_START( chelnovu )
	664	PORT_INCLUDE( chelnovj )
	665
	666	PORT_MODIFY("DSW")
	667	PORT_DIPNAME( 0x4000, 0x4000, "Freeze" )                /* see notes */
656	668	PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
657	669	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
658		PORT_DIPUNUSED( 0x8000, 0x8000 )
659	670	INPUT_PORTS_END
660	671
661	672
r8962	r8963
718	729	static INTERRUPT_GEN( karnov_interrupt )
719	730	{
720	731	karnov_state *state = device->machine->driver_data<karnov_state>();
	732	UINT8 port = input_port_read(device->machine, "FAKE");
721	733
722	734	/* Coin input to the i8751 generates an interrupt to the main cpu */
723		if (input_port_read(device->machine, "FAKE") == state->coin_mask)
	735	if (port == state->coin_mask)
724	736	state->latch = 1;
725	737
726		if (input_port_read(device->machine, "FAKE") != state->coin_mask && state->latch)
	738	if (port != state->coin_mask && state->latch)
727	739	{
728	740	if (state->i8751_needs_ack)
729	741	{
730	742	/* i8751 is busy - queue the command */
731		state->i8751_coin_pending = input_port_read(device->machine, "FAKE") | 0x8000;
	743	state->i8751_coin_pending = port | 0x8000;
732	744	}
733	745	else
734	746	{
735		state->i8751_return = input_port_read(device->machine, "FAKE") | 0x8000;
	747	state->i8751_return = port | 0x8000;
736	748	cpu_set_input_line(device, 6, HOLD_LINE);
737	749	state->i8751_needs_ack = 1;
738	750	}
r8962	r8963
1002	1014	ROM_LOAD( "ea20.prm",      0x0400, 0x0400, CRC(619f9d1e) SHA1(17fe49b6c9ce17be4a03e3400229e3ef4998a46f) )
1003	1015	ROM_END
1004	1016
1005		ROM_START( chelnovu )
	1017	ROM_START( chelnov )
1006	1018	ROM_REGION( 0x60000, "maincpu", 0 )   /* 6*64k for 68000 code */
1007		ROM_LOAD16_BYTE( "ee08-a.j15",   0x00000, 0x10000, CRC(2f2fb37b) SHA1(f89b424099097a95cf184d20a15b876c5b639552) )
1008		ROM_LOAD16_BYTE( "ee11-a.j20",   0x00001, 0x10000, CRC(f306d05f) SHA1(e523ffd17fb0104fe28eac288b6ebf7fc0ea2908) )
1009		ROM_LOAD16_BYTE( "ee07-a.j14",   0x20000, 0x10000, CRC(9c69ed56) SHA1(23606d2fc7c550eaddf0fd4b0da1a4e2c9263e14) )
1010		ROM_LOAD16_BYTE( "ee10-a.j18",   0x20001, 0x10000, CRC(d5c5fe4b) SHA1(183b2f5dfa4e0a9067674a29abab2744a887fd19) )
	1019	ROM_LOAD16_BYTE( "ee08-e.j16",   0x00000, 0x10000, CRC(8275cc3a) SHA1(961166226b68744eef15fed6a306010757b83556) )
	1020	ROM_LOAD16_BYTE( "ee11-e.j19",   0x00001, 0x10000, CRC(889e40a0) SHA1(e927f32d9bc448a331fb7b3478b2d07154f5013b) )
	1021	ROM_LOAD16_BYTE( "a-j14.bin",    0x20000, 0x10000, CRC(51465486) SHA1(e165e754eb756db3abc1f8477171ab817d03a890) )
	1022	ROM_LOAD16_BYTE( "a-j18.bin",    0x20001, 0x10000, CRC(d09dda33) SHA1(1764215606eec61e4fe30c0fc82ea2faf17821dc) )
1011	1023	ROM_LOAD16_BYTE( "ee06-e.j13",   0x40000, 0x10000, CRC(55acafdb) SHA1(9dc0528c888dd73617f8cab76690b9296715680a) )
1012	1024	ROM_LOAD16_BYTE( "ee09-e.j17",   0x40001, 0x10000, CRC(303e252c) SHA1(d5d2570e42aa1e1b3600d14cc694677248e12750) )
1013	1025
r8962	r8963
1035	1047	ROM_LOAD( "ee20.l6",      0x0400, 0x0400, CRC(41816132) SHA1(89a1194bd8bf39f13419df685e489440bdb05676) )
1036	1048	ROM_END
1037	1049
1038		ROM_START( chelnov )
	1050	ROM_START( chelnovu )
1039	1051	ROM_REGION( 0x60000, "maincpu", 0 )   /* 6*64k for 68000 code */
1040		ROM_LOAD16_BYTE( "ee08-e.j16",   0x00000, 0x10000, CRC(8275cc3a) SHA1(961166226b68744eef15fed6a306010757b83556) )
1041		ROM_LOAD16_BYTE( "ee11-e.j19",   0x00001, 0x10000, CRC(889e40a0) SHA1(e927f32d9bc448a331fb7b3478b2d07154f5013b) )
1042		ROM_LOAD16_BYTE( "a-j14.bin",    0x20000, 0x10000, CRC(51465486) SHA1(e165e754eb756db3abc1f8477171ab817d03a890) )
1043		ROM_LOAD16_BYTE( "a-j18.bin",    0x20001, 0x10000, CRC(d09dda33) SHA1(1764215606eec61e4fe30c0fc82ea2faf17821dc) )
	1052	ROM_LOAD16_BYTE( "ee08-a.j15",   0x00000, 0x10000, CRC(2f2fb37b) SHA1(f89b424099097a95cf184d20a15b876c5b639552) )
	1053	ROM_LOAD16_BYTE( "ee11-a.j20",   0x00001, 0x10000, CRC(f306d05f) SHA1(e523ffd17fb0104fe28eac288b6ebf7fc0ea2908) )
	1054	ROM_LOAD16_BYTE( "ee07-a.j14",   0x20000, 0x10000, CRC(9c69ed56) SHA1(23606d2fc7c550eaddf0fd4b0da1a4e2c9263e14) )
	1055	ROM_LOAD16_BYTE( "ee10-a.j18",   0x20001, 0x10000, CRC(d5c5fe4b) SHA1(183b2f5dfa4e0a9067674a29abab2744a887fd19) )
1044	1056	ROM_LOAD16_BYTE( "ee06-e.j13",   0x40000, 0x10000, CRC(55acafdb) SHA1(9dc0528c888dd73617f8cab76690b9296715680a) )
1045	1057	ROM_LOAD16_BYTE( "ee09-e.j17",   0x40001, 0x10000, CRC(303e252c) SHA1(d5d2570e42aa1e1b3600d14cc694677248e12750) )
1046	1058
r8962	r8963
1112	1124	{
1113	1125	karnov_state *state = machine->driver_data<karnov_state>();
1114	1126	state->microcontroller_id = KARNOV;
1115		state->coin_mask = 0;
	1127	state->coin_mask = 0x07;
1116	1128	}
1117	1129
1118	1130	static DRIVER_INIT( karnovj )
1119	1131	{
1120	1132	karnov_state *state = machine->driver_data<karnov_state>();
1121	1133	state->microcontroller_id = KARNOVJ;
1122		state->coin_mask = 0;
	1134	state->coin_mask = 0x07;
1123	1135	}
1124	1136
1125	1137	static DRIVER_INIT( wndrplnt )
1126	1138	{
1127	1139	karnov_state *state = machine->driver_data<karnov_state>();
1128	1140	state->microcontroller_id = WNDRPLNT;
1129		state->coin_mask = 0;
	1141	state->coin_mask = 0x00;
1130	1142	}
1131	1143
1132	1144	static DRIVER_INIT( chelnov )
r8962	r8963
1140	1152	RAM[0x062a/2] = 0x4e71;  /* hangs waiting on i8751 int */
1141	1153	}
1142	1154
1143		static DRIVER_INIT( chelnovw )
	1155	static DRIVER_INIT( chelnovu )
1144	1156	{
1145	1157	karnov_state *state = machine->driver_data<karnov_state>();
1146	1158	UINT16 *RAM = (UINT16 *)memory_region(machine, "maincpu");
1147	1159
1148		state->microcontroller_id = CHELNOVW;
	1160	state->microcontroller_id = CHELNOVU;
1149	1161	state->coin_mask = 0xe0;
1150	1162	RAM[0x0a26/2] = 0x4e71;  /* removes a protection lookup table */
1151	1163	RAM[0x062a/2] = 0x4e71;  /* hangs waiting on i8751 int */
r8962	r8963
1172	1184	GAME( 1987, karnov,   0,       karnov,   karnov,   karnov,   ROT0,   "Data East USA",         "Karnov (US)", GAME_SUPPORTS_SAVE )
1173	1185	GAME( 1987, karnovj,  karnov,  karnov,   karnov,   karnovj,  ROT0,   "Data East Corporation", "Karnov (Japan)", GAME_SUPPORTS_SAVE )
1174	1186	GAME( 1987, wndrplnt, 0,       wndrplnt, wndrplnt, wndrplnt, ROT270, "Data East Corporation", "Wonder Planet (Japan)", GAME_SUPPORTS_SAVE )
1175		GAME( 1988, chelnov,  0,       karnov,   chelnov,  chelnovw, ROT0,   "Data East Corporation", "Chelnov - Atomic Runner (World)", GAME_SUPPORTS_SAVE )
1176		GAME( 1988, chelnovu, chelnov, karnov,   chelnovu, chelnov,  ROT0,   "Data East USA",         "Chelnov - Atomic Runner (US)", GAME_SUPPORTS_SAVE )
1177		GAME( 1988, chelnovj, chelnov, karnov,   chelnovu, chelnovj, ROT0,   "Data East Corporation", "Chelnov - Atomic Runner (Japan)", GAME_SUPPORTS_SAVE )
	1187	GAME( 1988, chelnov,  0,       karnov,   chelnov,  chelnov,  ROT0,   "Data East Corporation", "Chelnov - Atomic Runner (World)", GAME_SUPPORTS_SAVE )
	1188	GAME( 1988, chelnovu, chelnov, karnov,   chelnovu, chelnovu, ROT0,   "Data East USA",         "Chelnov - Atomic Runner (US)", GAME_SUPPORTS_SAVE )
	1189	GAME( 1988, chelnovj, chelnov, karnov,   chelnovj, chelnovj, ROT0,   "Data East Corporation", "Chelnov - Atomic Runner (Japan)", GAME_SUPPORTS_SAVE )

src/mame/drivers/xtheball.c

r8962	r8963
27	27
28	28	/*************************************
29	29	*
30		*  Machine init
31		*
32		*************************************/
33
34		static MACHINE_RESET( xtheball )
35		{
36		tlc34076_reset(6);
37		}
38
39
40
41		/*************************************
42		*
43	30	*  Video update
44	31	*
45	32	*************************************/
r8962	r8963
48	35	{
49	36	UINT16 *srcbg = &vram_bg[(params->rowaddr << 8) & 0xff00];
50	37	UINT32 *dest = BITMAP_ADDR32(bitmap, scanline, 0);
51		const rgb_t *pens = tlc34076_get_pens();
	38	const rgb_t *pens = tlc34076_get_pens(screen.machine->device("tlc34076"));
52	39	int coladdr = params->coladdr;
53	40	int x;
54	41
r8962	r8963
93	80	*
94	81	*************************************/
95	82
96		static void xtheball_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	83	static void xtheball_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
97	84	{
98	85	if (address >= 0x01000000 && address <= 0x010fffff)
99	86	memcpy(shiftreg, &vram_bg[TOWORD(address & 0xff000)], TOBYTE(0x1000));
r8962	r8963
104	91	}
105	92
106	93
107		static void xtheball_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	94	static void xtheball_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
108	95	{
109	96	if (address >= 0x01000000 && address <= 0x010fffff)
110	97	memcpy(&vram_bg[TOWORD(address & 0xff000)], shiftreg, TOBYTE(0x1000));
r8962	r8963
215	202	AM_RANGE(0x00000000, 0x0001ffff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
216	203	AM_RANGE(0x01000000, 0x010fffff) AM_RAM AM_BASE(&vram_bg)
217	204	AM_RANGE(0x02000000, 0x020fffff) AM_RAM AM_BASE(&vram_fg)
218		AM_RANGE(0x03000000, 0x030000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
	205	AM_RANGE(0x03000000, 0x030000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)
219	206	AM_RANGE(0x03040000, 0x030401ff) AM_WRITE(bit_controls_w)
220	207	AM_RANGE(0x03040080, 0x0304008f) AM_READ_PORT("DSW")
221	208	AM_RANGE(0x03040100, 0x0304010f) AM_READ(analogx_r)
r8962	r8963
338	325	MDRV_CPU_ADD("maincpu", TMS34010, 40000000)
339	326	MDRV_CPU_CONFIG(tms_config)
340	327	MDRV_CPU_PROGRAM_MAP(main_map)
341		MDRV_CPU_PERIODIC_INT(irq1_line_hold,15000)
	328	MDRV_CPU_PERIODIC_INT(irq1_line_hold, 15000)
342	329
343		MDRV_MACHINE_RESET(xtheball)
344	330	MDRV_NVRAM_HANDLER(generic_1fill)
345	331
346	332	MDRV_TICKET_DISPENSER_ADD("ticket", 100, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
347	333
348	334	/* video hardware */
	335	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	336
349	337	MDRV_VIDEO_UPDATE(tms340x0)
350	338
351	339	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/segaybd.c

r8962	r8963
236	236	static TIMER_CALLBACK( delayed_sound_data_w )
237	237	{
238	238	segas1x_state *state = machine->driver_data<segas1x_state>();
239		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	239	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
240	240
241	241	soundlatch_w(space, 0, param);
242	242	cpu_set_input_line(state->soundcpu, INPUT_LINE_NMI, ASSERT_LINE);

src/mame/drivers/ddenlovr.c

r8962	r8963
693	693	#endif
694	694	}
695	695
696		static void blitter_w( const address_space *space, int blitter, offs_t offset, UINT8 data, int irq_vector )
	696	static void blitter_w( address_space *space, int blitter, offs_t offset, UINT8 data, int irq_vector )
697	697	{
698	698	dynax_state *state = space->machine->driver_data<dynax_state>();
699	699	int hi_bits;
700	700
701		profiler_mark_start(PROFILER_VIDEO);
	701	g_profiler.start(PROFILER_VIDEO);
702	702
703	703	switch (offset)
704	704	{
r8962	r8963
849	849	}
850	850	}
851	851
852		profiler_mark_end();
	852	g_profiler.stop();
853	853	}
854	854
855	855
r8962	r8963
861	861	dynax_state *state = machine->driver_data<dynax_state>();
862	862	int hi_bits;
863	863
864		profiler_mark_start(PROFILER_VIDEO);
	864	g_profiler.start(PROFILER_VIDEO);
865	865
866	866	switch(offset)
867	867	{
r8962	r8963
1007	1007	}
1008	1008	}
1009	1009
1010		profiler_mark_end();
	1010	g_profiler.stop();
1011	1011	}
1012	1012
1013	1013
r8962	r8963
1025	1025	dynax_state *state = space->machine->driver_data<dynax_state>();
1026	1026	int hi_bits;
1027	1027
1028		profiler_mark_start(PROFILER_VIDEO);
	1028	g_profiler.start(PROFILER_VIDEO);
1029	1029
1030	1030	hi_bits = (state->ddenlovr_blit_latch & 0x03) << 8;
1031	1031
r8962	r8963
1207	1207	break;
1208	1208	}
1209	1209
1210		profiler_mark_end();
	1210	g_profiler.stop();
1211	1211	}
1212	1212
1213	1213
r8962	r8963
3060	3060	Hanafuda Hana Gokou
3061	3061	***************************************************************************/
3062	3062
3063		static UINT8 hgokou_player_r( const address_space *space, int player )
	3063	static UINT8 hgokou_player_r( address_space *space, int player )
3064	3064	{
3065	3065	dynax_state *state = space->machine->driver_data<dynax_state>();
3066	3066	UINT8 hopper_bit = ((state->hopper && !(space->machine->primary_screen->frame_number() % 10)) ? 0 : (1 << 6));

src/mame/drivers/namcops2.c

r8962	r8963
41	41	static INPUT_PORTS_START( system246 )
42	42	INPUT_PORTS_END
43	43
44		static const mips3_config config =
	44	static const mips3_config r5000_config =
45	45	{
46	46	16384,            /* code cache size - probably wrong */
47	47	16384            /* data cache size */
r8962	r8963
50	50	static MACHINE_DRIVER_START( system246 )
51	51	MDRV_CPU_ADD("maincpu", R5000LE, 294000000)   // actually R5900 @ 294 MHz
52	52	MDRV_CPU_PROGRAM_MAP(ps2_map)
53		MDRV_CPU_CONFIG(config)
	53	MDRV_CPU_CONFIG(r5000_config)
54	54
55	55	/* video hardware */
56	56	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/gauntlet.c

r8962	r8963
144	144
145	145	static void scanline_update(screen_device &screen, int scanline)
146	146	{
147		const address_space *space = cputag_get_address_space(screen.machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	147	address_space *space = cputag_get_address_space(screen.machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
148	148
149	149	/* sound IRQ is on 32V */
150	150	if (scanline & 32)

src/mame/drivers/pinkiri8.c

r8962	r8963
432	432
433	433	case 3:
434	434
435		const address_space *vdp_space = space->machine->device<janshi_vdp_device>("janshivdp")->space();
	435	address_space *vdp_space = space->machine->device<janshi_vdp_device>("janshivdp")->space();
436	436
437	437	if (LOG_VRAM) printf("%02x ", data);
438	438	prev_writes++;
439	439	vram_addr++;
440	440
441		memory_write_byte_8le(vdp_space, vram_addr, data);
	441	vdp_space->write_byte(vram_addr, data);
442	442	break;
443	443	}
444	444	}

src/mame/drivers/suna8.c

r8962	r8963
82	82	/* Non encrypted bootleg */
83	83	static DRIVER_INIT( hardhedb )
84	84	{
85		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
86		memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x48000);
	85	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	86	space->set_decrypted_region(0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x48000);
87	87	memory_configure_bank(machine, "bank1", 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x4000);
88	88	}
89	89
r8962	r8963
95	95
96	96	static UINT8 *brickzn_decrypt(running_machine *machine)
97	97	{
98		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	98	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
99	99	UINT8   *RAM   =   memory_region(machine, "maincpu");
100	100	size_t   size   =   memory_region_length(machine, "maincpu");
101	101	UINT8   *decrypt = auto_alloc_array(machine, UINT8, size);
102	102	int i;
103	103
104		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	104	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
105	105
106	106	/* Opcodes and data */
107	107	for (i = 0; i < 0x50000; i++)
r8962	r8963
205	205
206	206	static DRIVER_INIT( hardhea2 )
207	207	{
208		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	208	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
209	209	UINT8   *RAM   =   memory_region(machine, "maincpu");
210	210	size_t   size   =   memory_region_length(machine, "maincpu");
211	211	UINT8   *decrypt =   auto_alloc_array(machine, UINT8, size);
212	212	UINT8 x;
213	213	int i;
214	214
215		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	215	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
216	216
217	217	/* Address lines scrambling */
218	218	memcpy(decrypt, RAM, size);
r8962	r8963
292	292
293	293	static DRIVER_INIT( starfigh )
294	294	{
295		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	295	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
296	296	UINT8   *RAM   =   memory_region(machine, "maincpu");
297	297	size_t   size   =   memory_region_length(machine, "maincpu");
298	298	UINT8   *decrypt =   auto_alloc_array(machine, UINT8, size);
299	299	UINT8 x;
300	300	int i;
301	301
302		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	302	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
303	303
304	304	/* Address lines scrambling */
305	305	memcpy(decrypt, RAM, size);
r8962	r8963
360	360
361	361	static DRIVER_INIT( sparkman )
362	362	{
363		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	363	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
364	364	UINT8   *RAM   =   memory_region(machine, "maincpu");
365	365	size_t   size   =   memory_region_length(machine, "maincpu");
366	366	UINT8   *decrypt =   auto_alloc_array(machine, UINT8, size);
367	367	UINT8 x;
368	368	int i;
369	369
370		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	370	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
371	371
372	372	/* Address lines scrambling */
373	373	memcpy(decrypt, RAM, size);
r8962	r8963
573	573	{
574	574	/* check code at 0x2ce2 (in sranger), protection is so dire that I can't even exactly
575	575	estabilish if what I'm doing can be considered or not a kludge... -AS */
576		memory_write_byte(space,0xcd99,0xff);
	576	space->write_byte(0xcd99,0xff);
577	577	}
578	578
579	579	static ADDRESS_MAP_START( rranger_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
1665	1665
1666	1666	static MACHINE_RESET( hardhea2 )
1667	1667	{
1668		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1668	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1669	1669	hardhea2_rambank_0_w(space,0,0);
1670	1670	}
1671	1671

src/mame/drivers/btime.c

r8962	r8963
206	206	}
207	207
208	208
209		static void btime_decrypt( const address_space *space )
	209	static void btime_decrypt( address_space *space )
210	210	{
211	211	btime_state *state = space->machine->driver_data<btime_state>();
212	212	UINT8 *src, *src1;
r8962	r8963
2077	2077
2078	2078	static void decrypt_C10707_cpu(running_machine *machine, const char *cputag)
2079	2079	{
2080		const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
	2080	address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
2081	2081	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
2082	2082	UINT8 *rom = memory_region(machine, cputag);
2083	2083	offs_t addr;
2084	2084
2085		memory_set_decrypted_region(space, 0x0000, 0xffff, decrypt);
	2085	space->set_decrypted_region(0x0000, 0xffff, decrypt);
2086	2086
2087	2087	/* Swap bits 5 & 6 for opcodes */
2088	2088	for (addr = 0; addr < 0x10000; addr++)
r8962	r8963
2107	2107
2108	2108	static void init_rom1(running_machine *machine)
2109	2109	{
2110		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2110	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2111	2111	UINT8 *rom = memory_region(machine, "maincpu");
2112	2112
2113	2113	decrypted = auto_alloc_array(machine, UINT8, 0x10000);
2114		memory_set_decrypted_region(space, 0x0000, 0xffff, decrypted);
	2114	space->set_decrypted_region(0x0000, 0xffff, decrypted);
2115	2115
2116	2116	/* For now, just copy the RAM array over to ROM. Decryption will happen */
2117	2117	/* at run time, since the CPU applies the decryption only if the previous */

src/mame/drivers/vp101.c

r8962	r8963
48	48	static INPUT_PORTS_START( vp101 )
49	49	INPUT_PORTS_END
50	50
51		static const mips3_config config =
	51	static const mips3_config r5000_config =
52	52	{
53	53	32768,            /* code cache size */
54	54	32768,            /* data cache size */
r8962	r8963
57	57
58	58	static MACHINE_DRIVER_START( vp101 )
59	59	MDRV_CPU_ADD("maincpu", R5000LE, 300000000)   /* actually VR5500 with added NEC VR-series custom instructions */
60		MDRV_CPU_CONFIG(config)
	60	MDRV_CPU_CONFIG(r5000_config)
61	61	MDRV_CPU_PROGRAM_MAP(main_map)
62	62
63	63	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/snk.c

r8962	r8963
268	268	#include "sound/8950intf.h"
269	269
270	270
271		static int countryc_trackball;
272
273		static int marvins_sound_busy_flag;
274		// FIXME this should be initialised on machine reset
275		static int sound_status;
276
277	271	/*********************************************************************/
278	272	// Interrupt handlers common to all SNK triple Z80 games
279	273
r8962	r8963
316	310
317	311	static WRITE8_HANDLER( marvins_soundlatch_w )
318	312	{
319		marvins_sound_busy_flag = 1;
	313	snk_state *state = space->machine->driver_data<snk_state>();
	314
	315	state->marvins_sound_busy_flag = 1;
320	316	soundlatch_w(space, offset, data);
321	317	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
322	318	}
323	319
324	320	static READ8_HANDLER( marvins_soundlatch_r )
325	321	{
326		marvins_sound_busy_flag = 0;
	322	snk_state *state = space->machine->driver_data<snk_state>();
	323
	324	state->marvins_sound_busy_flag = 0;
327	325	return soundlatch_r(space, 0);
328	326	}
329	327
330	328	static CUSTOM_INPUT( marvins_sound_busy )
331	329	{
332		return marvins_sound_busy_flag;
	330	snk_state *state = field->port->machine->driver_data<snk_state>();
	331
	332	return state->marvins_sound_busy_flag;
333	333	}
334	334
335	335	static READ8_HANDLER( marvins_sound_nmi_ack_r )
r8962	r8963
342	342
343	343	static TIMER_CALLBACK( sgladiat_sndirq_update_callback )
344	344	{
	345	snk_state *state = machine->driver_data<snk_state>();
	346
345	347	switch(param)
346	348	{
347	349	case CMDIRQ_BUSY_ASSERT:
348		sound_status |= 8|4;
	350	state->sound_status |= 8|4;
349	351	break;
350	352
351	353	case BUSY_CLEAR:
352		sound_status &= ~4;
	354	state->sound_status &= ~4;
353	355	break;
354	356
355	357	case CMDIRQ_CLEAR:
356		sound_status &= ~8;
	358	state->sound_status &= ~8;
357	359	break;
358	360	}
359	361
360		cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, (sound_status & 0x8) ? ASSERT_LINE : CLEAR_LINE);
	362	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, (state->sound_status & 0x8) ? ASSERT_LINE : CLEAR_LINE);
361	363	}
362	364
363	365
r8962	r8963
411	413
412	414	static TIMER_CALLBACK( sndirq_update_callback )
413	415	{
	416	snk_state *state = machine->driver_data<snk_state>();
	417
414	418	switch(param)
415	419	{
416	420	case YM1IRQ_ASSERT:
417		sound_status |= 1;
	421	state->sound_status |= 1;
418	422	break;
419	423
420	424	case YM1IRQ_CLEAR:
421		sound_status &= ~1;
	425	state->sound_status &= ~1;
422	426	break;
423	427
424	428	case YM2IRQ_ASSERT:
425		sound_status |= 2;
	429	state->sound_status |= 2;
426	430	break;
427	431
428	432	case YM2IRQ_CLEAR:
429		sound_status &= ~2;
	433	state->sound_status &= ~2;
430	434	break;
431	435
432	436	case CMDIRQ_BUSY_ASSERT:
433		sound_status |= 8|4;
	437	state->sound_status |= 8|4;
434	438	break;
435	439
436	440	case BUSY_CLEAR:
437		sound_status &= ~4;
	441	state->sound_status &= ~4;
438	442	break;
439	443
440	444	case CMDIRQ_CLEAR:
441		sound_status &= ~8;
	445	state->sound_status &= ~8;
442	446	break;
443	447	}
444	448
445		cputag_set_input_line(machine, "audiocpu", 0, (sound_status & 0xb) ? ASSERT_LINE : CLEAR_LINE);
	449	cputag_set_input_line(machine, "audiocpu", 0, (state->sound_status & 0xb) ? ASSERT_LINE : CLEAR_LINE);
446	450	}
447	451
448	452
r8962	r8963
490	494
491	495	static CUSTOM_INPUT( snk_sound_busy )
492	496	{
493		return (sound_status & 4) ? 1 : 0;
	497	snk_state *state = field->port->machine->driver_data<snk_state>();
	498
	499	return (state->sound_status & 4) ? 1 : 0;
494	500	}
495	501
496	502
497	503
498	504	static READ8_HANDLER( snk_sound_status_r )
499	505	{
500		return sound_status;
	506	snk_state *state = space->machine->driver_data<snk_state>();
	507
	508	return state->sound_status;
501	509	}
502	510
503	511	static WRITE8_HANDLER( snk_sound_status_w )
r8962	r8963
578	586
579	587	static int hardflags_check(running_machine *machine, int num)
580	588	{
581		const UINT8 *sr = &machine->generic.spriteram.u8[0x800 + 4*num];
	589	snk_state *state = machine->driver_data<snk_state>();
	590	const UINT8 *sr = &state->spriteram[0x800 + 4*num];
582	591	int x = sr[2] + ((sr[3] & 0x80) << 1);
583	592	int y = sr[0] + ((sr[3] & 0x10) << 4);
584	593
r8962	r8963
671	680
672	681	static int turbofront_check(running_machine *machine, int small, int num)
673	682	{
674		const UINT8 *sr = &machine->generic.spriteram.u8[0x800*small + 4*num];
	683	snk_state *state = machine->driver_data<snk_state>();
	684	const UINT8 *sr = &state->spriteram[0x800*small + 4*num];
675	685	int x = sr[2] + ((sr[3] & 0x80) << 1);
676	686	int y = sr[0] + ((sr[3] & 0x10) << 4);
677	687
r8962	r8963
730	740
731	741	static CUSTOM_INPUT( gwar_rotary )
732	742	{
733		static int last_value[2] = {0, 0};
734		static int cp_count[2] = {0, 0};
	743	snk_state *state = field->port->machine->driver_data<snk_state>();
735	744	static const char *const ports[] = { "P1ROT", "P2ROT" };
736	745	int which = (int)(FPTR)param;
737	746	int value = input_port_read(field->port->machine, ports[which]);
738	747
739		if ((last_value[which] == 0x5 && value == 0x6) || (last_value[which] == 0x6 && value == 0x5))
	748	if ((state->last_value[which] == 0x5 && value == 0x6) || (state->last_value[which] == 0x6 && value == 0x5))
740	749	{
741		if (!cp_count[which])
	750	if (!state->cp_count[which])
742	751	value = 0xf;
743		cp_count[which] = (cp_count[which] + 1) & 0x07;
	752	state->cp_count[which] = (state->cp_count[which] + 1) & 0x07;
744	753	}
745		last_value[which] = value;
	754	state->last_value[which] = value;
746	755
747	756	return value;
748	757	}
r8962	r8963
791	800
792	801	static WRITE8_HANDLER( countryc_trackball_w )
793	802	{
794		countryc_trackball = data & 1;
	803	snk_state *state = space->machine->driver_data<snk_state>();
	804
	805	state->countryc_trackball = data & 1;
795	806	}
796	807
797	808	static CUSTOM_INPUT( countryc_trackball_x )
798	809	{
799		return input_port_read(field->port->machine, countryc_trackball ? "TRACKBALLX2" : "TRACKBALLX1");
	810	snk_state *state = field->port->machine->driver_data<snk_state>();
	811
	812	return input_port_read(field->port->machine, state->countryc_trackball ? "TRACKBALLX2" : "TRACKBALLX1");
800	813	}
801	814
802	815	static CUSTOM_INPUT( countryc_trackball_y )
803	816	{
804		return input_port_read(field->port->machine, countryc_trackball ? "TRACKBALLY2" : "TRACKBALLY1");
	817	snk_state *state = field->port->machine->driver_data<snk_state>();
	818
	819	return input_port_read(field->port->machine, state->countryc_trackball ? "TRACKBALLY2" : "TRACKBALLY1");
805	820	}
806	821
807	822
r8962	r8963
842	857	AM_RANGE(0x8500, 0x8500) AM_READ_PORT("DSW2")
843	858	AM_RANGE(0x8600, 0x8600) AM_WRITE(marvins_flipscreen_w)
844	859	AM_RANGE(0x8700, 0x8700) AM_READWRITE(snk_cpuB_nmi_trigger_r, snk_cpuA_nmi_ack_w)
845		AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE_GENERIC(spriteram) AM_SHARE("share1")   // + work ram
846		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(marvins_fg_videoram_w) AM_SHARE("share2") AM_BASE(&snk_fg_videoram)
	860	AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE_MEMBER(snk_state, spriteram) AM_SHARE("share1")   // + work ram
	861	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(marvins_fg_videoram_w) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, fg_videoram)
847	862	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share3")
848		AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share4") AM_BASE(&snk_bg_videoram)
	863	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share4") AM_BASE_MEMBER(snk_state, bg_videoram)
849	864	AM_RANGE(0xe800, 0xefff) AM_RAM AM_SHARE("share5")
850		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share6") AM_BASE(&snk_tx_videoram)   // + work RAM
	865	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share6") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
851	866	AM_RANGE(0xf800, 0xf800) AM_WRITE(snk_sp16_scrolly_w)
852	867	AM_RANGE(0xf900, 0xf900) AM_WRITE(snk_sp16_scrollx_w)
853	868	AM_RANGE(0xfa00, 0xfa00) AM_WRITE(snk_fg_scrolly_w)
r8962	r8963
889	904	AM_RANGE(0x8500, 0x8500) AM_READ_PORT("DSW2")
890	905	AM_RANGE(0x8600, 0x8600) AM_MIRROR(0xff) AM_WRITE(marvins_flipscreen_w)
891	906	AM_RANGE(0x8700, 0x8700) AM_READWRITE(snk_cpuB_nmi_trigger_r, snk_cpuA_nmi_ack_w)
892		AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_BASE_GENERIC(spriteram) AM_SHARE("share1")   // + work ram
	907	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_BASE_MEMBER(snk_state, spriteram) AM_SHARE("share1")   // + work ram
893	908	AM_RANGE(0xc800, 0xc800) AM_MIRROR(0xff) AM_WRITE(marvins_palette_bank_w)
894		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE(&snk_bg_videoram)
	909	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, bg_videoram)
895	910	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share3")
896		AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(marvins_fg_videoram_w) AM_SHARE("share4") AM_BASE(&snk_fg_videoram)
	911	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(marvins_fg_videoram_w) AM_SHARE("share4") AM_BASE_MEMBER(snk_state, fg_videoram)
897	912	AM_RANGE(0xe800, 0xefff) AM_RAM AM_SHARE("share5")
898		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share6") AM_BASE(&snk_tx_videoram)   // + work RAM
	913	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share6") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
899	914	AM_RANGE(0xf800, 0xf800) AM_MIRROR(0xff) AM_WRITE(snk_bg_scrolly_w)
900	915	AM_RANGE(0xf900, 0xf900) AM_MIRROR(0xff) AM_WRITE(snk_bg_scrollx_w)
901	916	AM_RANGE(0xfa00, 0xfa00) AM_MIRROR(0xff) AM_WRITE(snk_sprite_split_point_w)
r8962	r8963
936	951	AM_RANGE(0x8500, 0x8500) AM_READ_PORT("DSW2")
937	952	AM_RANGE(0x8600, 0x8600) AM_MIRROR(0xff) AM_WRITE(marvins_flipscreen_w)
938	953	AM_RANGE(0x8700, 0x8700) AM_READWRITE(snk_cpuB_nmi_trigger_r, snk_cpuA_nmi_ack_w)
939		AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_BASE_GENERIC(spriteram) AM_SHARE("share1")   // + work ram
940		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(marvins_fg_videoram_w) AM_SHARE("share4")  AM_BASE(&snk_fg_videoram)
	954	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_BASE_MEMBER(snk_state, spriteram) AM_SHARE("share1")   // + work ram
	955	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(marvins_fg_videoram_w) AM_SHARE("share4") AM_BASE_MEMBER(snk_state, fg_videoram)
941	956	AM_RANGE(0xc800, 0xc800) AM_MIRROR(0xff) AM_WRITE(marvins_palette_bank_w)
942	957	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share5")
943		AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2")AM_BASE(&snk_bg_videoram)
	958	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, bg_videoram)
944	959	AM_RANGE(0xe800, 0xefff) AM_RAM AM_SHARE("share3")
945		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share6") AM_BASE(&snk_tx_videoram)
	960	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share6") AM_BASE_MEMBER(snk_state, tx_videoram)
946	961	AM_RANGE(0xf800, 0xf800) AM_WRITE(snk_sp16_scrolly_w)
947	962	AM_RANGE(0xf900, 0xf900) AM_WRITE(snk_sp16_scrollx_w)
948	963	AM_RANGE(0xfa00, 0xfa00) AM_WRITE(snk_fg_scrolly_w)
r8962	r8963
989	1004	AM_RANGE(0xd500, 0xd500) AM_WRITE(snk_sp16_scrollx_w)
990	1005	AM_RANGE(0xd600, 0xd600) AM_WRITE(snk_bg_scrolly_w)
991	1006	AM_RANGE(0xd700, 0xd700) AM_WRITE(snk_bg_scrollx_w)
992		AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE_GENERIC(spriteram) AM_SHARE("share1")   // + work ram
993		AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE(&snk_bg_videoram)
994		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share3") AM_BASE(&snk_tx_videoram)   // + work RAM
	1007	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE_MEMBER(snk_state, spriteram) AM_SHARE("share1")   // + work ram
	1008	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, bg_videoram)
	1009	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share3") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
995	1010	AM_RANGE(0xffff, 0xffff) AM_WRITENOP   // simply a program patch to not write to two not existing video registers?
996	1011	ADDRESS_MAP_END
997	1012
r8962	r8963
1020	1035	AM_RANGE(0xd500, 0xd500) AM_WRITE(snk_sp16_scrollx_w)
1021	1036	AM_RANGE(0xd600, 0xd600) AM_WRITE(snk_bg_scrolly_w)
1022	1037	AM_RANGE(0xd700, 0xd700) AM_WRITE(snk_bg_scrollx_w)
1023		AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE_GENERIC(spriteram) AM_SHARE("share1")   // + work ram
1024		AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE(&snk_bg_videoram)
	1038	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE_MEMBER(snk_state, spriteram) AM_SHARE("share1")   // + work ram
	1039	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, bg_videoram)
1025	1040	AM_RANGE(0xe800, 0xefff) AM_RAM
1026		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share3") AM_BASE(&snk_tx_videoram)   // + work RAM
	1041	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share3") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
1027	1042	ADDRESS_MAP_END
1028	1043
1029	1044	static ADDRESS_MAP_START( sgladiat_cpuB_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
1057	1072	AM_RANGE(0xd500, 0xd500) AM_WRITE(snk_sp16_scrollx_w)
1058	1073	AM_RANGE(0xd600, 0xd600) AM_WRITE(snk_bg_scrolly_w)
1059	1074	AM_RANGE(0xd700, 0xd700) AM_WRITE(snk_bg_scrollx_w)
1060		AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_GENERIC(spriteram) AM_SHARE("share1")   // + work ram
1061		AM_RANGE(0xe800, 0xf7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE(&snk_bg_videoram)
1062		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share3") AM_BASE(&snk_tx_videoram)   // + work RAM
	1075	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_MEMBER(snk_state, spriteram) AM_SHARE("share1")   // + work ram
	1076	AM_RANGE(0xe800, 0xf7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, bg_videoram)
	1077	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share3") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
1063	1078	ADDRESS_MAP_END
1064	1079
1065	1080	static ADDRESS_MAP_START( hal21_cpuB_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
1088	1103	AM_RANGE(0xce00, 0xce00) AM_WRITENOP   // always 05?
1089	1104	AM_RANGE(0xcf00, 0xcf00) AM_WRITE(aso_bg_bank_w)   // tile and palette bank
1090	1105	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share1")
1091		AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("share2") AM_BASE_GENERIC(spriteram)   // + work ram
1092		AM_RANGE(0xe800, 0xf7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share3") AM_BASE(&snk_bg_videoram)
1093		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE(&snk_tx_videoram)   // + work RAM
	1106	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("share2") AM_BASE_MEMBER(snk_state, spriteram)   // + work ram
	1107	AM_RANGE(0xe800, 0xf7ff) AM_RAM_WRITE(marvins_bg_videoram_w) AM_SHARE("share3") AM_BASE_MEMBER(snk_state, bg_videoram)
	1108	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
1094	1109	ADDRESS_MAP_END
1095	1110
1096	1111	static ADDRESS_MAP_START( aso_cpuB_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
1121	1136	AM_RANGE(0xcb00, 0xcb00) AM_WRITE(snk_bg_scrolly_w)
1122	1137	AM_RANGE(0xcc00, 0xcc00) AM_WRITE(snk_bg_scrollx_w)
1123	1138	AM_RANGE(0xcf00, 0xcf00) AM_WRITENOP   // fitegolf/countryc only. Either 0 or 1. Video related?
1124		AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_SHARE("share1") AM_BASE_GENERIC(spriteram)   // + work ram
1125		AM_RANGE(0xd800, 0xf7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share2") AM_BASE(&snk_bg_videoram)
1126		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share3") AM_BASE(&snk_tx_videoram)   // + work RAM
	1139	AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_SHARE("share1") AM_BASE_MEMBER(snk_state, spriteram)   // + work ram
	1140	AM_RANGE(0xd800, 0xf7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, bg_videoram)
	1141	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share3") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
1127	1142	ADDRESS_MAP_END
1128	1143
1129	1144	static ADDRESS_MAP_START( tnk3_cpuB_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
1167	1182	AM_RANGE(0xcea0, 0xcea0) AM_READ(hardflags6_r)
1168	1183	AM_RANGE(0xcee0, 0xcee0) AM_READ(hardflags7_r)
1169	1184	// note the mirror. ikari and victroad use d800, ikarijp uses d000
1170		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_MIRROR(0x0800) AM_SHARE("share2") AM_BASE(&snk_bg_videoram)
1171		AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share3") AM_BASE_GENERIC(spriteram)   // + work ram
1172		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE(&snk_tx_videoram)   // + work RAM
	1185	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_MIRROR(0x0800) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, bg_videoram)
	1186	AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share3") AM_BASE_MEMBER(snk_state, spriteram)   // + work ram
	1187	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
1173	1188	ADDRESS_MAP_END
1174	1189
1175	1190	static ADDRESS_MAP_START( ikari_cpuB_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
1230	1245	AM_RANGE(0xccd0, 0xccd0) AM_READ(turbocheck32_2_r)
1231	1246	AM_RANGE(0xcce0, 0xcce0) AM_READ(turbocheck32_3_r)
1232	1247	AM_RANGE(0xccf0, 0xccf0) AM_READ(turbocheck32_4_r)
1233		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share1") AM_BASE(&snk_bg_videoram)
	1248	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share1") AM_BASE_MEMBER(snk_state, bg_videoram)
1234	1249	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share2")
1235		AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share3") AM_BASE_GENERIC(spriteram)   // + work ram
1236		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE(&snk_tx_videoram)   // + work RAM
	1250	AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share3") AM_BASE_MEMBER(snk_state, spriteram)   // + work ram
	1251	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
1237	1252	ADDRESS_MAP_END
1238	1253
1239	1254	static ADDRESS_MAP_START( bermudat_cpuB_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
1276	1291	AM_RANGE(0xca00, 0xca00) AM_WRITENOP   // always 0?
1277	1292	AM_RANGE(0xca40, 0xca40) AM_WRITENOP   // always 0?
1278	1293	AM_RANGE(0xcac0, 0xcac0) AM_WRITE(snk_sprite_split_point_w)
1279		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share1") AM_BASE(&snk_bg_videoram)
	1294	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share1") AM_BASE_MEMBER(snk_state, bg_videoram)
1280	1295	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share2")
1281		AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share3") AM_BASE_GENERIC(spriteram)   // + work ram
1282		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE(&snk_tx_videoram)   // + work RAM
	1296	AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share3") AM_BASE_MEMBER(snk_state, spriteram)   // + work ram
	1297	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
1283	1298	ADDRESS_MAP_END
1284	1299
1285	1300	static ADDRESS_MAP_START( gwar_cpuB_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
1303	1318	AM_RANGE(0xc500, 0xc500) AM_READ_PORT("DSW1")
1304	1319	AM_RANGE(0xc600, 0xc600) AM_READ_PORT("DSW2")
1305	1320	AM_RANGE(0xc700, 0xc700) AM_READWRITE(snk_cpuB_nmi_trigger_r, snk_cpuA_nmi_ack_w)
1306		AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share1") AM_BASE(&snk_tx_videoram)   // + work RAM
1307		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share2") AM_BASE(&snk_bg_videoram)
	1321	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share1") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
	1322	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share2") AM_BASE_MEMBER(snk_state, bg_videoram)
1308	1323	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share3")
1309		AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share4") AM_BASE_GENERIC(spriteram)   // + work ram
	1324	AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share4") AM_BASE_MEMBER(snk_state, spriteram)   // + work ram
1310	1325	AM_RANGE(0xf800, 0xf800) AM_WRITE(snk_bg_scrolly_w)
1311	1326	AM_RANGE(0xf840, 0xf840) AM_WRITE(snk_bg_scrollx_w)
1312	1327	AM_RANGE(0xf880, 0xf880) AM_WRITE(gwara_videoattrs_w)   // flip screen, scroll msb
r8962	r8963
1325	1340	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share1")
1326	1341	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share2")
1327	1342	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share3")
1328		AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share4") AM_BASE_GENERIC(spriteram)   // + work ram
	1343	AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share4") AM_BASE_MEMBER(snk_state, spriteram)   // + work ram
1329	1344	AM_RANGE(0xf8c0, 0xf8c0) AM_WRITE(gwar_tx_bank_w)   // char and palette bank
1330	1345	ADDRESS_MAP_END
1331	1346
r8962	r8963
1354	1369	AM_RANGE(0xc900, 0xc900) AM_WRITE(tdfever_sp_scroll_msb_w)
1355	1370	AM_RANGE(0xc980, 0xc980) AM_WRITE(snk_sp32_scrolly_w)
1356	1371	AM_RANGE(0xc9c0, 0xc9c0) AM_WRITE(snk_sp32_scrollx_w)
1357		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share1") AM_BASE(&snk_bg_videoram)
	1372	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(snk_bg_videoram_w) AM_SHARE("share1") AM_BASE_MEMBER(snk_state, bg_videoram)
1358	1373	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("share2")
1359		AM_RANGE(0xe000, 0xf7ff) AM_RAM_WRITE(tdfever_spriteram_w) AM_SHARE("share3") AM_BASE_GENERIC(spriteram)   // + work ram
1360		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE(&snk_tx_videoram)   // + work RAM
	1374	AM_RANGE(0xe000, 0xf7ff) AM_RAM_WRITE(tdfever_spriteram_w) AM_SHARE("share3") AM_BASE_MEMBER(snk_state, spriteram)   // + work ram
	1375	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(snk_tx_videoram_w) AM_SHARE("share4") AM_BASE_MEMBER(snk_state, tx_videoram)   // + work RAM
1361	1376	ADDRESS_MAP_END
1362	1377
1363	1378	static ADDRESS_MAP_START( tdfever_cpuB_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
3612	3627
3613	3628	static MACHINE_DRIVER_START( marvins )
3614	3629
	3630	MDRV_DRIVER_DATA( snk_state )
	3631
3615	3632	/* basic machine hardware */
3616	3633	MDRV_CPU_ADD("maincpu", Z80, 3360000)   /* 3.36 MHz */
3617	3634	MDRV_CPU_PROGRAM_MAP(marvins_cpuA_map)
r8962	r8963
3686	3703
3687	3704	static MACHINE_DRIVER_START( jcross )
3688	3705
	3706	MDRV_DRIVER_DATA( snk_state )
	3707
3689	3708	/* basic machine hardware */
3690	3709	MDRV_CPU_ADD("maincpu", Z80, 3350000) /* NOT verified */
3691	3710	MDRV_CPU_PROGRAM_MAP(jcross_cpuA_map)
r8962	r8963
3771	3790
3772	3791	static MACHINE_DRIVER_START( tnk3 )
3773	3792
	3793	MDRV_DRIVER_DATA( snk_state )
	3794
3774	3795	/* basic machine hardware */
3775	3796	MDRV_CPU_ADD("maincpu", Z80, XTAL_13_4MHz/4) /* verified on pcb */
3776	3797	MDRV_CPU_PROGRAM_MAP(tnk3_cpuA_map)
r8962	r8963
3862	3883
3863	3884	static MACHINE_DRIVER_START( ikari )
3864	3885
	3886	MDRV_DRIVER_DATA( snk_state )
	3887
3865	3888	/* basic machine hardware */
3866	3889	MDRV_CPU_ADD("maincpu", Z80, XTAL_13_4MHz/4) /* verified on pcb */
3867	3890	MDRV_CPU_PROGRAM_MAP(ikari_cpuA_map)
r8962	r8963
3922	3945
3923	3946	static MACHINE_DRIVER_START( bermudat )
3924	3947
	3948	MDRV_DRIVER_DATA( snk_state )
	3949
3925	3950	/* basic machine hardware */
3926	3951	MDRV_CPU_ADD("maincpu", Z80, XTAL_8MHz/2) /* verified on pcb */
3927	3952	MDRV_CPU_PROGRAM_MAP(bermudat_cpuA_map)
r8962	r8963
4036	4061
4037	4062	static MACHINE_DRIVER_START( tdfever )
4038	4063
	4064	MDRV_DRIVER_DATA( snk_state )
	4065
4039	4066	/* basic machine hardware */
4040	4067	MDRV_CPU_ADD("maincpu", Z80, 4000000)
4041	4068	MDRV_CPU_PROGRAM_MAP(tdfever_cpuA_map)

src/mame/drivers/model2.c

r8962	r8963
199	199	static int copro_fifoout_rpos, copro_fifoout_wpos;
200	200	static UINT32 copro_fifoout_data[COPRO_FIFOOUT_SIZE];
201	201	static int copro_fifoout_num = 0;
202		static UINT32 copro_fifoout_pop(const address_space *space)
	202	static UINT32 copro_fifoout_pop(address_space *space)
203	203	{
204	204	UINT32 r;
205	205
r8962	r8963
1012	1012
1013	1013	static int to_68k;
1014	1014
1015		static int snd_68k_ready_r(const address_space *space)
	1015	static int snd_68k_ready_r(address_space *space)
1016	1016	{
1017	1017	int sr = cpu_get_reg(space->machine->device("audiocpu"), M68K_SR);
1018	1018
r8962	r8963
1025	1025	return 0xff;
1026	1026	}
1027	1027
1028		static void snd_latch_to_68k_w(const address_space *space, int data)
	1028	static void snd_latch_to_68k_w(address_space *space, int data)
1029	1029	{
1030	1030	if (!snd_68k_ready_r(space))
1031	1031	{

src/mame/drivers/sshangha.c

r8962	r8963
128	128
129	129	static MACHINE_RESET( sshangha )
130	130	{
131		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	131	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
132	132	/* Such thing is needed as there is no code to turn the screen
133	133	to normal orientation when the game is reset.
134	134	I'm using the value that forces the screen to be in normal

src/mame/drivers/cps2.c

r8962	r8963
1306	1306	ROM_LOAD16_WORD_SWAP( "nff.12m",   0x400000, 0x400000, CRC(4fcf1600) SHA1(36f18c5d92b79433bdf7088b29a244708929d48e) )
1307	1307	ROM_END
1308	1308
	1309
	1310
	1311
1309	1312	ROM_START( 1944j )
1310	1313	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
1311	1314	ROM_LOAD16_WORD_SWAP( "nffj.03", 0x000000, 0x80000, CRC(247521ef) SHA1(c6a04f514dd5ab40d8813dcfb8430bce54e7aa28) )
r8962	r8963
7900	7903	static DRIVER_INIT( gigamn2 )
7901	7904	{
7902	7905	cps_state *state = machine->driver_data<cps_state>();
7903		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	7906	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
7904	7907	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
7905	7908	int length = memory_region_length(machine, "maincpu");
7906	7909
r8962	r8963
7910	7913	state_save_register_global_pointer(machine, state->gigamn2_dummyqsound_ram, 0x20000 / 2);
7911	7914
7912	7915	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x618000, 0x619fff, 0, 0, gigamn2_dummyqsound_r, gigamn2_dummyqsound_w); // no qsound..
7913		memory_set_decrypted_region(space, 0x000000, (length) - 1, &rom[length/4]);
	7916	space->set_decrypted_region(0x000000, (length) - 1, &rom[length/4]);
7914	7917	m68k_set_encrypted_opcode_range(machine->device("maincpu"), 0, length);
7915	7918	}
7916	7919
r8962	r8963
8408	8411	ROM_LOAD16_WORD_SWAP( "dd2.12m",   0x200000, 0x200000, CRC(5ea2e7fa) SHA1(0e6a9fd007f637adcb2226c902394f07de45e803) )
8409	8412	ROM_END
8410	8413
8411		ROM_START( gwingjd )
	8414	ROM_START( ecofghtrd )
	8415	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	8416	ROM_LOAD16_WORD_SWAP( "ueced.03", 0x000000, 0x80000, CRC(ac725d2b) SHA1(f77a37d160aed34319ef810728de88a87bccb7a5) )
	8417	ROM_LOAD16_WORD_SWAP( "ueced.04", 0x080000, 0x80000, CRC(f800138d) SHA1(a8c05da5d33c338a82fed4f7b59c6ba8c10e8597) )
	8418	ROM_LOAD16_WORD_SWAP( "ueced.05", 0x100000, 0x80000, CRC(eb6a12f2) SHA1(5253a193a38b566eefbb8644511f283ac4a69850) )
	8419	ROM_LOAD16_WORD_SWAP( "ueced.06", 0x180000, 0x80000, CRC(8380ec9a) SHA1(4f3a95a2580f89ae214b588df9258bd9dc06f993) )
	8420
	8421	ROM_REGION( 0xc00000, "gfx", 0 )
	8422	ROMX_LOAD( "uec.13m",   0x000000, 0x200000, CRC(dcaf1436) SHA1(ba124cc0bb10c1d1c07592a3623add4ed054182e) , ROM_GROUPWORD | ROM_SKIP(6) )
	8423	ROMX_LOAD( "uec.15m",   0x000002, 0x200000, CRC(2807df41) SHA1(66a9800af435055737ce50a0b0ced7c5718c2004) , ROM_GROUPWORD | ROM_SKIP(6) )
	8424	ROMX_LOAD( "uec.17m",   0x000004, 0x200000, CRC(8a708d02) SHA1(95ec527edc904a66e325667521b4d07d72579211) , ROM_GROUPWORD | ROM_SKIP(6) )
	8425	ROMX_LOAD( "uec.19m",   0x000006, 0x200000, CRC(de7be0ef) SHA1(bf8df9a31f8923f4b726ea12fe8327368463ebe1) , ROM_GROUPWORD | ROM_SKIP(6) )
	8426	ROMX_LOAD( "uec.14m",   0x800000, 0x100000, CRC(1a003558) SHA1(64bbd89e65dc0cf6f4ab5ea93a4cc6312d0d0802) , ROM_GROUPWORD | ROM_SKIP(6) )
	8427	ROMX_LOAD( "uec.16m",   0x800002, 0x100000, CRC(4ff8a6f9) SHA1(03968a301417e8843d42d4e0db42aa0a3a38664b) , ROM_GROUPWORD | ROM_SKIP(6) )
	8428	ROMX_LOAD( "uec.18m",   0x800004, 0x100000, CRC(b167ae12) SHA1(48c552d02caad27d680aa51170560794f2a51478) , ROM_GROUPWORD | ROM_SKIP(6) )
	8429	ROMX_LOAD( "uec.20m",   0x800006, 0x100000, CRC(1064bdc2) SHA1(c51f75ac8d3f02a771feda0a933314a928555c4e) , ROM_GROUPWORD | ROM_SKIP(6) )
	8430
	8431	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	8432	ROM_LOAD( "uec.01",   0x00000, 0x08000, CRC(c235bd15) SHA1(feb7cd7db9dc0b9887b33eed9796bb0205fb719d) )
	8433	ROM_CONTINUE(         0x10000, 0x18000 )
	8434
	8435	ROM_REGION( 0x400000, "qsound", 0 ) /* QSound samples */
	8436	ROM_LOAD16_WORD_SWAP( "uec.11m",   0x000000, 0x200000, CRC(81b25d39) SHA1(448adfcc7d98873a48c710d857225cdd1580e5c9) )
	8437	ROM_LOAD16_WORD_SWAP( "uec.12m",   0x200000, 0x200000, CRC(27729e52) SHA1(a55c8159adf766dda70cb047f5ac85ce6bc0a3f3) )
	8438	ROM_END
	8439
	8440
	8441	ROM_START( gigawingjd )
8412	8442	ROM_REGION(CODE_SIZE, "maincpu", 0 )      /* 68000 code */
8413	8443	ROM_LOAD16_WORD_SWAP( "ggwjd.03a", 0x000000, 0x80000, CRC(cb1c756e) SHA1(f8b37120b429e14aad6e7d2106f8f8c422f2ce2b) )
8414	8444	ROM_LOAD16_WORD_SWAP( "ggwjd.04a", 0x080000, 0x80000, CRC(fa158e04) SHA1(bd0f0351fabe376944c28e327bcf83a8d9229441) )
r8962	r8963
8432	8462	ROM_LOAD16_WORD_SWAP( "ggw.12m",   0x400000, 0x400000, CRC(4bee4e8f) SHA1(c440b5a38359ec3b8002f39690b79bf78703f5d0) )
8433	8463	ROM_END
8434	8464
	8465
	8466	ROM_START( gigawingd )
	8467	ROM_REGION(CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	8468	ROM_LOAD16_WORD_SWAP( "ggwu_d.03", 0x000000, 0x80000, CRC(dde92dfa) SHA1(37b052438663d771c256c6cc61cd3f15c560f1b8) )
	8469	ROM_LOAD16_WORD_SWAP( "ggwu_d.04", 0x080000, 0x80000, CRC(e0509ae2) SHA1(6962cda86351194fe901edd2b99d9da622c00c36) )
	8470	ROM_LOAD16_WORD_SWAP( "ggw_d.05", 0x100000, 0x80000, CRC(722d0042) SHA1(8587e42d4781c503bc8871b88d3f85e21659c50e) )
	8471
	8472	ROM_REGION16_BE( CODE_SIZE, "user1", 0 )
	8473	ROM_FILL( 0x000000, 0x100000, 0 )
	8474
	8475	ROM_REGION( 0x1000000, "gfx", 0 )
	8476	ROMX_LOAD( "ggw.13m",   0x000000, 0x400000, CRC(105530a4) SHA1(3be06c032985ea6bd3805d73a407bf748385087b) , ROM_GROUPWORD | ROM_SKIP(6) )
	8477	ROMX_LOAD( "ggw.15m",   0x000002, 0x400000, CRC(9e774ab9) SHA1(adea1e844f3d9ccd5ad116ff8277f16a96e68d76) , ROM_GROUPWORD | ROM_SKIP(6) )
	8478	ROMX_LOAD( "ggw.17m",   0x000004, 0x400000, CRC(466e0ba4) SHA1(9563455b95d36fafe508290659088b153539cfdf) , ROM_GROUPWORD | ROM_SKIP(6) )
	8479	ROMX_LOAD( "ggw.19m",   0x000006, 0x400000, CRC(840c8dea) SHA1(ea04afce17f00b45d3d2cd5140d0dd7ab4bccc00) , ROM_GROUPWORD | ROM_SKIP(6) )
	8480
	8481	ROM_REGION(QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	8482	ROM_LOAD( "ggw.01",   0x00000, 0x08000, CRC(4c6351d5) SHA1(cef81fb7c4b8cb2ef1f8f3c27982aefbcbe38160) )
	8483	ROM_CONTINUE(         0x10000, 0x18000 )
	8484
	8485	ROM_REGION( 0x800000, "qsound", 0 ) /* QSound samples */
	8486	ROM_LOAD16_WORD_SWAP( "ggw.11m",   0x000000, 0x400000, CRC(e172acf5) SHA1(d7b0963d66165f3607d887741c5e7ab952bcf2ff) )
	8487	ROM_LOAD16_WORD_SWAP( "ggw.12m",   0x400000, 0x400000, CRC(4bee4e8f) SHA1(c440b5a38359ec3b8002f39690b79bf78703f5d0) )
	8488	ROM_END
	8489
8435	8490	ROM_START( hsf2d )
8436	8491	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
8437	8492	ROM_LOAD16_WORD_SWAP( "hs2ad.03", 0x000000, 0x80000, CRC(0153d371) SHA1(137f89b4ca41346abd8d1ef4a17605f6622b741e) )
r8962	r8963
8873	8928	ROM_LOAD16_WORD_SWAP( "vam.12m",   0x200000, 0x200000, CRC(1a3e5c03) SHA1(c5a556e125d6c3d68da745b4d56cd7a851f2a23d) )
8874	8929	ROM_END
8875	8930
8876		ROM_START( progerjd )
	8931
	8932
	8933
	8934	ROM_START( progearud )
8877	8935	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
8878		ROM_LOAD16_WORD_SWAP( "pgajd.03", 0x000000, 0x80000, CRC(4fef676c) SHA1(f50f32403315f77e115141bbee6a1b9a800821eb) )
8879		ROM_LOAD16_WORD_SWAP( "pgajd.04", 0x080000, 0x80000, CRC(a069bd3b) SHA1(6b7e20c883221da9b8eccb4f86017bb93e1fc11f) )
	8936	ROM_LOAD16_WORD_SWAP( "pgau_d.03", 0x000000, 0x80000, CRC(ba22b9c5) SHA1(3bacef465ad137b7d618ad7dbe4a0f29b3422a31) )
	8937	ROM_LOAD16_WORD_SWAP( "pgau_d.04", 0x080000, 0x80000, CRC(df3927ef) SHA1(2869f3f7c1ae76e9b3ce5c66eed277ee8484aeba) )
8880	8938
8881	8939	ROM_REGION( 0x1000000, "gfx", 0 )
8882	8940	ROMX_LOAD( "pga-simm.01c",   0x0000000, 0x200000,  CRC(452f98b0) SHA1(a10e615c32098f6d25becd466da8faa967523a7b) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
r8962	r8963
8899	8957	ROM_LOAD16_WORD_SWAP( "pga-simm.06b",   0x600000, 0x200000, CRC(8b39489a) SHA1(fd790efaf37dc2c4c16f657941044e3e2d3c2711) ) // ROM on a simm
8900	8958	ROM_END
8901	8959
	8960
	8961	ROM_START( progearjd )
	8962	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	8963	ROM_LOAD16_WORD_SWAP( "pgaj_d.03", 0x000000, 0x80000, CRC(0271f3a3) SHA1(caf5ce19aa3471e65931ebd7ef06693e9fdf11a7) )
	8964	ROM_LOAD16_WORD_SWAP( "pgaj_d.04", 0x080000, 0x80000, CRC(be4b7799) SHA1(0414922296079ca9380a41bf3c628ce67acec06d) )
	8965
	8966	ROM_REGION( 0x1000000, "gfx", 0 )
	8967	ROMX_LOAD( "pga-simm.01c",   0x0000000, 0x200000,  CRC(452f98b0) SHA1(a10e615c32098f6d25becd466da8faa967523a7b) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
	8968	ROMX_LOAD( "pga-simm.01d",   0x0000001, 0x200000,  CRC(9e672092) SHA1(fce0b8b43a1c069262f4e3e81c1a04621e232c88) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
	8969	ROMX_LOAD( "pga-simm.01a",   0x0000002, 0x200000,  CRC(ae9ddafe) SHA1(afbb26fed6cd0cb5c0099a10d35aeb453318c14d) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
	8970	ROMX_LOAD( "pga-simm.01b",   0x0000003, 0x200000,  CRC(94d72d94) SHA1(df6a3fe49c008f73b160eb6f2a44dc371ff73cba) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
	8971	ROMX_LOAD( "pga-simm.03c",   0x0000004, 0x200000,  CRC(48a1886d) SHA1(ebf44b42d784924e08a832a7e5f66a887bab244b) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
	8972	ROMX_LOAD( "pga-simm.03d",   0x0000005, 0x200000,  CRC(172d7e37) SHA1(0eaedd24cd3fa87b6f35fbd63078d40c493c92d0) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
	8973	ROMX_LOAD( "pga-simm.03a",   0x0000006, 0x200000,  CRC(9ee33d98) SHA1(85d1bd31940e35ac8c732165020881a2d65cd6b1) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
	8974	ROMX_LOAD( "pga-simm.03b",   0x0000007, 0x200000,  CRC(848dee32) SHA1(c591288e86ad1624d0fe66563808af9fac786e64) , ROM_GROUPBYTE | ROM_SKIP(7) ) // ROM on a simm
	8975
	8976	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	8977	ROM_LOAD( "pga.01",   0x00000, 0x08000, CRC(bdbfa992) SHA1(7c5496c1daaea6a7ab95c0b25625d325ec3427cc) )
	8978	ROM_CONTINUE(         0x10000, 0x18000 )
	8979
	8980	ROM_REGION( 0x800000, "qsound", 0 ) /* QSound samples */
	8981	ROM_LOAD16_WORD_SWAP( "pga-simm.05a",   0x000000, 0x200000, CRC(c0aac80c) SHA1(91784d35d4f7e113529bb5be6081b67094b150ea) ) // ROM on a simm
	8982	ROM_LOAD16_WORD_SWAP( "pga-simm.05b",   0x200000, 0x200000, CRC(37a65d86) SHA1(374d562a4648734f82aa2ddb6d258e870896dd45) ) // ROM on a simm
	8983	ROM_LOAD16_WORD_SWAP( "pga-simm.06a",   0x400000, 0x200000, CRC(d3f1e934) SHA1(5dcea28c873d0d472f5b94e07d97cd77ace2b252) ) // ROM on a simm
	8984	ROM_LOAD16_WORD_SWAP( "pga-simm.06b",   0x600000, 0x200000, CRC(8b39489a) SHA1(fd790efaf37dc2c4c16f657941044e3e2d3c2711) ) // ROM on a simm
	8985	ROM_END
	8986
	8987	ROM_START( progearjbl )
	8988	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	8989	ROM_LOAD16_WORD_SWAP( "pgaj_bl.03", 0x000000, 0x80000, CRC(4fef676c) SHA1(f50f32403315f77e115141bbee6a1b9a800821eb) )
	8990	ROM_LOAD16_WORD_SWAP( "pgaj_bl.04", 0x080000, 0x80000, CRC(a069bd3b) SHA1(6b7e20c883221da9b8eccb4f86017bb93e1fc11f) )
	8991
	8992	ROM_REGION( 0x1000000, "gfx", 0 )
	8993	ROMX_LOAD( "pga.13m",   0x0000000, 0x400000, CRC(5194c198) SHA1(f9ae16cad8b30547b8dd3a1ea1d6e845d76ccefe) , ROM_GROUPWORD | ROM_SKIP(6) )
	8994	ROMX_LOAD( "pga.15m",   0x0000002, 0x400000, CRC(b794e83f) SHA1(0332fa798b2955464ab336929866c9185bd4b520) , ROM_GROUPWORD | ROM_SKIP(6) )
	8995	ROMX_LOAD( "pga.17m",   0x0000004, 0x400000, CRC(87f22918) SHA1(7f048d66593f385526bd2c669cf6b8ad58d12bbf) , ROM_GROUPWORD | ROM_SKIP(6) )
	8996	ROMX_LOAD( "pga.19m",   0x0000006, 0x400000, CRC(65ffb45b) SHA1(9c21187519c1ec95c5a960b2c815ee41ace4fa7e) , ROM_GROUPWORD | ROM_SKIP(6) )
	8997
	8998	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	8999	ROM_LOAD( "pga.01",   0x00000, 0x08000, CRC(bdbfa992) SHA1(7c5496c1daaea6a7ab95c0b25625d325ec3427cc) )
	9000	ROM_CONTINUE(         0x10000, 0x18000 )
	9001
	9002	ROM_REGION( 0x800000, "qsound", 0 ) /* QSound samples */
	9003	ROM_LOAD16_WORD_SWAP( "pga.11m",   0x000000, 0x400000, CRC(abdd224e) SHA1(3316708e050204eeee91c642a2546fab80984c60) )
	9004	ROM_LOAD16_WORD_SWAP( "pga.12m",   0x400000, 0x400000, CRC(dac53406) SHA1(53fd271495429a7cbdeecbbc62b322f019f854a5) )
	9005	ROM_END
	9006
8902	9007	ROM_START( ssf2ud )
8903	9008	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
8904	9009	ROM_LOAD16_WORD_SWAP( "ssfud.03a", 0x000000, 0x80000, CRC(fad5daf8) SHA1(5bed5d5af8dffc54d3b3371274a3905f46384f79) )
r8962	r8963
9108	9213	ROM_END
9109	9214
9110	9215
	9216	ROM_START( vhunt2d )
	9217	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	9218	ROM_LOAD16_WORD_SWAP( "vh2j_d.03a", 0x000000, 0x80000, CRC(696e0157) SHA1(a5c8c7e389f76952ce40ce5792eddb185dd76c41) )
	9219	ROM_LOAD16_WORD_SWAP( "vh2j_d.04a", 0x080000, 0x80000, CRC(ced9bba3) SHA1(ef7be9d39ae93ffde7d940736de9711a24585ef4) )
	9220	ROM_LOAD16_WORD_SWAP( "vh2j.05",    0x100000, 0x80000, CRC(de34f624) SHA1(60bbbd1765e76839b01c38765da2368c5188ec61) )
	9221	ROM_LOAD16_WORD_SWAP( "vh2j.06",    0x180000, 0x80000, CRC(6a3b9897) SHA1(4f3b37004db8a3d3dde709b51c94c392615134b5) )
	9222	ROM_LOAD16_WORD_SWAP( "vh2j_d.06",  0x200000, 0x80000, CRC(f320ea30) SHA1(c7853b83892a49917e7a0aa68bc66875a9263589) ) // fails rom test, bad? I don't see why this should change
	9223	ROM_LOAD16_WORD_SWAP( "vh2j.08",    0x280000, 0x80000, CRC(ac873dff) SHA1(ad9a085b8403801035683b6f63eee33daf4e97ae) )
	9224	ROM_LOAD16_WORD_SWAP( "vh2j.09",    0x300000, 0x80000, CRC(eaefce9c) SHA1(d842a824f0d0adc13a86f780084164c1273c45a4) )
	9225	ROM_LOAD16_WORD_SWAP( "vh2j.10",    0x380000, 0x80000, CRC(11730952) SHA1(2966b80b99ab065614a6ddb546110f482b998e32) )
9111	9226
	9227	ROM_REGION( 0x2000000, "gfx", 0 )
	9228	ROMX_LOAD( "vh2.13m",   0x0000000, 0x400000, CRC(3b02ddaa) SHA1(a73b0554afbfc7ace41bdf8e6cafd4c1ef0b0a08) , ROM_GROUPWORD | ROM_SKIP(6) )
	9229	ROMX_LOAD( "vh2.15m",   0x0000002, 0x400000, CRC(4e40de66) SHA1(e8b80eadffad6070aa04c8ab426311c44e7c5507) , ROM_GROUPWORD | ROM_SKIP(6) )
	9230	ROMX_LOAD( "vh2.17m",   0x0000004, 0x400000, CRC(b31d00c9) SHA1(7e7be64690663f52d10c8946aabec4250c8a8740) , ROM_GROUPWORD | ROM_SKIP(6) )
	9231	ROMX_LOAD( "vh2.19m",   0x0000006, 0x400000, CRC(149be3ab) SHA1(afc8e96e6aa3cf1db6dfd8075030a6c50b4419a9) , ROM_GROUPWORD | ROM_SKIP(6) )
	9232	ROMX_LOAD( "vh2.14m",   0x1000000, 0x400000, CRC(cd09bd63) SHA1(e582b20a948ae54f52590496051688dbfae2bc9c) , ROM_GROUPWORD | ROM_SKIP(6) )
	9233	ROMX_LOAD( "vh2.16m",   0x1000002, 0x400000, CRC(e0182c15) SHA1(a924d53ab39f4d85173bdb92a197dde2db0dc3f7) , ROM_GROUPWORD | ROM_SKIP(6) )
	9234	ROMX_LOAD( "vh2.18m",   0x1000004, 0x400000, CRC(778dc4f6) SHA1(8d0cd1c387b4b6ac7f92bb2e5a25983856328cdc) , ROM_GROUPWORD | ROM_SKIP(6) )
	9235	ROMX_LOAD( "vh2.20m",   0x1000006, 0x400000, CRC(605d9d1d) SHA1(99bc27557741527ca678d7b6307164bc04ebedc6) , ROM_GROUPWORD | ROM_SKIP(6) )
	9236
	9237	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	9238	ROM_LOAD( "vh2.01",  0x00000, 0x08000, CRC(67b9f779) SHA1(3994c65f888004b56ea9f478b1feaa81e306347e) )
	9239	ROM_CONTINUE(         0x10000, 0x18000 )
	9240	ROM_LOAD( "vh2.02",  0x28000, 0x20000, CRC(aaf15fcb) SHA1(6f61daa162c835165a8aabaf1d0ea8816fbfbd40) )
	9241
	9242	ROM_REGION( 0x800000, "qsound", 0 ) /* QSound samples */
	9243	ROM_LOAD16_WORD_SWAP( "vh2.11m",  0x000000, 0x400000, CRC(38922efd) SHA1(8cfb36bdce3a524d0a81fec12ca0cba82222fa30) )
	9244	ROM_LOAD16_WORD_SWAP( "vh2.12m",  0x400000, 0x400000, CRC(6e2430af) SHA1(b475faf943bec4171ba0130f287e1948743ca273) )
	9245	ROM_END
	9246
	9247
	9248	ROM_START( vsav2d ) // all modified roms fail rom check
	9249	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	9250	ROM_LOAD16_WORD_SWAP( "vs2j_d.03", 0x000000, 0x80000, CRC(5ee19aee) SHA1(da16d64c4de0b14a39c4a19a00c59f59579d0bd8) )
	9251	ROM_LOAD16_WORD_SWAP( "vs2j_d.04", 0x080000, 0x80000, CRC(80116c47) SHA1(e73c2d1fc006a74e3bb4c7a0e1b888b24b3f4c33) )
	9252	ROM_LOAD16_WORD_SWAP( "vs2j_d.05", 0x100000, 0x80000, CRC(dc74a062) SHA1(723e806f70a1cfcfcb37d59fae30bfd27a581f3a) )
	9253	ROM_LOAD16_WORD_SWAP( "vs2j.06",   0x180000, 0x80000, CRC(f37c5bc2) SHA1(d8c1040a6ee6b9fc677a6a32b99bf02b6a707812) )
	9254	ROM_LOAD16_WORD_SWAP( "vs2j.07",   0x200000, 0x80000, CRC(8f885809) SHA1(69dac07e1f483b6478f792d20a137d6a081fbea3) )
	9255	ROM_LOAD16_WORD_SWAP( "vs2j_d.08", 0x280000, 0x80000, CRC(97554918) SHA1(da6a8f6ba160696b141117c7c0da6f459637a729) ) // should this really be different?
	9256	ROM_LOAD16_WORD_SWAP( "vs2j.09",   0x300000, 0x80000, CRC(fac3c217) SHA1(0e9dd54e401e6d7c4fe81107ffd27e42ca810fcb) )
	9257	ROM_LOAD16_WORD_SWAP( "vs2j.10",   0x380000, 0x80000, CRC(eb490213) SHA1(bf0416df66a33c7a4678ab4a047de334dfd3b31e) )
	9258
	9259	ROM_REGION( 0x2000000, "gfx", 0 )
	9260	ROMX_LOAD( "vs2.13m",   0x0000000, 0x400000, CRC(5c852f52) SHA1(528ce7fc9a0451e2e2d221dbf5e4a5796584e053) , ROM_GROUPWORD | ROM_SKIP(6) )
	9261	ROMX_LOAD( "vs2.15m",   0x0000002, 0x400000, CRC(a20f58af) SHA1(e873ad3e0fc8a06a5029113faf991f5c1b765316) , ROM_GROUPWORD | ROM_SKIP(6) )
	9262	ROMX_LOAD( "vs2.17m",   0x0000004, 0x400000, CRC(39db59ad) SHA1(da94f1529da82a6bf2129f51548412e1ab2b001a) , ROM_GROUPWORD | ROM_SKIP(6) )
	9263	ROMX_LOAD( "vs2.19m",   0x0000006, 0x400000, CRC(00c763a7) SHA1(0ff528e12e255ebf699101ac71f05b1f6bef7165) , ROM_GROUPWORD | ROM_SKIP(6) )
	9264	ROMX_LOAD( "vs2.14m",   0x1000000, 0x400000, CRC(cd09bd63) SHA1(e582b20a948ae54f52590496051688dbfae2bc9c) , ROM_GROUPWORD | ROM_SKIP(6) )
	9265	ROMX_LOAD( "vs2.16m",   0x1000002, 0x400000, CRC(e0182c15) SHA1(a924d53ab39f4d85173bdb92a197dde2db0dc3f7) , ROM_GROUPWORD | ROM_SKIP(6) )
	9266	ROMX_LOAD( "vs2.18m",   0x1000004, 0x400000, CRC(778dc4f6) SHA1(8d0cd1c387b4b6ac7f92bb2e5a25983856328cdc) , ROM_GROUPWORD | ROM_SKIP(6) )
	9267	ROMX_LOAD( "vs2.20m",   0x1000006, 0x400000, CRC(605d9d1d) SHA1(99bc27557741527ca678d7b6307164bc04ebedc6) , ROM_GROUPWORD | ROM_SKIP(6) )
	9268
	9269	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	9270	ROM_LOAD( "vs2.01",   0x00000, 0x08000, CRC(35190139) SHA1(07f8e53ea398461de5dcda9814dde7c09faf9f65) )
	9271	ROM_CONTINUE(         0x10000, 0x18000 )
	9272	ROM_LOAD( "vs2.02",   0x28000, 0x20000, CRC(c32dba09) SHA1(1fe337ff334fab79847f9677ba0e168e93daa1c8) )
	9273
	9274	ROM_REGION( 0x800000, "qsound", 0 ) /* QSound samples */
	9275	ROM_LOAD16_WORD_SWAP( "vs2.11m",   0x000000, 0x400000, CRC(d67e47b7) SHA1(15a3f6779eccb10551ed94edf7e6e406a79b3de7) )
	9276	ROM_LOAD16_WORD_SWAP( "vs2.12m",   0x400000, 0x400000, CRC(6d020a14) SHA1(e98f862fac1e357c90949768bb2646263d9981a0) )
	9277	ROM_END
	9278
	9279
	9280	ROM_START( csclub1d )
	9281	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	9282	ROM_LOAD16_WORD_SWAP( "csce_d.03", 0x000000, 0x80000, CRC(5aedc6e6) SHA1(1330959ac96b0c267e81237974ec44ed7189495a) )
	9283	ROM_LOAD16_WORD_SWAP( "csce_d.04", 0x080000, 0x80000, CRC(a3d9aa25) SHA1(d7a98cf4506c30b321d8c5a0687fa6938740f951) )
	9284	ROM_LOAD16_WORD_SWAP( "csce_d.05", 0x100000, 0x80000, CRC(0915c9d1) SHA1(071c6bcfb0ed1047f06c2fbe43a0340aef73dc1d) )
	9285	ROM_LOAD16_WORD_SWAP( "csce_d.06", 0x180000, 0x80000, CRC(09c77d99) SHA1(16b21f975ad07dd3156291e8c274a0c52d783938) )
	9286	ROM_LOAD16_WORD_SWAP( "csc_d.07", 0x200000, 0x80000, CRC(77478e25) SHA1(d2648a8d57a156c5a0416007dedb4c65af8403d5) )
	9287
	9288	ROM_REGION( 0x1000000, "gfx", 0 )
	9289	ROM_FILL(              0x000000, 0x800000, 0 )
	9290	ROMX_LOAD( "csc.73",  0x800000, 0x080000, CRC(335f07c3) SHA1(44e0385120e2c81fd1072e19b7e3ff05d42be226) , ROM_GROUPWORD | ROM_SKIP(6) )
	9291	ROMX_LOAD( "csc.74",  0xa00000, 0x080000, CRC(ab215357) SHA1(c2600b5ba62a570f8a32de9c06f93ea8ae6cd854) , ROM_GROUPWORD | ROM_SKIP(6) )
	9292	ROMX_LOAD( "csc.75",  0xc00000, 0x080000, CRC(a2367381) SHA1(49d562be42c10cdf4e55e3b76c388f0b0121a967) , ROM_GROUPWORD | ROM_SKIP(6) )
	9293	ROMX_LOAD( "csc.76",  0xe00000, 0x080000, CRC(728aac1f) SHA1(2d04e8803f41af2372fc342fcd8a076c14338198) , ROM_GROUPWORD | ROM_SKIP(6) )
	9294	ROMX_LOAD( "csc.63",  0x800002, 0x080000, CRC(3711b8ca) SHA1(ff7ba4f73d227212377327f4fcbe8f555ac4b9c9) , ROM_GROUPWORD | ROM_SKIP(6) )
	9295	ROMX_LOAD( "csc.64",  0xa00002, 0x080000, CRC(828a06d8) SHA1(ce1d147f1d747fcd90d93f7dcca0cdd24c85a971) , ROM_GROUPWORD | ROM_SKIP(6) )
	9296	ROMX_LOAD( "csc.65",  0xc00002, 0x080000, CRC(86ee4569) SHA1(725d82a1669f6f78fb4ef8756ceac8b444dcbd43) , ROM_GROUPWORD | ROM_SKIP(6) )
	9297	ROMX_LOAD( "csc.66",  0xe00002, 0x080000, CRC(c24f577f) SHA1(d3b97091e1f0171e087feb9d497c94a48872cd21) , ROM_GROUPWORD | ROM_SKIP(6) )
	9298	ROMX_LOAD( "csc.83",  0x800004, 0x080000, CRC(0750d12a) SHA1(4c36cba88c58bdbfed923f56a6d489f42a4d0f6e) , ROM_GROUPWORD | ROM_SKIP(6) )
	9299	ROMX_LOAD( "csc.84",  0xa00004, 0x080000, CRC(90a92f39) SHA1(75bef2440147bac417b48d61ff64b71ed5b9eb67) , ROM_GROUPWORD | ROM_SKIP(6) )
	9300	ROMX_LOAD( "csc.85",  0xc00004, 0x080000, CRC(d08ab012) SHA1(7f2e71b6bd85c6a3efbd417977261c21f3d6cb7c) , ROM_GROUPWORD | ROM_SKIP(6) )
	9301	ROMX_LOAD( "csc.86",  0xe00004, 0x080000, CRC(41652583) SHA1(7132647dc9a29ce98866f489140703c5ed3d6051) , ROM_GROUPWORD | ROM_SKIP(6) )
	9302	ROMX_LOAD( "csc.93",  0x800006, 0x080000, CRC(a756c7f7) SHA1(d0f44f8ded12291d5c79282eac45d088cb365b09) , ROM_GROUPWORD | ROM_SKIP(6) )
	9303	ROMX_LOAD( "csc.94",  0xa00006, 0x080000, CRC(fb7ccc73) SHA1(763e6fe1baf73341747c74d89df9443561fca4fa) , ROM_GROUPWORD | ROM_SKIP(6) )
	9304	ROMX_LOAD( "csc.95",  0xc00006, 0x080000, CRC(4d014297) SHA1(df172a3723793b9955ff1f65e76fe5c20fc37b89) , ROM_GROUPWORD | ROM_SKIP(6) )
	9305	ROMX_LOAD( "csc.96",  0xe00006, 0x080000, CRC(6754b1ef) SHA1(ab5d62056b19999ccecd0eeec7b7c5869ca8fea8) , ROM_GROUPWORD | ROM_SKIP(6) )
	9306
	9307	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	9308	ROM_LOAD( "csc.01",   0x00000, 0x08000, CRC(ee162111) SHA1(ce8d4bd32bb10ee8b0274ba6fcef05a583b39d48) )
	9309	ROM_CONTINUE(         0x10000, 0x18000 )
	9310
	9311	ROM_REGION( 0x400000, "qsound", 0 ) /* QSound samples */
	9312	ROM_LOAD16_WORD_SWAP( "csc.51",   0x000000, 0x080000, CRC(5a52afd5) SHA1(ab873ec556933b75be82ba249357cceb01a7a0bd) )
	9313	ROM_LOAD16_WORD_SWAP( "csc.52",   0x080000, 0x080000, CRC(1408a811) SHA1(1d31e3cd505245b5ff4d3c55d5fa7017c0f1e168) )
	9314	ROM_LOAD16_WORD_SWAP( "csc.53",   0x100000, 0x080000, CRC(4fb9f57c) SHA1(093e8e3a03b62783a84fe4ae239e9eb46cbfd71e) )
	9315	ROM_LOAD16_WORD_SWAP( "csc.54",   0x180000, 0x080000, CRC(9a8f40ec) SHA1(c8db1ecfd6b08e9c83ae53a1d25c1387ab95535c) )
	9316	ROM_LOAD16_WORD_SWAP( "csc.55",   0x200000, 0x080000, CRC(91529a91) SHA1(183569100ae98e17688e0e25932850e73a41eb88) )
	9317	ROM_LOAD16_WORD_SWAP( "csc.56",   0x280000, 0x080000, CRC(9a345334) SHA1(330291400a73215c9797457507a86c90ba415247))
	9318	ROM_LOAD16_WORD_SWAP( "csc.57",   0x300000, 0x080000, CRC(aedc27f2) SHA1(55137f0f22c4823558e6a8ba76011695579a4f1f) )
	9319	ROM_LOAD16_WORD_SWAP( "csc.58",   0x380000, 0x080000, CRC(2300b7b3) SHA1(f5ecbb45c24f7de1c1aa435870695551d4e343ca) )
	9320	ROM_END
	9321
	9322
	9323	ROM_START( cybotsud )
	9324	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	9325	ROM_LOAD16_WORD_SWAP( "cybu_d.03", 0x000000, 0x80000, CRC(ee7560fb) SHA1(632e057a7b3a61127beee4ed833a39dcec4ccbd5) )
	9326	ROM_LOAD16_WORD_SWAP( "cybu_d.04", 0x080000, 0x80000, CRC(7e7425a0) SHA1(6368cf5b04271e68b27abecd67d107bbf58976b4) )
	9327	ROM_LOAD16_WORD_SWAP( "cyb.05",  0x100000, 0x80000, CRC(ec40408e) SHA1(dd611c1708e7ef86e4f7cac4b7b0dff7baaee5ed) )
	9328	ROM_LOAD16_WORD_SWAP( "cyb.06",  0x180000, 0x80000, CRC(1ad0bed2) SHA1(2ea005f3e73b05f8f0ec006cd9e95f7731a73897) )
	9329	ROM_LOAD16_WORD_SWAP( "cyb.07",  0x200000, 0x80000, CRC(6245a39a) SHA1(4f607e733e2dea80211497522be6d0f09571928d) )
	9330	ROM_LOAD16_WORD_SWAP( "cyb.08",  0x280000, 0x80000, CRC(4b48e223) SHA1(9714579a7a78b9716e44bca6c18bf1a93aa4e482) )
	9331	ROM_LOAD16_WORD_SWAP( "cyb.09",  0x300000, 0x80000, CRC(e15238f6) SHA1(16abd92ebed921a6a7e8eac4b098dc61f7e5485c) )
	9332	ROM_LOAD16_WORD_SWAP( "cyb.10",  0x380000, 0x80000, CRC(75f4003b) SHA1(8a65026ae35247cda016ce85a34034c62b3aa1a6) )
	9333
	9334	ROM_REGION( 0x2000000, "gfx", 0 )
	9335	ROMX_LOAD( "cyb.13m",   0x0000000, 0x400000, CRC(f0dce192) SHA1(b743938dc8e772dc3f63ed88a4a54c34fffdba21) , ROM_GROUPWORD | ROM_SKIP(6) )
	9336	ROMX_LOAD( "cyb.15m",   0x0000002, 0x400000, CRC(187aa39c) SHA1(80e3cf5c69f13343de667e1476bb716d45d3ff63) , ROM_GROUPWORD | ROM_SKIP(6) )
	9337	ROMX_LOAD( "cyb.17m",   0x0000004, 0x400000, CRC(8a0e4b12) SHA1(40132f3cc79b0a74460ebd4e0d4ddbe240efc06f) , ROM_GROUPWORD | ROM_SKIP(6) )
	9338	ROMX_LOAD( "cyb.19m",   0x0000006, 0x400000, CRC(34b62612) SHA1(154bbceb7d303a208abb1b2f3d507d5afacc71ed) , ROM_GROUPWORD | ROM_SKIP(6) )
	9339	ROMX_LOAD( "cyb.14m",   0x1000000, 0x400000, CRC(c1537957) SHA1(bfb1cc6786277b94ce28bfd464e2bbb6f6d3486e) , ROM_GROUPWORD | ROM_SKIP(6) )
	9340	ROMX_LOAD( "cyb.16m",   0x1000002, 0x400000, CRC(15349e86) SHA1(b0cde577d29a9f4e718b673c8645529ef0ababc9) , ROM_GROUPWORD | ROM_SKIP(6) )
	9341	ROMX_LOAD( "cyb.18m",   0x1000004, 0x400000, CRC(d83e977d) SHA1(e03f4a120c95a2f476ffc8492bca85e0c5cea068) , ROM_GROUPWORD | ROM_SKIP(6) )
	9342	ROMX_LOAD( "cyb.20m",   0x1000006, 0x400000, CRC(77cdad5c) SHA1(94d0cc5f05de4bc2d43977d91f887005dc10310c) , ROM_GROUPWORD | ROM_SKIP(6) )
	9343
	9344	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	9345	ROM_LOAD( "cyb.01",   0x00000, 0x08000, CRC(9c0fb079) SHA1(06d260875a76da08d56ea2b2ae277e8c2dbae6e3) )
	9346	ROM_CONTINUE(         0x10000, 0x18000 )
	9347	ROM_LOAD( "cyb.02",   0x28000, 0x20000, CRC(51cb0c4e) SHA1(c322957558d8d3e9dad090aebbe485978cbce8f5) )
	9348
	9349	ROM_REGION( 0x400000, "qsound", 0 ) /* QSound samples */
	9350	ROM_LOAD16_WORD_SWAP( "cyb.11m",   0x000000, 0x200000, CRC(362ccab2) SHA1(28e537067d4846f22657ee37166d18b8f05f4da1) )
	9351	ROM_LOAD16_WORD_SWAP( "cyb.12m",   0x200000, 0x200000, CRC(7066e9cc) SHA1(eb6a9d4998b3311344d73bae88d661d81609c492) )
	9352	ROM_END
	9353
	9354
	9355
	9356	ROM_START( mshvsfu1d )
	9357	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	9358	ROM_LOAD16_WORD_SWAP( "mvsu_d.03d", 0x000000, 0x80000, CRC(1c88bee3) SHA1(53ab6df85a900b221cabd62948e68d91cf6146e4) )
	9359	ROM_LOAD16_WORD_SWAP( "mvsu_d.04d", 0x080000, 0x80000, CRC(1e8b2535) SHA1(51ebede487f955e3f838b7906b619830e67fea52) )
	9360	ROM_LOAD16_WORD_SWAP( "mvs_d.05a",  0x100000, 0x80000, CRC(373856fb) SHA1(777bf7c74110c029c44a363ce79e50c1863950c2) )
	9361	ROM_LOAD16_WORD_SWAP( "mvs.06a",    0x180000, 0x80000, CRC(959f3030) SHA1(fbbaa915324815246738f3426232e623f039ce26) )
	9362	ROM_LOAD16_WORD_SWAP( "mvs.07b",    0x200000, 0x80000, CRC(7f915bdb) SHA1(683da09c5ba55e31b59aa95a8e13c45dc574ab3c) )
	9363	ROM_LOAD16_WORD_SWAP( "mvs.08a",    0x280000, 0x80000, CRC(c2813884) SHA1(49e5d4bc48f90c8146cb6aafb9240aff0119f1a7) )
	9364	ROM_LOAD16_WORD_SWAP( "mvs.09b",    0x300000, 0x80000, CRC(3ba08818) SHA1(9ab132a3cac55fcccebe6c99b6fb0ba1305f8f6e) )
	9365	ROM_LOAD16_WORD_SWAP( "mvs.10b",    0x380000, 0x80000, CRC(cf0dba98) SHA1(f4c1f8a6e7a79ecc6241d5268b3039f8a09ea516) )
	9366
	9367	ROM_REGION( 0x2000000, "gfx", 0 )
	9368	ROMX_LOAD( "mvs.13m",   0x0000000, 0x400000, CRC(29b05fd9) SHA1(e8fdb1ee5515a560eb4256ae4fd99bb1192e1a87) , ROM_GROUPWORD | ROM_SKIP(6) )
	9369	ROMX_LOAD( "mvs.15m",   0x0000002, 0x400000, CRC(faddccf1) SHA1(4ed03ea91883a0413325f57edcc1614120b5922c) , ROM_GROUPWORD | ROM_SKIP(6) )
	9370	ROMX_LOAD( "mvs.17m",   0x0000004, 0x400000, CRC(97aaf4c7) SHA1(6a054921cc14fe080cb3f62c391f8ae3cc7e8ba9) , ROM_GROUPWORD | ROM_SKIP(6) )
	9371	ROMX_LOAD( "mvs.19m",   0x0000006, 0x400000, CRC(cb70e915) SHA1(da4d2480d348ac6dfd01256a88f4f3db8357ae46) , ROM_GROUPWORD | ROM_SKIP(6) )
	9372	ROMX_LOAD( "mvs.14m",   0x1000000, 0x400000, CRC(b3b1972d) SHA1(0f2c3fb7de014181ee481ec35d0578b2c116c2dc) , ROM_GROUPWORD | ROM_SKIP(6) )
	9373	ROMX_LOAD( "mvs.16m",   0x1000002, 0x400000, CRC(08aadb5d) SHA1(3a2c222eca3e7df80ce69951b3db6442312751a4) , ROM_GROUPWORD | ROM_SKIP(6) )
	9374	ROMX_LOAD( "mvs.18m",   0x1000004, 0x400000, CRC(c1228b35) SHA1(7afdfb552888c79d0fbb30242b3d917b87fad57a) , ROM_GROUPWORD | ROM_SKIP(6) )
	9375	ROMX_LOAD( "mvs.20m",   0x1000006, 0x400000, CRC(366cc6c2) SHA1(6f2a789087c8e404c5227b927fa8328c03593243) , ROM_GROUPWORD | ROM_SKIP(6) )
	9376
	9377	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	9378	ROM_LOAD( "mvs.01",   0x00000, 0x08000, CRC(68252324) SHA1(138ef320ef27956b2ab5591d49a1315b7b0a194c) )
	9379	ROM_CONTINUE(         0x10000, 0x18000 )
	9380	ROM_LOAD( "mvs.02",   0x28000, 0x20000, CRC(b34e773d) SHA1(3bcf44bf06c35814cff29d244142db7abe05bd39) )
	9381
	9382	ROM_REGION( 0x800000, "qsound", 0 ) /* QSound samples */
	9383	ROM_LOAD16_WORD_SWAP( "mvs.11m",   0x000000, 0x400000, CRC(86219770) SHA1(4e5b68d382a5aa37f8b0b6434c53a2b95f5f9a4d) )
	9384	ROM_LOAD16_WORD_SWAP( "mvs.12m",   0x400000, 0x400000, CRC(f2fd7f68) SHA1(28a30d55d3eaf963006c7cbe7c288099cd3ba536) )
	9385	ROM_END
	9386
	9387
	9388	ROM_START( spf2td )
	9389	ROM_REGION(CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	9390	ROM_LOAD16_WORD_SWAP( "pzfu_d.03a", 0x000000, 0x80000, CRC(7836b903) SHA1(9a96a9080716a0cc4d13f51490fd850afe4479a7) )
	9391	ROM_LOAD16_WORD_SWAP( "pzf.04",    0x080000, 0x80000, CRC(b80649e2) SHA1(5bfccd656aea7ff82e9a20bb5856f4ab99b5a007) )
	9392
	9393	ROM_REGION16_BE( CODE_SIZE, "user1", 0 )
	9394	ROM_FILL( 0x000000, 0x100000, 0 )
	9395
	9396	ROM_REGION( 0xC00000, "gfx", 0 )
	9397	ROM_FILL(              0x000000, 0x800000, 0 )
	9398	ROMX_LOAD( "pzf.14m",  0x800000, 0x100000, CRC(2d4881cb) SHA1(fd3baa183c25bed153b19c251980e2fb761600e2) , ROM_GROUPWORD | ROM_SKIP(6) )
	9399	ROMX_LOAD( "pzf.16m",  0x800002, 0x100000, CRC(4b0fd1be) SHA1(377aafdcdb7a866b1c8487670e3598d8197976e4) , ROM_GROUPWORD | ROM_SKIP(6) )
	9400	ROMX_LOAD( "pzf.18m",  0x800004, 0x100000, CRC(e43aac33) SHA1(d041e0688c3807d3363861a7f216de43b34d846c) , ROM_GROUPWORD | ROM_SKIP(6) )
	9401	ROMX_LOAD( "pzf.20m",  0x800006, 0x100000, CRC(7f536ff1) SHA1(905b9d62ef7bef47297c7f4a4dd697aed6df38a5) , ROM_GROUPWORD | ROM_SKIP(6) )
	9402
	9403	ROM_REGION(QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	9404	ROM_LOAD( "pzf.01",   0x00000, 0x08000, CRC(600fb2a3) SHA1(1fab1c2a23bf6ad8309d29ddbbc29435a8aeea13) )
	9405	ROM_CONTINUE(         0x10000, 0x18000 )
	9406	ROM_LOAD( "pzf.02",   0x28000, 0x20000, CRC(496076e0) SHA1(1ee4e135140afd0e8e03231e570cd77d140f6367) )
	9407
	9408	ROM_REGION( 0x400000, "qsound", 0 ) /* QSound samples */
	9409	ROM_LOAD16_WORD_SWAP( "pzf.11m",   0x000000, 0x200000, CRC(78442743) SHA1(b61190bb586871de6d54af580e3e1d9cc0de0acb) )
	9410	ROM_LOAD16_WORD_SWAP( "pzf.12m",   0x200000, 0x200000, CRC(399d2c7b) SHA1(e849dea97b8d16540415c0d9bbc4f9f4eb755ec4) )
	9411	ROM_END
	9412
	9413
	9414	ROM_START( sfz3jr2d )
	9415	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	9416	ROM_LOAD16_WORD_SWAP( "sz3j_d.03", 0x000000, 0x80000, CRC(b0436151) SHA1(5170390d5d38bb003602d5714d557005bd7218be) )
	9417	ROM_LOAD16_WORD_SWAP( "sz3j_d.04", 0x080000, 0x80000, CRC(642d8170) SHA1(1a73f6090a384e7399e49e3a13fe02aa284d4775) )
	9418	ROM_LOAD16_WORD_SWAP( "sz3.05",  0x100000, 0x80000, CRC(9b21518a) SHA1(5a928307cb90a98a62e7598cb101fb66d62b85f9) )
	9419	ROM_LOAD16_WORD_SWAP( "sz3.06",  0x180000, 0x80000, CRC(e7a6c3a7) SHA1(63441eb19efcbf9149f4b723d3e9191fa972de2a) )
	9420	ROM_LOAD16_WORD_SWAP( "sz3.07",  0x200000, 0x80000, CRC(ec4c0cfd) SHA1(1a5148e77bf633c728a8179dacb59c776f981bc4) )
	9421	ROM_LOAD16_WORD_SWAP( "sz3.08",  0x280000, 0x80000, CRC(5c7e7240) SHA1(33bdcdd1889f8fa77916373ed33b0854410d0263) )
	9422	ROM_LOAD16_WORD_SWAP( "sz3.09",  0x300000, 0x80000, CRC(c5589553) SHA1(cda1fdc2ab2f390a2358defd9923a2796093926d) )
	9423	ROM_LOAD16_WORD_SWAP( "sz3.10",  0x380000, 0x80000, CRC(a9717252) SHA1(7ee94ace2a49e4e5d30474e49c0da04a488010fe) )
	9424
	9425	ROM_REGION( 0x2000000, "gfx", 0 )
	9426	ROMX_LOAD( "sz3.13m",   0x0000000, 0x400000, CRC(0f7a60d9) SHA1(c69e0ee22537312909dacc86d2e4be319d54e426) , ROM_GROUPWORD | ROM_SKIP(6) )
	9427	ROMX_LOAD( "sz3.15m",   0x0000002, 0x400000, CRC(8e933741) SHA1(f4ac4bfe830dc7df9fe4f680e4e0c053e7cbd8fe) , ROM_GROUPWORD | ROM_SKIP(6) )
	9428	ROMX_LOAD( "sz3.17m",   0x0000004, 0x400000, CRC(d6e98147) SHA1(37f331fbb1284db446faecade6f484f58c0e1b2a) , ROM_GROUPWORD | ROM_SKIP(6) )
	9429	ROMX_LOAD( "sz3.19m",   0x0000006, 0x400000, CRC(f31a728a) SHA1(f14136564648f006c1b74afda78349f260524b5f) , ROM_GROUPWORD | ROM_SKIP(6) )
	9430	ROMX_LOAD( "sz3.14m",   0x1000000, 0x400000, CRC(5ff98297) SHA1(9e0ce43380b776c7a03872bafd4856f6fa60bda7) , ROM_GROUPWORD | ROM_SKIP(6) )
	9431	ROMX_LOAD( "sz3.16m",   0x1000002, 0x400000, CRC(52b5bdee) SHA1(7918204dc457f7a146d8fb8cf7242dfed3109fd8) , ROM_GROUPWORD | ROM_SKIP(6) )
	9432	ROMX_LOAD( "sz3.18m",   0x1000004, 0x400000, CRC(40631ed5) SHA1(c18c56822b90a71ca5fbdf3440eb2671011f3d8f) , ROM_GROUPWORD | ROM_SKIP(6) )
	9433	ROMX_LOAD( "sz3.20m",   0x1000006, 0x400000, CRC(763409b4) SHA1(af60a5116c1ca9050366a35ea29128921867f3cc) , ROM_GROUPWORD | ROM_SKIP(6) )
	9434
	9435	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	9436	ROM_LOAD( "sz3.01",   0x00000, 0x08000, CRC(de810084) SHA1(fd0b969b732921ed8b40c16fbfa30ee09c7a7cbd) )
	9437	ROM_CONTINUE(         0x10000, 0x18000 )
	9438	ROM_LOAD( "sz3.02",   0x28000, 0x20000, CRC(72445dc4) SHA1(14fca7596ac45ba655016eef5b6120f9f9671c23) )
	9439
	9440	ROM_REGION( 0x800000, "qsound", 0 ) /* QSound samples */
	9441	ROM_LOAD16_WORD_SWAP( "sz3.11m",   0x000000, 0x400000, CRC(1c89eed1) SHA1(649a0b0a3eb72e2e69e9fb1ac51a58b70daa39f3) )
	9442	ROM_LOAD16_WORD_SWAP( "sz3.12m",   0x400000, 0x400000, CRC(f392b13a) SHA1(fa04ce0370144a49bd1d5acd873eef87b0dc9d15) )
	9443	ROM_END
	9444
	9445	ROM_START( sfz2jd )
	9446	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	9447	ROM_LOAD16_WORD_SWAP( "sz2j_d.03a", 0x000000, 0x80000, CRC(b7325df8) SHA1(cd6e242a5681017463102dcb9133d8dcb262f923) )
	9448	ROM_LOAD16_WORD_SWAP( "sz2j_d.04a", 0x080000, 0x80000, CRC(a1022a3e) SHA1(4806637ddf22169f12d31f959982cb2f11693066) )
	9449	ROM_LOAD16_WORD_SWAP( "sz2.05a",  0x100000, 0x80000, CRC(98e8e992) SHA1(41745b63e6b3888081d189b8315ed3b7526b3d20) )
	9450	ROM_LOAD16_WORD_SWAP( "sz2.06",   0x180000, 0x80000, CRC(5b1d49c0) SHA1(f0a0c894c9cbe2b18e7f59058665949ee0025732) )
	9451	ROM_LOAD16_WORD_SWAP( "sz2j.07a", 0x200000, 0x80000, CRC(d910b2a2) SHA1(aa201660caa9cef993c147a1077c9e7767b34a78) )
	9452	ROM_LOAD16_WORD_SWAP( "sz2.08",   0x280000, 0x80000, CRC(0fe8585d) SHA1(0cd5369a5aa90c98d8dc1ff3342cd4d990631cff) )
	9453
	9454	ROM_REGION( 0x1400000, "gfx", 0 )
	9455	ROMX_LOAD( "sz2.13m",   0x0000000, 0x400000, CRC(4d1f1f22) SHA1(659fb4305bcf0cbbbbec97ede6e68a8323b13308) , ROM_GROUPWORD | ROM_SKIP(6) )
	9456	ROMX_LOAD( "sz2.15m",   0x0000002, 0x400000, CRC(19cea680) SHA1(4cb88963a0fbcef191c8419b6379387c01b4c81e) , ROM_GROUPWORD | ROM_SKIP(6) )
	9457	ROMX_LOAD( "sz2.17m",   0x0000004, 0x400000, CRC(e01b4588) SHA1(c2936608fd75ff6cd5fa94c6d6d6f0c77c44a450) , ROM_GROUPWORD | ROM_SKIP(6) )
	9458	ROMX_LOAD( "sz2.19m",   0x0000006, 0x400000, CRC(0feeda64) SHA1(f5b350601437bd94b70d97feb23d791df19da6b3) , ROM_GROUPWORD | ROM_SKIP(6) )
	9459	ROMX_LOAD( "sz2.14m",   0x1000000, 0x100000, CRC(0560c6aa) SHA1(f2bed3a8efef18052b51a7f0f6a888a18db813a1) , ROM_GROUPWORD | ROM_SKIP(6) )
	9460	ROMX_LOAD( "sz2.16m",   0x1000002, 0x100000, CRC(ae940f87) SHA1(39ee26333abbe302ba76dced0196a2e6b3b1d02a) , ROM_GROUPWORD | ROM_SKIP(6) )
	9461	ROMX_LOAD( "sz2.18m",   0x1000004, 0x100000, CRC(4bc3c8bc) SHA1(6256963c515bf56f39b6e559afefd653ead56c54) , ROM_GROUPWORD | ROM_SKIP(6) )
	9462	ROMX_LOAD( "sz2.20m",   0x1000006, 0x100000, CRC(39e674c0) SHA1(8e771a2d8c2accad0463bccd21d7b23af0c895a1) , ROM_GROUPWORD | ROM_SKIP(6) )
	9463
	9464	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	9465	ROM_LOAD( "sz2.01a",   0x00000, 0x08000, CRC(1bc323cf) SHA1(83fbd6e9b327700dc9f1c59700b7385bc3705749) )
	9466	ROM_CONTINUE(         0x10000, 0x18000 )
	9467	ROM_LOAD( "sz2.02a",   0x28000, 0x20000, CRC(ba6a5013) SHA1(7814f3e56b69529b9860dd61c3b1e8d700244b03) )
	9468
	9469	ROM_REGION( 0x400000, "qsound", 0 ) /* QSound samples */
	9470	ROM_LOAD16_WORD_SWAP( "sz2.11m",   0x000000, 0x200000, CRC(aa47a601) SHA1(a4d1ee89c84a3b9db06469bb66e85293b5aa9ac9) )
	9471	ROM_LOAD16_WORD_SWAP( "sz2.12m",   0x200000, 0x200000, CRC(2237bc53) SHA1(96d5693047e4cf1ed10a8ee1905cea267a278e92) )
	9472	ROM_END
	9473
	9474
9112	9475	GAME( 1993, ssf2ud,   ssf2,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Super Street Fighter II: The New Challengers (USA 930911 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9113	9476	GAME( 1993, ddtodd,   ddtod,    dead_cps2, cps2_4p4b, cps2,    ROT0,   "bootleg", "Dungeons & Dragons: Tower of Doom (Euro 940412 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9477	GAME( 1993, ecofghtrd,ecofghtr, dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Eco Fighters (World 931203 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9114	9478	GAME( 1994, armwar1d, armwar,   dead_cps2, cps2_3p3b, cps2,    ROT0,   "bootleg", "Armored Warriors (Euro 941011 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9115	9479	GAME( 1994, avspd,    avsp,     dead_cps2, cps2_3p3b, cps2,    ROT0,   "bootleg", "Alien vs. Predator (Euro 940520 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9116	9480	GAME( 1994, dstlku1d, dstlk,    dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Darkstalkers: The Night Warriors (USA 940705 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
r8962	r8963
9121	9485	GAME( 1995, mshud,    msh,      dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Marvel Super Heroes (US 951024 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9122	9486	GAME( 1996, 19xxd,    19xx,     dead_cps2, cps2_2p2b, cps2,    ROT270, "bootleg", "19XX: The War Against Destiny (USA 951207 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9123	9487	GAME( 1996, sfz2ad,   sfa2,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Street Fighter Zero 2 (Asia 960227 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9488	GAME( 1996, sfz2jd,   sfa2,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Street Fighter Zero 2 (Japan 960227 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9489	GAME( 1996, spf2td,   spf2t,    dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "Super Puzzle Fighter II Turbo (USA 960620 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9124	9490	GAME( 1996, spf2xjd,  spf2t,    dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "Super Puzzle Fighter II X (Japan 960531 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9125	9491	GAME( 1996, ddsomud,  ddsom,    dead_cps2, cps2_4p4b, cps2,    ROT0,   "bootleg", "Dungeons & Dragons: Shadow over Mystara (USA 960619 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9126	9492	GAME( 1996, gigamn2,  megaman2, gigamn2,   cps2_2p3b, gigamn2, ROT0,   "bootleg", "Giga Man 2: The Power Fighters (bootleg of Mega Man 2: The Power Fighters)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // flash roms aren't dumped, layer offsets different, different sound system
r8962	r8963
9131	9497	GAME( 1997, vsavd,    vsav,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Vampire Savior: The Lord of Vampire (Euro 970519 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9132	9498	GAME( 1998, mvscud,   mvsc,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Marvel Vs. Capcom: Clash of Super Heroes (USA 980123 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9133	9499	GAME( 1998, sfa3ud,   sfa3,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Street Fighter Alpha 3 (USA 980904 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9134		GAME( 1999, gwingjd,  gigawing, dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "Giga Wing (Japan 990223 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9500	GAME( 1999, gigawingd, gigawing,dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "Giga Wing (USA 990222 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9501	GAME( 1999, gigawingjd,gigawing,dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "Giga Wing (Japan 990223 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9135	9502	GAME( 2000, 1944d,    1944,     dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "1944: The Loop Master (USA 000620 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9136		GAME( 2001, progerjd, progear,  dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Progear no Arashi (Japan 010117 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE ) // doesn't display phoenix edition screen, hacked bootleg?
	9503	GAME( 2001, progearud, progear, dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Progear (USA 010117 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9504	GAME( 2001, progearjd, progear, dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Progear no Arashi (Japan 010117 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9505	GAME( 2001, progearjbl,progear, dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Progear no Arashi (Japan 010117) (decrypted bootleg)", GAME_SUPPORTS_SAVE ) // not an actual phoenix set, but works as one
9137	9506	GAME( 2004, hsf2d,    hsf2,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Hyper Street Fighter II: The Anniversary Edition (Asia 040202 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9138	9507	GAME( 1993, ssf2tbd,  ssf2,     dead_cps2, cps2_2p6b, ssf2tb,  ROT0,   "bootleg", "Super Street Fighter II: The Tournament Battle (World 931119 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9139	9508	GAME( 1994, ssf2xjd,  ssf2t,    dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Super Street Fighter II X: Grand Master Challenge (Japan 940223 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9140	9509	GAME( 1997, sgemfd,   sgemf,    dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Super Gem Fighter Mini Mix (USA 970904 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9141	9510	GAME( 2000, mmatrixd, mmatrix,  dead_cps2, cps2_2p1b, cps2,    ROT0,   "bootleg", "Mars Matrix: Hyper Solid Shooting (Japan 000412 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
9142	9511	GAME( 2000, dimahoud, dimahoo,  dead_cps2, cps2_2p3b, cps2,    ROT270, "bootleg", "Dimahoo (USA 000121 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9512	GAME( 1997, vhunt2d,  vhunt2,   dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Vampire Hunter 2: Darkstalkers Revenge (Japan 970929 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9513	GAME( 1997, vsav2d,   vsav2,    dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Vampire Savior 2: The Lord of Vampire (Japan 970913 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9514	GAME( 1997, csclub1d, csclub,   dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Capcom Sports Club (Euro 970722 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9515	GAME( 1995, cybotsud, cybots,   dead_cps2, cybots,    cps2,    ROT0,   "bootleg", "Cyberbots: Fullmetal Madness (USA 950424 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9516	GAME( 1997, mshvsfu1d,mshvsf,   dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Marvel Super Heroes Vs. Street Fighter (USA 970625 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	9517	GAME( 1998, sfz3jr2d, sfa3,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Street Fighter Zero 3 (Japan 980629 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )

src/mame/drivers/namcos12.c

r8962	r8963
1238	1238
1239	1239	static MACHINE_RESET( namcos12 )
1240	1240	{
1241		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1241	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1242	1242	psx_machine_init(machine);
1243	1243	bankoffset_w(space,0,0,0xffffffff);
1244	1244	has_tektagt_dma = 0;

src/mame/drivers/playmark.c

r8962	r8963
186	186	static WRITE8_DEVICE_HANDLER( playmark_snd_control_w )
187	187	{
188	188	playmark_state *state = device->machine->driver_data<playmark_state>();
189		//  const address_space *space = cputag_get_address_space(device->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	189	//  address_space *space = cputag_get_address_space(device->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
190	190
191	191	/*  This port controls communications to and from the 68K, and the OKI
192	192	device.

src/mame/drivers/jangou.c

r8962	r8963
477	477
478	478	/*************************************
479	479	*
	480	*  Royal Card Memory Map
	481	*
	482	*************************************/
	483
	484	static ADDRESS_MAP_START( roylcrdn_cpu0_map, ADDRESS_SPACE_PROGRAM, 8 )
	485	AM_RANGE(0x0000, 0x2fff) AM_ROM
	486	AM_RANGE(0x7000, 0x77ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)   /* MK48Z02B-15 ZEROPOWER RAM */
	487	ADDRESS_MAP_END
	488
	489	static ADDRESS_MAP_START( roylcrdn_cpu0_io, ADDRESS_SPACE_IO, 8 )
	490	ADDRESS_MAP_GLOBAL_MASK(0xff)
	491	AM_RANGE(0x01,0x01) AM_DEVREAD("aysnd", ay8910_r)
	492	AM_RANGE(0x02,0x03) AM_DEVWRITE("aysnd", ay8910_data_address_w)
	493	AM_RANGE(0x10,0x10) AM_READ_PORT("DSW")         /* DSW + blitter busy flag */
	494	AM_RANGE(0x10,0x10) AM_WRITENOP               /* Writes continuosly 0's in attract mode, and 1's in game */
	495	AM_RANGE(0x11,0x11) AM_WRITE(mux_w)
	496	AM_RANGE(0x13,0x13) AM_READNOP               /* Often reads bit7 with unknown purposes */
	497	AM_RANGE(0x12,0x17) AM_WRITE(blitter_process_w)
	498	AM_RANGE(0x20,0x2f) AM_WRITE(blit_vregs_w)
	499	AM_RANGE(0x30,0x30) AM_WRITENOP               /* Seems to write 0x10 on each sound event */
	500	ADDRESS_MAP_END
	501
	502
	503	/*************************************
	504	*
480	505	*  Input Port Definitions
481	506	*
482	507	*************************************/
r8962	r8963
759	784	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) //blitter busy flag
760	785	INPUT_PORTS_END
761	786
	787	static INPUT_PORTS_START( roylcrdn )
	788	PORT_START("PL1_1")
	789	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_NAME("1P Bet1")            /* 1P Bet1 */
	790	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_NAME("1P Bet2")            /* 1P Bet2 */
	791	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("1P Bet3")            /* 1P Bet3 */
	792	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_NAME("1P Bet4")            /* 1P Bet4 */
	793	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B) PORT_NAME("1P Bet5")            /* 1P Bet5 */
	794	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_LCONTROL) PORT_NAME("1P Flip-Flop")   /* 1P Flip-Flop */
	795	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1) PORT_NAME("1P Start")            /* 1P Start */
	796	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	797
	798	PORT_START("PL1_2")
	799	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4) PORT_NAME("1P Take Score")         /* 1P Take Score */
	800	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3) PORT_NAME("1P Hi-Lo (W-Up)")      /* 1P W-Up */
	801	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A) PORT_NAME("1P Hi (Big)")         /* 1P Big */
	802	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("1P Lo (Small)")         /* 1P Small */
	803	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F) PORT_NAME("1P Stand")            /* 1P Stand */
	804	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("1P Hit")               /* 1P Hit */
	805	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
	806
	807	PORT_START("PL2_1")
	808	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("2P Bet1")         /* 2P Bet1 */
	809	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("2P Bet2")         /* 2P Bet2 */
	810	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("2P Bet3")         /* 2P Bet3 */
	811	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("2P Bet4")         /* 2P Bet4 */
	812	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("2P Bet5")         /* 2P Bet5 */
	813	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_RCONTROL) PORT_NAME("2P Flip-Flop")   /* 2P Flip-Flop */
	814	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_0_PAD) PORT_NAME("2P Start")         /* 2P Start */
	815	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	816
	817	PORT_START("PL2_2")
	818	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_LEFT)  PORT_NAME("2P Take Score")      /* 2P Take Score */
	819	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_RIGHT) PORT_NAME("2P Hi-Lo (W-Up)")   /* 2P W-Up */
	820	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_UP)    PORT_NAME("2P Hi (Big)")      /* 2P Big */
	821	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_DOWN)  PORT_NAME("2P Lo (Small)")      /* 2P Small */
	822	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("2P Stand")         /* 2P Stand */
	823	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("2P Hit")            /* 2P Hit */
	824	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
	825
	826	PORT_START("PL1_3")
	827	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
	828
	829	PORT_START("PL2_3")
	830	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
	831
	832	PORT_START("SYSTEM")
	833	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )                                                   /* Spare 2 */
	834	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )                              PORT_NAME("Note In")      /* Note In */
	835	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_TOGGLE  PORT_CODE(KEYCODE_9)   PORT_NAME("Memory Reset")   /* Memory Reset */
	836	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_TOGGLE  PORT_CODE(KEYCODE_0)   PORT_NAME("Analyzer")      /* Analyzer */
	837	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_TOGGLE  PORT_CODE(KEYCODE_F2) PORT_NAME("Test Mode")      /* Test Mode */
	838	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )                              PORT_NAME("Coin In")      /* Coin In */
	839	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT )                        PORT_NAME("Credit Clear")   /* Credit Clear */
	840	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )                                                   /* Spare 1 */
	841
	842	PORT_START("DSW")   /* Not a real DSW on PCB */
	843	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	844	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	845	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	846	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	847	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	848	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	849	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	850	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	851	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	852	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	853	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	854	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	855	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	856	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	857	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	858	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	859	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	860	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	861	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	862	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	863	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	864	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* blitter busy flag */
	865
	866	PORT_START("IN_NOMUX")
	867	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
	868	INPUT_PORTS_END
	869
	870
762	871	/*************************************
763	872	*
764	873	*  Sound HW Config
r8962	r8963
960	1069	MDRV_DEVICE_REMOVE("cvsd")
961	1070	MACHINE_DRIVER_END
962	1071
	1072	static MACHINE_DRIVER_START( roylcrdn )
	1073	/* basic machine hardware */
	1074	MDRV_IMPORT_FROM(jangou)
	1075
	1076	MDRV_CPU_MODIFY("cpu0")
	1077	MDRV_CPU_PROGRAM_MAP(roylcrdn_cpu0_map )
	1078	MDRV_CPU_IO_MAP(roylcrdn_cpu0_io )
	1079
	1080	MDRV_DEVICE_REMOVE("cpu1")
	1081
	1082	MDRV_NVRAM_HANDLER(generic_0fill)
	1083
	1084	MDRV_MACHINE_START(common)
	1085	MDRV_MACHINE_RESET(common)
	1086
	1087	/* sound hardware */
	1088	MDRV_SOUND_START(0)
	1089	MDRV_DEVICE_REMOVE("cvsd")
	1090	MACHINE_DRIVER_END
	1091
	1092
963	1093	/*************************************
964	1094	*
965	1095	*  ROM definition(s)
r8962	r8963
1174	1304	ROM_LOAD( "tbp18s30n.4f", 0x00, 0x20, CRC(dc54dc52) SHA1(db91a7ae05eb6b6e4b42f91dfe20ac0da6680b46) ) //verified on real hardware
1175	1305	ROM_END
1176	1306
	1307	/****************************************
	1308
	1309	Royal Card (amusement).
	1310	PCB silkscreened "FD-510"
	1311
	1312	1x Z80 @ 2.5 MHz. (measured)
	1313	1x AY-3-8910 @ 1.25 MHz. (measured)
	1314
	1315	1x MK48Z02B-15 ZEROPOWER RAM.
	1316
	1317	1x Xtal 20.000 MHz.
	1318
	1319	****************************************/
	1320
	1321	ROM_START( roylcrdn )
	1322	ROM_REGION( 0x10000, "cpu0", 0 )
	1323	ROM_LOAD( "prg.p1",      0x0000, 0x1000, CRC(9c3b1662) SHA1(b874f88521a21ba6cf9670ed4d81b5d275cf4d12) )
	1324	ROM_LOAD( "prg.p2",      0x1000, 0x1000, CRC(7e10259d) SHA1(d1279922a8c2475c3c73d9960b0a728c0ef851fb) )
	1325	ROM_LOAD( "prg.p3",      0x2000, 0x1000, CRC(06ef7073) SHA1(d3f990d710629b23daec76cd7ad6ccc7e066e710) )
	1326
	1327	ROM_REGION( 0x20000, "gfx", 0 )
	1328	ROM_LOAD( "chrgen.cr1",   0x0000, 0x1000, CRC(935d0e1c) SHA1(0d5b067f6931585c8138b211cf73e5f585af8101) )
	1329	ROM_LOAD( "chrgen.cr2",   0x1000, 0x1000, CRC(4429362e) SHA1(0bbb6dedf919e0453be2db6343827c5787d139f3) )
	1330	ROM_LOAD( "chrgen.cr3",   0x2000, 0x1000, CRC(dc059cc9) SHA1(3041e83b9a265adfe4e1da889ae6a18593de0894) )
	1331
	1332	ROM_REGION( 0x0020, "proms", 0 )
	1333	ROM_LOAD( "mb7051.3h",   0x0000, 0x0020, CRC(cb6f1aec) SHA1(84136393f9cf8bd836123a31483e9a746ca00cdc) )
	1334	ROM_END
	1335
	1336
1177	1337	ROM_START( luckygrl )
1178	1338	ROM_REGION( 0x10000, "cpu0", 0 ) //encrypted z80 cpu
1179	1339	ROM_LOAD( "5.9c", 0x00000, 0x01000, CRC(79b34eb2) SHA1(4b4916e09bfd6573fd2c7a7254fa4419164e0c4d) )
r8962	r8963
1263	1423	GAME( 1984,  cntrygrl,   0,        cntrygrl, cntrygrl,  0,        ROT0, "Royal Denshi",   "Country Girl (Japan set 1)",  GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
1264	1424	GAME( 1984,  cntrygrla,  cntrygrl, cntrygrl, cntrygrl,  0,        ROT0, "Nichibutsu",     "Country Girl (Japan set 2)",  GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
1265	1425	GAME( 1984,  fruitbun,   cntrygrl, cntrygrl, cntrygrl,  0,        ROT0, "Nichibutsu",     "Fruits & Bunny (World?)",  GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
	1426	GAME( 1985,  roylcrdn,   0,        roylcrdn, roylcrdn,  0,        ROT0, "Nichibutsu",     "Royal Card (Nichibutsu)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
	1427
1266	1428	/* The following might not run there... */
1267	1429	GAME( 1984?, luckygrl,   0,        cntrygrl, cntrygrl,  luckygrl, ROT0, "Wing Co., Ltd.", "Lucky Girl? (Wing)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1268	1430
r8962	r8963
1273	1435	Jangou Lady (BET version) (images on the flyer, it might not exists)
1274	1436	Hana Royal
1275	1437	Hana Puter
1276		Royal Card
1277	1438	*/

src/mame/drivers/namcos21.c

r8962	r8963
562	562	}
563	563
564	564	static UINT16
565		ReadWordFromSlaveInput( const address_space *space )
	565	ReadWordFromSlaveInput( address_space *space )
566	566	{
567	567	UINT16 data = 0;
568	568	if( mpDspState->slaveBytesAvailable>0 )

src/mame/drivers/itgamble.c

r8962	r8963
217	217	MACHINE_DRIVER_END
218	218
219	219
	220	#ifdef UNUSED_CODE
220	221	static MACHINE_DRIVER_START( ejollyx5 )
221	222
222	223	MDRV_IMPORT_FROM(itgamble)
r8962	r8963
227	228	MDRV_OKIM6295_REPLACE("oki", MNUMBER_SND_CLOCK/16, OKIM6295_PIN7_HIGH) /* clock frequency & pin 7 not verified */
228	229	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
229	230	MACHINE_DRIVER_END
	231	#endif
230	232
231	233
232	234	/*************************

src/mame/drivers/gameplan.c

r8962	r8963
194	194
195	195	static WRITE8_DEVICE_HANDLER( r6532_soundlatch_w )
196	196	{
197		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	197	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
198	198	soundlatch_w(space, 0, data);
199	199	}
200	200

src/mame/drivers/kinst.c

r8962	r8963
629	629	*
630	630	*************************************/
631	631
632		static const mips3_config config =
	632	static const mips3_config r4600_config =
633	633	{
634	634	16384,            /* code cache size */
635	635	16384            /* data cache size */
r8962	r8963
640	640
641	641	/* basic machine hardware */
642	642	MDRV_CPU_ADD("maincpu", R4600LE, MASTER_CLOCK*2)
643		MDRV_CPU_CONFIG(config)
	643	MDRV_CPU_CONFIG(r4600_config)
644	644	MDRV_CPU_PROGRAM_MAP(main_map)
645	645	MDRV_CPU_VBLANK_INT("screen", irq0_start)
646	646

src/mame/drivers/beathead.c

r8962	r8963
96	96
97	97	***************************************************************************/
98	98
	99	#define ADDRESS_MAP_MODERN
99	100
100	101	#include "emu.h"
101		#include "cpu/asap/asap.h"
102		#include "machine/atarigen.h"
103		#include "audio/atarijsa.h"
104	102	#include "includes/beathead.h"
105	103
106	104
r8962	r8963
115	113	*
116	114	*************************************/
117	115
118		static void update_interrupts(running_machine *machine);
119
120	116	static TIMER_DEVICE_CALLBACK( scanline_callback )
121	117	{
122	118	beathead_state *state = timer.machine->driver_data<beathead_state>();
r8962	r8963
135	131	scanline = 0;
136	132
137	133	/* set the scanline IRQ */
138		state->irq_state[2] = 1;
139		update_interrupts(timer.machine);
	134	state->m_irq_state[2] = 1;
	135	state->update_interrupts();
140	136
141	137	/* set the timer for the next one */
142		timer.adjust(double_to_attotime(attotime_to_double(timer.machine->primary_screen->time_until_pos(scanline)) - state->hblank_offset), scanline);
	138	timer.adjust(double_to_attotime(attotime_to_double(timer.machine->primary_screen->time_until_pos(scanline)) - state->m_hblank_offset), scanline);
143	139	}
144	140
145	141
146		static MACHINE_START( beathead )
	142	void beathead_state::machine_start()
147	143	{
148		atarigen_init(machine);
	144	atarigen_init(&m_machine);
149	145	}
150	146
151	147
152		static MACHINE_RESET( beathead )
	148	static void update_interrupts(running_machine *machine) { machine->driver_data<beathead_state>()->update_interrupts(); }
	149	void beathead_state::machine_reset()
153	150	{
154		beathead_state *state = machine->driver_data<beathead_state>();
155
156	151	/* reset the common subsystems */
157		atarigen_eeprom_reset(state);
158		atarigen_interrupt_reset(state, update_interrupts);
	152	atarigen_eeprom_reset(this);
	153	atarigen_interrupt_reset(this, ::update_interrupts);
159	154	atarijsa_reset();
160	155
161	156	/* the code is temporarily mapped at 0 at startup */
162	157	/* just copying the first 0x40 bytes is sufficient */
163		memcpy(state->ram_base, state->rom_base, 0x40);
	158	memcpy(m_ram_base, m_rom_base, 0x40);
164	159
165	160	/* compute the timing of the HBLANK interrupt and set the first timer */
166		state->hblank_offset = attotime_to_double(machine->primary_screen->scan_period()) * ((455. - 336. - 25.) / 455.);
167		timer_device *scanline_timer = machine->device<timer_device>("scan_timer");
168		scanline_timer->adjust(double_to_attotime(attotime_to_double(machine->primary_screen->time_until_pos(0)) - state->hblank_offset));
	161	m_hblank_offset = attotime_to_double(m_machine.primary_screen->scan_period()) * ((455. - 336. - 25.) / 455.);
	162	timer_device *scanline_timer = m_machine.device<timer_device>("scan_timer");
	163	scanline_timer->adjust(double_to_attotime(attotime_to_double(m_machine.primary_screen->time_until_pos(0)) - m_hblank_offset));
169	164
170	165	/* reset IRQs */
171		state->irq_line_state = CLEAR_LINE;
172		state->irq_state[0] = state->irq_state[1] = state->irq_state[2] = 0;
173		state->irq_enable[0] = state->irq_enable[1] = state->irq_enable[2] = 0;
	166	m_irq_line_state = CLEAR_LINE;
	167	m_irq_state[0] = m_irq_state[1] = m_irq_state[2] = 0;
	168	m_irq_enable[0] = m_irq_enable[1] = m_irq_enable[2] = 0;
174	169	}
175	170
176	171
r8962	r8963
181	176	*
182	177	*************************************/
183	178
184		static void update_interrupts(running_machine *machine)
	179	void beathead_state::update_interrupts()
185	180	{
186		beathead_state *state = machine->driver_data<beathead_state>();
187	181	int gen_int;
188	182
189	183	/* compute the combined interrupt signal */
190		gen_int  = state->irq_state[0] & state->irq_enable[0];
191		gen_int |= state->irq_state[1] & state->irq_enable[1];
192		gen_int |= state->irq_state[2] & state->irq_enable[2];
	184	gen_int  = m_irq_state[0] & m_irq_enable[0];
	185	gen_int |= m_irq_state[1] & m_irq_enable[1];
	186	gen_int |= m_irq_state[2] & m_irq_enable[2];
193	187	gen_int  = gen_int ? ASSERT_LINE : CLEAR_LINE;
194	188
195	189	/* if it's changed since the last time, call through */
196		if (state->irq_line_state != gen_int)
	190	if (m_irq_line_state != gen_int)
197	191	{
198		state->irq_line_state = gen_int;
199		//if (state->irq_line_state != CLEAR_LINE)
200		cputag_set_input_line(machine, "maincpu", ASAP_IRQ0, state->irq_line_state);
	192	m_irq_line_state = gen_int;
	193	//if (m_irq_line_state != CLEAR_LINE)
	194	cputag_set_input_line(&m_machine, "maincpu", ASAP_IRQ0, m_irq_line_state);
201	195	//else
202		//asap_set_irq_line(ASAP_IRQ0, state->irq_line_state);
	196	//asap_set_irq_line(ASAP_IRQ0, m_irq_line_state);
203	197	}
204	198	}
205	199
206	200
207		static WRITE32_HANDLER( interrupt_control_w )
	201	WRITE32_MEMBER( beathead_state::interrupt_control_w )
208	202	{
209		beathead_state *state = space->machine->driver_data<beathead_state>();
210	203	int irq = offset & 3;
211	204	int control = (offset >> 2) & 1;
212	205
213	206	/* offsets 1-3 seem to be the enable latches for the IRQs */
214	207	if (irq != 0)
215		state->irq_enable[irq - 1] = control;
	208	m_irq_enable[irq - 1] = control;
216	209
217	210	/* offset 0 seems to be the interrupt ack */
218	211	else
219		state->irq_state[0] = state->irq_state[1] = state->irq_state[2] = 0;
	212	m_irq_state[0] = m_irq_state[1] = m_irq_state[2] = 0;
220	213
221	214	/* update the current state */
222		update_interrupts(space->machine);
	215	update_interrupts();
223	216	}
224	217
225	218
226		static READ32_HANDLER( interrupt_control_r )
	219	READ32_MEMBER( beathead_state::interrupt_control_r )
227	220	{
228		beathead_state *state = space->machine->driver_data<beathead_state>();
229
230	221	/* return the enables as a bitfield */
231		return (state->irq_enable[0]) | (state->irq_enable[1] << 1) | (state->irq_enable[2] << 2);
	222	return (m_irq_enable[0]) | (m_irq_enable[1] << 1) | (m_irq_enable[2] << 2);
232	223	}
233	224
234	225
r8962	r8963
239	230	*
240	231	*************************************/
241	232
242		static WRITE32_HANDLER( eeprom_data_w )
	233	WRITE32_MEMBER( beathead_state::eeprom_data_w )
243	234	{
244		beathead_state *state = space->machine->driver_data<beathead_state>();
245
246		if (state->eeprom_enabled)
	235	if (m_eeprom_enabled)
247	236	{
248	237	mem_mask &= 0x000000ff;
249		COMBINE_DATA(space->machine->generic.nvram.u32 + offset);
250		state->eeprom_enabled = 0;
	238	COMBINE_DATA(m_machine.generic.nvram.u32 + offset);
	239	m_eeprom_enabled = 0;
251	240	}
252	241	}
253	242
254	243
255		static WRITE32_HANDLER( eeprom_enable_w )
	244	WRITE32_MEMBER( beathead_state::eeprom_enable_w )
256	245	{
257		beathead_state *state = space->machine->driver_data<beathead_state>();
258
259		state->eeprom_enabled = 1;
	246	m_eeprom_enabled = 1;
260	247	}
261	248
262	249
r8962	r8963
267	254	*
268	255	*************************************/
269	256
270		static READ32_HANDLER( input_2_r )
	257	READ32_MEMBER( beathead_state::input_2_r )
271	258	{
272		beathead_state *state = space->machine->driver_data<beathead_state>();
273		int result = input_port_read(space->machine, "IN2");
274		if (state->sound_to_cpu_ready) result ^= 0x10;
275		if (state->cpu_to_sound_ready) result ^= 0x20;
	259	int result = input_port_read(&m_machine, "IN2");
	260	if (sound_to_cpu_ready) result ^= 0x10;
	261	if (cpu_to_sound_ready) result ^= 0x20;
276	262	return result;
277	263	}
278	264
r8962	r8963
284	270	*
285	271	*************************************/
286	272
287		static READ32_HANDLER( sound_data_r )
	273	READ32_MEMBER( beathead_state::sound_data_r )
288	274	{
289		return atarigen_sound_r(space,offset,0xffff);
	275	return atarigen_sound_r(&space, offset, 0xffff);
290	276	}
291	277
292	278
293		static WRITE32_HANDLER( sound_data_w )
	279	WRITE32_MEMBER( beathead_state::sound_data_w )
294	280	{
295	281	if (ACCESSING_BITS_0_7)
296		atarigen_sound_w(space,offset, data, mem_mask);
	282	atarigen_sound_w(&space, offset, data, mem_mask);
297	283	}
298	284
299	285
300		static WRITE32_HANDLER( sound_reset_w )
	286	WRITE32_MEMBER( beathead_state::sound_reset_w )
301	287	{
302	288	logerror("Sound reset = %d\n", !offset);
303		cputag_set_input_line(space->machine, "jsa", INPUT_LINE_RESET, offset ? CLEAR_LINE : ASSERT_LINE);
	289	cputag_set_input_line(&m_machine, "jsa", INPUT_LINE_RESET, offset ? CLEAR_LINE : ASSERT_LINE);
304	290	}
305	291
306	292
r8962	r8963
311	297	*
312	298	*************************************/
313	299
314		static WRITE32_HANDLER( coin_count_w )
	300	WRITE32_MEMBER( beathead_state::coin_count_w )
315	301	{
316		coin_counter_w(space->machine, 0, !offset);
	302	coin_counter_w(&m_machine, 0, !offset);
317	303	}
318	304
319	305
r8962	r8963
324	310	*
325	311	*************************************/
326	312
327		static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
328		AM_RANGE(0x00000000, 0x0001ffff) AM_RAM AM_BASE_MEMBER(beathead_state, ram_base)
329		AM_RANGE(0x01800000, 0x01bfffff) AM_ROM AM_REGION("user1", 0) AM_BASE_MEMBER(beathead_state, rom_base)
	313	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32, beathead_state)
	314	AM_RANGE(0x00000000, 0x0001ffff) AM_RAM AM_BASE(m_ram_base)
	315	AM_RANGE(0x01800000, 0x01bfffff) AM_ROM AM_REGION("user1", 0) AM_BASE(m_rom_base)
330	316	AM_RANGE(0x40000000, 0x400007ff) AM_RAM_WRITE(eeprom_data_w) AM_BASE_SIZE_GENERIC(nvram)
331	317	AM_RANGE(0x41000000, 0x41000003) AM_READWRITE(sound_data_r, sound_data_w)
332	318	AM_RANGE(0x41000100, 0x41000103) AM_READ(interrupt_control_r)
r8962	r8963
337	323	AM_RANGE(0x41000220, 0x41000227) AM_WRITE(coin_count_w)
338	324	AM_RANGE(0x41000300, 0x41000303) AM_READ(input_2_r)
339	325	AM_RANGE(0x41000304, 0x41000307) AM_READ_PORT("IN3")
340		AM_RANGE(0x41000400, 0x41000403) AM_WRITEONLY AM_BASE_MEMBER(beathead_state, palette_select)
	326	AM_RANGE(0x41000400, 0x41000403) AM_WRITEONLY AM_BASE(m_palette_select)
341	327	AM_RANGE(0x41000500, 0x41000503) AM_WRITE(eeprom_enable_w)
342		AM_RANGE(0x41000600, 0x41000603) AM_WRITE(beathead_finescroll_w)
343		AM_RANGE(0x41000700, 0x41000703) AM_WRITE(watchdog_reset32_w)
344		AM_RANGE(0x42000000, 0x4201ffff) AM_RAM_WRITE(beathead_palette_w) AM_BASE_GENERIC(paletteram)
345		AM_RANGE(0x43000000, 0x43000007) AM_READWRITE(beathead_hsync_ram_r, beathead_hsync_ram_w)
	328	AM_RANGE(0x41000600, 0x41000603) AM_WRITE(finescroll_w)
	329	AM_RANGE(0x41000700, 0x41000703) AM_WRITE_LEGACY(watchdog_reset32_w)
	330	AM_RANGE(0x42000000, 0x4201ffff) AM_RAM_WRITE(palette_w) AM_BASE(m_paletteram)
	331	AM_RANGE(0x43000000, 0x43000007) AM_READWRITE(hsync_ram_r, hsync_ram_w)
346	332	AM_RANGE(0x8df80000, 0x8df80003) AM_READNOP   /* noisy x4 during scanline int */
347		AM_RANGE(0x8f380000, 0x8f3fffff) AM_WRITE(beathead_vram_latch_w)
348		AM_RANGE(0x8f900000, 0x8f97ffff) AM_WRITE(beathead_vram_transparent_w)
349		AM_RANGE(0x8f980000, 0x8f9fffff) AM_RAM AM_BASE_GENERIC(videoram)
350		AM_RANGE(0x8fb80000, 0x8fbfffff) AM_WRITE(beathead_vram_bulk_w)
351		AM_RANGE(0x8fff8000, 0x8fff8003) AM_WRITEONLY AM_BASE_MEMBER(beathead_state, vram_bulk_latch)
352		AM_RANGE(0x9e280000, 0x9e2fffff) AM_WRITE(beathead_vram_copy_w)
	333	AM_RANGE(0x8f380000, 0x8f3fffff) AM_WRITE(vram_latch_w)
	334	AM_RANGE(0x8f900000, 0x8f97ffff) AM_WRITE(vram_transparent_w)
	335	AM_RANGE(0x8f980000, 0x8f9fffff) AM_RAM AM_BASE(m_videoram)
	336	AM_RANGE(0x8fb80000, 0x8fbfffff) AM_WRITE(vram_bulk_w)
	337	AM_RANGE(0x8fff8000, 0x8fff8003) AM_WRITEONLY AM_BASE(m_vram_bulk_latch)
	338	AM_RANGE(0x9e280000, 0x9e2fffff) AM_WRITE(vram_copy_w)
353	339	ADDRESS_MAP_END
354	340
355	341
r8962	r8963
414	400	MDRV_CPU_ADD("maincpu", ASAP, ATARI_CLOCK_14MHz)
415	401	MDRV_CPU_PROGRAM_MAP(main_map)
416	402
417		MDRV_MACHINE_START(beathead)
418		MDRV_MACHINE_RESET(beathead)
419	403	MDRV_NVRAM_HANDLER(generic_1fill)
420	404
421	405	MDRV_TIMER_ADD("scan_timer", scanline_callback)
r8962	r8963
430	414	MDRV_SCREEN_VISIBLE_AREA(0*8, 42*8-1, 0*8, 30*8-1)
431	415	MDRV_PALETTE_LENGTH(32768)
432	416
433		MDRV_VIDEO_START(beathead)
434		MDRV_VIDEO_UPDATE(beathead)
435
436	417	/* sound hardware */
437	418	MDRV_IMPORT_FROM(jsa_iii_mono)
438	419	MACHINE_DRIVER_END
r8962	r8963
480	461	*/
481	462
482	463
483		static UINT32 *speedup_data;
484		static READ32_HANDLER( speedup_r )
	464	READ32_MEMBER( beathead_state::speedup_r )
485	465	{
486		int result = *speedup_data;
487		if ((cpu_get_previouspc(space->cpu) & 0xfffff) == 0x006f0 && result == cpu_get_reg(space->cpu, ASAP_R3))
488		cpu_spinuntil_int(space->cpu);
	466	int result = *m_speedup_data;
	467	if ((cpu_get_previouspc(space.cpu) & 0xfffff) == 0x006f0 && result == cpu_get_reg(space.cpu, ASAP_R3))
	468	cpu_spinuntil_int(space.cpu);
489	469	return result;
490	470	}
491	471
492	472
493		static UINT32 *movie_speedup_data;
494		static READ32_HANDLER( movie_speedup_r )
	473	READ32_MEMBER( beathead_state::movie_speedup_r )
495	474	{
496		int result = *movie_speedup_data;
497		if ((cpu_get_previouspc(space->cpu) & 0xfffff) == 0x00a88 && (cpu_get_reg(space->cpu, ASAP_R28) & 0xfffff) == 0x397c0 &&
498		movie_speedup_data[4] == cpu_get_reg(space->cpu, ASAP_R1))
	475	int result = *m_movie_speedup_data;
	476	if ((cpu_get_previouspc(space.cpu) & 0xfffff) == 0x00a88 && (cpu_get_reg(space.cpu, ASAP_R28) & 0xfffff) == 0x397c0 &&
	477	m_movie_speedup_data[4] == cpu_get_reg(space.cpu, ASAP_R1))
499	478	{
500		UINT32 temp = (INT16)result + movie_speedup_data[4] * 262;
501		if (temp - (UINT32)cpu_get_reg(space->cpu, ASAP_R15) < (UINT32)cpu_get_reg(space->cpu, ASAP_R23))
502		cpu_spinuntil_int(space->cpu);
	479	UINT32 temp = (INT16)result + m_movie_speedup_data[4] * 262;
	480	if (temp - (UINT32)cpu_get_reg(space.cpu, ASAP_R15) < (UINT32)cpu_get_reg(space.cpu, ASAP_R23))
	481	cpu_spinuntil_int(space.cpu);
503	482	}
504	483	return result;
505	484	}
r8962	r8963
514	493
515	494	static DRIVER_INIT( beathead )
516	495	{
	496	beathead_state *state = machine->driver_data<beathead_state>();
	497
517	498	/* initialize the common systems */
518	499	atarijsa_init(machine, "IN2", 0x0040);
519	500
520	501	/* prepare the speedups */
521		speedup_data = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000ae8, 0x00000aeb, 0, 0, speedup_r);
522		movie_speedup_data = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000804, 0x00000807, 0, 0, movie_speedup_r);
	502	state->m_speedup_data = state->m_maincpu.space(AS_PROGRAM)->install_handler(0x00000ae8, 0x00000aeb, 0, 0, read32_delegate_create(beathead_state, speedup_r, *state));
	503	state->m_movie_speedup_data = state->m_maincpu.space(AS_PROGRAM)->install_handler(0x00000804, 0x00000807, 0, 0, read32_delegate_create(beathead_state, movie_speedup_r, *state));
523	504	}
524	505
525	506

src/mame/drivers/qix.c

r8962	r8963
1262	1262
1263	1263	static DRIVER_INIT( kram3 )
1264	1264	{
1265		const address_space *mainspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1266		const address_space *videospace = cputag_get_address_space(machine, "videocpu", ADDRESS_SPACE_PROGRAM);
	1265	address_space *mainspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1266	address_space *videospace = cputag_get_address_space(machine, "videocpu", ADDRESS_SPACE_PROGRAM);
1267	1267	//const UINT8 *patch;
1268	1268	UINT8 *rom, *decrypted;
1269	1269	int i;
r8962	r8963
1287	1287	rom = memory_region(machine, "maincpu");
1288	1288	decrypted = auto_alloc_array(machine, UINT8, 0x6000);
1289	1289
1290		memory_set_decrypted_region(mainspace, 0xa000, 0xffff, decrypted);
	1290	mainspace->set_decrypted_region(0xa000, 0xffff, decrypted);
1291	1291
1292	1292	memcpy(decrypted,&rom[0xa000],0x6000);
1293	1293	for (i = 0xa000; i < 0x10000; ++i)
r8962	r8963
1300	1300	rom = memory_region(machine, "videocpu");
1301	1301	decrypted = auto_alloc_array(machine, UINT8, 0x6000);
1302	1302
1303		memory_set_decrypted_region(videospace, 0xa000, 0xffff, decrypted);
	1303	videospace->set_decrypted_region(0xa000, 0xffff, decrypted);
1304	1304
1305	1305	memcpy(decrypted,&rom[0xa000],0x6000);
1306	1306	for (i = 0xa000; i < 0x10000; ++i)

src/mame/drivers/pcxt.c

r8962	r8963
563	563	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
564	564	& 0xFF0000;
565	565
566		return memory_read_byte(space, page_offset + offset);
	566	return space->read_byte(page_offset + offset);
567	567	}
568	568
569	569
r8962	r8963
572	572	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
573	573	& 0xFF0000;
574	574
575		memory_write_byte(space, page_offset + offset, data);
	575	space->write_byte(page_offset + offset, data);
576	576	}
577	577
578	578	static READ8_HANDLER(dma_page_select_r)

src/mame/drivers/toaplan2.c

r8962	r8963
197	197	Battle Garegga
198	198	Mahou Daisakusen
199	199	Battle Bakraid
	200	(emulated in video/gp9001.c)
200	201
201	202	*********************************************************************
202	203
r8962	r8963
204	205
205	206	Teki Paki                      Working, but no sound. Missing sound MCU dump. Chip is protected. It's a QFP80 Hitachi HD647180.
206	207	Ghox                           Working, but no sound. Missing sound MCU dump. It's a QFP80 Hitachi HD647180.
207		Dogyuun                        Working, but no sound. MCU type is likely a NEC V25+. Chip is a PLCC94 stamped 'TS-002-MACH'.
	208	Dogyuun                        Working, no sound. MCU type is likely a NEC V25+. Chip is a PLCC94 stamped 'TS-002-MACH'.
208	209	Knuckle Bash                   Working, but sound FX only (missing music). MCU type is a NEC V25+. Chip is a PLCC94 stamped 'TS-004-DASH'.
209	210	Some PCBs use another version stamped 'NITRO' which is the same chip type.
210	211	Truxton 2                      Working.
r8962	r8963
216	217	Grind Stormer                  Working, but no sound. MCU type is a NEC V25+. Chip is a PLCC94 stamped 'TS-007-SPY'.
217	218	VFive                          Working, but no sound. MCU type is a NEC V25+. Chip is a PLCC94 stamped 'TS-007-SPY'.
218	219	Batsugun                       Working, but sound FX only (missing music) and wrong GFX priorities. MCU type is a NEC V25+. Chip is a PLCC94 stamped 'TS-007-SPY'.
219		Batsugun Sp'                  Working, but sound FX only (missing music) and wrong GFX priorities. MCU type is a NEC V25+. Chip is a PLCC94 stamped 'TS-007-SPY'.
	220	Batsugun Sp'                  Working, but sound FX only (missing music) and wrong GFX priorities. MCU type is a NEC V25+. Chip is a PLCC94 stamped 'TS-007-SPY'.
220	221	Snow Bros. 2                   Working.
221	222	Mahou Daisakusen               Working.
222	223	Shippu Mahou Daisakusen        Working.
r8962	r8963
261	262	#include "includes/toaplan2.h"
262	263	#include "rendlay.h"
263	264
264		/**************** Machine stuff ******************/
265		//#define USE_HD64x180          /* Define if CPU support is available */
266		//#define USE_ENCRYPTED_V25S    /* Define to enable V25 even on games where it is encrypted */
267
268		#define CPU_2_NONE      0x00
269		#define CPU_2_Z80      0x5a
270		#define CPU_2_HD647180   0xa5
271		#define CPU_2_V25      0xff
272
273		/************ Machine RAM related values ************/
274		static UINT8 *toaplan2_shared_ram;
275		static UINT8 *raizing_shared_ram;      /* Shared ram used in Shippumd and Mahoudai */
276		static UINT16 *toaplan2_shared_ram16;   /* Really 8bit RAM connected to Z180 */
277		#ifndef USE_ENCRYPTED_V25S
278		static UINT16 *V25_shared_ram;         /* Really 8bit RAM connected to Z180 */
279		#endif
280		static UINT16 *fixeight_sec_cpu_mem;
281
282		/********** Status related values **********/
283		int toaplan2_sub_cpu = 0;
284		static UINT16 mcu_data = 0;
285		static UINT16 video_status;
286		static INT8 old_p1_paddle_h;      /* For Ghox */
287		static INT8 old_p2_paddle_h;
288		static INT8 current_bank;         /* Z80 bank used in Battle Garegga and Batrider */
289		static int raizing_sndirq_line;      /* IRQ4 for batrider, IRQ2 for bbakraid */
290		static UINT16 raizing_Z80_busreq;
291		static int bbakraid_unlimited_ver;
292
293	265	static MACHINE_RESET(batsugun);
294	266	static READ16_HANDLER( batsugun_share_r );
295	267	static WRITE16_HANDLER( batsugun_share_w );
r8962	r8963
298	270	static WRITE16_HANDLER( batsugun_share2_w );
299	271	#endif
300	272
301
302
303
304
305	273	/***************************************************************************
306	274	Initialisation handlers
307	275	***************************************************************************/
308	276
309		static running_device *sub_cpu = NULL;
310
311	277	static void toaplan2_reset(running_device *device)
312	278	{
313		if (sub_cpu != NULL)
314		cpu_set_input_line(sub_cpu, INPUT_LINE_RESET, PULSE_LINE);
	279	toaplan2_state *state = device->machine->driver_data<toaplan2_state>();
	280
	281	if (state->sub_cpu != NULL)
	282	cpu_set_input_line(state->sub_cpu, INPUT_LINE_RESET, PULSE_LINE);
315	283	}
316	284
317
318	285	static MACHINE_RESET( toaplan2 )
319	286	{
320		mcu_data = 0x00;
	287	toaplan2_state *state = machine->driver_data<toaplan2_state>();
321	288
	289	state->mcu_data = 0x00;
	290
322	291	/*
323	292	All games execute a RESET instruction on init, presumably to reset the sound CPU.
324	293	This is important for games with common RAM; the RAM test will fail
r8962	r8963
329	298
330	299	static MACHINE_RESET( ghox )
331	300	{
	301	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	302
332	303	MACHINE_RESET_CALL(toaplan2);
333		old_p1_paddle_h = 0;
334		old_p2_paddle_h = 0;
	304	state->old_p1_paddle_h = 0;
	305	state->old_p2_paddle_h = 0;
335	306	}
336	307
337	308	static MACHINE_RESET( dogyuun )
338	309	{
	310	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	311
339	312	MACHINE_RESET_CALL(batsugun);
340		mcu_data = 0xffaa;
	313	state->mcu_data = 0xffaa;
341	314	}
342	315
343	316	static MACHINE_RESET( vfive )
344	317	{
	318	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	319
345	320	MACHINE_RESET_CALL(batsugun);
346		mcu_data = 0xffaa;
	321	state->mcu_data = 0xffaa;
347	322	}
348	323
349	324	static MACHINE_RESET( bgaregga )
350	325	{
	326	toaplan2_state *state = machine->driver_data<toaplan2_state>();
351	327	UINT8 *Z80 = (UINT8 *)memory_region(machine, "audiocpu");
352	328
353	329	// Set Z80 bank switch - default bank is 2
354		current_bank = 4;
	330	state->current_bank = 4;
355	331	memory_configure_bank(machine, "bank1", 0, 16, Z80, 0x4000);
356	332	memory_set_bank(machine, "bank1", 4);
357	333
r8962	r8963
360	336
361	337	static void register_state_save(running_machine *machine)
362	338	{
363		state_save_register_global(machine, mcu_data);
364		state_save_register_global(machine, video_status);
365		state_save_register_global(machine, old_p1_paddle_h);
366		state_save_register_global(machine, old_p2_paddle_h);
367		state_save_register_global(machine, current_bank);
368		state_save_register_global(machine, raizing_Z80_busreq);
	339	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	340
	341	state_save_register_global(machine, state->mcu_data);
	342	state_save_register_global(machine, state->video_status);
	343	state_save_register_global(machine, state->old_p1_paddle_h);
	344	state_save_register_global(machine, state->old_p2_paddle_h);
	345	state_save_register_global(machine, state->current_bank);
	346	state_save_register_global(machine, state->z80_busreq);
369	347	}
370	348
371	349	static DRIVER_INIT( T2_Z80 )      /* init_t2_Z80(); */
372	350	{
373		toaplan2_sub_cpu = CPU_2_Z80;
374		sub_cpu = machine->device("audiocpu");
	351	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	352
	353	state->sub_cpu_type = CPU_2_Z80;
	354	state->sub_cpu = machine->device("audiocpu");
375	355	register_state_save(machine);
376	356	}
377	357
378	358	static DRIVER_INIT( T2_Z180 )
379	359	{
380		toaplan2_sub_cpu = CPU_2_HD647180;
381		sub_cpu = machine->device("mcu");
	360	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	361
	362	state->sub_cpu_type = CPU_2_HD647180;
	363	state->sub_cpu = machine->device("mcu");
382	364	register_state_save(machine);
383	365	}
384	366
385	367	static DRIVER_INIT( T2_V25 )
386	368	{
387		toaplan2_sub_cpu = CPU_2_V25;
	369	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	370
	371	state->sub_cpu_type = CPU_2_V25;
388	372	if (machine->device("mcu") != NULL)
389		sub_cpu = machine->device("mcu");
	373	state->sub_cpu = machine->device("mcu");
390	374	else if (machine->device("audiocpu") != NULL)
391		sub_cpu = machine->device("audiocpu");
	375	state->sub_cpu = machine->device("audiocpu");
392	376	register_state_save(machine);
393	377	}
394	378
395	379	static DRIVER_INIT( T2_noZ80 )
396	380	{
397		toaplan2_sub_cpu = CPU_2_NONE;
	381	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	382
	383	state->sub_cpu_type = CPU_2_NONE;
	384	state->sub_cpu = NULL;
398	385	register_state_save(machine);
399	386	}
400	387
401	388	static DRIVER_INIT( fixeight )
402	389	{
403		sub_cpu = machine->device("audiocpu");
	390	toaplan2_state *state = machine->driver_data<toaplan2_state>();
404	391
405		if (fixeight_sec_cpu_mem)
406		{
407		memory_install_ram(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x28f002, 0x28fbff, 0, 0, fixeight_sec_cpu_mem );
408		}
	392	state->sub_cpu_type = CPU_2_V25;
	393	state->sub_cpu = machine->device("audiocpu");
409	394
410		toaplan2_sub_cpu = CPU_2_V25;
	395	memory_install_ram(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x28f002, 0x28fbff, 0, 0, NULL);
	396
411	397	register_state_save(machine);
412	398	}
413	399
414	400	static DRIVER_INIT( fixeighb )
415	401	{
	402	toaplan2_state *state = machine->driver_data<toaplan2_state>();
416	403	UINT16 *bgdata = (UINT16 *)memory_region(machine, "maincpu");
	404
417	405	memory_set_bankptr(machine, "bank1", &bgdata[0x40000]); /* $80000 - $fffff */
418
419		toaplan2_sub_cpu = CPU_2_NONE;
	406	state->sub_cpu_type = CPU_2_NONE;
	407	state->sub_cpu = NULL;
420	408	register_state_save(machine);
421	409	}
422	410
423	411	static DRIVER_INIT( pipibibi )
424	412	{
	413	toaplan2_state *state = machine->driver_data<toaplan2_state>();
425	414	int A;
426	415	int oldword, newword;
427
428	416	UINT16 *pipibibi_68k_rom = (UINT16 *)(memory_region(machine, "maincpu"));
429	417
430	418	/* unscramble the 68K ROM data. */
r8962	r8963
498	486	pipibibi_68k_rom[A+3] = newword;
499	487	}
500	488
501		toaplan2_sub_cpu = CPU_2_Z80;
502		sub_cpu = machine->device("audiocpu");
	489	state->sub_cpu_type = CPU_2_Z80;
	490	state->sub_cpu = machine->device("audiocpu");
503	491	register_state_save(machine);
504	492	}
505	493
506	494	static DRIVER_INIT( batrider )
507	495	{
508		raizing_sndirq_line = 4;
509		toaplan2_sub_cpu = CPU_2_Z80;
510		sub_cpu = machine->device("audiocpu");
	496	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	497
	498	state->sndirq_line = 4;
	499	state->sub_cpu_type = CPU_2_Z80;
	500	state->sub_cpu = machine->device("audiocpu");
511	501	register_state_save(machine);
512	502	}
513	503
514	504	static DRIVER_INIT( bbakraid )
515	505	{
516		bbakraid_unlimited_ver = 0;
517		raizing_sndirq_line = 2;
518		toaplan2_sub_cpu = CPU_2_Z80;
519		sub_cpu = machine->device("audiocpu");
	506	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	507
	508	state->unlimited_ver = 0;
	509	state->sndirq_line = 2;
	510	state->sub_cpu_type = CPU_2_Z80;
	511	state->sub_cpu = machine->device("audiocpu");
520	512	register_state_save(machine);
521	513	}
522	514
523	515	static DRIVER_INIT( bbakradu )
524	516	{
525		bbakraid_unlimited_ver = 1;
526		raizing_sndirq_line = 2;
527		toaplan2_sub_cpu = CPU_2_Z80;
528		sub_cpu = machine->device("audiocpu");
	517	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	518
	519	state->unlimited_ver = 1;
	520	state->sndirq_line = 2;
	521	state->sub_cpu_type = CPU_2_Z80;
	522	state->sub_cpu = machine->device("audiocpu");
529	523	register_state_save(machine);
530	524	}
531	525
r8962	r8963
560	554	/* +---------+---------+--------+---------------------------+ */
561	555	/*************** Control Signals are active low ***************/
562	556
	557	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
563	558	int hpos = space->machine->primary_screen->hpos();
564	559	int vpos = space->machine->primary_screen->vpos();
565		video_status = 0xff00;                  /* Set signals inactive */
566	560
	561	state->video_status = 0xff00;                  /* Set signals inactive */
	562
567	563	vpos = (vpos + 15) % 262;
568	564
569	565	if ((hpos > 325) && (hpos < 380))
570		video_status &= ~0x8000;
	566	state->video_status &= ~0x8000;
571	567	if ((vpos >= 247) && (vpos <= 250))
572		video_status &= ~0x4000;
	568	state->video_status &= ~0x4000;
573	569	if (vpos >= 245)
574		video_status &= ~0x0100;
	570	state->video_status &= ~0x0100;
575	571	if (vpos < 256)
576		video_status |= (vpos & 0xff);
	572	state->video_status |= (vpos & 0xff);
577	573	else
578		video_status |= 0xff;
	574	state->video_status |= 0xff;
579	575
580	576	//  logerror("VC: vpos=%04x hpos=%04x VBL=%04x\n",vpos,hpos,space->machine->primary_screen->vblank());
581	577
582		return video_status;
	578	return state->video_status;
583	579	}
584	580
585	581	static WRITE8_HANDLER( toaplan2_coin_w )
r8962	r8963
623	619
624	620	if (ACCESSING_BITS_0_7)
625	621	{
	622	#ifdef USE_ENCRYPTED_V25S
	623	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	624	#endif
	625
626	626	toaplan2_coin_w(space, offset, data & 0x0f);
627	627
628	628	#ifdef USE_ENCRYPTED_V25S
629	629	/* only the ram-based V25 based games access the following bits */
630		//cpu_set_input_line(sub_cpu, INPUT_LINE_RESET, (data & 0x0020) ? CLEAR_LINE : ASSERT_LINE );
631		cpu_set_input_line(sub_cpu, INPUT_LINE_HALT,  (data & 0x0010) ? CLEAR_LINE : ASSERT_LINE);
	630	//cpu_set_input_line(state->sub_cpu, INPUT_LINE_RESET, (data & 0x0020) ? CLEAR_LINE : ASSERT_LINE );
	631	cpu_set_input_line(state->sub_cpu, INPUT_LINE_HALT,  (data & 0x0010) ? CLEAR_LINE : ASSERT_LINE);
632	632	#endif
633	633
634	634	}
r8962	r8963
644	644
645	645	if (ACCESSING_BITS_0_7)
646	646	{
	647	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	648
647	649	toaplan2_coin_w(space, offset, data & 0x0f);
648	650	/* only the ram-based V25 based games access the following bits */
649		//cpu_set_input_line(sub_cpu, INPUT_LINE_RESET, (data & 0x0020) ? CLEAR_LINE : ASSERT_LINE );
650		cpu_set_input_line(sub_cpu, INPUT_LINE_HALT,  (data & 0x0010) ? CLEAR_LINE : ASSERT_LINE);
	651	//cpu_set_input_line(state->sub_cpu, INPUT_LINE_RESET, (data & 0x0020) ? CLEAR_LINE : ASSERT_LINE );
	652	cpu_set_input_line(state->sub_cpu, INPUT_LINE_HALT,  (data & 0x0010) ? CLEAR_LINE : ASSERT_LINE);
651	653	}
652	654	if (ACCESSING_BITS_8_15 && (data & 0xff00) )
653	655	{
r8962	r8963
668	670	}
669	671	}
670	672
671		static READ16_HANDLER( toaplan2_shared_r )
	673	static READ16_HANDLER( z80_shared_r )
672	674	{
673		return toaplan2_shared_ram[offset] & 0xff;
	675	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	676
	677	return state->z80_shared_ram[offset] & 0xff;
674	678	}
675	679
676		static WRITE16_HANDLER( toaplan2_shared_w )
	680	static WRITE16_HANDLER( z80_shared_w )
677	681	{
678	682	if (ACCESSING_BITS_0_7)
679	683	{
680		toaplan2_shared_ram[offset] = data & 0xff;
	684	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	685
	686	state->z80_shared_ram[offset] = data & 0xff;
681	687	}
682	688	}
683	689
r8962	r8963
688	694
689	695	if (ACCESSING_BITS_0_7)
690	696	{
691		if (toaplan2_sub_cpu == CPU_2_Z80)         /* Whoopee */
	697	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	698
	699	if (state->sub_cpu_type == CPU_2_Z80)         /* Whoopee */
692	700	{
693		toaplan2_shared_ram[0] = data & 0xff;
	701	state->z80_shared_ram[0] = data & 0xff;
694	702	}
695	703	else                              /* Teki Paki */
696	704	{
697		mcu_data = data & 0xff;
698		logerror("PC:%08x Writing command (%04x) to secondary CPU shared port\n",cpu_get_previouspc(space->cpu),mcu_data);
	705	state->mcu_data = data & 0xff;
	706	logerror("PC:%08x Writing command (%04x) to secondary CPU shared port\n", cpu_get_previouspc(space->cpu), state->mcu_data);
699	707	}
700	708	}
701	709	}
702	710
703	711	static CUSTOM_INPUT( c2map_r )
704	712	{
	713	toaplan2_state *state = field->port->machine->driver_data<toaplan2_state>();
	714
705	715	/* For Teki Paki hardware */
706	716	/* bit 4 high signifies secondary CPU is ready */
707	717	/* bit 5 is tested low before V-Blank bit ??? */
708		switch (toaplan2_sub_cpu)
	718	switch (state->sub_cpu_type)
709	719	{
710		case CPU_2_Z80:         mcu_data = toaplan2_shared_ram[0]; break; /* Whoopee */
711		case CPU_2_HD647180:   mcu_data = 0xff; break;                 /* Teki Paki */
712		default:            mcu_data = 0x00; break;
	720	case CPU_2_Z80:         state->mcu_data = state->z80_shared_ram[0]; break; /* Whoopee */
	721	case CPU_2_HD647180:   state->mcu_data = 0xff; break;                 /* Teki Paki */
	722	default:            state->mcu_data = 0x00; break;
713	723	}
714	724
715		return (mcu_data == 0xff) ? 0x01 : 0x00;
	725	return (state->mcu_data == 0xff) ? 0x01 : 0x00;
716	726	}
717	727
718		static READ16_HANDLER( pipibibi_z80_status_r )
719		{
720		return toaplan2_shared_ram[0] & 0xff;
721		}
722
723		static WRITE16_HANDLER( pipibibi_z80_task_w )
724		{
725		if (ACCESSING_BITS_0_7)
726		{
727		toaplan2_shared_ram[0] = data & 0xff;
728		}
729		}
730
731	728	static READ16_HANDLER( ghox_p1_h_analog_r )
732	729	{
	730	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
733	731	INT8 value, new_value;
734	732
735	733	new_value = input_port_read(space->machine, "PAD1");
736		if (new_value == old_p1_paddle_h) return 0;
737		value = new_value - old_p1_paddle_h;
738		old_p1_paddle_h = new_value;
	734	if (new_value == state->old_p1_paddle_h) return 0;
	735	value = new_value - state->old_p1_paddle_h;
	736	state->old_p1_paddle_h = new_value;
739	737	return value;
740	738	}
741	739
742	740	static READ16_HANDLER( ghox_p2_h_analog_r )
743	741	{
	742	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
744	743	INT8 value, new_value;
745	744
746	745	new_value = input_port_read(space->machine, "PAD2");
747		if (new_value == old_p2_paddle_h) return 0;
748		value = new_value - old_p2_paddle_h;
749		old_p2_paddle_h = new_value;
	746	if (new_value == state->old_p2_paddle_h) return 0;
	747	value = new_value - state->old_p2_paddle_h;
	748	state->old_p2_paddle_h = new_value;
750	749	return value;
751	750	}
752	751
r8962	r8963
759	758	{
760	759	if (ACCESSING_BITS_0_7)
761	760	{
762		mcu_data = data;
	761	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	762	UINT16 *toaplan2_shared_ram16 = state->shared_ram16;
	763
	764	state->mcu_data = data;
763	765	if ((data >= 0xd0) && (data < 0xe0))
764	766	{
765	767	offset = ((data & 0x0f) * 2) + (0x38 / 2);
r8962	r8963
768	770	}
769	771	else
770	772	{
771		logerror("PC:%08x Writing %08x to HD647180 cpu shared ram status port\n",cpu_get_previouspc(space->cpu),mcu_data);
	773	logerror("PC:%08x Writing %08x to HD647180 cpu shared ram status port\n", cpu_get_previouspc(space->cpu), state->mcu_data);
772	774	}
773	775	toaplan2_shared_ram16[0x56 / 2] = 0x004e;   /* Return a RTS instruction */
774	776	toaplan2_shared_ram16[0x58 / 2] = 0x0075;
r8962	r8963
811	813	Offset $48 and $46 are accessed from around PC:06776
812	814	*/
813	815
814		return toaplan2_shared_ram16[offset] & 0xff;
	816	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	817
	818	return state->shared_ram16[offset] & 0xff;
815	819	}
816	820
817	821	static WRITE16_HANDLER( ghox_shared_ram_w )
818	822	{
819	823	if (ACCESSING_BITS_0_7)
820	824	{
821		toaplan2_shared_ram16[offset] = data & 0xff;
	825	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	826
	827	state->shared_ram16[offset] = data & 0xff;
822	828	}
823	829	}
824	830
r8962	r8963
829	835	the 68000 and the V25+ CPU. The 68000 reads the status of the V25+
830	836	via a location of the shared memory.
831	837	*/
832		return toaplan2_shared_ram16[offset] & 0xff;
	838	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	839
	840	return state->shared_ram16[offset] & 0xff;
833	841	}
834	842
835	843	static WRITE16_HANDLER( shared_ram_w )
836	844	{
837	845	if (ACCESSING_BITS_0_7)
838	846	{
	847	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	848
839	849	data &= 0xff;
840	850	switch (offset * 2)
841	851	{
r8962	r8963
844	854	case 0x9f0:
845	855	case 0xcf0:
846	856	case 0xcf8:
847		case 0xff8: toaplan2_shared_ram16[offset + 1] = data; /* Dogyuun */
848		toaplan2_shared_ram16[offset + 2] = data; /* FixEight */
	857	case 0xff8: state->shared_ram16[offset + 1] = data; /* Dogyuun */
	858	state->shared_ram16[offset + 2] = data; /* FixEight */
849	859	logerror("PC:%08x Writing (%04x) to shared RAM at %04x\n",cpu_get_previouspc(space->cpu),data,(offset*2));
850	860	if (data == 0x81) data = 0x0001;
851	861	break;
852	862	default:   break;
853	863	}
854		toaplan2_shared_ram16[offset] = data;
	864	state->shared_ram16[offset] = data;
855	865	}
856	866	}
857	867
r8962	r8963
860	870	/*** Status port includes NEC V25+ CPU POST codes. ************
861	871	*** This is actually a part of the 68000/V25+ Shared RAM */
862	872
	873	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
863	874	int response = 0xffff;
864	875
865	876	/* Provide successful POST responses */
866		if (mcu_data == 0xffaa)                  /* Dogyuun */
	877	if (state->mcu_data == 0xffaa)                  /* Dogyuun */
867	878	{
868	879	response = 0xffaa;
869		mcu_data = 0xffff;
	880	state->mcu_data = 0xffff;
870	881	}
871	882
872	883	logerror("PC:%06x reading status %08x from the NEC V25+ secondary CPU port\n",cpu_get_previouspc(space->cpu),response);
r8962	r8963
875	886
876	887	static WRITE16_HANDLER( dogyuun_snd_cpu_w )
877	888	{
	889	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	890
878	891	if (ACCESSING_BITS_0_7)
879	892	{
880		mcu_data = data;
	893	state->mcu_data = data;
881	894	dogyuun_okisnd_w(space->machine->device("oki"), data);
882	895	}
883		logerror("PC:%06x Writing command (%04x) to the NEC V25+ secondary CPU port\n",cpu_get_previouspc(space->cpu),mcu_data);
	896	logerror("PC:%06x Writing command (%04x) to the NEC V25+ secondary CPU port\n", cpu_get_previouspc(space->cpu), state->mcu_data);
884	897	}
885	898
886	899
r8962	r8963
889	902	/*** Status port includes NEC V25+ CPU POST codes. ************
890	903	*** This is actually a part of the 68000/V25+ Shared RAM */
891	904
	905	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
892	906	int response = 0xffff;
893	907
894		if ((mcu_data & 0xffff) == 0x0faa)
	908	if ((state->mcu_data & 0xffff) == 0x0faa)
895	909	{
896		mcu_data = 0xffff;
	910	state->mcu_data = 0xffff;
897	911	response = 0xffaa;
898	912	}
899		if ((mcu_data & 0xffff) == 0xff00)
	913	if ((state->mcu_data & 0xffff) == 0xff00)
900	914	{
901		mcu_data = 0x0faa;
	915	state->mcu_data = 0x0faa;
902	916	response = 0xffaa;      /* Second CPU passed POST response */
903	917	}
904		if ((mcu_data & 0xff00) == 0x0000)
	918	if ((state->mcu_data & 0xff00) == 0x0000)
905	919	{
906		response = mcu_data;   /* Return the shared RAM data during POST */
	920	response = state->mcu_data;   /* Return the shared RAM data during POST */
907	921	}
908	922	logerror("PC:%06x reading status %08x from the NEC V25+ secondary CPU port\n",cpu_get_previouspc(space->cpu),response);
909	923	return response;
r8962	r8963
911	925
912	926	static WRITE16_HANDLER( fixeight_sec_cpu_w )
913	927	{
	928	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	929
914	930	if (ACCESSING_BITS_0_7)
915	931	{
916		if (mcu_data & 0xff00)
	932	if (state->mcu_data & 0xff00)
917	933	{
918		mcu_data = (mcu_data & 0xff00) | (data & 0xff);
	934	state->mcu_data = (state->mcu_data & 0xff00) | (data & 0xff);
919	935	fixeight_okisnd_w(space->machine->device("oki"), data);
920	936	}
921		else if (mcu_data == 0xff00)
	937	else if (state->mcu_data == 0xff00)
922	938	{
923	939	#if 0      /* check the 37B6 code */
924	940	/* copy nvram data to shared ram after post is complete */
r8962	r8963
930	946	/* game keeping service mode. It writes/reads the settings to/from */
931	947	/* these shared RAM locations. The secondary CPU reads/writes them */
932	948	/* from/to nvram to store the settings (a 93C45 EEPROM) */
933		//memory_install_ram(space, 0x28f002, 0x28fbff, 0, 0, fixeight_sec_cpu_mem);
	949	//memory_install_ram(space, 0x28f002, 0x28fbff, 0, 0, NULL);
934	950	memory_install_read_port(space, 0x28f004, 0x28f005, 0, 0, "DSWA");   /* Dip Switch A - Wrong !!! */
935	951	memory_install_read_port(space, 0x28f006, 0x28f007, 0, 0, "DSWB");   /* Dip Switch B - Wrong !!! */
936	952	memory_install_read_port(space, 0x28f008, 0x28f009, 0, 0, "JMPR");   /* Territory Jumper block - Wrong !!! */
937	953
938		mcu_data = data;
	954	state->mcu_data = data;
939	955	}
940	956	else
941	957	{
942		mcu_data = data;
	958	state->mcu_data = data;
943	959	}
944	960	}
945		logerror("PC:%06x Writing command (%04x) to the NEC V25+ secondary CPU port\n",cpu_get_previouspc(space->cpu),mcu_data);
	961	logerror("PC:%06x Writing command (%04x) to the NEC V25+ secondary CPU port\n", cpu_get_previouspc(space->cpu), state->mcu_data);
946	962	}
947	963
948	964	static WRITE16_HANDLER( vfive_snd_cpu_w )
949	965	{
	966	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	967
950	968	if (ACCESSING_BITS_0_7)
951	969	{
952		mcu_data = data;
	970	state->mcu_data = data;
953	971	}
954		logerror("PC:%06x Writing command (%04x) to the NEC V25+ secondary CPU port\n",cpu_get_previouspc(space->cpu),mcu_data);
	972	logerror("PC:%06x Writing command (%04x) to the NEC V25+ secondary CPU port\n", cpu_get_previouspc(space->cpu), state->mcu_data);
955	973	}
956	974
957	975	static WRITE16_HANDLER( batsugun_snd_cpu_w )
958	976	{
	977	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	978
959	979	if (ACCESSING_BITS_0_7)
960	980	{
961		mcu_data = data;
	981	state->mcu_data = data;
962	982	batsugun_okisnd_w(space->machine->device("oki"), data);
963	983	}
964		logerror("PC:%06x Writing command (%04x) to the NEC V25+ secondary CPU port %02x\n",cpu_get_previouspc(space->cpu),mcu_data,(offset*2));
	984	logerror("PC:%06x Writing command (%04x) to the NEC V25+ secondary CPU port %02x\n", cpu_get_previouspc(space->cpu), state->mcu_data, (offset*2));
965	985	}
966	986
967	987	static READ16_HANDLER( V25_sharedram_r )
968	988	{
969		return V25_shared_ram[offset] & 0xff;
	989	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	990
	991	return state->V25_shared_ram[offset] & 0xff;
970	992	}
971	993
972	994	static WRITE16_HANDLER( V25_sharedram_w )
973	995	{
974	996	if (ACCESSING_BITS_0_7)
975	997	{
976		V25_shared_ram[offset] = data & 0xff;
	998	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	999
	1000	state->V25_shared_ram[offset] = data & 0xff;
977	1001	}
978	1002	}
979	1003	#endif
r8962	r8963
1025	1049	***************************************************************************/
1026	1050
1027	1051
1028		static READ16_HANDLER( raizing_shared_ram_r )
	1052	static WRITE16_HANDLER( bgaregga_soundlatch_w )
1029	1053	{
1030		return raizing_shared_ram[offset] & 0xff;
1031		}
1032
1033
1034		static WRITE16_HANDLER( raizing_shared_ram_w )
1035		{
1036	1054	if (ACCESSING_BITS_0_7)
1037	1055	{
1038		raizing_shared_ram[offset] = data & 0xff;
1039		}
1040		}
	1056	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
1041	1057
1042
1043		static WRITE16_HANDLER( bgaregga_soundlatch_w )
1044		{
1045		if (ACCESSING_BITS_0_7)
1046		{
1047	1058	soundlatch_w(space, offset, data & 0xff);
1048		cpu_set_input_line(sub_cpu, 0, HOLD_LINE);
	1059	cpu_set_input_line(state->sub_cpu, 0, HOLD_LINE);
1049	1060	}
1050	1061	}
1051	1062
r8962	r8963
1069	1080
1070	1081	static WRITE8_HANDLER( bgaregga_bankswitch_w )
1071	1082	{
	1083	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
1072	1084	int bank = (data & 0x0f) - 10 + 4;
1073	1085
1074		if (bank != current_bank)
	1086	if (bank != state->current_bank)
1075	1087	{
1076		current_bank = bank;
	1088	state->current_bank = bank;
1077	1089	memory_set_bank(space->machine, "bank1", bank);
1078	1090	}
1079	1091	}
r8962	r8963
1119	1131
1120	1132	static WRITE8_HANDLER( batrider_bankswitch_w )
1121	1133	{
	1134	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
1122	1135	int bank = data & 0x0f;
	1136
1123	1137	bank = (bank > 1) ? bank + 2 : bank;
1124	1138
1125		if (bank != current_bank)
	1139	if (bank != state->current_bank)
1126	1140	{
1127		current_bank = bank;
	1141	state->current_bank = bank;
1128	1142	memory_set_bank(space->machine, "bank1", bank);
1129	1143	}
1130	1144	}
r8962	r8963
1138	1152	ROM code. Failure to return the correct status incurrs a Sound Error.
1139	1153	*/
1140	1154
1141		return raizing_Z80_busreq;         /* Loop BUSRQ to BUSAK */
	1155	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1156
	1157	return state->z80_busreq;         /* Loop BUSRQ to BUSAK */
1142	1158	}
1143	1159
1144	1160
r8962	r8963
1146	1162	{
1147	1163	if (ACCESSING_BITS_0_7)
1148	1164	{
1149		raizing_Z80_busreq = (data & 0xff);
	1165	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1166
	1167	state->z80_busreq = (data & 0xff);
1150	1168	}
1151	1169	}
1152	1170
r8962	r8963
1167	1185	{
1168	1186	if (ACCESSING_BITS_0_7)
1169	1187	{
	1188	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1189
1170	1190	soundlatch_w(space, offset, data & 0xff);
1171		cpu_set_input_line(sub_cpu, INPUT_LINE_NMI, ASSERT_LINE);
	1191	cpu_set_input_line(state->sub_cpu, INPUT_LINE_NMI, ASSERT_LINE);
1172	1192	}
1173	1193	}
1174	1194
r8962	r8963
1177	1197	{
1178	1198	if (ACCESSING_BITS_0_7)
1179	1199	{
	1200	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1201
1180	1202	soundlatch2_w(space, offset, data & 0xff);
1181		cpu_set_input_line(sub_cpu, INPUT_LINE_NMI, ASSERT_LINE);
	1203	cpu_set_input_line(state->sub_cpu, INPUT_LINE_NMI, ASSERT_LINE);
1182	1204	}
1183	1205	}
1184	1206
r8962	r8963
1192	1214
1193	1215	static WRITE16_HANDLER( raizing_clear_sndirq_w )
1194	1216	{
	1217	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1218
1195	1219	// not sure whether this is correct
1196	1220	// the 68K writes here during the sound IRQ handler, and nowhere else...
1197		cputag_set_input_line(space->machine, "maincpu", raizing_sndirq_line, CLEAR_LINE);
	1221	cputag_set_input_line(space->machine, "maincpu", state->sndirq_line, CLEAR_LINE);
1198	1222	}
1199	1223
1200	1224
1201	1225	static WRITE8_HANDLER( raizing_sndirq_w )
1202	1226	{
	1227	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1228
1203	1229	// if raizing_clear_sndirq_w() is correct, should this be ASSERT_LINE?
1204		cputag_set_input_line(space->machine, "maincpu", raizing_sndirq_line, HOLD_LINE);
	1230	cputag_set_input_line(space->machine, "maincpu", state->sndirq_line, HOLD_LINE);
1205	1231	}
1206	1232
1207	1233
1208	1234	static WRITE8_HANDLER( raizing_clear_nmi_w )
1209	1235	{
1210		cpu_set_input_line(sub_cpu, INPUT_LINE_NMI, CLEAR_LINE);
	1236	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1237
	1238	cpu_set_input_line(state->sub_cpu, INPUT_LINE_NMI, CLEAR_LINE);
1211	1239	}
1212	1240
1213	1241
r8962	r8963
1269	1297
1270	1298	static READ16_HANDLER( bbakraid_nvram_r )
1271	1299	{
	1300	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
1272	1301	eeprom_device *eeprom = space->machine->device<eeprom_device>("eeprom");
1273	1302
1274	1303	/* Bit 1 returns the status of BUSAK from the Z80.
r8962	r8963
1279	1308
1280	1309	int data;
1281	1310	data  = ((eeprom_read_bit(eeprom) & 0x01) << 4);
1282		data |= ((raizing_Z80_busreq >> 4) & 0x01);   /* Loop BUSRQ to BUSAK */
	1311	data |= ((state->z80_busreq >> 4) & 0x01);   /* Loop BUSRQ to BUSAK */
1283	1312
1284	1313	return data;
1285	1314	}
r8962	r8963
1287	1316
1288	1317	static WRITE16_HANDLER( bbakraid_nvram_w )
1289	1318	{
	1319	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1320
1290	1321	if (data & ~0x001f)
1291	1322	logerror("CPU #0 PC:%06X - Unknown EEPROM data being written %04X\n",cpu_get_pc(space->cpu),data);
1292	1323
1293	1324	if ( ACCESSING_BITS_0_7 )
1294	1325	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
1295	1326
1296		raizing_Z80_busreq = data & 0x10;   /* see bbakraid_nvram_r above */
	1327	state->z80_busreq = data & 0x10;   /* see bbakraid_nvram_r above */
1297	1328	}
1298	1329
1299	1330
r8962	r8963
1341	1372	AM_RANGE(0x180010, 0x180011) AM_READ_PORT("SYS")
1342	1373	AM_RANGE(0x18000c, 0x18000d) AM_READ_PORT("IN1")
1343	1374	AM_RANGE(0x18000e, 0x18000f) AM_READ_PORT("IN2")
1344		AM_RANGE(0x180500, 0x180fff) AM_READWRITE(ghox_shared_ram_r, ghox_shared_ram_w) AM_BASE(&toaplan2_shared_ram16)
	1375	AM_RANGE(0x180500, 0x180fff) AM_READWRITE(ghox_shared_ram_r, ghox_shared_ram_w) AM_BASE_MEMBER(toaplan2_state, shared_ram16)
1345	1376	AM_RANGE(0x181000, 0x181001) AM_WRITE(toaplan2_coin_word_w)
1346	1377	AM_RANGE(0x18100c, 0x18100d) AM_READ_PORT("JMPR")
1347	1378	ADDRESS_MAP_END
r8962	r8963
1355	1386	AM_RANGE(0x200018, 0x200019) AM_READ_PORT("SYS")
1356	1387	AM_RANGE(0x20001c, 0x20001d) AM_WRITE(toaplan2_v25_coin_word_w)
1357	1388	#ifdef USE_ENCRYPTED_V25S
1358		//  AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)   /* $21f000 status port */
1359		//  AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram)    /* 16-bit on 68000 side, 8-bit on V25+ side */
	1389	//AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE_MEMBER(toaplan2_state, shared_ram16)   /* $21f000 status port */
	1390	//AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE_MEMBER(toaplan2_state, V25_shared_ram)    /* 16-bit on 68000 side, 8-bit on V25+ side */
1360	1391	AM_RANGE(0x210000, 0x21efff) AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
1361	1392	AM_RANGE(0x21f000, 0x21ffff) AM_READWRITE( batsugun_share_r, batsugun_share_w )
1362	1393	#else
1363		AM_RANGE(0x21e000, 0x21efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)
	1394	AM_RANGE(0x21e000, 0x21efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE_MEMBER(toaplan2_state, shared_ram16)
1364	1395	AM_RANGE(0x21f000, 0x21f001) AM_READWRITE(toaplan2_snd_cpu_r, dogyuun_snd_cpu_w)   /* V25+ status/command port */
1365	1396	AM_RANGE(0x21f004, 0x21f005) AM_READ_PORT("DSWA")
1366	1397	AM_RANGE(0x21f006, 0x21f007) AM_READ_PORT("DSWB")
1367	1398	AM_RANGE(0x21f008, 0x21f009) AM_READ_PORT("JMPR")
1368		AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram)   /* 16-bit on 68000 side, 8-bit on V25+ side */
	1399	AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE_MEMBER(toaplan2_state, V25_shared_ram)   /* 16-bit on 68000 side, 8-bit on V25+ side */
1369	1400	#endif
1370	1401	/***** The following locations in 0x30000x are for video controller 1 ******/
1371	1402	AM_RANGE(0x300000, 0x30000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
r8962	r8963
1420	1451	AM_RANGE(0x100000, 0x10ffff) AM_RAM
1421	1452	AM_RANGE(0x200000, 0x20000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
1422	1453	AM_RANGE(0x300000, 0x300fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1423		AM_RANGE(0x400000, 0x401fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE(&toaplan2_txvideoram16) AM_SIZE(&toaplan2_tx_vram_size)
1424		AM_RANGE(0x402000, 0x4021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
	1454	AM_RANGE(0x400000, 0x401fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16, tx_vram_size)
	1455	AM_RANGE(0x402000, 0x4021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16_offs, tx_offs_vram_size)
1425	1456	AM_RANGE(0x402200, 0x402fff) AM_RAM
1426		AM_RANGE(0x403000, 0x4031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
	1457	AM_RANGE(0x403000, 0x4031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txscrollram16, tx_scroll_vram_size)
1427	1458	AM_RANGE(0x403200, 0x403fff) AM_RAM
1428		AM_RANGE(0x500000, 0x50ffff) AM_READWRITE(toaplan2_tx_gfxram16_r, toaplan2_tx_gfxram16_w) AM_BASE(&toaplan2_tx_gfxram16)
	1459	AM_RANGE(0x500000, 0x50ffff) AM_READWRITE(toaplan2_tx_gfxram16_r, toaplan2_tx_gfxram16_w) AM_BASE_MEMBER(toaplan2_state, tx_gfxram16)
1429	1460	AM_RANGE(0x600000, 0x600001) AM_READ(video_count_r)
1430	1461	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSWA")
1431	1462	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSWB")
r8962	r8963
1445	1476	AM_RANGE(0x0c0000, 0x0c0fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1446	1477	AM_RANGE(0x140000, 0x14000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
1447	1478
1448		AM_RANGE(0x190000, 0x190fff) AM_READWRITE(toaplan2_shared_r, toaplan2_shared_w)
	1479	AM_RANGE(0x190000, 0x190fff) AM_READWRITE(z80_shared_r, z80_shared_w)
1449	1480	AM_RANGE(0x19c01c, 0x19c01d) AM_WRITE(toaplan2_coin_word_w)      /* Coin count/lock */
1450	1481	AM_RANGE(0x19c020, 0x19c021) AM_READ_PORT("DSWA")
1451	1482	AM_RANGE(0x19c024, 0x19c025) AM_READ_PORT("DSWB")
r8962	r8963
1463	1494	AM_RANGE(0x083800, 0x087fff) AM_RAM            /* SpriteRAM (unused) */
1464	1495	AM_RANGE(0x0c0000, 0x0c0fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1465	1496	AM_RANGE(0x120000, 0x120fff) AM_RAM            /* Copy of SpriteRAM ? */
1466		//  AM_RANGE(0x13f000, 0x13f001) AM_WRITENOP        /* ??? */
1467		AM_RANGE(0x180000, 0x182fff) AM_DEVREADWRITE("gp9001vdp0", pipibibi_bootleg_videoram16_r, pipibibi_bootleg_videoram16_w )      /* TileRAM */
	1497	//AM_RANGE(0x13f000, 0x13f001) AM_WRITENOP        /* ??? */
	1498	AM_RANGE(0x180000, 0x182fff) AM_DEVREADWRITE("gp9001vdp0", pipibibi_bootleg_videoram16_r, pipibibi_bootleg_videoram16_w)      /* TileRAM */
1468	1499	AM_RANGE(0x188000, 0x18800f) AM_DEVWRITE("gp9001vdp0", pipibibi_bootleg_scroll_w)
1469		AM_RANGE(0x190002, 0x190003) AM_READ(pipibibi_z80_status_r)   /* Z80 ready ? */
1470		AM_RANGE(0x190010, 0x190011) AM_WRITE(pipibibi_z80_task_w)   /* Z80 task to perform */
	1500	AM_RANGE(0x190002, 0x190003) AM_READ(z80_shared_r)   /* Z80 ready ? */
	1501	AM_RANGE(0x190010, 0x190011) AM_WRITE(z80_shared_w)   /* Z80 task to perform */
1471	1502	AM_RANGE(0x19c01c, 0x19c01d) AM_WRITE(toaplan2_coin_word_w)   /* Coin count/lock */
1472	1503	AM_RANGE(0x19c020, 0x19c021) AM_READ_PORT("DSWA")
1473	1504	AM_RANGE(0x19c024, 0x19c025) AM_READ_PORT("DSWB")
r8962	r8963
1496	1527	AM_RANGE(0x200010, 0x200011) AM_READ_PORT("SYS")
1497	1528	AM_RANGE(0x20001c, 0x20001d) AM_WRITE(toaplan2_coin_word_w)   /* Coin count/lock */
1498	1529	#ifdef USE_ENCRYPTED_V25S
1499		//  AM_RANGE(0x28e000, 0x28fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)   /* $28f000 status port */
1500		//  AM_RANGE(0x28fc00, 0x28ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram)    /* 16-bit on 68000 side, 8-bit on V25+ side */
	1530	//AM_RANGE(0x28e000, 0x28fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE_MEMBER(toaplan2_state, shared_ram16)   /* $28f000 status port */
	1531	//AM_RANGE(0x28fc00, 0x28ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE_MEMBER(toaplan2_state, V25_shared_ram)    /* 16-bit on 68000 side, 8-bit on V25+ side */
1501	1532	AM_RANGE(0x280000, 0x28efff) AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
1502	1533	AM_RANGE(0x28f000, 0x28ffff) AM_READWRITE( batsugun_share_r, batsugun_share_w )
1503	1534	AM_RANGE(0x700000, 0x700001) AM_WRITE(fixeight_subcpu_ctrl) // guess!!!
1504	1535	#else
1505	1536	AM_RANGE(0x280000, 0x28dfff) AM_RAM                     /* part of shared ram ? */
1506		AM_RANGE(0x28e000, 0x28efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)
1507		AM_RANGE(0x28f000, 0x28f001) AM_READWRITE(fixeight_sec_cpu_r, fixeight_sec_cpu_w) AM_BASE(&fixeight_sec_cpu_mem)   /* V25+ Command/Status port */
1508		//  AM_RANGE(0x28f002, 0x28f003) AM_READONLY             /* part of shared ram */
1509		//  AM_RANGE(0x28f004, 0x28f005) AM_READ_PORT("DSWA") /* Dip Switch A - Wrong !!! */
1510		//  AM_RANGE(0x28f006, 0x28f007) AM_READ_PORT("DSWB") /* Dip Switch B - Wrong !!! */
1511		//  AM_RANGE(0x28f008, 0x28f009) AM_READ_PORT("JMPR") /* Territory Jumper block - Wrong !!! */
1512		//  AM_RANGE(0x28f00a, 0x28fbff) AM_READONLY             /* part of shared ram */
1513		AM_RANGE(0x28fc00, 0x28ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram)   /* 16-bit on 68000 side, 8-bit on V25+ side */
	1537	AM_RANGE(0x28e000, 0x28efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE_MEMBER(toaplan2_state, shared_ram16)
	1538	AM_RANGE(0x28f000, 0x28f001) AM_READWRITE(fixeight_sec_cpu_r, fixeight_sec_cpu_w)   /* V25+ Command/Status port */
	1539	//AM_RANGE(0x28f002, 0x28f003) AM_READONLY             /* part of shared ram */
	1540	//AM_RANGE(0x28f004, 0x28f005) AM_READ_PORT("DSWA") /* Dip Switch A - Wrong !!! */
	1541	//AM_RANGE(0x28f006, 0x28f007) AM_READ_PORT("DSWB") /* Dip Switch B - Wrong !!! */
	1542	//AM_RANGE(0x28f008, 0x28f009) AM_READ_PORT("JMPR") /* Territory Jumper block - Wrong !!! */
	1543	//AM_RANGE(0x28f00a, 0x28fbff) AM_READONLY             /* part of shared ram */
	1544	AM_RANGE(0x28fc00, 0x28ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE_MEMBER(toaplan2_state, V25_shared_ram)   /* 16-bit on 68000 side, 8-bit on V25+ side */
1514	1545	#endif
1515	1546	AM_RANGE(0x300000, 0x30000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
1516	1547	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1517		AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE(&toaplan2_txvideoram16) AM_SIZE(&toaplan2_tx_vram_size)
1518		AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
1519		AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
1520		AM_RANGE(0x600000, 0x60ffff) AM_READWRITE(toaplan2_tx_gfxram16_r, toaplan2_tx_gfxram16_w) AM_BASE(&toaplan2_tx_gfxram16)
	1548	AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16, tx_vram_size)
	1549	AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16_offs, tx_offs_vram_size)
	1550	AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txscrollram16, tx_scroll_vram_size)
	1551	AM_RANGE(0x600000, 0x60ffff) AM_READWRITE(toaplan2_tx_gfxram16_r, toaplan2_tx_gfxram16_w) AM_BASE_MEMBER(toaplan2_state, tx_gfxram16)
1521	1552	AM_RANGE(0x800000, 0x800001) AM_READ(video_count_r)
1522	1553	ADDRESS_MAP_END
1523	1554
r8962	r8963
1535	1566	AM_RANGE(0x20001c, 0x20001d) AM_READ_PORT("DSWA")
1536	1567	AM_RANGE(0x300000, 0x30000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
1537	1568	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1538		AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE(&toaplan2_txvideoram16) AM_SIZE(&toaplan2_tx_vram_size)
1539		AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
1540		AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
	1569	AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16, tx_vram_size)
	1570	AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16_offs, tx_offs_vram_size)
	1571	AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txscrollram16, tx_scroll_vram_size)
1541	1572	AM_RANGE(0x700000, 0x700001) AM_READ(video_count_r)
1542	1573	AM_RANGE(0x800000, 0x87ffff) AM_ROMBANK("bank1")
1543	1574	ADDRESS_MAP_END
r8962	r8963
1552	1583	AM_RANGE(0x200018, 0x200019) AM_READ_PORT("SYS")
1553	1584	AM_RANGE(0x20001c, 0x20001d) AM_WRITE(toaplan2_v25_coin_word_w)   /* Coin count/lock */
1554	1585	#ifdef USE_ENCRYPTED_V25S
1555		//  AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)   /* $21f000 status port */
1556		//  AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram)    /* 16-bit on 68000 side, 8-bit on V25+ side */
	1586	//AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE_MEMBER(toaplan2_state, shared_ram16)   /* $21f000 status port */
	1587	//AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE_MEMBER(toaplan2_state, V25_shared_ram)    /* 16-bit on 68000 side, 8-bit on V25+ side */
1557	1588	AM_RANGE(0x210000, 0x21efff) AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
1558	1589	AM_RANGE(0x21f000, 0x21ffff) AM_READWRITE( batsugun_share_r, batsugun_share_w )
1559	1590	#else
1560		AM_RANGE(0x21e000, 0x21efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)
	1591	AM_RANGE(0x21e000, 0x21efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE_MEMBER(toaplan2_state, shared_ram16)
1561	1592	AM_RANGE(0x21f000, 0x21f001) AM_READWRITE(toaplan2_snd_cpu_r, vfive_snd_cpu_w)   /* V25+ Command/Status port */
1562	1593	AM_RANGE(0x21f004, 0x21f005) AM_READ_PORT("DSWA")
1563	1594	AM_RANGE(0x21f006, 0x21f007) AM_READ_PORT("DSWB")
1564	1595	AM_RANGE(0x21f008, 0x21f009) AM_READ_PORT("JMPR")
1565		AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram)   /* 16-bit on 68000 side, 8-bit on V25+ side */
	1596	AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE_MEMBER(toaplan2_state, V25_shared_ram)   /* 16-bit on 68000 side, 8-bit on V25+ side */
1566	1597	#endif
1567	1598	AM_RANGE(0x300000, 0x30000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
1568	1599	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
r8962	r8963
1570	1601	ADDRESS_MAP_END
1571	1602
1572	1603
1573		static UINT8* batsugun_share;
1574		#ifdef USE_ENCRYPTED_V25S
1575		static UINT8* batsugun_share2;
1576		#endif
1577
1578	1604	static READ16_HANDLER( batsugun_share_r )
1579	1605	{
1580		return batsugun_share[offset] | batsugun_share[offset]<<8;
	1606	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
1581	1607
	1608	return state->batsugun_share[offset] | state->batsugun_share[offset]<<8;
1582	1609	}
1583	1610
1584	1611	static WRITE16_HANDLER( batsugun_share_w )
1585	1612	{
1586		/*
1587		if (ACCESSING_BITS_8_15)
1588		{
1589		batsugun_share[offset] = data >> 8;
1590		}
1591		*/
	1613	#if 0
	1614	if (ACCESSING_BITS_8_15)
	1615	{
	1616	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1617
	1618	state->batsugun_share[offset] = data >> 8;
	1619	}
	1620	#endif
	1621
1592	1622	if (ACCESSING_BITS_0_7)
1593	1623	{
1594		batsugun_share[offset] = data;
	1624	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1625
	1626	state->batsugun_share[offset] = data;
1595	1627	}
1596	1628	}
1597	1629
r8962	r8963
1599	1631	/* To be removed... */
1600	1632	static READ16_HANDLER( batsugun_share2_r )
1601	1633	{
	1634	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1635
1602	1636	return batsugun_share2[offset] | batsugun_share2[offset]<<8;
1603	1637	}
1604	1638
1605	1639	static WRITE16_HANDLER( batsugun_share2_w )
1606	1640	{
1607		/*
1608		if (ACCESSING_BITS_8_15)
1609		{
1610		batsugun_share2[offset] = data >> 8;
1611		}
1612		*/
	1641	#if 0
	1642	if (ACCESSING_BITS_8_15)
	1643	{
	1644	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
1613	1645
	1646	state->batsugun_share2[offset] = data >> 8;
	1647	}
	1648	#endif
	1649
1614	1650	if (ACCESSING_BITS_0_7)
1615	1651	{
1616		batsugun_share2[offset] = data;
	1652	toaplan2_state *state = space->machine->driver_data<toaplan2_state>();
	1653
	1654	state->batsugun_share2[offset] = data;
1617	1655	}
1618	1656	}
1619	1657	#endif
r8962	r8963
1668	1706	static ADDRESS_MAP_START( mahoudai_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
1669	1707	AM_RANGE(0x000000, 0x07ffff) AM_ROM
1670	1708	AM_RANGE(0x100000, 0x10ffff) AM_RAM
1671		AM_RANGE(0x218000, 0x21bfff) AM_READWRITE(raizing_shared_ram_r, raizing_shared_ram_w)
	1709	AM_RANGE(0x218000, 0x21bfff) AM_READWRITE(z80_shared_r, z80_shared_w)
1672	1710	AM_RANGE(0x21c01c, 0x21c01d) AM_WRITE(toaplan2_coin_word_w)
1673	1711	AM_RANGE(0x21c020, 0x21c021) AM_READ_PORT("IN1")
1674	1712	AM_RANGE(0x21c024, 0x21c025) AM_READ_PORT("IN2")
r8962	r8963
1680	1718	AM_RANGE(0x300000, 0x30000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
1681	1719	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1682	1720	AM_RANGE(0x401000, 0x4017ff) AM_RAM                     /* Unused PaletteRAM */
1683		AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE(&toaplan2_txvideoram16) AM_SIZE(&toaplan2_tx_vram_size)
1684		AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
	1721	AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16, tx_vram_size)
	1722	AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16_offs, tx_offs_vram_size)
1685	1723	AM_RANGE(0x502200, 0x502fff) AM_RAM
1686		AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
	1724	AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txscrollram16, tx_scroll_vram_size)
1687	1725	AM_RANGE(0x503200, 0x503fff) AM_RAM
1688	1726	ADDRESS_MAP_END
1689	1727
r8962	r8963
1691	1729	static ADDRESS_MAP_START( shippumd_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
1692	1730	AM_RANGE(0x000000, 0x0fffff) AM_ROM
1693	1731	AM_RANGE(0x100000, 0x10ffff) AM_RAM
1694		AM_RANGE(0x218000, 0x21bfff) AM_READWRITE(raizing_shared_ram_r, raizing_shared_ram_w)
	1732	AM_RANGE(0x218000, 0x21bfff) AM_READWRITE(z80_shared_r, z80_shared_w)
1695	1733	//  AM_RANGE(0x21c008, 0x21c009) AM_WRITENOP                    /* ??? */
1696	1734	AM_RANGE(0x21c01c, 0x21c01d) AM_WRITE(shippumd_coin_word_w)
1697	1735	AM_RANGE(0x21c020, 0x21c021) AM_READ_PORT("IN1")
r8962	r8963
1704	1742	AM_RANGE(0x300000, 0x30000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
1705	1743	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1706	1744	AM_RANGE(0x401000, 0x4017ff) AM_RAM                     /* Unused PaletteRAM */
1707		AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE(&toaplan2_txvideoram16) AM_SIZE(&toaplan2_tx_vram_size)
1708		AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
	1745	AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16, tx_vram_size)
	1746	AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16_offs, tx_offs_vram_size)
1709	1747	AM_RANGE(0x502200, 0x502fff) AM_RAM
1710		AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
	1748	AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txscrollram16, tx_scroll_vram_size)
1711	1749	AM_RANGE(0x503200, 0x503fff) AM_RAM
1712	1750	ADDRESS_MAP_END
1713	1751
r8962	r8963
1715	1753	static ADDRESS_MAP_START( bgaregga_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
1716	1754	AM_RANGE(0x000000, 0x0fffff) AM_ROM
1717	1755	AM_RANGE(0x100000, 0x10ffff) AM_RAM
1718		AM_RANGE(0x218000, 0x21bfff) AM_READWRITE(raizing_shared_ram_r, raizing_shared_ram_w)
	1756	AM_RANGE(0x218000, 0x21bfff) AM_READWRITE(z80_shared_r, z80_shared_w)
1719	1757	AM_RANGE(0x21c01c, 0x21c01d) AM_WRITE(toaplan2_coin_word_w)
1720	1758	AM_RANGE(0x21c020, 0x21c021) AM_READ_PORT("IN1")
1721	1759	AM_RANGE(0x21c024, 0x21c025) AM_READ_PORT("IN2")
r8962	r8963
1726	1764	AM_RANGE(0x21c03c, 0x21c03d) AM_READ(video_count_r)
1727	1765	AM_RANGE(0x300000, 0x30000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_r, gp9001_vdp_w)
1728	1766	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1729		AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE(&toaplan2_txvideoram16) AM_SIZE(&toaplan2_tx_vram_size)
1730		AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
	1767	AM_RANGE(0x500000, 0x501fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16, tx_vram_size)
	1768	AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16_offs, tx_offs_vram_size)
1731	1769	AM_RANGE(0x502200, 0x502fff) AM_RAM
1732		AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
	1770	AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txscrollram16, tx_scroll_vram_size)
1733	1771	AM_RANGE(0x503200, 0x503fff) AM_RAM
1734	1772	AM_RANGE(0x600000, 0x600001) AM_WRITE(bgaregga_soundlatch_w)
1735	1773	ADDRESS_MAP_END
r8962	r8963
1737	1775
1738	1776	static ADDRESS_MAP_START( batrider_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
1739	1777	AM_RANGE(0x000000, 0x1fffff) AM_ROM
1740		AM_RANGE(0x200000, 0x201fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE(&toaplan2_txvideoram16) AM_SIZE(&toaplan2_tx_vram_size)   /* Text VideoRAM */
1741		AM_RANGE(0x202000, 0x202fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) AM_SIZE(&batrider_paletteram16_size)
1742		AM_RANGE(0x203000, 0x2031ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
1743		AM_RANGE(0x203200, 0x2033ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
1744		AM_RANGE(0x203400, 0x207fff) AM_READWRITE(raizing_tx_gfxram16_r, raizing_tx_gfxram16_w)   /* Main RAM actually */
	1778	AM_RANGE(0x200000, 0x201fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16, tx_vram_size)   /* Text VideoRAM */
	1779	AM_RANGE(0x202000, 0x202fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) AM_SIZE_MEMBER(toaplan2_state, paletteram16_size)
	1780	AM_RANGE(0x203000, 0x2031ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16_offs, tx_offs_vram_size)
	1781	AM_RANGE(0x203200, 0x2033ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txscrollram16, tx_scroll_vram_size)
	1782	AM_RANGE(0x203400, 0x207fff) AM_READWRITE(raizing_tx_gfxram16_r, raizing_tx_gfxram16_w) /* Main RAM actually */
1745	1783	AM_RANGE(0x208000, 0x20ffff) AM_RAM
1746	1784	AM_RANGE(0x300000, 0x37ffff) AM_READ(raizing_z80rom_r)
1747	1785	AM_RANGE(0x400000, 0x40000d) AM_DEVREADWRITE("gp9001vdp0", gp9001_vdp_alt_r, gp9001_vdp_alt_w)
r8962	r8963
1765	1803
1766	1804	static ADDRESS_MAP_START( bbakraid_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
1767	1805	AM_RANGE(0x000000, 0x1fffff) AM_ROM
1768		AM_RANGE(0x200000, 0x201fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE(&toaplan2_txvideoram16) AM_SIZE(&toaplan2_tx_vram_size)   /* Text VideoRAM */
1769		AM_RANGE(0x202000, 0x202fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) AM_SIZE(&batrider_paletteram16_size)
1770		AM_RANGE(0x203000, 0x2031ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
1771		AM_RANGE(0x203200, 0x2033ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
	1806	AM_RANGE(0x200000, 0x201fff) AM_READWRITE(toaplan2_txvideoram16_r, toaplan2_txvideoram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16, tx_vram_size)   /* Text VideoRAM */
	1807	AM_RANGE(0x202000, 0x202fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) AM_SIZE_MEMBER(toaplan2_state, paletteram16_size)
	1808	AM_RANGE(0x203000, 0x2031ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txvideoram16_offs, tx_offs_vram_size)
	1809	AM_RANGE(0x203200, 0x2033ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE_SIZE_MEMBER(toaplan2_state, txscrollram16, tx_scroll_vram_size)
1772	1810	AM_RANGE(0x203400, 0x207fff) AM_READWRITE(raizing_tx_gfxram16_r, raizing_tx_gfxram16_w)   /* Main RAM actually */
1773	1811	AM_RANGE(0x208000, 0x20ffff) AM_RAM
1774	1812	AM_RANGE(0x300000, 0x33ffff) AM_READ(raizing_z80rom_r)
r8962	r8963
1792	1830
1793	1831
1794	1832
1795		static ADDRESS_MAP_START( sound_z80_mem, ADDRESS_SPACE_PROGRAM, 8 )
	1833	static ADDRESS_MAP_START( pipibibs_sound_z80_mem, ADDRESS_SPACE_PROGRAM, 8 )
1796	1834	AM_RANGE(0x0000, 0x7fff) AM_ROM
1797		AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&toaplan2_shared_ram)
	1835	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE_MEMBER(toaplan2_state, z80_shared_ram)
1798	1836	AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ymsnd", ym3812_r, ym3812_w)
1799	1837	ADDRESS_MAP_END
1800	1838
1801	1839
1802	1840	static ADDRESS_MAP_START( raizing_sound_z80_mem, ADDRESS_SPACE_PROGRAM, 8 )
1803	1841	AM_RANGE(0x0000, 0xbfff) AM_ROM
1804		AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&raizing_shared_ram)
	1842	AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE_MEMBER(toaplan2_state, z80_shared_ram)
1805	1843	AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
1806	1844	AM_RANGE(0xe004, 0xe004) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
1807	1845	AM_RANGE(0xe00e, 0xe00e) AM_WRITE(toaplan2_coin_w)
r8962	r8963
1811	1849	static ADDRESS_MAP_START( bgaregga_sound_z80_mem, ADDRESS_SPACE_PROGRAM, 8 )
1812	1850	AM_RANGE(0x0000, 0x7fff) AM_ROM
1813	1851	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
1814		AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&raizing_shared_ram)
	1852	AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE_MEMBER(toaplan2_state, z80_shared_ram)
1815	1853	AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
1816	1854	AM_RANGE(0xe004, 0xe004) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
1817	1855	AM_RANGE(0xe006, 0xe006) AM_WRITE(raizing_okim6295_bankselect_0)
r8962	r8963
2325	2363
2326	2364	static ADDRESS_MAP_START( V25_rambased_mem, ADDRESS_SPACE_PROGRAM, 8 )
2327	2365	AM_RANGE(0x00000, 0x00001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
2328		AM_RANGE(0x00000, 0x07fff) AM_RAM AM_SHARE("share6") AM_BASE(&batsugun_share)
	2366	AM_RANGE(0x00000, 0x07fff) AM_RAM AM_SHARE("share6") AM_BASE_MEMBER(toaplan2_state, batsugun_share)
2329	2367
2330	2368	//  AM_RANGE(0x40000, 0x477ff) AM_RAM AM_SHARE("share7")
2331	2369	AM_RANGE(0x40e00, 0x40eff) AM_RAM //internal V25 RAM
r8962	r8963
3711	3749
3712	3750	static void irqhandler(running_device *device, int linestate)
3713	3751	{
3714		if (sub_cpu != NULL)      // wouldn't tekipaki have problem without this? "mcu" is not generally added
3715		cpu_set_input_line(sub_cpu, 0, linestate);
	3752	toaplan2_state *state = device->machine->driver_data<toaplan2_state>();
	3753
	3754	if (state->sub_cpu != NULL)      // wouldn't tekipaki have problem without this? "mcu" is not generally added
	3755	cpu_set_input_line(state->sub_cpu, 0, linestate);
3716	3756	}
3717	3757
3718	3758	static const ym3812_interface ym3812_config =
r8962	r8963
3936	3976	static MACHINE_RESET(kbash)
3937	3977	{
3938	3978	#ifndef USE_ENCRYPTED_V25S
3939		cpu_set_input_line(sub_cpu, INPUT_LINE_HALT, ASSERT_LINE);
	3979	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	3980
	3981	cpu_set_input_line(state->sub_cpu, INPUT_LINE_HALT, ASSERT_LINE);
3940	3982	#endif
3941	3983	}
3942	3984
r8962	r8963
4082	4124	MDRV_CPU_PROGRAM_MAP(pipibibs_68k_mem)
4083	4125	MDRV_CPU_VBLANK_INT("screen", toaplan2_vblank_irq4)
4084	4126
4085		MDRV_CPU_ADD("audiocpu", Z80,XTAL_27MHz/8)         /* verified on pcb */
4086		MDRV_CPU_PROGRAM_MAP(sound_z80_mem)
	4127	MDRV_CPU_ADD("audiocpu", Z80, XTAL_27MHz/8)         /* verified on pcb */
	4128	MDRV_CPU_PROGRAM_MAP(pipibibs_sound_z80_mem)
4087	4129
4088	4130	MDRV_QUANTUM_TIME(HZ(600))
4089	4131
r8962	r8963
4171	4213	MDRV_CPU_VBLANK_INT("screen", toaplan2_vblank_irq4)
4172	4214
4173	4215	MDRV_CPU_ADD("audiocpu", Z80, XTAL_27MHz/8)         /* ??? 3.37MHz */
4174		MDRV_CPU_PROGRAM_MAP(sound_z80_mem)
	4216	MDRV_CPU_PROGRAM_MAP(pipibibs_sound_z80_mem)
4175	4217
4176	4218	MDRV_QUANTUM_TIME(HZ(600))
4177	4219
r8962	r8963
4305	4347
4306	4348	MDRV_DEVICE_ADD_VDP0
4307	4349
4308		MDRV_VIDEO_START(truxton2)
	4350	MDRV_VIDEO_START(fixeighb)
4309	4351	MDRV_VIDEO_EOF(toaplan2)
4310	4352	MDRV_VIDEO_UPDATE(truxton2)
4311	4353
r8962	r8963
4391	4433
4392	4434	static MACHINE_RESET(batsugun)
4393	4435	{
4394		cpu_set_input_line(sub_cpu, INPUT_LINE_HALT, ASSERT_LINE);
	4436	toaplan2_state *state = machine->driver_data<toaplan2_state>();
	4437
	4438	cpu_set_input_line(state->sub_cpu, INPUT_LINE_HALT, ASSERT_LINE);
4395	4439	}
4396	4440
4397	4441
r8962	r8963
5860	5904	GAME( 1991, ghox,     0,        ghox,     ghox,     T2_Z180,  ROT270, "Toaplan", "Ghox (Spinner with Up/Down Axis)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
5861	5905	GAME( 1991, ghoxj,    ghox,     ghox,     ghox,     T2_Z180,  ROT270, "Toaplan", "Ghox (8-Way Joystick)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
5862	5906
5863		GAME( 1992, dogyuun,  0,        dogyuun,  dogyuun,  T2_V25,   ROT270, "Toaplan", "Dogyuun", GAME_NO_SOUND | GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
5864		GAME( 1992, dogyuunk, dogyuun,  dogyuun,  dogyuunk, T2_V25,   ROT270, "Toaplan", "Dogyuun (Unite Trading license)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
	5907	GAME( 1992, dogyuun,  0,        dogyuun,  dogyuun,  T2_V25,   ROT270, "Toaplan", "Dogyuun", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
	5908	GAME( 1992, dogyuunk, dogyuun,  dogyuun,  dogyuunk, T2_V25,   ROT270, "Toaplan", "Dogyuun (Unite Trading license)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
5865	5909
5866	5910	GAME( 1993, kbash,    0,        kbash,    kbash,    T2_V25,   ROT0,   "Toaplan", "Knuckle Bash", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
5867	5911
r8962	r8963
5881	5925	GAME( 1992, grindstma,vfive,    vfive,    grindstm, T2_V25,   ROT270, "Toaplan", "Grind Stormer (older set)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
5882	5926	GAME( 1993, vfive,    0,        vfive,    vfive,    T2_V25,   ROT270, "Toaplan", "V-Five (Japan)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
5883	5927
5884		GAME( 1993, batsugun,  0,        batsugun, batsugun, T2_V25,   ROT270, "Toaplan", "Batsugun (set 1)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE | GAME_NOT_WORKING ) // dual vdp mixing is broken ATM
5885		GAME( 1993, batsuguna, batsugun, batsugun, batsugun, T2_V25,   ROT270, "Toaplan", "Batsugun (set 2)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE | GAME_NOT_WORKING ) // dual vdp mixing is broken ATM
5886		GAME( 1993, batsugunsp,batsugun, batsugun, batsugun, T2_V25,   ROT270, "Toaplan", "Batsugun (Special Ver.)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE | GAME_NOT_WORKING ) // dual vdp mixing is broken ATM
	5928	GAME( 1993, batsugun,  0,        batsugun, batsugun, T2_V25,   ROT270, "Toaplan", "Batsugun (set 1)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
	5929	GAME( 1993, batsuguna, batsugun, batsugun, batsugun, T2_V25,   ROT270, "Toaplan", "Batsugun (set 2)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
	5930	GAME( 1993, batsugunsp,batsugun, batsugun, batsugun, T2_V25,   ROT270, "Toaplan", "Batsugun (Special Ver.)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
5887	5931
5888	5932	GAME( 1994, snowbro2, 0,        snowbro2, snowbro2, T2_noZ80, ROT0,   "Hanafram", "Snow Bros. 2 - With New Elves / Otenki Paradise", GAME_SUPPORTS_SAVE )
5889	5933

src/mame/drivers/wecleman.c

r8962	r8963
495	495	for ( ; size > 0 ; size--)
496	496	{
497	497	/* maybe slower than a memcpy but safer (and errors are logged) */
498		memory_write_word(space, dest, memory_read_word(space, src));
	498	space->write_word(dest, space->read_word(src));
499	499	src += 2;
500	500	dest += 2;
501	501	}
r8962	r8963
508	508	int i, j, destptr;
509	509
510	510	/* Read offset of source from the list of blits */
511		i = src + memory_read_word(space, list+2);
	511	i = src + space->read_word(list+2);
512	512	j = i + (size<<1);
513	513	destptr = dest;
514	514
515	515	for (; i<j; destptr+=2, i+=2)
516		memory_write_word(space, destptr, memory_read_word(space, i));
	516	space->write_word(destptr, space->read_word(i));
517	517
518	518	destptr = dest + 14;
519		i = memory_read_word(space, list) + spr_color_offs;
520		memory_write_word(space, destptr, i);
	519	i = space->read_word(list) + spr_color_offs;
	520	space->write_word(destptr, i);
521	521
522	522	dest += 16;
523	523	list += 4;
524	524	}
525	525
526	526	/* hack for the blit to Sprites RAM - Sprite list end-marker */
527		memory_write_word(space, dest, 0xFFFF);
	527	space->write_word(dest, 0xFFFF);
528	528	}
529	529	}
530	530	}

src/mame/drivers/crbaloon.c

r8962	r8963
342	342
343	343	static MACHINE_RESET( crballoon )
344	344	{
345		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	345	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
346	346	running_device *discrete = machine->device("discrete");
347	347
348	348	pc3092_reset();

src/mame/drivers/btoads.c

r8962	r8963
51	51	}
52	52
53	53
54		static MACHINE_RESET( btoads )
55		{
56		tlc34076_reset(6);
57		}
58	54
59
60
61	55	/*************************************
62	56	*
63	57	*  Main -> sound CPU communication
r8962	r8963
349	343	MDRV_CPU_PERIODIC_INT(irq0_line_assert, 183)
350	344
351	345	MDRV_MACHINE_START(btoads)
352		MDRV_MACHINE_RESET(btoads)
353	346	MDRV_NVRAM_HANDLER(generic_1fill)
354	347
355	348	/* video hardware */
	349	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	350
356	351	MDRV_VIDEO_START(btoads)
357	352	MDRV_VIDEO_UPDATE(tms340x0)
358	353

src/mame/drivers/freekick.c

r8962	r8963
1111	1111
1112	1112	static DRIVER_INIT(gigasb)
1113	1113	{
1114		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1115		memory_set_decrypted_region(space, 0x0000, 0xbfff, memory_region(machine, "maincpu") + 0x10000);
	1114	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1115	space->set_decrypted_region(0x0000, 0xbfff, memory_region(machine, "maincpu") + 0x10000);
1116	1116	}
1117	1117
1118	1118

src/mame/drivers/speglsht.c

r8962	r8963
307	307	&st0016_charram
308	308	};
309	309
310		static const r3000_cpu_core config =
	310	static const r3000_cpu_core r3000_config =
311	311	{
312	312	0,
313	313	4096,   /* code cache size */
r8962	r8963
328	328	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
329	329
330	330	MDRV_CPU_ADD("sub", R3000LE, 25000000)
331		MDRV_CPU_CONFIG(config)
	331	MDRV_CPU_CONFIG(r3000_config)
332	332	MDRV_CPU_PROGRAM_MAP(speglsht_mem)
333	333	MDRV_CPU_VBLANK_INT("screen", irq4_line_assert)
334	334

src/mame/drivers/centiped.c

r8962	r8963
1976	1976
1977	1977	static DRIVER_INIT( caterplr )
1978	1978	{
1979		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1979	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1980	1980	running_device *device = machine->device("pokey");
1981	1981	memory_install_readwrite8_device_handler(space, device, 0x1000, 0x100f, 0, 0, caterplr_AY8910_r, caterplr_AY8910_w);
1982	1982	memory_install_read8_device_handler(space, device, 0x1780, 0x1780, 0, 0, caterplr_rand_r);
r8962	r8963
1985	1985
1986	1986	static DRIVER_INIT( magworm )
1987	1987	{
1988		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1988	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1989	1989	running_device *device = machine->device("pokey");
1990	1990	memory_install_write8_device_handler(space, device, 0x1001, 0x1001, 0, 0, ay8910_address_w);
1991	1991	memory_install_readwrite8_device_handler(space, device, 0x1003, 0x1003, 0, 0, ay8910_r, ay8910_data_w);

src/mame/drivers/metro.c

r8962	r8963
129	129	static void update_irq_state( running_machine *machine )
130	130	{
131	131	metro_state *state = machine->driver_data<metro_state>();
132		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	132	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
133	133
134	134	/*  Get the pending IRQs (only the enabled ones, e.g. where irq_enable is *0*)  */
135	135	UINT16 irq = metro_irq_cause_r(space, 0, 0xffff) & ~*state->irq_enable;
r8962	r8963
340	340	static int metro_io_callback( running_device *device, int ioline, int state )
341	341	{
342	342	metro_state *driver_state = device->machine->driver_data<metro_state>();
343		const address_space *space = cpu_get_address_space(driver_state->maincpu, ADDRESS_SPACE_PROGRAM);
	343	address_space *space = cpu_get_address_space(driver_state->maincpu, ADDRESS_SPACE_PROGRAM);
344	344	UINT8 data = 0;
345	345
346	346	switch (ioline)
r8962	r8963
665	665	return ROM[offs];
666	666	}
667	667
668		INLINE void blt_write( const address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
	668	INLINE void blt_write( address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
669	669	{
670	670	switch(tmap)
671	671	{
r8962	r8963
6095	6095	static DRIVER_INIT( metro )
6096	6096	{
6097	6097	metro_state *state = machine->driver_data<metro_state>();
6098		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	6098	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
6099	6099
6100	6100	metro_common(machine);
6101	6101
r8962	r8963
6128	6128	static DRIVER_INIT( daitorid )
6129	6129	{
6130	6130	metro_state *state = machine->driver_data<metro_state>();
6131		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	6131	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
6132	6132
6133	6133	metro_common(machine);
6134	6134

src/mame/drivers/hshavoc.c

r8962	r8963
218	218	*/
219	219
220	220	{
221		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	221	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
222	222	memory_nop_write(space, 0x200000, 0x201fff, 0, 0);
223	223	}
224	224

src/mame/drivers/attckufo.c

r8962	r8963
172	172	static int attckufo_dma_read( running_machine *machine, int offset )
173	173	{
174	174	attckufo_state *state = machine->driver_data<attckufo_state>();
175		return memory_read_byte(state->maincpu->space(AS_PROGRAM), offset);
	175	return state->maincpu->space(AS_PROGRAM)->read_byte(offset);
176	176	}
177	177
178	178	static int attckufo_dma_read_color( running_machine *machine, int offset )
179	179	{
180	180	attckufo_state *state = machine->driver_data<attckufo_state>();
181		return memory_read_byte(state->maincpu->space(AS_PROGRAM), offset + 0x400);
	181	return state->maincpu->space(AS_PROGRAM)->read_byte(offset + 0x400);
182	182	}
183	183
184	184	static const mos6560_interface attckufo_6560_intf =

src/mame/drivers/littlerb.c

r8962	r8963
213	213	static void littlerb_data_write(running_machine *machine, UINT16 data, UINT16 mem_mask)
214	214	{
215	215	UINT32 addr = littlerb_write_address>>4; // is this right? should we shift?
216		const address_space *vdp_space = machine->device<littlerb_vdp_device>("littlerbvdp")->space();
	216	address_space *vdp_space = machine->device<littlerb_vdp_device>("littlerbvdp")->space();
217	217
218	218
219		memory_write_word_masked(vdp_space, addr*2, data, mem_mask);
	219	vdp_space->write_word(addr*2, data, mem_mask);
220	220
221	221
222	222	// e000 / 2000 are used for palette writes, which should go to a RAMDAC, so probably mean no auto inc.

src/mame/drivers/namcos23.c

r8962	r8963
1911	1911	render_count[render_cur]++;
1912	1912	}
1913	1913
1914		static void p3d_dma(const address_space *space, UINT32 adr, UINT32 size)
	1914	static void p3d_dma(address_space *space, UINT32 adr, UINT32 size)
1915	1915	{
1916	1916	adr &= 0x1fffffff;
1917	1917	UINT16 buffer[256];
1918	1918	int pos = 0;
1919	1919	while(pos < size) {
1920		UINT16 h = memory_read_word(space, adr+pos);
	1920	UINT16 h = space->read_word(adr+pos);
1921	1921
1922	1922	pos += 2;
1923	1923
r8962	r8963
1937	1937	}
1938	1938
1939	1939	for(int i=0; i < psize; i++) {
1940		buffer[i] = memory_read_word(space, adr+pos);
	1940	buffer[i] = space->read_word(adr+pos);
1941	1941	pos += 2;
1942	1942	}
1943	1943
r8962	r8963
2865	2865	GFXDECODE_ENTRY( NULL, 0, namcos23_cg_layout, 0x7f00, 0x80 )
2866	2866	GFXDECODE_END
2867	2867
2868		static const mips3_config config =
	2868	static const mips3_config r4650_config =
2869	2869	{
2870	2870	8192,            /* code cache size - VERIFIED */
2871	2871	8192            /* data cache size - VERIFIED */
r8962	r8963
2875	2875
2876	2876	/* basic machine hardware */
2877	2877	MDRV_CPU_ADD("maincpu", R4650BE, S23_BUSCLOCK*4)
2878		MDRV_CPU_CONFIG(config)
	2878	MDRV_CPU_CONFIG(r4650_config)
2879	2879	MDRV_CPU_PROGRAM_MAP(gorgon_map)
2880	2880	MDRV_CPU_VBLANK_INT("screen", s23_interrupt)
2881	2881
r8962	r8963
2921	2921	static MACHINE_DRIVER_START( s23 )
2922	2922	/* basic machine hardware */
2923	2923	MDRV_CPU_ADD("maincpu", R4650BE, S23_BUSCLOCK*4)
2924		MDRV_CPU_CONFIG(config)
	2924	MDRV_CPU_CONFIG(r4650_config)
2925	2925	MDRV_CPU_PROGRAM_MAP(ss23_map)
2926	2926	MDRV_CPU_VBLANK_INT("screen", s23_interrupt)
2927	2927
r8962	r8963
2967	2967	static MACHINE_DRIVER_START( ss23 )
2968	2968	/* basic machine hardware */
2969	2969	MDRV_CPU_ADD("maincpu", R4650BE, S23_BUSCLOCK*5)
2970		MDRV_CPU_CONFIG(config)
	2970	MDRV_CPU_CONFIG(r4650_config)
2971	2971	MDRV_CPU_PROGRAM_MAP(ss23_map)
2972	2972	MDRV_CPU_VBLANK_INT("screen", s23_interrupt)
2973	2973

src/mame/drivers/chihiro.c

r8962	r8963
36	36
37	37	#include "emu.h"
38	38	#include "cpu/i386/i386.h"
	39	#include "machine/pci.h"
39	40	#include "includes/naomibd.h"
	41	#include "debug/debugcon.h"
	42	#include "debug/debugcmd.h"
40	43
41		static VIDEO_START(chihiro)
	44	/* jamtable instructions for Chihiro
	45	St.     Instr.       Comment
	46	0x01    POKEPCI      PCICONF[OP2] := OP1
	47	0x02    OUTB         PORT[OP2] := OP1
	48	0x03    POKE         MEM[OP2] := OP1
	49	0x04    BNE          IF ACC <> OP2 THEN PC := PC + OP1
	50	0x05    PEEKPCI      ACC := PCICONF[OP2]
	51	0x06    AND/OR       ACC := (ACC & OP2) | OP1
	52	0x07    BRA          PC := PC + OP1
	53	0x08    INB          ACC := PORT[OP2]
	54	0x09    PEEK         ACC := MEM[OP2]
	55	0xE1    (prefix)     execute the instruction code in OP2 with OP2 := OP1, OP1 := ACC
	56	0xEE    END
	57	*/
	58
	59	/* jamtable disassembler */
	60	static void jamtable_disasm(running_machine *machine, address_space *space,UINT32 address,UINT32 size) // 0xff000080 == fff00080
42	61	{
	62	UINT32 base,addr;
	63	UINT32 opcode,op1,op2;
	64	char sop1[16];
	65	char sop2[16];
	66	char pcrel[16];
	67	int prefix;
43	68
	69	addr=address;
	70	while (1)
	71	{
	72	base=addr;
	73	opcode=space->read_byte(addr);
	74	addr++;
	75	op1=space->read_dword(addr);
	76	addr+=4;
	77	op2=space->read_dword(addr);
	78	addr+=4;
	79	if (opcode == 0xe1)
	80	{
	81	opcode=op2 & 255;
	82	op2=op1;
	83	//op1=edi;
	84	sprintf(sop2,"%08X",op2);
	85	sprintf(sop1,"ACC");
	86	sprintf(pcrel,"PC+ACC");
	87	prefix=1;
	88	}
	89	else
	90	{
	91	sprintf(sop2,"%08X",op2);
	92	sprintf(sop1,"%08X",op1);
	93	sprintf(pcrel,"%08X",base+9+op1);
	94	prefix=0;
	95	}
	96	debug_console_printf(machine,"%08X ",base);
	97	// dl=instr ebx=par1 eax=par2
	98	switch (opcode)
	99	{
	100	case 0x01:
	101	// if ((op2 & 0xff) == 0x880) op1=op1 & 0xfffffffd
	102	// out cf8,op2
	103	// out cfc,op1
	104	// out cf8,0
	105	// cf8 (CONFIG_ADDRESS) format:
	106	// 31 30      24 23        16 15           11 10              8 7               2 1 0
	107	// +-+----------+------------+---------------+-----------------+-----------------+-+-+
	108	// | | Reserved | Bus Number | Device Number | Function Number | Register Number |0|0|
	109	// +-+----------+------------+---------------+-----------------+-----------------+-+-+
	110	// 31 - Enable bit
	111	debug_console_printf(machine,"POKEPCI PCICONF[%s]=%s\n",sop2,sop1);
	112	break;
	113	case 0x02:
	114	debug_console_printf(machine,"OUTB    PORT[%s]=%s\n",sop2,sop1);
	115	break;
	116	case 0x03:
	117	debug_console_printf(machine,"POKE    MEM[%s]=%s\n",sop2,sop1);
	118	break;
	119	case 0x04:
	120	debug_console_printf(machine,"BNE     IF ACC != %s THEN PC=%s\n",sop2,pcrel);
	121	break;
	122	case 0x05:
	123	// out cf8,op2
	124	// in acc,cfc
	125	debug_console_printf(machine,"PEEKPCI ACC=PCICONF[%s]\n",sop2);
	126	break;
	127	case 0x06:
	128	debug_console_printf(machine,"AND/OR  ACC=(ACC & %s) | %s\n",sop2,sop1);
	129	break;
	130	case 0x07:
	131	debug_console_printf(machine,"BRA     PC=%s\n",pcrel);
	132	break;
	133	case 0x08:
	134	debug_console_printf(machine,"INB     ACC=PORT[%s]\n",sop2);
	135	break;
	136	case 0x09:
	137	debug_console_printf(machine,"PEEK    ACC=MEM[%s]\n",sop2);
	138	break;
	139	case 0xee:
	140	debug_console_printf(machine,"END\n");
	141	break;
	142	default:
	143	debug_console_printf(machine,"NOP     ????\n");
	144	break;
	145	}
	146	if (opcode == 0xee)
	147	break;
	148	if (size <= 9)
	149	break;
	150	size-=9;
	151	}
44	152	}
45	153
46		static VIDEO_UPDATE(chihiro)
	154	void jamtable_disasm_command(running_machine *machine, int ref, int params, const char **param)
47	155	{
	156	address_space *space=machine->firstcpu->space();
	157	UINT64   addr,size;
48	158
49		return 0;
	159	if (params < 2)
	160	return;
	161	if (!debug_command_parameter_number(machine, param[0], &addr))
	162	return;
	163	if (!debug_command_parameter_number(machine, param[1], &size))
	164	return;
	165	jamtable_disasm(machine, space, (UINT32)addr, (UINT32)size);
50	166	}
51	167
52
53	168	/*
54	169	St.     Instr.       Comment
55	170	0x02    PEEK         ACC := MEM[OP1]
r8962	r8963
65	180	0x12    INB          ACC := PORT(OP1)
66	181	0xEE    END
67	182	*/
	183	#ifdef UNUSED_FUNCTION
68	184	static READ32_HANDLER( chihiro_jamtable )
69	185	{
70	186	return 0xEEEEEEEE;
71	187	}
	188	#endif
72	189
	190	static UINT32 dummy_pci_r(running_device *busdevice, running_device *device, int function, int reg, UINT32 mem_mask)
	191	{
	192	logerror("  bus:%d function:%d register:%d mask:%08X\n",((pci_bus_config *)downcast<const legacy_device_config_base &>(busdevice->baseconfig()).inline_config())->busnum,function,reg,mem_mask);
	193	return 0;
	194	}
73	195
	196	static void dummy_pci_w(running_device *busdevice, running_device *device, int function, int reg, UINT32 data, UINT32 mem_mask)
	197	{
	198	logerror("  bus:%d function:%d register:%d data:%08X mask:%08X\n",((pci_bus_config *)downcast<const legacy_device_config_base &>(busdevice->baseconfig()).inline_config())->busnum,function,reg,data,mem_mask);
	199	}
	200
	201	static READ32_HANDLER( dummy_r )
	202	{
	203	return 0;
	204	}
	205
	206	static WRITE32_HANDLER( dummy_w )
	207	{
	208	}
	209
	210	int smbus_cx25871(int command,int rw,int data)
	211	{
	212	logerror("cx25871: %d %d %d\n",command,rw,data);
	213	return 0;
	214	}
	215
	216	typedef struct _smbus_state {
	217	int status;
	218	int control;
	219	int address;
	220	int data;
	221	int command;
	222	int rw;
	223	int (*devices[128])(int command,int rw,int data);
	224	UINT32 words[256/4];
	225	} smbus_state;
	226	smbus_state smbusst;
	227
	228	void smbus_register_device(int address,int (*handler)(int command,int rw,int data))
	229	{
	230	if (address < 128)
	231	smbusst.devices[address]=handler;
	232	}
	233
	234	static READ32_HANDLER( smbus_r )
	235	{
	236	if ((offset == 0) && (mem_mask == 0xff)) // 0 smbus status
	237	smbusst.words[offset] = (smbusst.words[offset] & ~mem_mask) | (smbusst.status << 0);
	238	if ((offset == 1) && (mem_mask == 0xff0000)) // 6 smbus data
	239	smbusst.words[offset] = (smbusst.words[offset] & ~mem_mask) | (smbusst.data << 16);
	240	return smbusst.words[offset];
	241	}
	242
	243	static WRITE32_HANDLER( smbus_w )
	244	{
	245	COMBINE_DATA(smbusst.words);
	246	if ((offset == 0) && (mem_mask == 0xff)) // 0 smbus status
	247	smbusst.status &= ~data;
	248	if ((offset == 0) && (mem_mask == 0xff0000)) // 2 smbus control
	249	{
	250	data=data>>16;
	251	smbusst.control = data;
	252	if ((smbusst.control & 6) == 2)
	253	{
	254	if (smbusst.devices[smbusst.address & 127]) {
	255	if (smbusst.rw == 0) {
	256	smbusst.devices[smbusst.address & 127](smbusst.command,smbusst.rw,smbusst.data);
	257	}
	258	else {
	259	smbusst.data=smbusst.devices[smbusst.address & 127](smbusst.command,smbusst.rw,smbusst.data);
	260	}
	261	}
	262	smbusst.status |= 0x10;
	263	}
	264	}
	265	if ((offset == 1) && (mem_mask == 0xff)) // 4 smbus address
	266	{
	267	smbusst.address = data >> 1;
	268	smbusst.rw = data & 1;
	269	}
	270	if ((offset == 1) && (mem_mask == 0xff0000)) // 6 smbus data
	271	{
	272	data=data>>16;
	273	smbusst.data = data;
	274	}
	275	if ((offset == 2) && (mem_mask == 0xff)) // 8 smbus command
	276	smbusst.command = data;
	277	}
	278
	279
74	280	static ADDRESS_MAP_START( xbox_map, ADDRESS_SPACE_PROGRAM, 32 )
75		AM_RANGE(0x00000000, 0x004fffff) AM_RAM
76		AM_RANGE(0x07fd0000, 0x07feffff) AM_RAM // a table of some sort?
	281	AM_RANGE(0x00000000, 0x07ffffff) AM_RAM
	282	AM_RANGE(0xff000000, 0xffffffff) AM_ROM AM_REGION("bios", 0) AM_MIRROR(0x00f80000)
	283	ADDRESS_MAP_END
77	284
78		AM_RANGE(0xff000080, 0xff000083) AM_READ( chihiro_jamtable )
79		AM_RANGE(0xfff00000, 0xfff7ffff) AM_ROM AM_SHARE("biosflash")
80		AM_RANGE(0xfff80000, 0xffffffff) AM_ROM AM_REGION("bios", 0) AM_SHARE("biosflash")
	285	static ADDRESS_MAP_START(xbox_map_io, ADDRESS_SPACE_IO, 32)
	286	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_32le_r, pci_32le_w)
	287	AM_RANGE(0x8000, 0x80ff) AM_READWRITE(dummy_r, dummy_w)
	288	AM_RANGE(0xc000, 0xc0ff) AM_READWRITE(smbus_r, smbus_w)
81	289	ADDRESS_MAP_END
82	290
83	291	static INPUT_PORTS_START( chihiro )
84	292	INPUT_PORTS_END
85	293
	294	static MACHINE_START( chihiro )
	295	{
	296	smbus_register_device(0x45,smbus_cx25871);
	297	debug_console_register_command(machine,"jamdis",CMDFLAG_NONE,0,2,3,jamtable_disasm_command);
	298	}
	299
86	300	static MACHINE_DRIVER_START( chihiro_base )
87	301
88	302	/* basic machine hardware */
89	303	MDRV_CPU_ADD("maincpu", PENTIUM, 733333333) /* Wrong! */
90	304	MDRV_CPU_PROGRAM_MAP(xbox_map)
	305	MDRV_CPU_IO_MAP(xbox_map_io)
91	306
92	307	MDRV_QUANTUM_TIME(HZ(6000))
93	308
	309	MDRV_PCI_BUS_ADD("pcibus", 0)
	310	MDRV_PCI_BUS_DEVICE(0, "PCI Bridge Device - Host Bridge", dummy_pci_r, dummy_pci_w)
	311	MDRV_PCI_BUS_DEVICE(1, "HUB Interface - ISA Bridge", dummy_pci_r, dummy_pci_w)
	312	MDRV_PCI_BUS_DEVICE(2, "OHCI USB Controller 1", dummy_pci_r, dummy_pci_w)
	313	MDRV_PCI_BUS_DEVICE(3, "OHCI USB Controller 2", dummy_pci_r, dummy_pci_w)
	314	MDRV_PCI_BUS_DEVICE(30, "AGP Host to PCI Bridge", dummy_pci_r, dummy_pci_w)
	315	MDRV_PCI_BUS_ADD("agpbus", 1)
	316	MDRV_PCI_BUS_SIBLING("pcibus")
	317	MDRV_PCI_BUS_DEVICE(0, "NV2A GeForce 3MX Integrated GPU/Northbridge", dummy_pci_r, dummy_pci_w)
	318
94	319	/* video hardware */
95	320	MDRV_SCREEN_ADD("screen", RASTER)
96	321	MDRV_SCREEN_REFRESH_RATE(60)
r8962	r8963
98	323	MDRV_SCREEN_SIZE(640, 480)
99	324	MDRV_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
100	325
	326	MDRV_MACHINE_START(chihiro)
	327
101	328	MDRV_PALETTE_LENGTH(65536)
102
103		MDRV_VIDEO_START(chihiro)
104		MDRV_VIDEO_UPDATE(chihiro)
105	329	MACHINE_DRIVER_END
106	330
107	331	static MACHINE_DRIVER_START( chihirogd )
r8962	r8963
116	340	ROMX_LOAD(name, offset, length, hash, ROM_BIOS(bios+1)) /* Note '+1' */
117	341
118	342	#define CHIHIRO_BIOS \
119		ROM_REGION( 0x200000, "bios", 0) \
	343	ROM_REGION( 0x1000000, "bios", 0) \
120	344	ROM_SYSTEM_BIOS( 0, "bios0", "Chihiro Bios" ) \
121	345	ROM_LOAD_BIOS( 0,  "chihiro_xbox_bios.bin", 0x000000, 0x80000, CRC(66232714) SHA1(b700b0041af8f84835e45d1d1250247bf7077188) ) \
122	346	ROM_REGION( 0x200000, "others", 0) \
r8962	r8963
310	534	GAME( 2003, vcop3,    chihiro, chihirogd,    chihiro,    0, ROT0, "Sega",           "Virtua Cop 3 (GDX-0003A)", GAME_NO_SOUND|GAME_NOT_WORKING )
311	535	GAME( 2005, mj3,      chihiro, chihirogd,    chihiro,    0, ROT0, "Sega",           "Sega Network Taisen Mahjong MJ 3 (Rev D) (GDX-0017D)", GAME_NO_SOUND|GAME_NOT_WORKING )
312	536	GAME( 2006, scg06nt,  chihiro, chihirogd,    chihiro,    0, ROT0, "Sega",           "Sega Club Golf 2006 Next Tours (Rev A) (GDX-0018A)", GAME_NO_SOUND|GAME_NOT_WORKING )
313

src/mame/drivers/commando.c

r8962	r8963
521	521
522	522	static DRIVER_INIT( commando )
523	523	{
524		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	524	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
525	525	UINT8 *rom = memory_region(machine, "maincpu");
526	526	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0xc000);
527	527	int A;
528	528
529		memory_set_decrypted_region(space, 0x0000, 0xbfff, decrypt);
	529	space->set_decrypted_region(0x0000, 0xbfff, decrypt);
530	530
531	531	// the first opcode is *not* encrypted
532	532	decrypt[0] = rom[0];
r8962	r8963
541	541
542	542	static DRIVER_INIT( spaceinv )
543	543	{
544		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	544	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
545	545	UINT8 *rom = memory_region(machine, "maincpu");
546	546	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0xc000);
547	547	int A;
548	548
549		memory_set_decrypted_region(space, 0x0000, 0xbfff, decrypt);
	549	space->set_decrypted_region(0x0000, 0xbfff, decrypt);
550	550
551	551	// the first opcode *is* encrypted
552	552	for (A = 0; A < 0xc000; A++)

src/mame/drivers/atarisy2.c

r8962	r8963
208	208	*
209	209	*************************************/
210	210
211		static DIRECT_UPDATE_HANDLER( atarisy2_direct_handler )
	211	DIRECT_UPDATE_HANDLER( atarisy2_direct_handler )
212	212	{
213		atarisy2_state *state = space->machine->driver_data<atarisy2_state>();
214
215	213	/* make sure slapstic area looks like ROM */
216	214	if (address >= 0x8000 && address < 0x8200)
217	215	{
218		direct->raw = direct->decrypted = (UINT8 *)state->slapstic_base - 0x8000;
	216	atarisy2_state *state = machine->driver_data<atarisy2_state>();
	217	direct.explicit_configure(0x8000, 0x81ff, 0x1ff, (UINT8 *)state->slapstic_base);
219	218	return ~0;
220	219	}
221	220	return address;
r8962	r8963
245	244	atarigen_interrupt_reset(state, update_interrupts);
246	245	atarigen_sound_io_reset(machine->device("soundcpu"));
247	246	atarigen_scanline_timer_reset(*machine->primary_screen, scanline_update, 64);
248		memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), atarisy2_direct_handler);
249	247
	248	address_space *main = machine->device<t11_device>("maincpu")->space(AS_PROGRAM);
	249	main->set_direct_update_handler(direct_update_delegate_create_static(atarisy2_direct_handler, *machine));
	250
250	251	state->p2portwr_state = 0;
251	252	state->p2portrd_state = 0;
252	253
r8962	r8963
345	346
346	347	static STATE_POSTLOAD( bankselect_postload )
347	348	{
348		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	349	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
349	350	atarisy2_state *state = machine->driver_data<atarisy2_state>();
350	351
351	352	bankselect_w(space, 0, state->bankselect[0], 0xffff);

src/mame/drivers/ninjakd2.c

r8962	r8963
1446	1446
1447	1447	static DRIVER_INIT( bootleg )
1448	1448	{
1449		const address_space *space = cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_PROGRAM);
1450		memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "soundcpu") + 0x10000);
	1449	address_space *space = cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_PROGRAM);
	1450	space->set_decrypted_region(0x0000, 0x7fff, memory_region(machine, "soundcpu") + 0x10000);
1451	1451
1452	1452	gfx_unscramble(machine);
1453	1453	}

src/mame/drivers/spacefb.c

r8962	r8963
174	174
175	175	static MACHINE_RESET( spacefb )
176	176	{
177		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	177	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
178	178	/* the 3 output ports are cleared on reset */
179	179	spacefb_port_0_w(space, 0, 0);
180	180	spacefb_port_1_w(space, 0, 0);

src/mame/drivers/liberate.c

r8962	r8963
1364	1364
1365	1365	static void sound_cpu_decrypt(running_machine *machine)
1366	1366	{
1367		const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	1367	address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
1368	1368	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
1369	1369	UINT8 *rom = memory_region(machine, "audiocpu");
1370	1370	int i;
r8962	r8963
1373	1373	for (i = 0xc000; i < 0x10000; i++)
1374	1374	decrypted[i - 0xc000] = ((rom[i] & 0x20) << 1) | ((rom[i] & 0x40) >> 1) | (rom[i] & 0x9f);
1375	1375
1376		memory_set_decrypted_region(space, 0xc000, 0xffff, decrypted);
	1376	space->set_decrypted_region(0xc000, 0xffff, decrypted);
1377	1377	}
1378	1378
1379	1379	static DRIVER_INIT( prosport )
r8962	r8963
1398	1398	static DRIVER_INIT( liberate )
1399	1399	{
1400	1400	int A;
1401		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1401	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1402	1402	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
1403	1403	UINT8 *ROM = memory_region(machine, "maincpu");
1404	1404
1405		memory_set_decrypted_region(space, 0x0000, 0xffff, decrypted);
	1405	space->set_decrypted_region(0x0000, 0xffff, decrypted);
1406	1406
1407	1407	/* Swap bits for opcodes only, not data */
1408	1408	for (A = 0; A < 0x10000; A++) {

src/mame/drivers/seta.c

r8962	r8963
3020	3020
3021	3021	static MACHINE_RESET(calibr50)
3022	3022	{
3023		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3023	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3024	3024	sub_bankswitch_w(space, 0, 0);
3025	3025	}
3026	3026
r8962	r8963
9662	9662	ROM_LOAD( "93uta08.69", 0x000000, 0x100000, CRC(3d50bbcd) SHA1(e9b78d08466e1f9b42f11999bb53b6deceb81a12) )
9663	9663	ROM_END
9664	9664
9665		ROM_START( neobattl )
	9665	ROM_START( neobattl )   // 1CC74: "SD GUNDAM v0.00. 1992/11/04 10:04:33"
9666	9666	ROM_REGION( 0x100000, "maincpu", 0 )      /* 68000 Code */
9667		ROM_LOAD16_BYTE( "bp923001.u45", 0x000000, 0x020000, CRC(0d0aeb73) SHA1(5ca631d5d68e53029f379d9877a056997c6c6afa) )   // 1CC74: "SD GUNDAM v0.00. 1992/11/04 10:04:33"
9668		ROM_LOAD16_BYTE( "bp923002.u46", 0x000001, 0x020000, CRC(9731fbbc) SHA1(196c913fb67496f9da2943ad1e69edf89cb65fdf) )
	9667	ROM_LOAD16_BYTE( "bp923001.u45", 0x000000, 0x020000, CRC(0d0aeb73) SHA1(5ca631d5d68e53029f379d9877a056997c6c6afa) ) /* Alt label X1-001 which is also a Seta custom chip number */
	9668	ROM_LOAD16_BYTE( "bp923002.u46", 0x000001, 0x020000, CRC(9731fbbc) SHA1(196c913fb67496f9da2943ad1e69edf89cb65fdf) ) /* Alt label X1-002A which is also a Seta custom chip number */
9669	9669
9670	9670	ROM_REGION( 0x100000, "gfx1", 0 )   /* Sprites */
9671		ROM_LOAD( "bp923003.u15", 0x00000, 0x80000, CRC(91ca98a1) SHA1(b02b362e3a6118f52d9e1a262ca11aecef887b00) )
9672		ROM_LOAD( "bp923004.u9",  0x80000, 0x80000, CRC(15c678e3) SHA1(8c0fa41a1f4e7b4e1c90faaeec7f6c910cc3ad0b) )
	9671	ROM_LOAD( "bp923-003.u15", 0x00000, 0x80000, CRC(91ca98a1) SHA1(b02b362e3a6118f52d9e1a262ca11aecef887b00) )
	9672	ROM_LOAD( "bp923-004.u9",  0x80000, 0x80000, CRC(15c678e3) SHA1(8c0fa41a1f4e7b4e1c90faaeec7f6c910cc3ad0b) )
9673	9673
9674	9674	ROM_REGION( 0x100000, "x1snd", 0 )   /* Samples */
9675		ROM_LOAD( "bp923005.u4", 0x000000, 0x100000, CRC(7c0e37be) SHA1(5d5779de948f986971a82db2a5a4302044c3257a) )
	9675	ROM_LOAD( "bp923-005.u4", 0x000000, 0x100000, CRC(7c0e37be) SHA1(5d5779de948f986971a82db2a5a4302044c3257a) )
9676	9676	ROM_END
9677	9677
9678	9678	ROM_START( pairlove )

src/mame/drivers/laserbat.c

r8962	r8963
685	685	{
686	686	"screen",
687	687	0x100,
688		0, -19
	688	0, -19,
	689	NULL
689	690	};
690	691
691	692	static const s2636_interface s2636_2_config =
692	693	{
693	694	"screen",
694	695	0x100,
695		0, -19
	696	0, -19,
	697	NULL
696	698	};
697	699
698	700	static const s2636_interface s2636_3_config =
699	701	{
700	702	"screen",
701	703	0x100,
702		0, -19
	704	0, -19,
	705	NULL
703	706	};
704	707
705	708	static MACHINE_START( laserbat )

src/mame/drivers/naomi.c

r8962	r8963
192	192	The other side of the cart PCB just has more locations for
193	193	SOP44 MASKROMs... IC12S to IC21S (ROM12 to ROM21)
194	194
195		IC1-IC21S - MaskROM (SOP44), either 32Mb or 64Mb. Not all positions are populated.
	195	IC1-IC21S - MaskROM (SOP44), either 32Mb or 64Mb. Not all positions are populated
196	196	IC22  - EPROM (DIP42), either 27C160 or 27C322
197	197	JP1   - JUMPER Sets the size of the EPROM. 1-2 = 32M, 2-3 = 16M
198	198	IC37  - FLASHROM (SOIC8) Xicor X76F100 Secure SerialFlash
199	199	IC41  - Sega 315-6213 Xilinx XC9536 (PLCC44)
200		IC42  - SEGA 315-5581 (QFP100). Probably some kind of FPGA or CPLD. Usually different per game.
	200	IC42  - SEGA 315-5581 (QFP100). Probably some kind of FPGA or CPLD. Usually different per game
201	201	On the end of the number, -JPN means it requires Japanese BIOS, -COM will run with any BIOS
202	202	IC44-IC45  - SRAM (SOJ28) 32kx8, either IDT71256 or CY7C199
203	203	CN1/2/3  - connectors joining to main board
r8962	r8963
277	277	Notes:
278	278
279	279	OSC1  - oscillator 50.0000MHz
280		IC1   - FPGA ACTEL A54SX32A (QFP208) SEGA part number 317-xxxx-yyy; -JPN means it requires Japanese BIOS, -COM will run with any BIOS
	280	IC1   - FPGA ACTEL A54SX32A (QFP208) SEGA part number 317-xxxx-yyy
	281	On the end of the number, -JPN means it requires Japanese BIOS, -COM will run with any BIOS
281	282	IC11  - EPROM (DIP42), either 27C160 or 27C322
282	283	JP1   - JUMPER Sets the size of the EPROM. 1-2 = 32M, 2-3 = 16M
283	284	IC13S - EEPROM (SOIC8) 25LC040 serial EEPROM
284	285	IC14  - 256 x 9 AsyncFIFO, 5.0V (SOP28)
285	286	IC15  - SRAM (SOJ28) 32kx8, IDT71256
286		IC17S-IC38S - MaskROM (SOP44), either 32Mb or 64Mb
	287	IC17S-IC38S - MaskROM (SOP44), either 32Mb or 64Mb. Not all positions are populated
287	288	CN1/2/3  - connectors joining to main board
288	289
289	290	Games known to use this PCB include....
290	291	Sticker    EPROM   # of SOP44
291	292	Game                                    on cart    IC11#   MASKROMs   IC1#      label IC1#    Notes
292	293	---------------------------------------------------------------------------------------------------------------------
293		Giant Gram 2000                         840-0039C  23373   20 (64Mb)  A54SX32   317-0296-COM
	294	Giant Gram 2000                         840-0039C  23377   20 (64Mb)  A54SX32   317-0296-COM
294	295	Kick '4' Cash                           840-0140C  24212   16 (64Mb)  A54SX32A  317-0397-COM
295	296	Marvel Vs. Capcom 2                     841-0007C  23085A  14 (64Mb)  A54SX32   317-5058-COM  +2x 32Mb (full cart #:841-0007C-03)
296	297	Quiz Ah Megamisama                      840-0030C  23227   16 (64Mb)  A54SX32   317-0280-JPN
r8962	r8963
320	321	The female side of the cart PCB only has traces
321	322
322	323	OSC1  - oscillator 28.000MHz
323		IC1-IC11  - MaskROM (TSOP48), 128Mb
	324	IC1-IC11  - MaskROM (TSOP48), 128Mb. Not all positions are populated
324	325	IC22  - EPROM (DIP42), either 27C160 or 27C322
325	326	JP1   - JUMPER Sets the size of the EPROM. 1-2 = 32M, 2-3 = 16M
326	327	IC27  - PLD Sega 315-6319A ALTERA EPM7032 (PLCC44)
327	328	IC41  - Sega 315-6213 Xilinx XC9536 (PLCC44)
328		IC42  - SEGA 315-5581 (QFP100). Probably some kind of FPGA or CPLD. Usually different per game.
	329	IC42  - SEGA 315-5581 (QFP100). Probably some kind of FPGA or CPLD. Usually different per game
329	330	On the end of the number, -JPN means it requires Japanese BIOS, -COM will run with any BIOS
330	331	IC44-IC45  - SRAM (SOJ28) 32kx8, either IDT71256 or CY7C199
331	332	JP2   - JUMPER unknown function
r8962	r8963
339	340	Capcom Vs. SNK Millennium Fight 2000    841-0011C  23511C   7 (128Mb)  315-6319   315-6213  317-5059-COM  (000904)
340	341	Derby Owners Club 2                     840-0083C  22306B  11 (128Mb)  315-6319A  315-6213  not populated
341	342	Derby Owners Club World Edition (Rev C) 840-0088C  22336C   7 (128Mb)  315-6319A  315-6213  not populated
	343	Derby Owners Club World Edition (Rev D) 840-0088C  22336D   7 (128Mb)  315-6319A  315-6213  not populated  2 MaskROM are different from Rev C
342	344	Giga Wing 2                             841-0014C  22270    5 (128Mb)  315-6319A  315-6213  317-5064-COM
343	345	Moero Justice Gakuen / Project Justice  841-0015C  23548A  11 (128Mb)  315-6319A  315-6213  317-5065-COM
344	346	Samba de Amigo Ver.2000                 840-0047C  23600    ? (128Mb)  315-6319A  315-6213  317-0295-COM
r8962	r8963
368	370
369	371	IC1   - 74LVCH16245A (16bit transceiver with direction pin)
370	372	IC2   - XC3S50 Xilinx Spartan FPGA (TQFP144)
371		IC3   - PIC16C621A EPROM-Based 8-Bit CMOS Microcontroller (PDIP18) with internal memory.
	373	IC3   - PIC16C621A EPROM-Based 8-Bit CMOS Microcontroller (PDIP18) with internal memory
372	374	On the end of the number, -JPN means it requires Japanese BIOS, -COM will run with any BIOS
373	375	IC4   - XCF01SVG Xilinx Platform Flash In-System Programmable Configuration PROMS (TSSOP20)
374	376	IC5   - 74LVC08A (Quad 2-input AND gate)
375	377	IC6   - 74LVCH16245A (16bit transceiver with direction pin)
376	378	IC7   - empty socket for EPROM (DIP42), either 27C160 or 27C322
377		IC8-IC15  - S29GL512N FlashROM (TSOP56), 512Mb.
	379	IC8-IC15  - S29GL512N FlashROM (TSOP56), 512Mb. Not all positions are populated
378	380	IC16  - R3112N431A Low voltage detector with output delay (SOT-23-5)
379	381	JP1   - JUMPER Sets the size of the EPROM. 1-2 = 32M, 2-3 = 16M
380	382	JP2   - JUMPER unknown function
r8962	r8963
388	390	Touch De Zunou (Rev A)    840-0166C  unpopulated   2 (512Mb)  XC3S50  317-0435-JPN  XCF01S  IC4# is marked "18"
389	391
390	392
	393
	394	MASK B-F2X (C) Namco 2000
	395	|-------------------------------------------------------------------------------------|
	396	|                                                               ----CN2----            -|
	397	|                                                                                       |
	398	|7        LED1                                                                          |
	399	|                                                                                       |
	400	|6        MA23  MA22  MA21  MA20  MA19  MA18  MA17  MA16  MA15  MA14  MA13  MA12        |
	401	|                                                                                       |
	402	|5                                                                          ISSI        |
	403	|                                                                                       |
	404	|4        MA11  MA10  MA9   MA8   MA7   MA6   MA5   MA4   MA3   MA2   MA1   ISSI        | male side
	405	|                                                                                       |
	406	|3                                            OSC1                                      |
	407	|                                                                                       |
	408	|2       FLASH FLASH FLASH FLASH                    NAOD                                |
	409	|         FL3   FL2   FL1   FL0                     EC1B                                |
	410	|1 J J J                          X76F  NAOD                    SEGA                    |
	411	|  P P P                          100   EC2A                  315-5881                  |
	412	|  3 2 1                                                                                |
	413	|    A     B     C     D     E     F     H     J     K     L     M     N     P     R    |
	414	|             ----CN3----                                       ----CN1----             |
	415	|---------------------------------------------------------------------------------------|
	416	Notes:
	417	The female side of the cart PCB only has traces
	418
	419	JP1 - JUMPER silkscreened   USE - NOT USE
	420	JP2 - JUMPER silkscreened   64M - 128M
	421	JP3 - JUMPER silkscreened BANK0 - BANK1
	422	1F - FLASHROM (SOIC8) Xicor X76F100 Secure SerialFlash. Silkscreened X76F100
	423	1H - NAODEC2A (QFP100) Altera MAX EPM7064S. Silkscreened NAODEC2A
	424	1M - SEGA 315-5581 (QFP100). Probably some kind of FPGA or CPLD. Usually different per game
	425	On the end of the number, -JPN means it requires Japanese BIOS, -COM will run with any BIOS
	426	2B,2C,2D,2F - DA28F640J5 FlashROM (SSOP56), 64Mb. Not all positions are populated. Silkscreened VOYAGER64
	427	Looks like the equivalent of IC11/22 on Sega carts
	428	2K - NAODEC1B (QFP100) Altera MAX EPM7064S. Silkscreened NAODEC1A
	429	3J - oscillator 28.000MHz
	430	4B-4N,6B-6P - MASKROM (TSOP48), 128Mb. Not all positions are populated. Silkscreened MASK128MT
	431	4P,5P - SRAM (SOJ28) 32kx8, ISSI IS61C256AH-15J
	432	CN1/2/3  - connectors joining to main board
	433
	434
	435	Games known to use this PCB include....
	436	Sticker   FL0-FL3    # of SOP48  IC @ 1F        IC @ 1M
	437	Game                              on cart   FLASHROM   FLASHROMs   X76F100        315-5581      Notes
	438	---------------------------------------------------------------------------------------------------------------------------------------
	439	/Shin Nihon Prowrestling                                                                         FL0 & FL1 have pin55 raised from PCB.
	440	\Toukon Retsuden 4 Arcade Edition  25349801   2 (64Mb)  15 (128Mb)  not populated  317-5040-com  They are connected togheter and go to pin89 on 2K.
	441
	442
	443
391	444	Note! Generally, games that require a special I/O board or controller will not boot at all with a
392	445	standard NAOMI I/O board. Usually they display a message saying the I/O board is not acceptable
393	446	or not connected properly.
r8962	r8963
4702	4755	ROM_LOAD("317-5072-com.pic", 0x00, 0x4000, CRC(3238ba01) SHA1(07c28f17c19eaa652295bbf2d3a96aa27c3748ae) )
4703	4756	ROM_END
4704	4757
	4758
4705	4759	ROM_START( cvsgd )
4706	4760	NAOMIGD_BIOS
4707	4761	NAOMI_DEFAULT_EEPROM
r8962	r8963
4719	4773	ROM_END
4720	4774
4721	4775
	4776	ROM_START( starseek )
	4777	NAOMIGD_BIOS
	4778	NAOMI_DEFAULT_EEPROM
	4779
	4780	DISK_REGION( "gdrom" )
	4781	DISK_IMAGE_READONLY( "gdl-0005", 0, SHA1(f5513c88528741798ee49f936b9b69480360f103) )
	4782
	4783	ROM_REGION( 0x50, "picreturn", ROMREGION_ERASE)
	4784
	4785	/*
	4786	Note:
	4787	There was no sticker or silk screen markings on this PIC.
	4788	I have used the product number as a label instead.
	4789
	4790	PIC16C621A-20 (317-0005-JPN)
	4791	Sticker: 253-5509-0005J
	4792	*/
	4793	ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF)
	4794	ROM_LOAD("317-0005-jpn.pic", 0x00, 0x4000, CRC(19f8d4d0) SHA1(d256f26f757d7019cab7950d81992902cdb65e07) )
	4795	ROM_END
	4796
	4797
4722	4798	ROM_START( gundmxgd )
4723	4799	NAOMIGD_BIOS
4724	4800	NAOMI_DEFAULT_EEPROM
r8962	r8963
4752	4828	ROM_LOAD("317-5078-com.pic", 0x00, 0x4000, CRC(e7bb621d) SHA1(0882d0e12ca4fb81dda2268cd12724a10278c220) )
4753	4829	ROM_END
4754	4830
	4831
4755	4832	ROM_START( ikaruga )
4756	4833	NAOMIGD_BIOS
4757	4834	NAOMI_DEFAULT_EEPROM
r8962	r8963
5750	5827	GAME( 2001, sfz3ugd,   naomigd,  naomigd,  naomi,    sfz3ugd, ROT0,   "Capcom",                 "Street Fighter Zero 3 Upper (GDL-0002)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
5751	5828	//GDL-0003
5752	5829	GAME( 2001, cvsgd,     naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Capcom / SNK",           "Capcom Vs. SNK Millenium Fight 2000 Pro (GDL-0004)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
5753		//GDL-0005 Doki Doki Idol Star Seeker
	5830	GAME( 2001, starseek,  naomigd,  naomigd,  naomi,    naomi,   ROT0,   "G-Rev",                  "Doki Doki Idol Star Seeker (GDL-0005)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
5754	5831	GAME( 2001, gundmxgd,  naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Capcom",                 "Mobile Suit Gundam: Federation VS Zeon DX  (GDL-0006)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
5755	5832	//GDL-0007 Capcom Vs. SNK 2
5756	5833	GAME( 2001, cvs2gd,    naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Capcom / SNK",           "Capcom Vs. SNK 2 Millionaire Fighting 2001 (Rev A) (GDL-0007A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )

src/mame/drivers/asteroid.c

r8962	r8963
249	249	AM_RANGE(0x3a00, 0x3a00) AM_DEVWRITE("discrete", asteroid_thump_w)
250	250	AM_RANGE(0x3c00, 0x3c05) AM_DEVWRITE("discrete", asteroid_sounds_w)
251	251	AM_RANGE(0x3e00, 0x3e00) AM_DEVWRITE("discrete", asteroid_noise_reset_w)
252		AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x4000)
	252	AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x4000)
253	253	AM_RANGE(0x5000, 0x57ff) AM_ROM                  /* vector rom */
254	254	AM_RANGE(0x6800, 0x7fff) AM_ROM
255	255	ADDRESS_MAP_END
r8962	r8963
275	275	AM_RANGE(0x3c04, 0x3c04) AM_WRITE(astdelux_bank_switch_w)
276	276	AM_RANGE(0x3c05, 0x3c07) AM_WRITE(astdelux_coin_counter_w)
277	277	AM_RANGE(0x3e00, 0x3e00) AM_DEVWRITE("discrete", asteroid_noise_reset_w)
278		AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x4000)
	278	AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x4000)
279	279	AM_RANGE(0x4800, 0x57ff) AM_ROM                  /* vector rom */
280	280	AM_RANGE(0x6000, 0x7fff) AM_ROM
281	281	ADDRESS_MAP_END
r8962	r8963
293	293	AM_RANGE(0x3400, 0x3400) AM_WRITE(watchdog_reset_w)
294	294	AM_RANGE(0x3c00, 0x3c00) AM_DEVWRITE("discrete", llander_sounds_w)
295	295	AM_RANGE(0x3e00, 0x3e00) AM_DEVWRITE("discrete", llander_snd_reset_w)
296		AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x4000)
	296	AM_RANGE(0x4000, 0x47ff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x4000)
297	297	AM_RANGE(0x4800, 0x5fff) AM_ROM                  /* vector rom */
298	298	AM_RANGE(0x6000, 0x7fff) AM_ROM
299	299	ADDRESS_MAP_END

src/mame/drivers/stv.c

r8962	r8963
239	239	UINT8 abus;
240	240	}stv_irq;
241	241
242		static void dma_direct_lv0(const address_space *space);   /*DMA level 0 direct transfer function*/
243		static void dma_direct_lv1(const address_space *space);   /*DMA level 1 direct transfer function*/
244		static void dma_direct_lv2(const address_space *space);   /*DMA level 2 direct transfer function*/
245		static void dma_indirect_lv0(const address_space *space); /*DMA level 0 indirect transfer function*/
246		static void dma_indirect_lv1(const address_space *space); /*DMA level 1 indirect transfer function*/
247		static void dma_indirect_lv2(const address_space *space); /*DMA level 2 indirect transfer function*/
	242	static void dma_direct_lv0(address_space *space);   /*DMA level 0 direct transfer function*/
	243	static void dma_direct_lv1(address_space *space);   /*DMA level 1 direct transfer function*/
	244	static void dma_direct_lv2(address_space *space);   /*DMA level 2 direct transfer function*/
	245	static void dma_indirect_lv0(address_space *space); /*DMA level 0 indirect transfer function*/
	246	static void dma_indirect_lv1(address_space *space); /*DMA level 1 indirect transfer function*/
	247	static void dma_indirect_lv2(address_space *space); /*DMA level 2 indirect transfer function*/
248	248
249	249
250	250	int minit_boost,sinit_boost;
r8962	r8963
463	463	/*Order is surely wrong but whatever...*/
464	464	}
465	465
466		static UINT8 stv_SMPC_r8 (const address_space *space, int offset)
	466	static UINT8 stv_SMPC_r8 (address_space *space, int offset)
467	467	{
468	468	int return_data;
469	469
r8962	r8963
490	490	return return_data;
491	491	}
492	492
493		static void stv_SMPC_w8 (const address_space *space, int offset, UINT8 data)
	493	static void stv_SMPC_w8 (address_space *space, int offset, UINT8 data)
494	494	{
495	495	system_time systime;
496	496
r8962	r8963
1432	1432	D2MV_0;
1433	1433	}
1434	1434
1435		static void dma_direct_lv0(const address_space *space)
	1435	static void dma_direct_lv0(address_space *space)
1436	1436	{
1437	1437	static UINT32 tmp_src,tmp_dst,tmp_size;
1438	1438	if(LOG_SCU) logerror("DMA lv 0 transfer START\n"
r8962	r8963
1506	1506	for (; scu_size_0 > 0; scu_size_0-=scu_dst_add_0)
1507	1507	{
1508	1508	if(scu_dst_add_0 == 2)
1509		memory_write_word(space,scu_dst_0,memory_read_word(space,scu_src_0));
	1509	space->write_word(scu_dst_0,space->read_word(scu_src_0));
1510	1510	else if(scu_dst_add_0 == 8)
1511	1511	{
1512		memory_write_word(space,scu_dst_0,memory_read_word(space,scu_src_0));
1513		memory_write_word(space,scu_dst_0+2,memory_read_word(space,scu_src_0));
1514		memory_write_word(space,scu_dst_0+4,memory_read_word(space,scu_src_0+2));
1515		memory_write_word(space,scu_dst_0+6,memory_read_word(space,scu_src_0+2));
	1512	space->write_word(scu_dst_0,space->read_word(scu_src_0));
	1513	space->write_word(scu_dst_0+2,space->read_word(scu_src_0));
	1514	space->write_word(scu_dst_0+4,space->read_word(scu_src_0+2));
	1515	space->write_word(scu_dst_0+6,space->read_word(scu_src_0+2));
1516	1516	}
1517	1517	else
1518	1518	{
1519		memory_write_word(space,scu_dst_0,memory_read_word(space,scu_src_0));
1520		memory_write_word(space,scu_dst_0+2,memory_read_word(space,scu_src_0+2));
	1519	space->write_word(scu_dst_0,space->read_word(scu_src_0));
	1520	space->write_word(scu_dst_0+2,space->read_word(scu_src_0+2));
1521	1521	}
1522	1522
1523	1523	scu_dst_0+=scu_dst_add_0;
r8962	r8963
1541	1541	}
1542	1542	}
1543	1543
1544		static void dma_direct_lv1(const address_space *space)
	1544	static void dma_direct_lv1(address_space *space)
1545	1545	{
1546	1546	static UINT32 tmp_src,tmp_dst,tmp_size;
1547	1547	if(LOG_SCU) logerror("DMA lv 1 transfer START\n"
r8962	r8963
1615	1615	for (; scu_size_1 > 0; scu_size_1-=scu_dst_add_1)
1616	1616	{
1617	1617	if(scu_dst_add_1 == 2)
1618		memory_write_word(space,scu_dst_1,memory_read_word(space,scu_src_1));
	1618	space->write_word(scu_dst_1,space->read_word(scu_src_1));
1619	1619	else
1620	1620	{
1621		memory_write_word(space,scu_dst_1,memory_read_word(space,scu_src_1));
1622		memory_write_word(space,scu_dst_1+2,memory_read_word(space,scu_src_1+2));
	1621	space->write_word(scu_dst_1,space->read_word(scu_src_1));
	1622	space->write_word(scu_dst_1+2,space->read_word(scu_src_1+2));
1623	1623	}
1624	1624
1625	1625	scu_dst_1+=scu_dst_add_1;
r8962	r8963
1642	1642	}
1643	1643	}
1644	1644
1645		static void dma_direct_lv2(const address_space *space)
	1645	static void dma_direct_lv2(address_space *space)
1646	1646	{
1647	1647	static UINT32 tmp_src,tmp_dst,tmp_size;
1648	1648	if(LOG_SCU) logerror("DMA lv 2 transfer START\n"
r8962	r8963
1716	1716	for (; scu_size_2 > 0; scu_size_2-=scu_dst_add_2)
1717	1717	{
1718	1718	if(scu_dst_add_2 == 2)
1719		memory_write_word(space,scu_dst_2,memory_read_word(space,scu_src_2));
	1719	space->write_word(scu_dst_2,space->read_word(scu_src_2));
1720	1720	else
1721	1721	{
1722		memory_write_word(space,scu_dst_2,memory_read_word(space,scu_src_2));
1723		memory_write_word(space,scu_dst_2+2,memory_read_word(space,scu_src_2+2));
	1722	space->write_word(scu_dst_2,space->read_word(scu_src_2));
	1723	space->write_word(scu_dst_2+2,space->read_word(scu_src_2+2));
1724	1724	}
1725	1725
1726	1726	scu_dst_2+=scu_dst_add_2;
r8962	r8963
1743	1743	}
1744	1744	}
1745	1745
1746		static void dma_indirect_lv0(const address_space *space)
	1746	static void dma_indirect_lv0(address_space *space)
1747	1747	{
1748	1748	/*Helper to get out of the cycle*/
1749	1749	UINT8 job_done = 0;
r8962	r8963
1760	1760	tmp_src = scu_index_0;
1761	1761
1762	1762	/*Thanks for Runik of Saturnin for pointing this out...*/
1763		scu_size_0 = memory_read_dword(space,scu_index_0);
1764		scu_src_0 =  memory_read_dword(space,scu_index_0+8);
1765		scu_dst_0 =  memory_read_dword(space,scu_index_0+4);
	1763	scu_size_0 = space->read_dword(scu_index_0);
	1764	scu_src_0 =  space->read_dword(scu_index_0+8);
	1765	scu_dst_0 =  space->read_dword(scu_index_0+4);
1766	1766
1767	1767	/*Indirect Mode end factor*/
1768	1768	if(scu_src_0 & 0x80000000)
r8962	r8963
1786	1786	for (; scu_size_0 > 0; scu_size_0-=scu_dst_add_0)
1787	1787	{
1788	1788	if(scu_dst_add_0 == 2)
1789		memory_write_word(space,scu_dst_0,memory_read_word(space,scu_src_0));
	1789	space->write_word(scu_dst_0,space->read_word(scu_src_0));
1790	1790	else
1791	1791	{
1792	1792	/* some games, eg columns97 are a bit weird, I'm not sure this is correct
r8962	r8963
1794	1794	can't access 2 byte boundaries, and the end of the sprite list never gets marked,
1795	1795	the length of the transfer is also set to a 2 byte boundary, maybe the add values
1796	1796	should be different, I don't know */
1797		memory_write_word(space,scu_dst_0,memory_read_word(space,scu_src_0));
1798		memory_write_word(space,scu_dst_0+2,memory_read_word(space,scu_src_0+2));
	1797	space->write_word(scu_dst_0,space->read_word(scu_src_0));
	1798	space->write_word(scu_dst_0+2,space->read_word(scu_src_0+2));
1799	1799	}
1800	1800	scu_dst_0+=scu_dst_add_0;
1801	1801	scu_src_0+=scu_src_add_0;
1802	1802	}
1803	1803
1804		//if(DRUP(0))   memory_write_dword(space,tmp_src+8,scu_src_0|job_done ? 0x80000000 : 0);
1805		//if(DWUP(0)) memory_write_dword(space,tmp_src+4,scu_dst_0);
	1804	//if(DRUP(0))   space->write_dword(tmp_src+8,scu_src_0|job_done ? 0x80000000 : 0);
	1805	//if(DWUP(0)) space->write_dword(tmp_src+4,scu_dst_0);
1806	1806
1807	1807	scu_index_0 = tmp_src+0xc;
1808	1808
r8962	r8963
1811	1811	timer_set(space->machine, ATTOTIME_IN_USEC(300), NULL, 0, dma_lv0_ended);
1812	1812	}
1813	1813
1814		static void dma_indirect_lv1(const address_space *space)
	1814	static void dma_indirect_lv1(address_space *space)
1815	1815	{
1816	1816	/*Helper to get out of the cycle*/
1817	1817	UINT8 job_done = 0;
r8962	r8963
1827	1827	do{
1828	1828	tmp_src = scu_index_1;
1829	1829
1830		scu_size_1 = memory_read_dword(space,scu_index_1);
1831		scu_src_1 =  memory_read_dword(space,scu_index_1+8);
1832		scu_dst_1 =  memory_read_dword(space,scu_index_1+4);
	1830	scu_size_1 = space->read_dword(scu_index_1);
	1831	scu_src_1 =  space->read_dword(scu_index_1+8);
	1832	scu_dst_1 =  space->read_dword(scu_index_1+4);
1833	1833
1834	1834	/*Indirect Mode end factor*/
1835	1835	if(scu_src_1 & 0x80000000)
r8962	r8963
1855	1855	{
1856	1856
1857	1857	if(scu_dst_add_1 == 2)
1858		memory_write_word(space,scu_dst_1,memory_read_word(space,scu_src_1));
	1858	space->write_word(scu_dst_1,space->read_word(scu_src_1));
1859	1859	else
1860	1860	{
1861	1861	/* some games, eg columns97 are a bit weird, I'm not sure this is correct
r8962	r8963
1863	1863	can't access 2 byte boundaries, and the end of the sprite list never gets marked,
1864	1864	the length of the transfer is also set to a 2 byte boundary, maybe the add values
1865	1865	should be different, I don't know */
1866		memory_write_word(space,scu_dst_1,memory_read_word(space,scu_src_1));
1867		memory_write_word(space,scu_dst_1+2,memory_read_word(space,scu_src_1+2));
	1866	space->write_word(scu_dst_1,space->read_word(scu_src_1));
	1867	space->write_word(scu_dst_1+2,space->read_word(scu_src_1+2));
1868	1868	}
1869	1869	scu_dst_1+=scu_dst_add_1;
1870	1870	scu_src_1+=scu_src_add_1;
1871	1871	}
1872	1872
1873		//if(DRUP(1))   memory_write_dword(space,tmp_src+8,scu_src_1|job_done ? 0x80000000 : 0);
1874		//if(DWUP(1)) memory_write_dword(space,tmp_src+4,scu_dst_1);
	1873	//if(DRUP(1))   space->write_dword(tmp_src+8,scu_src_1|job_done ? 0x80000000 : 0);
	1874	//if(DWUP(1)) space->write_dword(tmp_src+4,scu_dst_1);
1875	1875
1876	1876	scu_index_1 = tmp_src+0xc;
1877	1877
r8962	r8963
1880	1880	timer_set(space->machine, ATTOTIME_IN_USEC(300), NULL, 0, dma_lv1_ended);
1881	1881	}
1882	1882
1883		static void dma_indirect_lv2(const address_space *space)
	1883	static void dma_indirect_lv2(address_space *space)
1884	1884	{
1885	1885	/*Helper to get out of the cycle*/
1886	1886	UINT8 job_done = 0;
r8962	r8963
1896	1896	do{
1897	1897	tmp_src = scu_index_2;
1898	1898
1899		scu_size_2 = memory_read_dword(space,scu_index_2);
1900		scu_src_2 =  memory_read_dword(space,scu_index_2+8);
1901		scu_dst_2 =  memory_read_dword(space,scu_index_2+4);
	1899	scu_size_2 = space->read_dword(scu_index_2);
	1900	scu_src_2 =  space->read_dword(scu_index_2+8);
	1901	scu_dst_2 =  space->read_dword(scu_index_2+4);
1902	1902
1903	1903	/*Indirect Mode end factor*/
1904	1904	if(scu_src_2 & 0x80000000)
r8962	r8963
1922	1922	for (; scu_size_2 > 0; scu_size_2-=scu_dst_add_2)
1923	1923	{
1924	1924	if(scu_dst_add_2 == 2)
1925		memory_write_word(space,scu_dst_2,memory_read_word(space,scu_src_2));
	1925	space->write_word(scu_dst_2,space->read_word(scu_src_2));
1926	1926	else
1927	1927	{
1928	1928	/* some games, eg columns97 are a bit weird, I'm not sure this is correct
r8962	r8963
1930	1930	can't access 2 byte boundaries, and the end of the sprite list never gets marked,
1931	1931	the length of the transfer is also set to a 2 byte boundary, maybe the add values
1932	1932	should be different, I don't know */
1933		memory_write_word(space,scu_dst_2,memory_read_word(space,scu_src_2));
1934		memory_write_word(space,scu_dst_2+2,memory_read_word(space,scu_src_2+2));
	1933	space->write_word(scu_dst_2,space->read_word(scu_src_2));
	1934	space->write_word(scu_dst_2+2,space->read_word(scu_src_2+2));
1935	1935	}
1936	1936
1937	1937	scu_dst_2+=scu_dst_add_2;
1938	1938	scu_src_2+=scu_src_add_2;
1939	1939	}
1940	1940
1941		//if(DRUP(2))   memory_write_dword(space,tmp_src+8,scu_src_2|job_done ? 0x80000000 : 0);
1942		//if(DWUP(2)) memory_write_dword(space,tmp_src+4,scu_dst_2);
	1941	//if(DRUP(2))   space->write_dword(tmp_src+8,scu_src_2|job_done ? 0x80000000 : 0);
	1942	//if(DWUP(2)) space->write_dword(tmp_src+4,scu_dst_2);
1943	1943
1944	1944	scu_index_2 = tmp_src+0xc;
1945	1945

src/mame/drivers/vamphalf.c

r8962	r8963
1621	1621	ROM_COPY( "user2", 0x060000, 0x0e0000, 0x020000)
1622	1622	ROM_END
1623	1623
1624		static int irq_active(const address_space *space)
	1624	static int irq_active(address_space *space)
1625	1625	{
1626	1626	UINT32 FCR = cpu_get_reg(space->cpu, 27);
1627	1627	if( !(FCR&(1<<29)) ) // int 2 (irq 4)

src/mame/drivers/raiden.c

r8962	r8963
254	254
255	255	static VIDEO_EOF( raiden )
256	256	{
257		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	257	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
258	258	buffer_spriteram16_w(space,0,0,0xffff); /* Could be a memory location instead */
259	259	}
260	260

src/mame/drivers/galaxia.c

r8962	r8963
25	25
26	26	#include "emu.h"
27	27	#include "video/s2636.h"
	28	#include "sound/s2636.h"
28	29	#include "cpu/s2650/s2650.h"
29	30
30	31	static UINT8 *galaxia_video;
r8962	r8963
235	236	{
236	237	"screen",
237	238	0x100,
238		3, -27
	239	3, -27,
	240	"s2636snd_0"
239	241	};
240	242
241	243	static const s2636_interface s2636_1_config =
242	244	{
243	245	"screen",
244	246	0x100,
245		3, -27
	247	3, -27,
	248	"s2636snd_1"
246	249	};
247	250
248	251	static const s2636_interface s2636_2_config =
249	252	{
250	253	"screen",
251	254	0x100,
252		3, -27
	255	3, -27,
	256	"s2636snd_2"
253	257	};
254	258
255	259	static MACHINE_DRIVER_START( galaxia )
r8962	r8963
275	279	MDRV_S2636_ADD("s2636_2", s2636_2_config)
276	280
277	281	MDRV_VIDEO_UPDATE(galaxia)
	282
	283	MDRV_SPEAKER_STANDARD_MONO("mono")
	284
	285	MDRV_SOUND_ADD("s2636snd_0", S2636, 0)
	286	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
	287
	288	MDRV_SOUND_ADD("s2636snd_1", S2636, 0)
	289	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
	290
	291	MDRV_SOUND_ADD("s2636snd_2", S2636, 0)
	292	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
278	293	MACHINE_DRIVER_END
279	294
280	295	static MACHINE_DRIVER_START( astrowar )
r8962	r8963
334	349	galaxia_color=auto_alloc_array(machine, UINT8, 0x400);
335	350	}
336	351
337		GAME( 1979, galaxia, 0, galaxia, galaxia, galaxia, ROT90, "Zaccaria", "Galaxia", GAME_NOT_WORKING|GAME_NO_SOUND )
338		GAME( 1980, astrowar, 0, astrowar, galaxia, galaxia, ROT90, "Zaccaria", "Astro Wars", GAME_NOT_WORKING|GAME_NO_SOUND|GAME_WRONG_COLORS )
	352	GAME( 1979, galaxia, 0, galaxia, galaxia, galaxia, ROT90, "Zaccaria", "Galaxia", GAME_NOT_WORKING )
	353	GAME( 1980, astrowar, 0, astrowar, galaxia, galaxia, ROT90, "Zaccaria", "Astro Wars", GAME_NOT_WORKING|GAME_WRONG_COLORS )

src/mame/drivers/realbrk.c

r8962	r8963
166	166	AM_RANGE(0x605000, 0x61ffff) AM_RAM                                    //
167	167	AM_RANGE(0x800000, 0x800003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0xff00)   // YMZ280
168	168	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM                                     // RAM
169		AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs   )   // TMP68301 Registers
	169	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(tmp68301_regs_r, tmp68301_regs_w)   // TMP68301 Registers
170	170	ADDRESS_MAP_END
171	171
172	172	/*realbrk specific memory map*/

src/mame/drivers/namcos1.c

r8962	r8963
2530	2530	ROM_LOAD( "sb1_obj0.bin",       0x00000, 0x10000, CRC(ed810da4) SHA1(b3172b50b15d0e2fd40d38d32abf4de22b6f7a85) )
2531	2531	ROM_END
2532	2532
2533
2534		/*
2535		Puzzle Club
2536		Yunsung, 2000
2537
2538		PCB Layout
2539		----------
2540
2541		YS-2113
2542		|----------------------------------------------|
2543		|ROM1.128 ROM2.137 ROM3.7  62256  ROM5.97      |
2544		|  6116 Z80  6295  ROM4.2  62256  ROM6.95      |
2545		|  YMXXXX   16MHz     PAL         ROM7.105     |
2546		|  YM3014             PAL  PAL    ROM8.83      |
2547		|          62256    68000         ROM9.82      |
2548		|          62256           6116     14.38383MHz|
2549		|                          6116   PAL     PAL  |
2550		|J           6116   QL2003        PAL          |
2551		|A           6116                 PAL          |
2552		|M           6116   QL12X16B      PAL          |
2553		|M DIP1      6116                 PAL          |
2554		|A DIP2                                        |
2555		|            62256  QL2003                     |
2556		|            62256                             |
2557		|                                              |
2558		|  ROM11.166  ROM10.167                        |
2559		|                   QL2003        PAL          |
2560		|  ROM13.164  ROM12.165           PAL          |
2561		|----------------------------------------------|
2562		Notes:
2563		68000 clock : 16.000MHz
2564		Z80 clock   : 4.000MHz (16/4)
2565		M6295 clock : 1.000MHz (16/16). Sample Rate = 1000000 / 132
2566		YMXXXX clock: 4.000MHz (16/4). Chip is either YM2151 or YM3812
2567		VSync       : 60Hz
2568		*/
2569
2570	2533	ROM_START( puzlclub )
2571	2534	ROM_REGION( 0x2c000, "audiocpu", 0 )       /* 176k for the sound cpu */
2572	2535	ROM_LOAD( "pc1_s0.bin",         0x0c000, 0x10000, CRC(44737c02) SHA1(bcacfed1c3522d6ecddd3ac79ded620e5334df35) )

src/mame/drivers/toki.c

r8962	r8963
834	834
835	835	/* Decrypt data for z80 program */
836	836	{
837		const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	837	address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
838	838	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x20000);
839	839	UINT8 *rom = memory_region(machine, "audiocpu");
840	840	int i;
841	841
842	842	memcpy(decrypt,rom,0x20000);
843	843
844		memory_set_decrypted_region(space, 0x0000, 0x1fff, decrypt);
	844	space->set_decrypted_region(0x0000, 0x1fff, decrypt);
845	845
846	846	for (i = 0;i < 0x2000;i++)
847	847	{

src/mame/drivers/renegade.c

r8962	r8963
295	295
296	296	static DRIVER_INIT( kuniokunb )
297	297	{
298		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	298	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
299	299
300	300	/* Remove the MCU handlers */
301	301	memory_unmap_readwrite(space, 0x3804, 0x3804, 0, 0);

src/mame/drivers/ertictac.c

r8962	r8963
1		/*********************************************************************
2		Erotictac/Tactic [Sisteme 1992]
3		(title depends on "Sexy Views" DIP)
	1	/*******************************************************************************************
4	2
5		driver by
6		Tomasz Slanina
7		Steve Ellenoff
8		Nicola Salmoria
	3	Erotictac/Tactic (c) 1990 Sisteme
	4	Poizone (c) 1991 Eterna
9	5
10		TODO:
11		- sound
12		my guess:
13		- data (samples?) in mem range 0000-$0680 ($1f00000 - $1f00680)
14		- 4 chn?? ( masks $000000ff, $0000ff00, $00ff0000, $ff000000)
15		- INT7 (bit 1 in IRQRQB) = sound hw 'ready' flag (checked at $56c)
16		- writes to 3600000 - 3ffffff related to snd hardware
	6	Actually an Acorn Archimedes-based Arcade system
17	7
18		- game doesn't work with 'demo sound' disabled
19		- get rid of dirty hack in DRIVER_INIT (bug in the ARM core?)
20		- is screen double buffered ?
21		- flashing text in test mode
	8	original driver by Tomasz Slanina, Steve Ellenoff, Nicola Salmoria
	9	rewrite to use AA functions by R.Belmont & Angelo Salese
	10	special thanks to Tom Walker (author of the Acorn Archimedes Arculator emulator)
22	11
23		Poizone PCB appears to be a Jamam Acorn Archimedes based system,
24		Poizone was also released on the AA computer.
	12	TODO (specific issues only):
	13	- Sound is currently ugly in both games, recognizable but still nowhere near perfection
	14	- ertictac: 'music' dip-sw makes the game to just hang, BGM doesn't play either for
	15	whatever reason (should be triggered as soon as it executes the POST)
	16	- poizone: ARM core bugs causes it to crash at some point.
	17	- Does this Arcade conversion have I2C device? It seems unused afaik.
	18	- Need PCB for identify the exact model of AA, available RAM, what kind of i/o "podule"
	19	it has etc.
25	20
26		- Poizone controls are checked exactly once at bootup, breaking them.
27
28		**********************************************************************/
	21	*******************************************************************************************/
29	22	#include "emu.h"
30	23	#include "cpu/arm/arm.h"
	24	#include "sound/dac.h"
	25	#include "includes/archimds.h"
	26	#include "machine/i2cmem.h"
31	27
32		#define NUM_PENS   (0x100)
33
34		static UINT32 *ertictac_mainram;
35		static UINT32 *ertictac_videoram;
36		static UINT32 IRQSTA, IRQMSKA, IRQMSKB, FIQMSK, T1low, T1high;
37		static UINT32 vidFIFO[256];
38		static pen_t pens[NUM_PENS];
39
40		static WRITE32_HANDLER(video_fifo_w)
	28	static READ32_HANDLER( ertictac_podule_r )
41	29	{
42		vidFIFO[data >> 24] = data & 0xffffff;
43		}
	30	ioc_regs[IRQ_STATUS_B] &= ~ARCHIMEDES_IRQB_PODULE_IRQ;
44	31
45		static READ32_HANDLER(IOCR_r)
46		{
47		return (input_port_read(space->machine, "dummy") & 0x80) | 0x34;
48		}
49
50		static WRITE32_HANDLER(IOCR_w)
51		{
52		//ignored
53		}
54
55
56		static READ32_HANDLER(IRQSTA_r)
57		{
58		return (IRQSTA & (~2)) | 0x80;
59		}
60
61		static READ32_HANDLER(IRQRQA_r)
62		{
63		return (IRQSTA & IRQMSKA) | 0x80;
64		}
65
66		static WRITE32_HANDLER(IRQRQA_w)
67		{
68		if(ACCESSING_BITS_0_7)
69		IRQSTA &= ~data;
70		}
71
72		static READ32_HANDLER(IRQMSKA_r)
73		{
74		return IRQMSKA;
75		}
76
77		static WRITE32_HANDLER(IRQMSKA_w)
78		{
79		if(ACCESSING_BITS_0_7)
80		IRQMSKA = (data & (~2)) | 0x80;
81		}
82
83		static READ32_HANDLER(IRQRQB_r)
84		{
85		return mame_rand(space->machine) & IRQMSKB; /* hack  0x20 - controls,  0x02 - ?sound? */
86		}
87
88		static READ32_HANDLER(IRQMSKB_r)
89		{
90		return IRQMSKB;
91		}
92
93		static WRITE32_HANDLER(IRQMSKB_w)
94		{
95		if(ACCESSING_BITS_0_7)
96		IRQMSKB = data;
97		}
98
99		static READ32_HANDLER(FIQMSK_r)
100		{
101		return FIQMSK;
102		}
103
104		static WRITE32_HANDLER(FIQMSK_w)
105		{
106		if(ACCESSING_BITS_0_7)
107		FIQMSK = (data & (~0x2c)) | 0x80;
108		}
109
110		static READ32_HANDLER(T1low_r)
111		{
112		return T1low;
113		}
114
115		static WRITE32_HANDLER(T1low_w)
116		{
117		if(ACCESSING_BITS_0_7)
118		T1low = data;
119		}
120
121		static READ32_HANDLER(T1high_r)
122		{
123		return T1high;
124		}
125
126		static WRITE32_HANDLER(T1high_w)
127		{
128		if(ACCESSING_BITS_0_7)
129		T1high = data;
130		}
131
132		static void startTimer(running_machine *machine);
133
134		static TIMER_CALLBACK( ertictacTimer )
135		{
136		IRQSTA |= 0x40;
137		if(IRQMSKA & 0x40)
	32	switch(offset)
138	33	{
139		cputag_set_input_line(machine, "maincpu", ARM_IRQ_LINE, HOLD_LINE);
	34	case 0x04/4: return input_port_read(space->machine, "DSW1") & 0xff;
	35	case 0x08/4: return input_port_read(space->machine, "DSW2") & 0xff;
	36	case 0x10/4: return input_port_read(space->machine, "SYSTEM") & 0xff;
	37	case 0x14/4: return input_port_read(space->machine, "P2") & 0xff;
	38	case 0x18/4: return input_port_read(space->machine, "P1") & 0xff;
140	39	}
141		startTimer(machine);
142		}
143	40
144		static void startTimer(running_machine *machine)
145		{
146		timer_set(machine, ATTOTIME_IN_USEC(((T1low & 0xff) | ((T1high & 0xff) << 8)) >> 4), NULL, 0, ertictacTimer);
	41	return 0;
147	42	}
148	43
149		static WRITE32_HANDLER(T1GO_w)
150		{
151		startTimer(space->machine);
152		}
153
154	44	static ADDRESS_MAP_START( ertictac_map, ADDRESS_SPACE_PROGRAM, 32 )
155		AM_RANGE(0x00000000, 0x0007ffff) AM_RAM AM_BASE (&ertictac_mainram)
156		AM_RANGE(0x01f00000, 0x01ffffff) AM_RAM AM_BASE (&ertictac_videoram)
157		AM_RANGE(0x03200000, 0x03200003) AM_READWRITE(IOCR_r, IOCR_w)
158		AM_RANGE(0x03200010, 0x03200013) AM_READ(IRQSTA_r)
159		AM_RANGE(0x03200014, 0x03200017) AM_READWRITE(IRQRQA_r, IRQRQA_w)
160		AM_RANGE(0x03200018, 0x0320001b) AM_READWRITE(IRQMSKA_r, IRQMSKA_w)
161		AM_RANGE(0x03200024, 0x03200027) AM_READ(IRQRQB_r)
162		AM_RANGE(0x03200028, 0x0320002b) AM_READWRITE(IRQMSKB_r, IRQMSKB_w)
163		AM_RANGE(0x03200038, 0x0320003b) AM_READWRITE(FIQMSK_r, FIQMSK_w)
	45	AM_RANGE(0x00000000, 0x01ffffff) AM_READWRITE(archimedes_memc_logical_r, archimedes_memc_logical_w)
	46	AM_RANGE(0x02000000, 0x02ffffff) AM_RAM AM_BASE(&archimedes_memc_physmem) /* physical RAM - 16 MB for now, should be 512k for the A310 */
164	47
165		AM_RANGE(0x03200050, 0x03200053) AM_READWRITE(T1low_r, T1low_w)
166		AM_RANGE(0x03200054, 0x03200057) AM_READWRITE(T1high_r, T1high_w)
167		AM_RANGE(0x03200058, 0x0320005b) AM_WRITE( T1GO_w )
	48	AM_RANGE(0x03340000, 0x0334001f) AM_READ(ertictac_podule_r)
	49	AM_RANGE(0x033c0000, 0x033c001f) AM_READ(ertictac_podule_r)
168	50
169		AM_RANGE(0x03340000, 0x03340003) AM_NOP
170		AM_RANGE(0x03340010, 0x03340013) AM_READ_PORT("SYSTEM")
171		AM_RANGE(0x03340014, 0x03340017) AM_READ_PORT("P2")
172		AM_RANGE(0x03340018, 0x0334001b) AM_READ_PORT("P1")
173
174		AM_RANGE(0x033c0004, 0x033c0007) AM_READ_PORT("DSW1")
175		AM_RANGE(0x033c0008, 0x033c000b) AM_READ_PORT("DSW2")
176		AM_RANGE(0x033c0010, 0x033c0013) AM_READ_PORT("SYSTEM")
177		AM_RANGE(0x033c0014, 0x033c0017) AM_READ_PORT("P2")
178		AM_RANGE(0x033c0018, 0x033c001b) AM_READ_PORT("P1")
179
180		AM_RANGE(0x03400000, 0x03400003) AM_WRITE(video_fifo_w)
181		AM_RANGE(0x03800000, 0x03ffffff) AM_ROM AM_REGION("user1", 0)
	51	AM_RANGE(0x03000000, 0x033fffff) AM_READWRITE(archimedes_ioc_r, archimedes_ioc_w)
	52	AM_RANGE(0x03400000, 0x035fffff) AM_READWRITE(archimedes_vidc_r, archimedes_vidc_w)
	53	AM_RANGE(0x03600000, 0x037fffff) AM_READWRITE(archimedes_memc_r, archimedes_memc_w)
	54	AM_RANGE(0x03800000, 0x03ffffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITE(archimedes_memc_page_w)
182	55	ADDRESS_MAP_END
183	56
184	57	static INPUT_PORTS_START( ertictac )
r8962	r8963
194	67	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
195	68	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
196	69	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
	70	PORT_BIT( 0x00c4, IP_ACTIVE_LOW, IPT_UNUSED )
197	71
198	72	PORT_START("P2")
199	73	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
r8962	r8963
201	75	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
202	76	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
203	77	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
	78	PORT_BIT( 0x00c4, IP_ACTIVE_LOW, IPT_UNUSED )
204	79
205	80	PORT_START("DSW1")
206	81	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Language ) )
r8962	r8963
247	122	PORT_DIPSETTING(    0x20, DEF_STR( No ) )
248	123	PORT_DIPSETTING(    0x00, DEF_STR( Yes ) )
249	124
250		PORT_START("dummy")
251		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
	125	PORT_DIPNAME( 0x40, 0x40, "2-7" )
	126	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	127	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	128	PORT_DIPNAME( 0x80, 0x80, "2-8" )
	129	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	130	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
252	131	INPUT_PORTS_END
253	132
254	133	static INPUT_PORTS_START( poizone )
255		PORT_START("SYSTEM")
256		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START2 )
257		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 )
258		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
259		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
	134	PORT_INCLUDE( ertictac )
260	135
261		PORT_START("P1")
262		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
263		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
264		PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
265		PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
266		PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
267
268		PORT_START("P2")
269		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
270		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
271		PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
272		PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
273		PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
274
275		PORT_START("DSW1")
276		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Language ) ) // 01
277		PORT_DIPSETTING(    0x01, DEF_STR( English ) )
278		PORT_DIPSETTING(    0x00, DEF_STR( French ) )
	136	PORT_MODIFY("DSW1")
	137	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Language ) ) // 01
	138	PORT_DIPSETTING(    0x00, DEF_STR( English ) )
	139	PORT_DIPSETTING(    0x01, DEF_STR( French ) )
279	140	PORT_DIPNAME( 0x02, 0x02, "1-2" ) // 02
280	141	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
281	142	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
282	143	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Service_Mode ) ) // 04
283	144	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
284	145	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
285		PORT_DIPNAME( 0x08, 0x00, "Demo Sound" ) // 08
286		PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
287		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	146	PORT_DIPNAME( 0x08, 0x08, "Demo Sound" ) // 08
	147	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	148	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
288	149	PORT_DIPNAME( 0x30, 0x40, "Coinage 1 (1-5, 1-6)" ) // 10 20
289	150	PORT_DIPSETTING(   0x30, DEF_STR( 4C_1C ) )
290	151	PORT_DIPSETTING(   0x10, DEF_STR( 3C_1C ) )
r8962	r8963
296	157	PORT_DIPSETTING(   0x40, DEF_STR( 1C_3C ) )
297	158	PORT_DIPSETTING(   0xC0, DEF_STR( 1C_4C ) )
298	159
299		PORT_START("DSW2") /* DSW 2 doesn't work, may not be hooked up properly */
300		//  PORT_DIPNAME( 0x01, 0x01, "2-1" )
301		//  PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
302		//  PORT_DIPSETTING(    0x00, DEF_STR( On ) )
303		//  PORT_DIPNAME( 0x01, 0x02, "2-2" )
304		//  PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
305		//  PORT_DIPSETTING(    0x00, DEF_STR( On ) )
306		//  PORT_DIPNAME( 0x01, 0x04, "2-3" )
307		//  PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
308		//  PORT_DIPSETTING(    0x00, DEF_STR( On ) )
309		//  PORT_DIPNAME( 0x01, 0x08, "2-4" )
310		//  PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
311		//  PORT_DIPSETTING(    0x00, DEF_STR( On ) )
312		//  PORT_DIPNAME( 0x01, 0x10, "2-5" )
313		//  PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
314		//  PORT_DIPSETTING(    0x00, DEF_STR( On ) )
315		//  PORT_DIPNAME( 0x01, 0x20, "2-6" )
316		//  PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
317		//  PORT_DIPSETTING(    0x00, DEF_STR( On ) )
318		//  PORT_DIPNAME( 0x01, 0x40, "2-7" )
319		//  PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
320		//  PORT_DIPSETTING(    0x00, DEF_STR( On ) )
321		//  PORT_DIPNAME( 0x01, 0x80, "2-8" )
322		//  PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
323		//  PORT_DIPSETTING(    0x00, DEF_STR( On ) )
324
325
326		PORT_START("dummy")
327		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
	160	PORT_MODIFY("DSW2") /* TODO: uses conditional dip-switches */
	161	PORT_DIPNAME( 0x01, 0x01, "2-1" )
	162	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	163	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	164	PORT_DIPNAME( 0x02, 0x02, "2-2" )
	165	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	166	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	167	PORT_DIPNAME( 0x04, 0x04, "2-3" )
	168	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	169	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	170	PORT_DIPNAME( 0x08, 0x08, "2-4" )
	171	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	172	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	173	PORT_DIPNAME( 0x10, 0x10, "2-5" )
	174	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	175	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	176	PORT_DIPNAME( 0x20, 0x20, "2-6" )
	177	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	178	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	179	PORT_DIPNAME( 0x40, 0x40, "2-7" )
	180	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	181	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	182	PORT_DIPNAME( 0x80, 0x80, "2-8" )
	183	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	184	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
328	185	INPUT_PORTS_END
329	186
330		static MACHINE_RESET( ertictac )
	187	static DRIVER_INIT( ertictac)
331	188	{
332		ertictac_mainram[0]=0xeae00007; //reset vector
	189	archimedes_driver_init(machine);
333	190	}
334	191
335		static INTERRUPT_GEN( ertictac_interrupt )
	192	static MACHINE_START( ertictac )
336	193	{
337		IRQSTA|=0x08;
338		if(IRQMSKA&0x08)
339		{
340		cpu_set_input_line(device, ARM_IRQ_LINE, HOLD_LINE);
341		}
	194	archimedes_init(machine);
	195
	196	// reset the DAC to centerline
	197	//dac_signed_data_w(machine->device("dac"), 0x80);
342	198	}
343	199
344
345		static VIDEO_START( ertictac )
	200	static MACHINE_RESET( ertictac )
346	201	{
347		int color;
348
349		for (color = 0; color < NUM_PENS; color++)
350		{
351		UINT8 i = color & 0x03;
352		UINT8 r = ((color & 0x04) >> 0) | ((color & 0x10) >> 1) | i;
353		UINT8 g = ((color & 0x20) >> 3) | ((color & 0x40) >> 3) | i;
354		UINT8 b = ((color & 0x08) >> 1) | ((color & 0x80) >> 4) | i;
355
356		pens[color] = MAKE_RGB(pal4bit(r), pal4bit(g), pal4bit(b));
357		}
	202	archimedes_reset(machine);
358	203	}
359	204
360
361		static VIDEO_UPDATE( ertictac )
	205	static INTERRUPT_GEN( ertictac_podule_irq )
362	206	{
363		int y, x;
364
365		for (y = cliprect->min_y; y <= cliprect->max_y; y++)
366		for (x = 0; x < 0x140; x += 4)
367		{
368		offs_t offs = (y * 0x50) + (x >> 2) + (vidFIFO[0x88] >> 2);
369
370		*BITMAP_ADDR32(bitmap, y, x + 0) = pens[(ertictac_videoram[offs] >>  0) & 0xff];
371		*BITMAP_ADDR32(bitmap, y, x + 1) = pens[(ertictac_videoram[offs] >>  8) & 0xff];
372		*BITMAP_ADDR32(bitmap, y, x + 2) = pens[(ertictac_videoram[offs] >> 16) & 0xff];
373		*BITMAP_ADDR32(bitmap, y, x + 3) = pens[(ertictac_videoram[offs] >> 24) & 0xff];
374		}
375
376		return 0;
	207	archimedes_request_irq_b(device->machine, ARCHIMEDES_IRQB_PODULE_IRQ);
377	208	}
378	209
	210	/* TODO: Are we sure that this HW have I2C device? */
	211	#define   NVRAM_SIZE 256
	212	#define   NVRAM_PAGE_SIZE   0   /* max size of one write request */
379	213
	214	static const i2cmem_interface i2cmem_interface =
	215	{
	216	I2CMEM_SLAVE_ADDRESS, NVRAM_PAGE_SIZE, NVRAM_SIZE
	217	};
	218
380	219	static MACHINE_DRIVER_START( ertictac )
381	220
382		MDRV_CPU_ADD("maincpu", ARM, 16000000) /* guess */
	221	MDRV_CPU_ADD("maincpu", ARM, 8000000) /* guess */
383	222	MDRV_CPU_PROGRAM_MAP(ertictac_map)
384		MDRV_CPU_VBLANK_INT("screen", ertictac_interrupt)
	223	MDRV_CPU_PERIODIC_INT(ertictac_podule_irq,60) // FIXME: timing of this
385	224
	225	MDRV_MACHINE_START(ertictac)
386	226	MDRV_MACHINE_RESET(ertictac)
387	227
	228	MDRV_I2CMEM_ADD("i2cmem",i2cmem_interface)
388	229
389	230	MDRV_SCREEN_ADD("screen", RASTER)
390	231	MDRV_SCREEN_REFRESH_RATE(60)
391	232	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
392	233	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
393		MDRV_SCREEN_SIZE(320, 256)
394		MDRV_SCREEN_VISIBLE_AREA(0, 319, 0, 255)
	234	MDRV_SCREEN_SIZE(1280, 1024)
	235	MDRV_SCREEN_VISIBLE_AREA(0, 1280-1, 0, 1024-1)
395	236
396		MDRV_VIDEO_START(ertictac)
397		MDRV_VIDEO_UPDATE(ertictac)
	237	MDRV_PALETTE_LENGTH(0x200)
	238
	239	MDRV_VIDEO_START(archimds_vidc)
	240	MDRV_VIDEO_UPDATE(archimds_vidc)
	241
	242	MDRV_SPEAKER_STANDARD_MONO("mono")
	243	MDRV_SOUND_ADD("dac0", DAC, 0)
	244	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	245
	246	MDRV_SOUND_ADD("dac1", DAC, 0)
	247	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	248
	249	MDRV_SOUND_ADD("dac2", DAC, 0)
	250	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	251
	252	MDRV_SOUND_ADD("dac3", DAC, 0)
	253	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	254
	255	MDRV_SOUND_ADD("dac4", DAC, 0)
	256	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	257
	258	MDRV_SOUND_ADD("dac5", DAC, 0)
	259	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	260
	261	MDRV_SOUND_ADD("dac6", DAC, 0)
	262	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	263
	264	MDRV_SOUND_ADD("dac7", DAC, 0)
	265	MDRV_SOUND_ROUTE(0, "mono", 0.10)
398	266	MACHINE_DRIVER_END
399	267
400	268	ROM_START( ertictac )
401		ROM_REGION(0x800000, "user1", 0 )
	269	ROM_REGION(0x800000, "maincpu", 0 )
402	270	ROM_LOAD32_BYTE( "01", 0x00000, 0x10000, CRC(8dce677c) SHA1(9f12b1febe796038caa1ecad1d17864dc546cfd8) )
403	271	ROM_LOAD32_BYTE( "02", 0x00001, 0x10000, CRC(7c5c916c) SHA1(d4ed5fc3a7b27253551e7d9176ed9e6513092e60) )
404	272	ROM_LOAD32_BYTE( "03", 0x00002, 0x10000, CRC(edca5ac6) SHA1(f6c4b8030f3c1c93922c5f7232f2159e0471b93a) )
r8962	r8963
415	283	ROM_LOAD32_BYTE( "14", 0xc0001, 0x10000, CRC(3029567c) SHA1(6d49bea3a3f6f11f4182a602d37b53f1f896c154) )
416	284	ROM_LOAD32_BYTE( "15", 0xc0002, 0x10000, CRC(500997ab) SHA1(028c7b3ca03141e5b596ab1e2ab98d0ccd9bf93a) )
417	285	ROM_LOAD32_BYTE( "16", 0xc0003, 0x10000, CRC(70a8d136) SHA1(50b11f5701ed5b79a5d59c9a3c7d5b7528e66a4d) )
	286
	287	ROM_REGION(0x200000, "vram", ROMREGION_ERASE00)
418	288	ROM_END
419	289
420	290	ROM_START( poizone )
421		ROM_REGION(0x800000, "user1", 0 )
	291	ROM_REGION(0x800000, "maincpu", 0 )
422	292	ROM_LOAD32_BYTE( "p_son01.bin", 0x00000, 0x10000, CRC(28793c9f) SHA1(2d9f7d667203e745b47cd2cc97501ae961ae1a66) )
423	293	ROM_LOAD32_BYTE( "p_son02.bin", 0x00001, 0x10000, CRC(2d4b6f4b) SHA1(8df2680d6e5dc41787b3a72e594f01f5e732d0ec) )
424	294	ROM_LOAD32_BYTE( "p_son03.bin", 0x00002, 0x10000, CRC(0834d46e) SHA1(bf1cc9b47759ef39ed8fd8f334ed8f2902be3bf8) )
r8962	r8963
436	306	ROM_LOAD32_BYTE( "p_son22.bin", 0x140001, 0x10000, CRC(16f0bb52) SHA1(893ab1e72b84de7a38f88f9d713769968ebd4553) )
437	307	ROM_LOAD32_BYTE( "p_son23.bin", 0x140002, 0x10000, CRC(e9c118b2) SHA1(110d9a204e701b9b54d89f027f8892c3f3a819c7) )
438	308	ROM_LOAD32_BYTE( "p_son24.bin", 0x140003, 0x10000, CRC(a09d7f55) SHA1(e0d562c655c16034b40db93de801b98b7948beb2) )
	309
	310	ROM_REGION(0x200000, "vram", ROMREGION_ERASE00)
439	311	ROM_END
440	312
441		GAME( 1990, ertictac, 0, ertictac, ertictac, 0, ROT0, "Sisteme", "Erotictac/Tactic" ,GAME_NO_SOUND)
442		GAME( 1991, poizone,  0, ertictac, poizone, 0,  ROT0, "Eterna" ,"Poizone" ,GAME_NO_SOUND|GAME_NOT_WORKING)
	313	GAME( 1990, ertictac, 0, ertictac, ertictac, ertictac, ROT0, "Sisteme", "Erotictac/Tactic" ,GAME_IMPERFECT_SOUND)
	314	GAME( 1991, poizone,  0, ertictac, poizone, ertictac,  ROT0, "Eterna" ,"Poizone" ,GAME_IMPERFECT_SOUND|GAME_NOT_WORKING)
443	315

src/mame/drivers/atarisy4.c

r8962	r8963
776	776	return in;
777	777	}
778	778
779		void load_ldafile(const address_space *space, const UINT8 *file)
	779	void load_ldafile(address_space *space, const UINT8 *file)
780	780	{
781	781	#define READ_CHAR()      file[i++]
782	782	int i = 0;
r8962	r8963
819	819	{
820	820	UINT8 data = READ_CHAR();
821	821	sum += data;
822		memory_write_byte(space, addr++, data);
	822	space->write_byte(addr++, data);
823	823	} while (--len);
824	824
825	825	sum += READ_CHAR();
r8962	r8963
830	830	}
831	831
832	832	/* Load memory space with data from a Tektronix-Extended HEX file */
833		void load_hexfile(const address_space *space, const UINT8 *file)
	833	void load_hexfile(address_space *space, const UINT8 *file)
834	834	{
835	835	#define READ_HEX_CHAR()      hex_to_ascii(file[i++])
836	836
r8962	r8963
914	914	sum += data & 0xf;
915	915
916	916	if (record == 6)
917		memory_write_byte(space, addr++, data);
	917	space->write_byte(addr++, data);
918	918
919	919	len -= 2;
920	920	}
r8962	r8963
935	935
936	936	static DRIVER_INIT( laststar )
937	937	{
938		const address_space *main = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	938	address_space *main = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
939	939
940	940	/* Allocate 16kB of shared RAM */
941	941	shared_ram[0] = auto_alloc_array_clear(machine, UINT16, 0x2000);

src/mame/drivers/wardner.c

r8962	r8963
140	140	if (wardner_membank != data) {
141	141	int bankaddress = 0;
142	142
143		const address_space *mainspace;
	143	address_space *mainspace;
144	144	UINT8 *RAM = memory_region(space->machine, "maincpu");
145	145
146	146	mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
r8962	r8963
178	178
179	179	STATE_POSTLOAD( wardner_restore_bank )
180	180	{
181		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	181	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
182	182
183	183	wardner_ramrom_bank_sw(space,0,1);   /* Dummy value to ensure restoration */
184	184	wardner_ramrom_bank_sw(space,0,wardner_membank);

src/mame/drivers/missile.c

r8962	r8963
445	445	}
446	446
447	447
448		static DIRECT_UPDATE_HANDLER( missile_direct_handler )
	448	DIRECT_UPDATE_HANDLER( missile_direct_handler )
449	449	{
450	450	/* offset accounts for lack of A15 decoding */
451	451	int offset = address & 0x8000;
r8962	r8963
454	454	/* RAM? */
455	455	if (address < 0x4000)
456	456	{
457		direct->raw = direct->decrypted = space->machine->generic.videoram.u8 - offset;
	457	direct.explicit_configure(0x0000 | offset, 0x3fff | offset, 0x3fff, direct.space().m_machine.generic.videoram.u8);
458	458	return ~0;
459	459	}
460	460
461	461	/* ROM? */
462	462	else if (address >= 0x5000)
463	463	{
464		direct->raw = direct->decrypted = memory_region(space->machine, "maincpu") - offset;
	464	direct.explicit_configure(0x5000 | offset, 0x7fff | offset, 0x7fff, direct.space().m_machine.region("maincpu")->base() + 0x5000);
465	465	return ~0;
466	466	}
467	467
r8962	r8963
477	477	flipscreen = 0;
478	478
479	479	/* set up an opcode base handler since we use mapped handlers for RAM */
480		memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), missile_direct_handler);
	480	address_space *space = machine->device<m6502_device>("maincpu")->space(AS_PROGRAM);
	481	space->set_direct_update_handler(direct_update_delegate_create_static(missile_direct_handler, *machine));
481	482
482	483	/* create a timer to speed/slow the CPU */
483	484	cpu_timer = timer_alloc(machine, adjust_cpu_speed, NULL);
r8962	r8963
511	512	*
512	513	*************************************/
513	514
514		INLINE int get_madsel(const address_space *space)
	515	INLINE int get_madsel(address_space *space)
515	516	{
516	517	UINT16 pc = cpu_get_previouspc(space->cpu);
517	518
r8962	r8963
522	523	/* MADSEL signal disables standard address decoding and routes
523	524	writes to video RAM; it is enabled if the IRQ signal is clear
524	525	and the low 5 bits of the fetched opcode are 0x01 */
525		if (!irq_state && (memory_decrypted_read_byte(space, pc) & 0x1f) == 0x01)
	526	if (!irq_state && (space->direct().read_decrypted_byte(pc) & 0x1f) == 0x01)
526	527	{
527	528	/* the MADSEL signal goes high 5 cycles after the opcode is identified;
528	529	this effectively skips the indirect memory read. Since this is difficult
r8962	r8963
548	549	}
549	550
550	551
551		static void write_vram(const address_space *space, offs_t address, UINT8 data)
	552	static void write_vram(address_space *space, offs_t address, UINT8 data)
552	553	{
553	554	static const UINT8 data_lookup[4] = { 0x00, 0x0f, 0xf0, 0xff };
554	555	offs_t vramaddr;
r8962	r8963
578	579	}
579	580
580	581
581		static UINT8 read_vram(const address_space *space, offs_t address)
	582	static UINT8 read_vram(address_space *space, offs_t address)
582	583	{
583	584	offs_t vramaddr;
584	585	UINT8 vramdata;

src/mame/drivers/jack.c

r8962	r8963
1312	1312	static void treahunt_decode( running_machine *machine )
1313	1313	{
1314	1314	int A;
1315		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1315	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1316	1316	UINT8 *rom = memory_region(machine, "maincpu");
1317	1317	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x4000);
1318	1318	int data;
1319	1319
1320		memory_set_decrypted_region(space, 0x0000, 0x3fff, decrypt);
	1320	space->set_decrypted_region(0x0000, 0x3fff, decrypt);
1321	1321
1322	1322	/* Thanks to Mike Balfour for helping out with the decryption */
1323	1323	for (A = 0; A < 0x4000; A++)

src/mame/drivers/snk6502.c

r8962	r8963
283	283
284	284
285	285	/* binary counter (1.4MHz update) */
286		static UINT8 sasuke_counter;
287
288	286	static TIMER_DEVICE_CALLBACK( sasuke_update_counter )
289	287	{
290		sasuke_counter += 0x10;
	288	snk6502_state *state = timer.machine->driver_data<snk6502_state>();
	289
	290	state->sasuke_counter += 0x10;
291	291	}
292	292
293	293	static void sasuke_start_counter(running_machine *machine)
294	294	{
295		sasuke_counter = 0;
	295	snk6502_state *state = machine->driver_data<snk6502_state>();
	296
	297	state->sasuke_counter = 0;
296	298	}
297	299
298	300
r8962	r8963
304	306
305	307	static CUSTOM_INPUT( snk6502_music0_r )
306	308	{
307		return (snk6502_music0_playing() ? 0x01 : 0x00);
	309	return (snk6502_music0_playing(field->port->machine) ? 0x01 : 0x00);
308	310	}
309	311
310	312	static CUSTOM_INPUT( sasuke_count_r )
311	313	{
312		return (sasuke_counter >> 4);
	314	snk6502_state *state = field->port->machine->driver_data<snk6502_state>();
	315
	316	return (state->sasuke_counter >> 4);
313	317	}
314	318
315	319
r8962	r8963
321	325
322	326	static ADDRESS_MAP_START( sasuke_map, ADDRESS_SPACE_PROGRAM, 8 )
323	327	AM_RANGE(0x0000, 0x03ff) AM_RAM
324		AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
325		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
326		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
327		AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
	328	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE_MEMBER(snk6502_state, videoram2)
	329	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_MEMBER(snk6502_state, videoram)
	330	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_MEMBER(snk6502_state, colorram)
	331	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE_MEMBER(snk6502_state, charram)
328	332	AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("crtc", mc6845_address_w)
329	333	AM_RANGE(0x3001, 0x3001) AM_DEVWRITE("crtc", mc6845_register_w)
330	334	AM_RANGE(0x4000, 0x8fff) AM_ROM
r8962	r8963
340	344
341	345	static ADDRESS_MAP_START( satansat_map, ADDRESS_SPACE_PROGRAM, 8 )
342	346	AM_RANGE(0x0000, 0x03ff) AM_RAM
343		AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
344		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
345		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
346		AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
	347	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE_MEMBER(snk6502_state, videoram2)
	348	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_MEMBER(snk6502_state, videoram)
	349	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_MEMBER(snk6502_state, colorram)
	350	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE_MEMBER(snk6502_state, charram)
347	351	AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("crtc", mc6845_address_w)
348	352	AM_RANGE(0x3001, 0x3001) AM_DEVWRITE("crtc", mc6845_register_w)
349	353	AM_RANGE(0x4000, 0x97ff) AM_ROM
r8962	r8963
359	363
360	364	static ADDRESS_MAP_START( vanguard_map, ADDRESS_SPACE_PROGRAM, 8 )
361	365	AM_RANGE(0x0000, 0x03ff) AM_RAM
362		AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
363		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
364		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
365		AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
	366	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE_MEMBER(snk6502_state, videoram2)
	367	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_MEMBER(snk6502_state, videoram)
	368	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_MEMBER(snk6502_state, colorram)
	369	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE_MEMBER(snk6502_state, charram)
366	370	AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("crtc", mc6845_address_w)
367	371	AM_RANGE(0x3001, 0x3001) AM_DEVWRITE("crtc", mc6845_register_w)
368	372	AM_RANGE(0x3100, 0x3102) AM_WRITE(vanguard_sound_w)
r8962	r8963
380	384
381	385	static ADDRESS_MAP_START( fantasy_map, ADDRESS_SPACE_PROGRAM, 8 )
382	386	AM_RANGE(0x0000, 0x03ff) AM_RAM
383		AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
384		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
385		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
386		AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
	387	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE_MEMBER(snk6502_state, videoram2)
	388	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_MEMBER(snk6502_state, videoram)
	389	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_MEMBER(snk6502_state, colorram)
	390	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE_MEMBER(snk6502_state, charram)
387	391	AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("crtc", mc6845_address_w)
388	392	AM_RANGE(0x2001, 0x2001) AM_DEVWRITE("crtc", mc6845_register_w)
389	393	AM_RANGE(0x2100, 0x2103) AM_WRITE(fantasy_sound_w)
r8962	r8963
400	404
401	405	static ADDRESS_MAP_START( pballoon_map, ADDRESS_SPACE_PROGRAM, 8 )
402	406	AM_RANGE(0x0000, 0x03ff) AM_RAM
403		AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
404		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
405		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
406		AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
	407	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE_MEMBER(snk6502_state, videoram2)
	408	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_MEMBER(snk6502_state, videoram)
	409	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_MEMBER(snk6502_state, colorram)
	410	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE_MEMBER(snk6502_state, charram)
407	411	AM_RANGE(0x3000, 0x9fff) AM_ROM
408	412	AM_RANGE(0xb000, 0xb000) AM_DEVWRITE("crtc", mc6845_address_w)
409	413	AM_RANGE(0xb001, 0xb001) AM_DEVWRITE("crtc", mc6845_register_w)
r8962	r8963
780	784
781	785	static MACHINE_RESET( sasuke )
782	786	{
783		//snk6502_set_music_clock(M_LN2 * (RES_K(1) + RES_K(10) * 2) * CAP_U(1));
	787	//snk6502_set_music_clock(machine, M_LN2 * (RES_K(1) + RES_K(10) * 2) * CAP_U(1));
784	788	// adjusted
785		snk6502_set_music_clock(1 / 72.1);
	789	snk6502_set_music_clock(machine, 1 / 72.1);
786	790
787	791	// adjusted
788		snk6502_set_music_freq(38000);
	792	snk6502_set_music_freq(machine, 38000);
789	793
790	794	sasuke_start_counter(machine);
791	795	}
r8962	r8963
793	797	static MACHINE_RESET( satansat )
794	798	{
795	799	// same as sasuke
796		snk6502_set_music_freq(38000);
	800	snk6502_set_music_freq(machine, 38000);
797	801
798	802	sasuke_start_counter(machine);
799	803	}
r8962	r8963
801	805	static MACHINE_RESET( vanguard )
802	806	{
803	807	// 41.6 Hz update (measured)
804		snk6502_set_music_clock(1 / 41.6);
	808	snk6502_set_music_clock(machine, 1 / 41.6);
805	809	}
806	810
807	811	static MACHINE_RESET( pballoon )
808	812	{
809	813	// 40.3 Hz update (measured)
810		snk6502_set_music_clock(1 / 40.3);
	814	snk6502_set_music_clock(machine, 1 / 40.3);
811	815	}
812	816
813	817
r8962	r8963
818	822	*************************************/
819	823
820	824	static MACHINE_DRIVER_START( sasuke )
	825
	826	MDRV_DRIVER_DATA( snk6502_state )
	827
821	828	// basic machine hardware
822	829	MDRV_CPU_ADD("maincpu", M6502, MASTER_CLOCK / 16) // 700 kHz
823	830	MDRV_CPU_PROGRAM_MAP(sasuke_map)
r8962	r8963
893	900	MACHINE_DRIVER_END
894	901
895	902	static MACHINE_DRIVER_START( vanguard )
	903
	904	MDRV_DRIVER_DATA( snk6502_state )
	905
896	906	// basic machine hardware
897	907	//MDRV_CPU_ADD("maincpu", M6502, MASTER_CLOCK / 8)   // 1.4 MHz
898	908	MDRV_CPU_ADD("maincpu", M6502, 930000)      // adjusted
r8962	r8963
976	986
977	987	MDRV_MACHINE_RESET(pballoon)
978	988
979		// video hardware
980		MDRV_SCREEN_MODIFY("screen")
981		MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
	989	MDRV_VIDEO_START( pballoon )
982	990	MACHINE_DRIVER_END
983	991
984	992
r8962	r8963
1311	1319	ROM_LOAD( "sk7_ic53.bin", 0x1000, 0x0800, CRC(a4c505cd) SHA1(47eea7e7ffa3dc8b35dc050ac1a1d77d6a5c4ece) )
1312	1320	ROM_END
1313	1321
	1322
	1323	ROM_START( pballoonr )
	1324	ROM_REGION( 0x10000, "maincpu", 0 )
	1325	ROM_LOAD( "sk7_ic12.bin",        0x3000, 0x1000, CRC(dfe2ae05) SHA1(21c98bef9d4d5fcb65ce5e9b20cde2259840459e) )
	1326	ROM_LOAD( "rock-ola_skpb1.ic7",  0x4000, 0x1000, CRC(dfd802e8) SHA1(2014295c678d0534585e27d9b5c7ac525113cd0c) )
	1327	ROM_LOAD( "rock-ola_skpb1.ic8",  0x5000, 0x1000, CRC(c433c062) SHA1(63df947c56f51a623b378d2a8a5b2cd05c23c414) )
	1328	ROM_LOAD( "rock-ola_skpb1.ic9",  0x6000, 0x1000, CRC(f85b9c37) SHA1(905eb162436a0a46688df9343296c140480d00cb) )
	1329	ROM_LOAD( "rock-ola_skpb1.ic10", 0x7000, 0x1000, CRC(8020e52d) SHA1(fbe2a27560904225b4406171c1cdbae9941887bd) )
	1330	ROM_LOAD( "sk7_ic14.bin",        0x8000, 0x1000, CRC(6a8817a5) SHA1(4cf8eda68d21b1fad0f12eedaeb88b256bba44da) )
	1331	ROM_RELOAD(                      0xf000, 0x1000 )  /* for the reset and interrupt vectors */
	1332	ROM_LOAD( "sk7_ic15.bin",        0x9000, 0x1000, CRC(1f78d814) SHA1(7e618971f1bbf8859284531e94989c43c3285b4a) )
	1333
	1334	ROM_REGION( 0x2000, "gfx1", 0 )
	1335	ROM_LOAD( "sk8_ic50.bin", 0x0000, 0x1000, CRC(560df07f) SHA1(e57945de829d22d39390a649eddaf78c989af679) )
	1336	ROM_LOAD( "sk8_ic51.bin", 0x1000, 0x1000, CRC(d415de51) SHA1(257cf939efec8adee87baf827315c69fde90da4c) )
	1337
	1338	ROM_REGION( 0x0040, "proms", 0 )
	1339	ROM_LOAD( "sk8_ic7.bin",  0x0000, 0x0020, CRC(ef6c82a0) SHA1(95b522d6389f25bf5fa2fca5f3f826ef43b2885b) ) /* foreground colors */
	1340	ROM_LOAD( "sk8_ic6.bin",  0x0020, 0x0020, CRC(eabc6a00) SHA1(942af5e22e49e578c6a24651476e3b60d40e2076) ) /* background colors */
	1341
	1342	ROM_REGION( 0x1800, "snk6502", 0 )   /* sound ROMs */
	1343	ROM_LOAD( "sk7_ic51.bin", 0x0000, 0x0800, CRC(0345f8b7) SHA1(c00992dc7222cc53d9fdff4ab47a7abdf90c5116) )
	1344	ROM_LOAD( "sk7_ic52.bin", 0x0800, 0x0800, CRC(5d6d68ea) SHA1(d3e03720eff5c85c1c2fb1d4bf960f45a99dc86a) )
	1345	ROM_LOAD( "sk7_ic53.bin", 0x1000, 0x0800, CRC(a4c505cd) SHA1(47eea7e7ffa3dc8b35dc050ac1a1d77d6a5c4ece) )
	1346	ROM_END
	1347
	1348
1314	1349	ROM_START( nibbler )
1315	1350	ROM_REGION( 0x10000, "maincpu", 0 )
1316	1351	ROM_LOAD( "g-0960-52.ic12", 0x3000, 0x1000, CRC(ac6a802b) SHA1(ac1072e30994f13097663dc24d9d1dc35a95d874) )
r8962	r8963
1437	1472	GAME( 1981, fantasyu, fantasy,  fantasy,  fantasyu, 0, ROT90, "SNK (Rock-Ola license)", "Fantasy (US)", GAME_IMPERFECT_SOUND )
1438	1473	GAME( 1981, fantasyj, fantasy,  fantasy,  fantasyu, 0, ROT90, "SNK", "Fantasy (Japan)", GAME_IMPERFECT_SOUND )
1439	1474	GAME( 1982, pballoon, 0,        pballoon, pballoon, 0, ROT90, "SNK", "Pioneer Balloon", 0 )
	1475	GAME( 1982, pballoonr,pballoon, pballoon, pballoon, 0, ROT90, "SNK (Rock-Ola license)", "Pioneer Balloon (Rock-Ola license)", 0 )
1440	1476	GAME( 1982, nibbler,  0,        nibbler,  nibbler,  0, ROT90, "Rock-Ola", "Nibbler (set 1)", 0 )
1441	1477	GAME( 1982, nibblera, nibbler,  nibbler,  nibblera, 0, ROT90, "Rock-Ola", "Nibbler (set 2)", 0 )
1442	1478	GAME( 1982, nibblerb, nibbler,  nibbler,  nibblerb, 0, ROT90, "Rock-Ola", "Nibbler (set 3)", 0 )

src/mame/drivers/segamsys.c

r8962	r8963
485	485	return retdata;
486	486	}
487	487
488		static void vdp_data_w(const address_space *space, UINT8 data, struct sms_vdp* chip)
	488	static void vdp_data_w(address_space *space, UINT8 data, struct sms_vdp* chip)
489	489	{
490	490	/* data writes clear the pending flag */
491	491	chip->cmd_pend = 0;
r8962	r8963
549	549
550	550	}
551	551
552		static UINT8 vdp_ctrl_r(const address_space *space, struct sms_vdp *chip)
	552	static UINT8 vdp_ctrl_r(address_space *space, struct sms_vdp *chip)
553	553	{
554	554	UINT8 retvalue;
555	555
r8962	r8963
613	613	//  printf("VDP: setting register %01x to %02x\n",reg, chip->cmd_part1);
614	614	}
615	615
616		static void vdp_ctrl_w(const address_space *space, UINT8 data, struct sms_vdp *chip)
	616	static void vdp_ctrl_w(address_space *space, UINT8 data, struct sms_vdp *chip)
617	617	{
618	618	if (chip->cmd_pend)
619	619	{ /* Part 2 of a command word write */
r8962	r8963
1480	1480
1481	1481	void init_extra_gg_ports(running_machine* machine, const char* tag)
1482	1482	{
1483		const address_space *io = cputag_get_address_space(machine, tag, ADDRESS_SPACE_IO);
	1483	address_space *io = cputag_get_address_space(machine, tag, ADDRESS_SPACE_IO);
1484	1484	memory_install_read8_handler     (io, 0x00, 0x00, 0, 0, sms_ioport_gg00_r);
1485	1485	}
1486	1486
r8962	r8963
1643	1643	{
1644	1644	/* INIT THE PORTS *********************************************************************************************/
1645	1645
1646		const address_space *io = cputag_get_address_space(machine, tag, ADDRESS_SPACE_IO);
	1646	address_space *io = cputag_get_address_space(machine, tag, ADDRESS_SPACE_IO);
1647	1647	running_device *sn = machine->device("snsnd");
1648	1648
1649	1649	memory_install_readwrite8_handler(io, 0x0000, 0xffff, 0, 0, z80_unmapped_port_r, z80_unmapped_port_w);

src/mame/drivers/r2dtank.c

r8962	r8963
218	218	}
219	219
220	220
221		static const ttl74123_config ttl74123_intf =
	221	static const ttl74123_interface ttl74123_intf =
222	222	{
223	223	TTL74123_GROUNDED,   /* the hook up type */
224	224	RES_K(22),         /* resistor connected to RCext */

src/mame/drivers/m72.c

r8962	r8963
319	319
320	320	INLINE DRIVER_INIT( m72_8751 )
321	321	{
322		const address_space *program = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
323		const address_space *io = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
324		const address_space *sndio = cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_IO);
	322	address_space *program = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	323	address_space *io = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	324	address_space *sndio = cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_IO);
325	325	running_device *dac = machine->device("dac");
326	326
327	327	protection_ram = auto_alloc_array(machine, UINT16, 0x10000/2);
r8962	r8963
403	403
404	404	static INTERRUPT_GEN(fake_nmi)
405	405	{
406		const address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
	406	address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
407	407	int sample = m72_sample_r(space,0);
408	408	if (sample)
409	409	m72_sample_w(device->machine->device("dac"),0,sample);

src/mame/drivers/segae.c

r8962	r8963
363	363	{
364	364	/* INIT THE PORTS *********************************************************************************************/
365	365
366		const address_space *io = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	366	address_space *io = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
367	367	running_device *sn1 = machine->device("sn1");
368	368	running_device *sn2 = machine->device("sn2");
369	369

src/mame/drivers/aristmk4.c

r8962	r8963
53	53	30/5/10 - Palindrome
54	54	Now using mc146818 rtc driver instead of rtc_get_reg.
55	55
	56	19/8/10 - Roberto Fresca.
	57	Added 3 Bags Full - 5VXFC790 (Victorian).
	58	Set is now parent. Replaced the bad dumped GFX from NZ set with the new ones,
	59	since they match 4 of 6 bitplanes. The PROM at U71 is also marked for Fantasy Fortune,
	60	so maybe is the correct one for this game.
	61
56	62	The mc146818 driver is buggy - reported problem to Firewave and issues will be addressed.
57	63	In this driver, the wrong day of the month is shown, wrong hours are shown.
58	64	rtc causes game to freeze if the game is left in audit mode with continuous writes to 0xA reg - 0x80 data.
r8962	r8963
1212	1218
1213	1219	MACHINE_DRIVER_END
1214	1220
	1221	ROM_START( 3bagflvt )
	1222
	1223	ROM_REGION(0x10000, "maincpu", 0 )
	1224	/* VIDEO AND SOUND EPROM */
	1225	ROM_LOAD("3_bag_full_video_sound.u59",  0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
	1226
	1227	/* GAME EPROMS */
	1228	ROM_LOAD("5vxfc790_3_bag_full_1-2.u87", 0x06000, 0x2000, CRC(79ee932f) SHA1(de85de107310315b69bd7564f1921c7501b679b2)) // game code
	1229	ROM_LOAD("5vxfc790_3_bag_full_2-2.u86", 0x08000, 0x8000, CRC(b6185f3b) SHA1(db642d7b1d1fd93483642bae518eb99a3e99aec9)) // game code
	1230
	1231	/* SHAPE EPROMS */
	1232	ROM_REGION(0xc000, "tile_gfx", 0 )
	1233	ROM_LOAD("1vlsh224_3_bag_full_1-6.u20", 0x00000, 0x2000, CRC(b02d4ce8) SHA1(eace41f870bfbc253124efd72f1c7d6021f2e99f)) // gfx
	1234	ROM_LOAD("1vlsh224_3_bag_full_3-6.u21", 0x02000, 0x2000, CRC(06218c95) SHA1(cbda8e50fd4e9c8a3c51a006921a85d4bfaa6f78))
	1235	ROM_LOAD("1vlsh224_3_bag_full_5-6.u22", 0x04000, 0x2000, CRC(191e73f1) SHA1(e6d510b155f9cd3427a70346e5ff28969309be4e))
	1236	ROM_LOAD("1vlsh224_3_bag_full_2-6.u45", 0x06000, 0x2000, CRC(054c55cb) SHA1(3df1893095f867220f3d6a52a40bcdffbfc8b529))
	1237	ROM_LOAD("1vlsh224_3_bag_full_4-6.u46", 0x08000, 0x2000, CRC(f33970b3) SHA1(8814a4d29383545c7c48e5b44f16a53e38b67fc3))
	1238	ROM_LOAD("1vlsh224_3_bag_full_6-6.u47", 0x0a000, 0x2000, CRC(609ecf9e) SHA1(9d819bb71f62eb4dd1b3d71748e87c7d77e2afe6))
	1239
	1240	/* COLOR PROM */
	1241	ROM_REGION(0x200, "proms", 0 )
	1242	ROM_LOAD("1cm48.u71", 0x0000, 0x0200, CRC(81daeeb0) SHA1(7dfe198c6def5c4ae4ecac488d65c2911fb3a890))
	1243	ROM_END
	1244
1215	1245	ROM_START( 3bagflnz )
1216	1246
1217	1247	ROM_REGION(0x10000, "maincpu", 0 )
r8962	r8963
1223	1253	ROM_LOAD("u86.bin", 0x08000, 0x8000, CRC(c632c7c7) SHA1(f3090d037f71a0cf099bb55abbc509cf95f0cbba)) // game code
1224	1254
1225	1255	/* SHAPE EPROMS */
1226		ROM_REGION(0xc000, "tile_gfx", 0 )
1227		ROM_LOAD("u20.bin", 0x00000, 0x2000, BAD_DUMP CRC(44babe95) SHA1(047c00ebb21030563921108b8e24f62e9ef44a10)) // gfx
1228		ROM_LOAD("u21.bin", 0x02000, 0x2000, BAD_DUMP CRC(06218c95) SHA1(cbda8e50fd4e9c8a3c51a006921a85d4bfaa6f78))
1229		ROM_LOAD("u22.bin", 0x04000, 0x2000, BAD_DUMP CRC(191e73f1) SHA1(e6d510b155f9cd3427a70346e5ff28969309be4e))
1230		ROM_LOAD("u45.bin", 0x06000, 0x2000, BAD_DUMP CRC(054c55cb) SHA1(3df1893095f867220f3d6a52a40bcdffbfc8b529))
1231		ROM_LOAD("u46.bin", 0x08000, 0x2000, BAD_DUMP CRC(7a4e8b80) SHA1(35711d6a8f5675ad6c6496bf8e7e5a73504f2409))
1232		ROM_LOAD("u47.bin", 0x0a000, 0x2000, BAD_DUMP CRC(609ecf9e) SHA1(9d819bb71f62eb4dd1b3d71748e87c7d77e2afe6))
	1256	ROM_REGION(0xc000, "tile_gfx", 0 )   /* GFX from parent set. They match 4 of 6 bitplanes */
	1257	ROM_LOAD("1vlsh224_3_bag_full_1-6.u20", 0x00000, 0x2000, CRC(b02d4ce8) SHA1(eace41f870bfbc253124efd72f1c7d6021f2e99f)) // gfx
	1258	ROM_LOAD("1vlsh224_3_bag_full_3-6.u21", 0x02000, 0x2000, CRC(06218c95) SHA1(cbda8e50fd4e9c8a3c51a006921a85d4bfaa6f78))
	1259	ROM_LOAD("1vlsh224_3_bag_full_5-6.u22", 0x04000, 0x2000, CRC(191e73f1) SHA1(e6d510b155f9cd3427a70346e5ff28969309be4e))
	1260	ROM_LOAD("1vlsh224_3_bag_full_2-6.u45", 0x06000, 0x2000, CRC(054c55cb) SHA1(3df1893095f867220f3d6a52a40bcdffbfc8b529))
	1261	ROM_LOAD("1vlsh224_3_bag_full_4-6.u46", 0x08000, 0x2000, CRC(f33970b3) SHA1(8814a4d29383545c7c48e5b44f16a53e38b67fc3))
	1262	ROM_LOAD("1vlsh224_3_bag_full_6-6.u47", 0x0a000, 0x2000, CRC(609ecf9e) SHA1(9d819bb71f62eb4dd1b3d71748e87c7d77e2afe6))
1233	1263
1234	1264	/* COLOR PROM */
1235	1265	ROM_REGION(0x200, "proms", 0 )
r8962	r8963
1574	1604
1575	1605
1576	1606
1577		GAMEL( 1994, eforest,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Enchanted Forest - 12XF528902", GAME_NOT_WORKING,layout_aristmk4)
1578		GAMEL( 1995, eforesta,eforest,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Enchanted Forest - 4VXFC818", 0,layout_aristmk4 )
1579		GAMEL( 1996, eforestb,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Enchanted Forest - 3VXFC5343 (New Zealand)", 0,layout_aristmk4 )
1580		GAMEL( 1994, 3bagflnz,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "3 Bags Full - 3VXFC5345 (New Zealand)", 0,layout_aristmk4 )
1581		GAMEL( 1996, blkrhino,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Black Rhino - 3VXFC5344 (New Zealand)", 0,layout_aristmk4 )
1582		GAMEL( 1996, kgbird,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "K.G Bird - 4VXFC5341 (New Zealand, 87.98%)", 0,layout_aristmk4 )
1583		GAMEL( 1996, kgbirda,  kgbird,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "K.G Bird - 4VXFC5341 (New Zealand, 91.97%)", 0,layout_aristmk4 )
1584		GAMEL( 1998, swtht2nz,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Sweet Hearts II - 1VXFC5461 (New Zealand)", 0,layout_aristmk4 )
1585		GAMEL( 1996, goldenc,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Golden Canaries - 1VXFC5462", 0,layout_aristmk4 )
1586		GAMEL( 1996, topgear,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Top Gear - 4VXFC969", GAME_NOT_WORKING,layout_aristmk4 )
1587		GAMEL( 1996, wtigernz,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "White Tiger - 3VXFC5342 (New Zealand)", 0,layout_aristmk4 )
1588		GAMEL( 1998, phantomp,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Phantom Pays - 4VXFC5431 (New Zealand)", 0,layout_aristmk4 )
1589		GAMEL( 2000, coralr2,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Coral Riches II - 1VXFC5472 (New Zealand)", 0,layout_aristmk4 )
1590		GAMEL( 1999, ffortune,      0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Fantasy Fortune", 0,layout_aristmk4 )
1591		GAMEL( 1999, autmoon,       0,aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Autumn Moon", 0,layout_aristmk4 )
	1607	GAMEL( 1994, eforest,  0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Enchanted Forest - 12XF528902",              GAME_NOT_WORKING, layout_aristmk4)
	1608	GAMEL( 1995, eforesta, eforest,  aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Enchanted Forest - 4VXFC818",                0,                layout_aristmk4 )
	1609	GAMEL( 1996, eforestb, 0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Enchanted Forest - 3VXFC5343 (New Zealand)", 0,                layout_aristmk4 )
	1610	GAMEL( 1994, 3bagflvt, 0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "3 Bags Full - 5VXFC790 (Victorian)",         0,                layout_aristmk4 )
	1611	GAMEL( 1994, 3bagflnz, 3bagflvt, aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "3 Bags Full - 3VXFC5345 (New Zealand)",      0,                layout_aristmk4 )
	1612	GAMEL( 1996, blkrhino, 0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Black Rhino - 3VXFC5344 (New Zealand)",      0,                layout_aristmk4 )
	1613	GAMEL( 1996, kgbird,   0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "K.G Bird - 4VXFC5341 (New Zealand, 87.98%)", 0,                layout_aristmk4 )
	1614	GAMEL( 1996, kgbirda,  kgbird,   aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "K.G Bird - 4VXFC5341 (New Zealand, 91.97%)", 0,                layout_aristmk4 )
	1615	GAMEL( 1998, swtht2nz, 0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Sweet Hearts II - 1VXFC5461 (New Zealand)",  0,                layout_aristmk4 )
	1616	GAMEL( 1996, goldenc,  0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Golden Canaries - 1VXFC5462",                0,                layout_aristmk4 )
	1617	GAMEL( 1996, topgear,  0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Top Gear - 4VXFC969",                        GAME_NOT_WORKING, layout_aristmk4 )
	1618	GAMEL( 1996, wtigernz, 0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "White Tiger - 3VXFC5342 (New Zealand)",      0,                layout_aristmk4 )
	1619	GAMEL( 1998, phantomp, 0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Phantom Pays - 4VXFC5431 (New Zealand)",     0,                layout_aristmk4 )
	1620	GAMEL( 2000, coralr2,  0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Coral Riches II - 1VXFC5472 (New Zealand)",  0,                layout_aristmk4 )
	1621	GAMEL( 1999, ffortune, 0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Fantasy Fortune",                            0,                layout_aristmk4 )
	1622	GAMEL( 1999, autmoon,  0,        aristmk4, aristmk4, aristmk4, ROT0,  "Aristocrat", "Autumn Moon",                                0,                layout_aristmk4 )

src/mame/drivers/sothello.c

r8962	r8963
185	185
186	186	/* sub 6809 */
187	187
188		static void unlock_shared_ram(const address_space *space)
	188	static void unlock_shared_ram(address_space *space)
189	189	{
190	190	if(!space->machine->device<cpu_device>("sub")->suspended(SUSPEND_REASON_HALT))
191	191	{

src/mame/drivers/kchamp.c

r8962	r8963
736	736
737	737	static UINT8 *decrypt_code(running_machine *machine)
738	738	{
739		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	739	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
740	740	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
741	741	UINT8 *rom = memory_region(machine, "maincpu");
742	742	int A;
743	743
744		memory_set_decrypted_region(space, 0x0000, 0xffff, decrypted);
	744	space->set_decrypted_region(0x0000, 0xffff, decrypted);
745	745
746	746	for (A = 0; A < 0x10000; A++)
747	747	decrypted[A] = (rom[A] & 0x55) | ((rom[A] & 0x88) >> 2) | ((rom[A] & 0x22) << 2);

src/mame/drivers/lockon.c

r8962	r8963
65	65	static READ16_HANDLER( main_gnd_r )
66	66	{
67	67	lockon_state *state = space->machine->driver_data<lockon_state>();
68		const address_space *gndspace = cpu_get_address_space(state->ground, ADDRESS_SPACE_PROGRAM);
69		return memory_read_word(gndspace, V30_GND_ADDR | offset * 2);
	68	address_space *gndspace = cpu_get_address_space(state->ground, ADDRESS_SPACE_PROGRAM);
	69	return gndspace->read_word(V30_GND_ADDR | offset * 2);
70	70	}
71	71
72	72	static WRITE16_HANDLER( main_gnd_w )
73	73	{
74	74	lockon_state *state = space->machine->driver_data<lockon_state>();
75		const address_space *gndspace = cpu_get_address_space(state->ground, ADDRESS_SPACE_PROGRAM);
	75	address_space *gndspace = cpu_get_address_space(state->ground, ADDRESS_SPACE_PROGRAM);
76	76
77	77	if (ACCESSING_BITS_0_7)
78		memory_write_byte(gndspace, V30_GND_ADDR | (offset * 2 + 0), data);
	78	gndspace->write_byte(V30_GND_ADDR | (offset * 2 + 0), data);
79	79	if (ACCESSING_BITS_8_15)
80		memory_write_byte(gndspace, V30_GND_ADDR | (offset * 2 + 1), data >> 8);
	80	gndspace->write_byte(V30_GND_ADDR | (offset * 2 + 1), data >> 8);
81	81	}
82	82
83	83	static READ16_HANDLER( main_obj_r )
84	84	{
85	85	lockon_state *state = space->machine->driver_data<lockon_state>();
86		const address_space *objspace = cpu_get_address_space(state->object, ADDRESS_SPACE_PROGRAM);
87		return memory_read_word(objspace, V30_OBJ_ADDR | offset * 2);
	86	address_space *objspace = cpu_get_address_space(state->object, ADDRESS_SPACE_PROGRAM);
	87	return objspace->read_word(V30_OBJ_ADDR | offset * 2);
88	88	}
89	89
90	90	static WRITE16_HANDLER( main_obj_w )
91	91	{
92	92	lockon_state *state = space->machine->driver_data<lockon_state>();
93		const address_space *objspace = cpu_get_address_space(state->object, ADDRESS_SPACE_PROGRAM);
	93	address_space *objspace = cpu_get_address_space(state->object, ADDRESS_SPACE_PROGRAM);
94	94
95	95	if (ACCESSING_BITS_0_7)
96		memory_write_byte(objspace, V30_OBJ_ADDR | (offset * 2 + 0), data);
	96	objspace->write_byte(V30_OBJ_ADDR | (offset * 2 + 0), data);
97	97	if (ACCESSING_BITS_8_15)
98		memory_write_byte(objspace, V30_OBJ_ADDR | (offset * 2 + 1), data >> 8);
	98	objspace->write_byte(V30_OBJ_ADDR | (offset * 2 + 1), data >> 8);
99	99	}
100	100
101	101	static WRITE16_HANDLER( tst_w )
r8962	r8963
104	104
105	105	if (offset < 0x800)
106	106	{
107		const address_space *gndspace = cpu_get_address_space(state->ground, ADDRESS_SPACE_PROGRAM);
108		const address_space *objspace = cpu_get_address_space(state->object, ADDRESS_SPACE_PROGRAM);
	107	address_space *gndspace = cpu_get_address_space(state->ground, ADDRESS_SPACE_PROGRAM);
	108	address_space *objspace = cpu_get_address_space(state->object, ADDRESS_SPACE_PROGRAM);
109	109
110	110	if (ACCESSING_BITS_0_7)
111		memory_write_byte(gndspace, V30_GND_ADDR | (offset * 2 + 0), data);
	111	gndspace->write_byte(V30_GND_ADDR | (offset * 2 + 0), data);
112	112	if (ACCESSING_BITS_8_15)
113		memory_write_byte(gndspace, V30_GND_ADDR | (offset * 2 + 1), data >> 8);
	113	gndspace->write_byte(V30_GND_ADDR | (offset * 2 + 1), data >> 8);
114	114
115	115	if (ACCESSING_BITS_0_7)
116		memory_write_byte(objspace, V30_OBJ_ADDR | (offset * 2 + 0), data);
	116	objspace->write_byte(V30_OBJ_ADDR | (offset * 2 + 0), data);
117	117	if (ACCESSING_BITS_8_15)
118		memory_write_byte(objspace, V30_OBJ_ADDR | (offset * 2 + 1), data >> 8);
	118	objspace->write_byte(V30_OBJ_ADDR | (offset * 2 + 1), data >> 8);
119	119	}
120	120	}
121	121
122	122	static READ16_HANDLER( main_z80_r )
123	123	{
124	124	lockon_state *state = space->machine->driver_data<lockon_state>();
125		const address_space *sndspace = cpu_get_address_space(state->audiocpu, ADDRESS_SPACE_PROGRAM);
126		return 0xff00 | memory_read_byte(sndspace, offset);
	125	address_space *sndspace = cpu_get_address_space(state->audiocpu, ADDRESS_SPACE_PROGRAM);
	126	return 0xff00 | sndspace->read_byte(offset);
127	127	}
128	128
129	129	static WRITE16_HANDLER( main_z80_w )
130	130	{
131	131	lockon_state *state = space->machine->driver_data<lockon_state>();
132		const address_space *sndspace = cpu_get_address_space(state->audiocpu, ADDRESS_SPACE_PROGRAM);
133		memory_write_byte(sndspace, offset, data);
	132	address_space *sndspace = cpu_get_address_space(state->audiocpu, ADDRESS_SPACE_PROGRAM);
	133	sndspace->write_byte(offset, data);
134	134	}
135	135
136	136	static WRITE16_HANDLER( inten_w )

src/mame/drivers/tigeroad.c

r8962	r8963
87	87	0x0003, 0x0080, 0x0006, 0x0060, 0x0000, 0x00e0, 0x000a, 0x00c0, 0x0003, 0x0080, 0x0006, 0x0060, 0x0000, 0x00e0, 0x000a, 0x00c0,
88	88	0x0003, 0x0080, 0x0006, 0x0060, 0x0000, 0x00e0, 0x000a, 0x00c0, 0x0003, 0x0080, 0x0006, 0x0060, 0x0000, 0x00e0, 0x000a, 0x00c0 };
89	89
90		static void f1dream_protection_w(const address_space *space)
	90	static void f1dream_protection_w(address_space *space)
91	91	{
92	92	int indx;
93	93	int value = 255;

src/mame/drivers/gei.c

r8962	r8963
91	91	static int prevoffset, yadd;
92	92	int i;
93	93
94		space->machine->generic.videoram.u8[offset] = data;
95
96	94	yadd = (offset==prevoffset) ? (yadd+1):0;
97	95	prevoffset = offset;
98	96
r8962	r8963
143	141
144	142	static WRITE8_DEVICE_HANDLER( sound_w )
145	143	{
146		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	144	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
147	145
148	146	/* bit 3 - coin lockout, lamp10 in poker / lamp6 in trivia test modes */
149	147	coin_lockout_global_w(device->machine, ~data & 0x08);
r8962	r8963
184	182
185	183	static WRITE8_DEVICE_HANDLER( nmi_w )
186	184	{
187		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	185	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
188	186
189	187	/* bit 4 - play/raise button lamp, lamp 9 in selection test mode  */
190	188	set_led_status(device->machine, 8,data & 0x10);
r8962	r8963
385	383	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
386	384	AM_RANGE(0x8000, 0x9fff) AM_ROM /* space for diagnostic ROM? */
387	385	AM_RANGE(0xa000, 0xbfff) AM_ROM
388		AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w) AM_BASE_GENERIC(videoram)
	386	AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w)
389	387	ADDRESS_MAP_END
390	388
391	389	static ADDRESS_MAP_START( gselect_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
399	397	AM_RANGE(0x4800, 0x4803) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w)
400	398	AM_RANGE(0x5000, 0x5003) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w)
401	399	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
402		AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w) AM_BASE_GENERIC(videoram)
	400	AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w)
403	401	ADDRESS_MAP_END
404	402
405	403	// TODO: where are mapped the lower 0x2000 bytes of the banks?
r8962	r8963
416	414	AM_RANGE(0x607e, 0x607e) AM_WRITE(banksel_1_1_w)
417	415	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
418	416	AM_RANGE(0x8000, 0xbfff) AM_ROM
419		AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w) AM_BASE_GENERIC(videoram)
	417	AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w)
420	418	ADDRESS_MAP_END
421	419
422	420	static ADDRESS_MAP_START( gepoker_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
433	431	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
434	432	AM_RANGE(0x8000, 0xbfff) AM_ROM /* space for diagnostic ROM? */
435	433	AM_RANGE(0xe000, 0xffff) AM_ROM
436		AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w) AM_BASE_GENERIC(videoram)
	434	AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w)
437	435	ADDRESS_MAP_END
438	436
439	437	static ADDRESS_MAP_START( amuse1_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
450	448	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
451	449	AM_RANGE(0x8000, 0xbfff) AM_ROM /* space for diagnostic ROM? */
452	450	AM_RANGE(0xe000, 0xffff) AM_ROM
453		AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w) AM_BASE_GENERIC(videoram)
	451	AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w)
454	452	ADDRESS_MAP_END
455	453
456	454	static ADDRESS_MAP_START( findout_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
470	468	AM_RANGE(0x7800, 0x7fff) AM_ROM /*space for diagnostic ROM?*/
471	469	AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
472	470	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
473		AM_RANGE(0xc000, 0xffff) AM_WRITE(gei_bitmap_w)  AM_BASE_GENERIC(videoram)
	471	AM_RANGE(0xc000, 0xffff) AM_WRITE(gei_bitmap_w)
474	472	AM_RANGE(0x0000, 0xffff) AM_READ(catchall)
475	473	ADDRESS_MAP_END
476	474
r8962	r8963
488	486	AM_RANGE(0x7800, 0x7fff) AM_ROM /*space for diagnostic ROM?*/
489	487	AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
490	488	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
491		AM_RANGE(0xc000, 0xffff) AM_WRITE(gei_bitmap_w)  AM_BASE_GENERIC(videoram)
	489	AM_RANGE(0xc000, 0xffff) AM_WRITE(gei_bitmap_w)
492	490	AM_RANGE(0x0000, 0xffff) AM_READ(catchall)
493	491	ADDRESS_MAP_END
494	492
r8962	r8963
500	498	AM_RANGE(0x6200, 0x6200) AM_WRITE(signature2_w)
501	499	AM_RANGE(0x6400, 0x6400) AM_READ(signature_r)
502	500	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
503		AM_RANGE(0x8000, 0xbfff) AM_ROM /* space for diagnostic ROM? */
504		AM_RANGE(0xe000, 0xffff) AM_ROM
505		AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w) AM_BASE_GENERIC(videoram)
	501	AM_RANGE(0xc000, 0xffff) AM_WRITE(gei_bitmap_w)
	502	AM_RANGE(0x8000, 0xffff) AM_ROM
506	503	ADDRESS_MAP_END
507	504
508	505	static ADDRESS_MAP_START( geimulti_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
515	512	AM_RANGE(0x6000, 0x7fff) AM_ROM
516	513	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
517	514	AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
518		AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w) AM_BASE_GENERIC(videoram)
	515	AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w)
519	516	ADDRESS_MAP_END
520	517
521	518	static ADDRESS_MAP_START( sprtauth_map, ADDRESS_SPACE_PROGRAM, 8 )
r8962	r8963
529	526	AM_RANGE(0x6000, 0x7fff) AM_ROM
530	527	AM_RANGE(0x8000, 0x8002) AM_WRITE(gei_drawctrl_w)
531	528	AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
532		AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w) AM_BASE_GENERIC(videoram)
	529	AM_RANGE(0xc000, 0xffff) AM_RAM_WRITE(gei_bitmap_w)
533	530	ADDRESS_MAP_END
534	531
535	532	static INPUT_PORTS_START(reelfun_standard)
r8962	r8963
1534	1531	ROM_START( suprpokr )
1535	1532	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
1536	1533	ROM_LOAD( "10-19s-1.e1",  0x00000, 0x4000, CRC(50662b4d) SHA1(967161a755db43d2cfd5ce92e14c5284f1f1f8ad) )
1537		ROM_LOAD( "10-19s-1.e2",  0x08000, 0x4000, BAD_DUMP CRC(22b45aeb) SHA1(006c3072cc44c6fde9b4d15163dc70707bbd5a9c) ) /* Self test reports this ROM bad */
	1534	ROM_LOAD( "10-19s-1.e2",  0x08000, 0x4000, CRC(22b45aeb) SHA1(006c3072cc44c6fde9b4d15163dc70707bbd5a9c) )
	1535	ROM_RELOAD( 0xc000, 0x4000 )
1538	1536	ROM_END
1539	1537
	1538	ROM_START( suprpkr1 )
	1539	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
	1540	ROM_LOAD( "e1.bin",  0x00000, 0x4000, CRC(5cc7c1e0) SHA1(1cdca32c4df7227dab77574abe344b291741139e) )
	1541	ROM_LOAD( "e2.bin",  0x08000, 0x4000, CRC(e47d6e2a) SHA1(9cabc42275dad8be6cd5b167e381ddb5bf08276d) )
	1542	ROM_RELOAD( 0xc000, 0x4000 )
	1543	ROM_END
	1544
1540	1545	ROM_START( reelfun ) /* v7.03 */
1541	1546	ROM_REGION( 0x38000, "maincpu", 0 )
1542	1547	ROM_LOAD( "reelfun.cnt",          0x00000, 0x4000, CRC(ce42e0ea) SHA1(87f703b14aa819c54e54b42e639448521c01f76b) )
r8962	r8963
1872	1877	GAME( 1986, reelfun1, reelfun,  findout,  reelfun,  0,       ROT0, "Greyhound Electronics", "Reel Fun (Version 7.01)",                 GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
1873	1878	GAME( 1987, findout,  0,        findout,  findout,  0,       ROT0, "Elettronolo",           "Find Out (Version 4.04)",                 GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
1874	1879
1875		GAME( 1987, suprpokr, 0,        suprpokr, suprpokr, 0,       ROT0, "Greyhound Electronics", "Super Poker",                             GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
	1880	GAME( 1986, suprpokr, 0,        suprpokr, suprpokr, 0,       ROT0, "Grayhound Electronics", "Super Poker (Version 10.19S)",            GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
	1881	GAME( 1986, suprpkr1, suprpokr, suprpokr, suprpokr, 0,       ROT0, "Grayhound Electronics", "Super Poker (Version 10.15S)",            GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
1876	1882
1877	1883	GAME( 1991, quiz211,  0,        findout,  quiz,     0,       ROT0, "Elettronolo",           "Quiz (Revision 2.11)",                    GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
1878	1884

src/mame/drivers/segas32.c

r8962	r8963
489	489	}
490	490
491	491
492		static void int_control_w(const address_space *space, int offset, UINT8 data)
	492	static void int_control_w(address_space *space, int offset, UINT8 data)
493	493	{
494	494	int duration;
495	495
r8962	r8963
628	628	*
629	629	*************************************/
630	630
631		static UINT16 common_io_chip_r(const address_space *space, int which, offs_t offset, UINT16 mem_mask)
	631	static UINT16 common_io_chip_r(address_space *space, int which, offs_t offset, UINT16 mem_mask)
632	632	{
633	633	static const char *const portnames[2][8] =
634	634	{
r8962	r8963
679	679	}
680	680
681	681
682		static void common_io_chip_w(const address_space *space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
	682	static void common_io_chip_w(address_space *space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
683	683	{
684	684	UINT8 old;
685	685
r8962	r8963
1311	1311	*************************************/
1312	1312
1313	1313	static ADDRESS_MAP_START( ga2_v25_map, ADDRESS_SPACE_PROGRAM, 8 )
1314		AM_RANGE(0x00000, 0x0ffff) AM_ROM
	1314	AM_RANGE(0x00000, 0x0ffff) AM_ROM AM_REGION("mcu", 0)
1315	1315	AM_RANGE(0x10000, 0x1ffff) AM_RAM AM_BASE(&ga2_dpram)
1316	1316	AM_RANGE(0xf0000, 0xfffff) AM_ROM AM_REGION("mcu", 0)
1317	1317	ADDRESS_MAP_END
r8962	r8963
2834	2834	ROM_LOAD( "mpr14943",     0x300000, 0x100000, CRC(24d40333) SHA1(38faf8f3eac317a163e93bd2247fe98189b13d2d) )
2835	2835	ROM_LOAD( "mpr14942",     0x400000, 0x100000, CRC(a89b0e90) SHA1(e14c62418eb7f9a2deb2a6dcf635bedc1c73c253) )
2836	2836
2837		ROM_REGION( 0x100000, "mcu", 0 ) /* Protection CPU */
	2837	ROM_REGION( 0x10000, "mcu", 0 ) /* Protection CPU */
2838	2838	ROM_LOAD( "epr14468", 0x00000, 0x10000, CRC(77634daa) SHA1(339169d164b9ed7dc3787b084d33effdc8e9efc1) )
2839	2839
2840	2840	ROM_REGION( 0x400000, "gfx1", 0 ) /* tiles */
r8962	r8963
4063	4063	{
4064	4064	// pretend that slave is following master op, enables attract mode video with sound
4065	4065	if (ACCESSING_BITS_0_7)
4066		memory_write_byte( space, 0x810049, data );
	4066	space->write_byte( 0x810049, data );
4067	4067	}
4068	4068
4069	4069	static DRIVER_INIT( f1en )

src/mame/drivers/slapfght.c

r8962	r8963
739	739
740	740	static VIDEO_EOF( perfrman )
741	741	{
742		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	742	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
743	743	buffer_spriteram_w(space, 0, 0);
744	744	}
745	745

src/mame/drivers/badlands.c

r8962	r8963
186	186
187	187	static void scanline_update(screen_device &screen, int scanline)
188	188	{
189		const address_space *space = cputag_get_address_space(screen.machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	189	address_space *space = cputag_get_address_space(screen.machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
190	190
191	191	/* sound IRQ is on 32V */
192	192	if (scanline & 32)

src/mame/drivers/supertnk.c

r8962	r8963
286	286
287	287	static MACHINE_RESET( supertnk )
288	288	{
289		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	289	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
290	290	supertnk_bankswitch_0_w(space, 0, 0);
291	291	supertnk_bankswitch_1_w(space, 0, 0);
292	292

src/mame/drivers/offtwall.c

r8962	r8963
171	171	ROM bank area, we need to return the correct value to give the proper checksum */
172	172	if ((offset == 0x3000 || offset == 0x3001) && cpu_get_previouspc(space->cpu) > 0x37000)
173	173	{
174		UINT32 checksum = (memory_read_word(space, 0x3fd210) << 16) | memory_read_word(space, 0x3fd212);
	174	UINT32 checksum = (space->read_word(0x3fd210) << 16) | space->read_word(0x3fd212);
175	175	UINT32 us = 0xaaaa5555 - checksum;
176	176	if (offset == 0x3001)
177	177	return us & 0xffff;

src/mame/drivers/neodrvr.c

r8962	r8963
747	747	Information about this can be found at 'The NeoGeo Master List' (unofficial) - http://www.neo-geo.com
748	748	and the official NeoGeo museum - http://neogeomuseum.snkplaymore.co.jp/english/index.php
749	749	Several unofficial 'conversions' of these sets can be found across the internet.
750		For completeness sake: Some of these have sets have been relesead for the CD system.
	750	For completeness sake: Some of these have sets have been released for the CD system.
751	751
752	752
753	753	M1 (sound driver) rom information:
r8962	r8963
1262	1262	ROM_LOAD16_BYTE( "017-c4.bin", 0x200001, 0x100000, CRC(f4f3c9cb) SHA1(8faafa89dbd0345218f71f891419d2e4e7578200) ) /* Plane 2,3 */
1263	1263	ROM_END
1264	1264
1265		ROM_START( sengokh ) /* AES VERSION */
	1265	ROM_START( sengokuh ) /* AES VERSION */
1266	1266	ROM_REGION( 0x100000, "maincpu", 0 )
1267	1267	ROM_LOAD16_WORD_SWAP( "017-hp1.bin", 0x000000, 0x080000, CRC(33eccae0) SHA1(000ccf9a9c73df75eeba3f2c367c3a1a9e0a3a6b) )
1268	1268	ROM_LOAD16_WORD_SWAP( "017-p2.bin",  0x080000, 0x020000, CRC(3024bbb3) SHA1(88892e1292dd60f35a76f9a22e623d4f0f9693cc) )
r8962	r8963
2013	2013	ROM_LOAD16_BYTE( "045-c6.bin", 0x800001, 0x080000, CRC(4fa71252) SHA1(afe374a9d1f2d955a59efe7b6196b89e021b164c) ) /* Plane 2,3 */
2014	2014	ROM_END
2015	2015
2016		/* Old version looked like this; p's on eprom?
2017		ROM_START( samsho )
2018		ROM_REGION( 0x180000, "maincpu", 0 )
2019		ROM_LOAD16_WORD_SWAP( "045-p1.bin", 0x000000, 0x080000, CRC(80aa6c97) SHA1(6e07a4aa7b4719ae487a10cee9389cb55a370a7a) )
2020		ROM_LOAD16_WORD_SWAP( "045-p2.bin", 0x080000, 0x080000, CRC(71768728) SHA1(9ff0e01d3fb73ad04279d4fdf4c53c3160888179) )
2021		ROM_LOAD16_WORD_SWAP( "045-p3.bin", 0x100000, 0x080000, CRC(38ee9ba9) SHA1(48190699a6be83cb6257365ae81f93fdd23abe09) )
2022		*/
2023
2024	2016	ROM_START( tophuntr ) /* MVS VERSION */
2025	2017	ROM_REGION( 0x200000, "maincpu", 0 )
2026	2018	ROM_LOAD16_WORD_SWAP( "046-p1.bin", 0x000000, 0x100000, CRC(69fa9e29) SHA1(9a40a16163193bb506a32bd34f6323b25ec69622) )
r8962	r8963
2304	2296	ROM_END
2305	2297
2306	2298	ROM_START( aof2 ) /* MVS AND AES VERSION */
2307		ROM_REGION( 0x200000, "maincpu", 0 )
	2299	ROM_REGION( 0x100000, "maincpu", 0 )
2308	2300	ROM_LOAD16_WORD_SWAP( "056-p1.bin", 0x000000, 0x100000, CRC(a3b1d021) SHA1(ee42f3ca4516226b0088d0303ed28e3ecdabcd71) )
2309	2301
2310	2302	NEO_SFIX_128K( "056-s1.bin", CRC(8b02638e) SHA1(aa4d28804ca602da776948b5f223ea89e427906b) )
r8962	r8963
2330	2322	ROM_END
2331	2323
2332	2324	ROM_START( aof2a ) /* MVS AND AES VERSION */
2333		ROM_REGION( 0x200000, "maincpu", 0 )
	2325	ROM_REGION( 0x100000, "maincpu", 0 )
2334	2326	ROM_LOAD16_WORD_SWAP( "056-p1.bin",  0x000000, 0x100000, CRC(a3b1d021) SHA1(ee42f3ca4516226b0088d0303ed28e3ecdabcd71) )
2335	2327	/* the rom below acts as a patch to the program rom in the cart, replacing the first 512kb */
2336	2328	ROM_LOAD16_WORD_SWAP( "056-ep1.bin", 0x000000, 0x80000, CRC(75d6301c) SHA1(e72d15fba55f96be7b4fa29e705a7b78f56edf7d) )
r8962	r8963
2406	2398	ROM_LOAD16_BYTE( "058-c6.bin", 0x800001, 0x200000, CRC(8ff1f43d) SHA1(6180ceb5412a3e2e34e9513a3283b9f63087f747) ) /* Plane 2,3 */
2407	2399	ROM_END
2408	2400
2409		ROM_START( fatfursa ) /* MVS AND AES VERSION */
	2401	ROM_START( fatfurspa ) /* MVS AND AES VERSION */
2410	2402	ROM_REGION( 0x180000, "maincpu", 0 )
2411	2403	ROM_LOAD16_WORD_SWAP( "058-p1.bin", 0x000000, 0x100000, CRC(2f585ba2) SHA1(429b4bf43fb9b1082c15d645ca328f9d175b976b) )
2412	2404	ROM_LOAD16_WORD_SWAP( "058-p2.bin", 0x100000, 0x080000, CRC(d7c71a6b) SHA1(b3428063031a2e5857da40a5d2ffa87fb550c1bb) )
r8962	r8963
2461	2453	ROM_END
2462	2454
2463	2455	ROM_START( fightfev ) /* MVS ONLY RELEASE */
2464		ROM_REGION( 0x200000, "maincpu", 0 )
	2456	ROM_REGION( 0x100000, "maincpu", 0 )
2465	2457	ROM_LOAD16_WORD_SWAP( "060-p1.bin", 0x000000, 0x080000, CRC(3032041b) SHA1(4b8ed2e6f74579ea35a53e06ccac42d6905b0f51) )
2466	2458	ROM_LOAD16_WORD_SWAP( "060-p2.bin", 0x080000, 0x080000, CRC(b0801d5f) SHA1(085746d8f5d271d5f84ccbb7f577193c391f88d4) )
2467	2459
r8962	r8963
2483	2475	ROM_END
2484	2476
2485	2477	ROM_START( fightfeva ) /* MVS ONLY RELEASE */
2486		ROM_REGION( 0x200000, "maincpu", 0 )
	2478	ROM_REGION( 0x100000, "maincpu", 0 )
2487	2479	ROM_LOAD16_WORD_SWAP( "060-p1.rom", 0x0000000, 0x100000, CRC(2a104b50) SHA1(3eb663d3df7074e1cdf4c0e450a35c9cf55d8979) )
2488	2480	/* There was also a copy of the 060-p1.bin with the name 060-p2.bin maybe it should be loaded over the top or this
2489	2481	larger rom is an older revision... */
r8962	r8963
2611	2603	ROM_LOAD16_BYTE( "063-c8.bin", 0xc00001, 0x200000, CRC(1ffc6dfa) SHA1(acea18aca76c072e0bac2a364fc96d49cfc86e77) ) /* Plane 2,3 */
2612	2604	ROM_END
2613	2605
2614		ROM_START( wh2j ) /* MVS VERSION */
	2606	ROM_START( wh2j ) /* MVS AND AES VERSION */
2615	2607	ROM_REGION( 0x200000, "maincpu", 0 )
2616	2608	ROM_LOAD16_WORD_SWAP( "064-p1.bin", 0x100000, 0x100000, CRC(385a2e86) SHA1(cfde4a1aeae038a3d6ca9946065624f097682d3d) )
2617	2609	ROM_CONTINUE( 0x000000, 0x100000 )
r8962	r8963
2627	2619	NO_DELTAT_REGION
2628	2620
2629	2621	ROM_REGION( 0x1000000, "sprites", 0 )
2630		ROM_LOAD16_BYTE( "064-c13.bin", 0x000000, 0x400000, CRC(771a6365) SHA1(646bdf3a79819fbca98f513c172b9e9500c073be) ) /* Plane 0,1 */
2631		ROM_LOAD16_BYTE( "064-c24.bin", 0x000001, 0x400000, CRC(e7863a05) SHA1(39d34119137216f914b8b8b7b3e622a6c210f130) ) /* Plane 2,3 */
2632		ROM_LOAD16_BYTE( "064-c57.bin", 0x800000, 0x400000, CRC(64594ed4) SHA1(982dbb932c0cb2eb9292bf19c463fd618c8180f3) ) /* Plane 0,1 */
2633		ROM_LOAD16_BYTE( "064-c68.bin", 0x800001, 0x400000, CRC(6e385398) SHA1(e74a0e72876bff8766152b76e5d94f2958b03cf2) ) /* Plane 2,3 */
2634		ROM_END
2635
2636		ROM_START( wh2jh ) /* AES VERSION */
2637		ROM_REGION( 0x200000, "maincpu", 0 )
2638		ROM_LOAD16_WORD_SWAP( "064-p1.bin", 0x100000, 0x100000, CRC(385a2e86) SHA1(cfde4a1aeae038a3d6ca9946065624f097682d3d) )
2639		ROM_CONTINUE( 0x000000, 0x100000 )
2640
2641		NEO_SFIX_128K( "064-s1.bin", CRC(2a03998a) SHA1(5e33f469982f12d4622a06d323a345f192bf88e6) )
2642
2643		NEO_BIOS_AUDIO_128K( "064-m1.bin", CRC(d2eec9d3) SHA1(09478787045f1448d19d064dd3d540d1741fd619) )
2644
2645		ROM_REGION( 0x400000, "ymsnd", 0 )
2646		ROM_LOAD( "064-v1.bin", 0x000000, 0x200000, CRC(aa277109) SHA1(35c22b15bb0a4d0ab118cb22a2d450d03995a17c) )
2647		ROM_LOAD( "064-v2.bin", 0x200000, 0x200000, CRC(b6527edd) SHA1(2bcf5bfa6e117cf4a3728a5e5f5771313c93f22a) )
2648
2649		NO_DELTAT_REGION
2650
2651		ROM_REGION( 0x1000000, "sprites", 0 )
2652	2622	ROM_LOAD16_BYTE( "064-c1.bin", 0x000000, 0x200000, CRC(2ec87cea) SHA1(e713ec7839a7665edee6ee3f82a6e530b3b4bd7c) ) /* Plane 0,1 */
2653	2623	ROM_LOAD16_BYTE( "064-c2.bin", 0x000001, 0x200000, CRC(526b81ab) SHA1(b5f0a2f04489539ed6b9d0810b12787356c64b23) ) /* Plane 2,3 */
2654	2624	ROM_LOAD16_BYTE( "064-c3.bin", 0x400000, 0x200000, CRC(436d1b31) SHA1(059776d77b91377ed0bcfc278802d659c917fc0f) ) /* Plane 0,1 */
r8962	r8963
3395	3365	ROM_END
3396	3366
3397	3367	ROM_START( rbff1a ) /* MVS VERSION */
3398		ROM_REGION( 0x300000, "maincpu", 0 )
3399
3400	3368	/* This is a bug fixed revision applied over the original cart. The original P1 and P2 stayed in the cart and this */
3401	3369	/* 512k ROM was added to replace the first 512k of P1. */
3402
	3370	ROM_REGION( 0x300000, "maincpu", 0 )
3403	3371	ROM_LOAD16_WORD_SWAP( "095-p1.bin",  0x000000, 0x100000, CRC(63b4d8ae) SHA1(03aa9f6bab6aee685d1b57a52823797704eea845) )
3404	3372	ROM_LOAD16_WORD_SWAP( "095-p2.bin",  0x100000, 0x200000, CRC(cc15826e) SHA1(44d6ac6c0ca697a6f367dcfd809b1e1771cb0635) )
3405	3373	/* the rom below acts as a patch to the program rom in the cart, replacing the first 512kb */
r8962	r8963
4019	3987	ROM_END
4020	3988
4021	3989	ROM_START( twinspri )
4022		ROM_REGION( 0x400000, "maincpu", 0 )
	3990	ROM_REGION( 0x200000, "maincpu", 0 )
4023	3991	ROM_LOAD16_WORD_SWAP( "224-p1.bin", 0x100000, 0x100000, CRC(7697e445) SHA1(5b55ca120f77a931d40719b14e0bfc8cac1d628c) )
4024	3992	ROM_CONTINUE( 0x000000, 0x100000 )
4025	3993
r8962	r8963
4087	4055	ROM_END
4088	4056
4089	4057	ROM_START( ghostlop )
4090		ROM_REGION( 0x200000, "maincpu", 0 )
	4058	ROM_REGION( 0x100000, "maincpu", 0 )
4091	4059	ROM_LOAD16_WORD_SWAP( "gl-p1.bin", 0x000000, 0x100000, CRC(6033172e) SHA1(f57fb706aa8dd9e5f9e992a5d35c1799578b59f8) )
4092	4060
4093	4061	NEO_SFIX_128K( "gl-s1.bin", CRC(83c24e81) SHA1(585ef209d8bfc23bdccc1f37d8b764eeedfedc1c) )
r8962	r8963
4315	4283
4316	4284	ROM_START( irrmaze ) /* MVS ONLY RELEASE */
4317	4285	ROM_REGION( 0x200000, "maincpu", 0 )
4318		ROM_LOAD16_WORD_SWAP( "236-p1.bin", 0x000000, 0x200000, CRC(6d536c6e) SHA1(87d66683304a6617da8af7dfdfcbf4a3ab63056a) )
	4286	ROM_LOAD16_WORD_SWAP( "236-p1.bin", 0x100000, 0x100000, CRC(4c2ff660) SHA1(4a0cbd09044648ff9ec67723729f16d422c34bda) )
	4287	ROM_CONTINUE( 0x000000, 0x100000 )
4319	4288
4320	4289	NEO_SFIX_128K( "236-s1.bin", CRC(5d1ca640) SHA1(40a9668a1742a44597a07ce72273d17119815637) )
4321	4290
r8962	r8963
4385	4354	ROM_LOAD16_BYTE( "238-c8.bin", 0x1800001, 0x400000, CRC(1c7c2efb) SHA1(b055ee43cbdaf9a3cb19e4e1f9dd2c40bde69d70) ) /* Plane 2,3 */
4386	4355	ROM_END
4387	4356
4388		ROM_START( shocktra ) /* MVS ONLY RELEASE */
	4357	ROM_START( shocktroa ) /* MVS ONLY RELEASE */
4389	4358	ROM_REGION( 0x500000, "maincpu", 0 )
4390	4359	ROM_LOAD16_WORD_SWAP( "238-pg1.bin", 0x000000, 0x100000, CRC(efedf8dc) SHA1(f638df9bf7aa7d514ee2bccfc7f2adbf39ca83fc) )
4391	4360	ROM_LOAD16_WORD_SWAP( "238-p2.bin", 0x100000, 0x400000, CRC(5b4a09c5) SHA1(de04036cba2da4bb2da73d902d1822b82b4f67a9) )
r8962	r8963
4836	4805	ROM_LOAD16_BYTE( "250-c6.bin", 0x2000001, 0x800000, CRC(83e3e69d) SHA1(39be66287696829d243fb71b3fb8b7dc2bc3298f) ) /* Plane 0,1 */
4837	4806	ROM_END
4838	4807
4839		ROM_START( kof99 ) /* Original Version - Encrypted Code & GFX */ /* AES VERSION */
	4808	ROM_START( kof99 ) /* Original Version - Encrypted Code & GFX */ /* MVS VERSION */
4840	4809	ROM_REGION( 0x900000, "maincpu", 0 )
4841		ROM_LOAD16_WORD_SWAP( "251-sma.kc",  0x0c0000, 0x040000, CRC(6c9d0647) SHA1(2a0ce62ca6c18007e8fbe1b60475c7874ab79389) )   /* stored in the custom chip */
4842		ROM_LOAD16_WORD_SWAP( "251-p1.bin",  0x100000, 0x400000, CRC(006e4532) SHA1(47791ab4044ad55988b1d3412d95b65b91a163c8) )
4843		ROM_LOAD16_WORD_SWAP( "251-pg2.bin", 0x500000, 0x400000, CRC(d9057f51) SHA1(8d365b4dd40351495df99d6c765df1434b0b0548) )
	4810	ROM_LOAD16_WORD_SWAP( "251-sma.ka", 0x0c0000, 0x040000, CRC(7766d09e) SHA1(4e0a49d1ad669a62676cb30f527c6590cde80194) )   /* stored in the custom chip */
	4811	ROM_LOAD16_WORD_SWAP( "251-p1.bin", 0x100000, 0x400000, CRC(006e4532) SHA1(47791ab4044ad55988b1d3412d95b65b91a163c8) )
	4812	ROM_LOAD16_WORD_SWAP( "251-p2.bin", 0x500000, 0x400000, CRC(90175f15) SHA1(aa9e75810438a8b45808a8bf32cb04d91b5c0b3a) )
4844	4813
4845	4814	ROM_Y_ZOOM
4846	4815
r8962	r8963
4872	4841	ROM_LOAD16_BYTE( "251-c8.bin", 0x3000001, 0x800000, CRC(8d921c68) SHA1(42acf1d27d52a8e3b6262eb7df50693c0b135565) ) /* Plane 2,3 */
4873	4842	ROM_END
4874	4843
4875		ROM_START( kof99a ) /* Original Version - Encrypted Code & GFX */ /* MVS VERSION */
	4844	ROM_START( kof99h ) /* Original Version - Encrypted Code & GFX */ /* AES VERSION */
4876	4845	ROM_REGION( 0x900000, "maincpu", 0 )
4877		ROM_LOAD16_WORD_SWAP( "251-sma.ka", 0x0c0000, 0x040000, CRC(7766d09e) SHA1(4e0a49d1ad669a62676cb30f527c6590cde80194) )   /* stored in the custom chip */
4878		ROM_LOAD16_WORD_SWAP( "251-p1.bin", 0x100000, 0x400000, CRC(006e4532) SHA1(47791ab4044ad55988b1d3412d95b65b91a163c8) )
4879		ROM_LOAD16_WORD_SWAP( "251-p2.bin", 0x500000, 0x400000, CRC(90175f15) SHA1(aa9e75810438a8b45808a8bf32cb04d91b5c0b3a) )
	4846	ROM_LOAD16_WORD_SWAP( "251-sma.kc",  0x0c0000, 0x040000, CRC(6c9d0647) SHA1(2a0ce62ca6c18007e8fbe1b60475c7874ab79389) )   /* stored in the custom chip */
	4847	ROM_LOAD16_WORD_SWAP( "251-p1.bin",  0x100000, 0x400000, CRC(006e4532) SHA1(47791ab4044ad55988b1d3412d95b65b91a163c8) )
	4848	ROM_LOAD16_WORD_SWAP( "251-pg2.bin", 0x500000, 0x400000, CRC(d9057f51) SHA1(8d365b4dd40351495df99d6c765df1434b0b0548) )
4880	4849
4881	4850	ROM_Y_ZOOM
4882	4851
r8962	r8963
4911	4880	ROM_START( kof99e ) /* Original Version - Encrypted Code & GFX */
4912	4881	ROM_REGION( 0x900000, "maincpu", 0 )
4913	4882	ROM_LOAD16_WORD_SWAP( "251-sma.ka", 0x0c0000, 0x040000, CRC(7766d09e) SHA1(4e0a49d1ad669a62676cb30f527c6590cde80194) )   /* stored in the custom chip */
	4883	/* Is the SMA for this set correct? A set with this layout and a SMA.KB is known */
4914	4884	ROM_LOAD16_WORD_SWAP( "251-ep1.p1", 0x100000, 0x200000, CRC(1e8d692d) SHA1(eea1aa8c0a17f089ac14831889c36535e559072c) )
4915	4885	ROM_LOAD16_WORD_SWAP( "251-ep2.p2", 0x300000, 0x200000, CRC(d6206e5a) SHA1(0e1100d03c40c6d5cfa899d009e319ae73fce6b8) )
4916	4886	ROM_LOAD16_WORD_SWAP( "251-ep3.p3", 0x500000, 0x200000, CRC(d58c3ef8) SHA1(f927d90d55b49944f448d6286e0cb913cc70ade1) )
r8962	r8963
5429	5399
5430	5400	ROM_START( sengoku3 ) /* Original Version - Encrypted GFX */
5431	5401	ROM_REGION( 0x200000, "maincpu", 0 )
5432		//ROM_LOAD16_WORD_SWAP( "261-p1.bin", 0x100000, 0x100000, CRC(5b557201) SHA1(d01421d1dc80fe7d2a46b9f79c0f344b3c81c1e7) ) this one is almost certainly bad
5433	5402	ROM_LOAD16_WORD_SWAP( "261-ph1.bin", 0x100000, 0x100000, CRC(e0d4bc0a) SHA1(8df366097f224771ca6d1aa5c1691cd46776cd12) )
5434	5403	ROM_CONTINUE( 0x000000, 0x100000 )
5435	5404
r8962	r8963
5441	5410	ROM_REGION( 0x20000, "fixedbios", 0 )
5442	5411	ROM_LOAD( "sfix.sfix", 0x000000, 0x20000, CRC(c2ea0cfd) SHA1(fd4a618cdcdbf849374f0a50dd8efe9dbab706c3) )
5443	5412
5444		NEO_BIOS_AUDIO_128K( "261-m1.bin", CRC(36ed9cdd) SHA1(78a7d755e9e9f52255ac6228d9d402fd6a02c126) )
	5413	NEO_BIOS_AUDIO_512K( "261-m1.bin", CRC(7d501c39) SHA1(8e6bcc428f5ac7532d9c9be7e07ad0821461a080) )
5445	5414
5446	5415	ROM_REGION( 0x0e00000, "ymsnd", 0 )
5447	5416	ROM_LOAD( "261-v1.bin", 0x000000, 0x400000, CRC(64c30081) SHA1(f9ebd20cf59b72e864b7274c1bdb6d99ecaf4595) )
r8962	r8963
5532	5501	ROM_END
5533	5502
5534	5503	ROM_START( mslug4 ) /* Original Version - Encrypted GFX */ /* MVS VERSION */
5535		/* There also exist carts where p1 label is pg1;
5536		The PG1 revision has a Japanese cart label, SN 02Jxxxxx
5537		The P1 revision has a US/EUR cart label, SN 02Txxxxx
5538		Rom data on both is identical.
	5504	/* There also exist carts where p1 label is pg1; the PG1 revision has a Japanese cart label, SN 02Jxxxxx
	5505	The P1 revision has a US/EUR cart label, SN 02Txxxxx ; Rom data on both is identical.
5539	5506	These carts were manufactured by Mega Enterprise, not SNK. */
5540	5507	ROM_REGION( 0x500000, "maincpu", 0 )
5541	5508	ROM_LOAD16_WORD_SWAP( "263-p1.bin", 0x000000, 0x100000, CRC(27e4def3) SHA1(a08785e8145981bb6b5332a3b2df7eb321253cca) )
r8962	r8963
8327	8294	GAME( 1991, kotm,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "King of the Monsters (set 1)", GAME_SUPPORTS_SAVE )
8328	8295	GAME( 1991, kotmh,     kotm,     neogeo,   neogeo,   neogeo,   ROT0, "SNK", "King of the Monsters (set 2)", GAME_SUPPORTS_SAVE )
8329	8296	GAME( 1991, sengoku,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku / Sengoku Denshou (set 1)", GAME_SUPPORTS_SAVE )
8330		GAME( 1991, sengokh,   sengoku,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku / Sengoku Denshou (set 2)", GAME_SUPPORTS_SAVE )
	8297	GAME( 1991, sengokuh,  sengoku,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku / Sengoku Denshou (set 2)", GAME_SUPPORTS_SAVE )
8331	8298	GAME( 1991, burningf,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Burning Fight (set 1)", GAME_SUPPORTS_SAVE )
8332	8299	GAME( 1991, burningfh, burningf, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Burning Fight (set 2)", GAME_SUPPORTS_SAVE )
8333	8300	GAME( 1990, lbowling,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "League Bowling", GAME_SUPPORTS_SAVE )
r8962	r8963
8364	8331	GAME( 1994, aof2,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 2 / Ryuuko no Ken 2 (set 1)", GAME_SUPPORTS_SAVE )
8365	8332	GAME( 1994, aof2a,     aof2,     neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 2 / Ryuuko no Ken 2 (set 2)", GAME_SUPPORTS_SAVE )
8366	8333	GAME( 1993, fatfursp,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury Special / Garou Densetsu Special (set 1)", GAME_SUPPORTS_SAVE )
8367		GAME( 1993, fatfursa, fatfursp, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury Special / Garou Densetsu Special (set 2)", GAME_SUPPORTS_SAVE )
	8334	GAME( 1993, fatfurspa, fatfursp, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury Special / Garou Densetsu Special (set 2)", GAME_SUPPORTS_SAVE )
8368	8335	GAME( 1995, savagere,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Savage Reign / Fu'un Mokushiroku - kakutou sousei", GAME_SUPPORTS_SAVE )
8369	8336	GAME( 1994, ssideki2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Super Sidekicks 2 - The World Championship / Tokuten Ou 2 - real fight football", GAME_SUPPORTS_SAVE )
8370	8337	GAME( 1994, samsho2,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown II / Shin Samurai Spirits - Haohmaru jigokuhen", GAME_SUPPORTS_SAVE )
r8962	r8963
8408	8375	GAME( 1998, neocup98,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Neo-Geo Cup '98 - The Road to the Victory", GAME_SUPPORTS_SAVE )
8409	8376	GAME( 1999, mslugx,    neogeo,   neogeo,   neogeo,   mslugx,   ROT0, "SNK", "Metal Slug X - Super Vehicle-001", GAME_SUPPORTS_SAVE )
8410	8377	GAME( 1999, kof99,     neogeo,   neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (set 1)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX */
8411		GAME( 1999, kof99a,    kof99,    neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (set 2)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX, crashes going into attract demo */
	8378	GAME( 1999, kof99h,    kof99,    neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (set 2)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX, crashes going into attract demo */
8412	8379	GAME( 1999, kof99e,    kof99,    neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (earlier)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX */
8413	8380	GAME( 1999, kof99k,    kof99,    neogeo,   neogeo,   kof99k,   ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (Korean release)" , GAME_SUPPORTS_SAVE )   /* Encrypted GFX */
8414	8381	GAME( 1999, kof99p,    kof99,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (prototype)", GAME_SUPPORTS_SAVE )
r8962	r8963
8478	8445	GAME( 1992, wh1h,      wh1,      neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "World Heroes (set 2)", GAME_SUPPORTS_SAVE )
8479	8446	GAME( 1992, wh1ha,     wh1,      neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "World Heroes (set 3)", GAME_SUPPORTS_SAVE )
8480	8447	GAME( 1993, wh2,       neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK",              "World Heroes 2", GAME_SUPPORTS_SAVE )
8481		GAME( 1994, wh2j,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes 2 Jet (set 1)", GAME_SUPPORTS_SAVE )
8482		GAME( 1994, wh2jh,     wh2j,     neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes 2 Jet (set 2)", GAME_SUPPORTS_SAVE )
	8448	GAME( 1994, wh2j,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes 2 Jet", GAME_SUPPORTS_SAVE )
8483	8449	GAME( 1994, aodk,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "Aggressors of Dark Kombat / Tsuukai GANGAN Koushinkyoku", GAME_SUPPORTS_SAVE )
8484	8450	GAME( 1995, whp,       neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes Perfect", GAME_SUPPORTS_SAVE )
8485	8451	GAME( 1995, mosyougi,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "Syougi No Tatsujin - Master of Syougi", GAME_SUPPORTS_SAVE )
r8962	r8963
8539	8505	GAME( 1996, pgoal,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Pleasure Goal / Futsal - 5 on 5 Mini Soccer", GAME_SUPPORTS_SAVE )
8540	8506	GAME( 1996, stakwin2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Stakes Winner 2", GAME_SUPPORTS_SAVE )
8541	8507	GAME( 1997, shocktro,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers (set 1)", GAME_SUPPORTS_SAVE )
8542		GAME( 1997, shocktra, shocktro, neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers (set 2)", GAME_SUPPORTS_SAVE )
	8508	GAME( 1997, shocktroa, shocktro, neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers (set 2)", GAME_SUPPORTS_SAVE )
8543	8509	GAME( 1998, shocktr2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers - 2nd Squad", GAME_SUPPORTS_SAVE )
8544	8510	GAME( 1998, lans2004,  shocktr2, neogeo,   neogeo,   lans2004, ROT0, "bootleg", "Lansquenet 2004 (Shock Troopers - 2nd Squad bootleg)", GAME_SUPPORTS_SAVE )
8545	8511

src/mame/drivers/eolithsp.c

r8962	r8963
17	17	static int eolith_vblank = 0;
18	18	static int eolith_scanline = 0;
19	19
20		void eolith_speedup_read(const address_space *space)
	20	void eolith_speedup_read(address_space *space)
21	21	{
22	22	/* for debug */
23	23	//  if ((cpu_get_pc(space->cpu)!=eolith_speedup_address) && (eolith_vblank!=1) )

src/mame/drivers/segas16a.c

r8962	r8963
597	597	static void quartet_i8751_sim(running_machine *machine)
598	598	{
599	599	segas1x_state *state = machine->driver_data<segas1x_state>();
600		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	600	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
601	601
602	602	/* signal a VBLANK to the main CPU */
603	603	cpu_set_input_line(state->maincpu, 4, HOLD_LINE);
r8962	r8963
858	858	INLINE UINT8 maincpu_byte_r(running_machine *machine, offs_t offset)
859	859	{
860	860	segas1x_state *state = machine->driver_data<segas1x_state>();
861		return memory_read_byte(cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM), offset);
	861	return downcast<cpu_device *>(state->maincpu)->space(AS_PROGRAM)->read_byte(offset);
862	862	}
863	863
864	864
865	865	INLINE void maincpu_byte_w(running_machine *machine, offs_t offset, UINT8 data)
866	866	{
867	867	segas1x_state *state = machine->driver_data<segas1x_state>();
868		memory_write_byte(cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM), offset, data);
	868	downcast<cpu_device *>(state->maincpu)->space(AS_PROGRAM)->write_byte(offset, data);
869	869	}
870	870
871	871

src/mame/drivers/neogeo.c

r8962	r8963
260	260	}
261	261
262	262
263		void neogeo_set_display_counter_msb( const address_space *space, UINT16 data )
	263	void neogeo_set_display_counter_msb( address_space *space, UINT16 data )
264	264	{
265	265	neogeo_state *state = space->machine->driver_data<neogeo_state>();
266	266
r8962	r8963
270	270	}
271	271
272	272
273		void neogeo_set_display_counter_lsb( const address_space *space, UINT16 data )
	273	void neogeo_set_display_counter_lsb( address_space *space, UINT16 data )
274	274	{
275	275	neogeo_state *state = space->machine->driver_data<neogeo_state>();
276	276
r8962	r8963
507	507	else
508	508	{
509	509	state->recurse = 1;
510		ret = memory_read_word(space, cpu_get_pc(space->cpu));
	510	ret = space->read_word(cpu_get_pc(space->cpu));
511	511	state->recurse = 0;
512	512	}
513	513
r8962	r8963
717	717	}
718	718
719	719
720		void neogeo_set_main_cpu_bank_address( const address_space *space, UINT32 bank_address )
	720	void neogeo_set_main_cpu_bank_address( address_space *space, UINT32 bank_address )
721	721	{
722	722	neogeo_state *state = space->machine->driver_data<neogeo_state>();
723	723
r8962	r8963
753	753
754	754	static void main_cpu_banking_init( running_machine *machine )
755	755	{
756		const address_space *mainspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	756	address_space *mainspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
757	757
758	758	/* create vector banks */
759	759	memory_configure_bank(machine, NEOGEO_BANK_VECTORS, 0, 1, memory_region(machine, "mainbios"), 0);
r8962	r8963
784	784	}
785	785
786	786
787		static void audio_cpu_bank_select( const address_space *space, int region, UINT8 bank )
	787	static void audio_cpu_bank_select( address_space *space, int region, UINT8 bank )
788	788	{
789	789	neogeo_state *state = space->machine->driver_data<neogeo_state>();
790	790
r8962	r8963
828	828	}
829	829
830	830
831		static void _set_audio_cpu_rom_source( const address_space *space )
	831	static void _set_audio_cpu_rom_source( address_space *space )
832	832	{
833	833	neogeo_state *state = space->machine->driver_data<neogeo_state>();
834	834
r8962	r8963
849	849	}
850	850
851	851
852		static void set_audio_cpu_rom_source( const address_space *space, UINT8 data )
	852	static void set_audio_cpu_rom_source( address_space *space, UINT8 data )
853	853	{
854	854	neogeo_state *state = space->machine->driver_data<neogeo_state>();
855	855	state->audio_cpu_rom_source = data;
r8962	r8963
1117	1117	{
1118	1118	neogeo_state *state = machine->driver_data<neogeo_state>();
1119	1119	offs_t offs;
1120		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1120	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1121	1121
1122	1122	/* reset system control registers */
1123	1123	for (offs = 0; offs < 8; offs++)

src/mame/drivers/segahang.c

r8962	r8963
285	285	static WRITE8_DEVICE_HANDLER( sound_latch_w )
286	286	{
287	287	segas1x_state *state = device->machine->driver_data<segas1x_state>();
288		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	288	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
289	289	soundlatch_w(space, offset, data);
290	290	}
291	291
r8962	r8963
1866	1866
1867	1867	static DRIVER_INIT( endurobl )
1868	1868	{
1869		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1869	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1870	1870	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
1871	1871	UINT16 *decrypt = auto_alloc_array(machine, UINT16, 0x40000/2);
1872	1872
1873	1873	hangon_generic_init(machine);
1874		memory_set_decrypted_region(space, 0x000000, 0x03ffff, decrypt);
	1874	space->set_decrypted_region(0x000000, 0x03ffff, decrypt);
1875	1875
1876	1876	memcpy(decrypt + 0x00000/2, rom + 0x30000/2, 0x10000);
1877	1877	memcpy(decrypt + 0x10000/2, rom + 0x10000/2, 0x20000);
r8962	r8963
1880	1880
1881	1881	static DRIVER_INIT( endurob2 )
1882	1882	{
1883		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1883	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1884	1884	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
1885	1885	UINT16 *decrypt = auto_alloc_array(machine, UINT16, 0x40000/2);
1886	1886
1887	1887	hangon_generic_init(machine);
1888		memory_set_decrypted_region(space, 0x000000, 0x03ffff, decrypt);
	1888	space->set_decrypted_region(0x000000, 0x03ffff, decrypt);
1889	1889
1890	1890	memcpy(decrypt, rom, 0x30000);
1891	1891	/* missing data ROM */

src/mame/drivers/statriv2.c

r8962	r8963
1102	1102
1103	1103	static DRIVER_INIT( laserdisc )
1104	1104	{
1105		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1105	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1106	1106	memory_install_readwrite8_handler(iospace, 0x28, 0x2b, 0, 0, laserdisc_io_r, laserdisc_io_w);
1107	1107	}
1108	1108

src/mame/drivers/ladybug.c

r8962	r8963
1068	1068	/* decode the opcodes */
1069	1069
1070	1070	offs_t i;
1071		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1071	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1072	1072	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x6000);
1073	1073	UINT8 *rom = memory_region(machine, "maincpu");
1074	1074	UINT8 *table = memory_region(machine, "user1");
1075	1075
1076		memory_set_decrypted_region(space, 0x0000, 0x5fff, decrypted);
	1076	space->set_decrypted_region(0x0000, 0x5fff, decrypted);
1077	1077
1078	1078	for (i = 0; i < 0x6000; i++)
1079	1079	decrypted[i] = table[rom[i]];

src/mame/drivers/asterix.c

r8962	r8963
107	107	{
108	108	case 0x64:
109	109	{
110		UINT32 param1 = (memory_read_word(space, cmd & 0xffffff) << 16) | memory_read_word(space, (cmd & 0xffffff) + 2);
111		UINT32 param2 = (memory_read_word(space, (cmd & 0xffffff) + 4) << 16) | memory_read_word(space, (cmd & 0xffffff) + 6);
	110	UINT32 param1 = (space->read_word(cmd & 0xffffff) << 16) | space->read_word((cmd & 0xffffff) + 2);
	111	UINT32 param2 = (space->read_word((cmd & 0xffffff) + 4) << 16) | space->read_word((cmd & 0xffffff) + 6);
112	112
113	113	switch (param1 >> 24)
114	114	{
r8962	r8963
119	119	param2 &= 0xffffff;
120	120	while(size >= 0)
121	121	{
122		memory_write_word(space, param2, memory_read_word(space, param1));
	122	space->write_word(param2, space->read_word(param1));
123	123	param1 += 2;
124	124	param2 += 2;
125	125	size--;
r8962	r8963
147	147	{
148	148	case 0x64:
149	149	{
150		UINT32 param1 = (memory_read_word(space, cmd & 0xffffff) << 16)
151		| memory_read_word(space, (cmd & 0xffffff) + 2);
152		UINT32 param2 = (memory_read_word(space, (cmd & 0xffffff) + 4) << 16)
153		| memory_read_word(space, (cmd & 0xffffff) + 6);
	150	UINT32 param1 = (space->read_word(cmd & 0xffffff) << 16)
	151	| space->read_word((cmd & 0xffffff) + 2);
	152	UINT32 param2 = (space->read_word((cmd & 0xffffff) + 4) << 16)
	153	| space->read_word((cmd & 0xffffff) + 6);
154	154
155	155	switch (param1 >> 24)
156	156	{
r8962	r8963
161	161	param2 &= 0xffffff;
162	162	while(size >= 0)
163	163	{
164		memory_write_word(space, param2, memory_read_word(space, param1));
	164	space->write_word(param2, space->read_word(param1));
165	165	param1 += 2;
166	166	param2 += 2;
167	167	size--;

src/mame/drivers/goldnpkr.c

r8962	r8963
54	54	* Buena Suerte (Spanish, set 20).           1991, Unknown.
55	55	* Buena Suerte (Spanish, set 21).           1991, Unknown.
56	56	* Buena Suerte (Spanish, set 22).           1991, Unknown.
	57	* Genie.                                    198?, Video Fun Games Ltd.
57	58
58	59
59	60	*******************************************************************************
r8962	r8963
626	627	#include "goldnpkr.lh"
627	628
628	629
629		/*************************
630		*     Video Hardware     *
631		*************************/
	630	/*********************************************
	631	*               Video Hardware               *
	632	*********************************************/
632	633
633	634	static UINT8 *videoram;
634	635	static UINT8 *colorram;
r8962	r8963
666	667
667	668	static VIDEO_START( goldnpkr )
668	669	{
669		bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 29);
	670	bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
670	671	}
671	672
672	673	static VIDEO_UPDATE( goldnpkr )
r8962	r8963
766	767	}
767	768
768	769
769		/***********************
770		*     R/W Handlers     *
771		***********************/
	770	/*******************************************
	771	*               R/W Handlers               *
	772	*******************************************/
772	773
773	774	static int mux_data = 0;
774	775	static UINT8 pia0_PA_data;
r8962	r8963
889	890	}
890	891
891	892
892		/*************************
893		* Memory Map Information *
894		*************************/
	893	/*********************************************
	894	*           Memory Map Information           *
	895	*********************************************/
895	896
896	897	static ADDRESS_MAP_START( goldnpkr_map, ADDRESS_SPACE_PROGRAM, 8 )
897	898	ADDRESS_MAP_GLOBAL_MASK(0x7fff)
r8962	r8963
943	944
944	945	*/
945	946
946		/*************************
947		*      Input Ports       *
948		*************************/
	947	static ADDRESS_MAP_START( genie_map, ADDRESS_SPACE_PROGRAM, 8 )
	948	ADDRESS_MAP_GLOBAL_MASK(0x3fff)
	949	AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)   /* battery backed RAM */
	950	AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("crtc", mc6845_address_w)
	951	AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
	952	AM_RANGE(0x0844, 0x0847) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w)
	953	AM_RANGE(0x0848, 0x084b) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w)
	954	AM_RANGE(0x1000, 0x17ff) AM_RAM_WRITE(goldnpkr_videoram_w) AM_BASE(&videoram)
	955	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(goldnpkr_colorram_w) AM_BASE(&colorram)
	956	AM_RANGE(0x2000, 0x3fff) AM_ROM
	957	ADDRESS_MAP_END
949	958
	959
	960	/*********************************************
	961	*                Input Ports                 *
	962	*********************************************/
	963
950	964	static INPUT_PORTS_START( goldnpkr )
951	965	/* Multiplexed - 4x5bits */
952	966	PORT_START("IN0-0")
r8962	r8963
1960	1974	PORT_DIPSETTING(    0x00, "Oculta" )
1961	1975	INPUT_PORTS_END
1962	1976
	1977	static INPUT_PORTS_START( genie )
	1978	/* Multiplexed - 4x5bits */
	1979	PORT_START("IN0-0")
	1980	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET )   PORT_CODE(KEYCODE_1)
	1981	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK )  PORT_NAME("Bookkeeping")
	1982	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
	1983	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL )  PORT_NAME("Play")
	1984	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL )
	1985	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1986	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1987	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1963	1988
1964		/*************************
1965		*    Graphics Layouts    *
1966		*************************/
	1989	PORT_START("IN0-1")
	1990	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1991	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )        PORT_NAME("Collect") PORT_CODE(KEYCODE_W)
	1992	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE )
	1993	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH )
	1994	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_LOW )
	1995	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1996	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1997	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1967	1998
	1999	PORT_START("IN0-2")
	2000	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
	2001	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
	2002	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )
	2003	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )
	2004	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
	2005	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2006	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2007	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2008
	2009	PORT_START("IN0-3")
	2010	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Settings") PORT_CODE(KEYCODE_9)
	2011	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2012	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 )   PORT_NAME("Coupon (Note In)")
	2013	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 )   PORT_IMPULSE(3) PORT_NAME("Coin In")
	2014	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2015	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2016	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2017	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2018
	2019	PORT_START("SW1")
	2020	/* only bits 4-7 are connected here and were routed to SW1 1-4 */
	2021	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
	2022	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	2023	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2024	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) )
	2025	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	2026	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2027	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
	2028	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	2029	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2030	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
	2031	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	2032	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2033	PORT_DIPNAME( 0x10, 0x00, "Min Wining Hand" )   PORT_DIPLOCATION("SW1:1")
	2034	PORT_DIPSETTING(    0x10, "Double Pair" )
	2035	PORT_DIPSETTING(    0x00, "Pair of 11's" )
	2036	PORT_DIPNAME( 0x20, 0x20, "50hz/60hz" )         PORT_DIPLOCATION("SW1:2")
	2037	PORT_DIPSETTING(    0x20, "50hz" )
	2038	PORT_DIPSETTING(    0x00, "60hz" )
	2039	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW1:3")
	2040	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	2041	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2042	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW1:4")
	2043	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	2044	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2045	INPUT_PORTS_END
	2046
	2047
	2048	/*********************************************
	2049	*              Graphics Layouts              *
	2050	*********************************************/
	2051
1968	2052	static const gfx_layout tilelayout =
1969	2053	{
1970	2054	8, 8,
r8962	r8963
1977	2061	};
1978	2062
1979	2063
1980		/******************************
1981		* Graphics Decode Information *
1982		******************************/
	2064	/**************************************************
	2065	*           Graphics Decode Information           *
	2066	**************************************************/
1983	2067
1984	2068	static GFXDECODE_START( goldnpkr )
1985	2069	GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 16 )
r8962	r8963
1987	2071	GFXDECODE_END
1988	2072
1989	2073
1990		/***********************
1991		*    PIA Interfaces    *
1992		***********************/
	2074	/*******************************************
	2075	*              PIA Interfaces              *
	2076	*******************************************/
1993	2077
1994	2078	/***** Golden Poker Double Up *****/
1995	2079
r8962	r8963
2044	2128	};
2045	2129
2046	2130
2047		/************************
2048		*    CRTC Interface    *
2049		************************/
	2131	/*******************************************
	2132	*              CRTC Interface              *
	2133	*******************************************/
2050	2134
2051	2135	static const mc6845_interface mc6845_intf =
2052	2136	{
r8962	r8963
2063	2147	};
2064	2148
2065	2149
2066		/**************************************
2067		*       Discrete Sound Routines       *
2068		***************************************
	2150	/**********************************************************
	2151	*                 Discrete Sound Routines                 *
	2152	***********************************************************
2069	2153
2070	2154	Golden Poker Double-Up discrete sound circuitry.
2071	2155	------------------------------------------------
r8962	r8963
2199	2283	DISCRETE_SOUND_END
2200	2284
2201	2285
2202		/*************************
2203		*    Machine Drivers     *
2204		*************************/
	2286	/*********************************************
	2287	*              Machine Drivers               *
	2288	*********************************************/
2205	2289
2206	2290	static MACHINE_DRIVER_START( goldnpkr_base )
2207	2291
r8962	r8963
2262	2346	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
2263	2347	MACHINE_DRIVER_END
2264	2348
	2349
2265	2350	static MACHINE_DRIVER_START( witchcrd )
2266	2351
2267	2352	MDRV_IMPORT_FROM(goldnpkr_base)
r8962	r8963
2283	2368	MACHINE_DRIVER_END
2284	2369
2285	2370
2286		/*************************
2287		*        Rom Load        *
2288		*************************/
	2371	static MACHINE_DRIVER_START( genie )
2289	2372
	2373	MDRV_IMPORT_FROM(goldnpkr_base)
	2374
	2375	/* basic machine hardware */
	2376	MDRV_CPU_MODIFY("maincpu")
	2377	MDRV_CPU_PROGRAM_MAP(genie_map)
	2378
	2379	MDRV_PIA6821_MODIFY("pia0", pottnpkr_pia0_intf)
	2380
	2381	/* video hardware */
	2382	MDRV_PALETTE_INIT(witchcrd)
	2383
	2384	/* sound hardware */
	2385	MDRV_SPEAKER_STANDARD_MONO("mono")
	2386	MDRV_SOUND_ADD("discrete", DISCRETE, 0)
	2387	MDRV_SOUND_CONFIG_DISCRETE(goldnpkr)
	2388	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
	2389	MACHINE_DRIVER_END
	2390
	2391
	2392	/*********************************************
	2393	*                  Rom Load                  *
	2394	*********************************************/
	2395
2290	2396	/*  the original goldnpkr u40_4a.bin rom is bit corrupted.
2291	2397	U43_2A.bin        BADADDR      --xxxxxxxxxxx
2292	2398	U38_5A.bin        1ST AND 2ND HALF IDENTICAL
r8962	r8963
2463	2569	ROM_END
2464	2570
2465	2571
2466		/***************** NEW SETS **************************/
	2572	/************************* NEW SETS **************************/
2467	2573
2468	2574
2469	2575	ROM_START( potnpkrd )
r8962	r8963
2796	2902	ROM_END
2797	2903
2798	2904
2799		/******************************* bsuerte sets **************************/
	2905	/******************************* bsuerte sets *******************************/
2800	2906	/*
2801	2907	checksum routine at $5827
2802	2908	protect $4000+ & $7ff9.
r8962	r8963
3177	3283	ROM_LOAD( "82s129.9c",      0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) /* PROM dump needed */
3178	3284	ROM_END
3179	3285
	3286	/******************************* Other sets *******************************/
3180	3287
3181		/*************************
3182		*      Driver Init       *
3183		*************************/
	3288	/****************************************************
3184	3289
	3290	Genie (Video Fun Games Ltd.)
	3291	Skill game. Only for amusement.
	3292
	3293	PCB is a heavily modified Golden Poker hardware.
	3294	Silkscreened "ICP-1".
	3295
	3296	CPU:   1x SY6502.
	3297	Video: 1x HD6845P CRTC.
	3298	I/O:   2x HD6821P PIAs.
	3299
	3300	Sound: Discrete.
	3301
	3302	RAMs:  2x M5L5101LP-1.
	3303
	3304	ROMs:  2x 2732 for program. (2m.16a, 3m.17a)
	3305	1x 2716 for char gen. (4.8a)
	3306	3x 2716 for gfx bitplanes. (1.4a, 2.6a, 3.7a)
	3307
	3308	1x Reset switch. (R.SW)
	3309	1x 8 DIP switches bank.
	3310	1x 2x10 Edge connector. (GM1)
	3311	1x 2x22 Edge connector. (GM2)
	3312
	3313
	3314	*****************************************************/
	3315
	3316	ROM_START( genie )
	3317	ROM_REGION( 0x10000, "maincpu", 0 )
	3318	ROM_LOAD( "2m.16a",   0x2000, 0x1000, CRC(30df75f5) SHA1(0696fb3db0b9927e6366db7316d605914ff8d464) )
	3319	ROM_LOAD( "3m.17a",   0x3000, 0x1000, CRC(9d67f5c9) SHA1(d3bc13ce07a7b1713544756d7723dd0bcd59cd1a) )
	3320
	3321	ROM_REGION( 0x1800, "gfx1", 0 )
	3322	ROM_FILL(         0x0000, 0x1000, 0 ) /* filling the R-G bitplanes */
	3323	ROM_LOAD( "4.8a",   0x1000, 0x0800, CRC(1cdd1db9) SHA1(1940c6654b4a892abc3e4557666d341f407ac54f) )  /* chars gfx */
	3324
	3325	ROM_REGION( 0x1800, "gfx2", 0 )
	3326	ROM_LOAD( "1.4a",   0x0000, 0x0800, CRC(40c52b9d) SHA1(64145bd2aa19b584fa56022303dc595320952c24) )  /* tiles, bitplane1 */
	3327	ROM_LOAD( "2.6a",   0x0800, 0x0800, CRC(b0b61ffa) SHA1(d0a01027bd6acd7c72eb5bbdb37d6dd97df8aced) )  /* tiles, bitplane2 */
	3328	ROM_LOAD( "3.7a",   0x1000, 0x0800, CRC(151e4af7) SHA1(a44feaa69a00a6db31c018267b8b67a248e7c66e) )  /* tiles, bitplane3 */
	3329
	3330	ROM_REGION( 0x0800,   "nvram", 0 )   /* default NVRAM, otherwise the game isn't stable */
	3331	ROM_LOAD( "genie_nvram.bin", 0x0000, 0x0800, CRC(1b062ae7) SHA1(9d01635f3968d4b91b4a5d9fadfaf6edd0dea7ba) )
	3332
	3333	ROM_REGION( 0x0100, "proms", 0 )   /* using original golden poker color prom */
	3334	ROM_LOAD( "n82s129.9c",   0x0000, 0x0100, BAD_DUMP CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) )
	3335	ROM_END
	3336
	3337
	3338	/*********************************************
	3339	*                Driver Init                 *
	3340	*********************************************/
	3341
3185	3342	/*
3186	3343	Golden Poker H/W sets:
3187	3344
r8962	r8963
3229	3386	//  ROM[0x60bc] = 0xea;
3230	3387	}
3231	3388
3232		/*************************
3233		*      Game Drivers      *
3234		*************************/
	3389	/*********************************************
	3390	*                Game Drivers                *
	3391	*********************************************/
3235	3392
3236	3393	/*     YEAR  NAME      PARENT    MACHINE   INPUT     INIT      ROT      COMPANY                      FULLNAME                                  FLAGS             LAYOUT  */
3237	3394	GAMEL( 1981, goldnpkr, 0,        goldnpkr, goldnpkr, 0,        ROT0,   "Bonanza Enterprises, Ltd",  "Golden Poker Double Up (Big Boy)",        0,                layout_goldnpkr )
r8962	r8963
3280	3437	GAMEL( 1991, bsuertes, bsuerte,  witchcrd, bsuerte,  0,        ROT0,   "<unknown>",                 "Buena Suerte (Spanish, set 20)",          0,                layout_goldnpkr )
3281	3438	GAMEL( 1991, bsuertet, bsuerte,  witchcrd, bsuerte,  0,        ROT0,   "<unknown>",                 "Buena Suerte (Spanish, set 21)",          0,                layout_goldnpkr )
3282	3439	GAMEL( 1991, bsuerteu, bsuerte,  witchcrd, bsuerte,  0,        ROT0,   "<unknown>",                 "Buena Suerte (Spanish, set 22)",          0,                layout_goldnpkr )
	3440	GAME(  198?, genie,    0,        genie,    genie,    0,        ROT0,   "Video Fun Games Ltd.",      "Genie",                                   0 )

src/mame/drivers/moo.c

r8962	r8963
236	236
237	237	while (length)
238	238	{
239		a = memory_read_word(space, src1);
240		b = memory_read_word(space, src2);
	239	a = space->read_word(src1);
	240	b = space->read_word(src2);
241	241	res = a + 2 * b;
242	242
243		memory_write_word(space, dst, res);
	243	space->write_word(dst, res);
244	244
245	245	src1 += 2;
246	246	src2 += 2;

src/mame/drivers/taito_l.c

r8962	r8963
456	456	return state->cur_rambank[offset];
457	457	}
458	458
459		static void bank_w(const address_space *space, offs_t offset, UINT8 data, int banknum )
	459	static void bank_w(address_space *space, offs_t offset, UINT8 data, int banknum )
460	460	{
461	461	taitol_state *state = space->machine->driver_data<taitol_state>();
462	462
r8962	r8963
2323	2323	MDRV_TC0140SYT_ADD("tc0140syt", taitol_tc0140syt_intf)
2324	2324	MACHINE_DRIVER_END
2325	2325
	2326	#ifdef UNUSED_CODE
2326	2327	static MACHINE_DRIVER_START( lagirl )
2327	2328
2328	2329	/* basic machine hardware */
r8962	r8963
2336	2337
2337	2338	MDRV_MACHINE_RESET(cachat)
2338	2339	MACHINE_DRIVER_END
	2340	#endif
2339	2341
2340	2342
2341	2343	ROM_START( raimais )

src/mame/drivers/tickee.c

r8962	r8963
134	134	{
135	135	UINT16 *src = &tickee_vram[(params->rowaddr << 8) & 0x3ff00];
136	136	UINT32 *dest = BITMAP_ADDR32(bitmap, scanline, 0);
137		const rgb_t *pens = tlc34076_get_pens();
	137	const rgb_t *pens = tlc34076_get_pens(screen.machine->device("tlc34076"));
138	138	int coladdr = params->coladdr << 1;
139	139	int x;
140	140
r8962	r8963
159	159	{
160	160	UINT16 *src = &tickee_vram[(params->rowaddr << 8) & 0x3ff00];
161	161	UINT32 *dest = BITMAP_ADDR32(bitmap, scanline, 0);
162		const rgb_t *pens = tlc34076_get_pens();
	162	const rgb_t *pens = tlc34076_get_pens(screen.machine->device("tlc34076"));
163	163	int coladdr = params->coladdr << 1;
164	164	int x;
165	165
r8962	r8963
195	195	{
196	196	beamxadd = 50;
197	197	beamyadd = 0;
198		tlc34076_reset(6);
199	198	}
200	199
201	200	static MACHINE_RESET( rapidfir )
202	201	{
203	202	beamxadd = 0;
204	203	beamyadd = -5;
205		tlc34076_reset(6);
206	204	}
207	205
208	206
r8962	r8963
226	224	}
227	225
228	226
229		static void rapidfir_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	227	static void rapidfir_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
230	228	{
231	229	if (address < 0x800000)
232	230	memcpy(shiftreg, &tickee_vram[TOWORD(address)], TOBYTE(0x2000));
233	231	}
234	232
235	233
236		static void rapidfir_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	234	static void rapidfir_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
237	235	{
238	236	if (address < 0x800000)
239	237	memcpy(&tickee_vram[TOWORD(address)], shiftreg, TOBYTE(0x2000));
r8962	r8963
355	353	AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_BASE(&tickee_vram)
356	354	AM_RANGE(0x02000000, 0x02ffffff) AM_ROM AM_REGION("user1", 0)
357	355	AM_RANGE(0x04000000, 0x04003fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
358		AM_RANGE(0x04100000, 0x041000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
	356	AM_RANGE(0x04100000, 0x041000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)
359	357	AM_RANGE(0x04200000, 0x0420000f) AM_DEVREAD8("ym1", ay8910_r, 0x00ff)
360	358	AM_RANGE(0x04200000, 0x0420001f) AM_DEVWRITE8("ym1", ay8910_address_data_w, 0x00ff)
361	359	AM_RANGE(0x04200100, 0x0420010f) AM_DEVREAD8("ym2", ay8910_r, 0x00ff)
r8962	r8963
373	371	AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_BASE(&tickee_vram)
374	372	AM_RANGE(0x02000000, 0x02ffffff) AM_ROM AM_REGION("user1", 0)
375	373	AM_RANGE(0x04100000, 0x04103fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
376		AM_RANGE(0x04200000, 0x042000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
	374	AM_RANGE(0x04200000, 0x042000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)
377	375	AM_RANGE(0x04300000, 0x0430000f) AM_DEVREAD8("ym1", ay8910_r, 0x00ff)
378	376	AM_RANGE(0x04300000, 0x0430001f) AM_DEVWRITE8("ym1", ay8910_address_data_w, 0x00ff)
379	377	AM_RANGE(0x04300100, 0x0430010f) AM_DEVREAD8("ym2", ay8910_r, 0x00ff)
r8962	r8963
389	387	AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_BASE(&tickee_vram)
390	388	AM_RANGE(0x02000000, 0x02ffffff) AM_ROM AM_REGION("user1", 0)
391	389	AM_RANGE(0x04000000, 0x04003fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
392		AM_RANGE(0x04100000, 0x041000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
	390	AM_RANGE(0x04100000, 0x041000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)
393	391	AM_RANGE(0x04200000, 0x0420000f) AM_DEVREAD8("ym", ay8910_r, 0x00ff)
394	392	AM_RANGE(0x04200000, 0x0420000f) AM_DEVWRITE8("ym", ay8910_address_data_w, 0x00ff)
395	393	AM_RANGE(0x04200100, 0x0420010f) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
r8962	r8963
418	416	AM_RANGE(0xfc000b00, 0xfc000b0f) AM_READ_PORT("DSW0")
419	417	AM_RANGE(0xfc000c00, 0xfc000c1f) AM_READ_PORT("DSW1")
420	418	AM_RANGE(0xfc000e00, 0xfc000e1f) AM_READ(watchdog_reset16_r)
421		AM_RANGE(0xfc100000, 0xfc1000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
	419	AM_RANGE(0xfc100000, 0xfc1000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)
422	420	AM_RANGE(0xfc200000, 0xfc207fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
423	421	AM_RANGE(0xfc300000, 0xfc30000f) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
424	422	AM_RANGE(0xfc400010, 0xfc40001f) AM_READ(ff7f_r)
r8962	r8963
740	738	MDRV_TICKET_DISPENSER_ADD("ticket2", 100, TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH)
741	739
742	740	/* video hardware */
	741	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	742
743	743	MDRV_VIDEO_START(tickee)
744	744	MDRV_VIDEO_UPDATE(tms340x0)
745	745
r8962	r8963
780	780	MDRV_NVRAM_HANDLER(generic_1fill)
781	781
782	782	/* video hardware */
	783	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	784
783	785	MDRV_VIDEO_START(tickee)
784	786	MDRV_VIDEO_UPDATE(tms340x0)
785	787
r8962	r8963
805	807	MDRV_MACHINE_RESET(tickee)
806	808	MDRV_NVRAM_HANDLER(generic_1fill)
807	809
808		/* video hardware */
809		MDRV_VIDEO_UPDATE(tms340x0)
810	810	MDRV_TICKET_DISPENSER_ADD("ticket1", 100, TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH)
811	811	MDRV_TICKET_DISPENSER_ADD("ticket2", 100, TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH)
812	812
	813	/* video hardware */
	814	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	815
	816	MDRV_VIDEO_UPDATE(tms340x0)
	817
813	818	MDRV_SCREEN_ADD("screen", RASTER)
814	819	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
815	820	MDRV_SCREEN_RAW_PARAMS(VIDEO_CLOCK/2, 444, 0, 320, 233, 0, 200)

src/mame/drivers/srmp5.c

r8962	r8963
521	521	&st0016_charram
522	522	};
523	523
524		static const r3000_cpu_core config =
	524	static const r3000_cpu_core r3000_config =
525	525	{
526	526	1,   /* 1 if we have an FPU, 0 otherwise */
527	527	4096,   /* code cache size */
r8962	r8963
568	568	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
569	569
570	570	MDRV_CPU_ADD("sub", R3000LE, 25000000)
571		MDRV_CPU_CONFIG(config)
	571	MDRV_CPU_CONFIG(r3000_config)
572	572	MDRV_CPU_PROGRAM_MAP(srmp5_mem)
573	573	MDRV_CPU_VBLANK_INT("screen", irq4_line_assert)
574	574

src/mame/drivers/wwfwfest.c

r8962	r8963
381	381
382	382	static VIDEO_EOF( wwfwfest )
383	383	{
384		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	384	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
385	385
386	386	buffer_spriteram16_w(space,0,0,0xffff);
387	387	}

src/mame/drivers/multigam.c

r8962	r8963
1079	1079
1080	1080	static MACHINE_RESET( multigm3 )
1081	1081	{
1082		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1082	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1083	1083	/* reset the ppu */
1084	1084	multigm3_switch_prg_rom(space, 0, 0x01 );
1085	1085	};
r8962	r8963
1309	1309
1310	1310	static DRIVER_INIT( multigam )
1311	1311	{
1312		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1312	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1313	1313	multigam_switch_prg_rom(space, 0x0, 0x01);
1314	1314	}
1315	1315
r8962	r8963
1324	1324
1325	1325	static DRIVER_INIT(multigm3)
1326	1326	{
1327		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1327	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1328	1328
1329	1329	const UINT8 decode[16]  = { 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a };
1330	1330
r8962	r8963
1338	1338
1339	1339	static DRIVER_INIT(multigmt)
1340	1340	{
1341		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1341	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1342	1342
1343	1343	UINT8* buf = auto_alloc_array(machine, UINT8, 0x80000);
1344	1344	UINT8 *rom;

src/mame/drivers/vcombat.c

r8962	r8963
102	102	static VIDEO_UPDATE( vcombat )
103	103	{
104	104	int y;
105		const rgb_t *const pens = tlc34076_get_pens();
	105	const rgb_t *const pens = tlc34076_get_pens(screen->machine->device("tlc34076"));
106	106	running_device *aux = screen->machine->device("aux");
107	107
108	108	UINT16 *m68k_buf = m68k_framebuffer[(*framebuffer_ctrl & 0x20) ? 1 : 0];
r8962	r8963
335	335	//AM_RANGE(0x703000, 0x703001)      /* Headset rotation axis? */
336	336	//AM_RANGE(0x704000, 0x704001)      /* Headset rotation axis? */
337	337
338		AM_RANGE(0x706000, 0x70601f) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
	338	AM_RANGE(0x706000, 0x70601f) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)
339	339	ADDRESS_MAP_END
340	340
341	341
r8962	r8963
375	375
376	376	static MACHINE_RESET( vcombat )
377	377	{
378		/* Setup the Bt476 VGA RAMDAC palette chip */
379		tlc34076_reset(6);
380
381	378	i860_set_pin(machine->device("vid_0"), DEC_PIN_BUS_HOLD, 1);
382	379	i860_set_pin(machine->device("vid_1"), DEC_PIN_BUS_HOLD, 1);
383	380
r8962	r8963
386	383
387	384	static MACHINE_RESET( shadfgtr )
388	385	{
389		/* Setup the Bt476 VGA RAMDAC palette chip */
390		tlc34076_reset(6);
391
392	386	i860_set_pin(machine->device("vid_0"), DEC_PIN_BUS_HOLD, 1);
393	387
394	388	crtc_select = 0;
395	389	}
396	390
397	391
398		static DIRECT_UPDATE_HANDLER( vid_0_direct_handler )
	392	DIRECT_UPDATE_HANDLER( vcombat_vid_0_direct_handler )
399	393	{
400	394	if (address >= 0xfffc0000 && address <= 0xffffffff)
401	395	{
402		direct->raw = direct->decrypted = ((UINT8*)vid_0_shared_RAM) - 0xfffc0000;
	396	direct.explicit_configure(0xfffc0000, 0xffffffff, 0x3ffff, vid_0_shared_RAM);
403	397	return ~0;
404	398	}
405	399	return address;
406	400	}
407	401
408		static DIRECT_UPDATE_HANDLER( vid_1_direct_handler )
	402	DIRECT_UPDATE_HANDLER( vcombat_vid_1_direct_handler )
409	403	{
410	404	if (address >= 0xfffc0000 && address <= 0xffffffff)
411	405	{
412		direct->raw = direct->decrypted = ((UINT8*)vid_1_shared_RAM) - 0xfffc0000;
	406	direct.explicit_configure(0xfffc0000, 0xffffffff, 0x3ffff, vid_1_shared_RAM);
413	407	return ~0;
414	408	}
415	409	return address;
r8962	r8963
421	415	UINT8 *ROM = memory_region(machine, "maincpu");
422	416
423	417	/* The two i860s execute out of RAM */
424		memory_set_direct_update_handler(cputag_get_address_space(machine, "vid_0", ADDRESS_SPACE_PROGRAM), vid_0_direct_handler);
425		memory_set_direct_update_handler(cputag_get_address_space(machine, "vid_1", ADDRESS_SPACE_PROGRAM), vid_1_direct_handler);
	418	address_space *space = machine->device<i860_device>("vid_0")->space(AS_PROGRAM);
	419	space->set_direct_update_handler(direct_update_delegate_create_static(vcombat_vid_0_direct_handler, *machine));
426	420
	421	space = machine->device<i860_device>("vid_1")->space(AS_PROGRAM);
	422	space->set_direct_update_handler(direct_update_delegate_create_static(vcombat_vid_1_direct_handler, *machine));
	423
427	424	/* Allocate the 68000 framebuffers */
428	425	m68k_framebuffer[0] = auto_alloc_array(machine, UINT16, 0x8000);
429	426	m68k_framebuffer[1] = auto_alloc_array(machine, UINT16, 0x8000);
r8962	r8963
465	462	i860_framebuffer[1][1] = NULL;
466	463
467	464	/* The i860 executes out of RAM */
468		memory_set_direct_update_handler(cputag_get_address_space(machine, "vid_0", ADDRESS_SPACE_PROGRAM), vid_0_direct_handler);
	465	address_space *space = machine->device<i860_device>("vid_0")->space(AS_PROGRAM);
	466	space->set_direct_update_handler(direct_update_delegate_create_static(vcombat_vid_0_direct_handler, *machine));
469	467	}
470	468
471	469
r8962	r8963
575	573	MDRV_QUANTUM_PERFECT_CPU("maincpu")
576	574	#endif
577	575
	576	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	577
578	578	/* Disabled for now as it can't handle multiple screens */
579	579	//  MDRV_MC6845_ADD("crtc", MC6845, 6000000 / 16, mc6845_intf)
580	580	MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
r8962	r8963
612	612	MDRV_NVRAM_HANDLER(generic_0fill)
613	613	MDRV_MACHINE_RESET(shadfgtr)
614	614
	615	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	616
615	617	MDRV_MC6845_ADD("crtc", MC6845, XTAL_20MHz / 4 / 16, mc6845_intf)
616	618
617	619	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/39in1.c

r8962	r8963
79	79	static READ32_HANDLER( pxa255_gpio_r );
80	80	static WRITE32_HANDLER( pxa255_gpio_w );
81	81
82		static void pxa255_lcd_load_dma_descriptor(const address_space* space, UINT32 address, int channel);
	82	static void pxa255_lcd_load_dma_descriptor(address_space* space, UINT32 address, int channel);
83	83	static void pxa255_lcd_irq_check(running_machine* machine);
84	84	static void pxa255_lcd_dma_kickoff(running_machine* machine, int channel);
85	85	static void pxa255_lcd_check_load_next_branch(running_machine* machine, int channel);
r8962	r8963
262	262
263	263	// Load the next descriptor
264	264
265		dma_regs->dsadr[channel] = memory_read_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dma_regs->ddadr[channel] + 0x4);
266		dma_regs->dtadr[channel] = memory_read_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dma_regs->ddadr[channel] + 0x8);
267		dma_regs->dcmd[channel]  = memory_read_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dma_regs->ddadr[channel] + 0xc);
268		dma_regs->ddadr[channel] = memory_read_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dma_regs->ddadr[channel]);
	265	address_space *space = machine->device<pxa255_device>("maincpu")->space(AS_PROGRAM);
	266	dma_regs->dsadr[channel] = space->read_dword(dma_regs->ddadr[channel] + 0x4);
	267	dma_regs->dtadr[channel] = space->read_dword(dma_regs->ddadr[channel] + 0x8);
	268	dma_regs->dcmd[channel]  = space->read_dword(dma_regs->ddadr[channel] + 0xc);
	269	dma_regs->ddadr[channel] = space->read_dword(dma_regs->ddadr[channel]);
269	270
270	271	// Start our end-of-transfer timer
271	272	switch(channel)
r8962	r8963
301	302	UINT16 temp16;
302	303	UINT32 temp32;
303	304
	305	address_space *space = machine->device<pxa255_device>("maincpu")->space(AS_PROGRAM);
304	306	switch(param)
305	307	{
306	308	case 3:
307	309	for(index = 0; index < count; index += 4)
308	310	{
309		state->words[index >> 2] = memory_read_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), sadr);
	311	state->words[index >> 2] = space->read_dword(sadr);
310	312	state->samples[(index >> 1) + 0] = (INT16)(state->words[index >> 2] >> 16);
311	313	state->samples[(index >> 1) + 1] = (INT16)(state->words[index >> 2] & 0xffff);
312	314	sadr += 4;
r8962	r8963
319	321	switch(dma_regs->dcmd[param] & PXA255_DCMD_SIZE)
320	322	{
321	323	case PXA255_DCMD_SIZE_8:
322		temp8 = memory_read_byte_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), sadr);
323		memory_write_byte_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), tadr, temp8);
	324	temp8 = space->read_byte(sadr);
	325	space->write_byte(tadr, temp8);
324	326	index++;
325	327	break;
326	328	case PXA255_DCMD_SIZE_16:
327		temp16 = memory_read_word_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), sadr);
328		memory_write_word_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), tadr, temp16);
	329	temp16 = space->read_word(sadr);
	330	space->write_word(tadr, temp16);
329	331	index += 2;
330	332	break;
331	333	case PXA255_DCMD_SIZE_32:
332		temp32 = memory_read_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), sadr);
333		memory_write_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), tadr, temp32);
	334	temp32 = space->read_dword(sadr);
	335	space->write_dword(tadr, temp32);
334	336	index += 4;
335	337	break;
336	338	default:
r8962	r8963
1048	1050
1049	1051	*/
1050	1052
1051		static void pxa255_lcd_load_dma_descriptor(const address_space* space, UINT32 address, int channel)
	1053	static void pxa255_lcd_load_dma_descriptor(address_space* space, UINT32 address, int channel)
1052	1054	{
1053	1055	_39in1_state *state = space->machine->driver_data<_39in1_state>();
1054	1056	PXA255_LCD_Regs *lcd_regs = &state->lcd_regs;
1055	1057
1056		lcd_regs->dma[channel].fdadr = memory_read_dword_32le(space, address);
1057		lcd_regs->dma[channel].fsadr = memory_read_dword_32le(space, address + 0x04);
1058		lcd_regs->dma[channel].fidr  = memory_read_dword_32le(space, address + 0x08);
1059		lcd_regs->dma[channel].ldcmd = memory_read_dword_32le(space, address + 0x0c);
	1058	lcd_regs->dma[channel].fdadr = space->read_dword(address);
	1059	lcd_regs->dma[channel].fsadr = space->read_dword(address + 0x04);
	1060	lcd_regs->dma[channel].fidr  = space->read_dword(address + 0x08);
	1061	lcd_regs->dma[channel].ldcmd = space->read_dword(address + 0x0c);
1060	1062	verboselog( space->machine, 4, "pxa255_lcd_load_dma_descriptor, address = %08x, channel = %d\n", address, channel);
1061	1063	verboselog( space->machine, 4, "    DMA Frame Descriptor: %08x\n", lcd_regs->dma[channel].fdadr );
1062	1064	verboselog( space->machine, 4, "    DMA Frame Source Address: %08x\n", lcd_regs->dma[channel].fsadr );
r8962	r8963
1101	1103
1102	1104	if(lcd_regs->dma[channel].ldcmd & PXA255_LDCMD_PAL)
1103	1105	{
	1106	address_space *space = machine->device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1104	1107	int length = lcd_regs->dma[channel].ldcmd & 0x000fffff;
1105	1108	int index = 0;
1106	1109	for(index = 0; index < length; index += 2)
1107	1110	{
1108		UINT16 color = memory_read_word_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), (lcd_regs->dma[channel].fsadr &~ 1) + index);
	1111	UINT16 color = space->read_word((lcd_regs->dma[channel].fsadr &~ 1) + index);
1109	1112	state->pxa255_lcd_palette[index >> 1] = (((((color >> 11) & 0x1f) << 3) | (color >> 13)) << 16) | (((((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3)) << 8) | (((color & 0x1f) << 3) | ((color >> 2) & 0x7));
1110	1113	palette_set_color_rgb(machine, index >> 1, (((color >> 11) & 0x1f) << 3) | (color >> 13), (((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3), ((color & 0x1f) << 3) | ((color >> 2) & 0x7));
1111	1114	}
1112	1115	}
1113	1116	else
1114	1117	{
	1118	address_space *space = machine->device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1115	1119	int length = lcd_regs->dma[channel].ldcmd & 0x000fffff;
1116	1120	int index = 0;
1117	1121	for(index = 0; index < length; index++)
1118	1122	{
1119		state->pxa255_lcd_framebuffer[index] = memory_read_byte_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), lcd_regs->dma[channel].fsadr + index);
	1123	state->pxa255_lcd_framebuffer[index] = space->read_byte(lcd_regs->dma[channel].fsadr + index);
1120	1124	}
1121	1125	}
1122	1126	}
r8962	r8963
1131	1135	{
1132	1136	verboselog( machine, 4, "pxa255_lcd_check_load_next_branch: Taking branch\n" );
1133	1137	lcd_regs->fbr[channel] &= ~1;
1134		//lcd_regs->fbr[channel] = (memory_read_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
	1138	address_space *space = machine->device<pxa255_device>("maincpu")->space(AS_PROGRAM);
	1139	//lcd_regs->fbr[channel] = (space->read_dword(lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
1135	1140	//printf( "%08x\n", lcd_regs->fbr[channel] );
1136		pxa255_lcd_load_dma_descriptor(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), lcd_regs->fbr[channel] & 0xfffffff0, 0);
1137		lcd_regs->fbr[channel] = (memory_read_dword_32le(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
	1141	pxa255_lcd_load_dma_descriptor(space, lcd_regs->fbr[channel] & 0xfffffff0, 0);
	1142	lcd_regs->fbr[channel] = (space->read_dword(lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
1138	1143	pxa255_lcd_dma_kickoff(machine, 0);
1139	1144	if(lcd_regs->fbr[channel] & 2)
1140	1145	{
r8962	r8963
1430	1435	if (cpu_get_pc(space->cpu) == 0x2874)
1431	1436	{
1432	1437	state->state = 2;
1433		state->magic = memory_read_byte_32le(space, 0x2d4ff0);
	1438	state->magic = space->read_byte(0x2d4ff0);
1434	1439	}
1435	1440	else if (offset == 0xa)
1436	1441	{
r8962	r8963
1456	1461	state->dmadac[1] = machine->device<dmadac_sound_device>("dac2");
1457	1462	state->eeprom = machine->device<eeprom_device>("eeprom");
1458	1463
1459		memory_install_read32_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa0151648, 0xa015164b, 0, 0, prot_cheater_r);
	1464	address_space *space = machine->device<pxa255_device>("maincpu")->space(AS_PROGRAM);
	1465	memory_install_read32_handler (space, 0xa0151648, 0xa015164b, 0, 0, prot_cheater_r);
1460	1466	}
1461	1467
1462	1468	static ADDRESS_MAP_START( 39in1_map, ADDRESS_SPACE_PROGRAM, 32 )

src/mame/drivers/guab.c

r8962	r8963
573	573	if (newval == 0)
574	574	{
575	575	UINT32 credit;
576		const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	576	address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
577	577
578	578	/* Get the current credit value and add the new coin value */
579		credit = memory_read_dword(space, 0x8002c) + (UINT32)(FPTR)param;
580		memory_write_dword(space, 0x8002c, credit);
	579	credit = space->read_dword(0x8002c) + (UINT32)(FPTR)param;
	580	space->write_dword(0x8002c, credit);
581	581	}
582	582	}
583	583

src/mame/drivers/dooyong.c

r8962	r8963
58	58	#include "sound/okim6295.h"
59	59	#include "includes/dooyong.h"
60	60
61
62	61	static WRITE8_HANDLER( lastday_bankswitch_w )
63	62	{
64	63	memory_set_bank(space->machine, "bank1", data & 0x07);
r8962	r8963
173	172	AM_RANGE(0xe020, 0xe020) AM_WRITE(soundlatch_w)
174	173	AM_RANGE(0xe030, 0xe037) AM_WRITE(dooyong_bgscroll8_w)
175	174	AM_RANGE(0xe040, 0xe047) AM_WRITE(dooyong_fgscroll8_w)
176		AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE_GENERIC(paletteram)
	175	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(paletteram_flytiger_w) AM_BASE(&paletteram_flytiger)
177	176	AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
178	177	ADDRESS_MAP_END
179	178
r8962	r8963
1849	1848	GAME( 1991, pollux,   0,        pollux,   pollux,   0, ROT270, "Dooyong",  "Pollux (set 1)",       GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
1850	1849	GAME( 1991, polluxa,  pollux,   pollux,   pollux,   0, ROT270, "Dooyong",  "Pollux (set 2)",       GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
1851	1850	GAME( 1991, polluxa2, pollux,   pollux,   pollux,   0, ROT270, "Dooyong",  "Pollux (set 3)",       GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* Original Dooyong Board distributed by TCH */
1852		GAME( 1992, flytiger, 0,        flytiger, flytiger, 0, ROT270, "Dooyong",  "Flying Tiger",         GAME_IMPERFECT_GRAPHICS | GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
	1851	GAME( 1992, flytiger, 0,        flytiger, flytiger, 0, ROT270, "Dooyong",  "Flying Tiger",         GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
1853	1852	GAME( 1993, bluehawk, 0,        bluehawk, bluehawk, 0, ROT270, "Dooyong",  "Blue Hawk",            GAME_SUPPORTS_SAVE )
1854	1853	GAME( 1993, bluehawkn,bluehawk, bluehawk, bluehawk, 0, ROT270, "Dooyong (NTC license)", "Blue Hawk (NTC)", GAME_SUPPORTS_SAVE )
1855	1854	GAME( 1993, sadari,   0,        primella, sadari,   0, ROT0,   "Dooyong (NTC license)", "Sadari",  GAME_SUPPORTS_SAVE )

src/mame/drivers/starwars.c

r8962	r8963
57	57	/* ESB-specific */
58	58	if (starwars_is_esb)
59	59	{
60		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	60	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
61	61
62	62	/* reset the slapstic */
63	63	slapstic_reset();
r8962	r8963
93	93	*
94	94	*************************************/
95	95
96		static void esb_slapstic_tweak(const address_space *space, offs_t offset)
	96	static void esb_slapstic_tweak(address_space *space, offs_t offset)
97	97	{
98	98	int new_bank = slapstic_tweak(space, offset);
99	99
r8962	r8963
127	127	*
128	128	*************************************/
129	129
130		static DIRECT_UPDATE_HANDLER( esb_setdirect )
	130	DIRECT_UPDATE_HANDLER( esb_setdirect )
131	131	{
132	132	/* if we are in the slapstic region, process it */
133	133	if ((address & 0xe000) == 0x8000)
134	134	{
135		offs_t pc = cpu_get_pc(space->cpu);
	135	offs_t pc = cpu_get_pc(&direct.space().device());
136	136
137	137	/* filter out duplicates; we get these because the handler gets called for
138	138	multiple reasons:
r8962	r8963
143	143	{
144	144	slapstic_last_pc = pc;
145	145	slapstic_last_address = address;
146		esb_slapstic_tweak(space, address & 0x1fff);
	146	esb_slapstic_tweak(&direct.space(), address & 0x1fff);
147	147	}
148	148	return ~0;
149	149	}
r8962	r8963
159	159	*************************************/
160	160
161	161	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
162		AM_RANGE(0x0000, 0x2fff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0)
	162	AM_RANGE(0x0000, 0x2fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0)
163	163	AM_RANGE(0x3000, 0x3fff) AM_ROM                        /* vector_rom */
164	164	AM_RANGE(0x4300, 0x431f) AM_READ_PORT("IN0")
165	165	AM_RANGE(0x4320, 0x433f) AM_READ_PORT("IN1")
r8962	r8963
527	527	slapstic_base = &rom[0x08000];
528	528
529	529	/* install an opcode base handler */
530		memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), esb_setdirect);
	530	address_space *space = machine->device<m6809_device>("maincpu")->space(AS_PROGRAM);
	531	space->set_direct_update_handler(direct_update_delegate_create_static(esb_setdirect, *machine));
531	532
532	533	/* install read/write handlers for it */
533	534	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x9fff, 0, 0, esb_slapstic_r, esb_slapstic_w);

src/mame/drivers/savquest.c

r0	r8963
	1	/***************************************************************************
	2
	3	savquest.c
	4
	5	"Savage Quest" (c) 1999 Interactive Light, developed by Angel Studios.
	6	Skeleton by R. Belmont
	7
	8	H/W is a white-box PC consisting of:
	9	Pentium II 450 CPU
	10	DFI P2XBL motherboard (i440BX chipset)
	11	128 MB RAM
	12	Guillemot Maxi Gamer 3D2 Voodoo II
	13	Sound Blaster AWE64
	14
	15	Protected by a HASP brand parallel port dongle.
	16	I/O board has a PIC17C43 which is not readable.
	17
	18	Copyright Nicola Salmoria and the MAME Team.
	19	Visit http://mamedev.org for licensing and usage restrictions.
	20
	21	***************************************************************************/
	22
	23	#include "emu.h"
	24	#include "cpu/i386/i386.h"
	25	#include "memconv.h"
	26	#include "devconv.h"
	27	#include "machine/8237dma.h"
	28	#include "machine/pic8259.h"
	29	#include "machine/pit8253.h"
	30	#include "machine/mc146818.h"
	31	#include "machine/pcshare.h"
	32	#include "machine/pci.h"
	33	#include "machine/8042kbdc.h"
	34	#include "machine/pckeybrd.h"
	35	#include "machine/idectrl.h"
	36
	37	static VIDEO_START(savquest)
	38	{
	39	}
	40
	41	static VIDEO_UPDATE(savquest)
	42	{
	43	return 0;
	44	}
	45
	46	static ADDRESS_MAP_START(savquest_map, ADDRESS_SPACE_PROGRAM, 32)
	47	AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
	48	AM_RANGE(0xfffc0000, 0xffffffff) AM_ROM AM_REGION("user1", 0)   /* System BIOS */
	49	ADDRESS_MAP_END
	50
	51	static ADDRESS_MAP_START(savquest_io, ADDRESS_SPACE_IO, 32)
	52	ADDRESS_MAP_END
	53
	54	static INPUT_PORTS_START( savquest )
	55	INPUT_PORTS_END
	56
	57	static MACHINE_DRIVER_START( savquest )
	58	MDRV_CPU_ADD("maincpu", PENTIUM, 450000000)   // actually Pentium II 450
	59	MDRV_CPU_PROGRAM_MAP(savquest_map)
	60	MDRV_CPU_IO_MAP(savquest_io)
	61
	62	/* video hardware */
	63	MDRV_SCREEN_ADD("screen", RASTER)
	64	MDRV_SCREEN_REFRESH_RATE(60)
	65	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	66	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	67	MDRV_SCREEN_SIZE(640, 480)
	68	MDRV_SCREEN_VISIBLE_AREA(0, 639, 0, 199)
	69	MDRV_PALETTE_LENGTH(16)
	70
	71	MDRV_VIDEO_START(savquest)
	72	MDRV_VIDEO_UPDATE(savquest)
	73	MACHINE_DRIVER_END
	74
	75	ROM_START( savquest )
	76	ROM_REGION32_LE(0x40000, "user1", 0)
	77	ROM_LOAD( "sq-aflash.bin", 0x000000, 0x040000, CRC(0b4f406f) SHA1(4003b0e6d46dcb47012acc118837f0f7cf529faf) )
	78
	79	DISK_REGION( "disk" )
	80	DISK_IMAGE( "savquest", 0, SHA1(b20cacf45e093b533c538bf4fc08f05f9475d640) )
	81	ROM_END
	82
	83	GAME(1999, savquest, 0, savquest, savquest, 0, ROT0, "Interactive Light", "Savage Quest", GAME_NO_SOUND|GAME_NOT_WORKING)
	84

src/mame/drivers/segas18.c

r8962	r8963
139	139	static void sound_w(running_machine *machine, UINT8 data)
140	140	{
141	141	segas1x_state *state = machine->driver_data<segas1x_state>();
142		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	142	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
143	143
144	144	soundlatch_w(space, 0, data & 0xff);
145	145	cpu_set_input_line(state->soundcpu, INPUT_LINE_NMI, PULSE_LINE);

src/mame/drivers/coolridr.c

r8962	r8963
450	450	size = (attr_buff[6] / 4)+1;
451	451	for(txt_index = 0;txt_index < size; txt_index++)
452	452	{
453		memory_write_dword(space,(dst_addr),txt_buff[txt_index]);
	453	space->write_dword((dst_addr),txt_buff[txt_index]);
454	454	dst_addr+=4;
455	455	}
456	456	}
r8962	r8963
459	459	{
460	460	static UINT32 clear_vram;
461	461	for(clear_vram=0x3f40000;clear_vram < 0x3f4ffff;clear_vram+=4)
462		memory_write_dword(space,(clear_vram),0x00000000);
	462	space->write_dword((clear_vram),0x00000000);
463	463	}
464	464	//else
465	465	//  printf("CMD = %04x PARAM = %04x DATA = %08x\n",cmd,param,data);
r8962	r8963
485	485
486	486
487	487	/* FIXME: this seems to do a hell lot of stuff, it's not ST-V SCU but still somewhat complex :/ */
488		static void sysh1_dma_transfer( const address_space *space, UINT16 dma_index )
	488	static void sysh1_dma_transfer( address_space *space, UINT16 dma_index )
489	489	{
490	490	static UINT32 src,dst,size,type,s_i;
491	491	static UINT8 end_dma_mark;
r8962	r8963
542	542	{
543	543	for(s_i=0;s_i<size;s_i+=4)
544	544	{
545		memory_write_dword(space,dst,memory_read_dword(space,src));
	545	space->write_dword(dst,space->read_dword(src));
546	546	dst+=4;
547	547	src+=4;
548	548	}

src/mame/drivers/photoply.c

r8962	r8963
132	132	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
133	133	& 0xFF0000;
134	134
135		return memory_read_byte(space, page_offset + offset);
	135	return space->read_byte(page_offset + offset);
136	136	}
137	137
138	138
r8962	r8963
141	141	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
142	142	& 0xFF0000;
143	143
144		memory_write_byte(space, page_offset + offset, data);
	144	space->write_byte(page_offset + offset, data);
145	145	}
146	146
147	147	static READ8_HANDLER(dma_page_select_r)

src/mame/drivers/crystal.c

r8962	r8963
161	161	static void IntReq( running_machine *machine, int num )
162	162	{
163	163	crystal_state *state = machine->driver_data<crystal_state>();
164		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
165		UINT32 IntEn = memory_read_dword(space, 0x01800c08);
166		UINT32 IntPend = memory_read_dword(space, 0x01800c0c);
	164	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	165	UINT32 IntEn = space->read_dword(0x01800c08);
	166	UINT32 IntPend = space->read_dword(0x01800c0c);
167	167	if (IntEn & (1 << num))
168	168	{
169	169	IntPend |= (1 << num);
170		memory_write_dword(space, 0x01800c0c, IntPend);
	170	space->write_dword(0x01800c0c, IntPend);
171	171	cpu_set_input_line(state->maincpu, SE3208_INT, ASSERT_LINE);
172	172	}
173	173	#ifdef IDLE_LOOP_SPEEDUP
r8962	r8963
181	181	crystal_state *state = space->machine->driver_data<crystal_state>();
182	182
183	183	#ifdef IDLE_LOOP_SPEEDUP
184		UINT32 IntPend = memory_read_dword(space, 0x01800c0c);
	184	UINT32 IntPend = space->read_dword(0x01800c0c);
185	185	state->FlipCntRead++;
186	186	if (state->FlipCntRead >= 16 && !IntPend && state->FlipCount != 0)
187	187	cpu_suspend(state->maincpu, SUSPEND_REASON_SPIN, 1);
r8962	r8963
227	227	static WRITE32_HANDLER( IntAck_w )
228	228	{
229	229	crystal_state *state = space->machine->driver_data<crystal_state>();
230		UINT32 IntPend = memory_read_dword(space, 0x01800c0c);
	230	UINT32 IntPend = space->read_dword(0x01800c0c);
231	231
232	232	if (mem_mask & 0xff)
233	233	{
234	234	IntPend &= ~(1 << (data & 0x1f));
235		memory_write_dword(space, 0x01800c0c, IntPend);
	235	space->write_dword(0x01800c0c, IntPend);
236	236	if (!IntPend)
237	237	cpu_set_input_line(state->maincpu, SE3208_INT, CLEAR_LINE);
238	238	}
r8962	r8963
243	243	static IRQ_CALLBACK( icallback )
244	244	{
245	245	crystal_state *state = device->machine->driver_data<crystal_state>();
246		const address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
247		UINT32 IntPend = memory_read_dword(space, 0x01800c0c);
	246	address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
	247	UINT32 IntPend = space->read_dword(0x01800c0c);
248	248	int i;
249	249
250	250	for (i = 0; i < 32; ++i)
r8962	r8963
280	280	IntReq(machine, num[which]);
281	281	}
282	282
283		INLINE void Timer_w( const address_space *space, int which, UINT32 data, UINT32 mem_mask )
	283	INLINE void Timer_w( address_space *space, int which, UINT32 data, UINT32 mem_mask )
284	284	{
285	285	crystal_state *state = space->machine->driver_data<crystal_state>();
286	286
287	287	if (((data ^ state->Timerctrl[which]) & 1) && (data & 1))   //Timer activate
288	288	{
289	289	int PD = (data >> 8) & 0xff;
290		int TCV = memory_read_dword(space, 0x01801404 + which * 8);
	290	int TCV = space->read_dword(0x01801404 + which * 8);
291	291	attotime period = attotime_mul(ATTOTIME_IN_HZ(43000000), (PD + 1) * (TCV + 1));
292	292
293	293	if (state->Timerctrl[which] & 2)
r8962	r8963
392	392	ds1302_clk_w(state->ds1302, 0, CLK ? 1 : 0);
393	393
394	394	if (ds1302_read(state->ds1302, 0))
395		memory_write_dword(space, 0x01802008, memory_read_dword(space, 0x01802008) | 0x10000000);
	395	space->write_dword(0x01802008, space->read_dword(0x01802008) | 0x10000000);
396	396	else
397		memory_write_dword(space, 0x01802008, memory_read_dword(space, 0x01802008) & (~0x10000000));
	397	space->write_dword(0x01802008, space->read_dword(0x01802008) & (~0x10000000));
398	398
399	399	COMBINE_DATA(&state->PIO);
400	400	}
401	401
402		INLINE void DMA_w( const address_space *space, int which, UINT32 data, UINT32 mem_mask )
	402	INLINE void DMA_w( address_space *space, int which, UINT32 data, UINT32 mem_mask )
403	403	{
404	404	crystal_state *state = space->machine->driver_data<crystal_state>();
405	405
406	406	if (((data ^ state->DMActrl[which]) & (1 << 10)) && (data & (1 << 10)))   //DMAOn
407	407	{
408	408	UINT32 CTR = data;
409		UINT32 SRC = memory_read_dword(space, 0x01800804 + which * 0x10);
410		UINT32 DST = memory_read_dword(space, 0x01800808 + which * 0x10);
411		UINT32 CNT = memory_read_dword(space, 0x0180080C + which * 0x10);
	409	UINT32 SRC = space->read_dword(0x01800804 + which * 0x10);
	410	UINT32 DST = space->read_dword(0x01800808 + which * 0x10);
	411	UINT32 CNT = space->read_dword(0x0180080C + which * 0x10);
412	412	int i;
413	413
414	414	if (CTR & 0x2)   //32 bits
415	415	{
416	416	for (i = 0; i < CNT; ++i)
417	417	{
418		UINT32 v = memory_read_dword(space, SRC + i * 4);
419		memory_write_dword(space, DST + i * 4, v);
	418	UINT32 v = space->read_dword(SRC + i * 4);
	419	space->write_dword(DST + i * 4, v);
420	420	}
421	421	}
422	422	else if (CTR & 0x1)   //16 bits
423	423	{
424	424	for (i = 0; i < CNT; ++i)
425	425	{
426		UINT16 v = memory_read_word(space, SRC + i * 2);
427		memory_write_word(space, DST + i * 2, v);
	426	UINT16 v = space->read_word(SRC + i * 2);
	427	space->write_word(DST + i * 2, v);
428	428	}
429	429	}
430	430	else   //8 bits
431	431	{
432	432	for (i = 0; i < CNT; ++i)
433	433	{
434		UINT8 v = memory_read_byte(space, SRC + i);
435		memory_write_byte(space, DST + i, v);
	434	UINT8 v = space->read_byte(SRC + i);
	435	space->write_byte(DST + i, v);
436	436	}
437	437	}
438	438	data &= ~(1 << 10);
439		memory_write_dword(space, 0x0180080C + which * 0x10, 0);
	439	space->write_dword(0x0180080C + which * 0x10, 0);
440	440	IntReq(space->machine, 7 + which);
441	441	}
442	442	COMBINE_DATA(&state->DMActrl[which]);
r8962	r8963
621	621	PatchReset(machine);
622	622	}
623	623
624		static UINT16 GetVidReg( const address_space *space, UINT16 reg )
	624	static UINT16 GetVidReg( address_space *space, UINT16 reg )
625	625	{
626		return memory_read_word(space, 0x03000000 + reg);
	626	return space->read_word(0x03000000 + reg);
627	627	}
628	628
629		static void SetVidReg( const address_space *space, UINT16 reg, UINT16 val )
	629	static void SetVidReg( address_space *space, UINT16 reg, UINT16 val )
630	630	{
631		memory_write_word(space, 0x03000000 + reg, val);
	631	space->write_word(0x03000000 + reg, val);
632	632	}
633	633
634	634
635	635	static VIDEO_UPDATE( crystal )
636	636	{
637	637	crystal_state *state = screen->machine->driver_data<crystal_state>();
638		const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	638	address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
639	639	int DoFlip;
640	640
641	641	UINT32 B0 = 0x0;
r8962	r8963
696	696	static VIDEO_EOF(crystal)
697	697	{
698	698	crystal_state *state = machine->driver_data<crystal_state>();
699		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	699	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
700	700	UINT16 head, tail;
701	701	int DoFlip = 0;
702	702
r8962	r8963
704	704	tail = GetVidReg(space, 0x80);
705	705	while ((head & 0x7ff) != (tail & 0x7ff))
706	706	{
707		UINT16 Packet0 = memory_read_word(space, 0x03800000 + head * 64);
	707	UINT16 Packet0 = space->read_word(0x03800000 + head * 64);
708	708	if (Packet0 & 0x81)
709	709	DoFlip = 1;
710	710	head++;

src/mame/drivers/tempest.c

r8962	r8963
386	386
387	387	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
388	388	AM_RANGE(0x0000, 0x07ff) AM_RAM
389		AM_RANGE(0x0800, 0x080f) AM_WRITEONLY AM_BASE(&tempest_colorram)
	389	AM_RANGE(0x0800, 0x080f) AM_WRITEONLY AM_BASE(&avgdvg_colorram)
390	390	AM_RANGE(0x0c00, 0x0c00) AM_READ_PORT("IN0")
391	391	AM_RANGE(0x0d00, 0x0d00) AM_READ_PORT("DSW1")
392	392	AM_RANGE(0x0e00, 0x0e00) AM_READ_PORT("DSW2")
393		AM_RANGE(0x2000, 0x2fff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x2000)
	393	AM_RANGE(0x2000, 0x2fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x2000)
394	394	AM_RANGE(0x3000, 0x3fff) AM_ROM
395	395	AM_RANGE(0x4000, 0x4000) AM_WRITE(tempest_coin_w)
396	396	AM_RANGE(0x4800, 0x4800) AM_WRITE(avgdvg_go_w)

src/mame/drivers/cshooter.c

r8962	r8963
661	661
662	662	static DRIVER_INIT( cshootere )
663	663	{
664		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	664	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
665	665	int A;
666	666	UINT8 *rom = memory_region(machine, "maincpu");
667	667	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
668	668
669		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	669	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
670	670
671	671	for (A = 0x0000;A < 0x8000;A++)
672	672	{

src/mame/drivers/bzone.c

r8962	r8963
308	308	AM_RANGE(0x1820, 0x182f) AM_DEVREADWRITE("pokey", pokey_r, pokey_w)
309	309	AM_RANGE(0x1840, 0x1840) AM_DEVWRITE("discrete", bzone_sounds_w)
310	310	AM_RANGE(0x1860, 0x187f) AM_DEVWRITE("mathbox", mathbox_go_w)
311		AM_RANGE(0x2000, 0x2fff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x2000)
	311	AM_RANGE(0x2000, 0x2fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x2000)
312	312	AM_RANGE(0x3000, 0x7fff) AM_ROM
313	313	ADDRESS_MAP_END
314	314
r8962	r8963
332	332	AM_RANGE(0x1810, 0x181f) AM_DEVREADWRITE("pokey", pokey_r, pokey_w)
333	333	AM_RANGE(0x1820, 0x185f) AM_DEVREADWRITE("earom", atari_vg_earom_r, atari_vg_earom_w)
334	334	AM_RANGE(0x1860, 0x187f) AM_DEVWRITE("mathbox", mathbox_go_w)
335		AM_RANGE(0x2000, 0x2fff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x2000)
	335	AM_RANGE(0x2000, 0x2fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x2000)
336	336	AM_RANGE(0x3000, 0x7fff) AM_ROM
337	337	ADDRESS_MAP_END
338	338
r8962	r8963
800	800
801	801	static DRIVER_INIT( bradley )
802	802	{
803		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	803	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
804	804	memory_install_ram(space, 0x400, 0x7ff, 0, 0, NULL);
805	805	memory_install_read_port(space, 0x1808, 0x1808, 0, 0, "1808");
806	806	memory_install_read_port(space, 0x1809, 0x1809, 0, 0, "1809");

src/mame/drivers/mhavoc.c

r8962	r8963
237	237	AM_RANGE(0x0a00, 0x0fff) AM_RAMBANK("bank1") AM_BASE(&mhavoc_zram1)
238	238	AM_RANGE(0x1000, 0x1000) AM_READ(mhavoc_gamma_r)         /* Gamma Read Port */
239	239	AM_RANGE(0x1200, 0x1200) AM_READ_PORT("IN0") AM_WRITENOP   /* Alpha Input Port 0 */
240		AM_RANGE(0x1400, 0x141f) AM_RAM AM_BASE(&mhavoc_colorram)   /* ColorRAM */
	240	AM_RANGE(0x1400, 0x141f) AM_RAM AM_BASE(&avgdvg_colorram)   /* ColorRAM */
241	241	AM_RANGE(0x1600, 0x1600) AM_WRITE(mhavoc_out_0_w)         /* Control Signals */
242	242	AM_RANGE(0x1640, 0x1640) AM_WRITE(avgdvg_go_w)            /* Vector Generator GO */
243	243	AM_RANGE(0x1680, 0x1680) AM_WRITE(watchdog_reset_w)         /* Watchdog Clear */
r8962	r8963
248	248	AM_RANGE(0x17c0, 0x17c0) AM_WRITE(mhavoc_gamma_w)         /* Gamma Communication Write Port */
249	249	AM_RANGE(0x1800, 0x1fff) AM_RAM                        /* Shared Beta Ram */
250	250	AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank2")                  /* Paged Program ROM (32K) */
251		AM_RANGE(0x4000, 0x4fff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("alpha", 0x4000)   /* Vector Generator RAM */
	251	AM_RANGE(0x4000, 0x4fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("alpha", 0x4000)   /* Vector Generator RAM */
252	252	AM_RANGE(0x5000, 0x7fff) AM_ROM                        /* Vector ROM */
253	253	AM_RANGE(0x8000, 0xffff) AM_ROM               /* Program ROM (32K) */
254	254	ADDRESS_MAP_END
r8962	r8963
300	300	AM_RANGE(0x10b0, 0x10b0) AM_WRITE(mhavoc_alpha_irq_ack_w)   /* IRQ ack */
301	301	AM_RANGE(0x10b4, 0x10b4) AM_WRITE(mhavoc_rom_banksel_w)
302	302	AM_RANGE(0x10b8, 0x10b8) AM_WRITE(mhavoc_ram_banksel_w)
303		AM_RANGE(0x10e0, 0x10ff) AM_WRITEONLY AM_BASE(&mhavoc_colorram)   /* ColorRAM */
	303	AM_RANGE(0x10e0, 0x10ff) AM_WRITEONLY AM_BASE(&avgdvg_colorram)   /* ColorRAM */
304	304	AM_RANGE(0x1800, 0x18ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)   /* EEROM */
305	305	AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank2")                  /* Paged Program ROM (32K) */
306		AM_RANGE(0x4000, 0x4fff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("alpha", 0x4000) /* Vector Generator RAM */
	306	AM_RANGE(0x4000, 0x4fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("alpha", 0x4000) /* Vector Generator RAM */
307	307	AM_RANGE(0x5000, 0x7fff) AM_ROM                        /* Vector ROM */
308	308	AM_RANGE(0x8000, 0xffff) AM_ROM                        /* Program ROM (32K) */
309	309	ADDRESS_MAP_END

src/mame/drivers/twinkle.c

r8962	r8963
1132	1132
1133	1133	/* 1999 - beatmania IIDX 2nd style */
1134	1134	/* these use i2c for security */
1135		GAME( 2000, bmiidx3,  gq863,   twinkle, twinkle, twinkle, ROT0, "Konami", "beatmania IIDX 3th style (GC992 JA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
	1135	GAME( 2000, bmiidx3,  gq863,   twinkle, twinkle, twinkle, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1136	1136	GAME( 2000, bmiidx4,  gq863,   twinkle, twinkle, twinkle, ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1137	1137	/* 2001 - beatmania IIDX 5th style */
1138	1138

src/mame/drivers/artmagic.c

r8962	r8963
93	93	{
94	94	tms_irq = hack_irq = 0;
95	95	update_irq_state(machine);
96		tlc34076_reset(6);
97	96	}
98	97
99	98
r8962	r8963
486	485	AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_BASE(&artmagic_vram0)
487	486	AM_RANGE(0x00400000, 0x005fffff) AM_RAM AM_BASE(&artmagic_vram1)
488	487	AM_RANGE(0x00800000, 0x0080007f) AM_READWRITE(artmagic_blitter_r, artmagic_blitter_w)
489		AM_RANGE(0x00c00000, 0x00c000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
	488	AM_RANGE(0x00c00000, 0x00c000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)
490	489	AM_RANGE(0xc0000000, 0xc00001ff) AM_READWRITE(tms34010_io_register_r, tms34010_io_register_w)
491	490	AM_RANGE(0xffe00000, 0xffffffff) AM_RAM
492	491	ADDRESS_MAP_END
r8962	r8963
496	495	AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_BASE(&artmagic_vram0)
497	496	AM_RANGE(0x00400000, 0x005fffff) AM_RAM AM_BASE(&artmagic_vram1)
498	497	AM_RANGE(0x00800000, 0x0080007f) AM_READWRITE(artmagic_blitter_r, artmagic_blitter_w)
499		AM_RANGE(0x00c00000, 0x00c000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
	498	AM_RANGE(0x00c00000, 0x00c000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)
500	499	AM_RANGE(0xc0000000, 0xc00001ff) AM_READWRITE(tms34010_io_register_r, tms34010_io_register_w)
501	500	AM_RANGE(0xffc00000, 0xffffffff) AM_RAM
502	501	ADDRESS_MAP_END
r8962	r8963
722	721	MDRV_NVRAM_HANDLER(generic_1fill)
723	722
724	723	/* video hardware */
	724	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	725
725	726	MDRV_VIDEO_START(artmagic)
726	727	MDRV_VIDEO_UPDATE(tms340x0)
727	728

src/mame/drivers/galpani2.c

r8962	r8963
82	82
83	83	static void galpani2_write_kaneko(running_device *device)
84	84	{
85		const address_space *dstspace = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
	85	address_space *dstspace = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
86	86	int i,x,tpattidx;
87	87	unsigned char testpattern[] = {0xFF,0x55,0xAA,0xDD,0xBB,0x99};
88	88
r8962	r8963
94	94	{
95	95	for (tpattidx = 0; tpattidx < 6; tpattidx++)
96	96	{
97		if (memory_read_byte(dstspace,i) == testpattern[tpattidx]) x = 1; //ram test fragment present
	97	if (dstspace->read_byte(i) == testpattern[tpattidx]) x = 1; //ram test fragment present
98	98	}
99	99	}
100	100
101	101	if   ( x == 0 )
102	102	{
103		memory_write_byte(dstspace,0x100000,0x4b); //K
104		memory_write_byte(dstspace,0x100001,0x41); //A
105		memory_write_byte(dstspace,0x100002,0x4e); //N
106		memory_write_byte(dstspace,0x100003,0x45); //E
107		memory_write_byte(dstspace,0x100004,0x4b); //K
108		memory_write_byte(dstspace,0x100005,0x4f); //O
	103	dstspace->write_byte(0x100000,0x4b); //K
	104	dstspace->write_byte(0x100001,0x41); //A
	105	dstspace->write_byte(0x100002,0x4e); //N
	106	dstspace->write_byte(0x100003,0x45); //E
	107	dstspace->write_byte(0x100004,0x4b); //K
	108	dstspace->write_byte(0x100005,0x4f); //O
109	109	}
110	110	}
111	111
112	112	static WRITE8_HANDLER( galpani2_mcu_init_w )
113	113	{
114	114	running_machine *machine = space->machine;
115		const address_space *srcspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
116		const address_space *dstspace = cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM);
	115	address_space *srcspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	116	address_space *dstspace = cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM);
117	117	UINT32 mcu_address, mcu_data;
118	118
119	119	for ( mcu_address = 0x100010; mcu_address < (0x100010 + 6); mcu_address += 1 )
120	120	{
121		mcu_data   =   memory_read_byte(srcspace, mcu_address );
122		memory_write_byte(dstspace, mcu_address-0x10, mcu_data);
	121	mcu_data   =   srcspace->read_byte(mcu_address );
	122	dstspace->write_byte(mcu_address-0x10, mcu_data);
123	123	}
124	124	cputag_set_input_line(machine, "sub", INPUT_LINE_IRQ7, HOLD_LINE); //MCU Initialised
125	125	}
126	126
127	127	static void galpani2_mcu_nmi1(running_machine *machine)
128	128	{
129		const address_space *srcspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
130		const address_space *dstspace = cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM);
	129	address_space *srcspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	130	address_space *dstspace = cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM);
131	131	UINT32 mcu_list, mcu_command, mcu_address, mcu_extra, mcu_src, mcu_dst, mcu_size;
132	132
133	133	for ( mcu_list = 0x100021; mcu_list < (0x100021 + 0x40); mcu_list += 4 )
134	134	{
135		mcu_command      =   memory_read_byte(srcspace, mcu_list);
	135	mcu_command      =   srcspace->read_byte(mcu_list);
136	136
137	137	mcu_address      =   0x100000 +
138		(memory_read_byte(srcspace, mcu_list + 1)<<8) +
139		(memory_read_byte(srcspace, mcu_list + 2)<<0) ;
	138	(srcspace->read_byte(mcu_list + 1)<<8) +
	139	(srcspace->read_byte(mcu_list + 2)<<0) ;
140	140
141		mcu_extra      =   memory_read_byte(srcspace, mcu_list + 3); //0xff for command $A and $2, 0x02 for others
	141	mcu_extra      =   srcspace->read_byte(mcu_list + 3); //0xff for command $A and $2, 0x02 for others
142	142
143	143	if (mcu_command != 0)
144	144	{
145	145	logerror("%s : MCU [$%06X] endidx = $%02X / command = $%02X addr = $%04X ? = $%02X.\n",
146	146	cpuexec_describe_context(machine),
147	147	mcu_list,
148		memory_read_byte(srcspace, 0x100020),
	148	srcspace->read_byte(0x100020),
149	149	mcu_command,
150	150	mcu_address,
151	151	mcu_extra
r8962	r8963
158	158	break;
159	159
160	160	case 0x02: //Copy N bytes from RAM2 to RAM1?, gp2se is the only one to use it, often!
161		mcu_src      =   (memory_read_byte(srcspace, mcu_address + 2)<<8) +
162		(memory_read_byte(srcspace, mcu_address + 3)<<0) ;
	161	mcu_src      =   (srcspace->read_byte(mcu_address + 2)<<8) +
	162	(srcspace->read_byte(mcu_address + 3)<<0) ;
163	163
164		mcu_dst      =   (memory_read_byte(srcspace, mcu_address + 6)<<8) +
165		(memory_read_byte(srcspace, mcu_address + 7)<<0) ;
	164	mcu_dst      =   (srcspace->read_byte(mcu_address + 6)<<8) +
	165	(srcspace->read_byte(mcu_address + 7)<<0) ;
166	166
167		mcu_size   =   (memory_read_byte(srcspace, mcu_address + 8)<<8) +
168		(memory_read_byte(srcspace, mcu_address + 9)<<0) ;
	167	mcu_size   =   (srcspace->read_byte(mcu_address + 8)<<8) +
	168	(srcspace->read_byte(mcu_address + 9)<<0) ;
169	169	logerror("%s : MCU executes command $%02X, %04X %02X-> %04x\n",cpuexec_describe_context(machine),mcu_command,mcu_src,mcu_size,mcu_dst);
170	170
171	171	for( ; mcu_size > 0 ; mcu_size-- )
172	172	{
173	173	mcu_src &= 0xffff;   mcu_dst &= 0xffff;
174		memory_write_byte(srcspace,0x100000 + mcu_dst,memory_read_byte(dstspace,0x100000 + mcu_src));
	174	srcspace->write_byte(0x100000 + mcu_dst,dstspace->read_byte(0x100000 + mcu_src));
175	175	mcu_src ++;         mcu_dst ++;
176	176	}
177	177
178	178	/* Raise a "job done" flag */
179		memory_write_byte(srcspace,mcu_address+0,0xff);
180		memory_write_byte(srcspace,mcu_address+1,0xff);
	179	srcspace->write_byte(mcu_address+0,0xff);
	180	srcspace->write_byte(mcu_address+1,0xff);
181	181
182	182	break;
183	183
184	184	case 0x0a:   // Copy N bytes from RAM1 to RAM2
185		mcu_src      =   (memory_read_byte(srcspace, mcu_address + 2)<<8) +
186		(memory_read_byte(srcspace, mcu_address + 3)<<0) ;
	185	mcu_src      =   (srcspace->read_byte(mcu_address + 2)<<8) +
	186	(srcspace->read_byte(mcu_address + 3)<<0) ;
187	187
188		mcu_dst      =   (memory_read_byte(srcspace, mcu_address + 6)<<8) +
189		(memory_read_byte(srcspace, mcu_address + 7)<<0) ;
	188	mcu_dst      =   (srcspace->read_byte(mcu_address + 6)<<8) +
	189	(srcspace->read_byte(mcu_address + 7)<<0) ;
190	190
191		mcu_size   =   (memory_read_byte(srcspace, mcu_address + 8)<<8) +
192		(memory_read_byte(srcspace, mcu_address + 9)<<0) ;
	191	mcu_size   =   (srcspace->read_byte(mcu_address + 8)<<8) +
	192	(srcspace->read_byte(mcu_address + 9)<<0) ;
193	193
194	194	logerror("%s : MCU executes command $%02X, %04X %02X-> %04x\n",cpuexec_describe_context(machine),mcu_command,mcu_src,mcu_size,mcu_dst);
195	195
196	196	for( ; mcu_size > 0 ; mcu_size-- )
197	197	{
198	198	mcu_src &= 0xffff;   mcu_dst &= 0xffff;
199		memory_write_byte(dstspace,0x100000 + mcu_dst,memory_read_byte(srcspace,0x100000 + mcu_src));
	199	dstspace->write_byte(0x100000 + mcu_dst,srcspace->read_byte(0x100000 + mcu_src));
200	200	mcu_src ++;         mcu_dst ++;
201	201	}
202	202
203	203	/* Raise a "job done" flag */
204		memory_write_byte(srcspace,mcu_address+0,0xff);
205		memory_write_byte(srcspace,mcu_address+1,0xff);
	204	srcspace->write_byte(mcu_address+0,0xff);
	205	srcspace->write_byte(mcu_address+1,0xff);
206	206
207	207	break;
208	208
r8962	r8963
216	216	//case 0x85: //? Do what?
217	217	default:
218	218	/* Raise a "job done" flag */
219		memory_write_byte(srcspace,mcu_address+0,0xff);
220		memory_write_byte(srcspace,mcu_address+1,0xff);
	219	srcspace->write_byte(mcu_address+0,0xff);
	220	srcspace->write_byte(mcu_address+1,0xff);
221	221
222	222	logerror("%s : MCU ERROR, unknown command $%02X\n",cpuexec_describe_context(machine),mcu_command);
223	223	}
224	224
225	225	/* Erase command (so that it won't be processed again)? */
226		memory_write_byte(srcspace,mcu_list,0x00);
	226	srcspace->write_byte(mcu_list,0x00);
227	227	}
228	228	}
229	229

src/mame/drivers/exterm.c

r8962	r8963
110	110	*
111	111	*************************************/
112	112
113		static UINT16 exterm_trackball_port_r(const address_space *space, int which, UINT16 mem_mask)
	113	static UINT16 exterm_trackball_port_r(address_space *space, int which, UINT16 mem_mask)
114	114	{
115	115	UINT16 port;
116	116

src/mame/drivers/seibuspi.c

r8962	r8963
24	24	SYS386 seems like a lower-cost version of single-board SPI.
25	25	It has a 40MHz AMD 386 and a considerably weaker sound system (dual MSM6295).
26	26
27		NOTES:
28
29		rjetus:
30		- If you get a blank screen on startup you need to press F2 and choose "Reset settings",
31		followed by "Exit". This will create a proper NVRAM
32
33	27	TODO:
34	28	- Alpha blending. Screen shot on www.system16.com show that during attract mode
35	29	in Viper Phase 1 the "Viper" part of the logo (the red part) should be partially
r8962	r8963
765	759
766	760	static UINT8 ejsakura_input_port = 0;
767	761
768		static UINT8 z80_fifoout_pop(const address_space *space)
	762	static UINT8 z80_fifoout_pop(address_space *space)
769	763	{
770	764	UINT8 r;
771	765	if (fifoout_wpos == fifoout_rpos)
r8962	r8963
786	780	return r;
787	781	}
788	782
789		static void z80_fifoout_push(const address_space *space, UINT8 data)
	783	static void z80_fifoout_push(address_space *space, UINT8 data)
790	784	{
791	785	fifoout_data[fifoout_wpos++] = data;
792	786	if (fifoout_wpos == FIFO_SIZE)
r8962	r8963
801	795	fifoout_read_request = 1;
802	796	}
803	797
804		static UINT8 z80_fifoin_pop(const address_space *space)
	798	static UINT8 z80_fifoin_pop(address_space *space)
805	799	{
806	800	UINT8 r;
807	801	if (fifoin_wpos == fifoin_rpos)
r8962	r8963
822	816	return r;
823	817	}
824	818
825		static void z80_fifoin_push(const address_space *space, UINT8 data)
	819	static void z80_fifoin_push(address_space *space, UINT8 data)
826	820	{
827	821	fifoin_data[fifoin_wpos++] = data;
828	822	if(fifoin_wpos == FIFO_SIZE)
r8962	r8963
2277	2271
2278	2272	/* video hardware */
2279	2273	MDRV_SCREEN_ADD("screen", RASTER)
2280		MDRV_SCREEN_REFRESH_RATE(54)
	2274	MDRV_SCREEN_REFRESH_RATE(57.59)
2281	2275	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
2282	2276	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
2283	2277	MDRV_SCREEN_SIZE(64*8, 32*8)
r8962	r8963
2800	2794	ROM_LOAD("gd_8.216",   0x200000, 0x080000, CRC(f88cb6e4) SHA1(fb35b41307b490d5d08e4b8a70f8ff4ce2ca8105) )
2801	2795	ROM_END
2802	2796
2803		ROM_START( rdftdi )
	2797	ROM_START( rdftit )
2804	2798	ROM_REGION32_LE(0x200000, "user1", 0)   /* i386 program */
2805		ROM_LOAD32_BYTE("u211.bin", 0x000000, 0x80000, CRC(fc0e2885) SHA1(79621155d992d504e993bd3ee0d6ff3903bd5415) )
	2799	ROM_LOAD32_BYTE("seibu1",   0x000000, 0x80000, CRC(de0c3e3c) SHA1(b00225bad282e46b5825608f76eea6670bfe5527) )
2806	2800	ROM_LOAD32_BYTE("u212.bin", 0x000001, 0x80000, CRC(58ccb10c) SHA1(0cce4057bfada78121d9586574b98d46cdd7dd46) )
2807	2801	ROM_LOAD32_BYTE("u210.bin", 0x000002, 0x80000, CRC(47fc3c96) SHA1(7378f8caa847f89f235b5be6779118721076873b) )
2808	2802	ROM_LOAD32_BYTE("u29.bin",  0x000003, 0x80000, CRC(271bdd4b) SHA1(0a805568cbd6a9c18bdb755a41972ff6bba9e6eb) )
r8962	r8963
2830	2824	ROM_LOAD("gd_8.216",   0x200000, 0x080000, CRC(f88cb6e4) SHA1(fb35b41307b490d5d08e4b8a70f8ff4ce2ca8105) )
2831	2825	ROM_END
2832	2826
2833		ROM_START( rdftit )
	2827	ROM_START( rdfta )
2834	2828	ROM_REGION32_LE(0x200000, "user1", 0)   /* i386 program */
2835		ROM_LOAD32_BYTE("seibu1",  0x000000, 0x80000, CRC(de0c3e3c) SHA1(b00225bad282e46b5825608f76eea6670bfe5527) )
	2829	ROM_LOAD32_BYTE("seibu1a",  0x000000, 0x80000, CRC(c3bb2e58) SHA1(399ac4b387ba38f5fdad5c4172b2d3baeafd8773) )
2836	2830	ROM_LOAD32_BYTE("u212.bin", 0x000001, 0x80000, CRC(58ccb10c) SHA1(0cce4057bfada78121d9586574b98d46cdd7dd46) )
2837	2831	ROM_LOAD32_BYTE("u210.bin", 0x000002, 0x80000, CRC(47fc3c96) SHA1(7378f8caa847f89f235b5be6779118721076873b) )
2838	2832	ROM_LOAD32_BYTE("u29.bin",  0x000003, 0x80000, CRC(271bdd4b) SHA1(0a805568cbd6a9c18bdb755a41972ff6bba9e6eb) )
r8962	r8963
2860	2854	ROM_LOAD("gd_8.216",   0x200000, 0x080000, CRC(f88cb6e4) SHA1(fb35b41307b490d5d08e4b8a70f8ff4ce2ca8105) )
2861	2855	ROM_END
2862	2856
2863		ROM_START( rdfta )
	2857	ROM_START( rdftadi ) // Dream Island license
2864	2858	ROM_REGION32_LE(0x200000, "user1", 0)   /* i386 program */
2865		ROM_LOAD32_BYTE("seibu1a",  0x000000, 0x80000, CRC(c3bb2e58) SHA1(399ac4b387ba38f5fdad5c4172b2d3baeafd8773) )
2866		ROM_LOAD32_BYTE("u212.bin", 0x000001, 0x80000, CRC(58ccb10c) SHA1(0cce4057bfada78121d9586574b98d46cdd7dd46) )
2867		ROM_LOAD32_BYTE("u210.bin", 0x000002, 0x80000, CRC(47fc3c96) SHA1(7378f8caa847f89f235b5be6779118721076873b) )
2868		ROM_LOAD32_BYTE("u29.bin",  0x000003, 0x80000, CRC(271bdd4b) SHA1(0a805568cbd6a9c18bdb755a41972ff6bba9e6eb) )
	2859	ROM_LOAD32_BYTE("seibu__1.u0211",       0x000000, 0x080000, CRC(fc0e2885) SHA1(79621155d992d504e993bd3ee0d6ff3903bd5415) )
	2860	ROM_LOAD32_BYTE("raiden-f_prg2.u0212",  0x000001, 0x080000, CRC(58ccb10c) SHA1(0cce4057bfada78121d9586574b98d46cdd7dd46) )
	2861	ROM_LOAD32_WORD("raiden-f_prg34.u0219", 0x000002, 0x100000, CRC(63f01d17) SHA1(74dbd0417b974583da87fc6c7a081b03fd4e16b8) )
2869	2862
2870		ROM_REGION( 0x30000, "gfx1", 0)   /* text layer roms */
2871		ROM_LOAD24_BYTE("gd_5.423", 0x000000, 0x10000, CRC(8f8d4e14) SHA1(06c803975767ae98f40ba7ac5764a5bc8baa3a30) )
2872		ROM_LOAD24_BYTE("gd_6.424", 0x000001, 0x10000, CRC(6ac64968) SHA1(ec395205c24c4f864a1f805bb0d4641562d4faa9) )
2873		ROM_LOAD24_BYTE("gd_7.48",  0x000002, 0x10000, CRC(4d87e1ea) SHA1(3230e9b643fad773e61ab8ce09c0cd7d4d0558e3) )
	2863	ROM_REGION( 0x30000, "gfx1", 0)   /* text layer roms */ /* Do we need to specify an "endianess" so this works on all machines? */
	2864	ROM_LOAD24_WORD_SWAP("raiden-f__fix.u0425", 0x000000, 0x20000, BAD_DUMP CRC(cc7acfde) SHA1(1f3c40b4d2009e011e135c89aebf2b4bd05fa861) ) // Need to verify ROM
	2865	ROM_LOAD24_BYTE("seibu__7.u048",            0x000002, 0x10000, CRC(4d87e1ea) SHA1(3230e9b643fad773e61ab8ce09c0cd7d4d0558e3) ) // socket is silkscreened on pcb FIXP
2874	2866
2875	2867	ROM_REGION( 0x600000, "gfx2", 0)   /* background layer roms */
2876		ROM_LOAD24_WORD("gd_bg1-d.415", 0x000000, 0x200000, CRC(6a68054c) SHA1(5cbfc4ac90045f1401c2dda7a51936558c9de07e) )
2877		ROM_LOAD24_BYTE("gd_bg1-p.410", 0x000002, 0x100000, CRC(3400794a) SHA1(719808f7442bac612cefd7b7fffcd665e6337ad0) )
2878		ROM_LOAD24_WORD("gd_bg2-d.416", 0x300000, 0x200000, CRC(61cd2991) SHA1(bb608e3948bf9ea35b5e1615d2ba6858d029dcbe) )
2879		ROM_LOAD24_BYTE("gd_bg2-p.49",  0x300002, 0x100000, CRC(502d5799) SHA1(c3a0e1a4f5a7b35572ae1ff31315da4ed08aa2fe) )
	2868	ROM_LOAD24_WORD("gun_dogs__bg1-d.u0415", 0x000000, 0x200000, CRC(6a68054c) SHA1(5cbfc4ac90045f1401c2dda7a51936558c9de07e) ) // pads are silkscreened on pcb BG12
	2869	ROM_LOAD24_BYTE("gun_dogs__bg1-p.u0410", 0x000002, 0x100000, CRC(3400794a) SHA1(719808f7442bac612cefd7b7fffcd665e6337ad0) ) // pads are silkscreened on pcb BG12P
	2870	ROM_LOAD24_WORD("gun_dogs__bg2-d.u0424", 0x300000, 0x200000, CRC(61cd2991) SHA1(bb608e3948bf9ea35b5e1615d2ba6858d029dcbe) ) // pads are silkscreened on pcb BG3
	2871	ROM_LOAD24_BYTE("gun_dogs__bg2-p.u049",  0x300002, 0x100000, CRC(502d5799) SHA1(c3a0e1a4f5a7b35572ae1ff31315da4ed08aa2fe) ) // pads are silkscreened on pcb BG3P
2880	2872
2881	2873	ROM_REGION( 0xc00000, "gfx3", 0)   /* sprites */
2882		ROM_LOAD("gd_obj-1.322", 0x000000, 0x400000, CRC(59d86c99) SHA1(d3c9241e7b51fe21f8351051b063f91dc69bf905) )
2883		ROM_LOAD("gd_obj-2.324", 0x400000, 0x400000, CRC(1ceb0b6f) SHA1(97225a9b3e7be18080aa52f6570af2cce8f25c06) )
2884		ROM_LOAD("gd_obj-3.323", 0x800000, 0x400000, CRC(36e93234) SHA1(51917a80b7da5c32a9434a1076fc2916d62e6a3e) )
	2874	ROM_LOAD("gun_dogs__obj-1.u0322", 0x000000, 0x400000, CRC(59d86c99) SHA1(d3c9241e7b51fe21f8351051b063f91dc69bf905) ) // pads are silkscreened on pcb OBJ1
	2875	ROM_LOAD("gun_dogs__obj-2.u0324", 0x400000, 0x400000, CRC(1ceb0b6f) SHA1(97225a9b3e7be18080aa52f6570af2cce8f25c06) ) // pads are silkscreened on pcb OBJ2
	2876	ROM_LOAD("gun_dogs__obj-3.u0323", 0x800000, 0x400000, CRC(36e93234) SHA1(51917a80b7da5c32a9434a1076fc2916d62e6a3e) ) // pads are silkscreened on pcb OBJ3
2885	2877
2886	2878	ROM_REGION(0x200000, "ymf", ROMREGION_ERASE00)
2887	2879
2888		ROM_REGION(0x280000, "user2", ROMREGION_ERASE00)   /* sound roms */
2889		ROM_LOAD("gd_pcm.217", 0x000000, 0x200000, CRC(31253ad7) SHA1(c81c8d50f8f287f5cbfaec77b30d969b01ce11a9) )
2890		ROM_LOAD("gd_8.216",   0x200000, 0x080000, CRC(f88cb6e4) SHA1(fb35b41307b490d5d08e4b8a70f8ff4ce2ca8105) )
	2880	ROM_REGION(0x400000, "user2", ROMREGION_ERASE00)   /* sound roms */
	2881	ROM_LOAD("raiden-f__pcm2.u0217", 0x000000, 0x400000, NO_DUMP )//the real rom used here is actually a 0x400000 long rom located at u0217 which contains the combined data of the two smaller roms on the older cart pcb at 217 and 216; pads are silkscreened SOUND0
	2882	//u0222 (unpopulated) is silkscreend SOUND1 and would expect a 27040 similar to the old gd_8 rom.
	2883	ROM_LOAD("gun_dogs__pcm.217", 0x000000, 0x200000, BAD_DUMP CRC(31253ad7) SHA1(c81c8d50f8f287f5cbfaec77b30d969b01ce11a9) )
	2884	ROM_LOAD("gd_8.216",   0x200000, 0x080000, BAD_DUMP CRC(f88cb6e4) SHA1(fb35b41307b490d5d08e4b8a70f8ff4ce2ca8105) )
2891	2885	ROM_END
2892	2886
	2887	ROM_START( rdftam ) // Metrotainment license
	2888	ROM_REGION32_LE(0x200000, "user1", 0)   /* i386 program */
	2889	ROM_LOAD32_BYTE("seibu_1.u0211",        0x000000, 0x080000, CRC(156D8DB0) SHA1(93662B3EE494E37A56428A7AA3DAD7A957835950) ) // socket is silkscreened on pcb PRG0
	2890	ROM_LOAD32_BYTE("raiden-f_prg2.u0212",  0x000001, 0x080000, CRC(58ccb10c) SHA1(0cce4057bfada78121d9586574b98d46cdd7dd46) )
	2891	ROM_LOAD32_WORD("raiden-f_prg34.u0219", 0x000002, 0x100000, CRC(63f01d17) SHA1(74dbd0417b974583da87fc6c7a081b03fd4e16b8) )
	2892
	2893	ROM_REGION( 0x30000, "gfx1", 0)   /* text layer roms */ /* Do we need to specify an "endianess" so this works on all machines? */
	2894	ROM_LOAD24_WORD_SWAP("raiden-f__fix.u0425", 0x000000, 0x20000, BAD_DUMP CRC(cc7acfde) SHA1(1f3c40b4d2009e011e135c89aebf2b4bd05fa861) ) // Need to verify ROM
	2895	ROM_LOAD24_BYTE("seibu__7.u048",            0x000002, 0x10000, CRC(4d87e1ea) SHA1(3230e9b643fad773e61ab8ce09c0cd7d4d0558e3) ) // socket is silkscreened on pcb FIXP
	2896
	2897	ROM_REGION( 0x600000, "gfx2", 0)   /* background layer roms */
	2898	ROM_LOAD24_WORD("gun_dogs__bg1-d.u0415", 0x000000, 0x200000, CRC(6a68054c) SHA1(5cbfc4ac90045f1401c2dda7a51936558c9de07e) ) // pads are silkscreened on pcb BG12
	2899	ROM_LOAD24_BYTE("gun_dogs__bg1-p.u0410", 0x000002, 0x100000, CRC(3400794a) SHA1(719808f7442bac612cefd7b7fffcd665e6337ad0) ) // pads are silkscreened on pcb BG12P
	2900	ROM_LOAD24_WORD("gun_dogs__bg2-d.u0424", 0x300000, 0x200000, CRC(61cd2991) SHA1(bb608e3948bf9ea35b5e1615d2ba6858d029dcbe) ) // pads are silkscreened on pcb BG3
	2901	ROM_LOAD24_BYTE("gun_dogs__bg2-p.u049",  0x300002, 0x100000, CRC(502d5799) SHA1(c3a0e1a4f5a7b35572ae1ff31315da4ed08aa2fe) ) // pads are silkscreened on pcb BG3P
	2902
	2903	ROM_REGION( 0xc00000, "gfx3", 0)   /* sprites */
	2904	ROM_LOAD("gun_dogs__obj-1.u0322", 0x000000, 0x400000, CRC(59d86c99) SHA1(d3c9241e7b51fe21f8351051b063f91dc69bf905) ) // pads are silkscreened on pcb OBJ1
	2905	ROM_LOAD("gun_dogs__obj-2.u0324", 0x400000, 0x400000, CRC(1ceb0b6f) SHA1(97225a9b3e7be18080aa52f6570af2cce8f25c06) ) // pads are silkscreened on pcb OBJ2
	2906	ROM_LOAD("gun_dogs__obj-3.u0323", 0x800000, 0x400000, CRC(36e93234) SHA1(51917a80b7da5c32a9434a1076fc2916d62e6a3e) ) // pads are silkscreened on pcb OBJ3
	2907
	2908	ROM_REGION(0x200000, "ymf", ROMREGION_ERASE00)
	2909
	2910	ROM_REGION(0x400000, "user2", ROMREGION_ERASE00)   /* sound roms */
	2911	ROM_LOAD("raiden-f__pcm2.u0217", 0x000000, 0x400000, NO_DUMP )//the real rom used here is actually a 0x400000 long rom located at u0217 which contains the combined data of the two smaller roms on the older cart pcb at 217 and 216; pads are silkscreened SOUND0
	2912	//u0222 (unpopulated) is silkscreend SOUND1 and would expect a 27040 similar to the old gd_8 rom.
	2913	ROM_LOAD("gun_dogs__pcm.217", 0x000000, 0x200000, BAD_DUMP CRC(31253ad7) SHA1(c81c8d50f8f287f5cbfaec77b30d969b01ce11a9) )
	2914	ROM_LOAD("gd_8.216",   0x200000, 0x080000, BAD_DUMP CRC(f88cb6e4) SHA1(fb35b41307b490d5d08e4b8a70f8ff4ce2ca8105) )
	2915	ROM_END
	2916
	2917
2893	2918	ROM_START( rdft2us )   /* Single board version SXX2F */
2894	2919	ROM_REGION32_LE(0x200000, "user1", 0)   /* i386 program */
2895	2920	ROM_LOAD32_BYTE("prg0.u0259", 0x000000, 0x80000, CRC(ff3eeec1) SHA1(88c1741e4936db9a5b13e562061b0f1cc6fa6b36) )
r8962	r8963
3056	3081	ROM_LOAD("sound1.u0222", 0x200000, 0x080000, CRC(b7bd3703) SHA1(6427a7e6de10d6743d6e64b984a1d1c647f5643a) )
3057	3082	ROM_END
3058	3083
3059		ROM_START( rdft2a ) /* SPI Cart, Asia (Metrotainment license) */
3060		ROM_REGION32_LE(0x200000, "user1", 0)   /* i386 program */
3061		ROM_LOAD32_BYTE("prg0.met", 0x000000, 0x80000, CRC(046b3f0e) SHA1(033898f658d6007f891828835734422d4af36321) )
3062		ROM_LOAD32_BYTE("prg1.bin", 0x000001, 0x80000, CRC(cab55d88) SHA1(246e13880d34b6c7c3f4ab5e18fa8a0547c03d9d) )
3063		ROM_LOAD32_BYTE("prg2.bin", 0x000002, 0x80000, CRC(83758b0e) SHA1(63adb2d09e7bd7dba47a55b3b579d543dfb553e3) )
3064		ROM_LOAD32_BYTE("prg3.bin", 0x000003, 0x80000, CRC(084fb5e4) SHA1(588bfe091662b88f02f528181a2f1d9c67c7b280) )
	3084	ROM_START( rdft2a ) /* SPI Cart, Asia (Metrotainment license); SPI PCB is marked "(C)1997 SXX2C ROM SUB8" */
	3085	// The SUB8 board is also capable of having two 23C8100 roms at U0223 and U0219 for PRG instead of the four roms below.
	3086	ROM_REGION32_LE(0x200000, "user1", 0)   /* i386 program, all are 27C040 */
	3087	ROM_LOAD32_BYTE("seibu__1.u0211", 0x000000, 0x80000, CRC(046b3f0e) SHA1(033898f658d6007f891828835734422d4af36321) ) // socket is silkscreened on pcb PRG1
	3088	ROM_LOAD32_BYTE("seibu__2.u0212", 0x000001, 0x80000, CRC(cab55d88) SHA1(246e13880d34b6c7c3f4ab5e18fa8a0547c03d9d) ) // socket is silkscreened on pcb PRG2
	3089	ROM_LOAD32_BYTE("seibu__3.u0221", 0x000002, 0x80000, CRC(83758b0e) SHA1(63adb2d09e7bd7dba47a55b3b579d543dfb553e3) ) // socket is silkscreened on pcb PRG3
	3090	ROM_LOAD32_BYTE("seibu__4.u0220", 0x000003, 0x80000, CRC(084fb5e4) SHA1(588bfe091662b88f02f528181a2f1d9c67c7b280) ) // socket is silkscreened on pcb PRG4
3065	3091
3066		ROM_REGION( 0x30000, "gfx1", 0)
3067		ROM_LOAD24_BYTE("fix0.u0524", 0x000001, 0x10000, CRC(6fdf4cf6) SHA1(7e9d4a49e829dfdc373c0f5acfbe8c7a91ac115b) )
3068		ROM_LOAD24_BYTE("fix1.u0518", 0x000000, 0x10000, CRC(69b7899b) SHA1(d3cacd4ef4d2c95d803403101beb9d4be75fae61) )
3069		ROM_LOAD24_BYTE("fixp.u0514", 0x000002, 0x10000, CRC(99a5fece) SHA1(44ae95d650ed6e00202d3438f5f91a5e52e319cb) )
	3092	ROM_REGION( 0x30000, "gfx1", 0)   /* all are 27C512 */
	3093	ROM_LOAD24_BYTE("seibu__5.u0524", 0x000001, 0x10000, CRC(6fdf4cf6) SHA1(7e9d4a49e829dfdc373c0f5acfbe8c7a91ac115b) ) // socket is silkscreened on pcb FIX0
	3094	ROM_LOAD24_BYTE("seibu__6.u0518", 0x000000, 0x10000, CRC(69b7899b) SHA1(d3cacd4ef4d2c95d803403101beb9d4be75fae61) ) // socket is silkscreened on pcb FIX1
	3095	ROM_LOAD24_BYTE("seibu__7.u0514", 0x000002, 0x10000, CRC(99a5fece) SHA1(44ae95d650ed6e00202d3438f5f91a5e52e319cb) ) // socket is silkscreened on pcb FIXP
3070	3096
3071		ROM_REGION( 0xc00000, "gfx2", 0)   /* background layer roms */
3072		ROM_LOAD24_WORD("bg-1d.u0535", 0x000000, 0x400000, CRC(6143f576) SHA1(c034923d0663d9ef24357a03098b8cb81dbab9f8) )
3073		ROM_LOAD24_BYTE("bg-1p.u0537", 0x000002, 0x200000, CRC(55e64ef7) SHA1(aae991268948d07342ee8ba1b3761bd180aab8ec) )
3074		ROM_LOAD24_WORD("bg-2d.u0536", 0x600000, 0x400000, CRC(c607a444) SHA1(dc1aa96a42e9394ca6036359670a4ec6f830c96d) )
3075		ROM_LOAD24_BYTE("bg-2p.u0538", 0x600002, 0x200000, CRC(f0830248) SHA1(6075df96b49e70d2243fef691e096119e7a4d044) )
	3097	ROM_REGION( 0xc00000, "gfx2", 0)   /* background layer roms - half are MX semiconductor MX23C3210MC, half are some sort of 23C1610 equivalent with no visible manufacturer name */
	3098	ROM_LOAD24_WORD("raiden-f2bg-1d.u0535", 0x000000, 0x400000, CRC(6143f576) SHA1(c034923d0663d9ef24357a03098b8cb81dbab9f8) ) // pads are silkscreened on pcb BG12
	3099	ROM_LOAD24_BYTE("raiden-f2__bg-1p.u0537", 0x000002, 0x200000, CRC(55e64ef7) SHA1(aae991268948d07342ee8ba1b3761bd180aab8ec) ) // pads are silkscreened on pcb BG12P
	3100	ROM_LOAD24_WORD("raiden-f2bg-2d.u0536", 0x600000, 0x400000, CRC(c607a444) SHA1(dc1aa96a42e9394ca6036359670a4ec6f830c96d) ) // pads are silkscreened on pcb BG3
	3101	ROM_LOAD24_BYTE("raiden-f2__bg-2p.u0538", 0x600002, 0x200000, CRC(f0830248) SHA1(6075df96b49e70d2243fef691e096119e7a4d044) ) // pads are silkscreened on pcb BG3P
3076	3102
3077		ROM_REGION( 0x1200000, "gfx3", 0)   /* sprites */
3078		ROM_LOAD("obj3.u0434",  0x0000000, 0x400000, CRC(e08f42dc) SHA1(5188d71d4355eaf43ea8893b4cfc4fe80cc24f41) )
3079		ROM_LOAD("obj3b.u0433", 0x0400000, 0x200000, CRC(1b6a523c) SHA1(99a420dbc8e22e7832ccda7cec9fa661a2a2687a) )
3080		ROM_LOAD("obj2.u0431",  0x0600000, 0x400000, CRC(7aeadd8e) SHA1(47103c0579240c5b1add4d0b164eaf76f5fa97f0) )
3081		ROM_LOAD("obj2b.u0432", 0x0a00000, 0x200000, CRC(5d790a5d) SHA1(1ed5d4ad4c9a7e505ce35dcc90d184c26ce891dc) )
3082		ROM_LOAD("obj1.u0429",  0x0c00000, 0x400000, CRC(c2c50f02) SHA1(b81397b5800c6d49f58b7ac7ff6eac56da3c5257) )
3083		ROM_LOAD("obj1b.u0430", 0x1000000, 0x200000, CRC(5259321f) SHA1(3c70c1147e49f81371d0f60f7108d9718d56faf4) )
	3103	ROM_REGION( 0x1200000, "gfx3", 0)   /* sprites - all are paired MX semconductor MX23C3210TC and MX23C1610TC mask roms */
	3104	ROM_LOAD("raiden-f2obj-3.u0434",  0x0000000, 0x400000, CRC(e08f42dc) SHA1(5188d71d4355eaf43ea8893b4cfc4fe80cc24f41) ) // pads are silkscreened on pcb OBJ3
	3105	ROM_LOAD("raiden-f2obj-6.u0433", 0x0400000, 0x200000, CRC(1b6a523c) SHA1(99a420dbc8e22e7832ccda7cec9fa661a2a2687a) ) // pads are silkscreened on pcb OBJ3B
	3106	ROM_LOAD("raiden-f2obj-2.u0431",  0x0600000, 0x400000, CRC(7aeadd8e) SHA1(47103c0579240c5b1add4d0b164eaf76f5fa97f0) ) // pads are silkscreened on pcb OBJ2
	3107	ROM_LOAD("raiden-f2obj-5.u0432", 0x0a00000, 0x200000, CRC(5d790a5d) SHA1(1ed5d4ad4c9a7e505ce35dcc90d184c26ce891dc) ) // pads are silkscreened on pcb OBJ2B
	3108	ROM_LOAD("raiden-f2obj-1.u0429",  0x0c00000, 0x400000, CRC(c2c50f02) SHA1(b81397b5800c6d49f58b7ac7ff6eac56da3c5257) ) // pads are silkscreened on pcb OBJ1
	3109	ROM_LOAD("raiden-f2obj-4.u0430", 0x1000000, 0x200000, CRC(5259321f) SHA1(3c70c1147e49f81371d0f60f7108d9718d56faf4) ) // pads are silkscreened on pcb OBJ1B
3084	3110
3085	3111	ROM_REGION(0x200000, "ymf", ROMREGION_ERASE00)
3086	3112
3087		ROM_REGION(0x280000, "user2", ROMREGION_ERASE00)   /* sound roms */
3088		ROM_LOAD("pcm.u0217",    0x000000, 0x200000, CRC(2edc30b5) SHA1(c25d690d633657fc3687636b9070f36bd305ae06) )
3089		ROM_LOAD("sound1.u0222", 0x200000, 0x080000, CRC(b7bd3703) SHA1(6427a7e6de10d6743d6e64b984a1d1c647f5643a) )
	3113	ROM_REGION(0x280000, "user2", ROMREGION_ERASE00)   /* sound roms - sound0 is some sort of 23C1610 equivalent with no visible manufacturer name, sound1 is a 27C040 */
	3114	ROM_LOAD("raiden-f2__pcm.u0217",    0x000000, 0x200000, CRC(2edc30b5) SHA1(c25d690d633657fc3687636b9070f36bd305ae06) ) // pads are silkscreened on pcb SOUND0
	3115	ROM_LOAD("seibu__8.u0222", 0x200000, 0x080000, CRC(b7bd3703) SHA1(6427a7e6de10d6743d6e64b984a1d1c647f5643a) ) // socket is silkscreened on pcb SOUND1
3090	3116	ROM_END
3091	3117
3092	3118	ROM_START( rdft2a2 ) /* SPI Cart, Asia (Dream Island license) */
r8962	r8963
3276	3302	ROM_LOAD("sound1.u0222", 0x200000, 0x080000, CRC(d4fc3da1) SHA1(a03bd97e36a21d27a834b9691b27a7eb7ac51ff2) )
3277	3303	ROM_END
3278	3304
3279		ROM_START( rfjetus )   /* Single board version SXX2G */
	3305	ROM_START( rfjets )   /* Single board version SXX2G */
3280	3306	ROM_REGION32_LE(0x200000, "user1", 0)   /* i386 program */
3281	3307	ROM_LOAD32_BYTE("rfj-06.u0259", 0x000000, 0x80000, CRC(c835aa7a) SHA1(291eada97ceb907dfea15688ce6055e63b3aa675) ) /* PRG0 */
3282	3308	ROM_LOAD32_BYTE("rfj-07.u0258", 0x000001, 0x80000, CRC(3b6ca1ca) SHA1(9db019c0ddecfb58e2be5c345d78352f700035bf) ) /* PRG1 */
r8962	r8963
3305	3331	ROM_REGION(0x280000, "ymf", ROMREGION_ERASE00)   /* sound roms */
3306	3332	ROM_LOAD("pcm-d.u0103",  0x000000, 0x200000, CRC(8ee3ff45) SHA1(2801b23495866c91c8f8bebd37d5fcae7a625838) )
3307	3333	ROM_LOAD("rfj-04.u0107", 0x200000, 0x080000, CRC(c050da03) SHA1(1002dac51a3a4932c4f0074c1f3d97a597d98755) ) /* SOUND1 */
	3334
	3335	ROM_REGION16_BE( 0x80, "eeprom", 0 )
	3336	ROM_LOAD16_WORD( "93c46-rfjets.bin", 0x0000, 0x0080, CRC(8fe8063b) SHA1(afb0141580e1b2bd149092a9cc9e8b4072b1ef10) )
3308	3337	ROM_END
3309	3338
3310	3339
r8962	r8963
3551	3580	GAME( 1996, rdftu,     rdft,    spi,      spi_3button, rdft,   ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden Fighters (US)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3552	3581	GAME( 1996, rdftau,    rdft,    spi,      spi_3button, rdft,   ROT270, "Seibu Kaihatsu", "Raiden Fighters (Australia)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3553	3582	GAME( 1996, rdftj,     rdft,    spi,      spi_3button, rdft,   ROT270, "Seibu Kaihatsu", "Raiden Fighters (Japan set 2)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3554		GAME( 1996, rdftdi,    rdft,    spi,      spi_3button, rdft,   ROT270, "Seibu Kaihatsu (Dream Island license)", "Raiden Fighters (Dream Island Co. license)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
	3583	GAME( 1996, rdftadi,   rdft,    spi,      spi_3button, rdft,   ROT270, "Seibu Kaihatsu (Dream Island license)", "Raiden Fighters (Asia, Dream Island Co., LTD. license, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
	3584	GAME( 1996, rdftam,    rdft,    spi,      spi_3button, rdft,   ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden Fighters (Asia, Metrotainment Network license, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3555	3585	GAME( 1996, rdftit,    rdft,    spi,      spi_3button, rdft,   ROT270, "Seibu Kaihatsu", "Raiden Fighters (Italy)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3556	3586	GAME( 1996, rdfta,     rdft,    spi,      spi_3button, rdft,   ROT270, "Seibu Kaihatsu", "Raiden Fighters (Austria)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3557	3587
3558	3588	GAME( 1997, rdft2,     0,       spi,      spi_2button, rdft2,  ROT270, "Seibu Kaihatsu (Tuning license)", "Raiden Fighters 2",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3559		GAME( 1997, rdft2a2,   rdft2,   spi,      spi_2button, rdft2,  ROT270, "Seibu Kaihatsu (Dream Island license)", "Raiden Fighters 2 (Asia, Dream Island license, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3560		GAME( 1997, rdft2a,    rdft2,   spi,      spi_2button, rdft2,  ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden Fighters 2 (Asia, Metrotainment license, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
	3589	GAME( 1997, rdft2a2,   rdft2,   spi,      spi_2button, rdft2,  ROT270, "Seibu Kaihatsu (Dream Island license)", "Raiden Fighters 2 (Asia, Dream Island Co., LTD. license, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
	3590	GAME( 1997, rdft2a,    rdft2,   spi,      spi_2button, rdft2,  ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden Fighters 2 (Asia, Metrotainment Network license, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3561	3591	GAME( 1997, rdft2j,    rdft2,   spi,      spi_2button, rdft2,  ROT270, "Seibu Kaihatsu", "Raiden Fighters 2 (Japan, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3562	3592	GAME( 1997, rdft2j2,   rdft2,   spi,      spi_2button, rdft2,  ROT270, "Seibu Kaihatsu", "Raiden Fighters 2 (Japan set 2, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
3563	3593	GAME( 1997, rdft2t,    rdft2,   spi,      spi_2button, rdft2,  ROT270, "Seibu Kaihatsu", "Raiden Fighters 2 (Taiwan, SPI)",  GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
r8962	r8963
3574	3604	GAME( 1997, rdft2us,   rdft2,   sxx2f,    spi_2button, rdft2us,  ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden Fighters 2.1 (US, Single Board)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND ) // title screen shows '2.1'
3575	3605
3576	3606	/* SXX2G */
3577		GAME( 1999, rfjetus,   rfjet,   sxx2g,    spi_2button, rfjet,    ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden Fighters Jet (US, Single Board)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND  ) // has 1998-99 copyright + planes unlocked
	3607	GAME( 1999, rfjets,    rfjet,   sxx2g,    spi_2button, rfjet,    ROT270, "Seibu Kaihatsu", "Raiden Fighters Jet (Single Board)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND  ) // has 1998-99 copyright + planes unlocked
3578	3608
3579	3609	/* SYS386 */
3580	3610	GAME( 2000, rdft22kc,  rdft2,   seibu386, seibu386_2button, rdft22kc, ROT270, "Seibu Kaihatsu", "Raiden Fighters 2 - 2000 (China)", GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/coolpool.c

r8962	r8963
92	92
93	93	UINT16 *vram = &state->vram_base[(params->rowaddr << 8) & 0x1ff00];
94	94	UINT32 *dest = BITMAP_ADDR32(bitmap, scanline, 0);
95		const rgb_t *pens = tlc34076_get_pens();
	95	const rgb_t *pens = tlc34076_get_pens(screen.machine->device("tlc34076"));
96	96	int coladdr = params->coladdr;
97	97	int x;
98	98
r8962	r8963
112	112	*
113	113	*************************************/
114	114
115		static void coolpool_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	115	static void coolpool_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
116	116	{
117	117	coolpool_state *state = space->machine->driver_data<coolpool_state>();
118	118
r8962	r8963
120	120	}
121	121
122	122
123		static void coolpool_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	123	static void coolpool_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
124	124	{
125	125	coolpool_state *state = space->machine->driver_data<coolpool_state>();
126	126
r8962	r8963
148	148
149	149	static MACHINE_RESET( coolpool )
150	150	{
151		tlc34076_reset(6);
152	151	nvram_write_enable = 0;
153	152	}
154	153
r8962	r8963
318	317	return data;
319	318	}
320	319
321		static int amerdart_trackball_direction(const address_space *space, int num, int data)
	320	static int amerdart_trackball_direction(address_space *space, int num, int data)
322	321	{
323	322	coolpool_state *state = space->machine->driver_data<coolpool_state>();
324	323
r8962	r8963
666	665
667	666	static ADDRESS_MAP_START( coolpool_map, ADDRESS_SPACE_PROGRAM, 16 )
668	667	AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_BASE_MEMBER(coolpool_state,vram_base)
669		AM_RANGE(0x01000000, 0x010000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)   // IMSG176P-40
	668	AM_RANGE(0x01000000, 0x010000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)   // IMSG176P-40
670	669	AM_RANGE(0x02000000, 0x020000ff) AM_READWRITE(coolpool_iop_r, coolpool_iop_w)
671	670	AM_RANGE(0x03000000, 0x0300000f) AM_WRITE(coolpool_misc_w)
672	671	AM_RANGE(0x03000000, 0x03ffffff) AM_ROM AM_REGION("gfx1", 0)
r8962	r8963
680	679	AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_BASE_MEMBER(coolpool_state,vram_base)
681	680	AM_RANGE(0x02000000, 0x020000ff) AM_READWRITE(coolpool_iop_r, coolpool_iop_w)
682	681	AM_RANGE(0x03000000, 0x0300000f) AM_WRITE(coolpool_misc_w)
683		AM_RANGE(0x04000000, 0x040000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)   // IMSG176P-40
	682	AM_RANGE(0x04000000, 0x040000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_r, tlc34076_w, 0x00ff)   // IMSG176P-40
684	683	AM_RANGE(0x06000000, 0x0601ffff) AM_MIRROR(0x00020000) AM_RAM_WRITE(nvram_thrash_data_w) AM_BASE_SIZE_GENERIC(nvram)
685	684	AM_RANGE(0xc0000000, 0xc00001ff) AM_READWRITE(tms34010_io_register_r, tms34010_io_register_w)
686	685	AM_RANGE(0xff000000, 0xff7fffff) AM_ROM AM_REGION("gfx1", 0)
r8962	r8963
917	916	MDRV_TIMER_ADD("nvram_timer", nvram_write_timeout)
918	917
919	918	/* video hardware */
	919	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	920
920	921	MDRV_VIDEO_UPDATE(tms340x0)
921	922
922	923	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/system1.c

r8962	r8963
555	555	switch ((mcu_control >> 3) & 3)
556	556	{
557	557	case 0:
558		memory_write_byte(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), offset, data);
	558	space->machine->device<z80_device>("maincpu")->space(AS_PROGRAM)->write_byte(offset, data);
559	559	break;
560	560
561	561	case 2:
562		memory_write_byte(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_IO), offset, data);
	562	space->machine->device<z80_device>("maincpu")->space(AS_IO)->write_byte(offset, data);
563	563	break;
564	564
565	565	default:
r8962	r8963
575	575	switch ((mcu_control >> 3) & 3)
576	576	{
577	577	case 0:
578		return memory_read_byte(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), offset);
	578	return space->machine->device<z80_device>("maincpu")->space(AS_PROGRAM)->read_byte(offset);
579	579
580	580	case 1:
581	581	return memory_region(space->machine, "maincpu")[offset + 0x10000];
582	582
583	583	case 2:
584		return memory_read_byte(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_IO), offset);
	584	return space->machine->device<z80_device>("maincpu")->space(AS_IO)->read_byte(offset);
585	585
586	586	default:
587	587	logerror("%03X: MCU movx read mode %02X offset %04X\n",
r8962	r8963
4600	4600
4601	4601	static DRIVER_INIT( nob )
4602	4602	{
4603		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
4604		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	4603	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	4604	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
4605	4605
4606	4606	DRIVER_INIT_CALL(bank44);
4607	4607
r8962	r8963
4632	4632	//  ROM[0x10000 + 0 * 0x8000 + 0x3347] = 0x18;  // 'jr' instead of 'jr z'
4633	4633
4634	4634	/* Patch to get sound in later levels(the program enters into a tight loop)*/
4635		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	4635	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
4636	4636	UINT8 *ROM2 = memory_region(machine, "soundcpu");
4637	4637
4638	4638	ROM2[0x02f9] = 0x28;//'jr z' instead of 'jr'
r8962	r8963
4648	4648
4649	4649	static DRIVER_INIT( bootleg )
4650	4650	{
4651		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
4652		memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x10000);
	4651	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	4652	space->set_decrypted_region(0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x10000);
4653	4653	DRIVER_INIT_CALL(bank00);
4654	4654	}
4655	4655
4656	4656
4657	4657	static DRIVER_INIT( bootsys2 )
4658	4658	{
4659		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
4660		memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x20000);
	4659	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	4660	space->set_decrypted_region(0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x20000);
4661	4661	memory_configure_bank_decrypted(machine, "bank1", 0, 4, memory_region(machine, "maincpu") + 0x30000, 0x4000);
4662	4662	DRIVER_INIT_CALL(bank0c);
4663	4663	}
r8962	r8963
4676	4676
4677	4677	static DRIVER_INIT( shtngmst )
4678	4678	{
4679		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	4679	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
4680	4680	memory_install_read_port(iospace, 0x12, 0x12, 0x00, 0x00, "TRIGGER");
4681	4681	memory_install_read_port(iospace, 0x18, 0x18, 0x00, 0x03, "18");
4682	4682	memory_install_read_port(iospace, 0x1c, 0x1c, 0x00, 0x02, "GUNX");

src/mame/drivers/niyanpai.c

r8962	r8963
176	176
177	177	static MACHINE_RESET( niyanpai )
178	178	{
179		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	179	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
180	180	int i;
181	181
182	182	// initialize TMPZ84C011 PIO
r8962	r8963
246	246
247	247	static CUSTOM_INPUT( musobana_outcoin_flag_r )
248	248	{
249		const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	249	address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
250	250	// tmp68301_parallel_interface[0x05]
251	251	//  bit 0   coin counter
252	252	//  bit 2   motor on

src/mame/drivers/suprnova.c

r8962	r8963
876	876	static READ32_HANDLER( bios_skip_r )
877	877	{
878	878	#if BIOS_SKIP
879		if ((cpu_get_pc(space->cpu)==0x6f8) || (cpu_get_pc(space->cpu)==0x6fa)) memory_write_byte(space, 0x06000029,1);
	879	if ((cpu_get_pc(space->cpu)==0x6f8) || (cpu_get_pc(space->cpu)==0x6fa)) space->write_byte(0x06000029,1);
880	880	#endif
881	881	return skns_main_ram[0x00028/4];
882	882	}

src/mame/drivers/shootout.c

r8962	r8963
413	413
414	414	static DRIVER_INIT( shootout )
415	415	{
416		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	416	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
417	417	int length = memory_region_length(machine, "maincpu");
418	418	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length - 0x8000);
419	419	UINT8 *rom = memory_region(machine, "maincpu");
420	420	int A;
421	421
422		memory_set_decrypted_region(space, 0x8000, 0xffff, decrypt);
	422	space->set_decrypted_region(0x8000, 0xffff, decrypt);
423	423
424	424	for (A = 0x8000;A < length;A++)
425	425	decrypt[A-0x8000] = (rom[A] & 0x9f) | ((rom[A] & 0x40) >> 1) | ((rom[A] & 0x20) << 1);

src/mame/drivers/megadriv.c

r8962	r8963
174	174	#ifdef UNUSED_FUNCTION
175	175	/* taken from segaic16.c */
176	176	/* doesn't seem to meet my needs, not used */
177		static UINT16 read_next_instruction(const address_space *space)
	177	static UINT16 read_next_instruction(address_space *space)
178	178	{
179	179	static UINT8 recurse = 0;
180	180	UINT16 result;
r8962	r8963
193	193
194	194	/* read original encrypted memory at that address */
195	195	recurse = 1;
196		result = memory_read_word(space, cpu_get_pc(space->cpu));
	196	result = space->read_word(cpu_get_pc(space->cpu));
197	197	recurse = 0;
198	198	return result;
199	199	}
r8962	r8963
3545	3545	if (d & 0x000f) { *dst &= ~0x000f; *dst |= d & 0x000f; }
3546	3546	}
3547	3547
3548		static UINT32 pm_io(const address_space *space, int reg, int write, UINT32 d)
	3548	static UINT32 pm_io(address_space *space, int reg, int write, UINT32 d)
3549	3549	{
3550	3550	if (svp.emu_status & SSP_PMC_SET)
3551	3551	{

src/mame/drivers/itech32.c

r8962	r8963
726	726
727	727	static WRITE8_DEVICE_HANDLER( drivedge_portb_out )
728	728	{
729		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	729	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
730	730	//  logerror("PIA port B write = %02x\n", data);
731	731
732	732	/* bit 0 controls the fan light */
r8962	r8963
751	751
752	752	static WRITE8_DEVICE_HANDLER( pia_portb_out )
753	753	{
754		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	754	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
755	755	//  logerror("PIA port B write = %02x\n", data);
756	756
757	757	/* bit 4 controls the ticket dispenser */

src/mame/drivers/calchase.c

r8962	r8963
228	228	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
229	229	& 0xFF0000;
230	230
231		return memory_read_byte(space, page_offset + offset);
	231	return space->read_byte(page_offset + offset);
232	232	}
233	233
234	234
r8962	r8963
237	237	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
238	238	& 0xFF0000;
239	239
240		memory_write_byte(space, page_offset + offset, data);
	240	space->write_byte(page_offset + offset, data);
241	241	}
242	242
243	243	static void set_dma_channel(running_device *device, int channel, int state)

src/mame/drivers/mouser.c

r8962	r8963
286	286	/* Decode the opcodes */
287	287
288	288	offs_t i;
289		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	289	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
290	290	UINT8 *rom = memory_region(machine, "maincpu");
291	291	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x6000);
292	292	UINT8 *table = memory_region(machine, "user1");
293	293
294		memory_set_decrypted_region(space, 0x0000, 0x5fff, decrypted);
	294	space->set_decrypted_region(0x0000, 0x5fff, decrypted);
295	295
296	296	for (i = 0; i < 0x6000; i++)
297	297	{

src/mame/drivers/aleck64.c

r8962	r8963
555	555	INPUT_PORTS_END
556	556
557	557	/* ?? */
558		static const mips3_config config =
	558	static const mips3_config vr4300_config =
559	559	{
560	560	16384,            /* code cache size */
561	561	8192,            /* data cache size */
r8962	r8963
573	573
574	574	/* basic machine hardware */
575	575	MDRV_CPU_ADD("maincpu", VR4300BE, 93750000)
576		MDRV_CPU_CONFIG(config)
	576	MDRV_CPU_CONFIG(vr4300_config)
577	577	MDRV_CPU_PROGRAM_MAP(n64_map)
578	578	MDRV_CPU_VBLANK_INT("screen", n64_vblank)
579	579

src/mame/drivers/trackfld.c

r8962	r8963
188	188	#include "sound/dac.h"
189	189	#include "sound/msm5205.h"
190	190	#include "includes/trackfld.h"
	191	#include "includes/konamipt.h"
191	192
192
193	193	#define MASTER_CLOCK          XTAL_18_432MHz
194	194	#define SOUND_CLOCK           XTAL_14_31818MHz
195	195	#define VLM_CLOCK             XTAL_3_579545MHz
r8962	r8963
290	290	AM_RANGE(0x6000, 0xffff) AM_ROM
291	291	ADDRESS_MAP_END
292	292
	293
	294	static ADDRESS_MAP_START( yieartf_map, ADDRESS_SPACE_PROGRAM, 8 )
	295	AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x007f) AM_WRITE(watchdog_reset_w)      /* AFE */
	296	AM_RANGE(0x1080, 0x1080) AM_MIRROR(0x0078) AM_WRITE(trackfld_flipscreen_w)   /* FLIP */
	297	AM_RANGE(0x1081, 0x1081) AM_MIRROR(0x0078) AM_WRITE(konami_sh_irqtrigger_w)   /* 26 */ /* cause interrupt on audio CPU */
	298	AM_RANGE(0x1082, 0x1082) AM_MIRROR(0x0078) AM_WRITENOP                  /* 25 */
	299	AM_RANGE(0x1083, 0x1084) AM_MIRROR(0x0078) AM_WRITE(coin_w)               /* 24, 23 */
	300	AM_RANGE(0x1085, 0x1085) AM_MIRROR(0x0078) AM_WRITENOP                  /* CN3.2 */
	301	AM_RANGE(0x1086, 0x1086) AM_MIRROR(0x0078) AM_WRITENOP                  /* CN3.4 */
	302	AM_RANGE(0x1087, 0x1087) AM_MIRROR(0x0078) AM_WRITE(interrupt_enable_w)      /* INT */
	303	//  AM_RANGE(0x1100, 0x1100) AM_MIRROR(0x007f) AM_WRITE(soundlatch_w)           /* 32 */
	304	AM_RANGE(0x1200, 0x1200) AM_MIRROR(0x007f) AM_READ_PORT("DSW2")
	305	AM_RANGE(0x1280, 0x1280) AM_MIRROR(0x007c) AM_READ_PORT("SYSTEM")
	306	AM_RANGE(0x1281, 0x1281) AM_MIRROR(0x007c) AM_READ_PORT("IN0")
	307	AM_RANGE(0x1282, 0x1282) AM_MIRROR(0x007c) AM_READ_PORT("IN1")
	308	AM_RANGE(0x1283, 0x1283) AM_MIRROR(0x007c) AM_READ_PORT("DSW1")
	309	AM_RANGE(0x1300, 0x1300) AM_MIRROR(0x007f) AM_READ_PORT("DSW3")
	310	AM_RANGE(0x1800, 0x183f) AM_RAM AM_BASE_MEMBER(trackfld_state, spriteram2)
	311	AM_RANGE(0x1840, 0x185f) AM_RAM AM_BASE_MEMBER(trackfld_state, scroll)
	312	AM_RANGE(0x1860, 0x1bff) AM_RAM
	313	AM_RANGE(0x1c00, 0x1c3f) AM_RAM AM_BASE_SIZE_MEMBER(trackfld_state, spriteram, spriteram_size)
	314	AM_RANGE(0x1c40, 0x1c5f) AM_RAM AM_BASE_MEMBER(trackfld_state, scroll2)
	315	AM_RANGE(0x1c60, 0x1fff) AM_RAM
	316	AM_RANGE(0x2800, 0x2fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
	317	AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(trackfld_videoram_w) AM_BASE_MEMBER(trackfld_state, videoram)
	318	AM_RANGE(0x3800, 0x3fff) AM_RAM_WRITE(trackfld_colorram_w) AM_BASE_MEMBER(trackfld_state, colorram)
	319	AM_RANGE(0x6000, 0xffff) AM_ROM
	320	ADDRESS_MAP_END
	321
293	322	static ADDRESS_MAP_START( reaktor_map, ADDRESS_SPACE_PROGRAM, 8 )
294	323	AM_RANGE(0x0000, 0x7fff) AM_ROM
295	324	/* all usual addresses +0x8000 */
r8962	r8963
809	838	PORT_DIPSETTING(      0x00, DEF_STR( On ) )
810	839	INPUT_PORTS_END
811	840
	841
	842	static INPUT_PORTS_START( yieartf )
	843	PORT_START("SYSTEM")
	844	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
	845	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	846	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
	847	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
	848	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
	849	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	850	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	851	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	852
	853	PORT_START("IN0")
	854	KONAMI8_MONO_B12_UNK
	855
	856	PORT_START("IN1")
	857	KONAMI8_COCKTAIL_B12_UNK
	858
	859	PORT_START("DSW2")
	860	PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) )
	861	PORT_DIPSETTING(    0x03, "1" )
	862	PORT_DIPSETTING(    0x02, "2" )
	863	PORT_DIPSETTING(    0x01, "3" )
	864	PORT_DIPSETTING(    0x00, "5" )
	865	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) )
	866	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
	867	PORT_DIPSETTING(    0x04, DEF_STR( Cocktail ) )
	868	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Bonus_Life ) )
	869	PORT_DIPSETTING(    0x08, "30000 80000" )
	870	PORT_DIPSETTING(    0x00, "40000 90000" )
	871	PORT_DIPNAME( 0x30, 0x10, DEF_STR( Difficulty ) )
	872	PORT_DIPSETTING(    0x30, DEF_STR( Easy ) )
	873	PORT_DIPSETTING(    0x10, DEF_STR( Normal ) )
	874	PORT_DIPSETTING(    0x20, DEF_STR( Difficult ) )
	875	PORT_DIPSETTING(    0x00, DEF_STR( Very_Difficult ) )
	876	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
	877	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
	878	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	879	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	880
	881	PORT_START("DSW3")
	882	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
	883	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	884	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	885	PORT_DIPNAME( 0x02, 0x02, "Upright Controls" )
	886	PORT_DIPSETTING(    0x02, DEF_STR( Single ) )
	887	PORT_DIPSETTING(    0x00, DEF_STR( Dual ) )
	888	PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
	889	PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNUSED )
	890
	891	PORT_START("DSW1")
	892	KONAMI_COINAGE(DEF_STR( Free_Play ), "Invalid")
	893	/* "Invalid" = both coin slots disabled */
	894	INPUT_PORTS_END
	895
	896
812	897	static const gfx_layout charlayout =
813	898	{
814	899	8,8,
r8962	r8963
839	924	GFXDECODE_END
840	925
841	926
	927
842	928	static void adpcm_vck_callback( running_device *device )
843	929	{
844	930	trackfld_state *state = device->machine->driver_data<trackfld_state>();
r8962	r8963
952	1038	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
953	1039	MACHINE_DRIVER_END
954	1040
	1041
	1042	static MACHINE_DRIVER_START( yieartf )
	1043
	1044	/* driver data */
	1045	MDRV_DRIVER_DATA(trackfld_state)
	1046
	1047	/* basic machine hardware */
	1048	MDRV_CPU_ADD("maincpu", M6809, MASTER_CLOCK/6/2)   /* a guess for now */
	1049	MDRV_CPU_PROGRAM_MAP(yieartf_map)
	1050	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
	1051
	1052	//  z80 isn't used
	1053	//  MDRV_CPU_ADD("audiocpu", Z80, SOUND_CLOCK/4)
	1054	//  MDRV_CPU_PROGRAM_MAP(sound_map)
	1055
	1056	MDRV_MACHINE_START(trackfld)
	1057	MDRV_MACHINE_RESET(trackfld)
	1058	MDRV_NVRAM_HANDLER(generic_0fill)
	1059
	1060	/* video hardware */
	1061	MDRV_SCREEN_ADD("screen", RASTER)
	1062	MDRV_SCREEN_REFRESH_RATE(60)
	1063	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	1064	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	1065	MDRV_SCREEN_SIZE(32*8, 32*8)
	1066	MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
	1067
	1068	MDRV_GFXDECODE(trackfld)
	1069	MDRV_PALETTE_LENGTH(16*16+16*16)
	1070
	1071	MDRV_PALETTE_INIT(trackfld)
	1072	MDRV_VIDEO_START(trackfld)
	1073	MDRV_VIDEO_UPDATE(trackfld)
	1074
	1075	/* sound hardware */
	1076	MDRV_SPEAKER_STANDARD_MONO("mono")
	1077
	1078	MDRV_SOUND_ADD("dac", DAC, 0)
	1079	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
	1080
	1081	MDRV_SOUND_ADD("snsnd", SN76496, SOUND_CLOCK/8)
	1082	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
	1083
	1084	MDRV_SOUND_ADD("vlm", VLM5030, VLM_CLOCK)
	1085	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
	1086	MACHINE_DRIVER_END
	1087
955	1088	/* same as the original, but uses ADPCM instead of VLM5030 */
956	1089	/* also different memory handlers do handle that */
957	1090	static MACHINE_DRIVER_START( hyprolyb )
r8962	r8963
974	1107	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
975	1108	MACHINE_DRIVER_END
976	1109
	1110	static MACHINE_DRIVER_START( atlantol )
	1111	MDRV_IMPORT_FROM(hyprolyb)
977	1112
	1113	MDRV_VIDEO_START(atlantol)
	1114	MACHINE_DRIVER_END
	1115
	1116
978	1117	static MACHINE_DRIVER_START( mastkin )
979	1118
980	1119	/* basic machine hardware */
r8962	r8963
1362	1501	ROM_LOAD( "c9_d15.bin",   0x0000, 0x2000, CRC(f546a56b) SHA1(caee3d8546eb7a75ce2a578c6a1a630246aec6b8) )
1363	1502	ROM_END
1364	1503
	1504	ROM_START( yieartf )
	1505	ROM_REGION( 0x10000, "maincpu", 0 )
	1506	ROM_LOAD( "2.2a",      0x08000, 0x2000, CRC(349430e9) SHA1(0cd1ac9b949cc53679a67d47f1eae0daf2012550) )
	1507	ROM_LOAD( "3.3a",      0x0a000, 0x2000, CRC(17d8337b) SHA1(aa6b92ff42a5b5282170bd280f7c0bb5a38607ec) )
	1508	ROM_LOAD( "4.4a",      0x0c000, 0x2000, CRC(a89a2166) SHA1(e9e72ae9631d86ff884d1ab718b4884c38a5ae2d) )
	1509	ROM_LOAD( "5.5a",      0x0e000, 0x2000, CRC(ff1599eb) SHA1(6f345a1b230f5f8016b47034c74a87b29d16682b) )
	1510
	1511	ROM_REGION( 0x10000, "gfx1", 0 )
	1512	ROM_LOAD( "a.15c",    0x00000, 0x4000, CRC(45109b29) SHA1(0794935b490497b21b99045c90231b7bac151d42) )
	1513	ROM_LOAD( "b.16c",    0x04000, 0x4000, CRC(1d650790) SHA1(5f2a4983b20251c712358547a7c62c0331c6cb6f) )
	1514	ROM_LOAD( "c.17c",    0x08000, 0x4000, CRC(e6aa945b) SHA1(c5757d16c28f5966fd04675c0c640ef9b6b76ca5) )
	1515	ROM_LOAD( "d.18c",    0x0c000, 0x4000, CRC(cc187c22) SHA1(555ba18a9648681e5140b3fd84af16959ee5296d) )
	1516
	1517	ROM_REGION( 0x04000, "gfx2", 0 )
	1518	ROM_LOAD( "6.16h",      0x00000, 0x2000, CRC(05a23af3) SHA1(d588a5d31e106a3c5b1e37b1826863108b87f02d) )
	1519	ROM_LOAD( "7.15h",      0x02000, 0x2000, CRC(988154fa) SHA1(981273ef70ae6a947c24559750a8e7dc3d032444) )
	1520
	1521	ROM_REGION( 0x0220, "proms", 0 )
	1522	ROM_LOAD( "yiear.clr",    0x00000, 0x0020, CRC(c283d71f) SHA1(10cd39f4e951ba6ca5610081c8c1fcd9d68b34d2) )
	1523	ROM_LOAD( "prom1.b16",   0x0020, 0x0100, CRC(93dc32a0) SHA1(04e69d234e0ae93d90bbf2ef507f1cfd5cf3f87a) ) /* sprite lookup table */
	1524	ROM_LOAD( "prom2.e15",   0x0120, 0x0100,  CRC(e7e0f9e5) SHA1(008605db7a262fab8e569c1e19c707991027abfc) ) /* char lookup table */
	1525
	1526	ROM_REGION( 0x2000, "vlm", 0 )   /* 8k for the VLM5030 data */
	1527	ROM_LOAD( "01.snd",    0x00000, 0x2000, CRC(f75a1539) SHA1(f139f6cb41351eb81ee47d777db03012aa5fadb1) )
	1528	ROM_END
	1529
	1530
	1531
1365	1532	static DRIVER_INIT( trackfld )
1366	1533	{
1367	1534	konami1_decode(machine, "maincpu");
r8962	r8963
1369	1536
1370	1537	static DRIVER_INIT( atlantol )
1371	1538	{
1372		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1539	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1373	1540	UINT8 *rom = memory_region(machine, "maincpu");
1374	1541	UINT8 *decrypt;
1375	1542	int A;
r8962	r8963
1381	1548	for (A = 0; A < 0x6000; A++)
1382	1549	decrypt[A] = rom[A];
1383	1550
1384		memory_set_decrypted_region(space, 0x0000, 0xffff, decrypt);
	1551	space->set_decrypted_region(0x0000, 0xffff, decrypt);
1385	1552
1386	1553	memory_install_write8_handler(space, 0x0800, 0x0800, 0, 0, atlantol_gfxbank_w);
1387	1554	memory_nop_write(space, 0x1000, 0x1000, 0, 0);
r8962	r8963
1441	1608	GAME( 1983, trackfldc, trackfld, trackfld, trackfld, trackfld, ROT0,  "Konami (Centuri license)", "Track & Field (Centuri)", GAME_SUPPORTS_SAVE )
1442	1609	GAME( 1983, hyprolym,  trackfld, trackfld, trackfld, trackfld, ROT0,  "Konami", "Hyper Olympic", GAME_SUPPORTS_SAVE )
1443	1610	GAME( 1983, hyprolymb, trackfld, hyprolyb, trackfld, trackfld, ROT0,  "bootleg", "Hyper Olympic (bootleg)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
1444		GAME( 1996, atlantol,  trackfld, hyprolyb, atlantol, atlantol, ROT0,  "bootleg", "Atlant Olimpic", GAME_SUPPORTS_SAVE )
	1611	GAME( 1996, atlantol,  trackfld, atlantol, atlantol, atlantol, ROT0,  "bootleg", "Atlant Olimpic", GAME_SUPPORTS_SAVE )
1445	1612	GAME( 1988, mastkin,   0,        mastkin,  mastkin,  mastkin,  ROT0,  "Du Tech", "The Masters of Kin", GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
1446	1613	GAME( 1982, trackfldnz,trackfld, trackfld, trackfld, trackfld, ROT0,  "bootleg? (Goldberg Enterprizes Inc.)", "Track & Field (NZ bootleg?)", GAME_NOT_WORKING)
1447	1614	GAME( 1985, wizzquiz,  0,        wizzquiz, wizzquiz, wizzquiz, ROT0,  "Zilec-Zenitone (Konami license)", "Wizz Quiz (Konami version)", GAME_SUPPORTS_SAVE )
1448	1615	GAME( 1985, wizzquiza, wizzquiz, wizzquiz, wizzquiz, wizzquiz, ROT0,  "Zilec-Zenitone", "Wizz Quiz (version 4)", GAME_SUPPORTS_SAVE )
1449	1616	GAME( 1987, reaktor,   0,        reaktor,  reaktor,  0,        ROT90, "Zilec", "Reaktor (Track & Field conversion)", GAME_SUPPORTS_SAVE )
	1617	GAME( 1985, yieartf,   yiear,    yieartf,  yieartf, 0,         ROT0,  "Konami", "Yie Ar Kung-Fu (GX361 conversion)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE ) // the conversion looks of bootleg quality, but the code is clearly a very different revision to either original hardware set...

src/mame/drivers/vegas.c

r8962	r8963
1675	1675
1676	1676	/* now remap everything */
1677	1677	if (LOG_DYNAMIC) logerror("remap_dynamic_addresses:\n");
	1678	address_space *space = const_cast<address_space *>(machine->device<cpu_device>("maincpu")->space(AS_PROGRAM));
	1679	assert(space != NULL);
1678	1680	for (addr = 0; addr < dynamic_count; addr++)
1679	1681	{
1680	1682	if (LOG_DYNAMIC) logerror("  installing: %08X-%08X %s,%s\n", dynamic[addr].start, dynamic[addr].end, dynamic[addr].rdname, dynamic[addr].wrname);
r8962	r8963
1682	1684	if (dynamic[addr].mread == NOP_HANDLER)
1683	1685	memory_nop_read(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dynamic[addr].start, dynamic[addr].end, 0, 0);
1684	1686	else if (dynamic[addr].mread != NULL)
1685		_memory_install_handler32(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mread, dynamic[addr].rdname, NULL, NULL, 0);
	1687	space->install_legacy_handler(dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mread, dynamic[addr].rdname);
1686	1688	if (dynamic[addr].mwrite != NULL)
1687		_memory_install_handler32(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dynamic[addr].start, dynamic[addr].end, 0, 0, NULL, NULL, dynamic[addr].mwrite, dynamic[addr].wrname, 0);
	1689	space->install_legacy_handler(dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mwrite, dynamic[addr].wrname);
1688	1690
1689	1691	if (dynamic[addr].dread != NULL || dynamic[addr].dwrite != NULL)
1690		_memory_install_device_handler32(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dynamic[addr].device, dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].dread, dynamic[addr].rdname, dynamic[addr].dwrite, dynamic[addr].wrname, 0);
	1692	{
	1693	space->install_legacy_handler(*dynamic[addr].device, dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].dread, dynamic[addr].rdname);
	1694	space->install_legacy_handler(*dynamic[addr].device, dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].dwrite, dynamic[addr].wrname);
	1695	}
1691	1696	}
1692	1697
1693	1698	if (LOG_DYNAMIC)
r8962	r8963
2208	2213	*
2209	2214	*************************************/
2210	2215
2211		static const mips3_config config =
	2216	static const mips3_config r5000_config =
2212	2217	{
2213	2218	16384,         /* code cache size */
2214	2219	16384,         /* data cache size */
r8962	r8963
2219	2224
2220	2225	/* basic machine hardware */
2221	2226	MDRV_CPU_ADD("maincpu", R5000LE, SYSTEM_CLOCK*2)
2222		MDRV_CPU_CONFIG(config)
	2227	MDRV_CPU_CONFIG(r5000_config)
2223	2228	MDRV_CPU_PROGRAM_MAP(vegas_map_8mb)
2224	2229
2225	2230	MDRV_MACHINE_START(vegas)
r8962	r8963
2289	2294	static MACHINE_DRIVER_START( vegasv3 )
2290	2295	MDRV_IMPORT_FROM(vegas32m)
2291	2296	MDRV_CPU_REPLACE("maincpu", RM7000LE, SYSTEM_CLOCK*2.5)
2292		MDRV_CPU_CONFIG(config)
	2297	MDRV_CPU_CONFIG(r5000_config)
2293	2298	MDRV_CPU_PROGRAM_MAP(vegas_map_8mb)
2294	2299
2295	2300	MDRV_DEVICE_REMOVE("voodoo")
r8962	r8963
2304	2309	MDRV_IMPORT_FROM(dcs2_audio_denver)
2305	2310
2306	2311	MDRV_CPU_REPLACE("maincpu", RM7000LE, SYSTEM_CLOCK*2.5)
2307		MDRV_CPU_CONFIG(config)
	2312	MDRV_CPU_CONFIG(r5000_config)
2308	2313	MDRV_CPU_PROGRAM_MAP(vegas_map_32mb)
2309	2314
2310	2315	MDRV_DEVICE_REMOVE("voodoo")

src/mame/drivers/tecmo.c

r8962	r8963
736	736	MDRV_CPU_PROGRAM_MAP(silkworm_map)
737	737	MACHINE_DRIVER_END
738	738
	739	#ifdef UNUSED_CODE
739	740	static MACHINE_DRIVER_START( backfirt )
740	741
741	742	/* basic machine hardware */
r8962	r8963
772	773	/* no MSM on this PCB */
773	774
774	775	MACHINE_DRIVER_END
	776	#endif
775	777
776	778	/***************************************************************************
777	779

src/mame/drivers/magictg.c

r8962	r8963
125	125	}
126	126
127	127	/* ?? */
128		static const mips3_config config =
	128	static const mips3_config r4600_config =
129	129	{
130	130	16384,            /* code cache size */
131	131	16384            /* data cache size */
r8962	r8963
142	142	static MACHINE_DRIVER_START( magictg )
143	143	/* basic machine hardware */
144	144	MDRV_CPU_ADD("maincpu", R4600BE, 10000000)  // ?? what cpu?
145		MDRV_CPU_CONFIG(config)
	145	MDRV_CPU_CONFIG(r4600_config)
146	146	MDRV_CPU_PROGRAM_MAP(magictg_map)
147	147
148	148	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/enigma2.c

r8962	r8963
173	173	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
174	174
175	175	state->last_sound_data = 0;
176		state->protection_data = 0;
177	176	state->flip_screen = 0;
178	177	state->sound_latch = 0;
179	178	state->blink_count = 0;
r8962	r8963
359	358	switch (offset)
360	359	{
361	360	case 0x01:
	361	/* For the DIP switches to be read, protection_data must be
	362	0xff on reset. The AY8910 reset ensures this. */
362	363	if (state->protection_data != 0xff)
363	364	ret = state->protection_data ^ 0x88;
364	365	else

src/mame/drivers/segaorun.c

r8962	r8963
366	366	static TIMER_CALLBACK( delayed_sound_data_w )
367	367	{
368	368	segas1x_state *state = machine->driver_data<segas1x_state>();
369		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	369	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
370	370	soundlatch_w(space, 0, param);
371	371	cpu_set_input_line(state->soundcpu, INPUT_LINE_NMI, ASSERT_LINE);
372	372	}

src/mame/drivers/mil4000.c

r8962	r8963
147	147
148	148	static VIDEO_START(mil4000)
149	149	{
150		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	150	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
151	151	int i;
152	152
153	153	// game doesn't clear the palette, so to avoid seeing mame defaults we clear it

src/mame/drivers/namcona1.c

r8962	r8963
499	499	static int transfer_dword( running_machine *machine, UINT32 dest, UINT32 source )
500	500	{
501	501	UINT16 data;
502		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	502	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
503	503
504	504	if( source>=0x400000 && source<0xc00000 )
505	505	{

src/mame/drivers/cdi.c

r8962	r8963
4792	4792
4793	4793	/*          rom       parent    machine   inp       init */
4794	4794	GAME( 1991, cdi,      0,        cdi,      cdi,      0,        ROT0,     "Philips", "CD-i (Mono-I) BIOS", GAME_IS_BIOS_ROOT )
4795		GAME( 1996, quizard,  cdi,      cdi,      cdi,      0,        ROT0,     "Disney",  "Quizard 3.2",   GAME_NOT_WORKING )
4796		GAME( 1995, quizrd22, cdi,      cdi,      cdi,      0,        ROT0,     "Disney",  "Quizard 2.2",   GAME_NOT_WORKING )
4797		GAME( 1995, quizrd17, cdi,      cdi,      cdi,      0,        ROT0,     "Disney",  "Quizard 1.7",   GAME_NOT_WORKING )
4798		GAME( 1995, quizrd12, cdi,      cdi,      cdi,      0,        ROT0,     "Disney",  "Quizard 1.2",   GAME_NOT_WORKING )
4799		GAME( 1998, quizrr42, cdi,      cdi,      cdi,      0,        ROT0,     "Disney",  "Quizard Rainbow 4.2",   GAME_NOT_WORKING )
4800		GAME( 1998, quizrr41, cdi,      cdi,      cdi,      0,        ROT0,     "Disney",  "Quizard Rainbow 4.1",   GAME_NOT_WORKING )
	4795	GAME( 1996, quizard,  cdi,      cdi,      cdi,      0,        ROT0,     "TAB Austria",  "Quizard 3.2",   GAME_NOT_WORKING )
	4796	GAME( 1995, quizrd22, cdi,      cdi,      cdi,      0,        ROT0,     "TAB Austria",  "Quizard 2.2",   GAME_NOT_WORKING )
	4797	GAME( 1995, quizrd17, cdi,      cdi,      cdi,      0,        ROT0,     "TAB Austria",  "Quizard 1.7",   GAME_NOT_WORKING )
	4798	GAME( 1995, quizrd12, cdi,      cdi,      cdi,      0,        ROT0,     "TAB Austria",  "Quizard 1.2",   GAME_NOT_WORKING )
	4799	GAME( 1998, quizrr42, cdi,      cdi,      cdi,      0,        ROT0,     "TAB Austria",  "Quizard Rainbow 4.2",   GAME_NOT_WORKING )
	4800	GAME( 1998, quizrr41, cdi,      cdi,      cdi,      0,        ROT0,     "TAB Austria",  "Quizard Rainbow 4.1",   GAME_NOT_WORKING )

src/mame/drivers/pcat_dyn.c

r8962	r8963
184	184	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
185	185	& 0xFF0000;
186	186
187		return memory_read_byte(space, page_offset + offset);
	187	return space->read_byte(page_offset + offset);
188	188	}
189	189
190	190
r8962	r8963
193	193	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
194	194	& 0xFF0000;
195	195
196		memory_write_byte(space, page_offset + offset, data);
	196	space->write_byte(page_offset + offset, data);
197	197	}
198	198
199	199	static void set_dma_channel(running_device *device, int channel, int state)

src/mame/drivers/dkong.c

r8962	r8963
296	296	2764.5Cp    DJR1-C-5C p    2764   5C(CPU)  F4FE
297	297	------------------------------------------------
298	298
	299
	300	D2K Jumpman returns Notes
	301	=========================
	302
	303	This is a DKong/Hack combo using a Braze Technologies High Score Save pcb.
	304	This pcb will be placed in the cpu socket and the Z80 together with an
	305	additional 64K rom, a 74LS245, an eeprom and a pal/gal. It looks like the
	306	"encryption" was a conincidence resulting from an easy pcb layout.
	307	The pal is also used to switch A15 on and off. This is done in locations
	308	6800 and E800.
	309
299	310	***************************************************************************/
300	311
301	312	#include "emu.h"
r8962	r8963
306	317	#include "machine/8257dma.h"
307	318	#include "machine/z80dma.h"
308	319	#include "machine/latch8.h"
	320	#include "machine/eeprom.h"
309	321
310	322	/*************************************
311	323	*
r8962	r8963
335	347	*
336	348	*************************************/
337	349
	350	static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
	351	static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
	352
338	353	static Z80DMA_INTERFACE( dk3_dma )
339	354	{
340	355	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT),
r8962	r8963
513	528
514	529	addr = ((bucket << 7) & 0x7c00) | (offset & 0x3ff);
515	530
516		return memory_read_byte(space, addr);
	531	return space->read_byte(addr);
517	532	}
518	533
519	534	static WRITE8_HANDLER( hb_dma_write_byte )
r8962	r8963
527	542
528	543	addr = ((bucket << 7) & 0x7c00) | (offset & 0x3ff);
529	544
530		memory_write_byte(space, addr, data);
	545	space->write_byte(addr, data);
531	546	}
532	547
533	548	static READ8_DEVICE_HANDLER( p8257_ctl_r )
r8962	r8963
589	604
590	605	static READ8_HANDLER( s2650_mirror_r )
591	606	{
592		return memory_read_byte(space, 0x1000 + offset);
	607	return space->read_byte(0x1000 + offset);
593	608	}
594	609
595	610
596	611	static WRITE8_HANDLER( s2650_mirror_w )
597	612	{
598		memory_write_byte(space, 0x1000 + offset, data);
	613	space->write_byte(0x1000 + offset, data);
599	614	}
600	615
601	616
r8962	r8963
1031	1046	PORT_DIPSETTING(    0x60, DEF_STR( 1C_4C ) )
1032	1047	INPUT_PORTS_END
1033	1048
	1049	static INPUT_PORTS_START( dkongx )   /* Supposedly the physical DIPS are read as defaults for the NVRAM when it's initially created.
	1050	The settings here match those from the default DSW0 settings.  Beyond the initial NVRAM
	1051	creation, DIPS (other than CABINET) can only be adjusted from the Service Mode */
	1052	PORT_INCLUDE( dkong )
	1053
	1054	PORT_MODIFY("DSW0")
	1055	PORT_DIPUNUSED_DIPLOC( 0x01, 0x00, "SW1:!1" )
	1056	PORT_DIPUNUSED_DIPLOC( 0x02, 0x00, "SW1:!2" )
	1057	PORT_DIPUNUSED_DIPLOC( 0x04, 0x00, "SW1:!3" )
	1058	PORT_DIPUNUSED_DIPLOC( 0x08, 0x00, "SW1:!4" )
	1059	PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW1:!5" )
	1060	PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW1:!6" )
	1061	PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW1:!7" )
	1062	INPUT_PORTS_END
	1063
1034	1064	static INPUT_PORTS_START( radarscp )
1035	1065	PORT_INCLUDE( radarscp_in0_2 )
1036	1066	PORT_INCLUDE( radarscp_in1_2 )
r8962	r8963
1569	1599
1570	1600	/*************************************
1571	1601	*
	1602	*  Braze Tech Addon boards
	1603	*
	1604	*************************************/
	1605
	1606	static const eeprom_interface braze_eeprom_intf =
	1607	{
	1608	7,            /* address bits */
	1609	8,            /* data bits */
	1610	"*110",         /* read command */
	1611	"*101",         /* write command */
	1612	0,            /* erase command */
	1613	"*10000xxxxx",   /* lock command */
	1614	"*10011xxxxx",   /* unlock command */
	1615	};
	1616
	1617	static READ8_DEVICE_HANDLER( braze_eeprom_r )
	1618	{
	1619	return eeprom_read_bit(device);
	1620	}
	1621
	1622	static WRITE8_HANDLER( braze_a15_w )
	1623	{
	1624	memory_set_bank(space->machine, "bank1", data & 0x01);
	1625	memory_set_bank(space->machine, "bank2", data & 0x01);
	1626	}
	1627
	1628	static WRITE8_DEVICE_HANDLER( braze_eeprom_w )
	1629	{
	1630	eeprom_write_bit(device, data & 0x01);
	1631	eeprom_set_cs_line(device, data & 0x04 ? CLEAR_LINE : ASSERT_LINE);
	1632	eeprom_set_clock_line(device, data & 0x02 ? ASSERT_LINE : CLEAR_LINE);
	1633	}
	1634
	1635	static void braze_decrypt_rom(running_machine *machine, UINT8 *dest)
	1636	{
	1637	UINT8 oldbyte,newbyte;
	1638	UINT8 *ROM;
	1639	UINT32 mem;
	1640	UINT32 newmem;
	1641
	1642	ROM = memory_region(machine, "braze");
	1643
	1644	for (mem=0;mem<0x10000;mem++)
	1645	{
	1646	oldbyte = ROM[mem];
	1647
	1648	newmem = ((BITSWAP8((mem >> 8),7,2,3,1,0,6,4,5))<<8) | (mem & 0xff);
	1649	newbyte = BITSWAP8(oldbyte, 1,4,5,7,6,0,3,2);
	1650
	1651	dest[newmem] = newbyte;
	1652	}
	1653	}
	1654
	1655	/*************************************
	1656	*
1572	1657	*  Machine driver
1573	1658	*
1574	1659	*************************************/
r8962	r8963
1641	1726
1642	1727	MACHINE_DRIVER_END
1643	1728
	1729	static MACHINE_DRIVER_START( braze )
	1730	MDRV_IMPORT_FROM(dkong2b)
	1731
	1732	MDRV_EEPROM_ADD("eeprom", braze_eeprom_intf)
	1733	MACHINE_DRIVER_END
	1734
1644	1735	static MACHINE_DRIVER_START( dkong3 )
1645	1736
1646	1737	/* driver data */
r8962	r8963
2025	2116	ROM_LOAD( "v-5e.bpr",     0x0200, 0x0100, CRC(b869b8f5) SHA1(c2bdccbf2654b64ea55cd589fd21323a9178a660) ) /* character color codes on a per-column basis */
2026	2117	ROM_END
2027	2118
	2119	ROM_START( dkongx )
	2120	ROM_REGION( 0x10000, "maincpu", 0 )
	2121	ROM_LOAD( "c_5et_g.bin",  0x0000, 0x1000, CRC(ba70b88b) SHA1(d76ebecfea1af098d843ee7e578e480cd658ac1a) )
	2122	ROM_LOAD( "c_5ct_g.bin",  0x1000, 0x1000, CRC(5ec461ec) SHA1(acb11a8fbdbb3ab46068385fe465f681e3c824bd) )
	2123	ROM_LOAD( "c_5bt_g.bin",  0x2000, 0x1000, CRC(1c97d324) SHA1(c7966261f3a1d3296927e0b6ee1c58039fc53c1f) )
	2124	ROM_LOAD( "c_5at_g.bin",  0x3000, 0x1000, CRC(b9005ac0) SHA1(3fe3599f6fa7c496f782053ddf7bacb453d197c4) )
	2125	/* space for diagnostic ROM */
	2126
	2127	ROM_REGION( 0x10000, "braze", 0 )
	2128	ROM_LOAD( "d2k12.bin",  0x0000, 0x10000,  CRC(6e95ca0d) SHA1(c058add0f146d577e3df0ba60828fe1734e78d01) ) /* Version 1.2 */
	2129
	2130	ROM_REGION( 0x1800, "soundcpu", 0 )   /* sound */
	2131	ROM_LOAD( "s_3i_b.bin",   0x0000, 0x0800, CRC(45a4ed06) SHA1(144d24464c1f9f01894eb12f846952290e6e32ef) )
	2132	ROM_RELOAD(               0x0800, 0x0800 )
	2133	ROM_LOAD( "s_3j_b.bin",   0x1000, 0x0800, CRC(4743fe92) SHA1(6c82b57637c0212a580591397e6a5a1718f19fd2) )
	2134
	2135	ROM_REGION( 0x1000, "gfx1", 0 )
	2136	ROM_LOAD( "v_5h_b.bin",   0x0000, 0x0800, CRC(12c8c95d) SHA1(a57ff5a231c45252a63b354137c920a1379b70a3) )
	2137	ROM_LOAD( "v_3pt.bin",    0x0800, 0x0800, CRC(15e9c5e9) SHA1(976eb1e18c74018193a35aa86cff482ebfc5cc4e) )
	2138
	2139	ROM_REGION( 0x2000, "gfx2", 0 )
	2140	ROM_LOAD( "l_4m_b.bin",   0x0000, 0x0800, CRC(59f8054d) SHA1(793dba9bf5a5fe76328acdfb90815c243d2a65f1) )
	2141	ROM_LOAD( "l_4n_b.bin",   0x0800, 0x0800, CRC(672e4714) SHA1(92e5d379f4838ac1fa44d448ce7d142dae42102f) )
	2142	ROM_LOAD( "l_4r_b.bin",   0x1000, 0x0800, CRC(feaa59ee) SHA1(ecf95db5a20098804fc8bd59232c66e2e0ed3db4) )
	2143	ROM_LOAD( "l_4s_b.bin",   0x1800, 0x0800, CRC(20f2ef7e) SHA1(3bc482a38bf579033f50082748ee95205b0f673d) )
	2144
	2145	ROM_REGION( 0x0300, "proms", 0 )
	2146	ROM_LOAD( "c-2k.bpr",     0x0000, 0x0100, CRC(e273ede5) SHA1(b50ec9e1837c00c20fb2a4369ec7dd0358321127) ) /* palette low 4 bits (inverted) */
	2147	ROM_LOAD( "c-2j.bpr",     0x0100, 0x0100, CRC(d6412358) SHA1(f9c872da2fe8e800574ae3bf483fb3ccacc92eb3) ) /* palette high 4 bits (inverted) */
	2148	ROM_LOAD( "v-5e.bpr",     0x0200, 0x0100, CRC(b869b8f5) SHA1(c2bdccbf2654b64ea55cd589fd21323a9178a660) ) /* character color codes on a per-column basis */
	2149	ROM_END
	2150
	2151	ROM_START( dkongx11 )
	2152	ROM_REGION( 0x10000, "maincpu", 0 )
	2153	ROM_LOAD( "c_5et_g.bin",  0x0000, 0x1000, CRC(ba70b88b) SHA1(d76ebecfea1af098d843ee7e578e480cd658ac1a) )
	2154	ROM_LOAD( "c_5ct_g.bin",  0x1000, 0x1000, CRC(5ec461ec) SHA1(acb11a8fbdbb3ab46068385fe465f681e3c824bd) )
	2155	ROM_LOAD( "c_5bt_g.bin",  0x2000, 0x1000, CRC(1c97d324) SHA1(c7966261f3a1d3296927e0b6ee1c58039fc53c1f) )
	2156	ROM_LOAD( "c_5at_g.bin",  0x3000, 0x1000, CRC(b9005ac0) SHA1(3fe3599f6fa7c496f782053ddf7bacb453d197c4) )
	2157	/* space for diagnostic ROM */
	2158
	2159	ROM_REGION( 0x10000, "braze", 0 )
	2160	ROM_LOAD( "d2k11.bin",    0x00000, 0x10000, CRC(2048fc42) SHA1(e427a09ed8e792ee8ce01cd0b07c6a0d5a7c5536) ) /* Version 1.1 */
	2161
	2162	ROM_REGION( 0x1800, "soundcpu", 0 )   /* sound */
	2163	ROM_LOAD( "s_3i_b.bin",   0x0000, 0x0800, CRC(45a4ed06) SHA1(144d24464c1f9f01894eb12f846952290e6e32ef) )
	2164	ROM_RELOAD(               0x0800, 0x0800 )
	2165	ROM_LOAD( "s_3j_b.bin",   0x1000, 0x0800, CRC(4743fe92) SHA1(6c82b57637c0212a580591397e6a5a1718f19fd2) )
	2166
	2167	ROM_REGION( 0x1000, "gfx1", 0 )
	2168	ROM_LOAD( "v_5h_b.bin",   0x0000, 0x0800, CRC(12c8c95d) SHA1(a57ff5a231c45252a63b354137c920a1379b70a3) )
	2169	ROM_LOAD( "v_3pt.bin",    0x0800, 0x0800, CRC(15e9c5e9) SHA1(976eb1e18c74018193a35aa86cff482ebfc5cc4e) )
	2170
	2171	ROM_REGION( 0x2000, "gfx2", 0 )
	2172	ROM_LOAD( "l_4m_b.bin",   0x0000, 0x0800, CRC(59f8054d) SHA1(793dba9bf5a5fe76328acdfb90815c243d2a65f1) )
	2173	ROM_LOAD( "l_4n_b.bin",   0x0800, 0x0800, CRC(672e4714) SHA1(92e5d379f4838ac1fa44d448ce7d142dae42102f) )
	2174	ROM_LOAD( "l_4r_b.bin",   0x1000, 0x0800, CRC(feaa59ee) SHA1(ecf95db5a20098804fc8bd59232c66e2e0ed3db4) )
	2175	ROM_LOAD( "l_4s_b.bin",   0x1800, 0x0800, CRC(20f2ef7e) SHA1(3bc482a38bf579033f50082748ee95205b0f673d) )
	2176
	2177	ROM_REGION( 0x0300, "proms", 0 )
	2178	ROM_LOAD( "c-2k.bpr",     0x0000, 0x0100, CRC(e273ede5) SHA1(b50ec9e1837c00c20fb2a4369ec7dd0358321127) ) /* palette low 4 bits (inverted) */
	2179	ROM_LOAD( "c-2j.bpr",     0x0100, 0x0100, CRC(d6412358) SHA1(f9c872da2fe8e800574ae3bf483fb3ccacc92eb3) ) /* palette high 4 bits (inverted) */
	2180	ROM_LOAD( "v-5e.bpr",     0x0200, 0x0100, CRC(b869b8f5) SHA1(c2bdccbf2654b64ea55cd589fd21323a9178a660) ) /* character color codes on a per-column basis */
	2181	ROM_END
	2182
2028	2183	ROM_START( dkongjr )
2029	2184	ROM_REGION( 0x10000, "maincpu", 0 )
2030	2185	ROM_LOAD( "dkj.5b",       0x0000, 0x1000, CRC(dea28158) SHA1(08baf84ae6f9b40a2c743fe1d8c158c74a40e95a) )
r8962	r8963
2941	3096	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7c80, 0x7c80, 0, 0, strtheat_inputport_1_r);
2942	3097	}
2943	3098
	3099
	3100	static DRIVER_INIT( dkongx )
	3101	{
	3102	UINT8 *decrypted;
	3103	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3104	running_device *eeprom = machine->device("eeprom");
	3105
	3106	decrypted = auto_alloc_array(machine, UINT8, 0x10000);
	3107
	3108	memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x5fff, 0, 0, "bank1" );
	3109	memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, "bank2" );
	3110
	3111	memory_install_write8_handler(space, 0xe000, 0xe000, 0, 0, braze_a15_w);
	3112
	3113	memory_install_read8_device_handler(space, eeprom, 0xc800, 0xc800, 0, 0, braze_eeprom_r);
	3114	memory_install_write8_device_handler(space, eeprom, 0xc800, 0xc800, 0, 0, braze_eeprom_w);
	3115
	3116	braze_decrypt_rom(machine, decrypted);
	3117
	3118	memory_configure_bank(machine,"bank1", 0, 2, &decrypted[0], 0x8000);
	3119	memory_set_bank(machine,"bank1", 0);
	3120	memory_configure_bank(machine,"bank2", 0, 2, &decrypted[0], 0x8000);
	3121	memory_set_bank(machine,"bank2", 0);
	3122	}
	3123
2944	3124	/*************************************
2945	3125	*
2946	3126	*  Game drivers
r8962	r8963
2954	3134	GAME( 1981, dkongo,   dkong,    dkong2b,  dkong,          0,  ROT90, "Nintendo", "Donkey Kong (US set 2)", GAME_SUPPORTS_SAVE )
2955	3135	GAME( 1981, dkongj,   dkong,    dkong2b,  dkong,          0,  ROT90, "Nintendo", "Donkey Kong (Japan set 1)", GAME_SUPPORTS_SAVE )
2956	3136	GAME( 1981, dkongjo,  dkong,    dkong2b,  dkong,          0,  ROT90, "Nintendo", "Donkey Kong (Japan set 2)", GAME_SUPPORTS_SAVE )
2957		GAME( 1981, dkongjo1, dkong,    dkong2b,  dkong,          0,  ROT90, "Nintendo", "Donkey Kong (Japan set 3) (bad dump?)", GAME_SUPPORTS_SAVE )
	3137	GAME( 1981, dkongjo1, dkong,    dkong2b,  dkong,          0,  ROT90, "Nintendo", "Donkey Kong (Japan set 3)", GAME_SUPPORTS_SAVE )
2958	3138	GAME( 2004, dkongf,   dkong,    dkong2b,  dkongf,         0,  ROT90, "hack", "Donkey Kong Foundry (hack)", GAME_SUPPORTS_SAVE ) /* from Jeff's Romhack */
	3139	GAME( 2006, dkongx,   dkong,    braze,    dkongx,    dkongx,  ROT90, "hack", "Donkey Kong II - Jumpman Returns (V1.2) (hack)", GAME_SUPPORTS_SAVE )
	3140	GAME( 2006, dkongx11, dkong,    braze,    dkongx,    dkongx,  ROT90, "hack", "Donkey Kong II - Jumpman Returns (V1.1) (hack)", GAME_SUPPORTS_SAVE )
2959	3141
2960	3142	GAME( 1982, dkongjr,  0,        dkongjr,  dkongjr,        0,  ROT90, "Nintendo of America", "Donkey Kong Junior (US)", GAME_SUPPORTS_SAVE )
2961	3143	GAME( 1982, dkongjrj, dkongjr,  dkongjr,  dkongjr,        0,  ROT90, "Nintendo", "Donkey Kong Jr. (Japan)", GAME_SUPPORTS_SAVE )

src/mame/drivers/appoooh.c

r8962	r8963
605	605
606	606	static DRIVER_INIT(robowresb)
607	607	{
608		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
609		memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x1c000);
	608	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	609	space->set_decrypted_region(0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x1c000);
610	610	}
611	611
612	612

src/mame/drivers/goldstar.c

r8962	r8963
5855	5855
5856	5856	MACHINE_DRIVER_END
5857	5857
	5858	#ifdef UNUSED_CODE
5858	5859	static MACHINE_DRIVER_START( cmnobmp )
5859	5860
5860	5861	MDRV_DRIVER_DATA(goldstar_state)
r8962	r8963
5891	5892	MDRV_SOUND_CONFIG(cm_ay8910_config)
5892	5893	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
5893	5894	MACHINE_DRIVER_END
	5895	#endif
5894	5896
5895	5897	static MACHINE_DRIVER_START( cmast91 )
5896	5898

src/mame/drivers/20pacgal.c

r8962	r8963
455	455	*
456	456	*************************************/
457	457
458		GAME( 2005, 25pacman,          0, 20pacgal, 25pacman, 25pacman, ROT90, "Namco", "Pacman - 25th Anniversary Edition (Rev 2.00)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE)
	458	GAME( 2005, 25pacman,          0, 20pacgal, 25pacman, 25pacman, ROT90, "Namco", "Pac-Man - 25th Anniversary Edition (Rev 2.00)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE)
459	459
460	460	GAME( 2000, 20pacgal,          0, 20pacgal, 20pacgal, 20pacgal, ROT90, "Namco", "Ms. Pac-Man/Galaga - 20th Anniversary Class of 1981 Reunion (V1.08)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE)
461	461	GAME( 2000, 20pacgalr4, 20pacgal, 20pacgal, 20pacgal, 20pacgal, ROT90, "Namco", "Ms. Pac-Man/Galaga - 20th Anniversary Class of 1981 Reunion (V1.04)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE)

src/mame/drivers/system16.c

r8962	r8963
3356	3356	int i;
3357	3357	UINT8 *ROM = memory_region(machine, "maincpu");
3358	3358	UINT8 *KEY = memory_region(machine, "decryption");
3359		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3359	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3360	3360	UINT8 data[0x1000];
3361	3361
3362	3362	// the decryption key is in a rom (part of an MSDOS executable...)
r8962	r8963
3375	3375	state->decrypted_region[i] = ROM[i] ^ data[(i & 0xfff) ^ 1];
3376	3376	}
3377	3377
3378		memory_set_decrypted_region(space, 0x00000, 0xbffff, state->decrypted_region);
	3378	space->set_decrypted_region(0x00000, 0xbffff, state->decrypted_region);
3379	3379
3380	3380	DRIVER_INIT_CALL(common);
3381	3381

src/mame/drivers/nyny.c

r8962	r8963
253	253	}
254	254
255	255
256		static const ttl74123_config ic48_1_config =
	256	static const ttl74123_interface ic48_1_config =
257	257	{
258	258	TTL74123_GROUNDED,   /* the hook up type */
259	259	RES_K(22),         /* resistor connected to RCext */

src/mame/drivers/pengo.c

r8962	r8963
660	660	{ 0x88,0x0a,0x82,0x00,0xa0,0x22,0xaa,0x28 },   /* ...1...1...0.... */
661	661	{ 0x88,0x0a,0x82,0x00,0xa0,0x22,0xaa,0x28 }      /* ...1...1...1.... */
662	662	};
663		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	663	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
664	664	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
665	665	UINT8 *rom = memory_region(machine, "maincpu");
666	666	int A;
667	667
668		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	668	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
669	669
670	670	for (A = 0x0000;A < 0x8000;A++)
671	671	{

src/mame/drivers/prehisle.c

r8962	r8963
13	13	#include "cpu/m68000/m68000.h"
14	14	#include "sound/upd7759.h"
15	15	#include "sound/3812intf.h"
	16	#include "includes/prehisle.h"
16	17
17		extern WRITE16_HANDLER( prehisle_bg_videoram16_w );
18		extern WRITE16_HANDLER( prehisle_fg_videoram16_w );
19		extern WRITE16_HANDLER( prehisle_control16_w );
20		extern READ16_HANDLER( prehisle_control16_r );
21
22		extern VIDEO_START( prehisle );
23		extern VIDEO_UPDATE( prehisle );
24
25		extern UINT16 *prehisle_bg_videoram16;
26
27	18	/******************************************************************************/
28	19
29	20	static WRITE16_HANDLER( prehisle_sound16_w )
r8962	r8963
37	28	static ADDRESS_MAP_START( prehisle_map, ADDRESS_SPACE_PROGRAM, 16 )
38	29	AM_RANGE(0x000000, 0x03ffff) AM_ROM
39	30	AM_RANGE(0x070000, 0x073fff) AM_RAM
40		AM_RANGE(0x090000, 0x0907ff) AM_RAM_WRITE(prehisle_fg_videoram16_w) AM_BASE_GENERIC(videoram)
41		AM_RANGE(0x0a0000, 0x0a07ff) AM_RAM AM_BASE_GENERIC(spriteram)
42		AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(prehisle_bg_videoram16_w) AM_BASE(&prehisle_bg_videoram16)
	31	AM_RANGE(0x090000, 0x0907ff) AM_RAM_WRITE(prehisle_fg_videoram16_w) AM_BASE_MEMBER(prehisle_state, videoram)
	32	AM_RANGE(0x0a0000, 0x0a07ff) AM_RAM AM_BASE_MEMBER(prehisle_state, spriteram)
	33	AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(prehisle_bg_videoram16_w) AM_BASE_MEMBER(prehisle_state, bg_videoram16)
43	34	AM_RANGE(0x0d0000, 0x0d07ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE_GENERIC(paletteram)
44	35	AM_RANGE(0x0e0000, 0x0e00ff) AM_READ(prehisle_control16_r)
45	36	AM_RANGE(0x0f0070, 0x0ff071) AM_WRITE(prehisle_sound16_w)
r8962	r8963
214	205
215	206	static MACHINE_DRIVER_START( prehisle )
216	207
	208	MDRV_DRIVER_DATA( prehisle_state )
	209
217	210	/* basic machine hardware */
218	211	MDRV_CPU_ADD("maincpu", M68000, XTAL_18MHz/2)   /* verified on pcb */
219	212	MDRV_CPU_PROGRAM_MAP(prehisle_map)

src/mame/drivers/polepos.c

r8962	r8963
458	458
459	459	static MACHINE_RESET( polepos )
460	460	{
461		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	461	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
462	462	int i;
463	463
464	464	/* Reset all latches */

src/mame/drivers/cps1.c

r8962	r8963
221	221	* 'ghoulsu'
222	222	* 'willow', 'willowj' and 'willowje'
223	223	- Checked sets with no debug features :
224		* 'forgottu' and 'lostwrld'
	224	* 'forgottnua' and 'lostwrld'
225	225	* 'ghouls' and 'daimakai'
226	226	* 'dynwar' and 'dynwarj'
227	227
r8962	r8963
4140	4140	ROM_END
4141	4141
4142	4142	/* B-Board 88622B-3 */
4143		/* FIXME - GFX ROMs are wrong, copied from the other version */
4144		/* ROMs missing are WL_01 02 03 05 06 07 09 10 11 13 14 15 17 18 19 21 24 25 26 28 32 33 34 35 38 39 40 41 */
4145	4143	ROM_START( willowj )
4146	4144	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
4147		ROM_LOAD16_BYTE( "wl_36.12f",         0x00000, 0x20000, CRC(2b0d7cbc) SHA1(58172b4fdf856efa8d77abbde76738de2424f712) )
4148		ROM_LOAD16_BYTE( "wl_42.12h",         0x00001, 0x20000, CRC(1ac39615) SHA1(c9fa6d20418b9bdc5a08df1fb86368b40709280a) )
4149		ROM_LOAD16_BYTE( "wl_37.13f",         0x40000, 0x20000, CRC(30a717fa) SHA1(cb815e9ee2691761925898e3932b502f8f399cb4) )
4150		ROM_LOAD16_BYTE( "wl_43.13h",         0x40001, 0x20000, CRC(d0dddc9e) SHA1(1176b9a43b3355a5ba44e59abde01ee7eaa89c25) )
4151		ROM_LOAD16_WORD_SWAP( "wl_32.rom",    0x80000, 0x80000, CRC(dfd9f643) SHA1(9c760c30af593a87e7fd39fb213a4c73c68ca440) )   /* WRONG */
	4145	ROM_LOAD16_BYTE( "wl_36.12f", 0x00000, 0x20000, CRC(2b0d7cbc) SHA1(58172b4fdf856efa8d77abbde76738de2424f712) )
	4146	ROM_LOAD16_BYTE( "wl_42.12h", 0x00001, 0x20000, CRC(1ac39615) SHA1(c9fa6d20418b9bdc5a08df1fb86368b40709280a) )
	4147	ROM_LOAD16_BYTE( "wl_37.13f", 0x40000, 0x20000, CRC(30a717fa) SHA1(cb815e9ee2691761925898e3932b502f8f399cb4) )
	4148	ROM_LOAD16_BYTE( "wl_43.13h", 0x40001, 0x20000, CRC(d0dddc9e) SHA1(1176b9a43b3355a5ba44e59abde01ee7eaa89c25) )
	4149	ROM_LOAD16_BYTE( "wl_34.10f", 0x80000, 0x20000, CRC(23a84f7a) SHA1(f7667ffc85e2dfb78f5ed8ea54b6223e7375433a) )   // == wlm-32.8h
	4150	ROM_LOAD16_BYTE( "wl_40.10h", 0x80001, 0x20000, CRC(c7a0ed21) SHA1(190aec48a8f528652b434425f64ea2e52029ad3d) )   // == wlm-32.8h
	4151	ROM_LOAD16_BYTE( "wl_35.11f", 0xc0000, 0x20000, CRC(5eff7951) SHA1(f336bfd07f3083e3b3e72c61d03abb52d443204d) )   // == wlm-32.8h
	4152	ROM_LOAD16_BYTE( "wl_41.11h", 0xc0001, 0x20000, CRC(8d6477a3) SHA1(1bdb98f89ec8c2dcd47ab90bdd1be862ea59a16b) )   // == wlm-32.8h
4152	4153
4153	4154	ROM_REGION( 0x400000, "gfx", 0 )
4154		ROMX_LOAD( "wl_gfx5.rom",  0x000000, 0x80000, CRC(afa74b73) SHA1(09081926260c76986a13ac5351dddd2ea11d7a10) , ROM_GROUPWORD | ROM_SKIP(6) )   /* WRONG */
4155		ROMX_LOAD( "wl_gfx7.rom",  0x000002, 0x80000, CRC(12a0dc0b) SHA1(fea235ce9489f04919daf52f4d3f3bac9b558316) , ROM_GROUPWORD | ROM_SKIP(6) )   /* WRONG */
4156		ROMX_LOAD( "wl_gfx1.rom",  0x000004, 0x80000, CRC(c6f2abce) SHA1(ff5fcfe417c43b4747bbe12db6052fdb60f5f0e4) , ROM_GROUPWORD | ROM_SKIP(6) )   /* WRONG */
4157		ROMX_LOAD( "wl_gfx3.rom",  0x000006, 0x80000, CRC(4aa4c6d3) SHA1(7dd6f18f6126c380821a2ca8955439fd6864f4c6) , ROM_GROUPWORD | ROM_SKIP(6) )   /* WRONG */
4158		ROMX_LOAD( "wl_24.rom",    0x200000, 0x20000, CRC(6f0adee5) SHA1(07b18e51b376001f25173b78e0e816f252400210) , ROM_SKIP(7) )   /* WRONG */
4159		ROMX_LOAD( "wl_14.rom",    0x200001, 0x20000, CRC(9cf3027d) SHA1(1e8eb20d51a54f6f756c0ab9395ac38b96e67fb2) , ROM_SKIP(7) )   /* WRONG */
4160		ROMX_LOAD( "wl_26.rom",    0x200002, 0x20000, CRC(f09c8ecf) SHA1(b39f83e80af010d6481693d9ec8b1d7e258b531d) , ROM_SKIP(7) )   /* WRONG */
4161		ROMX_LOAD( "wl_16.rom",    0x200003, 0x20000, CRC(e35407aa) SHA1(7ddae9cef96839da72488c1fe73268c50e0262ff) , ROM_SKIP(7) )   /* WRONG */
4162		ROMX_LOAD( "wl_20.rom",    0x200004, 0x20000, CRC(84992350) SHA1(f0ebd810ce099337cda94222dccce8ab9b3c3281) , ROM_SKIP(7) )   /* WRONG */
4163		ROMX_LOAD( "wl_10.rom",    0x200005, 0x20000, CRC(b87b5a36) SHA1(25fb8f9698142473233ee509d4146089920e94e1) , ROM_SKIP(7) )   /* WRONG */
4164		ROMX_LOAD( "wl_22.rom",    0x200006, 0x20000, CRC(fd3f89f0) SHA1(51ff95cff56ac78682ea56401b35a0aa63cef8cb) , ROM_SKIP(7) )   /* WRONG */
4165		ROMX_LOAD( "wl_12.rom",    0x200007, 0x20000, CRC(7da49d69) SHA1(b0ae7ac4f858ee8d72e6877c4275da7a631e2e4c) , ROM_SKIP(7) )   /* WRONG */
	4155	ROMX_LOAD( "wl_09.4b",  0x000000, 0x20000, CRC(05aa71b4) SHA1(791f845928ff164eace07cfcc35d0bd9d7cbb2d0) , ROM_SKIP(7) )   // == wlm-7.7a
	4156	ROMX_LOAD( "wl_01.4a",  0x000001, 0x20000, CRC(08c2df12) SHA1(269ca05ff6f9928e3b46f43b262c03ac3dd768b8) , ROM_SKIP(7) )   // == wlm-7.7a
	4157	ROMX_LOAD( "wl_13.9b",  0x000002, 0x20000, CRC(1f7c87cd) SHA1(6817c8b42ef4e8183fc2fbd2765e49ac955cca80) , ROM_SKIP(7) )   // == wlm-5.9a
	4158	ROMX_LOAD( "wl_05.9a",  0x000003, 0x20000, CRC(f5254bf2) SHA1(a53973b98b8e8903c731eb2514cb9ce4060d5164) , ROM_SKIP(7) )   // == wlm-5.9a
	4159	ROMX_LOAD( "wl_24.5e",  0x000004, 0x20000, CRC(d9d73ba1) SHA1(5f7b5e7e6fe64106cd96a968a54556e4f5ad9387) , ROM_SKIP(7) )   // == wlm-3.3a
	4160	ROMX_LOAD( "wl_17.5c",  0x000005, 0x20000, CRC(a652f30c) SHA1(b150d8978d37907c6d17042476c4608c76c4ea3f) , ROM_SKIP(7) )   // == wlm-3.3a
	4161	ROMX_LOAD( "wl_38.8h",  0x000006, 0x20000, CRC(f6f9111b) SHA1(bd44d1b6084fe2c09cdd91b5ad6eff7a84f3e601) , ROM_SKIP(7) )   // == wlm-1.5a
	4162	ROMX_LOAD( "wl_32.8f",  0x000007, 0x20000, CRC(10f64027) SHA1(abf387ba7d8f0530a562a984c08345a149cfa226) , ROM_SKIP(7) )   // == wlm-1.5a
	4163	ROMX_LOAD( "wl_10.5b",  0x100000, 0x20000, CRC(dbba0a3f) SHA1(38c0cdd87e6631721f35a0b85fd5165940454603) , ROM_SKIP(7) )   // == wlm-7.7a
	4164	ROMX_LOAD( "wl_02.5a",  0x100001, 0x20000, CRC(86fba7a5) SHA1(9389ad4e0968b3edd4baeac8b29637618f49dbfb) , ROM_SKIP(7) )   // == wlm-7.7a
	4165	ROMX_LOAD( "wl_14.10b", 0x100002, 0x20000, CRC(7d5798b2) SHA1(7dfcc172e5df0e8f4b9188381463f9eca00945dc) , ROM_SKIP(7) )   // == wlm-5.9a
	4166	ROMX_LOAD( "wl_06.10a", 0x100003, 0x20000, CRC(1f052948) SHA1(ca3a6be94ae50fa50604ee52704792b22cbbc083) , ROM_SKIP(7) )   // == wlm-5.9a
	4167	ROMX_LOAD( "wl_25.7e",  0x100004, 0x20000, CRC(857d17d2) SHA1(e6b383df9571df6743a7aa3087f0632dc4e6143b) , ROM_SKIP(7) )   // == wlm-3.3a
	4168	ROMX_LOAD( "wl_18.7c",  0x100005, 0x20000, CRC(316c7fbc) SHA1(631682c7f14fa73f5f5a4fb747bfb45d9613e507) , ROM_SKIP(7) )   // == wlm-3.3a
	4169	ROMX_LOAD( "wl_39.9h",  0x100006, 0x20000, CRC(e6fce9b0) SHA1(46d50cf32c3518ab3dc717553c5375f3cb022cde) , ROM_SKIP(7) )   // == wlm-1.5a
	4170	ROMX_LOAD( "wl_33.9f",  0x100007, 0x20000, CRC(a15d5517) SHA1(03a30e216f8240383d5fa9736b4fe5119d231685) , ROM_SKIP(7) )   // == wlm-1.5a
	4171	ROMX_LOAD( "wl_11.7b",  0x200000, 0x20000, CRC(6f0adee5) SHA1(07b18e51b376001f25173b78e0e816f252400210) , ROM_SKIP(7) )   // == wl_24.7d
	4172	ROMX_LOAD( "wl_03.7a",  0x200001, 0x20000, CRC(9cf3027d) SHA1(1e8eb20d51a54f6f756c0ab9395ac38b96e67fb2) , ROM_SKIP(7) )   // == wl_14.7c
	4173	ROMX_LOAD( "wl_15.11b", 0x200002, 0x20000, CRC(f09c8ecf) SHA1(b39f83e80af010d6481693d9ec8b1d7e258b531d) , ROM_SKIP(7) )   // == wl_26.9d
	4174	ROMX_LOAD( "wl_07.11a", 0x200003, 0x20000, CRC(e35407aa) SHA1(7ddae9cef96839da72488c1fe73268c50e0262ff) , ROM_SKIP(7) )   // == wl_16.9c
	4175	ROMX_LOAD( "wl_26.8e",  0x200004, 0x20000, CRC(84992350) SHA1(f0ebd810ce099337cda94222dccce8ab9b3c3281) , ROM_SKIP(7) )   // == wl_20.3d
	4176	ROMX_LOAD( "wl_19.8c",  0x200005, 0x20000, CRC(b87b5a36) SHA1(25fb8f9698142473233ee509d4146089920e94e1) , ROM_SKIP(7) )   // == wl_10.3c
	4177	ROMX_LOAD( "wl_28.10e", 0x200006, 0x20000, CRC(fd3f89f0) SHA1(51ff95cff56ac78682ea56401b35a0aa63cef8cb) , ROM_SKIP(7) )   // == wl_22.5d
	4178	ROMX_LOAD( "wl_21.10c", 0x200007, 0x20000, CRC(7da49d69) SHA1(b0ae7ac4f858ee8d72e6877c4275da7a631e2e4c) , ROM_SKIP(7) )   // == wl_12.5c
4166	4179
4167	4180	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
4168		ROM_LOAD( "wl_23.13c",     0x00000, 0x08000, CRC(f6b3d060) SHA1(0ed2e2f64ba53ba2c371b66ab1e52e40b16d8baf) )   // == wl_09.12b
4169		ROM_CONTINUE(              0x10000, 0x08000 )
	4181	ROM_LOAD( "wl_23.13c",  0x00000, 0x08000, CRC(f6b3d060) SHA1(0ed2e2f64ba53ba2c371b66ab1e52e40b16d8baf) )   // == wl_09.12b
	4182	ROM_CONTINUE(           0x10000, 0x08000 )
4170	4183
4171	4184	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
4172		ROM_LOAD( "wl_30.12e",    0x00000, 0x20000, CRC(bde23d4d) SHA1(d1fee2f99c858dfb07edcd600da491c7b656afe0) )   // == wl_18.11c
4173		ROM_LOAD( "wl_31.13e",    0x20000, 0x20000, CRC(683898f5) SHA1(316a77b663d78c8b9ff6d85756cb05aaaeef4003) )   // == wl_19.12c
	4185	ROM_LOAD( "wl_30.12e",  0x00000, 0x20000, CRC(bde23d4d) SHA1(d1fee2f99c858dfb07edcd600da491c7b656afe0) )   // == wl_18.11c
	4186	ROM_LOAD( "wl_31.13e",  0x20000, 0x20000, CRC(683898f5) SHA1(316a77b663d78c8b9ff6d85756cb05aaaeef4003) )   // == wl_19.12c
4174	4187
4175	4188	ROM_REGION( 0x0200, "aboardplds", 0 )
4176	4189	ROM_LOAD( "buf1",         0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
r8962	r8963
5519	5532	ROM_LOAD( "c632.ic1",     0x0000, 0x0117, CRC(0fbd9270) SHA1(d7e737b20c44d41e29ca94be56114b31934dde81) )
5520	5533	ROM_END
5521	5534
5522		/* B-Board 90629B */
	5535	/* B-Board 90629B-2 */
5523	5536	ROM_START( sf2ua )
5524	5537	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
5525		ROM_LOAD16_BYTE( "sf2u.30a",      0x00000, 0x20000, CRC(08beb861) SHA1(d47f16d0d692dc6405df0aecd7d9fc3f9718c0d1) )
5526		ROM_LOAD16_BYTE( "sf2u.37a",      0x00001, 0x20000, CRC(b7638d69) SHA1(b615a2e0e8772462fd875b2e8d2ccba82a8b3c47) )
5527		ROM_LOAD16_BYTE( "sf2u.31a",      0x40000, 0x20000, CRC(0d5394e0) SHA1(e1d88ff3669f1dbe1e3fbdf8aa9e2c63adbbcb48) )
5528		ROM_LOAD16_BYTE( "sf2u.38a",      0x40001, 0x20000, CRC(42d6a79e) SHA1(5f1e2c176d065325883a60767d05b1a542372b6a) )
5529		ROM_LOAD16_BYTE( "sf2u.28a",      0x80000, 0x20000, CRC(387a175c) SHA1(2635bb82758cf217cee63b254a537b02275a6838) )
5530		ROM_LOAD16_BYTE( "sf2u.35a",      0x80001, 0x20000, CRC(a1a5adcc) SHA1(47874e6d403256d828474b29e3d93c92efd9e1ce) )
5531		ROM_LOAD16_BYTE( "sf2_29a.bin",   0xc0000, 0x20000, CRC(bb4af315) SHA1(75f0827f4f7e9f292add46467f8d4fe19b2514c9) )
5532		ROM_LOAD16_BYTE( "sf2_36a.bin",   0xc0001, 0x20000, CRC(c02a13eb) SHA1(b807cc495bff3f95d03b061fc629c95f965cb6d8) )
	5538	ROM_LOAD16_BYTE( "sf2u_30a.11e", 0x00000, 0x20000, CRC(08beb861) SHA1(d47f16d0d692dc6405df0aecd7d9fc3f9718c0d1) )
	5539	ROM_LOAD16_BYTE( "sf2u_37a.11f", 0x00001, 0x20000, CRC(b7638d69) SHA1(b615a2e0e8772462fd875b2e8d2ccba82a8b3c47) )
	5540	ROM_LOAD16_BYTE( "sf2u_31a.12e", 0x40000, 0x20000, CRC(0d5394e0) SHA1(e1d88ff3669f1dbe1e3fbdf8aa9e2c63adbbcb48) )
	5541	ROM_LOAD16_BYTE( "sf2u_38a.12f", 0x40001, 0x20000, CRC(42d6a79e) SHA1(5f1e2c176d065325883a60767d05b1a542372b6a) )
	5542	ROM_LOAD16_BYTE( "sf2u_28a.9e",  0x80000, 0x20000, CRC(387a175c) SHA1(2635bb82758cf217cee63b254a537b02275a6838) )
	5543	ROM_LOAD16_BYTE( "sf2u_35a.9f",  0x80001, 0x20000, CRC(a1a5adcc) SHA1(47874e6d403256d828474b29e3d93c92efd9e1ce) )
	5544	ROM_LOAD16_BYTE( "sf2_29b.10e",  0xc0000, 0x20000, CRC(bb4af315) SHA1(75f0827f4f7e9f292add46467f8d4fe19b2514c9) )
	5545	ROM_LOAD16_BYTE( "sf2_36b.10f",  0xc0001, 0x20000, CRC(c02a13eb) SHA1(b807cc495bff3f95d03b061fc629c95f965cb6d8) )
5533	5546
5534	5547	ROM_REGION( 0x600000, "gfx", 0 )
5535	5548	ROMX_LOAD( "sf2-5m.4a",  0x000000, 0x80000, CRC(22c9cc8e) SHA1(b9194fb337b30502c1c9501cd6c64ae4035544d4) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "2" socket
r8962	r8963
5546	5559	ROMX_LOAD( "sf2-11m.5d", 0x400006, 0x80000, CRC(0627c831) SHA1(f9a92d614e8877d648449de2612fc8b43c85e4c2) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "22" socket
5547	5560
5548	5561	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
5549		ROM_LOAD( "sf2_09.bin",    0x00000, 0x08000, CRC(a4823a1b) SHA1(7b6bf59dfd578bfbbdb64c27988796783442d659) )
5550		ROM_CONTINUE(              0x10000, 0x08000 )
	5562	ROM_LOAD( "sf2_9.12a",   0x00000, 0x08000, CRC(a4823a1b) SHA1(7b6bf59dfd578bfbbdb64c27988796783442d659) )   // == sf2_09.12a
	5563	ROM_CONTINUE(            0x10000, 0x08000 )
5551	5564
5552	5565	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
5553		ROM_LOAD( "sf2_18.bin",    0x00000, 0x20000, CRC(7f162009) SHA1(346bf42992b4c36c593e21901e22c87ae4a7d86d) )
5554		ROM_LOAD( "sf2_19.bin",    0x20000, 0x20000, CRC(beade53f) SHA1(277c397dc12752719ec6b47d2224750bd1c07f79) )
	5566	ROM_LOAD( "sf2_18.11c",  0x00000, 0x20000, CRC(7f162009) SHA1(346bf42992b4c36c593e21901e22c87ae4a7d86d) )
	5567	ROM_LOAD( "sf2_19.12c",  0x20000, 0x20000, CRC(beade53f) SHA1(277c397dc12752719ec6b47d2224750bd1c07f79) )
5555	5568
5556	5569	ROM_REGION( 0x0200, "aboardplds", 0 )
5557	5570	ROM_LOAD( "buf1",         0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
r8962	r8963
5793	5806	ROMX_LOAD( "sf2-11m.5d", 0x400006, 0x80000, CRC(0627c831) SHA1(f9a92d614e8877d648449de2612fc8b43c85e4c2) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "22" socket
5794	5807
5795	5808	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
5796		ROM_LOAD( "sf2_09.12a",  0x00000, 0x08000, CRC(a4823a1b) SHA1(7b6bf59dfd578bfbbdb64c27988796783442d659) )
	5809	ROM_LOAD( "sf2_9.12a",  0x00000, 0x08000, CRC(a4823a1b) SHA1(7b6bf59dfd578bfbbdb64c27988796783442d659) ) // == sf2_09.12a
5797	5810	ROM_CONTINUE(            0x10000, 0x08000 )
5798	5811
5799	5812	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
r8962	r8963
5971	5984	ROM_LOAD16_BYTE( "sf2j_38c.12f", 0x40001, 0x20000, CRC(8210fc0e) SHA1(7d6cfb99afa89d0e6e991d9f7c1808b740def125) )
5972	5985	ROM_LOAD16_BYTE( "sf2j_28c.9e",  0x80000, 0x20000, CRC(6eddd5e8) SHA1(62bd1c2fc0321809421c9a592f691b5b1a1d8807) )
5973	5986	ROM_LOAD16_BYTE( "sf2j_35c.9f",  0x80001, 0x20000, CRC(6bcb404c) SHA1(b5f24556c633c521aadd94e016d78db6922e3dfa) )
5974		ROM_LOAD16_BYTE( "sf2j_29c.10e", 0xc0000, 0x20000, CRC(bb4af315) SHA1(75f0827f4f7e9f292add46467f8d4fe19b2514c9) )
5975		ROM_LOAD16_BYTE( "sf2j_36c.10f", 0xc0001, 0x20000, CRC(c02a13eb) SHA1(b807cc495bff3f95d03b061fc629c95f965cb6d8) )
	5987	ROM_LOAD16_BYTE( "sf2j_29c.10e", 0xc0000, 0x20000, CRC(bb4af315) SHA1(75f0827f4f7e9f292add46467f8d4fe19b2514c9) )   // == sf2_29b.10e
	5988	ROM_LOAD16_BYTE( "sf2j_36c.10f", 0xc0001, 0x20000, CRC(c02a13eb) SHA1(b807cc495bff3f95d03b061fc629c95f965cb6d8) )   // == sf2_36b.10f
5976	5989
5977	5990	ROM_REGION( 0x600000, "gfx", 0 )
5978	5991	ROMX_LOAD( "sf2_06.8a",  0x000000, 0x80000, CRC(22c9cc8e) SHA1(b9194fb337b30502c1c9501cd6c64ae4035544d4) , ROM_GROUPWORD | ROM_SKIP(6) )   // == sf2-5m.4a
r8962	r8963
5989	6002	ROMX_LOAD( "sf2_26.9d",  0x400006, 0x80000, CRC(0627c831) SHA1(f9a92d614e8877d648449de2612fc8b43c85e4c2) , ROM_GROUPWORD | ROM_SKIP(6) )   // == sf2-11m.5d
5990	6003
5991	6004	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
5992		ROM_LOAD( "sf2_09.12a",  0x00000, 0x08000, CRC(a4823a1b) SHA1(7b6bf59dfd578bfbbdb64c27988796783442d659) )
	6005	ROM_LOAD( "sf2_09.12a",  0x00000, 0x08000, CRC(a4823a1b) SHA1(7b6bf59dfd578bfbbdb64c27988796783442d659) )   // could be sf2j_09.12a
5993	6006	ROM_CONTINUE(            0x10000, 0x08000 )
5994	6007
5995	6008	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
5996		ROM_LOAD( "sf2_18.11c",  0x00000, 0x20000, CRC(7f162009) SHA1(346bf42992b4c36c593e21901e22c87ae4a7d86d) )
5997		ROM_LOAD( "sf2_19.12c",  0x20000, 0x20000, CRC(beade53f) SHA1(277c397dc12752719ec6b47d2224750bd1c07f79) )
	6009	ROM_LOAD( "sf2_18.11c",  0x00000, 0x20000, CRC(7f162009) SHA1(346bf42992b4c36c593e21901e22c87ae4a7d86d) )   // could be sf2j_18.11c
	6010	ROM_LOAD( "sf2_19.12c",  0x20000, 0x20000, CRC(beade53f) SHA1(277c397dc12752719ec6b47d2224750bd1c07f79) )   // could be sf2j_19.12c
5998	6011
5999	6012	ROM_REGION( 0x0200, "aboardplds", 0 )
6000	6013	ROM_LOAD( "buf1",         0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
r8962	r8963
6466	6479	/* B-Board 90629B-3 */
6467	6480	ROM_START( kodj )
6468	6481	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
6469		ROM_LOAD16_BYTE( "kd30.bin",     0x00000, 0x20000, CRC(ebc788ad) SHA1(f4a297e409fcdbb2c15a13b39a16e4a83e7e060b) )
6470		ROM_LOAD16_BYTE( "kd37.bin",     0x00001, 0x20000, CRC(e55c3529) SHA1(a5254895499a53b4fbaac6fd50464b9e08175b8d) )
6471		ROM_LOAD16_BYTE( "kd31.bin",     0x40000, 0x20000, CRC(c710d722) SHA1(a2e9b84d3e7d835a910ab9f584bdc64c2559995a) )
6472		ROM_LOAD16_BYTE( "kd38.bin",     0x40001, 0x20000, CRC(57d6ed3a) SHA1(a47da5068723c8e16ed458fbfa3e3db57b32d87d) )
6473		ROM_LOAD16_WORD_SWAP("kd33.bin", 0x80000, 0x80000, CRC(9bd7ad4b) SHA1(7bece5d408fd13116bd5518014b632ecc9a2feaa) )
	6482	ROM_LOAD16_BYTE( "kdj_30a.11e",  0x00000, 0x20000, CRC(ebc788ad) SHA1(f4a297e409fcdbb2c15a13b39a16e4a83e7e060b) )
	6483	ROM_LOAD16_BYTE( "kdj_37a.11f",  0x00001, 0x20000, CRC(e55c3529) SHA1(a5254895499a53b4fbaac6fd50464b9e08175b8d) )
	6484	ROM_LOAD16_BYTE( "kdj_31a.12e",  0x40000, 0x20000, CRC(c710d722) SHA1(a2e9b84d3e7d835a910ab9f584bdc64c2559995a) )
	6485	ROM_LOAD16_BYTE( "kdj_38a.12f",  0x40001, 0x20000, CRC(57d6ed3a) SHA1(a47da5068723c8e16ed458fbfa3e3db57b32d87d) )
	6486	ROM_LOAD16_WORD_SWAP("kd_33.6f", 0x80000, 0x80000, CRC(9bd7ad4b) SHA1(7bece5d408fd13116bd5518014b632ecc9a2feaa) )   // incorrect label, could be kdj_33a, kdj_33, kd_33a
6474	6487
6475	6488	ROM_REGION( 0x400000, "gfx", 0 )
6476	6489	ROMX_LOAD( "kd_06.8a",  0x000000, 0x80000, CRC(e45b8701) SHA1(604e39e455e81695ee4f899f102d0bcd789cedd0) , ROM_GROUPWORD | ROM_SKIP(6) )   // == kd-5m.4a
r8962	r8963
6483	6496	ROMX_LOAD( "kd_16.9c",  0x200006, 0x80000, CRC(402b9b4f) SHA1(4c11976976eadf1ad293b31b0a4d047d05032b06) , ROM_GROUPWORD | ROM_SKIP(6) )   // == kd-4m.5c
6484	6497
6485	6498	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
6486		ROM_LOAD( "kd09.bin",      0x00000, 0x08000, CRC(bac6ec26) SHA1(6cbb6d55660150ae3f5270e023328275ee1bbf50) )
6487		ROM_CONTINUE(              0x10000, 0x08000 )
	6499	ROM_LOAD( "kd_09.12a",  0x00000, 0x08000, CRC(bac6ec26) SHA1(6cbb6d55660150ae3f5270e023328275ee1bbf50) )   /* different CRC from kod, pcb verified */
	6500	ROM_CONTINUE(           0x10000, 0x08000 )
6488	6501
6489	6502	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
6490		ROM_LOAD( "kd18.bin",      0x00000, 0x20000, CRC(4c63181d) SHA1(270f27534a95cb0be3ff3f9ca71c502320d8090b) )
6491		ROM_LOAD( "kd19.bin",      0x20000, 0x20000, CRC(92941b80) SHA1(5fa7c2793e6febee54a83042d118ddd4f2b7d127) )
	6503	ROM_LOAD( "kd_18.18",   0x00000, 0x20000, CRC(4c63181d) SHA1(270f27534a95cb0be3ff3f9ca71c502320d8090b) )   /* different CRC from kod but same label, pcb verified */
	6504	ROM_LOAD( "kd_19.19",   0x20000, 0x20000, CRC(92941b80) SHA1(5fa7c2793e6febee54a83042d118ddd4f2b7d127) )   /* different CRC from kod but same label, pcb verified */
6492	6505
6493	6506	ROM_REGION( 0x0200, "aboardplds", 0 )
6494	6507	ROM_LOAD( "buf1",         0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
r8962	r8963
6506	6519	ROM_LOAD( "c632.ic1",     0x0000, 0x0117, CRC(0fbd9270) SHA1(d7e737b20c44d41e29ca94be56114b31934dde81) )
6507	6520	ROM_END
6508	6521
	6522	/* B-Board 89625B-1 */
	6523	ROM_START( kodja )
	6524	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	6525	ROM_LOAD16_BYTE( "kdj_36a.12f", 0x00000, 0x20000, CRC(ebc788ad) SHA1(f4a297e409fcdbb2c15a13b39a16e4a83e7e060b) )   // == kdj_30a.11e
	6526	ROM_LOAD16_BYTE( "kdj_42a.12h", 0x00001, 0x20000, CRC(e55c3529) SHA1(a5254895499a53b4fbaac6fd50464b9e08175b8d) )   // == kdj_37a.11f
	6527	ROM_LOAD16_BYTE( "kdj_37a.13f", 0x40000, 0x20000, CRC(c710d722) SHA1(a2e9b84d3e7d835a910ab9f584bdc64c2559995a) )   // == kdj_31a.12e
	6528	ROM_LOAD16_BYTE( "kdj_43a.13h", 0x40001, 0x20000, CRC(57d6ed3a) SHA1(a47da5068723c8e16ed458fbfa3e3db57b32d87d) )   // == kdj_38a.12f
	6529	ROM_LOAD16_BYTE( "kd_34.10f",   0x80000, 0x20000, CRC(9367bcd9) SHA1(8243b4b9bb9756f3fa726717e19a166cb2f5b50a) )   // == kd_33.6f
	6530	ROM_LOAD16_BYTE( "kd_40.10h",   0x80001, 0x20000, CRC(4ca6a48a) SHA1(9d440ecd8d2d0e293fecf64ca3915252b94e7aef) )   // == kd_33.6f
	6531	ROM_LOAD16_BYTE( "kd_35.11f",   0xc0000, 0x20000, CRC(0360fa72) SHA1(274769c8717a874397cf37369e3ef80a682d9ef2) )   // == kd_33.6f
	6532	ROM_LOAD16_BYTE( "kd_41a.11h",  0xc0001, 0x20000, CRC(95a3cef8) SHA1(9b75c1ed0eafacc230197ffd9b81e0c8f4f2c464) )   // == kd_33.6f
	6533
	6534	ROM_REGION( 0x400000, "gfx", 0 )
	6535	ROMX_LOAD( "kd_9.4b",   0x000000, 0x20000, CRC(401a98e3) SHA1(b762d0f0e38ad33b5135646a107c1d4279c02193) , ROM_SKIP(7) )   // == kd_06.8a
	6536	ROMX_LOAD( "kd_1.4a",   0x000001, 0x20000, CRC(5894399a) SHA1(ee0bff29d313b4d5a318bc7345cc356d6e7318fc) , ROM_SKIP(7) )   // == kd_06.8a
	6537	ROMX_LOAD( "kd_13.9b",  0x000002, 0x20000, CRC(b6685131) SHA1(c1fa66cb695cfcb61e8495031ce18e4c6736b561) , ROM_SKIP(7) )   // == kd_08.10a
	6538	ROMX_LOAD( "kd_5.9a",   0x000003, 0x20000, CRC(c29b9ab3) SHA1(3ffa906d22563c9ad29b9ba4cd22b4ce5605b66a) , ROM_SKIP(7) )   // == kd_08.10a
	6539	ROMX_LOAD( "kd_24.5e",  0x000004, 0x20000, CRC(97008fdb) SHA1(150a7907f48dede2de0c40f1bea46e95d2e31e9c) , ROM_SKIP(7) )   // == kd_05.7a
	6540	ROMX_LOAD( "kd_17.5c",  0x000005, 0x20000, CRC(dc9a83d3) SHA1(6ceb5e6b11e7a57933c03fb308e1c6a850cf5ac7) , ROM_SKIP(7) )   // == kd_05.7a
	6541	ROMX_LOAD( "kd_38.8h",  0x000006, 0x20000, CRC(9c3dd2d1) SHA1(3ab77954fbde45797fcb1c5d8a500b5ec2673e5f) , ROM_SKIP(7) )   // == kd_07.9a
	6542	ROMX_LOAD( "kd_32.8f",  0x000007, 0x20000, CRC(1b2a802a) SHA1(f9b9e6da6a49aaf7c88b7b806c273b464a584a7b) , ROM_SKIP(7) )   // == kd_07.9a
	6543	ROMX_LOAD( "kd_10.5b",  0x100000, 0x20000, CRC(e788ae96) SHA1(1c257a4c20842b8750e3ba3cf78adad0bc5e6f2c) , ROM_SKIP(7) )   // == kd_06.8a
	6544	ROMX_LOAD( "kd_2.5a",   0x100001, 0x20000, CRC(b022e3e3) SHA1(a1e3700638e99677d4ee9aea5a250eb2380413c2) , ROM_SKIP(7) )   // == kd_06.8a
	6545	ROMX_LOAD( "kd_14.10b", 0x100002, 0x20000, CRC(4840c5ef) SHA1(fcd7ee778ab4519887bd37ced5e04f7aa8748e5e) , ROM_SKIP(7) )   // == kd_08.10a
	6546	ROMX_LOAD( "kd_6.10a",  0x100003, 0x20000, CRC(519faee4) SHA1(038afb9d2df872a0b45a7a6a43f7bb1389e8539a) , ROM_SKIP(7) )   // == kd_08.10a
	6547	ROMX_LOAD( "kd_25.7e",  0x100004, 0x20000, CRC(5d0fa853) SHA1(81e69bfac5ad6909d47db0927b7387bd392b4ef3) , ROM_SKIP(7) )   // == kd_05.7a
	6548	ROMX_LOAD( "kd_18.7c",  0x100005, 0x20000, CRC(6ad3b2bb) SHA1(c8d3bd2ce6305772224b5419301b59b9e78e7d44) , ROM_SKIP(7) )   // == kd_05.7a
	6549	ROMX_LOAD( "kd_39.9h",  0x100006, 0x20000, CRC(d7920213) SHA1(ac7de3f6c8503e06ae27f7db43bf9884f244bf7a) , ROM_SKIP(7) )   // == kd_07.9a
	6550	ROMX_LOAD( "kd_33.9f",  0x100007, 0x20000, CRC(65c2bed6) SHA1(932be92a418a2d3960f0b071eb5ffe6dae60d933) , ROM_SKIP(7) )   // == kd_07.9a
	6551	ROMX_LOAD( "kd_11.7b",  0x200000, 0x20000, CRC(147e3310) SHA1(e371db6c6621d09c43325edf9e3e40777afb830c) , ROM_SKIP(7) )   // == kd_15.8c
	6552	ROMX_LOAD( "kd_3.7a",   0x200001, 0x20000, CRC(5d18bc83) SHA1(49191e1073cdfb32272e6daeddedc4b309cf9fe6) , ROM_SKIP(7) )   // == kd_15.8c
	6553	ROMX_LOAD( "kd_15.11b", 0x200002, 0x20000, CRC(57359746) SHA1(2f83b77e6ebbceffab10653018a1b54a91d39a3f) , ROM_SKIP(7) )   // == kd_17.10c
	6554	ROMX_LOAD( "kd_7.11a",  0x200003, 0x20000, CRC(7fe03079) SHA1(be3be96d63a53cd8b6dc67eadc718c4b3b182123) , ROM_SKIP(7) )   // == kd_17.10c
	6555	ROMX_LOAD( "kd_26.8e",  0x200004, 0x20000, CRC(57e5fab5) SHA1(e665ab581372b48b6a7a494fd65ed6c807b5c00a) , ROM_SKIP(7) )   // == kd_14.7c
	6556	ROMX_LOAD( "kd_19.8c",  0x200005, 0x20000, CRC(b1f30f7c) SHA1(80308091a0af6ca46011a9174838c4d9dbeb96ee) , ROM_SKIP(7) )   // == kd_14.7c
	6557	ROMX_LOAD( "kd_28.10e", 0x200006, 0x20000, CRC(3a424135) SHA1(05d77253f454d69553a39a5dca0798f6ccea6da0) , ROM_SKIP(7) )   // == kd_16.9c
	6558	ROMX_LOAD( "kd_21.10c", 0x200007, 0x20000, CRC(ce10d2c3) SHA1(b694325b370d451cb3bcfe7d753c53ef68b83276) , ROM_SKIP(7) )   // == kd_16.9c
	6559	ROMX_LOAD( "kd_12.8b",  0x300000, 0x20000, CRC(a6042aa2) SHA1(daa4e52574b53d125414401ad0fca6eea36abe64) , ROM_SKIP(7) )   // == kd_15.8c
	6560	ROMX_LOAD( "kd_4.8a",   0x300001, 0x20000, CRC(0ce0ba30) SHA1(a19049b5fc58921452bf7b69d2d86d0faa5362bf) , ROM_SKIP(7) )   // == kd_15.8c
	6561	ROMX_LOAD( "kd_16.12b", 0x300002, 0x20000, CRC(63dcb7e0) SHA1(1524321f31813452aabfef133fb64fd0cef165cf) , ROM_SKIP(7) )   // == kd_17.10c
	6562	ROMX_LOAD( "kd_8.12a",  0x300003, 0x20000, CRC(c69b77ae) SHA1(31cacace828d4e376347ecd896f3454f79285a8b) , ROM_SKIP(7) )   // == kd_17.10c
	6563	ROMX_LOAD( "kd_27.9e",  0x300004, 0x20000, CRC(40d7bfed) SHA1(924d3f981d85434d2a22d4ede45131720d7521c0) , ROM_SKIP(7) )   // == kd_14.7c
	6564	ROMX_LOAD( "kd_20.9c",  0x300005, 0x20000, CRC(01c1f399) SHA1(ea25d4efc9e538ee8ed09acb6e467c5b444bf728) , ROM_SKIP(7) )   // == kd_14.7c
	6565	ROMX_LOAD( "kd_29.11e", 0x300006, 0x20000, CRC(a1eeac03) SHA1(fdec33ec0becc4badf89c9019f3217c22e54e842) , ROM_SKIP(7) )   // == kd_16.9c
	6566	ROMX_LOAD( "kd_22.11c", 0x300007, 0x20000, CRC(5ade98eb) SHA1(5d2474864bf0e41e89fe44c69025101b8ef2b482) , ROM_SKIP(7) )   // == kd_16.9c
	6567
	6568	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	6569	ROM_LOAD( "kd_23.13b",  0x00000, 0x08000, CRC(bac6ec26) SHA1(6cbb6d55660150ae3f5270e023328275ee1bbf50) )   // == kd_09.12a
	6570	ROM_CONTINUE(           0x10000, 0x08000 )
	6571
	6572	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
	6573	ROM_LOAD( "kd_30.12c",  0x00000, 0x20000, CRC(4c63181d) SHA1(270f27534a95cb0be3ff3f9ca71c502320d8090b) )   // == kd_18.18
	6574	ROM_LOAD( "kd_31.13c",  0x20000, 0x20000, CRC(92941b80) SHA1(5fa7c2793e6febee54a83042d118ddd4f2b7d127) )   // == kd_19.19
	6575
	6576	ROM_REGION( 0x0200, "aboardplds", 0 )
	6577	ROM_LOAD( "buf1",         0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
	6578	ROM_LOAD( "ioa1",         0x0000, 0x0117, CRC(59c7ee3b) SHA1(fbb887c5b4f5cb8df77cec710eaac2985bc482a6) )
	6579	ROM_LOAD( "prg1",         0x0000, 0x0117, CRC(f1129744) SHA1(a5300f301c1a08a7da768f0773fa0fe3f683b237) )
	6580	ROM_LOAD( "rom1",         0x0000, 0x0117, CRC(41dc73b9) SHA1(7d4c9f1693c821fbf84e32dd6ef62ddf14967845) )
	6581	ROM_LOAD( "sou1",         0x0000, 0x0117, CRC(84f4b2fe) SHA1(dcc9e86cc36316fe42eace02d6df75d08bc8bb6d) )
	6582
	6583	ROM_REGION( 0x0200, "bboardplds", 0 )
	6584	ROM_LOAD( "kd22b.1a",     0x0000, 0x0117, NO_DUMP )
	6585	ROM_LOAD( "iob1.12e",     0x0000, 0x0117, CRC(3abc0700) SHA1(973043aa46ec6d5d1db20dc9d5937005a0f9f6ae) )
	6586
	6587	ROM_REGION( 0x0200, "cboardplds", 0 )
	6588	ROM_LOAD( "ioc1.ic7",     0x0000, 0x0117, CRC(0d182081) SHA1(475b3d417785da4bc512cce2b274bb00d4cc6792) )
	6589	ROM_LOAD( "c632.ic1",     0x0000, 0x0117, CRC(0fbd9270) SHA1(d7e737b20c44d41e29ca94be56114b31934dde81) )
	6590	ROM_END
	6591
6509	6592	/* B-Board 91635B-2 */
6510	6593	ROM_START( captcomm )
6511	6594	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
r8962	r8963
6785	6868	ROM_LOAD16_WORD_SWAP( "kr_23e.8f", 0x00000, 0x80000, CRC(1b3997eb) SHA1(724b68eff319fcdf0dd3bc1eb6662996c1f6ecd9) )
6786	6869	ROM_LOAD16_WORD_SWAP( "kr_22.7f",  0x80000, 0x80000, CRC(d0b671a9) SHA1(9865472c5fc3f617345e23b5de5a9ba177945b5a) )
6787	6870
6788		ROM_REGION( 0x400000, "gfx", 0 ) /* MASK roms */
	6871	ROM_REGION( 0x400000, "gfx", 0 )
6789	6872	ROMX_LOAD( "kr-5m.3a",  0x000000, 0x80000, CRC(9e36c1a4) SHA1(772daae74e119371dfb76fde9775bda78a8ba125) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "1" socket
6790	6873	ROMX_LOAD( "kr-7m.5a",  0x000002, 0x80000, CRC(c5832cae) SHA1(a188cf401cd3a2909b377d3059f14d22ec3b0643) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "3" socket
6791	6874	ROMX_LOAD( "kr-1m.4a",  0x000004, 0x80000, CRC(f095be2d) SHA1(0427d1574062f277a9d04440019d5638b05de561) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "2" socket
r8962	r8963
6826	6909	ROM_LOAD16_WORD_SWAP( "kr_23u.8f", 0x00000, 0x80000, CRC(252bc2ba) SHA1(4f4901c253bd64bbe68ea01994ae663fe2ccd056) )
6827	6910	ROM_LOAD16_WORD_SWAP( "kr_22.7f",  0x80000, 0x80000, CRC(d0b671a9) SHA1(9865472c5fc3f617345e23b5de5a9ba177945b5a) )
6828	6911
6829		ROM_REGION( 0x400000, "gfx", 0 ) /* MASK roms */
	6912	ROM_REGION( 0x400000, "gfx", 0 )
6830	6913	ROMX_LOAD( "kr-5m.3a",  0x000000, 0x80000, CRC(9e36c1a4) SHA1(772daae74e119371dfb76fde9775bda78a8ba125) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "1" socket
6831	6914	ROMX_LOAD( "kr-7m.5a",  0x000002, 0x80000, CRC(c5832cae) SHA1(a188cf401cd3a2909b377d3059f14d22ec3b0643) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "3" socket
6832	6915	ROMX_LOAD( "kr-1m.4a",  0x000004, 0x80000, CRC(f095be2d) SHA1(0427d1574062f277a9d04440019d5638b05de561) , ROM_GROUPWORD | ROM_SKIP(6) )   // in "2" socket
r8962	r8963
6867	6950	ROM_LOAD16_WORD_SWAP( "kr_23j.8f", 0x00000, 0x80000, CRC(eae7417f) SHA1(2ec808265a9a231922e2397d7e8f3c3841a90859) )
6868	6951	ROM_LOAD16_WORD_SWAP( "kr_22.7f",  0x80000, 0x80000, CRC(d0b671a9) SHA1(9865472c5fc3f617345e23b5de5a9ba177945b5a) )
6869	6952
6870		ROM_REGION( 0x400000, "gfx", 0 ) /* 27C4096 style EPROMs */
	6953	ROM_REGION( 0x400000, "gfx", 0 )
6871	6954	ROMX_LOAD( "kr_01.3a",  0x000000, 0x80000, CRC(9e36c1a4) SHA1(772daae74e119371dfb76fde9775bda78a8ba125) , ROM_GROUPWORD | ROM_SKIP(6) )   // == kr-5m.3a
6872	6955	ROMX_LOAD( "kr_02.4a",  0x000002, 0x80000, CRC(c5832cae) SHA1(a188cf401cd3a2909b377d3059f14d22ec3b0643) , ROM_GROUPWORD | ROM_SKIP(6) )   // == kr-7m.5a
6873	6956	ROMX_LOAD( "kr_03.5a",  0x000004, 0x80000, CRC(f095be2d) SHA1(0427d1574062f277a9d04440019d5638b05de561) , ROM_GROUPWORD | ROM_SKIP(6) )   // == kr-1m.4a
r8962	r8963
6902	6985	ROM_LOAD( "c632.ic1",     0x0000, 0x0117, CRC(0fbd9270) SHA1(d7e737b20c44d41e29ca94be56114b31934dde81) )
6903	6986	ROM_END
6904	6987
	6988	/* B-Board 89625B-1 */
	6989	ROM_START( knightsja )
	6990	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	6991	ROM_LOAD16_BYTE( "krj_36.12f", 0x00000, 0x20000, CRC(ad3d1a8e) SHA1(327f9e818f1500836fc549afeffbb2a3c5aafe8c) )   // == kr_23j.8f
	6992	ROM_LOAD16_BYTE( "krj_42.12h", 0x00001, 0x20000, CRC(e694a491) SHA1(5a4d27c879c10032c49880019501de3e45ab1b35) )   // == kr_23j.8f
	6993	ROM_LOAD16_BYTE( "krj_37.13f", 0x40000, 0x20000, CRC(85596094) SHA1(74ad294de63aa6b60aa8b885c45c3d41a07ce19a) )   // == kr_23j.8f
	6994	ROM_LOAD16_BYTE( "krj_43.13h", 0x40001, 0x20000, CRC(9198bf8f) SHA1(aa3610600286ab25ce81705ea1319d42e7cc7f6c) )   // == kr_23j.8f
	6995	ROM_LOAD16_BYTE( "kr_34.10f",  0x80000, 0x20000, CRC(fe6eb08d) SHA1(a67ca33895ff7f41e8521ff7b39e629048d04d30) )   // == kr_22.7f
	6996	ROM_LOAD16_BYTE( "kr_40.10h",  0x80001, 0x20000, CRC(1172806d) SHA1(5ad08bf9bada036d89a55f5a542ee1db22df45b2) )   // == kr_22.7f
	6997	ROM_LOAD16_BYTE( "kr_35.11f",  0xc0000, 0x20000, CRC(f854b020) SHA1(3d8bd0ab5e0fa2da3c868b591edff5c66f1f08ed) )   // == kr_22.7f
	6998	ROM_LOAD16_BYTE( "kr_41.11h",  0xc0001, 0x20000, CRC(eb52e78d) SHA1(b9462c9d97848a6dc4d55475053824df8c9e7f02) )   // == kr_22.7f
	6999
	7000	ROM_REGION( 0x400000, "gfx", 0 )
	7001	ROMX_LOAD( "kr_09.4b",  0x000000, 0x20000, CRC(08b76e10) SHA1(b18833c4794ef59f8eaf7aef4d62790c3fec9d4d) , ROM_SKIP(7) )   // == kr_01.3a
	7002	ROMX_LOAD( "kr_01.4a",  0x000001, 0x20000, CRC(40cecf5c) SHA1(a628199e1808664c403d0de183d1c6ae01670c57) , ROM_SKIP(7) )   // == kr_01.3a
	7003	ROMX_LOAD( "kr_13.9b",  0x000002, 0x20000, CRC(435aaa03) SHA1(60af266dccab12220d7efce68887b64826aba37d) , ROM_SKIP(7) )   // == kr_02.4a
	7004	ROMX_LOAD( "kr_05.9a",  0x000003, 0x20000, CRC(5b8a615b) SHA1(42aebdb7f338eac9a29380cb0b7553f0d3eaac04) , ROM_SKIP(7) )   // == kr_02.4a
	7005	ROMX_LOAD( "kr_24.5e",  0x000004, 0x20000, CRC(de65153e) SHA1(f28fcde0d08634d036d07c2a699026007d19718f) , ROM_SKIP(7) )   // == kr_03.5a
	7006	ROMX_LOAD( "kr_17.5c",  0x000005, 0x20000, CRC(b171c968) SHA1(cdbd7b0dc9fd2f3f027796d8f5cabf0a92a11941) , ROM_SKIP(7) )   // == kr_03.5a
	7007	ROMX_LOAD( "kr_38.8h",  0x000006, 0x20000, CRC(f4466bf4) SHA1(86e1ffc354b189504ca8f96143a62344a530d267) , ROM_SKIP(7) )   // == kr_04.6a
	7008	ROMX_LOAD( "kr_32.8f",  0x000007, 0x20000, CRC(87380ddd) SHA1(01e864060adcdafad987c5758db593525faed589) , ROM_SKIP(7) )   // == kr_04.6a
	7009	ROMX_LOAD( "kr_10.5b",  0x100000, 0x20000, CRC(37006d66) SHA1(0efec364ed5b0e121023bc3424d51241a4b208e0) , ROM_SKIP(7) )   // == kr_01.3a
	7010	ROMX_LOAD( "kr_02.5a",  0x100001, 0x20000, CRC(b54612e3) SHA1(1d33cf99fdaf3bf5c8d212d1a7c71f085c6c2cd4) , ROM_SKIP(7) )   // == kr_01.3a
	7011	ROMX_LOAD( "kr_14.10b", 0x100002, 0x20000, CRC(0ae88766) SHA1(5e3954b51b030d6e7cabd8f94cb849e963cc7d52) , ROM_SKIP(7) )   // == kr_02.4a
	7012	ROMX_LOAD( "kr_06.10a", 0x100003, 0x20000, CRC(ecb1a09a) SHA1(bbd96260774f52e50377ad020fc94d1b120f0a37) , ROM_SKIP(7) )   // == kr_02.4a
	7013	ROMX_LOAD( "kr_25.7e",  0x100004, 0x20000, CRC(9aace189) SHA1(95332a14dbe9d24a7e294a26530913b8cb5237f2) , ROM_SKIP(7) )   // == kr_03.5a
	7014	ROMX_LOAD( "kr_18.7c",  0x100005, 0x20000, CRC(09fa14a5) SHA1(36e7412a317d5f8b528d914d7e6c3c1872eb8533) , ROM_SKIP(7) )   // == kr_03.5a
	7015	ROMX_LOAD( "kr_39.9h",  0x100006, 0x20000, CRC(fd8a9aeb) SHA1(a38ea74de95a78fc72c6ad165157e4c22aaa5aed) , ROM_SKIP(7) )   // == kr_04.6a
	7016	ROMX_LOAD( "kr_33.9f",  0x100007, 0x20000, CRC(11803e95) SHA1(71603ba4a85967dd434d8499738014a9227d1d26) , ROM_SKIP(7) )   // == kr_04.6a
	7017	ROMX_LOAD( "kr_11.7b",  0x200000, 0x20000, CRC(a967ceb3) SHA1(43cdc0e0114f7ccedc7db5cd49b9041ed1a2614f) , ROM_SKIP(7) )   // == kr_05.7a
	7018	ROMX_LOAD( "kr_03.7a",  0x200001, 0x20000, CRC(ea10db07) SHA1(e537f3983ac32abcef06fa45afe51f82c87bfa86) , ROM_SKIP(7) )   // == kr_05.7a
	7019	ROMX_LOAD( "kr_15.11b", 0x200002, 0x20000, CRC(8140b83b) SHA1(e9cec517d84aa688d60f4201bcee00dbcdd44798) , ROM_SKIP(7) )   // == kr_06.8a
	7020	ROMX_LOAD( "kr_07.11a", 0x200003, 0x20000, CRC(6af10648) SHA1(b1d6c908496b1197e23571f5230f017502d5018c) , ROM_SKIP(7) )   // == kr_06.8a
	7021	ROMX_LOAD( "kr_26.8e",  0x200004, 0x20000, CRC(8865d86b) SHA1(a79b528d2f94ee350a39eb59860189809267cfad) , ROM_SKIP(7) )   // == kr_07.9a
	7022	ROMX_LOAD( "kr_19.8c",  0x200005, 0x20000, CRC(029f4abe) SHA1(e0f02d18e2a51eb02cabe507fbe77031ee3e67e7) , ROM_SKIP(7) )   // == kr_07.9a
	7023	ROMX_LOAD( "kr_28.10e", 0x200006, 0x20000, CRC(5f84f92f) SHA1(77b254e8159024490497533073fe302a82531835) , ROM_SKIP(7) )   // == kr_08.10a
	7024	ROMX_LOAD( "kr_21.10c", 0x200007, 0x20000, CRC(01b35065) SHA1(8a98860ec453ac88a3c0fc19c117bd4131d0c97c) , ROM_SKIP(7) )   // == kr_08.10a
	7025	ROMX_LOAD( "kr_12.8b",  0x300000, 0x20000, CRC(03d945b1) SHA1(88588891422247e6ab42f35a1b91a5801b8fd5b0) , ROM_SKIP(7) )   // == kr_05.7a
	7026	ROMX_LOAD( "kr_04.8a",  0x300001, 0x20000, CRC(e30c8388) SHA1(aa519f298f4156b339eb81767ca585e62dc9f4b5) , ROM_SKIP(7) )   // == kr_05.7a
	7027	ROMX_LOAD( "kr_16.12b", 0x300002, 0x20000, CRC(40c39d1b) SHA1(578d081f5e1bbfdc30b286cdd5165474b3ed79f7) , ROM_SKIP(7) )   // == kr_06.8a
	7028	ROMX_LOAD( "kr_08.12a", 0x300003, 0x20000, CRC(d310c9e8) SHA1(e23a4b318e7d3d6ea3bc6dd4509f49cd656d3d63) , ROM_SKIP(7) )   // == kr_06.8a
	7029	ROMX_LOAD( "kr_27.9e",  0x300004, 0x20000, CRC(3e041444) SHA1(7f84158bf2466625ff50befed7e3008b8fe09f70) , ROM_SKIP(7) )   // == kr_07.9a
	7030	ROMX_LOAD( "kr_20.9c",  0x300005, 0x20000, CRC(bd4bffb8) SHA1(b8f1162427a46ca9d2833390edc5723d28817a08) , ROM_SKIP(7) )   // == kr_07.9a
	7031	ROMX_LOAD( "kr_29.11e", 0x300006, 0x20000, CRC(1387a076) SHA1(5fe32ee8e8557c5bc6c865b2054f3c6c2a1eae7d) , ROM_SKIP(7) )   // == kr_08.10a
	7032	ROMX_LOAD( "kr_22.11c", 0x300007, 0x20000, CRC(fd351922) SHA1(7e08a9b23bf524d5fd566d81745aee1cd3a0f026) , ROM_SKIP(7) )   // == kr_08.10a
	7033
	7034	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	7035	ROM_LOAD( "kr_23.13b",  0x00000, 0x08000, CRC(5e44d9ee) SHA1(47a7503321be8d52b5c44af838e3bb82ee15a415) )   // == kr_09.12a
	7036	ROM_CONTINUE(           0x10000, 0x08000 )
	7037
	7038	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
	7039	ROM_LOAD( "kr_30.12c",  0x00000, 0x20000, CRC(da69d15f) SHA1(9616207e693bae85705f786cef60b9f6951b5067) )   // == kr_18.11c
	7040	ROM_LOAD( "kr_31.13c",  0x20000, 0x20000, CRC(bfc654e9) SHA1(01b3d92e4dedf55ea3933d387c7ddb9ba2549773) )   // == kr_19.12c
	7041
	7042	ROM_REGION( 0x0200, "aboardplds", 0 )
	7043	ROM_LOAD( "buf1",         0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
	7044	ROM_LOAD( "ioa1",         0x0000, 0x0117, CRC(59c7ee3b) SHA1(fbb887c5b4f5cb8df77cec710eaac2985bc482a6) )
	7045	ROM_LOAD( "prg1",         0x0000, 0x0117, CRC(f1129744) SHA1(a5300f301c1a08a7da768f0773fa0fe3f683b237) )
	7046	ROM_LOAD( "rom1",         0x0000, 0x0117, CRC(41dc73b9) SHA1(7d4c9f1693c821fbf84e32dd6ef62ddf14967845) )
	7047	ROM_LOAD( "sou1",         0x0000, 0x0117, CRC(84f4b2fe) SHA1(dcc9e86cc36316fe42eace02d6df75d08bc8bb6d) )
	7048
	7049	ROM_REGION( 0x0200, "bboardplds", 0 )
	7050	ROM_LOAD( "kr22b.1a",     0x0000, 0x0117, NO_DUMP )
	7051	ROM_LOAD( "lwio.12e",     0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) )
	7052
	7053	ROM_REGION( 0x0200, "cboardplds", 0 )
	7054	ROM_LOAD( "ioc1.ic7",     0x0000, 0x0117, CRC(0d182081) SHA1(475b3d417785da4bc512cce2b274bb00d4cc6792) )
	7055	ROM_LOAD( "c632.ic1",     0x0000, 0x0117, CRC(0fbd9270) SHA1(d7e737b20c44d41e29ca94be56114b31934dde81) )
	7056	ROM_END
	7057
6905	7058	/* bootleg */
6906	7059	/* FIXME - GFX ROMs are wrong, copied from the other version */
6907	7060	/* ROMs missing are KA.IC91 KB.IC92 KC.IC93 KD.IC94 */
r8962	r8963
6929	7082	/* B-Board 91635B-2 */
6930	7083	ROM_START( sf2ce )
6931	7084	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	7085	ROM_LOAD16_WORD_SWAP( "s92e_23b.8f", 0x000000, 0x80000, CRC(0aaa1a3a) SHA1(774a2b52f7c1876c0e10d8d57a0850ad2d016cf6) )
	7086	ROM_LOAD16_WORD_SWAP( "s92_22b.7f",  0x080000, 0x80000, CRC(2bbe15ed) SHA1(a8e2edef62fa99c5ef701b28bfb6bc42f3af183d) )
	7087	ROM_LOAD16_WORD_SWAP( "s92_21a.6f",  0x100000, 0x80000, CRC(925a7877) SHA1(1960dca35f0ca6f2b399a9fccfbc0132ac6425d1) )
	7088
	7089	ROM_REGION( 0x600000, "gfx", 0 )
	7090	ROMX_LOAD( "s92-1m.3a",  0x000000, 0x80000, CRC(03b0d852) SHA1(f370f25c96ad2b94f8c53d6b7139100285a25bef) , ROM_GROUPWORD | ROM_SKIP(6) )
	7091	ROMX_LOAD( "s92-3m.5a",  0x000002, 0x80000, CRC(840289ec) SHA1(2fb42a242f60ba7e74009b5a90eb26e035ba1e82) , ROM_GROUPWORD | ROM_SKIP(6) )
	7092	ROMX_LOAD( "s92-2m.4a",  0x000004, 0x80000, CRC(cdb5f027) SHA1(4c7d944fef200fdfcaf57758b901b5511188ed2e) , ROM_GROUPWORD | ROM_SKIP(6) )
	7093	ROMX_LOAD( "s92-4m.6a",  0x000006, 0x80000, CRC(e2799472) SHA1(27d3796429338d82a8de246a0ea06dd487a87768) , ROM_GROUPWORD | ROM_SKIP(6) )
	7094	ROMX_LOAD( "s92-5m.7a",  0x200000, 0x80000, CRC(ba8a2761) SHA1(4b696d66c51611e43522bed752654314e76d33b6) , ROM_GROUPWORD | ROM_SKIP(6) )
	7095	ROMX_LOAD( "s92-7m.9a",  0x200002, 0x80000, CRC(e584bfb5) SHA1(ebdf1f5e2638eed3a65dda82b1ed9151a355f4c9) , ROM_GROUPWORD | ROM_SKIP(6) )
	7096	ROMX_LOAD( "s92-6m.8a",  0x200004, 0x80000, CRC(21e3f87d) SHA1(4a4961bb68c3a1ce15f9d393d9c03ecb2466cc29) , ROM_GROUPWORD | ROM_SKIP(6) )
	7097	ROMX_LOAD( "s92-8m.10a", 0x200006, 0x80000, CRC(befc47df) SHA1(520390420da3a0271ba90b0a933e65143265e5cf) , ROM_GROUPWORD | ROM_SKIP(6) )
	7098	ROMX_LOAD( "s92-10m.3c", 0x400000, 0x80000, CRC(960687d5) SHA1(2868c31121b1c7564e9767b9a19cdbf655c7ed1d) , ROM_GROUPWORD | ROM_SKIP(6) )
	7099	ROMX_LOAD( "s92-12m.5c", 0x400002, 0x80000, CRC(978ecd18) SHA1(648a59706b93c84b4206a968ecbdc3e834c476f6) , ROM_GROUPWORD | ROM_SKIP(6) )
	7100	ROMX_LOAD( "s92-11m.4c", 0x400004, 0x80000, CRC(d6ec9a0a) SHA1(ed6143f8737013b6ef1684e37c05e037e7a80dae) , ROM_GROUPWORD | ROM_SKIP(6) )
	7101	ROMX_LOAD( "s92-13m.6c", 0x400006, 0x80000, CRC(ed2c67f6) SHA1(0083c0ffaf6fe7659ff0cf822be4346cd6e61329) , ROM_GROUPWORD | ROM_SKIP(6) )
	7102
	7103	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	7104	ROM_LOAD( "s92_09.11a",  0x00000, 0x08000, CRC(08f6b60e) SHA1(8258fcaca4ac419312531eec67079b97f471179c) )
	7105	ROM_CONTINUE(            0x10000, 0x08000 )
	7106
	7107	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
	7108	ROM_LOAD( "s92_18.11c",  0x00000, 0x20000, CRC(7f162009) SHA1(346bf42992b4c36c593e21901e22c87ae4a7d86d) )
	7109	ROM_LOAD( "s92_19.12c",  0x20000, 0x20000, CRC(beade53f) SHA1(277c397dc12752719ec6b47d2224750bd1c07f79) )
	7110
	7111	ROM_REGION( 0x0200, "aboardplds", 0 )
	7112	ROM_LOAD( "buf1",         0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
	7113	ROM_LOAD( "ioa1",         0x0000, 0x0117, CRC(59c7ee3b) SHA1(fbb887c5b4f5cb8df77cec710eaac2985bc482a6) )
	7114	ROM_LOAD( "prg1",         0x0000, 0x0117, CRC(f1129744) SHA1(a5300f301c1a08a7da768f0773fa0fe3f683b237) )
	7115	ROM_LOAD( "rom1",         0x0000, 0x0117, CRC(41dc73b9) SHA1(7d4c9f1693c821fbf84e32dd6ef62ddf14967845) )
	7116	ROM_LOAD( "sou1",         0x0000, 0x0117, CRC(84f4b2fe) SHA1(dcc9e86cc36316fe42eace02d6df75d08bc8bb6d) )
	7117
	7118	ROM_REGION( 0x0200, "bboardplds", 0 )
	7119	ROM_LOAD( "s9263b.1a",    0x0000, 0x0117, NO_DUMP )
	7120	ROM_LOAD( "iob1.12d",     0x0000, 0x0117, CRC(3abc0700) SHA1(973043aa46ec6d5d1db20dc9d5937005a0f9f6ae) )
	7121	ROM_LOAD( "bprg1.11d",    0x0000, 0x0117, CRC(31793da7) SHA1(400fa7ac517421c978c1ee7773c30b9ed0c5d3f3) )
	7122
	7123	ROM_REGION( 0x0200, "cboardplds", 0 )
	7124	ROM_LOAD( "ioc1.ic7",     0x0000, 0x0117, CRC(0d182081) SHA1(475b3d417785da4bc512cce2b274bb00d4cc6792) )
	7125	ROM_LOAD( "c632.ic1",     0x0000, 0x0117, CRC(0fbd9270) SHA1(d7e737b20c44d41e29ca94be56114b31934dde81) )
	7126	ROM_END
	7127
	7128	/* B-Board 91635B-2 */
	7129	ROM_START( sf2ceea )
	7130	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
6932	7131	ROM_LOAD16_WORD_SWAP( "s92e_23a.8f", 0x000000, 0x80000, CRC(3f846b74) SHA1(c8d7a01b626771870123f1663a01a81f9c8fe582) )
6933	7132	ROM_LOAD16_WORD_SWAP( "s92_22a.7f",  0x080000, 0x80000, CRC(99f1cca4) SHA1(64111eba81d743fc3fd51d7a89cd0b2eefcc900d) )
6934	7133	ROM_LOAD16_WORD_SWAP( "s92_21a.6f",  0x100000, 0x80000, CRC(925a7877) SHA1(1960dca35f0ca6f2b399a9fccfbc0132ac6425d1) )
r8962	r8963
7115	7314	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
7116	7315	ROM_LOAD16_WORD_SWAP( "s92j_23b.8f", 0x000000, 0x80000, CRC(140876c5) SHA1(304630e6d8bae9f8d29090e05f7e013c7dafe9cc) )
7117	7316	ROM_LOAD16_WORD_SWAP( "s92j_22b.7f", 0x080000, 0x80000, CRC(2fbb3bfe) SHA1(e364564a12022730c2c0d0e8fd435e2c30ef9410) )
7118		ROM_LOAD16_WORD_SWAP( "s92_21a.6f",  0x100000, 0x80000, CRC(925a7877) SHA1(1960dca35f0ca6f2b399a9fccfbc0132ac6425d1) )
	7317	ROM_LOAD16_WORD_SWAP( "s92_21a.6f",  0x100000, 0x80000, CRC(925a7877) SHA1(1960dca35f0ca6f2b399a9fccfbc0132ac6425d1) )   // could be s92j_21a.6f
7119	7318
7120	7319	ROM_REGION( 0x600000, "gfx", 0 )
7121	7320	ROMX_LOAD( "s92_01.3a",  0x000000, 0x80000, CRC(03b0d852) SHA1(f370f25c96ad2b94f8c53d6b7139100285a25bef) , ROM_GROUPWORD | ROM_SKIP(6) )   // == s92-1m.3a
r8962	r8963
7132	7331	ROMX_LOAD( "s92_13.6c",  0x400006, 0x80000, CRC(ed2c67f6) SHA1(0083c0ffaf6fe7659ff0cf822be4346cd6e61329) , ROM_GROUPWORD | ROM_SKIP(6) )   // == s92-13m.6c
7133	7332
7134	7333	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
7135		ROM_LOAD( "s92_09.11a",    0x00000, 0x08000, CRC(08f6b60e) SHA1(8258fcaca4ac419312531eec67079b97f471179c) )
7136		ROM_CONTINUE(              0x10000, 0x08000 )
	7334	ROM_LOAD( "s92_09.12a",  0x00000, 0x08000, CRC(08f6b60e) SHA1(8258fcaca4ac419312531eec67079b97f471179c) )   // == s92_09.11a
	7335	ROM_CONTINUE(            0x10000, 0x08000 )
7137	7336
7138	7337	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
7139	7338	ROM_LOAD( "s92_18.11c",  0x00000, 0x20000, CRC(7f162009) SHA1(346bf42992b4c36c593e21901e22c87ae4a7d86d) )
r8962	r8963
7978	8177	ROM_LOAD( "ioc1.ic1",     0x0000, 0x0117, CRC(0d182081) SHA1(475b3d417785da4bc512cce2b274bb00d4cc6792) )
7979	8178	ROM_END
7980	8179
7981		/* FIXME B-Board uncertain but should be 91634B from the program ROM names */
	8180	/* B-Board 91634B-2 */
7982	8181	ROM_START( qadj )
7983	8182	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
7984		ROM_LOAD16_WORD_SWAP( "qad23a.bin",   0x00000, 0x80000, CRC(4d3553de) SHA1(07eabcb02fbbe11397ce91405a2e6bb53b3d5d4f) )
7985		ROM_LOAD16_WORD_SWAP( "qad22a.bin",   0x80000, 0x80000, CRC(3191ddd0) SHA1(2806021a5dc809ca43692bbe9c4f5ef690c9ac14) )
	8183	ROM_LOAD16_WORD_SWAP( "qad_23a.8f", 0x00000, 0x80000, CRC(4d3553de) SHA1(07eabcb02fbbe11397ce91405a2e6bb53b3d5d4f) )
	8184	ROM_LOAD16_WORD_SWAP( "qad_22a.7f", 0x80000, 0x80000, CRC(3191ddd0) SHA1(2806021a5dc809ca43692bbe9c4f5ef690c9ac14) )
7986	8185
7987	8186	ROM_REGION( 0x200000, "gfx", 0 )
7988		ROMX_LOAD( "qad01.bin",   0x000000, 0x80000, CRC(9d853b57) SHA1(380b41a3eced1f4a5523999b63d80b7593a85eca) , ROM_GROUPWORD | ROM_SKIP(6) )
7989		ROMX_LOAD( "qad02.bin",   0x000002, 0x80000, CRC(b35976c4) SHA1(3e128db89186c4e88c46be9da310b755ae5b816c) , ROM_GROUPWORD | ROM_SKIP(6) )
7990		ROMX_LOAD( "qad03.bin",   0x000004, 0x80000, CRC(cea4ca8c) SHA1(5c50758647419129f2b35ab4dc712796fa801c12) , ROM_GROUPWORD | ROM_SKIP(6) )
7991		ROMX_LOAD( "qad04.bin",   0x000006, 0x80000, CRC(41b74d1b) SHA1(78aa2faec512c505f98b4e8053fc161941d41773) , ROM_GROUPWORD | ROM_SKIP(6) )
	8187	ROMX_LOAD( "qad_01.3a", 0x000000, 0x80000, CRC(9d853b57) SHA1(380b41a3eced1f4a5523999b63d80b7593a85eca) , ROM_GROUPWORD | ROM_SKIP(6) )
	8188	ROMX_LOAD( "qad_02.4a", 0x000002, 0x80000, CRC(b35976c4) SHA1(3e128db89186c4e88c46be9da310b755ae5b816c) , ROM_GROUPWORD | ROM_SKIP(6) )
	8189	ROMX_LOAD( "qad_03.5a", 0x000004, 0x80000, CRC(cea4ca8c) SHA1(5c50758647419129f2b35ab4dc712796fa801c12) , ROM_GROUPWORD | ROM_SKIP(6) )
	8190	ROMX_LOAD( "qad_04.6a", 0x000006, 0x80000, CRC(41b74d1b) SHA1(78aa2faec512c505f98b4e8053fc161941d41773) , ROM_GROUPWORD | ROM_SKIP(6) )
7992	8191
7993	8192	ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
7994		ROM_LOAD( "qad09.bin",     0x00000, 0x08000, CRC(733161cc) SHA1(dfb8c5a1037bd3b2712fb327122ec39ceb993b8d) )
7995		ROM_CONTINUE(              0x10000, 0x08000 )
	8193	ROM_LOAD( "qad_09.12a", 0x00000, 0x08000, CRC(733161cc) SHA1(dfb8c5a1037bd3b2712fb327122ec39ceb993b8d) )
	8194	ROM_CONTINUE(           0x10000, 0x08000 )
7996	8195
7997	8196	ROM_REGION( 0x40000, "oki", 0 )   /* Samples */
7998		ROM_LOAD( "qad18.bin",     0x00000, 0x20000, CRC(2bfe6f6a) SHA1(b2a98ac034c65b7ac8167431f05f35d4799032ea) )
7999		ROM_LOAD( "qad19.bin",     0x20000, 0x20000, CRC(13d3236b) SHA1(785d49de484e9ac6971eaceebebfecb8e58563f6) )
	8197	ROM_LOAD( "qad_18.11c", 0x00000, 0x20000, CRC(2bfe6f6a) SHA1(b2a98ac034c65b7ac8167431f05f35d4799032ea) )
	8198	ROM_LOAD( "qad_19.12c", 0x20000, 0x20000, CRC(13d3236b) SHA1(785d49de484e9ac6971eaceebebfecb8e58563f6) )
8000	8199
8001	8200	ROM_REGION( 0x0200, "aboardplds", 0 )
8002	8201	ROM_LOAD( "buf1",         0x0000, 0x0117, CRC(eb122de7) SHA1(b26b5bfe258e3e184f069719f9fd008d6b8f6b9b) )
r8962	r8963
8004	8203	ROM_LOAD( "prg1",         0x0000, 0x0117, CRC(f1129744) SHA1(a5300f301c1a08a7da768f0773fa0fe3f683b237) )
8005	8204	ROM_LOAD( "rom1",         0x0000, 0x0117, CRC(41dc73b9) SHA1(7d4c9f1693c821fbf84e32dd6ef62ddf14967845) )
8006	8205	ROM_LOAD( "sou1",         0x0000, 0x0117, CRC(84f4b2fe) SHA1(dcc9e86cc36316fe42eace02d6df75d08bc8bb6d) )
	8206
	8207	ROM_REGION( 0x0200, "bboardplds", 0 )
	8208	ROM_LOAD( "qd63b.1a",     0x0000, 0x0117, NO_DUMP )
	8209	ROM_LOAD( "iob1.12d",     0x0000, 0x0117, CRC(3abc0700) SHA1(973043aa46ec6d5d1db20dc9d5937005a0f9f6ae) )
	8210	ROM_LOAD( "bprg1.11d",    0x0000, 0x0117, CRC(31793da7) SHA1(400fa7ac517421c978c1ee7773c30b9ed0c5d3f3) )
	8211
	8212	ROM_REGION( 0x0200, "cboardplds", 0 )
	8213	ROM_LOAD( "ioc1.ic7",     0x0000, 0x0117, CRC(0d182081) SHA1(475b3d417785da4bc512cce2b274bb00d4cc6792) )
	8214	ROM_LOAD( "c632.ic1",     0x0000, 0x0117, CRC(0fbd9270) SHA1(d7e737b20c44d41e29ca94be56114b31934dde81) )
8007	8215	ROM_END
8008	8216
8009	8217	/* FIXME B-Board uncertain but should be 91635B from the program ROM names */
r8962	r8963
9691	9899	GAME( 1990, msword,      0,        cps1_10MHz, msword,     cps1,     ROT0,   "Capcom", "Magic Sword: Heroic Fantasy (World 900725)", GAME_SUPPORTS_SAVE )   // 25.07.1990  "OTHER COUNTRY"
9692	9900	GAME( 1990, mswordr1,    msword,   cps1_10MHz, msword,     cps1,     ROT0,   "Capcom", "Magic Sword: Heroic Fantasy (World 900623)", GAME_SUPPORTS_SAVE )   // 23.06.1990  "OTHER COUNTRY"
9693	9901	GAME( 1990, mswordu,     msword,   cps1_10MHz, msword,     cps1,     ROT0,   "Capcom", "Magic Sword: Heroic Fantasy (USA 900725)", GAME_SUPPORTS_SAVE )   // 25.07.1990  "U.S.A."
9694		GAME( 1990, mswordj,     msword,   cps1_10MHz, msword,     cps1,     ROT0,   "Capcom", "Magic Sword (Japan 900623)", GAME_SUPPORTS_SAVE )            // 23.06.1990  "JAPAN"
	9902	GAME( 1990, mswordj,     msword,   cps1_10MHz, msword,     cps1,     ROT0,   "Capcom", "Magic Sword: Heroic Fantasy (Japan 900623)", GAME_SUPPORTS_SAVE )   // 23.06.1990  "JAPAN"
9695	9903	GAME( 1990, cawing,      0,        cps1_10MHz, cawing,     cps1,     ROT0,   "Capcom", "Carrier Air Wing (World 901012)", GAME_SUPPORTS_SAVE )   // "ETC"
9696	9904	GAME( 1990, cawingr1,    cawing,   cps1_10MHz, cawing,     cps1,     ROT0,   "Capcom", "Carrier Air Wing (World 901009)", GAME_SUPPORTS_SAVE )   // "ETC"
9697	9905	GAME( 1990, cawingu,     cawing,   cps1_10MHz, cawing,     cps1,     ROT0,   "Capcom", "Carrier Air Wing (USA 901012)", GAME_SUPPORTS_SAVE )
r8962	r8963
9700	9908	GAME( 1990, nemoj,       nemo,     cps1_10MHz, nemo,       cps1,     ROT0,   "Capcom", "Nemo (Japan 901120)", GAME_SUPPORTS_SAVE )
9701	9909	GAME( 1991, sf2,         0,        cps1_10MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II: The World Warrior (World 910522)", GAME_SUPPORTS_SAVE )   // "ETC"
9702	9910	GAME( 1991, sf2eb,       sf2,      cps1_10MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II: The World Warrior (World 910214)", GAME_SUPPORTS_SAVE )   // "ETC"
9703		GAME( 1992, sf2ebbl,     sf2,      cps1_10MHz, sf2hack,    sf2hack,  ROT0,   "bootleg", "Street Fighter II: The World Warrior (TAB Austria, bootleg)", GAME_SUPPORTS_SAVE )   // 910214 - based on World version
9704	9911	GAME( 1991, sf2ua,       sf2,      cps1_10MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II: The World Warrior (USA 910206)", GAME_SUPPORTS_SAVE )
9705	9912	GAME( 1991, sf2ub,       sf2,      cps1_10MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II: The World Warrior (USA 910214)", GAME_SUPPORTS_SAVE )
9706	9913	GAME( 1991, sf2ud,       sf2,      cps1_10MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II: The World Warrior (USA 910318)", GAME_SUPPORTS_SAVE )
r8962	r8963
9711	9918	GAME( 1991, sf2j,        sf2,      cps1_10MHz, sf2j,       cps1,     ROT0,   "Capcom", "Street Fighter II: The World Warrior (Japan 911210)", GAME_SUPPORTS_SAVE )
9712	9919	GAME( 1991, sf2ja,       sf2,      cps1_10MHz, sf2j,       cps1,     ROT0,   "Capcom", "Street Fighter II: The World Warrior (Japan 910214)", GAME_SUPPORTS_SAVE )
9713	9920	GAME( 1991, sf2jc,       sf2,      cps1_10MHz, sf2j,       cps1,     ROT0,   "Capcom", "Street Fighter II: The World Warrior (Japan 910306)", GAME_SUPPORTS_SAVE )
9714		GAME( 1991, sf2qp1,      sf2,      cps1_10MHz, sf2,        cps1,     ROT0,   "bootleg", "Street Fighter II: The World Warrior (Quicken Pt-I, bootleg)", GAME_SUPPORTS_SAVE )   // 910214 - based on World version
	9921	GAME( 1992, sf2ebbl,     sf2,      cps1_10MHz, sf2hack,    sf2hack,  ROT0,   "bootleg", "Street Fighter II: The World Warrior (TAB Austria, bootleg)", GAME_SUPPORTS_SAVE )      // 910214 - based on World version
	9922	GAME( 1991, sf2qp1,      sf2,      cps1_10MHz, sf2,        cps1,     ROT0,   "bootleg", "Street Fighter II: The World Warrior (Quicken Pt-I, bootleg)", GAME_SUPPORTS_SAVE )      // 910214 - based on World version
9715	9923	GAME( 1991, sf2thndr,    sf2,      cps1_10MHz, sf2,        sf2thndr, ROT0,   "bootleg", "Street Fighter II: The World Warrior (Thunder Edition, bootleg)", GAME_SUPPORTS_SAVE )   // 910214 - based on World version
9716	9924	GAME( 1991, 3wonders,    0,        cps1_10MHz, 3wonders,   cps1,     ROT0,   "Capcom", "Three Wonders (World 910520)", GAME_SUPPORTS_SAVE )   // "ETC"
9717	9925	GAME( 1991, 3wondersu,   3wonders, cps1_10MHz, 3wonders,   cps1,     ROT0,   "Capcom", "Three Wonders (USA 910520)", GAME_SUPPORTS_SAVE )
r8962	r8963
9719	9927	GAME( 1991, 3wondersh,   3wonders, cps1_10MHz, 3wonders,   cps1,     ROT0,   "bootleg", "Three Wonders (hack)", GAME_SUPPORTS_SAVE )   // 910520 - based on World version
9720	9928	GAME( 1991, kod,         0,        cps1_10MHz, kod,        cps1,     ROT0,   "Capcom", "The King of Dragons (World 910711)", GAME_SUPPORTS_SAVE )   // "ETC"
9721	9929	GAME( 1991, kodu,        kod,      cps1_10MHz, kodj,       cps1,     ROT0,   "Capcom", "The King of Dragons (USA 910910)", GAME_SUPPORTS_SAVE )
9722		GAME( 1991, kodj,        kod,      cps1_10MHz, kodj,       cps1,     ROT0,   "Capcom", "The King of Dragons (Japan 910805)", GAME_SUPPORTS_SAVE )
	9930	GAME( 1991, kodj,        kod,      cps1_10MHz, kodj,       cps1,     ROT0,   "Capcom", "The King of Dragons (Japan 910805, B-Board 90629B-3)", GAME_SUPPORTS_SAVE )
	9931	GAME( 1991, kodja,       kod,      cps1_10MHz, kodj,       cps1,     ROT0,   "Capcom", "The King of Dragons (Japan 910805, B-Board 89625B-1)", GAME_SUPPORTS_SAVE )
9723	9932	GAME( 1991, captcomm,    0,        cps1_10MHz, captcomm,   cps1,     ROT0,   "Capcom", "Captain Commando (World 911202)", GAME_SUPPORTS_SAVE )   // "OTHER COUNTRY"
9724	9933	GAME( 1991, captcommr1,  captcomm, cps1_10MHz, captcomm,   cps1,     ROT0,   "Capcom", "Captain Commando (World 911014)", GAME_SUPPORTS_SAVE )   // "OTHER COUNTRY"
9725	9934	GAME( 1991, captcommu,   captcomm, cps1_10MHz, captcomm,   cps1,     ROT0,   "Capcom", "Captain Commando (USA 910928)", GAME_SUPPORTS_SAVE )
r8962	r8963
9728	9937	GAME( 1991, captcommb,   captcomm, cps1_10MHz, captcomm,   cps1,     ROT0,   "bootleg", "Captain Commando (bootleg)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )   // 911014 - based on World version
9729	9938	GAME( 1991, knights,     0,        cps1_10MHz, knights,    cps1,     ROT0,   "Capcom", "Knights of the Round (World 911127)", GAME_SUPPORTS_SAVE )   // "ETC"
9730	9939	GAME( 1991, knightsu,    knights,  cps1_10MHz, knights,    cps1,     ROT0,   "Capcom", "Knights of the Round (USA 911127)", GAME_SUPPORTS_SAVE )
9731		GAME( 1991, knightsj,    knights,  cps1_10MHz, knights,    cps1,     ROT0,   "Capcom", "Knights of the Round (Japan 911127)", GAME_SUPPORTS_SAVE )
	9940	GAME( 1991, knightsj,    knights,  cps1_10MHz, knights,    cps1,     ROT0,   "Capcom", "Knights of the Round (Japan 911127, B-Board 91634B-2)", GAME_SUPPORTS_SAVE )
	9941	GAME( 1991, knightsja,   knights,  cps1_10MHz, knights,    cps1,     ROT0,   "Capcom", "Knights of the Round (Japan 911127, B-Board 89625B-1)", GAME_SUPPORTS_SAVE )
9732	9942	GAME( 1991, knightsb,    knights,  knightsb,   knights,    cps1,     ROT0,   "bootleg", "Knights of the Round (bootleg)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )   // 911127 - based on World version
9733		GAME( 1992, sf2ce,       0,        cps1_12MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II': Champion Edition (World 920313)", GAME_SUPPORTS_SAVE )   // "ETC"
	9943	GAME( 1992, sf2ce,       0,        cps1_12MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II': Champion Edition (World 920513)", GAME_SUPPORTS_SAVE )   // "ETC"
	9944	GAME( 1992, sf2ceea,     sf2ce,    cps1_12MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II': Champion Edition (World 920313)", GAME_SUPPORTS_SAVE )   // "ETC"
9734	9945	GAME( 1992, sf2ceua,     sf2ce,    cps1_12MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II': Champion Edition (USA 920313)", GAME_SUPPORTS_SAVE )
9735	9946	GAME( 1992, sf2ceub,     sf2ce,    cps1_12MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II': Champion Edition (USA 920513)", GAME_SUPPORTS_SAVE )
9736	9947	GAME( 1992, sf2ceuc,     sf2ce,    cps1_12MHz, sf2,        cps1,     ROT0,   "Capcom", "Street Fighter II': Champion Edition (USA 920803)", GAME_SUPPORTS_SAVE )

src/mame/drivers/yunsun16.c

r8962	r8963
624	624
625	625	MDRV_SOUND_ADD("ymsnd", YM3812, 4000000)
626	626	MDRV_SOUND_CONFIG(magicbub_ym3812_intf)
627		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.20)
628		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.20)
	627	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.80)
	628	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.80)
629	629
630	630	MDRV_OKIM6295_ADD("oki", 1056000, OKIM6295_PIN7_HIGH)
631	631	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.80)

src/mame/drivers/wiz.c

r8962	r8963
1049	1049	{ 5,3,7, 0x80 },
1050	1050	{ 5,7,3, 0x28 }
1051	1051	};
1052		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1052	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1053	1053	UINT8 *rom = memory_region(machine, "maincpu");
1054	1054	int size = memory_region_length(machine, "maincpu");
1055	1055	UINT8 *decrypt = auto_alloc_array(machine, UINT8, size);
1056	1056	int A;
1057	1057	const UINT8 *tbl;
1058	1058
1059		memory_set_decrypted_region(space, 0x0000, 0xffff, decrypt);
	1059	space->set_decrypted_region(0x0000, 0xffff, decrypt);
1060	1060
1061	1061	for (A = 0x0000;A < 0x10000;A++)
1062	1062	{

src/mame/drivers/calorie.c

r8962	r8963
555	555
556	556	static DRIVER_INIT( calorieb )
557	557	{
558		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
559		memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x10000);
	558	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	559	space->set_decrypted_region(0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x10000);
560	560	}
561	561
562	562

src/mame/drivers/namcos11.c

r8962	r8963
573	573
574	574	static UINT32 m_n_bankoffset;
575	575
576		INLINE void bankswitch_rom8( const address_space *space, const char *bank, int n_data )
	576	INLINE void bankswitch_rom8( address_space *space, const char *bank, int n_data )
577	577	{
578	578	memory_set_bank( space->machine, bank, ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
579	579	}
r8962	r8963
608	608	}
609	609	}
610	610
611		INLINE void bankswitch_rom64( const address_space *space, const char *bank, int n_data )
	611	INLINE void bankswitch_rom64( address_space *space, const char *bank, int n_data )
612	612	{
613	613	/* todo: verify behaviour */
614	614	memory_set_bank( space->machine,  bank, ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ m_n_bankoffset ) );

src/mame/drivers/itech8.c

r8962	r8963
680	680	machine->device("maincpu")->reset();
681	681	}
682	682
683		/* reset the palette chip */
684		tlc34076_reset(6);
685
686	683	/* set the visible area */
687	684	if (visarea)
688	685	{
r8962	r8963
1730	1727	MDRV_TICKET_DISPENSER_ADD("ticket", 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW)
1731	1728
1732	1729	/* video hardware */
	1730	MDRV_TLC34076_ADD("tlc34076", TLC34076_6_BIT)
	1731
1733	1732	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1734	1733	MDRV_VIDEO_START(itech8)
1735	1734

src/mame/drivers/galaxian.c

r8962	r8963
1022	1022
1023	1023	static INPUT_CHANGED( gmgalax_game_changed )
1024	1024	{
1025		const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1025	address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1026	1026
1027	1027	/* new value is the selected game */
1028	1028	gmgalax_selected_game = newval;
r8962	r8963
2601	2601
2602	2602	static void unmap_galaxian_sound(running_machine *machine, offs_t base)
2603	2603	{
2604		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2604	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2605	2605
2606	2606	memory_unmap_write(space, base + 0x0004, base + 0x0007, 0, 0x07f8);
2607	2607	memory_unmap_write(space, base + 0x0800, base + 0x0807, 0, 0x07f8);
r8962	r8963
2624	2624
2625	2625	static DRIVER_INIT( nolock )
2626	2626	{
2627		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2627	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2628	2628
2629	2629	/* same as galaxian... */
2630	2630	DRIVER_INIT_CALL(galaxian);
r8962	r8963
2636	2636
2637	2637	static DRIVER_INIT( azurian )
2638	2638	{
2639		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2639	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2640	2640
2641	2641	/* yellow bullets instead of white ones */
2642	2642	common_init(machine, scramble_draw_bullet, galaxian_draw_background, NULL, NULL);
r8962	r8963
2648	2648
2649	2649	static DRIVER_INIT( gmgalax )
2650	2650	{
2651		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2651	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2652	2652
2653	2653	/* video extensions */
2654	2654	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, gmgalax_extend_tile_info, gmgalax_extend_sprite_info);
r8962	r8963
2665	2665
2666	2666	static DRIVER_INIT( pisces )
2667	2667	{
2668		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2668	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2669	2669
2670	2670	/* video extensions */
2671	2671	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, pisces_extend_tile_info, pisces_extend_sprite_info);
r8962	r8963
2677	2677
2678	2678	static DRIVER_INIT( batman2 )
2679	2679	{
2680		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2680	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2681	2681
2682	2682	/* video extensions */
2683	2683	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
r8962	r8963
2689	2689
2690	2690	static DRIVER_INIT( frogg )
2691	2691	{
2692		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2692	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2693	2693
2694	2694	/* same as galaxian... */
2695	2695	common_init(machine, galaxian_draw_bullet, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info);
r8962	r8963
2725	2725
2726	2726	static DRIVER_INIT( mooncrgx )
2727	2727	{
2728		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2728	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2729	2729
2730	2730	/* video extensions */
2731	2731	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
r8962	r8963
2737	2737
2738	2738	static DRIVER_INIT( moonqsr )
2739	2739	{
2740		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2740	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2741	2741	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
2742	2742
2743	2743	/* video extensions */
r8962	r8963
2745	2745
2746	2746	/* decrypt program code */
2747	2747	decode_mooncrst(machine, 0x8000, decrypt);
2748		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	2748	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
2749	2749	}
2750	2750
2751	2751	static WRITE8_HANDLER( artic_gfxbank_w )
r8962	r8963
2755	2755
2756	2756	static DRIVER_INIT( pacmanbl )
2757	2757	{
2758		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2758	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2759	2759
2760	2760	/* same as galaxian... */
2761	2761	DRIVER_INIT_CALL(galaxian);
r8962	r8963
2821	2821
2822	2822	static DRIVER_INIT( tenspot )
2823	2823	{
2824		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2824	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2825	2825
2826	2826	/* these are needed for batman part 2 to work properly, this banking is probably a property of the artic board,
2827	2827	which tenspot appears to have copied */
r8962	r8963
2858	2858
2859	2859	static DRIVER_INIT( zigzag )
2860	2860	{
2861		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2861	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2862	2862
2863	2863	/* video extensions */
2864	2864	common_init(machine, NULL, galaxian_draw_background, NULL, NULL);
r8962	r8963
2898	2898
2899	2899	static DRIVER_INIT( checkman )
2900	2900	{
2901		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2902		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	2901	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2902	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
2903	2903
2904	2904	/* video extensions */
2905	2905	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
r8962	r8963
2918	2918
2919	2919	static DRIVER_INIT( checkmaj )
2920	2920	{
2921		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2921	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2922	2922
2923	2923	/* video extensions */
2924	2924	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, NULL, NULL);
r8962	r8963
2933	2933
2934	2934	static DRIVER_INIT( dingo )
2935	2935	{
2936		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2936	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2937	2937
2938	2938	/* video extensions */
2939	2939	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, NULL, NULL);
r8962	r8963
2948	2948
2949	2949	static DRIVER_INIT( dingoe )
2950	2950	{
2951		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2952		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	2951	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2952	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
2953	2953
2954	2954	/* video extensions */
2955	2955	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
r8962	r8963
2970	2970
2971	2971	static DRIVER_INIT( skybase )
2972	2972	{
2973		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2973	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2974	2974
2975	2975	/* video extensions */
2976	2976	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, pisces_extend_tile_info, pisces_extend_sprite_info);
r8962	r8963
3014	3014
3015	3015	static DRIVER_INIT( kingball )
3016	3016	{
3017		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3017	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3018	3018
3019	3019	/* video extensions */
3020	3020	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, NULL, NULL);
r8962	r8963
3031	3031
3032	3032	static DRIVER_INIT( scorpnmc )
3033	3033	{
3034		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3034	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3035	3035
3036	3036	/* video extensions */
3037	3037	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
r8962	r8963
3052	3052
3053	3053	static DRIVER_INIT( thepitm )
3054	3054	{
3055		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3055	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3056	3056
3057	3057	/* video extensions */
3058	3058	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
r8962	r8963
3076	3076
3077	3077	static DRIVER_INIT( theend )
3078	3078	{
3079		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3079	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3080	3080
3081	3081	/* video extensions */
3082	3082	common_init(machine, theend_draw_bullet, galaxian_draw_background, NULL, NULL);
r8962	r8963
3095	3095
3096	3096	static DRIVER_INIT( explorer )
3097	3097	{
3098		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3098	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3099	3099
3100	3100	/* video extensions */
3101	3101	common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
r8962	r8963
3128	3128
3129	3129	static DRIVER_INIT( atlantis )
3130	3130	{
3131		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3131	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3132	3132
3133	3133	/* video extensions */
3134	3134	common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
r8962	r8963
3170	3170
3171	3171	static DRIVER_INIT( froggrmc )
3172	3172	{
3173		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3173	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3174	3174
3175	3175	/* video extensions */
3176	3176	common_init(machine, NULL, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info);
r8962	r8963
3215	3215
3216	3216	static DRIVER_INIT( scorpion )
3217	3217	{
3218		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	3218	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
3219	3219
3220	3220	common_init(machine, scramble_draw_bullet, scramble_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
3221	3221

src/mame/drivers/bbusters.c

r8962	r8963
202	202	#include "cpu/m68000/m68000.h"
203	203	#include "sound/2608intf.h"
204	204	#include "sound/2610intf.h"
	205	#include "includes/bbusters.h"
205	206
206	207
207		VIDEO_START( bbuster );
208		VIDEO_START( mechatt );
209		VIDEO_UPDATE( bbuster );
210		VIDEO_UPDATE( mechatt );
211
212		static UINT16 *bbusters_ram, *eprom_data;
213		extern UINT16 *bbusters_pf1_data,*bbusters_pf2_data,*bbusters_pf1_scroll_data,*bbusters_pf2_scroll_data;
214
215		WRITE16_HANDLER( bbusters_pf1_w );
216		WRITE16_HANDLER( bbusters_pf2_w );
217		WRITE16_HANDLER( bbusters_video_w );
218
219	208	/******************************************************************************/
220	209
221	210
r8962	r8963
247	236
248	237	/******************************************************************************/
249	238
250		static int sound_status;
251
252	239	static READ16_HANDLER( sound_status_r )
253	240	{
254		return sound_status;
	241	bbusters_state *state = space->machine->driver_data<bbusters_state>();
	242
	243	return state->sound_status;
255	244	}
256	245
257	246	static WRITE8_HANDLER( sound_status_w )
258	247	{
259		sound_status = data;
	248	bbusters_state *state = space->machine->driver_data<bbusters_state>();
260	249
	250	state->sound_status = data;
261	251	}
262	252
263	253	static WRITE16_HANDLER( sound_cpu_w )
264	254	{
265
266	255	if (ACCESSING_BITS_0_7)
267	256	{
268
269
270	257	soundlatch_w(space, 0, data&0xff);
271	258	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
272	259	}
273
274	260	}
275	261
276	262	/* Eprom is byte wide, top half of word _must_ be 0xff */
277	263	static READ16_HANDLER( eprom_r )
278	264	{
279		return (eprom_data[offset]&0xff) | 0xff00;
	265	bbusters_state *state = space->machine->driver_data<bbusters_state>();
	266
	267	return (state->eprom_data[offset]&0xff) | 0xff00;
280	268	}
281	269
282		static int gun_select;
283
284	270	static READ16_HANDLER( control_3_r )
285	271	{
	272	bbusters_state *state = space->machine->driver_data<bbusters_state>();
286	273	static const char *const port[] = { "GUNX1", "GUNY1", "GUNX2", "GUNY2", "GUNX3", "GUNY3" };
287	274
288		UINT16 retdata = input_port_read(space->machine, port[gun_select]);
	275	UINT16 retdata = input_port_read(space->machine, port[state->gun_select]);
289	276
290	277	retdata >>=1; // by lowering the precision of the gun reading hardware the game seems to work better
291	278
r8962	r8963
294	281
295	282	static WRITE16_HANDLER( gun_select_w )
296	283	{
	284	bbusters_state *state = space->machine->driver_data<bbusters_state>();
	285
297	286	logerror("%08x: gun r\n",cpu_get_pc(space->cpu));
298	287
299	288	cpu_set_input_line(space->cpu, 2, HOLD_LINE);
300	289
301		gun_select = data & 0xff;
302
	290	state->gun_select = data & 0xff;
303	291	}
304	292
305	293	static WRITE16_HANDLER( two_gun_output_w )
306	294	{
307	295	output_set_value("Player1_Gun_Recoil",(data & 0x01));
308	296	output_set_value("Player2_Gun_Recoil",(data & 0x02)>>1);
309
310
311	297	}
312	298
313	299	static WRITE16_HANDLER( three_gun_output_w )
r8962	r8963
315	301	output_set_value("Player1_Gun_Recoil",(data & 0x01));
316	302	output_set_value("Player2_Gun_Recoil",(data & 0x02)>>1);
317	303	output_set_value("Player3_Gun_Recoil",(data & 0x04)>>2);
318
319
320	304	}
321	305
322	306	static READ16_HANDLER( kludge_r )
323	307	{
324	308	// might latch the gun value?
325	309	return 0x0000;
326
327	310	}
328	311
329	312	static READ16_HANDLER( mechatt_gun_r )
r8962	r8963
345	328
346	329	static ADDRESS_MAP_START( bbusters_map, ADDRESS_SPACE_PROGRAM, 16 )
347	330	AM_RANGE(0x000000, 0x07ffff) AM_ROM
348		AM_RANGE(0x080000, 0x08ffff) AM_RAM AM_BASE(&bbusters_ram)
349		AM_RANGE(0x090000, 0x090fff) AM_RAM_WRITE(bbusters_video_w) AM_BASE_GENERIC(videoram)
	331	AM_RANGE(0x080000, 0x08ffff) AM_RAM AM_BASE_MEMBER(bbusters_state, ram)
	332	AM_RANGE(0x090000, 0x090fff) AM_RAM_WRITE(bbusters_video_w) AM_BASE_MEMBER(bbusters_state, videoram)
350	333	AM_RANGE(0x0a0000, 0x0a0fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
351	334	AM_RANGE(0x0a1000, 0x0a7fff) AM_RAM      /* service mode */
352	335	AM_RANGE(0x0a8000, 0x0a8fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram2)
353	336	AM_RANGE(0x0a9000, 0x0affff) AM_RAM      /* service mode */
354		AM_RANGE(0x0b0000, 0x0b1fff) AM_RAM_WRITE(bbusters_pf1_w) AM_BASE(&bbusters_pf1_data)
355		AM_RANGE(0x0b2000, 0x0b3fff) AM_RAM_WRITE(bbusters_pf2_w) AM_BASE(&bbusters_pf2_data)
	337	AM_RANGE(0x0b0000, 0x0b1fff) AM_RAM_WRITE(bbusters_pf1_w) AM_BASE_MEMBER(bbusters_state, pf1_data)
	338	AM_RANGE(0x0b2000, 0x0b3fff) AM_RAM_WRITE(bbusters_pf2_w) AM_BASE_MEMBER(bbusters_state, pf2_data)
356	339	AM_RANGE(0x0b4000, 0x0b5fff) AM_RAM      /* service mode */
357		AM_RANGE(0x0b8000, 0x0b8003) AM_WRITEONLY AM_BASE(&bbusters_pf1_scroll_data)
358		AM_RANGE(0x0b8008, 0x0b800b) AM_WRITEONLY AM_BASE(&bbusters_pf2_scroll_data)
	340	AM_RANGE(0x0b8000, 0x0b8003) AM_WRITEONLY AM_BASE_MEMBER(bbusters_state, pf1_scroll_data)
	341	AM_RANGE(0x0b8008, 0x0b800b) AM_WRITEONLY AM_BASE_MEMBER(bbusters_state, pf2_scroll_data)
359	342	AM_RANGE(0x0d0000, 0x0d0fff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE_GENERIC(paletteram)
360	343	AM_RANGE(0x0e0000, 0x0e0001) AM_READ_PORT("COINS")   /* Coins */
361	344	AM_RANGE(0x0e0002, 0x0e0003) AM_READ_PORT("IN0")   /* Player 1 & 2 */
r8962	r8963
368	351	/* AM_RANGE(0x0f0008, 0x0f0009) AM_WRITENOP */
369	352	AM_RANGE(0x0f0008, 0x0f0009) AM_WRITE(three_gun_output_w)
370	353	AM_RANGE(0x0f0018, 0x0f0019) AM_WRITE(sound_cpu_w)
371		AM_RANGE(0x0f8000, 0x0f80ff) AM_READ(eprom_r) AM_WRITEONLY AM_BASE(&eprom_data) /* Eeprom */
	354	AM_RANGE(0x0f8000, 0x0f80ff) AM_READ(eprom_r) AM_WRITEONLY AM_BASE_MEMBER(bbusters_state, eprom_data) /* Eeprom */
372	355	ADDRESS_MAP_END
373	356
374	357	/*******************************************************************************/
375	358
376	359	static ADDRESS_MAP_START( mechatt_map, ADDRESS_SPACE_PROGRAM, 16 )
377	360	AM_RANGE(0x000000, 0x06ffff) AM_ROM
378		AM_RANGE(0x070000, 0x07ffff) AM_RAM AM_BASE(&bbusters_ram)
379		AM_RANGE(0x090000, 0x090fff) AM_RAM_WRITE(bbusters_video_w) AM_BASE_GENERIC(videoram)
	361	AM_RANGE(0x070000, 0x07ffff) AM_RAM AM_BASE_MEMBER(bbusters_state, ram)
	362	AM_RANGE(0x090000, 0x090fff) AM_RAM_WRITE(bbusters_video_w) AM_BASE_MEMBER(bbusters_state, videoram)
380	363	AM_RANGE(0x0a0000, 0x0a0fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
381	364	AM_RANGE(0x0a1000, 0x0a7fff) AM_WRITENOP
382		AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(bbusters_pf1_w) AM_BASE(&bbusters_pf1_data)
383		AM_RANGE(0x0b8000, 0x0b8003) AM_WRITEONLY AM_BASE(&bbusters_pf1_scroll_data)
384		AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM_WRITE(bbusters_pf2_w) AM_BASE(&bbusters_pf2_data)
385		AM_RANGE(0x0c8000, 0x0c8003) AM_WRITEONLY AM_BASE(&bbusters_pf2_scroll_data)
	365	AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(bbusters_pf1_w) AM_BASE_MEMBER(bbusters_state, pf1_data)
	366	AM_RANGE(0x0b8000, 0x0b8003) AM_WRITEONLY AM_BASE_MEMBER(bbusters_state, pf1_scroll_data)
	367	AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM_WRITE(bbusters_pf2_w) AM_BASE_MEMBER(bbusters_state, pf2_data)
	368	AM_RANGE(0x0c8000, 0x0c8003) AM_WRITEONLY AM_BASE_MEMBER(bbusters_state, pf2_scroll_data)
386	369	AM_RANGE(0x0d0000, 0x0d07ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE_GENERIC(paletteram)
387	370	AM_RANGE(0x0e0000, 0x0e0001) AM_READ_PORT("IN0")
388	371	AM_RANGE(0x0e0002, 0x0e0003) AM_READ_PORT("DSW1")
r8962	r8963
681	664	/******************************************************************************/
682	665
683	666	// default eeprom with reasonable calibration for MAME
684		static const unsigned char bbusters_default_eeprom[128] = {
	667	static const unsigned char bbusters_default_eeprom[128] =
	668	{
685	669	/*y*/                   /*y*/
686	670	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x74, 0x00, 0x00, 0x00, 0xEE, 0x00,
687	671	0x00, 0x00, 0x00, 0x00,   0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0xFE, 0x00,
r8962	r8963
703	687
704	688	static NVRAM_HANDLER( bbusters )
705	689	{
706		if( read_or_write ) {
707		mame_fwrite (file, eprom_data, 0x80);
	690	bbusters_state *state = machine->driver_data<bbusters_state>();
	691
	692	if( read_or_write )
	693	{
	694	mame_fwrite (file, state->eprom_data, 0x80);
708	695	}
709		else {
	696	else
	697	{
710	698	if (file)
711		mame_fread (file, eprom_data, 0x80);
	699	mame_fread (file, state->eprom_data, 0x80);
712	700	else
713		memcpy(eprom_data, bbusters_default_eeprom, 0x80);
	701	memcpy(state->eprom_data, bbusters_default_eeprom, 0x80);
714	702	}
715	703	}
716	704
717	705	static VIDEO_EOF( bbuster )
718	706	{
719		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	707	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
720	708
721	709	buffer_spriteram16_w(space,0,0,0xffff);
722	710	buffer_spriteram16_2_w(space,0,0,0xffff);
r8962	r8963
724	712
725	713	static VIDEO_EOF( mechatt )
726	714	{
727		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	715	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
728	716	buffer_spriteram16_w(space,0,0,0xffff);
729	717	}
730	718
731	719	static MACHINE_DRIVER_START( bbusters )
732	720
	721	MDRV_DRIVER_DATA( bbusters_state )
	722
733	723	/* basic machine hardware */
734	724	MDRV_CPU_ADD("maincpu", M68000, 12000000)
735	725	MDRV_CPU_PROGRAM_MAP(bbusters_map)
r8962	r8963
769	759
770	760	static MACHINE_DRIVER_START( mechatt )
771	761
	762	MDRV_DRIVER_DATA( bbusters_state )
	763
772	764	/* basic machine hardware */
773	765	MDRV_CPU_ADD("maincpu", M68000, 12000000)
774	766	MDRV_CPU_PROGRAM_MAP(mechatt_map)

src/mame/drivers/hyprduel.c

r8962	r8963
277	277	return ROM[offs];
278	278	}
279	279
280		INLINE void blt_write( const address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
	280	INLINE void blt_write( address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
281	281	{
282	282	switch( tmap )
283	283	{

src/mame/drivers/flstory.c

r8962	r8963
126	126	static CUSTOM_INPUT( victnine_mcu_status_bit01_r )
127	127	{
128	128	flstory_state *state = field->port->machine->driver_data<flstory_state>();
129		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	129	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
130	130
131	131	return (victnine_mcu_status_r(space, 0) & 3);
132	132	}

src/mame/drivers/calomega.c

r8962	r8963
1	1	/**********************************************************************************
2	2
3		+-------------------------------------+
4		|                                     |
5		| CAL OMEGA - SYSTEMS 903/904/905/906 |
6		|                                     |
7		|      Driver by Roberto Fresca.      |
8		|                                     |
9		+-------------------------------------+
	3	.----------------------------------------.
	4	|                                        |
	5	| CAL OMEGA - SYSTEMS 903/904/905/906III |
	6	|                                        |
	7	|        Driver by Roberto Fresca.       |
	8	|                                        |
	9	'----------------------------------------'
10	10
11	11
12	12	--- Technical Notes ---
13	13
14		Name:    System 903, System 904, System 905 & System 906.
	14	Name:    System 903, System 904, System 905 & System 906 III.
15	15	Company: Cal Omega / Omega Products / Casino Electronics Inc.
16	16	Year:    1981-1989
17	17
r8962	r8963
19	19	***********************************************************************************
20	20
21	21
22		Basic hardware for all systems:
23		-------------------------------
	22	Basic hardware for systems 903/904/905:
	23	---------------------------------------
24	24
25	25	CPU =  1x SY6502 @ 625 kHz.  ; M6502 compatible.
26	26	SND =  1x AY8912 @ 1.25 MHz. ; AY-3-8910 compatible.
r8962	r8963
73	73
74	74
75	75
	76	System 906 III:
	77	---------------
	78
	79	PCB silkscreened "CEI 906 III GAMEBOARD" "ASSY 4029063 REV"
	80
	81	CPU:   1x Rockwell R65C02P1 CPU. (U49)
	82	Video: 1x Motorola MC6845P CRTC. (U47)
	83	I/O:   2x Rockwell R65C24P2 PIAT. (U46, U48)
	84	1x Motorola MC6850P ACIA. (U44)
	85
	86	Sound: 1x Microchip AY-3-8912. (U45)
	87	1x LM380N (amplifier). (U34)
	88
	89	RAM: 1x NEC D4364C-15L. (U50)
	90
	91	PRG ROMs: 5x ST M2764AF1. (U28/EPR1, U29/EPR2, U30/EPR3, U31/EPR4, U32/EPR5)
	92	GFX ROMs: 3x ST M2764AF1. (U4/CG2C, U5/CG2B, U6/CG2A)
	93
	94	Clock: 1x 10.000 MHz Xtal. (Y1)
	95
	96	2x 8 DIP switches banks. (SW1, SW2)
	97	1x Battery. (BT1)
	98	3x 1K Pots (video). (B, G, R)
	99	1x 1K Pot (audio). (V)
	100	2x 2x28 pins edge connectors.
	101
	102
76	103	***********************************************************************************
77	104
78	105
r8962	r8963
101	128	***********************************************************************************
102	129
103	130
104		++++ System 903-906 official list of games (not complete) ++++
	131	++++ System 903/904/906III official list of games (not complete) ++++
105	132
106	133	-----+--------------------------+--------+---------+----------+---------+----------+---------+---------------+------+------+-------
107	134	VER |  NAME                    | SYSTEM | PROGRAM | CHAR GEN | CG P/N  | CLR PROM | CP P/N  | GAME TYPE     | DUMP | STAT | ADDED
108	135	-----+--------------------------+--------+---------+----------+---------+----------+---------+---------------+------+------+-------
109		*  7.4 | Gaming Poker (w. export) |  903   | AUG/81  | PKCG     | 6300010 | POKCLR   | 6600020 | Gaming        | Yes  | OK   | Yes
	136	*  7.4 | Gaming Poker (w. export) |  903   | AUG/81  | PKCG     | 6300010 | unknown  | 6600020 | Gaming        | Yes  | OK   | Yes
110	137	7.6 | Poker                    |  903   | AUG/81  | PKCG     | 6300010 | POKCLR   | 6600020 | Amusement     | Yes  | OK   | Yes
111	138	*  7.9 | Arcade Poker             |  903   | AUG/81  | PKCG     | 6300010 | POKCLR   | 6600020 | Amusement     | Yes  | BD   | Yes
112		*  8.0 | Arcade Black Jack        |  903   | SEP/81  | CPKCG    | 6300010 | POKCLR   | 6600020 | Amusement?    | Yes  | BD   | Yes
	139	*  8.0 | Arcade Black Jack        |  903   | SEP/81  | CPKCG    | 6300010 | POKCLR   | 6600020 | Amusement     | Yes  | BD   | Yes
113	140	*  9.4 | Keno                     |  903   | DEC/81  | KCG      | 6300060 | POKCLR   | 6600020 | Amusement     | Yes  | OK   | Yes
114	141	* 10.7 | Big Game                 |  903   | MAR/82  | LOTCG    | unknown | BCLR     | unknown | Amusement?    | Yes  | OK   | Yes
115	142	* 11.3 | Black Jack               |  903   |         | CPKCG?   | 6300010 | POKCLR   | 6600020 | Amusement?    | No   |      | No
r8962	r8963
179	206	* 23.6 | Hotline                  |  905   | OCT/84  | HLCG     | 6300160 | HLCLR    | 6600110 | Amusement     | Yes  | OK   | Yes
180	207	23.7 | AWP Blackjack            |   ?    |         | POKER    | 6300010 | POKCLR   | 6600020 | Gaming        | No   |      | No
181	208	23.9 | G.Draw Poker (discard)   |  904   | JAN/85  | POKCG    | 6300010 | POKCLR   | 6600020 | Nevada Gaming | Yes  | OK   | Yes
182		24.0 | Poker (hold)             |  ?    |         | POKCG    | 6300010 | POKCLR   | 6600020 | Nevada Gaming | No  |      | No
	209	24.0 | Gaming Draw Poker (hold) |  904   | MAY/85  | POKCG    | 6300010 | POKCLR   | 6600020 | Nevada Gaming | Yes  | OK   | Yes
183	210	24.2 | Export Poker             |   ?    |         | GPKCG    | 6300010 | POKCLR   | 6600020 | Gaming        | No   |      | No
184	211	24.3 | Gaming Blackjack         |   ?    |         | GPKCG    | 6300010 | POKCLR   | 6600020 | Nevada Gaming | No   |      | No
185	212	24.5 | Wild Double-Up           |   ?    |         | JKPKCG   | 6300100 | WLDCLR   | 6600010 | Amusement     | No   |      | No
r8962	r8963
228	255	46.0x| Gaming Poker             |   ?    |         | GPKCG    | 6300010 | POKCLR   | 6600020 | Nevada Gaming | No   |      | No
229	256	47.0x| 4-Card Indian Bingo      |   ?    |         | FCB7CG   | 6300150 | FCB7CLR  | 6600100 | Amer-Indian   | No   |      | No
230	257	48.0x| Keno                     |   ?    |         | KJCG     | 6300060 | POKCLR   | 6600020 | Montana       | No   |      | No
231		51.0x| Poker (906-III)          |  906   |         | GP2CG    | unknown | WILD     | unknown | Nevada Gaming | No  |      | No
	258	51.08| Poker (906-III)          |  906   |         | GP2CG    | unknown | WILD     | unknown | Nevada Gaming | Yes  | OK   | Yes
232	259	|                          |        |         |          |         |          |         |               |      |      |
233	260	* 903d | System 903 Diag.PROM     |  903   | unknown | any      | unknown | any      | unknown | Testing H/W   | Yes  | OK   | Yes
234	261	* 905d | System 905 Diag.PROM     |  905   | unknown | any      | unknown | any      | unknown | Testing H/W   | Yes  | OK   | Yes
r8962	r8963
365	392	The whole map is mirrored to $8000-$FFFF.
366	393
367	394
	395	--- System 906 III ---
368	396
369		*** MC6545 Initialization ***
	397	$0000 - $07FF   NVRAM           ; All registers and settings.
	398	$2C08 - $2C08   AY-8912         ; Read/Control.
	399	$2C09 - $2C09   AY-8912         ; Write.
	400	$280C - $280F   PIAT0           ; I/O unknown.
	401	$2824 - $2827   PIAT1           ; I/O unknown.
	402	$2C04 - $2C04   CRTC6845        ; MC6845 adressing.
	403	$2C05 - $2C05   CRTC6845        ; MC6845 Read/Write.
370	404
	405	$2000 - $23FF   VideoRAM
	406	$2400 - $27FF   ColorRAM
	407
	408	$6000 - $FFFF   ROM space.      ; System 906.
	409
	410	No mirrors... Using the whole CPU addressing.
	411
	412
	413
	414	*** MC6545 Initialization (60Hz) ***
	415
371	416	----------------------------------------------------------------------------------------------------------------------
372	417	register:  R00   R01   R02   R03   R04   R05   R06   R07   R08   R09   R10   R11   R12   R13   R14   R15   R16   R17
373	418	----------------------------------------------------------------------------------------------------------------------
374	419	value:     0x27  0x20  0x23  0x03  0x1F  0x04  0x1F  0x1F  0x00  0x07  0x00  0x00  0x00  0x00  0x00  0x00  0x00  0x00.
375	420
376	421
	422	*** MC6545 conditional 50Hz change for elgrande if 0x8c4 (PIA0) has bit7 deactivated ***
377	423
378		*** MC6545 conditional change for elgrande if 0x8c4 (PIA0) has bit7 activated ***
379
380	424	---------------------------------------------------------
381	425	register:  R00   R01   R02   R03   R04   R05   R06   R07
382	426	---------------------------------------------------------
r8962	r8963
387	431	***********************************************************************************
388	432
389	433
390		Dumper notes (old)
	434	DRIVER UPDATES
	435	--------------
391	436
392	437
393		-- Gaming Draw Poker --------------------------------------------------------
	438	[2010-08-20]
394	439
395		Program roms are roms 23*.*, on the board, there is a number near each roms
396		looks to be the address of the rom :
	440	- Added Game 24.0 (Gaming Draw Poker, hold). The game is playable.
	441	- Added missing 50/60Hz output frequency selector to systems 903-905.
	442	However, I dunno how it looks physically (switch/jumper/bridge?)
	443	- Injected missing start and NMI vectors to comg080 (Arcade Black Jack),
	444	from an exhaustive program ROM analysis / reverse engineering.
	445	The game now starts ok and is triggering proper NMI's.
	446	- Inputs from the scratch for comg080 (Arcade Black Jack).
	447	- Added workaround to pass the vector-check protection.
	448	- Reworked the lamps circuitry by system-basis.
	449	- Updated games list and technical notes.
	450	- Promoted comg080 (Arcade Black Jack) to working state.
397	451
398		23-91   1800
399		23-92   2000
400		23-93   2800
401		23-94   3000
402		23-9    3800
	452	- Added support for system 906III:
	453	- Accurate memory map, CRTC, and PIAs mapped.
	454	- Preliminary PIAs support (no multiplexion yet).
	455	- Added proper machine driver, with correct R65C02 CPU.
	456	- Documented the hardware specs.
	457	- Added Game 51.08 (CEI Video Poker, Jacks or Better),
	458	running in CEI 906III hardware. The game is not working.
	459	- Corrected docs about the 906III memory map.
	460	- Mapped the AY8912.
	461	- Added AY8912 proper interfase. Tied SW2 to AY8912 port.
	462	- PIA0, portA is polled constantly. Tied some debug handlers
	463	to understand how the input system works.
	464	- Added notes about the PIAs R/W.
403	465
404		Graphics are in roms CG*.*, there is no type indication on these rams, i hope
405		i read them correctly.
406	466
407		There is also 3 sets of switches on the board :
408
409		SW1     1       300     SW2     1       OPT1
410		2       600             2       OPT2
411		3       1200            3       OPT3
412		4       2400            4       OPT4
413		5       4800            5       OPT5
414		6       9600            6       DIS
415		7       -               7       +VPOL
416		8       -               8       +HPOL
417
418		SW3     no indications on the board
419
420		The sound rom is missing on the board :(
421
422
423		-- El Grande 5 Card Draw ----------------------------------------------------
424
425		ROM text showed poker stuff and "TUNI" "1982"
426
427		.u6    2716
428		.u7    2516
429		.u8    2516
430		.u9    2516
431		.u67   2516
432		.u68   2516
433		.u69   2716
434		.u70   2716
435		.u28   82s129
436
437		6502
438		HD46505
439		AY-3-8912
440		MC6821P x2
441		TC5501  x2
442		10MHz Crystal
443
444		empty socket at u5
445
446
447		***********************************************************************************
448
449
450		DRIVER UPDATES
451		--------------
452
453
454	467	[2009-09-03]
455	468
456	469	- Added Game 7.4 (Gaming Poker, W.Export).
r8962	r8963
617	630	- Improve 903/905 inputs.
618	631	- Interrupts for System 903/904 UART.
619	632	- Complete the PIAs connection.
	633	- 906III: PIAs & AY8912 ports, inputs, etc...
620	634	- Parent/clone relationship.
621	635	- Fix lamps.
622	636
r8962	r8963
652	666	VIDEO_UPDATE( calomega );
653	667
654	668
655		/****************************
656		*    Read/Write Handlers    *
657		****************************/
	669	/**************************************************
	670	*               Read/Write Handlers               *
	671	**************************************************/
658	672
659	673	static WRITE_LINE_DEVICE_HANDLER( tx_rx_clk )
660	674	{
r8962	r8963
676	690	case 0x40: return input_port_read(device->machine, "IN0-2");
677	691	case 0x80: return input_port_read(device->machine, "IN0-3");
678	692	}
679		return 0xff;
	693
	694	return input_port_read(device->machine, "FRQ");   /* bit7 used for 50/60 Hz selector */
680	695	}
681	696
682	697	static WRITE8_DEVICE_HANDLER( s903_mux_w )
r8962	r8963
696	711	case 0x04: return input_port_read(device->machine, "IN0-2");
697	712	case 0x08: return input_port_read(device->machine, "IN0-3");
698	713	}
699		return 0xff;
	714
	715	return input_port_read(device->machine, "FRQ");   /* bit6 used for 50/60 Hz selector */
700	716	}
701	717
702	718	static WRITE8_DEVICE_HANDLER( s905_mux_w )
r8962	r8963
705	721	}
706	722
707	723
708		/**** Lamps debug ****
	724	/********* 906III PIAs debug *********/
709	725
	726	static READ8_DEVICE_HANDLER( pia0_ain_r )
	727	{
	728	/* Valid input port. Each polled value is stored at $0538 */
	729	logerror("PIA0: Port A in\n");
	730	return input_port_read(device->machine, "IN0");
	731	}
	732
	733	static READ8_DEVICE_HANDLER( pia0_bin_r )
	734	{
	735	logerror("PIA0: Port B in\n");
	736	return 0xff;
	737	}
	738
	739	static WRITE8_DEVICE_HANDLER( pia0_aout_w )
	740	{
	741	logerror("PIA0: Port A out: %02X\n", data);
	742	}
	743
	744	static WRITE8_DEVICE_HANDLER( pia0_bout_w )
	745	{
	746	logerror("PIA0: Port B out: %02X\n", data);
	747	}
	748
	749	static WRITE8_DEVICE_HANDLER( pia0_ca2_w )
	750	{
	751	/* Seems a kind of "heartbit" watchdog, switching 1's and 0's */
	752	logerror("PIA0: CA2: %02X\n", data);
	753	}
	754
	755
	756
	757	static READ8_DEVICE_HANDLER( pia1_ain_r )
	758	{
	759	logerror("PIA1: Port A in\n");
	760	return 0xff;
	761	}
	762
	763	static READ8_DEVICE_HANDLER( pia1_bin_r )
	764	{
	765	logerror("PIA1: Port B in\n");
	766	return 0xff;
	767	}
	768
	769	static WRITE8_DEVICE_HANDLER( pia1_aout_w )
	770	{
	771	logerror("PIA1: Port A out: %02X\n", data);
	772	}
	773
	774	static WRITE8_DEVICE_HANDLER( pia1_bout_w )
	775	{
	776	logerror("PIA1: Port B out: %02X\n", data);
	777	}
	778
	779
	780	static WRITE8_DEVICE_HANDLER( ay_aout_w )
	781	{
	782	logerror("AY8910: Port A out: %02X\n", data);
	783	}
	784
	785	static WRITE8_DEVICE_HANDLER( ay_bout_w )
	786	{
	787	logerror("AY8910: Port B out: %02X\n", data);
	788	}
	789
	790
	791	/********  Lamps debug  ********
	792
710	793	PIA0-B  PIA1-A
711	794
712	795	0xff    0x7f    = OFF
r8962	r8963
725	808	0xff    0x7b    = Take
726	809
727	810	*/
728		static WRITE8_DEVICE_HANDLER( lamps_a_w )
	811	static WRITE8_DEVICE_HANDLER( lamps_903a_w )
729	812	{
730		output_set_lamp_value(0, 1-((data) & 1));      // 0
731		output_set_lamp_value(1, 1-((data >> 1) & 1));   // 1
732		output_set_lamp_value(2, 1-((data >> 2) & 1));   // 2
733		output_set_lamp_value(3, 1-((data >> 3) & 1));   // 3
734		output_set_lamp_value(4, 1-((data >> 4) & 1));   // 4
735		output_set_lamp_value(5, 1-((data >> 5) & 1));   // 5
736		output_set_lamp_value(6, 1-((data >> 6) & 1));   // 6
737		output_set_lamp_value(7, 1-((data >> 7) & 1));   // 7
	813	/* First 5 bits of PIA0 port B */
	814	output_set_lamp_value(1, 1-((data) & 1));      /* L1 (Hold 1) */
	815	output_set_lamp_value(2, 1-((data >> 1) & 1));   /* L2 (Hold 2) */
	816	output_set_lamp_value(3, 1-((data >> 2) & 1));   /* L3 (Hold 3) */
	817	output_set_lamp_value(4, 1-((data >> 3) & 1));   /* L4 (Hold 4) */
	818	output_set_lamp_value(5, 1-((data >> 4) & 1));   /* L5 (Hold 5) */
738	819	}
739	820
740		static WRITE8_DEVICE_HANDLER( lamps_b_w )
	821	static WRITE8_DEVICE_HANDLER( lamps_903b_w )
741	822	{
742		output_set_lamp_value(8, 1-((data) & 1));      // 0
743		output_set_lamp_value(9, 1-((data >> 1) & 1));   // 1
744		output_set_lamp_value(10, 1-((data >> 2) & 1));   // 2
745		output_set_lamp_value(11, 1-((data >> 3) & 1));   // 3
746		output_set_lamp_value(12, 1-((data >> 4) & 1));   // 4
747		output_set_lamp_value(13, 1-((data >> 5) & 1));   // 5
748		output_set_lamp_value(14, 1-((data >> 6) & 1));   // 6
749		output_set_lamp_value(15, 1-((data >> 7) & 1));   // 7
	823	/* First 4 bits of PIA1 port A */
	824	output_set_lamp_value(6, 1-((data) & 1));      /* L6 (Cancel) */
	825	output_set_lamp_value(7, 1-((data >> 1) & 1));   /* L7 (Bet) */
	826	output_set_lamp_value(8, 1-((data >> 2) & 1));   /* L8 (Take) */
	827	output_set_lamp_value(9, 1-((data >> 3) & 1));   /* L9 (Door?) */
750	828	}
751	829
	830	static WRITE8_DEVICE_HANDLER( lamps_905_w )
	831	{
	832	/* Whole 8 bits of PIA0 port B */
	833	output_set_lamp_value(1, 1-((data) & 1));      /* L1 (Hold 1) */
	834	output_set_lamp_value(2, 1-((data >> 1) & 1));   /* L2 (Hold 2) */
	835	output_set_lamp_value(3, 1-((data >> 2) & 1));   /* L3 (Hold 3) */
	836	output_set_lamp_value(4, 1-((data >> 3) & 1));   /* L4 (Hold 4) */
	837	output_set_lamp_value(5, 1-((data >> 4) & 1));   /* L5 (Hold 5) */
	838	output_set_lamp_value(6, 1-((data >> 5) & 1));   /* L6 (unknown) */
	839	output_set_lamp_value(7, 1-((data >> 6) & 1));   /* L7 (unknown) */
	840	output_set_lamp_value(8, 1-((data >> 7) & 1));   /* L8 (unknown) */
	841	}
752	842
753		/*************************
754		* Memory map information *
755		*************************/
756	843
	844	/*************************************************
	845	*             Memory map information             *
	846	*************************************************/
	847
757	848	static ADDRESS_MAP_START( sys903_map, ADDRESS_SPACE_PROGRAM, 8 )
758	849	ADDRESS_MAP_GLOBAL_MASK(0x3fff)
759	850	AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
r8962	r8963
795	886	AM_RANGE(0x2800, 0xffff) AM_ROM
796	887	ADDRESS_MAP_END
797	888
	889	static ADDRESS_MAP_START( sys906_map, ADDRESS_SPACE_PROGRAM, 8 )
	890	AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
	891	AM_RANGE(0x280c, 0x280f) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w)
	892	AM_RANGE(0x2824, 0x2827) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w)
	893	AM_RANGE(0x2c04, 0x2c04) AM_DEVWRITE("crtc", mc6845_address_w)
	894	AM_RANGE(0x2c05, 0x2c05) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
	895	AM_RANGE(0x2c08, 0x2c09) AM_DEVREADWRITE("ay8912", ay8910_r, ay8910_address_data_w)
	896	AM_RANGE(0x2000, 0x23ff) AM_RAM_WRITE(calomega_videoram_w) AM_BASE(&calomega_videoram)
	897	AM_RANGE(0x2400, 0x27ff) AM_RAM_WRITE(calomega_colorram_w) AM_BASE(&calomega_colorram)
	898	AM_RANGE(0x6000, 0xffff) AM_ROM
	899	ADDRESS_MAP_END
798	900
799		/*************************
800		*      Input ports       *
801		*************************/
802	901
	902	/*************************************************
	903	*                  Input ports                   *
	904	*************************************************/
	905
803	906	static INPUT_PORTS_START( stand903 )
804	907	PORT_START("IN0-0")
805	908	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("0-1") PORT_CODE(KEYCODE_1)
r8962	r8963
903	1006	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:8")
904	1007	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
905	1008	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1009
	1010	PORT_START("FRQ")   /* settings (PIA0) */
	1011	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1012	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1013	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1014	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1015	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1016	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1017	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1018	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1019	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1020	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	1021	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1022	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1023	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	1024	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1025	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1026	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	1027	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1028	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1029	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	1030	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1031	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1032	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	1033	PORT_DIPSETTING(    0x80, "60Hz." )
	1034	PORT_DIPSETTING(    0x00, "50Hz." )
906	1035	INPUT_PORTS_END
907	1036
908	1037	static INPUT_PORTS_START( stand904 )
r8962	r8963
982	1111	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )   PORT_DIPLOCATION("SW1:8")
983	1112	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
984	1113	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1114
	1115	PORT_START("FRQ")   /* settings (PIA0) */
	1116	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1117	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1118	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1119	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1120	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1121	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1122	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1123	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1124	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1125	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	1126	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1127	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1128	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	1129	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1130	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1131	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	1132	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1133	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1134	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	1135	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1136	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1137	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	1138	PORT_DIPSETTING(    0x80, "60Hz." )
	1139	PORT_DIPSETTING(    0x00, "50Hz." )
985	1140	INPUT_PORTS_END
986	1141
987	1142	static INPUT_PORTS_START( stand905 )
r8962	r8963
1052	1207	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:8")
1053	1208	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1054	1209	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1210
	1211	PORT_START("FRQ")   /* settings (PIA0) */
	1212	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1213	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1214	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1215	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1216	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1217	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1218	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1219	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1220	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1221	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	1222	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1223	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1224	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	1225	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1226	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1227	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	1228	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1229	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1230	PORT_DIPNAME( 0x40, 0x40, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	1231	PORT_DIPSETTING(    0x40, "60Hz." )
	1232	PORT_DIPSETTING(    0x00, "50Hz." )
	1233	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	1234	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	1235	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1055	1236	INPUT_PORTS_END
1056	1237
1057		static INPUT_PORTS_START( gdrawpkr )
	1238	static INPUT_PORTS_START( gdrwpkrd )
1058	1239	PORT_START("IN0-0")
1059	1240	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)   /* credits */
1060	1241	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q)
r8962	r8963
1155	1336	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:8")
1156	1337	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1157	1338	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1339
	1340	PORT_START("FRQ")   /* settings (PIA0) */
	1341	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1342	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1343	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1344	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1345	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1346	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1347	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1348	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1349	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1350	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	1351	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1352	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1353	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	1354	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1355	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1356	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	1357	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1358	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1359	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	1360	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1361	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1362	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	1363	PORT_DIPSETTING(    0x80, "60Hz." )
	1364	PORT_DIPSETTING(    0x00, "50Hz." )
1158	1365	INPUT_PORTS_END
1159	1366
	1367	static INPUT_PORTS_START( gdrwpkrh )
	1368	PORT_START("IN0-0")
	1369	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)   /* credits */
	1370	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q)
	1371	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
	1372	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
	1373	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancel Holds")
	1374	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_STAND )
	1375	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* connected to SW2-5 */
	1376	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	1377
	1378	PORT_START("IN0-1")
	1379	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
	1380	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1381	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_NAME("Door Open")
	1382	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode")   /* in some games you need to open the door first */
	1383	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hand Pay") PORT_CODE(KEYCODE_W)
	1384	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Dispute") PORT_CODE(KEYCODE_0)   /* in some games you need to open the door first */
	1385	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* connected to SW2-5 */
	1386	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	1387
	1388	PORT_START("IN0-2")
	1389	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1")
	1390	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2")
	1391	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3")
	1392	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4")
	1393	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Hold 5")
	1394	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small")
	1395	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* connected to SW2-5 */
	1396	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	1397
	1398	PORT_START("IN0-3")
	1399	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1400	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BET )
	1401	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE )
	1402	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big")
	1403	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("WT.Switch") PORT_CODE(KEYCODE_8)
	1404	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1405	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* connected to SW2-5 */
	1406	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	1407
	1408	/*  SW1-5 should be wired to PIA0 portA, bit 6.
	1409	SW1-6 should be wired to H-POL.
	1410	SW1-7 should be wired to V-POL.
	1411	*/
	1412	PORT_START("SW1")   /* settings (PIA1), SW2 in schematics */
	1413	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* L6 */
	1414	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* L7 */
	1415	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* L8 */
	1416	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* L9 */
	1417	PORT_DIPNAME( 0x30, 0x20, "Maximum Credits")   PORT_DIPLOCATION("SW2:1,2")
	1418	PORT_DIPSETTING(    0x00, "100" )
	1419	PORT_DIPSETTING(    0x10, "400" )
	1420	PORT_DIPSETTING(    0x20, "800" )
	1421	PORT_DIPSETTING(    0x30, "1600" )
	1422	PORT_DIPNAME( 0xC0, 0x40, "Maximum Bet")      PORT_DIPLOCATION("SW2:3,4")
	1423	PORT_DIPSETTING(    0x00, "5" )
	1424	PORT_DIPSETTING(    0x40, "10" )
	1425	PORT_DIPSETTING(    0x80, "40" )
	1426	PORT_DIPSETTING(    0xC0, "80" )
	1427
	1428	PORT_START("SW2")   /* baud (serial 6850-4024), SW1 in schematics */
	1429	PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" )         PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
	1430	PORT_DIPSETTING(    0x01, "300" )
	1431	PORT_DIPSETTING(    0x02, "600" )
	1432	PORT_DIPSETTING(    0x04, "1200" )
	1433	PORT_DIPSETTING(    0x08, "2400" )
	1434	PORT_DIPSETTING(    0x10, "4800" )
	1435	PORT_DIPSETTING(    0x20, "9600" )
	1436	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )   PORT_DIPLOCATION("SW1:7")
	1437	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1438	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1439	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )   PORT_DIPLOCATION("SW1:8")
	1440	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	1441	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1442
	1443	PORT_START("SW3")   /* unknown (ay8912), SW3 in schematics */
	1444	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:1")
	1445	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1446	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1447	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:2")
	1448	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1449	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1450	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:3")
	1451	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1452	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1453	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:4")
	1454	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1455	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1456	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:5")
	1457	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1458	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1459	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:6")
	1460	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1461	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1462	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:7")
	1463	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1464	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1465	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:8")
	1466	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	1467	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1468
	1469	PORT_START("FRQ")   /* settings (PIA0) */
	1470	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1471	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1472	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1473	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1474	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1475	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1476	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1477	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1478	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1479	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	1480	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1481	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1482	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	1483	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1484	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1485	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	1486	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1487	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1488	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	1489	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1490	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1491	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	1492	PORT_DIPSETTING(    0x80, "60Hz." )
	1493	PORT_DIPSETTING(    0x00, "50Hz." )
	1494	INPUT_PORTS_END
	1495
	1496	static INPUT_PORTS_START( arcadebj )
	1497	PORT_START("IN0-0")
	1498	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )   PORT_IMPULSE(2)   /* credits */
	1499	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1500	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1501	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1502	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1503	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1504	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* connected to SW2-5 */
	1505	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	1506
	1507	PORT_START("IN0-1")
	1508	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 )   PORT_IMPULSE(2)   /* credits */
	1509	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1510	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1511	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1512	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1513	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Door Open") PORT_CODE(KEYCODE_O)
	1514	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* connected to SW2-5 */
	1515	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	1516
	1517	PORT_START("IN0-2")
	1518	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Bet/Play")    PORT_CODE(KEYCODE_Z)
	1519	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Start")       PORT_CODE(KEYCODE_X)
	1520	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Double Down") PORT_CODE(KEYCODE_C)
	1521	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hit")         PORT_CODE(KEYCODE_V)
	1522	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Stand")       PORT_CODE(KEYCODE_B)
	1523	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1524	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* connected to SW2-5 */
	1525	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	1526
	1527	PORT_START("IN0-3")
	1528	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service/Clear") PORT_CODE(KEYCODE_0)
	1529	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1530	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1531	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1532	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1533	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1534	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* connected to SW2-5 */
	1535	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	1536
	1537	/*  SW1-5 should be wired to PIA0 portA, bit 6.
	1538	SW1-6 should be wired to H-POL.
	1539	SW1-7 should be wired to V-POL.
	1540	*/
	1541	PORT_START("SW1")   /* settings (PIA1), SW2 in schematics */
	1542	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* L6 */
	1543	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* L7 */
	1544	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* L8 */
	1545	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* L9 */
	1546	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:1")
	1547	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1548	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1549	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:2")
	1550	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1551	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1552	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:3")
	1553	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1554	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1555	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:4")
	1556	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	1557	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1558
	1559	PORT_START("SW2")   /* baud (serial 6850-4024), SW1 in schematics */
	1560	PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" )         PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
	1561	PORT_DIPSETTING(    0x01, "300" )
	1562	PORT_DIPSETTING(    0x02, "600" )
	1563	PORT_DIPSETTING(    0x04, "1200" )
	1564	PORT_DIPSETTING(    0x08, "2400" )
	1565	PORT_DIPSETTING(    0x10, "4800" )
	1566	PORT_DIPSETTING(    0x20, "9600" )
	1567	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )   PORT_DIPLOCATION("SW1:7")
	1568	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1569	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1570	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )   PORT_DIPLOCATION("SW1:8")
	1571	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	1572	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1573
	1574	PORT_START("SW3")   /* unknown (ay8912), SW3 in schematics */
	1575	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:1")
	1576	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1577	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1578	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:2")
	1579	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1580	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1581	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:3")
	1582	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1583	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1584	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:4")
	1585	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1586	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1587	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:5")
	1588	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1589	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1590	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:6")
	1591	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1592	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1593	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:7")
	1594	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1595	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1596	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:8")
	1597	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	1598	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1599
	1600	PORT_START("FRQ")   /* settings (PIA0) */
	1601	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1602	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1603	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1604	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1605	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1606	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1607	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1608	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1609	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1610	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	1611	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1612	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1613	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	1614	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1615	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1616	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	1617	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1618	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1619	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	1620	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1621	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1622	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	1623	PORT_DIPSETTING(    0x80, "60Hz." )
	1624	PORT_DIPSETTING(    0x00, "50Hz." )
	1625	INPUT_PORTS_END
	1626
1160	1627	static INPUT_PORTS_START( comg074 )
1161	1628	PORT_START("IN0-0")
1162	1629	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )   PORT_IMPULSE(2)   /* credits */
r8962	r8963
1259	1726	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:8")
1260	1727	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1261	1728	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1729
	1730	PORT_START("FRQ")   /* settings (PIA0) */
	1731	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1732	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1733	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1734	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1735	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1736	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1737	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1738	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1739	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1740	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	1741	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1742	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1743	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	1744	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1745	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1746	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	1747	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1748	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1749	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	1750	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1751	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1752	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	1753	PORT_DIPSETTING(    0x80, "60Hz." )
	1754	PORT_DIPSETTING(    0x00, "50Hz." )
1262	1755	INPUT_PORTS_END
1263	1756
1264	1757	static INPUT_PORTS_START( comg076 )
r8962	r8963
1362	1855	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:8")
1363	1856	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1364	1857	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1858
	1859	PORT_START("FRQ")   /* settings (PIA0) */
	1860	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1861	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1862	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1863	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1864	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1865	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1866	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1867	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1868	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1869	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	1870	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	1871	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1872	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	1873	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	1874	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1875	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	1876	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	1877	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1878	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	1879	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	1880	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1881	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	1882	PORT_DIPSETTING(    0x80, "60Hz." )
	1883	PORT_DIPSETTING(    0x00, "50Hz." )
1365	1884	INPUT_PORTS_END
1366	1885
1367	1886	static INPUT_PORTS_START( comg128 )
r8962	r8963
1466	1985	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW3:8")
1467	1986	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1468	1987	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1988
	1989	PORT_START("FRQ")   /* settings (PIA0) */
	1990	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	1991	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	1992	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1993	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	1994	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	1995	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1996	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	1997	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	1998	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	1999	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	2000	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	2001	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2002	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	2003	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	2004	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2005	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	2006	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	2007	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2008	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	2009	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	2010	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2011	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	2012	PORT_DIPSETTING(    0x80, "60Hz." )
	2013	PORT_DIPSETTING(    0x00, "50Hz." )
1469	2014	INPUT_PORTS_END
1470	2015
1471	2016	static INPUT_PORTS_START( elgrande )
r8962	r8963
1532	2077	PORT_DIPSETTING(    0x40, "10" )
1533	2078	PORT_DIPSETTING(    0x80, "20" )
1534	2079	PORT_DIPSETTING(    0xC0, "50" )
	2080
	2081	PORT_START("FRQ")   /* settings (PIA0) */
	2082	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	2083	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	2084	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2085	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	2086	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	2087	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2088	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	2089	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	2090	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2091	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	2092	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	2093	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2094	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	2095	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	2096	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2097	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	2098	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	2099	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2100	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	2101	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	2102	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2103	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	2104	PORT_DIPSETTING(    0x80, "60Hz." )
	2105	PORT_DIPSETTING(    0x00, "50Hz." )
1535	2106	INPUT_PORTS_END
1536	2107
1537	2108	static INPUT_PORTS_START( jjpoker )
r8962	r8963
1598	2169	PORT_DIPSETTING(    0x40, "10" )
1599	2170	PORT_DIPSETTING(    0x80, "20" )
1600	2171	PORT_DIPSETTING(    0xC0, "50" )
	2172
	2173	PORT_START("FRQ")   /* settings (PIA0) */
	2174	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	2175	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	2176	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2177	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	2178	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	2179	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2180	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	2181	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	2182	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2183	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	2184	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	2185	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2186	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	2187	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	2188	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2189	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	2190	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	2191	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2192	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	2193	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	2194	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2195	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	2196	PORT_DIPSETTING(    0x80, "60Hz." )
	2197	PORT_DIPSETTING(    0x00, "50Hz." )
1601	2198	INPUT_PORTS_END
1602	2199
1603	2200	static INPUT_PORTS_START( ssipkr )
r8962	r8963
1664	2261	PORT_DIPSETTING(    0x40, "10" )
1665	2262	PORT_DIPSETTING(    0x80, "20" )
1666	2263	PORT_DIPSETTING(    0xc0, "50" )
	2264
	2265	PORT_START("FRQ")   /* settings (PIA0) */
	2266	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
	2267	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	2268	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2269	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	2270	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	2271	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2272	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	2273	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	2274	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2275	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	2276	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	2277	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2278	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	2279	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	2280	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2281	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	2282	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	2283	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2284	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	2285	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	2286	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2287	PORT_DIPNAME( 0x80, 0x80, "Frequency" )         PORT_DIPLOCATION("FRQ:1")
	2288	PORT_DIPSETTING(    0x80, "60Hz." )
	2289	PORT_DIPSETTING(    0x00, "50Hz." )
1667	2290	INPUT_PORTS_END
1668	2291
	2292	static INPUT_PORTS_START( stand906 )
1669	2293
1670		/*************************
1671		*    Graphics Layouts    *
1672		*************************/
	2294	PORT_START("IN0")
	2295	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-1") PORT_CODE(KEYCODE_1)
	2296	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-2") PORT_CODE(KEYCODE_2)
	2297	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-3") PORT_CODE(KEYCODE_3)
	2298	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-4") PORT_CODE(KEYCODE_4)
	2299	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-5") PORT_CODE(KEYCODE_5)
	2300	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-6") PORT_CODE(KEYCODE_6)
	2301	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-7") PORT_CODE(KEYCODE_7)
	2302	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-8") PORT_CODE(KEYCODE_8)
1673	2303
	2304	PORT_START("SW2")   /* Tied to AY8912 port. Covered with tape except SW2-8 */
	2305	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:1")
	2306	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	2307	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2308	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:2")
	2309	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	2310	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2311	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:3")
	2312	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	2313	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2314	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:4")
	2315	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	2316	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2317	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:5")
	2318	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	2319	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2320	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:6")
	2321	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	2322	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2323	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:7")
	2324	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	2325	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2326	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )   PORT_DIPLOCATION("SW2:8")
	2327	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	2328	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	2329	INPUT_PORTS_END
	2330
	2331
	2332	/*************************************************
	2333	*                Graphics Layouts                *
	2334	*************************************************/
	2335
1674	2336	static const gfx_layout charlayout =
1675	2337	{
1676	2338	8, 8,
r8962	r8963
1694	2356	};
1695	2357
1696	2358
1697		/******************************
1698		* Graphics Decode Information *
1699		******************************/
	2359	/*************************************************
	2360	*          Graphics Decode Information           *
	2361	*************************************************/
1700	2362
1701	2363	static GFXDECODE_START( calomega )
1702	2364	GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 )
1703	2365	GFXDECODE_ENTRY( "gfx2", 0, tilelayout, (8 * 3) + 128, 16 )
1704	2366	GFXDECODE_END
1705	2367
	2368	static GFXDECODE_START( sys906 )
	2369	GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 16 )
	2370	GFXDECODE_ENTRY( "gfx1", 0x1000, tilelayout, (8 * 3) + 128, 16 )
	2371	GFXDECODE_END
1706	2372
1707		/***********************
1708		*    PIA Interfaces    *
1709		***********************/
1710	2373
	2374	/*************************************************
	2375	*                 PIA Interfaces                 *
	2376	*************************************************/
	2377
1711	2378	/********** System 903/904 PIA-0 (U54) wiring **********
1712	2379
1713	2380	Pin |  Description   | Wired to
r8962	r8963
1763	2430	DEVCB_NULL,      /* line CA2 in */
1764	2431	DEVCB_NULL,      /* line CB2 in */
1765	2432	DEVCB_NULL,      /* port A out */
1766		DEVCB_HANDLER(lamps_a_w),      /* port B out */
	2433	DEVCB_HANDLER(lamps_903a_w),      /* port B out */
1767	2434	DEVCB_NULL,      /* line CA2 out */
1768	2435	DEVCB_NULL,      /* port CB2 out */
1769	2436	DEVCB_NULL,      /* IRQA */
r8962	r8963
1819	2486	static const pia6821_interface sys903_pia1_intf =
1820	2487	{
1821	2488	DEVCB_INPUT_PORT("SW1"),      /* port A in */
1822		DEVCB_NULL,      /* port B in */
1823		DEVCB_NULL,      /* line CA1 in */
1824		DEVCB_NULL,      /* line CB1 in */
1825		DEVCB_NULL,      /* line CA2 in */
1826		DEVCB_NULL,      /* line CB2 in */
1827		DEVCB_HANDLER(lamps_b_w),      /* port A out */
	2489	DEVCB_NULL,                  /* port B in */
	2490	DEVCB_NULL,                  /* line CA1 in */
	2491	DEVCB_NULL,                  /* line CB1 in */
	2492	DEVCB_NULL,                  /* line CA2 in */
	2493	DEVCB_NULL,                  /* line CB2 in */
	2494	DEVCB_HANDLER(lamps_903b_w),   /* port A out */
1828	2495	DEVCB_HANDLER(s903_mux_w),      /* port B out */
1829		DEVCB_NULL,      /* line CA2 out */
1830		DEVCB_NULL,      /* port CB2 out */
1831		DEVCB_NULL,      /* IRQA */
1832		DEVCB_NULL      /* IRQB */
	2496	DEVCB_NULL,                  /* line CA2 out */
	2497	DEVCB_NULL,                  /* port CB2 out */
	2498	DEVCB_NULL,                  /* IRQA */
	2499	DEVCB_NULL                  /* IRQB */
1833	2500	};
1834	2501
1835	2502	/********** System 905 PIA-0 (U48) wiring **********
r8962	r8963
1880	2547	*/
1881	2548	static const pia6821_interface sys905_pia0_intf =
1882	2549	{
1883		DEVCB_HANDLER(s905_mux_port_r),      /* port A in */
1884		DEVCB_NULL,      /* port B in */
1885		DEVCB_NULL,      /* line CA1 in */
1886		DEVCB_NULL,      /* line CB1 in */
1887		DEVCB_NULL,      /* line CA2 in */
1888		DEVCB_NULL,      /* line CB2 in */
1889		DEVCB_NULL,      /* port A out */
1890		DEVCB_HANDLER(lamps_a_w),      /* port B out */
1891		DEVCB_NULL,      /* line CA2 out */
1892		DEVCB_NULL,      /* port CB2 out */
1893		DEVCB_NULL,      /* IRQA */
1894		DEVCB_NULL      /* IRQB */
	2550	DEVCB_HANDLER(s905_mux_port_r),   /* port A in */
	2551	DEVCB_NULL,                  /* port B in */
	2552	DEVCB_NULL,                  /* line CA1 in */
	2553	DEVCB_NULL,                  /* line CB1 in */
	2554	DEVCB_NULL,                  /* line CA2 in */
	2555	DEVCB_NULL,                  /* line CB2 in */
	2556	DEVCB_NULL,                  /* port A out */
	2557	DEVCB_HANDLER(lamps_905_w),      /* port B out */
	2558	DEVCB_NULL,                  /* line CA2 out */
	2559	DEVCB_NULL,                  /* port CB2 out */
	2560	DEVCB_NULL,                  /* IRQA */
	2561	DEVCB_NULL                  /* IRQB */
1895	2562	};
1896	2563
1897	2564	/********** Systems 905 PIA-1 (U63) wiring **********
r8962	r8963
1942	2609	*/
1943	2610	static const pia6821_interface sys905_pia1_intf =
1944	2611	{
1945		DEVCB_INPUT_PORT("SW1"),      /* port A in */
1946		DEVCB_NULL,      /* port B in */
1947		DEVCB_NULL,      /* line CA1 in */
1948		DEVCB_NULL,      /* line CB1 in */
1949		DEVCB_NULL,      /* line CA2 in */
1950		DEVCB_NULL,      /* line CB2 in */
1951		DEVCB_HANDLER(lamps_b_w),      /* port A out */
1952		DEVCB_HANDLER(s905_mux_w),      /* port B out */
1953		DEVCB_NULL,      /* line CA2 out */
1954		DEVCB_NULL,      /* port CB2 out */
1955		DEVCB_NULL,      /* IRQA */
1956		DEVCB_NULL      /* IRQB */
	2612	DEVCB_INPUT_PORT("SW1"),   /* port A in */
	2613	DEVCB_NULL,               /* port B in */
	2614	DEVCB_NULL,               /* line CA1 in */
	2615	DEVCB_NULL,               /* line CB1 in */
	2616	DEVCB_NULL,               /* line CA2 in */
	2617	DEVCB_NULL,               /* line CB2 in */
	2618	DEVCB_NULL,               /* port A out */
	2619	DEVCB_HANDLER(s905_mux_w),   /* port B out */
	2620	DEVCB_NULL,               /* line CA2 out */
	2621	DEVCB_NULL,               /* port CB2 out */
	2622	DEVCB_NULL,               /* IRQA */
	2623	DEVCB_NULL               /* IRQB */
1957	2624	};
1958	2625
1959	2626
1960		/***********************
1961		*    ACIA Interface    *
1962		***********************/
	2627	/********** System 906 PIA-0  **********/
	2628	static const pia6821_interface sys906_pia0_intf =
	2629	{
	2630	DEVCB_HANDLER(pia0_ain_r),      /* port A in */      /* Valid input port. Each polled value is stored at $0538 */
	2631	DEVCB_HANDLER(pia0_bin_r),      /* port B in */
	2632	DEVCB_NULL,                  /* line CA1 in */
	2633	DEVCB_NULL,                  /* line CB1 in */
	2634	DEVCB_NULL,                  /* line CA2 in */
	2635	DEVCB_NULL,                  /* line CB2 in */
	2636	DEVCB_HANDLER(pia0_aout_w),      /* port A out */
	2637	DEVCB_HANDLER(pia0_bout_w),      /* port B out */
	2638	DEVCB_HANDLER(pia0_ca2_w),      /* line CA2 out */   /* Seems a kind of "heartbit" watchdog, switching 1's and 0's */
	2639	DEVCB_NULL,                  /* port CB2 out */
	2640	DEVCB_NULL,                  /* IRQA */
	2641	DEVCB_NULL                  /* IRQB */
	2642	};
1963	2643
	2644	/********** System 906 PIA-1  **********/
	2645	static const pia6821_interface sys906_pia1_intf =
	2646	{
	2647	DEVCB_HANDLER(pia1_ain_r),      /* port A in */
	2648	DEVCB_HANDLER(pia1_bin_r),      /* port B in */
	2649	DEVCB_NULL,                  /* line CA1 in */
	2650	DEVCB_NULL,                  /* line CB1 in */
	2651	DEVCB_NULL,                  /* line CA2 in */
	2652	DEVCB_NULL,                  /* line CB2 in */
	2653	DEVCB_HANDLER(pia1_aout_w),      /* port A out */
	2654	DEVCB_HANDLER(pia1_bout_w),      /* port B out */
	2655	DEVCB_NULL,                  /* line CA2 out */
	2656	DEVCB_NULL,                  /* port CB2 out */
	2657	DEVCB_NULL,                  /* IRQA */
	2658	DEVCB_NULL                  /* IRQB */
	2659	};
	2660
	2661
	2662	/*************************************************
	2663	*                 ACIA Interface                 *
	2664	*************************************************/
	2665
1964	2666	static READ_LINE_DEVICE_HANDLER( acia_rx_r )
1965	2667	{
1966	2668	return rx_line;
r8962	r8963
1984	2686	};
1985	2687
1986	2688
1987		/*************************
1988		*    Sound Interfaces    *
1989		*************************/
	2689	/*************************************************
	2690	*                Sound Interfaces                *
	2691	*************************************************/
1990	2692
1991	2693	static const ay8910_interface sys903_ay8912_intf =
1992	2694	{
r8962	r8963
2008	2710	DEVCB_NULL
2009	2711	};
2010	2712
	2713	static const ay8910_interface sys906_ay8912_intf =
	2714	{
	2715	AY8910_LEGACY_OUTPUT,
	2716	AY8910_DEFAULT_LOADS,
	2717	DEVCB_INPUT_PORT("SW2"),   /* From PCB pic. Value is stored at $0539 */
	2718	DEVCB_NULL,
	2719	DEVCB_HANDLER(ay_aout_w),
	2720	DEVCB_HANDLER(ay_bout_w)
	2721	};
2011	2722
2012		/************************
2013		*    CRTC Interface    *
2014		************************/
2015	2723
	2724	/*************************************************
	2725	*                CRTC Interface                  *
	2726	*************************************************/
	2727
2016	2728	static const mc6845_interface mc6845_intf =
2017	2729	{
2018	2730	"screen",   /* screen we are acting on */
r8962	r8963
2028	2740	};
2029	2741
2030	2742
2031		/*************************
2032		*    Machine Drivers     *
2033		*************************/
	2743	/*************************************************
	2744	*                Machine Drivers                 *
	2745	*************************************************/
2034	2746
2035	2747	static MACHINE_DRIVER_START( sys903 )
2036	2748	/* basic machine hardware */
r8962	r8963
2070	2782	MDRV_ACIA6850_ADD("acia6850_0", acia6850_intf)
2071	2783	MACHINE_DRIVER_END
2072	2784
	2785
	2786	static MACHINE_DRIVER_START( s903mod )
	2787	/* basic machine hardware */
	2788	MDRV_IMPORT_FROM( sys903 )
	2789
	2790	MDRV_CPU_MODIFY("maincpu")
	2791	MDRV_CPU_PROGRAM_MAP(s903mod_map)
	2792
	2793	/* sound hardware */
	2794	MDRV_SOUND_MODIFY("ay8912")
	2795	MDRV_SOUND_CONFIG(sys905_ay8912_intf)
	2796	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
	2797
	2798	MDRV_DEVICE_REMOVE("acia6850_0")
	2799	MACHINE_DRIVER_END
	2800
	2801
2073	2802	static MACHINE_DRIVER_START( sys905 )
2074	2803	/* basic machine hardware */
2075	2804	MDRV_IMPORT_FROM( sys903 )
r8962	r8963
2088	2817	MDRV_DEVICE_REMOVE("acia6850_0")
2089	2818	MACHINE_DRIVER_END
2090	2819
2091		static MACHINE_DRIVER_START( s903mod )
	2820
	2821	static MACHINE_DRIVER_START( sys906 )
2092	2822	/* basic machine hardware */
2093	2823	MDRV_IMPORT_FROM( sys903 )
2094	2824
2095		MDRV_CPU_MODIFY("maincpu")
2096		MDRV_CPU_PROGRAM_MAP(s903mod_map)
	2825	MDRV_CPU_REPLACE("maincpu", M65C02, CPU_CLOCK)   /* guess */
	2826	MDRV_CPU_PROGRAM_MAP(sys906_map)
2097	2827
	2828	MDRV_PIA6821_MODIFY("pia0", sys906_pia0_intf)
	2829	MDRV_PIA6821_MODIFY("pia1", sys906_pia1_intf)
	2830
	2831	MDRV_GFXDECODE(sys906)
	2832
2098	2833	/* sound hardware */
2099	2834	MDRV_SOUND_MODIFY("ay8912")
2100		MDRV_SOUND_CONFIG(sys905_ay8912_intf)
	2835	MDRV_SOUND_CONFIG(sys906_ay8912_intf)
2101	2836	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
2102	2837
2103	2838	MDRV_DEVICE_REMOVE("acia6850_0")
2104	2839	MACHINE_DRIVER_END
2105	2840
2106	2841
2107		/*************************
2108		*        ROM Load        *
2109		*************************/
2110		/*
	2842	/*************************************************
	2843	*                    ROM Load                    *
	2844	**************************************************
	2845	*
	2846	* Notes:
	2847	*
	2848	*  jkrpkr, jkr2, jkrtwo: graphics are identical.
	2849	*  cpkcg, pkcg:          graphics are identical.
	2850	*
	2851	*************************************************/
2111	2852
2112		Notes:
2113
2114		jkrpkr, jkr2, jkrtwo: graphics are identical.
2115		cpkcg, pkcg:          graphics are identical.
2116
2117		*/
2118
2119	2853	ROM_START( comg074 )   /* Cal Omega v7.4 (Gaming Poker) */
2120	2854	ROM_REGION( 0x10000, "maincpu", 0 )
2121	2855	ROM_LOAD( "1800.u5",   0x1800, 0x0800, CRC(69759432) SHA1(d64646476b4f67088bf5996ffc272d2571e62c53) )   /* Seems to be from v6.5. Unused. */
r8962	r8963
2128	2862	ROM_LOAD( "poker_cg0.u67",   0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
2129	2863
2130	2864	ROM_REGION( 0x1800, "gfx2", 0 )
2131		ROM_LOAD( "poker_cgc.u70",   0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
2132		ROM_LOAD( "poker_cgb.u69",   0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
2133		ROM_LOAD( "poker_cga.u68",   0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
	2865	ROM_LOAD( "poker_cg2c.u70",   0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
	2866	ROM_LOAD( "poker_cg2b.u69",   0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
	2867	ROM_LOAD( "poker_cg2a.u68",   0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
2134	2868
2135	2869	ROM_REGION( 0x400, "proms", 0 )   /* from other set */
2136	2870	ROM_LOAD( "pokclr.u28",   0x0000, 0x0100, BAD_DUMP CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
r8962	r8963
2195	2929	ROM_LOAD( "08-02.u6",   0x2000, 0x0800, CRC(abf8c48e) SHA1(fea059af900fd6d17725ccf7a5ff2eb0af5c8e0a) )
2196	2930	ROM_LOAD( "08-03.u7",   0x2800, 0x0800, CRC(e9ccb5af) SHA1(68a45d839afba3c6eafb7c75e5660de3a6be4eb5) )
2197	2931	ROM_LOAD( "08-04.u8",   0x3000, 0x0800, CRC(325bdae8) SHA1(5a94c96ec3980361570da58fb407a1dba38064b8) )
2198		ROM_LOAD( "08-05.u9",   0x3800, 0x0800, BAD_DUMP CRC(71bd14d2) SHA1(00b3e2d965ac7ae1fc994b81246ad2c29ef4834c) ) /* bad dump */
	2932	ROM_LOAD( "08-05.u9",   0x3800, 0x0800, BAD_DUMP CRC(71bd14d2) SHA1(00b3e2d965ac7ae1fc994b81246ad2c29ef4834c) ) /* bad dump. 2nd half is blank */
2199	2933
2200	2934	ROM_REGION( 0x0800, "gfx1", 0 )
2201	2935	ROM_LOAD( "gpkcg0.u67",   0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
r8962	r8963
2790	3524	ROM_RELOAD(            0x0300, 0x0100 )
2791	3525	ROM_END
2792	3526
	3527	/*
	3528
	3529	Gaming Draw Poker.
	3530
	3531	Program roms are roms 23*.*, on the board, there is a number near each roms
	3532	looks to be the address of the rom :
	3533
	3534	23-91   1800
	3535	23-92   2000
	3536	23-93   2800
	3537	23-94   3000
	3538	23-9    3800
	3539
	3540	Graphics are in roms CG*.*, there is no type indication on these rams, i hope
	3541	i read them correctly.
	3542
	3543	There is also 3 sets of switches on the board :
	3544
	3545	SW1     1       300     SW2     1       OPT1
	3546	2       600             2       OPT2
	3547	3       1200            3       OPT3
	3548	4       2400            4       OPT4
	3549	5       4800            5       OPT5
	3550	6       9600            6       DIS
	3551	7       -               7       +VPOL
	3552	8       -               8       +HPOL
	3553
	3554	SW3     no indications on the board
	3555
	3556	The sound rom is missing on the board :(
	3557
	3558	*/
	3559
2793	3560	ROM_START( comg239 )   /* Cal Omega v23.9 (Gaming Draw Poker) */
2794	3561	ROM_REGION( 0x10000, "maincpu", 0 )
2795	3562	ROM_LOAD( "23-91.u5",   0x1800, 0x0800, CRC(b49035e2) SHA1(b94a0245ca64d15b1496d1b272ffc0ce80f85526) )
r8962	r8963
2813	3580	ROM_RELOAD(               0x0300, 0x0100 )
2814	3581	ROM_END
2815	3582
	3583	ROM_START( comg240 )   /* Cal Omega v24.0 (Gaming Draw Poker) */
	3584	ROM_REGION( 0x10000, "maincpu", 0 )
	3585	ROM_LOAD( "24-01.u5",      0x1800, 0x0800, CRC(445e4e1e) SHA1(11f1b2652fce0e507bde66296f57d689a8460df5) )
	3586	ROM_LOAD( "24-02.u6",      0x2000, 0x0800, CRC(53ef572d) SHA1(14c99f94a22d93de998f6418ea9dc3eab5119a82) )
	3587	ROM_LOAD( "24-03.u7",      0x2800, 0x0800, CRC(fe46b112) SHA1(b32ef6a09a0b9059840cef4f8847cdbb3cf96fa9) )
	3588	ROM_LOAD( "24-04.u8",      0x3000, 0x0800, CRC(0060978d) SHA1(f5ee296592520408d2bdd7022d5b82e712cfc643) )
	3589	ROM_LOAD( "24-05_02bt.u9",   0x3800, 0x0800, CRC(9637a6c0) SHA1(29589fcf8c4db760da95d29be74340fea65b550a) )
	3590
	3591	ROM_REGION( 0x0800, "gfx1", 0 )
	3592	ROM_LOAD( "cgo.u67",   0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
	3593
	3594	ROM_REGION( 0x1800, "gfx2", 0 )
	3595	ROM_LOAD( "cgc.u70",   0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
	3596	ROM_LOAD( "cgb.u69",   0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
	3597	ROM_LOAD( "cga.u68",   0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
	3598
	3599	ROM_REGION( 0x400, "proms", 0 )   /* is this prom ok? */
	3600	ROM_LOAD( "pok-6301.u28",   0x0000, 0x0100, CRC(56c2577b) SHA1(cb75882067e1e0d9f9369a37b5a829dd091d473e) )
	3601	ROM_RELOAD(               0x0100, 0x0100 )
	3602	ROM_RELOAD(               0x0200, 0x0100 )
	3603	ROM_RELOAD(               0x0300, 0x0100 )
	3604	ROM_END
	3605
2816	3606	ROM_START( comg246 )   /* Cal Omega v24.6 (Hotline) */
2817	3607	ROM_REGION( 0x10000, "maincpu", 0 )
2818	3608	ROM_FILL(            0x3000, 0x1000, 0xff )   /* empty socket */
r8962	r8963
2882	3672	ROM_RELOAD(            0x0300, 0x0100 )
2883	3673	ROM_END
2884	3674
	3675	/*
	3676
	3677	CEI Video Poker
	3678	Jacks or Better
	3679	V 51.08
	3680	Pay Schedule 05F Controled by EPR1- 50.081
	3681	906 board
	3682	PROMS 2764
	3683
	3684	*/
	3685
	3686	ROM_START( comg5108 )   /* Cal Omega v51.08 (Gaming Poker) */
	3687	ROM_REGION( 0x10000, "maincpu", 0 )
	3688	ROM_LOAD( "epr1.u28",   0x6000, 0x2000, CRC(3d6abca9) SHA1(54a802f89bd64380abf269a2b507513c8db5319b) )   /* checked in offset $8034 */
	3689	ROM_LOAD( "epr2.u29",   0x8000, 0x2000, CRC(72cf8376) SHA1(fa1682244402e1b36164c670241f585bf4017ad9) )
	3690	ROM_LOAD( "epr3.u30",   0xa000, 0x2000, CRC(c79957e5) SHA1(64afdedf5369d56790e9ae7a8d3be5f52125ca1f) )
	3691	ROM_LOAD( "epr4.u31",   0xc000, 0x2000, CRC(eb0b0a86) SHA1(4fd29700db8fe183392cc66a54a128657c7e05e0) )
	3692	ROM_LOAD( "epr5.u32",   0xe000, 0x2000, CRC(b0981cea) SHA1(e56278176df1a6c20acfb8cbf2f5e7a946d93111) )
	3693
	3694	ROM_REGION( 0x6000, "gfx1", 0 )
	3695	ROM_LOAD( "cg2c.u4",   0x0000, 0x2000, CRC(dc77a6db) SHA1(3af5f568de3f2af1a6bbb00d673bdbff16c87a40) )
	3696	ROM_LOAD( "cg2b.u5",   0x2000, 0x2000, CRC(1f79f76d) SHA1(b2bce60e24dd61977f7bf6ee4705ca7d104ab388) )
	3697	ROM_LOAD( "cg2a.u6",   0x4000, 0x2000, CRC(d5fd9fc2) SHA1(68472e7271f835656197109620bb3988fc52308a) )
	3698
	3699	ROM_REGION( 0x400, "proms", 0 )   /* from other set */
	3700	ROM_LOAD( "bprom.u16",   0x0000, 0x0200, CRC(a6d43709) SHA1(cbff2cb60137462dc0b7c7719a64574218d96c62) )
	3701	ROM_RELOAD(            0x0200, 0x0200 )
	3702	ROM_END
	3703
	3704
	3705
	3706	/*********************** Diagnostic PROMs ***********************/
	3707
2885	3708	ROM_START( comg903d )   /* Cal Omega 903d (System 903 diag.PROM) */
2886	3709	ROM_REGION( 0x10000, "maincpu", 0 )
2887	3710	ROM_FILL(            0x1800, 0x0800, 0xff )   /* empty socket (requested by the manual) */
r8962	r8963
2925	3748	ROM_END
2926	3749
2927	3750
2928		/******* Unofficial/3rd part games *******/
2929	3751
	3752	/****************** Unofficial / 3rd part games *****************/
	3753
	3754	/*
	3755
	3756	El Grande 5 Card Draw
	3757
	3758	ROM text showed poker stuff and "TUNI" "1982"
	3759
	3760	.u6    2716
	3761	.u7    2516
	3762	.u8    2516
	3763	.u9    2516
	3764	.u67   2516
	3765	.u68   2516
	3766	.u69   2716
	3767	.u70   2716
	3768	.u28   82s129
	3769
	3770	6502
	3771	HD46505
	3772	AY-3-8912
	3773	MC6821P x2
	3774	TC5501  x2
	3775	10MHz Crystal
	3776
	3777	empty socket at u5
	3778
	3779	*/
	3780
2930	3781	ROM_START( elgrande )
2931	3782	ROM_REGION( 0x10000, "maincpu", 0 )
2932	3783	ROM_FILL(         0x1800, 0x0800, 0xff )   /* empty socket */
r8962	r8963
3066	3917	ROM_END
3067	3918
3068	3919
3069		/*************************
3070		*      Driver Init       *
3071		*************************/
	3920	/*************************************************
	3921	*                  Driver Init                   *
	3922	*************************************************/
3072	3923
3073	3924	static DRIVER_INIT( standard )
3074	3925	{
r8962	r8963
3105	3956	for (x = 0x0000; x < 0x0400; x++)
3106	3957	{
3107	3958	if (BPR[x] == 0x02)
3108		BPR[x] = 0x00;   /* blue background */
	3959	BPR[x] = 0x00;   /* black background */
3109	3960	}
3110	3961	}
3111	3962
	3963	static DRIVER_INIT( comg080 )
	3964	{
	3965	/* background color is adjusted through RGB pots */
	3966	int x;
	3967	UINT8 *BPR = memory_region( machine, "proms" );
3112	3968
3113		/*************************
3114		*      Game Drivers      *
3115		*************************/
	3969	for (x = 0x0000; x < 0x0400; x++)
	3970	{
	3971	if (BPR[x] == 0x07)
	3972	BPR[x] = 0x04;   /* blue background */
	3973	}
3116	3974
3117		/*    YEAR  NAME      PARENT    MACHINE   INPUT     INIT      ROT    COMPANY                                  FULLNAME                                        FLAGS   */
3118		GAME( 1981, comg074,  0,        sys903,   comg074,  standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 7.4 (Gaming Poker, W.Export)", 0 )
3119		GAME( 1981, comg076,  0,        sys903,   comg076,  standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 7.6 (Arcade Poker)",           0 )
3120		GAME( 1981, comg079,  0,        sys903,   comg076,  standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 7.9 (Arcade Poker)",           GAME_NOT_WORKING )   /* bad dump */
3121		GAME( 1981, comg080,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 8.0 (Arcade Black Jack)",      GAME_NOT_WORKING )   /* bad dump */
3122		GAME( 1981, comg094,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 9.4 (Keno)",                   GAME_NOT_WORKING )
3123		GAME( 1982, comg107,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 10.7c (Big Game)",             GAME_NOT_WORKING )
3124		GAME( 1982, comg123,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 12.3 (Ticket Poker)",          GAME_NOT_WORKING )   /* bad dump */
3125		GAME( 1982, comg125,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 12.5 (Bingo)",                 GAME_NOT_WORKING )
3126		GAME( 1982, comg127,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 12.7 (Keno)",                  GAME_NOT_WORKING )
3127		GAME( 1982, comg128,  0,        sys903,   comg128,  standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 12.8 (Arcade Game)",           0 )
3128		GAME( 1982, comg134,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 13.4 (Nudge Bingo)",           GAME_NOT_WORKING )
3129		GAME( 1982, comg145,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 14.5 (Pixels)",                GAME_NOT_WORKING )
3130		GAME( 1983, comg157,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 15.7 (Double-Draw Poker)",     GAME_NOT_WORKING )
3131		GAME( 1983, comg159,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 15.9 (Wild Double-Up)",        GAME_NOT_WORKING )
3132		GAME( 1983, comg164,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 16.4 (Keno)",                  GAME_NOT_WORKING )   /* incomplete dump */
3133		GAME( 1983, comg168,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 16.8 (Keno)",                  GAME_NOT_WORKING )
3134		GAME( 1983, comg172,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 17.2 (Double Double Poker)",   GAME_NOT_WORKING )
3135		GAME( 1984, comg175,  0,        sys903,   gdrawpkr, standard, ROT0, "Cal Omega / Casino Electronics Inc.",   "Cal Omega - Game 17.51 (Gaming Draw Poker)",    0 )
3136		GAME( 1982, comg176,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 17.6 (Nudge Bingo)",           GAME_NOT_WORKING )
3137		GAME( 1982, comg181,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.1 (Nudge Bingo)",           GAME_NOT_WORKING )
3138		GAME( 1983, comg183,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.3 (Pixels)",                GAME_NOT_WORKING )
3139		GAME( 1983, comg185,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.5 (Pixels)",                GAME_NOT_WORKING )
3140		GAME( 1983, comg186,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.6 (Pixels)",                GAME_NOT_WORKING )
3141		GAME( 1983, comg187,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.7 (Amusement Poker)",       GAME_NOT_WORKING )   /* bad dump */
3142		GAME( 1984, comg204,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 20.4 (Super Blackjack)",       GAME_NOT_WORKING )
3143		GAME( 1984, comg208,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 20.8 (Winner's Choice)",       GAME_NOT_WORKING )
3144		GAME( 1984, comg227,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 22.7 (Amusement Poker, d/d)",  GAME_NOT_WORKING )
3145		GAME( 1984, comg230,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 23.0 (FC Bingo (4-card))",     GAME_NOT_WORKING )   /* bad dump */
3146		GAME( 1984, comg236,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 23.6 (Hotline)",               GAME_NOT_WORKING )
3147		GAME( 1985, comg239,  0,        sys903,   gdrawpkr, standard, ROT0, "Cal Omega / Casino Electronics Inc.",   "Cal Omega - Game 23.9 (Gaming Draw Poker)",     0 )
3148		GAME( 1985, comg246,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 24.6 (Hotline)",               GAME_NOT_WORKING )
3149		GAME( 1985, comg272a, 0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 27.2 (Keno, amusement)",       GAME_NOT_WORKING )
3150		GAME( 1985, comg272b, 0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 27.2 (Keno, gaming)",          GAME_NOT_WORKING )
3151		GAME( 198?, comg903d, 0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - System 903 Diag.PROM",              GAME_NOT_WORKING )
3152		GAME( 198?, comg905d, 0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - System 905 Diag.PROM",              GAME_NOT_WORKING )
3153		GAME( 1982, elgrande, 0,        s903mod,  elgrande, elgrande, ROT0, "Tuni Electro Service / E.T. Marketing", "El Grande - 5 Card Draw (New)",                 0 )
3154		GAME( 1983, jjpoker,  0,        s903mod,  jjpoker,  jjpoker,  ROT0, "Enter-Tech (ETL)",                      "Jackpot Joker Poker (set 1)",                   0 )
3155		GAME( 1983, jjpokerb, jjpoker,  s903mod,  jjpoker,  jjpoker,  ROT0, "Enter-Tech (ETL)",                      "Jackpot Joker Poker (set 2)",                   0 )
3156		GAME( 1988, ssipkr24, 0,        s903mod,  ssipkr,   jjpoker,  ROT0, "SSI",                                   "SSI Poker (v2.4)",                              0 )
3157		GAME( 1988, ssipkr30, ssipkr24, s903mod,  ssipkr,   jjpoker,  ROT0, "SSI",                                   "SSI Poker (v3.0)",                              0 )
3158		GAME( 1990, ssipkr40, ssipkr24, s903mod,  ssipkr,   jjpoker,  ROT0, "SSI",                                   "SSI Poker (v4.0)",                              0 )
	3975	/* Injecting missing Start and NMI vectors...
	3976	Start = $2042;  NMI = $26f8;
	3977	Also a fake vector at $3ff8-$3ff9. The code checks these values to continue.
	3978	*/
	3979	UINT8 *PRGROM = memory_region( machine, "maincpu" );
	3980
	3981	PRGROM[0x3ff8] = 0x8e; /* checked by code */
	3982	PRGROM[0x3ff9] = 0x97; /* checked by code */
	3983
	3984	PRGROM[0x3ffc] = 0x42; /* Start vector */
	3985	PRGROM[0x3ffd] = 0x20;
	3986	PRGROM[0x3ffe] = 0xf8; /* NMI vector */
	3987	PRGROM[0x3fff] = 0x26;
	3988	}
	3989
	3990
	3991	/*************************************************
	3992	*                  Game Drivers                  *
	3993	*************************************************/
	3994
	3995	/*    YEAR  NAME      PARENT    MACHINE   INPUT     INIT      ROT    COMPANY                                  FULLNAME                                                    FLAGS   */
	3996	GAME( 1981, comg074,  0,        sys903,   comg074,  standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 7.4 (Gaming Poker, W.Export)",             0 )
	3997	GAME( 1981, comg076,  0,        sys903,   comg076,  standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 7.6 (Arcade Poker)",                       0 )
	3998	GAME( 1981, comg079,  0,        sys903,   comg076,  standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 7.9 (Arcade Poker)",                       GAME_NOT_WORKING )   /* bad dump */
	3999	GAME( 1981, comg080,  0,        sys903,   arcadebj, comg080,  ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 8.0 (Arcade Black Jack)",                  0 )               /* bad dump */
	4000	GAME( 1981, comg094,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 9.4 (Keno)",                               GAME_NOT_WORKING )
	4001	GAME( 1982, comg107,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 10.7c (Big Game)",                         GAME_NOT_WORKING )
	4002	GAME( 1982, comg123,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 12.3 (Ticket Poker)",                      GAME_NOT_WORKING )   /* bad dump */
	4003	GAME( 1982, comg125,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 12.5 (Bingo)",                             GAME_NOT_WORKING )
	4004	GAME( 1982, comg127,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 12.7 (Keno)",                              GAME_NOT_WORKING )
	4005	GAME( 1982, comg128,  0,        sys903,   comg128,  standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 12.8 (Arcade Game)",                       0 )
	4006	GAME( 1982, comg134,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 13.4 (Nudge Bingo)",                       GAME_NOT_WORKING )
	4007	GAME( 1982, comg145,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 14.5 (Pixels)",                            GAME_NOT_WORKING )
	4008	GAME( 1983, comg157,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 15.7 (Double-Draw Poker)",                 GAME_NOT_WORKING )
	4009	GAME( 1983, comg159,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 15.9 (Wild Double-Up)",                    GAME_NOT_WORKING )
	4010	GAME( 1983, comg164,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 16.4 (Keno)",                              GAME_NOT_WORKING )   /* incomplete dump */
	4011	GAME( 1983, comg168,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 16.8 (Keno)",                              GAME_NOT_WORKING )
	4012	GAME( 1983, comg172,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 17.2 (Double Double Poker)",               GAME_NOT_WORKING )
	4013	GAME( 1984, comg175,  0,        sys903,   gdrwpkrd, standard, ROT0, "Cal Omega / Casino Electronics Inc.",   "Cal Omega - Game 17.51 (Gaming Draw Poker)",                0 )
	4014	GAME( 1982, comg176,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 17.6 (Nudge Bingo)",                       GAME_NOT_WORKING )
	4015	GAME( 1982, comg181,  0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.1 (Nudge Bingo)",                       GAME_NOT_WORKING )
	4016	GAME( 1983, comg183,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.3 (Pixels)",                            GAME_NOT_WORKING )
	4017	GAME( 1983, comg185,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.5 (Pixels)",                            GAME_NOT_WORKING )
	4018	GAME( 1983, comg186,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.6 (Pixels)",                            GAME_NOT_WORKING )
	4019	GAME( 1983, comg187,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.7 (Amusement Poker)",                   GAME_NOT_WORKING )   /* bad dump */
	4020	GAME( 1984, comg204,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 20.4 (Super Blackjack)",                   GAME_NOT_WORKING )
	4021	GAME( 1984, comg208,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 20.8 (Winner's Choice)",                   GAME_NOT_WORKING )
	4022	GAME( 1984, comg227,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 22.7 (Amusement Poker, d/d)",              GAME_NOT_WORKING )
	4023	GAME( 1984, comg230,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 23.0 (FC Bingo (4-card))",                 GAME_NOT_WORKING )   /* bad dump */
	4024	GAME( 1984, comg236,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 23.6 (Hotline)",                           GAME_NOT_WORKING )
	4025	GAME( 1985, comg239,  0,        sys903,   gdrwpkrd, standard, ROT0, "Cal Omega / Casino Electronics Inc.",   "Cal Omega - Game 23.9 (Gaming Draw Poker)",                 0 )
	4026	GAME( 1985, comg240,  0,        sys903,   gdrwpkrh, standard, ROT0, "Cal Omega / Casino Electronics Inc.",   "Cal Omega - Game 24.0 (Gaming Draw Poker, hold)",           0 )
	4027	GAME( 1985, comg246,  0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 24.6 (Hotline)",                           GAME_NOT_WORKING )
	4028	GAME( 1985, comg272a, 0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 27.2 (Keno, amusement)",                   GAME_NOT_WORKING )
	4029	GAME( 1985, comg272b, 0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 27.2 (Keno, gaming)",                      GAME_NOT_WORKING )
	4030	GAME( 198?, comg5108, 0,        sys906,   stand906, standard, ROT0, "Cal Omega / Casino Electronics Inc.",   "Cal Omega - Game 51.08 (CEI Video Poker, Jacks or Better)", GAME_NOT_WORKING )
	4031
	4032	/************ Diagnostic PROMs ************/
	4033	GAME( 198?, comg903d, 0,        sys903,   stand903, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - System 903 Diag.PROM",                          GAME_NOT_WORKING )
	4034	GAME( 198?, comg905d, 0,        sys905,   stand905, standard, ROT0, "Cal Omega Inc.",                        "Cal Omega - System 905 Diag.PROM",                          GAME_NOT_WORKING )
	4035
	4036	/****** Unofficial / 3rd part games *******/
	4037	GAME( 1982, elgrande, 0,        s903mod,  elgrande, elgrande, ROT0, "Tuni Electro Service / E.T. Marketing", "El Grande - 5 Card Draw (New)",                             0 )
	4038	GAME( 1983, jjpoker,  0,        s903mod,  jjpoker,  jjpoker,  ROT0, "Enter-Tech (ETL)",                      "Jackpot Joker Poker (set 1)",                               0 )
	4039	GAME( 1983, jjpokerb, jjpoker,  s903mod,  jjpoker,  jjpoker,  ROT0, "Enter-Tech (ETL)",                      "Jackpot Joker Poker (set 2)",                               0 )
	4040	GAME( 1988, ssipkr24, 0,        s903mod,  ssipkr,   jjpoker,  ROT0, "SSI",                                   "SSI Poker (v2.4)",                                          0 )
	4041	GAME( 1988, ssipkr30, ssipkr24, s903mod,  ssipkr,   jjpoker,  ROT0, "SSI",                                   "SSI Poker (v3.0)",                                          0 )
	4042	GAME( 1990, ssipkr40, ssipkr24, s903mod,  ssipkr,   jjpoker,  ROT0, "SSI",                                   "SSI Poker (v4.0)",                                          0 )

src/mame/drivers/shaolins.c

r8962	r8963
232	232	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
233	233	MACHINE_DRIVER_END
234	234
	235	#if 0 // a bootleg board was found with downgraded sound hardware, but is otherwise the same
235	236	static MACHINE_DRIVER_START( shaolinb )
236	237	MDRV_IMPORT_FROM(shaolins)
237	238
r8962	r8963
241	242	MDRV_SOUND_REPLACE("sn2", SN76489, MASTER_CLOCK/6)  /* only type verified on pcb */
242	243	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
243	244	MACHINE_DRIVER_END
	245	#endif
244	246
245	247	/***************************************************************************
246	248
r8962	r8963
293	295	ROM_END
294	296
295	297	/*
296		Shao-lin's Road (Bootleg)
	298	Shao-lin's Road (Bootleg) - has also been found on an original board
297	299
298	300	Main Board:    VWXYZ
299	301	Daughterboard: QSTU (Replaces 3 custom Konami chips)
r8962	r8963
337	339	ROM_LOAD( "7.j1", 0x2000, 0x4000, CRC(d9a7cff6) SHA1(47244426b9a674326c5303347112aa9d33bcf1df) ) /* 27128 */
338	340
339	341	ROM_REGION( 0x8000, "gfx2", 0 ) /* All roms are 27128 */
340		ROM_LOAD( "1.l8", 0x0000, 0x4000, CRC(a79959b2) SHA1(9c58975c55f7be32add0dccb259d9680410fa9bc) )
341		ROM_LOAD( "2.m8", 0x4000, 0x4000, CRC(560521c7) SHA1(f8a50c66364995041e29ed7be2e4ea1ad16aa735) )
	342	ROM_LOAD( "2.m8", 0x0000, 0x4000, CRC(560521c7) SHA1(f8a50c66364995041e29ed7be2e4ea1ad16aa735) )
	343	ROM_LOAD( "1.l8", 0x4000, 0x4000, CRC(a79959b2) SHA1(9c58975c55f7be32add0dccb259d9680410fa9bc) )
342	344
343	345	ROM_REGION( 0x0500, "proms", 0 ) /* All proms are N82S129N */
344	346	ROM_LOAD( "3.k1", 0x0000, 0x0100, CRC(b09db4b4) SHA1(d21176cdc7def760da109083eb52e5b6a515021f) ) /* palette red component */
r8962	r8963
349	351	ROM_END
350	352
351	353
352		/*    YEAR, NAME,     PARENT, MACHINE,  INPUT,    INIT, MONITOR, COMPANY,  FULLNAME,                    FLAGS */
353		GAME( 1985, kicker,   0,      shaolins, shaolins, 0,    ROT90,  "Konami",  "Kicker",                    0 )
354		GAME( 1985, shaolins, kicker, shaolins, shaolins, 0,    ROT90,  "Konami",  "Shao-lin's Road",           0 )
355		GAME( 1985, shaolinb, kicker, shaolinb, shaolins, 0,    ROT90,  "bootleg", "Shao-lin's Road (bootleg)", GAME_IMPERFECT_COLORS )
	354	/*    YEAR, NAME,     PARENT, MACHINE,  INPUT,    INIT, MONITOR, COMPANY,  FULLNAME,                  FLAGS */
	355	GAME( 1985, kicker,   0,      shaolins, shaolins, 0,    ROT90,  "Konami",  "Kicker",                  0 )
	356	GAME( 1985, shaolins, kicker, shaolins, shaolins, 0,    ROT90,  "Konami",  "Shao-lin's Road (set 1)", 0 )
	357	GAME( 1985, shaolinb, kicker, shaolins, shaolins, 0,    ROT90,  "Konami",  "Shao-lin's Road (set 2)", 0 )

src/mame/drivers/pachifev.c

r8962	r8963
20	20
21	21	- TODO:
22	22	- what's the correct game title - Pachifever ? Fever 777 ?
23		- remaing DSW
24	23	- unknown writes ($ffxx range)
	24	- coins : try to understand why they don't always register (use PORT_IMPULSE ?)
25	25	- controls : unused bits (is the BUTTON1 used _only_ for entering initials?)
26	26	- controls : make PLUNGER (or whatever it is in reality) implementation more clear
	27	and find a better way to handle cocktail mode;
27	28	here's some code used to read plunger pos(angle?):
28	29
29		0284: 04CC             clr  R12            ; CRU address
30		0286: 0208 FF00        li   R8,>ff00     ; R8=ff00 - initial data ($ff)
31		028A: D688             movb R8,*R10     ; ff-> ff40  - write to output
32		028C: 3449             stcr R9,1        ; CRU read (one bit)
33		028E: 1603             jne  >0296        ; not zer0 - end
34		0290: 0228 FC00        ai   R8,>fc00    ; R8=R8-4
35		0294: 18FA             joc  >028a        ; loop
	30	0284: 04CC             clr  R12             ; CRU address
	31	0286: 0208 FF00        li   R8,>ff00        ; R8=ff00 - initial data ($ff)
	32	028A: D688             movb R8,*R10         ; ff-> ff40  - write to output
	33	028C: 3449             stcr R9,1            ; CRU read (one bit)
	34	028E: 1603             jne  >0296           ; not zer0 - end
	35	0290: 0228 FC00        ai   R8,>fc00        ; R8=R8-4
	36	0294: 18FA             joc  >028a           ; loop
36	37
37		0296: D6A0 020F        movb @>020f,*R10  ; 00 ->ff40 - end of controls read
38		029A: 045B             b    *R11        ; b $1ca - process data in R8
	38	0296: D6A0 020F        movb @>020f,*R10     ; 00 ->ff40 - end of controls read
	39	029A: 045B             b    *R11            ; b $1ca - process data in R8
39	40
	41
	42	Stephh's notes (based on the game TMS9995 code and some tests) :
	43
	44	- "Difficulty" Dip Switch is a guess, but I can't see what else it can be. The values (-8 to +8) are
	45	correct, but it's impossible for me to tell what are the easiest and the hardest settings.
	46	- In "attract mode", the game plays the 4th level. This "attract mode" will end when the computer's
	47	balls reaches the limit or when the time is over (same rules as for the players - see gameplay below).
	48	- Gameplay :
	49	* On levels 1 to 3, your number of balls must reach the limit based on DSW2 bits 6 and 7
	50	to complete the level; once this is done, you go to next level or bonus stage (after level 3).
	51	Time is reset to value based on DSW2 bits 6 and 7 only at the begining of level 1,
	52	while balls are reset on each level to value based on DSW1 bits 4 and 5.
	53	* On the bonus stage, you only have 3 balls (which are decremented from your number of balls)
	54	to get maximum bonus time, bonus balls, and points. During this stage, time is not decremented.
	55	* On level 4, your number of balls must reach the limit based on DSW2 bits 4 and 5 (making the game
	56	sometimes harder) to complete the level; once this is done, the game is over for current player.
	57	The main difference with levels 1 to 3 is that balls are not reset at the begining of the level.
	58	* Once time or game is over, the game switches player 2 (if available). When all players have ended
	59	their game, they can decide to continue : a message is displayed but you don't see any timer.
	60	When you continue, only the balls aren't reset, while score, time and level (GASP !) are.
	61	If you want to continue in a 2 players game, BOTH players will have to continue, which means that
	62	you must have at least 2 credits ("REPLAY") and that you can't continue player 2 without player 1.
	63	* If you manage to get a score, use BUTTON1 to cycle through avaiable symbols (letters A-Z and '.'),
	64	and pull the plunger to at least 63% (the code expects a value >= 0xa0) to go to next initial.
	65	Be aware that again there is a timer to do so, but that again the timer is not displayed.
	66	- Usefull addresses :
	67	* 0xe001.b : level (0x00-0x04 : 0x01 = level 1 - 0x02 = level 2 - 0x00 = level 3 - 0x3 = bonus - 0x04 = level 4)
	68	* 0xe00f.b : player (0x00 = P1 - 0x01 = P2)
	69	* 0xe016.w : P1 balls (MSB first)
	70	* 0xe018.d : P1 score (MSB first)
	71	* 0xe01c.w : P1 time  (MSB first)
	72	* 0xe01e.w : P2 balls (MSB first)
	73	* 0xe024.w : P2 time  (MSB first)
	74	* 0xe020.d : P1 score (MSB first)
	75	* 0xe028.w : limit (DSW2 bits 6 and 7) for levels 1 to 3 (MSB first)
	76	* 0xe02a.w : limit (DSW2 bits 4 and 5) for level  4      (MSB first)
	77
40	78	***********************************************************************************************************/
41	79
42	80	#include "emu.h"
r8962	r8963
115	153	AM_RANGE(0x000, 0x000) AM_READ(controls_r)
116	154	ADDRESS_MAP_END
117	155
	156
	157	/* verified from TMS9995 code */
118	158	static INPUT_PORTS_START( pachifev )
	159	/* 0xff00, cpl'ed -> 0xf0a0 (internal RAM) */
119	160	PORT_START("IN0")
120		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 )  /* used to enter player initials in top 5 */
121		PORT_BIT( 0x4d, IP_ACTIVE_LOW, IPT_UNKNOWN )
	161	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 )                 /* select initial for player 1 and player 2 (upright) */
122	162	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
123	163	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
124	164	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
	165	PORT_BIT( 0x4d, IP_ACTIVE_LOW, IPT_UNUSED )
125	166
	167	/* 0xff02, cpl'ed -> 0xf0a1 (internal RAM) */
126	168	PORT_START("IN1")
127		PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
	169	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL   /* select initial for player 2 (cocktail) */
	170	PORT_BIT( 0xfd, IP_ACTIVE_LOW, IPT_UNUSED )
128	171
	172	/* 0xff04, cpl'ed -> 0xf0a2 (internal RAM) */
129	173	PORT_START("DSW1")
130		PORT_DIPUNKNOWN( 0x07, 0x07 )
131
	174	PORT_DIPNAME( 0x07, 0x07, "Difficulty ?" )              /* table at 0x5000 - see notes */
	175	PORT_DIPSETTING(    0x07, "-8" )
	176	PORT_DIPSETTING(    0x06, "-6" )
	177	PORT_DIPSETTING(    0x05, "-4" )
	178	PORT_DIPSETTING(    0x04, "-2" )
	179	PORT_DIPSETTING(    0x03, "+2" )
	180	PORT_DIPSETTING(    0x02, "+4" )
	181	PORT_DIPSETTING(    0x01, "+6" )
	182	PORT_DIPSETTING(    0x00, "+8" )
132	183	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Cabinet ) )
133	184	PORT_DIPSETTING(    0x08, DEF_STR( Upright ) )
134	185	PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
135
136		PORT_DIPNAME( 0x30, 0x10, "Balls" )
137		PORT_DIPSETTING(    0x00, "200")
138		PORT_DIPSETTING(    0x10, "100")
139		PORT_DIPSETTING(    0x20, "50")
140		PORT_DIPSETTING(    0x30, "25")
141
142		PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_A ) )
143		PORT_DIPSETTING(    0xc0, DEF_STR( 1C_1C ))
	186	PORT_DIPNAME( 0x30, 0x00, "Balls" )                     /* table at 0x5020 */
	187	PORT_DIPSETTING(    0x30, "25" )
	188	PORT_DIPSETTING(    0x20, "50" )
	189	PORT_DIPSETTING(    0x10, "100" )
	190	PORT_DIPSETTING(    0x00, "200" )
	191	PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coinage ) )
	192	PORT_DIPSETTING(    0xc0, DEF_STR( 1C_1C ) )
144	193	PORT_DIPSETTING(    0x80, DEF_STR( 1C_2C ) )
145	194	PORT_DIPSETTING(    0x40, DEF_STR( 1C_3C ) )
146	195	PORT_DIPSETTING(    0x00, DEF_STR( 1C_4C ) )
147	196
	197	/* 0xff06, cpl'ed -> 0xf0a3 (internal RAM) */
148	198	PORT_START("DSW2")
	199	PORT_DIPNAME( 0x03, 0x00, "Time" )                      /* table at 0x5028 */
	200	PORT_DIPSETTING(    0x00, "180" )
	201	PORT_DIPSETTING(    0x01, "120" )
	202	PORT_DIPSETTING(    0x02, "150" )
	203	PORT_DIPSETTING(    0x03, "90" )
	204	PORT_DIPUNUSED( 0x04, 0x04 )
	205	PORT_DIPUNUSED( 0x08, 0x08 )
	206	PORT_DIPNAME( 0x30, 0x30, "Limit (Level 4)" )           /* table at 0x5038 - stored at 0xe02a.w */
	207	PORT_DIPSETTING(    0x30, "500" )
	208	PORT_DIPSETTING(    0x20, "1000" )
	209	PORT_DIPSETTING(    0x10, "1500" )
	210	PORT_DIPSETTING(    0x00, "2000" )
	211	PORT_DIPNAME( 0xc0, 0xc0, "Limit (Levels 1 to 3)" )     /* table at 0x5030 - stored at 0xe028.w */
	212	PORT_DIPSETTING(    0xc0, "300" )
	213	PORT_DIPSETTING(    0x80, "500" )
	214	PORT_DIPSETTING(    0x40, "1000" )
	215	PORT_DIPSETTING(    0x00, "1500" )
149	216
150		PORT_DIPNAME( 0x03, 0x01, "Time" )
151		PORT_DIPSETTING(    0x00, "180")
152		PORT_DIPSETTING(    0x01, "120")
153		PORT_DIPSETTING(    0x02, "150")
154		PORT_DIPSETTING(    0x03, "90")
155
156		PORT_DIPUNKNOWN( 0x0c, 0x0c )
157
158		PORT_DIPNAME( 0x30, 0x20, "Limit (attract)" ) /* attract mode only??? */
159		PORT_DIPSETTING(    0x00, "2000")
160		PORT_DIPSETTING(    0x10, "1500")
161		PORT_DIPSETTING(    0x20, "1000")
162		PORT_DIPSETTING(    0x30, "500")
163
164		PORT_DIPNAME( 0xc0, 0xc0, "Limit (game)" )  /* ball limit in game */
165		PORT_DIPSETTING(    0x00, "1500")
166		PORT_DIPSETTING(    0x40, "1000")
167		PORT_DIPSETTING(    0x80, "500")
168		PORT_DIPSETTING(    0xc0, "300")
169
	217	/* 0xff08, cpl'ed -> 0xf0a4 (internal RAM) */
170	218	PORT_START("DSW3")
171	219	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) )
172	220	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
173	221	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	222	PORT_DIPUNUSED( 0x02, 0x02 )
	223	PORT_DIPUNUSED( 0x04, 0x04 )
	224	PORT_DIPNAME( 0x18, 0x18, "Bonus Time" )                /* table at 0x3500 */
	225	PORT_DIPSETTING(    0x18, "5" )
	226	PORT_DIPSETTING(    0x10, "8" )
	227	PORT_DIPSETTING(    0x08, "10" )
	228	PORT_DIPSETTING(    0x00, "15" )
	229	PORT_DIPNAME( 0xe0, 0xe0, "Bonus Ball" )                /* table at 0x3508 */
	230	PORT_DIPSETTING(    0xe0, "3" )
	231	PORT_DIPSETTING(    0xc0, "4" )
	232	PORT_DIPSETTING(    0xa0, "5" )
	233	PORT_DIPSETTING(    0x80, "8" )
	234	PORT_DIPSETTING(    0x60, "10" )
	235	PORT_DIPSETTING(    0x40, "11" )
	236	PORT_DIPSETTING(    0x20, "13" )
	237	PORT_DIPSETTING(    0x00, "15" )
174	238
175		PORT_DIPUNKNOWN( 0xfe, 0xfe )
176
177		PORT_START("PLUNGER")
	239	PORT_START("PLUNGER_P1")
178	240	PORT_BIT( 0x3f, 0x00, IPT_POSITIONAL ) PORT_MINMAX(0x00,0x3f) PORT_SENSITIVITY(30) PORT_KEYDELTA(4) PORT_CENTERDELTA(0xff)
179	241
	242	PORT_START("PLUNGER_P2")
	243	PORT_BIT( 0x3f, 0x00, IPT_POSITIONAL ) PORT_MINMAX(0x00,0x3f) PORT_SENSITIVITY(30) PORT_KEYDELTA(4) PORT_CENTERDELTA(0xff) PORT_COCKTAIL
180	244	INPUT_PORTS_END
181	245
182	246
r8962	r8963
240	304	TMS9928A_interrupt(device->machine);
241	305
242	306	{
	307	static const char *const inname[2] = { "PLUNGER_P1", "PLUNGER_P2" };
243	308	pachifev_state *state = device->machine->driver_data<pachifev_state>();
244		int current_power=input_port_read(device->machine, "PLUNGER") & 0x3f;
	309
	310	/* I wish I had found a better way to handle cocktail inputs, but I can't find a way to access internal RAM */
	311	/* (bit 5 of 0xf0aa : 0 = player 1 and 1 = player 2 - bit 6 of 0xf0aa : 0 = upright and 1 = cocktail). */
	312	/* All I found is that in main RAM, 0xe00f.b determines the player : 0x00 = player 1 and 0x01 = player 2. */
	313	address_space *ramspace = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
	314	UINT8 player = 0;
	315
	316	if ((ramspace->read_byte(0xe00f) == 0x01) && ((input_port_read(device->machine, "DSW1") & 0x08) == 0x00))
	317	player = 1;
	318
	319	int current_power=input_port_read(device->machine, inname[player]) & 0x3f;
245	320	if(current_power != state->previous_power)
246	321	{
247	322	popmessage    ("%d%%", (current_power * 100) / 0x3f);

src/mame/drivers/kyugo.c

r8962	r8963
465	465	static MACHINE_RESET( kyugo )
466	466	{
467	467	kyugo_state *state = machine->driver_data<kyugo_state>();
468		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	468	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
469	469	// must start with interrupts and sub CPU disabled
470	470	cpu_interrupt_enable(machine->device("maincpu"), 0);
471	471	kyugo_sub_cpu_control_w(space, 0, 0);
r8962	r8963
1286	1286	ROM_LOAD( "epl12p6.9j", 0x0200, 0x0034, CRC(dcae870d) SHA1(2224724a3faf0608083f5d6ff76712adc7616a54) )
1287	1287	ROM_END
1288	1288
	1289	ROM_START( legendb )
	1290	ROM_REGION( 0x10000, "maincpu", 0 )
	1291	ROM_LOAD( "06.s02",    0x0000, 0x2000, CRC(227f3e88) SHA1(d31da7fe685f3249af6f42940d22d17399b9582c) )
	1292	ROM_LOAD( "07.s03",    0x2000, 0x2000, CRC(9352e9dc) SHA1(ad7e0edce658bc6c0069025512ea4a2050a61533) )
	1293	ROM_LOAD( "08.s04",    0x4000, 0x2000, CRC(41cee2b2) SHA1(166c0581aa83ba67f1912ebed80c1f02bd843ab6) )
	1294	ROM_LOAD( "05.n03",    0x6000, 0x2000, CRC(d8fd4e37) SHA1(7c9d2d48a57a4d75682e0f910151a5c0e3229413) )
1289	1295
	1296	ROM_REGION( 0x10000, "sub", 0 )
	1297	ROM_LOAD( "02.s07",    0x0000, 0x2000, CRC(abfe5eb4) SHA1(fbeb5ee14aaebb6321fe97fe523f08833fad9c7c) )
	1298	ROM_LOAD( "03.s08",    0x2000, 0x2000, CRC(7e7b9ba9) SHA1(897779129108b0f3936234ea797d47cf46cb7a16) )
	1299	ROM_LOAD( "04.s09",    0x4000, 0x2000, CRC(0dd50aa7) SHA1(001ba0d5e0b50fb030a95fdbeba40005ffc5c182) )
	1300	ROM_LOAD( "01.n07",    0x6000, 0x2000, CRC(13915a53) SHA1(25ba3babc8eb0df413bdfe7dbcd8642e4c658120) )
	1301
	1302	ROM_REGION(  0x1000, "gfx1", 0 )   /* fg tiles */
	1303	ROM_LOAD( "15.b05",    0x0000, 0x1000, CRC(6c879f76) SHA1(9da84446e463264ed86e912589d826d86c27bf59) )
	1304
	1305	ROM_REGION(  0x6000, "gfx2", 0 )   /* bg tiles */
	1306	ROM_LOAD( "18.j09",   0x0000, 0x2000, CRC(3bdcd028) SHA1(2fb2ecc5333e50834badb4b00093ca8e9a64bce4) )
	1307	ROM_LOAD( "17.j10",   0x2000, 0x2000, CRC(105c5b53) SHA1(269da6bdef55024e593ea0178597e37ff2fefc10) )
	1308	ROM_LOAD( "16.j11",   0x4000, 0x2000, CRC(b9ca4efd) SHA1(680c3ca88c65c1643ae82945b937d34579c0efeb) )
	1309
	1310	ROM_REGION( 0x18000, "gfx3", 0 )   /* sprites */
	1311	ROM_LOAD( "14.b06",   0x00000, 0x4000, CRC(1689f21c) SHA1(fafb13dc8ca27a7506065bbf08102afc6d722843) )
	1312	ROM_LOAD( "13.b07",   0x04000, 0x4000, CRC(f527c909) SHA1(40f44828502018c73283965eb7a2a68ed25ebfe5) )
	1313	ROM_LOAD( "12.b08",   0x08000, 0x4000, CRC(8d618629) SHA1(3cc49fd8066464ee940de010da3f33ed8573df3d) )
	1314	ROM_LOAD( "11.b09",   0x0c000, 0x4000, CRC(7d7e2d55) SHA1(efd4817a0f5e14cb5a3d0c1f69e6ad408a813202) )
	1315	ROM_LOAD( "10.b10",   0x10000, 0x4000, CRC(f12232fe) SHA1(2d8accc10f0703eeb075c4053d4165b90552e6a7) )
	1316	ROM_LOAD( "09.b11",   0x14000, 0x4000, CRC(8c09243d) SHA1(8f0f68921f8ab6c016b7481714febb68abb7ce79) )
	1317
	1318	ROM_REGION( 0x0340, "proms", 0 )
	1319	ROM_LOAD( "82s129.1j",   0x0000, 0x0100, CRC(40590ac0) SHA1(30a8e24e34c4ee0a7df91c0633becfce1c8d856c) ) /* red */
	1320	ROM_LOAD( "82s129.1h",   0x0100, 0x0100, CRC(e542b363) SHA1(6775209b9a4aaf374878c06cf4dc693b921abd87) ) /* green */
	1321	ROM_LOAD( "82s129.1f",   0x0200, 0x0100, CRC(75536fc8) SHA1(e713efafcdc7f2a595444af75d2083eb3e38a480) ) /* blue */
	1322	ROM_LOAD( "82s123.5j",   0x0300, 0x0020, CRC(c98f0651) SHA1(4f1b95213c28ad017c8d6542e8d522e4d69f91e3) ) /* char lookup table */
	1323	ROM_LOAD( "m1.2c",       0x0320, 0x0020, CRC(83a39201) SHA1(4fdc722c9e20ee152c890342ef0dce18e35e2ef8) ) /* timing? not used */
	1324
	1325	ROM_REGION( 0x0300, "plds", 0 )
	1326	ROM_LOAD( "epl10p8.2j", 0x0000, 0x002c, CRC(8abc03bf) SHA1(05a7085583f76cb46ec623adfc1e0dd35c6a36e6) )
	1327	ROM_LOAD( "epl12p6.9k", 0x0100, 0x0034, CRC(9b0bd6f8) SHA1(9dceb37245969537301b1f3c74f2c4ee088faa93) )
	1328	ROM_LOAD( "epl12p6.9j", 0x0200, 0x0034, CRC(dcae870d) SHA1(2224724a3faf0608083f5d6ff76712adc7616a54) )
	1329	ROM_END
	1330
	1331
	1332
	1333
	1334
1290	1335	/*************************************
1291	1336	*
1292	1337	*  Game specific initialization
r8962	r8963
1331	1376	GAME( 1985, flashgala, flashgal, flashgala,flashgal, 0,        ROT0,  "Sega", "Flashgal (set 2)", GAME_SUPPORTS_SAVE )
1332	1377	GAME( 1986, srdmissn,  0,        srdmissn, srdmissn, srdmissn, ROT90, "Taito Corporation", "S.R.D. Mission", GAME_SUPPORTS_SAVE )
1333	1378	GAME( 1986, fx,        srdmissn, srdmissn, srdmissn, srdmissn, ROT90, "bootleg", "F-X", GAME_SUPPORTS_SAVE )
1334		GAME( 1986, legend,    0,        legend,   legend,   srdmissn, ROT0,  "Sega / Coreland", "Legend", GAME_SUPPORTS_SAVE )
	1379	GAME( 1986, legend,    0,        legend,   legend,   srdmissn, ROT0,  "Sega / Coreland", "Legend", GAME_SUPPORTS_SAVE ) // no copyright (maybe also a bootleg?)
	1380	GAME( 1986, legendb,   legend,   legend,   legend,   srdmissn, ROT0,  "bootleg", "Legion (bootleg of Legend)", GAME_SUPPORTS_SAVE ) // no copyright
1335	1381	GAME( 1987, airwolf,   0,        srdmissn, airwolf,  srdmissn, ROT0,  "Kyugo", "Airwolf", GAME_SUPPORTS_SAVE )
1336	1382	GAME( 1987, airwolfa,  airwolf,  srdmissn, airwolf,  srdmissn, ROT0,  "Kyugo (UA Theatre license)", "Airwolf (US)", GAME_SUPPORTS_SAVE )
1337	1383	GAME( 1987, skywolf,   airwolf,  srdmissn, skywolf,  srdmissn, ROT0,  "bootleg", "Sky Wolf (set 1)", GAME_SUPPORTS_SAVE )

src/mame/drivers/leland.c

r8962	r8963
1597	1597	ROM_LOAD( "03-28002.u8",   0x70000, 0x10000, CRC(c3e09811) SHA1(9b6e036a53000c9bcb104677d9c71743f02fd841) )
1598	1598
1599	1599	ROM_REGION( 0x100000, "audiocpu", 0 )
1600		ROM_LOAD16_BYTE( "24019-01.u25", 0x040001, 0x10000, CRC(9e344768) SHA1(7f16d29c52f3d7f0046f414185c4d889f6128597) )
1601		ROM_LOAD16_BYTE( "24016-01.u13", 0x040000, 0x10000, CRC(6997025f) SHA1(5eda3bcae896933385fe97a4e1396ae2da7576cb) )
1602		ROM_LOAD16_BYTE( "24020-01.u26", 0x060001, 0x10000, CRC(0788f2a5) SHA1(75eb1ab00185f8efa71f1d46197b5f6d20d721f2) )
1603		ROM_LOAD16_BYTE( "24017-01.u14", 0x060000, 0x10000, CRC(a48bd721) SHA1(e099074165594a7c289a25c522005db7e9554ca1) )
1604		ROM_LOAD16_BYTE( "24021-01.u27", 0x0e0001, 0x10000, CRC(94081899) SHA1(289eb2f494d1110d169552e8898296e4a47fcb1d) )
1605		ROM_LOAD16_BYTE( "24018-01.u15", 0x0e0000, 0x10000, CRC(76eb6077) SHA1(255731c63f4a846bb01d4203a786eb34a4734e66) )
	1600	ROM_LOAD16_BYTE( "24019-01.u25", 0x040001, 0x10000, CRC(9e344768) SHA1(7f16d29c52f3d7f0046f414185c4d889f6128597) )
	1601	ROM_LOAD16_BYTE( "24016-01.u13", 0x040000, 0x10000, CRC(6997025f) SHA1(5eda3bcae896933385fe97a4e1396ae2da7576cb) )
	1602	ROM_LOAD16_BYTE( "24020-01.u26", 0x060001, 0x10000, CRC(0788f2a5) SHA1(75eb1ab00185f8efa71f1d46197b5f6d20d721f2) )
	1603	ROM_LOAD16_BYTE( "24017-01.u14", 0x060000, 0x10000, CRC(a48bd721) SHA1(e099074165594a7c289a25c522005db7e9554ca1) )
	1604	ROM_LOAD16_BYTE( "24021-01.u27", 0x0e0001, 0x10000, CRC(94081899) SHA1(289eb2f494d1110d169552e8898296e4a47fcb1d) )
	1605	ROM_LOAD16_BYTE( "24018-01.u15", 0x0e0000, 0x10000, CRC(76eb6077) SHA1(255731c63f4a846bb01d4203a786eb34a4734e66) )
1606	1606
1607	1607	ROM_REGION( 0x0c000, "gfx1", 0 )
1608		ROM_LOAD( "03-28008.u93", 0x00000, 0x04000, NO_DUMP )
	1608	ROM_LOAD( "03-28008.u93", 0x00000, 0x04000, CRC(68f8addc) SHA1(a52c408e2e9022f96fb766065d7266deb0df2e5f) )
1609	1609	ROM_LOAD( "03-28009.u94", 0x04000, 0x04000, CRC(669791ac) SHA1(e8b7bdec313ea9d40f89f13499a31f0b125951a8) )
1610	1610	ROM_LOAD( "03-28010.u95", 0x08000, 0x04000, CRC(bd62aa8a) SHA1(c8a177a11ec94671bb3bd5883b40692495c049a2) )
1611	1611
r8962	r8963
1627	1627	ROM_START( aafbb )
1628	1628	ROM_REGION( 0x20000, "master", 0 )
1629	1629	ROM_LOAD( "24014-02.u58",   0x00000, 0x10000, CRC(5db4a3d0) SHA1(f759ab16de48562db1640bc5df68be188725aecf) )
1630		ROM_LOAD( "24015-02.u59",   0x10000, 0x10000, CRC(f384f716) SHA1(e689ec6b76bfdf58a059409850c397d407740dda) )
	1630	ROM_LOAD( "24015-02.u59",   0x10000, 0x10000, BAD_DUMP CRC(f384f716) SHA1(e689ec6b76bfdf58a059409850c397d407740dda) )
1631	1631
1632	1632	ROM_REGION( 0x80000, "slave", 0 )
1633	1633	ROM_LOAD( "24000-02.u3",   0x00000, 0x02000, CRC(52df0354) SHA1(a39a2538b733e336eac5a1491c42c89fd4f4d1aa) )
r8962	r8963
1769	1769	ROM_LOAD( "22112-01.u8",  0x70000, 0x10000, CRC(3eef38d3) SHA1(9131960592a44c8567ab483f72955d2cc8898445) )
1770	1770
1771	1771	ROM_REGION( 0x100000, "audiocpu", 0 )
1772		ROM_LOAD16_BYTE( "22116-03.u25", 0x040001, 0x10000, CRC(95bb31d3) SHA1(e7bc43b63126fd33663865b2e41bacc58e962628) )
1773		ROM_LOAD16_BYTE( "22113-03.u13", 0x040000, 0x10000, CRC(71b28df6) SHA1(caf8e4c98a1650dbaedf83f4d38da920d0976f78) )
1774		ROM_LOAD16_BYTE( "22117-03.u26", 0x060001, 0x10000, CRC(703d81ce) SHA1(caf5363fb468a461a260e0ec636b0a7a8dc9cd3d) )
1775		ROM_LOAD16_BYTE( "22114-03.u14", 0x060000, 0x10000, CRC(f8b31bf8) SHA1(cb8133effe5484c5b4c40b77769f6ec72441c333) )
1776		ROM_LOAD16_BYTE( "22118-03.u27", 0x0e0001, 0x10000, CRC(806ccf8b) SHA1(7335a85fc84d5c2f7537548c3856c9cd2f267609) )
1777		ROM_LOAD16_BYTE( "22115-03.u15", 0x0e0000, 0x10000, CRC(c8439a7a) SHA1(9a8bb1fca8d3414dcfd4839bc0c4289e4d810943) )
	1772	ROM_LOAD16_BYTE( "22116-03.u25", 0x040001, 0x10000, CRC(95bb31d3) SHA1(e7bc43b63126fd33663865b2e41bacc58e962628) )
	1773	ROM_LOAD16_BYTE( "22113-03.u13", 0x040000, 0x10000, CRC(71b28df6) SHA1(caf8e4c98a1650dbaedf83f4d38da920d0976f78) )
	1774	ROM_LOAD16_BYTE( "22117-03.u26", 0x060001, 0x10000, CRC(703d81ce) SHA1(caf5363fb468a461a260e0ec636b0a7a8dc9cd3d) )
	1775	ROM_LOAD16_BYTE( "22114-03.u14", 0x060000, 0x10000, CRC(f8b31bf8) SHA1(cb8133effe5484c5b4c40b77769f6ec72441c333) )
	1776	ROM_LOAD16_BYTE( "22118-03.u27", 0x0e0001, 0x10000, CRC(806ccf8b) SHA1(7335a85fc84d5c2f7537548c3856c9cd2f267609) )
	1777	ROM_LOAD16_BYTE( "22115-03.u15", 0x0e0000, 0x10000, CRC(c8439a7a) SHA1(9a8bb1fca8d3414dcfd4839bc0c4289e4d810943) )
1778	1778
1779	1779	ROM_REGION( 0x18000, "gfx1", 0 )
1780	1780	ROM_LOAD( "22105-01.u93", 0x00000, 0x08000, CRC(4426e367) SHA1(298203112d724feb9a75a7bfc34b3dbb4d7fffe7) )
r8962	r8963
2321	2321	GAME( 1989, aafb,     0,       lelandi,  teamqb,   aafb,     ROT270, "Leland Corp.", "All American Football (rev E)", 0 )
2322	2322	GAME( 1989, aafbd2p,  aafb,    lelandi,  aafb2p,   aafbd2p,  ROT270, "Leland Corp.", "All American Football (rev D, 2 Players)", 0 )
2323	2323	GAME( 1989, aafbc,    aafb,    lelandi,  teamqb,   aafbb,    ROT270, "Leland Corp.", "All American Football (rev C)", 0 )
2324		GAME( 1989, aafbb,    aafb,    lelandi,  teamqb,   aafbb,    ROT270, "Leland Corp.", "All American Football (rev B)", 0 )
	2324	GAME( 1989, aafbb,    aafb,    lelandi,  teamqb,   aafbb,    ROT270, "Leland Corp.", "All American Football (rev B)", GAME_NOT_WORKING )
2325	2325
2326	2326	/* huge master banks, large slave banks, 80186 sound */
2327	2327	GAME( 1989, offroad,    0,       lelandi,  offroad,    offroad,  ROT0,   "Leland Corp.", "Ironman Ivan Stewart's Super Off-Road", 0 )

src/mame/drivers/tiamc1.c

r8962	r8963
120	120
121	121	static MACHINE_RESET( tiamc1 )
122	122	{
123		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	123	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
124	124	tiamc1_bankswitch_w(space, 0, 0);
125	125	}
126	126

src/mame/drivers/toaplan1.c

r8962	r8963
353	353	AM_RANGE(0x000000, 0x00ffff) AM_ROM
354	354	AM_RANGE(0x040000, 0x07ffff) AM_ROM
355	355	AM_RANGE(0x080000, 0x083fff) AM_RAM
356		AM_RANGE(0x0c0000, 0x0c0fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
	356	AM_RANGE(0x0c0000, 0x0c0fff) AM_RAM AM_BASE_SIZE_MEMBER(toaplan1_state, spriteram, spriteram_size)
357	357	AM_RANGE(0x100000, 0x100001) AM_WRITE(rallybik_bcu_flipscreen_w)
358	358	AM_RANGE(0x100002, 0x100003) AM_READWRITE(toaplan1_tileram_offs_r, toaplan1_tileram_offs_w)
359	359	AM_RANGE(0x100004, 0x100007) AM_READWRITE(rallybik_tileram16_r, toaplan1_tileram16_w)
r8962	r8963
362	362	//  AM_RANGE(0x140000, 0x140001) AM_WRITE(?? video frame related ??)
363	363	AM_RANGE(0x140002, 0x140003) AM_WRITE(toaplan1_intenable_w)
364	364	AM_RANGE(0x140008, 0x14000f) AM_WRITE(toaplan1_bcu_control_w)
365		AM_RANGE(0x144000, 0x1447ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE(&toaplan1_colorram1) AM_SIZE(&toaplan1_colorram1_size)
366		AM_RANGE(0x146000, 0x1467ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE(&toaplan1_colorram2) AM_SIZE(&toaplan1_colorram2_size)
	365	AM_RANGE(0x144000, 0x1447ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram1, colorram1_size)
	366	AM_RANGE(0x146000, 0x1467ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram2, colorram2_size)
367	367	AM_RANGE(0x180000, 0x180fff) AM_READWRITE(toaplan1_shared_r, toaplan1_shared_w)
368	368	AM_RANGE(0x1c0000, 0x1c0003) AM_WRITE(toaplan1_tile_offsets_w)
369	369	AM_RANGE(0x1c8000, 0x1c8001) AM_WRITE(toaplan1_reset_sound)
r8962	r8963
384	384	//  AM_RANGE(0x140000, 0x140001) AM_WRITE(?? video frame related ??)
385	385	AM_RANGE(0x140002, 0x140003) AM_WRITE(toaplan1_intenable_w)
386	386	AM_RANGE(0x140008, 0x14000f) AM_WRITE(toaplan1_bcu_control_w)
387		AM_RANGE(0x144000, 0x1447ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE(&toaplan1_colorram1) AM_SIZE(&toaplan1_colorram1_size)
388		AM_RANGE(0x146000, 0x1467ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE(&toaplan1_colorram2) AM_SIZE(&toaplan1_colorram2_size)
	387	AM_RANGE(0x144000, 0x1447ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram1, colorram1_size)
	388	AM_RANGE(0x146000, 0x1467ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram2, colorram2_size)
389	389	AM_RANGE(0x180000, 0x180fff) AM_READWRITE(toaplan1_shared_r, toaplan1_shared_w)
390	390	AM_RANGE(0x1c0000, 0x1c0003) AM_WRITE(toaplan1_tile_offsets_w)
391	391	AM_RANGE(0x1c0006, 0x1c0007) AM_WRITE(toaplan1_fcu_flipscreen_w)
r8962	r8963
399	399	//  AM_RANGE(0x080000, 0x080001) AM_WRITE(?? video frame related ??)
400	400	AM_RANGE(0x080002, 0x080003) AM_WRITE(toaplan1_intenable_w)
401	401	AM_RANGE(0x080008, 0x08000f) AM_WRITE(toaplan1_bcu_control_w)
402		AM_RANGE(0x084000, 0x0847ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE(&toaplan1_colorram1) AM_SIZE(&toaplan1_colorram1_size)
403		AM_RANGE(0x086000, 0x0867ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE(&toaplan1_colorram2) AM_SIZE(&toaplan1_colorram2_size)
	402	AM_RANGE(0x084000, 0x0847ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram1, colorram1_size)
	403	AM_RANGE(0x086000, 0x0867ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram2, colorram2_size)
404	404	AM_RANGE(0x0c0000, 0x0c0fff) AM_READWRITE(toaplan1_shared_r, toaplan1_shared_w)
405	405	AM_RANGE(0x100000, 0x100001) AM_WRITE(toaplan1_bcu_flipscreen_w)
406	406	AM_RANGE(0x100002, 0x100003) AM_READWRITE(toaplan1_tileram_offs_r, toaplan1_tileram_offs_w)
r8962	r8963
425	425	//  AM_RANGE(0x400000, 0x400001) AM_WRITE(?? video frame related ??)
426	426	AM_RANGE(0x400002, 0x400003) AM_WRITE(toaplan1_intenable_w)
427	427	AM_RANGE(0x400008, 0x40000f) AM_WRITE(toaplan1_bcu_control_w)
428		AM_RANGE(0x404000, 0x4047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE(&toaplan1_colorram1) AM_SIZE(&toaplan1_colorram1_size)
429		AM_RANGE(0x406000, 0x4067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE(&toaplan1_colorram2) AM_SIZE(&toaplan1_colorram2_size)
	428	AM_RANGE(0x404000, 0x4047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram1, colorram1_size)
	429	AM_RANGE(0x406000, 0x4067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram2, colorram2_size)
430	430	AM_RANGE(0x440000, 0x440fff) AM_READWRITE(toaplan1_shared_r, toaplan1_shared_w)
431	431	AM_RANGE(0x480000, 0x480001) AM_WRITE(toaplan1_bcu_flipscreen_w)
432	432	AM_RANGE(0x480002, 0x480003) AM_READWRITE(toaplan1_tileram_offs_r, toaplan1_tileram_offs_w)
r8962	r8963
444	444	//  AM_RANGE(0x400000, 0x400001) AM_WRITE(?? video frame related ??)
445	445	AM_RANGE(0x400002, 0x400003) AM_WRITE(toaplan1_intenable_w)
446	446	AM_RANGE(0x400008, 0x40000f) AM_WRITE(toaplan1_bcu_control_w)
447		AM_RANGE(0x404000, 0x4047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE(&toaplan1_colorram1) AM_SIZE(&toaplan1_colorram1_size)
448		AM_RANGE(0x406000, 0x4067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE(&toaplan1_colorram2) AM_SIZE(&toaplan1_colorram2_size)
	447	AM_RANGE(0x404000, 0x4047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram1, colorram1_size)
	448	AM_RANGE(0x406000, 0x4067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram2, colorram2_size)
449	449	AM_RANGE(0x600000, 0x600fff) AM_READWRITE(toaplan1_shared_r, toaplan1_shared_w)
450	450	AM_RANGE(0x800000, 0x800001) AM_WRITE(toaplan1_bcu_flipscreen_w)
451	451	AM_RANGE(0x800002, 0x800003) AM_READWRITE(toaplan1_tileram_offs_r, toaplan1_tileram_offs_w)
r8962	r8963
472	472	//  AM_RANGE(0x100000, 0x100001) AM_WRITE(?? video frame related ??)
473	473	AM_RANGE(0x100002, 0x100003) AM_WRITE(toaplan1_intenable_w)
474	474	AM_RANGE(0x100008, 0x10000f) AM_WRITE(toaplan1_bcu_control_w)
475		AM_RANGE(0x104000, 0x1047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE(&toaplan1_colorram1) AM_SIZE(&toaplan1_colorram1_size)
476		AM_RANGE(0x106000, 0x1067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE(&toaplan1_colorram2) AM_SIZE(&toaplan1_colorram2_size)
	475	AM_RANGE(0x104000, 0x1047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram1, colorram1_size)
	476	AM_RANGE(0x106000, 0x1067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram2, colorram2_size)
477	477	AM_RANGE(0x140000, 0x140001) AM_READ_PORT("P1")
478	478	AM_RANGE(0x140002, 0x140003) AM_READ_PORT("P2")
479	479	AM_RANGE(0x140004, 0x140005) AM_READ_PORT("DSWA")
r8962	r8963
509	509	//  AM_RANGE(0x300000, 0x300001) AM_WRITE(?? video frame related ??)
510	510	AM_RANGE(0x300002, 0x300003) AM_WRITE(toaplan1_intenable_w)
511	511	AM_RANGE(0x300008, 0x30000f) AM_WRITE(toaplan1_bcu_control_w)
512		AM_RANGE(0x304000, 0x3047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE(&toaplan1_colorram1) AM_SIZE(&toaplan1_colorram1_size)
513		AM_RANGE(0x306000, 0x3067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE(&toaplan1_colorram2) AM_SIZE(&toaplan1_colorram2_size)
	512	AM_RANGE(0x304000, 0x3047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram1, colorram1_size)
	513	AM_RANGE(0x306000, 0x3067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram2, colorram2_size)
514	514	AM_RANGE(0x340000, 0x340003) AM_WRITE(toaplan1_tile_offsets_w)
515	515	AM_RANGE(0x340006, 0x340007) AM_WRITE(toaplan1_fcu_flipscreen_w)
516	516	ADDRESS_MAP_END
r8962	r8963
527	527	//  AM_RANGE(0x400000, 0x400001) AM_WRITE(?? video frame related ??)
528	528	AM_RANGE(0x400002, 0x400003) AM_WRITE(toaplan1_intenable_w)
529	529	AM_RANGE(0x400008, 0x40000f) AM_WRITE(toaplan1_bcu_control_w)
530		AM_RANGE(0x404000, 0x4047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE(&toaplan1_colorram1) AM_SIZE(&toaplan1_colorram1_size)
531		AM_RANGE(0x406000, 0x4067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE(&toaplan1_colorram2) AM_SIZE(&toaplan1_colorram2_size)
	530	AM_RANGE(0x404000, 0x4047ff) AM_READWRITE(toaplan1_colorram1_r, toaplan1_colorram1_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram1, colorram1_size)
	531	AM_RANGE(0x406000, 0x4067ff) AM_READWRITE(toaplan1_colorram2_r, toaplan1_colorram2_w) AM_BASE_SIZE_MEMBER(toaplan1_state, colorram2, colorram2_size)
532	532	AM_RANGE(0x440000, 0x440005) AM_READWRITE(vimana_mcu_r, vimana_mcu_w)  /* shared memory from 0x440000 to 0x44ffff ? */
533	533	AM_RANGE(0x440006, 0x440007) AM_READ_PORT("DSWA")
534	534	AM_RANGE(0x440008, 0x440009) AM_READ(vimana_system_port_r)   /* "SYSTEM" + coinage simulation */
r8962	r8963
548	548
549	549	static ADDRESS_MAP_START( toaplan1_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
550	550	AM_RANGE(0x0000, 0x7fff) AM_ROM
551		AM_RANGE(0x8000, 0xffff) AM_RAM AM_BASE(&toaplan1_sharedram)
	551	AM_RANGE(0x8000, 0xffff) AM_RAM AM_BASE_MEMBER(toaplan1_state, sharedram)
552	552	ADDRESS_MAP_END
553	553
554	554	static ADDRESS_MAP_START( rallybik_sound_io_map, ADDRESS_SPACE_IO, 8 )
r8962	r8963
1512	1512
1513	1513	static MACHINE_DRIVER_START( rallybik )
1514	1514
	1515	MDRV_DRIVER_DATA( toaplan1_state )
	1516
1515	1517	/* basic machine hardware */
1516	1518	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz)
1517	1519	MDRV_CPU_PROGRAM_MAP(rallybik_main_map)
r8962	r8963
1526	1528	MDRV_MACHINE_RESET(toaplan1)
1527	1529
1528	1530	/* video hardware */
1529		MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK | VIDEO_BUFFERS_SPRITERAM)
	1531	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1530	1532
1531	1533	MDRV_SCREEN_ADD("screen", RASTER)
1532	1534	MDRV_SCREEN_REFRESH_RATE(55.14)      /* verified on pcb */
r8962	r8963
1552	1554
1553	1555	static MACHINE_DRIVER_START( truxton )
1554	1556
	1557	MDRV_DRIVER_DATA( toaplan1_state )
	1558
1555	1559	/* basic machine hardware */
1556	1560	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz)
1557	1561	MDRV_CPU_PROGRAM_MAP(truxton_main_map)
r8962	r8963
1592	1596
1593	1597	static MACHINE_DRIVER_START( hellfire )
1594	1598
	1599	MDRV_DRIVER_DATA( toaplan1_state )
	1600
1595	1601	/* basic machine hardware */
1596	1602	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz)
1597	1603	MDRV_CPU_PROGRAM_MAP(hellfire_main_map)
r8962	r8963
1632	1638
1633	1639	static MACHINE_DRIVER_START( zerowing )
1634	1640
	1641	MDRV_DRIVER_DATA( toaplan1_state )
	1642
1635	1643	/* basic machine hardware */
1636	1644	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz)
1637	1645	MDRV_CPU_PROGRAM_MAP(zerowing_main_map)
r8962	r8963
1672	1680
1673	1681	static MACHINE_DRIVER_START( demonwld )
1674	1682
	1683	MDRV_DRIVER_DATA( toaplan1_state )
	1684
1675	1685	/* basic machine hardware */
1676	1686	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz)
1677	1687	MDRV_CPU_PROGRAM_MAP(demonwld_main_map)
r8962	r8963
1703	1713
1704	1714	MDRV_VIDEO_START(toaplan1)
1705	1715	MDRV_VIDEO_EOF(toaplan1)
1706		MDRV_VIDEO_UPDATE(demonwld)
	1716	MDRV_VIDEO_UPDATE(toaplan1)
1707	1717
1708	1718	/* sound hardware */
1709	1719	MDRV_SPEAKER_STANDARD_MONO("mono")
r8962	r8963
1716	1726
1717	1727	static MACHINE_DRIVER_START( samesame )
1718	1728
	1729	MDRV_DRIVER_DATA( toaplan1_state )
	1730
1719	1731	/* basic machine hardware */
1720	1732	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz)
1721	1733	MDRV_CPU_PROGRAM_MAP(samesame_main_map)
r8962	r8963
1754	1766
1755	1767	static MACHINE_DRIVER_START( outzone )
1756	1768
	1769	MDRV_DRIVER_DATA( toaplan1_state )
	1770
1757	1771	/* basic machine hardware */
1758	1772	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz)
1759	1773	MDRV_CPU_PROGRAM_MAP(outzone_main_map)
r8962	r8963
1794	1808
1795	1809	static MACHINE_DRIVER_START( vimana )
1796	1810
	1811	MDRV_DRIVER_DATA( toaplan1_state )
	1812
1797	1813	/* basic machine hardware */
1798	1814	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz)   /* verified on pcb */
1799	1815	MDRV_CPU_PROGRAM_MAP(vimana_main_map)

src/mame/drivers/segag80r.c

r8962	r8963
184	184	*
185	185	*************************************/
186	186
187		static offs_t decrypt_offset(const address_space *space, offs_t offset)
	187	static offs_t decrypt_offset(address_space *space, offs_t offset)
188	188	{
189	189	/* ignore anything but accesses via opcode $32 (LD $(XXYY),A) */
190	190	offs_t pc = cpu_get_previouspc(space->cpu);
191		if ((UINT16)pc == 0xffff || memory_read_byte(space, pc) != 0x32)
	191	if ((UINT16)pc == 0xffff || space->read_byte(pc) != 0x32)
192	192	return offset;
193	193
194	194	/* fetch the low byte of the address and munge it */
195		return (offset & 0xff00) | (*sega_decrypt)(pc, memory_read_byte(space, pc + 1));
	195	return (offset & 0xff00) | (*sega_decrypt)(pc, space->read_byte(pc + 1));
196	196	}
197	197
198	198	static WRITE8_HANDLER( mainram_w )         { mainram[decrypt_offset(space, offset)] = data; }
r8962	r8963
297	297
298	298	static WRITE8_DEVICE_HANDLER( sindbadm_soundport_w )
299	299	{
300		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	300	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
301	301	soundlatch_w(space, 0, data);
302	302	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
303	303	cpuexec_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(50));

src/mame/drivers/tmnt.c

r8962	r8963
367	367	static READ16_HANDLER( ssriders_protection_r )
368	368	{
369	369	tmnt_state *state = space->machine->driver_data<tmnt_state>();
370		int data = memory_read_word(space, 0x105a0a);
371		int cmd = memory_read_word(space, 0x1058fc);
	370	int data = space->read_word(0x105a0a);
	371	int cmd = space->read_word(0x1058fc);
372	372
373	373	switch (cmd)
374	374	{
r8962	r8963
395	395
396	396	case 0x8abc:
397	397	/* collision table */
398		data = -memory_read_word(space, 0x105818);
	398	data = -space->read_word(0x105818);
399	399	data = ((data / 8 - 4) & 0x1f) * 0x40;
400		data += ((memory_read_word(space, 0x105cb0) +
	400	data += ((space->read_word(0x105cb0) +
401	401	256 * k052109_r(state->k052109, 0x1a01) + k052109_r(state->k052109, 0x1a00) - 6) / 8 + 12) & 0x3f;
402	402	return data;
403	403
r8962	r8963
424	424
425	425	for (i = 0; i < 128; i++)
426	426	{
427		if ((memory_read_word(space, 0x180006 + 128 * i) >> 8) == logical_pri)
	427	if ((space->read_word(0x180006 + 128 * i) >> 8) == logical_pri)
428	428	{
429	429	k053245_word_w(state->k053245, 8 * i, hardware_pri, 0x00ff);
430	430	hardware_pri++;
r8962	r8963
806	806	return 0;
807	807	}
808	808
809		static void tmnt2_put_word( const address_space *space, UINT32 addr, UINT16 data )
	809	static void tmnt2_put_word( address_space *space, UINT32 addr, UINT16 data )
810	810	{
811	811	tmnt_state *state = space->machine->driver_data<tmnt_state>();
812	812
r8962	r8963
967	967
968	968	CellVar >>= 1;
969	969
970		memory_write_word(space, dst + 0x00, 0x8000 | ((src[1] & 0xfc00) >> 2));   /* size, flip xy */
971		memory_write_word(space, dst + 0x04, src[0]);   /* code */
972		memory_write_word(space, dst + 0x18, (src[1] & 0x3ff) ^      /* color, mirror, priority */
	970	space->write_word(dst + 0x00, 0x8000 | ((src[1] & 0xfc00) >> 2));   /* size, flip xy */
	971	space->write_word(dst + 0x04, src[0]);   /* code */
	972	space->write_word(dst + 0x18, (src[1] & 0x3ff) ^      /* color, mirror, priority */
973	973	(sunset_104000[CellVar + 0x00] & 0x0060));
974	974
975	975	/* base color modifier */
r8962	r8963
979	979	/* Also, the bosses don't blink when they are about to die - don't know */
980	980	/* if this is correct or not. */
981	981	//      if (state->sunset_104000[CellVar + 0x15] & 0x001f)
982		//          memory_write_word(dst + 0x18, (memory_read_word(space, dst + 0x18) & 0xffe0) |
	982	//          dst + 0x18->write_word((space->read_word(dst + 0x18) & 0xffe0) |
983	983	//                  (state->sunset_104000[CellVar + 0x15] & 0x001f));
984	984
985	985	x = src[2];
986	986	if (state->sunset_104000[CellVar + 0x00] & 0x4000)
987	987	{
988	988	/* flip x */
989		memory_write_word(space, dst + 0x00, memory_read_word(space, dst + 0x00) ^ 0x1000);
	989	space->write_word(dst + 0x00, space->read_word(dst + 0x00) ^ 0x1000);
990	990	x = -x;
991	991	}
992	992	x += state->sunset_104000[CellVar + 0x06];
993		memory_write_word(space, dst + 0x0c, x);
	993	space->write_word(dst + 0x0c, x);
994	994	y = src[3];
995	995	y += state->sunset_104000[CellVar + 0x07];
996	996	/* don't do second offset for shadows */
997	997	if ((state->tmnt2_1c0800[0x08] & 0x00ff) != 0x01)
998	998	y += state->sunset_104000[CellVar + 0x08];
999		memory_write_word(space, dst + 0x08, y);
	999	space->write_word(dst + 0x08, y);
1000	1000	#if 0
1001	1001	logerror("copy command %04x sprite %08x data %08x: %04x%04x %04x%04x  modifiers %08x:%04x%04x %04x%04x %04x%04x %04x%04x %04x%04x %04x%04x %04x%04x %04x%04x %04x%04x %04x%04x %04x%04x %04x%04x\n",
1002	1002	state->tmnt2_1c0800[0x05],

src/mame/drivers/raiden2.c

r8962	r8963
682	682	// XXX
683	683	// write only: 4c0 4c1 500 501 502 503
684	684
685		static UINT16 handle_io_r(const address_space *space, int offset)
	685	static UINT16 handle_io_r(address_space *space, int offset)
686	686	{
687	687	logerror("io_r %04x, %04x (%x)\n", offset*2, mainram[offset], cpu_get_pc(space->cpu));
688	688	return mainram[offset];
689	689	}
690	690
691		static void handle_io_w(const address_space *space, int offset, UINT16 data, UINT16 mem_mask)
	691	static void handle_io_w(address_space *space, int offset, UINT16 data, UINT16 mem_mask)
692	692	{
693	693	COMBINE_DATA(&mainram[offset]);
694	694	switch(offset) {

src/mame/drivers/taitojc.c

r8962	r8963
479	479
480	480
481	481
482		static UINT8 mcu_comm_reg_r(const address_space *space, int reg)
	482	static UINT8 mcu_comm_reg_r(address_space *space, int reg)
483	483	{
484	484	taitojc_state *state = space->machine->driver_data<taitojc_state>();
485	485	UINT8 r = 0;
r8962	r8963
506	506	return r;
507	507	}
508	508
509		static void mcu_comm_reg_w(const address_space *space, int reg, UINT8 data)
	509	static void mcu_comm_reg_w(address_space *space, int reg, UINT8 data)
510	510	{
511	511	taitojc_state *state = space->machine->driver_data<taitojc_state>();
512	512

src/mame/drivers/berzerk.c

r8962	r8963
544	544
545	545	static SOUND_RESET(berzerk)
546	546	{
547		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	547	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
548	548	/* clears the flip-flop controlling the volume and freq on the speech chip */
549	549	berzerk_audio_w(space, 4, 0x40);
550	550	}
r8962	r8963
1185	1185
1186	1186	static DRIVER_INIT( moonwarp )
1187	1187	{
1188		const address_space *io = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1188	address_space *io = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1189	1189	memory_install_read8_handler (io, 0x48, 0x48, 0, 0, moonwarp_p1_r);
1190	1190	memory_install_read8_handler (io, 0x4a, 0x4a, 0, 0, moonwarp_p2_r);
1191	1191	}

src/mame/drivers/model3.c

r8962	r8963
1014	1014
1015	1015	static UINT32 scsi_fetch(running_machine *machine, UINT32 dsp)
1016	1016	{
1017		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1017	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1018	1018	UINT32 result;
1019		result = memory_read_dword(space, dsp);
	1019	result = space->read_dword(dsp);
1020	1020	return FLIPENDIAN_INT32(result);
1021	1021	}
1022	1022
r8962	r8963
1119	1119
1120	1120	static void real3d_dma_callback(running_machine *machine, UINT32 src, UINT32 dst, int length, int byteswap)
1121	1121	{
1122		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1122	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1123	1123	switch(dst >> 24)
1124	1124	{
1125	1125	case 0x88:      /* Display List End Trigger */

src/mame/drivers/mrflea.c

r8962	r8963
37	37	x  x  VD_J11 VD_J10  x  x  VD_J7 VD_J6     VD_K4 VD_K3 VD_K2 VD_K1
38	38	x  x  VD-L11 VD_L10  x  x  VD_L7 VD_L6     VD_L4 VD_L3 VD_L2 VD_L1
39	39
	40
	41	Stephh's notes (based on the games Z80 code and some tests) :
	42
	43	- DSW1 bits 0 and 1 determine the "Bonus life" value (1 OFF - 0 ON) :
	44	* ......11 : 10000 points
	45	* ......10 : 20000 points
	46	* ......01 : 30000 points
	47	* ......00 : 40000 points
	48	- DSW1 bit 2 determines the "Bonus life" occurence (1 OFF - 0 ON) :
	49	* .....1.. : many extra lives can be awarded every "value" points
	50	* .....0.. : only one extra life can be awarded at "value" points
	51	- When DSW1 bit 3 is OFF, you can't get any extra lives (code at 0x3368).
	52	- I've decided to merge these 4 bits in a single choice for the end-user.
	53	- Credits are coded on 1 byte (0xc6bd) then are divided by 2 for display
	54	so it can display 1/2 credits when coinage is set to 2C_1C or 2C_3C.
	55	Surprisingly, due to code at 0x2f77, credits are limited to 15 when
	56	coinage is set to 1C_1C or 1C_2C and to 14 1/2 is set to 2C_1C or 2C_3C.
	57	- Level is stored 1 byte (0xc70c), range 0x00-0x07 (code at 0x071d and 0x072c).
	58	This means that if you complete level 8, you'll restart from level 1
	59	with its initial difficulty (based on the Dip Switch settings).
	60
40	61	******************************************************************/
41	62
42	63	#include "emu.h"
r8962	r8963
192	213	*
193	214	*************************************/
194	215
	216	/* verified from Z80 code */
195	217	static INPUT_PORTS_START( mrflea )
	218	/* AY1 port 1 -> 0x807d (CPU1) -> 0xcabe (CPU0) with bits in reverse order */
196	219	PORT_START("IN0")
197		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
198		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
199		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
	220	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_4WAY
	221	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_4WAY
	222	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_4WAY
200	223	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
201	224	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
202	225	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
203	226	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 )
204		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	227	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
205	228
	229	/* AY1 port 0 -> 0x807e (CPU1) -> 0xcabf (CPU0) with bits in reverse order */
206	230	PORT_START("IN1")
207		PORT_BIT( 0x03, IP_ACTIVE_LOW, IPT_UNKNOWN )
208	231	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
209		PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNKNOWN )
	232	PORT_BIT( 0xfb, IP_ACTIVE_LOW, IPT_UNUSED )
210	233
	234	/* AY2 port 1, cpl'ed -> 0x807f (CPU1) -> 0xcac1 (CPU0) */
211	235	PORT_START("DSW1")
212		/*
213		------xx
214		-----x--
215		----x---
216		*/
217		PORT_DIPNAME( 0x03, 0x03, "Bonus?" )
218		PORT_DIPSETTING( 0x03, "A" )
219		PORT_DIPSETTING( 0x02, "B" )
220		PORT_DIPSETTING( 0x01, "C" )
221		PORT_DIPSETTING( 0x00, "D" )
222		PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
223		PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
224		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
225		PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
226		PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
227		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
228		PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
229		PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
230		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
231		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
232		PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
233		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
234		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
235		PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
236		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
237		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
238		PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
239		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	236	PORT_DIPNAME( 0x0f, 0x07, DEF_STR( Bonus_Life ) )       /* see notes - table of tables at 0x3475 (4 * 1 word, LSB first) */
	237	PORT_DIPSETTING(    0x07, "Every 10k" )
	238	PORT_DIPSETTING(    0x06, "Every 20k" )
	239	PORT_DIPSETTING(    0x05, "Every 30k" )
	240	PORT_DIPSETTING(    0x04, "Every 40k" )
	241	PORT_DIPSETTING(    0x03, "10k only" )
	242	PORT_DIPSETTING(    0x02, "20k only" )
	243	PORT_DIPSETTING(    0x01, "30k only" )
	244	PORT_DIPSETTING(    0x00, "40K only" )
	245	PORT_DIPSETTING(    0x0f, DEF_STR( None ) )
	246	PORT_DIPUNUSED( 0x10, 0x10 )
	247	PORT_DIPUNUSED( 0x20, 0x20 )
	248	PORT_DIPUNUSED( 0x40, 0x40 )
	249	PORT_DIPUNUSED( 0x80, 0x80 )
240	250
	251	/* AY2 port 0, cpl'ed -> 0x8080 (CPU1) -> 0xcac0 (CPU0) */
241	252	PORT_START("DSW2")
242		PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )
	253	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )          /* see notes */
243	254	PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
244	255	PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
245	256	PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
r8962	r8963
249	260	PORT_DIPSETTING( 0x08, "4" )
250	261	PORT_DIPSETTING( 0x04, "5" )
251	262	PORT_DIPSETTING( 0x00, "7" )
252		PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) )
	263	PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) )       /* see notes */
253	264	PORT_DIPSETTING( 0x30, DEF_STR( Easy ) )
254	265	PORT_DIPSETTING( 0x20, DEF_STR( Medium ) )
255	266	PORT_DIPSETTING( 0x10, DEF_STR( Hard ) )
256	267	PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
257		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
258		PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
259		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
260		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
261		PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
262		PORT_DIPSETTING( 0x00, DEF_STR( On ) )
	268	PORT_DIPUNUSED( 0x40, 0x40 )
	269	PORT_DIPUNUSED( 0x80, 0x80 )
263	270	INPUT_PORTS_END
264	271
265	272

src/mame/drivers/cps3.c

r8962	r8963
607	607
608	608
609	609
610		static DIRECT_UPDATE_HANDLER( cps3_direct_handler );
	610	DIRECT_UPDATE_HANDLER( cps3_direct_handler );
611	611
612	612	/* Encryption */
613	613
r8962	r8963
706	706
707	707
708	708	cps3_0xc0000000_ram_decrypted = auto_alloc_array(machine, UINT32, 0x400/4);
709		memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), cps3_direct_handler);
710	709
	710	address_space *main = machine->device<sh2_device>("maincpu")->space(AS_PROGRAM);
	711	main->set_direct_update_handler(direct_update_delegate_create_static(cps3_direct_handler, *machine));
	712
711	713	// flash roms
712	714
713	715	for (i=0;i<48;i++)
r8962	r8963
1263	1265
1264	1266
1265	1267
1266		static DIRECT_UPDATE_HANDLER( cps3_direct_handler )
	1268	DIRECT_UPDATE_HANDLER( cps3_direct_handler )
1267	1269	{
1268	1270	//  if(DEBUG_PRINTF) printf("address %04x\n",address);
1269	1271
1270	1272	/* BIOS ROM */
1271	1273	if (address < 0x80000)
1272	1274	{
1273		direct->raw = direct->decrypted = memory_region(space->machine, "user1");
	1275	direct.explicit_configure(0x00000, 0x7ffff, 0x7ffff, *direct.space().m_machine.region("user1"));
1274	1276	return ~0;
1275	1277	}
1276	1278	/* RAM */
1277	1279	else if (address >= 0x06000000 && address <= 0x06ffffff)
1278	1280	{
1279		direct->decrypted = (UINT8*)decrypted_gamerom-0x06000000;
1280		direct->raw = (UINT8*)decrypted_gamerom-0x06000000;
	1281	UINT8 *decrypted = (UINT8*)decrypted_gamerom;
	1282	UINT8 *raw = decrypted;
1281	1283
1282		if (cps3_altEncryption) direct->raw = (UINT8*) cps3_user4region-0x06000000;
	1284	if (cps3_altEncryption) raw = (UINT8*) cps3_user4region;
1283	1285
	1286	direct.explicit_configure(0x06000000, 0x06ffffff, 0x00ffffff, raw, decrypted);
1284	1287
1285	1288	return ~0;
1286	1289	}
1287	1290	else if (address >= 0xc0000000 && address <= 0xc00003ff)
1288	1291	{
1289	1292	//direct->decrypted = (void*)cps3_0xc0000000_ram_decrypted;
1290		direct->decrypted = (UINT8*)cps3_0xc0000000_ram_decrypted-0xc0000000;
1291		direct->raw = (UINT8*)cps3_0xc0000000_ram-0xc0000000;
	1293	direct.explicit_configure(0xc0000000, 0xc00003ff, 0x3ff, (UINT8*)cps3_0xc0000000_ram, (UINT8*)cps3_0xc0000000_ram_decrypted);
1292	1294	return ~0;
1293	1295	}
1294	1296
1295	1297	/* anything else falls through to NOPs */
1296		direct->decrypted = (UINT8*)cps3_nops-address;
1297		direct->raw = (UINT8*)cps3_nops-address;
	1298	direct.explicit_configure(address, address, 0, (UINT8*)cps3_nops, (UINT8*)cps3_nops);
1298	1299	return ~0;
1299	1300	}
1300	1301

src/mame/drivers/spiders.c

r8962	r8963
387	387	}
388	388
389	389
390		static const ttl74123_config ic60_intf =
	390	static const ttl74123_interface ic60_intf =
391	391	{
392	392	TTL74123_GROUNDED,   /* the hook up type */
393	393	RES_K(22),         /* resistor connected to RCext */

src/mame/drivers/seattle.c

r8962	r8963
470	470	static void update_vblank_irq(running_machine *machine);
471	471	static void galileo_reset(void);
472	472	static TIMER_CALLBACK( galileo_timer_callback );
473		static void galileo_perform_dma(const address_space *space, int which);
	473	static void galileo_perform_dma(address_space *space, int which);
474	474	static void voodoo_stall(running_device *device, int stall);
475	475	static void widget_reset(running_machine *machine);
476	476	static void update_widget_irq(running_machine *machine);
r8962	r8963
758	758	*
759	759	*************************************/
760	760
761		static UINT32 pci_bridge_r(const address_space *space, UINT8 reg, UINT8 type)
	761	static UINT32 pci_bridge_r(address_space *space, UINT8 reg, UINT8 type)
762	762	{
763	763	UINT32 result = galileo.pci_bridge_regs[reg];
764	764
r8962	r8963
779	779	}
780	780
781	781
782		static void pci_bridge_w(const address_space *space, UINT8 reg, UINT8 type, UINT32 data)
	782	static void pci_bridge_w(address_space *space, UINT8 reg, UINT8 type, UINT32 data)
783	783	{
784	784	galileo.pci_bridge_regs[reg] = data;
785	785	if (LOG_PCI)
r8962	r8963
794	794	*
795	795	*************************************/
796	796
797		static UINT32 pci_3dfx_r(const address_space *space, UINT8 reg, UINT8 type)
	797	static UINT32 pci_3dfx_r(address_space *space, UINT8 reg, UINT8 type)
798	798	{
799	799	UINT32 result = galileo.pci_3dfx_regs[reg];
800	800
r8962	r8963
815	815	}
816	816
817	817
818		static void pci_3dfx_w(const address_space *space, UINT8 reg, UINT8 type, UINT32 data)
	818	static void pci_3dfx_w(address_space *space, UINT8 reg, UINT8 type, UINT32 data)
819	819	{
820	820	galileo.pci_3dfx_regs[reg] = data;
821	821
r8962	r8963
843	843	*
844	844	*************************************/
845	845
846		static UINT32 pci_ide_r(const address_space *space, UINT8 reg, UINT8 type)
	846	static UINT32 pci_ide_r(address_space *space, UINT8 reg, UINT8 type)
847	847	{
848	848	UINT32 result = galileo.pci_ide_regs[reg];
849	849
r8962	r8963
864	864	}
865	865
866	866
867		static void pci_ide_w(const address_space *space, UINT8 reg, UINT8 type, UINT32 data)
	867	static void pci_ide_w(address_space *space, UINT8 reg, UINT8 type, UINT32 data)
868	868	{
869	869	galileo.pci_ide_regs[reg] = data;
870	870	if (LOG_PCI)
r8962	r8963
925	925	*
926	926	*************************************/
927	927
928		static int galileo_dma_fetch_next(const address_space *space, int which)
	928	static int galileo_dma_fetch_next(address_space *space, int which)
929	929	{
930	930	offs_t address = 0;
931	931	UINT32 data;
r8962	r8963
947	947	}
948	948
949	949	/* fetch the byte count */
950		data = memory_read_dword(space, address); address += 4;
	950	data = space->read_dword(address); address += 4;
951	951	galileo.reg[GREG_DMA0_COUNT + which] = data;
952	952
953	953	/* fetch the source address */
954		data = memory_read_dword(space, address); address += 4;
	954	data = space->read_dword(address); address += 4;
955	955	galileo.reg[GREG_DMA0_SOURCE + which] = data;
956	956
957	957	/* fetch the dest address */
958		data = memory_read_dword(space, address); address += 4;
	958	data = space->read_dword(address); address += 4;
959	959	galileo.reg[GREG_DMA0_DEST + which] = data;
960	960
961	961	/* fetch the next record address */
962		data = memory_read_dword(space, address); address += 4;
	962	data = space->read_dword(address); address += 4;
963	963	galileo.reg[GREG_DMA0_NEXT + which] = data;
964	964	return 1;
965	965	}
966	966
967	967
968		static void galileo_perform_dma(const address_space *space, int which)
	968	static void galileo_perform_dma(address_space *space, int which)
969	969	{
970	970	do
971	971	{
r8962	r8963
1016	1016	}
1017	1017
1018	1018	/* write the data and advance */
1019		voodoo_w(voodoo, (dstaddr & 0xffffff) / 4, memory_read_dword(space, srcaddr), 0xffffffff);
	1019	voodoo_w(voodoo, (dstaddr & 0xffffff) / 4, space->read_dword(srcaddr), 0xffffffff);
1020	1020	srcaddr += srcinc;
1021	1021	dstaddr += dstinc;
1022	1022	bytesleft -= 4;
r8962	r8963
1028	1028	{
1029	1029	while (bytesleft > 0)
1030	1030	{
1031		memory_write_byte(space, dstaddr, memory_read_byte(space, srcaddr));
	1031	space->write_byte(dstaddr, space->read_byte(srcaddr));
1032	1032	srcaddr += srcinc;
1033	1033	dstaddr += dstinc;
1034	1034	bytesleft--;
r8962	r8963
1347	1347	for (which = 0; which < 4; which++)
1348	1348	if (galileo.dma_stalled_on_voodoo[which])
1349	1349	{
1350		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1350	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1351	1351	if (LOG_DMA) logerror("Resuming DMA%d on voodoo\n", which);
1352	1352
1353	1353	/* mark this DMA as no longer stalled */
r8962	r8963
2450	2450	*
2451	2451	*************************************/
2452	2452
2453		static const mips3_config config =
	2453	static const mips3_config r5000_config =
2454	2454	{
2455	2455	16384,      /* code cache size */
2456	2456	16384,      /* data cache size */
r8962	r8963
2461	2461
2462	2462	/* basic machine hardware */
2463	2463	MDRV_CPU_ADD("maincpu", R5000LE, SYSTEM_CLOCK*3)
2464		MDRV_CPU_CONFIG(config)
	2464	MDRV_CPU_CONFIG(r5000_config)
2465	2465	MDRV_CPU_PROGRAM_MAP(seattle_map)
2466	2466
2467	2467	MDRV_MACHINE_START(seattle)
r8962	r8963
2495	2495	MDRV_IMPORT_FROM(dcs2_audio_2115)
2496	2496
2497	2497	MDRV_CPU_REPLACE("maincpu", R4700LE, SYSTEM_CLOCK*2)
2498		MDRV_CPU_CONFIG(config)
	2498	MDRV_CPU_CONFIG(r5000_config)
2499	2499	MDRV_CPU_PROGRAM_MAP(seattle_map)
2500	2500	MACHINE_DRIVER_END
2501	2501
r8962	r8963
2505	2505	MDRV_IMPORT_FROM(dcs2_audio_2115)
2506	2506
2507	2507	MDRV_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*3)
2508		MDRV_CPU_CONFIG(config)
	2508	MDRV_CPU_CONFIG(r5000_config)
2509	2509	MDRV_CPU_PROGRAM_MAP(seattle_map)
2510	2510	MACHINE_DRIVER_END
2511	2511
r8962	r8963
2521	2521	MDRV_IMPORT_FROM(dcs2_audio_2115)
2522	2522
2523	2523	MDRV_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*4)
2524		MDRV_CPU_CONFIG(config)
	2524	MDRV_CPU_CONFIG(r5000_config)
2525	2525	MDRV_CPU_PROGRAM_MAP(seattle_map)
2526	2526	MACHINE_DRIVER_END
2527	2527
r8962	r8963
2537	2537	MDRV_IMPORT_FROM(cage_seattle)
2538	2538
2539	2539	MDRV_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*4)
2540		MDRV_CPU_CONFIG(config)
	2540	MDRV_CPU_CONFIG(r5000_config)
2541	2541	MDRV_CPU_PROGRAM_MAP(seattle_map)
2542	2542
2543	2543	MDRV_SMC91C94_ADD("ethernet", ethernet_interrupt)

src/mame/drivers/alpha68k.c

r8962	r8963
26	26	the microcontroller is able to write to anywhere within main memory.
27	27
28	28	Gold Medalist (bootleg) has a 68705 in place of the Alpha controller.
	29	(Kyros bootleg also? we have decapped MCU dumps of different types for it)
29	30
30	31	V boards have more memory and double the amount of colours as II boards.
31	32
r8962	r8963
97	98	* bit 6 (when "Difficulty" Dip Switch is set to DEF_STR( Hard ) or DEF_STR( Hardest ))
98	99	determines if some coordonates are displayed.
99	100
100		8)  'gangwarsb'
	101	8)  'gangwars'
101	102
102	103	- When "Coin Slots" Dip Switch is set to "1", COIN2 only adds ONE credit
103	104	and this has nothing to do with the microcontroller stuff.
r8962	r8963
127	128	- Add READ16_HANDLER( *_cycle_r ) for the following games :
128	129	* timesold1  (based on the one from 'timesold')
129	130	* btlfield  (based on the one from 'timesold')
130		* gangwarsb  (I splitted the one from 'gangwars')
	131	* gangwars  (I splitted the one from 'gangwarsu')
131	132	* skyadvnt, skyadvntu and skyadvntj
132	133	- Change manufacturer for the following games :
133	134	* timesold
r8962	r8963
180	181	DIP locations verified from manuals for:
181	182	- tnextspc
182	183	- btlfield
183		- gangwarsb
	184	- gangwars
184	185	- skyadvnt
185	186	- goldmedl
186	187	- kyros
r8962	r8963
288	289	return input_port_read(space->machine, "IN0") | inp1 | inp2 << 4;
289	290	}
290	291
	292
291	293	/******************************************************************************/
292	294
293	295	static WRITE16_HANDLER( kyros_sound_w )
r8962	r8963
1371	1373	PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
1372	1374	INPUT_PORTS_END
1373	1375
1374		static INPUT_PORTS_START( gangwars )
	1376
	1377
	1378	static INPUT_PORTS_START( gangwarsu )
1375	1379	PORT_START("IN0")
1376	1380	ALPHA68K_PLAYER_INPUT_LSB( 1, IPT_BUTTON3, IPT_START1, IP_ACTIVE_LOW )
1377	1381
r8962	r8963
1423	1427	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1424	1428	INPUT_PORTS_END
1425	1429
1426		/* Same as 'gangwars' but bits 0-3 of 2nd set of Dip Switches are different */
1427		static INPUT_PORTS_START( gangwarsb )
1428		PORT_INCLUDE( gangwars )   /* See notes about "IN2" (microcontroller) */
	1430	/* Same as 'gangwarsu' but bits 0-3 of 2nd set of Dip Switches are different */
	1431	static INPUT_PORTS_START( gangwars )
	1432	PORT_INCLUDE( gangwarsu )   /* See notes about "IN2" (microcontroller) */
1429	1433
1430	1434	PORT_MODIFY("IN3")
1431	1435	PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:1" )      /* Listed as "Unused" */
r8962	r8963
1621	1625	static const gfx_layout spritelayout_V =
1622	1626	{
1623	1627	16,16,  /* 16*16 sprites */
1624		0x5000,
	1628	RGN_FRAC(1,4),
1625	1629	4,      /* 4 bits per pixel */
1626		{ 0, 0xa0000*8, 0x140000*8, 0x1e0000*8 },
	1630	{ RGN_FRAC(0,4), RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) },
1627	1631	{ 16*8+7, 16*8+6, 16*8+5, 16*8+4, 16*8+3, 16*8+2, 16*8+1, 16*8+0,
1628	1632	7, 6, 5, 4, 3, 2, 1, 0 },
1629	1633	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
r8962	r8963
2775	2779	#endif
2776	2780
2777	2781	ROM_REGION( 0x80000, "audiocpu", 0 ) // banking is slightly different from other Alpha68kII games
2778		ROM_LOAD( "38.bin",          0x00000,  0x08000, CRC(4bf251b8) SHA1(d69a6607e92dbe8081c7c66b6853f02d578ef73f) ) // we use the bootleg set instead
	2782	ROM_LOAD( "38.bin",          0x00000,  0x08000, BAD_DUMP CRC(4bf251b8) SHA1(d69a6607e92dbe8081c7c66b6853f02d578ef73f) ) // we use the bootleg set instead
2779	2783	ROM_CONTINUE(                0x18000,  0x08000 )
2780		ROM_LOAD( "39.bin",          0x20000,  0x10000, CRC(1d92be86) SHA1(9b6e7141653ee7b7b1915a545d381419aec4e483) )
2781		ROM_LOAD( "40.bin",          0x30000,  0x10000, CRC(8dafc4e8) SHA1(7d4898557ad638ab8461060bc7ae406d7d24c5a4) )
2782		ROM_LOAD( "1.bin",           0x40000,  0x10000, CRC(1e78062c) SHA1(821c037edf32eb8b03e5c487d3bab0622337e80b) )
	2784	ROM_LOAD( "39.bin",          0x20000,  0x10000, BAD_DUMP CRC(1d92be86) SHA1(9b6e7141653ee7b7b1915a545d381419aec4e483) )
	2785	ROM_LOAD( "40.bin",          0x30000,  0x10000, BAD_DUMP CRC(8dafc4e8) SHA1(7d4898557ad638ab8461060bc7ae406d7d24c5a4) )
	2786	ROM_LOAD( "1.bin",           0x40000,  0x10000, BAD_DUMP CRC(1e78062c) SHA1(821c037edf32eb8b03e5c487d3bab0622337e80b) )
2783	2787	//ZT
2784	2788	ROM_REGION( 0x010000, "gfx1", 0 )  /* chars */
2785	2789	ROM_LOAD( "gm.5",           0x000000, 0x08000, CRC(667f33f1) SHA1(6d05603b49927f09c9bb34e787b003eceaaf7062) )
r8962	r8963
2801	2805	ROM_LOAD16_BYTE( "gm2-7.bin", 0x20001, 0x10000, CRC(8d579505) SHA1(81f225edbba1cac65275e2929336d076afbbd2bf) )
2802	2806
2803	2807	ROM_REGION( 0x80000, "audiocpu", 0 ) // banking is slightly different from other Alpha68kII games
2804		ROM_LOAD( "38.bin",          0x00000,  0x08000, CRC(4bf251b8) SHA1(d69a6607e92dbe8081c7c66b6853f02d578ef73f) ) // we use the bootleg set instead
	2808	ROM_LOAD( "38.bin",          0x00000,  0x08000, BAD_DUMP CRC(4bf251b8) SHA1(d69a6607e92dbe8081c7c66b6853f02d578ef73f) ) // we use the bootleg set instead
2805	2809	ROM_CONTINUE(                0x18000,  0x08000 )
2806		ROM_LOAD( "39.bin",          0x20000,  0x10000, CRC(1d92be86) SHA1(9b6e7141653ee7b7b1915a545d381419aec4e483) )
2807		ROM_LOAD( "40.bin",          0x30000,  0x10000, CRC(8dafc4e8) SHA1(7d4898557ad638ab8461060bc7ae406d7d24c5a4) )
2808		ROM_LOAD( "1.bin",           0x40000,  0x10000, CRC(1e78062c) SHA1(821c037edf32eb8b03e5c487d3bab0622337e80b) )
	2810	ROM_LOAD( "39.bin",          0x20000,  0x10000, BAD_DUMP CRC(1d92be86) SHA1(9b6e7141653ee7b7b1915a545d381419aec4e483) )
	2811	ROM_LOAD( "40.bin",          0x30000,  0x10000, BAD_DUMP CRC(8dafc4e8) SHA1(7d4898557ad638ab8461060bc7ae406d7d24c5a4) )
	2812	ROM_LOAD( "1.bin",           0x40000,  0x10000, BAD_DUMP CRC(1e78062c) SHA1(821c037edf32eb8b03e5c487d3bab0622337e80b) )
2809	2813
2810	2814	ROM_REGION( 0x010000, "gfx1", 0 )  /* chars */
2811	2815	ROM_LOAD( "gm.5",           0x000000, 0x08000, CRC(667f33f1) SHA1(6d05603b49927f09c9bb34e787b003eceaaf7062) )
r8962	r8963
2919	2923	ROM_LOAD( "sachr0",         0x1e0000, 0x80000, CRC(e281b204) SHA1(50a041c701970013b84826d67c8002ccd291bfdd) )
2920	2924	ROM_END
2921	2925
	2926
2922	2927	ROM_START( gangwars )
2923	2928	ROM_REGION( 0x40000, "maincpu", 0 )
2924		ROM_LOAD16_BYTE( "u1",        0x00000, 0x20000, CRC(11433507) SHA1(df32c14d4105d3ad899dfa8e9dbc2a1fe51dfa6a) )
2925		ROM_LOAD16_BYTE( "u2",        0x00001, 0x20000, CRC(44cc375f) SHA1(38fc402014a816d9b1f7680407175adecfa39efe) )
	2929	ROM_LOAD16_BYTE( "gw-ver1-e1.19c", 0x00000, 0x20000, CRC(7752478e) SHA1(7266dd0d2c57433191ae4d1d4e17b32c8c3c8c73) )
	2930	ROM_LOAD16_BYTE( "gw-ver1-e2.19d", 0x00001, 0x20000, CRC(c2f3b85e) SHA1(79c215d8b43ec7728e3745b359e64f6bb8240881) )
	2931	ROM_REGION16_BE( 0x40000, "user1", 0 ) /* Extra code bank */
	2932	ROM_LOAD16_BYTE( "gw-ver1-e3.18c", 0x00000, 0x20000, CRC(2a5fe86e) SHA1(0e668f51430983a17e1965143a0bf3aa4d3156ee) )
	2933	ROM_LOAD16_BYTE( "gw-ver1-e4.18d", 0x00001, 0x20000, CRC(c8b60c53) SHA1(352c3bcc18cf63bcb757d774c2c2247ce0c4e736) )
2926	2934
2927	2935	ROM_REGION( 0x90000, "audiocpu", 0 )   /* Sound CPU */
2928		ROM_LOAD( "u12",            0x00000, 0x08000, CRC(2620caa1) SHA1(bd464abce0bedab68cb913321e76d83eb36ca374) )
2929		ROM_CONTINUE(               0x18000, 0x08000 )
2930		ROM_LOAD( "u9",             0x70000, 0x10000, CRC(9136745e) SHA1(d7a2bfeac69ab2dbd4565a5bd1abb1f3f1199b42) )
2931		ROM_LOAD( "u10",            0x50000, 0x10000, CRC(636978ae) SHA1(5d8093bc43192c89e230af318609222a69866b6e) )
2932		ROM_LOAD( "u11",            0x30000, 0x10000, CRC(2218ceb9) SHA1(69a843308cb0628ad856a09a33cd148f36ce0d24) )
	2936	ROM_LOAD( "gw-12.10f",      0x00000, 0x08000, CRC(e6d6c9cf) SHA1(c35a7a385592e55bdfe232d042f2228f4f7e9ffa) )
	2937	ROM_CONTINUE(                0x18000, 0x08000 )
	2938	ROM_LOAD( "gw-9.15f",      0x30000, 0x10000, CRC(84e5c946) SHA1(0b071d15b664a9c529713b1b896bdb5ebfa16c25) )
	2939	ROM_LOAD( "gw-10.13f",      0x50000, 0x10000, CRC(eb305d42) SHA1(93910cf60c1b8a87969888d8693c7d6782f1e799) )
	2940	ROM_LOAD( "gw-11.11f",      0x70000, 0x10000, CRC(7b9f2608) SHA1(8d61dfa32369450e396cc8a5d67c58eedb2167e6) )
2933	2941
2934		/*
2935
2936		These roms are from the bootleg version, the original graphics
2937		should be the same.  The original uses 4 512k mask roms and 4 128k
2938		eeproms to store the same data.  The 512k roms are not dumped but
2939		the 128k ones are and match these ones.
2940
2941		*/
2942
2943	2942	ROM_REGION( 0x020000, "gfx1", 0 )  /* chars */
2944		ROM_LOAD( "gwb_ic.m19",     0x000000, 0x10000, CRC(b75bf1d0) SHA1(c22c0049274c45701be0a7be2afc0517620a3a10) )
	2943	ROM_LOAD( "gw-13.4l",     0x000000, 0x10000, CRC(b75bf1d0) SHA1(c22c0049274c45701be0a7be2afc0517620a3a10) )
2945	2944
2946		ROM_REGION( 0x280000, "gfx2", 0 )  /* sprites */
	2945	ROM_REGION( 0x400000, "gfx2", 0 )  /* sprites */
	2946	ROM_LOAD( "guernica-c3.17h",     0x000000, 0x80000, CRC(281a4138) SHA1(47fc0d91873996e05db87323c3b08a85863f90d9) )
	2947	ROM_LOAD( "gw-5.21f",            0x080000, 0x20000, CRC(9ef36031) SHA1(2faeb6a769991ab11403c6c37507b706a61bad69) )
	2948	ROM_LOAD( "guernica-c2.18h",     0x100000, 0x80000, CRC(2fcbea97) SHA1(eb60bf374ef771e379030d2b660a813be76bed5e) )
	2949	ROM_LOAD( "gw-6.20f",            0x180000, 0x20000, CRC(ddbbcda7) SHA1(1c368ad2a4ed31748c94545fc7c808aa53d76f64) )
	2950	ROM_LOAD( "guernica-c1.20h",     0x200000, 0x80000, CRC(5d384c3b) SHA1(9bc581501d52cc3280667a9ea34f2ba9c4b6ebb1) )
	2951	ROM_LOAD( "gw-7.18f",            0x280000, 0x20000, CRC(4656d377) SHA1(67d6f714cca3891be0173c543ece5e8ab699f645) )
	2952	ROM_LOAD( "guernica-c0.21h",     0x300000, 0x80000, CRC(e60c9882) SHA1(8cf1d9cf0db72977b303fd6b469611600631ab9a) )
	2953	ROM_LOAD( "gw-8.17f",            0x380000, 0x20000, CRC(798ed82a) SHA1(1932131e05aae0a77ba8d8ef947c1a3b0b5e3d43) )
	2954
	2955	/* there is a bootleg which is otherwise identical but has the following graphic ROM arrangement */
	2956	#if 0
2947	2957	ROM_LOAD( "gwb_ic.308",     0x000000, 0x10000, CRC(321a2fdd) SHA1(b2f37f14a13bc2c2f78b2b0e27fde18a23146e22) )
2948	2958	ROM_LOAD( "gwb_ic.309",     0x010000, 0x10000, CRC(4d908f65) SHA1(6095a34ef4a6905d57c47af4a507dff3a04e5c07) )
2949	2959	ROM_LOAD( "gwb_ic.310",     0x020000, 0x10000, CRC(fc888541) SHA1(e732a03209a88fc7a23b4e4ff69a437d6fbfc2d1) )
r8962	r8963
2952	2962	ROM_LOAD( "gwb_ic.313",     0x050000, 0x10000, CRC(c18f4ca8) SHA1(f5cb666d5aa53f201b6664d1c18b89a211230e78) )
2953	2963	ROM_LOAD( "gwb_ic.314",     0x060000, 0x10000, CRC(dfc44b60) SHA1(311422d4ea77118c0058e9f1a824f74cfa79cb87) )
2954	2964	ROM_LOAD( "gwb_ic.307",     0x070000, 0x10000, CRC(28082a7f) SHA1(e30bade13e03bca49c1f7001c9440ce251ece15d) )
2955		//  ROM_LOAD( "gwb_ic.320",     0x080000, 0x10000, CRC(9a7b51d8) SHA1(0ab01972d838c938bfd07d7b4661a0ecd009b2cb) )
2956		ROM_LOAD( "gwb_ic.280",     0x080000, 0x10000, CRC(222b3dcd) SHA1(f9afe24c01daefe61939672efa2cb68bcc7235f0) ) //AT
	2965	ROM_LOAD( "gwb_ic.280",     0x080000, 0x10000, CRC(222b3dcd) SHA1(f9afe24c01daefe61939672efa2cb68bcc7235f0) )
2957	2966	ROM_LOAD( "gwb_ic.321",     0x090000, 0x10000, CRC(6b421c7b) SHA1(d96f91dc7e5f46990b05701483edf43a828a8879) )
2958		ROM_LOAD( "gwb_ic.300",     0x0a0000, 0x10000, CRC(f3fa0877) SHA1(7950ef86ee66d19693f0b7071a3a34d9200f5a19) )
2959		ROM_LOAD( "gwb_ic.301",     0x0b0000, 0x10000, CRC(f8c866de) SHA1(c6baa41bab35d4d9e80c5c52db74e9eb6b9605f5) )
2960		ROM_LOAD( "gwb_ic.302",     0x0c0000, 0x10000, CRC(5b0d587d) SHA1(852bec7d37d8cee33e5bc30080bf8a6a8d2472e5) )
2961		ROM_LOAD( "gwb_ic.303",     0x0d0000, 0x10000, CRC(d8c0e102) SHA1(f660876ab3457230b1c37835f5ad1ccd1e8e821a) )
2962		ROM_LOAD( "gwb_ic.304",     0x0e0000, 0x10000, CRC(b02bc9d8) SHA1(e0466b93c08363cceaba27c8d85e2609d12a10e7) )
2963		ROM_LOAD( "gwb_ic.305",     0x0f0000, 0x10000, CRC(5e04a9aa) SHA1(663330b467eb6406719d4d6cf7b05835b1600a37) )
2964		ROM_LOAD( "gwb_ic.306",     0x100000, 0x10000, CRC(e2172955) SHA1(af13776e6537e736815a1180a1f6bad385724b0c) )
2965		ROM_LOAD( "gwb_ic.299",     0x110000, 0x10000, CRC(e39f5599) SHA1(3c08a8163b528ebbcb627c511ccc2edacf0653c2) )
2966		//  ROM_LOAD( "gwb_ic.318",     0x120000, 0x10000, CRC(9aeaddf9) SHA1(d609314015376672be8147b9eabbfe4c5611ab73) )
2967		ROM_LOAD( "gwb_ic.320",     0x120000, 0x10000, CRC(9a7b51d8) SHA1(0ab01972d838c938bfd07d7b4661a0ecd009b2cb) ) //AT
2968		ROM_LOAD( "gwb_ic.319",     0x130000, 0x10000, CRC(c5b862b7) SHA1(a48be3e32ae5a656d8d239796e6e7bddd4a0805b) )
2969		ROM_LOAD( "gwb_ic.292",     0x140000, 0x10000, CRC(c125f7be) SHA1(5d68abd91fa4fa18275c0597c51ce6d3e743d84d) )
2970		ROM_LOAD( "gwb_ic.293",     0x150000, 0x10000, CRC(c04fce8e) SHA1(499edd3b16770d20368f49e5c66c299740831ff0) )
2971		ROM_LOAD( "gwb_ic.294",     0x160000, 0x10000, CRC(4eda3df5) SHA1(574fef723ebd8fa116b4a379036ee5ec3eb10c90) )
2972		ROM_LOAD( "gwb_ic.295",     0x170000, 0x10000, CRC(6e60c475) SHA1(928494400bbdc3571cb5b1ccb51d39537c5fd904) )
2973		ROM_LOAD( "gwb_ic.296",     0x180000, 0x10000, CRC(99b2a557) SHA1(7a4053909cb5f4b2a32f3caac4e2ccdb64c2ce84) )
2974		ROM_LOAD( "gwb_ic.297",     0x190000, 0x10000, CRC(10373f63) SHA1(98ee65c68823530ad2eefd6e570db2f38b59c48e) )
2975		ROM_LOAD( "gwb_ic.298",     0x1a0000, 0x10000, CRC(df37ec4d) SHA1(d2670dde87970a6f33ca3cd81bdc9991d663bac6) )
2976		ROM_LOAD( "gwb_ic.291",     0x1b0000, 0x10000, CRC(beb07a2e) SHA1(f2751bef1850db7173f119fc0cfeefdf47ed7a86) )
2977		//  ROM_LOAD( "gwb_ic.316",     0x1c0000, 0x10000, CRC(655b1518) SHA1(d97fd911901f92786bc22dac8e085cf4fa0cb1e9) )
2978		ROM_LOAD( "gwb_ic.318",     0x1c0000, 0x10000, CRC(9aeaddf9) SHA1(d609314015376672be8147b9eabbfe4c5611ab73) ) //AT
2979		ROM_LOAD( "gwb_ic.317",     0x1d0000, 0x10000, CRC(1622fadd) SHA1(240eaf117145773e388220513c2906ad2ac5d68b) )
2980		ROM_LOAD( "gwb_ic.284",     0x1e0000, 0x10000, CRC(4aa95d66) SHA1(e5bb51fd32a7e9dc23aa13de35b8757dc11f7908) )
2981		ROM_LOAD( "gwb_ic.285",     0x1f0000, 0x10000, CRC(3a1f3ce0) SHA1(edd8820111a3ef9558286280dc819c6d9f21212f) )
2982		ROM_LOAD( "gwb_ic.286",     0x200000, 0x10000, CRC(886e298b) SHA1(8e8b35a0b24c9c3a1d00079b60bdbaa6c8ce597b) )
2983		ROM_LOAD( "gwb_ic.287",     0x210000, 0x10000, CRC(b9542e6a) SHA1(e5762db1a44a966d2c2b7e8a92abab577e24172f) )
2984		ROM_LOAD( "gwb_ic.288",     0x220000, 0x10000, CRC(8e620056) SHA1(59ea29d681c4b001b656b4b8014b14ac78a69625) )
2985		ROM_LOAD( "gwb_ic.289",     0x230000, 0x10000, CRC(c754d69f) SHA1(e64b8e1f719f5a95b7bcab2d25a40c8b819f7d4f) )
2986		ROM_LOAD( "gwb_ic.290",     0x240000, 0x10000, CRC(306d1963) SHA1(2f19ba97b9bd1744b656095ae0244df2db03b09b) )
2987		ROM_LOAD( "gwb_ic.283",     0x250000, 0x10000, CRC(b46e5761) SHA1(3c4c13c5896186fe36ace8704afeef84b0a0cb78) )
2988		//  ROM_LOAD( "gwb_ic.280",     0x260000, 0x10000, CRC(222b3dcd) SHA1(f9afe24c01daefe61939672efa2cb68bcc7235f0) )
2989		ROM_LOAD( "gwb_ic.316",     0x260000, 0x10000, CRC(655b1518) SHA1(d97fd911901f92786bc22dac8e085cf4fa0cb1e9) ) //AT
2990		ROM_LOAD( "gwb_ic.315",     0x270000, 0x10000, CRC(e7c9b103) SHA1(6f70ca9b6a7439f9250145477f682f7487e11710) )
2991	2967
	2968	ROM_LOAD( "gwb_ic.300",     0x100000, 0x10000, CRC(f3fa0877) SHA1(7950ef86ee66d19693f0b7071a3a34d9200f5a19) )
	2969	ROM_LOAD( "gwb_ic.301",     0x110000, 0x10000, CRC(f8c866de) SHA1(c6baa41bab35d4d9e80c5c52db74e9eb6b9605f5) )
	2970	ROM_LOAD( "gwb_ic.302",     0x120000, 0x10000, CRC(5b0d587d) SHA1(852bec7d37d8cee33e5bc30080bf8a6a8d2472e5) )
	2971	ROM_LOAD( "gwb_ic.303",     0x130000, 0x10000, CRC(d8c0e102) SHA1(f660876ab3457230b1c37835f5ad1ccd1e8e821a) )
	2972	ROM_LOAD( "gwb_ic.304",     0x140000, 0x10000, CRC(b02bc9d8) SHA1(e0466b93c08363cceaba27c8d85e2609d12a10e7) )
	2973	ROM_LOAD( "gwb_ic.305",     0x150000, 0x10000, CRC(5e04a9aa) SHA1(663330b467eb6406719d4d6cf7b05835b1600a37) )
	2974	ROM_LOAD( "gwb_ic.306",     0x160000, 0x10000, CRC(e2172955) SHA1(af13776e6537e736815a1180a1f6bad385724b0c) )
	2975	ROM_LOAD( "gwb_ic.299",     0x170000, 0x10000, CRC(e39f5599) SHA1(3c08a8163b528ebbcb627c511ccc2edacf0653c2) )
	2976	ROM_LOAD( "gwb_ic.320",     0x180000, 0x10000, CRC(9a7b51d8) SHA1(0ab01972d838c938bfd07d7b4661a0ecd009b2cb) )
	2977	ROM_LOAD( "gwb_ic.319",     0x190000, 0x10000, CRC(c5b862b7) SHA1(a48be3e32ae5a656d8d239796e6e7bddd4a0805b) )
	2978
	2979	ROM_LOAD( "gwb_ic.292",     0x200000, 0x10000, CRC(c125f7be) SHA1(5d68abd91fa4fa18275c0597c51ce6d3e743d84d) )
	2980	ROM_LOAD( "gwb_ic.293",     0x210000, 0x10000, CRC(c04fce8e) SHA1(499edd3b16770d20368f49e5c66c299740831ff0) )
	2981	ROM_LOAD( "gwb_ic.294",     0x220000, 0x10000, CRC(4eda3df5) SHA1(574fef723ebd8fa116b4a379036ee5ec3eb10c90) )
	2982	ROM_LOAD( "gwb_ic.295",     0x230000, 0x10000, CRC(6e60c475) SHA1(928494400bbdc3571cb5b1ccb51d39537c5fd904) )
	2983	ROM_LOAD( "gwb_ic.296",     0x240000, 0x10000, CRC(99b2a557) SHA1(7a4053909cb5f4b2a32f3caac4e2ccdb64c2ce84) )
	2984	ROM_LOAD( "gwb_ic.297",     0x250000, 0x10000, CRC(10373f63) SHA1(98ee65c68823530ad2eefd6e570db2f38b59c48e) )
	2985	ROM_LOAD( "gwb_ic.298",     0x260000, 0x10000, CRC(df37ec4d) SHA1(d2670dde87970a6f33ca3cd81bdc9991d663bac6) )
	2986	ROM_LOAD( "gwb_ic.291",     0x270000, 0x10000, CRC(beb07a2e) SHA1(f2751bef1850db7173f119fc0cfeefdf47ed7a86) )
	2987	ROM_LOAD( "gwb_ic.318",     0x280000, 0x10000, CRC(9aeaddf9) SHA1(d609314015376672be8147b9eabbfe4c5611ab73) )
	2988	ROM_LOAD( "gwb_ic.317",     0x290000, 0x10000, CRC(1622fadd) SHA1(240eaf117145773e388220513c2906ad2ac5d68b) )
	2989
	2990	ROM_LOAD( "gwb_ic.284",     0x300000, 0x10000, CRC(4aa95d66) SHA1(e5bb51fd32a7e9dc23aa13de35b8757dc11f7908) )
	2991	ROM_LOAD( "gwb_ic.285",     0x310000, 0x10000, CRC(3a1f3ce0) SHA1(edd8820111a3ef9558286280dc819c6d9f21212f) )
	2992	ROM_LOAD( "gwb_ic.286",     0x320000, 0x10000, CRC(886e298b) SHA1(8e8b35a0b24c9c3a1d00079b60bdbaa6c8ce597b) )
	2993	ROM_LOAD( "gwb_ic.287",     0x330000, 0x10000, CRC(b9542e6a) SHA1(e5762db1a44a966d2c2b7e8a92abab577e24172f) )
	2994	ROM_LOAD( "gwb_ic.288",     0x340000, 0x10000, CRC(8e620056) SHA1(59ea29d681c4b001b656b4b8014b14ac78a69625) )
	2995	ROM_LOAD( "gwb_ic.289",     0x350000, 0x10000, CRC(c754d69f) SHA1(e64b8e1f719f5a95b7bcab2d25a40c8b819f7d4f) )
	2996	ROM_LOAD( "gwb_ic.290",     0x360000, 0x10000, CRC(306d1963) SHA1(2f19ba97b9bd1744b656095ae0244df2db03b09b) )
	2997	ROM_LOAD( "gwb_ic.283",     0x370000, 0x10000, CRC(b46e5761) SHA1(3c4c13c5896186fe36ace8704afeef84b0a0cb78) )
	2998	ROM_LOAD( "gwb_ic.316",     0x380000, 0x10000, CRC(655b1518) SHA1(d97fd911901f92786bc22dac8e085cf4fa0cb1e9) )
	2999	ROM_LOAD( "gwb_ic.315",     0x390000, 0x10000, CRC(e7c9b103) SHA1(6f70ca9b6a7439f9250145477f682f7487e11710) )
	3000	#endif
	3001	ROM_END
	3002
	3003	ROM_START( gangwarsu )
	3004	ROM_REGION( 0x40000, "maincpu", 0 )
	3005	ROM_LOAD16_BYTE( "u1",        0x00000, 0x20000, CRC(11433507) SHA1(df32c14d4105d3ad899dfa8e9dbc2a1fe51dfa6a) )
	3006	ROM_LOAD16_BYTE( "u2",        0x00001, 0x20000, CRC(44cc375f) SHA1(38fc402014a816d9b1f7680407175adecfa39efe) )
2992	3007	ROM_REGION16_BE( 0x40000, "user1", 0 ) /* Extra code bank */
2993	3008	ROM_LOAD16_BYTE( "u3",        0x00000,  0x20000, CRC(de6fd3c0) SHA1(d957e8de3cb0eda1837376f687b8c272e97e1d11) )
2994	3009	ROM_LOAD16_BYTE( "u4",        0x00001,  0x20000, CRC(43f7f5d3) SHA1(13ea03cfae97d0067dcfdc6febb53dbe268a91eb) )
2995		ROM_END
2996	3010
2997		ROM_START( gangwarsb )
2998		ROM_REGION( 0x40000, "maincpu", 0 )
2999		ROM_LOAD16_BYTE( "gwb_ic.m15", 0x00000, 0x20000, CRC(7752478e) SHA1(7266dd0d2c57433191ae4d1d4e17b32c8c3c8c73) )
3000		ROM_LOAD16_BYTE( "gwb_ic.m16", 0x00001, 0x20000, CRC(c2f3b85e) SHA1(79c215d8b43ec7728e3745b359e64f6bb8240881) )
3001
3002	3011	ROM_REGION( 0x90000, "audiocpu", 0 )   /* Sound CPU */
3003		ROM_LOAD( "gwb_ic.380",      0x00000, 0x08000, CRC(e6d6c9cf) SHA1(c35a7a385592e55bdfe232d042f2228f4f7e9ffa) )
3004		ROM_CONTINUE(                0x18000, 0x08000 )
3005		ROM_LOAD( "gwb_ic.419",      0x30000, 0x10000, CRC(84e5c946) SHA1(0b071d15b664a9c529713b1b896bdb5ebfa16c25) )
3006		ROM_LOAD( "gwb_ic.420",      0x50000, 0x10000, CRC(eb305d42) SHA1(93910cf60c1b8a87969888d8693c7d6782f1e799) )
3007		ROM_LOAD( "gwb_ic.421",      0x70000, 0x10000, CRC(7b9f2608) SHA1(8d61dfa32369450e396cc8a5d67c58eedb2167e6) )
	3012	ROM_LOAD( "u12",            0x00000, 0x08000, CRC(2620caa1) SHA1(bd464abce0bedab68cb913321e76d83eb36ca374) )
	3013	ROM_CONTINUE(               0x18000, 0x08000 )
	3014	ROM_LOAD( "u9",             0x70000, 0x10000, CRC(9136745e) SHA1(d7a2bfeac69ab2dbd4565a5bd1abb1f3f1199b42) )
	3015	ROM_LOAD( "u10",            0x50000, 0x10000, CRC(636978ae) SHA1(5d8093bc43192c89e230af318609222a69866b6e) )
	3016	ROM_LOAD( "u11",            0x30000, 0x10000, CRC(2218ceb9) SHA1(69a843308cb0628ad856a09a33cd148f36ce0d24) )
3008	3017
3009	3018	ROM_REGION( 0x020000, "gfx1", 0 )  /* chars */
3010	3019	ROM_LOAD( "gwb_ic.m19",     0x000000, 0x10000, CRC(b75bf1d0) SHA1(c22c0049274c45701be0a7be2afc0517620a3a10) )
3011	3020
3012		ROM_REGION( 0x280000, "gfx2", 0 )  /* sprites */
3013		ROM_LOAD( "gwb_ic.308",     0x000000, 0x10000, CRC(321a2fdd) SHA1(b2f37f14a13bc2c2f78b2b0e27fde18a23146e22) )
3014		ROM_LOAD( "gwb_ic.309",     0x010000, 0x10000, CRC(4d908f65) SHA1(6095a34ef4a6905d57c47af4a507dff3a04e5c07) )
3015		ROM_LOAD( "gwb_ic.310",     0x020000, 0x10000, CRC(fc888541) SHA1(e732a03209a88fc7a23b4e4ff69a437d6fbfc2d1) )
3016		ROM_LOAD( "gwb_ic.311",     0x030000, 0x10000, CRC(181b128b) SHA1(2646c9f9cca6277ddd764c07478798c8af3eb297) )
3017		ROM_LOAD( "gwb_ic.312",     0x040000, 0x10000, CRC(930665f3) SHA1(03af85c45acb9600b27dcdd6ec96d147046030e5) )
3018		ROM_LOAD( "gwb_ic.313",     0x050000, 0x10000, CRC(c18f4ca8) SHA1(f5cb666d5aa53f201b6664d1c18b89a211230e78) )
3019		ROM_LOAD( "gwb_ic.314",     0x060000, 0x10000, CRC(dfc44b60) SHA1(311422d4ea77118c0058e9f1a824f74cfa79cb87) )
3020		ROM_LOAD( "gwb_ic.307",     0x070000, 0x10000, CRC(28082a7f) SHA1(e30bade13e03bca49c1f7001c9440ce251ece15d) )
3021		//  ROM_LOAD( "gwb_ic.320",     0x080000, 0x10000, CRC(9a7b51d8) SHA1(0ab01972d838c938bfd07d7b4661a0ecd009b2cb) )
3022		ROM_LOAD( "gwb_ic.280",     0x080000, 0x10000, CRC(222b3dcd) SHA1(f9afe24c01daefe61939672efa2cb68bcc7235f0) ) //AT
3023		ROM_LOAD( "gwb_ic.321",     0x090000, 0x10000, CRC(6b421c7b) SHA1(d96f91dc7e5f46990b05701483edf43a828a8879) )
3024		ROM_LOAD( "gwb_ic.300",     0x0a0000, 0x10000, CRC(f3fa0877) SHA1(7950ef86ee66d19693f0b7071a3a34d9200f5a19) )
3025		ROM_LOAD( "gwb_ic.301",     0x0b0000, 0x10000, CRC(f8c866de) SHA1(c6baa41bab35d4d9e80c5c52db74e9eb6b9605f5) )
3026		ROM_LOAD( "gwb_ic.302",     0x0c0000, 0x10000, CRC(5b0d587d) SHA1(852bec7d37d8cee33e5bc30080bf8a6a8d2472e5) )
3027		ROM_LOAD( "gwb_ic.303",     0x0d0000, 0x10000, CRC(d8c0e102) SHA1(f660876ab3457230b1c37835f5ad1ccd1e8e821a) )
3028		ROM_LOAD( "gwb_ic.304",     0x0e0000, 0x10000, CRC(b02bc9d8) SHA1(e0466b93c08363cceaba27c8d85e2609d12a10e7) )
3029		ROM_LOAD( "gwb_ic.305",     0x0f0000, 0x10000, CRC(5e04a9aa) SHA1(663330b467eb6406719d4d6cf7b05835b1600a37) )
3030		ROM_LOAD( "gwb_ic.306",     0x100000, 0x10000, CRC(e2172955) SHA1(af13776e6537e736815a1180a1f6bad385724b0c) )
3031		ROM_LOAD( "gwb_ic.299",     0x110000, 0x10000, CRC(e39f5599) SHA1(3c08a8163b528ebbcb627c511ccc2edacf0653c2) )
3032		//  ROM_LOAD( "gwb_ic.318",     0x120000, 0x10000, CRC(9aeaddf9) SHA1(d609314015376672be8147b9eabbfe4c5611ab73) )
3033		ROM_LOAD( "gwb_ic.320",     0x120000, 0x10000, CRC(9a7b51d8) SHA1(0ab01972d838c938bfd07d7b4661a0ecd009b2cb) ) //AT
3034		ROM_LOAD( "gwb_ic.319",     0x130000, 0x10000, CRC(c5b862b7) SHA1(a48be3e32ae5a656d8d239796e6e7bddd4a0805b) )
3035		ROM_LOAD( "gwb_ic.292",     0x140000, 0x10000, CRC(c125f7be) SHA1(5d68abd91fa4fa18275c0597c51ce6d3e743d84d) )
3036		ROM_LOAD( "gwb_ic.293",     0x150000, 0x10000, CRC(c04fce8e) SHA1(499edd3b16770d20368f49e5c66c299740831ff0) )
3037		ROM_LOAD( "gwb_ic.294",     0x160000, 0x10000, CRC(4eda3df5) SHA1(574fef723ebd8fa116b4a379036ee5ec3eb10c90) )
3038		ROM_LOAD( "gwb_ic.295",     0x170000, 0x10000, CRC(6e60c475) SHA1(928494400bbdc3571cb5b1ccb51d39537c5fd904) )
3039		ROM_LOAD( "gwb_ic.296",     0x180000, 0x10000, CRC(99b2a557) SHA1(7a4053909cb5f4b2a32f3caac4e2ccdb64c2ce84) )
3040		ROM_LOAD( "gwb_ic.297",     0x190000, 0x10000, CRC(10373f63) SHA1(98ee65c68823530ad2eefd6e570db2f38b59c48e) )
3041		ROM_LOAD( "gwb_ic.298",     0x1a0000, 0x10000, CRC(df37ec4d) SHA1(d2670dde87970a6f33ca3cd81bdc9991d663bac6) )
3042		ROM_LOAD( "gwb_ic.291",     0x1b0000, 0x10000, CRC(beb07a2e) SHA1(f2751bef1850db7173f119fc0cfeefdf47ed7a86) )
3043		//  ROM_LOAD( "gwb_ic.316",     0x1c0000, 0x10000, CRC(655b1518) SHA1(d97fd911901f92786bc22dac8e085cf4fa0cb1e9) )
3044		ROM_LOAD( "gwb_ic.318",     0x1c0000, 0x10000, CRC(9aeaddf9) SHA1(d609314015376672be8147b9eabbfe4c5611ab73) ) //AT
3045		ROM_LOAD( "gwb_ic.317",     0x1d0000, 0x10000, CRC(1622fadd) SHA1(240eaf117145773e388220513c2906ad2ac5d68b) )
3046		ROM_LOAD( "gwb_ic.284",     0x1e0000, 0x10000, CRC(4aa95d66) SHA1(e5bb51fd32a7e9dc23aa13de35b8757dc11f7908) )
3047		ROM_LOAD( "gwb_ic.285",     0x1f0000, 0x10000, CRC(3a1f3ce0) SHA1(edd8820111a3ef9558286280dc819c6d9f21212f) )
3048		ROM_LOAD( "gwb_ic.286",     0x200000, 0x10000, CRC(886e298b) SHA1(8e8b35a0b24c9c3a1d00079b60bdbaa6c8ce597b) )
3049		ROM_LOAD( "gwb_ic.287",     0x210000, 0x10000, CRC(b9542e6a) SHA1(e5762db1a44a966d2c2b7e8a92abab577e24172f) )
3050		ROM_LOAD( "gwb_ic.288",     0x220000, 0x10000, CRC(8e620056) SHA1(59ea29d681c4b001b656b4b8014b14ac78a69625) )
3051		ROM_LOAD( "gwb_ic.289",     0x230000, 0x10000, CRC(c754d69f) SHA1(e64b8e1f719f5a95b7bcab2d25a40c8b819f7d4f) )
3052		ROM_LOAD( "gwb_ic.290",     0x240000, 0x10000, CRC(306d1963) SHA1(2f19ba97b9bd1744b656095ae0244df2db03b09b) )
3053		ROM_LOAD( "gwb_ic.283",     0x250000, 0x10000, CRC(b46e5761) SHA1(3c4c13c5896186fe36ace8704afeef84b0a0cb78) )
3054		//  ROM_LOAD( "gwb_ic.280",     0x260000, 0x10000, CRC(222b3dcd) SHA1(f9afe24c01daefe61939672efa2cb68bcc7235f0) )
3055		ROM_LOAD( "gwb_ic.316",     0x260000, 0x10000, CRC(655b1518) SHA1(d97fd911901f92786bc22dac8e085cf4fa0cb1e9) ) //AT
3056		ROM_LOAD( "gwb_ic.315",     0x270000, 0x10000, CRC(e7c9b103) SHA1(6f70ca9b6a7439f9250145477f682f7487e11710) )
3057
3058		ROM_REGION16_BE( 0x40000, "user1", 0 ) /* Extra code bank */
3059		ROM_LOAD16_BYTE( "gwb_ic.m17", 0x00000, 0x20000, CRC(2a5fe86e) SHA1(0e668f51430983a17e1965143a0bf3aa4d3156ee) )
3060		ROM_LOAD16_BYTE( "gwb_ic.m18", 0x00001, 0x20000, CRC(c8b60c53) SHA1(352c3bcc18cf63bcb757d774c2c2247ce0c4e736) )
	3021	ROM_REGION( 0x400000, "gfx2", 0 )  /* sprites */
	3022	ROM_LOAD( "guernica-c3.17h",     0x000000, 0x80000, CRC(281a4138) SHA1(47fc0d91873996e05db87323c3b08a85863f90d9) )
	3023	ROM_LOAD( "gw-5.21f",            0x080000, 0x20000, CRC(9ef36031) SHA1(2faeb6a769991ab11403c6c37507b706a61bad69) )
	3024	ROM_LOAD( "guernica-c2.18h",     0x100000, 0x80000, CRC(2fcbea97) SHA1(eb60bf374ef771e379030d2b660a813be76bed5e) )
	3025	ROM_LOAD( "gw-6.20f",            0x180000, 0x20000, CRC(ddbbcda7) SHA1(1c368ad2a4ed31748c94545fc7c808aa53d76f64) )
	3026	ROM_LOAD( "guernica-c1.20h",     0x200000, 0x80000, CRC(5d384c3b) SHA1(9bc581501d52cc3280667a9ea34f2ba9c4b6ebb1) )
	3027	ROM_LOAD( "gw-7.18f",            0x280000, 0x20000, CRC(4656d377) SHA1(67d6f714cca3891be0173c543ece5e8ab699f645) )
	3028	ROM_LOAD( "guernica-c0.21h",     0x300000, 0x80000, CRC(e60c9882) SHA1(8cf1d9cf0db72977b303fd6b469611600631ab9a) )
	3029	ROM_LOAD( "gw-8.17f",            0x380000, 0x20000, CRC(798ed82a) SHA1(1932131e05aae0a77ba8d8ef947c1a3b0b5e3d43) )
3061	3030	ROM_END
3062	3031
3063	3032	ROM_START( sbasebal )
r8962	r8963
3128	3097
3129	3098	/******************************************************************************/
3130	3099
3131		static READ16_HANDLER( timesold_cycle_r )
3132		{
3133		alpha68k_state *state = space->machine->driver_data<alpha68k_state>();
3134		int ret = state->shared_ram[0x4];
3135
3136		if (cpu_get_pc(space->cpu) == 0x9ea2 && (ret & 0xff00) == 0)
3137		{
3138		cpu_spinuntil_int(space->cpu);
3139		return 0x100 | (ret & 0xff);
3140		}
3141
3142		return ret;
3143		}
3144
3145		static READ16_HANDLER( timesold1_cycle_r )
3146		{
3147		alpha68k_state *state = space->machine->driver_data<alpha68k_state>();
3148		int ret = state->shared_ram[0x4];
3149
3150		if (cpu_get_pc(space->cpu) == 0x9e20 && (ret & 0xff00) == 0)
3151		{
3152		cpu_spinuntil_int(space->cpu);
3153		return 0x100 | (ret & 0xff);
3154		}
3155
3156		return ret;
3157		}
3158
3159		static READ16_HANDLER( btlfield_cycle_r )
3160		{
3161		alpha68k_state *state = space->machine->driver_data<alpha68k_state>();
3162		int ret = state->shared_ram[0x4];
3163
3164		if (cpu_get_pc(space->cpu) == 0x9e1c && (ret & 0xff00) == 0)
3165		{
3166		cpu_spinuntil_int(space->cpu);
3167		return 0x100 | (ret & 0xff);
3168		}
3169
3170		return ret;
3171		}
3172
3173		static READ16_HANDLER( skysoldr_cycle_r )
3174		{
3175		alpha68k_state *state = space->machine->driver_data<alpha68k_state>();
3176		int ret = state->shared_ram[0x4];
3177
3178		if (cpu_get_pc(space->cpu) == 0x1f4e && (ret & 0xff00) == 0)
3179		{
3180		cpu_spinuntil_int(space->cpu);
3181		return 0x100 | (ret & 0xff);
3182		}
3183
3184		return ret;
3185		}
3186
3187		static READ16_HANDLER( skyadvnt_cycle_r )
3188		{
3189		alpha68k_state *state = space->machine->driver_data<alpha68k_state>();
3190		int ret = state->shared_ram[0x4];
3191
3192		if (cpu_get_pc(space->cpu) == 0x1f78 && (ret & 0xff00) == 0)
3193		{
3194		cpu_spinuntil_int(space->cpu);
3195		return 0x100 | (ret & 0xff);
3196		}
3197
3198		return ret;
3199		}
3200
3201		static READ16_HANDLER( gangwars_cycle_r )
3202		{
3203		alpha68k_state *state = space->machine->driver_data<alpha68k_state>();
3204		int ret = state->shared_ram[0x103];
3205
3206		if (cpu_get_pc(space->cpu) == 0xbbb6)
3207		{
3208		cpu_spinuntil_int(space->cpu);
3209		return (ret + 2) & 0xff;
3210		}
3211
3212		return ret;
3213		}
3214
3215		static READ16_HANDLER( gangwarsb_cycle_r )
3216		{
3217		alpha68k_state *state = space->machine->driver_data<alpha68k_state>();
3218		int ret = state->shared_ram[0x103];
3219
3220		if (cpu_get_pc(space->cpu) == 0xbbca)
3221		{
3222		cpu_spinuntil_int(space->cpu);
3223		return (ret + 2) & 0xff;
3224		}
3225
3226		return ret;
3227		}
3228
3229		/******************************************************************************/
3230
3231	3100	static DRIVER_INIT( sstingry )
3232	3101	{
3233	3102	alpha68k_state *state = machine->driver_data<alpha68k_state>();
r8962	r8963
3265	3134	static DRIVER_INIT( timesold )
3266	3135	{
3267	3136	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3268		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, timesold_cycle_r);
3269	3137	state->invert_controls = 0;
3270	3138	state->microcontroller_id = 0;
3271	3139	state->coin_id = 0x22 | (0x22 << 8);
r8962	r8963
3274	3142	static DRIVER_INIT( timesold1 )
3275	3143	{
3276	3144	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3277		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, timesold1_cycle_r);
3278	3145	state->invert_controls = 1;
3279	3146	state->microcontroller_id = 0;
3280	3147	state->coin_id = 0x22 | (0x22 << 8);
r8962	r8963
3283	3150	static DRIVER_INIT( btlfield )
3284	3151	{
3285	3152	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3286		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, btlfield_cycle_r);
3287	3153	state->invert_controls = 1;
3288	3154	state->microcontroller_id = 0;
3289	3155	state->coin_id = 0x22 | (0x22 << 8);
r8962	r8963
3301	3167	static DRIVER_INIT( skysoldr )
3302	3168	{
3303	3169	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3304		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skysoldr_cycle_r);
3305	3170	memory_set_bankptr(machine, "bank8", (memory_region(machine, "user1")) + 0x40000);
3306	3171	state->invert_controls = 0;
3307	3172	state->microcontroller_id = 0;
r8962	r8963
3328	3193	static DRIVER_INIT( skyadvnt )
3329	3194	{
3330	3195	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3331		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skyadvnt_cycle_r);
3332	3196	state->invert_controls = 0;
3333	3197	state->microcontroller_id = 0x8814;
3334	3198	state->coin_id = 0x22 | (0x22 << 8);
r8962	r8963
3337	3201	static DRIVER_INIT( skyadvntu )
3338	3202	{
3339	3203	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3340		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skyadvnt_cycle_r);
3341	3204	state->invert_controls = 0;
3342	3205	state->microcontroller_id = 0x8814;
3343	3206	state->coin_id = 0x23 | (0x24 << 8);
3344	3207	}
3345	3208
3346		static DRIVER_INIT( gangwars )
	3209	static DRIVER_INIT( gangwarsu )
3347	3210	{
3348	3211	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3349		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwars_cycle_r);
3350	3212	memory_set_bankptr(machine, "bank8", memory_region(machine, "user1"));
3351	3213	state->invert_controls = 0;
3352	3214	state->microcontroller_id = 0x8512;
3353	3215	state->coin_id = 0x23 | (0x24 << 8);
3354	3216	}
3355	3217
3356		static DRIVER_INIT( gangwarsb )
	3218	static DRIVER_INIT( gangwars )
3357	3219	{
3358	3220	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3359		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwarsb_cycle_r);
3360	3221	memory_set_bankptr(machine, "bank8", memory_region(machine, "user1"));
3361	3222	state->invert_controls = 0;
3362	3223	state->microcontroller_id = 0x8512;
r8962	r8963
3368	3229	alpha68k_state *state = machine->driver_data<alpha68k_state>();
3369	3230	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
3370	3231
3371		/* Game hangs on divide by zero?!  Patch it */
	3232	/* Patch protection check, it does a divide by zero because the MCU is trying to
	3233	calculate the ball speed when a strike is scored, notice that current emulation
	3234	just returns 49 mi/h every time that this event happens.
	3235	68k reads at [0x4023e], then subtracts this value with [0x41838], presumably it's raw speed minus angle.
	3236	main CPU then writes the result to RAM location [0x41866], probably just to signal the result to the MCU.
	3237	*/
3372	3238	rom[0xb672/2] = 0x4e71;
3373	3239
3374	3240	/* And patch the ROM checksums */
r8962	r8963
3397	3263
3398	3264	/******************************************************************************/
3399	3265
3400		GAME( 1986, sstingry,  0,        sstingry,       sstingry, sstingry, ROT90, "Alpha Denshi Co.",   "Super Stingray", GAME_SUPPORTS_SAVE )
3401		GAME( 1987, kyros,     0,        kyros,          kyros,    kyros,    ROT90, "Alpha Denshi Co. (World Games Inc. license)", "Kyros", GAME_SUPPORTS_SAVE )
3402		GAME( 1986, kyrosj,    kyros,    kyros,          kyros,    kyros,    ROT90, "Alpha Denshi Co.",   "Kyros No Yakata (Japan)", GAME_SUPPORTS_SAVE )
3403		GAME( 1987, jongbou,   0,        jongbou,        jongbou,  jongbou,  ROT90, "SNK",                "Mahjong Block Jongbou (Japan)", GAME_SUPPORTS_SAVE )
3404		GAME( 1988, paddlema,  0,        alpha68k_I,     paddlema, paddlema, ROT90, "SNK",                "Paddle Mania", GAME_SUPPORTS_SAVE )
3405		GAME( 1987, timesold,  0,        alpha68k_II,    timesold, timesold, ROT90, "Alpha Denshi Co. (SNK/Romstar license)", "Time Soldiers (US Rev 3)", GAME_SUPPORTS_SAVE )
3406		GAME( 1987, timesold1, timesold, alpha68k_II,    timesold, timesold1,ROT90, "Alpha Denshi Co. (SNK/Romstar license)", "Time Soldiers (US Rev 1)", GAME_SUPPORTS_SAVE )
3407		GAME( 1987, btlfield,  timesold, alpha68k_II,    btlfield, btlfield, ROT90, "Alpha Denshi Co. (SNK license)", "Battle Field (Japan)", GAME_SUPPORTS_SAVE )
3408		GAME( 1987, btlfieldb, timesold, btlfieldb,      btlfieldb,btlfieldb,ROT90, "bootleg",            "Battle Field (bootleg)", GAME_SUPPORTS_SAVE )
	3266	GAME( 1986, sstingry,  0,        sstingry,       sstingry, sstingry, ROT90, "Alpha Denshi Co.",                                  "Super Stingray", GAME_SUPPORTS_SAVE )
	3267
	3268	GAME( 1987, kyros,     0,        kyros,          kyros,    kyros,    ROT90, "Alpha Denshi Co. (World Games Inc. license)",       "Kyros", GAME_SUPPORTS_SAVE )
	3269	GAME( 1986, kyrosj,    kyros,    kyros,          kyros,    kyros,    ROT90, "Alpha Denshi Co.",                                  "Kyros No Yakata (Japan)", GAME_SUPPORTS_SAVE )
	3270
	3271	GAME( 1987, jongbou,   0,        jongbou,        jongbou,  jongbou,  ROT90, "SNK",                                               "Mahjong Block Jongbou (Japan)", GAME_SUPPORTS_SAVE )
	3272
	3273	GAME( 1988, paddlema,  0,        alpha68k_I,     paddlema, paddlema, ROT90, "SNK",                                               "Paddle Mania", GAME_SUPPORTS_SAVE )
	3274
	3275	GAME( 1987, timesold,  0,        alpha68k_II,    timesold, timesold, ROT90, "Alpha Denshi Co. (SNK/Romstar license)",            "Time Soldiers (US Rev 3)", GAME_SUPPORTS_SAVE )
	3276	GAME( 1987, timesold1, timesold, alpha68k_II,    timesold, timesold1,ROT90, "Alpha Denshi Co. (SNK/Romstar license)",            "Time Soldiers (US Rev 1)", GAME_SUPPORTS_SAVE )
	3277
	3278	GAME( 1987, btlfield,  timesold, alpha68k_II,    btlfield, btlfield, ROT90, "Alpha Denshi Co. (SNK license)",                    "Battle Field (Japan)", GAME_SUPPORTS_SAVE )
	3279	GAME( 1987, btlfieldb, timesold, btlfieldb,      btlfieldb,btlfieldb,ROT90, "bootleg",                                           "Battle Field (bootleg)", GAME_SUPPORTS_SAVE )
	3280
3409	3281	GAME( 1988, skysoldr,  0,        alpha68k_II,    skysoldr, skysoldr, ROT90, "Alpha Denshi Co. (SNK of America/Romstar license)", "Sky Soldiers (US)", GAME_SUPPORTS_SAVE )
3410		GAME( 1988, goldmedl,  0,        alpha68k_II_gm, goldmedl, goldmedl, ROT0,  "SNK",                "Gold Medalist", GAME_SUPPORTS_SAVE )
3411		GAME( 1988, goldmedla, goldmedl, alpha68k_II_gm, goldmedl, goldmedla,ROT0,  "SNK",                "Gold Medalist (alt)", GAME_SUPPORTS_SAVE )
3412		GAME( 1988, goldmedlb, goldmedl, alpha68k_II_gm, goldmedl, goldmedla,ROT0,  "bootleg",            "Gold Medalist (bootleg)", GAME_NOT_WORKING )
3413		GAME( 1989, skyadvnt,  0,        alpha68k_V,     skyadvnt, skyadvnt, ROT90, "Alpha Denshi Co.",   "Sky Adventure (World)", GAME_SUPPORTS_SAVE )
3414		GAME( 1989, skyadvntu, skyadvnt, alpha68k_V,     skyadvntu,skyadvntu,ROT90, "Alpha Denshi Co. (SNK of America license)", "Sky Adventure (US)", GAME_SUPPORTS_SAVE )
3415		GAME( 1989, skyadvntj, skyadvnt, alpha68k_V,     skyadvnt, skyadvnt, ROT90, "Alpha Denshi Co.",   "Sky Adventure (Japan)", GAME_SUPPORTS_SAVE )
3416		GAME( 1989, gangwars,  0,        alpha68k_V,     gangwars, gangwars, ROT0,  "Alpha Denshi Co.",   "Gang Wars (US)", GAME_SUPPORTS_SAVE )
3417		GAME( 1989, gangwarsb, gangwars, alpha68k_V,     gangwarsb,gangwarsb,ROT0,  "bootleg",            "Gang Wars (bootleg)", GAME_SUPPORTS_SAVE )
3418		#if SBASEBAL_HACK
3419		GAME( 1989, sbasebal,  0,        alpha68k_V_sb,  sbasebal, sbasebal, ROT0,  "Alpha Denshi Co.",   "Super Champion Baseball (Japan)", GAME_SUPPORTS_SAVE )
3420		#else
3421		GAME( 1989, sbasebal,  0,        alpha68k_V_sb,  sbasebal, sbasebal, ROT0,  "Alpha Denshi Co. (SNK of America license)", "Super Champion Baseball (US)", GAME_SUPPORTS_SAVE )
3422		#endif
3423		GAME( 1989, tnextspc,  0,        tnextspc,       tnextspc, tnextspc, ROT90, "SNK",                "The Next Space", GAME_SUPPORTS_SAVE | GAME_NO_COCKTAIL )
3424		GAME( 1989, tnextspcj, tnextspc, tnextspc,       tnextspc, tnextspc, ROT90, "SNK (Pasadena International Corp. license)", "The Next Space (Japan)", GAME_SUPPORTS_SAVE | GAME_NO_COCKTAIL )
	3282
	3283	GAME( 1988, goldmedl,  0,        alpha68k_II_gm, goldmedl, goldmedl, ROT0,  "SNK",                                               "Gold Medalist", GAME_SUPPORTS_SAVE )
	3284	GAME( 1988, goldmedla, goldmedl, alpha68k_II_gm, goldmedl, goldmedla,ROT0,  "SNK",                                               "Gold Medalist (alt)", GAME_SUPPORTS_SAVE )
	3285	GAME( 1988, goldmedlb, goldmedl, alpha68k_II_gm, goldmedl, goldmedla,ROT0,  "bootleg",                                           "Gold Medalist (bootleg)", GAME_NOT_WORKING )
	3286
	3287	GAME( 1989, skyadvnt,  0,        alpha68k_V,     skyadvnt, skyadvnt, ROT90, "Alpha Denshi Co.",                                  "Sky Adventure (World)", GAME_SUPPORTS_SAVE )
	3288	GAME( 1989, skyadvntu, skyadvnt, alpha68k_V,     skyadvntu,skyadvntu,ROT90, "Alpha Denshi Co. (SNK of America license)",         "Sky Adventure (US)", GAME_SUPPORTS_SAVE )
	3289	GAME( 1989, skyadvntj, skyadvnt, alpha68k_V,     skyadvnt, skyadvnt, ROT90, "Alpha Denshi Co.",                                  "Sky Adventure (Japan)", GAME_SUPPORTS_SAVE )
	3290
	3291	GAME( 1989, gangwars,  0,        alpha68k_V,     gangwars, gangwars, ROT0,  "Alpha Denshi Co.",                                  "Gang Wars", GAME_SUPPORTS_SAVE )
	3292	GAME( 1989, gangwarsu, gangwars, alpha68k_V,     gangwarsu,gangwarsu,ROT0,  "Alpha Denshi Co.",                                  "Gang Wars (US)", GAME_SUPPORTS_SAVE )
	3293
	3294	GAME( 1989, sbasebal,  0,        alpha68k_V_sb,  sbasebal, sbasebal, ROT0,  "Alpha Denshi Co. (SNK of America license)",         "Super Champion Baseball (US)", GAME_SUPPORTS_SAVE | GAME_UNEMULATED_PROTECTION )
	3295
	3296	GAME( 1989, tnextspc,  0,        tnextspc,       tnextspc, tnextspc, ROT90, "SNK",                                               "The Next Space", GAME_SUPPORTS_SAVE | GAME_NO_COCKTAIL )
	3297	GAME( 1989, tnextspcj, tnextspc, tnextspc,       tnextspc, tnextspc, ROT90, "SNK (Pasadena International Corp. license)",        "The Next Space (Japan)", GAME_SUPPORTS_SAVE | GAME_NO_COCKTAIL )

src/mame/drivers/tcl.c

r8962	r8963
180	180	{
181	181	/* only the first part is decrypted (and verified)*/
182	182
183		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	183	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
184	184	UINT8 *dest = memory_region(machine, "maincpu");
185	185	int len = memory_region_length(machine, "maincpu");
186	186	UINT8 *src = auto_alloc_array(machine, UINT8, len);
r8962	r8963
206	206	}
207	207	auto_free(machine, src);
208	208
209		memory_set_decrypted_region(space, 0x0000, 0x7fff, dest+0x10000);
	209	space->set_decrypted_region(0x0000, 0x7fff, dest+0x10000);
210	210	}
211	211
212	212	GAME( 1995, tcl,  0,       tcl,  tcl,  tcl, ROT0, "Uniwang", "Taiwan Chess Legend", GAME_NOT_WORKING )

src/mame/drivers/namcos22.c

r8962	r8963
2435	2435	for(i=0;i<4;i++)
2436	2436	{
2437	2437	mAlpineSurferProtData<<=8;
2438		mAlpineSurferProtData |= memory_read_byte(space, sptr+4+i );
	2438	mAlpineSurferProtData |= space->read_byte(sptr+4+i );
2439	2439	}
2440	2440	#endif
2441	2441	} /* alpinesa_prot_w */

src/mame/drivers/pturn.c

r8962	r8963
440	440
441	441	static MACHINE_RESET( pturn )
442	442	{
443		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	443	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
444	444	soundlatch_clear_w(space,0,0);
445	445	}
446	446

src/mame/drivers/atarig42.c

r8962	r8963
138	138	*
139	139	*************************************/
140	140
141		static DIRECT_UPDATE_HANDLER( sloop_direct_handler )
	141	DIRECT_UPDATE_HANDLER( atarig42_sloop_direct_handler )
142	142	{
143		atarig42_state *state = space->machine->driver_data<atarig42_state>();
144	143	if (address < 0x80000)
145	144	{
146		direct->raw = direct->decrypted = (UINT8 *)state->sloop_base;
	145	atarig42_state *state = machine->driver_data<atarig42_state>();
	146	direct.explicit_configure(0x00000, 0x7ffff, 0x7ffff, state->sloop_base);
147	147	return (offs_t)-1;
148	148	}
149	149	return address;
r8962	r8963
696	696	state->motion_object_base = 0x200;
697	697	state->motion_object_mask = 0x1ff;
698	698
699		state->sloop_base = memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, roadriot_sloop_data_r, roadriot_sloop_data_w);
700		memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), sloop_direct_handler);
	699	address_space *main = machine->device<m68000_device>("maincpu")->space(AS_PROGRAM);
	700	state->sloop_base = memory_install_readwrite16_handler(main, 0x000000, 0x07ffff, 0, 0, roadriot_sloop_data_r, roadriot_sloop_data_w);
	701	main->set_direct_update_handler(direct_update_delegate_create_static(atarig42_sloop_direct_handler, *machine));
701	702
702	703	asic65_config(machine, ASIC65_ROMBASED);
703	704	/*
r8962	r8963
750	751	/* put an RTS there so we don't die */
751	752	*(UINT16 *)&memory_region(machine, "maincpu")[0x80000] = 0x4E75;
752	753
753		state->sloop_base = memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, guardians_sloop_data_r, guardians_sloop_data_w);
754		memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), sloop_direct_handler);
	754	address_space *main = machine->device<m68000_device>("maincpu")->space(AS_PROGRAM);
	755	state->sloop_base = memory_install_readwrite16_handler(main, 0x000000, 0x07ffff, 0, 0, guardians_sloop_data_r, guardians_sloop_data_w);
	756	main->set_direct_update_handler(direct_update_delegate_create_static(atarig42_sloop_direct_handler, *machine));
755	757
756	758	asic65_config(machine, ASIC65_GUARDIANS);
757	759	/*

src/mame/drivers/mpu4drvr.c

r8962	r8963
2582	2582
2583	2583	static DRIVER_INIT (mating)
2584	2584	{
2585		const address_space *space = cputag_get_address_space(machine, "video", ADDRESS_SPACE_PROGRAM);
	2585	address_space *space = cputag_get_address_space(machine, "video", ADDRESS_SPACE_PROGRAM);
2586	2586	running_device *device = machine->device("oki");
2587	2587
2588	2588	/* The Mating Game has an extra 256kB RAM on the program card */

src/mame/drivers/mikie.c

r8962	r8963
14	14	6000-ffff ROM
15	15
16	16
	17	Stephh's notes (based on the games M6809 code and some tests) :
	18
	19	- To enter service mode, keep START1 and START2 pressed on reset.
	20	Then press START1 to cycle through the different tests.
	21	- According to code at 0x618f, you can start a game with 255 lives
	22	if you set DSW1 and DSW2 to the following settings :
	23	* "Coin A"      : "Free Play"
	24	* "Coin B"      : "No Coin B"
	25	* "Lives"       : "7"
	26	* "Cabinet"     : "Upright"
	27	* "Bonus Life"  : "20k 70k 50k+"
	28	* "Difficulty"  : "Medium"
	29	* "Demo Sounds" : "Off"
	30	DSW3 is not tested here, so settings can be anything.
	31	- I'm very surprised to notice that 'mikie' and 'mikiej' have the same
	32	PRG ROMS but different GFX ROMS.
	33	This is very rare (unique ?) for the Konami games.
	34	- There might exist undumped Konami/Centuri version(s) of this game :
	35	the manual I've found speaks about a "conversion kit".
	36
17	37	***************************************************************************/
18	38
19	39	#include "emu.h"
r8962	r8963
81	101	AM_RANGE(0x2400, 0x2400) AM_READ_PORT("SYSTEM") AM_WRITE(soundlatch_w)
82	102	AM_RANGE(0x2401, 0x2401) AM_READ_PORT("P1")
83	103	AM_RANGE(0x2402, 0x2402) AM_READ_PORT("P2")
84		AM_RANGE(0x2403, 0x2403) AM_READ_PORT("DSW2")
85		AM_RANGE(0x2500, 0x2500) AM_READ_PORT("DSW0")
86		AM_RANGE(0x2501, 0x2501) AM_READ_PORT("DSW1")
	104	AM_RANGE(0x2403, 0x2403) AM_READ_PORT("DSW3")
	105	AM_RANGE(0x2500, 0x2500) AM_READ_PORT("DSW1")
	106	AM_RANGE(0x2501, 0x2501) AM_READ_PORT("DSW2")
87	107	AM_RANGE(0x2800, 0x288f) AM_RAM AM_BASE_SIZE_MEMBER(mikie_state, spriteram, spriteram_size)
88	108	AM_RANGE(0x2890, 0x37ff) AM_RAM
89	109	AM_RANGE(0x3800, 0x3bff) AM_RAM_WRITE(mikie_colorram_w) AM_BASE_MEMBER(mikie_state, colorram)
r8962	r8963
111	131	*
112	132	*************************************/
113	133
	134	/* verified from M6809 code */
114	135	static INPUT_PORTS_START( mikie )
115	136	PORT_START("SYSTEM")
116	137	KONAMI8_SYSTEM_UNK
r8962	r8963
121	142	PORT_START("P2")
122	143	KONAMI8_COCKTAIL_4WAY_B12_UNK
123	144
124		PORT_START("DSW2")
125		PORT_DIPNAME( 0x01, 0x00, DEF_STR( Flip_Screen ) )
126		PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
127		PORT_DIPSETTING(    0x01, DEF_STR( On ) )
128		PORT_DIPNAME( 0x02, 0x00, DEF_STR( Controls ) )
129		PORT_DIPSETTING(    0x00, DEF_STR( Single ) )
130		PORT_DIPSETTING(    0x02, DEF_STR( Dual ) )
131		PORT_BIT( 0xfc, IP_ACTIVE_HIGH, IPT_UNKNOWN )
132
133		PORT_START("DSW0")
	145	PORT_START("DSW1")
134	146	KONAMI_COINAGE(DEF_STR( Free_Play ), "No Coin B")
135	147	/* "No Coin B" = coins produce sound, but no effect on coin counter */
136	148
137		PORT_START("DSW1")
	149	PORT_START("DSW2")
138	150	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
139	151	PORT_DIPSETTING(    0x03, "3" )
140	152	PORT_DIPSETTING(    0x02, "4" )
r8962	r8963
144	156	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
145	157	PORT_DIPSETTING(    0x04, DEF_STR( Cocktail ) )
146	158	PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) )
147		PORT_DIPSETTING(    0x18, "20K 50K+" )
148		PORT_DIPSETTING(    0x10, "30K 60K+" )
149		PORT_DIPSETTING(    0x08, "30K" )
150		PORT_DIPSETTING(    0x00, "40K" )
	159	PORT_DIPSETTING(    0x18, "20k 70k 50k+" )
	160	PORT_DIPSETTING(    0x10, "30K 90k 60k+" )
	161	PORT_DIPSETTING(    0x08, "30k only" )
	162	PORT_DIPSETTING(    0x00, "40K only" )
151	163	PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) )
152		PORT_DIPSETTING(    0x60, "1 (Easy)" )
153		PORT_DIPSETTING(    0x40, "2" )
154		PORT_DIPSETTING(    0x20, "3" )
155		PORT_DIPSETTING(    0x00, "4 (Hard)" )
	164	PORT_DIPSETTING(   0x60, DEF_STR( Easy ) )             /* 1 */
	165	PORT_DIPSETTING(   0x40, DEF_STR( Medium ) )           /* 2 */
	166	PORT_DIPSETTING(   0x20, DEF_STR( Hard ) )             /* 3 */
	167	PORT_DIPSETTING(   0x00, DEF_STR( Hardest ) )          /* 4 */
156	168	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
157	169	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
158	170	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	171
	172	PORT_START("DSW3")
	173	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Flip_Screen ) )
	174	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	175	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	176	PORT_DIPNAME( 0x02, 0x02, "Upright Controls" )
	177	PORT_DIPSETTING(    0x02, DEF_STR( Single ) )
	178	PORT_DIPSETTING(    0x00, DEF_STR( Dual ) )
	179	PORT_DIPUNUSED( 0x04, 0x04 )
	180	PORT_DIPUNUSED( 0x08, 0x08 )
	181	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
159	182	INPUT_PORTS_END
160	183
161	184

src/mame/drivers/suna16.c

r8962	r8963
358	358
359	359	static MACHINE_RESET(uballoon)
360	360	{
361		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	361	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
362	362	uballoon_pcm_1_bankswitch_w(space, 0, 0);
363	363	}
364	364

src/mame/drivers/bagman.c

r8962	r8963
73	73
74	74	static WRITE8_DEVICE_HANDLER( bagman_ls259_w )
75	75	{
76		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	76	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
77	77	bagman_pal16r6_w(space, offset,data); /*this is just a simulation*/
78	78
79	79	if (ls259_buf[offset] != (data&1) )

src/mame/drivers/cvs.c

r8962	r8963
984	984	{
985	985	"screen",
986	986	0x100,
987		CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
	987	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET,
	988	NULL
988	989	};
989	990
990	991	static const s2636_interface s2636_1_config =
991	992	{
992	993	"screen",
993	994	0x100,
994		CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
	995	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET,
	996	NULL
995	997	};
996	998
997	999	static const s2636_interface s2636_2_config =
998	1000	{
999	1001	"screen",
1000	1002	0x100,
1001		CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
	1003	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET,
	1004	NULL
1002	1005	};
1003	1006
1004	1007

src/mame/drivers/plygonet.c

r8962	r8963
319	319	return 0x7fff;
320	320	}
321	321
322		static DIRECT_UPDATE_HANDLER( plygonet_dsp56k_direct_handler )
	322	DIRECT_UPDATE_HANDLER( plygonet_dsp56k_direct_handler )
323	323	{
324		polygonet_state *state = space->machine->driver_data<polygonet_state>();
	324	polygonet_state *state = machine->driver_data<polygonet_state>();
325	325
326	326	/* Call the dsp's update handler first */
327		if (state->dsp56k_update_handler != NULL)
	327	if (!state->dsp56k_update_handler.isnull())
328	328	{
329		if ((*state->dsp56k_update_handler)(space, address, direct) == ~0)
	329	if (state->dsp56k_update_handler(direct, address) == ~0)
330	330	return ~0;
331	331	}
332	332
333	333	/* If the requested region wasn't in there, see if it needs to be caught driver-side */
334	334	if (address >= (0x7000<<1) && address <= (0x7fff<<1))
335	335	{
336		direct->raw = direct->decrypted = (UINT8*)(state->dsp56k_p_mirror) - (0x7000<<1);
	336	direct.explicit_configure(0x7000<<1, 0x7fff<<1, 0xfff<<1, state->dsp56k_p_mirror);
337	337	return ~0;
338	338	}
339	339	else if (address >= (0x8000<<1) && address <= (0x87ff<<1))
340	340	{
341		direct->raw = direct->decrypted = (UINT8*)(state->dsp56k_p_8000) - (0x8000<<1);
	341	direct.explicit_configure(0x8000<<1, 0x87ff<<1, 0x7ff<<1, state->dsp56k_p_8000);
342	342	return ~0;
343	343	}
344	344
r8962	r8963
764	764	state->dsp56k_bank04_ram    = auto_alloc_array_clear(machine, UINT16, 2 * 8 * dsp56k_bank04_size);
765	765
766	766	/* The dsp56k occasionally executes out of mapped memory */
767		state->dsp56k_update_handler = memory_set_direct_update_handler(cputag_get_address_space(machine, "dsp", ADDRESS_SPACE_PROGRAM), plygonet_dsp56k_direct_handler);
	767	address_space *space = machine->device<dsp56k_device>("dsp")->space(AS_PROGRAM);
	768	state->dsp56k_update_handler = space->set_direct_update_handler(direct_update_delegate_create_static(plygonet_dsp56k_direct_handler, *machine));
768	769
769	770	/* save states */
770	771	state_save_register_global_pointer(machine, state->dsp56k_bank00_ram,    2 * 8 * dsp56k_bank00_size);

src/mame/drivers/progolf.c

r8962	r8963
511	511	static DRIVER_INIT( progolf )
512	512	{
513	513	int A;
514		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	514	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
515	515	UINT8 *rom = memory_region(machine, "maincpu");
516	516	UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x10000);
517	517
518		memory_set_decrypted_region(space,0x0000,0xffff, decrypted);
	518	space->set_decrypted_region(0x0000,0xffff, decrypted);
519	519
520	520	/* Swap bits 5 & 6 for opcodes */
521	521	for (A = 0xb000 ; A < 0x10000 ; A++)
r8962	r8963
525	525	static DRIVER_INIT( progolfa )
526	526	{
527	527	int A;
528		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	528	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
529	529	UINT8 *rom = memory_region(machine, "maincpu");
530	530	UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x10000);
531	531
532		memory_set_decrypted_region(space,0x0000,0xffff, decrypted);
	532	space->set_decrypted_region(0x0000,0xffff, decrypted);
533	533
534	534	/* data is likely to not be encrypted, just the opcodes are. */
535	535	for (A = 0x0000 ; A < 0x10000 ; A++)

src/mame/drivers/alg.c

r8962	r8963
198	198
199	199	static WRITE8_DEVICE_HANDLER( alg_cia_0_porta_w )
200	200	{
201		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	201	address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
202	202
203	203	/* switch banks as appropriate */
204	204	memory_set_bank(device->machine, "bank1", data & 1);

src/mame/drivers/segag80v.c

r8962	r8963
137	137	#include "sound/ay8910.h"
138	138	#include "sound/samples.h"
139	139	#include "audio/segasnd.h"
140		#include "video/vector.h"
141	140	#include "includes/segag80r.h"
142	141	#include "includes/segag80v.h"
143	142
r8962	r8963
159	158	*
160	159	*************************************/
161	160
162		extern UINT8 (*sega_decrypt)(offs_t, UINT8);
163
164	161	static UINT8 *mainram;
165	162	static UINT8 has_usb;
166	163
r8962	r8963
213	210	*
214	211	*************************************/
215	212
216		static offs_t decrypt_offset(const address_space *space, offs_t offset)
	213	static offs_t decrypt_offset(address_space *space, offs_t offset)
217	214	{
218	215	/* ignore anything but accesses via opcode $32 (LD $(XXYY),A) */
219	216	offs_t pc = cpu_get_previouspc(space->cpu);
220		if ((UINT16)pc == 0xffff || memory_read_byte(space, pc) != 0x32)
	217	if ((UINT16)pc == 0xffff || space->read_byte(pc) != 0x32)
221	218	return offset;
222	219
223	220	/* fetch the low byte of the address and munge it */
224		return (offset & 0xff00) | (*sega_decrypt)(pc, memory_read_byte(space, pc + 1));
	221	return (offset & 0xff00) | (*sega_decrypt)(pc, space->read_byte(pc + 1));
225	222	}
226	223
227	224	static WRITE8_HANDLER( mainram_w ) { mainram[decrypt_offset(space, offset)] = data; }
228	225	static WRITE8_HANDLER( usb_ram_w ) { sega_usb_ram_w(space, decrypt_offset(space, offset), data); }
229		static WRITE8_HANDLER( vectorram_w ) { vectorram[decrypt_offset(space, offset)] = data; }
	226	static WRITE8_HANDLER( vectorram_w ) { segag80v_vectorram[decrypt_offset(space, offset)] = data; }
230	227
231	228
232	229
r8962	r8963
396	393	AM_RANGE(0x0000, 0x07ff) AM_ROM      /* CPU board ROM */
397	394	AM_RANGE(0x0800, 0xbfff) AM_ROM      /* PROM board ROM area */
398	395	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(mainram_w) AM_BASE(&mainram)
399		AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(vectorram_w) AM_BASE(&vectorram) AM_SIZE(&vectorram_size)
	396	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(vectorram_w) AM_BASE(&segag80v_vectorram) AM_SIZE(&segag80v_vectorram_size)
400	397	ADDRESS_MAP_END
401	398
402	399
r8962	r8963
929	926	MDRV_SCREEN_SIZE(400, 300)
930	927	MDRV_SCREEN_VISIBLE_AREA(512, 1536, 640-32, 1408+32)
931	928
932		MDRV_VIDEO_START(sega)
933		MDRV_VIDEO_UPDATE(sega)
	929	MDRV_VIDEO_START(segag80v)
	930	MDRV_VIDEO_UPDATE(segag80v)
934	931
935	932	/* sound hardware */
936	933	MDRV_SPEAKER_STANDARD_MONO("mono")
r8962	r8963
1318	1315
1319	1316	static DRIVER_INIT( elim2 )
1320	1317	{
1321		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1318	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1322	1319
1323	1320	/* configure security */
1324	1321	sega_security(70);
r8962	r8963
1332	1329
1333	1330	static DRIVER_INIT( elim4 )
1334	1331	{
1335		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1332	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1336	1333
1337	1334	/* configure security */
1338	1335	sega_security(76);
r8962	r8963
1350	1347
1351	1348	static DRIVER_INIT( spacfury )
1352	1349	{
1353		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1350	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1354	1351
1355	1352	/* configure security */
1356	1353	sega_security(64);
r8962	r8963
1366	1363
1367	1364	static DRIVER_INIT( zektor )
1368	1365	{
1369		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1366	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1370	1367	running_device *ay = machine->device("aysnd");
1371	1368
1372	1369	/* configure security */
r8962	r8963
1388	1385
1389	1386	static DRIVER_INIT( tacscan )
1390	1387	{
1391		const address_space *pgmspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1392		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1388	address_space *pgmspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1389	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1393	1390
1394	1391	/* configure security */
1395	1392	sega_security(76);
r8962	r8963
1407	1404
1408	1405	static DRIVER_INIT( startrek )
1409	1406	{
1410		const address_space *pgmspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1411		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1407	address_space *pgmspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1408	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1412	1409
1413	1410	/* configure security */
1414	1411	sega_security(64);

src/mame/drivers/ace.c

r8962	r8963
319	319	GFXDECODE_ENTRY( NULL          , 0x8000, scorelayout, 0, 2 )    /* the game dynamically modifies this */
320	320	GFXDECODE_END
321	321
	322	static STATE_POSTLOAD( ace_postload )
	323	{
	324	gfx_element_mark_dirty(machine->gfx[1], 0);
	325	gfx_element_mark_dirty(machine->gfx[2], 0);
	326	gfx_element_mark_dirty(machine->gfx[3], 0);
	327	gfx_element_mark_dirty(machine->gfx[4], 0);
	328	}
	329
322	330	static MACHINE_START( ace )
323	331	{
324	332	ace_state *state = machine->driver_data<ace_state>();
325	333	state_save_register_global_array(machine, state->objpos);
	334	state_save_register_postload(machine, ace_postload, NULL);
326	335	}
327	336
328	337	static MACHINE_RESET( ace )

src/mame/drivers/astrocde.c

r8962	r8963
455	455
456	456	static STATE_POSTLOAD( profbank_banksw_restore )
457	457	{
458		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	458	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
459	459
460	460	profpac_banksw_w(space, 0, profpac_bank);
461	461	}
r8962	r8963
1766	1766
1767	1767	static DRIVER_INIT( profpac )
1768	1768	{
1769		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1769	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1770	1770
1771	1771	astrocade_video_config = AC_SOUND_PRESENT;
1772	1772	memory_install_read8_handler(iospace, 0x14, 0x14, 0x0fff, 0xff00, profpac_io_1_r);
r8962	r8963
1780	1780
1781	1781	static DRIVER_INIT( demndrgn )
1782	1782	{
1783		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1783	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1784	1784
1785	1785	astrocade_video_config = 0x00;
1786	1786	memory_install_read8_handler(iospace, 0x14, 0x14, 0x1fff, 0xff00, demndrgn_io_r);
r8962	r8963
1796	1796
1797	1797	static DRIVER_INIT( tenpindx )
1798	1798	{
1799		const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
	1799	address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1800	1800
1801	1801	astrocade_video_config = 0x00;
1802	1802	memory_install_read_port(iospace, 0x60, 0x60, 0x0000, 0xff00, "P60");

src/mame/drivers/galaga.c

r8962	r8963
887	887
888	888	static void bosco_latch_reset(running_machine *machine)
889	889	{
890		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	890	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
891	891	int i;
892	892
893	893	/* Reset all latches */

src/mame/drivers/quasar.c

r8962	r8963
312	312	{
313	313	"screen",
314	314	0x100,
315		CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
	315	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET,
	316	NULL
316	317	};
317	318
318	319	static const s2636_interface s2636_1_config =
319	320	{
320	321	"screen",
321	322	0x100,
322		CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
	323	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET,
	324	NULL
323	325	};
324	326
325	327	static const s2636_interface s2636_2_config =
326	328	{
327	329	"screen",
328	330	0x100,
329		CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
	331	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET,
	332	NULL
330	333	};
331	334
332	335	// ****************************************

src/mame/drivers/taito_x.c

r8962	r8963
395	395
396	396	/**************************************************************************/
397	397
398		static INT32 banknum;
399
400	398	static void reset_sound_region(running_machine *machine)
401	399	{
402		memory_set_bankptr(machine,  "bank2", memory_region(machine, "audiocpu") + (banknum * 0x4000) + 0x10000 );
	400	seta_state *state = machine->driver_data<seta_state>();
	401
	402	memory_set_bankptr(machine,  "bank2", memory_region(machine, "audiocpu") + (state->taitox_banknum * 0x4000) + 0x10000 );
403	403	}
404	404
405	405	static WRITE8_HANDLER( sound_bankswitch_w )
406	406	{
407		banknum = (data - 1) & 3;
	407	seta_state *state = space->machine->driver_data<seta_state>();
	408
	409	state->taitox_banknum = (data - 1) & 3;
408	410	reset_sound_region(space->machine);
409	411	}
410	412
r8962	r8963
423	425	AM_RANGE(0x900802, 0x900803) AM_READWRITE(cchip1_ctrl_r, cchip1_ctrl_w)
424	426	AM_RANGE(0x900c00, 0x900c01) AM_WRITE(cchip1_bank_w)
425	427	AM_RANGE(0xb00000, 0xb00fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
426		AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_GENERIC(spriteram   )   // Sprites Y
427		AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_GENERIC(spriteram2   )   // Sprites Code + X + Attr
	428	AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_MEMBER(seta_state, spriteram)   // Sprites Y
	429	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_MEMBER(seta_state, spriteram2)   // Sprites Code + X + Attr
428	430	AM_RANGE(0xf00000, 0xf03fff) AM_RAM         /* Main RAM */
429	431	ADDRESS_MAP_END
430	432
r8962	r8963
437	439	AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff)
438	440	AM_RANGE(0x900000, 0x90000f) AM_READWRITE(daisenpu_input_r, daisenpu_input_w)
439	441	AM_RANGE(0xb00000, 0xb00fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
440		AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_GENERIC(spriteram   )   // Sprites Y
441		AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_GENERIC(spriteram2   )   // Sprites Code + X + Attr
	442	AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_MEMBER(seta_state, spriteram)   // Sprites Y
	443	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_MEMBER(seta_state, spriteram2)   // Sprites Code + X + Attr
442	444	AM_RANGE(0xf00000, 0xf03fff) AM_RAM         /* Main RAM */
443	445	ADDRESS_MAP_END
444	446
r8962	r8963
451	453	AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff)
452	454	AM_RANGE(0x900000, 0x90000f) AM_READWRITE(daisenpu_input_r, daisenpu_input_w)
453	455	AM_RANGE(0xb00000, 0xb00fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
454		AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_GENERIC(spriteram)   // Sprites Y
455		AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_GENERIC(spriteram2   )   // Sprites Code + X + Attr
	456	AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_MEMBER(seta_state, spriteram)   // Sprites Y
	457	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_MEMBER(seta_state, spriteram2)   // Sprites Code + X + Attr
456	458	AM_RANGE(0xf00000, 0xf03fff) AM_RAM         /* Main RAM */
457	459	ADDRESS_MAP_END
458	460
r8962	r8963
465	467	AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff)
466	468	AM_RANGE(0x900000, 0x90000f) AM_READWRITE(daisenpu_input_r, daisenpu_input_w)
467	469	AM_RANGE(0xb00000, 0xb00fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
468		AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_GENERIC(spriteram   )   // Sprites Y
469		AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_GENERIC(spriteram2   )   // Sprites Code + X + Attr
	470	AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_MEMBER(seta_state, spriteram)   // Sprites Y
	471	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_MEMBER(seta_state, spriteram2)   // Sprites Code + X + Attr
470	472	AM_RANGE(0xf00000, 0xf03fff) AM_RAM         /* Main RAM */
471	473	ADDRESS_MAP_END
472	474
r8962	r8963
892	894
893	895	static MACHINE_START( taitox )
894	896	{
895		banknum = -1;
896		state_save_register_global(machine, banknum);
	897	seta_state *state = machine->driver_data<seta_state>();
	898
	899	state->taitox_banknum = -1;
	900	state_save_register_global(machine, state->taitox_banknum);
897	901	state_save_register_postload(machine, taitox_postload, NULL);
898	902	}
899	903
r8962	r8963
907	911
908	912	static MACHINE_DRIVER_START( superman )
909	913
	914	MDRV_DRIVER_DATA( seta_state )
	915
910	916	/* basic machine hardware */
911	917	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz/2)   /* verified on pcb */
912	918	MDRV_CPU_PROGRAM_MAP(superman_map)
r8962	r8963
949	955
950	956	static MACHINE_DRIVER_START( daisenpu )
951	957
	958	MDRV_DRIVER_DATA( seta_state )
	959
952	960	/* basic machine hardware */
953	961	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz/2)   /* verified on pcb */
954	962	MDRV_CPU_PROGRAM_MAP(daisenpu_map)
r8962	r8963
988	996
989	997	static MACHINE_DRIVER_START( gigandes )
990	998
	999	MDRV_DRIVER_DATA( seta_state )
	1000
991	1001	/* basic machine hardware */
992	1002	MDRV_CPU_ADD("maincpu", M68000, 8000000)   /* 8 MHz? */
993	1003	MDRV_CPU_PROGRAM_MAP(gigandes_map)
r8962	r8963
1029	1039
1030	1040	static MACHINE_DRIVER_START( ballbros )
1031	1041
	1042	MDRV_DRIVER_DATA( seta_state )
	1043
1032	1044	/* basic machine hardware */
1033	1045	MDRV_CPU_ADD("maincpu", M68000, 8000000)   /* 8 MHz? */
1034	1046	MDRV_CPU_PROGRAM_MAP(ballbros_map)

src/mame/drivers/jalmah.c

r8962	r8963
627	627	{
628	628	UINT32 i;
629	629	for(i = 0; i < 0x200; i += 2)
630		memory_write_word(space, 0x88200 + i, memory_read_word(space, 0x88400 + i));
	630	space->write_word(0x88200 + i, space->read_word(0x88400 + i));
631	631	}
632	632	}
633	633
634	634	/*same as $f00c0 sub-routine,but with additional work-around,to remove from here...*/
635	635	static void daireika_palette_dma(running_machine *machine, UINT16 val)
636	636	{
637		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	637	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
638	638	UINT32 index_1, index_2, src_addr, tmp_addr;
639	639	/*a0=301c0+jm_shared_ram[0x540/2] & 0xf00 */
640	640	/*a1=88000*/
r8962	r8963
643	643	for(index_1 = 0; index_1 < 0x200; index_1 += 0x20)
644	644	{
645	645	tmp_addr = src_addr;
646		src_addr = memory_read_dword(space,src_addr);
	646	src_addr = space->read_dword(src_addr);
647	647
648	648	for(index_2 = 0; index_2 < 0x20; index_2 += 2)
649		memory_write_word(space, 0x88000 + index_2 + index_1, memory_read_word(space, src_addr + index_2));
	649	space->write_word(0x88000 + index_2 + index_1, space->read_word(src_addr + index_2));
650	650
651	651	src_addr = tmp_addr + 4;
652	652	}

src/mame/drivers/tx1.c

r8962	r8963
100	100
101	101	static READ16_HANDLER( z80_shared_r )
102	102	{
103		const address_space *cpu2space = cputag_get_address_space(space->machine, "audio_cpu", ADDRESS_SPACE_PROGRAM);
104		return memory_read_byte(cpu2space, offset);
	103	address_space *cpu2space = cputag_get_address_space(space->machine, "audio_cpu", ADDRESS_SPACE_PROGRAM);
	104	return cpu2space->read_byte(offset);
105	105	}
106	106
107	107	static WRITE16_HANDLER( z80_shared_w )
108	108	{
109		const address_space *cpu2space = cputag_get_address_space(space->machine, "audio_cpu", ADDRESS_SPACE_PROGRAM);
110		memory_write_byte(cpu2space, offset, data & 0xff);
	109	address_space *cpu2space = cputag_get_address_space(space->machine, "audio_cpu", ADDRESS_SPACE_PROGRAM);
	110	cpu2space->write_byte(offset, data & 0xff);
111	111	}
112	112
113	113

src/mame/drivers/harddriv.c

r8962	r8963
3963	3963	}
3964	3964
3965	3965
3966		static READ32_HANDLER( rddsp32_speedup_r )
3967		{
3968		harddriv_state *state = space->machine->driver_data<harddriv_state>();
3969		if (cpu_get_pc(space->cpu) == state->rddsp32_speedup_pc && (*state->rddsp32_speedup >> 16) == 0)
3970		{
3971		UINT32 r14 = cpu_get_reg(space->cpu, DSP32_R14);
3972		UINT32 r1 = memory_read_word(space, r14 - 0x14);
3973		int cycles_to_burn = 17 * 4 * (0x2bc - r1 - 2);
3974		if (cycles_to_burn > 20 * 4)
3975		{
3976		cpu_eat_cycles(space->cpu, cycles_to_burn);
3977		memory_write_word(space, r14 - 0x14, r1 + cycles_to_burn / 17);
3978		}
3979		state->msp_speedup_count[0]++;
3980		}
3981		return *state->rddsp32_speedup;
3982		}
3983
3984
3985	3966	static DRIVER_INIT( racedriv )
3986	3967	{
3987	3968	harddriv_state *state = machine->driver_data<harddriv_state>();
r8962	r8963
4002	3983
4003	3984	/* set up adsp speedup handlers */
4004	3985	memory_install_read16_handler(cpu_get_address_space(state->adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
4005
4006		/* set up dsp32 speedup handlers */
4007		state->rddsp32_speedup = memory_install_read32_handler(cpu_get_address_space(state->dsp32, ADDRESS_SPACE_PROGRAM), 0x613e04, 0x613e07, 0, 0, rddsp32_speedup_r);
4008		state->rddsp32_speedup_pc = 0x6054b0;
4009	3986	}
4010	3987
4011	3988
r8962	r8963
4037	4014
4038	4015	/* set up adsp speedup handlers */
4039	4016	memory_install_read16_handler(cpu_get_address_space(state->adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
4040
4041		/* set up dsp32 speedup handlers */
4042		state->rddsp32_speedup = memory_install_read32_handler(cpu_get_address_space(state->dsp32, ADDRESS_SPACE_PROGRAM), 0x613e04, 0x613e07, 0, 0, rddsp32_speedup_r);
4043		state->rddsp32_speedup_pc = 0x6054b0;
4044	4017	}
4045	4018
4046	4019	static DRIVER_INIT( racedrivc ) { racedrivc_init_common(machine, 0xfff95cd0); }

src/mame/drivers/snk68.c

r8962	r8963
45	45	#include "cpu/z80/z80.h"
46	46	#include "sound/3812intf.h"
47	47	#include "sound/upd7759.h"
	48	#include "includes/snk68.h"
48	49
49		extern UINT16* pow_fg_videoram;
50
51		VIDEO_START( pow );
52		VIDEO_START( searchar );
53		VIDEO_UPDATE( pow );
54		WRITE16_HANDLER( pow_paletteram16_word_w );
55		WRITE16_HANDLER( pow_flipscreen16_w );
56		WRITE16_HANDLER( searchar_flipscreen16_w );
57		READ16_HANDLER( pow_spriteram_r );
58		WRITE16_HANDLER( pow_spriteram_w );
59		READ16_HANDLER( pow_fg_videoram_r );
60		WRITE16_HANDLER( pow_fg_videoram_w );
61		WRITE16_HANDLER( searchar_fg_videoram_w );
62
63		static int invert_controls;
64		static int sound_status;
65
66	50	/******************************************************************************/
67	51
68	52	static READ16_HANDLER( sound_status_r )
69	53	{
70		return (sound_status << 8);
	54	snk68_state *state = space->machine->driver_data<snk68_state>();
	55
	56	return (state->sound_status << 8);
71	57	}
72	58
73	59	static WRITE8_HANDLER( sound_status_w )
74	60	{
75		sound_status = data;
	61	snk68_state *state = space->machine->driver_data<snk68_state>();
	62
	63	state->sound_status = data;
76	64	}
77	65
78	66	static READ16_HANDLER( control_1_r )
r8962	r8963
103	91
104	92	static READ16_HANDLER( protcontrols_r )
105	93	{
	94	snk68_state *state = space->machine->driver_data<snk68_state>();
106	95	static const char *const portnames[] = { "P1", "P2", "SYSTEM" };
107		return input_port_read(space->machine, portnames[offset]) ^ invert_controls;
	96
	97	return input_port_read(space->machine, portnames[offset]) ^ state->invert_controls;
108	98	}
109	99
110	100	static WRITE16_HANDLER( protection_w )
r8962	r8963
112	102	/* top byte is used, meaning unknown */
113	103	/* bottom byte is protection in ikari 3 and streetsm */
114	104	if (ACCESSING_BITS_0_7)
115		invert_controls = ((data & 0xff) == 0x07) ? 0xff : 0x00;
	105	{
	106	snk68_state *state = space->machine->driver_data<snk68_state>();
	107	state->invert_controls = ((data & 0xff) == 0x07) ? 0xff : 0x00;
	108	}
116	109	}
117	110
118	111	static WRITE16_HANDLER( sound_w )
r8962	r8963
138	131	AM_RANGE(0x0f0000, 0x0f0001) AM_READ_PORT("DSW1")
139	132	AM_RANGE(0x0f0008, 0x0f0009) AM_READ_PORT("DSW2")
140	133	//  AM_RANGE(0x0f0008, 0x0f0009) AM_WRITENOP    /* ?? */
141		AM_RANGE(0x100000, 0x100fff) AM_READWRITE(pow_fg_videoram_r, pow_fg_videoram_w) AM_MIRROR(0x1000) AM_BASE(&pow_fg_videoram)   // 8-bit
142		AM_RANGE(0x200000, 0x207fff) AM_READWRITE(pow_spriteram_r, pow_spriteram_w) AM_BASE_GENERIC(spriteram)   // only partially populated
143		AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(pow_paletteram16_word_w) AM_BASE_GENERIC(paletteram)
	134	AM_RANGE(0x100000, 0x100fff) AM_READWRITE(pow_fg_videoram_r, pow_fg_videoram_w) AM_MIRROR(0x1000) AM_BASE_MEMBER(snk68_state, pow_fg_videoram)   // 8-bit
	135	AM_RANGE(0x200000, 0x207fff) AM_READWRITE(pow_spriteram_r, pow_spriteram_w) AM_BASE_MEMBER(snk68_state, spriteram)   // only partially populated
	136	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(pow_paletteram16_word_w) AM_BASE_MEMBER(snk68_state, paletteram)
144	137	ADDRESS_MAP_END
145	138
146	139	static ADDRESS_MAP_START( searchar_map, ADDRESS_SPACE_PROGRAM, 16 )
r8962	r8963
159	152	AM_RANGE(0x0f0000, 0x0f0001) AM_READ_PORT("DSW1")
160	153	AM_RANGE(0x0f0008, 0x0f0009) AM_READ_PORT("DSW2")
161	154	AM_RANGE(0x0f8000, 0x0f8001) AM_READ(sound_status_r)
162		AM_RANGE(0x100000, 0x107fff) AM_READWRITE(pow_spriteram_r, pow_spriteram_w) AM_BASE_GENERIC(spriteram)   // only partially populated
163		AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(searchar_fg_videoram_w) AM_MIRROR(0x1000) AM_BASE(&pow_fg_videoram) /* Mirror is used by Ikari 3 */
	155	AM_RANGE(0x100000, 0x107fff) AM_READWRITE(pow_spriteram_r, pow_spriteram_w) AM_BASE_MEMBER(snk68_state, spriteram)   // only partially populated
	156	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(searchar_fg_videoram_w) AM_MIRROR(0x1000) AM_BASE_MEMBER(snk68_state, pow_fg_videoram) /* Mirror is used by Ikari 3 */
164	157	AM_RANGE(0x300000, 0x33ffff) AM_ROMBANK("bank1") /* Extra code bank */
165		AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(pow_paletteram16_word_w) AM_BASE_GENERIC(paletteram)
	158	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(pow_paletteram16_word_w) AM_BASE_MEMBER(snk68_state, paletteram)
166	159	ADDRESS_MAP_END
167	160
168	161	/******************************************************************************/
r8962	r8963
599	592
600	593	static MACHINE_DRIVER_START( pow )
601	594
	595	MDRV_DRIVER_DATA( snk68_state )
	596
602	597	/* basic machine hardware */
603	598	MDRV_CPU_ADD("maincpu", M68000, XTAL_18MHz/2) /* verified on pcb */
604	599	MDRV_CPU_PROGRAM_MAP(pow_map)

src/mame/drivers/firetrap.c

r8962	r8963
129	129	HSync - 15.6137kHz
130	130	VSync - 57.4034Hz
131	131
	132
	133	Stephh's notes (based on the games Z80 code and some tests) :
	134
	135	1) 'firetrap' :
	136
	137	- US version, licensed to Data East.
	138	- MCU missing and simulated (init command = 0x13).
	139	- No warning screen.
	140	- Instructions in English
	141	- Initials : 3 letters.
	142	- Bugs in test mode :
	143	* when lives are set to "2", it displays "1".
	144	* bonus lives is still the same as the Japan version even if table at 0x0ca3 has changed.
	145
	146	2) 'firetrapj' :
	147
	148	- Japan version.
	149	- MCU missing and simulated (init command = 0xf5).
	150	- Additional warning screen.
	151	- Instructions in Japanese
	152	- Initials : 5 letters.
	153	- Bugs in test mode :
	154	* when lives are set to "2", it displays "1".
	155
	156	3) 'firetrapbl' :
	157
	158	- Bootleg based on 'firetrapj'.
	159	- Most MCU writes are patched while reads are handled differently.
	160	- Additional ROM with code at 0xf800 to simulate the MCU initialisation routine.
	161	- No warning screen.
	162	- Instructions in Japanese
	163	- Initials : 5 letters.
	164	- Bugs in test mode :
	165	* when lives are set to "2", it displays "1".
	166
132	167	***************************************************************************/
133	168
134	169	#include "emu.h"
r8962	r8963
158	193	/* Check for coin insertion */
159	194	/* the following only works in the bootleg version, which doesn't have an */
160	195	/* 8751 - the real thing is much more complicated than that. */
161		if ((input_port_read(space->machine, "IN2") & 0x70) != 0x70)
	196	firetrap_state *state = space->machine->driver_data<firetrap_state>();
	197	UINT8 coin = 0;
	198	UINT8 port = input_port_read(space->machine, "IN2") & 0x70;
	199
	200	if (cpu_get_pc(space->cpu) == 0x1188)
	201	return ~state->coin_command_pending;
	202
	203	if (port != 0x70)
	204	{
	205	if (!(port & 0x20)) /* COIN1 */
	206	coin = 1;
	207	if (!(port & 0x40)) /* COIN2 */
	208	coin = 2;
	209	if (!(port & 0x10)) /* SERVICE1 */
	210	coin = 3;
	211	state->coin_command_pending = coin;
162	212	return 0xff;
	213	}
163	214
164	215	return 0;
165	216	}
r8962	r8963
204	255	return;
205	256	}
206	257
207		/* Init sequence command */
208		else if (data == 0x13)
	258	/* Init sequence command (0x13 : US - 0xf5 : Japan) */
	259	else if ((data == 0x13) || (data == 0xf5))
209	260	{
210	261	if (!state->i8751_current_command)
211	262	state->i8751_init_ptr = 0;
r8962	r8963
363	414	ADDRESS_MAP_END
364	415
365	416
366
	417	/* verified from Z80 code */
367	418	static INPUT_PORTS_START( firetrap )
368	419	PORT_START("IN0")   /* IN0 */
369		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP ) PORT_4WAY
370		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN ) PORT_4WAY
371		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT ) PORT_4WAY
372		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT ) PORT_4WAY
373		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP ) PORT_4WAY
374		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN ) PORT_4WAY
375		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT ) PORT_4WAY
	420	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP )     PORT_4WAY
	421	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN )   PORT_4WAY
	422	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT )   PORT_4WAY
	423	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT )  PORT_4WAY
	424	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP )    PORT_4WAY
	425	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN )  PORT_4WAY
	426	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT )  PORT_4WAY
376	427	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT ) PORT_4WAY
377	428
378	429	PORT_START("IN1")   /* IN1 */
379		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP ) PORT_4WAY PORT_COCKTAIL
380		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN ) PORT_4WAY PORT_COCKTAIL
381		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT ) PORT_4WAY PORT_COCKTAIL
382		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT ) PORT_4WAY PORT_COCKTAIL
383		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP ) PORT_4WAY PORT_COCKTAIL
384		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN ) PORT_4WAY PORT_COCKTAIL
385		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT ) PORT_4WAY PORT_COCKTAIL
	430	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP )     PORT_4WAY PORT_COCKTAIL
	431	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN )   PORT_4WAY PORT_COCKTAIL
	432	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT )   PORT_4WAY PORT_COCKTAIL
	433	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT )  PORT_4WAY PORT_COCKTAIL
	434	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP )    PORT_4WAY PORT_COCKTAIL
	435	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN )  PORT_4WAY PORT_COCKTAIL
	436	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT )  PORT_4WAY PORT_COCKTAIL
386	437	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT ) PORT_4WAY PORT_COCKTAIL
387	438
388	439	PORT_START("IN2")   /* IN2 */
r8962	r8963
427	478	PORT_DIPSETTING(    0x01, DEF_STR( Hard ) )
428	479	PORT_DIPSETTING(    0x00, DEF_STR( Hardest ) )
429	480	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) )
430		PORT_DIPSETTING(    0x00, "1" )
	481	PORT_DIPSETTING(    0x00, "2" )                         /* "1" in the "test mode" */
431	482	PORT_DIPSETTING(    0x0c, "3" )
432	483	PORT_DIPSETTING(    0x08, "4" )
433	484	PORT_DIPSETTING(    0x04, "5" )
434		PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) )
435		PORT_DIPSETTING(    0x30, "50000 70000" )
436		PORT_DIPSETTING(    0x20, "60000 80000" )
437		PORT_DIPSETTING(    0x10, "80000 100000" )
438		PORT_DIPSETTING(    0x00, "50000" )
	485	PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) )       /* table at 0x0ca3 - 4*30 bytes */
	486	PORT_DIPSETTING(    0x10, "30k and 70k" )
	487	PORT_DIPSETTING(    0x00, "50k and 100k" )
	488	PORT_DIPSETTING(    0x30, "30k only" )
	489	PORT_DIPSETTING(    0x20, "50k only" )
439	490	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) )
440	491	PORT_DIPSETTING(    0x00, DEF_STR( No ) )
441	492	PORT_DIPSETTING(    0x40, DEF_STR( Yes ) )
r8962	r8963
447	498	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
448	499	INPUT_PORTS_END
449	500
450		static INPUT_PORTS_START( firetrapbl )
451		PORT_START("IN0")   /* IN0 */
452		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP ) PORT_4WAY
453		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN ) PORT_4WAY
454		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT ) PORT_4WAY
455		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT ) PORT_4WAY
456		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP ) PORT_4WAY
457		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN ) PORT_4WAY
458		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT ) PORT_4WAY
459		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT ) PORT_4WAY
	501	/* verified from Z80 code */
	502	static INPUT_PORTS_START( firetrapj )
	503	PORT_INCLUDE( firetrap )
460	504
461		PORT_START("IN1")   /* IN1 */
462		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP ) PORT_4WAY PORT_COCKTAIL
463		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN ) PORT_4WAY PORT_COCKTAIL
464		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT ) PORT_4WAY PORT_COCKTAIL
465		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT ) PORT_4WAY PORT_COCKTAIL
466		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP ) PORT_4WAY PORT_COCKTAIL
467		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN ) PORT_4WAY PORT_COCKTAIL
468		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT ) PORT_4WAY PORT_COCKTAIL
469		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT ) PORT_4WAY PORT_COCKTAIL
	505	PORT_MODIFY("DSW1")
	506	PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) )       /* table at 0x0ca3 - 4*30 bytes */
	507	PORT_DIPSETTING(    0x30, "50k 120k 70k+" )             /* last bonus life at 960k */
	508	PORT_DIPSETTING(    0x20, "60k 140k 80k+" )             /* last bonus life at 940k */
	509	PORT_DIPSETTING(    0x10, "80k 180k 100k+" )            /* last bonus life at 980k */
	510	PORT_DIPSETTING(    0x00, "50k only" )
	511	INPUT_PORTS_END
470	512
471		PORT_START("IN2")   /* IN2 */
472		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
473		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
474		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
475		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
476		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 )   /* bootleg only */
477		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )   /* bootleg only */
478		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )   /* bootleg only */
479		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
	513	/* verified from Z80 code */
	514	static INPUT_PORTS_START( firetrapbl )
	515	PORT_INCLUDE( firetrapj )
480	516
481		PORT_START("DSW0")   /* DSW0 */
482		PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
483		//  PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
484		//  PORT_DIPSETTING(    0x01, DEF_STR( 1C_1C ) )
485		//  PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ) )
486		PORT_DIPSETTING(    0x07, DEF_STR( 1C_1C ) )
487		PORT_DIPSETTING(    0x06, DEF_STR( 1C_2C ) )
488		PORT_DIPSETTING(    0x05, DEF_STR( 1C_3C ) )
489		PORT_DIPSETTING(    0x03, DEF_STR( 1C_4C ) )
490		PORT_DIPSETTING(    0x04, DEF_STR( 1C_6C ) )
491		PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_B ) )
492		PORT_DIPSETTING(    0x00, DEF_STR( 4C_1C ) )
493		PORT_DIPSETTING(    0x08, DEF_STR( 3C_1C ) )
494		PORT_DIPSETTING(    0x10, DEF_STR( 2C_1C ) )
495		PORT_DIPSETTING(    0x18, DEF_STR( 1C_1C ) )
496		PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) )
497		PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
498		PORT_DIPSETTING(    0x20, DEF_STR( Cocktail ) )
499		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) )
500		PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
501		PORT_DIPSETTING(    0x40, DEF_STR( On ) )
502		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) )
503		PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
504		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	517	PORT_MODIFY("IN2")
	518	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
	519	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
	520	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
505	521
506		PORT_START("DSW1")   /* DSW1 */
507		PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
508		PORT_DIPSETTING(    0x02, DEF_STR( Easy ) )
509		PORT_DIPSETTING(    0x03, DEF_STR( Normal ) )
510		PORT_DIPSETTING(    0x01, DEF_STR( Hard ) )
511		PORT_DIPSETTING(    0x00, DEF_STR( Hardest ) )
512		PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) )
513		PORT_DIPSETTING(    0x00, "1" )
514		PORT_DIPSETTING(    0x0c, "3" )
515		PORT_DIPSETTING(    0x08, "4" )
516		PORT_DIPSETTING(    0x04, "5" )
517		PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) )
518		PORT_DIPSETTING(    0x30, "50000 70000" )
519		PORT_DIPSETTING(    0x20, "60000 80000" )
520		PORT_DIPSETTING(    0x10, "80000 100000" )
521		PORT_DIPSETTING(    0x00, "50000" )
522		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) )
523		PORT_DIPSETTING(    0x00, DEF_STR( No ) )
524		PORT_DIPSETTING(    0x40, DEF_STR( Yes ) )
525		PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
	522	PORT_MODIFY("COIN")
	523	PORT_BIT( 0x07, IP_ACTIVE_LOW, IPT_UNUSED )
526	524	INPUT_PORTS_END
527	525
528	526
r8962	r8963
579	577	static INTERRUPT_GEN( firetrap )
580	578	{
581	579	firetrap_state *state = device->machine->driver_data<firetrap_state>();
	580	UINT8 coin = 0;
	581	UINT8 port = input_port_read(device->machine, "COIN") & 0x07;
582	582
583	583	/* Check for coin IRQ */
584	584	if (cpu_getiloops(device))
585	585	{
586		if ((input_port_read(device->machine, "COIN") & 0x7) != 0x7 && !state->int_latch)
	586	if (port != 0x07 && !state->int_latch)
587	587	{
588		state->coin_command_pending = ~input_port_read(device->machine, "COIN");
	588	if (!(port & 0x01)) /* COIN1 */
	589	coin = 1;
	590	if (!(port & 0x02)) /* COIN2 */
	591	coin = 2;
	592	if (!(port & 0x04)) /* SERVICE1 */
	593	coin = 3;
	594	state->coin_command_pending = coin;
589	595	state->int_latch = 1;
590	596	}
591		if ((input_port_read(device->machine, "COIN") & 0x7) == 0x7)
	597	if (port == 0x07)
592	598	state->int_latch = 0;
593	599
594	600	/* Make sure coin IRQ's aren't generated when another command is pending, the main cpu
r8962	r8963
955	961
956	962
957	963	GAME( 1986, firetrap,   0,        firetrap,   firetrap,   0, ROT90, "Wood Place Inc. (Data East USA license)", "Fire Trap (US)", GAME_SUPPORTS_SAVE )
958		GAME( 1986, firetrapj,  firetrap, firetrap,   firetrap,  0, ROT90, "Wood Place Inc.", "Fire Trap (Japan)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE )
	964	GAME( 1986, firetrapj,  firetrap, firetrap,   firetrapj,  0, ROT90, "Wood Place Inc.", "Fire Trap (Japan)", GAME_SUPPORTS_SAVE )
959	965	GAME( 1986, firetrapbl, firetrap, firetrapbl, firetrapbl, 0, ROT90, "bootleg", "Fire Trap (Japan bootleg)", GAME_SUPPORTS_SAVE )

src/mame/drivers/bwidow.c

r8962	r8963
353	353
354	354	static ADDRESS_MAP_START( bwidow_map, ADDRESS_SPACE_PROGRAM, 8 )
355	355	AM_RANGE(0x0000, 0x07ff) AM_RAM
356		AM_RANGE(0x2000, 0x27ff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x2000)
	356	AM_RANGE(0x2000, 0x27ff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x2000)
357	357	AM_RANGE(0x2800, 0x5fff) AM_ROM
358	358	AM_RANGE(0x6000, 0x67ff) AM_DEVREADWRITE("pokey1", pokey_r, pokey_w)
359	359	AM_RANGE(0x6800, 0x6fff) AM_DEVREADWRITE("pokey2", pokey_r, pokey_w)
r8962	r8963
387	387	AM_RANGE(0x0f00, 0x0f3f) AM_DEVWRITE("earom", atari_vg_earom_w)
388	388	AM_RANGE(0x1000, 0x100f) AM_DEVREADWRITE("pokey1", pokey_r, pokey_w)
389	389	AM_RANGE(0x1400, 0x140f) AM_DEVREADWRITE("pokey2", pokey_r, pokey_w)
390		AM_RANGE(0x2000, 0x27ff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x2000)
	390	AM_RANGE(0x2000, 0x27ff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x2000)
391	391	AM_RANGE(0x2800, 0x3fff) AM_ROM
392	392	AM_RANGE(0x4000, 0xffff) AM_ROM
393	393	ADDRESS_MAP_END

src/mame/drivers/srumbler.c

r8962	r8963
57	57
58	58	static MACHINE_RESET( srumbler )
59	59	{
60		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	60	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
61	61	/* initialize banked ROM pointers */
62	62	srumbler_bankswitch_w(space,0,0);
63	63	}

src/mame/drivers/funworld.c

r8962	r8963
4229	4229	******************************************************/
4230	4230	{
4231	4231	UINT8 *ROM = memory_region(machine, "maincpu");
4232		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	4232	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
4233	4233
4234	4234	int x;
4235	4235
r8962	r8963
4247	4247	ROM[x+0x10000] = code;
4248	4248	}
4249	4249
4250		memory_set_decrypted_region(space, 0x8000, 0xffff, memory_region(machine, "maincpu") + 0x18000);
	4250	space->set_decrypted_region(0x8000, 0xffff, memory_region(machine, "maincpu") + 0x18000);
4251	4251	}
4252	4252
4253	4253	static DRIVER_INIT( royalcdc )
r8962	r8963
4262	4262	******************************************************/
4263	4263
4264	4264	UINT8 *ROM = memory_region(machine, "maincpu");
4265		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	4265	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
4266	4266
4267	4267	int x;
4268	4268
r8962	r8963
4300	4300	ROM[x+0x10000] = code;
4301	4301	}
4302	4302
4303		memory_set_decrypted_region(space, 0x6000, 0xffff, memory_region(machine, "maincpu") + 0x16000);
	4303	space->set_decrypted_region(0x6000, 0xffff, memory_region(machine, "maincpu") + 0x16000);
4304	4304	}
4305	4305
4306	4306

src/mame/drivers/mario.c

r8962	r8963
101	101	*
102	102	*************************************/
103	103
	104	static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
	105	static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
	106
104	107	static Z80DMA_INTERFACE( mario_dma )
105	108	{
106	109	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT),

src/mame/drivers/lethal.c

r8962	r8963
158	158
159	159	'external' rowscroll not hooked up correctly (1st attract level, highscores)
160	160
161		can't find the flip bits used for the tiles.. (p2 start screen, reload indicator)
162
163	161	maybe some priority issues / sprite placement issues..
164	162
165	163	***************************************************************************/
r8962	r8963
275	273	case 0x44:
276	274	case 0x45:
277	275	case 0x46:
	276	case 0x47:
	277	case 0x48:
	278	case 0x49:
	279	case 0x4a:
	280	case 0x4b:
	281	case 0x4c:
	282	case 0x4d:
	283	case 0x4e:
	284	case 0x4f:
278	285	return k053244_r(state->k053244, offset - 0x40);
279	286
280	287	case 0x80:
r8962	r8963
359	366	case 0x44:
360	367	case 0x45:
361	368	case 0x46:
	369	case 0x47:
	370	case 0x48:
	371	case 0x49:
	372	case 0x4a:
	373	case 0x4b:
	374	case 0x4c:
	375	case 0x4d:
	376	case 0x4e:
	377	case 0x4f:
362	378	k053244_w(state->k053244, offset - 0x40, data);
363	379	break;
364	380

src/mame/drivers/taitowlf.c

r8962	r8963
380	380	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
381	381	& 0xFF0000;
382	382
383		return memory_read_byte(space, page_offset + offset);
	383	return space->read_byte(page_offset + offset);
384	384	}
385	385
386	386
r8962	r8963
389	389	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
390	390	& 0xFF0000;
391	391
392		memory_write_byte(space, page_offset + offset, data);
	392	space->write_byte(page_offset + offset, data);
393	393	}
394	394
395	395

src/mame/drivers/taitogn.c

r8962	r8963
513	513
514	514	static void install_handlers(running_machine *machine, int mode)
515	515	{
516		const address_space *a = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	516	address_space *a = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
517	517	if(mode == 0) {
518	518	// Mode 0 has access to the subbios, the mn102 flash and the rf5c296 mem zone
519	519	memory_install_readwrite32_handler(a, 0x1f000000, 0x1f1fffff, 0, 0, flash_subbios_r, flash_subbios_w);

src/mame/drivers/cojag.c

r8962	r8963
1082	1082	*
1083	1083	*************************************/
1084	1084
1085		static const r3000_cpu_core config =
	1085	static const r3000_cpu_core r3000_config =
1086	1086	{
1087	1087	0,      /* 1 if we have an FPU, 0 otherwise */
1088	1088	4096,   /* code cache size */
r8962	r8963
1106	1106
1107	1107	/* basic machine hardware */
1108	1108	MDRV_CPU_ADD("maincpu", R3041BE, R3000_CLOCK)
1109		MDRV_CPU_CONFIG(config)
	1109	MDRV_CPU_CONFIG(r3000_config)
1110	1110	MDRV_CPU_PROGRAM_MAP(r3000_map)
1111	1111
1112	1112	MDRV_CPU_ADD("gpu", JAGUARGPU, JAGUAR_CLOCK/2)

src/mame/drivers/mappy.c

r8962	r8963
717	717
718	718	static MACHINE_RESET( superpac )
719	719	{
720		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	720	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
721	721	int i;
722	722
723	723	/* Reset all latches */
r8962	r8963
727	727
728	728	static MACHINE_RESET( phozon )
729	729	{
730		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	730	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
731	731	int i;
732	732
733	733	/* Reset all latches */
r8962	r8963
737	737
738	738	static MACHINE_RESET( mappy )
739	739	{
740		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	740	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
741	741	int i;
742	742
743	743	/* Reset all latches */

src/mame/drivers/safarir.c

r8962	r8963
146	146	static TILE_GET_INFO( get_bg_tile_info )
147	147	{
148	148	int color;
149		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	149	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
150	150	UINT8 code = ram_r(space,tile_index | 0x400);
151	151
152	152	if (code & 0x80)
r8962	r8963
168	168	static TILE_GET_INFO( get_fg_tile_info )
169	169	{
170	170	int color, flags;
171		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	171	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
172	172
173	173	UINT8 code = ram_r(space,tile_index);
174	174

src/mame/drivers/aristmk5.c

r8962	r8963
1	1	/*
2	2
3		Aristocrat MK5 / MKV hardware
4		possibly 'Acorn Archimedes on a chip' hardware
	3	Aristocrat MK5 / MKV hardware
	4	possibly 'Acorn Archimedes on a chip' hardware
5	5
6		Note: ARM250 mapping is not identical to
	6	Note: ARM250 mapping is not identical to plain AA
7	7
	8	BIOS ROMs are actually nowhere to be found on a regular MK5 system. They can be used to change the system configurations on a PCB board
	9	by swapping them with the game ROMs u7/u11 locations.
	10
	11	TODO (MK-5 specific):
	12	- Fix remaining errors
	13	- If all tests passes, this msg is printed on the keyboard serial port:
	14	"System Startup Code Entered \n Gos_create could not allocate stack for the new process \n Unrecoverable error occured. System will now restart"
	15	Apparently it looks like some sort of protection device ...
	16
	17	code DASMing of POST (adonis):
	18	- bp 0x3400224:
	19	checks work RAM [0x87000], if bit 0 active high then all tests are skipped (presumably for debugging), otherwise check stuff;
	20	- bp 0x3400230: EPROM checksum branch test
	21	- bp 0x3400258: DRAM Check branch test
	22	- bp 0x3400280: CPU Check branch test
	23	bp 0x340027c: checks IRQ status A and FIQ status bit 7 (force IRQ flag)
	24	- R0 == 0: CPU Check OK
	25	- R0 == 1: IRQ status A force IRQ flag check failed
	26	- R0 == 2: FIQ status force IRQ flag check failed
	27	- R0 == 3: Internal Latch check 0x3250050 == 0xf5
	28	- bp 0x34002a8: SRAM Check branch test (I2C)
	29	- basically writes to the I2C clock/data then read-backs it
	30	- bp 0x34002d0: 2KHz Timer branch test
	31	bp 0x34002cc: it does various test with GO command reads (that are undefined on plain AA) and
	32	IRQA status bit 0, that's "printer busy" on original AA but here it have a completely
	33	different meaning.
	34	- bp 0x34002f8: DRAM emulator branch tests
	35	bp 0x34002f4:
	36	- R0 == 0 "DRAM emulator found"
	37	- R0 == 1 "DRAM emulator found"
	38	- R0 == 3 "DRAM emulator not found - Error"
	39	- R0 == 4 "DRAM emulator found instead of DRAM - Error"
	40	- R0 == x "Undefined error in DRAM emulator area"
	41	It r/w RAM location 0 and it expects to NOT read-back value written.
	42
	43	goldprmd: checks if a "keyboard IRQ" fires (IRQ status B bit 6), it seems a serial port with data on it,
	44	returns an External Video Crystal Error (bp 3400278)
	45
	46	dmdtouch:
	47	bp 3400640: checks 2MByte DRAM
	48	- writes from 0x1000 to 0x100000, with 0x400 bytes index increment and 0xfb data increment
	49	- writes from 0x100000 to 0x200000, with 0x400 bytes index increment and 0xfb data increment
	50	- bp 3400720 checks if the aforementioned checks are ok (currently fails at the very first work RAM check at 0x1000, it returns the
	51	value that actually should be at 0x141000)
	52	bp 340064c: if R0 == 0 2MB DRAM is ok, otherwise there's an error
	53
	54	set chip (BIOS):
	55	same as goldprmd (serial + ext video crystal check)
	56	bp 3400110: External Video Crystal test
	57
8	58	*/
9	59
10	60	#include "emu.h"
11	61	#include "cpu/arm/arm.h"
12	62	#include "sound/dac.h"
13	63	#include "includes/archimds.h"
	64	#include "machine/i2cmem.h"
14	65
	66	extern void archimedes_request_irq_a(running_machine *machine, int mask);
	67	static emu_timer *mk5_2KHz_timer;
	68	static UINT8 ext_latch;
	69
	70	/* bit mirrors of I2C */
	71	static WRITE32_HANDLER( mk5_i2c_w )
	72	{
	73	i2cmem_sda_write(space->machine->device("i2cmem"), (data & 0x40) >> 6);
	74	i2cmem_scl_write(space->machine->device("i2cmem"), (data & 0x80) >> 7);
	75	i2c_clk = (data & 0x80) >> 7;
	76	}
	77
	78	static WRITE32_HANDLER( mk5_ext_latch_w )
	79	{
	80	/* this banks "something" */
	81	ext_latch = data & 1;
	82	}
	83
	84	static READ32_HANDLER( ext_timer_latch_r )
	85	{
	86	/* reset 2KHz timer */
	87	ioc_regs[IRQ_STATUS_A] &= 0xfe;
	88	timer_adjust_oneshot(mk5_2KHz_timer, ATTOTIME_IN_HZ(2000), 0);
	89
	90	return 0xffffffff; //value doesn't matter apparently
	91	}
	92
	93	static READ32_HANDLER( mk5_ioc_r )
	94	{
	95	return archimedes_ioc_r(space,offset,mem_mask);
	96	}
	97
	98	static WRITE32_HANDLER( mk5_ioc_w )
	99	{
	100	if(!ext_latch)
	101	archimedes_ioc_w(space,offset,data,mem_mask);
	102	}
	103
	104	static READ32_HANDLER( mk5_unk_r )
	105	{
	106	return 0xf5; // checked inside the CPU check, unknown meaning
	107	}
	108
	109	/* I'm not really optimistic that this thing really uses I2C ... */
	110	static READ32_HANDLER( mk5_econet_r )
	111	{
	112	UINT8 i2c_data;
	113
	114	i2c_data = (i2cmem_sda_read(space->machine->device("i2cmem")) & 1);
	115
	116	return (ioc_regs[CONTROL] & 0xfc) | (i2c_clk<<1) | i2c_data;
	117	}
	118
	119	static WRITE32_HANDLER( mk5_econet_w )
	120	{
	121	//logerror("IOC I2C: CLK %d DAT %d\n", (data>>1)&1, data&1);
	122	i2cmem_sda_write(space->machine->device("i2cmem"), data & 0x01);
	123	i2cmem_scl_write(space->machine->device("i2cmem"), (data & 0x02) >> 1);
	124	i2c_clk = (data & 2) >> 1;
	125	}
	126
15	127	static ADDRESS_MAP_START( aristmk5_map, ADDRESS_SPACE_PROGRAM, 32 )
16	128	AM_RANGE(0x00000000, 0x01ffffff) AM_READWRITE(archimedes_memc_logical_r, archimedes_memc_logical_w)
17	129	AM_RANGE(0x02000000, 0x02ffffff) AM_RAM AM_BASE(&archimedes_memc_physmem) /* physical RAM - 16 MB for now, should be 512k for the A310 */
18		AM_RANGE(0x03000000, 0x033fffff) AM_READWRITE(archimedes_ioc_r, archimedes_ioc_w)
19		AM_RANGE(0x03400000, 0x035fffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITE(archimedes_memc_page_w)
	130
	131	/* MK-5 overrides */
	132	AM_RANGE(0x03010420, 0x03010423) AM_RAM_WRITE(mk5_i2c_w)
	133	AM_RANGE(0x03010810, 0x03010813) AM_READNOP //MK-5 specific, watchdog
	134	//  System Startup Code Enabled protection appears to be located at 0x3010400 - 0x30104ff
	135	AM_RANGE(0x03220000, 0x03220003) AM_READWRITE(mk5_econet_r,mk5_econet_w)
	136	AM_RANGE(0x03250048, 0x0325004b) AM_WRITE(mk5_ext_latch_w)
	137	AM_RANGE(0x03250050, 0x03250053) AM_READ(mk5_unk_r)
	138	AM_RANGE(0x03250058, 0x0325005b) AM_READ(ext_timer_latch_r)
	139
	140	AM_RANGE(0x03000000, 0x033fffff) AM_READWRITE(mk5_ioc_r, mk5_ioc_w)
	141	AM_RANGE(0x03400000, 0x035fffff) AM_ROM AM_REGION("maincpu", 0) AM_WRITE(archimedes_vidc_w)
20	142	AM_RANGE(0x03600000, 0x037fffff) AM_READWRITE(archimedes_memc_r, archimedes_memc_w)
21		AM_RANGE(0x03800000, 0x039fffff) AM_READWRITE(archimedes_vidc_r, archimedes_vidc_w)
	143	AM_RANGE(0x03800000, 0x039fffff) AM_WRITE(archimedes_memc_page_w)
22	144	ADDRESS_MAP_END
23	145
24	146
25	147	static INPUT_PORTS_START( aristmk5 )
	148	/* This simulates the ROM swap */
	149	PORT_START("ROM_LOAD")
	150	PORT_CONFNAME( 0x03, 0x00, "System Mode" )
	151	PORT_CONFSETTING(    0x00, "Set Chip v4.04 Mode" )
	152	PORT_CONFSETTING(    0x01, "Set Chip v4.4 Mode" )
	153	//  Clear Chip (missing?)
	154	PORT_CONFSETTING(    0x03, "Game Mode" )
26	155	INPUT_PORTS_END
27	156
28		static VIDEO_START(aristmk5)
	157	static DRIVER_INIT( aristmk5 )
29	158	{
30
	159	archimedes_driver_init(machine);
31	160	}
32	161
33		static VIDEO_UPDATE(aristmk5)
	162	static TIMER_CALLBACK( mk5_2KHz_callback )
34	163	{
35		return 0;
36		}
	164	ioc_regs[4] |= 1;
37	165
38		static DRIVER_INIT( aristmk5 )
39		{
40		archimedes_driver_init(machine);
	166	timer_adjust_oneshot(mk5_2KHz_timer, attotime_never, 0);
41	167	}
42	168
43	169	static MACHINE_START( aristmk5 )
r8962	r8963
45	171	archimedes_init(machine);
46	172
47	173	// reset the DAC to centerline
48		dac_signed_data_w(machine->device("dac"), 0x80);
	174	//dac_signed_data_w(machine->device("dac"), 0x80);
	175
	176	mk5_2KHz_timer = timer_alloc(machine, mk5_2KHz_callback, 0);
49	177	}
50	178
51	179	static MACHINE_RESET( aristmk5 )
52	180	{
53	181	archimedes_reset(machine);
	182	timer_adjust_oneshot(mk5_2KHz_timer, ATTOTIME_IN_HZ(2000), 0);
	183
	184	ioc_regs[IRQ_STATUS_B] |= 0x40; //hack, set keyboard irq empty to be ON
	185
	186	/* load the roms according to what the operator wants */
	187	{
	188	UINT8 *ROM = memory_region(machine,"maincpu");
	189	UINT8 *PRG = memory_region(machine,"prg_code");
	190	int i;
	191	UINT8 op_mode;
	192
	193	op_mode = input_port_read(machine, "ROM_LOAD");
	194
	195	if(op_mode == 3)
	196	{
	197	for(i=0;i<0x300000;i++)
	198	ROM[i] = PRG[i+0x200000];
	199	}
	200	else
	201	{
	202	for(i=0;i<0x100000;i++)
	203	ROM[i] = PRG[i+(op_mode*0x100000)];
	204	}
	205	}
54	206	}
55	207
	208	#define   NVRAM_SIZE 256
	209	#define   NVRAM_PAGE_SIZE   0   /* max size of one write request */
	210
	211	static const i2cmem_interface i2cmem_interface =
	212	{
	213	I2CMEM_SLAVE_ADDRESS, NVRAM_PAGE_SIZE, NVRAM_SIZE
	214	};
	215
	216
56	217	static MACHINE_DRIVER_START( aristmk5 )
57	218	MDRV_CPU_ADD("maincpu", ARM, 10000000) // ?
58	219	MDRV_CPU_PROGRAM_MAP(aristmk5_map)
59	220
	221	MDRV_MACHINE_START( aristmk5 )
60	222	MDRV_MACHINE_RESET( aristmk5 )
61		MDRV_MACHINE_START( aristmk5 )
62	223
	224	MDRV_I2CMEM_ADD("i2cmem",i2cmem_interface)
	225
63	226	MDRV_SCREEN_ADD("screen", RASTER)
64	227	MDRV_SCREEN_REFRESH_RATE(60)
65	228	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
66		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
67		MDRV_SCREEN_SIZE(64*8, 32*8)
68		MDRV_SCREEN_VISIBLE_AREA(8*8, 48*8-1, 2*8, 30*8-1)
	229	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
	230	MDRV_SCREEN_SIZE(1280, 1024) //TODO: proper max size?
	231	MDRV_SCREEN_VISIBLE_AREA(0, 1280-1, 0, 1024-1)
69	232
70	233	MDRV_PALETTE_LENGTH(0x200)
71	234
72		MDRV_VIDEO_START(aristmk5)
73		MDRV_VIDEO_UPDATE(aristmk5)
	235	MDRV_VIDEO_START(archimds_vidc)
	236	MDRV_VIDEO_UPDATE(archimds_vidc)
74	237
75		MDRV_SPEAKER_STANDARD_MONO("aristmk5")
76		MDRV_SOUND_ADD("dac", DAC, 0)
77		MDRV_SOUND_ROUTE(0, "aristmk5", 1.00)
	238	MDRV_SPEAKER_STANDARD_MONO("mono")
	239	MDRV_SOUND_ADD("dac0", DAC, 0)
	240	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	241
	242	MDRV_SOUND_ADD("dac1", DAC, 0)
	243	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	244
	245	MDRV_SOUND_ADD("dac2", DAC, 0)
	246	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	247
	248	MDRV_SOUND_ADD("dac3", DAC, 0)
	249	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	250
	251	MDRV_SOUND_ADD("dac4", DAC, 0)
	252	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	253
	254	MDRV_SOUND_ADD("dac5", DAC, 0)
	255	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	256
	257	MDRV_SOUND_ADD("dac6", DAC, 0)
	258	MDRV_SOUND_ROUTE(0, "mono", 0.10)
	259
	260	MDRV_SOUND_ADD("dac7", DAC, 0)
	261	MDRV_SOUND_ROUTE(0, "mono", 0.10)
78	262	MACHINE_DRIVER_END
79	263
	264	#define ARISTOCRAT_MK5_BIOS \
	265	ROM_REGION( 0x800000, "prg_code", 0 ) \
	266	/* setchip v4.04.08 4meg */ \
	267	ROM_LOAD32_WORD( "setchip v4.04.08.u7",  0x000000, 0x80000, CRC(e8e8dc75) SHA1(201fe95256459ce34fdb6f7498135ab5016d07f3) ) \
	268	ROM_LOAD32_WORD( "setchip v4.04.08.u11", 0x000002, 0x80000, CRC(ff7a9035) SHA1(4352c4336e61947c555fdc80c61f944076f64b64) ) \
	269	/* setchip v4.4 4meg 42pin */ \
	270	ROM_LOAD32_WORD( "setchip v4.4.u7",  0x100000, 0x80000, CRC(2453137e) SHA1(b59998e75ae3924da16faf47b9cfe9afd60d810c) ) \
	271	ROM_LOAD32_WORD( "setchip v4.4.u11", 0x100002, 0x80000, CRC(82dfa12a) SHA1(86fd0f0ad8d5d1bc503392a40bbcdadb055b2765) ) \
	272
	273	ROM_START( aristmk5 )
	274	ARISTOCRAT_MK5_BIOS
	275
	276	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 )
	277
	278	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
	279	ROM_END
	280
80	281	ROM_START( reelrock )
81		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
82		ROM_LOAD32_WORD( "reelrock.u7",  0x000000, 0x80000, CRC(b60af34f) SHA1(1143380b765db234b3871c0fe04736472fde7de4) )
83		ROM_LOAD32_WORD( "reelrock.u11", 0x000002, 0x80000, CRC(57e341d0) SHA1(9b0d50763bb74ca5fe404c9cd526633721cf6677) )
84		ROM_LOAD32_WORD( "reelrock.u8",  0x100000, 0x80000, CRC(57eec667) SHA1(5f3888d75f48b6148f451d7ebb7f99e1a0939f3c) )
85		ROM_LOAD32_WORD( "reelrock.u12", 0x100002, 0x80000, CRC(4ac20679) SHA1(0ac732ffe6a33806e4a06e87ec875a3e1314e06b) )
	282	ARISTOCRAT_MK5_BIOS
	283	ROM_LOAD32_WORD( "reelrock.u7",  0x200000, 0x80000, CRC(b60af34f) SHA1(1143380b765db234b3871c0fe04736472fde7de4) )
	284	ROM_LOAD32_WORD( "reelrock.u11", 0x200002, 0x80000, CRC(57e341d0) SHA1(9b0d50763bb74ca5fe404c9cd526633721cf6677) )
	285	ROM_LOAD32_WORD( "reelrock.u8",  0x300000, 0x80000, CRC(57eec667) SHA1(5f3888d75f48b6148f451d7ebb7f99e1a0939f3c) )
	286	ROM_LOAD32_WORD( "reelrock.u12", 0x300002, 0x80000, CRC(4ac20679) SHA1(0ac732ffe6a33806e4a06e87ec875a3e1314e06b) )
	287
	288	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	289
	290	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
86	291	ROM_END
87	292
88	293	ROM_START( indiandr )
89		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
90		ROM_LOAD32_WORD( "indiandr.u7",  0x000000, 0x80000, CRC(0c924a3e) SHA1(499b4ae601e53173e3ba5f400a40e5ae7bbaa043) )
91		ROM_LOAD32_WORD( "indiandr.u11", 0x000002, 0x80000, CRC(e371dc0f) SHA1(a01ab7fb63a19c144f2c465ecdfc042695124bdf) )
92		ROM_LOAD32_WORD( "indiandr.u8",  0x100000, 0x80000, CRC(1c6bfb47) SHA1(7f751cb499a6185a0ab64eeec511583ceeee6ee8) )
93		ROM_LOAD32_WORD( "indiandr.u12", 0x100002, 0x80000, CRC(4bbe67f6) SHA1(928f88387da66697f1de54f086531f600f80a15e) )
	294	ARISTOCRAT_MK5_BIOS
	295	ROM_LOAD32_WORD( "indiandr.u7",  0x200000, 0x80000, CRC(0c924a3e) SHA1(499b4ae601e53173e3ba5f400a40e5ae7bbaa043) )
	296	ROM_LOAD32_WORD( "indiandr.u11", 0x200002, 0x80000, CRC(e371dc0f) SHA1(a01ab7fb63a19c144f2c465ecdfc042695124bdf) )
	297	ROM_LOAD32_WORD( "indiandr.u8",  0x300000, 0x80000, CRC(1c6bfb47) SHA1(7f751cb499a6185a0ab64eeec511583ceeee6ee8) )
	298	ROM_LOAD32_WORD( "indiandr.u12", 0x300002, 0x80000, CRC(4bbe67f6) SHA1(928f88387da66697f1de54f086531f600f80a15e) )
	299
	300	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	301
	302	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
94	303	ROM_END
95	304
96	305	ROM_START( dolphntr )
97		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
98		ROM_LOAD32_WORD( "0100424v.u7",  0x000000, 0x80000, CRC(657faef7) SHA1(09e1f9d461e855c10cf8b825ef83dd3e7db65b43) )
99		ROM_LOAD32_WORD( "0100424v.u11", 0x000002, 0x80000, CRC(65aa46ec) SHA1(3ad4270efbc2e947097d94a3258a544d79a1d599) )
100		ROM_LOAD32_WORD( "0100424v.u8",  0x100000, 0x80000, CRC(e77868ad) SHA1(3345da120075bc0da47bac0a4840790693382620) )
101		ROM_LOAD32_WORD( "0100424v.u12", 0x100002, 0x80000, CRC(6abd9309) SHA1(c405a13f5bfe447c1ab20d92e140e4fb145920d4) )
	306	ARISTOCRAT_MK5_BIOS
	307	ROM_LOAD32_WORD( "0100424v.u7",  0x200000, 0x80000, CRC(657faef7) SHA1(09e1f9d461e855c10cf8b825ef83dd3e7db65b43) )
	308	ROM_LOAD32_WORD( "0100424v.u11", 0x200002, 0x80000, CRC(65aa46ec) SHA1(3ad4270efbc2e947097d94a3258a544d79a1d599) )
	309	ROM_LOAD32_WORD( "0100424v.u8",  0x300000, 0x80000, CRC(e77868ad) SHA1(3345da120075bc0da47bac0a4840790693382620) )
	310	ROM_LOAD32_WORD( "0100424v.u12", 0x300002, 0x80000, CRC(6abd9309) SHA1(c405a13f5bfe447c1ab20d92e140e4fb145920d4) )
	311
	312	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	313
	314	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
102	315	ROM_END
103	316
104	317	ROM_START( dolphtra )
105		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
106		ROM_LOAD32_WORD( "0200424v.u7",  0x000000, 0x80000, CRC(5dd88306) SHA1(ee8ec7d123d057e8df9be0e8dadecea7dab7aafd) )
107		ROM_LOAD32_WORD( "0200424v.u11", 0x000002, 0x80000, CRC(bcb732ea) SHA1(838300914846c6e740780e5a24b9db7304a8a88d) )
	318	ARISTOCRAT_MK5_BIOS
	319	ROM_LOAD32_WORD( "0200424v.u7",  0x200000, 0x80000, CRC(5dd88306) SHA1(ee8ec7d123d057e8df9be0e8dadecea7dab7aafd) )
	320	ROM_LOAD32_WORD( "0200424v.u11", 0x200002, 0x80000, CRC(bcb732ea) SHA1(838300914846c6e740780e5a24b9db7304a8a88d) )
	321
	322	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	323
	324	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
108	325	ROM_END
109	326
110	327	ROM_START( goldprmd )
111		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
112		ROM_LOAD32_WORD( "goldprmd.u7",  0x000000, 0x80000, CRC(2fbed80c) SHA1(fb0d97cb2be96da37c487fc3aef06c6120efdb46) )
113		ROM_LOAD32_WORD( "goldprmd.u11", 0x000002, 0x80000, CRC(ec9c183c) SHA1(e405082ee779c4fee103fb7384469c9d6afbc95b) )
114		ROM_LOAD32_WORD( "goldprmd.u8",  0x100000, 0x80000, CRC(3cd7d8e5) SHA1(ae83a7c335564c398330d43295997b8ca547c92d) )
115		ROM_LOAD32_WORD( "goldprmd.u12", 0x100002, 0x80000, CRC(8bbf45d0) SHA1(f58f28e7cc4ac225197959566d81973b5aa0e836) )
	328	ARISTOCRAT_MK5_BIOS
	329	ROM_LOAD32_WORD( "goldprmd.u7",  0x200000, 0x80000, CRC(2fbed80c) SHA1(fb0d97cb2be96da37c487fc3aef06c6120efdb46) )
	330	ROM_LOAD32_WORD( "goldprmd.u11", 0x200002, 0x80000, CRC(ec9c183c) SHA1(e405082ee779c4fee103fb7384469c9d6afbc95b) )
	331	ROM_LOAD32_WORD( "goldprmd.u8",  0x300000, 0x80000, CRC(3cd7d8e5) SHA1(ae83a7c335564c398330d43295997b8ca547c92d) )
	332	ROM_LOAD32_WORD( "goldprmd.u12", 0x300002, 0x80000, CRC(8bbf45d0) SHA1(f58f28e7cc4ac225197959566d81973b5aa0e836) )
	333
	334	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	335
	336	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
116	337	ROM_END
117	338
118	339	ROM_START( qotn )
119		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
120		ROM_LOAD32_WORD( "0200439v.u7",  0x000000, 0x80000, CRC(d476a893) SHA1(186d6fb1830c33976f2d3c96e4f045ece885dc63) )
121		ROM_LOAD32_WORD( "0200439v.u11", 0x000002, 0x80000, CRC(8b0d7205) SHA1(ffa03f1c9332a1a7443eb91b0ded56e7cd9e3cee) )
122		ROM_LOAD32_WORD( "0200439v.u8",  0x100000, 0x80000, CRC(9b996ef1) SHA1(72489e9a0ee5c34f7cad3d121bcd08e09ef72360) )
123		ROM_LOAD32_WORD( "0200439v.u12", 0x100002, 0x80000, CRC(2a0f7feb) SHA1(27c89dadf759e6c892121650758c44ec50990cb6) )
	340	ARISTOCRAT_MK5_BIOS
	341	ROM_LOAD32_WORD( "0200439v.u7",  0x200000, 0x80000, CRC(d476a893) SHA1(186d6fb1830c33976f2d3c96e4f045ece885dc63) )
	342	ROM_LOAD32_WORD( "0200439v.u11", 0x200002, 0x80000, CRC(8b0d7205) SHA1(ffa03f1c9332a1a7443eb91b0ded56e7cd9e3cee) )
	343	ROM_LOAD32_WORD( "0200439v.u8",  0x300000, 0x80000, CRC(9b996ef1) SHA1(72489e9a0ee5c34f7cad3d121bcd08e09ef72360) )
	344	ROM_LOAD32_WORD( "0200439v.u12", 0x300002, 0x80000, CRC(2a0f7feb) SHA1(27c89dadf759e6c892121650758c44ec50990cb6) )
	345
	346	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	347
	348	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
124	349	ROM_END
125	350
126	351	ROM_START( swthrt2v )
127		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
128		ROM_LOAD32_WORD( "swthrt2v.u7",  0x000000, 0x80000, CRC(f51b2faa) SHA1(dbcfdbee92af5f89a8a2611bbc687ee0cc907642) )
129		ROM_LOAD32_WORD( "swthrt2v.u11", 0x000002, 0x80000, CRC(bd7ead91) SHA1(9f775428a4aa0b0a8ee17aed9be620edc2020c5e) )
	352	ARISTOCRAT_MK5_BIOS
	353	ROM_LOAD32_WORD( "swthrt2v.u7",  0x200000, 0x80000, CRC(f51b2faa) SHA1(dbcfdbee92af5f89a8a2611bbc687ee0cc907642) )
	354	ROM_LOAD32_WORD( "swthrt2v.u11", 0x200002, 0x80000, CRC(bd7ead91) SHA1(9f775428a4aa0b0a8ee17aed9be620edc2020c5e) )
	355
	356	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	357
	358	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
130	359	ROM_END
131	360
132	361	ROM_START( enchfrst )
133		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
134		ROM_LOAD32_WORD( "0400122v.u7",  0x000000, 0x80000, CRC(b5829b27) SHA1(f6f84c8dc524dcee95e37b93ead9090903bdca4f) )
135		ROM_LOAD32_WORD( "0400122v.u11", 0x000002, 0x80000, CRC(7a97adc8) SHA1(b52f7fdc7edf9ad92351154c01b8003c0576ed94) )
	362	ARISTOCRAT_MK5_BIOS
	363	ROM_LOAD32_WORD( "0400122v.u7",  0x200000, 0x80000, CRC(b5829b27) SHA1(f6f84c8dc524dcee95e37b93ead9090903bdca4f) )
	364	ROM_LOAD32_WORD( "0400122v.u11", 0x200002, 0x80000, CRC(7a97adc8) SHA1(b52f7fdc7edf9ad92351154c01b8003c0576ed94) )
	365
	366	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	367
	368	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
136	369	ROM_END
137	370
138	371	ROM_START( margmgc )
139		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
140		ROM_LOAD32_WORD( "margmgc.u7",  0x000000, 0x80000, CRC(eee7ebaf) SHA1(bad0c08578877f84325c07d51c6ed76c40b70720) )
141		ROM_LOAD32_WORD( "margmgc.u11", 0x000002, 0x80000, CRC(4901a166) SHA1(8afe6f08b4ac5c17744dff73939c4bc93124fdf1) )
142		ROM_LOAD32_WORD( "margmgc.u8",  0x100000, 0x80000, CRC(b0d78efe) SHA1(bc8b345290f4d31c6553f1e2700bc8324b4eeeac) )
143		ROM_LOAD32_WORD( "margmgc.u12", 0x100002, 0x80000, CRC(90ff59a8) SHA1(c9e342db2b5e8c3f45efa8496bc369385046e920) )
144		ROM_LOAD32_WORD( "margmgc.u9",  0x200000, 0x80000, CRC(1f0ca910) SHA1(be7a2f395eae09a29faf99ba34551fbc38f20fdb) )
145		ROM_LOAD32_WORD( "margmgc.u13", 0x200002, 0x80000, CRC(3f702945) SHA1(a6c9a848d059c1e564fdc5a65bf8c9600853edfa) )
	372	ARISTOCRAT_MK5_BIOS
	373	ROM_LOAD32_WORD( "margmgc.u7",  0x200000, 0x80000, CRC(eee7ebaf) SHA1(bad0c08578877f84325c07d51c6ed76c40b70720) )
	374	ROM_LOAD32_WORD( "margmgc.u11", 0x200002, 0x80000, CRC(4901a166) SHA1(8afe6f08b4ac5c17744dff73939c4bc93124fdf1) )
	375	ROM_LOAD32_WORD( "margmgc.u8",  0x300000, 0x80000, CRC(b0d78efe) SHA1(bc8b345290f4d31c6553f1e2700bc8324b4eeeac) )
	376	ROM_LOAD32_WORD( "margmgc.u12", 0x300002, 0x80000, CRC(90ff59a8) SHA1(c9e342db2b5e8c3f45efa8496bc369385046e920) )
	377	ROM_LOAD32_WORD( "margmgc.u9",  0x400000, 0x80000, CRC(1f0ca910) SHA1(be7a2f395eae09a29faf99ba34551fbc38f20fdb) )
	378	ROM_LOAD32_WORD( "margmgc.u13", 0x400002, 0x80000, CRC(3f702945) SHA1(a6c9a848d059c1e564fdc5a65bf8c9600853edfa) )
	379
	380	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	381
	382	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
146	383	ROM_END
147	384
148	385	ROM_START( adonis )
149		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
150		ROM_LOAD32_WORD( "adonis.u7",  0x000000, 0x80000, CRC(ab386ab0) SHA1(56c5baea4272866a9fe18bdc371a49f155251f86) )
151		ROM_LOAD32_WORD( "adonis.u11", 0x000002, 0x80000, CRC(ce8c8449) SHA1(9894f0286f27147dcc437e4406870fe695a6f61a) )
152		ROM_LOAD32_WORD( "adonis.u8",  0x100000, 0x80000, CRC(99097a82) SHA1(a08214ab4781b06b46fc3be5c48288e373230ef4) )
153		ROM_LOAD32_WORD( "adonis.u12", 0x100002, 0x80000, CRC(443a7b6d) SHA1(c19a1c50fb8774826a1e12adacba8bbfce320891) )
	386	ARISTOCRAT_MK5_BIOS
	387	ROM_LOAD32_WORD( "adonis.u7",  0x200000, 0x80000, CRC(ab386ab0) SHA1(56c5baea4272866a9fe18bdc371a49f155251f86) )
	388	ROM_LOAD32_WORD( "adonis.u11", 0x200002, 0x80000, CRC(ce8c8449) SHA1(9894f0286f27147dcc437e4406870fe695a6f61a) )
	389	ROM_LOAD32_WORD( "adonis.u8",  0x300000, 0x80000, CRC(99097a82) SHA1(a08214ab4781b06b46fc3be5c48288e373230ef4) )
	390	ROM_LOAD32_WORD( "adonis.u12", 0x300002, 0x80000, CRC(443a7b6d) SHA1(c19a1c50fb8774826a1e12adacba8bbfce320891) )
	391
	392	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	393
	394	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
154	395	ROM_END
155	396
156	397	ROM_START( dmdtouch )
157		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
158		ROM_LOAD32_WORD( "dmdtouch.u7",  0x000000, 0x80000, CRC(71b19365) SHA1(5a8ba1806af544d33e9acbcbbc0555805b4074e6) )
159		ROM_LOAD32_WORD( "dmdtouch.u11", 0x000002, 0x80000, CRC(3d836342) SHA1(b015a4ba998b39ed86cdb6247c9c7f1365641b59) )
160		ROM_LOAD32_WORD( "dmdtouch.u8",  0x100000, 0x80000, CRC(971bbf63) SHA1(082f81115209c7089c76fb207248da3c347a080b) )
161		ROM_LOAD32_WORD( "dmdtouch.u12", 0x100002, 0x80000, CRC(9e0d08e2) SHA1(38b10f7c37f1cefe9271549073dc0a4fed409aec) )
	398	ARISTOCRAT_MK5_BIOS
	399	ROM_LOAD32_WORD( "dmdtouch.u7",  0x200000, 0x80000, CRC(71b19365) SHA1(5a8ba1806af544d33e9acbcbbc0555805b4074e6) )
	400	ROM_LOAD32_WORD( "dmdtouch.u11", 0x200002, 0x80000, CRC(3d836342) SHA1(b015a4ba998b39ed86cdb6247c9c7f1365641b59) )
	401	ROM_LOAD32_WORD( "dmdtouch.u8",  0x300000, 0x80000, CRC(971bbf63) SHA1(082f81115209c7089c76fb207248da3c347a080b) )
	402	ROM_LOAD32_WORD( "dmdtouch.u12", 0x300002, 0x80000, CRC(9e0d08e2) SHA1(38b10f7c37f1cefe9271549073dc0a4fed409aec) )
	403
	404	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	405
	406	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
162	407	ROM_END
163	408
164	409	ROM_START( magicmsk )
165		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
166		ROM_LOAD32_WORD( "magicmsk.u7",  0x000000, 0x80000, CRC(17317eb9) SHA1(3ddb8d61f23461c3194af534928164550208bbee) )
167		ROM_LOAD32_WORD( "magicmsk.u11", 0x000002, 0x80000, CRC(23aefb5a) SHA1(ba4488754794f75f53b9c81b74b6ccd992c64acc) )
168		ROM_LOAD32_WORD( "magicmsk.u8",  0x100000, 0x80000, CRC(23aefb5a) SHA1(ba4488754794f75f53b9c81b74b6ccd992c64acc) )
169		ROM_LOAD32_WORD( "magicmsk.u12", 0x100002, 0x80000, CRC(6829a7bf) SHA1(97eed83763d0ec5e753d6ad194e906b1307c4940) )
	410	ARISTOCRAT_MK5_BIOS
	411	ROM_LOAD32_WORD( "magicmsk.u7",  0x200000, 0x80000, CRC(17317eb9) SHA1(3ddb8d61f23461c3194af534928164550208bbee) )
	412	ROM_LOAD32_WORD( "magicmsk.u11", 0x200002, 0x80000, CRC(23aefb5a) SHA1(ba4488754794f75f53b9c81b74b6ccd992c64acc) )
	413	ROM_LOAD32_WORD( "magicmsk.u8",  0x300000, 0x80000, BAD_DUMP CRC(971bbf63) SHA1(082f81115209c7089c76fb207248da3c347a080b) ) //same as dmdtouch u8 ROM
	414	ROM_LOAD32_WORD( "magicmsk.u12", 0x300002, 0x80000, CRC(6829a7bf) SHA1(97eed83763d0ec5e753d6ad194e906b1307c4940) )
	415
	416	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	417
	418	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
170	419	ROM_END
171	420
172	421	ROM_START( geishanz )
173		ROM_REGION( 0x800000, "maincpu", 0 ) /* ARM Code */
174		ROM_LOAD32_WORD( "0101408.u7",  0x000000, 0x80000, CRC(ebdde248) SHA1(83f4f4deb5c6f5b33ae066d50e043a24cb0cbfe0) )
175		ROM_LOAD32_WORD( "0101408.u11", 0x000002, 0x80000, CRC(2f9e7cd4) SHA1(e9498879c9ca66740856c00fda0416f5d9f7c823) )
176		ROM_LOAD32_WORD( "0101408.u8",  0x100000, 0x80000, CRC(87e41b1b) SHA1(029687aeaed701e0f4b8da9d1d60a5a0a9445518) )
177		ROM_LOAD32_WORD( "0101408.u12", 0x100002, 0x80000, CRC(255f2368) SHA1(eb955452e1ed8d9d4f30f3372d7321f01d3654d3) )
178		ROM_LOAD32_WORD( "0101408.u9",  0x200000, 0x80000, CRC(5f161953) SHA1(d07353d006811813b94cb022857f49c4906fd87b) )
179		ROM_LOAD32_WORD( "0101408.u13", 0x200002, 0x80000, CRC(5ef6323e) SHA1(82a720d814ca06c6d286c59bbf325d9a1034375a) )
	422	ARISTOCRAT_MK5_BIOS
	423	ROM_LOAD32_WORD( "0101408.u7",  0x200000, 0x80000, CRC(ebdde248) SHA1(83f4f4deb5c6f5b33ae066d50e043a24cb0cbfe0) )
	424	ROM_LOAD32_WORD( "0101408.u11", 0x200002, 0x80000, CRC(2f9e7cd4) SHA1(e9498879c9ca66740856c00fda0416f5d9f7c823) )
	425	ROM_LOAD32_WORD( "0101408.u8",  0x300000, 0x80000, CRC(87e41b1b) SHA1(029687aeaed701e0f4b8da9d1d60a5a0a9445518) )
	426	ROM_LOAD32_WORD( "0101408.u12", 0x300002, 0x80000, CRC(255f2368) SHA1(eb955452e1ed8d9d4f30f3372d7321f01d3654d3) )
	427	ROM_LOAD32_WORD( "0101408.u9",  0x400000, 0x80000, CRC(5f161953) SHA1(d07353d006811813b94cb022857f49c4906fd87b) )
	428	ROM_LOAD32_WORD( "0101408.u13", 0x400002, 0x80000, CRC(5ef6323e) SHA1(82a720d814ca06c6d286c59bbf325d9a1034375a) )
	429
	430	ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
	431
	432	ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
180	433	ROM_END
181	434
	435	GAME( 1995, aristmk5, 0,        aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "MK-V System", GAME_NOT_WORKING|GAME_IS_BIOS_ROOT )
182	436
183		GAME( 1995, swthrt2v, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Sweet Hearts II (C - 07/09/95, Venezuela version)", GAME_NOT_WORKING|GAME_NO_SOUND )
184		GAME( 1995, enchfrst, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Enchanted Forest (E - 23/06/95, Local)", GAME_NOT_WORKING|GAME_NO_SOUND )
185		GAME( 1996, dolphntr, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Dolphin Treasure (B - 06/12/96, NSW/ACT, Rev 1.24.4.0)", GAME_NOT_WORKING|GAME_NO_SOUND )
186		GAME( 1996, dolphtra, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Dolphin Treasure (B - 06/12/96, NSW/ACT, Rev 3)", GAME_NOT_WORKING|GAME_NO_SOUND )
187		GAME( 1997, goldprmd, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Golden Pyramids (B - 13-05-97, USA)", GAME_NOT_WORKING|GAME_NO_SOUND )
188		GAME( 1997, qotn,     0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Queen of the Nile (B - 13-05-97, NSW/ACT)", GAME_NOT_WORKING|GAME_NO_SOUND )
189		GAME( 1997, dmdtouch, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Diamond Touch (E - 30-06-97, Local)", GAME_NOT_WORKING|GAME_NO_SOUND )
190		GAME( 1998, adonis,   0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Adonis (A - 25-05-98, NSW/ACT)", GAME_NOT_WORKING|GAME_NO_SOUND )
191		GAME( 1998, reelrock, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Reelin-n-Rockin (A - 13/07/98, Local)", GAME_NOT_WORKING|GAME_NO_SOUND )
192		GAME( 1998, indiandr, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Indian Dreaming (B - 15/12/98, Local)", GAME_NOT_WORKING|GAME_NO_SOUND )
193		GAME( 2000, magicmsk, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Magic Mask (A - 09/05/2000, Export))", GAME_NOT_WORKING|GAME_NO_SOUND )
194		GAME( 2000, margmgc,  0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Margarita Magic (A - 07/07/2000, NSW/ACT)", GAME_NOT_WORKING|GAME_NO_SOUND )
195		GAME( 2001, geishanz, 0, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Geisha (A - 05/03/01, New Zealand)", GAME_NOT_WORKING|GAME_NO_SOUND )
	437	GAME( 1995, swthrt2v, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Sweet Hearts II (C - 07/09/95, Venezuela version)", GAME_NOT_WORKING|GAME_NO_SOUND )
	438	GAME( 1995, enchfrst, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Enchanted Forest (E - 23/06/95, Local)", GAME_NOT_WORKING|GAME_NO_SOUND )
	439	GAME( 1996, dolphntr, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Dolphin Treasure (B - 06/12/96, NSW/ACT, Rev 1.24.4.0)", GAME_NOT_WORKING|GAME_NO_SOUND )
	440	GAME( 1996, dolphtra, dolphntr, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Dolphin Treasure (B - 06/12/96, NSW/ACT, Rev 3)", GAME_NOT_WORKING|GAME_NO_SOUND )
	441	GAME( 1997, goldprmd, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Golden Pyramids (B - 13-05-97, USA)", GAME_NOT_WORKING|GAME_NO_SOUND )
	442	GAME( 1997, qotn,     aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Queen of the Nile (B - 13-05-97, NSW/ACT)", GAME_NOT_WORKING|GAME_NO_SOUND )
	443	GAME( 1997, dmdtouch, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Diamond Touch (E - 30-06-97, Local)", GAME_NOT_WORKING|GAME_NO_SOUND )
	444	GAME( 1998, adonis,   aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Adonis (A - 25-05-98, NSW/ACT)", GAME_NOT_WORKING|GAME_NO_SOUND )
	445	GAME( 1998, reelrock, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Reelin-n-Rockin (A - 13/07/98, Local)", GAME_NOT_WORKING|GAME_NO_SOUND )
	446	GAME( 1998, indiandr, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Indian Dreaming (B - 15/12/98, Local)", GAME_NOT_WORKING|GAME_NO_SOUND )
	447	GAME( 2000, magicmsk, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Magic Mask (A - 09/05/2000, Export))", GAME_NOT_WORKING|GAME_NO_SOUND )
	448	GAME( 2000, margmgc,  aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Margarita Magic (A - 07/07/2000, NSW/ACT)", GAME_NOT_WORKING|GAME_NO_SOUND )
	449	GAME( 2001, geishanz, aristmk5, aristmk5, aristmk5, aristmk5, ROT0,  "Aristocrat", "Geisha (A - 05/03/01, New Zealand)", GAME_NOT_WORKING|GAME_NO_SOUND )

src/mame/drivers/metalmx.c

r8962	r8963
453	453
454	454	static WRITE32_HANDLER( host_gsp_w )
455	455	{
456		const address_space *gsp_space = cputag_get_address_space(space->machine, "gsp", ADDRESS_SPACE_PROGRAM);
	456	address_space *gsp_space = cputag_get_address_space(space->machine, "gsp", ADDRESS_SPACE_PROGRAM);
457	457
458		memory_write_word(gsp_space, (0xc0000000 + (offset << 5) + 0x10) / 8, data);
459		memory_write_word(gsp_space, (0xc0000000 + (offset << 5))/ 8 , data >> 16);
	458	gsp_space->write_word((0xc0000000 + (offset << 5) + 0x10) / 8, data);
	459	gsp_space->write_word((0xc0000000 + (offset << 5))/ 8 , data >> 16);
460	460	}
461	461
462	462	static READ32_HANDLER( host_gsp_r )
463	463	{
464		const address_space *gsp_space = cputag_get_address_space(space->machine, "gsp", ADDRESS_SPACE_PROGRAM);
	464	address_space *gsp_space = cputag_get_address_space(space->machine, "gsp", ADDRESS_SPACE_PROGRAM);
465	465	UINT32 val;
466	466
467		val  = memory_read_word(gsp_space, (0xc0000000 + (offset << 5) + 0x10) / 8);
468		val |= memory_read_word(gsp_space, (0xc0000000 + (offset << 5)) / 8) << 16;
	467	val  = gsp_space->read_word((0xc0000000 + (offset << 5) + 0x10) / 8);
	468	val |= gsp_space->read_word((0xc0000000 + (offset << 5)) / 8) << 16;
469	469	return val;
470	470	}
471	471

src/mame/drivers/omegrace.c

r8962	r8963
231	231
232	232	static MACHINE_RESET( omegrace )
233	233	{
234		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	234	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
235	235	/* Omega Race expects the vector processor to be ready. */
236	236	avgdvg_reset_w(space, 0, 0);
237	237	}
r8962	r8963
329	329	AM_RANGE(0x0000, 0x3fff) AM_ROM
330	330	AM_RANGE(0x4000, 0x4bff) AM_RAM
331	331	AM_RANGE(0x5c00, 0x5cff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) /* NVRAM */
332		AM_RANGE(0x8000, 0x8fff) AM_RAM AM_BASE(&vectorram) AM_SIZE(&vectorram_size) AM_REGION("maincpu", 0x8000) /* vector ram */
	332	AM_RANGE(0x8000, 0x8fff) AM_RAM AM_BASE(&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size) AM_REGION("maincpu", 0x8000) /* vector ram */
333	333	AM_RANGE(0x9000, 0x9fff) AM_ROM /* vector rom */
334	334	ADDRESS_MAP_END
335	335

src/mame/drivers/decocass.c

r8962	r8963
1356	1356	static DRIVER_INIT( decocass )
1357	1357	{
1358	1358	decocass_state *state = machine->driver_data<decocass_state>();
1359		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1359	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1360	1360	UINT8 *rom = memory_region(machine, "maincpu");
1361	1361	int A;
1362	1362
1363	1363	/* allocate memory and mark all RAM regions with their decrypted pointers */
1364	1364	state->decrypted = auto_alloc_array(machine, UINT8, 0x10000);
1365		memory_set_decrypted_region(space, 0x0000, 0xc7ff, &state->decrypted[0x0000]);
1366		memory_set_decrypted_region(space, 0xd000, 0xdbff, &state->decrypted[0xd000]);
1367		memory_set_decrypted_region(space, 0xf000, 0xffff, &state->decrypted[0xf000]);
	1365	space->set_decrypted_region(0x0000, 0xc7ff, &state->decrypted[0x0000]);
	1366	space->set_decrypted_region(0xd000, 0xdbff, &state->decrypted[0xd000]);
	1367	space->set_decrypted_region(0xf000, 0xffff, &state->decrypted[0xf000]);
1368	1368
1369	1369	/* Swap bits 5 & 6 for opcodes */
1370	1370	for (A = 0xf000; A < 0x10000; A++)

src/mame/drivers/segas24.c

r8962	r8963
696	696	prev_resetcontrol = resetcontrol;
697	697	}
698	698
699		static void resetcontrol_w(const address_space *space, UINT8 data)
	699	static void resetcontrol_w(address_space *space, UINT8 data)
700	700	{
701	701	resetcontrol = data;
702	702	logerror("Reset control %02x ('%s':%x)\n", resetcontrol, space->cpu->tag(), cpu_get_pc(space->cpu));

src/mame/drivers/ddayjlc.c

r8962	r8963
232	232
233	233	for(i = 0; i < size; i++)
234	234	{
235		memory_write_byte(space, dst++, memory_read_byte(space, src++));
	235	space->write_byte(dst++, space->read_byte(src++));
236	236	}
237	237
238	238	state->e00x_l[0] = 0;

src/mame/drivers/konamigx.c

r8962	r8963
185	185	UINT32 adr;
186	186	} sprites[0x100];
187	187
188		static void generate_sprites(const address_space *space, UINT32 src, UINT32 spr, int count)
	188	static void generate_sprites(address_space *space, UINT32 src, UINT32 spr, int count)
189	189	{
190	190	int i;
191	191	int scount;
r8962	r8963
196	196	for(i=0; i<count; i++) {
197	197	UINT32 adr = src + 0x100*i;
198	198	int pri;
199		if(!memory_read_word(space, adr+2))
	199	if(!space->read_word(adr+2))
200	200	continue;
201		pri = memory_read_word(space, adr+28);
	201	pri = space->read_word(adr+28);
202	202
203	203	if(pri < 256) {
204	204	sprites[ecount].pri = pri;
r8962	r8963
211	211	for(i=0; i<ecount; i++) {
212	212	UINT32 adr = sprites[i].adr;
213	213	if(adr) {
214		UINT32 set =(memory_read_word(space, adr) << 16)|memory_read_word(space, adr+2);
215		UINT16 glob_x = memory_read_word(space, adr+4);
216		UINT16 glob_y = memory_read_word(space, adr+8);
217		UINT16 flip_x = memory_read_word(space, adr+12) ? 0x1000 : 0x0000;
218		UINT16 flip_y = memory_read_word(space, adr+14) ? 0x2000 : 0x0000;
	214	UINT32 set =(space->read_word(adr) << 16)|space->read_word(adr+2);
	215	UINT16 glob_x = space->read_word(adr+4);
	216	UINT16 glob_y = space->read_word(adr+8);
	217	UINT16 flip_x = space->read_word(adr+12) ? 0x1000 : 0x0000;
	218	UINT16 flip_y = space->read_word(adr+14) ? 0x2000 : 0x0000;
219	219	UINT16 glob_f = flip_x | (flip_y ^ 0x2000);
220		UINT16 zoom_x = memory_read_word(space, adr+20);
221		UINT16 zoom_y = memory_read_word(space, adr+22);
	220	UINT16 zoom_x = space->read_word(adr+20);
	221	UINT16 zoom_y = space->read_word(adr+22);
222	222	UINT16 color_val    = 0x0000;
223	223	UINT16 color_mask   = 0xffff;
224	224	UINT16 color_set    = 0x0000;
225	225	UINT16 color_rotate = 0x0000;
226	226	UINT16 v;
227	227
228		v = memory_read_word(space, adr+24);
	228	v = space->read_word(adr+24);
229	229	if(v & 0x8000) {
230	230	color_mask = 0xf3ff;
231	231	color_val |= (v & 3) << 10;
232	232	}
233	233
234		v = memory_read_word(space, adr+26);
	234	v = space->read_word(adr+26);
235	235	if(v & 0x8000) {
236	236	color_mask &= 0xfcff;
237	237	color_val  |= (v & 3) << 8;
238	238	}
239	239
240		v = memory_read_word(space, adr+18);
	240	v = space->read_word(adr+18);
241	241	if(v & 0x8000) {
242	242	color_mask &= 0xff1f;
243	243	color_val  |= v & 0xe0;
244	244	}
245	245
246		v = memory_read_word(space, adr+16);
	246	v = space->read_word(adr+16);
247	247	if(v & 0x8000)
248	248	color_set = v & 0x1f;
249	249	if(v & 0x4000)
r8962	r8963
256	256
257	257	if(set >= 0x200000 && set < 0xd00000)
258	258	{
259		UINT16 count2 = memory_read_word(space, set);
	259	UINT16 count2 = space->read_word(set);
260	260	set += 2;
261	261	while(count2) {
262		UINT16 idx  = memory_read_word(space, set);
263		UINT16 flip = memory_read_word(space, set+2);
264		UINT16 col  = memory_read_word(space, set+4);
265		short y = memory_read_word(space, set+6);
266		short x = memory_read_word(space, set+8);
	262	UINT16 idx  = space->read_word(set);
	263	UINT16 flip = space->read_word(set+2);
	264	UINT16 col  = space->read_word(set+4);
	265	short y = space->read_word(set+6);
	266	short x = space->read_word(set+8);
267	267
268	268	if(idx == 0xffff) {
269	269	set = (flip<<16) | col;
r8962	r8963
298	298	if(color_rotate)
299	299	col = (col & 0xffe0) | ((col + color_rotate) & 0x1f);
300	300
301		memory_write_word(space, spr   , (flip ^ glob_f) | sprites[i].pri);
302		memory_write_word(space, spr+ 2, idx);
303		memory_write_word(space, spr+ 4, y);
304		memory_write_word(space, spr+ 6, x);
305		memory_write_word(space, spr+ 8, zoom_y);
306		memory_write_word(space, spr+10, zoom_x);
307		memory_write_word(space, spr+12, col);
	301	space->write_word(spr   , (flip ^ glob_f) | sprites[i].pri);
	302	space->write_word(spr+ 2, idx);
	303	space->write_word(spr+ 4, y);
	304	space->write_word(spr+ 6, x);
	305	space->write_word(spr+ 8, zoom_y);
	306	space->write_word(spr+10, zoom_x);
	307	space->write_word(spr+12, col);
308	308	spr += 16;
309	309	scount++;
310	310	if(scount == 256)
r8962	r8963
317	317	}
318	318	}
319	319	while(scount < 256) {
320		memory_write_word(space, spr, scount);
	320	space->write_word(spr, scount);
321	321	scount++;
322	322	spr += 16;
323	323	}
324	324	}
325	325
326		static void tkmmpzdm_esc(const address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
	326	static void tkmmpzdm_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
327	327	{
328	328	konamigx_esc_alert(gx_workram, 0x0142, 0x100, 0);
329	329	}
330	330
331		static void dragoonj_esc(const address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
	331	static void dragoonj_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
332	332	{
333	333	konamigx_esc_alert(gx_workram, 0x5c00, 0x100, 0);
334	334	}
335	335
336		static void sal2_esc(const address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
	336	static void sal2_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
337	337	{
338	338	konamigx_esc_alert(gx_workram, 0x1c8c, 0x172, 1);
339	339	}
340	340
341		static void sexyparo_esc(const address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
	341	static void sexyparo_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
342	342	{
343	343	// The d20000 should probably be p3
344	344	generate_sprites(space, 0xc00604, 0xd20000, 0xfc);
345	345	}
346	346
347		static void tbyahhoo_esc(const address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
	347	static void tbyahhoo_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
348	348	{
349	349	generate_sprites(space, 0xc00000, 0xd20000, 0x100);
350	350	}
351	351
352		static void daiskiss_esc(const address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
	352	static void daiskiss_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
353	353	{
354	354	generate_sprites(space, 0xc00000, 0xd20000, 0x100);
355	355	}
356	356
357	357	static UINT8 esc_program[4096];
358		static void (*esc_cb)(const address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4);
	358	static void (*esc_cb)(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4);
359	359
360	360	static WRITE32_HANDLER( esc_w )
361	361	{
r8962	r8963
375	375	}
376	376
377	377	/* the master opcode can be at an unaligned address, so get it "safely" */
378		opcode = (memory_read_word(space, data+2))|(memory_read_word(space, data)<<16);
	378	opcode = (space->read_word(data+2))|(space->read_word(data)<<16);
379	379
380	380	/* if there's an OBJECT_MAGIC_ID, that means
381	381	there is a valid ESC command packet. */
r8962	r8963
383	383	{
384	384	int i;
385	385	/* get the subop now */
386		opcode = memory_read_byte(space, data+8);
387		params = (memory_read_word(space, data+12) << 16) | memory_read_word(space, data+14);
	386	opcode = space->read_byte(data+8);
	387	params = (space->read_word(data+12) << 16) | space->read_word(data+14);
388	388
389	389	switch(opcode) {
390	390	case 5: // Reset
391	391	break;
392	392	case 2: // Load program
393	393	for(i=0; i<4096; i++)
394		esc_program[i] = memory_read_byte(space, params+i);
	394	esc_program[i] = space->read_byte(params+i);
395	395	/*
396	396	{
397	397	FILE *f;
r8962	r8963
406	406	break;
407	407	case 1: // Run program
408	408	if(esc_cb) {
409		UINT32 p1 = (memory_read_word(space, params+0)<<16) | memory_read_word(space, params+2);
410		UINT32 p2 = (memory_read_word(space, params+4)<<16) | memory_read_word(space, params+6);
411		UINT32 p3 = (memory_read_word(space, params+8)<<16) | memory_read_word(space, params+10);
412		UINT32 p4 = (memory_read_word(space, params+12)<<16) | memory_read_word(space, params+14);
	409	UINT32 p1 = (space->read_word(params+0)<<16) | space->read_word(params+2);
	410	UINT32 p2 = (space->read_word(params+4)<<16) | space->read_word(params+6);
	411	UINT32 p3 = (space->read_word(params+8)<<16) | space->read_word(params+10);
	412	UINT32 p4 = (space->read_word(params+12)<<16) | space->read_word(params+14);
413	413	esc_cb(space, p1, p2, p3, p4);
414	414	}
415	415	break;
r8962	r8963
417	417	//          logerror("Unknown ESC opcode %d\n", opcode);
418	418	break;
419	419	}
420		memory_write_byte(space, data+9, ESTATE_END);
	420	space->write_byte(data+9, ESTATE_END);
421	421
422	422	if (konamigx_wrport1_1 & 0x10)
423	423	{
r8962	r8963
1063	1063	// memcpy from c01000 to c01400 for 0x400 bytes (startup check for type 4 games)
1064	1064	for (i = 0; i < 0x400; i += 2)
1065	1065	{
1066		memory_write_word(space, 0xc01400+i, memory_read_word(space, 0xc01000+i));
	1066	space->write_word(0xc01400+i, space->read_word(0xc01000+i));
1067	1067	}
1068	1068	}
1069	1069	else if(last_prot_op == 0x57a)   // winspike
1070	1070	{
1071	1071	/* player 1 input buffer protection */
1072		memory_write_dword(space, 0xc10f00, memory_read_dword(space, 0xc00f10));
1073		memory_write_dword(space, 0xc10f04, memory_read_dword(space, 0xc00f14));
	1072	space->write_dword(0xc10f00, space->read_dword(0xc00f10));
	1073	space->write_dword(0xc10f04, space->read_dword(0xc00f14));
1074	1074	/* player 2 input buffer protection */
1075		memory_write_dword(space, 0xc10f20, memory_read_dword(space, 0xc00f20));
1076		memory_write_dword(space, 0xc10f24, memory_read_dword(space, 0xc00f24));
	1075	space->write_dword(0xc10f20, space->read_dword(0xc00f20));
	1076	space->write_dword(0xc10f24, space->read_dword(0xc00f24));
1077	1077	/* ... */
1078		memory_write_dword(space, 0xc0fe00, memory_read_dword(space, 0xc00f30));
1079		memory_write_dword(space, 0xc0fe04, memory_read_dword(space, 0xc00f34));
	1078	space->write_dword(0xc0fe00, space->read_dword(0xc00f30));
	1079	space->write_dword(0xc0fe04, space->read_dword(0xc00f34));
1080	1080	}
1081	1081	else if(last_prot_op == 0xd97)   // rushhero
1082	1082	{
r8962	r8963
1088	1088	{
1089	1089	for (i = 0; i <= 0x10; i += 4)
1090	1090	{
1091		memory_write_dword(space, dst + i, memory_read_dword(space, src+i));
	1091	space->write_dword(dst + i, space->read_dword(src+i));
1092	1092	}
1093	1093
1094	1094	src -= 0x10;
r8962	r8963
1096	1096	}
1097	1097
1098	1098	/* Input buffer copiers, only this command is executed so it's safe to assume that's polled here */
1099		memory_write_byte(space, 0xc01cc0, ~memory_read_byte(space, 0xc00507));
1100		memory_write_byte(space, 0xc01cc1, ~memory_read_byte(space, 0xc00527));
1101		memory_write_byte(space, 0xc01cc4, ~memory_read_byte(space, 0xc00547));
1102		memory_write_byte(space, 0xc01cc5, ~memory_read_byte(space, 0xc00567));
	1099	space->write_byte(0xc01cc0, ~space->read_byte(0xc00507));
	1100	space->write_byte(0xc01cc1, ~space->read_byte(0xc00527));
	1101	space->write_byte(0xc01cc4, ~space->read_byte(0xc00547));
	1102	space->write_byte(0xc01cc5, ~space->read_byte(0xc00567));
1103	1103	}
1104	1104	else if(last_prot_op == 0xb16) // slamdnk2
1105	1105	{
r8962	r8963
1109	1109
1110	1110	for (spr = 0; spr < 0x100; spr++)
1111	1111	{
1112		memory_write_word(space, dst, memory_read_word(space, src));
	1112	space->write_word(dst, space->read_word(src));
1113	1113	src += 4;
1114	1114	dst += 2;
1115	1115	}
r8962	r8963
1121	1121	int adr;
1122	1122	//printf("GXT4: command %x %d (PC=%x)\n", last_prot_op, cc++, cpu_get_pc(space->cpu));
1123	1123	for (adr = 0; adr < 0x400; adr += 2)
1124		memory_write_word(space, 0xc01c00+adr, memory_read_word(space, 0xc01800+adr));
	1124	space->write_word(0xc01c00+adr, space->read_word(0xc01800+adr));
1125	1125	}
1126	1126	else if(last_prot_op == 0x115d) // vsnetscr screen 2
1127	1127	{
1128	1128	int adr;
1129	1129	//printf("GXT4: command %x %d (PC=%x)\n", last_prot_op, cc++, cpu_get_pc(space->cpu));
1130	1130	for (adr = 0; adr < 0x400; adr += 2)
1131		memory_write_word(space, 0xc18c00+adr, memory_read_word(space, 0xc18800+adr));
	1131	space->write_word(0xc18c00+adr, space->read_word(0xc18800+adr));
1132	1132	}
1133	1133	else
1134	1134	{

src/mame/drivers/thunderj.c

r8962	r8963
129	129	/* Use these lines to detect when things go south: */
130	130
131	131	#if 0
132		if (memory_read_word(space, 0x163482) > 0xfff)
	132	if (space->read_word(0x163482) > 0xfff)
133	133	mame_printf_debug("You're screwed!");
134	134	#endif
135	135

src/mame/drivers/quantum.c

r8962	r8963
115	115	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
116	116	AM_RANGE(0x000000, 0x013fff) AM_ROM
117	117	AM_RANGE(0x018000, 0x01cfff) AM_RAM
118		AM_RANGE(0x800000, 0x801fff) AM_RAM AM_BASE(&quantum_vectorram) AM_SIZE(&vectorram_size)
	118	AM_RANGE(0x800000, 0x801fff) AM_RAM AM_BASE((UINT16 **)&avgdvg_vectorram) AM_SIZE(&avgdvg_vectorram_size)
119	119	AM_RANGE(0x840000, 0x84001f) AM_DEVREADWRITE8("pokey1", pokey_r, pokey_w, 0x00ff)
120	120	AM_RANGE(0x840020, 0x84003f) AM_DEVREADWRITE8("pokey2", pokey_r, pokey_w, 0x00ff)
121	121	AM_RANGE(0x900000, 0x9001ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
122	122	AM_RANGE(0x940000, 0x940001) AM_READ(trackball_r) /* trackball */
123	123	AM_RANGE(0x948000, 0x948001) AM_READ_PORT("SYSTEM")
124		AM_RANGE(0x950000, 0x95001f) AM_WRITEONLY AM_BASE(&quantum_colorram)
	124	AM_RANGE(0x950000, 0x95001f) AM_WRITEONLY AM_BASE((UINT16**)&avgdvg_colorram)
125	125	AM_RANGE(0x958000, 0x958001) AM_WRITE(led_w)
126	126	AM_RANGE(0x960000, 0x960001) AM_WRITENOP
127	127	AM_RANGE(0x968000, 0x968001) AM_WRITE(avgdvg_reset_word_w)

src/mame/drivers/combatsc.c

r8962	r8963
167	167	static WRITE8_HANDLER( combatscb_priority_w )
168	168	{
169	169	combatsc_state *state = space->machine->driver_data<combatsc_state>();
	170
	171	if (data & 0x40)
	172	{
	173	state->video_circuit = 1;
	174	state->videoram = state->page[1];
	175	state->scrollram = state->scrollram1;
	176	}
	177	else
	178	{
	179	state->video_circuit = 0;
	180	state->videoram = state->page[0];
	181	state->scrollram = state->scrollram0;
	182	}
	183
170	184	state->priority = data & 0x20;
171	185	}
172	186
r8962	r8963
174	188	{
175	189	combatsc_state *state = space->machine->driver_data<combatsc_state>();
176	190
	191	state->priority = data & 0x20;
	192
177	193	if (data & 0x40)
178	194	{
179	195	state->video_circuit = 1;
r8962	r8963
187	203	state->scrollram = state->scrollram0;
188	204	}
189	205
190		state->priority = data & 0x20;
191
192	206	if (data & 0x10)
193	207	memory_set_bank(space->machine, "bank1", (data & 0x0e) >> 1);
194	208	else
r8962	r8963
697	711	static MACHINE_RESET( combatsc )
698	712	{
699	713	combatsc_state *state = machine->driver_data<combatsc_state>();
700		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	714	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
701	715	int i;
702	716
703	717	memset(state->io_ram,  0x00, 0x4000);

src/mame/drivers/quizpun2.c

r8962	r8963
137	137	prot.addr = 0;
138	138	}
139	139
140		static void log_protection( const address_space *space, const char *warning )
	140	static void log_protection( address_space *space, const char *warning )
141	141	{
142	142	logerror("%04x: protection - %s (state %x, wait %x, param %02x, cmd %02x, addr %02x)\n", cpu_get_pc(space->cpu), warning,
143	143	prot.state,

src/mame/drivers/homedata.c

r8962	r8963
1222	1222	static MACHINE_RESET( pteacher )
1223	1223	{
1224	1224	homedata_state *state = machine->driver_data<homedata_state>();
1225		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1225	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1226	1226
1227	1227	/* on reset, ports are set as input (high impedance), therefore 0xff output */
1228	1228	pteacher_upd7807_portc_w(space, 0, 0xff);
r8962	r8963
1239	1239	static MACHINE_RESET( reikaids )
1240	1240	{
1241	1241	homedata_state *state = machine->driver_data<homedata_state>();
1242		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1242	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1243	1243
1244	1244	/* on reset, ports are set as input (high impedance), therefore 0xff output */
1245	1245	reikaids_upd7807_portc_w(space, 0, 0xff);

src/mame/drivers/exidy.c

r8962	r8963
1458	1458
1459	1459	static DRIVER_INIT( fax )
1460	1460	{
1461		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1461	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1462	1462
1463	1463	exidy_video_config(0x04, 0x04, TRUE);
1464	1464

src/mame/drivers/pcktgal.c

r8962	r8963
414	414	static DRIVER_INIT( deco222 )
415	415	{
416	416	int A;
417		const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	417	address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
418	418	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
419	419	UINT8 *rom = memory_region(machine, "audiocpu");
420	420
421		memory_set_decrypted_region(space, 0x8000, 0xffff, decrypted);
	421	space->set_decrypted_region(0x8000, 0xffff, decrypted);
422	422
423	423	/* bits 5 and 6 of the opcodes are swapped */
424	424	for (A = 0x8000;A < 0x18000;A++)

src/mame/drivers/hng64.c

r8962	r8963
447	447	#include "cpu/mips/mips3.h"
448	448	#include "includes/hng64.h"
449	449
450		int hng64_mcu_type = 0;
451		static UINT32 fake_mcu_time;
452		static UINT16 hng_mcu_en;
453	450
454		static UINT32 *rombase;
455		static UINT32 *hng_mainram;
456		static UINT32 *hng_cart;
457		static UINT32 *hng64_dualport;
458		static UINT16 *hng64_soundram;
459		static UINT32 *hng64_sysregs;
460	451
461		// Stuff from over in video...
462		extern WRITE32_HANDLER( hng64_videoram_w );
463		extern UINT32 *hng64_spriteram, *hng64_videoregs, *hng64_spriteregs;
464		extern UINT32 *hng64_videoram;
465		extern UINT32 *hng64_tcram;
466		extern UINT32 *hng64_3dregs;
467	452
468		extern void hng64_command3d(running_machine* machine, const UINT16* packet);
469
470		extern UINT8 hng64_screen_dis;
471
472		VIDEO_START( hng64 );
473		VIDEO_UPDATE( hng64 );
474
475		static UINT32 activeBuffer;
476		static UINT32 no_machine_error_code;
477		static int hng64_interrupt_level_request;
478
479		/* 3D stuff */
480		static UINT32 *hng64_3d_1;
481		static UINT32 *hng64_3d_2;
482		static UINT32 *hng64_dl;
483		//static UINT32 *hng64_q2;
484
485		/* Communications stuff */
486		static UINT32 *hng64_com_ram;
487		static UINT8  *hng64_com_op_base;
488		static UINT8  *hng64_com_mmu_mem;
489		static UINT8  *hng64_com_virtual_mem;
490
491
492	453	#ifdef UNUSED_FUNCTION
493	454	WRITE32_HANDLER( trap_write )
494	455	{
r8962	r8963
503	464
504	465	static READ32_HANDLER( hng64_com_r )
505	466	{
506		logerror("com read  (PC=%08x): %08x %08x = %08x\n", cpu_get_pc(space->cpu), (offset*4)+0xc0000000, mem_mask, hng64_com_ram[offset]);
507		return hng64_com_ram[offset];
	467	hng64_state *state = space->machine->driver_data<hng64_state>();
	468
	469	logerror("com read  (PC=%08x): %08x %08x = %08x\n", cpu_get_pc(space->cpu), (offset*4)+0xc0000000, mem_mask, state->com_ram[offset]);
	470	return state->com_ram[offset];
508	471	}
509	472
510	473	static WRITE32_HANDLER( hng64_com_w )
511	474	{
	475	hng64_state *state = space->machine->driver_data<hng64_state>();
	476
512	477	logerror("com write (PC=%08x): %08x %08x = %08x\n", cpu_get_pc(space->cpu), (offset*4)+0xc0000000, mem_mask, data);
513		COMBINE_DATA(&hng64_com_ram[offset]);
	478	COMBINE_DATA(&state->com_ram[offset]);
514	479	}
515	480
516
517		static UINT32 hng64_com_shared_a;
518		static UINT32 hng64_com_shared_b;
519
520	481	static WRITE32_HANDLER( hng64_com_share_w )
521	482	{
	483	hng64_state *state = space->machine->driver_data<hng64_state>();
	484
522	485	logerror("commw  (PC=%08x): %08x %08x %08x\n", cpu_get_pc(space->cpu), data, (offset*4)+0xc0001000, mem_mask);
523	486
524		if (offset==0x0) COMBINE_DATA(&hng64_com_shared_a);
525		if (offset==0x1) COMBINE_DATA(&hng64_com_shared_b);
	487	if (offset == 0x0) COMBINE_DATA(&state->com_shared_a);
	488	if (offset == 0x1) COMBINE_DATA(&state->com_shared_b);
526	489	}
527	490
528	491	static READ32_HANDLER( hng64_com_share_r )
529	492	{
530	493	logerror("commr  (PC=%08x): %08x %08x\n", cpu_get_pc(space->cpu), (offset*4)+0xc0001000, mem_mask);
531	494
532		//  if(offset==0x0) return hng64_com_shared_a;
533		//  if(offset==0x1) return hng64_com_shared_b;
	495	//if(offset == 0x0) return state->com_shared_a;
	496	//if(offset == 0x1) return state->com_shared_b;
534	497
535	498	if(offset==0x0) return 0x0000aaaa;
536	499	if(offset==0x1)   return 0x00030000;      // fatfurwa : at bfc06624 it wants a 01 : at bfc06650 it wants a 02
r8962	r8963
540	503
541	504	static WRITE32_HANDLER( hng64_pal_w )
542	505	{
	506	UINT32 *paletteram = space->machine->generic.paletteram.u32;
543	507	int r, g, b/*, a*/;
544		COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]);
545	508
546		b = ((space->machine->generic.paletteram.u32[offset] & 0x000000ff) >>0);
547		g = ((space->machine->generic.paletteram.u32[offset] & 0x0000ff00) >>8);
548		r = ((space->machine->generic.paletteram.u32[offset] & 0x00ff0000) >>16);
549		//a = ((space->machine->generic.paletteram.u32[offset] & 0xff000000) >>24);
	509	COMBINE_DATA(&paletteram[offset]);
	510
	511	b = ((paletteram[offset] & 0x000000ff) >>0);
	512	g = ((paletteram[offset] & 0x0000ff00) >>8);
	513	r = ((paletteram[offset] & 0x00ff0000) >>16);
	514	//a = ((paletteram[offset] & 0xff000000) >>24);
550	515	palette_set_color(space->machine,offset,MAKE_RGB(r,g,b));
551	516	}
552	517
553	518	static READ32_HANDLER( hng64_sysregs_r )
554	519	{
	520	hng64_state *state = space->machine->driver_data<hng64_state>();
555	521	system_time systime;
	522
556	523	space->machine->base_datetime(systime);
557	524
558		//  if((offset*4) != 0x1084)
559		//      printf("HNG64 port read (PC=%08x) 0x%08x\n", cpu_get_pc(space->cpu),offset*4);
	525	#if 0
	526	if((offset*4) != 0x1084)
	527	printf("HNG64 port read (PC=%08x) 0x%08x\n", cpu_get_pc(space->cpu), offset*4);
	528	#endif
560	529
561	530	switch(offset*4)
562	531	{
r8962	r8963
565	534	//case 0x107c:
566	535	case 0x1084: return 0x00000002; //MCU->MIPS latch port
567	536	//case 0x108c:
568		case 0x1104: return hng64_interrupt_level_request;
	537	case 0x1104: return state->interrupt_level_request;
569	538	case 0x1254: return 0x00000000; //dma status, 0x800
570	539	/* 4-bit RTC */
571	540	case 0x2104: return (systime.local_time.second % 10);
r8962	r8963
590	559	//  printf("%08x\n",offset*4);
591	560
592	561	//  return mame_rand(space->machine)&0xffffffff;
593		return hng64_sysregs[offset];
	562	return state->sysregs[offset];
594	563	}
595	564
596	565	/* preliminary dma code, dma is used to copy program code -> ram */
597		static INT32 hng_dma_start,hng_dma_dst,hng_dma_len;
598
599		static void hng64_do_dma(const address_space *space)
	566	static void hng64_do_dma(address_space *space)
600	567	{
601		//  printf("Performing DMA Start %08x Len %08x Dst %08x\n",hng_dma_start, hng_dma_len, hng_dma_dst);
	568	hng64_state *state = space->machine->driver_data<hng64_state>();
602	569
603		while (hng_dma_len>=0)
	570	//printf("Performing DMA Start %08x Len %08x Dst %08x\n", state->dma_start, state->dma_len, state->dma_dst);
	571
	572	while (state->dma_len >= 0)
604	573	{
605	574	UINT32 dat;
606	575
607		dat = memory_read_dword(space,hng_dma_start);
608		memory_write_dword(space,hng_dma_dst,dat);
609		hng_dma_start+=4;
610		hng_dma_dst+=4;
611		hng_dma_len--;
	576	dat = space->read_dword(state->dma_start);
	577	space->write_dword(state->dma_dst, dat);
	578	state->dma_start += 4;
	579	state->dma_dst += 4;
	580	state->dma_len--;
612	581	}
613	582	}
614	583
r8962	r8963
626	595
627	596	static WRITE32_HANDLER( hng64_sysregs_w )
628	597	{
629		COMBINE_DATA (&hng64_sysregs[offset]);
	598	hng64_state *state = space->machine->driver_data<hng64_state>();
630	599
631		//  if(((offset*4) & 0x1200) == 0x1200)
632		//      printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, hng64_sysregs[offset], cpu_get_pc(space->cpu));
	600	COMBINE_DATA (&state->sysregs[offset]);
633	601
	602	#if 0
	603	if(((offset*4) & 0x1200) == 0x1200)
	604	printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, state->sysregs[offset], cpu_get_pc(space->cpu));
	605	#endif
	606
634	607	switch(offset*4)
635	608	{
636	609	//case 0x100c: *DOCUMENT*
637	610
638	611	case 0x1084: //MIPS->MCU latch port
639		hng_mcu_en = (data & 0xff); //command-based, i.e. doesn't control halt line and such?
640		//printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, hng64_sysregs[offset], cpu_get_pc(space->cpu));
	612	state->mcu_en = (data & 0xff); //command-based, i.e. doesn't control halt line and such?
	613	//printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, state->sysregs[offset], cpu_get_pc(space->cpu));
641	614	break;
642	615	case 0x111c: /*irq ack */ break;
643		case 0x1204: hng_dma_start = hng64_sysregs[offset]; break;
644		case 0x1214: hng_dma_dst = hng64_sysregs[offset]; break;
	616	case 0x1204: state->dma_start = state->sysregs[offset]; break;
	617	case 0x1214: state->dma_dst = state->sysregs[offset]; break;
645	618	case 0x1224:
646		hng_dma_len = hng64_sysregs[offset];
	619	state->dma_len = state->sysregs[offset];
647	620	hng64_do_dma(space);
648	621	break;
649	622	//default:
650		//printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, hng64_sysregs[offset], cpu_get_pc(space->cpu));
	623	//printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, state->sysregs[offset], cpu_get_pc(space->cpu));
651	624	}
652	625	}
653	626
r8962	r8963
658	631	/* Fatal Fury Wild Ambition / Buriki One */
659	632	static READ32_HANDLER( fight_io_r )
660	633	{
	634	hng64_state *state = space->machine->driver_data<hng64_state>();
	635
661	636	switch (offset*4)
662	637	{
663	638	case 0x000: return 0x00000400;
664	639	case 0x004: return input_port_read(space->machine, "SYSTEM");
665	640	case 0x008: return input_port_read(space->machine, "P1_P2");
666		case 0x600: return no_machine_error_code;
	641	case 0x600: return state->no_machine_error_code;
667	642	}
668	643
669		return hng64_dualport[offset];
	644	return state->dualport[offset];
670	645	}
671	646
672	647	/* Samurai Shodown 64 / Samurai Shodown 64 2 */
673	648	static READ32_HANDLER( samsho_io_r )
674	649	{
	650	hng64_state *state = space->machine->driver_data<hng64_state>();
	651
675	652	switch (offset*4)
676	653	{
677	654	case 0x000:
678	655	{
679	656	/* this is used on post by the io mcu to signal that a init task is complete, zeroed otherwise. */
680		//popmessage("%04x",fake_mcu_time);
	657	//popmessage("%04x", state->mcu_fake_time);
681	658
682		if(fake_mcu_time < 0x100)
683		fake_mcu_time++;
	659	if(state->mcu_fake_time < 0x100)
	660	state->mcu_fake_time++;
684	661
685		if(fake_mcu_time < 0x80) //i/o init 1
	662	if(state->mcu_fake_time < 0x80) //i/o init 1
686	663	return 0x300;
687		else if(fake_mcu_time < 0x100)//i/o init 2
	664	else if(state->mcu_fake_time < 0x100)//i/o init 2
688	665	return 0x400;
689	666	else
690	667	return 0x000;
691	668	}
692	669	case 0x004: return input_port_read(space->machine, "SYSTEM");
693	670	case 0x008: return input_port_read(space->machine, "P1_P2");
694		case 0x600: return no_machine_error_code;
	671	case 0x600: return state->no_machine_error_code;
695	672	}
696	673
697		return hng64_dualport[offset];
	674	return state->dualport[offset];
698	675	}
699	676
700	677	/* Beast Busters 2 */
701	678	/* FIXME: trigger input doesn't work? */
702	679	static READ32_HANDLER( shoot_io_r )
703	680	{
	681	hng64_state *state = space->machine->driver_data<hng64_state>();
	682
704	683	switch (offset*4)
705	684	{
706	685	case 0x000:
707	686	{
708		if(fake_mcu_time < 0x100)//i/o init
	687	if(state->mcu_fake_time < 0x100)//i/o init
709	688	{
710		fake_mcu_time++;
	689	state->mcu_fake_time++;
711	690	return 0x400;
712	691	}
713	692	else
r8962	r8963
715	694	}
716	695	case 0x010:
717	696	{
718		static UINT32 p1_trig;
719
720	697	/* Quick kludge for use the input test items */
721	698	if(input_port_read(space->machine, "D_IN") & 0x01000000)
722		p1_trig = mame_rand(space->machine) & 0x01000000;
	699	state->p1_trig = mame_rand(space->machine) & 0x01000000;
723	700
724		return (input_port_read(space->machine, "D_IN") & ~0x01000000) | (p1_trig);
	701	return (input_port_read(space->machine, "D_IN") & ~0x01000000) | (state->p1_trig);
725	702	}
726	703	case 0x018:
727	704	{
r8962	r8963
741	718
742	719	return p3_x<<24 | p3_y<<16 | p3_x<<8 | p3_y; //FIXME: see what's the right bank here when the trigger works
743	720	}
744		case 0x600: return no_machine_error_code;
	721	case 0x600: return state->no_machine_error_code;
745	722	}
746	723
747		return hng64_dualport[offset];
	724	return state->dualport[offset];
748	725	}
749	726
750	727	/* Roads Edge / Xtreme Rally */
751	728	static READ32_HANDLER( racing_io_r )
752	729	{
	730	hng64_state *state = space->machine->driver_data<hng64_state>();
	731
753	732	switch (offset*4)
754	733	{
755	734	case 0x000:
756	735	{
757		if(fake_mcu_time < 0x100)//i/o init
	736	if(state->mcu_fake_time < 0x100)//i/o init
758	737	{
759		fake_mcu_time++;
	738	state->mcu_fake_time++;
760	739	return 0x400;
761	740	}
762	741	else
r8962	r8963
764	743	}
765	744	case 0x004: return input_port_read(space->machine, "SYSTEM");
766	745	case 0x008: return input_port_read(space->machine, "P1_P2");
767		case 0x600: return no_machine_error_code;
	746	case 0x600: return state->no_machine_error_code;
768	747	}
769	748
770		return hng64_dualport[offset];
	749	return state->dualport[offset];
771	750	}
772	751
773	752	static READ32_HANDLER( hng64_dualport_r )
774	753	{
775		//  printf("dualport R %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], cpu_get_pc(space->cpu));
	754	hng64_state *state = space->machine->driver_data<hng64_state>();
776	755
	756	//printf("dualport R %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], cpu_get_pc(space->cpu));
	757
777	758	/*
778	759	command table:
779	760	0x0b = ? mode input polling (sams64, bbust2, sams64_2 & roadedge) (*)
r8962	r8963
783	764
784	765	(*) 0x11 is followed by 0x0b if the latter is used, JVS-esque indirect/direct mode?
785	766	*/
	767	if (state->mcu_en == 0x0c)
	768	return state->dualport[offset];
786	769
787		if(hng_mcu_en == 0x0c)
788		return hng64_dualport[offset];
789
790		switch(hng64_mcu_type)
	770	switch (state->mcu_type)
791	771	{
792	772	case FIGHT_MCU:  return fight_io_r(space, offset,0xffffffff);
793	773	case SHOOT_MCU:  return shoot_io_r(space, offset,0xffffffff);
r8962	r8963
795	775	case SAMSHO_MCU: return samsho_io_r(space, offset,0xffffffff);
796	776	}
797	777
798		return hng64_dualport[offset];
	778	return state->dualport[offset];
799	779	}
800	780
801	781	/*
r8962	r8963
810	790
811	791	static WRITE32_HANDLER( hng64_dualport_w )
812	792	{
813		//  printf("dualport WRITE %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], cpu_get_pc(space->cpu));
814		COMBINE_DATA (&hng64_dualport[offset]);
	793	hng64_state *state = space->machine->driver_data<hng64_state>();
	794
	795	//printf("dualport WRITE %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], cpu_get_pc(space->cpu));
	796	COMBINE_DATA (&state->dualport[offset]);
815	797	}
816	798
817	799
r8962	r8963
823	805	//   <ElSemi> 30140000-3015ffff is ZBuffer A
824	806	static READ32_HANDLER( hng64_3d_1_r )
825	807	{
826		return hng64_3d_1[offset];
	808	hng64_state *state = space->machine->driver_data<hng64_state>();
	809
	810	return state->_3d_1[offset];
827	811	}
828	812
829	813	#ifdef UNUSED_FUNCTION
r8962	r8963
835	819
836	820	static READ32_HANDLER( hng64_3d_2_r )
837	821	{
838		return hng64_3d_2[offset];
	822	hng64_state *state = space->machine->driver_data<hng64_state>();
	823
	824	return state->_3d_2[offset];
839	825	}
840	826
841	827	static WRITE32_HANDLER( hng64_3d_2_w )
842	828	{
843		COMBINE_DATA (&hng64_3d_1[offset]);
844		COMBINE_DATA (&hng64_3d_2[offset]);
	829	hng64_state *state = space->machine->driver_data<hng64_state>();
	830
	831	COMBINE_DATA (&state->_3d_1[offset]);
	832	COMBINE_DATA (&state->_3d_2[offset]);
845	833	}
846	834
847	835	// The 3d 'display list'
848	836	static WRITE32_HANDLER( dl_w )
849	837	{
	838	hng64_state *state = space->machine->driver_data<hng64_state>();
	839	UINT32 *hng64_dl = state->dl;
850	840	int i;
851	841	UINT16 packet3d[16];
852	842
r8962	r8963
913	903	// Transition Control memory.
914	904	static WRITE32_HANDLER( tcram_w )
915	905	{
	906	hng64_state *state = space->machine->driver_data<hng64_state>();
	907	UINT32 *hng64_tcram = state->tcram;
	908
916	909	COMBINE_DATA (&hng64_tcram[offset]);
917	910
918	911	if(offset == 0x02)
919	912	{
920		static UINT16 min_x,min_y,max_x,max_y;
	913	UINT16 min_x, min_y, max_x, max_y;
921	914	rectangle visarea = space->machine->primary_screen->visible_area();
922	915
923	916	min_x = (hng64_tcram[1] & 0xffff0000) >> 16;
r8962	r8963
927	920
928	921	if(max_x == 0 || max_y == 0) // bail out if values are invalid, Fatal Fury WA sets this to disable the screen.
929	922	{
930		hng64_screen_dis = 1;
	923	state->screen_dis = 1;
931	924	return;
932	925	}
933	926
934		hng64_screen_dis = 0;
	927	state->screen_dis = 0;
935	928
936	929	visarea.min_x = min_x;
937	930	visarea.max_x = min_x + max_x - 1;
r8962	r8963
943	936
944	937	static READ32_HANDLER( tcram_r )
945	938	{
946		//  printf("Q1 R : %.8x %.8x\n", offset, hng64_tcram[offset]);
	939	hng64_state *state = space->machine->driver_data<hng64_state>();
	940
	941	//printf("Q1 R : %.8x %.8x\n", offset, hng64_tcram[offset]);
947	942	if(offset == 0x12)
948	943	return input_port_read(space->machine, "VBLANK");
949	944
950		return hng64_tcram[offset];
	945	return state->tcram[offset];
951	946	}
952	947
953	948	/* Some games (namely sams64 after the title screen) tests bit 15 of this to be high,
954	949	unknown purpose (vblank? related to the display list?). */
955	950	static READ32_HANDLER( unk_vreg_r )
956	951	{
957		static UINT32 toggle;
958		return ++toggle;
	952	hng64_state *state = space->machine->driver_data<hng64_state>();
	953
	954	return ++state->unk_vreg_toggle;
959	955	}
960	956
961	957
962	958	static WRITE32_HANDLER( hng64_soundram_w )
963	959	{
	960	hng64_state *state = space->machine->driver_data<hng64_state>();
964	961	UINT32 mem_mask32 = mem_mask;
965	962	UINT32 data32 = data;
966	963
r8962	r8963
969	966	data = FLIPENDIAN_INT16(data);
970	967	mem_mask = mem_mask32 >> 16;
971	968	mem_mask = FLIPENDIAN_INT16(mem_mask);
972		COMBINE_DATA(&hng64_soundram[offset * 2 + 0]);
	969	COMBINE_DATA(&state->soundram[offset * 2 + 0]);
973	970
974	971	data = data32 & 0xffff;
975	972	data = FLIPENDIAN_INT16(data);
976	973	mem_mask = mem_mask32 & 0xffff;
977	974	mem_mask = FLIPENDIAN_INT16(mem_mask);
978		COMBINE_DATA(&hng64_soundram[offset * 2 + 1]);
	975	COMBINE_DATA(&state->soundram[offset * 2 + 1]);
979	976	}
980	977
981	978	static READ32_HANDLER( hng64_soundram_r )
982	979	{
983		UINT16 datalo = hng64_soundram[offset * 2 + 0];
984		UINT16 datahi = hng64_soundram[offset * 2 + 1];
	980	hng64_state *state = space->machine->driver_data<hng64_state>();
	981	UINT16 datalo = state->soundram[offset * 2 + 0];
	982	UINT16 datahi = state->soundram[offset * 2 + 1];
985	983
986	984	return FLIPENDIAN_INT16(datahi) | (FLIPENDIAN_INT16(datalo) << 16);
987	985	}
r8962	r8963
989	987	/* The following is guesswork, needs confirmation with a test on the real board. */
990	988	static WRITE32_HANDLER( hng64_sprite_clear_even_w )
991	989	{
992		static UINT32 spr_offs;
	990	UINT32 spr_offs;
993	991
994	992	spr_offs = (offset) * 0x10 * 4;
995	993
996	994	if(ACCESSING_BITS_16_31)
997	995	{
998		memory_write_dword(space, 0x20000000+0x00+0x00+spr_offs, 0x00000000);
999		memory_write_dword(space, 0x20000000+0x08+0x00+spr_offs, 0x00000000);
1000		memory_write_dword(space, 0x20000000+0x10+0x00+spr_offs, 0x00000000);
1001		memory_write_dword(space, 0x20000000+0x18+0x00+spr_offs, 0x00000000);
	996	space->write_dword(0x20000000+0x00+0x00+spr_offs, 0x00000000);
	997	space->write_dword(0x20000000+0x08+0x00+spr_offs, 0x00000000);
	998	space->write_dword(0x20000000+0x10+0x00+spr_offs, 0x00000000);
	999	space->write_dword(0x20000000+0x18+0x00+spr_offs, 0x00000000);
1002	1000	}
1003	1001	if(ACCESSING_BITS_8_15)
1004	1002	{
1005		memory_write_dword(space, 0x20000000+0x00+0x20+spr_offs, 0x00000000);
1006		memory_write_dword(space, 0x20000000+0x08+0x20+spr_offs, 0x00000000);
1007		memory_write_dword(space, 0x20000000+0x10+0x20+spr_offs, 0x00000000);
1008		memory_write_dword(space, 0x20000000+0x18+0x20+spr_offs, 0x00000000);
	1003	space->write_dword(0x20000000+0x00+0x20+spr_offs, 0x00000000);
	1004	space->write_dword(0x20000000+0x08+0x20+spr_offs, 0x00000000);
	1005	space->write_dword(0x20000000+0x10+0x20+spr_offs, 0x00000000);
	1006	space->write_dword(0x20000000+0x18+0x20+spr_offs, 0x00000000);
1009	1007	}
1010	1008	}
1011	1009
1012	1010	static WRITE32_HANDLER( hng64_sprite_clear_odd_w )
1013	1011	{
1014		static UINT32 spr_offs;
	1012	UINT32 spr_offs;
1015	1013
1016	1014	spr_offs = (offset) * 0x10 * 4;
1017	1015
1018	1016	if(ACCESSING_BITS_16_31)
1019	1017	{
1020		memory_write_dword(space, 0x20000000+0x04+0x00+spr_offs, 0x00000000);
1021		memory_write_dword(space, 0x20000000+0x0c+0x00+spr_offs, 0x00000000);
1022		memory_write_dword(space, 0x20000000+0x14+0x00+spr_offs, 0x00000000);
1023		memory_write_dword(space, 0x20000000+0x1c+0x00+spr_offs, 0x00000000);
	1018	space->write_dword(0x20000000+0x04+0x00+spr_offs, 0x00000000);
	1019	space->write_dword(0x20000000+0x0c+0x00+spr_offs, 0x00000000);
	1020	space->write_dword(0x20000000+0x14+0x00+spr_offs, 0x00000000);
	1021	space->write_dword(0x20000000+0x1c+0x00+spr_offs, 0x00000000);
1024	1022	}
1025	1023	if(ACCESSING_BITS_0_15)
1026	1024	{
1027		memory_write_dword(space, 0x20000000+0x04+0x20+spr_offs, 0x00000000);
1028		memory_write_dword(space, 0x20000000+0x0c+0x20+spr_offs, 0x00000000);
1029		memory_write_dword(space, 0x20000000+0x14+0x20+spr_offs, 0x00000000);
1030		memory_write_dword(space, 0x20000000+0x1c+0x20+spr_offs, 0x00000000);
	1025	space->write_dword(0x20000000+0x04+0x20+spr_offs, 0x00000000);
	1026	space->write_dword(0x20000000+0x0c+0x20+spr_offs, 0x00000000);
	1027	space->write_dword(0x20000000+0x14+0x20+spr_offs, 0x00000000);
	1028	space->write_dword(0x20000000+0x1c+0x20+spr_offs, 0x00000000);
1031	1029	}
1032	1030	}
1033	1031
r8962	r8963
1044	1042	*/
1045	1043	static ADDRESS_MAP_START( hng_map, ADDRESS_SPACE_PROGRAM, 32 )
1046	1044
1047		AM_RANGE(0x00000000, 0x00ffffff) AM_RAM AM_BASE(&hng_mainram)
1048		AM_RANGE(0x04000000, 0x05ffffff) AM_WRITENOP AM_ROM AM_REGION("user3",0) AM_BASE(&hng_cart)
	1045	AM_RANGE(0x00000000, 0x00ffffff) AM_RAM AM_BASE_MEMBER(hng64_state, mainram)
	1046	AM_RANGE(0x04000000, 0x05ffffff) AM_WRITENOP AM_ROM AM_REGION("user3", 0) AM_BASE_MEMBER(hng64_state, cart)
1049	1047
1050	1048	// Ports
1051		AM_RANGE(0x1f700000, 0x1f702fff) AM_READWRITE(hng64_sysregs_r,hng64_sysregs_w) AM_BASE(&hng64_sysregs)
	1049	AM_RANGE(0x1f700000, 0x1f702fff) AM_READWRITE(hng64_sysregs_r, hng64_sysregs_w) AM_BASE_MEMBER(hng64_state, sysregs)
1052	1050
1053	1051	// SRAM.  Coin data, Player Statistics, etc.
1054	1052	AM_RANGE(0x1F800000, 0x1F803fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
1055	1053
1056	1054	// Dualport RAM
1057		AM_RANGE(0x1F808000, 0x1F8087ff) AM_READWRITE(hng64_dualport_r, hng64_dualport_w) AM_BASE(&hng64_dualport)
	1055	AM_RANGE(0x1F808000, 0x1F8087ff) AM_READWRITE(hng64_dualport_r, hng64_dualport_w) AM_BASE_MEMBER(hng64_state, dualport)
1058	1056
1059	1057	// BIOS
1060		AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_WRITENOP AM_ROM AM_REGION("user1", 0) AM_BASE(&rombase)
	1058	AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_WRITENOP AM_ROM AM_REGION("user1", 0) AM_BASE_MEMBER(hng64_state, rombase)
1061	1059
1062	1060	// Video
1063		AM_RANGE(0x20000000, 0x2000bfff) AM_RAM AM_BASE(&hng64_spriteram)
	1061	AM_RANGE(0x20000000, 0x2000bfff) AM_RAM AM_BASE_MEMBER(hng64_state, spriteram)
1064	1062	AM_RANGE(0x2000d800, 0x2000e3ff) AM_WRITE(hng64_sprite_clear_even_w)
1065	1063	AM_RANGE(0x2000e400, 0x2000efff) AM_WRITE(hng64_sprite_clear_odd_w)
1066		AM_RANGE(0x20010000, 0x20010013) AM_RAM AM_BASE(&hng64_spriteregs)
1067		AM_RANGE(0x20100000, 0x2017ffff) AM_RAM_WRITE(hng64_videoram_w) AM_BASE(&hng64_videoram)   // Tilemap
1068		AM_RANGE(0x20190000, 0x20190037) AM_RAM AM_BASE(&hng64_videoregs)
	1064	AM_RANGE(0x20010000, 0x20010013) AM_RAM AM_BASE_MEMBER(hng64_state, spriteregs)
	1065	AM_RANGE(0x20100000, 0x2017ffff) AM_RAM_WRITE(hng64_videoram_w) AM_BASE_MEMBER(hng64_state, videoram)   // Tilemap
	1066	AM_RANGE(0x20190000, 0x20190037) AM_RAM AM_BASE_MEMBER(hng64_state, videoregs)
1069	1067	AM_RANGE(0x20200000, 0x20203fff) AM_RAM_WRITE(hng64_pal_w) AM_BASE_GENERIC(paletteram)
1070		AM_RANGE(0x20208000, 0x2020805f) AM_READWRITE(tcram_r, tcram_w) AM_BASE(&hng64_tcram)   // Transition Control
1071		AM_RANGE(0x20300000, 0x203001ff) AM_RAM_WRITE(dl_w) AM_BASE(&hng64_dl)   // 3d Display List
1072		//  AM_RANGE(0x20300200, 0x20300213) AM_RAM_WRITE(xxxx) AM_BASE(&xxxxxxxx)  // 3d Display List Upload?
	1068	AM_RANGE(0x20208000, 0x2020805f) AM_READWRITE(tcram_r, tcram_w) AM_BASE_MEMBER(hng64_state, tcram)   // Transition Control
	1069	AM_RANGE(0x20300000, 0x203001ff) AM_RAM_WRITE(dl_w) AM_BASE_MEMBER(hng64_state, dl)   // 3d Display List
	1070	//  AM_RANGE(0x20300200, 0x20300213) AM_RAM_WRITE(xxxx) AM_BASE_MEMBER(hng64_state, xxxxxxxx)  // 3d Display List Upload?
1073	1071	AM_RANGE(0x20300214, 0x20300217) AM_WRITE(dl_control_w)
1074	1072	AM_RANGE(0x20300218, 0x2030021b) AM_READ(unk_vreg_r)
1075	1073
1076	1074	// 3d?
1077		AM_RANGE(0x30000000, 0x3000002f) AM_RAM AM_BASE(&hng64_3dregs)
1078		AM_RANGE(0x30100000, 0x3015ffff) AM_READWRITE(hng64_3d_1_r,hng64_3d_2_w) AM_BASE(&hng64_3d_1)   // 3D Display Buffer A
1079		AM_RANGE(0x30200000, 0x3025ffff) AM_READWRITE(hng64_3d_2_r,hng64_3d_2_w) AM_BASE(&hng64_3d_2)   // 3D Display Buffer B
	1075	AM_RANGE(0x30000000, 0x3000002f) AM_RAM AM_BASE_MEMBER(hng64_state, _3dregs)
	1076	AM_RANGE(0x30100000, 0x3015ffff) AM_READWRITE(hng64_3d_1_r, hng64_3d_2_w) AM_BASE_MEMBER(hng64_state, _3d_1)   // 3D Display Buffer A
	1077	AM_RANGE(0x30200000, 0x3025ffff) AM_READWRITE(hng64_3d_2_r, hng64_3d_2_w) AM_BASE_MEMBER(hng64_state, _3d_2)   // 3D Display Buffer B
1080	1078
1081	1079	// Sound
1082	1080	AM_RANGE(0x60000000, 0x601fffff) AM_RAM                                    // Sound ??
r8962	r8963
1089	1087	//  AM_RANGE(0x6f000000, 0x6f000003) AM_WRITENOP    // halt / reset line for the sound CPU
1090	1088
1091	1089	// Communications
1092		AM_RANGE(0xc0000000, 0xc0000fff) AM_READWRITE(hng64_com_r, hng64_com_w) AM_BASE(&hng64_com_ram)
	1090	AM_RANGE(0xc0000000, 0xc0000fff) AM_READWRITE(hng64_com_r, hng64_com_w) AM_BASE_MEMBER(hng64_state, com_ram)
1093	1091	AM_RANGE(0xc0001000, 0xc0001007) AM_READWRITE(hng64_com_share_r, hng64_com_share_w)
1094	1092
1095	1093	/* 6e000000-6fffffff */
r8962	r8963
1103	1101	/**************/
1104	1102	/** COMM CPU **/
1105	1103	/**************/
1106		#define KL5C_MMU_A(xxx) ( (xxx==0) ? 0x0000 : (hng64_com_mmu_mem[((xxx-1)*2)+1] << 2) | ((hng64_com_mmu_mem[(xxx-1)*2] & 0xc0) >> 6) )
1107		#define KL5C_MMU_B(xxx) ( (xxx==0) ? 0x0000 : (hng64_com_mmu_mem[(xxx-1)*2] & 0x3f) )
	1104	#define KL5C_MMU_A(xxx) ( (xxx == 0) ? 0x0000 : (state->com_mmu_mem[((xxx-1)*2)+1] << 2) | ((state->com_mmu_mem[(xxx-1)*2] & 0xc0) >> 6) )
	1105	#define KL5C_MMU_B(xxx) ( (xxx == 0) ? 0x0000 : (state->com_mmu_mem[(xxx-1)*2] & 0x3f) )
1108	1106
1109		static DIRECT_UPDATE_HANDLER( KL5C80_direct_handler )
	1107	DIRECT_UPDATE_HANDLER( KL5C80_direct_handler )
1110	1108	{
1111		direct->raw = direct->decrypted = hng64_com_op_base;
	1109	hng64_state *state = machine->driver_data<hng64_state>();
	1110
	1111	direct.explicit_configure(0x0000, 0xffff, 0xffff, state->com_op_base);
1112	1112	return ~0;
1113	1113	}
1114	1114
1115		static UINT32 KL5C80_translate_address(UINT16 vAddr)
	1115	static UINT32 KL5C80_translate_address(hng64_state *state, UINT16 vAddr)
1116	1116	{
1117	1117	int i;
1118	1118	UINT8 bNum = 4;
r8962	r8963
1138	1138	}
1139	1139	}
1140	1140
1141		static void KL5C80_virtual_mem_sync(void)
	1141	static void KL5C80_virtual_mem_sync(hng64_state *state)
1142	1142	{
1143	1143	/* The KL5C80 maps each progressive chunk from the beginning of the
1144	1144	virtual region until the beginning of the next virtual region.
r8962	r8963
1162	1162	for (i = logical_offset; i <= 0xffff; i++)
1163	1163	{
1164	1164	if (physical_offset+i <= 0xfffff)
1165		hng64_com_op_base[i] = hng64_com_virtual_mem[physical_offset+i];
	1165	state->com_op_base[i] = state->com_virtual_mem[physical_offset+i];
1166	1166	}
1167	1167	}
1168	1168	}
1169	1169
1170		static void KL5C80_init(void)
	1170	static void KL5C80_init(hng64_state *state)
1171	1171	{
	1172	UINT8 *hng64_com_mmu_mem = state->com_mmu_mem;
	1173
1172	1174	/* init the MMU */
1173	1175	hng64_com_mmu_mem[0] =
1174	1176	hng64_com_mmu_mem[2] =
r8962	r8963
1183	1185
1184	1186	static READ8_HANDLER( hng64_comm_memory_r )
1185	1187	{
1186		UINT32 physical_address = KL5C80_translate_address(offset);
1187		logerror("READING 0x%02x from 0x%04x (0x%05x)\n", hng64_com_virtual_mem[physical_address], offset, physical_address);
	1188	hng64_state *state = space->machine->driver_data<hng64_state>();
	1189	UINT32 physical_address = KL5C80_translate_address(state, offset);
	1190	logerror("READING 0x%02x from 0x%04x (0x%05x)\n", state->com_virtual_mem[physical_address], offset, physical_address);
1188	1191
1189	1192	/* Custom "virtual" memory map */
1190	1193	if (physical_address >= 0x26000 && physical_address <= 0x28000)
r8962	r8963
1193	1196	}
1194	1197
1195	1198
1196		return hng64_com_virtual_mem[physical_address];
	1199	return state->com_virtual_mem[physical_address];
1197	1200	}
1198	1201
1199	1202	static WRITE8_HANDLER( hng64_comm_memory_w )
r8962	r8963
1206	1209	/* KL5C80 I/O handlers */
1207	1210	static WRITE8_HANDLER( hng64_comm_io_mmu )
1208	1211	{
1209		hng64_com_mmu_mem[offset] = data;
	1212	hng64_state *state = space->machine->driver_data<hng64_state>();
1210	1213
	1214	state->com_mmu_mem[offset] = data;
	1215
1211	1216	/* Debugging - you can't change A4 - the hardware doesn't let you */
1212		if (hng64_com_mmu_mem[7] != 0xf0 || ((hng64_com_mmu_mem[6] & 0xc0) != 0x00))
	1217	if (state->com_mmu_mem[7] != 0xf0 || ((state->com_mmu_mem[6] & 0xc0) != 0x00))
1213	1218	logerror("KL5C MMU error !!! Code is trying to change A4!\n");
1214	1219
1215	1220	logerror("COMM CPU MMU WRITE : ");
1216	1221	logerror("B : %02x %02x %02x %02x  A : %03x %03x %03x %03x\n", KL5C_MMU_B(1), KL5C_MMU_B(2), KL5C_MMU_B(3), KL5C_MMU_B(4),
1217	1222	KL5C_MMU_A(1), KL5C_MMU_A(2), KL5C_MMU_A(3), KL5C_MMU_A(4));
1218		KL5C80_virtual_mem_sync();
	1223	KL5C80_virtual_mem_sync(state);
1219	1224	}
1220	1225
1221	1226	#ifdef UNUSED_FUNCTION
r8962	r8963
1254	1259	static ADDRESS_MAP_START( hng_comm_io_map, ADDRESS_SPACE_IO, 8 )
1255	1260	ADDRESS_MAP_GLOBAL_MASK(0xff)
1256	1261	/* Reserved for the KL5C80 internal hardware */
1257		AM_RANGE(0x00,0x07) AM_WRITE( hng64_comm_io_mmu ) AM_BASE(&hng64_com_mmu_mem)
	1262	AM_RANGE(0x00, 0x07) AM_WRITE( hng64_comm_io_mmu ) AM_BASE_MEMBER(hng64_state, com_mmu_mem)
1258	1263	//  AM_RANGE(0x08,0x1f) AM_NOP              /* Reserved */
1259	1264	//  AM_RANGE(0x20,0x25) AM_READWRITE        /* Timer/Counter B */           /* hng64 writes here */
1260	1265	//  AM_RANGE(0x27,0x27) AM_NOP              /* Reserved */
r8962	r8963
1555	1560
1556	1561	static DRIVER_INIT( hng64 )
1557	1562	{
	1563	hng64_state *state = machine->driver_data<hng64_state>();
	1564
1558	1565	// region hacking, english error messages are more useful to us, but no english bios is dumped...
1559	1566	#ifdef HACK_REGION
1560	1567	// versions according to fatal fury test mode
r8962	r8963
1566	1573	#endif
1567	1574
1568	1575	/* 1 meg of virtual address space for the com cpu */
1569		hng64_com_virtual_mem = auto_alloc_array(machine, UINT8, 0x100000);
1570		hng64_com_op_base     = auto_alloc_array(machine, UINT8, 0x10000);
	1576	state->com_virtual_mem = auto_alloc_array(machine, UINT8, 0x100000);
	1577	state->com_op_base     = auto_alloc_array(machine, UINT8, 0x10000);
1571	1578
1572		hng64_soundram=auto_alloc_array(machine, UINT16, 0x200000/2);
	1579	state->soundram = auto_alloc_array(machine, UINT16, 0x200000/2);
1573	1580	DRIVER_INIT_CALL(hng64_reorder_gfx);
1574	1581	}
1575	1582
1576	1583	static DRIVER_INIT(hng64_fght)
1577	1584	{
1578		no_machine_error_code=0x01000000;
	1585	hng64_state *state = machine->driver_data<hng64_state>();
	1586
	1587	state->no_machine_error_code = 0x01000000;
1579	1588	DRIVER_INIT_CALL(hng64);
1580	1589	}
1581	1590
1582	1591	static DRIVER_INIT( fatfurwa )
1583	1592	{
	1593	hng64_state *state = machine->driver_data<hng64_state>();
	1594
1584	1595	/* FILE* fp = fopen("/tmp/test.bin", "wb"); fwrite(memory_region(machine, "verts"), 1, 0x0c00000*2, fp); fclose(fp); */
1585	1596	DRIVER_INIT_CALL(hng64_fght);
1586		hng64_mcu_type = FIGHT_MCU;
	1597	state->mcu_type = FIGHT_MCU;
1587	1598	}
1588	1599
1589	1600	static DRIVER_INIT( ss64 )
1590	1601	{
	1602	hng64_state *state = machine->driver_data<hng64_state>();
	1603
1591	1604	DRIVER_INIT_CALL(hng64_fght);
1592		hng64_mcu_type = SAMSHO_MCU;
	1605	state->mcu_type = SAMSHO_MCU;
1593	1606	}
1594	1607
1595	1608	static DRIVER_INIT(hng64_race)
1596	1609	{
1597		no_machine_error_code=0x02000000;
1598		hng64_mcu_type = RACING_MCU;
	1610	hng64_state *state = machine->driver_data<hng64_state>();
	1611
	1612	state->no_machine_error_code = 0x02000000;
	1613	state->mcu_type = RACING_MCU;
1599	1614	DRIVER_INIT_CALL(hng64);
1600	1615	}
1601	1616
1602	1617	static DRIVER_INIT(hng64_shoot)
1603	1618	{
1604		hng64_mcu_type = SHOOT_MCU;
1605		no_machine_error_code=0x03000000;
	1619	hng64_state *state = machine->driver_data<hng64_state>();
	1620
	1621	state->mcu_type = SHOOT_MCU;
	1622	state->no_machine_error_code = 0x03000000;
1606	1623	DRIVER_INIT_CALL(hng64);
1607	1624	}
1608	1625
1609	1626
1610	1627	/* ?? */
1611		static const mips3_config config =
	1628	static const mips3_config vr4300_config =
1612	1629	{
1613	1630	16384,            /* code cache size */
1614	1631	16384            /* data cache size */
r8962	r8963
1621	1638
1622	1639	static INTERRUPT_GEN( irq_start )
1623	1640	{
	1641	hng64_state *state = device->machine->driver_data<hng64_state>();
	1642
1624	1643	logerror("HNG64 interrupt level %x\n", cpu_getiloops(device));
1625	1644
1626	1645	/* there are more, the sources are unknown at the moment */
1627	1646	switch (cpu_getiloops(device))
1628	1647	{
1629		case 0x00: hng64_interrupt_level_request = 0;
	1648	case 0x00: state->interrupt_level_request = 0;
1630	1649	break;
1631		case 0x01: hng64_interrupt_level_request = 1;
	1650	case 0x01: state->interrupt_level_request = 1;
1632	1651	break;
1633		case 0x02: hng64_interrupt_level_request = 2;
	1652	case 0x02: state->interrupt_level_request = 2;
1634	1653	break;
1635	1654	case 0x03:
1636		if(hng64_mcu_type == RACING_MCU)
1637		hng64_interrupt_level_request = 11; //network irq
	1655	if (state->mcu_type == RACING_MCU)
	1656	state->interrupt_level_request = 11; //network irq
1638	1657	else
1639	1658	return;
1640	1659	break;
r8962	r8963
1647	1666
1648	1667	static MACHINE_START(hyperneo)
1649	1668	{
	1669	hng64_state *state = machine->driver_data<hng64_state>();
	1670
1650	1671	/* set the fastest DRC options */
1651	1672	mips3drc_set_options(machine->device("maincpu"), MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
1652	1673
1653	1674	/* configure fast RAM regions for DRC */
1654		mips3drc_add_fastram(machine->device("maincpu"), 0x00000000, 0x00ffffff, FALSE, hng_mainram);
1655		mips3drc_add_fastram(machine->device("maincpu"), 0x04000000, 0x05ffffff, TRUE,  hng_cart);
1656		mips3drc_add_fastram(machine->device("maincpu"), 0x1fc00000, 0x1fc7ffff, TRUE,  rombase);
	1675	mips3drc_add_fastram(machine->device("maincpu"), 0x00000000, 0x00ffffff, FALSE, state->mainram);
	1676	mips3drc_add_fastram(machine->device("maincpu"), 0x04000000, 0x05ffffff, TRUE,  state->cart);
	1677	mips3drc_add_fastram(machine->device("maincpu"), 0x1fc00000, 0x1fc7ffff, TRUE,  state->rombase);
1657	1678	}
1658	1679
1659	1680
1660	1681	static MACHINE_RESET(hyperneo)
1661	1682	{
	1683	hng64_state *state = machine->driver_data<hng64_state>();
1662	1684	int i;
1663	1685	const UINT8 *rom = memory_region(machine, "user2");
1664	1686
1665	1687	/* Sound CPU */
1666		UINT8 *RAM = (UINT8*)hng64_soundram;
	1688	UINT8 *RAM = (UINT8*)state->soundram;
1667	1689	memory_set_bankptr(machine, "bank1",&RAM[0x1e0000]);
1668	1690	memory_set_bankptr(machine, "bank2",&RAM[0x001000]); // where..
1669	1691	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_HALT, ASSERT_LINE);
1670	1692	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
1671	1693
1672	1694	/* Comm CPU */
1673		KL5C80_init();
	1695	KL5C80_init(state);
1674	1696
1675	1697	/* Fill up virtual memory with ROM */
1676	1698	for (i = 0x0; i < 0x100000; i++)
1677		hng64_com_virtual_mem[i] = rom[i];
	1699	state->com_virtual_mem[i] = rom[i];
1678	1700
1679		KL5C80_virtual_mem_sync();
1680		memory_set_direct_update_handler(cputag_get_address_space(machine, "comm", ADDRESS_SPACE_PROGRAM), KL5C80_direct_handler);
	1701	KL5C80_virtual_mem_sync(state);
1681	1702
	1703	address_space *space = machine->device<z80_device>("comm")->space(AS_PROGRAM);
	1704	space->set_direct_update_handler(direct_update_delegate_create_static(KL5C80_direct_handler, *machine));
	1705
1682	1706	cputag_set_input_line(machine, "comm", INPUT_LINE_RESET, PULSE_LINE);     // reset the CPU and let 'er rip
1683	1707	//  cputag_set_input_line(machine, "comm", INPUT_LINE_HALT, ASSERT_LINE);     // hold on there pardner...
1684	1708
1685	1709	// "Display List" init - ugly
1686		activeBuffer = 0;
	1710	state->activeBuffer = 0;
1687	1711
1688	1712	/* For simulate MCU stepping */
1689		fake_mcu_time = 0;
1690		hng_mcu_en = 0;
	1713	state->mcu_fake_time = 0;
	1714	state->mcu_en = 0;
1691	1715	}
1692	1716
1693	1717	static MACHINE_DRIVER_START( hng64 )
	1718
	1719	MDRV_DRIVER_DATA( hng64_state )
	1720
1694	1721	/* basic machine hardware */
1695	1722	MDRV_CPU_ADD("maincpu", VR4300BE, MASTER_CLOCK)    // actually R4300
1696		MDRV_CPU_CONFIG(config)
	1723	MDRV_CPU_CONFIG(vr4300_config)
1697	1724	MDRV_CPU_PROGRAM_MAP(hng_map)
1698	1725	MDRV_CPU_VBLANK_INT_HACK(irq_start,4)
1699	1726

src/mame/drivers/fastlane.c

r8962	r8963
103	103
104	104	***************************************************************************/
105	105
	106	/* verified from HD6309 code */
106	107	static INPUT_PORTS_START( fastlane )
107	108	PORT_START("DSW1")
108	109	KONAMI_COINAGE(DEF_STR( Free_Play ), "No Coin B")
r8962	r8963
114	115	PORT_DIPSETTING(   0x02, "3" )
115	116	PORT_DIPSETTING(   0x01, "4" )
116	117	PORT_DIPSETTING(   0x00, "7" )
117		PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
118		PORT_DIPSETTING(   0x04, DEF_STR( Off ) )
119		PORT_DIPSETTING(   0x00, DEF_STR( On ) )
	118	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) )
	119	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
	120	PORT_DIPSETTING(    0x04, DEF_STR( Cocktail ) )
120	121	/* The bonus life affects the starting high score too, 20000 or 30000 */
121	122	PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) )
122		PORT_DIPSETTING(   0x18, "20000 100000" )
123		PORT_DIPSETTING(   0x10, "30000 150000" )
124		PORT_DIPSETTING(   0x08, "20000" )
125		PORT_DIPSETTING(   0x00, "30000" )
	123	PORT_DIPSETTING(   0x18, "20k 100k 200k 400k 800k" )
	124	PORT_DIPSETTING(   0x10, "30k 150k 300k 600k" )
	125	PORT_DIPSETTING(   0x08, "20k only" )
	126	PORT_DIPSETTING(   0x00, "30k only" )
126	127	PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) )
127	128	PORT_DIPSETTING(   0x60, DEF_STR( Easy ) )
128	129	PORT_DIPSETTING(   0x40, DEF_STR( Medium ) )
129	130	PORT_DIPSETTING(   0x20, DEF_STR( Hard ) )
130	131	PORT_DIPSETTING(   0x00, DEF_STR( Hardest ) )
131		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	132	PORT_DIPNAME( 0x80, 0x00, "Demo Music" )                /* when levels are played by the computer */
132	133	PORT_DIPSETTING(   0x80, DEF_STR( Off ) )
133	134	PORT_DIPSETTING(   0x00, DEF_STR( On ) )
134	135
r8962	r8963
136	137	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
137	138	PORT_DIPSETTING(   0x01, DEF_STR( Off ) )
138	139	PORT_DIPSETTING(   0x00, DEF_STR( On ) )
139		PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
140		PORT_DIPSETTING(   0x02, DEF_STR( Off ) )
141		PORT_DIPSETTING(   0x00, DEF_STR( On ) )
	140	PORT_DIPNAME( 0x02, 0x02, "Upright Controls" )
	141	PORT_DIPSETTING(    0x02, DEF_STR( Single ) )
	142	PORT_DIPSETTING(    0x00, DEF_STR( Dual ) )
142	143	PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
143	144	PORT_DIPNAME( 0x08, 0x08, "Continue" )
144	145	PORT_DIPSETTING(   0x08, "3" )
r8962	r8963
279	280	ROM_END
280	281
281	282
282		GAME( 1987, fastlane, 0, fastlane, fastlane, 0, ROT90, "Konami", "Fast Lane", GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE )
	283	GAME( 1987, fastlane, 0, fastlane, fastlane, 0, ROT90, "Konami", "Fast Lane", GAME_NO_COCKTAIL | GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE )

src/mame/drivers/gamecstl.c

r8962	r8963
435	435	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
436	436	& 0xFF0000;
437	437
438		return memory_read_byte(space, page_offset + offset);
	438	return space->read_byte(page_offset + offset);
439	439	}
440	440
441	441
r8962	r8963
444	444	offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
445	445	& 0xFF0000;
446	446
447		memory_write_byte(space, page_offset + offset, data);
	447	space->write_byte(page_offset + offset, data);
448	448	}
449	449
450	450	static void set_dma_channel(running_device *device, int channel, int state)

src/mame/drivers/cabal.c

r8962	r8963
841	841
842	842	static void seibu_sound_bootleg(running_machine *machine,const char *cpu,int length)
843	843	{
844		const address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
	844	address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
845	845	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
846	846	UINT8 *rom = memory_region(machine, cpu);
847	847
848		memory_set_decrypted_region(space, 0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
	848	space->set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
849	849
850	850	memcpy(decrypt, rom+length, length);
851	851

src/mame/drivers/turrett.c

r8962	r8963
95	95	INPUT_PORTS_END
96	96
97	97
98		static const r3000_cpu_core config =
	98	static const r3000_cpu_core r3000_config =
99	99	{
100	100	0,      /* 1 if we have an FPU, 0 otherwise */
101	101	2048,   /* code cache size */
r8962	r8963
107	107	/* basic machine hardware */
108	108	MDRV_CPU_ADD("maincpu", R3041BE, R3041_CLOCK)
109	109	MDRV_CPU_PROGRAM_MAP(cpu_map)
110		MDRV_CPU_CONFIG(config)
	110	MDRV_CPU_CONFIG(r3000_config)
111	111
112	112	/* video hardware */
113	113	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/vendetta.c

r8962	r8963
166	166	static void vendetta_video_banking( running_machine *machine, int select )
167	167	{
168	168	vendetta_state *state = machine->driver_data<vendetta_state>();
169		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	169	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
170	170
171	171	if (select & 1)
172	172	{

src/mame/drivers/segas16b.c

r8962	r8963
1026	1026
1027	1027	if (state->soundcpu != NULL)
1028	1028	{
1029		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	1029	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
1030	1030	soundlatch_w(space, 0, data & 0xff);
1031	1031	cpu_set_input_line(state->soundcpu, 0, HOLD_LINE);
1032	1032	}
r8962	r8963
1418	1418	static void altbeast_common_i8751_sim(running_machine *machine, offs_t soundoffs, offs_t inputoffs)
1419	1419	{
1420	1420	segas1x_state *state = machine->driver_data<segas1x_state>();
1421		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	1421	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
1422	1422	UINT16 temp;
1423	1423
1424	1424	/* signal a VBLANK to the main CPU */
r8962	r8963
1458	1458	static void ddux_i8751_sim(running_machine *machine)
1459	1459	{
1460	1460	segas1x_state *state = machine->driver_data<segas1x_state>();
1461		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	1461	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
1462	1462	UINT16 temp;
1463	1463
1464	1464	/* signal a VBLANK to the main CPU */
r8962	r8963
1496	1496	static void goldnaxe_i8751_sim(running_machine *machine)
1497	1497	{
1498	1498	segas1x_state *state = machine->driver_data<segas1x_state>();
1499		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	1499	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
1500	1500	UINT16 temp;
1501	1501
1502	1502	/* signal a VBLANK to the main CPU */
r8962	r8963
1528	1528	static void tturf_i8751_sim(running_machine *machine)
1529	1529	{
1530	1530	segas1x_state *state = machine->driver_data<segas1x_state>();
1531		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	1531	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
1532	1532	UINT16 temp;
1533	1533
1534	1534	/* signal a VBLANK to the main CPU */
r8962	r8963
1552	1552	static void wb3_i8751_sim(running_machine *machine)
1553	1553	{
1554	1554	segas1x_state *state = machine->driver_data<segas1x_state>();
1555		const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	1555	address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
1556	1556	UINT16 temp;
1557	1557
1558	1558	/* signal a VBLANK to the main CPU */
r8962	r8963
5996	5996	Tough Turf, Sega System 16B
5997	5997	CPU: 68000 + i8751 (317-0099)
5998	5998	ROM Board: 171-5358
	5999	Sega ID# for ROM board: 834-6949
5999	6000	*/
6000	6001	ROM_START( tturfu )
6001	6002	ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */

src/mame/drivers/zac2650.c

r8962	r8963
10	10
11	11	#include "emu.h"
12	12	#include "cpu/s2650/s2650.h"
	13	#include "sound/s2636.h"
13	14
14	15	#include "tinv2650.lh"
15	16
r8962	r8963
260	261	MDRV_VIDEO_UPDATE(tinvader)
261	262
262	263	/* sound hardware */
	264	MDRV_SPEAKER_STANDARD_MONO("mono")
	265
	266	MDRV_SOUND_ADD("s2636snd", S2636, 0)
	267	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
263	268	MACHINE_DRIVER_END
264	269
265	270	static WRITE8_HANDLER( tinvader_sound_w )
r8962	r8963
314	319	ROM_END
315	320
316	321
317		GAME( 1978, sia2650,  0,       tinvader, sinvader, 0, ROT270, "Zelco / Zaccaria", "Super Invader Attack", GAME_NO_SOUND )
318		GAMEL(1978, tinv2650, sia2650, tinvader, tinvader, 0, ROT270, "Zelco / Zaccaria", "The Invaders",         GAME_NO_SOUND, layout_tinv2650 )
319		GAME( 1979, dodgem,   0,       tinvader, dodgem,   0, ROT0,   "Zaccaria",         "Dodgem",               GAME_NO_SOUND )
	322	GAME( 1978, sia2650,  0,       tinvader, sinvader, 0, ROT270, "Zelco / Zaccaria", "Super Invader Attack", 0 )
	323	GAMEL(1978, tinv2650, sia2650, tinvader, tinvader, 0, ROT270, "Zelco / Zaccaria", "The Invaders",         0, layout_tinv2650 )
	324	GAME( 1979, dodgem,   0,       tinvader, dodgem,   0, ROT0,   "Zaccaria",         "Dodgem",               0 )

src/mame/drivers/crshrace.c

r8962	r8963
157	157
158	158	static WRITE8_HANDLER( crshrace_sh_bankswitch_w )
159	159	{
160		UINT8 *rom = memory_region(space->machine, "audiocpu") + 0x10000;
161
162		memory_set_bankptr(space->machine, "bank1",rom + (data & 0x03) * 0x8000);
	160	memory_set_bank(space->machine, "bank1", data & 0x03);
163	161	}
164	162
165
166	163	static WRITE16_HANDLER( sound_command_w )
167	164	{
168	165	crshrace_state *state = space->machine->driver_data<crshrace_state>();
r8962	r8963
449	446	{
450	447	crshrace_state *state = machine->driver_data<crshrace_state>();
451	448
	449	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "audiocpu") + 0x10000, 0x8000);
	450
452	451	state->audiocpu = machine->device("audiocpu");
453	452	state->k053936 = machine->device("k053936");
454	453

src/mame/drivers/pacman.c

r8962	r8963
5348	5348
5349	5349	static void maketrax_rom_decode(running_machine *machine)
5350	5350	{
5351		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	5351	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
5352	5352	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
5353	5353	UINT8 *rom = memory_region(machine, "maincpu");
5354	5354
5355	5355	/* patch protection using a copy of the opcodes so ROM checksum */
5356	5356	/* tests will not fail */
5357		memory_set_decrypted_region(space, 0x0000, 0x3fff, decrypted);
	5357	space->set_decrypted_region(0x0000, 0x3fff, decrypted);
5358	5358
5359	5359	memcpy(decrypted,rom,0x4000);
5360	5360
r8962	r8963
5380	5380
5381	5381	static void korosuke_rom_decode(running_machine *machine)
5382	5382	{
5383		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	5383	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
5384	5384	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
5385	5385	UINT8 *rom = memory_region(machine, "maincpu");
5386	5386
5387	5387	/* patch protection using a copy of the opcodes so ROM checksum */
5388	5388	/* tests will not fail */
5389		memory_set_decrypted_region(space, 0x0000, 0x3fff, decrypted);
	5389	space->set_decrypted_region(0x0000, 0x3fff, decrypted);
5390	5390
5391	5391	memcpy(decrypted,rom,0x4000);
5392	5392

src/mame/drivers/igs011.c

r8962	r8963
881	881
882	882	//  igs011_prot2 = 0x00;
883	883
884		const address_space *sp = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	884	address_space *sp = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
885	885	UINT8 *rom = memory_region(space->machine, "maincpu");
886	886
887	887	// Plug previous address range with ROM access

src/mame/drivers/sf.c

r8962	r8963
54	54	/* The protection of the Japanese (and alt US) version */
55	55	/* I'd love to see someone dump the 68705 / i8751 roms */
56	56
57		static void write_dword( const address_space *space, offs_t offset, UINT32 data )
	57	static void write_dword( address_space *space, offs_t offset, UINT32 data )
58	58	{
59		memory_write_word(space, offset, data >> 16);
60		memory_write_word(space, offset + 2, data);
	59	space->write_word(offset, data >> 16);
	60	space->write_word(offset + 2, data);
61	61	}
62	62
63	63	static WRITE16_HANDLER( protection_w )
r8962	r8963
71	71	int map;
72	72
73	73	map = maplist
74		[memory_read_byte(space, 0xffc006)]
75		[(memory_read_byte(space, 0xffc003) << 1) + (memory_read_word(space, 0xffc004) >> 8)];
	74	[space->read_byte(0xffc006)]
	75	[(space->read_byte(0xffc003) << 1) + (space->read_word(0xffc004) >> 8)];
76	76
77		switch (memory_read_byte(space, 0xffc684))
	77	switch (space->read_byte(0xffc684))
78	78	{
79	79	case 1:
80	80	{
r8962	r8963
111	111	int d1 = delta1[map] + 0xc0;
112	112	int d2 = delta2[map];
113	113
114		memory_write_word(space, 0xffc680, d1);
115		memory_write_word(space, 0xffc682, d2);
116		memory_write_word(space, 0xffc00c, 0xc0);
117		memory_write_word(space, 0xffc00e, 0);
	114	space->write_word(0xffc680, d1);
	115	space->write_word(0xffc682, d2);
	116	space->write_word(0xffc00c, 0xc0);
	117	space->write_word(0xffc00e, 0);
118	118
119	119	sf_fg_scroll_w(space, 0, d1, 0xffff);
120	120	sf_bg_scroll_w(space, 0, d2, 0xffff);
r8962	r8963
122	122	}
123	123	case 4:
124	124	{
125		int pos = memory_read_byte(space, 0xffc010);
	125	int pos = space->read_byte(0xffc010);
126	126	pos = (pos + 1) & 3;
127		memory_write_byte(space, 0xffc010, pos);
	127	space->write_byte(0xffc010, pos);
128	128	if(!pos)
129	129	{
130		int d1 = memory_read_word(space, 0xffc682);
131		int off = memory_read_word(space, 0xffc00e);
	130	int d1 = space->read_word(0xffc682);
	131	int off = space->read_word(0xffc00e);
132	132	if (off!=512)
133	133	{
134	134	off++;
r8962	r8963
139	139	off = 0;
140	140	d1 -= 512;
141	141	}
142		memory_write_word(space, 0xffc682, d1);
143		memory_write_word(space, 0xffc00e, off);
	142	space->write_word(0xffc682, d1);
	143	space->write_word(0xffc00e, off);
144	144	sf_bg_scroll_w(space, 0, d1, 0xffff);
145	145	}
146	146	break;
r8962	r8963
148	148	default:
149	149	{
150	150	logerror("Write protection at %06x (%04x)\n", cpu_get_pc(space->cpu), data & 0xffff);
151		logerror("*** Unknown protection %d\n", memory_read_byte(space, 0xffc684));
	151	logerror("*** Unknown protection %d\n", space->read_byte(0xffc684));
152	152	break;
153	153	}
154	154	}

src/mame/drivers/konamim2.c

r8962	r8963
786	786	}
787	787	}
788	788
789		static void cde_dma_transfer(const address_space *space, int channel, int next)
	789	static void cde_dma_transfer(address_space *space, int channel, int next)
790	790	{
791	791	UINT32 address;
792	792	//int length;
r8962	r8963
805	805
806	806	for (i=0; i < cde_dma[channel].next_length; i++)
807	807	{
808		memory_write_byte(space, address, 0xff);      // TODO: do the real transfer...
	808	space->write_byte(address, 0xff);      // TODO: do the real transfer...
809	809	address++;
810	810	}
811	811	}

src/mame/drivers/williams.c

r8962	r8963
524	524	ADDRESS_MAP_END
525	525
526	526
527		void defender_install_io_space(const address_space *space)
	527	void defender_install_io_space(address_space *space)
528	528	{
529	529	running_device *pia_0 = space->machine->device("pia_0");
530	530	running_device *pia_1 = space->machine->device("pia_1");

src/mame/drivers/dec8.c

r8962	r8963
54	54	/* Only used by ghostb, gondo, garyoret, other games can control buffering */
55	55	static VIDEO_EOF( dec8 )
56	56	{
57		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	57	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
58	58	buffer_spriteram_w(space, 0, 0);
59	59	}
60	60
r8962	r8963
3444	3444	static DRIVER_INIT( deco222 )
3445	3445	{
3446	3446	dec8_state *state = machine->driver_data<dec8_state>();
3447		const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
	3447	address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
3448	3448	int A;
3449	3449	UINT8 *decrypt;
3450	3450	UINT8 *rom;
r8962	r8963
3453	3453	rom = memory_region(machine, "audiocpu");
3454	3454	decrypt = auto_alloc_array(machine, UINT8, 0x8000);
3455	3455
3456		memory_set_decrypted_region(space, 0x8000, 0xffff, decrypt);
	3456	space->set_decrypted_region(0x8000, 0xffff, decrypt);
3457	3457
3458	3458	for (A = 0x8000; A < 0x10000; A++)
3459	3459	decrypt[A - 0x8000] = (rom[A] & 0x9f) | ((rom[A] & 0x20) << 1) | ((rom[A] & 0x40) >> 1);

src/mame/drivers/atarigt.c

r8962	r8963
81	81
82	82	static void cage_irq_callback(running_machine *machine, int reason)
83	83	{
84		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	84	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
85	85
86	86	if (reason)
87	87	atarigen_sound_int_gen(machine->device("maincpu"));
r8962	r8963
280	280	}
281	281
282	282
283		static void tmek_protection_w(const address_space *space, offs_t offset, UINT16 data)
	283	static void tmek_protection_w(address_space *space, offs_t offset, UINT16 data)
284	284	{
285	285	/*
286	286	T-Mek init:
r8962	r8963
303	303	}
304	304	}
305	305
306		static void tmek_protection_r(const address_space *space, offs_t offset, UINT16 *data)
	306	static void tmek_protection_r(address_space *space, offs_t offset, UINT16 *data)
307	307	{
308	308	if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", cpu_get_previouspc(space->cpu), offset);
309	309
r8962	r8963
369	369
370	370
371	371
372		static void primrage_protection_w(const address_space *space, offs_t offset, UINT16 data)
	372	static void primrage_protection_w(address_space *space, offs_t offset, UINT16 data)
373	373	{
374	374	if (LOG_PROTECTION)
375	375	{
r8962	r8963
439	439
440	440
441	441
442		static void primrage_protection_r(const address_space *space, offs_t offset, UINT16 *data)
	442	static void primrage_protection_r(address_space *space, offs_t offset, UINT16 *data)
443	443	{
444	444	/* track accesses */
445	445	primage_update_mode(offset);
r8962	r8963
467	467	break;
468	468	case 0x275cc:
469	469	a6 = cpu_get_reg(space->cpu, M68K_A6);
470		p1 = (memory_read_word(space, a6+8) << 16) | memory_read_word(space, a6+10);
471		p2 = (memory_read_word(space, a6+12) << 16) | memory_read_word(space, a6+14);
	470	p1 = (space->read_word(a6+8) << 16) | space->read_word(a6+10);
	471	p2 = (space->read_word(a6+12) << 16) | space->read_word(a6+14);
472	472	logerror("Known Protection @ 275BC(%08X, %08X): R@%06X ", p1, p2, offset);
473	473	break;
474	474	case 0x275d2:
r8962	r8963
485	485	/* protection code from 3d8dc - 3d95a */
486	486	case 0x3d8f4:
487	487	a6 = cpu_get_reg(space->cpu, M68K_A6);
488		p1 = (memory_read_word(space, a6+12) << 16) | memory_read_word(space, a6+14);
	488	p1 = (space->read_word(a6+12) << 16) | space->read_word(a6+14);
489	489	logerror("Known Protection @ 3D8F4(%08X): R@%06X ", p1, offset);
490	490	break;
491	491	case 0x3d8fa:
r8962	r8963
496	496	/* protection code from 437fa - 43860 */
497	497	case 0x43814:
498	498	a6 = cpu_get_reg(space->cpu, M68K_A6);
499		p1 = memory_read_dword(space, a6+14) & 0xffffff;
	499	p1 = space->read_dword(a6+14) & 0xffffff;
500	500	logerror("Known Protection @ 43814(%08X): R@%06X ", p1, offset);
501	501	break;
502	502	case 0x4381c:

src/mame/drivers/bigfghtr.c

r8962	r8963
308	308
309	309	static VIDEO_EOF( bigfghtr )
310	310	{
311		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	311	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
312	312	buffer_spriteram16_w(space, 0, 0, 0xffff);
313	313	}
314	314

src/mame/drivers/crospang.c

r8962	r8963
100	100	ADDRESS_MAP_END
101	101
102	102
	103	/* verified from M68000 code */
103	104	static INPUT_PORTS_START( crospang )
104	105	PORT_START("P1_P2")
105		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
106		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
107		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
	106	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_4WAY PORT_PLAYER(1)
	107	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_4WAY PORT_PLAYER(1)
	108	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_4WAY PORT_PLAYER(1)
108	109	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
109	110	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
110	111	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
111	112	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
112	113	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
113		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
114		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
115		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
	114	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_4WAY PORT_PLAYER(2)
	115	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_4WAY PORT_PLAYER(2)
	116	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_4WAY PORT_PLAYER(2)
116	117	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
117	118	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
118	119	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
r8962	r8963
126	127	PORT_BIT( 0xfc00, IP_ACTIVE_LOW, IPT_UNKNOWN )
127	128
128	129	PORT_START("DSW")
129		PORT_DIPNAME( 0x0003, 0x0002, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
	130	PORT_DIPNAME( 0x0003, 0x0002, DEF_STR( Coinage ) )      PORT_DIPLOCATION("SW1:1,2")
130	131	PORT_DIPSETTING(      0x0000, DEF_STR( 3C_1C ) )
131	132	PORT_DIPSETTING(      0x0001, DEF_STR( 2C_1C ) )
132	133	PORT_DIPSETTING(      0x0002, DEF_STR( 1C_1C ) )
133	134	PORT_DIPSETTING(      0x0003, DEF_STR( 1C_2C ) )
134		PORT_DIPUNKNOWN_DIPLOC( 0x0004, 0x0004, "SW1:3" )
135		PORT_DIPUNKNOWN_DIPLOC( 0x0008, 0x0008, "SW1:4" )
136		PORT_DIPUNKNOWN_DIPLOC( 0x0010, 0x0010, "SW1:5" )
137		PORT_DIPNAME( 0x0020, 0x0020, "Number of Powers" ) PORT_DIPLOCATION("SW1:6")
	135	PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Difficulty ) )   PORT_DIPLOCATION("SW1:3,4")   /* to be confirmed */
	136	PORT_DIPSETTING(      0x0008, DEF_STR( Easy ) )         /* table at 0x02ee2c */
	137	PORT_DIPSETTING(      0x000c, DEF_STR( Medium ) )       /* table at 0x02e88c */
	138	PORT_DIPSETTING(      0x0000, DEF_STR( Hard ) )         /* table at 0x02f96c */
	139	PORT_DIPSETTING(      0x0004, DEF_STR( Hardest ) )      /* table at 0x02f3cc */
	140	PORT_DIPNAME( 0x0010, 0x0010, "Bonus Power (Points)" )  PORT_DIPLOCATION("SW1:6")
	141	PORT_DIPSETTING(      0x0010, "5k 20k 15k+" )
	142	PORT_DIPSETTING(      0x0000, "8k 23k 15k+" )
	143	PORT_DIPNAME( 0x0020, 0x0020, "Number of Powers" )      PORT_DIPLOCATION("SW1:6")
138	144	PORT_DIPSETTING(      0x0000, "1" )
139	145	PORT_DIPSETTING(      0x0020, "2" )
140		PORT_DIPNAME( 0x00c0, 0x0040, "Extra Balls" ) PORT_DIPLOCATION("SW1:7,8")
	146	PORT_DIPNAME( 0x00c0, 0x0040, "Extra Balls per Move" ) PORT_DIPLOCATION("SW1:7,8")
141	147	PORT_DIPSETTING(      0x00c0, "1" )
142	148	PORT_DIPSETTING(      0x0080, "2" )
143	149	PORT_DIPSETTING(      0x0040, "3" )
144	150	PORT_DIPSETTING(      0x0000, "4" )
145		PORT_DIPUNKNOWN_DIPLOC( 0x0100, 0x0100, "SW2:1" )
146		PORT_DIPUNKNOWN_DIPLOC( 0x0200, 0x0200, "SW2:2" )
147		PORT_DIPUNKNOWN_DIPLOC( 0x0400, 0x0400, "SW2:3" )
148		PORT_DIPNAME( 0x1800, 0x1000, "Minimum Balls per Row" ) PORT_DIPLOCATION("SW2:4,5")
	151	PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Unknown ) )      PORT_DIPLOCATION("SW2:1,2")   /* code at 0x021672 - occurs after level 6 */
	152	PORT_DIPSETTING(      0x0300, "6/7" )
	153	PORT_DIPSETTING(      0x0200, "7/8" )
	154	PORT_DIPSETTING(      0x0100, "8/9" )
	155	PORT_DIPSETTING(      0x0000, "9/10" )
	156	PORT_DIPNAME( 0x0400, 0x0400, "Bonus Power (Bomb)" )    PORT_DIPLOCATION("SW2:3")
	157	PORT_DIPSETTING(      0x0400, "3 Chain Reactions" )
	158	PORT_DIPSETTING(      0x0000, "4 Chain Reactions" )
	159	PORT_DIPNAME( 0x1800, 0x1800, "Minimum Balls per Row" ) PORT_DIPLOCATION("SW2:4,5")
149	160	PORT_DIPSETTING(      0x1800, "3" )
150	161	PORT_DIPSETTING(      0x1000, "4" )
151	162	PORT_DIPSETTING(      0x0800, "5" )
152	163	PORT_DIPSETTING(      0x0000, "6" )
153		PORT_DIPUNKNOWN_DIPLOC( 0x2000, 0x2000, "SW2:6" )
	164	PORT_DIPUNUSED_DIPLOC( 0x2000, 0x2000, "SW2:6" )        /* stored at 0x325414.w but not read back */
154	165	PORT_SERVICE_DIPLOC( 0x4000, IP_ACTIVE_LOW, "SW2:7" )
155		PORT_DIPUNKNOWN_DIPLOC( 0x8000, 0x8000, "SW2:8" )
	166	PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW2:8" )        /* stored at 0x325418.w but not read back */
156	167	INPUT_PORTS_END
157	168
	169	/* verified from M68000 code */
158	170	static INPUT_PORTS_START( heuksun )
159	171	PORT_START("P1_P2")
160		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
161		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
162		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
	172	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_4WAY PORT_PLAYER(1)
	173	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_4WAY PORT_PLAYER(1)
	174	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_4WAY PORT_PLAYER(1)
163	175	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
164	176	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
165	177	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
166	178	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
167	179	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
168		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
169		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
170		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
	180	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_4WAY PORT_PLAYER(2)
	181	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_4WAY PORT_PLAYER(2)
	182	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_4WAY PORT_PLAYER(2)
171	183	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
172	184	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
173	185	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
r8962	r8963
186	198	PORT_DIPSETTING(      0x0001, DEF_STR( 2C_1C ) )
187	199	PORT_DIPSETTING(      0x0002, DEF_STR( 1C_1C ) )
188	200	PORT_DIPSETTING(      0x0003, DEF_STR( 1C_2C ) )
189		PORT_DIPUNKNOWN_DIPLOC( 0x0004, 0x0004, "SW1:3" )
190		PORT_DIPUNKNOWN_DIPLOC( 0x0008, 0x0008, "SW1:4" )
191		PORT_DIPUNKNOWN_DIPLOC( 0x0010, 0x0010, "SW1:5" )
192		PORT_DIPUNKNOWN_DIPLOC( 0x0020, 0x0020, "SW1:6" )
193		PORT_DIPUNKNOWN_DIPLOC( 0x0040, 0x0040, "SW1:7" )
	201	PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Difficulty ) )   PORT_DIPLOCATION("SW1:3,4")   /* stored at 0x324632.w */
	202	PORT_DIPSETTING(      0x000c, DEF_STR( Easy ) )         /* 1 */
	203	PORT_DIPSETTING(      0x0008, DEF_STR( Medium ) )       /* 2 */
	204	PORT_DIPSETTING(      0x0004, DEF_STR( Hard ) )         /* 3 */
	205	PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )      /* 4 */
	206	PORT_DIPNAME( 0x0010, 0x0010, "Help Penalty (Heuk Sun)" ) PORT_DIPLOCATION("SW1:5")   /* code at 0x01878e and 0x0187f6 */
	207	PORT_DIPSETTING(      0x0010, "Constant" )
	208	PORT_DIPSETTING(      0x0000, "Variable" )              /* based on "Difficulty" Dip Switch */
	209	PORT_DIPUNUSED_DIPLOC( 0x0020, 0x0020, "SW1:6" )        /* read once during initialisation but not even stored */
	210	PORT_DIPUNKNOWN_DIPLOC( 0x0040, 0x0040, "SW1:7" )       /* stored at 0x32463a.w but not read back ? */
194	211	PORT_SERVICE_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW1:8" )
195		PORT_DIPUNKNOWN_DIPLOC( 0x0100, 0x0100, "SW2:1" )
196		PORT_DIPUNKNOWN_DIPLOC( 0x0200, 0x0200, "SW2:2" )
197		PORT_DIPUNKNOWN_DIPLOC( 0x0400, 0x0400, "SW2:3" )
198		PORT_DIPUNKNOWN_DIPLOC( 0x0800, 0x0800, "SW2:4" )
199		PORT_DIPUNKNOWN_DIPLOC( 0x1000, 0x1000, "SW2:5" )
200		PORT_DIPUNKNOWN_DIPLOC( 0x2000, 0x2000, "SW2:6" )
201		PORT_DIPUNKNOWN_DIPLOC( 0x4000, 0x4000, "SW2:7" )
202		PORT_DIPUNKNOWN_DIPLOC( 0x8000, 0x8000, "SW2:8" )
	212	/* bits are tested from most to less significant - code at 0x01023e */
	213	PORT_DIPNAME( 0xff00, 0xff00, DEF_STR( Unknown ) )      PORT_DIPLOCATION("SW2:1,2,3,4,5,6,7,8") /* stored at 0x324662.w but not read back ? */
	214	PORT_DIPSETTING(      0xff00, "0" )
	215	PORT_DIPSETTING(      0xfe00, "1" )
	216	PORT_DIPSETTING(      0xfd00, "2" )
	217	PORT_DIPSETTING(      0xfb00, "3" )
	218	PORT_DIPSETTING(      0xf700, "4" )
	219	PORT_DIPSETTING(      0xef00, "5" )
	220	PORT_DIPSETTING(      0xdf00, "6" )
	221	PORT_DIPSETTING(      0xbf00, "7" )
	222	PORT_DIPSETTING(      0x7f00, "8" )
203	223	INPUT_PORTS_END
204	224
	225	/* verified from M68000 code */
205	226	static INPUT_PORTS_START( bestri )
206	227	PORT_START("P1_P2")
207		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
208		PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
209		PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
	228	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_4WAY PORT_PLAYER(1)
	229	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_4WAY PORT_PLAYER(1)
	230	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_4WAY PORT_PLAYER(1)
210	231	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
211	232	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
212	233	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
213	234	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
214	235	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
215		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
216		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
217		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
	236	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_4WAY PORT_PLAYER(2)
	237	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_4WAY PORT_PLAYER(2)
	238	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_4WAY PORT_PLAYER(2)
218	239	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
219	240	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
220	241	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
r8962	r8963
229	250
230	251	PORT_START("DSW")
231	252	PORT_SERVICE_DIPLOC( 0x0001, IP_ACTIVE_LOW, "SW1:1" )
232		PORT_DIPNAME( 0x0006, 0x0002, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2,3")
	253	PORT_DIPNAME( 0x0006, 0x0002, DEF_STR( Coinage ) )      PORT_DIPLOCATION("SW1:2,3")
233	254	PORT_DIPSETTING(      0x0000, DEF_STR( 3C_1C ) )
234	255	PORT_DIPSETTING(      0x0004, DEF_STR( 2C_1C ) )
235	256	PORT_DIPSETTING(      0x0002, DEF_STR( 1C_1C ) )
236	257	PORT_DIPSETTING(      0x0006, DEF_STR( 1C_2C ) )
237		PORT_DIPUNKNOWN_DIPLOC( 0x0008, 0x0008, "SW1:4" )
238		PORT_DIPUNKNOWN_DIPLOC( 0x0010, 0x0010, "SW1:5" )
239		PORT_DIPUNKNOWN_DIPLOC( 0x0020, 0x0020, "SW1:6" )
240		PORT_DIPUNKNOWN_DIPLOC( 0x0040, 0x0040, "SW1:7" )
241		PORT_DIPUNKNOWN_DIPLOC( 0x0080, 0x0080, "SW1:8" )
242		PORT_DIPUNKNOWN_DIPLOC( 0x0100, 0x0100, "SW2:1" )
243		PORT_DIPUNKNOWN_DIPLOC( 0x0200, 0x0200, "SW2:2" )
244		PORT_DIPUNKNOWN_DIPLOC( 0x0400, 0x0400, "SW2:3" )
245		PORT_DIPUNKNOWN_DIPLOC( 0x0800, 0x0800, "SW2:4" )
246		PORT_DIPUNKNOWN_DIPLOC( 0x1000, 0x1000, "SW2:5" )
247		PORT_DIPUNKNOWN_DIPLOC( 0x2000, 0x2000, "SW2:6" )
248		PORT_DIPUNKNOWN_DIPLOC( 0x4000, 0x4000, "SW2:7" )
249		PORT_DIPUNKNOWN_DIPLOC( 0x8000, 0x8000, "SW2:8" )
	258	PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Difficulty ) )   PORT_DIPLOCATION("SW1:4,5")   /* stored at 0x3a6f78.w */
	259	PORT_DIPSETTING(      0x0018, DEF_STR( Easy ) )         /* 1 */
	260	PORT_DIPSETTING(      0x0008, DEF_STR( Medium ) )       /* 2 */
	261	PORT_DIPSETTING(      0x0010, DEF_STR( Hard ) )         /* 3 */
	262	PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )      /* 4 */
	263	PORT_DIPNAME( 0x0020, 0x0020, "Help Penalty (Heuk Sun)" ) PORT_DIPLOCATION("SW1:6")   /* code at 0x0b7152 and 0x07b1ba */
	264	PORT_DIPSETTING(      0x0020, "Constant" )
	265	PORT_DIPSETTING(      0x0000, "Variable" )              /* based on "Difficulty" Dip Switch */
	266	PORT_DIPNAME( 0x00c0, 0x00c0, "Girls" )                 PORT_DIPLOCATION("SW1:7,8")   /* stored at 0x3a6faa.w */
	267	PORT_DIPSETTING(      0x00c0, DEF_STR( No ) )
	268	PORT_DIPSETTING(      0x0080, DEF_STR( Yes ) )
	269	//  PORT_DIPSETTING(      0x0040, DEF_STR( No ) )
	270	//  PORT_DIPSETTING(      0x0000, DEF_STR( No ) )
	271	PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Unknown ) )      PORT_DIPLOCATION("SW2:1,2,3") /* stored at 0x3a6fa6.w but not read back ? */
	272	PORT_DIPSETTING(      0x0700, "0" )
	273	PORT_DIPSETTING(      0x0300, "1" )
	274	PORT_DIPSETTING(      0x0500, "2" )
	275	PORT_DIPSETTING(      0x0100, "3" )
	276	PORT_DIPSETTING(      0x0600, "4" )
	277	PORT_DIPSETTING(      0x0200, "5" )
	278	PORT_DIPSETTING(      0x0400, "6" )
	279	PORT_DIPSETTING(      0x0000, "7" )
	280	PORT_DIPNAME( 0x1800, 0x1800, "Unknown (Die Break)" )   PORT_DIPLOCATION("SW2:4,5")   /* stored at 0x3a6fa8.w */
	281	PORT_DIPSETTING(      0x1800, "0" )
	282	PORT_DIPSETTING(      0x0800, "1" )
	283	PORT_DIPSETTING(      0x1000, "2" )
	284	PORT_DIPSETTING(      0x0000, "3" )
	285	PORT_DIPNAME( 0x2000, 0x2000, "Time (Penta)" )          PORT_DIPLOCATION("SW2:6")     /* stored at 0x3a6fac.w */
	286	PORT_DIPSETTING(      0x0000, "60" )
	287	PORT_DIPSETTING(      0x2000, "90" )
	288	PORT_DIPUNUSED_DIPLOC( 0x4000, 0x4000, "SW2:7" )        /* read once during initialisation but not even stored */
	289	PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW2:8" )        /* read once during initialisation but not even stored */
250	290	INPUT_PORTS_END
251	291
252	292	static const gfx_layout tlayout =
r8962	r8963
544	584	ROM_CONTINUE ( 0x0c0000,0x20000)
545	585	ROM_CONTINUE ( 0x1c0000,0x20000)
546	586
547
548	587	ROM_REGION( 0x200000, "gfx2", 0 ) // sprites
549	588	ROM_LOAD16_BYTE( "ud14.j12", 0x000000, 0x80000, CRC(141c696e) SHA1(3d35a20f7c12a8d8a9f6d351f06fb9df0c673354) )
550	589	ROM_LOAD16_BYTE( "ud15.h12", 0x000001, 0x80000, CRC(7c04adc0) SHA1(9883565d6556ce8ae3da6c91cbf04894e87e6923) )
r8962	r8963
581	620
582	621	GAME( 1998, crospang, 0, crospang, crospang, crospang, ROT0, "F2 System", "Cross Pang", GAME_SUPPORTS_SAVE )
583	622	GAME( 199?, heuksun,  0, crospang, heuksun,  crospang, ROT0, "Oksan / F2 System", "Heuk Sun Baek Sa (Korea)", GAME_SUPPORTS_SAVE )
584		GAME( 1998, bestri,   0, bestri,   bestri,   crospang, ROT0, "F2 System", "Bestri (Korea)", GAME_SUPPORTS_SAVE )
	623	GAME( 1998, bestri,   0, bestri,   bestri,   crospang, ROT0, "F2 System", "Bestri (Korea)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )

src/mame/drivers/darkmist.c

r8962	r8963
423	423
424	424	static DRIVER_INIT(darkmist)
425	425	{
426		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	426	address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
427	427	int i, len;
428	428	UINT8 *ROM = memory_region(machine, "maincpu");
429	429	UINT8 *buffer = auto_alloc_array(machine, UINT8, 0x10000);
r8962	r8963
457	457	decrypt[i] = p;
458	458	}
459	459
460		memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
	460	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
461	461	memory_set_bankptr(space->machine, "bank1",&ROM[0x010000]);
462	462
463	463	/* adr line swaps */

src/mame/drivers/m10.c

r8962	r8963
145	145	ttl74123_a_w(state->ic8j1, 0, data);
146	146	}
147	147
148		static const ttl74123_config ic8j1_intf =
	148	static const ttl74123_interface ic8j1_intf =
149	149	{
150	150	/* completely illegible */
151	151	TTL74123_NOT_GROUNDED_DIODE,   /* the hook up type */
r8962	r8963
157	157	ic8j1_output_changed
158	158	};
159	159
160		static const ttl74123_config ic8j2_intf =
	160	static const ttl74123_interface ic8j2_intf =
161	161	{
162	162	TTL74123_NOT_GROUNDED_DIODE,   /* the hook up type */
163	163	/* 10k + 20k variable resistor */

src/osd/sdl/debugosx.m

r8962	r8963
878	878
879	879	@implementation MAMEDisassemblyView
880	880
881		- (device_debug::breakpoint *)findBreakpointAtAddress:(offs_t)address inAddressSpace:(const address_space *)space {
	881	- (device_debug::breakpoint *)findBreakpointAtAddress:(offs_t)address inAddressSpace:(address_space *)space {
882	882	device_debug         *cpuinfo = space->cpu->debug();
883	883	device_debug::breakpoint   *bp;
884	884	for (bp = cpuinfo->breakpoint_first(); (bp != NULL) && (address != bp->address()); bp = bp->next()) {}
r8962	r8963
1081	1081
1082	1082	- (IBAction)debugToggleBreakpoint:(id)sender {
1083	1083	if (view->cursor_visible()) {
1084		const address_space *space = downcast<const debug_view_disasm_source *>(view->source())->space();
	1084	address_space *space = downcast<const debug_view_disasm_source *>(view->source())->space();
1085	1085	if (!useConsole || (debug_cpu_get_visible_cpu(machine) == space->cpu)) {
1086	1086	offs_t            address = downcast<debug_view_disasm *>(view)->selected_address();
1087	1087	device_debug::breakpoint *bp = [self findBreakpointAtAddress:address inAddressSpace:space];
r8962	r8963
1107	1107
1108	1108	- (IBAction)debugToggleBreakpointEnable:(id)sender {
1109	1109	if (view->cursor_visible()) {
1110		const address_space *space = downcast<const debug_view_disasm_source *>(view->source())->space();
	1110	address_space *space = downcast<const debug_view_disasm_source *>(view->source())->space();
1111	1111	if (!useConsole || (debug_cpu_get_visible_cpu(machine) == space->cpu)) {
1112	1112	offs_t            address = downcast<debug_view_disasm *>(view)->selected_address();
1113	1113	device_debug::breakpoint *bp = [self findBreakpointAtAddress:address inAddressSpace:space];
r8962	r8963
1131	1131
1132	1132	- (IBAction)debugRunToCursor:(id)sender {
1133	1133	if (view->cursor_visible()) {
1134		const address_space *space = downcast<const debug_view_disasm_source *>(view->source())->space();
	1134	address_space *space = downcast<const debug_view_disasm_source *>(view->source())->space();
1135	1135	if (debug_cpu_get_visible_cpu(machine) == space->cpu) {
1136	1136	offs_t address = downcast<debug_view_disasm *>(view)->selected_address();
1137	1137	if (useConsole) {

src/emu/cpu/m6809/m6809.c

r8962	r8963
503	503
504	504	m68_state->ireg = ROP(PCD);
505	505	PC++;
506		(*m6809_main[m68_state->ireg])(m68_state);
	506	(*m6809_main[m68_state->ireg])(m68_state);
507	507	m68_state->icount -= cycles1[m68_state->ireg];
508	508
509	509	} while( m68_state->icount > 0 );

src/emu/cpu/m68000/m68kcpu.c

r8962	r8963
985	985	m_direct = &space.direct();
986	986	m_cpustate = get_safe_token(&space.device());
987	987	opcode_xor = 0;
988
	988
989	989	readimm16 = m68k_readimm16_delegate(m68k_readimm16_proto_delegate::create_member(m68k_memory_interface, simple_read_immediate_16), *this);
990	990	read8 = m68k_read8_delegate(m68k_read8_proto_delegate::create_member(address_space, read_byte), space);
991	991	read16 = m68k_read16_delegate(m68k_read16_proto_delegate::create_member(address_space, read_word), space);
r8962	r8963
1006	1006	m_direct = &space.direct();
1007	1007	m_cpustate = get_safe_token(&space.device());
1008	1008	opcode_xor = WORD_XOR_BE(0);
1009
	1009
1010	1010	readimm16 = m68k_readimm16_delegate(m68k_readimm16_proto_delegate::create_member(m68k_memory_interface, read_immediate_16), *this);
1011	1011	read8 = m68k_read8_delegate(m68k_read8_proto_delegate::create_member(address_space, read_byte), space);
1012	1012	read16 = m68k_read16_delegate(m68k_read16_proto_delegate::create_member(address_space, read_word_unaligned), space);
r8962	r8963
1132	1132	m_direct = &space.direct();
1133	1133	m_cpustate = get_safe_token(&space.device());
1134	1134	opcode_xor = WORD_XOR_BE(0);
1135
	1135
1136	1136	readimm16 = m68k_readimm16_delegate(m68k_readimm16_proto_delegate::create_member(m68k_memory_interface, read_immediate_16_mmu), *this);
1137	1137	read8 = m68k_read8_delegate(m68k_read8_proto_delegate::create_member(m68k_memory_interface, read_byte_32_mmu), *this);
1138	1138	read16 = m68k_read16_delegate(m68k_read16_proto_delegate::create_member(m68k_memory_interface, readword_d32_mmu), *this);

src/emu/cpu/v60/v60.c

r8962	r8963
14	14	#define OpRead32(s, a)   ((s)->direct->read_decrypted_dword(a))
15	15	#else
16	16	#define OpRead8(s, a)   ((s)->direct->read_decrypted_byte((a) ^ (s)->fetch_xor))
17		#define OpRead16(s, a)    (((s)->direct->read_decrypted_byte(((a)+0) ^ (s)->fetch_xor) << 0) | \
	17	#define OpRead16(s, a)   (((s)->direct->read_decrypted_byte(((a)+0) ^ (s)->fetch_xor) << 0) | \
18	18	((s)->direct->read_decrypted_byte(((a)+1) ^ (s)->fetch_xor) << 8))
19		#define OpRead32(s, a)    (((s)->direct->read_decrypted_byte(((a)+0) ^ (s)->fetch_xor) << 0) | \
	19	#define OpRead32(s, a)   (((s)->direct->read_decrypted_byte(((a)+0) ^ (s)->fetch_xor) << 0) | \
20	20	((s)->direct->read_decrypted_byte(((a)+1) ^ (s)->fetch_xor) << 8) | \
21	21	((s)->direct->read_decrypted_byte(((a)+2) ^ (s)->fetch_xor) << 16) | \
22	22	((s)->direct->read_decrypted_byte(((a)+3) ^ (s)->fetch_xor) << 24))

src/emu/cpu/dsp56k/dsp56dsm.c

r8962	r8963
1	1	/***************************************************************************
2	2
3		dsp56dsm.c
4		Disassembler for the portable Motorola/Freescale dsp56k emulator.
5		Written by Andrew Gardner
	3	dsp56dsm.c
	4	Disassembler for the portable Motorola/Freescale dsp56k emulator.
	5	Written by Andrew Gardner
6	6
7	7	***************************************************************************/
8	8

src/emu/cpu/dsp56k/tables.c

r8962	r8963
570	570
571	571	switch(P)
572	572	{
573		case 0x0:
574		sprintf(temp, "X:<$%x", ppppp);
575		// NEW // sprintf(temp, "X:$%02x", ppppp);
	573	case 0x0:
	574	sprintf(temp, "X:<$%x", ppppp);
	575	// NEW // sprintf(temp, "X:$%02x", ppppp);
576	576	break;
577	577	case 0x1:
578	578	assemble_address_from_IO_short_address(ppppp, fullAddy);
r8962	r8963
583	583	D = temp;
584	584	}
585	585
586		void assemble_arguments_from_W_table(UINT16 W, char ma, const reg_id& SD, const std::string& ea,
	586	void assemble_arguments_from_W_table(UINT16 W, char ma, const reg_id& SD, const std::string& ea,
587	587	std::string& source, std::string& destination)
588	588	{
589	589	char temp[32];
r8962	r8963
595	595	}
596	596	}
597	597
598		void assemble_arguments_from_W_table(UINT16 W, char ma, const std::string& SD, const std::string& ea,
	598	void assemble_arguments_from_W_table(UINT16 W, char ma, const std::string& SD, const std::string& ea,
599	599	std::string& source, std::string& destination)
600	600	{
601	601	char temp[32];
r8962	r8963
679	679	{
680	680	if (bmd == BM_NONE)
681	681	return false;
682
	682
683	683	if (r0 == r1)
684	684	return true;
685	685
r8962	r8963
720	720	if (reg == iM1) return M1;
721	721	if (reg == iM2) return M2;
722	722	if (reg == iM3) return M3;
723
	723
724	724	mame_printf_debug("The dsp561xx core is requesting a 16 bit value from non-16 bit register!");
725	725	return 0xdead;
726	726	}
r8962	r8963
797	797	case iINVALID: return "!!"; break;
798	798	case iWEIRD: return "?"; break;
799	799	}
800
	800
801	801	return "INVALID_REG_ID";
802	802	}
803	803
r8962	r8963
821	821	case oES: return "es"; break;
822	822	case oLS: return "ls"; break;
823	823	case oLE: return "le"; break;
824
	824
825	825	case oSS: return "ss"; break;
826	826	case oSU: return "su"; break;
827	827	case oUU: return "uu"; break;
828	828	case oINVALID: return "!!"; break;
829	829	}
830
	830
831	831	return "INVALID_OPCODE_MNEMONIC";
832	832	}
833	833
r8962	r8963
872	872	if (str == "^F") return iFHAT;
873	873	if (str == "!!") return iINVALID;
874	874	if (str == "?") return iWEIRD;
875
	875
876	876	return iINVALID;
877	877	}
878	878
r8962	r8963
892	892	if (regId == iM1) return 1;
893	893	if (regId == iM2) return 2;
894	894	if (regId == iM3) return 3;
895
	895
896	896	return 255;
897	897	}
898	898

src/emu/cpu/dsp56k/dsp56k.c

r8962	r8963
21	21	- 1-9 For fractional arithmetic, the 31-bit product is added to the 40-bit contents of A or B.  No pipeline!
22	22	- 1-10 Two types of rounding: convergent rounding and two's complement rounding.  See status register bit R.
23	23	- 1-10 Logic unit is 16-bits wide and works on MSP portion of accum register
24		- 1-10 The AGU can implement three types of arithmetic: linear, modulo, and reverse carry.
	24	- 1-10 The AGU can implement three types of arithmetic: linear, modulo, and reverse carry.
25	25	- 1-12 "Two external interrupt pins!!!"
26	26	- 1-12 Take care of all interrupt priority (IPR) stuff!
27	27	- 1-19 Memory WAIT states
r8962	r8963
319	319
320	320	UINT16 w0 = ROPCODE(ADDRESS(PC));
321	321	UINT16 w1 = ROPCODE(ADDRESS(PC) + ADDRESS(1));
322
	322
323	323	Opcode op(w0, w1);
324	324	op.evaluate(cpustate);
325	325	PC += op.evalSize();   // Special size function needed to handle jmps, etc.
r8962	r8963
505	505	case CPUINFO_INT_CLOCK_DIVIDER:               info->i = 2;                     break;
506	506	case CPUINFO_INT_MIN_INSTRUCTION_BYTES:         info->i = 2;                     break;
507	507	case CPUINFO_INT_MAX_INSTRUCTION_BYTES:         info->i = 4;                     break;
508		case CPUINFO_INT_MIN_CYCLES:               info->i = 1;   // ?               break;
509		case CPUINFO_INT_MAX_CYCLES:               info->i = 8;   // ?               break;
	508	case CPUINFO_INT_MIN_CYCLES:               info->i = 1;   // ?                    break;
	509	case CPUINFO_INT_MAX_CYCLES:               info->i = 8;   // ?                    break;
510	510
511	511	case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM:   info->i = 16;               break;
512	512	case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16;               break;

src/emu/cpu/dsp56k/inst.c

r8962	r8963
5	5	{
6	6
7	7	// Factory
8		Instruction* Instruction::decodeInstruction(const Opcode* opc,
9		const UINT16 word0,
	8	Instruction* Instruction::decodeInstruction(const Opcode* opc,
	9	const UINT16 word0,
10	10	const UINT16 word1,
11	11	bool shifted)
12	12	{
r8962	r8963
18	18	w0 = w1;
19	19	w1 = 0x0000;
20	20	}
21
	21
22	22	/**************************************************************************/
23	23	/* The very funky case of the XMemoryDataMoveWithShortDisplacement        */
24	24	/**************************************************************************/
r8962	r8963
112	112	/* No Parallel Data Move :   0100 1010 .... .... : A-131 */
113	113	/* Register to Register Data Move : 0100 IIII .... .... : A-133 */
114	114	/* Address Register Update : 0011 0zRR .... .... : A-135 */
115		/* X Memory Data Move :     1mRR HHHW .... .... : A-137 */
116		/* X Memory Data Move :     0101 HHHW .... .... : A-137 */
	115	/* X Memory Data Move :   1mRR HHHW .... .... : A-137 */
	116	/* X Memory Data Move :   0101 HHHW .... .... : A-137 */
117	117	/* Quote: (32 General parallel move instructions) */
118	118	/****************************************************************/
119	119	else if (((w0 & 0xff00) == 0x4a00) ||

src/emu/cpu/dsp56k/opcode.h

r8962	r8963
33	33	const reg_id& instSource() const;
34	34	const reg_id& instDestination() const;
35	35	const size_t instAccumulatorBitsModified() const;
36
	36
37	37	private:
38	38	Instruction* m_instruction;
39	39	ParallelMove* m_parallelMove;

src/emu/cpu/dsp56k/tables.h

r8962	r8963
16	16	enum bitsModified {BM_NONE = 0x0, BM_LOW = 0x1, BM_MIDDLE = 0x2, BM_HIGH = 0x4};
17	17
18	18	enum bfShift {BBB_UPPER, BBB_MIDDLE, BBB_LOWER, BBB_INVALID};
19		enum reg_id {iX,  iX0, iX1,
20		iY,  iY0, iY1,
21		iA,  iA0, iA1, iA2,
	19	enum reg_id {iX,  iX0, iX1,
	20	iY,  iY0, iY1,
	21	iA,  iA0, iA1, iA2,
22	22	iB,  iB0, iB1, iB2,
23		iR0, iR1, iR2, iR3,
24		iN0, iN1, iN2, iN3,
	23	iR0, iR1, iR2, iR3,
	24	iN0, iN1, iN2, iN3,
25	25	iM0, iM1, iM2, iM3,
26		iLC, iSR, iOMR, iSP, iSSH, iSSL, iLA, iMR, iCCR,
27		iF, iFHAT,
	26	iLC, iSR, iOMR, iSP, iSSH, iSSL, iLA, iMR, iCCR,
	27	iF, iFHAT,
28	28	iINVALID, iWEIRD};
29	29
30	30	enum op_mnem {oCC, oGE, oNE, oPL,

src/emu/cpu/dsp56k/inst.h

r8962	r8963
26	26	Instruction(const Opcode* oco) : m_valid(false),
27	27	m_oco(oco),
28	28	m_sizeIncrement(0),
29		m_source(iINVALID),
	29	m_source(iINVALID),
30	30	m_destination(iINVALID) { }
31	31	virtual ~Instruction() {}
32	32
r8962	r8963
39	39	virtual size_t accumulatorBitsModified() const = 0;   // Potentially make this always return ALL (like flags)
40	40	virtual size_t flags() const { return 0; }
41	41
42		static Instruction* decodeInstruction(const Opcode* opc,
43		const UINT16 word0,
44		const UINT16 word1,
	42	static Instruction* decodeInstruction(const Opcode* opc,
	43	const UINT16 word0,
	44	const UINT16 word1,
45	45	bool shifted=false);
46	46
47	47	const bool valid() const { return m_valid; }
r8962	r8963
70	70	class Abs: public Instruction
71	71	{
72	72	public:
73		Abs(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
	73	Abs(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
74	74	{
75	75	m_valid = decode(word0, word1);
76	76	}
r8962	r8963
98	98	}
99	99	bool decode(const UINT16 word0, const UINT16 word1)
100	100	{
101		decode_JF_table(BITSn(word0,0x0001), BITSn(word0,0x0008),
	101	decode_JF_table(BITSn(word0,0x0001), BITSn(word0,0x0008),
102	102	m_source, m_destination);
103	103	return true;
104	104	}
r8962	r8963
121	121	}
122	122	bool decode(const UINT16 word0, const UINT16 word1)
123	123	{
124		decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	124	decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
125	125	m_source, m_destination);
126	126	return true;
127	127	}
r8962	r8963
147	147	}
148	148	bool decode(const UINT16 word0, const UINT16 word1)
149	149	{
150		decode_uuuuF_table(BITSn(word0,0x17), BITSn(word0,0x08),
	150	decode_uuuuF_table(BITSn(word0,0x17), BITSn(word0,0x08),
151	151	m_opcode, m_source, m_destination);
152	152	// TODO: m_opcode = "add";
153	153	return true;
r8962	r8963
175	175	}
176	176	bool decode(const UINT16 word0, const UINT16 word1)
177	177	{
178		decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
	178	decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
179	179	m_source, m_destination);
180	180	return true;
181	181	}
r8962	r8963
213	213	void evaluate(dsp56k_core* cpustate) {}
214	214	size_t size() const { return 1; }
215	215	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
216
	216
217	217	private:
218	218	UINT8 m_immediate;
219	219	};
r8962	r8963
354	354	case BBB_UPPER:  m_iVal <<= 8; break;
355	355	case BBB_MIDDLE: m_iVal <<= 4; break;
356	356	case BBB_LOWER:  m_iVal <<= 0; break;
357
	357
358	358	case BBB_INVALID: return false; break;
359	359	}
360	360
r8962	r8963
415	415	case BBB_UPPER:  m_iVal <<= 8; break;
416	416	case BBB_MIDDLE: m_iVal <<= 4; break;
417	417	case BBB_LOWER:  m_iVal <<= 0; break;
418
	418
419	419	case BBB_INVALID: return false; break;
420	420	}
421	421
r8962	r8963
449	449	void evaluate(dsp56k_core* cpustate) {}
450	450	size_t size() const { return 2; }
451	451	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
452
	452
453	453	private:
454	454	reg_id m_r;
455	455	UINT16 m_iVal;
r8962	r8963
481	481	case BBB_UPPER:  m_iVal <<= 8; break;
482	482	case BBB_MIDDLE: m_iVal <<= 4; break;
483	483	case BBB_LOWER:  m_iVal <<= 0; break;
484
	484
485	485	case BBB_INVALID: return false; break;
486	486	}
487	487
r8962	r8963
538	538	{
539	539	std::string opcode = "b" + opMnemonicAsString(m_mnem);
540	540	// NEW // sprintf(opcode_str, "b.%s", M);
541
	541
542	542	char temp[32];
543	543	sprintf(temp, ">*+$%x", 2 + m_immediate);
544	544	// NEW // sprintf(temp, "$%04x (%d)", pc + 2 + (INT16)word1, (INT16)word1);
r8962	r8963
547	547	void evaluate(dsp56k_core* cpustate) {}
548	548	size_t size() const { return 2; }
549	549	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
550
	550
551	551	private:
552	552	op_mnem m_mnem;
553	553	INT16 m_immediate;
r8962	r8963
573	573	{
574	574	std::string opcode = "b" + opMnemonicAsString(m_mnem);
575	575	// NEW // sprintf(opcode_str, "b.%s", M);
576
	576
577	577	char temp[32];
578	578	if (m_immediate >= 0) sprintf(temp, "<*+$%x", m_immediate + 1);
579	579	else                  sprintf(temp, "<*-$%x", 1 - m_immediate - 2);
r8962	r8963
643	643	void evaluate(dsp56k_core* cpustate) {}
644	644	size_t size() const { return 2; }
645	645	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
646
	646
647	647	private:
648	648	INT16 m_immediate;
649	649	};
r8962	r8963
673	673	void evaluate(dsp56k_core* cpustate) {}
674	674	size_t size() const { return 1; }
675	675	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
676
	676
677	677	private:
678	678	INT8 m_immediate;
679	679	};
r8962	r8963
760	760	size_t size() const { return 2; }
761	761	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
762	762	size_t flags() { return DASMFLAG_STEP_OVER; }
763
	763
764	764	private:
765	765	op_mnem m_mnem;
766	766	INT16 m_immediate;
r8962	r8963
822	822	size_t size() const { return 2; }
823	823	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
824	824	size_t flags() { return DASMFLAG_STEP_OVER; }
825
	825
826	826	private:
827	827	INT16 m_immediate;
828	828	};
r8962	r8963
926	926	bool decode(const UINT16 word0, const UINT16 word1)
927	927	{
928	928	/* Note: This is a JJJF limited in the docs, but other opcodes sneak
929		in before cmp, so the same decode function can be used. */
930		decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	929	in before cmp, so the same decode function can be used. */
	930	decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
931	931	m_source, m_destination);
932	932	return true;
933	933	}
r8962	r8963
951	951	bool decode(const UINT16 word0, const UINT16 word1)
952	952	{
953	953	/* Note: This is a JJJF limited in the docs, but other opcodes sneak
954		in before cmp, so the same decode function can be used. */
955		decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	954	in before cmp, so the same decode function can be used. */
	955	decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
956	956	m_source, m_destination);
957	957	return true;
958	958	}
r8962	r8963
1068	1068	}
1069	1069	bool decode(const UINT16 word0, const UINT16 word1)
1070	1070	{
1071		decode_DDF_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
	1071	decode_DDF_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
1072	1072	m_source, m_destination);
1073	1073	return true;
1074	1074	}
r8962	r8963
1093	1093	}
1094	1094	bool decode(const UINT16 word0, const UINT16 word1)
1095	1095	{
1096		decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
	1096	decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
1097	1097	m_source, m_source2, m_destination);
1098	1098
1099	1099	decode_ss_table(BITSn(word0,0x0024), m_mnem);
r8962	r8963
1103	1103	void disassemble(std::string& retString) const
1104	1104	{
1105	1105	std::string opcode = "dmac" + opMnemonicAsString(m_mnem);
1106
1107		retString = opcode + " " +
1108		regIdAsString(m_source) + "," +
	1106
	1107	retString = opcode + " " +
	1108	regIdAsString(m_source) + "," +
1109	1109	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
1110	1110	// NEW // sprintf(opcode_str, "dmac(%s)", A);
1111	1111	}
1112	1112	void evaluate(dsp56k_core* cpustate) {}
1113	1113	size_t size() const { return 1; }
1114	1114	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
1115
	1115
1116	1116	private:
1117	1117	op_mnem m_mnem;
1118	1118	reg_id m_source2;
r8962	r8963
1139	1139	sprintf(temp, "*+$%x", 2 + m_immediate);
1140	1140	std::string destination = temp;
1141	1141	// NEW // sprintf(temp, "X:(R%d),$%02x", Rnum, pc + 2 + word1);
1142
	1142
1143	1143	sprintf(temp, "X:(%s)", regIdAsString(m_source).c_str());
1144	1144	std::string source = temp;
1145
	1145
1146	1146	retString = "do " + source + "," + destination;
1147	1147	}
1148	1148	void evaluate(dsp56k_core* cpustate) {}
r8962	r8963
1179	1179	void evaluate(dsp56k_core* cpustate) {}
1180	1180	size_t size() const { return 2; }
1181	1181	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
1182
	1182
1183	1183	private:
1184	1184	UINT8 m_immediate;
1185	1185	UINT16 m_displacement;
r8962	r8963
1197	1197	bool decode(const UINT16 word0, const UINT16 word1)
1198	1198	{
1199	1199	m_displacement = word1;
1200
	1200
1201	1201	decode_DDDDD_table(BITSn(word0,0x001f), m_source);
1202	1202	if (m_source == iSSH) return false;
1203	1203	if (m_source == iINVALID) return false;
r8962	r8963
1213	1213	void evaluate(dsp56k_core* cpustate) {}
1214	1214	size_t size() const { return 2; }
1215	1215	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
1216
	1216
1217	1217	private:
1218	1218	UINT16 m_displacement;
1219	1219	};
r8962	r8963
1243	1243	void evaluate(dsp56k_core* cpustate) {}
1244	1244	size_t size() const { return 2; }
1245	1245	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
1246
	1246
1247	1247	private:
1248	1248	UINT16 m_displacement;
1249	1249	};
r8962	r8963
1279	1279	}
1280	1280	bool decode(const UINT16 word0, const UINT16 word1)
1281	1281	{
1282		decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
	1282	decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
1283	1283	m_source, m_destination);
1284	1284	return true;
1285	1285	}
r8962	r8963
1346	1346	}
1347	1347	bool decode(const UINT16 word0, const UINT16 word1)
1348	1348	{
1349		decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
	1349	decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
1350	1350	m_source, m_source2, m_destination);
1351	1351	return true;
1352	1352	}
1353	1353	void disassemble(std::string& retString) const
1354	1354	{
1355		retString = "imac " +
1356		regIdAsString(m_source) + "," +
	1355	retString = "imac " +
	1356	regIdAsString(m_source) + "," +
1357	1357	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
1358	1358	}
1359	1359	void evaluate(dsp56k_core* cpustate) {}
1360	1360	size_t size() const { return 1; }
1361	1361	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
1362
	1362
1363	1363	private:
1364	1364	reg_id m_source2;
1365	1365	};
r8962	r8963
1375	1375	}
1376	1376	bool decode(const UINT16 word0, const UINT16 word1)
1377	1377	{
1378		decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
	1378	decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
1379	1379	m_source, m_source2, m_destination);
1380	1380	return true;
1381	1381	}
1382	1382	void disassemble(std::string& retString) const
1383	1383	{
1384		retString = "impy " +
	1384	retString = "impy " +
1385	1385	regIdAsString(m_source) + "," +
1386	1386	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
1387	1387	}
r8962	r8963
1457	1457	{
1458	1458	std::string opcode = "j" + opMnemonicAsString(m_mnem);
1459	1459	// NEW // sprintf(opcode_str, "j.%s", M);
1460
	1460
1461	1461	char temp[32];
1462	1462	sprintf(temp, ">$%x", m_displacement);
1463	1463	// NEW // sprintf(temp, "$%04x", word1);
r8962	r8963
1590	1590	{
1591	1591	std::string opcode = "js" + opMnemonicAsString(m_mnem);
1592	1592	// NEW // sprintf(opcode_str, "js.%s", M);
1593
	1593
1594	1594	char temp[32];
1595	1595	sprintf(temp, ">$%x", m_displacement);
1596	1596	// NEW // sprintf(temp, "$%04x", word1);
r8962	r8963
1691	1691	size_t size() const { return 1; }
1692	1692	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
1693	1693	size_t flags() { return DASMFLAG_STEP_OVER; }
1694
	1694
1695	1695	private:
1696	1696	UINT8 m_bAddr;
1697	1697	};
r8962	r8963
1747	1747	void evaluate(dsp56k_core* cpustate) {}
1748	1748	size_t size() const { return 1; }
1749	1749	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
1750
	1750
1751	1751	private:
1752	1752	std::string m_ea;
1753	1753	};
r8962	r8963
1840	1840	}
1841	1841	bool decode(const UINT16 word0, const UINT16 word1)
1842	1842	{
1843		decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	1843	decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
1844	1844	m_source, m_source2, m_destination);
1845	1845
1846	1846	decode_kSign_table(BITSn(word0,0x40), m_sign);
r8962	r8963
1850	1850	{
1851	1851	std::string ts = m_sign;
1852	1852	if (ts != "-") ts = "";
1853		retString = "mac " +
	1853	retString = "mac " +
1854	1854	ts +
1855		regIdAsString(m_source) + "," +
	1855	regIdAsString(m_source) + "," +
1856	1856	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
1857	1857	}
1858	1858	void evaluate(dsp56k_core* cpustate) {}
r8962	r8963
1875	1875	}
1876	1876	bool decode(const UINT16 word0, const UINT16 word1)
1877	1877	{
1878		decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
	1878	decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
1879	1879	m_source, m_source2, m_destination);
1880	1880	return true;
1881	1881	}
1882	1882	void disassemble(std::string& retString) const
1883	1883	{
1884		retString = "mac " +
	1884	retString = "mac " +
1885	1885	regIdAsString(m_source) + "," +
1886	1886	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
1887	1887	}
r8962	r8963
1904	1904	}
1905	1905	bool decode(const UINT16 word0, const UINT16 word1)
1906	1906	{
1907		decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
	1907	decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
1908	1908	m_source, m_source2, m_destination);
1909	1909	return true;
1910	1910	}
1911	1911	void disassemble(std::string& retString) const
1912	1912	{
1913		retString = "mac " +
	1913	retString = "mac " +
1914	1914	regIdAsString(m_source) + "," +
1915	1915	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
1916	1916	}
r8962	r8963
1934	1934	}
1935	1935	bool decode(const UINT16 word0, const UINT16 word1)
1936	1936	{
1937		decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	1937	decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
1938	1938	m_source, m_source2, m_destination);
1939	1939
1940	1940	decode_kSign_table(BITSn(word0,0x40), m_sign);
r8962	r8963
1944	1944	{
1945	1945	std::string ts = m_sign;
1946	1946	if (ts != "-") ts = "";
1947		retString = "macr " +
	1947	retString = "macr " +
1948	1948	ts +
1949		regIdAsString(m_source) + "," +
	1949	regIdAsString(m_source) + "," +
1950	1950	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
1951	1951	}
1952	1952	void evaluate(dsp56k_core* cpustate) {}
r8962	r8963
1969	1969	}
1970	1970	bool decode(const UINT16 word0, const UINT16 word1)
1971	1971	{
1972		decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
	1972	decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
1973	1973	m_source, m_source2, m_destination);
1974	1974	return true;
1975	1975	}
1976	1976	void disassemble(std::string& retString) const
1977	1977	{
1978		retString = "macr " +
1979		regIdAsString(m_source) + "," +
	1978	retString = "macr " +
	1979	regIdAsString(m_source) + "," +
1980	1980	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
1981	1981	}
1982	1982	void evaluate(dsp56k_core* cpustate) {}
r8962	r8963
2000	2000	bool decode(const UINT16 word0, const UINT16 word1)
2001	2001	{
2002	2002	// Special QQF
2003		decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
	2003	decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
2004	2004	m_source, m_source2, m_destination);
2005	2005
2006	2006	decode_s_table(BITSn(word0,0x0004), m_mnem);
r8962	r8963
2009	2009	void disassemble(std::string& retString) const
2010	2010	{
2011	2011	std::string opcode = "mac" + opMnemonicAsString(m_mnem);
2012
2013		retString = opcode + " " +
2014		regIdAsString(m_source) + "," +
	2012
	2013	retString = opcode + " " +
	2014	regIdAsString(m_source) + "," +
2015	2015	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
2016	2016	// NEW // sprintf(opcode_str, "mac(%s)", A);
2017	2017	}
r8962	r8963
2122	2122	void evaluate(dsp56k_core* cpustate) {}
2123	2123	size_t size() const { return 2; }
2124	2124	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2125
	2125
2126	2126	private:
2127	2127	INT8 m_b;
2128	2128	UINT8 m_W;
r8962	r8963
2161	2161	void evaluate(dsp56k_core* cpustate) {}
2162	2162	size_t size() const { return 1; }
2163	2163	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2164
	2164
2165	2165	private:
2166	2166	INT8 m_W;
2167	2167	reg_id m_SD;
r8962	r8963
2316	2316	}
2317	2317	size_t size() const { return 2; }
2318	2318	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2319
	2319
2320	2320	private:
2321	2321	UINT8 m_t;
2322	2322	UINT8 m_W;
r8962	r8963
2381	2381	void evaluate(dsp56k_core* cpustate) {}
2382	2382	size_t size() const { return 2; }
2383	2383	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2384
	2384
2385	2385	private:
2386	2386	INT8 m_b;
2387	2387	UINT8 m_W;
r8962	r8963
2411	2411	else                  sprintf(temp, "#<-$%x", 1 - m_immediate - 1);
2412	2412	// NEW // sprintf(temp, "#$%02x,%s", BITSn(word0,0x00ff), D1);
2413	2413
2414		retString = "move " +
	2414	retString = "move " +
2415	2415	std::string(temp) + "," + regIdAsString(m_destination);
2416	2416	// NEW // sprintf(opcode_str, "move(i)");
2417	2417	}
2418	2418	void evaluate(dsp56k_core* cpustate) {}
2419	2419	size_t size() const { return 1; }
2420	2420	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2421
	2421
2422	2422	private:
2423	2423	INT8 m_immediate;
2424	2424	};
r8962	r8963
2498	2498	void evaluate(dsp56k_core* cpustate) {}
2499	2499	size_t size() const { return 1; }
2500	2500	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2501
	2501
2502	2502	private:
2503	2503	UINT8 m_W;
2504	2504	std::string m_ea;
r8962	r8963
2534	2534	void evaluate(dsp56k_core* cpustate) {}
2535	2535	size_t size() const { return 2; }
2536	2536	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2537
	2537
2538	2538	private:
2539	2539	INT8 m_b;
2540	2540	UINT8 m_W;
r8962	r8963
2677	2677	bool decode(const UINT16 word0, const UINT16 word1)
2678	2678	{
2679	2679	/* There are inconsistencies with the S1 & S2 operand ordering in the docs,
2680		but since it's a multiply it doesn't matter */
2681		decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	2680	but since it's a multiply it doesn't matter */
	2681	decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
2682	2682	m_source, m_source2, m_destination);
2683	2683
2684	2684	decode_kSign_table(BITSn(word0,0x40), m_sign);
r8962	r8963
2688	2688	{
2689	2689	std::string ts = m_sign;
2690	2690	if (ts != "-") ts = "";
2691		retString = "mpy " +
	2691	retString = "mpy " +
2692	2692	ts +
2693	2693	regIdAsString(m_source) + "," +
2694	2694	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
r8962	r8963
2696	2696	void evaluate(dsp56k_core* cpustate) {}
2697	2697	size_t size() const { return 1; }
2698	2698	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2699
	2699
2700	2700	private:
2701	2701	std::string m_sign;
2702	2702	reg_id m_source2;
r8962	r8963
2713	2713	}
2714	2714	bool decode(const UINT16 word0, const UINT16 word1)
2715	2715	{
2716		decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
	2716	decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
2717	2717	m_source, m_source2, m_destination);
2718	2718	return true;
2719	2719	}
2720	2720	void disassemble(std::string& retString) const
2721	2721	{
2722		retString = "mpy " +
	2722	retString = "mpy " +
2723	2723	regIdAsString(m_source) + "," +
2724	2724	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
2725	2725	}
2726	2726	void evaluate(dsp56k_core* cpustate) {}
2727	2727	size_t size() const { return 1; }
2728	2728	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2729
	2729
2730	2730	private:
2731	2731	reg_id m_source2;
2732	2732	};
r8962	r8963
2742	2742	}
2743	2743	bool decode(const UINT16 word0, const UINT16 word1)
2744	2744	{
2745		decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
	2745	decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
2746	2746	m_source, m_source2, m_destination);
2747	2747	return true;
2748	2748	}
2749	2749	void disassemble(std::string& retString) const
2750	2750	{
2751		retString = "mpy " +
	2751	retString = "mpy " +
2752	2752	regIdAsString(m_source) + "," +
2753	2753	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
2754	2754	}
2755	2755	void evaluate(dsp56k_core* cpustate) {}
2756	2756	size_t size() const { return 1; }
2757	2757	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2758
	2758
2759	2759	private:
2760	2760	reg_id m_source2;
2761	2761	};
r8962	r8963
2773	2773	bool decode(const UINT16 word0, const UINT16 word1)
2774	2774	{
2775	2775	/* There are inconsistencies with the S1 & S2 operand ordering in the docs,
2776		but since it's a multiply it doesn't matter */
2777		decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	2776	but since it's a multiply it doesn't matter */
	2777	decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
2778	2778	m_source, m_source2, m_destination);
2779	2779
2780	2780	decode_kSign_table(BITSn(word0,0x40), m_sign);
r8962	r8963
2784	2784	{
2785	2785	std::string ts = m_sign;
2786	2786	if (ts != "-") ts = "";
2787		retString = "mpyr " +
	2787	retString = "mpyr " +
2788	2788	ts +
2789	2789	regIdAsString(m_source) + "," +
2790	2790	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
r8962	r8963
2792	2792	void evaluate(dsp56k_core* cpustate) {}
2793	2793	size_t size() const { return 1; }
2794	2794	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2795
	2795
2796	2796	private:
2797	2797	std::string m_sign;
2798	2798	reg_id m_source2;
r8962	r8963
2809	2809	}
2810	2810	bool decode(const UINT16 word0, const UINT16 word1)
2811	2811	{
2812		decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
	2812	decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
2813	2813	m_source, m_source2, m_destination);
2814	2814	return true;
2815	2815	}
2816	2816	void disassemble(std::string& retString) const
2817	2817	{
2818		retString = "mpyr " +
	2818	retString = "mpyr " +
2819	2819	regIdAsString(m_source) + "," +
2820	2820	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
2821	2821	}
2822	2822	void evaluate(dsp56k_core* cpustate) {}
2823	2823	size_t size() const { return 1; }
2824	2824	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2825
	2825
2826	2826	private:
2827	2827	reg_id m_source2;
2828	2828	};
r8962	r8963
2839	2839	}
2840	2840	bool decode(const UINT16 word0, const UINT16 word1)
2841	2841	{
2842		decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
	2842	decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
2843	2843	m_source, m_source2, m_destination);
2844	2844
2845	2845	decode_s_table(BITSn(word0,0x0004), m_mnem);
r8962	r8963
2848	2848	void disassemble(std::string& retString) const
2849	2849	{
2850	2850	std::string opcode = "mpy" + opMnemonicAsString(m_mnem);
2851
2852		retString = opcode + " " +
	2851
	2852	retString = opcode + " " +
2853	2853	regIdAsString(m_source) + "," +
2854	2854	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
2855	2855	// NEW // sprintf(opcode_str, "mpy(%s)", A);
r8962	r8963
2857	2857	void evaluate(dsp56k_core* cpustate) {}
2858	2858	size_t size() const { return 1; }
2859	2859	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
2860
	2860
2861	2861	private:
2862	2862	op_mnem m_mnem;
2863	2863	reg_id m_source2;
r8962	r8963
2984	2984	}
2985	2985	bool decode(const UINT16 word0, const UINT16 word1)
2986	2986	{
2987		decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
	2987	decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
2988	2988	m_source, m_destination);
2989	2989	return true;
2990	2990	}
r8962	r8963
3023	3023	void evaluate(dsp56k_core* cpustate) {}
3024	3024	size_t size() const { return 1; }
3025	3025	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
3026
	3026
3027	3027	private:
3028	3028	UINT8 m_immediate;
3029	3029	};
r8962	r8963
3273	3273	}
3274	3274	bool decode(const UINT16 word0, const UINT16 word1)
3275	3275	{
3276		decode_JF_table(BITSn(word0,0x01), BITSn(word0,0x08),
	3276	decode_JF_table(BITSn(word0,0x01), BITSn(word0,0x08),
3277	3277	m_source, m_destination);
3278	3278	return true;
3279	3279	}
r8962	r8963
3317	3317	}
3318	3318	bool decode(const UINT16 word0, const UINT16 word1)
3319	3319	{
3320		decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	3320	decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
3321	3321	m_source, m_destination);
3322	3322	return true;
3323	3323	}
r8962	r8963
3341	3341	}
3342	3342	bool decode(const UINT16 word0, const UINT16 word1)
3343	3343	{
3344		decode_uuuuF_table(BITSn(word0,0x17), BITSn(word0,0x08),
	3344	decode_uuuuF_table(BITSn(word0,0x17), BITSn(word0,0x08),
3345	3345	m_opcode, m_source, m_destination);
3346	3346
3347	3347	// TODO // m_opcode = "sub";
r8962	r8963
3354	3354	void evaluate(dsp56k_core* cpustate) {}
3355	3355	size_t size() const { return 1; }
3356	3356	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
3357
	3357
3358	3358	private:
3359	3359	std::string m_opcode;
3360	3360	};
r8962	r8963
3446	3446	}
3447	3447	bool decode(const UINT16 word0, const UINT16 word1)
3448	3448	{
3449		decode_h0hF_table(BITSn(word0,0x0007),BITSn(word0,0x0008),
	3449	decode_h0hF_table(BITSn(word0,0x0007),BITSn(word0,0x0008),
3450	3450	m_source, m_destination);
3451
	3451
3452	3452	decode_RR_table(BITSn(word0,0x0030), m_destination2);
3453	3453
3454	3454	decode_cccc_table(BITSn(word0,0x03c0), m_mnem);
r8962	r8963
3456	3456	return true;
3457	3457	if (m_destination2 != iR0)
3458	3458	return true;
3459
	3459
3460	3460	return false;
3461	3461	}
3462	3462	void disassemble(std::string& retString) const
3463	3463	{
3464	3464	std::string opcode = "t" + opMnemonicAsString(m_mnem);
3465	3465	// NEW // sprintf(opcode_str, "t.%s", M);
3466
	3466
3467	3467	retString = opcode;
3468	3468	if (m_source != m_destination)
3469	3469	retString += std::string(" ") + regIdAsString(m_source) + "," + regIdAsString(m_destination);
3470
	3470
3471	3471	if (m_destination2 != iR0)
3472	3472	retString += std::string(" R0,") + regIdAsString(m_destination2);
3473	3473	}
3474	3474	void evaluate(dsp56k_core* cpustate) {}
3475	3475	size_t size() const { return 1; }
3476	3476	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
3477
	3477
3478	3478	private:
3479	3479	op_mnem m_mnem;
3480	3480	reg_id m_destination2;
r8962	r8963
3490	3490	}
3491	3491	bool decode(const UINT16 word0, const UINT16 word1)
3492	3492	{
3493		decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
	3493	decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
3494	3494	m_source, m_destination);
3495	3495	return true;
3496	3496	}
r8962	r8963
3513	3513	}
3514	3514	bool decode(const UINT16 word0, const UINT16 word1)
3515	3515	{
3516		decode_DDF_table(BITSn(word0,0x03), BITSn(word0,0x08),
	3516	decode_DDF_table(BITSn(word0,0x03), BITSn(word0,0x08),
3517	3517	m_source, m_destination);
3518	3518	return true;
3519	3519	}
r8962	r8963
3536	3536	}
3537	3537	bool decode(const UINT16 word0, const UINT16 word1)
3538	3538	{
3539		decode_JF_table(BITSn(word0,0x0001),BITSn(word0,0x0008),
	3539	decode_JF_table(BITSn(word0,0x0001),BITSn(word0,0x0008),
3540	3540	m_destination, m_source);
3541	3541	return true;
3542	3542	}
r8962	r8963
3564	3564	}
3565	3565	bool decode(const UINT16 word0, const UINT16 word1)
3566	3566	{
3567		decode_DDF_table(BITSn(word0,0x0030), BITSn(word0,0x0008),
	3567	decode_DDF_table(BITSn(word0,0x0030), BITSn(word0,0x0008),
3568	3568	m_destination, m_source);
3569
	3569
3570	3570	decode_HHH_table(BITSn(word0,0x0007), m_SD);
3571	3571	// If the destination of the second move is the same as the first, you're invalid
3572	3572	if (m_SD == m_destination && BITSn(word0,0x0100)) return false;
r8962	r8963
3582	3582	std::string source2;
3583	3583	std::string destination2;
3584	3584	assemble_arguments_from_W_table(m_W, 'X', m_SD, m_ea, source2, destination2);
3585		retString = "tfr3 " +
3586		regIdAsString(m_source) + "," + regIdAsString(m_destination) + " " +
	3585	retString = "tfr3 " +
	3586	regIdAsString(m_source) + "," + regIdAsString(m_destination) + " " +
3587	3587	source2 + "," + destination2;
3588	3588	}
3589	3589	void evaluate(dsp56k_core* cpustate) {}
3590	3590	size_t size() const { return 1; }
3591	3591	size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
3592
	3592
3593	3593	private:
3594	3594	INT8 m_W;
3595	3595	reg_id m_SD;
r8962	r8963
3696	3696	}
3697	3697	bool decode(const UINT16 word0, const UINT16 word1)
3698	3698	{
3699		decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
	3699	decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
3700	3700	m_source, m_source2, m_destination);
3701
	3701
3702	3702	// This hackery amounts to a very strange QQQF table...
3703	3703	if (m_source == iX0 && m_source2 == iX0) return false;
3704	3704	if (m_source == iX1 && m_source2 == iX0) return false;
3705
	3705
3706	3706	if (m_source == iY0 && m_source2 == iX1)
3707	3707	{
3708	3708	m_source  = iX1;
r8962	r8963
3717	3717	}
3718	3718	void disassemble(std::string& retString) const
3719	3719	{
3720		retString = "shfl " +
	3720	retString = "shfl " +
3721	3721	regIdAsString(m_source) + "," +
3722	3722	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
3723	3723	}
r8962	r8963
3740	3740	}
3741	3741	bool decode(const UINT16 word0, const UINT16 word1)
3742	3742	{
3743		decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
	3743	decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
3744	3744	m_source, m_source2, m_destination);
3745
	3745
3746	3746	// This hackery amounts to a very strange QQQF table...
3747	3747	if (m_source == iX0 && m_source2 == iX0) return false;
3748	3748	if (m_source == iX1 && m_source2 == iX0) return false;
3749
	3749
3750	3750	if (m_source == iY0 && m_source2 == iX1)
3751	3751	{
3752	3752	m_source  = iX1;
r8962	r8963
3761	3761	}
3762	3762	void disassemble(std::string& retString) const
3763	3763	{
3764		retString = "shfr " +
	3764	retString = "shfr " +
3765	3765	regIdAsString(m_source) + "," +
3766	3766	regIdAsString(m_source2) + "," + regIdAsString(m_destination);
3767	3767	}

src/emu/cpu/dsp56k/pmove.c

r8962	r8963
12	12	{
13	13	const UINT16 w0 = word0;
14	14	const UINT16 w1 = word1;
15
	15
16	16	/* Dual X Memory Data Read : 011m mKKK .rr. .... : A-142*/
17	17	if ((w0 & 0xe000) == 0x6000)
18	18	{

src/emu/cpu/dsp56k/pmove.h

r8962	r8963
63	63	std::string ea;
64	64	assemble_ea_from_m_table(BITSn(word0,0x4000), regIDAsNum(r), ea);
65	65
66		assemble_arguments_from_W_table(BITSn(word0,0x0100), 'X', SD, ea,
	66	assemble_arguments_from_W_table(BITSn(word0,0x0100), 'X', SD, ea,
67	67	m_source, m_destination);
68	68
69	69	// If the destination of the instruction overlaps with our destination, abort.
r8962	r8963
105	105	reg_id SD;
106	106	decode_HHH_table(BITSn(word0,0x0e00), SD);
107	107
108		assemble_arguments_from_W_table(BITSn(word0,0x0100), 'X', SD, ea,
	108	assemble_arguments_from_W_table(BITSn(word0,0x0100), 'X', SD, ea,
109	109	m_source, m_destination);
110	110
111	111	// If the destination of the instruction overlaps with our destination, abort.
r8962	r8963
119	119	retString = m_source + "," + m_destination;
120	120	}
121	121	void evaluate() {}
122
	122
123	123	private:
124	124	std::string m_source;
125	125	std::string m_destination;
r8962	r8963
190	190	}
191	191	bool decode(const UINT16 word0, const UINT16 word1)
192	192	{
193		decode_IIIIx_table(BITSn(word0,0x0f00), BITSn(word0,0x0008),
	193	decode_IIIIx_table(BITSn(word0,0x0f00), BITSn(word0,0x0008),
194	194	m_source, m_destination);
195	195
196	196	if (m_source == iINVALID)
r8962	r8963
211	211
212	212	// Don't return a failure, just let everything fall through (nop).
213	213	//if (m_source == "?" && m_destination == "?")
214		//   return false;
	214	//  return false;
215	215
216	216	return true;
217	217	}
r8962	r8963
224	224	retString = regIdAsString(m_source) + "," + regIdAsString(m_destination);
225	225	}
226	226	void evaluate() {}
227
	227
228	228	private:
229	229	reg_id m_source;
230	230	reg_id m_destination;
r8962	r8963
267	267	retString = pms + " " + pms2;
268	268	}
269	269	void evaluate() {}
270
	270
271	271	private:
272	272	std::string pms;    // TODO
273	273	std::string pms2;
r8962	r8963
296	296	retString = m_ea;
297	297	}
298	298	void evaluate() {}
299
	299
300	300	private:
301	301	std::string m_ea;
302	302	};
r8962	r8963
329	329	retString = m_source + "," + m_destination;
330	330	}
331	331	void evaluate() {}
332
	332
333	333	private:
334	334	std::string m_source;
335	335	std::string m_destination;

src/emu/cpu/hcd62121/hcd62121_ops.h

r8962	r8963
747	747	int i;
748	748	int size = datasize( cpustate, op );
749	749	UINT8 reg = read_op( cpustate );
750
	750
751	751	for( i = 0; i < size; i++ )
752	752	{
753	753	cpustate->reg[(reg + i) & 0x7f] = read_op( cpustate );

src/emu/cpu/hcd62121/hcd62121.c

r8962	r8963
6	6	CFX-9850 (and maybe some other things too).
7	7
8	8	This CPU core is based on the information provided by Martin Poupe.
9		Martin Poupe's site can be found at http://prg.rkk.cz/~mpoupe/
	9	Martin Poupe's site can be found at http://prg.rkk.cz/~mpoupe/
10	10
11	11	**********************************************************************/
12	12
r8962	r8963
141	141	cpustate->temp1[i] = cpustate->temp2[i];
142	142	cpustate->temp2[i] = v;
143	143	}
144		}
	144	}
145	145	}
146	146
147	147
r8962	r8963
382	382
383	383	case CPUINFO_INT_REGISTER + HCD62121_IP:   cpustate->ip = info->i;                     break;
384	384	case CPUINFO_INT_REGISTER + HCD62121_SP:   cpustate->sp = info->i;                     break;
385		//   case CPUINFO_INT_REGISTER + HCD62121_R00:   break;
386		//   case CPUINFO_INT_REGISTER + HCD62121_R02:   break;
	385	//  case CPUINFO_INT_REGISTER + HCD62121_R00:   break;
	386	//  case CPUINFO_INT_REGISTER + HCD62121_R02:   break;
387	387	}
388	388	}
389	389
r8962	r8963
432	432	case CPUINFO_INT_REGISTER + HCD62121_SS:         info->i = cpustate->sseg;            break;
433	433	case CPUINFO_INT_REGISTER + HCD62121_DSIZE:         info->i = cpustate->dsize;            break;
434	434	case CPUINFO_INT_REGISTER + HCD62121_R00:         info->i = ( cpustate->reg[0x00] << 24 ) | ( cpustate->reg[0x01] << 16 ) | ( cpustate->reg[0x02] << 8 ) | cpustate->reg[0x03]; break;
435		//   case CPUINFO_INT_REGISTER + HCD62121_R02:         info->i = cpustate->;               break;
	435	//  case CPUINFO_INT_REGISTER + HCD62121_R02:           info->i = cpustate->;                   break;
436	436
437	437	/* --- the following bits of info are returned as pointers to data or functions --- */
438	438	case CPUINFO_FCT_SET_INFO:                  info->setinfo = CPU_SET_INFO_NAME(hcd62121);      break;

src/emu/cpu/sm8500/sm8500.c

r8962	r8963
165	165	INLINE void sm8500_do_interrupt(sm8500_state *cpustate, UINT16 vector) {
166	166	/* Get regs from ram */
167	167	sm8500_get_sp(cpustate);
168		cpustate->SYS = cpustate->program->read_byte(0x19);
169		cpustate->PS1 = cpustate->program->read_byte(0x1f);
	168	cpustate->SYS = cpustate->program->read_byte(0x19);
	169	cpustate->PS1 = cpustate->program->read_byte(0x1f);
170	170	/* Push PC */
171	171	PUSH_BYTE( cpustate->PC & 0xFF );
172	172	PUSH_BYTE( cpustate->PC >> 8 );

src/emu/cpu/m6800/m6800.c

r8962	r8963
956	956	cpustate->txstate = M6800_TX_STATE_INIT;
957	957	cpustate->txbits = cpustate->rxbits = 0;
958	958	cpustate->trcsr_read = 0;
959
	959
960	960	cpustate->cc = 0xc0;
961	961	}
962	962

src/emu/video.c

r8962	r8963
1802	1802
1803	1803
1804	1804	//-------------------------------------------------
1805		//  static_set_visarea - configuration helper to
	1805	//  static_set_visarea - configuration helper to
1806	1806	//  set the visible area of the screen
1807	1807	//-------------------------------------------------
1808	1808
r8962	r8963
1817	1817
1818	1818
1819	1819	//-------------------------------------------------
1820		//  static_set_default_position - configuration
	1820	//  static_set_default_position - configuration
1821	1821	//  helper to set the default position and scale
1822	1822	//  factors for the screen
1823	1823	//-------------------------------------------------

src/emu/video.h

r8962	r8963
280	280	screen_device_config::static_set_type(device, SCREEN_TYPE_##_type); \
281	281
282	282	#define MDRV_SCREEN_RAW_PARAMS(_pixclock, _htotal, _hbend, _hbstart, _vtotal, _vbend, _vbstart) \
283		screen_device_config::static_set_raw(device, _pixclock, _htotal, _hbend, _hbstart, _vtotal, _vbend, _vbstart);
	283	screen_device_config::static_set_raw(device, _pixclock, _htotal, _hbend, _hbstart, _vtotal, _vbend, _vbstart);
284	284
285	285	#define MDRV_SCREEN_REFRESH_RATE(_rate) \
286	286	screen_device_config::static_set_refresh(device, HZ_TO_ATTOSECONDS(_rate)); \

src/emu/devintrf.c

r8962	r8963
399	399
400	400	//-------------------------------------------------
401	401	//  machine_config - return a pointer to a machine
402		//  config constructor describing sub-devices for
	402	//  config constructor describing sub-devices for
403	403	//  this device
404	404	//-------------------------------------------------
405	405

src/emu/devintrf.h

r8962	r8963
247	247	// methods that wrap both interface-level and device-level behavior
248	248	void config_complete();
249	249	bool validity_check(const game_driver &driver) const;
250
	250
251	251	// configuration helpers
252	252	static void static_set_clock(device_config *device, UINT32 clock) { device->m_clock = clock; }
253	253	static void static_set_static_config(device_config *device, const void *config) { device->m_static_config = config; }

src/emu/sound/bsmt2000.c

r8962	r8963
67	67	bsmt2000_voice voice[MAX_VOICES];   /* the voices */
68	68	UINT16 *   regmap[128];         /* mapping of registers to voice params */
69	69	UINT8      mode;               /* current mode */
70
	70
71	71	UINT32      clock;               /* original clock on the chip */
72	72	UINT8      stereo;               /* stereo output? */
73	73	UINT8      voices;               /* number of voices */

src/emu/sound/k053260.c

r8962	r8963
241	241	/* register with the save state system */
242	242	state_save_register_device_item(device, 0, ic->mode);
243	243	state_save_register_device_item_array(device, 0, ic->regs);
244
	244
245	245	for ( i = 0; i < 4; i++ )
246	246	{
247	247	state_save_register_device_item(device, i, ic->channels[i].rate);

src/emu/machine.h

r8962	r8963
161	161	class driver_data_t : public bindable_object
162	162	{
163	163	friend class running_machine;
164
	164
165	165	public:
166	166	driver_data_t(running_machine &machine);
167	167	virtual ~driver_data_t();
168	168
169	169	virtual void machine_start();
170	170	virtual void machine_reset();
171
	171
172	172	virtual void sound_start();
173	173	virtual void sound_reset();
174
	174
175	175	virtual void palette_init(const UINT8 *color_prom);
176	176	virtual void video_start();
177	177	virtual void video_reset();

src/emu/profiler.c

r8962	r8963
37	37
38	38	****************************************************************************
39	39
40		Profiling is scope-based. To start profiling, put a profiler_scope
41		object on the stack. To end profiling, just end the scope:
	40	Profiling is scope-based. To start profiling, put a profiler_scope
	41	object on the stack. To end profiling, just end the scope:
42	42
43		{
44		profiler_scope scope(PROFILER_VIDEO);
45
46		your_work_here();
47		}
	43	{
	44	profiler_scope scope(PROFILER_VIDEO);
48	45
	46	your_work_here();
	47	}
	48
49	49	the profiler handles a FILO list so calls may be nested.
50	50
51	51	***************************************************************************/
r8962	r8963
282	282	// we are ready once we have wrapped around
283	283	if (m_dataindex == 0)
284	284	m_dataready = true;
285
	285
286	286	g_profiler.stop();
287	287	return string;
288	288	}

src/emu/profiler.h

r8962	r8963
37	37
38	38	****************************************************************************
39	39
40		Profiling is scope-based. To start profiling, put a profiler_scope
41		object on the stack. To end profiling, just end the scope:
	40	Profiling is scope-based. To start profiling, put a profiler_scope
	41	object on the stack. To end profiling, just end the scope:
42	42
43		{
44		profiler_scope scope(PROFILER_VIDEO);
45
46		your_work_here();
47		}
	43	{
	44	profiler_scope scope(PROFILER_VIDEO);
48	45
	46	your_work_here();
	47	}
	48
49	49	the profiler handles a FILO list so calls may be nested.
50	50
51	51	***************************************************************************/
r8962	r8963
116	116	public:
117	117	// construction/destruction
118	118	real_profiler_state();
119
	119
120	120	// getters
121	121	bool enabled() const { return m_enabled; }
122	122	const char *text(running_machine &machine, astring &string);

src/emu/devlegcy.c

r8962	r8963
170	170
171	171
172	172	//-------------------------------------------------
173		//  static_set_inline_float - configuration helper
	173	//  static_set_inline_float - configuration helper
174	174	//  to set a floating-point value in the inline
175	175	//  configuration
176	176	//-------------------------------------------------

src/emu/validity.c

r8962	r8963
562	562	error = true;
563	563	}
564	564	}
565
	565
566	566	// count copies/fills as valid items
567	567	else if (ROMENTRY_ISCOPY(romp) || ROMENTRY_ISFILL(romp))
568	568	items_since_region++;

src/emu/disound.c

r8962	r8963
68	68
69	69
70	70	//-------------------------------------------------
71		//  static_add_route - configuration helper to add
	71	//  static_add_route - configuration helper to add
72	72	//  a new route to the device
73	73	//-------------------------------------------------
74	74
r8962	r8963
85	85
86	86
87	87	//-------------------------------------------------
88		//  static_reset_routes - configuration helper to
	88	//  static_reset_routes - configuration helper to
89	89	//  reset all existing routes to the device
90	90	//-------------------------------------------------
91	91

src/emu/memory.c

r8962	r8963
3289	3289
3290	3290	//-------------------------------------------------
3291	3291	//  depopulate_unused - scan the table and
3292		//   eliminate entries that are no longer used
	3292	//  eliminate entries that are no longer used
3293	3293	//-------------------------------------------------
3294	3294
3295	3295	void address_table::depopulate_unused()

src/emu/memory.h

r8962	r8963
212	212	class direct_read_data
213	213	{
214	214	friend class address_table;
215
	215
216	216	public:
217	217	// direct_range is an internal class that is part of a list of start/end ranges
218	218	class direct_range
r8962	r8963
226	226
227	227	// getters
228	228	direct_range *next() const { return m_next; }
229
	229
230	230	// internal state
231	231	direct_range *         m_next;               // pointer to the next range in the list
232	232	offs_t               m_bytestart;         // starting byte offset of the range
r8962	r8963
281	281	offs_t                  m_bytestart;         // minimum valid byte address
282	282	offs_t                  m_byteend;            // maximum valid byte address
283	283	UINT8                  m_entry;            // live entry
284		simple_list<direct_range>    m_rangelist[256];      // list of ranges for each entry
285		simple_list<direct_range>    m_freerangelist;      // list of recycled range entries
	284	simple_list<direct_range>   m_rangelist[256];      // list of ranges for each entry
	285	simple_list<direct_range>   m_freerangelist;      // list of recycled range entries
286	286	direct_update_delegate      m_directupdate;         // fast direct-access update callback
287	287	};
288	288
r8962	r8963
420	420
421	421	// decryption
422	422	void set_decrypted_region(offs_t addrstart, offs_t addrend, void *base);
423
	423
424	424	// direct access
425	425	direct_update_delegate set_direct_update_handler(direct_update_delegate function) { return m_direct.set_direct_update(function); }
426	426	bool set_direct_region(offs_t &byteaddress);
r8962	r8963
551	551
552	552
553	553	// space read/write handler function macros
554		#define READ8_MEMBER(name)             UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
	554	#define READ8_MEMBER(name)            UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
555	555	#define WRITE8_MEMBER(name)            void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
556	556	#define READ16_MEMBER(name)            UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
557	557	#define WRITE16_MEMBER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
r8962	r8963
560	560	#define READ64_MEMBER(name)            UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
561	561	#define WRITE64_MEMBER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
562	562
563		#define DECLARE_READ8_MEMBER(name)       UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
	563	#define DECLARE_READ8_MEMBER(name)      UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
564	564	#define DECLARE_WRITE8_MEMBER(name)      void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
565	565	#define DECLARE_READ16_MEMBER(name)      UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
566	566	#define DECLARE_WRITE16_MEMBER(name)   void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
r8962	r8963
781	781	return m_raw[byteaddress & m_bytemask];
782	782	return m_space.read_byte(byteaddress);
783	783	}
784
	784
785	785	inline UINT8 direct_read_data::read_decrypted_byte(offs_t byteaddress)
786	786	{
787	787	if (address_is_valid(byteaddress))
788	788	return m_decrypted[byteaddress & m_bytemask];
789	789	return m_space.read_byte(byteaddress);
790	790	}
791
792	791
	792
793	793	//-------------------------------------------------
794	794	//  read_raw_word - read a word via the
795	795	//  direct_read_data class
r8962	r8963
801	801	return *reinterpret_cast<UINT16 *>(&m_raw[byteaddress & m_bytemask]);
802	802	return m_space.read_word(byteaddress);
803	803	}
804
	804
805	805	inline UINT16 direct_read_data::read_decrypted_word(offs_t byteaddress)
806	806	{
807	807	if (address_is_valid(byteaddress))
808	808	return *reinterpret_cast<UINT16 *>(&m_decrypted[byteaddress & m_bytemask]);
809	809	return m_space.read_word(byteaddress);
810	810	}
811
812	811
	812
813	813	//-------------------------------------------------
814	814	//  read_raw_dword - read a dword via the
815	815	//  direct_read_data class
r8962	r8963
821	821	return *reinterpret_cast<UINT32 *>(&m_raw[byteaddress & m_bytemask]);
822	822	return m_space.read_dword(byteaddress);
823	823	}
824
	824
825	825	inline UINT32 direct_read_data::read_decrypted_dword(offs_t byteaddress)
826	826	{
827	827	if (address_is_valid(byteaddress))
828	828	return *reinterpret_cast<UINT32 *>(&m_decrypted[byteaddress & m_bytemask]);
829	829	return m_space.read_dword(byteaddress);
830	830	}
831
832	831
	832
833	833	//-------------------------------------------------
834	834	//  read_raw_qword - read a qword via the
835	835	//  direct_read_data class
r8962	r8963
841	841	return *reinterpret_cast<UINT64 *>(&m_raw[byteaddress & m_bytemask]);
842	842	return m_space.read_qword(byteaddress);
843	843	}
844
	844
845	845	inline UINT64 direct_read_data::read_decrypted_qword(offs_t byteaddress)
846	846	{
847	847	if (address_is_valid(byteaddress))
848	848	return *reinterpret_cast<UINT64 *>(&m_decrypted[byteaddress & m_bytemask]);
849	849	return m_space.read_qword(byteaddress);
850	850	}
851
852	851
	852
853	853	#endif   /* __MEMORY_H__ */

src/emu/machine/timekpr.c

r8962	r8963
3	3	timekpr.h
4	4
5	5	Various ST Microelectronics timekeeper SRAM implementations:
6		- M48T02
7		- M48T35
8		- M48T58
9		- MK48T08
	6	- M48T02
	7	- M48T35
	8	- M48T58
	9	- MK48T08
10	10
11	11	***************************************************************************/
12	12
r8962	r8963
67	67	TIMEKPR_DEVCFG_DERIVED_STATIC_ALLOC(devtype) \
68	68	TIMEKPR_DEVCFG_DERIVED_DEV_ALLOC(devtype)
69	69
70		//**************************************************************************
71		//  STATIC DATA
72		//**************************************************************************
73	70
74	71	//**************************************************************************
75	72	//  DEVICE CONFIGURATION
r8962	r8963
307	304	//  device_reset - device-specific reset
308	305	//-------------------------------------------------
309	306
310		void timekeeper_device::device_reset()
311		{
	307	void timekeeper_device::device_reset() { }
	308	void m48t02_device::device_reset() { }
	309	void m48t35_device::device_reset() { }
	310	void m48t58_device::device_reset() { }
	311	void mk48t08_device::device_reset() { }
312	312
313		}
314
315
316	313	void timekeeper_device::counters_to_ram()
317	314	{
318	315	counter_to_ram( m_data, m_offset_control, m_control );

src/emu/machine/devhelpr.h

r8962	r8963
8	8	#ifndef __DEVHELPR_H__
9	9	#define __DEVHELPR_H__
10	10
	11	#define READ32_DEVICE_HANDLER_TRAMPOLINE(devname, funcname) \
	12	READ32_DEVICE_HANDLER( funcname ) \
	13	{ return downcast<devname##_device*>(device)->funcname(offset); } \
	14	UINT32 devname##_device::funcname(UINT32 offset)
	15
	16	#define WRITE32_DEVICE_HANDLER_TRAMPOLINE(devname, funcname) \
	17	WRITE32_DEVICE_HANDLER( funcname ) \
	18	{ downcast<devname##_device*>(device)->funcname(offset, data, mem_mask); } \
	19	void devname##_device::funcname(UINT32 offset, UINT32 data, UINT32 mem_mask)
	20
11	21	#define READ8_DEVICE_HANDLER_TRAMPOLINE(devname, funcname) \
12	22	READ8_DEVICE_HANDLER( funcname ) \
13	23	{ return downcast<devname##_device*>(device)->funcname(offset); } \
r8962	r8963
39	49	device_t *devname##_device_config::alloc_device(running_machine &machine) const \
40	50	{ return auto_alloc(&machine, devname##_device(machine, *this)); }
41	51
	52	#define GENERIC_DEVICE_DERIVED_CONFIG(basename, devname) \
	53	class devname##_device_config : public basename##_device_config \
	54	{ \
	55	friend class devname##_device; \
	56	devname##_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock); \
	57	public: \
	58	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock); \
	59	virtual device_t *alloc_device(running_machine &machine) const; \
	60	}; \
	61	\
	62	class devname##_device : public basename##_device \
	63	{ \
	64	friend class basename##_device; \
	65	friend class devname##_device_config; \
	66	devname##_device(running_machine &_machine, const devname##_device_config &config); \
	67	protected: \
	68	virtual void device_start(); \
	69	virtual void device_reset(); \
	70	};
42	71
43		#endif // __DEVHELPR_H__
		No newline at end of file
	72	#endif // __DEVHELPR_H__

src/emu/machine/k033906.c

r8962	r8963
7	7	#include "emu.h"
8	8	#include "k033906.h"
9	9	#include "video/voodoo.h"
	10	#include "devhelpr.h"
10	11
11		/***************************************************************************
12		TYPE DEFINITIONS
13		***************************************************************************/
14	12
15		typedef struct _k033906_state k033906_state;
16		struct _k033906_state
	13	//**************************************************************************
	14	//  DEVICE CONFIGURATION
	15	//**************************************************************************
	16
	17	GENERIC_DEVICE_CONFIG_SETUP(k033906, "Konami 033906")
	18
	19	//-------------------------------------------------
	20	//  device_config_complete - perform any
	21	//  operations now that the configuration is
	22	//  complete
	23	//-------------------------------------------------
	24
	25	void k033906_device_config::device_config_complete()
17	26	{
18		UINT32 *     reg;
19		UINT32 *     ram;
	27	// inherit a copy of the static data
	28	const k033906_interface *intf = reinterpret_cast<const k033906_interface *>(static_config());
	29	if (intf != NULL)
	30	{
	31	*static_cast<k033906_interface *>(this) = *intf;
	32	}
20	33
21		int          reg_set;   // 1 = access reg / 0 = access ram
	34	// or initialize to defaults if none provided
	35	else
	36	{
	37	m_voodoo_tag = NULL;
	38	}
	39	}
22	40
23		running_device *voodoo;
24		};
25	41
26		/*****************************************************************************
27		INLINE FUNCTIONS
28		*****************************************************************************/
29	42
30		INLINE k033906_state *k033906_get_safe_token( running_device *device )
	43	//**************************************************************************
	44	//  LIVE DEVICE
	45	//**************************************************************************
	46
	47	const device_type K033906 = k033906_device_config::static_alloc_device_config;
	48
	49	//-------------------------------------------------
	50	//  k033906_device - constructor
	51	//-------------------------------------------------
	52
	53	k033906_device::k033906_device(running_machine &_machine, const k033906_device_config &config)
	54	: device_t(_machine, config),
	55	m_config(config)
31	56	{
32		assert(device != NULL);
33		assert(device->type() == K033906);
34	57
35		return (k033906_state *)downcast<legacy_device_base *>(device)->token();
36	58	}
37	59
38		INLINE const k033906_interface *k033906_get_interface( running_device *device )
	60	//-------------------------------------------------
	61	//  device_start - device-specific startup
	62	//-------------------------------------------------
	63
	64	void k033906_device::device_start()
39	65	{
40		assert(device != NULL);
41		assert((device->type() == K033906));
42		return (const k033906_interface *) device->baseconfig().static_config();
	66	m_voodoo = m_machine.device(m_config.m_voodoo_tag);
	67
	68	m_reg = auto_alloc_array(&m_machine, UINT32, 256);
	69	m_ram = auto_alloc_array(&m_machine, UINT32, 32768);
	70
	71	m_reg_set = 0;
	72
	73	state_save_register_device_item_pointer(this, 0, m_reg, 256);
	74	state_save_register_device_item_pointer(this, 0, m_ram, 32768);
	75	state_save_register_device_item(this, 0, m_reg_set);
43	76	}
44	77
45		/*****************************************************************************
46		DEVICE HANDLERS
47		*****************************************************************************/
48	78
49		WRITE_LINE_DEVICE_HANDLER( k033906_set_reg )
	79	WRITE_LINE_DEVICE_HANDLER_TRAMPOLINE(k033906, k033906_set_reg)
50	80	{
51		k033906_state *k033906 = k033906_get_safe_token(device);
52		k033906->reg_set = state & 1;
	81	m_reg_set = state & 1;
53	82	}
54	83
55		static UINT32 k033906_reg_r( running_device *device, int reg )
	84	UINT32 k033906_device::k033906_reg_r(int reg)
56	85	{
57		k033906_state *k033906 = k033906_get_safe_token(device);
58
59	86	switch (reg)
60	87	{
61	88	case 0x00:      return 0x0001121a;         // PCI Vendor ID (0x121a = 3dfx), Device ID (0x0001 = Voodoo)
62	89	case 0x02:      return 0x04000000;         // Revision ID
63		case 0x04:      return k033906->reg[0x04];      // memBaseAddr
64		case 0x0f:      return k033906->reg[0x0f];      // interrupt_line, interrupt_pin, min_gnt, max_lat
	90	case 0x04:      return m_reg[0x04];         // memBaseAddr
	91	case 0x0f:      return m_reg[0x0f];         // interrupt_line, interrupt_pin, min_gnt, max_lat
65	92
66	93	default:
67		fatalerror("%s: k033906_reg_r: %08X", cpuexec_describe_context(device->machine), reg);
	94	fatalerror("%s: k033906_reg_r: %08X", cpuexec_describe_context(&m_machine), reg);
68	95	}
69	96	return 0;
70	97	}
71	98
72		static void k033906_reg_w( running_device *device, int reg, UINT32 data )
	99	void k033906_device::k033906_reg_w(int reg, UINT32 data)
73	100	{
74		k033906_state *k033906 = k033906_get_safe_token(device);
75
76	101	switch (reg)
77	102	{
78	103	case 0x00:
r8962	r8963
84	109	case 0x04:      // memBaseAddr
85	110	{
86	111	if (data == 0xffffffff)
87		k033906->reg[0x04] = 0xff000000;
	112	{
	113	m_reg[0x04] = 0xff000000;
	114	}
88	115	else
89		k033906->reg[0x04] = data & 0xff000000;
	116	{
	117	m_reg[0x04] = data & 0xff000000;
	118	}
90	119	break;
91	120	}
92	121
93	122	case 0x0f:      // interrupt_line, interrupt_pin, min_gnt, max_lat
94	123	{
95		k033906->reg[0x0f] = data;
	124	m_reg[0x0f] = data;
96	125	break;
97	126	}
98	127
99	128	case 0x10:      // initEnable
100	129	{
101		voodoo_set_init_enable(k033906->voodoo, data);
	130	voodoo_set_init_enable(m_voodoo, data);
102	131	break;
103	132	}
104	133
r8962	r8963
110	139	break;
111	140
112	141	default:
113		fatalerror("%s:K033906_w: %08X, %08X", cpuexec_describe_context(device->machine), data, reg);
	142	fatalerror("%s:K033906_w: %08X, %08X", cpuexec_describe_context(&m_machine), data, reg);
114	143	}
115	144	}
116	145
117		READ32_DEVICE_HANDLER( k033906_r )
	146	READ32_DEVICE_HANDLER_TRAMPOLINE(k033906, k033906_r)
118	147	{
119		k033906_state *k033906 = k033906_get_safe_token(device);
120
121		if (k033906->reg_set)
122		return k033906_reg_r(device, offset);
	148	if(m_reg_set)
	149	{
	150	return k033906_reg_r(offset);
	151	}
123	152	else
124		return k033906->ram[offset];
	153	{
	154	return m_ram[offset];
	155	}
125	156	}
126	157
127		WRITE32_DEVICE_HANDLER( k033906_w )
	158	WRITE32_DEVICE_HANDLER_TRAMPOLINE(k033906, k033906_w)
128	159	{
129		k033906_state *k033906 = k033906_get_safe_token(device);
130
131		if (k033906->reg_set)
132		k033906_reg_w(device, offset, data);
	160	if(m_reg_set)
	161	{
	162	k033906_reg_w(offset, data);
	163	}
133	164	else
134		k033906->ram[offset] = data;
	165	{
	166	m_ram[offset] = data;
	167	}
135	168	}
136
137
138		/*****************************************************************************
139		DEVICE INTERFACE
140		*****************************************************************************/
141
142		static DEVICE_START( k033906 )
143		{
144		k033906_state *k033906 = k033906_get_safe_token(device);
145		const k033906_interface *intf = k033906_get_interface(device);
146
147		k033906->voodoo = device->machine->device(intf->voodoo);
148
149		k033906->reg = auto_alloc_array(device->machine, UINT32, 256);
150		k033906->ram = auto_alloc_array(device->machine, UINT32, 32768);
151
152		k033906->reg_set = 0;
153
154		state_save_register_device_item_pointer(device, 0, k033906->reg, 256);
155		state_save_register_device_item_pointer(device, 0, k033906->ram, 32768);
156		state_save_register_device_item(device, 0, k033906->reg_set);
157		}
158
159		/*-------------------------------------------------
160		device definition
161		-------------------------------------------------*/
162
163		static const char DEVTEMPLATE_SOURCE[] = __FILE__;
164
165		#define DEVTEMPLATE_ID( p, s )   p##k033906##s
166		#define DEVTEMPLATE_FEATURES         DT_HAS_START
167		#define DEVTEMPLATE_NAME      "Konami 033906"
168		#define DEVTEMPLATE_FAMILY      "Konami PCI Bridge 033906"
169		#include "devtempl.h"
170
171
172		DEFINE_LEGACY_DEVICE(K033906, k033906);

src/emu/machine/6526cia.c

r8962	r8963
507	507
508	508
509	509	/*-------------------------------------------------
510		cnt_w
	510	cnt_w
511	511	-------------------------------------------------*/
512	512
513	513	void mos6526_device::cnt_w(UINT8 state)

src/emu/machine/74123.c

r8962	r8963
172	172
173	173
174	174	/*-------------------------------------------------
175		TIMER_CALLBACK( output_callback )
	175	TIMER_CALLBACK( output_callback )
176	176	-------------------------------------------------*/
177	177
178	178	TIMER_CALLBACK( ttl74123_device::output_callback )

src/emu/machine/timekpr.h

r8962	r8963
3	3	timekpr.h
4	4
5	5	Various ST Microelectronics timekeeper SRAM implementations:
6		- M48T02
7		- M48T35
8		- M48T58
9		- MK48T08
	6	- M48T02
	7	- M48T35
	8	- M48T58
	9	- MK48T08
10	10
11	11	***************************************************************************/
12	12
r8962	r8963
16	16	#define __TIMEKPR_H__
17	17
18	18	#include "emu.h"
	19	#include "devhelpr.h"
19	20
20	21
21	22
r8962	r8963
137	138	int m_offset_flags;
138	139	};
139	140
	141	GENERIC_DEVICE_DERIVED_CONFIG(timekeeper, m48t02)
	142	GENERIC_DEVICE_DERIVED_CONFIG(timekeeper, m48t35)
	143	GENERIC_DEVICE_DERIVED_CONFIG(timekeeper, m48t58)
	144	GENERIC_DEVICE_DERIVED_CONFIG(timekeeper, mk48t08)
140	145
141		// ======================> m48t02_device_config
142
143		class m48t02_device_config : public timekeeper_device_config
144		{
145		friend class mt48t02_device;
146
147		m48t02_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
148
149		public:
150		// allocators
151		static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
152		virtual device_t *alloc_device(running_machine &machine) const;
153		};
154
155
156		// ======================> m48t02_device
157
158		class m48t02_device : public timekeeper_device
159		{
160		friend class timekeeper_device;
161		friend class m48t02_device_config;
162
163		// construction/destruction
164		m48t02_device(running_machine &_machine, const m48t02_device_config &config);
165
166		protected:
167		// device-level overrides
168		virtual void device_start();
169		};
170
171
172		// ======================> m48t35_device_config
173
174		class m48t35_device_config : public timekeeper_device_config
175		{
176		friend class m48t35_device;
177		friend class timekeeper_device_config;
178
179		m48t35_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
180
181		public:
182		// allocators
183		static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
184		virtual device_t *alloc_device(running_machine &machine) const;
185		};
186
187
188		// ======================> m48t35_device
189
190		class m48t35_device : public timekeeper_device
191		{
192		friend class m48t35_device_config;
193
194		// construction/destruction
195		m48t35_device(running_machine &_machine, const m48t35_device_config &config);
196
197		protected:
198		// device-level overrides
199		virtual void device_start();
200		};
201
202
203		// ======================> m48t58_device_config
204
205		class m48t58_device_config : public timekeeper_device_config
206		{
207		friend class m48t58_device;
208		friend class timekeeper_device_config;
209
210		m48t58_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
211
212		public:
213		// allocators
214		static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
215		virtual device_t *alloc_device(running_machine &machine) const;
216		};
217
218
219		// ======================> m48t58_device
220
221		class m48t58_device : public timekeeper_device
222		{
223		friend class m48t58_device_config;
224
225		// construction/destruction
226		m48t58_device(running_machine &_machine, const m48t58_device_config &config);
227
228		protected:
229		// device-level overrides
230		virtual void device_start();
231		};
232
233
234		// ======================> mk48t08_device_config
235
236		class mk48t08_device_config : public timekeeper_device_config
237		{
238		friend class mk48t08_device;
239		friend class timekeeper_device_config;
240
241		mk48t08_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
242
243		public:
244		// allocators
245		static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
246		virtual device_t *alloc_device(running_machine &machine) const;
247		};
248
249
250		// ======================> mk48t08_device
251
252		class mk48t08_device : public timekeeper_device
253		{
254		friend class mk48t08_device_config;
255
256		// construction/destruction
257		mk48t08_device(running_machine &_machine, const mk48t08_device_config &config);
258
259		protected:
260		// device-level overrides
261		virtual void device_start();
262		};
263
264
265	146	// device type definition
266	147	extern const device_type M48T02;
267	148	extern const device_type M48T35;

src/emu/machine/k033906.h

r8962	r8963
4	4
5	5	***************************************************************************/
6	6
	7	#pragma once
	8
7	9	#ifndef __K033906_H__
8	10	#define __K033906_H__
9	11
10		#include "devlegcy.h"
	12	#include "emu.h"
11	13
12	14
	15
13	16	/***************************************************************************
	17	DEVICE CONFIGURATION MACROS
	18	***************************************************************************/
	19
	20	#define MDRV_K033906_ADD(_tag, _config) \
	21	MDRV_DEVICE_ADD(_tag, K033906, 0) \
	22	MDRV_DEVICE_CONFIG(_config)
	23
	24
	25	/***************************************************************************
14	26	TYPE DEFINITIONS
15	27	***************************************************************************/
16	28
17		typedef struct _k033906_interface k033906_interface;
18		struct _k033906_interface
	29
	30	// ======================> k033906_interface
	31
	32	struct k033906_interface
19	33	{
20		const char         *voodoo;
	34	const char         *m_voodoo_tag;
21	35	};
22	36
23		DECLARE_LEGACY_DEVICE(K033906, k033906);
24	37
25	38
26		/***************************************************************************
27		MACROS / CONSTANTS
28		***************************************************************************/
	39	// ======================> k033906_device_config
29	40
30		#define MDRV_K033906_ADD(_tag, _config) \
31		MDRV_DEVICE_ADD(_tag, K033906, 0) \
32		MDRV_DEVICE_CONFIG(_config)
	41	class k033906_device_config : public device_config,
	42	public k033906_interface
	43	{
	44	friend class k033906_device;
33	45
	46	// construction/destruction
	47	k033906_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
34	48
	49	public:
	50	// allocators
	51	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	52	virtual device_t *alloc_device(running_machine &machine) const;
	53
	54	protected:
	55	// device_config overrides
	56	virtual void device_config_complete();
	57	};
	58
	59
	60
	61	// ======================> k033906_device
	62
	63	class k033906_device :  public device_t
	64	{
	65	friend class k033906_device_config;
	66
	67	// construction/destruction
	68	k033906_device(running_machine &_machine, const k033906_device_config &_config);
	69
	70	public:
	71
	72	UINT32 k033906_r(UINT32 offset);
	73	void k033906_w(UINT32 offset, UINT32 data, UINT32 mem_mask);
	74	void k033906_set_reg(UINT8 state);
	75
	76	protected:
	77	// device-level overrides
	78	virtual void device_start();
	79	virtual void device_reset() { }
	80	virtual void device_post_load() { }
	81	virtual void device_clock_changed() { }
	82
	83	private:
	84
	85	UINT32 k033906_reg_r(int reg);
	86	void k033906_reg_w(int reg, UINT32 data);
	87
	88	/* i/o lines */
	89	UINT32 *     m_reg;
	90	UINT32 *     m_ram;
	91
	92	int          m_reg_set;   // 1 = access reg / 0 = access ram
	93
	94	running_device *m_voodoo;
	95
	96	const k033906_device_config &m_config;
	97	};
	98
	99
	100	// device type definition
	101	extern const device_type K033906;
	102
	103
	104
35	105	/***************************************************************************
36		DEVICE I/O FUNCTIONS
	106	PROTOTYPES
37	107	***************************************************************************/
38	108
39	109	extern READ32_DEVICE_HANDLER( k033906_r );

src/emu/machine/6821pia.c

r8962	r8963
35	35	#define C2_INPUT(c)            (!(((c) >> 5) & 0x01))
36	36
37	37
38		/***************************************************************************
39		IMPLEMENTATION
40		***************************************************************************/
41
42	38	//**************************************************************************
43	39	//  DEVICE CONFIGURATION
44	40	//**************************************************************************
r8962	r8963
48	44	//-------------------------------------------------
49	45
50	46	pia6821_device_config::pia6821_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
51		: device_config(mconfig, static_alloc_device_config, "PIA6821", tag, owner, clock)
	47	: device_config(mconfig, static_alloc_device_config, "6822 PIA", tag, owner, clock)
52	48	{
53	49	}
54	50
r8962	r8963
85	81	// inherit a copy of the static data
86	82	const pia6821_interface *intf = reinterpret_cast<const pia6821_interface *>(static_config());
87	83	if (intf != NULL)
	84	{
88	85	*static_cast<pia6821_interface *>(this) = *intf;
	86	}
89	87
90	88	// or initialize to defaults if none provided
91	89	else

src/emu/machine/6532riot.c

r8962	r8963
40	40	//-------------------------------------------------
41	41
42	42	riot6532_device_config::riot6532_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
43		: device_config(mconfig, static_alloc_device_config, "RIOT6532", tag, owner, clock)
	43	: device_config(mconfig, static_alloc_device_config, "6532 (RIOT)", tag, owner, clock)
44	44	{
45	45	}
46	46

src/emu/machine/6522via.c

r8962	r8963
24	24
25	25	#include "emu.h"
26	26	#include "6522via.h"
	27	#include "devhelpr.h"
27	28
28
29	29	/***************************************************************************
30	30	PARAMETERS
31	31	***************************************************************************/
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109	109	//  DEVICE CONFIGURATION
110	110	//**************************************************************************
111	111
112		//-------------------------------------------------
113		//  via6522_device_config - constructor
114		//-------------------------------------------------
	112	GENERIC_DEVICE_CONFIG_SETUP(via6522, "6522 VIA")
115	113
116		via6522_device_config::via6522_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
117		: device_config(mconfig, static_alloc_device_config, "VIA6522", tag, owner, clock)
118		{
119		}
120
121
122	114	//-------------------------------------------------
123		//  static_alloc_device_config - allocate a new
124		//  configuration object
125		//-------------------------------------------------
126
127		device_config *via6522_device_config::static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
128		{
129		return global_alloc(via6522_device_config(mconfig, tag, owner, clock));
130		}
131
132
133		//-------------------------------------------------
134		//  alloc_device - allocate a new device object
135		//-------------------------------------------------
136
137		device_t *via6522_device_config::alloc_device(running_machine &machine) const
138		{
139		return auto_alloc(&machine, via6522_device(machine, *this));
140		}
141
142
143		//-------------------------------------------------
144	115	//  device_config_complete - perform any
145	116	//  operations now that the configuration is
146	117	//  complete
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523	494	via_r - CPU interface for VIA read
524	495	-------------------------------------------------*/
525	496
526		UINT8 via6522_device::reg_r(UINT8 offset)
	497	READ8_DEVICE_HANDLER_TRAMPOLINE(via6522, via_r)
527	498	{
528	499	int val = 0;
529	500
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718	689	via_w - CPU interface for VIA write
719	690	-------------------------------------------------*/
720	691
721		void via6522_device::reg_w(UINT8 offset, UINT8 data)
	692	WRITE8_DEVICE_HANDLER_TRAMPOLINE(via6522, via_w)
722	693	{
723	694	offset &=0x0f;
724	695
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988	959	ca1_w - interface setting VIA port CA1 input
989	960	-------------------------------------------------*/
990	961
991		void via6522_device::ca1_w(UINT8 state)
	962	//void via6522_device::via_ca1_w(UINT8 state)
	963	WRITE_LINE_DEVICE_HANDLER_TRAMPOLINE(via6522, via_ca1_w)
992	964	{
993	965	/* handle the active transition */
994	966	if (state != m_in_ca1)
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1036	1008	ca2_w - interface setting VIA port CA2 input
1037	1009	-------------------------------------------------*/
1038	1010
1039		void via6522_device::ca2_w(UINT8 state)
	1011	//void via6522_device::via_ca2_w(UINT8 state)
	1012	WRITE_LINE_DEVICE_HANDLER_TRAMPOLINE(via6522, via_ca2_w)
1040	1013	{
1041	1014	/* CA2 is in input mode */
1042	1015	if (CA2_INPUT(m_pcr))
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1061	1034	cb1_w - interface setting VIA port CB1 input
1062	1035	-------------------------------------------------*/
1063	1036
1064		void via6522_device::cb1_w(UINT8 state)
	1037	//void via6522_device::via_cb1_w(UINT8 state)
	1038	WRITE_LINE_DEVICE_HANDLER_TRAMPOLINE(via6522, via_cb1_w)
1065	1039	{
1066	1040	/* handle the active transition */
1067	1041	if (state != m_in_cb1)
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1109	1083	cb2_w - interface setting VIA port CB2 input
1110	1084	-------------------------------------------------*/
1111	1085
1112		void via6522_device::cb2_w(UINT8 state)
	1086	//void via6522_device::via_cb2_w(UINT8 state)
	1087	WRITE_LINE_DEVICE_HANDLER_TRAMPOLINE(via6522, via_cb2_w)
1113	1088	{
1114	1089	/* CB2 is in input mode */
1115	1090	if (CB2_INPUT(m_pcr))
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1135	1110	TRAMPOLINES
1136	1111	***************************************************************************/
1137	1112
1138		READ8_DEVICE_HANDLER(via_r) { return downcast<via6522_device *>(device)->reg_r(offset); }
1139		WRITE8_DEVICE_HANDLER(via_w) { downcast<via6522_device *>(device)->reg_w(offset, data); }
1140
1141		READ_LINE_DEVICE_HANDLER(via_ca1_r) { return downcast<via6522_device *>(device)->ca1_r(); }
1142		WRITE_LINE_DEVICE_HANDLER(via_ca1_w) { downcast<via6522_device *>(device)->ca1_w(state); }
1143
1144		READ_LINE_DEVICE_HANDLER(via_ca2_r) { return downcast<via6522_device *>(device)->ca2_r(); }
1145		WRITE_LINE_DEVICE_HANDLER(via_ca2_w) { downcast<via6522_device *>(device)->ca2_w(state); }
1146
1147		READ_LINE_DEVICE_HANDLER(via_cb1_r) { return downcast<via6522_device *>(device)->cb1_r(); }
1148		WRITE_LINE_DEVICE_HANDLER(via_cb1_w) { downcast<via6522_device *>(device)->cb1_w(state); }
1149
1150		READ_LINE_DEVICE_HANDLER(via_cb2_r) { return downcast<via6522_device *>(device)->cb2_r(); }
1151		WRITE_LINE_DEVICE_HANDLER(via_cb2_w) { downcast<via6522_device *>(device)->cb2_w(state); }
1152
1153		WRITE8_DEVICE_HANDLER(via_porta_w) { downcast<via6522_device *>(device)->porta_w(data); }
1154
1155		READ8_DEVICE_HANDLER(via_portb_r) { return downcast<via6522_device *>(device)->portb_r(); }
1156		WRITE8_DEVICE_HANDLER(via_portb_w) { downcast<via6522_device *>(device)->portb_w(data); }
	1113	READ_LINE_DEVICE_HANDLER(via_ca1_r) { return downcast<via6522_device *>(device)->via_ca1_r(); }
	1114	READ_LINE_DEVICE_HANDLER(via_ca2_r) { return downcast<via6522_device *>(device)->via_ca2_r(); }
	1115	READ_LINE_DEVICE_HANDLER(via_cb1_r) { return downcast<via6522_device *>(device)->via_cb1_r(); }
	1116	READ_LINE_DEVICE_HANDLER(via_cb2_r) { return downcast<via6522_device *>(device)->via_cb2_r(); }
	1117	WRITE8_DEVICE_HANDLER(via_porta_w) { downcast<via6522_device *>(device)->via_porta_w(data); }
	1118	READ8_DEVICE_HANDLER(via_portb_r) { return downcast<via6522_device *>(device)->via_portb_r(); }
	1119	WRITE8_DEVICE_HANDLER(via_portb_w) { downcast<via6522_device *>(device)->via_portb_w(data); }

src/emu/machine/6522via.h

r8962	r8963
77	77	};
78	78
79	79
80
81	80	// ======================> via6522_device_config
82	81
83	82	class via6522_device_config :   public device_config,
r8962	r8963
99	98	};
100	99
101	100
102
103	101	// ======================> via6522_device
104	102
105	103	class via6522_device :  public device_t
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111	109	via6522_device(running_machine &_machine, const via6522_device_config &_config);
112	110
113	111	public:
114		UINT8 reg_r(UINT8 offset);
115		void reg_w(UINT8 offset, UINT8 data);
	112	UINT8 via_r(UINT32 offset);
	113	void via_w(UINT32 offset, UINT8 data);
116	114
117		void porta_w(UINT8 data) { m_in_a = data; }
	115	void via_porta_w(UINT8 data) { m_in_a = data; }
118	116
119		UINT8 portb_r() { return m_in_b; }
120		void portb_w(UINT8 data) { m_in_b = data; }
	117	UINT8 via_portb_r() { return m_in_b; }
	118	void via_portb_w(UINT8 data) { m_in_b = data; }
121	119
122		UINT8 ca1_r() { return m_in_ca1; }
123		void ca1_w(UINT8 data);
	120	UINT8 via_ca1_r() { return m_in_ca1; }
	121	void via_ca1_w(UINT8 data);
124	122
125		UINT8 ca2_r() { return m_in_ca2; }
126		void ca2_w(UINT8 data);
	123	UINT8 via_ca2_r() { return m_in_ca2; }
	124	void via_ca2_w(UINT8 data);
127	125
128		UINT8 cb1_r() { return m_in_cb1; }
129		void cb1_w(UINT8 data);
	126	UINT8 via_cb1_r() { return m_in_cb1; }
	127	void via_cb1_w(UINT8 data);
130	128
131		UINT8 cb2_r() { return m_in_cb2; }
132		void cb2_w(UINT8 data);
	129	UINT8 via_cb2_r() { return m_in_cb2; }
	130	void via_cb2_w(UINT8 data);
133	131
134	132	protected:
135	133	// device-level overrides

src/emu/machine/7474.c

r8962	r8963
49	49	//-------------------------------------------------
50	50
51	51	ttl7474_device_config::ttl7474_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
52		: device_config(mconfig, static_alloc_device_config, "TTL7474", tag, owner, clock)
	52	: device_config(mconfig, static_alloc_device_config, "7474", tag, owner, clock)
53	53	{
54	54	}
55	55
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76	76
77	77
78	78	//-------------------------------------------------
79		//  static_set_target_tag - configuration helper
	79	//  static_set_target_tag - configuration helper
80	80	//  to set the target tag
81	81	//-------------------------------------------------
82	82
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107	107
108	108
109	109	//-------------------------------------------------
110		//  static_set_comp_output_cb - configuration
	110	//  static_set_comp_output_cb - configuration
111	111	//  helper to set the comp. output callback
112	112	//-------------------------------------------------
113	113
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176	176
177	177	void ttl7474_device::update()
178	178	{
179		if (!m_preset && m_clear)             /* line 1 in truth table */
	179	if (!m_preset && m_clear)          /* line 1 in truth table */
180	180	{
181	181	m_output    = 1;
182	182	m_output_comp = 0;
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191	191	m_output    = 1;
192	192	m_output_comp = 1;
193	193	}
194		else if (!m_last_clock && m_clk)     /* line 4 in truth table */
	194	else if (!m_last_clock && m_clk)   /* line 4 in truth table */
195	195	{
196	196	m_output    =  m_d;
197	197	m_output_comp = !m_d;

src/emu/machine/7474.h

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139	139	/* inputs */
140	140	UINT8 m_clear;              /* pin 1/13 */
141	141	UINT8 m_preset;             /* pin 4/10 */
142		UINT8 m_clk;                 /* pin 3/11 */
	142	UINT8 m_clk;               /* pin 3/11 */
143	143	UINT8 m_d;                  /* pin 2/12 */
144	144
145	145	/* outputs */
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173	173	READ_LINE_DEVICE_HANDLER( ttl7474_output_comp_r );    /* NOT strictly the same as !ttl7474_output_r() */
174	174
175	175
176		#endif /* __TTL7474_H__ */
		No newline at end of file
	176	#endif /* __TTL7474_H__ */

src/emu/machine/6840ptm.c

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61	61	IMPLEMENTATION
62	62	***************************************************************************/
63	63
64		GENERIC_DEVICE_CONFIG_SETUP(ptm6840, "PTM6840")
	64	GENERIC_DEVICE_CONFIG_SETUP(ptm6840, "6840 PTM")
65	65
66	66	const device_type PTM6840 = ptm6840_device_config::static_alloc_device_config;
67	67

src/emu/machine/ins8154.c

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11	11
12	12	#include "emu.h"
13	13	#include "ins8154.h"
	14	#include "devhelpr.h"
14	15
15	16
16	17	/***************************************************************************
r8962	r8963
30	31
31	32
32	33	/***************************************************************************
33		TYPE DEFINITIONS
	34	IMPLEMENTATION
34	35	***************************************************************************/
35	36
36		typedef struct _ins8154_state ins8154_state;
37		struct _ins8154_state
	37	//**************************************************************************
	38	//  DEVICE CONFIGURATION
	39	//**************************************************************************
	40
	41	GENERIC_DEVICE_CONFIG_SETUP(ins8154, "INS8154")
	42
	43	//-------------------------------------------------
	44	//  device_config_complete - perform any
	45	//  operations now that the configuration is
	46	//  complete
	47	//-------------------------------------------------
	48
	49	void ins8154_device_config::device_config_complete()
38	50	{
39		/* i/o lines */
40		devcb_resolved_read8 in_a_func;
41		devcb_resolved_write8 out_a_func;
42		devcb_resolved_read8 in_b_func;
43		devcb_resolved_write8 out_b_func;
44		devcb_resolved_write_line out_irq_func;
	51	// inherit a copy of the static data
	52	const ins8154_interface *intf = reinterpret_cast<const ins8154_interface *>(static_config());
	53	if (intf != NULL)
	54	{
	55	*static_cast<ins8154_interface *>(this) = *intf;
	56	}
45	57
46		/* registers */
47		UINT8 in_a;  /* Input Latch Port A */
48		UINT8 in_b;  /* Input Latch Port B */
49		UINT8 out_a; /* Output Latch Port A */
50		UINT8 out_b; /* Output Latch Port B */
51		UINT8 mdr;   /* Mode Definition Register */
52		UINT8 odra;  /* Output Definition Register Port A */
53		UINT8 odrb;  /* Output Definition Register Port B */
54		};
	58	// or initialize to defaults if none provided
	59	else
	60	{
	61	memset(&m_in_a_func, 0, sizeof(m_in_a_func));
	62	memset(&m_in_b_func, 0, sizeof(m_in_b_func));
	63	memset(&m_out_a_func, 0, sizeof(m_out_a_func));
	64	memset(&m_out_b_func, 0, sizeof(m_out_b_func));
	65	memset(&m_out_irq_func, 0, sizeof(m_out_irq_func));
	66	}
	67	}
55	68
56	69
57		/*****************************************************************************
58		INLINE FUNCTIONS
59		*****************************************************************************/
60	70
61		INLINE ins8154_state *get_safe_token(running_device *device)
	71	//**************************************************************************
	72	//  LIVE DEVICE
	73	//**************************************************************************
	74
	75	const device_type INS8154 = ins8154_device_config::static_alloc_device_config;
	76
	77	//-------------------------------------------------
	78	//  ins8154_device - constructor
	79	//-------------------------------------------------
	80
	81	ins8154_device::ins8154_device(running_machine &_machine, const ins8154_device_config &config)
	82	: device_t(_machine, config),
	83	m_config(config)
62	84	{
63		assert(device != NULL);
64		assert(device->type() == INS8154);
65	85
66		return (ins8154_state *)downcast<legacy_device_base *>(device)->token();
67	86	}
68	87
	88	//-------------------------------------------------
	89	//  device_start - device-specific startup
	90	//-------------------------------------------------
69	91
70		/***************************************************************************
71		IMPLEMENTATION
72		***************************************************************************/
	92	void ins8154_device::device_start()
	93	{
	94	/* resolve callbacks */
	95	devcb_resolve_read8(&m_in_a_func, &m_config.m_in_a_func, this);
	96	devcb_resolve_write8(&m_out_a_func, &m_config.m_out_a_func, this);
	97	devcb_resolve_read8(&m_in_b_func, &m_config.m_in_b_func, this);
	98	devcb_resolve_write8(&m_out_b_func, &m_config.m_out_b_func, this);
	99	devcb_resolve_write_line(&m_out_irq_func, &m_config.m_out_irq_func, this);
73	100
74		READ8_DEVICE_HANDLER( ins8154_r )
	101	/* register for state saving */
	102	state_save_register_device_item(this, 0, m_in_a);
	103	state_save_register_device_item(this, 0, m_in_b);
	104	state_save_register_device_item(this, 0, m_out_a);
	105	state_save_register_device_item(this, 0, m_out_b);
	106	state_save_register_device_item(this, 0, m_mdr);
	107	state_save_register_device_item(this, 0, m_odra);
	108	state_save_register_device_item(this, 0, m_odrb);
	109	}
	110
	111
	112	//-------------------------------------------------
	113	//  device_reset - device-specific reset
	114	//-------------------------------------------------
	115
	116	void ins8154_device::device_reset()
75	117	{
76		ins8154_state *ins8154 = get_safe_token(device);
	118	m_in_a = 0;
	119	m_in_b = 0;
	120	m_out_a = 0;
	121	m_out_b = 0;
	122	m_mdr = 0;
	123	m_odra = 0;
	124	m_odrb = 0;
	125	}
	126
	127
	128	READ8_DEVICE_HANDLER_TRAMPOLINE(ins8154, ins8154_r)
	129	{
77	130	UINT8 val = 0xff;
78	131
79	132	if (offset > 0x24)
80	133	{
81	134	if (VERBOSE)
82		logerror("%s: INS8154 '%s' Read from invalid offset %02x!\n", cpuexec_describe_context(device->machine), device->tag(), offset);
	135	{
	136	logerror("%s: INS8154 '%s' Read from invalid offset %02x!\n", cpuexec_describe_context(&m_machine), tag(), offset);
	137	}
83	138	return 0xff;
84	139	}
85	140
86	141	switch (offset)
87	142	{
88	143	case 0x20:
89		if (ins8154->in_a_func.read != NULL)
90		val = devcb_call_read8(&ins8154->in_a_func, 0);
91		ins8154->in_a = val;
	144	if(m_in_a_func.read != NULL)
	145	{
	146	val = devcb_call_read8(&m_in_a_func, 0);
	147	}
	148	m_in_a = val;
92	149	break;
93	150
94	151	case 0x21:
95		if (ins8154->in_b_func.read != NULL)
96		val = devcb_call_read8(&ins8154->in_b_func, 0);
97		ins8154->in_b = val;
	152	if(m_in_b_func.read != NULL)
	153	{
	154	val = devcb_call_read8(&m_in_b_func, 0);
	155	}
	156	m_in_b = val;
98	157	break;
99	158
100	159	default:
101	160	if (offset < 0x08)
102	161	{
103		if (ins8154->in_a_func.read != NULL)
104		val = (devcb_call_read8(&ins8154->in_a_func, 0) << (8 - offset)) & 0x80;
105		ins8154->in_a = val;
	162	if(m_in_a_func.read != NULL)
	163	{
	164	val = (devcb_call_read8(&m_in_a_func, 0) << (8 - offset)) & 0x80;
	165	}
	166	m_in_a = val;
106	167	}
107	168	else
108	169	{
109		if (ins8154->in_b_func.read != NULL)
110		val = (devcb_call_read8(&ins8154->in_b_func, 0) << (8 - (offset >> 4))) & 0x80;
111		ins8154->in_b = val;
	170	if(m_in_b_func.read != NULL)
	171	{
	172	val = (devcb_call_read8(&m_in_b_func, 0) << (8 - (offset >> 4))) & 0x80;
	173	}
	174	m_in_b = val;
112	175	}
113	176	break;
114	177	}
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116	179	return val;
117	180	}
118	181
119		WRITE8_DEVICE_HANDLER( ins8154_porta_w )
	182	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ins8154, ins8154_porta_w)
120	183	{
121		ins8154_state *ins8154 = get_safe_token(device);
	184	m_out_a = data;
122	185
123		ins8154->out_a = data;
124
125	186	/* Test if any pins are set as outputs */
126		if (ins8154->odra)
127		devcb_call_write8(&ins8154->out_a_func, 0, (data & ins8154->odra) | (ins8154->odra ^ 0xff));
	187	if (m_odra)
	188	{
	189	devcb_call_write8(&m_out_a_func, 0, (data & m_odra) | (m_odra ^ 0xff));
	190	}
128	191	}
129	192
130		WRITE8_DEVICE_HANDLER( ins8154_portb_w )
	193	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ins8154, ins8154_portb_w)
131	194	{
132		ins8154_state *ins8154 = get_safe_token(device);
	195	m_out_b = data;
133	196
134		ins8154->out_b = data;
135
136	197	/* Test if any pins are set as outputs */
137		if (ins8154->odrb)
138		devcb_call_write8(&ins8154->out_b_func, 0, (data & ins8154->odrb) | (ins8154->odrb ^ 0xff));
	198	if (m_odrb)
	199	{
	200	devcb_call_write8(&m_out_b_func, 0, (data & m_odrb) | (m_odrb ^ 0xff));
	201	}
139	202	}
140	203
141		WRITE8_DEVICE_HANDLER( ins8154_w )
	204	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ins8154, ins8154_w)
142	205	{
143		ins8154_state *ins8154 = get_safe_token(device);
144
145	206	if (offset > 0x24)
146	207	{
147	208	if (VERBOSE)
148		logerror("%s: INS8154 '%s' Write %02x to invalid offset %02x!\n", cpuexec_describe_context(device->machine), device->tag(), data, offset);
	209	{
	210	logerror("%s: INS8154 '%s' Write %02x to invalid offset %02x!\n", cpuexec_describe_context(&m_machine), tag(), data, offset);
	211	}
149	212	return;
150	213	}
151	214
152	215	switch (offset)
153	216	{
154	217	case 0x20:
155		ins8154_porta_w(device, 0, data);
	218	ins8154_porta_w(0, data);
156	219	break;
157	220
158	221	case 0x21:
159		ins8154_portb_w(device, 0, data);
	222	ins8154_portb_w(0, data);
160	223	break;
161	224
162	225	case 0x22:
163	226	if (VERBOSE)
164		logerror("%s: INS8154 '%s' ODRA set to %02x\n", cpuexec_describe_context(device->machine), device->tag(), data);
	227	{
	228	logerror("%s: INS8154 '%s' ODRA set to %02x\n", cpuexec_describe_context(&m_machine), tag(), data);
	229	}
165	230
166		ins8154->odra = data;
	231	m_odra = data;
167	232	break;
168	233
169	234	case 0x23:
170	235	if (VERBOSE)
171		logerror("%s: INS8154 '%s' ODRB set to %02x\n", cpuexec_describe_context(device->machine), device->tag(), data);
	236	{
	237	logerror("%s: INS8154 '%s' ODRB set to %02x\n", cpuexec_describe_context(&m_machine), tag(), data);
	238	}
172	239
173		ins8154->odrb = data;
	240	m_odrb = data;
174	241	break;
175	242
176	243	case 0x24:
177	244	if (VERBOSE)
178		logerror("%s: INS8154 '%s' MDR set to %02x\n", cpuexec_describe_context(device->machine), device->tag(), data);
	245	{
	246	logerror("%s: INS8154 '%s' MDR set to %02x\n", cpuexec_describe_context(&m_machine), tag(), data);
	247	}
179	248
180		ins8154->mdr = data;
	249	m_mdr = data;
181	250	break;
182	251
183	252	default:
r8962	r8963
186	255	/* Set bit */
187	256	if (offset < 0x08)
188	257	{
189		ins8154_porta_w(device, 0, ins8154->out_a |= offset & 0x07);
	258	ins8154_porta_w(0, m_out_a |= offset & 0x07);
190	259	}
191	260	else
192	261	{
193		ins8154_portb_w(device, 0, ins8154->out_b |= (offset >> 4) & 0x07);
	262	ins8154_portb_w(0, m_out_b |= (offset >> 4) & 0x07);
194	263	}
195	264	}
196	265	else
r8962	r8963
198	267	/* Clear bit */
199	268	if (offset < 0x08)
200	269	{
201		ins8154_porta_w(device, 0, ins8154->out_a & ~(offset & 0x07));
	270	ins8154_porta_w(0, m_out_a & ~(offset & 0x07));
202	271	}
203	272	else
204	273	{
205		ins8154_portb_w(device, 0, ins8154->out_b & ~((offset >> 4) & 0x07));
	274	ins8154_portb_w(0, m_out_b & ~((offset >> 4) & 0x07));
206	275	}
207	276	}
208	277
209	278	break;
210	279	}
211	280	}
212
213
214		/*****************************************************************************
215		DEVICE INTERFACE
216		*****************************************************************************/
217
218		static DEVICE_START( ins8154 )
219		{
220		ins8154_state *ins8154 = get_safe_token(device);
221		const ins8154_interface *intf = (const ins8154_interface *)device->baseconfig().static_config();
222
223		/* validate some basic stuff */
224		assert(intf != NULL);
225
226		/* resolve callbacks */
227		devcb_resolve_read8(&ins8154->in_a_func, &intf->in_a_func, device);
228		devcb_resolve_write8(&ins8154->out_a_func, &intf->out_a_func, device);
229		devcb_resolve_read8(&ins8154->in_b_func, &intf->in_b_func, device);
230		devcb_resolve_write8(&ins8154->out_b_func, &intf->out_b_func, device);
231		devcb_resolve_write_line(&ins8154->out_irq_func, &intf->out_irq_func, device);
232
233		/* register for state saving */
234		state_save_register_device_item(device, 0, ins8154->in_a);
235		state_save_register_device_item(device, 0, ins8154->in_b);
236		state_save_register_device_item(device, 0, ins8154->out_a);
237		state_save_register_device_item(device, 0, ins8154->out_b);
238		state_save_register_device_item(device, 0, ins8154->mdr);
239		state_save_register_device_item(device, 0, ins8154->odra);
240		state_save_register_device_item(device, 0, ins8154->odrb);
241		}
242
243		static DEVICE_RESET( ins8154 )
244		{
245		ins8154_state *ins8154 = get_safe_token(device);
246
247		ins8154->in_a = 0;
248		ins8154->in_b = 0;
249		ins8154->out_a = 0;
250		ins8154->out_b = 0;
251		ins8154->mdr = 0;
252		ins8154->odra = 0;
253		ins8154->odrb = 0;
254		}
255
256
257		/***************************************************************************
258		DEVICE GETINFO
259		***************************************************************************/
260
261		static const char DEVTEMPLATE_SOURCE[] = __FILE__;
262
263		#define DEVTEMPLATE_ID(p,s)            p##ins8154##s
264		#define DEVTEMPLATE_FEATURES         DT_HAS_START | DT_HAS_RESET
265		#define DEVTEMPLATE_NAME            "INS8154"
266		#define DEVTEMPLATE_FAMILY            "INS8154"
267		#define DEVTEMPLATE_VERSION            "1.1"
268		#define DEVTEMPLATE_CREDITS            "Copyright MESS Team"
269		#include "devtempl.h"
270
271
272		DEFINE_LEGACY_DEVICE(INS8154, ins8154);

src/emu/machine/8255ppi.c

r8962	r8963
98	98	//  DEVICE CONFIGURATION
99	99	//**************************************************************************
100	100
101		GENERIC_DEVICE_CONFIG_SETUP(ppi8255, "PPI8255")
	101	GENERIC_DEVICE_CONFIG_SETUP(ppi8255, "Intel PPI8255")
102	102
103	103	//-------------------------------------------------
104	104	//  device_config_complete - perform any

src/emu/machine/ds1302.c

r8962	r8963
22	22
23	23	#include "emu.h"
24	24	#include "ds1302.h"
	25	#include "devhelpr.h"
25	26
26	27
27	28	/***************************************************************************
28		TYPE DEFINITIONS
	29	INLINE FUNCTIONS
29	30	***************************************************************************/
30	31
31		typedef struct _ds1302_state ds1302_state;
32		struct _ds1302_state
	32	INLINE UINT8 convert_to_bcd(int val)
33	33	{
	34	return ((val / 10) << 4) | (val % 10);
	35	}
34	36
35		UINT32 shift_in;
36		UINT8  shift_out;
37		UINT8  icount;
38		UINT8  last_clk;
39		UINT8  last_cmd;
40		UINT8  sram[0x20];
41		};
42	37
43	38	/***************************************************************************
44		INLINE FUNCTIONS
	39	IMPLEMENTATION
45	40	***************************************************************************/
46	41
47		INLINE ds1302_state *get_safe_token(running_device *device)
	42	//**************************************************************************
	43	//  DEVICE CONFIGURATION
	44	//**************************************************************************
	45
	46	//-------------------------------------------------
	47	//  ds1302_device_config - constructor
	48	//-------------------------------------------------
	49
	50	ds1302_device_config::ds1302_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
	51	: device_config(mconfig, static_alloc_device_config, "Dallas DS1302 RTC", tag, owner, clock)
48	52	{
49		assert(device != NULL);
50		assert(device->type() == DS1302);
51		return (ds1302_state *)downcast<legacy_device_base *>(device)->token();
52	53	}
53	54
54		INLINE UINT8 convert_to_bcd(int val)
	55
	56	//-------------------------------------------------
	57	//  static_alloc_device_config - allocate a new
	58	//  configuration object
	59	//-------------------------------------------------
	60
	61	device_config *ds1302_device_config::static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
55	62	{
56		return ((val / 10) << 4) | (val % 10);
	63	return global_alloc(ds1302_device_config(mconfig, tag, owner, clock));
57	64	}
58	65
59	66
60		/***************************************************************************
61		IMPLEMENTATION
62		***************************************************************************/
	67	//-------------------------------------------------
	68	//  alloc_device - allocate a new device object
	69	//-------------------------------------------------
63	70
	71	device_t *ds1302_device_config::alloc_device(running_machine &machine) const
	72	{
	73	return auto_alloc(&machine, ds1302_device(machine, *this));
	74	}
	75
	76
	77	//**************************************************************************
	78	//  LIVE DEVICE
	79	//**************************************************************************
	80
	81	const device_type DS1302 = ds1302_device_config::static_alloc_device_config;
	82
	83	//-------------------------------------------------
	84	//  ds1302_device - constructor
	85	//-------------------------------------------------
	86
	87	ds1302_device::ds1302_device(running_machine &_machine, const ds1302_device_config &config)
	88	: device_t(_machine, config),
	89	m_config(config)
	90	{
	91
	92	}
	93
	94	//-------------------------------------------------
	95	//  device_start - device-specific startup
	96	//-------------------------------------------------
	97
	98	void ds1302_device::device_start()
	99	{
	100	state_save_register_device_item(this, 0, m_shift_in);
	101	state_save_register_device_item(this, 0, m_shift_out);
	102	state_save_register_device_item(this, 0, m_icount);
	103	state_save_register_device_item(this, 0, m_last_clk);
	104	state_save_register_device_item(this, 0, m_last_cmd);
	105	state_save_register_device_item_array(this, 0, m_sram);
	106	}
	107
	108
	109	//-------------------------------------------------
	110	//  device_reset - device-specific reset
	111	//-------------------------------------------------
	112
	113	void ds1302_device::device_reset()
	114	{
	115	m_shift_in  = 0;
	116	m_shift_out = 0;
	117	m_icount    = 0;
	118	m_last_clk  = 0;
	119	m_last_cmd  = 0;
	120	}
	121
	122
64	123	/*-------------------------------------------------
65	124	ds1302_dat_w
66	125	-------------------------------------------------*/
67	126
68		WRITE8_DEVICE_HANDLER( ds1302_dat_w )
	127	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ds1302, ds1302_dat_w)
69	128	{
70		ds1302_state *ds1302 = get_safe_token(device);
71
72	129	if (data)
73		ds1302->shift_in |= (1 << ds1302->icount);
	130	{
	131	m_shift_in |= (1 << m_icount);
	132	}
74	133	else
75		ds1302->shift_in &= ~(1 << ds1302->icount);
	134	{
	135	m_shift_in &= ~(1 << m_icount);
	136	}
76	137	}
77	138
78	139
r8962	r8963
80	141	ds1302_clk_w
81	142	-------------------------------------------------*/
82	143
83		WRITE8_DEVICE_HANDLER( ds1302_clk_w )
	144	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ds1302, ds1302_clk_w)
84	145	{
85		ds1302_state *ds1302 = get_safe_token(device);
86
87		if (data != ds1302->last_clk)
	146	if (data != m_last_clk)
88	147	{
89	148	if (data)   //Rising, shift in command
90	149	{
91		ds1302->icount++;
92		if(ds1302->icount == 8)   //Command start
	150	m_icount++;
	151	if(m_icount == 8)   //Command start
93	152	{
94	153	system_time systime;
95		device->machine->base_datetime(systime);
	154	m_machine.base_datetime(systime);
96	155
97		switch(ds1302->shift_in)
	156	switch(m_shift_in)
98	157	{
99	158	case 0x81:   //Sec
100		ds1302->shift_out = convert_to_bcd(systime.local_time.second);
	159	m_shift_out = convert_to_bcd(systime.local_time.second);
101	160	break;
	161
102	162	case 0x83:   //Min
103		ds1302->shift_out = convert_to_bcd(systime.local_time.minute);
	163	m_shift_out = convert_to_bcd(systime.local_time.minute);
104	164	break;
	165
105	166	case 0x85:   //Hour
106		ds1302->shift_out = convert_to_bcd(systime.local_time.hour);
	167	m_shift_out = convert_to_bcd(systime.local_time.hour);
107	168	break;
	169
108	170	case 0x87:   //Day
109		ds1302->shift_out = convert_to_bcd(systime.local_time.mday);
	171	m_shift_out = convert_to_bcd(systime.local_time.mday);
110	172	break;
	173
111	174	case 0x89:   //Month
112		ds1302->shift_out = convert_to_bcd(systime.local_time.month + 1);
	175	m_shift_out = convert_to_bcd(systime.local_time.month + 1);
113	176	break;
	177
114	178	case 0x8b:   //weekday
115		ds1302->shift_out = convert_to_bcd(systime.local_time.weekday);
	179	m_shift_out = convert_to_bcd(systime.local_time.weekday);
116	180	break;
	181
117	182	case 0x8d:   //Year
118		ds1302->shift_out = convert_to_bcd(systime.local_time.year % 100);
	183	m_shift_out = convert_to_bcd(systime.local_time.year % 100);
119	184	break;
	185
120	186	default:
121		ds1302->shift_out = 0x0;
	187	m_shift_out = 0x0;
122	188	}
123	189
124		if(ds1302->shift_in > 0xc0)
125		ds1302->shift_out = ds1302->sram[(ds1302->shift_in >> 1) & 0x1f];
126		ds1302->last_cmd = ds1302->shift_in & 0xff;
127		ds1302->icount++;
	190	if(m_shift_in > 0xc0)
	191	{
	192	m_shift_out = m_sram[(m_shift_in >> 1) & 0x1f];
	193	}
	194	m_last_cmd = m_shift_in & 0xff;
	195	m_icount++;
128	196	}
129	197
130		if(ds1302->icount == 17 && !(ds1302->last_cmd & 1))
	198	if(m_icount == 17 && !(m_last_cmd & 1))
131	199	{
132		UINT8 val = (ds1302->shift_in >> 9) & 0xff;
	200	UINT8 val = (m_shift_in >> 9) & 0xff;
133	201
134		switch(ds1302->last_cmd)
	202	switch(m_last_cmd)
135	203	{
136	204	case 0x80:   //Sec
	205	break;
137	206
	207	case 0x82:   //Min
138	208	break;
139		case 0x82:   //Min
140	209
	210	case 0x84:   //Hour
141	211	break;
142		case 0x84:   //Hour
143	212
	213	case 0x86:   //Day
144	214	break;
145		case 0x86:   //Day
146	215
	216	case 0x88:   //Month
147	217	break;
148		case 0x88:   //Month
149	218
	219	case 0x8a:   //weekday
150	220	break;
151		case 0x8a:   //weekday
152	221
	222	case 0x8c:   //Year
153	223	break;
154		case 0x8c:   //Year
155	224
156		break;
157	225	default:
158		ds1302->shift_out = 0x0;
	226	m_shift_out = 0x0;
159	227	}
160		if(ds1302->last_cmd > 0xc0)
	228
	229	if(m_last_cmd > 0xc0)
161	230	{
162		ds1302->sram[(ds1302->last_cmd >> 1) & 0x1f] = val;
	231	m_sram[(m_last_cmd >> 1) & 0x1f] = val;
163	232	}
164	233
165	234
r8962	r8963
167	236	}
168	237	}
169	238	}
170		ds1302->last_clk = data;
	239	m_last_clk = data;
171	240	}
172	241
173	242
r8962	r8963
175	244	ds1302_read
176	245	-------------------------------------------------*/
177	246
178		READ8_DEVICE_HANDLER( ds1302_read )
	247	READ8_DEVICE_HANDLER_TRAMPOLINE(ds1302, ds1302_read)
179	248	{
180		ds1302_state *ds1302 = get_safe_token(device);
181		return (ds1302->shift_out & (1 << (ds1302->icount - 9))) ? 1 : 0;
	249	return (m_shift_out & (1 << (m_icount - 9))) ? 1 : 0;
182	250	}
183
184
185		/*-------------------------------------------------
186		DEVICE_START( ds1302 )
187		-------------------------------------------------*/
188
189		static DEVICE_START( ds1302 )
190		{
191		ds1302_state *ds1302 = get_safe_token(device);
192
193		/* register for state saving */
194		state_save_register_device_item(device, 0, ds1302->shift_in);
195		state_save_register_device_item(device, 0, ds1302->shift_out);
196		state_save_register_device_item(device, 0, ds1302->icount);
197		state_save_register_device_item(device, 0, ds1302->last_clk);
198		state_save_register_device_item(device, 0, ds1302->last_cmd);
199		state_save_register_device_item_array(device, 0, ds1302->sram);
200		}
201
202		/*-------------------------------------------------
203		DEVICE_START( ds1302 )
204		-------------------------------------------------*/
205
206		static DEVICE_RESET( ds1302 )
207		{
208		ds1302_state *ds1302 = get_safe_token(device);
209
210		ds1302->shift_in  = 0;
211		ds1302->shift_out = 0;
212		ds1302->icount    = 0;
213		ds1302->last_clk  = 0;
214		ds1302->last_cmd  = 0;
215		}
216
217		/*-------------------------------------------------
218		DEVICE_GET_INFO( ds1302 )
219		-------------------------------------------------*/
220
221		static const char DEVTEMPLATE_SOURCE[] = __FILE__;
222
223		#define DEVTEMPLATE_ID(p,s)      p##ds1302##s
224		#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET
225		#define DEVTEMPLATE_NAME      "Dallas DS1302 RTC"
226		#define DEVTEMPLATE_FAMILY      "Dallas DS1302 RTC"
227		#include "devtempl.h"
228
229
230		DEFINE_LEGACY_DEVICE(DS1302, ds1302);

src/emu/machine/ins8154.h

r8962	r8963
28	28
29	29	***************************************************************************/
30	30
	31	#pragma once
	32
31	33	#ifndef __INS8154_H__
32	34	#define __INS8154_H__
33	35
34		#include "devlegcy.h"
35		#include "devcb.h"
	36	#include "emu.h"
36	37
37	38
	39
38	40	/***************************************************************************
	41	DEVICE CONFIGURATION MACROS
	42	***************************************************************************/
	43
	44	#define MDRV_INS8154_ADD(_tag, _intrf) \
	45	MDRV_DEVICE_ADD(_tag, INS8154, 0) \
	46	MDRV_DEVICE_CONFIG(_intrf)
	47
	48
	49	/***************************************************************************
39	50	TYPE DEFINITIONS
40	51	***************************************************************************/
41	52
42		typedef struct _ins8154_interface ins8154_interface;
43		struct _ins8154_interface
	53
	54	// ======================> ins8154_interface
	55
	56	struct ins8154_interface
44	57	{
45		devcb_read8         in_a_func;
46		devcb_write8      out_a_func;
47		devcb_read8         in_b_func;
48		devcb_write8      out_b_func;
49		devcb_write_line   out_irq_func;
	58	devcb_read8         m_in_a_func;
	59	devcb_write8      m_out_a_func;
	60	devcb_read8         m_in_b_func;
	61	devcb_write8      m_out_b_func;
	62	devcb_write_line   m_out_irq_func;
50	63	};
51	64
52		DECLARE_LEGACY_DEVICE(INS8154, ins8154);
53	65
54	66
	67	// ======================> ins8154_device_config
	68
	69	class ins8154_device_config : public device_config,
	70	public ins8154_interface
	71	{
	72	friend class ins8154_device;
	73
	74	// construction/destruction
	75	ins8154_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	76
	77	public:
	78	// allocators
	79	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	80	virtual device_t *alloc_device(running_machine &machine) const;
	81
	82	protected:
	83	// device_config overrides
	84	virtual void device_config_complete();
	85	};
	86
	87
	88
	89	// ======================> ins8154_device
	90
	91	class ins8154_device :  public device_t
	92	{
	93	friend class ins8154_device_config;
	94
	95	// construction/destruction
	96	ins8154_device(running_machine &_machine, const ins8154_device_config &_config);
	97
	98	public:
	99
	100	UINT8 ins8154_r(UINT32 offset);
	101	void ins8154_w(UINT32 offset, UINT8 data);
	102
	103	void ins8154_porta_w(UINT32 offset, UINT8 data);
	104	void ins8154_portb_w(UINT32 offset, UINT8 data);
	105
	106	protected:
	107	// device-level overrides
	108	virtual void device_start();
	109	virtual void device_reset();
	110	virtual void device_post_load() { }
	111	virtual void device_clock_changed() { }
	112
	113	private:
	114
	115	/* i/o lines */
	116	devcb_resolved_read8 m_in_a_func;
	117	devcb_resolved_write8 m_out_a_func;
	118	devcb_resolved_read8 m_in_b_func;
	119	devcb_resolved_write8 m_out_b_func;
	120	devcb_resolved_write_line m_out_irq_func;
	121
	122	/* registers */
	123	UINT8 m_in_a;  /* Input Latch Port A */
	124	UINT8 m_in_b;  /* Input Latch Port B */
	125	UINT8 m_out_a; /* Output Latch Port A */
	126	UINT8 m_out_b; /* Output Latch Port B */
	127	UINT8 m_mdr;   /* Mode Definition Register */
	128	UINT8 m_odra;  /* Output Definition Register Port A */
	129	UINT8 m_odrb;  /* Output Definition Register Port B */
	130
	131	const ins8154_device_config &m_config;
	132	};
	133
	134
	135	// device type definition
	136	extern const device_type INS8154;
	137
	138
	139
55	140	/***************************************************************************
56		FUNCTION PROTOTYPES
	141	PROTOTYPES
57	142	***************************************************************************/
58	143
59	144	READ8_DEVICE_HANDLER( ins8154_r );
r8962	r8963
63	148	WRITE8_DEVICE_HANDLER( ins8154_portb_w );
64	149
65	150
66		/***************************************************************************
67		DEVICE CONFIGURATION MACROS
68		***************************************************************************/
69
70		#define MDRV_INS8154_ADD(_tag, _intrf) \
71		MDRV_DEVICE_ADD(_tag, INS8154, 0) \
72		MDRV_DEVICE_CONFIG(_intrf)
73
74
75	151	#endif /* __INS8154_H__ */

src/emu/machine/ds1302.h

r8962	r8963
6	6
7	7	**********************************************************************/
8	8
	9	#pragma once
	10
9	11	#ifndef __DS1302_H__
10	12	#define __DS1302_H__
11	13
12		#include "devlegcy.h"
	14	#include "emu.h"
13	15
	16
	17
14	18	/***************************************************************************
15		MACROS / CONSTANTS
	19	DEVICE CONFIGURATION MACROS
16	20	***************************************************************************/
17	21
18		DECLARE_LEGACY_DEVICE(DS1302, ds1302);
19
20	22	#define MDRV_DS1302_ADD(_tag) \
21	23	MDRV_DEVICE_ADD(_tag, DS1302, 0)
22	24
23	25
24	26	/***************************************************************************
	27	TYPE DEFINITIONS
	28	***************************************************************************/
	29
	30
	31	// ======================> ds1302_device_config
	32
	33	class ds1302_device_config : public device_config
	34	{
	35	friend class ds1302_device;
	36
	37	// construction/destruction
	38	ds1302_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	39
	40	public:
	41	// allocators
	42	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	43	virtual device_t *alloc_device(running_machine &machine) const;
	44	};
	45
	46
	47
	48	// ======================> ds1302_device
	49
	50	class ds1302_device :  public device_t
	51	{
	52	friend class ds1302_device_config;
	53
	54	// construction/destruction
	55	ds1302_device(running_machine &_machine, const ds1302_device_config &_config);
	56
	57	public:
	58
	59	void ds1302_dat_w(UINT32 offset, UINT8 data);
	60	void ds1302_clk_w(UINT32 offset, UINT8 data);
	61	UINT8 ds1302_read(UINT32 offset);
	62
	63	protected:
	64	// device-level overrides
	65	virtual void device_start();
	66	virtual void device_reset();
	67	virtual void device_post_load() { }
	68	virtual void device_clock_changed() { }
	69
	70	private:
	71
	72	UINT32 m_shift_in;
	73	UINT8  m_shift_out;
	74	UINT8  m_icount;
	75	UINT8  m_last_clk;
	76	UINT8  m_last_cmd;
	77	UINT8  m_sram[0x20];
	78
	79	const ds1302_device_config &m_config;
	80	};
	81
	82
	83	// device type definition
	84	extern const device_type DS1302;
	85
	86
	87
	88	/***************************************************************************
25	89	PROTOTYPES
26	90	***************************************************************************/
27	91

src/emu/machine/8255ppi.h

r8962	r8963
8	8
9	9	#pragma once
10	10
11		#ifndef __8255PPI_H_
12		#define __8255PPI_H_
	11	#ifndef __8255PPI_H__
	12	#define __8255PPI_H__
13	13
14	14	#include "emu.h"
15	15
r8962	r8963
46	46	};
47	47
48	48
49
50	49	// ======================> ppi8255_device_config
51	50
52	51	class ppi8255_device_config : public device_config,
r8962	r8963
68	67	};
69	68
70	69
71
72	70	// ======================> ppi8255_device
73	71
74	72	class ppi8255_device :  public device_t

src/emu/machine/8257dma.c

r8962	r8963
32	32	#include "emu.h"
33	33	#include "memconv.h"
34	34	#include "8257dma.h"
	35	#include "devhelpr.h"
35	36
36	37	#define I8257_STATUS_UPDATE      0x10
37	38	#define I8257_STATUS_TC_CH3      0x08
r8962	r8963
39	40	#define I8257_STATUS_TC_CH1      0x02
40	41	#define I8257_STATUS_TC_CH0      0x01
41	42
	43	#define DMA_MODE_AUTOLOAD(mode)      ((mode) & 0x80)
	44	#define DMA_MODE_TCSTOP(mode)      ((mode) & 0x40)
	45	#define DMA_MODE_EXWRITE(mode)      ((mode) & 0x20)
	46	#define DMA_MODE_ROTPRIO(mode)      ((mode) & 0x10)
	47	#define DMA_MODE_CH_EN(mode, chan)   ((mode) & (1 << (chan)))
42	48
43		typedef struct _dma8257_t i8257_t;
44		struct _dma8257_t
	49
	50	//**************************************************************************
	51	//  DEVICE CONFIGURATION
	52	//**************************************************************************
	53
	54	GENERIC_DEVICE_CONFIG_SETUP(i8257, "DMA8257")
	55
	56	//-------------------------------------------------
	57	//  device_config_complete - perform any
	58	//  operations now that the configuration is
	59	//  complete
	60	//-------------------------------------------------
	61
	62	void i8257_device_config::device_config_complete()
45	63	{
46		devcb_resolved_write_line   out_hrq_func;
47		devcb_resolved_write_line   out_tc_func;
48		devcb_resolved_write_line   out_mark_func;
49		devcb_resolved_read8      in_memr_func;
50		devcb_resolved_write8      out_memw_func;
51		devcb_resolved_read8      in_ior_func[I8257_NUM_CHANNELS];
52		devcb_resolved_write8      out_iow_func[I8257_NUM_CHANNELS];
	64	// inherit a copy of the static data
	65	const i8257_interface *intf = reinterpret_cast<const i8257_interface *>(static_config());
	66	if (intf != NULL)
	67	{
	68	*static_cast<i8257_interface *>(this) = *intf;
	69	}
53	70
54		emu_timer *timer;
55		emu_timer *msbflip_timer;
	71	// or initialize to defaults if none provided
	72	else
	73	{
	74	memset(&m_out_hrq_func, 0, sizeof(m_out_hrq_func));
	75	memset(&m_out_tc_func, 0, sizeof(m_out_tc_func));
	76	memset(&m_out_mark_func, 0, sizeof(m_out_mark_func));
	77	memset(&m_in_memr_func, 0, sizeof(m_in_memr_func));
	78	memset(&m_out_memw_func, 0, sizeof(m_out_memw_func));
	79	memset(&m_in_ior_func[0], 0, sizeof(m_in_ior_func[0]));
	80	memset(&m_in_ior_func[1], 0, sizeof(m_in_ior_func[1]));
	81	memset(&m_in_ior_func[2], 0, sizeof(m_in_ior_func[2]));
	82	memset(&m_in_ior_func[3], 0, sizeof(m_in_ior_func[3]));
	83	memset(&m_out_iow_func[0], 0, sizeof(m_out_iow_func[0]));
	84	memset(&m_out_iow_func[1], 0, sizeof(m_out_iow_func[1]));
	85	memset(&m_out_iow_func[2], 0, sizeof(m_out_iow_func[2]));
	86	memset(&m_out_iow_func[3], 0, sizeof(m_out_iow_func[3]));
	87	}
	88	}
56	89
57		UINT16 registers[I8257_NUM_CHANNELS*2];
58	90
59		UINT16 address[I8257_NUM_CHANNELS];
60		UINT16 count[I8257_NUM_CHANNELS];
61		UINT8  rwmode[I8257_NUM_CHANNELS];
62	91
63		UINT8 mode;
64		UINT8 rr;
	92	//**************************************************************************
	93	//  LIVE DEVICE
	94	//**************************************************************************
65	95
66		UINT8 msb;
67		UINT8 drq;
	96	const device_type I8257 = i8257_device_config::static_alloc_device_config;
68	97
69		/* bits  0- 3 :  Terminal count for channels 0-3 */
70		UINT8 status;
71		};
	98	//-------------------------------------------------
	99	//  i8257_device - constructor
	100	//-------------------------------------------------
72	101
73		#define DMA_MODE_AUTOLOAD(mode)      ((mode) & 0x80)
74		#define DMA_MODE_TCSTOP(mode)      ((mode) & 0x40)
75		#define DMA_MODE_EXWRITE(mode)      ((mode) & 0x20)
76		#define DMA_MODE_ROTPRIO(mode)      ((mode) & 0x10)
77		#define DMA_MODE_CH_EN(mode, chan)   ((mode) & (1 << (chan)))
	102	i8257_device::i8257_device(running_machine &_machine, const i8257_device_config &config)
	103	: device_t(_machine, config),
	104	m_config(config)
	105	{
78	106
79		static TIMER_CALLBACK( dma8257_timerproc );
80		static TIMER_CALLBACK( dma8257_msbflip_timerproc );
81		static void dma8257_update_status(running_device *device);
	107	}
82	108
	109	//-------------------------------------------------
	110	//  device_start - device-specific startup
	111	//-------------------------------------------------
83	112
84		/* ----------------------------------------------------------------------- */
	113	void i8257_device::device_start()
	114	{
	115	/* validate arguments */
	116	assert(this != NULL);
85	117
86		INLINE i8257_t *get_safe_token(running_device *device) {
87		assert( device != NULL );
88		assert( device->type() == I8257 );
89		return ( i8257_t * ) downcast<legacy_device_base *>(device)->token();
	118	/* resolve callbacks */
	119	devcb_resolve_write_line(&m_out_hrq_func, &m_config.m_out_hrq_func, this);
	120	devcb_resolve_write_line(&m_out_tc_func, &m_config.m_out_tc_func, this);
	121	devcb_resolve_write_line(&m_out_mark_func, &m_config.m_out_mark_func, this);
	122	devcb_resolve_read8(&m_in_memr_func, &m_config.m_in_memr_func, this);
	123	devcb_resolve_write8(&m_out_memw_func, &m_config.m_out_memw_func, this);
	124
	125	for (int i = 0; i < I8257_NUM_CHANNELS; i++)
	126	{
	127	devcb_resolve_read8(&m_in_ior_func[i], &m_config.m_in_ior_func[i], this);
	128	devcb_resolve_write8(&m_out_iow_func[i], &m_config.m_out_iow_func[i], this);
	129	}
	130
	131	/* set initial values */
	132	m_status = 0x0f;
	133	m_timer = timer_alloc(&m_machine, i8257_timerproc_callback, (void *) this);
	134	m_msbflip_timer = timer_alloc(&m_machine, i8257_msbflip_timerproc_callback, (void *) this);
	135
	136	/* register for state saving */
	137	state_save_register_device_item_array(this, 0, m_address);
	138	state_save_register_device_item_array(this, 0, m_count);
	139	state_save_register_device_item_array(this, 0, m_rwmode);
	140	state_save_register_device_item_array(this, 0, m_registers);
	141	state_save_register_device_item(this, 0, m_mode);
	142	state_save_register_device_item(this, 0, m_rr);
	143	state_save_register_device_item(this, 0, m_msb);
	144	state_save_register_device_item(this, 0, m_drq);
	145	state_save_register_device_item(this, 0, m_status);
90	146	}
91	147
92		static int dma8257_do_operation(running_device *device, int channel)
	148
	149	//-------------------------------------------------
	150	//  device_reset - device-specific reset
	151	//-------------------------------------------------
	152
	153	void i8257_device::device_reset()
93	154	{
94		i8257_t *i8257 = get_safe_token(device);
	155	m_status &= 0xf0;
	156	m_mode = 0;
	157	i8257_update_status();
	158	}
	159
	160
	161	int i8257_device::i8257_do_operation(int channel)
	162	{
95	163	int done;
96	164	UINT8 data;
97		UINT8 mode;
98	165
99		mode = i8257->rwmode[channel];
100		if (i8257->count[channel] == 0x0000)
	166	UINT8 mode = m_rwmode[channel];
	167	if (m_count[channel] == 0x0000)
101	168	{
102		i8257->status |=  (0x01 << channel);
	169	m_status |=  (0x01 << channel);
103	170
104		devcb_call_write_line(&i8257->out_tc_func, ASSERT_LINE);
	171	devcb_call_write_line(&m_out_tc_func, ASSERT_LINE);
105	172	}
106	173	switch(mode) {
107	174	case 1:
108		if (&i8257->in_memr_func.target != NULL) {
109		data = devcb_call_read8(&i8257->in_memr_func, i8257->address[channel]);
110		} else {
	175	if (&m_in_memr_func.target != NULL)
	176	{
	177	data = devcb_call_read8(&m_in_memr_func, m_address[channel]);
	178	}
	179	else
	180	{
111	181	data = 0;
112	182	logerror("8257: No memory read function defined.\n");
113	183	}
114		if (&i8257->out_iow_func[channel].target != NULL) {
115		devcb_call_write8(&i8257->out_iow_func[channel], 0, data);
116		} else {
	184	if (&m_out_iow_func[channel].target != NULL)
	185	{
	186	devcb_call_write8(&m_out_iow_func[channel], 0, data);
	187	}
	188	else
	189	{
117	190	logerror("8257: No channel write function for channel %d defined.\n",channel);
118	191	}
119	192
120		i8257->address[channel]++;
121		i8257->count[channel]--;
122		done = (i8257->count[channel] == 0xFFFF);
	193	m_address[channel]++;
	194	m_count[channel]--;
	195	done = (m_count[channel] == 0xFFFF);
123	196	break;
124	197
125	198	case 2:
126		if (&i8257->in_ior_func[channel].target != NULL) {
127		data = devcb_call_read8(&i8257->in_ior_func[channel], 0);
128		} else {
	199	if (&m_in_ior_func[channel].target != NULL)
	200	{
	201	data = devcb_call_read8(&m_in_ior_func[channel], 0);
	202	}
	203	else
	204	{
129	205	data = 0;
130	206	logerror("8257: No channel read function for channel %d defined.\n",channel);
131	207	}
132	208
133		if (&i8257->out_memw_func.target != NULL) {
134		devcb_call_write8(&i8257->out_memw_func, i8257->address[channel], data);
135		} else {
	209	if (&m_out_memw_func.target != NULL)
	210	{
	211	devcb_call_write8(&m_out_memw_func, m_address[channel], data);
	212	}
	213	else
	214	{
136	215	logerror("8257: No memory write function defined.\n");
137	216	}
138		i8257->address[channel]++;
139		i8257->count[channel]--;
140		done = (i8257->count[channel] == 0xFFFF);
	217	m_address[channel]++;
	218	m_count[channel]--;
	219	done = (m_count[channel] == 0xFFFF);
141	220	break;
142	221	case 0: /* verify */
143		i8257->address[channel]++;
144		i8257->count[channel]--;
145		done = (i8257->count[channel] == 0xFFFF);
	222	m_address[channel]++;
	223	m_count[channel]--;
	224	done = (m_count[channel] == 0xFFFF);
146	225	break;
147	226	default:
148		fatalerror("dma8257_do_operation: invalid mode!\n");
	227	fatalerror("i8257_do_operation: invalid mode!\n");
149	228	break;
150	229	}
151	230	if (done)
152	231	{
153		if ((channel==2) && DMA_MODE_AUTOLOAD(i8257->mode)) {
	232	if ((channel==2) && DMA_MODE_AUTOLOAD(m_mode))
	233	{
154	234	/* in case of autoload at the end channel 3 info is */
155	235	/* copied to channel 2 info                         */
156		i8257->registers[4] = i8257->registers[6];
157		i8257->registers[5] = i8257->registers[7];
	236	m_registers[4] = m_registers[6];
	237	m_registers[5] = m_registers[7];
158	238	}
159	239
160		devcb_call_write_line(&i8257->out_tc_func, CLEAR_LINE);
	240	devcb_call_write_line(&m_out_tc_func, CLEAR_LINE);
161	241	}
162	242	return done;
163	243	}
164	244
165	245
	246	TIMER_CALLBACK( i8257_device::i8257_timerproc_callback )
	247	{
	248	reinterpret_cast<i8257_device*>(ptr)->i8257_timerproc();
	249	}
166	250
167		static TIMER_CALLBACK( dma8257_timerproc )
	251	void i8257_device::i8257_timerproc()
168	252	{
169		running_device *device = (running_device *)ptr;
170		i8257_t *i8257 = get_safe_token(device);
171	253	int i, channel = 0, rr;
172	254	int done;
173	255
174		rr = DMA_MODE_ROTPRIO(i8257->mode) ? i8257->rr : 0;
	256	rr = DMA_MODE_ROTPRIO(m_mode) ? m_rr : 0;
175	257	for (i = 0; i < I8257_NUM_CHANNELS; i++)
176	258	{
177	259	channel = (i + rr) % I8257_NUM_CHANNELS;
178		if ((i8257->status & (1 << channel)) == 0)
179		if (i8257->mode & i8257->drq & (1 << channel))
	260	if ((m_status & (1 << channel)) == 0)
	261	{
	262	if (m_mode & m_drq & (1 << channel))
	263	{
180	264	break;
	265	}
	266	}
181	267	}
182		done = dma8257_do_operation(device, channel);
	268	done = i8257_do_operation(channel);
183	269
184		i8257->rr = (channel + 1) & 0x03;
	270	m_rr = (channel + 1) & 0x03;
185	271
186	272	if (done)
187	273	{
188		i8257->drq    &= ~(0x01 << channel);
189		dma8257_update_status(device);
190		if (!(DMA_MODE_AUTOLOAD(i8257->mode) && channel==2)) {
191		if (DMA_MODE_TCSTOP(i8257->mode)) {
192		i8257->mode &= ~(0x01 << channel);
	274	m_drq &= ~(0x01 << channel);
	275	i8257_update_status();
	276	if (!(DMA_MODE_AUTOLOAD(m_mode) && channel==2))
	277	{
	278	if (DMA_MODE_TCSTOP(m_mode))
	279	{
	280	m_mode &= ~(0x01 << channel);
193	281	}
194	282	}
195	283	}
196	284	}
197	285
198	286
	287	TIMER_CALLBACK( i8257_device::i8257_msbflip_timerproc_callback )
	288	{
	289	reinterpret_cast<i8257_device*>(ptr)->i8257_msbflip_timerproc();
	290	}
199	291
200		static TIMER_CALLBACK( dma8257_msbflip_timerproc )
	292	void i8257_device::i8257_msbflip_timerproc()
201	293	{
202		running_device *device = (running_device *)ptr;
203		i8257_t *i8257 = get_safe_token(device);
204		i8257->msb ^= 1;
	294	m_msb ^= 1;
205	295	}
206	296
207	297
208
209		static void dma8257_update_status(running_device *device)
	298	void i8257_device::i8257_update_status()
210	299	{
211		i8257_t *i8257 = get_safe_token(device);
212	300	UINT16 pending_transfer;
213	301	attotime next;
214	302
215	303	/* no transfer is active right now; is there a transfer pending right now? */
216		pending_transfer = i8257->drq & (i8257->mode & 0x0F);
	304	pending_transfer = m_drq & (m_mode & 0x0F);
217	305
218	306	if (pending_transfer)
219	307	{
220		next = ATTOTIME_IN_HZ(device->clock() / 4 );
221		timer_adjust_periodic(i8257->timer,
	308	next = ATTOTIME_IN_HZ(clock() / 4 );
	309	timer_adjust_periodic(m_timer,
222	310	attotime_zero,
223	311	0,
224	312	/* 1 byte transferred in 4 clock cycles */
r8962	r8963
227	315	else
228	316	{
229	317	/* no transfers active right now */
230		timer_reset(i8257->timer, attotime_never);
	318	timer_reset(m_timer, attotime_never);
231	319	}
232	320
233	321	/* set the halt line */
234		devcb_call_write_line(&i8257->out_hrq_func, pending_transfer ? ASSERT_LINE : CLEAR_LINE);
	322	devcb_call_write_line(&m_out_hrq_func, pending_transfer ? ASSERT_LINE : CLEAR_LINE);
235	323	}
236	324
237	325
238
239		/* ----------------------------------------------------------------------- */
240
241		static void prepare_msb_flip(i8257_t *i8257)
	326	void i8257_device::i8257_prepare_msb_flip()
242	327	{
243		timer_adjust_oneshot(i8257->msbflip_timer, attotime_zero, 0);
	328	timer_adjust_oneshot(m_msbflip_timer, attotime_zero, 0);
244	329	}
245	330
246	331
247
248		READ8_DEVICE_HANDLER( i8257_r )
	332	READ8_DEVICE_HANDLER_TRAMPOLINE(i8257, i8257_r)
249	333	{
250		i8257_t *i8257 = get_safe_token(device);
251	334	UINT8 data = 0xFF;
252	335
253		switch(offset) {
	336	switch(offset)
	337	{
254	338	case 0:
255	339	case 1:
256	340	case 2:
r8962	r8963
260	344	case 6:
261	345	case 7:
262	346	/* DMA address/count register */
263		data = ( i8257->registers[offset] >> (i8257->msb ? 8 : 0) ) & 0xFF;
264		prepare_msb_flip(i8257);
	347	data = ( m_registers[offset] >> (m_msb ? 8 : 0) ) & 0xFF;
	348	i8257_prepare_msb_flip();
265	349	break;
266	350
267	351	case 8:
268	352	/* DMA status register */
269		data = (UINT8) i8257->status;
	353	data = (UINT8) m_status;
270	354	/* read resets status ! */
271		i8257->status &= 0xF0;
	355	m_status &= 0xF0;
272	356
273	357	break;
274	358
r8962	r8963
281	365	}
282	366
283	367
284
285		WRITE8_DEVICE_HANDLER( i8257_w )
	368	WRITE8_DEVICE_HANDLER_TRAMPOLINE(i8257, i8257_w)
286	369	{
287		i8257_t *i8257 = get_safe_token(device);
288
289		switch(offset) {
	370	switch(offset)
	371	{
290	372	case 0:
291	373	case 1:
292	374	case 2:
r8962	r8963
296	378	case 6:
297	379	case 7:
298	380	/* DMA address/count register */
299		if (i8257->msb)
300		i8257->registers[offset] |= ((UINT16) data) << 8;
	381	if (m_msb)
	382	{
	383	m_registers[offset] |= ((UINT16) data) << 8;
	384	}
301	385	else
302		i8257->registers[offset] = data;
	386	{
	387	m_registers[offset] = data;
	388	}
303	389
304		if (DMA_MODE_AUTOLOAD(i8257->mode)) {
	390	if (DMA_MODE_AUTOLOAD(m_mode))
	391	{
305	392	/* in case of autoload when inserting channel 2 info */
306	393	/* it is automaticaly copied to channel 3 info       */
307		switch(offset) {
	394	switch(offset)
	395	{
308	396	case 4:
309	397	case 5:
310		if (i8257->msb)
311		i8257->registers[offset+2] |= ((UINT16) data) << 8;
	398	if (m_msb)
	399	{
	400	m_registers[offset+2] |= ((UINT16) data) << 8;
	401	}
312	402	else
313		i8257->registers[offset+2] = data;
	403	{
	404	m_registers[offset+2] = data;
	405	}
314	406	}
315	407	}
316	408
317		prepare_msb_flip(i8257);
	409	i8257_prepare_msb_flip();
318	410	break;
319	411
320	412	case 8:
321	413	/* DMA mode register */
322		i8257->mode = data;
	414	m_mode = data;
323	415	break;
324	416
325	417	default:
r8962	r8963
329	421	}
330	422
331	423
	424	TIMER_CALLBACK( i8257_device::i8257_drq_write_callback )
	425	{
	426	reinterpret_cast<i8257_device*>(ptr)->i8257_drq_write_timerproc(param);
	427	}
332	428
333		static TIMER_CALLBACK( dma8257_drq_write_callback )
	429	void i8257_device::i8257_drq_write_timerproc(INT32 param)
334	430	{
335		running_device *device = (running_device *)ptr;
336		i8257_t *i8257 = get_safe_token(device);
337	431	int channel = param >> 1;
338	432	int state = param & 0x01;
339	433
340	434	/* normalize state */
341	435	if (state)
342	436	{
343		i8257->drq |= 0x01 << channel;
344		i8257->address[channel] =  i8257->registers[channel * 2];
345		i8257->count[channel] =  i8257->registers[channel * 2 + 1] & 0x3FFF;
346		i8257->rwmode[channel] =  i8257->registers[channel * 2 + 1] >> 14;
	437	m_drq |= 0x01 << channel;
	438	m_address[channel] =  m_registers[channel * 2];
	439	m_count[channel] =  m_registers[channel * 2 + 1] & 0x3FFF;
	440	m_rwmode[channel] =  m_registers[channel * 2 + 1] >> 14;
347	441	/* clear channel TC */
348		i8257->status &= ~(0x01 << channel);
	442	m_status &= ~(0x01 << channel);
349	443	}
350	444	else
351		i8257->drq &= ~(0x01 << channel);
	445	m_drq &= ~(0x01 << channel);
352	446
353		dma8257_update_status(device);
	447	i8257_update_status();
354	448	}
355	449
356
357
358		static WRITE8_DEVICE_HANDLER( dma8257_drq_w )
	450	void i8257_device::i8257_drq_w(int channel, int state)
359	451	{
360		int param = (offset << 1) | (data ? 1 : 0);
	452	int param = (channel << 1) | (state ? 1 : 0);
361	453
362		timer_call_after_resynch(device->machine, (void *) device, param, dma8257_drq_write_callback);
	454	timer_call_after_resynch(&m_machine, (void *)this, param, i8257_drq_write_callback);
363	455	}
364	456
365		WRITE_LINE_DEVICE_HANDLER( i8257_hlda_w )
366		{
367		}
368
369		WRITE_LINE_DEVICE_HANDLER( i8257_ready_w )
370		{
371		}
372
373		WRITE_LINE_DEVICE_HANDLER( i8257_drq0_w ) { dma8257_drq_w(device, 0, state); }
374		WRITE_LINE_DEVICE_HANDLER( i8257_drq1_w ) { dma8257_drq_w(device, 1, state); }
375		WRITE_LINE_DEVICE_HANDLER( i8257_drq2_w ) { dma8257_drq_w(device, 2, state); }
376		WRITE_LINE_DEVICE_HANDLER( i8257_drq3_w ) { dma8257_drq_w(device, 3, state); }
377
378
379		/* ----------------------------------------------------------------------- */
380
381		/* device interface */
382
383		static DEVICE_START( i8257 )
384		{
385		i8257_t *i8257 = get_safe_token(device);
386		i8257_interface *intf = (i8257_interface *)device->baseconfig().static_config();
387		int i;
388
389		/* validate arguments */
390		assert(device != NULL);
391
392		/* resolve callbacks */
393		devcb_resolve_write_line(&i8257->out_hrq_func, &intf->out_hrq_func, device);
394		devcb_resolve_write_line(&i8257->out_tc_func, &intf->out_tc_func, device);
395		devcb_resolve_write_line(&i8257->out_mark_func, &intf->out_mark_func, device);
396		devcb_resolve_read8(&i8257->in_memr_func, &intf->in_memr_func, device);
397		devcb_resolve_write8(&i8257->out_memw_func, &intf->out_memw_func, device);
398
399		for (i = 0; i < I8257_NUM_CHANNELS; i++)
400		{
401		devcb_resolve_read8(&i8257->in_ior_func[i], &intf->in_ior_func[i], device);
402		devcb_resolve_write8(&i8257->out_iow_func[i], &intf->out_iow_func[i], device);
403		}
404
405		/* set initial values */
406		i8257->status = 0x0f;
407		i8257->timer = timer_alloc(device->machine, dma8257_timerproc, (void *) device);
408		i8257->msbflip_timer = timer_alloc(device->machine, dma8257_msbflip_timerproc, (void *) device);
409
410		/* register for state saving */
411		state_save_register_device_item_array(device, 0, i8257->address);
412		state_save_register_device_item_array(device, 0, i8257->count);
413		state_save_register_device_item_array(device, 0, i8257->rwmode);
414		state_save_register_device_item_array(device, 0, i8257->registers);
415		state_save_register_device_item(device, 0, i8257->mode);
416		state_save_register_device_item(device, 0, i8257->rr);
417		state_save_register_device_item(device, 0, i8257->msb);
418		state_save_register_device_item(device, 0, i8257->drq);
419		state_save_register_device_item(device, 0, i8257->status);
420		}
421
422
423		static DEVICE_RESET( i8257 )
424		{
425		i8257_t *i8257 = get_safe_token(device);
426
427		i8257->status &= 0xf0;
428		i8257->mode = 0;
429		dma8257_update_status(device);
430		}
431
432
433		DEVICE_GET_INFO( i8257 )
434		{
435		switch (state)
436		{
437		/* --- the following bits of info are returned as 64-bit signed integers --- */
438		case DEVINFO_INT_TOKEN_BYTES:               info->i = sizeof(i8257_t);         break;
439		case DEVINFO_INT_INLINE_CONFIG_BYTES:         info->i = 0;                     break;
440
441		/* --- the following bits of info are returned as pointers to data or functions --- */
442		case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(i8257);break;
443		case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
444		case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(i8257);break;
445
446		/* --- the following bits of info are returned as NULL-terminated strings --- */
447		case DEVINFO_STR_NAME:                     strcpy(info->s, "DMA8257");            break;
448		case DEVINFO_STR_FAMILY:                  strcpy(info->s, "DMA controllers");      break;
449		case DEVINFO_STR_VERSION:                  strcpy(info->s, "1.0");               break;
450		case DEVINFO_STR_SOURCE_FILE:               strcpy(info->s, __FILE__);            break;
451		case DEVINFO_STR_CREDITS:                  strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
452		}
453		}
454
455
456		DEFINE_LEGACY_DEVICE(I8257, i8257);
	457	WRITE_LINE_DEVICE_HANDLER( i8257_hlda_w ) { }
	458	WRITE_LINE_DEVICE_HANDLER( i8257_ready_w ) { }
	459	WRITE_LINE_DEVICE_HANDLER( i8257_drq0_w ) { downcast<i8257_device*>(device)->i8257_drq_w(0, state); }
	460	WRITE_LINE_DEVICE_HANDLER( i8257_drq1_w ) { downcast<i8257_device*>(device)->i8257_drq_w(1, state); }
	461	WRITE_LINE_DEVICE_HANDLER( i8257_drq2_w ) { downcast<i8257_device*>(device)->i8257_drq_w(2, state); }
	462	WRITE_LINE_DEVICE_HANDLER( i8257_drq3_w ) { downcast<i8257_device*>(device)->i8257_drq_w(3, state); }

src/emu/machine/8257dma.h

r8962	r8963
30	30
31	31	***************************************************************************/
32	32
	33	#pragma once
	34
33	35	#ifndef __I8257__
34	36	#define __I8257__
35	37
36		#include "devlegcy.h"
	38	#include "emu.h"
37	39
38	40
	41
39	42	/***************************************************************************
40		MACROS / CONSTANTS
	43	DEVICE CONFIGURATION MACROS
41	44	***************************************************************************/
42	45
43		DECLARE_LEGACY_DEVICE(I8257, i8257);
44
45	46	#define MDRV_I8257_ADD(_tag, _clock, _config) \
46	47	MDRV_DEVICE_ADD(_tag, I8257, _clock) \
47	48	MDRV_DEVICE_CONFIG(_config)
r8962	r8963
51	52
52	53	#define I8257_NUM_CHANNELS      (4)
53	54
	55
54	56	/***************************************************************************
55	57	TYPE DEFINITIONS
56	58	***************************************************************************/
57	59
58		typedef struct _i8257_interface i8257_interface;
59		struct _i8257_interface
	60
	61	// ======================> i8257_interface
	62
	63	struct i8257_interface
60	64	{
61		devcb_write_line   out_hrq_func;
62		devcb_write_line   out_tc_func;
63		devcb_write_line   out_mark_func;
	65	devcb_write_line   m_out_hrq_func;
	66	devcb_write_line   m_out_tc_func;
	67	devcb_write_line   m_out_mark_func;
64	68
65	69	/* accessors to main memory */
66		devcb_read8         in_memr_func;
67		devcb_write8      out_memw_func;
	70	devcb_read8         m_in_memr_func;
	71	devcb_write8      m_out_memw_func;
68	72
69	73	/* channel accesors */
70		devcb_read8         in_ior_func[I8257_NUM_CHANNELS];
71		devcb_write8      out_iow_func[I8257_NUM_CHANNELS];
	74	devcb_read8         m_in_ior_func[I8257_NUM_CHANNELS];
	75	devcb_write8      m_out_iow_func[I8257_NUM_CHANNELS];
72	76	};
73	77
	78
	79
	80	// ======================> i8257_device_config
	81
	82	class i8257_device_config : public device_config,
	83	public i8257_interface
	84	{
	85	friend class i8257_device;
	86
	87	// construction/destruction
	88	i8257_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	89
	90	public:
	91	// allocators
	92	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	93	virtual device_t *alloc_device(running_machine &machine) const;
	94
	95	protected:
	96	// device_config overrides
	97	virtual void device_config_complete();
	98	};
	99
	100
	101
	102	// ======================> i8257_device
	103
	104	class i8257_device :  public device_t
	105	{
	106	friend class i8257_device_config;
	107
	108	// construction/destruction
	109	i8257_device(running_machine &_machine, const i8257_device_config &_config);
	110
	111	public:
	112
	113	/* register access */
	114	UINT8 i8257_r(UINT32 offset);
	115	void i8257_w(UINT32 offset, UINT8 data);
	116
	117	/* data request */
	118	void i8257_drq_w(int channel, int state);
	119
	120	void i8257_timerproc();
	121	void i8257_msbflip_timerproc();
	122	void i8257_drq_write_timerproc(INT32 param);
	123
	124	protected:
	125	// device-level overrides
	126	virtual void device_start();
	127	virtual void device_reset();
	128	virtual void device_post_load() { }
	129	virtual void device_clock_changed() { }
	130
	131	static TIMER_CALLBACK( i8257_timerproc_callback );
	132	static TIMER_CALLBACK( i8257_msbflip_timerproc_callback );
	133	static TIMER_CALLBACK( i8257_drq_write_callback );
	134
	135	private:
	136
	137	int i8257_do_operation(int channel);
	138	void i8257_update_status();
	139	void i8257_prepare_msb_flip();
	140
	141	devcb_resolved_write_line   m_out_hrq_func;
	142	devcb_resolved_write_line   m_out_tc_func;
	143	devcb_resolved_write_line   m_out_mark_func;
	144	devcb_resolved_read8      m_in_memr_func;
	145	devcb_resolved_write8      m_out_memw_func;
	146	devcb_resolved_read8      m_in_ior_func[I8257_NUM_CHANNELS];
	147	devcb_resolved_write8      m_out_iow_func[I8257_NUM_CHANNELS];
	148
	149	emu_timer *m_timer;
	150	emu_timer *m_msbflip_timer;
	151
	152	UINT16 m_registers[I8257_NUM_CHANNELS*2];
	153
	154	UINT16 m_address[I8257_NUM_CHANNELS];
	155	UINT16 m_count[I8257_NUM_CHANNELS];
	156	UINT8  m_rwmode[I8257_NUM_CHANNELS];
	157
	158	UINT8 m_mode;
	159	UINT8 m_rr;
	160
	161	UINT8 m_msb;
	162	UINT8 m_drq;
	163
	164	/* bits  0- 3 :  Terminal count for channels 0-3 */
	165	UINT8 m_status;
	166
	167	const i8257_device_config &m_config;
	168	};
	169
	170
	171	// device type definition
	172	extern const device_type I8257;
	173
	174
	175
74	176	/***************************************************************************
75	177	PROTOTYPES
76	178	***************************************************************************/

src/emu/machine/i2cmem.c

r8962	r8963
110	110
111	111
112	112	//-------------------------------------------------
113		//  static_set_interface - set the device
	113	//  static_set_interface - set the device
114	114	//  configuration
115	115	//-------------------------------------------------
116	116

src/emu/machine/f3853.c

r8962	r8963
1		/*
2		fairchild f3853 smi static ram interface
3		with integrated interrupt controller and timer
	1	/**********************************************************************
4	2
5		databook found at www.freetradezone.com
6		*/
	3	Fairchild F3853 SRAM interface with integrated interrupt
	4	controller and timer (SMI)
7	5
	6	This chip is a timer shift register, basically the same as in the
	7	F3851.
	8
	9	Based on a datasheet obtained from www.freetradezone.com
	10
	11	The SMI does not have DC0 and DC1, only DC0; as a result, it does
	12	not respond to the main CPU's DC0/DC1 swap instruction.  This may
	13	lead to two devices responding to the same DC0 address and
	14	attempting to place their bytes on the data bus simultaneously!
	15
	16	8-bit shift register:
	17	Feedback in0 = !((out3 ^ out4) ^ (out5 ^ out7))
	18	Interrupts are at 0xfe
	19	0xff stops the register (0xfe is never reached)
	20
	21	**********************************************************************/
	22
8	23	#include "emu.h"
9	24	#include "f3853.h"
	25	#include "devhelpr.h"
10	26
11		/*
12		the smi does not have DC0 and DC1, only DC0
13		it is not reacting to the cpus DC0/DC1 swap instruction
14		--> might lead to 2 devices having reacting to the same DC0 address
15		and placing their bytes to the databus!
16		*/
	27	/***************************************************************************
	28	MACROS
	29	***************************************************************************/
17	30
	31	#define INTERRUPT_VECTOR(external) ( external ? m_low | ( m_high << 8 ) | 0x80 \
	32	: ( m_low | ( m_high << 8 ) ) & ~0x80 )
18	33
19		typedef struct _f3853 f3853_t;
20		struct _f3853 {
21		const f3853_config *config;
22	34
23		UINT8 high,low; // bit 7 set to 0 for timer interrupt, to 1 for external interrupt
24		int external_enable;
25		int timer_enable;
26	35
27		int request_flipflop;
	36	/***************************************************************************
	37	IMPLEMENTATION
	38	***************************************************************************/
28	39
29		int priority_line; /* inverted level*/
30		int external_interrupt_line;/* inverted level */
	40	//**************************************************************************
	41	//  DEVICE CONFIGURATION
	42	//**************************************************************************
31	43
32		emu_timer *timer;
33		};
	44	//-------------------------------------------------
	45	//  f3853_device_config - constructor
	46	//-------------------------------------------------
34	47
35		/*
36		8 bit shift register
37		feedback in0 = not ( (out3 xor out4) xor (out5 xor out7) )
38		interrupt at 0xfe
39		0xff stops register (0xfe never reached!)
40		*/
41		static UINT8 f3853_value_to_cycle[0x100];
	48	f3853_device_config::f3853_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
	49	: device_config(mconfig, static_alloc_device_config, "F3853", tag, owner, clock)
	50	{
	51	}
42	52
43	53
44		static TIMER_CALLBACK( f3853_timer_callback );
45		#define INTERRUPT_VECTOR(external) ( external ? f3853->low | ( f3853->high << 8 ) | 0x80 \
46		: ( f3853->low | ( f3853->high << 8 ) ) & ~0x80 )
	54	//-------------------------------------------------
	55	//  static_alloc_device_config - allocate a new
	56	//  configuration object
	57	//-------------------------------------------------
47	58
	59	device_config *f3853_device_config::static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
	60	{
	61	return global_alloc(f3853_device_config(mconfig, tag, owner, clock));
	62	}
48	63
49		INLINE f3853_t *get_safe_token(running_device *device)
	64
	65	//-------------------------------------------------
	66	//  alloc_device - allocate a new device object
	67	//-------------------------------------------------
	68
	69	device_t *f3853_device_config::alloc_device(running_machine &machine) const
50	70	{
51		assert( device != NULL );
52		assert( device->type() == F3853 );
53		return ( f3853_t * ) downcast<legacy_device_base *>(device)->token();
	71	return auto_alloc(&machine, f3853_device(machine, *this));
54	72	}
55	73
56	74
57		static void f3853_set_interrupt_request_line(running_device *device)
	75	//-------------------------------------------------
	76	//  device_config_complete - perform any
	77	//  operations now that the configuration is
	78	//  complete
	79	//-------------------------------------------------
	80
	81	void f3853_device_config::device_config_complete()
58	82	{
59		f3853_t   *f3853 = get_safe_token( device );
	83	// inherit a copy of the static data
	84	const f3853_interface *intf = reinterpret_cast<const f3853_interface *>(static_config());
	85	if (intf != NULL)
	86	{
	87	*static_cast<f3853_interface *>(this) = *intf;
	88	}
60	89
61		if ( ! f3853->config->interrupt_request )
	90	// or initialize to defaults if none provided
	91	else
	92	{
	93	memset(&m_interrupt_request, 0, sizeof(m_interrupt_request));
	94	}
	95	}
	96
	97
	98
	99	//**************************************************************************
	100	//  LIVE DEVICE
	101	//**************************************************************************
	102
	103	const device_type F3853 = f3853_device_config::static_alloc_device_config;
	104
	105	//-------------------------------------------------
	106	//  f3853_device - constructor
	107	//-------------------------------------------------
	108
	109	f3853_device::f3853_device(running_machine &_machine, const f3853_device_config &config)
	110	: device_t(_machine, config),
	111	m_config(config)
	112	{
	113
	114	}
	115
	116	//-------------------------------------------------
	117	//  device_start - device-specific startup
	118	//-------------------------------------------------
	119
	120	void f3853_device::device_start()
	121	{
	122	UINT8 reg = 0xfe;
	123	for(INT32 i=254 /* Known to get 0xfe after 255 cycles */; i >= 0; i--)
	124	{
	125	INT32 o7 = (reg & 0x80) ? TRUE : FALSE;
	126	INT32 o5 = (reg & 0x20) ? TRUE : FALSE;
	127	INT32 o4 = (reg & 0x10) ? TRUE : FALSE;
	128	INT32 o3 = (reg & 0x08) ? TRUE : FALSE;
	129	m_value_to_cycle[reg] = i;
	130	reg <<= 1;
	131	if(!((o7 != o5) != (o4 != o3)))
	132	{
	133	reg |= 1;
	134	}
	135	}
	136
	137	m_timer = timer_alloc(&m_machine, f3853_timer_callback, (void *)this );
	138
	139	state_save_register_device_item(this, 0, m_high );
	140	state_save_register_device_item(this, 0, m_low );
	141	state_save_register_device_item(this, 0, m_external_enable );
	142	state_save_register_device_item(this, 0, m_timer_enable );
	143	state_save_register_device_item(this, 0, m_request_flipflop );
	144	state_save_register_device_item(this, 0, m_priority_line );
	145	state_save_register_device_item(this, 0, m_external_interrupt_line );
	146	}
	147
	148
	149	//-------------------------------------------------
	150	//  device_reset - device-specific reset
	151	//-------------------------------------------------
	152
	153	void f3853_device::device_reset()
	154	{
	155	m_high = 0;
	156	m_low = 0;
	157	m_external_enable = 0;
	158	m_timer_enable = 0;
	159	m_request_flipflop = 0;
	160	m_priority_line = FALSE;
	161	m_external_interrupt_line = TRUE;
	162
	163	timer_enable(m_timer, 0);
	164	}
	165
	166
	167	void f3853_device::f3853_set_interrupt_request_line()
	168	{
	169	if(!m_config.m_interrupt_request)
	170	{
62	171	return;
	172	}
63	173
64		if ( f3853->external_enable && ! f3853->priority_line )
65		f3853->config->interrupt_request(device, INTERRUPT_VECTOR(TRUE), TRUE);
66		else if ( f3853->timer_enable && ! f3853->priority_line && f3853->request_flipflop)
67		f3853->config->interrupt_request(device, INTERRUPT_VECTOR(FALSE), TRUE);
	174	if(m_external_enable && !m_priority_line)
	175	{
	176	m_config.m_interrupt_request(this, INTERRUPT_VECTOR(TRUE), TRUE);
	177	}
	178	else if( m_timer_enable && !m_priority_line && m_request_flipflop)
	179	{
	180	m_config.m_interrupt_request(this, INTERRUPT_VECTOR(FALSE), TRUE);
	181	}
68	182	else
69		f3853->config->interrupt_request(device, 0, FALSE);
	183	{
	184	m_config.m_interrupt_request(this, 0, FALSE);
	185	}
70	186	}
71	187
72	188
73		static void f3853_timer_start(running_device *device, UINT8 value)
	189	void f3853_device::f3853_timer_start(UINT8 value)
74	190	{
75		f3853_t   *f3853 = get_safe_token( device );
	191	attotime period = (value != 0xff) ? attotime_mul(ATTOTIME_IN_HZ(clock()), m_value_to_cycle[value]*31) : attotime_never;
76	192
77		attotime period = (value != 0xff) ? attotime_mul(ATTOTIME_IN_HZ(device->clock()), f3853_value_to_cycle[value]*31) : attotime_never;
78
79		timer_adjust_oneshot(f3853->timer, period, 0);
	193	timer_adjust_oneshot(m_timer, period, 0);
80	194	}
81	195
82	196
83		static TIMER_CALLBACK( f3853_timer_callback )
	197	TIMER_CALLBACK( f3853_device::f3853_timer_callback )
84	198	{
85		running_device *device = (running_device *)ptr;
86		f3853_t   *f3853 = get_safe_token( device );
	199	reinterpret_cast<f3853_device*>(ptr)->f3853_timer();
	200	}
87	201
88		if (f3853->timer_enable)
	202	void f3853_device::f3853_timer()
	203	{
	204	if(m_timer_enable)
89	205	{
90		f3853->request_flipflop = TRUE;
91		f3853_set_interrupt_request_line( device );
	206	m_request_flipflop = TRUE;
	207	f3853_set_interrupt_request_line();
92	208	}
93		f3853_timer_start( device, 0xfe);
	209	f3853_timer_start(0xfe);
94	210	}
95	211
96	212
97	213	void f3853_set_external_interrupt_in_line(running_device *device, int level)
98	214	{
99		f3853_t   *f3853 = get_safe_token( device );
	215	downcast<f3853_device*>(device)->f3853_set_external_interrupt_in_line(level);
	216	}
100	217
101		if ( f3853->external_interrupt_line && ! level && f3853->external_enable)
102		f3853->request_flipflop = TRUE;
103		f3853->external_interrupt_line = level;
104		f3853_set_interrupt_request_line( device );
	218	void f3853_device::f3853_set_external_interrupt_in_line(int level)
	219	{
	220	if(m_external_interrupt_line && !level && m_external_enable)
	221	{
	222	m_request_flipflop = TRUE;
	223	}
	224	m_external_interrupt_line = level;
	225	f3853_set_interrupt_request_line();
105	226	}
106	227
107	228
108	229	void f3853_set_priority_in_line(running_device *device, int level)
109	230	{
110		f3853_t   *f3853 = get_safe_token( device );
	231	downcast<f3853_device*>(device)->f3853_set_priority_in_line(level);
	232	}
111	233
112		f3853->priority_line = level;
113		f3853_set_interrupt_request_line( device );
	234	void f3853_device::f3853_set_priority_in_line(int level)
	235	{
	236	m_priority_line = level;
	237	f3853_set_interrupt_request_line();
114	238	}
115	239
116	240
117		READ8_DEVICE_HANDLER(f3853_r)
	241	READ8_DEVICE_HANDLER_TRAMPOLINE(f3853, f3853_r)
118	242	{
119		f3853_t   *f3853 = get_safe_token( device );
120		UINT8 data=0;
	243	UINT8 data = 0;
121	244
122	245	switch (offset)
123	246	{
124	247	case 0:
125		data = f3853->high;
	248	data = m_high;
126	249	break;
	250
127	251	case 1:
128		data = f3853->low;
	252	data = m_low;
129	253	break;
130		case 2: // interrupt control; not readable
131		case 3: // timer; not readable
	254
	255	case 2: // Interrupt control; not readable
	256	case 3: // Timer; not readable
132	257	break;
133	258	}
	259
134	260	return data;
135	261	}
136	262
137	263
138		WRITE8_DEVICE_HANDLER(f3853_w)
	264	WRITE8_DEVICE_HANDLER_TRAMPOLINE(f3853, f3853_w)
139	265	{
140		f3853_t   *f3853 = get_safe_token( device );
141		switch (offset)
	266	switch(offset)
142	267	{
143	268	case 0:
144		f3853->high = data;
	269	m_high = data;
145	270	break;
	271
146	272	case 1:
147		f3853->low = data;
	273	m_low = data;
148	274	break;
	275
149	276	case 2: //interrupt control
150		f3853->external_enable = ((data&3)==1);
151		f3853->timer_enable = ((data&3)==3);
152		f3853_set_interrupt_request_line( device );
	277	m_external_enable = ((data & 3) == 1);
	278	m_timer_enable = ((data & 3) == 3);
	279	f3853_set_interrupt_request_line();
153	280	break;
	281
154	282	case 3: //timer
155		f3853->request_flipflop = FALSE;
156		f3853_set_interrupt_request_line( device );
157		f3853_timer_start( device, data );
	283	m_request_flipflop = FALSE;
	284	f3853_set_interrupt_request_line();
	285	f3853_timer_start(data);
158	286	break;
159	287	}
160	288	}
161
162
163		static DEVICE_START( f3853 )
164		{
165		f3853_t *f3853 = get_safe_token( device );
166		UINT8 reg=0xfe;
167		int i;
168
169		f3853->config = (const f3853_config *)device->baseconfig().static_config();
170
171		for (i=254/*known to get 0xfe after 255 cycles*/; i>=0; i--)
172		{
173		int o7 = ( reg & 0x80 ) ? TRUE : FALSE;
174		int o5 = ( reg & 0x20 ) ? TRUE : FALSE;
175		int o4 = ( reg & 0x10 ) ? TRUE : FALSE;
176		int o3 = ( reg & 8 ) ? TRUE : FALSE;
177		f3853_value_to_cycle[reg]=i;
178		reg<<=1;
179		if (!((o7!=o5)!=(o4!=o3))) reg|=1;
180		}
181
182		f3853->timer = timer_alloc( device->machine, f3853_timer_callback, (void *)device );
183
184		state_save_register_device_item( device, 0, f3853->high );
185		state_save_register_device_item( device, 0, f3853->low );
186		state_save_register_device_item( device, 0, f3853->external_enable );
187		state_save_register_device_item( device, 0, f3853->timer_enable );
188		state_save_register_device_item( device, 0, f3853->request_flipflop );
189		state_save_register_device_item( device, 0, f3853->priority_line );
190		state_save_register_device_item( device, 0, f3853->external_interrupt_line );
191		}
192
193
194		static DEVICE_RESET( f3853 )
195		{
196		f3853_t   *f3853 = get_safe_token( device );
197
198		f3853->high = 0;
199		f3853->low = 0;
200		f3853->external_enable = 0;
201		f3853->timer_enable = 0;
202		f3853->request_flipflop = 0;
203		f3853->priority_line = FALSE;
204		f3853->external_interrupt_line = TRUE;
205
206		timer_enable( f3853->timer, 0 );
207		}
208
209
210		DEVICE_GET_INFO( f3853 )
211		{
212		switch ( state )
213		{
214		/* --- the following bits of info are returned as 64-bit signed integers --- */
215		case DEVINFO_INT_TOKEN_BYTES:            info->i = sizeof(f3853_t);                  break;
216		case DEVINFO_INT_INLINE_CONFIG_BYTES:      info->i = 0;                           break;
217
218		/* --- the following bits of info are returned as pointers to data or functions --- */
219		case DEVINFO_FCT_START:                  info->start = DEVICE_START_NAME(f3853);         break;
220		case DEVINFO_FCT_STOP:                  /* nothing */                           break;
221		case DEVINFO_FCT_RESET:                  info->reset = DEVICE_RESET_NAME(f3853);         break;
222
223		/* --- the following bits of info are returned as NULL-terminated strings --- */
224		case DEVINFO_STR_NAME:                  strcpy(info->s, "F3853");                  break;
225		case DEVINFO_STR_FAMILY:               strcpy(info->s, "F8");                     break;
226		case DEVINFO_STR_VERSION:               strcpy(info->s, "1.0");                     break;
227		case DEVINFO_STR_SOURCE_FILE:            strcpy(info->s, __FILE__);                  break;
228		case DEVINFO_STR_CREDITS:               strcpy(info->s, "Copyright the MAME and MESS Teams"); break;
229		}
230		}
231
232
233		DEFINE_LEGACY_DEVICE(F3853, f3853);

src/emu/machine/i8243.c

r8962	r8963
10	10
11	11	#include "emu.h"
12	12	#include "i8243.h"
	13	#include "devhelpr.h"
13	14
	15	//**************************************************************************
	16	//  DEVICE CONFIGURATION
	17	//**************************************************************************
14	18
15		/***************************************************************************
16		TYPE DEFINITIONS
17		***************************************************************************/
	19	GENERIC_DEVICE_CONFIG_SETUP(i8243, "I8243")
18	20
19		/* live processor state */
20		typedef struct _i8243_state i8243_state;
21		struct _i8243_state
	21	//-------------------------------------------------
	22	//  static_set_read_handler - configuration helper
	23	//  to set the read handler
	24	//-------------------------------------------------
	25
	26	void i8243_device_config::static_set_read_handler(device_config *device, read8_device_func callback)
22	27	{
23		UINT8      p[4];            /* 4 ports' worth of data */
24		UINT8      p2out;            /* port 2 bits that will be returned */
25		UINT8      p2;               /* most recent port 2 value */
26		UINT8      opcode;            /* latched opcode */
27		UINT8      prog;            /* previous PROG state */
28		};
	28	i8243_device_config *i8243 = downcast<i8243_device_config *>(device);
	29	if(callback != NULL)
	30	{
	31	i8243->m_readhandler.type = DEVCB_TYPE_SELF;
	32	i8243->m_readhandler.readdevice = callback;
	33	}
	34	else
	35	{
	36	i8243->m_readhandler.type = DEVCB_TYPE_NULL;
	37	}
	38	}
29	39
30	40
	41	//-------------------------------------------------
	42	//  static_set_write_handler - configuration helper
	43	//  to set the write handler
	44	//-------------------------------------------------
	45
	46	void i8243_device_config::static_set_write_handler(device_config *device, write8_device_func callback)
	47	{
	48	i8243_device_config *i8243 = downcast<i8243_device_config *>(device);
	49	if(callback != NULL)
	50	{
	51	i8243->m_writehandler.type = DEVCB_TYPE_SELF;
	52	i8243->m_writehandler.writedevice = callback;
	53	}
	54	else
	55	{
	56	i8243->m_writehandler.type = DEVCB_TYPE_NULL;
	57	}
	58	}
	59
	60
	61
31	62	/***************************************************************************
32		INLINE FUNCTIONS
	63	LIVE DEVICE
33	64	***************************************************************************/
34	65
35		INLINE i8243_state *get_safe_token(running_device *device)
	66	//**************************************************************************
	67	//  LIVE DEVICE
	68	//**************************************************************************
	69
	70	const device_type I8243 = i8243_device_config::static_alloc_device_config;
	71
	72	//-------------------------------------------------
	73	//  i8243_device - constructor
	74	//-------------------------------------------------
	75
	76	i8243_device::i8243_device(running_machine &_machine, const i8243_device_config &config)
	77	: device_t(_machine, config),
	78	m_config(config)
36	79	{
37		assert(device != NULL);
38		assert(device->type() == I8243);
39		return (i8243_state *)downcast<legacy_device_base *>(device)->token();
	80
40	81	}
41	82
	83	//-------------------------------------------------
	84	//  device_start - device-specific startup
	85	//-------------------------------------------------
42	86
43		INLINE i8243_config *get_safe_config(running_device *device)
	87	void i8243_device::device_start()
44	88	{
45		assert(device != NULL);
46		assert(device->type() == I8243);
47		return (i8243_config *)downcast<const legacy_device_config_base &>(device->baseconfig()).inline_config();
	89	devcb_resolve_read8(&m_readhandler, &m_config.m_readhandler, this);
	90	devcb_resolve_write8(&m_writehandler, &m_config.m_writehandler, this);
48	91	}
49	92
50	93
	94	//-------------------------------------------------
	95	//  device_reset - device-specific reset
	96	//-------------------------------------------------
51	97
52		/***************************************************************************
53		DEVICE INTERFACE
54		***************************************************************************/
	98	void i8243_device::device_reset()
	99	{
	100	m_p2 = 0x0f;
	101	m_p2out = 0x0f;
	102	m_prog = 1;
	103	}
55	104
	105
56	106	/*-------------------------------------------------
57	107	i8243_p2_r - handle a read from port 2
58	108	-------------------------------------------------*/
59	109
60		READ8_DEVICE_HANDLER( i8243_p2_r )
	110	READ8_DEVICE_HANDLER_TRAMPOLINE(i8243, i8243_p2_r)
61	111	{
62		i8243_state *i8243 = get_safe_token(device);
63		return i8243->p2out;
	112	return m_p2out;
64	113	}
65	114
66	115
r8962	r8963
68	117	i8243_p2_r - handle a write to port 2
69	118	-------------------------------------------------*/
70	119
71		WRITE8_DEVICE_HANDLER( i8243_p2_w )
	120	WRITE8_DEVICE_HANDLER_TRAMPOLINE(i8243, i8243_p2_w)
72	121	{
73		i8243_state *i8243 = get_safe_token(device);
74		i8243->p2 = data & 0x0f;
	122	m_p2 = data & 0x0f;
75	123	}
76	124
77	125
r8962	r8963
80	128	line state
81	129	-------------------------------------------------*/
82	130
83		WRITE8_DEVICE_HANDLER( i8243_prog_w )
	131	WRITE8_DEVICE_HANDLER_TRAMPOLINE(i8243, i8243_prog_w)
84	132	{
85		i8243_state *i8243 = get_safe_token(device);
86		i8243_config *config = get_safe_config(device);
87
88	133	/* only care about low bit */
89	134	data &= 1;
90	135
91	136	/* on high->low transition state, latch opcode/port */
92		if (i8243->prog && !data)
	137	if(m_prog && !data)
93	138	{
94		i8243->opcode = i8243->p2;
	139	m_opcode = m_p2;
95	140
96	141	/* if this is a read opcode, copy result to p2out */
97		if ((i8243->opcode >> 2) == MCS48_EXPANDER_OP_READ)
	142	if((m_opcode >> 2) == MCS48_EXPANDER_OP_READ)
98	143	{
99		if (config->readhandler != NULL)
100		i8243->p[i8243->opcode & 3] = (*config->readhandler)(device, i8243->opcode & 3);
101		i8243->p2out = i8243->p[i8243->opcode & 3] & 0x0f;
	144	if (m_readhandler.read != NULL)
	145	{
	146	m_p[m_opcode & 3] = devcb_call_read8(&m_readhandler, m_opcode & 3);
	147	}
	148	m_p2out = m_p[m_opcode & 3] & 0x0f;
102	149	}
103	150	}
104	151
105	152	/* on low->high transition state, act on opcode */
106		else if (!i8243->prog && data)
	153	else if(!m_prog && data)
107	154	{
108		switch (i8243->opcode >> 2)
	155	switch(m_opcode >> 2)
109	156	{
110	157	case MCS48_EXPANDER_OP_WRITE:
111		i8243->p[i8243->opcode & 3] = i8243->p2 & 0x0f;
112		if (config->writehandler != NULL)
113		(*config->writehandler)(device, i8243->opcode & 3, i8243->p[i8243->opcode & 3]);
	158	m_p[m_opcode & 3] = m_p2 & 0x0f;
	159	devcb_call_write8(&m_writehandler, m_opcode & 3, m_p[m_opcode & 3]);
114	160	break;
115	161
116	162	case MCS48_EXPANDER_OP_OR:
117		i8243->p[i8243->opcode & 3] |= i8243->p2 & 0x0f;
118		if (config->writehandler != NULL)
119		(*config->writehandler)(device, i8243->opcode & 3, i8243->p[i8243->opcode & 3]);
	163	m_p[m_opcode & 3] |= m_p2 & 0x0f;
	164	devcb_call_write8(&m_writehandler, m_opcode & 3, m_p[m_opcode & 3]);
120	165	break;
121	166
122	167	case MCS48_EXPANDER_OP_AND:
123		i8243->p[i8243->opcode & 3] &= i8243->p2 & 0x0f;
124		if (config->writehandler != NULL)
125		(*config->writehandler)(device, i8243->opcode & 3, i8243->p[i8243->opcode & 3]);
	168	m_p[m_opcode & 3] &= m_p2 & 0x0f;
	169	devcb_call_write8(&m_writehandler, m_opcode & 3, m_p[m_opcode & 3]);
126	170	break;
127	171	}
128	172	}
129	173
130	174	/* remember the state */
131		i8243->prog = data;
	175	m_prog = data;
132	176	}
133
134
135
136		/***************************************************************************
137		DEVICE INTERFACE
138		***************************************************************************/
139
140		/*-------------------------------------------------
141		DEVICE_START( i8243 )
142		-------------------------------------------------*/
143
144		static DEVICE_START( i8243 )
145		{
146		}
147
148
149		/*-------------------------------------------------
150		DEVICE_RESET( i8243 )
151		-------------------------------------------------*/
152
153		static DEVICE_RESET( i8243 )
154		{
155		i8243_state *i8243 = get_safe_token(device);
156
157		i8243->p2 = 0x0f;
158		i8243->p2out = 0x0f;
159		i8243->prog = 1;
160		}
161
162
163		/*-------------------------------------------------
164		DEVICE_GET_INFO( i8243 )
165		-------------------------------------------------*/
166
167		DEVICE_GET_INFO( i8243 )
168		{
169		switch (state)
170		{
171		/* --- the following bits of info are returned as 64-bit signed integers --- */
172		case DEVINFO_INT_TOKEN_BYTES:               info->i = sizeof(i8243_state);         break;
173		case DEVINFO_INT_INLINE_CONFIG_BYTES:         info->i = sizeof(i8243_config);         break;
174
175		/* --- the following bits of info are returned as pointers to data or functions --- */
176		case DEVINFO_FCT_START:         info->start = DEVICE_START_NAME(i8243);               break;
177		case DEVINFO_FCT_RESET:         info->reset = DEVICE_RESET_NAME(i8243);               break;
178
179		/* --- the following bits of info are returned as NULL-terminated strings --- */
180		case DEVINFO_STR_NAME:                     strcpy(info->s, "I8243");            break;
181		case DEVINFO_STR_FAMILY:                  strcpy(info->s, "MCS-48");            break;
182		case DEVINFO_STR_VERSION:                  strcpy(info->s, "1.0");               break;
183		case DEVINFO_STR_SOURCE_FILE:               strcpy(info->s, __FILE__);            break;
184		case DEVINFO_STR_CREDITS:                  /* Nothing */                     break;
185		}
186		}
187
188
189		DEFINE_LEGACY_DEVICE(I8243, i8243);

src/emu/machine/k056230.c

r8962	r8963
6	6
7	7	#include "emu.h"
8	8	#include "k056230.h"
	9	#include "devhelpr.h"
9	10
10		/***************************************************************************
11		TYPE DEFINITIONS
12		***************************************************************************/
13	11
14		typedef struct _k056230_state k056230_state;
15		struct _k056230_state
	12	//**************************************************************************
	13	//  DEVICE CONFIGURATION
	14	//**************************************************************************
	15
	16	GENERIC_DEVICE_CONFIG_SETUP(k056230, "Konami 056230")
	17
	18	//-------------------------------------------------
	19	//  device_config_complete - perform any
	20	//  operations now that the configuration is
	21	//  complete
	22	//-------------------------------------------------
	23
	24	void k056230_device_config::device_config_complete()
16	25	{
17		UINT32  *    ram;
18		int          is_thunderh;
	26	// inherit a copy of the static data
	27	const k056230_interface *intf = reinterpret_cast<const k056230_interface *>(static_config());
	28	if (intf != NULL)
	29	{
	30	*static_cast<k056230_interface *>(this) = *intf;
	31	}
19	32
20		running_device *cpu;
21		};
	33	// or initialize to defaults if none provided
	34	else
	35	{
	36	m_cpu = NULL;
	37	m_is_thunderh = 0;
	38	}
	39	}
22	40
23		/*****************************************************************************
24		INLINE FUNCTIONS
25		*****************************************************************************/
26	41
27		INLINE k056230_state *k056230_get_safe_token( running_device *device )
	42
	43	//**************************************************************************
	44	//  LIVE DEVICE
	45	//**************************************************************************
	46
	47	const device_type K0506230 = k056230_device_config::static_alloc_device_config;
	48
	49	//-------------------------------------------------
	50	//  k056230_device - constructor
	51	//-------------------------------------------------
	52
	53	k056230_device::k056230_device(running_machine &_machine, const k056230_device_config &config)
	54	: device_t(_machine, config),
	55	m_config(config)
28	56	{
29		assert(device != NULL);
30		assert(device->type() == K056230);
31	57
32		return (k056230_state *)downcast<legacy_device_base *>(device)->token();
33	58	}
34	59
35		INLINE const k056230_interface *k056230_get_interface( running_device *device )
	60	//-------------------------------------------------
	61	//  device_start - device-specific startup
	62	//-------------------------------------------------
	63
	64	void k056230_device::device_start()
36	65	{
37		assert(device != NULL);
38		assert((device->type() == K056230));
39		return (const k056230_interface *) device->baseconfig().static_config();
	66	if(m_config.m_cpu)
	67	{
	68	m_cpu = m_machine.device(m_config.m_cpu);
	69	}
	70	else
	71	{
	72	m_cpu = NULL;
	73	}
	74
	75	m_is_thunderh = m_config.m_is_thunderh;
	76
	77	m_ram = auto_alloc_array(&m_machine, UINT32, 0x2000);
	78
	79	state_save_register_device_item_pointer(this, 0, m_ram, 0x2000);
40	80	}
41	81
42		/*****************************************************************************
43		DEVICE HANDLERS
44		*****************************************************************************/
45	82
46		READ8_DEVICE_HANDLER( k056230_r )
	83	READ8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_r)
47	84	{
48	85	switch (offset)
49	86	{
r8962	r8963
58	95	return 0;
59	96	}
60	97
61		static TIMER_CALLBACK( network_irq_clear )
	98	TIMER_CALLBACK( k056230_device::network_irq_clear_callback )
62	99	{
63		k056230_state *k056230 = (k056230_state *)ptr;
64		cpu_set_input_line(k056230->cpu, INPUT_LINE_IRQ2, CLEAR_LINE);
	100	reinterpret_cast<k056230_device*>(ptr)->network_irq_clear();
65	101	}
66	102
67		WRITE8_DEVICE_HANDLER( k056230_w )
	103	void k056230_device::network_irq_clear()
68	104	{
69		k056230_state *k056230 = k056230_get_safe_token(device);
	105	if(m_cpu)
	106	{
	107	cpu_set_input_line(m_cpu, INPUT_LINE_IRQ2, CLEAR_LINE);
	108	}
	109	}
70	110
71		switch (offset)
	111
	112	WRITE8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_w)
	113	{
	114	switch(offset)
72	115	{
73	116	case 0:      // Mode register
74	117	{
r8962	r8963
76	119	}
77	120	case 1:      // Control register
78	121	{
79		if (data & 0x20)
	122	if(data & 0x20)
80	123	{
81	124	// Thunder Hurricane breaks otherwise...
82		if (!k056230->is_thunderh)
	125	if(!m_is_thunderh)
83	126	{
84		cpu_set_input_line(k056230->cpu, INPUT_LINE_IRQ2, ASSERT_LINE);
85		timer_set(device->machine, ATTOTIME_IN_USEC(10), k056230, 0, network_irq_clear);
	127	if(m_cpu)
	128	{
	129	cpu_set_input_line(m_cpu, INPUT_LINE_IRQ2, ASSERT_LINE);
	130	}
	131	timer_set(&m_machine, ATTOTIME_IN_USEC(10), (void*)this, 0, network_irq_clear_callback);
86	132	}
87	133	}
88	134	//          else
r8962	r8963
97	143	//  mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, cpu_get_pc(space->cpu));
98	144	}
99	145
100		READ32_DEVICE_HANDLER( lanc_ram_r )
	146	READ32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_r)
101	147	{
102		k056230_state *k056230 = k056230_get_safe_token(device);
103
104	148	//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(space->cpu));
105		return k056230->ram[offset & 0x7ff];
	149	return m_ram[offset & 0x7ff];
106	150	}
107	151
108		WRITE32_DEVICE_HANDLER( lanc_ram_w )
	152	WRITE32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_w)
109	153	{
110		k056230_state *k056230 = k056230_get_safe_token(device);
111
112	154	//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(space->cpu));
113		COMBINE_DATA(k056230->ram + (offset & 0x7ff));
	155	COMBINE_DATA(m_ram + (offset & 0x7ff));
114	156	}
115
116		/*****************************************************************************
117		DEVICE INTERFACE
118		*****************************************************************************/
119
120		static DEVICE_START( k056230 )
121		{
122		k056230_state *k056230 = k056230_get_safe_token(device);
123		const k056230_interface *intf = k056230_get_interface(device);
124
125		k056230->cpu = device->machine->device(intf->cpu);
126		k056230->is_thunderh = intf->is_thunderh;
127
128		k056230->ram = auto_alloc_array(device->machine, UINT32, 0x2000);
129
130		state_save_register_device_item_pointer(device, 0, k056230->ram, 0x2000);
131		}
132
133		/*-------------------------------------------------
134		device definition
135		-------------------------------------------------*/
136
137		static const char DEVTEMPLATE_SOURCE[] = __FILE__;
138
139		#define DEVTEMPLATE_ID( p, s )   p##k056230##s
140		#define DEVTEMPLATE_FEATURES         DT_HAS_START
141		#define DEVTEMPLATE_NAME      "Konami 056230"
142		#define DEVTEMPLATE_FAMILY      "Konami Network Board 056230"
143		#include "devtempl.h"
144
145
146		DEFINE_LEGACY_DEVICE(K056230, k056230);

src/emu/machine/f3853.h

r8962	r8963
1		/*
2		fairchild f3853 static ram interface smi
3		with integrated interrupt controller and timer
	1	/**********************************************************************
4	2
5		timer shift register basically the same as in f3851!
6		*/
	3	Fairchild F3853 SRAM interface with integrated interrupt
	4	controller and timer
7	5
	6	This chip is a timer shift register, basically the same as in the
	7	F3851.
	8
	9	**********************************************************************/
	10
8	11	#pragma once
9	12
10	13	#ifndef __F3853_H__
11	14	#define __F3853_H__
12	15
13		#include "devlegcy.h"
	16	#include "emu.h"
14	17
15		DECLARE_LEGACY_DEVICE(F3853, f3853);
16	18
	19
	20
	21	//**************************************************************************
	22	//  INTERFACE CONFIGURATION MACROS
	23	//**************************************************************************
	24
	25	#define MDRV_F3853_ADD(_tag, _clock, _intrf) \
	26	MDRV_DEVICE_ADD(_tag, F3853, _clock) \
	27	MDRV_DEVICE_CONFIG(_intrf)
	28
	29
	30
17	31	/***************************************************************************
18	32	TYPE DEFINITIONS
19	33	***************************************************************************/
20	34
21		typedef struct _f3853_config f3853_config;
22		struct _f3853_config
	35
	36	// ======================> f3853_interface
	37
	38	struct f3853_interface
23	39	{
24		void (*interrupt_request)(running_device *device, UINT16 addr, int level);
	40	void (*m_interrupt_request)(running_device *device, UINT16 addr, int level);
25	41	};
26	42
27	43
	44	// ======================> f3853_device_config
	45
	46	class f3853_device_config :   public device_config,
	47	public f3853_interface
	48	{
	49	friend class f3853_device;
	50
	51	// construction/destruction
	52	f3853_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	53
	54	public:
	55	// allocators
	56	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	57	virtual device_t *alloc_device(running_machine &machine) const;
	58
	59	protected:
	60	// device_config overrides
	61	virtual void device_config_complete();
	62	};
	63
	64
	65	// ======================> f3853_device
	66
	67	class f3853_device :  public device_t
	68	{
	69	friend class f3853_device_config;
	70
	71	// construction/destruction
	72	f3853_device(running_machine &_machine, const f3853_device_config &_config);
	73
	74	public:
	75
	76	UINT8 f3853_r(UINT32 offset);
	77	void f3853_w(UINT32 offset, UINT8 data);
	78
	79	void f3853_set_external_interrupt_in_line(int level);
	80	void f3853_set_priority_in_line(int level);
	81
	82	protected:
	83	// device-level overrides
	84	virtual void device_start();
	85	virtual void device_reset();
	86	virtual void device_post_load() { }
	87	virtual void device_clock_changed() { }
	88
	89	static TIMER_CALLBACK( f3853_timer_callback );
	90
	91	private:
	92
	93	void f3853_set_interrupt_request_line();
	94	void f3853_timer_start(UINT8 value);
	95	void f3853_timer();
	96
	97	UINT8 m_high;
	98	UINT8 m_low; // Bit 7 is set to 0 for timer interrupts, 1 for external interrupts
	99	INT32 m_external_enable;
	100	INT32 m_timer_enable;
	101
	102	INT32 m_request_flipflop;
	103
	104	INT32 m_priority_line;            /* inverted level*/
	105	INT32 m_external_interrupt_line;   /* inverted level */
	106
	107	emu_timer *m_timer;
	108
	109	UINT8 m_value_to_cycle[0x100];
	110
	111	const f3853_device_config &m_config;
	112	};
	113
	114
	115	// device type definition
	116	extern const device_type F3853;
	117
	118
	119
28	120	/***************************************************************************
29		DEVICE CONFIGURATION MACROS
	121	PROTOTYPES
30	122	***************************************************************************/
31	123
32		#define MDRV_F3853_ADD(_tag, _clock, _intrf) \
33		MDRV_DEVICE_ADD(_tag, F3853, _clock) \
34		MDRV_DEVICE_CONFIG(_intrf)
	124	READ8_DEVICE_HANDLER( f3853_r );
	125	WRITE8_DEVICE_HANDLER( f3853_w );
35	126
36
37		READ8_DEVICE_HANDLER(f3853_r);
38		WRITE8_DEVICE_HANDLER(f3853_w);
39
40	127	void f3853_set_external_interrupt_in_line(running_device *device, int level);
41	128	void f3853_set_priority_in_line(running_device *device, int level);
42	129

src/emu/machine/i8243.h

r8962	r8963
13	13	#ifndef __I8243_H__
14	14	#define __I8243_H__
15	15
16		#include "devlegcy.h"
	16	#include "emu.h"
17	17	#include "cpu/mcs48/mcs48.h"
18	18
19	19
	20
20	21	/***************************************************************************
	22	DEVICE CONFIGURATION MACROS
	23	***************************************************************************/
	24
	25	#define MDRV_I8243_ADD(_tag, _read, _write) \
	26	MDRV_DEVICE_ADD(_tag, I8243, 0) \
	27	MDRV_I8243_READHANDLER(_read) \
	28	MDRV_I8243_WRITEHANDLER(_write) \
	29
	30	#define MDRV_I8243_READHANDLER(_read) \
	31	i8243_device_config::static_set_read_handler(device, _read); \
	32
	33	#define MDRV_I8243_WRITEHANDLER(_write) \
	34	i8243_device_config::static_set_write_handler(device, _write); \
	35
	36	/***************************************************************************
21	37	TYPE DEFINITIONS
22	38	***************************************************************************/
23	39
24		typedef struct _i8243_config i8243_config;
25		struct _i8243_config
	40
	41	// ======================> i8243_device_config
	42
	43	class i8243_device_config : public device_config
26	44	{
27		read8_device_func      readhandler;
28		write8_device_func      writehandler;
	45	friend class i8243_device;
	46
	47	// construction/destruction
	48	i8243_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	49
	50	public:
	51	// allocators
	52	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	53	virtual device_t *alloc_device(running_machine &machine) const;
	54
	55	// inline configuration helpers
	56	static void static_set_read_handler(device_config *device, read8_device_func callback);
	57	static void static_set_write_handler(device_config *device, write8_device_func callback);
	58
	59	protected:
	60	devcb_read8      m_readhandler;
	61	devcb_write8   m_writehandler;
29	62	};
30	63
31	64
	65	// ======================> i8243_device
32	66
33		/***************************************************************************
34		MACROS
35		***************************************************************************/
	67	class i8243_device :  public device_t
	68	{
	69	friend class i8243_device_config;
36	70
37		DECLARE_LEGACY_DEVICE(I8243, i8243);
	71	// construction/destruction
	72	i8243_device(running_machine &_machine, const i8243_device_config &_config);
38	73
	74	public:
39	75
40		#define MDRV_I8243_ADD(_tag, _read, _write) \
41		MDRV_DEVICE_ADD(_tag, I8243, 0) \
42		MDRV_DEVICE_CONFIG_DATAPTR(i8243_config, readhandler, _read) \
43		MDRV_DEVICE_CONFIG_DATAPTR(i8243_config, writehandler, _write)
	76	UINT8 i8243_p2_r(UINT32 offset);
	77	void i8243_p2_w(UINT32 offset, UINT8 data);
44	78
	79	void i8243_prog_w(UINT32 offset, UINT8 data);
45	80
	81	protected:
	82	// device-level overrides
	83	virtual void device_start();
	84	virtual void device_reset();
	85	virtual void device_post_load() { }
	86	virtual void device_clock_changed() { }
46	87
	88	private:
	89
	90	UINT8      m_p[4];            /* 4 ports' worth of data */
	91	UINT8      m_p2out;         /* port 2 bits that will be returned */
	92	UINT8      m_p2;            /* most recent port 2 value */
	93	UINT8      m_opcode;         /* latched opcode */
	94	UINT8      m_prog;            /* previous PROG state */
	95
	96	devcb_resolved_read8   m_readhandler;
	97	devcb_resolved_write8   m_writehandler;
	98
	99	const i8243_device_config &m_config;
	100	};
	101
	102
	103	// device type definition
	104	extern const device_type I8243;
	105
	106
	107
47	108	/***************************************************************************
48		FUNCTION PROTOTYPES
	109	PROTOTYPES
49	110	***************************************************************************/
50	111
51	112	READ8_DEVICE_HANDLER( i8243_p2_r );

src/emu/machine/k056230.h

r8962	r8963
4	4
5	5	***************************************************************************/
6	6
	7	#pragma once
	8
7	9	#ifndef __K056230_H__
8	10	#define __K056230_H__
9	11
10		#include "devlegcy.h"
	12	#include "emu.h"
11	13
12	14
	15
13	16	/***************************************************************************
	17	DEVICE CONFIGURATION MACROS
	18	***************************************************************************/
	19
	20	#define MDRV_K056230_ADD(_tag, _config) \
	21	MDRV_DEVICE_ADD(_tag, K0506230, 0) \
	22	MDRV_DEVICE_CONFIG(_config)
	23
	24
	25	/***************************************************************************
14	26	TYPE DEFINITIONS
15	27	***************************************************************************/
16	28
17		typedef struct _k056230_interface k056230_interface;
18		struct _k056230_interface
	29
	30	// ======================> k056230_interface
	31
	32	struct k056230_interface
19	33	{
20		const char         *cpu;
21		int                is_thunderh;
	34	const char         *m_cpu;
	35	int                m_is_thunderh;
22	36	};
23	37
24		DECLARE_LEGACY_DEVICE(K056230, k056230);
25	38
26	39
27		/***************************************************************************
28		MACROS / CONSTANTS
29		***************************************************************************/
	40	// ======================> k056230_device_config
30	41
31		#define MDRV_K056230_ADD(_tag, _config) \
32		MDRV_DEVICE_ADD(_tag, K056230, 0) \
33		MDRV_DEVICE_CONFIG(_config)
	42	class k056230_device_config : public device_config,
	43	public k056230_interface
	44	{
	45	friend class k056230_device;
34	46
	47	// construction/destruction
	48	k056230_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
35	49
	50	public:
	51	// allocators
	52	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	53	virtual device_t *alloc_device(running_machine &machine) const;
	54
	55	protected:
	56	// device_config overrides
	57	virtual void device_config_complete();
	58	};
	59
	60
	61
	62	// ======================> k056230_device
	63
	64	class k056230_device :  public device_t
	65	{
	66	friend class k056230_device_config;
	67
	68	// construction/destruction
	69	k056230_device(running_machine &_machine, const k056230_device_config &_config);
	70
	71	public:
	72
	73	UINT32 lanc_ram_r(UINT32 offset);
	74	void lanc_ram_w(UINT32 offset, UINT32 data, UINT32 mem_mask);
	75
	76	UINT8 k056230_r(UINT32 offset);
	77	void k056230_w(UINT32 offset, UINT8 data);
	78
	79	static TIMER_CALLBACK( network_irq_clear_callback );
	80
	81	protected:
	82	// device-level overrides
	83	virtual void device_start();
	84	virtual void device_reset() { }
	85	virtual void device_post_load() { }
	86	virtual void device_clock_changed() { }
	87
	88	private:
	89
	90	void network_irq_clear();
	91
	92	UINT32 *m_ram;
	93	int      m_is_thunderh;
	94
	95	running_device *m_cpu;
	96
	97	const k056230_device_config &m_config;
	98	};
	99
	100
	101	// device type definition
	102	extern const device_type K0506230;
	103
	104
	105
36	106	/***************************************************************************
37		DEVICE I/O FUNCTIONS
	107	PROTOTYPES
38	108	***************************************************************************/
39	109
40	110	extern READ32_DEVICE_HANDLER( lanc_ram_r );

src/emu/machine/6850acia.c

r8962	r8963
52	52
53	53	const device_type ACIA6850 = acia6850_device_config::static_alloc_device_config;
54	54
55		GENERIC_DEVICE_CONFIG_SETUP(acia6850, "ACIA6850")
	55	GENERIC_DEVICE_CONFIG_SETUP(acia6850, "6850 ACIA")
56	56
57	57	//-------------------------------------------------
58	58	//  device_config_complete - perform any

src/emu/machine/z80dart.c

r8962	r8963
5	5	Copyright (c) 2008, The MESS Team.
6	6	Visit http://mamedev.org for licensing and usage restrictions.
7	7
8		The z80dart/z80sio itself is based on an older intel serial chip, the i8274 MPSC
9		(see http://doc.chipfind.ru/pdf/intel/8274.pdf), which also has almost identical
10		behavior, except lacks the interrupt daisy chaining and has its own interrupt/dma
11		scheme which uses write register 2 on channel A, that register which is unused on
12		the z80dart and z80sio.
	8	The z80dart/z80sio itself is based on an older intel serial chip, the i8274 MPSC
	9	(see http://doc.chipfind.ru/pdf/intel/8274.pdf), which also has almost identical
	10	behavior, except lacks the interrupt daisy chaining and has its own interrupt/dma
	11	scheme which uses write register 2 on channel A, that register which is unused on
	12	the z80dart and z80sio.
13	13
14	14	***************************************************************************/
15	15
r8962	r8963
21	21	- wr0 reset tx interrupt pending
22	22	- wait/ready
23	23	- 1.5 stop bits
24		- synchronous mode (Z80-SIO/1,2)
25		- SDLC mode (Z80-SIO/1,2)
	24	- synchronous mode (Z80-SIO/1,2)
	25	- SDLC mode (Z80-SIO/1,2)
26	26
27	27	*/
28	28

src/emu/machine/8237dma.c

r8962	r8963
48	48	//  DEVICE CONFIGURATION
49	49	//**************************************************************************
50	50
51		GENERIC_DEVICE_CONFIG_SETUP(i8237, "I8237")
	51	GENERIC_DEVICE_CONFIG_SETUP(i8237, "Intel 8237")
52	52
53	53	//-------------------------------------------------
54	54	//  device_config_complete - perform any
r8962	r8963
245	245	}
246	246
247	247
248		void i8237_device::set_dack(int channel)
	248	void i8237_device::i8327_set_dack(int channel)
249	249	{
250	250	for (int i = 0; i < 4; i++)
251	251	{
r8962	r8963
284	284
285	285	/* Check if a new DMA request has been received. */
286	286	/* Bit 6 of the command register determines whether the DREQ signals are active
287		high or active low. */
	287	high or active low. */
288	288	UINT16 pending_request = ( ( m_command & 0x40 ) ? ~m_drq : m_drq ) & ~m_mask;
289	289
290	290	if ( pending_request & 0x0f )
r8962	r8963
342	342
343	343	case DMA8237_S2:   /* Output A7-A0 */
344	344	/* set DACK */
345		set_dack(m_service_channel);
	345	i8327_set_dack(m_service_channel);
346	346
347	347	/* Check for compressed timing */
348	348	if ( m_command & 0x08 )
r8962	r8963
436	436	}
437	437
438	438	/* clear DACK */
439		set_dack(-1);
	439	i8327_set_dack(-1);
440	440	break;
441	441
442	442	case DMA8237_S11:   /* Output A8-A15 */

src/emu/machine/eeprom.c

r8962	r8963
107	107
108	108
109	109	//-------------------------------------------------
110		//  static_set_interface - configuration helper
	110	//  static_set_interface - configuration helper
111	111	//  to set the interface
112	112	//-------------------------------------------------
113	113
r8962	r8963
133	133	{
134	134	eeprom_device_config *eeprom = downcast<eeprom_device_config *>(device);
135	135	if (eeprom->m_data_bits != 8) mame_printf_warning("16-bit EEPROM set with 8-bit data\n");
136		//   assert(eeprom->m_data_bits == 8);
	136	//  assert(eeprom->m_data_bits == 8);
137	137	eeprom->m_default_data = data;
138	138	eeprom->m_default_data_size = size;
139	139	}
r8962	r8963
142	142	{
143	143	eeprom_device_config *eeprom = downcast<eeprom_device_config *>(device);
144	144	if (eeprom->m_data_bits != 16) mame_printf_warning("8-bit EEPROM set with 16-bit data\n");
145		//   assert(eeprom->m_data_bits == 16);
	145	//  assert(eeprom->m_data_bits == 16);
146	146	eeprom->m_default_data = reinterpret_cast<const UINT8 *>(data);
147	147	eeprom->m_default_data_size = size;
148	148	}

src/emu/machine/8237dma.h

r8962	r8963
135	135	void i8237_do_read();
136	136	void i8237_do_write();
137	137	void i8237_advance();
138		void set_dack(int channel);
	138	void i8327_set_dack(int channel);
139	139
140	140	/* States that the i8237 device can be in */
141	141	enum dma8237_state

src/emu/machine/pci.c

r8962	r8963
81	81	running_device *   busdevice;
82	82	const pci_bus_config *   config;
83	83	running_device *   device[32];
	84	pci_bus_state *      siblings[8];
	85	UINT8            siblings_busnum[8];
	86	int               siblings_count;
84	87	offs_t               address;
85		INT8               devicenum;
	88	INT8               devicenum; // device number we are addressing
	89	INT8               busnum; // pci bus number we are addressing
	90	pci_bus_state *      busnumaddr; // pci bus we are addressing
86	91	};
87	92
88	93
r8962	r8963
93	98
94	99	/*-------------------------------------------------
95	100	get_safe_token - makes sure that the passed
96		in device is, in fact, an IDE controller
	101	in device is, in fact, a PCI bus
97	102	-------------------------------------------------*/
98	103
99	104	INLINE pci_bus_state *get_safe_token(running_device *device)
r8962	r8963
123	128	case 1:
124	129	if (pcibus->devicenum != -1)
125	130	{
126		pci_read_func read = pcibus->config->device[pcibus->devicenum].read_callback;
	131	pci_read_func read = pcibus->busnumaddr->config->device[pcibus->devicenum].read_callback;
127	132	if (read != NULL)
128	133	{
129	134	function = (pcibus->address >> 8) & 0x07;
130	135	reg = (pcibus->address >> 0) & 0xfc;
131		result = (*read)(device, pcibus->device[pcibus->devicenum], function, reg, mem_mask);
	136	result = (*read)(pcibus->busnumaddr->busdevice, pcibus->busnumaddr->device[pcibus->devicenum], function, reg, mem_mask);
132	137	}
133	138	}
134	139	break;
r8962	r8963
142	147
143	148
144	149
	150	static pci_bus_state *pci_search_bustree(int busnum, int devicenum, pci_bus_state *pcibus)
	151	{
	152	int a;
	153	pci_bus_state *ret;
	154
	155	if (pcibus->config->busnum == busnum)
	156	{
	157	return pcibus;
	158	}
	159	for (a = 0; a < pcibus->siblings_count; a++)
	160	{
	161	ret = pci_search_bustree(busnum, devicenum, pcibus->siblings[a]);
	162	if (ret != NULL)
	163	return ret;
	164	}
	165	return NULL;
	166	}
	167
	168
	169
145	170	WRITE32_DEVICE_HANDLER( pci_32le_w )
146	171	{
147	172	pci_bus_state *pcibus = get_safe_token(device);
r8962	r8963
161	186	{
162	187	int busnum = (pcibus->address >> 16) & 0xff;
163	188	int devicenum = (pcibus->address >> 11) & 0x1f;
164		pcibus->devicenum = (busnum == pcibus->config->busnum) ? devicenum : -1;
	189	pcibus->busnumaddr = pci_search_bustree(busnum, devicenum, pcibus);
	190	if (pcibus->busnumaddr != NULL)
	191	{
	192	pcibus->busnum = busnum;
	193	pcibus->devicenum = devicenum;
	194	}
	195	else
	196	pcibus->devicenum = -1;
	197	if (LOG_PCI)
	198	logerror("  bus:%d device:%d\n", busnum, devicenum);
165	199	}
166	200	break;
167	201
168	202	case 1:
169	203	if (pcibus->devicenum != -1)
170	204	{
171		pci_write_func write = pcibus->config->device[pcibus->devicenum].write_callback;
	205	pci_write_func write = pcibus->busnumaddr->config->device[pcibus->devicenum].write_callback;
172	206	if (write != NULL)
173	207	{
174	208	int function = (pcibus->address >> 8) & 0x07;
175	209	int reg = (pcibus->address >> 0) & 0xfc;
176		(*write)(device, pcibus->device[pcibus->devicenum], function, reg, data, mem_mask);
	210	(*write)(pcibus->busnumaddr->busdevice, pcibus->busnumaddr->device[pcibus->devicenum], function, reg, data, mem_mask);
177	211	}
	212	if (LOG_PCI)
	213	logerror("  function:%d register:%d\n", (pcibus->address >> 8) & 0x07, (pcibus->address >> 0) & 0xfc);
178	214	}
179	215	break;
180	216	}
r8962	r8963
186	222	WRITE64_DEVICE_HANDLER(pci_64be_w) { write64be_with_32le_device_handler(pci_32le_w, device, offset, data, mem_mask); }
187	223
188	224
	225	int pci_add_sibling( running_machine *machine, char *pcitag, char *sibling )
	226	{
	227	running_device *device1 = machine->device(pcitag);
	228	running_device *device2 = machine->device(sibling);
	229	pci_bus_state *pcibus1 = get_safe_token(device1);
	230	pci_bus_state *pcibus2 = get_safe_token(device2);
	231	pci_bus_config *config2;
189	232
	233	if ((device1 == NULL) || (device2 == NULL) || (pcibus1 == NULL) || (pcibus2 == NULL))
	234	return 0;
	235	if (pcibus1->siblings_count == 8)
	236	return 0;
	237	config2 = (pci_bus_config *)downcast<const legacy_device_config_base &>(device2->baseconfig()).inline_config();
	238	pcibus1->siblings[pcibus1->siblings_count] = get_safe_token(device2);
	239	pcibus1->siblings_busnum[pcibus1->siblings_count] = config2->busnum;
	240	pcibus1->siblings_count++;
	241	return 1;
	242	}
190	243
191	244
192	245	/***************************************************************************
193	246	DEVICE INTERFACE
194	247	***************************************************************************/
195	248
	249
	250	static STATE_POSTLOAD( pci_bus_postload )
	251	{
	252	pci_bus_state *pcibus = (pci_bus_state *)param;
	253
	254	if (pcibus->devicenum != -1)
	255	{
	256	pcibus->busnumaddr = pci_search_bustree(pcibus->busnum, pcibus->devicenum, pcibus);
	257	}
	258	}
	259
	260
196	261	/*-------------------------------------------------
197	262	device start callback
198	263	-------------------------------------------------*/
r8962	r8963
219	284	if (pcibus->config->device[devicenum].devtag != NULL)
220	285	pcibus->device[devicenum] = device->machine->device(pcibus->config->device[devicenum].devtag);
221	286
	287	if (pcibus->config->father != NULL)
	288	pci_add_sibling(device->machine, (char *)pcibus->config->father, (char *)device->tag());
	289
222	290	/* register pci states */
223	291	state_save_register_device_item(device, 0, pcibus->address);
224	292	state_save_register_device_item(device, 0, pcibus->devicenum);
	293	state_save_register_device_item(device, 0, pcibus->busnum);
	294
	295	state_save_register_postload(device->machine, pci_bus_postload, pcibus);
225	296	}
226	297
227	298

src/emu/machine/pci.h

r8962	r8963
32	32	{
33	33	UINT8            busnum;
34	34	pci_device_entry   device[32];
	35	const char *      father;
35	36	};
36	37
37	38
r8962	r8963
49	50	MDRV_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(pci_bus_config, device, _devnum, pci_device_entry, read_callback, _configread) \
50	51	MDRV_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(pci_bus_config, device, _devnum, pci_device_entry, write_callback, _configwrite)
51	52
	53	#define MDRV_PCI_BUS_SIBLING(_father_tag) \
	54	MDRV_DEVICE_CONFIG_DATAPTR(pci_bus_config, father, _father_tag)
52	55
53	56
54	57	/***************************************************************************
r8962	r8963
61	64	READ64_DEVICE_HANDLER( pci_64be_r );
62	65	WRITE64_DEVICE_HANDLER( pci_64be_w );
63	66
	67	int pci_add_sibling( running_machine *machine, char *pcitag, char *sibling );
64	68
65	69	/* ----- device interface ----- */
66	70

src/emu/machine/ds2404.c

r8962	r8963
1		/* Dallas DS2404 RTC/NVRAM */
	1	/**********************************************************************
2	2
	3	DALLAS DS2404
	4
	5	RTC + BACKUP RAM
	6
	7	**********************************************************************/
	8
3	9	#include "emu.h"
4	10	#include "ds2404.h"
5	11	#include <time.h>
	12	#include "devhelpr.h"
6	13
7		typedef enum {
8		DS2404_STATE_IDLE = 1,            /* waiting for ROM command, in 1-wire mode */
9		DS2404_STATE_COMMAND,            /* waiting for memory command */
10		DS2404_STATE_ADDRESS1,            /* waiting for address bits 0-7 */
11		DS2404_STATE_ADDRESS2,            /* waiting for address bits 8-15 */
12		DS2404_STATE_OFFSET,            /* waiting for ending offset */
13		DS2404_STATE_INIT_COMMAND,
14		DS2404_STATE_READ_MEMORY,         /* Read Memory command active */
15		DS2404_STATE_WRITE_SCRATCHPAD,      /* Write Scratchpad command active */
16		DS2404_STATE_READ_SCRATCHPAD,      /* Read Scratchpad command active */
17		DS2404_STATE_COPY_SCRATCHPAD      /* Copy Scratchpad command active */
18		} DS2404_STATE;
	14	/***************************************************************************
	15	IMPLEMENTATION
	16	***************************************************************************/
19	17
20		typedef struct _ds2404_state ds2404_state;
21		struct _ds2404_state {
22		UINT16 address;
23		UINT16 offset;
24		UINT16 end_offset;
25		UINT8 a1, a2;
26		UINT8 sram[512];   /* 4096 bits */
27		UINT8 ram[32];      /* scratchpad ram, 256 bits */
28		UINT8 rtc[5];      /* 40-bit RTC counter */
29		DS2404_STATE state[8];
30		int state_ptr;
31		};
	18	//**************************************************************************
	19	//  DEVICE CONFIGURATION
	20	//**************************************************************************
32	21
33		INLINE ds2404_state *get_safe_token(running_device *device)
	22	//-------------------------------------------------
	23	//  ds2404_device_config - constructor
	24	//-------------------------------------------------
	25
	26	ds2404_device_config::ds2404_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
	27	: device_config(mconfig, static_alloc_device_config, "DS2404", tag, owner, clock),
	28	device_config_nvram_interface(mconfig, *this)
34	29	{
35		assert(device != NULL);
36		assert(device->type() == DS2404);
	30	}
37	31
38		return (ds2404_state *)downcast<legacy_device_base *>(device)->token();
	32
	33	//-------------------------------------------------
	34	//  static_alloc_device_config - allocate a new
	35	//  configuration object
	36	//-------------------------------------------------
	37
	38	device_config *ds2404_device_config::static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
	39	{
	40	return global_alloc(ds2404_device_config(mconfig, tag, owner, clock));
39	41	}
40	42
41	43
42		static void ds2404_rom_cmd(ds2404_state *state, UINT8 cmd)
	44	//-------------------------------------------------
	45	//  alloc_device - allocate a new device object
	46	//-------------------------------------------------
	47
	48	device_t *ds2404_device_config::alloc_device(running_machine &machine) const
43	49	{
	50	return auto_alloc(&machine, ds2404_device(machine, *this));
	51	}
	52
	53
	54	//-------------------------------------------------
	55	//  static_set_ref_year - configuration helper
	56	//  to set the reference year
	57	//-------------------------------------------------
	58
	59	void ds2404_device_config::static_set_ref_year(device_config *device, UINT32 year)
	60	{
	61	ds2404_device_config *ds2404 = downcast<ds2404_device_config *>(device);
	62	ds2404->m_ref_year = year;
	63	}
	64
	65
	66	//-------------------------------------------------
	67	//  static_set_ref_month - configuration helper
	68	//  to set the reference month
	69	//-------------------------------------------------
	70
	71	void ds2404_device_config::static_set_ref_month(device_config *device, UINT8 month)
	72	{
	73	ds2404_device_config *ds2404 = downcast<ds2404_device_config *>(device);
	74	ds2404->m_ref_month = month;
	75	}
	76
	77
	78	//-------------------------------------------------
	79	//  static_set_ref_day - configuration helper
	80	//  to set the reference day
	81	//-------------------------------------------------
	82
	83	void ds2404_device_config::static_set_ref_day(device_config *device, UINT8 day)
	84	{
	85	ds2404_device_config *ds2404 = downcast<ds2404_device_config *>(device);
	86	ds2404->m_ref_day = day;
	87	}
	88
	89
	90	//**************************************************************************
	91	//  LIVE DEVICE
	92	//**************************************************************************
	93
	94	const device_type DS2404 = ds2404_device_config::static_alloc_device_config;
	95
	96	//-------------------------------------------------
	97	//  ds2404_device - constructor
	98	//-------------------------------------------------
	99
	100	ds2404_device::ds2404_device(running_machine &_machine, const ds2404_device_config &config)
	101	: device_t(_machine, config),
	102	device_nvram_interface(_machine, config, *this),
	103	m_config(config)
	104	{
	105	}
	106
	107	//-------------------------------------------------
	108	//  device_start - device-specific startup
	109	//-------------------------------------------------
	110
	111	void ds2404_device::device_start()
	112	{
	113	struct tm ref_tm;
	114
	115	memset(&ref_tm, 0, sizeof(ref_tm));
	116	ref_tm.tm_year = m_config.m_ref_year - 1900;
	117	ref_tm.tm_mon = m_config.m_ref_month - 1;
	118	ref_tm.tm_mday = m_config.m_ref_day;
	119
	120	time_t ref_time = mktime(&ref_tm);
	121
	122	time_t current_time;
	123	time(&current_time);
	124	current_time -= ref_time;
	125
	126	m_rtc[0] = 0x0;
	127	m_rtc[1] = (current_time >> 0) & 0xff;
	128	m_rtc[2] = (current_time >> 8) & 0xff;
	129	m_rtc[3] = (current_time >> 16) & 0xff;
	130	m_rtc[4] = (current_time >> 24) & 0xff;
	131
	132	emu_timer *timer = timer_alloc(&m_machine, ds2404_tick_callback, (void *)this);
	133	timer_adjust_periodic(timer, ATTOTIME_IN_HZ(256), 0, ATTOTIME_IN_HZ(256));
	134	}
	135
	136
	137	void ds2404_device::ds2404_rom_cmd(UINT8 cmd)
	138	{
44	139	switch(cmd)
45	140	{
46	141	case 0xcc:      /* Skip ROM */
47		state->state[0] = DS2404_STATE_COMMAND;
48		state->state_ptr = 0;
	142	m_state[0] = DS2404_STATE_COMMAND;
	143	m_state_ptr = 0;
49	144	break;
50	145
51	146	default:
r8962	r8963
54	149	}
55	150	}
56	151
57		static void ds2404_cmd(ds2404_state *state, UINT8 cmd)
	152	void ds2404_device::ds2404_cmd(UINT8 cmd)
58	153	{
59	154	switch(cmd)
60	155	{
61	156	case 0x0f:      /* Write scratchpad */
62		state->state[0] = DS2404_STATE_ADDRESS1;
63		state->state[1] = DS2404_STATE_ADDRESS2;
64		state->state[2] = DS2404_STATE_INIT_COMMAND;
65		state->state[3] = DS2404_STATE_WRITE_SCRATCHPAD;
66		state->state_ptr = 0;
	157	m_state[0] = DS2404_STATE_ADDRESS1;
	158	m_state[1] = DS2404_STATE_ADDRESS2;
	159	m_state[2] = DS2404_STATE_INIT_COMMAND;
	160	m_state[3] = DS2404_STATE_WRITE_SCRATCHPAD;
	161	m_state_ptr = 0;
67	162	break;
68	163
69	164	case 0x55:      /* Copy scratchpad */
70		state->state[0] = DS2404_STATE_ADDRESS1;
71		state->state[1] = DS2404_STATE_ADDRESS2;
72		state->state[2] = DS2404_STATE_OFFSET;
73		state->state[3] = DS2404_STATE_INIT_COMMAND;
74		state->state[4] = DS2404_STATE_COPY_SCRATCHPAD;
75		state->state_ptr = 0;
	165	m_state[0] = DS2404_STATE_ADDRESS1;
	166	m_state[1] = DS2404_STATE_ADDRESS2;
	167	m_state[2] = DS2404_STATE_OFFSET;
	168	m_state[3] = DS2404_STATE_INIT_COMMAND;
	169	m_state[4] = DS2404_STATE_COPY_SCRATCHPAD;
	170	m_state_ptr = 0;
76	171	break;
77	172
78	173	case 0xf0:      /* Read memory */
79		state->state[0] = DS2404_STATE_ADDRESS1;
80		state->state[1] = DS2404_STATE_ADDRESS2;
81		state->state[2] = DS2404_STATE_INIT_COMMAND;
82		state->state[3] = DS2404_STATE_READ_MEMORY;
83		state->state_ptr = 0;
	174	m_state[0] = DS2404_STATE_ADDRESS1;
	175	m_state[1] = DS2404_STATE_ADDRESS2;
	176	m_state[2] = DS2404_STATE_INIT_COMMAND;
	177	m_state[3] = DS2404_STATE_READ_MEMORY;
	178	m_state_ptr = 0;
84	179	break;
85	180
86	181	default:
r8962	r8963
89	184	}
90	185	}
91	186
92		static UINT8 ds2404_readmem(ds2404_state *state)
	187	UINT8 ds2404_device::ds2404_readmem()
93	188	{
94		if( state->address < 0x200 )
	189	if( m_address < 0x200 )
95	190	{
96		return state->sram[ state->address ];
	191	return m_sram[ m_address ];
97	192	}
98		else if( state->address >= 0x202 && state->address <= 0x206 )
	193	else if( m_address >= 0x202 && m_address <= 0x206 )
99	194	{
100		return state->rtc[ state->address - 0x202 ];
	195	return m_rtc[ m_address - 0x202 ];
101	196	}
102	197	return 0;
103	198	}
104	199
105		static void ds2404_writemem(ds2404_state *state, UINT8 value)
	200	void ds2404_device::ds2404_writemem(UINT8 value)
106	201	{
107		if( state->address < 0x200 )
	202	if( m_address < 0x200 )
108	203	{
109		state->sram[ state->address ] = value;
	204	m_sram[ m_address ] = value;
110	205	}
111		else if( state->address >= 0x202 && state->address <= 0x206 )
	206	else if( m_address >= 0x202 && m_address <= 0x206 )
112	207	{
113		state->rtc[ state->address - 0x202 ] = value;
	208	m_rtc[ m_address - 0x202 ] = value;
114	209	}
115	210	}
116	211
117		WRITE8_DEVICE_HANDLER( ds2404_1w_reset_w )
	212	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ds2404, ds2404_1w_reset_w)
118	213	{
119		ds2404_state *state = get_safe_token(device);
120		state->state[0] = DS2404_STATE_IDLE;
121		state->state_ptr = 0;
	214	m_state[0] = DS2404_STATE_IDLE;
	215	m_state_ptr = 0;
122	216	}
123	217
124		WRITE8_DEVICE_HANDLER( ds2404_3w_reset_w )
	218	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ds2404, ds2404_3w_reset_w)
125	219	{
126		ds2404_state *state = get_safe_token(device);
127		state->state[0] = DS2404_STATE_COMMAND;
128		state->state_ptr = 0;
	220	m_state[0] = DS2404_STATE_COMMAND;
	221	m_state_ptr = 0;
129	222	}
130	223
131		READ8_DEVICE_HANDLER( ds2404_data_r )
	224	READ8_DEVICE_HANDLER_TRAMPOLINE(ds2404, ds2404_data_r)
132	225	{
133		ds2404_state *state = get_safe_token(device);
134		UINT8 value;
135		switch( state->state[state->state_ptr] )
	226	UINT8 value = 0;
	227	switch(m_state[m_state_ptr])
136	228	{
137	229	case DS2404_STATE_IDLE:
138	230	case DS2404_STATE_COMMAND:
r8962	r8963
143	235	break;
144	236
145	237	case DS2404_STATE_READ_MEMORY:
146		value = ds2404_readmem(state);
147		return value;
	238	value = ds2404_readmem();
	239	break;
148	240
149	241	case DS2404_STATE_READ_SCRATCHPAD:
150		if( state->offset < 0x20 ) {
151		value = state->ram[state->offset];
152		state->offset++;
153		return value;
	242	if(m_offset < 0x20)
	243	{
	244	value = m_ram[m_offset];
	245	m_offset++;
154	246	}
155	247	break;
156	248
r8962	r8963
160	252	case DS2404_STATE_COPY_SCRATCHPAD:
161	253	break;
162	254	}
163		return 0;
	255	return value;
164	256	}
165	257
166		WRITE8_DEVICE_HANDLER( ds2404_data_w )
	258	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ds2404, ds2404_data_w)
167	259	{
168		ds2404_state *state = get_safe_token(device);
169		int i;
170
171		switch( state->state[state->state_ptr] )
	260	switch( m_state[m_state_ptr] )
172	261	{
173	262	case DS2404_STATE_IDLE:
174		ds2404_rom_cmd(state, data & 0xff);
	263	ds2404_rom_cmd(data & 0xff);
175	264	break;
176	265
177	266	case DS2404_STATE_COMMAND:
178		ds2404_cmd(state, data & 0xff);
	267	ds2404_cmd(data & 0xff);
179	268	break;
180	269
181	270	case DS2404_STATE_ADDRESS1:
182		state->a1 = data & 0xff;
183		state->state_ptr++;
	271	m_a1 = data & 0xff;
	272	m_state_ptr++;
184	273	break;
185	274
186	275	case DS2404_STATE_ADDRESS2:
187		state->a2 = data & 0xff;
188		state->state_ptr++;
	276	m_a2 = data & 0xff;
	277	m_state_ptr++;
189	278	break;
190	279
191	280	case DS2404_STATE_OFFSET:
192		state->end_offset = data & 0xff;
193		state->state_ptr++;
	281	m_end_offset = data & 0xff;
	282	m_state_ptr++;
194	283	break;
195	284
196	285	case DS2404_STATE_INIT_COMMAND:
r8962	r8963
203	292	break;
204	293
205	294	case DS2404_STATE_WRITE_SCRATCHPAD:
206		if( state->offset < 0x20 ) {
207		state->ram[state->offset] = data & 0xff;
208		state->offset++;
209		} else {
	295	if( m_offset < 0x20 )
	296	{
	297	m_ram[m_offset] = data & 0xff;
	298	m_offset++;
	299	}
	300	else
	301	{
210	302	/* Set OF flag */
211	303	}
212	304	break;
r8962	r8963
215	307	break;
216	308	}
217	309
218		if( state->state[state->state_ptr] == DS2404_STATE_INIT_COMMAND ) {
219		switch( state->state[state->state_ptr+1] )
	310	if( m_state[m_state_ptr] == DS2404_STATE_INIT_COMMAND )
	311	{
	312	switch( m_state[m_state_ptr + 1] )
220	313	{
221	314	case DS2404_STATE_IDLE:
222	315	case DS2404_STATE_COMMAND:
r8962	r8963
227	320	break;
228	321
229	322	case DS2404_STATE_READ_MEMORY:
230		state->address = (state->a2 << 8) | state->a1;
231		state->address -= 1;
	323	m_address = (m_a2 << 8) | m_a1;
	324	m_address -= 1;
232	325	break;
233	326
234	327	case DS2404_STATE_WRITE_SCRATCHPAD:
235		state->address = (state->a2 << 8) | state->a1;
236		state->offset = state->address & 0x1f;
	328	m_address = (m_a2 << 8) | m_a1;
	329	m_offset = m_address & 0x1f;
237	330	break;
238	331
239	332	case DS2404_STATE_READ_SCRATCHPAD:
240		state->address = (state->a2 << 8) | state->a1;
241		state->offset = state->address & 0x1f;
	333	m_address = (m_a2 << 8) | m_a1;
	334	m_offset = m_address & 0x1f;
242	335	break;
243	336
244	337	case DS2404_STATE_COPY_SCRATCHPAD:
245		state->address = (state->a2 << 8) | state->a1;
	338	m_address = (m_a2 << 8) | m_a1;
246	339
247		for( i=0; i <= state->end_offset; i++ ) {
248		ds2404_writemem( state, state->ram[i] );
249		state->address++;
	340	for(int i = 0; i <= m_end_offset; i++)
	341	{
	342	ds2404_writemem(m_ram[i]);
	343	m_address++;
250	344	}
251	345	break;
252	346	}
253		state->state_ptr++;
	347	m_state_ptr++;
254	348	}
255	349	}
256	350
257		WRITE8_DEVICE_HANDLER( ds2404_clk_w )
	351	WRITE8_DEVICE_HANDLER_TRAMPOLINE(ds2404, ds2404_clk_w)
258	352	{
259		ds2404_state *state = get_safe_token(device);
260		switch( state->state[state->state_ptr] )
	353	switch( m_state[m_state_ptr] )
261	354	{
262	355	case DS2404_STATE_IDLE:
263	356	case DS2404_STATE_COMMAND:
r8962	r8963
268	361	break;
269	362
270	363	case DS2404_STATE_READ_MEMORY:
271		state->address++;
	364	m_address++;
272	365	break;
273	366
274	367	case DS2404_STATE_READ_SCRATCHPAD:
r8962	r8963
282	375	}
283	376	}
284	377
285		static TIMER_CALLBACK( ds2404_tick )
	378	TIMER_CALLBACK( ds2404_device::ds2404_tick_callback )
286	379	{
287		ds2404_state *state = get_safe_token((running_device *)ptr);
288		int i;
289		for( i = 0; i < 5; i++ )
	380	reinterpret_cast<ds2404_device*>(ptr)->ds2404_tick();
	381	}
	382
	383	void ds2404_device::ds2404_tick()
	384	{
	385	for(int i = 0; i < 5; i++)
290	386	{
291		state->rtc[ i ]++;
292		if( state->rtc[ i ] != 0 )
	387	m_rtc[ i ]++;
	388	if(m_rtc[ i ] != 0)
293	389	{
294	390	break;
295	391	}
r8962	r8963
297	393	}
298	394
299	395
300		static DEVICE_START( ds2404 )
	396	//-------------------------------------------------
	397	//  nvram_default - called to initialize NVRAM to
	398	//  its default state
	399	//-------------------------------------------------
	400
	401	void ds2404_device::nvram_default()
301	402	{
302		ds2404_config *config = (ds2404_config *)downcast<const legacy_device_config_base &>(device->baseconfig()).inline_config();
303		ds2404_state *state = get_safe_token(device);
	403	memset(m_sram, 0, sizeof(m_sram));
	404	}
304	405
305		struct tm ref_tm;
306		time_t ref_time;
307		time_t current_time;
308		emu_timer *timer;
309	406
310		memset( &ref_tm, 0, sizeof( ref_tm ) );
311		ref_tm.tm_year = config->ref_year - 1900;
312		ref_tm.tm_mon = config->ref_month - 1;
313		ref_tm.tm_mday = config->ref_day;
	407	//-------------------------------------------------
	408	//  nvram_read - called to read NVRAM from the
	409	//  .nv file
	410	//-------------------------------------------------
314	411
315		ref_time = mktime( &ref_tm );
316
317		time( &current_time );
318		current_time -= ref_time;
319
320		state->rtc[ 0 ] = 0x0;
321		state->rtc[ 1 ] = ( current_time >> 0 ) & 0xff;
322		state->rtc[ 2 ] = ( current_time >> 8 ) & 0xff;
323		state->rtc[ 3 ] = ( current_time >> 16 ) & 0xff;
324		state->rtc[ 4 ] = ( current_time >> 24 ) & 0xff;
325
326		timer = timer_alloc( device->machine, ds2404_tick , (void *)device);
327		timer_adjust_periodic( timer, ATTOTIME_IN_HZ( 256 ), 0, ATTOTIME_IN_HZ( 256 ) );
	412	void ds2404_device::nvram_read(mame_file &file)
	413	{
	414	mame_fread(&file, m_sram, sizeof(m_sram));
328	415	}
329	416
330	417
331		static DEVICE_RESET( ds2404 )
332		{
333		}
	418	//-------------------------------------------------
	419	//  nvram_write - called to write NVRAM to the
	420	//  .nv file
	421	//-------------------------------------------------
334	422
335
336		static DEVICE_NVRAM( ds2404 )
	423	void ds2404_device::nvram_write(mame_file &file)
337	424	{
338		ds2404_state *state = get_safe_token(device);
339
340		if (read_or_write)
341		mame_fwrite(file, state->sram, sizeof(state->sram));
342		else if (file)
343		mame_fread(file, state->sram, sizeof(state->sram));
344		else
345		memset(state->sram, 0, sizeof(state->sram));
	425	mame_fwrite(&file, m_sram, sizeof(m_sram));
346	426	}
347
348
349		static const char DEVTEMPLATE_SOURCE[] = __FILE__;
350
351		#define DEVTEMPLATE_ID(p,s)      p##ds2404##s
352		#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET | DT_HAS_NVRAM | DT_HAS_INLINE_CONFIG
353		#define DEVTEMPLATE_NAME      "DS2404"
354		#define DEVTEMPLATE_FAMILY      "NVRAM"
355		#include "devtempl.h"
356
357
358		DEFINE_LEGACY_NVRAM_DEVICE(DS2404, ds2404);

src/emu/machine/ds2404.h

r8962	r8963
1		#ifndef DS2404_H
2		#define DS2404_H
	1	/**********************************************************************
3	2
4		#include "devlegcy.h"
	3	DALLAS DS2404
5	4
6		typedef struct _ds2404_config ds2404_config;
7		struct _ds2404_config
8		{
9		UINT32   ref_year;
10		UINT8   ref_month;
11		UINT8   ref_day;
12		};
	5	RTC + BACKUP RAM
13	6
	7	**********************************************************************/
14	8
	9	#ifndef __DS2404_H__
	10	#define __DS2404_H__
	11
	12	#include "emu.h"
	13
	14
	15
	16	/***************************************************************************
	17	DEVICE CONFIGURATION MACROS
	18	***************************************************************************/
	19
15	20	#define MDRV_DS2404_ADD(_tag, _ref_year, _ref_month, _ref_day) \
16	21	MDRV_DEVICE_ADD(_tag, DS2404, 0) \
17		MDRV_DEVICE_CONFIG_DATA32(ds2404_config, ref_year, _ref_year) \
18		MDRV_DEVICE_CONFIG_DATA32(ds2404_config, ref_month, _ref_month) \
19		MDRV_DEVICE_CONFIG_DATA32(ds2404_config, ref_day, _ref_day)
	22	MDRV_DS2404_REF_YEAR(_ref_year) \
	23	MDRV_DS2404_REF_MONTH(_ref_month) \
	24	MDRV_DS2404_REF_DAY(_ref_day)
20	25
	26	#define MDRV_DS2404_REF_YEAR(_ref_year) \
	27	ds2404_device_config::static_set_ref_year(device, _ref_year);
21	28
	29	#define MDRV_DS2404_REF_MONTH(_ref_month) \
	30	ds2404_device_config::static_set_ref_month(device, _ref_month);
	31
	32	#define MDRV_DS2404_REF_DAY(_ref_day) \
	33	ds2404_device_config::static_set_ref_day(device, _ref_day);
	34
	35
	36	/***************************************************************************
	37	TYPE DEFINITIONS
	38	***************************************************************************/
	39	//**************************************************************************
	40	//  TYPE DEFINITIONS
	41	//**************************************************************************
	42
	43	// ======================> ds2404_device_config
	44
	45	class ds2404_device_config :  public device_config,
	46	public device_config_nvram_interface
	47	{
	48	friend class ds2404_device;
	49
	50	// construction/destruction
	51	ds2404_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	52
	53	public:
	54	// allocators
	55	static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
	56	virtual device_t *alloc_device(running_machine &machine) const;
	57
	58	// inline configuration helpers
	59	static void static_set_ref_year(device_config *device, UINT32 m_ref_year);
	60	static void static_set_ref_month(device_config *device, UINT8 m_ref_month);
	61	static void static_set_ref_day(device_config *device, UINT8 m_ref_day);
	62
	63	protected:
	64	// internal state goes here
	65	UINT32   m_ref_year;
	66	UINT8   m_ref_month;
	67	UINT8   m_ref_day;
	68	};
	69
	70
	71
	72	// ======================> ds2404_device
	73
	74	class ds2404_device :  public device_t,
	75	public device_nvram_interface
	76	{
	77	friend class ds2404_device_config;
	78
	79	// construction/destruction
	80	ds2404_device(running_machine &_machine, const ds2404_device_config &_config);
	81
	82	public:
	83
	84	/* 1-wire interface reset  */
	85	void ds2404_1w_reset_w(UINT32 offset, UINT8 data);
	86
	87	/* 3-wire interface reset  */
	88	void ds2404_3w_reset_w(UINT32 offset, UINT8 data);
	89
	90	UINT8 ds2404_data_r(UINT32 offset);
	91	void ds2404_data_w(UINT32 offset, UINT8 data);
	92	void ds2404_clk_w(UINT32 offset, UINT8 data);
	93
	94	void ds2404_tick();
	95
	96	protected:
	97	// device-level overrides
	98	virtual void device_start();
	99	virtual void device_reset() { }
	100	virtual void device_post_load() { }
	101	virtual void device_clock_changed() { }
	102
	103	// device_nvram_interface overrides
	104	virtual void nvram_default();
	105	virtual void nvram_read(mame_file &file);
	106	virtual void nvram_write(mame_file &file);
	107
	108	static TIMER_CALLBACK( ds2404_tick_callback );
	109
	110	private:
	111
	112	void ds2404_rom_cmd(UINT8 cmd);
	113	void ds2404_cmd(UINT8 cmd);
	114
	115	UINT8 ds2404_readmem();
	116	void ds2404_writemem(UINT8 value);
	117
	118	enum DS2404_STATE
	119	{
	120	DS2404_STATE_IDLE = 1,            /* waiting for ROM command, in 1-wire mode */
	121	DS2404_STATE_COMMAND,            /* waiting for memory command */
	122	DS2404_STATE_ADDRESS1,            /* waiting for address bits 0-7 */
	123	DS2404_STATE_ADDRESS2,            /* waiting for address bits 8-15 */
	124	DS2404_STATE_OFFSET,            /* waiting for ending offset */
	125	DS2404_STATE_INIT_COMMAND,
	126	DS2404_STATE_READ_MEMORY,         /* Read Memory command active */
	127	DS2404_STATE_WRITE_SCRATCHPAD,      /* Write Scratchpad command active */
	128	DS2404_STATE_READ_SCRATCHPAD,      /* Read Scratchpad command active */
	129	DS2404_STATE_COPY_SCRATCHPAD      /* Copy Scratchpad command active */
	130	};
	131
	132	UINT16 m_address;
	133	UINT16 m_offset;
	134	UINT16 m_end_offset;
	135	UINT8 m_a1;
	136	UINT8 m_a2;
	137	UINT8 m_sram[512];   /* 4096 bits */
	138	UINT8 m_ram[32];   /* scratchpad ram, 256 bits */
	139	UINT8 m_rtc[5];      /* 40-bit RTC counter */
	140	DS2404_STATE m_state[8];
	141	int m_state_ptr;
	142
	143	const ds2404_device_config &m_config;
	144	};
	145
	146
	147	// device type definition
	148	extern const device_type DS2404;
	149
	150
	151
	152	/***************************************************************************
	153	PROTOTYPES
	154	***************************************************************************/
	155
22	156	/* 1-wire interface reset */
23	157	WRITE8_DEVICE_HANDLER( ds2404_1w_reset_w );
24	158
r8962	r8963
29	163	WRITE8_DEVICE_HANDLER( ds2404_data_w );
30	164	WRITE8_DEVICE_HANDLER( ds2404_clk_w );
31	165
32		/* device get info callback */
33		DECLARE_LEGACY_NVRAM_DEVICE(DS2404, ds2404);
34
35	166	#endif

src/emu/diexec.c

r8962	r8963
93	93
94	94
95	95	//-------------------------------------------------
96		//  static_set_disable - configuration helper to
	96	//  static_set_disable - configuration helper to
97	97	//  set the disabled state of a device
98	98	//-------------------------------------------------
99	99
r8962	r8963
107	107
108	108
109	109	//-------------------------------------------------
110		//  static_set_vblank_int - configuration helper
	110	//  static_set_vblank_int - configuration helper
111	111	//  to set up VBLANK interrupts on the device
112	112	//-------------------------------------------------
113	113
r8962	r8963
123	123
124	124
125	125	//-------------------------------------------------
126		//  static_set_periodic_int - configuration helper
	126	//  static_set_periodic_int - configuration helper
127	127	//  to set up periodic interrupts on the device
128	128	//-------------------------------------------------
129	129

src/emu/emucore.h

r8962	r8963
392	392	num++;
393	393	return -1;
394	394	}
395
	395
396	396	T &prepend(T &object)
397	397	{
398	398	object.m_next = m_head;

src/emu/addrmap.c

r8962	r8963
190	190
191	191	void address_map_entry::set_readwrite_bank(const device_config &devconfig, const char *tag)
192	192	{
193		m_read.m_type = AMH_BANK;
	193	m_read.m_type = AMH_BANK;
194	194	m_read.set_tag(devconfig, tag);
195		m_write.m_type = AMH_BANK;
	195	m_write.m_type = AMH_BANK;
196	196	m_write.set_tag(devconfig, tag);
197	197	}
198	198

src/emu/addrmap.h

r8962	r8963
105	105	public:
106	106	// construction/destruction
107	107	address_map_entry(address_map &map, offs_t start, offs_t end);
108
	108
109	109	// getters
110	110	address_map_entry *next() const { return m_next; }
111	111
r8962	r8963
670	670	#define AM_RAM_READ(_read)               AM_READ(_read) AM_WRITEONLY
671	671	#define AM_RAM_WRITE(_write)            AM_READONLY AM_WRITE(_write)
672	672	#define AM_RAM_DEVREAD(_tag, _read)       AM_DEVREAD(_tag, _read) AM_WRITEONLY
673		#define AM_RAM_DEVWRITE(_tag, _write)       AM_READONLY AM_DEVWRITE(_tag, _write)
	673	#define AM_RAM_DEVWRITE(_tag, _write)      AM_READONLY AM_DEVWRITE(_tag, _write)
674	674
675	675	#define AM_BASE_SIZE_MEMBER(_struct, _base, _size)   AM_BASE_MEMBER(_struct, _base) AM_SIZE_MEMBER(_struct, _size)
676	676	#define AM_BASE_SIZE_GENERIC(_member)      AM_BASE_GENERIC(_member) AM_SIZE_GENERIC(_member)

src/emu/sound.c

r8962	r8963
496	496
497	497
498	498	//-------------------------------------------------
499		//  static_set_position - configuration helper to
	499	//  static_set_position - configuration helper to
500	500	//  set the speaker position
501	501	//-------------------------------------------------
502	502

src/emu/delegate.c

r8962	r8963
92	92	// otherwise, it is the byte index into the vtable where the actual function lives
93	93	UINT8 *vtable_base = *reinterpret_cast<UINT8 **>(object);
94	94	return *reinterpret_cast<delegate_generic_function *>(vtable_base + mfp.u.vtable_index - 1);
95		}
	95	}
96	96
97	97	#endif

src/emu/delegate.h

r8962	r8963
37	37
38	38	****************************************************************************
39	39
40		There are many implementations of delegate-like functionality for
41		C++ code, but none of them is a perfect drop-in fit for use in MAME.
42		In order to be useful in MAME, we need the following properties:
43
44		* No significant overhead; we want to use these for memory
45		accessors, and memory accessor overhead is already the dominant
46		performance aspect for most drivers.
47
48		* Existing static functions need to be bound with an additional
49		pointer parameter as the first argument. All existing
50		implementations that allow static function binding assume the
51		same signature as the member functions.
52
53		* We must be able to bind the function separately from the
54		object. This is to allow configurations to bind functions
55		before the objects are created.
56
57		Thus, the implementations below are based on existing works but are
58		really a new implementation that is specific to MAME.
59
60		--------------------------------------------------------------------
61
62		The "compatible" version of delegates is based on an implementation
63		from Sergey Ryazanov, found here:
	40	There are many implementations of delegate-like functionality for
	41	C++ code, but none of them is a perfect drop-in fit for use in MAME.
	42	In order to be useful in MAME, we need the following properties:
64	43
65		http://www.codeproject.com/KB/cpp/ImpossiblyFastCppDelegate.aspx
	44	* No significant overhead; we want to use these for memory
	45	accessors, and memory accessor overhead is already the dominant
	46	performance aspect for most drivers.
66	47
67		These delegates essentially generate a templated static stub function
68		for each target function. The static function takes the first
69		parameter, uses it as the object pointer, and calls through the
70		member function. For static functions, the stub is compatible with
71		the signature of a static function, so we just set the stub directly.
72
73		Pros:
74		* should work with any modern compiler
75		* static bindings are just as fast as direct calls
76
77		Cons:
78		* lots of little stub functions generated
79		* double-hops on member function calls means more overhead
80		* calling through stub functions repackages parameters
81
82		--------------------------------------------------------------------
83
84		The "internal" version of delegates makes use of the internal
85		structure of member function pointers in order to convert them at
86		binding time into simple static function pointers. This only works
87		on platforms where object->func(p1, p2) is equivalent in calling
88		convention to func(object, p1, p2).
89
90		Most of the information on how this works comes from Don Clugston
91		in this article:
92
93		http://www.codeproject.com/KB/cpp/FastDelegate.aspx
94
95		Pros:
96		* as fast as a standard function call in static and member cases
97		* no stub functions or double-hops needed
98
99		Cons:
100		* requires internal knowledge of the member function pointer
101		* only works for GCC (for now; MSVC info is also readily available)
	48	* Existing static functions need to be bound with an additional
	49	pointer parameter as the first argument. All existing
	50	implementations that allow static function binding assume the
	51	same signature as the member functions.
102	52
	53	* We must be able to bind the function separately from the
	54	object. This is to allow configurations to bind functions
	55	before the objects are created.
	56
	57	Thus, the implementations below are based on existing works but are
	58	really a new implementation that is specific to MAME.
	59
	60	--------------------------------------------------------------------
	61
	62	The "compatible" version of delegates is based on an implementation
	63	from Sergey Ryazanov, found here:
	64
	65	http://www.codeproject.com/KB/cpp/ImpossiblyFastCppDelegate.aspx
	66
	67	These delegates essentially generate a templated static stub function
	68	for each target function. The static function takes the first
	69	parameter, uses it as the object pointer, and calls through the
	70	member function. For static functions, the stub is compatible with
	71	the signature of a static function, so we just set the stub directly.
	72
	73	Pros:
	74	* should work with any modern compiler
	75	* static bindings are just as fast as direct calls
	76
	77	Cons:
	78	* lots of little stub functions generated
	79	* double-hops on member function calls means more overhead
	80	* calling through stub functions repackages parameters
	81
	82	--------------------------------------------------------------------
	83
	84	The "internal" version of delegates makes use of the internal
	85	structure of member function pointers in order to convert them at
	86	binding time into simple static function pointers. This only works
	87	on platforms where object->func(p1, p2) is equivalent in calling
	88	convention to func(object, p1, p2).
	89
	90	Most of the information on how this works comes from Don Clugston
	91	in this article:
	92
	93	http://www.codeproject.com/KB/cpp/FastDelegate.aspx
	94
	95	Pros:
	96	* as fast as a standard function call in static and member cases
	97	* no stub functions or double-hops needed
	98
	99	Cons:
	100	* requires internal knowledge of the member function pointer
	101	* only works for GCC (for now; MSVC info is also readily available)
	102
103	103	***************************************************************************/
104	104
105	105	#pragma once
r8962	r8963
125	125
126	126	// nicer macros to hide the template gobblety-gook and to pass the names
127	127	#define create_member_name(_class, _member, _name)   _create_member<_class, &_class::_member>(_name)
128		#define create_member(_class, _member)             _create_member<_class, &_class::_member>(#_class "::" #_member)
129		#define create_static(_class, _func)             _crate_static<_class, &_func>(#_func)
	128	#define create_member(_class, _member)            _create_member<_class, &_class::_member>(#_class "::" #_member)
	129	#define create_static(_class, _func)            _crate_static<_class, &_func>(#_func)
130	130
131	131
132	132
r8962	r8963
147	147
148	148	// ======================> bindable_object
149	149
150		// define a bindable_object base class that must be at the root of any object
	150	// define a bindable_object base class that must be at the root of any object
151	151	// hierarchy which intends to do late binding
152	152	class bindable_object
153	153	{
r8962	r8963
157	157	virtual ~bindable_object();
158	158	};
159	159
160		// define a deferred cast helper function that does a proper dynamic_cast
161		// from a bindable_object to the target class, and returns a delegate_generic_class
	160	// define a deferred cast helper function that does a proper dynamic_cast
	161	// from a bindable_object to the target class, and returns a delegate_generic_class
162	162	template<class _TargetClass>
163	163	static delegate_generic_class *deferred_cast(bindable_object &object)
164	164	{
r8962	r8963
190	190	const char *name() const { return m_name; }
191	191
192	192	protected:
193		deferred_cast_func       m_caster;         // pointer to helper function that does the cast
	193	deferred_cast_func      m_caster;         // pointer to helper function that does the cast
194	194	const char *         m_name;            // name string
195	195	};
196	196
r8962	r8963
216	216	proto_delegate_0param(static_func function = NULL, deferred_cast_func caster = NULL, const char *name = NULL)
217	217	: delegate_base(caster, name),
218	218	m_function(function) { }
219
	219
220	220	proto_delegate_0param(const proto_delegate_0param &proto)
221	221	: delegate_base(proto.m_caster, proto.m_name),
222	222	m_function(proto.m_function) { }
223
	223
224	224	// create a member function proto-delegate
225	225	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)()>
226	226	static proto_delegate_0param _create_member(const char *name = NULL)
227	227	{
228	228	return proto_delegate_0param(&method_stub<_FunctionClass, _FunctionPtr>, &deferred_cast<_FunctionClass>, name);
229	229	}
230
	230
231	231	// create a static function proto-delegate
232	232	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *)>
233	233	static proto_delegate_0param _create_static(const char *name = NULL)
r8962	r8963
264	264
265	265	using delegate_base::m_caster;
266	266	using proto_base::m_function;
267
	267
268	268	public:
269	269	// constructors
270	270	delegate_0param()
271	271	: m_object(NULL) { }
272
	272
273	273	delegate_0param(proto_base proto)
274	274	: proto_delegate_0param<_ReturnType>(proto),
275	275	m_object(NULL) { }
276
	276
277	277	delegate_0param(proto_base proto, bindable_object &object)
278	278	: proto_delegate_0param<_ReturnType>(proto),
279	279	m_object((*m_caster)(object)) { }
280
	280
281	281	// bind the actual object
282	282	void bind(bindable_object &object) { m_object = (*m_caster)(object); }
283	283
284	284	// call the function
285	285	_ReturnType operator()() const { return (*m_function)(m_object); }
286
	286
287	287	// testing
288	288	bool has_object() const { return (m_object != NULL); }
289	289	bool operator==(const delegate_0param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
308	308	proto_delegate_1param(static_func function = NULL, deferred_cast_func caster = NULL, const char *name = NULL)
309	309	: delegate_base(caster, name),
310	310	m_function(function) { }
311
	311
312	312	proto_delegate_1param(const proto_delegate_1param &proto)
313	313	: delegate_base(proto.m_caster, proto.m_name),
314	314	m_function(proto.m_function) { }
315
	315
316	316	// create a member function proto-delegate
317	317	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)(_P1Type)>
318	318	static proto_delegate_1param _create_member(const char *name = NULL)
319	319	{
320	320	return proto_delegate_1param(&method_stub<_FunctionClass, _FunctionPtr>, &deferred_cast<_FunctionClass>, name);
321	321	}
322
	322
323	323	// create a static function proto-delegate
324	324	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *, _P1Type)>
325	325	static proto_delegate_1param _create_static(const char *name = NULL)
r8962	r8963
353	353	class delegate_1param : public proto_delegate_1param<_ReturnType, _P1Type>
354	354	{
355	355	typedef proto_delegate_1param<_ReturnType, _P1Type> proto_base;
356
	356
357	357	using delegate_base::m_caster;
358	358	using proto_base::m_function;
359	359
r8962	r8963
361	361	// constructors
362	362	delegate_1param()
363	363	: m_object(NULL) { }
364
	364
365	365	delegate_1param(proto_delegate_1param<_ReturnType, _P1Type> proto)
366	366	: proto_delegate_1param<_ReturnType, _P1Type>(proto),
367	367	m_object(NULL) { }
368
	368
369	369	delegate_1param(proto_delegate_1param<_ReturnType, _P1Type> proto, bindable_object &object)
370	370	: proto_delegate_1param<_ReturnType, _P1Type>(proto),
371	371	m_object((*m_caster)(object)) { }
372
	372
373	373	// bind the actual object
374	374	void bind(bindable_object &object) { m_object = (*m_caster)(object); }
375	375
376	376	// call the function
377	377	_ReturnType operator()(_P1Type p1) const { return (*m_function)(m_object, p1); }
378
	378
379	379	// testing
380	380	bool has_object() const { return (m_object != NULL); }
381	381	bool operator==(const delegate_1param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
400	400	proto_delegate_2param(static_func function = NULL, deferred_cast_func caster = NULL, const char *name = NULL)
401	401	: delegate_base(caster, name),
402	402	m_function(function) { }
403
	403
404	404	proto_delegate_2param(const proto_delegate_2param &proto)
405	405	: delegate_base(proto.m_caster, proto.m_name),
406	406	m_function(proto.m_function) { }
407
	407
408	408	// create a member function proto-delegate
409	409	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)(_P1Type, _P2Type)>
410	410	static proto_delegate_2param _create_member(const char *name = NULL)
411	411	{
412	412	return proto_delegate_2param(&method_stub<_FunctionClass, _FunctionPtr>, &deferred_cast<_FunctionClass>, name);
413	413	}
414
	414
415	415	// create a static function proto-delegate
416	416	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *, _P1Type, _P2Type)>
417	417	static proto_delegate_2param _create_static(const char *name = NULL)
r8962	r8963
445	445	class delegate_2param : public proto_delegate_2param<_ReturnType, _P1Type, _P2Type>
446	446	{
447	447	typedef proto_delegate_2param<_ReturnType, _P1Type, _P2Type> proto_base;
448
	448
449	449	using delegate_base::m_caster;
450	450	using proto_base::m_function;
451	451
r8962	r8963
453	453	// constructors
454	454	delegate_2param()
455	455	: m_object(NULL) { }
456
	456
457	457	delegate_2param(proto_delegate_2param<_ReturnType, _P1Type, _P2Type> proto)
458	458	: proto_delegate_2param<_ReturnType, _P1Type, _P2Type>(proto),
459	459	m_object(NULL) { }
460
	460
461	461	delegate_2param(proto_delegate_2param<_ReturnType, _P1Type, _P2Type> proto, bindable_object &object)
462	462	: proto_delegate_2param<_ReturnType, _P1Type, _P2Type>(proto),
463	463	m_object((*m_caster)(object)) { }
464
	464
465	465	// bind the actual object
466	466	void bind(bindable_object &object) { m_object = (*m_caster)(object); }
467	467
468	468	// call the function
469	469	_ReturnType operator()(_P1Type p1, _P2Type p2) const { return (*m_function)(m_object, p1, p2); }
470
	470
471	471	// testing
472	472	bool has_object() const { return (m_object != NULL); }
473	473	bool operator==(const delegate_2param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
492	492	proto_delegate_3param(static_func function = NULL, deferred_cast_func caster = NULL, const char *name = NULL)
493	493	: delegate_base(caster, name),
494	494	m_function(function) { }
495
	495
496	496	proto_delegate_3param(const proto_delegate_3param &proto)
497	497	: delegate_base(proto.m_caster, proto.m_name),
498	498	m_function(proto.m_function) { }
499
	499
500	500	// create a member function proto-delegate
501	501	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)(_P1Type, _P2Type, _P3Type)>
502	502	static proto_delegate_3param _create_member(const char *name = NULL)
503	503	{
504	504	return proto_delegate_3param(&method_stub<_FunctionClass, _FunctionPtr>, &deferred_cast<_FunctionClass>, name);
505	505	}
506
	506
507	507	// create a static function proto-delegate
508	508	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *, _P1Type, _P2Type, _P3Type)>
509	509	static proto_delegate_3param _create_static(const char *name = NULL)
r8962	r8963
537	537	class delegate_3param : public proto_delegate_3param<_ReturnType, _P1Type, _P2Type, _P3Type>
538	538	{
539	539	typedef proto_delegate_3param<_ReturnType, _P1Type, _P2Type, _P3Type> proto_base;
540
	540
541	541	using delegate_base::m_caster;
542	542	using proto_base::m_function;
543	543
r8962	r8963
545	545	// constructors
546	546	delegate_3param()
547	547	: m_object(NULL) { }
548
	548
549	549	delegate_3param(proto_delegate_3param<_ReturnType, _P1Type, _P2Type, _P3Type> proto)
550	550	: proto_delegate_3param<_ReturnType, _P1Type, _P2Type, _P3Type>(proto),
551	551	m_object(NULL) { }
552
	552
553	553	delegate_3param(proto_delegate_3param<_ReturnType, _P1Type, _P2Type, _P3Type> proto, bindable_object &object)
554	554	: proto_delegate_3param<_ReturnType, _P1Type, _P2Type, _P3Type>(proto),
555	555	m_object((*m_caster)(object)) { }
556
	556
557	557	// bind the actual object
558	558	void bind(bindable_object &object) { m_object = (*m_caster)(object); }
559	559
560	560	// call the function
561	561	_ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3) const { return (*m_function)(m_object, p1, p2, p3); }
562
	562
563	563	// testing
564	564	bool has_object() const { return (m_object != NULL); }
565	565	bool operator==(const delegate_3param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
584	584	proto_delegate_4param(static_func function = NULL, deferred_cast_func caster = NULL, const char *name = NULL)
585	585	: delegate_base(caster, name),
586	586	m_function(function) { }
587
	587
588	588	proto_delegate_4param(const proto_delegate_4param &proto)
589	589	: delegate_base(proto.m_caster, proto.m_name),
590	590	m_function(proto.m_function) { }
591
	591
592	592	// create a member function proto-delegate
593	593	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)(_P1Type, _P2Type, _P3Type, _P4Type)>
594	594	static proto_delegate_4param _create_member(const char *name = NULL)
595	595	{
596	596	return proto_delegate_4param(&method_stub<_FunctionClass, _FunctionPtr>, &deferred_cast<_FunctionClass>, name);
597	597	}
598
	598
599	599	// create a static function proto-delegate
600	600	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *, _P1Type, _P2Type, _P3Type, _P4Type)>
601	601	static proto_delegate_4param _create_static(const char *name = NULL)
r8962	r8963
629	629	class delegate_4param : public proto_delegate_4param<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type>
630	630	{
631	631	typedef proto_delegate_4param<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type> proto_base;
632
	632
633	633	using delegate_base::m_caster;
634	634	using proto_base::m_function;
635	635
r8962	r8963
637	637	// constructors
638	638	delegate_4param()
639	639	: m_object(NULL) { }
640
	640
641	641	delegate_4param(proto_delegate_4param<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type> proto)
642	642	: proto_delegate_4param<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type>(proto),
643	643	m_object(NULL) { }
644
	644
645	645	delegate_4param(proto_delegate_4param<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type> proto, bindable_object &object)
646	646	: proto_delegate_4param<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type>(proto),
647	647	m_object((*m_caster)(object)) { }
648
	648
649	649	// bind the actual object
650	650	void bind(bindable_object &object) { m_object = (*m_caster)(object); }
651	651
652	652	// call the function
653	653	_ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4) const { return (*m_function)(m_object, p1, p2, p3, p4); }
654
	654
655	655	// testing
656	656	bool has_object() const { return (m_object != NULL); }
657	657	bool operator==(const delegate_4param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
680	680	union                              // first item can be one of two things:
681	681	{
682	682	delegate_generic_function funcptr;      // if even, it's a pointer to the function
683		FPTR             vtable_index;      // if odd, it's the byte offset into the vtable
	683	FPTR            vtable_index;      // if odd, it's the byte offset into the vtable
684	684	} u;
685	685	int                this_delta;         // delta to apply to the 'this' pointer
686	686	};
r8962	r8963
707	707	: delegate_base(caster, name),
708	708	m_function(function),
709	709	m_rawfunction(mfp) { }
710
	710
711	711	proto_delegate_0param(const proto_delegate_0param &proto)
712	712	: delegate_base(proto.m_caster, proto.m_name),
713	713	m_function(proto.m_function),
714	714	m_rawfunction(proto.m_rawfunction) { }
715
	715
716	716	// create a member function proto-delegate
717	717	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)()>
718	718	static proto_delegate_0param _create_member(const char *name = NULL)
r8962	r8963
725	725	tempunion.mfp = _FunctionPtr;
726	726	return proto_delegate_0param(tempunion.internal, NULL, &deferred_cast<_FunctionClass>, name);
727	727	}
728
	728
729	729	// create a static function proto-delegate
730	730	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *)>
731	731	static proto_delegate_0param _create_static(const char *name = NULL)
732	732	{
733	733	return proto_delegate_0param(delegate_gcc_mfp_null, reinterpret_cast<static_func>(_FunctionPtr), &deferred_cast<_FunctionClass>, name);
734	734	}
735
	735
736	736	// equality testing
737	737	bool operator==(const proto_delegate_0param &rhs) const
738	738	{
739		return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
740		m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
	739	return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
	740	m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
741	741	m_rawfunction.this_delta == rhs.m_rawfunction.this_delta);
742	742	}
743	743
r8962	r8963
764	764	// constructors
765	765	delegate_0param()
766	766	: m_object(NULL) { }
767
	767
768	768	delegate_0param(proto_base proto)
769	769	: proto_delegate_0param<_ReturnType>(proto),
770	770	m_object(NULL) { }
771
	771
772	772	delegate_0param(proto_base proto, bindable_object &object)
773	773	: proto_delegate_0param<_ReturnType>(proto),
774	774	m_object(NULL) { bind(object); }
r8962	r8963
780	780	if (m_rawfunction.u.funcptr != NULL)
781	781	m_function = reinterpret_cast<static_func>(delegate_convert_raw(m_object, m_rawfunction));
782	782	}
783
	783
784	784	// call the function
785	785	_ReturnType operator()() const { return (*m_function)(m_object); }
786
	786
787	787	// testing
788	788	bool has_object() const { return (m_object != NULL); }
789	789	bool operator==(const delegate_0param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
809	809	: delegate_base(caster, name),
810	810	m_function(function),
811	811	m_rawfunction(mfp) { }
812
	812
813	813	proto_delegate_1param(const proto_delegate_1param &proto)
814	814	: delegate_base(proto.m_caster, proto.m_name),
815	815	m_function(proto.m_function),
816	816	m_rawfunction(proto.m_rawfunction) { }
817
	817
818	818	// create a member function proto-delegate
819	819	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)(_P1Type)>
820	820	static proto_delegate_1param _create_member(const char *name = NULL)
r8962	r8963
827	827	tempunion.mfp = _FunctionPtr;
828	828	return proto_delegate_1param(tempunion.internal, NULL, &deferred_cast<_FunctionClass>, name);
829	829	}
830
	830
831	831	// create a static function proto-delegate
832	832	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *, _P1Type)>
833	833	static proto_delegate_1param _create_static(const char *name = NULL)
834	834	{
835	835	return proto_delegate_1param(delegate_gcc_mfp_null, reinterpret_cast<static_func>(_FunctionPtr), &deferred_cast<_FunctionClass>, name);
836	836	}
837
	837
838	838	// equality testing
839	839	bool operator==(const proto_delegate_1param &rhs) const
840	840	{
841		return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
842		m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
	841	return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
	842	m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
843	843	m_rawfunction.this_delta == rhs.m_rawfunction.this_delta);
844	844	}
845	845
r8962	r8963
866	866	// constructors
867	867	delegate_1param()
868	868	: m_object(NULL) { }
869
	869
870	870	delegate_1param(proto_base proto)
871	871	: proto_delegate_1param<_ReturnType, _P1Type>(proto),
872	872	m_object(NULL) { }
873
	873
874	874	delegate_1param(proto_base proto, bindable_object &object)
875	875	: proto_delegate_1param<_ReturnType, _P1Type>(proto),
876	876	m_object(NULL) { bind(object); }
r8962	r8963
882	882	if (m_rawfunction.u.funcptr != NULL)
883	883	m_function = reinterpret_cast<static_func>(delegate_convert_raw(m_object, m_rawfunction));
884	884	}
885
	885
886	886	// call the function
887	887	_ReturnType operator()(_P1Type p1) const { return (*m_function)(m_object, p1); }
888
	888
889	889	// testing
890	890	bool has_object() const { return (m_object != NULL); }
891	891	bool operator==(const delegate_1param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
911	911	: delegate_base(caster, name),
912	912	m_function(function),
913	913	m_rawfunction(mfp) { }
914
	914
915	915	proto_delegate_2param(const proto_delegate_2param &proto)
916	916	: delegate_base(proto.m_caster, proto.m_name),
917	917	m_function(proto.m_function),
918	918	m_rawfunction(proto.m_rawfunction) { }
919
	919
920	920	// create a member function proto-delegate
921	921	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)(_P1Type, _P2Type)>
922	922	static proto_delegate_2param _create_member(const char *name = NULL)
r8962	r8963
929	929	tempunion.mfp = _FunctionPtr;
930	930	return proto_delegate_2param(tempunion.internal, NULL, &deferred_cast<_FunctionClass>, name);
931	931	}
932
	932
933	933	// create a static function proto-delegate
934	934	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *, _P1Type, _P2Type)>
935	935	static proto_delegate_2param _create_static(const char *name = NULL)
936	936	{
937	937	return proto_delegate_2param(delegate_gcc_mfp_null, reinterpret_cast<static_func>(_FunctionPtr), &deferred_cast<_FunctionClass>, name);
938	938	}
939
	939
940	940	// equality testing
941	941	bool operator==(const proto_delegate_2param &rhs) const
942	942	{
943		return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
944		m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
	943	return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
	944	m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
945	945	m_rawfunction.this_delta == rhs.m_rawfunction.this_delta);
946	946	}
947	947
r8962	r8963
968	968	// constructors
969	969	delegate_2param()
970	970	: m_object(NULL) { }
971
	971
972	972	delegate_2param(proto_base proto)
973	973	: proto_delegate_2param<_ReturnType, _P1Type, _P2Type>(proto),
974	974	m_object(NULL) { }
975
	975
976	976	delegate_2param(proto_base proto, bindable_object &object)
977	977	: proto_delegate_2param<_ReturnType, _P1Type, _P2Type>(proto),
978	978	m_object(NULL) { bind(object); }
r8962	r8963
984	984	if (m_rawfunction.u.funcptr != NULL)
985	985	m_function = reinterpret_cast<static_func>(delegate_convert_raw(m_object, m_rawfunction));
986	986	}
987
	987
988	988	// call the function
989	989	_ReturnType operator()(_P1Type p1, _P2Type p2) const { return (*m_function)(m_object, p1, p2); }
990
	990
991	991	// testing
992	992	bool has_object() const { return (m_object != NULL); }
993	993	bool operator==(const delegate_2param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
1013	1013	: delegate_base(caster, name),
1014	1014	m_function(function),
1015	1015	m_rawfunction(mfp) { }
1016
	1016
1017	1017	proto_delegate_3param(const proto_delegate_3param &proto)
1018	1018	: delegate_base(proto.m_caster, proto.m_name),
1019	1019	m_function(proto.m_function),
1020	1020	m_rawfunction(proto.m_rawfunction) { }
1021
	1021
1022	1022	// create a member function proto-delegate
1023	1023	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)(_P1Type, _P2Type, _P3Type)>
1024	1024	static proto_delegate_3param _create_member(const char *name = NULL)
r8962	r8963
1031	1031	tempunion.mfp = _FunctionPtr;
1032	1032	return proto_delegate_3param(tempunion.internal, NULL, &deferred_cast<_FunctionClass>, name);
1033	1033	}
1034
	1034
1035	1035	// create a static function proto-delegate
1036	1036	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *, _P1Type, _P2Type, _P3Type)>
1037	1037	static proto_delegate_3param _create_static(const char *name = NULL)
1038	1038	{
1039	1039	return proto_delegate_3param(delegate_gcc_mfp_null, reinterpret_cast<static_func>(_FunctionPtr), &deferred_cast<_FunctionClass>, name);
1040	1040	}
1041
	1041
1042	1042	// equality testing
1043	1043	bool operator==(const proto_delegate_3param &rhs) const
1044	1044	{
1045		return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
1046		m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
	1045	return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
	1046	m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
1047	1047	m_rawfunction.this_delta == rhs.m_rawfunction.this_delta);
1048	1048	}
1049	1049
r8962	r8963
1070	1070	// constructors
1071	1071	delegate_3param()
1072	1072	: m_object(NULL) { }
1073
	1073
1074	1074	delegate_3param(proto_base proto)
1075	1075	: proto_delegate_3param<_ReturnType, _P1Type, _P2Type, _P3Type>(proto),
1076	1076	m_object(NULL) { }
1077
	1077
1078	1078	delegate_3param(proto_base proto, bindable_object &object)
1079	1079	: proto_delegate_3param<_ReturnType, _P1Type, _P2Type, _P3Type>(proto),
1080	1080	m_object(NULL) { bind(object); }
r8962	r8963
1086	1086	if (m_rawfunction.u.funcptr != NULL)
1087	1087	m_function = reinterpret_cast<static_func>(delegate_convert_raw(m_object, m_rawfunction));
1088	1088	}
1089
	1089
1090	1090	// call the function
1091	1091	_ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3) const { return (*m_function)(m_object, p1, p2, p3); }
1092
	1092
1093	1093	// testing
1094	1094	bool has_object() const { return (m_object != NULL); }
1095	1095	bool operator==(const delegate_3param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }
r8962	r8963
1115	1115	: delegate_base(caster, name),
1116	1116	m_function(function),
1117	1117	m_rawfunction(mfp) { }
1118
	1118
1119	1119	proto_delegate_4param(const proto_delegate_4param &proto)
1120	1120	: delegate_base(proto.m_caster, proto.m_name),
1121	1121	m_function(proto.m_function),
1122	1122	m_rawfunction(proto.m_rawfunction) { }
1123
	1123
1124	1124	// create a member function proto-delegate
1125	1125	template<class _FunctionClass, _ReturnType (_FunctionClass::*_FunctionPtr)(_P1Type, _P2Type, _P3Type, _P4Type)>
1126	1126	static proto_delegate_4param _create_member(const char *name = NULL)
r8962	r8963
1133	1133	tempunion.mfp = _FunctionPtr;
1134	1134	return proto_delegate_4param(tempunion.internal, NULL, &deferred_cast<_FunctionClass>, name);
1135	1135	}
1136
	1136
1137	1137	// create a static function proto-delegate
1138	1138	template<class _FunctionClass, _ReturnType (*_FunctionPtr)(_FunctionClass *, _P1Type, _P2Type, _P3Type, _P4Type)>
1139	1139	static proto_delegate_4param _create_static(const char *name = NULL)
1140	1140	{
1141	1141	return proto_delegate_4param(delegate_gcc_mfp_null, reinterpret_cast<static_func>(_FunctionPtr), &deferred_cast<_FunctionClass>, name);
1142	1142	}
1143
	1143
1144	1144	// equality testing
1145	1145	bool operator==(const proto_delegate_4param &rhs) const
1146	1146	{
1147		return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
1148		m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
	1147	return (m_function == rhs.m_function && m_caster == rhs.m_caster &&
	1148	m_rawfunction.u.funcptr == rhs.m_rawfunction.u.funcptr &&
1149	1149	m_rawfunction.this_delta == rhs.m_rawfunction.this_delta);
1150	1150	}
1151	1151
r8962	r8963
1172	1172	// constructors
1173	1173	delegate_4param()
1174	1174	: m_object(NULL) { }
1175
	1175
1176	1176	delegate_4param(proto_base proto)
1177	1177	: proto_delegate_4param<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type>(proto),
1178	1178	m_object(NULL) { }
1179
	1179
1180	1180	delegate_4param(proto_base proto, bindable_object &object)
1181	1181	: proto_delegate_4param<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type>(proto),
1182	1182	m_object(NULL) { bind(object); }
r8962	r8963
1188	1188	if (m_rawfunction.u.funcptr != NULL)
1189	1189	m_function = reinterpret_cast<static_func>(delegate_convert_raw(m_object, m_rawfunction));
1190	1190	}
1191
	1191
1192	1192	// call the function
1193	1193	_ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4) const { return (*m_function)(m_object, p1, p2, p3, p4); }
1194
	1194
1195	1195	// testing
1196	1196	bool has_object() const { return (m_object != NULL); }
1197	1197	bool operator==(const delegate_4param &rhs) const { return (m_object == rhs.m_object && proto_base::operator==(rhs)); }

src/emu/mconfig.c

r8962	r8963
117	117
118	118
119	119	//-------------------------------------------------
120		//  device_replace - configuration helper to
	120	//  device_replace - configuration helper to
121	121	//  replace one device with a new device
122	122	//-------------------------------------------------
123	123
r8962	r8963
130	130
131	131
132	132	//-------------------------------------------------
133		//  device_remove - configuration helper to
	133	//  device_remove - configuration helper to
134	134	//  remove a device
135	135	//-------------------------------------------------
136	136
r8962	r8963
144	144
145	145
146	146	//-------------------------------------------------
147		//  device_find - configuration helper to
	147	//  device_find - configuration helper to
148	148	//  locate a device
149	149	//-------------------------------------------------
150	150

src/emu/dimemory.c

r8962	r8963
144	144
145	145
146	146	//-------------------------------------------------
147		//  static_set_vblank_int - configuration helper
	147	//  static_set_vblank_int - configuration helper
148	148	//  to set up VBLANK interrupts on the device
149	149	//-------------------------------------------------
150	150

src/lib/util/astring.h

r8962	r8963
316	316
317	317	astring &operator=(const char *string) { return cpy(string); }
318	318	astring &operator=(const astring &string) { return cpy(string); }
319
	319
320	320	bool operator==(const char *string) const { return (cmp(string) == 0); }
321	321	bool operator==(const astring &string) const { return (cmp(string) == 0); }
322	322	bool operator!=(const char *string) const { return (cmp(string) != 0); }
r8962	r8963
333	333	astring &reset() { return cpy(""); }
334	334	astring &expand(int length) { astring_expand(this, length); return *this; }
335	335
	336	operator bool() { return this->text[0] != 0; }
336	337	operator bool() const { return this->text[0] != 0; }
337	338	operator const char *() const { return astring_c(this); }
338	339	const char *cstr() const { return astring_c(this); }

src/mess/mess.mak

r8962	r8963
65	65	CPUS += TMS340X0
66	66	CPUS += TMS9900
67	67	CPUS += Z8000
	68	#CPUS += Z8001
68	69	CPUS += TMS32010
69	70	CPUS += TMS32025
70	71	CPUS += TMS32031
r8962	r8963
231	232	SOUNDS += CDP1864
232	233	#SOUNDS += ZSG2
233	234	SOUNDS += MOS656X
	235	#SOUNDS += S2636
234	236	SOUNDS += SOCRATES
235	237	SOUNDS += TMC0285
236	238	SOUNDS += TMS5200

docs/messnew.txt

r8962	r8963
37	37
38	38	Source Changes:
39	39	----------------
40		- The core is based on MAME 0.139u1.  This incorporates all features of the
	40	- The core is based on MAME 0.139u2.  This incorporates all features of the
41	41	update to this core.  [MAME team]
42	42
43	43	- Fixed Z80-SIO and DMA to allow trs80m2 to boot CP/M and TRSDOS. [Curt Coder]

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