src/emu/cpu/m6809/m6809.c
| r8916 | r8917 | |
|---|
| 74 | 74 | #include "debugger.h" |
| 75 | 75 | #include "m6809.h" |
| 76 | 76 | |
| 77 | | /* Enable big switch statement for the main opcodes */ |
| 78 | | #ifndef BIG_SWITCH |
| 79 | | #define BIG_SWITCH 1 |
| 80 | | #endif |
| 81 | | |
| 82 | 77 | #define VERBOSE 0 |
| 83 | 78 | |
| 84 | 79 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| r8916 | r8917 | |
|---|
| 508 | 503 | |
| 509 | 504 | m68_state->ireg = ROP(PCD); |
| 510 | 505 | PC++; |
| 511 | | #if BIG_SWITCH |
| 512 | | switch( m68_state->ireg ) |
| 513 | | { |
| 514 | | case 0x00: neg_di(m68_state); break; |
| 515 | | case 0x01: neg_di(m68_state); break; /* undocumented */ |
| 516 | | case 0x02: IIError(m68_state); break; |
| 517 | | case 0x03: com_di(m68_state); break; |
| 518 | | case 0x04: lsr_di(m68_state); break; |
| 519 | | case 0x05: IIError(m68_state); break; |
| 520 | | case 0x06: ror_di(m68_state); break; |
| 521 | | case 0x07: asr_di(m68_state); break; |
| 522 | | case 0x08: asl_di(m68_state); break; |
| 523 | | case 0x09: rol_di(m68_state); break; |
| 524 | | case 0x0a: dec_di(m68_state); break; |
| 525 | | case 0x0b: IIError(m68_state); break; |
| 526 | | case 0x0c: inc_di(m68_state); break; |
| 527 | | case 0x0d: tst_di(m68_state); break; |
| 528 | | case 0x0e: jmp_di(m68_state); break; |
| 529 | | case 0x0f: clr_di(m68_state); break; |
| 530 | | case 0x10: pref10(m68_state); break; |
| 531 | | case 0x11: pref11(m68_state); break; |
| 532 | | case 0x12: nop(m68_state); break; |
| 533 | | case 0x13: sync(m68_state); break; |
| 534 | | case 0x14: IIError(m68_state); break; |
| 535 | | case 0x15: IIError(m68_state); break; |
| 536 | | case 0x16: lbra(m68_state); break; |
| 537 | | case 0x17: lbsr(m68_state); break; |
| 538 | | case 0x18: IIError(m68_state); break; |
| 539 | | case 0x19: daa(m68_state); break; |
| 540 | | case 0x1a: orcc(m68_state); break; |
| 541 | | case 0x1b: IIError(m68_state); break; |
| 542 | | case 0x1c: andcc(m68_state); break; |
| 543 | | case 0x1d: sex(m68_state); break; |
| 544 | | case 0x1e: exg(m68_state); break; |
| 545 | | case 0x1f: tfr(m68_state); break; |
| 546 | | case 0x20: bra(m68_state); break; |
| 547 | | case 0x21: brn(m68_state); break; |
| 548 | | case 0x22: bhi(m68_state); break; |
| 549 | | case 0x23: bls(m68_state); break; |
| 550 | | case 0x24: bcc(m68_state); break; |
| 551 | | case 0x25: bcs(m68_state); break; |
| 552 | | case 0x26: bne(m68_state); break; |
| 553 | | case 0x27: beq(m68_state); break; |
| 554 | | case 0x28: bvc(m68_state); break; |
| 555 | | case 0x29: bvs(m68_state); break; |
| 556 | | case 0x2a: bpl(m68_state); break; |
| 557 | | case 0x2b: bmi(m68_state); break; |
| 558 | | case 0x2c: bge(m68_state); break; |
| 559 | | case 0x2d: blt(m68_state); break; |
| 560 | | case 0x2e: bgt(m68_state); break; |
| 561 | | case 0x2f: ble(m68_state); break; |
| 562 | | case 0x30: leax(m68_state); break; |
| 563 | | case 0x31: leay(m68_state); break; |
| 564 | | case 0x32: leas(m68_state); break; |
| 565 | | case 0x33: leau(m68_state); break; |
| 566 | | case 0x34: pshs(m68_state); break; |
| 567 | | case 0x35: puls(m68_state); break; |
| 568 | | case 0x36: pshu(m68_state); break; |
| 569 | | case 0x37: pulu(m68_state); break; |
| 570 | | case 0x38: IIError(m68_state); break; |
| 571 | | case 0x39: rts(m68_state); break; |
| 572 | | case 0x3a: abx(m68_state); break; |
| 573 | | case 0x3b: rti(m68_state); break; |
| 574 | | case 0x3c: cwai(m68_state); break; |
| 575 | | case 0x3d: mul(m68_state); break; |
| 576 | | case 0x3e: IIError(m68_state); break; |
| 577 | | case 0x3f: swi(m68_state); break; |
| 578 | | case 0x40: nega(m68_state); break; |
| 579 | | case 0x41: IIError(m68_state); break; |
| 580 | | case 0x42: IIError(m68_state); break; |
| 581 | | case 0x43: coma(m68_state); break; |
| 582 | | case 0x44: lsra(m68_state); break; |
| 583 | | case 0x45: IIError(m68_state); break; |
| 584 | | case 0x46: rora(m68_state); break; |
| 585 | | case 0x47: asra(m68_state); break; |
| 586 | | case 0x48: asla(m68_state); break; |
| 587 | | case 0x49: rola(m68_state); break; |
| 588 | | case 0x4a: deca(m68_state); break; |
| 589 | | case 0x4b: IIError(m68_state); break; |
| 590 | | case 0x4c: inca(m68_state); break; |
| 591 | | case 0x4d: tsta(m68_state); break; |
| 592 | | case 0x4e: IIError(m68_state); break; |
| 593 | | case 0x4f: clra(m68_state); break; |
| 594 | | case 0x50: negb(m68_state); break; |
| 595 | | case 0x51: IIError(m68_state); break; |
| 596 | | case 0x52: IIError(m68_state); break; |
| 597 | | case 0x53: comb(m68_state); break; |
| 598 | | case 0x54: lsrb(m68_state); break; |
| 599 | | case 0x55: IIError(m68_state); break; |
| 600 | | case 0x56: rorb(m68_state); break; |
| 601 | | case 0x57: asrb(m68_state); break; |
| 602 | | case 0x58: aslb(m68_state); break; |
| 603 | | case 0x59: rolb(m68_state); break; |
| 604 | | case 0x5a: decb(m68_state); break; |
| 605 | | case 0x5b: IIError(m68_state); break; |
| 606 | | case 0x5c: incb(m68_state); break; |
| 607 | | case 0x5d: tstb(m68_state); break; |
| 608 | | case 0x5e: IIError(m68_state); break; |
| 609 | | case 0x5f: clrb(m68_state); break; |
| 610 | | case 0x60: neg_ix(m68_state); break; |
| 611 | | case 0x61: IIError(m68_state); break; |
| 612 | | case 0x62: IIError(m68_state); break; |
| 613 | | case 0x63: com_ix(m68_state); break; |
| 614 | | case 0x64: lsr_ix(m68_state); break; |
| 615 | | case 0x65: IIError(m68_state); break; |
| 616 | | case 0x66: ror_ix(m68_state); break; |
| 617 | | case 0x67: asr_ix(m68_state); break; |
| 618 | | case 0x68: asl_ix(m68_state); break; |
| 619 | | case 0x69: rol_ix(m68_state); break; |
| 620 | | case 0x6a: dec_ix(m68_state); break; |
| 621 | | case 0x6b: IIError(m68_state); break; |
| 622 | | case 0x6c: inc_ix(m68_state); break; |
| 623 | | case 0x6d: tst_ix(m68_state); break; |
| 624 | | case 0x6e: jmp_ix(m68_state); break; |
| 625 | | case 0x6f: clr_ix(m68_state); break; |
| 626 | | case 0x70: neg_ex(m68_state); break; |
| 627 | | case 0x71: IIError(m68_state); break; |
| 628 | | case 0x72: IIError(m68_state); break; |
| 629 | | case 0x73: com_ex(m68_state); break; |
| 630 | | case 0x74: lsr_ex(m68_state); break; |
| 631 | | case 0x75: IIError(m68_state); break; |
| 632 | | case 0x76: ror_ex(m68_state); break; |
| 633 | | case 0x77: asr_ex(m68_state); break; |
| 634 | | case 0x78: asl_ex(m68_state); break; |
| 635 | | case 0x79: rol_ex(m68_state); break; |
| 636 | | case 0x7a: dec_ex(m68_state); break; |
| 637 | | case 0x7b: IIError(m68_state); break; |
| 638 | | case 0x7c: inc_ex(m68_state); break; |
| 639 | | case 0x7d: tst_ex(m68_state); break; |
| 640 | | case 0x7e: jmp_ex(m68_state); break; |
| 641 | | case 0x7f: clr_ex(m68_state); break; |
| 642 | | case 0x80: suba_im(m68_state); break; |
| 643 | | case 0x81: cmpa_im(m68_state); break; |
| 644 | | case 0x82: sbca_im(m68_state); break; |
| 645 | | case 0x83: subd_im(m68_state); break; |
| 646 | | case 0x84: anda_im(m68_state); break; |
| 647 | | case 0x85: bita_im(m68_state); break; |
| 648 | | case 0x86: lda_im(m68_state); break; |
| 649 | | case 0x87: sta_im(m68_state); break; |
| 650 | | case 0x88: eora_im(m68_state); break; |
| 651 | | case 0x89: adca_im(m68_state); break; |
| 652 | | case 0x8a: ora_im(m68_state); break; |
| 653 | | case 0x8b: adda_im(m68_state); break; |
| 654 | | case 0x8c: cmpx_im(m68_state); break; |
| 655 | | case 0x8d: bsr(m68_state); break; |
| 656 | | case 0x8e: ldx_im(m68_state); break; |
| 657 | | case 0x8f: stx_im(m68_state); break; |
| 658 | | case 0x90: suba_di(m68_state); break; |
| 659 | | case 0x91: cmpa_di(m68_state); break; |
| 660 | | case 0x92: sbca_di(m68_state); break; |
| 661 | | case 0x93: subd_di(m68_state); break; |
| 662 | | case 0x94: anda_di(m68_state); break; |
| 663 | | case 0x95: bita_di(m68_state); break; |
| 664 | | case 0x96: lda_di(m68_state); break; |
| 665 | | case 0x97: sta_di(m68_state); break; |
| 666 | | case 0x98: eora_di(m68_state); break; |
| 667 | | case 0x99: adca_di(m68_state); break; |
| 668 | | case 0x9a: ora_di(m68_state); break; |
| 669 | | case 0x9b: adda_di(m68_state); break; |
| 670 | | case 0x9c: cmpx_di(m68_state); break; |
| 671 | | case 0x9d: jsr_di(m68_state); break; |
| 672 | | case 0x9e: ldx_di(m68_state); break; |
| 673 | | case 0x9f: stx_di(m68_state); break; |
| 674 | | case 0xa0: suba_ix(m68_state); break; |
| 675 | | case 0xa1: cmpa_ix(m68_state); break; |
| 676 | | case 0xa2: sbca_ix(m68_state); break; |
| 677 | | case 0xa3: subd_ix(m68_state); break; |
| 678 | | case 0xa4: anda_ix(m68_state); break; |
| 679 | | case 0xa5: bita_ix(m68_state); break; |
| 680 | | case 0xa6: lda_ix(m68_state); break; |
| 681 | | case 0xa7: sta_ix(m68_state); break; |
| 682 | | case 0xa8: eora_ix(m68_state); break; |
| 683 | | case 0xa9: adca_ix(m68_state); break; |
| 684 | | case 0xaa: ora_ix(m68_state); break; |
| 685 | | case 0xab: adda_ix(m68_state); break; |
| 686 | | case 0xac: cmpx_ix(m68_state); break; |
| 687 | | case 0xad: jsr_ix(m68_state); break; |
| 688 | | case 0xae: ldx_ix(m68_state); break; |
| 689 | | case 0xaf: stx_ix(m68_state); break; |
| 690 | | case 0xb0: suba_ex(m68_state); break; |
| 691 | | case 0xb1: cmpa_ex(m68_state); break; |
| 692 | | case 0xb2: sbca_ex(m68_state); break; |
| 693 | | case 0xb3: subd_ex(m68_state); break; |
| 694 | | case 0xb4: anda_ex(m68_state); break; |
| 695 | | case 0xb5: bita_ex(m68_state); break; |
| 696 | | case 0xb6: lda_ex(m68_state); break; |
| 697 | | case 0xb7: sta_ex(m68_state); break; |
| 698 | | case 0xb8: eora_ex(m68_state); break; |
| 699 | | case 0xb9: adca_ex(m68_state); break; |
| 700 | | case 0xba: ora_ex(m68_state); break; |
| 701 | | case 0xbb: adda_ex(m68_state); break; |
| 702 | | case 0xbc: cmpx_ex(m68_state); break; |
| 703 | | case 0xbd: jsr_ex(m68_state); break; |
| 704 | | case 0xbe: ldx_ex(m68_state); break; |
| 705 | | case 0xbf: stx_ex(m68_state); break; |
| 706 | | case 0xc0: subb_im(m68_state); break; |
| 707 | | case 0xc1: cmpb_im(m68_state); break; |
| 708 | | case 0xc2: sbcb_im(m68_state); break; |
| 709 | | case 0xc3: addd_im(m68_state); break; |
| 710 | | case 0xc4: andb_im(m68_state); break; |
| 711 | | case 0xc5: bitb_im(m68_state); break; |
| 712 | | case 0xc6: ldb_im(m68_state); break; |
| 713 | | case 0xc7: stb_im(m68_state); break; |
| 714 | | case 0xc8: eorb_im(m68_state); break; |
| 715 | | case 0xc9: adcb_im(m68_state); break; |
| 716 | | case 0xca: orb_im(m68_state); break; |
| 717 | | case 0xcb: addb_im(m68_state); break; |
| 718 | | case 0xcc: ldd_im(m68_state); break; |
| 719 | | case 0xcd: std_im(m68_state); break; |
| 720 | | case 0xce: ldu_im(m68_state); break; |
| 721 | | case 0xcf: stu_im(m68_state); break; |
| 722 | | case 0xd0: subb_di(m68_state); break; |
| 723 | | case 0xd1: cmpb_di(m68_state); break; |
| 724 | | case 0xd2: sbcb_di(m68_state); break; |
| 725 | | case 0xd3: addd_di(m68_state); break; |
| 726 | | case 0xd4: andb_di(m68_state); break; |
| 727 | | case 0xd5: bitb_di(m68_state); break; |
| 728 | | case 0xd6: ldb_di(m68_state); break; |
| 729 | | case 0xd7: stb_di(m68_state); break; |
| 730 | | case 0xd8: eorb_di(m68_state); break; |
| 731 | | case 0xd9: adcb_di(m68_state); break; |
| 732 | | case 0xda: orb_di(m68_state); break; |
| 733 | | case 0xdb: addb_di(m68_state); break; |
| 734 | | case 0xdc: ldd_di(m68_state); break; |
| 735 | | case 0xdd: std_di(m68_state); break; |
| 736 | | case 0xde: ldu_di(m68_state); break; |
| 737 | | case 0xdf: stu_di(m68_state); break; |
| 738 | | case 0xe0: subb_ix(m68_state); break; |
| 739 | | case 0xe1: cmpb_ix(m68_state); break; |
| 740 | | case 0xe2: sbcb_ix(m68_state); break; |
| 741 | | case 0xe3: addd_ix(m68_state); break; |
| 742 | | case 0xe4: andb_ix(m68_state); break; |
| 743 | | case 0xe5: bitb_ix(m68_state); break; |
| 744 | | case 0xe6: ldb_ix(m68_state); break; |
| 745 | | case 0xe7: stb_ix(m68_state); break; |
| 746 | | case 0xe8: eorb_ix(m68_state); break; |
| 747 | | case 0xe9: adcb_ix(m68_state); break; |
| 748 | | case 0xea: orb_ix(m68_state); break; |
| 749 | | case 0xeb: addb_ix(m68_state); break; |
| 750 | | case 0xec: ldd_ix(m68_state); break; |
| 751 | | case 0xed: std_ix(m68_state); break; |
| 752 | | case 0xee: ldu_ix(m68_state); break; |
| 753 | | case 0xef: stu_ix(m68_state); break; |
| 754 | | case 0xf0: subb_ex(m68_state); break; |
| 755 | | case 0xf1: cmpb_ex(m68_state); break; |
| 756 | | case 0xf2: sbcb_ex(m68_state); break; |
| 757 | | case 0xf3: addd_ex(m68_state); break; |
| 758 | | case 0xf4: andb_ex(m68_state); break; |
| 759 | | case 0xf5: bitb_ex(m68_state); break; |
| 760 | | case 0xf6: ldb_ex(m68_state); break; |
| 761 | | case 0xf7: stb_ex(m68_state); break; |
| 762 | | case 0xf8: eorb_ex(m68_state); break; |
| 763 | | case 0xf9: adcb_ex(m68_state); break; |
| 764 | | case 0xfa: orb_ex(m68_state); break; |
| 765 | | case 0xfb: addb_ex(m68_state); break; |
| 766 | | case 0xfc: ldd_ex(m68_state); break; |
| 767 | | case 0xfd: std_ex(m68_state); break; |
| 768 | | case 0xfe: ldu_ex(m68_state); break; |
| 769 | | case 0xff: stu_ex(m68_state); break; |
| 770 | | } |
| 771 | | #else |
| 772 | | (*m6809_main[m68_state->ireg])(m68_state); |
| 773 | | #endif /* BIG_SWITCH */ |
| 774 | | m68_state->icount -= cycles1[m68_state->ireg]; |
| 506 | (*m6809_main[m68_state->ireg])(m68_state); |
| 507 | m68_state->icount -= cycles1[m68_state->ireg]; |
| 775 | 508 | |
| 776 | 509 | } while( m68_state->icount > 0 ); |
| 777 | 510 | |