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r8528 Saturday 17th July, 2010 at 20:27:58 UTC by Wilbert Pol
[3DO] Added a couple more registers.

[src/mess/machine]

3do.c

src/mess/machine/3do.c

r8527	r8528
61	61	UINT32   hdelay;         /* 03400080 */
62	62	UINT32   adbio;         /* 03400084 */
63	63	UINT32   adbctl;         /* 03400088 */
	64	/* Timers */
	65	UINT32   timer0;         /* 03400100 */
	66	UINT32   timerback0;      /* 03400104 */
	67	UINT32   timer1;         /* 03400108 */
	68	UINT32   timerback1;      /* 0340010c */
	69	UINT32   timer2;         /* 03400110 */
	70	UINT32   timerback2;      /* 03400114 */
	71	UINT32   timer3;         /* 03400118 */
	72	UINT32   timerback3;      /* 0340011c */
	73	UINT32   timer4;         /* 03400120 */
	74	UINT32   timerback4;      /* 03400124 */
	75	UINT32   timer5;         /* 03400128 */
	76	UINT32   timerback5;      /* 0340012c */
	77	UINT32   timer6;         /* 03400130 */
	78	UINT32   timerback6;      /* 03400134 */
	79	UINT32   timer7;         /* 03400138 */
	80	UINT32   timerback7;      /* 0340013c */
	81	UINT32   timer8;         /* 03400140 */
	82	UINT32   timerback8;      /* 03400144 */
	83	UINT32   timer9;         /* 03400148 */
	84	UINT32   timerback9;      /* 0340014c */
	85	UINT32   timer10;      /* 03400150 */
	86	UINT32   timerback10;   /* 03400154 */
	87	UINT32   timer11;      /* 03400158 */
	88	UINT32   timerback11;   /* 0340015c */
	89	UINT32   timer12;      /* 03400160 */
	90	UINT32   timerback12;   /* 03400164 */
	91	UINT32   timer13;      /* 03400168 */
	92	UINT32   timerback13;   /* 0340016c */
	93	UINT32   timer14;      /* 03400170 */
	94	UINT32   timerback14;   /* 03400174 */
	95	UINT32   timer15;      /* 03400178 */
	96	UINT32   timerback15;   /* 0340017c */
	97	UINT32   settm0;         /* 03400200 */
	98	UINT32   clrtm0;         /* 03400204 */
	99	UINT32   settm1;         /* 03400208 */
	100	UINT32   clrtm1;         /* 0340020c */
	101	UINT32   slack;         /* 03400220 */
	102	/* DMA */
	103	UINT32   dmareqdis;      /* 03400308 */
	104	/* Expansion bus */
	105	UINT32   type0_4;      /* 03400400 */
	106	UINT32   dipir1;         /* 03400410 */
	107	UINT32   dipir2;         /* 03400414 */
	108	/* DSPP */
	109	UINT32   semaphore;      /* 034017d0 */
	110	UINT32   semaack;      /* 034017d4 */
	111	UINT32   dsppdma;      /* 034017e0 */
	112	UINT32   dspprst0;      /* 034017e4 */
	113	UINT32   dspprst1;      /* 034017e8 */
	114	UINT32   dspppc;         /* 034017f4 */
	115	UINT32   dsppnr;         /* 034017f8 */
	116	UINT32   dsppgw;         /* 034017fc */
	117	UINT32   dsppn[0x400];   /* 03401800 - 03401bff DSPP N stack (32bit writes) */
	118	/* 03402000 - 034027ff DSPP N stack (16bit writes) */
	119	UINT32   dsppei[0x100];   /* 03403000 - 034030ff DSPP EI stack (32bit writes) */
	120	/* 03403400 - 034035ff DSPP EI stack (16bit writes) */
	121	UINT32   dsppeo[0x1f]   /* 03403800 - 0340381f DSPP EO stack (32bit reads) */
	122	/* 03403c00 - 03403c3f DSPP EO stack (32bit reads) */
	123	UINT32   dsppclkreload;   /* 034039dc / 03403fbc */
	124	/* UNCLE */
	125	UINT32   unclerev;      /* 0340c000 */
	126	UINT32   uncle_soft_rev;   /* 0340c004 */
	127	UINT32   uncle_addr;      /* 0340c008 */
	128	UINT32   uncle_rom;      /* 0340c00c */
64	129	} CLIO;
65	130
66	131
r8527	r8528
122	187	write 00002000 to 03180000
123	188	several groups of 16 write actions or 16 read actions
124	189	*/
	190
125	191	READ32_HANDLER( _3do_unk_318_r ) {
126	192	logerror( "%08X: UNK_318 read offset = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset );
127	193	#if 0
r8527	r8528
134	200	return 0;
135	201	}
136	202
	203
137	204	WRITE32_HANDLER( _3do_unk_318_w )
138	205	{
139	206	logerror( "%08X: UNK_318 write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset, data, mem_mask );
r8527	r8528
187	254
188	255
189	256	READ32_HANDLER( _3do_madam_r ) {
190		logerror( "%08X: MADAM read offset = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset );
	257	//logerror( "%08X: MADAM read offset = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset*4 );
	258
191	259	switch( offset ) {
192	260	case 0x0000/4:      /* 03300000 - Revision */
193	261	return madam.revision;
r8527	r8528
334	402	return madam.mult_control;
335	403	case 0x07f8/4:
336	404	return madam.mult_status;
	405	default:
	406	logerror( "%08X: unhandled MADAM read offset = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset*4 );
	407	break;
337	408	}
338	409	return 0;
339	410	}
340	411
341	412
342	413	WRITE32_HANDLER( _3do_madam_w ) {
343		logerror( "%08X: MADAM write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset, data, mem_mask );
	414	//logerror( "%08X: MADAM write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset*4, data, mem_mask );
	415
344	416	switch( offset ) {
	417	case 0x0000/4:
	418	break;
345	419	case 0x0004/4:   /* 03300004 - Memory configuration 29 = 2MB DRAM, 1MB VRAM */
346	420	madam.msysbits = data;
347	421	break;
r8527	r8528
506	580	break;
507	581	case 0x07fc/4:   /* Start process */
508	582	break;
	583
	584	default:
	585	logerror( "%08X: unhandled MADAM write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset*4, data, mem_mask );
	586	break;
509	587	}
510	588	}
511	589
r8527	r8528
519	597
520	598	READ32_HANDLER( _3do_clio_r )
521	599	{
522		logerror( "%08X: CLIO read offset = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset );
	600	//logerror( "%08X: CLIO read offset = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset * 4 );
523	601
524	602	switch( offset )
525	603	{
r8527	r8528
551	629	return clio.adbio;
552	630	case 0x0088/4:
553	631	return clio.adbctl;
	632
	633	case 0x0200/4:
	634	return clio.settm0;
	635	case 0x0204/4:
	636	return clio.clrtm0;
	637	case 0x0208/4:
	638	return clio.settm1;
	639	case 0x020c/4:
	640	return clio.clrtm1;
	641
	642	case 0x0220/4:
	643	return clio.slack;
	644
	645	case 0x0410/4:
	646	return clio.dipir1;
	647	case 0x0414/4:
	648	return clio.dipir2;
	649
	650	case 0xc000/4:
	651	return clio.unclerev;
	652	case 0xc004/4:
	653	return clio.uncle_soft_rev;
	654	case 0xc008/4:
	655	return clio.uncle_addr;
	656	case 0xc00c/4:
	657	return clio.uncle_rom;
	658
	659	default:
	660	logerror( "%08X: unhandled CLIO read offset = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset * 4 );
	661	break;
554	662	}
555	663	return 0;
556	664	}
557	665
558	666	WRITE32_HANDLER( _3do_clio_w )
559	667	{
560		logerror( "%08X: CLIO write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset, data, mem_mask );
	668	//logerror( "%08X: CLIO write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset*4, data, mem_mask );
561	669
562	670	switch( offset )
563	671	{
	672	case 0x0000/4:
	673	break;
564	674	case 0x0004/4:
565	675	clio.csysbits = data;
566	676	break;
r8527	r8528
576	686	case 0x0024/4:   /* 03400024 - c0020f0f is written here during boot */
577	687	clio.audout = data;
578	688	break;
579		case 0x0028/4:   /* 03400028 - bits 0,1, and 6 are tested (irq sources?) */
	689	case 0x0028/4:   /* 03400028 - bits 0,1, and 6 are tested (reset source) */
580	690	clio.cstatbits = data;
581	691	break;
582	692	case 0x002c/4:   /* 0340002C - ?? during boot 0000000B is written here counter reload related?? */
r8527	r8528
637	747	clio.adbctl = data;
638	748	break;
639	749
640		case 0x88:   /* set timer frequency */
	750	case 0x0100/4:
	751	clio.timer0 = data & 0x0000ffff;
641	752	break;
	753	case 0x0104/4:
	754	clio.timerback0 = data & 0x0000ffff;
	755	break;
	756	case 0x0108/4:
	757	clio.timer1 = data & 0x0000ffff;
	758	break;
	759	case 0x010c/4:
	760	clio.timerback1 = data & 0x0000ffff;
	761	break;
	762	case 0x0110/4:
	763	clio.timer2 = data & 0x0000ffff;
	764	break;
	765	case 0x0114/4:
	766	clio.timerback2 = data & 0x0000ffff;
	767	break;
	768	case 0x0118/4:
	769	clio.timer3 = data & 0x0000ffff;
	770	break;
	771	case 0x011c/4:
	772	clio.timerback3 = data & 0x0000ffff;
	773	break;
	774	case 0x0120/4:
	775	clio.timer4 = data & 0x0000ffff;
	776	break;
	777	case 0x0124/4:
	778	clio.timerback4 = data & 0x0000ffff;
	779	break;
	780	case 0x0128/4:
	781	clio.timer5 = data & 0x0000ffff;
	782	break;
	783	case 0x012c/4:
	784	clio.timerback5 = data & 0x0000ffff;
	785	break;
	786	case 0x0130/4:
	787	clio.timer6 = data & 0x0000ffff;
	788	break;
	789	case 0x0134/4:
	790	clio.timerback6 = data & 0x0000ffff;
	791	break;
	792	case 0x0138/4:
	793	clio.timer7 = data & 0x0000ffff;
	794	break;
	795	case 0x013c/4:
	796	clio.timerback7 = data & 0x0000ffff;
	797	break;
	798	case 0x0140/4:
	799	clio.timer8 = data & 0x0000ffff;
	800	break;
	801	case 0x0144/4:
	802	clio.timerback8 = data & 0x0000ffff;
	803	break;
	804	case 0x0148/4:
	805	clio.timer9 = data & 0x0000ffff;
	806	break;
	807	case 0x014c/4:
	808	clio.timerback9 = data & 0x0000ffff;
	809	break;
	810	case 0x0150/4:
	811	clio.timer10 = data & 0x0000ffff;
	812	break;
	813	case 0x0154/4:
	814	clio.timerback10 = data & 0x0000ffff;
	815	break;
	816	case 0x0158/4:
	817	clio.timer11 = data & 0x0000ffff;
	818	break;
	819	case 0x015c/4:
	820	clio.timerback11 = data & 0x0000ffff;
	821	break;
	822	case 0x0160/4:
	823	clio.timer12 = data & 0x0000ffff;
	824	break;
	825	case 0x0164/4:
	826	clio.timerback12 = data & 0x0000ffff;
	827	break;
	828	case 0x0168/4:
	829	clio.timer13 = data & 0x0000ffff;
	830	break;
	831	case 0x016c/4:
	832	clio.timerback13 = data & 0x0000ffff;
	833	break;
	834	case 0x0170/4:
	835	clio.timer14 = data & 0x0000ffff;
	836	break;
	837	case 0x0174/4:
	838	clio.timerback14 = data & 0x0000ffff;
	839	break;
	840	case 0x0178/4:
	841	clio.timer15 = data & 0x0000ffff;
	842	break;
	843	case 0x017c/4:
	844	clio.timerback15 = data & 0x0000ffff;
	845	break;
	846
	847	case 0x0200/4:
	848	clio.settm0 = data;
	849	break;
	850	case 0x0204/4:
	851	clio.clrtm0 = data;
	852	break;
	853	case 0x0208/4:
	854	clio.settm0 = data;
	855	break;
	856	case 0x020c/4:
	857	break;
	858
	859	case 0x0220/4:
	860	clio.slack = data & 0x000003ff;
	861	break;
	862
	863	case 0x0308/4:
	864	clio.dmareqdis = data;
	865	break;
	866
	867	case 0x0408/4:
	868	clio.type0_4 = data;
	869	break;
	870
	871	case 0xc000/4:
	872	case 0xc004/4:
	873	case 0xc00c/4:
	874	break;
	875	case 0xc008/4:
	876	clio.uncle_addr = data;
	877	break;
	878
	879	default:
	880	logerror( "%08X: unhandled CLIO write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(space->machine->device("maincpu")), offset*4, data, mem_mask );
	881	break;
642	882	}
643	883	}
644	884
r8527	r8528
647	887	memset( &clio, 0, sizeof(CLIO) );
648	888	clio.revision = 0x02022000;
649	889	clio.cstatbits = 0x40;
	890	clio.unclerev = 0x03800000;
650	891	}
651	892

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