MESS SVN History

15994 Revisions

r8019 Wednesday 12th May, 2010 at 02:15:42 UTC by Angelo Salese
Fix debug compile?

[src/emu/cpu/z8000]

z8000.c z8000ops.c z8000tbl.c

src/emu/cpu/z8000/z8000.c
r8018	r8019
43	43	*
44	44	* TODO:
45	45	* - make the z8001 opcodes to be dynamic (i.e. to take segmented mode flag into account and use the non-segmented mode)
46		* - dissassembler doesn't work at all with the z8001
47	46	*
48	47	*****************************************************************************/
49	48
r8018	r8019
95	94	assert(device != NULL);
96	95	assert(device->token != NULL);
97	96	assert(device->type == CPU);
98		assert(cpu_get_type(device) == CPU_Z8000);
	97	assert(cpu_get_type(device) == CPU_Z8001 \|\| cpu_get_type(device) == CPU_Z8002);
99	98	return (z8000_state *)device->token;
100	99	}
101	100

src/emu/cpu/z8000/z8000ops.c
r8018	r8019
2733	2733	WRPORT_B(cpustate, 0, RDMEM_W(cpustate, cpustate->RW(dst)), cpustate->RB(src));
2734	2734	}
2735	2735
2736		/* FIXME: aforementioned opcode looks bugged. */
2737		static void Z3E_dddd_ssss_seg(z8000_state *cpustate)
2738		{
2739		GET_DST(OP0,NIB2);
2740		GET_SRC(OP0,NIB3);
2741		WRPORT_B(cpustate, 0, cpustate->RW(dst), cpustate->RB(src));
2742		}
2743
2744	2736	/******************************************
2745	2737	out @rd,rs
2746	2738	flags: ---V--
r8018	r8019
3275	3267	WRMEM_W(cpustate, addr, imm16);
3276	3268	}
3277	3269
3278		static void Z4D_0000_0101_addr_imm16_seg(z8000_state *cpustate)
3279		{
3280		static UINT32 offset;
3281		UINT16 operand1 = fetch(cpustate);
3282
3283		if(operand1 & 0x8000)
3284		{
3285		UINT16 operand2 = fetch(cpustate);
3286		UINT16 imm16 = fetch(cpustate);
3287
3288		offset = (operand1 & 0x0700) << 8;
3289		offset\|= (operand2 & 0xffff);
3290		WRMEM_W(cpustate, offset, imm16);
3291		cycles(cpustate, 17);
3292		}
3293		else
3294		{
3295		UINT16 imm16 = fetch(cpustate);
3296
3297		offset = (operand1 & 0x0700) << 8;
3298		offset\|= (operand1 & 0x00ff);
3299		WRMEM_W(cpustate, offset, imm16);
3300		cycles(cpustate, 15);
3301		}
3302		}
3303
3304	3270	/******************************************
3305	3271	tset addr
3306	3272	flags: --S---

src/emu/cpu/z8000/z8000tbl.c
r8018	r8019
677	677	{0x3b0b,0x3bfb,16,2, 21,Z3B_ssss_1011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rb5", 0},
678	678	{0x3c00,0x3cff, 1,1, 10,Z3C_ssss_dddd, "inb %rb3,@%rw2", 0},
679	679	{0x3d00,0x3dff, 1,1, 10,Z3D_ssss_dddd, "in %rw3,@%rw2", 0},
680		{0x3e00,0x3eff, 1,1, 12,Z3E_dddd_ssss~~_seg~~, "outb @%rw2,%rb3", 0},
	680	{0x3e00,0x3eff, 1,1, 12,Z3E_dddd_ssss, "outb @%rw2,%rb3", 0},
681	681	{0x3f00,0x3fff, 1,1, 12,Z3F_dddd_ssss, "out @%rw2,%rw3", 0},
682	682	{0x4000,0x400f, 1,2, 9,Z40_0000_dddd_addr, "addb %rb3,%a1", 0},
683	683	{0x4010,0x40ff, 1,2, 10,Z40_ssN0_dddd_addr, "addb %rb3,%a1(%rw2)", 0},
r8018	r8019
721	721	{0x4d01,0x4d01, 1,3, 14,Z4D_0000_0001_addr_imm16, "cp %a1,%#w2", 0},
722	722	{0x4d02,0x4d02, 1,2, 15,Z4D_0000_0010_addr, "neg %a1", 0},
723	723	{0x4d04,0x4d04, 1,2, 11,Z4D_0000_0100_addr, "test %a1", 0},
724		{0x4d05,0x4d05, 1,1, 0, Z4D_0000_0101_addr_imm16~~_seg~~, "ld %a1,%#w2", 0},
	724	{0x4d05,0x4d05, 1,3, 14,Z4D_0000_0101_addr_imm16, "ld %a1,%#w2", 0},
725	725	{0x4d06,0x4d06, 1,2, 14,Z4D_0000_0110_addr, "tset %a1", 0},
726	726	{0x4d08,0x4d08, 1,1, 0, Z4D_0000_1000_addr_seg, "clr %a1", 0},
727	727	{0x4d10,0x4df0,16,2, 16,Z4D_ddN0_0000_addr, "com %a1(%rw2)", 0},

15994 Revisions