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r792 Tuesday 7th August, 2007 at 12:59:53 UTC by Curt Coder
[ATARIST] Atari ST rewrite WIP

[src/mess]	mess.mak messdriv.c
[src/mess/drivers]	atarist.c
[src/mess/machine]	68901mfp.c* 68901mfp.h*
[src/mess/video]	atarist.c* atarist.h*

src/mess/video/atarist.c

r0	r792
	1	/*
	2
	3	TODO:
	4
	5	- lineofs
	6	- pixelofs
	7	- monochrome mode
	8	- change screen modes on the fly
	9	- blitter
	10
	11	*/
	12
	13	#include "driver.h"
	14	#include "video/generic.h"
	15	#include "cpu/m68000/m68k.h"
	16	#include "cpu/m68000/m68000.h"
	17
	18	static struct SHIFTER
	19	{
	20	UINT32 base;
	21	UINT32 counter;
	22	UINT8 sync;
	23	UINT8 mode;
	24	UINT16 palette[16];
	25	UINT8 lineofs;  // STe
	26	UINT8 pixelofs; // STe
	27	int vcount;
	28	int hcount;
	29	UINT16 rr[4];
	30	UINT16 ir[4];
	31	int bitplane;
	32	int shift;
	33	} shifter;
	34
	35	static mame_timer *atarist_glue_timer;
	36	static mame_timer *atarist_shifter_timer;
	37	static mame_bitmap *atarist_bitmap;
	38
	39	static TIMER_CALLBACK(atarist_shifter_tick)
	40	{
	41	int y = video_screen_get_vpos(0);
	42	int x = video_screen_get_hpos(0);
	43	int color;
	44
	45	switch (shifter.mode)
	46	{
	47	case 0: // 320 x 200, 4 Plane
	48	color = (BIT(shifter.rr[3], 15) << 3) | (BIT(shifter.rr[2], 15) << 2) | (BIT(shifter.rr[1], 15) << 1) | BIT(shifter.rr[0], 15);
	49
	50	*BITMAP_ADDR16(atarist_bitmap, y, x) = Machine->pens[color];
	51
	52	shifter.rr[0] <<= 1;
	53	shifter.rr[1] <<= 1;
	54	shifter.rr[2] <<= 1;
	55	shifter.rr[3] <<= 1;
	56	break;
	57
	58	case 1: // 640 x 200, 2 Plane
	59	color = (BIT(shifter.rr[1], 15) << 1) | BIT(shifter.rr[0], 15);
	60
	61	*BITMAP_ADDR16(atarist_bitmap, y, x) = Machine->pens[color];
	62
	63	shifter.rr[0] <<= 1;
	64	shifter.rr[1] <<= 1;
	65	shifter.shift++;
	66
	67	if (shifter.shift == 15)
	68	{
	69	shifter.rr[0] = shifter.rr[2];
	70	shifter.rr[1] = shifter.rr[3];
	71	shifter.rr[2] = shifter.rr[3] = 0;
	72	shifter.shift = 0;
	73	}
	74	break;
	75
	76	case 2: // 640 x 400, 1 Plane
	77	// unimplemented
	78	break;
	79	}
	80	}
	81
	82	static TIMER_CALLBACK(atarist_glue_tick)
	83	{
	84	int h = CLEAR_LINE, v = CLEAR_LINE, de;
	85	UINT8 *RAM = memory_region(REGION_CPU1) + shifter.base + shifter.counter;
	86
	87	shifter.vcount = video_screen_get_vpos(0);
	88
	89	if (shifter.sync & 0x02)
	90	{
	91	// 50 Hz
	92
	93	switch (shifter.hcount)
	94	{
	95	case 14:
	96	h = ASSERT_LINE;
	97	break;
	98	case 94:
	99	h = CLEAR_LINE;
	100	break;
	101	case 128:
	102	cpunum_set_input_line(0, MC68000_IRQ_2, ASSERT_LINE);
	103	shifter.hcount = 0;
	104	break;
	105	}
	106
	107	switch (shifter.vcount)
	108	{
	109	case 0:
	110	cpunum_set_input_line(0, MC68000_IRQ_4, ASSERT_LINE);
	111	shifter.counter = 0;
	112	break;
	113	case 63:
	114	v = ASSERT_LINE;
	115	break;
	116	case 263:
	117	v = CLEAR_LINE;
	118	break;
	119	}
	120	}
	121	else
	122	{
	123	// 60 Hz
	124	switch (shifter.hcount)
	125	{
	126	case 13:
	127	h = ASSERT_LINE;
	128	break;
	129	case 93:
	130	h = CLEAR_LINE;
	131	break;
	132	case 127:
	133	cpunum_set_input_line(0, MC68000_IRQ_2, ASSERT_LINE);
	134	shifter.hcount = 0;
	135	break;
	136	}
	137
	138	switch (shifter.vcount)
	139	{
	140	case 0:
	141	shifter.counter = 0;
	142	cpunum_set_input_line(0, MC68000_IRQ_4, ASSERT_LINE);
	143	break;
	144	case 34:
	145	v = ASSERT_LINE;
	146	break;
	147	case 234:
	148	v = CLEAR_LINE;
	149	break;
	150	}
	151	}
	152
	153	de = h && v;
	154
	155	shifter.ir[shifter.bitplane] = (RAM[0] << 8) | RAM[1];
	156	shifter.counter += 2;
	157	shifter.bitplane++;
	158
	159	if (shifter.bitplane == 4)
	160	{
	161	if (de)
	162	{
	163	shifter.rr[0] = shifter.ir[0];
	164	shifter.rr[1] = shifter.ir[1];
	165	shifter.rr[2] = shifter.ir[2];
	166	shifter.rr[3] = shifter.ir[3];
	167
	168	shifter.ir[0] = shifter.ir[1] = shifter.ir[2] = shifter.ir[3] = 0;
	169	}
	170
	171	shifter.bitplane = 0;
	172	}
	173
	174	shifter.hcount++;
	175	}
	176
	177	READ16_HANDLER( atarist_shifter_r )
	178	{
	179	switch (offset)
	180	{
	181	case 0x00:
	182	return (shifter.base >> 16) & 0xff;
	183	case 0x02:
	184	return (shifter.base >> 8) & 0xff;
	185
	186	case 0x04:
	187	return (shifter.counter >> 16) & 0xff;
	188	case 0x06:
	189	return (shifter.counter >> 8) & 0xff;
	190	case 0x08:
	191	return shifter.counter & 0xff;
	192
	193	case 0x0a:
	194	return shifter.sync;
	195	case 0x60:
	196	return shifter.mode << 8;
	197
	198	default:
	199	if ((offset & 0xe0) == 0x40)
	200	{
	201	return shifter.palette[offset & 0x1e];
	202	}
	203	}
	204
	205	return 0;
	206	}
	207
	208	WRITE16_HANDLER( atarist_shifter_w )
	209	{
	210	switch (offset)
	211	{
	212	case 0x00:
	213	shifter.base = (shifter.base & 0x00ff00) | (data & 0x3f) << 16;
	214	break;
	215	case 0x02:
	216	shifter.base = (shifter.base & 0xff0000) | (data & 0xff) << 8;
	217	break;
	218
	219	case 0x0a:
	220	shifter.sync = data >> 8;
	221	break;
	222
	223	case 0x60:
	224	shifter.mode = data >> 8;
	225	break;
	226
	227	default:
	228	if ((offset & 0xe0) == 0x40)
	229	{
	230	int i = offset & 0x1f;
	231	shifter.palette[i] = data;
	232	palette_set_color_rgb(Machine, offset, pal3bit(data >> 8), pal3bit(data >> 4), pal2bit(data >> 0));
	233	}
	234	}
	235	}
	236
	237	READ16_HANDLER( atariste_shifter_r )
	238	{
	239	switch (offset)
	240	{
	241	case 0x00:
	242	return (shifter.base >> 16) & 0x3f;
	243	case 0x02:
	244	return (shifter.base >> 8) & 0xff;
	245	case 0x0c:
	246	return shifter.base & 0xfe;
	247
	248	case 0x04:
	249	return (shifter.counter >> 16) & 0x3f;
	250	case 0x06:
	251	return (shifter.counter >> 8) & 0xff;
	252	case 0x08:
	253	return shifter.counter & 0xfe;
	254
	255	case 0x0a:
	256	return shifter.sync << 8;
	257	case 0x60:
	258	return shifter.mode << 8;
	259
	260	case 0x0e:
	261	return shifter.lineofs << 8;
	262	case 0x64:
	263	return shifter.pixelofs << 8;
	264
	265	default:
	266	if ((offset & 0xe0) == 0x40)
	267	{
	268	return shifter.palette[offset & 0x1e];
	269	}
	270	}
	271
	272	return 0;
	273	}
	274
	275	WRITE16_HANDLER( atariste_shifter_w )
	276	{
	277	switch (offset)
	278	{
	279	case 0x00:
	280	shifter.base = (shifter.base & 0x00ff00) | (data & 0x3f) << 16;
	281	break;
	282	case 0x02:
	283	shifter.base = (shifter.base & 0xff0000) | (data & 0xff) << 8;
	284	break;
	285	case 0x0c:
	286	shifter.base = (shifter.base & 0xffff00) | (data & 0xfe) << 8;
	287	break;
	288
	289	case 0x04:
	290	shifter.counter = (shifter.counter & 0x00ffff) | (data & 0x3f) << 16;
	291	break;
	292	case 0x06:
	293	shifter.counter = (shifter.counter & 0xff00ff) | (data & 0xff) << 8;
	294	break;
	295	case 0x08:
	296	shifter.counter = (shifter.counter & 0xffff00) | (data & 0xfe);
	297	break;
	298
	299	case 0x0a:
	300	shifter.sync = data >> 8;
	301	break;
	302	case 0x60:
	303	shifter.mode = data >> 8;
	304	break;
	305
	306	case 0x0e:
	307	shifter.lineofs = data & 0xff;
	308	break;
	309	case 0x64:
	310	shifter.pixelofs = data & 0x0f;
	311	break;
	312
	313	default:
	314	if ((offset & 0xe0) == 0x40)
	315	{
	316	int i = offset & 0x1f;
	317	int r = ((data >> 7) & 0x0e) | ((data >> 11) & 0x01);
	318	int g = ((data >> 3) & 0x0e) | ((data >> 4) & 0x01);
	319	int b = ((data << 1) & 0x0e) | ((data >> 3) & 0x01);
	320	shifter.palette[i] = data;
	321	palette_set_color_rgb(Machine, i, r, g, b);
	322	}
	323	}
	324	}
	325
	326	VIDEO_START( atarist )
	327	{
	328	atarist_glue_timer = mame_timer_alloc(atarist_glue_tick);
	329	atarist_shifter_timer = mame_timer_alloc(atarist_shifter_tick);
	330
	331	mame_timer_adjust(atarist_glue_timer, time_zero, 0, MAME_TIME_IN_NSEC(125));
	332	mame_timer_adjust(atarist_shifter_timer, time_zero, 0, MAME_TIME_IN_NSEC(500));
	333
	334	atarist_bitmap = auto_bitmap_alloc(Machine->screen[0].width, Machine->screen[0].height, Machine->screen[0].format);
	335	}
	336
	337	VIDEO_UPDATE( atarist )
	338	{
	339	copybitmap(bitmap, atarist_bitmap, 0, 0, 0, 0, cliprect, TRANSPARENCY_NONE, 0);
	340
	341	return 0;
	342	}

src/mess/video/atarist.h

r0	r792
	1	#ifndef _VIDEO_ATARIST_H_
	2	#define _VIDEO_ATARIST_H_
	3
	4	READ16_HANDLER( atarist_shifter_r );
	5	WRITE16_HANDLER( atarist_shifter_w );
	6	READ16_HANDLER( atariste_shifter_r );
	7	WRITE16_HANDLER( atariste_shifter_w );
	8
	9	VIDEO_START( atarist );
	10	VIDEO_UPDATE( atarist );
	11
	12	#endif

src/mess/messdriv.c

r791	r792
68	68	DRIVER( lynx )      /* Atari Lynx Handheld                        */
69	69	DRIVER( lynx2 )      /* Atari Lynx II Handheld redesigned, no additions   */
70	70	DRIVER( jaguar )   /* Atari Jaguar                              */
	71	DRIVER( atarist )   /* Atari ST                                 */
	72	DRIVER( megast )   /* Atari Mega ST                           */
	73	//   DRIVER( atariste )   /* Atari STe                              */
	74	//   DRIVER( megaste )   /* Atari Mega STe                           */
	75	//   DRIVER( stacy )      /* Atari STacy                              */
	76	//   DRIVER( stbook )   /* Atari ST Book                           */
	77	//   DRIVER( tt030 )      /* Atari TT030                              */
	78	//   DRIVER( falcon )   /* Atari Falcon030                           */
71	79
72	80	/* NINTENDO */
73	81	DRIVER( nes )      /* Nintendo Entertainment System               */

src/mess/machine/68901mfp.c

r0	r792
	1	/*
	2
	3	TODO:
	4
	5	- pulse mode
	6	- serial comms
	7	- interrupt queueing
	8	- gpio interrupts
	9	- trigger interrupt on AER change
	10
	11	*/
	12
	13	#include "68901mfp.h"
	14
	15	typedef struct
	16	{
	17	UINT8 gpip;
	18	UINT8 aer;
	19	UINT8 ddr;
	20
	21	UINT8 iera, ierb;
	22	UINT8 ipra, iprb;
	23	UINT8 isra, isrb;
	24	UINT8 imra, imrb;
	25	UINT8 vr;
	26
	27	UINT8 tacr, tbcr, tcdcr;
	28	UINT8 tadr, tbdr, tcdr, tddr;
	29	UINT8 tarr, tbrr, tcrr, tdrr;
	30	int tao, tbo, tco, tdo;
	31	int tai, tbi;
	32
	33	UINT8 scr;
	34	UINT8 ucr;
	35	UINT8 rsr;
	36	UINT8 tsr;
	37	UINT8 udr;
	38
	39	mame_timer *timer_a, *timer_b, *timer_c, *timer_d;
	40
	41	int   chip_clock;
	42	int   timer_clock;
	43
	44	void (*tao_w)(int which, int value);
	45	void (*tbo_w)(int which, int value);
	46	void (*tco_w)(int which, int value);
	47	void (*tdo_w)(int which, int value);
	48
	49	void (*irq_callback)(int which, int state, int vector);
	50
	51	read8_handler gpio_r;
	52	write8_handler gpio_w;
	53	} mfp_68901;
	54
	55	static mfp_68901 mfp[MAX_MFP];
	56
	57	static TIMER_CALLBACK( timer_a );
	58	static TIMER_CALLBACK( timer_b );
	59	static TIMER_CALLBACK( timer_c );
	60	static TIMER_CALLBACK( timer_d );
	61
	62	void mfp68901_irq_ack(int which)
	63	{
	64	mfp_68901 *mfp_p = &mfp[which];
	65
	66	UINT16 ipr = (mfp_p->ipra << 8) | mfp_p->iprb;
	67	UINT16 isr = (mfp_p->isra << 8) | mfp_p->isrb;
	68	UINT16 imr = (mfp_p->imra << 8) | mfp_p->imrb;
	69	int ch;
	70
	71	for (ch = 15; ch > 0; ch--)
	72	{
	73	if (BIT(isr, ch))
	74	{
	75	break;
	76	}
	77
	78	if (BIT(ipr, ch) && BIT(imr, ch))
	79	{
	80	ipr -= (1 << ch);
	81
	82	mfp_p->ipra = (ipr & 0xff00) >> 8;
	83	mfp_p->iprb = ipr & 0xff;
	84
	85	if (mfp_p->vr & MFP68901_VR_S)
	86	{
	87	isr |= (1 << ch);
	88
	89	mfp_p->isra = (isr & 0xff00) >> 8;
	90	mfp_p->isrb = isr & 0xff;
	91	}
	92
	93	mfp_p->irq_callback(which, ASSERT_LINE, (mfp_p->vr & 0xf0) | (15 - ch));
	94	return;
	95	}
	96
	97	ipr <<= 1;
	98	isr <<= 1;
	99	imr <<= 1;
	100	}
	101
	102	mfp_p->irq_callback(which, CLEAR_LINE, 0);
	103	}
	104
	105	static UINT8 mfp68901_register_r(int which, int reg)
	106	{
	107	mfp_68901 *mfp_p = &mfp[which];
	108
	109	switch (reg)
	110	{
	111	case 0x00:
	112	{
	113	UINT8 gpio = mfp_p->gpio_r(0);
	114	gpio |= (mfp_p->gpip & mfp_p->ddr);
	115	// signal interrupts if necessary
	116	mfp68901_irq_ack(which);
	117	return gpio;
	118	}
	119	case 0x01: return mfp_p->aer;
	120	case 0x02: return mfp_p->ddr;
	121	case 0x03: return mfp_p->iera;
	122	case 0x04: return mfp_p->ierb;
	123	case 0x05: return mfp_p->ipra;
	124	case 0x06: return mfp_p->iprb;
	125	case 0x07: return mfp_p->isra;
	126	case 0x08: return mfp_p->isrb;
	127	case 0x09: return mfp_p->imra;
	128	case 0x0a: return mfp_p->imrb;
	129	case 0x0b: return mfp_p->vr;
	130	case 0x0c: return mfp_p->tacr;
	131	case 0x0d: return mfp_p->tbcr;
	132	case 0x0e: return mfp_p->tcdcr;
	133	case 0x0f: return mfp_p->tarr;
	134	case 0x10: return mfp_p->tbrr;
	135	case 0x11: return mfp_p->tcrr;
	136	case 0x12: return mfp_p->tdrr;
	137	case 0x13: return mfp_p->scr;
	138	case 0x14: return mfp_p->ucr;
	139	case 0x15: return mfp_p->rsr;
	140	case 0x16: return mfp_p->tsr;
	141	case 0x17: return mfp_p->udr;
	142	default:   return 0;
	143	}
	144	}
	145
	146	static void mfp68901_register_w(int which, int reg, UINT8 data)
	147	{
	148	mfp_68901 *mfp_p = &mfp[which];
	149
	150	switch (reg)
	151	{
	152	case 0x00:
	153	mfp_p->gpip = data & mfp_p->ddr;
	154	mfp_p->gpio_r(mfp_p->gpip);
	155	break;
	156	case 0x01:
	157	mfp_p->aer = data;
	158	// check transition and trigger interrupt if necessary
	159	mfp68901_irq_ack(which);
	160	break;
	161	case 0x02:
	162	mfp_p->ddr = data;
	163	break;
	164
	165	case 0x03:
	166	mfp_p->iera = data;
	167	mfp_p->ipra &= mfp_p->iera;
	168	mfp68901_irq_ack(which);
	169	break;
	170	case 0x04:
	171	mfp_p->ierb = data;
	172	mfp_p->iprb &= mfp_p->ierb;
	173	mfp68901_irq_ack(which);
	174	break;
	175	case 0x07:
	176	mfp_p->isra &= data;
	177	mfp68901_irq_ack(which);
	178	break;
	179	case 0x08:
	180	mfp_p->isrb &= data;
	181	mfp68901_irq_ack(which);
	182	break;
	183	case 0x09:
	184	mfp_p->imra = data;
	185	mfp68901_irq_ack(which);
	186	break;
	187	case 0x0a:
	188	mfp_p->imrb = data;
	189	mfp68901_irq_ack(which);
	190	break;
	191	case 0x0b:
	192	mfp_p->vr = data & 0xf8;
	193	if ((mfp_p->vr & MFP68901_VR_S) == 0)
	194	{
	195	mfp_p->isra = mfp_p->isrb = 0;
	196	mfp68901_irq_ack(which);
	197	}
	198	break;
	199
	200	case 0x0c:
	201	mfp_p->tacr = data & 0x1f;
	202
	203	switch (mfp_p->tacr & 0x0f)
	204	{
	205	case MFP68901_TCR_TIMER_DELAY_4:
	206	mame_timer_adjust(mfp_p->timer_a, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 4));
	207	break;
	208	case MFP68901_TCR_TIMER_DELAY_10:
	209	mame_timer_adjust(mfp_p->timer_a, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 10));
	210	break;
	211	case MFP68901_TCR_TIMER_DELAY_16:
	212	mame_timer_adjust(mfp_p->timer_a, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 16));
	213	break;
	214	case MFP68901_TCR_TIMER_DELAY_50:
	215	mame_timer_adjust(mfp_p->timer_a, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 50));
	216	break;
	217	case MFP68901_TCR_TIMER_DELAY_64:
	218	mame_timer_adjust(mfp_p->timer_a, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 64));
	219	break;
	220	case MFP68901_TCR_TIMER_DELAY_100:
	221	mame_timer_adjust(mfp_p->timer_a, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 100));
	222	break;
	223	case MFP68901_TCR_TIMER_DELAY_200:
	224	mame_timer_adjust(mfp_p->timer_a, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 200));
	225	break;
	226	case MFP68901_TCR_TIMER_STOPPED:
	227	case MFP68901_TCR_TIMER_EVENT:
	228	case MFP68901_TCR_TIMER_PULSE_4:
	229	case MFP68901_TCR_TIMER_PULSE_10:
	230	case MFP68901_TCR_TIMER_PULSE_16:
	231	case MFP68901_TCR_TIMER_PULSE_50:
	232	case MFP68901_TCR_TIMER_PULSE_64:
	233	case MFP68901_TCR_TIMER_PULSE_100:
	234	case MFP68901_TCR_TIMER_PULSE_200:
	235	mame_timer_enable(mfp_p->timer_a, 0);
	236	break;
	237	}
	238
	239	if (mfp_p->tacr & MFP68901_TCR_TIMER_RESET)
	240	{
	241	mfp_p->tao = 0;
	242
	243	if (mfp_p->tao_w)
	244	{
	245	mfp_p->tao_w(which, mfp_p->tao);
	246	}
	247	}
	248	break;
	249	case 0x0d:
	250	mfp_p->tbcr = data & 0x1f;
	251
	252	switch (mfp_p->tbcr & 0x0f)
	253	{
	254	case MFP68901_TCR_TIMER_DELAY_4:
	255	mame_timer_adjust(mfp_p->timer_b, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 4));
	256	break;
	257	case MFP68901_TCR_TIMER_DELAY_10:
	258	mame_timer_adjust(mfp_p->timer_b, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 10));
	259	break;
	260	case MFP68901_TCR_TIMER_DELAY_16:
	261	mame_timer_adjust(mfp_p->timer_b, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 16));
	262	break;
	263	case MFP68901_TCR_TIMER_DELAY_50:
	264	mame_timer_adjust(mfp_p->timer_b, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 50));
	265	break;
	266	case MFP68901_TCR_TIMER_DELAY_64:
	267	mame_timer_adjust(mfp_p->timer_b, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 64));
	268	break;
	269	case MFP68901_TCR_TIMER_DELAY_100:
	270	mame_timer_adjust(mfp_p->timer_b, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 100));
	271	break;
	272	case MFP68901_TCR_TIMER_DELAY_200:
	273	mame_timer_adjust(mfp_p->timer_b, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 200));
	274	break;
	275	case MFP68901_TCR_TIMER_STOPPED:
	276	case MFP68901_TCR_TIMER_EVENT:
	277	case MFP68901_TCR_TIMER_PULSE_4:
	278	case MFP68901_TCR_TIMER_PULSE_10:
	279	case MFP68901_TCR_TIMER_PULSE_16:
	280	case MFP68901_TCR_TIMER_PULSE_50:
	281	case MFP68901_TCR_TIMER_PULSE_64:
	282	case MFP68901_TCR_TIMER_PULSE_100:
	283	case MFP68901_TCR_TIMER_PULSE_200:
	284	mame_timer_enable(mfp_p->timer_b, 0);
	285	break;
	286	}
	287
	288	if (mfp_p->tbcr & MFP68901_TCR_TIMER_RESET)
	289	{
	290	mfp_p->tbo = 0;
	291
	292	if (mfp_p->tbo_w)
	293	{
	294	mfp_p->tbo_w(which, mfp_p->tbo);
	295	}
	296	}
	297	break;
	298	case 0x0e:
	299	mfp_p->tcdcr = data & 0x6f;
	300
	301	switch (mfp_p->tcdcr & 0x07)
	302	{
	303	case MFP68901_TCR_TIMER_DELAY_4:
	304	mame_timer_adjust(mfp_p->timer_d, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 4));
	305	break;
	306	case MFP68901_TCR_TIMER_DELAY_10:
	307	mame_timer_adjust(mfp_p->timer_d, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 10));
	308	break;
	309	case MFP68901_TCR_TIMER_DELAY_16:
	310	mame_timer_adjust(mfp_p->timer_d, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 16));
	311	break;
	312	case MFP68901_TCR_TIMER_DELAY_50:
	313	mame_timer_adjust(mfp_p->timer_d, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 50));
	314	break;
	315	case MFP68901_TCR_TIMER_DELAY_64:
	316	mame_timer_adjust(mfp_p->timer_d, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 64));
	317	break;
	318	case MFP68901_TCR_TIMER_DELAY_100:
	319	mame_timer_adjust(mfp_p->timer_d, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 100));
	320	break;
	321	case MFP68901_TCR_TIMER_DELAY_200:
	322	mame_timer_adjust(mfp_p->timer_d, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 200));
	323	break;
	324	case MFP68901_TCR_TIMER_STOPPED:
	325	mame_timer_enable(mfp_p->timer_d, 0);
	326	break;
	327	}
	328
	329	switch ((mfp_p->tcdcr >> 4) & 0x07)
	330	{
	331	case MFP68901_TCR_TIMER_DELAY_4:
	332	mame_timer_adjust(mfp_p->timer_c, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 4));
	333	break;
	334	case MFP68901_TCR_TIMER_DELAY_10:
	335	mame_timer_adjust(mfp_p->timer_c, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 10));
	336	break;
	337	case MFP68901_TCR_TIMER_DELAY_16:
	338	mame_timer_adjust(mfp_p->timer_c, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 16));
	339	break;
	340	case MFP68901_TCR_TIMER_DELAY_50:
	341	mame_timer_adjust(mfp_p->timer_c, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 50));
	342	break;
	343	case MFP68901_TCR_TIMER_DELAY_64:
	344	mame_timer_adjust(mfp_p->timer_c, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 64));
	345	break;
	346	case MFP68901_TCR_TIMER_DELAY_100:
	347	mame_timer_adjust(mfp_p->timer_c, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 100));
	348	break;
	349	case MFP68901_TCR_TIMER_DELAY_200:
	350	mame_timer_adjust(mfp_p->timer_c, time_zero, 0, MAME_TIME_IN_HZ(mfp_p->timer_clock / 200));
	351	break;
	352	case MFP68901_TCR_TIMER_STOPPED:
	353	mame_timer_enable(mfp_p->timer_c, 0);
	354	break;
	355	}
	356	break;
	357	case 0x0f:
	358	mfp_p->tadr = data;
	359
	360	if (!mame_timer_enabled(mfp_p->timer_a))
	361	{
	362	mfp_p->tarr = data;
	363	}
	364	break;
	365	case 0x10:
	366	mfp_p->tbdr = data;
	367
	368	if (!mame_timer_enabled(mfp_p->timer_b))
	369	{
	370	mfp_p->tbrr = data;
	371	}
	372	break;
	373	case 0x11:
	374	mfp_p->tcdr = data;
	375
	376	if (!mame_timer_enabled(mfp_p->timer_c))
	377	{
	378	mfp_p->tcrr = data;
	379	}
	380	break;
	381	case 0x12:
	382	mfp_p->tddr = data;
	383
	384	if (!mame_timer_enabled(mfp_p->timer_d))
	385	{
	386	mfp_p->tdrr = data;
	387	}
	388	break;
	389
	390	// USART not implemented
	391	case 0x13: mfp_p->scr = data;
	392	break;
	393	case 0x14: mfp_p->ucr = data;
	394	break;
	395	case 0x15: mfp_p->rsr = data;
	396	break;
	397	case 0x16: mfp_p->tsr = data;
	398	break;
	399	case 0x17: mfp_p->udr = data;
	400	break;
	401	}
	402	}
	403
	404	void mfp68901_config(int which, const struct mfp68901_interface *intf)
	405	{
	406	mfp_68901 *mfp_p = &mfp[which];
	407
	408	if (which >= MAX_MFP)
	409	{
	410	return;
	411	}
	412
	413	mfp_p->chip_clock = intf->chip_clock;
	414	mfp_p->timer_clock = intf->timer_clock;
	415	mfp_p->irq_callback = intf->irq_callback;
	416	mfp_p->gpio_r = intf->gpio_r;
	417	mfp_p->gpio_w = intf->gpio_w;
	418
	419	mfp_p->timer_a = mame_timer_alloc(timer_a);
	420	mfp_p->timer_b = mame_timer_alloc(timer_b);
	421	mfp_p->timer_c = mame_timer_alloc(timer_c);
	422	mfp_p->timer_d = mame_timer_alloc(timer_d);
	423
	424	mame_timer_reset(mfp_p->timer_a, time_never);
	425	mame_timer_reset(mfp_p->timer_b, time_never);
	426	mame_timer_reset(mfp_p->timer_c, time_never);
	427	mame_timer_reset(mfp_p->timer_d, time_never);
	428
	429	state_save_register_item("mfp68901", which, mfp_p->gpip);
	430	state_save_register_item("mfp68901", which, mfp_p->aer);
	431	state_save_register_item("mfp68901", which, mfp_p->ddr);
	432	state_save_register_item("mfp68901", which, mfp_p->iera);
	433	state_save_register_item("mfp68901", which, mfp_p->ierb);
	434	state_save_register_item("mfp68901", which, mfp_p->ipra);
	435	state_save_register_item("mfp68901", which, mfp_p->iprb);
	436	state_save_register_item("mfp68901", which, mfp_p->isra);
	437	state_save_register_item("mfp68901", which, mfp_p->isrb);
	438	state_save_register_item("mfp68901", which, mfp_p->imra);
	439	state_save_register_item("mfp68901", which, mfp_p->imrb);
	440	state_save_register_item("mfp68901", which, mfp_p->vr);
	441	state_save_register_item("mfp68901", which, mfp_p->tacr);
	442	state_save_register_item("mfp68901", which, mfp_p->tbcr);
	443	state_save_register_item("mfp68901", which, mfp_p->tcdcr);
	444	state_save_register_item("mfp68901", which, mfp_p->tadr);
	445	state_save_register_item("mfp68901", which, mfp_p->tbdr);
	446	state_save_register_item("mfp68901", which, mfp_p->tcdr);
	447	state_save_register_item("mfp68901", which, mfp_p->tddr);
	448	state_save_register_item("mfp68901", which, mfp_p->tarr);
	449	state_save_register_item("mfp68901", which, mfp_p->tbrr);
	450	state_save_register_item("mfp68901", which, mfp_p->tcrr);
	451	state_save_register_item("mfp68901", which, mfp_p->tdrr);
	452	state_save_register_item("mfp68901", which, mfp_p->tao);
	453	state_save_register_item("mfp68901", which, mfp_p->tbo);
	454	state_save_register_item("mfp68901", which, mfp_p->tco);
	455	state_save_register_item("mfp68901", which, mfp_p->tdo);
	456	state_save_register_item("mfp68901", which, mfp_p->tai);
	457	state_save_register_item("mfp68901", which, mfp_p->tbi);
	458	state_save_register_item("mfp68901", which, mfp_p->scr);
	459	state_save_register_item("mfp68901", which, mfp_p->ucr);
	460	state_save_register_item("mfp68901", which, mfp_p->rsr);
	461	state_save_register_item("mfp68901", which, mfp_p->tsr);
	462	state_save_register_item("mfp68901", which, mfp_p->udr);
	463	state_save_register_item("mfp68901", which, mfp_p->chip_clock);
	464	state_save_register_item("mfp68901", which, mfp_p->timer_clock);
	465	}
	466
	467	void mfp68901_timer_count_a(int which)
	468	{
	469	mfp_68901 *mfp_p = &mfp[which];
	470
	471	if (mfp_p->tarr == 0x01)
	472	{
	473	if (mfp_p->iera & 0x20)
	474	{
	475	mfp_p->ipra |= 0x20;
	476
	477	if (mfp_p->imra & 0x20)
	478	{
	479	mfp68901_irq_ack(which);
	480
	481	if (mfp_p->tao)
	482	{
	483	mfp_p->tao = 0;
	484	}
	485	else
	486	{
	487	mfp_p->tao = 1;
	488	}
	489
	490	if (mfp_p->tao_w)
	491	{
	492	mfp_p->tao_w(which, mfp_p->tao);
	493	}
	494	}
	495	}
	496
	497	mfp_p->tarr = mfp_p->tadr;
	498	}
	499	else
	500	{
	501	mfp_p->tarr--;
	502	}
	503	}
	504
	505	void mfp68901_timer_count_b(int which)
	506	{
	507	mfp_68901 *mfp_p = &mfp[which];
	508
	509	if (mfp_p->tbrr == 0x01)
	510	{
	511	if (mfp_p->iera & 0x01)
	512	{
	513	mfp_p->ipra |= 0x01;
	514
	515	if (mfp_p->imra & 0x01)
	516	{
	517	mfp68901_irq_ack(which);
	518
	519	if (mfp_p->tbo)
	520	{
	521	mfp_p->tbo = 0;
	522	}
	523	else
	524	{
	525	mfp_p->tbo = 1;
	526	}
	527
	528	if (mfp_p->tbo_w)
	529	{
	530	mfp_p->tbo_w(which, mfp_p->tbo);
	531	}
	532	}
	533	}
	534
	535	mfp_p->tbrr = mfp_p->tbdr;
	536	}
	537	else
	538	{
	539	mfp_p->tbrr--;
	540	}
	541	}
	542
	543	void mfp68901_timer_count_c(int which)
	544	{
	545	mfp_68901 *mfp_p = &mfp[which];
	546
	547	if (mfp_p->tcrr == 0x01)
	548	{
	549	if (mfp_p->ierb & 0x20)
	550	{
	551	mfp_p->iprb |= 0x20;
	552
	553	if (mfp_p->imrb & 0x20)
	554	{
	555	mfp68901_irq_ack(which);
	556
	557	if (mfp_p->tco)
	558	{
	559	mfp_p->tco = 0;
	560	}
	561	else
	562	{
	563	mfp_p->tco = 1;
	564	}
	565
	566	if (mfp_p->tco_w)
	567	{
	568	mfp_p->tco_w(which, mfp_p->tco);
	569	}
	570	}
	571	}
	572
	573	mfp_p->tcrr = mfp_p->tcdr;
	574	}
	575	else
	576	{
	577	mfp_p->tcrr--;
	578	}
	579	}
	580
	581	void mfp68901_timer_count_d(int which)
	582	{
	583	mfp_68901 *mfp_p = &mfp[which];
	584
	585	if (mfp_p->tdrr == 0x01)
	586	{
	587	if (mfp_p->ierb & 0x01)
	588	{
	589	mfp_p->iprb |= 0x01;
	590
	591	if (mfp_p->imrb & 0x01)
	592	{
	593	mfp68901_irq_ack(which);
	594
	595	if (mfp_p->tdo)
	596	{
	597	mfp_p->tdo = 0;
	598	}
	599	else
	600	{
	601	mfp_p->tdo = 1;
	602	}
	603
	604	if (mfp_p->tdo_w)
	605	{
	606	mfp_p->tdo_w(which, mfp_p->tdo);
	607	}
	608	}
	609	}
	610
	611	mfp_p->tdrr = mfp_p->tddr;
	612	}
	613	else
	614	{
	615	mfp_p->tdrr--;
	616	}
	617	}
	618
	619	void mfp68901_tai_w(int which, int value)
	620	{
	621	mfp_68901 *mfp_p = &mfp[which];
	622
	623	switch (mfp_p->tacr & 0x0f)
	624	{
	625	case MFP68901_TCR_TIMER_DELAY_4:
	626	case MFP68901_TCR_TIMER_DELAY_10:
	627	case MFP68901_TCR_TIMER_DELAY_16:
	628	case MFP68901_TCR_TIMER_DELAY_50:
	629	case MFP68901_TCR_TIMER_DELAY_64:
	630	case MFP68901_TCR_TIMER_DELAY_100:
	631	case MFP68901_TCR_TIMER_DELAY_200:
	632	case MFP68901_TCR_TIMER_STOPPED:
	633	return;
	634
	635	case MFP68901_TCR_TIMER_EVENT:
	636	if (mfp_p->aer & MFP68901_AER_GPIP_4)
	637	{
	638	// count down on 0->1 transition
	639	if (mfp_p->tai == 0 && value == 1)
	640	{
	641	mfp_p->tai = value;
	642	mfp68901_timer_count_a(which);
	643	}
	644	}
	645	else
	646	{
	647	// count down on 1->0 transition
	648	if (mfp_p->tai == 1 && value == 0)
	649	{
	650	mfp_p->tai = value;
	651	mfp68901_timer_count_a(which);
	652	}
	653	}
	654	break;
	655
	656	case MFP68901_TCR_TIMER_PULSE_4:
	657	case MFP68901_TCR_TIMER_PULSE_10:
	658	case MFP68901_TCR_TIMER_PULSE_16:
	659	case MFP68901_TCR_TIMER_PULSE_50:
	660	case MFP68901_TCR_TIMER_PULSE_64:
	661	case MFP68901_TCR_TIMER_PULSE_100:
	662	case MFP68901_TCR_TIMER_PULSE_200:
	663	break;
	664	}
	665
	666	mfp68901_irq_ack(which);
	667	}
	668
	669	void mfp68901_tbi_w(int which, int value)
	670	{
	671	mfp_68901 *mfp_p = &mfp[which];
	672
	673	switch (mfp_p->tbcr & 0x0f)
	674	{
	675	case MFP68901_TCR_TIMER_DELAY_4:
	676	case MFP68901_TCR_TIMER_DELAY_10:
	677	case MFP68901_TCR_TIMER_DELAY_16:
	678	case MFP68901_TCR_TIMER_DELAY_50:
	679	case MFP68901_TCR_TIMER_DELAY_64:
	680	case MFP68901_TCR_TIMER_DELAY_100:
	681	case MFP68901_TCR_TIMER_DELAY_200:
	682	case MFP68901_TCR_TIMER_STOPPED:
	683	return;
	684
	685	case MFP68901_TCR_TIMER_EVENT:
	686	if (mfp_p->aer & MFP68901_AER_GPIP_3)
	687	{
	688	// count down on 0->1 transition
	689	if (mfp_p->tbi == 0 && value == 1)
	690	{
	691	mfp_p->tbi = value;
	692	mfp68901_timer_count_b(which);
	693	}
	694	}
	695	else
	696	{
	697	// count down on 1->0 transition
	698	if (mfp_p->tbi == 1 && value == 0)
	699	{
	700	mfp_p->tbi = value;
	701	mfp68901_timer_count_b(which);
	702	}
	703	}
	704	break;
	705
	706	case MFP68901_TCR_TIMER_PULSE_4:
	707	case MFP68901_TCR_TIMER_PULSE_10:
	708	case MFP68901_TCR_TIMER_PULSE_16:
	709	case MFP68901_TCR_TIMER_PULSE_50:
	710	case MFP68901_TCR_TIMER_PULSE_64:
	711	case MFP68901_TCR_TIMER_PULSE_100:
	712	case MFP68901_TCR_TIMER_PULSE_200:
	713	break;
	714	}
	715
	716	mfp68901_irq_ack(which);
	717	}
	718
	719	static TIMER_CALLBACK( timer_a )
	720	{
	721	int which = param;
	722
	723	mfp68901_timer_count_a(which);
	724	}
	725
	726	static TIMER_CALLBACK( timer_b )
	727	{
	728	int which = param;
	729
	730	mfp68901_timer_count_b(which);
	731	}
	732
	733	static TIMER_CALLBACK( timer_c )
	734	{
	735	int which = param;
	736
	737	mfp68901_timer_count_c(which);
	738	}
	739
	740	static TIMER_CALLBACK( timer_d )
	741	{
	742	int which = param;
	743
	744	mfp68901_timer_count_d(which);
	745	}
	746
	747	READ16_HANDLER( mfp68901_0_register16_r ) { return mfp68901_register_r(0, offset / 2); }
	748	READ16_HANDLER( mfp68901_1_register16_r ) { return mfp68901_register_r(1, offset / 2); }
	749	READ16_HANDLER( mfp68901_2_register16_r ) { return mfp68901_register_r(2, offset / 2); }
	750	READ16_HANDLER( mfp68901_3_register16_r ) { return mfp68901_register_r(3, offset / 2); }
	751
	752	WRITE16_HANDLER( mfp68901_0_register_msb_w ) { if (ACCESSING_MSB) mfp68901_register_w(0, offset / 2, (data >> 8) & 0xff); }
	753	WRITE16_HANDLER( mfp68901_1_register_msb_w ) { if (ACCESSING_MSB) mfp68901_register_w(0, offset / 2, (data >> 8) & 0xff); }
	754	WRITE16_HANDLER( mfp68901_2_register_msb_w ) { if (ACCESSING_MSB) mfp68901_register_w(0, offset / 2, (data >> 8) & 0xff); }
	755	WRITE16_HANDLER( mfp68901_3_register_msb_w ) { if (ACCESSING_MSB) mfp68901_register_w(0, offset / 2, (data >> 8) & 0xff); }
	756
	757	WRITE16_HANDLER( acia6850_0_register_lsb_w ) { if (ACCESSING_LSB) mfp68901_register_w(0, offset / 2, data & 0xff); }
	758	WRITE16_HANDLER( acia6850_1_register_lsb_w ) { if (ACCESSING_LSB) mfp68901_register_w(0, offset / 2, data & 0xff); }
	759	WRITE16_HANDLER( acia6850_2_register_lsb_w ) { if (ACCESSING_LSB) mfp68901_register_w(0, offset / 2, data & 0xff); }
	760	WRITE16_HANDLER( acia6850_3_register_lsb_w ) { if (ACCESSING_LSB) mfp68901_register_w(0, offset / 2, data & 0xff); }

src/mess/machine/68901mfp.h

r0	r792
	1	#ifndef MFP68901_H
	2	#define MFP68901_H
	3
	4	#define MAX_MFP   4
	5
	6	#include "driver.h"
	7	#include "timer.h"
	8
	9	struct mfp68901_interface
	10	{
	11	int   chip_clock;
	12	int   timer_clock;
	13
	14	void (*tao_w)(int which, int value);
	15	void (*tbo_w)(int which, int value);
	16	void (*tco_w)(int which, int value);
	17	void (*tdo_w)(int which, int value);
	18
	19	void (*irq_callback)(int which, int state, int vector);
	20
	21	read8_handler gpio_r;
	22	write8_handler gpio_w;
	23	};
	24
	25	enum
	26	{
	27	MFP68901_INT_GPI0 = 0,
	28	MFP68901_INT_GPI1,
	29	MFP68901_INT_GPI2,
	30	MFP68901_INT_GPI3,
	31	MFP68901_INT_TIMER_D,
	32	MFP68901_INT_TIMER_C,
	33	MFP68901_INT_GPI4,
	34	MFP68901_INT_GPI5,
	35	MFP68901_INT_TIMER_B,
	36	MFP68901_INT_XMIT_ERROR,
	37	MFP68901_INT_XMIT_BUFFER_EMPTY,
	38	MFP68901_INT_RCV_ERROR,
	39	MFP68901_INT_RCV_BUFFER_FULL,
	40	MFP68901_INT_TIMER_A,
	41	MFP68901_INT_GPI6,
	42	MFP68901_INT_GPI7
	43	};
	44
	45
	46	#define MFP68901_AER_GPIP_0            0x01
	47	#define MFP68901_AER_GPIP_1            0x02
	48	#define MFP68901_AER_GPIP_2            0x04
	49	#define MFP68901_AER_GPIP_3            0x08
	50	#define MFP68901_AER_GPIP_4            0x10
	51	#define MFP68901_AER_GPIP_5            0x20
	52	#define MFP68901_AER_GPIP_6            0x40
	53	#define MFP68901_AER_GPIP_7            0x80
	54
	55	#define MFP68901_VR_S               0x08
	56
	57	#define MFP68901_IPRB_GPIP_0         0x01
	58	#define MFP68901_IPRB_GPIP_1         0x02
	59	#define MFP68901_IPRB_GPIP_2         0x04
	60	#define MFP68901_IPRB_GPIP_3         0x08
	61	#define MFP68901_IPRB_TIMER_D         0x10
	62	#define MFP68901_IPRB_TIMER_C         0x20
	63	#define MFP68901_IPRB_GPIP_4         0x40
	64	#define MFP68901_IPRB_GPIP_5         0x80
	65
	66	#define MFP68901_IPRA_TIMER_B         0x01
	67	#define MFP68901_IPRA_XMIT_ERROR      0x02
	68	#define MFP68901_IPRA_XMIT_BUFFER_EMPTY   0x04
	69	#define MFP68901_IPRA_RCV_ERROR         0x08
	70	#define MFP68901_IPRA_RCV_BUFFER_FULL   0x10
	71	#define MFP68901_IPRA_TIMER_A         0x20
	72	#define MFP68901_IPRA_GPIP_6         0x40
	73	#define MFP68901_IPRA_GPIP_7         0x80
	74
	75	#define MFP68901_TCR_TIMER_STOPPED      0x00
	76	#define MFP68901_TCR_TIMER_DELAY_4      0x01
	77	#define MFP68901_TCR_TIMER_DELAY_10      0x02
	78	#define MFP68901_TCR_TIMER_DELAY_16      0x03
	79	#define MFP68901_TCR_TIMER_DELAY_50      0x04
	80	#define MFP68901_TCR_TIMER_DELAY_64      0x05
	81	#define MFP68901_TCR_TIMER_DELAY_100   0x06
	82	#define MFP68901_TCR_TIMER_DELAY_200   0x07
	83	#define MFP68901_TCR_TIMER_EVENT      0x08
	84	#define MFP68901_TCR_TIMER_PULSE_4      0x09
	85	#define MFP68901_TCR_TIMER_PULSE_10      0x0a
	86	#define MFP68901_TCR_TIMER_PULSE_16      0x0b
	87	#define MFP68901_TCR_TIMER_PULSE_50      0x0c
	88	#define MFP68901_TCR_TIMER_PULSE_64      0x0d
	89	#define MFP68901_TCR_TIMER_PULSE_100   0x0e
	90	#define MFP68901_TCR_TIMER_PULSE_200   0x0f
	91	#define MFP68901_TCR_TIMER_RESET      0x10
	92
	93	#define MFP68901_UCR_PARITY_ENABLED      0x04
	94	#define MFP68901_UCR_PARITY_EVEN      0x02
	95	#define MFP68901_UCR_PARITY_ODD         0x00
	96	#define MFP68901_UCR_WORD_LENGTH_8      0x00
	97	#define MFP68901_UCR_WORD_LENGTH_7      0x20
	98	#define MFP68901_UCR_WORD_LENGTH_6      0x40
	99	#define MFP68901_UCR_WORD_LENGTH_5      0x60
	100	#define MFP68901_UCR_START_STOP_0_0      0x00
	101	#define MFP68901_UCR_START_STOP_1_1      0x08
	102	#define MFP68901_UCR_START_STOP_1_15   0x10
	103	#define MFP68901_UCR_START_STOP_1_2      0x18
	104	#define MFP68901_UCR_CLOCK_DIVIDE_16   0x80
	105	#define MFP68901_UCR_CLOCK_DIVIDE_1      0x00
	106
	107	#define MFP68901_RSR_RCV_ENABLE         0x01
	108	#define MFP68901_RSR_SYNC_STRIP_ENABLE   0x02
	109	#define MFP68901_RSR_MCIP            0x04
	110	#define MFP68901_RSR_FOUND_SEARCH      0x08
	111	#define MFP68901_RSR_FRAME_ERROR      0x10
	112	#define MFP68901_RSR_PARITY_ERROR      0x20
	113	#define MFP68901_RSR_OVERRUN_ERROR      0x40
	114	#define MFP68901_RSR_BUFFER_FULL      0x80
	115
	116	#define MFP68901_TSR_XMIT_ENABLE      0x01
	117	#define MFP68901_TSR_LOW            0x02
	118	#define MFP68901_TSR_HIGH            0x04
	119	#define MFP68901_TSR_BREAK            0x08
	120	#define MFP68901_TSR_END_OF_XMIT      0x10
	121	#define MFP68901_TSR_AUTO_TURNAROUND   0x20
	122	#define MFP68901_TSR_UNDERRUN_ERROR      0x40
	123	#define MFP68901_TSR_BUFFER_EMPTY      0x80
	124
	125	void mfp68901_config(int which, const struct mfp68901_interface *intf);
	126
	127	void mfp68901_tai_w(int which, int value);
	128	void mfp68901_tbi_w(int which, int value);
	129
	130	READ16_HANDLER( mfp68901_0_register16_r );
	131	READ16_HANDLER( mfp68901_1_register16_r );
	132	READ16_HANDLER( mfp68901_2_register16_r );
	133	READ16_HANDLER( mfp68901_3_register16_r );
	134
	135	WRITE16_HANDLER( mfp68901_0_register_msb_w );
	136	WRITE16_HANDLER( mfp68901_1_register_msb_w );
	137	WRITE16_HANDLER( mfp68901_2_register_msb_w );
	138	WRITE16_HANDLER( mfp68901_3_register_msb_w );
	139
	140	WRITE16_HANDLER( mfp68901_0_register_lsb_w );
	141	WRITE16_HANDLER( mfp68901_1_register_lsb_w );
	142	WRITE16_HANDLER( mfp68901_2_register_lsb_w );
	143	WRITE16_HANDLER( mfp68901_3_register_lsb_w );
	144
	145	#endif

src/mess/mess.mak

r791	r792
88	88	#CPUS += M6802
89	89	CPUS += M6803
90	90	#CPUS += M6808
91		#CPUS += HD63701
	91	CPUS += HD63701
92	92	#CPUS += NSC8105
93	93	CPUS += M6805
94	94	#CPUS += M68705
r791	r792
527	527	$(MAME_AUDIO)/jaguar.o         \
528	528	$(MAME_VIDEO)/jaguar.o         \
529	529	$(MESS_FORMATS)/a26_cas.o   \
530		#   $(MESS_DRIVERS)/atarist.o
	530	$(MESS_DRIVERS)/atarist.o \
	531	$(MESS_VIDEO)/atarist.o \
	532	$(MAME_MACHINE)/6850acia.o \
	533	$(MESS_MACHINE)/68901mfp.o
531	534
532	535	$(MESSOBJ)/gce.a:                        \
533	536	$(MESS_DRIVERS)/vectrex.o   \

src/mess/drivers/atarist.c

r791	r792
1		/*******************************************************************************
2
3
4
5		Emulation by Bryan McPhail, mish@tendril.co.uk
6
7		Todo:
8		Blitter bug
9		Other IKBD commands
10		Floppy Drive B
11		Hard disk emu
12		Load complete disk image at once to avoid frameskip problems
13
14
15		Keyboard Notes, due to differences between ST & PC keyboards:
16		Caps Lock is mapped to Right ALT
17		ISO is mapped to Right Control
18		Undo is mapped to Page Up
19		Help is mapped to Page Down
20		Keypad ( is mapped to F11
21		Keypad ) is mapped to F12
22		@ is mapped to tilde (~)
23
24		Issues:
25		gau_658 (or 668?) Dungeon Master - keyboard doesn't work on menu screen
26		pp_35 - Castle Master hangs (timer A related?)
27		PP57 hangs before menu
28		PP60 - Lotus Turbo - slight flicker in last line (probably changing screenbase)
29		PP15 - Rtype hangs writing keyboard resets?
30		PP16 - Altered Beast hangs - keyboard codes again
31		PP17 - Strider hangs when starting a game
32		PP18 - Toobin, random raster streaks (screenbase)
33		PP20 - Hard Driving, random raster streaks (screenbase)
34		PP33 - Top border menus?  Timer A used
35		Medway73 - Trace mode decryption routine!
36		Venus The Flytrap - in game raster effects don't work.
37
38
39		Machine:
40		MK68681 MFP (timers, interrupts, serial I/O)
41		'Fake' IKBD (intelligent keyboard) emulation
42		WD1772 disk controller + DMA system
43		'Fake' Hard disk emulation
44
45		video:
46		Shifter chip emulation
47		Blitter chip emulation
48
49
50		*******************************************************************************/
51
52	1	#include "driver.h"
	2	#include "inputx.h"
53	3	#include "video/generic.h"
54		#include "machine/wd17xx.h"
	4	#include "video/atarist.h"
55	5	#include "cpu/m68000/m68k.h"
56	6	#include "cpu/m68000/m68000.h"
57	7	#include "devices/basicdsk.h"
	8	#include "devices/cartslot.h"
	9	#include "devices/printer.h"
	10	#include "includes/centroni.h"
	11	#include "includes/serial.h"
	12	#include "machine/6850acia.h"
	13	#include "machine/68901mfp.h"
	14	#include "machine/wd17xx.h"
	15	#include "sound/ay8910.h"
58	16
59		#define MASTER_CLOCK   8000000
60		#define   MK68901_CLOCK   2457600
61		//#define MASTER_CLOCK   (8000000*1.2)
62		//#define   MK68901_CLOCK   (2457600*1.2)
	17	/*
63	18
64		//static int disk_changed[2];
	19	TODO:
65	20
66		UINT16 *atarist_ram,*sub_ram,*atarist_bank_ram,*atarist_edfs_ram,*atarist_blitter_ram;
67		unsigned int pal_lookup[16];
	21	- US keyboard layout
	22	- HD6310 cpu core
	23	- connect keyboard ports to HD6310 (needs port3/4 added to the cpu core)
	24	- connect mouse to HD6310
	25	- connect HD6310 to ACIA #0
	26	- floppy image device_load
	27	- MFP interrupts
	28	- MMU
	29	- accurate screen timing
68	30
69		int atarist_current_drive;
	31	*/
70	32
71		UINT16 *atarist_fakehdc_ram;
	33	#define Y1      2457600.0
	34	#define Y2      32084988.0
	35	#define Y2_NTSC   32042400.0
72	36
73		static int atarist_options;
	37	/* WD1772 FDC */
74	38
75		static int atarist_vidram_base;
76
77		static int wd1772_active=0;
78
79		// move to struct
80		static int current_line,current_pixel,shifter_sync,start_line,end_line,resolution,atarist_shifter_offset;
81
82
83		static int acia_status=0xe;
84		static int acia_buffer[64],acia_bufpos=0,acia_bufptr=0;
85
86		struct MFP {
87		UINT8 genr,vr,ddr,aer;
88		UINT8 iea,ipa,ima,isa;
89		UINT8 ieb,ipb,imb,isb;
90		UINT8 tacr,tbcr,tcdcr;
91		UINT8 taty,tbty;
92		UINT8 tarl,tbrl,tcrl,tdrl;
93		int tadr,tbdr,tcdr,tddr;
94		int timer_c_cycles;
95		void *timer_a,*timer_b,*timer_c,*timer_d;
96		} mfp;
97
98		static void mfp_init(void)
	39	static struct FDC
99	40	{
100		mfp.genr=mfp.vr=mfp.aer=mfp.ddr=0;
101		mfp.iea=mfp.ipa=mfp.ima=mfp.isa=0;
102		mfp.ieb=mfp.ipb=mfp.imb=mfp.isb=0;
103		mfp.tadr=mfp.tbdr=mfp.tcdr=mfp.tddr=256;
104		mfp.tacr=mfp.tbcr=mfp.tcdcr=0;
105		mfp.tarl=mfp.tbrl=mfp.tcrl=mfp.tdrl=0; /* reload values */
106		mfp.taty=mfp.tbty=0; /* Timer types */
107		mfp.timer_a=mfp.timer_b=mfp.timer_c=mfp.timer_d=NULL;
108		mfp.timer_c_cycles=0;
109		}
110
111		static VIDEO_START( atarist )
112		{
113		int i;
114		for (i=0; i<512; i++)
115		palette_set_color_rgb(machine, i,((i>>6)&7)*0x24,((i>>3)&7)*0x24,(i&7)*0x24);
116		}
117
118		void atarist_drawborder(int line)
119		{
120		unsigned short *bm=(unsigned short *)Machine->scrbitmap->line[line]+96*2;
121		int x,i;
122
123		if (line<60) return;
124		if (line>304) return;
125
126		//   for (x=0; x<640; x+=16)
127		for (x=0; x<640; x+=16)
128		for (i=0; i<16; i++)
129		bm[x+i]=Machine->pens[pal_lookup[0]];
130		}
131
132		void atarist_drawline(int line, int start, int end)
133		{
134		int x;
135		unsigned short *bm;
136		int d=atarist_vidram_base+atarist_shifter_offset;
137		int p1,p2,p3,p4;
138
139		if (line<60) return;
140		if (line>304) return;
141
142		//   if (resolution==0) line=line*2; /* Pixel doubling in low-res */
143
144		if (current_pixel!=96) return; //hmm
145
146		bm = (unsigned short *)Machine->scrbitmap->line[line]+start*2;
147		//   for (x=0; x<640; x+=32) {
148		for (x=0; x<(end-start)*2; x+=16) {
149		p1 = READ_WORD(&atarist_ram[d+0]);
150		p2 = READ_WORD(&atarist_ram[d+2]);
151		p3 = READ_WORD(&atarist_ram[d+4]);
152		p4 = READ_WORD(&atarist_ram[d+6]);
153
154		if (resolution==0) {
155		#if 1
156		bm[30]=bm[31]=Machine->pens[pal_lookup[((p1>> 0)&0x1) | ((p2<< 1)&0x2) | ((p3<< 2)&0x4) | ((p4<< 3)&0x8)]];
157		bm[28]=bm[29]=Machine->pens[pal_lookup[((p1>> 1)&0x1) | ((p2>> 0)&0x2) | ((p3<< 1)&0x4) | ((p4<< 2)&0x8)]];
158		bm[26]=bm[27]=Machine->pens[pal_lookup[((p1>> 2)&0x1) | ((p2>> 1)&0x2) | ((p3<< 0)&0x4) | ((p4<< 1)&0x8)]];
159		bm[24]=bm[25]=Machine->pens[pal_lookup[((p1>> 3)&0x1) | ((p2>> 2)&0x2) | ((p3>> 1)&0x4) | ((p4>> 0)&0x8)]];
160		bm[22]=bm[23]=Machine->pens[pal_lookup[((p1>> 4)&0x1) | ((p2>> 3)&0x2) | ((p3>> 2)&0x4) | ((p4>> 1)&0x8)]];
161		bm[20]=bm[21]=Machine->pens[pal_lookup[((p1>> 5)&0x1) | ((p2>> 4)&0x2) | ((p3>> 3)&0x4) | ((p4>> 2)&0x8)]];
162		bm[18]=bm[19]=Machine->pens[pal_lookup[((p1>> 6)&0x1) | ((p2>> 5)&0x2) | ((p3>> 4)&0x4) | ((p4>> 3)&0x8)]];
163		bm[16]=bm[17]=Machine->pens[pal_lookup[((p1>> 7)&0x1) | ((p2>> 6)&0x2) | ((p3>> 5)&0x4) | ((p4>> 4)&0x8)]];
164		bm[14]=bm[15]=Machine->pens[pal_lookup[((p1>> 8)&0x1) | ((p2>> 7)&0x2) | ((p3>> 6)&0x4) | ((p4>> 5)&0x8)]];
165		bm[12]=bm[13]=Machine->pens[pal_lookup[((p1>> 9)&0x1) | ((p2>> 8)&0x2) | ((p3>> 7)&0x4) | ((p4>> 6)&0x8)]];
166		bm[10]=bm[11]=Machine->pens[pal_lookup[((p1>>10)&0x1) | ((p2>> 9)&0x2) | ((p3>> 8)&0x4) | ((p4>> 7)&0x8)]];
167		bm[ 8]=bm[ 9]=Machine->pens[pal_lookup[((p1>>11)&0x1) | ((p2>>10)&0x2) | ((p3>> 9)&0x4) | ((p4>> 8)&0x8)]];
168		bm[ 6]=bm[ 7]=Machine->pens[pal_lookup[((p1>>12)&0x1) | ((p2>>11)&0x2) | ((p3>>10)&0x4) | ((p4>> 9)&0x8)]];
169		bm[ 4]=bm[ 5]=Machine->pens[pal_lookup[((p1>>13)&0x1) | ((p2>>12)&0x2) | ((p3>>11)&0x4) | ((p4>>10)&0x8)]];
170		bm[ 2]=bm[ 3]=Machine->pens[pal_lookup[((p1>>14)&0x1) | ((p2>>13)&0x2) | ((p3>>12)&0x4) | ((p4>>11)&0x8)]];
171		bm[ 0]=bm[ 1]=Machine->pens[pal_lookup[((p1>>15)&0x1) | ((p2>>14)&0x2) | ((p3>>13)&0x4) | ((p4>>12)&0x8)]];
172		#endif
173		#if 0
174		bm[15]=Machine->pens[pal_lookup[((p1>> 0)&0x1) | ((p2<< 1)&0x2) | ((p3<< 2)&0x4) | ((p4<< 3)&0x8)]];
175		bm[14]=Machine->pens[pal_lookup[((p1>> 1)&0x1) | ((p2>> 0)&0x2) | ((p3<< 1)&0x4) | ((p4<< 2)&0x8)]];
176		bm[13]=Machine->pens[pal_lookup[((p1>> 2)&0x1) | ((p2>> 1)&0x2) | ((p3<< 0)&0x4) | ((p4<< 1)&0x8)]];
177		bm[12]=Machine->pens[pal_lookup[((p1>> 3)&0x1) | ((p2>> 2)&0x2) | ((p3>> 1)&0x4) | ((p4>> 0)&0x8)]];
178		bm[11]=Machine->pens[pal_lookup[((p1>> 4)&0x1) | ((p2>> 3)&0x2) | ((p3>> 2)&0x4) | ((p4>> 1)&0x8)]];
179		bm[10]=Machine->pens[pal_lookup[((p1>> 5)&0x1) | ((p2>> 4)&0x2) | ((p3>> 3)&0x4) | ((p4>> 2)&0x8)]];
180		bm[ 9]=Machine->pens[pal_lookup[((p1>> 6)&0x1) | ((p2>> 5)&0x2) | ((p3>> 4)&0x4) | ((p4>> 3)&0x8)]];
181		bm[ 8]=Machine->pens[pal_lookup[((p1>> 7)&0x1) | ((p2>> 6)&0x2) | ((p3>> 5)&0x4) | ((p4>> 4)&0x8)]];
182		bm[ 7]=Machine->pens[pal_lookup[((p1>> 8)&0x1) | ((p2>> 7)&0x2) | ((p3>> 6)&0x4) | ((p4>> 5)&0x8)]];
183		bm[ 6]=Machine->pens[pal_lookup[((p1>> 9)&0x1) | ((p2>> 8)&0x2) | ((p3>> 7)&0x4) | ((p4>> 6)&0x8)]];
184		bm[ 5]=Machine->pens[pal_lookup[((p1>>10)&0x1) | ((p2>> 9)&0x2) | ((p3>> 8)&0x4) | ((p4>> 7)&0x8)]];
185		bm[ 4]=Machine->pens[pal_lookup[((p1>>11)&0x1) | ((p2>>10)&0x2) | ((p3>> 9)&0x4) | ((p4>> 8)&0x8)]];
186		bm[ 3]=Machine->pens[pal_lookup[((p1>>12)&0x1) | ((p2>>11)&0x2) | ((p3>>10)&0x4) | ((p4>> 9)&0x8)]];
187		bm[ 2]=Machine->pens[pal_lookup[((p1>>13)&0x1) | ((p2>>12)&0x2) | ((p3>>11)&0x4) | ((p4>>10)&0x8)]];
188		bm[ 1]=Machine->pens[pal_lookup[((p1>>14)&0x1) | ((p2>>13)&0x2) | ((p3>>12)&0x4) | ((p4>>11)&0x8)]];
189		bm[ 0]=Machine->pens[pal_lookup[((p1>>15)&0x1) | ((p2>>14)&0x2) | ((p3>>13)&0x4) | ((p4>>12)&0x8)]];
190		#endif
191		} else if (resolution==1) {
192		bm[31]=Machine->pens[pal_lookup[((p3>> 0)&0x1) | ((p4<< 1)&0x2)]];
193		bm[30]=Machine->pens[pal_lookup[((p3>> 1)&0x1) | ((p4>> 0)&0x2)]];
194		bm[29]=Machine->pens[pal_lookup[((p3>> 2)&0x1) | ((p4>> 1)&0x2)]];
195		bm[28]=Machine->pens[pal_lookup[((p3>> 3)&0x1) | ((p4>> 2)&0x2)]];
196		bm[27]=Machine->pens[pal_lookup[((p3>> 4)&0x1) | ((p4>> 3)&0x2)]];
197		bm[26]=Machine->pens[pal_lookup[((p3>> 5)&0x1) | ((p4>> 4)&0x2)]];
198		bm[25]=Machine->pens[pal_lookup[((p3>> 6)&0x1) | ((p4>> 5)&0x2)]];
199		bm[24]=Machine->pens[pal_lookup[((p3>> 7)&0x1) | ((p4>> 6)&0x2)]];
200		bm[23]=Machine->pens[pal_lookup[((p3>> 8)&0x1) | ((p4>> 7)&0x2)]];
201		bm[22]=Machine->pens[pal_lookup[((p3>> 9)&0x1) | ((p4>> 8)&0x2)]];
202		bm[21]=Machine->pens[pal_lookup[((p3>>10)&0x1) | ((p4>> 9)&0x2)]];
203		bm[20]=Machine->pens[pal_lookup[((p3>>11)&0x1) | ((p4>>10)&0x2)]];
204		bm[19]=Machine->pens[pal_lookup[((p3>>12)&0x1) | ((p4>>11)&0x2)]];
205		bm[18]=Machine->pens[pal_lookup[((p3>>13)&0x1) | ((p4>>12)&0x2)]];
206		bm[17]=Machine->pens[pal_lookup[((p3>>14)&0x1) | ((p4>>13)&0x2)]];
207		bm[16]=Machine->pens[pal_lookup[((p3>>15)&0x1) | ((p4>>14)&0x2)]];
208
209		bm[15]=Machine->pens[pal_lookup[((p1>> 0)&0x1) | ((p2<< 1)&0x2)]];
210		bm[14]=Machine->pens[pal_lookup[((p1>> 1)&0x1) | ((p2>> 0)&0x2)]];
211		bm[13]=Machine->pens[pal_lookup[((p1>> 2)&0x1) | ((p2>> 1)&0x2)]];
212		bm[12]=Machine->pens[pal_lookup[((p1>> 3)&0x1) | ((p2>> 2)&0x2)]];
213		bm[11]=Machine->pens[pal_lookup[((p1>> 4)&0x1) | ((p2>> 3)&0x2)]];
214		bm[10]=Machine->pens[pal_lookup[((p1>> 5)&0x1) | ((p2>> 4)&0x2)]];
215		bm[ 9]=Machine->pens[pal_lookup[((p1>> 6)&0x1) | ((p2>> 5)&0x2)]];
216		bm[ 8]=Machine->pens[pal_lookup[((p1>> 7)&0x1) | ((p2>> 6)&0x2)]];
217		bm[ 7]=Machine->pens[pal_lookup[((p1>> 8)&0x1) | ((p2>> 7)&0x2)]];
218		bm[ 6]=Machine->pens[pal_lookup[((p1>> 9)&0x1) | ((p2>> 8)&0x2)]];
219		bm[ 5]=Machine->pens[pal_lookup[((p1>>10)&0x1) | ((p2>> 9)&0x2)]];
220		bm[ 4]=Machine->pens[pal_lookup[((p1>>11)&0x1) | ((p2>>10)&0x2)]];
221		bm[ 3]=Machine->pens[pal_lookup[((p1>>12)&0x1) | ((p2>>11)&0x2)]];
222		bm[ 2]=Machine->pens[pal_lookup[((p1>>13)&0x1) | ((p2>>12)&0x2)]];
223		bm[ 1]=Machine->pens[pal_lookup[((p1>>14)&0x1) | ((p2>>13)&0x2)]];
224		bm[ 0]=Machine->pens[pal_lookup[((p1>>15)&0x1) | ((p2>>14)&0x2)]];
225
226		}
227
228		d+=8;
229		bm+=32;
230		//      bm+=16;
231		}
232
233		current_pixel=end;
234
235		//   if (resolution==0) {
236		//      bm = Machine->scrbitmap->line[line+1];
237		//      bn = Machine->scrbitmap->line[line];
238		//      for (x=0; x<640; x++)
239		//         bm[x]=bn[x];
240		//   }
241
242		}
243
244		/* This handles any 'mid-line' graphics changes (start position, palette, etc) */
245		void atarist_pixel_update(void)
246		{
247		int c=512-cpu_geticount(); /* 512 cycles per line */
248
249		/* Are in left border? If so we don't need to update this line */
250		if (c<96) return;
251
252		/* Are we in right border?  If so, we can draw entire line */
253		//   if (c>415) {
254		atarist_drawline(current_line,96/*current_pixel*/,(320+96)*2);
255		//      return;
256		//   }
257
258		//   /* Else midline update */
259		//   if ( c > current_pixel + 8) {
260		//      atarist_drawline(current_line,current_pixel,c);
261		//   return;
262		//   }
263		}
264
265		static VIDEO_UPDATE( atarist )
266		{
267		return 0;
268		}
269
270		/***************************************************************************/
271
272		static READ16_HANDLER( atarist_psg_r )
273		{
274		return AY8910_read_port_0_r(0)<<8;
275		}
276
277		static WRITE16_HANDLER( atarist_psg_w )
278		{
279		offset&=3; /* Mirror addresses */
280		if (offset)
281		AY8910_write_port_0_w(0,(data>>8)&0xff);
282		else
283		AY8910_control_port_0_w(0,(data>>8)&0xff);
284		}
285
286		/***************************************************************************/
287
288		static int precounter[]={0,4,10,16,50,64,100,200};
289		enum MODES { NONE=0, DELAY, EVENT, WIDTH };
290
291		static void atarist_mfp_interrupt(int level)
292		{
293		/* The highest level should take priority over lower levels, but does
294		it really matter?  There will be very few interrupt conflicts anyway */
295		cpunum_set_input_line_vector(0, 6, 0x40 + level);
296		cpunum_set_input_line(0, 6, ASSERT_LINE);
297		}
298
299		static void timer_a_callback(int param)
300		{
301		if (mfp.iea&0x20) { /* Interrupt enabled */
302		mfp.ipa=mfp.ipa|0x20; /* Set pending interrupt bit */
303		logerror("Timer A IRQ fired! (line %d)\n",current_line);
304		if (mfp.ima&0x20)
305		atarist_mfp_interrupt(13);
306		}
307		}
308
309		static void timer_b_callback(int param)
310		{
311		if (mfp.iea&0x01) { /* Interrupt enabled */
312		mfp.ipa=mfp.ipa|0x01; /* Set pending interrupt bit */
313		//      logerror("Timer B IRQ fired! (line %d)\n",current_line);
314		if (mfp.ima&0x01)
315		atarist_mfp_interrupt(8);
316		}
317		}
318
319		static void timer_c_callback(int param)
320		{
321		if (mfp.ieb&0x20) { /* Interrupt enabled */
322		mfp.ipb=mfp.ipb|0x20; /* Set pending interrupt bit */
323		if (mfp.imb&0x20)
324		atarist_mfp_interrupt(5);
325		}
326		}
327
328		static void timer_d_callback(int param)
329		{
330		if (mfp.ieb&0x10) { /* Interrupt enabled */
331		mfp.ipb=mfp.ipb|0x10; /* Set pending interrupt bit */
332		logerror("Timer D IRQ fired!\n");
333		if (mfp.imb&0x10)
334		atarist_mfp_interrupt(4);
335		}
336		}
337
338
339		/* MFP Master Clock is 2,457,600 cycles/second */
340		static READ16_HANDLER( atarist_mfp_r )
341		{
342		switch (offset) {
343		case 0x00: /* General purpose IO */
344		//      logerror("%06x: MFP 00 read\n", activecpu_get_pc());
345		return 0x80 | mfp.genr | wd1772_active; //wd1772_active=0x20 for BUSY
346		case 0x02: /* Active Edge Register */
347		//      logerror("%06x: MFP 02 read\n", activecpu_get_pc());
348		return mfp.aer;
349		case 0x04: /* Data direction */
350		//      logerror("%06x: MFP 04 read\n", activecpu_get_pc());
351		return mfp.ddr;
352
353
354		case 0x06: /* Interrupt enable A */
355		return mfp.iea;
356		case 0x0a: /* Interrupt Pending A */
357		//      logerror("%06x: MFP 0xa read (Timer A poll)\n", activecpu_get_pc());
358		return mfp.ipa;
359		case 0x0e: /* Interrupt In Service A */
360		return mfp.isa;
361		case 0x12: /* Interrupt Mask A */
362		return mfp.ima;
363
364		case 0x08: /* Interrupt enable B */
365		return mfp.ieb;
366		case 0x0c: /* Interrupt Pending B */
367		//      logerror("%06x: MFP 0xC read (Timer B poll)\n", activecpu_get_pc());
368		return mfp.ipb;
369		case 0x10: /* Interrupt In Service B */
370		return mfp.isb;
371		case 0x14: /* Interrupt Mask B */
372		return mfp.imb;
373
374		case 0x16: /* Vector register */
375		return mfp.vr;
376
377		case 0x18: /* Timer A control */
378		return mfp.tacr;
379		case 0x1a: /* Timer B control */
380		return mfp.tbcr;
381		case 0x1c: /* Timer C & D control */
382		return mfp.tcdcr;
383
384		case 0x1e: /* Timer A data register (TADR) */
385		if (mfp.taty==DELAY) {
386		logerror("Timer A unsupported delay mode read - (%02x)\n",mfp.tadr);
387		return 1;
388		}
389		return mfp.tadr&0xff;
390		case 0x20: /* Timer B data register (TBDR) */
391		if (mfp.tbty==DELAY) {
392		logerror("Timer B unsupported delay mode read - (%02x)\n",mfp.tbdr);
393		return 1;
394		}
395		return mfp.tbdr&0xff;
396		case 0x22: /* Timer C data register (TCDR) */
397		//if delay timer - update DR on the fly here
398
399		if (mfp.timer_c)
400		logerror("Timer C read - unsupported, timer c cycles is %d, reload is %02x, cyc values is %d, data value is %04x\n",mfp.timer_c_cycles,mfp.tcrl,TIME_IN_CYCLES(mame_timer_timeelapsed(mfp.timer_c),0),(TIME_IN_CYCLES(mame_timer_timeelapsed(mfp.timer_c),0)/mfp.timer_c_cycles/mfp.tcrl));
401
402
403		//logerror("Timer C read, value is %02x\n",mfp.tcdr-((TIME_IN_CYCLES(MASTER_CLOCK/MK68901_CLOCK,0)-TIME_IN_CYCLES(timer_timeleft,0)/precounter[(mfp.tcdr>>4)&7]));
404		if (mfp.timer_c && mfp.timer_c_cycles && mfp.tcrl)
405		return (TIME_IN_CYCLES(timer_timeleft(mfp.timer_c),0)/(mfp.timer_c_cycles/mfp.tcrl));   //(mfp.tcdr&0xff)-((TIME_IN_CYCLES(MASTER_CLOCK/MK68901_CLOCK,0)-  TIME_IN_CYCLES(timer_timeleft,0)/precounter[(mfp.tcdr>>4)&7]);
406		return mfp.tcdr&0xff;
407		case 0x24: /* Timer D data register (TDDR) */
408		logerror("Timer D read - unsupported\n");
409		return mfp.tddr&0xff;
410		}
411
412		logerror("%06x:  Unmapped mfp read %02x\n",activecpu_get_pc(),offset);
413
414		return 0;
415		}
416
417		static WRITE16_HANDLER( atarist_mfp_w )
418		{
419		switch (offset) {
420
421		case 0x02: /* Active edge register */
422		mfp.aer=data&0xff;
423		return;
424		case 0x04: /* Data direction register */
425		mfp.ddr=data&0xff;
426		return;
427
428		case 0x06: /* Interrupt Enable A */
429		mfp.iea=data&0xff;
430		return;
431		case 0x0a: /* Interrupt Pending A */
432		mfp.ipa=data&0xff;
433		return;
434		case 0x0e: /* Interrupt In Service A */
435		mfp.isa=data&0xff;
436		return;
437		case 0x12: /* Interrupt Mask A */
438		mfp.ima=data&0xff;
439		return;
440
441		case 0x08: /* Interrupt Enable B */
442		mfp.ieb=data&0xff;
443		return;
444		case 0x0c: /* Interrupt Pending B */
445		mfp.ipb=data&0xff;
446		return;
447		case 0x10: /* Interrupt In Service B */
448		mfp.isb=data&0xff;
449		return;
450		case 0x14: /* Interrupt Mask B */
451		mfp.imb=data&0xff;
452		return;
453
454		case 0x16: /* Vector register */
455		mfp.vr=data&0xff;
456		return;
457
458		case 0x18: /* Timer A control register (TACR) */
459		if (data!=mfp.tacr) { /* Timer A changed state - stop it */
460		if (mfp.timer_a) logerror("Timer A stopped\n");
461		if (mfp.timer_a) timer_remove(mfp.timer_a);
462		mfp.timer_a=NULL;
463		mfp.taty=NONE;
464		}
465		if ((data&0x7)!=0 && mfp.timer_a==NULL) { /* Timer A started, from stopped state */
466		logerror("Timer A pulse enabled - reload %04x, divider is %d, set to fire every %d cycles\n",mfp.tarl,precounter[data&7],(MASTER_CLOCK/MK68901_CLOCK)*mfp.tarl*precounter[data&7]);
467		if (((MASTER_CLOCK/MK68901_CLOCK)*mfp.tarl*precounter[data&7])>511) /* Don't bother with small timers - too slow */
468		mfp.timer_a=mame_timer_pulse(TIME_IN_CYCLES((MASTER_CLOCK/MK68901_CLOCK)*mfp.tarl*precounter[data&7],0), 0, timer_a_callback);
469		else logerror("Pulse period too high - timer not set\n");
470
471		mfp.taty=DELAY;
472		}
473		if ((data&0x8)!=0 && mfp.timer_a==NULL) { /* Timer A started, from stopped state */
474		logerror("Timer A event count enabled\n");
475		mfp.taty=EVENT;
476		}
477
478		/* Not implemented : Pulse-width timer (nothing uses it anyway) */
479		if ((data&0xf)>0x8) {
480		logerror("Timer A set to pulse width mode...\n");
481		}
482
483		mfp.tacr=data&0xff;
484		return;
485
486		case 0x1a: /* Timer B control register (TBCR) */
487		if (data!=mfp.tbcr) { /* Timer B changed state - stop it */
488		if (mfp.timer_b) logerror("Timer B stopped\n");
489		if (mfp.timer_b) timer_remove(mfp.timer_b);
490		mfp.timer_b=NULL;
491		mfp.tbty=NONE;
492		}
493		if ((data&0x7)!=0 && mfp.timer_b==NULL) { /* Timer B started, from stopped state */
494		logerror("Timer B pulse enabled - reload %04x, divider is %d, set to fire every %d cycles\n",mfp.tbrl,precounter[data&7],(MASTER_CLOCK/MK68901_CLOCK)*mfp.tbrl*precounter[data&7]);
495		if (((MASTER_CLOCK/MK68901_CLOCK)*mfp.tbrl*precounter[data&7])>511) /* Dont fire less than this */
496		mfp.timer_b=mame_timer_pulse(TIME_IN_CYCLES((MASTER_CLOCK/MK68901_CLOCK)*mfp.tbrl*precounter[data&7],0), 0, timer_b_callback);
497		else logerror("Pulse period too high - timer not set\n");
498
499		mfp.tbty=DELAY;
500		}
501		if ((data&0x8)!=0 && mfp.timer_b==NULL) { /* Timer B started, from stopped state */
502		//         logerror("Timer B event count enabled (%06x), dt is %02x (line %d)\n",activecpu_get_pc(),mfp.tbrl,current_line);
503		mfp.tbty=EVENT;
504		}
505
506		/* Not implemented : Pulse-width timer (nothing uses it anyway) */
507		if ((data&0xf)>0x8) {
508		logerror("Timer B set to pulse width mode...\n");
509		}
510
511		mfp.tbcr=data&0xff;
512		return;
513
514		case 0x1c: /* Timer C & D control register (TCDCR) */
515		if (((data&0x70)>>4)!=((mfp.tcdcr&0x70)>>4)) { /* Timer C changed state - stop it */
516		if (mfp.timer_c) logerror("Timer C stopped\n");
517		if (mfp.timer_c) timer_remove(mfp.timer_c);
518		mfp.timer_c=NULL;
519		}
520		if (((data&0x70)>>4)!=0 && mfp.timer_c==NULL) { /* Timer C started, from stopped state */
521		mfp.timer_c_cycles=(MASTER_CLOCK/MK68901_CLOCK)*mfp.tcrl*precounter[(data>>4)&7];
522		mfp.timer_c=mame_timer_pulse(TIME_IN_CYCLES(mfp.timer_c_cycles, 0), 0, timer_c_callback);
523		logerror("Timer C pulse enabled - reload %04x, divider is %d, set to fire every %d cycles\n",mfp.tcrl,precounter[(data>>4)&7],mfp.timer_c_cycles);
524		}
525
526		if ((data&0x7)!=(mfp.tcdcr&0x7)) { /* Timer D changed state - stop it */
527		if (mfp.timer_d) logerror("Timer D stopped\n");
528		if (mfp.timer_d) timer_remove(mfp.timer_d);
529		mfp.timer_d=NULL;
530		}
531		if ((data&0x7)!=0 && mfp.timer_d==NULL) { /* Timer D started, from stopped state */
532		logerror("Timer D pulse enabled - reload %04x, divider is %d, set to fire every %d cycles\n",mfp.tdrl,precounter[data&7],(MASTER_CLOCK/MK68901_CLOCK)*mfp.tdrl*precounter[data&7]);
533		if (((MASTER_CLOCK/MK68901_CLOCK)*mfp.tdrl*precounter[data&7])>511) /* Dont fire less than this */
534		mfp.timer_d=mame_timer_pulse(TIME_IN_CYCLES((MASTER_CLOCK/MK68901_CLOCK)*mfp.tdrl*precounter[data&7],0), 0, timer_d_callback);
535		else logerror("Pulse period too high - timer not set\n");
536		}
537
538		mfp.tcdcr=data&0xff;
539		return;
540
541		case 0x1e: /* Timer A data register (TADR) */
542		data&=0xff;
543		if (!data) data=256;
544		mfp.tadr=mfp.tarl=data;
545		return;
546		case 0x20: /* Timer B data register (TBDR) */
547		data&=0xff;
548		if (!data) data=256;
549		mfp.tbdr=mfp.tbrl=data;
550		return;
551		case 0x22: /* Timer C data register (TCDR) */
552		data&=0xff;
553		if (!data) data=256;
554		mfp.tcdr=mfp.tcrl=data;
555		return;
556		case 0x24: /* Timer D data register (TDDR) */
557		data&=0xff;
558		if (!data) data=256;
559		mfp.tddr=mfp.tdrl=data;
560		return;
561		}
562
563		logerror("%06x:  Unmapped mfp write %02x %04x\n",activecpu_get_pc(),offset,data);
564		}
565
566		/************************************************************************************/
567
568		int acia_joystick_event_mode,acia_mouse_event_mode;
569
570		static void ikbd_reset(void)
571		{
572		acia_bufpos=acia_buffer[0]=acia_bufptr=0;
573		acia_joystick_event_mode=1;
574		acia_mouse_event_mode=1; /* Event reporting mode is default */
575		}
576
577		static void atarist_fake_ikbd_w(int data)
578		{
579		static int input_buffer[32],bufpos=0,needed=0,current_command=0,last_mouse_fire=0;
580		static int mouse_position[2],mouse_max[2];
581		static int last_frame[2];
582		int mouse_fire,mouse_return=0;
583		int new_frame[2];
584
585		new_frame[0]=readinputport(1);
586		new_frame[1]=readinputport(2);
587
588		acia_status=0xe;
589
590		/* Multi-byte commands */
591		if (needed) {
592		input_buffer[(bufpos++)&0x1f]=data;
593		needed--;
594		if (needed==0) { /* Process command if all bytes received */
595		bufpos=0;
596		switch (current_command) {
597		case 0x07: /* Set mouse button mode */
598		logerror("IKBD: Mouse keycode button mode (%d) (default)\n",input_buffer[0]);
599		break;
600		case 0x09: /* Set mouse max */
601		mouse_max[0]=(input_buffer[0]<<8)|input_buffer[1];
602		mouse_max[1]=(input_buffer[2]<<8)|input_buffer[3];
603		logerror("IKBD: Mouse maximum set to %d %d\n",mouse_max[0],mouse_max[1]);
604		break;
605		case 0x0a: /* Set mouse keycode mode */
606		logerror("IKBD: Mouse keycode mode set (%d %d) (unimplemented)\n",input_buffer[0],input_buffer[1]);
607		break;
608		case 0x0b: /* Set mouse threshold */
609		logerror("IKBD: Mouse threshold set to %d %d (unimplemented)\n",input_buffer[0],input_buffer[1]);
610		break;
611		case 0x0e: /* Set mouse position */
612		mouse_position[0]=(input_buffer[1]<<8)|input_buffer[2];
613		mouse_position[1]=(input_buffer[3]<<8)|input_buffer[4];
614		logerror("IKBD: Mouse position set to %d %d\n",mouse_position[0],mouse_position[1]);
615		break;
616		case 0x80:
617		logerror("IKBD: Reset\n");
618		ikbd_reset();
619		break;
620		default:
621		logerror("IKBD: Unknown multi-byte command %02x\n",current_command);
622		}
623		}
624		return;
625		}
626
627		/* Single byte commands, and header bytes */
628		switch (data) {
629		case 0x07: /* Set mouse button mode - requires 1 byte */
630		current_command=data;
631		needed=1;
632		break;
633		case 0x08: /* Set mouse relative position reporting */
634		acia_mouse_event_mode=1;
635		break;
636		case 0x09: /* Set mouse absolute position - requires 4 bytes */
637		current_command=data;
638		acia_mouse_event_mode=0;
639		needed=4;
640		break;
641		case 0x0a: /* Set mouse keycode mode - requires 2 bytes */
642		current_command=data;
643		needed=2;
644		break;
645		case 0x0b: /* Set mouse threshold - requires 2 bytes */
646		current_command=data;
647		needed=2;
648		break;
649		case 0x0d: /* Interrogate mouse position - returns 5 bytes */
650		acia_buffer[(acia_bufpos++)&0x3f]=0xf7;
651		mouse_fire=readinputport(3);
652		if ((mouse_fire&1) && !(last_mouse_fire&1)) mouse_return|=1;
653		if (!(mouse_fire&1) && (last_mouse_fire&1)) mouse_return|=2;
654		if ((mouse_fire&2) && !(last_mouse_fire&2)) mouse_return|=4;
655		if (!(mouse_fire&2) && (last_mouse_fire&2)) mouse_return|=8;
656		mouse_position[0]+=new_frame[0]-last_frame[0];
657		mouse_position[1]+=new_frame[1]-last_frame[1];
658		if (mouse_position[0]<0) mouse_position[0]=0;
659		if (mouse_position[1]<0) mouse_position[1]=0;
660		if (mouse_position[0]>mouse_max[0]) mouse_position[0]=mouse_max[0];
661		if (mouse_position[1]>mouse_max[1]) mouse_position[1]=mouse_max[1];
662		acia_buffer[(acia_bufpos++)&0x3f]=mouse_return;
663		acia_buffer[(acia_bufpos++)&0x3f]=mouse_position[0]>>8;
664		acia_buffer[(acia_bufpos++)&0x3f]=mouse_position[0]&0xff;
665		acia_buffer[(acia_bufpos++)&0x3f]=mouse_position[1]>>8;
666		acia_buffer[(acia_bufpos++)&0x3f]=mouse_position[1]&0xff;
667		last_mouse_fire=mouse_fire;
668		acia_bufptr+=6;
669		break;
670		case 0x0e: /* Load mouse position - requires 5 bytes */
671		current_command=data;
672		needed=5;
673		break;
674		case 0x0f:
675		logerror("IKBD: Mouse set y = 0 as bottom (unsupported)\n");
676		break;
677		case 0x10:
678		logerror("IKBD: Mouse set y = 0 as top (default)\n");
679		break;
680		case 0x11:
681		logerror("IKBD: Resume (unsupported)\n");
682		break;
683		case 0x12:
684		logerror("IKBD: Mouse disabled (unsupported)\n");
685		break;
686		case 0x13:
687		logerror("IKBD: Output paused (unsupported)\n");
688		break;
689		case 0x14:
690		acia_joystick_event_mode=1;
691		logerror("IKBD: Joystick event mode enabled\n");
692		break;
693		case 0x15:
694		acia_joystick_event_mode=0;
695		logerror("IKBD: Joystick interrogation mode enabled\n");
696		break;
697		case 0x16: /* Joystick interrogation */
698		acia_buffer[(acia_bufpos++)&0x3f]=0xfd;
699		acia_buffer[(acia_bufpos++)&0x3f]=(readinputport(4)>>7) | (readinputport(5)>>6);
700		acia_buffer[(acia_bufpos++)&0x3f]=(readinputport(4)&0xf) | ((readinputport(5)<<4)&0xf0);
701		acia_bufptr+=3;
702		break;
703		case 0x80: /* Reset */
704		current_command=data;
705		needed=1;
706		break;
707		default:
708		logerror("IKBD: Unknown command %02x\n",data);
709		}
710
711		last_frame[0]=new_frame[0];
712		last_frame[1]=new_frame[1];
713		}
714
715		static READ16_HANDLER( atarist_acia_r )
716		{
717		int a;
718
719		//   logerror("%06x: ikbd read %02x\n", activecpu_get_pc(),offset);
720
721		switch (offset) {
722		case 0: return (acia_status)<<8;
723		case 2: /* ACIA data */
724		if (acia_bufptr==0) return acia_buffer[(acia_bufpos-1)&0x3f]<<8;
725		a=acia_buffer[(acia_bufpos-acia_bufptr)&0x3f];
726		acia_bufptr-=1;
727		acia_bufpos&=0xff;
728		//      if (acia_bufptr<0) acia_bufptr=0;
729		if (acia_bufptr==0) { acia_status=0xe; mfp.genr=0x10; }
730		return a<<8;
731		case 4: return (0xe)<<8;
732		case 6: return 0;
733
734		}
735		return 0;
736		}
737
738		static WRITE16_HANDLER( atarist_acia_w )
739		{
740		logerror("%06x: ikbd write %02x %04x\n", activecpu_get_pc(),offset,data);
741
742		if (offset==2) atarist_fake_ikbd_w((data>>8)&0xff);
743		}
744
745		static void atarist_keyboard_update(void)
746		{
747		static int last_frame[16];
748		int new_frame[16],diff[16],key_ptr=1,i,j;
749
750		atarist_options=readinputport(0);
751		for (i=1; i<14; i++) {
752		new_frame[i]=readinputport(i);
753		if (new_frame[i]!=last_frame[i])
754		diff[i]=1; else diff[i]=0;
755		}
756
757		/* Port 0 : Mouse or joystick */
758		if (atarist_options&0x10) {
759		if (acia_joystick_event_mode && diff[5]) {
760		acia_buffer[(acia_bufpos++)&0x3f]=0xfe;
761		acia_buffer[(acia_bufpos++)&0x3f]=new_frame[5];
762		acia_bufptr+=2;
763		}
764		} else { /* Return values only if event mode is turned on */
765		if (acia_mouse_event_mode && (diff[1] || diff[2] || diff[3])) {
766		acia_buffer[(acia_bufpos++)&0x3f]=0xf8 | new_frame[3];
767		acia_buffer[(acia_bufpos++)&0x3f]=(new_frame[1]-last_frame[1])&0xff;
768		acia_buffer[(acia_bufpos++)&0x3f]=(new_frame[2]-last_frame[2])&0xff;
769		acia_bufptr+=3;
770		}
771		}
772
773		/* Port 1 : Joystick only */
774		if (acia_joystick_event_mode && diff[4] && atarist_options&0x20) {
775		acia_buffer[(acia_bufpos++)&0x3f]=0xff;
776		acia_buffer[(acia_bufpos++)&0x3f]=new_frame[4];
777		acia_bufptr+=2;
778		}
779
780		/* Keyboard inputs */
781		for (j=6; j<14; j++) { /* Walk over the input structs */
782		for (i=0; i<16; i++) { /* Loop over 16 bit inputs */
783		int a=(new_frame[j]>>i)&1;
784		int b=(last_frame[j]>>i)&1;
785
786		if (a==1 && b==0) { /* Key pressed */
787		acia_buffer[(acia_bufpos++)&0x3f]=key_ptr;
788		acia_bufptr++;
789		}
790		if (a==0 && b==1) { /* Key released */
791		acia_buffer[(acia_bufpos++)&0x3f]=key_ptr | 0x80;
792		acia_bufptr++;
793		}
794
795		key_ptr++; /* Step through scancodes */
796		}
797		}
798
799		/* Check for any new ikbd activity this frame */
800		if (acia_bufptr) {
801		acia_status|=0x81;
802		mfp.genr=0x00;
803		if (mfp.ieb&0x40) { /* Channel enabled */
804		mfp.ipb|=0x40; /* Set pending interrupt bit */
805		if (mfp.imb&0x40) /* Interrupt enabled */
806		atarist_mfp_interrupt(6);
807		}
808		}
809
810		for (i=1; i<14; i++)
811		last_frame[i]=new_frame[i];
812		}
813
814		/************************************************************************************/
815
816		/*void dma_transfer(unsigned char *mem, int length); */
817
818		struct FDC {
819		UINT8 dma_status;
820		UINT8 reg_select;
821		UINT8 dma_sector_count;
822		UINT8 dma_select;
823		UINT8 dma_direction;
824		int dma_base;
825		int dma_bytes_remaining;
	41	int dma_status;
	42	int reg;
	43	int dma_sector_count;
	44	int dma_select;
	45	int dma_direction;
	46	UINT32 dma_base;
	47	int dma_bytes;
	48	int dma_int;
	49	int active;
826	50	} fdc;
827	51
828		void atarist_dma_transfer(void)
	52	static void atarist_dma_transfer(void)
829	53	{
830		unsigned char *addr;
	54	UINT8 *RAM = memory_region(REGION_CPU1) + fdc.dma_base;
831	55
832		addr = memory_region(REGION_CPU1) + fdc.dma_base;
833
834	56	if (fdc.dma_direction)
835	57	{
836		/* write the data */
837		wd17xx_data_w(0,addr[0]);
	58	wd17xx_data_w(0, RAM[0]);
838	59	}
839	60	else
840	61	{
841		/* read the data */
842		addr[0] = wd17xx_data_r(0);
843
	62	RAM[0] = wd17xx_data_r(0);
844	63	}
845	64
846	65	fdc.dma_base++;
847		fdc.dma_bytes_remaining--;
	66	fdc.dma_bytes--;
848	67
849		/* if no more bytes are remaining, set int */
850		if (fdc.dma_bytes_remaining<=0)
	68	if (fdc.dma_bytes == 0)
851	69	{
852		logerror("Done DMA to %06x at %06x (512*%d)\n",fdc.dma_base,activecpu_get_pc(),fdc.dma_sector_count);
853
854		mfp.ipb=mfp.ipb|0x80; /* Set pending interrupt bit */
855		if (mfp.ieb&0x80) /* Interrupt enabled */
856		atarist_mfp_interrupt(7);
	70	fdc.dma_int = ASSERT_LINE;
857	71	}
	72	else
	73	{
	74	fdc.dma_int = CLEAR_LINE;
	75	}
858	76	}
859	77
860
861		void atarist_fdc_callback(int event, void *param)
	78	static void atarist_fdc_callback(wd17xx_state_t event, void *param)
862	79	{
863	80	switch (event)
864	81	{
865		case WD17XX_IRQ_CLR:
866		case WD17XX_DRQ_CLR:
867		break;
868		case WD17XX_IRQ_SET:
869		logerror("WD1792:  Warning: IRQ set!\n");
870		break;
871		case WD17XX_DRQ_SET:
872		if (fdc.dma_select==0) { /* If DMA is enabled */
873		atarist_dma_transfer();
874		}
875
876		break;
	82	case WD17XX_IRQ_CLR:
	83	case WD17XX_DRQ_CLR:
	84	break;
	85	case WD17XX_IRQ_SET:
	86	logerror("WD1792:  Warning: IRQ set!\n");
	87	break;
	88	case WD17XX_DRQ_SET:
	89	if (fdc.dma_select == 0)
	90	{
	91	atarist_dma_transfer();
	92	}
	93	break;
877	94	}
878	95	}
879	96
880	97	static READ16_HANDLER( atarist_fdc_r )
881	98	{
882		switch (offset) {
883		case 0: /* Reserved (unused) */
884		case 2:
885		break;
886		case 4: /* Data register */
887		wd1772_active=0;//todo?
888		switch (fdc.reg_select&0xf) {
889		/* A0/A1 pins on wd179x controller */
890		case 0: fdc.dma_status=1; return wd17xx_status_r(0);
891		case 1: fdc.dma_status=1; return wd17xx_track_r(0);
892		case 2: fdc.dma_status=1; return wd17xx_sector_r(0);
893		case 3: fdc.dma_status=1; return wd17xx_data_r(0);
	99	switch (offset)
	100	{
	101	case 0: // reserved
	102	case 2: // reserved
	103	break;
894	104
895		/* HDC register select - Unimplemented */
896		case 4: case 5: case 6: case 7:
897		fdc.dma_status=0; /* Force DMA error on hard-disk accesses */
898		break;
	105	case 4: // data register
	106	fdc.active = 0; //todo?
899	107
900		/* DMA sector count register */
901		default: /* cases 8-15 */
902		logerror("Sector count register read %02x\n",fdc.dma_sector_count);
903		fdc.dma_status=1;
904		return fdc.dma_sector_count;
905		}
	108	switch (fdc.reg & 0x0f)
	109	{
	110	// A0/A1 pins on wd179x controller
	111	case 0:
	112	fdc.dma_status = 1;
	113	return wd17xx_status_r(0);
	114	case 1:
	115	fdc.dma_status = 1;
	116	return wd17xx_track_r(0);
	117	case 2:
	118	fdc.dma_status = 1;
	119	return wd17xx_sector_r(0);
	120	case 3:
	121	fdc.dma_status = 1;
	122	return wd17xx_data_r(0);
	123
	124	// HDC register select - Unimplemented
	125	case 4:
	126	case 5:
	127	case 6:
	128	case 7:
	129	fdc.dma_status = 0; // Force DMA error on hard-disk accesses
906	130	break;
907		case 6: /* Status register */
908		//logerror("%06x:  DMA fdc read (%02x)\n",activecpu_get_pc(),0xfe | fdc.dma_status);
909		return 0xfe | fdc.dma_status;
	131
	132	// DMA sector count register
	133	default:
	134	fdc.dma_status = 1;
	135	return fdc.dma_sector_count;
	136	}
	137	break;
	138
	139	case 6: // Status register
	140	return 0xfe | fdc.dma_status;
910	141	}
911	142
912	143	return 0xff;
r791	r792
914	145
915	146	static WRITE16_HANDLER( atarist_fdc_w )
916	147	{
917		switch (offset) {
918		case 0: /* Unused */
919		case 2:
	148	switch (offset)
	149	{
	150	case 0: // Unused
	151	case 2:
	152	break;
	153	case 4: // Data register
	154	switch (fdc.reg & 0x0f)
	155	{
	156	// A0/A1 pins on wd179x controller
	157	case 0:
	158	wd17xx_command_w(0, data & 0xff);
920	159	break;
921		case 4: /* Data register */
922		switch (fdc.reg_select&0xf) {
923		/* A0/A1 pins on wd179x controller */
924		case 0: wd17xx_command_w(0, data&0xff); break;
925		case 1: wd17xx_track_w(0, data&0xff); break;
926		case 2: wd17xx_sector_w(0, data&0xff); break;
927		case 3: wd17xx_data_w(0, data&0xff); break;
928
929		/* HDC register select - Unimplemented */
930		case 4: case 5: case 6: case 7:
931		break;
932
933		/* DMA sector count register */
934		default: /* cases 8-15 */
935		if ((data&0xff)!=1) logerror("Sector count register write %02x\n",data);
936		fdc.dma_sector_count=data&0xff;
937		break;
938		}
	160	case 1:
	161	wd17xx_track_w(0, data & 0xff);
939	162	break;
940		case 6: /* Select/Status register */
941		fdc.reg_select=(data>>1)&0xf;
942		fdc.dma_select=data&0x40;
943		fdc.dma_direction=data&0x100;
	163	case 2:
	164	wd17xx_sector_w(0, data & 0xff);
944	165	break;
945		case 8:
946		fdc.dma_base=(fdc.dma_base&0x00ffff) | ((data&0xff)<<16);
947		/* KT - added */
948		fdc.dma_bytes_remaining = 512;
	166	case 3:
	167	wd17xx_data_w(0, data & 0xff);
949	168	break;
950		case 10:
951		fdc.dma_base=(fdc.dma_base&0xff00ff) | ((data&0xff)<<8);
952		/* KT - added */
953		fdc.dma_bytes_remaining = 512;
	169	// HDC register select - Unimplemented
	170	case 4:
	171	case 5:
	172	case 6:
	173	case 7:
954	174	break;
955		case 12:
956		fdc.dma_base=(fdc.dma_base&0xffff00) | (data&0xff);
957
958		/* KT - added */
959		fdc.dma_bytes_remaining = 512;
	175	// DMA sector count register
	176	default:
	177	fdc.dma_sector_count = data & 0xff;
960	178	break;
	179	}
	180	break;
	181	case 6: // Select/Status register
	182	fdc.reg = (data >> 1) & 0x0f;
	183	fdc.dma_select = data & 0x40;
	184	fdc.dma_direction = data & 0x100;
	185	break;
	186	case 8:
	187	fdc.dma_base = (fdc.dma_base & 0x00ffff) | ((data & 0xff) << 16);
	188	fdc.dma_bytes = 512;
	189	break;
	190	case 10:
	191	fdc.dma_base = (fdc.dma_base & 0xff00ff) | ((data & 0xff) << 8);
	192	fdc.dma_bytes = 512;
	193	break;
	194	case 12:
	195	fdc.dma_base = (fdc.dma_base & 0xffff00) | (data & 0xff);
	196	fdc.dma_bytes = 512;
	197	break;
961	198	}
962	199	}
963	200
964		/************************************************************************************/
	201	/* SHIFTER */
965	202
966		/* Communication registers with the 68000 code */
967		#define   HDC_COMMAND      0
968		#define   HDC_TRAP      2
969		#define   HDC_RETURN      4
970		#define HDC_STATUS      8
971		#define   HDC_PARAM0      10
972		#define   HDC_PARAM1      12
973		#define   HDC_PARAM2      14
974		#define   HDC_PARAM3      16
975		#define   HDC_PARAM4      18
976		#define   HDC_PARAM5      20
977		#define   HDC_PARAM6      22
978	203
979		/* commented out because I commented some other hdc code */
980		#if 0
981		/* Grabs the string pointed in ST memory by the parameter registers */
982		static char *get_hdc_string(int param)
983		{
984		static char filebuf[256];
985		unsigned char *ram_ptr=atarist_ram;
986		int i,addr;
	204	/* MMU */
987	205
988		addr=((READ_WORD(&atarist_fakehdc_ram[param])<<16)|READ_WORD(&atarist_fakehdc_ram[param+2]))&0xfffffe;
989		if (addr>=0xfc0000) { ram_ptr=memory_region(REGION_USER1); addr-=0xfc0000; }
	206	static int mmu;
990	207
991		/* Check for odd source addresses */
992		if (READ_WORD(&atarist_fakehdc_ram[param+2])&1) {
993		filebuf[0]=READ_WORD(&ram_ptr[addr&0x3fffff])&0xff;
994		for (i=0; i<253; i+=2) {
995		filebuf[i+1]=READ_WORD(&ram_ptr[(addr+i+2)&0x3fffff])>>8;
996		filebuf[i+2]=READ_WORD(&ram_ptr[(addr+i+2)&0x3fffff])&0xff;
997		if (!filebuf[i] || !filebuf[i+1])
998		break;
999		}
1000		} else {
1001		for (i=0; i<254; i+=2) {
1002		filebuf[i]=READ_WORD(&ram_ptr[(addr+i)&0x3fffff])>>8;
1003		filebuf[i+1]=READ_WORD(&ram_ptr[(addr+i)&0x3fffff])&0xff;
1004		if (!filebuf[i] || !filebuf[i+1])
1005		break;
1006		}
1007		}
1008
1009		return filebuf;
1010		}
1011		#endif
1012
1013		static READ16_HANDLER(atarist_fakehdc_r)
	208	static READ16_HANDLER( atarist_mmu_r )
1014	209	{
1015		return READ_WORD(&atarist_fakehdc_ram[offset]);
	210	return mmu;
1016	211	}
1017	212
1018		static WRITE16_HANDLER(atarist_fakehdc_w)
	213	static WRITE16_HANDLER( atarist_mmu_w )
1019	214	{
1020		// KT - commented this lot out because loads of osd functions could not be found
1021		#if 0
1022		static int dta_high,dta_low,ok_to_go=0;
1023		static char *str_ptr;
1024		static mame_file *file0;
1025
1026		COMBINE_WORD_MEM(&atarist_fakehdc_ram[offset],data);
1027		//   logerror("%06x: Write mish_fs (%d) %04x\n",activecpu_get_pc(),offset,data);
1028		if (offset==HDC_COMMAND) {
1029		switch (data&0xff) {
1030		case 3: /* Return BPB */
1031		memset(atarist_fakehdc_ram,0,512);
1032		WRITE_WORD(&atarist_fakehdc_ram[0x10c],0x0202);
1033		WRITE_WORD(&atarist_fakehdc_ram[0x10e],0x1000);
1034		WRITE_WORD(&atarist_fakehdc_ram[0x110],0x0270);
1035		WRITE_WORD(&atarist_fakehdc_ram[0x112],0x0068);
1036		WRITE_WORD(&atarist_fakehdc_ram[0x114],0x06f9);
1037		WRITE_WORD(&atarist_fakehdc_ram[0x116],0x0500);
1038		WRITE_WORD(&atarist_fakehdc_ram[0x118],0x0a00);
1039		WRITE_WORD(&atarist_fakehdc_ram[0x11a],0x0100);
1040		break;
1041		}
1042		}
1043
1044		if (offset==HDC_TRAP) {   /* A trap #1 function call, any unused commands default to TOS */
1045		WRITE_WORD(&atarist_fakehdc_ram[HDC_STATUS],0);
1046		switch (data&0xff) {
1047		case 0x0e: /* Set default drive, we want to hook all Drive C commands */
1048		atarist_current_drive=READ_WORD(&atarist_fakehdc_ram[HDC_PARAM0]);
1049		logerror("Default drive is %04x\n",atarist_current_drive);
1050		if (atarist_current_drive==0x0002)
1051		ok_to_go=1; /* Drive C selected - we are ok to process commands */
1052		else
1053		ok_to_go=0; /* Not Drive C - we want to ignore any commands until Drive C is selected again */
1054		break;
1055
1056		case 0x4e: /* SFirst - Find files from a given filemask */
1057		str_ptr=get_hdc_string(HDC_PARAM0);
1058		logerror("Filemask %s requested\n",str_ptr);
1059
1060		/* Always allow drive C queries */
1061		if ((str_ptr[0]=='C' || str_ptr[0]=='c')
1062		&& (str_ptr[1]==':' && str_ptr[2]=='\\')) {
1063		ok_to_go=1;
1064		str_ptr+=3;
1065		}
1066
1067		/* Strip leading slashes */
1068		if (str_ptr[0]=='\\' && ok_to_go) {
1069		str_ptr++;
1070		}
1071
1072		if (ok_to_go) {
1073		if (osd_findfirst(str_ptr,0)==0) {
1074		char *ptr=osd_getfindfilename();
1075		int s=osd_getfindsize();
1076		int d=osd_getfinddate();
1077		int t=osd_getfindtime();
1078		int a=osd_getfindattributes();
1079
1080		if (ptr) {
1081		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+30],((ptr[0]<<8)|ptr[1])); /* Filename */
1082		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+32],((ptr[2]<<8)|ptr[3])); /* Filename */
1083		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+34],((ptr[4]<<8)|ptr[5])); /* Filename */
1084		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+36],((ptr[6]<<8)|ptr[7])); /* Filename */
1085		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+38],((ptr[8]<<8)|ptr[9])); /* Filename */
1086		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+40],((ptr[10]<<8)|ptr[11])); /* Filename */
1087		}
1088		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+20],  a&0xff); /* Attributes */
1089		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+22],t&0xffff); /* Time */
1090		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+24],d&0xffff); /* Date */
1091		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+26],   s>>16); /* Filesize */
1092		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+28],s&0xffff); /* Filesize */
1093
1094		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0); /* F_SNEXT is ok to run */
1095		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],0);
1096
1097		logerror("Found mask %s ok. (cpu %06x)\n",str_ptr,activecpu_get_pc());
1098
1099		ok_to_go=1;
1100		return;
1101		}
1102		else {
1103		logerror("Found mask %s failed.\n",str_ptr);
1104		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0);
1105		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],1); /* Flag F_SNEXT to fail also */
1106		}
1107		}
1108		break;
1109
1110		case 0x4f: /* F_SNEXT - Find next file after a Ffirst */
1111		if (ok_to_go) {
1112		if (osd_findnext()==0) {
1113		char *ptr=osd_getfindfilename();
1114		int s=osd_getfindsize();
1115		int d=osd_getfinddate();
1116		int t=osd_getfindtime();
1117		int a=osd_getfindattributes();
1118
1119		if (ptr) {
1120		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+30],((ptr[0]<<8)|ptr[1])); /* Filename */
1121		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+32],((ptr[2]<<8)|ptr[3])); /* Filename */
1122		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+34],((ptr[4]<<8)|ptr[5])); /* Filename */
1123		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+36],((ptr[6]<<8)|ptr[7])); /* Filename */
1124		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+38],((ptr[8]<<8)|ptr[9])); /* Filename */
1125		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+40],((ptr[10]<<8)|ptr[11])); /* Filename */
1126		}
1127		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+20],  a&0xff); /* Attributes */
1128		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+22],t&0xffff); /* Time */
1129		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+24],d&0xffff); /* Date */
1130		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+26],   s>>16); /* Filesize */
1131		WRITE_WORD(&atarist_ram[(dta_low|(dta_high<<16))+28],s&0xffff); /* Filesize */
1132
1133		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0); /* F_SNEXT is ok to run */
1134		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],0);
1135		} else {
1136		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0);
1137		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],1);
1138		}
1139		return;
1140		}
1141		break;
1142
1143		case 0x1a: /* Set Disk transfer address */
1144		dta_high=READ_WORD(&atarist_fakehdc_ram[HDC_PARAM0]);
1145		dta_low =READ_WORD(&atarist_fakehdc_ram[HDC_PARAM1]);
1146		break;
1147
1148		case 0x36: /* Free disk space */
1149		logerror("Free disk space\n");
1150		break;
1151
1152		case 0x39: /* Create Directory */
1153		logerror("Create Directory\n");
1154		break;
1155
1156		case 0x3a: /* Delete Directory */
1157		logerror("Delete Directory\n");
1158		break;
1159
1160		case 0x3b: /* Set current directory */
1161		/* defined but not used */
1162		/*            str_ptr=get_hdc_string(HDC_PARAM0); */
1163		logerror("Change directory to %s requested\n",str_ptr);
1164		break;
1165
1166		case 0x3d: /* Open file */
1167		str_ptr=get_hdc_string(HDC_PARAM0);
1168		logerror("Asked to open %s (mode %04x)\n",str_ptr,READ_WORD(&atarist_fakehdc_ram[HDC_PARAM2]));
1169		if (ok_to_go) {
1170		file0=mame_fopen_native(str_ptr,0);
1171		if (file0) {
1172		logerror("Opened OK\n");
1173		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0);
1174		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],1); /* File handle 1 */
1175		}
1176		else {
1177		logerror("Opened failed\n");
1178		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0xffff); /* Error (Negative) */
1179		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],0xffff);
1180		}
1181		return;
1182		} else
1183		logerror("Open ignored - not meant for C drive\n");
1184		break;
1185
1186		case 0x3f: /* Read file */
1187		if (ok_to_go) {
1188		if (file0) {
1189		int bufsize=(READ_WORD(&atarist_fakehdc_ram[HDC_PARAM1])<<16)|READ_WORD(&atarist_fakehdc_ram[HDC_PARAM2]);
1190		unsigned char *buf=malloc(16384),*buf2;
1191		int count=0,i,len,addr,todo=bufsize;
1192
1193		if (!buf) logerror("Malloc for %d bytes failed!!!!\n",bufsize);
1194		if (!buf) break;
1195
1196		addr=((READ_WORD(&atarist_fakehdc_ram[HDC_PARAM3])<<16)|READ_WORD(&atarist_fakehdc_ram[HDC_PARAM4]))&0xffffff;
1197		buf2=atarist_ram+(addr&0x3fffff);
1198
1199		if (addr&1) logerror("WARNING - LOAD TO ODD ADDRESS!!!\n");
1200		if (bufsize&1) logerror("WARNING - LOAD WITH ODD SIZE!!!\n");
1201
1202		do {
1203		if (todo<16384)
1204		len=mame_fread(file0,buf,todo);
1205		else
1206		len=mame_fread(file0,buf,16384);
1207
1208		for (i=0; i<len; i+=2)
1209		WRITE_WORD(&buf2[i+count],(buf[i]<<8)|buf[i+1]);
1210		//TODO!! Odd address loading..
1211		count+=len;
1212
1213		} while (count<bufsize && len);
1214
1215		logerror("Read file (handle %04x) to addr %06x, size %d bytes, read %d ok\n",READ_WORD(&atarist_fakehdc_ram[HDC_PARAM0]),addr,bufsize,count);
1216
1217		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],count>>16); /* Number of bytes read */
1218		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],count&0xffff);
1219		free(buf);
1220		} else {
1221		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0xffff); /* Error (Negative) */
1222		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],0xffff);
1223		}
1224		return;
1225		}
1226		break;
1227
1228		case 0x3e: /* Close file */
1229		logerror("Close file (handle %04x)\n",READ_WORD(&atarist_fakehdc_ram[HDC_PARAM0]));
1230		if (ok_to_go) {
1231		if (file0) {
1232		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0);
1233		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],0);
1234		mame_fclose(file0);
1235		} else {
1236		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN],0xffff); /* Error (Negative) */
1237		WRITE_WORD(&atarist_fakehdc_ram[HDC_RETURN+2],0xffff);
1238		}
1239		return;
1240		}
1241		break;
1242
1243		case 0x40: /* Write file */
1244		logerror("Write file\n");
1245		break;
1246
1247		case 0x42: /* Seek file position */
1248		logerror("Seek file\n");
1249		break;
1250
1251		case 0x4b: /* Load/Execute a process */
1252		str_ptr=get_hdc_string(HDC_PARAM1);
1253		if (*str_ptr) {
1254		logerror("Asked to exec %s\n",str_ptr);
1255		if (ok_to_go) {
1256		logerror("Executing\n");
1257		/* Execute needs extra code on the 68000 side - signal it */
1258		WRITE_WORD(&atarist_fakehdc_ram[HDC_TRAP],0xffff);
1259		ok_to_go=0;
1260		if (file0) /* TODO */
1261		mame_fclose(file0);
1262		file0=mame_fopen_native(str_ptr,0);
1263		return;
1264		}
1265		}
1266		break;
1267
1268		case 0xff: /* Execute a process (part 2) */
1269		ok_to_go=1;
1270
1271		//check stack on $4b
1272
1273		if (file0) {
1274		unsigned char *buf=malloc(65536),*buf2;
1275		int count=0,i,len,addr;
1276
1277		addr=((READ_WORD(&atarist_fakehdc_ram[HDC_PARAM0])<<16)|READ_WORD(&atarist_fakehdc_ram[HDC_PARAM1]))&0xffffff;
1278		logerror("Exec address is %06x\n",addr);
1279
1280		/* Load the header */
1281		len=mame_fread(file0,buf,0x1c);
1282		buf2=atarist_ram+(addr&0x3fffff);
1283		for (i=0; i<len; i+=2)
1284		WRITE_WORD(&buf2[i+228],(buf[i]<<8)|buf[i+1]);
1285
1286		/* Load the main program */
1287		do {
1288		len=mame_fread(file0,buf,65536);
1289		for (i=0; i<len; i+=2)
1290		WRITE_WORD(&buf2[i+256+count],(buf[i]<<8)|buf[i+1]);
1291		count+=len;
1292		} while (len);
1293
1294		free(buf);
1295		}
1296		mame_fclose(file0);
1297
1298		return;
1299		}
1300
1301		/* If we didn't handle this Trap command, let TOS handle it by flagging the status */
1302		WRITE_WORD(&atarist_fakehdc_ram[HDC_STATUS],1);
1303		}
1304		#endif
	215	mmu = data & 0xff;
1305	216	}
1306	217
1307		/************************************************************************************/
	218	/* Memory Maps */
1308	219
1309		struct BLITTER {
1310		UINT8 hop;
1311		UINT8 op;
1312		UINT8 skew;
1313		UINT8 line;
1314		UINT8 nfsr, fxsr;
1315		} blitter;
	220	static UINT8 keylatch;
	221	static int joylatch;
1316	222
1317		#define BLITTER_DO_SOURCE \
1318		if (src_x_inc<0) { \
1319		source_buffer >>=16;\
1320		if (blitter.hop&2) { \
1321		/*if (source_addr&1)*/ /* Odd address */ \
1322		/*   source_buffer |= ( ( (unsigned int)( READ_WORD(&atarist_ram[source_addr-1]) << 24) )&0xff000000)| \
1323		( ( (unsigned int)( READ_WORD(&atarist_ram[source_addr+1]) <<  8) )&0x00ff0000); \
1324		else */   \
1325		source_buffer |= (unsigned int)( READ_WORD(&atarist_ram[source_addr]) << 16);          \
1326		} \
1327		} else {\
1328		source_buffer <<=16;\
1329		if (blitter.hop&2) { \
1330		/*   if (source_addr&1)*/ /* Odd address */ \
1331		/*      source_buffer |= (((unsigned int)( READ_WORD(&atarist_ram[source_addr-1]) <<  8))&0xff00)| \
1332		(((unsigned int)( READ_WORD(&atarist_ram[source_addr+1]) >>  8))&0x00ff); \
1333		else*/ \
1334		source_buffer |= READ_WORD(&atarist_ram[source_addr]);\
1335		} \
1336		}
1337
1338		#define BLITTER_DO_HOP \
1339		switch (blitter.hop) { \
1340		case 0: src_data=0xffff; break; \
1341		case 1: src_data=READ_WORD(&atarist_blitter_ram[halftone_offset]); break; \
1342		case 2: src_data=(source_buffer>>blitter.skew); break; \
1343		case 3: src_data=(source_buffer>>blitter.skew)&READ_WORD(&atarist_blitter_ram[halftone_offset]); break; \
1344		}
1345
1346		static void blitter_op(int op, int dest_addr, int src_data, int dst_data, int mask)
	223	static WRITE8_HANDLER( hd6301_port_1_w )
1347	224	{
1348		src_data&=0xffff;
1349		switch (op) {
1350		case 0:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((               0x0000)&mask)); break;
1351		case 1:  WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|(( src_data &  dst_data)&mask)); break;
1352		case 2:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|(( src_data & ~dst_data)&mask)); break;
1353		case 3:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|(( src_data            )&mask)); break;
1354		case 4:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((~src_data &  dst_data)&mask)); break;
1355		case 5:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((             dst_data)&mask)); break;
1356		case 6:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|(( src_data ^  dst_data)&mask)); break;
1357		case 7:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|(( src_data |  dst_data)&mask)); break;
1358		case 8:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((~src_data & ~dst_data)&mask)); break;
1359		case 9:    WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((~src_data ^  dst_data)&mask)); break;
1360		case 10: WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((            ~dst_data)&mask)); break;
1361		case 11: WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|(( src_data | ~dst_data)&mask)); break;
1362		case 12: WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((~src_data            )&mask)); break;
1363		case 13: WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((~src_data |  dst_data)&mask)); break;
1364		case 14: WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((~src_data | ~dst_data)&mask)); break;
1365		case 15: WRITE_WORD(&atarist_ram[dest_addr], (dst_data & ~mask)|((               0xffff)&mask)); break;
1366		}
	225	keylatch = data;
1367	226	}
1368	227
1369		static void do_blit(void)
	228	static READ8_HANDLER( hd6301_port2_r )
1370	229	{
1371		int source_addr=((READ_WORD(&atarist_blitter_ram[0x24])<<16) | READ_WORD(&atarist_blitter_ram[0x26]))&0x3ffffe;
1372		int dest_addr=((READ_WORD(&atarist_blitter_ram[0x32])<<16) | READ_WORD(&atarist_blitter_ram[0x34]))&0x3ffffe;
1373		int x_count=READ_WORD(&atarist_blitter_ram[0x36]);
1374		int y_count=READ_WORD(&atarist_blitter_ram[0x38]);
1375		int end_mask1=READ_WORD(&atarist_blitter_ram[0x28]);
1376		int end_mask2=READ_WORD(&atarist_blitter_ram[0x2a]);
1377		int end_mask3=READ_WORD(&atarist_blitter_ram[0x2c]);
1378		int src_x_inc=READ_WORD(&atarist_blitter_ram[0x20])&0xfffe;
1379		int src_y_inc=READ_WORD(&atarist_blitter_ram[0x22])&0xfffe;
1380		int dst_x_inc=READ_WORD(&atarist_blitter_ram[0x2e])&0xfffe;
1381		int dst_y_inc=READ_WORD(&atarist_blitter_ram[0x30])&0xfffe;
1382		int dst_data,src_data=0,x,halftone_offset=0,halftone_inc;
1383		unsigned int source_buffer=0; /* change */
1384		logerror("Doing blit\n");
1385		if (dst_y_inc&0x8000) dst_y_inc=dst_y_inc-0x10000;
1386		if (dst_x_inc&0x8000) dst_x_inc=dst_x_inc-0x10000;
1387		if (src_y_inc&0x8000) src_y_inc=src_y_inc-0x10000;
1388		if (src_x_inc&0x8000) src_x_inc=src_x_inc-0x10000;
	230	/*
	231
	232	bit      description
	233
	234	0      JOY 1-5
	235	1      JOY 0-6
	236	2      JOY 1-6
	237	3      SD FROM CPU
	238	4      SD TO CPU
1389	239
1390		if (dst_y_inc<0) halftone_inc=-2; else halftone_inc=2;
1391		if (READ_WORD(&atarist_blitter_ram[0x3c])&0x2000) halftone_offset=blitter.skew<<1; else halftone_offset=((READ_WORD(&atarist_blitter_ram[0x3c])>>8)&0xf)<<1;
1392		blitter.nfsr=READ_WORD(&atarist_blitter_ram[0x3c])&0x40;
1393		blitter.fxsr=READ_WORD(&atarist_blitter_ram[0x3c])&0x80;
1394		blitter.hop=(READ_WORD(&atarist_blitter_ram[0x3a])>>8)&3;
1395		blitter.op=READ_WORD(&atarist_blitter_ram[0x3a])&0xf;
1396		blitter.skew=READ_WORD(&atarist_blitter_ram[0x3c])&0xf;
	240	*/
1397	241
1398		/* Each blitter line is in 3 parts, according to the 3 masks (start, middle, end) */
1399		while (y_count>0) {
1400		if (blitter.fxsr) {
1401		BLITTER_DO_SOURCE;
1402		source_addr+=src_x_inc;
1403		}
	242	UINT8 data = 0;
	243
	244	//   data |= acia_ikbd_tx << 3;
	245
	246	return data;
	247	}
1404	248
1405		/* Start */
1406		BLITTER_DO_SOURCE;
1407		BLITTER_DO_HOP;
1408		dst_data=READ_WORD(&atarist_ram[dest_addr]);
1409		blitter_op(blitter.op,dest_addr,src_data,dst_data,end_mask1);
	249	static WRITE8_HANDLER( hd6301_port2_w )
	250	{
	251	/*
	252
	253	bit      description
	254
	255	0      JOY 1-5
	256	1      JOY 0-6
	257	2      JOY 1-6
	258	3      SD FROM CPU
	259	4      SD TO CPU
1410	260
1411		/* Middle */
1412		for(x=0 ; x<x_count-2; x++) {
1413		source_addr+=src_x_inc;
1414		dest_addr+=dst_x_inc;
	261	*/
1415	262
1416		BLITTER_DO_SOURCE;
1417		BLITTER_DO_HOP;
1418		dst_data=READ_WORD(&atarist_ram[dest_addr]);
1419		blitter_op(blitter.op,dest_addr,src_data,dst_data,end_mask2);
1420		}
1421
1422		/* End */
1423		if (x_count>2) {
1424		dest_addr+=dst_x_inc;
1425		//         BLITTER_DO_SOURCE;
1426		if ((!blitter.nfsr) || ((~(0xffff>>blitter.skew))>end_mask3)) {
1427		source_addr += src_x_inc;
1428		BLITTER_DO_SOURCE;
1429		} else if (src_x_inc<0) source_buffer >>=16; else source_buffer <<=16;
1430
1431		BLITTER_DO_HOP;
1432		dst_data=READ_WORD(&atarist_ram[dest_addr]);
1433		blitter_op(blitter.op,dest_addr,src_data,dst_data,end_mask3);
1434		}
1435
1436		//   logerror("Blitted line to %08x dest (x incs is %d, x incd is %d),(y incs is %d, y incd is %d)\n",dest_addr,src_x_inc,dst_x_inc,src_y_inc,dst_y_inc);
1437
1438		source_addr+=src_y_inc;
1439		dest_addr+=dst_y_inc;
1440		if (blitter.hop&1) halftone_offset=(halftone_offset+halftone_inc)&0x1e;
1441		y_count--;
1442		}
1443		WRITE_WORD(&atarist_blitter_ram[0x24],source_addr>>16);
1444		WRITE_WORD(&atarist_blitter_ram[0x26],source_addr&0xffff);
1445		WRITE_WORD(&atarist_blitter_ram[0x32],dest_addr>>16);
1446		WRITE_WORD(&atarist_blitter_ram[0x34],dest_addr&0xffff);
1447		WRITE_WORD(&atarist_blitter_ram[0x38],0); /* Y count */
	263	joylatch = data & 0x01;
	264	//   acia_ikbd_rx = (data & 0x10) >> 4;
1448	265	}
1449	266
1450		static READ16_HANDLER( atarist_blitter_r )
	267	static WRITE8_HANDLER( hd6301_port_3_w )
1451	268	{
1452		//   logerror("%06x:  blitter read %02x\n",activecpu_get_pc(),offset);
1453		if (offset==0x3c) return READ_WORD(&atarist_blitter_ram[0x3c])&0x3fff;
1454		return READ_WORD(&atarist_blitter_ram[offset]);
	269	// 0x01 CAPS LOCK led
1455	270	}
1456	271
1457		static WRITE16_HANDLER( atarist_blitter_w )
	272	static READ8_HANDLER( hd6301_port_3_r )
1458	273	{
1459		if (offset==0x3c) logerror("%06x:  blitter write %02x %04x\n",activecpu_get_pc(),offset,data);
1460		COMBINE_WORD_MEM(&atarist_blitter_ram[offset],data);
	274	/*
	275
	276	bit      description
	277
	278	0      CAPS LOCK LED
	279	1      Keyboard row input
	280	2      Keyboard row input
	281	3      Keyboard row input
	282	4      Keyboard row input
	283	5      Keyboard row input
	284	6      Keyboard row input
	285	7      Keyboard row input
1461	286
1462		//if (offset==0x20) logerror("%06x:  blitter write xinc %02x %04x\n",activecpu_get_pc(),offset,data);
1463		//if (offset==0x22) logerror("%06x:  blitter write yinc %02x %04x\n",activecpu_get_pc(),offset,data);
	287	*/
1464	288
1465		if (offset==0x3c) {
1466		if ((data&0xffff8000)==0x8000) do_blit();
1467		}
	289	return 0xff;
1468	290	}
1469	291
1470		static READ16_HANDLER( atarist_shifter_r )
	292	static READ8_HANDLER( hd6301_port_4_r )
1471	293	{
1472		/* Video ram base: $ffff8200 and $ffff8202 */
1473		if (offset==0x0)
1474		return (atarist_vidram_base>>16)&0xff;
1475		if (offset==0x2)
1476		return (atarist_vidram_base>>8)&0xff;
	294	/*
	295
	296	bit      description
	297
	298	0      JOY 0-1 or keyboard row input
	299	1      JOY 0-2 or keyboard row input
	300	2      JOY 0-3 or keyboard row input
	301	3      JOY 0-4 or keyboard row input
	302	4      JOY 1-1 or keyboard row input
	303	5      JOY 1-2 or keyboard row input
	304	6      JOY 1-3 or keyboard row input
	305	7      JOY 1-4 or keyboard row input
1477	306
1478		if (offset==0x4) /* Current screen address being rendered by shifter (top byte) */
1479		return ((atarist_vidram_base+atarist_shifter_offset)>>16)&0xff;
1480		if (offset==0x6) { /* Current screen address being rendered by shifter (mid byte) */
1481		int c=512-cpu_geticount(); /* 512 cycles per line */
	307	*/
1482	308
1483		/* Are in left border? If so we haven't yet started drawing this line */
1484		if (c<96) return ((atarist_vidram_base+atarist_shifter_offset)>>8)&0xff;
1485
1486		/* Are we in right border?  If so, we have drawn 320 pixels (160 bytes) */
1487		if (c>415) return ((atarist_vidram_base+atarist_shifter_offset+160)>>8)&0xff;
1488
1489		return ((atarist_vidram_base+atarist_shifter_offset+((c-96)/2))>>8)&0xff;
1490		}
1491		if (offset==0x8) { /* Current screen address being rendered by shifter (low byte) */
1492		int c=512-cpu_geticount(); /* 512 cycles per line */
1493
1494		logerror("%06x: render read low byte\n",activecpu_get_pc());
1495
1496		/* Are in left border? If so we haven't yet started drawing this line */
1497		if (c<96) return (atarist_vidram_base+atarist_shifter_offset)&0xfe;
1498
1499		/* Are we in right border?  If so, we have drawn 320 pixels (160 bytes) */
1500		if (c>415) return (atarist_vidram_base+atarist_shifter_offset+160)&0xfe;
1501
1502		/* Else mid-line, also I'm not sure if the real ST masks to 0xfe, 0xfc or 0xf8 */
1503		return ((atarist_vidram_base+atarist_shifter_offset+(c-96)/2))&0xfe;
1504		}
1505
1506		if (offset==0xa)
1507		return shifter_sync;
1508
1509		/* Palette data: $ffff8240 to $ffff825f*/
1510		if ((offset&0xe0)==0x40)
1511		return READ_WORD(&paletteram[offset&0x1e]);
1512
1513		/* Shifter resolution */
1514		if (offset==0x60)
1515		return resolution<<8;
1516
1517
1518		logerror("%06x:  Unmapped video read %02x\n",activecpu_get_pc(),offset);
1519
1520
1521		return 0;
	309	return 0xff;
1522	310	}
1523	311
1524		static WRITE16_HANDLER( atarist_shifter_w )
1525		{
1526		if (offset==0) { /* Video ram base: $ffff8200 and $ffff8202 */
1527		logerror("Switched screen base at line %d\n",current_line);
1528		atarist_pixel_update(); /* Update line for all pixels already drawn */
1529		atarist_vidram_base=(atarist_vidram_base&0xff00)|((data&0xff)<<16);
1530		return;
1531		}
1532		if (offset==2) {
1533		atarist_pixel_update(); /* Update line for all pixels already drawn */
1534		atarist_vidram_base=(atarist_vidram_base&0xff0000)|((data&0xff)<<8);
1535		return;
1536		}
	312	static ADDRESS_MAP_START(keyboard_map, ADDRESS_SPACE_PROGRAM, 8)
	313	AM_RANGE(0x0000, 0x0fff) AM_ROM
	314	ADDRESS_MAP_END
1537	315
1538		if (offset==0xa) { /* Sync */
1539		char *t[2]={"60hz","50hz"};
	316	static ADDRESS_MAP_START(keyboard_io_map, ADDRESS_SPACE_IO, 8)
	317	/*   AM_RANGE(HD6301_PORT1, HD6301_PORT1) AM_WRITE(keyboard_latch_w)
	318	AM_RANGE(HD6301_PORT2, HD6301_PORT2) AM_READWRITE(hd6301_port2_r, hd6301_port2_w)
	319	AM_RANGE(HD6301_PORT3, HD6301_PORT3) AM_READ(keyboard_0_r)
	320	AM_RANGE(HD6301_PORT4, HD6301_PORT4) AM_READ(keyboard_1_r)*/
	321	ADDRESS_MAP_END
1540	322
1541		/* Check for change, toggle resets lines left to draw (lower border overscan) */
1542		if (shifter_sync!=(data&0x200)) {
1543		start_line=current_line;
1544		end_line=start_line+200;
1545		logerror("%06x: Sync changed to %s (line %d)\n",activecpu_get_pc(),t[(data>>9)&1],current_line);
1546		}
	323	static ADDRESS_MAP_START(st_map, ADDRESS_SPACE_PROGRAM, 16)
	324	AM_RANGE(0x000000, 0x0fffff) AM_RAMBANK(1)
	325	AM_RANGE(0xfa0000, 0xfbffff) AM_ROMBANK(2)
	326	AM_RANGE(0xfc0000, 0xfeffff) AM_ROM
	327	AM_RANGE(0xff8000, 0xff8001) AM_READWRITE(atarist_mmu_r, atarist_mmu_w)
	328	AM_RANGE(0xff8200, 0xff82ff) AM_READWRITE(atarist_shifter_r, atarist_shifter_w)
	329	AM_RANGE(0xff8600, 0xff860f) AM_READWRITE(atarist_fdc_r, atarist_fdc_w)
	330	AM_RANGE(0xff8800, 0xff8801) AM_READWRITE(AY8910_read_port_0_msb_r, AY8910_control_port_0_msb_w)
	331	AM_RANGE(0xff8802, 0xff8803) AM_WRITE(AY8910_write_port_0_msb_w)
	332	AM_RANGE(0xfffa00, 0xfffa3f) AM_READWRITE(mfp68901_0_register16_r, mfp68901_0_register_msb_w)
	333	AM_RANGE(0xfffc00, 0xfffc01) AM_READWRITE(acia6850_0_stat_16_r, acia6850_0_ctrl_msb_w)
	334	AM_RANGE(0xfffc02, 0xfffc03) AM_READWRITE(acia6850_0_data_16_r, acia6850_0_data_msb_w)
	335	AM_RANGE(0xfffc04, 0xfffc05) AM_READWRITE(acia6850_1_stat_16_r, acia6850_1_ctrl_msb_w)
	336	AM_RANGE(0xfffc06, 0xfffc07) AM_READWRITE(acia6850_1_data_16_r, acia6850_1_data_msb_w)
	337	ADDRESS_MAP_END
1547	338
1548		shifter_sync=data&0x200;
1549		return;
1550		}
	339	static ADDRESS_MAP_START(megast_map, ADDRESS_SPACE_PROGRAM, 16)
	340	AM_RANGE(0x000000, 0x3fffff) AM_RAMBANK(1)
	341	AM_RANGE(0xfa0000, 0xfbffff) AM_ROMBANK(2)
	342	AM_RANGE(0xfc0000, 0xfeffff) AM_ROM
	343	AM_RANGE(0xff8000, 0xff8007) AM_READWRITE(atarist_mmu_r, atarist_mmu_w)
	344	AM_RANGE(0xff8200, 0xff82ff) AM_READWRITE(atarist_shifter_r, atarist_shifter_w)
	345	AM_RANGE(0xff8600, 0xff860f) AM_READWRITE(atarist_fdc_r, atarist_fdc_w)
	346	AM_RANGE(0xff8800, 0xff8801) AM_READWRITE(AY8910_read_port_0_msb_r, AY8910_control_port_0_msb_w)
	347	AM_RANGE(0xff8802, 0xff8803) AM_WRITE(AY8910_write_port_0_msb_w)
	348	//   AM_RANGE(0xff8a00, 0xff8a3f) AM_READWRITE(atarist_blitter_r, atarist_blitter_w)
	349	AM_RANGE(0xfffa00, 0xfffa3f) AM_READWRITE(mfp68901_0_register16_r, mfp68901_0_register_msb_w)
	350	AM_RANGE(0xfffc00, 0xfffc01) AM_READWRITE(acia6850_0_stat_16_r, acia6850_0_ctrl_msb_w)
	351	AM_RANGE(0xfffc02, 0xfffc03) AM_READWRITE(acia6850_0_data_16_r, acia6850_0_data_msb_w)
	352	AM_RANGE(0xfffc04, 0xfffc05) AM_READWRITE(acia6850_1_stat_16_r, acia6850_1_ctrl_msb_w)
	353	AM_RANGE(0xfffc06, 0xfffc07) AM_READWRITE(acia6850_1_data_16_r, acia6850_1_data_msb_w)
	354	ADDRESS_MAP_END
1551	355
1552		/* Palette data: $ffff8240 to $ffff825f */
1553		if ((offset&0xe0)==0x40) {
1554		int d;
	356	/* Input Ports */
1555	357
1556		//      atarist_pixel_update(); /* Update line for all pixels already drawn */
	358	INPUT_PORTS_START( keyboard )
	359	PORT_START_TAG("P31")
	360	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Control") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
	361	PORT_BIT( 0xef, IP_ACTIVE_LOW, IPT_UNUSED )
1557	362
1558		COMBINE_WORD_MEM(&paletteram[offset&0x1f],data);
1559		d=READ_WORD(&paletteram[offset&0x1f]);
1560		pal_lookup[(offset&0x1f)/2]=(d&7) | ((d&0x70)>>1) | ((d&0x700)>>2);
1561		return;
1562		}
	363	PORT_START_TAG("P32")
	364	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F1) PORT_NAME("F1")
	365	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
	366	PORT_BIT( 0xde, IP_ACTIVE_LOW, IPT_UNUSED )
1563	367
1564		if (offset==0x60) {
1565		static int a;
	368	PORT_START_TAG("P33")
	369	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F2) PORT_NAME("F2")
	370	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(DEF_STR( Alternate )) PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT))
	371	PORT_BIT( 0xbe, IP_ACTIVE_LOW, IPT_UNUSED )
1566	372
1567		resolution=(data>>8)&3;
	373	PORT_START_TAG("P34")
	374	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F3) PORT_NAME("F3")
	375	PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNUSED )
	376	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
1568	377
1569		//      if (a!=resolution)
1570		//         osd_set_display(640,480,Machine->drv->video_attributes);
	378	PORT_START_TAG("P35")
	379	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F4) PORT_NAME("F4")
	380	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC)
	381	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
	382	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t')
	383	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('Q')
	384	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('A')
	385	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
	386	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('Z')
1571	387
1572		a=resolution;
	388	PORT_START_TAG("P36")
	389	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F5) PORT_NAME("F5")
	390	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
	391	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
	392	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('W')
	393	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('E')
	394	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('S')
	395	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('D')
	396	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('X')
1573	397
1574		return;
1575		}
	398	PORT_START_TAG("P37")
	399	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F6) PORT_NAME("F6")
	400	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
	401	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
	402	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('R')
	403	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('T')
	404	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('F')
	405	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('C')
	406	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('V')
1576	407
1577		logerror("%06x:  Unmapped video write %02x %04x (line %d)\n",activecpu_get_pc(),offset,data,current_line);
1578		}
	408	PORT_START_TAG("P40")
	409	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F7) PORT_NAME("F7")
	410	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&')
	411	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'')
	412	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('Y')
	413	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('G')
	414	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('H')
	415	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('B')
	416	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('N')
1579	417
1580		static int mmu;
	418	PORT_START_TAG("P41")
	419	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F8) PORT_NAME("F8")
	420	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(')
	421	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')')
	422	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('U')
	423	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('I')
	424	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('J')
	425	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('K')
	426	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('M')
1581	427
1582		static READ16_HANDLER( atarist_mmu_r )
1583		{
1584		return mmu;
1585		}
	428	PORT_START_TAG("P42")
	429	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F9) PORT_NAME("F9")
	430	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=')
	431	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
	432	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('O')
	433	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('P')
	434	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('L')
	435	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
	436	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
1586	437
1587		static WRITE16_HANDLER( atarist_mmu_w )
1588		{
1589		mmu=data&0xff;
1590		}
	438	PORT_START_TAG("P43")
	439	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F10) PORT_NAME("F10")
	440	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('´') PORT_CHAR('`')
	441	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
	442	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
	443	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
	444	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
	445	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
	446	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
1591	447
1592		/***************************************************************************/
	448	PORT_START_TAG("P44")
	449	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Help") PORT_CODE(KEYCODE_F11)
	450	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Backspace") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
	451	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Delete") PORT_CODE(KEYCODE_DEL)
	452	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Insert") PORT_CODE(KEYCODE_INSERT)
	453	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
	454	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
	455	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
	456	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('_')
1593	457
1594		static ADDRESS_MAP_START (atarist_readmem, ADDRESS_SPACE_PROGRAM, 16)
1595		AM_RANGE( 0x000000, 0x000007) AM_READ( MRA16_ROM )
1596		AM_RANGE( 0x000008, 0x3fffff) AM_READ( MRA16_RAM )   /* User RAM */
1597		AM_RANGE( 0xfa0000, 0xfbffff) AM_READ( MRA16_BANK1 )   /* User ROM */
1598		AM_RANGE( 0xfc0000, 0xfeffff) AM_READ( MRA16_BANK2 )   /* System ROM */
1599		AM_RANGE( 0xef0000, 0xef01ff) AM_READ( atarist_fakehdc_r )
1600		AM_RANGE( 0xff8000, 0xff8007) AM_READ( atarist_mmu_r )
1601		AM_RANGE( 0xff8200, 0xff82ff) AM_READ( atarist_shifter_r )
1602		AM_RANGE( 0xff8600, 0xff860f) AM_READ( atarist_fdc_r )
1603		AM_RANGE( 0xff8800, 0xff88ff) AM_READ( atarist_psg_r )
1604		AM_RANGE( 0xff8a00, 0xff8a3f) AM_READ( atarist_blitter_r )
1605		AM_RANGE( 0xfffa00, 0xfffa2f) AM_READ( atarist_mfp_r )
1606		AM_RANGE( 0xfffc00, 0xfffc07) AM_READ( atarist_acia_r )
1607		ADDRESS_MAP_END
	458	PORT_START_TAG("P45")
	459	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Undo") PORT_CODE(KEYCODE_F12)
	460	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x91") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
	461	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Clr Home") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME))
	462	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x90") PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
	463	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x93") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
	464	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x92") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
	465	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD)
	466	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD)
1608	467
1609		static WRITE16_HANDLER(log_mem)
1610		{
1611		COMBINE_WORD_MEM(&atarist_ram[offset+0x122],data);
1612		logerror("%06x: Write LOGMEM %04x (line %d)\n",activecpu_get_pc(),data,current_line);
1613		}
	468	PORT_START_TAG("P46")
	469	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad (")
	470	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad )")
	471	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD)
	472	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD)
	473	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD)
	474	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD)
	475	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD)
	476	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad .") PORT_CODE(KEYCODE_DEL_PAD)
1614	477
1615		static ADDRESS_MAP_START (atarist_writemem, ADDRESS_SPACE_PROGRAM, 16)
1616		AM_RANGE( 0x000000, 0x000007) AM_WRITE( MWA16_ROM) AM_BASE( &atarist_ram )   /* Mirror of first 8 bytes of ROM */
1617		//   { 0x000122, 0x000123, log_mem },
1618		AM_RANGE( 0x000008, 0x3fffff) AM_WRITE( MWA16_RAM )   /* User RAM */
1619		AM_RANGE( 0xfa0000, 0xfbffff) AM_WRITE( MWA16_BANK1 )   /* User ROM */ //todo!
1620		AM_RANGE( 0xfc0000, 0xfeffff) AM_WRITE( MWA16_ROM )   /* System ROM */
	478	PORT_START_TAG("P47")
	479	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad /") PORT_CODE(KEYCODE_SLASH_PAD)
	480	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad *") PORT_CODE(KEYCODE_ASTERISK)
	481	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD)
	482	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad -") PORT_CODE(KEYCODE_MINUS_PAD)
	483	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD)
	484	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad +") PORT_CODE(KEYCODE_PLUS_PAD)
	485	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 3") PORT_CODE(KEYCODE_3_PAD)
	486	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad Enter") PORT_CODE(KEYCODE_ENTER_PAD)
	487	INPUT_PORTS_END
1621	488
1622		AM_RANGE( 0xef0000, 0xef01ff) AM_WRITE( atarist_fakehdc_w) AM_BASE( &atarist_fakehdc_ram )
1623		AM_RANGE( 0xff8000, 0xff8001) AM_WRITE( atarist_mmu_w )
1624		AM_RANGE( 0xff8200, 0xff82ff) AM_WRITE( atarist_shifter_w) AM_BASE( &paletteram )
1625		AM_RANGE( 0xff8600, 0xff860f) AM_WRITE( atarist_fdc_w )
1626		AM_RANGE( 0xff8800, 0xff88ff) AM_WRITE( atarist_psg_w )
1627		AM_RANGE( 0xff8a00, 0xff8a3f) AM_WRITE( atarist_blitter_w) AM_BASE( &atarist_blitter_ram )
1628		AM_RANGE( 0xfffa00, 0xfffa2f) AM_WRITE( atarist_mfp_w )
1629		AM_RANGE( 0xfffc00, 0xfffc07) AM_WRITE( atarist_acia_w )
1630		ADDRESS_MAP_END
1631
1632		/***************************************************************************/
1633
1634	489	INPUT_PORTS_START( atarist )
1635		PORT_START /* Config Options */
1636		PORT_DIPNAME( 0x01, 0x00, "Number of floppy drives" )
1637		PORT_DIPSETTING(   0x00, "1" )
1638		PORT_DIPSETTING(   0x01, "2" )
1639		PORT_BIT( 0x06, 0x04, IPT_DIPSWITCH_NAME) PORT_NAME("Memory") PORT_TOGGLE
1640		PORT_DIPSETTING(   0x02, "512k" )
1641		PORT_DIPSETTING(   0x04, "1 Meg" )
1642		PORT_DIPSETTING(   0x06, "2 Meg" )
1643		PORT_DIPSETTING(   0x00, "4 Meg" )
1644		//   PORT_DIPNAME( 0x08, 0x00, "Skip bootsector" )
1645		//   PORT_DIPSETTING(   0x00, "No" ) //change to drive C emulation
1646		//   PORT_DIPSETTING(   0x08, "Yes" )
1647		PORT_DIPNAME( 0x10, 0x00, "Port 0" )
1648		PORT_DIPSETTING(   0x00, "Mouse" )
1649		PORT_DIPSETTING(   0x10, "Joystick" )
1650		PORT_DIPNAME( 0x20, 0x20, "Port 1" )
1651		PORT_DIPSETTING(   0x00, "Nothing" )
1652		PORT_DIPSETTING(   0x20, "Joystick" )
	490	PORT_START_TAG("config")
	491	PORT_CONFNAME( 0x20, 0x00, "Input Port 0 Device")
	492	PORT_CONFSETTING( 0x00, "Mouse" )
	493	PORT_CONFSETTING( 0x20, DEF_STR(Joystick) )
1653	494
1654		//blitter?
1655		//parallel port joysticks
1656		//mono/colour
1657		//write protect on disk 1/2
	495	PORT_START_TAG("MOUSE_X")
	496	PORT_BIT( 0xff, 0x00, IPT_MOUSE_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(5) PORT_MINMAX(0, 255) PORT_PLAYER(1)
1658	497
1659		//CHANGE to PLAYER2 later!!  core fix for default..
	498	PORT_START_TAG("MOUSE_Y")
	499	PORT_BIT( 0xff, 0x00, IPT_MOUSE_Y) PORT_SENSITIVITY(100) PORT_KEYDELTA(5) PORT_MINMAX(0, 255) PORT_PLAYER(1)
1660	500
1661		PORT_START /* Mouse */
1662		PORT_BIT( 0xffff, 0x0000, IPT_TRACKBALL_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_PLAYER(1)
	501	PORT_START_TAG("MOUSE_BUTTONS")
	502	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1)
	503	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
1663	504
1664		PORT_START /* Mouse */
1665		PORT_BIT( 0xffff, 0x0000, IPT_TRACKBALL_Y) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_PLAYER(1)
1666
1667		PORT_START /* Mouse - Buttons */
1668		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_PLAYER(1)
1669		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_PLAYER(1)
1670
1671		PORT_START /* Joystick port 1 */
1672		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP) PORT_PLAYER(2) PORT_8WAY
1673		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN) PORT_PLAYER(2) PORT_8WAY
1674		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT) PORT_PLAYER(2) PORT_8WAY
1675		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT) PORT_PLAYER(2) PORT_8WAY
	505	PORT_START_TAG("JOY0")
	506	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) PORT_8WAY
	507	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) PORT_8WAY
	508	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) PORT_8WAY
	509	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) PORT_8WAY
1676	510	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
1677	511	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
1678	512	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
1679		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_PLAYER(2)
	513	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
1680	514
1681		PORT_START /* Joystick port 0 */
1682		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP) PORT_PLAYER(1) PORT_8WAY
1683		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN) PORT_PLAYER(1) PORT_8WAY
1684		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT) PORT_PLAYER(1) PORT_8WAY
1685		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT) PORT_PLAYER(1) PORT_8WAY
	515	PORT_START_TAG("JOY1")
	516	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) PORT_8WAY
	517	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) PORT_8WAY
	518	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) PORT_8WAY
	519	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) PORT_8WAY
1686	520	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
1687	521	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
1688	522	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
1689		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_PLAYER(1)
	523	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
	524
	525	PORT_INCLUDE( keyboard )
	526	INPUT_PORTS_END
1690	527
1691		PORT_START /* Keyboard */
1692		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ESCAPE") PORT_CODE(KEYCODE_ESC)
1693		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1)
1694		PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2)
1695		PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3)
1696		PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4)
1697		PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5)
1698		PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6)
1699		PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7)
1700		PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8)
1701		PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9)
1702		PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0)
1703		PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS)
1704		PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("=") PORT_CODE(KEYCODE_MINUS)
1705		PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Backspace") PORT_CODE(KEYCODE_BACKSPACE)
1706		PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB)
1707		PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Q") PORT_CODE(KEYCODE_Q)
	528	INPUT_PORTS_START( joystick_ste )
	529	PORT_START_TAG("JOY0")
	530	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
	531	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
	532	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	533	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4)
	534	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
1708	535
1709		PORT_START
1710		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("W") PORT_CODE(KEYCODE_W)
1711		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E)
1712		PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R)
1713		PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("T") PORT_CODE(KEYCODE_T)
1714		PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Y") PORT_CODE(KEYCODE_Y)
1715		PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("U") PORT_CODE(KEYCODE_U)
1716		PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("I") PORT_CODE(KEYCODE_I)
1717		PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("O") PORT_CODE(KEYCODE_O)
1718		PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("P") PORT_CODE(KEYCODE_P)
1719		PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("[") PORT_CODE(KEYCODE_OPENBRACE)
1720		PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("]") PORT_CODE(KEYCODE_CLOSEBRACE)
1721		PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER)
1722		PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Control") PORT_CODE(KEYCODE_LCONTROL)
1723		PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A)
1724		PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S") PORT_CODE(KEYCODE_S)
1725		PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D)
	536	PORT_START_TAG("JOY1")
	537	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) PORT_8WAY
	538	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_PLAYER(1) PORT_8WAY
	539	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_PLAYER(1) PORT_8WAY
	540	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_PLAYER(1) PORT_8WAY
	541	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) PORT_8WAY
	542	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_PLAYER(2) PORT_8WAY
	543	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_PLAYER(2) PORT_8WAY
	544	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_PLAYER(2) PORT_8WAY
	545	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3) PORT_8WAY
	546	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_PLAYER(3) PORT_8WAY
	547	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_PLAYER(3) PORT_8WAY
	548	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_PLAYER(3) PORT_8WAY
	549	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4) PORT_8WAY
	550	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_PLAYER(4) PORT_8WAY
	551	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_PLAYER(4) PORT_8WAY
	552	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_PLAYER(4) PORT_8WAY
1726	553
1727		PORT_START
1728		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F)
1729		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("G") PORT_CODE(KEYCODE_G)
1730		PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("H") PORT_CODE(KEYCODE_H)
1731		PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("J") PORT_CODE(KEYCODE_J)
1732		PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("K") PORT_CODE(KEYCODE_K)
1733		PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("L") PORT_CODE(KEYCODE_L)
1734		PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(";") PORT_CODE(KEYCODE_COLON)
1735		PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("'") PORT_CODE(KEYCODE_QUOTE)
1736		PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("@") PORT_CODE(KEYCODE_TILDE)
1737		PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT)
1738		PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\\") PORT_CODE(KEYCODE_BACKSLASH)
1739		PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Z") PORT_CODE(KEYCODE_Z)
1740		PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X)
1741		PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C)
1742		PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("V") PORT_CODE(KEYCODE_V)
1743		PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B)
	554	PORT_START_TAG("PADDLE0X")
	555	PORT_BIT( 0xff, 0x00, IPT_PADDLE ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) PORT_PLAYER(1)
1744	556
1745		PORT_START
1746		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("N") PORT_CODE(KEYCODE_N)
1747		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("M") PORT_CODE(KEYCODE_M)
1748		PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(",") PORT_CODE(KEYCODE_COMMA)
1749		PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(".") PORT_CODE(KEYCODE_STOP)
1750		PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/") PORT_CODE(KEYCODE_SLASH)
1751		PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT)
1752		PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED )
1753		PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Alternate") PORT_CODE(KEYCODE_LALT)
1754		PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE)
1755		PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_RALT)
1756		PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1)
1757		PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2)
1758		PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3)
1759		PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4)
1760		PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5)
1761		PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F6") PORT_CODE(KEYCODE_F6)
	557	PORT_START_TAG("PADDLE0Y")
	558	PORT_BIT( 0xff, 0x00, IPT_PADDLE_V ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) PORT_PLAYER(1)
1762	559
1763		PORT_START
1764		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F7") PORT_CODE(KEYCODE_F7)
1765		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F8") PORT_CODE(KEYCODE_F8)
1766		PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F9") PORT_CODE(KEYCODE_F9)
1767		PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F10") PORT_CODE(KEYCODE_F10)
1768		PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
1769		PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
1770		PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("HOME") PORT_CODE(KEYCODE_HOME)
1771		PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("UP") PORT_CODE(KEYCODE_UP)
1772		PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNUSED )
1773		PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- (Keypad)") PORT_CODE(KEYCODE_MINUS_PAD)
1774		PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left") PORT_CODE(KEYCODE_LEFT)
1775		PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_UNUSED )
1776		PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT)
1777		PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("+ (Keypad)") PORT_CODE(KEYCODE_PLUS_PAD)
1778		PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
1779		PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
	560	PORT_START_TAG("PADDLE1X")
	561	PORT_BIT( 0xff, 0x00, IPT_PADDLE ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) PORT_PLAYER(2)
1780	562
1781		PORT_START
1782		PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
1783		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Insert") PORT_CODE(KEYCODE_INSERT)
1784		PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Delete") PORT_CODE(KEYCODE_DEL)
1785		PORT_BIT( 0x7ff8, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Scancodes 0x54 to 0x5f are unused */
1786		PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ISO (Atari Key)") PORT_CODE(KEYCODE_RCONTROL)
	563	PORT_START_TAG("PADDLE1Y")
	564	PORT_BIT( 0xff, 0x00, IPT_PADDLE_V ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) PORT_PLAYER(2)
1787	565
1788		PORT_START
1789		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Undo") PORT_CODE(KEYCODE_PGUP)
1790		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Help") PORT_CODE(KEYCODE_PGDN)
1791		PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("( (Keypad)") PORT_CODE(KEYCODE_F11)
1792		PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(") (Keypad)") PORT_CODE(KEYCODE_F12)
1793		PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/ (Keypad)") PORT_CODE(KEYCODE_SLASH_PAD)
1794		PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("* (Keypad)") PORT_CODE(KEYCODE_ASTERISK)
1795		PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7 (Keypad)") PORT_CODE(KEYCODE_7_PAD)
1796		PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8 (Keypad)") PORT_CODE(KEYCODE_8_PAD)
1797		PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9 (Keypad)") PORT_CODE(KEYCODE_9_PAD)
1798		PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4 (Keypad)") PORT_CODE(KEYCODE_4_PAD)
1799		PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5 (Keypad)") PORT_CODE(KEYCODE_5_PAD)
1800		PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6 (Keypad)") PORT_CODE(KEYCODE_6_PAD)
1801		PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1 (Keypad)") PORT_CODE(KEYCODE_1_PAD)
1802		PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2 (Keypad)") PORT_CODE(KEYCODE_2_PAD)
1803		PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3 (Keypad)") PORT_CODE(KEYCODE_3_PAD)
1804		PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0 (Keypad)") PORT_CODE(KEYCODE_0_PAD)
	566	PORT_START_TAG("GUNX") // should be 10-bit
	567	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(1)
1805	568
1806		PORT_START
1807		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(". (Keypad)") PORT_CODE(KEYCODE_DEL_PAD)
1808		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Enter (Keypad)") PORT_CODE(KEYCODE_ENTER_PAD)
1809		PORT_BIT( 0xfffc, IP_ACTIVE_HIGH, IPT_UNUSED )
	569	PORT_START_TAG("GUNY") // should be 10-bit
	570	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(1)
1810	571	INPUT_PORTS_END
1811	572
1812		/***************************************************************************/
	573	/* Sound Interface */
1813	574
1814		static gfx_decode gfxdecodeinfo[] =
	575	static WRITE8_HANDLER( ym2149_port_a_w )
1815	576	{
1816		{ -1 } /* end of array */
1817		};
	577	wd17xx_set_side(data & 0x01);
1818	578
1819		/***************************************************************************/
1820
1821		enum
1822		{
1823		ATARI_ST_IMAGE_TYPE_NONE,
1824		ATARI_ST_IMAGE_TYPE_MSA,
1825		ATARI_ST_IMAGE_TYPE_RAW
1826		};
1827
1828		static int atari_st_image_type[2] = {ATARI_ST_IMAGE_TYPE_NONE, ATARI_ST_IMAGE_TYPE_NONE};
1829
1830
1831		/* basic format like .ST */
1832		static int atarist_basic_floppy_init(int id, mame_file *file, int open_mode)
1833		{
1834		if (basicdsk_floppy_load(id)==INIT_PASS)
	579	if (data & 0x02)
1835	580	{
1836		/* Figure out correct disk format, try standard formats first */
1837		if (file) {
1838		int s=mame_fsize(file),i,f=0;
1839		int table[][4]={
1840		{ 808960, 10, 2, 79 }, /* 79 tracks, 2 sides, 10 sectors */
1841		{ 819200, 10, 2, 80 }, /* 80 tracks, 2 sides, 10 sectors */
1842		{ 829440, 10, 2, 81 },
1843		{ 839680, 10, 2, 82 },
1844		{ 849920, 10, 2, 83 },
1845
1846		{ 728064, 9, 2, 79 }, /* 79 tracks, 2 sides, 9 sectors */
1847		{ 737280, 9, 2, 80 },
1848		{ 746496, 9, 2, 81 },
1849		{ 755712, 9, 2, 82 },
1850		{ 764928, 9, 2, 83 },
1851
1852		};
1853
1854		for (i=0; i<10; i++)
1855		if (s==table[i][0]) {
1856		f=1;
1857		basicdsk_set_geometry(id, table[i][3], table[i][2], table[i][1], 512, 1 );
1858		}
1859
1860		if (f==0) { /* No standard format found - take data from the bootsector */
1861		char bootsector[512];
1862
1863		mame_fseek(file, 0, SEEK_SET);
1864
1865		if (mame_fread(file, bootsector, 512))
1866		{
1867		int sectors, head, tracks;
1868
1869		sectors=bootsector[0x18];
1870		head=bootsector[0x1a];
1871		tracks=(bootsector[0x13]|(bootsector[0x14]<<8))/sectors/head;
1872
1873		/* set geometry so disk image can be read */
1874		basicdsk_set_geometry(id, tracks, head, sectors, 512, 1);
1875
1876		logerror("Drive %c: Using %d tracks, %d sectors, %d sides for disk image (values from bootsector).\n",'A'+id, tracks, sectors, head );
1877		}
1878		}
1879
1880		atari_st_image_type[id] = ATARI_ST_IMAGE_TYPE_RAW;
1881		return INIT_PASS;
1882		}
1883		else logerror("Disk open failed\n");
	581	wd17xx_set_drive(0);
1884	582	}
1885
1886		return INIT_FAIL;
1887		}
1888
1889
1890
1891		/* load image */
1892		int atarist_load(mame_file *file, unsigned char **ptr)
1893		{
1894		if (file)
	583	else if (data & 0x04)
1895	584	{
1896		int datasize;
1897		unsigned char *data;
	585	wd17xx_set_drive(1);
	586	}
1898	587
1899		/* get file size */
1900		datasize = mame_fsize(file);
	588	// 0x08 = RTS
	589	// 0x10 = DTR
1901	590
1902		if (datasize!=0)
1903		{
1904		/* malloc memory for this data */
1905		data = malloc(datasize);
	591	centronics_write_handshake(1, (data & 0x20) ? 0 : CENTRONICS_STROBE, CENTRONICS_STROBE);
1906	592
1907		if (data!=NULL)
1908		{
1909		/* read whole file */
1910		mame_fread(file, data, datasize);
	593	// 0x40 = General Purpose Output
	594	// 0x80 = Reserved
	595	}
1911	596
1912		*ptr = data;
1913
1914		logerror("File loaded!\r\n");
1915
1916		/* ok! */
1917		return 1;
1918		}
1919		}
1920		}
1921
1922		return 0;
	597	static WRITE8_HANDLER( ym2149_port_b_w )
	598	{
	599	centronics_write_data(0, data);
1923	600	}
1924	601
1925		/***************************************************************************/
1926
1927		static VIDEO_EOF( atarist )
	602	static struct AY8910interface ym2149_interface =
1928	603	{
1929		static int last_mem=-1;
1930		int mid,new_mem=readinputport(0)&6;
	604	0,
	605	0,
	606	ym2149_port_a_w,
	607	ym2149_port_b_w
	608	};
1931	609
	610	/* Machine Drivers */
1932	611
1933		/* Check if the user has changed memory configuration */
1934		if (new_mem!=last_mem) {
1935		switch (new_mem) {
1936		case 0x02: logerror("Memory set to 512k\n"); mid=0x80000; break;
1937		case 0x04: logerror("Memory set to 1 Meg\n"); mid=0x100000; break;
1938		case 0x06: logerror("Memory set to 2 Meg\n"); mid=0x200000; break;
1939		case 0x00: logerror("Memory set to 4 Meg\n"); mid=0x400000; break;
1940		default: mid=0x100000; break;
1941		}
	612	static int acia_int;
	613	static UINT8 acia_ikbd_rx, acia_ikbd_tx;
	614	static UINT8 acia_midi_rx, acia_midi_tx;
1942	615
1943		/* Turn unavailable memory areas into a NOP region */
1944		install_mem_write16_handler(0, 0x8,mid-1, MWA16_RAM);
1945		install_mem_read16_handler (0, 0x8,mid-1, MRA16_RAM);
1946		install_mem_write16_handler(0, mid,0x3fffff, MWA16_NOP);
1947		install_mem_read16_handler (0, mid,0x3fffff, MRA16_NOP);
1948		last_mem=new_mem;
1949		}
	616	static void acia_interrupt(int state)
	617	{
	618	acia_int = state;
1950	619	}
1951	620
1952		static MACHINE_RESET( atarist )
	621	static struct acia6850_interface acia_ikbd_intf =
1953	622	{
1954		unsigned char *RAM = memory_region(REGION_USER1);
1955		unsigned char *RAM2 = memory_region(REGION_CPU1);
1956		unsigned char *RAM3 = memory_region(REGION_USER2);
	623	500000,
	624	500000,
	625	&acia_ikbd_rx,
	626	&acia_ikbd_tx,
	627	acia_interrupt
	628	};
1957	629
1958		/* Setup ROM */
1959		memory_set_bankptr(1,&RAM3[0]);
1960		memory_set_bankptr(2,&RAM[0]);
	630	static struct acia6850_interface acia_midi_intf =
	631	{
	632	500000,
	633	500000,
	634	&acia_midi_rx,
	635	&acia_midi_tx,
	636	acia_interrupt
	637	};
1961	638
1962		/* Setup first 8 bytes of memory */
1963		WRITE_WORD(&RAM2[0],READ_WORD(&RAM[0]));
1964		WRITE_WORD(&RAM2[2],READ_WORD(&RAM[2]));
1965		WRITE_WORD(&RAM2[4],READ_WORD(&RAM[4]));
1966		WRITE_WORD(&RAM2[6],READ_WORD(&RAM[6]));
1967
1968		mfp_init();
1969		wd17xx_init(WD_TYPE_177X, atarist_fdc_callback, NULL);
1970		ikbd_reset();
1971		atarist_current_drive=-1;
1972		}
1973
1974		static INTERRUPT_GEN( atarist_interrupt )
	639	static READ8_HANDLER( mfp_gpio_r )
1975	640	{
1976		static int keyboard_line;
1977		current_line = 311 - cpu_getiloops();
	641	/*
1978	642
1979		/* 'Randomise' where the keyboard interrupts are triggered each frame */
1980		if (current_line==keyboard_line) {
1981		atarist_keyboard_update();
1982		keyboard_line=(keyboard_line+517)%311;
1983		}
	643	bit      description
	644
	645	0      Centronics BUSY
	646	1      RS232 DCD
	647	2      RS232 CTS
	648	3      Blitter done
	649	4      Keyboard/MIDI
	650	5      FDC
	651	6      RS232 RI
	652	7      Monochrome monitor detect
1984	653
1985		/* Start and end lines can change according to overscan effects */
1986		if (current_line>=start_line && current_line<end_line) {
1987		atarist_drawline(current_line,current_pixel,320+96);
1988		atarist_shifter_offset+=160; /* Offset to next line to draw */
1989		current_pixel=96;
	654	*/
1990	655
1991		/* Timer B event counter pin is connected to shifter pin DE (toggles every bitmap line [NOT borders]) */
1992		if (mfp.tbty==EVENT) {
1993		mfp.tbdr-=1;
1994		if (mfp.tbdr<1) {
1995		mfp.tbdr=mfp.tbrl; /* Reload data register */
1996		timer_b_callback(0); /* Should perhaps fire 96 cycles later than this (after left border?) */
1997		}
1998		}
1999		}
2000		else
2001		atarist_drawborder(current_line);
	656	UINT8 data = 0;
	657	int centronics_handshake = centronics_read_handshake(1);
2002	658
2003		if (current_line==306) { /* Actual Vblank position unknown, this must be close though */
2004		start_line=63; /* Reset shifter values to draw 200 lines, no overscan */
2005		end_line=start_line+200;
2006		atarist_shifter_offset=0; /* Reset shifter start address every VBL */
2007		return 4; /* Hardware V-Blank */
	659	if ((centronics_handshake & CENTRONICS_NOT_BUSY) == 0)
	660	{
	661	data |= 0x01;
2008	662	}
2009	663
2010		return 2; /* Hardware H-Blank */
	664	data |= acia_int << 4;
	665	data |= fdc.active << 5;
	666	data |= 0x80;
	667
	668	return data;
2011	669	}
2012	670
2013		/***************************************************************************/
2014
2015		static int ym2149_port_a,ym2149_port_b;
2016
2017		static  READ8_HANDLER( ym2149_port_a_r )
	671	static void mfp_interrupt(int which, int state, int vector)
2018	672	{
2019		return ym2149_port_a;
	673	cpunum_set_input_line_vector(0, MC68000_IRQ_6, vector);
	674	cpunum_set_input_line(0, MC68000_IRQ_6, state);
2020	675	}
2021	676
2022		static READ8_HANDLER( ym2149_port_b_r )
	677	static struct mfp68901_interface mfp_intf =
2023	678	{
2024		return ym2149_port_b;
2025		}
	679	Y2/32,
	680	Y1,
	681	NULL,
	682	NULL,
	683	NULL,
	684	NULL,
	685	mfp_interrupt,
	686	mfp_gpio_r,
	687	NULL
	688	};
2026	689
2027		static WRITE8_HANDLER( ym2149_port_a_w )
	690	static MACHINE_START( atarist )
2028	691	{
2029		static int strobe=-1;
	692	memory_install_read16_handler (0, ADDRESS_SPACE_PROGRAM, 0x000000, mess_ram_size - 1, 0, 0, MRA16_BANK1);
	693	memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, 0x000000, mess_ram_size - 1, 0, 0, MWA16_BANK1);
2030	694
2031		ym2149_port_a=data&0xff;
	695	if (mess_ram_size < 0x100000)
	696	{
	697	memory_install_read16_handler (0, ADDRESS_SPACE_PROGRAM, mess_ram_size, 0x0fffff, 0, 0, MRA16_UNMAP);
	698	memory_install_write16_handler(0, ADDRESS_SPACE_PROGRAM, mess_ram_size, 0x0fffff, 0, 0, MWA16_UNMAP);
	699	}
2032	700
2033		/* info from "Atari ST Internals" by my friend James Boulton ;) */
2034		wd17xx_set_side(data & 0x01);
	701	wd17xx_init(WD_TYPE_1772, atarist_fdc_callback, NULL);
2035	702
2036		/* not sure if these bits form drive index or, select drives independantly */
2037		/* for now select drive 0 */
2038		wd17xx_set_drive(0);
	703	acia6850_config(0, &acia_ikbd_intf);
	704	acia6850_config(1, &acia_midi_intf);
2039	705
2040		//   logerror("PSG port a %02x\n",data);
2041		/* BIT 8 RTS */
2042		/* BIT 10 DTR */
2043
2044		/* BIT 20 Centronics Strobe */
2045		if (data&0x20 && strobe==0) { /* 0 -> 1 causes transition */
2046		logerror("Parallel port output byte %02x (%c)\n",ym2149_port_b,ym2149_port_b);
2047		}
2048		strobe=data&0x20;
2049
2050		/* BIT 40 */
2051		/* BIT 80 */
	706	mfp68901_config(0, &mfp_intf);
2052	707	}
2053	708
2054		static WRITE8_HANDLER( ym2149_port_b_w )
	709	static MACHINE_RESET( atarist )
2055	710	{
2056		/* Parallel port byte */
2057		ym2149_port_b=data&0xff;
	711	UINT8 *ROM = memory_region(REGION_CPU1) + 0xfc0000;
	712
	713	memcpy(&mess_ram, ROM, 8);
2058	714	}
2059	715
2060		static struct AY8910interface ay8910_interface =
2061		{
2062		ym2149_port_a_r,
2063		ym2149_port_b_r,
2064		ym2149_port_a_w,
2065		ym2149_port_b_w
2066		};
	716	static MACHINE_DRIVER_START( atarist )
	717	// basic machine hardware
	718	MDRV_CPU_ADD_TAG("main", M68000, Y2/4)
	719	MDRV_CPU_PROGRAM_MAP(st_map, 0)
2067	720
2068		/***************************************************************************/
	721	MDRV_CPU_ADD(HD63701, 1000000) // HD6301
	722	MDRV_CPU_PROGRAM_MAP(keyboard_map, 0)
	723	MDRV_CPU_IO_MAP(keyboard_io_map, 0)
2069	724
2070		static MACHINE_DRIVER_START( ataris )
2071		/* basic machine hardware */
2072		MDRV_CPU_ADD(M68000, MASTER_CLOCK)        /* 8 MHz */
2073		MDRV_CPU_PROGRAM_MAP(atarist_readmem,atarist_writemem)
2074		MDRV_CPU_VBLANK_INT(atarist_interrupt,312)
2075		MDRV_SCREEN_REFRESH_RATE(50)
2076		MDRV_SCREEN_VBLANK_TIME(MAME_TIME_IN_USEC(0))
2077		MDRV_INTERLEAVE(1)
	725	MDRV_MACHINE_START(atarist)
	726	MDRV_MACHINE_RESET(atarist)
2078	727
2079		MDRV_MACHINE_RESET( atarist )
2080
2081		/* video hardware, doubled to allow mode changes */
2082		MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_UPDATE_BEFORE_VBLANK)
	728	// video hardware
	729	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
2083	730	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
2084		MDRV_SCREEN_SIZE(512*2, 313*1)   /* 50Hz values (Note, 60Hz is 508 by 315) */
2085		/*MDRV_SCREEN_VISIBLE_AREA(0, 639, 0+63, 239+63)*/
2086		/*MDRV_SCREEN_VISIBLE_AREA(0, 639, 0+(63*2), (239+63)*2)*/
2087		MDRV_SCREEN_VISIBLE_AREA(96*2, (320+96)*2-1, 0+63, 239+63)
2088		/*MDRV_SCREEN_VISIBLE_AREA(0, 639, 0, 239+63)*/
2089		MDRV_GFXDECODE( gfxdecodeinfo )
2090		MDRV_PALETTE_LENGTH(512)
2091		MDRV_COLORTABLE_LENGTH(512)
2092
2093		MDRV_VIDEO_EOF( atarist )
	731	MDRV_PALETTE_LENGTH(16)
2094	732	MDRV_VIDEO_START( atarist )
2095	733	MDRV_VIDEO_UPDATE( atarist )
2096	734
2097		/* sound hardware */
	735	MDRV_SCREEN_ADD("main", 0)
	736	MDRV_SCREEN_RAW_PARAMS(Y2/4, 516, 0, 512, 313, 0, 312)
	737
	738	// sound hardware
2098	739	MDRV_SPEAKER_STANDARD_MONO("mono")
2099		MDRV_SOUND_ADD(AY8910, 2000000)
2100		MDRV_SOUND_CONFIG(ay8910_interface)
	740	MDRV_SOUND_ADD(YM2149, Y2/16)
	741	MDRV_SOUND_CONFIG(ym2149_interface)
2101	742	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
2102	743	MACHINE_DRIVER_END
2103	744
	745	static MACHINE_DRIVER_START( megast )
	746	MDRV_IMPORT_FROM(atarist)
	747	MDRV_CPU_MODIFY("main")
	748	MDRV_CPU_PROGRAM_MAP(megast_map, 0)
	749	MACHINE_DRIVER_END
2104	750
2105		#if 0
2106		static struct MachineDriver machine_driver_stmono =
2107		{
2108		/* basic machine hardware */
2109		{
2110		{
2111		CPU_M68000,
2112		MASTER_CLOCK, /* 8 MHz */
2113		atarist_readmem,atarist_writemem,0,0,
2114		atarist_interrupt,500
2115		}
2116		},
2117		71, 0,
2118		1,
2119		atarist_init_machine,   /* init machine */
2120		0,
	751	/* ROMs */
2121	752
2122		/* video hardware, doubled to allow mode changes */
2123		640, 501,
2124		{ 0, 639, 0, 399 },
	753	ROM_START( atarist )
	754	ROM_REGION( 0x1000000, REGION_CPU1, ROMREGION_16BIT )
	755	ROM_SYSTEM_BIOS( 0, "tos100", "TOS 1.0 (ROM TOS)" )
	756	ROMX_LOAD( "tos100.img", 0xfc0000, 0x030000, BAD_DUMP CRC(d331af30) SHA1(7bcc2311d122f451bd03c9763ade5a119b2f90da), ROM_BIOS(1) ) // this is a US rom
	757	ROM_SYSTEM_BIOS( 1, "tos102", "TOS 1.02 (MEGA TOS)" )
	758	ROMX_LOAD( "tos102.img", 0xfc0000, 0x030000, BAD_DUMP CRC(3b5cd0c5) SHA1(87900a40a890fdf03bd08be6c60cc645855cbce5), ROM_BIOS(2) )
	759	ROM_SYSTEM_BIOS( 2, "tos104", "TOS 1.04 (Rainbow TOS)" )
	760	ROMX_LOAD( "tos104.img", 0xfc0000, 0x030000, BAD_DUMP CRC(a50d1d43) SHA1(9526ef63b9cb1d2a7109e278547ae78a5c1db6c6), ROM_BIOS(3) )
2125	761
2126		gfxdecodeinfo,
2127		2,2,
2128		0,
	762	ROM_REGION( 0x1000, REGION_CPU2, 0 )
	763	ROM_LOAD( "keyboard.u1", 0x0000, 0x1000, CRC(0296915d) SHA1(1102f20d38f333234041c13687d82528b7cde2e1) )
	764	ROM_END
2129	765
2130		VIDEO_TYPE_RASTER,
2131		atarist_keyboard_update,
2132		atarist_vh_start,
2133		atarist_vh_stop,
2134		atarist_vh_screenrefresh,
	766	ROM_START( megast )
	767	ROM_REGION( 0x1000000, REGION_CPU1, ROMREGION_16BIT )
	768	ROM_SYSTEM_BIOS( 0, "tos102", "TOS 1.02 (MEGA TOS)" )
	769	ROMX_LOAD( "tos102.img", 0xfc0000, 0x030000, BAD_DUMP CRC(3b5cd0c5) SHA1(87900a40a890fdf03bd08be6c60cc645855cbce5), ROM_BIOS(1) )
	770	ROM_SYSTEM_BIOS( 1, "tos104", "TOS 1.04 (Rainbow TOS)" )
	771	ROMX_LOAD( "tos104.img", 0xfc0000, 0x030000, BAD_DUMP CRC(a50d1d43) SHA1(9526ef63b9cb1d2a7109e278547ae78a5c1db6c6), ROM_BIOS(2) )
2135	772
2136		/* sound hardware */
2137		0,0,0,0,
2138		{
2139		{
2140		SOUND_AY8910,
2141		&ay8910_interface
2142		}
2143		}
2144		};
2145		#endif
	773	ROM_REGION( 0x1000, REGION_CPU2, 0 )
	774	ROM_LOAD( "keyboard.u1", 0x0000, 0x1000, CRC(0296915d) SHA1(1102f20d38f333234041c13687d82528b7cde2e1) )
	775	ROM_END
2146	776
2147		/***************************************************************************/
	777	ROM_START( atariste )
	778	ROM_REGION( 0x400000, REGION_CPU1, ROMREGION_16BIT )
	779	ROM_SYSTEM_BIOS( 0, "tos106", "TOS 1.06 (STE TOS, Revision 1)" )
	780	ROMX_LOAD( "tos106.img", 0xe00000, 0x030000, BAD_DUMP CRC(de62800c) SHA1(7ade7f61dd99cb4e8e71513e74205349a6719cbb), ROM_BIOS(1) )
	781	ROM_SYSTEM_BIOS( 1, "tos162", "TOS 1.62 (STE TOS, Revision 2)" )
	782	ROMX_LOAD( "tos162.img", 0xe00000, 0x040000, BAD_DUMP CRC(d1c6f2fa) SHA1(70db24a7c252392755849f78940a41bfaebace71), ROM_BIOS(2) )
	783	ROM_SYSTEM_BIOS( 2, "tos206", "TOS 2.06 (ST/STE TOS)" )
	784	ROMX_LOAD( "tos206.img", 0xe00000, 0x040000, BAD_DUMP CRC(08538e39) SHA1(2400ea95f547d6ea754a99d05d8530c03f8b28e3), ROM_BIOS(3) )
2148	785
2149		ROM_START( atarist )
2150		ROM_REGION(0x400000, REGION_CPU1,0)
2151		/* Up to 4 Meg Main RAM */
	786	ROM_REGION( 0x1000, REGION_CPU2, 0 )
	787	ROM_LOAD( "keyboard.u1", 0x0000, 0x1000, CRC(0296915d) SHA1(1102f20d38f333234041c13687d82528b7cde2e1) )
	788	ROM_END
2152	789
2153		ROM_REGION(0x40000, REGION_USER1,ROMREGION_16BIT) /* System rom */
2154		//   ROM_LOAD_WIDE( "tos_206.img", 0x00000, 0x30000,CRC(3f2f840f) SHA1(ee58768bdfc602c9b14942ce5481e97dd24e7c83))
	790	ROM_START( megaste )
	791	ROM_REGION( 0x400000, REGION_CPU1, ROMREGION_16BIT )
	792	ROM_SYSTEM_BIOS( 0, "tos202", "TOS 2.02 (Mega STE TOS)" )
	793	ROMX_LOAD( "tos202.img", 0xe00000, 0x030000, BAD_DUMP CRC() SHA1(), ROM_BIOS(1) )
	794	ROM_SYSTEM_BIOS( 1, "tos205", "TOS 2.05 (Mega STE TOS)" )
	795	ROMX_LOAD( "tos205.img", 0xe00000, 0x030000, BAD_DUMP CRC() SHA1(), ROM_BIOS(2) )
2155	796
2156		ROM_LOAD ( "tos_104.img", 0x00000, 0x30000,CRC(90f4fbff) SHA1(2487f330b0895e5d88d580d4ecb24061125e88ad))
2157		//   ROM_LOAD_WIDE( "tos102uk.rom", 0x00000, 0x30000,CRC(3b5cd0c5) SHA1(87900a40a890fdf03bd08be6c60cc645855cbce5))
2158		//   ROM_LOAD_WIDE( "tos100.img", 0x00000, 0x30000,CRC(d331af30) SHA1(7bcc2311d122f451bd03c9763ade5a119b2f90da))
2159
2160		ROM_REGION(0x40000, REGION_USER2,0) /* Cartridge rom */
2161		//ROM_LOAD_WIDE( "cart.exe", 0x00000, 0x30000,CRC(b997f9cb))
	797	ROM_REGION( 0x1000, REGION_CPU2, 0 )
	798	ROM_LOAD( "keyboard.u1", 0x0000, 0x1000, CRC(0296915d) SHA1(1102f20d38f333234041c13687d82528b7cde2e1) )
2162	799	ROM_END
2163	800
2164		/***************************************************************************/
2165		/* msa image handling */
2166		/* hacked together quickly from basicdsk. No error checking and can be heavily improved! */
2167		static void msa_seek_callback(int,int);
2168		static int msa_get_sectors_per_track(int,int);
2169		static void msa_get_id_callback(int, chrn_id *, int, int);
2170		static void msa_read_sector_data_into_buffer(int drive, int side, int index1, char *ptr, int length);
2171		static void msa_write_sector_data_from_buffer(int drive, int side, int index1, char *ptr, int length,int ddam);
	801	ROM_START( tt030 )
	802	ROM_REGION( 0x400000, REGION_CPU1, ROMREGION_16BIT )
	803	ROM_SYSTEM_BIOS( 0, "tos301", "TOS 3.01 (TT TOS)" )
	804	ROMX_LOAD( "tos301.img", 0xe00000, 0x080000, BAD_DUMP CRC() SHA1(), ROM_BIOS(1) )
	805	ROM_SYSTEM_BIOS( 1, "tos305", "TOS 3.05 (TT TOS)" )
	806	ROMX_LOAD( "tos305.img", 0xe00000, 0x080000, BAD_DUMP CRC() SHA1(), ROM_BIOS(2) )
	807	ROM_SYSTEM_BIOS( 2, "tos306", "TOS 3.06 (TT TOS)" )
	808	ROMX_LOAD( "tos306.img", 0xe00000, 0x080000, BAD_DUMP CRC() SHA1(), ROM_BIOS(3) )
2172	809
2173		floppy_interface msa_floppy_interface=
2174		{
2175		msa_seek_callback,
2176		msa_get_sectors_per_track,             /* done */
2177		msa_get_id_callback,                   /* done */
2178		msa_read_sector_data_into_buffer,      /* done */
2179		msa_write_sector_data_from_buffer, /* done */
2180		NULL
2181		};
	810	ROM_REGION( 0x1000, REGION_CPU2, 0 )
	811	ROM_LOAD( "keyboard.u1", 0x0000, 0x1000, CRC(0296915d) SHA1(1102f20d38f333234041c13687d82528b7cde2e1) )
	812	ROM_END
2182	813
2183		struct msa_image
2184		{
2185		int sectors_per_track;
2186		int current_track;
2187		};
	814	ROM_START( falcon )
	815	ROM_REGION( 0x400000, REGION_CPU1, ROMREGION_16BIT )
	816	ROM_SYSTEM_BIOS( 0, "tos400", "TOS 4.00" )
	817	ROMX_LOAD( "tos400.img", 0xe00000, 0x080000, BAD_DUMP CRC() SHA1(), ROM_BIOS(1) )
	818	ROM_SYSTEM_BIOS( 1, "tos401", "TOS 4.01" )
	819	ROMX_LOAD( "tos401.img", 0xe00000, 0x080000, BAD_DUMP CRC() SHA1(), ROM_BIOS(1) )
	820	ROM_SYSTEM_BIOS( 2, "tos402", "TOS 4.02" )
	821	ROMX_LOAD( "tos402.img", 0xe00000, 0x080000, BAD_DUMP CRC(63f82f23) SHA1(75de588f6bbc630fa9c814f738195da23b972cc6), ROM_BIOS(1) )
	822	ROM_SYSTEM_BIOS( 3, "tos404", "TOS 4.04" )
	823	ROMX_LOAD( "tos404.img", 0xe00000, 0x080000, BAD_DUMP CRC(028b561d) SHA1(27dcdb31b0951af99023b2fb8c370d8447ba6ebc), ROM_BIOS(1) )
2188	824
2189		/* data for each image loaded into memory */
2190		static unsigned char *msa_images_data[2] = {NULL, NULL};
	825	ROM_REGION( 0x1000, REGION_CPU2, 0 )
	826	ROM_LOAD( "keyboard.u1", 0x0000, 0x1000, CRC(0296915d) SHA1(1102f20d38f333234041c13687d82528b7cde2e1) )
	827	ROM_END
2191	828
2192		/* data to handle each image */
2193		static struct msa_image msa_images[2];
	829	/* System Configuration */
2194	830
2195		void    msa_get_id_callback(int drive, chrn_id *id, int id_index, int side)
	831	static DEVICE_LOAD( atarist_floppy )
2196	832	{
2197		struct msa_image *w = &msa_images[drive];
	833	int tracks = 80 , heads = 2, sectors = 16;
2198	834
2199		/* construct a id value */
2200		id->C = w->current_track;
2201		id->H = side;
2202		id->R = 1 + id_index;
2203		id->N = 2;
	835	if (image_has_been_created(image))
	836	return INIT_FAIL;
2204	837
2205		id->data_id = 1 + id_index;
2206		id->flags = 0;
2207		}
	838	if (device_load_basicdsk_floppy(image) == INIT_PASS)
	839	{
	840	/* drive, tracks, heads, sectors per track, sector length, first sector id, offset track zero, track skipping */
	841	basicdsk_set_geometry(image, tracks, heads, sectors, 512, 1, 0, FALSE);
	842	return INIT_PASS;
	843	}
2208	844
2209		int  msa_get_sectors_per_track(int drive, int side)
2210		{
2211		struct msa_image *w = &msa_images[drive];
2212
2213		/* return number of sectors per track */
2214		return w->sectors_per_track;
	845	return INIT_FAIL;
2215	846	}
2216	847
2217		void    msa_seek_callback(int drive, int physical_track)
	848	static void atarist_floppy_getinfo(const device_class *devclass, UINT32 state, union devinfo *info)
2218	849	{
2219		struct msa_image *image = &msa_images[drive];
	850	/* floppy */
	851	switch(state)
	852	{
	853	/* --- the following bits of info are returned as 64-bit signed integers --- */
	854	case DEVINFO_INT_COUNT:                     info->i = 2; break;
2220	855
2221		image->current_track = physical_track;
2222		}
	856	/* --- the following bits of info are returned as pointers to data or functions --- */
	857	case DEVINFO_PTR_LOAD:                     info->load = device_load_atarist_floppy; break;
2223	858
2224		unsigned char *msa_get_data_ptr(int drive, int track, int side, int sector_index)
2225		{
2226		struct msa_image *w = &msa_images[drive];
	859	/* --- the following bits of info are returned as NULL-terminated strings --- */
	860	case DEVINFO_STR_FILE_EXTENSIONS:            strcpy(info->s = device_temp_str(), "st"); break;
2227	861
2228		return (unsigned char *)(
2229		(unsigned long)msa_images_data[drive] + (unsigned long)
2230		(
2231		/* header */
2232		12 +
2233		/* skip to track start */
2234		(((track*2)+side)*(w->sectors_per_track*512+2)) +
2235		/* skip to sector */
2236		((sector_index-1)*512)
2237		));
	862	default:                              legacybasicdsk_device_getinfo(devclass, state, info); break;
	863	}
2238	864	}
2239	865
2240		void msa_write_sector_data_from_buffer(int drive, int side, int index1, char *ptr, int length, int ddam)
	866	static void atarist_printer_getinfo(const device_class *devclass, UINT32 state, union devinfo *info)
2241	867	{
2242		struct msa_image *w = &msa_images[drive];
2243		unsigned char *pDataPtr;
	868	/* printer */
	869	switch(state)
	870	{
	871	/* --- the following bits of info are returned as 64-bit signed integers --- */
	872	case DEVINFO_INT_COUNT:                     info->i = 1; break;
2244	873
2245		pDataPtr = msa_get_data_ptr(drive, w->current_track, side, index1);
2246
2247		memcpy(pDataPtr, ptr, length);
	874	default:                              printer_device_getinfo(devclass, state, info); break;
	875	}
2248	876	}
2249	877
2250		void msa_read_sector_data_into_buffer(int drive, int side, int index1, char *ptr, int length)
	878	static DEVICE_LOAD( atarist_serial )
2251	879	{
2252		struct msa_image *w = &msa_images[drive];
2253		unsigned char *pDataPtr;
2254
2255		pDataPtr = msa_get_data_ptr(drive, w->current_track, side, index1);
2256
2257		memcpy(ptr, pDataPtr, length);
2258		}
2259
2260		int atarist_msa_floppy_init(mess_image *img, mame_file *file, int open_mode)
2261		{
2262		/* load whole file into memory */
2263		if (atarist_load(file, &msa_images_data[id])!=NULL)
	880	/* filename specified */
	881	if (serial_device_load(image)==INIT_PASS)
2264	882	{
2265		if (msa_images_data[id][0]!=0xe && msa_images_data[id][1]!=0xf)
2266		logerror("MSA Warning:  Header doesn't match\n");
	883	/* setup transmit parameters */
	884	serial_device_setup(image, 9600, 8, 1, SERIAL_PARITY_NONE);
2267	885
2268		msa_images[id].sectors_per_track = msa_images_data[id][3];
	886	serial_device_set_protocol(image, SERIAL_PROTOCOL_NONE);
2269	887
2270		/* set type */
2271		atari_st_image_type[id] = ATARI_ST_IMAGE_TYPE_MSA;
	888	/* and start transmit */
	889	serial_device_set_transmit_state(image, 1);
2272	890
2273		/* tell floppy drive code to use these functions for accessing disk image in this drive */
2274		floppy_drive_set_disk_image_interface(img,&msa_floppy_interface);
2275
2276	891	return INIT_PASS;
2277	892	}
2278	893
2279	894	return INIT_FAIL;
2280	895	}
2281	896
2282		void atarist_msa_floppy_exit(int id)
	897	static void atarist_serial_getinfo(const device_class *devclass, UINT32 state, union devinfo *info)
2283	898	{
2284		if (msa_images_data[id]!=NULL)
	899	/* serial */
	900	switch(state)
2285	901	{
2286		free(msa_images_data[id]);
	902	/* --- the following bits of info are returned as 64-bit signed integers --- */
	903	case DEVINFO_INT_TYPE:                     info->i = IO_SERIAL; break;
	904	case DEVINFO_INT_COUNT:                     info->i = 1; break;
	905
	906	/* --- the following bits of info are returned as pointers to data or functions --- */
	907	case DEVINFO_PTR_INIT:                     info->init = serial_device_init; break;
	908	case DEVINFO_PTR_LOAD:                     info->load = device_load_atarist_serial; break;
	909	case DEVINFO_PTR_UNLOAD:                  info->unload = serial_device_unload; break;
	910
	911	/* --- the following bits of info are returned as NULL-terminated strings --- */
	912	case DEVINFO_STR_FILE_EXTENSIONS:            strcpy(info->s = device_temp_str(), "txt"); break;
2287	913	}
2288		msa_images_data[id] = NULL;
2289	914	}
2290	915
2291		/***************************************************************************/
2292
2293		/* init for msa and raw image types */
2294		int atarist_floppy_init(int id)
	916	static DEVICE_LOAD( atarist_cart )
2295	917	{
2296		const char *name;
	918	UINT8 *ptr = ((UINT8 *)memory_region(REGION_CPU1)) + 0xfa0000;
	919	int   filesize = image_length(image);
2297	920
2298		name = image_filename(IO_FLOPPY,id);
2299		if (!name)
2300		return INIT_PASS; /* Emulation can continue even with no floppy */
2301
2302		/* msa file? */
2303		if (!strcmp(".msa",name+strlen(name)-4))
	921	if (filesize <= 128 * 1024)
2304	922	{
2305		/* yes - setup msa access */
2306		return atarist_msa_floppy_init(id);
	923	if (image_fread(image, ptr, filesize) == filesize)
	924	{
	925	return INIT_PASS;
	926	}
2307	927	}
2308	928
2309		/* no, assume basic (e.g. ".st"), setup basic access */
2310		return atarist_basic_floppy_init(id);
	929	return INIT_FAIL;
2311	930	}
2312	931
2313		/* exit for msa and raw image types */
2314		void atarist_floppy_exit(int id)
	932	static void atarist_cartslot_getinfo( const device_class *devclass, UINT32 state, union devinfo *info )
2315	933	{
2316		switch (atari_st_image_type[id])
	934	switch( state )
2317	935	{
2318		case ATARI_ST_IMAGE_TYPE_RAW:
2319		{
2320		}
	936	case DEVINFO_INT_COUNT:
	937	info->i = 1;
2321	938	break;
2322
2323		case ATARI_ST_IMAGE_TYPE_MSA:
2324		{
2325		atarist_msa_floppy_exit(id);
2326		}
	939	case DEVINFO_PTR_LOAD:
	940	info->load = device_load_atarist_cart;
2327	941	break;
2328
2329		default:
2330		break;
	942	case DEVINFO_STR_FILE_EXTENSIONS:
	943	strcpy(info->s = device_temp_str(), "stc");
	944	break;
	945	default:
	946	cartslot_device_getinfo( devclass, state, info );
	947	break;
2331	948	}
2332	949	}
2333	950
2334		/***************************************************************************/
	951	SYSTEM_CONFIG_START( atarist )
	952	CONFIG_RAM_DEFAULT(1024 * 1024) // 1040ST
	953	CONFIG_RAM        ( 512 * 1024) //  520ST
	954	CONFIG_RAM        ( 256 * 1024) //  260ST
	955	CONFIG_DEVICE(atarist_floppy_getinfo)
	956	CONFIG_DEVICE(atarist_printer_getinfo)
	957	CONFIG_DEVICE(atarist_serial_getinfo)
	958	CONFIG_DEVICE(atarist_cartslot_getinfo)
	959	SYSTEM_CONFIG_END
2335	960
2336		SYSTEM_CONFIG_START(atarist)
2337		CONFIG_DEVICE_LEGACY(IO_FLOPPY, 1, "st,msa", DEVICE_LOAD_RESETS_NONE, OSD_FOPEN_RW_CREATE_OR_READ,
2338		atarist_floppy_init, atarist_floppy_exit, floppy_status)
	961	SYSTEM_CONFIG_START( megast )
	962	CONFIG_RAM_DEFAULT(4096 * 1024) // Mega ST 4
	963	CONFIG_RAM        (2048 * 1024) // Mega ST 2
	964	CONFIG_RAM        (1024 * 1024) // Mega ST 1
	965	CONFIG_DEVICE(atarist_floppy_getinfo)
	966	CONFIG_DEVICE(atarist_printer_getinfo)
	967	CONFIG_DEVICE(atarist_serial_getinfo)
	968	CONFIG_DEVICE(atarist_cartslot_getinfo)
2339	969	SYSTEM_CONFIG_END
2340	970
2341		/*
2342		References:
	971	/* System Drivers */
2343	972
2344		http://www.atari-history.com/computers/16bits/a1632bit.html
2345		http://home.wanadoo.nl/jarod/museum/megaste.htm
2346
	973	/*     YEAR  NAME    PARENT    COMPAT   MACHINE   INPUT     INIT   CONFIG   COMPANY    FULLNAME */
	974	COMP( 1985, atarist,  0,        0,      atarist,  atarist,  0,     atarist,  "Atari", "ST", GAME_NOT_WORKING )
	975	COMP( 1987, megast,   atarist,  0,      megast,   atarist,  0,     megast,   "Atari", "Mega ST", GAME_NOT_WORKING )
	976	/*
	977	COMP( 1989, atariste, 0,      0,      atariste, atarist,  0,     atariste, "Atari", "STE", GAME_NOT_WORKING )
	978	COMP( 1991, megaste,  atariste, 0,      megaste,  atarist,  0,     megaste,  "Atari", "Mega STE", GAME_NOT_WORKING )
	979	COMP( 1989, stacy,    0,        0,      stacy,    stacy,    0,     stacy,    "Atari", "STacy", GAME_NOT_WORKING )
	980	COMP( 1992, stbook,   0,        0,      stbook,   stbook,   0,     stbook,    "Atari", "ST Book", GAME_NOT_WORKING )
	981	COMP( 1990, tt030,    0,        0,      tt030,    tt030,    0,     tt030,    "Atari", "TT030", GAME_NOT_WORKING )
	982	COMP( 1992, falcon,   0,        0,      falcon,   falcon,   0,     falcon,    "Atari", "Falcon030", GAME_NOT_WORKING )
2347	983	*/
2348
2349		/* Atari 1040 ST - 1 Meg, OS on ROM, internal floppy drive */
2350		/* 1990: Atari 1040 STE - */
2351		/* Mega ST - Seperate keyboard, */
2352
2353		/* 1986 : Atari EST - Proposed 68020, 68881 FPU, 4 Meg ram, never released! */
2354
2355		/* 1985 : Atari 130 ST - Prototype seen at Winter Las Vegas Consumer Electronics Show, 128k RAM */
2356		/* 1985 : Atari 260 ST - 256k RAM version of above */
2357		/* 1985 : Atari 520 ST - 512k RAM version of above */
2358
2359		/* 1987 : Atari 520 STf (1st version) - 512k RAM, OS on disk (only 32k boot rom onboard), external floppy drive (Single sided) */
2360		/* 1987 : Atari 520 STf (2nd version) - 512k RAM, OS in ROM (Tos 1.02), external floppy drive (Single or double sided) */
2361
2362		/* 1987 : Mega STf - Seperate keyboard, blitter, 1/2/4 Meg ram options */
2363		/* 1989 : Mega STe - Seperate keyboard, 16MHz 68000 (switchable to 8MHz), memory cache, VME bus, TOS 2.05 & 2.06 */
2364
2365		/*     YEAR  NAME      PARENT    COMPAT   MACHINE   INPUT     INIT   CONFIG   COMPANY    FULLNAME */
2366		COMP ( 1985, atarist,  0,        0,      atarist,  atarist,  0,     atarist, "atarist", "atarist" , 0)

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