src/osd/sdl/osd_cpu.h
| r785 | r786 | |
| 118 | 118 | } |
| 119 | 119 | #define fixed_mul_shift _fixed_mul_shift |
| 120 | 120 | |
| 121 | | #elif defined(__ppc__) || defined(__ppc64__) |
| 121 | #elif defined(__ppc__) || defined(__ppc64__) || defined(__PPC__) || defined(__PPC64__) |
| 122 | 122 | |
| 123 | 123 | INLINE UINT32 _count_leading_zeros(UINT32 value) |
| 124 | 124 | { |
| 125 | 125 | UINT32 result; |
| 126 | 126 | |
| 127 | 127 | __asm__ ( |
| 128 | | "cntlzw %0,%1 @" |
| 128 | " cntlzw %0,%1 \n" |
| 129 | 129 | : "=r" (result) /* result can be in any register */ |
| 130 | 130 | : "r" (value) /* 'value' can be in any register */ |
| 131 | 131 | ); |
| r785 | r786 | |
| 139 | 139 | UINT32 result; |
| 140 | 140 | |
| 141 | 141 | __asm__ ( |
| 142 | | "not %0,%1 @" |
| 143 | | "cntlzw %0,%0 @" |
| 142 | " not %0,%1 \n" |
| 143 | " cntlzw %0,%0 \n" |
| 144 | 144 | : "=r" (result) /* result can be in any register */ |
| 145 | 145 | : "r" (value) /* 'value' can be in any register */ |
| 146 | 146 | ); |
| r785 | r786 | |
| 149 | 149 | } |
| 150 | 150 | #define count_leading_ones _count_leading_ones |
| 151 | 151 | |
| 152 | | #ifdef __ppc64__ |
| 152 | #if defined(__ppc64__) || defined(__PPC64__) |
| 153 | 153 | |
| 154 | 154 | INLINE INT32 _fixed_mul_shift(INT32 val1, INT32 val2, UINT8 shift) |
| 155 | 155 | { |
| 156 | 156 | INT32 result; |
| 157 | 157 | |
| 158 | 158 | __asm__ ( |
| 159 | | "mulld %0,%1,%2 @" |
| 160 | | "srd %0,%0,%3 @" |
| 159 | " mulld %0,%1,%2 \n" |
| 160 | " srd %0,%0,%3 \n" |
| 161 | 161 | : "=&r" (result) /* result can go in any register */ |
| 162 | 162 | : "%r" (val1) /* any register, can swap with val2 */ |
| 163 | 163 | "r" (val2) /* any register */ |
| r785 | r786 | |
| 175 | 175 | INT32 result; |
| 176 | 176 | |
| 177 | 177 | __asm__ ( |
| 178 | | "mullw %0,%2,%3 @" |
| 179 | | "mulhw %2,%2,%3 @" |
| 180 | | "srw %0,%0,%1 @" |
| 181 | | "subfic %1,%1,0x20 @" |
| 182 | | "slw %2,%2,%1 @" |
| 183 | | "or %0,%0,%2 @" |
| 178 | " mullw %0,%2,%3 \n" |
| 179 | " mulhw %2,%2,%3 \n" |
| 180 | " srw %0,%0,%1 \n" |
| 181 | " subfic %1,%1,0x20 \n" |
| 182 | " slw %2,%2,%1 \n" |
| 183 | " or %0,%0,%2 \n" |
| 184 | 184 | : "=&r" (result), |
| 185 | 185 | "+r" (shift), |
| 186 | 186 | "+r" (val1) |
src/osd/sdl/sdlwork.c
| r785 | r786 | |
| 133 | 133 | return ret; |
| 134 | 134 | } |
| 135 | 135 | |
| 136 | | #elif defined(__ppc64__) |
| 136 | #elif defined(__ppc64__) || defined(__PPC64__) |
| 137 | 137 | |
| 138 | 138 | INLINE void * compare_exchange_pointer(void * volatile *ptr, void *exchange, void *compare) |
| 139 | 139 | { |
| 140 | 140 | register void *ret; |
| 141 | 141 | __asm__ __volatile__ ( |
| 142 | | "1: sync @" |
| 143 | | " ldarx %[ret], 0, %[ptr] @" |
| 144 | | " cmpd %[compare], %[ret] @" |
| 145 | | " bne 2f @" |
| 146 | | " stdcx. %[exchange], 0, %[ptr] @" |
| 147 | | " bne-- 1b @" |
| 148 | | " sync @" |
| 142 | "1: sync \n" |
| 143 | " ldarx %[ret], 0, %[ptr] \n" |
| 144 | " cmpd %[compare], %[ret] \n" |
| 145 | " bne 2f \n" |
| 146 | " stdcx. %[exchange], 0, %[ptr] \n" |
| 147 | " bne-- 1b \n" |
| 148 | " sync \n" |
| 149 | 149 | "2: " |
| 150 | 150 | : [ret] "=&r" (ret) |
| 151 | 151 | : [ptr] "r" (ptr) |
| r785 | r786 | |
| 160 | 160 | { |
| 161 | 161 | register long ret; |
| 162 | 162 | __asm__ __volatile__ ( |
| 163 | | "1: sync @" |
| 164 | | " ldarx %[ret], 0, %[addend] @" |
| 165 | | " addi %[ret], %[ret], 1 @" |
| 166 | | " stdcx. %[ret], 0, %[addend] @" |
| 167 | | " bne-- 1b @" |
| 168 | | " sync @" |
| 163 | "1: sync \n" |
| 164 | " ldarx %[ret], 0, %[addend] \n" |
| 165 | " addi %[ret], %[ret], 1 \n" |
| 166 | " stdcx. %[ret], 0, %[addend] \n" |
| 167 | " bne-- 1b \n" |
| 168 | " sync \n" |
| 169 | 169 | : [ret] "=&b" (ret) |
| 170 | 170 | : [addend] "r" (addend) |
| 171 | 171 | : "%cc" |
| r785 | r786 | |
| 177 | 177 | { |
| 178 | 178 | register long ret; |
| 179 | 179 | __asm__ __volatile__ ( |
| 180 | | "1: sync @" |
| 181 | | " ldarx %[ret], 0, %[addend] @" |
| 182 | | " addi %[ret], %[ret], -1 @" |
| 183 | | " stdcx. %[ret], 0, %[addend] @" |
| 184 | | " bne-- 1b @" |
| 185 | | " sync @" |
| 180 | "1: sync \n" |
| 181 | " ldarx %[ret], 0, %[addend] \n" |
| 182 | " addi %[ret], %[ret], -1 \n" |
| 183 | " stdcx. %[ret], 0, %[addend] \n" |
| 184 | " bne-- 1b \n" |
| 185 | " sync \n" |
| 186 | 186 | : [ret] "=&b" (ret) |
| 187 | 187 | : [addend] "r" (addend) |
| 188 | 188 | : "%cc" |
| r785 | r786 | |
| 190 | 190 | return ret; |
| 191 | 191 | } |
| 192 | 192 | |
| 193 | | #elif defined(__ppc__) |
| 193 | #elif defined(__ppc__) || defined(__PPC__) |
| 194 | 194 | |
| 195 | 195 | INLINE void * compare_exchange_pointer(void * volatile *ptr, void *exchange, void *compare) |
| 196 | 196 | { |
| 197 | 197 | register void *ret; |
| 198 | 198 | __asm__ __volatile__ ( |
| 199 | | "1: sync @" |
| 200 | | " lwarx %[ret], 0, %[ptr] @" |
| 201 | | " cmpw %[compare], %[ret] @" |
| 202 | | " bne 2f @" |
| 203 | | " stwcx. %[exchange], 0, %[ptr] @" |
| 204 | | " bne- 1b @" |
| 205 | | " sync @" |
| 199 | "1: sync \n" |
| 200 | " lwarx %[ret], 0, %[ptr] \n" |
| 201 | " cmpw %[compare], %[ret] \n" |
| 202 | " bne 2f \n" |
| 203 | " stwcx. %[exchange], 0, %[ptr] \n" |
| 204 | " bne- 1b \n" |
| 205 | " sync \n" |
| 206 | 206 | "2: " |
| 207 | 207 | : [ret] "=&r" (ret) |
| 208 | 208 | : [ptr] "r" (ptr) |
| r785 | r786 | |
| 217 | 217 | { |
| 218 | 218 | register long ret; |
| 219 | 219 | __asm__ __volatile__ ( |
| 220 | | "1: sync @" |
| 221 | | " lwarx %[ret], 0, %[addend] @" |
| 222 | | " addi %[ret], %[ret], 1 @" |
| 223 | | " stwcx. %[ret], 0, %[addend] @" |
| 224 | | " bne- 1b @" |
| 225 | | " sync @" |
| 220 | "1: sync \n" |
| 221 | " lwarx %[ret], 0, %[addend] \n" |
| 222 | " addi %[ret], %[ret], 1 \n" |
| 223 | " stwcx. %[ret], 0, %[addend] \n" |
| 224 | " bne- 1b \n" |
| 225 | " sync \n" |
| 226 | 226 | : [ret] "=&b" (ret) |
| 227 | 227 | : [addend] "r" (addend) |
| 228 | 228 | : "%cc" |
| r785 | r786 | |
| 234 | 234 | { |
| 235 | 235 | register long ret; |
| 236 | 236 | __asm__ __volatile__ ( |
| 237 | | "1: sync @" |
| 238 | | " lwarx %[ret], 0, %[addend] @" |
| 239 | | " addi %[ret], %[ret], -1 @" |
| 240 | | " stwcx. %[ret], 0, %[addend] @" |
| 241 | | " bne- 1b @" |
| 242 | | " sync @" |
| 237 | "1: sync \n" |
| 238 | " lwarx %[ret], 0, %[addend] \n" |
| 239 | " addi %[ret], %[ret], -1 \n" |
| 240 | " stwcx. %[ret], 0, %[addend] \n" |
| 241 | " bne- 1b \n" |
| 242 | " sync \n" |
| 243 | 243 | : [ret] "=&b" (ret) |
| 244 | 244 | : [addend] "r" (addend) |
| 245 | 245 | : "%cc" |