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| r7776 Saturday 10th April, 2010 at 18:03:50 UTC by Wilbert Pol |
|---|
| Fixed disassembly of extended sm8500 instructions (1A, 1B, 4F). Fixed possible issue when checking for irqs in the lr35902 core. |
| [src/emu/cpu/lr35902] | lr35902.c |
| [src/emu/cpu/sm8500] | sm8500d.c |
| r7775 | r7776 | |
|---|---|---|
| 269 | 269 | cpustate->w.enable &= ~HALTED; |
| 270 | 270 | cpustate->w.PC++; |
| 271 | 271 | if ( cpustate->w.features & LR35902_FEATURE_HALT_BUG ) { |
| 272 | if ( ! cpustate->w.enable & IME ) { | |
| 272 | if ( ! ( cpustate->w.enable & IME ) ) { | |
| 273 | 273 | /* Old cpu core (dmg/mgb/sgb) */ |
| 274 | 274 | cpustate->w.doHALTbug = 1; |
| 275 | 275 | } |
| r7775 | r7776 | |
|---|---|---|
| 188 | 188 | |
| 189 | 189 | if ( instr->arguments ) |
| 190 | 190 | { |
| 191 | if ( instr->arguments != AM_1A | |
| 191 | if ( instr->arguments != AM_1A && instr->arguments != AM_1B && instr->arguments != AM_4F ) { | |
| 192 | 192 | dst += sprintf( dst, "%-4s ", s_mnemonic[ instr->mnemonic ] ); |
| 193 | 193 | } |
| 194 | 194 | switch( instr->arguments ) { |
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