src/mess/drivers/mz2500.c
| r7649 | r7650 | |
|---|
| 4 | 4 | |
| 5 | 5 | 26/03/2010 Skeleton driver. |
| 6 | 6 | |
| 7 | memory map: |
| 8 | |
| 9 | 0x00000-0x3ffff Work RAM |
| 10 | 0x40000-0x5ffff CG RAM (bitswapped!) |
| 11 | 0x60000-0x67fff NOP? |
| 12 | 0x68000-0x6ffff IPL ROM |
| 13 | 0x70000-0x71fff TVRAM |
| 14 | 0x72000-0x73fff PCG / Kanji RAM |
| 15 | 0x74000-0x75fff Dictionary ROM (banked) |
| 16 | 0x76000-0x77fff NOP |
| 17 | 0x78000-0x7ffff Phone ROM |
| 18 | |
| 19 | vblank irq is rst $28? |
| 20 | |
| 7 | 21 | ****************************************************************************/ |
| 8 | 22 | |
| 9 | 23 | #include "emu.h" |
| 10 | 24 | #include "cpu/z80/z80.h" |
| 11 | 25 | |
| 26 | static UINT8 bank_val[8],bank_addr; |
| 27 | |
| 12 | 28 | static VIDEO_START( mz2500 ) |
| 13 | 29 | { |
| 14 | 30 | } |
| r7649 | r7650 | |
|---|
| 18 | 34 | return 0; |
| 19 | 35 | } |
| 20 | 36 | |
| 37 | static READ8_HANDLER( mz2500_bank_addr_r ) |
| 38 | { |
| 39 | return bank_addr; |
| 40 | } |
| 41 | |
| 42 | static WRITE8_HANDLER( mz2500_bank_addr_w ) |
| 43 | { |
| 44 | bank_addr = data & 7; |
| 45 | } |
| 46 | |
| 47 | static READ8_HANDLER( mz2500_bank_data_r ) |
| 48 | { |
| 49 | static UINT8 res; |
| 50 | |
| 51 | res = bank_val[bank_addr]; |
| 52 | |
| 53 | bank_addr++; |
| 54 | bank_addr&=7; |
| 55 | |
| 56 | return res; |
| 57 | } |
| 58 | |
| 59 | static WRITE8_HANDLER( mz2500_bank_data_w ) |
| 60 | { |
| 61 | UINT8 *ROM = memory_region(space->machine, "maincpu"); |
| 62 | static const char *const bank_name[] = { "bank0", "bank1", "bank2", "bank3", "bank4", "bank5", "bank6", "bank7" }; |
| 63 | |
| 64 | bank_val[bank_addr] = data & 0x3f; |
| 65 | |
| 66 | printf("%s %02x\n",bank_name[bank_addr],bank_val[bank_addr]*2); |
| 67 | |
| 68 | memory_set_bankptr(space->machine, bank_name[bank_addr], &ROM[bank_val[bank_addr]*0x2000]); |
| 69 | |
| 70 | bank_addr++; |
| 71 | bank_addr&=7; |
| 72 | } |
| 73 | |
| 74 | |
| 21 | 75 | static ADDRESS_MAP_START(mz2500_map, ADDRESS_SPACE_PROGRAM, 8) |
| 22 | | AM_RANGE(0x0000, 0x7fff) AM_RAM AM_REGION("maincpu",0) //banked! |
| 23 | | AM_RANGE(0x8000, 0xffff) AM_RAM AM_REGION("maincpu",0) |
| 76 | AM_RANGE(0x0000, 0x1fff) AM_RAMBANK("bank0") |
| 77 | AM_RANGE(0x2000, 0x3fff) AM_RAMBANK("bank1") |
| 78 | AM_RANGE(0x4000, 0x5fff) AM_RAMBANK("bank2") |
| 79 | AM_RANGE(0x6000, 0x7fff) AM_RAMBANK("bank3") |
| 80 | AM_RANGE(0x8000, 0x9fff) AM_RAMBANK("bank4") |
| 81 | AM_RANGE(0xa000, 0xbfff) AM_RAMBANK("bank5") |
| 82 | AM_RANGE(0xc000, 0xdfff) AM_RAMBANK("bank6") |
| 83 | AM_RANGE(0xe000, 0xffff) AM_RAMBANK("bank7") |
| 24 | 84 | ADDRESS_MAP_END |
| 25 | 85 | |
| 26 | | static ADDRESS_MAP_START(mz2500_io, ADDRESS_SPACE_PROGRAM, 8) |
| 86 | static ADDRESS_MAP_START(mz2500_io, ADDRESS_SPACE_I |
| 27 | 87 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 28 | 88 | // AM_RANGE(0x60, 0x63) AM_WRITE(w3100a_w) |
| 29 | 89 | // AM_RANGE(0x63, 0x63) AM_READ(w3100a_r) |
| r7649 | r7650 | |
|---|
| 35 | 95 | // AM_RANGE(0xad, 0xad) AM_READ(emm_r) |
| 36 | 96 | // AM_RANGE(0xae, 0xae) AM_WRITE(crtc_w) |
| 37 | 97 | // AM_RANGE(0xb0, 0xb3) AM_READWRITE(sio_r,sio_w) |
| 38 | | // AM_RANGE(0xb4, 0xb5) AM_READWRITE(memory_r,memory_w) |
| 98 | AM_RANGE(0xb4, 0xb4) AM_READWRITE(mz2500_bank_addr_r,mz2500_bank_addr_w) |
| 99 | AM_RANGE(0xb5, 0xb5) AM_READWRITE(mz2500_bank_data_r,mz2500_bank_data_w) |
| 39 | 100 | // AM_RANGE(0xb8, 0xb9) AM_READWRITE(kanji_r,kanji_w) |
| 40 | 101 | // AM_RANGE(0xbc, 0xbd) AM_READWRITE(crtc_r,crtc_w) |
| 41 | 102 | // AM_RANGE(0xc6, 0xc7) AM_WRITE(irq_w) |
| r7649 | r7650 | |
|---|
| 61 | 122 | |
| 62 | 123 | static MACHINE_RESET(mz2500) |
| 63 | 124 | { |
| 125 | UINT8 *ROM = memory_region(machine, "maincpu"); |
| 126 | |
| 127 | bank_val[0] = 0x00; |
| 128 | bank_val[1] = 0x01; |
| 129 | bank_val[2] = 0x02; |
| 130 | bank_val[3] = 0x03; |
| 131 | bank_val[4] = 0x04; |
| 132 | bank_val[5] = 0x05; |
| 133 | bank_val[6] = 0x06; |
| 134 | bank_val[7] = 0x07; |
| 135 | |
| 136 | memory_set_bankptr(machine, "bank0", &ROM[bank_val[0]*0x2000]); |
| 137 | memory_set_bankptr(machine, "bank1", &ROM[bank_val[1]*0x2000]); |
| 138 | memory_set_bankptr(machine, "bank2", &ROM[bank_val[2]*0x2000]); |
| 139 | memory_set_bankptr(machine, "bank3", &ROM[bank_val[3]*0x2000]); |
| 140 | memory_set_bankptr(machine, "bank4", &ROM[bank_val[4]*0x2000]); |
| 141 | memory_set_bankptr(machine, "bank5", &ROM[bank_val[5]*0x2000]); |
| 142 | memory_set_bankptr(machine, "bank6", &ROM[bank_val[6]*0x2000]); |
| 143 | memory_set_bankptr(machine, "bank7", &ROM[bank_val[7]*0x2000]); |
| 64 | 144 | } |
| 65 | 145 | |
| 66 | 146 | static const gfx_layout mz2500_cg_layout = |
| r7649 | r7650 | |
|---|
| 128 | 208 | |
| 129 | 209 | /* ROM definition */ |
| 130 | 210 | ROM_START( mz2500 ) |
| 131 | | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 132 | | ROM_LOAD( "ipl.rom", 0x0000, 0x8000, CRC(7a659f20) SHA1(ccb3cfdf461feea9db8d8d3a8815f7e345d274f7) ) |
| 211 | ROM_REGION( 0x80000, "maincpu", ROMREGION_ERASE00 ) |
| 212 | ROM_LOAD( "ipl.rom", 0x00000, 0x8000, CRC(7a659f20) SHA1(ccb3cfdf461feea9db8d8d3a8815f7e345d274f7) ) |
| 213 | ROM_RELOAD( 0x68000, 0x8000 ) |
| 133 | 214 | |
| 134 | 215 | ROM_REGION( 0x1000, "cgrom", 0 ) |
| 135 | 216 | ROM_LOAD( "cg.rom", 0x0000, 0x0800, CRC(a082326f) SHA1(dfa1a797b2159838d078650801c7291fa746ad81) ) |