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r7595 Wednesday 17th March, 2010 at 12:41:15 UTC by Curt Coder
[MTX] Cleaned up driver and added cassette device, loading does not work yet.

[src/mess/drivers]	mtx.c
[src/mess/includes]	mtx.h
[src/mess/machine]	mtx.c

src/mess/includes/mtx.h

r7594	r7595
4	4
5	5	*************************************************************************/
6	6
7		#ifndef __MTX_H__
8		#define __MTX_H__
	7	#ifndef __MTX__
	8	#define __MTX__
9	9
10	10	#include "devices/snapquik.h"
11	11
	12	#define Z80_TAG         "z80"
	13	#define Z80CTC_TAG      "z80ctc"
	14	#define Z80DART_TAG      "z80dart"
	15	#define FD1793_TAG      "fd1793" // SDX
	16	#define FD1791_TAG      "fd1791" // FDX
	17	#define SN76489A_TAG   "sn76489a"
	18	#define MC6845_TAG      "mc6845"
	19	#define SCREEN_TAG      "screen"
	20	#define CASSETTE_TAG   "cassette"
	21	#define CENTRONICS_TAG   "centronics"
12	22
13		#define MTX_SYSTEM_CLOCK   XTAL_4MHz
	23	class mtx_state
	24	{
	25	public:
	26	static void *alloc(running_machine &machine) { return auto_alloc_clear(&machine, mtx_state(machine)); }
14	27
	28	mtx_state(running_machine &machine) { }
15	29
16		/*----------- defined in drivers/mtx.c -----------*/
	30	/* keyboard state */
	31	UINT8 key_sense;
17	32
18		extern UINT8 *mtx_ram;
	33	/* video state */
	34	UINT8 *video_ram;
	35	UINT8 *attr_ram;
19	36
	37	/* sound state */
	38	UINT8 sound_latch;
20	39
	40	/* devices */
	41	running_device *z80ctc;
	42	running_device *z80dart;
	43	running_device *cassette;
	44	running_device *centronics;
	45
	46	/* timers */
	47	running_device *cassette_timer;
	48	};
	49
21	50	/*----------- defined in machine/mtx.c -----------*/
22	51
23		DRIVER_INIT( mtx512 );
24		DRIVER_INIT( rs128 );
	52	MACHINE_START( mtx512 );
	53	MACHINE_RESET( mtx512 );
25	54	INTERRUPT_GEN( mtx_interrupt );
26	55	SNAPSHOT_LOAD( mtx );
27	56
28	57	WRITE8_HANDLER( mtx_bankswitch_w );
29	58
	59	/* Sound */
	60	READ8_DEVICE_HANDLER( mtx_sound_strobe_r );
	61	WRITE8_HANDLER( mtx_sound_latch_w );
	62
30	63	/* Cassette */
31		READ8_HANDLER( mtx_cst_r );
32		WRITE8_HANDLER( mtx_cst_w );
	64	WRITE8_DEVICE_HANDLER( mtx_cst_w );
33	65
34	66	/* Printer */
35	67	READ8_DEVICE_HANDLER( mtx_strobe_r );
r7594	r7595
40	72	READ8_HANDLER( mtx_key_lo_r );
41	73	READ8_HANDLER( mtx_key_hi_r );
42	74
	75	/* HRX */
	76	WRITE8_HANDLER( hrx_address_w );
	77	READ8_HANDLER( hrx_data_r );
	78	WRITE8_HANDLER( hrx_data_w );
	79	READ8_HANDLER( hrx_attr_r );
	80	WRITE8_HANDLER( hrx_attr_w );
43	81
44	82	#endif /* __MTX_H__ */

src/mess/machine/mtx.c

r7594	r7595
6	6
7	7	**************************************************************************/
8	8
9
10	9	#include "emu.h"
11		#include "utils.h"
12	10	#include "includes/mtx.h"
13	11	#include "cpu/z80/z80.h"
	12	#include "devices/cassette.h"
	13	#include "devices/messram.h"
	14	#include "devices/snapquik.h"
	15	#include "machine/ctronics.h"
14	16	#include "machine/z80ctc.h"
15	17	#include "machine/z80dart.h"
16	18	#include "video/tms9928a.h"
17		#include "machine/ctronics.h"
18		#include "devices/snapquik.h"
19		#include "devices/messram.h"
	19	#include "sound/sn76496.h"
20	20
	21	/***************************************************************************
	22	READ/WRITE HANDLERS
	23	***************************************************************************/
21	24
22		/*************************************
23		*
24		*  Global variables
25		*
26		*************************************/
	25	/*-------------------------------------------------
	26	mtx_strobe_r - centronics strobe
	27	-------------------------------------------------*/
27	28
28		static UINT8 key_sense;
	29	READ8_DEVICE_HANDLER( mtx_strobe_r )
	30	{
	31	/* set STROBE low */
	32	centronics_strobe_w(device, FALSE);
29	33
	34	return 0xff;
	35	}
30	36
	37	/*-------------------------------------------------
	38	mtx_bankswitch_w - bankswitch
	39	-------------------------------------------------*/
31	40
32		/*************************************
33		*
34		*  TMS9929A video chip
35		*
36		*************************************/
	41	/*
	42	There are two memory models on the MTX, the standard one and a
	43	CBM mode. In standard mode, the memory map is defined as:
37	44
38		static void mtx_tms9929a_interrupt(running_machine *machine, int data)
39		{
40		z80ctc_trg0_w(devtag_get_device(machine, "z80ctc"), data ? 0 : 1);
41		}
	45	0x0000 - 0x1fff  OSROM
	46	0x2000 - 0x3fff  Paged ROM
	47	0x4000 - 0x7fff  Paged RAM
	48	0x8000 - 0xbfff  Paged RAM
	49	0xc000 - 0xffff  RAM
42	50
43		static const TMS9928a_interface tms9928a_interface =
44		{
45		TMS9929A,
46		0x4000,
47		0, 0,
48		mtx_tms9929a_interrupt
49		};
	51	Banks are selected by output port 0. Bits 0-3 define the RAM page
	52	and bits 4-6 the ROM page.
50	53
51		INTERRUPT_GEN( mtx_interrupt )
	54	CBM mode is selected by bit 7 of output port 0. ROM is replaced
	55	by RAM in this mode.
	56	*/
	57
	58	static void bankswitch(running_machine *machine, UINT8 data)
52	59	{
53		TMS9928A_interrupt(device->machine);
54		}
	60	/*
55	61
	62	bit      description
56	63
	64	0      P0
	65	1      P1
	66	2      P2
	67	3      P3
	68	4      R0
	69	5      R1
	70	6      R2
	71	7      RELCPMH
57	72
58		/*************************************
59		*
60		*  Snapshots
61		*
62		*************************************/
	73	*/
63	74
64		SNAPSHOT_LOAD( mtx )
65		{
66		UINT8 header[18];
67		UINT16 sys_addr;
	75	const address_space *program = cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM);
	76	running_device *messram = devtag_get_device(machine, "messram");
68	77
69		/* get the header */
70		image_fread(image, &header, sizeof(header));
	78	//  UINT8 cbm_mode = data >> 7 & 0x01;
	79	UINT8 rom_page = data >> 4 & 0x07;
	80	UINT8 ram_page = data >> 0 & 0x0f;
71	81
72		if (header[0] == 0xff)
	82	/* set rom bank (switches between basic and assembler rom or cartridges) */
	83	memory_set_bank(machine, "bank2", rom_page);
	84
	85	/* set ram bank, for invalid pages a nop-handler will be installed */
	86	if (ram_page >= messram_get_size(messram)/0x8000)
73	87	{
74		/* long header */
75		sys_addr = pick_integer_le(header, 16, 2);
76		image_fread(image, mtx_ram + (sys_addr - 0xc000), 599);
77		image_fread(image, mtx_ram, snapshot_size - 599 - 18);
	88	memory_nop_readwrite(program, 0x4000, 0x7fff, 0, 0);
	89	memory_nop_readwrite(program, 0x8000, 0xbfff, 0, 0);
78	90	}
	91	else if (ram_page + 1 == messram_get_size(messram)/0x8000)
	92	{
	93	memory_nop_readwrite(program, 0x4000, 0x7fff, 0, 0);
	94	memory_install_readwrite_bank(program, 0x8000, 0xbfff, 0, 0, "bank4");
	95	memory_set_bank(machine, "bank4", ram_page);
	96	}
79	97	else
80	98	{
81		/* short header */
82		sys_addr = pick_integer_le(header, 0, 2);
83		image_fseek(image, 4, SEEK_SET);
84		image_fread(image, mtx_ram + (sys_addr - 0xc000), 599);
85		image_fread(image, mtx_ram, snapshot_size - 599 - 4);
	99	memory_install_readwrite_bank(program, 0x4000, 0x7fff, 0, 0, "bank3");
	100	memory_install_readwrite_bank(program, 0x8000, 0xbfff, 0, 0, "bank4");
	101	memory_set_bank(machine, "bank3", ram_page);
	102	memory_set_bank(machine, "bank4", ram_page);
86	103	}
	104	}
87	105
88		return INIT_PASS;
	106	WRITE8_HANDLER( mtx_bankswitch_w )
	107	{
	108	bankswitch(space->machine, data);
89	109	}
90	110
	111	/*-------------------------------------------------
	112	mtx_sound_strobe_r - sound strobe
	113	-------------------------------------------------*/
91	114
	115	READ8_DEVICE_HANDLER( mtx_sound_strobe_r )
	116	{
	117	mtx_state *state = (mtx_state *)device->machine->driver_data;
92	118
93		/*************************************
94		*
95		*  Cassette
96		*
97		*************************************/
	119	sn76496_w(device, 0, state->sound_latch);
98	120
99		READ8_HANDLER( mtx_cst_r )
100		{
101	121	return 0xff;
102	122	}
103	123
104		WRITE8_HANDLER( mtx_cst_w )
	124	/*-------------------------------------------------
	125	mtx_sound_latch_w - sound latch write
	126	-------------------------------------------------*/
	127
	128	WRITE8_HANDLER( mtx_sound_latch_w )
105	129	{
	130	mtx_state *state = (mtx_state *)space->machine->driver_data;
	131
	132	state->sound_latch = data;
106	133	}
107	134
	135	/*-------------------------------------------------
	136	mtx_cst_w - cassette write
	137	-------------------------------------------------*/
108	138
109
110		/*************************************
111		*
112		*  Printer
113		*
114		*************************************/
115
116		READ8_DEVICE_HANDLER( mtx_strobe_r )
	139	WRITE8_DEVICE_HANDLER( mtx_cst_w )
117	140	{
118		/* set STROBE low */
119		centronics_strobe_w(device, FALSE);
120
121		return 0xff;
	141	cassette_output(device, BIT(data, 0) ? -1 : 1);
122	142	}
123	143
	144	/*-------------------------------------------------
	145	mtx_prt_r - centronics status
	146	-------------------------------------------------*/
124	147
125	148	READ8_DEVICE_HANDLER( mtx_prt_r )
126	149	{
127		UINT8 result = 0;
	150	/*
128	151
	152	bit      description
	153
	154	0      BUSY
	155	1      ERROR
	156	2      PE
	157	3      SLCT
	158	4
	159	5
	160	6
	161	7
	162
	163	*/
	164
	165	UINT8 data = 0;
	166
129	167	/* reset STROBE to high */
130	168	centronics_strobe_w(device, TRUE);
131	169
132		/* fill in centronics printer status */
133		result |= centronics_busy_r(device) << 0;
134		result |= centronics_fault_r(device) << 1;
135		result |= !centronics_pe_r(device) << 2;
136		result |= centronics_vcc_r(device) << 3;
	170	/* busy */
	171	data |= centronics_busy_r(device) << 0;
137	172
138		return result;
139		}
	173	/* fault */
	174	data |= centronics_fault_r(device) << 1;
140	175
	176	/* paper empty */
	177	data |= !centronics_pe_r(device) << 2;
141	178
	179	/* select */
	180	data |= centronics_vcc_r(device) << 3;
142	181
	182	return data;
	183	}
143	184
144		/*************************************
145		*
146		*  Keyboard
147		*
148		*************************************/
	185	/*-------------------------------------------------
	186	mtx_sense_w - keyboard sense write
	187	-------------------------------------------------*/
149	188
150	189	WRITE8_HANDLER( mtx_sense_w )
151	190	{
152		key_sense = data;
	191	mtx_state *state = (mtx_state *)space->machine->driver_data;
	192
	193	state->key_sense = data;
153	194	}
154	195
	196	/*-------------------------------------------------
	197	mtx_key_lo_r - keyboard low read
	198	-------------------------------------------------*/
	199
155	200	READ8_HANDLER( mtx_key_lo_r )
156	201	{
	202	mtx_state *state = (mtx_state *)space->machine->driver_data;
	203
157	204	UINT8 data = 0xff;
158	205
159		if (!(key_sense & 0x01)) data &= input_port_read(space->machine, "keyboard_low_0");
160		if (!(key_sense & 0x02)) data &= input_port_read(space->machine, "keyboard_low_1");
161		if (!(key_sense & 0x04)) data &= input_port_read(space->machine, "keyboard_low_2");
162		if (!(key_sense & 0x08)) data &= input_port_read(space->machine, "keyboard_low_3");
163		if (!(key_sense & 0x10)) data &= input_port_read(space->machine, "keyboard_low_4");
164		if (!(key_sense & 0x20)) data &= input_port_read(space->machine, "keyboard_low_5");
165		if (!(key_sense & 0x40)) data &= input_port_read(space->machine, "keyboard_low_6");
166		if (!(key_sense & 0x80)) data &= input_port_read(space->machine, "keyboard_low_7");
	206	if (!(state->key_sense & 0x01)) data &= input_port_read(space->machine, "ROW0");
	207	if (!(state->key_sense & 0x02)) data &= input_port_read(space->machine, "ROW1");
	208	if (!(state->key_sense & 0x04)) data &= input_port_read(space->machine, "ROW2");
	209	if (!(state->key_sense & 0x08)) data &= input_port_read(space->machine, "ROW3");
	210	if (!(state->key_sense & 0x10)) data &= input_port_read(space->machine, "ROW4");
	211	if (!(state->key_sense & 0x20)) data &= input_port_read(space->machine, "ROW5");
	212	if (!(state->key_sense & 0x40)) data &= input_port_read(space->machine, "ROW6");
	213	if (!(state->key_sense & 0x80)) data &= input_port_read(space->machine, "ROW7");
167	214
168	215	return data;
169	216	}
170	217
	218	/*-------------------------------------------------
	219	mtx_key_lo_r - keyboard high read
	220	-------------------------------------------------*/
	221
171	222	READ8_HANDLER( mtx_key_hi_r )
172	223	{
	224	mtx_state *state = (mtx_state *)space->machine->driver_data;
	225
173	226	UINT8 data = input_port_read(space->machine, "country_code");
174	227
175		if (!(key_sense & 0x01)) data &= input_port_read(space->machine, "keyboard_high_0");
176		if (!(key_sense & 0x02)) data &= input_port_read(space->machine, "keyboard_high_1");
177		if (!(key_sense & 0x04)) data &= input_port_read(space->machine, "keyboard_high_2");
178		if (!(key_sense & 0x08)) data &= input_port_read(space->machine, "keyboard_high_3");
179		if (!(key_sense & 0x10)) data &= input_port_read(space->machine, "keyboard_high_4");
180		if (!(key_sense & 0x20)) data &= input_port_read(space->machine, "keyboard_high_5");
181		if (!(key_sense & 0x40)) data &= input_port_read(space->machine, "keyboard_high_6");
182		if (!(key_sense & 0x80)) data &= input_port_read(space->machine, "keyboard_high_7");
	228	if (!(state->key_sense & 0x01)) data &= input_port_read(space->machine, "ROW0") >> 8;
	229	if (!(state->key_sense & 0x02)) data &= input_port_read(space->machine, "ROW1") >> 8;
	230	if (!(state->key_sense & 0x04)) data &= input_port_read(space->machine, "ROW2") >> 8;
	231	if (!(state->key_sense & 0x08)) data &= input_port_read(space->machine, "ROW3") >> 8;
	232	if (!(state->key_sense & 0x10)) data &= input_port_read(space->machine, "ROW4") >> 8;
	233	if (!(state->key_sense & 0x20)) data &= input_port_read(space->machine, "ROW5") >> 8;
	234	if (!(state->key_sense & 0x40)) data &= input_port_read(space->machine, "ROW6") >> 8;
	235	if (!(state->key_sense & 0x80)) data &= input_port_read(space->machine, "ROW7") >> 8;
183	236
184	237	return data;
185	238	}
186	239
	240	/*-------------------------------------------------
	241	hrx_address_w - HRX video RAM address
	242	-------------------------------------------------*/
187	243
	244	WRITE8_HANDLER( hrx_address_w )
	245	{
	246	if (offset)
	247	{
	248	/*
188	249
189		/*************************************
190		*
191		*  Bank switching
192		*
193		*************************************/
	250	bit      description
194	251
195		/*
196		There are two memory models on the MTX, the standard one and a
197		CBM mode. In standard mode, the memory map is defined as:
	252	0      A8
	253	1      A9
	254	2      A10
	255	3
	256	4
	257	5      attribute memory write enable
	258	6      ASCII memory write enable
	259	7      cycle (0=read/1=write)
198	260
199		0x0000 - 0x1fff  OSROM
200		0x2000 - 0x3fff  Paged ROM
201		0x4000 - 0x7fff  Paged RAM
202		0x8000 - 0xbfff  Paged RAM
203		0xc000 - 0xffff  RAM
	261	*/
	262	}
	263	else
	264	{
	265	/*
204	266
205		Banks are selected by output port 0. Bits 0-3 define the RAM page
206		and bits 4-6 the ROM page.
	267	bit      description
207	268
208		CBM mode is selected by bit 7 of output port 0. ROM is replaced
209		by RAM in this mode.
210		*/
	269	0      A0
	270	1      A1
	271	2      A2
	272	3      A3
	273	4      A4
	274	5      A5
	275	6      A6
	276	7      A7
211	277
212		WRITE8_HANDLER( mtx_bankswitch_w )
	278	*/
	279	}
	280	}
	281
	282	/*-------------------------------------------------
	283	hrx_data_r - HRX data read
	284	-------------------------------------------------*/
	285
	286	READ8_HANDLER( hrx_data_r )
213	287	{
214		//  UINT8 cbm_mode = data >> 7 & 0x01;
215		UINT8 rom_page = data >> 4 & 0x07;
216		UINT8 ram_page = data >> 0 & 0x0f;
	288	return 0;
	289	}
217	290
218		/* set rom bank (switches between basic and assembler rom or cartridges) */
219		memory_set_bank(space->machine, "bank2", rom_page);
	291	/*-------------------------------------------------
	292	hrx_data_w - HRX data write
	293	-------------------------------------------------*/
220	294
221		/* set ram bank, for invalid pages a nop-handler will be installed */
222		if (ram_page >= messram_get_size(devtag_get_device(space->machine, "messram"))/0x8000)
	295	WRITE8_HANDLER( hrx_data_w )
	296	{
	297	}
	298
	299	/*-------------------------------------------------
	300	hrx_attr_r - HRX attribute read
	301	-------------------------------------------------*/
	302
	303	READ8_HANDLER( hrx_attr_r )
	304	{
	305	return 0;
	306	}
	307
	308	/*-------------------------------------------------
	309	hrx_attr_r - HRX attribute write
	310	-------------------------------------------------*/
	311
	312	WRITE8_HANDLER( hrx_attr_w )
	313	{
	314	/*
	315
	316	bit      description
	317
	318	0
	319	1
	320	2
	321	3
	322	4
	323	5
	324	6
	325	7
	326
	327	*/
	328	}
	329
	330	/***************************************************************************
	331	DEVICE CONFIGURATION
	332	***************************************************************************/
	333
	334	/*-------------------------------------------------
	335	TMS9928a_interface tms9928a_interface
	336	-------------------------------------------------*/
	337
	338	static void mtx_tms9929a_interrupt(running_machine *machine, int data)
	339	{
	340	mtx_state *state = (mtx_state *)machine->driver_data;
	341
	342	z80ctc_trg0_w(state->z80ctc, data ? 0 : 1);
	343	}
	344
	345	static const TMS9928a_interface tms9928a_interface =
	346	{
	347	TMS9929A,
	348	0x4000,
	349	0, 0,
	350	mtx_tms9929a_interrupt
	351	};
	352
	353	INTERRUPT_GEN( mtx_interrupt )
	354	{
	355	TMS9928A_interrupt(device->machine);
	356	}
	357
	358	/***************************************************************************
	359	SNAPSHOT
	360	***************************************************************************/
	361
	362	SNAPSHOT_LOAD( mtx )
	363	{
	364	const address_space *program = cputag_get_address_space(image->machine, Z80_TAG, ADDRESS_SPACE_PROGRAM);
	365
	366	UINT8 header[18];
	367	UINT16 addr;
	368
	369	/* get the header */
	370	image_fread(image, &header, sizeof(header));
	371
	372	if (header[0] == 0xff)
223	373	{
224		memory_nop_readwrite(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0);
225		memory_nop_readwrite(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0);
	374	/* long header */
	375	addr = pick_integer_le(header, 16, 2);
	376	void *ptr = memory_get_write_ptr(program, addr);
	377	image_fread(image, ptr, 599);
	378	ptr = memory_get_write_ptr(program, 0xc000);
	379	image_fread(image, ptr, snapshot_size - 599 - 18);
226	380	}
227		else if (ram_page + 1 == messram_get_size(devtag_get_device(space->machine, "messram"))/0x8000)
228		{
229		memory_nop_readwrite(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0);
230		memory_install_readwrite_bank(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, "bank4");
231		memory_set_bank(space->machine, "bank4", ram_page);
232		}
233	381	else
234	382	{
235		memory_install_readwrite_bank(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0, "bank3");
236		memory_install_readwrite_bank(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, "bank4");
237		memory_set_bank(space->machine, "bank3", ram_page);
238		memory_set_bank(space->machine, "bank4", ram_page);
	383	/* short header */
	384	addr = pick_integer_le(header, 0, 2);
	385	image_fseek(image, 4, SEEK_SET);
	386	void *ptr = memory_get_write_ptr(program, addr);
	387	image_fread(image, ptr, 599);
	388	ptr = memory_get_write_ptr(program, 0xc000);
	389	image_fread(image, ptr, snapshot_size - 599 - 4);
239	390	}
	391
	392	return INIT_PASS;
240	393	}
241	394
	395	/***************************************************************************
	396	MACHINE INITIALIZATION
	397	***************************************************************************/
242	398
	399	/*-------------------------------------------------
	400	MACHINE_START( mtx512 )
	401	-------------------------------------------------*/
243	402
244		/*************************************
245		*
246		*  Machine initialization
247		*
248		*************************************/
	403	MACHINE_START( mtx512 )
	404	{
	405	mtx_state *state = (mtx_state *)machine->driver_data;
	406	running_device *messram = devtag_get_device(machine, "messram");
249	407
250		DRIVER_INIT( mtx512 )
251		{
	408	/* find devices */
	409	state->z80ctc = devtag_get_device(machine, Z80CTC_TAG);
	410	state->z80dart = devtag_get_device(machine, Z80DART_TAG);
	411	state->cassette = devtag_get_device(machine, CASSETTE_TAG);
	412
252	413	/* configure memory */
253	414	memory_set_bankptr(machine, "bank1", memory_region(machine, "user1"));
254	415	memory_configure_bank(machine, "bank2", 0, 8, memory_region(machine, "user2"), 0x2000);
255		memory_configure_bank(machine, "bank3", 0, messram_get_size(devtag_get_device(machine, "messram"))/0x4000/2, messram_get_ptr(devtag_get_device(machine, "messram")), 0x4000);
256		memory_configure_bank(machine, "bank4", 0, messram_get_size(devtag_get_device(machine, "messram"))/0x4000/2, messram_get_ptr(devtag_get_device(machine, "messram")) + messram_get_size(devtag_get_device(machine, "messram"))/2, 0x4000);
	416	memory_configure_bank(machine, "bank3", 0, messram_get_size(messram)/0x4000/2, messram_get_ptr(messram), 0x4000);
	417	memory_configure_bank(machine, "bank4", 0, messram_get_size(messram)/0x4000/2, messram_get_ptr(messram) + messram_get_size(messram)/2, 0x4000);
257	418
258	419	/* setup tms9928a */
259	420	TMS9928A_configure(&tms9928a_interface);
260	421	}
261	422
262		DRIVER_INIT( rs128 )
	423	/*-------------------------------------------------
	424	MACHINE_RESET( mtx512 )
	425	-------------------------------------------------*/
	426
	427	MACHINE_RESET( mtx512 )
263	428	{
264		running_device *device;
265		const address_space *space;
266
267		DRIVER_INIT_CALL(mtx512);
268
269		/* install handlers for dart interface */
270		device = devtag_get_device(machine, "z80dart");
271		space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
272		memory_install_readwrite8_device_handler(space, device, 0x0c, 0x0d, 0, 0, z80dart_d_r, z80dart_d_w);
273		memory_install_readwrite8_device_handler(space, device, 0x0e, 0x0f, 0, 0, z80dart_c_r, z80dart_c_w);
	429	/* bank switching */
	430	bankswitch(machine, 0);
274	431	}

src/mess/drivers/mtx.c

r7594	r7595
4	4
5	5	Memotech MTX 500, MTX 512 and RS 128
6	6
	7	**************************************************************************/
7	8
8		TODO:  - Finish RS232 support
9		- Cartridge support
10		- Floppy disk emulation
11		- Hard disk emulation
12		- CBM mode
13		- "Silicon" disk emulation
14		- Multi Effect Video Wall emulation (maybe)
	9	/*
15	10
16		**************************************************************************/
	11	TODO:
17	12
	13	- cassette
	14	- cartridges
	15	- SDX/FDX floppy
	16	- HDX hard disk
	17	- HRX high resolution graphics
	18	- CBM (all RAM) mode
	19	- "Silicon" disks
	20	- Multi Effect Video Wall
18	21
	22	*/
	23
19	24	#include "emu.h"
20	25	#include "includes/mtx.h"
21	26	#include "cpu/z80/z80.h"
22	27	#include "cpu/z80/z80daisy.h"
	28	#include "devices/cassette.h"
	29	#include "devices/messram.h"
	30	#include "devices/snapquik.h"
	31	#include "machine/ctronics.h"
23	32	#include "machine/z80ctc.h"
24	33	#include "machine/z80dart.h"
25	34	#include "video/tms9928a.h"
26	35	#include "sound/sn76496.h"
27		#include "machine/ctronics.h"
28		#include "devices/snapquik.h"
29		#include "devices/messram.h"
30	36
	37	/***************************************************************************
	38	MEMORY MAPS
	39	***************************************************************************/
31	40
32		/*************************************
33		*
34		*  Global variables
35		*
36		*************************************/
	41	/*-------------------------------------------------
	42	ADDRESS_MAP( mtx_mem )
	43	-------------------------------------------------*/
37	44
38		UINT8 *mtx_ram;
39
40
41
42		/*************************************
43		*
44		*  Memory maps
45		*
46		*************************************/
47
48	45	static ADDRESS_MAP_START( mtx_mem, ADDRESS_SPACE_PROGRAM, 8 )
49	46	AM_RANGE(0x0000, 0x1fff) AM_ROMBANK("bank1")
50	47	AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank2")
51	48	AM_RANGE(0x4000, 0x7fff) AM_RAMBANK("bank3")
52	49	AM_RANGE(0x8000, 0xbfff) AM_RAMBANK("bank4")
53		AM_RANGE(0xc000, 0xffff) AM_RAM AM_BASE(&mtx_ram)
	50	AM_RANGE(0xc000, 0xffff) AM_RAM
54	51	ADDRESS_MAP_END
55	52
	53	/*-------------------------------------------------
	54	ADDRESS_MAP( mtx_io )
	55	-------------------------------------------------*/
56	56
57	57	static ADDRESS_MAP_START( mtx_io, ADDRESS_SPACE_IO, 8 )
58	58	ADDRESS_MAP_GLOBAL_MASK(0xff)
59		AM_RANGE(0x00, 0x00) AM_DEVREAD("centronics", mtx_strobe_r) AM_WRITE(mtx_bankswitch_w)
	59	AM_RANGE(0x00, 0x00) AM_DEVREAD(CENTRONICS_TAG, mtx_strobe_r) AM_WRITE(mtx_bankswitch_w)
60	60	AM_RANGE(0x01, 0x01) AM_READWRITE(TMS9928A_vram_r, TMS9928A_vram_w)
61	61	AM_RANGE(0x02, 0x02) AM_READWRITE(TMS9928A_register_r, TMS9928A_register_w)
62		AM_RANGE(0x03, 0x03) AM_READWRITE(mtx_cst_r, mtx_cst_w)
63		AM_RANGE(0x04, 0x04) AM_DEVREADWRITE("centronics", mtx_prt_r, centronics_data_w)
	62	AM_RANGE(0x03, 0x03) AM_DEVREAD(SN76489A_TAG, mtx_sound_strobe_r) AM_DEVWRITE(CASSETTE_TAG, mtx_cst_w)
	63	AM_RANGE(0x04, 0x04) AM_DEVREADWRITE(CENTRONICS_TAG, mtx_prt_r, centronics_data_w)
64	64	AM_RANGE(0x05, 0x05) AM_READWRITE(mtx_key_lo_r, mtx_sense_w)
65		AM_RANGE(0x06, 0x06) AM_READ(mtx_key_hi_r)
66		AM_RANGE(0x06, 0x06) AM_DEVWRITE("sn76489a", sn76496_w)
67		AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80ctc", z80ctc_r, z80ctc_w)
	65	AM_RANGE(0x06, 0x06) AM_READWRITE(mtx_key_hi_r, mtx_sound_latch_w)
	66	//   AM_RANGE(0x07, 0x07) PIO
	67	AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
	68	AM_RANGE(0x30, 0x31) AM_WRITE(hrx_address_w)
	69	AM_RANGE(0x32, 0x32) AM_READWRITE(hrx_data_r, hrx_data_w)
	70	AM_RANGE(0x33, 0x33) AM_READWRITE(hrx_attr_r, hrx_attr_w)
	71	//   AM_RANGE(0x38, 0x38) AM_DEVWRITE(MC6845_TAG, mc6845_address_w)
	72	//   AM_RANGE(0x39, 0x39) AM_DEVWRITE(MC6845_TAG, mc6845_register_r, mc6845_register_w)
	73	/*   AM_RANGE(0x40, 0x43) AM_DEVREADWRITE(FD1791_TAG, wd17xx_r, wd17xx_w)
	74	AM_RANGE(0x44, 0x44) AM_READWRITE(fdx_status_r, fdx_control_w)
	75	AM_RANGE(0x45, 0x45) AM_WRITE(fdx_drv_sel_w)
	76	AM_RANGE(0x46, 0x46) AM_WRITE(fdx_dma_lo_w)
	77	AM_RANGE(0x47, 0x47) AM_WRITE(fdx_dma_hi_w)*/
68	78	ADDRESS_MAP_END
69	79
	80	/*-------------------------------------------------
	81	ADDRESS_MAP( rs128_io )
	82	-------------------------------------------------*/
70	83
	84	static ADDRESS_MAP_START( rs128_io, ADDRESS_SPACE_IO, 8 )
	85	AM_IMPORT_FROM(mtx_io)
	86	AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE(Z80DART_TAG, z80dart_cd_ba_r, z80dart_cd_ba_w)
	87	ADDRESS_MAP_END
71	88
72		/*************************************
73		*
74		*  Input ports
75		*
76		*************************************/
	89	/***************************************************************************
	90	INPUT PORTS
	91	***************************************************************************/
77	92
	93	/*-------------------------------------------------
	94	INPUT_PORTS( mtx512 )
	95	-------------------------------------------------*/
	96
78	97	static INPUT_PORTS_START( mtx512 )
79		PORT_START("keyboard_low_0")
80		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1)     PORT_CHAR('1')  PORT_CHAR('!')
81		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3)     PORT_CHAR('3')  PORT_CHAR('#')
82		PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5)     PORT_CHAR('5')  PORT_CHAR('%')
83		PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7)     PORT_CHAR('7')  PORT_CHAR('\'')
84		PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9)     PORT_CHAR('9')  PORT_CHAR(')')
85		PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-')  PORT_CHAR('=')
86		PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('\\') PORT_CHAR('|')
87		PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 7 Page") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(PGDN)) PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
	98	PORT_START("ROW0")
	99	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1)     PORT_CHAR('1')  PORT_CHAR('!')
	100	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3)     PORT_CHAR('3')  PORT_CHAR('#')
	101	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5)     PORT_CHAR('5')  PORT_CHAR('%')
	102	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7)     PORT_CHAR('7')  PORT_CHAR('\'')
	103	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9)     PORT_CHAR('9')  PORT_CHAR(')')
	104	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-')  PORT_CHAR('=')
	105	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('\\') PORT_CHAR('|')
	106	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7 Page") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(PGDN)) PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
	107	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(CANCEL)) PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
	108	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F1)    PORT_CHAR(UCHAR_MAMEKEY(F1))
88	109
89		PORT_START("keyboard_low_1")
90		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC)    PORT_CHAR(UCHAR_MAMEKEY(ESC))
91		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2)      PORT_CHAR('2') PORT_CHAR('"')
92		PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4)      PORT_CHAR('4') PORT_CHAR('$')
93		PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6)      PORT_CHAR('6') PORT_CHAR('&')
94		PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8)      PORT_CHAR('8') PORT_CHAR('(')
95		PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0)      PORT_CHAR('0')
96		PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('^') PORT_CHAR('~')
97		PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 8 EOL") PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(END)) PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
	110	PORT_START("ROW1")
	111	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ESC)    PORT_CHAR(UCHAR_MAMEKEY(ESC))
	112	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2)      PORT_CHAR('2') PORT_CHAR('"')
	113	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4)      PORT_CHAR('4') PORT_CHAR('$')
	114	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6)      PORT_CHAR('6') PORT_CHAR('&')
	115	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8)      PORT_CHAR('8') PORT_CHAR('(')
	116	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0)      PORT_CHAR('0')
	117	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('^') PORT_CHAR('~')
	118	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8 EOL") PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(END)) PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
	119	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
	120	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F5)        PORT_CHAR(UCHAR_MAMEKEY(F5))
98	121
99		PORT_START("keyboard_low_2")
100		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL)   PORT_CHAR(UCHAR_SHIFT_2)
101		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_W)          PORT_CHAR('w') PORT_CHAR('W')
102		PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R)          PORT_CHAR('r') PORT_CHAR('R')
103		PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y)          PORT_CHAR('y') PORT_CHAR('Y')
104		PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_I)          PORT_CHAR('i') PORT_CHAR('I')
105		PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P)          PORT_CHAR('p') PORT_CHAR('P')
106		PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('[') PORT_CHAR('{')
107		PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5_PAD)      PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_CHAR(UCHAR_MAMEKEY(5_PAD))
	122	PORT_START("ROW2")
	123	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LCONTROL)   PORT_CHAR(UCHAR_SHIFT_2)
	124	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W)          PORT_CHAR('w') PORT_CHAR('W')
	125	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R)          PORT_CHAR('r') PORT_CHAR('R')
	126	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y)          PORT_CHAR('y') PORT_CHAR('Y')
	127	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I)          PORT_CHAR('i') PORT_CHAR('I')
	128	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P)          PORT_CHAR('p') PORT_CHAR('P')
	129	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('[') PORT_CHAR('{')
	130	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5_PAD)      PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_CHAR(UCHAR_MAMEKEY(5_PAD))
	131	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR('\t') PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
	132	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F2)    PORT_CHAR(UCHAR_MAMEKEY(F2))
108	133
109		PORT_START("keyboard_low_3")
110		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q)         PORT_CHAR('q') PORT_CHAR('Q')
111		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_E)         PORT_CHAR('e') PORT_CHAR('E')
112		PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_T)         PORT_CHAR('t') PORT_CHAR('T')
113		PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_U)         PORT_CHAR('u') PORT_CHAR('U')
114		PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_O)         PORT_CHAR('o') PORT_CHAR('O')
115		PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_CHAR('`')
116		PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Linefeed") PORT_CODE(KEYCODE_PRTSCR)
117		PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1_PAD)     PORT_CHAR(UCHAR_MAMEKEY(LEFT)) PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
	134	PORT_START("ROW3")
	135	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q)         PORT_CHAR('q') PORT_CHAR('Q')
	136	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E)         PORT_CHAR('e') PORT_CHAR('E')
	137	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T)         PORT_CHAR('t') PORT_CHAR('T')
	138	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U)         PORT_CHAR('u') PORT_CHAR('U')
	139	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O)         PORT_CHAR('o') PORT_CHAR('O')
	140	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_CHAR('`')
	141	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Linefeed") PORT_CODE(KEYCODE_PRTSCR)
	142	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD)     PORT_CHAR(UCHAR_MAMEKEY(LEFT)) PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
	143	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL)) PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
	144	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F6)    PORT_CHAR(UCHAR_MAMEKEY(F6))
118	145
119		PORT_START("keyboard_low_4")
120		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("AlphaLock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
121		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_S)          PORT_CHAR('s') PORT_CHAR('S')
122		PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F)          PORT_CHAR('f') PORT_CHAR('F')
123		PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_H)          PORT_CHAR('h') PORT_CHAR('H')
124		PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_K)          PORT_CHAR('k') PORT_CHAR('K')
125		PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON)      PORT_CHAR(';') PORT_CHAR('+')
126		PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR(']') PORT_CHAR('}')
127		PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3_PAD)      PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
	146	PORT_START("ROW4")
	147	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("AlphaLock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
	148	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S)          PORT_CHAR('s') PORT_CHAR('S')
	149	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F)          PORT_CHAR('f') PORT_CHAR('F')
	150	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H)          PORT_CHAR('h') PORT_CHAR('H')
	151	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K)          PORT_CHAR('k') PORT_CHAR('K')
	152	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON)      PORT_CHAR(';') PORT_CHAR('+')
	153	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR(']') PORT_CHAR('}')
	154	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3_PAD)      PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
	155	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_UNUSED)
	156	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
128	157
129		PORT_START("keyboard_low_5")
130		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_A)     PORT_CHAR('a') PORT_CHAR('A')
131		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_D)     PORT_CHAR('d') PORT_CHAR('D')
132		PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_G)     PORT_CHAR('g') PORT_CHAR('G')
133		PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_J)     PORT_CHAR('j') PORT_CHAR('J')
134		PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_L)     PORT_CHAR('l') PORT_CHAR('L')
135		PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*')
136		PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
137		PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(HOME)) PORT_CHAR(UCHAR_MAMEKEY(2_PAD))
	158	PORT_START("ROW5")
	159	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A)     PORT_CHAR('a') PORT_CHAR('A')
	160	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D)     PORT_CHAR('d') PORT_CHAR('D')
	161	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G)     PORT_CHAR('g') PORT_CHAR('G')
	162	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J)     PORT_CHAR('j') PORT_CHAR('J')
	163	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L)     PORT_CHAR('l') PORT_CHAR('L')
	164	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*')
	165	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
	166	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(HOME)) PORT_CHAR(UCHAR_MAMEKEY(2_PAD))
	167	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_UNUSED)
	168	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
138	169
139		PORT_START("keyboard_low_6")
140		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT)  PORT_CHAR(UCHAR_SHIFT_1)
141		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_X)       PORT_CHAR('x') PORT_CHAR('X')
142		PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_V)       PORT_CHAR('v') PORT_CHAR('V')
143		PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_N)       PORT_CHAR('n') PORT_CHAR('N')
144		PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA)   PORT_CHAR(',') PORT_CHAR('<')
145		PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH)   PORT_CHAR('/') PORT_CHAR('?')
146		PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RSHIFT)  PORT_CHAR(UCHAR_SHIFT_1)
147		PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
	170	PORT_START("ROW6")
	171	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LSHIFT)  PORT_CHAR(UCHAR_SHIFT_1)
	172	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X)       PORT_CHAR('x') PORT_CHAR('X')
	173	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V)       PORT_CHAR('v') PORT_CHAR('V')
	174	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N)       PORT_CHAR('n') PORT_CHAR('N')
	175	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA)   PORT_CHAR(',') PORT_CHAR('<')
	176	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH)   PORT_CHAR('/') PORT_CHAR('?')
	177	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_RSHIFT)  PORT_CHAR(UCHAR_SHIFT_1)
	178	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
	179	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_UNUSED)
	180	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
148	181
149		PORT_START("keyboard_low_7")
150		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z)      PORT_CHAR('z') PORT_CHAR('Z')
151		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_C)      PORT_CHAR('c') PORT_CHAR('C')
152		PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_B)      PORT_CHAR('b') PORT_CHAR('B')
153		PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_M)      PORT_CHAR('m') PORT_CHAR('M')
154		PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP)   PORT_CHAR('.') PORT_CHAR('>')
155		PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('_')
156		PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0_PAD)  PORT_CHAR(UCHAR_MAMEKEY(INSERT)) PORT_CHAR(UCHAR_MAMEKEY(0_PAD))
157		PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad Enter CLS") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD))
	182	PORT_START("ROW7")
	183	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z)      PORT_CHAR('z') PORT_CHAR('Z')
	184	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C)      PORT_CHAR('c') PORT_CHAR('C')
	185	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B)      PORT_CHAR('b') PORT_CHAR('B')
	186	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M)      PORT_CHAR('m') PORT_CHAR('M')
	187	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP)   PORT_CHAR('.') PORT_CHAR('>')
	188	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('_')
	189	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0_PAD)  PORT_CHAR(UCHAR_MAMEKEY(INSERT)) PORT_CHAR(UCHAR_MAMEKEY(0_PAD))
	190	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad Enter CLS") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD))
	191	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
	192	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F4)    PORT_CHAR(UCHAR_MAMEKEY(F4))
158	193
159		PORT_START("keyboard_high_0")
160		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(CANCEL)) PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
161		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F1)    PORT_CHAR(UCHAR_MAMEKEY(F1))
162		PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED)
163
164		PORT_START("keyboard_high_1")
165		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
166		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F5)        PORT_CHAR(UCHAR_MAMEKEY(F5))
167		PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED)
168
169		PORT_START("keyboard_high_2")
170		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR('\t') PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
171		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F2)    PORT_CHAR(UCHAR_MAMEKEY(F2))
172		PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED)
173
174		PORT_START("keyboard_high_3")
175		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL)) PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
176		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F6)    PORT_CHAR(UCHAR_MAMEKEY(F6))
177		PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED)
178
179		PORT_START("keyboard_high_4")
180		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED)
181		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
182		PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED)
183
184		PORT_START("keyboard_high_5")
185		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED)
186		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
187		PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED)
188
189		PORT_START("keyboard_high_6")
190		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED)
191		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
192		PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED)
193
194		PORT_START("keyboard_high_7")
195		PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
196		PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F4)    PORT_CHAR(UCHAR_MAMEKEY(F4))
197		PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED)
198
199	194	PORT_START("country_code")
200	195	PORT_DIPNAME(0x04, 0x00, "Country Code Switch 1")
201	196	PORT_DIPSETTING(0x04, DEF_STR(Off) )
r7594	r7595
203	198	PORT_DIPNAME(0x08, 0x00, "Country Code Switch 0")
204	199	PORT_DIPSETTING(0x08, DEF_STR(Off) )
205	200	PORT_DIPSETTING(0x00, DEF_STR(On) )
206		PORT_BIT(0xf3, IP_ACTIVE_LOW, IPT_UNUSED)
	201	PORT_BIT( 0xf3, IP_ACTIVE_LOW, IPT_UNUSED)
207	202	INPUT_PORTS_END
208	203
	204	/***************************************************************************
	205	DEVICE CONFIGURATION
	206	***************************************************************************/
209	207
	208	/*-------------------------------------------------
	209	Z80CTC_INTERFACE( ctc_intf )
	210	-------------------------------------------------*/
210	211
211		/*************************************
212		*
213		*  Z80 daisy chain
214		*
215		*************************************/
216
217		static const z80_daisy_chain mtx_daisy_chain[] =
	212	static TIMER_DEVICE_CALLBACK( ctc_tick )
218	213	{
219		{ "z80ctc" },
220		{ NULL }
221		};
	214	mtx_state *state = (mtx_state *)timer->machine->driver_data;
222	215
223		static TIMER_DEVICE_CALLBACK( ctc_c0_tick )
	216	z80ctc_trg1_w(state->z80ctc, 1);
	217	z80ctc_trg1_w(state->z80ctc, 0 );
	218	z80ctc_trg2_w(state->z80ctc, 1);
	219	z80ctc_trg2_w(state->z80ctc, 0 );
	220	}
	221
	222	static WRITE_LINE_DEVICE_HANDLER( ctc_trg1_w )
224	223	{
225		running_device *z80ctc = devtag_get_device(timer->machine, "z80ctc");
	224	mtx_state *driver_state = (mtx_state *)device->machine->driver_data;
226	225
227		z80ctc_trg0_w(z80ctc, 1);
228		z80ctc_trg0_w(z80ctc, 0);
	226	if (driver_state->z80dart != NULL)
	227	{
	228	z80dart_rxca_w(driver_state->z80dart, state);
	229	z80dart_txca_w(driver_state->z80dart, state);
	230	}
229	231	}
230	232
231		static TIMER_DEVICE_CALLBACK( ctc_c1_c2_tick )
	233	static WRITE_LINE_DEVICE_HANDLER( ctc_trg2_w )
232	234	{
233		running_device *z80ctc = devtag_get_device(timer->machine, "z80ctc");
	235	mtx_state *driver_state = (mtx_state *)device->machine->driver_data;
234	236
235		z80ctc_trg1_w(z80ctc, 1);
236		z80ctc_trg1_w(z80ctc, 0);
237		z80ctc_trg2_w(z80ctc, 1);
238		z80ctc_trg2_w(z80ctc, 0);
	237	if (driver_state->z80dart != NULL)
	238	{
	239	z80dart_rxtxcb_w(driver_state->z80dart, state);
	240	}
239	241	}
240	242
241
242		/*************************************
243		*
244		*  Machine drivers
245		*
246		*************************************/
247
248		static Z80CTC_INTERFACE( mtx_ctc_intf )
	243	static Z80CTC_INTERFACE( ctc_intf )
249	244	{
250	245	0,
251		DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
	246	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
252	247	DEVCB_NULL,
253		DEVCB_NULL,
254		DEVCB_NULL
	248	DEVCB_LINE(ctc_trg1_w),
	249	DEVCB_LINE(ctc_trg2_w)
255	250	};
256	251
257		static Z80DART_INTERFACE( mtx_dart_intf )
	252	/*-------------------------------------------------
	253	Z80DART_INTERFACE( dart_intf )
	254	-------------------------------------------------*/
	255
	256	static Z80DART_INTERFACE( dart_intf )
258	257	{
259	258	0,
260	259	0,
r7594	r7595
272	271	DEVCB_NULL,
273	272	DEVCB_NULL,
274	273
275		DEVCB_NULL
	274	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0)
276	275	};
277	276
	277	/*-------------------------------------------------
	278	z80_daisy_chain mtx_daisy_chain
	279	-------------------------------------------------*/
	280
	281	static const z80_daisy_chain mtx_daisy_chain[] =
	282	{
	283	{ Z80CTC_TAG },
	284	{ NULL }
	285	};
	286
	287	/*-------------------------------------------------
	288	z80_daisy_chain rs128_daisy_chain
	289	-------------------------------------------------*/
	290
	291	static const z80_daisy_chain rs128_daisy_chain[] =
	292	{
	293	{ Z80CTC_TAG },
	294	{ Z80DART_TAG },
	295	{ NULL }
	296	};
	297
	298	/*-------------------------------------------------
	299	cassette_config mtx_cassette_config
	300	-------------------------------------------------*/
	301
	302	static TIMER_DEVICE_CALLBACK( cassette_tick )
	303	{
	304	mtx_state *state = (mtx_state *)timer->machine->driver_data;
	305	int data = (cassette_input(state->cassette) > +0.0) ? 0 : 1;
	306
	307	z80ctc_trg3_w(state->z80ctc, data);
	308	}
	309
	310	static const cassette_config mtx_cassette_config =
	311	{
	312	cassette_default_formats,
	313	NULL,
	314	(cassette_state)(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_MUTED)
	315	};
	316
	317	/***************************************************************************
	318	MACHINE DRIVERS
	319	***************************************************************************/
	320
	321	/*-------------------------------------------------
	322	MACHINE_DRIVER_START( mtx512 )
	323	-------------------------------------------------*/
	324
278	325	static MACHINE_DRIVER_START( mtx512 )
	326	MDRV_DRIVER_DATA(mtx_state)
	327
279	328	/* basic machine hardware */
280		MDRV_CPU_ADD("maincpu", Z80, MTX_SYSTEM_CLOCK)
	329	MDRV_CPU_ADD(Z80_TAG, Z80, XTAL_4MHz)
281	330	MDRV_CPU_PROGRAM_MAP(mtx_mem)
282	331	MDRV_CPU_IO_MAP(mtx_io)
283		MDRV_CPU_VBLANK_INT("screen", mtx_interrupt)
	332	MDRV_CPU_VBLANK_INT(SCREEN_TAG, mtx_interrupt)
284	333	MDRV_CPU_CONFIG(mtx_daisy_chain)
285	334
	335	MDRV_MACHINE_START(mtx512)
	336	MDRV_MACHINE_RESET(mtx512)
	337
286	338	/* video hardware */
287	339	MDRV_IMPORT_FROM(tms9928a)
288		MDRV_SCREEN_MODIFY("screen")
	340	MDRV_SCREEN_MODIFY(SCREEN_TAG)
289	341	MDRV_SCREEN_REFRESH_RATE(50)
290	342	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
291	343
292	344	/* sound hardware */
293	345	MDRV_SPEAKER_STANDARD_MONO("mono")
294		MDRV_SOUND_ADD("sn76489a", SN76489A, MTX_SYSTEM_CLOCK)
	346	MDRV_SOUND_ADD(SN76489A_TAG, SN76489A, XTAL_4MHz)
295	347	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
296	348
297		MDRV_Z80CTC_ADD( "z80ctc", MTX_SYSTEM_CLOCK, mtx_ctc_intf )
298		MDRV_TIMER_ADD_PERIODIC("z80ctc_c0", ctc_c0_tick, HZ(50))
299		MDRV_TIMER_ADD_PERIODIC("z80ctc_c1c2", ctc_c1_c2_tick, HZ(MTX_SYSTEM_CLOCK/13))
300
301		/* printer */
302		MDRV_CENTRONICS_ADD("centronics", standard_centronics)
303
304		/* snapshot */
	349	/* devices */
	350	MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_4MHz, ctc_intf )
	351	MDRV_TIMER_ADD_PERIODIC("z80ctc_timer", ctc_tick, HZ(XTAL_4MHz/13))
	352	MDRV_CENTRONICS_ADD(CENTRONICS_TAG, standard_centronics)
305	353	MDRV_SNAPSHOT_ADD("snapshot", mtx, "mtb", 0.5)
	354	MDRV_CASSETTE_ADD(CASSETTE_TAG, mtx_cassette_config)
	355	MDRV_TIMER_ADD_PERIODIC("cassette_timer", cassette_tick, HZ(44100))
306	356
307	357	/* internal ram */
308	358	MDRV_RAM_ADD("messram")
309	359	MDRV_RAM_DEFAULT_SIZE("64K")
310		MDRV_RAM_EXTRA_OPTIONS("96K,128K,160K,192K,224K,256K,288K,320K,352K,384K,416K,448K,480k,512K")
	360	MDRV_RAM_EXTRA_OPTIONS("96K,128K,160K,192K,224K,256K,288K,320K,352K,384K,416K,448K,480K,512K")
311	361	MACHINE_DRIVER_END
312	362
	363	/*-------------------------------------------------
	364	MACHINE_DRIVER_START( mtx500 )
	365	-------------------------------------------------*/
	366
313	367	static MACHINE_DRIVER_START( mtx500 )
314	368	MDRV_IMPORT_FROM(mtx512)
315	369
316	370	/* internal ram */
317	371	MDRV_RAM_MODIFY("messram")
318	372	MDRV_RAM_DEFAULT_SIZE("32K")
319		MDRV_RAM_EXTRA_OPTIONS("64K,96K,128K,160K,192K,224K,256K,288K,320K,352K,384K,416K,448K,480k,512K")
	373	MDRV_RAM_EXTRA_OPTIONS("64K,96K,128K,160K,192K,224K,256K,288K,320K,352K,384K,416K,448K,480K,512K")
320	374	MACHINE_DRIVER_END
321	375
	376	/*-------------------------------------------------
	377	MACHINE_DRIVER_START( rs128 )
	378	-------------------------------------------------*/
322	379
323	380	static MACHINE_DRIVER_START( rs128 )
324	381	MDRV_IMPORT_FROM(mtx512)
325	382
326		MDRV_Z80DART_ADD("z80dart", MTX_SYSTEM_CLOCK, mtx_dart_intf)
	383	/* basic machine hardware */
	384	MDRV_CPU_MODIFY(Z80_TAG)
	385	MDRV_CPU_IO_MAP(rs128_io)
	386	MDRV_CPU_CONFIG(rs128_daisy_chain)
327	387
	388	/* devices */
	389	MDRV_Z80DART_ADD(Z80DART_TAG, XTAL_4MHz, dart_intf)
	390
328	391	/* internal ram */
329	392	MDRV_RAM_MODIFY("messram")
330	393	MDRV_RAM_DEFAULT_SIZE("128K")
331		MDRV_RAM_EXTRA_OPTIONS("160K,192K,224K,256K,288K,320K,352K,384K,416K,448K,480k,512K")
	394	MDRV_RAM_EXTRA_OPTIONS("160K,192K,224K,256K,288K,320K,352K,384K,416K,448K,480K,512K")
332	395	MACHINE_DRIVER_END
333	396
	397	/***************************************************************************
	398	ROMS
	399	***************************************************************************/
334	400
	401	ROM_START( mtx512 )
	402	ROM_REGION( 0x02000, "user1", 0 )
	403	ROM_LOAD( "osrom",    0x0000, 0x2000, CRC(9ca858cc) SHA1(3804503a58f0bcdea96bb6488833782ebd03976d) )
335	404
336		/*************************************
337		*
338		*  ROM definitions
339		*
340		*************************************/
	405	ROM_REGION( 0x10000, "user2", 0 )
	406	ROM_LOAD( "basicrom", 0x0000, 0x2000, CRC(87b4e59c) SHA1(c49782a82a7f068c1195cd967882ba9edd546eaf) )
	407	ROM_LOAD( "assemrom", 0x2000, 0x2000, CRC(9d7538c3) SHA1(d1882c4ea61a68b1715bd634ded5603e18a99c5f) )
	408	ROM_LOAD( "newword0", 0x4000, 0x2000, CRC(5433bd01) SHA1(56897f385476864337b7b994c1b46f50eaa57128) )
	409	ROM_LOAD( "newword1", 0x6000, 0x2000, CRC(10980c03) SHA1(8245c42fb1eda43b67fa483e50e4ee3bc5f3f29f) )
	410	ROM_LOAD( "newword2", 0x8000, 0x2000, CRC(cbff7130) SHA1(b4ab27def6020ba8e32959a1b988fce77bcc1d7f) )
	411	ROM_LOAD( "newword3", 0xa000, 0x2000, CRC(e6bbc33b) SHA1(26faa4a8d952c4659f610e94608b630456ab89aa) )
341	412
342		ROM_START( mtx512 )
343		ROM_REGION(0x02000, "user1", 0)
344		ROM_LOAD("osrom",    0x0000, 0x2000, CRC(9ca858cc) SHA1(3804503a58f0bcdea96bb6488833782ebd03976d))
345		ROM_REGION(0x10000, "user2", 0)
346		ROM_LOAD("basicrom", 0x0000, 0x2000, CRC(87b4e59c) SHA1(c49782a82a7f068c1195cd967882ba9edd546eaf))
347		ROM_LOAD("assemrom", 0x2000, 0x2000, CRC(9d7538c3) SHA1(d1882c4ea61a68b1715bd634ded5603e18a99c5f))
348		ROM_FILL(            0x4000, 0xc000, 0xff)
	413	ROM_REGION( 0x2000, "sdx", 0 )
	414	ROM_LOAD( "sdx", 0x0000, 0x2000, NO_DUMP )
	415
	416	ROM_REGION( 0x2000, "mtx", 0 )
	417	ROM_LOAD( "sm2 fdcx1 v03", 0x0000, 0x2000, NO_DUMP )
	418
	419	ROM_REGION( 0x1000, MC6845_TAG, 0 )
	420	ROM_LOAD( "80z.bin", 0x0000, 0x1000, CRC(ea6fe865) SHA1(f84883f79bed34501e5828336894fad929bddbb5) )
349	421	ROM_END
350	422
351
352	423	#define rom_mtx500  rom_mtx512
353	424	#define rom_rs128   rom_mtx512
354	425
355		/*************************************
356		*
357		*  Driver definitions
358		*
359		*************************************/
	426	/***************************************************************************
	427	SYSTEM DRIVERS
	428	***************************************************************************/
360	429
361		/*    YEAR  NAME      PARENT    COMPAT  MACHINE   INPUT     INIT     COMPANY          FULLNAME   FLAGS */
362		COMP( 1983, mtx512,   0,      0,      mtx512,   mtx512,   mtx512,  "Memotech Ltd.", "MTX 512", 0 )
363		COMP( 1983, mtx500,   mtx512,   0,      mtx500,   mtx512,   mtx512,  "Memotech Ltd.", "MTX 500", 0 )
364		COMP( 1984, rs128,    mtx512,   0,      rs128,    mtx512,   rs128,   "Memotech Ltd.", "RS 128",  0 )
	430	/*    YEAR  NAME      PARENT    COMPAT  MACHINE   INPUT     INIT    COMPANY          FULLNAME   FLAGS */
	431	COMP( 1983, mtx512,   0,      0,      mtx512,   mtx512,   0,      "Memotech Ltd.", "MTX 512", 0 )
	432	COMP( 1983, mtx500,   mtx512,   0,      mtx500,   mtx512,   0,      "Memotech Ltd.", "MTX 500", 0 )
	433	COMP( 1984, rs128,    mtx512,   0,      rs128,    mtx512,   0,      "Memotech Ltd.", "RS 128",  0 )

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