src/mame/machine/snes.c
| r7476 | r7477 | |
|---|
| 295 | 295 | timer_adjust_oneshot(snes_scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, nextscan, 0), 0); |
| 296 | 296 | } |
| 297 | 297 | |
| 298 | /* FIXME: multiplication should take 8 CPU cycles & division 16 CPU cycles, but |
| 299 | using these timers breaks e.g. Chrono Trigger intro and Super Tennis gameplay. */ |
| 298 | 300 | |
| 299 | 301 | static TIMER_CALLBACK(snes_div_callback) |
| 300 | 302 | { |
| r7476 | r7477 | |
|---|
| 1323 | 1325 | case WRMPYA: /* Multiplier A */ |
| 1324 | 1326 | break; |
| 1325 | 1327 | case WRMPYB: /* Multiplier B */ |
| 1326 | | timer_adjust_oneshot(snes_mult_timer, cputag_clocks_to_attotime(space->machine, "maincpu", 8), 0); |
| 1328 | snes_ram[WRMPYB] = data; |
| 1329 | // timer_adjust_oneshot(snes_mult_timer, cputag_clocks_to_attotime(space->machine, "maincpu", 8), 0); |
| 1330 | { |
| 1331 | UINT32 c = snes_ram[WRMPYA] * snes_ram[WRMPYB]; |
| 1332 | snes_ram[RDMPYL] = c & 0xff; |
| 1333 | snes_ram[RDMPYH] = (c >> 8) & 0xff; |
| 1334 | } |
| 1327 | 1335 | break; |
| 1328 | 1336 | case WRDIVL: /* Dividend (low) */ |
| 1329 | 1337 | case WRDIVH: /* Dividend (high) */ |
| 1330 | 1338 | break; |
| 1331 | 1339 | case WRDVDD: /* Divisor */ |
| 1332 | | timer_adjust_oneshot(snes_div_timer, cputag_clocks_to_attotime(space->machine, "maincpu", 8), 0); |
| 1340 | snes_ram[WRDVDD] = data; |
| 1341 | // timer_adjust_oneshot(snes_div_timer, cputag_clocks_to_attotime(space->machine, "maincpu", 16), 0); |
| 1342 | { |
| 1343 | UINT16 value, dividend, remainder; |
| 1344 | dividend = remainder = 0; |
| 1345 | value = (snes_ram[WRDIVH] << 8) + snes_ram[WRDIVL]; |
| 1346 | if (snes_ram[WRDVDD] > 0) |
| 1347 | { |
| 1348 | dividend = value / data; |
| 1349 | remainder = value % data; |
| 1350 | } |
| 1351 | else |
| 1352 | { |
| 1353 | dividend = 0xffff; |
| 1354 | remainder = value; |
| 1355 | } |
| 1356 | snes_ram[RDDIVL] = dividend & 0xff; |
| 1357 | snes_ram[RDDIVH] = (dividend >> 8) & 0xff; |
| 1358 | snes_ram[RDMPYL] = remainder & 0xff; |
| 1359 | snes_ram[RDMPYH] = (remainder >> 8) & 0xff; |
| 1360 | } |
| 1333 | 1361 | break; |
| 1334 | 1362 | case HTIMEL: /* H-Count timer settings (low) */ |
| 1335 | 1363 | case HTIMEH: /* H-Count timer settings (high) */ |
| r7476 | r7477 | |
|---|
| 1337 | 1365 | case VTIMEH: /* V-Count timer settings (high) */ |
| 1338 | 1366 | break; |
| 1339 | 1367 | case MDMAEN: /* GDMA channel designation and trigger */ |
| 1340 | | snes_gdma( space, data ); |
| 1368 | snes_gdma( |
| 1341 | 1369 | data = 0; /* Once DMA is done we need to reset all bits to 0 */ |
| 1342 | 1370 | break; |
| 1343 | 1371 | case HDMAEN: /* HDMA channel designation */ |