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r7375 Tuesday 16th February, 2010 at 14:45:15 UTC by Curt Coder
[Z80PIO] Rewritten from scratch to be more accurate. [TRS80M2] Fixed PIO boot error. [ABC80] Partially fixed keyboard input. The Z80-PIO rewrite might have broken some of the affected drivers, please verify and report bugs.

[docs]	messnew.txt
[src/emu/machine]	z80pio.c z80pio.h
[src/mess/drivers]	abc80.c ac1.c bbcbc.c c80.c einstein.c huebler.c kaypro.c kc.c kramermc.c lc80.c llc.c mbee.c mc80.c mpf1.c mz700.c nanos.c nascom1.c p8k.c poly880.c super80.c tiki100.c trs80m2.c vcs80.c xerox820.c z1013.c
[src/mess/includes]	kaypro.h mbee.h trs80m2.h z1013.h
[src/mess/machine]	ac1.c conkort.c kaypro.c kramermc.c llc.c mbee.c mc80.c mz700.c super80.c wd17xx.c z1013.c

src/emu/machine/z80pio.c

r7374	r7375
1	1	/***************************************************************************
2	2
3		Z80 PIO implementation
	3	Zilog Z80 Parallel Input/Output Controller implementation
4	4
5		based on original version (c) 1997, Tatsuyuki Satoh
6
7	5	Copyright Nicola Salmoria and the MAME Team.
8	6	Visit http://mamedev.org for licensing and usage restrictions.
9
	7
10	8	***************************************************************************/
11	9
12		#include "emu.h"
13		#include "z80pio.h"
14		#include "cpu/z80/z80.h"
15		#include "cpu/z80/z80daisy.h"
	10	/*
16	11
	12	TODO:
17	13
	14	- save state
18	15
19		/***************************************************************************
20		DEBUGGING
21		***************************************************************************/
	16	*/
22	17
23		#define VERBOSE      0
	18	#include "emu.h"
	19	#include "z80pio.h"
	20	#include "cpu/z80/z80daisy.h"
24	21
25		#define VPRINTF(x) do { if (VERBOSE) logerror x; } while (0)
26
27
28
29	22	/***************************************************************************
30		CONSTANTS
	23	PARAMETERS
31	24	***************************************************************************/
32	25
33		#define PIO_MODE0      0x00      /* output mode */
34		#define PIO_MODE1      0x01      /* input  mode */
35		#define PIO_MODE2      0x02      /* i/o    mode */
36		#define PIO_MODE3      0x03      /* bit    mode */
	26	#define LOG 1
37	27
38		/* pio controll port operation (bit 0-3) */
39		#define PIO_OP_MODE      0x0f      /* mode select        */
40		#define PIO_OP_INTC      0x07      /* interrupt controll */
41		#define PIO_OP_INTE      0x03      /* interrupt enable   */
	28	enum
	29	{
	30	PORT_A = 0,
	31	PORT_B,
	32	PORT_COUNT
	33	};
42	34
43		/* pio interrupt controll nit */
44		#define PIO_INT_ENABLE   0x80      /* ENABLE : 0=disable , 1=enable */
45		#define PIO_INT_AND      0x40      /* LOGIC  : 0=OR      , 1=AND    */
46		#define PIO_INT_HIGH   0x20      /* LEVEL  : 0=low     , 1=high   */
47		#define PIO_INT_MASK   0x10      /* MASK   : 0=off     , 1=on     */
	35	enum
	36	{
	37	MODE_OUTPUT = 0,
	38	MODE_INPUT,
	39	MODE_BIDIRECTIONAL,
	40	MODE_BIT_CONTROL
	41	};
48	42
	43	enum
	44	{
	45	ANY = 0,
	46	IOR,
	47	MASK
	48	};
49	49
	50	#define ICW_ENABLE_INT      0x80
	51	#define ICW_AND_OR         0x40
	52	#define ICW_AND            0x40
	53	#define ICW_OR            0x00
	54	#define ICW_HIGH_LOW      0x20
	55	#define ICW_HIGH         0x20
	56	#define ICW_LOW            0x00
	57	#define ICW_MASK_FOLLOWS   0x10
50	58
51	59	/***************************************************************************
52	60	TYPE DEFINITIONS
53	61	***************************************************************************/
54	62
55		typedef struct _z80pio z80pio_t;
56		struct _z80pio
	63	typedef struct _pio_port pio_port;
	64	struct _pio_port
57	65	{
58		UINT8 vector[2];                      /* interrupt vector               */
59		devcb_resolved_write_line intr;       /* interrupt callbacks            */
60		devcb_resolved_write_line rdyr[2];    /* RDY active callback            */
61		devcb_resolved_read8  port_read[2];   /* port read callbacks            */
62		devcb_resolved_write8 port_write[2];  /* port write callbacks           */
63		UINT8 mode[2];                        /* mode 00=in,01=out,02=i/o,03=bit*/
64		UINT8 enable[2];                      /* interrupt enable               */
65		UINT8 mask[2];                        /* mask folowers                  */
66		UINT8 dir[2];                         /* direction (bit mode)           */
67		UINT8 rdy[2];                         /* ready pin level                */
68		UINT8 in[2];                          /* input port data                */
69		UINT8 out[2];                         /* output port                    */
70		UINT8 strobe[2];                  /* strobe inputs */
71		UINT8 int_state[2];                   /* interrupt status (daisy chain) */
72		};
	66	devcb_resolved_read8      in_p_func;
	67	devcb_resolved_write8      out_p_func;
	68	devcb_resolved_write_line   out_rdy_func;
73	69
	70	int mode;               /* mode register */
	71	int next_control_word;      /* next control word */
	72	UINT8 input;            /* input latch */
	73	UINT8 output;            /* output latch */
	74	UINT8 ior;               /* input/output register */
	75	int rdy;               /* ready */
	76	int stb;               /* strobe */
74	77
	78	/* interrupts */
	79	int ie;                  /* interrupt enabled */
	80	int ip;                  /* interrupt pending */
	81	int ius;               /* interrupt under service */
	82	UINT8 icw;               /* interrupt control word */
	83	UINT8 vector;            /* interrupt vector */
	84	UINT8 mask;               /* interrupt mask */
	85	int match;               /* logic equation match */
	86	};
75	87
76		/***************************************************************************
77		FUNCTION PROTOTYPES
78		***************************************************************************/
	88	typedef struct _z80pio_t z80pio_t;
	89	struct _z80pio_t
	90	{
	91	pio_port port[PORT_COUNT];
79	92
80		static int z80pio_irq_state(running_device *device);
81		static int z80pio_irq_ack(running_device *device);
82		static void z80pio_irq_reti(running_device *device);
	93	devcb_resolved_write_line   out_int_func;
	94	};
83	95
84
85
86	96	/***************************************************************************
87	97	INLINE FUNCTIONS
88	98	***************************************************************************/
r7374	r7375
92	102	assert(device != NULL);
93	103	assert(device->token != NULL);
94	104	assert(device->type == Z80PIO);
95		return (z80pio_t *)device->token;
	105	return (z80pio_t *) device->token;
96	106	}
97	107
98
99	108	/***************************************************************************
100		INTERNAL STATE MANAGEMENT
	109	IMPLEMENTATION
101	110	***************************************************************************/
102	111
103		INLINE void set_rdy(running_device *device, int ch, int state)
	112	static void check_interrupts(running_device *device)
104	113	{
105		z80pio_t *z80pio = get_safe_token( device );
106		/* set state */
107		z80pio->rdy[ch] = state;
	114	z80pio_t *z80pio = get_safe_token(device);
108	115
109		/* call callback with state */
110		devcb_call_write_line(&z80pio->rdyr[ch], z80pio->rdy[ch]);
	116	int state = CLEAR_LINE;
	117
	118	for (int index = PORT_A; index < PORT_COUNT; index++)
	119	{
	120	pio_port *port = &z80pio->port[index];
	121
	122	if (port->ie && port->ip && !port->ius)
	123	{
	124	state = ASSERT_LINE;
	125	}
	126	}
	127
	128	devcb_call_write_line(&z80pio->out_int_func, state);
111	129	}
112	130
	131	static void trigger_interrupt(running_device *device, int index)
	132	{
	133	z80pio_t *z80pio = get_safe_token(device);
	134	pio_port *port = &z80pio->port[index];
113	135
114		INLINE void interrupt_check(running_device *device)
	136	port->ip = 1;
	137	if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Pending\n", device->tag.cstr(), 'A' + index);
	138
	139	check_interrupts(device);
	140	}
	141
	142	static void set_rdy(running_device *device, int index, int state)
115	143	{
116		z80pio_t *z80pio = get_safe_token( device );
	144	z80pio_t *z80pio = get_safe_token(device);
	145	pio_port *port = &z80pio->port[index];
117	146
118		/* if we have a callback, update it with the current state */
119		devcb_call_write_line(&z80pio->intr, (z80pio_irq_state(device) & Z80_DAISY_INT) ? ASSERT_LINE : CLEAR_LINE);
	147	if (LOG) logerror("Z80PIO '%s' Port %c Ready: %u\n", device->tag.cstr(), 'A' + index, state);
	148
	149	port->rdy = state;
	150	devcb_call_write_line(&port->out_rdy_func, state);
120	151	}
121	152
	153	/*-------------------------------------------------
	154	z80pio_c_r - control register read
	155	-------------------------------------------------*/
122	156
123		static void update_irq_state(running_device *device, int ch)
	157	READ8_DEVICE_HANDLER( z80pio_c_r )
124	158	{
125		z80pio_t *z80pio = get_safe_token( device );
126		int old_state = z80pio->int_state[ch];
127		int irq = 0;
128		int data;
129		if (z80pio->mode[ch] == 0x13 || (z80pio->enable[ch] & PIO_INT_MASK)) return;
	159	z80pio_t *z80pio = get_safe_token(device);
130	160
131		/* only check if interrupts are enabled */
132		if (z80pio->enable[ch] & PIO_INT_ENABLE)
	161	return (z80pio->port[PORT_A].icw & 0xc0) | (z80pio->port[PORT_B].icw >> 4);
	162	}
	163
	164	/*-------------------------------------------------
	165	set_mode - set port mode
	166	-------------------------------------------------*/
	167
	168	static void set_mode(running_device *device, int index, int mode)
	169	{
	170	z80pio_t *z80pio = get_safe_token(device);
	171	pio_port *port = &z80pio->port[index];
	172
	173	if (LOG) logerror("Z80PIO '%s' Port %c Mode: %u\n", device->tag.cstr(), 'A' + index, mode);
	174
	175	switch (mode)
133	176	{
134		/* in mode 3, interrupts are tricky */
135		if (z80pio->mode[ch] == PIO_MODE3)
	177	case MODE_OUTPUT:
	178	/* enable data output */
	179	devcb_call_write8(&port->out_p_func, 0, port->output);
	180
	181	/* assert ready line */
	182	set_rdy(device, index, 1);
	183
	184	/* set mode register */
	185	port->mode = mode;
	186	break;
	187
	188	case MODE_INPUT:
	189	/* set mode register */
	190	port->mode = mode;
	191	break;
	192
	193	case MODE_BIDIRECTIONAL:
	194	if (index == PORT_B)
136	195	{
137		/* fetch input data (ignore output lines) */
138		data = z80pio->in[ch] & z80pio->dir[ch];
	196	logerror("Z80PIO '%s' Port %c Invalid Mode: %u!\n", device->tag.cstr(), 'A' + index, mode);
	197	}
	198	else
	199	{
	200	/* set mode register */
	201	port->mode = mode;
	202	}
	203	break;
139	204
140		/* keep only relevant bits */
141		data &= ~z80pio->mask[ch];
	205	case MODE_BIT_CONTROL:
	206	if ((index == PORT_A) || (z80pio->port[PORT_A].mode != MODE_BIDIRECTIONAL))
	207	{
	208	/* clear ready line */
	209	set_rdy(device, index, 0);
	210	}
142	211
143		/* if active low, invert the bits */
144		if (!(z80pio->enable[ch] & PIO_INT_HIGH))
145		data ^= z80pio->mask[ch];
	212	/* disable interrupts until IOR is written */
	213	port->ie = 0;
	214	check_interrupts(device);
146	215
147		/* if AND logic, interrupt if all bits are set */
148		if (z80pio->enable[ch] & PIO_INT_AND)
149		irq = (data == z80pio->mask[ch]);
	216	/* set logic equation to false */
	217	port->match = 0;
150	218
151		/* otherwise, interrupt if at least one bit is set */
152		else
153		irq = (data != 0);
	219	/* next word is I/O register */
	220	port->next_control_word = IOR;
154	221
155		/* if portB, portA mode 2 check */
156		if (ch && (z80pio->mode[0] == PIO_MODE2))
	222	/* set mode register */
	223	port->mode = mode;
	224	break;
	225	}
	226	}
	227
	228	/*-------------------------------------------------
	229	z80pio_c_w - control register write
	230	-------------------------------------------------*/
	231
	232	WRITE8_DEVICE_HANDLER( z80pio_c_w )
	233	{
	234	z80pio_t *z80pio = get_safe_token(device);
	235	int index = offset & 0x01;
	236	pio_port *port = &z80pio->port[index];
	237
	238	switch (port->next_control_word)
	239	{
	240	case ANY:
	241	if (!BIT(data, 0))
	242	{
	243	/* load interrupt vector */
	244	port->vector = data;
	245	if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Vector: %02x\n", device->tag.cstr(), 'A' + index, data);
	246	}
	247	else
	248	{
	249	switch (data & 0x0f)
157	250	{
158		if (z80pio->rdy[ch] == 0)
159		irq = 1;
	251	case 0x0f: /* select operating mode */
	252	set_mode(device, index, data >> 6);
	253	break;
	254
	255	case 0x07: /* set interrupt control word */
	256	port->icw = data;
	257
	258	if (port->icw & ICW_MASK_FOLLOWS)
	259	{
	260	/* disable interrupts until mask is written */
	261	port->ie = 0;
	262
	263	/* reset pending interrupts */
	264	port->ip = 0;
	265	check_interrupts(device);
	266
	267	/* set logic equation to false */
	268	port->match = 0;
	269
	270	/* next word is mask control */
	271	port->next_control_word = MASK;
	272	}
	273	break;
	274
	275	case 0x03: /* set interrupt enable flip-flop */
	276	port->icw = (data & 0x80) | (port->icw & 0x7f);
	277	if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", device->tag.cstr(), 'A' + index, BIT(data, 7));
	278
	279	/* set interrupt enable */
	280	port->ie = BIT(port->icw, 7);
	281	check_interrupts(device);
	282	break;
	283
	284	default:
	285	logerror("Z80PIO '%s' Port %c Invalid Control Word: %02x!\n", device->tag.cstr(), 'A' + index, data);
160	286	}
161	287	}
	288	break;
162	289
163		/* otherwise, just interrupt when ready is cleared */
164		else
165		irq = (z80pio->rdy[ch] == 0);
166		}
	290	case IOR: /* data direction register */
	291	port->ior = data;
	292	if (LOG) logerror("Z80PIO '%s' Port %c IOR: %02x\n", device->tag.cstr(), 'A' + index, data);
167	293
168		if (irq)
169		z80pio->int_state[ch] |=  Z80_DAISY_INT;
170		else
171		z80pio->int_state[ch] &= ~Z80_DAISY_INT;
	294	/* set interrupt enable */
	295	port->ie = BIT(port->icw, 7);
	296	check_interrupts(device);
172	297
173		if (old_state != z80pio->int_state[ch])
174		interrupt_check(device);
175		}
	298	/* next word is any */
	299	port->next_control_word = ANY;
	300	break;
176	301
	302	case MASK: /* interrupt mask */
	303	port->mask = data;
	304	if (LOG) logerror("Z80PIO '%s' Port %c Mask: %02x\n", device->tag.cstr(), 'A' + index, data);
	305
	306	/* set interrupt enable */
	307	port->ie = BIT(port->icw, 7);
	308	check_interrupts(device);
177	309
	310	/* next word is any */
	311	port->next_control_word = ANY;
	312	break;
	313	}
	314	}
178	315
179		/***************************************************************************
180		CONTROL REGISTER READ/WRITE
181		***************************************************************************/
	316	/*-------------------------------------------------
	317	z80pio_d_r - data register read
	318	-------------------------------------------------*/
182	319
183		WRITE8_DEVICE_HANDLER( z80pio_c_w )
	320	READ8_DEVICE_HANDLER( z80pio_d_r )
184	321	{
185		z80pio_t *z80pio = get_safe_token( device );
	322	z80pio_t *z80pio = get_safe_token(device);
	323	int index = offset & 0x01;
	324	pio_port *port = &z80pio->port[index];
186	325
187		/* There are only 2 channels */
188		offset &= 0x01;
	326	UINT8 data = 0;
189	327
190		/* load direction phase ? */
191		if (z80pio->mode[offset] == 0x13)
	328	switch (port->mode)
192	329	{
193		VPRINTF(("PIO-%c Bits %02x\n", 'A' + offset, data));
194		z80pio->dir[offset] = data;
195		z80pio->mode[offset] = 0x03;
196		return;
197		}
	330	case MODE_OUTPUT:
	331	data = port->output;
	332	break;
198	333
199		/* load mask folows phase ? */
200		if (z80pio->enable[offset] & PIO_INT_MASK)
201		{
202		/* load mask folows */
203		z80pio->mask[offset] = data;
204		z80pio->enable[offset] &= ~PIO_INT_MASK;
205		VPRINTF(("PIO-%c interrupt mask %02x\n",'A'+offset,data ));
206		return;
207		}
	334	case MODE_INPUT:
	335	if (!port->stb)
	336	{
	337	/* input port data */
	338	port->input = devcb_call_read8(&port->in_p_func, 0);
	339	}
208	340
209		switch (data & 0x0f)
210		{
211		case PIO_OP_MODE:   /* mode select 0=out,1=in,2=i/o,3=bit */
212		z80pio->mode[offset] = (data >> 6);
213		VPRINTF(("PIO-%c Mode %x\n", 'A' + offset, z80pio->mode[offset]));
214		if (z80pio->mode[offset] == 0x03)
215		z80pio->mode[offset] = 0x13;
216		return;
	341	data = port->input;
217	342
218		case PIO_OP_INTC:      /* interrupt control */
219		z80pio->enable[offset] = data & 0xf0;
220		z80pio->mask[offset] = 0x00;
221		/* when interrupt enable , set vector request flag */
222		VPRINTF(("PIO-%c Controll %02x\n", 'A' + offset, data));
223		break;
	343	/* clear ready line */
	344	set_rdy(device, index, 0);
224	345
225		case PIO_OP_INTE:      /* interrupt enable controll */
226		z80pio->enable[offset] &= ~PIO_INT_ENABLE;
227		z80pio->enable[offset] |= (data & PIO_INT_ENABLE);
228		VPRINTF(("PIO-%c enable %02x\n", 'A' + offset, data & 0x80));
229		break;
	346	/* assert ready line */
	347	set_rdy(device, index, 1);
	348	break;
230	349
231		default:
232		if (!(data & 1))
233		{
234		z80pio->vector[offset] = data;
235		VPRINTF(("PIO-%c vector %02x\n", 'A' + offset, data));
236		}
237		else
238		VPRINTF(("PIO-%c illegal command %02x\n", 'A' + offset, data));
239		break;
	350	case MODE_BIDIRECTIONAL:
	351	data = port->input;
	352
	353	/* clear ready line */
	354	set_rdy(device, PORT_B, 0);
	355
	356	/* assert ready line */
	357	set_rdy(device, PORT_B, 1);
	358	break;
	359
	360	case MODE_BIT_CONTROL:
	361	/* input port data */
	362	port->input = devcb_call_read8(&port->in_p_func, 0);
	363
	364	data = (port->input & port->ior) | (port->output & (port->ior ^ 0xff));
	365	break;
240	366	}
241	367
242		/* interrupt check */
243		update_irq_state(device, offset);
	368	return data;
244	369	}
245	370
	371	/*-------------------------------------------------
	372	z80pio_d_w - data register write
	373	-------------------------------------------------*/
246	374
247		READ8_DEVICE_HANDLER( z80pio_c_r )
	375	WRITE8_DEVICE_HANDLER( z80pio_d_w )
248	376	{
249		/* There are only 2 channels */
250		offset &= 0x01;
	377	z80pio_t *z80pio = get_safe_token(device);
	378	int index = offset & 0x01;
	379	pio_port *port = &z80pio->port[index];
251	380
252		VPRINTF(("PIO-%c controll read\n", 'A' + offset ));
253		return 0;
254		}
	381	switch (port->mode)
	382	{
	383	case MODE_OUTPUT:
	384	/* clear ready line */
	385	set_rdy(device, index, 0);
255	386
	387	/* latch output data */
	388	port->output = data;
256	389
	390	/* output data to port */
	391	devcb_call_write8(&port->out_p_func, 0, data);
257	392
258		/***************************************************************************
259		DATA REGISTER READ/WRITE
260		***************************************************************************/
	393	/* assert ready line */
	394	set_rdy(device, index, 1);
	395	break;
261	396
262		WRITE8_DEVICE_HANDLER( z80pio_d_w )
263		{
264		z80pio_t *z80pio = get_safe_token( device );
	397	case MODE_INPUT:
	398	/* do nothing */
	399	break;
265	400
266		/* There are only 2 channels */
267		offset &= 0x01;
	401	case MODE_BIDIRECTIONAL:
	402	/* clear ready line */
	403	set_rdy(device, index, 0);
268	404
269		z80pio->out[offset] = data;   /* latch out data */
270		if (z80pio->mode[offset] == PIO_MODE3)
271		devcb_call_write8(&z80pio->port_write[offset], 0, data & ~z80pio->dir[offset]);
272		else
273		devcb_call_write8(&z80pio->port_write[offset], 0, data);
	405	/* latch output data */
	406	port->output = data;
274	407
275		switch (z80pio->mode[offset])
276		{
277		case PIO_MODE0:         /* mode 0 output */
278		case PIO_MODE2:         /* mode 2 i/o */
279		set_rdy(device, offset, 1); /* ready = H */
280		update_irq_state(device, offset);
281		return;
	408	if (!port->stb)
	409	{
	410	/* output data to port */
	411	devcb_call_write8(&port->out_p_func, 0, data);
	412	}
282	413
283		case PIO_MODE1:         /* mode 1 input */
284		case PIO_MODE3:         /* mode 0 bit */
285		return;
	414	/* assert ready line */
	415	set_rdy(device, index, 0);
	416	break;
286	417
287		default:
288		VPRINTF(("PIO-%c data write,bad mode\n",'A'+offset ));
	418	case MODE_BIT_CONTROL:
	419	/* latch output data */
	420	port->output = data;
	421
	422	/* output data to port */
	423	devcb_call_write8(&port->out_p_func, 0, port->ior | (port->output & (port->ior ^ 0xff)));
	424	break;
289	425	}
290	426	}
291	427
	428	/*-------------------------------------------------
	429	z80pio_cd_ba_r - register read
	430	-------------------------------------------------*/
292	431
293		READ8_DEVICE_HANDLER( z80pio_d_r )
	432	READ8_DEVICE_HANDLER( z80pio_cd_ba_r )
294	433	{
295		z80pio_t *z80pio = get_safe_token( device );
	434	int index = BIT(offset, 0);
296	435
297		/* There are only 2 channels */
298		offset &= 0x01;
	436	return BIT(offset, 1) ? z80pio_c_r(device, index) : z80pio_d_r(device, index);
	437	}
299	438
300		switch (z80pio->mode[offset])
301		{
302		case PIO_MODE0:         /* mode 0 output */
303		return z80pio->out[offset];
	439	/*-------------------------------------------------
	440	z80pio_cd_ba_w - register write
	441	-------------------------------------------------*/
304	442
305		case PIO_MODE1:         /* mode 1 input */
306		set_rdy(device, offset, 1);   /* ready = H */
307		if(z80pio->port_read[offset].read != NULL)
308		z80pio->in[offset] = devcb_call_read8(&z80pio->port_read[offset], 0);
309		update_irq_state(device, offset);
310		return z80pio->in[offset];
	443	WRITE8_DEVICE_HANDLER( z80pio_cd_ba_w )
	444	{
	445	int index = BIT(offset, 0);
311	446
312		case PIO_MODE2:         /* mode 2 i/o */
313		if (offset) VPRINTF(("PIO-B mode 2 \n"));
314		set_rdy(device, 1, 1); /* brdy = H */
315		if(z80pio->port_read[offset].read != NULL)
316		z80pio->in[offset] = devcb_call_read8(&z80pio->port_read[offset], 0);
317		update_irq_state(device, offset);
318		return z80pio->in[offset];
	447	BIT(offset, 1) ? z80pio_c_w(device, index, data) : z80pio_d_w(device, index, data);
	448	}
319	449
320		case PIO_MODE3:         /* mode 3 bit */
321		if(z80pio->port_read[offset].read != NULL)
322		z80pio->in[offset] = devcb_call_read8(&z80pio->port_read[offset], 0);
323		return (z80pio->in[offset] & z80pio->dir[offset]) | (z80pio->out[offset] & ~z80pio->dir[offset]);
324		}
325		VPRINTF(("PIO-%c data read,bad mode\n",'A'+offset ));
326		return 0;
	450	/*-------------------------------------------------
	451	z80pio_ba_cd_r - register read
	452	-------------------------------------------------*/
	453
	454	READ8_DEVICE_HANDLER( z80pio_ba_cd_r )
	455	{
	456	int index = BIT(offset, 1);
	457
	458	return BIT(offset, 0) ? z80pio_c_r(device, index) : z80pio_d_r(device, index);
327	459	}
328	460
	461	/*-------------------------------------------------
	462	z80pio_ba_cd_w - register write
	463	-------------------------------------------------*/
329	464
	465	WRITE8_DEVICE_HANDLER( z80pio_ba_cd_w )
	466	{
	467	int index = BIT(offset, 1);
330	468
331		/***************************************************************************
332		PORT I/O
333		***************************************************************************/
	469	BIT(offset, 0) ? z80pio_c_w(device, index, data) : z80pio_d_w(device, index, data);
	470	}
334	471
335		WRITE8_DEVICE_HANDLER( z80pio_p_w )
	472	/*-------------------------------------------------
	473	z80pio_pa_r - port A read
	474	-------------------------------------------------*/
	475
	476	READ8_DEVICE_HANDLER( z80pio_pa_r )
336	477	{
337		z80pio_t *z80pio = get_safe_token( device );
	478	z80pio_t *z80pio = get_safe_token(device);
	479	pio_port *port = &z80pio->port[PORT_A];
	480
	481	UINT8 data = 0xff;
338	482
339		/* There are only 2 channels */
340		offset &= 0x01;
	483	switch (port->mode)
	484	{
	485	case MODE_OUTPUT:
	486	data = port->output;
	487	break;
341	488
342		z80pio->in[offset]  = data;
343		switch (z80pio->mode[offset])
	489	case MODE_BIDIRECTIONAL:
	490	data = port->output;
	491	break;
	492
	493	case MODE_BIT_CONTROL:
	494	data = port->ior | (port->output & (port->ior ^ 0xff));
	495	break;
	496	}
	497
	498	return data;
	499	}
	500
	501	/*-------------------------------------------------
	502	check_equation - check bit logic equation
	503	-------------------------------------------------*/
	504
	505	static void check_equation(running_device *device, int index, UINT8 data)
	506	{
	507	z80pio_t *z80pio = get_safe_token(device);
	508	pio_port *port = &z80pio->port[index];
	509
	510	if (port->mask == 0xff) return;
	511
	512	int bit;
	513	int match = 0;
	514
	515	int edge = (port->icw & ICW_HIGH) ? 1 : 0;
	516
	517	UINT8 mask = port->mask;
	518	UINT8 ior = port->ior;
	519	UINT8 old_data = port->input;
	520
	521	if (old_data == data) return;
	522
	523	for (bit = 0; bit < 8; bit++)
344	524	{
345		case PIO_MODE0:
346		VPRINTF(("PIO-%c OUTPUT mode and data write\n",'A'+offset ));
347		break;
	525	if (BIT(mask, bit)) continue; /* masked out */
	526	if (!BIT(ior, bit)) continue; /* output bit */
348	527
349		case PIO_MODE2:   /* only port A */
350		offset = 1;      /* handshake and IRQ is use portB */
	528	if ((BIT(old_data, bit) ^ edge) && !(BIT(data, bit) ^ edge)) /* falling edge */
	529	{
	530	/* logic equation is true, until proven otherwise */
	531	match = 1;
351	532
352		case PIO_MODE1:
353		set_rdy(device, offset, 0);
354		update_irq_state(device, offset);
	533	if (LOG) logerror("Z80PIO '%s' Port %c Edge Transition detected on bit %u, data %02x %02x\n", device->tag.cstr(), 'A' + index, bit, old_data, data);
	534	}
	535	else if (port->icw & ICW_AND)
	536	{
	537	/* all bits must match in AND mode, so logic equation is false */
	538	match = 0;
355	539	break;
	540	}
	541	}
356	542
357		case PIO_MODE3:
358		/* irq check */
359		update_irq_state(device, offset);
360		break;
	543	if (!port->match && match) /* rising edge */
	544	{
	545	/* latch data */
	546	port->input = data;
	547
	548	/* trigger interrupt only once */
	549	trigger_interrupt(device, index);
361	550	}
	551
	552	port->match = match;
362	553	}
363	554
	555	/*-------------------------------------------------
	556	z80pio_pa_w - port A write
	557	-------------------------------------------------*/
364	558
365		READ8_DEVICE_HANDLER( z80pio_p_r )
	559	WRITE8_DEVICE_HANDLER( z80pio_pa_w )
366	560	{
367		z80pio_t *z80pio = get_safe_token( device );
	561	z80pio_t *z80pio = get_safe_token(device);
	562	pio_port *port = &z80pio->port[PORT_A];
	563
	564	if (port->mode == MODE_BIT_CONTROL)
	565	{
	566	check_equation(device, PORT_A, data);
	567	}
	568	}
368	569
369		/* There are only 2 channels */
370		offset &= 0x01;
	570	/*-------------------------------------------------
	571	z80pio_pb_r - port B read
	572	-------------------------------------------------*/
371	573
372		switch (z80pio->mode[offset])
	574	READ8_DEVICE_HANDLER( z80pio_pb_r )
	575	{
	576	z80pio_t *z80pio = get_safe_token(device);
	577	pio_port *port = &z80pio->port[PORT_B];
	578
	579	UINT8 data = 0xff;
	580
	581	switch (port->mode)
373	582	{
374		case PIO_MODE2:      /* port A only */
375		case PIO_MODE0:
376		set_rdy(device, offset, 0);
377		update_irq_state(device, offset);
378		break;
	583	case MODE_OUTPUT:
	584	data = port->output;
	585	break;
379	586
380		case PIO_MODE1:
381		VPRINTF(("PIO-%c INPUT mode and data read\n",'A'+offset ));
382		break;
	587	case MODE_BIT_CONTROL:
	588	data = port->ior | (port->output & (port->ior ^ 0xff));
	589	break;
	590	}
383	591
384		case PIO_MODE3:
385		return (z80pio->in[offset] & z80pio->dir[offset]) | (z80pio->out[offset] & ~z80pio->dir[offset]);
	592	return data;
	593	}
	594
	595	/*-------------------------------------------------
	596	z80pio_pb_w - port B write
	597	-------------------------------------------------*/
	598
	599	WRITE8_DEVICE_HANDLER( z80pio_pb_w )
	600	{
	601	z80pio_t *z80pio = get_safe_token(device);
	602	pio_port *port = &z80pio->port[PORT_B];
	603
	604	if (port->mode == MODE_BIT_CONTROL)
	605	{
	606	check_equation(device, PORT_B, data);
386	607	}
387		return z80pio->out[offset];
388	608	}
389	609
	610	/*-------------------------------------------------
	611	strobe - handle strobe signal
	612	-------------------------------------------------*/
390	613
391		/***************************************************************************
392		STROBE STATE MANAGEMENT
393		***************************************************************************/
394
395		static void z80pio_update_strobe(running_device *device, int ch, int state)
	614	static void strobe(running_device *device, int index, int state)
396	615	{
397		z80pio_t *z80pio = get_safe_token( device );
	616	z80pio_t *z80pio = get_safe_token(device);
	617	pio_port *port = &z80pio->port[index];
398	618
399		switch (z80pio->mode[ch])
	619	if (z80pio->port[PORT_A].mode == MODE_BIDIRECTIONAL)
400	620	{
401		/* output mode: a positive edge is used by peripheral to acknowledge
402		the receipt of data */
403		case PIO_MODE0:
	621	pio_port *port_a = &z80pio->port[PORT_A];
	622
	623	switch (index)
404	624	{
405		/* ensure valid */
406		state = state & 0x01;
	625	case PORT_A:
	626	if (port_a->rdy) /* port A ready */
	627	{
	628	if (port->stb && !state) /* falling edge */
	629	{
	630	devcb_call_write8(&port_a->out_p_func, 0, port_a->output);
	631	}
	632	else if (!port->stb && state) /* rising edge */
	633	{
	634	trigger_interrupt(device, PORT_A);
	635	set_rdy(device, PORT_A, 0);
	636	}
	637	}
	638	break;
407	639
408		/* strobe changed state? */
409		if ((z80pio->strobe[ch] ^ state) != 0)
	640	case PORT_B:
	641	if (port->rdy) /* port B ready */
410	642	{
411		/* yes */
412		if (state != 0)
	643	if (port->stb && !state) /* falling edge */
413	644	{
414		/* positive edge */
415		VPRINTF(("PIO-%c positive strobe\n",'A' + ch));
416
417		/* ready is now inactive */
418		set_rdy(device, ch, 0);
419
420		/* int enabled? */
421		if (z80pio->enable[ch] & PIO_INT_ENABLE)
422		{
423		/* trigger an int request */
424		z80pio->int_state[ch] |= Z80_DAISY_INT;
425		}
	645	port_a->input = devcb_call_read8(&port_a->in_p_func, 0);
426	646	}
	647	else if (!port->stb && state) /* rising edge */
	648	{
	649	trigger_interrupt(device, PORT_A);
	650	set_rdy(device, PORT_B, 0);
	651	}
427	652	}
428
429		/* store strobe state */
430		z80pio->strobe[ch] = state;
431
432		/* check interrupt */
433		interrupt_check(device);
	653	break;
434	654	}
435		break;
	655	}
	656	else
	657	{
	658	switch (port->mode)
	659	{
	660	case MODE_OUTPUT:
	661	if (!port->stb && state) /* rising edge */
	662	{
	663	trigger_interrupt(device, index);
	664	set_rdy(device, index, 0);
	665	}
	666	break;
436	667
437		/* input mode: strobe is used by peripheral to load data from the peripheral
438		into port a input register, data loaded into pio when signal is active */
439
440		default:
	668	case MODE_INPUT:
	669	if (!state)
	670	{
	671	port->input = devcb_call_read8(&port->in_p_func, 0);
	672	}
	673	else if (!port->stb && state) /* rising edge */
	674	{
	675	trigger_interrupt(device, index);
	676	set_rdy(device, index, 0);
	677	}
441	678	break;
	679	}
442	680	}
	681
	682	port->stb = state;
443	683	}
444	684
	685	/*-------------------------------------------------
	686	z80pio_astb_w - port A strobe
	687	-------------------------------------------------*/
445	688
446		void z80pio_astb_w(running_device *device, int state) { z80pio_update_strobe(device, 0, state); }
447		void z80pio_bstb_w(running_device *device, int state) { z80pio_update_strobe(device, 1, state); }
	689	WRITE_LINE_DEVICE_HANDLER( z80pio_astb_w )
	690	{
	691	strobe(device, PORT_A, state);
	692	}
448	693
	694	/*-------------------------------------------------
	695	z80pio_bstb_w - port B strobe
	696	-------------------------------------------------*/
449	697
	698	WRITE_LINE_DEVICE_HANDLER( z80pio_bstb_w )
	699	{
	700	strobe(device, PORT_B, state);
	701	}
450	702
451		/***************************************************************************
452		DAISY CHAIN INTERFACE
453		***************************************************************************/
	703	/*-------------------------------------------------
	704	z80pio_irq_state - read interrupt state
	705	-------------------------------------------------*/
454	706
455	707	static int z80pio_irq_state(running_device *device)
456	708	{
457		z80pio_t *z80pio = get_safe_token( device );
	709	z80pio_t *z80pio = get_safe_token(device);
	710
458	711	int state = 0;
459		int ch;
	712
	713	for (int index = PORT_A; index < PORT_COUNT; index++)
	714	{
	715	pio_port *port = &z80pio->port[index];
460	716
461		/* loop over all channels */
462		for (ch = 0; ch < 2; ch++)
463		{
464		/* if we're servicing a request, don't indicate more interrupts */
465		if (z80pio->int_state[ch] & Z80_DAISY_IEO)
	717	if (port->ius)
466	718	{
467		state |= Z80_DAISY_IEO;
468		break;
	719	/* interrupt under service */
	720	return Z80_DAISY_IEO;
469	721	}
470		state |= z80pio->int_state[ch];
	722	else if (port->ie && port->ip)
	723	{
	724	/* interrupt pending */
	725	state = Z80_DAISY_INT;
	726	}
471	727	}
	728
472	729	return state;
473	730	}
474	731
	732	/*-------------------------------------------------
	733	z80pio_irq_ack - interrupt acknowledge
	734	-------------------------------------------------*/
475	735
476	736	static int z80pio_irq_ack(running_device *device)
477	737	{
478		z80pio_t *z80pio = get_safe_token( device );
479		int ch;
	738	z80pio_t *z80pio = get_safe_token(device);
480	739
481		/* loop over all channels */
482		for (ch = 0; ch < 2; ch++)
	740	for (int index = PORT_A; index < PORT_COUNT; index++)
	741	{
	742	pio_port *port = &z80pio->port[index];
483	743
484		/* find the first channel with an interrupt requested */
485		if (z80pio->int_state[ch] & Z80_DAISY_INT)
	744	if (port->ip)
486	745	{
487		/* clear interrupt, switch to the IEO state, and update the IRQs */
488		z80pio->int_state[ch] = Z80_DAISY_IEO;
489		interrupt_check(device);
490		return z80pio->vector[ch];
	746	if (LOG) logerror("Z80PIO '%s' Interrupt Acknowledge\n", device->tag.cstr());
	747
	748	/* clear interrupt pending flag */
	749	port->ip = 0;
	750	check_interrupts(device);
	751
	752	/* set interrupt under service flag */
	753	port->ius = 1;
	754
	755	return port->vector;
491	756	}
	757	}
492	758
493		VPRINTF(("z80pio_irq_ack: failed to find an interrupt to ack!"));
494		return z80pio->vector[0];
	759	logerror("z80pio_irq_ack: failed to find an interrupt to ack!\n");
	760
	761	return 0;
495	762	}
496	763
	764	/*-------------------------------------------------
	765	z80pio_irq_reti - return from interrupt
	766	-------------------------------------------------*/
497	767
498	768	static void z80pio_irq_reti(running_device *device)
499	769	{
500		z80pio_t *z80pio = get_safe_token( device );
501		int ch;
	770	z80pio_t *z80pio = get_safe_token(device);
502	771
503		/* loop over all channels */
504		for (ch = 0; ch < 2; ch++)
	772	for (int index = PORT_A; index < PORT_COUNT; index++)
	773	{
	774	pio_port *port = &z80pio->port[index];
505	775
506		/* find the first channel with an IEO pending */
507		if (z80pio->int_state[ch] & Z80_DAISY_IEO)
	776	if (port->ius)
508	777	{
509		/* clear the IEO state and update the IRQs */
510		z80pio->int_state[ch] &= ~Z80_DAISY_IEO;
511		interrupt_check(device);
	778	if (LOG) logerror("Z80PIO '%s' Return from Interrupt\n", device->tag.cstr());
	779
	780	/* clear interrupt under service flag */
	781	port->ius = 0;
	782	check_interrupts(device);
	783
512	784	return;
513	785	}
	786	}
514	787
515		VPRINTF(("z80pio_irq_reti: failed to find an interrupt to clear IEO on!"));
	788	logerror("z80pio_irq_reti: failed to find an interrupt to clear IEO on!\n");
516	789	}
517	790
	791	/*-------------------------------------------------
	792	DEVICE_START( z80pio )
	793	-------------------------------------------------*/
518	794
519		/***************************************************************************
520		READ/WRITE HANDLERS
521		***************************************************************************/
522		READ8_DEVICE_HANDLER(z80pio_r)
	795	static DEVICE_START( z80pio )
523	796	{
524		return (offset & 2) ? z80pio_c_r(device, offset & 1) : z80pio_d_r(device, offset & 1);
525		}
	797	z80pio_t *z80pio = get_safe_token(device);
	798	z80pio_interface *intf = (z80pio_interface *)device->baseconfig().static_config;
526	799
527		WRITE8_DEVICE_HANDLER(z80pio_w)
528		{
529		if (offset & 2)
530		z80pio_c_w(device, offset & 1, data);
531		else
532		z80pio_d_w(device, offset & 1, data);
533		}
	800	/* resolve callbacks */
	801	devcb_resolve_write_line(&z80pio->out_int_func, &intf->out_int_func, device);
	802	devcb_resolve_read8(&z80pio->port[PORT_A].in_p_func, &intf->in_pa_func, device);
	803	devcb_resolve_write8(&z80pio->port[PORT_A].out_p_func, &intf->out_pa_func, device);
	804	devcb_resolve_write_line(&z80pio->port[PORT_A].out_rdy_func, &intf->out_ardy_func, device);
	805	devcb_resolve_read8(&z80pio->port[PORT_B].in_p_func, &intf->in_pb_func, device);
	806	devcb_resolve_write8(&z80pio->port[PORT_B].out_p_func, &intf->out_pb_func, device);
	807	devcb_resolve_write_line(&z80pio->port[PORT_B].out_rdy_func, &intf->out_brdy_func, device);
534	808
535		READ8_DEVICE_HANDLER(z80pio_alt_r)
536		{
537		int channel = BIT(offset, 1);
538		return (offset & 1) ? z80pio_c_r(device, channel) : z80pio_d_r(device, channel);
	809	/* register for state saving */
	810	//   state_save_register_device_item(device, 0, z80pio->);
539	811	}
540	812
541		WRITE8_DEVICE_HANDLER(z80pio_alt_w)
542		{
543		int channel = BIT(offset, 1);
544		if (offset & 1)
545		z80pio_c_w(device, channel, data);
546		else
547		z80pio_d_w(device, channel, data);
548		}
	813	/*-------------------------------------------------
	814	DEVICE_RESET( z80pio )
	815	-------------------------------------------------*/
549	816
550		static DEVICE_START( z80pio )
	817	static DEVICE_RESET( z80pio )
551	818	{
552		const z80pio_interface *intf = (const z80pio_interface *)device->baseconfig().static_config;
553		z80pio_t *z80pio = get_safe_token( device );
	819	z80pio_t *z80pio = get_safe_token(device);
554	820
555		devcb_resolve_write_line(&z80pio->intr, &intf->intr, device);
556		devcb_resolve_read8(&z80pio->port_read[0], &intf->portAread, device);
557		devcb_resolve_read8(&z80pio->port_read[1], &intf->portBread, device);
558		devcb_resolve_write8(&z80pio->port_write[0], &intf->portAwrite, device);
559		devcb_resolve_write8(&z80pio->port_write[1], &intf->portBwrite, device);
560		devcb_resolve_write_line(&z80pio->rdyr[0], &intf->rdyA, device);
561		devcb_resolve_write_line(&z80pio->rdyr[1], &intf->rdyB, device);
	821	for (int index = PORT_A; index < PORT_COUNT; index++)
	822	{
	823	pio_port *port = &z80pio->port[index];
562	824
563		/* register for save states */
564		state_save_register_device_item_array(device, 0, z80pio->vector);
565		state_save_register_device_item_array(device, 0, z80pio->mode);
566		state_save_register_device_item_array(device, 0, z80pio->enable);
567		state_save_register_device_item_array(device, 0, z80pio->mask);
568		state_save_register_device_item_array(device, 0, z80pio->dir);
569		state_save_register_device_item_array(device, 0, z80pio->rdy);
570		state_save_register_device_item_array(device, 0, z80pio->in);
571		state_save_register_device_item_array(device, 0, z80pio->out);
572		state_save_register_device_item_array(device, 0, z80pio->strobe);
573		state_save_register_device_item_array(device, 0, z80pio->int_state);
574		}
	825	/* set mode 1 */
	826	set_mode(device, index, MODE_INPUT);
575	827
	828	/* reset port mask registers */
	829	port->mask = 0;
576	830
577		static DEVICE_RESET( z80pio )
578		{
579		z80pio_t   *z80pio = get_safe_token( device );
580		int i;
	831	/* reset interrupt enable flip-flops */
	832	port->icw &= ~ICW_ENABLE_INT;
	833	port->ie = 0;
	834	port->ip = 0;
	835	port->ius = 0;
	836	port->match = 0;
581	837
582		for (i = 0; i < 2; i++)
583		{
584		z80pio->mask[i]   = 0xff;   /* mask all on */
585		z80pio->enable[i] = 0x00;   /* disable     */
586		z80pio->mode[i]   = 0x01;   /* mode input  */
587		z80pio->dir[i]    = 0x01;   /* dir  input  */
588		set_rdy(device, i, 0);   /* RDY = low   */
589		z80pio->out[i]    = 0x00;   /* outdata = 0 */
590		z80pio->int_state[i] = 0;
591		z80pio->strobe[i] = 0;
	838	/* reset all bits of the data I/O register */
	839	port->ior = 0;
	840
	841	/* set all bits of the mask control register */
	842	port->mask = 0xff;
	843
	844	/* reset output register */
	845	port->output = 0;
	846
	847	/* clear ready line */
	848	set_rdy(device, index, 0);
592	849	}
593		interrupt_check(device);
594	850	}
595	851
	852	/*-------------------------------------------------
	853	DEVICE_GET_INFO( z80pio )
	854	-------------------------------------------------*/
596	855
597	856	DEVICE_GET_INFO( z80pio )
598	857	{
r7374	r7375
612	871	case DEVINFO_FCT_IRQ_RETI:                  info->f = (genf *)z80pio_irq_reti;      break;
613	872
614	873	/* --- the following bits of info are returned as NULL-terminated strings --- */
615		case DEVINFO_STR_NAME:                     strcpy(info->s, "Zilog Z80 PIO");      break;
	874	case DEVINFO_STR_NAME:                     strcpy(info->s, "Z8420");            break;
616	875	case DEVINFO_STR_FAMILY:                  strcpy(info->s, "Z80");               break;
617	876	case DEVINFO_STR_VERSION:                  strcpy(info->s, "1.0");               break;
618	877	case DEVINFO_STR_SOURCE_FILE:               strcpy(info->s, __FILE__);            break;
619	878	case DEVINFO_STR_CREDITS:                  strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
620	879	}
621	880	}
622

src/emu/machine/z80pio.h

r7374	r7375
1	1	/***************************************************************************
2	2
3		Z80 PIO (Z8420) implementation
	3	Zilog Z80 Parallel Input/Output Controller implementation
4	4
5	5	Copyright Nicola Salmoria and the MAME Team.
6	6	Visit http://mamedev.org for licensing and usage restrictions.
r7374	r7375
16	16	PA7   7 |             | 34  PB7
17	17	PA6   8 |             | 33  PB6
18	18	PA5   9 |             | 32  PB5
19		PA4  10 |   Z80-PIO   | 31  PB4
20		GND  11 |             | 30  PB3
	19	PA4  10 |    Z8420    | 31  PB4
	20	GND  11 |             | 30  PB3
21	21	PA3  12 |             | 29  PB2
22	22	PA2  13 |             | 28  PB1
23	23	PA1  14 |             | 27  PB0
r7374	r7375
30	30
31	31	***************************************************************************/
32	32
33		#ifndef __Z80PIO_H__
34		#define __Z80PIO_H__
	33	#ifndef __Z80PIO__
	34	#define __Z80PIO__
35	35
	36	/***************************************************************************
	37	MACROS / CONSTANTS
	38	***************************************************************************/
36	39
	40	#define Z80PIO DEVICE_GET_INFO_NAME(z80pio)
37	41
	42	#define MDRV_Z80PIO_ADD(_tag, _clock, _intrf) \
	43	MDRV_DEVICE_ADD(_tag, Z80PIO, _clock) \
	44	MDRV_DEVICE_CONFIG(_intrf)
	45
	46	#define Z80PIO_INTERFACE(_name) \
	47	const z80pio_interface (_name) =
	48
38	49	/***************************************************************************
39	50	TYPE DEFINITIONS
40	51	***************************************************************************/
r7374	r7375
42	53	typedef struct _z80pio_interface z80pio_interface;
43	54	struct _z80pio_interface
44	55	{
45		devcb_write_line intr;    /* callback when change interrupt status */
46		devcb_read8 portAread;    /* port A read callback */
47		devcb_read8 portBread;    /* port B read callback */
48		devcb_write8 portAwrite;  /* port A write callback */
49		devcb_write8 portBwrite;  /* port B write callback */
50		devcb_write_line rdyA;    /* portA ready active callback */
51		devcb_write_line rdyB;    /* portB ready active callback */
52		};
	56	devcb_write_line   out_int_func;
53	57
	58	devcb_read8         in_pa_func;
	59	devcb_write8      out_pa_func;
	60	devcb_write_line   out_ardy_func;
54	61
	62	devcb_read8         in_pb_func;
	63	devcb_write8      out_pb_func;
	64	devcb_write_line   out_brdy_func;
	65	};
55	66
56	67	/***************************************************************************
57		DEVICE CONFIGURATION MACROS
	68	PROTOTYPES
58	69	***************************************************************************/
59	70
60		#define MDRV_Z80PIO_ADD(_tag, _intrf) \
61		MDRV_DEVICE_ADD(_tag, Z80PIO, 0) \
62		MDRV_DEVICE_CONFIG(_intrf)
	71	DEVICE_GET_INFO( z80pio );
63	72
64
65
66		/***************************************************************************
67		CONTROL REGISTER READ/WRITE
68		***************************************************************************/
69
70		WRITE8_DEVICE_HANDLER( z80pio_c_w );
	73	/* control register access */
71	74	READ8_DEVICE_HANDLER( z80pio_c_r );
	75	WRITE8_DEVICE_HANDLER( z80pio_c_w );
72	76
73
74		/***************************************************************************
75		DATA REGISTER READ/WRITE
76		***************************************************************************/
77
78		WRITE8_DEVICE_HANDLER( z80pio_d_w );
	77	/* data register access */
79	78	READ8_DEVICE_HANDLER( z80pio_d_r );
	79	WRITE8_DEVICE_HANDLER( z80pio_d_w );
80	80
	81	/* register access */
	82	READ8_DEVICE_HANDLER( z80pio_cd_ba_r );
	83	WRITE8_DEVICE_HANDLER( z80pio_cd_ba_w );
81	84
82		/***************************************************************************
83		PORT I/O
84		***************************************************************************/
	85	READ8_DEVICE_HANDLER( z80pio_ba_cd_r );
	86	WRITE8_DEVICE_HANDLER( z80pio_ba_cd_w );
85	87
86		WRITE8_DEVICE_HANDLER( z80pio_p_w );
87		READ8_DEVICE_HANDLER( z80pio_p_r );
	88	/* port access */
	89	READ8_DEVICE_HANDLER( z80pio_pa_r );
	90	WRITE8_DEVICE_HANDLER( z80pio_pa_w );
88	91
	92	READ8_DEVICE_HANDLER( z80pio_pb_r );
	93	WRITE8_DEVICE_HANDLER( z80pio_pb_w );
89	94
90		/***************************************************************************
91		STROBE STATE MANAGEMENT
92		***************************************************************************/
	95	/* strobe */
	96	WRITE_LINE_DEVICE_HANDLER( z80pio_astb_w );
	97	WRITE_LINE_DEVICE_HANDLER( z80pio_bstb_w );
93	98
94		void z80pio_astb_w(running_device *device, int state);
95		void z80pio_bstb_w(running_device *device, int state);
96
97
98		/***************************************************************************
99		READ/WRITE HANDLERS
100		***************************************************************************/
101		READ8_DEVICE_HANDLER(z80pio_r);
102		WRITE8_DEVICE_HANDLER(z80pio_w);
103		READ8_DEVICE_HANDLER(z80pio_alt_r);
104		WRITE8_DEVICE_HANDLER(z80pio_alt_w);
105
106
107		/* ----- device interface ----- */
108
109		#define Z80PIO DEVICE_GET_INFO_NAME(z80pio)
110		DEVICE_GET_INFO( z80pio );
111
112	99	#endif

src/mess/includes/trs80m2.h

r7374	r7375
41	41
42	42	/* devices */
43	43	running_device *z80ctc;
	44	running_device *z80pio;
44	45	running_device *mc6845;
45	46	running_device *centronics;
46	47	running_device *floppy;

src/mess/includes/mbee.h

r7374	r7375
28	28	MACHINE_RESET( mbee );
29	29
30	30	READ8_HANDLER ( mbee_fdc_status_r );
31		READ8_DEVICE_HANDLER( mbee_pio_r );
32	31	WRITE8_HANDLER ( mbee_fdc_motor_w );
33		WRITE8_DEVICE_HANDLER( mbee_pio_w );
34	32	INTERRUPT_GEN( mbee_interrupt );
35	33	Z80BIN_EXECUTE( mbee );
36	34	QUICKLOAD_LOAD( mbee );

src/mess/includes/kaypro.h

r7374	r7375
14	14	extern const z80sio_interface kaypro_sio_intf;
15	15	extern const wd17xx_interface kaypro_wd1793_interface;
16	16
17		READ8_DEVICE_HANDLER( kayproii_pio_r );
18	17	READ8_DEVICE_HANDLER( kaypro_sio_r );
19	18	READ8_DEVICE_HANDLER( kaypro2x_sio_r );
20	19
21	20	READ8_HANDLER( kaypro2x_system_port_r );
22	21
23		WRITE8_DEVICE_HANDLER( kayproii_pio_w );
24	22	WRITE8_DEVICE_HANDLER( kaypro_sio_w );
25	23	WRITE8_DEVICE_HANDLER( kaypro2x_sio_w );
26	24

src/mess/includes/z1013.h

r7374	r7375
23	23
24	24	extern SNAPSHOT_LOAD( z1013 );
25	25
26		extern READ8_DEVICE_HANDLER(z1013_z80pio_r);
27		extern WRITE8_DEVICE_HANDLER(z1013_z80pio_w);
28
29	26	/*----------- defined in video/z1013.c -----------*/
30	27	extern UINT8 *z1013_video_ram;
31	28

src/mess/machine/conkort.c

r7374	r7375
480	480
481	481	static ADDRESS_MAP_START( slow_io_map, ADDRESS_SPACE_IO, 8 )
482	482	ADDRESS_MAP_GLOBAL_MASK(0xff)
483		AM_RANGE(0x70, 0x73) AM_MIRROR(0x0c) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_alt_r, z80pio_alt_w)
	483	AM_RANGE(0x70, 0x73) AM_MIRROR(0x0c) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_ba_cd_r, z80pio_ba_cd_w)
484	484	AM_RANGE(0xb0, 0xb3) AM_MIRROR(0x0c) AM_DEVREADWRITE(WD1791_TAG, wd17xx_r, wd17xx_w)
485	485	AM_RANGE(0xd0, 0xd0) AM_MIRROR(0x0f) AM_WRITE(slow_status_w)
486	486	AM_RANGE(0xe0, 0xe0) AM_MIRROR(0x0f) AM_WRITE(slow_ctrl_w)
r7374	r7375
626	626	conkort->pio_ardy = state;
627	627	}
628	628
629		static const z80pio_interface conkort_pio_intf =
	629	static Z80PIO_INTERFACE( conkort_pio_intf )
630	630	{
631	631	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),      /* interrupt callback */
632	632	DEVCB_HANDLER(conkort_pio_port_a_r),   /* port A read callback */
	633	DEVCB_HANDLER(conkort_pio_port_a_w),   /* port A write callback */
	634	DEVCB_LINE(conkort_pio_ardy_w),         /* port A ready callback */
633	635	DEVCB_HANDLER(conkort_pio_port_b_r),   /* port B read callback */
634		DEVCB_HANDLER(conkort_pio_port_a_w),   /* port A write callback */
635	636	DEVCB_HANDLER(conkort_pio_port_b_w),   /* port B write callback */
636		DEVCB_LINE(conkort_pio_ardy_w),         /* port A ready callback */
637	637	DEVCB_NULL                        /* port B ready callback */
638	638	};
639	639
r7374	r7375
773	773	MDRV_CPU_IO_MAP(slow_io_map)
774	774	MDRV_CPU_CONFIG(slow_daisy_chain)
775	775
776		MDRV_Z80PIO_ADD(Z80PIO_TAG, conkort_pio_intf)
	776	MDRV_Z80PIO_ADD(Z80PIO_TAG, XTAL_4MHz/2, conkort_pio_intf)
777	777	MDRV_WD179X_ADD(WD1791_TAG, slow_wd17xx_interface)
778	778
779	779	MDRV_FLOPPY_2_DRIVES_ADD(abc800_floppy_config)

src/mess/machine/mc80.c

r7374	r7375
68	68	{
69	69	}
70	70
71		const z80pio_interface mc8020_z80pio_intf =
	71	Z80PIO_INTERFACE( mc8020_z80pio_intf )
72	72	{
73	73	DEVCB_NULL,   /* callback when change interrupt status */
74	74	DEVCB_HANDLER(mc80_port_a_r),
	75	DEVCB_HANDLER(mc80_port_a_w),
	76	DEVCB_NULL,
75	77	DEVCB_HANDLER(mc80_port_b_r),
76		DEVCB_HANDLER(mc80_port_a_w),
77	78	DEVCB_HANDLER(mc80_port_b_w),
78		DEVCB_NULL,
79	79	DEVCB_NULL
80	80	};
81	81
r7374	r7375
140	140	{
141	141	}
142	142
143		const z80pio_interface mc8030_zve_z80pio_intf =
	143	Z80PIO_INTERFACE( mc8030_zve_z80pio_intf )
144	144	{
145	145	DEVCB_NULL,   /* callback when change interrupt status */
146	146	DEVCB_HANDLER(zve_port_a_r),
	147	DEVCB_HANDLER(zve_port_a_w),
	148	DEVCB_NULL,
147	149	DEVCB_HANDLER(zve_port_b_r),
148		DEVCB_HANDLER(zve_port_a_w),
149	150	DEVCB_HANDLER(zve_port_b_w),
150		DEVCB_NULL,
151	151	DEVCB_NULL
152	152	};
153	153
r7374	r7375
169	169	{
170	170	}
171	171
172		const z80pio_interface mc8030_asp_z80pio_intf =
	172	Z80PIO_INTERFACE( mc8030_asp_z80pio_intf )
173	173	{
174	174	DEVCB_NULL,   /* callback when change interrupt status */
175	175	DEVCB_HANDLER(asp_port_a_r),
	176	DEVCB_HANDLER(asp_port_a_w),
	177	DEVCB_NULL,
176	178	DEVCB_HANDLER(asp_port_b_r),
177		DEVCB_HANDLER(asp_port_a_w),
178	179	DEVCB_HANDLER(asp_port_b_w),
179		DEVCB_NULL,
180	180	DEVCB_NULL
181	181	};
182	182

src/mess/machine/mbee.c

r7374	r7375
80	80	{
81	81	DEVCB_HANDLER(mbee_pio_interrupt),   /* callback when change interrupt status */
82	82	DEVCB_NULL,
83		DEVCB_HANDLER(pio_port_b_r),
84	83	DEVCB_HANDLER(pio_port_a_w),
85		DEVCB_HANDLER(pio_port_b_w),
86	84	DEVCB_HANDLER(pio_ardy),
	85	DEVCB_HANDLER(pio_port_b_r),
	86	DEVCB_HANDLER(pio_port_b_w),
87	87	DEVCB_NULL
88	88	};
89	89
90		READ8_DEVICE_HANDLER( mbee_pio_r )
91		{
92		if (!offset)
93		return z80pio_d_r(device, 0);
94		else
95		if (offset == 1)
96		return z80pio_c_r(device, 0);
97		else
98		if (offset == 2)
99		return z80pio_d_r(device, 1);
100		else
101		return z80pio_c_r(device, 1);
102		}
103
104		WRITE8_DEVICE_HANDLER( mbee_pio_w )
105		{
106		if (!offset)
107		z80pio_d_w(device, 0, data);
108		else
109		if (offset == 1)
110		z80pio_c_w(device, 0, data);
111		else
112		if (offset == 2)
113		z80pio_d_w(device, 1, data);
114		else
115		z80pio_c_w(device, 1, data);
116		}
117
118
119	90	/*************************************************************************************
120	91
121	92	Floppy DIsk

src/mess/machine/kramermc.c

r7374	r7375
30	30	kramermc_key_row = ((data >> 1) & 0x07);
31	31	}
32	32
33		const z80pio_interface kramermc_z80pio_intf =
	33	Z80PIO_INTERFACE( kramermc_z80pio_intf )
34	34	{
35	35	DEVCB_NULL,   /* callback when change interrupt status */
36	36	DEVCB_HANDLER(kramermc_port_a_r),
37		DEVCB_HANDLER(kramermc_port_b_r),
38	37	DEVCB_HANDLER(kramermc_port_a_w),
39	38	DEVCB_NULL,
	39	DEVCB_HANDLER(kramermc_port_b_r),
40	40	DEVCB_NULL,
41	41	DEVCB_NULL
42	42	};

src/mess/machine/wd17xx.c

r7374	r7375
140	140	CONSTANTS
141	141	***************************************************************************/
142	142
143		#define VERBOSE         0   /* General logging */
	143	#define VERBOSE         1   /* General logging */
144	144	#define VERBOSE_DATA   0   /* Logging of each byte during read and write */
145	145
146	146	#define DELAY_ERROR      3

src/mess/machine/llc.c

r7374	r7375
224	224	}
225	225
226	226
227		const z80pio_interface llc2_z80pio_intf =
	227	Z80PIO_INTERFACE( llc2_z80pio_intf )
228	228	{
229	229	DEVCB_NULL,   /* callback when change interrupt status */
230	230	DEVCB_HANDLER(llc2_port_a_r),
231		DEVCB_HANDLER(llc2_port_b_r),
232	231	DEVCB_NULL,
233	232	DEVCB_NULL,
	233	DEVCB_HANDLER(llc2_port_b_r),
234	234	DEVCB_NULL,
235	235	DEVCB_NULL
236	236	};
237	237
238		const z80pio_interface llc1_z80pio_intf =
	238	Z80PIO_INTERFACE( llc1_z80pio_intf )
239	239	{
240	240	DEVCB_NULL,   /* callback when change interrupt status */
241	241	DEVCB_HANDLER(llc1_port_a_r),
242		DEVCB_HANDLER(llc1_port_b_r),
243	242	DEVCB_NULL,
244	243	DEVCB_NULL,
	244	DEVCB_HANDLER(llc1_port_b_r),
245	245	DEVCB_NULL,
246	246	DEVCB_NULL
247	247	};

src/mess/machine/z1013.c

r7374	r7375
13	13	static UINT8 z1013_keyboard_line;
14	14	static UINT8 z1013_keyboard_part;
15	15
16		/* Wires on Z80 PIO are switched */
17		READ8_DEVICE_HANDLER(z1013_z80pio_r)
18		{
19		if ((offset & 1) ==0) return z80pio_d_r(device, offset >> 1); else return z80pio_c_r(device, offset >> 1);
20		}
21
22		WRITE8_DEVICE_HANDLER(z1013_z80pio_w)
23		{
24		if ((offset & 1) ==0)
25		z80pio_d_w(device, offset >> 1, data);
26		else
27		z80pio_c_w(device, offset >> 1, data);
28		}
29
30	16	/* Driver initialization */
31	17	DRIVER_INIT(z1013)
32	18	{
r7374	r7375
65	51	{
66	52	DEVCB_NULL,   /* callback when change interrupt status */
67	53	DEVCB_NULL,
68		DEVCB_HANDLER(z1013_port_b_r),
69	54	DEVCB_NULL,
70		DEVCB_HANDLER(z1013_port_b_w),
71	55	DEVCB_NULL,
	56	DEVCB_HANDLER(z1013_port_b_r),
	57	DEVCB_HANDLER(z1013_port_b_w),
72	58	DEVCB_NULL
73	59	};
74	60
r7374	r7375
81	67	{
82	68	DEVCB_NULL,   /* callback when change interrupt status */
83	69	DEVCB_NULL,
84		DEVCB_HANDLER(z1013k7659_port_b_r),
85	70	DEVCB_NULL,
86	71	DEVCB_NULL,
	72	DEVCB_HANDLER(z1013k7659_port_b_r),
87	73	DEVCB_NULL,
88	74	DEVCB_NULL
89	75	};

src/mess/machine/ac1.c

r7374	r7375
73	73
74	74	static WRITE8_DEVICE_HANDLER (ac1_port_b_w)
75	75	{
	76	/*
	77
	78	bit      description
	79
	80	0
	81	1      RTTY receive
	82	2      RTTY transmit
	83	3      RTTY PTT
	84	4
	85	5
	86	6      cassette out
	87	7      cassette in
	88
	89	*/
76	90	}
77	91
78		const z80pio_interface ac1_z80pio_intf =
	92	Z80PIO_INTERFACE( ac1_z80pio_intf )
79	93	{
80	94	DEVCB_NULL,   /* callback when change interrupt status */
81	95	DEVCB_HANDLER(ac1_port_a_r),
	96	DEVCB_HANDLER(ac1_port_a_w),
	97	DEVCB_NULL,
82	98	DEVCB_HANDLER(ac1_port_b_r),
83		DEVCB_HANDLER(ac1_port_a_w),
84	99	DEVCB_HANDLER(ac1_port_b_w),
85		DEVCB_NULL,
86	100	DEVCB_NULL
87	101	};
88	102

src/mess/machine/mz700.c

r7374	r7375
599	599	{
600	600	DEVCB_LINE(mz800_z80pio_irq),
601	601	DEVCB_HANDLER(mz800_z80pio_port_a_r),
	602	DEVCB_HANDLER(mz800_z80pio_port_a_w),
602	603	DEVCB_NULL,
603		DEVCB_HANDLER(mz800_z80pio_port_a_w),
	604	DEVCB_NULL,
604	605	DEVCB_HANDLER(mz800_printer_data_w),
605	606	DEVCB_NULL,
606		DEVCB_NULL,
607	607	};
608	608
609	609

src/mess/machine/kaypro.c

r7374	r7375
108	108	DEVCB_NULL         /* portB ready active callback */
109	109	};
110	110
111		READ8_DEVICE_HANDLER( kayproii_pio_r )
112		{
113		if (!offset)
114		return z80pio_d_r(device, 0);
115		else
116		if (offset == 1)
117		return z80pio_c_r(device, 0);
118		else
119		if (offset == 2)
120		return z80pio_d_r(device, 1);
121		else
122		return z80pio_c_r(device, 1);
123		}
124
125		WRITE8_DEVICE_HANDLER( kayproii_pio_w )
126		{
127		if (!offset)
128		z80pio_d_w(device, 0, data);
129		else
130		if (offset == 1)
131		z80pio_c_w(device, 0, data);
132		else
133		if (offset == 2)
134		z80pio_d_w(device, 1, data);
135		else
136		z80pio_c_w(device, 1, data);
137		}
138
139	111	/***********************************************************
140	112
141	113	KAYPRO2X SYSTEM PORT

src/mess/machine/super80.c

r7374	r7375
51	51	return data;
52	52	};
53	53
54		const z80pio_interface super80_pio_intf =
	54	Z80PIO_INTERFACE( super80_pio_intf )
55	55	{
56	56	DEVCB_LINE(super80_pio_interrupt),      /* callback when change interrupt status */
57	57	DEVCB_NULL,
	58	DEVCB_HANDLER(pio_port_a_w),
	59	DEVCB_NULL,         /* portA ready active callback (not used in super80) */
58	60	DEVCB_HANDLER(pio_port_b_r),
59		DEVCB_HANDLER(pio_port_a_w),
60	61	DEVCB_NULL,
61		DEVCB_NULL,         /* portA ready active callback (not used in super80) */
62	62	DEVCB_NULL         /* portB ready active callback (not used in super80) */
63	63	};
64	64
r7374	r7375
116	116	cass_data[1] = 0;
117	117	}
118	118
119		z80pio_p_w(super80_z80pio,1,pio_port_b_r(super80_z80pio,0));
	119	z80pio_pb_w(super80_z80pio,1,pio_port_b_r(super80_z80pio,0));
120	120	}
121	121
122	122	/* after the first 4 bytes have been read from ROM, switch the ram back in */

src/mess/drivers/mc80.c

r7374	r7375
23	23	ADDRESS_MAP_UNMAP_HIGH
24	24	ADDRESS_MAP_GLOBAL_MASK(0xff)
25	25	AM_RANGE(0xf0, 0xf3) AM_DEVREADWRITE("z80ctc", z80ctc_r, z80ctc_w)
26		AM_RANGE(0xf4, 0xf7) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w)
	26	AM_RANGE(0xf4, 0xf7) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
27	27	ADDRESS_MAP_END
28	28
29	29	static ADDRESS_MAP_START(mc8030_mem, ADDRESS_SPACE_PROGRAM, 8)
r7374	r7375
40	40	ADDRESS_MAP_UNMAP_HIGH
41	41	//ADDRESS_MAP_GLOBAL_MASK(0xff)
42	42	//AM_RANGE(0x80, 0x84) AM_MIRROR(0xff00) AM_DEVREADWRITE("zve_ctc", z80ctc_r, z80ctc_w)
43		//AM_RANGE(0x84, 0x87) AM_MIRROR(0xff00) AM_DEVREADWRITE("zve_pio", z80pio_r, z80pio_w)
	43	//AM_RANGE(0x84, 0x87) AM_MIRROR(0xff00) AM_DEVREADWRITE("zve_pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
44	44	AM_RANGE(0x8c, 0x8c) AM_MIRROR(0xff00) AM_WRITE(mc8030_zve_write_protect_w)
45	45	AM_RANGE(0xc0, 0xcf) AM_MIRROR(0xff00) AM_WRITE(mc8030_vis_w) AM_MASK(0xffff)
46	46	//AM_RANGE(0xd0, 0xd3) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_sio", z80ctc_r, z80ctc_w)
47	47	AM_RANGE(0xd4, 0xd7) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_ctc", z80ctc_r, z80ctc_w)
48		AM_RANGE(0xd8, 0xdb) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_pio", z80pio_r, z80pio_w)
	48	AM_RANGE(0xd8, 0xdb) AM_MIRROR(0xff00) AM_DEVREADWRITE("asp_pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
49	49	AM_RANGE(0xe0, 0xef) AM_MIRROR(0xff00) AM_WRITE(mc8030_eprom_prog_w)
50	50	ADDRESS_MAP_END
51	51
r7374	r7375
75	75	MDRV_VIDEO_START(mc8020)
76	76	MDRV_VIDEO_UPDATE(mc8020)
77	77
78		MDRV_Z80PIO_ADD( "z80pio", mc8020_z80pio_intf )
	78	MDRV_Z80PIO_ADD( "z80pio", XTAL_2_4576MHz, mc8020_z80pio_intf )
79	79	MDRV_Z80CTC_ADD( "z80ctc", XTAL_2_4576MHz / 100, mc8020_ctc_intf )
80	80	MACHINE_DRIVER_END
81	81
r7374	r7375
100	100	MDRV_VIDEO_START(mc8030)
101	101	MDRV_VIDEO_UPDATE(mc8030)
102	102
103		MDRV_Z80PIO_ADD( "zve_pio", mc8030_zve_z80pio_intf )
	103	MDRV_Z80PIO_ADD( "zve_pio", XTAL_2_4576MHz, mc8030_zve_z80pio_intf )
104	104	MDRV_Z80CTC_ADD( "zve_ctc", XTAL_2_4576MHz, mc8030_zve_z80ctc_intf )
105	105
106		MDRV_Z80PIO_ADD( "asp_pio", mc8030_asp_z80pio_intf )
	106	MDRV_Z80PIO_ADD( "asp_pio", XTAL_2_4576MHz, mc8030_asp_z80pio_intf )
107	107	MDRV_Z80CTC_ADD( "asp_ctc", XTAL_2_4576MHz, mc8030_asp_z80ctc_intf )
108	108	MDRV_Z80SIO_ADD( "asp_sio", 4800, mc8030_asp_z80sio_intf )
109	109	MACHINE_DRIVER_END

src/mess/drivers/mbee.c

r7374	r7375
149	149	static ADDRESS_MAP_START(mbee_io, ADDRESS_SPACE_IO, 8)
150	150	ADDRESS_MAP_GLOBAL_MASK(0xff)
151	151	ADDRESS_MAP_UNMAP_HIGH
152		AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", mbee_pio_r, mbee_pio_w)
	152	AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
153	153	AM_RANGE(0x0b, 0x0b) AM_MIRROR(0x10) AM_READWRITE(mbee_video_bank_r, mbee_video_bank_w)
154	154	AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x10) AM_READWRITE(m6545_status_r, m6545_index_w)
155	155	AM_RANGE(0x0d, 0x0d) AM_MIRROR(0x10) AM_READWRITE(m6545_data_r, m6545_data_w)
r7374	r7375
158	158	static ADDRESS_MAP_START(mbeeic_io, ADDRESS_SPACE_IO, 8)
159	159	ADDRESS_MAP_GLOBAL_MASK(0xff)
160	160	ADDRESS_MAP_UNMAP_HIGH
161		AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", mbee_pio_r, mbee_pio_w)
	161	AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
162	162	AM_RANGE(0x08, 0x08) AM_MIRROR(0x10) AM_READWRITE(mbee_pcg_color_latch_r, mbee_pcg_color_latch_w)
163	163	AM_RANGE(0x09, 0x09) AM_MIRROR(0x10) AM_NOP /* Listed as "Colour Wait Off" or "USART 2651" but doesn't appear in the schematics */
164	164	AM_RANGE(0x0a, 0x0a) AM_MIRROR(0x10) AM_READWRITE(mbee_color_bank_r, mbee_color_bank_w)
r7374	r7375
169	169
170	170	static ADDRESS_MAP_START(mbeepc_io, ADDRESS_SPACE_IO, 8)
171	171	ADDRESS_MAP_UNMAP_HIGH
172		AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff10) AM_DEVREADWRITE("z80pio", mbee_pio_r, mbee_pio_w)
	172	AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff10) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
173	173	AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff10) AM_READWRITE(mbee_pcg_color_latch_r, mbee_pcg_color_latch_w)
174	174	AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe10) AM_READWRITE(mbee_color_bank_r, mbee_color_bank_w)
175	175	AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff10) AM_READWRITE(mbee_video_bank_r, mbee_video_bank_w)
r7374	r7375
180	180
181	181	static ADDRESS_MAP_START(mbeepc85_io, ADDRESS_SPACE_IO, 8)
182	182	ADDRESS_MAP_UNMAP_HIGH
183		AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff10) AM_DEVREADWRITE("z80pio", mbee_pio_r, mbee_pio_w)
	183	AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff10) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
184	184	AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff10) AM_READWRITE(mbee_pcg_color_latch_r, mbee_pcg_color_latch_w)
185	185	AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe10) AM_READWRITE(mbee_color_bank_r, mbee_color_bank_w)
186	186	AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff10) AM_READWRITE(mbee_video_bank_r, mbee_video_bank_w)
r7374	r7375
191	191
192	192	static ADDRESS_MAP_START(mbeeppc_io, ADDRESS_SPACE_IO, 8)
193	193	ADDRESS_MAP_UNMAP_HIGH
194		AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff00) AM_DEVREADWRITE("z80pio", mbee_pio_r, mbee_pio_w)
	194	AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff00) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
195	195	AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff00) AM_READWRITE(mbee_pcg_color_latch_r, mbee_pcg_color_latch_w)
196	196	AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe00) AM_READWRITE(mbee_color_bank_r, mbee_0a_w)
197	197	AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff00) AM_READWRITE(mbee_video_bank_r, mbee_video_bank_w)
r7374	r7375
204	204	static ADDRESS_MAP_START(mbee56_io, ADDRESS_SPACE_IO, 8)
205	205	ADDRESS_MAP_GLOBAL_MASK(0xff)
206	206	ADDRESS_MAP_UNMAP_HIGH
207		AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", mbee_pio_r, mbee_pio_w)
	207	AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
208	208	AM_RANGE(0x08, 0x08) AM_MIRROR(0x10) AM_READWRITE(mbee_pcg_color_latch_r, mbee_pcg_color_latch_w)
209	209	AM_RANGE(0x0b, 0x0b) AM_MIRROR(0x10) AM_READWRITE(mbee_video_bank_r, mbee_video_bank_w)
210	210	AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x10) AM_READWRITE(m6545_status_r, m6545_index_w)
r7374	r7375
216	216	static ADDRESS_MAP_START(mbee64_io, ADDRESS_SPACE_IO, 8)
217	217	ADDRESS_MAP_GLOBAL_MASK(0xff)
218	218	ADDRESS_MAP_UNMAP_HIGH
219		AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", mbee_pio_r, mbee_pio_w)
	219	AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
220	220	AM_RANGE(0x08, 0x08) AM_MIRROR(0x10) AM_READWRITE(mbee_pcg_color_latch_r, mbee_pcg_color_latch_w)
221	221	AM_RANGE(0x0b, 0x0b) AM_MIRROR(0x10) AM_READWRITE(mbee_video_bank_r, mbee_video_bank_w)
222	222	AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x10) AM_READWRITE(m6545_status_r, m6545_index_w)
r7374	r7375
403	403
404	404	MDRV_MACHINE_RESET( mbee )
405	405
406		MDRV_Z80PIO_ADD( "z80pio", mbee_z80pio_intf )
	406	MDRV_Z80PIO_ADD( "z80pio", XTAL_12MHz / 6, mbee_z80pio_intf )
407	407
408	408	MDRV_SCREEN_ADD("screen", RASTER)
409	409	MDRV_SCREEN_REFRESH_RATE(50)
r7374	r7375
444	444
445	445	MDRV_MACHINE_RESET( mbee )
446	446
447		MDRV_Z80PIO_ADD( "z80pio", mbee_z80pio_intf )
	447	MDRV_Z80PIO_ADD( "z80pio", 3375000, mbee_z80pio_intf )
448	448
449	449	MDRV_SCREEN_ADD("screen", RASTER)
450	450	MDRV_SCREEN_REFRESH_RATE(50)

src/mess/drivers/abc80.c

r7374	r7375
165	165	{ 0x5f, 0x09, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00 }
166	166	};
167	167
	168	static TIMER_CALLBACK( keyboard_data_clear )
	169	{
	170	abc80_state *state = (abc80_state *)machine->driver_data;
	171
	172	state->key_data = 0;
	173	}
	174
168	175	static void abc80_keyboard_scan(running_machine *machine)
169	176	{
170	177	abc80_state *state = (abc80_state *)machine->driver_data;
r7374	r7375
198	205	{
199	206	UINT8 keydata = abc80_keycodes[row + (table * 7)][col];
200	207
	208	/* set key strobe */
	209	state->key_strobe = 1;
	210
201	211	if (state->key_data != keydata)
202	212	{
203	213	UINT8 pio_data = 0x80 | keydata;
r7374	r7375
205	215	/* latch key data */
206	216	state->key_data = keydata;
207	217
208		/* set key strobe */
209		state->key_strobe = 1;
210
211		z80pio_p_w(state->z80pio, 0, pio_data);
212
	218	z80pio_pa_w(state->z80pio, 0, pio_data);
213	219	return;
214	220	}
215	221	}
216	222	}
217	223	}
	224
	225	if (!state->key_strobe && state->key_data)
	226	{
	227	z80pio_pa_w(state->z80pio, 0, state->key_data);
	228	timer_set(machine, ATTOTIME_IN_MSEC(50), NULL, 0, keyboard_data_clear);
	229	}
218	230	}
219	231
220	232	static TIMER_DEVICE_CALLBACK( abc80_keyboard_tick )
r7374	r7375
242	254	AM_RANGE(0x01, 0x01) AM_WRITE(abcbus_channel_w)
243	255	AM_RANGE(0x06, 0x06) AM_DEVWRITE(SN76477_TAG, abc80_sound_w)
244	256	AM_RANGE(0x07, 0x07) AM_READ(abcbus_reset_r)
245		AM_RANGE(0x10, 0x13) AM_MIRROR(0x04) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_alt_r, z80pio_alt_w)
	257	AM_RANGE(0x10, 0x13) AM_MIRROR(0x04) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_ba_cd_r, z80pio_ba_cd_w)
246	258	ADDRESS_MAP_END
247	259
248	260	/* Input Ports */
r7374	r7375
445	457	cassette_output(state->cassette, BIT(data, 6) ? -1.0 : +1.0);
446	458	};
447	459
448		static const z80pio_interface abc80_pio_intf =
	460	static Z80PIO_INTERFACE( abc80_pio_intf )
449	461	{
450	462	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* callback when change interrupt status */
451	463	DEVCB_HANDLER(abc80_pio_port_a_r),         /* port A read callback */
	464	DEVCB_NULL,                  /* port A write callback */
	465	DEVCB_NULL,                  /* portA ready active callback */
452	466	DEVCB_HANDLER(abc80_pio_port_b_r),         /* port B read callback */
453		DEVCB_NULL,                  /* port A write callback */
454	467	DEVCB_HANDLER(abc80_pio_port_b_w),         /* port B write callback */
455		DEVCB_NULL,                  /* portA ready active callback */
456	468	DEVCB_NULL                  /* portB ready active callback */
457	469	};
458	470
r7374	r7375
523	535
524	536	/* Z80PIO */
525	537	MDRV_TIMER_ADD_SCANLINE("pio_astb", z80pio_astb_tick, SCREEN_TAG, 0, 1)
526		MDRV_Z80PIO_ADD(Z80PIO_TAG, abc80_pio_intf)
	538	MDRV_Z80PIO_ADD(Z80PIO_TAG, ABC80_XTAL/2/2, abc80_pio_intf)
527	539
528	540	/* Luxor Conkort 55-10828 */
529	541	MDRV_LUXOR_55_10828_ADD

src/mess/drivers/kramermc.c

r7374	r7375
31	31
32	32	static ADDRESS_MAP_START( kramermc_io, ADDRESS_SPACE_IO, 8 )
33	33	ADDRESS_MAP_GLOBAL_MASK(0xff)
34		AM_RANGE(0xfc, 0x0ff) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w)
	34	AM_RANGE(0xfc, 0x0ff) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
35	35	ADDRESS_MAP_END
36	36
37	37	/* Input ports */
r7374	r7375
111	111	MDRV_CPU_IO_MAP(kramermc_io)
112	112	MDRV_MACHINE_RESET( kramermc )
113	113
114		MDRV_Z80PIO_ADD( "z80pio", kramermc_z80pio_intf )
	114	MDRV_Z80PIO_ADD( "z80pio", 1500000, kramermc_z80pio_intf )
115	115
116	116	/* video hardware */
117	117	MDRV_SCREEN_ADD("screen", RASTER)

src/mess/drivers/mpf1.c

r7374	r7375
57	57	ADDRESS_MAP_GLOBAL_MASK(0xff)
58	58	AM_RANGE(0x00, 0x03) AM_MIRROR(0x3c) AM_DEVREADWRITE(I8255A_TAG, i8255a_r, i8255a_w)
59	59	AM_RANGE(0x40, 0x43) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
60		AM_RANGE(0x80, 0x83) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_r, z80pio_w)
	60	AM_RANGE(0x80, 0x83) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
61	61	ADDRESS_MAP_END
62	62
63	63	static ADDRESS_MAP_START( mpf1b_io_map, ADDRESS_SPACE_IO, 8 )
r7374	r7375
65	65	ADDRESS_MAP_GLOBAL_MASK(0xff)
66	66	AM_RANGE(0x00, 0x03) AM_MIRROR(0x3c) AM_DEVREADWRITE(I8255A_TAG, i8255a_r, i8255a_w)
67	67	AM_RANGE(0x40, 0x43) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
68		AM_RANGE(0x80, 0x83) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_r, z80pio_w)
	68	AM_RANGE(0x80, 0x83) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
69	69	AM_RANGE(0xfe, 0xfe) AM_MIRROR(0x01) AM_DEVREADWRITE(TMS5220_TAG, tms5220_status_r, tms5220_data_w)
70	70	ADDRESS_MAP_END
71	71
r7374	r7375
74	74	ADDRESS_MAP_GLOBAL_MASK(0xff)
75	75	AM_RANGE(0x00, 0x03) AM_MIRROR(0x3c) AM_DEVREADWRITE(I8255A_TAG, i8255a_r, i8255a_w)
76	76	AM_RANGE(0x40, 0x43) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
77		AM_RANGE(0x80, 0x83) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_r, z80pio_w)
	77	AM_RANGE(0x80, 0x83) AM_MIRROR(0x3c) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
78	78	ADDRESS_MAP_END
79	79
80	80	/* Input Ports */
r7374	r7375
296	296
297	297	/* Z80PIO Interface */
298	298
299		static const z80pio_interface mpf1_pio_intf =
	299	static Z80PIO_INTERFACE( mpf1_pio_intf )
300	300	{
301	301	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
302	302	DEVCB_NULL,
r7374	r7375
387	387	MDRV_MACHINE_RESET(mpf1)
388	388
389	389	/* devices */
390		MDRV_Z80PIO_ADD(Z80PIO_TAG, mpf1_pio_intf)
	390	MDRV_Z80PIO_ADD(Z80PIO_TAG, XTAL_3_579545MHz/2, mpf1_pio_intf)
391	391	MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_3_579545MHz/2, mpf1_ctc_intf)
392	392	MDRV_I8255A_ADD(I8255A_TAG, ppi8255_intf)
393	393	MDRV_CASSETTE_ADD(CASSETTE_TAG, mpf1_cassette_config)
r7374	r7375
414	414	MDRV_MACHINE_RESET(mpf1)
415	415
416	416	/* devices */
417		MDRV_Z80PIO_ADD(Z80PIO_TAG, mpf1_pio_intf)
	417	MDRV_Z80PIO_ADD(Z80PIO_TAG, XTAL_3_579545MHz/2, mpf1_pio_intf)
418	418	MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_3_579545MHz/2, mpf1_ctc_intf)
419	419	MDRV_I8255A_ADD(I8255A_TAG, ppi8255_intf)
420	420	MDRV_CASSETTE_ADD(CASSETTE_TAG, mpf1_cassette_config)
r7374	r7375
448	448	MDRV_DEFAULT_LAYOUT(layout_mpf1p)
449	449
450	450	/* devices */
451		MDRV_Z80PIO_ADD(Z80PIO_TAG, mpf1_pio_intf)
452		MDRV_Z80CTC_ADD(Z80CTC_TAG, 3579500/2, mpf1_ctc_intf)
	451	MDRV_Z80PIO_ADD(Z80PIO_TAG, 2500000, mpf1_pio_intf)
	452	MDRV_Z80CTC_ADD(Z80CTC_TAG, 2500000, mpf1_ctc_intf)
453	453	MDRV_I8255A_ADD(I8255A_TAG, ppi8255_intf)
454	454	MDRV_CASSETTE_ADD(CASSETTE_TAG, mpf1_cassette_config)
455	455

src/mess/drivers/nascom1.c

r7374	r7375
89	89	AM_RANGE(0x00, 0x00) AM_READWRITE(nascom1_port_00_r, nascom1_port_00_w)
90	90	AM_RANGE(0x01, 0x01) AM_READWRITE(nascom1_port_01_r, nascom1_port_01_w)
91	91	AM_RANGE(0x02, 0x02) AM_READ(nascom1_port_02_r)
92		AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w )
	92	AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w )
93	93	ADDRESS_MAP_END
94	94
95	95
r7374	r7375
98	98	AM_RANGE(0x00, 0x00) AM_READWRITE(nascom1_port_00_r, nascom1_port_00_w)
99	99	AM_RANGE(0x01, 0x01) AM_READWRITE(nascom1_port_01_r, nascom1_port_01_w)
100	100	AM_RANGE(0x02, 0x02) AM_READ(nascom1_port_02_r)
101		AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w )
	101	AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w )
102	102	AM_RANGE(0xe0, 0xe3) AM_DEVREADWRITE("wd1793", wd17xx_r, wd17xx_w)
103	103	AM_RANGE(0xe4, 0xe4) AM_READWRITE(nascom2_fdc_select_r, nascom2_fdc_select_w)
104	104	AM_RANGE(0xe5, 0xe5) AM_READ(nascom2_fdc_status_r)
r7374	r7375
263	263	};
264	264
265	265
266		static const z80pio_interface nascom1_z80pio_intf =
	266	static Z80PIO_INTERFACE( nascom1_z80pio_intf )
267	267	{
268	268	DEVCB_NULL,
269	269	DEVCB_NULL,
r7374	r7375
298	298
299	299	MDRV_AY31015_ADD( "hd6402", nascom1_ay31015_config )
300	300
301		MDRV_Z80PIO_ADD( "z80pio", nascom1_z80pio_intf )
	301	MDRV_Z80PIO_ADD( "z80pio", XTAL_16MHz/8, nascom1_z80pio_intf )
302	302
303	303	/* devices */
304	304	MDRV_SNAPSHOT_ADD("snapshot", nascom1, "nas", 0.5)

src/mess/drivers/einstein.c

r7374	r7375
667	667	/* block 5, z80ctc */
668	668	AM_RANGE(0x28, 0x2b) AM_MIRROR(0xff04) AM_DEVREADWRITE(IC_I058, z80ctc_r, z80ctc_w)
669	669	/* block 6, z80pio */
670		AM_RANGE(0x30, 0x33) AM_MIRROR(0xff04) AM_DEVREADWRITE(IC_I063, z80pio_r, z80pio_w)
	670	AM_RANGE(0x30, 0x33) AM_MIRROR(0xff04) AM_DEVREADWRITE(IC_I063, z80pio_cd_ba_r, z80pio_cd_ba_w)
671	671	#if 0
672	672	/* block 7, adc */
673	673	AM_RANGE(0x38, 0x38) AM_MIRROR(0xff07) AM_DEVREADWRITE(IC_I050, adc0844_r, adc0844_w)
r7374	r7375
839	839	};
840	840
841	841
842		static const z80pio_interface einstein_pio_intf =
	842	static Z80PIO_INTERFACE( einstein_pio_intf )
843	843	{
844	844	DEVCB_NULL,
845	845	DEVCB_NULL,
846		DEVCB_NULL,
847	846	DEVCB_DEVICE_HANDLER("centronics", centronics_data_w),
848	847	DEVCB_NULL,
	848	DEVCB_NULL,
849	849	DEVCB_DEVICE_LINE("centronics", centronics_strobe_w),
850	850	DEVCB_NULL
851	851	};
r7374	r7375
910	910	driver. So we update at 50Hz and hope this is good enough. */
911	911	MDRV_TIMER_ADD_PERIODIC("keyboard", einstein_keyboard_timer_callback, HZ(50))
912	912
913		MDRV_Z80PIO_ADD(IC_I063, einstein_pio_intf)
	913	MDRV_Z80PIO_ADD(IC_I063, XTAL_X002 / 2, einstein_pio_intf)
914	914
915	915	MDRV_Z80CTC_ADD(IC_I058, XTAL_X002 / 2, einstein_ctc_intf)
916	916	/* the input to channel 0 and 1 of the ctc is a 2 MHz clock */

src/mess/drivers/llc.c

r7374	r7375
27	27	static ADDRESS_MAP_START( llc1_io, ADDRESS_SPACE_IO, 8 )
28	28	ADDRESS_MAP_GLOBAL_MASK(0xff)
29	29	ADDRESS_MAP_UNMAP_HIGH
30		AM_RANGE(0xEC, 0xEF) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w)
31		//AM_RANGE(0xF4, 0xF7) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w)
	30	AM_RANGE(0xEC, 0xEF) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
	31	//AM_RANGE(0xF4, 0xF7) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
32	32	AM_RANGE(0xF8, 0xFB) AM_DEVREADWRITE("z80ctc", z80ctc_r, z80ctc_w)
33	33	ADDRESS_MAP_END
34	34
r7374	r7375
43	43	ADDRESS_MAP_GLOBAL_MASK(0xff)
44	44	ADDRESS_MAP_UNMAP_HIGH
45	45	AM_RANGE(0xE0, 0xE3) AM_WRITE(llc2_rom_disable_w)
46		AM_RANGE(0xE8, 0xEB) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w)
	46	AM_RANGE(0xE8, 0xEB) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
47	47	AM_RANGE(0xEC, 0xEC) AM_WRITE(llc2_basic_enable_w)
48	48	AM_RANGE(0xF8, 0xFB) AM_DEVREADWRITE("z80ctc", z80ctc_r, z80ctc_w)
49	49	ADDRESS_MAP_END
r7374	r7375
338	338	MDRV_VIDEO_START(llc1)
339	339	MDRV_VIDEO_UPDATE(llc1)
340	340
341		MDRV_Z80PIO_ADD( "z80pio", llc1_z80pio_intf )
	341	MDRV_Z80PIO_ADD( "z80pio", XTAL_3MHz, llc1_z80pio_intf )
342	342	MDRV_Z80CTC_ADD( "z80ctc", XTAL_3MHz, llc1_ctc_intf )
343	343	MACHINE_DRIVER_END
344	344
r7374	r7375
364	364	MDRV_VIDEO_START(llc2)
365	365	MDRV_VIDEO_UPDATE(llc2)
366	366
367		MDRV_Z80PIO_ADD( "z80pio", llc2_z80pio_intf )
	367	MDRV_Z80PIO_ADD( "z80pio", XTAL_3MHz, llc2_z80pio_intf )
368	368	MDRV_Z80CTC_ADD( "z80ctc", XTAL_3MHz, llc2_ctc_intf )
369	369
370	370	/* internal ram */

src/mess/drivers/z1013.c

r7374	r7375
21	21
22	22	static ADDRESS_MAP_START( z1013_io, ADDRESS_SPACE_IO, 8 )
23	23	ADDRESS_MAP_GLOBAL_MASK(0xff)
24		AM_RANGE( 0x00, 0x03 ) AM_DEVREADWRITE("z80pio", z1013_z80pio_r, z1013_z80pio_w)
	24	AM_RANGE( 0x00, 0x03 ) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
25	25	AM_RANGE( 0x08, 0x08 ) AM_WRITE(z1013_keyboard_w)
26	26	ADDRESS_MAP_END
27	27
r7374	r7375
189	189	MDRV_VIDEO_START(z1013)
190	190	MDRV_VIDEO_UPDATE(z1013)
191	191
192		MDRV_Z80PIO_ADD( "z80pio", z1013_z80pio_intf )
	192	MDRV_Z80PIO_ADD( "z80pio", XTAL_1MHz, z1013_z80pio_intf )
193	193
194	194	/* snapshot */
195	195	MDRV_SNAPSHOT_ADD("snapshot", z1013, "z80", 0)
r7374	r7375
198	198	static MACHINE_DRIVER_START( z1013k76 )
199	199	MDRV_IMPORT_FROM(z1013)
200	200	MDRV_DEVICE_REMOVE("z80pio")
201		MDRV_Z80PIO_ADD("z80pio", z1013k7659_z80pio_intf)
	201	MDRV_Z80PIO_ADD("z80pio", XTAL_1MHz, z1013k7659_z80pio_intf)
202	202	MACHINE_DRIVER_END
203	203
204	204	/* ROM definition */

src/mess/drivers/tiki100.c

r7374	r7375
246	246	ADDRESS_MAP_GLOBAL_MASK(0xff)
247	247	AM_RANGE(0x00, 0x00) AM_MIRROR(0x03) AM_READWRITE(keyboard_r, keyboard_w)
248	248	AM_RANGE(0x04, 0x07) AM_DEVREADWRITE(Z80DART_TAG, z80dart_cd_ba_r, z80dart_cd_ba_w)
249		AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_r, z80pio_w)
	249	AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
250	250	AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x03) AM_WRITE(video_mode_w)
251	251	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(FD1797_TAG, wd17xx_r, wd17xx_w)
252	252	AM_RANGE(0x14, 0x14) AM_MIRROR(0x01) AM_WRITE(palette_w)
r7374	r7375
499	499
500	500	/* Z80-PIO Interface */
501	501
502		static const z80pio_interface pio_intf =
	502	static Z80PIO_INTERFACE( pio_intf )
503	503	{
504	504	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
505	505	DEVCB_NULL,                  /* port A read callback */
	506	DEVCB_NULL,                  /* port A write callback */
	507	DEVCB_NULL,                  /* portA ready active callback */
506	508	DEVCB_NULL,                  /* port B read callback */
507		DEVCB_NULL,                  /* port A write callback */
508	509	DEVCB_NULL,                  /* port B write callback */
509		DEVCB_NULL,                  /* portA ready active callback */
510	510	DEVCB_NULL                  /* portB ready active callback */
511	511	};
512	512
r7374	r7375
676	676
677	677	/* devices */
678	678	MDRV_Z80DART_ADD(Z80DART_TAG, 2000000, dart_intf)
679		MDRV_Z80PIO_ADD(Z80PIO_TAG, pio_intf)
	679	MDRV_Z80PIO_ADD(Z80PIO_TAG, 2000000, pio_intf)
680	680	MDRV_Z80CTC_ADD(Z80CTC_TAG, 2000000, ctc_intf)
681	681	MDRV_TIMER_ADD_PERIODIC("ctc", ctc_tick, HZ(2000000))
682	682	MDRV_WD179X_ADD(FD1797_TAG, tiki100_wd17xx_interface) // FD1767PL-02 or FD1797-PL

src/mess/drivers/vcs80.c

r7374	r7375
92	92
93	93	static TIMER_DEVICE_CALLBACK( vcs80_keyboard_tick )
94	94	{
	95	vcs80_state *state = (vcs80_state *)timer->machine->driver_data;
	96
	97	if (state->keyclk)
	98	{
	99	state->keylatch++;
	100	state->keylatch &= 7;
	101	}
	102
	103	z80pio_pa_w(state->z80pio, 0, state->keyclk << 7);
	104
	105	state->keyclk = !state->keyclk;
	106	}
	107
	108	static READ8_DEVICE_HANDLER( pio_port_a_r )
	109	{
95	110	/*
96	111
97	112	bit     description
r7374	r7375
107	122
108	123	*/
109	124
110		vcs80_state *state = (vcs80_state *)timer->machine->driver_data;
	125	vcs80_state *state = (vcs80_state *)device->machine->driver_data;
111	126
112	127	UINT8 data = 0;
113	128
114		if (state->keyclk)
115		{
116		state->keylatch++;
117		state->keylatch &= 0x07;
118		}
	129	/* keyboard and led latch */
	130	data |= state->keylatch;
119	131
120		data = (state->keyclk << 7) | 0x70 | state->keylatch;
	132	/* keyboard rows */
	133	data |= BIT(input_port_read(device->machine, "ROW0"), state->keylatch) << 4;
	134	data |= BIT(input_port_read(device->machine, "ROW1"), state->keylatch) << 5;
	135	data |= BIT(input_port_read(device->machine, "ROW2"), state->keylatch) << 6;
121	136
122		if (!BIT(input_port_read(timer->machine, "ROW0"), state->keylatch)) data &= ~0x10;
123		if (!BIT(input_port_read(timer->machine, "ROW1"), state->keylatch)) data &= ~0x20;
124		if (!BIT(input_port_read(timer->machine, "ROW2"), state->keylatch)) data &= ~0x40;
	137	/* demultiplexer clock */
	138	data |= (state->keyclk << 7);
125	139
126		z80pio_p_w(state->z80pio, 0, data);
127
128		state->keyclk = !state->keyclk;
	140	return data;
129	141	}
130	142
131	143	static WRITE8_DEVICE_HANDLER( pio_port_b_w )
r7374	r7375
156	168	output_set_digit_value(8 - digit, led_data);
157	169	}
158	170
159		static const z80pio_interface pio_intf =
	171	static Z80PIO_INTERFACE( pio_intf )
160	172	{
161	173	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
162		DEVCB_NULL,                  /* port A read callback */
	174	DEVCB_HANDLER(pio_port_a_r),   /* port A read callback */
	175	DEVCB_NULL,                  /* port A write callback */
	176	DEVCB_NULL,                  /* portA ready active callback */
163	177	DEVCB_NULL,                  /* port B read callback */
164		DEVCB_NULL,                  /* port A write callback */
165	178	DEVCB_HANDLER(pio_port_b_w),   /* port B write callback */
166		DEVCB_NULL,                  /* portA ready active callback */
167	179	DEVCB_NULL                  /* portB ready active callback */
168	180	};
169	181
r7374	r7375
184	196	/* find devices */
185	197	state->z80pio = devtag_get_device(machine, Z80PIO_TAG);
186	198
	199	z80pio_astb_w(state->z80pio, 1);
	200	z80pio_bstb_w(state->z80pio, 1);
	201
187	202	/* register for state saving */
188	203	state_save_register_global(machine, state->keylatch);
189	204	state_save_register_global(machine, state->keyclk);
r7374	r7375
209	224	MDRV_DEFAULT_LAYOUT( layout_vcs80 )
210	225
211	226	/* devices */
212		MDRV_Z80PIO_ADD(Z80PIO_TAG, pio_intf)
	227	MDRV_Z80PIO_ADD(Z80PIO_TAG, XTAL_5MHz/2, pio_intf)
213	228
214	229	/* internal ram */
215	230	MDRV_RAM_ADD("messram")
r7374	r7375
230	245	vcs80_state *state = (vcs80_state *)space->machine->driver_data;
231	246
232	247	/* _A0 is connected to PIO PB7 */
233		z80pio_p_w(state->z80pio, 1, (!BIT(address, 0)) << 7);
	248	z80pio_pb_w(state->z80pio, 0, (!BIT(address, 0)) << 7);
234	249
235	250	return address;
236	251	}

src/mess/drivers/nanos.c

r7374	r7375
56	56
57	57	/* Z80-PIO Interface */
58	58
59		static const z80pio_interface pio1_intf =
	59	static Z80PIO_INTERFACE( pio1_intf )
60	60	{
61	61	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),   /* callback when change interrupt status */
62	62	DEVCB_NULL,                  /* port A read callback */
	63	DEVCB_NULL,                  /* port A write callback */
	64	DEVCB_NULL,                  /* portA ready active callback */
63	65	DEVCB_NULL,                  /* port B read callback */
64		DEVCB_NULL,                  /* port A write callback */
65	66	DEVCB_NULL,                  /* port B write callback */
66		DEVCB_NULL,                  /* portA ready active callback */
67	67	DEVCB_NULL                  /* portB ready active callback */
68	68	};
69	69
70		static const z80pio_interface pio2_intf =
	70	static Z80PIO_INTERFACE( pio2_intf )
71	71	{
72	72	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),   /* callback when change interrupt status */
73	73	DEVCB_NULL,                  /* port A read callback */
	74	DEVCB_NULL,                  /* port A write callback */
	75	DEVCB_NULL,                  /* portA ready active callback */
74	76	DEVCB_NULL,                  /* port B read callback */
75		DEVCB_NULL,                  /* port A write callback */
76	77	DEVCB_NULL,                  /* port B write callback */
77		DEVCB_NULL,                  /* portA ready active callback */
78	78	DEVCB_NULL                  /* portB ready active callback */
79	79	};
80	80
r7374	r7375
112	112	ADDRESS_MAP_UNMAP_HIGH
113	113	ADDRESS_MAP_GLOBAL_MASK(0xff)
114	114	/* CPU card */
115		AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w)
	115	AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
116	116
117	117	/* I/O card */
118		AM_RANGE(0x80, 0x83) AM_DEVREADWRITE("z80pio_0", z80pio_r, z80pio_w)
	118	AM_RANGE(0x80, 0x83) AM_DEVREADWRITE("z80pio_0", z80pio_cd_ba_r, z80pio_cd_ba_w)
119	119	AM_RANGE(0x84, 0x84) AM_DEVREADWRITE("z80sio_0", z80sio_d_r, z80sio_d_w)
120	120	AM_RANGE(0x85, 0x85) AM_DEVREADWRITE("z80sio_0", z80sio_c_r, z80sio_c_w)
121	121	AM_RANGE(0x86, 0x86) AM_DEVREADWRITE("z80sio_0", z80sio_d_r, z80sio_d_w)
122	122	AM_RANGE(0x87, 0x87) AM_DEVREADWRITE("z80sio_0", z80sio_c_r, z80sio_c_w)
123		AM_RANGE(0x88, 0x8B) AM_DEVREADWRITE("z80pio_1", z80pio_r, z80pio_w)
	123	AM_RANGE(0x88, 0x8B) AM_DEVREADWRITE("z80pio_1", z80pio_cd_ba_r, z80pio_cd_ba_w)
124	124	AM_RANGE(0x8C, 0x8F) AM_DEVREADWRITE("z80ctc_0", z80ctc_r, z80ctc_w)
125	125
126	126	/* FDC card */
r7374	r7375
417	417	floppy_drive_set_ready_state(floppy_get_device(space->machine, 0), 1,1);
418	418	}
419	419
420		static const z80pio_interface nanos_z80pio_intf =
	420	static Z80PIO_INTERFACE( nanos_z80pio_intf )
421	421	{
422	422	DEVCB_NULL,   /* callback when change interrupt status */
423	423	DEVCB_HANDLER(nanos_port_a_r),
	424	DEVCB_NULL,
	425	DEVCB_NULL,
424	426	DEVCB_HANDLER(nanos_port_b_r),
425		DEVCB_NULL,
426	427	DEVCB_HANDLER(nanos_port_b_w),
427		DEVCB_NULL,
428	428	DEVCB_NULL
429	429	};
430	430
r7374	r7375
504	504	/* devices */
505	505	MDRV_Z80CTC_ADD( "z80ctc_0", XTAL_4MHz, ctc_intf)
506	506	MDRV_Z80CTC_ADD( "z80ctc_1", XTAL_4MHz, ctc_intf)
507		MDRV_Z80PIO_ADD( "z80pio_0", pio1_intf)
508		MDRV_Z80PIO_ADD( "z80pio_1", pio2_intf)
	507	MDRV_Z80PIO_ADD( "z80pio_0", XTAL_4MHz, pio1_intf)
	508	MDRV_Z80PIO_ADD( "z80pio_1", XTAL_4MHz, pio2_intf)
509	509	MDRV_Z80SIO_ADD( "z80sio_0", XTAL_4MHz, sio_intf)
510	510	MDRV_Z80SIO_ADD( "z80sio_1", XTAL_4MHz, sio_intf)
511		MDRV_Z80PIO_ADD( "z80pio", nanos_z80pio_intf )
	511	MDRV_Z80PIO_ADD( "z80pio", XTAL_4MHz, nanos_z80pio_intf )
512	512	/* UPD765 */
513	513	MDRV_UPD765A_ADD("upd765", nanos_upd765_interface)
514	514

src/mess/drivers/huebler.c

r7374	r7375
124	124	//  AM_RANGE(0x04, 0x04) AM_MIRROR(0x02) AM_WRITE(tone_off_w)
125	125	//  AM_RANGE(0x05, 0x05) AM_MIRROR(0x02) AM_WRITE(tone_on_w)
126	126	AM_RANGE(0x08, 0x09) AM_MIRROR(0x02) AM_READ(keyboard_r)
127		AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE(Z80PIO2_TAG, z80pio_alt_r, z80pio_alt_w)
128		AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(Z80PIO1_TAG, z80pio_alt_r, z80pio_alt_w)
	127	AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE(Z80PIO2_TAG, z80pio_ba_cd_r, z80pio_ba_cd_w)
	128	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(Z80PIO1_TAG, z80pio_ba_cd_r, z80pio_ba_cd_w)
129	129	AM_RANGE(0x14, 0x17) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
130	130	AM_RANGE(0x18, 0x1b) AM_DEVREADWRITE(Z80SIO_TAG, amu880_z80sio_r, amu880_z80sio_w)
131	131	ADDRESS_MAP_END
r7374	r7375
303	303
304	304	/* Z80-PIO Interface */
305	305
306		static const z80pio_interface pio1_intf =
	306	static Z80PIO_INTERFACE( pio1_intf )
307	307	{
308	308	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
309	309	DEVCB_NULL,                  /* port A read callback */
	310	DEVCB_NULL,                  /* port A write callback */
	311	DEVCB_NULL,                  /* portA ready active callback */
310	312	DEVCB_NULL,                  /* port B read callback */
311		DEVCB_NULL,                  /* port A write callback */
312	313	DEVCB_NULL,                  /* port B write callback */
313		DEVCB_NULL,                  /* portA ready active callback */
314	314	DEVCB_NULL                  /* portB ready active callback */
315	315	};
316	316
317		static const z80pio_interface pio2_intf =
	317	static Z80PIO_INTERFACE( pio2_intf )
318	318	{
319	319	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
320	320	DEVCB_NULL,                  /* port A read callback */
	321	DEVCB_NULL,                  /* port A write callback */
	322	DEVCB_NULL,                  /* portA ready active callback */
321	323	DEVCB_NULL,                  /* port B read callback */
322		DEVCB_NULL,                  /* port A write callback */
323	324	DEVCB_NULL,                  /* port B write callback */
324		DEVCB_NULL,                  /* portA ready active callback */
325	325	DEVCB_NULL                  /* portB ready active callback */
326	326	};
327	327
r7374	r7375
425	425
426	426	/* devices */
427	427	MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_10MHz/4, ctc_intf)
428		MDRV_Z80PIO_ADD(Z80PIO1_TAG, pio1_intf)
429		MDRV_Z80PIO_ADD(Z80PIO2_TAG, pio2_intf)
	428	MDRV_Z80PIO_ADD(Z80PIO1_TAG, XTAL_10MHz/4, pio1_intf)
	429	MDRV_Z80PIO_ADD(Z80PIO2_TAG, XTAL_10MHz/4, pio2_intf)
430	430	MDRV_Z80SIO_ADD(Z80SIO_TAG, XTAL_10MHz/4, sio_intf)
431	431
432	432	MDRV_CASSETTE_ADD(CASSETTE_TAG, amu880_cassette_config)

src/mess/drivers/trs80m2.c

r7374	r7375
10	10
11	11	TODO:
12	12
13		- BOOT ERROR PI 24 (Defective PIO Chip)
	13	- NOT A SYSTEM DISK, RE-BOOT
	14	- centronics ACK -> pio BSTB
14	15	- Z80 daisy chain
15	16	- keyboard CPU ROM
16	17	- keyboard layout
r7374	r7375
327	328
328	329	static ADDRESS_MAP_START( z80_io, ADDRESS_SPACE_IO, 8 )
329	330	ADDRESS_MAP_GLOBAL_MASK(0xff)
330		AM_RANGE(0xe0, 0xe3) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_r, z80pio_w)
	331	AM_RANGE(0xe0, 0xe3) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
331	332	AM_RANGE(0xe4, 0xe7) AM_DEVREADWRITE(FD1791_TAG, wd17xx_r, wd17xx_w)
332	333	AM_RANGE(0xef, 0xef) AM_DEVWRITE(FD1791_TAG, drvslt_w)
333	334	AM_RANGE(0xf0, 0xf3) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
r7374	r7375
654	655	centronics_strobe_w(device, !state);
655	656	}
656	657
657		static const z80pio_interface pio_intf =
	658	static Z80PIO_INTERFACE( pio_intf )
658	659	{
659	660	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),            /* interrupt callback */
660	661	DEVCB_HANDLER(pio_pa_r),                           /* port A read callback */
	662	DEVCB_HANDLER(pio_pa_w),                           /* port A write callback */
	663	DEVCB_NULL,                                       /* port A ready callback */
661	664	DEVCB_NULL,                                       /* port B read callback */
662		DEVCB_HANDLER(pio_pa_w),                           /* port A write callback */
663	665	DEVCB_DEVICE_HANDLER(CENTRONICS_TAG, centronics_data_w),   /* port B write callback */
664		DEVCB_NULL,                                       /* port A ready callback */
665	666	DEVCB_DEVICE_LINE(CENTRONICS_TAG, strobe_w)               /* port B ready callback */
666	667	};
667	668
r7374	r7375
726	727	trs80m2_state *driver_state = (trs80m2_state *)device->machine->driver_data;
727	728
728	729	driver_state->fdc_intrq = state;
	730
	731	z80pio_pa_w(driver_state->z80pio, 0, state);
729	732	}
730	733
731	734	static const wd17xx_interface fd1791_intf =
r7374	r7375
755	758
756	759	/* find devices */
757	760	state->z80ctc = devtag_get_device(machine, Z80CTC_TAG);
	761	state->z80pio = devtag_get_device(machine, Z80PIO_TAG);
758	762	state->mc6845 = devtag_get_device(machine, MC6845_TAG);
759	763	state->centronics = devtag_get_device(machine, CENTRONICS_TAG);
760	764
r7374	r7375
765	769
766	770	static MACHINE_RESET( trs80m2 )
767	771	{
	772	trs80m2_state *state = (trs80m2_state *)machine->driver_data;
768	773	const address_space *program = cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM);
769	774
770	775	/* enable boot ROM */
771	776	rom_enable_w(program, 0, 1);
	777
	778	state->kbirq = 1;
772	779	}
773	780
774	781	/* Machine Driver */
r7374	r7375
809	816	MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_8MHz/2, ctc_intf)
810	817	MDRV_TIMER_ADD_PERIODIC("ctc", ctc_tick, HZ(XTAL_8MHz/2/2))
811	818	MDRV_Z80DMA_ADD(Z80DMA_TAG, XTAL_8MHz/2, dma_intf)
812		MDRV_Z80PIO_ADD(Z80PIO_TAG, /* XTAL_8MHz/2, */ pio_intf)
	819	MDRV_Z80PIO_ADD(Z80PIO_TAG, XTAL_8MHz/2, pio_intf)
813	820	MDRV_Z80SIO_ADD(Z80SIO_TAG, XTAL_8MHz/2, sio_intf)
814	821	MDRV_CENTRONICS_ADD(CENTRONICS_TAG, standard_centronics)
815	822	MDRV_FLOPPY_DRIVE_ADD(FLOPPY_0, trs80m2_floppy_config)

src/mess/drivers/p8k.c

r7374	r7375
73	73	static ADDRESS_MAP_START(p8k_iomap, ADDRESS_SPACE_IO, 8)
74	74	//  AM_RANGE(0x00, 0x07) // MH7489
75	75	AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80ctc_0", z80ctc_r, z80ctc_w)
76		AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE("z80pio_0", z80pio_alt_r, z80pio_alt_w)
77		AM_RANGE(0x18, 0x1b) AM_DEVREADWRITE("z80pio_1", z80pio_alt_r, z80pio_alt_w)
78		AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE("z80pio_2", z80pio_alt_r, z80pio_alt_w)
	76	AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE("z80pio_0", z80pio_ba_cd_r, z80pio_ba_cd_w)
	77	AM_RANGE(0x18, 0x1b) AM_DEVREADWRITE("z80pio_1", z80pio_ba_cd_r, z80pio_ba_cd_w)
	78	AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE("z80pio_2", z80pio_ba_cd_r, z80pio_ba_cd_w)
79	79	AM_RANGE(0x20, 0x20) AM_DEVREADWRITE("i8272", upd765_data_r, upd765_data_w)
80	80	AM_RANGE(0x21, 0x21) AM_DEVREAD("i8272", upd765_status_r)
81	81	AM_RANGE(0x24, 0x27) AM_DEVREADWRITE("z80sio_0", sio2_r, sio2_w)
r7374	r7375
261	261
262	262	/* Z80 PIO 0 */
263	263
264		static const z80pio_interface p8k_pio_0_intf =
	264	static Z80PIO_INTERFACE( p8k_pio_0_intf )
265	265	{
266	266	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
267	267	DEVCB_NULL,
r7374	r7375
274	274
275	275	/* Z80 PIO 1 */
276	276
277		static const z80pio_interface p8k_pio_1_intf =
	277	static Z80PIO_INTERFACE( p8k_pio_1_intf )
278	278	{
279	279	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
280	280	DEVCB_NULL,
r7374	r7375
287	287
288	288	/* Z80 PIO 2 */
289	289
290		static const z80pio_interface p8k_pio_2_intf =
	290	static Z80PIO_INTERFACE( p8k_pio_2_intf )
291	291	{
292	292	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
293	293	DEVCB_NULL,
r7374	r7375
353	353	{
354	354	running_device *z80pio = devtag_get_device(device->machine, "z80pio_2");
355	355
356		z80pio_p_w(z80pio, 1, (state) ? 0x10 : 0x00);
	356	z80pio_pb_w(z80pio, 0, (state) ? 0x10 : 0x00);
357	357	}
358	358
359	359	static UPD765_DMA_REQUEST( p8k_i8272_drq_w )
r7374	r7375
545	545	MDRV_Z80CTC_ADD("z80ctc_1", 1229000, p8k_ctc_1_intf)   /* 1.22MHz clock */
546	546	MDRV_Z80SIO_ADD("z80sio_0", 9600, p8k_sio_0_intf)   /* 9.6kBaud default */
547	547	MDRV_Z80SIO_ADD("z80sio_1", 9600, p8k_sio_1_intf)   /* 9.6kBaud default */
548		MDRV_Z80PIO_ADD("z80pio_0", p8k_pio_0_intf)
549		MDRV_Z80PIO_ADD("z80pio_1", p8k_pio_1_intf)
550		MDRV_Z80PIO_ADD("z80pio_2", p8k_pio_2_intf)
	548	MDRV_Z80PIO_ADD("z80pio_0", 1229000, p8k_pio_0_intf)
	549	MDRV_Z80PIO_ADD("z80pio_1", 1229000, p8k_pio_1_intf)
	550	MDRV_Z80PIO_ADD("z80pio_2", 1229000, p8k_pio_2_intf)
551	551	MDRV_UPD765A_ADD("i8272", p8k_i8272_intf)
552	552	MDRV_FLOPPY_2_DRIVES_ADD(p8k_floppy_config)
553	553
r7374	r7375
586	586	MDRV_Z80CTC_ADD("z80ctc_1", XTAL_4MHz, p8k_16_ctc_1_intf)
587	587	MDRV_Z80SIO_ADD("z80sio_0", 9600, p8k_16_sio_0_intf)
588	588	MDRV_Z80SIO_ADD("z80sio_1", 9600, p8k_16_sio_1_intf)
589		MDRV_Z80PIO_ADD("z80pio_0", p8k_16_pio_0_intf )
590		MDRV_Z80PIO_ADD("z80pio_1", p8k_16_pio_1_intf )
591		MDRV_Z80PIO_ADD("z80pio_2", p8k_16_pio_2_intf )
	589	MDRV_Z80PIO_ADD("z80pio_0", XTAL_4MHz, p8k_16_pio_0_intf )
	590	MDRV_Z80PIO_ADD("z80pio_1", XTAL_4MHz, p8k_16_pio_1_intf )
	591	MDRV_Z80PIO_ADD("z80pio_2", XTAL_4MHz, p8k_16_pio_2_intf )
592	592
593	593	/* sound hardware */
594	594	MDRV_SPEAKER_STANDARD_MONO("mono")

src/mess/drivers/ac1.c

r7374	r7375
34	34
35	35	static ADDRESS_MAP_START( ac1_io, ADDRESS_SPACE_IO, 8 )
36	36	ADDRESS_MAP_GLOBAL_MASK(0xff)
37		AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w)
	37	AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
38	38	ADDRESS_MAP_END
39	39
40	40	/* Input ports */
r7374	r7375
115	115	MDRV_CPU_IO_MAP(ac1_io)
116	116	MDRV_MACHINE_RESET( ac1 )
117	117
118		MDRV_Z80PIO_ADD( "z80pio", ac1_z80pio_intf )
	118	MDRV_Z80PIO_ADD( "z80pio", XTAL_8MHz / 4, ac1_z80pio_intf )
119	119
120	120	/* video hardware */
121	121	MDRV_SCREEN_ADD("screen", RASTER)

src/mess/drivers/mz700.c

r7374	r7375
440	440	/* devices */
441	441	MDRV_DEVICE_REMOVE("pit8253")
442	442	MDRV_PIT8253_ADD("pit8253", mz800_pit8253_config)
443		MDRV_Z80PIO_ADD("z80pio", mz800_z80pio_config)
	443	MDRV_Z80PIO_ADD("z80pio", XTAL_17_73447MHz/5, mz800_z80pio_config)
444	444	MDRV_CENTRONICS_ADD("centronics", standard_centronics)
445	445	MACHINE_DRIVER_END
446	446

src/mess/drivers/kaypro.c

r7374	r7375
63	63	ADDRESS_MAP_UNMAP_HIGH
64	64	AM_RANGE(0x00, 0x03) AM_WRITE(kaypro_baud_a_w)
65	65	AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("z80sio", kaypro_sio_r, kaypro_sio_w)
66		AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80pio_g", kayproii_pio_r, kayproii_pio_w)
	66	AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80pio_g", z80pio_ba_cd_r, z80pio_ba_cd_w)
67	67	AM_RANGE(0x0c, 0x0f) AM_WRITE(kayproii_baud_b_w)
68	68	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("wd1793", wd17xx_r, wd17xx_w)
69		AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE("z80pio_s", kayproii_pio_r, kayproii_pio_w)
	69	AM_RANGE(0x1c, 0x1f) AM_DEVREADWRITE("z80pio_s", z80pio_ba_cd_r, z80pio_ba_cd_w)
70	70	ADDRESS_MAP_END
71	71
72	72	static ADDRESS_MAP_START( kaypro2x_io, ADDRESS_SPACE_IO, 8 )
r7374	r7375
252	252	MDRV_QUICKLOAD_ADD("quickload", kayproii, "com,cpm", 3)
253	253	MDRV_WD1793_ADD("wd1793", kaypro_wd1793_interface )
254	254	MDRV_CENTRONICS_ADD("centronics", standard_centronics)
255		MDRV_Z80PIO_ADD( "z80pio_g", kayproii_pio_g_intf )
256		MDRV_Z80PIO_ADD( "z80pio_s", kayproii_pio_s_intf )
	255	MDRV_Z80PIO_ADD( "z80pio_g", 2500000, kayproii_pio_g_intf )
	256	MDRV_Z80PIO_ADD( "z80pio_s", 2500000, kayproii_pio_s_intf )
257	257	MDRV_Z80SIO_ADD( "z80sio", 4800, kaypro_sio_intf )   /* start at 300 baud */
258	258
259	259	MDRV_FLOPPY_2_DRIVES_ADD(kayproii_floppy_config)

src/mess/drivers/super80.c

r7374	r7375
643	643
644	644	MDRV_MACHINE_RESET( super80 )
645	645
646		MDRV_Z80PIO_ADD( "z80pio", super80_pio_intf )
	646	MDRV_Z80PIO_ADD( "z80pio", MASTER_CLOCK/6, super80_pio_intf )
647	647
648	648	MDRV_SCREEN_ADD("screen", RASTER)
649	649	MDRV_SCREEN_REFRESH_RATE(48.8)
r7374	r7375
710	710
711	711	MDRV_MACHINE_RESET( super80 )
712	712
713		MDRV_Z80PIO_ADD( "z80pio", super80_pio_intf )
	713	MDRV_Z80PIO_ADD( "z80pio", MASTER_CLOCK/6, super80_pio_intf )
714	714
715	715	MDRV_SCREEN_ADD("screen", RASTER)
716	716	MDRV_SCREEN_REFRESH_RATE(50)

src/mess/drivers/poly880.c

r7374	r7375
64	64
65	65	static ADDRESS_MAP_START( poly880_io, ADDRESS_SPACE_IO, 8)
66	66	ADDRESS_MAP_GLOBAL_MASK(0xaf)
67		AM_RANGE(0x80, 0x83) AM_DEVREADWRITE(Z80PIO1_TAG, z80pio_alt_r, z80pio_alt_w)
68		AM_RANGE(0x84, 0x87) AM_DEVREADWRITE(Z80PIO2_TAG, z80pio_alt_r, z80pio_alt_w)
	67	AM_RANGE(0x80, 0x83) AM_DEVREADWRITE(Z80PIO1_TAG, z80pio_ba_cd_r, z80pio_ba_cd_w)
	68	AM_RANGE(0x84, 0x87) AM_DEVREADWRITE(Z80PIO2_TAG, z80pio_ba_cd_r, z80pio_ba_cd_w)
69	69	AM_RANGE(0x88, 0x8b) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
70	70	AM_RANGE(0xa0, 0xa0) AM_MIRROR(0x0f) AM_WRITE(cldig_w)
71	71	ADDRESS_MAP_END
r7374	r7375
229	229	cassette_output(state->cassette, BIT(data, 2) ? +1.0 : -1.0);
230	230	}
231	231
232		static const z80pio_interface pio1_intf =
	232	static Z80PIO_INTERFACE( pio1_intf )
233	233	{
234	234	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
235	235	DEVCB_NULL,                  /* port A read callback */
	236	DEVCB_HANDLER(pio1_port_a_w),   /* port A write callback */
	237	DEVCB_NULL,                  /* portA ready active callback */
236	238	DEVCB_HANDLER(pio1_port_b_r),   /* port B read callback */
237		DEVCB_HANDLER(pio1_port_a_w),   /* port A write callback */
238	239	DEVCB_HANDLER(pio1_port_b_w),   /* port B write callback */
239		DEVCB_NULL,                  /* portA ready active callback */
240	240	DEVCB_NULL                  /* portB ready active callback */
241	241	};
242	242
243		static const z80pio_interface pio2_intf =
	243	static Z80PIO_INTERFACE( pio2_intf )
244	244	{
245	245	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
246	246	DEVCB_NULL,                  /* port A read callback */
	247	DEVCB_NULL,                  /* port A write callback */
	248	DEVCB_NULL,                  /* portA ready active callback */
247	249	DEVCB_NULL,                  /* port B read callback */
248		DEVCB_NULL,                  /* port A write callback */
249	250	DEVCB_NULL,                  /* port B write callback */
250		DEVCB_NULL,                  /* portA ready active callback */
251	251	DEVCB_NULL                  /* portB ready active callback */
252	252	};
253	253
r7374	r7375
299	299
300	300	/* devices */
301	301	MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_7_3728MHz/16, ctc_intf)
302		MDRV_Z80PIO_ADD(Z80PIO1_TAG, pio1_intf)
303		MDRV_Z80PIO_ADD(Z80PIO2_TAG, pio2_intf)
	302	MDRV_Z80PIO_ADD(Z80PIO1_TAG, XTAL_7_3728MHz/16, pio1_intf)
	303	MDRV_Z80PIO_ADD(Z80PIO2_TAG, XTAL_7_3728MHz/16, pio2_intf)
304	304
305	305	MDRV_CASSETTE_ADD(CASSETTE_TAG, poly880_cassette_config)
306	306

src/mess/drivers/lc80.c

r7374	r7375
47	47
48	48	static ADDRESS_MAP_START( lc80_io, ADDRESS_SPACE_IO, 8 )
49	49	ADDRESS_MAP_GLOBAL_MASK(0x1f)
50		AM_RANGE(0xf4, 0xf7) AM_DEVREADWRITE(Z80PIO1_TAG, z80pio_r, z80pio_w)
51		AM_RANGE(0xf8, 0xfb) AM_DEVREADWRITE(Z80PIO2_TAG, z80pio_r, z80pio_w)
	50	AM_RANGE(0xf4, 0xf7) AM_DEVREADWRITE(Z80PIO1_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
	51	AM_RANGE(0xf8, 0xfb) AM_DEVREADWRITE(Z80PIO2_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
52	52	AM_RANGE(0xec, 0xef) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
53	53	ADDRESS_MAP_END
54	54
r7374	r7375
218	218	update_display(state);
219	219	}
220	220
221		static const z80pio_interface pio1_intf =
	221	static Z80PIO_INTERFACE( pio1_intf )
222	222	{
223	223	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
224	224	DEVCB_NULL,                  /* port A read callback */
	225	DEVCB_HANDLER(pio1_port_a_w),   /* port A write callback */
	226	DEVCB_NULL,                  /* portA ready active callback */
225	227	DEVCB_HANDLER(pio1_port_b_r),   /* port B read callback */
226		DEVCB_HANDLER(pio1_port_a_w),   /* port A write callback */
227	228	DEVCB_HANDLER(pio1_port_b_w),   /* port B write callback */
228		DEVCB_NULL,                  /* portA ready active callback */
229	229	DEVCB_NULL                  /* portB ready active callback */
230	230	};
231	231
r7374	r7375
264	264	return data;
265	265	}
266	266
267		static const z80pio_interface pio2_intf =
	267	static Z80PIO_INTERFACE( pio2_intf )
268	268	{
269	269	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
270	270	DEVCB_NULL,                  /* port A read callback */
	271	DEVCB_NULL,                  /* port A write callback */
	272	DEVCB_NULL,                  /* portA ready active callback */
271	273	DEVCB_HANDLER(pio2_port_b_r),   /* port B read callback */
272		DEVCB_NULL,                  /* port A write callback */
273	274	DEVCB_NULL,                  /* port B write callback */
274		DEVCB_NULL,                  /* portA ready active callback */
275	275	DEVCB_NULL                  /* portB ready active callback */
276	276	};
277	277
r7374	r7375
373	373
374	374	/* devices */
375	375	MDRV_Z80CTC_ADD(Z80CTC_TAG, 900000, ctc_intf)
376		MDRV_Z80PIO_ADD(Z80PIO1_TAG, pio1_intf)
377		MDRV_Z80PIO_ADD(Z80PIO2_TAG, pio2_intf)
	376	MDRV_Z80PIO_ADD(Z80PIO1_TAG, 900000, pio1_intf)
	377	MDRV_Z80PIO_ADD(Z80PIO2_TAG, 900000, pio2_intf)
378	378
379	379	MDRV_CASSETTE_ADD(CASSETTE_TAG, lc80_cassette_config)
380	380
r7374	r7375
403	403
404	404	/* devices */
405	405	MDRV_Z80CTC_ADD(Z80CTC_TAG, 900000, ctc_intf)
406		MDRV_Z80PIO_ADD(Z80PIO1_TAG, pio1_intf)
407		MDRV_Z80PIO_ADD(Z80PIO2_TAG, pio2_intf)
	406	MDRV_Z80PIO_ADD(Z80PIO1_TAG, 900000, pio1_intf)
	407	MDRV_Z80PIO_ADD(Z80PIO2_TAG, 900000, pio2_intf)
408	408
409	409	MDRV_CASSETTE_ADD(CASSETTE_TAG, lc80_cassette_config)
410	410

src/mess/drivers/c80.c

r7374	r7375
25	25
26	26	static ADDRESS_MAP_START( c80_io, ADDRESS_SPACE_IO, 8 )
27	27	ADDRESS_MAP_GLOBAL_MASK(0xff)
28		AM_RANGE(0x7c, 0x7f) AM_DEVREADWRITE(Z80PIO2_TAG, z80pio_r, z80pio_w)
29		AM_RANGE(0xbc, 0xbf) AM_DEVREADWRITE(Z80PIO1_TAG, z80pio_r, z80pio_w)
	28	AM_RANGE(0x7c, 0x7f) AM_DEVREADWRITE(Z80PIO2_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
	29	AM_RANGE(0xbc, 0xbf) AM_DEVREADWRITE(Z80PIO1_TAG, z80pio_cd_ba_r, z80pio_cd_ba_w)
30	30	ADDRESS_MAP_END
31	31
32	32	/* Input Ports */
r7374	r7375
191	191	}
192	192	}
193	193
194		static const z80pio_interface pio1_intf =
	194	static Z80PIO_INTERFACE( pio1_intf )
195	195	{
196	196	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
197	197	DEVCB_HANDLER(pio1_port_a_r),   /* port A read callback */
	198	DEVCB_HANDLER(pio1_port_a_w),   /* port A write callback */
	199	DEVCB_NULL,                  /* portA ready active callback */
198	200	DEVCB_NULL,                  /* port B read callback */
199		DEVCB_HANDLER(pio1_port_a_w),   /* port A write callback */
200	201	DEVCB_HANDLER(pio1_port_b_w),   /* port B write callback */
201		DEVCB_NULL,                  /* portA ready active callback */
202	202	DEVCB_LINE(pio1_brdy_w)         /* portB ready active callback */
203	203	};
204	204
205		static const z80pio_interface pio2_intf =
	205	static Z80PIO_INTERFACE( pio2_intf )
206	206	{
207	207	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
208	208	DEVCB_NULL,                  /* port A read callback */
	209	DEVCB_NULL,                  /* port A write callback */
	210	DEVCB_NULL,                  /* portA ready active callback */
209	211	DEVCB_NULL,                  /* port B read callback */
210		DEVCB_NULL,                  /* port A write callback */
211	212	DEVCB_NULL,                  /* port B write callback */
212		DEVCB_NULL,                  /* portA ready active callback */
213	213	DEVCB_NULL                  /* portB ready active callback */
214	214	};
215	215
r7374	r7375
262	262	MDRV_DEFAULT_LAYOUT( layout_c80 )
263	263
264	264	/* devices */
265		MDRV_Z80PIO_ADD(Z80PIO1_TAG, pio1_intf)
266		MDRV_Z80PIO_ADD(Z80PIO2_TAG, pio2_intf)
	265	MDRV_Z80PIO_ADD(Z80PIO1_TAG, 2500000, pio1_intf)
	266	MDRV_Z80PIO_ADD(Z80PIO2_TAG, 2500000, pio2_intf)
267	267	MDRV_CASSETTE_ADD(CASSETTE_TAG, c80_cassette_config)
268	268
269	269	/* internal ram */

src/mess/drivers/xerox820.c

r7374	r7375
117	117	if (state->keydata != keydata)
118	118	{
119	119	state->keydata = keydata;
120		//z80pio_bstb_w(state->kbpio, 0);
121		//z80pio_bstb_w(state->kbpio, 1);
122		z80pio_p_w(state->kbpio, 1, state->keydata);
	120
	121	/* strobe in keyboard data */
	122	z80pio_bstb_w(state->kbpio, 0);
	123	z80pio_bstb_w(state->kbpio, 1);
123	124	}
124	125	}
125	126	}
r7374	r7375
255	256	AM_RANGE(0x00, 0x00) AM_MIRROR(0xff03) AM_DEVWRITE(COM8116_TAG, com8116_str_w)
256	257	AM_RANGE(0x04, 0x04) AM_MIRROR(0xff02) AM_DEVREADWRITE(Z80SIO_TAG, z80sio_d_r, z80sio_d_w)
257	258	AM_RANGE(0x05, 0x05) AM_MIRROR(0xff02) AM_DEVREADWRITE(Z80SIO_TAG, z80sio_c_r, z80sio_c_w)
258		AM_RANGE(0x08, 0x0b) AM_MIRROR(0xff00) AM_DEVREADWRITE(Z80GPPIO_TAG, z80pio_alt_r, z80pio_alt_w)
	259	AM_RANGE(0x08, 0x0b) AM_MIRROR(0xff00) AM_DEVREADWRITE(Z80GPPIO_TAG, z80pio_ba_cd_r, z80pio_ba_cd_w)
259	260	AM_RANGE(0x0c, 0x0c) AM_MIRROR(0xff03) AM_DEVWRITE(COM8116_TAG, com8116_stt_w)
260	261	AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE(WD1771_TAG, wd17xx_r, wd17xx_w)
261	262	AM_RANGE(0x14, 0x14) AM_MIRROR(0xff03) AM_MASK(0xff00) AM_WRITE(scroll_w)
262	263	AM_RANGE(0x18, 0x1b) AM_MIRROR(0xff00) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
263		AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE(Z80KBPIO_TAG, z80pio_alt_r, z80pio_alt_w)
	264	AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE(Z80KBPIO_TAG, z80pio_ba_cd_r, z80pio_ba_cd_w)
264	265	ADDRESS_MAP_END
265	266
266	267	static ADDRESS_MAP_START( xerox820ii_mem, ADDRESS_SPACE_PROGRAM, 8 )
r7374	r7375
492	493	return state->keydata;
493	494	};
494	495
495		static const z80pio_interface xerox820_kbpio_intf =
	496	static Z80PIO_INTERFACE( xerox820_kbpio_intf )
496	497	{
497	498	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
498	499	DEVCB_HANDLER(kbpio_pa_r),         /* port A read callback */
	500	DEVCB_HANDLER(xerox820_kbpio_pa_w),   /* port A write callback */
	501	DEVCB_NULL,                     /* portA ready active callback */
499	502	DEVCB_HANDLER(kbpio_pb_r),         /* port B read callback */
500		DEVCB_HANDLER(xerox820_kbpio_pa_w),   /* port A write callback */
501	503	DEVCB_NULL,                     /* port B write callback */
502		DEVCB_NULL,                     /* portA ready active callback */
503	504	DEVCB_LINE(kbpio_pbrdy_w)         /* portB ready active callback */
504	505	};
505	506
506		static const z80pio_interface xerox820ii_kbpio_intf =
	507	static Z80PIO_INTERFACE( xerox820ii_kbpio_intf )
507	508	{
508	509	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
509	510	DEVCB_HANDLER(kbpio_pa_r),         /* port A read callback */
	511	DEVCB_HANDLER(xerox820ii_kbpio_pa_w),   /* port A write callback */
	512	DEVCB_NULL,                     /* portA ready active callback */
510	513	DEVCB_HANDLER(kbpio_pb_r),         /* port B read callback */
511		DEVCB_HANDLER(xerox820ii_kbpio_pa_w),   /* port A write callback */
512	514	DEVCB_NULL,                     /* port B write callback */
513		DEVCB_NULL,                     /* portA ready active callback */
514	515	DEVCB_LINE(kbpio_pbrdy_w)         /* portB ready active callback */
515	516	};
516	517
517		static const z80pio_interface gppio_intf =
	518	static Z80PIO_INTERFACE( gppio_intf )
518	519	{
519	520	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* callback when change interrupt status */
520	521	DEVCB_NULL,      /* port A read callback */
	522	DEVCB_NULL,      /* port A write callback */
	523	DEVCB_NULL,      /* portA ready active callback */
521	524	DEVCB_NULL,      /* port B read callback */
522		DEVCB_NULL,      /* port A write callback */
523	525	DEVCB_NULL,      /* port B write callback */
524		DEVCB_NULL,      /* portA ready active callback */
525	526	DEVCB_NULL      /* portB ready active callback */
526	527	};
527	528
r7374	r7375
874	875
875	876	/* devices */
876	877	MDRV_Z80SIO_ADD(Z80SIO_TAG, XTAL_20MHz/8, sio_intf)
877		MDRV_Z80PIO_ADD(Z80KBPIO_TAG, xerox820_kbpio_intf)
878		MDRV_Z80PIO_ADD(Z80GPPIO_TAG, gppio_intf)
	878	MDRV_Z80PIO_ADD(Z80KBPIO_TAG, XTAL_20MHz/8, xerox820_kbpio_intf)
	879	MDRV_Z80PIO_ADD(Z80GPPIO_TAG, XTAL_20MHz/8, gppio_intf)
879	880	MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_20MHz/8, ctc_intf)
880	881	MDRV_WD1771_ADD(WD1771_TAG, wd1771_intf)
881	882	MDRV_FLOPPY_2_DRIVES_ADD(xerox820_floppy_config)
r7374	r7375
916	917
917	918	/* devices */
918	919	MDRV_Z80SIO_ADD(Z80SIO_TAG, XTAL_16MHz/4, sio_intf)
919		MDRV_Z80PIO_ADD(Z80KBPIO_TAG, xerox820ii_kbpio_intf)
920		MDRV_Z80PIO_ADD(Z80GPPIO_TAG, gppio_intf)
	920	MDRV_Z80PIO_ADD(Z80KBPIO_TAG, XTAL_16MHz/4, xerox820ii_kbpio_intf)
	921	MDRV_Z80PIO_ADD(Z80GPPIO_TAG, XTAL_16MHz/4, gppio_intf)
921	922	MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_16MHz/4, ctc_intf)
922	923	MDRV_WD179X_ADD(WD1771_TAG, wd1771_intf) // WD1797
923	924	MDRV_FLOPPY_2_DRIVES_ADD(xerox820_floppy_config)

src/mess/drivers/bbcbc.c

r7374	r7375
39	39
40	40	static ADDRESS_MAP_START( bbcbc_io, ADDRESS_SPACE_IO, 8 )
41	41	ADDRESS_MAP_GLOBAL_MASK(0xff)
42		AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio", z80pio_r, z80pio_w)
	42	AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
43	43	AM_RANGE(0x80, 0x80) AM_READWRITE(TMS9928A_vram_r, TMS9928A_vram_w)
44	44	AM_RANGE(0x81, 0x81) AM_READWRITE(TMS9928A_register_r, TMS9928A_register_w)
45	45	ADDRESS_MAP_END
r7374	r7375
101	101	};
102	102
103	103	/* TODO */
104		static const z80pio_interface bbcbc_z80pio_intf =
	104	static Z80PIO_INTERFACE( bbcbc_z80pio_intf )
105	105	{
106	106	DEVCB_NULL,   /* int callback */
107	107	DEVCB_NULL,   /* port a read */
r7374	r7375
171	171	MDRV_MACHINE_START( bbcbc )
172	172	MDRV_MACHINE_RESET( bbcbc )
173	173
174		MDRV_Z80PIO_ADD( "z80pio", bbcbc_z80pio_intf )
	174	MDRV_Z80PIO_ADD( "z80pio", MAIN_CLOCK / 8, bbcbc_z80pio_intf )
175	175
176	176	MDRV_IMPORT_FROM( tms9928a )
177	177	MDRV_SCREEN_MODIFY("screen")

src/mess/drivers/kc.c

r7374	r7375
390	390	MDRV_MACHINE_START( kc85 )
391	391	MDRV_MACHINE_RESET( kc85_3 )
392	392
393		MDRV_Z80PIO_ADD( "z80pio", kc85_pio_intf )
	393	MDRV_Z80PIO_ADD( "z80pio", 1379310.344828, kc85_pio_intf )
394	394	MDRV_Z80CTC_ADD( "z80ctc", 1379310.344828, kc85_ctc_intf )
395	395
396	396	/* video hardware */

docs/messnew.txt

r7374	r7375
42	42	System Driver Changes:
43	43	----------------------
44	44
	45	- [ABC80] Partially fixed keyboard input. [Curt Coder]
	46
45	47	- [APEXC] Fixed disassembly in the debugger. [Robbbert]
46	48
47	49	- [C16] Connected Commodore 1551 floppy drive. [Curt Coder]
r7374	r7375
86	88	- The core is based on MAME 0.136u3.  This incorporates all features of the
87	89	update to this core.  [MAME team]
88	90
89		- [CIA6526] Refactored interface, added SP/CNT callbacks, and fixed serial
	91	- Refactored MOS6526 CIA interface, added SP/CNT callbacks, and fixed serial
90	92	port transfer. [Curt Coder]
91	93
92	94	- Cleanups for driver_data and Standard C library usage.  [Atari Ace]

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