src/mess/drivers/trs80.c
| r7329 | r7330 | |
| 744 | 744 | ROM_FILL(0, 0x4400, 0xff) /* 0x4000 for trs80_gfxram + 0x400 for videoram */ |
| 745 | 745 | ROM_END |
| 746 | 746 | |
| 747 | | ROM_START(trs80m2) |
| 748 | | ROM_REGION(0x10000, "maincpu",0) |
| 749 | | ROM_LOAD("8043216.u11", 0x0000, 0x0800, CRC(7017a373) SHA1(1c7127fcc99fc351a40d3a3199ba478e783c452e)) |
| 750 | | |
| 751 | | ROM_REGION(0x800, "gfx1",0) |
| 752 | | ROM_LOAD("8043316.u9", 0x0000, 0x0800, CRC(04425b03) SHA1(32a29dc202b7fcf21838289cc3bffc51ef943dab)) |
| 753 | | |
| 754 | | ROM_REGION(0x400, "i8021",0) |
| 755 | | ROM_LOAD("keyboard.z4", 0x0000, 0x0400, NO_DUMP) |
| 756 | | ROM_END |
| 757 | | |
| 758 | | /* |
| 759 | | |
| 760 | | TRS-80 Model II/16 Z80 CPU Board ROM |
| 761 | | |
| 762 | | It would seem that every processor board I find has a different ROM on it! It seems that the early ROMs |
| 763 | | don't boot directly from a hard drive. But there seems to be many versions of ROMs. I've placed them in |
| 764 | | order of serial number in the list below. There also appears to be at least two board revisions, "C" and "D". |
| 765 | | |
| 766 | | cpu_c8ff.bin/hex: |
| 767 | | Mask Programmable PROM, Equivilant to Intel 2716 EPROM, with checksum C8FF came from a cpu board with |
| 768 | | serial number 120353 out of a Model II with serial number 2002102 and catalog number 26-6002. The board |
| 769 | | was labeled, "Revision C". This appears to be an early ROM and according to a very helpful fellow |
| 770 | | collector, Aaron in Australia, doesn't allow boot directly from a hard disk. |
| 771 | | |
| 772 | | cpu_9733.bin/hex: |
| 773 | | An actual SGS-Ates (Now STMicroelectronics) 2716 EPROM, with checksum 9733 came from a cpu board with |
| 774 | | serial number 161993 out of a pile of random cards that I have. I don't know what machine it originated |
| 775 | | from. The board was labeled, "Revision C". This appears to be a later ROM in that it is able to boot |
| 776 | | directly from an 8MB hard disk. The EPROM had a windows sticker on it labeled, "U54". |
| 777 | | |
| 778 | | cpu_2119.bin/hex: |
| 779 | | An actual Texas Instruments 2716 EPROM, with checksum 2119 came from a cpu board with serial number |
| 780 | | 178892 out of a Model 16 with serial number 64014509 and catalog number 26-4002. The board was labeled, |
| 781 | | "Revision D". This appears to be a later ROM and does appear to allow boot directly from an 8MB hard disk. |
| 782 | | |
| 783 | | cpu_2bff.bin/hex: |
| 784 | | Mask Programmable PROM, Equivilant to Intel 2716 EPROM, with checksum 2BFF came from a cpu board with |
| 785 | | serial number 187173 our of a pile of random cards that I have. I don't know what machine it originated |
| 786 | | from. The board was labeled, "Revision D". This appears to be a later ROM in that it is able to boot |
| 787 | | directly from an 8MB hard disk. |
| 788 | | |
| 789 | | */ |
| 790 | | ROM_START(trs80m216) |
| 791 | | ROM_REGION(0x10000, "maincpu",0) |
| 792 | | ROM_SYSTEM_BIOS(0, "c8ff", "S/N 120353") |
| 793 | | ROMX_LOAD("cpu_c8ff.u11", 0x0000, 0x0800, CRC(7017a373) SHA1(1c7127fcc99fc351a40d3a3199ba478e783c452e), ROM_BIOS(1)) |
| 794 | | ROM_SYSTEM_BIOS(1, "9733", "S/N 161993") |
| 795 | | ROMX_LOAD("cpu_9733.u11", 0x0000, 0x0800, CRC(823924b1) SHA1(aee0625bcbd8620b28ab705e15ad9bea804c8476), ROM_BIOS(2)) |
| 796 | | ROM_SYSTEM_BIOS(2, "2119", "S/N 64014509") |
| 797 | | ROMX_LOAD("cpu_2119.u11", 0x0000, 0x0800, CRC(7a663049) SHA1(f308439ce266df717bfe79adcdad6024b4faa141), ROM_BIOS(3)) |
| 798 | | ROM_SYSTEM_BIOS(3, "2bff", "S/N 187173") |
| 799 | | ROMX_LOAD("cpu_2bff.u11", 0x0000, 0x0800, CRC(c6c71d8b) SHA1(7107e2cbbe769851a4460680c2deff8e76a101b5), ROM_BIOS(4)) |
| 800 | | |
| 801 | | ROM_REGION(0x800, "gfx1",0) |
| 802 | | ROM_LOAD("8043316.u9", 0x0000, 0x0800, CRC(04425b03) SHA1(32a29dc202b7fcf21838289cc3bffc51ef943dab)) |
| 803 | | |
| 804 | | ROM_REGION(0x400, "i8021",0) |
| 805 | | ROM_LOAD("keyboard.z4", 0x0000, 0x0400, NO_DUMP) |
| 806 | | ROM_END |
| 807 | | |
| 808 | 747 | ROM_START(trs80m3) |
| 809 | 748 | /* ROMS we have and are missing: |
| 810 | 749 | HAVE TRS-80 Model III Level 1 ROM (U104) |
| r7329 | r7330 | |
| 930 | 869 | COMP( 1983, radionic, trs80, 0, radionic, trs80, trs80, "Komtek", "Radionic" , 0 ) |
| 931 | 870 | COMP( 1980, sys80, trs80, 0, sys80, trs80, trs80l2, "EACA Computers Ltd.","System-80" , 0 ) |
| 932 | 871 | COMP( 1981, lnw80, trs80, 0, lnw80, trs80m3, lnw80, "LNW Research","LNW-80", 0 ) |
| 933 | | COMP( 1979, trs80m2, trs80, 0, model2, trs80m3, trs80m4, "Tandy Radio Shack", "TRS-80 Model II", GAME_NOT_WORKING ) |
| 934 | | COMP( 1979, trs80m216,trs80, 0, model2, trs80m3, trs80m4, "Tandy Radio Shack", "TRS-80 Model II/16", GAME_NOT_WORKING ) |
| 935 | 872 | COMP( 1980, trs80m3, trs80, 0, model3, trs80m3, trs80m4, "Tandy Radio Shack", "TRS-80 Model III", 0 ) |
| 936 | 873 | COMP( 1980, trs80m4, trs80, 0, model4, trs80m3, trs80m4, "Tandy Radio Shack", "TRS-80 Model 4", 0 ) |
| 937 | 874 | COMP( 1983, trs80m4p, trs80, 0, model4p, trs80m3, trs80m4p, "Tandy Radio Shack", "TRS-80 Model 4P", 0 ) |
src/mess/drivers/trs80m2.c
| r0 | r7330 | |
| 1 | /*
|
| 2 | |
| 3 | TODO:
|
| 4 | |
| 5 | - boot ROM banking
|
| 6 | - main RAM banking
|
| 7 | - video RAM banking
|
| 8 | - video row update
|
| 9 | - Z80 daisy chain
|
| 10 | - RTC
|
| 11 | - floppy DRQ
|
| 12 | - floppy DDEN
|
| 13 | - keyboard CPU ROM
|
| 14 | - keyboard layout
|
| 15 | |
| 16 | */
|
| 17 | |
| 18 | #include "emu.h"
|
| 19 | #include "includes/trs80m2.h"
|
| 20 | #include "cpu/z80/z80.h"
|
| 21 | #include "cpu/z80/z80daisy.h"
|
| 22 | #include "cpu/mcs48/mcs48.h"
|
| 23 | #include "devices/flopdrv.h"
|
| 24 | #include "devices/messram.h"
|
| 25 | #include "machine/ctronics.h"
|
| 26 | #include "machine/wd17xx.h"
|
| 27 | #include "machine/z80ctc.h"
|
| 28 | #include "machine/z80dma.h"
|
| 29 | #include "machine/z80pio.h"
|
| 30 | #include "machine/z80sio.h"
|
| 31 | #include "video/mc6845.h"
|
| 32 | |
| 33 | /* Read/Write Handlers */
|
| 34 | |
| 35 | static READ8_DEVICE_HANDLER( sio0_r )
|
| 36 | {
|
| 37 | switch (offset)
|
| 38 | {
|
| 39 | case 0:
|
| 40 | return z80sio_d_r(device, 0);
|
| 41 | case 1:
|
| 42 | return z80sio_c_r(device, 0);
|
| 43 | case 2:
|
| 44 | return z80sio_d_r(device, 1);
|
| 45 | case 3:
|
| 46 | return z80sio_c_r(device, 1);
|
| 47 | }
|
| 48 | |
| 49 | return 0;
|
| 50 | }
|
| 51 | |
| 52 | static WRITE8_DEVICE_HANDLER( sio0_w )
|
| 53 | {
|
| 54 | switch (offset)
|
| 55 | {
|
| 56 | case 0:
|
| 57 | z80sio_d_w(device, 0, data);
|
| 58 | break;
|
| 59 | case 1:
|
| 60 | z80sio_c_w(device, 0, data);
|
| 61 | break;
|
| 62 | case 2:
|
| 63 | z80sio_d_w(device, 1, data);
|
| 64 | break;
|
| 65 | case 3:
|
| 66 | z80sio_c_w(device, 1, data);
|
| 67 | break;
|
| 68 | }
|
| 69 | }
|
| 70 | |
| 71 | static WRITE8_HANDLER( rom_enable_w )
|
| 72 | {
|
| 73 | /*
|
| 74 | |
| 75 | bit description
|
| 76 | |
| 77 | 0 BOOT ROM
|
| 78 | 1
|
| 79 | 2
|
| 80 | 3
|
| 81 | 4
|
| 82 | 5
|
| 83 | 6
|
| 84 | 7
|
| 85 | |
| 86 | */
|
| 87 | }
|
| 88 | |
| 89 | static READ8_HANDLER( keyboard_r )
|
| 90 | {
|
| 91 | /* read keyboard data */
|
| 92 | |
| 93 | /* clear keyboard interrupt */
|
| 94 |
|
| 95 | return 0;
|
| 96 | }
|
| 97 | |
| 98 | static READ8_HANDLER( rtc_r )
|
| 99 | {
|
| 100 | /* clear RTC interrupt */
|
| 101 | |
| 102 | return 0;
|
| 103 | }
|
| 104 | |
| 105 | static READ8_HANDLER( nmi_r )
|
| 106 | {
|
| 107 | /*
|
| 108 | |
| 109 | bit signal description
|
| 110 | |
| 111 | 0
|
| 112 | 1
|
| 113 | 2
|
| 114 | 3
|
| 115 | 4 _80/40 character mode
|
| 116 | 5 RTC interrupt enable
|
| 117 | 6 video display enable
|
| 118 | 7 KBIRQ keyboard interrupt
|
| 119 | |
| 120 | */
|
| 121 | |
| 122 | return 0;
|
| 123 | }
|
| 124 | |
| 125 | static WRITE8_HANDLER( nmi_w )
|
| 126 | {
|
| 127 | /*
|
| 128 | |
| 129 | bit signal description
|
| 130 | |
| 131 | 0 memory bank select bit 0
|
| 132 | 1 memory bank select bit 1
|
| 133 | 2 memory bank select bit 2
|
| 134 | 3 memory bank select bit 3
|
| 135 | 4 80/40 character mode
|
| 136 | 5 RTC interrupt enable
|
| 137 | 6 video display enable
|
| 138 | 7 video RAM enable
|
| 139 | |
| 140 | */
|
| 141 | }
|
| 142 | |
| 143 | static READ8_HANDLER( keyboard_data_r )
|
| 144 | {
|
| 145 | return 0;
|
| 146 | }
|
| 147 | |
| 148 | static WRITE8_HANDLER( keyboard_ctrl_w )
|
| 149 | {
|
| 150 | /*
|
| 151 | |
| 152 | bit description
|
| 153 | |
| 154 | 0 DATA
|
| 155 | 1 CLOCK
|
| 156 | 2 LED
|
| 157 | 3
|
| 158 | 4 LED
|
| 159 | 5
|
| 160 | 6
|
| 161 | 7
|
| 162 | |
| 163 | */
|
| 164 | }
|
| 165 | |
| 166 | static WRITE8_HANDLER( keyboard_latch_w )
|
| 167 | {
|
| 168 | /*
|
| 169 | |
| 170 | bit description
|
| 171 | |
| 172 | 0 D
|
| 173 | 1 C
|
| 174 | 2 B
|
| 175 | 3 A
|
| 176 | 4
|
| 177 | 5
|
| 178 | 6
|
| 179 | 7
|
| 180 | |
| 181 | */
|
| 182 | }
|
| 183 | |
| 184 | /* Memory Maps */
|
| 185 | |
| 186 | static ADDRESS_MAP_START( trs80m2_mem, ADDRESS_SPACE_PROGRAM, 8 )
|
| 187 | AM_RANGE(0x0000, 0x07ff) AM_ROM
|
| 188 | AM_RANGE(0x0800, 0xf7ff) AM_RAM
|
| 189 | AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE_MEMBER(trs80m2_state, video_ram)
|
| 190 | ADDRESS_MAP_END
|
| 191 | |
| 192 | static ADDRESS_MAP_START( trs80m2_io, ADDRESS_SPACE_IO, 8 )
|
| 193 | AM_RANGE(0xe0, 0xe3) AM_DEVREADWRITE(Z80PIO_TAG, z80pio_r, z80pio_w)
|
| 194 | AM_RANGE(0xe4, 0xe7) AM_DEVREADWRITE(FD1791_TAG, wd17xx_r, wd17xx_w)
|
| 195 | AM_RANGE(0xf0, 0xf3) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_r, z80ctc_w)
|
| 196 | AM_RANGE(0xf4, 0xf7) AM_DEVREADWRITE(Z80SIO_TAG, sio0_r, sio0_w)
|
| 197 | AM_RANGE(0xf8, 0xf8) AM_DEVREADWRITE(Z80DMA_TAG, z80dma_r, z80dma_w)
|
| 198 | AM_RANGE(0xf9, 0xf9) AM_WRITE(rom_enable_w)
|
| 199 | AM_RANGE(0xfc, 0xfc) AM_READ(keyboard_r) AM_DEVWRITE(MC6845_TAG, mc6845_address_w)
|
| 200 | AM_RANGE(0xfd, 0xfd) AM_DEVREADWRITE(MC6845_TAG, mc6845_register_r, mc6845_register_w)
|
| 201 | AM_RANGE(0xfe, 0xfe) AM_READ(rtc_r)
|
| 202 | AM_RANGE(0xff, 0xff) AM_READWRITE(nmi_r, nmi_w)
|
| 203 | ADDRESS_MAP_END
|
| 204 | |
| 205 | static ADDRESS_MAP_START( trs80m2_keyboard_io, ADDRESS_SPACE_IO, 8 )
|
| 206 | AM_RANGE(MCS48_PORT_P0, MCS48_PORT_P0) AM_READ(keyboard_data_r)
|
| 207 | AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(keyboard_ctrl_w)
|
| 208 | AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(keyboard_latch_w)
|
| 209 | ADDRESS_MAP_END
|
| 210 | |
| 211 | /* Input Ports */
|
| 212 | |
| 213 | static INPUT_PORTS_START( trs80m2 )
|
| 214 | PORT_START("ROW0")
|
| 215 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 216 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 217 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 218 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 219 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 220 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 221 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 222 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 223 | |
| 224 | PORT_START("ROW1")
|
| 225 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 226 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 227 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 228 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 229 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 230 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 231 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 232 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 233 | |
| 234 | PORT_START("ROW2")
|
| 235 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 236 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 237 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 238 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 239 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 240 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 241 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 242 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 243 | |
| 244 | PORT_START("ROW3")
|
| 245 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 246 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 247 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 248 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 249 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 250 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 251 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 252 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 253 | |
| 254 | PORT_START("ROW4")
|
| 255 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 256 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 257 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 258 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 259 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 260 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 261 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 262 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 263 | |
| 264 | PORT_START("ROW5")
|
| 265 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 266 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 267 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 268 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 269 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 270 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 271 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 272 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 273 | |
| 274 | PORT_START("ROW6")
|
| 275 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 276 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 277 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 278 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 279 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 280 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 281 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 282 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 283 | |
| 284 | PORT_START("ROW7")
|
| 285 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 286 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 287 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 288 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 289 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 290 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 291 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 292 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 293 | |
| 294 | PORT_START("ROW8")
|
| 295 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 296 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 297 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 298 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 299 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 300 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 301 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 302 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 303 | |
| 304 | PORT_START("ROW9")
|
| 305 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 306 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 307 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 308 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 309 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 310 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 311 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 312 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 313 | |
| 314 | PORT_START("ROW10")
|
| 315 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 316 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 317 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 318 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 319 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 320 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 321 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 322 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 323 | |
| 324 | PORT_START("ROW11")
|
| 325 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 326 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 327 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 328 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 329 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 330 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 331 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 332 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD )
|
| 333 | INPUT_PORTS_END
|
| 334 | |
| 335 | /* Video */
|
| 336 | |
| 337 | static MC6845_UPDATE_ROW( trs80m2_update_row )
|
| 338 | {
|
| 339 | }
|
| 340 | |
| 341 | static WRITE_LINE_DEVICE_HANDLER( vsync_w )
|
| 342 | {
|
| 343 | }
|
| 344 | |
| 345 | static const mc6845_interface mc6845_intf = |
| 346 | {
|
| 347 | SCREEN_TAG,
|
| 348 | 8,
|
| 349 | NULL,
|
| 350 | trs80m2_update_row,
|
| 351 | NULL,
|
| 352 | DEVCB_NULL,
|
| 353 | DEVCB_NULL,
|
| 354 | DEVCB_NULL,
|
| 355 | DEVCB_LINE(vsync_w),
|
| 356 | NULL
|
| 357 | };
|
| 358 | |
| 359 | static VIDEO_START( trs80m2 )
|
| 360 | {
|
| 361 | trs80m2_state *state = (trs80m2_state *)machine->driver_data;
|
| 362 | |
| 363 | /* find devices */
|
| 364 | state->mc6845 = devtag_get_device(machine, MC6845_TAG);
|
| 365 | |
| 366 | /* find memory regions */
|
| 367 | state->char_rom = memory_region(machine, MC6845_TAG);
|
| 368 | }
|
| 369 | |
| 370 | static VIDEO_UPDATE( trs80m2 )
|
| 371 | {
|
| 372 | trs80m2_state *state = (trs80m2_state *)screen->machine->driver_data;
|
| 373 | |
| 374 | mc6845_update(state->mc6845, bitmap, cliprect);
|
| 375 | |
| 376 | return 0;
|
| 377 | }
|
| 378 | |
| 379 | /* Z80-DMA Interface */
|
| 380 | |
| 381 | static Z80DMA_INTERFACE( dma_intf )
|
| 382 | {
|
| 383 | DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_HALT),
|
| 384 | DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
|
| 385 | DEVCB_NULL,
|
| 386 | DEVCB_MEMORY_HANDLER(Z80_TAG, PROGRAM, memory_read_byte),
|
| 387 | DEVCB_MEMORY_HANDLER(Z80_TAG, PROGRAM, memory_write_byte),
|
| 388 | DEVCB_MEMORY_HANDLER(Z80_TAG, IO, memory_read_byte),
|
| 389 | DEVCB_MEMORY_HANDLER(Z80_TAG, IO, memory_write_byte)
|
| 390 | };
|
| 391 | |
| 392 | /* Z80-PIO Interface */
|
| 393 | |
| 394 | static READ8_DEVICE_HANDLER( pio_pa_r )
|
| 395 | {
|
| 396 | /*
|
| 397 | |
| 398 | bit signal description
|
| 399 | |
| 400 | 0 FDC INT request
|
| 401 | 1 2-sided diskette
|
| 402 | 2 disk change
|
| 403 | 3 prime
|
| 404 | 4 printer fault
|
| 405 | 5 printer select
|
| 406 | 6 paper empty
|
| 407 | 7 printer busy
|
| 408 | |
| 409 | */
|
| 410 | |
| 411 | trs80m2_state *state = (trs80m2_state *)device->machine->driver_data;
|
| 412 |
|
| 413 | UINT8 data = 0;
|
| 414 | |
| 415 | /* floppy interrupt */
|
| 416 | data |= state->fdc_intrq;
|
| 417 | |
| 418 | /* printer fault */
|
| 419 | data |= centronics_fault_r(state->centronics) << 4;
|
| 420 | |
| 421 | /* paper empty */
|
| 422 | data |= !centronics_pe_r(state->centronics) << 6;
|
| 423 | |
| 424 | /* printer busy */
|
| 425 | data |= centronics_busy_r(state->centronics) << 7;
|
| 426 | |
| 427 | return data;
|
| 428 | }
|
| 429 | |
| 430 | static WRITE8_DEVICE_HANDLER( pio_pa_w )
|
| 431 | {
|
| 432 | /*
|
| 433 | |
| 434 | bit signal description
|
| 435 | |
| 436 | 0 FDC INT request
|
| 437 | 1 2-sided diskette
|
| 438 | 2 disk change
|
| 439 | 3 prime
|
| 440 | 4 printer fault
|
| 441 | 5 printer select
|
| 442 | 6 paper empty
|
| 443 | 7 printer busy
|
| 444 | |
| 445 | */
|
| 446 | |
| 447 | trs80m2_state *state = (trs80m2_state *)device->machine->driver_data;
|
| 448 | |
| 449 | /* prime */
|
| 450 | centronics_prime_w(state->centronics, BIT(data, 3));
|
| 451 | }
|
| 452 | |
| 453 | static const z80pio_interface pio_intf =
|
| 454 | {
|
| 455 | DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt callback */
|
| 456 | DEVCB_HANDLER(pio_pa_r), /* port A read callback */
|
| 457 | DEVCB_NULL, /* port B read callback */
|
| 458 | DEVCB_HANDLER(pio_pa_w), /* port A write callback */
|
| 459 | DEVCB_DEVICE_HANDLER(CENTRONICS_TAG, centronics_data_w), /* port B write callback */
|
| 460 | DEVCB_NULL, /* port A ready callback */
|
| 461 | DEVCB_DEVICE_LINE(CENTRONICS_TAG, centronics_strobe_w) /* port B ready callback */
|
| 462 | };
|
| 463 | |
| 464 | /* Z80-SIO/0 Interface */
|
| 465 | |
| 466 | static void sio_interrupt(running_device *device, int state)
|
| 467 | {
|
| 468 | cputag_set_input_line(device->machine, Z80_TAG, INPUT_LINE_IRQ0, state);
|
| 469 | }
|
| 470 | |
| 471 | static const z80sio_interface sio_intf =
|
| 472 | {
|
| 473 | sio_interrupt, /* interrupt handler */
|
| 474 | NULL, /* DTR changed handler */
|
| 475 | NULL, /* RTS changed handler */
|
| 476 | NULL, /* BREAK changed handler */
|
| 477 | NULL, /* transmit handler */
|
| 478 | NULL /* receive handler */
|
| 479 | };
|
| 480 | |
| 481 | /* Z80-CTC Interface */
|
| 482 | |
| 483 | static WRITE_LINE_DEVICE_HANDLER( ctc_z0_w )
|
| 484 | {
|
| 485 | }
|
| 486 | |
| 487 | static WRITE_LINE_DEVICE_HANDLER( ctc_z1_w )
|
| 488 | {
|
| 489 | }
|
| 490 | |
| 491 | static WRITE_LINE_DEVICE_HANDLER( ctc_z2_w )
|
| 492 | {
|
| 493 | }
|
| 494 | |
| 495 | static Z80CTC_INTERFACE( ctc_intf )
|
| 496 | {
|
| 497 | 0, /* timer disables */
|
| 498 | DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
|
| 499 | DEVCB_LINE(ctc_z0_w), /* ZC/TO0 callback */
|
| 500 | DEVCB_LINE(ctc_z1_w), /* ZC/TO1 callback */
|
| 501 | DEVCB_LINE(ctc_z2_w) /* ZC/TO2 callback */
|
| 502 | };
|
| 503 | |
| 504 | /* FD1791 Interface */
|
| 505 | |
| 506 | static WRITE_LINE_DEVICE_HANDLER( fdc_intrq_w )
|
| 507 | {
|
| 508 | trs80m2_state *driver_state = (trs80m2_state *)device->machine->driver_data;
|
| 509 | |
| 510 | driver_state->fdc_intrq = state;
|
| 511 | }
|
| 512 | |
| 513 | static const wd17xx_interface fd1791_intf =
|
| 514 | {
|
| 515 | DEVCB_NULL,
|
| 516 | DEVCB_LINE(fdc_intrq_w),
|
| 517 | DEVCB_NULL,
|
| 518 | { FLOPPY_0, FLOPPY_1, NULL, NULL }
|
| 519 | };
|
| 520 | |
| 521 | /* Z80 Daisy Chain */
|
| 522 | |
| 523 | static const z80_daisy_chain trs80m2_daisy_chain[] =
|
| 524 | {
|
| 525 | { Z80CTC_TAG },
|
| 526 | { NULL }
|
| 527 | };
|
| 528 | |
| 529 | /* Machine Initialization */
|
| 530 | |
| 531 | static MACHINE_START( trs80m2 )
|
| 532 | {
|
| 533 | trs80m2_state *state = (trs80m2_state *)machine->driver_data;
|
| 534 | |
| 535 | /* find devices */
|
| 536 | state->mc6845 = devtag_get_device(machine, MC6845_TAG);
|
| 537 | state->centronics = devtag_get_device(machine, CENTRONICS_TAG);
|
| 538 | |
| 539 | /* setup memory banking */
|
| 540 | |
| 541 | /* register for state saving */
|
| 542 | state_save_register_global(machine, state->key_latch);
|
| 543 | state_save_register_global(machine, state->key_data);
|
| 544 | }
|
| 545 | |
| 546 | /* Machine Driver */
|
| 547 | |
| 548 | static MACHINE_DRIVER_START( trs80m2 )
|
| 549 | MDRV_DRIVER_DATA(trs80m2_state)
|
| 550 | |
| 551 | /* basic machine hardware */
|
| 552 | MDRV_CPU_ADD(Z80_TAG, Z80, XTAL_8MHz/2)
|
| 553 | MDRV_CPU_PROGRAM_MAP(trs80m2_mem)
|
| 554 | MDRV_CPU_IO_MAP(trs80m2_io)
|
| 555 | |
| 556 | MDRV_CPU_ADD(I8021_TAG, I8048, 100000) // Intel 8021 @ ?
|
| 557 | MDRV_CPU_IO_MAP(trs80m2_keyboard_io)
|
| 558 | |
| 559 | MDRV_MACHINE_START(trs80m2)
|
| 560 | |
| 561 | /* video hardware */
|
| 562 | MDRV_SCREEN_ADD(SCREEN_TAG, RASTER)
|
| 563 | MDRV_SCREEN_REFRESH_RATE(60)
|
| 564 | MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
| 565 | MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
|
| 566 | MDRV_SCREEN_SIZE(640, 480)
|
| 567 | MDRV_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
|
| 568 | |
| 569 | MDRV_PALETTE_LENGTH(2)
|
| 570 | MDRV_PALETTE_INIT(black_and_white)
|
| 571 | |
| 572 | MDRV_VIDEO_START(trs80m2)
|
| 573 | MDRV_VIDEO_UPDATE(trs80m2)
|
| 574 | |
| 575 | MDRV_MC6845_ADD(MC6845_TAG, MC6845, XTAL_12_48MHz/8, mc6845_intf)
|
| 576 | |
| 577 | /* sound hardware */
|
| 578 | |
| 579 | /* devices */
|
| 580 | MDRV_WD179X_ADD(FD1791_TAG, fd1791_intf)
|
| 581 | MDRV_Z80CTC_ADD(Z80CTC_TAG, XTAL_8MHz/2, ctc_intf)
|
| 582 | MDRV_Z80DMA_ADD(Z80DMA_TAG, XTAL_8MHz/2, dma_intf)
|
| 583 | MDRV_Z80PIO_ADD(Z80PIO_TAG, /* XTAL_8MHz/2, */ pio_intf)
|
| 584 | MDRV_Z80SIO_ADD(Z80SIO_TAG, XTAL_8MHz/2, sio_intf)
|
| 585 | MDRV_CENTRONICS_ADD(CENTRONICS_TAG, standard_centronics)
|
| 586 | |
| 587 | MDRV_RAM_ADD("messram")
|
| 588 | MDRV_RAM_DEFAULT_SIZE("32K")
|
| 589 | MDRV_RAM_EXTRA_OPTIONS("64K")
|
| 590 | MACHINE_DRIVER_END
|
| 591 | |
| 592 | /* ROMs */
|
| 593 | |
| 594 | ROM_START(trs80m2)
|
| 595 | ROM_REGION( 0x800, Z80_TAG, 0 )
|
| 596 | ROM_LOAD( "8043216.u11", 0x0000, 0x0800, CRC(7017a373) SHA1(1c7127fcc99fc351a40d3a3199ba478e783c452e) )
|
| 597 | |
| 598 | ROM_REGION( 0x800, MC6845_TAG, 0 )
|
| 599 | ROM_LOAD( "8043316.u9", 0x0000, 0x0800, CRC(04425b03) SHA1(32a29dc202b7fcf21838289cc3bffc51ef943dab) )
|
| 600 | |
| 601 | ROM_REGION( 0x400, I8021_TAG, 0 )
|
| 602 | ROM_LOAD( "65-1991.z4", 0x0000, 0x0400, NO_DUMP )
|
| 603 | ROM_END
|
| 604 | |
| 605 | /*
|
| 606 | |
| 607 | TRS-80 Model II/16 Z80 CPU Board ROM
|
| 608 | |
| 609 | It would seem that every processor board I find has a different ROM on it! It seems that the early ROMs |
| 610 | don't boot directly from a hard drive. But there seems to be many versions of ROMs. I've placed them in |
| 611 | order of serial number in the list below. There also appears to be at least two board revisions, "C" and "D".
|
| 612 | |
| 613 | cpu_c8ff.bin/hex:
|
| 614 | Mask Programmable PROM, Equivilant to Intel 2716 EPROM, with checksum C8FF came from a cpu board with |
| 615 | serial number 120353 out of a Model II with serial number 2002102 and catalog number 26-6002. The board |
| 616 | was labeled, "Revision C". This appears to be an early ROM and according to a very helpful fellow |
| 617 | collector, Aaron in Australia, doesn't allow boot directly from a hard disk.
|
| 618 | |
| 619 | cpu_9733.bin/hex:
|
| 620 | An actual SGS-Ates (Now STMicroelectronics) 2716 EPROM, with checksum 9733 came from a cpu board with |
| 621 | serial number 161993 out of a pile of random cards that I have. I don't know what machine it originated |
| 622 | from. The board was labeled, "Revision C". This appears to be a later ROM in that it is able to boot |
| 623 | directly from an 8MB hard disk. The EPROM had a windows sticker on it labeled, "U54".
|
| 624 | |
| 625 | cpu_2119.bin/hex:
|
| 626 | An actual Texas Instruments 2716 EPROM, with checksum 2119 came from a cpu board with serial number |
| 627 | 178892 out of a Model 16 with serial number 64014509 and catalog number 26-4002. The board was labeled,
|
| 628 | "Revision D". This appears to be a later ROM and does appear to allow boot directly from an 8MB hard disk.
|
| 629 | |
| 630 | cpu_2bff.bin/hex:
|
| 631 | Mask Programmable PROM, Equivilant to Intel 2716 EPROM, with checksum 2BFF came from a cpu board with |
| 632 | serial number 187173 our of a pile of random cards that I have. I don't know what machine it originated |
| 633 | from. The board was labeled, "Revision D". This appears to be a later ROM in that it is able to boot |
| 634 | directly from an 8MB hard disk.
|
| 635 | |
| 636 | */
|
| 637 | |
| 638 | ROM_START( trs80m16 )
|
| 639 | ROM_REGION( 0x800, Z80_TAG, 0 )
|
| 640 | ROM_SYSTEM_BIOS( 0, "c8ff", "S/N 120353" )
|
| 641 | ROMX_LOAD( "cpu_c8ff.u11", 0x0000, 0x0800, CRC(7017a373) SHA1(1c7127fcc99fc351a40d3a3199ba478e783c452e), ROM_BIOS(1) )
|
| 642 | ROM_SYSTEM_BIOS( 1, "9733", "S/N 161993" )
|
| 643 | ROMX_LOAD( "cpu_9733.u11", 0x0000, 0x0800, CRC(823924b1) SHA1(aee0625bcbd8620b28ab705e15ad9bea804c8476), ROM_BIOS(2) )
|
| 644 | ROM_SYSTEM_BIOS( 2, "2119", "S/N 64014509" )
|
| 645 | ROMX_LOAD( "cpu_2119.u11", 0x0000, 0x0800, CRC(7a663049) SHA1(f308439ce266df717bfe79adcdad6024b4faa141), ROM_BIOS(3) )
|
| 646 | ROM_SYSTEM_BIOS( 3, "2bff", "S/N 187173" )
|
| 647 | ROMX_LOAD( "cpu_2bff.u11", 0x0000, 0x0800, CRC(c6c71d8b) SHA1(7107e2cbbe769851a4460680c2deff8e76a101b5), ROM_BIOS(4) )
|
| 648 | |
| 649 | ROM_REGION( 0x800, MC6845_TAG, 0 )
|
| 650 | ROM_LOAD( "8043316.u9", 0x0000, 0x0800, CRC(04425b03) SHA1(32a29dc202b7fcf21838289cc3bffc51ef943dab) )
|
| 651 | |
| 652 | ROM_REGION( 0x400, I8021_TAG, 0 )
|
| 653 | ROM_LOAD( "65-1991.z4", 0x0000, 0x0400, NO_DUMP )
|
| 654 | ROM_END
|
| 655 | |
| 656 | /* System Drivers */
|
| 657 | |
| 658 | /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
|
| 659 | COMP( 1979, trs80m2, 0, 0, trs80m2, trs80m2, 0, "Tandy Radio Shack", "TRS-80 Model II", GAME_NO_SOUND_HW | GAME_NOT_WORKING )
|
| 660 | COMP( 1979, trs80m16, trs80m2, 0, trs80m2, trs80m2, 0, "Tandy Radio Shack", "TRS-80 Model 16", GAME_NO_SOUND_HW | GAME_NOT_WORKING )
|
| 661 | //COMP( 1984, trs80m16b,trs80m2, 0, trs80m2, trs80m2, 0, "Tandy Radio Shack", "TRS-80 Model 16B", GAME_NO_SOUND_HW | GAME_NOT_WORKING )
|
| 662 | //COMP( 1985, tandy6k, trs80m2, 0, trs80m2, trs80m2, 0, "Tandy Radio Shack", "Tandy 6000 HD", GAME_NO_SOUND_HW | GAME_NOT_WORKING )
|