MESS SVN History

15994 Revisions

r7306 Wednesday 10th February, 2010 at 12:46:31 UTC by Dirk Best
[WD17XX] Updated double density input interface. Driver authors: Please verify that your driver still works as before, there are probably new cleanup possibilities too.

[src/mame/machine]	archimds.c
[src/mess/devices]	coco_fdc.c thomflop.c
[src/mess/drivers]	a310.c apricot.c apricotf.c atarist.c bw2.c enterp.c fm7.c fmtowns.c ht68k.c nascom1.c orion.c pk8020.c samcoupe.c tiki100.c v1050.c vector06.c x1.c xerox820.c xor100.c
[src/mess/includes]	orion.h
[src/mess/machine]	99_dsk.c bbc.c beta.c c1571.c c1581.c concept.c conkort.c dgn_beta.c kaypro.c mbee.c msx.c nascom1.c oric.c orion.c osborne1.c partner.c pk8020.c rmnimbus.c special.c svi318.c trs80.c vector06.c wd17xx.c wd17xx.h z80ne.c

src/mame/machine/archimds.c
r7305	r7306
483	483	else if (offset == 0xd40010)
484	484	{
485	485	// latch B
486		wd17xx_~~set_~~den~~sity~~(fdc,(data ~~& 2~~) ~~? DEN_MFM_LO : DEN_MFM_HI~~);
	486	wd17xx_dden_w(fdc, BIT(data, 1));
487	487	}
488	488	#endif
489	489	else

src/mess/devices/coco_fdc.c
r7305	r7306
148	148
149	149	static const wd17xx_interface coco_wd17xx_interface =
150	150	{
	151	DEVCB_NULL,
151	152	DEVCB_LINE(fdc_intrq_w),
152	153	DEVCB_LINE(fdc_drq_w),
153	154	{FLOPPY_0,FLOPPY_1,FLOPPY_2,FLOPPY_3}
r7305	r7306
360	361
361	362	wd17xx_set_drive(fdc->wd17xx, drive);
362	363	wd17xx_set_side(fdc->wd17xx, head);
363		wd17xx_~~set_~~den~~sity~~(fdc->wd17xx, (fdc->dskreg ~~& 0x20~~) ~~? DEN_MFM_LO : DEN_FM_LO~~);
	364	wd17xx_dden_w(fdc->wd17xx, !BIT(fdc->dskreg, 5));
364	365	}
365	366
366	367
r7305	r7306
484	485	static MACHINE_DRIVER_START(coco_fdc)
485	486	MDRV_WD1773_ADD(WD_TAG, coco_wd17xx_interface)
486	487	MDRV_MSM6242_ADD(DISTO_TAG)
487		MDRV_DS1315_ADD(CLOUD9_TAG)
	488	MDRV_DS1315_ADD(CLOUD9_TAG)
488	489	MACHINE_DRIVER_END
489	490
490	491	static const fdc_hardware_type hwtype =
r7305	r7306
555	556	if (data & 0x04)
556	557	wd17xx_set_drive(fdc->wd17xx, data & 0x03);
557	558
558		wd17xx_~~set_~~den~~sity~~(fdc->wd17xx, (data ~~& 0x08~~) ~~? DEN_FM_LO: DEN_MFM_LO~~);
	559	wd17xx_dden_w(fdc->wd17xx, BIT(data, 3));
559	560	fdc->dskreg = data;
560	561	}
561	562

src/mess/devices/thomflop.c
r7305	r7306
295	295	{
296	296	/* drive select */
297	297	int drive = -1, side = 0;
298		DENSITY dens;
299	298
300	299	switch ( data & 7 )
301	300	{
r7305	r7306
308	307	logerror( "%f $%04x to7_5p14_w: invalid drive select pattern $%02X\n", attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(devtag_get_device(space->machine, "maincpu")), data );
309	308	}
310	309
311		dens = (data & 0x80) ? DEN_FM_LO : DEN_MFM_LO;
312		wd17xx_set_density( fdc, dens );
	310	wd17xx_dden_w(fdc, BIT(data, 7));
313	311
314	312	to7_5p14_select = data;
315	313
r7305	r7306
320	318	wd17xx_set_side( fdc, side );
321	319	LOG(( "%f $%04x to7_5p14_w: $%02X set drive=%i side=%i density=%s\n",
322	320	attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(devtag_get_device(space->machine, "maincpu")),
323		data, drive, side, (d~~ens~~ ~~== DEN_FM_LO~~) ? "FM" : "MFM" ));
	321	data, drive, side, (BIT(data, 7) ? "FM" : "MFM")));
324	322	}
325	323	}
326	324	else
r7305	r7306
1332	1330
1333	1331	case 0: /* CMD0 */
1334	1332	{
1335		DENSITY dens = (data & 0x20) ? DEN_FM_LO : DEN_MFM_LO;
1336	1333	int wsync = (data >> 4) & 1;
1337	1334	int qdd = thmfc_floppy_is_qdd(thmfc_floppy_image(space->machine));
1338	1335	chrn_id id;
1339	1336	thmfc1->formatting = (data >> 2) & 1;
1340	1337	LOG (( "%f $%04x thmfc_floppy_w: CMD0=$%02X dens=%s wsync=%i dsync=%i fmt=%i op=%i\n",
1341	1338	attotime_to_double(timer_get_time(space->machine)), cpu_get_previouspc(devtag_get_device(space->machine, "maincpu")), data,
1342		(d~~ens~~ ~~== DEN_FM_LO~~) ? "MF" : "MFM",
	1339	(BIT(data, 5) ? "FM" : "MFM"),
1343	1340	wsync, (data >> 3) & 1,
1344	1341	thmfc1->formatting, data & 3 ));
1345	1342

src/mess/includes/orion.h
r7305	r7306
44	44	extern WRITE8_HANDLER ( orionz80_io_w );
45	45
46	46	extern DRIVER_INIT( orionpro );
47		extern MACHINE_START( orionpro );
48	47	extern MACHINE_RESET( orionpro );
49	48	extern READ8_HANDLER ( orionpro_io_r );
50	49	extern WRITE8_HANDLER ( orionpro_io_w );

src/mess/machine/dgn_beta.c
r7305	r7306
263	263	static int EnableMapRegs; /* Should we use map registers, or just map normal */
264	264	static struct PageReg PageRegs[MaxTasks+1][MaxPage+1]; /* 16 sets of 16 page regs, allowing for 16 seperate contexts */
265	265	/* Task 17 is power on default, when banking not enabled */
266
	266
267	267	#define is_last_page(page) (((page==LastPage) \|\| (page==LastPage+1)) ? 1 : 0)
268	268
269	269	//
r7305	r7306
731	731	wd17xx_set_drive(fdc, ~data & DSMask);
732	732
733	733	/* Set density of WD2797 */
734		if (data & DDenCtrl)
735		{
736		wd17xx_set_density(fdc, DEN_FM_LO);
737		LOG_DISK(("Set density low %d\n", (data & DDenCtrl)));
738		}
739		else
740		{
741		wd17xx_set_density(fdc, DEN_MFM_LO);
742		LOG_DISK(("Set density high %d\n", (data & DDenCtrl)));
743		}
	734	wd17xx_dden_w(fdc, BIT(data, 6));
	735	LOG_DISK(("Set density %s\n", BIT(data, 6) ? "low" : "high"));
744	736	}
745	737
746	738	static READ8_DEVICE_HANDLER(d_pia1_pb_r)
r7305	r7306
1116	1108	DMA_NMI_LAST = 0x80; /* start with DMA NMI inactive, as pulled up */
1117	1109	// DMA_NMI = CLEAR_LINE; /* start with DMA NMI inactive */
1118	1110
1119		wd17xx_~~set_~~den~~sity~~(fdc, DEN_~~MFM_~~LO);
	1111	wd17xx_dden_w(fdc, CLEAR_LINE);
1120	1112	wd17xx_set_drive(fdc, 0);
1121	1113
1122	1114	machine->generic.videoram.u8 = messram_get_ptr(devtag_get_device(machine, "messram")); /* Point video ram at the start of physical ram */
1123
	1115
1124	1116	dgnbeta_video_reset(machine);
1125	1117	wd17xx_reset(fdc);
1126	1118	wd2797_written=0;
r7305	r7306
1129	1121	MACHINE_START( dgnbeta )
1130	1122	{
1131	1123	logerror("MACHINE_START( dgnbeta )\n");
1132
	1124
1133	1125	dgnbeta_init_video(machine);
1134	1126
1135	1127	debug_cpu_set_dasm_override(devtag_get_device(machine, MAINCPU_TAG), CPU_DISASSEMBLE_NAME(dgnbeta_dasm_override));

src/mess/machine/conkort.c
r7305	r7306
615	615	slow_t *conkort = get_safe_token_machine_slow(device->machine);
616	616
617	617	/* disk density */
618		wd17xx_set_density(conkort->wd1791, BIT(data, 3) ? DEN_FM_HI : DEN_FM_LO);
619	618	conkort->fdc_dden = BIT(data, 3);
	619	wd17xx_dden_w(conkort->wd1791, conkort->fdc_dden);
620	620	}
621	621
622	622	static WRITE_LINE_DEVICE_HANDLER( conkort_pio_ardy_w )
r7305	r7306
737	737
738	738	static const wd17xx_interface slow_wd17xx_interface =
739	739	{
	740	DEVCB_NULL,
740	741	DEVCB_LINE(slow_wd1791_intrq_w),
741	742	DEVCB_LINE(slow_wd1791_drq_w),
742	743	{ FLOPPY_0, FLOPPY_1, NULL, NULL }
r7305	r7306
747	748	static const wd17xx_interface fast_wd17xx_interface =
748	749	{
749	750	DEVCB_NULL,
	751	DEVCB_NULL,
750	752	DEVCB_DEVICE_LINE(Z80DMA_TAG, z80dma_rdy_w),
751	753	{ FLOPPY_0, FLOPPY_1, NULL, NULL }
752	754	};

src/mess/machine/c1581.c
r7305	r7306
85	85
86	86	int atn = cbm_iec_atn_r(c1581->serial_bus);
87	87	int data = !c1581->data_out & !(c1581->atn_ack & !atn);
88
	88
89	89	/* fast serial data */
90	90	if (c1581->ser_dir) data &= c1581->sp_out;
91
	91
92	92	cbm_iec_data_w(c1581->serial_bus, device, data);
93	93	}
94	94
r7305	r7306
97	97	c1581_t *c1581 = get_safe_token(device);
98	98
99	99	int srq = 1;
100
	100
101	101	/* fast serial clock */
102	102	if (c1581->ser_dir) srq &= c1581->cnt_out;
103	103
r7305	r7306
365	365
366	366	static const wd17xx_interface wd1770_intf =
367	367	{
	368	DEVCB_LINE_GND,
368	369	DEVCB_NULL,
369	370	DEVCB_NULL,
370	371	{ FLOPPY_0, NULL, NULL, NULL }
r7305	r7306
464	465	c1581->serial_bus = devtag_get_device(device->machine, config->serial_bus_tag);
465	466	c1581->image = device->subdevice(FLOPPY_0);
466	467
467		/* set floppy density */
468		wd17xx_set_density(c1581->wd1770, DEN_MFM_LO); // _DDEN = low
469
470	468	/* register for state saving */
471	469	state_save_register_device_item(device, 0, c1581->address);
472	470	state_save_register_device_item(device, 0, c1581->data_out);

src/mess/machine/mbee.c
r7305	r7306
165	165
166	166	wd17xx_set_drive(mbee_fdc, data & 3);
167	167	wd17xx_set_side(mbee_fdc, (data & 4) ? 1 : 0);
168		wd17xx_~~set_~~den~~sity~~(mbee_fdc, ~~(DENS~~ITY)((data ~~& 8) ? 1 : 0~~));
	168	wd17xx_dden_w(mbee_fdc, !BIT(data, 3));
169	169	}
170	170
171	171	/***********************************************************

src/mess/machine/99_dsk.c
r7305	r7306
393	393
394	394	const wd17xx_interface ti99_wd17xx_interface =
395	395	{
	396	DEVCB_NULL,
396	397	DEVCB_LINE(ti99_fdc_intrq_w),
397	398	DEVCB_LINE(ti99_fdc_drq_w),
398	399	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
r7305	r7306
456	457	ti99_peb_set_card_handlers(0x1100, & fdc_handlers);
457	458	if (fdc) {
458	459	wd17xx_reset(fdc); /* resets the fdc */
459		wd17xx_~~set_~~den~~sity~~(fdc,DEN_~~FM_~~LO);
	460	wd17xx_dden_w(fdc, ASSERT_LINE);
460	461	}
461	462	}
462	463
r7305	r7306
668	669	ti99_peb_set_card_handlers(0x1100, & ccfdc_handlers);
669	670
670	671	wd17xx_reset(fdc); /* initialize the floppy disk controller */
671		wd17xx_~~set_~~den~~sity~~(fdc,DEN_~~MFM_~~LO);
	672	wd17xx_dden(fdc, CLEAR_LINE);
672	673	}
673	674	#endif
674	675
r7305	r7306
778	779
779	780	case 10:
780	781	/* double density enable (active low) */
781		wd17xx_~~set_~~den~~sity~~(fdc,data ? DEN_~~FM_~~LO : DEN_~~MFM_~~LO);
	782	wd17xx_dden(fdc, data ? ASSERT_LINE : CLEAR_LINE);
782	783	break;
783	784
784	785	case 11:
r7305	r7306
888	889	ti99_peb_set_card_handlers(0x1100, & bwg_handlers);
889	890
890	891	wd17xx_reset(fdc); /* initialize the floppy disk controller */
891		wd17xx_~~set_~~den~~sity~~(fdc,DEN_~~MFM_~~LO);
	892	wd17xx_dden_w(fdc, CLEAR_LINE);
892	893	}
893	894
894	895	/*
r7305	r7306
996	997
997	998	case 10:
998	999	/* double density enable (active low) */
999		wd17xx_~~set_~~den~~sity~~(fdc,data ? DEN_~~FM_~~LO : DEN_~~MFM_~~LO);
	1000	wd17xx_dden_w(fdc, data ? ASSERT_LINE : CLEAR_LINE);
1000	1001	break;
1001	1002
1002	1003	case 11:

src/mess/machine/oric.c
r7305	r7306
994	994	/* bit 0: enable FDC IRQ to trigger IRQ on CPU */
995	995	wd17xx_set_drive(fdc,(data>>5) & 0x03);
996	996	wd17xx_set_side(fdc,(data>>4) & 0x01);
997		if (data & (1<<3))
998		{
999		density = DEN_MFM_LO;
1000		}
1001		else
1002		{
1003		density = DEN_FM_HI;
1004		}
	997	wd17xx_dden_w(fdc, !BIT(data, 3));
1005	998
1006		wd17xx_set_density(fdc,density);
1007
1008	999	oric_microdisc_set_mem_0x0c000(space->machine);
1009	1000	oric_microdisc_refresh_wd179x_ints(space->machine);
1010	1001	}

src/mess/machine/vector06.c
r7305	r7306
178	178
179	179	MACHINE_START( vector06 )
180	180	{
181		running_device *fdc = devtag_get_device(machine, "wd1793");
182		wd17xx_set_density (fdc, DEN_FM_HI);
183	181	timer_pulse(machine, ATTOTIME_IN_HZ(50), NULL, 0, reset_check_callback);
184	182	}
185	183

src/mess/machine/orion.c
r7305	r7306
70	70
71	71	MACHINE_START( orion128 )
72	72	{
73		running_device *fdc = devtag_get_device(machine, "wd1793");
74
75		wd17xx_set_density (fdc,DEN_FM_HI);
76	73	orion_video_mode_mask = 7;
77	74	}
78	75
r7305	r7306
263	260
264	261	MACHINE_START( orionz80 )
265	262	{
266		running_device *fdc = devtag_get_device(machine, "wd1793");
267
268		wd17xx_set_density (fdc,DEN_FM_HI);
269	263	mc146818_init(machine, MC146818_IGNORE_CENTURY);
270	264	orion_video_mode_mask = 7;
271	265	}
r7305	r7306
449	443	}
450	444
451	445
452		MACHINE_START( orionpro )
453		{
454		running_device *fdc = devtag_get_device(machine, "wd1793");
455		wd17xx_set_density (fdc,DEN_FM_HI);
456		}
457
458	446	static WRITE8_HANDLER ( orionpro_memory_page_w );
459	447
460	448	static void orionpro_bank_switch(running_machine *machine)

src/mess/machine/nascom1.c
r7305	r7306
68	68
69	69	const wd17xx_interface nascom2_wd17xx_interface =
70	70	{
	71	DEVCB_LINE_VCC,
71	72	DEVCB_LINE(nascom2_fdc_intrq_w),
72	73	DEVCB_LINE(nascom2_fdc_drq_w),
73	74	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
r7305	r7306
272	273	ay31015_set_input_pin( nascom1_hd6402, AY31015_CS, 1 );
273	274	}
274	275
275		MACHINE_RESET( nascom2 )
276		{
277		running_device *fdc = devtag_get_device(machine, "wd1793");
278
279		wd17xx_set_density(fdc,DEN_FM_HI);
280
281		MACHINE_RESET_CALL(nascom1);
282		}
283
284	276	DRIVER_INIT( nascom1 )
285	277	{
286	278	switch (messram_get_size(devtag_get_device(machine, "messram")))

src/mess/machine/osborne1.c
r7305	r7306
287	287	running_device *fdc = devtag_get_device(device->machine, "mb8877");
288	288
289	289	osborne1.new_start_x = data >> 1;
290		wd17xx_~~set_~~den~~sity~~(fdc, ( data & 0~~x01~~ ) ~~? DEN_FM_LO : DEN_FM_HI~~ );
	290	wd17xx_dden_w(fdc, BIT(data, 0));
291	291
292		//logerror("Video pia port a write: %02X, density set to %s\n", data, data & 1 ? "~~DEN_~~FM~~_LO~~" : "~~DEN_~~FM~~_HI~~" );
	292	//logerror("Video pia port a write: %02X, density set to %s\n", data, data & 1 ? "FM" : "MFM" );
293	293	}
294	294
295	295
r7305	r7306
432	432	switch( size )
433	433	{
434	434	case 40 * 10 * 256:
435		wd17xx_~~set_~~den~~sity~~( fdc, DEN_~~FM_~~LO );
	435	wd17xx_dden_w(fdc, ASSERT_LINE);
436	436	break;
437	437	case 40 * 5 * 1024:
438		wd17xx_~~set_~~den~~sity~~( fdc, DEN_~~FM_H~~I );
	438	wd17xx_dden_w(fdc, CLEAR_LINE);
439	439	break;
440	440	case 40 * 8 * 512:
441		wd17xx_~~set_~~den~~sity~~( fdc, DEN_~~FM_~~LO );
	441	wd17xx_dden_w(fdc, ASSERT_LINE);
442	442	break;
443	443	case 40 * 18 * 128:
444		wd17xx_~~set_~~den~~sity~~( fdc, DEN_~~FM_~~LO );
	444	wd17xx_dden_w(fdc, ASSERT_LINE);
445	445	break;
446	446	case 40 * 9 * 512:
447		wd17xx_~~set_~~den~~sity~~( fdc, DEN_~~FM_H~~I );
	447	wd17xx_dden_w(fdc, CLEAR_LINE);
448	448	break;
449	449	}
450	450	}

src/mess/machine/wd17xx.c
r7305	r7306
110	110
111	111	2010-Jan-31 Phill Harvey-Smith
112	112	- The above bugfixes for the Kaypro/Osborne1 have borked the booting on the Dragon
113		Alpha. The Alpha it seems needs a delay of ay least 17us or the NMI generated by
	113	Alpha. The Alpha it seems needs a delay of ay least 17us or the NMI generated by
114	114	INTRQ happens too early and doen't break out of the read/write bytes loops.
115
	115
116	116	I have made the delay settable by calling wd17xx_set_complete_command_delay, and
117	117	let it default to 12us, as required above, so that the Dragon Alpha works again.
118	118	This hopefully should not break the other machines.
119
	119
120	120	This should probably be considdered a minor hack but it does seem to work !
121	121
122	122	2009-02-04 Phill Harvey-Smith
r7305	r7306
270	270	struct _wd1770_state
271	271	{
272	272	/* callbacks */
	273	devcb_resolved_read_line in_dden_func;
273	274	devcb_resolved_write_line out_intrq_func;
274	275	devcb_resolved_write_line out_drq_func;
275	276
r7305	r7306
297	298
298	299	int stepping_rate[4]; /* track stepping rate in ms */
299	300
300
301		DENSITY density; /* FM/MFM, single / double density */
302
303	301	UINT8 track_reg; /* value of track register */
304	302	UINT8 command_type; /* last command type */
305	303	UINT8 head; /* current head # */
r7305	r7306
339	337
340	338	/* pause time when writing/reading sector */
341	339	int pause_time;
342
	340
343	341	/* complete command delay */
344	342	int complete_command_delay;
345	343
r7305	r7306
354	352
355	353	const wd17xx_interface default_wd17xx_interface =
356	354	{
357		DEVCB_NULL, DEVCB_NULL, { FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
	355	DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, { FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
358	356	};
359	357
360	358	const wd17xx_interface default_wd17xx_interface_2_drives =
361	359	{
362		DEVCB_NULL, DEVCB_NULL, { FLOPPY_0, FLOPPY_1, NULL, NULL}
	360	DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, { FLOPPY_0, FLOPPY_1, NULL, NULL}
363	361	};
364	362
365	363
r7305	r7306
388	386	/***************************************************************************
389	387	HELPER FUNCTIONS
390	388	***************************************************************************/
	389
391	390	static int wd17xx_has_side_select(running_device *device)
392	391	{
393	392	return (device->type == WD1773 \|\| device->type == WD1793 \|\| device->type == WD2793);
394	393	}
395	394
396		static int wd17xx_~~get_~~d~~atarat~~e_in_~~us(DENSITY~~ density)
	395	static int wd17xx_dden(running_device *device)
397	396	{
398		switch (density)
399		{
400		case DEN_FM_LO: return 128;
401		case DEN_FM_HI: return 64;
402		default:
403		case DEN_MFM_LO: return 32;
404		case DEN_MFM_HI: return 16;
405		}
406		return 32;
	397	wd1770_state *w = get_safe_token(device);
	398
	399	if (w->in_dden_func.read != NULL)
	400	return devcb_call_read_line(&w->in_dden_func);
	401	else
	402	return w->dden;
407	403	}
408	404
409	405
r7305	r7306
562	558	if (device->type == WD1771)
563	559	w->data_count = TRKSIZE_SD;
564	560	else
565		w->data_count = (w->density) ? TRKSIZE_DD : TRKSIZE_SD;
	561	w->data_count = wd17xx_dden(device) ? TRKSIZE_SD : TRKSIZE_DD;
566	562
567	563	floppy_drive_write_track_data_info_buffer( w->drive, w->hd, (char *)w->buffer, &(w->data_count) );
568	564
r7305	r7306
700	696	if (device->type == WD1771)
701	697	w->data_count = TRKSIZE_SD;
702	698	else
703		w->data_count = (w->density) ? TRKSIZE_DD : TRKSIZE_SD;
	699	w->data_count = wd17xx_dden(device) ? TRKSIZE_SD : TRKSIZE_SD;
704	700
705	701	floppy_drive_read_track_data_info_buffer( w->drive, w->hd, (char *)w->buffer, &(w->data_count) );
706	702
r7305	r7306
1056	1052	/* setup a timed data request - data request will be triggered in a few usecs time */
1057	1053	static void wd17xx_timed_data_request(running_device *device)
1058	1054	{
1059		int usecs;
1060	1055	wd1770_state *w = get_safe_token(device);
1061	1056
1062		usecs = wd17xx_get_datarate_in_us(w->density);
1063
1064	1057	/* set new timer */
1065		timer_adjust_oneshot(w->timer_data, ATTOTIME_IN_USEC(usecs), 0);
	1058	timer_adjust_oneshot(w->timer_data, ATTOTIME_IN_USEC(wd17xx_dden(device) ? 128 : 32), 0);
1066	1059	}
1067	1060
1068	1061
r7305	r7306
1070	1063	/* setup a timed read sector - read sector will be triggered in a few usecs time */
1071	1064	static void wd17xx_timed_read_sector_request(running_device *device)
1072	1065	{
1073		int usecs;
1074	1066	wd1770_state *w = get_safe_token(device);
1075	1067
1076		usecs = w->pause_time; /* How long should we wait? How about 40 micro seconds? */
1077
1078	1068	/* set new timer */
1079		timer_adjust_oneshot(w->timer_rs, ATTOTIME_IN_USEC(usecs), 0);
	1069	timer_adjust_oneshot(w->timer_rs, ATTOTIME_IN_USEC(w->pause_time), 0);
1080	1070	}
1081	1071
1082	1072
r7305	r7306
1084	1074	/* setup a timed write sector - write sector will be triggered in a few usecs time */
1085	1075	static void wd17xx_timed_write_sector_request(running_device *device)
1086	1076	{
1087		int usecs;
1088	1077	wd1770_state *w = get_safe_token(device);
1089	1078
1090		usecs = w->pause_time; /* How long should we wait? How about 40 micro seconds? */
1091
1092	1079	/* set new timer */
1093		timer_adjust_oneshot(w->timer_ws, ATTOTIME_IN_USEC(usecs), 0);
	1080	timer_adjust_oneshot(w->timer_ws, ATTOTIME_IN_USEC(w->pause_time), 0);
1094	1081	}
1095	1082
1096	1083
r7305	r7306
1132	1119	w->hd = head;
1133	1120	}
1134	1121
1135		void wd17xx_set_density(running_device *device, DENSITY density)
1136		{
1137		wd1770_state *w = get_safe_token(device);
1138
1139		if (VERBOSE)
1140		{
1141		if (w->density != density)
1142		logerror("wd17xx_set_density: $%02x\n", density);
1143		}
1144
1145		w->density = density;
1146		}
1147
1148	1122	void wd17xx_set_pause_time(running_device *device, int usec)
1149	1123	{
1150	1124	wd1770_state *w = get_safe_token(device);
r7305	r7306
1219	1193	w->wprt = state;
1220	1194	}
1221	1195
	1196	/* double density enable */
	1197	WRITE_LINE_DEVICE_HANDLER( wd17xx_dden_w )
	1198	{
	1199	wd1770_state *w = get_safe_token(device);
	1200
	1201	/* not supported on FD1771, FD1792, FD1794, FD1762 and FD1764 */
	1202	if (device->type == WD1771)
	1203	fatalerror("wd17xx_dden_w: double density input not supported on this model!\n");
	1204	else if (w->in_dden_func.read != NULL)
	1205	logerror("wd17xx_dden_w: write has no effect because a read handler is already defined!\n");
	1206	else
	1207	w->dden = state;
	1208	}
	1209
1222	1210	/* data request */
1223	1211	READ_LINE_DEVICE_HANDLER( wd17xx_drq_r )
1224	1212	{
r7305	r7306
1528	1516	if (device->type == WD1771)
1529	1517	w->data_count = TRKSIZE_SD;
1530	1518	else
1531		w->data_count = (w->density) ? TRKSIZE_DD : TRKSIZE_SD;
	1519	w->data_count = wd17xx_dden(device) ? TRKSIZE_SD : TRKSIZE_DD;
	1520
1532	1521	wd17xx_set_drq(device);
1533	1522	w->status \|= STA_2_BUSY;
1534	1523	w->busy_count = 0;
r7305	r7306
1756	1745
1757	1746	w->data_offset = 0;
1758	1747
1759
	1748
1760	1749	/* Check we should handle the next sector for a multi record write */
1761		if ( w->command_type == TYPE_II && w->command == FDC_WRITE_SEC && ( w->write_cmd & 0x10 ) )
	1750	if ( w->command_type == TYPE_II && w->command == FDC_WRITE_SEC && ( w->write_cmd & 0x10 ) )
1762	1751	{
1763	1752	w->sector++;
1764	1753	if (wd17xx_locate_sector(device))
r7305	r7306
1831	1820	w->intf = (const wd17xx_interface*)device->baseconfig().static_config;
1832	1821
1833	1822	w->status = STA_1_TRACK0;
1834		w->density = DEN_MFM_LO;
1835	1823	w->pause_time = 40;
1836	1824	w->complete_command_delay = 12;
1837	1825
r7305	r7306
1842	1830	w->timer_ws = timer_alloc(device->machine, wd17xx_write_sector_callback, (void *)device);
1843	1831
1844	1832	/* resolve callbacks */
	1833	devcb_resolve_read_line(&w->in_dden_func, &w->intf->in_dden_func, device);
1845	1834	devcb_resolve_write_line(&w->out_intrq_func, &w->intf->out_intrq_func, device);
1846	1835	devcb_resolve_write_line(&w->out_drq_func, &w->intf->out_drq_func, device);
1847	1836

src/mess/machine/wd17xx.h
r7305	r7306
32	32	TYPE DEFINITIONS
33	33	***************************************************************************/
34	34
35		typedef enum
36		{
37		DEN_FM_LO = 0,
38		DEN_FM_HI,
39		DEN_MFM_LO,
40		DEN_MFM_HI
41		} DENSITY;
42
43	35	/* Interface */
44	36	typedef struct _wd17xx_interface wd17xx_interface;
45	37	struct _wd17xx_interface
46	38	{
	39	devcb_read_line in_dden_func;
47	40	devcb_write_line out_intrq_func;
48	41	devcb_write_line out_drq_func;
49	42	const char *floppy_drive_tags[4];
r7305	r7306
71	64	but will be put here for now until the flopdrv code has been finalised more */
72	65	void wd17xx_set_drive(running_device device, UINT8); / set drive wd179x is accessing */
73	66	void wd17xx_set_side(running_device device, UINT8); / set side wd179x is accessing */
74		void wd17xx_set_density(running_device device, DENSITY); / set density */
75	67
76	68	void wd17xx_set_pause_time(running_device device, int usec); / default is 40 usec if not set */
77	69	void wd17xx_set_complete_command_delay(running_device device, int usec); / default is 12 usec if not set */
r7305	r7306
95	87	WRITE_LINE_DEVICE_HANDLER( wd17xx_tr00_w );
96	88	WRITE_LINE_DEVICE_HANDLER( wd17xx_idx_w );
97	89	WRITE_LINE_DEVICE_HANDLER( wd17xx_wprt_w );
	90	WRITE_LINE_DEVICE_HANDLER( wd17xx_dden_w );
98	91	READ_LINE_DEVICE_HANDLER( wd17xx_drq_r );
99	92	READ_LINE_DEVICE_HANDLER( wd17xx_intrq_r );
100	93

src/mess/machine/trs80.c
r7305	r7306
641	641	wd17xx_set_side(trs80_fdc,head);
642	642	}
643	643
644		wd17xx_~~set_~~den~~sity~~(trs80_fdc, ~~(DENS~~ITY)((data ~~& 0x80) ? 1 : 0~~));
	644	wd17xx_dden_w(trs80_fdc, !BIT(data, 7));
645	645	}
646	646
647	647	WRITE8_HANDLER( sys80_f8_w )

src/mess/machine/svi318.c
r7305	r7306
350	350
351	351	static WRITE8_HANDLER( svi318_fdc_density_side_w )
352	352	{
353		//running_device *image;
354	353	running_device *fdc = devtag_get_device(space->machine, "wd179x");
355	354
356		wd17xx_set_density(fdc, data & 0x01 ? DEN_FM_LO:DEN_MFM_LO);
357
358		wd17xx_set_side(fdc, data & 0x02 ? 1:0);
	355	wd17xx_dden_w(fdc, BIT(data, 0));
	356	wd17xx_set_side(fdc, BIT(data, 1));
359	357	}
360	358
361	359	static READ8_HANDLER( svi318_fdc_irqdrq_r )

src/mess/machine/z80ne.c
r7305	r7306
395	395
396	396	MACHINE_RESET(z80netf)
397	397	{
398		running_device *z80ne_fdc;
399
400	398	LOG(("In MACHINE_RESET z80netf\n"));
401	399	reset_lx390_banking(machine);
402	400	MACHINE_RESET_CALL( z80ne_base );
403	401	reset_lx388(machine);
404		z80ne_fdc = devtag_get_device(machine, "wd1771");
405		wd17xx_set_density (z80ne_fdc, DEN_FM_HI); /* Datarate 64 usec */
406	402	}
407	403
408	404	INPUT_CHANGED( z80ne_reset )
r7305	r7306
436	432	state_save_register_item_array( machine, "z80ne", NULL, 0, lx383_key );
437	433	state_save_register_item( machine, "z80ne", NULL, 0, nmi_delay_counter );
438	434	cassette_timer = timer_alloc(machine, z80ne_cassette_tc, NULL);
439		timer_pulse(machine, ATTOTIME_IN_HZ(1000), NULL, 0, z80ne_kbd_scan );
	435	timer_pulse(machine, ATTOTIME_IN_HZ(1000), NULL, 0, z80ne_kbd_scan );
440	436	}
441	437
442	438	MACHINE_START( z80net )

src/mess/machine/concept.c
r7305	r7306
648	648	/motor_on = (data & LC_MOTOROF_mask) == 0;/
649	649	// floppy_drive_set_motor_state(floppy_get_device(machine, current_drive), (data & LC_MOTOROF_mask) == 0 ? 1 : 0);
650	650	/flp_8in = (data & LC_FLP8IN_mask) != 0;/
651		wd17xx_~~set_~~den~~sity~~(fdc, (data ~~& LC_FMMFM_mask~~) ~~? DEN_FM_LO : DEN_MFM_LO~~);
	651	wd17xx_dden_w(fdc, BIT(data, 7));
652	652	floppy_drive_set_ready_state(floppy_get_device(space->machine, current_drive), 1, 0);
653	653	break;
654	654

src/mess/machine/msx.c
r7305	r7306
326	326
327	327	MACHINE_START( msx2 )
328	328	{
329		running_device *fdc = devtag_get_device(machine, "wd179x");
330		wd17xx_set_density (fdc,DEN_FM_HI);
331	329	msx1.dsk_stat = 0x7f;
332	330	}
333	331
r7305	r7306
734	732
735	733	const wd17xx_interface msx_wd17xx_interface =
736	734	{
	735	DEVCB_LINE_VCC,
737	736	DEVCB_LINE(msx_wd179x_intrq_w),
738	737	DEVCB_LINE(msx_wd179x_drq_w),
739	738	{FLOPPY_0, FLOPPY_1, NULL, NULL}

src/mess/machine/kaypro.c
r7305	r7306
68	68	memory_set_bankptr(mem->machine, "bank3", memory_region(mem->machine, "rambank"));
69	69	}
70	70
71		wd17xx_~~set_~~den~~sity~~(kaypro_fdc, ~~(DENS~~ITY)((data ~~& 0x20) ? 0 : 1~~));
	71	wd17xx_dden_w(kaypro_fdc, BIT(data, 5));
72	72
73	73	centronics_strobe_w(kaypro_printer, BIT(data, 4));
74	74
r7305	r7306
179	179	memory_set_bankptr(mem->machine, "bank3", memory_region(mem->machine, "rambank"));
180	180	}
181	181
182		wd17xx_~~set_~~den~~sity~~(kaypro_fdc, ~~(DENS~~ITY)((data ~~& 0x20) ? 0 : 1~~));
	182	wd17xx_dden_w(kaypro_fdc, BIT(data, 5));
183	183
184	184	centronics_strobe_w(kaypro_printer, BIT(data, 3));
185	185

src/mess/machine/beta.c
r7305	r7306
89	89
90	90	static const wd17xx_interface beta_wd17xx_interface =
91	91	{
	92	DEVCB_NULL,
92	93	DEVCB_LINE(betadisk_wd179x_intrq_w),
93	94	DEVCB_LINE(betadisk_wd179x_drq_w),
94	95	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
r7305	r7306
157	158	if (beta->betadisk_active==1) {
158	159	wd17xx_set_drive(beta->wd179x, data & 3);
159	160	wd17xx_set_side (beta->wd179x,(data & 0x10) ? 0 : 1 );
160		wd17xx_~~set_~~den~~sity~~(beta->wd179x, data ~~& 0x20 ? DEN_MFM_HI : DEN_FM_LO~~ );
	161	wd17xx_dden_w(beta->wd179x, !BIT(data, 5));
161	162	if ((data & 0x04) == 0) // reset
162	163	{
163	164	wd17xx_reset(beta->wd179x);

src/mess/machine/partner.c
r7305	r7306
37	37
38	38	const wd17xx_interface partner_wd17xx_interface =
39	39	{
	40	DEVCB_LINE_GND,
40	41	DEVCB_NULL,
41	42	DEVCB_DEVICE_LINE("dma8257", partner_wd17xx_drq_w),
42	43	{FLOPPY_0, FLOPPY_1, NULL, NULL}
43	44	};
44	45
45		MACHINE_START(partner)
	46	MACHINE_START( partner )
46	47	{
47	48	running_device *fdc = devtag_get_device(machine, "wd1793");
48		wd17xx_set_density (fdc,DEN_MFM_HI);
49		wd17xx_set_pause_time(fdc,10);
	49	wd17xx_set_pause_time(fdc, 10);
50	50	}
51	51
52	52	static void partner_window_1(running_machine machine, UINT8 bank_num, UINT16 offset,UINT8 rom)

src/mess/machine/special.c
r7305	r7306
254	254	MACHINE_START( specimx )
255	255	{
256	256	running_device *fdc = devtag_get_device(machine, "wd1793");
257		wd17xx_~~set_~~den~~sity~~ (fdc,DEN_~~FM_H~~I);
	257	wd17xx_dden_w(fdc, ASSERT_LINE);
258	258	}
259	259
260	260	static TIMER_CALLBACK( setup_pit8253_gates )
r7305	r7306
423	423
424	424	wd17xx_set_side (fdc,data & 1);
425	425	wd17xx_set_drive(fdc,(data >> 1) & 1);
426		if((data >>2) & 1)
427		{
428		wd17xx_set_density (fdc,DEN_FM_LO);
429		}
430		else
431		{
432		wd17xx_set_density (fdc,DEN_FM_HI);
433		}
	426	wd17xx_dden_w(fdc, BIT(data, 2));
434	427	}

src/mess/machine/rmnimbus.c
r7305	r7306
1		/*
	1	/*
2	2	machine/rmnimbus.c
3
	3
4	4	Machine driver for the Research Machines Nimbus.
5
	5
6	6	Phill Harvey-Smith
7	7	2009-11-29.
8
	8
9	9	80186 internal DMA/Timer/PIC code borrowed from Compis driver.
10	10	Perhaps this needs merging into the 80186 core.....
11	11	*/
r7305	r7306
146	146
147	147	const wd17xx_interface nimbus_wd17xx_interface =
148	148	{
	149	DEVCB_LINE_GND,
149	150	DEVCB_LINE(nimbus_fdc_intrq_w),
150	151	DEVCB_LINE(nimbus_fdc_drq_w),
151	152	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
r7305	r7306
189	190	0x0280, 0x017F, 0xE822, 0x8129,
190	191	0x0329, 0x0000, 0x0000, 0x0000,
191	192	0x0000, 0x0000, 0x0000, 0x0000,
192		0x0000, 0x8796, 0x2025, 0xB9E6
	193	0x0000, 0x8796, 0x2025, 0xB9E6
193	194	};
194	195
195	196	/* IO Unit */
r7305	r7306
265	266	old=i186.intr.in_service;
266	267
267	268	i186.intr.in_service \|= i186.intr.ack_mask;
268
	269
269	270	if((LOG_INTERRUPTS) && (i186.intr.in_service!=old))
270	271	logerror("i186.intr.in_service changed from %02X to %02X\n",old,i186.intr.in_service);
271
	272
272	273	if (i186.intr.ack_mask == 0x0001)
273	274	{
274	275	switch (i186.intr.poll_status & 0x1f)
r7305	r7306
298	299	logerror("Ext vectors : %02X %02X\n",i186.intr.ext_vector[0],i186.intr.ext_vector[1]);
299	300	logerror("Int %02X Calling vector %02X\n",i186.intr.poll_status,vector);
300	301	}
301
	302
302	303	return vector;
303	304	}
304	305
305	306
306	307	static void update_interrupt_state(running_machine *machine)
307		{
	308	{
308	309	int new_vector = 0;
309	310	int Priority;
310	311	int IntNo;
311	312
312		if (LOG_INTERRUPTS)
	313	if (LOG_INTERRUPTS)
313	314	logerror("update_interrupt_status: req=%04X stat=%04X serv=%04X priority_mask=%4X\n", i186.intr.request, i186.intr.status, i186.intr.in_service, i186.intr.priority_mask);
314	315
315	316	/* loop over priorities */
r7305	r7306
365	366	{
366	367	if (LOG_INTERRUPTS)
367	368	logerror("Int%d priority=%d\n",IntNo,Priority);
368
	369
369	370	/* if we're already servicing something at this level, don't generate anything new */
370	371	if (i186.intr.in_service & (0x10 << IntNo))
371	372	return;
r7305	r7306
460	461	static void external_int(running_machine *machine, UINT16 intno, UINT8 vector)
461	462	{
462	463	if (LOG_INTERRUPTS_EXT) logerror("generating external int %02X, vector %02X\n",intno,vector);
463
	464
464	465	// Only 4 external ints
465	466	if(intno>3)
466	467	{
467	468	logerror("external_int() invalid external interupt no : 0x%02X (can only be 0..3)\n",intno);
468	469	return;
469	470	}
470
	471
471	472	// Only set external vector if cascade mode enabled, only valid for
472	473	// int 0 & int 1
473	474	if (intno<2)
r7305	r7306
475	476	if(i186.intr.ext[intno] & EXTINT_CTRL_CASCADE)
476	477	i186.intr.ext_vector[intno]=vector;
477	478	}
478
	479
479	480	// Turn on the requested request bit and handle interrupt
480	481	i186.intr.request \|= (0x010 << intno);
481	482	update_interrupt_state(machine);
r7305	r7306
552	553	struct timer_state *t = &i186.timer[which];
553	554	int update_int_timer = 0;
554	555
555		if (LOG_TIMER)
	556	if (LOG_TIMER)
556	557	logerror("internal_timer_update: %d, new_count=%d, new_maxA=%d, new_maxB=%d,new_control=%d\n",which,new_count,new_maxA,new_maxB,new_control);
557	558
558	559	/* if we have a new count and we're on, update things */
r7305	r7306
597	598	new_maxB = 0x10000;
598	599	}
599	600	}
600
601	601
	602
602	603	/* handle control changes */
603	604	if (new_control != -1)
604	605	{
r7305	r7306
754	755	struct dma_state *dma = &i186.dma[which];
755	756	const address_space *memory_space = cpu_get_address_space(devtag_get_device(machine, MAINCPU_TAG), ADDRESS_SPACE_PROGRAM);
756	757	const address_space *io_space = cpu_get_address_space(devtag_get_device(machine, MAINCPU_TAG), ADDRESS_SPACE_IO);
757
	758
758	759	const address_space *src_space;
759	760	const address_space *dest_space;
760
	761
761	762	UINT16 dma_word;
762	763	UINT8 dma_byte;
763	764	UINT8 incdec_size;
r7305	r7306
769	770	{
770	771	logerror("%05X:ERROR! - drq%d with dma channel stopped\n",
771	772	cpu_get_pc(devtag_get_device(machine, MAINCPU_TAG)), which);
772
	773
773	774	return;
774	775	}
775
	776
776	777	if(dma->control & DEST_MIO)
777	778	dest_space=memory_space;
778	779	else
779	780	dest_space=io_space;
780
	781
781	782	if(dma->control & SRC_MIO)
782	783	src_space=memory_space;
783	784	else
784	785	src_space=io_space;
785
	786
786	787	// Do the transfer
787	788	if(dma->control & BYTE_WORD)
788	789	{
r7305	r7306
796	797	memory_write_byte(dest_space,dma->dest,dma_byte);
797	798	incdec_size=1;
798	799	}
799
	800
800	801	// Increment or Decrement destination ans source pointers as needed
801	802	switch (dma->control & DEST_INCDEC_MASK)
802	803	{
803	804	case DEST_DECREMENT : dma->dest -= incdec_size;
804	805	case DEST_INCREMENT : dma->dest += incdec_size;
805	806	}
806
	807
807	808	switch (dma->control & SRC_INCDEC_MASK)
808	809	{
809	810	case SRC_DECREMENT : dma->source -= incdec_size;
810	811	case SRC_INCREMENT : dma->source += incdec_size;
811	812	}
812
	813
813	814	// decrement count
814	815	dma->count -= 1;
815
	816
816	817	// Terminate if count is zero, and terminate flag set
817	818	if((dma->control & TERMINATE_ON_ZERO) && (dma->count==0))
818	819	{
819	820	dma->control &= ~ST_STOP;
820	821	if (LOG_DMA) logerror("DMA terminated\n");
821	822	}
822
	823
823	824	// Interrupt if count is zero, and interrupt flag set
824	825	if((dma->control & INTERRUPT_ON_ZERO) && (dma->count==0))
825	826	{
826	827	if (LOG_DMA>1) logerror("DMA%d - requesting interrupt: count = %04X, source = %04X\n", which, dma->count, dma->source);
827	828	i186.intr.request \|= 0x04 << which;
828		update_interrupt_state(machine);
	829	update_interrupt_state(machine);
829	830	}
830	831	}
831	832
r7305	r7306
837	838	{
838	839
839	840	logerror("Machine reset\n");
840
	841
841	842	/* create timers here so they stick around */
842	843	i186.timer[0].int_timer = timer_alloc(machine, internal_timer_int, NULL);
843	844	i186.timer[1].int_timer = timer_alloc(machine, internal_timer_int, NULL);
r7305	r7306
861	862	i186.intr.ext[2] = 0x000f;
862	863	i186.intr.ext[3] = 0x000f;
863	864	i186.intr.in_service = 0x0000;
864
	865
865	866	/* External vectors by default to internal int 0/1 vectors */
866	867	i186.intr.ext_vector[0] = 0x000C;
867	868	i186.intr.ext_vector[1] = 0x000D;
868
	869
869	870	i186.intr.pending = 0x0000;
870	871	i186.intr.ack_mask = 0x0000;
871	872	i186.intr.request = 0x0000;
872	873	i186.intr.status = 0x0000;
873	874	i186.intr.poll_status = 0x0000;
874
	875
875	876	logerror("CPU reset done\n");
876	877	}
877	878
r7305	r7306
1274	1275	MACHINE_RESET(nimbus)
1275	1276	{
1276	1277	/* CPU */
1277		nimbus_cpu_reset(machine);
	1278	nimbus_cpu_reset(machine);
1278	1279	iou_reset();
1279	1280	fdc_reset();
1280	1281	hdc_reset(machine);
r7305	r7306
1293	1294	nimbus_cpu_init(machine);
1294	1295
1295	1296	keyboard.keyscan_timer=timer_alloc(machine, keyscan_callback, NULL);
1296
	1297
1297	1298	/* setup debug commands */
1298	1299	if (machine->debug_flags & DEBUG_FLAG_ENABLED)
1299	1300	{
r7305	r7306
1303	1304
1304	1305	/* set up the instruction hook */
1305	1306	debug_cpu_set_instruction_hook(devtag_get_device(machine, MAINCPU_TAG), instruction_hook);
1306
	1307
1307	1308	}
1308
	1309
1309	1310	debug_flags=0;
1310	1311	}
1311	1312
r7305	r7306
1313	1314	{
1314	1315	int IntNo;
1315	1316	int Vector;
1316
	1317
1317	1318	if(params>1)
1318		{
	1319	{
1319	1320	sscanf(param[0],"%X",&IntNo);
1320	1321	sscanf(param[1],"%X",&Vector);
1321	1322
1322	1323	debug_console_printf(machine,"triggering IRQ%d, Vector=%02X\n",IntNo,Vector);
1323		external_int(machine,IntNo,Vector);
	1324	external_int(machine,IntNo,Vector);
1324	1325	}
1325	1326	else
1326	1327	{
1327	1328	debug_console_printf(machine,"Error, you must supply an intno and vector to trigger\n");
1328	1329	}
1329
1330
	1330
	1331
1331	1332	}
1332	1333
1333	1334
1334	1335	static void execute_debug_intmasks(running_machine machine, int ref, int params, const char param[])
1335	1336	{
1336	1337	int IntNo;
1337
1338
	1338
	1339
1339	1340	debug_console_printf(machine,"i186.intr.priority_mask=%4X\n",i186.intr.priority_mask);
1340	1341	for(IntNo=0; IntNo<4; IntNo++)
1341	1342	{
1342	1343	debug_console_printf(machine,"extInt%d mask=%4X\n",IntNo,i186.intr.ext[IntNo]);
1343	1344	}
1344
	1345
1345	1346	debug_console_printf(machine,"i186.intr.request = %04X\n",i186.intr.request);
1346	1347	debug_console_printf(machine,"i186.intr.ack_mask = %04X\n",i186.intr.ack_mask);
1347	1348	debug_console_printf(machine,"i186.intr.in_service= %04X\n",i186.intr.in_service);
r7305	r7306
1350	1351	static void nimbus_debug(running_machine machine, int ref, int params, const char param[])
1351	1352	{
1352	1353	if(params>0)
1353		{
1354		sscanf(param[0],"%d",&debug_flags);
	1354	{
	1355	sscanf(param[0],"%d",&debug_flags);
1355	1356	}
1356	1357	else
1357	1358	{
r7305	r7306
1368	1369	{
1369	1370	const address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
1370	1371	UINT8 *addr_ptr;
1371
	1372
1372	1373	addr_ptr = (UINT8*)memory_get_read_ptr(space,curpc);
1373
	1374
1374	1375	if ((addr_ptr !=NULL) && (addr_ptr[0]==0xCD) && (addr_ptr[1]==0xF0))
1375	1376	decode_subbios(device,curpc);
1376
	1377
1377	1378	return 0;
1378	1379	}
1379	1380
r7305	r7306
1386	1387	char type_str[80];
1387	1388	char drv_str[80];
1388	1389	char func_str[80];
1389
	1390
1390	1391	void (dump_dssi)(running_device ,UINT16, UINT16) = NULL;
1391	1392
1392	1393	running_device *cpu = devtag_get_device(device->machine,MAINCPU_TAG);
1393
	1394
1394	1395	UINT16 ax = cpu_get_reg(cpu,I8086_AX);
1395	1396	UINT16 bx = cpu_get_reg(cpu,I8086_BX);
1396	1397	UINT16 cx = cpu_get_reg(cpu,I8086_CX);
1397	1398	UINT16 ds = cpu_get_reg(cpu,I8086_DS);
1398	1399	UINT16 si = cpu_get_reg(cpu,I8086_SI);
1399
	1400
1400	1401	logerror("=======================================================================\n");
1401	1402	logerror("Sub-bios call at %08X, AX=%04X, BX=%04X, CX=%04X, DS:SI=%04X:%04X\n",pc,ax,bx,cx,ds,si);
1402	1403
1403	1404	set_type("invalid");
1404	1405	set_drv("invalid");
1405	1406	set_func("invalid");
1406
1407	1407
	1408
1408	1409	switch (cx)
1409	1410	{
1410		case 0 :
	1411	case 0 :
1411	1412	{
1412	1413	set_type("t_mummu");
1413	1414	set_drv("d_mummu");
1414
	1415
1415	1416	switch (ax)
1416	1417	{
1417	1418	case 0 : set_func("f_get_version_number"); break;
r7305	r7306
1424	1425	case 7 : set_func("f_get_copyright"); break;
1425	1426	}
1426	1427	}; break;
1427
1428		case 1 :
	1428
	1429	case 1 :
1429	1430	{
1430	1431	set_type("t_character");
1431	1432	set_drv("d_printer");
1432
	1433
1433	1434	switch(ax)
1434	1435	{
1435	1436	case 0 : set_func("f_get_version_number"); break;
r7305	r7306
1443	1444	case 8 : set_func("f_set_IO_parameters"); break;
1444	1445	}
1445	1446	}; break;
1446
1447		case 2 :
	1447
	1448	case 2 :
1448	1449	{
1449	1450	set_type("t_disk");
1450
	1451
1451	1452	switch(bx)
1452	1453	{
1453	1454	case 0 : set_drv("d_floppy"); break;
r7305	r7306
1456	1457	case 3 : set_drv("d_rompack"); break;
1457	1458	case 4 : set_drv("d_eeprom"); break;
1458	1459	}
1459
	1460
1460	1461	switch(ax)
1461	1462	{
1462		case 0 : set_func("f_get_version_number"); break;
	1463	case 0 : set_func("f_get_version_number"); break;
1463	1464	case 1 : set_func("f_initialise_unit"); break;
1464	1465	case 2 : set_func("f_pseudo_init_unit"); break;
1465	1466	case 3 : set_func("f_get_device_status"); break;
r7305	r7306
1470	1471	case 8 : set_func("f_recalibrate"); break;
1471	1472	case 9 : set_func("f_motors_off"); break;
1472	1473	}
1473
	1474
1474	1475	}; break;
1475
1476		case 3 :
	1476
	1477	case 3 :
1477	1478	{
1478	1479	set_type("t_piconet");
1479	1480	set_drv("d_piconet");
1480
	1481
1481	1482	switch(ax)
1482	1483	{
1483		case 0 : set_func("f_get_version_number"); break;
	1484	case 0 : set_func("f_get_version_number"); break;
1484	1485	case 1 : set_func("f_get_slave_status"); break;
1485	1486	case 2 : set_func("f_get_slave_map"); break;
1486	1487	case 3 : set_func("f_change_slave_addr"); break;
r7305	r7306
1491	1492	case 8 : set_func("f_send_data_block"); break;
1492	1493	case 9 : set_func("f_request_data_block"); break;
1493	1494	case 10 : set_func("f_reset_slave"); break;
1494
	1495
1495	1496	}
1496	1497	}; break;
1497
1498		case 4 :
	1498
	1499	case 4 :
1499	1500	{
1500	1501	set_type("t_tick");
1501	1502	set_drv("d_tick");
1502
	1503
1503	1504	switch(ax)
1504	1505	{
1505		case 0 : set_func("f_get_version_number"); break;
1506		case 1 : set_func("f_ticks_per_second"); break;
1507		case 2 : set_func("f_link_tick_routine"); break;
1508		case 3 : set_func("f_unlink_tick_routine"); break;
	1506	case 0 : set_func("f_get_version_number"); break;
	1507	case 1 : set_func("f_ticks_per_second"); break;
	1508	case 2 : set_func("f_link_tick_routine"); break;
	1509	case 3 : set_func("f_unlink_tick_routine"); break;
1509	1510	}
1510	1511	}; break;
1511
1512		case 5 :
	1512
	1513	case 5 :
1513	1514	{
1514	1515	set_type("t_graphics_input");
1515	1516
1516	1517	switch(bx)
1517	1518	{
1518		case 0 : set_drv("d_mouse"); break;
1519		case 1 : set_drv("d_joystick_1"); break;
1520		case 2 : set_drv("d_joystick_2"); break;
	1519	case 0 : set_drv("d_mouse"); break;
	1520	case 1 : set_drv("d_joystick_1"); break;
	1521	case 2 : set_drv("d_joystick_2"); break;
1521	1522	}
1522
1523
	1523
	1524
1524	1525	switch(ax)
1525	1526	{
1526		case 0 : set_func("f_get_version_number"); break;
1527		case 1 : set_func("f_graphics_input_cold_start"); break;
1528		case 2 : set_func("f_graphics_input_device_off"); break;
1529		case 3 : set_func("f_return_button_status"); break;
1530		case 4 : set_func("f_return_switch_and_button_stat"); break;
	1527	case 0 : set_func("f_get_version_number"); break;
	1528	case 1 : set_func("f_graphics_input_cold_start"); break;
	1529	case 2 : set_func("f_graphics_input_device_off"); break;
	1530	case 3 : set_func("f_return_button_status"); break;
	1531	case 4 : set_func("f_return_switch_and_button_stat"); break;
1531	1532	case 5 : set_func("f_start_tracking"); break;
1532	1533	case 6 : set_func("f_stop_tracking"); break;
1533	1534	case 7 : set_func("f_enquire_position"); break;
r7305	r7306
1539	1540	case 13 : set_func("f_enquire_graphics_in_misc_data"); break;
1540	1541	}
1541	1542	}; break;
1542
1543		case 6 :
	1543
	1544	case 6 :
1544	1545	{
1545	1546	set_type("t_graphics_output");
1546	1547	set_drv("d_ngc_screen");
1547	1548
1548	1549	switch(ax)
1549	1550	{
1550		case 0 : set_func("f_get_version_number"); break;
1551		case 1 : set_func("f_graphics_output_cold_start"); break;
1552		case 2 : set_func("f_graphics_output_warm_start"); break;
1553		case 3 : set_func("f_graphics_output_off"); break;
1554		case 4 : set_func("f_reinit_graphics_output"); break;
1555		case 5 : set_func("f_polymarker"); break;
1556		case 6 : set_func("f_polyline"); dump_dssi=&decode_dssi_f_fill_area; break;
1557		case 7 : set_func("f_fill_area"); dump_dssi=&decode_dssi_f_fill_area; break;
1558		case 8 : set_func("f_flood_fill_area"); break;
1559		case 9 : set_func("f_plot_character_string"); dump_dssi=&decode_dssi_f_plot_character_string; break;
1560		case 10 : set_func("f_define_graphics_clipping_area"); break;
1561		case 11 : set_func("f_enquire_clipping_area_limits"); break;
1562		case 12 : set_func("f_select_graphics_clipping_area"); break;
1563		case 13 : set_func("f_enq_selctd_graphics_clip_area"); break;
1564		case 14 : set_func("f_set_clt_element"); break;
1565		case 15 : set_func("f_enquire_clt_element"); break;
1566		case 16 : set_func("f_set_new_clt"); dump_dssi=&decode_dssi_f_set_new_clt; break;
1567		case 17 : set_func("f_enquire_clt_contents"); break;
1568		case 18 : set_func("f_define_dithering_pattern"); break;
1569		case 19 : set_func("f_enquire_dithering_pattern"); break;
1570		case 20 : set_func("f_draw_sprite"); break;
1571		case 21 : set_func("f_move_sprite"); break;
1572		case 22 : set_func("f_erase_sprite"); break;
1573		case 23 : set_func("f_read_pixel"); break;
1574		case 24 : set_func("f_read_to_limit"); break;
1575		case 25 : set_func("f_read_area_pixel"); break;
1576		case 26 : set_func("f_write_area_pixel"); break;
1577		case 27 : set_func("f_copy_area_pixel"); break;
	1551	case 0 : set_func("f_get_version_number"); break;
	1552	case 1 : set_func("f_graphics_output_cold_start"); break;
	1553	case 2 : set_func("f_graphics_output_warm_start"); break;
	1554	case 3 : set_func("f_graphics_output_off"); break;
	1555	case 4 : set_func("f_reinit_graphics_output"); break;
	1556	case 5 : set_func("f_polymarker"); break;
	1557	case 6 : set_func("f_polyline"); dump_dssi=&decode_dssi_f_fill_area; break;
	1558	case 7 : set_func("f_fill_area"); dump_dssi=&decode_dssi_f_fill_area; break;
	1559	case 8 : set_func("f_flood_fill_area"); break;
	1560	case 9 : set_func("f_plot_character_string"); dump_dssi=&decode_dssi_f_plot_character_string; break;
	1561	case 10 : set_func("f_define_graphics_clipping_area"); break;
	1562	case 11 : set_func("f_enquire_clipping_area_limits"); break;
	1563	case 12 : set_func("f_select_graphics_clipping_area"); break;
	1564	case 13 : set_func("f_enq_selctd_graphics_clip_area"); break;
	1565	case 14 : set_func("f_set_clt_element"); break;
	1566	case 15 : set_func("f_enquire_clt_element"); break;
	1567	case 16 : set_func("f_set_new_clt"); dump_dssi=&decode_dssi_f_set_new_clt; break;
	1568	case 17 : set_func("f_enquire_clt_contents"); break;
	1569	case 18 : set_func("f_define_dithering_pattern"); break;
	1570	case 19 : set_func("f_enquire_dithering_pattern"); break;
	1571	case 20 : set_func("f_draw_sprite"); break;
	1572	case 21 : set_func("f_move_sprite"); break;
	1573	case 22 : set_func("f_erase_sprite"); break;
	1574	case 23 : set_func("f_read_pixel"); break;
	1575	case 24 : set_func("f_read_to_limit"); break;
	1576	case 25 : set_func("f_read_area_pixel"); break;
	1577	case 26 : set_func("f_write_area_pixel"); break;
	1578	case 27 : set_func("f_copy_area_pixel"); break;
1578	1579
1579		case 29 : set_func("f_read_area_word"); break;
1580		case 30 : set_func("f_write_area_word"); break;
1581		case 31 : set_func("f_copy_area_word"); break;
1582		case 32 : set_func("f_swap_area_word"); break;
1583		case 33 : set_func("f_set_border_colour"); break;
1584		case 34 : set_func("f_enquire_border_colour"); break;
1585		case 35 : set_func("f_enquire_miscellaneous_data"); break;
1586		case 36 : set_func("f_circle"); break;
	1580	case 29 : set_func("f_read_area_word"); break;
	1581	case 30 : set_func("f_write_area_word"); break;
	1582	case 31 : set_func("f_copy_area_word"); break;
	1583	case 32 : set_func("f_swap_area_word"); break;
	1584	case 33 : set_func("f_set_border_colour"); break;
	1585	case 34 : set_func("f_enquire_border_colour"); break;
	1586	case 35 : set_func("f_enquire_miscellaneous_data"); break;
	1587	case 36 : set_func("f_circle"); break;
1587	1588
1588		case 38 : set_func("f_arc_of_ellipse"); break;
1589		case 39 : set_func("f_isin"); break;
1590		case 40 : set_func("f_icos"); break;
1591		case 41 : set_func("f_define_hatching_pattern"); break;
1592		case 42 : set_func("f_enquire_hatching_pattern"); break;
1593		case 43 : set_func("f_enquire_display_line"); break;
1594		case 44 : set_func("f_plonk_logo"); break;
	1589	case 38 : set_func("f_arc_of_ellipse"); break;
	1590	case 39 : set_func("f_isin"); break;
	1591	case 40 : set_func("f_icos"); break;
	1592	case 41 : set_func("f_define_hatching_pattern"); break;
	1593	case 42 : set_func("f_enquire_hatching_pattern"); break;
	1594	case 43 : set_func("f_enquire_display_line"); break;
	1595	case 44 : set_func("f_plonk_logo"); break;
1595	1596	}
1596	1597	}; break;
1597
1598		case 7 :
	1598
	1599	case 7 :
1599	1600	{
1600	1601	set_type("t_zend");
1601	1602	switch(ax)
1602	1603	{
1603		case 0 : set_func("f_get_version_number"); break;
	1604	case 0 : set_func("f_get_version_number"); break;
1604	1605	}
1605	1606	}; break;
1606
1607		case 8 :
	1607
	1608	case 8 :
1608	1609	{
1609	1610	set_type("t_zep");
1610	1611	switch(ax)
1611	1612	{
1612		case 0 : set_func("f_get_version_number"); break;
	1613	case 0 : set_func("f_get_version_number"); break;
1613	1614	}
1614	1615	}; break;
1615
1616		case 9 :
	1616
	1617	case 9 :
1617	1618	{
1618	1619	set_type("t_raw_console");
1619
	1620
1620	1621	switch(bx)
1621	1622	{
1622		case 0 :
	1623	case 0 :
1623	1624	{
1624	1625	set_drv("d_screen");
1625
	1626
1626	1627	switch(ax)
1627	1628	{
1628		case 0 : set_func("f_get_version_number"); break;
	1629	case 0 : set_func("f_get_version_number"); break;
1629	1630	case 1 : set_func("f_plonk_char"); dump_dssi=decode_dssi_f_plonk_char; break;
1630	1631	case 2 : set_func("f_plonk_cursor"); break;
1631	1632	case 3 : set_func("f_kill_cursor"); break;
r7305	r7306
1638	1639	case 10 : set_func("f_set_cursor_flash_rate"); break;
1639	1640	}
1640	1641	}; break;
1641
	1642
1642	1643	case 1 :
1643	1644	{
1644	1645	set_drv("d_keyboard");
1645
	1646
1646	1647	switch(ax)
1647	1648	{
1648		case 0 : set_func("f_get_version_number"); break;
	1649	case 0 : set_func("f_get_version_number"); break;
1649	1650	case 1 : set_func("f_init_keyboard"); break;
1650	1651	case 2 : set_func("f_get_last_key_code"); break;
1651	1652	case 3 : set_func("f_get_bitmap"); break;
r7305	r7306
1653	1654	}; break;
1654	1655	}
1655	1656	}; break;
1656
1657		case 10 :
	1657
	1658	case 10 :
1658	1659	{
1659	1660
1660	1661	set_type("t_acoustics");
1661
	1662
1662	1663	switch(bx)
1663	1664	{
1664		case 0 :
	1665	case 0 :
1665	1666	{
1666	1667	set_drv("d_sound");
1667
	1668
1668	1669	switch(ax)
1669	1670	{
1670		case 0 : set_func("f_get_version_number"); break;
	1671	case 0 : set_func("f_get_version_number"); break;
1671	1672	case 1 : set_func("f_sound_enable"); break;
1672	1673	case 2 : set_func("f_play_note"); break;
1673	1674	case 3 : set_func("f_get_queue_status"); break;
1674	1675	}
1675	1676	}; break;
1676
	1677
1677	1678	case 1 :
1678	1679	{
1679	1680	set_drv("d_voice");
1680	1681
1681	1682	switch(ax)
1682	1683	{
1683		case 0 : set_func("f_get_version_number"); break;
	1684	case 0 : set_func("f_get_version_number"); break;
1684	1685	case 1 : set_func("f_talk"); break;
1685	1686	case 2 : set_func("f_wait_and_talk"); break;
1686	1687	case 3 : set_func("f_test_talking"); break;
1687	1688	}
1688	1689	}
1689		}
	1690	}
1690	1691	}; break;
1691
1692		case 11 :
	1692
	1693	case 11 :
1693	1694	{
1694	1695	set_type("t_hard_sums");
1695	1696	switch(ax)
1696	1697	{
1697		case 0 : set_func("f_get_version_number"); break;
	1698	case 0 : set_func("f_get_version_number"); break;
1698	1699	}
1699		}; break;
	1700	}; break;
1700	1701	}
1701
	1702
1702	1703	logerror("Type=%s, Driver=%s, Function=%s\n",type_str,drv_str,func_str);
1703
	1704
1704	1705	if(dump_dssi!=NULL)
1705	1706	dump_dssi(device,ds,si);
1706	1707	logerror("=======================================================================\n");
r7305	r7306
1719	1720	static void decode_dssi_f_fill_area(running_device *device,UINT16 ds, UINT16 si)
1720	1721	{
1721	1722	const address_space *space = cputag_get_address_space(device->machine,MAINCPU_TAG, ADDRESS_SPACE_PROGRAM);
1722
	1723
1723	1724	UINT16 *addr_ptr;
1724	1725	t_area_params *area_params;
1725	1726	t_nimbus_brush *brush;
1726	1727	int cocount;
1727	1728
1728	1729	area_params = (t_area_params *)get_dssi_ptr(space,ds,si);
1729
	1730
1730	1731	OUTPUT_SEGOFS("SegBrush:OfsBrush",area_params->seg_brush,area_params->ofs_brush);
1731	1732	brush=(t_nimbus_brush *)memory_get_read_ptr(space, LINEAR_ADDR(area_params->seg_brush,area_params->ofs_brush));
1732
	1733
1733	1734	logerror("Brush params\n");
1734	1735	logerror("Style=%04X, StyleIndex=%04X\n",brush->style,brush->style_index);
1735	1736	logerror("Colour1=%04X, Colour2=%04X\n",brush->colour1,brush->colour2);
1736	1737	logerror("transparency=%04X, boundry_spec=%04X\n",brush->transparency,brush->boundary_spec);
1737	1738	logerror("boundry colour=%04X, save colour=%04X\n",brush->boundary_colour,brush->save_colour);
1738
1739
	1739
	1740
1740	1741	OUTPUT_SEGOFS("SegData:OfsData",area_params->seg_data,area_params->ofs_data);
1741
	1742
1742	1743	addr_ptr = (UINT16 *)memory_get_read_ptr(space, LINEAR_ADDR(area_params->seg_data,area_params->ofs_data));
1743	1744	for(cocount=0; cocount < area_params->count; cocount++)
1744	1745	{
r7305	r7306
1749	1750	static void decode_dssi_f_plot_character_string(running_device *device,UINT16 ds, UINT16 si)
1750	1751	{
1751	1752	const address_space *space = cputag_get_address_space(device->machine,MAINCPU_TAG, ADDRESS_SPACE_PROGRAM);
1752
	1753
1753	1754	UINT8 *char_ptr;
1754	1755	t_plot_string_params *plot_string_params;
1755	1756	int charno;
1756
	1757
1757	1758	plot_string_params=(t_plot_string_params *)get_dssi_ptr(space,ds,si);
1758
	1759
1759	1760	OUTPUT_SEGOFS("SegFont:OfsFont",plot_string_params->seg_font,plot_string_params->ofs_font);
1760	1761	OUTPUT_SEGOFS("SegData:OfsData",plot_string_params->seg_data,plot_string_params->ofs_data);
1761
	1762
1762	1763	logerror("x=%d, y=%d, length=%d\n",plot_string_params->x,plot_string_params->y,plot_string_params->length);
1763
	1764
1764	1765	char_ptr=(UINT8*)memory_get_read_ptr(space, LINEAR_ADDR(plot_string_params->seg_data,plot_string_params->ofs_data));
1765	1766
1766	1767	if (plot_string_params->length==0xFFFF)
r7305	r7306
1768	1769	else
1769	1770	for(charno=0;charno<plot_string_params->length;charno++)
1770	1771	logerror("%c",char_ptr[charno]);
1771
	1772
1772	1773	logerror("\n");
1773	1774	}
1774	1775
r7305	r7306
1778	1779	UINT16 *new_colours;
1779	1780	int colour;
1780	1781	new_colours=(UINT16 *)get_dssi_ptr(space,ds,si);
1781
	1782
1782	1783	OUTPUT_SEGOFS("SegColours:OfsColours",ds,si);
1783
	1784
1784	1785	for(colour=0;colour<16;colour++)
1785	1786	logerror("colour #%02X=%04X\n",colour,new_colours[colour]);
1786
	1787
1787	1788	}
1788	1789
1789	1790	static void decode_dssi_f_plonk_char(running_device *device,UINT16 ds, UINT16 si)
r7305	r7306
1791	1792	const address_space *space = cputag_get_address_space(device->machine,MAINCPU_TAG, ADDRESS_SPACE_PROGRAM);
1792	1793	UINT16 *params;
1793	1794	params=(UINT16 *)get_dssi_ptr(space,ds,si);
1794
	1795
1795	1796	OUTPUT_SEGOFS("SegParams:OfsParams",ds,si);
1796	1797
1797	1798	logerror("plonked_char=%c\n",params[0]);
r7305	r7306
1802	1803	const address_space *space = cputag_get_address_space(device->machine,MAINCPU_TAG, ADDRESS_SPACE_PROGRAM);
1803	1804	UINT16 *params;
1804	1805	int param_no;
1805
	1806
1806	1807	params=(UINT16 *)get_dssi_ptr(space,ds,si);
1807
	1808
1808	1809	for(param_no=0;param_no<16;param_no++)
1809	1810	logerror("%04X ",params[param_no]);
1810
	1811
1811	1812	logerror("\n");
1812	1813	}
1813	1814
1814	1815	READ16_HANDLER( nimbus_io_r )
1815	1816	{
1816	1817	int pc=cpu_get_pc(space->cpu);
1817
	1818
1818	1819	logerror("Nimbus IOR at pc=%08X from %04X mask=%04X, data=%04X\n",pc,(offset*2)+0x30,mem_mask,IOPorts[offset]);
1819
	1820
1820	1821	switch (offset*2)
1821	1822	{
1822	1823	default : return IOPorts[offset]; break;
r7305	r7306
1829	1830	int pc=cpu_get_pc(space->cpu);
1830	1831
1831	1832	logerror("Nimbus IOW at %08X write of %04X to %04X mask=%04X\n",pc,data,(offset*2)+0x30,mem_mask);
1832
	1833
1833	1834	switch (offset*2)
1834	1835	{
1835	1836	default : COMBINE_DATA(&IOPorts[offset]); break;
r7305	r7306
1837	1838	}
1838	1839
1839	1840
1840		/*
1841		Keyboard emulation
1842
	1841	/*
	1842	Keyboard emulation
	1843
1843	1844	*/
1844	1845
1845	1846	static void keyboard_reset(void)
1846	1847	{
1847	1848	memset(keyboard.keyrows,0xFF,NIMBUS_KEYROWS);
1848
	1849
1849	1850	// Setup timer to scan keyboard.
1850	1851	timer_adjust_periodic(keyboard.keyscan_timer, attotime_zero, 0, ATTOTIME_IN_HZ(50));
1851	1852
r7305	r7306
1882	1883	UINT8 mask;
1883	1884	static const char *const keynames[] = {
1884	1885	"KEY0", "KEY1", "KEY2", "KEY3", "KEY4",
1885		"KEY5", "KEY6", "KEY7", "KEY8", "KEY9",
	1886	"KEY5", "KEY6", "KEY7", "KEY8", "KEY9",
1886	1887	"KEY10"
1887	1888	};
1888	1889
1889	1890	for(row=0;row<NIMBUS_KEYROWS;row++)
1890	1891	{
1891	1892	keyrow=input_port_read(machine, keynames[row]);
1892
	1893
1893	1894	for(mask=0x80, bitno=7;mask>0;mask=mask>>1, bitno-=1)
1894	1895	{
1895	1896	if(!(keyrow & mask) && (keyboard.keyrows[row] & mask))
r7305	r7306
1897	1898	if (LOG_KEYBOARD) logerror("keypress %02X\n",(row<<3)+bitno);
1898	1899	queue_scancode((row<<3)+bitno);
1899	1900	}
1900
	1901
1901	1902	if((keyrow & mask) && !(keyboard.keyrows[row] & mask))
1902	1903	{
1903		if (LOG_KEYBOARD) logerror("keyrelease %02X\n",0x80+(row<<3)+bitno);
	1904	if (LOG_KEYBOARD) logerror("keyrelease %02X\n",0x80+(row<<3)+bitno);
1904	1905	queue_scancode(0x80+(row<<3)+bitno);
1905	1906	}
1906	1907	}
1907
	1908
1908	1909	keyboard.keyrows[row]=keyrow;
1909	1910	}
1910	1911	}
1911	1912
1912	1913
1913		/*
	1914	/*
1914	1915
1915		Z80SIO, used for the keyboard interface
	1916	Z80SIO, used for the keyboard interface
1916	1917
1917	1918	*/
1918	1919
r7305	r7306
1920	1921	{
1921	1922	int pc=cpu_get_pc(devtag_get_device(device->machine,MAINCPU_TAG));
1922	1923	UINT8 result = 0;
1923
	1924
1924	1925	switch (offset*2)
1925	1926	{
1926	1927	case 0 :
1927		result=z80sio_d_r(device, 0);
	1928	result=z80sio_d_r(device, 0);
1928	1929	break;
1929	1930	case 2 :
1930		result=z80sio_d_r(device, 1);
	1931	result=z80sio_d_r(device, 1);
1931	1932	break;
1932	1933	case 4 :
1933	1934	result=z80sio_c_r(device, 0);
r7305	r7306
1978	1979	if(state!=sio_int_state)
1979	1980	{
1980	1981	sio_int_state=state;
1981
	1982
1982	1983	if(state)
1983	1984	external_int(device->machine,0,EXTERNAL_INT_Z80SIO);
1984	1985	}
r7305	r7306
1999	2000	{
2000	2001	if(channel==0)
2001	2002	{
2002		return keyboard_queue_read();
	2003	return keyboard_queue_read();
2003	2004	}
2004	2005	else
2005	2006	return -1;
r7305	r7306
2022	2023	if(iou_reg092 & DISK_INT_ENABLE)
2023	2024	{
2024	2025	external_int(machine,0,EXTERNAL_INT_DISK);
2025		}
	2026	}
2026	2027	}
2027	2028
2028	2029	static WRITE_LINE_DEVICE_HANDLER( nimbus_fdc_intrq_w )
r7305	r7306
2036	2037
2037	2038	if(LOG_DISK)
2038	2039	logerror("nimbus_drives_drq_w(%d)\n", state);
2039
	2040
2040	2041	if(state && FDC_DRQ_ENABLED())
2041	2042	drq_callback(device->machine,1);
2042	2043	}
2043	2044
2044		/*
2045		0x410 read bits
2046
	2045	/*
	2046	0x410 read bits
	2047
2047	2048	0 Ready from floppy
2048	2049	1 Index pulse from floppy
2049	2050	2 Motor on from floppy
r7305	r7306
2059	2060	int result = 0;
2060	2061	running_device *fdc = devtag_get_device(space->machine, FDC_TAG);
2061	2062	running_device *hdc = devtag_get_device(space->machine, SCSIBUS_TAG);
2062
	2063
2063	2064	int pc=cpu_get_pc(space->cpu);
2064	2065	running_device *drive = devtag_get_device(space->machine, nimbus_wd17xx_interface.floppy_drive_tags[FDC_DRIVE()]);
2065
	2066
2066	2067	switch(offset*2)
2067	2068	{
2068	2069	case 0x08 :
r7305	r7306
2082	2083	nimbus_drives.reg410_in &= ~FDC_BITS_410;
2083	2084	nimbus_drives.reg410_in \|= (FDC_MOTOR() ? FDC_MOTOR_MASKI : 0x00);
2084	2085	nimbus_drives.reg410_in \|= (floppy_drive_get_flag_state(drive, FLOPPY_DRIVE_INDEX) ? 0x00 : FDC_INDEX_MASK);
2085		nimbus_drives.reg410_in \|= (floppy_drive_get_flag_state(drive, FLOPPY_DRIVE_READY) ? FDC_READY_MASK : 0x00);
2086
	2086	nimbus_drives.reg410_in \|= (floppy_drive_get_flag_state(drive, FLOPPY_DRIVE_READY) ? FDC_READY_MASK : 0x00);
	2087
2087	2088	// Flip inverted bits
2088	2089	result=nimbus_drives.reg410_in ^ INV_BITS_410;
2089	2090	break;
r7305	r7306
2099	2100
2100	2101	if((LOG_DISK_HDD) && ((offset*2)>=0x10))
2101	2102	logerror("Nimbus HDCR at pc=%08X from %04X data=%02X\n",pc,(offset*2)+0x400,result);
2102
2103	2103
	2104
2104	2105	return result;
2105	2106	}
2106	2107
2107	2108	/*
2108	2109	0x400 write bits
2109
	2110
2110	2111	0 drive 0 select
2111	2112	1 drive 1 select
2112	2113	2 drive 2 select
r7305	r7306
2115	2116	5 fdc motor on
2116	2117	6 hdc drq enabled
2117	2118	7 fdc drq enabled
2118
	2119
2119	2120	0x410 write bits
2120
	2121
2121	2122	0 SCSI reset
2122	2123	1 SCSI SEL
2123		2 SCSI IRQ Enable
	2124	2 SCSI IRQ Enable
2124	2125	*/
2125	2126
2126	2127	WRITE8_HANDLER( nimbus_disk_w )
r7305	r7306
2129	2130	running_device *hdc = devtag_get_device(space->machine, SCSIBUS_TAG);
2130	2131	int pc=cpu_get_pc(space->cpu);
2131	2132	UINT8 reg400_old = nimbus_drives.reg400;
2132
	2133
2133	2134	if(LOG_DISK_FDD && ((offset*2)<=0x10))
2134	2135	logerror("Nimbus FDCW at %05X write of %02X to %04X\n",pc,data,(offset*2)+0x400);
2135	2136
r7305	r7306
2140	2141	{
2141	2142	case 0x00 :
2142	2143	nimbus_drives.reg400=data;
2143
	2144
2144	2145	wd17xx_set_drive(fdc,FDC_DRIVE());
2145	2146	wd17xx_set_side(fdc, FDC_SIDE());
2146
2147		// Nimbus FDC is hard wired for double density
2148		wd17xx_set_density(fdc, DEN_MFM_LO);
2149	2147
2150	2148	// if we enable hdc drq with a pending condition, act on it
2151	2149	if((data & HDC_DRQ_MASK) && (~reg400_old & HDC_DRQ_MASK))
r7305	r7306
2167	2165	case 0x10 :
2168	2166	hdc_ctrl_write(space->machine,data);
2169	2167	break;
2170
	2168
2171	2169	case 0x18 :
2172	2170	scsi_data_w(hdc, data);
2173	2171	hdc_post_rw(space->machine);
r7305	r7306
2187	2185	nimbus_drives.reg410_in \|= (get_scsi_line(hdc,SCSI_LINE_IO) ? HDC_IO_MASK : 0);
2188	2186	nimbus_drives.reg410_in \|= (get_scsi_line(hdc,SCSI_LINE_BSY) ? HDC_BSY_MASK : 0);
2189	2187	nimbus_drives.reg410_in \|= (get_scsi_line(hdc,SCSI_LINE_MSG) ? HDC_MSG_MASK : 0);
2190
	2188
2191	2189	nimbus_drives.drq_ff=0;
2192	2190	}
2193	2191
2194	2192	static void hdc_ctrl_write(running_machine *machine, UINT8 data)
2195	2193	{
2196	2194	running_device *hdc = devtag_get_device(machine, SCSIBUS_TAG);
2197
	2195
2198	2196	// If we enable the HDC interupt, and an interrupt is pending, go deal with it.
2199		if(((data & HDC_IRQ_MASK) && (~nimbus_drives.reg410_out & HDC_IRQ_MASK)) &&
	2197	if(((data & HDC_IRQ_MASK) && (~nimbus_drives.reg410_out & HDC_IRQ_MASK)) &&
2200	2198	((~nimbus_drives.reg410_in & HDC_INT_TRIGGER)==HDC_INT_TRIGGER))
2201	2199	generate_disk_int(machine);
2202
	2200
2203	2201	nimbus_drives.reg410_out=data;
2204	2202
2205	2203	set_scsi_line(hdc, SCSI_LINE_RESET, (data & HDC_RESET_MASK) ? 0 : 1);
r7305	r7306
2209	2207	static void hdc_post_rw(running_machine *machine)
2210	2208	{
2211	2209	running_device *hdc = devtag_get_device(machine, SCSIBUS_TAG);
2212
	2210
2213	2211	if((nimbus_drives.reg410_in & HDC_REQ_MASK)==0)
2214	2212	set_scsi_line(hdc,SCSI_LINE_ACK,0);
2215	2213
r7305	r7306
2228	2226	{
2229	2227	UINT8 mask = 0;
2230	2228	UINT8 last = 0;
2231
	2229
2232	2230	switch (line)
2233	2231	{
2234	2232	case SCSI_LINE_REQ : mask=HDC_REQ_MASK; break;
r7305	r7306
2237	2235	case SCSI_LINE_BSY : mask=HDC_BSY_MASK; break;
2238	2236	case SCSI_LINE_MSG : mask=HDC_MSG_MASK; break;
2239	2237	}
2240
	2238
2241	2239	last=nimbus_drives.reg410_in & mask;
2242
	2240
2243	2241	if(state)
2244	2242	nimbus_drives.reg410_in\|=mask;
2245	2243	else
2246	2244	nimbus_drives.reg410_in&=~mask;
2247	2245
2248
2249		if(line==SCSI_LINE_REQ)
	2246
	2247	if(line==SCSI_LINE_REQ)
2250	2248	{
2251	2249	if (state==0)
2252	2250	{
2253	2251	if(HDC_IRQ_ENABLED() && ((~nimbus_drives.reg410_in & HDC_INT_TRIGGER)==HDC_INT_TRIGGER))
2254		generate_disk_int(device->machine);
2255
	2252	generate_disk_int(device->machine);
	2253
2256	2254	if(((nimbus_drives.reg410_in & HDC_CD_MASK)==HDC_CD_MASK) && (last!=0))
2257		{
	2255	{
2258	2256	nimbus_drives.drq_ff=1;
2259	2257	hdc_drq(device->machine);
2260	2258	}
r7305	r7306
2271	2269	running_device *er59256 = machine->device(ER59256_TAG);
2272	2270
2273	2271	logerror("peripheral controler reset\n");
2274
	2272
2275	2273	memset(&ipc_interface,0,sizeof(ipc_interface));
2276
	2274
2277	2275	if(!data_loaded(er59256))
2278	2276	preload_rom(er59256,def_config,ARRAY_LENGTH(def_config));
2279	2277	}
r7305	r7306
2285	2283	logerror("in_data=%02X, in_status=%02X, out_data=%02X, out_status=%02X\n",
2286	2284	ipc_interface.ipc_in, ipc_interface.status_in,
2287	2285	ipc_interface.ipc_out, ipc_interface.status_out);
2288
	2286
2289	2287	}
2290	2288	#endif
2291	2289
2292		READ8_HANDLER( pc8031_r )
	2290	READ8_HANDLER( pc8031_r )
2293	2291	{
2294	2292	int pc=cpu_get_pc(space->cpu);
2295	2293	UINT8 result;
2296
	2294
2297	2295	switch(offset*2)
2298	2296	{
2299		case 0x00 : result=ipc_interface.ipc_out;
2300		ipc_interface.status_in &= ~IPC_IN_READ_PEND;
2301		ipc_interface.status_out &= ~IPC_OUT_BYTE_AVAIL;
	2297	case 0x00 : result=ipc_interface.ipc_out;
	2298	ipc_interface.status_in &= ~IPC_IN_READ_PEND;
	2299	ipc_interface.status_out &= ~IPC_OUT_BYTE_AVAIL;
2302	2300	break;
2303
	2301
2304	2302	case 0x02 : result=ipc_interface.status_out;
2305	2303	break;
2306
	2304
2307	2305	default : result=0; break;
2308	2306	}
2309	2307
2310	2308	if(LOG_PC8031_186)
2311	2309	logerror("Nimbus PCIOR %08X read of %04X returns %02X\n",pc,(offset*2)+0xC0,result);
2312
	2310
2313	2311	return result;
2314	2312	}
2315	2313
r7305	r7306
2324	2322	ipc_interface.status_in &= ~IPC_IN_ADDR;
2325	2323	ipc_interface.status_out \|= IPC_OUT_READ_PEND;
2326	2324	break;
2327
	2325
2328	2326	case 0x02 : ipc_interface.ipc_in=data;
2329	2327	ipc_interface.status_in \|= IPC_IN_BYTE_AVAIL;
2330	2328	ipc_interface.status_in \|= IPC_IN_ADDR;
r7305	r7306
2343	2341	{
2344	2342	int pc=cpu_get_pc(space->cpu);
2345	2343	UINT8 result = 0;
2346
	2344
2347	2345	switch (offset & 0x01)
2348	2346	{
2349	2347	case 0x00 : result=ipc_interface.ipc_in;
2350		ipc_interface.status_out &= ~IPC_OUT_READ_PEND;
2351		ipc_interface.status_in &= ~IPC_IN_BYTE_AVAIL;
	2348	ipc_interface.status_out &= ~IPC_OUT_READ_PEND;
	2349	ipc_interface.status_in &= ~IPC_IN_BYTE_AVAIL;
2352	2350	break;
2353
	2351
2354	2352	case 0x01 : result=ipc_interface.status_in;
2355	2353	break;
2356	2354	}
2357
2358		if(((offset==2) \|\| (offset==3)) && (iou_reg092 & PC8031_INT_ENABLE))
	2355
	2356	if(((offset==2) \|\| (offset==3)) && (iou_reg092 & PC8031_INT_ENABLE))
2359	2357	external_int(space->machine,0,EXTERNAL_INT_PC8031_8C);
2360
	2358
2361	2359	if(LOG_PC8031)
2362		logerror("8031: PCIOR %04X read of %04X returns %02X\n",pc,offset,result);
2363
	2360	logerror("8031: PCIOR %04X read of %04X returns %02X\n",pc,offset,result);
	2361
2364	2362	return result;
2365	2363	}
2366	2364
2367	2365	WRITE8_HANDLER( pc8031_iou_w )
2368	2366	{
2369		int pc=cpu_get_pc(space->cpu);
	2367	int pc=cpu_get_pc(space->cpu);
2370	2368
2371	2369	if(LOG_PC8031)
2372	2370	logerror("8031 PCIOW %04X write of %02X to %04X\n",pc,data,offset);
2373
	2371
2374	2372	switch(offset & 0x03)
2375	2373	{
2376	2374	case 0x00 : ipc_interface.ipc_out=data;
r7305	r7306
2378	2376	ipc_interface.status_out &= ~IPC_OUT_ADDR;
2379	2377	ipc_interface.status_in \|= IPC_IN_READ_PEND;
2380	2378	break;
2381
	2379
2382	2380	case 0x01 : ipc_interface.ipc_out=data;
2383	2381	ipc_interface.status_out \|= IPC_OUT_BYTE_AVAIL;
2384	2382	ipc_interface.status_out \|= IPC_OUT_ADDR;
r7305	r7306
2390	2388	ipc_interface.status_out &= ~IPC_OUT_ADDR;
2391	2389	ipc_interface.status_in \|= IPC_IN_READ_PEND;
2392	2390	if(iou_reg092 & PC8031_INT_ENABLE)
2393		external_int(space->machine,0,EXTERNAL_INT_PC8031_8F);
	2391	external_int(space->machine,0,EXTERNAL_INT_PC8031_8F);
2394	2392	break;
2395
	2393
2396	2394	case 0x03 : ipc_interface.ipc_out=data;
2397	2395	//ipc_interface.status_out \|= IPC_OUT_BYTE_AVAIL;
2398	2396	ipc_interface.status_out \|= IPC_OUT_ADDR;
2399	2397	ipc_interface.status_in \|= IPC_IN_READ_PEND;
2400	2398	if(iou_reg092 & PC8031_INT_ENABLE)
2401		external_int(space->machine,0,EXTERNAL_INT_PC8031_8E);
	2399	external_int(space->machine,0,EXTERNAL_INT_PC8031_8E);
2402	2400	break;
2403	2401	}
2404	2402	}
r7305	r7306
2410	2408	UINT8 result = 0;
2411	2409
2412	2410	if(LOG_PC8031_PORT)
2413		logerror("8031: PCPORTR %04X read of %04X returns %02X\n",pc,offset,result);
	2411	logerror("8031: PCPORTR %04X read of %04X returns %02X\n",pc,offset,result);
2414	2412
2415	2413	switch(offset)
2416	2414	{
r7305	r7306
2449	2447
2450	2448	if(LOG_IOU)
2451	2449	logerror("Nimbus IOUR %08X read of %04X returns %02X\n",pc,(offset*2)+0x92,result);
2452
	2450
2453	2451	return result;
2454	2452	}
2455	2453
r7305	r7306
2473	2471	iou_reg092=0x00;
2474	2472	}
2475	2473
2476		/*
	2474	/*
2477	2475	Sound hardware : AY8910
2478
	2476
2479	2477	I believe that the IO ports of the 8910 are used to control the ROMPack ports, however
2480	2478	this is currently un-implemented (and may never be as I don't have any rompacks!).
2481
	2479
2482	2480	The registers are mapped as so :
2483
	2481
2484	2482	Address 0xE0 0xE2
2485	2483	Read Data ????
2486	2484	Write Register Address Data
2487
2488		*/
2489	2485
	2486	*/
	2487
2490	2488	static void sound_reset(running_machine *machine)
2491	2489	{
2492	2490	//running_device *ay8910 = devtag_get_device(machine, AY8910_TAG);
r7305	r7306
2503	2501	{
2504	2502	running_device *ay8910 = devtag_get_device(space->machine, AY8910_TAG);
2505	2503	UINT8 result=0;
2506
	2504
2507	2505	if ((offset*2)==0)
2508	2506	result=ay8910_r(ay8910,0);
2509
	2507
2510	2508	return result;
2511	2509	}
2512	2510
r7305	r7306
2514	2512	{
2515	2513	int pc=cpu_get_pc(space->cpu);
2516	2514	running_device *ay8910 = devtag_get_device(space->machine, AY8910_TAG);
2517
	2515
2518	2516	if(LOG_SOUND)
2519	2517	logerror("Nimbus SoundW %05X write of %02X to %04X\n",pc,data,(offset*2)+0xE0);
2520	2518

src/mess/machine/c1571.c
r7305	r7306
121	121
122	122	int atn = cbm_iec_atn_r(c1571->serial_bus);
123	123	int data = !c1571->data_out & !(c1571->atn_ack ^ !atn);
124
	124
125	125	/* fast serial data */
126	126	if (c1571->ser_dir) data &= c1571->sp_out;
127
	127
128	128	cbm_iec_data_w(c1571->serial_bus, device, data);
129	129	}
130	130
r7305	r7306
133	133	c1571_t *c1571 = get_safe_token(device);
134	134
135	135	int srq = 1;
136
	136
137	137	/* fast serial clock */
138	138	if (c1571->ser_dir) srq &= c1571->cnt_out;
139	139
r7305	r7306
734	734
735	735	static const wd17xx_interface c1571_wd1770_intf =
736	736	{
	737	DEVCB_LINE_GND,
737	738	DEVCB_NULL,
738	739	DEVCB_NULL,
739	740	{ FLOPPY_0, NULL, NULL, NULL }
r7305	r7306
881	882	c1571->serial_bus = devtag_get_device(device->machine, config->serial_bus_tag);
882	883	c1571->image = device->subdevice(FLOPPY_0);
883	884
884		/* set floppy density */
885		wd17xx_set_density(c1571->wd1770, DEN_MFM_LO);
886
887	885	/* allocate data timer */
888	886	c1571->bit_timer = timer_alloc(device->machine, bit_tick, (void *)device);
889	887

src/mess/machine/pk8020.c
r7305	r7306
986	986
987	987	MACHINE_RESET( pk8020 )
988	988	{
989		running_device *fdc = devtag_get_device(machine, "wd1793");
990	989	pk8020_set_bank(machine,0);
991	990	cpu_set_irq_callback(devtag_get_device(machine, "maincpu"), pk8020_irq_callback);
992	991
993		wd17xx_set_density (fdc,DEN_FM_HI);
994
995	992	sound_gate = 0;
996	993	sound_level = 0;
997	994	}

src/mess/machine/bbc.c
r7305	r7306
1663	1663	wd17xx_set_side(fdc,(data>>2) & 0x01);
1664	1664
1665	1665	/* set density */
1666		if ((data>>3) & 0x01)
1667		{
1668		/* single density */
1669		wd17xx_set_density(fdc,DEN_FM_HI);
1670		}
1671		else
1672		{
1673		/* double density */
1674		wd17xx_set_density(fdc,DEN_MFM_LO);
1675		}
	1666	wd17xx_dden_w(fdc, BIT(data, 3));
1676	1667
1677	1668	bbc_1770_IntEnabled=(((data>>4) & 0x01)==0);
1678	1669
r7305	r7306
1783	1774	wd17xx_set_side(fdc,(data>>0) & 0x01);
1784	1775
1785	1776	/* set density */
1786		if ((data>>5) & 0x01)
1787		{
1788		/* single density */
1789		wd17xx_set_density(fdc,DEN_FM_HI);
1790		}
1791		else
1792		{
1793		/* double density */
1794		wd17xx_set_density(fdc,DEN_MFM_LO);
1795		}
	1777	wd17xx_dden_w(fdc, BIT(data, 5));
1796	1778
1797	1779	bbc_1770_IntEnabled=(data>>4) & 0x01;
1798	1780
r7305	r7306
1942	1924	wd17xx_set_side(fdc,(data>>4) & 0x01);
1943	1925
1944	1926	/* set density */
1945		if ((data>>5) & 0x01)
1946		{
1947		/* single density */
1948		wd17xx_set_density(fdc,DEN_FM_HI);
1949		}
1950		else
1951		{
1952		/* double density */
1953		wd17xx_set_density(fdc,DEN_MFM_LO);
1954		}
	1927	wd17xx_dden_w(fdc, BIT(data, 5));
1955	1928
1956	1929	// bbc_1770_IntEnabled=(((data>>4) & 0x01)==0);
1957	1930	bbc_1770_IntEnabled=1;

src/mess/drivers/x1.c
r7305	r7306
975	975	{
976	976	DEVCB_NULL,
977	977	DEVCB_NULL,
	978	DEVCB_NULL,
978	979	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
979	980	};
980	981

src/mess/drivers/xor100.c
r7305	r7306
249	249	case 3: state->fdc_dden = state->fdc_dden; break;
250	250	}
251	251
252		wd17xx_~~set_~~den~~sity~~(state->wd1795, state->fdc_dden ~~? DEN_FM_HI : DEN_FM_LO~~);
	252	wd17xx_dden_w(state->wd1795, state->fdc_dden);
253	253	}
254	254
255	255	/* Memory Maps */
r7305	r7306
507	507
508	508	static const wd17xx_interface wd1795_intf =
509	509	{
	510	DEVCB_NULL,
510	511	DEVCB_LINE(fdc_irq_w),
511	512	DEVCB_LINE(fdc_drq_w),
512	513	{ FLOPPY_0, FLOPPY_1, NULL, NULL }

src/mess/drivers/atarist.c
r7305	r7306
104	104
105	105	static const wd17xx_interface atarist_wd17xx_interface =
106	106	{
	107	DEVCB_NULL,
107	108	DEVCB_LINE(atarist_fdc_intrq_w),
108	109	DEVCB_LINE(atarist_fdc_drq_w),
109	110	{FLOPPY_0, FLOPPY_1, NULL, NULL}
r7305	r7306
1796	1797
1797	1798	static DEVICE_IMAGE_LOAD( atarist_serial )
1798	1799	{
1799		/* filename specified */
	1800	/* filename specified */
1800	1801	if (device_load_serial(image)==INIT_PASS)
1801	1802	{
1802	1803	serial_device_setup(image, 9600, 8, 1, SERIAL_PARITY_NONE);
r7305	r7306
1825	1826
1826	1827	#define MDRV_ATARIST_SERIAL_ADD(_tag) \
1827	1828	MDRV_DEVICE_ADD(_tag, ATARIST_SERIAL, 0)
1828
	1829
1829	1830	static const floppy_config atarist_floppy_config =
1830	1831	{
1831	1832	DEVCB_NULL,
r7305	r7306
1894	1895	MDRV_RAM_ADD("messram")
1895	1896	MDRV_RAM_DEFAULT_SIZE("1024K") // 1040ST
1896	1897	MDRV_RAM_EXTRA_OPTIONS("512K,256K") // 520ST ,260ST
1897
	1898
1898	1899	MDRV_ATARIST_SERIAL_ADD("serial")
1899	1900	MACHINE_DRIVER_END
1900	1901
r7305	r7306
1970	1971	MDRV_RAM_ADD("messram")
1971	1972	MDRV_RAM_DEFAULT_SIZE("1024K") // 1040STe
1972	1973	MDRV_RAM_EXTRA_OPTIONS("512K") // 520STe
1973
	1974
1974	1975	MDRV_ATARIST_SERIAL_ADD("serial")
1975	1976	MACHINE_DRIVER_END
1976	1977
r7305	r7306
1987	1988	MDRV_RAM_MODIFY("messram")
1988	1989	MDRV_RAM_DEFAULT_SIZE("4M") // Mega STe 4
1989	1990	MDRV_RAM_EXTRA_OPTIONS("2M,1M") // Mega STe 2 ,Mega STe 1
1990
	1991
1991	1992	MDRV_ATARIST_SERIAL_ADD("serial2")
1992	1993	MACHINE_DRIVER_END
1993	1994
r7305	r7306
2042	2043	MDRV_RAM_ADD("messram")
2043	2044	MDRV_RAM_DEFAULT_SIZE("4M")
2044	2045	MDRV_RAM_EXTRA_OPTIONS("1M")
2045
	2046
2046	2047	MDRV_ATARIST_SERIAL_ADD("serial")
2047	2048	MDRV_ATARIST_SERIAL_ADD("serial2")
2048	2049	MACHINE_DRIVER_END
r7305	r7306
2183	2184	ROM_SYSTEM_BIOS( 0, "tos492", "TOS 4.92" )
2184	2185	ROMX_LOAD( "tos492.img", 0xe00000, 0x080000, BAD_DUMP CRC(bc8e497f) SHA1(747a38042844a6b632dcd9a76d8525fccb5eb892), ROM_BIOS(2) )
2185	2186	ROM_END
2186
	2187
2187	2188	/* System Drivers */
2188	2189
2189	2190	/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */

src/mess/drivers/vector06.c
r7305	r7306
157	157	DO_NOT_KEEP_GEOMETRY
158	158	};
159	159
	160	const wd17xx_interface vector06_wd17xx_interface =
	161	{
	162	DEVCB_LINE_VCC,
	163	DEVCB_NULL,
	164	DEVCB_NULL,
	165	{ FLOPPY_0, FLOPPY_1, NULL, NULL}
	166	};
	167
160	168	/* Machine driver */
161	169	static MACHINE_DRIVER_START( vector06 )
162	170	/* basic machine hardware */
r7305	r7306
192	200
193	201	MDRV_CASSETTE_ADD( "cassette", vector_cassette_config )
194	202
195		MDRV_WD1793_ADD("wd1793", de~~faul~~t_wd17xx_interface~~_2_drives~~ )
	203	MDRV_WD1793_ADD("wd1793", vector06_wd17xx_interface)
196	204	MDRV_FLOPPY_2_DRIVES_ADD(vector_floppy_config)
197	205
198	206	/* cartridge */

src/mess/drivers/v1050.c
r7305	r7306
817	817	floppy_drive_set_ready_state(get_floppy_image(device->machine, 1), f_motor_on, 1);
818	818
819	819	/* density select */
820		wd17xx_~~set_~~den~~sity~~(state->mb8877, BIT(data, 7) ~~? DEN_FM_LO : DEN_FM_HI~~);
	820	wd17xx_dden_w(state->mb8877, BIT(data, 7));
821	821	}
822	822
823	823	static WRITE8_DEVICE_HANDLER( misc_8255_b_w )
r7305	r7306
1077	1077
1078	1078	static const wd17xx_interface v1050_wd17xx_intf =
1079	1079	{
	1080	DEVCB_NULL,
1080	1081	DEVCB_LINE(v1050_mb8877_intrq_w),
1081	1082	DEVCB_LINE(v1050_mb8877_drq_w),
1082	1083	{FLOPPY_0,FLOPPY_1,NULL,NULL}

src/mess/drivers/orion.c
r7305	r7306
101	101	FIRST_SECTOR_ID([1]))
102	102	FLOPPY_OPTIONS_END
103	103
	104	static const wd17xx_interface orion_wd17xx_interface =
	105	{
	106	DEVCB_LINE_VCC,
	107	DEVCB_NULL,
	108	DEVCB_NULL,
	109	{ FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3 }
	110	};
	111
104	112	static const floppy_config orion_floppy_config =
105	113	{
106	114	DEVCB_NULL,
r7305	r7306
147	155
148	156	MDRV_CASSETTE_ADD( "cassette", orion_cassette_config )
149	157
150		MDRV_WD1793_ADD("wd1793", ~~default~~_wd17xx_interface )
	158	MDRV_WD1793_ADD("wd1793", orion_wd17xx_interface )
151	159
152	160	MDRV_FLOPPY_4_DRIVES_ADD(orion_floppy_config)
153	161
r7305	r7306
211	219
212	220	MDRV_CASSETTE_ADD( "cassette", orion_cassette_config )
213	221
214		MDRV_WD1793_ADD("wd1793", ~~default~~_wd17xx_interface )
	222	MDRV_WD1793_ADD("wd1793", orion_wd17xx_interface )
215	223
216	224	MDRV_FLOPPY_4_DRIVES_ADD(orion_floppy_config)
217	225
r7305	r7306
234	242	MDRV_CPU_PROGRAM_MAP(orionpro_mem)
235	243	MDRV_CPU_IO_MAP(orionpro_io)
236	244
237		MDRV_MACHINE_START( orionpro )
238	245	MDRV_MACHINE_RESET( orionpro )
239	246
240	247	MDRV_I8255A_ADD( "ppi8255_1", orion128_ppi8255_interface_1 )
r7305	r7306
266	273
267	274	MDRV_CASSETTE_ADD( "cassette", orion_cassette_config )
268	275
269		MDRV_WD1793_ADD("wd1793", ~~default~~_wd17xx_interface )
	276	MDRV_WD1793_ADD("wd1793", orion_wd17xx_interface )
270	277
271	278	MDRV_FLOPPY_4_DRIVES_ADD(orion_floppy_config)
272	279

src/mess/drivers/fmtowns.c
r7305	r7306
456	456	floppy_drive_set_ready_state(floppy_get_device(space->machine, towns_selected_drive-1), data & 0x10,0);
457	457	}
458	458	wd17xx_set_side(fdc,(data & 0x04)>>2);
459		wd17xx_set_density(fdc,(DENSITY)((data & 0x02)>>1));
	459	wd17xx_dden_w(fdc, BIT(data, 1));
	460
460	461	towns_fdc_irq6mask = data & 0x01;
461	462	logerror("FDC: write %02x to offset 0x08\n",data);
462	463	break;
r7305	r7306
762	763	ret \|= ((input_port_read(space->machine,"joy2") & 0x3f) << 16) \| 0x00400000;
763	764	else
764	765	ret \|= 0x003f0000;
765
	766
766	767	if(extra1 & 0x01) // Run button = left+right
767	768	ret &= ~0x0000000c;
768	769	if(extra2 & 0x01)
r7305	r7306
2029	2030
2030	2031	static const wd17xx_interface towns_mb8877a_interface =
2031	2032	{
	2033	DEVCB_NULL,
2032	2034	DEVCB_DEVICE_LINE("pic8259_master",towns_mb8877a_irq_w),
2033	2035	DEVCB_DEVICE_LINE("dma_1", towns_mb8877a_drq_w),
2034	2036	{FLOPPY_0,FLOPPY_1,0,0}

src/mess/drivers/nascom1.c
r7305	r7306
343	343	MDRV_CPU_MODIFY("maincpu")
344	344	MDRV_CPU_IO_MAP(nascom2_io)
345	345
346		MDRV_MACHINE_RESET( nascom2 )
347
348	346	/* video hardware */
349	347	MDRV_SCREEN_MODIFY("screen")
350	348	MDRV_SCREEN_SIZE(48 * 8, 16 * 14)

src/mess/drivers/samcoupe.c
r7305	r7306
561	561	DO_NOT_KEEP_GEOMETRY
562	562	};
563	563
	564	static const wd17xx_interface samcoupe_wd17xx_intf =
	565	{
	566	DEVCB_LINE_GND,
	567	DEVCB_NULL,
	568	DEVCB_NULL,
	569	{ FLOPPY_0, FLOPPY_1, NULL, NULL }
	570	};
	571
564	572	static MACHINE_DRIVER_START( samcoupe )
565	573	/* basic machine hardware */
566	574	MDRV_CPU_ADD("maincpu", Z80, SAMCOUPE_XTAL_X1 / 4) /* 6 MHz */
r7305	r7306
586	594	MDRV_CENTRONICS_ADD("lpt1", standard_centronics)
587	595	MDRV_CENTRONICS_ADD("lpt2", standard_centronics)
588	596	MDRV_MSM6242_ADD("sambus_clock")
589		MDRV_WD1772_ADD("wd1772", ~~def~~ault_wd17xx_interf~~ace_2_drives~~)
	597	MDRV_WD1772_ADD("wd1772", samcoupe_wd17xx_intf)
590	598	MDRV_CASSETTE_ADD("cassette", samcoupe_cassette_config)
591	599
592	600	/* sound hardware */

src/mess/drivers/tiki100.c
r7305	r7306
211	211	if (BIT(data, 1)) wd17xx_set_drive(state->fd1797, 1);
212	212
213	213	/* density select */
214		wd17xx_~~set_~~den~~sity~~(state->fd1797, BIT(data, 4) ~~? DEN_FM_LO : DEN_FM_HI~~);
	214	wd17xx_dden_w(state->fd1797, BIT(data, 4));
215	215
216	216	/* floppy motor */
217	217	floppy_mon_w(get_floppy_image(space->machine, 0), !BIT(data, 6));
r7305	r7306
542	542	{
543	543	DEVCB_NULL,
544	544	DEVCB_NULL,
	545	DEVCB_NULL,
545	546	{ FLOPPY_0, FLOPPY_1, NULL, NULL }
546	547	};
547	548

src/mess/drivers/fm7.c
r7305	r7306
1805	1805
1806	1806	static const wd17xx_interface fm7_mb8877a_interface =
1807	1807	{
	1808	DEVCB_NULL,
1808	1809	DEVCB_LINE(fm7_fdc_intrq_w),
1809	1810	DEVCB_LINE(fm7_fdc_drq_w),
1810	1811	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}

src/mess/drivers/ht68k.c
r7305	r7306
96	96
97	97	static const wd17xx_interface ht68k_wd17xx_interface =
98	98	{
	99	DEVCB_NULL,
99	100	DEVCB_LINE(ht68k_fdc_intrq_w),
100	101	DEVCB_NULL,
101	102	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}

src/mess/drivers/bw2.c
r7305	r7306
516	516	static MACHINE_START( bw2 )
517	517	{
518	518	bw2_state state = (bw2_state ) machine->driver_data;
519		running_device *fdc = devtag_get_device(machine, "wd179x");
520	519
521		wd17xx_set_density(fdc,DEN_MFM_LO);
522
523	520	/* find devices */
524	521	state->msm8251 = devtag_get_device(machine, MSM8251_TAG);
525	522	state->msm6255 = devtag_get_device(machine, MSM6255_TAG);
r7305	r7306
775	772
776	773	static const wd17xx_interface bw2_wd17xx_interface =
777	774	{
	775	DEVCB_LINE_GND,
778	776	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
779	777	DEVCB_LINE(bw2_wd17xx_drq_w),
780	778	{FLOPPY_0, FLOPPY_1, NULL, NULL}
r7305	r7306
810	808	case DEVINFO_STR_IMAGE_FILE_EXTENSIONS: strcpy(info->s, "txt"); break;
811	809	case DEVINFO_INT_IMAGE_READABLE: info->i = 1; break;
812	810	case DEVINFO_INT_IMAGE_WRITEABLE: info->i = 0; break;
813		case DEVINFO_INT_IMAGE_CREATABLE: info->i = 0; break;
	811	case DEVINFO_INT_IMAGE_CREATABLE: info->i = 0; break;
814	812	default: DEVICE_GET_INFO_CALL(serial); break;
815	813	}
816	814	}
r7305	r7306
819	817
820	818	#define MDRV_BW2_SERIAL_ADD(_tag) \
821	819	MDRV_DEVICE_ADD(_tag, BW2_SERIAL, 0)
822
823	820
	821
824	822	static MACHINE_DRIVER_START( bw2 )
825	823	MDRV_DRIVER_DATA(bw2_state)
826	824
r7305	r7306
864	862	MDRV_RAM_ADD("messram")
865	863	MDRV_RAM_DEFAULT_SIZE("64K")
866	864	MDRV_RAM_EXTRA_OPTIONS("96K,128K,160K,192K,224K")
867
	865
868	866	MDRV_BW2_SERIAL_ADD("serial")
869	867	MACHINE_DRIVER_END
870	868

src/mess/drivers/enterp.c
r7305	r7306
179	179
180	180	static MACHINE_RESET( enterprise )
181	181	{
182		running_device *fdc = devtag_get_device(machine, "wd1770");
183	182	cpu_set_input_line_vector(devtag_get_device(machine, "maincpu"), 0, 0xff);
184
185		wd17xx_set_density(fdc, DEN_FM_HI);
186	183	}
187	184
188	185
r7305	r7306
246	243	if (BIT(data, 2)) wd17xx_set_drive(fdc, 2);
247	244	if (BIT(data, 3)) wd17xx_set_drive(fdc, 3);
248	245
249		/* side */
250	246	wd17xx_set_side(fdc, BIT(data, 4));
	247	wd17xx_dden_w(fdc, BIT(data, 5));
251	248	}
252	249
253	250	/***************************************************************************
r7305	r7306
427	424
428	425	static const wd17xx_interface enterp_wd1770_interface =
429	426	{
	427	DEVCB_NULL,
430	428	DEVCB_LINE(enterp_wd1770_intrq_w),
431	429	DEVCB_LINE(enterp_wd1770_drq_w),
432	430	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}

src/mess/drivers/apricot.c
r7305	r7306
182	182
183	183	static const wd17xx_interface apricot_wd17xx_intf =
184	184	{
	185	DEVCB_LINE_GND,
185	186	DEVCB_LINE(apricot_wd2793_intrq_w),
186	187	DEVCB_LINE(apricot_wd2793_drq_w),
187	188	{ FLOPPY_0, FLOPPY_1, NULL, NULL }

src/mess/drivers/apricotf.c
r7305	r7306
125	125	}
126	126	}
127	127
128		static const wd17xx_interface act_wd2797_interface =
129		{
130		DEVCB_NULL,
131		DEVCB_NULL,
132		{FLOPPY_0, FLOPPY_1 }
133		};
134
135	128	static READ16_HANDLER( act_pal_r )
136	129	{
137	130	act_state state = (act_state )space->machine->driver_data;
r7305	r7306
317	310	MDRV_PALETTE_LENGTH(16)
318	311	// MDRV_PALETTE_INIT(black_and_white)
319	312
320		MDRV_WD2793_ADD("fdc", act_wd2797_interface )
	313	MDRV_WD2793_ADD("fdc", default_wd17xx_interface_2_drives )
321	314
322	315	MDRV_GFXDECODE(act_f1)
323	316

src/mess/drivers/a310.c
r7305	r7306
202	202
203	203	static const wd17xx_interface a310_wd17xx_interface =
204	204	{
	205	DEVCB_NULL,
205	206	DEVCB_LINE(a310_wd177x_intrq_w),
206	207	DEVCB_LINE(a310_wd177x_drq_w),
207	208	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}

src/mess/drivers/xerox820.c
r7305	r7306
140	140	xerox820_state state = (xerox820_state )machine->driver_data;
141	141	const address_space *program = cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM);
142	142	UINT8 *ram = messram_get_ptr(devtag_get_device(machine, "messram"));
143
	143
144	144	if (bank)
145	145	{
146	146	/* ROM */
r7305	r7306
161	161	xerox820_state state = (xerox820_state )machine->driver_data;
162	162	const address_space *program = cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM);
163	163	UINT8 *ram = messram_get_ptr(devtag_get_device(machine, "messram"));
164
	164
165	165	if (bank)
166	166	{
167	167	/* ROM */
r7305	r7306
212	212	{
213	213	xerox820_state state = (xerox820_state )space->machine->driver_data;
214	214
215		wd17xx_~~set_~~den~~sity~~(state->wd1771, offset ? DEN_~~MFM_H~~I : DEN_~~MFM_~~LO);
	215	wd17xx_dden_w(state->wd1771, offset ? CLEAR_LINE : ASSERT_LINE);
216	216	}
217	217
218	218	static WRITE8_HANDLER( chrom_w )
r7305	r7306
242	242	/* set internal clocks for asynchronous sio A */
243	243	}
244	244	}
245
	245
246	246	/* Memory Maps */
247	247
248	248	static ADDRESS_MAP_START( xerox820_mem, ADDRESS_SPACE_PROGRAM, 8 )
r7305	r7306
612	612
613	613	static const wd17xx_interface wd1771_intf =
614	614	{
	615	DEVCB_NULL,
615	616	DEVCB_LINE(xerox820_wd1771_intrq_w),
616	617	DEVCB_LINE(xerox820_wd1771_drq_w),
617	618	{FLOPPY_0, FLOPPY_1, NULL, NULL}
r7305	r7306
929	930
930	931	static MACHINE_DRIVER_START( xerox168 )
931	932	MDRV_IMPORT_FROM( xerox820ii )
932
	933
933	934	MDRV_CPU_ADD(I8086_TAG, I8086, 4770000)
934	935	MDRV_CPU_PROGRAM_MAP(xerox168_mem)
935	936

src/mess/drivers/pk8020.c
r7305	r7306
168	168	DO_NOT_KEEP_GEOMETRY
169	169	};
170	170
	171	static const wd17xx_interface pk8020_wd17xx_interface =
	172	{
	173	DEVCB_LINE_VCC,
	174	DEVCB_NULL,
	175	DEVCB_NULL,
	176	{ FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3 }
	177	};
	178
171	179	/* F4 Character Displayer */
172	180	static const gfx_layout pk8020_charlayout =
173	181	{
r7305	r7306
219	227	MDRV_MSM8251_ADD( "rs232", default_msm8251_interface)
220	228	MDRV_MSM8251_ADD( "lan", default_msm8251_interface)
221	229
222		MDRV_WD1793_ADD( "wd1793", ~~default~~_wd17xx_interface )
	230	MDRV_WD1793_ADD( "wd1793", pk8020_wd17xx_interface )
223	231
224	232	/* audio hardware */
225	233	MDRV_SPEAKER_STANDARD_MONO("mono")
r7305	r7306
243	251	ROM_REGION( 0x16000, "maincpu", ROMREGION_ERASEFF )
244	252	ROM_DEFAULT_BIOS("v11")
245	253	ROM_SYSTEM_BIOS(0, "v11", "v1.1")
246		ROMX_LOAD( "korvet11.rom", 0x10000, 0x6000, CRC(81bdc2af) SHA1(c3484c3f1f3d252475979283c073286b8661d2b9), ROM_BIOS(1))
	254	ROMX_LOAD( "korvet11.rom", 0x10000, 0x6000, CRC(81bdc2af) SHA1(c3484c3f1f3d252475979283c073286b8661d2b9), ROM_BIOS(1))
247	255	ROM_SYSTEM_BIOS(1, "v20", "v2.0")
248		ROMX_LOAD( "korvet20.rom", 0x10000, 0x6000, CRC(d6c36a45) SHA1(dba67e63457251814ad5c0fe6bb6d584eea5c7d2), ROM_BIOS(2))
	256	ROMX_LOAD( "korvet20.rom", 0x10000, 0x6000, CRC(d6c36a45) SHA1(dba67e63457251814ad5c0fe6bb6d584eea5c7d2), ROM_BIOS(2))
249	257	ROM_SYSTEM_BIOS(2, "cpm", "cpm")
250	258	ROMX_LOAD( "cpm.rom", 0x10000, 0x4000, CRC(7a38d7f6) SHA1(fec6623291a38990b003e818683cd5edfb494c36), ROM_BIOS(3))
251	259	ROM_REGION( 0x2000, "gfx1", 0 )
r7305	r7306
271	279	ROM_LOAD( "kontur.fnt", 0x0000, 0x2000, CRC(14d33790) SHA1(6d5fcb214805c5fc44ef98a97219158ff7826ac0))
272	280	ROM_END
273	281
274
	282
275	283	/* Driver */
276	284
277	285	/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */

15994 Revisions