src/mess/machine/3do.c
| r6829 | r6830 | |
| 39 | 39 | |
| 40 | 40 | |
| 41 | 41 | typedef struct { |
| 42 | | UINT32 dummy; |
| 42 | UINT32 revision; /* 03400000 */ |
| 43 | UINT32 csysbits; /* 03400004 */ |
| 44 | UINT32 vint0; /* 03400008 */ |
| 45 | UINT32 vint1; /* 0340000c */ |
| 46 | UINT32 audin; /* 03400020 */ |
| 47 | UINT32 audout; /* 03400024 */ |
| 48 | UINT32 cstatbits; /* 03400028 */ |
| 49 | UINT32 wdog; /* 0340002c */ |
| 50 | UINT32 hcnt; /* 03400030 */ |
| 51 | UINT32 vcnt; /* 03400034 */ |
| 52 | UINT32 seed; /* 03400038 */ |
| 53 | UINT32 random; /* 0340004c */ |
| 54 | UINT32 irq0; /* 03400040 / 03400044 */ |
| 55 | UINT32 irq0_enable; /* 03400048 / 0340004c */ |
| 56 | UINT32 mode; /* 03400050 / 03400054 */ |
| 57 | UINT32 badbits; /* 03400058 */ |
| 58 | UINT32 spare; /* 0340005c */ |
| 59 | UINT32 irq1; /* 03400060 / 03400064 */ |
| 60 | UINT32 irq1_enable; /* 03400068 / 0340006c */ |
| 61 | UINT32 hdelay; /* 03400080 */ |
| 62 | UINT32 adbio; /* 03400084 */ |
| 63 | UINT32 adbctl; /* 03400088 */ |
| 43 | 64 | } CLIO; |
| 44 | 65 | |
| 45 | 66 | |
| r6829 | r6830 | |
| 502 | 523 | |
| 503 | 524 | switch( offset ) |
| 504 | 525 | { |
| 505 | | case 0x0a: return 0x40; |
| 506 | | case 0x0d: |
| 526 | case 0x0000/4: |
| 527 | return clio.revision; |
| 528 | case 0x0020/4: |
| 529 | return clio.audin; |
| 530 | case 0x0024/4: |
| 531 | return clio.audout; |
| 532 | case 0x0028/4: |
| 533 | return clio.cstatbits; |
| 534 | case 0x0030/4: |
| 535 | return clio.hcnt; |
| 536 | case 0x0034/4: |
| 507 | 537 | { |
| 508 | 538 | static const UINT32 irq_sequence[3] = { 0, 4, 12 }; |
| 509 | 539 | static int counter = 0; |
| 510 | 540 | |
| 511 | 541 | return irq_sequence[(counter++)%3]; |
| 512 | 542 | } |
| 513 | | break; |
| 543 | return clio.vcnt; |
| 544 | case 0x0038/4: |
| 545 | return clio.seed; |
| 546 | case 0x003c/4: |
| 547 | return clio.random; |
| 548 | case 0x0080/4: |
| 549 | return clio.hdelay; |
| 550 | case 0x0084/4: |
| 551 | return clio.adbio; |
| 552 | case 0x0088/4: |
| 553 | return clio.adbctl; |
| 514 | 554 | } |
| 515 | 555 | return 0; |
| 516 | 556 | } |
| r6829 | r6830 | |
| 521 | 561 | |
| 522 | 562 | switch( offset ) |
| 523 | 563 | { |
| 524 | | case 0x09: /* 03400024 - VDL display control word ? c0020f0f is written here during boot */ |
| 525 | | break; |
| 564 | case 0x0004/4: |
| 565 | clio.csysbits = data; |
| 566 | break; |
| 567 | case 0x0008/4: |
| 568 | clio.vint0 = data; |
| 569 | break; |
| 570 | case 0x000c/4: |
| 571 | clio.vint1 = data; |
| 572 | break; |
| 573 | case 0x0020/4: |
| 574 | clio.audin = data; |
| 575 | break; |
| 576 | case 0x0024/4: /* 03400024 - c0020f0f is written here during boot */ |
| 577 | clio.audout = data; |
| 578 | break; |
| 579 | case 0x0028/4: /* 03400028 - bits 0,1, and 6 are tested (irq sources?) */ |
| 580 | clio.cstatbits = data; |
| 581 | break; |
| 582 | case 0x002c/4: /* 0340002C - ?? during boot 0000000B is written here counter reload related?? */ |
| 583 | clio.wdog = data; |
| 584 | break; |
| 585 | case 0x0030/4: |
| 586 | clio.hcnt = data; |
| 587 | break; |
| 588 | case 0x0034/4: |
| 589 | clio.vcnt = data; |
| 590 | break; |
| 591 | case 0x0038/4: |
| 592 | clio.seed = data; |
| 593 | break; |
| 594 | case 0x0040/4: |
| 595 | clio.irq0 |= data; |
| 596 | break; |
| 597 | case 0x0044/4: |
| 598 | clio.irq0 &= ~data; |
| 599 | break; |
| 600 | case 0x0048/4: |
| 601 | clio.irq0_enable |= data; |
| 602 | break; |
| 603 | case 0x004c/4: |
| 604 | clio.irq0_enable &= ~data; |
| 605 | break; |
| 606 | case 0x0050/4: |
| 607 | clio.mode |= data; |
| 608 | break; |
| 609 | case 0x0054/4: |
| 610 | clio.mode &= ~data; |
| 611 | break; |
| 612 | case 0x0058/4: |
| 613 | clio.badbits = data; |
| 614 | break; |
| 615 | case 0x005c/4: |
| 616 | clio.spare = data; |
| 617 | break; |
| 618 | case 0x0060/4: |
| 619 | clio.irq1 |= data; |
| 620 | break; |
| 621 | case 0x0064/4: |
| 622 | clio.irq1 &= ~data; |
| 623 | break; |
| 624 | case 0x0068/4: |
| 625 | clio.irq1_enable |= data; |
| 626 | break; |
| 627 | case 0x006c/4: |
| 628 | clio.irq1_enable &= ~data; |
| 629 | break; |
| 630 | case 0x0080/4: |
| 631 | clio.hdelay = data; |
| 632 | break; |
| 633 | case 0x0084/4: |
| 634 | clio.adbio = data; |
| 635 | break; |
| 636 | case 0x0088/4: |
| 637 | clio.adbctl = data; |
| 638 | break; |
| 526 | 639 | |
| 527 | | case 0x0A: /* 03400028 - bits 0,1, and 6 are tested (irq sources?) */ |
| 528 | | break; |
| 529 | | |
| 530 | | case 0x0B: /* 0340002C - ?? during boot 0000000B is written here counter reload related?? */ |
| 531 | | break; |
| 532 | | |
| 533 | | case 0x88: /* set timer frequency */ |
| 534 | | break; |
| 640 | case 0x88: /* set timer frequency */ |
| 641 | break; |
| 535 | 642 | } |
| 536 | 643 | } |
| 537 | 644 | |
| 538 | 645 | void _3do_clio_init( void ) |
| 539 | 646 | { |
| 540 | 647 | memset( &clio, 0, sizeof(CLIO) ); |
| 648 | clio.revision = 0x02022000; |
| 649 | clio.cstatbits = 0x40; |
| 541 | 650 | } |
| 542 | 651 | |