Previous

15994 Revisions

Next

r6741 Friday 25th December, 2009 at 04:22:44 UTC by Nathan Woods
Updated to MAME 0.135u4 core

[ROOT]	makefile
[docs]	messnew.txt
[src/emu]	clifront.c clifront.h deprecat.h drawgfx.c drawgfx.h emu.mak inptport.c inptport.h mame.c mame.h memory.c profiler.c profiler.h restrack.c restrack.h romload.c state.c state.h tilemap.c tilemap.h timer.c video.c
[src/emu/cpu]	cpu.mak drcbec.c drcbex64.c drcbex86.c drcuml.c drcuml.h drcumlsh.h x86emit.h
[src/emu/cpu/i386]	i386op16.c
[src/emu/cpu/mips]	mips3drc.c
[src/emu/cpu/pic16c62x]	16c62xdsm.c* dis16c62x.c* pic16c62x.c* pic16c62x.h*
[src/emu/cpu/powerpc]	ppcdrc.c
[src/emu/cpu/rsp]	rspdrc.c rspfe.c
[src/emu/cpu/sh2]	sh2drc.c
[src/emu/cpu/v810]	v810.c
[src/emu/cpu/z180]	z180.c
[src/emu/debug]	debugvw.c
[src/emu/machine]	68681.c 74148.c 74148.h 74153.c 74153.h 7474.c 7474.h 8237dma.c ds2404.c ds2404.h eepromdev.c intelfsh.c mb14241.c* mb14241.h* rtc65271.c rtc65271.h tmp68301.c tmp68301.h
[src/emu/sound]	cdp1864.c disc_inp.c discrete.h fm.c fm2612.c ics2115.c k056800.c* k056800.h* sound.mak tms5110.c
[src/emu/video]	generic.c mc6845.c s2636.c saa5050.c v9938.c
[src/lib/util]	pool.c
[src/mame]	mame.mak mamedriv.c
[src/mame/audio]	8080bw.c atarifb.c avalnche.c aztarac.c bsktball.c bzone.c cage.c canyon.c cchasm.c cinemat.c circus.c crbaloon.c dcs.c dkong.c dragrace.c exidy.c exidy440.c firetrk.c galaga.c grchamp.c gridlee.c harddriv.c hitme.c jaguar.c jedi.c leland.c llander.c m72.c m72.h m79amb.c madalien.c meadows.c mw8080bw.c n8080.c nitedrvr.c norautp.c orbit.c phoenix.c polepos.c poolshrk.c qix.c redalert.c redbaron.c scramble.c segag80r.c segag80v.c segasnd.c skydiver.c skyraid.c snk6502.c sprint2.c sprint4.c sprint8.c starshp1.c subs.c taito_en.c taito_en.h tank8.c targ.c triplhnt.c turbo.c vicdual.c videopin.c
[src/mame/drivers]	1942.c 1943.c 20pacgal.c 4roses.c 8080bw.c 88games.c acefruit.c actfancr.c aeroboto.c airbustr.c ajax.c aleck64.c aliens.c amaticmg.c ambush.c angelkds.c appoooh.c arabian.c arcadecl.c arkanoid.c artmagic.c ashnojoe.c asterix.c asteroid.c astrof.c asuka.c atarifb.c atarig1.c atarig42.c atarigt.c atarigx2.c atarisy1.c atarisy2.c ataxx.c atetris.c avalnche.c aztarac.c backfire.c badlands.c bagman.c balsente.c bankp.c batman.c battlane.c battlex.c battlnts.c beathead.c berzerk.c bfcobra.c bionicc.c bishi.c bishjan.c bladestl.c blktiger.c blmbycar.c blockhl.c blockout.c bloodbro.c blstroid.c blueprnt.c bmcbowl.c bogeyman.c bombjack.c boogwing.c bottom9.c brkthru.c bsktball.c btoads.c bwing.c bzone.c calomega.c canyon.c capbowl.c cardline.c carjmbre.c carpolo.c carrera.c cave.c cb2001.c cbasebal.c cbuster.c ccastles.c cchasm.c centiped.c champbas.c cheekyms.c chihiro.c chinagat.c chinsan.c chqflag.c cidelsa.c cinemat.c circus.c circusc.c cischeat.c citycon.c cloud9.c cninja.c cojag.c combatsc.c commando.c compgolf.c contra.c coolpool.c coolridr.c cop01.c copsnrob.c cosmic.c cowrace.c cps1.c cps2.c crbaloon.c crgolf.c crimfght.c crospang.c crshrace.c cvs.c cyberbal.c dambustr.c darkhors.c dassault.c dblewing.c dbz.c dcheese.c dday.c ddragon.c ddragon3.c dec0.c deco156.c deco32.c deco_mlc.c deniam.c dietgo.c djboy.c djmain.c dogfgt.c dragrace.c dribling.c drmicro.c eolith.c eolith16.c epos.c eprom.c equites.c esd16.c espial.c esripsys.c exedexes.c exerion.c exidy.c exidy440.c exprraid.c exterm.c exzisus.c f1gp.c fantland.c fastfred.c fastlane.c fcombat.c fcrash.c fgoal.c finalizr.c firebeat.c firetrap.c firetrk.c flkatck.c foodf.c freekick.c funkybee.c funkyjet.c funworld.c funybubl.c fuukifg2.c fuukifg3.c gaelco3d.c gaiden.c gal3.c galaga.c galastrm.c galaxia.c galaxian.c galaxold.c galpani2.c galpani3.c gameplan.c gauntlet.c gbusters.c gei.c ggconnie.c gijoe.c goldnpkr.c goldstar.c gomoku.c gottlieb.c gradius3.c grchamp.c gridlee.c groundfx.c gstriker.c gticlub.c gunbustr.c halleys.c harddriv.c hcastle.c hexa.c hexion.c hitpoker.c hng64.c homedata.c hornet.c hvyunit.c hyhoo.c iqblock.c irobot.c itech32.c itech8.c janshi.c jchan.c jedi.c jokrwild.c jpmimpct.c jrpacman.c klax.c koftball.c koikoi.c konamigq.c konamigv.c konamigx.c labyrunr.c laserbat.c leland.c lethal.c lethalj.c liberate.c liberatr.c lockon.c lordgun.c luckgrln.c lvcards.c m10.c m107.c m52.c m57.c m58.c m62.c m72.c m79amb.c m90.c m92.c macs.c madalien.c magicfly.c mainevt.c mainsnk.c malzak.c mario.c matmania.c maxaflex.c mcr.c mcr3.c mcr68.c meadows.c mediagx.c megadriv.c megadriv.h megasys1.c megazone.c merit.c mermaid.c metro.c mhavoc.c midtunit.c midvunit.c midwunit.c midxunit.c midyunit.c midzeus.c mikie.c miniboy7.c mirage.c mirax.c mitchell.c model1.c model2.c mogura.c moo.c mouser.c mrjong.c mw8080bw.c mystston.c mystwarr.c namcofl.c namcoic.c namcona1.c namconb1.c namcond1.c namcos2.c namcos21.c namcos22.c naomi.c nbmj8688.c nbmj8891.c nbmj8900.c nbmj8991.c nbmj9195.c nemesis.c neodrvr.c neogeo.c news.c ninjakd2.c ninjaw.c nitedrvr.c niyanpai.c norautp.c nova2001.c nwk-tr.c offtwall.c olibochu.c opwolf.c orbit.c othunder.c overdriv.c pacman.c pandoras.c paradise.c parodius.c pastelg.c pbaction.c pengo.c pgm.c phoenix.c pingpong.c pirates.c pkscram.c pktgaldx.c plygonet.c polepos.c policetr.c polyplay.c poolshrk.c popeye.c popper.c psikyo.c psikyo4.c psikyosh.c qix.c quasar.c rainbow.c rampart.c rastan.c realbrk.c redalert.c relief.c rmhaihai.c rockrage.c rohga.c rollerg.c rollrace.c rungun.c sbowling.c scobra.c scotrsht.c scramble.c segac2.c segag80r.c segag80v.c segahang.c segamsys.c segaorun.c segas16a.c segas16b.c segas18.c segas24.c segas32.c segaxbd.c segaybd.c seibuspi.c seicross.c seta.c seta2.c sf.c shaolins.c shisen.c shuuz.c sidearms.c sidepckt.c simpl156.c simpsons.c skullxbo.c skyarmy.c skydiver.c skyraid.c slapfght.c sliver.c sms.c snk.c snk6502.c snookr10.c solomon.c spacefb.c spcforce.c speedatk.c speglsht.c spiders.c spool99.c sprint2.c sprint8.c spy.c srmp5.c ssozumo.c sspeedr.c ssv.c st0016.c stactics.c starwars.c stv.c subs.c subsino.c suna8.c supbtime.c superchs.c suprnova.c suprridr.c suprslam.c surpratk.c system16.c tagteam.c tail2nos.c taito_b.c taito_f2.c taito_f3.c taito_h.c taito_l.c taito_x.c taito_z.c taitoair.c taitojc.c tank8.c tankbust.c tatsumi.c tattack.c taxidrvr.c tceptor.c tecmosys.c tehkanwc.c thedeep.c thunderj.c thunderx.c tickee.c tmnt.c tnzs.c toaplan1.c toaplan2.c toobin.c topspeed.c toratora.c tourtabl.c tp84.c triforce.c triplhnt.c trucocl.c trvmadns.c trvquest.c tsamurai.c tubep.c tumbleb.c tumblep.c turbo.c twin16.c twincobr.c twinkle.c tx1.c ultraman.c ultratnk.c ultrsprt.c undrfire.c unico.c vaportra.c vegaeo.c vendetta.c vertigo.c vicdual.c victory.c videopin.c videopkr.c vigilant.c vindictr.c volfied.c vroulet.c wardner.c warpwarp.c warriorb.c wecleman.c wgp.c wheelfir.c williams.c wiping.c wiz.c wwfwfest.c xexex.c xmen.c xtheball.c xybots.c yunsun16.c zerozone.c zr107.c
[src/mame/includes]	88games.h* airbustr.h* atarisy1.h bagman.h balsente.h battlnts.h* beathead.h bladestl.h* carpolo.h cbasebal.h* combatsc.h* contra.h* cps1.h crshrace.h cvs.h djboy.h* f1gp.h fastlane.h* fgoal.h flkatck.h* foodf.h galaga.h galaxold.h gameplan.h harddriv.h hcastle.h* hng64.h irobot.h jaguar.h labyrunr.h* malzak.h* matmania.h mhavoc.h mitchell.h* model1.h mw8080bw.h neogeo.h nitedrvr.h pacman.h pgm.h psikyo.h* psikyo4.h* psikyosh.h rockrage.h* sf.h* simpsons.h slapfght.h snk6502.h suprslam.h* timeplt.h tmnt.h vertigo.h williams.h wiping.h xmen.h xybots.h
[src/mame/machine]	acitya.c ajax.c arkanoid.c asteroid.c atarifb.c atarigen.c atarigen.h balsente.c bsktball.c carpolo.c cchasm.c copsnrob.c cps2crpt.c dc.c dec0.c deco102.c decocrpt.c decoprot.c galaxold.c harddriv.c irobot.c konamigx.c leland.c mcr.c mhavoc.c midtunit.c midwunit.c midyunit.c model1.c mw8080bw.c n64.c namcond1.c naomibd.c nb1413m3.c neoboot.c neocrypt.c neoprot.c nitedrvr.c pgmprot.c qix.c segag80.c segas24.c segas32.c simpsons.c slapstic.c slikshot.c snes.c starwars.c stvcd.c stvcd.h subs.c system16.c tatsumi.c tecmosys.c theglobp.c ticket.c ticket.h twincobr.c tx1.c vertigo.c williams.c wrally.c xevious.c
[src/mame/video]	1942.c 1943.c 20pacgal.c 8080bw.c 88games.c actfancr.c aeroboto.c airbustr.c ajax.c aliens.c ambush.c angelkds.c appoooh.c arabian.c arcadecl.c artmagic.c ashnojoe.c asterix.c atarig1.c atarig42.c atarigt.c atarigx2.c atarimo.c atarisy1.c atarisy2.c atetris.c aztarac.c badlands.c bagman.c balsente.c bankp.c batman.c battlane.c battlex.c battlnts.c beathead.c bionicc.c bishi.c bladestl.c blktiger.c blmbycar.c blockhl.c blockout.c blstroid.c blueprnt.c bogeyman.c bombjack.c boogwing.c bottom9.c brkthru.c bsktball.c btoads.c bwing.c calomega.c capbowl.c carjmbre.c carpolo.c cave.c cbasebal.c cbuster.c ccastles.c cchasm.c centiped.c champbas.c cheekyms.c chqflag.c cidelsa.c cinemat.c circus.c circusc.c cischeat.c citycon.c cloak.c cloud9.c cninja.c combatsc.c commando.c compgolf.c contra.c cop01.c copsnrob.c cosmic.c cps1.c crgolf.c crimfght.c crospang.c crshrace.c cvs.c cyberbal.c dassault.c dbz.c dc.c dcheese.c dday.c ddragon.c ddragon3.c deco16ic.c deco32.c deniam.c dietgo.c djboy.c djmain.c dogfgt.c dribling.c drmicro.c epos.c eprom.c equites.c esd16.c esripsys.c exedexes.c exerion.c exidy.c exidy440.c exprraid.c exterm.c f1gp.c fastfred.c fastlane.c fcombat.c finalizr.c firetrap.c firetrk.c flkatck.c foodf.c freekick.c funkybee.c funkyjet.c funworld.c funybubl.c fuukifg2.c fuukifg3.c gaelco.c gaelco3d.c gaiden.c galpani2.c gameplan.c gauntlet.c gbusters.c genesis.c gijoe.c goldstar.c gottlieb.c gradius3.c gstriker.c harddriv.c hcastle.c hexa.c hng64.c homedata.c hyhoo.c iqblock.c irobot.c itech32.c itech8.c jedi.c jpmimpct.c kaneko16.c klax.c konamigx.c konicdev.c* konicdev.h* labyrunr.c leland.c lethal.c lethalj.c liberate.c liberatr.c lockon.c lordgun.c lvcards.c m10.c m107.c m72.c madalien.c mainevt.c malzak.c matmania.c mcr.c mcr3.c mcr68.c meadows.c megasys1.c megazone.c mermaid.c metro.c midtunit.c midvunit.c midyunit.c mikie.c mitchell.c moo.c mouser.c mrjong.c mw8080bw.c mystston.c mystwarr.c n64.c namcofl.c namcona1.c namconb1.c namcos2.c namcos21.c namcos22.c nbmj8688.c nbmj8891.c nbmj8900.c nbmj8991.c neogeo.c news.c ninjakd2.c nova2001.c offtwall.c overdriv.c pacman.c pandoras.c paradise.c parodius.c pastelg.c pbaction.c pgm.c phoenix.c pingpong.c pktgaldx.c plygonet.c policetr.c popeye.c popper.c psikyo.c psikyo4.c psikyosh.c psx.c qix.c quasar.c rallyx.c rampart.c rdpupd16.c realbrk.c redalert.c relief.c rockrage.c rohga.c rollerg.c rollrace.c rungun.c scotrsht.c segag80r.c segas32.c seicross.c seta.c seta2.c sf.c shaolins.c shuuz.c sidearms.c sidepckt.c simpl156.c simpsons.c skydiver.c slapfght.c snes.c snk.c snk6502.c snookr10.c solomon.c spacefb.c spcforce.c speedatk.c spy.c ssozumo.c ssv.c st0016.c stactics.c starfire.c stvvdp2.c subs.c supbtime.c suprridr.c suprslam.c surpratk.c system16.c tagteam.c tail2nos.c taito_f3.c tank8.c tankbust.c tatsumi.c taxidrvr.c tceptor.c tehkanwc.c thedeep.c thunderx.c tmnt.c toaplan1.c toobin.c triplhnt.c trucocl.c tsamurai.c tumblep.c turbo.c twincobr.c tx1.c ultraman.c ultratnk.c unico.c vaportra.c vendetta.c vertigo.c victory.c vindictr.c warpwarp.c wecleman.c williams.c wiping.c xexex.c xmen.c ygv608.c yunsun16.c zerozone.c
[src/mess]	mess.mak
[src/mess/drivers]	aquarius.c cgenie.c geneve.c jaguar.c ng_aes.c ti99_4p.c ti99_4x.c ti99_8.c x1.c
[src/mess/includes]	aquarius.h cgenie.h geneve.h mz700.h
[src/mess/machine]	99_ide.c cgenie.c geneve.c mz700.c super80.c ti99_4x.c ti99_4x.h
[src/mess/video]	aquarius.c cgenie.c mbee.c mz700.c super80.c
[src/osd/windows]	winmain.c winmain.h winwork.c
[src/tools]	src2html.c srcclean.c unidasm.c

src/mame/audio/cchasm.c

r6740	r6741
8	8	#include "streams.h"
9	9	#include "cpu/z80/z80.h"
10	10	#include "machine/z80ctc.h"
11		#include "cchasm.h"
	11	#include "includes/cchasm.h"
12	12	#include "sound/ay8910.h"
13	13	#include "sound/dac.h"
14	14

src/mame/audio/skydiver.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "skydiver.h"
	7	#include "includes/skydiver.h"
8	8	#include "sound/discrete.h"
9	9
10	10
r6740	r6741
123	123	/* frequency, then decays at the rate set by    */
124	124	/* a 68k resistor and 22uf capacitor.           */
125	125	/************************************************/
126		DISCRETE_ADJUSTMENT_TAG(NODE_30, 250000, 50000, DISC_LINADJ, "WHISTLE1")   /* R66 */
	126	DISCRETE_ADJUSTMENT(NODE_30, 250000, 50000, DISC_LINADJ, "WHISTLE1")   /* R66 */
127	127	DISCRETE_MULTADD(NODE_31, SKYDIVER_WHISTLE1_EN, 3.05-0.33, 0.33)
128	128	DISCRETE_RCDISC2(NODE_32, SKYDIVER_WHISTLE1_EN, NODE_31, 1.0, NODE_31, 68000.0, 2.2e-5)   /* CV */
129	129	DISCRETE_SWITCH(NODE_33, 1, SKYDIVER_OCT1_EN, 1e-8, 1e-8 + 3.3e-9)   /* Cap C73 & C58 */
130	130	DISCRETE_555_ASTABLE_CV(NODE_34, SKYDIVER_WHISTLE1_EN, 100000, NODE_30, NODE_33, NODE_32, &skydiverWhistl555)
131	131	DISCRETE_MULTIPLY(SKYDIVER_WHISTLE1_SND, NODE_34, 228.5/3.3)
132	132
133		DISCRETE_ADJUSTMENT_TAG(NODE_35, 250000, 50000, DISC_LINADJ, "WHISTLE2")   /* R65 */
	133	DISCRETE_ADJUSTMENT(NODE_35, 250000, 50000, DISC_LINADJ, "WHISTLE2")   /* R65 */
134	134	DISCRETE_MULTADD(NODE_36, SKYDIVER_WHISTLE2_EN, 3.05-0.33, 0.33)
135	135	DISCRETE_RCDISC2(NODE_37, SKYDIVER_WHISTLE2_EN, NODE_36, 1.0, NODE_36, 68000.0, 2.2e-5)   /* CV */
136	136	DISCRETE_SWITCH(NODE_38, 1, SKYDIVER_OCT2_EN, 1e-8, 1e-8 + 3.3e-9)   /* Cap C72 & C59 */

src/mame/audio/qix.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "cpu/m6800/m6800.h"
9	9	#include "cpu/m6809/m6809.h"
10		#include "qix.h"
	10	#include "includes/qix.h"
11	11	#include "sound/sn76496.h"
12	12	#include "sound/discrete.h"
13	13

src/mame/audio/jaguar.c

r6740	r6741
166	166	static UINT16 dsp_regs[DSP_REGS];
167	167
168	168	static UINT16 serial_frequency;
169		static emu_timer *serial_timer;
170	169
171	170	static UINT8 gpu_irq_state;
172	171
173	172	#if ENABLE_SPEEDUP_HACKS
174
175		static TIMER_CALLBACK( serial_chunky_callback );
176	173	static WRITE32_HANDLER( dsp_flags_w );
177
178		#else
179
180		static TIMER_CALLBACK( serial_callback );
181
182	174	#endif
183	175
184	176
r6740	r6741
278	270
279	271	/*************************************
280	272	*
281		*  Sound reset
282		*
283		*************************************/
284
285		void cojag_sound_reset(running_machine *machine)
286		{
287		#if ENABLE_SPEEDUP_HACKS
288		serial_timer = timer_alloc(machine, serial_chunky_callback, NULL);
289		#else
290		serial_timer = timer_alloc(machine, serial_callback, NULL);
291		#endif
292		}
293
294
295
296		/*************************************
297		*
298	273	*  Jerry 16-bit register access
299	274	*
300	275	*************************************/
r6740	r6741
390	365
391	366	#if ENABLE_SPEEDUP_HACKS
392	367
393		static TIMER_CALLBACK( serial_chunky_callback )
	368	TIMER_DEVICE_CALLBACK( jaguar_serial_callback )
394	369	{
395	370	/* assert the A2S IRQ on CPU #2 (DSP) */
396		cputag_set_input_line(machine, "audiocpu", 1, ASSERT_LINE);
397		jaguar_dsp_resume(machine);
	371	cputag_set_input_line(timer->machine, "audiocpu", 1, ASSERT_LINE);
	372	jaguar_dsp_resume(timer->machine);
398	373
399	374	/* fix flaky code in interrupt handler which thwarts our speedup */
400	375	if ((jaguar_dsp_ram[0x3e/4] & 0xffff) == 0xbfbc &&
r6740	r6741
409	384
410	385	#else
411	386
412		static TIMER_CALLBACK( serial_callback )
	387	TIMER_DEVICE_CALLBACK( jaguar_serial_callback )
413	388	{
414	389	/* assert the A2S IRQ on CPU #2 (DSP) */
415		cputag_set_input_line(machine, "audiocpu", 1, ASSERT_LINE);
416		jaguar_dsp_resume(machine);
	390	cputag_set_input_line(timer->machine, "audiocpu", 1, ASSERT_LINE);
	391	jaguar_dsp_resume(timer->machine);
417	392	}
418	393
419	394	#endif
r6740	r6741
459	434	if ((data & 0x3f) == 0x15)
460	435	{
461	436	attotime rate = attotime_mul(ATTOTIME_IN_HZ(26000000), 32 * 2 * (serial_frequency + 1));
462		timer_adjust_periodic(serial_timer, rate, 0, rate);
	437	timer_device_adjust_periodic(devtag_get_device(space->machine, "serial_timer"), rate, 0, rate);
463	438	}
464	439	break;
465	440

src/mame/audio/phoenix.c

r6740	r6741
11	11	#include "driver.h"
12	12	#include "streams.h"
13	13	#include "sound/tms36xx.h"
14		#include "phoenix.h"
	14	#include "includes/phoenix.h"
15	15
16	16	/****************************************************************************
17	17	* 4006

src/mame/audio/n8080.c

r6740	r6741
435	435	}
436	436
437	437
438		static TIMER_CALLBACK( spacefev_vco_voltage_timer )
	438	static TIMER_DEVICE_CALLBACK( spacefev_vco_voltage_timer )
439	439	{
440		const device_config *sn = devtag_get_device(machine, "snsnd");
441		n8080_state *state = (n8080_state *)machine->driver_data;
	440	const device_config *sn = devtag_get_device(timer->machine, "snsnd");
	441	n8080_state *state = (n8080_state *)timer->machine->driver_data;
442	442	double voltage = 0;
443	443
444	444	if (state->mono_flop[2])
r6740	r6741
450	450	}
451	451
452	452
453		static TIMER_CALLBACK( helifire_dac_volume_timer )
	453	static TIMER_DEVICE_CALLBACK( helifire_dac_volume_timer )
454	454	{
455		n8080_state *state = (n8080_state *)machine->driver_data;
456		double t = state->helifire_dac_timing - attotime_to_double(timer_get_time(machine));
	455	n8080_state *state = (n8080_state *)timer->machine->driver_data;
	456	double t = state->helifire_dac_timing - attotime_to_double(timer_get_time(timer->machine));
457	457
458	458	if (state->helifire_dac_phase)
459	459	{
r6740	r6741
486	486	n8080_state *state = (n8080_state *)machine->driver_data;
487	487	state->n8080_hardware = 1;
488	488
489		timer_pulse(machine, ATTOTIME_IN_HZ(1000), NULL, 0, spacefev_vco_voltage_timer);
490
491	489	state->mono_flop[0] = 0;
492	490	state->mono_flop[1] = 0;
493	491	state->mono_flop[2] = 0;
r6740	r6741
548	546	n8080_state *state = (n8080_state *)machine->driver_data;
549	547	state->n8080_hardware = 3;
550	548
551		timer_pulse(machine, ATTOTIME_IN_HZ(1000), NULL, 0, helifire_dac_volume_timer);
552
553	549	state->helifire_dac_volume = 1;
554	550	state->helifire_dac_timing = 0;
555	551	state->helifire_dac_phase = 0;
r6740	r6741
596	592	MDRV_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
597	593	MDRV_CPU_IO_MAP(n8080_sound_io_map)
598	594
	595	MDRV_TIMER_ADD_PERIODIC("vco_timer", spacefev_vco_voltage_timer, HZ(1000))
	596
599	597	/* sound hardware */
600	598	MDRV_SPEAKER_STANDARD_MONO("mono")
601	599
r6740	r6741
634	632	MDRV_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
635	633	MDRV_CPU_IO_MAP(helifire_sound_io_map)
636	634
	635	MDRV_TIMER_ADD_PERIODIC("helifire_dac", helifire_dac_volume_timer, HZ(1000) )
	636
637	637	/* sound hardware */
638	638	MDRV_SPEAKER_STANDARD_MONO("mono")
639	639

src/mame/audio/cinemat.c

r6740	r6741
21	21	#include "cpu/ccpu/ccpu.h"
22	22	#include "cpu/z80/z80daisy.h"
23	23	#include "machine/z80ctc.h"
24		#include "cinemat.h"
	24	#include "includes/cinemat.h"
25	25	#include "sound/samples.h"
26	26	#include "sound/ay8910.h"
27	27
r6740	r6741
96	96	*
97	97	*************************************/
98	98
	99	static MACHINE_START( generic )
	100	{
	101	/* register for save states */
	102	state_save_register_global(machine, sound_control);
	103	state_save_register_global(machine, current_shift);
	104	state_save_register_global(machine, last_shift);
	105	state_save_register_global(machine, last_shift2);
	106	state_save_register_global(machine, current_pitch);
	107	state_save_register_global(machine, last_frame);
	108	state_save_register_global_array(machine, sound_fifo);
	109	state_save_register_global(machine, sound_fifo_in);
	110	state_save_register_global(machine, sound_fifo_out);
	111	state_save_register_global(machine, last_portb_write);
	112	}
	113
	114
99	115	static void generic_init(running_machine *machine, void (*callback)(running_machine *,UINT8, UINT8))
100	116	{
101	117	/* call the standard init */
r6740	r6741
117	133
118	134	/* reset Star Castle pitch */
119	135	current_pitch = 0x10000;
120
121		/* register for save states */
122		state_save_register_global(machine, sound_control);
123		state_save_register_global(machine, current_shift);
124		state_save_register_global(machine, last_shift);
125		state_save_register_global(machine, last_shift2);
126		state_save_register_global(machine, current_pitch);
127		state_save_register_global(machine, last_frame);
128		state_save_register_global_array(machine, sound_fifo);
129		state_save_register_global(machine, sound_fifo_in);
130		state_save_register_global(machine, sound_fifo_out);
131		state_save_register_global(machine, last_portb_write);
132	136	}
133	137
134	138
r6740	r6741
206	210	}
207	211
208	212	MACHINE_DRIVER_START( spacewar_sound )
	213	MDRV_MACHINE_START(generic)
209	214	MDRV_MACHINE_RESET(spacewar)
210	215
211	216	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
261	266	}
262	267
263	268	MACHINE_DRIVER_START( barrier_sound )
	269	MDRV_MACHINE_START(generic)
264	270	MDRV_MACHINE_RESET(barrier)
265	271
266	272	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
321	327	}
322	328
323	329	MACHINE_DRIVER_START( speedfrk_sound )
	330	MDRV_MACHINE_START(generic)
324	331	MDRV_MACHINE_RESET(speedfrk)
325	332
326	333	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
397	404	}
398	405
399	406	MACHINE_DRIVER_START( starhawk_sound )
	407	MDRV_MACHINE_START(generic)
400	408	MDRV_MACHINE_RESET(starhawk)
401	409
402	410	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
467	475	}
468	476
469	477	MACHINE_DRIVER_START( sundance_sound )
	478	MDRV_MACHINE_START(generic)
470	479	MDRV_MACHINE_RESET(sundance)
471	480
472	481	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
556	565	}
557	566
558	567	MACHINE_DRIVER_START( tailg_sound )
	568	MDRV_MACHINE_START(generic)
559	569	MDRV_MACHINE_RESET(tailg)
560	570
561	571	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
625	635	}
626	636
627	637	MACHINE_DRIVER_START( warrior_sound )
	638	MDRV_MACHINE_START(generic)
628	639	MDRV_MACHINE_RESET(warrior)
629	640
630	641	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
720	731	}
721	732
722	733	MACHINE_DRIVER_START( armora_sound )
	734	MDRV_MACHINE_START(generic)
723	735	MDRV_MACHINE_RESET(armora)
724	736
725	737	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
812	824	}
813	825
814	826	MACHINE_DRIVER_START( ripoff_sound )
	827	MDRV_MACHINE_START(generic)
815	828	MDRV_MACHINE_RESET(ripoff)
816	829
817	830	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
925	938	}
926	939
927	940	MACHINE_DRIVER_START( starcas_sound )
	941	MDRV_MACHINE_START(generic)
928	942	MDRV_MACHINE_RESET(starcas)
929	943
930	944	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
1061	1075	}
1062	1076
1063	1077	MACHINE_DRIVER_START( solarq_sound )
	1078	MDRV_MACHINE_START(generic)
1064	1079	MDRV_MACHINE_RESET(solarq)
1065	1080
1066	1081	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
1196	1211	}
1197	1212
1198	1213	MACHINE_DRIVER_START( boxingb_sound )
	1214	MDRV_MACHINE_START(generic)
1199	1215	MDRV_MACHINE_RESET(boxingb)
1200	1216
1201	1217	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
1309	1325	}
1310	1326
1311	1327	MACHINE_DRIVER_START( wotw_sound )
	1328	MDRV_MACHINE_START(generic)
1312	1329	MDRV_MACHINE_RESET(wotw)
1313	1330
1314	1331	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
1422	1439	}
1423	1440
1424	1441	MACHINE_DRIVER_START( wotwc_sound )
	1442	MDRV_MACHINE_START(generic)
1425	1443	MDRV_MACHINE_RESET(wotwc)
1426	1444
1427	1445	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
1577	1595
1578	1596	MDRV_Z80CTC_ADD("ctc", 3579545 /* same as "audiocpu" */, demon_z80ctc_interface)
1579	1597
	1598	MDRV_MACHINE_START(generic)
1580	1599	MDRV_MACHINE_RESET(demon_sound)
1581	1600
1582	1601	/* sound hardware */

src/mame/audio/llander.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "asteroid.h"
	8	#include "includes/asteroid.h"
9	9	#include "sound/discrete.h"
10	10
11	11	/************************************************************************/

src/mame/audio/grchamp.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "grchamp.h"
	7	#include "includes/grchamp.h"
8	8
9	9
10	10	/************************************************************************/

src/mame/audio/avalnche.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "avalnche.h"
	7	#include "includes/avalnche.h"
8	8	#include "sound/discrete.h"
9	9
10	10

src/mame/audio/canyon.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "canyon.h"
	7	#include "includes/canyon.h"
8	8	#include "sound/discrete.h"
9	9
10	10
r6740	r6741
123	123	/* 0k = 214Hz.   250k = 4416Hz                  */
124	124	/************************************************/
125	125	DISCRETE_RCFILTER(NODE_20, CANYON_MOTOR1_DATA, 123000, 1e-6)
126		DISCRETE_ADJUSTMENT_TAG(NODE_21, (214.0-27.0)/12/15, (4416.0-27.0)/12/15, DISC_LOGADJ, "MOTOR1")
	126	DISCRETE_ADJUSTMENT(NODE_21, (214.0-27.0)/12/15, (4416.0-27.0)/12/15, DISC_LOGADJ, "MOTOR1")
127	127	DISCRETE_MULTIPLY(NODE_22, NODE_20, NODE_21)
128	128
129	129	DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6)   /* F1 = /12*2 = /6 */
r6740	r6741
146	146	/* it to sound different from motor 1.          */
147	147	/************************************************/
148	148	DISCRETE_RCFILTER(NODE_40, CANYON_MOTOR2_DATA, 123000, 1e-6)
149		DISCRETE_ADJUSTMENT_TAG(NODE_41, (214.0-27.0)/12/15, (4416.0-27.0)/12/15, DISC_LOGADJ, "MOTOR2")
	149	DISCRETE_ADJUSTMENT(NODE_41, (214.0-27.0)/12/15, (4416.0-27.0)/12/15, DISC_LOGADJ, "MOTOR2")
150	150	DISCRETE_MULTIPLY(NODE_42, NODE_40, NODE_41)
151	151
152	152	DISCRETE_MULTADD(NODE_43, NODE_42, 2, 27.0/6)   /* F1 = /12*2 = /6 */
r6740	r6741
187	187	/* frequency, then decays at the rate set by    */
188	188	/* a 68k resistor and 22uf capacitor.           */
189	189	/************************************************/
190		DISCRETE_ADJUSTMENT_TAG(NODE_70, 50000, 100000, DISC_LINADJ, "WHISTLE1")   /* R59 */
	190	DISCRETE_ADJUSTMENT(NODE_70, 50000, 100000, DISC_LINADJ, "WHISTLE1")   /* R59 */
191	191	DISCRETE_MULTADD(NODE_71, CANYON_WHISTLE1_EN, 3.05-0.33, 0.33)
192	192	DISCRETE_RCDISC2(NODE_72, CANYON_WHISTLE1_EN, NODE_71, 1.0, NODE_71, 68000.0, 2.2e-5)   /* CV */
193	193	DISCRETE_555_ASTABLE_CV(NODE_73, CANYON_WHISTLE1_EN, 33000, NODE_70, 1e-8, NODE_72, &canyonWhistl555)
194	194	DISCRETE_MULTIPLY(CANYON_WHISTLESND1, NODE_73, 519.4/3.3)
195	195
196		DISCRETE_ADJUSTMENT_TAG(NODE_75, 50000, 100000, DISC_LINADJ, "WHISTLE2")   /* R69 */
	196	DISCRETE_ADJUSTMENT(NODE_75, 50000, 100000, DISC_LINADJ, "WHISTLE2")   /* R69 */
197	197	DISCRETE_MULTADD(NODE_76, CANYON_WHISTLE2_EN, 3.05-0.33, 0.33)
198	198	DISCRETE_RCDISC2(NODE_77, CANYON_WHISTLE2_EN, NODE_76, 1.0, NODE_76, 68000.0, 2.2e-5)   /* CV */
199	199	DISCRETE_555_ASTABLE_CV(NODE_78, CANYON_WHISTLE2_EN, 33000, NODE_75, 1e-8, NODE_77, &canyonWhistl555)

src/mame/audio/circus.c

r6740	r6741
1	1	#include "driver.h"
2	2	#include "sound/samples.h"
3		#include "circus.h"
	3	#include "includes/circus.h"
4	4
5	5	static const char *const circus_sample_names[] =
6	6	{
r6740	r6741
122	122	DISCRETE_INPUT_LOGIC(CRASH_MUSIC_BIT)
123	123	DISCRETE_INPUT_PULSE(CRASH_BEEPER_EN, 1)
124	124
125		DISCRETE_ADJUSTMENT_TAG(CRASH_R63, 0, 5.0*RES_K(100)/(RES_K(47+100))-0.5, DISC_LINADJ, "R63")
126		DISCRETE_ADJUSTMENT_TAG(CRASH_R39, 0, 1, DISC_LINADJ, "R39")
	125	DISCRETE_ADJUSTMENT(CRASH_R63, 0, 5.0*RES_K(100)/(RES_K(47+100))-0.5, DISC_LINADJ, "R63")
	126	DISCRETE_ADJUSTMENT(CRASH_R39, 0, 1, DISC_LINADJ, "R39")
127	127
128	128	/************************************************/
129	129	/* Music is just a 1 bit DAC                    */

src/mame/audio/norautp.c

r6740	r6741
4	4	************************************************************************/
5	5
6	6	#include "driver.h"
7		#include "norautp.h"
	7	#include "includes/norautp.h"
8	8
9	9
10	10	/* Discrete Sound Input Nodes */

src/mame/audio/turbo.c

r6740	r6741
5	5	*************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "turbo.h"
	8	#include "includes/turbo.h"
9	9	#include "sound/samples.h"
10	10
11	11

src/mame/audio/redbaron.c

r6740	r6741
17	17	#include <math.h>
18	18	#include "driver.h"
19	19	#include "streams.h"
20		#include "bzone.h"
	20	#include "includes/bzone.h"
21	21	#include "sound/pokey.h"
22	22
23	23	#define OUTPUT_RATE      (48000)

src/mame/audio/crbaloon.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "crbaloon.h"
	10	#include "includes/crbaloon.h"
11	11	#include "sound/sn76477.h"
12	12	#include "sound/discrete.h"
13	13
r6740	r6741
97	97	DISCRETE_INPUT_LOGIC(CRBALOON_MUSIC_EN)
98	98	DISCRETE_INPUT_DATA (CRBALOON_MUSIC_DATA)
99	99
100		DISCRETE_ADJUSTMENT_TAG(CRBALOON_VR2, 0, 0.5, DISC_LINADJ, "VR2")
101		DISCRETE_ADJUSTMENT_TAG(CRBALOON_VR3, 0, 1,   DISC_LINADJ, "VR3")
	100	DISCRETE_ADJUSTMENT(CRBALOON_VR2, 0, 0.5, DISC_LINADJ, "VR2")
	101	DISCRETE_ADJUSTMENT(CRBALOON_VR3, 0, 1,   DISC_LINADJ, "VR3")
102	102
103	103	/************************************************
104	104	* Laugh is a VCO modulated by a constant

src/mame/audio/cage.c

r6740	r6741
45	45
46	46	static UINT8 dma_enabled;
47	47	static UINT8 dma_timer_enabled;
48		static emu_timer *dma_timer;
	48	static const device_config *dma_timer;
49	49
50	50	static UINT8 cage_timer_enabled[2];
51		static emu_timer *timer[2];
	51	static const device_config *timer[2];
52	52
53	53	static UINT32 *tms32031_io_regs;
54	54
r6740	r6741
140	140	*
141	141	*************************************/
142	142
143		static TIMER_CALLBACK( dma_timer_callback );
144		static TIMER_CALLBACK( cage_timer_callback );
	143	static TIMER_DEVICE_CALLBACK( dma_timer_callback );
	144	static TIMER_DEVICE_CALLBACK( cage_timer_callback );
145	145	static void update_timer(int which);
146	146	static WRITE32_HANDLER( speedup_w );
147	147
r6740	r6741
167	167	cage_cpu_clock_period = ATTOTIME_IN_HZ(cpu_get_clock(cage_cpu));
168	168	cage_cpu_h1_clock_period = attotime_mul(cage_cpu_clock_period, 2);
169	169
170		dma_timer = timer_alloc(machine, dma_timer_callback, NULL);
171		timer[0] = timer_alloc(machine, cage_timer_callback, NULL);
172		timer[1] = timer_alloc(machine, cage_timer_callback, NULL);
	170	dma_timer = devtag_get_device(machine, "cage_dma_timer");
	171	timer[0] = devtag_get_device(machine, "cage_timer0");
	172	timer[1] = devtag_get_device(machine, "cage_timer1");
173	173
174	174	if (speedup)
175	175	speedup_ram = memory_install_write32_handler(cpu_get_address_space(cage_cpu, ADDRESS_SPACE_PROGRAM), speedup, speedup, 0, 0, speedup_w);
r6740	r6741
214	214	*
215	215	*************************************/
216	216
217		static TIMER_CALLBACK( dma_timer_callback )
	217	static TIMER_DEVICE_CALLBACK( dma_timer_callback )
218	218	{
219	219	/* if we weren't enabled, don't do anything, just shut ourself off */
220	220	if (!dma_enabled)
221	221	{
222	222	if (dma_timer_enabled)
223	223	{
224		timer_adjust_oneshot(dma_timer, attotime_never, 0);
	224	timer_device_adjust_oneshot(timer, attotime_never, 0);
225	225	dma_timer_enabled = 0;
226	226	}
227	227	return;
r6740	r6741
272	272	if (!dma_timer_enabled)
273	273	{
274	274	attotime period = attotime_mul(serial_period_per_word, tms32031_io_regs[DMA_TRANSFER_COUNT]);
275		timer_adjust_periodic(dma_timer, period, addr, period);
	275	timer_device_adjust_periodic(dma_timer, period, addr, period);
276	276	dma_timer_enabled = 1;
277	277	}
278	278	}
r6740	r6741
280	280	/* see if we turned off */
281	281	else if (!enabled && dma_enabled)
282	282	{
283		timer_adjust_oneshot(dma_timer, attotime_never, 0);
	283	timer_device_adjust_oneshot(dma_timer, attotime_never, 0);
284	284	dma_timer_enabled = 0;
285	285	}
286	286
r6740	r6741
296	296	*
297	297	*************************************/
298	298
299		static TIMER_CALLBACK( cage_timer_callback )
	299	static TIMER_DEVICE_CALLBACK( cage_timer_callback )
300	300	{
301	301	int which = param;
302	302
r6740	r6741
322	322	if (tms32031_io_regs[base + TIMER0_GLOBAL_CTL] != 0x2c1)
323	323	logerror("CAGE TIMER%d: unexpected timer config %08X!\n", which, tms32031_io_regs[base + TIMER0_GLOBAL_CTL]);
324	324
325		timer_adjust_oneshot(timer[which], period, which);
	325	timer_device_adjust_oneshot(timer[which], period, which);
326	326	}
327	327
328	328	/* see if we turned off */
329	329	else if (!enabled && cage_timer_enabled[which])
330	330	{
331		timer_adjust_oneshot(timer[which], attotime_never, which);
	331	timer_device_adjust_oneshot(timer[which], attotime_never, which);
332	332	}
333	333
334	334	/* set the new state */
r6740	r6741
569	569
570	570	dma_enabled = 0;
571	571	dma_timer_enabled = 0;
572		timer_adjust_oneshot(dma_timer, attotime_never, 0);
	572	timer_device_adjust_oneshot(dma_timer, attotime_never, 0);
573	573
574	574	cage_timer_enabled[0] = 0;
575	575	cage_timer_enabled[1] = 0;
576		timer_adjust_oneshot(timer[0], attotime_never, 0);
577		timer_adjust_oneshot(timer[1], attotime_never, 0);
	576	timer_device_adjust_oneshot(timer[0], attotime_never, 0);
	577	timer_device_adjust_oneshot(timer[1], attotime_never, 0);
578	578
579	579	memset(tms32031_io_regs, 0, 0x60 * 4);
580	580
r6740	r6741
654	654	MDRV_CPU_CONFIG(cage_config)
655	655	MDRV_CPU_PROGRAM_MAP(cage_map)
656	656
	657	MDRV_TIMER_ADD("cage_dma_timer", dma_timer_callback)
	658	MDRV_TIMER_ADD("cage_timer0", cage_timer_callback)
	659	MDRV_TIMER_ADD("cage_timer1", cage_timer_callback)
	660
657	661	/* sound hardware */
658	662	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
659	663

src/mame/audio/hitme.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "hitme.h"
	7	#include "includes/hitme.h"
8	8	#include "sound/discrete.h"
9	9
10	10
r6740	r6741
42	42	DISCRETE_INPUT_PULSE(HITME_OUT1, 0)
43	43
44	44	/* This represents the resistor at R3, which controls the speed of the sound effects */
45		DISCRETE_ADJUSTMENT_TAG(HITME_GAME_SPEED,0.0,25000.0,DISC_LINADJ,"R3")
	45	DISCRETE_ADJUSTMENT(HITME_GAME_SPEED,0.0,25000.0,DISC_LINADJ,"R3")
46	46
47	47	/* The clock for the main downcounter is a "404", or LS123 retriggerable multivibrator.
48	48	* It is clocked by IPH2 (8.945MHz/16 = 559kHz), then triggers a pulse which is adjustable

src/mame/audio/snk6502.c

r6740	r6741
14	14	#include "streams.h"
15	15	#include "sound/sn76477.h"
16	16	#include "sound/samples.h"
17		#include "snk6502.h"
	17	#include "includes/snk6502.h"
18	18	#include "sound/discrete.h"
19	19
20	20

src/mame/audio/exidy440.c

r6740	r6741
10	10	#include "driver.h"
11	11	#include "cpu/m6809/m6809.h"
12	12	#include "streams.h"
13		#include "exidy440.h"
	13	#include "includes/exidy440.h"
14	14
15	15
16	16	#define   SOUND_LOG      0

src/mame/audio/bzone.c

r6740	r6741
20	20	#include <math.h>
21	21	#include "driver.h"
22	22	#include "streams.h"
23		#include "bzone.h"
	23	#include "includes/bzone.h"
24	24
25	25	#include "sound/discrete.h"
26	26	#include "sound/pokey.h"
r6740	r6741
292	292	DISCRETE_BITS_DECODE(NODE_10, BZ_INPUT, 0, 7, 1)             /* IC M2, bits 0 - 7 */
293	293
294	294	/* the pot is 250K, but we will use a smaller range to get a better adjustment range */
295		DISCRETE_ADJUSTMENT_TAG(BZ_R11_POT, RES_K(75), RES_K(10), DISC_LINADJ, "R11")
	295	DISCRETE_ADJUSTMENT(BZ_R11_POT, RES_K(75), RES_K(10), DISC_LINADJ, "R11")
296	296
297	297
298	298	/************************************************/

src/mame/audio/segasnd.c

r6740	r6741
11	11
12	12	#include "driver.h"
13	13	#include "streams.h"
14		#include "segag80v.h"
	14	#include "includes/segag80v.h"
15	15	#include "cpu/mcs48/mcs48.h"
16	16	#include "sound/sp0250.h"
17	17	#include "segasnd.h"
r6740	r6741
302	302	*
303	303	*************************************/
304	304
305		static TIMER_CALLBACK( increment_t1_clock )
	305	static TIMER_DEVICE_CALLBACK( increment_t1_clock )
306	306	{
307	307	/* only increment if it is not being forced clear */
308	308	if (!(usb.last_p2_value & 0x80))
r6740	r6741
316	316	cpu_set_input_line(usb.cpu, INPUT_LINE_RESET, ASSERT_LINE);
317	317
318	318	/* start the clock timer */
319		timer_pulse(machine, attotime_mul(ATTOTIME_IN_HZ(USB_2MHZ_CLOCK), 256), NULL, 0, increment_t1_clock);
320	319	usb.t1_clock_mask = t1_clock_mask;
321	320	}
322	321
r6740	r6741
923	922	MDRV_CPU_PROGRAM_MAP(usb_map)
924	923	MDRV_CPU_IO_MAP(usb_portmap)
925	924
	925	MDRV_TIMER_ADD_PERIODIC("usb_timer", increment_t1_clock, HZ(USB_2MHZ_CLOCK / 256))
	926
926	927	/* sound hardware */
927	928	MDRV_SOUND_ADD("usbsnd", USB, 0)
928	929	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)

src/mame/audio/aztarac.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/z80/z80.h"
9		#include "aztarac.h"
	9	#include "includes/aztarac.h"
10	10
11	11	static int sound_status;
12	12

src/mame/audio/vicdual.c

r6740	r6741
5	5	*************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "vicdual.h"
	8	#include "includes/vicdual.h"
9	9	#include "sound/discrete.h"
10	10	#include "sound/samples.h"
11	11
r6740	r6741
73	73	DISCRETE_INPUT_NOT(FROGS_CAPTURE_EN)
74	74	DISCRETE_INPUT_NOT(FROGS_SPLASH_EN)
75	75
76		DISCRETE_ADJUSTMENT_TAG(FROGS_R93, RES_M(1), RES_K(10), DISC_LOGADJ, "R93")
	76	DISCRETE_ADJUSTMENT(FROGS_R93, RES_M(1), RES_K(10), DISC_LOGADJ, "R93")
77	77
78	78	DISCRETE_555_MSTABLE(NODE_30, 1, FROGS_TONGUE_EN, RES_K(100), CAP_U(1), &frogsZip555m)
79	79

src/mame/audio/bsktball.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "bsktball.h"
	7	#include "includes/bsktball.h"
8	8	#include "sound/discrete.h"
9	9
10	10	/***************************************************************************

src/mame/audio/meadows.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "cpu/s2650/s2650.h"
11		#include "meadows.h"
	11	#include "includes/meadows.h"
12	12	#include "sound/samples.h"
13	13	#include "sound/dac.h"
14	14

src/mame/audio/leland.c

r6740	r6741
81	81	#include "streams.h"
82	82	#include "cpu/i86/i86.h"
83	83	#include "cpu/z80/z80.h"
84		#include "leland.h"
	84	#include "includes/leland.h"
85	85	#include "sound/2151intf.h"
86	86
87	87

src/mame/audio/poolshrk.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "poolshrk.h"
	7	#include "includes/poolshrk.h"
8	8	#include "sound/discrete.h"
9	9
10	10	/************************************************************************/

src/mame/audio/sprint2.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "sprint2.h"
	7	#include "includes/sprint2.h"
8	8
9	9
10	10	/************************************************************************/
r6740	r6741
121	121	/* and are output thru a DAC                    */
122	122	/************************************************/
123	123
124		DISCRETE_ADJUSTMENT_TAG(NODE_20,
	124	DISCRETE_ADJUSTMENT(NODE_20,
125	125	RES_K(260),   // R21 + R23 @ max
126	126	RES_K(10),   // R21 + R23 @ min
127	127	DISC_LOGADJ, "MOTOR1")
r6740	r6741
159	159	/************************************************/
160	160	/* Car2 motor sound                             */
161	161	/************************************************/
162		DISCRETE_ADJUSTMENT_TAG(NODE_40,
	162	DISCRETE_ADJUSTMENT(NODE_40,
163	163	RES_K(260),   // R21 + R23 @ max
164	164	RES_K(10),   // R21 + R23 @ min
165	165	DISC_LOGADJ, "MOTOR2")
r6740	r6741
244	244	/* and are output thru a DAC                    */
245	245	/************************************************/
246	246
247		DISCRETE_ADJUSTMENT_TAG(NODE_20,
	247	DISCRETE_ADJUSTMENT(NODE_20,
248	248	RES_K(260),   // R21 + R23 @ max
249	249	RES_K(10),   // R21 + R23 @ min
250	250	DISC_LOGADJ, "MOTOR")
r6740	r6741
368	368	DISCRETE_INPUT_DATA (DOMINOS_AMP_DATA)               // IC C4
369	369	DISCRETE_INPUT_LOGIC(DOMINOS_ATTRACT_EN)
370	370
371		DISCRETE_ADJUSTMENT_TAG(DOMINOS_R23,
	371	DISCRETE_ADJUSTMENT(DOMINOS_R23,
372	372	RES_K(60),   // R21 + R23 @ max
373	373	RES_K(10),   // R21 + R23 @ min
374	374	DISC_LINADJ, "R23")

src/mame/audio/dkong.c

r6740	r6741
451	451
452	452	DISCRETE_TASK_START(1)
453	453	/* Mixing - DAC */
454		DISCRETE_ADJUSTMENT_TAG(DS_ADJ_DAC, 0, 1, DISC_LINADJ, "VR2")
	454	DISCRETE_ADJUSTMENT(DS_ADJ_DAC, 0, 1, DISC_LINADJ, "VR2")
455	455
456	456	/* Buffer DAC first to input stream 0 */
457	457	DISCRETE_INPUT_BUFFER(DS_DAC, 0)
r6740	r6741
647	647	//DISCRETE_INPUT_DATA(DS_DAC)
648	648
649	649	/* Mixing - DAC */
650		DISCRETE_ADJUSTMENT_TAG(DS_ADJ_DAC, 0, 1, DISC_LINADJ, "VR2")
	650	DISCRETE_ADJUSTMENT(DS_ADJ_DAC, 0, 1, DISC_LINADJ, "VR2")
651	651
652	652	/************************************************/
653	653	/* SIGNALS                                      */

src/mame/audio/taito_en.c

r6740	r6741
7	7	static UINT16 es5510_dsp_ram[0x200];
8	8	static UINT32   es5510_gpr[0xc0];
9	9	static UINT32   es5510_gpr_latch;
10		static emu_timer *timer_68681=NULL;
11	10	static int timer_mode,m68681_imr;
12	11
13	12	//static int es_tmp=1;
r6740	r6741
17	16
18	17	enum { TIMER_SINGLESHOT, TIMER_PULSE };
19	18
	19
	20
20	21	static READ16_HANDLER(f3_68000_share_r)
21	22	{
22	23	if ((offset&3)==0) return (f3_shared_ram[offset/4]&0xff000000)>>16;
r6740	r6741
68	69	/* Channels 0, 1, 2, 3 - Unused */
69	70	}
70	71
71		static TIMER_CALLBACK( taito_en_timer_callback )
	72	static TIMER_DEVICE_CALLBACK( taito_en_timer_callback )
72	73	{
73	74	/* Only cause IRQ if the mask is set to allow it */
74	75	if (m68681_imr & 0x08)
75	76	{
76		cpu_set_input_line_vector(cputag_get_cpu(machine, "audiocpu"), 6, vector_reg);
77		cputag_set_input_line(machine, "audiocpu", 6, ASSERT_LINE);
	77	cpu_set_input_line_vector(cputag_get_cpu(timer->machine, "audiocpu"), 6, vector_reg);
	78	cputag_set_input_line(timer->machine, "audiocpu", 6, ASSERT_LINE);
78	79	imr_status |= 0x08;
79	80	}
80	81	}
81	82
82		void f3_68681_reset(running_machine *machine)
83		{
84		timer_68681 = timer_alloc(machine, taito_en_timer_callback, NULL);
85		}
86
87	83	static READ16_HANDLER(f3_68681_r)
88	84	{
89	85	if (offset == 0x05)
r6740	r6741
123	119	case 3:
124	120	logerror("Counter:  X1/Clk - divided by 16, counter is %04x, so interrupt every %d cycles\n",counter,(M68000_CLOCK/M68681_CLOCK)*counter*16);
125	121	timer_mode=TIMER_SINGLESHOT;
126		timer_adjust_oneshot(timer_68681, cpu_clocks_to_attotime(space->cpu, (M68000_CLOCK/M68681_CLOCK)*counter*16), 0);
	122	timer_device_adjust_oneshot(devtag_get_device(space->machine, "timer_68681"), cpu_clocks_to_attotime(space->cpu, (M68000_CLOCK/M68681_CLOCK)*counter*16), 0);
127	123	break;
128	124	case 4:
129	125	logerror("Timer:  Unimplemented external IP2\n");
r6740	r6741
134	130	case 6:
135	131	logerror("Timer:  X1/Clk, counter is %04x, so interrupt every %d cycles\n",counter,(M68000_CLOCK/M68681_CLOCK)*counter);
136	132	timer_mode=TIMER_PULSE;
137		timer_adjust_periodic(timer_68681, cpu_clocks_to_attotime(space->cpu, (M68000_CLOCK/M68681_CLOCK)*counter), 0, cpu_clocks_to_attotime(space->cpu, (M68000_CLOCK/M68681_CLOCK)*counter));
	133	timer_device_adjust_periodic(devtag_get_device(space->machine, "timer_68681"), cpu_clocks_to_attotime(space->cpu, (M68000_CLOCK/M68681_CLOCK)*counter), 0, cpu_clocks_to_attotime(space->cpu, (M68000_CLOCK/M68681_CLOCK)*counter));
138	134	break;
139	135	case 7:
140	136	logerror("Timer:  Unimplemented X1/Clk - divided by 16\n");
r6740	r6741
247	243	AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_SHARE("share1")   // mirror
248	244	ADDRESS_MAP_END
249	245
250		void taito_f3_soundsystem_reset(running_machine *machine)
	246	static SOUND_RESET( taito_f3_soundsystem_reset )
251	247	{
252	248	/* Sound cpu program loads to 0xc00000 so we use a bank */
253	249	UINT16 *ROM = (UINT16 *)memory_region(machine, "audiocpu");
r6740	r6741
265	261	//cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
266	262	}
267	263
268		const es5505_interface es5505_taito_f3_config =
	264	static const es5505_interface es5505_taito_f3_config =
269	265	{
270	266	"ensoniq.0",   /* Bank 0: Unused by F3 games? */
271	267	"ensoniq.0",   /* Bank 1: All games seem to use this */
272	268	NULL /* irq */
273	269	};
	270
	271	MACHINE_DRIVER_START( taito_f3_sound )
	272	MDRV_TIMER_ADD("timer_68681", taito_en_timer_callback)
	273
	274	MDRV_SOUND_RESET( taito_f3_soundsystem_reset )
	275
	276	MDRV_CPU_ADD("audiocpu",  M68000, 16000000)
	277	MDRV_CPU_PROGRAM_MAP(f3_sound_map)
	278
	279	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
	280	MDRV_SOUND_ADD("ensoniq", ES5505, 30476100/2)
	281	MDRV_SOUND_CONFIG(es5505_taito_f3_config)
	282	MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)
	283	MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
	284	MACHINE_DRIVER_END

src/mame/audio/harddriv.c

r6740	r6741
8	8	#include "cpu/tms32010/tms32010.h"
9	9	#include "sound/dac.h"
10	10	#include "machine/atarigen.h"
11		#include "harddriv.h"
	11	#include "includes/harddriv.h"
12	12
13	13
14	14	#define BIO_FREQUENCY      (1000000 / 50)

src/mame/audio/sprint4.c

r6740	r6741
172	172	SPRINT4_MOTOR_DATA_##_plr,               /* DATA */                          \
173	173	DEFAULT_TTL_V_LOGIC_1,                  /* VDATA */                         \
174	174	&sprint4_motor_freq_DAC)               /* LADDER */                        \
175		DISCRETE_ADJUSTMENT_TAG(SPRINT4_PLAYER_MOTOR_NODE(2, _plr),                                     \
	175	DISCRETE_ADJUSTMENT(SPRINT4_PLAYER_MOTOR_NODE(2, _plr),                                     \
176	176	RES_K(10) + RES_K(250),                  /* MIN */                           \
177	177	RES_K(10),                           /* MAX */                           \
178	178	DISC_LOGADJ,                        /* LOGLIN */                        \

src/mame/audio/m72.c

r6740	r6741
104	104	cputag_set_input_line_and_vector(machine, "soundcpu",0,ASSERT_LINE, irqvector);
105	105	}
106	106
107		MACHINE_RESET( m72_sound )
	107	SOUND_START( m72 )
108	108	{
109		setvector_callback(machine, NULL, VECTOR_INIT);
110
111	109	state_save_register_global(machine, irqvector);
112	110	state_save_register_global(machine, sample_addr);
113	111	}
114	112
	113	SOUND_RESET( m72 )
	114	{
	115	setvector_callback(machine, NULL, VECTOR_INIT);
	116	}
	117
115	118	void m72_ym2151_irq_handler(const device_config *device, int irq)
116	119	{
117	120	if (irq)

src/mame/audio/firetrk.c

r6740	r6741
5	5	*************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "firetrk.h"
	8	#include "includes/firetrk.h"
9	9	#include "sound/discrete.h"
10	10
11	11
r6740	r6741
206	206	/* drive a modulo 12 counter, with div6 & div12 */
207	207	/* summed as the output of the circuit.         */
208	208	/************************************************/
209		DISCRETE_ADJUSTMENT_TAG(NODE_20,
	209	DISCRETE_ADJUSTMENT(NODE_20,
210	210	RES_K(260),   // R26 + R27 @ max
211	211	RES_K(10),   // R26 + R27 @ min
212	212	DISC_LOGADJ, "R27")
r6740	r6741
409	409	/* latch (4 bit). This freqency is then used to */
410	410	/* drive a modulo 12 counter.                   */
411	411	/************************************************/
412		DISCRETE_ADJUSTMENT_TAG(NODE_20,
	412	DISCRETE_ADJUSTMENT(NODE_20,
413	413	RES_K(260),   // R12 + R62 @ max
414	414	RES_K(10),   // R12 + R62 @ min
415	415	DISC_LOGADJ, "R62")
r6740	r6741
593	593	/* driver a modulo 12 counter, with div6, 4 & 3 */
594	594	/* summed as the output of the circuit.         */
595	595	/************************************************/
596		DISCRETE_ADJUSTMENT_TAG(NODE_20,
	596	DISCRETE_ADJUSTMENT(NODE_20,
597	597	RES_K(260),   // R87 + R89 @ max
598	598	RES_K(10),   // R87 + R89 @ min
599	599	DISC_LOGADJ, "R89")
r6740	r6741
628	628	/************************************************/
629	629	DISCRETE_COMP_ADDER(NODE_30, MONTECAR_DRONE_LOUD_DATA, &montecar_drone_vol_res)   // make sure to change the node value in the mixer table if you change this node number
630	630
631		DISCRETE_ADJUSTMENT_TAG(NODE_40,
	631	DISCRETE_ADJUSTMENT(NODE_40,
632	632	RES_K(260),   // R85 + R88 @ max
633	633	RES_K(10),   // R85 + R88 @ min
634	634	DISC_LOGADJ, "R88")

src/mame/audio/skyraid.c

r6740	r6741
4	4	************************************************************************/
5	5
6	6	#include "driver.h"
7		#include "skyraid.h"
	7	#include "includes/skyraid.h"
8	8
9	9
10	10	/* Discrete Sound Input Nodes */

src/mame/audio/sprint8.c

r6740	r6741
4	4	************************************************************************/
5	5
6	6	#include "driver.h"
7		#include "sprint8.h"
	7	#include "includes/sprint8.h"
8	8
9	9
10	10	/* Discrete Sound Input Nodes */
r6740	r6741
182	182	DISCRETE_INPUTX_LOGIC(SPRINT8_MOTOR8_EN, DEFAULT_TTL_V_LOGIC_1, 0, 0)
183	183
184	184	DISCRETE_TASK_START(0)
185		DISCRETE_ADJUSTMENT_TAG(SPRINT8_R132_POT, 0, SPRINT8_R132, DISC_LINADJ, "R132")
	185	DISCRETE_ADJUSTMENT(SPRINT8_R132_POT, 0, SPRINT8_R132, DISC_LINADJ, "R132")
186	186
187	187	/************************************************
188	188	* Noise Generator, Crash, Screech

src/mame/audio/taito_en.h

r6740	r6741
1	1	#include "cpu/m68000/m68000.h"
2	2	#include "sound/es5506.h"
3	3
4		void f3_68681_reset(running_machine *machine);
5
6		void taito_f3_soundsystem_reset(running_machine *machine);
7
8		#define TAITO_F3_SOUND_SYSTEM_CPU(freq)                        \
9		MDRV_CPU_ADD("audiocpu",  M68000, freq)                     \
10		MDRV_CPU_PROGRAM_MAP(f3_sound_map)                     \
11
12
13		#define TAITO_F3_SOUND_SYSTEM_ES5505(freq)                     \
14		MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")               \
15		MDRV_SOUND_ADD("ensoniq", ES5505, freq)                     \
16		MDRV_SOUND_CONFIG(es5505_taito_f3_config)                  \
17		MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)                        \
18		MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)                        \
19
20		ADDRESS_MAP_EXTERN(f3_sound_map, 16);
21
22		extern const es5505_interface es5505_taito_f3_config;
	4	MACHINE_DRIVER_EXTERN( taito_f3_sound );

src/mame/audio/dragrace.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "dragrace.h"
	7	#include "includes/dragrace.h"
8	8	#include "sound/discrete.h"
9	9
10	10	/************************************************************************/
r6740	r6741
92	92	/* NOTE: freqs are ripped from Sprint for now.  */
93	93	/************************************************/
94	94	DISCRETE_RCFILTER(NODE_20, DRAGRACE_MOTOR1_DATA, 119898, 2.2e-6)
95		DISCRETE_ADJUSTMENT_TAG(NODE_21, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR1")
	95	DISCRETE_ADJUSTMENT(NODE_21, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR1")
96	96	DISCRETE_MULTIPLY(NODE_22, NODE_20, NODE_21)
97	97
98	98	DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6)   /* F1 = /12*2 = /6 */
r6740	r6741
115	115	/* it to sound different from car1.             */
116	116	/************************************************/
117	117	DISCRETE_RCFILTER(NODE_40, DRAGRACE_MOTOR2_DATA, 119898, 2.2e-6)
118		DISCRETE_ADJUSTMENT_TAG(NODE_41, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR2")
	118	DISCRETE_ADJUSTMENT(NODE_41, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR2")
119	119	DISCRETE_MULTIPLY(NODE_42, NODE_40, NODE_41)
120	120
121	121	DISCRETE_MULTADD(NODE_43, NODE_42, 2, 27.0/6)   /* F1 = /12*2 = /6 */

src/mame/audio/madalien.c

r6740	r6741
4	4	************************************************************************/
5	5
6	6	#include "driver.h"
7		#include "madalien.h"
	7	#include "includes/madalien.h"
8	8	#include "sound/discrete.h"
9	9
10	10

src/mame/audio/m72.h

r6740	r6741
4	4
5	5	****************************************************************************/
6	6
7		MACHINE_RESET( m72_sound );
	7	SOUND_START( m72 );
	8	SOUND_RESET( m72 );
8	9	void m72_ym2151_irq_handler(const device_config *device, int irq);
9	10	WRITE8_HANDLER( m72_sound_command_byte_w );
10	11	WRITE16_HANDLER( m72_sound_command_w );

src/mame/audio/gridlee.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "streams.h"
9		#include "gridlee.h"
	9	#include "includes/gridlee.h"
10	10	#include "sound/samples.h"
11	11
12	12

src/mame/audio/orbit.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "orbit.h"
	7	#include "includes/orbit.h"
8	8	#include "sound/discrete.h"
9	9
10	10	/*************************************

src/mame/audio/segag80r.c

r6740	r6741
10	10	#include "driver.h"
11	11	#include "streams.h"
12	12	#include "cpu/mcs48/mcs48.h"
13		#include "segag80r.h"
	13	#include "includes/segag80r.h"
14	14	#include "machine/8255ppi.h"
15	15	#include "machine/i8243.h"
16	16	#include "sound/samples.h"

src/mame/audio/segag80v.c

r6740	r6741
5	5	*************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "segag80v.h"
	8	#include "includes/segag80v.h"
9	9	#include "sound/samples.h"
10	10
11	11	/* History:

src/mame/audio/scramble.c

r6740	r6741
79	79
80	80	WRITE8_DEVICE_HANDLER( scramble_sh_irqtrigger_w )
81	81	{
	82	const device_config *target = devtag_get_device(device->machine, "konami_7474");
	83
82	84	/* the complement of bit 3 is connected to the flip-flop's clock */
83		TTL7474_clock_w(2, ~data & 0x08);
84		TTL7474_update(device->machine, 2);
	85	ttl7474_clock_w(target, ~data & 0x08);
	86	ttl7474_update(target);
85	87
86	88	/* bit 4 is sound disable */
87	89	sound_global_enable(device->machine, ~data & 0x10);
r6740	r6741
89	91
90	92	WRITE8_DEVICE_HANDLER( mrkougar_sh_irqtrigger_w )
91	93	{
	94	const device_config *target = devtag_get_device(device->machine, "konami_7474");
	95
92	96	/* the complement of bit 3 is connected to the flip-flop's clock */
93		TTL7474_clock_w(2, ~data & 0x08);
94		TTL7474_update(device->machine, 2);
	97	ttl7474_clock_w(target, ~data & 0x08);
	98	ttl7474_update(target);
95	99	}
96	100
97		#ifdef UNUSED_FUNCTION
98		WRITE8_HANDLER( froggrmc_sh_irqtrigger_w )
99		{
100		/* the complement of bit 0 is connected to the flip-flop's clock */
101		TTL7474_clock_w(2, ~data & 0x01);
102		TTL7474_update(space->machine, 2);
103		}
104		#endif
105
106	101	static IRQ_CALLBACK(scramble_sh_irq_callback)
107	102	{
	103	const device_config *target = devtag_get_device(device->machine, "konami_7474");
	104
108	105	/* interrupt acknowledge clears the flip-flop --
109	106	we need to pulse the CLR line because MAME's core never clears this
110	107	line, only asserts it */
111		TTL7474_clear_w(2, 0);
112		TTL7474_update(device->machine, 2);
	108	ttl7474_clear_w(target, 0);
	109	ttl7474_update(target);
113	110
114		TTL7474_clear_w(2, 1);
115		TTL7474_update(device->machine, 2);
	111	ttl7474_clear_w(target, 1);
	112	ttl7474_update(target);
116	113
117	114	return 0xff;
118	115	}
119	116
120		static void scramble_sh_7474_callback(running_machine *machine)
	117	void scramble_sh_7474_callback(const device_config *device)
121	118	{
122	119	/* the Q bar is connected to the Z80's INT line.  But since INT is complemented, */
123	120	/* we need to complement Q bar */
124		cputag_set_input_line(machine, "audiocpu", 0, !TTL7474_output_comp_r(2) ? ASSERT_LINE : CLEAR_LINE);
	121	cputag_set_input_line(device->machine, "audiocpu", 0, !ttl7474_output_comp_r(device) ? ASSERT_LINE : CLEAR_LINE);
125	122	}
126	123
127	124	WRITE8_HANDLER( hotshock_sh_irqtrigger_w )
r6740	r6741
166	163	filter_w(devtag_get_device(space->machine, "filter.0.2"), (offset >> 10) & 3);
167	164	}
168	165
169		static const struct TTL7474_interface scramble_sh_7474_intf =
170		{
171		scramble_sh_7474_callback
172		};
173
174	166	void scramble_sh_init(running_machine *machine)
175	167	{
176	168	cpu_set_irq_callback(cputag_get_cpu(machine, "audiocpu"), scramble_sh_irq_callback);
177	169
178		TTL7474_config(machine, 2, &scramble_sh_7474_intf);
179
180	170	/* PR is always 0, D is always 1 */
181		TTL7474_d_w(2, 1);
	171	ttl7474_d_w(devtag_get_device(machine, "konami_7474"), 1);
182	172	}
183	173
184	174

src/mame/audio/redalert.c

r6740	r6741
15	15	#include "machine/6821pia.h"
16	16	#include "sound/ay8910.h"
17	17	#include "sound/hc55516.h"
18		#include "redalert.h"
	18	#include "includes/redalert.h"
19	19
20	20
21	21

src/mame/audio/triplhnt.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "triplhnt.h"
	7	#include "includes/triplhnt.h"
8	8	#include "sound/discrete.h"
9	9
10	10
r6740	r6741
130	130	/************************************************/
131	131	/* Bear Roar is a VCO with noise mixed in.      */
132	132	/************************************************/
133		DISCRETE_ADJUSTMENT_TAG(NODE_20,
	133	DISCRETE_ADJUSTMENT(NODE_20,
134	134	10000,   // R86 + R88 @ 0
135	135	260000,   // R86 + R88 @ max
136	136	DISC_LOGADJ, "BEAR")

src/mame/audio/starshp1.c

r6740	r6741
4	4	************************************************************************/
5	5
6	6	#include "driver.h"
7		#include "starshp1.h"
	7	#include "includes/starshp1.h"
8	8	#include "sound/discrete.h"
9	9
10	10

src/mame/audio/atarifb.c

r6740	r6741
5	5	*************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "atarifb.h"
	8	#include "includes/atarifb.h"
9	9	#include "sound/discrete.h"
10	10
11	11

src/mame/audio/dcs.c

r6740	r6741
296	296	UINT16      size;
297	297	UINT16      incs;
298	298	const device_config *dmadac[6];
299		emu_timer *   reg_timer;
300		emu_timer *   sport_timer;
301		emu_timer *   internal_timer;
	299	const device_config *reg_timer;
	300	const device_config *sport_timer;
	301	const device_config *internal_timer;
302	302	INT32      ireg;
303	303	UINT16      ireg_base;
304	304	UINT16      control_regs[32];
r6740	r6741
350	350	INT32      writes_left;
351	351	UINT16      sum;
352	352	INT32      fifo_entries;
353		emu_timer *   watchdog;
	353	const device_config *watchdog;
354	354	};
355	355
356	356
r6740	r6741
410	410	static WRITE16_HANDLER( output_control_w );
411	411
412	412	static void timer_enable_callback(const device_config *device, int enable);
413		static TIMER_CALLBACK( internal_timer_callback );
414		static TIMER_CALLBACK( dcs_irq );
415		static TIMER_CALLBACK( sport0_irq );
	413	static TIMER_DEVICE_CALLBACK( internal_timer_callback );
	414	static TIMER_DEVICE_CALLBACK( dcs_irq );
	415	static TIMER_DEVICE_CALLBACK( sport0_irq );
416	416	static void recompute_sample_rate(running_machine *machine);
417	417	static void sound_tx_callback(const device_config *device, int port, INT32 data);
418	418
419	419	static READ16_HANDLER( dcs_polling_r );
420	420	static WRITE16_HANDLER( dcs_polling_w );
421	421
422		static TIMER_CALLBACK( transfer_watchdog_callback );
	422	static TIMER_DEVICE_CALLBACK( transfer_watchdog_callback );
423	423	static int preprocess_write(running_machine *machine, UINT16 data);
424	424
425	425
r6740	r6741
614	614	MDRV_CPU_PROGRAM_MAP(dcs_2k_program_map)
615	615	MDRV_CPU_DATA_MAP(dcs_2k_data_map)
616	616
	617	MDRV_TIMER_ADD("dcs_reg_timer", dcs_irq)
	618	MDRV_TIMER_ADD("dcs_int_timer", internal_timer_callback)
	619
617	620	MDRV_SPEAKER_STANDARD_MONO("mono")
618	621
619	622	MDRV_SOUND_ADD("dac", DMADAC, 0)
r6740	r6741
653	656	MDRV_CPU_PROGRAM_MAP(dcs2_2115_program_map)
654	657	MDRV_CPU_DATA_MAP(dcs2_2115_data_map)
655	658
	659	MDRV_TIMER_ADD("dcs_reg_timer", dcs_irq)
	660	MDRV_TIMER_ADD("dcs_sport_timer", sport0_irq)
	661	MDRV_TIMER_ADD("dcs_int_timer", internal_timer_callback)
	662	MDRV_TIMER_ADD("dcs_hle_timer", transfer_watchdog_callback)
	663
656	664	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
657	665
658	666	MDRV_SOUND_ADD("dac1", DMADAC, 0)
r6740	r6741
855	863	/* reset timers */
856	864	dcs.timer_enable = 0;
857	865	dcs.timer_scale = 1;
858		timer_adjust_oneshot(dcs.internal_timer, attotime_never, 0);
	866	timer_device_adjust_oneshot(dcs.internal_timer, attotime_never, 0);
859	867
860	868	/* start the SPORT0 timer */
861		if (dcs.sport_timer)
862		timer_adjust_periodic(dcs.sport_timer, ATTOTIME_IN_HZ(1000), 0, ATTOTIME_IN_HZ(1000));
	869	if (dcs.sport_timer != NULL)
	870	timer_device_adjust_periodic(dcs.sport_timer, ATTOTIME_IN_HZ(1000), 0, ATTOTIME_IN_HZ(1000));
863	871
864	872	/* reset the HLE transfer states */
865	873	transfer.dcs_state = transfer.state = 0;
r6740	r6741
948	956	memory_configure_bank(machine, "databank", 0, dcs.sounddata_banks, dcs.sounddata, 0x1000*2);
949	957
950	958	/* create the timers */
951		dcs.internal_timer = timer_alloc(machine, internal_timer_callback, NULL);
952		dcs.reg_timer = timer_alloc(machine, dcs_irq, NULL);
	959	dcs.internal_timer = devtag_get_device(machine, "dcs_int_timer");
	960	dcs.reg_timer = devtag_get_device(machine, "dcs_reg_timer");
953	961
954	962	/* non-RAM based automatically acks */
955	963	dcs.auto_ack = TRUE;
r6740	r6741
1013	1021	dcs_sram = auto_alloc_array(machine, UINT16, 0x8000*4/2);
1014	1022
1015	1023	/* create the timers */
1016		dcs.internal_timer = timer_alloc(machine, internal_timer_callback, NULL);
1017		dcs.reg_timer = timer_alloc(machine, dcs_irq, NULL);
1018		dcs.sport_timer = timer_alloc(machine, sport0_irq, NULL);
	1024	dcs.internal_timer = devtag_get_device(machine, "dcs_int_timer");
	1025	dcs.reg_timer = devtag_get_device(machine, "dcs_reg_timer");
	1026	dcs.sport_timer = devtag_get_device(machine, "dcs_sport_timer");
1019	1027
1020	1028	/* we don't do auto-ack by default */
1021	1029	dcs.auto_ack = FALSE;
r6740	r6741
1028	1036	/* allocate a watchdog timer for HLE transfers */
1029	1037	transfer.hle_enabled = (ENABLE_HLE_TRANSFERS && dram_in_mb != 0);
1030	1038	if (transfer.hle_enabled)
1031		transfer.watchdog = timer_alloc(machine, transfer_watchdog_callback, NULL);
	1039	transfer.watchdog = devtag_get_device(machine, "dcs_hle_timer");
1032	1040
1033	1041	/* register for save states */
1034	1042	dcs_register_state(machine);
r6740	r6741
1582	1590	return;
1583	1591
1584	1592	/* if we are DCS1, set a timer to latch the data */
1585		if (!dcs.sport_timer)
	1593	if (dcs.sport_timer == NULL)
1586	1594	timer_call_after_resynch(dcs.cpu->machine, NULL, data, dcs_delayed_data_w_callback);
1587	1595	else
1588	1596	dcs_delayed_data_w(dcs.cpu->machine, data);
r6740	r6741
1733	1741	}
1734	1742
1735	1743
1736		static TIMER_CALLBACK( internal_timer_callback )
	1744	static TIMER_DEVICE_CALLBACK( internal_timer_callback )
1737	1745	{
1738	1746	INT64 target_cycles;
1739	1747
r6740	r6741
1745	1753
1746	1754	/* set the next timer, but only if it's for a reasonable number */
1747	1755	if (!dcs.timer_ignore && (dcs.timer_period > 10 || dcs.timer_scale > 1))
1748		timer_adjust_oneshot(dcs.internal_timer, cpu_clocks_to_attotime(dcs.cpu, target_cycles), 0);
	1756	timer_device_adjust_oneshot(timer, cpu_clocks_to_attotime(dcs.cpu, target_cycles), 0);
1749	1757
1750	1758	/* the IRQ line is edge triggered */
1751	1759	cpu_set_input_line(dcs.cpu, ADSP2105_TIMER, ASSERT_LINE);
r6740	r6741
1781	1789
1782	1790	/* adjust the timer if not optimized */
1783	1791	if (!dcs.timer_ignore)
1784		timer_adjust_oneshot(dcs.internal_timer, cpu_clocks_to_attotime(dcs.cpu, dcs.timer_scale * (dcs.timer_start_count + 1)), 0);
	1792	timer_device_adjust_oneshot(dcs.internal_timer, cpu_clocks_to_attotime(dcs.cpu, dcs.timer_scale * (dcs.timer_start_count + 1)), 0);
1785	1793	}
1786	1794
1787	1795
r6740	r6741
1797	1805	else
1798	1806	{
1799	1807	//      mame_printf_debug("Timer disabled\n");
1800		timer_adjust_oneshot(dcs.internal_timer, attotime_never, 0);
	1808	timer_device_adjust_oneshot(dcs.internal_timer, attotime_never, 0);
1801	1809	}
1802	1810	}
1803	1811
r6740	r6741
1875	1883	if ((data & 0x0800) == 0)
1876	1884	{
1877	1885	dmadac_enable(&dcs.dmadac[0], dcs.channels, 0);
1878		timer_adjust_oneshot(dcs.reg_timer, attotime_never, 0);
	1886	timer_device_adjust_oneshot(dcs.reg_timer, attotime_never, 0);
1879	1887	}
1880	1888	break;
1881	1889
r6740	r6741
1884	1892	if ((data & 0x0002) == 0)
1885	1893	{
1886	1894	dmadac_enable(&dcs.dmadac[0], dcs.channels, 0);
1887		timer_adjust_oneshot(dcs.reg_timer, attotime_never, 0);
	1895	timer_device_adjust_oneshot(dcs.reg_timer, attotime_never, 0);
1888	1896	}
1889	1897	break;
1890	1898
r6740	r6741
1930	1938	DCS IRQ GENERATION CALLBACKS
1931	1939	****************************************************************************/
1932	1940
1933		static TIMER_CALLBACK( dcs_irq )
	1941	static TIMER_DEVICE_CALLBACK( dcs_irq )
1934	1942	{
1935	1943	/* get the index register */
1936	1944	int reg = cpu_get_reg(dcs.cpu, ADSP2100_I0 + dcs.ireg);
r6740	r6741
1966	1974	}
1967	1975
1968	1976
1969		static TIMER_CALLBACK( sport0_irq )
	1977	static TIMER_DEVICE_CALLBACK( sport0_irq )
1970	1978	{
1971	1979	/* this latches internally, so we just pulse */
1972	1980	/* note that there is non-interrupt code that reads/modifies/writes the output_control */
r6740	r6741
1996	2004	if (dcs.incs)
1997	2005	{
1998	2006	attotime period = attotime_div(attotime_mul(sample_period, dcs.size), (2 * dcs.channels * dcs.incs));
1999		timer_adjust_periodic(dcs.reg_timer, period, 0, period);
	2007	timer_device_adjust_periodic(dcs.reg_timer, period, 0, period);
2000	2008	}
2001	2009	}
2002	2010
r6740	r6741
2049	2057	dmadac_enable(&dcs.dmadac[0], dcs.channels, 0);
2050	2058
2051	2059	/* remove timer */
2052		timer_adjust_oneshot(dcs.reg_timer, attotime_never, 0);
	2060	timer_device_adjust_oneshot(dcs.reg_timer, attotime_never, 0);
2053	2061	}
2054	2062
2055	2063
r6740	r6741
2097	2105	}
2098	2106
2099	2107
2100		static TIMER_CALLBACK( transfer_watchdog_callback )
	2108	static TIMER_DEVICE_CALLBACK( transfer_watchdog_callback )
2101	2109	{
2102	2110	int starting_writes_left = param;
2103	2111
2104	2112	if (transfer.fifo_entries && starting_writes_left == transfer.writes_left)
2105	2113	{
2106	2114	for ( ; transfer.fifo_entries; transfer.fifo_entries--)
2107		preprocess_write(machine, (*dcs.fifo_data_r)(dcs.cpu));
	2115	preprocess_write(timer->machine, (*dcs.fifo_data_r)(dcs.cpu));
2108	2116	}
2109		timer_adjust_oneshot(transfer.watchdog, ATTOTIME_IN_MSEC(1), transfer.writes_left);
	2117	timer_device_adjust_oneshot(transfer.watchdog, ATTOTIME_IN_MSEC(1), transfer.writes_left);
2110	2118	}
2111	2119
2112	2120
r6740	r6741
2336	2344	transfer.sum = 0;
2337	2345	if (transfer.hle_enabled)
2338	2346	{
2339		timer_adjust_oneshot(transfer.watchdog, ATTOTIME_IN_MSEC(1), transfer.writes_left);
	2347	timer_device_adjust_oneshot(transfer.watchdog, ATTOTIME_IN_MSEC(1), transfer.writes_left);
2340	2348	return 1;
2341	2349	}
2342	2350	break;
r6740	r6741
2363	2371	if (transfer.state == 0)
2364	2372	{
2365	2373	timer_set(machine, ATTOTIME_IN_USEC(1), NULL, transfer.sum, s2_ack_callback);
2366		timer_adjust_oneshot(transfer.watchdog, attotime_never, 0);
	2374	timer_device_adjust_oneshot(transfer.watchdog, attotime_never, 0);
2367	2375	}
2368	2376	return 1;
2369	2377	}
r6740	r6741
2378	2386	int result;
2379	2387
2380	2388	/* if we're not DCS2, skip */
2381		if (!dcs.sport_timer)
	2389	if (dcs.sport_timer == NULL)
2382	2390	return 0;
2383	2391
2384	2392	/* state 0 - initialization phase */

src/mame/audio/jedi.c

r6740	r6741
10	10	#include "cpu/m6502/m6502.h"
11	11	#include "sound/tms5220.h"
12	12	#include "sound/pokey.h"
13		#include "jedi.h"
	13	#include "includes/jedi.h"
14	14
15	15
16	16

src/mame/audio/galaga.c

r6740	r6741
6	6	#include "driver.h"
7	7	#include "namco52.h"
8	8	#include "namco54.h"
9		#include "galaga.h"
	9	#include "includes/galaga.h"
10	10
11	11
12	12	/*************************************

src/mame/audio/subs.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "subs.h"
	7	#include "includes/subs.h"
8	8	#include "sound/discrete.h"
9	9
10	10

src/mame/audio/videopin.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "videopin.h"
	7	#include "includes/videopin.h"
8	8	#include "sound/discrete.h"
9	9
10	10

src/mame/audio/polepos.c

r6740	r6741
8	8	#include "machine/rescap.h"
9	9	#include "namco52.h"
10	10	#include "namco54.h"
11		#include "polepos.h"
	11	#include "includes/polepos.h"
12	12
13	13	static int sample_msb = 0;
14	14	static int sample_lsb = 0;

src/mame/audio/exidy.c

r6740	r6741
13	13	#include "machine/6532riot.h"
14	14	#include "sound/hc55516.h"
15	15	#include "sound/tms5220.h"
16		#include "exidy.h"
	16	#include "includes/exidy.h"
17	17
18	18
19	19

src/mame/audio/tank8.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "tank8.h"
	7	#include "includes/tank8.h"
8	8	#include "sound/discrete.h"
9	9
10	10
r6740	r6741
247	247	DISCRETE_ADDER2(NODE_125, 1 , NODE_122, NODE_124 )
248	248	DISCRETE_MULTIPLY(NODE_126, NODE_120, NODE_125 )
249	249	DISCRETE_RCFILTER(NODE_127, NODE_126, RES_K(47), CAP_U(0.1))
250		DISCRETE_ADJUSTMENT_TAG(NODE_128,
	250	DISCRETE_ADJUSTMENT(NODE_128,
251	251	1.0,            // min gain of E5
252	252	1.0 + 100.0/22,      // max gain of E5 = 1 + r132/r101
253	253	DISC_LINADJ, "CRASH")

src/mame/audio/8080bw.c

r6740	r6741
1		/* 8080bw.c *********************************
2		*/
	1	/* 8080bw.c *******************************************/
	2
3	3	#include "driver.h"
4		#include "8080bw.h"
5		#include "mw8080bw.h"
6	4	#include "sound/samples.h"
7	5	#include "sound/sn76477.h"
8	6	#include "sound/discrete.h"
9	7	#include "sound/speaker.h"
	8	#include "includes/mw8080bw.h"
10	9
11	10
12		static emu_timer *schaser_effect_555_timer;
13		static attotime schaser_effect_555_time_remain;
14		static INT32 schaser_effect_555_time_remain_savable;
15		static int schaser_effect_555_is_low;
16		static int schaser_explosion;
17		static UINT8 port_1_last_extra = 0;
18		static UINT8 port_2_last_extra = 0;
19		static UINT8 port_3_last_extra = 0;
20
21	11	/*******************************************************/
22	12	/*                                                     */
23	13	/* Global state registration                           */
r6740	r6741
26	16
27	17	MACHINE_START( extra_8080bw_sh )
28	18	{
29		state_save_register_global(machine, port_1_last_extra);
30		state_save_register_global(machine, port_2_last_extra);
31		state_save_register_global(machine, port_3_last_extra);
	19	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	20
	21	state_save_register_global(machine, state->port_1_last_extra);
	22	state_save_register_global(machine, state->port_2_last_extra);
	23	state_save_register_global(machine, state->port_3_last_extra);
32	24	}
33	25
34	26	/*******************************************************/
r6740	r6741
39	31
40	32	WRITE8_HANDLER( invadpt2_sh_port_1_w )
41	33	{
42		const device_config *samples = devtag_get_device(space->machine, "samples");
43		const device_config *sn = devtag_get_device(space->machine, "snsnd");
44		UINT8 rising_bits = data & ~port_1_last_extra;
	34	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	35	UINT8 rising_bits = data & ~state->port_1_last_extra;
45	36
46		sn76477_enable_w(sn, !(data & 0x01));         /* SAUCER SOUND */
	37	sn76477_enable_w(state->sn, !(data & 0x01));         /* SAUCER SOUND */
47	38
48		if (rising_bits & 0x02) sample_start(samples, 0, 0, 0);      /* MISSLE SOUND */
49		if (rising_bits & 0x04) sample_start(samples, 1, 1, 0);      /* EXPLOSION */
50		if (rising_bits & 0x08) sample_start(samples, 2, 2, 0);      /* INVADER HIT */
51		if (rising_bits & 0x10) sample_start(samples, 5, 8, 0);      /* BONUS MISSILE BASE */
	39	if (rising_bits & 0x02) sample_start(state->samples, 0, 0, 0);      /* MISSLE SOUND */
	40	if (rising_bits & 0x04) sample_start(state->samples, 1, 1, 0);      /* EXPLOSION */
	41	if (rising_bits & 0x08) sample_start(state->samples, 2, 2, 0);      /* INVADER HIT */
	42	if (rising_bits & 0x10) sample_start(state->samples, 5, 8, 0);      /* BONUS MISSILE BASE */
52	43
53		c8080bw_screen_red_w(data & 0x04);
	44	state->screen_red = data & 0x04;
54	45
55	46	sound_global_enable(space->machine, data & 0x20);
56	47
57		port_1_last_extra = data;
	48	state->port_1_last_extra = data;
58	49
59	50	}
60	51
r6740	r6741
67	58	D2 = 82K
68	59	D3 = 100K */
69	60
70		const device_config *samples = devtag_get_device(space->machine, "samples");
71		UINT8 rising_bits = data & ~port_2_last_extra;
	61	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	62	UINT8 rising_bits = data & ~state->port_2_last_extra;
72	63
73		if (rising_bits & 0x01) sample_start(samples, 4, 3, 0);      /* FLEET */
74		if (rising_bits & 0x02) sample_start(samples, 4, 4, 0);      /* FLEET */
75		if (rising_bits & 0x04) sample_start(samples, 4, 5, 0);      /* FLEET */
76		if (rising_bits & 0x08) sample_start(samples, 4, 6, 0);      /* FLEET */
77		if (rising_bits & 0x10) sample_start(samples, 3, 7, 0);      /* SAUCER HIT */
	64	if (rising_bits & 0x01) sample_start(state->samples, 4, 3, 0);      /* FLEET */
	65	if (rising_bits & 0x02) sample_start(state->samples, 4, 4, 0);      /* FLEET */
	66	if (rising_bits & 0x04) sample_start(state->samples, 4, 5, 0);      /* FLEET */
	67	if (rising_bits & 0x08) sample_start(state->samples, 4, 6, 0);      /* FLEET */
	68	if (rising_bits & 0x10) sample_start(state->samples, 3, 7, 0);      /* SAUCER HIT */
78	69
79		c8080bw_flip_screen_w(space, data & 0x20);
	70	state->c8080bw_flip_screen = data & 0x20;
80	71
81		port_2_last_extra = data;
	72	state->port_2_last_extra = data;
82	73	}
83	74
84	75
r6740	r6741
90	81
91	82	WRITE8_HANDLER( spcewars_sh_port_w )
92	83	{
93		const device_config *samples = devtag_get_device(space->machine, "samples");
94		const device_config *speaker = devtag_get_device(space->machine, "speaker");
95		const device_config *sn = devtag_get_device(space->machine, "snsnd");
96		UINT8 rising_bits = data & ~port_1_last_extra;
	84	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	85	UINT8 rising_bits = data & ~state->port_1_last_extra;
97	86
98		sn76477_enable_w(sn, !(data & 0x01));         /* Saucer Sound */
	87	sn76477_enable_w(state->sn, !(data & 0x01));         /* Saucer Sound */
99	88
100		if (rising_bits & 0x02) sample_start(samples, 0, 0, 0);      /* Shot Sound */
101		if (rising_bits & 0x04) sample_start(samples, 1, 1, 0);      /* Base Hit */
102		if (rising_bits & 0x08) sample_start(samples, 2, 2, 0);      /* Invader Hit */
	89	if (rising_bits & 0x02) sample_start(state->samples, 0, 0, 0);      /* Shot Sound */
	90	if (rising_bits & 0x04) sample_start(state->samples, 1, 1, 0);      /* Base Hit */
	91	if (rising_bits & 0x08) sample_start(state->samples, 2, 2, 0);      /* Invader Hit */
103	92
104		speaker_level_w(speaker, (data & 0x10) ? 1 : 0);      /* Various bitstream tunes */
	93	speaker_level_w(state->speaker, (data & 0x10) ? 1 : 0);      /* Various bitstream tunes */
105	94
106		port_1_last_extra = data;
	95	state->port_1_last_extra = data;
107	96	}
108	97
109	98
r6740	r6741
136	125
137	126	WRITE8_HANDLER( lrescue_sh_port_1_w )
138	127	{
139		const device_config *samples = devtag_get_device(space->machine, "samples");
140		UINT8 rising_bits = data & ~port_1_last_extra;
	128	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	129	UINT8 rising_bits = data & ~state->port_1_last_extra;
141	130
142		if (rising_bits & 0x01) sample_start(samples, 0, 3, 0);      /* Thrust */
143		if (rising_bits & 0x02) sample_start(samples, 1, 2, 0);      /* Shot Sound */
144		if (rising_bits & 0x04) sample_start(samples, 0, 1, 0);      /* Death */
145		if (rising_bits & 0x08) sample_start(samples, 1, 0, 0);      /* Alien Hit */
146		if (rising_bits & 0x10) sample_start(samples, 2, 5, 0);      /* Bonus Ship (not confirmed) */
	131	if (rising_bits & 0x01) sample_start(state->samples, 0, 3, 0);      /* Thrust */
	132	if (rising_bits & 0x02) sample_start(state->samples, 1, 2, 0);      /* Shot Sound */
	133	if (rising_bits & 0x04) sample_start(state->samples, 0, 1, 0);      /* Death */
	134	if (rising_bits & 0x08) sample_start(state->samples, 1, 0, 0);      /* Alien Hit */
	135	if (rising_bits & 0x10) sample_start(state->samples, 2, 5, 0);      /* Bonus Ship (not confirmed) */
147	136
148	137	sound_global_enable(space->machine, data & 0x20);
149	138
150		c8080bw_screen_red_w(data & 0x04);
	139	state->screen_red = data & 0x04;
151	140
152		port_1_last_extra = data;
	141	state->port_1_last_extra = data;
153	142	}
154	143
155	144	WRITE8_HANDLER( lrescue_sh_port_2_w )
156	145	{
157		const device_config *samples = devtag_get_device(space->machine, "samples");
158		const device_config *speaker = devtag_get_device(space->machine, "speaker");
159		UINT8 rising_bits = data & ~port_2_last_extra;
	146	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	147	UINT8 rising_bits = data & ~state->port_2_last_extra;
160	148
161		if (rising_bits & 0x01) sample_start(samples, 1, 8, 0);      /* Footstep high tone */
162		if (rising_bits & 0x02) sample_start(samples, 1, 7, 0);      /* Footstep low tone */
163		if (rising_bits & 0x04) sample_start(samples, 1, 4, 0);      /* Bonus when counting men saved */
	149	if (rising_bits & 0x01) sample_start(state->samples, 1, 8, 0);      /* Footstep high tone */
	150	if (rising_bits & 0x02) sample_start(state->samples, 1, 7, 0);      /* Footstep low tone */
	151	if (rising_bits & 0x04) sample_start(state->samples, 1, 4, 0);      /* Bonus when counting men saved */
164	152
165		speaker_level_w(speaker, (data & 0x08) ? 1 : 0);      /* Bitstream tunes - endlevel and bonus1 */
	153	speaker_level_w(state->speaker, (data & 0x08) ? 1 : 0);      /* Bitstream tunes - endlevel and bonus1 */
166	154
167		if (rising_bits & 0x10) sample_start(samples, 3, 6, 0);      /* Shooting Star and Rescue Ship sounds */
168		if (~data & 0x10 && port_2_last_extra & 0x10) sample_stop (samples, 3);   /* This makes the rescue ship sound beep on and off */
	155	if (rising_bits & 0x10) sample_start(state->samples, 3, 6, 0);      /* Shooting Star and Rescue Ship sounds */
	156	if (~data & 0x10 && state->port_2_last_extra & 0x10) sample_stop (state->samples, 3);   /* This makes the rescue ship sound beep on and off */
169	157
170		c8080bw_flip_screen_w(space, data & 0x20);
	158	state->c8080bw_flip_screen = data & 0x20;
171	159
172		port_2_last_extra = data;
	160	state->port_2_last_extra = data;
173	161	}
174	162
175	163
r6740	r6741
195	183
196	184	WRITE8_HANDLER( ballbomb_sh_port_1_w )
197	185	{
198		const device_config *samples = devtag_get_device(space->machine, "samples");
199		UINT8 rising_bits = data & ~port_1_last_extra;
	186	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	187	UINT8 rising_bits = data & ~state->port_1_last_extra;
200	188
201		if (rising_bits & 0x01) sample_start(samples, 1, 2, 0);      /* Hit a balloon */
202		if (rising_bits & 0x02) sample_start(samples, 2, 0, 0);      /* Shot Sound */
203		if (rising_bits & 0x04) sample_start(samples, 2, 1, 0);      /* Base Hit */
204		if (rising_bits & 0x08) sample_start(samples, 1, 7, 0);      /* Hit a Bomb */
205		if (rising_bits & 0x10) sample_start(samples, 3, 8, 0);      /* Bonus Base at 1500 points */
	189	if (rising_bits & 0x01) sample_start(state->samples, 1, 2, 0);      /* Hit a balloon */
	190	if (rising_bits & 0x02) sample_start(state->samples, 2, 0, 0);      /* Shot Sound */
	191	if (rising_bits & 0x04) sample_start(state->samples, 2, 1, 0);      /* Base Hit */
	192	if (rising_bits & 0x08) sample_start(state->samples, 1, 7, 0);      /* Hit a Bomb */
	193	if (rising_bits & 0x10) sample_start(state->samples, 3, 8, 0);      /* Bonus Base at 1500 points */
206	194
207	195	sound_global_enable(space->machine, data & 0x20);
208	196
209		c8080bw_screen_red_w(data & 0x04);
	197	state->screen_red = data & 0x04;
210	198
211		port_1_last_extra = data;
	199	state->port_1_last_extra = data;
212	200	}
213	201
214	202	WRITE8_HANDLER( ballbomb_sh_port_2_w )
215	203	{
216		const device_config *samples = devtag_get_device(space->machine, "samples");
217		UINT8 rising_bits = data & ~port_2_last_extra;
	204	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	205	UINT8 rising_bits = data & ~state->port_2_last_extra;
218	206
219		if (data & 0x01) sample_start(samples, 0, 7, 0);      /* Indicates plane will drop bombs */
220		if (data & 0x04) sample_start(samples, 0, 4, 0);      /* Plane is dropping new balloons at start of level */
221		if (rising_bits & 0x10) sample_start(samples, 2, 2, 0);      /* Balloon hit and bomb drops */
	207	if (data & 0x01) sample_start(state->samples, 0, 7, 0);      /* Indicates plane will drop bombs */
	208	if (data & 0x04) sample_start(state->samples, 0, 4, 0);      /* Plane is dropping new balloons at start of level */
	209	if (rising_bits & 0x10) sample_start(state->samples, 2, 2, 0);      /* Balloon hit and bomb drops */
222	210
223		c8080bw_flip_screen_w(space, data & 0x20);
	211	state->c8080bw_flip_screen = data & 0x20;
224	212
225		port_2_last_extra = data;
	213	state->port_2_last_extra = data;
226	214	}
227	215
228	216
r6740	r6741
272	260	WRITE8_HANDLER( indianbt_sh_port_1_w )
273	261	{
274	262	/* bit 4 occurs every 5.25 seconds during gameplay */
	263	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	264	UINT8 rising_bits = data & ~state->port_1_last_extra;
275	265
276		const device_config *samples = devtag_get_device(space->machine, "samples");
277		UINT8 rising_bits = data & ~port_1_last_extra;
	266	if (rising_bits & 0x01) sample_start(state->samples, 1, 7, 0);      /* Death */
	267	if (rising_bits & 0x02) sample_start(state->samples, 0, 1, 0);      /* Shot Sound */
	268	if (rising_bits & 0x04) sample_start(state->samples, 2, 3, 0);      /* Move */
	269	if (rising_bits & 0x08) sample_start(state->samples, 3, 2, 0);      /* Hit */
278	270
279		if (rising_bits & 0x01) sample_start(samples, 1, 7, 0);   /* Death */
280		if (rising_bits & 0x02) sample_start(samples, 0, 1, 0);      /* Shot Sound */
281		if (rising_bits & 0x04) sample_start(samples, 2, 3, 0);      /* Move */
282		if (rising_bits & 0x08) sample_start(samples, 3, 2, 0);      /* Hit */
283
284	271	sound_global_enable(space->machine, data & 0x20);
285	272
286		c8080bw_screen_red_w(data & 0x01);
	273	state->screen_red = data & 0x01;
287	274
288		port_1_last_extra = data;
	275	state->port_1_last_extra = data;
289	276	}
290	277
291	278	WRITE8_HANDLER( indianbt_sh_port_2_w )
292	279	{
293		const device_config *samples = devtag_get_device(space->machine, "samples");
294		UINT8 rising_bits = data & ~port_2_last_extra;
	280	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	281	UINT8 rising_bits = data & ~state->port_2_last_extra;
295	282
296		if (rising_bits & 0x01) sample_start(samples, 4, 0, 0);      /* Bird dropped an egg, Lasso used */
297		if (rising_bits & 0x02) sample_start(samples, 4, 2, 0);   /* Egg hatches, egg shot */
298		if (rising_bits & 0x08) sample_start(samples, 5, 0, 0);      /* Grabber, Lasso caught something */
299		if (rising_bits & 0x10) sample_start(samples, 3, 7, 0);      /* Lasso sound */
	283	if (rising_bits & 0x01) sample_start(state->samples, 4, 0, 0);      /* Bird dropped an egg, Lasso used */
	284	if (rising_bits & 0x02) sample_start(state->samples, 4, 2, 0);      /* Egg hatches, egg shot */
	285	if (rising_bits & 0x08) sample_start(state->samples, 5, 0, 0);      /* Grabber, Lasso caught something */
	286	if (rising_bits & 0x10) sample_start(state->samples, 3, 7, 0);      /* Lasso sound */
300	287
301		port_2_last_extra = data;
	288	state->port_2_last_extra = data;
302	289	}
303	290
304	291	WRITE8_DEVICE_HANDLER( indianbt_sh_port_3_w )
r6740	r6741
455	442
456	443	/* We will cheat and just use the controls to scale the amplitude. */
457	444	/* It is the same as taking the (0 to 50k)/50k */
458		DISCRETE_ADJUSTMENT_TAG(POLARIS_ADJ_VR1, 0, 1, DISC_LINADJ, "VR1")
459		DISCRETE_ADJUSTMENT_TAG(POLARIS_ADJ_VR2, 0, 1, DISC_LINADJ, "VR2")
	445	DISCRETE_ADJUSTMENT(POLARIS_ADJ_VR1, 0, 1, DISC_LINADJ, "VR1")
	446	DISCRETE_ADJUSTMENT(POLARIS_ADJ_VR2, 0, 1, DISC_LINADJ, "VR2")
460	447	/* Extra cheating for VR3.  We will include the resistor scaling. */
461		DISCRETE_ADJUSTMENT_TAG(POLARIS_ADJ_VR3, 0, 0.5376, DISC_LINADJ, "VR3")
	448	DISCRETE_ADJUSTMENT(POLARIS_ADJ_VR3, 0, 0.5376, DISC_LINADJ, "VR3")
462	449
463	450	/******************************************************************************
464	451	*
r6740	r6741
646	633
647	634	WRITE8_DEVICE_HANDLER( polaris_sh_port_3_w )
648	635	{
	636	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
649	637
650	638	coin_lockout_global_w(device->machine, data & 0x04);  /* SX8 */
651	639
652		c8080bw_flip_screen_w(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), data & 0x20);  /* SX11 */
	640	state->c8080bw_flip_screen = data & 0x20;      /* SX11 */
653	641
654	642	/* 0x01 - SX6 - Plane Down */
655	643	discrete_sound_w(device, POLARIS_SX6_EN, data & 0x01);
r6740	r6741
749	737	/* We will set them to adjust the realitive     */
750	738	/* gains.                                       */
751	739	/************************************************/
752		DISCRETE_ADJUSTMENT_TAG(SCHASER_VR1, 0, RES_K(50)/(RES_K(50) + RES_K(470)), DISC_LINADJ, "VR1")
753		DISCRETE_ADJUSTMENT_TAG(SCHASER_VR2, 0, RES_K(50)/(RES_K(50) + 560 + RES_K(6.8) + RES_K(2)), DISC_LINADJ, "VR2")
754		DISCRETE_ADJUSTMENT_TAG(SCHASER_VR3, 0, RES_K(50)/(RES_K(50) + 560 + RES_K(6.8) + RES_K(10)), DISC_LINADJ, "VR3")
	740	DISCRETE_ADJUSTMENT(SCHASER_VR1, 0, RES_K(50)/(RES_K(50) + RES_K(470)), DISC_LINADJ, "VR1")
	741	DISCRETE_ADJUSTMENT(SCHASER_VR2, 0, RES_K(50)/(RES_K(50) + 560 + RES_K(6.8) + RES_K(2)), DISC_LINADJ, "VR2")
	742	DISCRETE_ADJUSTMENT(SCHASER_VR3, 0, RES_K(50)/(RES_K(50) + 560 + RES_K(6.8) + RES_K(10)), DISC_LINADJ, "VR3")
755	743
756	744	/************************************************/
757	745	/* Dot selection just selects between 4V and 8V */
r6740	r6741
799	787
800	788	WRITE8_HANDLER( schaser_sh_port_1_w )
801	789	{
802		const device_config *discrete = devtag_get_device(space->machine, "discrete");
803		const device_config *sn = devtag_get_device(space->machine, "snsnd");
804		static int last_effect = 0;
	790	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
805	791	int effect;
806	792
807	793	/* bit 0 - Dot Sound Enable (SX0)
r6740	r6741
812	798	bit 5 - Explosion (SX5) */
813	799
814	800	//printf( "schaser_sh_port_1_w: %02x\n", data );
815		discrete_sound_w(discrete, SCHASER_DOT_EN, data & 0x01);
816		discrete_sound_w(discrete, SCHASER_DOT_SEL, data & 0x02);
	801	discrete_sound_w(state->discrete, SCHASER_DOT_EN, data & 0x01);
	802	discrete_sound_w(state->discrete, SCHASER_DOT_SEL, data & 0x02);
817	803
818	804	/* The effect is a variable rate 555 timer.  A diode/resistor array is used to
819	805	* select the frequency.  Because of the diode voltage drop, we can not use the
r6740	r6741
822	808	* but the bleed time is so long, that we can just cheat and put the time on hold
823	809	* when effect = 0. */
824	810	effect = (data >> 2) & 0x07;
825		if (last_effect != effect)
	811	if (state->schaser_last_effect != effect)
826	812	{
827	813	if (effect)
828	814	{
829		if (attotime_compare(schaser_effect_555_time_remain, attotime_zero) != 0)
	815	if (attotime_compare(state->schaser_effect_555_time_remain, attotime_zero) != 0)
830	816	{
831	817	/* timer re-enabled, use up remaining 555 high time */
832		timer_adjust_oneshot(schaser_effect_555_timer, schaser_effect_555_time_remain, effect);
	818	timer_adjust_oneshot(state->schaser_effect_555_timer, state->schaser_effect_555_time_remain, effect);
833	819	}
834		else if (!schaser_effect_555_is_low)
	820	else if (!state->schaser_effect_555_is_low)
835	821	{
836	822	/* set 555 high time */
837	823	attotime new_time = attotime_make(0, ATTOSECONDS_PER_SECOND * .8873 * schaser_effect_rc[effect]);
838		timer_adjust_oneshot(schaser_effect_555_timer, new_time, effect);
	824	timer_adjust_oneshot(state->schaser_effect_555_timer, new_time, effect);
839	825	}
840	826	}
841	827	else
842	828	{
843	829	/* disable effect - stops at end of low cycle */
844		if (!schaser_effect_555_is_low)
	830	if (!state->schaser_effect_555_is_low)
845	831	{
846		schaser_effect_555_time_remain = timer_timeleft(schaser_effect_555_timer);
847		schaser_effect_555_time_remain_savable = attotime_to_double(schaser_effect_555_time_remain);
848		timer_adjust_oneshot(schaser_effect_555_timer, attotime_never, 0);
	832	state->schaser_effect_555_time_remain = timer_timeleft(state->schaser_effect_555_timer);
	833	state->schaser_effect_555_time_remain_savable = attotime_to_double(state->schaser_effect_555_time_remain);
	834	timer_adjust_oneshot(state->schaser_effect_555_timer, attotime_never, 0);
849	835	}
850	836	}
851		last_effect = effect;
	837	state->schaser_last_effect = effect;
852	838	}
853	839
854		schaser_explosion = (data >> 5) & 0x01;
855		if (schaser_explosion)
	840	state->schaser_explosion = (data >> 5) & 0x01;
	841	if (state->schaser_explosion)
856	842	{
857		sn76477_amplitude_res_w(sn, 1.0 / (1.0/RES_K(200) + 1.0/RES_K(68)));
	843	sn76477_amplitude_res_w(state->sn, 1.0 / (1.0/RES_K(200) + 1.0/RES_K(68)));
858	844	}
859	845	else
860	846	{
861		sn76477_amplitude_res_w(sn, RES_K(200));
	847	sn76477_amplitude_res_w(state->sn, RES_K(200));
862	848	}
863		sn76477_enable_w(sn, !(schaser_effect_555_is_low || schaser_explosion));
864		sn76477_one_shot_cap_voltage_w(sn, !(schaser_effect_555_is_low || schaser_explosion) ? 0 : SN76477_EXTERNAL_VOLTAGE_DISCONNECT);
865		sn76477_mixer_b_w(sn, schaser_explosion);
	849	sn76477_enable_w(state->sn, !(state->schaser_effect_555_is_low || state->schaser_explosion));
	850	sn76477_one_shot_cap_voltage_w(state->sn, !(state->schaser_effect_555_is_low || state->schaser_explosion) ? 0 : SN76477_EXTERNAL_VOLTAGE_DISCONNECT);
	851	sn76477_mixer_b_w(state->sn, state->schaser_explosion);
866	852	}
867	853
868	854	WRITE8_HANDLER( schaser_sh_port_2_w )
r6740	r6741
874	860	bit 4 - Field Control B (SX10)
875	861	bit 5 - Flip Screen */
876	862
877		const device_config *discrete = devtag_get_device(space->machine, "discrete");
	863	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
878	864
879		//printf( "schaser_sh_port_2_w: %02x\n", data );
	865	//printf( "schaser_sh_port_2_w: %02x\n", data );
880	866
881		discrete_sound_w(discrete, SCHASER_MUSIC_BIT, data & 0x01);
	867	discrete_sound_w(state->discrete, SCHASER_MUSIC_BIT, data & 0x01);
882	868
883		discrete_sound_w(discrete, SCHASER_SND_EN, data & 0x02);
	869	discrete_sound_w(state->discrete, SCHASER_SND_EN, data & 0x02);
884	870	sound_global_enable(space->machine, data & 0x02);
885	871
886	872	coin_lockout_global_w(space->machine, data & 0x04);
887	873
888		schaser_background_control_w(data & 0x18);
	874	state->schaser_background_disable = (data >> 3) & 0x01;
	875	state->schaser_background_select = (data >> 4) & 0x01;
889	876
890		c8080bw_flip_screen_w(space, data & 0x20);
	877	state->c8080bw_flip_screen = data & 0x20;
891	878
892		port_2_last_extra = data;
	879	state->port_2_last_extra = data;
893	880	}
894	881
895	882
896	883	static TIMER_CALLBACK( schaser_effect_555_cb )
897	884	{
898		const device_config *sn = devtag_get_device(machine, "snsnd");
	885	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
899	886	int effect = param;
900	887	attotime new_time;
901	888	/* Toggle 555 output */
902		schaser_effect_555_is_low = !schaser_effect_555_is_low;
903		schaser_effect_555_time_remain = attotime_zero;
904		schaser_effect_555_time_remain_savable = attotime_to_double(schaser_effect_555_time_remain);
	889	state->schaser_effect_555_is_low = !state->schaser_effect_555_is_low;
	890	state->schaser_effect_555_time_remain = attotime_zero;
	891	state->schaser_effect_555_time_remain_savable = attotime_to_double(state->schaser_effect_555_time_remain);
905	892
906		if (schaser_effect_555_is_low)
	893	if (state->schaser_effect_555_is_low)
907	894	new_time = attotime_div(PERIOD_OF_555_ASTABLE(0, RES_K(20), CAP_U(1)), 2);
908	895	else
909	896	{
r6740	r6741
912	899	else
913	900	new_time = attotime_never;
914	901	}
915		timer_adjust_oneshot(schaser_effect_555_timer, new_time, effect);
916		sn76477_enable_w(sn, !(schaser_effect_555_is_low || schaser_explosion));
917		sn76477_one_shot_cap_voltage_w(sn, !(schaser_effect_555_is_low || schaser_explosion) ? 0 : SN76477_EXTERNAL_VOLTAGE_DISCONNECT);
	902	timer_adjust_oneshot(state->schaser_effect_555_timer, new_time, effect);
	903	sn76477_enable_w(state->sn, !(state->schaser_effect_555_is_low || state->schaser_explosion));
	904	sn76477_one_shot_cap_voltage_w(state->sn, !(state->schaser_effect_555_is_low || state->schaser_explosion) ? 0 : SN76477_EXTERNAL_VOLTAGE_DISCONNECT);
918	905	}
919	906
920	907
921	908	static STATE_POSTLOAD( schaser_reinit_555_time_remain )
922	909	{
923		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
924		schaser_effect_555_time_remain = double_to_attotime(schaser_effect_555_time_remain_savable);
925		schaser_sh_port_2_w(space, 0, port_2_last_extra);
	910	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	911	const address_space *space = cpu_get_address_space(state->maincpu, ADDRESS_SPACE_PROGRAM);
	912	state->schaser_effect_555_time_remain = double_to_attotime(state->schaser_effect_555_time_remain_savable);
	913	schaser_sh_port_2_w(space, 0, state->port_2_last_extra);
926	914	}
927	915
928	916
929		MACHINE_START( schaser )
	917	MACHINE_START( schaser_sh )
930	918	{
931		schaser_effect_555_timer = timer_alloc(machine, schaser_effect_555_cb, NULL);
	919	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
932	920
933		state_save_register_global(machine, schaser_explosion);
934		state_save_register_global(machine, schaser_effect_555_is_low);
935		state_save_register_global(machine, schaser_effect_555_time_remain_savable);
936		state_save_register_global(machine, port_2_last_extra);
937		state_save_register_postload(machine, schaser_reinit_555_time_remain, NULL);
	921	state->schaser_effect_555_timer = timer_alloc(machine, schaser_effect_555_cb, NULL);
938	922
939		MACHINE_START_CALL(extra_8080bw_vh);
940		MACHINE_START_CALL(mw8080bw);
	923	state_save_register_global(machine, state->schaser_explosion);
	924	state_save_register_global(machine, state->schaser_effect_555_is_low);
	925	state_save_register_global(machine, state->schaser_effect_555_time_remain_savable);
	926	state_save_register_global(machine, state->port_2_last_extra);
	927	state_save_register_postload(machine, schaser_reinit_555_time_remain, NULL);
941	928	}
942	929
943	930
944		MACHINE_RESET( schaser )
	931	MACHINE_RESET( schaser_sh )
945	932	{
	933	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
946	934	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
947		schaser_effect_555_is_low = 0;
948		timer_adjust_oneshot(schaser_effect_555_timer, attotime_never, 0);
	935
	936	state->schaser_effect_555_is_low = 0;
	937	timer_adjust_oneshot(state->schaser_effect_555_timer, attotime_never, 0);
949	938	schaser_sh_port_1_w(space, 0, 0);
950	939	schaser_sh_port_2_w(space, 0, 0);
951		schaser_effect_555_time_remain = attotime_zero;
952		schaser_effect_555_time_remain_savable = attotime_to_double(schaser_effect_555_time_remain);
953
954		MACHINE_RESET_CALL(mw8080bw);
	940	state->schaser_effect_555_time_remain = attotime_zero;
	941	state->schaser_effect_555_time_remain_savable = attotime_to_double(state->schaser_effect_555_time_remain);
955	942	}
956	943
957	944
r6740	r6741
963	950
964	951	WRITE8_HANDLER( rollingc_sh_port_w )
965	952	{
966		const device_config *samples = devtag_get_device(space->machine, "samples");
967		UINT8 rising_bits = data & ~port_3_last_extra;
	953	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	954	UINT8 rising_bits = data & ~state->port_3_last_extra;
968	955
969		if (rising_bits & 0x02) sample_start(samples, 4, 0, 0);   /* Steering */
970		if (rising_bits & 0x04) sample_start(samples, 0, 1, 0);   /* Collision */
971		if (rising_bits & 0x10) sample_start(samples, 1, 8, 0);   /* Computer car is starting to move */
	956	if (rising_bits & 0x02) sample_start(state->samples, 4, 0, 0);   /* Steering */
	957	if (rising_bits & 0x04) sample_start(state->samples, 0, 1, 0);   /* Collision */
	958	if (rising_bits & 0x10) sample_start(state->samples, 1, 8, 0);   /* Computer car is starting to move */
972	959
973		port_3_last_extra = data;
	960	state->port_3_last_extra = data;
974	961	}
975	962
976	963
r6740	r6741
987	974
988	975	WRITE8_HANDLER( invrvnge_sh_port_w )
989	976	{
990		const device_config *samples = devtag_get_device(space->machine, "samples");
	977	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	978
991	979	switch (data)
992	980	{
993	981	case 0x06:
994		sample_start(samples, 1, 0, 0);            /* Shoot */
	982	sample_start(state->samples, 1, 0, 0);            /* Shoot */
995	983	break;
996	984
997	985	case 0x14:
998		sample_start(samples, 2, 2, 0);            /* Hit Alien */
	986	sample_start(state->samples, 2, 2, 0);            /* Hit Alien */
999	987	break;
1000	988
1001	989	case 0x16:
1002		sample_start(samples, 2, 5, 0);            /* Hit Asteroid */
	990	sample_start(state->samples, 2, 5, 0);            /* Hit Asteroid */
1003	991	break;
1004	992
1005	993	case 0x1e:
1006		sample_start(samples, 3, 1, 0);            /* Death (followed by 0x0a byte), also bit 4 of port 5 */
	994	sample_start(state->samples, 3, 1, 0);            /* Death (followed by 0x0a byte), also bit 4 of port 5 */
1007	995	break;
1008	996
1009	997	case 0x18:                  /* Fuel Low */
1010	998	case 0x30:                  /* Fuel bar filling up */
1011		sample_start(samples, 4, 7, 0);
	999	sample_start(state->samples, 4, 7, 0);
1012	1000	break;
1013	1001
1014	1002	case 0x02:                  /* Coin */
r6740	r6741
1018	1006	break;
1019	1007
1020	1008	case 0x3a:                  /* Thrust, Docking, extra ship? */
1021		sample_start(samples, 0, 8, 0);
	1009	sample_start(state->samples, 0, 8, 0);
1022	1010	break;
1023	1011	}
1024	1012	}
r6740	r6741
1031	1019
1032	1020	WRITE8_HANDLER( lupin3_sh_port_1_w )
1033	1021	{
1034		const device_config *samples = devtag_get_device(space->machine, "samples");
1035		const device_config *sn = devtag_get_device(space->machine, "snsnd");
1036		UINT8 rising_bits = data & ~port_1_last_extra;
	1022	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1023	UINT8 rising_bits = data & ~state->port_1_last_extra;
1037	1024
1038		if (rising_bits & 0x01) sample_start(samples, 0, 6, 0);      /* Walking, get money */
	1025	if (rising_bits & 0x01) sample_start(state->samples, 0, 6, 0);      /* Walking, get money */
1039	1026
1040		sn76477_enable_w(sn, data & 0x02 ? 0:1);         /* Helicopter */
	1027	sn76477_enable_w(state->sn, data & 0x02 ? 0:1);         /* Helicopter */
1041	1028
1042		if (rising_bits & 0x04) sample_start(samples, 0, 7, 0);      /* Translocate */
1043		if (rising_bits & 0x08) sample_start(samples, 0, 1, 0);      /* Jail */
1044		if (rising_bits & 0x10) sample_start(samples, 3, 8, 0);      /* Bonus Man */
	1029	if (rising_bits & 0x04) sample_start(state->samples, 0, 7, 0);      /* Translocate */
	1030	if (rising_bits & 0x08) sample_start(state->samples, 0, 1, 0);      /* Jail */
	1031	if (rising_bits & 0x10) sample_start(state->samples, 3, 8, 0);      /* Bonus Man */
1045	1032
1046		port_1_last_extra = data;
	1033	state->port_1_last_extra = data;
1047	1034	}
1048	1035
1049	1036	WRITE8_HANDLER( lupin3_sh_port_2_w )
1050	1037	{
1051		const device_config *samples = devtag_get_device(space->machine, "samples");
1052		UINT8 rising_bits = data & ~port_2_last_extra;
	1038	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1039	UINT8 rising_bits = data & ~state->port_2_last_extra;
1053	1040
1054		if (rising_bits & 0x01) sample_start(samples, 0, 3, 0);      /* Lands on top of building, wife kicks man */
1055		if (rising_bits & 0x02) sample_start(samples, 1, 2, 0);      /* deposit money, start intermission, end game */
1056		if (rising_bits & 0x04) sample_start(samples, 2, 5, 0);      /* deposit money, start intermission, Slides down rope */
1057		if (rising_bits & 0x08) sample_start(samples, 3, 0, 0);      /* start intermission, end game */
1058		//if (rising_bits & 0x10) sample_start(samples, 3, 9, 0);        /* Dog barking */
	1041	if (rising_bits & 0x01) sample_start(state->samples, 0, 3, 0);      /* Lands on top of building, wife kicks man */
	1042	if (rising_bits & 0x02) sample_start(state->samples, 1, 2, 0);      /* deposit money, start intermission, end game */
	1043	if (rising_bits & 0x04) sample_start(state->samples, 2, 5, 0);      /* deposit money, start intermission, Slides down rope */
	1044	if (rising_bits & 0x08) sample_start(state->samples, 3, 0, 0);      /* start intermission, end game */
	1045	//if (rising_bits & 0x10) sample_start(state->samples, 3, 9, 0);        /* Dog barking */
1059	1046
1060		lupin3_flip_screen_w(space, data & 0x60);
	1047	state->color_map = data & 0x40;
1061	1048
1062		port_2_last_extra = data;
	1049	state->c8080bw_flip_screen = (data & 0x20) && (input_port_read(space->machine, "IN2") & 0x04);
	1050
	1051	state->port_2_last_extra = data;
1063	1052	}
1064	1053
1065	1054
r6740	r6741
1075	1064	bit 3 = 1st speedup
1076	1065	Death is a stream of ff's with some fe's thrown in */
1077	1066
1078		const device_config *samples = devtag_get_device(space->machine, "samples");
1079		UINT8 rising_bits = data & ~port_1_last_extra;
	1067	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1068	UINT8 rising_bits = data & ~state->port_1_last_extra;
1080	1069
1081		if (rising_bits & 0x02) sample_start(samples, 1, 6, 0);      /* Ran over a dot */
1082		if (rising_bits & 0x10) sample_start(samples, 0, 1, 0);      /* Death */
	1070	if (rising_bits & 0x02) sample_start(state->samples, 1, 6, 0);      /* Ran over a dot */
	1071	if (rising_bits & 0x10) sample_start(state->samples, 0, 1, 0);      /* Death */
1083	1072
1084		port_1_last_extra = data;
	1073	state->port_1_last_extra = data;
1085	1074	}
1086	1075
1087	1076	WRITE8_HANDLER( schasrcv_sh_port_2_w )
1088	1077	{
1089		const device_config *speaker = devtag_get_device(space->machine, "speaker");
	1078	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
1090	1079
1091		speaker_level_w(speaker, (data & 0x01) ? 1 : 0);      /* End-of-Level */
	1080	speaker_level_w(state->speaker, (data & 0x01) ? 1 : 0);      /* End-of-Level */
1092	1081
1093	1082	sound_global_enable(space->machine, data & 0x10);
1094	1083
1095		c8080bw_flip_screen_w(space, data & 0x20);
	1084	state->c8080bw_flip_screen = data & 0x20;
1096	1085	}
1097	1086
1098	1087
r6740	r6741
1103	1092
1104	1093	WRITE8_HANDLER( yosakdon_sh_port_1_w )
1105	1094	{
1106		const device_config *samples = devtag_get_device(space->machine, "samples");
1107		UINT8 rising_bits = data & ~port_1_last_extra;
	1095	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1096	UINT8 rising_bits = data & ~state->port_1_last_extra;
1108	1097
1109		if (rising_bits & 0x01) sample_start(samples, 0, 3, 0);         /* Game Over */
1110		if (rising_bits & 0x02) sample_start(samples, 2, 0, 0);         /* Bird dead */
1111		if (rising_bits & 0x04) sample_start(samples, 0, 1, 0);         /* Rifle being fired */
1112		if (rising_bits & 0x08) sample_start(samples, 1, 2, 0);         /* Man dead */
1113		if (rising_bits & 0x10) sample_start(samples, 5, 8, 0);         /* Bonus Man? */
	1098	if (rising_bits & 0x01) sample_start(state->samples, 0, 3, 0);         /* Game Over */
	1099	if (rising_bits & 0x02) sample_start(state->samples, 2, 0, 0);         /* Bird dead */
	1100	if (rising_bits & 0x04) sample_start(state->samples, 0, 1, 0);         /* Rifle being fired */
	1101	if (rising_bits & 0x08) sample_start(state->samples, 1, 2, 0);         /* Man dead */
	1102	if (rising_bits & 0x10) sample_start(state->samples, 5, 8, 0);         /* Bonus Man? */
1114	1103
1115	1104	sound_global_enable(space->machine, data & 0x20);
1116	1105
1117		port_1_last_extra = data;
	1106	state->port_1_last_extra = data;
1118	1107	}
1119	1108
1120	1109	WRITE8_HANDLER( yosakdon_sh_port_2_w )
1121	1110	{
1122		const device_config *samples = devtag_get_device(space->machine, "samples");
1123		const device_config *sn = devtag_get_device(space->machine, "snsnd");
1124		UINT8 rising_bits = data & ~port_2_last_extra;
	1111	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1112	UINT8 rising_bits = data & ~state->port_2_last_extra;
1125	1113
1126		if (rising_bits & 0x01) sample_start(samples, 1, 6, 0);         /* Ready? , Game Over */
1127		if (rising_bits & 0x04) sample_start(samples, 3, 7, 0);         /* Big bird dead */
	1114	if (rising_bits & 0x01) sample_start(state->samples, 1, 6, 0);         /* Ready? , Game Over */
	1115	if (rising_bits & 0x04) sample_start(state->samples, 3, 7, 0);         /* Big bird dead */
1128	1116
1129		sn76477_enable_w(sn, data & 0x08 ? 0:1);            /* Big bird */
	1117	sn76477_enable_w(state->sn, data & 0x08 ? 0:1);            /* Big bird */
1130	1118
1131		if (rising_bits & 0x10) sample_start(samples, 2, 7, 0);         /* Game Over */
	1119	if (rising_bits & 0x10) sample_start(state->samples, 2, 7, 0);         /* Game Over */
1132	1120
1133		c8080bw_flip_screen_w(space, data & 0x20);
	1121	state->c8080bw_flip_screen = data & 0x20;
1134	1122
1135		port_2_last_extra = data;
	1123	state->port_2_last_extra = data;
1136	1124	}
1137	1125
1138	1126
r6740	r6741
1144	1132	WRITE8_HANDLER( shuttlei_sh_port_1_w )
1145	1133	{
1146	1134	/* bit 3 is high while you are alive and playing */
	1135	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1136	UINT8 rising_bits = data & ~state->port_1_last_extra;
1147	1137
1148		const device_config *samples = devtag_get_device(space->machine, "samples");
1149		const device_config *sn = devtag_get_device(space->machine, "snsnd");
1150		UINT8 rising_bits = data & ~port_1_last_extra;
	1138	if (rising_bits & 0x01) sample_start(state->samples, 4, 4, 0);         /* Fleet move */
	1139	if (rising_bits & 0x02) sample_start(state->samples, 5, 8, 0);         /* Extra Tank */
1151	1140
1152		if (rising_bits & 0x01) sample_start(samples, 4, 4, 0);         /* Fleet move */
1153		if (rising_bits & 0x02) sample_start(samples, 5, 8, 0);         /* Extra Tank */
	1141	sn76477_enable_w(state->sn, data & 0x04 ? 0:1);            /* UFO */
1154	1142
1155		sn76477_enable_w(sn, data & 0x04 ? 0:1);            /* UFO */
1156
1157		port_1_last_extra = data;
	1143	state->port_1_last_extra = data;
1158	1144	}
1159	1145
1160	1146	WRITE8_HANDLER( shuttlei_sh_port_2_w )
1161	1147	{
1162		const device_config *samples = devtag_get_device(space->machine, "samples");
	1148	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1149
1163	1150	switch (data)
1164	1151	{
1165	1152	case 0x23:
1166		sample_start(samples, 2, 2, 0);            /* Hit */
	1153	sample_start(state->samples, 2, 2, 0);            /* Hit */
1167	1154	break;
1168	1155
1169	1156	case 0x2b:
1170		sample_start(samples, 0, 0, 0);            /* Shoot */
	1157	sample_start(state->samples, 0, 0, 0);            /* Shoot */
1171	1158	break;
1172	1159
1173	1160	case 0xa3:
1174		sample_start(samples, 3, 7, 0);            /* Hit UFO */
	1161	sample_start(state->samples, 3, 7, 0);            /* Hit UFO */
1175	1162	break;
1176	1163
1177	1164	case 0xab:
1178		sample_start(samples, 1, 1, 0);            /* Death */
	1165	sample_start(state->samples, 1, 1, 0);            /* Death */
1179	1166	break;
1180	1167	}
1181	1168	}

src/mame/audio/mw8080bw.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "mw8080bw.h"
9	8	#include "sound/samples.h"
10	9	#include "sound/sn76477.h"
11	10	#include "sound/discrete.h"
	11	#include "includes/mw8080bw.h"
12	12
13	13
14
15	14	/*************************************
16	15	*
17		*  Globals
18		*
19		*************************************/
20
21		static UINT8 port_1_last;
22		static UINT8 port_2_last;
23
24
25
26		/*************************************
27		*
28	16	*  Audio setup
29	17	*
30	18	*************************************/
31	19
32	20	static SOUND_START( samples )
33	21	{
	22	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	23
34	24	/* setup for save states */
35		state_save_register_global(machine, port_1_last);
36		state_save_register_global(machine, port_2_last);
	25	state_save_register_global(machine, state->port_1_last);
	26	state_save_register_global(machine, state->port_2_last);
37	27	}
38	28
39	29
40
41	30	/*************************************
42	31	*
43	32	*  Implementation of tone generator used
r6740	r6741
45	34	*
46	35	*************************************/
47	36
48		#define MIDWAY_TONE_EN            NODE_100
49		#define MIDWAY_TONE_DATA_L         NODE_101
50		#define MIDWAY_TONE_DATA_H         NODE_102
51		#define MIDWAY_TONE_SND            NODE_103
52		#define MIDWAY_TONE_TRASFORM_OUT   NODE_104
53		#define MIDWAY_TONE_BEFORE_AMP_SND   NODE_105
	37	#define MIDWAY_TONE_EN              NODE_100
	38	#define MIDWAY_TONE_DATA_L          NODE_101
	39	#define MIDWAY_TONE_DATA_H          NODE_102
	40	#define MIDWAY_TONE_SND             NODE_103
	41	#define MIDWAY_TONE_TRASFORM_OUT    NODE_104
	42	#define MIDWAY_TONE_BEFORE_AMP_SND  NODE_105
54	43
55	44
56	45	#define MIDWAY_TONE_GENERATOR(discrete_op_amp_tvca_info) \
r6740	r6741
176	165
177	166	WRITE8_HANDLER( seawolf_audio_w )
178	167	{
179		const device_config *samples = devtag_get_device(space->machine, "samples");
180		UINT8 rising_bits = data & ~port_1_last;
	168	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	169	UINT8 rising_bits = data & ~state->port_1_last;
181	170
182	171	/* if (data & 0x01)  enable SHIP HIT sound */
183		if (rising_bits & 0x01) sample_start(samples, 0, 0, 0);
	172	if (rising_bits & 0x01) sample_start(state->samples, 0, 0, 0);
184	173
185	174	/* if (data & 0x02)  enable TORPEDO sound */
186		if (rising_bits & 0x02) sample_start(samples, 1, 1, 0);
	175	if (rising_bits & 0x02) sample_start(state->samples, 1, 1, 0);
187	176
188	177	/* if (data & 0x04)  enable DIVE sound */
189		if (rising_bits & 0x04) sample_start(samples, 2, 2, 0);
	178	if (rising_bits & 0x04) sample_start(state->samples, 2, 2, 0);
190	179
191	180	/* if (data & 0x08)  enable SONAR sound */
192		if (rising_bits & 0x08) sample_start(samples, 3, 3, 0);
	181	if (rising_bits & 0x08) sample_start(state->samples, 3, 3, 0);
193	182
194	183	/* if (data & 0x10)  enable MINE HIT sound */
195		if (rising_bits & 0x10) sample_start(samples, 4, 4, 0);
	184	if (rising_bits & 0x10) sample_start(state->samples, 4, 4, 0);
196	185
197	186	coin_counter_w(space->machine, 0, (data >> 5) & 0x01);
198	187
199	188	/* D6 and D7 are not connected */
200	189
201		port_1_last = data;
	190	state->port_1_last = data;
202	191	}
203	192
204	193
r6740	r6741
242	231
243	232	WRITE8_HANDLER( gunfight_audio_w )
244	233	{
245		const device_config *samples0 = devtag_get_device(space->machine, "samples1");
246		const device_config *samples1 = devtag_get_device(space->machine, "samples2");
	234	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
247	235
248	236	/* D0 and D1 are just tied to 1k resistors */
249	237
r6740	r6741
257	245
258	246	case 0x01:
259	247	/* enable LEFT SHOOT sound (left speaker) */
260		sample_start(samples0, 0, 0, 0);
	248	sample_start(state->samples1, 0, 0, 0);
261	249	break;
262	250
263	251	case 0x02:
264	252	/* enable RIGHT SHOOT sound (right speaker) */
265		sample_start(samples1, 0, 0, 0);
	253	sample_start(state->samples2, 0, 0, 0);
266	254	break;
267	255
268	256	case 0x03:
269	257	/* enable LEFT HIT sound (left speaker) */
270		sample_start(samples0, 0, 1, 0);
	258	sample_start(state->samples1, 0, 1, 0);
271	259	break;
272	260
273	261	case 0x04:
274	262	/* enable RIGHT HIT sound (right speaker) */
275		sample_start(samples1, 0, 1, 0);
	263	sample_start(state->samples2, 0, 1, 0);
276	264	break;
277	265
278	266	default:
279		logerror("%04x:  Unknown sh port write %02x\n",cpu_get_pc(space->cpu),data);
	267	logerror("%04x:  Unknown sh port write %02x\n", cpu_get_pc(space->cpu), data);
280	268	break;
281	269	}
282	270	}
r6740	r6741
289	277	*
290	278	*************************************/
291	279
292		#define TORNBASE_SQUAREW_240      NODE_01
293		#define TORNBASE_SQUAREW_960      NODE_02
294		#define TORNBASE_SQUAREW_120      NODE_03
	280	#define TORNBASE_SQUAREW_240        NODE_01
	281	#define TORNBASE_SQUAREW_960        NODE_02
	282	#define TORNBASE_SQUAREW_120        NODE_03
295	283
296		#define TORNBASE_TONE_240_EN      NODE_04
297		#define TORNBASE_TONE_960_EN      NODE_05
298		#define TORNBASE_TONE_120_EN      NODE_06
	284	#define TORNBASE_TONE_240_EN        NODE_04
	285	#define TORNBASE_TONE_960_EN        NODE_05
	286	#define TORNBASE_TONE_120_EN        NODE_06
299	287
300		#define TORNBASE_TONE_240_SND      NODE_07
301		#define TORNBASE_TONE_960_SND      NODE_08
302		#define TORNBASE_TONE_120_SND      NODE_09
303		#define TORNBASE_TONE_SND         NODE_10
304		#define TORNBASE_TONE_SND_FILT      NODE_11
	288	#define TORNBASE_TONE_240_SND       NODE_07
	289	#define TORNBASE_TONE_960_SND       NODE_08
	290	#define TORNBASE_TONE_120_SND       NODE_09
	291	#define TORNBASE_TONE_SND           NODE_10
	292	#define TORNBASE_TONE_SND_FILT      NODE_11
305	293
306	294
307	295	static DISCRETE_SOUND_START(tornbase)
r6740	r6741
425	413	*************************************/
426	414
427	415	/* nodes - inputs */
428		#define MAZE_P1_DATA         NODE_01
429		#define MAZE_P2_DATA         NODE_02
430		#define MAZE_TONE_TIMING      NODE_03
431		#define MAZE_COIN            NODE_04
	416	#define MAZE_P1_DATA             NODE_01
	417	#define MAZE_P2_DATA             NODE_02
	418	#define MAZE_TONE_TIMING         NODE_03
	419	#define MAZE_COIN                NODE_04
432	420
433	421	/* nodes - other */
434		#define MAZE_JOYSTICK_IN_USE   NODE_11
435		#define MAZE_AUDIO_ENABLE      NODE_12
436		#define MAZE_TONE_ENABLE      NODE_13
437		#define MAZE_GAME_OVER         NODE_14
438		#define MAZE_R305_306_308      NODE_15
439		#define MAZE_R303_309         NODE_16
440		#define MAZE_PLAYER_SEL         NODE_17
	422	#define MAZE_JOYSTICK_IN_USE     NODE_11
	423	#define MAZE_AUDIO_ENABLE        NODE_12
	424	#define MAZE_TONE_ENABLE         NODE_13
	425	#define MAZE_GAME_OVER           NODE_14
	426	#define MAZE_R305_306_308        NODE_15
	427	#define MAZE_R303_309            NODE_16
	428	#define MAZE_PLAYER_SEL          NODE_17
441	429
442	430	/* nodes - sounds */
443		#define MAZE_SND            NODE_18
	431	#define MAZE_SND                 NODE_18
444	432
445	433
446	434	static const discrete_555_desc maze_555_F2 =
r6740	r6741
618	606	*************************************/
619	607
620	608	/* nodes - inputs */
621		#define BOOTHILL_GAME_ON_EN         NODE_01
622		#define BOOTHILL_LEFT_SHOT_EN      NODE_02
623		#define BOOTHILL_RIGHT_SHOT_EN      NODE_03
624		#define BOOTHILL_LEFT_HIT_EN      NODE_04
625		#define BOOTHILL_RIGHT_HIT_EN      NODE_05
	609	#define BOOTHILL_GAME_ON_EN         NODE_01
	610	#define BOOTHILL_LEFT_SHOT_EN       NODE_02
	611	#define BOOTHILL_RIGHT_SHOT_EN      NODE_03
	612	#define BOOTHILL_LEFT_HIT_EN        NODE_04
	613	#define BOOTHILL_RIGHT_HIT_EN       NODE_05
626	614
627	615	/* nodes - sounds */
628		#define BOOTHILL_NOISE            NODE_06
629		#define BOOTHILL_L_SHOT_SND         NODE_07
630		#define BOOTHILL_R_SHOT_SND         NODE_08
631		#define BOOTHILL_L_HIT_SND         NODE_09
632		#define BOOTHILL_R_HIT_SND         NODE_10
	616	#define BOOTHILL_NOISE              NODE_06
	617	#define BOOTHILL_L_SHOT_SND         NODE_07
	618	#define BOOTHILL_R_SHOT_SND         NODE_08
	619	#define BOOTHILL_L_HIT_SND          NODE_09
	620	#define BOOTHILL_R_HIT_SND          NODE_10
633	621
634	622	/* nodes - adjusters */
635		#define BOOTHILL_MUSIC_ADJ         NODE_11
	623	#define BOOTHILL_MUSIC_ADJ          NODE_11
636	624
637	625
638	626	static const discrete_op_amp_tvca_info boothill_tone_tvca_info =
r6740	r6741
771	759	/* The low value of the pot is set to 75000.  A real 1M pot will never go to 0 anyways.
772	760	This will give the control more apparent volume range.
773	761	The music way overpowers the rest of the sounds anyways. */
774		DISCRETE_ADJUSTMENT_TAG(BOOTHILL_MUSIC_ADJ, RES_M(1), 75000, DISC_LOGADJ, "MUSIC_ADJ")
	762	DISCRETE_ADJUSTMENT(BOOTHILL_MUSIC_ADJ, RES_M(1), 75000, DISC_LOGADJ, "MUSIC_ADJ")
775	763
776	764	/************************************************
777	765	* Tone generator
r6740	r6741
862	850	*************************************/
863	851
864	852	/* nodes - inputs */
865		#define CHECKMAT_BOOM_EN         NODE_01
866		#define CHECKMAT_TONE_EN         NODE_02
867		#define CHECKMAT_TONE_DATA_45      NODE_03
868		#define CHECKMAT_TONE_DATA_67      NODE_04
	853	#define CHECKMAT_BOOM_EN            NODE_01
	854	#define CHECKMAT_TONE_EN            NODE_02
	855	#define CHECKMAT_TONE_DATA_45       NODE_03
	856	#define CHECKMAT_TONE_DATA_67       NODE_04
869	857
870	858	/* nodes - other */
871		#define CHECKMAT_R401_402_400      NODE_06
872		#define CHECKMAT_R407_406_410      NODE_07
	859	#define CHECKMAT_R401_402_400       NODE_06
	860	#define CHECKMAT_R407_406_410       NODE_07
873	861
874	862	/* nodes - sounds */
875		#define CHECKMAT_BOOM_SND         NODE_10
876		#define CHECKMAT_TONE_SND         NODE_11
877		#define CHECKMAT_FINAL_SND         NODE_12
	863	#define CHECKMAT_BOOM_SND           NODE_10
	864	#define CHECKMAT_TONE_SND           NODE_11
	865	#define CHECKMAT_FINAL_SND          NODE_12
878	866
879	867	/* nodes - adjusters */
880		#define CHECKMAT_R309            NODE_15
881		#define CHECKMAT_R411            NODE_16
	868	#define CHECKMAT_R309               NODE_15
	869	#define CHECKMAT_R411               NODE_16
882	870
883	871
884	872	static const discrete_comp_adder_table checkmat_r401_402_400 =
r6740	r6741
975	963	/* This is needed because the original controls are infinite, but the UI only gives 100 steps. */
976	964	/* Also real variable resistors never hit 0 ohms.  There is always some resistance. */
977	965	/* R309 mostly just increases the Boom clipping, making it sound bassier. */
978		DISCRETE_ADJUSTMENT_TAG(CHECKMAT_R309, RES_K(100), 1000, DISC_LOGADJ, "R309")
979		DISCRETE_ADJUSTMENT_TAG(CHECKMAT_R411, RES_M(1), 1000, DISC_LOGADJ, "R411")
	966	DISCRETE_ADJUSTMENT(CHECKMAT_R309, RES_K(100), 1000, DISC_LOGADJ, "R309")
	967	DISCRETE_ADJUSTMENT(CHECKMAT_R411, RES_M(1), 1000, DISC_LOGADJ, "R411")
980	968
981	969	/************************************************
982	970	* Boom Sound
r6740	r6741
1090	1078	*************************************/
1091	1079
1092	1080	/* nodes - inputs */
1093		#define DESERTGU_GAME_ON_EN               NODE_01
1094		#define DESERTGU_RIFLE_SHOT_EN            NODE_02
1095		#define DESERTGU_BOTTLE_HIT_EN            NODE_03
1096		#define DESERTGU_ROAD_RUNNER_HIT_EN         NODE_04
1097		#define DESERTGU_CREATURE_HIT_EN         NODE_05
1098		#define DESERTGU_ROADRUNNER_BEEP_BEEP_EN   NODE_06
1099		#define DESERTGU_TRIGGER_CLICK_EN         NODE_07
	1081	#define DESERTGU_GAME_ON_EN                   NODE_01
	1082	#define DESERTGU_RIFLE_SHOT_EN                NODE_02
	1083	#define DESERTGU_BOTTLE_HIT_EN                NODE_03
	1084	#define DESERTGU_ROAD_RUNNER_HIT_EN           NODE_04
	1085	#define DESERTGU_CREATURE_HIT_EN              NODE_05
	1086	#define DESERTGU_ROADRUNNER_BEEP_BEEP_EN      NODE_06
	1087	#define DESERTGU_TRIGGER_CLICK_EN             NODE_07
1100	1088
1101	1089	/* nodes - sounds */
1102		#define DESERTGU_NOISE                  NODE_08
1103		#define DESERTGU_RIFLE_SHOT_SND            NODE_09
1104		#define DESERTGU_BOTTLE_HIT_SND            NODE_10
1105		#define DESERTGU_ROAD_RUNNER_HIT_SND      NODE_11
1106		#define DESERTGU_CREATURE_HIT_SND         NODE_12
1107		#define DESERTGU_ROADRUNNER_BEEP_BEEP_SND   NODE_13
1108		#define DESERTGU_TRIGGER_CLICK_SND         DESERTGU_TRIGGER_CLICK_EN
	1090	#define DESERTGU_NOISE                        NODE_08
	1091	#define DESERTGU_RIFLE_SHOT_SND               NODE_09
	1092	#define DESERTGU_BOTTLE_HIT_SND               NODE_10
	1093	#define DESERTGU_ROAD_RUNNER_HIT_SND          NODE_11
	1094	#define DESERTGU_CREATURE_HIT_SND             NODE_12
	1095	#define DESERTGU_ROADRUNNER_BEEP_BEEP_SND     NODE_13
	1096	#define DESERTGU_TRIGGER_CLICK_SND            DESERTGU_TRIGGER_CLICK_EN
1109	1097
1110	1098	/* nodes - adjusters */
1111		#define DESERTGU_MUSIC_ADJ               NODE_15
	1099	#define DESERTGU_MUSIC_ADJ                    NODE_15
1112	1100
1113	1101
1114	1102	static const discrete_op_amp_tvca_info desertgu_rifle_shot_tvca_info =
r6740	r6741
1216	1204	/* The low value of the pot is set to 75000.  A real 1M pot will never go to 0 anyways. */
1217	1205	/* This will give the control more apparent volume range. */
1218	1206	/* The music way overpowers the rest of the sounds anyways. */
1219		DISCRETE_ADJUSTMENT_TAG(DESERTGU_MUSIC_ADJ, RES_M(1), 75000, DISC_LOGADJ, "MUSIC_ADJ")
	1207	DISCRETE_ADJUSTMENT(DESERTGU_MUSIC_ADJ, RES_M(1), 75000, DISC_LOGADJ, "MUSIC_ADJ")
1220	1208
1221	1209	/************************************************
1222	1210	* Tone generator
r6740	r6741
1296	1284
1297	1285	WRITE8_DEVICE_HANDLER( desertgu_audio_2_w )
1298	1286	{
	1287	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
	1288
1299	1289	discrete_sound_w(device, DESERTGU_ROADRUNNER_BEEP_BEEP_EN, (data >> 0) & 0x01);
1300	1290
1301	1291	discrete_sound_w(device, DESERTGU_TRIGGER_CLICK_EN, (data >> 1) & 0x01);
1302	1292
1303	1293	output_set_value("KICKER", (data >> 2) & 0x01);
1304	1294
1305		desertgun_set_controller_select((data >> 3) & 0x01);
	1295	state->desertgun_controller_select = (data >> 3) & 0x01;
1306	1296
1307	1297	/* D4-D7 are not connected */
1308	1298	}
r6740	r6741
1318	1308	*************************************/
1319	1309
1320	1310	/* nodes - inputs */
1321		#define DPLAY_GAME_ON_EN   NODE_01
1322		#define DPLAY_TONE_ON_EN   NODE_02
1323		#define DPLAY_SIREN_EN      NODE_03
1324		#define DPLAY_WHISTLE_EN   NODE_04
1325		#define DPLAY_CHEER_EN      NODE_05
	1311	#define DPLAY_GAME_ON_EN      NODE_01
	1312	#define DPLAY_TONE_ON_EN      NODE_02
	1313	#define DPLAY_SIREN_EN        NODE_03
	1314	#define DPLAY_WHISTLE_EN      NODE_04
	1315	#define DPLAY_CHEER_EN        NODE_05
1326	1316
1327	1317	/* nodes - sounds */
1328		#define DPLAY_NOISE         NODE_06
1329		#define DPLAY_TONE_SND      NODE_07
1330		#define DPLAY_SIREN_SND      NODE_08
1331		#define DPLAY_WHISTLE_SND   NODE_09
1332		#define DPLAY_CHEER_SND      NODE_10
	1318	#define DPLAY_NOISE           NODE_06
	1319	#define DPLAY_TONE_SND        NODE_07
	1320	#define DPLAY_SIREN_SND       NODE_08
	1321	#define DPLAY_WHISTLE_SND     NODE_09
	1322	#define DPLAY_CHEER_SND       NODE_10
1333	1323
1334	1324	/* nodes - adjusters */
1335		#define DPLAY_MUSIC_ADJ      NODE_11
	1325	#define DPLAY_MUSIC_ADJ       NODE_11
1336	1326
1337	1327
1338	1328	static const discrete_lfsr_desc dplay_lfsr =
r6740	r6741
1482	1472	/* The low value of the pot is set to 1000.  A real 1M pot will never go to 0 anyways. */
1483	1473	/* This will give the control more apparent volume range. */
1484	1474	/* The music way overpowers the rest of the sounds anyways. */
1485		DISCRETE_ADJUSTMENT_TAG(DPLAY_MUSIC_ADJ, RES_M(1), 1000, DISC_LOGADJ, "MUSIC_ADJ")
	1475	DISCRETE_ADJUSTMENT(DPLAY_MUSIC_ADJ, RES_M(1), 1000, DISC_LOGADJ, "MUSIC_ADJ")
1486	1476
1487	1477	/************************************************
1488	1478	* Music and Tone Generator
r6740	r6741
1603	1593	reversed (D5=R, D7=L), but the software confirms that
1604	1594	ours is right */
1605	1595
1606		const device_config *samples0 = devtag_get_device(space->machine, "samples1");
1607		const device_config *samples1 = devtag_get_device(space->machine, "samples2");
1608		UINT8 rising_bits = data & ~port_1_last;
	1596	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1597	UINT8 rising_bits = data & ~state->port_1_last;
1609	1598
1610	1599	/* D0 and D1 are not connected */
1611	1600
r6740	r6741
1614	1603	sound_global_enable(space->machine, (data >> 3) & 0x01);
1615	1604
1616	1605	/* if (data & 0x10)  enable RIGHT MISSILE sound (goes to right speaker) */
1617		if (rising_bits & 0x10) sample_start(samples1, 0, 0, 0);
	1606	if (rising_bits & 0x10) sample_start(state->samples2, 0, 0, 0);
1618	1607
1619	1608	/* if (data & 0x20)  enable LEFT EXPLOSION sound (goes to left speaker) */
1620	1609	output_set_value("L_EXP_LIGHT", (data >> 5) & 0x01);
1621		if (rising_bits & 0x20) sample_start(samples0, 0, 1, 0);
	1610	if (rising_bits & 0x20) sample_start(state->samples1, 0, 1, 0);
1622	1611
1623	1612	/* if (data & 0x40)  enable LEFT MISSILE sound (goes to left speaker) */
1624		if (rising_bits & 0x40) sample_start(samples0, 0, 0, 0);
	1613	if (rising_bits & 0x40) sample_start(state->samples1, 0, 0, 0);
1625	1614
1626	1615	/* if (data & 0x80)  enable RIGHT EXPLOSION sound (goes to right speaker) */
1627	1616	output_set_value("R_EXP_LIGHT", (data >> 7) & 0x01);
1628		if (rising_bits & 0x80) sample_start(samples1, 0, 1, 0);
	1617	if (rising_bits & 0x80) sample_start(state->samples2, 0, 1, 0);
1629	1618
1630		port_1_last = data;
	1619	state->port_1_last = data;
1631	1620	}
1632	1621
1633	1622
r6740	r6741
1699	1688
1700	1689	WRITE8_HANDLER( m4_audio_1_w )
1701	1690	{
1702		const device_config *samples0 = devtag_get_device(space->machine, "samples1");
1703		const device_config *samples1 = devtag_get_device(space->machine, "samples2");
1704		UINT8 rising_bits = data & ~port_1_last;
	1691	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1692	UINT8 rising_bits = data & ~state->port_1_last;
1705	1693
1706	1694	/* D0 and D1 are not connected */
1707	1695
r6740	r6741
1710	1698	sound_global_enable(space->machine, (data >> 3) & 0x01);
1711	1699
1712	1700	/* if (data & 0x10)  enable LEFT PLAYER SHOT sound (goes to left speaker) */
1713		if (rising_bits & 0x10) sample_start(samples0, 0, 0, 0);
	1701	if (rising_bits & 0x10) sample_start(state->samples1, 0, 0, 0);
1714	1702
1715	1703	/* if (data & 0x20)  enable RIGHT PLAYER SHOT sound (goes to right speaker) */
1716		if (rising_bits & 0x20) sample_start(samples1, 0, 0, 0);
	1704	if (rising_bits & 0x20) sample_start(state->samples2, 0, 0, 0);
1717	1705
1718	1706	/* if (data & 0x40)  enable LEFT PLAYER EXPLOSION sound via 300K res (goes to left speaker) */
1719		if (rising_bits & 0x40) sample_start(samples0, 1, 1, 0);
	1707	if (rising_bits & 0x40) sample_start(state->samples1, 1, 1, 0);
1720	1708
1721	1709	/* if (data & 0x80)  enable RIGHT PLAYER EXPLOSION sound via 300K res (goes to right speaker) */
1722		if (rising_bits & 0x80) sample_start(samples1, 1, 1, 0);
	1710	if (rising_bits & 0x80) sample_start(state->samples2, 1, 1, 0);
1723	1711
1724		port_1_last = data;
	1712	state->port_1_last = data;
1725	1713	}
1726	1714
1727	1715
1728	1716	WRITE8_HANDLER( m4_audio_2_w )
1729	1717	{
1730		const device_config *samples0 = devtag_get_device(space->machine, "samples1");
1731		const device_config *samples1 = devtag_get_device(space->machine, "samples2");
1732		UINT8 rising_bits = data & ~port_2_last;
	1718	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	1719	UINT8 rising_bits = data & ~state->port_2_last;
1733	1720
1734	1721	/* if (data & 0x01)  enable LEFT PLAYER EXPLOSION sound via 510K res (goes to left speaker) */
1735		if (rising_bits & 0x01) sample_start(samples0, 1, 1, 0);
	1722	if (rising_bits & 0x01) sample_start(state->samples1, 1, 1, 0);
1736	1723
1737	1724	/* if (data & 0x02)  enable RIGHT PLAYER EXPLOSION sound via 510K res (goes to right speaker) */
1738		if (rising_bits & 0x02) sample_start(samples1, 1, 1, 0);
	1725	if (rising_bits & 0x02) sample_start(state->samples2, 1, 1, 0);
1739	1726
1740	1727	/* if (data & 0x04)  enable LEFT TANK MOTOR sound (goes to left speaker) */
1741	1728
r6740	r6741
1749	1736
1750	1737	/* D6 and D7 are not connected */
1751	1738
1752		port_2_last = data;
	1739	state->port_2_last = data;
1753	1740	}
1754	1741
1755	1742
r6740	r6741
1763	1750	*************************************/
1764	1751
1765	1752	/* nodes - inputs */
1766		#define CLOWNS_POP_BOTTOM_EN      NODE_01
1767		#define CLOWNS_POP_MIDDLE_EN      NODE_02
1768		#define CLOWNS_POP_TOP_EN         NODE_03
1769		#define CLOWNS_SPRINGBOARD_HIT_EN   NODE_04
1770		#define CLOWNS_SPRINGBOARD_MISS_EN   NODE_05
	1753	#define CLOWNS_POP_BOTTOM_EN        NODE_01
	1754	#define CLOWNS_POP_MIDDLE_EN        NODE_02
	1755	#define CLOWNS_POP_TOP_EN           NODE_03
	1756	#define CLOWNS_SPRINGBOARD_HIT_EN   NODE_04
	1757	#define CLOWNS_SPRINGBOARD_MISS_EN  NODE_05
1771	1758
1772	1759	/* nodes - sounds */
1773		#define CLOWNS_NOISE            NODE_06
1774		#define CLOWNS_POP_SND            NODE_07
1775		#define CLOWNS_SB_HIT_SND         NODE_08
1776		#define CLOWNS_SB_MISS_SND         NODE_09
	1760	#define CLOWNS_NOISE                NODE_06
	1761	#define CLOWNS_POP_SND              NODE_07
	1762	#define CLOWNS_SB_HIT_SND           NODE_08
	1763	#define CLOWNS_SB_MISS_SND          NODE_09
1777	1764
1778	1765	/* nodes - adjusters */
1779		#define CLOWNS_R507_POT            NODE_11
	1766	#define CLOWNS_R507_POT             NODE_11
1780	1767
1781	1768
1782	1769	static const discrete_op_amp_tvca_info clowns_pop_tvca_info =
r6740	r6741
1889	1876	/* The low value of the pot is set to 7000.  A real 1M pot will never go to 0 anyways. */
1890	1877	/* This will give the control more apparent volume range. */
1891	1878	/* The music way overpowers the rest of the sounds anyways. */
1892		DISCRETE_ADJUSTMENT_TAG(CLOWNS_R507_POT, RES_M(1), 7000, DISC_LOGADJ, "R507")
	1879	DISCRETE_ADJUSTMENT(CLOWNS_R507_POT, RES_M(1), 7000, DISC_LOGADJ, "R507")
1893	1880
1894	1881	/************************************************
1895	1882	* Tone generator
r6740	r6741
1963	1950
1964	1951	WRITE8_HANDLER( clowns_audio_1_w )
1965	1952	{
	1953	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
1966	1954	coin_counter_w(space->machine, 0, (data >> 0) & 0x01);
1967	1955
1968		clowns_set_controller_select((data >> 1) & 0x01);
	1956	state->clowns_controller_select = (data >> 1) & 0x01;
1969	1957
1970	1958	/* D2-D7 are not connected */
1971	1959	}
r6740	r6741
1973	1961
1974	1962	WRITE8_DEVICE_HANDLER( clowns_audio_2_w )
1975	1963	{
1976		const device_config *samples = devtag_get_device(device->machine, "samples");
1977		UINT8 rising_bits = data & ~port_2_last;
	1964	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
	1965	UINT8 rising_bits = data & ~state->port_2_last;
1978	1966
1979	1967	discrete_sound_w(device, CLOWNS_POP_BOTTOM_EN, (data >> 0) & 0x01);
1980	1968
r6740	r6741
1986	1974
1987	1975	discrete_sound_w(device, CLOWNS_SPRINGBOARD_HIT_EN, (data >> 4) & 0x01);
1988	1976
1989		if (rising_bits & 0x20) sample_start(samples, 0, 0, 0);  /* springboard miss */
	1977	if (rising_bits & 0x20) sample_start(state->samples, 0, 0, 0);  /* springboard miss */
1990	1978
1991	1979	/* D6 and D7 are not connected */
1992	1980
1993		port_2_last = data;
	1981	state->port_2_last = data;
1994	1982	}
1995	1983
1996	1984
r6740	r6741
2004	1992	*************************************/
2005	1993
2006	1994	/* Discrete Sound Input Nodes */
2007		#define SPACWALK_TARGET_HIT_BOTTOM_EN      NODE_01
2008		#define SPACWALK_TARGET_HIT_MIDDLE_EN      NODE_02
2009		#define SPACWALK_TARGET_HIT_TOP_EN         NODE_03
2010		#define SPACWALK_SPRINGBOARD_HIT1_EN      NODE_04
2011		#define SPACWALK_SPRINGBOARD_HIT2_EN      NODE_05
2012		#define SPACWALK_SPRINGBOARD_MISS_EN      NODE_06
2013		#define SPACWALK_SPACE_SHIP_EN            NODE_07
	1995	#define SPACWALK_TARGET_HIT_BOTTOM_EN         NODE_01
	1996	#define SPACWALK_TARGET_HIT_MIDDLE_EN         NODE_02
	1997	#define SPACWALK_TARGET_HIT_TOP_EN            NODE_03
	1998	#define SPACWALK_SPRINGBOARD_HIT1_EN          NODE_04
	1999	#define SPACWALK_SPRINGBOARD_HIT2_EN          NODE_05
	2000	#define SPACWALK_SPRINGBOARD_MISS_EN          NODE_06
	2001	#define SPACWALK_SPACE_SHIP_EN                NODE_07
2014	2002
2015	2003	/* Discrete Sound Output Nodes */
2016		#define SPACWALK_NOISE                  NODE_10
2017		#define SPACWALK_TARGET_HIT_SND            NODE_11
2018		#define SPACWALK_SPRINGBOARD_HIT1_SND      NODE_12
2019		#define SPACWALK_SPRINGBOARD_HIT2_SND      NODE_13
2020		#define SPACWALK_SPRINGBOARD_MISS_SND      NODE_14
2021		#define SPACWALK_SPACE_SHIP_SND            NODE_15
	2004	#define SPACWALK_NOISE                        NODE_10
	2005	#define SPACWALK_TARGET_HIT_SND               NODE_11
	2006	#define SPACWALK_SPRINGBOARD_HIT1_SND         NODE_12
	2007	#define SPACWALK_SPRINGBOARD_HIT2_SND         NODE_13
	2008	#define SPACWALK_SPRINGBOARD_MISS_SND         NODE_14
	2009	#define SPACWALK_SPACE_SHIP_SND               NODE_15
2022	2010
2023	2011	/* Adjusters */
2024		#define SPACWALK_R507_POT         NODE_19
	2012	#define SPACWALK_R507_POT                     NODE_19
2025	2013
2026	2014	/* Parts List - Resistors */
2027	2015	#define SPACWALK_R200      RES_K(820)
r6740	r6741
2225	2213	/* The low value of the pot is set to 7000.  A real 1M pot will never go to 0 anyways. */
2226	2214	/* This will give the control more apparent volume range. */
2227	2215	/* The music way overpowers the rest of the sounds anyways. */
2228		DISCRETE_ADJUSTMENT_TAG(SPACWALK_R507_POT, SPACWALK_R507, 7000, DISC_LOGADJ, "R507")
	2216	DISCRETE_ADJUSTMENT(SPACWALK_R507_POT, SPACWALK_R507, 7000, DISC_LOGADJ, "R507")
2229	2217
2230	2218	/************************************************
2231	2219	* Tone generator
r6740	r6741
2329	2317
2330	2318	WRITE8_DEVICE_HANDLER( spacwalk_audio_1_w )
2331	2319	{
	2320	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
	2321
2332	2322	coin_counter_w(device->machine, 0, (data >> 0) & 0x01);
2333	2323
2334		clowns_set_controller_select((data >> 1) & 0x01);
	2324	state->clowns_controller_select = (data >> 1) & 0x01;
2335	2325
2336	2326	sound_global_enable(device->machine, (data >> 2) & 0x01);
2337	2327
r6740	r6741
2364	2354	*************************************/
2365	2355
2366	2356	/* Discrete Sound Input Nodes */
2367		#define SHUFFLE_ROLLING_1_EN      NODE_01
2368		#define SHUFFLE_ROLLING_2_EN      NODE_02
2369		#define SHUFFLE_ROLLING_3_EN      NODE_03
2370		#define SHUFFLE_FOUL_EN            NODE_04
2371		#define SHUFFLE_ROLLOVER_EN         NODE_05
2372		#define SHUFFLE_CLICK_EN         NODE_06
	2357	#define SHUFFLE_ROLLING_1_EN        NODE_01
	2358	#define SHUFFLE_ROLLING_2_EN        NODE_02
	2359	#define SHUFFLE_ROLLING_3_EN        NODE_03
	2360	#define SHUFFLE_FOUL_EN             NODE_04
	2361	#define SHUFFLE_ROLLOVER_EN         NODE_05
	2362	#define SHUFFLE_CLICK_EN            NODE_06
2373	2363
2374	2364	/* Discrete Sound Output Nodes */
2375		#define SHUFFLE_NOISE            NODE_10
2376		#define SHUFFLE_ROLLING_SND         NODE_11
2377		#define SHUFFLE_FOUL_SND         NODE_12
2378		#define SHUFFLE_ROLLOVER_SND      NODE_13
2379		#define SHUFFLE_CLICK_SND         NODE_14
	2365	#define SHUFFLE_NOISE               NODE_10
	2366	#define SHUFFLE_ROLLING_SND         NODE_11
	2367	#define SHUFFLE_FOUL_SND            NODE_12
	2368	#define SHUFFLE_ROLLOVER_SND        NODE_13
	2369	#define SHUFFLE_CLICK_SND           NODE_14
2380	2370
2381	2371	/* Parts List - Resistors */
2382	2372	#define SHUFFLE_R300   RES_K(33)
r6740	r6741
2677	2667
2678	2668
2679	2669	/* nodes - inputs */
2680		#define SPCENCTR_ENEMY_SHIP_SHOT_EN      NODE_01
2681		#define SPCENCTR_PLAYER_SHOT_EN         NODE_02
2682		#define SPCENCTR_SCREECH_EN            NODE_03
2683		#define SPCENCTR_CRASH_EN            NODE_04
2684		#define SPCENCTR_EXPLOSION_EN         NODE_05
2685		#define SPCENCTR_BONUS_EN            NODE_06
2686		#define SPCENCTR_WIND_DATA            NODE_07
	2670	#define SPCENCTR_ENEMY_SHIP_SHOT_EN       NODE_01
	2671	#define SPCENCTR_PLAYER_SHOT_EN           NODE_02
	2672	#define SPCENCTR_SCREECH_EN               NODE_03
	2673	#define SPCENCTR_CRASH_EN                 NODE_04
	2674	#define SPCENCTR_EXPLOSION_EN             NODE_05
	2675	#define SPCENCTR_BONUS_EN                 NODE_06
	2676	#define SPCENCTR_WIND_DATA                NODE_07
2687	2677
2688	2678	/* nodes - sounds */
2689		#define SPCENCTR_NOISE               NODE_10
2690		#define SPCENCTR_ENEMY_SHIP_SHOT_SND   NODE_11
2691		#define SPCENCTR_PLAYER_SHOT_SND      NODE_12
2692		#define SPCENCTR_SCREECH_SND         NODE_13
2693		#define SPCENCTR_CRASH_SND            NODE_14
2694		#define SPCENCTR_EXPLOSION_SND         NODE_15
2695		#define SPCENCTR_BONUS_SND            NODE_16
2696		#define SPCENCTR_WIND_SND            NODE_17
	2679	#define SPCENCTR_NOISE                    NODE_10
	2680	#define SPCENCTR_ENEMY_SHIP_SHOT_SND      NODE_11
	2681	#define SPCENCTR_PLAYER_SHOT_SND          NODE_12
	2682	#define SPCENCTR_SCREECH_SND              NODE_13
	2683	#define SPCENCTR_CRASH_SND                NODE_14
	2684	#define SPCENCTR_EXPLOSION_SND            NODE_15
	2685	#define SPCENCTR_BONUS_SND                NODE_16
	2686	#define SPCENCTR_WIND_SND                 NODE_17
2697	2687
2698	2688
2699	2689	static const discrete_op_amp_info spcenctr_enemy_ship_shot_op_amp_E1 =
r6740	r6741
3175	3165
3176	3166	WRITE8_DEVICE_HANDLER( spcenctr_audio_2_w )
3177	3167	{
	3168	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
	3169
3178	3170	/* set WIND SOUND FREQ(data & 0x0f)  0, if no wind */
3179	3171
3180	3172	discrete_sound_w(device, SPCENCTR_EXPLOSION_EN, (data >> 4) & 0x01);
r6740	r6741
3183	3175
3184	3176	/* D6 and D7 are not connected */
3185	3177
3186		port_2_last = data;
	3178	state->port_2_last = data;
3187	3179	}
3188	3180
3189	3181
3190	3182	WRITE8_DEVICE_HANDLER( spcenctr_audio_3_w )
3191	3183	{
3192		const device_config *sn = devtag_get_device(device->machine, "snsnd");
	3184	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
3193	3185
3194	3186	/* if (data & 0x01)  enable SCREECH (hit the sides) sound */
3195	3187
3196	3188	discrete_sound_w(device, SPCENCTR_ENEMY_SHIP_SHOT_EN, (data >> 1) & 0x01);
3197	3189
3198		spcenctr_set_strobe_state((data >> 2) & 0x01);
	3190	state->spcenctr_strobe_state = (data >> 2) & 0x01;
3199	3191
3200	3192	output_set_value("LAMP", (data >> 3) & 0x01);
3201	3193
3202	3194	discrete_sound_w(device, SPCENCTR_BONUS_EN, (data >> 4) & 0x01);
3203	3195
3204		sn76477_enable_w(sn, (data >> 5) & 0x01);   /* saucer sound */
	3196	sn76477_enable_w(state->sn, (data >> 5) & 0x01);   /* saucer sound */
3205	3197
3206	3198	/* D6 and D7 are not connected */
3207	3199	}
r6740	r6741
3242	3234
3243	3235	WRITE8_HANDLER( phantom2_audio_1_w )
3244	3236	{
3245		const device_config *samples = devtag_get_device(space->machine, "samples");
3246		UINT8 rising_bits = data & ~port_1_last;
	3237	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	3238	UINT8 rising_bits = data & ~state->port_1_last;
3247	3239
3248	3240	/* if (data & 0x01)  enable PLAYER SHOT sound */
3249		if (rising_bits & 0x01) sample_start(samples, 0, 0, 0);
	3241	if (rising_bits & 0x01) sample_start(state->samples, 0, 0, 0);
3250	3242
3251	3243	/* if (data & 0x02)  enable ENEMY SHOT sound */
3252	3244
r6740	r6741
3258	3250
3259	3251	/* D5-D7 are not connected */
3260	3252
3261		port_1_last = data;
	3253	state->port_1_last = data;
3262	3254	}
3263	3255
3264	3256
3265	3257	WRITE8_HANDLER( phantom2_audio_2_w )
3266	3258	{
3267		const device_config *samples = devtag_get_device(space->machine, "samples");
3268		UINT8 rising_bits = data & ~port_2_last;
	3259	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	3260	UINT8 rising_bits = data & ~state->port_2_last;
3269	3261
3270	3262	/* D0-D2 are not connected */
3271	3263
3272	3264	/* if (data & 0x08)  enable EXPLOSION sound */
3273		if (rising_bits & 0x08) sample_start(samples, 1, 1, 0);
	3265	if (rising_bits & 0x08) sample_start(state->samples, 1, 1, 0);
3274	3266
3275	3267	output_set_value("EXPLAMP", (data >> 4) & 0x01);
3276	3268
3277	3269	/* set JET SOUND FREQ((data >> 5) & 0x07)  0, if no jet sound */
3278	3270
3279		port_2_last = data;
	3271	state->port_2_last = data;
3280	3272	}
3281	3273
3282	3274
r6740	r6741
3291	3283	*************************************/
3292	3284
3293	3285	/* nodes - inputs */
3294		#define BOWLER_FOWL_EN         NODE_01
	3286	#define BOWLER_FOWL_EN            NODE_01
3295	3287
3296	3288	/* nodes - sounds */
3297		#define BOWLER_FOWL_SND         NODE_10
	3289	#define BOWLER_FOWL_SND           NODE_10
3298	3290
3299	3291
3300	3292	static const discrete_op_amp_tvca_info bowler_fowl_tvca =
r6740	r6741
3527	3519
3528	3520
3529	3521	/* nodes - inputs */
3530		#define INVADERS_SAUCER_HIT_EN            01
3531		#define INVADERS_FLEET_DATA               02
3532		#define INVADERS_BONUS_MISSLE_BASE_EN      03
3533		#define INVADERS_INVADER_HIT_EN            04
3534		#define INVADERS_EXPLOSION_EN            05
3535		#define INVADERS_MISSILE_EN               06
	3522	#define INVADERS_SAUCER_HIT_EN                01
	3523	#define INVADERS_FLEET_DATA                   02
	3524	#define INVADERS_BONUS_MISSLE_BASE_EN         03
	3525	#define INVADERS_INVADER_HIT_EN               04
	3526	#define INVADERS_EXPLOSION_EN                 05
	3527	#define INVADERS_MISSILE_EN                   06
3536	3528
3537	3529	/* nodes - sounds */
3538		#define INVADERS_NOISE                  NODE_10
3539		#define INVADERS_SAUCER_HIT_SND            11
3540		#define INVADERS_FLEET_SND               12
3541		#define INVADERS_BONUS_MISSLE_BASE_SND      13
3542		#define INVADERS_INVADER_HIT_SND         14
3543		#define INVADERS_EXPLOSION_SND            15
3544		#define INVADERS_MISSILE_SND            16
	3530	#define INVADERS_NOISE                        NODE_10
	3531	#define INVADERS_SAUCER_HIT_SND               11
	3532	#define INVADERS_FLEET_SND                    12
	3533	#define INVADERS_BONUS_MISSLE_BASE_SND        13
	3534	#define INVADERS_INVADER_HIT_SND              14
	3535	#define INVADERS_EXPLOSION_SND                15
	3536	#define INVADERS_MISSILE_SND                  16
3545	3537
3546	3538
3547	3539	static const discrete_op_amp_info invaders_saucer_hit_op_amp_B3_9 =
r6740	r6741
4095	4087
4096	4088	WRITE8_DEVICE_HANDLER( invaders_audio_1_w )
4097	4089	{
4098		const device_config *sn = devtag_get_device(device->machine, "snsnd");
	4090	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
4099	4091
4100		sn76477_enable_w(sn, (~data >> 0) & 0x01);   /* saucer sound */
	4092	sn76477_enable_w(state->sn, (~data >> 0) & 0x01);   /* saucer sound */
4101	4093
4102	4094	discrete_sound_w(device, INVADERS_NODE(INVADERS_MISSILE_EN, 1), data & 0x02);
4103	4095	discrete_sound_w(device, INVADERS_NODE(INVADERS_EXPLOSION_EN, 1), data & 0x04);
r6740	r6741
4112	4104
4113	4105	WRITE8_DEVICE_HANDLER( invaders_audio_2_w )
4114	4106	{
	4107	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
	4108
4115	4109	discrete_sound_w(device, INVADERS_NODE(INVADERS_FLEET_DATA, 1), data & 0x0f);
4116	4110	discrete_sound_w(device, INVADERS_NODE(INVADERS_SAUCER_HIT_EN, 1), data & 0x10);
4117	4111
4118	4112	/* the flip screen line is only connected on the cocktail PCB */
4119	4113	if (invaders_is_cabinet_cocktail(device->machine))
4120	4114	{
4121		invaders_set_flip_screen((data >> 5) & 0x01);
	4115	state->invaders_flip_screen = (data >> 5) & 0x01;
4122	4116	}
4123	4117
4124	4118	/* D6 and D7 are not connected */
r6740	r6741
4137	4131	*************************************/
4138	4132
4139	4133	/* nodes - inputs */
4140		#define BLUESHRK_OCTOPUS_EN      NODE_01
4141		#define BLUESHRK_HIT_EN         NODE_02
4142		#define BLUESHRK_SHARK_EN      NODE_03
4143		#define BLUESHRK_SHOT_EN      NODE_04
4144		#define BLUESHRK_GAME_ON_EN      NODE_05
	4134	#define BLUESHRK_OCTOPUS_EN         NODE_01
	4135	#define BLUESHRK_HIT_EN             NODE_02
	4136	#define BLUESHRK_SHARK_EN           NODE_03
	4137	#define BLUESHRK_SHOT_EN            NODE_04
	4138	#define BLUESHRK_GAME_ON_EN         NODE_05
4145	4139
4146	4140	/* nodes - sounds */
4147		#define BLUESHRK_NOISE_1      NODE_11
4148		#define BLUESHRK_NOISE_2      NODE_12
4149		#define BLUESHRK_OCTOPUS_SND   NODE_13
4150		#define BLUESHRK_HIT_SND      NODE_14
4151		#define BLUESHRK_SHARK_SND      NODE_15
4152		#define BLUESHRK_SHOT_SND      NODE_16
	4141	#define BLUESHRK_NOISE_1            NODE_11
	4142	#define BLUESHRK_NOISE_2            NODE_12
	4143	#define BLUESHRK_OCTOPUS_SND        NODE_13
	4144	#define BLUESHRK_HIT_SND            NODE_14
	4145	#define BLUESHRK_SHARK_SND          NODE_15
	4146	#define BLUESHRK_SHOT_SND           NODE_16
4153	4147
4154	4148	/* Parts List - Resistors */
4155	4149	#define BLUESHRK_R300   RES_M(1)
r6740	r6741
4726	4720
4727	4721	WRITE8_DEVICE_HANDLER( invad2ct_audio_1_w )
4728	4722	{
4729		const device_config *sn = devtag_get_device(device->machine, "sn1");
	4723	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
4730	4724
4731		sn76477_enable_w(sn, (~data >> 0) & 0x01);   /* saucer sound */
	4725	sn76477_enable_w(state->sn1, (~data >> 0) & 0x01);   /* saucer sound */
4732	4726
4733	4727	discrete_sound_w(device, INVADERS_NODE(INVADERS_MISSILE_EN, 1), data & 0x02);
4734	4728	discrete_sound_w(device, INVADERS_NODE(INVADERS_EXPLOSION_EN, 1), data & 0x04);
r6740	r6741
4752	4746
4753	4747	WRITE8_DEVICE_HANDLER( invad2ct_audio_3_w )
4754	4748	{
4755		const device_config *sn = devtag_get_device(device->machine, "sn2");
	4749	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
4756	4750
4757		sn76477_enable_w(sn, (~data >> 0) & 0x01);   /* saucer sound */
	4751	sn76477_enable_w(state->sn2, (~data >> 0) & 0x01);   /* saucer sound */
4758	4752
4759	4753	discrete_sound_w(device, INVADERS_NODE(INVADERS_MISSILE_EN, 2), data & 0x02);
4760	4754	discrete_sound_w(device, INVADERS_NODE(INVADERS_EXPLOSION_EN, 2), data & 0x04);

src/mame/audio/m79amb.c

r6740	r6741
4	4	************************************************************************/
5	5
6	6	#include "driver.h"
7		#include "m79amb.h"
	7	#include "includes/m79amb.h"
8	8	#include "sound/discrete.h"
9	9
10	10	#define   TIME_OF_9602(r, c)            (0.34 * (r) * (c) * (1.0 + 1.0 / (r)))

src/mame/audio/nitedrvr.c

r6740	r6741
4	4
5	5	*************************************************************************/
6	6	#include "driver.h"
7		#include "nitedrvr.h"
	7	#include "includes/nitedrvr.h"
8	8	#include "sound/discrete.h"
9	9
10	10
r6740	r6741
80	80	/* 0k = 214Hz.   250k = 4416Hz                  */
81	81	/************************************************/
82	82	DISCRETE_RCFILTER(NODE_20, NITEDRVR_MOTOR_DATA, 123037, 2.2e-6)
83		DISCRETE_ADJUSTMENT_TAG(NODE_21, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR")
	83	DISCRETE_ADJUSTMENT(NODE_21, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR")
84	84	DISCRETE_MULTIPLY(NODE_22, NODE_20, NODE_21)
85	85
86	86	DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6)   /* F1 = /12*2 = /6 */

src/mame/audio/targ.c

r6740	r6741
14	14	#include "driver.h"
15	15	#include "sound/samples.h"
16	16	#include "sound/dac.h"
17		#include "targ.h"
	17	#include "includes/targ.h"
18	18
19	19
20	20

src/mame/machine/xevious.c

r6740	r6741
17	17
18	18	***************************************************************************/
19	19
20		static emu_timer *nmi_timer;
21
22	20	static UINT8 customio[16];
23	21	static char battles_customio_command;
24	22	static char battles_customio_prev_command;
r6740	r6741
26	24	static char battles_customio_data;
27	25	static char battles_sound_played;
28	26
29		static TIMER_CALLBACK( battles_nmi_generate );
30	27
31
32	28	void battles_customio_init(running_machine *machine)
33	29	{
34	30	battles_customio_command = 0;
r6740	r6741
36	32	battles_customio_command_count = 0;
37	33	battles_customio_data = 0;
38	34	battles_sound_played = 0;
39		nmi_timer = timer_alloc(machine, battles_nmi_generate, NULL);
40	35	}
41	36
42	37
43		static TIMER_CALLBACK( battles_nmi_generate )
	38	TIMER_DEVICE_CALLBACK( battles_nmi_generate )
44	39	{
45	40
46	41	battles_customio_prev_command = battles_customio_command;
r6740	r6741
49	44	{
50	45	if( battles_customio_command_count == 0 )
51	46	{
52		cputag_set_input_line(machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
	47	cputag_set_input_line(timer->machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
53	48	}
54	49	else
55	50	{
56		cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
57		cputag_set_input_line(machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
	51	cputag_set_input_line(timer->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
	52	cputag_set_input_line(timer->machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
58	53	}
59	54	}
60	55	else
61	56	{
62		cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
63		cputag_set_input_line(machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
	57	cputag_set_input_line(timer->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
	58	cputag_set_input_line(timer->machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
64	59	}
65	60	battles_customio_command_count++;
66	61	}
r6740	r6741
94	89
95	90	WRITE8_HANDLER( battles_customio0_w )
96	91	{
	92	const device_config *timer = devtag_get_device(space->machine, "battles_nmi");
	93
97	94	logerror("CPU0 %04x: custom I/O Write = %02x\n",cpu_get_pc(space->cpu),data);
98	95
99	96	battles_customio_command = data;
r6740	r6741
102	99	switch (data)
103	100	{
104	101	case 0x10:
105		timer_adjust_oneshot(nmi_timer, attotime_never, 0);
	102	timer_device_adjust_oneshot(timer, attotime_never, 0);
106	103	return; /* nop */
107	104	}
108		timer_adjust_periodic(nmi_timer, ATTOTIME_IN_USEC(166), 0, ATTOTIME_IN_USEC(166));
	105	timer_device_adjust_periodic(timer, ATTOTIME_IN_USEC(166), 0, ATTOTIME_IN_USEC(166));
109	106
110	107	}
111	108

src/mame/machine/midyunit.c

r6740	r6741
8	8	#include "cpu/tms34010/tms34010.h"
9	9	#include "cpu/m6809/m6809.h"
10	10	#include "audio/williams.h"
11		#include "midyunit.h"
	11	#include "includes/midyunit.h"
12	12
13	13
14	14	/* constant definitions */

src/mame/machine/segas32.c

r6740	r6741
1	1	/* Sega System 32 Protection related functions */
2	2
3	3	#include "driver.h"
4		#include "segas32.h"
	4	#include "includes/segas32.h"
5	5
6	6
7	7	/******************************************************************************

src/mame/machine/acitya.c

r6740	r6741
184	184	}
185	185
186	186
187		MACHINE_RESET( acitya )
	187	MACHINE_START( acitya )
188	188	{
189	189	UINT8 *RAM = memory_region(machine, "maincpu");
190	190
r6740	r6741
196	196	acitya_decrypt_rom_A(machine);
197	197	acitya_decrypt_rom_B(machine);
198	198
199		/* The initial state of the counter is 0x0B */
200		counter = 0x0B;
201	199	memory_configure_bank(machine, "bank1", 0, 4, &RAM[0x10000], 0x4000);
202		memory_set_bank(machine, "bank1", 3);
203	200
204	201	state_save_register_global(machine, counter);
205	202	}
	203
	204
	205	MACHINE_RESET( acitya )
	206	{
	207	/* The initial state of the counter is 0x0B */
	208	counter = 0x0B;
	209	memory_set_bank(machine, "bank1", 3);
	210	}

src/mame/machine/asteroid.c

r6740	r6741
10	10	#include "driver.h"
11	11	#include "machine/atari_vg.h"
12	12	#include "video/avgdvg.h"
13		#include "asteroid.h"
	13	#include "includes/asteroid.h"
14	14
15	15	UINT8 *asteroid_ram1, *asteroid_ram2;
16	16

src/mame/machine/mhavoc.c

r6740	r6741
8	8	#include "video/avgdvg.h"
9	9	#include "sound/tms5220.h"
10	10	#include "cpu/m6502/m6502.h"
11		#include "mhavoc.h"
	11	#include "includes/mhavoc.h"
12	12
13	13	UINT8 *mhavoc_zram0, *mhavoc_zram1;
14	14
r6740	r6741
36	36	*
37	37	*************************************/
38	38
39		static TIMER_CALLBACK( cpu_irq_clock )
	39	TIMER_DEVICE_CALLBACK( mhavoc_cpu_irq_clock )
40	40	{
41	41	/* clock the LS161 driving the alpha CPU IRQ */
42	42	if (alpha_irq_clock_enable)
r6740	r6741
44	44	alpha_irq_clock++;
45	45	if ((alpha_irq_clock & 0x0c) == 0x0c)
46	46	{
47		cputag_set_input_line(machine, "alpha", 0, ASSERT_LINE);
	47	cputag_set_input_line(timer->machine, "alpha", 0, ASSERT_LINE);
48	48	alpha_irq_clock_enable = 0;
49	49	}
50	50	}
r6740	r6741
53	53	if (has_gamma_cpu)
54	54	{
55	55	gamma_irq_clock++;
56		cputag_set_input_line(machine, "gamma", 0, (gamma_irq_clock & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	56	cputag_set_input_line(timer->machine, "gamma", 0, (gamma_irq_clock & 0x08) ? ASSERT_LINE : CLEAR_LINE);
57	57	}
58	58	}
59	59
r6740	r6741
82	82	*
83	83	*************************************/
84	84
	85	MACHINE_START( mhavoc )
	86	{
	87	state_save_register_item(machine, "misc", NULL, 0, alpha_data);
	88	state_save_register_item(machine, "misc", NULL, 0, alpha_rcvd);
	89	state_save_register_item(machine, "misc", NULL, 0, alpha_xmtd);
	90	state_save_register_item(machine, "misc", NULL, 0, gamma_data);
	91	state_save_register_item(machine, "misc", NULL, 0, gamma_rcvd);
	92	state_save_register_item(machine, "misc", NULL, 0, gamma_xmtd);
	93	state_save_register_item(machine, "misc", NULL, 0, player_1);
	94	state_save_register_item(machine, "misc", NULL, 0, alpha_irq_clock);
	95	state_save_register_item(machine, "misc", NULL, 0, alpha_irq_clock_enable);
	96	state_save_register_item(machine, "misc", NULL, 0, gamma_irq_clock);
	97
	98	state_save_register_item(machine, "misc", NULL, 0, speech_write_buffer);
	99	}
	100
	101
85	102	MACHINE_RESET( mhavoc )
86	103	{
87	104	const address_space *space = cputag_get_address_space(machine, "alpha", ADDRESS_SPACE_PROGRAM);
r6740	r6741
112	129	alpha_irq_clock = 0;
113	130	alpha_irq_clock_enable = 1;
114	131	gamma_irq_clock = 0;
115
116		/* set a timer going for the CPU interrupt generators */
117		timer_pulse(machine, ATTOTIME_IN_HZ(MHAVOC_CLOCK_5K), NULL, 0, cpu_irq_clock);
118
119		state_save_register_item(machine, "misc", NULL, 0, alpha_data);
120		state_save_register_item(machine, "misc", NULL, 0, alpha_rcvd);
121		state_save_register_item(machine, "misc", NULL, 0, alpha_xmtd);
122		state_save_register_item(machine, "misc", NULL, 0, gamma_data);
123		state_save_register_item(machine, "misc", NULL, 0, gamma_rcvd);
124		state_save_register_item(machine, "misc", NULL, 0, gamma_xmtd);
125		state_save_register_item(machine, "misc", NULL, 0, player_1);
126		state_save_register_item(machine, "misc", NULL, 0, alpha_irq_clock);
127		state_save_register_item(machine, "misc", NULL, 0, alpha_irq_clock_enable);
128		state_save_register_item(machine, "misc", NULL, 0, gamma_irq_clock);
129
130		state_save_register_item(machine, "misc", NULL, 0, speech_write_buffer);
131	132	}
132	133
133	134

src/mame/machine/copsnrob.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "copsnrob.h"
	8	#include "includes/copsnrob.h"
9	9
10	10	static const int gun_mask[] = {0x7e, 0x7d, 0x7b, 0x77, 0x6f, 0x5f, 0x3f};
11	11

src/mame/machine/twincobr.c

r6740	r6741
6	6	#include "driver.h"
7	7	#include "cpu/m68000/m68000.h"
8	8	#include "cpu/tms32010/tms32010.h"
9		#include "twincobr.h"
	9	#include "includes/twincobr.h"
10	10
11	11
12	12	#define LOG_DSP_CALLS 0

src/mame/machine/irobot.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "profiler.h"
9	9	#include "cpu/m6809/m6809.h"
10		#include "irobot.h"
	10	#include "includes/irobot.h"
11	11
12	12	/* Note:
13	13	* There's probably something wrong with the way the Mathbox gets started.
r6740	r6741
35	35	static UINT8 irmb_running;
36	36
37	37	#if IR_TIMING
38		static emu_timer *irvg_timer;
39		static emu_timer *irmb_timer;
	38	static const device_config *irvg_timer;
	39	static const device_config *irmb_timer;
40	40	#endif
41	41
42	42	static UINT8 *comRAM[2], *mbRAM, *mbROM;
r6740	r6741
84	84	irobot_combase[BYTE_XOR_BE(offset & 0xFFF)] = data;
85	85	}
86	86
87		static TIMER_CALLBACK( irvg_done_callback )
	87	TIMER_DEVICE_CALLBACK( irobot_irvg_done_callback )
88	88	{
89	89	logerror("vg done. ");
90	90	irvg_running = 0;
r6740	r6741
112	112	else
113	113	logerror("vg start [busy!] ");
114	114	IR_CPU_STATE(space->machine);
115		timer_adjust_oneshot(irvg_timer, ATTOTIME_IN_MSEC(10), 0);
	115	timer_device_adjust_oneshot(irvg_timer, ATTOTIME_IN_MSEC(10), 0);
116	116	#endif
117	117	irvg_running=1;
118	118	}
r6740	r6741
188	188	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), NULL, scanline, scanline_callback);
189	189	}
190	190
191		static TIMER_CALLBACK( irmb_done_callback );
192	191	MACHINE_RESET( irobot )
193	192	{
194	193	UINT8 *MB = memory_region(machine, "mathbox");
r6740	r6741
201	200
202	201	irvg_vblank=0;
203	202	irvg_running = 0;
204		irvg_timer = timer_alloc(machine, irvg_done_callback, NULL);
	203	irvg_timer = devtag_get_device(machine, "irvg_timer");
205	204	irmb_running = 0;
206		irmb_timer = timer_alloc(machine, irmb_done_callback, NULL);
	205	irmb_timer = devtag_get_device(machine, "irmb_timer");
207	206
208	207	/* set an initial timer to go off on scanline 0 */
209	208	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), NULL, 0, scanline_callback);
r6740	r6741
453	452	load_oproms(machine);
454	453	}
455	454
456		static TIMER_CALLBACK( irmb_done_callback )
	455	TIMER_DEVICE_CALLBACK( irobot_irmb_done_callback )
457	456	{
458	457	logerror("mb done. ");
459	458	irmb_running = 0;
460		cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
	459	cputag_set_input_line(timer->machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
461	460	}
462	461
463	462
r6740	r6741
850	849	#if IR_TIMING
851	850	if (irmb_running == 0)
852	851	{
853		timer_adjust_oneshot(irmb_timer, attotime_mul(ATTOTIME_IN_HZ(12000000), icount), 0);
	852	timer_device_adjust_oneshot(irmb_timer, attotime_mul(ATTOTIME_IN_HZ(12000000), icount), 0);
854	853	logerror("mb start ");
855	854	IR_CPU_STATE(machine);
856	855	}
r6740	r6741
858	857	{
859	858	logerror("mb start [busy!] ");
860	859	IR_CPU_STATE(machine);
861		timer_adjust_oneshot(irmb_timer, attotime_mul(ATTOTIME_IN_NSEC(200), icount), 0);
	860	timer_device_adjust_oneshot(irmb_timer, attotime_mul(ATTOTIME_IN_NSEC(200), icount), 0);
862	861	}
863	862	#else
864	863	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);

src/mame/machine/leland.c

r6740	r6741
10	10	#include "cpu/i86/i86.h"
11	11	#include "machine/eeprom.h"
12	12	#include "cpu/z80/z80.h"
13		#include "leland.h"
	13	#include "includes/leland.h"
14	14	#include "sound/ay8910.h"
15	15
16	16

src/mame/machine/neoboot.c

r6740	r6741
13	13	***************************************************************************/
14	14
15	15	#include "driver.h"
16		#include "neogeo.h"
	16	#include "includes/neogeo.h"
17	17
18	18
19	19	/* General Bootleg Functions - used by more than 1 game */

src/mame/machine/segas24.c

r6740	r6741
1	1	#include "driver.h"
2		#include "system16.h"
	2	#include "includes/system16.h"
3	3	#include "includes/segas24.h"
4	4
5	5	/* system24temp_ functions / variables are from shared rewrite files,

src/mame/machine/konamigx.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "video/konamiic.h"
9		#include "konamigx.h"
	9	#include "includes/konamigx.h"
10	10
11	11	/***************************************************************************/
12	12	/*                                                                         */

src/mame/machine/ticket.c

r6740	r6741
16	16	#define DEBUG_TICKET 0
17	17	#define LOG(x) do { if (DEBUG_TICKET) logerror x; } while (0)
18	18
19		#define MAX_DISPENSERS   2
20	19
21		struct ticket_state
	20	typedef struct _ticket_state ticket_state;
	21	struct _ticket_state
22	22	{
	23	int active_bit;
	24	int time_msec;
	25	int motoron;
	26	int ticketdispensed;
	27	int ticketnotdispensed;
	28
23	29	UINT8 status;
24	30	UINT8 power;
25	31	emu_timer *timer;
26	32	};
27	33
28		static int active_bit = 0x80;
29		static int time_msec;
30		static int motoron;
31		static int ticketdispensed;
32		static int ticketnotdispensed;
	34	INLINE ticket_state *get_safe_token(const device_config *device)
	35	{
	36	assert(device != NULL);
	37	assert(device->token != NULL);
	38	assert(device->type == TICKET_DISPENSER);
33	39
34		static struct ticket_state dispenser[MAX_DISPENSERS];
	40	return (ticket_state *)device->token;
	41	}
35	42
36		static TIMER_CALLBACK( ticket_dispenser_toggle );
37	43
38
39		/***************************************************************************
40		ticket_dispenser_init
41
42		***************************************************************************/
43		void ticket_dispenser_init(running_machine *machine, int msec, int motoronhigh, int statusactivehigh)
	44	static TIMER_CALLBACK( ticket_dispenser_toggle )
44	45	{
45		int i;
	46	ticket_state *state = get_safe_token((const device_config *)ptr);
46	47
47		time_msec         = msec;
48		motoron            = motoronhigh  ? active_bit : 0;
49		ticketdispensed      = statusactivehigh ? active_bit : 0;
50		ticketnotdispensed   = ticketdispensed ^ active_bit;
	48	/* If we still have power, keep toggling ticket states. */
	49	if (state->power)
	50	{
	51	state->status ^= state->active_bit;
	52	LOG(("Ticket Status Changed to %02X\n", state->status));
	53	timer_adjust_oneshot(state->timer, ATTOTIME_IN_MSEC(state->time_msec), 0);
	54	}
51	55
52		for (i = 0; i < MAX_DISPENSERS; i++)
	56	if (state->status == state->ticketdispensed)
53	57	{
54		dispenser[i].status   = ticketnotdispensed;
55		dispenser[i].power    = 0x00;
56		dispenser[i].timer    = timer_alloc(machine, ticket_dispenser_toggle, &dispenser[i]);
	58	set_led_status(machine, 2,1);
	59	increment_dispensed_tickets(machine, 1);
57	60
58		state_save_register_item(machine, "ticket", NULL, i, dispenser[i].status);
59		state_save_register_item(machine, "ticket", NULL, i, dispenser[i].power);
	61	LOG(("Ticket Dispensed\n"));
60	62	}
	63	else
	64	{
	65	set_led_status(machine, 2,0);
	66	}
61	67	}
62	68
63		/***************************************************************************
64		ticket_dispenser_r
65		***************************************************************************/
66		READ8_HANDLER( ticket_dispenser_r )
67		{
68		return ticket_dispenser_0_r(space, offset);
69		}
70	69
71		READ8_HANDLER( ticket_dispenser_0_r )
	70	READ8_DEVICE_HANDLER( ticket_dispenser_r )
72	71	{
73		LOG(("PC: %04X  Ticket Status Read = %02X\n", cpu_get_pc(space->cpu), dispenser[0].status));
74		return dispenser[0].status;
	72	ticket_state *state = get_safe_token(device);
	73	LOG(("%s: Ticket Status Read = %02X\n", cpuexec_describe_context(device->machine), state->status));
	74	return state->status;
75	75	}
76	76
77		READ8_HANDLER( ticket_dispenser_1_r )
78		{
79		LOG(("PC: %04X  Ticket Status Read = %02X\n", cpu_get_pc(space->cpu), dispenser[1].status));
80		return dispenser[1].status;
81		}
82	77
83		CUSTOM_INPUT( ticket_dispenser_0_port_r )
	78	READ_LINE_DEVICE_HANDLER( ticket_dispenser_line_r )
84	79	{
85		return dispenser[0].status ? 1 : 0;
	80	ticket_state *state = get_safe_token(device);
	81	return state->status ? 1 : 0;
86	82	}
87	83
88		CUSTOM_INPUT( ticket_dispenser_1_port_r )
89		{
90		return dispenser[1].status ? 1 : 0;
91		}
92	84
93		/***************************************************************************
94		ticket_dispenser_w
95		***************************************************************************/
96		WRITE8_HANDLER( ticket_dispenser_w )
	85	WRITE8_DEVICE_HANDLER( ticket_dispenser_w )
97	86	{
98		ticket_dispenser_0_w(space, offset, data);
99		}
	87	ticket_state *state = get_safe_token(device);
100	88
101		WRITE8_HANDLER( ticket_dispenser_0_w )
102		{
103	89	/* On an activate signal, start dispensing! */
104		if ((data & active_bit) == motoron)
	90	if ((data & state->active_bit) == state->motoron)
105	91	{
106		if (!dispenser[0].power)
	92	if (!state->power)
107	93	{
108		LOG(("PC: %04X  Ticket Power On\n", cpu_get_pc(space->cpu)));
109		timer_adjust_oneshot(dispenser[0].timer, ATTOTIME_IN_MSEC(time_msec), 0);
110		dispenser[0].power = 1;
	94	LOG(("%s: Ticket Power On\n", cpuexec_describe_context(device->machine)));
	95	timer_adjust_oneshot(state->timer, ATTOTIME_IN_MSEC(state->time_msec), 0);
	96	state->power = 1;
111	97
112		dispenser[0].status = ticketnotdispensed;
	98	state->status = state->ticketnotdispensed;
113	99	}
114	100	}
115	101	else
116	102	{
117		if (dispenser[0].power)
	103	if (state->power)
118	104	{
119		LOG(("PC: %04X  Ticket Power Off\n", cpu_get_pc(space->cpu)));
120		timer_adjust_oneshot(dispenser[0].timer, attotime_never, 0);
121		set_led_status(space->machine, 2,0);
122		dispenser[0].power = 0;
	105	LOG(("%s: Ticket Power Off\n", cpuexec_describe_context(device->machine)));
	106	timer_adjust_oneshot(state->timer, attotime_never, 0);
	107	set_led_status(device->machine, 2,0);
	108	state->power = 0;
123	109	}
124	110	}
125	111	}
126	112
127		WRITE8_HANDLER( ticket_dispenser_1_w )
	113
	114
	115	/***************************************************************************
	116	DEVICE INTERFACE
	117	***************************************************************************/
	118
	119	/*-------------------------------------------------
	120	device start callback
	121	-------------------------------------------------*/
	122
	123	static DEVICE_START( ticket )
128	124	{
129		/* On an activate signal, start dispensing! */
130		if ((data & active_bit) == motoron)
131		{
132		if (!dispenser[1].power)
133		{
134		LOG(("PC: %04X  Ticket Power On\n", cpu_get_pc(space->cpu)));
135		timer_adjust_oneshot(dispenser[1].timer, ATTOTIME_IN_MSEC(time_msec), 0);
136		dispenser[1].power = 1;
	125	const ticket_config *config = (const ticket_config *)device->inline_config;
	126	ticket_state *state = get_safe_token(device);
137	127
138		dispenser[1].status = ticketnotdispensed;
139		}
140		}
141		else
142		{
143		if (dispenser[1].power)
144		{
145		LOG(("PC: %04X  Ticket Power Off\n", cpu_get_pc(space->cpu)));
146		timer_adjust_oneshot(dispenser[1].timer, attotime_never, 0);
147		set_led_status(space->machine, 2,0);
148		dispenser[1].power = 0;
149		}
150		}
	128	assert(config != NULL);
	129
	130	/* initialize the state */
	131	state->active_bit          = 0x80;
	132	state->time_msec         = device->clock;
	133	state->motoron            = config->motorhigh  ? state->active_bit : 0;
	134	state->ticketdispensed      = config->statushigh ? state->active_bit : 0;
	135	state->ticketnotdispensed   = state->ticketdispensed ^ state->active_bit;
	136
	137	state->timer             = timer_alloc(device->machine, ticket_dispenser_toggle, (void *)device);
	138
	139	state_save_register_device_item(device, 0, state->status);
	140	state_save_register_device_item(device, 0, state->power);
151	141	}
152	142
153	143
154		/***************************************************************************
155		ticket_dispenser_toggle
	144	/*-------------------------------------------------
	145	device reset callback
	146	-------------------------------------------------*/
156	147
157		How I think this works:
158		When a ticket dispenses, there is N milliseconds of status = high,
159		and N milliseconds of status = low (a wait cycle?).
160		***************************************************************************/
161		static TIMER_CALLBACK( ticket_dispenser_toggle )
	148	static DEVICE_RESET( ticket )
162	149	{
163		struct ticket_state *dispenser = (struct ticket_state *)ptr;
	150	ticket_state *state = get_safe_token(device);
	151	state->status            = state->ticketnotdispensed;
	152	state->power             = 0x00;
	153	}
164	154
165		/* If we still have power, keep toggling ticket states. */
166		if (dispenser->power)
167		{
168		dispenser->status ^= active_bit;
169		LOG(("Ticket Status Changed to %02X\n", dispenser->status));
170		timer_adjust_oneshot(dispenser->timer, ATTOTIME_IN_MSEC(time_msec), 0);
171		}
172	155
173		if (dispenser->status == ticketdispensed)
174		{
175		set_led_status(machine, 2,1);
176		increment_dispensed_tickets(machine, 1);
	156	/*-------------------------------------------------
	157	device definition
	158	-------------------------------------------------*/
177	159
178		LOG(("Ticket Dispensed\n"));
179		}
180		else
181		{
182		set_led_status(machine, 2,0);
183		}
184		}
	160	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
	161
	162	#define DEVTEMPLATE_ID(p,s)      p##ticket##s
	163	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET | DT_HAS_INLINE_CONFIG
	164	#define DEVTEMPLATE_NAME      "Ticket Dispenser"
	165	#define DEVTEMPLATE_FAMILY      "Generic"
	166	#include "devtempl.h"

src/mame/machine/stvcd.c

r6740	r6741
106	106	} trans32T;
107	107
108	108	// local variables
109		static emu_timer *sector_timer;
	109	static const device_config *sector_timer;
110	110	static partitionT partitions[MAX_FILTERS];
111	111	static partitionT *transpart;
112	112
r6740	r6741
182	182	#define CD_STAT_WAIT     0x8000      // waiting for command if set, else executed immediately
183	183	#define CD_STAT_REJECT   0xff00      // ultra-fatal error.
184	184
185		static TIMER_CALLBACK( sector_cb )
	185	TIMER_DEVICE_CALLBACK( stv_sector_cb )
186	186	{
187	187	if (fadstoplay)
188	188	{
r6740	r6741
199	199	cr3 = (cd_curfad>>16)&0xff;
200	200	cr4 = cd_curfad;
201	201
202		timer_adjust_oneshot(sector_timer, ATTOTIME_IN_HZ(150), 0);
	202	timer_device_adjust_oneshot(timer, ATTOTIME_IN_HZ(150), 0);
203	203	}
204	204
205	205	// global functions
r6740	r6741
274	274	cd_stat = CD_STAT_OPEN;
275	275	}
276	276
277		sector_timer = timer_alloc(machine, sector_cb, NULL);
278		timer_adjust_oneshot(sector_timer, ATTOTIME_IN_HZ(150), 0);   // 150 sectors / second = 300kBytes/second
	277	sector_timer = devtag_get_device(machine, "sector_timer");
	278	timer_device_adjust_oneshot(sector_timer, ATTOTIME_IN_HZ(150), 0);   // 150 sectors / second = 300kBytes/second
279	279	}
280	280
281	281	static blockT *cd_alloc_block(UINT8 *blknum)
r6740	r6741
766	766
767	767	// and do the disc I/O
768	768	// make sure it doesn't come in too early
769		timer_adjust_oneshot(sector_timer, attotime_never, 0);
770		timer_adjust_oneshot(sector_timer, ATTOTIME_IN_HZ(150), 0);   // 150 sectors / second = 300kBytes/second
	769	timer_device_adjust_oneshot(sector_timer, attotime_never, 0);
	770	timer_device_adjust_oneshot(sector_timer, ATTOTIME_IN_HZ(150), 0);   // 150 sectors / second = 300kBytes/second
771	771	break;
772	772
773	773	case 0x1100: // disk seek
r6740	r6741
1275	1275	playtype = 1;
1276	1276
1277	1277	// and do the disc I/O
1278		//          timer_adjust_oneshot(sector_timer, ATTOTIME_IN_HZ(150), 0);  // 150 sectors / second = 300kBytes/second
	1278	//          timer_device_adjust_oneshot(sector_timer, ATTOTIME_IN_HZ(150), 0);  // 150 sectors / second = 300kBytes/second
1279	1279	break;
1280	1280
1281	1281	case 0x7500:

src/mame/machine/dc.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "debugger.h"
9		#include "dc.h"
	9	#include "includes/dc.h"
10	10	#include "cpu/sh4/sh4.h"
11	11	#include "sound/aica.h"
12		#include "naomibd.h"
13		#include "naomi.h"
	12	#include "includes/naomibd.h"
	13	#include "includes/naomi.h"
14	14
15	15	#define DEBUG_REGISTERS   (1)
16	16
r6740	r6741
1336	1336
1337	1337	MACHINE_START( dc )
1338	1338	{
	1339	dc_rtc_timer = timer_alloc(machine, dc_rtc_increment, 0);
1339	1340	}
1340	1341
1341	1342	MACHINE_RESET( dc )
r6740	r6741
1348	1349	memset(dc_rtcregister, 0, sizeof(dc_rtcregister));
1349	1350	memset(dc_coin_counts, 0, sizeof(dc_coin_counts));
1350	1351
1351		dc_rtc_timer = timer_alloc(machine, dc_rtc_increment, 0);
1352	1352	timer_adjust_periodic(dc_rtc_timer, attotime_zero, 0, ATTOTIME_IN_SEC(1));
1353	1353
1354	1354	dc_sysctrl_regs[SB_SBREV] = 0x0b;

src/mame/machine/ticket.h

r6740	r6741
4	4
5	5	***************************************************************************/
6	6
7
8	7	#define TICKET_MOTOR_ACTIVE_LOW    0    /* Ticket motor is triggered by D7=0 */
9	8	#define TICKET_MOTOR_ACTIVE_HIGH   1    /* Ticket motor is triggered by D7=1 */
10	9
11	10	#define TICKET_STATUS_ACTIVE_LOW   0    /* Ticket is done dispensing when D7=0 */
12	11	#define TICKET_STATUS_ACTIVE_HIGH  1    /* Ticket is done dispensing when D7=1 */
13	12
14		/***************************************************************************
15		ticket_dispenser_init
16	13
17		msec       = how many milliseconds it takes to dispense a ticket
18		activehigh = see constants above
19	14
20		***************************************************************************/
21		void ticket_dispenser_init(running_machine *machine, int msec, int motoractivehigh, int statusactivehigh);
	15	typedef struct _ticket_config ticket_config;
	16	struct _ticket_config
	17	{
	18	UINT8   motorhigh;
	19	UINT8   statushigh;
	20	};
22	21
23	22
24		/***************************************************************************
25		ticket_dispenser_r
26		***************************************************************************/
27		READ8_HANDLER( ticket_dispenser_r );
28		READ8_HANDLER( ticket_dispenser_0_r );
29		READ8_HANDLER( ticket_dispenser_1_r );
	23	#define MDRV_TICKET_DISPENSER_ADD(_tag, _clock, _motorhigh, _statushigh) \
	24	MDRV_DEVICE_ADD(_tag, TICKET_DISPENSER, _clock) \
	25	MDRV_DEVICE_CONFIG_DATA32(ticket_config, motorhigh, _motorhigh) \
	26	MDRV_DEVICE_CONFIG_DATA32(ticket_config, statushigh, _statushigh)
30	27
31		CUSTOM_INPUT( ticket_dispenser_0_port_r );
32		CUSTOM_INPUT( ticket_dispenser_1_port_r );
33	28
	29	READ8_DEVICE_HANDLER( ticket_dispenser_r );
	30	WRITE8_DEVICE_HANDLER( ticket_dispenser_w );
34	31
35		/***************************************************************************
36		ticket_dispenser_w
37		***************************************************************************/
38		WRITE8_HANDLER( ticket_dispenser_w );
39		WRITE8_HANDLER( ticket_dispenser_0_w );
40		WRITE8_HANDLER( ticket_dispenser_1_w );
	32	READ_LINE_DEVICE_HANDLER( ticket_dispenser_line_r );
41	33
	34	/* device interface */
	35	#define TICKET_DISPENSER DEVICE_GET_INFO_NAME(ticket)
	36	DEVICE_GET_INFO( ticket );

src/mame/machine/stvcd.h

r6740	r6741
12	12	void stvcd_reset(running_machine* machine);
13	13	void stvcd_exit(running_machine* machine);
14	14
	15	TIMER_DEVICE_CALLBACK( stv_sector_cb );
	16
15	17	READ32_HANDLER( stvcd_r );
16	18	WRITE32_HANDLER( stvcd_w );
17	19

src/mame/machine/midtunit.c

r6740	r6741
9	9	#include "cpu/m6809/m6809.h"
10	10	#include "audio/williams.h"
11	11	#include "audio/dcs.h"
12		#include "midtunit.h"
	12	#include "includes/midtunit.h"
13	13
14	14
15	15	/* compile-time constants */

src/mame/machine/carpolo.c

r6740	r6741
58	58	#define CAR_BORDER_EXTRA_BITS      0x50
59	59
60	60
61		#define TTL74148_3S               0
62	61
63		#define TTL74153_1K               0
64
65		#define TTL7474_2S_1            0
66		#define TTL7474_2S_2            1
67		#define TTL7474_2U_1            2
68		#define TTL7474_2U_2            3
69		#define TTL7474_1F_1            4
70		#define TTL7474_1F_2            5
71		#define TTL7474_1D_1            6
72		#define TTL7474_1D_2            7
73		#define TTL7474_1C_1            8
74		#define TTL7474_1C_2            9
75		#define TTL7474_1A_1            10
76		#define TTL7474_1A_2            11
77
78
79	62	static UINT8 ball_screen_collision_cause;
80	63	static UINT8 car_ball_collision_x;
81	64	static UINT8 car_ball_collision_y;
r6740	r6741
86	69	static UINT8 priority_0_extension;
87	70	static UINT8 last_wheel_value[4];
88	71
	72	static const device_config *ttl74148_3s;
89	73
90		static void TTL74148_3S_cb(running_machine *machine)
	74	static const device_config *ttl74153_1k;
	75
	76	static const device_config *ttl7474_2s_1;
	77	static const device_config *ttl7474_2s_2;
	78	static const device_config *ttl7474_2u_1;
	79	static const device_config *ttl7474_2u_2;
	80	static const device_config *ttl7474_1f_1;
	81	static const device_config *ttl7474_1f_2;
	82	static const device_config *ttl7474_1d_1;
	83	static const device_config *ttl7474_1d_2;
	84	static const device_config *ttl7474_1c_1;
	85	static const device_config *ttl7474_1c_2;
	86	static const device_config *ttl7474_1a_1;
	87	static const device_config *ttl7474_1a_2;
	88
	89
	90	void carpolo_74148_3s_cb(const device_config *device)
91	91	{
92		cputag_set_input_line(machine, "maincpu", M6502_IRQ_LINE, TTL74148_output_valid_r(TTL74148_3S) ? CLEAR_LINE : ASSERT_LINE);
	92	cputag_set_input_line(device->machine, "maincpu", M6502_IRQ_LINE, ttl74148_output_valid_r(device) ? CLEAR_LINE : ASSERT_LINE);
93	93	}
94	94
95	95
96	96	/* the outputs of the flip-flops are connected to the priority encoder */
97		static void TTL7474_2S_1_cb(running_machine *machine)
	97	void carpolo_7474_2s_1_cb(const device_config *device)
98	98	{
99		TTL74148_input_line_w(TTL74148_3S, COIN1_PRIORITY_LINE, TTL7474_output_comp_r(TTL7474_2S_1));
100		TTL74148_update(machine, TTL74148_3S);
	99	ttl74148_input_line_w(ttl74148_3s, COIN1_PRIORITY_LINE, ttl7474_output_comp_r(device));
	100	ttl74148_update(ttl74148_3s);
101	101	}
102	102
103		static void TTL7474_2S_2_cb(running_machine *machine)
	103	void carpolo_7474_2s_2_cb(const device_config *device)
104	104	{
105		TTL74148_input_line_w(TTL74148_3S, COIN2_PRIORITY_LINE, TTL7474_output_comp_r(TTL7474_2S_2));
106		TTL74148_update(machine, TTL74148_3S);
	105	ttl74148_input_line_w(ttl74148_3s, COIN2_PRIORITY_LINE, ttl7474_output_comp_r(device));
	106	ttl74148_update(ttl74148_3s);
107	107	}
108	108
109		static void TTL7474_2U_1_cb(running_machine *machine)
	109	void carpolo_7474_2u_1_cb(const device_config *device)
110	110	{
111		TTL74148_input_line_w(TTL74148_3S, COIN3_PRIORITY_LINE, TTL7474_output_comp_r(TTL7474_2U_1));
112		TTL74148_update(machine, TTL74148_3S);
	111	ttl74148_input_line_w(ttl74148_3s, COIN3_PRIORITY_LINE, ttl7474_output_comp_r(device));
	112	ttl74148_update(ttl74148_3s);
113	113	}
114	114
115		static void TTL7474_2U_2_cb(running_machine *machine)
	115	void carpolo_7474_2u_2_cb(const device_config *device)
116	116	{
117		TTL74148_input_line_w(TTL74148_3S, COIN4_PRIORITY_LINE, TTL7474_output_comp_r(TTL7474_2U_2));
118		TTL74148_update(machine, TTL74148_3S);
	117	ttl74148_input_line_w(ttl74148_3s, COIN4_PRIORITY_LINE, ttl7474_output_comp_r(device));
	118	ttl74148_update(ttl74148_3s);
119	119	}
120	120
121	121
r6740	r6741
123	123	{
124	124	ball_screen_collision_cause = cause;
125	125
126		TTL74148_input_line_w(TTL74148_3S, BALL_SCREEN_PRIORITY_LINE, 0);
127		TTL74148_update(machine, TTL74148_3S);
	126	ttl74148_input_line_w(ttl74148_3s, BALL_SCREEN_PRIORITY_LINE, 0);
	127	ttl74148_update(ttl74148_3s);
128	128	}
129	129
130	130	void carpolo_generate_car_car_interrupt(running_machine *machine, int car1, int car2)
131	131	{
132	132	car_car_collision_cause = ~((1 << (3 - car1)) | (1 << (3 - car2)));
133	133
134		TTL74148_input_line_w(TTL74148_3S, CAR_CAR_PRIORITY_LINE, 0);
135		TTL74148_update(machine, TTL74148_3S);
	134	ttl74148_input_line_w(ttl74148_3s, CAR_CAR_PRIORITY_LINE, 0);
	135	ttl74148_update(ttl74148_3s);
136	136	}
137	137
138	138	void carpolo_generate_car_goal_interrupt(running_machine *machine, int car, int right_goal)
139	139	{
140	140	car_goal_collision_cause = car | (right_goal ? 0x08 : 0x00);
141	141
142		TTL74148_input_line_w(TTL74148_3S, CAR_GOAL_PRIORITY_LINE, 0);
143		TTL74148_update(machine, TTL74148_3S);
	142	ttl74148_input_line_w(ttl74148_3s, CAR_GOAL_PRIORITY_LINE, 0);
	143	ttl74148_update(ttl74148_3s);
144	144	}
145	145
146	146	void carpolo_generate_car_ball_interrupt(running_machine *machine, int car, int car_x, int car_y)
r6740	r6741
151	151
152	152	priority_0_extension = CAR_BALL_EXTRA_BITS;
153	153
154		TTL74148_input_line_w(TTL74148_3S, PRI0_PRIORTITY_LINE, 0);
155		TTL74148_update(machine, TTL74148_3S);
	154	ttl74148_input_line_w(ttl74148_3s, PRI0_PRIORTITY_LINE, 0);
	155	ttl74148_update(ttl74148_3s);
156	156	}
157	157
158	158	void carpolo_generate_car_border_interrupt(running_machine *machine, int car, int horizontal_border)
r6740	r6741
161	161
162	162	priority_0_extension = CAR_BORDER_EXTRA_BITS;
163	163
164		TTL74148_input_line_w(TTL74148_3S, PRI0_PRIORTITY_LINE, 0);
165		TTL74148_update(machine, TTL74148_3S);
	164	ttl74148_input_line_w(ttl74148_3s, PRI0_PRIORTITY_LINE, 0);
	165	ttl74148_update(ttl74148_3s);
166	166	}
167	167
168	168
r6740	r6741
222	222	READ8_HANDLER( carpolo_interrupt_cause_r )
223	223	{
224	224	/* the output of the 148 goes to bits 1-3 (which is priority ^ 7) */
225		return (TTL74148_output_r(TTL74148_3S) << 1) | priority_0_extension;
	225	return (ttl74148_output_r(ttl74148_3s) << 1) | priority_0_extension;
226	226	}
227	227
228	228
r6740	r6741
233	233
234	234
235	235	/* cause the timer interrupt */
236		TTL74148_input_line_w(TTL74148_3S, PRI0_PRIORTITY_LINE, 0);
	236	ttl74148_input_line_w(ttl74148_3s, PRI0_PRIORTITY_LINE, 0);
237	237	priority_0_extension = TIMER_EXTRA_BITS;
238	238
239		TTL74148_update(device->machine, TTL74148_3S);
	239	ttl74148_update(ttl74148_3s);
240	240
241	241
242	242	/* check the coins here as well - they drive the clock of the flip-flops */
243	243	port_value = input_port_read(device->machine, "IN0");
244	244
245		TTL7474_clock_w(TTL7474_2S_1, port_value & 0x01);
246		TTL7474_clock_w(TTL7474_2S_2, port_value & 0x02);
247		TTL7474_clock_w(TTL7474_2U_1, port_value & 0x04);
248		TTL7474_clock_w(TTL7474_2U_2, port_value & 0x08);
	245	ttl7474_clock_w(ttl7474_2s_1, port_value & 0x01);
	246	ttl7474_clock_w(ttl7474_2s_2, port_value & 0x02);
	247	ttl7474_clock_w(ttl7474_2u_1, port_value & 0x04);
	248	ttl7474_clock_w(ttl7474_2u_2, port_value & 0x08);
249	249
250		TTL7474_update(device->machine, TTL7474_2S_1);
251		TTL7474_update(device->machine, TTL7474_2S_2);
252		TTL7474_update(device->machine, TTL7474_2U_1);
253		TTL7474_update(device->machine, TTL7474_2U_2);
	250	ttl7474_update(ttl7474_2s_1);
	251	ttl7474_update(ttl7474_2s_2);
	252	ttl7474_update(ttl7474_2u_1);
	253	ttl7474_update(ttl7474_2u_2);
254	254
255	255
256	256	/* read the steering controls */
257	257	for (player = 0; player < 4; player++)
258	258	{
259		int movement_flip_flop = TTL7474_1F_1 + (2 * player);
260		int dir_flip_flop      = movement_flip_flop + 1;
261	259	static const char *const portnames[] = { "DIAL0", "DIAL1", "DIAL2", "DIAL3" };
	260	const device_config *movement_flip_flop;
	261	const device_config *dir_flip_flop;
262	262
	263	switch (player)
	264	{
	265	default:
	266	case 0:   movement_flip_flop = ttl7474_1f_1;   dir_flip_flop = ttl7474_1f_2;   break;
	267	case 1:   movement_flip_flop = ttl7474_1d_1;   dir_flip_flop = ttl7474_1d_2;   break;
	268	case 2:   movement_flip_flop = ttl7474_1c_1;   dir_flip_flop = ttl7474_1c_2;   break;
	269	case 3:   movement_flip_flop = ttl7474_1a_1;   dir_flip_flop = ttl7474_1a_2;   break;
	270	}
	271
263	272	port_value = input_port_read(device->machine, portnames[player]);
264	273
265	274	if (port_value != last_wheel_value[player])
266	275	{
267	276	/* set the movement direction */
268		TTL7474_d_w(dir_flip_flop, ((port_value - last_wheel_value[player]) & 0x80) ? 1 : 0);
	277	ttl7474_d_w(dir_flip_flop, ((port_value - last_wheel_value[player]) & 0x80) ? 1 : 0);
269	278
270	279	last_wheel_value[player] = port_value;
271	280	}
272	281
273	282	/* as the wheel moves, both flip-flops are clocked */
274		TTL7474_clock_w(movement_flip_flop, port_value & 0x01);
275		TTL7474_clock_w(dir_flip_flop,      port_value & 0x01);
	283	ttl7474_clock_w(movement_flip_flop, port_value & 0x01);
	284	ttl7474_clock_w(dir_flip_flop,      port_value & 0x01);
276	285
277		TTL7474_update(device->machine, movement_flip_flop);
278		TTL7474_update(device->machine, dir_flip_flop);
	286	ttl7474_update(movement_flip_flop);
	287	ttl7474_update(dir_flip_flop);
279	288	}
280	289
281	290
r6740	r6741
289	298	how much, resulting in only two different possible levels */
290	299	if (port_value & 0x01)
291	300	{
292		TTL74153_input_line_w(TTL74153_1K, 0, player, 1);
293		TTL74153_input_line_w(TTL74153_1K, 1, player, 0);
	301	ttl74153_input_line_w(ttl74153_1k, 0, player, 1);
	302	ttl74153_input_line_w(ttl74153_1k, 1, player, 0);
294	303	}
295	304	else if (port_value & 0x02)
296	305	{
297		TTL74153_input_line_w(TTL74153_1K, 0, player, 1);
298		TTL74153_input_line_w(TTL74153_1K, 1, player, 1);
	306	ttl74153_input_line_w(ttl74153_1k, 0, player, 1);
	307	ttl74153_input_line_w(ttl74153_1k, 1, player, 1);
299	308	}
300	309	else
301	310	{
302		TTL74153_input_line_w(TTL74153_1K, 0, player, 0);
	311	ttl74153_input_line_w(ttl74153_1k, 0, player, 0);
303	312	/* the other line is irrelevant */
304	313	}
305	314
306	315	port_value >>= 2;
307	316	}
308	317
309		TTL74153_update(TTL74153_1K);
	318	ttl74153_update(ttl74153_1k);
310	319	}
311	320
312	321
313	322	static WRITE_LINE_DEVICE_HANDLER( coin1_interrupt_clear_w )
314	323	{
315		TTL7474_clear_w(TTL7474_2S_1, state);
316		TTL7474_update(device->machine, TTL7474_2S_1);
	324	ttl7474_clear_w(ttl7474_2s_1, state);
	325	ttl7474_update(ttl7474_2s_1);
317	326	}
318	327
319	328	static WRITE_LINE_DEVICE_HANDLER( coin2_interrupt_clear_w )
320	329	{
321		TTL7474_clear_w(TTL7474_2S_2, state);
322		TTL7474_update(device->machine, TTL7474_2S_2);
	330	ttl7474_clear_w(ttl7474_2s_2, state);
	331	ttl7474_update(ttl7474_2s_2);
323	332	}
324	333
325	334	static WRITE_LINE_DEVICE_HANDLER( coin3_interrupt_clear_w )
326	335	{
327		TTL7474_clear_w(TTL7474_2U_1, state);
328		TTL7474_update(device->machine, TTL7474_2U_1);
	336	ttl7474_clear_w(ttl7474_2u_1, state);
	337	ttl7474_update(ttl7474_2u_1);
329	338	}
330	339
331	340	static WRITE_LINE_DEVICE_HANDLER( coin4_interrupt_clear_w )
332	341	{
333		TTL7474_clear_w(TTL7474_2U_2, state);
334		TTL7474_update(device->machine, TTL7474_2U_2);
	342	ttl7474_clear_w(ttl7474_2u_2, state);
	343	ttl7474_update(ttl7474_2u_2);
335	344	}
336	345
337	346	WRITE8_HANDLER( carpolo_ball_screen_interrupt_clear_w )
338	347	{
339		TTL74148_input_line_w(TTL74148_3S, BALL_SCREEN_PRIORITY_LINE, 1);
340		TTL74148_update(space->machine, TTL74148_3S);
	348	ttl74148_input_line_w(ttl74148_3s, BALL_SCREEN_PRIORITY_LINE, 1);
	349	ttl74148_update(ttl74148_3s);
341	350	}
342	351
343	352	WRITE8_HANDLER( carpolo_car_car_interrupt_clear_w )
344	353	{
345		TTL74148_input_line_w(TTL74148_3S, CAR_CAR_PRIORITY_LINE, 1);
346		TTL74148_update(space->machine, TTL74148_3S);
	354	ttl74148_input_line_w(ttl74148_3s, CAR_CAR_PRIORITY_LINE, 1);
	355	ttl74148_update(ttl74148_3s);
347	356	}
348	357
349	358	WRITE8_HANDLER( carpolo_car_goal_interrupt_clear_w )
350	359	{
351		TTL74148_input_line_w(TTL74148_3S, CAR_GOAL_PRIORITY_LINE, 1);
352		TTL74148_update(space->machine, TTL74148_3S);
	360	ttl74148_input_line_w(ttl74148_3s, CAR_GOAL_PRIORITY_LINE, 1);
	361	ttl74148_update(ttl74148_3s);
353	362	}
354	363
355	364	WRITE8_HANDLER( carpolo_car_ball_interrupt_clear_w )
356	365	{
357		TTL74148_input_line_w(TTL74148_3S, PRI0_PRIORTITY_LINE, 1);
358		TTL74148_update(space->machine, TTL74148_3S);
	366	ttl74148_input_line_w(ttl74148_3s, PRI0_PRIORTITY_LINE, 1);
	367	ttl74148_update(ttl74148_3s);
359	368	}
360	369
361	370	WRITE8_HANDLER( carpolo_car_border_interrupt_clear_w )
362	371	{
363		TTL74148_input_line_w(TTL74148_3S, PRI0_PRIORTITY_LINE, 1);
364		TTL74148_update(space->machine, TTL74148_3S);
	372	ttl74148_input_line_w(ttl74148_3s, PRI0_PRIORTITY_LINE, 1);
	373	ttl74148_update(ttl74148_3s);
365	374	}
366	375
367	376	WRITE8_HANDLER( carpolo_timer_interrupt_clear_w )
368	377	{
369		TTL74148_input_line_w(TTL74148_3S, PRI0_PRIORTITY_LINE, 1);
370		TTL74148_update(space->machine, TTL74148_3S);
	378	ttl74148_input_line_w(ttl74148_3s, PRI0_PRIORTITY_LINE, 1);
	379	ttl74148_update(ttl74148_3s);
371	380	}
372	381
373	382
r6740	r6741
391	400	coin_counter_w(device->machine, 0, data & 0x01);
392	401
393	402
394		TTL7474_clear_w(TTL7474_1F_1, data & 0x08);
395		TTL7474_clear_w(TTL7474_1D_1, data & 0x08);
396		TTL7474_clear_w(TTL7474_1C_1, data & 0x08);
397		TTL7474_clear_w(TTL7474_1A_1, data & 0x08);
	403	ttl7474_clear_w(ttl7474_1f_1, data & 0x08);
	404	ttl7474_clear_w(ttl7474_1d_1, data & 0x08);
	405	ttl7474_clear_w(ttl7474_1c_1, data & 0x08);
	406	ttl7474_clear_w(ttl7474_1a_1, data & 0x08);
398	407
399		TTL7474_update(device->machine, TTL7474_1F_1);
400		TTL7474_update(device->machine, TTL7474_1D_1);
401		TTL7474_update(device->machine, TTL7474_1C_1);
402		TTL7474_update(device->machine, TTL7474_1A_1);
	408	ttl7474_update(ttl7474_1f_1);
	409	ttl7474_update(ttl7474_1d_1);
	410	ttl7474_update(ttl7474_1c_1);
	411	ttl7474_update(ttl7474_1a_1);
403	412	}
404	413
405	414
r6740	r6741
412	421	bit 6 - Select pedal 0
413	422	bit 7 - Select pdeal 1 */
414	423
415		TTL74153_a_w(TTL74153_1K, data & 0x40);
416		TTL74153_b_w(TTL74153_1K, data & 0x80);
	424	ttl74153_a_w(ttl74153_1k, data & 0x40);
	425	ttl74153_b_w(ttl74153_1k, data & 0x80);
417	426
418		TTL74153_update(TTL74153_1K);
	427	ttl74153_update(ttl74153_1k);
419	428	}
420	429
421	430	static READ8_DEVICE_HANDLER( pia_0_port_b_r )
r6740	r6741
423	432	/* bit 4 - Pedal bit 0
424	433	bit 5 - Pedal bit 1 */
425	434
426		return (TTL74153_output_r(TTL74153_1K, 0) << 5) |
427		(TTL74153_output_r(TTL74153_1K, 1) << 4);
	435	return (ttl74153_output_r(ttl74153_1k, 0) << 5) |
	436	(ttl74153_output_r(ttl74153_1k, 1) << 4);
428	437	}
429	438
430	439
r6740	r6741
441	450	bit 6 - Player 2 forward/reverse input
442	451	bit 7 - Player 1 forward/reverse input */
443	452
444		ret = (TTL7474_output_r(TTL7474_1A_2) ? 0x01 : 0x00) |
445		(TTL7474_output_r(TTL7474_1C_2) ? 0x02 : 0x00) |
446		(TTL7474_output_r(TTL7474_1D_2) ? 0x04 : 0x00) |
447		(TTL7474_output_r(TTL7474_1F_2) ? 0x08 : 0x00) |
	453	ret = (ttl7474_output_r(ttl7474_1a_2) ? 0x01 : 0x00) |
	454	(ttl7474_output_r(ttl7474_1c_2) ? 0x02 : 0x00) |
	455	(ttl7474_output_r(ttl7474_1d_2) ? 0x04 : 0x00) |
	456	(ttl7474_output_r(ttl7474_1f_2) ? 0x08 : 0x00) |
448	457	(input_port_read(device->machine, "IN2") & 0xf0);
449	458
450	459	return ret;
r6740	r6741
460	469	bit 6 - Player 2 steering input (wheel moving or stopped)
461	470	bit 7 - Player 1 steering input (wheel moving or stopped) */
462	471
463		ret = (TTL7474_output_r(TTL7474_1A_1) ? 0x10 : 0x00) |
464		(TTL7474_output_r(TTL7474_1C_1) ? 0x20 : 0x00) |
465		(TTL7474_output_r(TTL7474_1D_1) ? 0x40 : 0x00) |
466		(TTL7474_output_r(TTL7474_1F_1) ? 0x80 : 0x00);
	472	ret = (ttl7474_output_r(ttl7474_1a_1) ? 0x10 : 0x00) |
	473	(ttl7474_output_r(ttl7474_1c_1) ? 0x20 : 0x00) |
	474	(ttl7474_output_r(ttl7474_1d_1) ? 0x40 : 0x00) |
	475	(ttl7474_output_r(ttl7474_1f_1) ? 0x80 : 0x00);
467	476
468	477	return ret;
469	478	}
r6740	r6741
502	511	DEVCB_NULL      /* IRQB */
503	512	};
504	513
505		static const struct TTL74148_interface TTL74148_3S_intf =
	514	MACHINE_START( carpolo )
506	515	{
507		TTL74148_3S_cb
508		};
	516	/* find flip-flops */
	517	ttl7474_2s_1 = devtag_get_device(machine, "7474_2s_1");
	518	ttl7474_2s_2 = devtag_get_device(machine, "7474_2s_2");
	519	ttl7474_2u_1 = devtag_get_device(machine, "7474_2u_1");
	520	ttl7474_2u_2 = devtag_get_device(machine, "7474_2u_2");
	521	ttl7474_1f_1 = devtag_get_device(machine, "7474_1f_1");
	522	ttl7474_1f_2 = devtag_get_device(machine, "7474_1f_2");
	523	ttl7474_1d_1 = devtag_get_device(machine, "7474_1d_1");
	524	ttl7474_1d_2 = devtag_get_device(machine, "7474_1d_2");
	525	ttl7474_1c_1 = devtag_get_device(machine, "7474_1c_1");
	526	ttl7474_1c_2 = devtag_get_device(machine, "7474_1c_2");
	527	ttl7474_1a_1 = devtag_get_device(machine, "7474_1a_1");
	528	ttl7474_1a_2 = devtag_get_device(machine, "7474_1a_2");
509	529
510		static const struct TTL7474_interface TTL7474_2S_1_intf =
511		{
512		TTL7474_2S_1_cb
513		};
	530	ttl74148_3s = devtag_get_device(machine, "74148_3s");
	531	ttl74153_1k = devtag_get_device(machine, "74153_1k");
514	532
515		static const struct TTL7474_interface TTL7474_2S_2_intf =
516		{
517		TTL7474_2S_2_cb
518		};
519
520		static const struct TTL7474_interface TTL7474_2U_1_intf =
521		{
522		TTL7474_2U_1_cb
523		};
524
525		static const struct TTL7474_interface TTL7474_2U_2_intf =
526		{
527		TTL7474_2U_2_cb
528		};
529
530
531		MACHINE_START( carpolo )
532		{
533	533	state_save_register_global(machine, ball_screen_collision_cause);
534	534	state_save_register_global(machine, car_ball_collision_x);
535	535	state_save_register_global(machine, car_ball_collision_y);
r6740	r6741
544	544	MACHINE_RESET( carpolo )
545	545	{
546	546	/* set up the priority encoder */
547		TTL74148_config(machine, TTL74148_3S, &TTL74148_3S_intf);
548		TTL74148_enable_input_w(TTL74148_3S, 0);   /* always enabled */
	547	ttl74148_enable_input_w(ttl74148_3s, 0);   /* always enabled */
549	548
550
551	549	/* set up the coin handling flip-flops */
552		TTL7474_config(machine, TTL7474_2S_1, &TTL7474_2S_1_intf);
553		TTL7474_config(machine, TTL7474_2S_2, &TTL7474_2S_2_intf);
554		TTL7474_config(machine, TTL7474_2U_1, &TTL7474_2U_1_intf);
555		TTL7474_config(machine, TTL7474_2U_2, &TTL7474_2U_2_intf);
	550	ttl7474_d_w     (ttl7474_2s_1, 1);
	551	ttl7474_preset_w(ttl7474_2s_1, 1);
556	552
557		TTL7474_d_w     (TTL7474_2S_1, 1);
558		TTL7474_preset_w(TTL7474_2S_1, 1);
	553	ttl7474_d_w     (ttl7474_2s_2, 1);
	554	ttl7474_preset_w(ttl7474_2s_2, 1);
559	555
560		TTL7474_d_w     (TTL7474_2S_2, 1);
561		TTL7474_preset_w(TTL7474_2S_2, 1);
	556	ttl7474_d_w     (ttl7474_2u_1, 1);
	557	ttl7474_preset_w(ttl7474_2u_1, 1);
562	558
563		TTL7474_d_w     (TTL7474_2U_1, 1);
564		TTL7474_preset_w(TTL7474_2U_1, 1);
	559	ttl7474_d_w     (ttl7474_2u_2, 1);
	560	ttl7474_preset_w(ttl7474_2u_2, 1);
565	561
566		TTL7474_d_w     (TTL7474_2U_2, 1);
567		TTL7474_preset_w(TTL7474_2U_2, 1);
568	562
569
570	563	/* set up the steering handling flip-flops */
571		TTL7474_config(machine, TTL7474_1F_1, 0);
572		TTL7474_config(machine, TTL7474_1F_2, 0);
573		TTL7474_config(machine, TTL7474_1D_1, 0);
574		TTL7474_config(machine, TTL7474_1D_2, 0);
575		TTL7474_config(machine, TTL7474_1C_1, 0);
576		TTL7474_config(machine, TTL7474_1C_2, 0);
577		TTL7474_config(machine, TTL7474_1A_1, 0);
578		TTL7474_config(machine, TTL7474_1A_2, 0);
	564	ttl7474_d_w     (ttl7474_1f_1, 1);
	565	ttl7474_preset_w(ttl7474_1f_1, 1);
579	566
580		TTL7474_d_w     (TTL7474_1F_1, 1);
581		TTL7474_preset_w(TTL7474_1F_1, 1);
	567	ttl7474_clear_w (ttl7474_1f_2, 1);
	568	ttl7474_preset_w(ttl7474_1f_2, 1);
582	569
583		TTL7474_clear_w (TTL7474_1F_2, 1);
584		TTL7474_preset_w(TTL7474_1F_2, 1);
	570	ttl7474_d_w     (ttl7474_1d_1, 1);
	571	ttl7474_preset_w(ttl7474_1d_1, 1);
585	572
586		TTL7474_d_w     (TTL7474_1D_1, 1);
587		TTL7474_preset_w(TTL7474_1D_1, 1);
	573	ttl7474_clear_w (ttl7474_1d_2, 1);
	574	ttl7474_preset_w(ttl7474_1d_2, 1);
588	575
589		TTL7474_clear_w (TTL7474_1D_2, 1);
590		TTL7474_preset_w(TTL7474_1D_2, 1);
	576	ttl7474_d_w     (ttl7474_1c_1, 1);
	577	ttl7474_preset_w(ttl7474_1c_1, 1);
591	578
592		TTL7474_d_w     (TTL7474_1C_1, 1);
593		TTL7474_preset_w(TTL7474_1C_1, 1);
	579	ttl7474_clear_w (ttl7474_1c_2, 1);
	580	ttl7474_preset_w(ttl7474_1c_2, 1);
594	581
595		TTL7474_clear_w (TTL7474_1C_2, 1);
596		TTL7474_preset_w(TTL7474_1C_2, 1);
	582	ttl7474_d_w     (ttl7474_1a_1, 1);
	583	ttl7474_preset_w(ttl7474_1a_1, 1);
597	584
598		TTL7474_d_w     (TTL7474_1A_1, 1);
599		TTL7474_preset_w(TTL7474_1A_1, 1);
	585	ttl7474_clear_w (ttl7474_1a_2, 1);
	586	ttl7474_preset_w(ttl7474_1a_2, 1);
600	587
601		TTL7474_clear_w (TTL7474_1A_2, 1);
602		TTL7474_preset_w(TTL7474_1A_2, 1);
603	588
604
605	589	/* set up the pedal handling chips */
606		TTL74153_config(machine, TTL74153_1K, 0);
607
608		TTL74153_enable_w(TTL74153_1K, 0, 0);
609		TTL74153_enable_w(TTL74153_1K, 1, 0);
	590	ttl74153_enable_w(ttl74153_1k, 0, 0);
	591	ttl74153_enable_w(ttl74153_1k, 1, 0);
610	592	}

src/mame/machine/n64.c

r6740	r6741
2001	2001	rspdrc_add_imem(cputag_get_cpu(machine, "rsp"), rsp_imem);
2002	2002	rspdrc_add_dmem(cputag_get_cpu(machine, "rsp"), rsp_dmem);
2003	2003	rspdrc_flush_drc_cache(cputag_get_cpu(machine, "rsp"));
	2004
	2005	audio_timer = timer_alloc(machine, audio_timer_callback, NULL);
2004	2006	}
2005	2007
2006	2008	MACHINE_RESET( n64 )
r6740	r6741
2060	2062
2061	2063	cic_status = 0;
2062	2064
2063		audio_timer = timer_alloc(machine, audio_timer_callback, NULL);
2064	2065	timer_adjust_oneshot(audio_timer, attotime_never, 0);
2065	2066
2066	2067	cputag_set_input_line(machine, "rsp", INPUT_LINE_HALT, ASSERT_LINE);

src/mame/machine/deco102.c

r6740	r6741
9	9
10	10	#include "driver.h"
11	11	#include "cpu/m68000/m68000.h"
12		#include "decocrpt.h"
	12	#include "includes/decocrpt.h"
13	13
14	14	static UINT16 decrypt(UINT16 data, int address, int select_xor)
15	15	{

src/mame/machine/balsente.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "cpu/m6809/m6809.h"
11		#include "balsente.h"
	11	#include "includes/balsente.h"
12	12	#include "sound/cem3394.h"
13	13
14	14
r6740	r6741
18	18	/* local prototypes */
19	19	static void poly17_init(running_machine *machine);
20	20	static void counter_set_out(running_machine *machine, int which, int gate);
21		static TIMER_CALLBACK( counter_callback );
22		static TIMER_CALLBACK( clock_counter_0_ff );
23	21	static void update_grudge_steering(running_machine *machine);
24	22
25		/* global data */
26		UINT8 balsente_shooter;
27		static UINT8 balsente_shooter_x;
28		static UINT8 balsente_shooter_y;
29		UINT8 balsente_adc_shift;
30		UINT16 *shrike_shared;
31		UINT16 *shrike_io;
32	23
33	24
34		/* 8253 counter state */
35		struct counter_state
36		{
37		emu_timer *timer;
38		UINT8 timer_active;
39		INT32 initial;
40		INT32 count;
41		UINT8 gate;
42		UINT8 out;
43		UINT8 mode;
44		UINT8 readbyte;
45		UINT8 writebyte;
46		};
47	25
48		static struct counter_state counter[3];
49
50		static emu_timer *scanline_timer;
51
52		/* manually clocked counter 0 states */
53		static UINT8 counter_control;
54		static UINT8 counter_0_ff;
55		static emu_timer *counter_0_timer;
56		static UINT8 counter_0_timer_active;
57
58		/* random number generator states */
59		static UINT8 *poly17 = NULL;
60		static UINT8 *rand17 = NULL;
61
62		/* ADC I/O states */
63		static INT8 analog_input_data[4];
64		static UINT8 adc_value;
65
66		/* CEM3394 DAC control states */
67		static UINT16 dac_value;
68		static UINT8 dac_register;
69		static UINT8 chip_select;
70
71		/* main CPU 6850 states */
72		static UINT8 m6850_status;
73		static UINT8 m6850_control;
74		static UINT8 m6850_input;
75		static UINT8 m6850_output;
76		static UINT8 m6850_data_ready;
77
78		/* sound CPU 6850 states */
79		static UINT8 m6850_sound_status;
80		static UINT8 m6850_sound_control;
81		static UINT8 m6850_sound_input;
82		static UINT8 m6850_sound_output;
83
84		/* noise generator states */
85		static UINT32 noise_position[6];
86		static const device_config *cem_device[6];
87
88		/* game-specific states */
89		static UINT8 nstocker_bits;
90		static UINT8 spiker_expand_color;
91		static UINT8 spiker_expand_bgcolor;
92		static UINT8 spiker_expand_bits;
93		static UINT8 grudge_steering_result;
94		static UINT8 grudge_last_steering[3];
95
96
97
98	26	/*************************************
99	27	*
100	28	*  Interrupt handling
r6740	r6741
107	35	}
108	36
109	37
110		static TIMER_CALLBACK( interrupt_timer )
	38	TIMER_DEVICE_CALLBACK( balsente_interrupt_timer )
111	39	{
	40	balsente_state *state = (balsente_state *)timer->machine->driver_data;
	41
112	42	/* next interrupt after scanline 256 is scanline 64 */
113	43	if (param == 256)
114		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 64, 0), 64);
	44	timer_device_adjust_oneshot(state->scanline_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, 64, 0), 64);
115	45	else
116		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, param + 64, 0), param + 64);
	46	timer_device_adjust_oneshot(state->scanline_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, param + 64, 0), param + 64);
117	47
118	48	/* IRQ starts on scanline 0, 64, 128, etc. */
119		cputag_set_input_line(machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
	49	cputag_set_input_line(timer->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
120	50
121	51	/* it will turn off on the next HBLANK */
122		timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, param, BALSENTE_HBSTART), NULL, 0, irq_off);
	52	timer_set(timer->machine, video_screen_get_time_until_pos(timer->machine->primary_screen, param, BALSENTE_HBSTART), NULL, 0, irq_off);
123	53
124	54	/* if this is Grudge Match, update the steering */
125		if (grudge_steering_result & 0x80)
126		update_grudge_steering(machine);
	55	if (state->grudge_steering_result & 0x80)
	56	update_grudge_steering(timer->machine);
127	57
128	58	/* if we're a shooter, we do a little more work */
129		if (balsente_shooter)
	59	if (state->shooter)
130	60	{
131	61	UINT8 tempx, tempy;
132	62
133	63	/* we latch the beam values on the first interrupt after VBLANK */
134		if (param == 64 && balsente_shooter)
	64	if (param == 64)
135	65	{
136		balsente_shooter_x = input_port_read(machine, "FAKEX");
137		balsente_shooter_y = input_port_read(machine, "FAKEY");
	66	state->shooter_x = input_port_read(timer->machine, "FAKEX");
	67	state->shooter_y = input_port_read(timer->machine, "FAKEY");
138	68	}
139	69
140	70	/* which bits get returned depends on which scanline we're at */
141		tempx = balsente_shooter_x << ((param - 64) / 64);
142		tempy = balsente_shooter_y << ((param - 64) / 64);
143		nstocker_bits = ((tempx >> 4) & 0x08) | ((tempx >> 1) & 0x04) |
144		((tempy >> 6) & 0x02) | ((tempy >> 3) & 0x01);
	71	tempx = state->shooter_x << ((param - 64) / 64);
	72	tempy = state->shooter_y << ((param - 64) / 64);
	73	state->nstocker_bits = ((tempx >> 4) & 0x08) | ((tempx >> 1) & 0x04) |
	74	((tempy >> 6) & 0x02) | ((tempy >> 3) & 0x01);
145	75	}
146	76	}
147	77
148	78
149		MACHINE_RESET( balsente )
	79	MACHINE_START( balsente )
150	80	{
151		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
152		int numbanks, i;
	81	balsente_state *state = (balsente_state *)machine->driver_data;
	82	int i;
153	83
154	84	/* create the polynomial tables */
155	85	poly17_init(machine);
156	86
	87	/* register for saving */
	88	for (i = 0; i < 3; i++)
	89	{
	90	state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].timer_active);
	91	state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].initial);
	92	state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].count);
	93	state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].gate);
	94	state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].out);
	95	state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].mode);
	96	state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].readbyte);
	97	state_save_register_item(machine, "8253counter", NULL, i, state->counter[i].writebyte);
	98	}
	99
	100	state_save_register_global(machine, state->counter_control);
	101	state_save_register_global(machine, state->counter_0_ff);
	102	state_save_register_global(machine, state->counter_0_timer_active);
	103
	104	state_save_register_global_array(machine, state->analog_input_data);
	105	state_save_register_global(machine, state->adc_value);
	106
	107	state_save_register_global(machine, state->dac_value);
	108	state_save_register_global(machine, state->dac_register);
	109	state_save_register_global(machine, state->chip_select);
	110
	111	state_save_register_global(machine, state->m6850_status);
	112	state_save_register_global(machine, state->m6850_control);
	113	state_save_register_global(machine, state->m6850_input);
	114	state_save_register_global(machine, state->m6850_output);
	115	state_save_register_global(machine, state->m6850_data_ready);
	116
	117	state_save_register_global(machine, state->m6850_sound_status);
	118	state_save_register_global(machine, state->m6850_sound_control);
	119	state_save_register_global(machine, state->m6850_sound_input);
	120	state_save_register_global(machine, state->m6850_sound_output);
	121
	122	state_save_register_global_array(machine, state->noise_position);
	123
	124	state_save_register_global(machine, state->nstocker_bits);
	125	state_save_register_global(machine, state->spiker_expand_color);
	126	state_save_register_global(machine, state->spiker_expand_bgcolor);
	127	state_save_register_global(machine, state->spiker_expand_bits);
	128	state_save_register_global(machine, state->grudge_steering_result);
	129	state_save_register_global_array(machine, state->grudge_last_steering);
	130	}
	131
	132
	133	MACHINE_RESET( balsente )
	134	{
	135	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	136	balsente_state *state = (balsente_state *)machine->driver_data;
	137	int numbanks, i;
	138
157	139	/* reset counters; counter 2's gate is tied high */
158		memset(counter, 0, sizeof(counter));
159		counter[1].timer = timer_alloc(machine, counter_callback, NULL);
160		counter[2].timer = timer_alloc(machine, counter_callback, NULL);
161		counter[2].gate = 1;
	140	memset(state->counter, 0, sizeof(state->counter));
	141	state->counter[1].timer = devtag_get_device(machine, "8253_1_timer");
	142	state->counter[2].timer = devtag_get_device(machine, "8253_2_timer");
	143	state->counter[2].gate = 1;
162	144
163	145	/* reset the manual counter 0 clock */
164		counter_control = 0x00;
165		counter_0_ff = 0;
166		counter_0_timer = timer_alloc(machine, clock_counter_0_ff, NULL);
167		counter_0_timer_active = 0;
	146	state->counter_0_timer = devtag_get_device(machine, "8253_0_timer");
	147	state->counter_control = 0x00;
	148	state->counter_0_ff = 0;
	149	state->counter_0_timer_active = 0;
168	150
169	151	/* reset the ADC states */
170		adc_value = 0;
	152	state->adc_value = 0;
171	153
172	154	/* reset the CEM3394 I/O states */
173		dac_value = 0;
174		dac_register = 0;
175		chip_select = 0x3f;
	155	state->dac_value = 0;
	156	state->dac_register = 0;
	157	state->chip_select = 0x3f;
176	158
177	159	/* reset game-specific states */
178		grudge_steering_result = 0;
	160	state->grudge_steering_result = 0;
179	161
180	162	/* reset the 6850 chips */
181	163	balsente_m6850_w(space, 0, 3);
182	164	balsente_m6850_sound_w(space, 0, 3);
183	165
184	166	/* reset the noise generator */
185		memset(noise_position, 0, sizeof(noise_position));
	167	memset(state->noise_position, 0, sizeof(state->noise_position));
186	168
187	169	/* find the CEM devices */
188		for (i = 0; i < ARRAY_LENGTH(cem_device); i++)
	170	for (i = 0; i < ARRAY_LENGTH(state->cem_device); i++)
189	171	{
190	172	char name[10];
191	173	sprintf(name, "cem%d", i+1);
192		cem_device[i] = devtag_get_device(machine, name);
193		assert(cem_device[i] != NULL);
	174	state->cem_device[i] = devtag_get_device(machine, name);
	175	assert(state->cem_device[i] != NULL);
194	176	}
195	177
196	178	/* point the banks to bank 0 */
r6740	r6741
202	184	device_reset(cputag_get_cpu(machine, "maincpu"));
203	185
204	186	/* start a timer to generate interrupts */
205		scanline_timer = timer_alloc(machine, interrupt_timer, NULL);
206		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
207
208		/* register for saving */
209		for (i = 0; i < 3; i++)
210		{
211		state_save_register_item(machine, "8253counter", NULL, i, counter[i].timer_active);
212		state_save_register_item(machine, "8253counter", NULL, i, counter[i].initial);
213		state_save_register_item(machine, "8253counter", NULL, i, counter[i].count);
214		state_save_register_item(machine, "8253counter", NULL, i, counter[i].gate);
215		state_save_register_item(machine, "8253counter", NULL, i, counter[i].out);
216		state_save_register_item(machine, "8253counter", NULL, i, counter[i].mode);
217		state_save_register_item(machine, "8253counter", NULL, i, counter[i].readbyte);
218		state_save_register_item(machine, "8253counter", NULL, i, counter[i].writebyte);
219		}
220
221		state_save_register_global(machine, counter_control);
222		state_save_register_global(machine, counter_0_ff);
223		state_save_register_global(machine, counter_0_timer_active);
224
225		state_save_register_global_array(machine, analog_input_data);
226		state_save_register_global(machine, adc_value);
227
228		state_save_register_global(machine, dac_value);
229		state_save_register_global(machine, dac_register);
230		state_save_register_global(machine, chip_select);
231
232		state_save_register_global(machine, m6850_status);
233		state_save_register_global(machine, m6850_control);
234		state_save_register_global(machine, m6850_input);
235		state_save_register_global(machine, m6850_output);
236		state_save_register_global(machine, m6850_data_ready);
237
238		state_save_register_global(machine, m6850_sound_status);
239		state_save_register_global(machine, m6850_sound_control);
240		state_save_register_global(machine, m6850_sound_input);
241		state_save_register_global(machine, m6850_sound_output);
242
243		state_save_register_global_array(machine, noise_position);
244
245		state_save_register_global(machine, nstocker_bits);
246		state_save_register_global(machine, spiker_expand_color);
247		state_save_register_global(machine, spiker_expand_bgcolor);
248		state_save_register_global(machine, spiker_expand_bits);
249		state_save_register_global(machine, grudge_steering_result);
250		state_save_register_global_array(machine, grudge_last_steering);
	187	state->scanline_timer = devtag_get_device(machine, "scan_timer");
	188	timer_device_adjust_oneshot(state->scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
251	189	}
252	190
253	191
r6740	r6741
261	199	*
262	200	*************************************/
263	201
264		#define POLY17_BITS 17
265		#define POLY17_SIZE ((1 << POLY17_BITS) - 1)
266		#define POLY17_SHL   7
267		#define POLY17_SHR   10
268		#define POLY17_ADD   0x18000
269
270	202	static void poly17_init(running_machine *machine)
271	203	{
	204	balsente_state *state = (balsente_state *)machine->driver_data;
272	205	UINT32 i, x = 0;
273	206	UINT8 *p, *r;
274	207
275	208	/* allocate memory */
276		p = poly17 = auto_alloc_array(machine, UINT8, POLY17_SIZE + 1);
277		r = rand17 = auto_alloc_array(machine, UINT8, POLY17_SIZE + 1);
	209	p = state->poly17;
	210	r = state->rand17;
278	211
279	212	/* generate the polynomial */
280	213	for (i = 0; i < POLY17_SIZE; i++)
r6740	r6741
291	224
292	225	void balsente_noise_gen(const device_config *device, int count, short *buffer)
293	226	{
	227	balsente_state *state = (balsente_state *)device->machine->driver_data;
294	228	int chip;
295	229	UINT32 step, noise_counter;
296	230
297	231	/* find the chip we are referring to */
298		for (chip = 0; chip < ARRAY_LENGTH(cem_device); chip++)
	232	for (chip = 0; chip < ARRAY_LENGTH(state->cem_device); chip++)
299	233	{
300		if (device == cem_device[chip])
	234	if (device == state->cem_device[chip])
301	235	break;
302		else if (cem_device[chip] == NULL)
	236	else if (state->cem_device[chip] == NULL)
303	237	{
304		cem_device[chip] = device;
	238	state->cem_device[chip] = device;
305	239	break;
306	240	}
307	241	}
308		assert(chip < ARRAY_LENGTH(cem_device));
	242	assert(chip < ARRAY_LENGTH(state->cem_device));
309	243
310	244	/* noise generator runs at 100kHz */
311	245	step = (100000 << 14) / CEM3394_SAMPLE_RATE;
312		noise_counter = noise_position[chip];
	246	noise_counter = state->noise_position[chip];
313	247
314	248	while (count--)
315	249	{
316		*buffer++ = poly17[(noise_counter >> 14) & POLY17_SIZE] << 12;
	250	*buffer++ = state->poly17[(noise_counter >> 14) & POLY17_SIZE] << 12;
317	251	noise_counter += step;
318	252	}
319	253
320	254	/* remember the noise position */
321		noise_position[chip] = noise_counter;
	255	state->noise_position[chip] = noise_counter;
322	256	}
323	257
324	258
r6740	r6741
337	271
338	272	READ8_HANDLER( balsente_random_num_r )
339	273	{
	274	balsente_state *state = (balsente_state *)space->machine->driver_data;
340	275	UINT32 cc;
341	276
342	277	/* CPU runs at 1.25MHz, noise source at 100kHz --> multiply by 12.5 */
r6740	r6741
344	279
345	280	/* 12.5 = 8 + 4 + 0.5 */
346	281	cc = (cc << 3) + (cc << 2) + (cc >> 1);
347		return rand17[cc & POLY17_SIZE];
	282	return state->rand17[cc & POLY17_SIZE];
348	283	}
349	284
350	285
r6740	r6741
421	356
422	357	static void m6850_update_io(running_machine *machine)
423	358	{
	359	balsente_state *state = (balsente_state *)machine->driver_data;
424	360	UINT8 new_state;
425	361
426	362	/* sound -> main CPU communications */
427		if (!(m6850_sound_status & 0x02))
	363	if (!(state->m6850_sound_status & 0x02))
428	364	{
429	365	/* set the overrun bit if the data in the destination hasn't been read yet */
430		if (m6850_status & 0x01)
431		m6850_status |= 0x20;
	366	if (state->m6850_status & 0x01)
	367	state->m6850_status |= 0x20;
432	368
433	369	/* copy the sound's output to our input */
434		m6850_input = m6850_sound_output;
	370	state->m6850_input = state->m6850_sound_output;
435	371
436	372	/* set the receive register full bit */
437		m6850_status |= 0x01;
	373	state->m6850_status |= 0x01;
438	374
439	375	/* set the sound's trasmitter register empty bit */
440		m6850_sound_status |= 0x02;
	376	state->m6850_sound_status |= 0x02;
441	377	}
442	378
443	379	/* main -> sound CPU communications */
444		if (m6850_data_ready)
	380	if (state->m6850_data_ready)
445	381	{
446	382	/* set the overrun bit if the data in the destination hasn't been read yet */
447		if (m6850_sound_status & 0x01)
448		m6850_sound_status |= 0x20;
	383	if (state->m6850_sound_status & 0x01)
	384	state->m6850_sound_status |= 0x20;
449	385
450	386	/* copy the main CPU's output to our input */
451		m6850_sound_input = m6850_output;
	387	state->m6850_sound_input = state->m6850_output;
452	388
453	389	/* set the receive register full bit */
454		m6850_sound_status |= 0x01;
	390	state->m6850_sound_status |= 0x01;
455	391
456	392	/* set the main CPU's trasmitter register empty bit */
457		m6850_status |= 0x02;
458		m6850_data_ready = 0;
	393	state->m6850_status |= 0x02;
	394	state->m6850_data_ready = 0;
459	395	}
460	396
461	397	/* check for reset states */
462		if ((m6850_control & 3) == 3)
	398	if ((state->m6850_control & 3) == 3)
463	399	{
464		m6850_status = 0x02;
465		m6850_data_ready = 0;
	400	state->m6850_status = 0x02;
	401	state->m6850_data_ready = 0;
466	402	}
467		if ((m6850_sound_control & 3) == 3)
468		m6850_sound_status = 0x02;
	403	if ((state->m6850_sound_control & 3) == 3)
	404	state->m6850_sound_status = 0x02;
469	405
470	406	/* check for transmit/receive IRQs on the main CPU */
471	407	new_state = 0;
472		if ((m6850_control & 0x80) && (m6850_status & 0x21)) new_state = 1;
473		if ((m6850_control & 0x60) == 0x20 && (m6850_status & 0x02)) new_state = 1;
	408	if ((state->m6850_control & 0x80) && (state->m6850_status & 0x21)) new_state = 1;
	409	if ((state->m6850_control & 0x60) == 0x20 && (state->m6850_status & 0x02)) new_state = 1;
474	410
475	411	/* apply the change */
476		if (new_state && !(m6850_status & 0x80))
	412	if (new_state && !(state->m6850_status & 0x80))
477	413	{
478	414	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
479		m6850_status |= 0x80;
	415	state->m6850_status |= 0x80;
480	416	}
481		else if (!new_state && (m6850_status & 0x80))
	417	else if (!new_state && (state->m6850_status & 0x80))
482	418	{
483	419	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE);
484		m6850_status &= ~0x80;
	420	state->m6850_status &= ~0x80;
485	421	}
486	422
487	423	/* check for transmit/receive IRQs on the sound CPU */
488	424	new_state = 0;
489		if ((m6850_sound_control & 0x80) && (m6850_sound_status & 0x21)) new_state = 1;
490		if ((m6850_sound_control & 0x60) == 0x20 && (m6850_sound_status & 0x02)) new_state = 1;
491		if (!(counter_control & 0x20)) new_state = 0;
	425	if ((state->m6850_sound_control & 0x80) && (state->m6850_sound_status & 0x21)) new_state = 1;
	426	if ((state->m6850_sound_control & 0x60) == 0x20 && (state->m6850_sound_status & 0x02)) new_state = 1;
	427	if (!(state->counter_control & 0x20)) new_state = 0;
492	428
493	429	/* apply the change */
494		if (new_state && !(m6850_sound_status & 0x80))
	430	if (new_state && !(state->m6850_sound_status & 0x80))
495	431	{
496	432	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
497		m6850_sound_status |= 0x80;
	433	state->m6850_sound_status |= 0x80;
498	434	}
499		else if (!new_state && (m6850_sound_status & 0x80))
	435	else if (!new_state && (state->m6850_sound_status & 0x80))
500	436	{
501	437	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
502		m6850_sound_status &= ~0x80;
	438	state->m6850_sound_status &= ~0x80;
503	439	}
504	440	}
505	441
r6740	r6741
513	449
514	450	READ8_HANDLER( balsente_m6850_r )
515	451	{
	452	balsente_state *state = (balsente_state *)space->machine->driver_data;
516	453	int result;
517	454
518	455	/* status register is at offset 0 */
519	456	if (offset == 0)
520	457	{
521		result = m6850_status;
	458	result = state->m6850_status;
522	459	}
523	460
524	461	/* input register is at offset 1 */
525	462	else
526	463	{
527		result = m6850_input;
	464	result = state->m6850_input;
528	465
529	466	/* clear the overrun and receive buffer full bits */
530		m6850_status &= ~0x21;
	467	state->m6850_status &= ~0x21;
531	468	m6850_update_io(space->machine);
532	469	}
533	470
r6740	r6741
537	474
538	475	static TIMER_CALLBACK( m6850_data_ready_callback )
539	476	{
	477	balsente_state *state = (balsente_state *)machine->driver_data;
	478
540	479	/* set the output data byte and indicate that we're ready to go */
541		m6850_output = param;
542		m6850_data_ready = 1;
	480	state->m6850_output = param;
	481	state->m6850_data_ready = 1;
543	482	m6850_update_io(machine);
544	483	}
545	484
546	485
547	486	static TIMER_CALLBACK( m6850_w_callback )
548	487	{
	488	balsente_state *state = (balsente_state *)machine->driver_data;
	489
549	490	/* indicate that the transmit buffer is no longer empty and update the I/O state */
550		m6850_status &= ~0x02;
	491	state->m6850_status &= ~0x02;
551	492	m6850_update_io(machine);
552	493
553	494	/* set a timer for 500usec later to actually transmit the data */
r6740	r6741
558	499
559	500	WRITE8_HANDLER( balsente_m6850_w )
560	501	{
	502	balsente_state *state = (balsente_state *)space->machine->driver_data;
	503
561	504	/* control register is at offset 0 */
562	505	if (offset == 0)
563	506	{
564		m6850_control = data;
	507	state->m6850_control = data;
565	508
566	509	/* re-update since interrupt enables could have been modified */
567	510	m6850_update_io(space->machine);
r6740	r6741
582	525
583	526	READ8_HANDLER( balsente_m6850_sound_r )
584	527	{
	528	balsente_state *state = (balsente_state *)space->machine->driver_data;
585	529	int result;
586	530
587	531	/* status register is at offset 0 */
588	532	if (offset == 0)
589	533	{
590		result = m6850_sound_status;
	534	result = state->m6850_sound_status;
591	535	}
592	536
593	537	/* input register is at offset 1 */
594	538	else
595	539	{
596		result = m6850_sound_input;
	540	result = state->m6850_sound_input;
597	541
598	542	/* clear the overrun and receive buffer full bits */
599		m6850_sound_status &= ~0x21;
	543	state->m6850_sound_status &= ~0x21;
600	544	m6850_update_io(space->machine);
601	545	}
602	546
r6740	r6741
606	550
607	551	WRITE8_HANDLER( balsente_m6850_sound_w )
608	552	{
	553	balsente_state *state = (balsente_state *)space->machine->driver_data;
	554
609	555	/* control register is at offset 0 */
610	556	if (offset == 0)
611		m6850_sound_control = data;
	557	state->m6850_sound_control = data;
612	558
613	559	/* output register is at offset 1 */
614	560	else
615	561	{
616		m6850_sound_output = data;
617		m6850_sound_status &= ~0x02;
	562	state->m6850_sound_output = data;
	563	state->m6850_sound_status &= ~0x02;
618	564	}
619	565
620	566	/* re-update since interrupt enables could have been modified */
r6740	r6741
631	577
632	578	INTERRUPT_GEN( balsente_update_analog_inputs )
633	579	{
	580	balsente_state *state = (balsente_state *)device->machine->driver_data;
634	581	int i;
635	582	static const char *const analog[] = { "AN0", "AN1", "AN2", "AN3" };
636	583
r6740	r6741
639	586	/* ports are read once a frame, just at varying intervals. To get around this, we */
640	587	/* read all the analog inputs at VBLANK time and just return the cached values. */
641	588	for (i = 0; i < 4; i++)
642		analog_input_data[i] = input_port_read(device->machine, analog[i]);
	589	state->analog_input_data[i] = input_port_read(device->machine, analog[i]);
643	590	}
644	591
645	592
646	593	static TIMER_CALLBACK( adc_finished )
647	594	{
	595	balsente_state *state = (balsente_state *)machine->driver_data;
648	596	int which = param;
649	597
650	598	/* analog controls are read in two pieces; the lower port returns the sign */
651	599	/* and the upper port returns the absolute value of the magnitude */
652		int val = analog_input_data[which / 2] << balsente_adc_shift;
	600	int val = state->analog_input_data[which / 2] << state->adc_shift;
653	601
654	602	/* special case for Stompin'/Shrike Avenger */
655		if (balsente_adc_shift == 32)
	603	if (state->adc_shift == 32)
656	604	{
657		adc_value = analog_input_data[which];
	605	state->adc_value = state->analog_input_data[which];
658	606	return;
659	607	}
660	608
r6740	r6741
669	617
670	618	/* return the sign */
671	619	if (!(which & 1))
672		adc_value = (val < 0) ? 0xff : 0x00;
	620	state->adc_value = (val < 0) ? 0xff : 0x00;
673	621
674	622	/* return the magnitude */
675	623	else
676		adc_value = (val < 0) ? -val : val;
	624	state->adc_value = (val < 0) ? -val : val;
677	625	}
678	626
679	627
680	628	READ8_HANDLER( balsente_adc_data_r )
681	629	{
	630	balsente_state *state = (balsente_state *)space->machine->driver_data;
	631
682	632	/* just return the last value read */
683		return adc_value;
	633	return state->adc_value;
684	634	}
685	635
686	636
r6740	r6741
702	652	*
703	653	*************************************/
704	654
705		INLINE void counter_start(int which)
	655	INLINE void counter_start(balsente_state *state, int which)
706	656	{
707	657	/* don't start a timer for channel 0; it is clocked manually */
708	658	if (which != 0)
709	659	{
710	660	/* only start a timer if we're gated and there is none already */
711		if (counter[which].gate && !counter[which].timer_active)
	661	if (state->counter[which].gate && !state->counter[which].timer_active)
712	662	{
713		counter[which].timer_active = 1;
714		timer_adjust_oneshot(counter[which].timer, attotime_mul(ATTOTIME_IN_HZ(2000000), counter[which].count), which);
	663	state->counter[which].timer_active = 1;
	664	timer_device_adjust_oneshot(state->counter[which].timer, attotime_mul(ATTOTIME_IN_HZ(2000000), state->counter[which].count), which);
715	665	}
716	666	}
717	667	}
718	668
719	669
720		INLINE void counter_stop(int which)
	670	INLINE void counter_stop(balsente_state *state, int which)
721	671	{
722	672	/* only stop the timer if it exists */
723		if (counter[which].timer_active)
724		timer_adjust_oneshot(counter[which].timer, attotime_never, 0);
725		counter[which].timer_active = 0;
	673	if (state->counter[which].timer_active)
	674	timer_device_adjust_oneshot(state->counter[which].timer, attotime_never, 0);
	675	state->counter[which].timer_active = 0;
726	676	}
727	677
728	678
729		INLINE void counter_update_count(int which)
	679	INLINE void counter_update_count(balsente_state *state, int which)
730	680	{
731	681	/* only update if the timer is running */
732		if (counter[which].timer_active)
	682	if (state->counter[which].timer_active)
733	683	{
734	684	/* determine how many 2MHz cycles are remaining */
735		int count = attotime_to_double(attotime_mul(timer_timeleft(counter[which].timer), 2000000));
736		counter[which].count = (count < 0) ? 0 : count;
	685	int count = attotime_to_double(attotime_mul(timer_device_timeleft(state->counter[which].timer), 2000000));
	686	state->counter[which].count = (count < 0) ? 0 : count;
737	687	}
738	688	}
739	689
r6740	r6741
749	699
750	700	static void counter_set_gate(running_machine *machine, int which, int gate)
751	701	{
752		int oldgate = counter[which].gate;
	702	balsente_state *state = (balsente_state *)machine->driver_data;
	703	int oldgate = state->counter[which].gate;
753	704
754	705	/* remember the gate state */
755		counter[which].gate = gate;
	706	state->counter[which].gate = gate;
756	707
757	708	/* if the counter is being halted, update the count and remove the system timer */
758	709	if (!gate && oldgate)
759	710	{
760		counter_update_count(which);
761		counter_stop(which);
	711	counter_update_count(state, which);
	712	counter_stop(state, which);
762	713	}
763	714
764	715	/* if the counter is being started, create the timer */
765	716	else if (gate && !oldgate)
766	717	{
767	718	/* mode 1 waits for the gate to trigger the counter */
768		if (counter[which].mode == 1)
	719	if (state->counter[which].mode == 1)
769	720	{
770	721	counter_set_out(machine, which, 0);
771	722
772	723	/* add one to the count; technically, OUT goes low on the next clock pulse */
773	724	/* and then starts counting down; it's important that we don't count the first one */
774		counter[which].count = counter[which].initial + 1;
	725	state->counter[which].count = state->counter[which].initial + 1;
775	726	}
776	727
777	728	/* start the counter */
778		counter_start(which);
	729	counter_start(state, which);
779	730	}
780	731	}
781	732
782	733
783	734	static void counter_set_out(running_machine *machine, int which, int out)
784	735	{
	736	balsente_state *state = (balsente_state *)machine->driver_data;
	737
785	738	/* OUT on counter 2 is hooked to the /INT line on the Z80 */
786	739	if (which == 2)
787	740	cputag_set_input_line(machine, "audiocpu", 0, out ? ASSERT_LINE : CLEAR_LINE);
r6740	r6741
791	744	counter_set_gate(machine, 1, !out);
792	745
793	746	/* remember the out state */
794		counter[which].out = out;
	747	state->counter[which].out = out;
795	748	}
796	749
797	750
798		static TIMER_CALLBACK( counter_callback )
	751	TIMER_DEVICE_CALLBACK( balsente_counter_callback )
799	752	{
	753	balsente_state *state = (balsente_state *)timer->machine->driver_data;
	754
800	755	/* reset the counter and the count */
801		counter[param].timer_active = 0;
802		counter[param].count = 0;
	756	state->counter[param].timer_active = 0;
	757	state->counter[param].count = 0;
803	758
804	759	/* set the state of the OUT line */
805	760	/* mode 0 and 1: when firing, transition OUT to high */
806		if (counter[param].mode == 0 || counter[param].mode == 1)
807		counter_set_out(machine, param, 1);
	761	if (state->counter[param].mode == 0 || state->counter[param].mode == 1)
	762	counter_set_out(timer->machine, param, 1);
808	763
809	764	/* no other modes handled currently */
810	765	}
r6740	r6741
821	776
822	777	READ8_HANDLER( balsente_counter_8253_r )
823	778	{
	779	balsente_state *state = (balsente_state *)space->machine->driver_data;
824	780	int which;
825	781
826	782	switch (offset & 3)
r6740	r6741
832	788	which = offset & 3;
833	789
834	790	/* update the count */
835		counter_update_count(which);
	791	counter_update_count(state, which);
836	792
837	793	/* return the LSB */
838		if (counter[which].readbyte == 0)
	794	if (state->counter[which].readbyte == 0)
839	795	{
840		counter[which].readbyte = 1;
841		return counter[which].count & 0xff;
	796	state->counter[which].readbyte = 1;
	797	return state->counter[which].count & 0xff;
842	798	}
843	799
844	800	/* write the MSB and reset the counter */
845	801	else
846	802	{
847		counter[which].readbyte = 0;
848		return (counter[which].count >> 8) & 0xff;
	803	state->counter[which].readbyte = 0;
	804	return (state->counter[which].count >> 8) & 0xff;
849	805	}
850	806	break;
851	807	}
r6740	r6741
855	811
856	812	WRITE8_HANDLER( balsente_counter_8253_w )
857	813	{
	814	balsente_state *state = (balsente_state *)space->machine->driver_data;
858	815	int which;
859	816
860	817	switch (offset & 3)
r6740	r6741
866	823	which = offset & 3;
867	824
868	825	/* if the counter is in mode 0, a write here will reset the OUT state */
869		if (counter[which].mode == 0)
	826	if (state->counter[which].mode == 0)
870	827	counter_set_out(space->machine, which, 0);
871	828
872	829	/* write the LSB */
873		if (counter[which].writebyte == 0)
	830	if (state->counter[which].writebyte == 0)
874	831	{
875		counter[which].count = (counter[which].count & 0xff00) | (data & 0x00ff);
876		counter[which].initial = (counter[which].initial & 0xff00) | (data & 0x00ff);
877		counter[which].writebyte = 1;
	832	state->counter[which].count = (state->counter[which].count & 0xff00) | (data & 0x00ff);
	833	state->counter[which].initial = (state->counter[which].initial & 0xff00) | (data & 0x00ff);
	834	state->counter[which].writebyte = 1;
878	835	}
879	836
880	837	/* write the MSB and reset the counter */
881	838	else
882	839	{
883		counter[which].count = (counter[which].count & 0x00ff) | ((data << 8) & 0xff00);
884		counter[which].initial = (counter[which].initial & 0x00ff) | ((data << 8) & 0xff00);
885		counter[which].writebyte = 0;
	840	state->counter[which].count = (state->counter[which].count & 0x00ff) | ((data << 8) & 0xff00);
	841	state->counter[which].initial = (state->counter[which].initial & 0x00ff) | ((data << 8) & 0xff00);
	842	state->counter[which].writebyte = 0;
886	843
887	844	/* treat 0 as $10000 */
888		if (counter[which].count == 0) counter[which].count = counter[which].initial = 0x10000;
	845	if (state->counter[which].count == 0) state->counter[which].count = state->counter[which].initial = 0x10000;
889	846
890	847	/* remove any old timer and set a new one */
891		counter_stop(which);
	848	counter_stop(state, which);
892	849
893	850	/* note that in mode 1, we have to wait for a rising edge of a gate */
894		if (counter[which].mode == 0)
895		counter_start(which);
	851	if (state->counter[which].mode == 0)
	852	counter_start(state, which);
896	853
897	854	/* if the counter is in mode 1, a write here will set the OUT state */
898		if (counter[which].mode == 1)
	855	if (state->counter[which].mode == 1)
899	856	counter_set_out(space->machine, which, 1);
900	857	}
901	858	break;
r6740	r6741
906	863	if (which == 3) break;
907	864
908	865	/* if the counter was in mode 0, a write here will reset the OUT state */
909		if (((counter[which].mode >> 1) & 7) == 0)
	866	if (((state->counter[which].mode >> 1) & 7) == 0)
910	867	counter_set_out(space->machine, which, 0);
911	868
912	869	/* set the mode */
913		counter[which].mode = (data >> 1) & 7;
	870	state->counter[which].mode = (data >> 1) & 7;
914	871
915	872	/* if the counter is in mode 0, a write here will reset the OUT state */
916		if (counter[which].mode == 0)
	873	if (state->counter[which].mode == 0)
917	874	counter_set_out(space->machine, which, 0);
918	875	break;
919	876	}
r6740	r6741
927	884	*
928	885	*************************************/
929	886
930		static void set_counter_0_ff(running_machine *machine, int newstate)
	887	static void set_counter_0_ff(const device_config *timer, int newstate)
931	888	{
	889	balsente_state *state = (balsente_state *)timer->machine->driver_data;
	890
932	891	/* the flip/flop output is inverted, so if we went high to low, that's a clock */
933		if (counter_0_ff && !newstate)
	892	if (state->counter_0_ff && !newstate)
934	893	{
935	894	/* only count if gated and non-zero */
936		if (counter[0].count > 0 && counter[0].gate)
	895	if (state->counter[0].count > 0 && state->counter[0].gate)
937	896	{
938		counter[0].count--;
939		if (counter[0].count == 0)
940		counter_callback(machine, NULL, 0);
	897	state->counter[0].count--;
	898	if (state->counter[0].count == 0)
	899	balsente_counter_callback(timer, NULL, 0);
941	900	}
942	901	}
943	902
944	903	/* remember the new state */
945		counter_0_ff = newstate;
	904	state->counter_0_ff = newstate;
946	905	}
947	906
948	907
949		static TIMER_CALLBACK( clock_counter_0_ff )
	908	TIMER_DEVICE_CALLBACK( balsente_clock_counter_0_ff )
950	909	{
	910	balsente_state *state = (balsente_state *)timer->machine->driver_data;
	911
951	912	/* clock the D value through the flip-flop */
952		set_counter_0_ff(machine, (counter_control >> 3) & 1);
	913	set_counter_0_ff(timer, (state->counter_control >> 3) & 1);
953	914	}
954	915
955	916
956		static void update_counter_0_timer(void)
	917	static void update_counter_0_timer(balsente_state *state)
957	918	{
958	919	double maxfreq = 0.0;
959	920	int i;
960	921
961	922	/* if there's already a timer, remove it */
962		if (counter_0_timer_active)
963		timer_adjust_oneshot(counter_0_timer, attotime_never, 0);
964		counter_0_timer_active = 0;
	923	if (state->counter_0_timer_active)
	924	timer_device_adjust_oneshot(state->counter_0_timer, attotime_never, 0);
	925	state->counter_0_timer_active = 0;
965	926
966	927	/* find the counter with the maximum frequency */
967	928	/* this is used to calibrate the timers at startup */
968	929	for (i = 0; i < 6; i++)
969		if (cem3394_get_parameter(cem_device[i], CEM3394_FINAL_GAIN) < 10.0)
	930	if (cem3394_get_parameter(state->cem_device[i], CEM3394_FINAL_GAIN) < 10.0)
970	931	{
971	932	double tempfreq;
972	933
973	934	/* if the filter resonance is high, then they're calibrating the filter frequency */
974		if (cem3394_get_parameter(cem_device[i], CEM3394_FILTER_RESONANCE) > 0.9)
975		tempfreq = cem3394_get_parameter(cem_device[i], CEM3394_FILTER_FREQENCY);
	935	if (cem3394_get_parameter(state->cem_device[i], CEM3394_FILTER_RESONANCE) > 0.9)
	936	tempfreq = cem3394_get_parameter(state->cem_device[i], CEM3394_FILTER_FREQENCY);
976	937
977	938	/* otherwise, they're calibrating the VCO frequency */
978	939	else
979		tempfreq = cem3394_get_parameter(cem_device[i], CEM3394_VCO_FREQUENCY);
	940	tempfreq = cem3394_get_parameter(state->cem_device[i], CEM3394_VCO_FREQUENCY);
980	941
981	942	if (tempfreq > maxfreq) maxfreq = tempfreq;
982	943	}
r6740	r6741
984	945	/* reprime the timer */
985	946	if (maxfreq > 0.0)
986	947	{
987		counter_0_timer_active = 1;
988		timer_adjust_periodic(counter_0_timer, ATTOTIME_IN_HZ(maxfreq), 0, ATTOTIME_IN_HZ(maxfreq));
	948	state->counter_0_timer_active = 1;
	949	timer_device_adjust_periodic(state->counter_0_timer, ATTOTIME_IN_HZ(maxfreq), 0, ATTOTIME_IN_HZ(maxfreq));
989	950	}
990	951	}
991	952
r6740	r6741
999	960
1000	961	READ8_HANDLER( balsente_counter_state_r )
1001	962	{
	963	balsente_state *state = (balsente_state *)space->machine->driver_data;
	964
1002	965	/* bit D0 is the inverse of the flip-flop state */
1003		int result = !counter_0_ff;
	966	int result = !state->counter_0_ff;
1004	967
1005	968	/* bit D1 is the OUT value from counter 0 */
1006		if (counter[0].out) result |= 0x02;
	969	if (state->counter[0].out) result |= 0x02;
1007	970
1008	971	return result;
1009	972	}
r6740	r6741
1011	974
1012	975	WRITE8_HANDLER( balsente_counter_control_w )
1013	976	{
1014		UINT8 diff_counter_control = counter_control ^ data;
	977	balsente_state *state = (balsente_state *)space->machine->driver_data;
	978	UINT8 diff_counter_control = state->counter_control ^ data;
1015	979
1016	980	/* set the new global value */
1017		counter_control = data;
	981	state->counter_control = data;
1018	982
1019	983	/* bit D0 enables/disables audio */
1020	984	if (diff_counter_control & 0x01)
1021	985	{
1022	986	int ch;
1023	987	for (ch = 0; ch < 6; ch++)
1024		sound_set_output_gain(cem_device[ch], 0, (data & 0x01) ? 1.0 : 0);
	988	sound_set_output_gain(state->cem_device[ch], 0, (data & 0x01) ? 1.0 : 0);
1025	989	}
1026	990
1027	991	/* bit D1 is hooked to counter 0's gate */
1028	992	/* if we gate on, start a pulsing timer to clock it */
1029		if (!counter[0].gate && (data & 0x02) && !counter_0_timer_active)
	993	if (!state->counter[0].gate && (data & 0x02) && !state->counter_0_timer_active)
1030	994	{
1031		update_counter_0_timer();
	995	update_counter_0_timer(state);
1032	996	}
1033	997
1034	998	/* if we gate off, remove the timer */
1035		else if (counter[0].gate && !(data & 0x02) && counter_0_timer_active)
	999	else if (state->counter[0].gate && !(data & 0x02) && state->counter_0_timer_active)
1036	1000	{
1037		timer_adjust_oneshot(counter_0_timer, attotime_never, 0);
1038		counter_0_timer_active = 0;
	1001	timer_device_adjust_oneshot(state->counter_0_timer, attotime_never, 0);
	1002	state->counter_0_timer_active = 0;
1039	1003	}
1040	1004
1041	1005	/* set the actual gate afterwards, since we need to know the old value above */
1042	1006	counter_set_gate(space->machine, 0, (data >> 1) & 1);
1043	1007
1044	1008	/* bits D2 and D4 control the clear/reset flags on the flip-flop that feeds counter 0 */
1045		if (!(data & 0x04)) set_counter_0_ff(space->machine, 1);
1046		if (!(data & 0x10)) set_counter_0_ff(space->machine, 0);
	1009	if (!(data & 0x04)) set_counter_0_ff(state->counter_0_timer, 1);
	1010	if (!(data & 0x10)) set_counter_0_ff(state->counter_0_timer, 0);
1047	1011
1048	1012	/* bit 5 clears the NMI interrupt; recompute the I/O state now */
1049	1013	m6850_update_io(space->machine);
r6740	r6741
1071	1035	CEM3394_WAVE_SELECT
1072	1036	};
1073	1037
1074		double voltage = (double)dac_value * (8.0 / 4096.0) - 4.0;
1075		int diffchip = data ^ chip_select, i;
1076		int reg = register_map[dac_register];
	1038	balsente_state *state = (balsente_state *)space->machine->driver_data;
	1039	double voltage = (double)state->dac_value * (8.0 / 4096.0) - 4.0;
	1040	int diffchip = data ^ state->chip_select, i;
	1041	int reg = register_map[state->dac_register];
1077	1042
1078	1043	/* remember the new select value */
1079		chip_select = data;
	1044	state->chip_select = data;
1080	1045
1081	1046	/* check all six chip enables */
1082	1047	for (i = 0; i < 6; i++)
r6740	r6741
1088	1053	/* remember the previous value */
1089	1054	temp =
1090	1055	#endif
1091		cem3394_get_parameter(cem_device[i], reg);
	1056	cem3394_get_parameter(state->cem_device[i], reg);
1092	1057
1093	1058	/* set the voltage */
1094		cem3394_set_voltage(cem_device[i], reg, voltage);
	1059	cem3394_set_voltage(state->cem_device[i], reg, voltage);
1095	1060
1096	1061	/* only log changes */
1097	1062	#if LOG_CEM_WRITES
1098		if (temp != cem3394_get_parameter(cem_device[i], reg))
	1063	if (temp != cem3394_get_parameter(state->cem_device[i], reg))
1099	1064	{
1100	1065	static const char *const names[] =
1101	1066	{
r6740	r6741
1108	1073	"PULSE_WIDTH",
1109	1074	"WAVE_SELECT"
1110	1075	};
1111		logerror("s%04X:   CEM#%d:%s=%f\n", cpu_get_previouspc(space->cpu), i, names[dac_register], voltage);
	1076	logerror("s%04X:   CEM#%d:%s=%f\n", cpu_get_previouspc(space->cpu), i, names[state->dac_register], voltage);
1112	1077	}
1113	1078	#endif
1114	1079	}
1115	1080
1116	1081	/* if a timer for counter 0 is running, recompute */
1117		if (counter_0_timer_active)
1118		update_counter_0_timer();
	1082	if (state->counter_0_timer_active)
	1083	update_counter_0_timer(state);
1119	1084	}
1120	1085
1121	1086
1122	1087
1123	1088	WRITE8_HANDLER( balsente_dac_data_w )
1124	1089	{
	1090	balsente_state *state = (balsente_state *)space->machine->driver_data;
	1091
1125	1092	/* LSB or MSB? */
1126	1093	if (offset & 1)
1127		dac_value = (dac_value & 0xfc0) | ((data >> 2) & 0x03f);
	1094	state->dac_value = (state->dac_value & 0xfc0) | ((data >> 2) & 0x03f);
1128	1095	else
1129		dac_value = (dac_value & 0x03f) | ((data << 6) & 0xfc0);
	1096	state->dac_value = (state->dac_value & 0x03f) | ((data << 6) & 0xfc0);
1130	1097
1131	1098	/* if there are open channels, force the values in */
1132		if ((chip_select & 0x3f) != 0x3f)
	1099	if ((state->chip_select & 0x3f) != 0x3f)
1133	1100	{
1134		UINT8 temp = chip_select;
	1101	UINT8 temp = state->chip_select;
1135	1102	balsente_chip_select_w(space, 0, 0x3f);
1136	1103	balsente_chip_select_w(space, 0, temp);
1137	1104	}
r6740	r6741
1140	1107
1141	1108	WRITE8_HANDLER( balsente_register_addr_w )
1142	1109	{
1143		dac_register = data & 7;
	1110	balsente_state *state = (balsente_state *)space->machine->driver_data;
	1111	state->dac_register = data & 7;
1144	1112	}
1145	1113
1146	1114
r6740	r6741
1153	1121
1154	1122	CUSTOM_INPUT( nstocker_bits_r )
1155	1123	{
1156		return nstocker_bits;
	1124	balsente_state *state = (balsente_state *)field->port->machine->driver_data;
	1125	return state->nstocker_bits;
1157	1126	}
1158	1127
1159	1128
1160	1129	WRITE8_HANDLER( spiker_expand_w )
1161	1130	{
	1131	balsente_state *state = (balsente_state *)space->machine->driver_data;
	1132
1162	1133	/* offset 0 is the bit pattern */
1163	1134	if (offset == 0)
1164		spiker_expand_bits = data;
	1135	state->spiker_expand_bits = data;
1165	1136
1166	1137	/* offset 1 is the background color (cleared on each read) */
1167	1138	else if (offset == 1)
1168		spiker_expand_bgcolor = data;
	1139	state->spiker_expand_bgcolor = data;
1169	1140
1170	1141	/* offset 2 is the color */
1171	1142	else if (offset == 2)
1172		spiker_expand_color = data;
	1143	state->spiker_expand_color = data;
1173	1144	}
1174	1145
1175	1146
1176	1147	READ8_HANDLER( spiker_expand_r )
1177	1148	{
	1149	balsente_state *state = (balsente_state *)space->machine->driver_data;
1178	1150	UINT8 left, right;
1179	1151
1180	1152	/* first rotate each nibble */
1181		spiker_expand_bits = ((spiker_expand_bits << 1) & 0xee) | ((spiker_expand_bits >> 3) & 0x11);
	1153	state->spiker_expand_bits = ((state->spiker_expand_bits << 1) & 0xee) | ((state->spiker_expand_bits >> 3) & 0x11);
1182	1154
1183	1155	/* compute left and right pixels */
1184		left  = (spiker_expand_bits & 0x10) ? spiker_expand_color : spiker_expand_bgcolor;
1185		right = (spiker_expand_bits & 0x01) ? spiker_expand_color : spiker_expand_bgcolor;
	1156	left  = (state->spiker_expand_bits & 0x10) ? state->spiker_expand_color : state->spiker_expand_bgcolor;
	1157	right = (state->spiker_expand_bits & 0x01) ? state->spiker_expand_color : state->spiker_expand_bgcolor;
1186	1158
1187	1159	/* reset the background color */
1188		spiker_expand_bgcolor = 0;
	1160	state->spiker_expand_bgcolor = 0;
1189	1161
1190	1162	/* return the combined result */
1191	1163	return (left & 0xf0) | (right & 0x0f);
r6740	r6741
1194	1166
1195	1167	static void update_grudge_steering(running_machine *machine)
1196	1168	{
	1169	balsente_state *state = (balsente_state *)machine->driver_data;
1197	1170	UINT8 wheel[3];
1198	1171	INT8 diff[3];
1199	1172
r6740	r6741
1203	1176	wheel[2] = input_port_read(machine, "AN2");
1204	1177
1205	1178	/* diff the values */
1206		diff[0] = wheel[0] - grudge_last_steering[0];
1207		diff[1] = wheel[1] - grudge_last_steering[1];
1208		diff[2] = wheel[2] - grudge_last_steering[2];
	1179	diff[0] = wheel[0] - state->grudge_last_steering[0];
	1180	diff[1] = wheel[1] - state->grudge_last_steering[1];
	1181	diff[2] = wheel[2] - state->grudge_last_steering[2];
1209	1182
1210	1183	/* update the last values */
1211		grudge_last_steering[0] += diff[0];
1212		grudge_last_steering[1] += diff[1];
1213		grudge_last_steering[2] += diff[2];
	1184	state->grudge_last_steering[0] += diff[0];
	1185	state->grudge_last_steering[1] += diff[1];
	1186	state->grudge_last_steering[2] += diff[2];
1214	1187
1215	1188	/* compute the result */
1216		grudge_steering_result = 0xff;
	1189	state->grudge_steering_result = 0xff;
1217	1190	if (diff[0])
1218	1191	{
1219		grudge_steering_result ^= 0x01;
1220		if (diff[0] > 0) grudge_steering_result ^= 0x02;
	1192	state->grudge_steering_result ^= 0x01;
	1193	if (diff[0] > 0) state->grudge_steering_result ^= 0x02;
1221	1194	}
1222	1195	if (diff[1])
1223	1196	{
1224		grudge_steering_result ^= 0x04;
1225		if (diff[1] > 0) grudge_steering_result ^= 0x08;
	1197	state->grudge_steering_result ^= 0x04;
	1198	if (diff[1] > 0) state->grudge_steering_result ^= 0x08;
1226	1199	}
1227	1200	if (diff[2])
1228	1201	{
1229		grudge_steering_result ^= 0x10;
1230		if (diff[2] > 0) grudge_steering_result ^= 0x20;
	1202	state->grudge_steering_result ^= 0x10;
	1203	if (diff[2] > 0) state->grudge_steering_result ^= 0x20;
1231	1204	}
1232	1205	logerror("Recomputed steering\n");
1233	1206	}
r6740	r6741
1235	1208
1236	1209	READ8_HANDLER( grudge_steering_r )
1237	1210	{
	1211	balsente_state *state = (balsente_state *)space->machine->driver_data;
1238	1212	logerror("%04X:grudge_steering_r(@%d)\n", cpu_get_pc(space->cpu), video_screen_get_vpos(space->machine->primary_screen));
1239		grudge_steering_result |= 0x80;
1240		return grudge_steering_result;
	1213	state->grudge_steering_result |= 0x80;
	1214	return state->grudge_steering_result;
1241	1215	}
1242	1216
1243	1217
r6740	r6741
1250	1224
1251	1225	READ8_HANDLER( shrike_shared_6809_r )
1252	1226	{
1253		UINT16 mem_mask = offset & 1 ? 0xff00 : 0x00ff;
	1227	balsente_state *state = (balsente_state *)space->machine->driver_data;
	1228	UINT16 mem_mask = offset & 1 ? 0xff00 : 0x00ff;
1254	1229
1255		switch( offset )
1256		{
1257		case 6: // return OK for 68k status register until motors hooked up
1258		return 0;
1259		default:
1260		return ( shrike_shared[offset >> 1] & ~mem_mask ) >> ( mem_mask & 8 );
1261		}
	1230	switch( offset )
	1231	{
	1232	case 6: // return OK for 68k status register until motors hooked up
	1233	return 0;
	1234	default:
	1235	return ( state->shrike_shared[offset >> 1] & ~mem_mask ) >> ( mem_mask & 8 );
	1236	}
1262	1237	}
1263	1238
1264	1239
1265	1240	WRITE8_HANDLER( shrike_shared_6809_w )
1266	1241	{
1267		UINT16 mem_mask = offset & 1 ? 0xff00 : 0x00ff;
1268		shrike_shared[offset >> 1] = ( shrike_shared[offset >> 1] & mem_mask ) | ( data << ( mem_mask & 0x8 ) );
	1242	balsente_state *state = (balsente_state *)space->machine->driver_data;
	1243	UINT16 mem_mask = offset & 1 ? 0xff00 : 0x00ff;
	1244	state->shrike_shared[offset >> 1] = ( state->shrike_shared[offset >> 1] & mem_mask ) | ( data << ( mem_mask & 0x8 ) );
1269	1245	}
1270	1246
1271	1247	// uses movep, so writes even 8 bit addresses to odd 16 bit addresses, reads as 16 bit from odd addresses
1272	1248	// i.e. write 0xdeadbeef to 10000, read 0xde from 10001, 0xad from 10003, 0xbe from 10005...
1273	1249	WRITE16_HANDLER( shrike_io_68k_w )
1274	1250	{
1275		COMBINE_DATA( &shrike_io[offset] );
	1251	balsente_state *state = (balsente_state *)space->machine->driver_data;
	1252	COMBINE_DATA( &state->shrike_io[offset] );
1276	1253	}
1277	1254
1278	1255	READ16_HANDLER( shrike_io_68k_r )
1279	1256	{
1280		return ( shrike_io[offset] & mem_mask ) >> ( 8 & ~mem_mask );
	1257	balsente_state *state = (balsente_state *)space->machine->driver_data;
	1258	return ( state->shrike_io[offset] & mem_mask ) >> ( 8 & ~mem_mask );
1281	1259	}
1282	1260

src/mame/machine/segag80.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "segag80r.h"
	8	#include "includes/segag80r.h"
9	9
10	10	UINT8 (*sega_decrypt)(offs_t,UINT8);
11	11

src/mame/machine/cchasm.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "video/vector.h"
9		#include "cchasm.h"
	9	#include "includes/cchasm.h"
10	10
11	11	WRITE16_HANDLER( cchasm_led_w )
12	12	{

src/mame/machine/qix.c

r6740	r6741
11	11	#include "cpu/m6805/m6805.h"
12	12	#include "cpu/m6809/m6809.h"
13	13	#include "sound/sn76496.h"
14		#include "qix.h"
	14	#include "includes/qix.h"
15	15
16	16
17	17

src/mame/machine/theglobp.c

r6740	r6741
238	238	}
239	239
240	240
241		MACHINE_RESET( theglobp )
	241	MACHINE_START( theglobp )
242	242	{
243	243	UINT8 *RAM = memory_region(machine, "maincpu");
244	244
r6740	r6741
250	250	theglobp_decrypt_rom_A(machine);
251	251	theglobp_decrypt_rom_B(machine);
252	252
253		/* The initial state of the counter is 0x0A */
254		counter = 0x0A;
255	253	memory_configure_bank(machine, "bank1", 0, 4, &RAM[0x10000], 0x4000);
256		memory_set_bank(machine, "bank1", 2);
257	254
258	255	state_save_register_global(machine, counter);
259	256	}
	257
	258
	259	MACHINE_RESET( theglobp )
	260	{
	261	/* The initial state of the counter is 0x0A */
	262	counter = 0x0A;
	263	memory_set_bank(machine, "bank1", 2);
	264	}

src/mame/machine/snes.c

r6740	r6741
1972	1972
1973	1973	*************************************/
1974	1974
	1975	static void snes_init_timers(running_machine *machine)
	1976	{
	1977	/* init timers and stop them */
	1978	snes_scanline_timer = timer_alloc(machine, snes_scanline_tick, NULL);
	1979	timer_adjust_oneshot(snes_scanline_timer, attotime_never, 0);
	1980	snes_hblank_timer = timer_alloc(machine, snes_hblank_tick, NULL);
	1981	timer_adjust_oneshot(snes_hblank_timer, attotime_never, 0);
	1982	snes_nmi_timer = timer_alloc(machine, snes_nmi_tick, NULL);
	1983	timer_adjust_oneshot(snes_nmi_timer, attotime_never, 0);
	1984	snes_hirq_timer = timer_alloc(machine, snes_hirq_tick_callback, NULL);
	1985	timer_adjust_oneshot(snes_hirq_timer, attotime_never, 0);
	1986
	1987	// SNES hcounter has a 0-339 range.  hblank starts at counter 260.
	1988	// clayfighter sets an HIRQ at 260, apparently it wants it to be before hdma kicks off, so we'll delay 2 pixels.
	1989	hblank_offset = 268;
	1990	timer_adjust_oneshot(snes_hblank_timer, video_screen_get_time_until_pos(machine->primary_screen, ((snes_ram[STAT78] & 0x10) == SNES_NTSC) ? SNES_VTOTAL_NTSC-1 : SNES_VTOTAL_PAL-1, hblank_offset), 0);
	1991
	1992	}
	1993
1975	1994	static void snes_init_ram(running_machine *machine)
1976	1995	{
1977	1996	const address_space *cpu0space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
r6740	r6741
2020	2039	snes_ram[WRIO] = 0xff;
2021	2040	snes_ram[VMAIN] = 0x80;
2022	2041
2023		/* init timers and stop them */
2024		snes_scanline_timer = timer_alloc(machine, snes_scanline_tick, NULL);
2025		timer_adjust_oneshot(snes_scanline_timer, attotime_never, 0);
2026		snes_hblank_timer = timer_alloc(machine, snes_hblank_tick, NULL);
2027		timer_adjust_oneshot(snes_hblank_timer, attotime_never, 0);
2028		snes_nmi_timer = timer_alloc(machine, snes_nmi_tick, NULL);
2029		timer_adjust_oneshot(snes_nmi_timer, attotime_never, 0);
2030		snes_hirq_timer = timer_alloc(machine, snes_hirq_tick_callback, NULL);
2031		timer_adjust_oneshot(snes_hirq_timer, attotime_never, 0);
2032
2033		// SNES hcounter has a 0-339 range.  hblank starts at counter 260.
2034		// clayfighter sets an HIRQ at 260, apparently it wants it to be before hdma kicks off, so we'll delay 2 pixels.
2035		hblank_offset = 268;
2036		timer_adjust_oneshot(snes_hblank_timer, video_screen_get_time_until_pos(machine->primary_screen, ((snes_ram[STAT78] & 0x10) == SNES_NTSC) ? SNES_VTOTAL_NTSC-1 : SNES_VTOTAL_PAL-1, hblank_offset), 0);
2037
2038	2042	switch (snes_has_addon_chip)
2039	2043	{
2040	2044	case HAS_DSP1:
r6740	r6741
2143	2147	st010_init(machine);
2144	2148	break;
2145	2149	}
	2150
	2151	snes_init_timers(machine);
2146	2152	}
2147	2153
2148	2154	MACHINE_RESET( snes )

src/mame/machine/vertigo.c

r6740	r6741
5	5	*************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "vertigo.h"
9		#include "exidy440.h"
	8	#include "includes/vertigo.h"
	9	#include "includes/exidy440.h"
10	10	#include "machine/74148.h"
11	11	#include "machine/pit8253.h"
12	12
13	13
	14	static const device_config *ttl74148;
14	15
	16
	17
15	18	/*************************************
16	19	*
17	20	*  Prototypes
r6740	r6741
20	23
21	24	static PIT8253_OUTPUT_CHANGED( v_irq4_w );
22	25	static PIT8253_OUTPUT_CHANGED( v_irq3_w );
23		static void update_irq(running_machine *machine);
24	26
25	27
26	28
r6740	r6741
59	61	};
60	62
61	63
62		static const struct TTL74148_interface irq_encoder =
63		{
64		update_irq
65		};
66	64
67
68
69	65	/*************************************
70	66	*
71	67	*  IRQ handling. The priority encoder
r6740	r6741
74	70	*
75	71	*************************************/
76	72
77		static void update_irq(running_machine *machine)
	73	void vertigo_update_irq(const device_config *device)
78	74	{
79	75	if (irq_state < 7)
80		cputag_set_input_line(machine, "maincpu", irq_state ^ 7, CLEAR_LINE);
	76	cputag_set_input_line(device->machine, "maincpu", irq_state ^ 7, CLEAR_LINE);
81	77
82		irq_state = TTL74148_output_r(0);
	78	irq_state = ttl74148_output_r(device);
83	79
84	80	if (irq_state < 7)
85		cputag_set_input_line(machine, "maincpu", irq_state ^ 7, ASSERT_LINE);
	81	cputag_set_input_line(device->machine, "maincpu", irq_state ^ 7, ASSERT_LINE);
86	82	}
87	83
88	84
89	85	static void update_irq_encoder(running_machine *machine, int line, int state)
90	86	{
91		TTL74148_input_line_w(0, line, !state);
92		TTL74148_update(machine, 0);
	87	ttl74148_input_line_w(ttl74148, line, !state);
	88	ttl74148_update(ttl74148);
93	89	}
94	90
95	91
r6740	r6741
207	203	*
208	204	*************************************/
209	205
	206	MACHINE_START( vertigo )
	207	{
	208	state_save_register_global(machine, irq_state);
	209	state_save_register_global(machine, adc_result);
	210	state_save_register_global(machine, irq4_time.seconds);
	211	state_save_register_global(machine, irq4_time.attoseconds);
	212
	213	vertigo_vproc_init(machine);
	214	}
	215
210	216	MACHINE_RESET( vertigo )
211	217	{
212	218	int i;
213	219
214		TTL74148_config(machine, 0, &irq_encoder);
215		TTL74148_enable_input_w(0, 0);
	220	ttl74148 = devtag_get_device(machine, "74148");
	221	ttl74148_enable_input_w(ttl74148, 0);
216	222
217	223	for (i = 0; i < 8; i++)
218		TTL74148_input_line_w(0, i, 1);
	224	ttl74148_input_line_w(ttl74148, i, 1);
219	225
220		TTL74148_update(machine, 0);
221		vertigo_vproc_init(machine);
	226	ttl74148_update(ttl74148);
	227	vertigo_vproc_reset(machine);
222	228
223	229	irq4_time = timer_get_time(machine);
224	230	irq_state = 7;
225
226		state_save_register_global(machine, irq_state);
227		state_save_register_global(machine, adc_result);
228		state_save_register_global(machine, irq4_time.seconds);
229		state_save_register_global(machine, irq4_time.attoseconds);
230	231	}
231	232
232	233

src/mame/machine/neoprot.c

r6740	r6741
18	18	***************************************************************************/
19	19
20	20	#include "driver.h"
21		#include "neogeo.h"
	21	#include "includes/neogeo.h"
22	22
23
24
25		static UINT32 fatfury2_prot_data;
26		static UINT16 neogeo_rng;
27
28		static UINT16 *pvc_cartridge_ram;
29
30
31	23	/************************ Fatal Fury 2 *************************/
32	24
33	25	static READ16_HANDLER( fatfury2_protection_16_r )
34	26	{
35		UINT16 res = fatfury2_prot_data >> 24;
	27	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	28	UINT16 res = state->fatfury2_prot_data >> 24;
36	29
37	30	switch (offset)
38	31	{
r6740	r6741
49	42	return ((res & 0xf0) >> 4) | ((res & 0x0f) << 4);
50	43
51	44	default:
52		logerror("unknown protection read at pc %06x, offset %08x\n",cpu_get_pc(space->cpu),offset<<1);
	45	logerror("unknown protection read at pc %06x, offset %08x\n", cpu_get_pc(space->cpu), offset << 1);
53	46	return 0;
54	47	}
55	48	}
r6740	r6741
57	50
58	51	static WRITE16_HANDLER( fatfury2_protection_16_w )
59	52	{
	53	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	54
60	55	switch (offset)
61	56	{
62	57	case 0x11112/2: /* data == 0x1111; expects 0xff000000 back */
63		fatfury2_prot_data = 0xff000000;
	58	state->fatfury2_prot_data = 0xff000000;
64	59	break;
65	60
66	61	case 0x33332/2: /* data == 0x3333; expects 0x0000ffff back */
67		fatfury2_prot_data = 0x0000ffff;
	62	state->fatfury2_prot_data = 0x0000ffff;
68	63	break;
69	64
70	65	case 0x44442/2: /* data == 0x4444; expects 0x00ff0000 back */
71		fatfury2_prot_data = 0x00ff0000;
	66	state->fatfury2_prot_data = 0x00ff0000;
72	67	break;
73	68
74	69	case 0x55552/2: /* data == 0x5555; read back from 55550, ffff0, 00000, ff000 */
75		fatfury2_prot_data = 0xff00ff00;
	70	state->fatfury2_prot_data = 0xff00ff00;
76	71	break;
77	72
78	73	case 0x56782/2: /* data == 0x1234; read back from 36000 *or* 36004 */
79		fatfury2_prot_data = 0xf05a3601;
	74	state->fatfury2_prot_data = 0xf05a3601;
80	75	break;
81	76
82	77	case 0x42812/2: /* data == 0x1824; read back from 36008 *or* 3600c */
83		fatfury2_prot_data = 0x81422418;
	78	state->fatfury2_prot_data = 0x81422418;
84	79	break;
85	80
86	81	case 0x55550/2:
r6740	r6741
90	85	case 0x36004/2:
91	86	case 0x36008/2:
92	87	case 0x3600c/2:
93		fatfury2_prot_data <<= 8;
	88	state->fatfury2_prot_data <<= 8;
94	89	break;
95	90
96	91	default:
97		logerror("unknown protection write at pc %06x, offset %08x, data %02x\n",cpu_get_pc(space->cpu),offset,data);
	92	logerror("unknown protection write at pc %06x, offset %08x, data %02x\n", cpu_get_pc(space->cpu), offset, data);
98	93	break;
99	94	}
100	95	}
101	96
102	97
103		void fatfury2_install_protection(running_machine *machine)
	98	void fatfury2_install_protection( running_machine *machine )
104	99	{
	100	neogeo_state *state = (neogeo_state *)machine->driver_data;
	101
105	102	/* the protection involves reading and writing addresses in the */
106	103	/* 0x2xxxxx range. There are several checks all around the code. */
107	104	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x2fffff, 0, 0, fatfury2_protection_16_r, fatfury2_protection_16_w);
108	105
109		state_save_register_global(machine, fatfury2_prot_data);
	106	state->fatfury2_prot_data = 0;
	107
	108	state_save_register_global(machine, state->fatfury2_prot_data);
110	109	}
111	110
112	111
r6740	r6741
124	123
125	124	switch (data)
126	125	{
127		case 0x0090:
128		logerror ("%06x kof98 - protection 0x0090 old %04x %04x\n",cpu_get_pc(space->cpu), mem16[0x100/2], mem16[0x102/2]);
129		mem16[0x100/2] = 0x00c2; mem16[0x102/2] = 0x00fd;
	126	case 0x0090:
	127	logerror ("%06x kof98 - protection 0x0090 old %04x %04x\n", cpu_get_pc(space->cpu), mem16[0x100/2], mem16[0x102/2]);
	128	mem16[0x100/2] = 0x00c2;
	129	mem16[0x102/2] = 0x00fd;
130	130	break;
131	131
132		case 0x00f0:
133		logerror ("%06x kof98 - protection 0x00f0 old %04x %04x\n",cpu_get_pc(space->cpu), mem16[0x100/2], mem16[0x102/2]);
134		mem16[0x100/2] = 0x4e45; mem16[0x102/2] = 0x4f2d;
	132	case 0x00f0:
	133	logerror ("%06x kof98 - protection 0x00f0 old %04x %04x\n", cpu_get_pc(space->cpu), mem16[0x100/2], mem16[0x102/2]);
	134	mem16[0x100/2] = 0x4e45;
	135	mem16[0x102/2] = 0x4f2d;
135	136	break;
136	137
137		default: // 00aa is written, but not needed?
138		logerror ("%06x kof98 - unknown protection write %04x\n",cpu_get_pc(space->cpu), data);
	138	default: // 00aa is written, but not needed?
	139	logerror ("%06x kof98 - unknown protection write %04x\n", cpu_get_pc(space->cpu), data);
139	140	break;
140	141	}
141	142	}
142	143
143	144
144		void install_kof98_protection(running_machine *machine)
	145	void install_kof98_protection( running_machine *machine )
145	146	{
146		/* when 0x20aaaa contains 0x0090 (word) then 0x100 (normally the neogeo header) should return 0x00c200fd
147		worked out using real hw */
	147	/* when 0x20aaaa contains 0x0090 (word) then 0x100 (normally the neogeo header) should return 0x00c200fd worked out using real hw */
148	148
149	149	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20aaaa, 0x20aaab, 0, 0, kof98_prot_w);
150	150	}
r6740	r6741
157	157	Also found on this special board is a QFP144 labeled with 0103
158	158	***************************************************************/
159	159
160		void mslugx_install_protection(running_machine *machine)
	160	void mslugx_install_protection( running_machine *machine )
161	161	{
162	162	int i;
163	163	UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
164	164
165	165	for (i = 0;i < (0x100000/2) - 4;i++)
166	166	{
167		if (mem16[i+0] == 0x0243 &&
168		mem16[i+1] == 0x0001 &&    /* andi.w  #$1, D3 */
169		mem16[i+2] == 0x6600)      /* bne xxxx */
	167	if (mem16[i + 0] == 0x0243 &&
	168	mem16[i + 1] == 0x0001 &&    /* andi.w  #$1, D3 */
	169	mem16[i + 2] == 0x6600)      /* bne xxxx */
170	170	{
171		mem16[i+2] = 0x4e71;
172		mem16[i+3] = 0x4e71;
	171	mem16[i + 2] = 0x4e71;
	172	mem16[i + 3] = 0x4e71;
173	173	}
174	174	}
175	175	mem16[0x3bdc/2] = 0x4e71;
r6740	r6741
375	375
376	376	static READ16_HANDLER( sma_random_r )
377	377	{
378		UINT16 old = neogeo_rng;
	378	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	379	UINT16 old = state->neogeo_rng;
379	380
380		UINT16 newbit = ((neogeo_rng >> 2) ^
381		(neogeo_rng >> 3) ^
382		(neogeo_rng >> 5) ^
383		(neogeo_rng >> 6) ^
384		(neogeo_rng >> 7) ^
385		(neogeo_rng >>11) ^
386		(neogeo_rng >>12) ^
387		(neogeo_rng >>15)) & 1;
	381	UINT16 newbit = ((state->neogeo_rng >> 2) ^
	382	(state->neogeo_rng >> 3) ^
	383	(state->neogeo_rng >> 5) ^
	384	(state->neogeo_rng >> 6) ^
	385	(state->neogeo_rng >> 7) ^
	386	(state->neogeo_rng >>11) ^
	387	(state->neogeo_rng >>12) ^
	388	(state->neogeo_rng >>15)) & 1;
388	389
389		neogeo_rng = (neogeo_rng << 1) | newbit;
	390	state->neogeo_rng = (state->neogeo_rng << 1) | newbit;
390	391
391	392	return old;
392	393	}
393	394
394	395
395		void neogeo_reset_rng(void)
	396	void neogeo_reset_rng( running_machine *machine )
396	397	{
397		neogeo_rng = 0x2345;
	398	neogeo_state *state = (neogeo_state *)machine->driver_data;
	399	state->neogeo_rng = 0x2345;
398	400	}
399	401
400	402
401		static void sma_install_random_read_handler(running_machine *machine, int addr1, int addr2)
	403	static void sma_install_random_read_handler( running_machine *machine, int addr1, int addr2 )
402	404	{
403		state_save_register_global(machine, neogeo_rng);
	405	neogeo_state *state = (neogeo_state *)machine->driver_data;
	406	state_save_register_global(machine, state->neogeo_rng);
404	407
405	408	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), addr1, addr1 + 1, 0, 0, sma_random_r);
406	409	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), addr2, addr2 + 1, 0, 0, sma_random_r);
407	410	}
408	411
409	412
410		void kof99_install_protection(running_machine *machine)
	413	void kof99_install_protection( running_machine *machine )
411	414	{
412	415	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2ffff0, 0x2ffff1, 0, 0, kof99_bankswitch_w);
413	416	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
r6740	r6741
416	419	}
417	420
418	421
419		void garou_install_protection(running_machine *machine)
	422	void garou_install_protection( running_machine *machine )
420	423	{
421	424	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fffc0, 0x2fffc1, 0, 0, garou_bankswitch_w);
422	425	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
r6740	r6741
425	428	}
426	429
427	430
428		void garouo_install_protection(running_machine *machine)
	431	void garouo_install_protection( running_machine *machine )
429	432	{
430	433	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fffc0, 0x2fffc1, 0, 0, garouo_bankswitch_w);
431	434	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
r6740	r6741
434	437	}
435	438
436	439
437		void mslug3_install_protection(running_machine *machine)
	440	void mslug3_install_protection( running_machine *machine )
438	441	{
439	442	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fffe4, 0x2fffe5, 0, 0, mslug3_bankswitch_w);
440	443	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
r6740	r6741
443	446	}
444	447
445	448
446		void kof2000_install_protection(running_machine *machine)
	449	void kof2000_install_protection( running_machine *machine )
447	450	{
448	451	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fffec, 0x2fffed, 0, 0, kof2000_bankswitch_w);
449	452	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
r6740	r6741
457	460	mslug5, svcchaos, kof2003
458	461	***************************************************************/
459	462
460		static void pvc_w8(offs_t offset, UINT8 data)
	463	static void pvc_w8( running_machine *machine, offs_t offset, UINT8 data )
461	464	{
462		*(((UINT8*)pvc_cartridge_ram)+BYTE_XOR_LE(offset))=data;
	465	neogeo_state *state = (neogeo_state *)machine->driver_data;
	466	*(((UINT8*)state->pvc_cartridge_ram) + BYTE_XOR_LE(offset)) = data;
463	467	}
464	468
465	469
466		static UINT8 pvc_r8(offs_t offset)
	470	static UINT8 pvc_r8( running_machine *machine, offs_t offset )
467	471	{
468		return *(((UINT8*)pvc_cartridge_ram)+BYTE_XOR_LE(offset));
	472	neogeo_state *state = (neogeo_state *)machine->driver_data;
	473	return *(((UINT8*)state->pvc_cartridge_ram) + BYTE_XOR_LE(offset));
469	474	}
470	475
471	476
472		static void pvc_prot1( void )
	477	static void pvc_prot1( running_machine *machine )
473	478	{
474	479	UINT8 b1, b2;
475		b1 = pvc_r8(0x1fe1);
476		b2 = pvc_r8(0x1fe0);
477		pvc_w8(0x1fe2,(((b2>>0)&0xf)<<1)|((b1>>4)&1));
478		pvc_w8(0x1fe3,(((b2>>4)&0xf)<<1)|((b1>>5)&1));
479		pvc_w8(0x1fe4,(((b1>>0)&0xf)<<1)|((b1>>6)&1));
480		pvc_w8(0x1fe5, (b1>>7));
	480
	481	b1 = pvc_r8(machine, 0x1fe1);
	482	b2 = pvc_r8(machine, 0x1fe0);
	483	pvc_w8(machine, 0x1fe2, (((b2 >> 0) & 0xf) << 1) | ((b1 >> 4) & 1));
	484	pvc_w8(machine, 0x1fe3, (((b2 >> 4) & 0xf) << 1) | ((b1 >> 5) & 1));
	485	pvc_w8(machine, 0x1fe4, (((b1 >> 0) & 0xf) << 1) | ((b1 >> 6) & 1));
	486	pvc_w8(machine, 0x1fe5, (b1 >> 7));
481	487	}
482	488
483	489
484		static void pvc_prot2( void ) // on writes to e8/e9/ea/eb
	490	static void pvc_prot2( running_machine *machine ) // on writes to e8/e9/ea/eb
485	491	{
486	492	UINT8 b1, b2, b3, b4;
487		b1 = pvc_r8(0x1fe9);
488		b2 = pvc_r8(0x1fe8);
489		b3 = pvc_r8(0x1feb);
490		b4 = pvc_r8(0x1fea);
491		pvc_w8(0x1fec,(b2>>1)|((b1>>1)<<4));
492		pvc_w8(0x1fed,(b4>>1)|((b2&1)<<4)|((b1&1)<<5)|((b4&1)<<6)|((b3&1)<<7));
	493
	494	b1 = pvc_r8(machine, 0x1fe9);
	495	b2 = pvc_r8(machine, 0x1fe8);
	496	b3 = pvc_r8(machine, 0x1feb);
	497	b4 = pvc_r8(machine, 0x1fea);
	498	pvc_w8(machine, 0x1fec, (b2 >> 1) | ((b1 >> 1) << 4));
	499	pvc_w8(machine, 0x1fed, (b4 >> 1) | ((b2 & 1) << 4) | ((b1 & 1) << 5) | ((b4 & 1) << 6) | ((b3 & 1) << 7));
493	500	}
494	501
495	502
496	503	static void pvc_write_bankswitch( const address_space *space )
497	504	{
	505	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
498	506	UINT32 bankaddress;
499		bankaddress = ((pvc_cartridge_ram[0xff8]>>8)|(pvc_cartridge_ram[0xff9]<<8));
500		*(((UINT8 *)pvc_cartridge_ram) + BYTE_XOR_LE(0x1ff0)) = 0xa0;
501		*(((UINT8 *)pvc_cartridge_ram) + BYTE_XOR_LE(0x1ff1)) &= 0xfe;
502		*(((UINT8 *)pvc_cartridge_ram) + BYTE_XOR_LE(0x1ff3)) &= 0x7f;
503		neogeo_set_main_cpu_bank_address(space, bankaddress+0x100000);
	507
	508	bankaddress = ((state->pvc_cartridge_ram[0xff8] >> 8)|(state->pvc_cartridge_ram[0xff9] << 8));
	509	*(((UINT8 *)state->pvc_cartridge_ram) + BYTE_XOR_LE(0x1ff0)) = 0xa0;
	510	*(((UINT8 *)state->pvc_cartridge_ram) + BYTE_XOR_LE(0x1ff1)) &= 0xfe;
	511	*(((UINT8 *)state->pvc_cartridge_ram) + BYTE_XOR_LE(0x1ff3)) &= 0x7f;
	512	neogeo_set_main_cpu_bank_address(space, bankaddress + 0x100000);
504	513	}
505	514
506	515
507	516	static READ16_HANDLER( pvc_prot_r )
508	517	{
509		return pvc_cartridge_ram[ offset ];
	518	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	519	return state->pvc_cartridge_ram[offset];
510	520	}
511	521
512	522
513	523	static WRITE16_HANDLER( pvc_prot_w )
514	524	{
515		COMBINE_DATA( &pvc_cartridge_ram[ offset ] );
516		if (offset == 0xff0)pvc_prot1();
517		else if(offset >= 0xff4 && offset <= 0xff5)pvc_prot2();
518		else if(offset >= 0xff8)pvc_write_bankswitch(space);
	525	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	526
	527	COMBINE_DATA(&state->pvc_cartridge_ram[offset] );
	528	if (offset == 0xff0)
	529	pvc_prot1(space->machine);
	530	else if(offset >= 0xff4 && offset <= 0xff5)
	531	pvc_prot2(space->machine);
	532	else if(offset >= 0xff8)
	533	pvc_write_bankswitch(space);
519	534	}
520	535
521	536
522	537	void install_pvc_protection( running_machine *machine )
523	538	{
524		pvc_cartridge_ram = auto_alloc_array(machine, UINT16, 0x2000/2);
525		state_save_register_global_pointer(machine, pvc_cartridge_ram, 0x2000 / 2);
	539	neogeo_state *state = (neogeo_state *)machine->driver_data;
	540	state->pvc_cartridge_ram = auto_alloc_array(machine, UINT16, 0x2000 / 2);
	541	state_save_register_global_pointer(machine, state->pvc_cartridge_ram, 0x2000 / 2);
526	542
527	543	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, pvc_prot_r, pvc_prot_w);
528	544	}

src/mame/machine/atarigen.c

r6740	r6741
14	14	#include "sound/tms5220.h"
15	15	#include "sound/okim6295.h"
16	16	#include "sound/pokey.h"
17		#include "slapstic.h"
	17	#include "includes/slapstic.h"
18	18	#include "atarigen.h"
19	19
20	20
r6740	r6741
32	32	STATIC FUNCTION DECLARATIONS
33	33	***************************************************************************/
34	34
	35	static STATE_POSTLOAD( slapstic_postload );
	36
35	37	static TIMER_CALLBACK( scanline_interrupt_callback );
36	38
37	39	static void decompress_eeprom_word(UINT16 *dest, const UINT16 *data);
r6740	r6741
55	57
56	58
57	59	/***************************************************************************
	60	INLINE FUNCTIONS
	61	***************************************************************************/
	62
	63	INLINE const atarigen_screen_timer *get_screen_timer(const device_config *screen)
	64	{
	65	atarigen_state *state = (atarigen_state *)screen->machine->driver_data;
	66	int i;
	67
	68	/* find the index of the timer that matches the screen */
	69	for (i = 0; i < ARRAY_LENGTH(state->screen_timer); i++)
	70	if (state->screen_timer[i].screen == screen)
	71	return &state->screen_timer[i];
	72
	73	fatalerror("Unexpected: no atarivc_eof_update_timer for screen '%s'\n", screen->tag);
	74	return NULL;
	75	}
	76
	77
	78
	79	/***************************************************************************
	80	OVERALL INIT
	81	***************************************************************************/
	82
	83	void atarigen_init(running_machine *machine)
	84	{
	85	atarigen_state *state = (atarigen_state *)machine->driver_data;
	86	const device_config *screen;
	87	int i;
	88
	89	/* allocate timers for all screens */
	90	assert(video_screen_count(machine->config) <= ARRAY_LENGTH(state->screen_timer));
	91	for (i = 0, screen = video_screen_first(machine->config); screen != NULL; i++, screen = video_screen_next(screen))
	92	{
	93	state->screen_timer[i].screen = screen;
	94	state->screen_timer[i].scanline_interrupt_timer = timer_alloc(machine, scanline_interrupt_callback, (void *)screen);
	95	state->screen_timer[i].scanline_timer = timer_alloc(machine, scanline_timer_callback, (void *)screen);
	96	state->screen_timer[i].atarivc_eof_update_timer = timer_alloc(machine, atarivc_eof_update, (void *)screen);
	97	}
	98
	99	state_save_register_global(machine, state->scanline_int_state);
	100	state_save_register_global(machine, state->sound_int_state);
	101	state_save_register_global(machine, state->video_int_state);
	102
	103	state_save_register_global(machine, state->cpu_to_sound_ready);
	104	state_save_register_global(machine, state->sound_to_cpu_ready);
	105
	106	state_save_register_global(machine, state->atarivc_state.latch1);            /* latch #1 value (-1 means disabled) */
	107	state_save_register_global(machine, state->atarivc_state.latch2);            /* latch #2 value (-1 means disabled) */
	108	state_save_register_global(machine, state->atarivc_state.rowscroll_enable);      /* true if row-scrolling is enabled */
	109	state_save_register_global(machine, state->atarivc_state.palette_bank);         /* which palette bank is enabled */
	110	state_save_register_global(machine, state->atarivc_state.pf0_xscroll);         /* playfield 1 xscroll */
	111	state_save_register_global(machine, state->atarivc_state.pf0_xscroll_raw);      /* playfield 1 xscroll raw value */
	112	state_save_register_global(machine, state->atarivc_state.pf0_yscroll);         /* playfield 1 yscroll */
	113	state_save_register_global(machine, state->atarivc_state.pf1_xscroll);         /* playfield 2 xscroll */
	114	state_save_register_global(machine, state->atarivc_state.pf1_xscroll_raw);      /* playfield 2 xscroll raw value */
	115	state_save_register_global(machine, state->atarivc_state.pf1_yscroll);         /* playfield 2 yscroll */
	116	state_save_register_global(machine, state->atarivc_state.mo_xscroll);         /* sprite xscroll */
	117	state_save_register_global(machine, state->atarivc_state.mo_yscroll);         /* sprite xscroll */
	118
	119	state_save_register_global(machine, state->eeprom_unlocked);
	120
	121	state_save_register_global(machine, state->slapstic_num);
	122	state_save_register_global(machine, state->slapstic_bank);
	123	state_save_register_global(machine, state->slapstic_last_pc);
	124	state_save_register_global(machine, state->slapstic_last_address);
	125
	126	state_save_register_global(machine, state->cpu_to_sound);
	127	state_save_register_global(machine, state->sound_to_cpu);
	128	state_save_register_global(machine, state->timed_int);
	129	state_save_register_global(machine, state->ym2151_int);
	130
	131	state_save_register_global(machine, state->scanlines_per_callback);
	132
	133	state_save_register_global(machine, state->actual_vc_latch0);
	134	state_save_register_global(machine, state->actual_vc_latch1);
	135
	136	state_save_register_global(machine, state->playfield_latch);
	137	state_save_register_global(machine, state->playfield2_latch);
	138
	139	/* need a postload to reset the state */
	140	state_save_register_postload(machine, slapstic_postload, NULL);
	141	}
	142
	143
	144
	145	/***************************************************************************
58	146	INTERRUPT HANDLING
59	147	***************************************************************************/
60	148
r6740	r6741
65	153
66	154	void atarigen_interrupt_reset(atarigen_state *state, atarigen_int_func update_int)
67	155	{
68		int i;
69
70	156	/* set the callback */
71	157	state->update_int_callback = update_int;
72	158
73	159	/* reset the interrupt states */
74	160	state->video_int_state = state->sound_int_state = state->scanline_int_state = 0;
75
76		/* clear the timers */
77		for (i = 0; i < ATARIMO_MAX; i++)
78		{
79		state->scanline_interrupt_timer_screens[i] = NULL;
80		state->scanline_interrupt_timers[i] = NULL;
81		state->scanline_timer_screens[i] = NULL;
82		state->scanline_timers[i] = NULL;
83		}
84	161	}
85	162
86	163
r6740	r6741
98	175
99	176
100	177	/*---------------------------------------------------------------
101		get_scanline_interrupt_timer_for_screen: Retrieves or
102		creates a scanline interrupt timer.
103		---------------------------------------------------------------*/
104
105		static emu_timer *get_scanline_interrupt_timer_for_screen(const device_config *screen)
106		{
107		atarigen_state *state = (atarigen_state *)screen->machine->driver_data;
108		int i;
109
110		/* find the index of the timer that matches the screen */
111		for (i = 0; i < ATARIMO_MAX; i++)
112		{
113		/* matching */
114		if (state->scanline_interrupt_timer_screens[i] == screen)
115		break;
116
117		/* no more */
118		if (state->scanline_interrupt_timer_screens[i] == NULL)
119		break;
120		}
121
122		/* check that we still have room */
123		assert(i != ATARIMO_MAX);
124
125		/* need to create? */
126		if (state->scanline_interrupt_timer_screens[i] == NULL)
127		{
128		state->scanline_interrupt_timer_screens[i] = screen;
129		state->scanline_interrupt_timers[i] = timer_alloc(screen->machine, scanline_interrupt_callback, (void *)screen);
130		}
131
132		/* found it */
133		return state->scanline_interrupt_timers[i];
134		}
135
136
137		/*---------------------------------------------------------------
138	178	atarigen_scanline_int_set: Sets the scanline when the next
139	179	scanline interrupt should be generated.
140	180	---------------------------------------------------------------*/
141	181
142	182	void atarigen_scanline_int_set(const device_config *screen, int scanline)
143	183	{
144		emu_timer *timer = get_scanline_interrupt_timer_for_screen(screen);
	184	emu_timer *timer = get_screen_timer(screen)->scanline_interrupt_timer;
145	185	timer_adjust_oneshot(timer, video_screen_get_time_until_pos(screen, scanline, 0), 0);
146	186	}
147	187
r6740	r6741
252	292	static TIMER_CALLBACK( scanline_interrupt_callback )
253	293	{
254	294	const device_config *screen = (const device_config *)ptr;
255		emu_timer *timer = get_scanline_interrupt_timer_for_screen(screen);
	295	emu_timer *timer = get_screen_timer(screen)->scanline_interrupt_timer;
256	296
257	297	/* generate the interrupt */
258	298	atarigen_scanline_int_gen(cputag_get_cpu(machine, "maincpu"));
r6740	r6741
880	920	***************************************************************************/
881	921
882	922	/*---------------------------------------------------------------
883		get_scanline_timer_for_screen: Retrieves or
884		creates the the scanline timer.
885		---------------------------------------------------------------*/
886
887		static emu_timer *get_scanline_timer_for_screen(const device_config *screen)
888		{
889		atarigen_state *state = (atarigen_state *)screen->machine->driver_data;
890		int i;
891
892		/* find the index of the timer that matches the screen */
893		for (i = 0; i < ATARIMO_MAX; i++)
894		{
895		/* matching */
896		if (state->scanline_timer_screens[i] == screen)
897		break;
898
899		/* no more */
900		if (state->scanline_timer_screens[i] == NULL)
901		break;
902		}
903
904		/* check that we still have room */
905		assert(i != ATARIMO_MAX);
906
907		/* need to create? */
908		if (state->scanline_timer_screens[i] == NULL)
909		{
910		state->scanline_timer_screens[i] = screen;
911		state->scanline_timers[i] = timer_alloc(screen->machine, scanline_timer_callback, (void *)screen);
912		}
913
914		/* found it */
915		return state->scanline_timers[i];
916		}
917
918
919		/*---------------------------------------------------------------
920	923	atarigen_scanline_timer_reset: Sets up the scanline timer.
921	924	---------------------------------------------------------------*/
922	925
r6740	r6741
931	934	/* set a timer to go off at scanline 0 */
932	935	if (state->scanline_callback != NULL)
933	936	{
934		emu_timer *timer = get_scanline_timer_for_screen(screen);
	937	emu_timer *timer = get_screen_timer(screen)->scanline_timer;
935	938	timer_adjust_oneshot(timer, video_screen_get_time_until_pos(screen, 0, 0), 0);
936	939	}
937
938		/* implicitly allocate a scanline interrupt timer */
939		get_scanline_interrupt_timer_for_screen(screen);
940
941	940	}
942	941
943	942
r6740	r6741
961	960	scanline += state->scanlines_per_callback;
962	961	if (scanline >= video_screen_get_height(screen))
963	962	scanline = 0;
964		timer_adjust_oneshot(get_scanline_timer_for_screen(screen), video_screen_get_time_until_pos(screen, scanline, 0), scanline);
	963	timer_adjust_oneshot(get_screen_timer(screen)->scanline_timer, video_screen_get_time_until_pos(screen, scanline, 0), scanline);
965	964	}
966	965	}
967	966
r6740	r6741
972	971	***************************************************************************/
973	972
974	973	/*---------------------------------------------------------------
975		get_scanline_timer_for_screen: Retrieves or
976		creates the the scanline timer.
977		---------------------------------------------------------------*/
978
979		static emu_timer *get_atarivc_eof_update_timer_for_screen(const device_config *screen)
980		{
981		atarigen_state *state = (atarigen_state *)screen->machine->driver_data;
982		int i;
983
984		/* find the index of the timer that matches the screen */
985		for (i = 0; i < ATARIMO_MAX; i++)
986		{
987		/* matching */
988		if (state->atarivc_eof_update_timer_screens[i] == screen)
989		break;
990
991		/* no more */
992		if (state->atarivc_eof_update_timer_screens[i] == NULL)
993		break;
994		}
995
996		/* check that we still have room */
997		assert(i != ATARIMO_MAX);
998
999		/* need to create? */
1000		if (state->atarivc_eof_update_timer_screens[i] == NULL)
1001		{
1002		state->atarivc_eof_update_timer_screens[i] = screen;
1003		state->atarivc_eof_update_timers[i] = timer_alloc(screen->machine, atarivc_eof_update, (void *)screen);
1004		}
1005
1006		/* found it */
1007		return state->atarivc_eof_update_timers[i];
1008		}
1009
1010
1011		/*---------------------------------------------------------------
1012	974	atarivc_eof_update: Callback that slurps up data and feeds
1013	975	it into the video controller registers every refresh.
1014	976	---------------------------------------------------------------*/
r6740	r6741
1017	979	{
1018	980	atarigen_state *state = (atarigen_state *)machine->driver_data;
1019	981	const device_config *screen = (const device_config *)ptr;
1020		emu_timer *timer = get_atarivc_eof_update_timer_for_screen(screen);
	982	emu_timer *timer = get_screen_timer(screen)->atarivc_eof_update_timer;
1021	983	int i;
1022	984
1023	985	/* echo all the commands to the video controller */
r6740	r6741
1063	1025	void atarivc_reset(const device_config *screen, UINT16 *eof_data, int playfields)
1064	1026	{
1065	1027	atarigen_state *state = (atarigen_state *)screen->machine->driver_data;
1066		int i;
1067	1028
1068	1029	/* this allows us to manually reset eof_data to NULL if it's not used */
1069	1030	state->atarivc_eof_data = eof_data;
r6740	r6741
1077	1038	state->atarivc_state.latch1 = state->atarivc_state.latch2 = -1;
1078	1039	state->actual_vc_latch0 = state->actual_vc_latch1 = -1;
1079	1040
1080		/* clear the timers */
1081		for (i = 0; i < ATARIMO_MAX; i++)
1082		{
1083		state->atarivc_eof_update_timer_screens[i] = NULL;
1084		state->atarivc_eof_update_timers[i] = NULL;
1085		}
1086
1087	1041	/* start a timer to go off a little before scanline 0 */
1088	1042	if (state->atarivc_eof_data)
1089	1043	{
1090		emu_timer *timer = get_atarivc_eof_update_timer_for_screen(screen);
	1044	emu_timer *timer = get_screen_timer(screen)->atarivc_eof_update_timer;
1091	1045	timer_adjust_oneshot(timer, video_screen_get_time_until_pos(screen, 0, 0), 0);
1092	1046	}
1093	1047	}
r6740	r6741
1637	1591	/* make the assembled data our new source data */
1638	1592	gfx_element_set_source(gx0, srcdata);
1639	1593	}
1640
1641
1642		/***************************************************************************
1643		SAVE STATE
1644		***************************************************************************/
1645
1646		void atarigen_init_save_state(running_machine *machine)
1647		{
1648		atarigen_state *state = (atarigen_state *)machine->driver_data;
1649
1650		state_save_register_global(machine, state->scanline_int_state);
1651		state_save_register_global(machine, state->sound_int_state);
1652		state_save_register_global(machine, state->video_int_state);
1653
1654		state_save_register_global(machine, state->cpu_to_sound_ready);
1655		state_save_register_global(machine, state->sound_to_cpu_ready);
1656
1657		state_save_register_global(machine, state->atarivc_state.latch1);            /* latch #1 value (-1 means disabled) */
1658		state_save_register_global(machine, state->atarivc_state.latch2);            /* latch #2 value (-1 means disabled) */
1659		state_save_register_global(machine, state->atarivc_state.rowscroll_enable);      /* true if row-scrolling is enabled */
1660		state_save_register_global(machine, state->atarivc_state.palette_bank);         /* which palette bank is enabled */
1661		state_save_register_global(machine, state->atarivc_state.pf0_xscroll);         /* playfield 1 xscroll */
1662		state_save_register_global(machine, state->atarivc_state.pf0_xscroll_raw);      /* playfield 1 xscroll raw value */
1663		state_save_register_global(machine, state->atarivc_state.pf0_yscroll);         /* playfield 1 yscroll */
1664		state_save_register_global(machine, state->atarivc_state.pf1_xscroll);         /* playfield 2 xscroll */
1665		state_save_register_global(machine, state->atarivc_state.pf1_xscroll_raw);      /* playfield 2 xscroll raw value */
1666		state_save_register_global(machine, state->atarivc_state.pf1_yscroll);         /* playfield 2 yscroll */
1667		state_save_register_global(machine, state->atarivc_state.mo_xscroll);         /* sprite xscroll */
1668		state_save_register_global(machine, state->atarivc_state.mo_yscroll);         /* sprite xscroll */
1669
1670		state_save_register_global(machine, state->eeprom_unlocked);
1671
1672		state_save_register_global(machine, state->slapstic_num);
1673		state_save_register_global(machine, state->slapstic_bank);
1674		state_save_register_global(machine, state->slapstic_last_pc);
1675		state_save_register_global(machine, state->slapstic_last_address);
1676
1677		state_save_register_global(machine, state->cpu_to_sound);
1678		state_save_register_global(machine, state->sound_to_cpu);
1679		state_save_register_global(machine, state->timed_int);
1680		state_save_register_global(machine, state->ym2151_int);
1681
1682		state_save_register_global(machine, state->scanlines_per_callback);
1683
1684		state_save_register_global(machine, state->actual_vc_latch0);
1685		state_save_register_global(machine, state->actual_vc_latch1);
1686
1687		state_save_register_global(machine, state->playfield_latch);
1688		state_save_register_global(machine, state->playfield2_latch);
1689
1690		/* need a postload to reset the state */
1691		state_save_register_postload(machine, slapstic_postload, NULL);
1692		}

src/mame/machine/atarigen.h

r6740	r6741
32	32
33	33	typedef void (*atarigen_scanline_func)(const device_config *screen, int scanline);
34	34
35		struct atarivc_state_desc
	35	typedef struct _atarivc_state_desc atarivc_state_desc;
	36	struct _atarivc_state_desc
36	37	{
37	38	UINT32 latch1;                        /* latch #1 value (-1 means disabled) */
38	39	UINT32 latch2;                        /* latch #2 value (-1 means disabled) */
r6740	r6741
49	50	};
50	51
51	52
	53	typedef struct _atarigen_screen_timer atarigen_screen_timer;
	54	struct _atarigen_screen_timer
	55	{
	56	const device_config *screen;
	57	emu_timer *         scanline_interrupt_timer;
	58	emu_timer *         scanline_timer;
	59	emu_timer *         atarivc_eof_update_timer;
	60	};
	61
	62
52	63	typedef struct _atarigen_state atarigen_state;
53	64	struct _atarigen_state
54	65	{
r6740	r6741
81	92
82	93	UINT16 *         atarivc_data;
83	94	UINT16 *         atarivc_eof_data;
84		struct atarivc_state_desc atarivc_state;
	95	atarivc_state_desc    atarivc_state;
85	96
86	97	/* internal state */
87	98	atarigen_int_func       update_int_callback;
r6740	r6741
113	124	UINT32               playfield_latch;
114	125	UINT32               playfield2_latch;
115	126
116		const device_config *   scanline_interrupt_timer_screens[ATARIMO_MAX];
117		emu_timer *            scanline_interrupt_timers[ATARIMO_MAX];
118
119		const device_config *   scanline_timer_screens[ATARIMO_MAX];
120		emu_timer *            scanline_timers[ATARIMO_MAX];
121
122		const device_config *   atarivc_eof_update_timer_screens[ATARIMO_MAX];
123		emu_timer *            atarivc_eof_update_timers[ATARIMO_MAX];
	127	atarigen_screen_timer   screen_timer[2];
124	128	};
125	129
126	130
r6740	r6741
130	134	***************************************************************************/
131	135
132	136	/*---------------------------------------------------------------
	137	OVERALL INIT
	138	---------------------------------------------------------------*/
	139
	140	void atarigen_init(running_machine *machine);
	141
	142
	143	/*---------------------------------------------------------------
133	144	INTERRUPT HANDLING
134	145	---------------------------------------------------------------*/
135	146
r6740	r6741
272	283	void atarigen_blend_gfx(running_machine *machine, int gfx0, int gfx1, int mask0, int mask1);
273	284
274	285
275		/*---------------------------------------------------------------
276		STATE SAVE
277		---------------------------------------------------------------*/
278	286
279		void atarigen_init_save_state(running_machine *machine);
280
281	287	/***************************************************************************
282	288	GENERAL ATARI NOTES
283	289	**************************************************************************##

src/mame/machine/midwunit.c

r6740	r6741
8	8	#include "cpu/tms34010/tms34010.h"
9	9	#include "cpu/m6809/m6809.h"
10	10	#include "audio/dcs.h"
11		#include "midwunit.h"
	11	#include "includes/midwunit.h"
12	12	#include "midwayic.h"
13	13
14	14

src/mame/machine/neocrypt.c

r6740	r6741
47	47	***************************************************************************/
48	48
49	49	#include "driver.h"
50		#include "neogeo.h"
	50	#include "includes/neogeo.h"
51	51
52	52
53	53	/***************************************************************************

src/mame/machine/tecmosys.c

r6740	r6741
29	29	*/
30	30
31	31	#include "driver.h"
32		#include "tecmosys.h"
	32	#include "includes/tecmosys.h"
33	33
34	34	enum DEV_STATUS
35	35	{

src/mame/machine/naomibd.c

r6740	r6741
177	177	#include "machine/x76f100.h"
178	178	#include "cdrom.h"
179	179	#include "includes/naomi.h"
180		#include "naomibd.h"
	180	#include "includes/naomibd.h"
181	181
182	182	#define NAOMIBD_FLAG_AUTO_ADVANCE   (8)   // address auto-advances on read
183	183	#define NAOMIBD_FLAG_SPECIAL_MODE   (4)   // used to access protection registers

src/mame/machine/tx1.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "debugger.h"
9		#include "tx1.h"
	9	#include "includes/tx1.h"
10	10
11	11
12	12	/*

src/mame/machine/decoprot.c

r6740	r6741
72	72
73	73	#include "driver.h"
74	74	#include "machine/eeprom.h"
75		#include "decoprot.h"
	75	#include "includes/decoprot.h"
76	76
77	77	#define DECO_PORT(p) (prot_ram[p/2])
78	78

src/mame/machine/mcr.c

r6740	r6741
14	14	#include "cpu/m6809/m6809.h"
15	15	#include "cpu/z80/z80.h"
16	16	#include "cpu/z80/z80daisy.h"
17		#include "mcr.h"
	17	#include "includes/mcr.h"
18	18
19	19	#define VERBOSE 0
20	20	#define LOG(x) do { if (VERBOSE) logerror x; } while (0)

src/mame/machine/tatsumi.c

r6740	r6741
1	1	#include "driver.h"
2		#include "tatsumi.h"
	2	#include "includes/tatsumi.h"
3	3	#include "sound/2151intf.h"
4	4	#include "sound/okim6295.h"
5	5

src/mame/machine/arkanoid.c

r6740	r6741
8	8	***************************************************************************/
9	9
10	10	#include "driver.h"
11		#include "arkanoid.h"
	11	#include "includes/arkanoid.h"
12	12
13	13
14	14	/* To log specific reads and writes of the bootlegs */

src/mame/machine/galaxold.c

r6740	r6741
12	12	#include "includes/galaxold.h"
13	13
14	14	static int irq_line;
15		static emu_timer *int_timer;
	15	static const device_config *int_timer;
16	16
17	17	static UINT8 _4in1_bank;
18	18
19		static void galaxold_7474_9M_2_callback(running_machine *machine)
	19	void galaxold_7474_9m_2_callback(const device_config *device)
20	20	{
21	21	/* Q bar clocks the other flip-flop,
22	22	Q is VBLANK (not visible to the CPU) */
23		TTL7474_clock_w(1, TTL7474_output_comp_r(0));
24		TTL7474_update(machine, 1);
	23	const device_config *target = devtag_get_device(device->machine, "7474_9m_1");
	24	ttl7474_clock_w(target, ttl7474_output_comp_r(device));
	25	ttl7474_update(target);
25	26	}
26	27
27		static void galaxold_7474_9M_1_callback(running_machine *machine)
	28	void galaxold_7474_9m_1_callback(const device_config *device)
28	29	{
29	30	/* Q goes to the NMI line */
30		cputag_set_input_line(machine, "maincpu", irq_line, TTL7474_output_r(1) ? CLEAR_LINE : ASSERT_LINE);
	31	cputag_set_input_line(device->machine, "maincpu", irq_line, ttl7474_output_r(device) ? CLEAR_LINE : ASSERT_LINE);
31	32	}
32	33
33		static const struct TTL7474_interface galaxold_7474_9M_2_intf =
34		{
35		galaxold_7474_9M_2_callback
36		};
37
38		static const struct TTL7474_interface galaxold_7474_9M_1_intf =
39		{
40		galaxold_7474_9M_1_callback
41		};
42
43
44	34	WRITE8_HANDLER( galaxold_nmi_enable_w )
45	35	{
46		TTL7474_preset_w(1, data);
47		TTL7474_update(space->machine, 1);
	36	const device_config *target = devtag_get_device(space->machine, "7474_9m_1");
	37	ttl7474_preset_w(target, data);
	38	ttl7474_update(target);
48	39	}
49	40
50	41
51		static TIMER_CALLBACK( interrupt_timer )
	42	TIMER_DEVICE_CALLBACK( galaxold_interrupt_timer )
52	43	{
	44	const device_config *target = devtag_get_device(timer->machine, "7474_9m_2");
	45
53	46	/* 128V, 64V and 32V go to D */
54		TTL7474_d_w(0, (param & 0xe0) != 0xe0);
	47	ttl7474_d_w(target, (param & 0xe0) != 0xe0);
55	48
56	49	/* 16V clocks the flip-flop */
57		TTL7474_clock_w(0, param & 0x10);
	50	ttl7474_clock_w(target, param & 0x10);
58	51
59	52	param = (param + 0x10) & 0xff;
60	53
61		timer_adjust_oneshot(int_timer, video_screen_get_time_until_pos(machine->primary_screen, param, 0), param);
	54	timer_device_adjust_oneshot(int_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, param, 0), param);
62	55
63		TTL7474_update(machine, 0);
	56	ttl7474_update(target);
64	57	}
65	58
66	59
67	60	static void machine_reset_common(running_machine *machine, int line)
68	61	{
	62	const device_config *ttl7474_9m_1 = devtag_get_device(machine, "7474_9m_1");
	63	const device_config *ttl7474_9m_2 = devtag_get_device(machine, "7474_9m_2");
69	64	irq_line = line;
70	65
71	66	/* initalize main CPU interrupt generator flip-flops */
72		TTL7474_config(machine, 0, &galaxold_7474_9M_2_intf);
73		TTL7474_preset_w(0, 1);
74		TTL7474_clear_w (0, 1);
	67	ttl7474_preset_w(ttl7474_9m_2, 1);
	68	ttl7474_clear_w (ttl7474_9m_2, 1);
75	69
76		TTL7474_config(machine, 1, &galaxold_7474_9M_1_intf);
77		TTL7474_clear_w (1, 1);
78		TTL7474_d_w     (1, 0);
79		TTL7474_preset_w(1, 0);
	70	ttl7474_clear_w (ttl7474_9m_1, 1);
	71	ttl7474_d_w     (ttl7474_9m_1, 0);
	72	ttl7474_preset_w(ttl7474_9m_1, 0);
80	73
81	74	/* start a timer to generate interrupts */
82		int_timer = timer_alloc(machine, interrupt_timer, NULL);
83		timer_adjust_oneshot(int_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
	75	int_timer = devtag_get_device(machine, "int_timer");
	76	timer_device_adjust_oneshot(int_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
84	77	}
85	78
86	79	MACHINE_RESET( galaxold )

src/mame/machine/bsktball.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "bsktball.h"
	8	#include "includes/bsktball.h"
9	9
10	10	/***************************************************************************
11	11	bsktball_nmion_w

src/mame/machine/slikshot.c

r6740	r6741
69	69
70	70	#include "driver.h"
71	71	#include "cpu/z80/z80.h"
72		#include "itech8.h"
	72	#include "includes/itech8.h"
73	73
74	74
75	75	#define YBUFFER_COUNT   15

src/mame/machine/harddriv.c

r6740	r6741
13	13	#include "machine/asic65.h"
14	14	#include "audio/atarijsa.h"
15	15	#include "includes/slapstic.h"
16		#include "harddriv.h"
	16	#include "includes/harddriv.h"
17	17
18	18
19	19	/*************************************
r6740	r6741
38	38
39	39
40	40	static void hd68k_update_interrupts(running_machine *machine);
41		static TIMER_CALLBACK( duart_callback );
42	41
43	42
44	43
r6740	r6741
57	56	{
58	57	harddriv_state *state = (harddriv_state *)machine->driver_data;
59	58
	59	atarigen_init(machine);
	60
60	61	/* predetermine memory regions */
61	62	state->sim_memory = (UINT16 *)memory_region(machine, "user1");
62	63	state->sim_memory_size = memory_region_length(machine, "user1") / 2;
63	64	state->adsp_pgm_memory_word = (UINT16 *)((UINT8 *)state->adsp_pgm_memory + 1);
	65
	66	/* allocate timers */
	67	state->duart_timer = devtag_get_device(machine, "duart_timer");
64	68	}
65	69
66	70
r6740	r6741
93	97	memset(state->duart_read_data, 0, sizeof(state->duart_read_data));
94	98	memset(state->duart_write_data, 0, sizeof(state->duart_write_data));
95	99	state->duart_output_port = 0;
96		state->duart_timer = timer_alloc(machine, duart_callback, NULL);
97	100
98	101	/* reset the ADSP/DSIII/DSIV boards */
99	102	state->adsp_halt = 1;
r6740	r6741
523	526	}
524	527
525	528
526		static TIMER_CALLBACK( duart_callback )
	529	TIMER_DEVICE_CALLBACK( hd68k_duart_callback )
527	530	{
528		harddriv_state *state = (harddriv_state *)machine->driver_data;
	531	harddriv_state *state = (harddriv_state *)timer->machine->driver_data;
529	532	logerror("DUART timer fired\n");
530	533	if (state->duart_write_data[0x05] & 0x08)
531	534	{
532	535	logerror("DUART interrupt generated\n");
533	536	state->duart_read_data[0x05] |= 0x08;
534	537	state->duart_irq_state = (state->duart_read_data[0x05] & state->duart_write_data[0x05]) != 0;
535		atarigen_update_interrupts(machine);
	538	atarigen_update_interrupts(timer->machine);
536	539	}
537		timer_adjust_oneshot(state->duart_timer, attotime_mul(duart_clock_period(state), 65536), 0);
	540	timer_device_adjust_oneshot(timer, attotime_mul(duart_clock_period(state), 65536), 0);
538	541	}
539	542
540	543
r6740	r6741
562	565	case 0x0e:      /* Start-Counter Command 3 */
563	566	{
564	567	int reps = (state->duart_write_data[0x06] << 8) | state->duart_write_data[0x07];
565		timer_adjust_oneshot(state->duart_timer, attotime_mul(duart_clock_period(state), reps), 0);
	568	timer_device_adjust_oneshot(state->duart_timer, attotime_mul(duart_clock_period(state), reps), 0);
566	569	logerror("DUART timer started (period=%f)\n", attotime_to_double(attotime_mul(duart_clock_period(state), reps)));
567	570	return 0x00ff;
568	571	}
569	572	case 0x0f:      /* Stop-Counter Command 3 */
570	573	{
571		int reps = attotime_to_double(attotime_mul(timer_timeleft(state->duart_timer), duart_clock(state)));
572		timer_adjust_oneshot(state->duart_timer, attotime_never, 0);
	574	int reps = attotime_to_double(attotime_mul(timer_device_timeleft(state->duart_timer), duart_clock(state)));
	575	timer_device_adjust_oneshot(state->duart_timer, attotime_never, 0);
573	576	state->duart_read_data[0x06] = reps >> 8;
574	577	state->duart_read_data[0x07] = reps & 0xff;
575	578	logerror("DUART timer stopped (final count=%04X)\n", reps);

src/mame/machine/dec0.c

r6740	r6741
7	7	*******************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "dec0.h"
	10	#include "includes/dec0.h"
11	11	#include "cpu/h6280/h6280.h"
12	12
13	13	static int GAME,i8751_return,slyspy_state;

src/mame/machine/williams.c

r6740	r6741
10	10	#include "cpu/m6809/m6809.h"
11	11	#include "machine/6821pia.h"
12	12	#include "machine/ticket.h"
13		#include "williams.h"
	13	#include "includes/williams.h"
14	14	#include "sound/dac.h"
15	15	#include "sound/hc55516.h"
16	16
17	17
18		/* timers */
19		static emu_timer *scanline_timer;
20		static emu_timer *scan240_timer;
21		static emu_timer *scan254_timer;
22
23	18	/* banking addresses set by the drivers */
24	19	UINT8 *mayday_protection;
25	20
r6740	r6741
49	44	static void tshoot_main_irq(const device_config *device, int state);
50	45
51	46	/* Lotto Fun-specific code */
52		static READ8_DEVICE_HANDLER( lottofun_input_port_0_r );
53	47	static WRITE8_DEVICE_HANDLER( lottofun_coin_lock_w );
54	48
55	49	/* Turkey Shoot-specific code */
r6740	r6741
62	56	static WRITE8_DEVICE_HANDLER( joust2_pia_3_cb1_w );
63	57
64	58
65
66	59	/*************************************
67	60	*
68		*  Trampoline functions
69		*
70		*************************************/
71
72		static READ8_DEVICE_HANDLER( input_port_0_device_r ) { return input_port_read_direct(input_port_by_index(&device->machine->portlist, 0)); }
73		static READ8_DEVICE_HANDLER( input_port_1_device_r ) { return input_port_read_direct(input_port_by_index(&device->machine->portlist, 1)); }
74		static READ8_DEVICE_HANDLER( input_port_2_device_r ) { return input_port_read_direct(input_port_by_index(&device->machine->portlist, 2)); }
75		static READ8_DEVICE_HANDLER( input_port_3_device_r ) { return input_port_read_direct(input_port_by_index(&device->machine->portlist, 3)); }
76		static READ8_DEVICE_HANDLER( input_port_4_device_r ) { return input_port_read_direct(input_port_by_index(&device->machine->portlist, 4)); }
77
78		/*************************************
79		*
80	61	*  Generic old-Williams PIA interfaces
81	62	*
82	63	*************************************/
r6740	r6741
84	65	/* Generic PIA 0, maps to input ports 0 and 1 */
85	66	const pia6821_interface williams_pia_0_intf =
86	67	{
87		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_0_device_r), DEVCB_HANDLER(input_port_1_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	68	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
88	69	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
89	70	/*irqs   : A/B             */ DEVCB_NULL, DEVCB_NULL
90	71	};
r6740	r6741
94	75	/* muxing done in williams_mux_r */
95	76	const pia6821_interface williams_muxed_pia_0_intf =
96	77	{
97		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_0_device_r), DEVCB_HANDLER(input_port_1_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	78	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
98	79	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_HANDLER(williams_port_select_w),
99	80	/*irqs   : A/B             */ DEVCB_NULL, DEVCB_NULL
100	81	};
r6740	r6741
102	83	/* Generic 49-way joystick PIA 0 for Sinistar/Blaster */
103	84	const pia6821_interface williams_49way_pia_0_intf =
104	85	{
105		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(williams_49way_port_0_r), DEVCB_HANDLER(input_port_1_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	86	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(williams_49way_port_0_r), DEVCB_INPUT_PORT("IN1"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
106	87	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
107	88	/*irqs   : A/B             */ DEVCB_NULL, DEVCB_NULL
108	89	};
r6740	r6741
110	91	/* Muxing 49-way joystick PIA 0 for Blaster kit */
111	92	const pia6821_interface williams_49way_muxed_pia_0_intf =
112	93	{
113		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(williams_input_port_49way_0_5_r), DEVCB_HANDLER(input_port_1_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	94	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(williams_input_port_49way_0_5_r), DEVCB_INPUT_PORT("IN1"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
114	95	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_HANDLER(williams_port_select_w),
115	96	/*irqs   : A/B             */ DEVCB_NULL, DEVCB_NULL
116	97	};
r6740	r6741
118	99	/* Generic PIA 1, maps to input port 2, sound command out, and IRQs */
119	100	const pia6821_interface williams_pia_1_intf =
120	101	{
121		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_2_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	102	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN2"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
122	103	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_HANDLER(williams_snd_cmd_w), DEVCB_NULL, DEVCB_NULL,
123	104	/*irqs   : A/B             */ DEVCB_LINE(williams_main_irq), DEVCB_LINE(williams_main_irq)
124	105	};
r6740	r6741
142	123	/* Special PIA 0 for Lotto Fun, to handle the controls and ticket dispenser */
143	124	const pia6821_interface lottofun_pia_0_intf =
144	125	{
145		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(lottofun_input_port_0_r), DEVCB_HANDLER(input_port_1_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
146		/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, ticket_dispenser_w), DEVCB_HANDLER(lottofun_coin_lock_w), DEVCB_NULL,
	126	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	127	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_DEVICE_HANDLER("ticket", ticket_dispenser_w), DEVCB_HANDLER(lottofun_coin_lock_w), DEVCB_NULL,
147	128	/*irqs   : A/B             */ DEVCB_NULL, DEVCB_NULL
148	129	};
149	130
r6740	r6741
158	139	/* Special PIA 1 for PlayBall, doesn't set the high bits on sound commands */
159	140	const pia6821_interface playball_pia_1_intf =
160	141	{
161		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_2_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	142	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN2"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
162	143	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_HANDLER(playball_snd_cmd_w), DEVCB_NULL, DEVCB_NULL,
163	144	/*irqs   : A/B             */ DEVCB_LINE(williams_main_irq), DEVCB_LINE(williams_main_irq)
164	145	};
r6740	r6741
166	147	/* extra PIA 3 for Speed Ball */
167	148	const pia6821_interface spdball_pia_3_intf =
168	149	{
169		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_3_device_r), DEVCB_HANDLER(input_port_4_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	150	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN3"), DEVCB_INPUT_PORT("IN4"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
170	151	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
171	152	/*irqs   : A/B             */ DEVCB_NULL, DEVCB_NULL
172	153	};
r6740	r6741
182	163	/* Generic muxing PIA 0, maps to input ports 0/3 and 1; port select is CA2 */
183	164	const pia6821_interface williams2_muxed_pia_0_intf =
184	165	{
185		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_0_device_r), DEVCB_HANDLER(input_port_1_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	166	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
186	167	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_NULL, DEVCB_HANDLER(williams_port_select_w), DEVCB_NULL,
187	168	/*irqs   : A/B             */ DEVCB_NULL, DEVCB_NULL
188	169	};
r6740	r6741
190	171	/* Generic PIA 1, maps to input port 2, sound command out, and IRQs */
191	172	const pia6821_interface williams2_pia_1_intf =
192	173	{
193		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_2_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	174	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN2"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
194	175	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_HANDLER(williams2_snd_cmd_w), DEVCB_NULL, DEVCB_DEVICE_HANDLER("pia_2", pia6821_ca1_w),
195	176	/*irqs   : A/B             */ DEVCB_LINE(williams_main_irq), DEVCB_LINE(williams_main_irq)
196	177	};
r6740	r6741
214	195	/* Mystic Marathon PIA 0 */
215	196	const pia6821_interface mysticm_pia_0_intf =
216	197	{
217		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_0_device_r), DEVCB_HANDLER(input_port_1_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	198	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
218	199	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
219	200	/*irqs   : A/B             */ DEVCB_LINE(williams_main_firq), DEVCB_LINE(mysticm_main_irq)
220	201	};
r6740	r6741
222	203	/* Mystic Marathon PIA 1 */
223	204	const pia6821_interface mysticm_pia_1_intf =
224	205	{
225		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_2_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	206	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN2"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
226	207	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_HANDLER(williams2_snd_cmd_w), DEVCB_NULL, DEVCB_DEVICE_HANDLER("pia_2", pia6821_ca1_w),
227	208	/*irqs   : A/B             */ DEVCB_LINE(mysticm_main_irq), DEVCB_LINE(mysticm_main_irq)
228	209	};
r6740	r6741
230	211	/* Turkey Shoot PIA 0 */
231	212	const pia6821_interface tshoot_pia_0_intf =
232	213	{
233		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(tshoot_input_port_0_3_r), DEVCB_HANDLER(input_port_1_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	214	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(tshoot_input_port_0_3_r), DEVCB_INPUT_PORT("IN1"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
234	215	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_HANDLER(tshoot_lamp_w), DEVCB_HANDLER(williams_port_select_w), DEVCB_NULL,
235	216	/*irqs   : A/B             */ DEVCB_LINE(tshoot_main_irq), DEVCB_LINE(tshoot_main_irq)
236	217	};
r6740	r6741
238	219	/* Turkey Shoot PIA 1 */
239	220	const pia6821_interface tshoot_pia_1_intf =
240	221	{
241		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_2_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	222	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN2"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
242	223	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_HANDLER(williams2_snd_cmd_w), DEVCB_NULL, DEVCB_DEVICE_HANDLER("pia_2", pia6821_ca1_w),
243	224	/*irqs   : A/B             */ DEVCB_LINE(tshoot_main_irq), DEVCB_LINE(tshoot_main_irq)
244	225	};
r6740	r6741
254	235	/* Joust 2 PIA 1 */
255	236	const pia6821_interface joust2_pia_1_intf =
256	237	{
257		/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_HANDLER(input_port_2_device_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
	238	/*inputs : A/B,CA/B1,CA/B2 */ DEVCB_INPUT_PORT("IN2"), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
258	239	/*outputs: A/B,CA/B2       */ DEVCB_NULL, DEVCB_HANDLER(joust2_snd_cmd_w), DEVCB_HANDLER(joust2_pia_3_cb1_w), DEVCB_DEVICE_HANDLER("pia_2", pia6821_ca1_w),
259	240	/*irqs   : A/B             */ DEVCB_LINE(williams_main_irq), DEVCB_LINE(williams_main_irq)
260	241	};
r6740	r6741
267	248	*
268	249	*************************************/
269	250
270		static TIMER_CALLBACK( williams_va11_callback )
	251	TIMER_DEVICE_CALLBACK( williams_va11_callback )
271	252	{
272		const device_config *pia_1 = devtag_get_device(machine, "pia_1");
	253	const device_config *pia_1 = devtag_get_device(timer->machine, "pia_1");
273	254	int scanline = param;
274	255
275	256	/* the IRQ signal comes into CB1, and is set to VA11 */
r6740	r6741
278	259	/* set a timer for the next update */
279	260	scanline += 0x20;
280	261	if (scanline >= 256) scanline = 0;
281		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
	262	timer_device_adjust_oneshot(timer, video_screen_get_time_until_pos(timer->machine->primary_screen, scanline, 0), scanline);
282	263	}
283	264
284	265
r6740	r6741
291	272	}
292	273
293	274
294		static TIMER_CALLBACK( williams_count240_callback )
	275	TIMER_DEVICE_CALLBACK( williams_count240_callback )
295	276	{
296		const device_config *pia_1 = devtag_get_device(machine, "pia_1");
	277	const device_config *pia_1 = devtag_get_device(timer->machine, "pia_1");
297	278
298	279	/* the COUNT240 signal comes into CA1, and is set to the logical AND of VA10-VA13 */
299	280	pia6821_ca1_w(pia_1, 0, 1);
300	281
301	282	/* set a timer to turn it off once the scanline counter resets */
302		timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), NULL, 0, williams_count240_off_callback);
	283	timer_set(timer->machine, video_screen_get_time_until_pos(timer->machine->primary_screen, 0, 0), NULL, 0, williams_count240_off_callback);
303	284
304	285	/* set a timer for next frame */
305		timer_adjust_oneshot(scan240_timer, video_screen_get_time_until_pos(machine->primary_screen, 240, 0), 0);
	286	timer_device_adjust_oneshot(timer, video_screen_get_time_until_pos(timer->machine->primary_screen, 240, 0), 0);
306	287	}
307	288
308	289
r6740	r6741
369	350	*
370	351	*************************************/
371	352
372		static MACHINE_RESET( williams_common )
	353	static MACHINE_START( williams_common )
373	354	{
374		/* reset the ticket dispenser (Lotto Fun) */
375		ticket_dispenser_init(machine, 70, TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH);
	355	/* configure the memory bank */
	356	memory_configure_bank(machine, "bank1", 0, 1, williams_videoram, 0);
	357	memory_configure_bank(machine, "bank1", 1, 1, memory_region(machine, "maincpu") + 0x10000, 0);
376	358
	359	state_save_register_global(machine, vram_bank);
	360	}
	361
	362
	363	static MACHINE_RESET( williams_common )
	364	{
377	365	/* set a timer to go off every 16 scanlines, to toggle the VA11 line and update the screen */
378		scanline_timer = timer_alloc(machine, williams_va11_callback, NULL);
379		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
	366	timer_device_adjust_oneshot(devtag_get_device(machine, "scan_timer"), video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
380	367
381	368	/* also set a timer to go off on scanline 240 */
382		scan240_timer = timer_alloc(machine, williams_count240_callback, NULL);
383		timer_adjust_oneshot(scan240_timer, video_screen_get_time_until_pos(machine->primary_screen, 240, 0), 0);
	369	timer_device_adjust_oneshot(devtag_get_device(machine, "240_timer"), video_screen_get_time_until_pos(machine->primary_screen, 240, 0), 0);
	370	}
384	371
385		state_save_register_global(machine, vram_bank);
	372
	373	MACHINE_START( williams )
	374	{
	375	MACHINE_START_CALL(williams_common);
386	376	}
387	377
388	378
389	379	MACHINE_RESET( williams )
390	380	{
391	381	MACHINE_RESET_CALL(williams_common);
392
393		/* configure the memory bank */
394		memory_configure_bank(machine, "bank1", 0, 1, williams_videoram, 0);
395		memory_configure_bank(machine, "bank1", 1, 1, memory_region(machine, "maincpu") + 0x10000, 0);
396	382	}
397	383
398	384
r6740	r6741
403	389	*
404	390	*************************************/
405	391
406		static TIMER_CALLBACK( williams2_va11_callback )
	392	TIMER_DEVICE_CALLBACK( williams2_va11_callback )
407	393	{
408		const device_config *pia_0 = devtag_get_device(machine, "pia_0");
409		const device_config *pia_1 = devtag_get_device(machine, "pia_1");
	394	const device_config *pia_0 = devtag_get_device(timer->machine, "pia_0");
	395	const device_config *pia_1 = devtag_get_device(timer->machine, "pia_1");
410	396	int scanline = param;
411	397
412	398	/* the IRQ signal comes into CB1, and is set to VA11 */
r6740	r6741
416	402	/* set a timer for the next update */
417	403	scanline += 0x20;
418	404	if (scanline >= 256) scanline = 0;
419		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
	405	timer_device_adjust_oneshot(timer, video_screen_get_time_until_pos(timer->machine->primary_screen, scanline, 0), scanline);
420	406	}
421	407
422	408
r6740	r6741
429	415	}
430	416
431	417
432		static TIMER_CALLBACK( williams2_endscreen_callback )
	418	TIMER_DEVICE_CALLBACK( williams2_endscreen_callback )
433	419	{
434		const device_config *pia_0 = devtag_get_device(machine, "pia_0");
	420	const device_config *pia_0 = devtag_get_device(timer->machine, "pia_0");
435	421
436	422	/* the /ENDSCREEN signal comes into CA1 */
437	423	pia6821_ca1_w(pia_0, 0, 0);
438	424
439	425	/* set a timer to turn it off once the scanline counter resets */
440		timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 8, 0), NULL, 0, williams2_endscreen_off_callback);
	426	timer_set(timer->machine, video_screen_get_time_until_pos(timer->machine->primary_screen, 8, 0), NULL, 0, williams2_endscreen_off_callback);
441	427
442	428	/* set a timer for next frame */
443		timer_adjust_oneshot(scan254_timer, video_screen_get_time_until_pos(machine->primary_screen, 254, 0), 0);
	429	timer_device_adjust_oneshot(timer, video_screen_get_time_until_pos(timer->machine->primary_screen, 254, 0), 0);
444	430	}
445	431
446	432
r6740	r6741
458	444	}
459	445
460	446
461		MACHINE_RESET( williams2 )
	447	MACHINE_START( williams2 )
462	448	{
463		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
464
465	449	/* configure memory banks */
466	450	memory_configure_bank(machine, "bank1", 0, 1, williams_videoram, 0);
467	451	memory_configure_bank(machine, "bank1", 1, 4, memory_region(machine, "maincpu") + 0x10000, 0x10000);
468	452
	453	/* register for save states */
	454	state_save_register_global(machine, vram_bank);
	455	state_save_register_postload(machine, williams2_postload, NULL);
	456	}
	457
	458
	459	MACHINE_RESET( williams2 )
	460	{
	461	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	462
469	463	/* make sure our banking is reset */
470	464	williams2_bank_select_w(space, 0, 0);
471	465
472	466	/* set a timer to go off every 16 scanlines, to toggle the VA11 line and update the screen */
473		scanline_timer = timer_alloc(machine, williams2_va11_callback, NULL);
474		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
	467	timer_device_adjust_oneshot(devtag_get_device(machine, "scan_timer"), video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
475	468
476	469	/* also set a timer to go off on scanline 254 */
477		scan254_timer = timer_alloc(machine, williams2_endscreen_callback, NULL);
478		timer_adjust_oneshot(scan254_timer, video_screen_get_time_until_pos(machine->primary_screen, 254, 0), 0);
479
480		state_save_register_global(machine, vram_bank);
481		state_save_register_postload(machine, williams2_postload, NULL);
	470	timer_device_adjust_oneshot(devtag_get_device(machine, "254_timer"), video_screen_get_time_until_pos(machine->primary_screen, 254, 0), 0);
482	471	}
483	472
484	473
r6740	r6741
737	726	}
738	727
739	728
	729	MACHINE_START( defender )
	730	{
	731	MACHINE_START_CALL(williams_common);
	732
	733	/* configure the banking and make sure it is reset to 0 */
	734	memory_configure_bank(machine, "bank1", 0, 9, &memory_region(machine, "maincpu")[0x10000], 0x1000);
	735
	736	state_save_register_postload(machine, defender_postload, NULL);
	737	}
	738
	739
740	740	MACHINE_RESET( defender )
741	741	{
742	742	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
743	743
744	744	MACHINE_RESET_CALL(williams_common);
745	745
746		/* configure the banking and make sure it is reset to 0 */
747		memory_configure_bank(machine, "bank1", 0, 9, &memory_region(machine, "maincpu")[0x10000], 0x1000);
748	746	defender_bank_select_w(space, 0, 0);
749
750		state_save_register_postload(machine, defender_postload, NULL);
751	747	}
752	748
753	749
r6740	r6741
834	830	*
835	831	*************************************/
836	832
837		MACHINE_RESET( blaster )
	833	MACHINE_START( blaster )
838	834	{
839		MACHINE_RESET_CALL(williams_common);
	835	MACHINE_START_CALL(williams_common);
840	836
841	837	/* banking is different for blaster */
842	838	memory_configure_bank(machine, "bank1", 0, 1, williams_videoram, 0);
r6740	r6741
849	845	}
850	846
851	847
	848	MACHINE_RESET( blaster )
	849	{
	850	MACHINE_RESET_CALL(williams_common);
	851	}
	852
	853
852	854	INLINE void update_blaster_banking(running_machine *machine)
853	855	{
854	856	memory_set_bank(machine, "bank1", vram_bank * (blaster_bank + 1));
r6740	r6741
884	886	*
885	887	*************************************/
886	888
887		static READ8_DEVICE_HANDLER( lottofun_input_port_0_r )
888		{
889		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
890
891		/* merge in the ticket dispenser status */
892		return input_port_read(device->machine, "IN0") | ticket_dispenser_r(space, offset);
893		}
894
895	889	static WRITE8_DEVICE_HANDLER( lottofun_coin_lock_w )
896	890	{
897	891	coin_lockout_global_w(device->machine, data & 1); /* bit 5 of PIC control port A */
898	892	}
899	893
	894
	895
900	896	/*************************************
901	897	*
902	898	*  Turkey Shoot-specific routines
r6740	r6741
957	953
958	954	MACHINE_START( joust2 )
959	955	{
	956	MACHINE_START_CALL(williams2);
960	957	williams_cvsd_init(machine);
	958	state_save_register_global(machine, joust2_current_sound_data);
961	959	}
962	960
963	961
r6740	r6741
968	966	/* standard init */
969	967	MACHINE_RESET_CALL(williams2);
970	968	pia6821_ca1_w(pia_3, 0, 1);
971		state_save_register_global(machine, joust2_current_sound_data);
972	969	}
973	970
974	971

src/mame/machine/pgmprot.c

r6740	r6741
6	6	/*** ASIC27a (Puzzle Star) -- ARM but with no external rom? behaves a bit like KOV ***/
7	7
8	8
	9	/*** (pstarS) ***/
9	10
10
11		/*** (PSTARS) ***/
12		static UINT16 PSTARSKEY;
13		static UINT16 PSTARSINT[2];
14		static UINT32 PSTARS_REGS[16];
15		static UINT32 PSTARS_VAL;
16
17		static UINT16 pstar_e7,pstar_b1,pstar_ce;
18		static UINT16 pstar_ram[3];
19
20		static const int Pstar_ba[0x1E]={
	11	static const int pstar_ba[0x1E]={
21	12	0x02,0x00,0x00,0x01,0x00,0x03,0x00,0x00, //0
22	13	0x02,0x00,0x06,0x00,0x22,0x04,0x00,0x03, //8
23	14	0x00,0x00,0x06,0x00,0x20,0x07,0x00,0x03, //10
24	15	0x00,0x21,0x01,0x00,0x00,0x63
25	16	};
26	17
27		static const int Pstar_b0[0x10]={
	18	static const int pstar_b0[0x10]={
28	19	0x09,0x0A,0x0B,0x00,0x01,0x02,0x03,0x04,
29	20	0x05,0x06,0x07,0x08,0x00,0x00,0x00,0x00
30	21	};
31	22
32		static const int Pstar_ae[0x10]={
	23	static const int pstar_ae[0x10]={
33	24	0x5D,0x86,0x8C ,0x8B,0xE0,0x8B,0x62,0xAF,
34	25	0xB6,0xAF,0x10A,0xAF,0x00,0x00,0x00,0x00
35	26	};
36	27
37		static const int Pstar_a0[0x10]={
	28	static const int pstar_a0[0x10]={
38	29	0x02,0x03,0x04,0x05,0x06,0x01,0x0A,0x0B,
39	30	0x0C,0x0D,0x0E,0x09,0x00,0x00,0x00,0x00,
40	31	};
41	32
42		static const int Pstar_9d[0x10]={
	33	static const int pstar_9d[0x10]={
43	34	0x05,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
44	35	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
45	36	};
46	37
47		static const int Pstar_90[0x10]={
	38	static const int pstar_90[0x10]={
48	39	0x0C,0x10,0x0E,0x0C,0x00,0x00,0x00,0x00,
49	40	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
50	41	};
51		static const int Pstar_8c[0x23]={
	42	static const int pstar_8c[0x23]={
52	43	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
53	44	0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,
54	45	0x01,0x01,0x01,0x01,0x02,0x02,0x02,0x02,
r6740	r6741
56	47	0x03,0x03,0x03
57	48	};
58	49
59		static const int Pstar_80[0x1a3]={
	50	static const int pstar_80[0x1a3]={
60	51	0x03,0x03,0x04,0x04,0x04,0x04,0x05,0x05,
61	52	0x05,0x05,0x06,0x06,0x03,0x03,0x04,0x04,
62	53	0x05,0x05,0x05,0x05,0x06,0x06,0x07,0x07,
r6740	r6741
115	106
116	107
117	108
118		READ16_HANDLER (PSTARS_protram_r)
	109	READ16_HANDLER( pstars_protram_r )
119	110	{
	111	pgm_state *state = (pgm_state *)space->machine->driver_data;
	112
120	113	if (offset == 4)      //region
121	114	return input_port_read(space->machine, "Region");
122	115	else if (offset >= 0x10)  //timer
123	116	{
124		logerror("PSTARS ACCESS COUNTER %6X\n",pstar_ram[offset-0x10]);
125		return pstar_ram[offset-0x10]--;
	117	logerror("PSTARS ACCESS COUNTER %6X\n", state->pstar_ram[offset - 0x10]);
	118	return state->pstar_ram[offset - 0x10]--;
126	119	}
127	120	return 0x0000;
128	121	}
129	122
130		READ16_HANDLER (PSTARS_r16)
	123	READ16_HANDLER( pstars_r )
131	124	{
132		if(offset==0)
	125	pgm_state *state = (pgm_state *)space->machine->driver_data;
	126
	127	if (offset == 0)
133	128	{
134		UINT16 d=PSTARS_VAL&0xffff;
135		UINT16 realkey;
136		realkey=PSTARSKEY>>8;
137		realkey|=PSTARSKEY;
138		d^=realkey;
139		//      logerror("PSTARS A27 R  %6X\n",PSTARS_VAL);
	129	UINT16 d = state->pstars_val & 0xffff;
	130	UINT16 realkey = state->pstars_key >> 8;
	131	realkey |= state->pstars_key;
	132	d ^= realkey;
	133	//      logerror("PSTARS A27 R  %6X\n", state->pstars_val);
140	134	return d;
141	135	}
142		else if(offset==1)
	136	else if (offset == 1)
143	137	{
144		UINT16 d=PSTARS_VAL>>16;
145		UINT16 realkey;
146		realkey=PSTARSKEY>>8;
147		realkey|=PSTARSKEY;
148		d^=realkey;
	138	UINT16 d = state->pstars_val >> 16;
	139	UINT16 realkey = state->pstars_key >> 8;
	140	realkey |= state->pstars_key;
	141	d ^= realkey;
149	142	return d;
150	143
151	144	}
152	145	return 0xff;
153	146	}
154	147
155		WRITE16_HANDLER (PSTARS_w16)
	148	WRITE16_HANDLER( pstars_w )
156	149	{
157		if(offset==0)
	150	pgm_state *state = (pgm_state *)space->machine->driver_data;
	151
	152	if (offset == 0)
158	153	{
159		PSTARSINT[0]=data;
	154	state->pstars_int[0] = data;
160	155	return;
161	156	}
162	157
163		if(offset==1)
	158	if (offset == 1)
164	159	{
165	160	UINT16 realkey;
166		if((data>>8)==0xff)
167		PSTARSKEY=0xff00;
168		realkey=PSTARSKEY>>8;
169		realkey|=PSTARSKEY;
	161	if ((data >> 8) == 0xff)
	162	state->pstars_key = 0xff00;
	163	realkey = state->pstars_key >> 8;
	164	realkey |= state->pstars_key;
170	165	{
171		PSTARSKEY+=0x100;
172		PSTARSKEY&=0xff00;
173		if(PSTARSKEY==0xff00)PSTARSKEY=0x100;
174		}
175		data^=realkey;
176		PSTARSINT[1]=data;
177		PSTARSINT[0]^=realkey;
	166	state->pstars_key += 0x100;
	167	state->pstars_key &= 0xff00;
	168	if (state->pstars_key == 0xff00)
	169	state->pstars_key = 0x100;
	170	}
	171	data ^= realkey;
	172	state->pstars_int[1] = data;
	173	state->pstars_int[0] ^= realkey;
178	174
179		switch(PSTARSINT[1]&0xff)
180		{
181		case 0x99:
182		{
183		PSTARSKEY=0x100;
184		PSTARS_VAL=0x880000;
	175	switch (state->pstars_int[1] & 0xff)
	176	{
	177	case 0x99:
	178	state->pstars_key = 0x100;
	179	state->pstars_val = 0x880000;
	180	break;
185	181
186		}
187		break;
	182	case 0xe0:
	183	state->pstars_val = 0xa00000 + (state->pstars_int[0] << 6);
	184	break;
188	185
189		case 0xE0:
190		{
191		PSTARS_VAL=0xa00000+(PSTARSINT[0]<<6);
192		}
193		break;
194		case 0xDC:
195		{
196		PSTARS_VAL=0xa00800+(PSTARSINT[0]<<6);
197		}
198		break;
199		case 0xD0:
200		{
201		PSTARS_VAL=0xa01000+(PSTARSINT[0]<<5);
202		}
203		break;
	186	case 0xdc:
	187	state->pstars_val = 0xa00800 + (state->pstars_int[0] << 6);
	188	break;
204	189
205		case 0xb1:
206		{
207		pstar_b1=PSTARSINT[0];
208		PSTARS_VAL=0x890000;
209		}
210		break;
211		case 0xbf:
212		{
213		PSTARS_VAL=pstar_b1*PSTARSINT[0];
214		}
215		break;
	190	case 0xd0:
	191	state->pstars_val = 0xa01000 + (state->pstars_int[0] << 5);
	192	break;
216	193
217		case 0xc1: //TODO:TIMER  0,1,2,FIX TO 0 should be OK?
218		{
219		PSTARS_VAL=0;
220		}
221		break;
222		case 0xce: //TODO:TIMER  0,1,2
223		{
224		pstar_ce=PSTARSINT[0];
225		PSTARS_VAL=0x890000;
226		}
227		break;
228		case 0xcf: //TODO:TIMER  0,1,2
229		{
230		pstar_ram[pstar_ce]=PSTARSINT[0];
231		PSTARS_VAL=0x890000;
232		}
233		break;
	194	case 0xb1:
	195	state->pstar_b1 = state->pstars_int[0];
	196	state->pstars_val = 0x890000;
	197	break;
234	198
	199	case 0xbf:
	200	state->pstars_val = state->pstar_b1 * state->pstars_int[0];
	201	break;
235	202
236		case 0xe7:
237		{
238		pstar_e7=(PSTARSINT[0]>>12)&0xf;
239		PSTARS_REGS[pstar_e7]&=0xffff;
240		PSTARS_REGS[pstar_e7]|=(PSTARSINT[0]&0xff)<<16;
241		PSTARS_VAL=0x890000;
242		}
243		break;
244		case 0xe5:
245		{
	203	case 0xc1: //TODO:TIMER  0,1,2,FIX TO 0 should be OK?
	204	state->pstars_val = 0;
	205	break;
246	206
247		PSTARS_REGS[pstar_e7]&=0xff0000;
248		PSTARS_REGS[pstar_e7]|=PSTARSINT[0];
249		PSTARS_VAL=0x890000;
250		}
251		break;
252		case 0xf8: //@73C
253		{
254		PSTARS_VAL=PSTARS_REGS[PSTARSINT[0]&0xf]&0xffffff;
255		}
256		break;
	207	case 0xce: //TODO:TIMER  0,1,2
	208	state->pstar_ce = state->pstars_int[0];
	209	state->pstars_val=0x890000;
	210	break;
257	211
	212	case 0xcf: //TODO:TIMER  0,1,2
	213	state->pstar_ram[state->pstar_ce] = state->pstars_int[0];
	214	state->pstars_val = 0x890000;
	215	break;
258	216
259		case 0xba:
260		{
261		PSTARS_VAL=Pstar_ba[PSTARSINT[0]];
262		}
263		break;
264		case 0xb0:
265		{
266		PSTARS_VAL=Pstar_b0[PSTARSINT[0]];
267		}
268		break;
269		case 0xae:
270		{
271		PSTARS_VAL=Pstar_ae[PSTARSINT[0]];
272		}
273		break;
274		case 0xa0:
275		{
276		PSTARS_VAL=Pstar_a0[PSTARSINT[0]];
277		}
278		break;
279		case 0x9d:
280		{
281		PSTARS_VAL=Pstar_9d[PSTARSINT[0]];
282		}
283		break;
284		case 0x90:
285		{
286		PSTARS_VAL=Pstar_90[PSTARSINT[0]];
287		}
288		break;
289		case 0x8c:
290		{
291		PSTARS_VAL=Pstar_8c[PSTARSINT[0]];
292		}
293		break;
294		case 0x80:
295		{
296		PSTARS_VAL=Pstar_80[PSTARSINT[0]];
297		}
298		break;
299		default:
300		PSTARS_VAL=0x890000;
301		logerror("PSTARS PC(%06x) UNKNOWN %4X %4X\n",cpu_get_pc(space->cpu),PSTARSINT[1],PSTARSINT[0]);
	217	case 0xe7:
	218	state->pstar_e7 = (state->pstars_int[0] >> 12) & 0xf;
	219	state->pstars_regs[state->pstar_e7] &= 0xffff;
	220	state->pstars_regs[state->pstar_e7] |= (state->pstars_int[0] & 0xff) << 16;
	221	state->pstars_val = 0x890000;
	222	break;
302	223
	224	case 0xe5:
	225	state->pstars_regs[state->pstar_e7] &= 0xff0000;
	226	state->pstars_regs[state->pstar_e7] |= state->pstars_int[0];
	227	state->pstars_val = 0x890000;
	228	break;
	229
	230	case 0xf8: //@73C
	231	state->pstars_val = state->pstars_regs[state->pstars_int[0] & 0xf] & 0xffffff;
	232	break;
	233
	234	case 0xba:
	235	state->pstars_val = pstar_ba[state->pstars_int[0]];
	236	break;
	237
	238	case 0xb0:
	239	state->pstars_val = pstar_b0[state->pstars_int[0]];
	240	break;
	241
	242	case 0xae:
	243	state->pstars_val = pstar_ae[state->pstars_int[0]];
	244	break;
	245
	246	case 0xa0:
	247	state->pstars_val = pstar_a0[state->pstars_int[0]];
	248	break;
	249
	250	case 0x9d:
	251	state->pstars_val = pstar_9d[state->pstars_int[0]];
	252	break;
	253
	254	case 0x90:
	255	state->pstars_val = pstar_90[state->pstars_int[0]];
	256	break;
	257
	258	case 0x8c:
	259	state->pstars_val = pstar_8c[state->pstars_int[0]];
	260	break;
	261
	262	case 0x80:
	263	state->pstars_val = pstar_80[state->pstars_int[0]];
	264	break;
	265
	266	default:
	267	state->pstars_val = 0x890000;
	268	logerror("PSTARS PC(%06x) UNKNOWN %4X %4X\n", cpu_get_pc(space->cpu), state->pstars_int[1], state->pstars_int[0]);
	269
303	270	}
304	271
305	272	}
r6740	r6741
307	274
308	275	/*** ASIC 3 (oriental legends protection) ****************************************/
309	276
310		static UINT8 asic3_reg, asic3_latch[3], asic3_x, asic3_y, asic3_z, asic3_h1, asic3_h2;
311		static UINT16 asic3_hold;
312
313		static UINT32 bt(UINT32 v, int bit)
314		{
315		return (v & (1<<bit)) != 0;
316		}
317
318	277	static void asic3_compute_hold(running_machine *machine)
319	278	{
320		// The mode is dependant on the region
	279	pgm_state *state = (pgm_state *)machine->driver_data;
	280
	281	// The mode is dependent on the region
321	282	static const int modes[4] = { 1, 1, 3, 2 };
322	283	int mode = modes[input_port_read(machine, "Region") & 3];
323	284
324		switch(mode) {
	285	switch (mode)
	286	{
325	287	case 1:
326		asic3_hold =
327		(asic3_hold << 1)
328		^0x2bad
329		^bt(asic3_hold, 15)^bt(asic3_hold, 10)^bt(asic3_hold, 8)^bt(asic3_hold, 5)
330		^bt(asic3_z, asic3_y)
331		^(bt(asic3_x, 0) << 1)^(bt(asic3_x, 1) << 6)^(bt(asic3_x, 2) << 10)^(bt(asic3_x, 3) << 14);
	288	state->asic3_hold =
	289	(state->asic3_hold << 1)
	290	^ 0x2bad
	291	^ BIT(state->asic3_hold, 15) ^ BIT(state->asic3_hold, 10) ^ BIT(state->asic3_hold, 8) ^ BIT(state->asic3_hold, 5)
	292	^ BIT(state->asic3_z, state->asic3_y)
	293	^ (BIT(state->asic3_x, 0) << 1) ^ (BIT(state->asic3_x, 1) << 6) ^ (BIT(state->asic3_x, 2) << 10) ^ (BIT(state->asic3_x, 3) << 14);
332	294	break;
333	295	case 2:
334		asic3_hold =
335		(asic3_hold << 1)
336		^0x2bad
337		^bt(asic3_hold, 15)^bt(asic3_hold, 7)^bt(asic3_hold, 6)^bt(asic3_hold, 5)
338		^bt(asic3_z, asic3_y)
339		^(bt(asic3_x, 0) << 4)^(bt(asic3_x, 1) << 6)^(bt(asic3_x, 2) << 10)^(bt(asic3_x, 3) << 12);
	296	state->asic3_hold =
	297	(state->asic3_hold << 1)
	298	^ 0x2bad
	299	^ BIT(state->asic3_hold, 15) ^ BIT(state->asic3_hold, 7) ^ BIT(state->asic3_hold, 6) ^ BIT(state->asic3_hold, 5)
	300	^ BIT(state->asic3_z, state->asic3_y)
	301	^ (BIT(state->asic3_x, 0) << 4) ^ (BIT(state->asic3_x, 1) << 6) ^ (BIT(state->asic3_x, 2) << 10) ^ (BIT(state->asic3_x, 3) << 12);
340	302	break;
341	303	case 3:
342		asic3_hold =
343		(asic3_hold << 1)
344		^0x2bad
345		^bt(asic3_hold, 15)^bt(asic3_hold, 10)^bt(asic3_hold, 8)^bt(asic3_hold, 5)
346		^bt(asic3_z, asic3_y)
347		^(bt(asic3_x, 0) << 4)^(bt(asic3_x, 1) << 6)^(bt(asic3_x, 2) << 10)^(bt(asic3_x, 3) << 12);
	304	state->asic3_hold =
	305	(state->asic3_hold << 1)
	306	^ 0x2bad
	307	^ BIT(state->asic3_hold, 15) ^ BIT(state->asic3_hold, 10) ^ BIT(state->asic3_hold, 8) ^ BIT(state->asic3_hold, 5)
	308	^ BIT(state->asic3_z, state->asic3_y)
	309	^ (BIT(state->asic3_x, 0) << 4) ^ (BIT(state->asic3_x, 1) << 6) ^ (BIT(state->asic3_x, 2) << 10) ^ (BIT(state->asic3_x, 3) << 12);
348	310	break;
349	311	}
350	312	}
351	313
352	314	READ16_HANDLER( pgm_asic3_r )
353	315	{
	316	pgm_state *state = (pgm_state *)space->machine->driver_data;
354	317	UINT8 res = 0;
355	318	/* region is supplied by the protection device */
356	319
357		switch(asic3_reg) {
358		case 0x00: res = (asic3_latch[0] & 0xf7) | ((input_port_read(space->machine, "Region") << 3) & 0x08); break;
359		case 0x01: res = asic3_latch[1]; break;
360		case 0x02: res = (asic3_latch[2] & 0x7f) | ((input_port_read(space->machine, "Region") << 6) & 0x80); break;
	320	switch (state->asic3_reg)
	321	{
	322	case 0x00: res = (state->asic3_latch[0] & 0xf7) | ((input_port_read(space->machine, "Region") << 3) & 0x08); break;
	323	case 0x01: res = state->asic3_latch[1]; break;
	324	case 0x02: res = (state->asic3_latch[2] & 0x7f) | ((input_port_read(space->machine, "Region") << 6) & 0x80); break;
361	325	case 0x03:
362		res = (bt(asic3_hold, 15) << 0)
363		| (bt(asic3_hold, 12) << 1)
364		| (bt(asic3_hold, 13) << 2)
365		| (bt(asic3_hold, 10) << 3)
366		| (bt(asic3_hold,  7) << 4)
367		| (bt(asic3_hold,  9) << 5)
368		| (bt(asic3_hold,  2) << 6)
369		| (bt(asic3_hold,  5) << 7);
	326	res = (BIT(state->asic3_hold, 15) << 0)
	327	| (BIT(state->asic3_hold, 12) << 1)
	328	| (BIT(state->asic3_hold, 13) << 2)
	329	| (BIT(state->asic3_hold, 10) << 3)
	330	| (BIT(state->asic3_hold, 7) << 4)
	331	| (BIT(state->asic3_hold, 9) << 5)
	332	| (BIT(state->asic3_hold, 2) << 6)
	333	| (BIT(state->asic3_hold, 5) << 7);
370	334	break;
371	335	case 0x20: res = 0x49; break;
372	336	case 0x21: res = 0x47; break;
r6740	r6741
393	357
394	358	WRITE16_HANDLER( pgm_asic3_w )
395	359	{
	360	pgm_state *state = (pgm_state *)space->machine->driver_data;
	361
396	362	if(ACCESSING_BITS_0_7)
397	363	{
398		if(asic3_reg < 3)
399		asic3_latch[asic3_reg] = data << 1;
400		else if(asic3_reg == 0xa0) {
401		asic3_hold = 0;
402		} else if(asic3_reg == 0x40) {
403		asic3_h2 = asic3_h1;
404		asic3_h1 = data;
405		} else if(asic3_reg == 0x48) {
406		asic3_x = 0;
407		if(!(asic3_h2 & 0x0a))
408		asic3_x |= 8;
409		if(!(asic3_h2 & 0x90))
410		asic3_x |= 4;
411		if(!(asic3_h1 & 0x06))
412		asic3_x |= 2;
413		if(!(asic3_h1 & 0x90))
414		asic3_x |= 1;
415		} else if(asic3_reg >= 0x80 && asic3_reg <= 0x87) {
416		asic3_y = asic3_reg & 7;
417		asic3_z = data;
	364	if (state->asic3_reg < 3)
	365	state->asic3_latch[state->asic3_reg] = data << 1;
	366	else if (state->asic3_reg == 0xa0)
	367	state->asic3_hold = 0;
	368	else if (state->asic3_reg == 0x40)
	369	{
	370	state->asic3_h2 = state->asic3_h1;
	371	state->asic3_h1 = data;
	372	}
	373	else if (state->asic3_reg == 0x48)
	374	{
	375	state->asic3_x = 0;
	376	if (!(state->asic3_h2 & 0x0a))
	377	state->asic3_x |= 8;
	378	if (!(state->asic3_h2 & 0x90))
	379	state->asic3_x |= 4;
	380	if (!(state->asic3_h1 & 0x06))
	381	state->asic3_x |= 2;
	382	if (!(state->asic3_h1 & 0x90))
	383	state->asic3_x |= 1;
	384	}
	385	else if(state->asic3_reg >= 0x80 && state->asic3_reg <= 0x87)
	386	{
	387	state->asic3_y = state->asic3_reg & 7;
	388	state->asic3_z = data;
418	389	asic3_compute_hold(space->machine);
419	390	}
420	391	}
r6740	r6741
422	393
423	394	WRITE16_HANDLER( pgm_asic3_reg_w )
424	395	{
	396	pgm_state *state = (pgm_state *)space->machine->driver_data;
	397
425	398	if(ACCESSING_BITS_0_7)
426		asic3_reg = data & 0xff;
	399	state->asic3_reg = data & 0xff;
427	400	}
428	401
429	402	/*** Knights of Valour / Sango / PhotoY2k Protection (from ElSemi) (ASIC28) ***/
430	403
431		static UINT16 ASIC28KEY;
432		static UINT16 ASIC28REGS[10];
433		static UINT16 ASICPARAMS[256];
434		static UINT16 ASIC28RCNT=0;
435		static const UINT32 B0TABLE[16]={2,0,1,4,3}; //maps char portraits to tables
	404	static const UINT32 B0TABLE[16] = {2, 0, 1, 4, 3}; //maps char portraits to tables
436	405
437	406	// photo2yk bonus stage
438	407	static const UINT32 AETABLE[16]={0x00,0x0a,0x14,
r6740	r6741
448	417	0x95,0x96,0x97,0x98,0x99,0x9a,0x9b,0x9c,
449	418	0x9e,0xa3,0xd4,0xa9,0xaf,0xb5,0xbb,0xc1};
450	419
451		static UINT32 E0REGS[16];
452	420
453	421
454		READ16_HANDLER (sango_protram_r)
	422	READ16_HANDLER( sango_protram_r )
455	423	{
456
457
458	424	// at offset == 4 is region (supplied by device)
459	425	// 0 = china
460	426	// 1 = taiwan
r6740	r6741
463	429	// 4 = hong kong
464	430	// 5 = world
465	431
466		if (offset == 4)   return input_port_read(space->machine, "Region");
	432	if (offset == 4)
	433	return input_port_read(space->machine, "Region");
467	434
468	435	// otherwise it doesn't seem to use the ram for anything important, we return 0 to avoid test mode corruption
469	436	// kovplus reads from offset 000e a lot ... why?
r6740	r6741
486	453	(BIT(val, B0) <<  0))
487	454
488	455
489		READ16_HANDLER (ASIC28_r16)
490		//UINT16 ASIC28_r16(UINT32 addr)
	456	READ16_HANDLER( asic28_r )
491	457	{
492		UINT32 val=(ASIC28REGS[1]<<16)|(ASIC28REGS[0]);
	458	pgm_state *state = (pgm_state *)space->machine->driver_data;
	459	UINT32 val = (state->asic28_regs[1] << 16) | (state->asic28_regs[0]);
493	460
494		//logerror("Asic28 Read PC = %06x Command = %02x ??\n",cpu_get_pc(space->cpu), ASIC28REGS[1]);
	461	//logerror("Asic28 Read PC = %06x Command = %02x ??\n", cpu_get_pc(space->cpu), state->asic28_regs[1]);
495	462
496		switch(ASIC28REGS[1]&0xff)
	463	switch (state->asic28_regs[1] & 0xff)
497	464	{
498	465	case 0x99:
499		val=0x880000;
	466	val = 0x880000;
500	467	break;
501	468
502	469	case 0x9d:   // spr palette
503		val=0xa00000+((ASIC28REGS[0]&0x1f)<<6);
	470	val = 0xa00000 + ((state->asic28_regs[0] & 0x1f) << 6);
504	471	break;
505	472
506	473	case 0xb0:
507		val=B0TABLE[ASIC28REGS[0]&0xf];
	474	val = B0TABLE[state->asic28_regs[0] & 0xf];
508	475	break;
509	476
510	477	case 0xb4:
511	478	{
512		int v2=ASIC28REGS[0]&0x0f;
513		int v1=(ASIC28REGS[0]&0x0f00)>>8;
514		//              UINT16 tmp=E0REGS[v2];
515		//E0REGS[v2]=E0REGS[v1];
516		//E0REGS[v1]=tmp;
517		if(ASIC28REGS[0]==0x102)
518		E0REGS[1]=E0REGS[0];
	479	//UINT16 tmp = state->eoregs[v2];
	480	int v2 = state->asic28_regs[0] & 0x0f;
	481	int v1 = (state->asic28_regs[0] & 0x0f00) >> 8;
	482	//state->eoregs[v2] = state->eoregs[v1];
	483	//state->eoregs[v1] = tmp;
	484	if (state->asic28_regs[0] == 0x102)
	485	state->eoregs[1] = state->eoregs[0];
519	486	else
520		E0REGS[v1]=E0REGS[v2];
	487	state->eoregs[v1] = state->eoregs[v2];
521	488
522		val=0x880000;
	489	val = 0x880000;
523	490	}
524	491	break;
525	492
526	493	case 0xba:
527		val=BATABLE[ASIC28REGS[0]&0x3f];
528		if(ASIC28REGS[0]>0x2f)
529		{
530		//              PutMessage("Unmapped BA com, report ElSemi",60);
531		popmessage   ("Unmapped BA com %02x, contact ElSemi / MameDev", ASIC28REGS[0]);
532		}
	494	val = BATABLE[state->asic28_regs[0] & 0x3f];
	495	if (state->asic28_regs[0] > 0x2f)
	496	popmessage("Unmapped BA com %02x, contact ElSemi / MameDev", state->asic28_regs[0]);
533	497	break;
534	498
535	499	case 0xc0:
536		val=0x880000;
	500	val = 0x880000;
537	501	break;
538	502
539	503	case 0xc3:   //TXT tile position Uses C0 to select column
540		{
541		val=0x904000+(ASICPARAMS[0xc0]+ASICPARAMS[0xc3]*64)*4;
542		}
	504	val = 0x904000 + (state->asic_params[0xc0] + state->asic_params[0xc3] * 64) * 4;
543	505	break;
544	506
545	507	case 0xcb:
546		val=0x880000;
	508	val = 0x880000;
547	509	break;
548	510
549	511	case 0xcc: //BG
550	512	{
551		int y=ASICPARAMS[0xcc];
552		if(y&0x400)    //y is signed (probably x too and it also applies to TXT, but I've never seen it used)
553		y=-(0x400-(y&0x3ff));
554		val=0x900000+(((ASICPARAMS[0xcb]+(y)*64)*4)/*&0x1fff*/);
	513	int y = state->asic_params[0xcc];
	514	if (y & 0x400)    //y is signed (probably x too and it also applies to TXT, but I've never seen it used)
	515	y =- (0x400 - (y & 0x3ff));
	516	val = 0x900000 + (((state->asic_params[0xcb] + (y) * 64) * 4) /*&0x1fff*/);
555	517	}
556	518	break;
557	519
558	520	case 0xd0:   //txt palette
559		val=0xa01000+(ASIC28REGS[0]<<5);
	521	val = 0xa01000 + (state->asic28_regs[0] << 5);
560	522	break;
561	523
562	524	case 0xd6:   //???? check it
563	525	{
564		int v2=ASIC28REGS[0]&0xf;
565		//              int v1=(ASIC28REGS[0]&0xf0)>>4;
566		E0REGS[0]=E0REGS[v2];
567		//E0REGS[v2]=0;
568		val=0x880000;
	526	int v2 = state->asic28_regs[0] & 0xf;
	527	//int v1 = (state->asic28_regs[0] & 0xf0) >> 4;
	528	state->eoregs[0] = state->eoregs[v2];
	529	//state->eoregs[v2] = 0;
	530	val = 0x880000;
569	531	}
570	532	break;
571	533
572	534	case 0xdc:   //bg palette
573		val=0xa00800+(ASIC28REGS[0]<<6);
	535	val = 0xa00800 + (state->asic28_regs[0] << 6);
574	536	break;
575	537
576	538	case 0xe0:   //spr palette
577		val=0xa00000+((ASIC28REGS[0]&0x1f)<<6);
	539	val = 0xa00000 + ((state->asic28_regs[0] & 0x1f) << 6);
578	540	break;
579	541
580	542	case 0xe5:
581		val=0x880000;
	543	val = 0x880000;
582	544	break;
583	545
584	546	case 0xe7:
585		val=0x880000;
	547	val = 0x880000;
586	548	break;
587	549
588	550	case 0xf0:
589		{
590		val=0x00C000;
591		}
	551	val = 0x00C000;
592	552	break;
593	553
594	554	case 0xf8:
595		val=E0REGS[ASIC28REGS[0]&0xf]&0xffffff;
	555	val = state->eoregs[state->asic28_regs[0] & 0xf] & 0xffffff;
596	556	break;
597	557
598	558	case 0xfc:   //Adjust damage level to char experience level
599	559	{
600		val=(ASICPARAMS[0xfc]*ASICPARAMS[0xfe])>>6;
	560	val = (state->asic_params[0xfc] * state->asic_params[0xfe]) >> 6;
601	561	break;
602	562	}
603	563
604	564	case 0xfe:   //todo
605		val=0x880000;
	565	val = 0x880000;
606	566	break;
607	567
608	568
609	569	default:
610		{
611		val=0x880000;
612		}
	570	val = 0x880000;
613	571	}
614	572
615		//  if(addr==0x500000)
616		if(offset==0)
	573	if(offset == 0)
617	574	{
618		UINT16 d=val&0xffff;
619		UINT16 realkey;
620		realkey=ASIC28KEY>>8;
621		realkey|=ASIC28KEY;
622		d^=realkey;
	575	UINT16 d = val & 0xffff;
	576	UINT16 realkey = state->asic28_key >> 8;
	577	realkey |= state->asic28_key;
	578	d ^= realkey;
623	579	return d;
624	580	}
625		//  else if(addr==0x500002)
626		else if(offset==1)
	581	else if (offset == 1)
627	582	{
628		UINT16 d=val>>16;
629		UINT16 realkey;
630		realkey=ASIC28KEY>>8;
631		realkey|=ASIC28KEY;
632		d^=realkey;
633		ASIC28RCNT++;
634		if(!(ASIC28RCNT&0xf))
	583	UINT16 d = val >> 16;
	584	UINT16 realkey = state->asic28_key >> 8;
	585	realkey |= state->asic28_key;
	586	d ^= realkey;
	587	state->asic28_rcnt++;
	588	if (!(state->asic28_rcnt & 0xf))
635	589	{
636		ASIC28KEY+=0x100;
637		ASIC28KEY&=0xFF00;
	590	state->asic28_key += 0x100;
	591	state->asic28_key &= 0xff00;
638	592	}
639	593	return d;
640	594	}
641	595	return 0xff;
642	596	}
643	597
644		WRITE16_HANDLER (ASIC28_w16)
645		//void ASIC28_w16(UINT32 addr,UINT16 data)
	598	WRITE16_HANDLER( asic28_w )
646	599	{
647		//  if(addr==0x500000)
648		if(offset==0)
	600	pgm_state *state = (pgm_state *)space->machine->driver_data;
	601
	602	if (offset == 0)
649	603	{
650		UINT16 realkey;
651		realkey=ASIC28KEY>>8;
652		realkey|=ASIC28KEY;
653		data^=realkey;
654		ASIC28REGS[0]=data;
	604	UINT16 realkey =state->asic28_key >> 8;
	605	realkey |= state->asic28_key;
	606	data ^= realkey;
	607	state->asic28_regs[0] = data;
655	608	return;
656	609	}
657		//  if(addr==0x500002)
658		if(offset==1)
	610	if (offset == 1)
659	611	{
660	612	UINT16 realkey;
661	613
662		ASIC28KEY=data&0xff00;
	614	state->asic28_key = data & 0xff00;
663	615
664		realkey=ASIC28KEY>>8;
665		realkey|=ASIC28KEY;
666		data^=realkey;
667		ASIC28REGS[1]=data;
668		//      ErrorLogMessage("ASIC28 CMD %X  PARAM %X",ASIC28REGS[1],ASIC28REGS[0]);
669		logerror("ASIC28 CMD %04x  PARAM %04x\n",ASIC28REGS[1],ASIC28REGS[0]);
	616	realkey = state->asic28_key >> 8;
	617	realkey |= state->asic28_key;
	618	data ^= realkey;
	619	state->asic28_regs[1] = data;
	620	logerror("ASIC28 CMD %04x  PARAM %04x\n", state->asic28_regs[1], state->asic28_regs[0]);
670	621
671		ASICPARAMS[ASIC28REGS[1]&0xff]=ASIC28REGS[0];
672		if(ASIC28REGS[1]==0xE7)
	622	state->asic_params[state->asic28_regs[1] & 0xff] = state->asic28_regs[0];
	623	if (state->asic28_regs[1] == 0xE7)
673	624	{
674		UINT32 E0R=(ASICPARAMS[0xE7]>>12)&0xf;
675		E0REGS[E0R]&=0xffff;
676		E0REGS[E0R]|=ASIC28REGS[0]<<16;
	625	UINT32 E0R = (state->asic_params[0xe7] >> 12) & 0xf;
	626	state->eoregs[E0R] &= 0xffff;
	627	state->eoregs[E0R] |= state->asic28_regs[0] << 16;
677	628	}
678		if(ASIC28REGS[1]==0xE5)
	629	if (state->asic28_regs[1]==0xE5)
679	630	{
680		UINT32 E0R=(ASICPARAMS[0xE7]>>12)&0xf;
681		E0REGS[E0R]&=0xff0000;
682		E0REGS[E0R]|=ASIC28REGS[0];
	631	UINT32 E0R = (state->asic_params[0xe7] >> 12) & 0xf;
	632	state->eoregs[E0R] &= 0xff0000;
	633	state->eoregs[E0R] |= state->asic28_regs[0];
683	634	}
684		ASIC28RCNT=0;
	635	state->asic28_rcnt = 0;
685	636	}
686	637	}
687	638
r6740	r6741
689	640
690	641	#define DW2BITSWAP(s,d,bs,bd)  d=((d&(~(1<<bd)))|(((s>>bs)&1)<<bd))
691	642	//Use this handler for reading from 0xd80000-0xd80002
692		READ16_HANDLER (dw2_d80000_r )
	643	READ16_HANDLER( dw2_d80000_r )
693	644	{
694		//addr&=0xff;
	645	// addr&=0xff;
695	646	// if(dw2reg<0x20) //NOT SURE!!
696	647	{
697	648	//The value at 0x80EECE is computed in the routine at 0x107c18
698		UINT16 d=pgm_mainram[0xEECE/2];
699		UINT16 d2=0;
700		d=(d>>8)|(d<<8);
701		DW2BITSWAP(d,d2,7 ,0);
702		DW2BITSWAP(d,d2,4 ,1);
703		DW2BITSWAP(d,d2,5 ,2);
704		DW2BITSWAP(d,d2,2 ,3);
705		DW2BITSWAP(d,d2,15,4);
706		DW2BITSWAP(d,d2,1 ,5);
707		DW2BITSWAP(d,d2,10,6);
708		DW2BITSWAP(d,d2,13,7);
	649	UINT16 d = pgm_mainram[0xEECE/2];
	650	UINT16 d2 = 0;
	651	d = (d >> 8) | (d << 8);
	652	DW2BITSWAP(d, d2, 7,  0);
	653	DW2BITSWAP(d, d2, 4,  1);
	654	DW2BITSWAP(d, d2, 5,  2);
	655	DW2BITSWAP(d, d2, 2,  3);
	656	DW2BITSWAP(d, d2, 15, 4);
	657	DW2BITSWAP(d, d2, 1,  5);
	658	DW2BITSWAP(d, d2, 10, 6);
	659	DW2BITSWAP(d, d2, 13, 7);
709	660	// ... missing bitswaps here (8-15) there is not enough data to know them
710	661	// the code only checks the lowest 8 bytes
711	662	return d2;
r6740	r6741
794	745
795	746	}
796	747	#endif
797
798

src/mame/machine/system16.c

r6740	r6741
1	1	#include "driver.h"
2		#include "system16.h"
	2	#include "includes/system16.h"
3	3	#include "sound/upd7759.h"
4	4
5	5	static void patch_codeX( UINT16 *mem, offs_t offset, int data )

src/mame/machine/namcond1.c

r6740	r6741
11	11
12	12	#include "driver.h"
13	13	#include "cpu/m6809/m6809.h"
14		#include "namcond1.h"
	14	#include "includes/namcond1.h"
15	15
16	16	/* Perform basic machine initialisation */
17	17

src/mame/machine/cps2crpt.c

r6740	r6741
943	943	{ "sfz3a",    { 0x990b9301,0xa4e42c7e }, 0x100000 },   // 0C80 1C62 F5A8  cmpi.l  #$1C62F5A8,D0
944	944	{ "sfz3ar1",  { 0x990b9301,0xa4e42c7e }, 0x100000 },   // 0C80 1C62 F5A8  cmpi.l  #$1C62F5A8,D0
945	945	{ "jyangoku", { 0x6ca42ae6,0x92f63f59 },  /*?*/   },   // 0C80 3652 1573  cmpi.l  #$36521573,D0
946		{ "hsf2",     { 0xb8ed3630,0xaae30a3d }, 0x100000 },   // 0838 0007 2000  btst    #7,$2000
	946	{ "hsf2",     { 0x5a369ddd,0xfea3189c }, 0x100000 },   // 0838 0007 2000  btst    #7,$2000
	947	{ "hsf2a",    { 0xb8ed3630,0xaae30a3d }, 0x100000 },   // 0838 0007 2000  btst    #7,$2000
947	948	{ "hsf2j",    { 0x65d82fe0,0xdbb83e47 }, 0x100000 },   // 0838 0007 2000  btst    #7,$2000
948	949	{ "gigawing", { 0xe52de290,0x1b60d780 }, 0x100000 },   // 0C81 1972 1027  cmpi.l  #$19721027,D1
949	950	{ "gigawingj",{ 0x1126196a,0xbef50895 }, 0x100000 },   // 0C81 1972 1027  cmpi.l  #$19721027,D1
r6740	r6741
989	990	}
990	991	++k;
991	992	}
992
993		DRIVER_INIT_CALL(cps2_video);
994	993	}

src/mame/machine/decocrpt.c

r6740	r6741
42	42	*******************************************************************************/
43	43
44	44	#include "driver.h"
45		#include "decocrpt.h"
	45	#include "includes/decocrpt.h"
46	46
47	47	static const UINT16 xor_masks[16] =
48	48	{

src/mame/machine/starwars.c

r6740	r6741
8	8	***************************************************************************/
9	9
10	10	#include "driver.h"
11		#include "starwars.h"
	11	#include "includes/starwars.h"
12	12	#include "video/avgdvg.h"
13	13
14	14

src/mame/machine/nb1413m3.c

r6740	r6741
12	12
13	13	#include "driver.h"
14	14	#include "cpu/z80/z80.h"
15		#include "nb1413m3.h"
	15	#include "includes/nb1413m3.h"
16	16
17	17
18	18	#define NB1413M3_DEBUG   0

src/mame/machine/atarifb.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "deprecat.h"
9		#include "atarifb.h"
	9	#include "includes/atarifb.h"
10	10	#include "sound/discrete.h"
11	11
12	12

src/mame/machine/wrally.c

r6740	r6741
9	9
10	10	#include "driver.h"
11	11	#include "cpu/mcs51/mcs51.h"
12		#include "gaelcrpt.h"
	12	#include "includes/gaelcrpt.h"
13	13	#include "includes/wrally.h"
14	14
15	15	/***************************************************************************

src/mame/machine/simpsons.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3	#include "cpu/konami/konami.h"
4		#include "machine/eeprom.h"
	4	#include "machine/eepromdev.h"
5	5	#include "sound/k053260.h"
6	6	#include "includes/simpsons.h"
7	7
r6740	r6741
13	13
14	14	***************************************************************************/
15	15
16		static int init_eeprom_count;
17
18
19		static const eeprom_interface eeprom_intf =
20		{
21		7,            /* address bits */
22		8,            /* data bits */
23		"011000",      /*  read command */
24		"011100",      /* write command */
25		0,            /* erase command */
26		"0100000000000",/* lock command */
27		"0100110000000" /* unlock command */
28		};
29
30		NVRAM_HANDLER( simpsons )
31		{
32		if (read_or_write)
33		eeprom_save(file);
34		else
35		{
36		eeprom_init(machine, &eeprom_intf);
37
38		if (file)
39		{
40		init_eeprom_count = 0;
41		eeprom_load(file);
42		}
43		else
44		init_eeprom_count = 10;
45		}
46		}
47
48		READ8_HANDLER( simpsons_eeprom_r )
49		{
50		int res;
51
52		res = (eeprom_read_bit() << 4);
53
54		res |= 0x20;//konami_eeprom_ack() << 5; /* add the ack */
55
56		res |= input_port_read(space->machine, "TEST") & 1; /* test switch */
57
58		if (init_eeprom_count)
59		{
60		init_eeprom_count--;
61		res &= 0xfe;
62		}
63		return res;
64		}
65
66	16	WRITE8_HANDLER( simpsons_eeprom_w )
67	17	{
68		if ( data == 0xff )
	18	if (data == 0xff)
69	19	return;
70	20
71		eeprom_write_bit(data & 0x80);
72		eeprom_set_cs_line((data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
73		eeprom_set_clock_line((data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
	21	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
74	22
75		simpsons_video_banking( space->machine, data & 3 );
	23	simpsons_video_banking(space->machine, data & 3);
76	24
77	25	simpsons_firq_enabled = data & 0x04;
78	26	}
r6740	r6741
85	33
86	34	WRITE8_HANDLER( simpsons_coin_counter_w )
87	35	{
	36	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
	37	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	38
88	39	/* bit 0,1 coin counters */
89	40	coin_counter_w(space->machine, 0,data & 0x01);
90	41	coin_counter_w(space->machine, 1,data & 0x02);
91	42	/* bit 2 selects mono or stereo sound */
92	43	/* bit 3 = enable char ROM reading through the video RAM */
93		K052109_set_RMRD_line((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	44	k052109_set_rmrd_line(k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
94	45	/* bit 4 = INIT (unknown) */
95	46	/* bit 5 = enable sprite ROM reading */
96		K053246_set_OBJCHA_line((~data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
	47	k053246_set_objcha_line(k053246, (~data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
97	48	}
98	49
99	50	READ8_HANDLER( simpsons_sound_interrupt_r )

src/mame/machine/subs.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "subs.h"
	8	#include "includes/subs.h"
9	9
10	10	static int subs_steering_buf1;
11	11	static int subs_steering_buf2;

src/mame/machine/model1.c

r6740	r6741
1920	1920	}
1921	1921	}
1922	1922
	1923	MACHINE_START( model1 )
	1924	{
	1925	ram_data = auto_alloc_array(machine, UINT32, 0x10000);
	1926
	1927	state_save_register_global_pointer(machine, ram_data, 0x10000);
	1928	state_save_register_global(machine, ram_adr);
	1929	state_save_register_global(machine, ram_scanadr);
	1930	state_save_register_global_array(machine, ram_latch);
	1931	state_save_register_global(machine, fifoout_rpos);
	1932	state_save_register_global(machine, fifoout_wpos);
	1933	state_save_register_global_array(machine, fifoout_data);
	1934	state_save_register_global(machine, fifoin_rpos);
	1935	state_save_register_global(machine, fifoin_wpos);
	1936	state_save_register_global_array(machine, fifoin_data);
	1937	state_save_register_global_array(machine, cmat);
	1938	state_save_register_global_2d_array(machine, mat_stack);
	1939	state_save_register_global_2d_array(machine, mat_vector);
	1940	state_save_register_global(machine, mat_stack_pos);
	1941	state_save_register_global(machine, acc);
	1942	state_save_register_global(machine, list_length);
	1943	}
	1944
1923	1945	void model1_tgp_reset(running_machine *machine, int swa)
1924	1946	{
1925	1947	ram_adr = 0;
1926		ram_data = auto_alloc_array(machine, UINT32, 0x10000);
1927	1948	memset(ram_data, 0, 0x10000*4);
1928	1949
1929	1950	fifoout_rpos = 0;
r6740	r6741
1941	1962	model1_dump = 0;
1942	1963	model1_swa = swa;
1943	1964	next_fn();
1944
1945		state_save_register_global_pointer(machine, ram_data, 0x10000);
1946		state_save_register_global(machine, ram_adr);
1947		state_save_register_global(machine, ram_scanadr);
1948		state_save_register_global_array(machine, ram_latch);
1949		state_save_register_global(machine, fifoout_rpos);
1950		state_save_register_global(machine, fifoout_wpos);
1951		state_save_register_global_array(machine, fifoout_data);
1952		state_save_register_global(machine, fifoin_rpos);
1953		state_save_register_global(machine, fifoin_wpos);
1954		state_save_register_global_array(machine, fifoin_data);
1955		state_save_register_global_array(machine, cmat);
1956		state_save_register_global_2d_array(machine, mat_stack);
1957		state_save_register_global_2d_array(machine, mat_vector);
1958		state_save_register_global(machine, mat_stack_pos);
1959		state_save_register_global(machine, acc);
1960		state_save_register_global(machine, list_length);
1961	1965	}
1962	1966
1963	1967	/*********************************** Virtua Racing ***********************************/
r6740	r6741
1972	1976	void model1_vr_tgp_reset( running_machine *machine )
1973	1977	{
1974	1978	ram_adr = 0;
1975		ram_data = auto_alloc_array(machine, UINT32, 0x8000);
1976	1979	memset(ram_data, 0, 0x8000*4);
1977	1980
1978	1981	copro_fifoout_rpos = 0;

src/mame/machine/slapstic.c

r6740	r6741
180	180
181	181	#include "driver.h"
182	182	#include "cpu/m6800/m6800.h"
183		#include "slapstic.h"
	183	#include "includes/slapstic.h"
184	184	#include "cpu/m68000/m68000.h"
185	185
186	186

src/mame/machine/ajax.c

r6740	r6741
11	11	#include "cpu/m6809/m6809.h"
12	12	#include "cpu/z80/z80.h"
13	13	#include "cpu/konami/konami.h"
14		#include "video/konamiic.h"
	14	#include "video/konicdev.h"
15	15	#include "includes/ajax.h"
16	16
17	17	static int firq_enable;
r6740	r6741
180	180
181	181	WRITE8_HANDLER( ajax_bankswitch_2_w )
182	182	{
	183	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	184	const device_config *k051316 = devtag_get_device(space->machine, "k051316");
183	185	UINT8 *RAM = memory_region(space->machine, "sub");
184	186	int bankaddress;
185	187
186	188	/* enable char ROM reading through the video RAM */
187		K052109_set_RMRD_line((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
	189	k052109_set_rmrd_line(k052109, (data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
188	190
189	191	/* bit 5 enables 051316 wraparound */
190		K051316_wraparound_enable(0, data & 0x20);
	192	k051316_wraparound_enable(k051316, data & 0x20);
191	193
192	194	/* FIRQ control */
193	195	firq_enable = data & 0x10;
r6740	r6741
211	213
212	214	INTERRUPT_GEN( ajax_interrupt )
213	215	{
214		if (K051960_is_IRQ_enabled())
	216	const device_config *k051960 = devtag_get_device(device->machine, "k051960");
	217	if (k051960_is_irq_enabled(k051960))
215	218	cpu_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE);
216	219	}

src/mame/machine/mw8080bw.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "mw8080bw.h"
9		#include "machine/mb14241.h"
	8	#include "includes/mw8080bw.h"
10	9
11
12	10	/*************************************
13	11	*
14	12	*  Interrupt generation
15	13	*
16	14	*************************************/
17	15
18		static emu_timer *interrupt_timer;
19
20
21		static UINT8 vpos_to_vysnc_chain_counter(int vpos)
	16	static UINT8 vpos_to_vysnc_chain_counter( int vpos )
22	17	{
23	18	/* convert from a vertical position to the actual values on the vertical sync counters */
24	19	UINT8 counter;
25	20	int vblank = (vpos >= MW8080BW_VBSTART);
26	21
27	22	if (vblank)
28		{
29	23	counter = vpos - MW8080BW_VBSTART + MW8080BW_VCOUNTER_START_VBLANK;
30		}
31	24	else
32		{
33	25	counter = vpos + MW8080BW_VCOUNTER_START_NO_VBLANK;
34		}
35	26
36
37	27	return counter;
38	28	}
39	29
40	30
41		static int vysnc_chain_counter_to_vpos(UINT8 counter, int vblank)
	31	static int vysnc_chain_counter_to_vpos( UINT8 counter, int vblank )
42	32	{
43	33	/* convert from the vertical sync counters to an actual vertical position */
44	34	int vpos;
45	35
46	36	if (vblank)
47		{
48	37	vpos = counter - MW8080BW_VCOUNTER_START_VBLANK + MW8080BW_VBSTART;
49		}
50	38	else
51		{
52	39	vpos = counter - MW8080BW_VCOUNTER_START_NO_VBLANK;
53		}
54	40
55	41	return vpos;
56	42	}
r6740	r6741
58	44
59	45	static TIMER_CALLBACK( mw8080bw_interrupt_callback )
60	46	{
	47	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
61	48	UINT8 next_counter;
62	49	int next_vpos;
63	50	int next_vblank;
r6740	r6741
66	53	int vpos = video_screen_get_vpos(machine->primary_screen);
67	54	UINT8 counter = vpos_to_vysnc_chain_counter(vpos);
68	55	UINT8 vector = 0xc7 | ((counter & 0x40) >> 2) | ((~counter & 0x40) >> 3);
69		cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, vector);
	56	cpu_set_input_line_and_vector(state->maincpu, 0, HOLD_LINE, vector);
70	57
71	58	/* set up for next interrupt */
72	59	if (counter == MW8080BW_INT_TRIGGER_COUNT_1)
r6740	r6741
81	68	}
82	69
83	70	next_vpos = vysnc_chain_counter_to_vpos(next_counter, next_vblank);
84		timer_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, next_vpos, 0), 0);
	71	timer_adjust_oneshot(state->interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, next_vpos, 0), 0);
85	72	}
86	73
87	74
88		static void mw8080bw_create_interrupt_timer(running_machine *machine)
	75	static void mw8080bw_create_interrupt_timer( running_machine *machine )
89	76	{
90		interrupt_timer = timer_alloc(machine, mw8080bw_interrupt_callback, NULL);
	77	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	78	state->interrupt_timer = timer_alloc(machine, mw8080bw_interrupt_callback, NULL);
91	79	}
92	80
93	81
94		static void mw8080bw_start_interrupt_timer(running_machine *machine)
	82	static void mw8080bw_start_interrupt_timer( running_machine *machine )
95	83	{
	84	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
96	85	int vpos = vysnc_chain_counter_to_vpos(MW8080BW_INT_TRIGGER_COUNT_1, MW8080BW_INT_TRIGGER_VBLANK_1);
97		timer_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, vpos, 0), 0);
	86	timer_adjust_oneshot(state->interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, vpos, 0), 0);
98	87	}
99	88
100	89
r6740	r6741
107	96
108	97	MACHINE_START( mw8080bw )
109	98	{
	99	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	100
110	101	mw8080bw_create_interrupt_timer(machine);
111		mb14241_init(machine,0);
	102
	103	state->maincpu = devtag_get_device(machine, "maincpu");
	104	state->samples = devtag_get_device(machine, "samples");
	105	state->samples1 = devtag_get_device(machine, "samples1");
	106	state->samples2 = devtag_get_device(machine, "samples2");
	107	state->sn = devtag_get_device(machine, "snsnd");
	108	state->sn1 = devtag_get_device(machine, "sn1");
	109	state->sn2 = devtag_get_device(machine, "sn2");
	110	state->discrete = devtag_get_device(machine, "discrete");
	111	state->speaker = devtag_get_device(machine, "speaker");
	112	state->mb14241 = devtag_get_device(machine, "mb14241");
112	113	}
113	114
114	115
115
116	116	/*************************************
117	117	*
118	118	*  Machine reset

src/mame/machine/nitedrvr.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "nitedrvr.h"
	8	#include "includes/nitedrvr.h"
9	9	#include "sound/discrete.h"
10	10
11	11	static UINT8 nitedrvr_gear;
r6740	r6741
250	250	}
251	251
252	252
253		static TIMER_CALLBACK( nitedrvr_crash_toggle_callback )
	253	TIMER_DEVICE_CALLBACK( nitedrvr_crash_toggle_callback )
254	254	{
255	255	if (nitedrvr_crash_en && nitedrvr_crash_data_en)
256	256	{
257		const device_config *discrete = devtag_get_device(machine, "discrete");
	257	const device_config *discrete = devtag_get_device(timer->machine, "discrete");
258	258
259	259	nitedrvr_crash_data--;
260	260	discrete_sound_w(discrete, NITEDRVR_BANG_DATA, nitedrvr_crash_data);   // Crash Volume
r6740	r6741
262	262	if (nitedrvr_crash_data & 0x01)
263	263	{
264	264	/* Invert video */
265		palette_set_color(machine,1,MAKE_RGB(0x00,0x00,0x00)); /* BLACK */
266		palette_set_color(machine,0,MAKE_RGB(0xff,0xff,0xff)); /* WHITE */
	265	palette_set_color(timer->machine,1,MAKE_RGB(0x00,0x00,0x00)); /* BLACK */
	266	palette_set_color(timer->machine,0,MAKE_RGB(0xff,0xff,0xff)); /* WHITE */
267	267	}
268	268	else
269	269	{
270	270	/* Normal video */
271		palette_set_color(machine,0,MAKE_RGB(0x00,0x00,0x00)); /* BLACK */
272		palette_set_color(machine,1,MAKE_RGB(0xff,0xff,0xff)); /* WHITE */
	271	palette_set_color(timer->machine,0,MAKE_RGB(0x00,0x00,0x00)); /* BLACK */
	272	palette_set_color(timer->machine,1,MAKE_RGB(0xff,0xff,0xff)); /* WHITE */
273	273	}
274	274	}
275	275	}
r6740	r6741
298	298	nitedrvr_crash_data_en = 0;
299	299	ac_line = 0;
300	300	last_steering_val = 0;
301
302		timer_pulse(machine, PERIOD_OF_555_ASTABLE(RES_K(180), 330, CAP_U(1)), NULL, 0, nitedrvr_crash_toggle_callback);
303	301	}

src/mame/mamedriv.c

r6740	r6741
2277	2277	DRIVER( kbash2 )   /* bootleg */
2278	2278	DRIVER( truxton2 )   /* TP-024 (c) 1992 Toaplan */
2279	2279	DRIVER( pipibibs )   /* TP-025 */
	2280	DRIVER( pipibibsa )   /* TP-025 */
2280	2281	DRIVER( whoopee )   /* TP-025 */
2281	2282	DRIVER( pipibibi )   /* (c) 1991 Ryouta Kikaku (bootleg?) */
2282	2283	DRIVER( fixeight )   /* TP-026 (c) 1992 + Taito license */
r6740	r6741
2913	2914	DRIVER( pzloop2 )   /* 02/03/2001 (c) 2001 Mitchell (Euro) */
2914	2915	DRIVER( pzloop2j )   /* 05/02/2001 (c) 2001 Mitchell (Japan) */
2915	2916	DRIVER( choko )      /* 20/08/2001 (c) 2001 Mitchell (Japan) */
	2917	DRIVER( hsf2 )      /* 02/02/2004 (c) 2004 Hyper Street Fighter 2 (USA) */
2916	2918	DRIVER( hsf2j )      /* 22/12/2003 (c) 2003 Hyper Street Fighter 2 (Japan) */
2917		DRIVER( hsf2 )      /* 02/02/2004 (c) 2004 Hyper Street Fighter 2 (Asia) */
	2919	DRIVER( hsf2a )      /* 02/02/2004 (c) 2004 Hyper Street Fighter 2 (Asia) */
2918	2920
2919	2921	/* CPS2 'Phoenix' bootlegs */
2920	2922	DRIVER( ssf2ud )
r6740	r6741
5010	5012	DRIVER( cninja1 )   /* MAG (c) 1991 Data East Corporation (World) */
5011	5013	DRIVER( cninjau )   /* MAG (c) 1991 Data East Corporation (US) */
5012	5014	DRIVER( joemac )   /* MAG (c) 1991 Data East Corporation (Japan) */
	5015	DRIVER( cninjabl )   /* bootleg */
5013	5016	DRIVER( stoneage )   /* bootleg */
5014	5017	DRIVER( robocop2 )   /* MAH (c) 1991 Data East Corporation (World) */
5015	5018	DRIVER( robocop2u )   /* MAH (c) 1991 Data East Corporation (US) */
r6740	r6741
5288	5291	DRIVER( contrajb )   /* bootleg */
5289	5292	DRIVER( gryzor )   /* GX633 (c) 1987 */
5290	5293	DRIVER( gryzora )   /* GX633 (c) 1987 */
5291		DRIVER( combasc )   /* GX611 (c) 1988 */
5292		DRIVER( combasct )   /* GX611 (c) 1987 */
5293		DRIVER( combascj )   /* GX611 (c) 1987 (Japan) */
	5294	DRIVER( combatsc )   /* GX611 (c) 1988 */
	5295	DRIVER( combatsct )   /* GX611 (c) 1987 */
	5296	DRIVER( combatscj )   /* GX611 (c) 1987 (Japan) */
5294	5297	DRIVER( bootcamp )   /* GX611 (c) 1987 */
5295		DRIVER( combascb )   /* bootleg */
	5298	DRIVER( combatscb )   /* bootleg */
5296	5299	DRIVER( rockrage )   /* GX620 (c) 1986 (World?) */
5297	5300	DRIVER( rockragea )   /* GX620 (c) 1986 (Prototype?) */
5298	5301	DRIVER( rockragej )   /* GX620 (c) 1986 (Japan) */
r6740	r6741
6916	6919	/* Midway Zeus games */
6917	6920	DRIVER( mk4 )      /* (c) 1997 Midway (v3.0) Latest offical release */
6918	6921	DRIVER( mk4a )      /* (c) 1997 Midway (v2.1) */
	6922	DRIVER( mk4b )      /* (c) 1997 Midway (v1.0) */
6919	6923	DRIVER( invasnab )   /* (c) 1999 Midway (v5.0) Latest offical release */
6920	6924	DRIVER( invasnv4 )   /* (c) 1999 Midway (v4.0) */
6921	6925	DRIVER( crusnexo )   /* (c) 1999 Midway (v2.4) Latest offical release */
r6740	r6741
7193	7197	DRIVER( jujub )      /* (c) 1989 Tad (Japan) */
7194	7198	DRIVER( bloodbro )   /* (c) 1990 Tad */
7195	7199	DRIVER( bloodbroa )   /* (c) 1990 Tad */
	7200	DRIVER( bloodbrob )   /* (c) 1990 Tad */
7196	7201	DRIVER( weststry )   /* bootleg */
7197	7202	DRIVER( skysmash )   /* (c) 1990 Nihon System Inc. */
7198	7203	DRIVER( legionna )   /* (c) 1992 Tad (World) */
r6740	r6741
8279	8284	DRIVER( kovshp )
8280	8285	DRIVER( oldsplus )
8281	8286	DRIVER( killbldp )
	8287	DRIVER( happy6 )
8282	8288	DRIVER( svg )
8283	8289
8284	8290	/* Spirit Tech. Corp. */

src/mame/includes/nitedrvr.h

r6740	r6741
24	24	WRITE8_HANDLER( nitedrvr_out0_w );
25	25	WRITE8_HANDLER( nitedrvr_out1_w );
26	26
	27	TIMER_DEVICE_CALLBACK( nitedrvr_crash_toggle_callback );
	28
27	29	MACHINE_RESET( nitedrvr );
28	30	MACHINE_START( nitedrvr );
29	31

src/mame/includes/mitchell.h

r0	r6741
	1	/*************************************************************************
	2
	3	Mitchell hardware
	4
	5	*************************************************************************/
	6
	7	typedef struct _mitchell_state mitchell_state;
	8	struct _mitchell_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    videoram;
	12	UINT8 *    colorram;
	13	size_t     videoram_size;
	14
	15	/* video-related */
	16	tilemap    *bg_tilemap;
	17	UINT8      *objram;           /* Sprite RAM */
	18	int        flipscreen;
	19	int        video_bank;
	20	int        paletteram_bank;
	21
	22	/* sound-related */
	23	int        sample_buffer;
	24	int        sample_select;
	25
	26	/* misc */
	27	UINT8      port5_kludge;
	28	int        input_type;
	29	int        dial[2], dial_selected;
	30	int        dir[2];
	31	int        keymatrix;
	32
	33	/* devices */
	34	const device_config *audiocpu;
	35	const device_config *oki;
	36	};
	37
	38
	39	/*----------- defined in video/mitchell.c -----------*/
	40
	41	WRITE8_HANDLER( mgakuen_paletteram_w );
	42	READ8_HANDLER( mgakuen_paletteram_r );
	43	WRITE8_HANDLER( mgakuen_videoram_w );
	44	READ8_HANDLER( mgakuen_videoram_r );
	45	WRITE8_HANDLER( mgakuen_objram_w );
	46	READ8_HANDLER( mgakuen_objram_r );
	47
	48	WRITE8_HANDLER( pang_video_bank_w );
	49	WRITE8_HANDLER( pang_videoram_w );
	50	READ8_HANDLER( pang_videoram_r );
	51	WRITE8_HANDLER( pang_colorram_w );
	52	READ8_HANDLER( pang_colorram_r );
	53	WRITE8_HANDLER( pang_gfxctrl_w );
	54	WRITE8_HANDLER( pang_paletteram_w );
	55	READ8_HANDLER( pang_paletteram_r );
	56
	57	WRITE8_HANDLER( mstworld_gfxctrl_w );
	58	WRITE8_HANDLER( mstworld_video_bank_w );
	59
	60	VIDEO_START( pang );
	61	VIDEO_UPDATE( pang );

src/mame/includes/jaguar.h

r6740	r6741
29	29
30	30	/*----------- defined in audio/jaguar.c -----------*/
31	31
	32	TIMER_DEVICE_CALLBACK( jaguar_serial_callback );
	33
32	34	void jaguar_dsp_suspend(running_machine *machine);
33	35	void jaguar_dsp_resume(running_machine *machine);
34	36

src/mame/includes/fgoal.h

r6740	r6741
14	14	/* misc */
15	15	int        fgoal_player;
16	16	UINT8      row, col;
17		unsigned   shift_data, shift_bits;
18	17	int        prev_coin;
19	18
20	19	/* devices */
21	20	const device_config *maincpu;
	21	const device_config *mb14241;
22	22	};
23	23
24	24

src/mame/includes/cvs.h

r6740	r6741
2	2
3	3	Century CVS System
4	4
	5	(and Quasar)
	6
5	7	****************************************************************************/
6	8
7	9
8		#define CVS_S2636_Y_OFFSET      (3)
9		#define CVS_S2636_X_OFFSET      (-26)
	10	#define CVS_S2636_Y_OFFSET     (3)
	11	#define CVS_S2636_X_OFFSET     (-26)
	12	#define CVS_MAX_STARS          250
10	13
	14	struct cvs_star
	15	{
	16	int x, y, code;
	17	};
11	18
	19	typedef struct _cvs_state cvs_state;
	20	struct _cvs_state
	21	{
	22	/* memory pointers */
	23	UINT8 *    video_ram;
	24	UINT8 *    bullet_ram;
	25	UINT8 *    fo_state;
	26	UINT8 *    cvs_4_bit_dac_data;
	27	UINT8 *    tms5110_ctl_data;
	28	UINT8 *    dac3_state;
	29	UINT8 *    color_ram;
	30	UINT8 *    palette_ram;
	31	UINT8 *    character_ram;
	32	UINT8 *    effectram;   // quasar
	33
	34	/* video-related */
	35	struct cvs_star stars[CVS_MAX_STARS];
	36	bitmap_t   *collision_background;
	37	bitmap_t   *background_bitmap;
	38	bitmap_t   *scrolled_collision_background;
	39	int        collision_register;
	40	int        total_stars;
	41	int        stars_on;
	42	UINT8      scroll_reg;
	43	UINT8      effectcontrol;   // quasar
	44	int        stars_scroll;
	45
	46	/* misc */
	47	emu_timer  *cvs_393hz_timer;
	48	UINT8      cvs_393hz_clock;
	49
	50	UINT8      character_banking_mode;
	51	UINT16     character_ram_page_start;
	52	UINT16     speech_rom_bit_address;
	53
	54	UINT8      page, io_page;   // quasar
	55
	56	/* devices */
	57	const device_config *maincpu;
	58	const device_config *audiocpu;
	59	const device_config *speech;
	60	const device_config *dac3;
	61	const device_config *tms;
	62	const device_config *s2636_0;
	63	const device_config *s2636_1;
	64	const device_config *s2636_2;
	65	};
	66
12	67	/*----------- defined in drivers/cvs.c -----------*/
13	68
14		extern UINT8 *cvs_color_ram;
15		extern UINT8 *cvs_video_ram;
16		extern UINT8 *cvs_bullet_ram;
17		extern UINT8 *cvs_palette_ram;
18		extern UINT8 *cvs_fo_state;
19
20	69	MACHINE_START( cvs );
	70	MACHINE_RESET( cvs );
21	71
22	72	READ8_HANDLER( cvs_video_or_color_ram_r );
23	73	WRITE8_HANDLER( cvs_video_or_color_ram_w );
r6740	r6741
32	82	READ8_HANDLER( cvs_s2636_2_or_character_ram_r );
33	83	WRITE8_HANDLER( cvs_s2636_2_or_character_ram_w );
34	84
35		UINT8 cvs_get_character_banking_mode(void);
	85	/*----------- defined in video/cvs.c -----------*/
36	86
	87	WRITE8_HANDLER( cvs_scroll_w );
	88	WRITE8_HANDLER( cvs_video_fx_w );
37	89
38		/*----------- defined in video/cvs.c -----------*/
	90	READ8_HANDLER( cvs_collision_r );
	91	READ8_HANDLER( cvs_collision_clear );
39	92
40		extern bitmap_t *cvs_collision_background;
41		extern int cvs_collision_register;
	93	void cvs_scroll_stars(running_machine *machine);
42	94
43	95	PALETTE_INIT( cvs );
44	96	VIDEO_UPDATE( cvs );
45	97	VIDEO_START( cvs );
46	98
47		WRITE8_HANDLER( cvs_scroll_w );
48		WRITE8_HANDLER( cvs_video_fx_w );
	99	/*----------- defined in video/quasar.c -----------*/
49	100
50		READ8_HANDLER( cvs_collision_r );
51		READ8_HANDLER( cvs_collision_clear );
52
53		void cvs_scroll_stars(void);
	101	PALETTE_INIT( quasar );
	102	VIDEO_UPDATE( quasar );
	103	VIDEO_START( quasar );

src/mame/includes/mhavoc.h

r6740	r6741
17	17
18	18	/*----------- defined in machine/mhavoc.c -----------*/
19	19
	20	TIMER_DEVICE_CALLBACK( mhavoc_cpu_irq_clock );
	21
20	22	WRITE8_HANDLER( mhavoc_alpha_irq_ack_w );
21	23	WRITE8_HANDLER( mhavoc_gamma_irq_ack_w );
22	24
	25	MACHINE_START( mhavoc );
23	26	MACHINE_RESET( mhavoc );
24	27	DRIVER_INIT( mhavocrv );
25	28

src/mame/includes/hcastle.h

r0	r6741
	1	/*************************************************************************
	2
	3	Haunted Castle
	4
	5	*************************************************************************/
	6
	7	typedef struct _hcastle_state hcastle_state;
	8	struct _hcastle_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    pf1_videoram;
	12	UINT8 *    pf2_videoram;
	13	UINT8 *    paletteram;
	14	//  UINT8 *    spriteram;
	15	//  UINT8 *    spriteram2;
	16
	17	/* video-related */
	18	tilemap    *fg_tilemap, *bg_tilemap;
	19	int        pf2_bankbase, pf1_bankbase;
	20	int        old_pf1, old_pf2;
	21	int        gfx_bank;
	22
	23	/* devices */
	24	const device_config *audiocpu;
	25	const device_config *k007121_1;
	26	const device_config *k007121_2;
	27	};
	28
	29
	30	/*----------- defined in video/hcastle.c -----------*/
	31
	32	WRITE8_HANDLER( hcastle_pf1_video_w );
	33	WRITE8_HANDLER( hcastle_pf2_video_w );
	34	READ8_HANDLER( hcastle_gfxbank_r );
	35	WRITE8_HANDLER( hcastle_gfxbank_w );
	36	WRITE8_HANDLER( hcastle_pf1_control_w );
	37	WRITE8_HANDLER( hcastle_pf2_control_w );
	38
	39	PALETTE_INIT( hcastle );
	40	VIDEO_UPDATE( hcastle );
	41	VIDEO_START( hcastle );

src/mame/includes/battlnts.h

r0	r6741
	1	/*************************************************************************
	2
	3	Konami Battlantis Hardware
	4
	5	*************************************************************************/
	6
	7	typedef struct _battlnts_state battlnts_state;
	8	struct _battlnts_state
	9	{
	10	/* memory pointers */
	11	//  UINT8 *      paletteram;    // this currently uses generic palette handling
	12
	13	/* video-related */
	14	int spritebank;
	15	int layer_colorbase[2];
	16
	17
	18	/* devices */
	19	const device_config *audiocpu;
	20	const device_config *k007342;
	21	const device_config *k007420;
	22	};
	23
	24	/*----------- defined in video/battlnts.c -----------*/
	25
	26	WRITE8_HANDLER( battlnts_spritebank_w );
	27
	28	VIDEO_UPDATE( battlnts );
	29
	30	void battlnts_tile_callback(running_machine *machine, int layer, int bank, int *code, int *color, int *flags);
	31	void battlnts_sprite_callback(running_machine *machine, int *code, int *color);

src/mame/includes/labyrunr.h

r0	r6741
	1	/*************************************************************************
	2
	3	Labyrinth Runner
	4
	5	*************************************************************************/
	6
	7	typedef struct _labyrunr_state labyrunr_state;
	8	struct _labyrunr_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    videoram1;
	12	UINT8 *    videoram2;
	13	UINT8 *    scrollram;
	14	UINT8 *    spriteram;
	15	UINT8 *    paletteram;
	16
	17	/* video-related */
	18	tilemap    *layer0, *layer1;
	19	rectangle  clip0, clip1;
	20
	21	/* devices */
	22	const device_config *k007121;
	23	};
	24
	25
	26	/*----------- defined in video/labyrunr.c -----------*/
	27
	28
	29	WRITE8_HANDLER( labyrunr_vram1_w );
	30	WRITE8_HANDLER( labyrunr_vram2_w );
	31
	32	PALETTE_INIT( labyrunr );
	33	VIDEO_START( labyrunr );
	34	VIDEO_UPDATE( labyrunr );

src/mame/includes/carpolo.h

r6740	r6741
13	13	extern const pia6821_interface carpolo_pia0_intf;
14	14	extern const pia6821_interface carpolo_pia1_intf;
15	15
	16	void carpolo_74148_3s_cb(const device_config *device);
	17
	18	void carpolo_7474_2s_1_cb(const device_config *device);
	19	void carpolo_7474_2s_2_cb(const device_config *device);
	20	void carpolo_7474_2u_1_cb(const device_config *device);
	21	void carpolo_7474_2u_2_cb(const device_config *device);
	22
16	23	MACHINE_START( carpolo );
17	24	MACHINE_RESET( carpolo );
18	25

src/mame/includes/galaga.h

r6740	r6741
70	70	/*----------- defined in machine/xevious.c -----------*/
71	71
72	72	void battles_customio_init(running_machine *machine);
	73	TIMER_DEVICE_CALLBACK( battles_nmi_generate );
73	74
74	75	READ8_HANDLER( battles_customio0_r );
75	76	READ8_HANDLER( battles_customio_data0_r );

src/mame/includes/flkatck.h

r0	r6741
	1	/*************************************************************************
	2
	3	Flak Attack / MX5000
	4
	5	*************************************************************************/
	6
	7	typedef struct _flkatck_state flkatck_state;
	8	struct _flkatck_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    k007121_ram;
	12	//  UINT8 *    paletteram;  // this currently uses generic palette handling
	13
	14	/* video-related */
	15	tilemap    *k007121_tilemap[2];
	16	int        flipscreen;
	17
	18	/* misc */
	19	int        irq_enabled;
	20	int        multiply_reg[2];
	21
	22	/* devices */
	23	const device_config *audiocpu;
	24	const device_config *k007121;
	25	};
	26
	27
	28	//static rectangle k007121_clip[2];
	29
	30
	31	/*----------- defined in video/flkatck.c -----------*/
	32
	33	WRITE8_HANDLER( flkatck_k007121_w );
	34	WRITE8_HANDLER( flkatck_k007121_regs_w );
	35
	36	VIDEO_START( flkatck );
	37	VIDEO_UPDATE( flkatck );

src/mame/includes/contra.h

r0	r6741
	1	/*************************************************************************
	2
	3	Contra / Gryzor
	4
	5	*************************************************************************/
	6
	7	typedef struct _contra_state contra_state;
	8	struct _contra_state
	9	{
	10	/* memory pointers */
	11	UINT8 *        spriteram;
	12	UINT8 *        spriteram_2;
	13	UINT8 *        paletteram;
	14	UINT8 *        bg_vram;
	15	UINT8 *        bg_cram;
	16	UINT8 *        fg_vram;
	17	UINT8 *        fg_cram;
	18	UINT8 *        tx_vram;
	19	UINT8 *        tx_cram;
	20	// this driver also uses a large generic spriteram region...
	21
	22	/* video-related */
	23	tilemap *bg_tilemap, *fg_tilemap, *tx_tilemap;
	24	rectangle bg_clip, fg_clip, tx_clip;
	25
	26	/* devices */
	27	const device_config *audiocpu;
	28	const device_config *k007121_1;
	29	const device_config *k007121_2;
	30	};
	31
	32
	33	/*----------- defined in video/contra.c -----------*/
	34
	35	PALETTE_INIT( contra );
	36
	37	WRITE8_HANDLER( contra_fg_vram_w );
	38	WRITE8_HANDLER( contra_fg_cram_w );
	39	WRITE8_HANDLER( contra_bg_vram_w );
	40	WRITE8_HANDLER( contra_bg_cram_w );
	41	WRITE8_HANDLER( contra_text_vram_w );
	42	WRITE8_HANDLER( contra_text_cram_w );
	43
	44	WRITE8_HANDLER( contra_K007121_ctrl_0_w );
	45	WRITE8_HANDLER( contra_K007121_ctrl_1_w );
	46
	47	VIDEO_UPDATE( contra );
	48	VIDEO_START( contra );

src/mame/includes/balsente.h

r6740	r6741
18	18	#define BALSENTE_VBSTART      (0x100)
19	19
20	20
	21	#define POLY17_BITS 17
	22	#define POLY17_SIZE ((1 << POLY17_BITS) - 1)
	23	#define POLY17_SHL   7
	24	#define POLY17_SHR   10
	25	#define POLY17_ADD   0x18000
	26
	27
	28	typedef struct _balsente_state balsente_state;
	29	struct _balsente_state
	30	{
	31	/* global data */
	32	UINT8 shooter;
	33	UINT8 shooter_x;
	34	UINT8 shooter_y;
	35	UINT8 adc_shift;
	36	UINT16 *shrike_shared;
	37	UINT16 *shrike_io;
	38
	39	/* 8253 counter state */
	40	struct
	41	{
	42	const device_config *timer;
	43	UINT8 timer_active;
	44	INT32 initial;
	45	INT32 count;
	46	UINT8 gate;
	47	UINT8 out;
	48	UINT8 mode;
	49	UINT8 readbyte;
	50	UINT8 writebyte;
	51	} counter[3];
	52
	53	const device_config *scanline_timer;
	54
	55	/* manually clocked counter 0 states */
	56	UINT8 counter_control;
	57	UINT8 counter_0_ff;
	58	const device_config *counter_0_timer;
	59	UINT8 counter_0_timer_active;
	60
	61	/* random number generator states */
	62	UINT8 poly17[POLY17_SIZE + 1];
	63	UINT8 rand17[POLY17_SIZE + 1];
	64
	65	/* ADC I/O states */
	66	INT8 analog_input_data[4];
	67	UINT8 adc_value;
	68
	69	/* CEM3394 DAC control states */
	70	UINT16 dac_value;
	71	UINT8 dac_register;
	72	UINT8 chip_select;
	73
	74	/* main CPU 6850 states */
	75	UINT8 m6850_status;
	76	UINT8 m6850_control;
	77	UINT8 m6850_input;
	78	UINT8 m6850_output;
	79	UINT8 m6850_data_ready;
	80
	81	/* sound CPU 6850 states */
	82	UINT8 m6850_sound_status;
	83	UINT8 m6850_sound_control;
	84	UINT8 m6850_sound_input;
	85	UINT8 m6850_sound_output;
	86
	87	/* noise generator states */
	88	UINT32 noise_position[6];
	89	const device_config *cem_device[6];
	90
	91	/* game-specific states */
	92	UINT8 nstocker_bits;
	93	UINT8 spiker_expand_color;
	94	UINT8 spiker_expand_bgcolor;
	95	UINT8 spiker_expand_bits;
	96	UINT8 grudge_steering_result;
	97	UINT8 grudge_last_steering[3];
	98
	99	/* video data */
	100	UINT8 videoram[256 * 256];
	101	UINT8 *sprite_data;
	102	UINT32 sprite_mask;
	103	UINT8 *sprite_bank[2];
	104
	105	UINT8 palettebank_vis;
	106	};
	107
	108
21	109	/*----------- defined in machine/balsente.c -----------*/
22	110
23		extern UINT8 balsente_shooter;
24		extern UINT8 balsente_adc_shift;
25		extern UINT16 *shrike_shared;
26		extern UINT16 *shrike_io;
	111	TIMER_DEVICE_CALLBACK( balsente_interrupt_timer );
27	112
	113	MACHINE_START( balsente );
28	114	MACHINE_RESET( balsente );
29	115
30	116	void balsente_noise_gen(const device_config *device, int count, short *buffer);
r6740	r6741
47	133	READ8_HANDLER( balsente_adc_data_r );
48	134	WRITE8_HANDLER( balsente_adc_select_w );
49	135
	136	TIMER_DEVICE_CALLBACK( balsente_counter_callback );
	137
50	138	READ8_HANDLER( balsente_counter_8253_r );
51	139	WRITE8_HANDLER( balsente_counter_8253_w );
52	140
	141	TIMER_DEVICE_CALLBACK( balsente_clock_counter_0_ff );
	142
53	143	READ8_HANDLER( balsente_counter_state_r );
54	144	WRITE8_HANDLER( balsente_counter_control_w );
55	145
r6740	r6741
68	158	READ16_HANDLER( shrike_io_68k_r );
69	159	WRITE16_HANDLER( shrike_io_68k_w );
70	160
	161
71	162	/*----------- defined in video/balsente.c -----------*/
72	163
73	164	VIDEO_START( balsente );

src/mame/includes/psikyo4.h

r0	r6741
	1	/*************************************************************************
	2
	3	Psikyo PS6807 (PS4)
	4
	5	*************************************************************************/
	6
	7	#define MASTER_CLOCK 57272700   // main oscillator frequency
	8
	9
	10	typedef struct _psikyo4_state psikyo4_state;
	11	struct _psikyo4_state
	12	{
	13	/* memory pointers */
	14	UINT32 *       vidregs;
	15	UINT32 *       paletteram;
	16	UINT32 *       ram;
	17	UINT32 *       io_select;
	18	UINT32 *       bgpen_1;
	19	UINT32 *       bgpen_2;
	20	UINT32 *       spriteram;
	21	size_t         spriteram_size;
	22
	23	/* video-related */
	24	double         oldbrt1, oldbrt2;
	25
	26	/* misc */
	27	UINT32         sample_offs;   // only used if ROMTEST = 1
	28
	29	/* devices */
	30	const device_config *maincpu;
	31	};
	32
	33
	34	/*----------- defined in video/psikyo4.c -----------*/
	35
	36	VIDEO_START( psikyo4 );
	37	VIDEO_UPDATE( psikyo4 );

src/mame/includes/djboy.h

r0	r6741
	1	/*************************************************************************
	2
	3	DJ Boy
	4
	5	*************************************************************************/
	6
	7	#define PROT_OUTPUT_BUFFER_SIZE 8
	8
	9	typedef struct _djboy_state djboy_state;
	10	struct _djboy_state
	11	{
	12	/* memory pointers */
	13	UINT8 *    videoram;
	14	UINT8 *    paletteram;
	15
	16	/* video-related */
	17	tilemap    *background;
	18	UINT8      videoreg, scrollx, scrolly;
	19
	20	/* Kaneko BEAST state */
	21	int        prot_busy_count;
	22	UINT8      prot_output_buffer[PROT_OUTPUT_BUFFER_SIZE];
	23	int        prot_available_data_count;
	24	int        prot_offs;       /* internal state */
	25	UINT8      prot_ram[0x80];    /* internal RAM */
	26	UINT8      prot_param[8];
	27	int        coin;
	28	int        complete;
	29	int        lives[2];
	30	int        addr;
	31	int        bankxor;
	32	int        mDjBoyState;
	33	int        prot_mode;
	34
	35	/* devices */
	36	const device_config *maincpu;
	37	const device_config *cpu1;
	38	const device_config *cpu2;
	39	const device_config *pandora;
	40	};
	41
	42
	43	// mDjBoyState
	44	enum
	45	{
	46	eDJBOY_ATTRACT_HIGHSCORE = 0,
	47	eDJBOY_ATTRACT_TITLE,
	48	eDJBOY_ATTRACT_GAMEPLAY,
	49	eDJBOY_PRESS_P1_START,
	50	eDJBOY_PRESS_P1_OR_P2_START,
	51	eDJBOY_ACTIVE_GAMEPLAY
	52	};
	53
	54	// prot_mode
	55	enum
	56	{
	57	ePROT_NORMAL = 0,
	58	ePROT_WRITE_BYTES,
	59	ePROT_WRITE_BYTE,
	60	ePROT_READ_BYTES,
	61	ePROT_WAIT_DSW1_WRITEBACK,
	62	ePROT_WAIT_DSW2_WRITEBACK,
	63	ePROT_STORE_PARAM
	64	};
	65
	66	/*----------- defined in video/djboy.c -----------*/
	67
	68	WRITE8_HANDLER( djboy_scrollx_w );
	69	WRITE8_HANDLER( djboy_scrolly_w );
	70	WRITE8_HANDLER( djboy_videoram_w );
	71	WRITE8_HANDLER( djboy_paletteram_w );
	72
	73	VIDEO_START( djboy );
	74	VIDEO_UPDATE( djboy );
	75	VIDEO_EOF( djboy );

src/mame/includes/malzak.h

r0	r6741
	1	/*************************************************************************
	2
	3	Malzak
	4
	5	*************************************************************************/
	6
	7
	8	typedef struct _malzak_state malzak_state;
	9	struct _malzak_state
	10	{
	11	/* misc */
	12	//  int playfield_x[256];
	13	//  int playfield_y[256];
	14	int playfield_code[256];
	15	int malzak_x;
	16	int malzak_y;
	17	int collision_counter;
	18
	19	/* devices */
	20	const device_config *s2636_0;
	21	const device_config *s2636_1;
	22	const device_config *saa5050;
	23	};
	24
	25
	26	/*----------- defined in video/malzak.c -----------*/
	27
	28	WRITE8_HANDLER( malzak_playfield_w );
	29
	30	VIDEO_UPDATE( malzak );

src/mame/includes/vertigo.h

r6740	r6741
6	6
7	7	/*----------- defined in machine/vertigo.c -----------*/
8	8
	9	void vertigo_update_irq(const device_config *device);
	10
9	11	extern const struct pit8253_config vertigo_pit8254_config;
10	12
11	13	READ16_HANDLER( vertigo_io_convert );
r6740	r6741
17	19	WRITE16_HANDLER( vertigo_wsot_w );
18	20
19	21	INTERRUPT_GEN( vertigo_interrupt );
	22	MACHINE_START( vertigo );
20	23	MACHINE_RESET( vertigo );
21	24
22	25	/*----------- defined in video/vertigo.c -----------*/
r6740	r6741
24	27	extern UINT16 *vertigo_vectorram;
25	28
26	29	void vertigo_vproc_init(running_machine *machine);
	30	void vertigo_vproc_reset(running_machine *machine);
27	31	void vertigo_vproc(int cycles, int irq4);
28	32

src/mame/includes/f1gp.h

r6740	r6741
1		/*----------- defined in video/f1gp.c -----------*/
2	1
3		extern UINT16 *f1gp_spr1vram,*f1gp_spr2vram,*f1gp_spr1cgram,*f1gp_spr2cgram;
4		extern UINT16 *f1gp_fgvideoram,*f1gp_rozvideoram;
5		extern UINT16 *f1gp2_sprcgram,*f1gp2_spritelist;
6		extern UINT16 *f1gpb_rozregs, *f1gpb_fgregs;
7		extern size_t f1gp_spr1cgram_size,f1gp_spr2cgram_size;
	2	typedef struct _f1gp_state f1gp_state;
	3	struct _f1gp_state
	4	{
	5	/* memory pointers */
	6	UINT16 *  sharedram;
	7	UINT16 *  spr1vram;
	8	UINT16 *  spr2vram;
	9	UINT16 *  spr1cgram;
	10	UINT16 *  spr2cgram;
	11	UINT16 *  fgvideoram;
	12	UINT16 *  rozvideoram;
	13	UINT16 *  sprcgram;
	14	UINT16 *  spritelist;
	15	UINT16 *  spriteram;
	16	UINT16 *  fgregs;
	17	UINT16 *  rozregs;
	18	UINT16 *  zoomdata;
	19	//      UINT16 *  paletteram;    // currently this uses generic palette handling
	20	size_t    spr1cgram_size, spr2cgram_size;
	21	size_t    spriteram_size;
8	22
	23	/* video-related */
	24	tilemap   *fg_tilemap, *roz_tilemap;
	25	int       roz_bank, flipscreen, gfxctrl;
	26	int       scroll[2];
9	27
10		VIDEO_START( f1gp );
11		VIDEO_START( f1gpb );
12		VIDEO_START( f1gp2 );
13		VIDEO_UPDATE( f1gp );
14		VIDEO_UPDATE( f1gpb );
15		VIDEO_UPDATE( f1gp2 );
	28	/* misc */
	29	int       pending_command;
16	30
	31	/* devices */
	32	const device_config *audiocpu;
	33	const device_config *k053936;
	34	};
	35
	36	/*----------- defined in video/f1gp.c -----------*/
	37
17	38	READ16_HANDLER( f1gp_zoomdata_r );
18	39	WRITE16_HANDLER( f1gp_zoomdata_w );
19	40	READ16_HANDLER( f1gp_rozvideoram_r );
r6740	r6741
22	43	WRITE16_HANDLER( f1gp_fgscroll_w );
23	44	WRITE16_HANDLER( f1gp_gfxctrl_w );
24	45	WRITE16_HANDLER( f1gp2_gfxctrl_w );
	46
	47	VIDEO_START( f1gp );
	48	VIDEO_START( f1gpb );
	49	VIDEO_START( f1gp2 );
	50	VIDEO_UPDATE( f1gp );
	51	VIDEO_UPDATE( f1gpb );
	52	VIDEO_UPDATE( f1gp2 );

src/mame/includes/snk6502.h

r6740	r6741
41	41
42	42	/*----------- defined in video/snk6502.c -----------*/
43	43
	44	extern UINT8 *snk6502_videoram;
	45	extern UINT8 *snk6502_colorram;
44	46	extern UINT8 *snk6502_videoram2;
45	47	extern UINT8 *snk6502_charram;
46	48

src/mame/includes/foodf.h

r6740	r6741
16	16	double         bweights[2];
17	17	UINT8          playfield_flip;
18	18
19		emu_timer *      scanline_timer;
20	19	UINT8          whichport;
21	20	};
22	21

src/mame/includes/harddriv.h

r6740	r6741
77	77	UINT8                duart_read_data[16];
78	78	UINT8                duart_write_data[16];
79	79	UINT8                duart_output_port;
80		emu_timer *            duart_timer;
	80	const device_config *   duart_timer;
81	81
82	82	UINT8                last_gsp_shiftreg;
83	83
r6740	r6741
193	193	READ16_HANDLER( hd68k_zram_r );
194	194	WRITE16_HANDLER( hd68k_zram_w );
195	195
	196	TIMER_DEVICE_CALLBACK( hd68k_duart_callback );
196	197	READ16_HANDLER( hd68k_duart_r );
197	198	WRITE16_HANDLER( hd68k_duart_w );
198	199

src/mame/includes/88games.h

r0	r6741
	1	/*************************************************************************
	2
	3	88 Games
	4
	5	*************************************************************************/
	6
	7	typedef struct __88games_state _88games_state;
	8	struct __88games_state
	9	{
	10	/* memory pointers */
	11	UINT8 *      ram;
	12	UINT8 *      banked_rom;
	13	//  UINT8 *      paletteram_1000;   // this currently uses generic palette handling
	14	//  UINT8 *      nvram; // this currently uses generic nvram handling
	15
	16	/* video-related */
	17	int          k88games_priority;
	18	int          layer_colorbase[3], sprite_colorbase, zoom_colorbase;
	19	int          videobank;
	20	int          zoomreadroms;
	21	int          speech_chip;
	22
	23	/* devices */
	24	const device_config *audiocpu;
	25	const device_config *k052109;
	26	const device_config *k051960;
	27	const device_config *k051316;
	28	const device_config *upd_1;
	29	const device_config *upd_2;
	30	};
	31
	32
	33	/*----------- defined in video/88games.c -----------*/
	34
	35	void _88games_sprite_callback(running_machine *machine, int *code, int *color, int *priority, int *shadow);
	36	void _88games_tile_callback(running_machine *machine, int layer, int bank, int *code, int *color, int *flags, int *priority);
	37	void _88games_zoom_callback(running_machine *machine, int *code, int *color, int *flags);
	38
	39	VIDEO_UPDATE( 88games );

src/mame/includes/bladestl.h

r0	r6741
	1	/*************************************************************************
	2
	3	Blades of Steel
	4
	5	*************************************************************************/
	6
	7	typedef struct _bladestl_state bladestl_state;
	8	struct _bladestl_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    paletteram;
	12
	13	/* video-related */
	14	int        spritebank;
	15	int        layer_colorbase[2];
	16
	17	/* misc */
	18	int        last_track[4];
	19
	20	/* devices */
	21	const device_config *audiocpu;
	22	const device_config *k007342;
	23	const device_config *k007420;
	24	};
	25
	26
	27
	28	/*----------- defined in video/bladestl.c -----------*/
	29
	30	PALETTE_INIT( bladestl );
	31
	32	VIDEO_UPDATE( bladestl );
	33
	34	void bladestl_tile_callback(running_machine *machine, int layer, int bank, int *code, int *color, int *flags);
	35	void bladestl_sprite_callback(running_machine *machine, int *code, int *color);

src/mame/includes/xmen.h

r6740	r6741
9	9
10	10	/*----------- defined in video/xmen.c -----------*/
11	11
12		VIDEO_START( xmen );
	12	void xmen_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	13	void xmen_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
	14
13	15	VIDEO_START( xmen6p );
14	16	VIDEO_UPDATE( xmen );
15	17	VIDEO_UPDATE( xmen6p );

src/mame/includes/simpsons.h

r6740	r6741
2	2
3	3	extern int simpsons_firq_enabled;
4	4
5		READ8_HANDLER( simpsons_eeprom_r );
6	5	WRITE8_HANDLER( simpsons_eeprom_w );
7	6	WRITE8_HANDLER( simpsons_coin_counter_w );
8	7	READ8_HANDLER( simpsons_sound_interrupt_r );
9	8	READ8_DEVICE_HANDLER( simpsons_sound_r );
10	9	MACHINE_RESET( simpsons );
11		NVRAM_HANDLER( simpsons );
12	10
13	11	/*----------- defined in video/simpsons.c -----------*/
14	12
15	13	extern UINT8 *simpsons_xtraram;
16	14
17	15	void simpsons_video_banking( running_machine *machine, int select );
18		VIDEO_START( simpsons );
19	16	VIDEO_UPDATE( simpsons );
	17
	18	extern void simpsons_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	19	extern void simpsons_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);

src/mame/includes/model1.h

r6740	r6741
19	19
20	20	ADDRESS_MAP_EXTERN( model1_vr_tgp_map, 32 );
21	21
	22	MACHINE_START( model1 );
	23
22	24	void model1_vr_tgp_reset( running_machine *machine );
23	25	void model1_tgp_reset(running_machine *machine, int swa);
24	26

src/mame/includes/mw8080bw.h

r6740	r6741
4	4
5	5	****************************************************************************/
6	6
	7	#include "sound/discrete.h"
	8	#include "sound/sn76477.h"
	9	#include "sound/samples.h"
7	10
8		#define MW8080BW_MASTER_CLOCK            (19968000)
9		#define MW8080BW_CPU_CLOCK               (MW8080BW_MASTER_CLOCK / 10)
10		#define MW8080BW_PIXEL_CLOCK            (MW8080BW_MASTER_CLOCK / 4)
11		#define MW8080BW_HTOTAL                  (0x140)
12		#define MW8080BW_HBEND                  (0x000)
13		#define MW8080BW_HBSTART               (0x100)
14		#define MW8080BW_VTOTAL                  (0x106)
15		#define MW8080BW_VBEND                  (0x000)
16		#define MW8080BW_VBSTART               (0x0e0)
17		#define MW8080BW_VCOUNTER_START_NO_VBLANK   (0x020)
18		#define MW8080BW_VCOUNTER_START_VBLANK      (0x0da)
19		#define MW8080BW_INT_TRIGGER_COUNT_1      (0x080)
20		#define MW8080BW_INT_TRIGGER_VBLANK_1      (0)
21		#define MW8080BW_INT_TRIGGER_COUNT_2      MW8080BW_VCOUNTER_START_VBLANK
22		#define MW8080BW_INT_TRIGGER_VBLANK_2      (1)
23	11
	12	#define MW8080BW_MASTER_CLOCK             (19968000)
	13	#define MW8080BW_CPU_CLOCK                (MW8080BW_MASTER_CLOCK / 10)
	14	#define MW8080BW_PIXEL_CLOCK              (MW8080BW_MASTER_CLOCK / 4)
	15	#define MW8080BW_HTOTAL                   (0x140)
	16	#define MW8080BW_HBEND                    (0x000)
	17	#define MW8080BW_HBSTART                  (0x100)
	18	#define MW8080BW_VTOTAL                   (0x106)
	19	#define MW8080BW_VBEND                    (0x000)
	20	#define MW8080BW_VBSTART                  (0x0e0)
	21	#define MW8080BW_VCOUNTER_START_NO_VBLANK (0x020)
	22	#define MW8080BW_VCOUNTER_START_VBLANK    (0x0da)
	23	#define MW8080BW_INT_TRIGGER_COUNT_1      (0x080)
	24	#define MW8080BW_INT_TRIGGER_VBLANK_1     (0)
	25	#define MW8080BW_INT_TRIGGER_COUNT_2      MW8080BW_VCOUNTER_START_VBLANK
	26	#define MW8080BW_INT_TRIGGER_VBLANK_2     (1)
	27
24	28	/* +4 is added to HBSTART because the hardware displays that many pixels after
25	29	setting HBLANK */
26		#define MW8080BW_HPIXCOUNT      (MW8080BW_HBSTART + 4)
	30	#define MW8080BW_HPIXCOUNT                (MW8080BW_HBSTART + 4)
27	31
28	32
	33	typedef struct _mw8080bw_state mw8080bw_state;
	34	struct _mw8080bw_state
	35	{
	36	/* memory pointers */
	37	UINT8 *     main_ram;
	38	UINT8 *     colorram;
	39	size_t      main_ram_size;
	40
	41	/* sound-related */
	42	UINT8       port_1_last;
	43	UINT8       port_2_last;
	44	UINT8       port_1_last_extra;
	45	UINT8       port_2_last_extra;
	46	UINT8       port_3_last_extra;
	47
	48	/* misc game specific */
	49	emu_timer   *schaser_effect_555_timer;
	50	attotime    schaser_effect_555_time_remain;
	51	INT32       schaser_effect_555_time_remain_savable;
	52	int         schaser_effect_555_is_low;
	53	int         schaser_explosion;
	54	int         schaser_last_effect;
	55	UINT8       sfl_int;
	56	UINT8       polaris_cloud_speed;
	57	UINT8       polaris_cloud_pos;
	58	UINT8       schaser_background_disable;
	59	UINT8       schaser_background_select;
	60	UINT8       c8080bw_flip_screen;
	61	UINT8       color_map;
	62	UINT8       screen_red;
	63
	64
	65	UINT16      phantom2_cloud_counter;
	66	UINT8       invaders_flip_screen;
	67	UINT8       rev_shift_res;
	68	UINT8       maze_tone_timing_state;   /* output of IC C1, pin 5 */
	69	UINT8       desertgun_controller_select;
	70	UINT8       clowns_controller_select;
	71
	72	UINT8       spcenctr_strobe_state;
	73	UINT8       spcenctr_trench_width;
	74	UINT8       spcenctr_trench_center;
	75	UINT8       spcenctr_trench_slope[16];  /* 16x4 bit RAM */
	76
	77	/* timer */
	78	emu_timer   *interrupt_timer;
	79
	80	/* devices */
	81	const device_config *maincpu;
	82	const device_config *mb14241;
	83	const device_config *samples;
	84	const device_config *samples1;
	85	const device_config *samples2;
	86	const device_config *speaker;
	87	const device_config *sn1;
	88	const device_config *sn2;
	89	const device_config *sn;
	90	const device_config *discrete;
	91	};
	92
	93
29	94	/*----------- defined in drivers/mw8080bw.c -----------*/
30	95
31		extern UINT8 *mw8080bw_ram;
32		extern size_t mw8080bw_ram_size;
33
34	96	MACHINE_DRIVER_EXTERN( mw8080bw_root );
35	97	MACHINE_DRIVER_EXTERN( invaders );
36	98	extern const char layout_invaders[];
r6740	r6741
44	106
45	107	#define DESERTGU_GUN_X_PORT_TAG         ("GUNX")
46	108	#define DESERTGU_GUN_Y_PORT_TAG         ("GUNY")
47		void desertgun_set_controller_select(UINT8 data);
48	109
49		void clowns_set_controller_select(UINT8 data);
50
51		void spcenctr_set_strobe_state(UINT8 data);
52		UINT8 spcenctr_get_trench_width(void);
53		UINT8 spcenctr_get_trench_center(void);
54		UINT8 spcenctr_get_trench_slope(UINT8 addr);
55
56		UINT16 phantom2_get_cloud_counter(void);
57		void phantom2_set_cloud_counter(UINT16 data);
58
59	110	#define INVADERS_CAB_TYPE_PORT_TAG      ("CAB")
60	111	#define INVADERS_P1_CONTROL_PORT_TAG   ("CONTP1")
61	112	#define INVADERS_P2_CONTROL_PORT_TAG   ("CONTP2")
62	113
	114	/* for games in 8080bw.c */
	115	#define CABINET_PORT_TAG                  "CAB"
	116
	117
63	118	CUSTOM_INPUT( invaders_in1_control_r );
64	119	CUSTOM_INPUT( invaders_in2_control_r );
65		UINT8 invaders_is_flip_screen(void);
66		void invaders_set_flip_screen(UINT8 data);
	120
67	121	int invaders_is_cabinet_cocktail(running_machine *machine);
68	122
69	123	#define BLUESHRK_SPEAR_PORT_TAG         ("IN0")
r6740	r6741
184	238	WRITE8_DEVICE_HANDLER( invad2ct_audio_3_w );
185	239	WRITE8_DEVICE_HANDLER( invad2ct_audio_4_w );
186	240
	241	/*----------- defined in audio/8080bw.c -----------*/
187	242
	243	MACHINE_START( extra_8080bw_sh );
188	244
	245	WRITE8_HANDLER( invadpt2_sh_port_1_w );
	246	WRITE8_HANDLER( invadpt2_sh_port_2_w );
	247
	248	WRITE8_HANDLER( spcewars_sh_port_w );
	249
	250	WRITE8_HANDLER( lrescue_sh_port_1_w );
	251	WRITE8_HANDLER( lrescue_sh_port_2_w );
	252	extern const samples_interface lrescue_samples_interface;
	253
	254	WRITE8_HANDLER( cosmo_sh_port_2_w );
	255
	256	WRITE8_HANDLER( ballbomb_sh_port_1_w );
	257	WRITE8_HANDLER( ballbomb_sh_port_2_w );
	258
	259	WRITE8_HANDLER( indianbt_sh_port_1_w );
	260	WRITE8_HANDLER( indianbt_sh_port_2_w );
	261	WRITE8_DEVICE_HANDLER( indianbt_sh_port_3_w );
	262	DISCRETE_SOUND_EXTERN( indianbt );
	263
	264	WRITE8_DEVICE_HANDLER( polaris_sh_port_1_w );
	265	WRITE8_DEVICE_HANDLER( polaris_sh_port_2_w );
	266	WRITE8_DEVICE_HANDLER( polaris_sh_port_3_w );
	267	DISCRETE_SOUND_EXTERN( polaris );
	268
	269	MACHINE_RESET( schaser_sh );
	270	MACHINE_START( schaser_sh );
	271	WRITE8_HANDLER( schaser_sh_port_1_w );
	272	WRITE8_HANDLER( schaser_sh_port_2_w );
	273	extern const sn76477_interface schaser_sn76477_interface;
	274	DISCRETE_SOUND_EXTERN( schaser );
	275
	276	WRITE8_HANDLER( rollingc_sh_port_w );
	277
	278	WRITE8_HANDLER( invrvnge_sh_port_w );
	279
	280	WRITE8_HANDLER( lupin3_sh_port_1_w );
	281	WRITE8_HANDLER( lupin3_sh_port_2_w );
	282
	283	WRITE8_HANDLER( schasrcv_sh_port_1_w );
	284	WRITE8_HANDLER( schasrcv_sh_port_2_w );
	285
	286	WRITE8_HANDLER( yosakdon_sh_port_1_w );
	287	WRITE8_HANDLER( yosakdon_sh_port_2_w );
	288
	289	WRITE8_HANDLER( shuttlei_sh_port_1_w );
	290	WRITE8_HANDLER( shuttlei_sh_port_2_w );
	291
	292
189	293	/*----------- defined in video/mw8080bw.c -----------*/
190	294
191	295	VIDEO_UPDATE( mw8080bw );
r6740	r6741
196	300	VIDEO_EOF( phantom2 );
197	301
198	302	VIDEO_UPDATE( invaders );
	303
	304
	305	/*----------- defined in video/8080bw.c -----------*/
	306
	307	MACHINE_START( extra_8080bw_vh );
	308
	309	VIDEO_UPDATE( invadpt2 );
	310	VIDEO_UPDATE( ballbomb );
	311	VIDEO_UPDATE( schaser );
	312	VIDEO_UPDATE( schasrcv );
	313	VIDEO_UPDATE( rollingc );
	314	VIDEO_UPDATE( polaris );
	315	VIDEO_UPDATE( lupin3 );
	316	VIDEO_UPDATE( cosmo );
	317	VIDEO_UPDATE( indianbt );
	318	VIDEO_UPDATE( shuttlei );
	319	VIDEO_UPDATE( sflush );
	320

src/mame/includes/cps1.h

r6740	r6741
1	1	#ifndef _CPS1_H_
2	2	#define _CPS1_H_
3	3
	4	struct gfx_range
	5	{
	6	// start and end are as passed by the game (shift adjusted to be all
	7	// in the same scale a 8x8 tiles): they don't necessarily match the
	8	// position in ROM.
	9	int type;
	10	int start;
	11	int end;
	12	int bank;
	13	};
	14
	15	struct CPS1config
	16	{
	17	const char *name;             /* game driver name */
	18
	19	/* Some games interrogate a couple of registers on bootup. */
	20	/* These are CPS1 board B self test checks. They wander from game to */
	21	/* game. */
	22	int cpsb_addr;        /* CPS board B test register address */
	23	int cpsb_value;       /* CPS board B test register expected value */
	24
	25	/* some games use as a protection check the ability to do 16-bit multiplies */
	26	/* with a 32-bit result, by writing the factors to two ports and reading the */
	27	/* result from two other ports. */
	28	/* It looks like this feature was introduced with 3wonders (CPSB ID = 08xx) */
	29	int mult_factor1;
	30	int mult_factor2;
	31	int mult_result_lo;
	32	int mult_result_hi;
	33
	34	/* unknown registers which might be related to the multiply protection */
	35	int unknown1;
	36	int unknown2;
	37	int unknown3;
	38
	39	int layer_control;
	40	int priority[4];
	41	int palette_control;
	42
	43	/* ideally, the layer enable masks should consist of only one bit, */
	44	/* but in many cases it is unknown which bit is which. */
	45	int layer_enable_mask[5];
	46
	47	/* these depend on the B-board model and PAL */
	48	int bank_sizes[4];
	49	const struct gfx_range *bank_mapper;
	50
	51	/* some C-boards have additional I/O for extra buttons/extra players */
	52	int in2_addr;
	53	int in3_addr;
	54	int out2_addr;
	55
	56	int bootleg_kludge;
	57	};
	58
	59
	60	typedef struct _cps_state cps_state;
	61	struct _cps_state
	62	{
	63	/* memory pointers */
	64	// cps1
	65	UINT16 *     gfxram;
	66	UINT16 *     cps_a_regs;
	67	UINT16 *     cps_b_regs;
	68	UINT16 *     scroll1;
	69	UINT16 *     scroll2;
	70	UINT16 *     scroll3;
	71	UINT16 *     obj;
	72	UINT16 *     other;
	73	UINT16 *     buffered_obj;
	74	UINT8  *     qsound_sharedram1;
	75	UINT8  *     qsound_sharedram2;
	76	size_t       gfxram_size;
	77	// cps2
	78	UINT16 *     objram1;
	79	UINT16 *     objram2;
	80	UINT16 *     output;
	81	UINT16 *     cps2_buffered_obj;
	82	size_t       output_size;
	83	// game-specific
	84	UINT16 *     gigamn2_dummyqsound_ram;
	85
	86	/* video-related */
	87	tilemap      *bg_tilemap[3];
	88	int          scanline1;
	89	int          scanline2;
	90	int          scancalls;
	91	int          scancount;
	92
	93	int          scroll1x, scroll1y;
	94	int          scroll2x, scroll2y;
	95	int          scroll3x, scroll3y;
	96
	97	int          stars_enabled[2];      /* Layer enabled [Y/N] */
	98	int          stars1x, stars1y, stars2x, stars2y;
	99	int          last_sprite_offset;      /* Offset of the last sprite */
	100	int          cps2_last_sprite_offset;   /* Offset of the last sprite */
	101	int          pri_ctrl;            /* Sprite layer priorities */
	102	int          objram_bank;
	103
	104	/* misc */
	105	int          dial[2];      // forgottn
	106	int          readpaddle;   // pzloop2
	107	int          cps2networkpresent;
	108
	109	/* fcrash sound hw */
	110	int          sample_buffer1, sample_buffer2;
	111	int          sample_select1, sample_select2;
	112
	113	/* video config (never changed after VIDEO_START) */
	114	const struct CPS1config *game_config;
	115	int          scroll_size;
	116	int          obj_size;
	117	int          cps2_obj_size;
	118	int          other_size;
	119	int          palette_align;
	120	int          palette_size;
	121	int          stars_rom_size;
	122	UINT8        empty_tile8x8[8*8];
	123	UINT8        empty_tile[32*32/2];
	124	int          cps_version;
	125
	126	/* devices */
	127	const device_config *maincpu;
	128	const device_config *audiocpu;
	129	const device_config *msm_1;   // fcrash
	130	const device_config *msm_2;   // fcrash
	131	};
	132
4	133	/*----------- defined in drivers/cps1.c -----------*/
5	134
6		ADDRESS_MAP_EXTERN(qsound_sub_map, 8);
	135	ADDRESS_MAP_EXTERN( qsound_sub_map, 8 );
7	136
8	137	READ16_HANDLER( qsound_sharedram1_r );
9	138	WRITE16_HANDLER( qsound_sharedram1_w );
r6740	r6741
15	144	GFXDECODE_EXTERN( cps1 );
16	145
17	146
	147	/*----------- defined in video/cps1.c -----------*/
	148
	149	WRITE16_HANDLER( cps1_cps_a_w );
	150	WRITE16_HANDLER( cps1_cps_b_w );
	151	READ16_HANDLER( cps1_cps_b_r );
	152	WRITE16_HANDLER( cps1_gfxram_w );
	153
	154	DRIVER_INIT( cps1 );
	155	DRIVER_INIT( cps2_video );
	156
	157	WRITE16_HANDLER( cps2_objram_bank_w );
	158	READ16_HANDLER( cps2_objram1_r );
	159	READ16_HANDLER( cps2_objram2_r );
	160	WRITE16_HANDLER( cps2_objram1_w );
	161	WRITE16_HANDLER( cps2_objram2_w );
	162
	163	VIDEO_START( cps1 );
	164	VIDEO_START( cps2 );
	165	VIDEO_UPDATE( cps1 );
	166	VIDEO_EOF( cps1 );
	167
	168	void cps1_get_video_base(running_machine *machine);
	169	void cps2_set_sprite_priorities(running_machine *machine);
	170	void cps2_objram_latch(running_machine *machine);
	171
	172
	173	/*************************************
	174	*  Encryption
	175	*************************************/
	176
18	177	/*----------- defined in machine/cps2crpt.c -----------*/
19	178
20	179	DRIVER_INIT( cps2crpt );
r6740	r6741
39	198	void punisher_decode(running_machine *machine);
40	199	void slammast_decode(running_machine *machine);
41	200
42
43		/*----------- defined in video/cps1.c -----------*/
44
45		extern int cps1_scanline1;
46		extern int cps1_scanline2;
47		extern int cps1_scancalls;
48
49		extern UINT16 *cps1_gfxram;     /* Video RAM */
50		extern UINT16 *cps1_cps_a_regs;
51		extern UINT16 *cps1_cps_b_regs;
52		extern size_t cps1_gfxram_size;
53
54		extern UINT16 *cps1_other;
55		extern tilemap *cps1_bg_tilemap[3];
56
57		extern int cps1_scroll1x, cps1_scroll1y;
58		extern int cps1_scroll2x, cps1_scroll2y;
59		extern int cps1_scroll3x, cps1_scroll3y;
60
61		extern UINT16 *cps2_objram1,*cps2_objram2;
62		extern UINT16 *cps2_output;
63		extern size_t cps2_output_size;
64
65		WRITE16_HANDLER( cps1_cps_a_w );
66		WRITE16_HANDLER( cps1_cps_b_w );
67		READ16_HANDLER( cps1_cps_b_r );
68
69		DRIVER_INIT( cps1 );
70		DRIVER_INIT( cps2_video );
71
72		void cps1_get_video_base(void);
73
74		WRITE16_HANDLER( cps1_gfxram_w );
75
76		VIDEO_START( cps1 );
77		VIDEO_START( cps2 );
78
79		WRITE16_HANDLER( cps2_objram_bank_w );
80		READ16_HANDLER( cps2_objram1_r );
81		READ16_HANDLER( cps2_objram2_r );
82		WRITE16_HANDLER( cps2_objram1_w );
83		WRITE16_HANDLER( cps2_objram2_w );
84
85		VIDEO_UPDATE( cps1 );
86		VIDEO_EOF( cps1 );
87
88		void cps2_set_sprite_priorities(void);
89		void cps2_objram_latch(void);
90
91	201	#endif

src/mame/includes/suprslam.h

r0	r6741
	1	/*************************************************************************
	2
	3	Super Slams
	4
	5	*************************************************************************/
	6
	7	typedef struct _suprslam_state suprslam_state;
	8	struct _suprslam_state
	9	{
	10	/* memory pointers */
	11	UINT16 *    screen_videoram;
	12	UINT16 *    bg_videoram;
	13	UINT16 *    sp_videoram;
	14	UINT16 *    spriteram;
	15	//  UINT16 *    paletteram; // this currently uses generic palette handling
	16
	17	/* video-related */
	18	tilemap     *screen_tilemap, *bg_tilemap;
	19	UINT16      screen_bank, bg_bank;
	20	UINT16      *spr_ctrl;
	21	UINT16      *screen_vregs;
	22
	23	/* misc */
	24	int         pending_command;
	25
	26	/* devices */
	27	const device_config *audiocpu;
	28	const device_config *k053936;
	29	};
	30
	31
	32	/*----------- defined in video/suprslam.c -----------*/
	33
	34	WRITE16_HANDLER( suprslam_screen_videoram_w );
	35	WRITE16_HANDLER( suprslam_bg_videoram_w );
	36	WRITE16_HANDLER( suprslam_bank_w );
	37
	38	VIDEO_START( suprslam );
	39	VIDEO_UPDATE( suprslam );

src/mame/includes/slapfght.h

r6740	r6741
72	72
73	73	extern UINT8 *slapfight_videoram;
74	74	extern UINT8 *slapfight_colorram;
75		extern size_t slapfight_videoram_size;
	75	extern UINT8 *slapfight_fixvideoram;
	76	extern UINT8 *slapfight_fixcolorram;
76	77	extern UINT8 *slapfight_scrollx_lo,*slapfight_scrollx_hi,*slapfight_scrolly;
77	78
78	79	VIDEO_UPDATE( slapfight );

src/mame/includes/psikyosh.h

r6740	r6741
1		/*----------- defined in drivers/psikyosh.c -----------*/
2	1
3	2	#define MASTER_CLOCK 57272700   // main oscillator frequency
4	3
5		extern UINT32 *psikyosh_bgram, *psikyosh_zoomram, *psikyosh_vidregs;
6
7		/*----------- defined in video/psikyosh.c -----------*/
8
9		VIDEO_START( psikyosh );
10		VIDEO_UPDATE( psikyosh );
11		VIDEO_EOF( psikyosh );
12
13		enum { eeprom_0=0, eeprom_DEFAULT=1, eeprom_DARAKU, eeprom_S1945III, eeprom_DRAGNBLZ, eeprom_GNBARICH, eeprom_USER1, eeprom_MJGTASTE };
14
15	4	/* Psikyo PS6406B */
16		#define FLIPSCREEN (((psikyosh_vidregs[3] & 0x0000c000) == 0x0000c000) ? 1:0)
17		#define DISPLAY_DISABLE (((psikyosh_vidregs[2] & 0x0000000f) == 0x00000006) ? 1:0)
18		#define BG_LARGE(n) (((psikyosh_vidregs[7] << (4*n)) & 0x00001000 ) ? 1:0)
19		#define BG_DEPTH_8BPP(n) (((psikyosh_vidregs[7] << (4*n)) & 0x00004000 ) ? 1:0)
20		#define BG_LAYER_ENABLE(n) (((psikyosh_vidregs[7] << (4*n)) & 0x00008000 ) ? 1:0)
	5	#define FLIPSCREEN (((state->vidregs[3] & 0x0000c000) == 0x0000c000) ? 1:0)
	6	#define DISPLAY_DISABLE (((state->vidregs[2] & 0x0000000f) == 0x00000006) ? 1:0)
	7	#define BG_LARGE(n) (((state->vidregs[7] << (4*n)) & 0x00001000 ) ? 1:0)
	8	#define BG_DEPTH_8BPP(n) (((state->vidregs[7] << (4*n)) & 0x00004000 ) ? 1:0)
	9	#define BG_LAYER_ENABLE(n) (((state->vidregs[7] << (4*n)) & 0x00008000 ) ? 1:0)
21	10
22		#define BG_TYPE(n) (((psikyosh_vidregs[6] << (8*n)) & 0x7f000000 ) >> 24)
	11	#define BG_TYPE(n) (((state->vidregs[6] << (8*n)) & 0x7f000000 ) >> 24)
23	12	#define BG_NORMAL      0x0a
24	13	#define BG_NORMAL_ALT  0x0b /* Same as above but with different location for scroll/priority reg */
25	14
r6740	r6741
27	16	#define BG_SCROLL_0C   0x0c /* 224 v/h scroll values in bank 0x0c; Used in daraku, for text */
28	17	#define BG_SCROLL_0D   0x0d /* 224 v/h scroll values in bank 0x0d; Used in daraku, for alternate characters of text */
29	18	#define BG_SCROLL_ZOOM 0x0e /* 224 v/h scroll values in bank 0x0e-0x1f; Used in s1945ii, s1945iii */
	19
	20	enum { eeprom_0=0, eeprom_DEFAULT=1, eeprom_DARAKU, eeprom_S1945III, eeprom_DRAGNBLZ, eeprom_GNBARICH, eeprom_USER1, eeprom_MJGTASTE };
	21
	22
	23	typedef struct _psikyosh_state psikyosh_state;
	24	struct _psikyosh_state
	25	{
	26	/* memory pointers */
	27	UINT32 *       bgram;
	28	UINT32 *       zoomram;
	29	UINT32 *       vidregs;
	30	UINT32 *       ram;
	31	UINT32 *       paletteram;
	32	//  UINT32 *       spriteram;   // currently this uses generic buffered spriteram
	33	//  size_t         spriteram_size;
	34
	35	/* video-related */
	36	bitmap_t       *zoom_bitmap, *z_bitmap;
	37	//  UINT8          alphatable[256];
	38
	39	/* misc */
	40	UINT32         sample_offs;   // only used if ROMTEST = 1
	41
	42	/* devices */
	43	const device_config *maincpu;
	44	};
	45
	46	/*----------- defined in video/psikyosh.c -----------*/
	47
	48	VIDEO_START( psikyosh );
	49	VIDEO_UPDATE( psikyosh );
	50	VIDEO_EOF( psikyosh );

src/mame/includes/wiping.h

r6740	r6741
10	10
11	11	/*----------- defined in video/wiping.c -----------*/
12	12
	13	extern UINT8 *wiping_videoram;
	14	extern UINT8 *wiping_colorram;
	15
13	16	WRITE8_HANDLER( wiping_flipscreen_w );
14	17	PALETTE_INIT( wiping );
15	18	VIDEO_UPDATE( wiping );

src/mame/includes/irobot.h

r6740	r6741
14	14	DRIVER_INIT( irobot );
15	15	MACHINE_RESET( irobot );
16	16
	17	TIMER_DEVICE_CALLBACK( irobot_irvg_done_callback );
	18	TIMER_DEVICE_CALLBACK( irobot_irmb_done_callback );
	19
17	20	READ8_HANDLER( irobot_status_r );
18	21	WRITE8_HANDLER( irobot_statwr_w );
19	22	WRITE8_HANDLER( irobot_out0_w );

src/mame/includes/neogeo.h

r6740	r6741
5	5	*************************************************************************/
6	6
7	7
8		#define NEOGEO_MASTER_CLOCK               (24000000)
9		#define NEOGEO_MAIN_CPU_CLOCK            (NEOGEO_MASTER_CLOCK / 2)
10		#define NEOGEO_AUDIO_CPU_CLOCK            (NEOGEO_MASTER_CLOCK / 6)
11		#define NEOGEO_YM2610_CLOCK               (NEOGEO_MASTER_CLOCK / 3)
12		#define NEOGEO_PIXEL_CLOCK               (NEOGEO_MASTER_CLOCK / 4)
13		#define NEOGEO_HTOTAL                  (0x180)
14		#define NEOGEO_HBEND                  (0x01e)   /* this should really be 29.5 */
15		#define NEOGEO_HBSTART                  (0x15e) /* this should really be 349.5 */
16		#define NEOGEO_VTOTAL                  (0x108)
17		#define NEOGEO_VBEND                  (0x010)
18		#define NEOGEO_VBSTART                  (0x0f0)
19		#define NEOGEO_VSSTART                  (0x000)
20		#define NEOGEO_VBLANK_RELOAD_HPOS         (0x11f)
	8	#define NEOGEO_MASTER_CLOCK                     (24000000)
	9	#define NEOGEO_MAIN_CPU_CLOCK                   (NEOGEO_MASTER_CLOCK / 2)
	10	#define NEOGEO_AUDIO_CPU_CLOCK                  (NEOGEO_MASTER_CLOCK / 6)
	11	#define NEOGEO_YM2610_CLOCK                     (NEOGEO_MASTER_CLOCK / 3)
	12	#define NEOGEO_PIXEL_CLOCK                      (NEOGEO_MASTER_CLOCK / 4)
	13	#define NEOGEO_HTOTAL                           (0x180)
	14	#define NEOGEO_HBEND                            (0x01e)   /* this should really be 29.5 */
	15	#define NEOGEO_HBSTART                          (0x15e)   /* this should really be 349.5 */
	16	#define NEOGEO_VTOTAL                           (0x108)
	17	#define NEOGEO_VBEND                            (0x010)
	18	#define NEOGEO_VBSTART                          (0x0f0)
	19	#define NEOGEO_VSSTART                          (0x000)
	20	#define NEOGEO_VBLANK_RELOAD_HPOS               (0x11f)
21	21
22		#define NEOGEO_BANK_AUDIO_CPU_CART_BANK      "audio_cart"
	22	#define NEOGEO_BANK_AUDIO_CPU_CART_BANK         "audio_cart"
23	23	/* do not use 2, 3 and 4 */
24		#define NEOGEO_BANK_CARTRIDGE            "cartridge"
25		#define NEOGEO_BANK_BIOS               "bios"
26		#define NEOGEO_BANK_VECTORS               "vectors"
27		#define NEOGEO_BANK_AUDIO_CPU_MAIN_BANK      "audio_main"
	24	#define NEOGEO_BANK_CARTRIDGE                   "cartridge"
	25	#define NEOGEO_BANK_BIOS                        "bios"
	26	#define NEOGEO_BANK_VECTORS                     "vectors"
	27	#define NEOGEO_BANK_AUDIO_CPU_MAIN_BANK         "audio_main"
28	28
29	29
	30
	31	typedef struct _neogeo_state neogeo_state;
	32	struct _neogeo_state
	33	{
	34	/* memory pointers */
	35	//  UINT8      *memcard_data;   // this currently uses generic handlers
	36	//  UINT16     *save_ram;       // this currently uses generic handlers
	37
	38	/* video-related */
	39	UINT8      *sprite_gfx;
	40	UINT32     sprite_gfx_address_mask;
	41	UINT16     *videoram;
	42	UINT16     *palettes[2]; /* 0x100*16 2 byte palette entries */
	43	pen_t      *pens;
	44	UINT8      palette_bank;
	45	UINT8      screen_dark;
	46	UINT16     videoram_read_buffer;
	47	UINT16     videoram_modulo;
	48	UINT16     videoram_offset;
	49
	50	UINT8      fixed_layer_source;
	51
	52	UINT8      auto_animation_speed;
	53	UINT8      auto_animation_disabled;
	54	UINT8      auto_animation_counter;
	55	UINT8      auto_animation_frame_counter;
	56
	57	const UINT8 *region_zoomy;
	58
	59
	60	/* palette */
	61	double     rgb_weights_normal[5];
	62	double     rgb_weights_normal_bit15[5];
	63	double     rgb_weights_dark[5];
	64	double     rgb_weights_dark_bit15[5];
	65
	66	/* timers */
	67	emu_timer  *display_position_interrupt_timer;
	68	emu_timer  *display_position_vblank_timer;
	69	emu_timer  *vblank_interrupt_timer;
	70	emu_timer  *auto_animation_timer;
	71	emu_timer  *sprite_line_timer;
	72	UINT8      display_position_interrupt_control;
	73	UINT32     display_counter;
	74	UINT32     vblank_interrupt_pending;
	75	UINT32     display_position_interrupt_pending;
	76	UINT32     irq3_pending;
	77
	78	/* misc */
	79	UINT8      controller_select;
	80
	81	UINT32     main_cpu_bank_address;
	82	UINT8      main_cpu_vector_table_source;
	83
	84	UINT8      audio_result;
	85	UINT8      audio_cpu_banks[4];
	86	UINT8      audio_cpu_rom_source;
	87	UINT8      audio_cpu_rom_source_last;
	88
	89	UINT8      save_ram_unlocked;
	90
	91	UINT8      output_data;
	92	UINT8      output_latch;
	93	UINT8      el_value;
	94	UINT8      led1_value;
	95	UINT8      led2_value;
	96	UINT8      recurse;
	97
	98	/* protection */
	99	UINT32     fatfury2_prot_data;
	100	UINT16     neogeo_rng;
	101	UINT16     *pvc_cartridge_ram;
	102	int        fixed_layer_bank_type;
	103
	104	/* devices */
	105	const device_config *maincpu;
	106	const device_config *audiocpu;
	107	const device_config *upd4990a;
	108	};
	109
	110
30	111	/*----------- defined in drivers/neogeo.c -----------*/
31	112
32		void neogeo_set_display_position_interrupt_control(UINT16 data);
	113	void neogeo_set_display_position_interrupt_control(running_machine *machine, UINT16 data);
33	114	void neogeo_set_display_counter_msb(const address_space *space, UINT16 data);
34	115	void neogeo_set_display_counter_lsb(const address_space *space, UINT16 data);
35	116	void neogeo_acknowledge_interrupt(running_machine *machine, UINT16 data);
r6740	r6741
71	152
72	153	/*----------- defined in machine/neoprot.c -----------*/
73	154
74		void neogeo_reset_rng(void);
	155	void neogeo_reset_rng(running_machine *machine);
75	156	void fatfury2_install_protection(running_machine *machine);
76	157	void mslugx_install_protection(running_machine *machine);
77	158	void kof99_install_protection(running_machine *machine);
r6740	r6741
124	205
125	206	/*----------- defined in video/neogeo.c -----------*/
126	207
127		extern int neogeo_fixed_layer_bank_type;
128
129	208	VIDEO_START( neogeo );
130	209	VIDEO_RESET( neogeo );
131	210	VIDEO_UPDATE( neogeo );
r6740	r6741
138	217	READ16_HANDLER( neogeo_paletteram_r );
139	218	WRITE16_HANDLER( neogeo_paletteram_w );
140	219
141		void neogeo_set_fixed_layer_source(UINT8 data);
	220	void neogeo_set_fixed_layer_source(running_machine *machine, UINT8 data);
142	221
143		UINT8 neogeo_get_auto_animation_counter(void);
	222	UINT8 neogeo_get_auto_animation_counter(running_machine *machine);

src/mame/includes/tmnt.h

r6740	r6741
13	13	WRITE16_HANDLER( tmnt_priority_w );
14	14	READ16_HANDLER( glfgreat_ball_r );
15	15	READ16_HANDLER( prmrsocr_rom_r );
16		VIDEO_START( sunsetbl );
17	16	VIDEO_START( cuebrick );
18	17	VIDEO_START( mia );
19	18	VIDEO_START( tmnt );
20		VIDEO_START( punkshot );
21	19	VIDEO_START( lgtnfght );
22		VIDEO_START( blswhstl );
23	20	VIDEO_START( glfgreat );
24		VIDEO_START( thndrx2 );
25	21	VIDEO_START( prmrsocr );
26	22	VIDEO_UPDATE( mia );
27	23	VIDEO_UPDATE( tmnt );
r6740	r6741
31	27	VIDEO_UPDATE( tmnt2 );
32	28	VIDEO_UPDATE( thndrx2 );
33	29	VIDEO_EOF( blswhstl );
34

src/mame/includes/combatsc.h

r0	r6741
	1	/*************************************************************************
	2
	3	Combat School
	4
	5	*************************************************************************/
	6
	7	typedef struct _combatsc_state combatsc_state;
	8	struct _combatsc_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    videoram;
	12	UINT8 *    scrollram;
	13	UINT8 *    io_ram;
	14	UINT8 *    paletteram;
	15	UINT8 *    spriteram[2];
	16
	17	/* video-related */
	18	tilemap *bg_tilemap[2], *textlayer;
	19	UINT8 scrollram0[0x40];
	20	UINT8 scrollram1[0x40];
	21	int priority;
	22
	23	int  vreg;
	24	int  bank_select; /* 0x00..0x1f */
	25	int  video_circuit; /* 0 or 1 */
	26	UINT8 *page[2];
	27
	28	/* misc */
	29	UINT8 pos[4],sign[4];
	30	int prot[2];
	31	int boost;
	32	emu_timer *interleave_timer;
	33
	34
	35	/* devices */
	36	const device_config *audiocpu;
	37	const device_config *k007121_1;
	38	const device_config *k007121_2;
	39	};
	40
	41
	42	/*----------- defined in video/combatsc.c -----------*/
	43
	44	READ8_HANDLER( combatsc_video_r );
	45	WRITE8_HANDLER( combatsc_video_w );
	46
	47	WRITE8_HANDLER( combatsc_pf_control_w );
	48	READ8_HANDLER( combatsc_scrollram_r );
	49	WRITE8_HANDLER( combatsc_scrollram_w );
	50
	51	PALETTE_INIT( combatsc );
	52	PALETTE_INIT( combatscb );
	53	VIDEO_START( combatsc );
	54	VIDEO_START( combatscb );
	55	VIDEO_UPDATE( combatscb );
	56	VIDEO_UPDATE( combatsc );

src/mame/includes/rockrage.h

r0	r6741
	1	/*************************************************************************
	2
	3	Rock'n Rage
	4
	5	*************************************************************************/
	6
	7	typedef struct _rockrage_state rockrage_state;
	8	struct _rockrage_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    paletteram;
	12
	13	/* video-related */
	14	int        layer_colorbase[2];
	15	int        vreg;
	16
	17	/* devices */
	18	const device_config *audiocpu;
	19	const device_config *k007342;
	20	const device_config *k007420;
	21	};
	22
	23
	24	/*----------- defined in video/rockrage.c -----------*/
	25
	26	WRITE8_HANDLER( rockrage_vreg_w );
	27
	28	VIDEO_UPDATE( rockrage );
	29	PALETTE_INIT( rockrage );
	30
	31	void rockrage_tile_callback(running_machine *machine, int layer, int bank, int *code, int *color, int *flags);
	32	void rockrage_sprite_callback(running_machine *machine, int *code, int *color);

src/mame/includes/psikyo.h

r0	r6741
	1	/*************************************************************************
	2
	3	Psikyo Games
	4
	5	*************************************************************************/
	6
	7	typedef struct _psikyo_state psikyo_state;
	8	struct _psikyo_state
	9	{
	10	/* memory pointers */
	11	UINT32 *       vram_0;
	12	UINT32 *       vram_1;
	13	UINT32 *       vregs;
	14	UINT32 *       spritebuf1;
	15	UINT32 *       spritebuf2;
	16	UINT32 *       bootleg_spritebuffer;
	17	//      UINT32 *       paletteram;  // currently this uses generic palette handling
	18	//  UINT32 *       spriteram;   // currently this uses generic buffered spriteram
	19	//  size_t         spriteram_size;
	20
	21	/* video-related */
	22	tilemap        *tilemap_0_size0, *tilemap_0_size1, *tilemap_0_size2, *tilemap_0_size3;
	23	tilemap        *tilemap_1_size0, *tilemap_1_size1, *tilemap_1_size2, *tilemap_1_size3;
	24	int            tilemap_0_bank, tilemap_1_bank;
	25	int            ka302c_banking;
	26
	27	/* misc */
	28	UINT8          soundlatch;
	29	int            z80_nmi, mcu_status;
	30
	31	/* devices */
	32	const device_config *audiocpu;
	33
	34	/* game-specific */
	35	// 1945 MCU
	36	UINT8          s1945_mcu_direction, s1945_mcu_latch1, s1945_mcu_latch2, s1945_mcu_inlatch, s1945_mcu_index;
	37	UINT8          s1945_mcu_latching, s1945_mcu_mode, s1945_mcu_control, s1945_mcu_bctrl;
	38	const UINT8    *s1945_mcu_table;
	39	};
	40
	41
	42	/*----------- defined in video/psikyo.c -----------*/
	43
	44	void psikyo_switch_banks(running_machine *machine, int tmap, int bank);
	45
	46	WRITE32_HANDLER( psikyo_vram_0_w );
	47	WRITE32_HANDLER( psikyo_vram_1_w );
	48
	49	VIDEO_START( sngkace );
	50	VIDEO_START( psikyo );
	51	VIDEO_UPDATE( psikyo );
	52	VIDEO_UPDATE( psikyo_bootleg );
	53	VIDEO_EOF( psikyo );

src/mame/includes/pgm.h

r6740	r6741
1		/*----------- defined in drivers/pgm.c -----------*/
2	1
3		extern UINT16 *pgm_mainram, *pgm_bg_videoram, *pgm_tx_videoram, *pgm_videoregs, *pgm_rowscrollram;
	2	typedef struct _pgm_state pgm_state;
	3	struct _pgm_state
	4	{
	5	/* memory pointers */
	6	//  UINT16 *      mainram;  // currently this is also used by nvram handler
	7	UINT16 *      bg_videoram;
	8	UINT16 *      tx_videoram;
	9	UINT16 *      videoregs;
	10	UINT16 *      rowscrollram;
	11	UINT16 *      videoram;
	12	UINT8  *      z80_mainram;
	13	UINT32 *      arm7_shareram;
	14	UINT32 *      svg_shareram[2];   //for 5585G MACHINE
	15	UINT16 *      sharedprotram;      // killbld & olds
	16	UINT8  *      sprite_a_region;
	17	size_t        sprite_a_region_size;
	18	UINT16 *      spritebufferram; // buffered spriteram
	19	//  UINT16 *      paletteram;    // currently this uses generic palette handling
4	20
5		extern UINT8 *pgm_sprite_a_region;
6		extern size_t   pgm_sprite_a_region_allocate;
	21	/* video-related */
	22	tilemap       *bg_tilemap, *tx_tilemap;
	23	UINT16        *sprite_temp_render;
	24	bitmap_t      *tmppgmbitmap;
7	25
	26	/* misc */
	27	// kov2
	28	UINT32        kov2_latchdata_68k_w;
	29	UINT32        kov2_latchdata_arm_w;
	30	// kovsh
	31	UINT16        kovsh_highlatch_arm_w, kovsh_lowlatch_arm_w;
	32	UINT16        kovsh_highlatch_68k_w, kovsh_lowlatch_68k_w;
	33	UINT32        kovsh_counter;
	34	// svg
	35	int           svg_ram_sel;
	36	// killbld & olds
	37	int           kb_cmd;
	38	int           kb_reg;
	39	int           kb_ptr;
	40	UINT32        kb_regs[0x10];
	41	UINT16        olds_bs, olds_cmd3;
	42	// pstars
	43	UINT16        pstars_key;
	44	UINT16        pstars_int[2];
	45	UINT32        pstars_regs[16];
	46	UINT32        pstars_val;
	47	UINT16        pstar_e7, pstar_b1, pstar_ce;
	48	UINT16        pstar_ram[3];
	49	// ASIC 3 (oriental legends protection)
	50	UINT8         asic3_reg, asic3_latch[3], asic3_x, asic3_y, asic3_z, asic3_h1, asic3_h2;
	51	UINT16        asic3_hold;
	52	// ASIC28
	53	UINT16        asic28_key;
	54	UINT16        asic28_regs[10];
	55	UINT16        asic_params[256];
	56	UINT16        asic28_rcnt;
	57	UINT32        eoregs[16];
8	58
	59	/* calendar */
	60	UINT8        cal_val, cal_mask, cal_com, cal_cnt;
	61	mame_system_time systime;
	62
	63	/* devices */
	64	const device_config *soundcpu;
	65	const device_config *prot;
	66	const device_config *ics;
	67	};
	68
	69	extern UINT16 *pgm_mainram;   // used by nvram handler, we cannot move it to driver data struct
	70
9	71	/*----------- defined in machine/pgmcrypt.c -----------*/
10	72
11
12	73	void pgm_kov_decrypt(running_machine *machine);
13	74	void pgm_kovsh_decrypt(running_machine *machine);
14	75	void pgm_kov2_decrypt(running_machine *machine);
r6740	r6741
31	92
32	93	/*----------- defined in machine/pgmprot.c -----------*/
33	94
34		READ16_HANDLER (PSTARS_protram_r);
35		READ16_HANDLER ( PSTARS_r16 );
36		WRITE16_HANDLER( PSTARS_w16 );
	95	READ16_HANDLER( pstars_protram_r );
	96	READ16_HANDLER( pstars_r );
	97	WRITE16_HANDLER( pstars_w );
37	98
38	99	READ16_HANDLER( pgm_asic3_r );
39	100	WRITE16_HANDLER( pgm_asic3_w );
40	101	WRITE16_HANDLER( pgm_asic3_reg_w );
41	102
42		READ16_HANDLER (sango_protram_r);
43		READ16_HANDLER (ASIC28_r16);
44		WRITE16_HANDLER (ASIC28_w16);
	103	READ16_HANDLER( sango_protram_r );
	104	READ16_HANDLER( asic28_r );
	105	WRITE16_HANDLER( asic28_w );
45	106
46		READ16_HANDLER (dw2_d80000_r );
	107	READ16_HANDLER( dw2_d80000_r );
47	108
48	109
49	110	/*----------- defined in video/pgm.c -----------*/
50	111
51
52	112	WRITE16_HANDLER( pgm_tx_videoram_w );
53	113	WRITE16_HANDLER( pgm_bg_videoram_w );
	114
54	115	VIDEO_START( pgm );
55	116	VIDEO_EOF( pgm );
56	117	VIDEO_UPDATE( pgm );

src/mame/includes/gameplan.h

r6740	r6741
42	42	const device_config *audiocpu;
43	43	const device_config *riot;
44	44	const device_config *via_0;
	45	const device_config *via_1;
	46	const device_config *via_2;
45	47	};
46	48
47	49

src/mame/includes/hng64.h

r6740	r6741
7	7
8	8	extern int hng64_mcu_type;
9	9
	10	void hng64_command3d(running_machine* machine, const UINT16* packet);
	11

src/mame/includes/cbasebal.h

r0	r6741
	1	/*************************************************************************
	2
	3	Capcom Baseball
	4
	5	*************************************************************************/
	6
	7	typedef struct _cbasebal_state cbasebal_state;
	8	struct _cbasebal_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    spriteram;
	12	//  UINT8 *    paletteram;    // currently this uses generic palette handling
	13	size_t     spriteram_size;
	14
	15	/* video-related */
	16	tilemap    *fg_tilemap, *bg_tilemap;
	17	UINT8      *textram, *scrollram;
	18	UINT8      scroll_x[2], scroll_y[2];
	19	int        tilebank, spritebank;
	20	int        text_on, bg_on, obj_on;
	21	int        flipscreen;
	22
	23	/* misc */
	24	UINT8      rambank;
	25	};
	26
	27	/*----------- defined in video/cbasebal.c -----------*/
	28
	29	WRITE8_HANDLER( cbasebal_textram_w );
	30	READ8_HANDLER( cbasebal_textram_r );
	31	WRITE8_HANDLER( cbasebal_scrollram_w );
	32	READ8_HANDLER( cbasebal_scrollram_r );
	33	WRITE8_HANDLER( cbasebal_gfxctrl_w );
	34	WRITE8_HANDLER( cbasebal_scrollx_w );
	35	WRITE8_HANDLER( cbasebal_scrolly_w );
	36
	37	VIDEO_START( cbasebal );
	38	VIDEO_UPDATE( cbasebal );

src/mame/includes/fastlane.h

r0	r6741
	1	/*************************************************************************
	2
	3	Fast Lane
	4
	5	*************************************************************************/
	6
	7	typedef struct _fastlane_state fastlane_state;
	8	struct _fastlane_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    videoram1;
	12	UINT8 *    videoram2;
	13	UINT8 *    paletteram;
	14	UINT8 *    spriteram;
	15	UINT8 *    k007121_regs;
	16
	17	/* video-related */
	18	tilemap    *layer0, *layer1;
	19	rectangle  clip0, clip1;
	20
	21	/* devices */
	22	const device_config *konami2;
	23	const device_config *k007121;
	24	};
	25
	26
	27
	28
	29	/*----------- defined in video/fastlane.c -----------*/
	30
	31	WRITE8_HANDLER( fastlane_vram1_w );
	32	WRITE8_HANDLER( fastlane_vram2_w );
	33
	34	PALETTE_INIT( fastlane );
	35	VIDEO_START( fastlane );
	36	VIDEO_UPDATE( fastlane );

src/mame/includes/beathead.h

r6740	r6741
13	13
14	14	UINT32 *      vram_bulk_latch;
15	15	UINT32 *      palette_select;
	16
	17	UINT32         finescroll;
	18	offs_t         vram_latch_offset;
	19
	20	offs_t         hsyncram_offset;
	21	offs_t         hsyncram_start;
	22	UINT8         hsyncram[0x800];
16	23	};
17	24
18	25

src/mame/includes/timeplt.h

r6740	r6741
17	17	int x, y, color;
18	18	};
19	19
20		#define MAX_STARS 1000
	20	#define JUNGLER_MAX_STARS 1000
21	21
22	22	typedef struct _timeplt_state timeplt_state;
23	23	struct _timeplt_state
r6740	r6741
52	52	int      last_bang;   // jungler
53	53	int      spriteram_base, stars_enable, total_stars;   // jungler
54	54	UINT8    drawmode_table[4];   // jungler
55		struct jungler_star stars[MAX_STARS];   // jungler
	55	struct jungler_star stars[JUNGLER_MAX_STARS];   // jungler
56	56
57	57	/* devices */
58	58	const device_config *maincpu;

src/mame/includes/matmania.h

r6740	r6741
16	16
17	17	/*----------- defined in video/matmania.c -----------*/
18	18
	19	extern UINT8 *matmania_videoram,*matmania_colorram;
	20	extern size_t matmania_videoram_size;
19	21	extern UINT8 *matmania_videoram2,*matmania_colorram2;
20	22	extern size_t matmania_videoram2_size;
21	23	extern UINT8 *matmania_videoram3,*matmania_colorram3;

src/mame/includes/xybots.h

r6740	r6741
11	11	{
12	12	atarigen_state   atarigen;
13	13
14		int          h256;
	14	UINT16          h256;
15	15	};
16	16
17	17

src/mame/includes/crshrace.h

r6740	r6741
	1
	2	typedef struct _crshrace_state crshrace_state;
	3	struct _crshrace_state
	4	{
	5	/* memory pointers */
	6	UINT16 *  videoram1;
	7	UINT16 *  videoram2;
	8	//  UINT16 *  spriteram1;   // currently this uses generic buffered spriteram
	9	//  UINT16 *  spriteram2;   // currently this uses generic buffered spriteram
	10	//      UINT16 *  paletteram;   // currently this uses generic palette handling
	11
	12	/* video-related */
	13	tilemap   *tilemap1, *tilemap2;
	14	int       roz_bank, gfxctrl, flipscreen;
	15
	16	/* misc */
	17	int pending_command;
	18
	19	/* devices */
	20	const device_config *audiocpu;
	21	const device_config *k053936;
	22	};
	23
1	24	/*----------- defined in video/crshrace.c -----------*/
2	25
3		extern UINT16 *crshrace_videoram1,*crshrace_videoram2;
4
5	26	WRITE16_HANDLER( crshrace_videoram1_w );
6	27	WRITE16_HANDLER( crshrace_videoram2_w );
7	28	WRITE16_HANDLER( crshrace_roz_bank_w );

src/mame/includes/galaxold.h

r6740	r6741
98	98
99	99	/*----------- defined in machine/galaxold.c -----------*/
100	100
	101	TIMER_DEVICE_CALLBACK( galaxold_interrupt_timer );
	102
	103	void galaxold_7474_9m_2_callback(const device_config *device);
	104	void galaxold_7474_9m_1_callback(const device_config *device);
	105
101	106	DRIVER_INIT( 4in1 );
102	107	DRIVER_INIT( ladybugg );
103	108
r6740	r6741
167	172	/*----------- defined in audio/scramble.c -----------*/
168	173
169	174	void scramble_sh_init(running_machine *machine);
	175	void scramble_sh_7474_callback(const device_config *device);
170	176
171	177	WRITE8_HANDLER( scramble_filter_w );
172	178	WRITE8_HANDLER( frogger_filter_w );

src/mame/includes/airbustr.h

r0	r6741
	1	/*************************************************************************
	2
	3	Air Buster
	4
	5	*************************************************************************/
	6
	7	typedef struct _airbustr_state airbustr_state;
	8	struct _airbustr_state
	9	{
	10	/* memory pointers */
	11	UINT8 *    videoram;
	12	UINT8 *    videoram2;
	13	UINT8 *    colorram;
	14	UINT8 *    colorram2;
	15	UINT8 *    paletteram;
	16	UINT8 *    devram;
	17
	18	/* video-related */
	19	tilemap    *bg_tilemap, *fg_tilemap;
	20	bitmap_t   *sprites_bitmap;
	21	int        bg_scrollx, bg_scrolly, fg_scrollx, fg_scrolly, highbits;
	22
	23	/* misc */
	24	int        soundlatch_status, soundlatch2_status;
	25	int        master_addr;
	26	int        slave_addr;
	27
	28	/* devices */
	29	const device_config *master;
	30	const device_config *slave;
	31	const device_config *audiocpu;
	32	const device_config *pandora;
	33	};
	34
	35
	36	/*----------- defined in video/airbustr.c -----------*/
	37
	38	WRITE8_HANDLER( airbustr_videoram_w );
	39	WRITE8_HANDLER( airbustr_colorram_w );
	40	WRITE8_HANDLER( airbustr_videoram2_w );
	41	WRITE8_HANDLER( airbustr_colorram2_w );
	42	WRITE8_HANDLER( airbustr_scrollregs_w );
	43
	44	VIDEO_START( airbustr );
	45	VIDEO_UPDATE( airbustr );
	46	VIDEO_EOF( airbustr );

src/mame/includes/atarisy1.h

r6740	r6741
16	16	UINT8          joystick_type;
17	17	UINT8          trackball_type;
18	18
19		emu_timer *      joystick_timer;
	19	const device_config *joystick_timer;
20	20	UINT8          joystick_int;
21	21	UINT8          joystick_int_enable;
22	22	UINT8          joystick_value;
r6740	r6741
29	29	UINT16          playfield_lookup[256];
30	30	UINT8          playfield_tile_bank;
31	31	UINT16          playfield_priority_pens;
32		emu_timer *      yscroll_reset_timer;
	32	const device_config *yscroll_reset_timer;
33	33
34	34	/* INT3 tracking */
35	35	int          next_timer_scanline;
36		emu_timer *      scanline_timer;
37		emu_timer *      int3off_timer;
	36	const device_config *scanline_timer;
	37	const device_config *int3off_timer;
38	38
39	39	/* graphics bank tracking */
40	40	UINT8          bank_gfx[3][8];
r6740	r6741
44	44
45	45	/*----------- defined in video/atarisy1.c -----------*/
46	46
	47	TIMER_DEVICE_CALLBACK( atarisy1_int3_callback );
	48	TIMER_DEVICE_CALLBACK( atarisy1_int3off_callback );
	49	TIMER_DEVICE_CALLBACK( atarisy1_reset_yscroll_callback );
	50
47	51	READ16_HANDLER( atarisy1_int3state_r );
48	52
49	53	WRITE16_HANDLER( atarisy1_spriteram_w );

src/mame/includes/pacman.h

r6740	r6741
6	6
7	7	/*----------- defined in video/pacman.c -----------*/
8	8
	9	extern UINT8 *pacman_videoram;
	10	extern UINT8 *pacman_colorram;
	11
9	12	PALETTE_INIT( pacman );
10	13	VIDEO_START( pacman );
11	14	VIDEO_UPDATE( pacman );
r6740	r6741
58	61
59	62	/*----------- defined in machine/theglobp.c -----------*/
60	63
	64	MACHINE_START( theglobp );
61	65	MACHINE_RESET( theglobp );
62	66	READ8_HANDLER( theglobp_decrypt_rom );
63	67
64	68
65	69	/*----------- defined in machine/acitya.c -------------*/
66	70
	71	MACHINE_START( acitya );
67	72	MACHINE_RESET( acitya );
68	73	READ8_HANDLER( acitya_decrypt_rom );

src/mame/includes/sf.h

r0	r6741
	1	/*************************************************************************
	2
	3	Street Fighter
	4
	5	*************************************************************************/
	6
	7	typedef struct _sf_state sf_state;
	8	struct _sf_state
	9	{
	10	/* memory pointers */
	11	UINT16 *    videoram;
	12	UINT16 *    objectram;
	13	//  UINT16 *    paletteram;    // currently this uses generic palette handling
	14	size_t      videoram_size;
	15
	16	/* video-related */
	17	tilemap     *bg_tilemap, *fg_tilemap, *tx_tilemap;
	18	int         sf_active;
	19	UINT16      bgscroll, fgscroll;
	20
	21	/* devices */
	22	const device_config *maincpu;
	23	const device_config *audiocpu;
	24	};
	25
	26
	27	/*----------- defined in video/sf.c -----------*/
	28
	29	WRITE16_HANDLER( sf_bg_scroll_w );
	30	WRITE16_HANDLER( sf_fg_scroll_w );
	31	WRITE16_HANDLER( sf_videoram_w );
	32	WRITE16_HANDLER( sf_gfxctrl_w );
	33
	34	VIDEO_START( sf );
	35	VIDEO_UPDATE( sf );

src/mame/includes/williams.h

r6740	r6741
41	41	extern const pia6821_interface tshoot_snd_pia_intf;
42	42	extern const pia6821_interface joust2_pia_1_intf;
43	43
	44	/* timer callbacks */
	45	TIMER_DEVICE_CALLBACK( williams_va11_callback );
	46	TIMER_DEVICE_CALLBACK( williams_count240_callback );
	47	TIMER_DEVICE_CALLBACK( williams2_va11_callback );
	48	TIMER_DEVICE_CALLBACK( williams2_endscreen_callback );
	49
44	50	/* initialization */
	51	MACHINE_START( defender );
45	52	MACHINE_RESET( defender );
	53	MACHINE_START( williams );
46	54	MACHINE_RESET( williams );
	55	MACHINE_START( blaster );
47	56	MACHINE_RESET( blaster );
	57	MACHINE_START( williams2 );
48	58	MACHINE_RESET( williams2 );
49	59	MACHINE_START( joust2 );
50	60	MACHINE_RESET( joust2 );

src/mame/includes/bagman.h

r6740	r6741
7	7
8	8	/*----------- defined in video/bagman.c -----------*/
9	9
	10	extern UINT8 *bagman_videoram;
	11	extern UINT8 *bagman_colorram;
10	12	extern UINT8 *bagman_video_enable;
11	13
12	14	WRITE8_HANDLER( bagman_videoram_w );

src/mame/mame.mak

r6740	r6741
76	76	CPUS += SH4
77	77	CPUS += DSP32C
78	78	CPUS += PIC16C5X
	79	CPUS += PIC16C62X
79	80	CPUS += G65816
80	81	CPUS += SPC700
81	82	CPUS += E1
r6740	r6741
181	182	SOUNDS += K051649
182	183	SOUNDS += K053260
183	184	SOUNDS += K054539
	185	SOUNDS += K056800
184	186	SOUNDS += SEGAPCM
185	187	SOUNDS += MULTIPCM
186	188	SOUNDS += SCSP
r6740	r6741
326	328	#-------------------------------------------------
327	329
328	330	$(MAMEOBJ)/shared.a: \
329		$(MACHINE)/mb14241.o \
330	331	$(MACHINE)/nmk112.o \
331	332	$(MACHINE)/pckeybrd.o \
332	333	$(MACHINE)/pcshare.o \
r6740	r6741
845	846	$(DRIVERS)/xmen.o $(VIDEO)/xmen.o \
846	847	$(DRIVERS)/yiear.o $(VIDEO)/yiear.o \
847	848	$(DRIVERS)/zr107.o \
848		$(MACHINE)/konamiic.o $(VIDEO)/konamiic.o \
	849	$(VIDEO)/konamiic.o $(VIDEO)/konicdev.o \
849	850
850	851	$(MAMEOBJ)/maygay.a: \
851	852	$(DRIVERS)/maygay1b.o \

src/mame/video/mitchell.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "sound/okim6295.h"
	9	#include "includes/mitchell.h"
9	10
10
11		/* Globals */
12		size_t pang_videoram_size;
13		UINT8 *pang_videoram;
14		UINT8 *pang_colorram;
15
16		/* Private */
17		static UINT8 *pang_objram;           /* Sprite RAM */
18
19		static tilemap *bg_tilemap;
20		static int flipscreen;
21
22
23
24	11	/***************************************************************************
25	12
26	13	Callbacks for the TileMap code
r6740	r6741
29	16
30	17	static TILE_GET_INFO( get_tile_info )
31	18	{
32		UINT8 attr = pang_colorram[tile_index];
33		int code = pang_videoram[2*tile_index] + (pang_videoram[2*tile_index+1] << 8);
	19	mitchell_state *state = (mitchell_state *)machine->driver_data;
	20	UINT8 attr = state->colorram[tile_index];
	21	int code = state->videoram[2 * tile_index] + (state->videoram[2 * tile_index + 1] << 8);
34	22	SET_TILE_INFO(
35	23	0,
36	24	code,
r6740	r6741
48	36
49	37	VIDEO_START( pang )
50	38	{
51		pang_objram=NULL;
52		machine->generic.paletteram.u8=NULL;
	39	mitchell_state *state = (mitchell_state *)machine->driver_data;
53	40
	41	state->bg_tilemap = tilemap_create(machine, get_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
	42	tilemap_set_transparent_pen(state->bg_tilemap, 15);
54	43
55		bg_tilemap = tilemap_create(machine, get_tile_info,tilemap_scan_rows,8,8,64,32);
	44	/* OBJ RAM */
	45	state->objram = auto_alloc_array_clear(machine, UINT8, state->videoram_size);
56	46
57		tilemap_set_transparent_pen(bg_tilemap,15);
	47	/* Palette RAM */
	48	machine->generic.paletteram.u8 = auto_alloc_array_clear(machine, UINT8, 2 * machine->config->total_colors);
58	49
59		/*
60		OBJ RAM
61		*/
62		pang_objram=auto_alloc_array_clear(machine, UINT8, pang_videoram_size);
63
64		/*
65		Palette RAM
66		*/
67		machine->generic.paletteram.u8 = auto_alloc_array_clear(machine, UINT8, 2*machine->config->total_colors);
	50	state_save_register_global_pointer(machine, state->objram, state->videoram_size);
	51	state_save_register_global_pointer(machine, machine->generic.paletteram.u8, 2 * machine->config->total_colors);
68	52	}
69	53
70	54
r6740	r6741
79	63	OBJ / CHAR RAM HANDLERS (BANK 0 = CHAR, BANK 1=OBJ)
80	64	***************************************************************************/
81	65
82		static int video_bank;
83
84	66	WRITE8_HANDLER( pang_video_bank_w )
85	67	{
	68	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	69
86	70	/* Bank handler (sets base pointers for video write) (doesn't apply to mgakuen) */
87		video_bank = data;
	71	state->video_bank = data;
88	72	}
89	73
90	74	WRITE8_HANDLER( mstworld_video_bank_w )
91	75	{
	76	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	77
92	78	/* Monsters World seems to freak out if more bits are used.. */
93		video_bank = data&1;
	79	state->video_bank = data & 1;
94	80	}
95	81
96	82
97	83	WRITE8_HANDLER( mgakuen_videoram_w )
98	84	{
99		pang_videoram[offset] = data;
100		tilemap_mark_tile_dirty(bg_tilemap,offset/2);
	85	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	86
	87	state->videoram[offset] = data;
	88	tilemap_mark_tile_dirty(state->bg_tilemap, offset / 2);
101	89	}
102	90
103	91	READ8_HANDLER( mgakuen_videoram_r )
104	92	{
105		return pang_videoram[offset];
	93	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	94	return state->videoram[offset];
106	95	}
107	96
108	97	WRITE8_HANDLER( mgakuen_objram_w )
109	98	{
110		pang_objram[offset]=data;
	99	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	100	state->objram[offset] = data;
111	101	}
112	102
113	103	READ8_HANDLER( mgakuen_objram_r )
114	104	{
115		return pang_objram[offset];
	105	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	106	return state->objram[offset];
116	107	}
117	108
118	109	WRITE8_HANDLER( pang_videoram_w )
119	110	{
120		if (video_bank) mgakuen_objram_w(space,offset,data);
121		else mgakuen_videoram_w(space,offset,data);
	111	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	112
	113	if (state->video_bank)
	114	mgakuen_objram_w(space, offset, data);
	115	else
	116	mgakuen_videoram_w(space, offset, data);
122	117	}
123	118
124	119	READ8_HANDLER( pang_videoram_r )
125	120	{
126		if (video_bank) return mgakuen_objram_r(space,offset);
127		else return mgakuen_videoram_r(space,offset);
	121	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	122
	123	if (state->video_bank)
	124	return mgakuen_objram_r(space, offset);
	125	else
	126	return mgakuen_videoram_r(space, offset);
128	127	}
129	128
130	129	/***************************************************************************
r6740	r6741
133	132
134	133	WRITE8_HANDLER( pang_colorram_w )
135	134	{
136		pang_colorram[offset] = data;
137		tilemap_mark_tile_dirty(bg_tilemap,offset);
	135	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	136
	137	state->colorram[offset] = data;
	138	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
138	139	}
139	140
140	141	READ8_HANDLER( pang_colorram_r )
141	142	{
142		return pang_colorram[offset];
	143	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	144	return state->colorram[offset];
143	145	}
144	146
145	147	/***************************************************************************
146	148	PALETTE HANDLERS (COLOURS: BANK 0 = 0x00-0x3f BANK 1=0x40-0xff)
147	149	****************************************************************************/
148	150
149		static int paletteram_bank;
150
151	151	WRITE8_HANDLER( pang_gfxctrl_w )
152	152	{
153		const device_config *oki = devtag_get_device(space->machine, "oki");
	153	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	154
154	155	logerror("PC %04x: pang_gfxctrl_w %02x\n",cpu_get_pc(space->cpu),data);
155	156	{
156	157	#if 0
r6740	r6741
163	164	/* bit 0 is unknown (used, maybe back color enable?) */
164	165
165	166	/* bit 1 is coin counter */
166		coin_counter_w(space->machine, 0,data & 2);
	167	coin_counter_w(space->machine, 0, data & 2);
167	168
168	169	/* bit 2 is flip screen */
169		if (flipscreen != (data & 0x04))
	170	if (state->flipscreen != (data & 0x04))
170	171	{
171		flipscreen = data & 0x04;
172		tilemap_set_flip_all(space->machine,flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	172	state->flipscreen = data & 0x04;
	173	tilemap_set_flip_all(space->machine, state->flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
173	174	}
174	175
175	176	/* bit 3 is unknown (used, e.g. marukin pulses it on the title screen) */
176	177
177	178	/* bit 4 selects OKI M6295 bank */
178		if (oki != NULL && sound_get_type(oki) == SOUND_OKIM6295) okim6295_set_bank_base(oki, (data & 0x10) ? 0x40000 : 0x00000);
	179	if (state->oki != NULL && sound_get_type(state->oki) == SOUND_OKIM6295)
	180	okim6295_set_bank_base(state->oki, (data & 0x10) ? 0x40000 : 0x00000);
179	181
180	182	/* bit 5 is palette RAM bank selector (doesn't apply to mgakuen) */
181		paletteram_bank = data & 0x20;
	183	state->paletteram_bank = data & 0x20;
182	184
183	185	/* bits 6 and 7 are unknown, used in several places. At first I thought */
184	186	/* they were bg and sprites enable, but this screws up spang (screen flickers */
r6740	r6741
188	190
189	191	WRITE8_HANDLER( mstworld_gfxctrl_w )
190	192	{
	193	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	194
191	195	logerror("PC %04x: pang_gfxctrl_w %02x\n",cpu_get_pc(space->cpu),data);
192	196	{
193	197	char baf[40];
r6740	r6741
198	202	/* bit 0 is unknown (used, maybe back color enable?) */
199	203
200	204	/* bit 1 is coin counter */
201		coin_counter_w(space->machine, 0,data & 2);
	205	coin_counter_w(space->machine, 0, data & 2);
202	206
203	207	/* bit 2 is flip screen */
204		if (flipscreen != (data & 0x04))
	208	if (state->flipscreen != (data & 0x04))
205	209	{
206		flipscreen = data & 0x04;
207		tilemap_set_flip_all(space->machine,flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	210	state->flipscreen = data & 0x04;
	211	tilemap_set_flip_all(space->machine, state->flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
208	212	}
209	213
210	214	/* bit 3 is unknown (used, e.g. marukin pulses it on the title screen) */
211	215
212		/* bit 4 selects OKI M6295 bank */
213		//  okim6295_set_bank_base(devtag_get_device(space->machine, "oki"), (data & 0x10) ? 0x40000 : 0x00000);
214		/* not here.. it has its own z80 + sound banking */
	216	/* bit 4 here does not select OKI M6295 bank: mstworld has its own z80 + sound banking */
215	217
216	218	/* bit 5 is palette RAM bank selector (doesn't apply to mgakuen) */
217		paletteram_bank = data & 0x20;
	219	state->paletteram_bank = data & 0x20;
218	220
219	221	/* bits 6 and 7 are unknown, used in several places. At first I thought */
220	222	/* they were bg and sprites enable, but this screws up spang (screen flickers */
r6740	r6741
224	226
225	227	WRITE8_HANDLER( pang_paletteram_w )
226	228	{
227		if (paletteram_bank) paletteram_xxxxRRRRGGGGBBBB_le_w(space,offset + 0x800,data);
228		else paletteram_xxxxRRRRGGGGBBBB_le_w(space,offset,data);
	229	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	230
	231	if (state->paletteram_bank)
	232	paletteram_xxxxRRRRGGGGBBBB_le_w(space, offset + 0x800, data);
	233	else
	234	paletteram_xxxxRRRRGGGGBBBB_le_w(space, offset, data);
229	235	}
230	236
231	237	READ8_HANDLER( pang_paletteram_r )
232	238	{
233		if (paletteram_bank) return space->machine->generic.paletteram.u8[offset + 0x800];
	239	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	240
	241	if (state->paletteram_bank)
	242	return space->machine->generic.paletteram.u8[offset + 0x800];
	243
234	244	return space->machine->generic.paletteram.u8[offset];
235	245	}
236	246
237	247	WRITE8_HANDLER( mgakuen_paletteram_w )
238	248	{
239		paletteram_xxxxRRRRGGGGBBBB_le_w(space,offset,data);
	249	paletteram_xxxxRRRRGGGGBBBB_le_w(space, offset, data);
240	250	}
241	251
242	252	READ8_HANDLER( mgakuen_paletteram_r )
r6740	r6741
252	262
253	263	***************************************************************************/
254	264
255		static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
	265	static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
256	266	{
257		int offs,sx,sy;
	267	mitchell_state *state = (mitchell_state *)machine->driver_data;
	268	int offs, sx, sy;
258	269
259	270	/* the last entry is not a sprite, we skip it otherwise spang shows a bubble */
260	271	/* moving diagonally across the screen */
261		for (offs = 0x1000-0x40;offs >= 0;offs -= 0x20)
	272	for (offs = 0x1000 - 0x40; offs >= 0; offs -= 0x20)
262	273	{
263		int code = pang_objram[offs];
264		int attr = pang_objram[offs+1];
	274	int code = state->objram[offs];
	275	int attr = state->objram[offs + 1];
265	276	int color = attr & 0x0f;
266		sx = pang_objram[offs+3] + ((attr & 0x10) << 4);
267		sy = ((pang_objram[offs+2] + 8) & 0xff) - 8;
	277	sx = state->objram[offs + 3] + ((attr & 0x10) << 4);
	278	sy = ((state->objram[offs + 2] + 8) & 0xff) - 8;
268	279	code += (attr & 0xe0) << 3;
269		if (flipscreen)
	280	if (state->flipscreen)
270	281	{
271	282	sx = 496 - sx;
272	283	sy = 240 - sy;
r6740	r6741
274	285	drawgfx_transpen(bitmap,cliprect,machine->gfx[1],
275	286	code,
276	287	color,
277		flipscreen,flipscreen,
	288	state->flipscreen, state->flipscreen,
278	289	sx,sy,15);
279	290	}
280	291	}
281	292
282	293	VIDEO_UPDATE( pang )
283	294	{
284		bitmap_fill(bitmap,cliprect,0);
285		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
286		draw_sprites(screen->machine, bitmap,cliprect);
	295	mitchell_state *state = (mitchell_state *)screen->machine->driver_data;
	296
	297	bitmap_fill(bitmap, cliprect, 0);
	298	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
	299	draw_sprites(screen->machine, bitmap, cliprect);
287	300	return 0;
288	301	}

src/mame/video/blktiger.c

r6740	r6741
1	1	#include "driver.h"
2		#include "blktiger.h"
	2	#include "includes/blktiger.h"
3	3
4	4
5	5	#define BGRAM_BANK_SIZE 0x1000

src/mame/video/rungun.c

r6740	r6741
8	8	*/
9	9
10	10	#include "driver.h"
11		#include "video/konamiic.h"
	11	#include "video/konicdev.h"
12	12
13	13	static int ttl_gfx_index;
14	14	static tilemap *ttl_tilemap, *rng_936_tilemap;
r6740	r6741
32	32	SET_TILE_INFO(ttl_gfx_index, code, attr, 0);
33	33	}
34	34
35		static void rng_sprite_callback(int *code, int *color, int *priority_mask)
	35	void rng_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask)
36	36	{
37	37	*color = sprite_colorbase | (*color & 0x001f);
38	38	}
r6740	r6741
81	81	8*8*4
82	82	};
83	83
84		K055673_vh_start(machine, "gfx2", 1, -8, 15, rng_sprite_callback);
	84	//  K055673_vh_start(machine, "gfx2", 1, -8, 15, rng_sprite_callback);
85	85
86		K053936_wraparound_enable(0, 0);
87		K053936_set_offset(0, 34, 9);
	86	//  K053936_wraparound_enable(0, 0);
	87	//  K053936_set_offset(0, 34, 9);
88	88
89	89	rng_936_tilemap = tilemap_create(machine, get_rng_936_tile_info, tilemap_scan_rows,  16, 16, 128, 128);
90	90	tilemap_set_transparent_pen(rng_936_tilemap, 0);
r6740	r6741
111	111
112	112	VIDEO_UPDATE(rng)
113	113	{
	114	const device_config *k055673 = devtag_get_device(screen->machine, "k055673");
	115	const device_config *k053936 = devtag_get_device(screen->machine, "k053936");
	116
114	117	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
115	118	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
116	119
117		K053936_0_zoom_draw(bitmap, cliprect, rng_936_tilemap, 0, 0, 1);
	120	k053936_zoom_draw(k053936, bitmap, cliprect, rng_936_tilemap, 0, 0, 1);
118	121
119		K053247_sprites_draw(screen->machine, bitmap, cliprect);
	122	k053247_sprites_draw(k055673, bitmap, cliprect);
120	123
121	124	tilemap_mark_all_tiles_dirty(ttl_tilemap);
122	125	tilemap_draw(bitmap, cliprect, ttl_tilemap, 0, 0);

src/mame/video/eprom.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "eprom.h"
9		#include "thunderj.h"
	8	#include "includes/eprom.h"
	9	#include "includes/thunderj.h"
10	10
11	11
12	12	/*************************************
r6740	r6741
140	140	/* initialize the alphanumerics */
141	141	state->atarigen.alpha_tilemap = tilemap_create(machine, get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
142	142	tilemap_set_transparent_pen(state->atarigen.alpha_tilemap, 0);
	143
	144	/* save states */
	145	state_save_register_global(machine, state->screen_intensity);
	146	state_save_register_global(machine, state->video_disable);
143	147	}
144	148
145	149
r6740	r6741
192	196	/* initialize the alphanumerics */
193	197	state->atarigen.alpha_tilemap = tilemap_create(machine, get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
194	198	tilemap_set_transparent_pen(state->atarigen.alpha_tilemap, 0);
	199
	200	/* save states */
	201	state_save_register_global(machine, state->screen_intensity);
	202	state_save_register_global(machine, state->video_disable);
195	203	}
196	204
197	205

src/mame/video/mystston.c

r6740	r6741
14	14
15	15	#include "driver.h"
16	16	#include "video/resnet.h"
17		#include "mystston.h"
	17	#include "includes/mystston.h"
18	18
19	19
20	20
r6740	r6741
25	25	*************************************/
26	26
27	27	#define PIXEL_CLOCK      (MYSTSTON_MASTER_CLOCK / 2)
28		#define HTOTAL         (0x140)
	28	#define HTOTAL         (0x180)
29	29	#define HBEND         (0x000)
30	30	#define HBSTART         (0x100)
31	31	#define VTOTAL         (0x110)    /* counts from 0x08-0xff, then from 0xe8-0xff */

src/mame/video/midyunit.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "profiler.h"
9	9	#include "cpu/tms34010/tms34010.h"
10		#include "midyunit.h"
	10	#include "includes/midyunit.h"
11	11
12	12
13	13	/* compile-time options */

src/mame/video/ygv608.c

r6740	r6741
30	30	*/
31	31
32	32	#include "driver.h"
33		#include "namcond1.h"   // only while debugging
	33	#include "includes/namcond1.h"   // only while debugging
34	34	#include "video/ygv608.h"
35	35
36	36	#define _ENABLE_SPRITES
r6740	r6741
1357	1357	if( i%16 == 0 )
1358	1358	logerror( "%04X: ", offset );
1359	1359	logerror( "%02X ", data );
1360		ascii[i%16] = ( data > 0x20) ? data : '.' );
	1360	ascii[i%16] = (data > 0x20) ? data : '.';
1361	1361	if( i%16 == 15 )
1362	1362	logerror( "| %-16.16s\n", ascii );
1363	1363	}

src/mame/video/rampart.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "machine/atarigen.h"
9		#include "rampart.h"
	9	#include "includes/rampart.h"
10	10
11	11
12	12

src/mame/video/simpl156.c

r6740	r6741
3	3	*/
4	4
5	5	#include "driver.h"
6		#include "deco16ic.h"
	6	#include "includes/deco16ic.h"
7	7
8	8	/*
9	9

src/mame/video/hcastle.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "video/konamiic.h"
	8	#include "video/konicdev.h"
	9	#include "includes/hcastle.h"
9	10
10		UINT8 *hcastle_pf1_videoram,*hcastle_pf2_videoram;
11		static int gfx_bank;
12	11
13		static tilemap *fg_tilemap,*bg_tilemap;
14		static int pf2_bankbase,pf1_bankbase;
15
16
17	12	PALETTE_INIT( hcastle )
18	13	{
19	14	int chip;
r6740	r6741
48	43
49	44	static void set_pens(running_machine *machine)
50	45	{
	46	hcastle_state *state = (hcastle_state *)machine->driver_data;
51	47	int i;
52	48
53	49	for (i = 0x00; i < 0x100; i += 2)
54	50	{
55		UINT16 data = machine->generic.paletteram.u8[i | 1] | (machine->generic.paletteram.u8[i] << 8);
	51	UINT16 data = state->paletteram[i | 1] | (state->paletteram[i] << 8);
56	52
57	53	rgb_t color = MAKE_RGB(pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
58	54
r6740	r6741
76	72
77	73	static TILE_GET_INFO( get_fg_tile_info )
78	74	{
79		int bit0 = (K007121_ctrlram[0][0x05] >> 0) & 0x03;
80		int bit1 = (K007121_ctrlram[0][0x05] >> 2) & 0x03;
81		int bit2 = (K007121_ctrlram[0][0x05] >> 4) & 0x03;
82		int bit3 = (K007121_ctrlram[0][0x05] >> 6) & 0x03;
83		int attr = hcastle_pf1_videoram[tile_index];
84		int tile = hcastle_pf1_videoram[tile_index + 0x400];
	75	hcastle_state *state = (hcastle_state *)machine->driver_data;
	76	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121_1, 5);
	77	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_1, 6);
	78	int bit0 = (ctrl_5 >> 0) & 0x03;
	79	int bit1 = (ctrl_5 >> 2) & 0x03;
	80	int bit2 = (ctrl_5 >> 4) & 0x03;
	81	int bit3 = (ctrl_5 >> 6) & 0x03;
	82	int attr = state->pf1_videoram[tile_index];
	83	int tile = state->pf1_videoram[tile_index + 0x400];
85	84	int color = attr & 0x7;
86	85	int bank =  ((attr & 0x80) >> 7) |
87		((attr >> (bit0+2)) & 0x02) |
88		((attr >> (bit1+1)) & 0x04) |
89		((attr >> (bit2  )) & 0x08) |
90		((attr >> (bit3-1)) & 0x10);
	86	((attr >> (bit0 + 2)) & 0x02) |
	87	((attr >> (bit1 + 1)) & 0x04) |
	88	((attr >> (bit2    )) & 0x08) |
	89	((attr >> (bit3 - 1)) & 0x10);
91	90
92	91	SET_TILE_INFO(
93	92	0,
94		tile + bank*0x100 + pf1_bankbase,
95		((K007121_ctrlram[0][6]&0x30)*2+16) + color,
	93	tile + bank * 0x100 + state->pf1_bankbase,
	94	((ctrl_6 & 0x30) * 2 + 16) + color,
96	95	0);
97	96	}
98	97
99	98	static TILE_GET_INFO( get_bg_tile_info )
100	99	{
101		int bit0 = (K007121_ctrlram[1][0x05] >> 0) & 0x03;
102		int bit1 = (K007121_ctrlram[1][0x05] >> 2) & 0x03;
103		int bit2 = (K007121_ctrlram[1][0x05] >> 4) & 0x03;
104		int bit3 = (K007121_ctrlram[1][0x05] >> 6) & 0x03;
105		int attr = hcastle_pf2_videoram[tile_index];
106		int tile = hcastle_pf2_videoram[tile_index + 0x400];
	100	hcastle_state *state = (hcastle_state *)machine->driver_data;
	101	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121_2, 5);
	102	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_2, 6);
	103	int bit0 = (ctrl_5 >> 0) & 0x03;
	104	int bit1 = (ctrl_5 >> 2) & 0x03;
	105	int bit2 = (ctrl_5 >> 4) & 0x03;
	106	int bit3 = (ctrl_5 >> 6) & 0x03;
	107	int attr = state->pf2_videoram[tile_index];
	108	int tile = state->pf2_videoram[tile_index + 0x400];
107	109	int color = attr & 0x7;
108	110	int bank =  ((attr & 0x80) >> 7) |
109		((attr >> (bit0+2)) & 0x02) |
110		((attr >> (bit1+1)) & 0x04) |
111		((attr >> (bit2  )) & 0x08) |
112		((attr >> (bit3-1)) & 0x10);
	111	((attr >> (bit0 + 2)) & 0x02) |
	112	((attr >> (bit1 + 1)) & 0x04) |
	113	((attr >> (bit2    )) & 0x08) |
	114	((attr >> (bit3 - 1)) & 0x10);
113	115
114	116	SET_TILE_INFO(
115	117	1,
116		tile + bank*0x100 + pf2_bankbase,
117		((K007121_ctrlram[1][6]&0x30)*2+16) + color,
	118	tile + bank * 0x100 + state->pf2_bankbase,
	119	((ctrl_6 & 0x30) * 2 + 16) + color,
118	120	0);
119	121	}
120	122
r6740	r6741
128	130
129	131	VIDEO_START( hcastle )
130	132	{
131		fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan,8,8,64,32);
132		bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan,     8,8,64,32);
	133	hcastle_state *state = (hcastle_state *)machine->driver_data;
133	134
134		tilemap_set_transparent_pen(fg_tilemap,0);
	135	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan, 8, 8, 64, 32);
	136	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan, 8, 8, 64, 32);
	137
	138	tilemap_set_transparent_pen(state->fg_tilemap, 0);
135	139	}
136	140
137	141
r6740	r6741
144	148
145	149	WRITE8_HANDLER( hcastle_pf1_video_w )
146	150	{
147		hcastle_pf1_videoram[offset] = data;
148		tilemap_mark_tile_dirty(fg_tilemap,offset & 0xbff);
	151	hcastle_state *state = (hcastle_state *)space->machine->driver_data;
	152	state->pf1_videoram[offset] = data;
	153	tilemap_mark_tile_dirty(state->fg_tilemap, offset & 0xbff);
149	154	}
150	155
151	156	WRITE8_HANDLER( hcastle_pf2_video_w )
152	157	{
153		hcastle_pf2_videoram[offset] = data;
154		tilemap_mark_tile_dirty(bg_tilemap,offset & 0xbff);
	158	hcastle_state *state = (hcastle_state *)space->machine->driver_data;
	159	state->pf2_videoram[offset] = data;
	160	tilemap_mark_tile_dirty(state->bg_tilemap, offset & 0xbff);
155	161	}
156	162
157	163	WRITE8_HANDLER( hcastle_gfxbank_w )
158	164	{
159		gfx_bank = data;
	165	hcastle_state *state = (hcastle_state *)space->machine->driver_data;
	166	state->gfx_bank = data;
160	167	}
161	168
162	169	READ8_HANDLER( hcastle_gfxbank_r )
163	170	{
164		return gfx_bank;
	171	hcastle_state *state = (hcastle_state *)space->machine->driver_data;
	172	return state->gfx_bank;
165	173	}
166	174
167	175	WRITE8_HANDLER( hcastle_pf1_control_w )
168	176	{
169		if (offset==3)
	177	hcastle_state *state = (hcastle_state *)space->machine->driver_data;
	178
	179	if (offset == 3)
170	180	{
171		if ((data&0x8)==0)
172		buffer_spriteram(space->machine, space->machine->generic.spriteram.u8+0x800,0x800);
	181	if ((data & 0x8) == 0)
	182	buffer_spriteram(space->machine, space->machine->generic.spriteram.u8 + 0x800, 0x800);
173	183	else
174		buffer_spriteram(space->machine, space->machine->generic.spriteram.u8,0x800);
	184	buffer_spriteram(space->machine, space->machine->generic.spriteram.u8, 0x800);
175	185	}
176	186	else if (offset == 7)
177	187	{
178		tilemap_set_flip(fg_tilemap, (data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	188	tilemap_set_flip(state->fg_tilemap, (data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
179	189	}
180		K007121_ctrl_0_w(space,offset,data);
	190	k007121_ctrl_w(state->k007121_1, offset, data);
181	191	}
182	192
183	193	WRITE8_HANDLER( hcastle_pf2_control_w )
184	194	{
185		if (offset==3)
	195	hcastle_state *state = (hcastle_state *)space->machine->driver_data;
	196
	197	if (offset == 3)
186	198	{
187		if ((data&0x8)==0)
188		buffer_spriteram_2(space->machine,space->machine->generic.spriteram2.u8+0x800,0x800);
	199	if ((data & 0x8) == 0)
	200	buffer_spriteram_2(space->machine, space->machine->generic.spriteram2.u8 + 0x800, 0x800);
189	201	else
190		buffer_spriteram_2(space->machine,space->machine->generic.spriteram2.u8,0x800);
	202	buffer_spriteram_2(space->machine, space->machine->generic.spriteram2.u8, 0x800);
191	203	}
192	204	else if (offset == 7)
193	205	{
194		tilemap_set_flip(bg_tilemap, (data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	206	tilemap_set_flip(state->bg_tilemap, (data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
195	207	}
196		K007121_ctrl_1_w(space,offset,data);
	208	k007121_ctrl_w(state->k007121_2, offset, data);
197	209	}
198	210
199	211	/*****************************************************************************/
200	212
201	213	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT8 *sbank, int bank )
202	214	{
203		int bank_base = (bank == 0) ? 0x4000 * (gfx_bank & 1) : 0;
204		K007121_sprites_draw(bank,bitmap,cliprect,machine->gfx,machine->colortable,sbank,(K007121_ctrlram[bank][6]&0x30)*2,0,bank_base,-1);
	215	hcastle_state *state = (hcastle_state *)machine->driver_data;
	216	const device_config *k007121 = bank ? state->k007121_2 : state->k007121_1;
	217	int base_color = (k007121_ctrlram_r(k007121, 6) & 0x30) * 2;
	218	int bank_base = (bank == 0) ? 0x4000 * (state->gfx_bank & 1) : 0;
	219
	220	k007121_sprites_draw(k007121, bitmap, cliprect, machine->gfx[bank], machine->colortable, sbank, base_color, 0, bank_base, -1);
205	221	}
206	222
207	223	/*****************************************************************************/
208	224
209	225	VIDEO_UPDATE( hcastle )
210	226	{
211		static int old_pf1,old_pf2;
	227	hcastle_state *state = (hcastle_state *)screen->machine->driver_data;
212	228
	229	UINT8 ctrl_1_0 = k007121_ctrlram_r(state->k007121_1, 0);
	230	UINT8 ctrl_1_1 = k007121_ctrlram_r(state->k007121_1, 1);
	231	UINT8 ctrl_1_2 = k007121_ctrlram_r(state->k007121_1, 2);
	232	UINT8 ctrl_1_3 = k007121_ctrlram_r(state->k007121_1, 3);
	233	UINT8 ctrl_2_0 = k007121_ctrlram_r(state->k007121_2, 0);
	234	UINT8 ctrl_2_1 = k007121_ctrlram_r(state->k007121_2, 1);
	235	UINT8 ctrl_2_2 = k007121_ctrlram_r(state->k007121_2, 2);
	236	UINT8 ctrl_2_3 = k007121_ctrlram_r(state->k007121_2, 3);
	237
213	238	set_pens(screen->machine);
214	239
215		pf1_bankbase = 0x0000;
216		pf2_bankbase = 0x4000 * ((gfx_bank & 2) >> 1);
	240	state->pf1_bankbase = 0x0000;
	241	state->pf2_bankbase = 0x4000 * ((state->gfx_bank & 2) >> 1);
217	242
218		if (K007121_ctrlram[0][3] & 0x01) pf1_bankbase += 0x2000;
219		if (K007121_ctrlram[1][3] & 0x01) pf2_bankbase += 0x2000;
	243	if (ctrl_1_3 & 0x01)
	244	state->pf1_bankbase += 0x2000;
	245	if (ctrl_2_3 & 0x01)
	246	state->pf2_bankbase += 0x2000;
220	247
221		if (pf1_bankbase != old_pf1)
222		tilemap_mark_all_tiles_dirty(fg_tilemap);
	248	if (state->pf1_bankbase != state->old_pf1)
	249	tilemap_mark_all_tiles_dirty(state->fg_tilemap);
223	250
224		if (pf2_bankbase != old_pf2)
225		tilemap_mark_all_tiles_dirty(bg_tilemap);
	251	if (state->pf2_bankbase != state->old_pf2)
	252	tilemap_mark_all_tiles_dirty(state->bg_tilemap);
226	253
227		old_pf1 = pf1_bankbase;
228		old_pf2 = pf2_bankbase;
	254	state->old_pf1 = state->pf1_bankbase;
	255	state->old_pf2 = state->pf2_bankbase;
229	256
230		tilemap_set_scrolly(bg_tilemap,0,K007121_ctrlram[1][2]);
231		tilemap_set_scrollx(bg_tilemap,0,((K007121_ctrlram[1][1]<<8)+K007121_ctrlram[1][0]));
232		tilemap_set_scrolly(fg_tilemap,0,K007121_ctrlram[0][2]);
233		tilemap_set_scrollx(fg_tilemap,0,((K007121_ctrlram[0][1]<<8)+K007121_ctrlram[0][0]));
	257	tilemap_set_scrolly(state->bg_tilemap, 0, ctrl_2_2);
	258	tilemap_set_scrollx(state->bg_tilemap, 0, ((ctrl_2_1 << 8) + ctrl_2_0));
	259	tilemap_set_scrolly(state->fg_tilemap, 0, ctrl_1_2);
	260	tilemap_set_scrollx(state->fg_tilemap, 0, ((ctrl_1_1 << 8) + ctrl_1_0));
234	261
235	262	//  /* Sprite priority */
236		//  if (K007121_ctrlram[0][3]&0x20)
237		if ((gfx_bank & 0x04) == 0)
	263	//  if (ctrl_1_3 & 0x20)
	264	if ((state->gfx_bank & 0x04) == 0)
238	265	{
239		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
240		draw_sprites(screen->machine,bitmap,cliprect, screen->machine->generic.buffered_spriteram.u8, 0 );
241		draw_sprites(screen->machine,bitmap,cliprect, screen->machine->generic.buffered_spriteram2.u8, 1 );
242		tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
	266	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
	267	draw_sprites(screen->machine, bitmap, cliprect, screen->machine->generic.buffered_spriteram.u8, 0);
	268	draw_sprites(screen->machine, bitmap, cliprect, screen->machine->generic.buffered_spriteram2.u8, 1);
	269	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
243	270	}
244	271	else
245	272	{
246		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
247		tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
248		draw_sprites(screen->machine,bitmap,cliprect, screen->machine->generic.buffered_spriteram.u8, 0 );
249		draw_sprites(screen->machine,bitmap,cliprect, screen->machine->generic.buffered_spriteram2.u8, 1 );
	273	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
	274	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
	275	draw_sprites(screen->machine, bitmap, cliprect, screen->machine->generic.buffered_spriteram.u8, 0);
	276	draw_sprites(screen->machine, bitmap, cliprect, screen->machine->generic.buffered_spriteram2.u8, 1);
250	277	}
251	278	return 0;
252	279	}

src/mame/video/copsnrob.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "copsnrob.h"
	8	#include "includes/copsnrob.h"
9	9
10	10
11	11	VIDEO_UPDATE( copsnrob )

src/mame/video/artmagic.c

r6740	r6741
8	8	#include "profiler.h"
9	9	#include "cpu/tms34010/tms34010.h"
10	10	#include "video/tlc34076.h"
11		#include "artmagic.h"
	11	#include "includes/artmagic.h"
12	12
13	13
14	14	#define INSTANT_BLIT      1
r6740	r6741
61	61	blitter_base = (UINT16 *)memory_region(machine, "gfx1");
62	62	blitter_mask = memory_region_length(machine, "gfx1")/2 - 1;
63	63
	64	tlc34076_state_save(machine);
64	65	state_save_register_global_array(machine, artmagic_xor);
65	66	state_save_register_global(machine, artmagic_is_stoneball);
66	67	state_save_register_global_array(machine, blitter_data);

src/mame/video/twincobr.c

r6740	r6741
14	14
15	15	#include "driver.h"
16	16	#include "video/mc6845.h"
17		#include "twincobr.h"
	17	#include "includes/twincobr.h"
18	18
19	19
20	20	static STATE_POSTLOAD( twincobr_restore_screen );

src/mame/video/battlnts.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
	3	#include "includes/battlnts.h"
3	4
4		static int spritebank;
5
6		static int layer_colorbase[2];
7
8	5	/***************************************************************************
9	6
10	7	Callback for the K007342
11	8
12	9	***************************************************************************/
13	10
14		static void tile_callback(int layer, int bank, int *code, int *color, int *flags)
	11	void battlnts_tile_callback(running_machine *machine, int layer, int bank, int *code, int *color, int *flags)
15	12	{
	13	battlnts_state *state = (battlnts_state *)machine->driver_data;
	14
16	15	*code |= ((*color & 0x0f) << 9) | ((*color & 0x40) << 2);
17		*color = layer_colorbase[layer];
	16	*color = state->layer_colorbase[layer];
18	17	}
19	18
20	19	/***************************************************************************
r6740	r6741
23	22
24	23	***************************************************************************/
25	24
26		static void sprite_callback(int *code,int *color)
	25	void battlnts_sprite_callback(running_machine *machine, int *code,int *color)
27	26	{
28		*code |= ((*color & 0xc0) << 2) | spritebank;
	27	battlnts_state *state = (battlnts_state *)machine->driver_data;
	28
	29	*code |= ((*color & 0xc0) << 2) | state->spritebank;
29	30	*code = (*code << 2) | ((*color & 0x30) >> 4);
30	31	*color = 0;
31	32	}
32	33
33	34	WRITE8_HANDLER( battlnts_spritebank_w )
34	35	{
35		spritebank = 1024 * (data & 1);
	36	battlnts_state *state = (battlnts_state *)space->machine->driver_data;
	37	state->spritebank = 1024 * (data & 1);
36	38	}
37	39
38	40	/***************************************************************************
39	41
40		Start the video hardware emulation.
	42	Screen Refresh
41	43
42	44	***************************************************************************/
43	45
44		VIDEO_START( battlnts )
	46	VIDEO_UPDATE( battlnts )
45	47	{
46		layer_colorbase[0] = 0;
47		layer_colorbase[1] = 0;
	48	battlnts_state *state = (battlnts_state *)screen->machine->driver_data;
48	49
49		K007342_vh_start(machine,0,tile_callback);
50		K007420_vh_start(machine,1,sprite_callback);
51		}
	50	k007342_tilemap_update(state->k007342);
52	51
53		/***************************************************************************
54
55		Screen Refresh
56
57		***************************************************************************/
58
59		VIDEO_UPDATE( battlnts ){
60
61		K007342_tilemap_update();
62
63		K007342_tilemap_draw( bitmap, cliprect, 0, TILEMAP_DRAW_OPAQUE ,0);
64		K007420_sprites_draw( bitmap, cliprect );
65		K007342_tilemap_draw( bitmap, cliprect, 0, 1 | TILEMAP_DRAW_OPAQUE ,0);
	52	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 0, TILEMAP_DRAW_OPAQUE ,0);
	53	k007420_sprites_draw(state->k007420, bitmap, cliprect, screen->machine->gfx[1]);
	54	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 0, 1 | TILEMAP_DRAW_OPAQUE ,0);
66	55	return 0;
67	56	}

src/mame/video/arabian.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "arabian.h"
	10	#include "includes/arabian.h"
11	11
12	12	/* Constants */
13	13	#define BITMAP_WIDTH      256

src/mame/video/galpani2.c

r6740	r6741
8	8	***************************************************************************/
9	9
10	10	#include "driver.h"
11		#include "kaneko16.h"
	11	#include "includes/kaneko16.h"
12	12
13	13	/*
14	14	304000:0040 0000 0100 0000-0000 0000 0000 0000      (Sprites regs)

src/mame/video/labyrunr.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
	3	#include "includes/labyrunr.h"
3	4
4		UINT8 *labyrunr_videoram1,*labyrunr_videoram2,*labyrunr_scrollram;
5		static tilemap *layer0, *layer1;
6		static rectangle clip0, clip1;
7
8
9	5	PALETTE_INIT( labyrunr )
10	6	{
11	7	int pal;
r6740	r6741
44	40	}
45	41
46	42
47		static void set_pens(running_machine *machine)
	43	static void set_pens( running_machine *machine )
48	44	{
	45	labyrunr_state *state = (labyrunr_state *)machine->driver_data;
49	46	int i;
50	47
51	48	for (i = 0x00; i < 0x100; i += 2)
52	49	{
53		UINT16 data = machine->generic.paletteram.u8[i | 1] | (machine->generic.paletteram.u8[i] << 8);
	50	UINT16 data = state->paletteram[i | 1] | (state->paletteram[i] << 8);
54	51
55	52	rgb_t color = MAKE_RGB(pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
56	53
r6740	r6741
68	65
69	66	static TILE_GET_INFO( get_tile_info0 )
70	67	{
71		int attr = labyrunr_videoram1[tile_index];
72		int code = labyrunr_videoram1[tile_index + 0x400];
73		int bit0 = (K007121_ctrlram[0][0x05] >> 0) & 0x03;
74		int bit1 = (K007121_ctrlram[0][0x05] >> 2) & 0x03;
75		int bit2 = (K007121_ctrlram[0][0x05] >> 4) & 0x03;
76		int bit3 = (K007121_ctrlram[0][0x05] >> 6) & 0x03;
	68	labyrunr_state *state = (labyrunr_state *)machine->driver_data;
	69	UINT8 ctrl_3 = k007121_ctrlram_r(state->k007121, 3);
	70	UINT8 ctrl_4 = k007121_ctrlram_r(state->k007121, 4);
	71	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121, 5);
	72	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121, 6);
	73	int attr = state->videoram1[tile_index];
	74	int code = state->videoram1[tile_index + 0x400];
	75	int bit0 = (ctrl_5 >> 0) & 0x03;
	76	int bit1 = (ctrl_5 >> 2) & 0x03;
	77	int bit2 = (ctrl_5 >> 4) & 0x03;
	78	int bit3 = (ctrl_5 >> 6) & 0x03;
77	79	int bank = ((attr & 0x80) >> 7) |
78	80	((attr >> (bit0+2)) & 0x02) |
79	81	((attr >> (bit1+1)) & 0x04) |
80	82	((attr >> (bit2  )) & 0x08) |
81	83	((attr >> (bit3-1)) & 0x10) |
82		((K007121_ctrlram[0][0x03] & 0x01) << 5);
83		int mask = (K007121_ctrlram[0][0x04] & 0xf0) >> 4;
	84	((ctrl_3 & 0x01) << 5);
	85	int mask = (ctrl_4 & 0xf0) >> 4;
84	86
85		bank = (bank & ~(mask << 1)) | ((K007121_ctrlram[0][0x04] & mask) << 1);
	87	bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
86	88
87	89	SET_TILE_INFO(
88	90	0,
89		code+bank*256,
90		((K007121_ctrlram[0][6]&0x30)*2+16)+(attr&7),
	91	code + bank * 256,
	92	((ctrl_6 & 0x30) * 2 + 16)+(attr & 7),
91	93	0);
92	94	}
93	95
94	96	static TILE_GET_INFO( get_tile_info1 )
95	97	{
96		int attr = labyrunr_videoram2[tile_index];
97		int code = labyrunr_videoram2[tile_index + 0x400];
98		int bit0 = (K007121_ctrlram[0][0x05] >> 0) & 0x03;
99		int bit1 = (K007121_ctrlram[0][0x05] >> 2) & 0x03;
100		int bit2 = (K007121_ctrlram[0][0x05] >> 4) & 0x03;
101		int bit3 = (K007121_ctrlram[0][0x05] >> 6) & 0x03;
	98	labyrunr_state *state = (labyrunr_state *)machine->driver_data;
	99	UINT8 ctrl_3 = k007121_ctrlram_r(state->k007121, 3);
	100	UINT8 ctrl_4 = k007121_ctrlram_r(state->k007121, 4);
	101	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121, 5);
	102	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121, 6);
	103	int attr = state->videoram2[tile_index];
	104	int code = state->videoram2[tile_index + 0x400];
	105	int bit0 = (ctrl_5 >> 0) & 0x03;
	106	int bit1 = (ctrl_5 >> 2) & 0x03;
	107	int bit2 = (ctrl_5 >> 4) & 0x03;
	108	int bit3 = (ctrl_5 >> 6) & 0x03;
102	109	int bank = ((attr & 0x80) >> 7) |
103	110	((attr >> (bit0+2)) & 0x02) |
104	111	((attr >> (bit1+1)) & 0x04) |
105	112	((attr >> (bit2  )) & 0x08) |
106	113	((attr >> (bit3-1)) & 0x10) |
107		((K007121_ctrlram[0][0x03] & 0x01) << 5);
108		int mask = (K007121_ctrlram[0][0x04] & 0xf0) >> 4;
	114	((ctrl_3 & 0x01) << 5);
	115	int mask = (ctrl_4 & 0xf0) >> 4;
109	116
110		bank = (bank & ~(mask << 1)) | ((K007121_ctrlram[0][0x04] & mask) << 1);
	117	bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
111	118
112	119	SET_TILE_INFO(
113	120	0,
114	121	code+bank*256,
115		((K007121_ctrlram[0][6]&0x30)*2+16)+(attr&7),
	122	((ctrl_6 & 0x30) * 2 + 16) + (attr & 7),
116	123	0);
117	124	}
118	125
r6740	r6741
125	132
126	133	VIDEO_START( labyrunr )
127	134	{
128		layer0 = tilemap_create(machine, get_tile_info0,tilemap_scan_rows,8,8,32,32);
129		layer1 = tilemap_create(machine, get_tile_info1,tilemap_scan_rows,8,8,32,32);
	135	labyrunr_state *state = (labyrunr_state *)machine->driver_data;
130	136
131		tilemap_set_transparent_pen(layer0,0);
132		tilemap_set_transparent_pen(layer1,0);
	137	state->layer0 = tilemap_create(machine, get_tile_info0, tilemap_scan_rows, 8, 8, 32, 32);
	138	state->layer1 = tilemap_create(machine, get_tile_info1, tilemap_scan_rows, 8, 8, 32, 32);
133	139
134		clip0 = *video_screen_get_visible_area(machine->primary_screen);
135		clip0.min_x += 40;
	140	tilemap_set_transparent_pen(state->layer0, 0);
	141	tilemap_set_transparent_pen(state->layer1, 0);
136	142
137		clip1 = *video_screen_get_visible_area(machine->primary_screen);
138		clip1.max_x = 39;
139		clip1.min_x = 0;
	143	state->clip0 = *video_screen_get_visible_area(machine->primary_screen);
	144	state->clip0.min_x += 40;
140	145
141		tilemap_set_scroll_cols(layer0,32);
	146	state->clip1 = *video_screen_get_visible_area(machine->primary_screen);
	147	state->clip1.max_x = 39;
	148	state->clip1.min_x = 0;
	149
	150	tilemap_set_scroll_cols(state->layer0, 32);
142	151	}
143	152
144	153
r6740	r6741
151	160
152	161	WRITE8_HANDLER( labyrunr_vram1_w )
153	162	{
154		labyrunr_videoram1[offset] = data;
155		tilemap_mark_tile_dirty(layer0,offset & 0x3ff);
	163	labyrunr_state *state = (labyrunr_state *)space->machine->driver_data;
	164	state->videoram1[offset] = data;
	165	tilemap_mark_tile_dirty(state->layer0, offset & 0x3ff);
156	166	}
157	167
158	168	WRITE8_HANDLER( labyrunr_vram2_w )
159	169	{
160		labyrunr_videoram2[offset] = data;
161		tilemap_mark_tile_dirty(layer1,offset & 0x3ff);
	170	labyrunr_state *state = (labyrunr_state *)space->machine->driver_data;
	171	state->videoram2[offset] = data;
	172	tilemap_mark_tile_dirty(state->layer1, offset & 0x3ff);
162	173	}
163	174
164	175
r6740	r6741
171	182
172	183	VIDEO_UPDATE( labyrunr )
173	184	{
	185	labyrunr_state *state = (labyrunr_state *)screen->machine->driver_data;
	186	UINT8 ctrl_0 = k007121_ctrlram_r(state->k007121, 0);
174	187	rectangle finalclip0, finalclip1;
175	188
176	189	set_pens(screen->machine);
177	190
178		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
179		bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
	191	bitmap_fill(screen->machine->priority_bitmap, cliprect,0);
	192	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
180	193
181		if(~K007121_ctrlram[0][3] & 0x20)
	194	if (~k007121_ctrlram_r(state->k007121, 3) & 0x20)
182	195	{
183	196	int i;
184	197
185		finalclip0 = clip0;
186		finalclip1 = clip1;
	198	finalclip0 = state->clip0;
	199	finalclip1 = state->clip1;
187	200
188	201	sect_rect(&finalclip0, cliprect);
189	202	sect_rect(&finalclip1, cliprect);
190	203
191		tilemap_set_scrollx(layer0,0,K007121_ctrlram[0][0x00] - 40);
192		tilemap_set_scrollx(layer1,0,0);
	204	tilemap_set_scrollx(state->layer0, 0, ctrl_0 - 40);
	205	tilemap_set_scrollx(state->layer1, 0, 0);
193	206
194	207	for(i = 0; i < 32; i++)
195	208	{
196	209	/* enable colscroll */
197		if((K007121_ctrlram[0][1] & 6) == 6) // it's probably just one bit, but it's only used once in the game so I don't know which it's
198		tilemap_set_scrolly(layer0,(i+2) & 0x1f,K007121_ctrlram[0][0x02] + labyrunr_scrollram[i]);
	210	if((k007121_ctrlram_r(state->k007121, 1) & 6) == 6) // it's probably just one bit, but it's only used once in the game so I don't know which it's
	211	tilemap_set_scrolly(state->layer0, (i + 2) & 0x1f, k007121_ctrlram_r(state->k007121, 2) + state->scrollram[i]);
199	212	else
200		tilemap_set_scrolly(layer0,(i+2) & 0x1f,K007121_ctrlram[0][0x02]);
	213	tilemap_set_scrolly(state->layer0, (i + 2) & 0x1f, k007121_ctrlram_r(state->k007121, 2));
201	214	}
202	215
203		tilemap_draw(bitmap,&finalclip0,layer0,TILEMAP_DRAW_OPAQUE,0);
204		K007121_sprites_draw(0,bitmap,cliprect,screen->machine->gfx,screen->machine->colortable,screen->machine->generic.spriteram.u8,(K007121_ctrlram[0][6]&0x30)*2,40,0,(K007121_ctrlram[0][3] & 0x40) >> 5);
	216	tilemap_draw(bitmap, &finalclip0, state->layer0, TILEMAP_DRAW_OPAQUE, 0);
	217	k007121_sprites_draw(state->k007121, bitmap, cliprect, screen->machine->gfx[0], screen->machine->colortable, state->spriteram,(k007121_ctrlram_r(state->k007121, 6) & 0x30) * 2, 40,0,(k007121_ctrlram_r(state->k007121, 3) & 0x40) >> 5);
205	218	/* we ignore the transparency because layer1 is drawn only at the top of the screen also covering sprites */
206		tilemap_draw(bitmap,&finalclip1,layer1,TILEMAP_DRAW_OPAQUE,0);
	219	tilemap_draw(bitmap, &finalclip1, state->layer1, TILEMAP_DRAW_OPAQUE, 0);
207	220	}
208	221	else
209	222	{
r6740	r6741
214	227	finalclip0.min_y = finalclip1.min_y = cliprect->min_y;
215	228	finalclip0.max_y = finalclip1.max_y = cliprect->max_y;
216	229
217		if(K007121_ctrlram[0][1] & 1)
	230	if(k007121_ctrlram_r(state->k007121, 1) & 1)
218	231	{
219		finalclip0.min_x = cliprect->max_x - K007121_ctrlram[0][0x00] + 8;
	232	finalclip0.min_x = cliprect->max_x - ctrl_0 + 8;
220	233	finalclip0.max_x = cliprect->max_x;
221	234
222		if(K007121_ctrlram[0][0x00] >= 40)
	235	if(ctrl_0 >= 40)
223	236	{
224	237	finalclip1.min_x = cliprect->min_x;
225	238	}
r6740	r6741
227	240	{
228	241	use_clip3[0] = 1;
229	242
230		finalclip1.min_x = 40 - K007121_ctrlram[0][0x00];
	243	finalclip1.min_x = 40 - ctrl_0;
231	244	}
232	245
233		finalclip1.max_x = cliprect->max_x - K007121_ctrlram[0][0x00] + 8;
	246	finalclip1.max_x = cliprect->max_x - ctrl_0 + 8;
234	247
235	248	}
236	249	else
237	250	{
238		if(K007121_ctrlram[0][0x00] >= 40)
	251	if(ctrl_0 >= 40)
239	252	{
240	253	finalclip0.min_x = cliprect->min_x;
241	254	}
r6740	r6741
243	256	{
244	257	use_clip3[1] = 1;
245	258
246		finalclip0.min_x = 40 - K007121_ctrlram[0][0x00];
	259	finalclip0.min_x = 40 - ctrl_0;
247	260	}
248	261
249		finalclip0.max_x = cliprect->max_x - K007121_ctrlram[0][0x00] + 8;
	262	finalclip0.max_x = cliprect->max_x - ctrl_0 + 8;
250	263
251		finalclip1.min_x = cliprect->max_x - K007121_ctrlram[0][0x00] + 8;
	264	finalclip1.min_x = cliprect->max_x - ctrl_0 + 8;
252	265	finalclip1.max_x = cliprect->max_x;
253	266	}
254	267
r6740	r6741
257	270	finalclip3.min_y = cliprect->min_y;
258	271	finalclip3.max_y = cliprect->max_y;
259	272	finalclip3.min_x = cliprect->min_x;
260		finalclip3.max_x = 40 - K007121_ctrlram[0][0x00] - 8;
	273	finalclip3.max_x = 40 - ctrl_0 - 8;
261	274	}
262	275
263		tilemap_set_scrollx(layer0,0,K007121_ctrlram[0][0x00] - 40);
264		tilemap_set_scrollx(layer1,0,K007121_ctrlram[0][0x00] - 40);
	276	tilemap_set_scrollx(state->layer0, 0, ctrl_0 - 40);
	277	tilemap_set_scrollx(state->layer1, 0, ctrl_0 - 40);
265	278
266		tilemap_draw(bitmap,&finalclip0,layer0,0,1);
267		if(use_clip3[0]) tilemap_draw(bitmap,&finalclip3,layer0,0,1);
	279	tilemap_draw(bitmap, &finalclip0, state->layer0, 0, 1);
	280	if(use_clip3[0])
	281	tilemap_draw(bitmap, &finalclip3, state->layer0, 0, 1);
268	282
269		tilemap_draw(bitmap,&finalclip1,layer1,0,1);
270		if(use_clip3[1]) tilemap_draw(bitmap,&finalclip3,layer1,0,1);
	283	tilemap_draw(bitmap, &finalclip1, state->layer1, 0, 1);
	284	if(use_clip3[1])
	285	tilemap_draw(bitmap, &finalclip3, state->layer1, 0, 1);
271	286
272		K007121_sprites_draw(0,bitmap,cliprect,screen->machine->gfx,screen->machine->colortable,screen->machine->generic.spriteram.u8,(K007121_ctrlram[0][6]&0x30)*2,40,0,(K007121_ctrlram[0][3] & 0x40) >> 5);
	287	k007121_sprites_draw(state->k007121, bitmap, cliprect, screen->machine->gfx[0], screen->machine->colortable, state->spriteram, (k007121_ctrlram_r(state->k007121, 6) & 0x30) * 2,40,0,(k007121_ctrlram_r(state->k007121, 3) & 0x40) >> 5);
273	288	}
274	289	return 0;
275	290	}

src/mame/video/ccastles.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "ccastles.h"
	8	#include "includes/ccastles.h"
9	9	#include "video/resnet.h"
10	10
11	11

src/mame/video/ddragon3.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "ddragon3.h"
	8	#include "includes/ddragon3.h"
9	9
10	10	WRITE16_HANDLER( ddragon3_scroll_w )
11	11	{

src/mame/video/exterm.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/tms34010/tms34010.h"
9		#include "exterm.h"
	9	#include "includes/exterm.h"
10	10
11	11
12	12	UINT16 *exterm_master_videoram, *exterm_slave_videoram;

src/mame/video/ambush.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "ambush.h"
	10	#include "includes/ambush.h"
11	11
12	12
13	13	/***************************************************************************

src/mame/video/policetr.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/mips/r3000.h"
9		#include "policetr.h"
	9	#include "includes/policetr.h"
10	10
11	11
12	12	/* constants */

src/mame/video/midtunit.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "profiler.h"
9	9	#include "cpu/tms34010/tms34010.h"
10		#include "midtunit.h"
	10	#include "includes/midtunit.h"
11	11
12	12
13	13	/* compile-time options */

src/mame/video/drmicro.c

r6740	r6741
8	8	*******************************************************************************/
9	9
10	10	#include "driver.h"
11		#include "drmicro.h"
	11	#include "includes/drmicro.h"
12	12
13	13
14	14	/****************************************************************************/

src/mame/video/carpolo.c

r6740	r6741
7	7	****************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "carpolo.h"
	10	#include "includes/carpolo.h"
11	11
12	12
13	13	UINT8 *carpolo_alpharam;

src/mame/video/speedatk.c

r6740	r6741
5	5	*****************************************************************************************/
6	6	#include "driver.h"
7	7
	8	UINT8 *speedatk_videoram;
	9	UINT8 *speedatk_colorram;
8	10	static tilemap *bg_tilemap;
9	11
10	12	/*
r6740	r6741
75	77
76	78	WRITE8_HANDLER( speedatk_videoram_w )
77	79	{
78		space->machine->generic.videoram.u8[offset] = data;
	80	speedatk_videoram[offset] = data;
79	81	tilemap_mark_tile_dirty(bg_tilemap, offset);
80	82	}
81	83
82	84	WRITE8_HANDLER( speedatk_colorram_w )
83	85	{
84		space->machine->generic.colorram.u8[offset] = data;
	86	speedatk_colorram[offset] = data;
85	87	tilemap_mark_tile_dirty(bg_tilemap, offset);
86	88	}
87	89
r6740	r6741
89	91	{
90	92	int code, color, region;
91	93
92		code = machine->generic.videoram.u8[tile_index] + ((machine->generic.colorram.u8[tile_index] & 0xe0) << 3);
93		color = machine->generic.colorram.u8[tile_index] & 0x1f;
94		region = (machine->generic.colorram.u8[tile_index] & 0x10) >> 4;
	94	code = speedatk_videoram[tile_index] + ((speedatk_colorram[tile_index] & 0xe0) << 3);
	95	color = speedatk_colorram[tile_index] & 0x1f;
	96	region = (speedatk_colorram[tile_index] & 0x10) >> 4;
95	97
96	98	SET_TILE_INFO(region, code, color, 0);
97	99	}

src/mame/video/stvvdp2.c

r6740	r6741
1753	1753	\----------|----------|----------|----------|----------|----------|----------|---------*/
1754	1754
1755	1755	#define STV_VDP2_LNCLEN   ((stv_vdp2_regs[0x0e8/4] >> 16)&0x0000ffff)
1756		#define STV_VDP2_SPLCEN   ((STV_VDP2_LNCLEN) & 0x0020) >> 5)
1757		#define STV_VDP2_R0LCEN   ((STV_VDP2_LNCLEN) & 0x0010) >> 4)
1758		#define STV_VDP2_N3LCEN   ((STV_VDP2_LNCLEN) & 0x0008) >> 3)
1759		#define STV_VDP2_N2LCEN   ((STV_VDP2_LNCLEN) & 0x0004) >> 2)
1760		#define STV_VDP2_N1LCEN   ((STV_VDP2_LNCLEN) & 0x0002) >> 1)
1761		#define STV_VDP2_N0LCEN   ((STV_VDP2_LNCLEN) & 0x0001) >> 0)
	1756	#define STV_VDP2_SPLCEN   ((STV_VDP2_LNCLEN & 0x0020) >> 5)
	1757	#define STV_VDP2_R0LCEN   ((STV_VDP2_LNCLEN & 0x0010) >> 4)
	1758	#define STV_VDP2_N3LCEN   ((STV_VDP2_LNCLEN & 0x0008) >> 3)
	1759	#define STV_VDP2_N2LCEN   ((STV_VDP2_LNCLEN & 0x0004) >> 2)
	1760	#define STV_VDP2_N1LCEN   ((STV_VDP2_LNCLEN & 0x0002) >> 1)
	1761	#define STV_VDP2_N0LCEN   ((STV_VDP2_LNCLEN & 0x0001) >> 0)
1762	1762
1763	1763	/* 1800ea - Special Priority Mode
1764	1764	bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\

src/mame/video/exedexes.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "exedexes.h"
	10	#include "includes/exedexes.h"
11	11
12	12
13	13	#define TileMap(offs) (memory_region(machine, "gfx5")[offs])

src/mame/video/jedi.c

r6740	r6741
15	15	***************************************************************************/
16	16
17	17	#include "driver.h"
18		#include "jedi.h"
	18	#include "includes/jedi.h"
19	19
20	20
21	21	#define NUM_PENS   (0x1000)

src/mame/video/seta2.c

r6740	r6741
71	71	***************************************************************************/
72	72
73	73	#include "driver.h"
74		#include "seta.h"
	74	#include "includes/seta.h"
75	75
76	76	UINT16 *seta2_vregs;
77	77

src/mame/video/flkatck.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "video/konamiic.h"
	8	#include "video/konicdev.h"
	9	#include "includes/flkatck.h"
9	10
10		static tilemap *k007121_tilemap[2];
11		static rectangle k007121_clip[2];
12
13		UINT8 *k007121_ram;
14
15		int flkatck_irq_enabled;
16
17		static int k007121_flip_screen = 0;
18
19	11	/***************************************************************************
20	12
21	13	Callbacks for the K007121
r6740	r6741
24	16
25	17	static TILE_GET_INFO( get_tile_info_A )
26	18	{
27		int attr = k007121_ram[tile_index];
28		int code = k007121_ram[tile_index+0x400];
29		int bit0 = (K007121_ctrlram[0][0x05] >> 0) & 0x03;
30		int bit1 = (K007121_ctrlram[0][0x05] >> 2) & 0x03;
31		int bit2 = (K007121_ctrlram[0][0x05] >> 4) & 0x03;
32		int bit3 = (K007121_ctrlram[0][0x05] >> 6) & 0x03;
	19	flkatck_state *state = (flkatck_state *)machine->driver_data;
	20	UINT8 ctrl_0 = k007121_ctrlram_r(state->k007121, 0);
	21	UINT8 ctrl_2 = k007121_ctrlram_r(state->k007121, 2);
	22	UINT8 ctrl_3 = k007121_ctrlram_r(state->k007121, 3);
	23	UINT8 ctrl_4 = k007121_ctrlram_r(state->k007121, 4);
	24	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121, 5);
	25	int attr = state->k007121_ram[tile_index];
	26	int code = state->k007121_ram[tile_index + 0x400];
	27	int bit0 = (ctrl_5 >> 0) & 0x03;
	28	int bit1 = (ctrl_5 >> 2) & 0x03;
	29	int bit2 = (ctrl_5 >> 4) & 0x03;
	30	int bit3 = (ctrl_5 >> 6) & 0x03;
33	31	int bank = ((attr & 0x80) >> 7) |
34		((attr >> (bit0+2)) & 0x02) |
35		((attr >> (bit1+1)) & 0x04) |
	32	((attr >> (bit0 + 2)) & 0x02) |
	33	((attr >> (bit1 + 1)) & 0x04) |
36	34	((attr >> (bit2  )) & 0x08) |
37		((attr >> (bit3-1)) & 0x10) |
38		((K007121_ctrlram[0][0x03] & 0x01) << 5);
39		int mask = (K007121_ctrlram[0][0x04] & 0xf0) >> 4;
	35	((attr >> (bit3 - 1)) & 0x10) |
	36	((ctrl_3 & 0x01) << 5);
	37	int mask = (ctrl_4 & 0xf0) >> 4;
40	38
41		bank = (bank & ~(mask << 1)) | ((K007121_ctrlram[0][0x04] & mask) << 1);
	39	bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
42	40
43		if ((attr == 0x0d) && (!(K007121_ctrlram[0][0])) && (!(K007121_ctrlram[0][2])))
	41	if ((attr == 0x0d) && (!ctrl_0) && (!ctrl_2))
44	42	bank = 0;   /*  this allows the game to print text
45	43	in all banks selected by the k007121 */
46	44
r6740	r6741
53	51
54	52	static TILE_GET_INFO( get_tile_info_B )
55	53	{
56		int attr = k007121_ram[tile_index+0x800];
57		int code = k007121_ram[tile_index+0xc00];
	54	flkatck_state *state = (flkatck_state *)machine->driver_data;
	55	int attr = state->k007121_ram[tile_index + 0x800];
	56	int code = state->k007121_ram[tile_index + 0xc00];
58	57
59	58	SET_TILE_INFO(
60	59	0,
r6740	r6741
72	71
73	72	VIDEO_START( flkatck )
74	73	{
75		k007121_tilemap[0] = tilemap_create(machine, get_tile_info_A,tilemap_scan_rows,8,8,32,32);
76		k007121_tilemap[1] = tilemap_create(machine, get_tile_info_B,tilemap_scan_rows,8,8,32,32);
77
	74	flkatck_state *state = (flkatck_state *)machine->driver_data;
	75	state->k007121_tilemap[0] = tilemap_create(machine, get_tile_info_A, tilemap_scan_rows, 8, 8, 32, 32);
	76	state->k007121_tilemap[1] = tilemap_create(machine, get_tile_info_B, tilemap_scan_rows, 8, 8, 32, 32);
78	77	}
79	78
80	79
r6740	r6741
86	85
87	86	WRITE8_HANDLER( flkatck_k007121_w )
88	87	{
89		k007121_ram[offset] = data;
	88	flkatck_state *state = (flkatck_state *)space->machine->driver_data;
	89
	90	state->k007121_ram[offset] = data;
90	91	if (offset < 0x1000)   /* tiles */
91	92	{
92	93	if (offset & 0x800)   /* score */
93		tilemap_mark_tile_dirty(k007121_tilemap[1],offset & 0x3ff);
	94	tilemap_mark_tile_dirty(state->k007121_tilemap[1], offset & 0x3ff);
94	95	else
95		tilemap_mark_tile_dirty(k007121_tilemap[0],offset & 0x3ff);
	96	tilemap_mark_tile_dirty(state->k007121_tilemap[0], offset & 0x3ff);
96	97	}
97	98	}
98	99
99	100	WRITE8_HANDLER( flkatck_k007121_regs_w )
100	101	{
	102	flkatck_state *state = (flkatck_state *)space->machine->driver_data;
	103
101	104	switch (offset)
102	105	{
103	106	case 0x04:   /* ROM bank select */
104		if (data != K007121_ctrlram[0][0x04])
	107	if (data != k007121_ctrlram_r(state->k007121, 4))
105	108	tilemap_mark_all_tiles_dirty_all(space->machine);
106	109	break;
107	110
108	111	case 0x07:   /* flip screen + IRQ control */
109		k007121_flip_screen = data & 0x08;
110		tilemap_set_flip_all(space->machine, k007121_flip_screen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
111		flkatck_irq_enabled = data & 0x02;
	112	state->flipscreen = data & 0x08;
	113	tilemap_set_flip_all(space->machine, state->flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	114	state->irq_enabled = data & 0x02;
112	115	break;
113	116	}
114	117
115		K007121_ctrl_0_w(space,offset,data);
	118	k007121_ctrl_w(state->k007121, offset, data);
116	119	}
117	120
118	121
r6740	r6741
131	134
132	135	VIDEO_UPDATE( flkatck )
133	136	{
134		rectangle final_clip[2];
	137	flkatck_state *state = (flkatck_state *)screen->machine->driver_data;
	138	rectangle clip[2];
135	139	const rectangle *visarea = video_screen_get_visible_area(screen);
136	140
137		#if 0
138		popmessage("%02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x  %02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x",
139		K007121_ctrlram[0][0x00],K007121_ctrlram[0][0x01],K007121_ctrlram[0][0x02],K007121_ctrlram[0][0x03],K007121_ctrlram[0][0x04],K007121_ctrlram[0][0x05],K007121_ctrlram[0][0x06],K007121_ctrlram[0][0x07],
140		K007121_ctrlram[1][0x00],K007121_ctrlram[1][0x01],K007121_ctrlram[1][0x02],K007121_ctrlram[1][0x03],K007121_ctrlram[1][0x04],K007121_ctrlram[1][0x05],K007121_ctrlram[1][0x06],K007121_ctrlram[1][0x07]);
141		#endif
142		if (k007121_flip_screen)
	141	if (state->flipscreen)
143	142	{
144		k007121_clip[0] = *visarea;
145		k007121_clip[0].max_x -= 40;
	143	clip[0] = *visarea;
	144	clip[0].max_x -= 40;
146	145
147		k007121_clip[1] = *visarea;
148		k007121_clip[1].min_x = k007121_clip[1].max_x-40;
	146	clip[1] = *visarea;
	147	clip[1].min_x = clip[1].max_x - 40;
149	148
150		tilemap_set_scrollx(k007121_tilemap[0],0,K007121_ctrlram[0][0x00] - 56 );
151		tilemap_set_scrolly(k007121_tilemap[0],0,K007121_ctrlram[0][0x02]);
152		tilemap_set_scrollx(k007121_tilemap[1],0,-16);
	149	tilemap_set_scrollx(state->k007121_tilemap[0], 0, k007121_ctrlram_r(state->k007121, 0) - 56 );
	150	tilemap_set_scrolly(state->k007121_tilemap[0], 0, k007121_ctrlram_r(state->k007121, 2));
	151	tilemap_set_scrollx(state->k007121_tilemap[1], 0, -16);
153	152	}
154	153	else
155	154	{
156		k007121_clip[0] = *visarea;
157		k007121_clip[0].min_x += 40;
	155	clip[0] = *visarea;
	156	clip[0].min_x += 40;
158	157
159		k007121_clip[1] = *visarea;
160		k007121_clip[1].max_x = 39;
161		k007121_clip[1].min_x = 0;
	158	clip[1] = *visarea;
	159	clip[1].max_x = 39;
	160	clip[1].min_x = 0;
162	161
163		tilemap_set_scrollx(k007121_tilemap[0],0,K007121_ctrlram[0][0x00] - 40 );
164		tilemap_set_scrolly(k007121_tilemap[0],0,K007121_ctrlram[0][0x02]);
165		tilemap_set_scrollx(k007121_tilemap[1],0,0);
	162	tilemap_set_scrollx(state->k007121_tilemap[0], 0, k007121_ctrlram_r(state->k007121, 0) - 40 );
	163	tilemap_set_scrolly(state->k007121_tilemap[0], 0, k007121_ctrlram_r(state->k007121, 2));
	164	tilemap_set_scrollx(state->k007121_tilemap[1], 0, 0);
166	165	}
167	166
168	167	/* compute clipping */
169		final_clip[0] = k007121_clip[0];
170		final_clip[1] = k007121_clip[1];
171		sect_rect(&final_clip[0], cliprect);
172		sect_rect(&final_clip[1], cliprect);
	168	sect_rect(&clip[0], cliprect);
	169	sect_rect(&clip[1], cliprect);
173	170
174	171	/* draw the graphics */
175		tilemap_draw(bitmap,&final_clip[0],k007121_tilemap[0],0,0);
176		K007121_sprites_draw(0,bitmap,cliprect,screen->machine->gfx,NULL,&k007121_ram[0x1000],0,40,0,-1);
177		tilemap_draw(bitmap,&final_clip[1],k007121_tilemap[1],0,0);
	172	tilemap_draw(bitmap, &clip[0], state->k007121_tilemap[0], 0, 0);
	173	k007121_sprites_draw(state->k007121, bitmap, cliprect, screen->machine->gfx[0], NULL, &state->k007121_ram[0x1000], 0, 40, 0, -1);
	174	tilemap_draw(bitmap, &clip[1], state->k007121_tilemap[1], 0, 0);
178	175	return 0;
179	176	}

src/mame/video/namcofl.c

r6740	r6741
1	1	/* video/namcofl.c */
2	2
3	3	#include "driver.h"
4		#include "namconb1.h"
5		#include "namcoic.h"
6		#include "namcos2.h"
	4	#include "includes/namconb1.h"
	5	#include "includes/namcoic.h"
	6	#include "includes/namcos2.h"
7	7
8	8	//UINT32 *namcofl_spritebank32;
9	9	//UINT32 *namcofl_tilebank32;

src/mame/video/contra.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "video/konamiic.h"
	8	#include "video/konicdev.h"
	9	#include "includes/contra.h"
9	10
10		//static int spriteram_offset;
11		static UINT8 *private_spriteram_2,*private_spriteram;
12	11
13		UINT8 *contra_fg_vram,*contra_fg_cram;
14		UINT8 *contra_text_vram,*contra_text_cram;
15		UINT8 *contra_bg_vram,*contra_bg_cram;
16
17		static tilemap *bg_tilemap, *fg_tilemap, *tx_tilemap;
18		static rectangle bg_clip, fg_clip, tx_clip;
19
20	12	/***************************************************************************
21	13	**
22	14	**  Contra has palette RAM, but it also has four lookup table PROMs
r6740	r6741
60	52	}
61	53
62	54
63		static void set_pens(running_machine *machine)
	55	static void set_pens( running_machine *machine )
64	56	{
	57	contra_state *state = (contra_state *)machine->driver_data;
65	58	int i;
66	59
67	60	for (i = 0x00; i < 0x100; i += 2)
68	61	{
69		UINT16 data = machine->generic.paletteram.u8[i] | (machine->generic.paletteram.u8[i | 1] << 8);
	62	UINT16 data = state->paletteram[i] | (state->paletteram[i | 1] << 8);
70	63
71	64	rgb_t color = MAKE_RGB(pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
72	65
r6740	r6741
84	77
85	78	static TILE_GET_INFO( get_fg_tile_info )
86	79	{
87		int attr = contra_fg_cram[tile_index];
88		int bit0 = (K007121_ctrlram[0][0x05] >> 0) & 0x03;
89		int bit1 = (K007121_ctrlram[0][0x05] >> 2) & 0x03;
90		int bit2 = (K007121_ctrlram[0][0x05] >> 4) & 0x03;
91		int bit3 = (K007121_ctrlram[0][0x05] >> 6) & 0x03;
	80	contra_state *state = (contra_state *)machine->driver_data;
	81	UINT8 ctrl_3 = k007121_ctrlram_r(state->k007121_1, 3);
	82	UINT8 ctrl_4 = k007121_ctrlram_r(state->k007121_1, 4);
	83	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121_1, 5);
	84	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_1, 6);
	85	int attr = state->fg_cram[tile_index];
	86	int bit0 = (ctrl_5 >> 0) & 0x03;
	87	int bit1 = (ctrl_5 >> 2) & 0x03;
	88	int bit2 = (ctrl_5 >> 4) & 0x03;
	89	int bit3 = (ctrl_5 >> 6) & 0x03;
92	90	int bank = ((attr & 0x80) >> 7) |
93		((attr >> (bit0+2)) & 0x02) |
94		((attr >> (bit1+1)) & 0x04) |
95		((attr >> (bit2  )) & 0x08) |
96		((attr >> (bit3-1)) & 0x10) |
97		((K007121_ctrlram[0][0x03] & 0x01) << 5);
98		int mask = (K007121_ctrlram[0][0x04] & 0xf0) >> 4;
	91	((attr >> (bit0 + 2)) & 0x02) |
	92	((attr >> (bit1 + 1)) & 0x04) |
	93	((attr >> (bit2    )) & 0x08) |
	94	((attr >> (bit3 - 1)) & 0x10) |
	95	((ctrl_3 & 0x01) << 5);
	96	int mask = (ctrl_4 & 0xf0) >> 4;
99	97
100		bank = (bank & ~(mask << 1)) | ((K007121_ctrlram[0][0x04] & mask) << 1);
	98	bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
101	99
102	100	SET_TILE_INFO(
103	101	0,
104		contra_fg_vram[tile_index]+bank*256,
105		((K007121_ctrlram[0][6]&0x30)*2+16)+(attr&7),
	102	state->fg_vram[tile_index] + bank * 256,
	103	((ctrl_6 & 0x30) * 2 + 16) + (attr & 7),
106	104	0);
107	105	}
108	106
109	107	static TILE_GET_INFO( get_bg_tile_info )
110	108	{
111		int attr = contra_bg_cram[tile_index];
112		int bit0 = (K007121_ctrlram[1][0x05] >> 0) & 0x03;
113		int bit1 = (K007121_ctrlram[1][0x05] >> 2) & 0x03;
114		int bit2 = (K007121_ctrlram[1][0x05] >> 4) & 0x03;
115		int bit3 = (K007121_ctrlram[1][0x05] >> 6) & 0x03;
	109	contra_state *state = (contra_state *)machine->driver_data;
	110	UINT8 ctrl_3 = k007121_ctrlram_r(state->k007121_2, 3);
	111	UINT8 ctrl_4 = k007121_ctrlram_r(state->k007121_2, 4);
	112	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121_2, 5);
	113	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_2, 6);
	114	int attr = state->bg_cram[tile_index];
	115	int bit0 = (ctrl_5 >> 0) & 0x03;
	116	int bit1 = (ctrl_5 >> 2) & 0x03;
	117	int bit2 = (ctrl_5 >> 4) & 0x03;
	118	int bit3 = (ctrl_5 >> 6) & 0x03;
116	119	int bank = ((attr & 0x80) >> 7) |
117		((attr >> (bit0+2)) & 0x02) |
118		((attr >> (bit1+1)) & 0x04) |
119		((attr >> (bit2  )) & 0x08) |
120		((attr >> (bit3-1)) & 0x10) |
121		((K007121_ctrlram[1][0x03] & 0x01) << 5);
122		int mask = (K007121_ctrlram[1][0x04] & 0xf0) >> 4;
	120	((attr >> (bit0 + 2)) & 0x02) |
	121	((attr >> (bit1 + 1)) & 0x04) |
	122	((attr >> (bit2    )) & 0x08) |
	123	((attr >> (bit3 - 1)) & 0x10) |
	124	((ctrl_3 & 0x01) << 5);
	125	int mask = (ctrl_4 & 0xf0) >> 4;
123	126
124		bank = (bank & ~(mask << 1)) | ((K007121_ctrlram[0][0x04] & mask) << 1);
	127	// 2009-12 FP: TO BE VERIFIED - old code used ctrl4 from chip 0?!?
	128	bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
125	129
126	130	SET_TILE_INFO(
127	131	1,
128		contra_bg_vram[tile_index]+bank*256,
129		((K007121_ctrlram[1][6]&0x30)*2+16)+(attr&7),
	132	state->bg_vram[tile_index] + bank * 256,
	133	((ctrl_6 & 0x30) * 2 + 16) + (attr & 7),
130	134	0);
131	135	}
132	136
133	137	static TILE_GET_INFO( get_tx_tile_info )
134	138	{
135		int attr = contra_text_cram[tile_index];
136		int bit0 = (K007121_ctrlram[0][0x05] >> 0) & 0x03;
137		int bit1 = (K007121_ctrlram[0][0x05] >> 2) & 0x03;
138		int bit2 = (K007121_ctrlram[0][0x05] >> 4) & 0x03;
139		int bit3 = (K007121_ctrlram[0][0x05] >> 6) & 0x03;
	139	contra_state *state = (contra_state *)machine->driver_data;
	140	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121_1, 5);
	141	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_1, 6);
	142	int attr = state->tx_cram[tile_index];
	143	int bit0 = (ctrl_5 >> 0) & 0x03;
	144	int bit1 = (ctrl_5 >> 2) & 0x03;
	145	int bit2 = (ctrl_5 >> 4) & 0x03;
	146	int bit3 = (ctrl_5 >> 6) & 0x03;
140	147	int bank = ((attr & 0x80) >> 7) |
141		((attr >> (bit0+2)) & 0x02) |
142		((attr >> (bit1+1)) & 0x04) |
143		((attr >> (bit2  )) & 0x08) |
144		((attr >> (bit3-1)) & 0x10);
	148	((attr >> (bit0 + 2)) & 0x02) |
	149	((attr >> (bit1 + 1)) & 0x04) |
	150	((attr >> (bit2    )) & 0x08) |
	151	((attr >> (bit3 - 1)) & 0x10);
	152
145	153	SET_TILE_INFO(
146	154	0,
147		contra_text_vram[tile_index]+bank*256,
148		((K007121_ctrlram[0][6]&0x30)*2+16)+(attr&7),
	155	state->tx_vram[tile_index] + bank * 256,
	156	((ctrl_6 & 0x30) * 2 + 16) + (attr & 7),
149	157	0);
150	158	}
151	159
r6740	r6741
158	166
159	167	VIDEO_START( contra )
160	168	{
161		bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan_rows,     8,8,32,32);
162		fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,32,32);
163		tx_tilemap = tilemap_create(machine, get_tx_tile_info,tilemap_scan_rows,     8,8,32,32);
	169	contra_state *state = (contra_state *)machine->driver_data;
164	170
165		private_spriteram = auto_alloc_array(machine, UINT8, 0x800);
166		private_spriteram_2 = auto_alloc_array(machine, UINT8, 0x800);
	171	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	172	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	173	state->tx_tilemap = tilemap_create(machine, get_tx_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
167	174
168		bg_clip = *video_screen_get_visible_area(machine->primary_screen);
169		bg_clip.min_x += 40;
	175	state->spriteram = auto_alloc_array(machine, UINT8, 0x800);
	176	state->spriteram_2 = auto_alloc_array(machine, UINT8, 0x800);
170	177
171		fg_clip = bg_clip;
	178	state->bg_clip = *video_screen_get_visible_area(machine->primary_screen);
	179	state->bg_clip.min_x += 40;
172	180
173		tx_clip = *video_screen_get_visible_area(machine->primary_screen);
174		tx_clip.max_x = 39;
175		tx_clip.min_x = 0;
	181	state->fg_clip = state->bg_clip;
176	182
177		tilemap_set_transparent_pen(fg_tilemap,0);
	183	state->tx_clip = *video_screen_get_visible_area(machine->primary_screen);
	184	state->tx_clip.max_x = 39;
	185	state->tx_clip.min_x = 0;
	186
	187	tilemap_set_transparent_pen(state->fg_tilemap, 0);
	188
	189	state_save_register_global_pointer(machine, state->spriteram, 0x800);
	190	state_save_register_global_pointer(machine, state->spriteram_2, 0x800);
178	191	}
179	192
180	193
r6740	r6741
186	199
187	200	WRITE8_HANDLER( contra_fg_vram_w )
188	201	{
189		contra_fg_vram[offset] = data;
190		tilemap_mark_tile_dirty(fg_tilemap,offset);
	202	contra_state *state = (contra_state *)space->machine->driver_data;
	203
	204	state->fg_vram[offset] = data;
	205	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
191	206	}
192	207
193		WRITE8_HANDLER( contra_fg_cram_w ){
194		contra_fg_cram[offset] = data;
195		tilemap_mark_tile_dirty(fg_tilemap,offset);
	208	WRITE8_HANDLER( contra_fg_cram_w )
	209	{
	210	contra_state *state = (contra_state *)space->machine->driver_data;
	211
	212	state->fg_cram[offset] = data;
	213	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
196	214	}
197	215
198	216	WRITE8_HANDLER( contra_bg_vram_w )
199	217	{
200		contra_bg_vram[offset] = data;
201		tilemap_mark_tile_dirty(bg_tilemap,offset);
	218	contra_state *state = (contra_state *)space->machine->driver_data;
	219
	220	state->bg_vram[offset] = data;
	221	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
202	222	}
203	223
204	224	WRITE8_HANDLER( contra_bg_cram_w )
205	225	{
206		contra_bg_cram[offset] = data;
207		tilemap_mark_tile_dirty(bg_tilemap,offset);
	226	contra_state *state = (contra_state *)space->machine->driver_data;
	227
	228	state->bg_cram[offset] = data;
	229	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
208	230	}
209	231
210	232	WRITE8_HANDLER( contra_text_vram_w )
211	233	{
212		contra_text_vram[offset] = data;
213		tilemap_mark_tile_dirty(tx_tilemap,offset);
	234	contra_state *state = (contra_state *)space->machine->driver_data;
	235
	236	state->tx_vram[offset] = data;
	237	tilemap_mark_tile_dirty(state->tx_tilemap, offset);
214	238	}
215	239
216	240	WRITE8_HANDLER( contra_text_cram_w )
217	241	{
218		contra_text_cram[offset] = data;
219		tilemap_mark_tile_dirty(tx_tilemap,offset);
	242	contra_state *state = (contra_state *)space->machine->driver_data;
	243
	244	state->tx_cram[offset] = data;
	245	tilemap_mark_tile_dirty(state->tx_tilemap, offset);
220	246	}
221	247
222	248	WRITE8_HANDLER( contra_K007121_ctrl_0_w )
223	249	{
	250	contra_state *state = (contra_state *)space->machine->driver_data;
	251	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_1, 6);
	252
224	253	if (offset == 3)
225	254	{
226		if ((data&0x8)==0)
227		memcpy(private_spriteram,space->machine->generic.spriteram.u8+0x800,0x800);
	255	if ((data & 0x8) == 0)
	256	memcpy(state->spriteram, space->machine->generic.spriteram.u8 + 0x800, 0x800);
228	257	else
229		memcpy(private_spriteram,space->machine->generic.spriteram.u8,0x800);
	258	memcpy(state->spriteram, space->machine->generic.spriteram.u8, 0x800);
230	259	}
	260
231	261	if (offset == 6)
232	262	{
233		if (K007121_ctrlram[0][6] != data)
234		tilemap_mark_all_tiles_dirty( fg_tilemap );
	263	if (ctrl_6 != data)
	264	tilemap_mark_all_tiles_dirty(state->fg_tilemap);
235	265	}
	266
236	267	if (offset == 7)
237		tilemap_set_flip(fg_tilemap,(data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	268	tilemap_set_flip(state->fg_tilemap, (data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
238	269
239		K007121_ctrl_0_w(space,offset,data);
	270	k007121_ctrl_w(state->k007121_1, offset, data);
240	271	}
241	272
242	273	WRITE8_HANDLER( contra_K007121_ctrl_1_w )
243	274	{
	275	contra_state *state = (contra_state *)space->machine->driver_data;
	276	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_2, 6);
	277
244	278	if (offset == 3)
245	279	{
246		if ((data&0x8)==0)
247		memcpy(private_spriteram_2,space->machine->generic.spriteram.u8+0x2800,0x800);
	280	if ((data & 0x8) == 0)
	281	memcpy(state->spriteram_2, space->machine->generic.spriteram.u8 + 0x2800, 0x800);
248	282	else
249		memcpy(private_spriteram_2,space->machine->generic.spriteram.u8+0x2000,0x800);
	283	memcpy(state->spriteram_2, space->machine->generic.spriteram.u8 + 0x2000, 0x800);
250	284	}
251	285	if (offset == 6)
252	286	{
253		if (K007121_ctrlram[1][6] != data )
254		tilemap_mark_all_tiles_dirty( bg_tilemap );
	287	if (ctrl_6 != data )
	288	tilemap_mark_all_tiles_dirty(state->bg_tilemap);
255	289	}
256	290	if (offset == 7)
257		tilemap_set_flip(bg_tilemap,(data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	291	tilemap_set_flip(state->bg_tilemap, (data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
258	292
259		K007121_ctrl_1_w(space,offset,data);
	293	k007121_ctrl_w(state->k007121_2, offset, data);
260	294	}
261	295
262	296
r6740	r6741
269	303
270	304	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int bank )
271	305	{
	306	contra_state *state = (contra_state *)machine->driver_data;
	307	const device_config *k007121 = bank ? state->k007121_2 : state->k007121_1;
	308	int base_color = (k007121_ctrlram_r(k007121, 6) & 0x30) * 2;
272	309	const UINT8 *source;
273		int base_color = (K007121_ctrlram[bank][6]&0x30)*2;
274	310
275		if (bank==0) source=private_spriteram;
276		else source=private_spriteram_2;
	311	if (bank == 0)
	312	source = state->spriteram;
	313	else
	314	source = state->spriteram_2;
277	315
278		K007121_sprites_draw(bank,bitmap,cliprect,machine->gfx,machine->colortable,source,base_color,40,0,-1);
	316	k007121_sprites_draw(k007121, bitmap, cliprect, machine->gfx[bank], machine->colortable, source, base_color, 40, 0, -1);
279	317	}
280	318
281	319	VIDEO_UPDATE( contra )
282	320	{
283		rectangle bg_finalclip = bg_clip;
284		rectangle fg_finalclip = fg_clip;
285		rectangle tx_finalclip = tx_clip;
	321	contra_state *state = (contra_state *)screen->machine->driver_data;
	322	UINT8 ctrl_1_0 = k007121_ctrlram_r(state->k007121_1, 0);
	323	UINT8 ctrl_1_2 = k007121_ctrlram_r(state->k007121_1, 2);
	324	UINT8 ctrl_2_0 = k007121_ctrlram_r(state->k007121_2, 0);
	325	UINT8 ctrl_2_2 = k007121_ctrlram_r(state->k007121_2, 2);
	326	rectangle bg_finalclip = state->bg_clip;
	327	rectangle fg_finalclip = state->fg_clip;
	328	rectangle tx_finalclip = state->tx_clip;
286	329
287	330	sect_rect(&bg_finalclip, cliprect);
288	331	sect_rect(&fg_finalclip, cliprect);
r6740	r6741
290	333
291	334	set_pens(screen->machine);
292	335
293		tilemap_set_scrollx( fg_tilemap,0, K007121_ctrlram[0][0x00] - 40 );
294		tilemap_set_scrolly( fg_tilemap,0, K007121_ctrlram[0][0x02] );
295		tilemap_set_scrollx( bg_tilemap,0, K007121_ctrlram[1][0x00] - 40 );
296		tilemap_set_scrolly( bg_tilemap,0, K007121_ctrlram[1][0x02] );
	336	tilemap_set_scrollx(state->fg_tilemap, 0, ctrl_1_0 - 40);
	337	tilemap_set_scrolly(state->fg_tilemap, 0, ctrl_1_2);
	338	tilemap_set_scrollx(state->bg_tilemap, 0, ctrl_2_0 - 40);
	339	tilemap_set_scrolly(state->bg_tilemap, 0, ctrl_2_2);
297	340
298		tilemap_draw( bitmap,&bg_finalclip, bg_tilemap, 0 ,0);
299		tilemap_draw( bitmap,&fg_finalclip, fg_tilemap, 0 ,0);
300		draw_sprites( screen->machine,bitmap,cliprect, 0 );
301		draw_sprites( screen->machine,bitmap,cliprect, 1 );
302		tilemap_draw( bitmap,&tx_finalclip, tx_tilemap, 0 ,0);
	341	tilemap_draw(bitmap, &bg_finalclip, state->bg_tilemap, 0 ,0);
	342	tilemap_draw(bitmap, &fg_finalclip, state->fg_tilemap, 0 ,0);
	343	draw_sprites(screen->machine,bitmap,cliprect, 0);
	344	draw_sprites(screen->machine,bitmap,cliprect, 1);
	345	tilemap_draw(bitmap, &tx_finalclip, state->tx_tilemap, 0 ,0);
303	346	return 0;
304	347	}

src/mame/video/paradise.c

r6740	r6741
26	26	***************************************************************************/
27	27
28	28	#include "driver.h"
29		#include "paradise.h"
	29	#include "includes/paradise.h"
30	30
31	31	/* Variables that driver has access to: */
32	32

src/mame/video/dribling.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "dribling.h"
	8	#include "includes/dribling.h"
9	9
10	10
11	11	/*************************************

src/mame/video/balsente.c

r6740	r6741
7	7	****************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "balsente.h"
	10	#include "includes/balsente.h"
11	11
12	12
13	13	/*************************************
14	14	*
15		*  Statics
16		*
17		*************************************/
18
19		static UINT8 *local_videoram;
20		static UINT8 *sprite_data;
21		static UINT32 sprite_mask;
22		static UINT8 *sprite_bank[2];
23
24		static UINT8 palettebank_vis;
25
26
27
28		/*************************************
29		*
30	15	*  Video system start
31	16	*
32	17	*************************************/
33	18
34	19	VIDEO_START( balsente )
35	20	{
	21	balsente_state *state = (balsente_state *)machine->driver_data;
	22
36	23	/* reset the system */
37		palettebank_vis = 0;
38		sprite_bank[0] = memory_region(machine, "gfx1");
39		sprite_bank[1] = memory_region(machine, "gfx1") + 0x10000;
	24	state->palettebank_vis = 0;
	25	state->sprite_bank[0] = memory_region(machine, "gfx1");
	26	state->sprite_bank[1] = memory_region(machine, "gfx1") + 0x10000;
40	27
41		/* allocate a local copy of video RAM */
42		local_videoram = auto_alloc_array(machine, UINT8, 256 * 256);
43
44	28	/* determine sprite size */
45		sprite_data = memory_region(machine, "gfx1");
46		sprite_mask = memory_region_length(machine, "gfx1") - 1;
	29	state->sprite_data = memory_region(machine, "gfx1");
	30	state->sprite_mask = memory_region_length(machine, "gfx1") - 1;
47	31
48	32	/* register for saving */
49		state_save_register_global_pointer(machine, local_videoram, 256 * 256);
50		state_save_register_global(machine, palettebank_vis);
	33	state_save_register_global_array(machine, state->videoram);
	34	state_save_register_global(machine, state->palettebank_vis);
51	35	}
52	36
53	37
r6740	r6741
60	44
61	45	WRITE8_HANDLER( balsente_videoram_w )
62	46	{
	47	balsente_state *state = (balsente_state *)space->machine->driver_data;
	48
63	49	space->machine->generic.videoram.u8[offset] = data;
64	50
65	51	/* expand the two pixel values into two bytes */
66		local_videoram[offset * 2 + 0] = data >> 4;
67		local_videoram[offset * 2 + 1] = data & 15;
	52	state->videoram[offset * 2 + 0] = data >> 4;
	53	state->videoram[offset * 2 + 1] = data & 15;
68	54	}
69	55
70	56
r6740	r6741
77	63
78	64	WRITE8_HANDLER( balsente_palette_select_w )
79	65	{
	66	balsente_state *state = (balsente_state *)space->machine->driver_data;
	67
80	68	/* only update if changed */
81		if (palettebank_vis != (data & 3))
	69	if (state->palettebank_vis != (data & 3))
82	70	{
83	71	/* update the scanline palette */
84	72	video_screen_update_partial(space->machine->primary_screen, video_screen_get_vpos(space->machine->primary_screen) - 1 + BALSENTE_VBEND);
85		palettebank_vis = data & 3;
	73	state->palettebank_vis = data & 3;
86	74	}
87	75
88	76	logerror("balsente_palette_select_w(%d) scanline=%d\n", data & 3, video_screen_get_vpos(space->machine->primary_screen));
r6740	r6741
119	107
120	108	WRITE8_HANDLER( shrike_sprite_select_w )
121	109	{
122		if( sprite_data != sprite_bank[(data & 0x80 >> 7) ^ 1 ])
	110	balsente_state *state = (balsente_state *)space->machine->driver_data;
	111	if( state->sprite_data != state->sprite_bank[(data & 0x80 >> 7) ^ 1 ])
123	112	{
124	113	logerror( "shrike_sprite_select_w( 0x%02x )\n", data );
125	114	video_screen_update_partial(space->machine->primary_screen, video_screen_get_vpos(space->machine->primary_screen) - 1 + BALSENTE_VBEND);
126		sprite_data = sprite_bank[(data & 0x80 >> 7) ^ 1];
	115	state->sprite_data = state->sprite_bank[(data & 0x80 >> 7) ^ 1];
127	116	}
128	117
129	118	shrike_shared_6809_w( space, 1, data );
r6740	r6741
139	128
140	129	static void draw_one_sprite(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT8 *sprite)
141	130	{
	131	balsente_state *state = (balsente_state *)machine->driver_data;
142	132	int flags = sprite[0];
143	133	int image = sprite[1] | ((flags & 7) << 8);
144	134	int ypos = sprite[2] + 17 + BALSENTE_VBEND;
r6740	r6741
147	137	int x, y;
148	138
149	139	/* get a pointer to the source image */
150		src = &sprite_data[(64 * image) & sprite_mask];
	140	src = &state->sprite_data[(64 * image) & state->sprite_mask];
151	141	if (flags & 0x80) src += 4 * 15;
152	142
153	143	/* loop over y */
r6740	r6741
155	145	{
156	146	if (ypos >= (16 + BALSENTE_VBEND) && ypos >= cliprect->min_y && ypos <= cliprect->max_y)
157	147	{
158		const pen_t *pens = &machine->pens[palettebank_vis * 256];
159		UINT8 *old = &local_videoram[(ypos - BALSENTE_VBEND) * 256 + xpos];
	148	const pen_t *pens = &machine->pens[state->palettebank_vis * 256];
	149	UINT8 *old = &state->videoram[(ypos - BALSENTE_VBEND) * 256 + xpos];
160	150	int currx = xpos;
161	151
162	152	/* standard case */
r6740	r6741
222	212
223	213	VIDEO_UPDATE( balsente )
224	214	{
225		const pen_t *pens = &screen->machine->pens[palettebank_vis * 256];
	215	balsente_state *state = (balsente_state *)screen->machine->driver_data;
	216	const pen_t *pens = &screen->machine->pens[state->palettebank_vis * 256];
226	217	int y, i;
227	218
228	219	/* draw scanlines from the VRAM directly */
229	220	for (y = cliprect->min_y; y <= cliprect->max_y; y++)
230		draw_scanline8(bitmap, 0, y, 256, &local_videoram[(y - BALSENTE_VBEND) * 256], pens);
	221	draw_scanline8(bitmap, 0, y, 256, &state->videoram[(y - BALSENTE_VBEND) * 256], pens);
231	222
232	223	/* draw the sprite images */
233	224	for (i = 0; i < 40; i++)

src/mame/video/itech32.c

r6740	r6741
8	8	#include "driver.h"
9	9	#include "profiler.h"
10	10	#include "cpu/m68000/m68000.h"
11		#include "itech32.h"
	11	#include "includes/itech32.h"
12	12
13	13
14	14	/*************************************

src/mame/video/ashnojoe.c

r6740	r6741
6	6	*********************************************************************/
7	7
8	8	#include "driver.h"
9		#include "ashnojoe.h"
	9	#include "includes/ashnojoe.h"
10	10
11	11
12	12	static TILE_GET_INFO( get_joe_tile_info )

src/mame/video/mouser.c

r6740	r6741
15	15
16	16	#include "driver.h"
17	17
	18	UINT8 *mouser_videoram;
	19	UINT8 *mouser_colorram;
	20
18	21	PALETTE_INIT( mouser )
19	22	{
20	23	int i;
r6740	r6741
61	64	int flipx,flipy;
62	65
63	66	/* for every character in the Video RAM  */
64		for (offs = screen->machine->generic.videoram_size - 1;offs >= 0;offs--)
	67	for (offs = 0x3ff; offs >= 0; offs--)
65	68	{
66	69	int scrolled_y_position;
67	70	int color_offs;
r6740	r6741
89	92	color_offs = offs%32 + ((256 + 8*(offs/32) - spriteram[offs%32])%256)/8*32;
90	93
91	94	drawgfx_opaque(bitmap,cliprect,screen->machine->gfx[0],
92		screen->machine->generic.videoram.u8[offs] | (screen->machine->generic.colorram.u8[color_offs]>>5)*256 | ((screen->machine->generic.colorram.u8[color_offs]>>4)&1)*512,
93		screen->machine->generic.colorram.u8[color_offs]%16,
	95	mouser_videoram[offs] | (mouser_colorram[color_offs]>>5)*256 | ((mouser_colorram[color_offs]>>4)&1)*512,
	96	mouser_colorram[color_offs]%16,
94	97	flip_screen_x_get(screen->machine),flip_screen_y_get(screen->machine),
95	98	8*sx,scrolled_y_position);
96	99	}

src/mame/video/vertigo.c

r6740	r6741
46	46	#include "driver.h"
47	47	#include "profiler.h"
48	48	#include "video/vector.h"
49		#include "vertigo.h"
	49	#include "includes/vertigo.h"
50	50
51	51
52	52	/*************************************
r6740	r6741
213	213
214	214	void vertigo_vproc_init(running_machine *machine)
215	215	{
	216	state_save_register_item_array(machine, "vector_proc", NULL, 0, vs.sram);
	217	state_save_register_item(machine, "vector_proc", NULL, 0, vs.ramlatch);
	218	state_save_register_item(machine, "vector_proc", NULL, 0, vs.rom_adr);
	219	state_save_register_item(machine, "vector_proc", NULL, 0, vs.pc);
	220	state_save_register_item(machine, "vector_proc", NULL, 0, vs.ret);
	221
	222	state_save_register_item_array(machine, "vector_proc", NULL, 0, bsp.ram);
	223	state_save_register_item(machine, "vector_proc", NULL, 0, bsp.d);
	224	state_save_register_item(machine, "vector_proc", NULL, 0, bsp.q);
	225	state_save_register_item(machine, "vector_proc", NULL, 0, bsp.f);
	226	state_save_register_item(machine, "vector_proc", NULL, 0, bsp.y);
	227
	228	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.sreg);
	229	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.l1);
	230	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.l2);
	231	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.c_v);
	232	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.c_h);
	233	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.c_l);
	234	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.adder_s);
	235	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.adder_a);
	236	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.color);
	237	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.intensity);
	238	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.brez);
	239	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.vfin);
	240	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.hud1);
	241	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.hud2);
	242	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.vud1);
	243	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.vud2);
	244	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.hc1);
	245	state_save_register_item(machine, "vector_proc", NULL, 0, vgen.ven);
	246	}
	247
	248
	249	void vertigo_vproc_reset(running_machine *machine)
	250	{
216	251	int i;
217	252	UINT64 *mcode;
218	253
r6740	r6741
244	279	memset(&bsp, 0, sizeof(bsp));
245	280	memset(&vgen, 0, sizeof(vgen));
246	281	vgen.machine = machine;
247
248		state_save_register_item_array(machine, "vector_proc", NULL, 0, vs.sram);
249		state_save_register_item(machine, "vector_proc", NULL, 0, vs.ramlatch);
250		state_save_register_item(machine, "vector_proc", NULL, 0, vs.rom_adr);
251		state_save_register_item(machine, "vector_proc", NULL, 0, vs.pc);
252		state_save_register_item(machine, "vector_proc", NULL, 0, vs.ret);
253
254		state_save_register_item_array(machine, "vector_proc", NULL, 0, bsp.ram);
255		state_save_register_item(machine, "vector_proc", NULL, 0, bsp.d);
256		state_save_register_item(machine, "vector_proc", NULL, 0, bsp.q);
257		state_save_register_item(machine, "vector_proc", NULL, 0, bsp.f);
258		state_save_register_item(machine, "vector_proc", NULL, 0, bsp.y);
259
260		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.sreg);
261		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.l1);
262		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.l2);
263		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.c_v);
264		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.c_h);
265		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.c_l);
266		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.adder_s);
267		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.adder_a);
268		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.color);
269		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.intensity);
270		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.brez);
271		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.vfin);
272		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.hud1);
273		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.hud2);
274		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.vud1);
275		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.vud2);
276		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.hc1);
277		state_save_register_item(machine, "vector_proc", NULL, 0, vgen.ven);
278	282	}
279	283
280	284

src/mame/video/deco32.c

r6740	r6741
1	1	#include "driver.h"
2		#include "deco16ic.h"
3		#include "deco32.h"
	2	#include "includes/deco16ic.h"
	3	#include "includes/deco32.h"
4	4
5	5	UINT32 *deco32_pf1_data,*deco32_pf2_data,*deco32_pf3_data,*deco32_pf4_data;
6	6	UINT32 *deco32_pf12_control,*deco32_pf34_control;

src/mame/video/malzak.c

r6740	r6741
14	14
15	15	#include "driver.h"
16	16	#include "video/s2636.h"
	17	#include "video/saa5050.h"
	18	#include "includes/malzak.h"
17	19
18		static INT8 frame_count;
19	20
20		#define SAA5050_DBLHI   0x0001
21		#define SAA5050_SEPGR   0x0002
22		#define SAA5050_FLASH   0x0004
23		#define SAA5050_BOX      0x0008
24		#define SAA5050_GRAPH   0x0010
25		#define SAA5050_CONCEAL   0x0020
26		#define SAA5050_HOLDGR   0x0040
27
28		#define SAA5050_BLACK   0
29		#define SAA5050_WHITE   7
30
31		static struct
32		{
33		UINT16   saa5050_flags;
34		UINT8   saa5050_forecol;
35		UINT8   saa5050_backcol;
36		UINT8   saa5050_prvcol;
37		UINT8   saa5050_prvchr;
38		} saa5050_state;
39
40
41		UINT8* saa5050_vidram;  /* Video RAM for SAA 5050 */
42
43		int malzak_x;
44		int malzak_y;
45
46		static struct playfield
47		{
48		//int x;
49		//int y;
50		int code;
51		} field[256];
52
53	21	VIDEO_UPDATE( malzak )
54	22	{
55		int code, colour;
	23	malzak_state *state = (malzak_state *)screen->machine->driver_data;
56	24	int sx, sy;
57	25	int x,y;
58	26	bitmap_t *s2636_0_bitmap;
59	27	bitmap_t *s2636_1_bitmap;
60		const device_config *s2636_0 = devtag_get_device(screen->machine, "s2636_0");
61		const device_config *s2636_1 = devtag_get_device(screen->machine, "s2636_1");
62	28
63		bitmap_fill(bitmap,0,0);
	29	bitmap_fill(bitmap, 0, 0);
64	30
65		// SAA 5050 - Teletext character generator
66		for (sy = 24; sy >= 0; sy--)
67		{
68		/* Set start of line state */
69		saa5050_state.saa5050_flags = 0;
70		saa5050_state.saa5050_prvchr = 32;
71		saa5050_state.saa5050_forecol = SAA5050_WHITE;
72		saa5050_state.saa5050_prvcol = SAA5050_WHITE;
73		saa5050_state.saa5050_backcol = SAA5050_BLACK;
	31	saa5050_update(state->saa5050, bitmap, cliprect);
	32	saa5050_frame_advance(state->saa5050);
74	33
75		for (sx = 0; sx < 42; sx++)
76		{
77		int blank = 0;
78		code = saa5050_vidram[sy * 64 + sx];
79		if (code < 32)
80		{
81		switch (code) {
82		case 0x00:
83		blank = 1;  // code 0x00 should not display anything
84		break;      // unless HOLDGR is set
85		case 0x01: case 0x02: case 0x03: case 0x04:
86		case 0x05: case 0x06: case 0x07:
87		saa5050_state.saa5050_prvcol = saa5050_state.saa5050_forecol = code;
88		saa5050_state.saa5050_flags &= ~(SAA5050_GRAPH | SAA5050_CONCEAL);
89		break;
90		case 0x11: case 0x12: case 0x13: case 0x14:
91		case 0x15: case 0x16: case 0x17:
92		saa5050_state.saa5050_prvcol = (saa5050_state.saa5050_forecol =
93		(code & 0x07));
94		saa5050_state.saa5050_flags &= ~SAA5050_CONCEAL;
95		saa5050_state.saa5050_flags |= SAA5050_GRAPH;
96		break;
97		case 0x08:
98		saa5050_state.saa5050_flags |= SAA5050_FLASH;
99		break;
100		case 0x09:
101		saa5050_state.saa5050_flags &= ~SAA5050_FLASH;
102		break;
103		case 0x0a:
104		saa5050_state.saa5050_flags |= SAA5050_BOX;
105		break;
106		case 0x0b:
107		saa5050_state.saa5050_flags &= ~SAA5050_BOX;
108		break;
109		case 0x0c:
110		saa5050_state.saa5050_flags &= ~SAA5050_DBLHI;
111		break;
112		case 0x0d:
113		saa5050_state.saa5050_flags |= SAA5050_DBLHI;
114		break;
115		case 0x18:
116		saa5050_state.saa5050_flags |= SAA5050_CONCEAL;
117		break;
118		case 0x19:
119		saa5050_state.saa5050_flags |= SAA5050_SEPGR;
120		break;
121		case 0x1a:
122		saa5050_state.saa5050_flags &= ~SAA5050_SEPGR;
123		break;
124		case 0x1c:
125		saa5050_state.saa5050_backcol = SAA5050_BLACK;
126		break;
127		case 0x1d:
128		saa5050_state.saa5050_backcol = saa5050_state.saa5050_prvcol;
129		break;
130		case 0x1e:
131		saa5050_state.saa5050_flags |= SAA5050_HOLDGR;
132		break;
133		case 0x1f:
134		saa5050_state.saa5050_flags &= ~SAA5050_HOLDGR;
135		break;
136		}
137		if (saa5050_state.saa5050_flags & SAA5050_HOLDGR)
138		code = saa5050_state.saa5050_prvchr;
139		else
140		code = 32;
141		}
142
143		if (code & 0x80)
144		colour = (saa5050_state.saa5050_forecol << 3) | saa5050_state.saa5050_backcol;
145		else
146		colour = saa5050_state.saa5050_forecol | (saa5050_state.saa5050_backcol << 3);
147
148		if (saa5050_state.saa5050_flags & SAA5050_CONCEAL)
149		code = 32;
150		else if ((saa5050_state.saa5050_flags & SAA5050_FLASH) && (frame_count > 38))
151		code = 32;
152		else
153		{
154		saa5050_state.saa5050_prvchr = code;
155		if ((saa5050_state.saa5050_flags & SAA5050_GRAPH) && (code & 0x20))
156		{
157		code += (code & 0x40) ? 64 : 96;
158		if (saa5050_state.saa5050_flags & SAA5050_SEPGR)
159		code += 64;
160		}
161		}
162
163		if((blank == 0) || (saa5050_state.saa5050_flags & SAA5050_HOLDGR))
164		{
165		if (saa5050_state.saa5050_flags & SAA5050_DBLHI)
166		{
167		drawgfx_opaque (bitmap, cliprect, screen->machine->gfx[2], code, colour, 0, 0,
168		sx * 6, sy * 10);
169		drawgfx_opaque (bitmap, cliprect, screen->machine->gfx[3], code, colour, 0, 0,
170		sx * 6, (sy + 1) * 10);
171		}
172		else
173		{
174		drawgfx_opaque (bitmap, cliprect, screen->machine->gfx[1], code, colour, 0, 0,
175		sx * 6, sy * 10);
176		}
177		}
178		}
179		if (saa5050_state.saa5050_flags & SAA5050_DBLHI)
180		{
181		sy--;
182		saa5050_state.saa5050_flags &= ~SAA5050_DBLHI;
183		}
184		}
185
186		frame_count++;
187		if(frame_count > 50)
188		frame_count = 0;
189
190	34	// playfield - not sure exactly how this works...
191		for(x = 0;x < 16;x++)
192		for(y = 0; y < 16;y++)
	35	for (x = 0; x < 16; x++)
	36	for (y = 0; y < 16; y++)
193	37	{
194		sx = ((x*16-48) - malzak_x);
195		sy = ((y*16) - malzak_y);
	38	sx = ((x * 16 - 48) - state->malzak_x);
	39	sy = ((y * 16) - state->malzak_y);
196	40
197		if(sx < -271)
198		sx+=512;
199		if(sx < -15)
200		sx+=256;
	41	if (sx < -271)
	42	sx += 512;
	43	if (sx < -15)
	44	sx += 256;
201	45
202		drawgfx_transpen(bitmap,cliprect, screen->machine->gfx[0],field[x*16 + y].code,7,0,0,
203		sx, sy, 0);
	46	drawgfx_transpen(bitmap,cliprect, screen->machine->gfx[0], state->playfield_code[x * 16 + y], 7, 0, 0, sx, sy, 0);
204	47	}
205	48
206		/* update the S2636 chips */
207		s2636_0_bitmap = s2636_update(s2636_0, cliprect);
208		s2636_1_bitmap = s2636_update(s2636_1, cliprect);
	49	/* update the S2636 chips */
	50	s2636_0_bitmap = s2636_update(state->s2636_0, cliprect);
	51	s2636_1_bitmap = s2636_update(state->s2636_1, cliprect);
209	52
210	53	/* copy the S2636 images into the main bitmap */
211	54	{
r6740	r6741
234	77
235	78	WRITE8_HANDLER( malzak_playfield_w )
236	79	{
237		int tile = ((malzak_x / 16) * 16) + (offset / 16);
	80	malzak_state *state = (malzak_state *)space->machine->driver_data;
	81	int tile = ((state->malzak_x / 16) * 16) + (offset / 16);
238	82
239		//  field[tile].x = malzak_x / 16;
240		//  field[tile].y = malzak_y;
241		field[tile].code = (data & 0x1f);
242		logerror("GFX: 0x16%02x write 0x%02x\n",offset,data);
	83	//  state->playfield_x[tile] = state->malzak_x / 16;
	84	//  state->playfield_y[tile] = state->malzak_y;
	85	state->playfield_code[tile] = (data & 0x1f);
	86	logerror("GFX: 0x16%02x write 0x%02x\n", offset, data);
243	87	}

src/mame/video/gaiden.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "gaiden.h"
	8	#include "includes/gaiden.h"
9	9
10	10	/***************************************************************************
11	11

src/mame/video/fastfred.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "video/resnet.h"
11		#include "fastfred.h"
	11	#include "includes/fastfred.h"
12	12	#include "includes/galaxold.h"
13	13
14	14	UINT8 *fastfred_videoram;

src/mame/video/news.c

r6740	r6741
1	1	#include "driver.h"
2		#include "news.h"
	2	#include "includes/news.h"
3	3
4	4
5	5	UINT8 *news_fgram;

src/mame/video/shuuz.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "shuuz.h"
	8	#include "includes/shuuz.h"
9	9
10	10
11	11

src/mame/video/finalizr.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "finalizr.h"
	10	#include "includes/finalizr.h"
11	11
12	12
13	13	PALETTE_INIT( finalizr )

src/mame/video/hexa.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "hexa.h"
	10	#include "includes/hexa.h"
11	11
12	12	WRITE8_HANDLER( hexa_videoram_w )
13	13	{

src/mame/video/cloak.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "video/resnet.h"
9		#include "cloak.h"
	9	#include "includes/cloak.h"
10	10
11	11
12	12	#define NUM_PENS   (0x40)

src/mame/video/namcona1.c

r6740	r6741
7	7	*/
8	8
9	9	#include "driver.h"
10		#include "namcona1.h"
	10	#include "includes/namcona1.h"
11	11
12	12	#define NAMCONA1_NUM_TILEMAPS 4
13	13

src/mame/video/foodf.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "foodf.h"
	8	#include "includes/foodf.h"
9	9	#include "video/resnet.h"
10	10
11	11

src/mame/video/bsktball.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "bsktball.h"
	8	#include "includes/bsktball.h"
9	9
10	10
11	11	WRITE8_HANDLER( bsktball_videoram_w )

src/mame/video/appoooh.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "appoooh.h"
	10	#include "includes/appoooh.h"
11	11
12	12	/***************************************************************************
13	13

src/mame/video/psx.c

r6740	r6741
739	739	}
740	740
741	741	// icky!!!
742		state_save_register_memory( machine, "globals", NULL, 0, "m_packet", (UINT8 *)&m_packet, 1, sizeof( m_packet ) );
	742	state_save_register_memory( machine, "globals", NULL, 0, "m_packet", (UINT8 *)&m_packet, 1, sizeof( m_packet ), __FILE__, __LINE__ );
743	743
744	744	state_save_register_global_pointer(machine,  m_p_vram, m_n_vram_size );
745	745	state_save_register_global(machine,  m_n_gpu_buffer_offset );
r6740	r6741
1154	1154	#define FLATTEXTUREDRECTANGLEUPDATE \
1155	1155	n_u += n_du;
1156	1156
	1157	#define TEXTURE_LOOP \
	1158	while( n_distance > 0 ) \
	1159	{
	1160
	1161	#define TEXTURE_ENDLOOP \
	1162	}
	1163
1157	1164	#define TEXTURE4BIT( TXV, TXU ) \
1158		while( n_distance > 0 ) \
1159		{ \
	1165	TEXTURE_LOOP \
1160	1166	n_bgr = p_clut[ ( *( m_p_p_vram[ n_ty + TXV ] + n_tx + ( TXU >> 2 ) ) >> ( ( TXU & 0x03 ) << 2 ) ) & 0x0f ];
1161	1167
1162	1168	#define TEXTURE8BIT( TXV, TXU ) \
1163		while( n_distance > 0 ) \
1164		{ \
	1169	TEXTURE_LOOP \
1165	1170	n_bgr = p_clut[ ( *( m_p_p_vram[ n_ty + TXV ] + n_tx + ( TXU >> 1 ) ) >> ( ( TXU & 0x01 ) << 3 ) ) & 0xff ];
1166	1171
1167	1172	#define TEXTURE15BIT( TXV, TXU ) \
1168		while( n_distance > 0 ) \
1169		{ \
	1173	TEXTURE_LOOP \
1170	1174	n_bgr = *( m_p_p_vram[ n_ty + TXV ] + n_tx + TXU );
1171	1175
1172	1176	#define TEXTUREWINDOW4BIT( TXV, TXU ) TEXTURE4BIT( ( TXV & m_n_twh ), ( TXU & m_n_tww ) )
r6740	r6741
1174	1178	#define TEXTUREWINDOW15BIT( TXV, TXU ) TEXTURE15BIT( ( TXV & m_n_twh ), ( TXU & m_n_tww ) )
1175	1179
1176	1180	#define TEXTUREINTERLEAVED4BIT( TXV, TXU ) \
1177		while( n_distance > 0 ) \
1178		{ \
	1181	TEXTURE_LOOP \
1179	1182	int n_xi = ( ( TXU >> 2 ) & ~0x3c ) + ( ( TXV << 2 ) & 0x3c ); \
1180	1183	int n_yi = ( TXV & ~0xf ) + ( ( TXU >> 4 ) & 0xf ); \
1181	1184	n_bgr = p_clut[ ( *( m_p_p_vram[ n_ty + n_yi ] + n_tx + n_xi ) >> ( ( TXU & 0x03 ) << 2 ) ) & 0x0f ];
1182	1185
1183	1186	#define TEXTUREINTERLEAVED8BIT( TXV, TXU ) \
1184		while( n_distance > 0 ) \
1185		{ \
	1187	TEXTURE_LOOP \
1186	1188	int n_xi = ( ( TXU >> 1 ) & ~0x78 ) + ( ( TXU << 2 ) & 0x40 ) + ( ( TXV << 3 ) & 0x38 ); \
1187	1189	int n_yi = ( TXV & ~0x7 ) + ( ( TXU >> 5 ) & 0x7 ); \
1188	1190	n_bgr = p_clut[ ( *( m_p_p_vram[ n_ty + n_yi ] + n_tx + n_xi ) >> ( ( TXU & 0x01 ) << 3 ) ) & 0xff ];
1189	1191
1190	1192	#define TEXTUREINTERLEAVED15BIT( TXV, TXU ) \
1191		while( n_distance > 0 ) \
1192		{ \
	1193	TEXTURE_LOOP \
1193	1194	int n_xi = TXU; \
1194	1195	int n_yi = TXV; \
1195	1196	n_bgr = *( m_p_p_vram[ n_ty + n_yi ] + n_tx + n_xi );
r6740	r6741
1209	1210	p_vram++; \
1210	1211	PIXELUPDATE \
1211	1212	n_distance--; \
1212		}
	1213	TEXTURE_ENDLOOP
1213	1214
1214	1215	#define TRANSPARENTPIXEL( PIXELUPDATE ) \
1215	1216	if( n_bgr != 0 ) \
r6740	r6741
1232	1233	p_vram++; \
1233	1234	PIXELUPDATE \
1234	1235	n_distance--; \
1235		}
	1236	TEXTURE_ENDLOOP
1236	1237
1237	1238	#define TEXTUREFILL( PIXELUPDATE, TXU, TXV ) \
1238	1239	if( n_distance > ( (INT32)m_n_drawarea_x2 - n_x ) + 1 ) \

src/mame/video/aliens.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	static int layer_colorbase[3],sprite_colorbase;
r6740	r6741
10	10
11	11	***************************************************************************/
12	12
13		static void tile_callback(int layer,int bank,int *code,int *color, int *flags, int *priority)
	13	void aliens_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color, int *flags, int *priority)
14	14	{
15	15	*code |= ((*color & 0x3f) << 8) | (bank << 14);
16	16	*color = layer_colorbase[layer] + ((*color & 0xc0) >> 6);
r6740	r6741
23	23
24	24	***************************************************************************/
25	25
26		static void sprite_callback(int *code,int *color,int *priority_mask,int *shadow)
	26	void aliens_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow)
27	27	{
28	28	/* The PROM allows for mixed priorities, where sprites would have */
29	29	/* priority over text but not on one or both of the other two planes. */
r6740	r6741
59	59	layer_colorbase[1] = 4;
60	60	layer_colorbase[2] = 8;
61	61	sprite_colorbase = 16;
62		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
63		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
64	62	}
65	63
66	64
r6740	r6741
73	71
74	72	VIDEO_UPDATE( aliens )
75	73	{
76		K052109_tilemap_update();
	74	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	75	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
77	76
	77	k052109_tilemap_update(k052109);
	78
78	79	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
79	80	bitmap_fill(bitmap,cliprect,layer_colorbase[1] * 16);
80		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,1);
81		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,2);
82		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,4);
83	81
84		K051960_sprites_draw(screen->machine,bitmap,cliprect,-1,-1);
	82	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0,1);
	83	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0,2);
	84	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0,4);
	85
	86	k051960_sprites_draw(k051960, bitmap,cliprect,-1,-1);
85	87	return 0;
86	88	}

src/mame/video/88games.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
	3	#include "includes/88games.h"
3	4
4	5
5		int k88games_priority;
6
7		static int layer_colorbase[3],sprite_colorbase,zoom_colorbase;
8
9
10
11	6	/***************************************************************************
12	7
13	8	Callbacks for the K052109
14	9
15	10	***************************************************************************/
16	11
17		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	12	void _88games_tile_callback( running_machine *machine, int layer, int bank, int *code, int *color, int *flags, int *priority )
18	13	{
	14	_88games_state *state = (_88games_state *)machine->driver_data;
	15
19	16	*code |= ((*color & 0x0f) << 8) | (bank << 12);
20		*color = layer_colorbase[layer] + ((*color & 0xf0) >> 4);
	17	*color = state->layer_colorbase[layer] + ((*color & 0xf0) >> 4);
21	18	}
22	19
23	20
r6740	r6741
27	24
28	25	***************************************************************************/
29	26
30		static void sprite_callback(int *code,int *color,int *priority,int *shadow)
	27	void _88games_sprite_callback( running_machine *machine, int *code, int *color, int *priority, int *shadow )
31	28	{
	29	_88games_state *state = (_88games_state *)machine->driver_data;
	30
32	31	*priority = (*color & 0x20) >> 5;   /* ??? */
33		*color = sprite_colorbase + (*color & 0x0f);
	32	*color = state->sprite_colorbase + (*color & 0x0f);
34	33	}
35	34
36	35
r6740	r6741
40	39
41	40	***************************************************************************/
42	41
43		static void zoom_callback(int *code,int *color,int *flags)
	42	void _88games_zoom_callback( running_machine *machine, int *code, int *color, int *flags )
44	43	{
	44	_88games_state *state = (_88games_state *)machine->driver_data;
	45
45	46	*flags = (*color & 0x40) ? TILE_FLIPX : 0;
46	47	*code |= ((*color & 0x07) << 8);
47		*color = zoom_colorbase + ((*color & 0x38) >> 3) + ((*color & 0x80) >> 4);
	48	*color = state->zoom_colorbase + ((*color & 0x38) >> 3) + ((*color & 0x80) >> 4);
48	49	}
49	50
50
51	51	/***************************************************************************
52	52
53		Start the video hardware emulation.
54
55		***************************************************************************/
56
57		VIDEO_START( 88games )
58		{
59		layer_colorbase[0] = 64;
60		layer_colorbase[1] = 0;
61		layer_colorbase[2] = 16;
62		sprite_colorbase = 32;
63		zoom_colorbase = 48;
64		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
65		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
66		K051316_vh_start_0(machine,"gfx3",4,FALSE,0,zoom_callback);
67
68		state_save_register_global_array(machine, layer_colorbase);
69		state_save_register_global(machine, k88games_priority);
70		state_save_register_global(machine, sprite_colorbase);
71		state_save_register_global(machine, zoom_colorbase);
72		}
73
74
75
76		/***************************************************************************
77
78	53	Display refresh
79	54
80	55	***************************************************************************/
81	56
82	57	VIDEO_UPDATE( 88games )
83	58	{
84		K052109_tilemap_update();
	59	_88games_state *state = (_88games_state *)screen->machine->driver_data;
85	60
86		if (k88games_priority)
	61	k052109_tilemap_update(state->k052109);
	62
	63	if (state->k88games_priority)
87	64	{
88		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],TILEMAP_DRAW_OPAQUE,0);
89		K051960_sprites_draw(screen->machine,bitmap,cliprect,1,1);
90		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,0);
91		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,0);
92		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
93		K051316_zoom_draw_0(bitmap,cliprect,0,0);
	65	k052109_tilemap_draw(state->k052109, bitmap, cliprect, 0, TILEMAP_DRAW_OPAQUE, 0);   // tile 0
	66	k051960_sprites_draw(state->k051960, bitmap,cliprect, 1, 1);
	67	k052109_tilemap_draw(state->k052109, bitmap, cliprect, 2, 0, 0);   // tile 2
	68	k052109_tilemap_draw(state->k052109, bitmap, cliprect, 1, 0, 0);   // tile 1
	69	k051960_sprites_draw(state->k051960, bitmap, cliprect, 0, 0);
	70	k051316_zoom_draw(state->k051316, bitmap, cliprect, 0, 0);
94	71	}
95	72	else
96	73	{
97		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],TILEMAP_DRAW_OPAQUE,0);
98		K051316_zoom_draw_0(bitmap,cliprect,0,0);
99		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
100		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,0);
101		K051960_sprites_draw(screen->machine,bitmap,cliprect,1,1);
102		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,0);
	74	k052109_tilemap_draw(state->k052109, bitmap, cliprect, 2, TILEMAP_DRAW_OPAQUE, 0);   // tile 2
	75	k051316_zoom_draw(state->k051316, bitmap, cliprect, 0, 0);
	76	k051960_sprites_draw(state->k051960, bitmap, cliprect, 0, 0);
	77	k052109_tilemap_draw(state->k052109, bitmap, cliprect, 1, 0, 0);   // tile 1
	78	k051960_sprites_draw(state->k051960, bitmap, cliprect, 1, 1);
	79	k052109_tilemap_draw(state->k052109, bitmap, cliprect, 0, 0, 0);   // tile 0
103	80	}
	81
104	82	return 0;
105	83	}

src/mame/video/kaneko16.c

r6740	r6741
32	32	**************************************************************************/
33	33
34	34	#include "driver.h"
35		#include "kaneko16.h"
	35	#include "includes/kaneko16.h"
36	36	#include "kan_pand.h"
37	37
38	38	static UINT16 kaneko16_disp_enable;

src/mame/video/dbz.c

r6740	r6741
9	9
10	10
11	11	#include "driver.h"
12		#include "video/konamiic.h"
	12	#include "video/konicdev.h"
13	13
14	14	static tilemap *dbz_bg1_tilemap, *dbz_bg2_tilemap;
15	15	UINT16 *dbz_bg1_videoram, *dbz_bg2_videoram;
16	16	static int sprite_colorbase, layer_colorbase[6], layer[5], layerpri[5];
17	17
18		static void dbz_tile_callback(int layer, int *code, int *color, int *flags)
	18	void dbz_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags)
19	19	{
20	20	*color = (layer_colorbase[layer] << 1) + ((*color & 0x3c) >> 2);
21	21	}
22	22
23		static void dbz_sprite_callback(int *code, int *color, int *priority_mask)
	23	void dbz_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask)
24	24	{
25	25	int pri = (*color & 0x3c0) >> 5;
26	26
r6740	r6741
93	93
94	94	VIDEO_START( dbz )
95	95	{
96		K053251_vh_start(machine);
97		K056832_vh_start(machine, "gfx1", K056832_BPP_4, 1, NULL, dbz_tile_callback, 1);
98		K053247_vh_start(machine, "gfx2", -52, 16, NORMAL_PLANE_ORDER, dbz_sprite_callback);
	96	const device_config *k056832 = devtag_get_device(machine, "k056832");
	97	const device_config *k053246 = devtag_get_device(machine, "k053246");
99	98
100		dbz_bg1_tilemap = tilemap_create(machine, get_dbz_bg1_tile_info,tilemap_scan_rows, 16, 16,64,32);
101		dbz_bg2_tilemap = tilemap_create(machine, get_dbz_bg2_tile_info,tilemap_scan_rows, 16, 16,64,32);
	99	dbz_bg1_tilemap = tilemap_create(machine, get_dbz_bg1_tile_info, tilemap_scan_rows, 16, 16, 64, 32);
	100	dbz_bg2_tilemap = tilemap_create(machine, get_dbz_bg2_tile_info, tilemap_scan_rows, 16, 16, 64, 32);
102	101
103		tilemap_set_transparent_pen(dbz_bg1_tilemap,0);
104		tilemap_set_transparent_pen(dbz_bg2_tilemap,0);
	102	tilemap_set_transparent_pen(dbz_bg1_tilemap, 0);
	103	tilemap_set_transparent_pen(dbz_bg2_tilemap, 0);
105	104
106		K053936_wraparound_enable(0, 1);
107		K053936_set_offset(0, -46, -16);
108
109		K053936_wraparound_enable(1, 1);
110		K053936_set_offset(1, -46, -16);
111
112	105	if (!strcmp(machine->gamedrv->name, "dbz"))
113		K056832_set_LayerOffset(0, -34, -16);
	106	k056832_set_layer_offs(k056832, 0, -34, -16);
114	107	else
115		K056832_set_LayerOffset(0, -35, -16);
	108	k056832_set_layer_offs(k056832, 0, -35, -16);
116	109
117		K056832_set_LayerOffset(1, -31, -16);
118		K056832_set_LayerOffset(3, -31, -16); //?
	110	k056832_set_layer_offs(k056832, 1, -31, -16);
	111	k056832_set_layer_offs(k056832, 3, -31, -16); //?
119	112
120		K053247_set_SpriteOffset(-87,32);
	113	k053247_set_sprite_offs(k053246, -87, 32);
121	114	}
122	115
123	116	VIDEO_UPDATE( dbz )
124	117	{
125	118	static const int K053251_CI[6] = { K053251_CI3, K053251_CI4, K053251_CI4, K053251_CI4, K053251_CI2, K053251_CI1 };
	119	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
	120	const device_config *k053246 = devtag_get_device(screen->machine, "k053246");
	121	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	122	const device_config *k053936_1 = devtag_get_device(screen->machine, "k053936_1");
	123	const device_config *k053936_2 = devtag_get_device(screen->machine, "k053936_2");
126	124	int plane, new_colorbase;
127	125
128		sprite_colorbase = K053251_get_palette_index(K053251_CI0);
	126	sprite_colorbase = k053251_get_palette_index(k053251, K053251_CI0);
129	127
130		for (plane=0; plane<6; plane++)
	128	for (plane = 0; plane < 6; plane++)
131	129	{
132		new_colorbase = K053251_get_palette_index(K053251_CI[plane]);
	130	new_colorbase = k053251_get_palette_index(k053251, K053251_CI[plane]);
133	131	if (layer_colorbase[plane] != new_colorbase)
134	132	{
135	133	layer_colorbase[plane] = new_colorbase;
136		if(plane <= 3)
137		K056832_mark_plane_dirty(plane);
	134	if (plane <= 3)
	135	k056832_mark_plane_dirty(k056832, plane);
138	136	else if(plane == 4)
139	137	tilemap_mark_all_tiles_dirty(dbz_bg1_tilemap);
140	138	else if(plane == 5)
r6740	r6741
145	143	//layers priority
146	144
147	145	layer[0] = 0;
148		layerpri[0] = K053251_get_priority(K053251_CI3);
	146	layerpri[0] = k053251_get_priority(k053251, K053251_CI3);
149	147	layer[1] = 1;
150		layerpri[1] = K053251_get_priority(K053251_CI4);
	148	layerpri[1] = k053251_get_priority(k053251, K053251_CI4);
151	149	layer[2] = 3;
152		layerpri[2] = K053251_get_priority(K053251_CI0);
	150	layerpri[2] = k053251_get_priority(k053251, K053251_CI0);
153	151	layer[3] = 4;
154		layerpri[3] = K053251_get_priority(K053251_CI2);
	152	layerpri[3] = k053251_get_priority(k053251, K053251_CI2);
155	153	layer[4] = 5;
156		layerpri[4] = K053251_get_priority(K053251_CI1);
	154	layerpri[4] = k053251_get_priority(k053251, K053251_CI1);
157	155
158	156	sortlayers(layer, layerpri);
159	157
160	158	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
161	159
162		for(plane = 0; plane < 5; plane++)
	160	for (plane = 0; plane < 5; plane++)
163	161	{
164	162	int flag, pri;
165	163
166		if(plane == 0)
	164	if (plane == 0)
167	165	{
168	166	flag = TILEMAP_DRAW_OPAQUE;
169	167	pri = 0;
r6740	r6741
175	173	}
176	174
177	175	if(layer[plane] == 4)
178		K053936_1_zoom_draw(bitmap,cliprect,dbz_bg1_tilemap,flag,pri,1);
	176	k053936_zoom_draw(k053936_2, bitmap, cliprect, dbz_bg1_tilemap, flag, pri, 1);
179	177	else if(layer[plane] == 5)
180		K053936_0_zoom_draw(bitmap,cliprect,dbz_bg2_tilemap,flag,pri,1);
	178	k053936_zoom_draw(k053936_1, bitmap, cliprect, dbz_bg2_tilemap, flag, pri, 1);
181	179	else
182		K056832_tilemap_draw(screen->machine, bitmap,cliprect,layer[plane],flag,pri);
	180	k056832_tilemap_draw(k056832, bitmap, cliprect, layer[plane], flag, pri);
183	181	}
184	182
185		K053247_sprites_draw(screen->machine, bitmap, cliprect);
	183	k053247_sprites_draw(k053246, bitmap, cliprect);
186	184	return 0;
187	185	}
188	186

src/mame/video/goldstar.c

r6740	r6741
9	9	#include "driver.h"
10	10
11	11	UINT8 *goldstar_reel1_scroll, *goldstar_reel2_scroll, *goldstar_reel3_scroll;
	12	UINT8 *goldstar_fg_atrram;
	13	UINT8 *goldstar_fg_vidram;
12	14
13	15	static int bgcolor;
14	16
r6740	r6741
55	57
56	58	WRITE8_HANDLER( goldstar_fg_vidram_w )
57	59	{
58		space->machine->generic.videoram.u8[offset] = data;
	60	goldstar_fg_vidram[offset] = data;
59	61	tilemap_mark_tile_dirty(goldstar_fg_tilemap,offset);
60	62	}
61	63
62	64	WRITE8_HANDLER( goldstar_fg_atrram_w )
63	65	{
64		space->machine->generic.colorram.u8[offset] = data;
	66	goldstar_fg_atrram[offset] = data;
65	67	tilemap_mark_tile_dirty(goldstar_fg_tilemap,offset);
66	68	}
67	69
68	70	static TILE_GET_INFO( get_goldstar_fg_tile_info )
69	71	{
70		int code = machine->generic.videoram.u8[tile_index];
71		int attr = machine->generic.colorram.u8[tile_index];
	72	int code = goldstar_fg_vidram[tile_index];
	73	int attr = goldstar_fg_atrram[tile_index];
72	74
73	75	SET_TILE_INFO(
74	76	0,
r6740	r6741
80	82	// colour / high tile bits are swapped around
81	83	static TILE_GET_INFO( get_cherrym_fg_tile_info )
82	84	{
83		int code = machine->generic.videoram.u8[tile_index];
84		int attr = machine->generic.colorram.u8[tile_index];
	85	int code = goldstar_fg_vidram[tile_index];
	86	int attr = goldstar_fg_atrram[tile_index];
85	87
86	88	SET_TILE_INFO(
87	89	0,

src/mame/video/gauntlet.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "machine/atarigen.h"
9		#include "gauntlet.h"
	9	#include "includes/gauntlet.h"
10	10
11	11
12	12
r6740	r6741
104	104
105	105	/* set up the base color for the playfield */
106	106	state->playfield_color_bank = state->vindctr2_screen_refresh ? 0 : 1;
	107
	108	/* save states */
	109	state_save_register_global(machine, state->playfield_tile_bank);
	110	state_save_register_global(machine, state->playfield_color_bank);
107	111	}
108	112
109	113

src/mame/video/20pacgal.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "20pacgal.h"
	10	#include "includes/20pacgal.h"
11	11
12	12
13	13	#define SCREEN_HEIGHT   (224)

src/mame/video/seicross.c

r6740	r6741
10	10
11	11	UINT8 *seicross_row_scroll;
12	12
	13	UINT8 *seicross_videoram;
	14	UINT8 *seicross_colorram;
13	15	static tilemap *bg_tilemap;
14	16
15	17	/***************************************************************************
r6740	r6741
58	60
59	61	WRITE8_HANDLER( seicross_videoram_w )
60	62	{
61		space->machine->generic.videoram.u8[offset] = data;
	63	seicross_videoram[offset] = data;
62	64	tilemap_mark_tile_dirty(bg_tilemap, offset);
63	65	}
64	66
r6740	r6741
69	71	/* region. */
70	72	offset &= 0xffdf;
71	73
72		space->machine->generic.colorram.u8[offset] = data;
73		space->machine->generic.colorram.u8[offset + 0x20] = data;
	74	seicross_colorram[offset] = data;
	75	seicross_colorram[offset + 0x20] = data;
74	76
75	77	tilemap_mark_tile_dirty(bg_tilemap, offset);
76	78	tilemap_mark_tile_dirty(bg_tilemap, offset + 0x20);
r6740	r6741
78	80
79	81	static TILE_GET_INFO( get_bg_tile_info )
80	82	{
81		int code = machine->generic.videoram.u8[tile_index] + ((machine->generic.colorram.u8[tile_index] & 0x10) << 4);
82		int color = machine->generic.colorram.u8[tile_index] & 0x0f;
83		int flags = ((machine->generic.colorram.u8[tile_index] & 0x40) ? TILE_FLIPX : 0) | ((machine->generic.colorram.u8[tile_index] & 0x80) ? TILE_FLIPY : 0);
	83	int code = seicross_videoram[tile_index] + ((seicross_colorram[tile_index] & 0x10) << 4);
	84	int color = seicross_colorram[tile_index] & 0x0f;
	85	int flags = ((seicross_colorram[tile_index] & 0x40) ? TILE_FLIPX : 0) | ((seicross_colorram[tile_index] & 0x80) ? TILE_FLIPY : 0);
84	86
85	87	SET_TILE_INFO(0, code, color, flags);
86	88	}

src/mame/video/system16.c

r6740	r6741
25	25
26	26	***************************************************************************/
27	27	#include "driver.h"
28		#include "system16.h"
	28	#include "includes/system16.h"
29	29	#include "video/resnet.h"
30	30	#include "video/segaic16.h"
31	31

src/mame/video/atarimo.c

r6740	r6741
295	295	state_save_register_item(machine, "atarimo", NULL, index, mo->dirtyheight);
296	296	#endif
297	297
298		state_save_register_bitmap(machine, "atarimo", NULL, index, "bitmap", mo->bitmap);
	298	state_save_register_bitmap(machine, "atarimo", NULL, index, "bitmap", mo->bitmap, __FILE__, __LINE__);
299	299
300		state_save_register_memory(machine, "atarimo", NULL, index, "spriteram", mo->spriteram, sizeof(atarimo_entry), mo->spriteramsize);
	300	state_save_register_memory(machine, "atarimo", NULL, index, "spriteram", mo->spriteram, sizeof(atarimo_entry), mo->spriteramsize, __FILE__, __LINE__);
301	301
302	302	state_save_register_item_pointer(machine, "atarimo", NULL, index, mo->codelookup, round_to_powerof2(mo->codemask.mask));
303	303

src/mame/video/deniam.c

r6740	r6741
1	1	#include "driver.h"
2		#include "deniam.h"
	2	#include "includes/deniam.h"
3	3
4	4
5	5	static void deniam_common_init( running_machine *machine )

src/mame/video/redalert.c

r6740	r6741
9	9
10	10	#include "driver.h"
11	11	#include "video/resnet.h"
12		#include "redalert.h"
	12	#include "includes/redalert.h"
13	13
14	14
15	15	#define NUM_CHARMAP_PENS   0x200

src/mame/video/mcr3.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "mcr.h"
	8	#include "includes/mcr.h"
9	9
10	10
11	11

src/mame/video/simpsons.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3	#include "includes/simpsons.h"
4	4
5	5	static int bg_colorbase,sprite_colorbase,layer_colorbase[3];
r6740	r6741
13	13
14	14	***************************************************************************/
15	15
16		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	16	void simpsons_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
17	17	{
18	18	*code |= ((*color & 0x3f) << 8) | (bank << 14);
19	19	*color = layer_colorbase[layer] + ((*color & 0xc0) >> 6);
r6740	r6741
26	26
27	27	***************************************************************************/
28	28
29		static void sprite_callback(int *code,int *color,int *priority_mask)
	29	void simpsons_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
30	30	{
31	31	int pri = (*color & 0x0f80) >> 6;   /* ??????? */
32	32	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
40	40
41	41	/***************************************************************************
42	42
43		Start the video hardware emulation.
44
45		***************************************************************************/
46
47		VIDEO_START( simpsons )
48		{
49		K053251_vh_start(machine);
50
51		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
52		K053247_vh_start(machine,"gfx2",53,23,NORMAL_PLANE_ORDER,sprite_callback);
53		}
54
55		/***************************************************************************
56
57	43	Extra video banking
58	44
59	45	***************************************************************************/
60	46
61	47	static READ8_HANDLER( simpsons_K052109_r )
62	48	{
63		return K052109_r(space,offset + 0x2000);
	49	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	50	return k052109_r(k052109, offset + 0x2000);
64	51	}
65	52
66	53	static WRITE8_HANDLER( simpsons_K052109_w )
67	54	{
68		K052109_w(space,offset + 0x2000,data);
	55	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	56	k052109_w(k052109, offset + 0x2000, data);
69	57	}
70	58
71	59	static READ8_HANDLER( simpsons_K053247_r )
r6740	r6741
103	91
104	92	void simpsons_video_banking(running_machine *machine, int bank)
105	93	{
	94	const device_config *k052109 = devtag_get_device(machine, "k052109");
	95	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	96
106	97	if (bank & 1)
107	98	{
108		memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0, "bank5");
109		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0, paletteram_xBBBBBGGGGGRRRRR_be_w);
	99	memory_install_read_bank(space, 0x0000, 0x0fff, 0, 0, "bank5");
	100	memory_install_write8_handler(space, 0x0000, 0x0fff, 0, 0, paletteram_xBBBBBGGGGGRRRRR_be_w);
110	101	memory_set_bankptr(machine, "bank5", machine->generic.paletteram.v);
111	102	}
112	103	else
113		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0, K052109_r, K052109_w);
	104	memory_install_readwrite8_device_handler(space, k052109, 0x0000, 0x0fff, 0, 0, k052109_r, k052109_w);
114	105
115	106	if (bank & 2)
116		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, simpsons_K053247_r, simpsons_K053247_w);
	107	memory_install_readwrite8_handler(space, 0x2000, 0x3fff, 0, 0, simpsons_K053247_r, simpsons_K053247_w);
117	108	else
118		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, simpsons_K052109_r, simpsons_K052109_w);
	109	memory_install_readwrite8_handler(space, 0x2000, 0x3fff, 0, 0, simpsons_K052109_r, simpsons_K052109_w);
119	110	}
120	111
121	112
r6740	r6741
144	135
145	136	VIDEO_UPDATE( simpsons )
146	137	{
	138	const device_config *k053246 = devtag_get_device(screen->machine, "k053246");
	139	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	140	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
147	141	int layer[3];
148	142
	143	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI0);
	144	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	145	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	146	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI3);
	147	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI4);
149	148
150		bg_colorbase       = K053251_get_palette_index(K053251_CI0);
151		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
152		layer_colorbase[0] = K053251_get_palette_index(K053251_CI2);
153		layer_colorbase[1] = K053251_get_palette_index(K053251_CI3);
154		layer_colorbase[2] = K053251_get_palette_index(K053251_CI4);
	149	k052109_tilemap_update(k052109);
155	150
156		K052109_tilemap_update();
157
158	151	layer[0] = 0;
159		layerpri[0] = K053251_get_priority(K053251_CI2);
	152	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
160	153	layer[1] = 1;
161		layerpri[1] = K053251_get_priority(K053251_CI3);
	154	layerpri[1] = k053251_get_priority(k053251, K053251_CI3);
162	155	layer[2] = 2;
163		layerpri[2] = K053251_get_priority(K053251_CI4);
	156	layerpri[2] = k053251_get_priority(k053251, K053251_CI4);
164	157
165	158	sortlayers(layer,layerpri);
166	159
167	160	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
168	161	bitmap_fill(bitmap,cliprect,16 * bg_colorbase);
169		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[0]],0,1);
170		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[1]],0,2);
171		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[2]],0,4);
	162	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[0], 0,1);
	163	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[1], 0,2);
	164	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[2], 0,4);
172	165
173		K053247_sprites_draw(screen->machine, bitmap,cliprect);
	166	k053247_sprites_draw(k053246, bitmap, cliprect);
174	167	return 0;
175	168	}

src/mame/video/actfancr.c

r6740	r6741
5	5	*******************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "actfancr.h"
	8	#include "includes/actfancr.h"
9	9
10	10
11	11	static TILEMAP_MAPPER( actfancr_scan )

src/mame/video/tank8.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "tank8.h"
	8	#include "includes/tank8.h"
9	9
10	10
11	11	UINT8 *tank8_video_ram;

src/mame/video/mw8080bw.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "mw8080bw.h"
	8	#include "includes/mw8080bw.h"
9	9
10	10
11
12	11	VIDEO_UPDATE( mw8080bw )
13	12	{
	13	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
14	14	UINT8 x = 0;
15	15	UINT8 y = MW8080BW_VCOUNTER_START_NO_VBLANK;
16	16	UINT8 video_data = 0;
r6740	r6741
51	51	else if ((x & 0x07) == 0x04)
52	52	{
53	53	offs_t offs = ((offs_t)y << 5) | (x >> 3);
54		video_data = mw8080bw_ram[offs];
	54	video_data = state->main_ram[offs];
55	55	}
56	56	}
57	57
r6740	r6741
67	67	*************************************/
68	68
69	69
70		#define PHANTOM2_BOTTOM_TRENCH_DARK_RGB32_PEN   RGB_BLACK
71		#define PHANTOM2_BOTTOM_TRENCH_LIGHT_RGB32_PEN   MAKE_RGB(0x5a, 0x5a, 0x5a)
72		#define PHANTOM2_TOP_TRENCH_DARK_RGB32_PEN      RGB_BLACK
73		#define PHANTOM2_TOP_TRENCH_LIGHT_RGB32_PEN      RGB_WHITE
74		#define PHANTOM2_SIDE_TRENCH_DARK_RGB32_PEN      RGB_BLACK
75		#define PHANTOM2_SIDE_TRENCH_LIGHT_RGB32_PEN   MAKE_RGB(0x72, 0x72, 0x72)
	70	#define PHANTOM2_BOTTOM_TRENCH_DARK_RGB32_PEN    RGB_BLACK
	71	#define PHANTOM2_BOTTOM_TRENCH_LIGHT_RGB32_PEN   MAKE_RGB(0x5a, 0x5a, 0x5a)
	72	#define PHANTOM2_TOP_TRENCH_DARK_RGB32_PEN       RGB_BLACK
	73	#define PHANTOM2_TOP_TRENCH_LIGHT_RGB32_PEN      RGB_WHITE
	74	#define PHANTOM2_SIDE_TRENCH_DARK_RGB32_PEN      RGB_BLACK
	75	#define PHANTOM2_SIDE_TRENCH_LIGHT_RGB32_PEN     MAKE_RGB(0x72, 0x72, 0x72)
76	76
77	77
78	78	VIDEO_UPDATE( spcenctr )
79	79	{
	80	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
80	81	UINT8 line_buf[256]; /* 256x1 bit RAM */
81	82
82	83	UINT8 x = 0;
r6740	r6741
85	86	UINT8 draw_line = 0;
86	87	UINT8 draw_trench = 0;
87	88	UINT8 draw_floor = 0;
88		UINT8 width = spcenctr_get_trench_width();
	89	UINT8 width = state->spcenctr_trench_width;
89	90	UINT8 floor_width = width;
90		UINT8 center = spcenctr_get_trench_center();
	91	UINT8 center = state->spcenctr_trench_center;
91	92
92	93	memset(line_buf, 0, 256);
93	94
r6740	r6741
149	150
150	151	/* update the trench control for the next line */
151	152	offs = ((offs_t)y << 5) | 0x1f;
152		trench_control = mw8080bw_ram[offs];
	153	trench_control = state->main_ram[offs];
153	154
154	155	if (trench_control & 0x40)
155	156	draw_trench = 1;
r6740	r6741
167	168
168	169	/* add the lower 2 bits stored in the slope array to width */
169	170	if (draw_trench)
170		width = width + (spcenctr_get_trench_slope(y) & 0x03);
	171	width = width + (state->spcenctr_trench_slope[y & 0x0f] & 0x03);
171	172
172	173	/* add the higher 2 bits stored in the slope array to floor width */
173	174	if (draw_floor)
174		floor_width = floor_width + ((spcenctr_get_trench_slope(y) & 0x0c) >> 2);
	175	floor_width = floor_width + ((state->spcenctr_trench_slope[y & 0x0f] & 0x0c) >> 2);
175	176
176	177	/* next row, video_data is now 0, so the next line will start
177	178	with 4 blank pixels */
r6740	r6741
185	186	else if ((x & 0x07) == 0x04)
186	187	{
187	188	offs_t offs = ((offs_t)y << 5) | (x >> 3);
188		video_data = mw8080bw_ram[offs];
	189	video_data = state->main_ram[offs];
189	190	}
190	191	}
191	192
r6740	r6741
211	212	Bits 1-7 go to address line A4-A10 of the cloud gfx prom.
212	213	*/
213	214
214		#define PHANTOM2_CLOUD_COUNTER_START   (0x0e0b)
215		#define PHANTOM2_CLOUD_COUNTER_END      (0x1000)
216		#define PHANTOM2_CLOUD_COUNTER_PERIOD   (PHANTOM2_CLOUD_COUNTER_END - PHANTOM2_CLOUD_COUNTER_START)
	215	#define PHANTOM2_CLOUD_COUNTER_START      (0x0e0b)
	216	#define PHANTOM2_CLOUD_COUNTER_END        (0x1000)
	217	#define PHANTOM2_CLOUD_COUNTER_PERIOD     (PHANTOM2_CLOUD_COUNTER_END - PHANTOM2_CLOUD_COUNTER_START)
217	218
218		#define PHANTOM2_RGB32_CLOUD_PEN      MAKE_RGB(0xc0, 0xc0, 0xc0)
	219	#define PHANTOM2_RGB32_CLOUD_PEN          MAKE_RGB(0xc0, 0xc0, 0xc0)
219	220
220	221
221	222	VIDEO_UPDATE( phantom2 )
222	223	{
	224	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
223	225	UINT8 x = 0;
224	226	UINT8 y = MW8080BW_VCOUNTER_START_NO_VBLANK;
225	227	UINT8 video_data = 0;
226	228	UINT8 cloud_data = 0;
227	229
228		UINT16 cloud_counter = phantom2_get_cloud_counter();
	230	UINT16 cloud_counter = state->phantom2_cloud_counter;
229	231
230	232	UINT8 *cloud_region = memory_region(screen->machine, "proms");
231	233
r6740	r6741
301	303	else if ((x & 0x07) == 0x04)
302	304	{
303	305	offs_t offs = ((offs_t)y << 5) | (x >> 3);
304		video_data = mw8080bw_ram[offs];
	306	video_data = state->main_ram[offs];
305	307	}
306	308	}
307	309
r6740	r6741
311	313
312	314	VIDEO_EOF( phantom2 )
313	315	{
314		UINT16 cloud_counter = phantom2_get_cloud_counter();
	316	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
315	317
316		cloud_counter = cloud_counter + MW8080BW_VTOTAL;
	318	state->phantom2_cloud_counter += MW8080BW_VTOTAL;
317	319
318		if (cloud_counter >= PHANTOM2_CLOUD_COUNTER_END)
319		cloud_counter = PHANTOM2_CLOUD_COUNTER_START + (cloud_counter - PHANTOM2_CLOUD_COUNTER_END);
320
321		phantom2_set_cloud_counter(cloud_counter);
	320	if (state->phantom2_cloud_counter >= PHANTOM2_CLOUD_COUNTER_END)
	321	state->phantom2_cloud_counter = PHANTOM2_CLOUD_COUNTER_START + (state->phantom2_cloud_counter - PHANTOM2_CLOUD_COUNTER_END);
322	322	}
323	323
324	324
325
326	325	/*************************************
327	326	*
328	327	*  Space Invaders
r6740	r6741
334	333
335	334	VIDEO_UPDATE( invaders )
336	335	{
	336	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
337	337	UINT8 x = 0;
338	338	UINT8 y = MW8080BW_VCOUNTER_START_NO_VBLANK;
339	339	UINT8 video_data = 0;
340		UINT8 flip = invaders_is_flip_screen();
	340	UINT8 flip = state->invaders_flip_screen;
341	341
342	342	while (1)
343	343	{
r6740	r6741
383	383	else if ((x & 0x07) == 0x04)
384	384	{
385	385	offs_t offs = ((offs_t)y << 5) | (x >> 3);
386		video_data = mw8080bw_ram[offs];
	386	video_data = state->main_ram[offs];
387	387	}
388	388	}
389	389

src/mame/video/vaportra.c

r6740	r6741
10	10	***************************************************************************/
11	11
12	12	#include "driver.h"
13		#include "deco16ic.h"
	13	#include "includes/deco16ic.h"
14	14
15	15	static UINT16 vaportra_priority[2];
16	16

src/mame/video/nova2001.c

r6740	r6741
1	1	#include "driver.h"
2		#include "nova2001.h"
	2	#include "includes/nova2001.h"
3	3
4	4	UINT8 *nova2001_fg_videoram, *nova2001_bg_videoram;
5	5

src/mame/video/cps1.c

r6740	r6741
318	318	***************************************************************************/
319	319
320	320	#include "driver.h"
321		#include "cps1.h"
	321	#include "includes/cps1.h"
322	322
323	323	#define VERBOSE 0
324	324
r6740	r6741
337	337	#define GFXTYPE_STARS     (1<<4)
338	338
339	339
340		struct gfx_range
341		{
342		// start and end are as passed by the game (shift adjusted to be all
343		// in the same scale a 8x8 tiles): they don't necessarily match the
344		// position in ROM.
345		int type;
346		int start;
347		int end;
348		int bank;
349		};
350
351		struct CPS1config
352		{
353		const char *name;             /* game driver name */
354
355		/* Some games interrogate a couple of registers on bootup. */
356		/* These are CPS1 board B self test checks. They wander from game to */
357		/* game. */
358		int cpsb_addr;        /* CPS board B test register address */
359		int cpsb_value;       /* CPS board B test register expected value */
360
361		/* some games use as a protection check the ability to do 16-bit multiplies */
362		/* with a 32-bit result, by writing the factors to two ports and reading the */
363		/* result from two other ports. */
364		/* It looks like this feature was introduced with 3wonders (CPSB ID = 08xx) */
365		int mult_factor1;
366		int mult_factor2;
367		int mult_result_lo;
368		int mult_result_hi;
369
370		/* unknown registers which might be related to the multiply protection */
371		int unknown1;
372		int unknown2;
373		int unknown3;
374
375		int layer_control;
376		int priority[4];
377		int palette_control;
378
379		/* ideally, the layer enable masks should consist of only one bit, */
380		/* but in many cases it is unknown which bit is which. */
381		int layer_enable_mask[5];
382
383		/* these depend on the B-board model and PAL */
384		int bank_sizes[4];
385		const struct gfx_range *bank_mapper;
386
387		/* some C-boards have additional I/O for extra buttons/extra players */
388		int in2_addr;
389		int in3_addr;
390		int out2_addr;
391
392		int bootleg_kludge;
393		};
394
395		static const struct CPS1config *cps1_game_config;
396
397
398	340	#define __not_applicable__   -1,-1,-1,-1,-1,-1,-1
399	341
400	342	/*                     CPSB ID    multiply protection      unknown      ctrl     priority masks   palctrl    layer enable masks  */
r6740	r6741
1229	1171	};
1230	1172
1231	1173
1232
1233	1174	static const struct CPS1config cps1_config_table[]=
1234	1175	{
1235	1176	/* name       CPSB         gfx mapper   in2  in3  out2   kludge */
r6740	r6741
1381	1322
1382	1323
1383	1324
1384		/* Public variables */
1385		UINT16 *cps1_gfxram;
1386		UINT16 *cps1_cps_a_regs;
1387		UINT16 *cps1_cps_b_regs;
1388	1325
1389		size_t cps1_gfxram_size;
1390
1391	1326	/* Offset of each palette entry */
1392	1327	#define cps1_palette_entries (32*6)  /* Number colour schemes in palette */
1393	1328
1394		static const int cps1_scroll_size =0x4000;   /* scroll1, scroll2, scroll3 */
1395		static const int cps1_obj_size    =0x0800;
1396		static const int cps1_other_size  =0x0800;
1397		static const int cps1_palette_align=0x0400;   /* minimum alignment is a single palette page (512 colors). Verified on pcb. */
1398		static const int cps1_palette_size=cps1_palette_entries*32; /* Size of palette RAM */
1399	1329
1400		static UINT16 *cps1_scroll1;
1401		static UINT16 *cps1_scroll2;
1402		static UINT16 *cps1_scroll3;
1403		static UINT16 *cps1_obj;
1404		static UINT16 *cps1_buffered_obj;
1405		UINT16 *cps1_other;
1406
1407		/* Working variables */
1408		static int cps1_last_sprite_offset;     /* Offset of the last sprite */
1409		static int cps1_stars_enabled[2];          /* Layer enabled [Y/N] */
1410
1411		tilemap *cps1_bg_tilemap[3];
1412
1413
1414		int cps1_scroll1x, cps1_scroll1y;
1415		int cps1_scroll2x, cps1_scroll2y;
1416		int cps1_scroll3x, cps1_scroll3y;
1417		static int stars1x, stars1y, stars2x, stars2y;
1418
1419
1420	1330	/* CPS-A registers */
1421	1331	#define CPS1_OBJ_BASE           (0x00/2)    /* Base address of objects */
1422	1332	#define CPS1_SCROLL1_BASE       (0x02/2)    /* Base address of scroll 1 */
r6740	r6741
1442	1352	CPS1 VIDEO RENDERER
1443	1353
1444	1354	*/
1445		/* first 0x4000 of gfx ROM are used, but 0x0000-0x1fff is == 0x2000-0x3fff */
1446		static const int stars_rom_size = 0x2000;
1447
1448		/* PSL: CPS2 support */
1449		static const int cps2_obj_size    =0x2000;
1450		UINT16 *cps2_objram1,*cps2_objram2;
1451		UINT16 *cps2_output;
1452
1453		size_t cps2_output_size;
1454		static UINT16 *cps2_buffered_obj;
1455		static int pri_ctrl;            /* Sprite layer priorities */
1456		static int cps2_objram_bank;
1457		static int cps2_last_sprite_offset;     /* Offset of the last sprite */
1458
1459	1355	#define CPS2_OBJ_BASE   0x00   /* Unknown (not base address of objects). Could be bass address of bank used when object swap bit set? */
1460	1356	#define CPS2_OBJ_UK1   0x02   /* Unknown (nearly always 0x807d, or 0x808e when screen flipped) */
1461	1357	#define CPS2_OBJ_PRI   0x04   /* Layers priorities */
r6740	r6741
1464	1360	#define CPS2_OBJ_YOFFS   0x0a   /* Y offset (always 0x0010) */
1465	1361
1466	1362
1467		static int cps_version;
1468		int cps1_scanline1;
1469		int cps1_scanline2;
1470		int cps1_scancalls;
1471
1472
1473	1363	static void cps1_build_palette(running_machine *machine, const UINT16* const palette_base);
1474	1364
1475	1365
1476	1366	static MACHINE_RESET( cps )
1477	1367	{
	1368	cps_state *state = (cps_state *)machine->driver_data;
1478	1369	const char *gamename = machine->gamedrv->name;
1479		const struct CPS1config *pCFG=&cps1_config_table[0];
	1370	const struct CPS1config *pCFG = &cps1_config_table[0];
1480	1371
1481		while(pCFG->name)
	1372	while (pCFG->name)
1482	1373	{
1483	1374	if (strcmp(pCFG->name, gamename) == 0)
1484		{
1485	1375	break;
1486		}
	1376
1487	1377	pCFG++;
1488	1378	}
1489		cps1_game_config=pCFG;
1490	1379
1491		if (!cps1_game_config->name)
1492		{
1493		gamename="cps2";
1494		pCFG=&cps1_config_table[0];
1495		while(pCFG->name)
1496		{
1497		if (strcmp(pCFG->name, gamename) == 0)
1498		{
1499		break;
1500		}
1501		pCFG++;
1502		}
1503		cps1_game_config=pCFG;
1504		}
	1380	state->game_config = pCFG;
1505	1381
1506		if (strcmp(gamename, "sf2rb" )==0)
	1382	if (!state->game_config->name)
1507	1383	{
	1384	gamename = "cps2";
	1385	pCFG = &cps1_config_table[0];
	1386
	1387	while(pCFG->name)
	1388	{
	1389	if (strcmp(pCFG->name, gamename) == 0)
	1390	break;
	1391
	1392	pCFG++;
	1393	}
	1394
	1395	state->game_config = pCFG;
	1396	}
	1397
	1398	if (strcmp(gamename, "sf2rb") == 0)
	1399	{
1508	1400	/* Patch out protection check */
1509	1401	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
1510		rom[0xe5464/2] = 0x6012;
	1402	rom[0xe5464 / 2] = 0x6012;
1511	1403	}
1512		if (strcmp(gamename, "sf2rb2" )==0)
	1404
	1405	if (strcmp(gamename, "sf2rb2") == 0)
1513	1406	{
1514	1407	/* Patch out protection check */
1515	1408	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
1516		rom[0xe5332/2] = 0x6014;
	1409	rom[0xe5332 / 2] = 0x6014;
1517	1410	}
1518	1411
1519	1412	#if 0
1520		if (strcmp(gamename, "sf2accp2" )==0)
	1413	if (strcmp(gamename, "sf2accp2") == 0)
1521	1414	{
1522	1415	/* Patch out a odd branch which would be incorrectly interpreted
1523	1416	by the cpu core as a 32-bit branch. This branch would make the
1524	1417	game crash (address error, since it would branch to an odd address)
1525	1418	if location 180ca6 (outside ROM space) isn't 0. Protection check? */
1526	1419	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
1527		rom[0x11756/2] = 0x4e71;
	1420	rom[0x11756 / 2] = 0x4e71;
1528	1421	}
1529		else if (strcmp(gamename, "ghouls" )==0)
	1422	else if (strcmp(gamename, "ghouls") == 0)
1530	1423	{
1531	1424	/* Patch out self-test... it takes forever */
1532	1425	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
1533		rom[0x61964/2] = 0x4ef9;
1534		rom[0x61966/2] = 0x0000;
1535		rom[0x61968/2] = 0x0400;
	1426	rom[0x61964 / 2] = 0x4ef9;
	1427	rom[0x61966 / 2] = 0x0000;
	1428	rom[0x61968 / 2] = 0x0400;
1536	1429	}
1537	1430	#endif
1538	1431	}
1539	1432
1540	1433
1541		INLINE UINT16 *cps1_base(int offset,int boundary)
	1434	INLINE UINT16 *cps1_base( running_machine *machine, int offset, int boundary )
1542	1435	{
1543		int base = cps1_cps_a_regs[offset]*256;
	1436	cps_state *state = (cps_state *)machine->driver_data;
	1437	int base = state->cps_a_regs[offset] * 256;
1544	1438
1545	1439	/*
1546	1440	The scroll RAM must start on a 0x4000 boundary.
r6740	r6741
1550	1444	Muscle bomber games  - will animate garbage during gameplay
1551	1445	Mask out the irrelevant bits.
1552	1446	*/
1553		base &= ~(boundary-1);
1554		return &cps1_gfxram[(base&0x3ffff)/2];
	1447	base &= ~(boundary - 1);
	1448	return &state->gfxram[(base & 0x3ffff) / 2];
1555	1449	}
1556	1450
1557	1451
1558	1452
1559	1453	WRITE16_HANDLER( cps1_cps_a_w )
1560	1454	{
1561		data = COMBINE_DATA(&cps1_cps_a_regs[offset]);
	1455	cps_state *state = (cps_state *)space->machine->driver_data;
	1456	data = COMBINE_DATA(&state->cps_a_regs[offset]);
1562	1457
1563	1458	/*
1564	1459	The main CPU writes the palette to gfxram, and the CPS-B custom copies it
r6740	r6741
1569	1464	fixes glitches in the ghouls intro, but it might happen at next vblank.
1570	1465	*/
1571	1466	if (offset == CPS1_PALETTE_BASE)
1572		cps1_build_palette(space->machine, cps1_base(CPS1_PALETTE_BASE,cps1_palette_align));
	1467	cps1_build_palette(space->machine, cps1_base(space->machine, CPS1_PALETTE_BASE, state->palette_align));
1573	1468
1574	1469	// pzloop2 write to register 24 on startup. This is probably just a bug.
1575		if (offset == 0x24/2 && cps_version == 2)
	1470	if (offset == 0x24 / 2 && state->cps_version == 2)
1576	1471	return;
1577	1472
1578	1473	if (offset > CPS1_VIDEOCONTROL)
1579		popmessage("write to CPS-A register %02x contact MAMEDEV", offset*2);
	1474	popmessage("write to CPS-A register %02x contact MAMEDEV", offset * 2);
1580	1475	}
1581	1476
1582	1477
1583	1478	READ16_HANDLER( cps1_cps_b_r )
1584	1479	{
	1480	cps_state *state = (cps_state *)space->machine->driver_data;
	1481
1585	1482	/* Some games interrogate a couple of registers on bootup. */
1586	1483	/* These are CPS1 board B self test checks. They wander from game to */
1587	1484	/* game. */
1588		if (offset == cps1_game_config->cpsb_addr/2)
1589		return cps1_game_config->cpsb_value;
	1485	if (offset == state->game_config->cpsb_addr / 2)
	1486	return state->game_config->cpsb_value;
1590	1487
1591	1488	/* some games use as a protection check the ability to do 16-bit multiplications */
1592	1489	/* with a 32-bit result, by writing the factors to two ports and reading the */
1593	1490	/* result from two other ports. */
1594		if (offset == cps1_game_config->mult_result_lo/2)
1595		return (cps1_cps_b_regs[cps1_game_config->mult_factor1/2] *
1596		cps1_cps_b_regs[cps1_game_config->mult_factor2/2]) & 0xffff;
1597		if (offset == cps1_game_config->mult_result_hi/2)
1598		return (cps1_cps_b_regs[cps1_game_config->mult_factor1/2] *
1599		cps1_cps_b_regs[cps1_game_config->mult_factor2/2]) >> 16;
	1491	if (offset == state->game_config->mult_result_lo / 2)
	1492	return (state->cps_b_regs[state->game_config->mult_factor1 / 2] *
	1493	state->cps_b_regs[state->game_config->mult_factor2 / 2]) & 0xffff;
1600	1494
1601		if (offset == cps1_game_config->in2_addr/2)   /* Extra input ports (on C-board) */
	1495	if (offset == state->game_config->mult_result_hi / 2)
	1496	return (state->cps_b_regs[state->game_config->mult_factor1 / 2] *
	1497	state->cps_b_regs[state->game_config->mult_factor2 / 2]) >> 16;
	1498
	1499	if (offset == state->game_config->in2_addr / 2)   /* Extra input ports (on C-board) */
1602	1500	return input_port_read(space->machine, "IN2");
1603	1501
1604		if (offset == cps1_game_config->in3_addr/2)   /* Player 4 controls (on C-board) ("Captain Commando") */
	1502	if (offset == state->game_config->in3_addr / 2)   /* Player 4 controls (on C-board) ("Captain Commando") */
1605	1503	return input_port_read(space->machine, "IN3");
1606	1504
1607		if (cps_version == 2)
	1505	if (state->cps_version == 2)
1608	1506	{
1609	1507	if (offset == 0x10/2)
1610	1508	{
1611	1509	// UNKNOWN--only mmatrix appears to read this, and I'm not sure if the result is actuallyused
1612		return cps1_cps_b_regs[0x10/2];
	1510	return state->cps_b_regs[0x10 / 2];
1613	1511	}
1614	1512	if (offset == 0x12/2)
1615		{
1616		return cps1_cps_b_regs[0x12/2];
1617		}
	1513	return state->cps_b_regs[0x12 / 2];
1618	1514	}
1619	1515
1620		popmessage("CPS-B read port %02x contact MAMEDEV", offset*2);
	1516	popmessage("CPS-B read port %02x contact MAMEDEV", offset * 2);
1621	1517
1622	1518	return 0xffff;
1623	1519	}
r6740	r6741
1625	1521
1626	1522	WRITE16_HANDLER( cps1_cps_b_w )
1627	1523	{
1628		data = COMBINE_DATA(&cps1_cps_b_regs[offset]);
	1524	cps_state *state = (cps_state *)space->machine->driver_data;
	1525	data = COMBINE_DATA(&state->cps_b_regs[offset]);
1629	1526
1630		if (cps_version == 2)
	1527	if (state->cps_version == 2)
1631	1528	{
1632	1529	/* To mark scanlines for raster effects */
1633	1530	if (offset == 0x0e/2)
r6740	r6741
1637	1534	}
1638	1535	if (offset == 0x10/2)
1639	1536	{
1640		cps1_scanline1 = (data & 0x1ff);
	1537	state->scanline1 = (data & 0x1ff);
1641	1538	return;
1642	1539	}
1643	1540	if (offset == 0x12/2)
1644	1541	{
1645		cps1_scanline2 = (data & 0x1ff);
	1542	state->scanline2 = (data & 0x1ff);
1646	1543	return;
1647	1544	}
1648	1545	}
1649	1546
1650	1547
1651	1548	// additional outputs on C-board
1652		if (offset == cps1_game_config->out2_addr/2)
	1549	if (offset == state->game_config->out2_addr / 2)
1653	1550	{
1654	1551	if (ACCESSING_BITS_0_7)
1655	1552	{
1656		if (cps1_game_config->cpsb_value == 0x0402)   // Mercs (CN2 connector)
	1553	if (state->game_config->cpsb_value == 0x0402)   // Mercs (CN2 connector)
1657	1554	{
1658		coin_lockout_w(space->machine, 2,~data & 0x01);
1659		set_led_status(space->machine, 0,data & 0x02);
1660		set_led_status(space->machine, 1,data & 0x04);
1661		set_led_status(space->machine, 2,data & 0x08);
	1555	coin_lockout_w(space->machine, 2, ~data & 0x01);
	1556	set_led_status(space->machine, 0, data & 0x02);
	1557	set_led_status(space->machine, 1, data & 0x04);
	1558	set_led_status(space->machine, 2, data & 0x08);
1662	1559	}
1663	1560	else   // kod, captcomm, knights
1664	1561	{
1665		coin_lockout_w(space->machine, 2,~data & 0x02);
1666		coin_lockout_w(space->machine, 3,~data & 0x08);
	1562	coin_lockout_w(space->machine, 2, ~data & 0x02);
	1563	coin_lockout_w(space->machine, 3, ~data & 0x08);
1667	1564	}
1668	1565	}
1669	1566	}
1670	1567
1671	1568
1672		if (offset != cps1_game_config->cpsb_addr/2 &&   // only varth writes here
1673		offset != cps1_game_config->mult_factor1/2 &&
1674		offset != cps1_game_config->mult_factor2/2 &&
1675		offset != cps1_game_config->layer_control/2 &&
1676		offset != cps1_game_config->unknown1/2 &&
1677		offset != cps1_game_config->unknown2/2 &&
1678		offset != cps1_game_config->unknown3/2 &&
1679		offset != cps1_game_config->priority[0]/2 &&
1680		offset != cps1_game_config->priority[1]/2 &&
1681		offset != cps1_game_config->priority[2]/2 &&
1682		offset != cps1_game_config->priority[3]/2 &&
1683		offset != cps1_game_config->palette_control/2 &&
1684		offset != cps1_game_config->out2_addr/2 &&
1685		!cps1_game_config->bootleg_kludge)
1686		popmessage("CPS-B write %04x to port %02x contact MAMEDEV", data, offset*2);
	1569	if (offset != state->game_config->cpsb_addr / 2 &&   // only varth writes here
	1570	offset != state->game_config->mult_factor1 / 2 &&
	1571	offset != state->game_config->mult_factor2 / 2 &&
	1572	offset != state->game_config->layer_control / 2 &&
	1573	offset != state->game_config->unknown1 / 2 &&
	1574	offset != state->game_config->unknown2 / 2 &&
	1575	offset != state->game_config->unknown3 / 2 &&
	1576	offset != state->game_config->priority[0] / 2 &&
	1577	offset != state->game_config->priority[1] / 2 &&
	1578	offset != state->game_config->priority[2] / 2 &&
	1579	offset != state->game_config->priority[3] / 2 &&
	1580	offset != state->game_config->palette_control / 2 &&
	1581	offset != state->game_config->out2_addr / 2 &&
	1582	!state->game_config->bootleg_kludge)
	1583	popmessage("CPS-B write %04x to port %02x contact MAMEDEV", data, offset * 2);
1687	1584	}
1688	1585
1689	1586
1690	1587
1691		INLINE int cps2_port(int offset)
	1588	INLINE int cps2_port( running_machine *machine, int offset )
1692	1589	{
1693		return cps2_output[offset/2];
	1590	cps_state *state = (cps_state *)machine->driver_data;
	1591	return state->output[offset / 2];
1694	1592	}
1695	1593
1696	1594
1697
1698
1699		static void cps1_gfx_decode(running_machine *machine)
	1595	static void cps1_gfx_decode( running_machine *machine )
1700	1596	{
1701		int size=memory_region_length(machine, "gfx");
1702		int i,j,gfxsize;
	1597	int size = memory_region_length(machine, "gfx");
	1598	int i, j, gfxsize;
1703	1599	UINT8 *cps1_gfx = memory_region(machine, "gfx");
1704	1600
	1601	gfxsize = size / 4;
1705	1602
1706		gfxsize=size/4;
1707
1708		for (i = 0;i < gfxsize;i++)
	1603	for (i = 0; i < gfxsize; i++)
1709	1604	{
1710		UINT32 src = cps1_gfx[4*i] + (cps1_gfx[4*i+1]<<8) + (cps1_gfx[4*i+2]<<16) + (cps1_gfx[4*i+3]<<24);
	1605	UINT32 src = cps1_gfx[4 * i] + (cps1_gfx[4 * i + 1] << 8) + (cps1_gfx[4 * i + 2] << 16) + (cps1_gfx[4 * i + 3] << 24);
1711	1606	UINT32 dwval = 0;
1712	1607
1713		for (j = 0;j < 8;j++)
	1608	for (j = 0; j < 8; j++)
1714	1609	{
1715	1610	int n = 0;
1716	1611	UINT32 mask = (0x80808080 >> j) & src;
r6740	r6741
1722	1617
1723	1618	dwval |= n << (j * 4);
1724	1619	}
1725		cps1_gfx[4*i  ] = dwval>>0;
1726		cps1_gfx[4*i+1] = dwval>>8;
1727		cps1_gfx[4*i+2] = dwval>>16;
1728		cps1_gfx[4*i+3] = dwval>>24;
	1620	cps1_gfx[4 *i    ] = dwval >> 0;
	1621	cps1_gfx[4 *i + 1] = dwval >> 8;
	1622	cps1_gfx[4 *i + 2] = dwval >> 16;
	1623	cps1_gfx[4 *i + 3] = dwval >> 24;
1729	1624	}
1730	1625	}
1731	1626
1732		static void unshuffle(UINT64 *buf,int len)
	1627	static void unshuffle( UINT64 *buf, int len )
1733	1628	{
1734	1629	int i;
1735	1630	UINT64 t;
1736	1631
1737		if (len == 2) return;
	1632	if (len == 2)
	1633	return;
1738	1634
1739	1635	assert(len % 4 == 0);   /* must not happen */
1740	1636
1741	1637	len /= 2;
1742	1638
1743		unshuffle(buf,len);
1744		unshuffle(buf + len,len);
	1639	unshuffle(buf, len);
	1640	unshuffle(buf + len, len);
1745	1641
1746		for (i = 0;i < len/2;i++)
	1642	for (i = 0; i < len / 2; i++)
1747	1643	{
1748		t = buf[len/2 + i];
1749		buf[len/2 + i] = buf[len + i];
	1644	t = buf[len / 2 + i];
	1645	buf[len / 2 + i] = buf[len + i];
1750	1646	buf[len + i] = t;
1751	1647	}
1752	1648	}
1753	1649
1754		static void cps2_gfx_decode(running_machine *machine)
	1650	static void cps2_gfx_decode( running_machine *machine )
1755	1651	{
1756		const int banksize=0x200000;
1757		int size=memory_region_length(machine, "gfx");
	1652	const int banksize = 0x200000;
	1653	int size = memory_region_length(machine, "gfx");
1758	1654	int i;
1759	1655
1760		for (i = 0;i < size;i += banksize)
1761		unshuffle((UINT64 *)(memory_region(machine, "gfx") + i),banksize/8);
	1656	for (i = 0; i < size; i += banksize)
	1657	unshuffle((UINT64 *)(memory_region(machine, "gfx") + i), banksize / 8);
1762	1658
1763	1659	cps1_gfx_decode(machine);
1764	1660	}
r6740	r6741
1766	1662
1767	1663	DRIVER_INIT( cps1 )
1768	1664	{
	1665	cps_state *state = (cps_state *)machine->driver_data;
	1666
1769	1667	cps1_gfx_decode(machine);
	1668
	1669	state->scanline1 = 0;
	1670	state->scanline2 = 0;
	1671	state->scancalls = 0;
	1672	state->last_sprite_offset = 0;
	1673	state->pri_ctrl = 0;
	1674	state->objram_bank = 0;
1770	1675	}
1771	1676
1772	1677
1773	1678
1774	1679	DRIVER_INIT( cps2_video )
1775	1680	{
	1681	cps_state *state = (cps_state *)machine->driver_data;
	1682
1776	1683	cps2_gfx_decode(machine);
1777	1684
1778		cps1_scanline1 = 262;
1779		cps1_scanline2 = 262;
1780		cps1_scancalls = 0;
	1685	state->scanline1 = 262;
	1686	state->scanline2 = 262;
	1687	state->scancalls = 0;
	1688	state->last_sprite_offset = 0;
	1689	state->cps2_last_sprite_offset = 0;
	1690	state->pri_ctrl = 0;
	1691	state->objram_bank = 0;
1781	1692	}
1782	1693
1783	1694
1784		void cps1_get_video_base(void )
	1695	void cps1_get_video_base( running_machine *machine )
1785	1696	{
	1697	cps_state *state = (cps_state *)machine->driver_data;
1786	1698	int layercontrol, videocontrol, scroll1xoff, scroll2xoff, scroll3xoff;
1787	1699
1788	1700	/* Re-calculate the VIDEO RAM base */
1789		if (cps1_scroll1 != cps1_base(CPS1_SCROLL1_BASE,cps1_scroll_size))
	1701	if (state->scroll1 != cps1_base(machine, CPS1_SCROLL1_BASE, state->scroll_size))
1790	1702	{
1791		cps1_scroll1 = cps1_base(CPS1_SCROLL1_BASE,cps1_scroll_size);
1792		tilemap_mark_all_tiles_dirty(cps1_bg_tilemap[0]);
	1703	state->scroll1 = cps1_base(machine, CPS1_SCROLL1_BASE, state->scroll_size);
	1704	tilemap_mark_all_tiles_dirty(state->bg_tilemap[0]);
1793	1705	}
1794		if (cps1_scroll2 != cps1_base(CPS1_SCROLL2_BASE,cps1_scroll_size))
	1706	if (state->scroll2 != cps1_base(machine, CPS1_SCROLL2_BASE, state->scroll_size))
1795	1707	{
1796		cps1_scroll2 = cps1_base(CPS1_SCROLL2_BASE,cps1_scroll_size);
1797		tilemap_mark_all_tiles_dirty(cps1_bg_tilemap[1]);
	1708	state->scroll2 = cps1_base(machine, CPS1_SCROLL2_BASE, state->scroll_size);
	1709	tilemap_mark_all_tiles_dirty(state->bg_tilemap[1]);
1798	1710	}
1799		if (cps1_scroll3 != cps1_base(CPS1_SCROLL3_BASE,cps1_scroll_size))
	1711	if (state->scroll3 != cps1_base(machine, CPS1_SCROLL3_BASE, state->scroll_size))
1800	1712	{
1801		cps1_scroll3 = cps1_base(CPS1_SCROLL3_BASE,cps1_scroll_size);
1802		tilemap_mark_all_tiles_dirty(cps1_bg_tilemap[2]);
	1713	state->scroll3 = cps1_base(machine, CPS1_SCROLL3_BASE, state->scroll_size);
	1714	tilemap_mark_all_tiles_dirty(state->bg_tilemap[2]);
1803	1715	}
1804	1716
1805	1717	/* Some of the sf2 hacks use only sprite port 0x9100 and the scroll layers are offset */
1806		if (cps1_game_config->bootleg_kludge == 1)
	1718	if (state->game_config->bootleg_kludge == 1)
1807	1719	{
1808		cps1_cps_a_regs[CPS1_OBJ_BASE] = 0x9100;
1809		cps1_obj = cps1_base(CPS1_OBJ_BASE, cps1_obj_size);
	1720	state->cps_a_regs[CPS1_OBJ_BASE] = 0x9100;
	1721	state->obj = cps1_base(machine, CPS1_OBJ_BASE, state->obj_size);
1810	1722	scroll1xoff = -0x0c;
1811	1723	scroll2xoff = -0x0e;
1812	1724	scroll3xoff = -0x10;
1813	1725	}
1814	1726	else
1815	1727	{
1816		cps1_obj = cps1_base(CPS1_OBJ_BASE, cps1_obj_size);
	1728	state->obj = cps1_base(machine, CPS1_OBJ_BASE, state->obj_size);
1817	1729	scroll1xoff = 0;
1818	1730	scroll2xoff = 0;
1819	1731	scroll3xoff = 0;
1820	1732	}
1821		cps1_other = cps1_base(CPS1_OTHER_BASE,cps1_other_size);
1822	1733
	1734	state->other = cps1_base(machine, CPS1_OTHER_BASE, state->other_size);
	1735
1823	1736	/* Get scroll values */
1824		cps1_scroll1x = cps1_cps_a_regs[CPS1_SCROLL1_SCROLLX] + scroll1xoff;
1825		cps1_scroll1y = cps1_cps_a_regs[CPS1_SCROLL1_SCROLLY];
1826		cps1_scroll2x = cps1_cps_a_regs[CPS1_SCROLL2_SCROLLX] + scroll2xoff;
1827		cps1_scroll2y = cps1_cps_a_regs[CPS1_SCROLL2_SCROLLY];
1828		cps1_scroll3x = cps1_cps_a_regs[CPS1_SCROLL3_SCROLLX] + scroll3xoff;
1829		cps1_scroll3y = cps1_cps_a_regs[CPS1_SCROLL3_SCROLLY];
1830		stars1x = cps1_cps_a_regs[CPS1_STARS1_SCROLLX];
1831		stars1y = cps1_cps_a_regs[CPS1_STARS1_SCROLLY];
1832		stars2x = cps1_cps_a_regs[CPS1_STARS2_SCROLLX];
1833		stars2y = cps1_cps_a_regs[CPS1_STARS2_SCROLLY];
	1737	state->scroll1x = state->cps_a_regs[CPS1_SCROLL1_SCROLLX] + scroll1xoff;
	1738	state->scroll1y = state->cps_a_regs[CPS1_SCROLL1_SCROLLY];
	1739	state->scroll2x = state->cps_a_regs[CPS1_SCROLL2_SCROLLX] + scroll2xoff;
	1740	state->scroll2y = state->cps_a_regs[CPS1_SCROLL2_SCROLLY];
	1741	state->scroll3x = state->cps_a_regs[CPS1_SCROLL3_SCROLLX] + scroll3xoff;
	1742	state->scroll3y = state->cps_a_regs[CPS1_SCROLL3_SCROLLY];
	1743	state->stars1x = state->cps_a_regs[CPS1_STARS1_SCROLLX];
	1744	state->stars1y = state->cps_a_regs[CPS1_STARS1_SCROLLY];
	1745	state->stars2x = state->cps_a_regs[CPS1_STARS2_SCROLLX];
	1746	state->stars2y = state->cps_a_regs[CPS1_STARS2_SCROLLY];
1834	1747
1835	1748	/* Get layer enable bits */
1836		layercontrol = cps1_cps_b_regs[cps1_game_config->layer_control/2];
1837		videocontrol = cps1_cps_a_regs[CPS1_VIDEOCONTROL];
1838		tilemap_set_enable(cps1_bg_tilemap[0],layercontrol & cps1_game_config->layer_enable_mask[0]);
1839		tilemap_set_enable(cps1_bg_tilemap[1],(layercontrol & cps1_game_config->layer_enable_mask[1]) && (videocontrol & 4));
1840		tilemap_set_enable(cps1_bg_tilemap[2],(layercontrol & cps1_game_config->layer_enable_mask[2]) && (videocontrol & 8));
1841		cps1_stars_enabled[0] = layercontrol & cps1_game_config->layer_enable_mask[3];
1842		cps1_stars_enabled[1] = layercontrol & cps1_game_config->layer_enable_mask[4];
	1749	layercontrol = state->cps_b_regs[state->game_config->layer_control / 2];
	1750	videocontrol = state->cps_a_regs[CPS1_VIDEOCONTROL];
	1751	tilemap_set_enable(state->bg_tilemap[0],layercontrol & state->game_config->layer_enable_mask[0]);
	1752	tilemap_set_enable(state->bg_tilemap[1],(layercontrol & state->game_config->layer_enable_mask[1]) && (videocontrol & 4));
	1753	tilemap_set_enable(state->bg_tilemap[2],(layercontrol & state->game_config->layer_enable_mask[2]) && (videocontrol & 8));
	1754	state->stars_enabled[0] = layercontrol & state->game_config->layer_enable_mask[3];
	1755	state->stars_enabled[1] = layercontrol & state->game_config->layer_enable_mask[4];
1843	1756
1844	1757
1845	1758	{
1846		int enablemask;
	1759	int enablemask = 0;
1847	1760
1848		enablemask = 0;
1849		if (cps1_game_config->layer_enable_mask[0] == cps1_game_config->layer_enable_mask[1])
1850		enablemask = cps1_game_config->layer_enable_mask[0];
1851		if (cps1_game_config->layer_enable_mask[0] == cps1_game_config->layer_enable_mask[2])
1852		enablemask = cps1_game_config->layer_enable_mask[0];
1853		if (cps1_game_config->layer_enable_mask[1] == cps1_game_config->layer_enable_mask[2])
1854		enablemask = cps1_game_config->layer_enable_mask[1];
	1761	if (state->game_config->layer_enable_mask[0] == state->game_config->layer_enable_mask[1])
	1762	enablemask = state->game_config->layer_enable_mask[0];
	1763
	1764	if (state->game_config->layer_enable_mask[0] == state->game_config->layer_enable_mask[2])
	1765	enablemask = state->game_config->layer_enable_mask[0];
	1766
	1767	if (state->game_config->layer_enable_mask[1] == state->game_config->layer_enable_mask[2])
	1768	enablemask = state->game_config->layer_enable_mask[1];
	1769
1855	1770	if (enablemask)
1856	1771	{
1857	1772	if (((layercontrol & enablemask) && (layercontrol & enablemask) != enablemask))
1858		popmessage("layer %02x contact MAMEDEV",layercontrol&0xc03f);
	1773	popmessage("layer %02x contact MAMEDEV", layercontrol & 0xc03f);
1859	1774	}
1860	1775
1861		enablemask = cps1_game_config->layer_enable_mask[0] | cps1_game_config->layer_enable_mask[1]
1862		| cps1_game_config->layer_enable_mask[2]
1863		| cps1_game_config->layer_enable_mask[3] | cps1_game_config->layer_enable_mask[4];
	1776	enablemask = state->game_config->layer_enable_mask[0] | state->game_config->layer_enable_mask[1]
	1777	| state->game_config->layer_enable_mask[2]
	1778	| state->game_config->layer_enable_mask[3] | state->game_config->layer_enable_mask[4];
	1779
1864	1780	if (((layercontrol & ~enablemask) & 0x003e) != 0)
1865		popmessage("layer %02x contact MAMEDEV",layercontrol&0xc03f);
	1781	popmessage("layer %02x contact MAMEDEV", layercontrol & 0xc03f);
1866	1782	}
1867	1783
1868	1784	}
r6740	r6741
1870	1786
1871	1787	WRITE16_HANDLER( cps1_gfxram_w )
1872	1788	{
	1789	cps_state *state = (cps_state *)space->machine->driver_data;
1873	1790	int page = (offset >> 7) & 0x3c0;
1874		COMBINE_DATA(&cps1_gfxram[offset]);
	1791	COMBINE_DATA(&state->gfxram[offset]);
1875	1792
1876		if (page == (cps1_cps_a_regs[CPS1_SCROLL1_BASE] & 0x3c0))
1877		tilemap_mark_tile_dirty(cps1_bg_tilemap[0],offset/2 & 0x0fff);
1878		if (page == (cps1_cps_a_regs[CPS1_SCROLL2_BASE] & 0x3c0))
1879		tilemap_mark_tile_dirty(cps1_bg_tilemap[1],offset/2 & 0x0fff);
1880		if (page == (cps1_cps_a_regs[CPS1_SCROLL3_BASE] & 0x3c0))
1881		tilemap_mark_tile_dirty(cps1_bg_tilemap[2],offset/2 & 0x0fff);
	1793	if (page == (state->cps_a_regs[CPS1_SCROLL1_BASE] & 0x3c0))
	1794	tilemap_mark_tile_dirty(state->bg_tilemap[0], offset / 2 & 0x0fff);
	1795
	1796	if (page == (state->cps_a_regs[CPS1_SCROLL2_BASE] & 0x3c0))
	1797	tilemap_mark_tile_dirty(state->bg_tilemap[1], offset / 2 & 0x0fff);
	1798
	1799	if (page == (state->cps_a_regs[CPS1_SCROLL3_BASE] & 0x3c0))
	1800	tilemap_mark_tile_dirty(state->bg_tilemap[2], offset / 2 & 0x0fff);
1882	1801	}
1883	1802
1884	1803
1885	1804
1886		static int gfxrom_bank_mapper(running_machine *machine, int type, int code)
	1805	static int gfxrom_bank_mapper( running_machine *machine, int type, int code )
1887	1806	{
1888		const struct gfx_range *range = cps1_game_config->bank_mapper;
	1807	cps_state *state = (cps_state *)machine->driver_data;
	1808	const struct gfx_range *range = state->game_config->bank_mapper;
1889	1809	int shift = 0;
1890	1810
1891	1811	assert(range);
r6740	r6741
1910	1830	int i;
1911	1831
1912	1832	for (i = 0; i < range->bank; ++i)
1913		base += cps1_game_config->bank_sizes[i];
	1833	base += state->game_config->bank_sizes[i];
1914	1834
1915		return (base + (code & (cps1_game_config->bank_sizes[range->bank] - 1))) >> shift;
	1835	return (base + (code & (state->game_config->bank_sizes[range->bank] - 1))) >> shift;
1916	1836	}
1917	1837	}
1918	1838
r6740	r6741
1920	1840	}
1921	1841
1922	1842	#ifdef MAME_DEBUG
1923		//  popmessage("tile %02x/%04x out of range", type,code>>shift);
	1843	//  popmessage("tile %02x/%04x out of range", type, code >> shift);
1924	1844	#endif
1925	1845
1926	1846	return -1;
r6740	r6741
1951	1871	return (row & 0x07) + ((col & 0x3f) << 3) + ((row & 0x38) << 6);
1952	1872	}
1953	1873
1954		static UINT8 empty_tile8x8[8*8];
1955		static UINT8 empty_tile[32*32/2];
1956
1957	1874	static TILE_GET_INFO( get_tile0_info )
1958	1875	{
1959		int code = cps1_scroll1[2*tile_index];
1960		int attr = cps1_scroll1[2*tile_index+1];
	1876	cps_state *state = (cps_state *)machine->driver_data;
	1877	int code = state->scroll1[2 * tile_index];
	1878	int attr = state->scroll1[2 * tile_index + 1];
1961	1879	int gfxset;
1962	1880
1963	1881	code = gfxrom_bank_mapper(machine, GFXTYPE_SCROLL1, code);
r6740	r6741
1977	1895	// for out of range tiles, switch to fully transparent data
1978	1896	// (but still call SET_TILE_INFO, otherwise problems might occur on boot e.g. unsquad)
1979	1897	if (code == -1)
1980		tileinfo->pen_data = empty_tile8x8;
	1898	tileinfo->pen_data = state->empty_tile8x8;
1981	1899	}
1982	1900
1983	1901	static TILE_GET_INFO( get_tile1_info )
1984	1902	{
1985		int code = cps1_scroll2[2*tile_index];
1986		int attr = cps1_scroll2[2*tile_index+1];
	1903	cps_state *state = (cps_state *)machine->driver_data;
	1904	int code = state->scroll2[2 * tile_index];
	1905	int attr = state->scroll2[2 * tile_index + 1];
1987	1906
1988	1907	code = gfxrom_bank_mapper(machine, GFXTYPE_SCROLL2, code);
1989	1908
r6740	r6741
1996	1915
1997	1916	// for out of range tiles, switch to fully transparent data
1998	1917	if (code == -1)
1999		tileinfo->pen_data = empty_tile;
	1918	tileinfo->pen_data = state->empty_tile;
2000	1919	}
2001	1920
2002	1921	static TILE_GET_INFO( get_tile2_info )
2003	1922	{
2004		int code = cps1_scroll3[2*tile_index] & 0x3fff;
2005		int attr = cps1_scroll3[2*tile_index+1];
	1923	cps_state *state = (cps_state *)machine->driver_data;
	1924	int code = state->scroll3[2 * tile_index] & 0x3fff;
	1925	int attr = state->scroll3[2 * tile_index + 1];
2006	1926
2007	1927	code = gfxrom_bank_mapper(machine, GFXTYPE_SCROLL3, code);
2008	1928
r6740	r6741
2016	1936	// for out of range tiles, switch to fully transparent data
2017	1937	// (but still call SET_TILE_INFO, otherwise problems might occur on boot e.g. unsquad)
2018	1938	if (code == -1)
2019		tileinfo->pen_data = empty_tile;
	1939	tileinfo->pen_data = state->empty_tile;
2020	1940	}
2021	1941
2022	1942
2023	1943
2024		static void cps1_update_transmasks(void)
	1944	static void cps1_update_transmasks( running_machine *machine )
2025	1945	{
	1946	cps_state *state = (cps_state *)machine->driver_data;
2026	1947	int i;
2027	1948
2028		for (i = 0;i < 4;i++)
	1949	for (i = 0; i < 4; i++)
2029	1950	{
2030	1951	int mask;
2031	1952
2032	1953	/* Get transparency registers */
2033		if (cps1_game_config->priority[i] != -1)
2034		mask = cps1_cps_b_regs[cps1_game_config->priority[i]/2] ^ 0xffff;
2035		else mask = 0xffff;   /* completely transparent if priority masks not defined (qad) */
	1954	if (state->game_config->priority[i] != -1)
	1955	mask = state->cps_b_regs[state->game_config->priority[i] / 2] ^ 0xffff;
	1956	else
	1957	mask = 0xffff;   /* completely transparent if priority masks not defined (qad) */
2036	1958
2037		tilemap_set_transmask(cps1_bg_tilemap[0],i,mask,0x8000);
2038		tilemap_set_transmask(cps1_bg_tilemap[1],i,mask,0x8000);
2039		tilemap_set_transmask(cps1_bg_tilemap[2],i,mask,0x8000);
	1959	tilemap_set_transmask(state->bg_tilemap[0], i, mask, 0x8000);
	1960	tilemap_set_transmask(state->bg_tilemap[1], i, mask, 0x8000);
	1961	tilemap_set_transmask(state->bg_tilemap[2], i, mask, 0x8000);
2040	1962	}
2041	1963	}
2042	1964
	1965	static STATE_POSTLOAD( cps_postload )
	1966	{
	1967	cps1_get_video_base(machine);
	1968	}
	1969
2043	1970	static VIDEO_START( cps )
2044	1971	{
	1972	cps_state *state = (cps_state *)machine->driver_data;
2045	1973	int i;
2046	1974
2047	1975	MACHINE_RESET_CALL(cps);
2048	1976
2049		cps1_bg_tilemap[0] = tilemap_create(machine, get_tile0_info,tilemap0_scan, 8, 8,64,64);
2050		cps1_bg_tilemap[1] = tilemap_create(machine, get_tile1_info,tilemap1_scan,16,16,64,64);
2051		cps1_bg_tilemap[2] = tilemap_create(machine, get_tile2_info,tilemap2_scan,32,32,64,64);
	1977	/* Put in some const */
	1978	state->scroll_size    = 0x4000;   /* scroll1, scroll2, scroll3 */
	1979	state->obj_size       = 0x0800;
	1980	state->cps2_obj_size  = 0x2000;
	1981	state->other_size     = 0x0800;
	1982	state->palette_align  = 0x0400;   /* minimum alignment is a single palette page (512 colors). Verified on pcb. */
	1983	state->palette_size   = cps1_palette_entries * 32; /* Size of palette RAM */
	1984	state->stars_rom_size = 0x2000;   /* first 0x4000 of gfx ROM are used, but 0x0000-0x1fff is == 0x2000-0x3fff */
2052	1985
	1986	/* create tilemaps */
	1987	state->bg_tilemap[0] = tilemap_create(machine, get_tile0_info, tilemap0_scan,  8,  8, 64, 64);
	1988	state->bg_tilemap[1] = tilemap_create(machine, get_tile1_info, tilemap1_scan, 16, 16, 64, 64);
	1989	state->bg_tilemap[2] = tilemap_create(machine, get_tile2_info, tilemap2_scan, 32, 32, 64, 64);
	1990
	1991	/* create empty tiles */
	1992	memset(state->empty_tile8x8, 0x0f, sizeof(state->empty_tile8x8));
	1993	memset(state->empty_tile, 0xff, sizeof(state->empty_tile));   // 16x16 and 32x32 use packed graphics, 8x8 does not
	1994
2053	1995	/* front masks will change at runtime to handle sprite occluding */
2054		cps1_update_transmasks();
	1996	cps1_update_transmasks(machine);
2055	1997
2056		memset(empty_tile8x8,0x0f,sizeof(empty_tile8x8));
2057		memset(empty_tile,0xff,sizeof(empty_tile));   // 16x16 and 32x32 use packed graphics, 8x8 does not
	1998	for (i = 0; i < cps1_palette_entries * 16; i++)
	1999	palette_set_color(machine, i, MAKE_RGB(0,0,0));
2058	2000
2059		for (i = 0;i < cps1_palette_entries*16;i++)
2060		{
2061		palette_set_color(machine,i,MAKE_RGB(0,0,0));
2062		}
	2001	state->buffered_obj = auto_alloc_array_clear(machine, UINT16, state->obj_size / 2);
2063	2002
2064		cps1_buffered_obj = auto_alloc_array_clear(machine, UINT16, cps1_obj_size/2);
	2003	if (state->cps_version == 2)
	2004	state->cps2_buffered_obj = auto_alloc_array_clear(machine, UINT16, state->cps2_obj_size / 2);
2065	2005
2066		if (cps_version==2)
2067		{
2068		cps2_buffered_obj = auto_alloc_array_clear(machine, UINT16, cps2_obj_size/2);
2069		}
	2006	/* clear RAM regions */
	2007	memset(state->gfxram, 0, state->gfxram_size);   /* Clear GFX RAM */
	2008	memset(state->cps_a_regs, 0, 0x40);   /* Clear CPS-A registers */
	2009	memset(state->cps_b_regs, 0, 0x40);   /* Clear CPS-B registers */
2070	2010
2071		memset(cps1_gfxram, 0, cps1_gfxram_size);   /* Clear GFX RAM */
2072		memset(cps1_cps_a_regs, 0, 0x40);   /* Clear CPS-A registers */
2073		memset(cps1_cps_b_regs, 0, 0x40);   /* Clear CPS-B registers */
2074
2075		if (cps_version == 2)
	2011	if (state->cps_version == 2)
2076	2012	{
2077		memset(cps2_objram1, 0, cps2_obj_size);
2078		memset(cps2_objram2, 0, cps2_obj_size);
	2013	memset(state->objram1, 0, state->cps2_obj_size);
	2014	memset(state->objram2, 0, state->cps2_obj_size);
2079	2015	}
2080	2016
2081	2017	/* Put in some defaults */
2082		cps1_cps_a_regs[CPS1_OBJ_BASE]     = 0x9200;
2083		cps1_cps_a_regs[CPS1_SCROLL1_BASE] = 0x9000;
2084		cps1_cps_a_regs[CPS1_SCROLL2_BASE] = 0x9040;
2085		cps1_cps_a_regs[CPS1_SCROLL3_BASE] = 0x9080;
2086		cps1_cps_a_regs[CPS1_OTHER_BASE]   = 0x9100;
	2018	state->cps_a_regs[CPS1_OBJ_BASE]     = 0x9200;
	2019	state->cps_a_regs[CPS1_SCROLL1_BASE] = 0x9000;
	2020	state->cps_a_regs[CPS1_SCROLL2_BASE] = 0x9040;
	2021	state->cps_a_regs[CPS1_SCROLL3_BASE] = 0x9080;
	2022	state->cps_a_regs[CPS1_OTHER_BASE]   = 0x9100;
2087	2023
2088		assert_always(cps1_game_config, "cps1_game_config hasn't been set up yet");
	2024	/* This should never be hit, since game_config is set in MACHINE_RESET */
	2025	assert_always(state->game_config, "state_game_config hasn't been set up yet");
2089	2026
	2027
2090	2028	/* Set up old base */
2091		cps1_get_video_base();   /* Calculate base pointers */
2092		cps1_get_video_base();   /* Calculate old base pointers */
	2029	state->scroll1 = NULL;
	2030	state->scroll2 = NULL;
	2031	state->scroll3 = NULL;
	2032	state->obj = NULL;
	2033	state->other = NULL;
	2034	cps1_get_video_base(machine);   /* Calculate base pointers */
	2035	cps1_get_video_base(machine);   /* Calculate old base pointers */
	2036
	2037	/* state save register */
	2038	state_save_register_global(machine, state->scanline1);
	2039	state_save_register_global(machine, state->scanline2);
	2040	state_save_register_global(machine, state->scancalls);
	2041	#if 0
	2042	/* these do not need to be saved, because they are recovered from cps_a_regs in cps1_postload */
	2043	state_save_register_global(machine, state->scroll1x);
	2044	state_save_register_global(machine, state->scroll1y);
	2045	state_save_register_global(machine, state->scroll2x);
	2046	state_save_register_global(machine, state->scroll2y);
	2047	state_save_register_global(machine, state->scroll3x);
	2048	state_save_register_global(machine, state->scroll3y);
	2049	state_save_register_global(machine, state->stars1x);
	2050	state_save_register_global(machine, state->stars1y);
	2051	state_save_register_global(machine, state->stars2x);
	2052	state_save_register_global(machine, state->stars2y);
	2053	state_save_register_global_array(machine, state->stars_enabled);
	2054	#endif
	2055	state_save_register_global(machine, state->last_sprite_offset);
	2056	state_save_register_global(machine, state->pri_ctrl);
	2057	state_save_register_global(machine, state->objram_bank);
	2058
	2059	state_save_register_global_pointer(machine, state->buffered_obj, state->obj_size / 2);
	2060	if (state->cps_version == 2)
	2061	{
	2062	state_save_register_global(machine, state->cps2_last_sprite_offset);
	2063	state_save_register_global_pointer(machine, state->cps2_buffered_obj, state->cps2_obj_size / 2);
	2064	}
	2065
	2066	state_save_register_postload(machine, cps_postload, NULL);
2093	2067	}
2094	2068
2095	2069	VIDEO_START( cps1 )
2096	2070	{
2097		cps_version=1;
	2071	cps_state *state = (cps_state *)machine->driver_data;
	2072
	2073	state->cps_version = 1;
2098	2074	VIDEO_START_CALL(cps);
2099	2075	}
2100	2076
2101	2077	VIDEO_START( cps2 )
2102	2078	{
2103		cps_version=2;
	2079	cps_state *state = (cps_state *)machine->driver_data;
	2080
	2081	state->cps_version = 2;
2104	2082	VIDEO_START_CALL(cps);
2105	2083	}
2106	2084
r6740	r6741
2112	2090
2113	2091	***************************************************************************/
2114	2092
2115		static void cps1_build_palette(running_machine *machine, const UINT16* const palette_base)
	2093	static void cps1_build_palette( running_machine *machine, const UINT16* const palette_base )
2116	2094	{
	2095	cps_state *state = (cps_state *)machine->driver_data;
2117	2096	int offset, page;
2118	2097	const UINT16 *palette_ram = palette_base;
	2098	int ctrl = state->cps_b_regs[state->game_config->palette_control/2];
2119	2099
2120		int ctrl = cps1_cps_b_regs[cps1_game_config->palette_control/2];
2121
2122	2100	/*
2123	2101	The palette is copied only for pages that are enabled in the ctrl
2124	2102	register. Note that if the first palette pages are skipped, all
r6740	r6741
2126	2104	*/
2127	2105	for (page = 0; page < 6; ++page)
2128	2106	{
2129		if (BIT(ctrl,page))
	2107	if (BIT(ctrl, page))
2130	2108	{
2131	2109	for (offset = 0; offset < 0x200; ++offset)
2132	2110	{
r6740	r6741
2136	2114	// from my understanding of the schematics, when the 'brightness'
2137	2115	// component is set to 0 it should reduce brightness to 1/3
2138	2116
2139		bright = 0x0f + ((palette>>12)<<1);
	2117	bright = 0x0f + ((palette >> 12) << 1);
2140	2118
2141		r = ((palette>>8)&0x0f) * 0x11 * bright / 0x2d;
2142		g = ((palette>>4)&0x0f) * 0x11 * bright / 0x2d;
2143		b = ((palette>>0)&0x0f) * 0x11 * bright / 0x2d;
	2119	r = ((palette >> 8) & 0x0f) * 0x11 * bright / 0x2d;
	2120	g = ((palette >> 4) & 0x0f) * 0x11 * bright / 0x2d;
	2121	b = ((palette >> 0) & 0x0f) * 0x11 * bright / 0x2d;
2144	2122
2145		palette_set_color (machine, 0x200*page + offset, MAKE_RGB(r, g, b));
	2123	palette_set_color (machine, 0x200 * page + offset, MAKE_RGB(r, g, b));
2146	2124	}
2147	2125	}
2148	2126	else
r6740	r6741
2190	2168
2191	2169	***************************************************************************/
2192	2170
2193		static void cps1_find_last_sprite(void)    /* Find the offset of last sprite */
	2171	static void cps1_find_last_sprite( running_machine *machine )    /* Find the offset of last sprite */
2194	2172	{
2195		int offset=0;
	2173	cps_state *state = (cps_state *)machine->driver_data;
	2174	int offset = 0;
2196	2175	/* Locate the end of table marker */
2197		while (offset < cps1_obj_size/2)
	2176	while (offset < state->obj_size / 2)
2198	2177	{
2199		int colour=cps1_buffered_obj[offset+3];
	2178	int colour = state->buffered_obj[offset + 3];
2200	2179	if ((colour & 0xff00) == 0xff00)
2201	2180	{
2202	2181	/* Marker found. This is the last sprite. */
2203		cps1_last_sprite_offset=offset-4;
	2182	state->last_sprite_offset = offset - 4;
2204	2183	return;
2205	2184	}
2206		offset+=4;
	2185
	2186	offset += 4;
2207	2187	}
2208	2188	/* Sprites must use full sprite RAM */
2209		cps1_last_sprite_offset=cps1_obj_size/2-4;
	2189	state->last_sprite_offset = state->obj_size / 2 - 4;
2210	2190	}
2211	2191
2212	2192
2213		static void cps1_render_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
	2193	static void cps1_render_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
2214	2194	{
	2195	cps_state *state = (cps_state *)machine->driver_data;
	2196
2215	2197	#define DRAWSPRITE(CODE,COLOR,FLIPX,FLIPY,SX,SY)               \
2216	2198	{                                                   \
2217	2199	if (flip_screen_get(machine))                                 \
r6740	r6741
2220	2202	CODE,                                    \
2221	2203	COLOR,                                    \
2222	2204	!(FLIPX),!(FLIPY),                           \
2223		511-16-(SX),255-16-(SY),                     machine->priority_bitmap,0x02,15);               \
	2205	511-16-(SX),255-16-(SY),   machine->priority_bitmap,0x02,15);               \
2224	2206	else                                             \
2225	2207	pdrawgfx_transpen(bitmap,\
2226	2208	cliprect,machine->gfx[2],                     \
2227	2209	CODE,                                    \
2228	2210	COLOR,                                    \
2229	2211	FLIPX,FLIPY,                              \
2230		SX,SY,                                    machine->priority_bitmap,0x02,15);               \
	2212	SX,SY,            machine->priority_bitmap,0x02,15);               \
2231	2213	}
2232	2214
2233	2215
2234	2216	int i, baseadd;
2235		UINT16 *base=cps1_buffered_obj;
	2217	UINT16 *base = state->buffered_obj;
2236	2218
2237	2219	/* some sf2 hacks draw the sprites in reverse order */
2238		if (cps1_game_config->bootleg_kludge == 1)
	2220	if (state->game_config->bootleg_kludge == 1)
2239	2221	{
2240		base += cps1_last_sprite_offset;
	2222	base += state->last_sprite_offset;
2241	2223	baseadd = -4;
2242	2224	}
2243	2225	else
r6740	r6741
2245	2227	baseadd = 4;
2246	2228	}
2247	2229
2248		for (i=cps1_last_sprite_offset; i>=0; i-=4)
	2230	for (i = state->last_sprite_offset; i >= 0; i -= 4)
2249	2231	{
2250		int x=*(base+0);
2251		int y=*(base+1);
2252		int code  =*(base+2);
2253		int colour=*(base+3);
2254		int col=colour&0x1f;
	2232	int x = *(base + 0);
	2233	int y = *(base + 1);
	2234	int code = *(base + 2);
	2235	int colour = *(base + 3);
	2236	int col = colour & 0x1f;
2255	2237
2256		//      x-=0x20;
2257		//      y+=0x20;
	2238	//      x -= 0x20;
	2239	//      y += 0x20;
2258	2240
2259	2241	code = gfxrom_bank_mapper(machine, GFXTYPE_SPRITES, code);
2260	2242
r6740	r6741
2263	2245	if (colour & 0xff00 )
2264	2246	{
2265	2247	/* handle blocked sprites */
2266		int nx=(colour & 0x0f00) >> 8;
2267		int ny=(colour & 0xf000) >> 12;
2268		int nxs,nys,sx,sy;
	2248	int nx = (colour & 0x0f00) >> 8;
	2249	int ny = (colour & 0xf000) >> 12;
	2250	int nxs, nys, sx, sy;
2269	2251	nx++;
2270	2252	ny++;
2271	2253
2272	2254	if (colour & 0x40)
2273	2255	{
2274	2256	/* Y flip */
2275		if (colour &0x20)
	2257	if (colour & 0x20)
2276	2258	{
2277		for (nys=0; nys<ny; nys++)
	2259	for (nys = 0; nys < ny; nys++)
2278	2260	{
2279		for (nxs=0; nxs<nx; nxs++)
	2261	for (nxs = 0; nxs < nx; nxs++)
2280	2262	{
2281		sx = (x+nxs*16) & 0x1ff;
2282		sy = (y+nys*16) & 0x1ff;
	2263	sx = (x + nxs * 16) & 0x1ff;
	2264	sy = (y + nys * 16) & 0x1ff;
2283	2265
2284	2266	DRAWSPRITE(
2285		//                                      code+(nx-1)-nxs+0x10*(ny-1-nys),
2286		(code & ~0xf) + ((code + (nx-1) - nxs) & 0xf) + 0x10*(ny-1-nys),
2287		(col&0x1f),
	2267	//                                      code + (nx - 1) - nxs + 0x10 * (ny - 1 - nys),
	2268	(code & ~0xf) + ((code + (nx - 1) - nxs) & 0xf) + 0x10 * (ny - 1 - nys),
	2269	(col & 0x1f),
2288	2270	1,1,
2289	2271	sx,sy);
2290	2272	}
r6740	r6741
2292	2274	}
2293	2275	else
2294	2276	{
2295		for (nys=0; nys<ny; nys++)
	2277	for (nys = 0; nys < ny; nys++)
2296	2278	{
2297		for (nxs=0; nxs<nx; nxs++)
	2279	for (nxs = 0; nxs < nx; nxs++)
2298	2280	{
2299		sx = (x+nxs*16) & 0x1ff;
2300		sy = (y+nys*16) & 0x1ff;
	2281	sx = (x + nxs * 16) & 0x1ff;
	2282	sy = (y + nys * 16) & 0x1ff;
2301	2283
2302	2284	DRAWSPRITE(
2303		//                                      code+nxs+0x10*(ny-1-nys),
2304		(code & ~0xf) + ((code + nxs) & 0xf) + 0x10*(ny-1-nys),
2305		(col&0x1f),
	2285	//                                      code + nxs + 0x10 * (ny - 1 - nys),
	2286	(code & ~0xf) + ((code + nxs) & 0xf) + 0x10 * (ny - 1 - nys),
	2287	(col & 0x1f),
2306	2288	0,1,
2307	2289	sx,sy);
2308	2290	}
r6740	r6741
2311	2293	}
2312	2294	else
2313	2295	{
2314		if (colour &0x20)
	2296	if (colour & 0x20)
2315	2297	{
2316		for (nys=0; nys<ny; nys++)
	2298	for (nys = 0; nys < ny; nys++)
2317	2299	{
2318		for (nxs=0; nxs<nx; nxs++)
	2300	for (nxs = 0; nxs<nx; nxs++)
2319	2301	{
2320		sx = (x+nxs*16) & 0x1ff;
2321		sy = (y+nys*16) & 0x1ff;
	2302	sx = (x + nxs * 16) & 0x1ff;
	2303	sy = (y + nys * 16) & 0x1ff;
2322	2304
2323	2305	DRAWSPRITE(
2324		//                                      code+(nx-1)-nxs+0x10*nys,
2325		(code & ~0xf) + ((code + (nx-1) - nxs) & 0xf) + 0x10*nys,
2326		(col&0x1f),
	2306	//                                      code + (nx - 1) - nxs + 0x10 * nys,
	2307	(code & ~0xf) + ((code + (nx - 1) - nxs) & 0xf) + 0x10 * nys,
	2308	(col & 0x1f),
2327	2309	1,0,
2328	2310	sx,sy);
2329	2311	}
r6740	r6741
2331	2313	}
2332	2314	else
2333	2315	{
2334		for (nys=0; nys<ny; nys++)
	2316	for (nys = 0; nys < ny; nys++)
2335	2317	{
2336		for (nxs=0; nxs<nx; nxs++)
	2318	for (nxs = 0; nxs < nx; nxs++)
2337	2319	{
2338		sx = (x+nxs*16) & 0x1ff;
2339		sy = (y+nys*16) & 0x1ff;
	2320	sx = (x + nxs * 16) & 0x1ff;
	2321	sy = (y + nys * 16) & 0x1ff;
2340	2322
2341	2323	DRAWSPRITE(
2342		//                                      code+nxs+0x10*nys,
2343		(code & ~0xf) + ((code + nxs) & 0xf) + 0x10*nys,   // fix 00406: qadj: When playing as the ninja, there is one broekn frame in his animation loop when walking.
2344		(col&0x1f),
	2324	//                                      code + nxs + 0x10 * nys,
	2325	(code & ~0xf) + ((code + nxs) & 0xf) + 0x10 * nys,   // fix 00406: qadj: When playing as the ninja, there is one broekn frame in his animation loop when walking.
	2326	(col & 0x1f),
2345	2327	0,0,
2346	2328	sx,sy);
2347	2329	}
r6740	r6741
2354	2336	/* Simple case... 1 sprite */
2355	2337	DRAWSPRITE(
2356	2338	code,
2357		(col&0x1f),
	2339	(col & 0x1f),
2358	2340	colour&0x20,colour&0x40,
2359	2341	x & 0x1ff,y & 0x1ff);
2360	2342	}
r6740	r6741
2369	2351
2370	2352	WRITE16_HANDLER( cps2_objram_bank_w )
2371	2353	{
	2354	cps_state *state = (cps_state *)space->machine->driver_data;
	2355
2372	2356	if (ACCESSING_BITS_0_7)
2373		{
2374		cps2_objram_bank = data & 1;
2375		}
	2357	state->objram_bank = data & 1;
2376	2358	}
2377	2359
2378	2360	READ16_HANDLER( cps2_objram1_r )
2379	2361	{
2380		if (cps2_objram_bank & 1)
2381		return cps2_objram2[offset];
	2362	cps_state *state = (cps_state *)space->machine->driver_data;
	2363	if (state->objram_bank & 1)
	2364	return state->objram2[offset];
2382	2365	else
2383		return cps2_objram1[offset];
	2366	return state->objram1[offset];
2384	2367	}
2385	2368
2386	2369	READ16_HANDLER( cps2_objram2_r )
2387	2370	{
2388		if (cps2_objram_bank & 1)
2389		return cps2_objram1[offset];
	2371	cps_state *state = (cps_state *)space->machine->driver_data;
	2372	if (state->objram_bank & 1)
	2373	return state->objram1[offset];
2390	2374	else
2391		return cps2_objram2[offset];
	2375	return state->objram2[offset];
2392	2376	}
2393	2377
2394	2378	WRITE16_HANDLER( cps2_objram1_w )
2395	2379	{
2396		if (cps2_objram_bank & 1)
2397		COMBINE_DATA(&cps2_objram2[offset]);
	2380	cps_state *state = (cps_state *)space->machine->driver_data;
	2381	if (state->objram_bank & 1)
	2382	COMBINE_DATA(&state->objram2[offset]);
2398	2383	else
2399		COMBINE_DATA(&cps2_objram1[offset]);
	2384	COMBINE_DATA(&state->objram1[offset]);
2400	2385	}
2401	2386
2402	2387	WRITE16_HANDLER( cps2_objram2_w )
2403	2388	{
2404		if (cps2_objram_bank & 1)
2405		COMBINE_DATA(&cps2_objram1[offset]);
	2389	cps_state *state = (cps_state *)space->machine->driver_data;
	2390	if (state->objram_bank & 1)
	2391	COMBINE_DATA(&state->objram1[offset]);
2406	2392	else
2407		COMBINE_DATA(&cps2_objram2[offset]);
	2393	COMBINE_DATA(&state->objram2[offset]);
2408	2394	}
2409	2395
2410		static UINT16 *cps2_objbase(void)
	2396	static UINT16 *cps2_objbase( running_machine *machine )
2411	2397	{
	2398	cps_state *state = (cps_state *)machine->driver_data;
2412	2399	int baseptr;
2413	2400	baseptr = 0x7000;
2414	2401
2415		if (cps2_objram_bank & 1) baseptr ^= 0x0080;
	2402	if (state->objram_bank & 1)
	2403	baseptr ^= 0x0080;
2416	2404
2417		//popmessage("%04x %d",cps2_port(CPS2_OBJ_BASE),cps2_objram_bank&1);
	2405	//popmessage("%04x %d", cps2_port(machine, CPS2_OBJ_BASE), state->objram_bank & 1);
2418	2406
2419	2407	if (baseptr == 0x7000)
2420		return cps2_objram1;
	2408	return state->objram1;
2421	2409	else //if (baseptr == 0x7080)
2422		return cps2_objram2;
	2410	return state->objram2;
2423	2411	}
2424	2412
2425	2413
2426		static void cps2_find_last_sprite(void)    /* Find the offset of last sprite */
	2414	static void cps2_find_last_sprite( running_machine *machine )    /* Find the offset of last sprite */
2427	2415	{
2428		int offset=0;
2429		UINT16 *base=cps2_buffered_obj;
	2416	cps_state *state = (cps_state *)machine->driver_data;
	2417	int offset = 0;
	2418	UINT16 *base = state->cps2_buffered_obj;
2430	2419
2431	2420	/* Locate the end of table marker */
2432		while (offset < cps2_obj_size/2)
	2421	while (offset < state->cps2_obj_size / 2)
2433	2422	{
2434		if (base[offset+1]>=0x8000
2435		|| base[offset+3]>=0xff00)
	2423	if (base[offset + 1] >= 0x8000 || base[offset + 3] >= 0xff00)
2436	2424	{
2437	2425	/* Marker found. This is the last sprite. */
2438		cps2_last_sprite_offset=offset-4;
	2426	state->cps2_last_sprite_offset = offset - 4;
2439	2427	return;
2440	2428	}
2441	2429
2442		offset+=4;
	2430	offset += 4;
2443	2431	}
2444	2432	/* Sprites must use full sprite RAM */
2445		cps2_last_sprite_offset=cps2_obj_size/2-4;
2446		#undef DRAWSPRITE
	2433	state->cps2_last_sprite_offset = state->cps2_obj_size / 2 - 4;
2447	2434	}
2448	2435
2449		static void cps2_render_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect,int *primasks)
	2436	static void cps2_render_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int *primasks )
2450	2437	{
	2438	cps_state *state = (cps_state *)machine->driver_data;
	2439
2451	2440	#define DRAWSPRITE(CODE,COLOR,FLIPX,FLIPY,SX,SY)                           \
2452	2441	{                                                               \
2453	2442	if (flip_screen_get(machine))                                             \
r6740	r6741
2456	2445	CODE,                                                \
2457	2446	COLOR,                                                \
2458	2447	!(FLIPX),!(FLIPY),                                       \
2459		511-16-(SX),255-16-(SY),                                 machine->priority_bitmap,primasks[priority],15);               \
	2448	511-16-(SX),255-16-(SY),            machine->priority_bitmap,primasks[priority],15);               \
2460	2449	else                                                         \
2461	2450	pdrawgfx_transpen(bitmap,\
2462	2451	cliprect,machine->gfx[2],                                 \
2463	2452	CODE,                                                \
2464	2453	COLOR,                                                \
2465	2454	FLIPX,FLIPY,                                          \
2466		SX,SY,                                                machine->priority_bitmap,primasks[priority],15);               \
	2455	SX,SY,                     machine->priority_bitmap,primasks[priority],15);               \
2467	2456	}
2468	2457
2469	2458	int i;
2470		UINT16 *base=cps2_buffered_obj;
2471		int xoffs = 64-cps2_port(CPS2_OBJ_XOFFS);
2472		int yoffs = 16-cps2_port(CPS2_OBJ_YOFFS);
	2459	UINT16 *base = state->cps2_buffered_obj;
	2460	int xoffs = 64 - cps2_port(machine, CPS2_OBJ_XOFFS);
	2461	int yoffs = 16 - cps2_port(machine, CPS2_OBJ_YOFFS);
2473	2462
2474	2463	#ifdef MAME_DEBUG
2475	2464	if (input_code_pressed(machine, KEYCODE_Z) && input_code_pressed(machine, KEYCODE_R))
r6740	r6741
2478	2467	}
2479	2468	#endif
2480	2469
2481		for (i=cps2_last_sprite_offset; i>=0; i-=4)
	2470	for (i = state->cps2_last_sprite_offset; i >= 0; i -= 4)
2482	2471	{
2483		int x=base[i+0];
2484		int y=base[i+1];
2485		int priority=(x>>13)&0x07;
2486		int code  = base[i+2]+((y & 0x6000) <<3);
2487		int colour= base[i+3];
2488		int col=colour&0x1f;
	2472	int x = base[i + 0];
	2473	int y = base[i + 1];
	2474	int priority = (x >> 13) & 0x07;
	2475	int code = base[i + 2] + ((y & 0x6000) << 3);
	2476	int colour = base[i + 3];
	2477	int col = colour & 0x1f;
2489	2478
2490		if(colour & 0x80)
	2479	if (colour & 0x80)
2491	2480	{
2492		x += cps2_port(CPS2_OBJ_XOFFS);  /* fix the offset of some games */
2493		y += cps2_port(CPS2_OBJ_YOFFS);  /* like Marvel vs. Capcom ending credits */
	2481	x += cps2_port(machine, CPS2_OBJ_XOFFS);  /* fix the offset of some games */
	2482	y += cps2_port(machine, CPS2_OBJ_YOFFS);  /* like Marvel vs. Capcom ending credits */
2494	2483	}
2495	2484
2496		if (colour & 0xff00 )
	2485	if (colour & 0xff00)
2497	2486	{
2498	2487	/* handle blocked sprites */
2499		int nx=(colour & 0x0f00) >> 8;
2500		int ny=(colour & 0xf000) >> 12;
2501		int nxs,nys,sx,sy;
	2488	int nx = (colour & 0x0f00) >> 8;
	2489	int ny = (colour & 0xf000) >> 12;
	2490	int nxs, nys, sx, sy;
2502	2491	nx++;
2503	2492	ny++;
2504	2493
2505	2494	if (colour & 0x40)
2506	2495	{
2507	2496	/* Y flip */
2508		if (colour &0x20)
	2497	if (colour & 0x20)
2509	2498	{
2510		for (nys=0; nys<ny; nys++)
	2499	for (nys = 0; nys < ny; nys++)
2511	2500	{
2512		for (nxs=0; nxs<nx; nxs++)
	2501	for (nxs = 0; nxs < nx; nxs++)
2513	2502	{
2514		sx = (x+nxs*16+xoffs) & 0x3ff;
2515		sy = (y+nys*16+yoffs) & 0x3ff;
	2503	sx = (x + nxs * 16 + xoffs) & 0x3ff;
	2504	sy = (y + nys * 16 + yoffs) & 0x3ff;
2516	2505	DRAWSPRITE(
2517		code+(nx-1)-nxs+0x10*(ny-1-nys),
2518		(col&0x1f),
	2506	code + (nx - 1) - nxs + 0x10 * (ny - 1 - nys),
	2507	(col & 0x1f),
2519	2508	1,1,
2520	2509	sx,sy);
2521	2510	}
r6740	r6741
2523	2512	}
2524	2513	else
2525	2514	{
2526		for (nys=0; nys<ny; nys++)
	2515	for (nys = 0; nys < ny; nys++)
2527	2516	{
2528		for (nxs=0; nxs<nx; nxs++)
	2517	for (nxs = 0; nxs < nx; nxs++)
2529	2518	{
2530		sx = (x+nxs*16+xoffs) & 0x3ff;
2531		sy = (y+nys*16+yoffs) & 0x3ff;
	2519	sx = (x + nxs * 16 + xoffs) & 0x3ff;
	2520	sy = (y + nys * 16 + yoffs) & 0x3ff;
2532	2521
2533	2522	DRAWSPRITE(
2534		code+nxs+0x10*(ny-1-nys),
2535		(col&0x1f),
	2523	code + nxs + 0x10 * (ny - 1 - nys),
	2524	(col & 0x1f),
2536	2525	0,1,
2537	2526	sx,sy);
2538	2527	}
r6740	r6741
2541	2530	}
2542	2531	else
2543	2532	{
2544		if (colour &0x20)
	2533	if (colour & 0x20)
2545	2534	{
2546		for (nys=0; nys<ny; nys++)
	2535	for (nys = 0; nys < ny; nys++)
2547	2536	{
2548		for (nxs=0; nxs<nx; nxs++)
	2537	for (nxs = 0; nxs < nx; nxs++)
2549	2538	{
2550		sx = (x+nxs*16+xoffs) & 0x3ff;
2551		sy = (y+nys*16+yoffs) & 0x3ff;
	2539	sx = (x + nxs * 16 + xoffs) & 0x3ff;
	2540	sy = (y + nys * 16 + yoffs) & 0x3ff;
2552	2541
2553	2542	DRAWSPRITE(
2554		code+(nx-1)-nxs+0x10*nys,
2555		(col&0x1f),
	2543	code + (nx - 1) - nxs + 0x10 * nys,
	2544	(col & 0x1f),
2556	2545	1,0,
2557	2546	sx,sy);
2558	2547	}
r6740	r6741
2560	2549	}
2561	2550	else
2562	2551	{
2563		for (nys=0; nys<ny; nys++)
	2552	for (nys = 0; nys < ny; nys++)
2564	2553	{
2565		for (nxs=0; nxs<nx; nxs++)
	2554	for (nxs = 0; nxs < nx; nxs++)
2566	2555	{
2567		sx = (x+nxs*16+xoffs) & 0x3ff;
2568		sy = (y+nys*16+yoffs) & 0x3ff;
	2556	sx = (x + nxs * 16 + xoffs) & 0x3ff;
	2557	sy = (y + nys * 16 + yoffs) & 0x3ff;
2569	2558
2570	2559	DRAWSPRITE(
2571		//                                      code+nxs+0x10*nys,
2572		(code & ~0xf) + ((code + nxs) & 0xf) + 0x10*nys,   //  pgear fix
2573		(col&0x1f),
	2560	//                                      code + nxs + 0x10 * nys,
	2561	(code & ~0xf) + ((code + nxs) & 0xf) + 0x10 * nys,   //  pgear fix
	2562	(col & 0x1f),
2574	2563	0,0,
2575	2564	sx,sy);
2576	2565	}
r6740	r6741
2583	2572	/* Simple case... 1 sprite */
2584	2573	DRAWSPRITE(
2585	2574	code,
2586		(col&0x1f),
	2575	(col & 0x1f),
2587	2576	colour&0x20,colour&0x40,
2588	2577	(x+xoffs) & 0x3ff,(y+yoffs) & 0x3ff);
2589	2578	}
r6740	r6741
2593	2582
2594	2583
2595	2584
2596		static void cps1_render_stars(const device_config *screen, bitmap_t *bitmap,const rectangle *cliprect)
	2585	static void cps1_render_stars( const device_config *screen, bitmap_t *bitmap, const rectangle *cliprect )
2597	2586	{
	2587	cps_state *state = (cps_state *)screen->machine->driver_data;
2598	2588	int offs;
2599	2589	UINT8 *stars_rom = memory_region(screen->machine, "stars");
2600	2590
2601		if (!stars_rom && (cps1_stars_enabled[0] || cps1_stars_enabled[1]))
	2591	if (!stars_rom && (state->stars_enabled[0] || state->stars_enabled[1]))
2602	2592	{
2603	2593	#ifdef MAME_DEBUG
2604	2594	//      popmessage("stars enabled but no stars ROM");
r6740	r6741
2606	2596	return;
2607	2597	}
2608	2598
2609		if (cps1_stars_enabled[0])
	2599	if (state->stars_enabled[0])
2610	2600	{
2611		for (offs = 0;offs < stars_rom_size/2;offs++)
	2601	for (offs = 0; offs < state->stars_rom_size / 2; offs++)
2612	2602	{
2613		int col = stars_rom[8*offs+4];
	2603	int col = stars_rom[8 * offs + 4];
2614	2604	if (col != 0x0f)
2615	2605	{
2616	2606	int sx = (offs / 256) * 32;
2617	2607	int sy = (offs % 256);
2618		sx = (sx - stars2x + (col & 0x1f)) & 0x1ff;
2619		sy = (sy - stars2y) & 0xff;
	2608	sx = (sx - state->stars2x + (col & 0x1f)) & 0x1ff;
	2609	sy = (sy - state->stars2y) & 0xff;
2620	2610	if (flip_screen_get(screen->machine))
2621	2611	{
2622	2612	sx = 511 - sx;
2623	2613	sy = 255 - sy;
2624	2614	}
2625	2615
2626		col = ((col & 0xe0) >> 1) + (video_screen_get_frame_number(screen)/16 & 0x0f);
	2616	col = ((col & 0xe0) >> 1) + (video_screen_get_frame_number(screen) / 16 & 0x0f);
2627	2617
2628	2618	if (sx >= cliprect->min_x && sx <= cliprect->max_x &&
2629	2619	sy >= cliprect->min_y && sy <= cliprect->max_y)
r6740	r6741
2632	2622	}
2633	2623	}
2634	2624
2635		if (cps1_stars_enabled[1])
	2625	if (state->stars_enabled[1])
2636	2626	{
2637		for (offs = 0;offs < stars_rom_size/2;offs++)
	2627	for (offs = 0; offs < state->stars_rom_size / 2; offs++)
2638	2628	{
2639	2629	int col = stars_rom[8*offs];
2640	2630	if (col != 0x0f)
2641	2631	{
2642	2632	int sx = (offs / 256) * 32;
2643	2633	int sy = (offs % 256);
2644		sx = (sx - stars1x + (col & 0x1f)) & 0x1ff;
2645		sy = (sy - stars1y) & 0xff;
	2634	sx = (sx - state->stars1x + (col & 0x1f)) & 0x1ff;
	2635	sy = (sy - state->stars1y) & 0xff;
2646	2636	if (flip_screen_get(screen->machine))
2647	2637	{
2648	2638	sx = 511 - sx;
2649	2639	sy = 255 - sy;
2650	2640	}
2651	2641
2652		col = ((col & 0xe0) >> 1) + (video_screen_get_frame_number(screen)/16 & 0x0f);
	2642	col = ((col & 0xe0) >> 1) + (video_screen_get_frame_number(screen) / 16 & 0x0f);
2653	2643
2654	2644	if (sx >= cliprect->min_x && sx <= cliprect->max_x &&
2655	2645	sy >= cliprect->min_y && sy <= cliprect->max_y)
r6740	r6741
2660	2650	}
2661	2651
2662	2652
2663		static void cps1_render_layer(running_machine *machine,bitmap_t *bitmap,const rectangle *cliprect,int layer,int primask)
	2653	static void cps1_render_layer( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int layer, int primask )
2664	2654	{
	2655	cps_state *state = (cps_state *)machine->driver_data;
2665	2656	switch (layer)
2666	2657	{
2667	2658	case 0:
2668		cps1_render_sprites(machine,bitmap,cliprect);
	2659	cps1_render_sprites(machine, bitmap, cliprect);
2669	2660	break;
2670	2661	case 1:
2671	2662	case 2:
2672	2663	case 3:
2673		tilemap_draw(bitmap,cliprect,cps1_bg_tilemap[layer-1],TILEMAP_DRAW_LAYER1,primask);
	2664	tilemap_draw(bitmap, cliprect, state->bg_tilemap[layer - 1], TILEMAP_DRAW_LAYER1, primask);
2674	2665	break;
2675	2666	}
2676	2667	}
2677	2668
2678		static void cps1_render_high_layer(bitmap_t *bitmap, const rectangle *cliprect, int layer)
	2669	static void cps1_render_high_layer( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int layer )
2679	2670	{
	2671	cps_state *state = (cps_state *)machine->driver_data;
2680	2672	switch (layer)
2681	2673	{
2682	2674	case 0:
r6740	r6741
2685	2677	case 1:
2686	2678	case 2:
2687	2679	case 3:
2688		tilemap_draw(NULL,cliprect,cps1_bg_tilemap[layer-1],TILEMAP_DRAW_LAYER0,1);
	2680	tilemap_draw(NULL, cliprect, state->bg_tilemap[layer - 1], TILEMAP_DRAW_LAYER0, 1);
2689	2681	break;
2690	2682	}
2691	2683	}
r6740	r6741
2699	2691
2700	2692	VIDEO_UPDATE( cps1 )
2701	2693	{
2702		int layercontrol,l0,l1,l2,l3;
2703		int videocontrol = cps1_cps_a_regs[CPS1_VIDEOCONTROL];
	2694	cps_state *state = (cps_state *)screen->machine->driver_data;
	2695	int layercontrol, l0, l1, l2, l3;
	2696	int videocontrol = state->cps_a_regs[CPS1_VIDEOCONTROL];
2704	2697
2705
2706	2698	flip_screen_set(screen->machine, videocontrol & 0x8000);
2707	2699
2708		layercontrol = cps1_cps_b_regs[cps1_game_config->layer_control/2];
	2700	layercontrol = state->cps_b_regs[state->game_config->layer_control / 2];
2709	2701
2710	2702	/* Get video memory base registers */
2711		cps1_get_video_base();
	2703	cps1_get_video_base(screen->machine);
2712	2704
2713	2705	/* Find the offset of the last sprite in the sprite table */
2714		cps1_find_last_sprite();
2715		if (cps_version == 2)
	2706	cps1_find_last_sprite(screen->machine);
	2707
	2708	if (state->cps_version == 2)
2716	2709	{
2717		cps2_find_last_sprite();
	2710	cps2_find_last_sprite(screen->machine);
2718	2711	}
2719	2712
2720		cps1_update_transmasks();
	2713	cps1_update_transmasks(screen->machine);
2721	2714
2722		tilemap_set_scrollx(cps1_bg_tilemap[0],0,cps1_scroll1x);
2723		tilemap_set_scrolly(cps1_bg_tilemap[0],0,cps1_scroll1y);
	2715	tilemap_set_scrollx(state->bg_tilemap[0], 0, state->scroll1x);
	2716	tilemap_set_scrolly(state->bg_tilemap[0], 0, state->scroll1y);
	2717
2724	2718	if (videocontrol & 0x01)   /* linescroll enable */
2725	2719	{
2726		int scrly=-cps1_scroll2y;
	2720	int scrly = -state->scroll2y;
2727	2721	int i;
2728	2722	int otheroffs;
2729	2723
2730		tilemap_set_scroll_rows(cps1_bg_tilemap[1],1024);
	2724	tilemap_set_scroll_rows(state->bg_tilemap[1], 1024);
2731	2725
2732		otheroffs = cps1_cps_a_regs[CPS1_ROWSCROLL_OFFS];
	2726	otheroffs = state->cps_a_regs[CPS1_ROWSCROLL_OFFS];
2733	2727
2734		for (i = 0;i < 256;i++)
2735		tilemap_set_scrollx(cps1_bg_tilemap[1],(i - scrly) & 0x3ff,cps1_scroll2x + cps1_other[(i + otheroffs) & 0x3ff]);
	2728	for (i = 0; i < 256; i++)
	2729	tilemap_set_scrollx(state->bg_tilemap[1], (i - scrly) & 0x3ff, state->scroll2x + state->other[(i + otheroffs) & 0x3ff]);
2736	2730	}
2737	2731	else
2738	2732	{
2739		tilemap_set_scroll_rows(cps1_bg_tilemap[1],1);
2740		tilemap_set_scrollx(cps1_bg_tilemap[1],0,cps1_scroll2x);
	2733	tilemap_set_scroll_rows(state->bg_tilemap[1], 1);
	2734	tilemap_set_scrollx(state->bg_tilemap[1], 0, state->scroll2x);
2741	2735	}
2742		tilemap_set_scrolly(cps1_bg_tilemap[1],0,cps1_scroll2y);
2743		tilemap_set_scrollx(cps1_bg_tilemap[2],0,cps1_scroll3x);
2744		tilemap_set_scrolly(cps1_bg_tilemap[2],0,cps1_scroll3y);
	2736	tilemap_set_scrolly(state->bg_tilemap[1], 0, state->scroll2y);
	2737	tilemap_set_scrollx(state->bg_tilemap[2], 0, state->scroll3x);
	2738	tilemap_set_scrolly(state->bg_tilemap[2], 0, state->scroll3y);
2745	2739
2746	2740
2747	2741	/* Blank screen */
2748		if (cps_version == 1)
	2742	if (state->cps_version == 1)
2749	2743	{
2750	2744	// CPS1 games use pen 0xbff as background color; this is used in 3wonders,
2751	2745	// mtwins (explosion during attract), mercs (intermission).
2752		bitmap_fill(bitmap,cliprect,0xbff);
	2746	bitmap_fill(bitmap, cliprect, 0xbff);
2753	2747	}
2754	2748	else
2755	2749	{
r6740	r6741
2758	2752	// Maybe Capcom changed the background handling due to the problems that
2759	2753	// it caused on several monitors (because the background extended into the
2760	2754	// blanking area instead of going black, causing the monitor to clip).
2761		bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
	2755	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
2762	2756	}
2763	2757
2764		cps1_render_stars(screen, bitmap,cliprect);
	2758	cps1_render_stars(screen, bitmap, cliprect);
2765	2759
2766	2760	/* Draw layers (0 = sprites, 1-3 = tilemaps) */
2767	2761	l0 = (layercontrol >> 0x06) & 03;
2768	2762	l1 = (layercontrol >> 0x08) & 03;
2769	2763	l2 = (layercontrol >> 0x0a) & 03;
2770	2764	l3 = (layercontrol >> 0x0c) & 03;
2771		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
	2765	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
2772	2766
2773		if (cps_version == 1)
	2767	if (state->cps_version == 1)
2774	2768	{
2775		cps1_render_layer(screen->machine,bitmap,cliprect,l0,0);
2776		if (l1 == 0) cps1_render_high_layer(bitmap,cliprect,l0); /* prepare mask for sprites */
2777		cps1_render_layer(screen->machine,bitmap,cliprect,l1,0);
2778		if (l2 == 0) cps1_render_high_layer(bitmap,cliprect,l1); /* prepare mask for sprites */
2779		cps1_render_layer(screen->machine,bitmap,cliprect,l2,0);
2780		if (l3 == 0) cps1_render_high_layer(bitmap,cliprect,l2); /* prepare mask for sprites */
2781		cps1_render_layer(screen->machine,bitmap,cliprect,l3,0);
	2769	cps1_render_layer(screen->machine, bitmap, cliprect, l0, 0);
	2770
	2771	if (l1 == 0)
	2772	cps1_render_high_layer(screen->machine, bitmap, cliprect, l0); /* prepare mask for sprites */
	2773
	2774	cps1_render_layer(screen->machine, bitmap, cliprect, l1, 0);
	2775
	2776	if (l2 == 0)
	2777	cps1_render_high_layer(screen->machine, bitmap, cliprect, l1); /* prepare mask for sprites */
	2778
	2779	cps1_render_layer(screen->machine, bitmap, cliprect, l2, 0);
	2780
	2781	if (l3 == 0)
	2782	cps1_render_high_layer(screen->machine, bitmap, cliprect, l2); /* prepare mask for sprites */
	2783
	2784	cps1_render_layer(screen->machine, bitmap, cliprect, l3, 0);
2782	2785	}
2783	2786	else
2784	2787	{
2785		int l0pri,l1pri,l2pri,l3pri;
2786		int primasks[8],i;
2787		l0pri = (pri_ctrl >> 4*l0) & 0x0f;
2788		l1pri = (pri_ctrl >> 4*l1) & 0x0f;
2789		l2pri = (pri_ctrl >> 4*l2) & 0x0f;
2790		l3pri = (pri_ctrl >> 4*l3) & 0x0f;
	2788	int l0pri, l1pri, l2pri, l3pri;
	2789	int primasks[8], i;
	2790	l0pri = (state->pri_ctrl >> 4 * l0) & 0x0f;
	2791	l1pri = (state->pri_ctrl >> 4 * l1) & 0x0f;
	2792	l2pri = (state->pri_ctrl >> 4 * l2) & 0x0f;
	2793	l3pri = (state->pri_ctrl >> 4 * l3) & 0x0f;
2791	2794
2792	2795	#if 0
2793		if (   (cps2_port(CPS2_OBJ_BASE) != 0x7080 && cps2_port(CPS2_OBJ_BASE) != 0x7000) ||
2794		cps2_port(CPS2_OBJ_UK1) != 0x807d ||
2795		(cps2_port(CPS2_OBJ_UK2) != 0x0000 && cps2_port(CPS2_OBJ_UK2) != 0x1101 && cps2_port(CPS2_OBJ_UK2) != 0x0001) ||
	2796	if (   (cps2_port(screen->machine, CPS2_OBJ_BASE) != 0x7080 && cps2_port(screen->machine, CPS2_OBJ_BASE) != 0x7000) ||
	2797	cps2_port(screen->machine, CPS2_OBJ_UK1) != 0x807d ||
	2798	(cps2_port(screen->machine, CPS2_OBJ_UK2) != 0x0000 && cps2_port(screen->machine, CPS2_OBJ_UK2) != 0x1101 && cps2_port(screen->machine, CPS2_OBJ_UK2) != 0x0001))
2796	2799	popmessage("base %04x uk1 %04x uk2 %04x",
2797		cps2_port(CPS2_OBJ_BASE),
2798		cps2_port(CPS2_OBJ_UK1),
2799		cps2_port(CPS2_OBJ_UK2));
	2800	cps2_port(screen->machine, CPS2_OBJ_BASE),
	2801	cps2_port(screen->machine, CPS2_OBJ_UK1),
	2802	cps2_port(screen->machine, CPS2_OBJ_UK2));
2800	2803
2801	2804	if (0 && input_code_pressed(screen->machine, KEYCODE_Z))
2802	2805	popmessage("order: %d (%d) %d (%d) %d (%d) %d (%d)",l0,l0pri,l1,l1pri,l2,l2pri,l3,l3pri);
r6740	r6741
2810	2813	{
2811	2814	int mask0 = 0xaa;
2812	2815	int mask1 = 0xcc;
2813		if(l0pri>l1pri) mask0 &= ~0x88;
2814		if(l0pri>l2pri) mask0 &= ~0xa0;
2815		if(l1pri>l2pri) mask1 &= ~0xc0;
	2816	if (l0pri > l1pri) mask0 &= ~0x88;
	2817	if (l0pri > l2pri) mask0 &= ~0xa0;
	2818	if (l1pri > l2pri) mask1 &= ~0xc0;
2816	2819
2817	2820	primasks[0] = 0xff;
2818		for (i = 1;i < 8;i++)
	2821	for (i = 1; i < 8; i++)
2819	2822	{
2820	2823	if (i <= l0pri && i <= l1pri && i <= l2pri)
2821	2824	{
r6740	r6741
2829	2832	}
2830	2833	}
2831	2834
2832		cps1_render_layer(screen->machine,bitmap,cliprect,l0,1);
2833		cps1_render_layer(screen->machine,bitmap,cliprect,l1,2);
2834		cps1_render_layer(screen->machine,bitmap,cliprect,l2,4);
2835		cps2_render_sprites(screen->machine,bitmap,cliprect,primasks);
	2835	cps1_render_layer(screen->machine, bitmap, cliprect, l0, 1);
	2836	cps1_render_layer(screen->machine, bitmap, cliprect, l1, 2);
	2837	cps1_render_layer(screen->machine, bitmap, cliprect, l2, 4);
	2838	cps2_render_sprites(screen->machine, bitmap, cliprect, primasks);
2836	2839	}
2837	2840
2838	2841	return 0;
r6740	r6741
2840	2843
2841	2844	VIDEO_EOF( cps1 )
2842	2845	{
	2846	cps_state *state = (cps_state *)machine->driver_data;
	2847
2843	2848	/* Get video memory base registers */
2844		cps1_get_video_base();
	2849	cps1_get_video_base(machine);
2845	2850
2846		if (cps_version == 1)
	2851	if (state->cps_version == 1)
2847	2852	{
2848	2853	/* CPS1 sprites have to be delayed one frame */
2849		memcpy(cps1_buffered_obj, cps1_obj, cps1_obj_size);
	2854	memcpy(state->buffered_obj, state->obj, state->obj_size);
2850	2855	}
2851	2856	}
2852	2857
2853		void cps2_set_sprite_priorities(void)
	2858	void cps2_set_sprite_priorities( running_machine *machine )
2854	2859	{
2855		pri_ctrl = cps2_port(CPS2_OBJ_PRI);
	2860	cps_state *state = (cps_state *)machine->driver_data;
	2861	state->pri_ctrl = cps2_port(machine, CPS2_OBJ_PRI);
2856	2862	}
2857	2863
2858		void cps2_objram_latch(void)
	2864	void cps2_objram_latch( running_machine *machine )
2859	2865	{
2860		cps2_set_sprite_priorities();
2861		memcpy(cps2_buffered_obj, cps2_objbase(), cps2_obj_size);
	2866	cps_state *state = (cps_state *)machine->driver_data;
	2867	cps2_set_sprite_priorities(machine);
	2868	memcpy(state->cps2_buffered_obj, cps2_objbase(machine), state->cps2_obj_size);
2862	2869	}

src/mame/video/yunsun16.c

r6740	r6741
21	21	***************************************************************************/
22	22
23	23	#include "driver.h"
24		#include "yunsun16.h"
	24	#include "includes/yunsun16.h"
25	25
26	26
27	27	/***************************************************************************

src/mame/video/stactics.c

r6740	r6741
47	47	***************************************************************************/
48	48
49	49	#include "driver.h"
50		#include "stactics.h"
	50	#include "includes/stactics.h"
51	51
52	52
53	53

src/mame/video/mermaid.c

r6740	r6741
2	2
3	3	static tilemap *bg_tilemap, *fg_tilemap;
4	4
	5	UINT8* mermaid_videoram;
	6	UINT8* mermaid_colorram;
5	7	UINT8* mermaid_videoram2;
6	8	UINT8* mermaid_bg_scrollram;
7	9	UINT8* mermaid_fg_scrollram;
r6740	r6741
62	64
63	65	WRITE8_HANDLER( mermaid_videoram_w )
64	66	{
65		space->machine->generic.videoram.u8[offset] = data;
	67	mermaid_videoram[offset] = data;
66	68	tilemap_mark_tile_dirty(fg_tilemap, offset);
67	69	}
68	70
69	71	WRITE8_HANDLER( mermaid_colorram_w )
70	72	{
71		space->machine->generic.colorram.u8[offset] = data;
	73	mermaid_colorram[offset] = data;
72	74	tilemap_mark_tile_dirty(fg_tilemap, offset);
73	75	}
74	76
r6740	r6741
143	145
144	146	static TILE_GET_INFO( get_fg_tile_info )
145	147	{
146		int attr = machine->generic.colorram.u8[tile_index];
147		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0x30) << 4);
	148	int attr = mermaid_colorram[tile_index];
	149	int code = mermaid_videoram[tile_index] + ((attr & 0x30) << 4);
148	150	int color = attr & 0x0f;
149	151	int flags = TILE_FLIPYX((attr & 0xc0) >> 6);
150	152

src/mame/video/gaelco3d.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "eminline.h"
11		#include "gaelco3d.h"
	11	#include "includes/gaelco3d.h"
12	12	#include "cpu/tms32031/tms32031.h"
13	13	#include "video/rgbutil.h"
14	14	#include "video/poly.h"

src/mame/video/lethalj.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/tms34010/tms34010.h"
9		#include "lethalj.h"
	9	#include "includes/lethalj.h"
10	10
11	11
12	12	#define BLITTER_SOURCE_WIDTH      1024

src/mame/video/itech8.c

r6740	r6741
91	91	#include "video/tms34061.h"
92	92	#include "video/tlc34076.h"
93	93	#include "cpu/m6809/m6809.h"
94		#include "itech8.h"
	94	#include "includes/itech8.h"
95	95
96	96
97	97	/*************************************

src/mame/video/gstriker.c

r6740	r6741
1	1	#include "driver.h"
2		#include "gstriker.h"
	2	#include "includes/gstriker.h"
3	3
4	4	//UINT16 *gs_videoram3;
5	5	//UINT16 *gs_mixer_regs;

src/mame/video/snk.c

r6740	r6741
1	1	#include "driver.h"
2		#include "snk.h"
	2	#include "includes/snk.h"
3	3
4	4	/*******************************************************************************
5	5	Shadow Handling Notes

src/mame/video/namconb1.c

r6740	r6741
1	1	/* video/namconb1.c */
2	2
3	3	#include "driver.h"
4		#include "namconb1.h"
5		#include "namcoic.h"
6		#include "namcos2.h"
	4	#include "includes/namconb1.h"
	5	#include "includes/namcoic.h"
	6	#include "includes/namcos2.h"
7	7	#include "audio/namcoc7x.h"
8	8
9	9	static UINT32 tilemap_tile_bank[4];

src/mame/video/arcadecl.c

r6740	r6741
9	9
10	10
11	11	#include "driver.h"
12		#include "arcadecl.h"
	12	#include "includes/arcadecl.h"
13	13
14	14
15	15

src/mame/video/suprslam.c

r6740	r6741
1	1	/* Super Slams - video, see notes in driver file */
2	2
3	3	#include "driver.h"
4		#include "video/konamiic.h"
	4	#include "video/konicdev.h"
	5	#include "includes/suprslam.h"
5	6
6	7
7		UINT16 *suprslam_screen_videoram, *suprslam_bg_videoram,*suprslam_sp_videoram, *suprslam_spriteram;
8		static UINT16 screen_bank, bg_bank;
9		static tilemap *suprslam_screen_tilemap, *suprslam_bg_tilemap;
10
11		/* todo, fix zooming correctly, its _not_ like aerofgt */
12		static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
	8	/* todo, fix zooming correctly, it's _not_ like aerofgt */
	9	static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
13	10	{
14	11	/* SPRITE INFO
15	12
r6740	r6741
33	30
34	31	*/
35	32
36
	33	suprslam_state *state = (suprslam_state *)machine->driver_data;
37	34	const gfx_element *gfx = machine->gfx[1];
38		UINT16 *source = suprslam_spriteram;
39		UINT16 *source2 = suprslam_spriteram;
	35	UINT16 *source = state->spriteram;
	36	UINT16 *source2 = state->spriteram;
40	37	UINT16 *finish = source + 0x2000/2;
41	38
42		while( source<finish )
	39	while (source < finish)
43	40	{
44	41	UINT32 sprnum = source[0] & 0x03ff;
45	42	if (source[0] == 0x4000) break;
r6740	r6741
49	46	source++;
50	47	/* DRAW START */
51	48	{
52		int ypos = source2[sprnum+0] & 0x1ff;
53		int high = (source2[sprnum+0] & 0x0e00) >> 9;
54		int yzoom = (source2[sprnum+0] & 0xf000) >> 12;
	49	int ypos = source2[sprnum + 0] & 0x1ff;
	50	int high = (source2[sprnum + 0] & 0x0e00) >> 9;
	51	int yzoom = (source2[sprnum + 0] & 0xf000) >> 12;
55	52
56		int xpos = source2[sprnum+1] & 0x1ff;
57		int wide = (source2[sprnum+1] & 0x0e00) >> 9;
58		int xzoom = (source2[sprnum+1] & 0xf000) >> 12;
	53	int xpos = source2[sprnum + 1] & 0x1ff;
	54	int wide = (source2[sprnum + 1] & 0x0e00) >> 9;
	55	int xzoom = (source2[sprnum + 1] & 0xf000) >> 12;
59	56
60		int col = (source2[sprnum+2] & 0x3f00) >> 8;
61		int flipx = (source2[sprnum+2] & 0x4000) >> 14;
62		//          int flipy = (source2[sprnum+2] & 0x8000) >> 15;
	57	int col = (source2[sprnum + 2] & 0x3f00) >> 8;
	58	int flipx = (source2[sprnum + 2] & 0x4000) >> 14;
	59	//          int flipy = (source2[sprnum + 2] & 0x8000) >> 15;
63	60
64		int word_offset = source2[sprnum+3] & 0x7fff;
	61	int word_offset = source2[sprnum + 3] & 0x7fff;
65	62	int xcnt, ycnt;
66	63
67	64	int loopno = 0;
r6740	r6741
71	68
72	69	if (ypos > 0xff) ypos -=0x200;
73	70
74		for (ycnt = 0; ycnt < high+1; ycnt ++) {
75		if (!flipx) {
76		for (xcnt = 0; xcnt < wide+1; xcnt ++)   {
77		int tileno = suprslam_sp_videoram[word_offset+loopno];
	71	for (ycnt = 0; ycnt < high+1; ycnt ++)
	72	{
	73	if (!flipx)
	74	{
	75	for (xcnt = 0; xcnt < wide+1; xcnt ++)
	76	{
	77	int tileno = state->sp_videoram[word_offset + loopno];
78	78	drawgfxzoom_transpen(bitmap, cliprect, gfx, tileno, col, 0, 0,xpos + xcnt * xzoom/2, ypos + ycnt * yzoom/2,xzoom << 11, yzoom << 11, 15);
79	79	drawgfxzoom_transpen(bitmap, cliprect, gfx, tileno, col, 0, 0,-0x200+xpos + xcnt * xzoom/2, ypos + ycnt * yzoom/2,xzoom << 11, yzoom << 11, 15);
80	80	loopno ++;
81	81	}
82		} else {
83		for (xcnt = wide; xcnt >= 0; xcnt --)   {
84		int tileno = suprslam_sp_videoram[word_offset+loopno];
	82	}
	83	else
	84	{
	85	for (xcnt = wide; xcnt >= 0; xcnt --)
	86	{
	87	int tileno = state->sp_videoram[word_offset + loopno];
85	88	drawgfxzoom_transpen(bitmap, cliprect, gfx, tileno, col, 1, 0,xpos + xcnt * xzoom/2, ypos + ycnt * yzoom/2,xzoom << 11, yzoom << 11, 15);
86	89	drawgfxzoom_transpen(bitmap, cliprect, gfx, tileno, col, 1, 0,-0x200+xpos + xcnt * xzoom/2, ypos + ycnt * yzoom/2,xzoom << 11, yzoom << 11, 15);
87	90	loopno ++;
r6740	r6741
96	99
97	100	WRITE16_HANDLER( suprslam_screen_videoram_w )
98	101	{
99		suprslam_screen_videoram[offset] = data;
100		tilemap_mark_tile_dirty(suprslam_screen_tilemap,offset);
	102	suprslam_state *state = (suprslam_state *)space->machine->driver_data;
	103
	104	state->screen_videoram[offset] = data;
	105	tilemap_mark_tile_dirty(state->screen_tilemap, offset);
101	106	}
102	107
103	108
104	109	static TILE_GET_INFO( get_suprslam_tile_info )
105	110	{
106		int tileno, colour;
	111	suprslam_state *state = (suprslam_state *)machine->driver_data;
	112	int tileno = state->screen_videoram[tile_index] & 0x0fff;
	113	int colour = state->screen_videoram[tile_index] & 0xf000;
107	114
108		tileno = suprslam_screen_videoram[tile_index] & 0x0fff;
109		colour = suprslam_screen_videoram[tile_index] & 0xf000;
110
111		tileno += screen_bank;
	115	tileno += state->screen_bank;
112	116	colour = colour >> 12;
113	117
114		SET_TILE_INFO(0,tileno,colour,0);
	118	SET_TILE_INFO(0, tileno, colour, 0);
115	119	}
116	120
117	121
118	122	/* BG LAYER */
119	123	WRITE16_HANDLER( suprslam_bg_videoram_w )
120	124	{
121		suprslam_bg_videoram[offset] = data;
122		tilemap_mark_tile_dirty(suprslam_bg_tilemap,offset);
	125	suprslam_state *state = (suprslam_state *)space->machine->driver_data;
	126
	127	state->bg_videoram[offset] = data;
	128	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
123	129	}
124	130
125	131
126	132	static TILE_GET_INFO( get_suprslam_bg_tile_info )
127	133	{
128		int tileno, colour;
	134	suprslam_state *state = (suprslam_state *)machine->driver_data;
	135	int tileno = state->bg_videoram[tile_index] & 0x0fff;
	136	int colour = state->bg_videoram[tile_index] & 0xf000;
129	137
130		tileno = suprslam_bg_videoram[tile_index] & 0x0fff;
131		colour = suprslam_bg_videoram[tile_index] & 0xf000;
132
133		tileno += bg_bank;
	138	tileno += state->bg_bank;
134	139	colour = colour >> 12;
135	140
136		SET_TILE_INFO(2,tileno,colour,0);
	141	SET_TILE_INFO(2, tileno, colour, 0);
137	142	}
138	143
139	144
140	145	VIDEO_START( suprslam )
141	146	{
142		suprslam_bg_tilemap = tilemap_create(machine, get_suprslam_bg_tile_info,tilemap_scan_rows, 16, 16,64,64);
143		suprslam_screen_tilemap = tilemap_create(machine, get_suprslam_tile_info,tilemap_scan_rows, 8, 8,64,32);
	147	suprslam_state *state = (suprslam_state *)machine->driver_data;
144	148
145		K053936_wraparound_enable(0, 1);
146		K053936_set_offset(0, -45, -21);
	149	state->bg_tilemap = tilemap_create(machine, get_suprslam_bg_tile_info, tilemap_scan_rows, 16, 16, 64, 64);
	150	state->screen_tilemap = tilemap_create(machine, get_suprslam_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
147	151
148		tilemap_set_transparent_pen(suprslam_screen_tilemap,15);
	152	tilemap_set_transparent_pen(state->screen_tilemap, 15);
149	153	}
150	154
151	155	VIDEO_UPDATE( suprslam )
152	156	{
153		bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
154		K053936_0_zoom_draw(bitmap,cliprect,suprslam_bg_tilemap,0,0,1);
155		draw_sprites(screen->machine, bitmap, cliprect);
156		tilemap_draw(bitmap,cliprect,suprslam_screen_tilemap,0,0);
	157	suprslam_state *state = (suprslam_state *)screen->machine->driver_data;
	158	tilemap_set_scrollx( state->screen_tilemap,0, state->screen_vregs[0x04/2] );
	159
	160	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
	161	k053936_zoom_draw(state->k053936, bitmap, cliprect, state->bg_tilemap, 0, 0, 1);
	162	if(!(state->spr_ctrl[0] & 8))
	163	draw_sprites(screen->machine, bitmap, cliprect);
	164	tilemap_draw(bitmap, cliprect, state->screen_tilemap, 0, 0);
	165	if(state->spr_ctrl[0] & 8)
	166	draw_sprites(screen->machine, bitmap, cliprect);
157	167	return 0;
158	168	}
159	169
160	170	WRITE16_HANDLER (suprslam_bank_w)
161	171	{
	172	suprslam_state *state = (suprslam_state *)space->machine->driver_data;
162	173	UINT16 old_screen_bank, old_bg_bank;
163		old_screen_bank = screen_bank;
164		old_bg_bank = bg_bank;
	174	old_screen_bank = state->screen_bank;
	175	old_bg_bank = state->bg_bank;
165	176
166		screen_bank = data & 0xf000;
167		bg_bank = (data & 0x0f00) << 4;
	177	state->screen_bank = data & 0xf000;
	178	state->bg_bank = (data & 0x0f00) << 4;
168	179
169		if (screen_bank != old_screen_bank) tilemap_mark_all_tiles_dirty (suprslam_screen_tilemap);
170		if (bg_bank != old_bg_bank) tilemap_mark_all_tiles_dirty (suprslam_bg_tilemap);
	180	if (state->screen_bank != old_screen_bank)
	181	tilemap_mark_all_tiles_dirty(state->screen_tilemap);
	182	if (state->bg_bank != old_bg_bank)
	183	tilemap_mark_all_tiles_dirty(state->bg_tilemap);
171	184	}

src/mame/video/calomega.c

r6740	r6741
15	15
16	16	#include "driver.h"
17	17
	18	UINT8 *calomega_videoram;
	19	UINT8 *calomega_colorram;
18	20	static tilemap *bg_tilemap;
19	21
20	22	WRITE8_HANDLER( calomega_videoram_w )
21	23	{
22		space->machine->generic.videoram.u8[offset] = data;
	24	calomega_videoram[offset] = data;
23	25	tilemap_mark_tile_dirty(bg_tilemap, offset);
24	26	}
25	27
26	28	WRITE8_HANDLER( calomega_colorram_w )
27	29	{
28		space->machine->generic.colorram.u8[offset] = data;
	30	calomega_colorram[offset] = data;
29	31	tilemap_mark_tile_dirty(bg_tilemap, offset);
30	32	}
31	33
r6740	r6741
37	39	---- --x-   tiles bank.
38	40	xx-- ---x   seems unused. */
39	41
40		int attr = machine->generic.colorram.u8[tile_index];
41		int code = machine->generic.videoram.u8[tile_index];
	42	int attr = calomega_colorram[tile_index];
	43	int code = calomega_videoram[tile_index];
42	44	int bank = (attr & 0x02) >> 1;   /* bit 1 switch the gfx banks */
43	45	int color = (attr & 0x3c);   /* bits 2-3-4-5 for color */
44	46

src/mame/video/atetris.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "atetris.h"
	8	#include "includes/atetris.h"
9	9
10	10
11	11	static tilemap *bg_tilemap;

src/mame/video/cosmic.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "cosmic.h"
	10	#include "includes/cosmic.h"
11	11
12	12
13	13	WRITE8_HANDLER( cosmic_color_register_w )

src/mame/video/shaolins.c

r6740	r6741
12	12	extern UINT8 shaolins_nmi_enable;
13	13
14	14	static int palettebank;
	15	UINT8 *shaolins_videoram;
	16	UINT8 *shaolins_colorram;
15	17	static tilemap *bg_tilemap;
16	18
17	19	/***************************************************************************
r6740	r6741
93	95
94	96	WRITE8_HANDLER( shaolins_videoram_w )
95	97	{
96		space->machine->generic.videoram.u8[offset] = data;
	98	shaolins_videoram[offset] = data;
97	99	tilemap_mark_tile_dirty(bg_tilemap, offset);
98	100	}
99	101
100	102	WRITE8_HANDLER( shaolins_colorram_w )
101	103	{
102		space->machine->generic.colorram.u8[offset] = data;
	104	shaolins_colorram[offset] = data;
103	105	tilemap_mark_tile_dirty(bg_tilemap, offset);
104	106	}
105	107
r6740	r6741
133	135
134	136	static TILE_GET_INFO( get_bg_tile_info )
135	137	{
136		int attr = machine->generic.colorram.u8[tile_index];
137		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0x40) << 2);
	138	int attr = shaolins_colorram[tile_index];
	139	int code = shaolins_videoram[tile_index] + ((attr & 0x40) << 2);
138	140	int color = (attr & 0x0f) + 16 * palettebank;
139	141	int flags = (attr & 0x20) ? TILE_FLIPY : 0;
140	142

src/mame/video/wiping.c

r6740	r6741
12	12
13	13
14	14	static int flipscreen;
	15	UINT8 *wiping_videoram;
	16	UINT8 *wiping_colorram;
15	17
16	18
17	19	/***************************************************************************
r6740	r6741
93	95	UINT8 *spriteram = screen->machine->generic.spriteram.u8;
94	96	int offs;
95	97
96		for (offs = screen->machine->generic.videoram_size - 1; offs > 0; offs--)
	98	for (offs = 0x3ff; offs > 0; offs--)
97	99	{
98	100	int mx,my,sx,sy;
99	101
r6740	r6741
123	125	}
124	126
125	127	drawgfx_opaque(bitmap,cliprect,screen->machine->gfx[0],
126		screen->machine->generic.videoram.u8[offs],
127		screen->machine->generic.colorram.u8[offs] & 0x3f,
	128	wiping_videoram[offs],
	129	wiping_colorram[offs] & 0x3f,
128	130	flipscreen,flipscreen,
129	131	sx*8,sy*8);
130	132	}
r6740	r6741
159	161	}
160	162
161	163	/* redraw high priority chars */
162		for (offs = screen->machine->generic.videoram_size - 1; offs > 0; offs--)
	164	for (offs = 0x3ff; offs > 0; offs--)
163	165	{
164		if (screen->machine->generic.colorram.u8[offs] & 0x80)
	166	if (wiping_colorram[offs] & 0x80)
165	167	{
166	168	int mx,my,sx,sy;
167	169
168		mx = offs % 32;
	170	mx = offs % 32;
169	171	my = offs / 32;
170	172
171	173	if (my < 2)
r6740	r6741
191	193	}
192	194
193	195	drawgfx_opaque(bitmap,cliprect,screen->machine->gfx[0],
194		screen->machine->generic.videoram.u8[offs],
195		screen->machine->generic.colorram.u8[offs] & 0x3f,
	196	wiping_videoram[offs],
	197	wiping_colorram[offs] & 0x3f,
196	198	flipscreen,flipscreen,
197	199	sx*8,sy*8);
198	200	}

src/mame/video/leland.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "leland.h"
	10	#include "includes/leland.h"
11	11
12	12
13	13	/* constants */

src/mame/video/popeye.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10
	11	UINT8 *popeye_videoram;
	12	UINT8 *popeye_colorram;
11	13	UINT8 *popeye_background_pos;
12	14	UINT8 *popeye_palettebank;
13	15	static UINT8 *popeye_bitmapram;
r6740	r6741
173	175
174	176	WRITE8_HANDLER( popeye_videoram_w )
175	177	{
176		space->machine->generic.videoram.u8[offset] = data;
	178	popeye_videoram[offset] = data;
177	179	tilemap_mark_tile_dirty(fg_tilemap, offset);
178	180	}
179	181
180	182	WRITE8_HANDLER( popeye_colorram_w )
181	183	{
182		space->machine->generic.colorram.u8[offset] = data;
	184	popeye_colorram[offset] = data;
183	185	tilemap_mark_tile_dirty(fg_tilemap, offset);
184	186	}
185	187
r6740	r6741
236	238
237	239	static TILE_GET_INFO( get_fg_tile_info )
238	240	{
239		int code = machine->generic.videoram.u8[tile_index];
240		int color = machine->generic.colorram.u8[tile_index] & 0x0f;
	241	int code = popeye_videoram[tile_index];
	242	int color = popeye_colorram[tile_index] & 0x0f;
241	243
242	244	SET_TILE_INFO(0, code, color, 0);
243	245	}

src/mame/video/taxidrvr.c

r6740	r6741
1	1	#include "driver.h"
2		#include "taxidrvr.h"
	2	#include "includes/taxidrvr.h"
3	3
4	4
5	5	UINT8 *taxidrvr_vram0,*taxidrvr_vram1,*taxidrvr_vram2,*taxidrvr_vram3;

src/mame/video/compgolf.c

r6740	r6741
6	6	****************************************************************************************/
7	7
8	8	#include "driver.h"
9		#include "compgolf.h"
	9	#include "includes/compgolf.h"
10	10
11	11
12	12	PALETTE_INIT( compgolf )

src/mame/video/lordgun.c

r6740	r6741
36	36	***************************************************************************/
37	37
38	38	#include "driver.h"
39		#include "lordgun.h"
	39	#include "includes/lordgun.h"
40	40
41	41	// Variables needed by driver:
42	42

src/mame/video/zerozone.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "zerozone.h"
	8	#include "includes/zerozone.h"
9	9
10	10	WRITE16_HANDLER( zerozone_tilemap_w )
11	11	{

src/mame/video/toaplan1.c

r6740	r6741
119	119
120	120
121	121	#include "driver.h"
122		#include "toaplan1.h"
	122	#include "includes/toaplan1.h"
123	123	#include "cpu/m68000/m68000.h"
124	124
125	125

src/mame/video/segag80r.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "segag80r.h"
	8	#include "includes/segag80r.h"
9	9	#include "machine/rescap.h"
10	10	#include "video/resnet.h"
11	11

src/mame/video/tmnt.c

r6740	r6741
1	1	#include "driver.h"
2		#include "machine/eeprom.h"
3		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
4	3	#include "includes/tmnt.h"
5	4
6	5
r6740	r6741
47	46
48	47	/* Missing in Action */
49	48
50		static void mia_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	49	void mia_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
51	50	{
52	51	*flags = (*color & 0x04) ? TILE_FLIPX : 0;
53	52	if (layer == 0)
r6740	r6741
62	61	}
63	62	}
64	63
65		static void cuebrick_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	64	void cuebrick_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
66	65	{
67		if ((K052109_get_RMRD_line() == CLEAR_LINE) && (layer == 0))
	66	const device_config *k052109 = devtag_get_device(machine, "k052109");
	67
	68	if ((k052109_get_rmrd_line(k052109) == CLEAR_LINE) && (layer == 0))
68	69	{
69	70	*code |= ((*color & 0x01) << 8);
70	71	*color = layer_colorbase[layer]  + ((*color & 0x80) >> 5) + ((*color & 0x10) >> 1);
r6740	r6741
76	77	}
77	78	}
78	79
79		static void tmnt_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	80	void tmnt_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
80	81	{
81	82	*code |= ((*color & 0x03) << 8) | ((*color & 0x10) << 6) | ((*color & 0x0c) << 9)
82	83	| (bank << 13);
83	84	*color = layer_colorbase[layer] + ((*color & 0xe0) >> 5);
84	85	}
85	86
86		static void ssbl_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	87	void ssbl_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
87	88	{
88	89	if (layer == 0)
89	90	{
r6740	r6741
102	103
103	104	static int blswhstl_rombank;
104	105
105		static void blswhstl_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	106	void blswhstl_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
106	107	{
107	108	/* (color & 0x02) is flip y handled internally by the 052109 */
108	109	*code |= ((*color & 0x01) << 8) | ((*color & 0x10) << 5) | ((*color & 0x0c) << 8)
r6740	r6741
118	119
119	120	***************************************************************************/
120	121
121		static void mia_sprite_callback(int *code,int *color,int *priority,int *shadow)
	122	void mia_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
122	123	{
123	124	*color = sprite_colorbase + (*color & 0x0f);
124	125	}
125	126
126		static void tmnt_sprite_callback(int *code,int *color,int *priority,int *shadow)
	127	void tmnt_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
127	128	{
128	129	*code |= (*color & 0x10) << 9;
129	130	*color = sprite_colorbase + (*color & 0x0f);
130	131	}
131	132
132		static void punkshot_sprite_callback(int *code,int *color,int *priority_mask,int *shadow)
	133	void punkshot_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow)
133	134	{
134	135	int pri = 0x20 | ((*color & 0x60) >> 2);
135	136	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
141	142	*color = sprite_colorbase + (*color & 0x0f);
142	143	}
143	144
144		static void thndrx2_sprite_callback(int *code,int *color,int *priority_mask,int *shadow)
	145	void thndrx2_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow)
145	146	{
146	147	int pri = 0x20 | ((*color & 0x60) >> 2);
147	148	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
159	160
160	161	***************************************************************************/
161	162
162		static void lgtnfght_sprite_callback(int *code,int *color,int *priority_mask)
	163	void lgtnfght_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
163	164	{
164	165	int pri = 0x20 | ((*color & 0x60) >> 2);
165	166	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
170	171	*color = sprite_colorbase + (*color & 0x1f);
171	172	}
172	173
173		static void blswhstl_sprite_callback(int *code,int *color,int *priority_mask)
	174	void blswhstl_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
174	175	{
175	176	#if 0
176	177	if (input_code_pressed(machine, KEYCODE_Q) && (*color & 0x20)) *color = rand();
r6740	r6741
186	187	*color = sprite_colorbase + (*color & 0x1f);
187	188	}
188	189
189		static void prmrsocr_sprite_callback(int *code,int *color,int *priority_mask)
	190	void prmrsocr_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
190	191	{
191	192	int pri = 0x20 | ((*color & 0x60) >> 2);
192	193	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
207	208
208	209	***************************************************************************/
209	210
210		VIDEO_START( mia )
	211	VIDEO_START( cuebrick )
211	212	{
212	213	layer_colorbase[0] = 0;
213	214	layer_colorbase[1] = 32;
214	215	layer_colorbase[2] = 40;
215	216	sprite_colorbase = 16;
216		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,mia_tile_callback);
217		K051960_vh_start(machine,"gfx2",REVERSE_PLANE_ORDER,mia_sprite_callback);
218	217	}
219	218
220		VIDEO_START( cuebrick )
	219	VIDEO_START( mia )
221	220	{
222	221	layer_colorbase[0] = 0;
223	222	layer_colorbase[1] = 32;
224	223	layer_colorbase[2] = 40;
225	224	sprite_colorbase = 16;
226		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,cuebrick_tile_callback);
227		K051960_vh_start(machine,"gfx2",REVERSE_PLANE_ORDER,mia_sprite_callback);
228	225	}
229	226
230	227	VIDEO_START( tmnt )
r6740	r6741
233	230	layer_colorbase[1] = 32;
234	231	layer_colorbase[2] = 40;
235	232	sprite_colorbase = 16;
236		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tmnt_tile_callback);
237		K051960_vh_start(machine,"gfx2",REVERSE_PLANE_ORDER,tmnt_sprite_callback);
238	233	}
239	234
240		VIDEO_START( punkshot )
241		{
242		K053251_vh_start(machine);
243		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tmnt_tile_callback);
244		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,punkshot_sprite_callback);
245		}
246
247	235	VIDEO_START( lgtnfght )   /* also tmnt2, ssriders */
248	236	{
249		K053251_vh_start(machine);
250		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tmnt_tile_callback);
251		K053245_vh_start(machine,0, "gfx2",NORMAL_PLANE_ORDER,lgtnfght_sprite_callback);
	237	const device_config *k053245 = devtag_get_device(machine, "k053245");
252	238
253		K05324x_set_z_rejection(0);
	239	k05324x_set_z_rejection(k053245, 0);
254	240
255	241	dim_c = dim_v = lastdim = lasten = 0;
256	242
r6740	r6741
260	246	state_save_register_global(machine, lasten);
261	247	}
262	248
263		VIDEO_START( sunsetbl )
264		{
265		K053251_vh_start(machine);
266		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,ssbl_tile_callback);
267		K053245_vh_start(machine,0, "gfx2",NORMAL_PLANE_ORDER,lgtnfght_sprite_callback);
268		}
269
270		VIDEO_START( blswhstl )
271		{
272		K053251_vh_start(machine);
273		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,blswhstl_tile_callback);
274		K053245_vh_start(machine,0, "gfx2",NORMAL_PLANE_ORDER,blswhstl_sprite_callback);
275		}
276
277	249	VIDEO_START( glfgreat )
278	250	{
279		K053251_vh_start(machine);
280		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tmnt_tile_callback);
281		K053245_vh_start(machine,0, "gfx2",NORMAL_PLANE_ORDER,lgtnfght_sprite_callback);
282
283	251	roz_tilemap = tilemap_create(machine, glfgreat_get_roz_tile_info,tilemap_scan_rows,16,16,512,512);
284	252
285	253	tilemap_set_transparent_pen(roz_tilemap,0);
286
287		K053936_wraparound_enable(0, 1);
288		K053936_set_offset(0, 85, 0);
289	254	}
290	255
291		VIDEO_START( thndrx2 )
292		{
293		K053251_vh_start(machine);
294		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tmnt_tile_callback);
295		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,thndrx2_sprite_callback);
296		}
297
298	256	VIDEO_START( prmrsocr )
299	257	{
300		K053251_vh_start(machine);
301		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tmnt_tile_callback);
302		K053245_vh_start(machine,0, "gfx2",NORMAL_PLANE_ORDER,prmrsocr_sprite_callback);
303
304	258	roz_tilemap = tilemap_create(machine, prmrsocr_get_roz_tile_info,tilemap_scan_rows,16,16,512,256);
305	259
306	260	tilemap_set_transparent_pen(roz_tilemap,0);
307
308		K053936_wraparound_enable(0, 0);
309		K053936_set_offset(0, 85, 1);
310	261	}
311	262
312	263
313
314	264	/***************************************************************************
315	265
316	266	Memory handlers
r6740	r6741
330	280
331	281	WRITE16_HANDLER( tmnt_0a0000_w )
332	282	{
	283	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	284
333	285	if (ACCESSING_BITS_0_7)
334	286	{
335	287	static int last;
r6740	r6741
348	300	interrupt_enable_w(space, 0, data & 0x20);
349	301
350	302	/* bit 7 = enable char ROM reading through the video RAM */
351		K052109_set_RMRD_line((data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
	303	k052109_set_rmrd_line(k052109, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
352	304
353	305	/* other bits unused */
354	306	}
r6740	r6741
356	308
357	309	WRITE16_HANDLER( punkshot_0a0020_w )
358	310	{
	311	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	312
359	313	if (ACCESSING_BITS_0_7)
360	314	{
361	315	static int last;
r6740	r6741
371	325	last = data & 0x04;
372	326
373	327	/* bit 3 = enable char ROM reading through the video RAM */
374		K052109_set_RMRD_line((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	328	k052109_set_rmrd_line(k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
375	329	}
376	330	}
377	331
378	332	WRITE16_HANDLER( lgtnfght_0a0018_w )
379	333	{
	334	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	335
380	336	if (ACCESSING_BITS_0_7)
381	337	{
382	338	static int last;
383	339
384
385	340	/* bit 0,1 = coin counter */
386	341	coin_counter_w(space->machine, 0, data & 0x01);
387	342	coin_counter_w(space->machine, 1, data & 0x02);
r6740	r6741
393	348	last = data & 0x04;
394	349
395	350	/* bit 3 = enable char ROM reading through the video RAM */
396		K052109_set_RMRD_line((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	351	k052109_set_rmrd_line(k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
397	352	}
398	353	}
399	354
400	355	WRITE16_HANDLER( blswhstl_700300_w )
401	356	{
	357	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	358
402	359	if (ACCESSING_BITS_0_7)
403	360	{
404	361	/* bit 0,1 = coin counter */
r6740	r6741
406	363	coin_counter_w(space->machine, 1,data & 0x02);
407	364
408	365	/* bit 3 = enable char ROM reading through the video RAM */
409		K052109_set_RMRD_line((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	366	k052109_set_rmrd_line(k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
410	367
411	368	/* bit 7 = select char ROM bank */
412	369	if (blswhstl_rombank != ((data & 0x80) >> 7))
r6740	r6741
436	393
437	394	WRITE16_HANDLER( glfgreat_122000_w )
438	395	{
	396	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	397
439	398	if (ACCESSING_BITS_0_7)
440	399	{
441	400	/* bit 0,1 = coin counter */
r6740	r6741
443	402	coin_counter_w(space->machine, 1,data & 0x02);
444	403
445	404	/* bit 4 = enable char ROM reading through the video RAM */
446		K052109_set_RMRD_line((data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
	405	k052109_set_rmrd_line(k052109, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
447	406
448	407	/* bit 5 = 53596 tile rom bank selection */
449	408	if (glfgreat_roz_rom_bank != (data & 0x20) >> 5)
r6740	r6741
467	426
468	427	WRITE16_HANDLER( ssriders_eeprom_w )
469	428	{
	429	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	430
470	431	if (ACCESSING_BITS_0_7)
471	432	{
472	433	/* bit 0 is data */
473	434	/* bit 1 is cs (active low) */
474	435	/* bit 2 is clock (active high) */
475		eeprom_write_bit(data & 0x01);
476		eeprom_set_cs_line((data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
477		eeprom_set_clock_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	436	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
478	437
479	438	/* bits 3-4 control palette dimming */
480	439	/* 4 = DIMPOL = when set, negate SHAD */
r6740	r6741
482	441	dim_c = data & 0x18;
483	442
484	443	/* bit 5 selects sprite ROM for testing in TMNT2 (bits 5-7, actually, according to the schematics) */
485		K053244_bankselect(0, ((data & 0x20) >> 5) << 2);
	444	k053244_bankselect(k053245, ((data & 0x20) >> 5) << 2);
486	445	}
487	446	}
488	447
489	448	WRITE16_HANDLER( ssriders_1c0300_w )
490	449	{
	450	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	451
491	452	if (ACCESSING_BITS_0_7)
492	453	{
493	454	/* bit 0,1 = coin counter */
r6740	r6741
495	456	coin_counter_w(space->machine, 1,data & 0x02);
496	457
497	458	/* bit 3 = enable char ROM reading through the video RAM */
498		K052109_set_RMRD_line((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	459	k052109_set_rmrd_line(k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
499	460
500	461	/* bits 4-6 control palette dimming (DIM0-DIM2) */
501	462	dim_v = (data & 0x70) >> 4;
r6740	r6741
504	465
505	466	WRITE16_HANDLER( prmrsocr_122000_w )
506	467	{
	468	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	469	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	470
507	471	if (ACCESSING_BITS_0_7)
508	472	{
509	473	/* bit 0,1 = coin counter */
r6740	r6741
511	475	coin_counter_w(space->machine, 1,data & 0x02);
512	476
513	477	/* bit 4 = enable char ROM reading through the video RAM */
514		K052109_set_RMRD_line((data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
	478	k052109_set_rmrd_line(k052109, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
515	479
516	480	/* bit 6 = sprite ROM bank */
517	481	prmrsocr_sprite_bank = (data & 0x40) >> 6;
518		K053244_bankselect(0, prmrsocr_sprite_bank << 2);
	482	k053244_bankselect(k053245, prmrsocr_sprite_bank << 2);
519	483
520	484	/* bit 7 = 53596 region selector for ROM test */
521	485	glfgreat_roz_char_bank = (data & 0x80) >> 7;
r6740	r6741
587	551
588	552	VIDEO_UPDATE( mia )
589	553	{
590		K052109_tilemap_update();
	554	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	555	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
591	556
592		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],TILEMAP_DRAW_OPAQUE,0);
593		if ((priorityflag & 1) == 1) K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
594		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,0);
595		if ((priorityflag & 1) == 0) K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
596		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,0);
	557	k052109_tilemap_update(k052109);
	558
	559	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, TILEMAP_DRAW_OPAQUE,0);
	560	if ((priorityflag & 1) == 1) k051960_sprites_draw(k051960,bitmap,cliprect,0,0);
	561	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 0);
	562	if ((priorityflag & 1) == 0) k051960_sprites_draw(k051960,bitmap,cliprect,0,0);
	563	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 0);
	564
597	565	return 0;
598	566	}
599	567
600	568	VIDEO_UPDATE( tmnt )
601	569	{
602		K052109_tilemap_update();
	570	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	571	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
603	572
604		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],TILEMAP_DRAW_OPAQUE,0);
605		if ((priorityflag & 1) == 1) K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
606		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,0);
607		if ((priorityflag & 1) == 0) K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
608		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,0);
	573	k052109_tilemap_update(k052109);
	574
	575	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, TILEMAP_DRAW_OPAQUE,0);
	576	if ((priorityflag & 1) == 1) k051960_sprites_draw(k051960,bitmap,cliprect,0,0);
	577	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 0);
	578	if ((priorityflag & 1) == 0) k051960_sprites_draw(k051960,bitmap,cliprect,0,0);
	579	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 0);
	580
609	581	return 0;
610	582	}
611	583
612	584
613	585	VIDEO_UPDATE( punkshot )
614	586	{
615		bg_colorbase       = K053251_get_palette_index(K053251_CI0);
616		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
617		layer_colorbase[0] = K053251_get_palette_index(K053251_CI2);
618		layer_colorbase[1] = K053251_get_palette_index(K053251_CI4);
619		layer_colorbase[2] = K053251_get_palette_index(K053251_CI3);
	587	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	588	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	589	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
620	590
621		K052109_tilemap_update();
	591	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI0);
	592	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	593	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	594	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI4);
	595	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI3);
622	596
	597	k052109_tilemap_update(k052109);
	598
623	599	sorted_layer[0] = 0;
624		layerpri[0] = K053251_get_priority(K053251_CI2);
	600	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
625	601	sorted_layer[1] = 1;
626		layerpri[1] = K053251_get_priority(K053251_CI4);
	602	layerpri[1] = k053251_get_priority(k053251, K053251_CI4);
627	603	sorted_layer[2] = 2;
628		layerpri[2] = K053251_get_priority(K053251_CI3);
	604	layerpri[2] = k053251_get_priority(k053251, K053251_CI3);
629	605
630	606	sortlayers(sorted_layer,layerpri);
631	607
632	608	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
633		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[0]],TILEMAP_DRAW_OPAQUE,1);
634		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[1]],0,2);
635		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[2]],0,4);
	609	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[0], TILEMAP_DRAW_OPAQUE, 1);
	610	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[1], 0, 2);
	611	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[2], 0, 4);
636	612
637		K051960_sprites_draw(screen->machine,bitmap,cliprect,-1,-1);
	613	k051960_sprites_draw(k051960, bitmap, cliprect, -1, -1);
638	614	return 0;
639	615	}
640	616
641	617
642	618	VIDEO_UPDATE( lgtnfght )
643	619	{
644		bg_colorbase       = K053251_get_palette_index(K053251_CI0);
645		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
646		layer_colorbase[0] = K053251_get_palette_index(K053251_CI2);
647		layer_colorbase[1] = K053251_get_palette_index(K053251_CI4);
648		layer_colorbase[2] = K053251_get_palette_index(K053251_CI3);
	620	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	621	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	622	const device_config *k053245 = devtag_get_device(screen->machine, "k053245");
649	623
650		K052109_tilemap_update();
	624	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI0);
	625	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	626	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	627	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI4);
	628	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI3);
651	629
	630	k052109_tilemap_update(k052109);
	631
652	632	sorted_layer[0] = 0;
653		layerpri[0] = K053251_get_priority(K053251_CI2);
	633	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
654	634	sorted_layer[1] = 1;
655		layerpri[1] = K053251_get_priority(K053251_CI4);
	635	layerpri[1] = k053251_get_priority(k053251, K053251_CI4);
656	636	sorted_layer[2] = 2;
657		layerpri[2] = K053251_get_priority(K053251_CI3);
	637	layerpri[2] = k053251_get_priority(k053251, K053251_CI3);
658	638
659	639	sortlayers(sorted_layer,layerpri);
660	640
661	641	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
662	642	bitmap_fill(bitmap,cliprect,16 * bg_colorbase);
663		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[0]],0,1);
664		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[1]],0,2);
665		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[2]],0,4);
	643	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[0], 0, 1);
	644	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[1], 0, 2);
	645	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[2], 0, 4);
666	646
667		K053245_sprites_draw(screen->machine, 0, bitmap,cliprect);
	647	k053245_sprites_draw(k053245, bitmap, cliprect);
668	648	return 0;
669	649	}
670	650
r6740	r6741
682	662
683	663	VIDEO_UPDATE( glfgreat )
684	664	{
685		K053251_set_tilemaps(NULL,NULL,K052109_tilemap[0],K052109_tilemap[1],K052109_tilemap[2]);
	665	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	666	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	667	const device_config *k053245 = devtag_get_device(screen->machine, "k053245");
	668	const device_config *k053936 = devtag_get_device(screen->machine, "k053936");
686	669
687		bg_colorbase       = K053251_get_palette_index(K053251_CI0);
688		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
689		layer_colorbase[0] = K053251_get_palette_index(K053251_CI2);
690		layer_colorbase[1] = K053251_get_palette_index(K053251_CI3) + 8;   /* weird... */
691		layer_colorbase[2] = K053251_get_palette_index(K053251_CI4);
	670	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI0);
	671	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	672	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	673	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI3) + 8;   /* weird... */
	674	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI4);
692	675
693		K052109_tilemap_update();
	676	k052109_tilemap_update(k052109);
694	677
695	678	sorted_layer[0] = 0;
696		layerpri[0] = K053251_get_priority(K053251_CI2);
	679	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
697	680	sorted_layer[1] = 1;
698		layerpri[1] = K053251_get_priority(K053251_CI3);
	681	layerpri[1] = k053251_get_priority(k053251, K053251_CI3);
699	682	sorted_layer[2] = 2;
700		layerpri[2] = K053251_get_priority(K053251_CI4);
	683	layerpri[2] = k053251_get_priority(k053251, K053251_CI4);
701	684
702	685	sortlayers(sorted_layer,layerpri);
703	686
r6740	r6741
705	688
706	689	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
707	690	bitmap_fill(bitmap,cliprect,16 * bg_colorbase);
708		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[0]],0,1);
	691	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[0], 0, 1);
	692
709	693	if (layerpri[0] >= 0x30 && layerpri[1] < 0x30)
710	694	{
711		K053936_0_zoom_draw(bitmap,cliprect,roz_tilemap,0,1,1);
	695	k053936_zoom_draw(k053936, bitmap, cliprect, roz_tilemap, 0, 1, 1);
712	696	glfgreat_pixel = *BITMAP_ADDR16(bitmap,0x80,0x105);
713	697	}
714		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[1]],0,2);
	698
	699	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[1], 0, 2);
	700
715	701	if (layerpri[1] >= 0x30 && layerpri[2] < 0x30)
716	702	{
717		K053936_0_zoom_draw(bitmap,cliprect,roz_tilemap,0,1,1);
	703	k053936_zoom_draw(k053936, bitmap, cliprect, roz_tilemap, 0, 1, 1);
718	704	glfgreat_pixel = *BITMAP_ADDR16(bitmap,0x80,0x105);
719	705	}
720		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[2]],0,4);
	706
	707	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[2], 0, 4);
	708
721	709	if (layerpri[2] >= 0x30)
722	710	{
723		K053936_0_zoom_draw(bitmap,cliprect,roz_tilemap,0,1,1);
	711	k053936_zoom_draw(k053936, bitmap, cliprect, roz_tilemap, 0, 1, 1);
724	712	glfgreat_pixel = *BITMAP_ADDR16(bitmap,0x80,0x105);
725	713	}
726	714
727		K053245_sprites_draw(screen->machine, 0, bitmap,cliprect);
	715	k053245_sprites_draw(k053245, bitmap, cliprect);
728	716	return 0;
729	717	}
730	718
731	719	VIDEO_UPDATE( tmnt2 )
732	720	{
	721	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
733	722	double brt;
734	723	int i, newdim, newen, cb, ce;
735	724
736	725	newdim = dim_v | ((~dim_c & 0x10) >> 1);
737		newen  = (K053251_get_priority(5) && K053251_get_priority(5) != 0x3e);
	726	newen  = (k053251_get_priority(k053251, 5) && k053251_get_priority(k053251, 5) != 0x3e);
738	727
739	728	if (newdim != lastdim || newen != lasten)
740	729	{
r6740	r6741
756	745	ce = cb + 128;
757	746
758	747	// dim all colors before it
759		for (i=0; i<cb; i++)
760		palette_set_pen_contrast(screen->machine,i,brt);
	748	for (i = 0; i < cb; i++)
	749	palette_set_pen_contrast(screen->machine, i, brt);
761	750
762	751	// reset all colors in range
763		for (i=cb; i<ce; i++)
764		palette_set_pen_contrast(screen->machine,i,1.0);
	752	for (i = cb; i < ce; i++)
	753	palette_set_pen_contrast(screen->machine, i, 1.0);
765	754
766	755	// dim all colors after it
767		for (i=ce; i<2048; i++)
768		palette_set_pen_contrast(screen->machine,i,brt);
	756	for (i = ce; i < 2048; i++)
	757	palette_set_pen_contrast(screen->machine, i, brt);
769	758
770	759	// toggle shadow/highlight
771	760	if (~dim_c & 0x10)
r6740	r6741
781	770
782	771	VIDEO_UPDATE( thndrx2 )
783	772	{
784		bg_colorbase       = K053251_get_palette_index(K053251_CI0);
785		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
786		layer_colorbase[0] = K053251_get_palette_index(K053251_CI2);
787		layer_colorbase[1] = K053251_get_palette_index(K053251_CI4);
788		layer_colorbase[2] = K053251_get_palette_index(K053251_CI3);
	773	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	774	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	775	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
789	776
790		K052109_tilemap_update();
	777	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI0);
	778	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	779	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	780	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI4);
	781	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI3);
791	782
	783	k052109_tilemap_update(k052109);
	784
792	785	sorted_layer[0] = 0;
793		layerpri[0] = K053251_get_priority(K053251_CI2);
	786	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
794	787	sorted_layer[1] = 1;
795		layerpri[1] = K053251_get_priority(K053251_CI4);
	788	layerpri[1] = k053251_get_priority(k053251, K053251_CI4);
796	789	sorted_layer[2] = 2;
797		layerpri[2] = K053251_get_priority(K053251_CI3);
	790	layerpri[2] = k053251_get_priority(k053251, K053251_CI3);
798	791
799	792	sortlayers(sorted_layer,layerpri);
800	793
801	794	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
802	795	bitmap_fill(bitmap,cliprect,16 * bg_colorbase);
803		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[0]],0,1);
804		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[1]],0,2);
805		tilemap_draw(bitmap,cliprect,K052109_tilemap[sorted_layer[2]],0,4);
	796	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[0], 0, 1);
	797	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[1], 0, 2);
	798	k052109_tilemap_draw(k052109, bitmap, cliprect, sorted_layer[2], 0, 4);
806	799
807		K051960_sprites_draw(screen->machine,bitmap,cliprect,-1,-1);
	800	k051960_sprites_draw(k051960, bitmap, cliprect, -1, -1);
808	801	return 0;
809	802	}
810	803
r6740	r6741
818	811
819	812	VIDEO_EOF( blswhstl )
820	813	{
821		K053245_clear_buffer(0);
	814	const device_config *k053245 = devtag_get_device(machine, "k053245");
	815	k053245_clear_buffer(k053245);
822	816	}

src/mame/video/jpmimpct.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/tms34010/tms34010.h"
9		#include "jpmimpct.h"
	9	#include "includes/jpmimpct.h"
10	10
11	11
12	12	UINT16 *tms_vram;

src/mame/video/dc.c

r6740	r6741
4	4	*/
5	5
6	6	#include "driver.h"
7		#include "dc.h"
	7	#include "includes/dc.h"
8	8	#include "cpu/sh4/sh4.h"
9	9	#include "render.h"
10	10	#include "rendutil.h"

src/mame/video/liberatr.c

r6740	r6741
14	14	***************************************************************************/
15	15
16	16	#include "driver.h"
17		#include "liberatr.h"
	17	#include "includes/liberatr.h"
18	18
19	19
20	20	#define NUM_PENS   (0x18)

src/mame/video/tehkanwc.c

r6740	r6741
13	13
14	14	#include "driver.h"
15	15
	16	UINT8 *tehkanwc_videoram;
	17	UINT8 *tehkanwc_colorram;
16	18	UINT8 *tehkanwc_videoram2;
17	19	static UINT8 scroll_x[2];
18	20	static UINT8 led0,led1;
r6740	r6741
21	23
22	24	WRITE8_HANDLER( tehkanwc_videoram_w )
23	25	{
24		space->machine->generic.videoram.u8[offset] = data;
	26	tehkanwc_videoram[offset] = data;
25	27	tilemap_mark_tile_dirty(fg_tilemap, offset);
26	28	}
27	29
28	30	WRITE8_HANDLER( tehkanwc_colorram_w )
29	31	{
30		space->machine->generic.colorram.u8[offset] = data;
	32	tehkanwc_colorram[offset] = data;
31	33	tilemap_mark_tile_dirty(fg_tilemap, offset);
32	34	}
33	35
r6740	r6741
79	81
80	82	static TILE_GET_INFO( get_fg_tile_info )
81	83	{
82		int attr = machine->generic.colorram.u8[tile_index];
83		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0x10) << 4);
	84	int attr = tehkanwc_colorram[tile_index];
	85	int code = tehkanwc_videoram[tile_index] + ((attr & 0x10) << 4);
84	86	int color = attr & 0x0f;
85	87	int flags = ((attr & 0x40) ? TILE_FLIPX : 0) | ((attr & 0x80) ? TILE_FLIPY : 0);
86	88

src/mame/video/bionicc.c

r6740	r6741
24	24	***************************************************************************/
25	25
26	26	#include "driver.h"
27		#include "bionicc.h"
	27	#include "includes/bionicc.h"
28	28
29	29
30	30	/***************************************************************************

src/mame/video/citycon.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "citycon.h"
	10	#include "includes/citycon.h"
11	11
12	12
13	13	/***************************************************************************

src/mame/video/suprridr.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "suprridr.h"
	8	#include "includes/suprridr.h"
9	9
10	10
11	11	UINT8 *suprridr_bgram;

src/mame/video/spy.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	int spy_video_enable;
r6740	r6741
13	13
14	14	***************************************************************************/
15	15
16		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	16	void spy_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
17	17	{
18	18	*flags = (*color & 0x20) ? TILE_FLIPX : 0;
19	19	*code |= ((*color & 0x03) << 8) | ((*color & 0x10) << 6) | ((*color & 0x0c) << 9)
r6740	r6741
28	28
29	29	***************************************************************************/
30	30
31		static void sprite_callback(int *code,int *color,int *priority_mask,int *shadow)
	31	void spy_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow)
32	32	{
33	33	/* bit 4 = priority over layer A (0 = have priority) */
34	34	/* bit 5 = priority over layer B (1 = have priority) */
r6740	r6741
52	52	layer_colorbase[1] = 0;
53	53	layer_colorbase[2] = 16;
54	54	sprite_colorbase = 32;
55		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
56		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
57	55	}
58	56
59	57
r6740	r6741
66	64
67	65	VIDEO_UPDATE( spy )
68	66	{
69		K052109_tilemap_update();
	67	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	68	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
70	69
	70	k052109_tilemap_update(k052109);
	71
71	72	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
72	73
73	74	if (!spy_video_enable)
74	75	bitmap_fill(bitmap,cliprect,16 * layer_colorbase[0]);
75	76	else
76	77	{
77		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],TILEMAP_DRAW_OPAQUE,1);
78		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,2);
79		K051960_sprites_draw(screen->machine,bitmap,cliprect,-1,-1);
80		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,0);
	78	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE, 1);
	79	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 2);
	80	k051960_sprites_draw(k051960, bitmap, cliprect, -1, -1);
	81	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 0);
81	82	}
82	83
83	84	return 0;

src/mame/video/psikyo.c

r6740	r6741
55	55	**************************************************************************/
56	56
57	57	#include "driver.h"
	58	#include "includes/psikyo.h"
58	59
59		/* Variables that driver has access to: */
60	60
61		UINT32 *psikyo_vram_0, *psikyo_vram_1, *psikyo_vregs;
62		int psikyo_ka302c_banking;
63		UINT32* psikyo_bootleg_spritebuffer;
64
65		/* Variables only used here: */
66
67		static tilemap    *tilemap_0_size0, *tilemap_0_size1, *tilemap_0_size2, *tilemap_0_size3,
68		*tilemap_1_size0, *tilemap_1_size1, *tilemap_1_size2, *tilemap_1_size3;
69		static UINT8 tilemap_0_bank, tilemap_1_bank;
70		static UINT32 *spritebuf1, *spritebuf2;
71
72	61	/***************************************************************************
73	62
74	63	Callbacks for the TileMap code
r6740	r6741
84	73
85	74	static TILE_GET_INFO( get_tile_info_0 )
86	75	{
87		UINT16 code = ((UINT16 *)psikyo_vram_0)[BYTE_XOR_BE(tile_index)];
	76	psikyo_state *state = (psikyo_state *)machine->driver_data;
	77	UINT16 code = ((UINT16 *)state->vram_0)[BYTE_XOR_BE(tile_index)];
88	78	SET_TILE_INFO(
89	79	1,
90		(code & 0x1fff) + 0x2000*tilemap_0_bank,
	80	(code & 0x1fff) + 0x2000 * state->tilemap_0_bank,
91	81	(code >> 13) & 7,
92	82	0);
93	83	}
94	84
95	85	static TILE_GET_INFO( get_tile_info_1 )
96	86	{
97		UINT16 code = ((UINT16 *)psikyo_vram_1)[BYTE_XOR_BE(tile_index)];
	87	psikyo_state *state = (psikyo_state *)machine->driver_data;
	88	UINT16 code = ((UINT16 *)state->vram_1)[BYTE_XOR_BE(tile_index)];
98	89	SET_TILE_INFO(
99	90	1,
100		(code & 0x1fff) + 0x2000*tilemap_1_bank,
	91	(code & 0x1fff) + 0x2000 * state->tilemap_1_bank,
101	92	((code >> 13) & 7) + 0x40, // So we only have to decode the gfx once.
102	93	0);
103	94	}
r6740	r6741
105	96
106	97	WRITE32_HANDLER( psikyo_vram_0_w )
107	98	{
108		COMBINE_DATA(&psikyo_vram_0[offset]);
	99	psikyo_state *state = (psikyo_state *)space->machine->driver_data;
	100
	101	COMBINE_DATA(&state->vram_0[offset]);
109	102	if (ACCESSING_BITS_16_31)
110	103	{
111		tilemap_mark_tile_dirty(tilemap_0_size0, offset*2);
112		tilemap_mark_tile_dirty(tilemap_0_size1, offset*2);
113		tilemap_mark_tile_dirty(tilemap_0_size2, offset*2);
114		tilemap_mark_tile_dirty(tilemap_0_size3, offset*2);
	104	tilemap_mark_tile_dirty(state->tilemap_0_size0, offset * 2);
	105	tilemap_mark_tile_dirty(state->tilemap_0_size1, offset * 2);
	106	tilemap_mark_tile_dirty(state->tilemap_0_size2, offset * 2);
	107	tilemap_mark_tile_dirty(state->tilemap_0_size3, offset * 2);
115	108	}
116	109
117	110	if (ACCESSING_BITS_0_15)
118	111	{
119		tilemap_mark_tile_dirty(tilemap_0_size0, offset*2+1);
120		tilemap_mark_tile_dirty(tilemap_0_size1, offset*2+1);
121		tilemap_mark_tile_dirty(tilemap_0_size2, offset*2+1);
122		tilemap_mark_tile_dirty(tilemap_0_size3, offset*2+1);
	112	tilemap_mark_tile_dirty(state->tilemap_0_size0, offset * 2 + 1);
	113	tilemap_mark_tile_dirty(state->tilemap_0_size1, offset * 2 + 1);
	114	tilemap_mark_tile_dirty(state->tilemap_0_size2, offset * 2 + 1);
	115	tilemap_mark_tile_dirty(state->tilemap_0_size3, offset * 2 + 1);
123	116	}
124	117	}
125	118
126	119	WRITE32_HANDLER( psikyo_vram_1_w )
127	120	{
128		COMBINE_DATA(&psikyo_vram_1[offset]);
	121	psikyo_state *state = (psikyo_state *)space->machine->driver_data;
	122
	123	COMBINE_DATA(&state->vram_1[offset]);
129	124	if (ACCESSING_BITS_16_31)
130	125	{
131		tilemap_mark_tile_dirty(tilemap_1_size0, offset*2);
132		tilemap_mark_tile_dirty(tilemap_1_size1, offset*2);
133		tilemap_mark_tile_dirty(tilemap_1_size2, offset*2);
134		tilemap_mark_tile_dirty(tilemap_1_size3, offset*2);
	126	tilemap_mark_tile_dirty(state->tilemap_1_size0, offset * 2);
	127	tilemap_mark_tile_dirty(state->tilemap_1_size1, offset * 2);
	128	tilemap_mark_tile_dirty(state->tilemap_1_size2, offset * 2);
	129	tilemap_mark_tile_dirty(state->tilemap_1_size3, offset * 2);
135	130	}
136	131
137	132	if (ACCESSING_BITS_0_15)
138	133	{
139		tilemap_mark_tile_dirty(tilemap_1_size0, offset*2+1);
140		tilemap_mark_tile_dirty(tilemap_1_size1, offset*2+1);
141		tilemap_mark_tile_dirty(tilemap_1_size2, offset*2+1);
142		tilemap_mark_tile_dirty(tilemap_1_size3, offset*2+1);
	134	tilemap_mark_tile_dirty(state->tilemap_1_size0, offset * 2 + 1);
	135	tilemap_mark_tile_dirty(state->tilemap_1_size1, offset * 2 + 1);
	136	tilemap_mark_tile_dirty(state->tilemap_1_size2, offset * 2 + 1);
	137	tilemap_mark_tile_dirty(state->tilemap_1_size3, offset * 2 + 1);
143	138	}
144	139	}
145	140
146		void psikyo_switch_banks( int tmap, int bank )
	141	void psikyo_switch_banks( running_machine *machine, int tmap, int bank )
147	142	{
148		if((tmap==0) && (bank != tilemap_0_bank))
	143	psikyo_state *state = (psikyo_state *)machine->driver_data;
	144
	145	if ((tmap == 0) && (bank != state->tilemap_0_bank))
149	146	{
150		tilemap_0_bank = bank;
151		tilemap_mark_all_tiles_dirty(tilemap_0_size0);
152		tilemap_mark_all_tiles_dirty(tilemap_0_size1);
153		tilemap_mark_all_tiles_dirty(tilemap_0_size2);
154		tilemap_mark_all_tiles_dirty(tilemap_0_size3);
	147	state->tilemap_0_bank = bank;
	148	tilemap_mark_all_tiles_dirty(state->tilemap_0_size0);
	149	tilemap_mark_all_tiles_dirty(state->tilemap_0_size1);
	150	tilemap_mark_all_tiles_dirty(state->tilemap_0_size2);
	151	tilemap_mark_all_tiles_dirty(state->tilemap_0_size3);
155	152	}
156		else if((tmap==1) && (bank != tilemap_1_bank))
	153	else if ((tmap == 1) && (bank != state->tilemap_1_bank))
157	154	{
158		tilemap_1_bank = bank;
159		tilemap_mark_all_tiles_dirty(tilemap_1_size0);
160		tilemap_mark_all_tiles_dirty(tilemap_1_size1);
161		tilemap_mark_all_tiles_dirty(tilemap_1_size2);
162		tilemap_mark_all_tiles_dirty(tilemap_1_size3);
	155	state->tilemap_1_bank = bank;
	156	tilemap_mark_all_tiles_dirty(state->tilemap_1_size0);
	157	tilemap_mark_all_tiles_dirty(state->tilemap_1_size1);
	158	tilemap_mark_all_tiles_dirty(state->tilemap_1_size2);
	159	tilemap_mark_all_tiles_dirty(state->tilemap_1_size3);
163	160	}
164	161	}
165	162
166	163
167	164	VIDEO_START( psikyo )
168	165	{
	166	psikyo_state *state = (psikyo_state *)machine->driver_data;
	167
169	168	/* The Hardware is Capable of Changing the Dimensions of the Tilemaps, its safer to create
170	169	the various sized tilemaps now as opposed to later */
171	170
172		tilemap_0_size0   =   tilemap_create(   machine, get_tile_info_0,
173		tilemap_scan_rows,
	171	state->tilemap_0_size0 = tilemap_create(machine, get_tile_info_0, tilemap_scan_rows, 16, 16, 0x20, 0x80);
	172	state->tilemap_0_size1 = tilemap_create(machine, get_tile_info_0, tilemap_scan_rows, 16, 16, 0x40, 0x40);
	173	state->tilemap_0_size2 = tilemap_create(machine, get_tile_info_0, tilemap_scan_rows, 16, 16, 0x80, 0x20);
	174	state->tilemap_0_size3 = tilemap_create(machine, get_tile_info_0, tilemap_scan_rows, 16, 16, 0x100, 0x10);
174	175
175		16,16,
176		0x20, 0x80 );
177		tilemap_0_size1   =   tilemap_create(   machine, get_tile_info_0,
178		tilemap_scan_rows,
	176	state->tilemap_1_size0 = tilemap_create(machine, get_tile_info_1, tilemap_scan_rows, 16, 16, 0x20, 0x80);
	177	state->tilemap_1_size1 = tilemap_create(machine, get_tile_info_1, tilemap_scan_rows, 16, 16, 0x40, 0x40);
	178	state->tilemap_1_size2 = tilemap_create(machine, get_tile_info_1, tilemap_scan_rows, 16, 16, 0x80, 0x20);
	179	state->tilemap_1_size3 = tilemap_create(machine, get_tile_info_1, tilemap_scan_rows, 16, 16, 0x100, 0x10);
179	180
180		16,16,
181		0x40, 0x40 );
	181	state->spritebuf1 = auto_alloc_array(machine, UINT32, 0x2000 / 4);
	182	state->spritebuf2 = auto_alloc_array(machine, UINT32, 0x2000 / 4);
182	183
183		tilemap_0_size2   =   tilemap_create(   machine, get_tile_info_0,
184		tilemap_scan_rows,
	184	tilemap_set_scroll_rows(state->tilemap_0_size0, 0x80 * 16);   // line scrolling
	185	tilemap_set_scroll_cols(state->tilemap_0_size0, 1);
185	186
186		16,16,
187		0x80, 0x20 );
	187	tilemap_set_scroll_rows(state->tilemap_0_size1, 0x40 * 16);   // line scrolling
	188	tilemap_set_scroll_cols(state->tilemap_0_size1, 1);
188	189
189		tilemap_0_size3   =   tilemap_create(   machine, get_tile_info_0,
190		tilemap_scan_rows,
	190	tilemap_set_scroll_rows(state->tilemap_0_size2, 0x20 * 16);   // line scrolling
	191	tilemap_set_scroll_cols(state->tilemap_0_size2, 1);
191	192
192		16,16,
193		0x100, 0x10 );
	193	tilemap_set_scroll_rows(state->tilemap_0_size3, 0x10 * 16);   // line scrolling
	194	tilemap_set_scroll_cols(state->tilemap_0_size3, 1);
194	195
195		tilemap_1_size0   =   tilemap_create(   machine, get_tile_info_1,
196		tilemap_scan_rows,
	196	tilemap_set_scroll_rows(state->tilemap_1_size0, 0x80 * 16);   // line scrolling
	197	tilemap_set_scroll_cols(state->tilemap_1_size0, 1);
197	198
198		16,16,
199		0x20, 0x80 );
	199	tilemap_set_scroll_rows(state->tilemap_1_size1, 0x40 * 16);   // line scrolling
	200	tilemap_set_scroll_cols(state->tilemap_1_size1, 1);
200	201
201		tilemap_1_size1   =   tilemap_create(   machine, get_tile_info_1,
202		tilemap_scan_rows,
	202	tilemap_set_scroll_rows(state->tilemap_1_size2, 0x20 * 16);   // line scrolling
	203	tilemap_set_scroll_cols(state->tilemap_1_size2, 1);
203	204
204		16,16,
205		0x40, 0x40 );
	205	tilemap_set_scroll_rows(state->tilemap_1_size3, 0x10 * 16);   // line scrolling
	206	tilemap_set_scroll_cols(state->tilemap_1_size3, 1);
206	207
207		tilemap_1_size2   =   tilemap_create(   machine, get_tile_info_1,
208		tilemap_scan_rows,
209
210		16,16,
211		0x80, 0x20 );
212
213		tilemap_1_size3   =   tilemap_create(   machine, get_tile_info_1,
214		tilemap_scan_rows,
215
216		16,16,
217		0x100, 0x10 );
218
219		spritebuf1 = auto_alloc_array(machine, UINT32, 0x2000/4);
220		spritebuf2 = auto_alloc_array(machine, UINT32, 0x2000/4);
221
222		tilemap_set_scroll_rows(tilemap_0_size0,0x80*16);   // line scrolling
223		tilemap_set_scroll_cols(tilemap_0_size0,1);
224
225		tilemap_set_scroll_rows(tilemap_0_size1,0x40*16);   // line scrolling
226		tilemap_set_scroll_cols(tilemap_0_size1,1);
227
228		tilemap_set_scroll_rows(tilemap_0_size2,0x20*16);   // line scrolling
229		tilemap_set_scroll_cols(tilemap_0_size2,1);
230
231		tilemap_set_scroll_rows(tilemap_0_size3,0x10*16);   // line scrolling
232		tilemap_set_scroll_cols(tilemap_0_size3,1);
233
234		tilemap_set_scroll_rows(tilemap_1_size0,0x80*16);   // line scrolling
235		tilemap_set_scroll_cols(tilemap_1_size0,1);
236
237		tilemap_set_scroll_rows(tilemap_1_size1,0x40*16);   // line scrolling
238		tilemap_set_scroll_cols(tilemap_1_size1,1);
239
240		tilemap_set_scroll_rows(tilemap_1_size2,0x20*16);   // line scrolling
241		tilemap_set_scroll_cols(tilemap_1_size2,1);
242
243		tilemap_set_scroll_rows(tilemap_1_size3,0x10*16);   // line scrolling
244		tilemap_set_scroll_cols(tilemap_1_size3,1);
	208	state_save_register_global_pointer(machine, state->spritebuf1, 0x2000 / 4);
	209	state_save_register_global_pointer(machine, state->spritebuf2, 0x2000 / 4);
245	210	}
246	211
247	212	VIDEO_START( sngkace )
248	213	{
249	214	VIDEO_START_CALL( psikyo );
250	215
251		psikyo_switch_banks(0, 0); // sngkace / samuraia don't use banking
252		psikyo_switch_banks(1, 1); // They share "gfx2" to save memory on other boards
	216	psikyo_switch_banks(machine, 0, 0); // sngkace / samuraia don't use banking
	217	psikyo_switch_banks(machine, 1, 1); // They share "gfx2" to save memory on other boards
253	218	}
254	219
255	220
r6740	r6741
298	263
299	264	***************************************************************************/
300	265
301		static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int trans_pen)
	266	static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int trans_pen )
302	267	{
	268	psikyo_state *state = (psikyo_state *)machine->driver_data;
	269
303	270	/* tile layers 0 & 1 have priorities 1 & 2 */
304	271	static const int pri[] = { 0, 0xfc, 0xff, 0xff };
305
306	272	int offs;
	273	UINT16 *spritelist = (UINT16 *)(state->spritebuf2 + 0x1800 / 4);
	274	UINT8 *TILES = memory_region(machine, "spritelut");   // Sprites LUT
	275	int TILES_LEN = memory_region_length(machine, "spritelut");
307	276
308		UINT16 *spritelist   =   (UINT16 *)(spritebuf2 + 0x1800/4);
309
310		UINT8 *TILES   =   memory_region(machine, "spritelut");   // Sprites LUT
311		int TILES_LEN         =   memory_region_length(machine, "spritelut");
312
313	277	int width = video_screen_get_width(machine->primary_screen);
314	278	int height = video_screen_get_height(machine->primary_screen);
315	279
316	280	/* Exit if sprites are disabled */
317		if ( spritelist[ BYTE_XOR_BE((0x800-2)/2) ] & 1 )   return;
	281	if (spritelist[BYTE_XOR_BE((0x800 - 2) / 2)] & 1)   return;
318	282
319	283	/* Look for "end of sprites" marker in the sprites list */
320		for ( offs = 0/2 ; offs < (0x800-2)/2 ; offs += 2/2 )   // skip last "sprite"
	284	for (offs = 0/2 ; offs < (0x800 - 2)/2 ; offs += 2/2)   // skip last "sprite"
321	285	{
322		UINT16 sprite = spritelist[ BYTE_XOR_BE(offs) ];
323		if (sprite == 0xffff)   break;
	286	UINT16 sprite = spritelist[BYTE_XOR_BE(offs)];
	287	if (sprite == 0xffff)
	288	break;
324	289	}
325	290
326	291	offs -= 2/2;
327	292
328	293	//  fprintf(stderr, "\n");
329		for ( ; offs >= 0/2 ; offs -= 2/2 )
	294	for ( ; offs >= 0/2 ; offs -= 2/2)
330	295	{
331	296	UINT32 *source;
332		int   sprite;
	297	int sprite;
333	298
334		int   x,y, attr,code, flipx,flipy, nx,ny, zoomx,zoomy;
335		int dx,dy, xstart,ystart, xend,yend, xinc,yinc;
	299	int x, y, attr, code, flipx, flipy, nx, ny, zoomx, zoomy;
	300	int dx, dy, xstart, ystart, xend, yend, xinc, yinc;
336	301
337	302	/* Get next entry in the list */
338		sprite   =   spritelist[ BYTE_XOR_BE(offs) ];
	303	sprite = spritelist[BYTE_XOR_BE(offs)];
339	304
340		sprite   %=   0x300;
341		source   =   &spritebuf2[ sprite*8/4 ];
	305	sprite %= 0x300;
	306	source = &state->spritebuf2[sprite * 8 / 4];
342	307
343	308	/* Draw this sprite */
344	309
345		y      =   source[ 0/4 ] >> 16;
346		x      =   source[ 0/4 ] & 0xffff;
347		attr   =   source[ 4/4 ] >> 16;
348		code   =   source[ 4/4 ] & 0x1ffff;
	310	y   =   source[0 / 4] >> 16;
	311	x   =   source[0 / 4] & 0xffff;
	312	attr   =   source[4 / 4] >> 16;
	313	code   =   source[4 / 4] & 0x1ffff;
349	314
350	315	flipx   =   attr & 0x4000;
351	316	flipy   =   attr & 0x8000;
352	317
353	318	zoomx   =   ((x & 0xf000) >> 12);
354	319	zoomy   =   ((y & 0xf000) >> 12);
355		nx      =   ((x & 0x0e00) >> 9) + 1;
356		ny      =   ((y & 0x0e00) >> 9) + 1;
357		x      =   ((x & 0x01ff));
358		y      =   ((y & 0x00ff)) - (y & 0x100);
	320	nx   =   ((x & 0x0e00) >> 9) + 1;
	321	ny   =   ((y & 0x0e00) >> 9) + 1;
	322	x   =   ((x & 0x01ff));
	323	y   =   ((y & 0x00ff)) - (y & 0x100);
359	324
360	325	/* 180-1ff are negative coordinates. Note that $80 pixels is
361	326	the maximum extent of a sprite, which can therefore be moved
362	327	out of screen without problems */
363		if (x >= 0x180)   x -= 0x200;
	328	if (x >= 0x180)
	329	x -= 0x200;
364	330
365		x += (nx*zoomx+2)/4;
366		y += (ny*zoomy+2)/4;
	331	x += (nx * zoomx + 2) / 4;
	332	y += (ny * zoomy + 2) / 4;
367	333
368	334	zoomx = 32 - zoomx;
369	335	zoomy = 32 - zoomy;
370	336
371
372	337	if (flip_screen_get(machine))
373	338	{
374		x = width  - x - (nx * zoomx)/2;
375		y = height - y - (ny * zoomy)/2;
	339	x = width  - x - (nx * zoomx) / 2;
	340	y = height - y - (ny * zoomy) / 2;
376	341	flipx = !flipx;
377	342	flipy = !flipy;
378	343	}
379	344
380		if (flipx)   { xstart = nx-1;  xend = -1;  xinc = -1; }
381		else      { xstart = 0;     xend = nx;  xinc = +1; }
	345	if (flipx)   { xstart = nx - 1;  xend = -1;  xinc = -1; }
	346	else      { xstart = 0;       xend = nx;  xinc = +1; }
382	347
383		if (flipy)   { ystart = ny-1;  yend = -1;   yinc = -1; }
384		else      { ystart = 0;     yend = ny;   yinc = +1; }
	348	if (flipy)   { ystart = ny - 1;  yend = -1;   yinc = -1; }
	349	else      { ystart = 0;       yend = ny;   yinc = +1; }
385	350
386	351	for (dy = ystart; dy != yend; dy += yinc)
387	352	{
388	353	for (dx = xstart; dx != xend; dx += xinc)
389	354	{
390		int addr   =   (code*2) & (TILES_LEN-1);
	355	int addr = (code * 2) & (TILES_LEN - 1);
391	356
392	357	if (zoomx == 32 && zoomy == 32)
393	358	pdrawgfx_transpen(bitmap,cliprect,machine->gfx[0],
r6740	r6741
417	382	// until I work out why it makes a partial copy of the sprite list, and how best to apply it
418	383	// sprite placement of the explosion graphic seems incorrect compared to the original sets? (no / different zoom support?)
419	384	// it might be a problem with the actual bootleg
420		static void draw_sprites_bootleg(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int trans_pen)
	385	static void draw_sprites_bootleg( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int trans_pen )
421	386	{
	387	psikyo_state *state = (psikyo_state *)machine->driver_data;
	388
422	389	/* tile layers 0 & 1 have priorities 1 & 2 */
423	390	static const int pri[] = { 0, 0xfc, 0xff, 0xff };
424
425	391	int offs;
426	392
427	393	//  UINT16 *spritelist  =   (UINT16 *)(machine->generic.spriteram.u32 + 0x1800/4);
428		UINT16 *spritelist   =   (UINT16 *)(spritebuf2 + 0x1800/4);
	394	UINT16 *spritelist = (UINT16 *)(state->spritebuf2 + 0x1800 / 4);
429	395
430		UINT8 *TILES   =   memory_region(machine, "spritelut");   // Sprites LUT
431		int TILES_LEN         =   memory_region_length(machine, "spritelut");
	396	UINT8 *TILES = memory_region(machine, "spritelut");   // Sprites LUT
	397	int TILES_LEN = memory_region_length(machine, "spritelut");
432	398
433	399	int width = video_screen_get_width(machine->primary_screen);
434	400	int height = video_screen_get_height(machine->primary_screen);
435	401
436	402	/* Exit if sprites are disabled */
437		if ( spritelist[ BYTE_XOR_BE((0x800-2)/2) ] & 1 )   return;
	403	if (spritelist[BYTE_XOR_BE((0x800 - 2) / 2)] & 1)
	404	return;
438	405
439	406	/* Look for "end of sprites" marker in the sprites list */
440		for ( offs = 0/2 ; offs < (0x800-2)/2 ; offs += 2/2 )   // skip last "sprite"
	407	for (offs = 0/2 ; offs < (0x800 - 2)/2 ; offs += 2/2)   // skip last "sprite"
441	408	{
442		UINT16 sprite = spritelist[ BYTE_XOR_BE(offs) ];
443		if (sprite == 0xffff)   break;
	409	UINT16 sprite = spritelist[BYTE_XOR_BE(offs)];
	410	if (sprite == 0xffff)
	411	break;
444	412	}
445	413
446	414	offs -= 2/2;
447	415
448	416	//  fprintf(stderr, "\n");
449		for ( ; offs >= 0/2 ; offs -= 2/2 )
	417	for ( ; offs >= 0/2 ; offs -= 2/2)
450	418	{
451	419	UINT32 *source;
452		int   sprite;
	420	int sprite;
453	421
454		int   x,y, attr,code, flipx,flipy, nx,ny, zoomx,zoomy;
455		int dx,dy, xstart,ystart, xend,yend, xinc,yinc;
	422	int x, y, attr, code, flipx, flipy, nx, ny, zoomx, zoomy;
	423	int dx, dy, xstart, ystart, xend, yend, xinc, yinc;
456	424
457	425	/* Get next entry in the list */
458		sprite   =   spritelist[ BYTE_XOR_BE(offs) ];
	426	sprite = spritelist[BYTE_XOR_BE(offs)];
459	427
460		sprite   %=   0x300;
461		//      source  =   &psikyo_bootleg_spritebuffer[ sprite*8/4 ];
462		source   =   &spritebuf2[ sprite*8/4 ];
	428	sprite %= 0x300;
	429	//      source = &state->bootleg_spritebuffer[sprite * 8 / 4];
	430	source = &state->spritebuf2[sprite * 8 / 4];
463	431
464	432	/* Draw this sprite */
465	433
466		y      =   source[ 0 ] >> 16;
467		x      =   source[ 0 ] & 0xffff;
468		attr   =   source[ 1 ] >> 16;
469		code   =   source[ 1 ] & 0x1ffff;
	434	y   =   source[0] >> 16;
	435	x   =   source[0] & 0xffff;
	436	attr   =   source[1] >> 16;
	437	code   =   source[1] & 0x1ffff;
470	438
471	439	flipx   =   attr & 0x4000;
472	440	flipy   =   attr & 0x8000;
473	441
474	442	zoomx   =   ((x & 0xf000) >> 12);
475	443	zoomy   =   ((y & 0xf000) >> 12);
476		nx      =   ((x & 0x0e00) >> 9) + 1;
477		ny      =   ((y & 0x0e00) >> 9) + 1;
478		x      =   ((x & 0x01ff));
479		y      =   ((y & 0x00ff)) - (y & 0x100);
	444	nx   =   ((x & 0x0e00) >> 9) + 1;
	445	ny   =   ((y & 0x0e00) >> 9) + 1;
	446	x   =   ((x & 0x01ff));
	447	y   =   ((y & 0x00ff)) - (y & 0x100);
480	448
481	449	/* 180-1ff are negative coordinates. Note that $80 pixels is
482	450	the maximum extent of a sprite, which can therefore be moved
483	451	out of screen without problems */
484		if (x >= 0x180)   x -= 0x200;
	452	if (x >= 0x180)
	453	x -= 0x200;
485	454
486		x += (nx*zoomx+2)/4;
487		y += (ny*zoomy+2)/4;
	455	x += (nx * zoomx + 2) / 4;
	456	y += (ny * zoomy + 2) / 4;
488	457
489	458	zoomx = 32 - zoomx;
490	459	zoomy = 32 - zoomy;
r6740	r6741
492	461
493	462	if (flip_screen_get(machine))
494	463	{
495		x = width  - x - (nx * zoomx)/2;
496		y = height - y - (ny * zoomy)/2;
	464	x = width  - x - (nx * zoomx) / 2;
	465	y = height - y - (ny * zoomy) / 2;
497	466	flipx = !flipx;
498	467	flipy = !flipy;
499	468	}
500	469
501		if (flipx)   { xstart = nx-1;  xend = -1;  xinc = -1; }
502		else      { xstart = 0;     xend = nx;  xinc = +1; }
	470	if (flipx)   { xstart = nx - 1;  xend = -1;  xinc = -1; }
	471	else      { xstart = 0;       xend = nx;  xinc = +1; }
503	472
504		if (flipy)   { ystart = ny-1;  yend = -1;   yinc = -1; }
505		else      { ystart = 0;     yend = ny;   yinc = +1; }
	473	if (flipy)   { ystart = ny - 1;  yend = -1;   yinc = -1; }
	474	else      { ystart = 0;       yend = ny;   yinc = +1; }
506	475
507	476	for (dy = ystart; dy != yend; dy += yinc)
508	477	{
509	478	for (dx = xstart; dx != xend; dx += xinc)
510	479	{
511		int addr   =   (code*2) & (TILES_LEN-1);
	480	int addr = (code * 2) & (TILES_LEN-1);
512	481
513	482	if (zoomx == 32 && zoomy == 32)
514	483	pdrawgfx_transpen(bitmap,cliprect,machine->gfx[0],
r6740	r6741
545	514
546	515	static int tilemap_width( int size )
547	516	{
548		if(size==0)         return 0x80*16;
549		else if(size==1)   return 0x40*16;
550		else if(size==2)   return 0x20*16;
551		else            return 0x10*16;
	517	if (size == 0)
	518	return 0x80 * 16;
	519	else if(size == 1)
	520	return 0x40 * 16;
	521	else if(size == 2)
	522	return 0x20 * 16;
	523	else
	524	return 0x10 * 16;
552	525	}
553	526
554	527	VIDEO_UPDATE( psikyo )
555	528	{
	529	psikyo_state *state = (psikyo_state *)screen->machine->driver_data;
556	530	int i, layers_ctrl = -1;
557	531
558	532	UINT32 tm0size, tm1size;
559	533
560	534	UINT32 layer0_scrollx, layer0_scrolly;
561	535	UINT32 layer1_scrollx, layer1_scrolly;
562		UINT32 layer0_ctrl = psikyo_vregs[ 0x412/4 ];
563		UINT32 layer1_ctrl = psikyo_vregs[ 0x416/4 ];
564		UINT32 spr_ctrl = spritebuf2[ 0x1ffe/4 ];
	536	UINT32 layer0_ctrl = state->vregs[0x412 / 4];
	537	UINT32 layer1_ctrl = state->vregs[0x416 / 4];
	538	UINT32 spr_ctrl = state->spritebuf2[0x1ffe / 4];
565	539
566	540	tilemap *tmptilemap0, *tmptilemap1;
567	541
r6740	r6741
598	572	*/
599	573
600	574	/* For gfx banking for s1945jn/gunbird/btlkroad */
601		if(psikyo_ka302c_banking)
	575	if (state->ka302c_banking)
602	576	{
603		psikyo_switch_banks(0, (layer0_ctrl&0x400)>>10);
604		psikyo_switch_banks(1, (layer1_ctrl&0x400)>>10);
	577	psikyo_switch_banks(screen->machine, 0, (layer0_ctrl & 0x400) >> 10);
	578	psikyo_switch_banks(screen->machine, 1, (layer1_ctrl & 0x400) >> 10);
605	579	}
606	580
607		switch((layer0_ctrl & 0x00c0)>>6) {
608		case 0:
609		tm0size=1;
610		break;
611		case 1:
612		tm0size=2;
613		break;
614		case 2:
615		tm0size=3;
616		break;
617		default:
618		tm0size=0;
619		break;
	581	switch ((layer0_ctrl & 0x00c0) >> 6)
	582	{
	583	case 0:   tm0size = 1;   break;
	584	case 1:   tm0size = 2;   break;
	585	case 2:   tm0size = 3;   break;
	586	default:   tm0size = 0;   break;
620	587	}
621	588
622		switch((layer1_ctrl & 0x00c0)>>6) {
623		case 0:
624		tm1size=1;
625		break;
626		case 1:
627		tm1size=2;
628		break;
629		case 2:
630		tm1size=3;
631		break;
632		default:
633		tm1size=0;
634		break;
	589	switch ((layer1_ctrl & 0x00c0) >> 6)
	590	{
	591	case 0:   tm1size = 1;   break;
	592	case 1:   tm1size = 2;   break;
	593	case 2:   tm1size = 3;   break;
	594	default:   tm1size = 0;   break;
635	595	}
636	596
637		if(tm0size==0) tmptilemap0 = tilemap_0_size0;
638		else if (tm0size==1) tmptilemap0 = tilemap_0_size1;
639		else if (tm0size==2) tmptilemap0 = tilemap_0_size2;
640		else tmptilemap0 = tilemap_0_size3;
	597	if (tm0size == 0)
	598	tmptilemap0 = state->tilemap_0_size0;
	599	else if (tm0size == 1)
	600	tmptilemap0 = state->tilemap_0_size1;
	601	else if (tm0size == 2)
	602	tmptilemap0 = state->tilemap_0_size2;
	603	else
	604	tmptilemap0 = state->tilemap_0_size3;
641	605
642		if(tm1size==0) tmptilemap1 = tilemap_1_size0;
643		else if (tm1size==1) tmptilemap1 = tilemap_1_size1;
644		else if (tm1size==2) tmptilemap1 = tilemap_1_size2;
645		else tmptilemap1 = tilemap_1_size3;
	606	if (tm1size == 0)
	607	tmptilemap1 = state->tilemap_1_size0;
	608	else if (tm1size == 1)
	609	tmptilemap1 = state->tilemap_1_size1;
	610	else if (tm1size == 2)
	611	tmptilemap1 = state->tilemap_1_size2;
	612	else
	613	tmptilemap1 = state->tilemap_1_size3;
646	614
647	615	tilemap_set_enable(tmptilemap0, ~layer0_ctrl & 1);
648
649	616	tilemap_set_enable(tmptilemap1, ~layer1_ctrl & 1);
650	617
651	618	/* Layers scrolling */
652	619
653		layer0_scrolly = psikyo_vregs[ 0x402/4 ];
654		layer0_scrollx = psikyo_vregs[ 0x406/4 ];
655		layer1_scrolly = psikyo_vregs[ 0x40a/4 ];
656		layer1_scrollx = psikyo_vregs[ 0x40e/4 ];
	620	layer0_scrolly = state->vregs[0x402 / 4];
	621	layer0_scrollx = state->vregs[0x406 / 4];
	622	layer1_scrolly = state->vregs[0x40a / 4];
	623	layer1_scrollx = state->vregs[0x40e / 4];
657	624
658		tilemap_set_scrolly(tmptilemap0, 0, layer0_scrolly );
	625	tilemap_set_scrolly(tmptilemap0, 0, layer0_scrolly);
659	626
660		tilemap_set_scrolly(tmptilemap1, 0, layer1_scrolly );
	627	tilemap_set_scrolly(tmptilemap1, 0, layer1_scrolly);
661	628
662		for (i=0; i<256; i++)   /* 256 screen lines */
	629	for (i = 0; i < 256; i++)   /* 256 screen lines */
663	630	{
664	631	int x0 = 0, x1 = 0;
665	632
r6740	r6741
668	635	{
669	636	if (layer0_ctrl & 0x0200)
670	637	/* per-tile rowscroll */
671		x0 = ((UINT16 *)psikyo_vregs)[BYTE_XOR_BE(0x000/2 + i/16)];
	638	x0 = ((UINT16 *)state->vregs)[BYTE_XOR_BE(0x000/2 + i/16)];
672	639	else
673	640	/* per-line rowscroll */
674		x0 = ((UINT16 *)psikyo_vregs)[BYTE_XOR_BE(0x000/2 + i)];
	641	x0 = ((UINT16 *)state->vregs)[BYTE_XOR_BE(0x000/2 + i)];
675	642	}
676	643
677	644	tilemap_set_scrollx(
678	645	tmptilemap0,
679		(i+layer0_scrolly) % tilemap_width(tm0size),
	646	(i + layer0_scrolly) % tilemap_width(tm0size),
680	647	layer0_scrollx + x0 );
681	648
682	649
r6740	r6741
685	652	{
686	653	if (layer1_ctrl & 0x0200)
687	654	/* per-tile rowscroll */
688		x1 = ((UINT16 *)psikyo_vregs)[BYTE_XOR_BE(0x200/2 + i/16)];
	655	x1 = ((UINT16 *)state->vregs)[BYTE_XOR_BE(0x200/2 + i/16)];
689	656	else
690	657	/* per-line rowscroll */
691		x1 = ((UINT16 *)psikyo_vregs)[BYTE_XOR_BE(0x200/2 + i)];
	658	x1 = ((UINT16 *)state->vregs)[BYTE_XOR_BE(0x200/2 + i)];
692	659	}
693	660
694	661	tilemap_set_scrollx(
695	662	tmptilemap1,
696		(i+layer1_scrolly) % tilemap_width(tm1size),
	663	(i + layer1_scrolly) % tilemap_width(tm1size),
697	664	layer1_scrollx + x1 );
698	665	}
699	666
700		tilemap_set_transparent_pen(tilemap_0_size0,(layer0_ctrl & 8 ?0:15));
701		tilemap_set_transparent_pen(tilemap_0_size1,(layer0_ctrl & 8 ?0:15));
702		tilemap_set_transparent_pen(tilemap_0_size2,(layer0_ctrl & 8 ?0:15));
703		tilemap_set_transparent_pen(tilemap_0_size3,(layer0_ctrl & 8 ?0:15));
	667	tilemap_set_transparent_pen(state->tilemap_0_size0, (layer0_ctrl & 8 ? 0 : 15));
	668	tilemap_set_transparent_pen(state->tilemap_0_size1, (layer0_ctrl & 8 ? 0 : 15));
	669	tilemap_set_transparent_pen(state->tilemap_0_size2, (layer0_ctrl & 8 ? 0 : 15));
	670	tilemap_set_transparent_pen(state->tilemap_0_size3, (layer0_ctrl & 8 ? 0 : 15));
704	671
705		tilemap_set_transparent_pen(tilemap_1_size0,(layer1_ctrl & 8 ?0:15));
706		tilemap_set_transparent_pen(tilemap_1_size1,(layer1_ctrl & 8 ?0:15));
707		tilemap_set_transparent_pen(tilemap_1_size2,(layer1_ctrl & 8 ?0:15));
708		tilemap_set_transparent_pen(tilemap_1_size3,(layer1_ctrl & 8 ?0:15));
	672	tilemap_set_transparent_pen(state->tilemap_1_size0, (layer1_ctrl & 8 ? 0 : 15));
	673	tilemap_set_transparent_pen(state->tilemap_1_size1, (layer1_ctrl & 8 ? 0 : 15));
	674	tilemap_set_transparent_pen(state->tilemap_1_size2, (layer1_ctrl & 8 ? 0 : 15));
	675	tilemap_set_transparent_pen(state->tilemap_1_size3, (layer1_ctrl & 8 ? 0 : 15));
709	676
710		bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
	677	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
711	678
712		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
	679	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
713	680
714	681	if (layers_ctrl & 1)
715		tilemap_draw(bitmap,cliprect,tmptilemap0, layer0_ctrl & 2 ? TILEMAP_DRAW_OPAQUE : 0, 1);
	682	tilemap_draw(bitmap, cliprect, tmptilemap0, layer0_ctrl & 2 ? TILEMAP_DRAW_OPAQUE : 0, 1);
716	683
717	684	if (layers_ctrl & 2)
718		tilemap_draw(bitmap,cliprect,tmptilemap1, layer1_ctrl & 2 ? TILEMAP_DRAW_OPAQUE : 0, 2);
	685	tilemap_draw(bitmap, cliprect, tmptilemap1, layer1_ctrl & 2 ? TILEMAP_DRAW_OPAQUE : 0, 2);
719	686
720	687	if (layers_ctrl & 4)
721		draw_sprites(screen->machine, bitmap,cliprect,(spr_ctrl & 4 ? 0 : 15));
	688	draw_sprites(screen->machine, bitmap, cliprect, (spr_ctrl & 4 ? 0 : 15));
722	689
723	690	return 0;
724	691	}
r6740	r6741
733	700
734	701	VIDEO_UPDATE( psikyo_bootleg )
735	702	{
	703	psikyo_state *state = (psikyo_state *)screen->machine->driver_data;
736	704	int i, layers_ctrl = -1;
737	705
738	706	UINT32 tm0size, tm1size;
739	707
740	708	UINT32 layer0_scrollx, layer0_scrolly;
741	709	UINT32 layer1_scrollx, layer1_scrolly;
742		UINT32 layer0_ctrl = psikyo_vregs[ 0x412/4 ];
743		UINT32 layer1_ctrl = psikyo_vregs[ 0x416/4 ];
744		UINT32 spr_ctrl = spritebuf2[ 0x1ffe/4 ];
	710	UINT32 layer0_ctrl = state->vregs[0x412 / 4];
	711	UINT32 layer1_ctrl = state->vregs[0x416 / 4];
	712	UINT32 spr_ctrl = state->spritebuf2[0x1ffe / 4];
745	713
746	714	tilemap *tmptilemap0, *tmptilemap1;
747	715
r6740	r6741
778	746	*/
779	747
780	748	/* For gfx banking for s1945jn/gunbird/btlkroad */
781		if(psikyo_ka302c_banking)
	749	if (state->ka302c_banking)
782	750	{
783		psikyo_switch_banks(0, (layer0_ctrl&0x400)>>10);
784		psikyo_switch_banks(1, (layer1_ctrl&0x400)>>10);
	751	psikyo_switch_banks(screen->machine, 0, (layer0_ctrl & 0x400) >> 10);
	752	psikyo_switch_banks(screen->machine, 1, (layer1_ctrl & 0x400) >> 10);
785	753	}
786	754
787		switch((layer0_ctrl & 0x00c0)>>6) {
788		case 0:
789		tm0size=1;
790		break;
791		case 1:
792		tm0size=2;
793		break;
794		case 2:
795		tm0size=3;
796		break;
797		default:
798		tm0size=0;
799		break;
	755	switch ((layer0_ctrl & 0x00c0) >> 6)
	756	{
	757	case 0:   tm0size = 1;   break;
	758	case 1:   tm0size = 2;   break;
	759	case 2:   tm0size = 3;   break;
	760	default:   tm0size = 0;   break;
800	761	}
801	762
802		switch((layer1_ctrl & 0x00c0)>>6) {
803		case 0:
804		tm1size=1;
805		break;
806		case 1:
807		tm1size=2;
808		break;
809		case 2:
810		tm1size=3;
811		break;
812		default:
813		tm1size=0;
814		break;
	763	switch ((layer1_ctrl & 0x00c0) >> 6)
	764	{
	765	case 0:   tm1size = 1;   break;
	766	case 1:   tm1size = 2;   break;
	767	case 2:   tm1size = 3;   break;
	768	default:   tm1size = 0;   break;
815	769	}
816	770
817		if(tm0size==0) tmptilemap0 = tilemap_0_size0;
818		else if (tm0size==1) tmptilemap0 = tilemap_0_size1;
819		else if (tm0size==2) tmptilemap0 = tilemap_0_size2;
820		else tmptilemap0 = tilemap_0_size3;
	771	if (tm0size == 0)
	772	tmptilemap0 = state->tilemap_0_size0;
	773	else if (tm0size == 1)
	774	tmptilemap0 = state->tilemap_0_size1;
	775	else if (tm0size == 2)
	776	tmptilemap0 = state->tilemap_0_size2;
	777	else
	778	tmptilemap0 = state->tilemap_0_size3;
821	779
822		if(tm1size==0) tmptilemap1 = tilemap_1_size0;
823		else if (tm1size==1) tmptilemap1 = tilemap_1_size1;
824		else if (tm1size==2) tmptilemap1 = tilemap_1_size2;
825		else tmptilemap1 = tilemap_1_size3;
	780	if (tm1size == 0)
	781	tmptilemap1 = state->tilemap_1_size0;
	782	else if (tm1size == 1)
	783	tmptilemap1 = state->tilemap_1_size1;
	784	else if (tm1size == 2)
	785	tmptilemap1 = state->tilemap_1_size2;
	786	else
	787	tmptilemap1 = state->tilemap_1_size3;
826	788
827	789	tilemap_set_enable(tmptilemap0, ~layer0_ctrl & 1);
828
829	790	tilemap_set_enable(tmptilemap1, ~layer1_ctrl & 1);
830	791
831	792	/* Layers scrolling */
832	793
833		layer0_scrolly = psikyo_vregs[ 0x402/4 ];
834		layer0_scrollx = psikyo_vregs[ 0x406/4 ];
835		layer1_scrolly = psikyo_vregs[ 0x40a/4 ];
836		layer1_scrollx = psikyo_vregs[ 0x40e/4 ];
	794	layer0_scrolly = state->vregs[0x402 / 4];
	795	layer0_scrollx = state->vregs[0x406 / 4];
	796	layer1_scrolly = state->vregs[0x40a / 4];
	797	layer1_scrollx = state->vregs[0x40e / 4];
837	798
838		tilemap_set_scrolly(tmptilemap0, 0, layer0_scrolly );
	799	tilemap_set_scrolly(tmptilemap0, 0, layer0_scrolly);
839	800
840		tilemap_set_scrolly(tmptilemap1, 0, layer1_scrolly );
	801	tilemap_set_scrolly(tmptilemap1, 0, layer1_scrolly);
841	802
842		for (i=0; i<256; i++)   /* 256 screen lines */
	803	for (i = 0; i < 256; i++)   /* 256 screen lines */
843	804	{
844	805	int x0 = 0, x1 = 0;
845	806
r6740	r6741
848	809	{
849	810	if (layer0_ctrl & 0x0200)
850	811	/* per-tile rowscroll */
851		x0 = ((UINT16 *)psikyo_vregs)[BYTE_XOR_BE(0x000/2 + i/16)];
	812	x0 = ((UINT16 *)state->vregs)[BYTE_XOR_BE(0x000/2 + i/16)];
852	813	else
853	814	/* per-line rowscroll */
854		x0 = ((UINT16 *)psikyo_vregs)[BYTE_XOR_BE(0x000/2 + i)];
	815	x0 = ((UINT16 *)state->vregs)[BYTE_XOR_BE(0x000/2 + i)];
855	816	}
856	817
857	818	tilemap_set_scrollx(
858	819	tmptilemap0,
859		(i+layer0_scrolly) % tilemap_width(tm0size),
	820	(i + layer0_scrolly) % tilemap_width(tm0size),
860	821	layer0_scrollx + x0 );
861	822
862	823
r6740	r6741
865	826	{
866	827	if (layer1_ctrl & 0x0200)
867	828	/* per-tile rowscroll */
868		x1 = ((UINT16 *)psikyo_vregs)[BYTE_XOR_BE(0x200/2 + i/16)];
	829	x1 = ((UINT16 *)state->vregs)[BYTE_XOR_BE(0x200/2 + i/16)];
869	830	else
870	831	/* per-line rowscroll */
871		x1 = ((UINT16 *)psikyo_vregs)[BYTE_XOR_BE(0x200/2 + i)];
	832	x1 = ((UINT16 *)state->vregs)[BYTE_XOR_BE(0x200/2 + i)];
872	833	}
873	834
874	835	tilemap_set_scrollx(
875	836	tmptilemap1,
876		(i+layer1_scrolly) % tilemap_width(tm1size),
	837	(i + layer1_scrolly) % tilemap_width(tm1size),
877	838	layer1_scrollx + x1 );
878	839	}
879	840
880		tilemap_set_transparent_pen(tilemap_0_size0,(layer0_ctrl & 8 ?0:15));
881		tilemap_set_transparent_pen(tilemap_0_size1,(layer0_ctrl & 8 ?0:15));
882		tilemap_set_transparent_pen(tilemap_0_size2,(layer0_ctrl & 8 ?0:15));
883		tilemap_set_transparent_pen(tilemap_0_size3,(layer0_ctrl & 8 ?0:15));
	841	tilemap_set_transparent_pen(state->tilemap_0_size0, (layer0_ctrl & 8 ? 0 : 15));
	842	tilemap_set_transparent_pen(state->tilemap_0_size1, (layer0_ctrl & 8 ? 0 : 15));
	843	tilemap_set_transparent_pen(state->tilemap_0_size2, (layer0_ctrl & 8 ? 0 : 15));
	844	tilemap_set_transparent_pen(state->tilemap_0_size3, (layer0_ctrl & 8 ? 0 : 15));
884	845
885		tilemap_set_transparent_pen(tilemap_1_size0,(layer1_ctrl & 8 ?0:15));
886		tilemap_set_transparent_pen(tilemap_1_size1,(layer1_ctrl & 8 ?0:15));
887		tilemap_set_transparent_pen(tilemap_1_size2,(layer1_ctrl & 8 ?0:15));
888		tilemap_set_transparent_pen(tilemap_1_size3,(layer1_ctrl & 8 ?0:15));
	846	tilemap_set_transparent_pen(state->tilemap_1_size0, (layer1_ctrl & 8 ? 0 : 15));
	847	tilemap_set_transparent_pen(state->tilemap_1_size1, (layer1_ctrl & 8 ? 0 : 15));
	848	tilemap_set_transparent_pen(state->tilemap_1_size2, (layer1_ctrl & 8 ? 0 : 15));
	849	tilemap_set_transparent_pen(state->tilemap_1_size3, (layer1_ctrl & 8 ? 0 : 15));
889	850
890	851	bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
891	852
892		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
	853	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
893	854
894	855	if (layers_ctrl & 1)
895		tilemap_draw(bitmap,cliprect,tmptilemap0, layer0_ctrl & 2 ? TILEMAP_DRAW_OPAQUE : 0, 1);
	856	tilemap_draw(bitmap, cliprect, tmptilemap0, layer0_ctrl & 2 ? TILEMAP_DRAW_OPAQUE : 0, 1);
896	857
897	858	if (layers_ctrl & 2)
898		tilemap_draw(bitmap,cliprect,tmptilemap1, layer1_ctrl & 2 ? TILEMAP_DRAW_OPAQUE : 0, 2);
	859	tilemap_draw(bitmap, cliprect, tmptilemap1, layer1_ctrl & 2 ? TILEMAP_DRAW_OPAQUE : 0, 2);
899	860
900	861	if (layers_ctrl & 4)
901		draw_sprites_bootleg(screen->machine, bitmap,cliprect,(spr_ctrl & 4 ? 0 : 15));
	862	draw_sprites_bootleg(screen->machine, bitmap, cliprect, (spr_ctrl & 4 ? 0 : 15));
902	863
903	864	return 0;
904	865	}
r6740	r6741
906	867
907	868	VIDEO_EOF( psikyo )
908	869	{
909		memcpy(spritebuf2, spritebuf1, 0x2000);
910		memcpy(spritebuf1, machine->generic.spriteram.u32, 0x2000);
	870	psikyo_state *state = (psikyo_state *)machine->driver_data;
	871	memcpy(state->spritebuf2, state->spritebuf1, 0x2000);
	872	memcpy(state->spritebuf1, machine->generic.spriteram.u32, 0x2000);
911	873	}

src/mame/video/esd16.c

r6740	r6741
34	34	***************************************************************************/
35	35
36	36	#include "driver.h"
37		#include "esd16.h"
	37	#include "includes/esd16.h"
38	38
39	39
40	40	/***************************************************************************

src/mame/video/namcos21.c

r6740	r6741
7	7	*/
8	8
9	9	#include "driver.h"
10		#include "namcos2.h"
11		#include "namcoic.h"
12		#include "namcos21.h"
	10	#include "includes/namcos2.h"
	11	#include "includes/namcoic.h"
	12	#include "includes/namcos21.h"
13	13
14	14	#define FRAMEBUFFER_SIZE_IN_BYTES (sizeof(UINT16)*NAMCOS21_POLY_FRAME_WIDTH*NAMCOS21_POLY_FRAME_HEIGHT)
15	15

src/mame/video/pgm.c

r6740	r6741
4	4	#include "driver.h"
5	5	#include "includes/pgm.h"
6	6
7		static tilemap *pgm_tx_tilemap, *pgm_bg_tilemap;
8		static UINT16 *pgm_spritebufferram; // buffered spriteram
9		static UINT16 *sprite_temp_render;
10		static bitmap_t *tmppgmbitmap;
11
12	7	/* Sprites - These are a pain! */
13	8
14	9	/* this decodes one of the funky sprites to a bitmap so we can draw it more easily -- slow but easier to use*/
15		static void pgm_prepare_sprite(running_machine *machine, int wide, int high,int palt, int boffset)
	10	static void pgm_prepare_sprite( running_machine *machine, int wide, int high, int palt, int boffset )
16	11	{
17		UINT8 *bdata    = memory_region       ( machine, "gfx4" );
18		size_t  bdatasize = memory_region_length( machine, "gfx4" )-1;
19		UINT8 *adata    = pgm_sprite_a_region;
20		size_t  adatasize = pgm_sprite_a_region_allocate-1;
	12	pgm_state *state = (pgm_state *)machine->driver_data;
	13	UINT8 *bdata = memory_region(machine, "gfx4");
	14	size_t  bdatasize = memory_region_length(machine, "gfx4") - 1;
	15	UINT8 *adata = state->sprite_a_region;
	16	size_t  adatasize = state->sprite_a_region_size - 1;
21	17	int xcnt, ycnt;
22	18
23	19	UINT32 aoffset;
24	20	UINT16 msk;
25	21
26		aoffset = (bdata[(boffset+3) & bdatasize] << 24) | (bdata[(boffset+2) & bdatasize] << 16) | (bdata[(boffset+1) & bdatasize] << 8) | (bdata[(boffset+0) & bdatasize] << 0);
	22	aoffset = (bdata[(boffset + 3) & bdatasize] << 24) | (bdata[(boffset + 2) & bdatasize] << 16) |
	23	(bdata[(boffset + 1) & bdatasize] << 8) | (bdata[(boffset + 0) & bdatasize] << 0);
27	24	aoffset = aoffset >> 2; aoffset *= 3;
28	25
29	26	boffset += 4; /* because the first dword is the a data offset */
30	27
31		for (ycnt = 0 ; ycnt < high ; ycnt++) {
32		for (xcnt = 0 ; xcnt < wide ; xcnt++) {
	28	for (ycnt = 0 ; ycnt < high ; ycnt++)
	29	{
	30	for (xcnt = 0 ; xcnt < wide ; xcnt++)
	31	{
33	32	int x;
34	33
35		msk = (( bdata[(boffset+1) & bdatasize] << 8) |( bdata[(boffset+0) & bdatasize] << 0) );
	34	msk = ((bdata[(boffset + 1) & bdatasize] << 8) |( bdata[(boffset + 0) & bdatasize] << 0));
36	35
37		for (x=0;x<16;x++)
	36	for (x = 0; x < 16; x++)
38	37	{
39	38	if (!(msk & 0x0001))
40	39	{
41		sprite_temp_render[(ycnt*(wide*16))+(xcnt*16+x)] = adata[aoffset & adatasize]+ palt*32;
	40	state->sprite_temp_render[(ycnt * (wide * 16))+(xcnt * 16 + x)] = adata[aoffset & adatasize] + palt * 32;
42	41	aoffset++;
43	42	}
44	43	else
45	44	{
46		sprite_temp_render[(ycnt*(wide*16))+(xcnt*16+x)] = 0x8000;
	45	state->sprite_temp_render[(ycnt * (wide * 16)) + (xcnt * 16 + x)] = 0x8000;
47	46	}
48		msk >>=1;
	47	msk >>= 1;
49	48	}
50	49
51		boffset+=2;
	50	boffset += 2;
52	51	}
53	52	}
54	53	}
55	54
56	55
57	56	// in the dest bitmap 0x10000 is used to mark 'used pixel' and 0x8000 is used to mark 'high priority'
58		static void draw_sprite_line(int wide, UINT32* dest, int xzoom, int xgrow, int yoffset, int flip, int xpos, int pri)
	57	static void draw_sprite_line( running_machine *machine, int wide, UINT32* dest, int xzoom, int xgrow, int yoffset, int flip, int xpos, int pri )
59	58	{
	59	pgm_state *state = (pgm_state *)machine->driver_data;
60	60	int xcnt,xcntdraw;
61	61	int xzoombit;
62	62	int xoffset;
r6740	r6741
64	64
65	65	xcnt = 0;
66	66	xcntdraw = 0;
67		while (xcnt < wide*16)
	67	while (xcnt < wide * 16)
68	68	{
69	69	UINT32 srcdat;
70		if (!(flip&0x01)) xoffset = xcnt;
71		else xoffset = (wide*16)-xcnt-1;
	70	if (!(flip & 0x01))
	71	xoffset = xcnt;
	72	else
	73	xoffset = (wide * 16) - xcnt - 1;
72	74
73		srcdat = sprite_temp_render[yoffset+xoffset];
74		xzoombit = (xzoom >> (xcnt&0x1f))&1;
	75	srcdat = state->sprite_temp_render[yoffset + xoffset];
	76	xzoombit = (xzoom >> (xcnt & 0x1f)) & 1;
75	77
76		if (xzoombit == 1 && xgrow ==1)
	78	if (xzoombit == 1 && xgrow == 1)
77	79	{ // double this column
78	80	xdrawpos = xpos + xcntdraw;
79		if (!(srcdat&0x8000))
	81	if (!(srcdat & 0x8000))
80	82	{
81	83	if ((xdrawpos >= 0) && (xdrawpos < 448))
82	84	{
83		if (pri) dest[xdrawpos] = srcdat | 0x8000 | 0x10000;
84		else dest[xdrawpos] = srcdat | 0x10000;
	85	if (pri)
	86	dest[xdrawpos] = srcdat | 0x8000 | 0x10000;
	87	else
	88	dest[xdrawpos] = srcdat | 0x10000;
85	89	}
86	90	}
87	91	xcntdraw++;
88	92
89	93	xdrawpos = xpos + xcntdraw;
90	94
91		if (!(srcdat&0x8000))
	95	if (!(srcdat & 0x8000))
92	96	{
93	97	if ((xdrawpos >= 0) && (xdrawpos < 448))
94	98	{
95		if (pri) dest[xdrawpos] = srcdat | 0x8000 | 0x10000;
96		else dest[xdrawpos] = srcdat | 0x10000;
	99	if (pri)
	100	dest[xdrawpos] = srcdat | 0x8000 | 0x10000;
	101	else
	102	dest[xdrawpos] = srcdat | 0x10000;
97	103	}
98	104	}
99	105	xcntdraw++;
100	106	}
101		else if (xzoombit ==1 && xgrow ==0)
	107	else if (xzoombit == 1 && xgrow == 0)
102	108	{
103	109	/* skip this column */
104	110	}
105	111	else //normal column
106	112	{
107	113	xdrawpos = xpos + xcntdraw;
108		if (!(srcdat&0x8000))
	114	if (!(srcdat & 0x8000))
109	115	{
110	116	if ((xdrawpos >= 0) && (xdrawpos < 448))
111	117	{
112		if (pri) dest[xdrawpos] = srcdat | 0x8000 | 0x10000;
113		else dest[xdrawpos] = srcdat | 0x10000;
	118	if (pri)
	119	dest[xdrawpos] = srcdat | 0x8000 | 0x10000;
	120	else
	121	dest[xdrawpos] = srcdat | 0x10000;
114	122	}
115	123	}
116	124	xcntdraw++;
r6740	r6741
122	130	}
123	131	}
124	132	/* this just loops over our decoded bitmap and puts it on the screen */
125		static void draw_sprite_new_zoomed(running_machine *machine, int wide, int high, int xpos, int ypos, int palt, int boffset, int flip, bitmap_t* bitmap, UINT32 xzoom, int xgrow, UINT32 yzoom, int ygrow, int pri )
	133	static void draw_sprite_new_zoomed( running_machine *machine, int wide, int high, int xpos, int ypos, int palt, int boffset, int flip, bitmap_t* bitmap, UINT32 xzoom, int xgrow, UINT32 yzoom, int ygrow, int pri )
126	134	{
127	135	int ycnt;
128	136	int ydrawpos;
r6740	r6741
131	139	int ycntdraw;
132	140	int yzoombit;
133	141
134		pgm_prepare_sprite( machine, wide,high, palt, boffset );
	142	pgm_prepare_sprite(machine, wide,high, palt, boffset);
135	143
136	144	/* now draw it */
137	145	ycnt = 0;
138	146	ycntdraw = 0;
139	147	while (ycnt < high)
140	148	{
141		yzoombit = (yzoom >> (ycnt&0x1f))&1;
	149	yzoombit = (yzoom >> (ycnt & 0x1f)) & 1;
142	150
143	151	if (yzoombit == 1 && ygrow == 1) // double this line
144	152	{
145	153	ydrawpos = ypos + ycntdraw;
146	154
147		if (!(flip&0x02)) yoffset = (ycnt*(wide*16));
148		else yoffset = ( (high-ycnt-1)*(wide*16));
	155	if (!(flip & 0x02))
	156	yoffset = (ycnt * (wide * 16));
	157	else
	158	yoffset = ((high - ycnt - 1) * (wide * 16));
	159
149	160	if ((ydrawpos >= 0) && (ydrawpos < 224))
150	161	{
151	162	dest = BITMAP_ADDR32(bitmap, ydrawpos, 0);
152		draw_sprite_line(wide, dest, xzoom, xgrow, yoffset, flip, xpos, pri);
	163	draw_sprite_line(machine, wide, dest, xzoom, xgrow, yoffset, flip, xpos, pri);
153	164	}
154	165	ycntdraw++;
155	166
156	167	ydrawpos = ypos + ycntdraw;
157		if (!(flip&0x02)) yoffset = (ycnt*(wide*16));
158		else yoffset = ( (high-ycnt-1)*(wide*16));
	168	if (!(flip & 0x02))
	169	yoffset = (ycnt * (wide * 16));
	170	else
	171	yoffset = ((high - ycnt - 1) * (wide * 16));
	172
159	173	if ((ydrawpos >= 0) && (ydrawpos < 224))
160	174	{
161	175	dest = BITMAP_ADDR32(bitmap, ydrawpos, 0);
162		draw_sprite_line(wide, dest, xzoom, xgrow, yoffset, flip, xpos, pri);
	176	draw_sprite_line(machine, wide, dest, xzoom, xgrow, yoffset, flip, xpos, pri);
163	177	}
164	178	ycntdraw++;
165	179
166		if (ydrawpos ==224) ycnt = high;
	180	if (ydrawpos ==224)
	181	ycnt = high;
167	182	}
168		else if (yzoombit ==1 && ygrow == 0)
	183	else if (yzoombit == 1 && ygrow == 0)
169	184	{
170	185	/* skip this line */
171	186	/* we should process anyway if we don't do the pre-decode.. */
r6740	r6741
174	189	{
175	190	ydrawpos = ypos + ycntdraw;
176	191
177		if (!(flip&0x02)) yoffset = (ycnt*(wide*16));
178		else yoffset = ( (high-ycnt-1)*(wide*16));
	192	if (!(flip & 0x02))
	193	yoffset = (ycnt * (wide * 16));
	194	else
	195	yoffset = ((high - ycnt - 1) * (wide * 16));
	196
179	197	if ((ydrawpos >= 0) && (ydrawpos < 224))
180	198	{
181	199	dest = BITMAP_ADDR32(bitmap, ydrawpos, 0);
182		draw_sprite_line(wide, dest, xzoom, xgrow, yoffset, flip, xpos, pri);
	200	draw_sprite_line(machine, wide, dest, xzoom, xgrow, yoffset, flip, xpos, pri);
183	201	}
184	202	ycntdraw++;
185	203
186		if (ydrawpos ==224) ycnt = high;
	204	if (ydrawpos == 224)
	205	ycnt = high;
187	206	}
188	207
189	208	ycnt++;
r6740	r6741
191	210	}
192	211
193	212
194		static UINT16 *pgm_sprite_source;
195
196		static void draw_sprites(running_machine *machine, bitmap_t* spritebitmap)
	213	static void draw_sprites( running_machine *machine, bitmap_t* spritebitmap, UINT16 *sprite_source )
197	214	{
198	215	/* ZZZZ Zxxx xxxx xxxx
199	216	zzzz z-yy yyyy yyyy
r6740	r6741
203	220	*/
204	221
205	222
206		const UINT16 *finish = pgm_spritebufferram+(0xa00/2);
	223	pgm_state *state = (pgm_state *)machine->driver_data;
	224	const UINT16 *finish = state->spritebufferram + (0xa00 / 2);
207	225
208		while( pgm_sprite_source<finish )
	226	while (sprite_source < finish)
209	227	{
210		int xpos = pgm_sprite_source[0] & 0x07ff;
211		int ypos = pgm_sprite_source[1] & 0x03ff;
212		int xzom = (pgm_sprite_source[0] & 0x7800) >> 11;
213		int xgrow = (pgm_sprite_source[0] & 0x8000) >> 15;
214		int yzom = (pgm_sprite_source[1] & 0x7800) >> 11;
215		int ygrow = (pgm_sprite_source[1] & 0x8000) >> 15;
216		int palt = (pgm_sprite_source[2] & 0x1f00) >> 8;
217		int flip = (pgm_sprite_source[2] & 0x6000) >> 13;
218		int boff = ((pgm_sprite_source[2] & 0x007f) << 16) | (pgm_sprite_source[3] & 0xffff);
219		int wide = (pgm_sprite_source[4] & 0x7e00) >> 9;
220		int high = pgm_sprite_source[4] & 0x01ff;
221		int pri = (pgm_sprite_source[2] & 0x0080) >>  7;
	228	int xpos = sprite_source[0] & 0x07ff;
	229	int ypos = sprite_source[1] & 0x03ff;
	230	int xzom = (sprite_source[0] & 0x7800) >> 11;
	231	int xgrow = (sprite_source[0] & 0x8000) >> 15;
	232	int yzom = (sprite_source[1] & 0x7800) >> 11;
	233	int ygrow = (sprite_source[1] & 0x8000) >> 15;
	234	int palt = (sprite_source[2] & 0x1f00) >> 8;
	235	int flip = (sprite_source[2] & 0x6000) >> 13;
	236	int boff = ((sprite_source[2] & 0x007f) << 16) | (sprite_source[3] & 0xffff);
	237	int wide = (sprite_source[4] & 0x7e00) >> 9;
	238	int high = sprite_source[4] & 0x01ff;
	239	int pri = (sprite_source[2] & 0x0080) >>  7;
222	240
223	241	UINT32 xzoom, yzoom;
224	242
225		UINT16* pgm_sprite_zoomtable = &pgm_videoregs[0x1000/2];
	243	UINT16* sprite_zoomtable = &state->videoregs[0x1000 / 2];
226	244
227	245	if (xgrow)
228	246	{
229		//  xzom = 0xf-xzom; // would make more sense but everything gets zoomed slightly in dragon world 2 ?!
230		xzom = 0x10-xzom; // this way it doesn't but there is a bad line when zooming after the level select?
	247	//  xzom = 0xf - xzom; // would make more sense but everything gets zoomed slightly in dragon world 2 ?!
	248	xzom = 0x10 - xzom; // this way it doesn't but there is a bad line when zooming after the level select?
231	249	}
232	250
233	251	if (ygrow)
234	252	{
235		//  yzom = 0xf-yzom; // see comment above
236		yzom = 0x10-yzom;
	253	//  yzom = 0xf - yzom; // see comment above
	254	yzom = 0x10 - yzom;
237	255	}
238	256
239		xzoom = (pgm_sprite_zoomtable[xzom*2]<<16)|pgm_sprite_zoomtable[xzom*2+1];
240		yzoom = (pgm_sprite_zoomtable[yzom*2]<<16)|pgm_sprite_zoomtable[yzom*2+1];
	257	xzoom = (sprite_zoomtable[xzom * 2] << 16) | sprite_zoomtable[xzom * 2 + 1];
	258	yzoom = (sprite_zoomtable[yzom * 2] << 16) | sprite_zoomtable[yzom * 2 + 1];
241	259
242	260	boff *= 2;
243	261	if (xpos > 0x3ff) xpos -=0x800;
r6740	r6741
247	265
248	266	//if ((priority == 1) && (pri == 0)) break;
249	267
250		draw_sprite_new_zoomed(machine, wide, high, xpos, ypos, palt, boff, flip, spritebitmap, xzoom,xgrow, yzoom,ygrow, pri);
	268	draw_sprite_new_zoomed(machine, wide, high, xpos, ypos, palt, boff, flip, spritebitmap, xzoom, xgrow, yzoom, ygrow, pri);
251	269
252		pgm_sprite_source += 5;
	270	sprite_source += 5;
253	271	}
254	272	}
255	273
256	274	/* TX Layer */
257
258	275	WRITE16_HANDLER( pgm_tx_videoram_w )
259	276	{
260		pgm_tx_videoram[offset] = data;
261		tilemap_mark_tile_dirty(pgm_tx_tilemap,offset/2);
	277	pgm_state *state = (pgm_state *)space->machine->driver_data;
	278	state->tx_videoram[offset] = data;
	279	tilemap_mark_tile_dirty(state->tx_tilemap, offset / 2);
262	280	}
263	281
264	282	static TILE_GET_INFO( get_pgm_tx_tilemap_tile_info )
r6740	r6741
278	296	p = palette
279	297	f = flip
280	298	*/
281		int tileno,colour,flipyx; //,game;
	299	pgm_state *state = (pgm_state *)machine->driver_data;
	300	int tileno, colour, flipyx; //,game;
282	301
283		tileno = pgm_tx_videoram[tile_index *2] & 0xffff;
284		colour = (pgm_tx_videoram[tile_index*2+1] & 0x3e) >> 1;
285		flipyx = (pgm_tx_videoram[tile_index*2+1] & 0xc0) >> 6;
	302	tileno = state->tx_videoram[tile_index * 2] & 0xffff;
	303	colour = (state->tx_videoram[tile_index * 2 + 1] & 0x3e) >> 1;
	304	flipyx = (state->tx_videoram[tile_index * 2 + 1] & 0xc0) >> 6;
286	305
287	306	if (tileno > 0xbfff) { tileno -= 0xc000 ; tileno += 0x20000; } /* not sure about this */
288	307
r6740	r6741
293	312
294	313	WRITE16_HANDLER( pgm_bg_videoram_w )
295	314	{
296		pgm_bg_videoram[offset] = data;
297		tilemap_mark_tile_dirty(pgm_bg_tilemap,offset/2);
	315	pgm_state *state = (pgm_state *)space->machine->driver_data;
	316	state->bg_videoram[offset] = data;
	317	tilemap_mark_tile_dirty(state->bg_tilemap, offset / 2);
298	318	}
299	319
300	320	static TILE_GET_INFO( get_pgm_bg_tilemap_tile_info )
301	321	{
302	322	/* pretty much the same as tx layer */
303	323
304		int tileno,colour,flipyx;
	324	pgm_state *state = (pgm_state *)machine->driver_data;
	325	int tileno, colour, flipyx;
305	326
306		tileno = pgm_bg_videoram[tile_index *2] & 0xffff;
307		if (tileno > 0x7ff) tileno+=0x1000; /* Tiles 0x800+ come from the GAME Roms */
308		colour = (pgm_bg_videoram[tile_index*2+1] & 0x3e) >> 1;
309		flipyx = (pgm_bg_videoram[tile_index*2+1] & 0xc0) >> 6;
	327	tileno = state->bg_videoram[tile_index *2] & 0xffff;
	328	if (tileno > 0x7ff)
	329	tileno += 0x1000; /* Tiles 0x800+ come from the GAME Roms */
	330	colour = (state->bg_videoram[tile_index * 2 + 1] & 0x3e) >> 1;
	331	flipyx = (state->bg_videoram[tile_index * 2 + 1] & 0xc0) >> 6;
310	332
311	333	SET_TILE_INFO(1,tileno,colour,TILE_FLIPYX(flipyx));
312	334	}
r6740	r6741
317	339
318	340	VIDEO_START( pgm )
319	341	{
	342	pgm_state *state = (pgm_state *)machine->driver_data;
320	343	int i;
321	344
322		pgm_tx_tilemap= tilemap_create(machine, get_pgm_tx_tilemap_tile_info,tilemap_scan_rows, 8, 8,64,32);
323		tilemap_set_transparent_pen(pgm_tx_tilemap,15);
	345	state->tx_tilemap = tilemap_create(machine, get_pgm_tx_tilemap_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
	346	tilemap_set_transparent_pen(state->tx_tilemap, 15);
324	347
325		pgm_bg_tilemap = tilemap_create(machine, get_pgm_bg_tilemap_tile_info,tilemap_scan_rows, 32, 32,64,64);
326		tilemap_set_transparent_pen(pgm_bg_tilemap,31);
327		tilemap_set_scroll_rows(pgm_bg_tilemap,64*32);
	348	state->bg_tilemap = tilemap_create(machine, get_pgm_bg_tilemap_tile_info, tilemap_scan_rows, 32, 32, 64, 64);
	349	tilemap_set_transparent_pen(state->bg_tilemap, 31);
	350	tilemap_set_scroll_rows(state->bg_tilemap, 64 * 32);
328	351
329		tmppgmbitmap = auto_bitmap_alloc(machine,448,224,BITMAP_FORMAT_RGB32);
	352	state->tmppgmbitmap = auto_bitmap_alloc(machine, 448, 224, BITMAP_FORMAT_RGB32);
330	353
331		for (i=0; i < 0x1200/2; i++)
	354	for (i = 0; i < 0x1200 / 2; i++)
332	355	palette_set_color(machine, i, MAKE_RGB(0, 0, 0));
333	356
334		pgm_spritebufferram = auto_alloc_array(machine, UINT16, 0xa00/2);
	357	state->spritebufferram = auto_alloc_array(machine, UINT16, 0xa00/2);
335	358
336	359	/* we render each sprite to a bitmap then copy the bitmap to screen bitmap with zooming */
337	360	/* easier this way because of the funky sprite format */
338		sprite_temp_render = auto_alloc_array(machine, UINT16, 0x400*0x200);
	361	state->sprite_temp_render = auto_alloc_array(machine, UINT16, 0x400*0x200);
	362
	363	state_save_register_global_pointer(machine, state->spritebufferram, 0xa00/2);
	364	state_save_register_global_pointer(machine, state->sprite_temp_render, 0x400*0x200);
	365	state_save_register_global_bitmap(machine, state->tmppgmbitmap);
339	366	}
340	367
341	368	VIDEO_UPDATE( pgm )
342	369	{
	370	pgm_state *state = (pgm_state *)screen->machine->driver_data;
343	371	int y;
344	372
345		bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
346		bitmap_fill(tmppgmbitmap, cliprect, 0x00000000);
	373	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
	374	bitmap_fill(state->tmppgmbitmap, cliprect, 0x00000000);
347	375
	376	draw_sprites(screen->machine, state->tmppgmbitmap, state->spritebufferram);
348	377
349		pgm_sprite_source = pgm_spritebufferram;
350		draw_sprites(screen->machine, tmppgmbitmap);
	378	tilemap_set_scrolly(state->bg_tilemap,0, state->videoregs[0x2000/2]);
351	379
352		tilemap_set_scrolly(pgm_bg_tilemap,0, pgm_videoregs[0x2000/2]);
353
354	380	for (y = 0; y < 224; y++)
355		tilemap_set_scrollx(pgm_bg_tilemap,(y+pgm_videoregs[0x2000/2])&0x7ff, pgm_videoregs[0x3000/2]+pgm_rowscrollram[y]);
	381	tilemap_set_scrollx(state->bg_tilemap, (y + state->videoregs[0x2000 / 2]) & 0x7ff, state->videoregs[0x3000 / 2] + state->rowscrollram[y]);
356	382
357	383	{
358		int y,x;
	384	int y, x;
359	385
360		for (y=0;y<224;y++)
	386	for (y = 0; y < 224; y++)
361	387	{
362		UINT32* src = BITMAP_ADDR32(tmppgmbitmap, y, 0);
	388	UINT32* src = BITMAP_ADDR32(state->tmppgmbitmap, y, 0);
363	389	UINT16* dst = BITMAP_ADDR16(bitmap, y, 0);
364	390
365		for (x=0;x<448;x++)
	391	for (x = 0; x < 448; x++)
366	392	{
367		if (src[x]&0x10000)
368		if ((src[x]&0x8000)==0x8000)
369		dst[x] = src[x]&0x7fff;
	393	if (src[x] & 0x10000)
	394	if ((src[x] & 0x8000) == 0x8000)
	395	dst[x] = src[x] & 0x7fff;
370	396	}
371	397	}
372	398	}
373	399
374
375		tilemap_draw(bitmap,cliprect,pgm_bg_tilemap,0,0);
376
	400	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
377	401	{
378		int y,x;
	402	int y, x;
379	403
380		for (y=0;y<224;y++)
	404	for (y = 0; y < 224; y++)
381	405	{
382		UINT32* src = BITMAP_ADDR32(tmppgmbitmap, y, 0);
	406	UINT32* src = BITMAP_ADDR32(state->tmppgmbitmap, y, 0);
383	407	UINT16* dst = BITMAP_ADDR16(bitmap, y, 0);
384	408
385		for (x=0;x<448;x++)
	409	for (x = 0; x < 448; x++)
386	410	{
387		if (src[x]&0x10000)
388		if ((src[x]&0x8000)==0x0000)
	411	if (src[x] & 0x10000)
	412	if ((src[x] & 0x8000) == 0x0000)
389	413	dst[x] = src[x];
390	414	}
391	415	}
392	416	}
393	417
394		tilemap_set_scrolly(pgm_tx_tilemap,0, pgm_videoregs[0x5000/2]);
395		tilemap_set_scrollx(pgm_tx_tilemap,0, pgm_videoregs[0x6000/2]); // Check
396		tilemap_draw(bitmap,cliprect,pgm_tx_tilemap,0,0);
	418	tilemap_set_scrolly(state->tx_tilemap, 0, state->videoregs[0x5000/2]);
	419	tilemap_set_scrollx(state->tx_tilemap, 0, state->videoregs[0x6000/2]); // Check
	420	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
397	421	return 0;
398	422	}
399	423
400	424	VIDEO_EOF( pgm )
401	425	{
	426	pgm_state *state = (pgm_state *)machine->driver_data;
	427
402	428	/* first 0xa00 of main ram = sprites, seems to be buffered, DMA? */
403		memcpy(pgm_spritebufferram,pgm_mainram,0xa00);
	429	memcpy(state->spritebufferram, pgm_mainram, 0xa00);
404	430	}

src/mame/video/gameplan.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "machine/6522via.h"
11		#include "gameplan.h"
	11	#include "includes/gameplan.h"
12	12
13	13
14	14

src/mame/video/iqblock.c

r6740	r6741
1	1	#include "driver.h"
2		#include "iqblock.h"
	2	#include "includes/iqblock.h"
3	3
4	4
5	5	UINT8 *iqblock_bgvideoram;

src/mame/video/capbowl.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "video/tms34061.h"
9	9	#include "cpu/m6809/m6809.h"
10		#include "capbowl.h"
	10	#include "includes/capbowl.h"
11	11
12	12
13	13	/*************************************

src/mame/video/cbasebal.c

r6740	r6741
1	1	#include "driver.h"
	2	#include "includes/cbasebal.h"
2	3
3	4
4		static UINT8 *cbasebal_textram,*cbasebal_scrollram;
5		static tilemap *fg_tilemap,*bg_tilemap;
6		static int tilebank,spritebank;
7		static int text_on,bg_on,obj_on;
8		static int flipscreen;
9
10
11
12	5	/***************************************************************************
13	6
14	7	Callbacks for the TileMap code
r6740	r6741
17	10
18	11	static TILE_GET_INFO( get_bg_tile_info )
19	12	{
20		UINT8 attr = cbasebal_scrollram[2*tile_index+1];
	13	cbasebal_state *state = (cbasebal_state *)machine->driver_data;
	14	UINT8 attr = state->scrollram[2 * tile_index + 1];
21	15	SET_TILE_INFO(
22	16	1,
23		cbasebal_scrollram[2*tile_index] + ((attr & 0x07) << 8) + 0x800 * tilebank,
	17	state->scrollram[2 * tile_index] + ((attr & 0x07) << 8) + 0x800 * state->tilebank,
24	18	(attr & 0xf0) >> 4,
25	19	(attr & 0x08) ? TILE_FLIPX : 0);
26	20	}
27	21
28	22	static TILE_GET_INFO( get_fg_tile_info )
29	23	{
30		UINT8 attr = cbasebal_textram[tile_index+0x800];
	24	cbasebal_state *state = (cbasebal_state *)machine->driver_data;
	25	UINT8 attr = state->textram[tile_index + 0x800];
31	26	SET_TILE_INFO(
32	27	0,
33		cbasebal_textram[tile_index] + ((attr & 0xf0) << 4),
	28	state->textram[tile_index] + ((attr & 0xf0) << 4),
34	29	attr & 0x07,
35	30	(attr & 0x08) ? TILE_FLIPX : 0);
36	31	}
r6740	r6741
45	40
46	41	VIDEO_START( cbasebal )
47	42	{
48		cbasebal_textram = auto_alloc_array(machine, UINT8, 0x1000);
49		cbasebal_scrollram = auto_alloc_array(machine, UINT8, 0x1000);
	43	cbasebal_state *state = (cbasebal_state *)machine->driver_data;
50	44
51		bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan_rows,   16,16,64,32);
52		fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,64,32);
	45	state->textram = auto_alloc_array(machine, UINT8, 0x1000);
	46	state->scrollram = auto_alloc_array(machine, UINT8, 0x1000);
53	47
54		tilemap_set_transparent_pen(fg_tilemap,3);
	48	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 16, 16, 64, 32);
	49	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
	50
	51	tilemap_set_transparent_pen(state->fg_tilemap, 3);
	52
	53	state_save_register_global_pointer(machine, state->textram, 0x1000);
	54	state_save_register_global_pointer(machine, state->scrollram, 0x1000);
55	55	}
56	56
57	57
r6740	r6741
64	64
65	65	WRITE8_HANDLER( cbasebal_textram_w )
66	66	{
67		cbasebal_textram[offset] = data;
68		tilemap_mark_tile_dirty(fg_tilemap,offset & 0x7ff);
	67	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	68
	69	state->textram[offset] = data;
	70	tilemap_mark_tile_dirty(state->fg_tilemap, offset & 0x7ff);
69	71	}
70	72
71	73	READ8_HANDLER( cbasebal_textram_r )
72	74	{
73		return cbasebal_textram[offset];
	75	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	76	return state->textram[offset];
74	77	}
75	78
76	79	WRITE8_HANDLER( cbasebal_scrollram_w )
77	80	{
78		cbasebal_scrollram[offset] = data;
79		tilemap_mark_tile_dirty(bg_tilemap,offset/2);
	81	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	82
	83	state->scrollram[offset] = data;
	84	tilemap_mark_tile_dirty(state->bg_tilemap, offset / 2);
80	85	}
81	86
82	87	READ8_HANDLER( cbasebal_scrollram_r )
83	88	{
84		return cbasebal_scrollram[offset];
	89	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	90	return state->scrollram[offset];
85	91	}
86	92
87	93	WRITE8_HANDLER( cbasebal_gfxctrl_w )
88	94	{
	95	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	96
89	97	/* bit 0 is unknown - toggles continuously */
90	98
91	99	/* bit 1 is flip screen */
92		flipscreen = data & 0x02;
93		tilemap_set_flip_all(space->machine,flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	100	state->flipscreen = data & 0x02;
	101	tilemap_set_flip_all(space->machine, state->flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
94	102
95	103	/* bit 2 is unknown - unused? */
96	104
97	105	/* bit 3 is tile bank */
98		if (tilebank != ((data & 0x08) >> 3))
	106	if (state->tilebank != ((data & 0x08) >> 3))
99	107	{
100		tilebank = (data & 0x08) >> 3;
101		tilemap_mark_all_tiles_dirty(bg_tilemap);
	108	state->tilebank = (data & 0x08) >> 3;
	109	tilemap_mark_all_tiles_dirty(state->bg_tilemap);
102	110	}
103	111
104	112	/* bit 4 is sprite bank */
105		spritebank = (data & 0x10) >> 4;
	113	state->spritebank = (data & 0x10) >> 4;
106	114
107	115	/* bits 5 is text enable */
108		text_on = ~data & 0x20;
	116	state->text_on = ~data & 0x20;
109	117
110	118	/* bits 6-7 are bg/sprite enable (don't know which is which) */
111		bg_on = ~data & 0x40;
112		obj_on = ~data & 0x80;
	119	state->bg_on = ~data & 0x40;
	120	state->obj_on = ~data & 0x80;
113	121
114	122	/* other bits unknown, but used */
115	123	}
116	124
117	125	WRITE8_HANDLER( cbasebal_scrollx_w )
118	126	{
119		static UINT8 scroll[2];
120
121		scroll[offset] = data;
122		tilemap_set_scrollx(bg_tilemap,0,scroll[0] + 256 * scroll[1]);
	127	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	128	state->scroll_x[offset] = data;
	129	tilemap_set_scrollx(state->bg_tilemap, 0, state->scroll_x[0] + 256 * state->scroll_x[1]);
123	130	}
124	131
125	132	WRITE8_HANDLER( cbasebal_scrolly_w )
126	133	{
127		static UINT8 scroll[2];
128
129		scroll[offset] = data;
130		tilemap_set_scrolly(bg_tilemap,0,scroll[0] + 256 * scroll[1]);
	134	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	135	state->scroll_y[offset] = data;
	136	tilemap_set_scrolly(state->bg_tilemap, 0, state->scroll_y[0] + 256 * state->scroll_y[1]);
131	137	}
132	138
133	139
r6740	r6741
138	144
139	145	***************************************************************************/
140	146
141		static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
	147	static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
142	148	{
143		UINT8 *spriteram = machine->generic.spriteram.u8;
144		int offs,sx,sy;
	149	cbasebal_state *state = (cbasebal_state *)machine->driver_data;
	150	UINT8 *spriteram = state->spriteram;
	151	int offs, sx, sy;
145	152
146	153	/* the last entry is not a sprite, we skip it otherwise spang shows a bubble */
147	154	/* moving diagonally across the screen */
148		for (offs = machine->generic.spriteram_size-8;offs >= 0;offs -= 4)
	155	for (offs = state->spriteram_size - 8; offs >= 0; offs -= 4)
149	156	{
150	157	int code = spriteram[offs];
151		int attr = spriteram[offs+1];
	158	int attr = spriteram[offs + 1];
152	159	int color = attr & 0x07;
153	160	int flipx = attr & 0x08;
154		sx = spriteram[offs+3] + ((attr & 0x10) << 4);
155		sy = ((spriteram[offs+2] + 8) & 0xff) - 8;
	161	sx = spriteram[offs + 3] + ((attr & 0x10) << 4);
	162	sy = ((spriteram[offs + 2] + 8) & 0xff) - 8;
156	163	code += (attr & 0xe0) << 3;
157		code += spritebank * 0x800;
	164	code += state->spritebank * 0x800;
158	165
159		if (flipscreen)
	166	if (state->flipscreen)
160	167	{
161	168	sx = 496 - sx;
162	169	sy = 240 - sy;
r6740	r6741
166	173	drawgfx_transpen(bitmap,cliprect,machine->gfx[2],
167	174	code,
168	175	color,
169		flipx,flipscreen,
	176	flipx,state->flipscreen,
170	177	sx,sy,15);
171	178	}
172	179	}
173	180
174	181	VIDEO_UPDATE( cbasebal )
175	182	{
176		if (bg_on)
177		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
	183	cbasebal_state *state = (cbasebal_state *)screen->machine->driver_data;
	184
	185	if (state->bg_on)
	186	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
178	187	else
179		bitmap_fill(bitmap,cliprect,768);
	188	bitmap_fill(bitmap, cliprect, 768);
180	189
181		if (obj_on)
182		draw_sprites(screen->machine, bitmap,cliprect);
	190	if (state->obj_on)
	191	draw_sprites(screen->machine, bitmap, cliprect);
183	192
184		if (text_on)
185		tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
	193	if (state->text_on)
	194	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
186	195	return 0;
187	196	}

src/mame/video/st0016.c

r6740	r6741
4	4	************************************/
5	5
6	6	#include "driver.h"
7		#include "st0016.h"
	7	#include "includes/st0016.h"
8	8
9	9	UINT8 *st0016_charram;
10	10	static UINT8 *st0016_spriteram,*st0016_paletteram;

src/mame/video/beathead.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "beathead.h"
	8	#include "includes/beathead.h"
9	9
10	10
11	11
12	12	/*************************************
13	13	*
14		*  Statics
15		*
16		*************************************/
17
18		static UINT32            finescroll;
19		static offs_t            vram_latch_offset;
20
21		static offs_t            hsyncram_offset;
22		static offs_t            hsyncram_start;
23		static UINT8 *            hsyncram;
24
25
26
27		/*************************************
28		*
29	14	*  Video start/stop
30	15	*
31	16	*************************************/
32	17
33	18	VIDEO_START( beathead )
34	19	{
35		hsyncram = auto_alloc_array(machine, UINT8, 0x800);
	20	beathead_state *state = (beathead_state *)machine->driver_data;
	21	state_save_register_global(machine, state->finescroll);
	22	state_save_register_global(machine, state->vram_latch_offset);
	23	state_save_register_global(machine, state->hsyncram_offset);
	24	state_save_register_global(machine, state->hsyncram_start);
	25	state_save_register_global_array(machine, state->hsyncram);
36	26	}
37	27
38	28
r6740	r6741
77	67	WRITE32_HANDLER( beathead_vram_latch_w )
78	68	{
79	69	/* latch the address */
80		vram_latch_offset = (4 * offset) & 0x7ffff;
	70	beathead_state *state = (beathead_state *)space->machine->driver_data;
	71	state->vram_latch_offset = (4 * offset) & 0x7ffff;
81	72	}
82	73
83	74
84	75	WRITE32_HANDLER( beathead_vram_copy_w )
85	76	{
86	77	/* copy from VRAM to VRAM, for 1024 bytes */
	78	beathead_state *state = (beathead_state *)space->machine->driver_data;
87	79	offs_t dest_offset = (4 * offset) & 0x7ffff;
88		memcpy(&space->machine->generic.videoram.u32[dest_offset / 4], &space->machine->generic.videoram.u32[vram_latch_offset / 4], 0x400);
	80	memcpy(&space->machine->generic.videoram.u32[dest_offset / 4], &space->machine->generic.videoram.u32[state->vram_latch_offset / 4], 0x400);
89	81	}
90	82
91	83
r6740	r6741
98	90
99	91	WRITE32_HANDLER( beathead_finescroll_w )
100	92	{
101		UINT32 oldword = finescroll;
102		UINT32 newword = COMBINE_DATA(&finescroll);
	93	beathead_state *state = (beathead_state *)space->machine->driver_data;
	94	UINT32 oldword = state->finescroll;
	95	UINT32 newword = COMBINE_DATA(&state->finescroll);
103	96
104	97	/* if VBLANK is going off on a scanline other than the last, suspend time */
105	98	if ((oldword & 8) && !(newword & 8) && video_screen_get_vpos(space->machine->primary_screen) != 261)
r6740	r6741
136	129
137	130	READ32_HANDLER( beathead_hsync_ram_r )
138	131	{
	132	beathead_state *state = (beathead_state *)space->machine->driver_data;
	133
139	134	/* offset 0 is probably write-only */
140	135	if (offset == 0)
141	136	logerror("%08X:Unexpected HSYNC RAM read at offset 0\n", cpu_get_previouspc(space->cpu));
142	137
143	138	/* offset 1 reads the data */
144	139	else
145		return hsyncram[hsyncram_offset];
	140	return state->hsyncram[state->hsyncram_offset];
146	141
147	142	return 0;
148	143	}
149	144
150	145	WRITE32_HANDLER( beathead_hsync_ram_w )
151	146	{
	147	beathead_state *state = (beathead_state *)space->machine->driver_data;
	148
152	149	/* offset 0 selects the address, and can specify the start address */
153	150	if (offset == 0)
154	151	{
155		COMBINE_DATA(&hsyncram_offset);
156		if (hsyncram_offset & 0x800)
157		hsyncram_start = hsyncram_offset & 0x7ff;
	152	COMBINE_DATA(&state->hsyncram_offset);
	153	if (state->hsyncram_offset & 0x800)
	154	state->hsyncram_start = state->hsyncram_offset & 0x7ff;
158	155	}
159	156
160	157	/* offset 1 writes the data */
161	158	else
162		COMBINE_DATA(&hsyncram[hsyncram_offset]);
	159	COMBINE_DATA(&state->hsyncram[state->hsyncram_offset]);
163	160	}
164	161
165	162
r6740	r6741
183	180	UINT16 scanline[336];
184	181
185	182	/* blanking */
186		if (finescroll & 8)
	183	if (state->finescroll & 8)
187	184	for (x = cliprect->min_x; x <= cliprect->max_x; x++)
188	185	scanline[x] = pen_base;
189	186
190	187	/* non-blanking */
191	188	else
192	189	{
193		offs_t scanline_offset = vram_latch_offset + (finescroll & 3);
	190	offs_t scanline_offset = state->vram_latch_offset + (state->finescroll & 3);
194	191	offs_t src = scanline_offset + cliprect->min_x;
195	192
196	193	/* unswizzle the scanline first */

src/mame/video/cchasm.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "video/vector.h"
9		#include "cchasm.h"
	9	#include "includes/cchasm.h"
10	10
11	11	#define HALT   0
12	12	#define JUMP   1

src/mame/video/funkyjet.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "deco16ic.h"
	8	#include "includes/deco16ic.h"
9	9
10	10	/******************************************************************************/
11	11

src/mame/video/xexex.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4	static int sprite_colorbase;
5	5	static int layer_colorbase[4], layerpri[4];
r6740	r6741
10	10	cur_alpha = on;
11	11	}
12	12
13		static void xexex_sprite_callback(int *code, int *color, int *priority_mask)
	13	void xexex_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask)
14	14	{
15	15	int pri, c = *color;
16	16
r6740	r6741
27	27	*color = sprite_colorbase | (c & 0x001f);
28	28	}
29	29
30		static void xexex_tile_callback(int layer, int *code, int *color, int *flags)
	30	void xexex_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags)
31	31	{
32	32	*color = layer_colorbase[layer] | (*color>>2 & 0x0f);
33	33	}
34	34
35	35	VIDEO_START( xexex )
36	36	{
37		const char * region = "gfx3";
	37	const device_config *k056832 = devtag_get_device(machine, "k056832");
38	38
39	39	assert(video_screen_get_format(machine->primary_screen) == BITMAP_FORMAT_RGB32);
40	40
41	41	cur_alpha = 0;
42	42
43		K053251_vh_start(machine);
44		K054338_vh_start(machine);
45		K053250_vh_start(machine, 1, &region);
46
47		K056832_vh_start(machine, "gfx1", K056832_BPP_4, 1, NULL, xexex_tile_callback, 0);
48		K053247_vh_start(machine, "gfx2", -48, 32, NORMAL_PLANE_ORDER, xexex_sprite_callback);
49
50	43	// Xexex has relative plane offsets of -2,2,4,6 vs. -2,0,2,3 in MW and GX.
51		K056832_set_LayerOffset(0, -2, 16);
52		K056832_set_LayerOffset(1,  2, 16);
53		K056832_set_LayerOffset(2,  4, 16);
54		K056832_set_LayerOffset(3,  6, 16);
55
56		K053250_set_LayerOffset(0, -5,-16);
57
58		K054338_invert_alpha(0);
	44	k056832_set_layer_offs(k056832, 0, -2, 16);
	45	k056832_set_layer_offs(k056832, 1,  2, 16);
	46	k056832_set_layer_offs(k056832, 2,  4, 16);
	47	k056832_set_layer_offs(k056832, 3,  6, 16);
59	48	}
60	49
61	50	/* useful function to sort the four tile layers by priority order */
r6740	r6741
81	70	VIDEO_UPDATE( xexex )
82	71	{
83	72	static const int K053251_CI[4] = { K053251_CI1, K053251_CI2, K053251_CI3, K053251_CI4 };
	73	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
	74	const device_config *k053246 = devtag_get_device(screen->machine, "k053246");
	75	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	76	const device_config *k053250 = devtag_get_device(screen->machine, "k053250");
	77	const device_config *k054338 = devtag_get_device(screen->machine, "k054338");
84	78	int layer[4];
85	79	int bg_colorbase, new_colorbase, plane, alpha;
86	80
87		sprite_colorbase   = K053251_get_palette_index(K053251_CI0);
88		bg_colorbase       = K053251_get_palette_index(K053251_CI1);
	81	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI0);
	82	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI1);
89	83	layer_colorbase[0] = 0x70;
90	84
91		for (plane=1; plane<4; plane++)
	85	for (plane = 1; plane < 4; plane++)
92	86	{
93		new_colorbase = K053251_get_palette_index(K053251_CI[plane]);
	87	new_colorbase = k053251_get_palette_index(k053251, K053251_CI[plane]);
94	88	if (layer_colorbase[plane] != new_colorbase)
95	89	{
96	90	layer_colorbase[plane] = new_colorbase;
97		K056832_mark_plane_dirty(plane);
	91	k056832_mark_plane_dirty(k056832, plane);
98	92	}
99	93	}
100	94
101	95	layer[0] = 1;
102		layerpri[0] = K053251_get_priority(K053251_CI2);
	96	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
103	97	layer[1] = 2;
104		layerpri[1] = K053251_get_priority(K053251_CI3);
	98	layerpri[1] = k053251_get_priority(k053251, K053251_CI3);
105	99	layer[2] = 3;
106		layerpri[2] = K053251_get_priority(K053251_CI4);
	100	layerpri[2] = k053251_get_priority(k053251, K053251_CI4);
107	101	layer[3] = -1;
108		layerpri[3] = K053251_get_priority(K053251_CI1);
	102	layerpri[3] = k053251_get_priority(k053251, K053251_CI1);
109	103
110	104	sortlayers(layer, layerpri);
111	105
112		K054338_update_all_shadows(screen->machine, 0);
113		K054338_fill_backcolor(screen->machine, bitmap, 0);
	106	k054338_update_all_shadows(k054338, 0);
	107	k054338_fill_backcolor(k054338, bitmap, 0);
114	108
115	109	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
116	110
r6740	r6741
118	112	{
119	113	if (layer[plane] < 0)
120	114	{
121		K053250_draw(screen->machine, bitmap, cliprect, 0, bg_colorbase, 0, 1<<plane);
	115	k053250_draw(k053250, bitmap, cliprect, bg_colorbase, 0, 1 << plane);
122	116	}
123	117	else if (!cur_alpha || layer[plane] != 1)
124	118	{
125		K056832_tilemap_draw(screen->machine, bitmap, cliprect, layer[plane], 0, 1<<plane);
	119	k056832_tilemap_draw(k056832, bitmap, cliprect, layer[plane], 0, 1 << plane);
126	120	}
127	121	}
128	122
129		K053247_sprites_draw(screen->machine, bitmap, cliprect);
	123	k053247_sprites_draw(k053246, bitmap, cliprect);
130	124
131	125	if (cur_alpha)
132	126	{
133		alpha = K054338_set_alpha_level(1);
	127	alpha = k054338_set_alpha_level(k054338, 1);
134	128
135	129	if (alpha > 0)
136	130	{
137		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 1, TILEMAP_DRAW_ALPHA(alpha), 0);
	131	k056832_tilemap_draw(k056832, bitmap, cliprect, 1, TILEMAP_DRAW_ALPHA(alpha), 0);
138	132	}
139	133	}
140	134
141		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 0, 0, 0);
	135	k056832_tilemap_draw(k056832, bitmap, cliprect, 0, 0, 0);
142	136	return 0;
143	137	}

src/mame/video/qix.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "video/mc6845.h"
11		#include "qix.h"
	11	#include "includes/qix.h"
12	12	#include "cpu/m6809/m6809.h"
13	13
14	14

src/mame/video/battlex.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "battlex.h"
	8	#include "includes/battlex.h"
9	9
10	10	PALETTE_INIT( battlex )
11	11	{

src/mame/video/epos.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "epos.h"
	8	#include "includes/epos.h"
9	9
10	10	/***************************************************************************
11	11

src/mame/video/snes.c

r6740	r6741
1357	1357
1358	1358	#define SNES_DBG_HORZ_POS 545
1359	1359
1360		printf( "snes_dbg_video: %d\n", curline );
1361	1360	/* Check if the user has enabled or disabled stuff */
1362	1361	if( curline == 0 )
1363	1362	{
r6740	r6741
1367	1366	if( !debug_options.input_count-- )
1368	1367	{
1369	1368	UINT8 toggles = input_port_read_safe(machine, "DEBUG2", 0);
1370		printf( "Checking\n" );
1371		if(toggles)
1372		{
1373		printf( "%02x\n", toggles );
1374		}
1375	1369	if( toggles & 0x1 )
1376	1370	debug_options.bg_disabled[0] = !debug_options.bg_disabled[0];
1377	1371	if( toggles & 0x2 )

src/mame/video/cinemat.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "video/vector.h"
9	9	#include "cpu/ccpu/ccpu.h"
10		#include "cinemat.h"
	10	#include "includes/cinemat.h"
11	11
12	12
13	13	/*************************************

src/mame/video/gaelco.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "gaelco.h"
	10	#include "includes/gaelco.h"
11	11
12	12	/***************************************************************************
13	13

src/mame/video/wecleman.c

r6740	r6741
8	8	***************************************************************************/
9	9
10	10	#include "driver.h"
11		#include "video/konamiic.h"
	11	#include "video/konicdev.h"
12	12
13	13	#define BMP_PAD      8
14	14	#define BLEND_STEPS   16
r6740	r6741
983	983	}
984	984
985	985	//  Callbacks for the K051316
986		#define ZOOMROM0_MEM_REGION "gfx2"
987		#define ZOOMROM1_MEM_REGION "gfx3"
988	986
989		static void zoom_callback_0(int *code,int *color,int *flags)
	987	void hotchase_zoom_callback_0(running_machine *machine, int *code,int *color,int *flags)
990	988	{
991	989	*code |= (*color & 0x03) << 8;
992	990	*color = (*color & 0xfc) >> 2;
993	991	}
994	992
995		static void zoom_callback_1(int *code,int *color,int *flags)
	993	void hotchase_zoom_callback_1(running_machine *machine, int *code,int *color,int *flags)
996	994	{
997	995	*code |= (*color & 0x01) << 8;
998	996	*color = ((*color & 0x3f) << 1) | ((*code & 0x80) >> 7);
r6740	r6741
1025	1023	spr_ptr_list = (struct sprite **)buffer;
1026	1024
1027	1025	sprite_list = auto_alloc_array_clear(machine, struct sprite, NUM_SPRITES);
1028
1029		K051316_vh_start_0(machine,ZOOMROM0_MEM_REGION,4,FALSE,0,zoom_callback_0);
1030		K051316_vh_start_1(machine,ZOOMROM1_MEM_REGION,4,FALSE,0,zoom_callback_1);
1031
1032		K051316_wraparound_enable(0,1);
1033		//  K051316_wraparound_enable(1,1);
1034		K051316_set_offset(0, -0xB0/2, -16);
1035		K051316_set_offset(1, -0xB0/2, -16);
1036	1026	}
1037	1027
1038	1028
r6740	r6741
1135	1125
1136	1126	VIDEO_UPDATE( hotchase )
1137	1127	{
	1128	const device_config *k051316_1 = devtag_get_device(screen->machine, "k051316_1");
	1129	const device_config *k051316_2 = devtag_get_device(screen->machine, "k051316_2");
1138	1130	int video_on;
1139	1131
1140	1132	video_on = wecleman_irqctrl & 0x40;
r6740	r6741
1146	1138	bitmap_fill(bitmap, cliprect, black_pen);
1147	1139
1148	1140	/* Draw the background */
1149		if (video_on) K051316_zoom_draw_0(bitmap,cliprect, 0, 0);
	1141	if (video_on)
	1142	k051316_zoom_draw(k051316_1, bitmap, cliprect, 0, 0);
1150	1143
1151	1144	/* Draw the road */
1152		if (video_on) hotchase_draw_road(screen->machine, bitmap, cliprect);
	1145	if (video_on)
	1146	hotchase_draw_road(screen->machine, bitmap, cliprect);
1153	1147
1154	1148	/* Draw the sprites */
1155		if (video_on) sprite_draw(bitmap,cliprect);
	1149	if (video_on)
	1150	sprite_draw(bitmap,cliprect);
1156	1151
1157	1152	/* Draw the foreground (text) */
1158		if (video_on) K051316_zoom_draw_1(bitmap,cliprect, 0, 0);
	1153	if (video_on)
	1154	k051316_zoom_draw(k051316_2, bitmap, cliprect, 0, 0);
1159	1155	return 0;
1160	1156	}

src/mame/video/tankbust.c

r6740	r6741
8	8	*   variables
9	9	*/
10	10
	11	UINT8 * tankbust_videoram;
	12	UINT8 * tankbust_colorram;
11	13	static tilemap *bg_tilemap;
	14
12	15	static tilemap *txt_tilemap;
13	16	UINT8 * tankbust_txtram;
14	17
r6740	r6741
34	37
35	38	static TILE_GET_INFO( get_bg_tile_info )
36	39	{
37		int code = machine->generic.videoram.u8[tile_index];
38		int attr = machine->generic.colorram.u8[tile_index];
	40	int code = tankbust_videoram[tile_index];
	41	int attr = tankbust_colorram[tile_index];
39	42
40	43	int color = ((attr>>4) & 0x07);
41	44
r6740	r6741
101	104
102	105	WRITE8_HANDLER( tankbust_background_videoram_w )
103	106	{
104		space->machine->generic.videoram.u8[offset] = data;
	107	tankbust_videoram[offset] = data;
105	108	tilemap_mark_tile_dirty(bg_tilemap, offset);
106	109	}
107	110	READ8_HANDLER( tankbust_background_videoram_r )
108	111	{
109		return space->machine->generic.videoram.u8[offset];
	112	return tankbust_videoram[offset];
110	113	}
111	114
112	115	WRITE8_HANDLER( tankbust_background_colorram_w )
113	116	{
114		space->machine->generic.colorram.u8[offset] = data;
	117	tankbust_colorram[offset] = data;
115	118	tilemap_mark_tile_dirty(bg_tilemap, offset);
116	119	}
117	120	READ8_HANDLER( tankbust_background_colorram_r )
118	121	{
119		return space->machine->generic.colorram.u8[offset];
	122	return tankbust_colorram[offset];
120	123	}
121	124
122	125	WRITE8_HANDLER( tankbust_txtram_w )
r6740	r6741
235	238
236	239	for (i=0; i<0x800; i++)
237	240	{
238		int tile_attrib = screen->machine->generic.colorram.u8[i];
	241	int tile_attrib = tankbust_colorram[i];
239	242
240	243	if ( (tile_attrib&8) || (tile_attrib&0x80) )
241	244	{

src/mame/video/bankp.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "bankp.h"
	10	#include "includes/bankp.h"
11	11
12	12
13	13	/***************************************************************************

src/mame/video/pastelg.c

r6740	r6741
7	7	******************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "nb1413m3.h"
	10	#include "includes/nb1413m3.h"
11	11
12	12
13	13	static int blitter_destx, blitter_desty;

src/mame/video/funkybee.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "funkybee.h"
	10	#include "includes/funkybee.h"
11	11
12	12	PALETTE_INIT( funkybee )
13	13	{

src/mame/video/btoads.c

r6740	r6741
9	9	#include "driver.h"
10	10	#include "cpu/tms34010/tms34010.h"
11	11	#include "video/tlc34076.h"
12		#include "btoads.h"
	12	#include "includes/btoads.h"
13	13
14	14
15	15	#define BT_DEBUG 0

src/mame/video/starfire.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "starfire.h"
	8	#include "includes/starfire.h"
9	9
10	10
11	11	#define   NUM_PENS   (0x40)

src/mame/video/freekick.c

r6740	r6741
1	1	/* Free Kick Video Hardware */
2	2
3	3	#include "driver.h"
4		#include "freekick.h"
	4	#include "includes/freekick.h"
5	5
6	6
7	7	static TILE_GET_INFO( get_freek_tile_info )

src/mame/video/cischeat.c

r6740	r6741
54	54	***************************************************************************/
55	55
56	56	#include "driver.h"
57		#include "megasys1.h"
	57	#include "includes/megasys1.h"
58	58	#include "includes/cischeat.h"
59	59
60	60	/* Variables only used here: */

src/mame/video/namcos22.c

r6740	r6741
36	36	#include "driver.h"
37	37	#include "eminline.h"
38	38	#include "video/rgbutil.h"
39		#include "namcos22.h"
	39	#include "includes/namcos22.h"
40	40	#include "video/poly.h"
41	41
42	42	// uncomment this line to render everything as quads
r6740	r6741
837	837	}
838	838	else
839	839	{
840		#define SCENE_NODE_POOL_SIZE 64
841		struct SceneNode *pSceneNodePool = auto_alloc_array(machine, struct SceneNode, SCENE_NODE_POOL_SIZE);
842		{
843		int i;
844		for( i=0; i<SCENE_NODE_POOL_SIZE; i++ )
845		{
846		FreeSceneNode( &pSceneNodePool[i] );
847		}
848		return MallocSceneNode(machine);
849		}
	840	node = alloc_or_die(struct SceneNode);
850	841	}
851	842	memset( node, 0, sizeof(*node) );
852	843	return node;
r6740	r6741
2208	2199
2209	2200	static void namcos22_exit(running_machine *machine)
2210	2201	{
	2202	while (mpFreeSceneNode != NULL)
	2203	{
	2204	struct SceneNode *node = mpFreeSceneNode;
	2205	mpFreeSceneNode = node->nextInBucket;
	2206	free(node);
	2207	}
	2208
2211	2209	poly_free(poly);
2212	2210	}
2213	2211

src/mame/video/centiped.c

r6740	r6741
5	5	*************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "centiped.h"
	8	#include "includes/centiped.h"
9	9
10	10
11	11	static tilemap *bg_tilemap;

src/mame/video/atarisy1.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "atarisy1.h"
	8	#include "includes/atarisy1.h"
9	9
10	10
11	11
r6740	r6741
82	82	static void update_timers(running_machine *machine, int scanline);
83	83	static void decode_gfx(running_machine *machine, UINT16 *pflookup, UINT16 *molookup);
84	84	static int get_bank(running_machine *machine, UINT8 prom1, UINT8 prom2, int bpp);
85		static TIMER_CALLBACK( int3_callback );
86		static TIMER_CALLBACK( int3off_callback );
87		static TIMER_CALLBACK( reset_yscroll_callback );
88	85
89	86
90	87
r6740	r6741
199	196	/* reset the statics */
200	197	atarimo_set_yscroll(0, 256);
201	198	state->next_timer_scanline = -1;
202		state->scanline_timer = timer_alloc(machine, int3_callback, NULL);
203		state->int3off_timer = timer_alloc(machine, int3off_callback, NULL);
204		state->yscroll_reset_timer = timer_alloc(machine, reset_yscroll_callback, NULL);
	199	state->scanline_timer = devtag_get_device(machine, "scan_timer");
	200	state->int3off_timer = devtag_get_device(machine, "int3off_timer");
	201	state->yscroll_reset_timer = devtag_get_device(machine, "yreset_timer");
	202
	203	/* save state */
	204	state_save_register_global(machine, state->playfield_tile_bank);
	205	state_save_register_global(machine, state->playfield_priority_pens);
	206	state_save_register_global(machine, state->next_timer_scanline);
205	207	}
206	208
207	209
r6740	r6741
304	306	*
305	307	*************************************/
306	308
307		static TIMER_CALLBACK( reset_yscroll_callback )
	309	TIMER_DEVICE_CALLBACK( atarisy1_reset_yscroll_callback )
308	310	{
309		atarisy1_state *state = (atarisy1_state *)machine->driver_data;
	311	atarisy1_state *state = (atarisy1_state *)timer->machine->driver_data;
310	312	tilemap_set_scrolly(state->atarigen.playfield_tilemap, 0, param);
311	313	}
312	314
r6740	r6741
332	334
333	335	/* but since we've adjusted it, we must reset it to the normal value
334	336	once we hit scanline 0 again */
335		timer_adjust_oneshot(state->yscroll_reset_timer, video_screen_get_time_until_pos(space->machine->primary_screen, 0, 0), newscroll);
	337	timer_device_adjust_oneshot(state->yscroll_reset_timer, video_screen_get_time_until_pos(space->machine->primary_screen, 0, 0), newscroll);
336	338
337	339	/* update the data */
338	340	*state->atarigen.yscroll = newscroll;
r6740	r6741
385	387	*
386	388	*************************************/
387	389
388		static TIMER_CALLBACK( int3off_callback )
	390	TIMER_DEVICE_CALLBACK( atarisy1_int3off_callback )
389	391	{
390		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	392	const address_space *space = cputag_get_address_space(timer->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
391	393
392	394	/* clear the state */
393	395	atarigen_scanline_int_ack_w(space, 0, 0, 0xffff);
394	396	}
395	397
396	398
397		static TIMER_CALLBACK( int3_callback )
	399	TIMER_DEVICE_CALLBACK( atarisy1_int3_callback )
398	400	{
399		atarisy1_state *state = (atarisy1_state *)machine->driver_data;
	401	atarisy1_state *state = (atarisy1_state *)timer->machine->driver_data;
400	402	int scanline = param;
401	403
402	404	/* update the state */
403		atarigen_scanline_int_gen(cputag_get_cpu(machine, "maincpu"));
	405	atarigen_scanline_int_gen(cputag_get_cpu(timer->machine, "maincpu"));
404	406
405	407	/* set a timer to turn it off */
406		timer_adjust_oneshot(state->int3off_timer, video_screen_get_scan_period(machine->primary_screen), 0);
	408	timer_device_adjust_oneshot(state->int3off_timer, video_screen_get_scan_period(timer->machine->primary_screen), 0);
407	409
408	410	/* determine the time of the next one */
409	411	state->next_timer_scanline = -1;
410		update_timers(machine, scanline);
	412	update_timers(timer->machine, scanline);
411	413	}
412	414
413	415
r6740	r6741
484	486
485	487	/* set a new one */
486	488	if (best != -1)
487		timer_adjust_oneshot(state->scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, best, 0), best);
	489	timer_device_adjust_oneshot(state->scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, best, 0), best);
488	490	else
489		timer_adjust_oneshot(state->scanline_timer, attotime_never, 0);
	491	timer_device_adjust_oneshot(state->scanline_timer, attotime_never, 0);
490	492	}
491	493	}
492	494

src/mame/video/ssv.c

r6740	r6741
136	136	***************************************************************************/
137	137
138	138	#include "driver.h"
139		#include "seta.h"
	139	#include "includes/seta.h"
140	140	#ifdef MAME_DEBUG
141	141	#include "ui.h"
142	142	#endif

src/mame/video/atarig42.c

r6740	r6741
21	21
22	22	#include "driver.h"
23	23	#include "machine/atarigen.h"
24		#include "atarig42.h"
	24	#include "includes/atarig42.h"
25	25
26	26
27	27
28	28	/*************************************
29	29	*
30		*  Statics
31		*
32		*************************************/
33
34
35
36		/*************************************
37		*
38	30	*  Tilemap callbacks
39	31	*
40	32	*************************************/
r6740	r6741
116	108	/* initialize the alphanumerics */
117	109	state->atarigen.alpha_tilemap = tilemap_create(machine, get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
118	110	tilemap_set_transparent_pen(state->atarigen.alpha_tilemap, 0);
	111
	112	/* save states */
	113	state_save_register_global(machine, state->current_control);
	114	state_save_register_global(machine, state->playfield_tile_bank);
	115	state_save_register_global(machine, state->playfield_color_bank);
	116	state_save_register_global(machine, state->playfield_xscroll);
	117	state_save_register_global(machine, state->playfield_yscroll);
119	118	}
120	119
121	120

src/mame/video/tceptor.c

r6740	r6741
4	4	*/
5	5
6	6	#include "driver.h"
7		#include "namcoic.h"
	7	#include "includes/namcoic.h"
8	8
9	9	#define TX_TILE_OFFSET_CENTER   (32 * 2)
10	10	#define TX_TILE_OFFSET_RIGHT   (32 * 0 + 2)

src/mame/video/vindictr.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "vindictr.h"
9		#include "thunderj.h"
	8	#include "includes/vindictr.h"
	9	#include "includes/thunderj.h"
10	10
11	11
12	12
r6740	r6741
93	93	/* initialize the alphanumerics */
94	94	state->atarigen.alpha_tilemap = tilemap_create(machine, get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
95	95	tilemap_set_transparent_pen(state->atarigen.alpha_tilemap, 0);
	96
	97	/* save states */
	98	state_save_register_global(machine, state->playfield_tile_bank);
	99	state_save_register_global(machine, state->playfield_xscroll);
	100	state_save_register_global(machine, state->playfield_yscroll);
96	101	}
97	102
98	103

src/mame/video/cop01.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "cop01.h"
	10	#include "includes/cop01.h"
11	11
12	12
13	13	PALETTE_INIT( cop01 )

src/mame/video/metro.c

r6740	r6741
52	52	***************************************************************************/
53	53
54	54	#include "driver.h"
55		#include "video/konamiic.h"
	55	#include "video/konicdev.h"
56	56
57	57	/* Variables that driver has access to: */
58	58
r6740	r6741
419	419	tilemap_16x16[1] = NULL;
420	420	tilemap_16x16[2] = NULL;
421	421
422		tilemap_map_pen_to_layer(bg_tilemap[0], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
423		tilemap_map_pen_to_layer(bg_tilemap[0], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	422	tilemap_map_pen_to_layer(bg_tilemap[0], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	423	tilemap_map_pen_to_layer(bg_tilemap[0], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
424	424
425		tilemap_map_pen_to_layer(bg_tilemap[1], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
426		tilemap_map_pen_to_layer(bg_tilemap[1], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	425	tilemap_map_pen_to_layer(bg_tilemap[1], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	426	tilemap_map_pen_to_layer(bg_tilemap[1], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
427	427
428		tilemap_map_pen_to_layer(bg_tilemap[2], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
429		tilemap_map_pen_to_layer(bg_tilemap[2], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	428	tilemap_map_pen_to_layer(bg_tilemap[2], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	429	tilemap_map_pen_to_layer(bg_tilemap[2], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
430	430
431	431	}
432	432
r6740	r6741
448	448	tilemap_16x16[1] = NULL;
449	449	tilemap_16x16[2] = NULL;
450	450
451		tilemap_map_pen_to_layer(bg_tilemap[0], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
452		tilemap_map_pen_to_layer(bg_tilemap[0], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	451	tilemap_map_pen_to_layer(bg_tilemap[0], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	452	tilemap_map_pen_to_layer(bg_tilemap[0], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
453	453
454		tilemap_map_pen_to_layer(bg_tilemap[1], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
455		tilemap_map_pen_to_layer(bg_tilemap[1], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	454	tilemap_map_pen_to_layer(bg_tilemap[1], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	455	tilemap_map_pen_to_layer(bg_tilemap[1], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
456	456
457		tilemap_map_pen_to_layer(bg_tilemap[2], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
458		tilemap_map_pen_to_layer(bg_tilemap[2], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	457	tilemap_map_pen_to_layer(bg_tilemap[2], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	458	tilemap_map_pen_to_layer(bg_tilemap[2], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
459	459
460	460	tilemap_set_scrolldx(bg_tilemap[0], -2, 2);
461	461	tilemap_set_scrolldx(bg_tilemap[1], -2, 2);
r6740	r6741
480	480	tilemap_16x16[1] = tilemap_create(machine, get_tile_info_1_16x16_8bit,tilemap_scan_rows,16,16,WIN_NX,WIN_NY);
481	481	tilemap_16x16[2] = tilemap_create(machine, get_tile_info_2_16x16_8bit,tilemap_scan_rows,16,16,WIN_NX,WIN_NY);
482	482
483		tilemap_map_pen_to_layer(bg_tilemap[0], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
484		tilemap_map_pen_to_layer(bg_tilemap[0], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	483	tilemap_map_pen_to_layer(bg_tilemap[0], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	484	tilemap_map_pen_to_layer(bg_tilemap[0], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
485	485
486		tilemap_map_pen_to_layer(bg_tilemap[1], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
487		tilemap_map_pen_to_layer(bg_tilemap[1], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	486	tilemap_map_pen_to_layer(bg_tilemap[1], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	487	tilemap_map_pen_to_layer(bg_tilemap[1], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
488	488
489		tilemap_map_pen_to_layer(bg_tilemap[2], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
490		tilemap_map_pen_to_layer(bg_tilemap[2], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	489	tilemap_map_pen_to_layer(bg_tilemap[2], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	490	tilemap_map_pen_to_layer(bg_tilemap[2], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
491	491
492	492
493		tilemap_map_pen_to_layer(tilemap_16x16[0], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
494		tilemap_map_pen_to_layer(tilemap_16x16[0], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	493	tilemap_map_pen_to_layer(tilemap_16x16[0], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	494	tilemap_map_pen_to_layer(tilemap_16x16[0], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
495	495
496		tilemap_map_pen_to_layer(tilemap_16x16[1], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
497		tilemap_map_pen_to_layer(tilemap_16x16[1], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	496	tilemap_map_pen_to_layer(tilemap_16x16[1], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	497	tilemap_map_pen_to_layer(tilemap_16x16[1], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
498	498
499		tilemap_map_pen_to_layer(tilemap_16x16[2], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
500		tilemap_map_pen_to_layer(tilemap_16x16[2], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
	499	tilemap_map_pen_to_layer(tilemap_16x16[2], 0, 15,  TILEMAP_PIXEL_TRANSPARENT);
	500	tilemap_map_pen_to_layer(tilemap_16x16[2], 1, 255, TILEMAP_PIXEL_TRANSPARENT);
501	501
502	502	}
503	503
r6740	r6741
507	507
508	508	has_zoom = 1;
509	509
510		metro_K053936_tilemap = tilemap_create(machine, metro_K053936_get_tile_info, tilemap_scan_rows,
511		8,8, 256, 512 );
	510	metro_K053936_tilemap = tilemap_create(machine, metro_K053936_get_tile_info, tilemap_scan_rows, 8,8, 256, 512 );
512	511
513		K053936_wraparound_enable(0, 0);
514		K053936_set_offset(0, -69, -21);
515
516	512	tilemap_set_scrolldx(bg_tilemap[0], 8, -8);
517	513	tilemap_set_scrolldx(bg_tilemap[1], 8, -8);
518	514	tilemap_set_scrolldx(bg_tilemap[2], 8, -8);
r6740	r6741
524	520
525	521	has_zoom = 1;
526	522
527		metro_K053936_tilemap = tilemap_create(machine, metro_K053936_gstrik2_get_tile_info, tilemap_scan_gstrik2,
528		16,16, 128, 256 );
	523	metro_K053936_tilemap = tilemap_create(machine, metro_K053936_gstrik2_get_tile_info, tilemap_scan_gstrik2, 16,16, 128, 256 );
529	524
530		K053936_wraparound_enable(0, 0);
531		K053936_set_offset(0, -69, -19);
532
533	525	tilemap_set_scrolldx(bg_tilemap[0], 8, -8);
534	526	tilemap_set_scrolldx(bg_tilemap[1], 0, 0);
535	527	tilemap_set_scrolldx(bg_tilemap[2], 8, -8);
r6740	r6741
856	848
857	849	VIDEO_UPDATE( metro )
858	850	{
	851	const device_config *k053936 = devtag_get_device(screen->machine, "k053936");
859	852	int i,pri,layers_ctrl = -1;
860	853	UINT16 screenctrl = *metro_screenctrl;
861	854
r6740	r6741
941	934	}
942	935	#endif
943	936
944		if (has_zoom) K053936_0_zoom_draw(bitmap,cliprect,metro_K053936_tilemap,0,0, 1);
	937	if (has_zoom)
	938	k053936_zoom_draw(k053936, bitmap, cliprect, metro_K053936_tilemap, 0, 0, 1);
945	939
946
947		for (pri=3; pri>=0; pri--)
	940	for (pri = 3; pri >= 0; pri--)
948	941	draw_layers(screen->machine, bitmap,cliprect,pri,layers_ctrl);
949	942
950	943	if (layers_ctrl & 0x08)

src/mame/video/angelkds.c

r6740	r6741
7	7	*/
8	8
9	9	#include "driver.h"
10		#include "angelkds.h"
	10	#include "includes/angelkds.h"
11	11
12	12
13	13	/*** Text Layer Tilemap

src/mame/video/circusc.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "video/resnet.h"
11		#include "circusc.h"
	11	#include "includes/circusc.h"
12	12
13	13
14	14	/***************************************************************************

src/mame/video/mikie.c

r6740	r6741
11	11
12	12	static int palettebank;
13	13
	14	UINT8 *mikie_videoram;
	15	UINT8 *mikie_colorram;
14	16	static tilemap *bg_tilemap;
15	17
16	18	/***************************************************************************
r6740	r6741
92	94
93	95	WRITE8_HANDLER( mikie_videoram_w )
94	96	{
95		space->machine->generic.videoram.u8[offset] = data;
	97	mikie_videoram[offset] = data;
96	98	tilemap_mark_tile_dirty(bg_tilemap, offset);
97	99	}
98	100
99	101	WRITE8_HANDLER( mikie_colorram_w )
100	102	{
101		space->machine->generic.colorram.u8[offset] = data;
	103	mikie_colorram[offset] = data;
102	104	tilemap_mark_tile_dirty(bg_tilemap, offset);
103	105	}
104	106
r6740	r6741
122	124
123	125	static TILE_GET_INFO( get_bg_tile_info )
124	126	{
125		int code = machine->generic.videoram.u8[tile_index] + ((machine->generic.colorram.u8[tile_index] & 0x20) << 3);
126		int color = (machine->generic.colorram.u8[tile_index] & 0x0f) + 16 * palettebank;
127		int flags = ((machine->generic.colorram.u8[tile_index] & 0x40) ? TILE_FLIPX : 0) | ((machine->generic.colorram.u8[tile_index] & 0x80) ? TILE_FLIPY : 0);
	127	int code = mikie_videoram[tile_index] + ((mikie_colorram[tile_index] & 0x20) << 3);
	128	int color = (mikie_colorram[tile_index] & 0x0f) + 16 * palettebank;
	129	int flags = ((mikie_colorram[tile_index] & 0x40) ? TILE_FLIPX : 0) | ((mikie_colorram[tile_index] & 0x80) ? TILE_FLIPY : 0);
128	130
129	131	SET_TILE_INFO(0, code, color, flags);
130	132	}

src/mame/video/midvunit.c

r6740	r6741
9	9	#include "cpu/adsp2100/adsp2100.h"
10	10	#include "audio/williams.h"
11	11	#include "video/poly.h"
12		#include "midvunit.h"
	12	#include "includes/midvunit.h"
13	13
14	14
15	15	#define WATCH_RENDER      (0)

src/mame/video/surpratk.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4	static int layer_colorbase[3],sprite_colorbase,bg_colorbase;
5	5	static int layerpri[3];
r6740	r6741
11	11
12	12	***************************************************************************/
13	13
14		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	14	void surpratk_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
15	15	{
16	16	*flags = (*color & 0x80) ? TILE_FLIPX : 0;
17	17	*code |= ((*color & 0x03) << 8) | ((*color & 0x10) << 6) | ((*color & 0x0c) << 9) | (bank << 13);
r6740	r6741
24	24
25	25	***************************************************************************/
26	26
27		static void sprite_callback(int *code,int *color,int *priority_mask)
	27	void surpratk_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
28	28	{
29	29	int pri = 0x20 | ((*color & 0x60) >> 2);
30	30	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
42	42
43	43	***************************************************************************/
44	44
45		VIDEO_START( surpratk )
46		{
47		K053251_vh_start(machine);
48
49		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
50		K053245_vh_start(machine,0,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
51		}
52
53	45	/* useful function to sort the three tile layers by priority order */
54	46	static void sortlayers(int *layer,int *pri)
55	47	{
r6740	r6741
68	60
69	61	VIDEO_UPDATE( surpratk )
70	62	{
	63	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	64	const device_config *k053244 = devtag_get_device(screen->machine, "k053244");
	65	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
71	66	int layer[3];
72	67
73	68
74		bg_colorbase       = K053251_get_palette_index(K053251_CI0);
75		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
76		layer_colorbase[0] = K053251_get_palette_index(K053251_CI2);
77		layer_colorbase[1] = K053251_get_palette_index(K053251_CI4);
78		layer_colorbase[2] = K053251_get_palette_index(K053251_CI3);
	69	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI0);
	70	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	71	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	72	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI4);
	73	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI3);
79	74
80		K052109_tilemap_update();
	75	k052109_tilemap_update(k052109);
81	76
82	77	layer[0] = 0;
83		layerpri[0] = K053251_get_priority(K053251_CI2);
	78	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
84	79	layer[1] = 1;
85		layerpri[1] = K053251_get_priority(K053251_CI4);
	80	layerpri[1] = k053251_get_priority(k053251, K053251_CI4);
86	81	layer[2] = 2;
87		layerpri[2] = K053251_get_priority(K053251_CI3);
	82	layerpri[2] = k053251_get_priority(k053251, K053251_CI3);
88	83
89		sortlayers(layer,layerpri);
	84	sortlayers(layer, layerpri);
90	85
91		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
92		bitmap_fill(bitmap,cliprect,16 * bg_colorbase);
93		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[0]],0,1);
94		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[1]],0,2);
95		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[2]],0,4);
	86	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
	87	bitmap_fill(bitmap, cliprect, 16 * bg_colorbase);
	88	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[0], 0, 1);
	89	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[1], 0, 2);
	90	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[2], 0, 4);
96	91
97		K053245_sprites_draw(screen->machine,0,bitmap,cliprect);
	92	k053245_sprites_draw(k053244, bitmap, cliprect);
98	93	return 0;
99	94	}

src/mame/video/tagteam.c

r6740	r6741
10	10
11	11	static int palettebank;
12	12
	13	UINT8 *tagteam_videoram;
	14	UINT8 *tagteam_colorram;
13	15	static tilemap *bg_tilemap;
14	16
15	17	PALETTE_INIT( tagteam )
r6740	r6741
44	46
45	47	WRITE8_HANDLER( tagteam_videoram_w )
46	48	{
47		space->machine->generic.videoram.u8[offset] = data;
	49	tagteam_videoram[offset] = data;
48	50	tilemap_mark_tile_dirty(bg_tilemap, offset);
49	51	}
50	52
51	53	WRITE8_HANDLER( tagteam_colorram_w )
52	54	{
53		space->machine->generic.colorram.u8[offset] = data;
	55	tagteam_colorram[offset] = data;
54	56	tilemap_mark_tile_dirty(bg_tilemap, offset);
55	57	}
56	58
r6740	r6741
63	65	y = offset % 32;
64	66	offset = 32 * y + x;
65	67
66		return space->machine->generic.videoram.u8[offset];
	68	return tagteam_videoram[offset];
67	69	}
68	70
69	71	READ8_HANDLER( tagteam_mirrorcolorram_r )
r6740	r6741
75	77	y = offset % 32;
76	78	offset = 32 * y + x;
77	79
78		return space->machine->generic.colorram.u8[offset];
	80	return tagteam_colorram[offset];
79	81	}
80	82
81	83	WRITE8_HANDLER( tagteam_mirrorvideoram_w )
r6740	r6741
121	123
122	124	static TILE_GET_INFO( get_bg_tile_info )
123	125	{
124		int code = machine->generic.videoram.u8[tile_index] + 256 * machine->generic.colorram.u8[tile_index];
	126	int code = tagteam_videoram[tile_index] + 256 * tagteam_colorram[tile_index];
125	127	int color = palettebank * 2; // GUESS
126	128
127	129	SET_TILE_INFO(0, code, color, 0);
r6740	r6741
139	141
140	142	for (offs = 0; offs < 0x20; offs += 4)
141	143	{
142		int spritebank = (machine->generic.videoram.u8[offs] & 0x30) << 4;
143		int code = machine->generic.videoram.u8[offs + 1] + 256 * spritebank;
	144	int spritebank = (tagteam_videoram[offs] & 0x30) << 4;
	145	int code = tagteam_videoram[offs + 1] + 256 * spritebank;
144	146	int color = 1 + 2 * palettebank; // GUESS
145		int flipx = machine->generic.videoram.u8[offs] & 0x04;
146		int flipy = machine->generic.videoram.u8[offs] & 0x02;
147		int sx = 240 - machine->generic.videoram.u8[offs + 3];
148		int sy = 240 - machine->generic.videoram.u8[offs + 2];
	147	int flipx = tagteam_videoram[offs] & 0x04;
	148	int flipy = tagteam_videoram[offs] & 0x02;
	149	int sx = 240 - tagteam_videoram[offs + 3];
	150	int sy = 240 - tagteam_videoram[offs + 2];
149	151
150		if (!(machine->generic.videoram.u8[offs] & 0x01)) continue;
	152	if (!(tagteam_videoram[offs] & 0x01)) continue;
151	153
152	154	if (flip_screen_get(machine))
153	155	{
r6740	r6741
165	167
166	168	/* Wrap around */
167	169
168		code = machine->generic.videoram.u8[offs + 0x20] + 256 * spritebank;
	170	code = tagteam_videoram[offs + 0x20] + 256 * spritebank;
169	171	color = palettebank;
170	172	sy += (flip_screen_get(machine) ? -256 : 256);
171	173

src/mame/video/bagman.c

r6740	r6741
13	13
14	14	UINT8 *bagman_video_enable;
15	15
	16	UINT8 *bagman_videoram;
	17	UINT8 *bagman_colorram;
16	18	static tilemap *bg_tilemap;
17	19
18	20
19	21	WRITE8_HANDLER( bagman_videoram_w )
20	22	{
21		space->machine->generic.videoram.u8[offset] = data;
	23	bagman_videoram[offset] = data;
22	24	tilemap_mark_tile_dirty(bg_tilemap, offset);
23	25	}
24	26
25	27	WRITE8_HANDLER( bagman_colorram_w )
26	28	{
27		space->machine->generic.colorram.u8[offset] = data;
	29	bagman_colorram[offset] = data;
28	30	tilemap_mark_tile_dirty(bg_tilemap, offset);
29	31	}
30	32
r6740	r6741
95	97
96	98	static TILE_GET_INFO( get_bg_tile_info )
97	99	{
98		int gfxbank = (machine->gfx[2] && (machine->generic.colorram.u8[tile_index] & 0x10)) ? 2 : 0;
99		int code = machine->generic.videoram.u8[tile_index] + 8 * (machine->generic.colorram.u8[tile_index] & 0x20);
100		int color = machine->generic.colorram.u8[tile_index] & 0x0f;
	100	int gfxbank = (machine->gfx[2] && (bagman_colorram[tile_index] & 0x10)) ? 2 : 0;
	101	int code = bagman_videoram[tile_index] + 8 * (bagman_colorram[tile_index] & 0x20);
	102	int color = bagman_colorram[tile_index] & 0x0f;
101	103
102	104	SET_TILE_INFO(gfxbank, code, color, 0);
103	105	}

src/mame/video/commando.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "commando.h"
	10	#include "includes/commando.h"
11	11
12	12
13	13	WRITE8_HANDLER( commando_videoram_w )

src/mame/video/atarisy2.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "slapstic.h"
9		#include "atarisy2.h"
	8	#include "includes/slapstic.h"
	9	#include "includes/atarisy2.h"
10	10
11	11
12	12

src/mame/video/skydiver.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "skydiver.h"
	8	#include "includes/skydiver.h"
9	9	#include "sound/discrete.h"
10	10
11	11

src/mame/video/ninjakd2.c

r6740	r6741
1	1	#include "driver.h"
2		#include "ninjakd2.h"
	2	#include "includes/ninjakd2.h"
3	3
4	4	UINT8* ninjakd2_bg_videoram;
5	5	UINT8* ninjakd2_fg_videoram;

src/mame/video/warpwarp.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "video/resnet.h"
11		#include "warpwarp.h"
	11	#include "includes/warpwarp.h"
12	12
13	13
14	14	UINT8 *geebee_videoram,*warpwarp_videoram;

src/mame/video/spacefb.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "spacefb.h"
	8	#include "includes/spacefb.h"
9	9	#include "video/resnet.h"
10	10
11	11

src/mame/video/cbuster.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "deco16ic.h"
	8	#include "includes/deco16ic.h"
9	9
10	10	static int twocrude_pri;
11	11

src/mame/video/nbmj8891.c

r6740	r6741
7	7	******************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "nb1413m3.h"
	10	#include "includes/nb1413m3.h"
11	11	#include "includes/nbmj8891.h"
12	12
13	13

src/mame/video/liberate.c

r6740	r6741
12	12	#include "driver.h"
13	13	#include "cpu/m6502/m6502.h"
14	14
	15	UINT8 *liberate_videoram;
	16	UINT8 *liberate_colorram;
15	17	static int background_color, background_disable;
16	18	static tilemap *background_tilemap, *fix_tilemap;
17	19	static UINT8 deco16_io_ram[16];
r6740	r6741
70	72
71	73	static TILE_GET_INFO( get_fix_tile_info )
72	74	{
73		UINT8 *videoram = machine->generic.videoram.u8;
74		UINT8 *colorram = machine->generic.colorram.u8;
	75	UINT8 *videoram = liberate_videoram;
	76	UINT8 *colorram = liberate_colorram;
75	77	int tile, color;
76	78
77	79	tile = videoram[tile_index] + (colorram[tile_index] << 8);
r6740	r6741
183	185
184	186	WRITE8_HANDLER( liberate_videoram_w )
185	187	{
186		space->machine->generic.videoram.u8[offset] = data;
	188	liberate_videoram[offset] = data;
187	189	tilemap_mark_tile_dirty(fix_tilemap, offset);
188	190	}
189	191
190	192	WRITE8_HANDLER( liberate_colorram_w )
191	193	{
192		space->machine->generic.colorram.u8[offset] = data;
	194	liberate_colorram[offset] = data;
193	195	tilemap_mark_tile_dirty(fix_tilemap, offset);
194	196	}
195	197
r6740	r6741
527	529
528	530	for (offs = 0;offs < 0x400;offs++)
529	531	{
530		tile=screen->machine->generic.videoram.u8[offs]+((screen->machine->generic.colorram.u8[offs]&0x3)<<8);
	532	tile=liberate_videoram[offs]+((liberate_colorram[offs]&0x3)<<8);
531	533
532	534	if(deco16_io_ram[0]&0x40) //dynamic ram-based gfxs for Pro Golf
533	535	gfx_region = 3;

src/mame/video/turbo.c

r6740	r6741
5	5	*************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "turbo.h"
	8	#include "includes/turbo.h"
9	9	#include "video/resnet.h"
10	10
11	11

src/mame/video/cvs.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "video/s2636.h"
11	10	#include "cpu/s2650/s2650.h"
12		#include "cvs.h"
	11	#include "includes/cvs.h"
	12	#include "video/s2636.h"
13	13
14	14
15	15	#define SPRITE_PEN_BASE      (0x820)
16	16	#define BULLET_STAR_PEN      (0x828)
17	17
18		#define MAX_STARS           250
19	18	#define STARS_COLOR_BASE    16
20	19
21	20
22		static bitmap_t *background_bitmap;
23		bitmap_t *cvs_collision_background;
24		static bitmap_t *scrolled_collision_background;
25
26		int cvs_collision_register;
27
28		struct star
29		{
30		int x,y,code;
31		};
32
33
34		static struct star stars[MAX_STARS];
35		static int    total_stars;
36		static int    stars_on;
37		static UINT8  scroll_reg;
38		static int    stars_scroll;
39
40
41	21	/******************************************************
42	22	* Convert Colour prom to format for Mame Colour Map  *
43	23	*                                                    *
r6740	r6741
86	66	}
87	67
88	68
89		static void set_pens(colortable_t *colortable)
	69	static void set_pens( running_machine *machine )
90	70	{
	71	cvs_state *state = (cvs_state *)machine->driver_data;
91	72	int i;
92	73
93	74	for (i = 0; i < 0x10; i++)
94	75	{
95		int r = pal2bit(~cvs_palette_ram[i] >> 0);
96		int g = pal3bit(~cvs_palette_ram[i] >> 2);
97		int b = pal3bit(~cvs_palette_ram[i] >> 5);
	76	int r = pal2bit(~state->palette_ram[i] >> 0);
	77	int g = pal3bit(~state->palette_ram[i] >> 2);
	78	int b = pal3bit(~state->palette_ram[i] >> 5);
98	79
99		colortable_palette_set_color(colortable, i, MAKE_RGB(r, g, b));
	80	colortable_palette_set_color(machine->colortable, i, MAKE_RGB(r, g, b));
100	81	}
101	82	}
102	83
r6740	r6741
104	85
105	86	WRITE8_HANDLER( cvs_video_fx_w )
106	87	{
	88	cvs_state *state = (cvs_state *)space->machine->driver_data;
	89
107	90	if (data & 0xce)
108	91	logerror("%4x : CVS: Unimplemented CVS video fx = %2x\n",cpu_get_pc(space->cpu), data & 0xce);
109	92
110		stars_on = data & 0x01;
	93	state->stars_on = data & 0x01;
111	94
112		if (data & 0x02)   logerror("           SHADE BRIGHTER TO RIGHT\n");
113		if (data & 0x04)   logerror("           SCREEN ROTATE\n");
114		if (data & 0x08)   logerror("           SHADE BRIGHTER TO LEFT\n");
	95	if (data & 0x02)   logerror("           SHADE BRIGHTER TO RIGHT\n");
	96	if (data & 0x04)   logerror("           SCREEN ROTATE\n");
	97	if (data & 0x08)   logerror("           SHADE BRIGHTER TO LEFT\n");
115	98
116		set_led_status(space->machine, 1, data & 0x10);   /* lamp 1 */
117		set_led_status(space->machine, 2, data & 0x20);   /* lamp 2 */
	99	set_led_status(space->machine, 1, data & 0x10);   /* lamp 1 */
	100	set_led_status(space->machine, 2, data & 0x20);   /* lamp 2 */
118	101
119		if (data & 0x40)   logerror("           SHADE BRIGHTER TO BOTTOM\n");
120		if (data & 0x80)   logerror("           SHADE BRIGHTER TO TOP\n");
	102	if (data & 0x40)   logerror("           SHADE BRIGHTER TO BOTTOM\n");
	103	if (data & 0x80)   logerror("           SHADE BRIGHTER TO TOP\n");
121	104	}
122	105
123	106
124	107
125	108	READ8_HANDLER( cvs_collision_r )
126	109	{
127		return cvs_collision_register;
	110	cvs_state *state = (cvs_state *)space->machine->driver_data;
	111	return state->collision_register;
128	112	}
129	113
130	114	READ8_HANDLER( cvs_collision_clear )
131	115	{
132		cvs_collision_register = 0;
133
	116	cvs_state *state = (cvs_state *)space->machine->driver_data;
	117	state->collision_register = 0;
134	118	return 0;
135	119	}
136	120
137	121
138	122	WRITE8_HANDLER( cvs_scroll_w )
139	123	{
140		scroll_reg = 255 - data;
	124	cvs_state *state = (cvs_state *)space->machine->driver_data;
	125	state->scroll_reg = 255 - data;
141	126	}
142	127
143	128
144	129	VIDEO_START( cvs )
145	130	{
	131	cvs_state *state = (cvs_state *)machine->driver_data;
146	132	int generator = 0;
147	133	int y;
148	134
149	135	/* precalculate the star background */
150	136
151		total_stars = 0;
	137	state->total_stars = 0;
152	138
153		for (y = 255;y >= 0;y--)
	139	for (y = 255; y >= 0; y--)
154	140	{
155	141	int x;
156	142
157		for (x = 511;x >= 0;x--)
	143	for (x = 511; x >= 0; x--)
158	144	{
159		int bit1,bit2;
	145	int bit1, bit2;
160	146
161	147	generator <<= 1;
162	148	bit1 = (~generator >> 17) & 1;
163	149	bit2 = (generator >> 5) & 1;
164	150
165		if (bit1 ^ bit2) generator |= 1;
	151	if (bit1 ^ bit2)
	152	generator |= 1;
166	153
167	154	if (((~generator >> 16) & 1) && (generator & 0xfe) == 0xfe)
168	155	{
169		if(((~(generator >> 12)) & 0x01) && ((~(generator >> 13)) & 0x01))
170		{
171		if (total_stars < MAX_STARS)
172		{
173		stars[total_stars].x = x;
174		stars[total_stars].y = y;
175		stars[total_stars].code = 1;
	156	if(((~(generator >> 12)) & 0x01) && ((~(generator >> 13)) & 0x01))
	157	{
	158	if (state->total_stars < CVS_MAX_STARS)
	159	{
	160	state->stars[state->total_stars].x = x;
	161	state->stars[state->total_stars].y = y;
	162	state->stars[state->total_stars].code = 1;
176	163
177		total_stars++;
178		}
179		}
	164	state->total_stars++;
	165	}
	166	}
180	167	}
181	168	}
182	169	}
183	170
184	171	/* create helper bitmaps */
185		background_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
186		cvs_collision_background = video_screen_auto_bitmap_alloc(machine->primary_screen);
187		scrolled_collision_background = video_screen_auto_bitmap_alloc(machine->primary_screen);
	172	state->background_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
	173	state->collision_background = video_screen_auto_bitmap_alloc(machine->primary_screen);
	174	state->scrolled_collision_background = video_screen_auto_bitmap_alloc(machine->primary_screen);
	175
	176	/* register save */
	177	state_save_register_global_bitmap(machine, state->background_bitmap);
	178	state_save_register_global_bitmap(machine, state->collision_background);
	179	state_save_register_global_bitmap(machine, state->scrolled_collision_background);
188	180	}
189	181
190	182
191
192		void cvs_scroll_stars(void)
	183	void cvs_scroll_stars( running_machine *machine )
193	184	{
194		stars_scroll++;
	185	cvs_state *state = (cvs_state *)machine->driver_data;
	186	state->stars_scroll++;
195	187	}
196	188
197	189
198
199	190	VIDEO_UPDATE( cvs )
200	191	{
	192	cvs_state *state = (cvs_state *)screen->machine->driver_data;
201	193	static const int ram_based_char_start_indices[] = { 0xe0, 0xc0, 0x100, 0x80 };
202	194	offs_t offs;
203	195	int scroll[8];
204		UINT8 character_banking_mode;
205		bitmap_t *s2636_0_bitmap;
206		bitmap_t *s2636_1_bitmap;
207		bitmap_t *s2636_2_bitmap;
208		const device_config *s2636_0 = devtag_get_device(screen->machine, "s2636_0");
209		const device_config *s2636_1 = devtag_get_device(screen->machine, "s2636_1");
210		const device_config *s2636_2 = devtag_get_device(screen->machine, "s2636_2");
	196	bitmap_t *s2636_0_bitmap, *s2636_1_bitmap, *s2636_2_bitmap;
211	197
212		set_pens(screen->machine->colortable);
	198	set_pens(screen->machine);
213	199
214		/* create our background character set, which is a software
215		selectable mixture of RAM and ROM based tiles */
216
217		character_banking_mode = cvs_get_character_banking_mode();
218
219	200	/* draw the background */
220	201	for (offs = 0; offs < 0x0400; offs++)
221	202	{
222	203	int collision_color = 0x100;
	204	UINT8 code = state->video_ram[offs];
	205	UINT8 color = state->color_ram[offs];
223	206
224		UINT8 code = cvs_video_ram[offs];
225		UINT8 color = cvs_color_ram[offs];
226
227	207	UINT8 x = offs << 3;
228	208	UINT8 y = offs >> 5 << 3;
229	209
230		int gfxnum = (code < ram_based_char_start_indices[character_banking_mode]) ? 0 : 1;
	210	int gfxnum = (code < ram_based_char_start_indices[state->character_banking_mode]) ? 0 : 1;
231	211
232		drawgfx_opaque(background_bitmap, 0, screen->machine->gfx[gfxnum],
	212	drawgfx_opaque(state->background_bitmap, 0, screen->machine->gfx[gfxnum],
233	213	code, color,
234	214	0, 0,
235	215	x, y);
r6740	r6741
245	225	collision_color = 0x102;
246	226	}
247	227
248		drawgfx_opaque(cvs_collision_background, 0, screen->machine->gfx[gfxnum],
	228	drawgfx_opaque(state->collision_background, 0, screen->machine->gfx[gfxnum],
249	229	code, collision_color,
250	230	0, 0,
251	231	x, y);
252	232	}
253	233
254	234
255		/* Update screen - 8 regions, fixed scrolling area */
	235	/* Update screen - 8 regions, fixed scrolling area */
	236	scroll[0] = 0;
	237	scroll[1] = state->scroll_reg;
	238	scroll[2] = state->scroll_reg;
	239	scroll[3] = state->scroll_reg;
	240	scroll[4] = state->scroll_reg;
	241	scroll[5] = state->scroll_reg;
	242	scroll[6] = 0;
	243	scroll[7] = 0;
256	244
257		scroll[0] = 0;
258		scroll[1] = scroll_reg;
259		scroll[2] = scroll_reg;
260		scroll[3] = scroll_reg;
261		scroll[4] = scroll_reg;
262		scroll[5] = scroll_reg;
263		scroll[6] = 0;
264		scroll[7] = 0;
	245	copyscrollbitmap(bitmap, state->background_bitmap, 0, 0, 8, scroll, cliprect);
	246	copyscrollbitmap(state->scrolled_collision_background, state->collision_background, 0, 0, 8, scroll, cliprect);
265	247
266		copyscrollbitmap(bitmap, background_bitmap, 0, 0, 8, scroll, cliprect);
267		copyscrollbitmap(scrolled_collision_background, cvs_collision_background, 0, 0, 8, scroll, cliprect);
	248	/* update the S2636 chips */
	249	s2636_0_bitmap = s2636_update(state->s2636_0, cliprect);
	250	s2636_1_bitmap = s2636_update(state->s2636_1, cliprect);
	251	s2636_2_bitmap = s2636_update(state->s2636_2, cliprect);
268	252
269		/* update the S2636 chips */
270		s2636_0_bitmap = s2636_update(s2636_0, cliprect);
271		s2636_1_bitmap = s2636_update(s2636_1, cliprect);
272		s2636_2_bitmap = s2636_update(s2636_2, cliprect);
	253	/* Bullet Hardware */
	254	for (offs = 8; offs < 256; offs++ )
	255	{
	256	if (state->bullet_ram[offs] != 0)
	257	{
	258	int ct;
	259	for (ct = 0; ct < 4; ct++)
	260	{
	261	int bx = 255 - 7 - state->bullet_ram[offs] - ct;
273	262
274		/* Bullet Hardware */
275		for (offs = 8; offs < 256; offs++ )
276		{
277		if (cvs_bullet_ram[offs] != 0)
278		{
279		int ct;
280		for(ct=0;ct<4;ct++)
281		{
282		int bx=255-7-cvs_bullet_ram[offs]-ct;
283
284		/* Bullet/Object Collision */
	263	/* Bullet/Object Collision */
285	264	if ((*BITMAP_ADDR16(s2636_0_bitmap, offs, bx) != 0) ||
286	265	(*BITMAP_ADDR16(s2636_1_bitmap, offs, bx) != 0) ||
287	266	(*BITMAP_ADDR16(s2636_2_bitmap, offs, bx) != 0))
288		cvs_collision_register |= 0x08;
	267	state->collision_register |= 0x08;
289	268
290		/* Bullet/Background Collision */
291		if (colortable_entry_get_value(screen->machine->colortable, *BITMAP_ADDR16(scrolled_collision_background, offs, bx)))
292		cvs_collision_register |= 0x80;
	269	/* Bullet/Background Collision */
	270	if (colortable_entry_get_value(screen->machine->colortable, *BITMAP_ADDR16(state->scrolled_collision_background, offs, bx)))
	271	state->collision_register |= 0x80;
293	272
294	273	*BITMAP_ADDR16(bitmap, offs, bx) = BULLET_STAR_PEN;
295		}
296		}
297		}
	274	}
	275	}
	276	}
298	277
299	278
300	279	/* mix and copy the S2636 images into the main bitmap, also check for collision */
r6740	r6741
318	297	*BITMAP_ADDR16(bitmap, y, x) = SPRITE_PEN_BASE + S2636_PIXEL_COLOR(pixel);
319	298
320	299	/* S2636 vs. S2636 collision detection */
321		if (S2636_IS_PIXEL_DRAWN(pixel0) && S2636_IS_PIXEL_DRAWN(pixel1)) cvs_collision_register |= 0x01;
322		if (S2636_IS_PIXEL_DRAWN(pixel1) && S2636_IS_PIXEL_DRAWN(pixel2)) cvs_collision_register |= 0x02;
323		if (S2636_IS_PIXEL_DRAWN(pixel0) && S2636_IS_PIXEL_DRAWN(pixel2)) cvs_collision_register |= 0x04;
	300	if (S2636_IS_PIXEL_DRAWN(pixel0) && S2636_IS_PIXEL_DRAWN(pixel1)) state->collision_register |= 0x01;
	301	if (S2636_IS_PIXEL_DRAWN(pixel1) && S2636_IS_PIXEL_DRAWN(pixel2)) state->collision_register |= 0x02;
	302	if (S2636_IS_PIXEL_DRAWN(pixel0) && S2636_IS_PIXEL_DRAWN(pixel2)) state->collision_register |= 0x04;
324	303
325	304	/* S2636 vs. background collision detection */
326		if (colortable_entry_get_value(screen->machine->colortable, *BITMAP_ADDR16(scrolled_collision_background, y, x)))
	305	if (colortable_entry_get_value(screen->machine->colortable, *BITMAP_ADDR16(state->scrolled_collision_background, y, x)))
327	306	{
328		if (S2636_IS_PIXEL_DRAWN(pixel0)) cvs_collision_register |= 0x10;
329		if (S2636_IS_PIXEL_DRAWN(pixel1)) cvs_collision_register |= 0x20;
330		if (S2636_IS_PIXEL_DRAWN(pixel2)) cvs_collision_register |= 0x40;
	307	if (S2636_IS_PIXEL_DRAWN(pixel0)) state->collision_register |= 0x10;
	308	if (S2636_IS_PIXEL_DRAWN(pixel1)) state->collision_register |= 0x20;
	309	if (S2636_IS_PIXEL_DRAWN(pixel2)) state->collision_register |= 0x40;
331	310	}
332	311	}
333	312	}
334	313	}
335	314	}
336	315
337
338		/* stars circuit */
339
340		if (stars_on)
	316	/* stars circuit */
	317	if (state->stars_on)
341	318	{
342		for (offs = 0;offs < total_stars;offs++)
	319	for (offs = 0; offs < state->total_stars; offs++)
343	320	{
344		UINT8 x = (stars[offs].x + stars_scroll) >> 1;
345		UINT8 y = stars[offs].y + ((stars_scroll + stars[offs].x) >> 9);
	321	UINT8 x = (state->stars[offs].x + state->stars_scroll) >> 1;
	322	UINT8 y = state->stars[offs].y + ((state->stars_scroll + state->stars[offs].x) >> 9);
346	323
347	324	if ((y & 1) ^ ((x >> 4) & 1))
348	325	{

src/mame/video/seta.c

r6740	r6741
137	137
138	138	#include "driver.h"
139	139	#include "sound/x1_010.h"
140		#include "seta.h"
	140	#include "includes/seta.h"
141	141
142	142	/* Variables only used here */
143	143

src/mame/video/rohga.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "deco16ic.h"
	8	#include "includes/deco16ic.h"
9	9
10	10	static UINT16 * rohga_spriteram;
11	11

src/mame/video/plygonet.c

r6740	r6741
8	8	*/
9	9
10	10	#include "driver.h"
11		#include "video/konamiic.h"
	11	#include "video/konicdev.h"
12	12
13	13	/* TTL text plane stuff */
14	14
r6740	r6741
123	123
124	124	VIDEO_UPDATE( polygonet )
125	125	{
	126	const device_config *k053936 = devtag_get_device(screen->machine, "k053936");
126	127	bitmap_fill(screen->machine->priority_bitmap, NULL, 0);
127	128	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
128	129
129		K053936_0_zoom_draw(bitmap, cliprect, roz_tilemap, 0, 0, 0);
	130	k053936_zoom_draw(k053936, bitmap, cliprect, roz_tilemap, 0, 0, 0);
130	131
131	132	tilemap_draw(bitmap, cliprect, ttl_tilemap, 0, 1<<0);
132	133	return 0;

src/mame/video/batman.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "batman.h"
9		#include "thunderj.h"
	8	#include "includes/batman.h"
	9	#include "includes/thunderj.h"
10	10
11	11
12	12

src/mame/video/cheekyms.c

r6740	r6741
10	10
11	11	#include "driver.h"
12	12	#include "sound/dac.h"
13		#include "cheekyms.h"
	13	#include "includes/cheekyms.h"
14	14
15	15	/* bit 3 and 7 of the char color PROMs are used for something -- not currently emulated -
16	16	thus GAME_IMPERFECT_GRAPHICS */

src/mame/video/deco16ic.c

r6740	r6741
140	140	***************************************************************************/
141	141
142	142	#include "driver.h"
143		#include "deco16ic.h"
	143	#include "includes/deco16ic.h"
144	144	#include "ui.h"
145	145
146	146	UINT16 *deco16_pf1_data,*deco16_pf2_data;

src/mame/video/bishi.c

r6740	r6741
8	8	***************************************************************************/
9	9
10	10	#include "driver.h"
11		#include "video/konamiic.h"
12		#include "konamigx.h"
	11	#include "video/konicdev.h"
	12	//#include "includes/konamigx.h"
13	13
14	14	static int layer_colorbase[4], layerpri[4];
15	15
16		static void bishi_tile_callback(int layer, int *code, int *color, int *flags)
	16	void bishi_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags)
17	17	{
18	18	//  *code -= '0';
19	19	//  *color = layer_colorbase[layer] | (*color>>2 & 0x0f);
r6740	r6741
25	25
26	26	VIDEO_START(bishi)
27	27	{
	28	const device_config *k056832 = devtag_get_device(machine, "k056832");
	29
28	30	assert(video_screen_get_format(machine->primary_screen) == BITMAP_FORMAT_RGB32);
29	31
30		K055555_vh_start(machine);
31		K054338_vh_start(machine);
	32	k056832_set_layer_association(k056832, 0);
32	33
33		K056832_vh_start(machine, "gfx1", K056832_BPP_8, 1, NULL, bishi_tile_callback, 0);
	34	k056832_set_layer_offs(k056832, 0, -2, 0);
	35	k056832_set_layer_offs(k056832, 1,  2, 0);
	36	k056832_set_layer_offs(k056832, 2,  4, 0);
	37	k056832_set_layer_offs(k056832, 3,  6, 0);
34	38
35		K056832_set_LayerAssociation(0);
36
37		K056832_set_LayerOffset(0, -2, 0);
38		K056832_set_LayerOffset(1,  2, 0);
39		K056832_set_LayerOffset(2,  4, 0);
40		K056832_set_LayerOffset(3,  6, 0);
41
42	39	// the 55555 is set to "0x10, 0x11, 0x12, 0x13", but these values are almost correct...
43	40	layer_colorbase[0] = 0x00;
44	41	layer_colorbase[1] = 0x40;   // this one is wrong
r6740	r6741
67	64
68	65	VIDEO_UPDATE(bishi)
69	66	{
	67	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
	68	const device_config *k054338 = devtag_get_device(screen->machine, "k054338");
	69	const device_config *k055555 = devtag_get_device(screen->machine, "k055555");
70	70	int layers[4], i;/*, old;*/
71	71	/*  int bg_colorbase, new_colorbase, plane, dirty; */
72	72	static const int pris[4] = { K55_PRIINP_0, K55_PRIINP_3, K55_PRIINP_6, K55_PRIINP_7 };
73	73	static const int enables[4] = { K55_INP_VRAM_A, K55_INP_VRAM_B, K55_INP_VRAM_C, K55_INP_VRAM_D };
74	74
75		K054338_update_all_shadows(screen->machine,0 );
76		K054338_fill_backcolor(screen->machine, bitmap, 0);
	75	k054338_update_all_shadows(k054338, 0);
	76	k054338_fill_backcolor(k054338, bitmap, 0);
77	77
78	78	for (i = 0; i < 4; i++)
79	79	{
80	80	layers[i] = i;
81		layerpri[i] = K055555_read_register(pris[i]);
	81	layerpri[i] = k055555_read_register(k055555, pris[i]);
82	82	}
83	83
84	84	sortlayers(layers, layerpri);
r6740	r6741
87	87
88	88	for (i = 0; i < 4; i++)
89	89	{
90		if (K055555_read_register(K55_INPUT_ENABLES) & enables[layers[i]])
	90	if (k055555_read_register(k055555, K55_INPUT_ENABLES) & enables[layers[i]])
91	91	{
92		K056832_tilemap_draw(screen->machine, bitmap, cliprect, layers[i], 0, 1<<i);
	92	k056832_tilemap_draw(k056832, bitmap, cliprect, layers[i], 0, 1 << i);
93	93	}
94	94	}
95	95	return 0;

src/mame/video/1942.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "1942.h"
	10	#include "includes/1942.h"
11	11
12	12	/***************************************************************************
13	13

src/mame/video/bombjack.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "bombjack.h"
	10	#include "includes/bombjack.h"
11	11
12	12	WRITE8_HANDLER( bombjack_videoram_w )
13	13	{

src/mame/video/trucocl.c

r6740	r6741
34	34
35	35	#include "driver.h"
36	36
	37	UINT8 *trucocl_videoram;
	38	UINT8 *trucocl_colorram;
37	39	static tilemap *bg_tilemap;
38	40
39	41	PALETTE_INIT( trucocl )
r6740	r6741
46	48
47	49	WRITE8_HANDLER( trucocl_videoram_w )
48	50	{
49		space->machine->generic.videoram.u8[offset] = data;
	51	trucocl_videoram[offset] = data;
50	52	tilemap_mark_tile_dirty(bg_tilemap, offset);
51	53	}
52	54
53	55	WRITE8_HANDLER( trucocl_colorram_w )
54	56	{
55		space->machine->generic.colorram.u8[offset] = data;
	57	trucocl_colorram[offset] = data;
56	58	tilemap_mark_tile_dirty(bg_tilemap, offset);
57	59	}
58	60
59	61	static TILE_GET_INFO( get_bg_tile_info )
60	62	{
61		int gfxsel = machine->generic.colorram.u8[tile_index] & 1;
62		int bank = ( ( machine->generic.colorram.u8[tile_index] >> 2 ) & 0x07 );
63		int code = machine->generic.videoram.u8[tile_index];
64		int colour = (machine->generic.colorram.u8[tile_index] & 2) >> 1;
	63	int gfxsel = trucocl_colorram[tile_index] & 1;
	64	int bank = ( ( trucocl_colorram[tile_index] >> 2 ) & 0x07 );
	65	int code = trucocl_videoram[tile_index];
	66	int colour = (trucocl_colorram[tile_index] & 2) >> 1;
65	67
66	68	code |= ( bank & 1 ) << 10;
67	69	code |= ( bank & 2 ) << 8;

src/mame/video/rallyx.c

r6740	r6741
302	302	{
303	303	int color = (~(generator >> 8)) & 0x3f;
304	304
305		if (color && state->total_stars < MAX_STARS)
	305	if (color && state->total_stars < JUNGLER_MAX_STARS)
306	306	{
307	307	state->stars[state->total_stars].x = x;
308	308	state->stars[state->total_stars].y = y;

src/mame/video/unico.c

r6740	r6741
37	37	***************************************************************************/
38	38
39	39	#include "driver.h"
40		#include "unico.h"
	40	#include "includes/unico.h"
41	41
42	42	/* Variables needed by drivers: */
43	43

src/mame/video/blockhl.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5
r6740	r6741
11	11
12	12	***************************************************************************/
13	13
14		static void tile_callback(int layer,int bank,int *code,int *color, int *flags, int *priority)
	14	void blockhl_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color, int *flags, int *priority)
15	15	{
16	16	*code |= ((*color & 0x0f) << 8);
17	17	*color = layer_colorbase[layer] + ((*color & 0xe0) >> 5);
r6740	r6741
23	23
24	24	***************************************************************************/
25	25
26		static void sprite_callback(int *code,int *color,int *priority,int *shadow)
	26	void blockhl_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
27	27	{
28	28	if(*color & 0x10)
29	29	*priority = 0xfe; // under K052109_tilemap[0]
r6740	r6741
46	46	layer_colorbase[1] = 16;
47	47	layer_colorbase[2] = 32;
48	48	sprite_colorbase = 48;
49
50		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
51		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
52	49	}
53	50
54	51
55	52	VIDEO_UPDATE( blockhl )
56	53	{
	54	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	55	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
	56
57	57	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
58	58
59		K052109_tilemap_update();
	59	k052109_tilemap_update(k052109);
60	60
61		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],TILEMAP_DRAW_OPAQUE,0);
62		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,1);
63		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,2);
	61	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, TILEMAP_DRAW_OPAQUE, 0);   // tile 2
	62	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 1);   // tile 1
	63	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 2);   // tile 0
64	64
65		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,-1); // draw sprites with pdrawgfx
	65	k051960_sprites_draw(k051960, bitmap,cliprect,0,-1);
66	66	return 0;
67	67	}

src/mame/video/realbrk.c

r6740	r6741
20	20	***************************************************************************/
21	21
22	22	#include "driver.h"
23		#include "realbrk.h"
	23	#include "includes/realbrk.h"
24	24
25		//UINT16 *realbrk_vram_0, *realbrk_vram_1, *realbrk_vram_2, *realbrk_vregs;
26	25	UINT16 *realbrk_vram_0, *realbrk_vram_1, *realbrk_vram_2, *realbrk_vregs, *realbrk_vram_0ras, *realbrk_vram_1ras;
27	26	static bitmap_t *tmpbitmap0 = NULL;
28	27	static bitmap_t *tmpbitmap1 = NULL;

src/mame/video/carjmbre.c

r6740	r6741
6	6	***************************************************************************/
7	7
8	8	#include "driver.h"
9		#include "carjmbre.h"
	9	#include "includes/carjmbre.h"
10	10
11	11	PALETTE_INIT( carjmbre )
12	12	{

src/mame/video/bottom9.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5
r6740	r6741
14	14
15	15	***************************************************************************/
16	16
17		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	17	void bottom9_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
18	18	{
19	19	*code |= (*color & 0x3f) << 8;
20	20	*color = layer_colorbase[layer] + ((*color & 0xc0) >> 6);
r6740	r6741
27	27
28	28	***************************************************************************/
29	29
30		static void sprite_callback(int *code,int *color,int *priority,int *shadow)
	30	void bottom9_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
31	31	{
32	32	/* bit 4 = priority over zoom (0 = have priority) */
33	33	/* bit 5 = priority over B (1 = have priority) */
r6740	r6741
42	42
43	43	***************************************************************************/
44	44
45		static void zoom_callback(int *code,int *color,int *flags)
	45	void bottom9_zoom_callback(running_machine *machine, int *code,int *color,int *flags)
46	46	{
47	47	*flags = (*color & 0x40) ? TILE_FLIPX : 0;
48	48	*code |= ((*color & 0x03) << 8);
r6740	r6741
63	63	layer_colorbase[2] = 16;
64	64	sprite_colorbase = 32;
65	65	zoom_colorbase = 48;
66		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
67		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
68		K051316_vh_start_0(machine,"gfx3",4,FALSE,0,zoom_callback);
69	66	}
70	67
71	68
r6740	r6741
78	75
79	76	VIDEO_UPDATE( bottom9 )
80	77	{
81		K052109_tilemap_update();
	78	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	79	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
	80	const device_config *k051316 = devtag_get_device(screen->machine, "k051316");
82	81
	82	k052109_tilemap_update(k052109);
	83
83	84	/* note: FIX layer is not used */
84	85	bitmap_fill(bitmap,cliprect,layer_colorbase[1]);
85	86	//  if (bottom9_video_enable)
86	87	{
87		K051960_sprites_draw(screen->machine,bitmap,cliprect,1,1);
88		K051316_zoom_draw_0(bitmap,cliprect,0,0);
89		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
90		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,0);
	88	k051960_sprites_draw(k051960, bitmap, cliprect, 1, 1);
	89	k051316_zoom_draw(k051316, bitmap, cliprect, 0, 0);
	90	k051960_sprites_draw(k051960, bitmap, cliprect, 0, 0);
	91	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 0);
91	92	/* note that priority 3 is opposite to the basic layer priority! */
92	93	/* (it IS used, but hopefully has no effect) */
93		K051960_sprites_draw(screen->machine,bitmap,cliprect,2,3);
94		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,0);
	94	k051960_sprites_draw(k051960, bitmap, cliprect, 2, 3);
	95	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 0);
95	96	}
96	97	return 0;
97	98	}

src/mame/video/mainevt.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "video/konamiic.h"
	10	#include "video/konicdev.h"
11	11
12	12
13	13	static int layer_colorbase[3],sprite_colorbase;
r6740	r6741
20	20
21	21	***************************************************************************/
22	22
23		static void mainevt_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	23	void mainevt_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
24	24	{
25	25	*flags = (*color & 0x02) ? TILE_FLIPX : 0;
26	26
r6740	r6741
30	30	*color = layer_colorbase[layer] + ((*color & 0xc0) >> 6);
31	31	}
32	32
33		static void dv_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	33	void dv_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
34	34	{
35	35	/* (color & 0x02) is flip y handled internally by the 052109 */
36	36	*code |= ((*color & 0x01) << 8) | ((*color & 0x3c) << 7);
r6740	r6741
44	44
45	45	***************************************************************************/
46	46
47		static void mainevt_sprite_callback(int *code,int *color,int *priority_mask,int *shadow)
	47	void mainevt_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow)
48	48	{
49	49	/* bit 5 = priority over layer B (has precedence) */
50	50	/* bit 6 = HALF priority over layer B (used for crowd when you get out of the ring) */
r6740	r6741
56	56	*color = sprite_colorbase + (*color & 0x03);
57	57	}
58	58
59		static void dv_sprite_callback(int *code,int *color,int *priority,int *shadow)
	59	void dv_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
60	60	{
61	61	/* TODO: the priority/shadow handling (bits 5-7) seems to be quite complex (see PROM) */
62	62	*color = sprite_colorbase + (*color & 0x07);
r6740	r6741
71	71	layer_colorbase[1] = 8;
72	72	layer_colorbase[2] = 4;
73	73	sprite_colorbase = 12;
74
75		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,mainevt_tile_callback);
76		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,mainevt_sprite_callback);
77	74	}
78	75
79	76	VIDEO_START( dv )
r6740	r6741
82	79	layer_colorbase[1] = 0;
83	80	layer_colorbase[2] = 4;
84	81	sprite_colorbase = 8;
85
86		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,dv_tile_callback);
87		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,dv_sprite_callback);
88	82	}
89	83
90	84	/*****************************************************************************/
91	85
92	86	VIDEO_UPDATE( mainevt )
93	87	{
94		K052109_tilemap_update();
	88	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	89	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
95	90
	91	k052109_tilemap_update(k052109);
	92
96	93	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
97		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],TILEMAP_DRAW_OPAQUE,1);
98		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],1,2);   /* low priority part of layer */
99		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,4);   /* high priority part of layer */
100		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,8);
	94	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE, 1);
	95	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 1, 2);   /* low priority part of layer */
	96	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 4);   /* high priority part of layer */
	97	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 8);
101	98
102		K051960_sprites_draw(screen->machine,bitmap,cliprect,-1,-1);
	99	k051960_sprites_draw(k051960, bitmap, cliprect, -1, -1);
103	100	return 0;
104	101	}
105	102
106	103	VIDEO_UPDATE( dv )
107	104	{
108		K052109_tilemap_update();
	105	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	106	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
109	107
110		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],TILEMAP_DRAW_OPAQUE,0);
111		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,0);
112		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
113		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,0);
	108	k052109_tilemap_update(k052109);
	109
	110	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE, 0);
	111	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 0);
	112	k051960_sprites_draw(k051960, bitmap, cliprect, 0, 0);
	113	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 0);
114	114	return 0;
115	115	}

src/mame/video/megazone.c

r6740	r6741
13	13	UINT8 *megazone_scrolly;
14	14	static int flipscreen;
15	15
	16	UINT8 *megazone_videoram;
	17	UINT8 *megazone_colorram;
16	18	UINT8 *megazone_videoram2;
17	19	UINT8 *megazone_colorram2;
	20	size_t megazone_videoram_size;
18	21	size_t megazone_videoram2_size;
19	22
20	23	/***************************************************************************
r6740	r6741
119	122	int x,y;
120	123
121	124	/* for every character in the Video RAM */
122		for (offs = screen->machine->generic.videoram_size - 1;offs >= 0;offs--)
	125	for (offs = megazone_videoram_size - 1;offs >= 0;offs--)
123	126	{
124	127	int sx,sy,flipx,flipy;
125	128
126	129	sx = offs % 32;
127	130	sy = offs / 32;
128		flipx = screen->machine->generic.colorram.u8[offs] & (1<<6);
129		flipy = screen->machine->generic.colorram.u8[offs] & (1<<5);
	131	flipx = megazone_colorram[offs] & (1<<6);
	132	flipy = megazone_colorram[offs] & (1<<5);
130	133	if (flipscreen)
131	134	{
132	135	sx = 31 - sx;
r6740	r6741
136	139	}
137	140
138	141	drawgfx_opaque(screen->machine->generic.tmpbitmap,0,screen->machine->gfx[1],
139		((int)screen->machine->generic.videoram.u8[offs]) + ((screen->machine->generic.colorram.u8[offs] & (1<<7) ? 256 : 0) ),
140		(screen->machine->generic.colorram.u8[offs] & 0x0f) + 0x10,
	142	((int)megazone_videoram[offs]) + ((megazone_colorram[offs] & (1<<7) ? 256 : 0) ),
	143	(megazone_colorram[offs] & 0x0f) + 0x10,
141	144	flipx,flipy,
142	145	8*sx,8*sy);
143	146	}

src/mame/video/nbmj8688.c

r6740	r6741
7	7	******************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "nb1413m3.h"
	10	#include "includes/nb1413m3.h"
11	11	#include "includes/nbmj8688.h"
12	12
13	13

src/mame/video/8080bw.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "8080bw.h"
11		#include "mw8080bw.h"
	10	#include "includes/mw8080bw.h"
12	11
13	12
14	13	#define NUM_PENS   (8)
15	14
16	15
17		UINT8 *c8080bw_colorram;
18
19		static UINT8 c8080bw_flip_screen;
20		static UINT8 color_map;
21		static UINT8 screen_red;
22		static UINT8 schaser_background_disable;
23		static UINT8 schaser_background_select;
24
25	16	MACHINE_START( extra_8080bw_vh )
26	17	{
27		state_save_register_global(machine, c8080bw_flip_screen);
28		state_save_register_global(machine, color_map);
29		state_save_register_global(machine, screen_red);
	18	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
30	19
31		// These two only belong to schaser, but for simplicity's sake let's waste
32		// two bytes in other drivers' .sta files.
33		state_save_register_global(machine, schaser_background_disable);
34		state_save_register_global(machine, schaser_background_select);
35		}
	20	state_save_register_global(machine, state->c8080bw_flip_screen);
	21	state_save_register_global(machine, state->color_map);
	22	state_save_register_global(machine, state->screen_red);
36	23
37		void c8080bw_flip_screen_w(const address_space *space, int data)
38		{
39		color_map = data;
40		c8080bw_flip_screen = data && (input_port_read(space->machine, CABINET_PORT_TAG) & 0x01);
	24	// These two only belong to schaser, but for simplicity's sake let's waste
	25	// two bytes in other drivers' .sta files.
	26	state_save_register_global(machine, state->schaser_background_disable);
	27	state_save_register_global(machine, state->schaser_background_select);
41	28	}
42	29
43	30
44		void lupin3_flip_screen_w(const address_space *space, int data)
	31	static void invadpt2_get_pens( pen_t *pens )
45	32	{
46		color_map = data & 0x40;
47		c8080bw_flip_screen = (data & 0x20) && (input_port_read(space->machine, "IN2") & 0x04);
48		}
49
50
51		void c8080bw_screen_red_w(int data)
52		{
53		screen_red = data;
54		}
55
56
57		void schaser_background_control_w(int data)
58		{
59		schaser_background_disable = (data >> 3) & 0x01;
60		schaser_background_select = (data >> 4) & 0x01;
61		}
62
63
64		static void invadpt2_get_pens(pen_t *pens)
65		{
66	33	offs_t i;
67	34
68	35	for (i = 0; i < NUM_PENS; i++)
r6740	r6741
72	39	}
73	40
74	41
75		static void sflush_get_pens(pen_t *pens)
	42	static void sflush_get_pens( pen_t *pens )
76	43	{
77	44	offs_t i;
78	45
r6740	r6741
85	52	}
86	53
87	54
88		static void cosmo_get_pens(pen_t *pens)
	55	static void cosmo_get_pens( pen_t *pens )
89	56	{
90	57	offs_t i;
91	58
r6740	r6741
96	63	}
97	64
98	65
99		INLINE void set_pixel(bitmap_t *bitmap, UINT8 y, UINT8 x, pen_t *pens, UINT8 color)
	66	INLINE void set_pixel( running_machine *machine, bitmap_t *bitmap, UINT8 y, UINT8 x, pen_t *pens, UINT8 color )
100	67	{
	68	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	69
101	70	if (y >= MW8080BW_VCOUNTER_START_NO_VBLANK)
102	71	{
103		if (c8080bw_flip_screen)
	72	if (state->c8080bw_flip_screen)
104	73	*BITMAP_ADDR32(bitmap, MW8080BW_VBSTART - 1 - (y - MW8080BW_VCOUNTER_START_NO_VBLANK), MW8080BW_HPIXCOUNT - 1 - x) = pens[color];
105	74	else
106	75	*BITMAP_ADDR32(bitmap, y - MW8080BW_VCOUNTER_START_NO_VBLANK, x) = pens[color];
r6740	r6741
108	77	}
109	78
110	79
111		INLINE void set_8_pixels(bitmap_t *bitmap, UINT8 y, UINT8 x, UINT8 data,
112		pen_t *pens, UINT8 fore_color, UINT8 back_color)
	80	INLINE void set_8_pixels( running_machine *machine, bitmap_t *bitmap, UINT8 y, UINT8 x, UINT8 data, pen_t *pens, UINT8 fore_color, UINT8 back_color )
113	81	{
114	82	int i;
115	83
116	84	for (i = 0; i < 8; i++)
117	85	{
118		set_pixel(bitmap, y, x, pens, (data & 0x01) ? fore_color : back_color);
	86	set_pixel(machine, bitmap, y, x, pens, (data & 0x01) ? fore_color : back_color);
119	87
120	88	x = x + 1;
121	89	data = data >> 1;
r6740	r6741
124	92
125	93
126	94	/* this is needed as this driver doesn't emulate the shift register like mw8080bw does */
127		static void clear_extra_columns(bitmap_t *bitmap, pen_t *pens, UINT8 color)
	95	static void clear_extra_columns( running_machine *machine, bitmap_t *bitmap, pen_t *pens, UINT8 color )
128	96	{
	97	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
129	98	UINT8 x;
130	99
131	100	for (x = 0; x < 4; x++)
r6740	r6741
134	103
135	104	for (y = MW8080BW_VCOUNTER_START_NO_VBLANK; y != 0; y++)
136	105	{
137		if (c8080bw_flip_screen)
	106	if (state->c8080bw_flip_screen)
138	107	*BITMAP_ADDR32(bitmap, MW8080BW_VBSTART - 1 - (y - MW8080BW_VCOUNTER_START_NO_VBLANK), MW8080BW_HPIXCOUNT - 1 - (256 + x)) = pens[color];
139	108	else
140	109	*BITMAP_ADDR32(bitmap, y - MW8080BW_VCOUNTER_START_NO_VBLANK, 256 + x) = pens[color];
r6740	r6741
145	114
146	115	VIDEO_UPDATE( invadpt2 )
147	116	{
	117	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
148	118	pen_t pens[NUM_PENS];
149	119	offs_t offs;
150	120	UINT8 *prom;
r6740	r6741
153	123	invadpt2_get_pens(pens);
154	124
155	125	prom = memory_region(screen->machine, "proms");
156		color_map_base = color_map ? &prom[0x0400] : &prom[0x0000];
	126	color_map_base = state->color_map ? &prom[0x0400] : &prom[0x0000];
157	127
158		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	128	for (offs = 0; offs < state->main_ram_size; offs++)
159	129	{
160	130	UINT8 y = offs >> 5;
161	131	UINT8 x = offs << 3;
162	132
163	133	offs_t color_address = (offs >> 8 << 5) | (offs & 0x1f);
164	134
165		UINT8 data = mw8080bw_ram[offs];
166		UINT8 fore_color = screen_red ? 1 : color_map_base[color_address] & 0x07;
	135	UINT8 data = state->main_ram[offs];
	136	UINT8 fore_color = state->screen_red ? 1 : color_map_base[color_address] & 0x07;
167	137
168		set_8_pixels(bitmap, y, x, data, pens, fore_color, 0);
	138	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, 0);
169	139	}
170	140
171		clear_extra_columns(bitmap, pens, 0);
	141	clear_extra_columns(screen->machine, bitmap, pens, 0);
172	142
173	143	return 0;
174	144	}
r6740	r6741
176	146
177	147	VIDEO_UPDATE( ballbomb )
178	148	{
	149	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
179	150	pen_t pens[NUM_PENS];
180	151	offs_t offs;
181	152	UINT8 *color_map_base;
r6740	r6741
184	155	invadpt2_get_pens(pens);
185	156
186	157	prom = memory_region(screen->machine, "proms");
187		color_map_base = color_map ? &prom[0x0400] : &prom[0x0000];
	158	color_map_base = state->color_map ? &prom[0x0400] : &prom[0x0000];
188	159
189		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	160	for (offs = 0; offs < state->main_ram_size; offs++)
190	161	{
191	162	UINT8 y = offs >> 5;
192	163	UINT8 x = offs << 3;
193	164
194	165	offs_t color_address = (offs >> 8 << 5) | (offs & 0x1f);
195	166
196		UINT8 data = mw8080bw_ram[offs];
197		UINT8 fore_color = screen_red ? 1 : color_map_base[color_address] & 0x07;
	167	UINT8 data = state->main_ram[offs];
	168	UINT8 fore_color = state->screen_red ? 1 : color_map_base[color_address] & 0x07;
198	169
199	170	/* blue background */
200		set_8_pixels(bitmap, y, x, data, pens, fore_color, 2);
	171	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, 2);
201	172	}
202	173
203		clear_extra_columns(bitmap, pens, 2);
	174	clear_extra_columns(screen->machine, bitmap, pens, 2);
204	175
205	176	return 0;
206	177	}
r6740	r6741
208	179
209	180	VIDEO_UPDATE( schaser )
210	181	{
	182	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
211	183	pen_t pens[NUM_PENS];
212	184	offs_t offs;
213	185	UINT8 *background_map_base;
r6740	r6741
216	188
217	189	background_map_base = memory_region(screen->machine, "proms");
218	190
219		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	191	for (offs = 0; offs < state->main_ram_size; offs++)
220	192	{
221	193	UINT8 back_color = 0;
222	194
223	195	UINT8 y = offs >> 5;
224	196	UINT8 x = offs << 3;
225	197
226		UINT8 data = mw8080bw_ram[offs];
227		UINT8 fore_color = c8080bw_colorram[offs & 0x1f9f] & 0x07;
	198	UINT8 data = state->main_ram[offs];
	199	UINT8 fore_color = state->colorram[offs & 0x1f9f] & 0x07;
228	200
229		if (!schaser_background_disable)
	201	if (!state->schaser_background_disable)
230	202	{
231	203	offs_t back_address = (offs >> 8 << 5) | (offs & 0x1f);
232	204
r6740	r6741
234	206
235	207	/* the equations derived from the schematics don't appear to produce
236	208	the right colors, but this one does, at least for this PROM */
237		back_color = (((back_data & 0x0c) == 0x0c) && schaser_background_select) ? 4 : 2;
	209	back_color = (((back_data & 0x0c) == 0x0c) && state->schaser_background_select) ? 4 : 2;
238	210	}
239	211
240		set_8_pixels(bitmap, y, x, data, pens, fore_color, back_color);
	212	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, back_color);
241	213	}
242	214
243		clear_extra_columns(bitmap, pens, schaser_background_disable ? 0 : 2);
	215	clear_extra_columns(screen->machine, bitmap, pens, state->schaser_background_disable ? 0 : 2);
244	216
245	217	return 0;
246	218	}
r6740	r6741
248	220
249	221	VIDEO_UPDATE( schasrcv )
250	222	{
	223	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
251	224	pen_t pens[NUM_PENS];
252	225	offs_t offs;
253	226
254	227	invadpt2_get_pens(pens);
255	228
256		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	229	for (offs = 0; offs < state->main_ram_size; offs++)
257	230	{
258	231	UINT8 y = offs >> 5;
259	232	UINT8 x = offs << 3;
260	233
261		UINT8 data = mw8080bw_ram[offs];
262		UINT8 fore_color = c8080bw_colorram[offs & 0x1f9f] & 0x07;
	234	UINT8 data = state->main_ram[offs];
	235	UINT8 fore_color = state->colorram[offs & 0x1f9f] & 0x07;
263	236
264	237	/* blue background */
265		set_8_pixels(bitmap, y, x, data, pens, fore_color, 2);
	238	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, 2);
266	239	}
267	240
268		clear_extra_columns(bitmap, pens, 2);
	241	clear_extra_columns(screen->machine, bitmap, pens, 2);
269	242
270	243	return 0;
271	244	}
r6740	r6741
273	246
274	247	VIDEO_UPDATE( rollingc )
275	248	{
	249	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
276	250	pen_t pens[NUM_PENS];
277	251	offs_t offs;
278	252
279	253	invadpt2_get_pens(pens);
280	254
281		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	255	for (offs = 0; offs < state->main_ram_size; offs++)
282	256	{
283	257	UINT8 y = offs >> 5;
284	258	UINT8 x = offs << 3;
285	259
286		UINT8 data = mw8080bw_ram[offs];
287		UINT8 fore_color = c8080bw_colorram[offs & 0x1f1f] & 0x07;
	260	UINT8 data = state->main_ram[offs];
	261	UINT8 fore_color = state->colorram[offs & 0x1f1f] & 0x07;
288	262
289		set_8_pixels(bitmap, y, x, data, pens, fore_color, 0);
	263	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, 0);
290	264	}
291	265
292		clear_extra_columns(bitmap, pens, 0);
	266	clear_extra_columns(screen->machine, bitmap, pens, 0);
293	267
294	268	return 0;
295	269	}
r6740	r6741
297	271
298	272	VIDEO_UPDATE( polaris )
299	273	{
	274	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
300	275	pen_t pens[NUM_PENS];
301	276	offs_t offs;
302	277	UINT8 *color_map_base;
r6740	r6741
307	282	color_map_base = memory_region(screen->machine, "proms");
308	283	cloud_gfx = memory_region(screen->machine, "user1");
309	284
310		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	285	for (offs = 0; offs < state->main_ram_size; offs++)
311	286	{
312	287	UINT8 y = offs >> 5;
313	288	UINT8 x = offs << 3;
314	289
315		UINT8 data = mw8080bw_ram[offs];
	290	UINT8 data = state->main_ram[offs];
316	291
317	292	offs_t color_address = (offs >> 8 << 5) | (offs & 0x1f);
318	293
r6740	r6741
323	298	bits 1 and 2 are marked 'not use' (sic) */
324	299
325	300	UINT8 back_color = (color_map_base[color_address] & 0x01) ? 6 : 2;
326		UINT8 fore_color = ~c8080bw_colorram[offs & 0x1f9f] & 0x07;
	301	UINT8 fore_color = ~state->colorram[offs & 0x1f9f] & 0x07;
327	302
328		UINT8 cloud_y = y - polaris_get_cloud_pos();
	303	UINT8 cloud_y = y - state->polaris_cloud_pos;
329	304
330	305	if ((color_map_base[color_address] & 0x08) || (cloud_y >= 64))
331	306	{
332		set_8_pixels(bitmap, y, x, data, pens, fore_color, back_color);
	307	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, back_color);
333	308	}
334	309	else
335	310	{
r6740	r6741
352	327	color = (cloud_gfx[cloud_gfx_offs] & bit) ? 7 : back_color;
353	328	}
354	329
355		set_pixel(bitmap, y, x, pens, color);
	330	set_pixel(screen->machine, bitmap, y, x, pens, color);
356	331
357	332	x = x + 1;
358	333	data = data >> 1;
r6740	r6741
360	335	}
361	336	}
362	337
363		clear_extra_columns(bitmap, pens, 6);
	338	clear_extra_columns(screen->machine, bitmap, pens, 6);
364	339
365	340	return 0;
366	341	}
r6740	r6741
368	343
369	344	VIDEO_UPDATE( lupin3 )
370	345	{
	346	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
371	347	pen_t pens[NUM_PENS];
372	348	offs_t offs;
373	349
374	350	invadpt2_get_pens(pens);
375	351
376		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	352	for (offs = 0; offs < state->main_ram_size; offs++)
377	353	{
378	354	UINT8 y = offs >> 5;
379	355	UINT8 x = offs << 3;
380	356
381		UINT8 data = mw8080bw_ram[offs];
382		UINT8 fore_color = ~c8080bw_colorram[offs & 0x1f9f] & 0x07;
	357	UINT8 data = state->main_ram[offs];
	358	UINT8 fore_color = ~state->colorram[offs & 0x1f9f] & 0x07;
383	359
384		set_8_pixels(bitmap, y, x, data, pens, fore_color, 0);
	360	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, 0);
385	361	}
386	362
387		clear_extra_columns(bitmap, pens, 0);
	363	clear_extra_columns(screen->machine, bitmap, pens, 0);
388	364
389	365	return 0;
390	366	}
r6740	r6741
392	368
393	369	VIDEO_UPDATE( cosmo )
394	370	{
	371	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
395	372	pen_t pens[NUM_PENS];
396	373	offs_t offs;
397	374
398	375	cosmo_get_pens(pens);
399	376
400		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	377	for (offs = 0; offs < state->main_ram_size; offs++)
401	378	{
402	379	UINT8 y = offs >> 5;
403	380	UINT8 x = offs << 3;
404	381
405	382	offs_t color_address = (offs >> 8 << 5) | (offs & 0x1f);
406	383
407		UINT8 data = mw8080bw_ram[offs];
408		UINT8 fore_color = c8080bw_colorram[color_address] & 0x07;
	384	UINT8 data = state->main_ram[offs];
	385	UINT8 fore_color = state->colorram[color_address] & 0x07;
409	386
410		set_8_pixels(bitmap, y, x, data, pens, fore_color, 0);
	387	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, 0);
411	388	}
412	389
413		clear_extra_columns(bitmap, pens, 0);
	390	clear_extra_columns(screen->machine, bitmap, pens, 0);
414	391
415	392	return 0;
416	393	}
r6740	r6741
418	395
419	396	VIDEO_UPDATE( indianbt )
420	397	{
	398	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
421	399	pen_t pens[NUM_PENS];
422	400	offs_t offs;
423	401	UINT8 *color_map_base;
r6740	r6741
426	404	cosmo_get_pens(pens);
427	405
428	406	prom = memory_region(screen->machine, "proms");
429		color_map_base = color_map ? &prom[0x0400] : &prom[0x0000];
	407	color_map_base = state->color_map ? &prom[0x0400] : &prom[0x0000];
430	408
431		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	409	for (offs = 0; offs < state->main_ram_size; offs++)
432	410	{
433	411	UINT8 y = offs >> 5;
434	412	UINT8 x = offs << 3;
435	413
436	414	offs_t color_address = (offs >> 8 << 5) | (offs & 0x1f);
437	415
438		UINT8 data = mw8080bw_ram[offs];
	416	UINT8 data = state->main_ram[offs];
439	417	UINT8 fore_color = color_map_base[color_address] & 0x07;
440	418
441		set_8_pixels(bitmap, y, x, data, pens, fore_color, 0);
	419	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, 0);
442	420	}
443	421
444		clear_extra_columns(bitmap, pens, 0);
	422	clear_extra_columns(screen->machine, bitmap, pens, 0);
445	423
446	424	return 0;
447	425	}
r6740	r6741
449	427
450	428	VIDEO_UPDATE( shuttlei )
451	429	{
	430	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
452	431	pen_t pens[2] = { RGB_BLACK, RGB_WHITE };
453	432	offs_t offs;
454	433
455		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	434	for (offs = 0; offs < state->main_ram_size; offs++)
456	435	{
457	436	int i;
458	437
459	438	UINT8 y = offs >> 5;
460	439	UINT8 x = offs << 3;
461	440
462		UINT8 data = mw8080bw_ram[offs];
	441	UINT8 data = state->main_ram[offs];
463	442
464	443	for (i = 0; i < 8; i++)
465	444	{
r6740	r6741
471	450	}
472	451	}
473	452
474		clear_extra_columns(bitmap, pens, 0);
	453	clear_extra_columns(screen->machine, bitmap, pens, 0);
475	454
476	455	return 0;
477	456	}
r6740	r6741
479	458
480	459	VIDEO_UPDATE( sflush )
481	460	{
	461	mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data;
482	462	pen_t pens[NUM_PENS];
483	463	offs_t offs;
484	464
485	465	sflush_get_pens(pens);
486	466
487		for (offs = 0; offs < mw8080bw_ram_size; offs++)
	467	for (offs = 0; offs < state->main_ram_size; offs++)
488	468	{
489	469	UINT8 y = offs >> 5;
490	470	UINT8 x = offs << 3;
491	471
492		UINT8 data = mw8080bw_ram[offs];
493		UINT8 fore_color = c8080bw_colorram[offs & 0x1f9f] & 0x07;
	472	UINT8 data = state->main_ram[offs];
	473	UINT8 fore_color = state->colorram[offs & 0x1f9f] & 0x07;
494	474
495		set_8_pixels(bitmap, y, x, data, pens, fore_color, 0);
	475	set_8_pixels(screen->machine, bitmap, y, x, data, pens, fore_color, 0);
496	476	}
497	477
498		clear_extra_columns(bitmap, pens, 0);
	478	clear_extra_columns(screen->machine, bitmap, pens, 0);
499	479
500	480	return 0;
501	481	}

src/mame/video/tail2nos.c

r6740	r6741
1	1	#include "driver.h"
2		#include "konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	UINT16 *tail2nos_bgvideoram;
r6740	r6741
36	36
37	37	***************************************************************************/
38	38
39		static void zoom_callback(int *code,int *color,int *flags)
	39	void tail2nos_zoom_callback(running_machine *machine, int *code,int *color,int *flags)
40	40	{
41	41	*code |= ((*color & 0x03) << 8);
42	42	*color = 32 + ((*color & 0x38) >> 3);
r6740	r6741
52	52	{
53	53	bg_tilemap = tilemap_create(machine, get_tile_info,tilemap_scan_rows,8,8,64,32);
54	54
55		K051316_vh_start_0(machine,"gfx3",-4,TRUE,0,zoom_callback);
56
57	55	tilemap_set_transparent_pen(bg_tilemap,15);
58	56
59		K051316_wraparound_enable(0,1);
60		K051316_set_offset(0,-89,-14);
61	57	zoomdata = (UINT16 *)memory_region(machine, "gfx3");
62	58	}
63	59
r6740	r6741
157	153
158	154	VIDEO_UPDATE( tail2nos )
159	155	{
	156	const device_config *k051316 = devtag_get_device(screen->machine, "k051316");
	157
160	158	if (video_enable)
161	159	{
162		K051316_zoom_draw_0(bitmap,cliprect,0,0);
163		draw_sprites(screen->machine, bitmap,cliprect);
164		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
	160	k051316_zoom_draw(k051316, bitmap,cliprect, 0, 0);
	161	draw_sprites(screen->machine, bitmap, cliprect);
	162	tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
165	163	}
166	164	else
167		bitmap_fill(bitmap,cliprect,0);
	165	bitmap_fill(bitmap, cliprect, 0);
	166
168	167	return 0;
169	168	}

src/mame/video/mrjong.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10
	11	UINT8 *mrjong_videoram;
	12	UINT8 *mrjong_colorram;
11	13	static tilemap *bg_tilemap;
12	14
13	15	/***************************************************************************
r6740	r6741
68	70	***************************************************************************/
69	71	WRITE8_HANDLER( mrjong_videoram_w )
70	72	{
71		space->machine->generic.videoram.u8[offset] = data;
	73	mrjong_videoram[offset] = data;
72	74	tilemap_mark_tile_dirty(bg_tilemap, offset);
73	75	}
74	76
75	77	WRITE8_HANDLER( mrjong_colorram_w )
76	78	{
77		space->machine->generic.colorram.u8[offset] = data;
	79	mrjong_colorram[offset] = data;
78	80	tilemap_mark_tile_dirty(bg_tilemap, offset);
79	81	}
80	82
r6740	r6741
89	91
90	92	static TILE_GET_INFO( get_bg_tile_info )
91	93	{
92		int code = machine->generic.videoram.u8[tile_index] | ((machine->generic.colorram.u8[tile_index] & 0x20) << 3);
93		int color = machine->generic.colorram.u8[tile_index] & 0x1f;
94		int flags = ((machine->generic.colorram.u8[tile_index] & 0x40) ? TILE_FLIPX : 0) | ((machine->generic.colorram.u8[tile_index] & 0x80) ? TILE_FLIPY : 0);
	94	int code = mrjong_videoram[tile_index] | ((mrjong_colorram[tile_index] & 0x20) << 3);
	95	int color = mrjong_colorram[tile_index] & 0x1f;
	96	int flags = ((mrjong_colorram[tile_index] & 0x40) ? TILE_FLIPX : 0) | ((mrjong_colorram[tile_index] & 0x80) ? TILE_FLIPY : 0);
95	97
96	98	SET_TILE_INFO(0, code, color, flags);
97	99	}
r6740	r6741
115	117	int sx, sy;
116	118	int flipx, flipy;
117	119
118		sprt = (((machine->generic.videoram.u8[offs + 1] >> 2) & 0x3f) | ((machine->generic.videoram.u8[offs + 3] & 0x20) << 1));
119		flipx = (machine->generic.videoram.u8[offs + 1] & 0x01) >> 0;
120		flipy = (machine->generic.videoram.u8[offs + 1] & 0x02) >> 1;
121		color = (machine->generic.videoram.u8[offs + 3] & 0x1f);
	120	sprt = (((mrjong_videoram[offs + 1] >> 2) & 0x3f) | ((mrjong_videoram[offs + 3] & 0x20) << 1));
	121	flipx = (mrjong_videoram[offs + 1] & 0x01) >> 0;
	122	flipy = (mrjong_videoram[offs + 1] & 0x02) >> 1;
	123	color = (mrjong_videoram[offs + 3] & 0x1f);
122	124
123		sx = 224 - machine->generic.videoram.u8[offs + 2];
124		sy = machine->generic.videoram.u8[offs + 0];
	125	sx = 224 - mrjong_videoram[offs + 2];
	126	sy = mrjong_videoram[offs + 0];
125	127	if (flip_screen_get(machine))
126	128	{
127	129	sx = 208 - sx;

src/mame/video/quasar.c

r6740	r6741
15	15	***************************************************************************/
16	16
17	17	#include "driver.h"
18		#include "cvs.h"
19	18	#include "video/s2636.h"
20	19	#include "cpu/s2650/s2650.h"
	20	#include "includes/cvs.h"
21	21
22
23		UINT8 *quasar_effectram;
24		UINT8 quasar_effectcontrol;
25
26	22	PALETTE_INIT( quasar )
27	23	{
28	24	int i;
r6740	r6741
96	92
97	93	VIDEO_START( quasar )
98	94	{
99		quasar_effectram = auto_alloc_array(machine, UINT8, 0x400);
	95	cvs_state *state = (cvs_state *)machine->driver_data;
	96	state->effectram = auto_alloc_array(machine, UINT8, 0x400);
100	97
101		/* create helper bitmaps */
102		cvs_collision_background = video_screen_auto_bitmap_alloc(machine->primary_screen);
	98	/* create helper bitmap */
	99	state->collision_background = video_screen_auto_bitmap_alloc(machine->primary_screen);
	100
	101	/* register save */
	102	state_save_register_global_bitmap(machine, state->collision_background);
	103	state_save_register_global_pointer(machine, state->effectram, 0x400);
103	104	}
104	105
105	106	VIDEO_UPDATE( quasar )
106	107	{
	108	cvs_state *state = (cvs_state *)screen->machine->driver_data;
107	109	int offs;
108		bitmap_t *s2636_0_bitmap;
109		bitmap_t *s2636_1_bitmap;
110		bitmap_t *s2636_2_bitmap;
111		const device_config *s2636_0 = devtag_get_device(screen->machine, "s2636_0");
112		const device_config *s2636_1 = devtag_get_device(screen->machine, "s2636_1");
113		const device_config *s2636_2 = devtag_get_device(screen->machine, "s2636_2");
	110	bitmap_t *s2636_0_bitmap, *s2636_1_bitmap, *s2636_2_bitmap;
114	111
115	112	/* for every character in the video RAM */
116	113	for (offs = 0; offs < 0x0400; offs++)
117	114	{
118	115	int ox, oy;
119		UINT8 code = cvs_video_ram[offs];
120
	116	UINT8 code = state->video_ram[offs];
121	117	UINT8 x = (offs & 0x1f) << 3;
122	118	UINT8 y = (offs >> 5) << 3;
123	119
124	120	// While we have the current character code, draw the effects layer
125	121	// intensity / on and off controlled by latch
126	122
127		int forecolor = 0x208 + quasar_effectram[offs] + (256 * (((quasar_effectcontrol >> 4) ^ 3) & 3));
	123	int forecolor = 0x208 + state->effectram[offs] + (256 * (((state->effectcontrol >> 4) ^ 3) & 3));
128	124
129		for(ox=0;ox<8;ox++)
130		for(oy=0;oy<8;oy++)
131		*BITMAP_ADDR16(bitmap, y+oy, x+ox) = forecolor;
	125	for (ox = 0; ox < 8; ox++)
	126	for (oy = 0; oy < 8; oy++)
	127	*BITMAP_ADDR16(bitmap, y + oy, x + ox) = forecolor;
132	128
133	129	/* Main Screen */
134
135	130	drawgfx_transpen(bitmap,cliprect,screen->machine->gfx[0],
136	131	code,
137		cvs_color_ram[offs] & 0x3f,
	132	state->color_ram[offs] & 0x3f,
138	133	0,0,
139	134	x,y,0);
140	135
141	136
142	137	/* background for Collision Detection (it can only hit certain items) */
143
144		if((cvs_color_ram[offs] & 7) == 0)
	138	if((state->color_ram[offs] & 7) == 0)
145	139	{
146		drawgfx_opaque(cvs_collision_background,cliprect,screen->machine->gfx[0],
	140	drawgfx_opaque(state->collision_background,cliprect,screen->machine->gfx[0],
147	141	code,
148	142	64,
149	143	0,0,
r6740	r6741
152	146	}
153	147
154	148	/* update the S2636 chips */
155		s2636_0_bitmap = s2636_update(s2636_0, cliprect);
156		s2636_1_bitmap = s2636_update(s2636_1, cliprect);
157		s2636_2_bitmap = s2636_update(s2636_2, cliprect);
	149	s2636_0_bitmap = s2636_update(state->s2636_0, cliprect);
	150	s2636_1_bitmap = s2636_update(state->s2636_1, cliprect);
	151	s2636_2_bitmap = s2636_update(state->s2636_2, cliprect);
158	152
159	153	/* Bullet Hardware */
160	154	for (offs = 8; offs < 256; offs++ )
161	155	{
162		if(cvs_bullet_ram[offs] != 0)
	156	if(state->bullet_ram[offs] != 0)
163	157	{
164	158	int ct;
165		for(ct=0;ct<1;ct++)
	159	for (ct = 0; ct < 1; ct++)
166	160	{
167		int bx=255-9-cvs_bullet_ram[offs]-ct;
	161	int bx = 255 - 9 - state->bullet_ram[offs] - ct;
168	162
169	163	/* bullet/object Collision */
170		if (*BITMAP_ADDR16(s2636_0_bitmap, offs, bx) != 0) cvs_collision_register |= 0x04;
171		if (*BITMAP_ADDR16(s2636_2_bitmap, offs, bx) != 0) cvs_collision_register |= 0x08;
	164	if (*BITMAP_ADDR16(s2636_0_bitmap, offs, bx) != 0) state->collision_register |= 0x04;
	165	if (*BITMAP_ADDR16(s2636_2_bitmap, offs, bx) != 0) state->collision_register |= 0x08;
172	166
173	167	*BITMAP_ADDR16(bitmap, offs, bx) = 7;
174	168	}
r6740	r6741
197	191	*BITMAP_ADDR16(bitmap, y, x) = S2636_PIXEL_COLOR(pixel);
198	192
199	193	/* S2636 vs. background collision detection */
200		if (colortable_entry_get_value(screen->machine->colortable, *BITMAP_ADDR16(cvs_collision_background, y, x)))
	194	if (colortable_entry_get_value(screen->machine->colortable, *BITMAP_ADDR16(state->collision_background, y, x)))
201	195	{
202		if (S2636_IS_PIXEL_DRAWN(pixel0)) cvs_collision_register |= 0x01;
203		if (S2636_IS_PIXEL_DRAWN(pixel2)) cvs_collision_register |= 0x02;
	196	if (S2636_IS_PIXEL_DRAWN(pixel0)) state->collision_register |= 0x01;
	197	if (S2636_IS_PIXEL_DRAWN(pixel2)) state->collision_register |= 0x02;
204	198	}
205	199	}
206	200	}

src/mame/video/victory.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "victory.h"
	8	#include "includes/victory.h"
9	9
10	10
11	11	/* globally-accessible storage */

src/mame/video/1943.c

r6740	r6741
28	28	***************************************************************************/
29	29
30	30	#include "driver.h"
31		#include "1943.h"
	31	#include "includes/1943.h"
32	32
33	33	/***************************************************************************
34	34

src/mame/video/cninja.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "deco16ic.h"
9		#include "cninja.h"
	8	#include "includes/deco16ic.h"
	9	#include "includes/cninja.h"
10	10
11	11	/******************************************************************************/
12	12

src/mame/video/psikyo4.c

r6740	r6741
27	27	*/
28	28
29	29	#include "driver.h"
	30	#include "includes/psikyo4.h"
30	31
31		/* defined in drivers/psikyo4.c */
32		extern UINT32 *psikyo4_vidregs;
33	32
34	33	/* --- SPRITES --- */
35		static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT32 scr )
	34	static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT32 scr )
36	35	{
37	36	/*- Sprite Format 0x0000 - 0x2bff -**
38	37
r6740	r6741
53	52
54	53	**- End Sprite Format -*/
55	54
	55	psikyo4_state *state = (psikyo4_state *)machine->driver_data;
56	56	const gfx_element *gfx = machine->gfx[0];
57		UINT32 *source = machine->generic.spriteram.u32;
58		UINT16 *list = (UINT16 *)machine->generic.spriteram.u32 + 0x2c00/2 + 0x04/2; /* 0x2c00/0x2c02 what are these for, pointers? one for each screen */
59		UINT16 listlen=(0xc00/2 - 0x04/2), listcntr=0;
	57	UINT32 *source = state->spriteram;
	58	UINT16 *list = (UINT16 *)state->spriteram + 0x2c00/2 + 0x04/2; /* 0x2c00/0x2c02 what are these for, pointers? one for each screen */
	59	UINT16 listlen = (0xc00/2 - 0x04/2), listcntr = 0;
60	60	int flipscreen1, flipscreen2;
61	61
62		flipscreen1 = (((psikyo4_vidregs[1]>>30)&2) == 2) ? 1 : 0;
63		flipscreen2 = (((psikyo4_vidregs[1]>>22)&2) == 2) ? 1 : 0;
	62	flipscreen1 = (((state->vidregs[1] >> 30) & 2) == 2) ? 1 : 0;
	63	flipscreen2 = (((state->vidregs[1] >> 22) & 2) == 2) ? 1 : 0;
64	64
65		while( listcntr < listlen )
	65	while (listcntr < listlen)
66	66	{
67	67	UINT16 listdat, sprnum, thisscreen;
68	68
r6740	r6741
75	75	/* start drawing */
76	76	if (!(listdat & 0x8000) && thisscreen) /* draw only selected screen */
77	77	{
78		int loopnum=0, i, j;
	78	int loopnum = 0, i, j;
79	79	UINT32 xpos, ypos, tnum, wide, high, colr, flipx, flipy;
80	80	int xstart, ystart, xend, yend, xinc, yinc;
81	81
82		ypos = (source[sprnum+0] & 0x03ff0000) >> 16;
83		xpos = (source[sprnum+0] & 0x000003ff) >> 00;
	82	ypos = (source[sprnum + 0] & 0x03ff0000) >> 16;
	83	xpos = (source[sprnum + 0] & 0x000003ff) >> 00;
84	84
85		high = ((source[sprnum+0] & 0xf0000000) >> (12+16)) + 1;
86		wide = ((source[sprnum+0] & 0x0000f000) >> 12) + 1;
	85	high = ((source[sprnum + 0] & 0xf0000000) >> (12 + 16)) + 1;
	86	wide = ((source[sprnum + 0] & 0x0000f000) >> 12) + 1;
87	87
88		tnum = (source[sprnum+1] & 0x0007ffff) >> 00;
	88	tnum = (source[sprnum + 1] & 0x0007ffff) >> 00;
89	89
90		colr = (source[sprnum+1] & 0x3f000000) >> 24;
91		if(scr) colr += 0x40; /* Use second copy of palette which is dimmed appropriately */
	90	colr = (source[sprnum + 1] & 0x3f000000) >> 24;
	91	if (scr)
	92	colr += 0x40; /* Use second copy of palette which is dimmed appropriately */
92	93
93		flipx = (source[sprnum+1] & 0x40000000);
94		flipy = (source[sprnum+1] & 0x80000000); /* Guess */
	94	flipx = (source[sprnum + 1] & 0x40000000);
	95	flipy = (source[sprnum + 1] & 0x80000000); /* Guess */
95	96
96		if(ypos & 0x200) ypos -= 0x400;
97		if(xpos & 0x200) xpos -= 0x400;
	97	if (ypos & 0x200) ypos -= 0x400;
	98	if (xpos & 0x200) xpos -= 0x400;
98	99
99		if((!scr && flipscreen1) || (scr && flipscreen2))
	100	if ((!scr && flipscreen1) || (scr && flipscreen2))
100	101	{
101		ypos = video_screen_get_visible_area(machine->primary_screen)->max_y+1 - ypos - high*16; /* Screen Height depends on game */
102		xpos = 40*8 - xpos - wide*16;
	102	ypos = video_screen_get_visible_area(machine->primary_screen)->max_y + 1 - ypos - high * 16; /* Screen Height depends on game */
	103	xpos = 40 * 8 - xpos - wide * 16;
103	104	flipx = !flipx;
104	105	flipy = !flipy;
105	106	}
106	107
107		if (flipx)   { xstart = wide-1;  xend = -1;    xinc = -1; }
108		else      { xstart = 0;       xend = wide;  xinc = +1; }
	108	if (flipx)   { xstart = wide - 1;  xend = -1;    xinc = -1; }
	109	else      { xstart = 0;         xend = wide;  xinc = +1; }
109	110
110		if (flipy)   { ystart = high-1;  yend = -1;     yinc = -1; }
111		else      { ystart = 0;       yend = high;   yinc = +1; }
	111	if (flipy)   { ystart = high - 1;  yend = -1;     yinc = -1; }
	112	else      { ystart = 0;         yend = high;   yinc = +1; }
112	113
113		for (j = ystart; j != yend; j += yinc) {
114		for (i = xstart; i != xend; i += xinc) {
115		drawgfx_transpen(bitmap,cliprect,gfx,tnum+loopnum,colr,flipx,flipy,xpos+16*i,ypos+16*j,0);
	114	for (j = ystart; j != yend; j += yinc)
	115	{
	116	for (i = xstart; i != xend; i += xinc)
	117	{
	118	drawgfx_transpen(bitmap, cliprect, gfx, tnum + loopnum, colr, flipx, flipy, xpos + 16 * i, ypos + 16 * j, 0);
116	119	loopnum++;
117	120	}
118	121	}
119	122	}
120	123	/* end drawing */
121	124	listcntr++;
122		if (listdat & 0x4000) break;
	125	if (listdat & 0x4000)
	126	break;
123	127	}
124	128	}
125	129
r6740	r6741
143	147
144	148	VIDEO_START( psikyo4 )
145	149	{
146		machine->gfx[0]->color_granularity=32; /* 256 colour sprites with palette selectable on 32 colour boundaries */
	150	machine->gfx[0]->color_granularity = 32; /* 256 colour sprites with palette selectable on 32 colour boundaries */
147	151	}

src/mame/video/rollrace.c

r6740	r6741
1	1	#include "driver.h"
2	2
	3	UINT8 *rollrace_videoram;
	4	UINT8 *rollrace_colorram;
3	5
4	6	static int ra_charbank[2] = { 0,0 };
5	7	static int ra_bkgpage = 0;
r6740	r6741
70	72	bitmap_fill(bitmap,cliprect,ra_bkgpen);
71	73
72	74	/* draw road */
73		for (offs = screen->machine->generic.videoram_size - 1;offs >= 0;offs--)
	75	for (offs = 0x3ff; offs >= 0; offs--)
74	76	{
75	77	if(!(ra_bkgflip))
76	78	{
r6740	r6741
138	140
139	141
140	142	/* draw foreground characters */
141		for (offs = screen->machine->generic.videoram_size - 1;offs >= 0;offs--)
	143	for (offs = 0x3ff; offs >= 0; offs--)
142	144	{
143	145
144	146	sx =  offs % 32;
145	147	sy =  offs / 32;
146	148
147		scroll = ( 8 * sy + screen->machine->generic.colorram.u8[2 * sx] ) % 256;
148		col = screen->machine->generic.colorram.u8[ sx * 2 + 1 ]&0x1f;
	149	scroll = ( 8 * sy + rollrace_colorram[2 * sx] ) % 256;
	150	col = rollrace_colorram[ sx * 2 + 1 ]&0x1f;
149	151
150	152	if (!ra_flipy)
151	153	{
r6740	r6741
155	157	if (ra_flipx) sx = 31 - sx;
156	158
157	159	drawgfx_transpen(bitmap,cliprect,screen->machine->gfx[RA_FGCHAR_BASE + ra_chrbank]  ,
158		screen->machine->generic.videoram.u8[ offs ]  ,
	160	rollrace_videoram[ offs ]  ,
159	161	col,
160	162	ra_flipx,ra_flipy,
161	163	8*sx,scroll,0);

src/mame/video/popper.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "video/resnet.h"
11		#include "popper.h"
	11	#include "includes/popper.h"
12	12
13	13
14	14	/***************************************************************************

src/mame/video/sidearms.c

r6740	r6741
12	12
13	13	UINT8 *sidearms_bg_scrollx;
14	14	UINT8 *sidearms_bg_scrolly;
	15	UINT8 *sidearms_videoram;
	16	UINT8 *sidearms_colorram;
15	17
16	18	static UINT8 *tilerom;
17	19	static int bgon, objon, staron, charon, flipon;
r6740	r6741
21	23
22	24	WRITE8_HANDLER( sidearms_videoram_w )
23	25	{
24		space->machine->generic.videoram.u8[offset] = data;
	26	sidearms_videoram[offset] = data;
25	27	tilemap_mark_tile_dirty(fg_tilemap, offset);
26	28	}
27	29
28	30	WRITE8_HANDLER( sidearms_colorram_w )
29	31	{
30		space->machine->generic.colorram.u8[offset] = data;
	32	sidearms_colorram[offset] = data;
31	33	tilemap_mark_tile_dirty(fg_tilemap, offset);
32	34	}
33	35
r6740	r6741
128	130
129	131	static TILE_GET_INFO( get_fg_tile_info )
130	132	{
131		int attr = machine->generic.colorram.u8[tile_index];
132		int code = machine->generic.videoram.u8[tile_index] + (attr<<2 & 0x300);
	133	int attr = sidearms_colorram[tile_index];
	134	int code = sidearms_videoram[tile_index] + (attr<<2 & 0x300);
133	135	int color = attr & 0x3f;
134	136
135	137	SET_TILE_INFO(0, code, color, 0);

src/mame/video/djboy.c

r6740	r6741
4	4	* video hardware for DJ Boy
5	5	*/
6	6	#include "driver.h"
7		#include "kan_pand.h"
	7	#include "video/kan_pand.h"
	8	#include "includes/djboy.h"
8	9
9		static UINT8 djboy_videoreg, djboy_scrollx, djboy_scrolly;
10		static tilemap *background;
11
12		void djboy_set_videoreg( UINT8 data )
13		{
14		djboy_videoreg = data;
15		}
16
17	10	WRITE8_HANDLER( djboy_scrollx_w )
18	11	{
19		djboy_scrollx = data;
	12	djboy_state *state = (djboy_state *)space->machine->driver_data;
	13	state->scrollx = data;
20	14	}
21	15
22	16	WRITE8_HANDLER( djboy_scrolly_w )
23	17	{
24		djboy_scrolly = data;
	18	djboy_state *state = (djboy_state *)space->machine->driver_data;
	19	state->scrolly = data;
25	20	}
26	21
27	22	static TILE_GET_INFO( get_bg_tile_info )
28	23	{
29		UINT8 attr = machine->generic.videoram.u8[tile_index + 0x800];
30		int code = machine->generic.videoram.u8[tile_index] + (attr&0xf)*256;
31		int color = attr>>4;
32		if( color&8 )
33		{
	24	djboy_state *state = (djboy_state *)machine->driver_data;
	25	UINT8 attr = state->videoram[tile_index + 0x800];
	26	int code = state->videoram[tile_index] + (attr & 0xf) * 256;
	27	int color = attr >> 4;
	28
	29	if (color & 8)
34	30	code |= 0x1000;
35		}
	31
36	32	SET_TILE_INFO(1, code, color, 0);   /* no flip */
37	33	}
38	34
39	35	WRITE8_HANDLER( djboy_videoram_w )
40	36	{
41		space->machine->generic.videoram.u8[offset] = data;
42		tilemap_mark_tile_dirty( background, offset & 0x7ff);
	37	djboy_state *state = (djboy_state *)space->machine->driver_data;
	38
	39	state->videoram[offset] = data;
	40	tilemap_mark_tile_dirty(state->background, offset & 0x7ff);
43	41	}
44	42
45	43	VIDEO_START( djboy )
46	44	{
47		background = tilemap_create(machine, get_bg_tile_info,tilemap_scan_rows,16,16,64,32);
	45	djboy_state *state = (djboy_state *)machine->driver_data;
	46	state->background = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 16, 16, 64, 32);
48	47	}
49	48
50	49	WRITE8_HANDLER( djboy_paletteram_w )
51	50	{
	51	djboy_state *state = (djboy_state *)space->machine->driver_data;
52	52	int val;
53	53
54		space->machine->generic.paletteram.u8[offset] = data;
	54	state->paletteram[offset] = data;
55	55	offset &= ~1;
56		val = (space->machine->generic.paletteram.u8[offset]<<8) | space->machine->generic.paletteram.u8[offset+1];
	56	val = (state->paletteram[offset] << 8) | state->paletteram[offset + 1];
57	57
58		palette_set_color_rgb(space->machine,offset/2,pal4bit(val >> 8),pal4bit(val >> 4),pal4bit(val >> 0));
	58	palette_set_color_rgb(space->machine, offset / 2, pal4bit(val >> 8), pal4bit(val >> 4), pal4bit(val >> 0));
59	59	}
60	60
61	61	VIDEO_UPDATE( djboy )
r6740	r6741
66	66	* ---x---- flipscreen?
67	67	* ----xxxx ROM bank
68	68	*/
69		const device_config *pandora = devtag_get_device(screen->machine, "pandora");
	69	djboy_state *state = (djboy_state *)screen->machine->driver_data;
70	70	int scroll;
71		scroll = djboy_scrollx | ((djboy_videoreg&0xc0)<<2);
72		tilemap_set_scrollx( background, 0, scroll-0x391 );
73		scroll = djboy_scrolly | ((djboy_videoreg&0x20)<<3);
74		tilemap_set_scrolly( background, 0, scroll );
75		tilemap_draw( bitmap, cliprect,background,0,0 );
76		pandora_update(pandora, bitmap, cliprect);
	71
	72	scroll = state->scrollx | ((state->videoreg & 0xc0) << 2);
	73	tilemap_set_scrollx(state->background, 0, scroll - 0x391);
	74
	75	scroll = state->scrolly | ((state->videoreg & 0x20) << 3);
	76	tilemap_set_scrolly(state->background, 0, scroll);
	77
	78	tilemap_draw(bitmap, cliprect, state->background, 0, 0);
	79	pandora_update(state->pandora, bitmap, cliprect);
	80
77	81	return 0;
78	82	}
79	83
80	84	VIDEO_EOF( djboy )
81	85	{
82		const device_config *pandora = devtag_get_device(machine, "pandora");
83		pandora_eof(pandora);
	86	djboy_state *state = (djboy_state *)machine->driver_data;
	87	pandora_eof(state->pandora);
84	88	}

src/mame/video/tumblep.c

r6740	r6741
14	14	***************************************************************************/
15	15
16	16	#include "driver.h"
17		#include "deco16ic.h"
	17	#include "includes/deco16ic.h"
18	18
19	19	static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
20	20	{

src/mame/video/dogfgt.c

r6740	r6741
1	1	#include "driver.h"
2		#include "dogfgt.h"
	2	#include "includes/dogfgt.h"
3	3
4	4
5	5	/***************************************************************************

src/mame/video/dietgo.c

r6740	r6741
1	1	#include "driver.h"
2		#include "deco16ic.h"
	2	#include "includes/deco16ic.h"
3	3
4	4	static void draw_sprites(running_machine* machine, bitmap_t *bitmap,const rectangle *cliprect)
5	5	{

src/mame/video/esripsys.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/m6809/m6809.h"
9		#include "esripsys.h"
	9	#include "includes/esripsys.h"
10	10
11	11
12	12	/*************************************

src/mame/video/nbmj8991.c

r6740	r6741
7	7	******************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "nb1413m3.h"
	10	#include "includes/nb1413m3.h"
11	11	#include "includes/nbmj8991.h"
12	12
13	13

src/mame/video/blockout.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "blockout.h"
	8	#include "includes/blockout.h"
9	9
10	10
11	11	static void setcolor( running_machine *machine, int color, int rgb )

src/mame/video/tsamurai.c

r6740	r6741
9	9	** variables
10	10	*/
11	11	UINT8 *tsamurai_videoram;
	12	UINT8 *tsamurai_colorram;
	13	UINT8 *tsamurai_bg_videoram;
12	14	static int bgcolor;
13	15	static int textbank1, textbank2;
14	16
r6740	r6741
23	25
24	26	static TILE_GET_INFO( get_bg_tile_info )
25	27	{
26		UINT8 attributes = tsamurai_videoram[2*tile_index+1];
27		int tile_number = tsamurai_videoram[2*tile_index];
	28	UINT8 attributes = tsamurai_bg_videoram[2*tile_index+1];
	29	int tile_number = tsamurai_bg_videoram[2*tile_index];
28	30	tile_number += (( attributes & 0xc0 ) >> 6 ) * 256;    /* legacy */
29	31	tile_number += (( attributes & 0x20 ) >> 5 ) * 1024; /* Mission 660 add-on*/
30	32	SET_TILE_INFO(
r6740	r6741
36	38
37	39	static TILE_GET_INFO( get_fg_tile_info )
38	40	{
39		int tile_number = machine->generic.videoram.u8[tile_index];
	41	int tile_number = tsamurai_videoram[tile_index];
40	42	if (textbank1 & 0x01) tile_number += 256; /* legacy */
41	43	if (textbank2 & 0x01) tile_number += 512; /* Mission 660 add-on */
42	44	SET_TILE_INFO(
43	45	1,
44	46	tile_number,
45		machine->generic.colorram.u8[((tile_index&0x1f)*2)+1] & 0x1f,
	47	tsamurai_colorram[((tile_index&0x1f)*2)+1] & 0x1f,
46	48	0);
47	49	}
48	50
r6740	r6741
104	106
105	107	WRITE8_HANDLER( tsamurai_bg_videoram_w )
106	108	{
107		tsamurai_videoram[offset]=data;
	109	tsamurai_bg_videoram[offset]=data;
108	110	offset = offset/2;
109	111	tilemap_mark_tile_dirty(background,offset);
110	112	}
111	113	WRITE8_HANDLER( tsamurai_fg_videoram_w )
112	114	{
113		space->machine->generic.videoram.u8[offset]=data;
	115	tsamurai_videoram[offset]=data;
114	116	tilemap_mark_tile_dirty(foreground,offset);
115	117	}
116	118	WRITE8_HANDLER( tsamurai_fg_colorram_w )
117	119	{
118		if( space->machine->generic.colorram.u8[offset]!=data )
	120	if( tsamurai_colorram[offset]!=data )
119	121	{
120		space->machine->generic.colorram.u8[offset]=data;
	122	tsamurai_colorram[offset]=data;
121	123	if (offset & 1)
122	124	{
123	125	int col = offset/2;
r6740	r6741
203	205	tilemap_set_scroll_cols(foreground, 32);
204	206	for (i = 0 ; i < 32 ; i++)
205	207	{
206		tilemap_set_scrolly(foreground, i, screen->machine->generic.colorram.u8[i*2]);
	208	tilemap_set_scrolly(foreground, i, tsamurai_colorram[i*2]);
207	209	}
208	210	/* end of column scroll code */
209	211
r6740	r6741
242	244
243	245	static TILE_GET_INFO( get_vsgongf_tile_info )
244	246	{
245		int tile_number = machine->generic.videoram.u8[tile_index];
	247	int tile_number = tsamurai_videoram[tile_index];
246	248	int color = vsgongf_color&0x1f;
247	249	if( textbank1 ) tile_number += 0x100;
248	250	SET_TILE_INFO(

src/mame/video/f1gp.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
3		#include "f1gp.h"
	2	#include "video/konicdev.h"
	3	#include "includes/f1gp.h"
4	4
5	5
6		UINT16 *f1gp_spr1vram,*f1gp_spr2vram,*f1gp_spr1cgram,*f1gp_spr2cgram;
7		UINT16 *f1gp_fgvideoram,*f1gp_rozvideoram;
8		UINT16 *f1gp2_sprcgram,*f1gp2_spritelist;
9		UINT16 *f1gpb_rozregs, *f1gpb_fgregs;
10		size_t f1gp_spr1cgram_size,f1gp_spr2cgram_size;
11
12		static UINT16 *zoomdata;
13		static int flipscreen,gfxctrl;
14
15	6	#define TOTAL_CHARS 0x800
16	7
17		static tilemap *fg_tilemap,*roz_tilemap;
18		static int f1gp2_roz_bank;
19	8
20
21	9	/***************************************************************************
22	10
23	11	Callbacks for the TileMap code
r6740	r6741
26	14
27	15	static TILE_GET_INFO( f1gp_get_roz_tile_info )
28	16	{
29		int code = f1gp_rozvideoram[tile_index];
	17	f1gp_state *state = (f1gp_state *)machine->driver_data;
	18	int code = state->rozvideoram[tile_index];
30	19
31		SET_TILE_INFO(3,code & 0x7ff,code >> 12,0);
	20	SET_TILE_INFO(3, code & 0x7ff, code >> 12, 0);
32	21	}
33	22
34	23	static TILE_GET_INFO( f1gp2_get_roz_tile_info )
35	24	{
36		int code = f1gp_rozvideoram[tile_index];
	25	f1gp_state *state = (f1gp_state *)machine->driver_data;
	26	int code = state->rozvideoram[tile_index];
37	27
38		SET_TILE_INFO(2,(code & 0x7ff) + (f1gp2_roz_bank << 11),code >> 12,0);
	28	SET_TILE_INFO(2, (code & 0x7ff) + (state->roz_bank << 11), code >> 12, 0);
39	29	}
40	30
41	31	static TILE_GET_INFO( get_fg_tile_info )
42	32	{
43		int code = f1gp_fgvideoram[tile_index];
	33	f1gp_state *state = (f1gp_state *)machine->driver_data;
	34	int code = state->fgvideoram[tile_index];
44	35
45		SET_TILE_INFO(0,code & 0x7fff,0,(code & 0x8000)?TILE_FLIPY:0);
	36	SET_TILE_INFO(0, code & 0x7fff, 0, (code & 0x8000) ? TILE_FLIPY : 0);
46	37	}
47	38
48	39
r6740	r6741
54	45
55	46	VIDEO_START( f1gp )
56	47	{
57		roz_tilemap = tilemap_create(machine, f1gp_get_roz_tile_info,tilemap_scan_rows,16,16,64,64);
58		fg_tilemap =  tilemap_create(machine, get_fg_tile_info,      tilemap_scan_rows, 8, 8,64,32);
	48	f1gp_state *state = (f1gp_state *)machine->driver_data;
59	49
60		K053936_wraparound_enable(0, 1);
61		K053936_set_offset(0, -58, -2);
	50	state->roz_tilemap = tilemap_create(machine, f1gp_get_roz_tile_info, tilemap_scan_rows, 16, 16, 64, 64);
	51	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
62	52
63		tilemap_set_transparent_pen(fg_tilemap,0xff);
	53	tilemap_set_transparent_pen(state->fg_tilemap, 0xff);
64	54
65		zoomdata = (UINT16 *)memory_region(machine, "gfx4");
66		gfx_element_set_source(machine->gfx[3], (UINT8 *)zoomdata);
	55	state->zoomdata = (UINT16 *)memory_region(machine, "gfx4");
	56	gfx_element_set_source(machine->gfx[3], (UINT8 *)state->zoomdata);
	57
	58	//  state_save_register_global_pointer(machine, state->zoomdata, memory_region_length(machine, "gfx4"));
67	59	}
68	60
	61
69	62	VIDEO_START( f1gpb )
70	63	{
71		roz_tilemap = tilemap_create(machine, f1gp_get_roz_tile_info,tilemap_scan_rows,16,16,64,64);
72		fg_tilemap =  tilemap_create(machine, get_fg_tile_info,      tilemap_scan_rows, 8, 8,64,32);
	64	f1gp_state *state = (f1gp_state *)machine->driver_data;
73	65
74		tilemap_set_transparent_pen(fg_tilemap,0xff);
	66	state->roz_tilemap = tilemap_create(machine, f1gp_get_roz_tile_info, tilemap_scan_rows, 16, 16, 64, 64);
	67	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
75	68
76		zoomdata = (UINT16 *)memory_region(machine, "gfx4");
77		gfx_element_set_source(machine->gfx[3], (UINT8 *)zoomdata);
	69	tilemap_set_transparent_pen(state->fg_tilemap, 0xff);
	70
	71	state->zoomdata = (UINT16 *)memory_region(machine, "gfx4");
	72	gfx_element_set_source(machine->gfx[3], (UINT8 *)state->zoomdata);
	73
	74	//  state_save_register_global_pointer(machine, state->zoomdata, memory_region_length(machine, "gfx4"));
78	75	}
79	76
80	77	VIDEO_START( f1gp2 )
81	78	{
82		roz_tilemap = tilemap_create(machine, f1gp2_get_roz_tile_info,tilemap_scan_rows,16,16,64,64);
83		fg_tilemap =  tilemap_create(machine, get_fg_tile_info,       tilemap_scan_rows, 8, 8,64,32);
	79	f1gp_state *state = (f1gp_state *)machine->driver_data;
84	80
85		K053936_wraparound_enable(0, 1);
86		K053936_set_offset(0, -48, -21);
	81	state->roz_tilemap = tilemap_create(machine, f1gp2_get_roz_tile_info, tilemap_scan_rows, 16, 16, 64, 64);
	82	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
87	83
88		tilemap_set_transparent_pen(fg_tilemap,0xff);
89		tilemap_set_transparent_pen(roz_tilemap,0x0f);
	84	tilemap_set_transparent_pen(state->fg_tilemap, 0xff);
	85	tilemap_set_transparent_pen(state->roz_tilemap, 0x0f);
90	86
91		tilemap_set_scrolldx(fg_tilemap,-80,0);
92		tilemap_set_scrolldy(fg_tilemap,-26,0);
	87	tilemap_set_scrolldx(state->fg_tilemap, -80, 0);
	88	tilemap_set_scrolldy(state->fg_tilemap, -26, 0);
93	89	}
94	90
95	91
r6740	r6741
101	97
102	98	READ16_HANDLER( f1gp_zoomdata_r )
103	99	{
104		return zoomdata[offset];
	100	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	101	return state->zoomdata[offset];
105	102	}
106	103
107	104	WRITE16_HANDLER( f1gp_zoomdata_w )
108	105	{
109		COMBINE_DATA(&zoomdata[offset]);
	106	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	107	COMBINE_DATA(&state->zoomdata[offset]);
110	108	gfx_element_mark_dirty(space->machine->gfx[3], offset / 64);
111	109	}
112	110
113	111	READ16_HANDLER( f1gp_rozvideoram_r )
114	112	{
115		return f1gp_rozvideoram[offset];
	113	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	114	return state->rozvideoram[offset];
116	115	}
117	116
118	117	WRITE16_HANDLER( f1gp_rozvideoram_w )
119	118	{
120		COMBINE_DATA(&f1gp_rozvideoram[offset]);
121		tilemap_mark_tile_dirty(roz_tilemap,offset);
	119	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	120	COMBINE_DATA(&state->rozvideoram[offset]);
	121	tilemap_mark_tile_dirty(state->roz_tilemap, offset);
122	122	}
123	123
124	124	WRITE16_HANDLER( f1gp_fgvideoram_w )
125	125	{
126		COMBINE_DATA(&f1gp_fgvideoram[offset]);
127		tilemap_mark_tile_dirty(fg_tilemap,offset);
	126	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	127	COMBINE_DATA(&state->fgvideoram[offset]);
	128	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
128	129	}
129	130
130	131	WRITE16_HANDLER( f1gp_fgscroll_w )
131	132	{
132		static int scroll[2];
	133	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	134	COMBINE_DATA(&state->scroll[offset]);
133	135
134		COMBINE_DATA(&scroll[offset]);
135
136		tilemap_set_scrollx(fg_tilemap,0,scroll[0]);
137		tilemap_set_scrolly(fg_tilemap,0,scroll[1]);
	136	tilemap_set_scrollx(state->fg_tilemap, 0, state->scroll[0]);
	137	tilemap_set_scrolly(state->fg_tilemap, 0, state->scroll[1]);
138	138	}
139	139
140	140	WRITE16_HANDLER( f1gp_gfxctrl_w )
141	141	{
	142	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
142	143	if (ACCESSING_BITS_0_7)
143	144	{
144		flipscreen = data & 0x20;
145		gfxctrl = data & 0xdf;
	145	state->flipscreen = data & 0x20;
	146	state->gfxctrl = data & 0xdf;
146	147	}
147	148	}
148	149
149	150	WRITE16_HANDLER( f1gp2_gfxctrl_w )
150	151	{
	152	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
151	153	if (ACCESSING_BITS_0_7)
152	154	{
153		flipscreen = data & 0x20;
	155	state->flipscreen = data & 0x20;
154	156
155	157	/* bit 0/1 = fg/sprite/roz priority */
156	158	/* bit 2 = blank screen */
157	159
158		gfxctrl = data & 0xdf;
	160	state->gfxctrl = data & 0xdf;
159	161	}
160	162
161	163	if (ACCESSING_BITS_8_15)
162	164	{
163		if (f1gp2_roz_bank != (data >> 8))
	165	if (state->roz_bank != (data >> 8))
164	166	{
165		f1gp2_roz_bank = (data >> 8);
166		tilemap_mark_all_tiles_dirty(roz_tilemap);
	167	state->roz_bank = (data >> 8);
	168	tilemap_mark_all_tiles_dirty(state->roz_tilemap);
167	169	}
168	170	}
169	171	}
r6740	r6741
175	177
176	178	***************************************************************************/
177	179
178		static void f1gp_draw_sprites(running_machine *machine,bitmap_t *bitmap,const rectangle *cliprect,int chip,int primask)
	180	static void f1gp_draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int chip, int primask )
179	181	{
180		int attr_start,first;
181		UINT16 *spram = chip ? f1gp_spr2vram : f1gp_spr1vram;
	182	f1gp_state *state = (f1gp_state *)machine->driver_data;
	183	int attr_start, first;
	184	UINT16 *spram = chip ? state->spr2vram : state->spr1vram;
182	185
183	186	first = 4 * spram[0x1fe];
184	187
185		for (attr_start = 0x0200-8;attr_start >= first;attr_start -= 4)
	188	for (attr_start = 0x0200 - 8; attr_start >= first; attr_start -= 4)
186	189	{
187	190	int map_start;
188		int ox,oy,x,y,xsize,ysize,zoomx,zoomy,flipx,flipy,color,pri;
	191	int ox, oy, x, y, xsize, ysize, zoomx, zoomy, flipx, flipy, color, pri;
189	192	/* table hand made by looking at the ship explosion in attract mode */
190	193	/* it's almost a logarithmic scale but not exactly */
191	194	static const int zoomtable[16] = { 0,7,14,20,25,30,34,38,42,46,49,52,54,57,59,61 };
r6740	r6741
204	207	pri = 0;//spram[attr_start + 2] & 0x0010;
205	208	map_start = spram[attr_start + 3];
206	209
207		zoomx = 16 - zoomtable[zoomx]/8;
208		zoomy = 16 - zoomtable[zoomy]/8;
	210	zoomx = 16 - zoomtable[zoomx] / 8;
	211	zoomy = 16 - zoomtable[zoomy] / 8;
209	212
210		for (y = 0;y <= ysize;y++)
	213	for (y = 0; y <= ysize; y++)
211	214	{
212		int sx,sy;
	215	int sx, sy;
213	216
214	217	if (flipy) sy = ((oy + zoomy * (ysize - y) + 16) & 0x1ff) - 16;
215	218	else sy = ((oy + zoomy * y + 16) & 0x1ff) - 16;
216	219
217		for (x = 0;x <= xsize;x++)
	220	for (x = 0; x <= xsize; x++)
218	221	{
219	222	int code;
220	223
r6740	r6741
222	225	else sx = ((ox + zoomx * x + 16) & 0x1ff) - 16;
223	226
224	227	if (chip == 0)
225		code = f1gp_spr1cgram[map_start % (f1gp_spr1cgram_size/2)];
	228	code = state->spr1cgram[map_start % (state->spr1cgram_size / 2)];
226	229	else
227		code = f1gp_spr2cgram[map_start % (f1gp_spr2cgram_size/2)];
	230	code = state->spr2cgram[map_start % (state->spr2cgram_size / 2)];
228	231
229	232	pdrawgfxzoom_transpen(bitmap,cliprect,machine->gfx[1 + chip],
230	233	code,
r6740	r6741
246	249	}
247	250	}
248	251
249		static void f1gpb_draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
	252
	253	VIDEO_UPDATE( f1gp )
250	254	{
251		UINT16 *spriteram16 = machine->generic.spriteram.u16;
252		int attr_start, start_offset = machine->generic.spriteram_size/2 - 4;
	255	f1gp_state *state = (f1gp_state *)screen->machine->driver_data;
253	256
	257	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
	258
	259	k053936_zoom_draw(state->k053936, bitmap, cliprect, state->roz_tilemap, 0, 0, 1);
	260
	261	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 1);
	262
	263	/* quick kludge for "continue" screen priority */
	264	if (state->gfxctrl == 0x00)
	265	{
	266	f1gp_draw_sprites(screen->machine, bitmap, cliprect, 0, 0x02);
	267	f1gp_draw_sprites(screen->machine, bitmap, cliprect, 1, 0x02);
	268	}
	269	else
	270	{
	271	f1gp_draw_sprites(screen->machine, bitmap, cliprect, 0, 0x00);
	272	f1gp_draw_sprites(screen->machine, bitmap, cliprect, 1, 0x02);
	273	}
	274	return 0;
	275	}
	276
	277
	278	static void f1gpb_draw_sprites( running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect )
	279	{
	280	f1gp_state *state = (f1gp_state *)machine->driver_data;
	281	UINT16 *spriteram = state->spriteram;
	282	int attr_start, start_offset = state->spriteram_size / 2 - 4;
	283
254	284	// find the "end of list" to draw the sprites in reverse order
255		for (attr_start = 4;attr_start < machine->generic.spriteram_size/2;attr_start += 4)
	285	for (attr_start = 4; attr_start < state->spriteram_size / 2; attr_start += 4)
256	286	{
257		if (spriteram16[attr_start+3-4] == 0xffff) /* end of list marker */
	287	if (spriteram[attr_start + 3 - 4] == 0xffff) /* end of list marker */
258	288	{
259	289	start_offset = attr_start - 4;
260	290	break;
r6740	r6741
263	293
264	294	for (attr_start = start_offset;attr_start >= 4;attr_start -= 4)
265	295	{
266		int code,gfx;
267		int x,y,flipx,flipy,color,pri;
	296	int code, gfx;
	297	int x, y, flipx, flipy, color, pri;
268	298
269		x = (spriteram16[attr_start + 2] & 0x03ff) - 48;
270		y = (256 - (spriteram16[attr_start + 3 - 4] & 0x03ff)) - 15;
271		flipx = spriteram16[attr_start + 1] & 0x0800;
272		flipy = spriteram16[attr_start + 1] & 0x8000;
273		color = spriteram16[attr_start + 1] & 0x000f;
274		code = spriteram16[attr_start + 0] & 0x3fff;
	299	x = (spriteram[attr_start + 2] & 0x03ff) - 48;
	300	y = (256 - (spriteram[attr_start + 3 - 4] & 0x03ff)) - 15;
	301	flipx = spriteram[attr_start + 1] & 0x0800;
	302	flipy = spriteram[attr_start + 1] & 0x8000;
	303	color = spriteram[attr_start + 1] & 0x000f;
	304	code = spriteram[attr_start + 0] & 0x3fff;
275	305	pri = 0; //?
276	306
277		if((spriteram16[attr_start + 1] & 0x00f0) && (spriteram16[attr_start + 1] & 0x00f0) != 0xc0)
	307	if((spriteram[attr_start + 1] & 0x00f0) && (spriteram[attr_start + 1] & 0x00f0) != 0xc0)
278	308	{
279		printf("attr %X\n",spriteram16[attr_start + 1] & 0x00f0);
	309	printf("attr %X\n",spriteram[attr_start + 1] & 0x00f0);
280	310	code = mame_rand(machine);
281	311	}
282	312
283	313	/*
284		if(spriteram16[attr_start + 1] & ~0x88cf)
285		printf("1 = %X\n",spriteram16[attr_start + 1] & ~0x88cf);
	314	if (spriteram[attr_start + 1] & ~0x88cf)
	315	printf("1 = %X\n", spriteram[attr_start + 1] & ~0x88cf);
286	316	*/
287	317	if(code >= 0x2000)
288	318	{
r6740	r6741
313	343	}
314	344	}
315	345
316
317		VIDEO_UPDATE( f1gp )
318		{
319		bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
320
321		K053936_0_zoom_draw(bitmap,cliprect,roz_tilemap,0,0,1);
322
323		tilemap_draw(bitmap,cliprect,fg_tilemap,0,1);
324
325		/* quick kludge for "continue" screen priority */
326		if (gfxctrl == 0x00)
327		{
328		f1gp_draw_sprites(screen->machine,bitmap,cliprect,0,0x02);
329		f1gp_draw_sprites(screen->machine,bitmap,cliprect,1,0x02);
330		}
331		else
332		{
333		f1gp_draw_sprites(screen->machine,bitmap,cliprect,0,0x00);
334		f1gp_draw_sprites(screen->machine,bitmap,cliprect,1,0x02);
335		}
336		return 0;
337		}
338
339	346	VIDEO_UPDATE( f1gpb )
340	347	{
341		UINT32 startx,starty;
342		int incxx,incxy,incyx,incyy;
	348	f1gp_state *state = (f1gp_state *)screen->machine->driver_data;
	349	UINT32 startx, starty;
	350	int incxx, incxy, incyx, incyy;
343	351
344		incxy = (INT16)f1gpb_rozregs[1];
	352	incxy = (INT16)state->rozregs[1];
345	353	incyx = -incxy;
346		incxx = incyy = (INT16)f1gpb_rozregs[3];
347		startx = f1gpb_rozregs[0] + 328;
348		starty = f1gpb_rozregs[2];
	354	incxx = incyy = (INT16)state->rozregs[3];
	355	startx = state->rozregs[0] + 328;
	356	starty = state->rozregs[2];
349	357
350		tilemap_set_scrolly(fg_tilemap,0,f1gpb_fgregs[0] + 8);
	358	tilemap_set_scrolly(state->fg_tilemap, 0, state->fgregs[0] + 8);
351	359
352	360	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
353	361
354		tilemap_draw_roz(bitmap, cliprect, roz_tilemap,
	362	tilemap_draw_roz(bitmap, cliprect, state->roz_tilemap,
355	363	startx << 13, starty << 13,
356	364	incxx << 5, incxy << 5, incyx << 5, incyy << 5,
357	365	1, 0, 0);
358	366
359		tilemap_draw(bitmap,cliprect,fg_tilemap,0,1);
	367	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 1);
360	368
361		f1gpb_draw_sprites(screen->machine,bitmap,cliprect);
	369	f1gpb_draw_sprites(screen->machine, bitmap, cliprect);
362	370
363	371	return 0;
364	372	}
365	373
366	374
367		static void f1gp2_draw_sprites(running_machine *machine,bitmap_t *bitmap,const rectangle *cliprect)
	375	static void f1gp2_draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
368	376	{
	377	f1gp_state *state = (f1gp_state *)machine->driver_data;
369	378	int offs;
370	379
371
372	380	offs = 0;
373		while (offs < 0x0400 && (f1gp2_spritelist[offs] & 0x4000) == 0)
	381	while (offs < 0x0400 && (state->spritelist[offs] & 0x4000) == 0)
374	382	{
375	383	int attr_start;
376	384	int map_start;
377		int ox,oy,x,y,xsize,ysize,zoomx,zoomy,flipx,flipy,color;
	385	int ox, oy, x, y, xsize, ysize, zoomx, zoomy, flipx, flipy, color;
378	386
379		attr_start = 4 * (f1gp2_spritelist[offs++] & 0x01ff);
	387	attr_start = 4 * (state->spritelist[offs++] & 0x01ff);
380	388
381		ox = f1gp2_spritelist[attr_start + 1] & 0x01ff;
382		xsize = (f1gp2_spritelist[attr_start + 1] & 0x0e00) >> 9;
383		zoomx = (f1gp2_spritelist[attr_start + 1] & 0xf000) >> 12;
384		oy = f1gp2_spritelist[attr_start + 0] & 0x01ff;
385		ysize = (f1gp2_spritelist[attr_start + 0] & 0x0e00) >> 9;
386		zoomy = (f1gp2_spritelist[attr_start + 0] & 0xf000) >> 12;
387		flipx = f1gp2_spritelist[attr_start + 2] & 0x4000;
388		flipy = f1gp2_spritelist[attr_start + 2] & 0x8000;
389		color = (f1gp2_spritelist[attr_start + 2] & 0x1f00) >> 8;
390		map_start = f1gp2_spritelist[attr_start + 3] & 0x7fff;
	389	ox = state->spritelist[attr_start + 1] & 0x01ff;
	390	xsize = (state->spritelist[attr_start + 1] & 0x0e00) >> 9;
	391	zoomx = (state->spritelist[attr_start + 1] & 0xf000) >> 12;
	392	oy = state->spritelist[attr_start + 0] & 0x01ff;
	393	ysize = (state->spritelist[attr_start + 0] & 0x0e00) >> 9;
	394	zoomy = (state->spritelist[attr_start + 0] & 0xf000) >> 12;
	395	flipx = state->spritelist[attr_start + 2] & 0x4000;
	396	flipy = state->spritelist[attr_start + 2] & 0x8000;
	397	color = (state->spritelist[attr_start + 2] & 0x1f00) >> 8;
	398	map_start = state->spritelist[attr_start + 3] & 0x7fff;
391	399
392	400	// aerofgt has the following adjustment, but doing it here would break the title screen
393	401	//      ox += (xsize*zoomx+2)/4;
r6740	r6741
396	404	zoomx = 32 - zoomx;
397	405	zoomy = 32 - zoomy;
398	406
399		if (f1gp2_spritelist[attr_start + 2] & 0x20ff) color = mame_rand(machine);
	407	if (state->spritelist[attr_start + 2] & 0x20ff)
	408	color = mame_rand(machine);
400	409
401		for (y = 0;y <= ysize;y++)
	410	for (y = 0; y <= ysize; y++)
402	411	{
403	412	int sx,sy;
404	413
405	414	if (flipy) sy = ((oy + zoomy * (ysize - y)/2 + 16) & 0x1ff) - 16;
406	415	else sy = ((oy + zoomy * y / 2 + 16) & 0x1ff) - 16;
407	416
408		for (x = 0;x <= xsize;x++)
	417	for (x = 0; x <= xsize; x++)
409	418	{
410	419	int code;
411	420
412	421	if (flipx) sx = ((ox + zoomx * (xsize - x) / 2 + 16) & 0x1ff) - 16;
413	422	else sx = ((ox + zoomx * x / 2 + 16) & 0x1ff) - 16;
414	423
415		code = f1gp2_sprcgram[map_start & 0x3fff];
	424	code = state->sprcgram[map_start & 0x3fff];
416	425	map_start++;
417	426
418		if (flipscreen)
	427	if (state->flipscreen)
419	428	drawgfxzoom_transpen(bitmap,cliprect,machine->gfx[1],
420	429	code,
421	430	color,
r6740	r6741
437	446
438	447	VIDEO_UPDATE( f1gp2 )
439	448	{
440		if (gfxctrl & 4)   /* blank screen */
	449	f1gp_state *state = (f1gp_state *)screen->machine->driver_data;
	450
	451	if (state->gfxctrl & 4)   /* blank screen */
441	452	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
442	453	else
443	454	{
444		switch (gfxctrl & 3)
	455	switch (state->gfxctrl & 3)
445	456	{
446	457	case 0:
447		K053936_0_zoom_draw(bitmap,cliprect,roz_tilemap,TILEMAP_DRAW_OPAQUE,0,1);
448		f1gp2_draw_sprites(screen->machine,bitmap,cliprect);
449		tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
	458	k053936_zoom_draw(state->k053936, bitmap, cliprect, state->roz_tilemap, TILEMAP_DRAW_OPAQUE, 0, 1);
	459	f1gp2_draw_sprites(screen->machine, bitmap, cliprect);
	460	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
450	461	break;
451	462	case 1:
452		K053936_0_zoom_draw(bitmap,cliprect,roz_tilemap,TILEMAP_DRAW_OPAQUE,0,1);
453		tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
454		f1gp2_draw_sprites(screen->machine,bitmap,cliprect);
	463	k053936_zoom_draw(state->k053936, bitmap, cliprect, state->roz_tilemap, TILEMAP_DRAW_OPAQUE, 0, 1);
	464	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
	465	f1gp2_draw_sprites(screen->machine, bitmap, cliprect);
455	466	break;
456	467	case 2:
457		tilemap_draw(bitmap,cliprect,fg_tilemap,TILEMAP_DRAW_OPAQUE,0);
458		K053936_0_zoom_draw(bitmap,cliprect,roz_tilemap,0,0,1);
459		f1gp2_draw_sprites(screen->machine,bitmap,cliprect);
	468	tilemap_draw(bitmap, cliprect, state->fg_tilemap, TILEMAP_DRAW_OPAQUE, 0);
	469	k053936_zoom_draw(state->k053936, bitmap, cliprect, state->roz_tilemap, 0, 0, 1);
	470	f1gp2_draw_sprites(screen->machine, bitmap, cliprect);
460	471	break;
461	472	#ifdef MAME_DEBUG
462	473	case 3:

src/mame/video/lvcards.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10
	11	UINT8 *lvcards_videoram;
	12	UINT8 *lvcards_colorram;
11	13	static tilemap *bg_tilemap;
12	14
13	15	PALETTE_INIT( ponttehk )
r6740	r6741
82	84
83	85	WRITE8_HANDLER( lvcards_videoram_w )
84	86	{
85		space->machine->generic.videoram.u8[offset] = data;
	87	lvcards_videoram[offset] = data;
86	88	tilemap_mark_tile_dirty(bg_tilemap, offset);
87	89	}
88	90
89	91	WRITE8_HANDLER( lvcards_colorram_w )
90	92	{
91		space->machine->generic.colorram.u8[offset] = data;
	93	lvcards_colorram[offset] = data;
92	94	tilemap_mark_tile_dirty(bg_tilemap, offset);
93	95	}
94	96
95	97	static TILE_GET_INFO( get_bg_tile_info )
96	98	{
97		int attr = machine->generic.colorram.u8[tile_index];
98		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0x30) << 4) + ((attr & 0x80) << 3);
	99	int attr = lvcards_colorram[tile_index];
	100	int code = lvcards_videoram[tile_index] + ((attr & 0x30) << 4) + ((attr & 0x80) << 3);
99	101	int color = attr & 0x0f;
100	102	int flags = (attr & 0x40) ? TILE_FLIPX : 0;
101	103

src/mame/video/namcos2.c

r6740	r6741
2	2
3	3	#include "driver.h"
4	4
5		#include "namcos2.h"
6		#include "namcoic.h"
	5	#include "includes/namcos2.h"
	6	#include "includes/namcoic.h"
7	7
8	8	UINT16 *namcos2_sprite_ram;
9	9	UINT16 *namcos2_68k_palette_ram;

src/mame/video/snk6502.c

r6740	r6741
10	10	#include "includes/snk6502.h"
11	11
12	12
	13	UINT8 *snk6502_videoram;
	14	UINT8 *snk6502_colorram;
13	15	UINT8 *snk6502_videoram2;
14	16	UINT8 *snk6502_charram;
15	17
r6740	r6741
86	88
87	89	WRITE8_HANDLER( snk6502_videoram_w )
88	90	{
89		space->machine->generic.videoram.u8[offset] = data;
	91	snk6502_videoram[offset] = data;
90	92	tilemap_mark_tile_dirty(bg_tilemap, offset);
91	93	}
92	94
r6740	r6741
98	100
99	101	WRITE8_HANDLER( snk6502_colorram_w )
100	102	{
101		space->machine->generic.colorram.u8[offset] = data;
	103	snk6502_colorram[offset] = data;
102	104	tilemap_mark_tile_dirty(bg_tilemap, offset);
103	105	tilemap_mark_tile_dirty(fg_tilemap, offset);
104	106	}
r6740	r6741
161	163
162	164	static TILE_GET_INFO( get_bg_tile_info )
163	165	{
164		int code = machine->generic.videoram.u8[tile_index] + 256 * charbank;
165		int color = (machine->generic.colorram.u8[tile_index] & 0x38) >> 3;
	166	int code = snk6502_videoram[tile_index] + 256 * charbank;
	167	int color = (snk6502_colorram[tile_index] & 0x38) >> 3;
166	168
167	169	SET_TILE_INFO(1, code, color, 0);
168	170	}
r6740	r6741
170	172	static TILE_GET_INFO( get_fg_tile_info )
171	173	{
172	174	int code = snk6502_videoram2[tile_index];
173		int color = machine->generic.colorram.u8[tile_index] & 0x07;
	175	int color = snk6502_colorram[tile_index] & 0x07;
174	176
175	177	SET_TILE_INFO(0, code, color, 0);
176	178	}
r6740	r6741
281	283
282	284	static TILE_GET_INFO( satansat_get_bg_tile_info )
283	285	{
284		int code = machine->generic.videoram.u8[tile_index];
285		int color = (machine->generic.colorram.u8[tile_index] & 0x0c) >> 2;
	286	int code = snk6502_videoram[tile_index];
	287	int color = (snk6502_colorram[tile_index] & 0x0c) >> 2;
286	288
287	289	SET_TILE_INFO(1, code, color, 0);
288	290	}
r6740	r6741
290	292	static TILE_GET_INFO( satansat_get_fg_tile_info )
291	293	{
292	294	int code = snk6502_videoram2[tile_index];
293		int color = machine->generic.colorram.u8[tile_index] & 0x03;
	295	int color = snk6502_colorram[tile_index] & 0x03;
294	296
295	297	SET_TILE_INFO(0, code, color, 0);
296	298	}

src/mame/video/exidy440.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "exidy440.h"
	8	#include "includes/exidy440.h"
9	9
10	10
11	11	#define PIXEL_CLOCK         (EXIDY440_MASTER_CLOCK / 2)

src/mame/video/tx1.c

r6740	r6741
8	8	#include "render.h"
9	9	#include "video/resnet.h"
10	10	#include "cpu/i86/i86.h"
11		#include "tx1.h"
	11	#include "includes/tx1.h"
12	12
13	13
14	14	/*************************************

src/mame/video/dassault.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "deco16ic.h"
	8	#include "includes/deco16ic.h"
9	9
10	10	/******************************************************************************/
11	11

src/mame/video/pingpong.c

r6740	r6741
9	9	#include "driver.h"
10	10
11	11	static tilemap *bg_tilemap;
	12	UINT8 *pingpong_videoram;
	13	UINT8 *pingpong_colorram;
12	14
13	15
14	16	/* This is strange; it's unlikely that the sprites actually have a hardware */
r6740	r6741
95	97
96	98	WRITE8_HANDLER( pingpong_videoram_w )
97	99	{
98		space->machine->generic.videoram.u8[offset] = data;
	100	pingpong_videoram[offset] = data;
99	101	tilemap_mark_tile_dirty(bg_tilemap, offset);
100	102	}
101	103
102	104	WRITE8_HANDLER( pingpong_colorram_w )
103	105	{
104		space->machine->generic.colorram.u8[offset] = data;
	106	pingpong_colorram[offset] = data;
105	107	tilemap_mark_tile_dirty(bg_tilemap, offset);
106	108	}
107	109
108	110	static TILE_GET_INFO( get_bg_tile_info )
109	111	{
110		int attr = machine->generic.colorram.u8[tile_index];
111		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0x20) << 3);
	112	int attr = pingpong_colorram[tile_index];
	113	int code = pingpong_videoram[tile_index] + ((attr & 0x20) << 3);
112	114	int color = attr & 0x1f;
113	115	int flags = ((attr & 0x40) ? TILE_FLIPX : 0) | ((attr & 0x80) ? TILE_FLIPY : 0);
114	116

src/mame/video/blstroid.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "machine/atarigen.h"
9		#include "blstroid.h"
	9	#include "includes/blstroid.h"
10	10
11	11
12	12

src/mame/video/aztarac.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "video/vector.h"
9		#include "aztarac.h"
	9	#include "includes/aztarac.h"
10	10
11	11	#define AVECTOR(m, x, y, color, intensity) \
12	12	vector_add_point (m, xcenter + ((x) << 16), ycenter - ((y) << 16), color, intensity)

src/mame/video/tatsumi.c

r6740	r6741
1	1	#include "driver.h"
2		#include "tatsumi.h"
	2	#include "includes/tatsumi.h"
3	3
4	4	static tilemap *tx_layer;
5	5	static tilemap *layer0, *layer1, *layer2, *layer3;

src/mame/video/supbtime.c

r6740	r6741
13	13	***************************************************************************/
14	14
15	15	#include "driver.h"
16		#include "deco16ic.h"
	16	#include "includes/deco16ic.h"
17	17
18	18	/******************************************************************************/
19	19

src/mame/video/blmbycar.c

r6740	r6741
29	29	***************************************************************************/
30	30
31	31	#include "driver.h"
32		#include "blmbycar.h"
	32	#include "includes/blmbycar.h"
33	33
34	34
35	35	/***************************************************************************

src/mame/video/gbusters.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5
r6740	r6741
12	12
13	13	***************************************************************************/
14	14
15		static void tile_callback(int layer,int bank,int *code,int *color,int *flags, int *priority)
	15	void gbusters_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags, int *priority)
16	16	{
17	17	/* (color & 0x02) is flip y handled internally by the 052109 */
18	18	*code |= ((*color & 0x0d) << 8) | ((*color & 0x10) << 5) | (bank << 12);
r6740	r6741
25	25
26	26	***************************************************************************/
27	27
28		static void sprite_callback(int *code,int *color,int *priority,int *shadow)
	28	void gbusters_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
29	29	{
30	30	*priority = (*color & 0x30) >> 4;
31	31	*color = sprite_colorbase + (*color & 0x0f);
r6740	r6741
44	44	layer_colorbase[1] = 0;
45	45	layer_colorbase[2] = 16;
46	46	sprite_colorbase = 32;
47
48		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
49		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
50	47	}
51	48
52	49
53	50	VIDEO_UPDATE( gbusters )
54	51	{
55		K052109_tilemap_update();
	52	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	53	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
56	54
	55	k052109_tilemap_update(k052109);
	56
57	57	/* sprite priority 3 = disable */
58	58	if (gbusters_priority)
59	59	{
60		//      K051960_sprites_draw(screen->machine,bitmap,cliprect,1,1);  /* are these used? */
61		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],TILEMAP_DRAW_OPAQUE,0);
62		K051960_sprites_draw(screen->machine,bitmap,cliprect,2,2);
63		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,0);
64		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
65		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,0);
	60	//      k051960_sprites_draw(k051960, bitmap, cliprect, 1, 1);  /* are these used? */
	61	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, TILEMAP_DRAW_OPAQUE, 0);
	62	k051960_sprites_draw(k051960, bitmap, cliprect, 2, 2);
	63	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 0);
	64	k051960_sprites_draw(k051960, bitmap, cliprect, 0, 0);
	65	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 0);
66	66	}
67	67	else
68	68	{
69		//      K051960_sprites_draw(screen->machine,bitmap,cliprect,1,1);  /* are these used? */
70		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],TILEMAP_DRAW_OPAQUE,0);
71		K051960_sprites_draw(screen->machine,bitmap,cliprect,2,2);
72		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,0);
73		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
74		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,0);
	69	//      k051960_sprites_draw(k051960, bitmap, cliprect, 1, 1);  /* are these used? */
	70	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE, 0);
	71	k051960_sprites_draw(k051960, bitmap, cliprect, 2, 2);
	72	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 0);
	73	k051960_sprites_draw(k051960, bitmap, cliprect, 0, 0);
	74	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 0);
75	75	}
76	76	return 0;
77	77	}

src/mame/video/meadows.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "meadows.h"
	8	#include "includes/meadows.h"
9	9
10	10	/* some constants to make life easier */
11	11	#define SPR_ADJUST_X    -18

src/mame/video/bogeyman.c

r6740	r6741
1	1	#include "driver.h"
2		#include "bogeyman.h"
	2	#include "includes/bogeyman.h"
3	3
4	4
5	5	PALETTE_INIT( bogeyman )

src/mame/video/harddriv.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/tms34010/tms34010.h"
9		#include "harddriv.h"
	9	#include "includes/harddriv.h"
10	10
11	11
12	12

src/mame/video/m72.c

r6740	r6741
1	1	#include "driver.h"
2	2	#include "audio/m72.h"
3		#include "m72.h"
	3	#include "includes/m72.h"
4	4
5	5
6	6

src/mame/video/aeroboto.c

r6740	r6741
6	6
7	7
8	8	#include "driver.h"
9		#include "aeroboto.h"
	9	#include "includes/aeroboto.h"
10	10
11	11
12	12	// how the starfield ROM is interpreted: 0=256x256x1 linear bitmap, 1=8x8x1x1024 tilemap

src/mame/video/madalien.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "video/mc6845.h"
11		#include "madalien.h"
	11	#include "includes/madalien.h"
12	12
13	13
14	14	#define PIXEL_CLOCK (MADALIEN_MAIN_CLOCK / 2)

src/mame/video/firetrap.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "firetrap.h"
	10	#include "includes/firetrap.h"
11	11
12	12
13	13	/***************************************************************************

src/mame/video/crgolf.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "crgolf.h"
	8	#include "includes/crgolf.h"
9	9
10	10
11	11	#define NUM_PENS      (0x20)

src/mame/video/thedeep.c

r6740	r6741
29	29	***************************************************************************/
30	30
31	31	#include "driver.h"
32		#include "thedeep.h"
	32	#include "includes/thedeep.h"
33	33
34	34	/* Variables only used here: */
35	35

src/mame/video/atarig1.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "machine/atarigen.h"
9		#include "atarig1.h"
	9	#include "includes/atarig1.h"
10	10
11	11
12	12

src/mame/video/bladestl.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
	3	#include "includes/bladestl.h"
3	4
4		static int layer_colorbase[2];
5		extern int bladestl_spritebank;
6	5
7
8	6	PALETTE_INIT( bladestl )
9	7	{
10	8	int i;
r6740	r6741
25	23	}
26	24
27	25
28		static void set_pens(running_machine *machine)
	26	static void set_pens( running_machine *machine )
29	27	{
	28	bladestl_state *state = (bladestl_state *)machine->driver_data;
30	29	int i;
31	30
32	31	for (i = 0x00; i < 0x60; i += 2)
33	32	{
34		UINT16 data = machine->generic.paletteram.u8[i | 1] | (machine->generic.paletteram.u8[i] << 8);
	33	UINT16 data = state->paletteram[i | 1] | (state->paletteram[i] << 8);
35	34
36	35	rgb_t color = MAKE_RGB(pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
37	36
r6740	r6741
47	46
48	47	***************************************************************************/
49	48
50		static void tile_callback(int layer, int bank, int *code, int *color, int *flags)
	49	void bladestl_tile_callback( running_machine *machine, int layer, int bank, int *code, int *color, int *flags )
51	50	{
	51	bladestl_state *state = (bladestl_state *)machine->driver_data;
	52
52	53	*code |= ((*color & 0x0f) << 8) | ((*color & 0x40) << 6);
53		*color = layer_colorbase[layer];
	54	*color = state->layer_colorbase[layer];
54	55	}
55	56
56	57	/***************************************************************************
r6740	r6741
59	60
60	61	***************************************************************************/
61	62
62		static void sprite_callback(int *code,int *color)
	63	void bladestl_sprite_callback( running_machine *machine, int *code,int *color )
63	64	{
64		*code |= ((*color & 0xc0) << 2) + bladestl_spritebank;
	65	bladestl_state *state = (bladestl_state *)machine->driver_data;
	66
	67	*code |= ((*color & 0xc0) << 2) + state->spritebank;
65	68	*code = (*code << 2) | ((*color & 0x30) >> 4);
66	69	*color = 0 + (*color & 0x0f);
67	70	}
r6740	r6741
69	72
70	73	/***************************************************************************
71	74
72		Start the video hardware emulation.
73
74		***************************************************************************/
75
76		VIDEO_START( bladestl )
77		{
78		layer_colorbase[0] = 0;
79		layer_colorbase[1] = 1;
80
81		K007342_vh_start(machine,0,tile_callback);
82		K007420_vh_start(machine,1,sprite_callback);
83		}
84
85		/***************************************************************************
86
87	75	Screen Refresh
88	76
89	77	***************************************************************************/
90	78
91	79	VIDEO_UPDATE( bladestl )
92	80	{
	81	bladestl_state *state = (bladestl_state *)screen->machine->driver_data;
93	82	set_pens(screen->machine);
94	83
95		K007342_tilemap_update();
	84	k007342_tilemap_update(state->k007342);
96	85
97		K007342_tilemap_draw( bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE ,0);
98		K007420_sprites_draw( bitmap, cliprect );
99		K007342_tilemap_draw( bitmap, cliprect, 1, 1 | TILEMAP_DRAW_OPAQUE ,0);
100		K007342_tilemap_draw( bitmap, cliprect, 0, 0 ,0);
101		K007342_tilemap_draw( bitmap, cliprect, 0, 1 ,0);
	86	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE ,0);
	87	k007420_sprites_draw(state->k007420, bitmap, cliprect, screen->machine->gfx[1]);
	88	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 1, 1 | TILEMAP_DRAW_OPAQUE ,0);
	89	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 0, 0 ,0);
	90	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 0, 1 ,0);
102	91	return 0;
103	92	}

src/mame/video/toobin.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "machine/atarigen.h"
9		#include "toobin.h"
	9	#include "includes/toobin.h"
10	10
11	11
12	12
r6740	r6741
97	97
98	98	/* allocate a playfield bitmap for rendering */
99	99	state->pfbitmap = auto_bitmap_alloc(machine, video_screen_get_width(machine->primary_screen), video_screen_get_height(machine->primary_screen), BITMAP_FORMAT_INDEXED16);
	100
	101	state_save_register_global(machine, state->brightness);
100	102	}
101	103
102	104

src/mame/video/pbaction.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10
	11	UINT8 *pbaction_videoram, *pbaction_colorram;
11	12	UINT8 *pbaction_videoram2, *pbaction_colorram2;
12	13
13	14	static int scroll;
r6740	r6741
16	17
17	18	WRITE8_HANDLER( pbaction_videoram_w )
18	19	{
19		space->machine->generic.videoram.u8[offset] = data;
	20	pbaction_videoram[offset] = data;
20	21	tilemap_mark_tile_dirty(bg_tilemap, offset);
21	22	}
22	23
23	24	WRITE8_HANDLER( pbaction_colorram_w )
24	25	{
25		space->machine->generic.colorram.u8[offset] = data;
	26	pbaction_colorram[offset] = data;
26	27	tilemap_mark_tile_dirty(bg_tilemap, offset);
27	28	}
28	29
r6740	r6741
53	54
54	55	static TILE_GET_INFO( get_bg_tile_info )
55	56	{
56		int attr = machine->generic.colorram.u8[tile_index];
57		int code = machine->generic.videoram.u8[tile_index] + 0x10 * (attr & 0x70);
	57	int attr = pbaction_colorram[tile_index];
	58	int code = pbaction_videoram[tile_index] + 0x10 * (attr & 0x70);
58	59	int color = attr & 0x07;
59	60	int flags = (attr & 0x80) ? TILE_FLIPY : 0;
60	61

src/mame/video/mcr68.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "mcr.h"
	8	#include "includes/mcr.h"
9	9
10	10
11	11	#define LOW_BYTE(x) ((x) & 0xff)

src/mame/video/overdriv.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	static int zoom_colorbase[2],road_colorbase[2],sprite_colorbase;
r6740	r6741
11	11
12	12	***************************************************************************/
13	13
14		static void overdriv_sprite_callback(int *code,int *color,int *priority_mask)
	14	void overdriv_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
15	15	{
16	16	int pri = (*color & 0xffe0) >> 5;   /* ??????? */
17	17	if (pri) *priority_mask = 0x02;
r6740	r6741
27	27
28	28	***************************************************************************/
29	29
30		static void zoom_callback_0(int *code,int *color,int *flags)
	30	void overdriv_zoom_callback_0(running_machine *machine, int *code,int *color,int *flags)
31	31	{
32	32	*flags = (*color & 0x40) ? TILE_FLIPX : 0;
33	33	*code |= ((*color & 0x03) << 8);
34	34	*color = zoom_colorbase[0] + ((*color & 0x3c) >> 2);
35	35	}
36	36
37		static void zoom_callback_1(int *code,int *color,int *flags)
	37	void overdriv_zoom_callback_1(running_machine *machine, int *code,int *color,int *flags)
38	38	{
39	39	*flags = (*color & 0x40) ? TILE_FLIPX : 0;
40	40	*code |= ((*color & 0x03) << 8);
r6740	r6741
51	51
52	52	VIDEO_START( overdriv )
53	53	{
54		K053251_vh_start(machine);
55		K051316_vh_start_0(machine,"gfx2",4,TRUE,0,zoom_callback_0);
56		K051316_vh_start_1(machine,"gfx3",4,FALSE,0,zoom_callback_1);
57		K053247_vh_start(machine,"gfx1",77,22,NORMAL_PLANE_ORDER,overdriv_sprite_callback);
	54	//  const device_config *k051316_1 = devtag_get_device(machine, "k051316_1");
	55	//  const device_config *k051316_2 = devtag_get_device(machine, "k051316_2");
58	56
59		K051316_wraparound_enable(0,1);
60		K051316_set_offset(0,14,-1);
61		K051316_set_offset(1,15,0);
	57	//  K053251_vh_start(machine);
	58	//  K051316_vh_start_0(machine,"gfx2",4,TRUE,0,zoom_callback_0);
	59	//  K051316_vh_start_1(machine,"gfx3",4,FALSE,0,zoom_callback_1);
	60	//  K053247_vh_start(machine,"gfx1",77,22,NORMAL_PLANE_ORDER,overdriv_sprite_callback);
	61
	62	//  k051316_wraparound_enable(k051316_1, 1);
	63	//  k051316_set_offset(k051316_1, 14, -1);
	64	//  k051316_set_offset(k051316_2, 15, 0);
62	65	}
63	66
64	67
r6740	r6741
71	74
72	75	VIDEO_UPDATE( overdriv )
73	76	{
74		sprite_colorbase  = K053251_get_palette_index(K053251_CI0);
75		road_colorbase[1] = K053251_get_palette_index(K053251_CI1);
76		road_colorbase[0] = K053251_get_palette_index(K053251_CI2);
77		zoom_colorbase[1] = K053251_get_palette_index(K053251_CI3);
78		zoom_colorbase[0] = K053251_get_palette_index(K053251_CI4);
	77	const device_config *k051316_1 = devtag_get_device(screen->machine, "k051316_1");
	78	const device_config *k051316_2 = devtag_get_device(screen->machine, "k051316_2");
	79	const device_config *k053246 = devtag_get_device(screen->machine, "k053246");
	80	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
79	81
80		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
	82	sprite_colorbase  = k053251_get_palette_index(k053251, K053251_CI0);
	83	road_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI1);
	84	road_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	85	zoom_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI3);
	86	zoom_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI4);
81	87
82		K051316_zoom_draw_0(bitmap,cliprect,0,0);
83		K051316_zoom_draw_1(bitmap,cliprect,0,1);
	88	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
84	89
85		K053247_sprites_draw(screen->machine, bitmap,cliprect);
	90	k051316_zoom_draw(k051316_1, bitmap, cliprect, 0, 0);
	91	k051316_zoom_draw(k051316_2, bitmap, cliprect, 0, 1);
	92
	93	k053247_sprites_draw(k053246, bitmap,cliprect);
86	94	return 0;
87	95	}

src/mame/video/funworld.c

r6740	r6741
61	61	#include "video/resnet.h"
62	62
63	63	static tilemap *bg_tilemap;
	64	UINT8 *funworld_colorram;
	65	UINT8 *funworld_videoram;
64	66
65	67
66	68	/***** RESISTORS *****
r6740	r6741
119	121
120	122	WRITE8_HANDLER( funworld_videoram_w )
121	123	{
122		space->machine->generic.videoram.u8[offset] = data;
	124	funworld_videoram[offset] = data;
123	125	tilemap_mark_tile_dirty(bg_tilemap, offset);
124	126	}
125	127
126	128	WRITE8_HANDLER( funworld_colorram_w )
127	129	{
128		space->machine->generic.colorram.u8[offset] = data;
	130	funworld_colorram[offset] = data;
129	131	tilemap_mark_tile_dirty(bg_tilemap, offset);
130	132	}
131	133
r6740	r6741
146	148	---- xxxx   unused.
147	149	*/
148	150	int offs = tile_index;
149		int attr = machine->generic.videoram.u8[offs] + (machine->generic.colorram.u8[offs] << 8);
	151	int attr = funworld_videoram[offs] + (funworld_colorram[offs] << 8);
150	152	int code = attr & 0xfff;
151		int color = machine->generic.colorram.u8[offs] >> 4;   // 4 bits for color.
	153	int color = funworld_colorram[offs] >> 4;   // 4 bits for color.
152	154
153	155	SET_TILE_INFO(0, code, color, 0);
154	156	}

src/mame/video/thunderx.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4
5	4	int scontra_priority;
6	5	static int layer_colorbase[3],sprite_colorbase;
7	6
r6740	r6741
11	10
12	11	***************************************************************************/
13	12
14		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	13	void thunderx_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
15	14	{
16	15	*code |= ((*color & 0x1f) << 8) | (bank << 13);
17	16	*color = layer_colorbase[layer] + ((*color & 0xe0) >> 5);
r6740	r6741
24	23
25	24	***************************************************************************/
26	25
27		static void sprite_callback(int *code,int *color,int *priority_mask,int *shadow)
	26	void thunderx_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow)
28	27	{
29	28	/* Sprite priority 1 means appear behind background, used only to mask sprites */
30	29	/* in the foreground */
r6740	r6741
54	53	layer_colorbase[1] = 0;
55	54	layer_colorbase[2] = 16;
56	55	sprite_colorbase = 32;
57
58		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
59		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
60	56	}
61	57
62	58
r6740	r6741
68	64
69	65	VIDEO_UPDATE( scontra )
70	66	{
71		K052109_tilemap_update();
	67	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	68	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
72	69
	70	k052109_tilemap_update(k052109);
	71
73	72	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
74	73
75	74	/* The background color is always from layer 1 - but it's always black anyway */
76	75	//  bitmap_fill(bitmap,cliprect,16 * layer_colorbase[1]);
77	76	if (scontra_priority)
78	77	{
79		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],TILEMAP_DRAW_OPAQUE,1);
80		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,2);
	78	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, TILEMAP_DRAW_OPAQUE, 1);
	79	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 2);
81	80	}
82	81	else
83	82	{
84		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],TILEMAP_DRAW_OPAQUE,1);
85		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,2);
	83	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE, 1);
	84	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 2);
86	85	}
87		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,4);
	86	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 4);
88	87
89		K051960_sprites_draw(screen->machine,bitmap,cliprect,-1,-1);
	88	k051960_sprites_draw(k051960, bitmap, cliprect, -1, -1);
90	89	return 0;
91	90	}

src/mame/video/spcforce.c

r6740	r6741
10	10
11	11
12	12	UINT8 *spcforce_scrollram;
	13	UINT8 *spcforce_videoram;
	14	UINT8 *spcforce_colorram;
13	15
14	16
15	17	WRITE8_HANDLER( spcforce_flip_screen_w )
r6740	r6741
28	30	bitmap_fill(bitmap,cliprect,0);
29	31
30	32
31		for (offs = 0; offs < screen->machine->generic.videoram_size; offs++)
	33	for (offs = 0; offs < 0x400; offs++)
32	34	{
33	35	int code,sx,sy,col;
34	36
r6740	r6741
36	38	sy = 8 * (offs / 32) -  (spcforce_scrollram[offs]       & 0x0f);
37	39	sx = 8 * (offs % 32) + ((spcforce_scrollram[offs] >> 4) & 0x0f);
38	40
39		code = screen->machine->generic.videoram.u8[offs] + ((screen->machine->generic.colorram.u8[offs] & 0x01) << 8);
40		col  = (~screen->machine->generic.colorram.u8[offs] >> 4) & 0x07;
	41	code = spcforce_videoram[offs] + ((spcforce_colorram[offs] & 0x01) << 8);
	42	col  = (~spcforce_colorram[offs] >> 4) & 0x07;
41	43
42	44	if (flip_screen_get(screen->machine))
43	45	{

src/mame/video/nbmj8900.c

r6740	r6741
7	7	******************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "nb1413m3.h"
	10	#include "includes/nb1413m3.h"
11	11
12	12
13	13	static int nbmj8900_scrolly;

src/mame/video/xmen.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3	#include "includes/xmen.h"
4	4
5	5
r6740	r6741
13	13
14	14	***************************************************************************/
15	15
16		static void xmen_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	16	void xmen_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
17	17	{
18	18	/* (color & 0x02) is flip y handled internally by the 052109 */
19	19	if (layer == 0)
r6740	r6741
28	28
29	29	***************************************************************************/
30	30
31		static void xmen_sprite_callback(int *code,int *color,int *priority_mask)
	31	void xmen_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
32	32	{
33	33	int pri = (*color & 0x00e0) >> 4;   /* ??????? */
34	34	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
47	47
48	48	***************************************************************************/
49	49
50		VIDEO_START( xmen )
51		{
52		K053251_vh_start(machine);
53
54		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,xmen_tile_callback);
55		K053247_vh_start(machine,"gfx2",53,-2,NORMAL_PLANE_ORDER,xmen_sprite_callback);
56		}
57
58	50	static bitmap_t * screen_right;
59	51	static bitmap_t * screen_left;
60	52	static UINT16 *K053247_ram;
61	53
62	54	VIDEO_START( xmen6p )
63	55	{
64		K053251_vh_start(machine);
	56	const device_config *k053246 = devtag_get_device(machine, "k053246");
65	57
66		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,xmen_tile_callback);
67		K053247_vh_start(machine,"gfx2",53,-2,NORMAL_PLANE_ORDER,xmen_sprite_callback);
68		K053247_export_config(&K053247_ram, NULL, NULL, NULL, NULL);
	58	k053247_get_ram(k053246, &K053247_ram);
69	59
70	60	screen_left = auto_bitmap_alloc(machine, 64*8, 32*8, BITMAP_FORMAT_INDEXED16);
71	61	screen_right = auto_bitmap_alloc(machine, 64*8, 32*8, BITMAP_FORMAT_INDEXED16);
r6740	r6741
97	87
98	88	VIDEO_UPDATE( xmen )
99	89	{
	90	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	91	const device_config *k053246 = devtag_get_device(screen->machine, "k053246");
	92	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
100	93	int layer[3];
101	94
	95	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI4);
	96	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	97	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI3);
	98	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI0);
	99	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI2);
102	100
103		bg_colorbase       = K053251_get_palette_index(K053251_CI4);
104		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
105		layer_colorbase[0] = K053251_get_palette_index(K053251_CI3);
106		layer_colorbase[1] = K053251_get_palette_index(K053251_CI0);
107		layer_colorbase[2] = K053251_get_palette_index(K053251_CI2);
	101	k052109_tilemap_update(k052109);
108	102
109		K052109_tilemap_update();
110
111	103	layer[0] = 0;
112		layerpri[0] = K053251_get_priority(K053251_CI3);
	104	layerpri[0] = k053251_get_priority(k053251, K053251_CI3);
113	105	layer[1] = 1;
114		layerpri[1] = K053251_get_priority(K053251_CI0);
	106	layerpri[1] = k053251_get_priority(k053251, K053251_CI0);
115	107	layer[2] = 2;
116		layerpri[2] = K053251_get_priority(K053251_CI2);
	108	layerpri[2] = k053251_get_priority(k053251, K053251_CI2);
117	109
118	110	sortlayers(layer,layerpri);
119	111
120	112	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
121	113	/* note the '+1' in the background color!!! */
122	114	bitmap_fill(bitmap,cliprect,16 * bg_colorbase+1);
123		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[0]],0,1);
124		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[1]],0,2);
125		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[2]],0,4);
	115	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[0], 0, 1);
	116	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[1], 0, 2);
	117	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[2], 0, 4);
126	118
127	119	/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
128	120	pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
129		K053247_sprites_draw(screen->machine, bitmap,cliprect);
	121	k053247_sprites_draw(k053246, bitmap, cliprect);
130	122	return 0;
131	123	}
132	124
133	125
134	126	VIDEO_UPDATE( xmen6p )
135	127	{
136		int x,y;
137
138	128	const device_config *left_screen   = devtag_get_device(screen->machine, "lscreen");
139	129	const device_config *right_screen  = devtag_get_device(screen->machine, "rscreen");
	130	int x,y;
140	131
141	132	if (screen == left_screen)
142		for(y=0;y<32*8;y++)
	133	for(y = 0; y < 32 * 8; y++)
143	134	{
144	135	UINT16* line_dest = BITMAP_ADDR16(bitmap, y, 0);
145	136	UINT16* line_src = BITMAP_ADDR16(screen_left, y, 0);
146	137
147		for (x=12*8;x<52*8;x++)
	138	for (x = 12 * 8; x < 52 * 8; x++)
148	139	line_dest[x] = line_src[x];
149	140	}
150	141	else if (screen == right_screen)
151		for(y=0;y<32*8;y++)
	142	for(y = 0; y < 32 * 8; y++)
152	143	{
153	144	UINT16* line_dest = BITMAP_ADDR16(bitmap, y, 0);
154	145	UINT16* line_src = BITMAP_ADDR16(screen_right, y, 0);
155	146
156		for (x=12*8;x<52*8;x++)
	147	for (x = 12 * 8; x < 52 * 8; x++)
157	148	line_dest[x] = line_src[x];
158	149	}
159	150
r6740	r6741
163	154	/* my lefts and rights are mixed up in several places.. */
164	155	VIDEO_EOF( xmen6p )
165	156	{
166		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	157	const device_config *k052109 = devtag_get_device(machine, "k052109");
	158	const device_config *k053246 = devtag_get_device(machine, "k053246");
	159	const device_config *k053251 = devtag_get_device(machine, "k053251");
167	160	int layer[3];
168	161	bitmap_t * renderbitmap;
169	162	rectangle cliprect;
r6740	r6741
186	179	if (xmen_current_frame & 0x01)
187	180	{
188	181
189		/* copy the desired spritelist to the chip */
	182	/* copy the desired spritelist to the chip */
190	183	memcpy(K053247_ram, xmen6p_spriteramright, 0x1000);
	184
191	185	/* we write the entire content of the tileram to the chip to ensure
192	186	everything gets marked as dirty and the desired tilemap is rendered
193
194	187	this is not very efficient!
195	188	*/
196	189	for (offset = 0; offset < (0xc000 / 2); offset++)
197	190	{
198	191	//          K052109_lsb_w
199		K052109_w(space, offset, xmen6p_tilemapright[offset] & 0x00ff);
	192	k052109_w(k052109, offset, xmen6p_tilemapright[offset] & 0x00ff);
200	193	}
201	194
202	195
r6740	r6741
215	208	for (offset = 0; offset < (0xc000 / 2); offset++)
216	209	{
217	210	//          K052109_lsb_w
218		K052109_w(space, offset, xmen6p_tilemapleft[offset] & 0x00ff);
	211	k052109_w(k052109, offset, xmen6p_tilemapleft[offset] & 0x00ff);
219	212	}
220	213
221	214
r6740	r6741
223	216	}
224	217
225	218
226		bg_colorbase       = K053251_get_palette_index(K053251_CI4);
227		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
228		layer_colorbase[0] = K053251_get_palette_index(K053251_CI3);
229		layer_colorbase[1] = K053251_get_palette_index(K053251_CI0);
230		layer_colorbase[2] = K053251_get_palette_index(K053251_CI2);
	219	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI4);
	220	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	221	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI3);
	222	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI0);
	223	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI2);
231	224
232		K052109_tilemap_update();
	225	k052109_tilemap_update(k052109);
233	226
234	227	layer[0] = 0;
235		layerpri[0] = K053251_get_priority(K053251_CI3);
	228	layerpri[0] = k053251_get_priority(k053251, K053251_CI3);
236	229	layer[1] = 1;
237		layerpri[1] = K053251_get_priority(K053251_CI0);
	230	layerpri[1] = k053251_get_priority(k053251, K053251_CI0);
238	231	layer[2] = 2;
239		layerpri[2] = K053251_get_priority(K053251_CI2);
	232	layerpri[2] = k053251_get_priority(k053251, K053251_CI2);
240	233
241	234	sortlayers(layer,layerpri);
242	235
243	236	bitmap_fill(machine->priority_bitmap, &cliprect, 0);
244	237	/* note the '+1' in the background color!!! */
245	238	bitmap_fill(renderbitmap, &cliprect, 16 * bg_colorbase + 1);
246		tilemap_draw(renderbitmap, &cliprect, K052109_tilemap[layer[0]], 0, 1);
247		tilemap_draw(renderbitmap, &cliprect, K052109_tilemap[layer[1]], 0, 2);
248		tilemap_draw(renderbitmap, &cliprect, K052109_tilemap[layer[2]], 0, 4);
	239	k052109_tilemap_draw(k052109, renderbitmap, &cliprect, layer[0], 0, 1);
	240	k052109_tilemap_draw(k052109, renderbitmap, &cliprect, layer[1], 0, 2);
	241	k052109_tilemap_draw(k052109, renderbitmap, &cliprect, layer[2], 0, 4);
249	242
250	243	/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
251	244	pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
252		K053247_sprites_draw(machine, renderbitmap, &cliprect);
	245	k053247_sprites_draw(k053246, renderbitmap, &cliprect);
253	246	}

src/mame/video/lethal.c

r6740	r6741
8	8	***************************************************************************/
9	9
10	10	#include "driver.h"
11		#include "video/konamiic.h"
	11	#include "video/konicdev.h"
12	12
13	13
14	14	static int sprite_colorbase;
15	15	static int layer_colorbase[4];
16	16	//static int layerpri[4] ={ 1,2,4,0 };
17	17
18		static void lethalen_sprite_callback(int *code, int *color, int *priority_mask)
	18	void lethalen_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask)
19	19	{
20	20	int pri = (*color & 0xfff0);
21	21	*color = *color & 0x000f;
r6740	r6741
38	38	*code = (*code & 0x3fff); // | spritebanks[(*code >> 12) & 3];
39	39	}
40	40
41		static void lethalen_tile_callback(int layer, int *code, int *color, int *flags)
	41	void lethalen_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags)
42	42	{
43	43	*color = layer_colorbase[layer] + ((*color & 0x3c)<<2);
44	44	}
45	45
46	46	VIDEO_START(lethalen)
47	47	{
48		K053251_vh_start(machine);
	48	const device_config *k056832 = devtag_get_device(machine, "k056832");
49	49
50		K056832_vh_start(machine, "gfx1", K056832_BPP_8LE, 1, NULL, lethalen_tile_callback, 0);
51
52		K053245_vh_start(machine, 0, "gfx3",NORMAL_PLANE_ORDER, lethalen_sprite_callback);
53
54	50	// this game uses external linescroll RAM
55		K056832_SetExtLinescroll();
	51	k056832_SetExtLinescroll(k056832);
56	52
57	53	// the US and Japanese cabinets apparently use different mirror setups
58	54	if (!strcmp(machine->gamedrv->name, "lethalenj"))
59	55	{
60		K056832_set_LayerOffset(0, -196, 0);
61		K056832_set_LayerOffset(1, -194, 0);
62		K056832_set_LayerOffset(2, -192, 0);
63		K056832_set_LayerOffset(3, -190, 0);
64		K053245_set_SpriteOffset(0, -105, 0);
	56	k056832_set_layer_offs(k056832, 0, -196, 0);
	57	k056832_set_layer_offs(k056832, 1, -194, 0);
	58	k056832_set_layer_offs(k056832, 2, -192, 0);
	59	k056832_set_layer_offs(k056832, 3, -190, 0);
65	60	}
66	61	else
67	62	{ /* fixme */
68		K056832_set_LayerOffset(0, 188, 0);
69		K056832_set_LayerOffset(1, 190, 0);
70		K056832_set_LayerOffset(2, 192, 0);
71		K056832_set_LayerOffset(3, 194, 0);
72		K053245_set_SpriteOffset(0, 95, 0);
	63	k056832_set_layer_offs(k056832, 0, 188, 0);
	64	k056832_set_layer_offs(k056832, 1, 190, 0);
	65	k056832_set_layer_offs(k056832, 2, 192, 0);
	66	k056832_set_layer_offs(k056832, 3, 194, 0);
73	67	}
74	68
75	69	layer_colorbase[0] = 0x00;
r6740	r6741
80	74
81	75	WRITE8_HANDLER(lethalen_palette_control)
82	76	{
	77	const device_config *k056832 = devtag_get_device(space->machine, "k056832");
	78
83	79	switch (offset)
84	80	{
85	81	case 0:   // 40c8 - PCU1 from schematics
86	82	layer_colorbase[0] = ((data & 0x7)-1) * 0x40;
87	83	layer_colorbase[1] = (((data>>4) & 0x7)-1) * 0x40;
88		K056832_mark_plane_dirty(0);
89		K056832_mark_plane_dirty(1);
	84	k056832_mark_plane_dirty(k056832, 0);
	85	k056832_mark_plane_dirty(k056832, 1);
90	86	break;
91	87
92	88	case 4: // 40cc - PCU2 from schematics
93	89	layer_colorbase[2] = ((data & 0x7)-1) * 0x40;
94	90	layer_colorbase[3] = (((data>>4) & 0x7)-1) * 0x40;
95		K056832_mark_plane_dirty(2);
96		K056832_mark_plane_dirty(3);
	91	k056832_mark_plane_dirty(k056832, 2);
	92	k056832_mark_plane_dirty(k056832, 3);
97	93	break;
98	94
99	95	case 8:   // 40d0 - PCU3 from schematics
r6740	r6741
104	100
105	101	VIDEO_UPDATE(lethalen)
106	102	{
	103	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
	104	const device_config *k053244 = devtag_get_device(screen->machine, "k053244");
	105
107	106	bitmap_fill(bitmap, cliprect, 7168);
108	107	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
109	108
110		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 3, 0, 1);
111		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 2, 0, 2);
112		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 1, 0, 4);
	109	k056832_tilemap_draw(k056832, bitmap, cliprect, 3, 0, 1);
	110	k056832_tilemap_draw(k056832, bitmap, cliprect, 2, 0, 2);
	111	k056832_tilemap_draw(k056832, bitmap, cliprect, 1, 0, 4);
113	112
114		K053245_sprites_draw_lethal(screen->machine,0, bitmap, cliprect);
	113	k053245_sprites_draw_lethal(k053244, bitmap, cliprect);
115	114
116	115	// force "A" layer over top of everything
117		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 0, 0, 0);
	116	k056832_tilemap_draw(k056832, bitmap, cliprect, 0, 0, 0);
118	117
119
120		#if 0
121		{
122		extern UINT16 *K056832_videoram;
123		FILE *fp;
124
125		fp=fopen("K056832_videoram", "w+b");
126		if (fp)
127		{
128		fwrite(K056832_videoram, 0x10000, 2, fp);
129		fclose(fp);
130		}
131		}
132		#endif
133	118	return 0;
134	119	}

src/mame/video/exprraid.c

r6740	r6741
1	1	#include "driver.h"
2		#include "exprraid.h"
	2	#include "includes/exprraid.h"
3	3
4	4
5	5	WRITE8_HANDLER( exprraid_videoram_w )

src/mame/video/ultratnk.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "ultratnk.h"
	8	#include "includes/ultratnk.h"
9	9	#include "audio/sprint4.h"
10	10
11	11	static tilemap* playfield;

src/mame/video/scotrsht.c

r6740	r6741
2	2
3	3	UINT8 *scotrsht_scroll;
4	4
	5	UINT8 *scotrsht_videoram;
	6	UINT8 *scotrsht_colorram;
5	7	static tilemap *bg_tilemap;
6	8	static int scotrsht_charbank = 0;
7	9	static int scotrsht_palette_bank = 0;
r6740	r6741
42	44
43	45	WRITE8_HANDLER( scotrsht_videoram_w )
44	46	{
45		space->machine->generic.videoram.u8[offset] = data;
	47	scotrsht_videoram[offset] = data;
46	48	tilemap_mark_tile_dirty(bg_tilemap, offset);
47	49	}
48	50
49	51	WRITE8_HANDLER( scotrsht_colorram_w )
50	52	{
51		space->machine->generic.colorram.u8[offset] = data;
	53	scotrsht_colorram[offset] = data;
52	54	tilemap_mark_tile_dirty(bg_tilemap, offset);
53	55	}
54	56
r6740	r6741
80	82
81	83	static TILE_GET_INFO( scotrsht_get_bg_tile_info )
82	84	{
83		int attr = machine->generic.colorram.u8[tile_index];
84		int code = machine->generic.videoram.u8[tile_index] + (scotrsht_charbank << 9) + ((attr & 0x40) << 2);
	85	int attr = scotrsht_colorram[tile_index];
	86	int code = scotrsht_videoram[tile_index] + (scotrsht_charbank << 9) + ((attr & 0x40) << 2);
85	87	int color = (attr & 0x0f) + scotrsht_palette_bank * 16;
86	88	int flag = 0;
87	89

src/mame/video/phoenix.c

r6740	r6741
8	8
9	9	#include "driver.h"
10	10	#include "video/resnet.h"
11		#include "phoenix.h"
	11	#include "includes/phoenix.h"
12	12
13	13	static UINT8 *videoram_pg[2];
14	14	static UINT8 videoram_pg_index;

src/mame/video/dday.c

r6740	r6741
10	10
11	11	#include "driver.h"
12	12	#include "sound/ay8910.h"
13		#include "dday.h"
	13	#include "includes/dday.h"
14	14
15	15
16	16	/* Note: There seems to be no way to reset this timer via hardware.

src/mame/video/cyberbal.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "machine/atarigen.h"
9		#include "cyberbal.h"
	9	#include "includes/cyberbal.h"
10	10
11	11
12	12	#define SCREEN_WIDTH      (42*16)
r6740	r6741
172	172	tilemap_set_scrollx(state->atarigen.alpha2_tilemap, 0, 0);
173	173	tilemap_set_transparent_pen(state->atarigen.alpha2_tilemap, 0);
174	174	}
	175
	176	/* save states */
	177	state_save_register_global_array(machine, state->current_slip);
	178	state_save_register_global_array(machine, state->playfield_palette_bank);
	179	state_save_register_global_array(machine, state->playfield_xscroll);
	180	state_save_register_global_array(machine, state->playfield_yscroll);
175	181	}
176	182
177	183

src/mame/video/lockon.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "lockon.h"
	8	#include "includes/lockon.h"
9	9	#include "cpu/nec/nec.h"
10	10	#include "video/resnet.h"
11	11

src/mame/video/gijoe.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	static int AVAC_bits[4], AVAC_occupancy[4];
6	6	static int layer_colorbase[4], layer_pri[4];
7	7	static int AVAC_vrc, sprite_colorbase;
8	8
9		static void gijoe_sprite_callback(int *code, int *color, int *priority_mask)
	9	void gijoe_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask)
10	10	{
11	11	int pri, c = *color;
12	12
r6740	r6741
21	21	*color = sprite_colorbase | (c & 0x001f);
22	22	}
23	23
24		static void gijoe_tile_callback(int layer, int *code, int *color, int *flags)
	24	void gijoe_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags)
25	25	{
26	26	int tile = *code;
27	27
r6740	r6741
39	39
40	40	VIDEO_START( gijoe )
41	41	{
	42	const device_config *k056832 = devtag_get_device(machine, "k056832");
42	43	int i;
43	44
44		K053251_vh_start(machine);
45		K056832_vh_start(machine, "gfx1", K056832_BPP_4, 1, NULL, gijoe_tile_callback, 0);
	45	k056832_linemap_enable(k056832, 1);
46	46
47		K056832_linemap_enable(1);
	47	for (i = 0; i < 4; i++)
	48	AVAC_occupancy[i] = 0;
48	49
49		K053247_vh_start(machine, "gfx2", -37, 20, NORMAL_PLANE_ORDER, gijoe_sprite_callback);
50
51		for (i=0; i<4; i++) AVAC_occupancy[i] = 0;
52	50	AVAC_vrc = 0xffff;
53	51	}
54	52
r6740	r6741
73	71
74	72	VIDEO_UPDATE( gijoe )
75	73	{
	74	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
	75	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	76	const device_config *k053246 = devtag_get_device(screen->machine, "k053246");
76	77	static const int K053251_CI[4] = { K053251_CI1, K053251_CI2, K053251_CI3, K053251_CI4 };
77	78	int layer[4];
78	79	int vrc_mode, vrc_new, colorbase_new, primode, dirty, i;
79	80	int mask = 0;
80	81
81	82	// update tile offsets
82		K056832_read_AVAC(&vrc_mode, &vrc_new);
	83	k056832_read_avac(k056832, &vrc_mode, &vrc_new);
83	84
84	85	if (vrc_mode)
85	86	{
86		for (dirty=0xf000; dirty; dirty>>=4) if ((AVAC_vrc & dirty) != (vrc_new & dirty)) mask |= dirty;
	87	for (dirty = 0xf000; dirty; dirty >>= 4)
	88	if ((AVAC_vrc & dirty) != (vrc_new & dirty))
	89	mask |= dirty;
87	90
88	91	AVAC_vrc = vrc_new;
89	92	AVAC_bits[0] = vrc_new<<4  & 0xf000;
r6740	r6741
95	98	AVAC_bits[3] = AVAC_bits[2] = AVAC_bits[1] = AVAC_bits[0] = 0xf000;
96	99
97	100	// update color info and refresh tilemaps
98		sprite_colorbase = K053251_get_palette_index(K053251_CI0);
	101	sprite_colorbase = k053251_get_palette_index(k053251, K053251_CI0);
99	102
100		for (i=0; i<4; i++)
	103	for (i = 0; i < 4; i++)
101	104	{
102	105	dirty = 0;
103	106
104		colorbase_new = K053251_get_palette_index(K053251_CI[i]);
105		if (layer_colorbase[i] != colorbase_new) { layer_colorbase[i] = colorbase_new; dirty = 1; }
106		if (AVAC_occupancy[i] & mask) dirty = 1;
	107	colorbase_new = k053251_get_palette_index(k053251, K053251_CI[i]);
	108	if (layer_colorbase[i] != colorbase_new)
	109	{
	110	layer_colorbase[i] = colorbase_new;
	111	dirty = 1;
	112	}
	113	if (AVAC_occupancy[i] & mask)
	114	dirty = 1;
107	115
108		if (dirty) { AVAC_occupancy[i] = 0; K056832_mark_plane_dirty(i); }
	116	if (dirty)
	117	{
	118	AVAC_occupancy[i] = 0;
	119	k056832_mark_plane_dirty(k056832, i);
	120	}
109	121	}
110	122
111	123	/*
r6740	r6741
114	126	written to the layer's X-scroll register otherwise the chip expects totally
115	127	different alignment values.
116	128	*/
117		if (K056832_read_register(0x14) == 2)
	129	if (k056832_read_register(k056832, 0x14) == 2)
118	130	{
119		K056832_set_LayerOffset(0,  2, 0);
120		K056832_set_LayerOffset(1,  4, 0);
121		K056832_set_LayerOffset(2,  6, 0); // 7?
122		K056832_set_LayerOffset(3,  8, 0);
	131	k056832_set_layer_offs(k056832, 0,  2, 0);
	132	k056832_set_layer_offs(k056832, 1,  4, 0);
	133	k056832_set_layer_offs(k056832, 2,  6, 0); // 7?
	134	k056832_set_layer_offs(k056832, 3,  8, 0);
123	135	}
124	136	else
125	137	{
126		K056832_set_LayerOffset(0,  0, 0);
127		K056832_set_LayerOffset(1,  8, 0);
128		K056832_set_LayerOffset(2, 14, 0);
129		K056832_set_LayerOffset(3, 16, 0); // smaller?
	138	k056832_set_layer_offs(k056832, 0,  0, 0);
	139	k056832_set_layer_offs(k056832, 1,  8, 0);
	140	k056832_set_layer_offs(k056832, 2, 14, 0);
	141	k056832_set_layer_offs(k056832, 3, 16, 0); // smaller?
130	142	}
131	143
132	144	// seems to switch the K053251 between different priority modes, detail unknown
133		primode = K053251_get_priority(K053251_CI1);
	145	primode = k053251_get_priority(k053251, K053251_CI1);
134	146
135	147	layer[0] = 0;
136	148	layer_pri[0] = 0; // not sure
137	149	layer[1] = 1;
138		layer_pri[1] = K053251_get_priority(K053251_CI2);
	150	layer_pri[1] = k053251_get_priority(k053251, K053251_CI2);
139	151	layer[2] = 2;
140		layer_pri[2] = K053251_get_priority(K053251_CI3);
	152	layer_pri[2] = k053251_get_priority(k053251, K053251_CI3);
141	153	layer[3] = 3;
142		layer_pri[3] = K053251_get_priority(K053251_CI4);
	154	layer_pri[3] = k053251_get_priority(k053251, K053251_CI4);
143	155
144	156	sortlayers(layer, layer_pri);
145	157
146	158	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
147	159	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
148	160
149		K056832_tilemap_draw(screen->machine, bitmap,cliprect, layer[0], 0, 1);
150		K056832_tilemap_draw(screen->machine, bitmap,cliprect, layer[1], 0, 2);
151		K056832_tilemap_draw(screen->machine, bitmap,cliprect, layer[2], 0, 4);
152		K056832_tilemap_draw(screen->machine, bitmap,cliprect, layer[3], 0, 8);
	161	k056832_tilemap_draw(k056832, bitmap,cliprect, layer[0], 0, 1);
	162	k056832_tilemap_draw(k056832, bitmap,cliprect, layer[1], 0, 2);
	163	k056832_tilemap_draw(k056832, bitmap,cliprect, layer[2], 0, 4);
	164	k056832_tilemap_draw(k056832, bitmap,cliprect, layer[3], 0, 8);
153	165
154		K053247_sprites_draw(screen->machine, bitmap, cliprect);
	166	k053247_sprites_draw(k053246, bitmap, cliprect);
155	167	return 0;
156	168	}

src/mame/video/rdpupd16.c

r6740	r6741
87	87	//{
88	88	//if (vibuffering)
89	89	//{
90		//   restore_filter16_buffer(&r, &g, &b, &ViBuffer[i][j], n64_vi_width);
	90	//  restore_filter16_buffer(&r, &g, &b, &ViBuffer[i][j], n64_vi_width);
91	91	//}
92	92	//else
93	93	//{
r6740	r6741
99	99	{
100	100	//if (vibuffering)
101	101	//{
102		//   divot_filter16_buffer(&r, &g, &b, &ViBuffer[i][j]);
	102	//  divot_filter16_buffer(&r, &g, &b, &ViBuffer[i][j]);
103	103	//}
104	104	//else
105	105	//{
r6740	r6741
109	109	#endif
110	110
111	111	/*
112		if (gamma_dither)
113		{
114		dith = mame_rand(screen->machine) & 0x3f;
115		}
116		if (gamma)
117		{
118		if (gamma_dither)
119		{
120		r = gamma_dither_table[(r << 6)|dith];
121		g = gamma_dither_table[(g << 6)|dith];
122		b = gamma_dither_table[(b << 6)|dith];
123		}
124		else
125		{
126		r = gamma_table[r];
127		g = gamma_table[g];
128		b = gamma_table[b];
129		}
130		}
131		else if (gamma_dither)
132		{
133		if (r < 255)
134		r += (dith & 1);
135		if (g < 255)
136		g += (dith & 1);
137		if (b < 255)
138		b += (dith & 1);
139		}
140		*/
	112	if (gamma_dither)
	113	{
	114	dith = mame_rand(screen->machine) & 0x3f;
	115	}
	116	if (gamma)
	117	{
	118	if (gamma_dither)
	119	{
	120	r = gamma_dither_table[(r << 6)|dith];
	121	g = gamma_dither_table[(g << 6)|dith];
	122	b = gamma_dither_table[(b << 6)|dith];
	123	}
	124	else
	125	{
	126	r = gamma_table[r];
	127	g = gamma_table[g];
	128	b = gamma_table[b];
	129	}
	130	}
	131	else if (gamma_dither)
	132	{
	133	if (r < 255)
	134	r += (dith & 1);
	135	if (g < 255)
	136	g += (dith & 1);
	137	if (b < 255)
	138	b += (dith & 1);
	139	}
	140	*/
141	141	pixels++;
142	142
143	143	final = (r << 16) | (g << 8) | b;

src/mame/video/segas32.c

r6740	r6741
143	143
144	144	#include "driver.h"
145	145	#include "profiler.h"
146		#include "segas32.h"
	146	#include "includes/segas32.h"
147	147
148	148
149	149

src/mame/video/badlands.c

r6740	r6741
77	77
78	78	/* initialize the motion objects */
79	79	atarimo_init(machine, 0, &modesc);
	80
	81	/* save states */
	82	state_save_register_global(machine, state->playfield_tile_bank);
80	83	}
81	84
82	85

src/mame/video/slapfght.c

r6740	r6741
11	11
12	12	UINT8 *slapfight_videoram;
13	13	UINT8 *slapfight_colorram;
14		size_t slapfight_videoram_size;
	14	UINT8 *slapfight_fixvideoram;
	15	UINT8 *slapfight_fixcolorram;
15	16	UINT8 *slapfight_scrollx_lo,*slapfight_scrollx_hi,*slapfight_scrolly;
16	17	static int flipscreen, slapfight_palette_bank = 0;
17	18
r6740	r6741
30	31	{
31	32	int tile,color;
32	33
33		tile=machine->generic.videoram.u8[tile_index] + ((machine->generic.colorram.u8[tile_index] & 0x03) << 8);
34		color=(machine->generic.colorram.u8[tile_index] >> 3) & 0x0f;
	34	tile=slapfight_videoram[tile_index] + ((slapfight_colorram[tile_index] & 0x03) << 8);
	35	color=(slapfight_colorram[tile_index] >> 3) & 0x0f;
35	36	SET_TILE_INFO(
36	37	0,
37	38	tile,
r6740	r6741
43	44	{
44	45	int tile,color;
45	46
46		tile=machine->generic.videoram.u8[tile_index] + ((machine->generic.colorram.u8[tile_index] & 0x0f) << 8);
47		color=(machine->generic.colorram.u8[tile_index] & 0xf0) >> 4;
	47	tile=slapfight_videoram[tile_index] + ((slapfight_colorram[tile_index] & 0x0f) << 8);
	48	color=(slapfight_colorram[tile_index] & 0xf0) >> 4;
48	49
49	50	SET_TILE_INFO(
50	51	1,
r6740	r6741
57	58	{
58	59	int tile,color;
59	60
60		tile=slapfight_videoram[tile_index] + ((slapfight_colorram[tile_index] & 0x03) << 8);
61		color=(slapfight_colorram[tile_index] & 0xfc) >> 2;
	61	tile=slapfight_fixvideoram[tile_index] + ((slapfight_fixcolorram[tile_index] & 0x03) << 8);
	62	color=(slapfight_fixcolorram[tile_index] & 0xfc) >> 2;
62	63
63	64	SET_TILE_INFO(
64	65	0,
r6740	r6741
98	99
99	100	WRITE8_HANDLER( slapfight_videoram_w )
100	101	{
101		space->machine->generic.videoram.u8[offset]=data;
	102	slapfight_videoram[offset]=data;
102	103	tilemap_mark_tile_dirty(pf1_tilemap,offset);
103	104	}
104	105
105	106	WRITE8_HANDLER( slapfight_colorram_w )
106	107	{
107		space->machine->generic.colorram.u8[offset]=data;
	108	slapfight_colorram[offset]=data;
108	109	tilemap_mark_tile_dirty(pf1_tilemap,offset);
109	110	}
110	111
111	112	WRITE8_HANDLER( slapfight_fixram_w )
112	113	{
113		slapfight_videoram[offset]=data;
	114	slapfight_fixvideoram[offset]=data;
114	115	tilemap_mark_tile_dirty(fix_tilemap,offset);
115	116	}
116	117
117	118	WRITE8_HANDLER( slapfight_fixcol_w )
118	119	{
119		slapfight_colorram[offset]=data;
	120	slapfight_fixcolorram[offset]=data;
120	121	tilemap_mark_tile_dirty(fix_tilemap,offset);
121	122	}
122	123
r6740	r6741
140	141	int i;
141	142	for (i=0; i<0x800; i++)
142	143	{
143		logerror("Offset:%03x   TileRAM:%02x   AttribRAM:%02x   SpriteRAM:%02x\n",i, machine->generic.videoram.u8[i],machine->generic.colorram.u8[i],machine->generic.spriteram.u8[i]);
	144	logerror("Offset:%03x   TileRAM:%02x   AttribRAM:%02x   SpriteRAM:%02x\n",i, slapfight_videoram[i],slapfight_colorram[i],machine->generic.spriteram.u8[i]);
144	145	}
145	146	}
146	147	#endif

src/mame/video/psikyosh.c

r6740	r6741
42	42
43	43	/*
44	44	BG Scroll/Priority/Zoom/Alpha/Tilebank:
45		Either at 0x30053f0/4/8 (For 0a/0c/0d), 0x3005bf0/4/8 (For 0b) Or per-line in a bank (For 0e-1f)
	45	Either at 0x30053f0 / 4/8 (For 0a/0c/0d), 0x3005bf0 / 4/8 (For 0b) Or per-line in a bank (For 0e-1f)
46	46	0x?vvv?xxx - v = vertical scroll - x = x scroll
47		Either at 0x30057f0/4/8 (For 0a/0c/0d), 0x3005ff0/4/8 (For 0b) Or per-line in a bank (For 0e-1f)
	47	Either at 0x30057f0 / 4/8 (For 0a/0c/0d), 0x3005ff0 / 4/8 (For 0b) Or per-line in a bank (For 0e-1f)
48	48	0xppzzaabb - p = priority, z = zoom/expand(00 is none), a = alpha value/effect, b = tilebank (used when register below = 0x0a)
49	49
50	50
r6740	r6741
91	91
92	92	#include "driver.h"
93	93	#include "profiler.h"
94		#include "psikyosh.h"
95	94	#include "drawgfxm.h"
	95	#include "includes/psikyosh.h"
96	96
97		/* Needed for psikyosh_drawgfxzoom */
98		static bitmap_t *zoom_bitmap, *z_bitmap;
99		static UINT8 alphatable[256];
100
101	97	/* Psikyo PS6406B */
102	98	/* --- BACKGROUNDS --- */
103	99
104		#define PIXEL_OP_REMAP_TRANS0_ALPHATABLE32(DEST, PRIORITY, SOURCE)               \
105		do                                                               \
106		{                                                               \
	100	static UINT8 alphatable[256];   // this might be moved to psikyosh_state, if we ever add a *machine parameter to drawgfxm.h macros
	101
	102	#define PIXEL_OP_REMAP_TRANS0_ALPHATABLE32(DEST, PRIORITY, SOURCE)            \
	103	do                                                         \
	104	{                                                         \
107	105	UINT32 srcdata = (SOURCE);                                          \
108	106	if (srcdata != 0)                                                \
109	107	(DEST) = alpha_blend_r32((DEST), paldata[srcdata], alphatable[srcdata]);   \
110		}                                                               \
111		while (0)                                                         \
	108	}                                                         \
	109	while (0)                                                      \
112	110
113	111	static void drawgfx_alphatable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
114	112	UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
r6740	r6741
145	143
146	144
147	145	/* 'Normal' layers, no line/columnscroll. No per-line effects */
148		static void draw_bglayer(running_machine *machine, int layer, bitmap_t *bitmap, const rectangle *cliprect )
	146	static void draw_bglayer( running_machine *machine, int layer, bitmap_t *bitmap, const rectangle *cliprect )
149	147	{
	148	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
150	149	gfx_element *gfx;
151		int offs=0, sx, sy;
	150	int offs = 0, sx, sy;
152	151	int scrollx, scrolly, bank, alpha, alphamap, size, width;
153	152
154		if ( BG_TYPE(layer) == BG_NORMAL_ALT )
	153	if (BG_TYPE(layer) == BG_NORMAL_ALT)
155	154	{
156		bank    = (psikyosh_bgram[0x1ff0/4 + (layer*0x04)/4] & 0x000000ff) >> 0;
157		alpha   = (psikyosh_bgram[0x1ff0/4 + (layer*0x04)/4] & 0x00003f00) >> 8;
158		alphamap =(psikyosh_bgram[0x1ff0/4 + (layer*0x04)/4] & 0x00008000) >> 15;
159		scrollx = (psikyosh_bgram[0x1bf0/4 + (layer*0x04)/4] & 0x000001ff) >> 0;
160		scrolly = (psikyosh_bgram[0x1bf0/4 + (layer*0x04)/4] & 0x03ff0000) >> 16;
	155	bank     = (state->bgram[0x1ff0 / 4 + (layer * 0x04) / 4] & 0x000000ff) >> 0;
	156	alpha    = (state->bgram[0x1ff0 / 4 + (layer * 0x04) / 4] & 0x00003f00) >> 8;
	157	alphamap = (state->bgram[0x1ff0 / 4 + (layer * 0x04) / 4] & 0x00008000) >> 15;
	158	scrollx  = (state->bgram[0x1bf0 / 4 + (layer * 0x04) / 4] & 0x000001ff) >> 0;
	159	scrolly  = (state->bgram[0x1bf0 / 4 + (layer * 0x04) / 4] & 0x03ff0000) >> 16;
161	160	}
162	161	else /* BG_NORMAL */
163	162	{
164		bank    = (psikyosh_bgram[0x17f0/4 + (layer*0x04)/4] & 0x000000ff) >> 0;
165		alpha   = (psikyosh_bgram[0x17f0/4 + (layer*0x04)/4] & 0x00003f00) >> 8;
166		alphamap =(psikyosh_bgram[0x17f0/4 + (layer*0x04)/4] & 0x00008000) >> 15;
167		scrollx = (psikyosh_bgram[0x13f0/4 + (layer*0x04)/4] & 0x000001ff) >> 0;
168		scrolly = (psikyosh_bgram[0x13f0/4 + (layer*0x04)/4] & 0x03ff0000) >> 16;
	163	bank     = (state->bgram[0x17f0 / 4 + (layer * 0x04) / 4] & 0x000000ff) >> 0;
	164	alpha    = (state->bgram[0x17f0 / 4 + (layer * 0x04) / 4] & 0x00003f00) >> 8;
	165	alphamap = (state->bgram[0x17f0 / 4 + (layer * 0x04) / 4] & 0x00008000) >> 15;
	166	scrollx  = (state->bgram[0x13f0 / 4 + (layer * 0x04) / 4] & 0x000001ff) >> 0;
	167	scrolly  = (state->bgram[0x13f0 / 4 + (layer * 0x04) / 4] & 0x03ff0000) >> 16;
169	168	}
170	169
171		if ( BG_TYPE(layer) == BG_SCROLL_0D ) scrollx += 0x08; /* quick kludge until using rowscroll */
	170	if (BG_TYPE(layer) == BG_SCROLL_0D)
	171	scrollx += 0x08; /* quick kludge until using rowscroll */
172	172
173	173	gfx = BG_DEPTH_8BPP(layer) ? machine->gfx[1] : machine->gfx[0];
174	174	size = BG_LARGE(layer) ? 32 : 16;
175	175	width = BG_LARGE(layer) ? 0x200 : 0x100;
176	176
177		if(alphamap) { /* alpha values are per-pen */
	177	if (alphamap) /* alpha values are per-pen */
178	178	alpha = -1;
179		} else {
180		alpha = ((0x3f-alpha)*0xff)/0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
181		}
	179	else
	180	alpha = ((0x3f - alpha) * 0xff) / 0x3f;   /* 0x3f-0x00 maps to 0x00-0xff */
182	181
183		if((bank>=0x0c) && (bank<=0x1f)) /* shouldn't happen, 20 banks of 0x800 bytes */
	182
	183	if ((bank >= 0x0c) && (bank <= 0x1f)) /* shouldn't happen, 20 banks of 0x800 bytes */
184	184	{
185		for (sy=0; sy<size; sy++)
	185	for (sy = 0; sy < size; sy++)
186	186	{
187		for (sx=0; sx<32; sx++)
	187	for (sx = 0; sx < 32; sx++)
188	188	{
189	189	int tileno, colour;
190	190
191		tileno = (psikyosh_bgram[(bank*0x800)/4 + offs - 0x4000/4] & 0x0007ffff); /* seems to take into account spriteram, hence -0x4000 */
192		colour = (psikyosh_bgram[(bank*0x800)/4 + offs - 0x4000/4] & 0xff000000) >> 24;
	191	tileno = (state->bgram[(bank * 0x800) / 4 + offs - 0x4000 / 4] & 0x0007ffff); /* seems to take into account spriteram, hence -0x4000 */
	192	colour = (state->bgram[(bank * 0x800) / 4 + offs - 0x4000 / 4] & 0xff000000) >> 24;
193	193
194		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,(16*sx+scrollx)&0x1ff,((16*sy+scrolly)&(width-1)),alpha); /* normal */
195		if(scrollx)
196		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,((16*sx+scrollx)&0x1ff)-0x200,((16*sy+scrolly)&(width-1)),alpha); /* wrap x */
197		if(scrolly)
198		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,(16*sx+scrollx)&0x1ff,((16*sy+scrolly)&(width-1))-width,alpha); /* wrap y */
199		if(scrollx && scrolly)
200		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,((16*sx+scrollx)&0x1ff)-0x200,((16*sy+scrolly)&(width-1))-width,alpha); /* wrap xy */
	194	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, (16 * sx + scrollx) & 0x1ff, ((16 * sy + scrolly) & (width - 1)), alpha); /* normal */
201	195
	196	if (scrollx)
	197	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, ((16 * sx + scrollx) & 0x1ff) - 0x200, ((16 * sy + scrolly) & (width - 1)), alpha); /* wrap x */
	198	if (scrolly)
	199	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, (16 * sx + scrollx) & 0x1ff, ((16 * sy + scrolly) & (width - 1)) - width, alpha); /* wrap y */
	200	if (scrollx && scrolly)
	201	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, ((16 * sx + scrollx) & 0x1ff) - 0x200, ((16 * sy + scrolly) & (width - 1)) - width, alpha); /* wrap xy */
	202
202	203	offs++;
203	204	}
204	205	}
r6740	r6741
207	208
208	209	/* This is a complete bodge for the daraku text layers. There is not enough info to be sure how it is supposed to work */
209	210	/* It appears that there are row/column scroll values for 2 seperate layers, just drawing it twice using one of each of the sets of values for now */
210		static void draw_bglayertext(running_machine *machine, int layer, bitmap_t *bitmap, const rectangle *cliprect )
	211	static void draw_bglayertext( running_machine *machine, int layer, bitmap_t *bitmap, const rectangle *cliprect )
211	212	{
	213	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
212	214	gfx_element *gfx;
213	215	int offs, sx, sy;
214		int scrollx, scrolly, bank, size, width, scrollbank,alpha,alphamap;
	216	int scrollx, scrolly, bank, size, width, scrollbank, alpha, alphamap;
215	217
216	218	scrollbank = BG_TYPE(layer); /* Scroll bank appears to be same as layer type */
217	219
r6740	r6741
220	222	width = BG_LARGE(layer) ? 0x200 : 0x100;
221	223
222	224	/* Use first values from the first set of scroll values */
223		bank    = (psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 - 0x4000/4] & 0x000000ff) >> 0;
224		alpha   = (psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 - 0x4000/4] & 0x00003f00) >> 8;
225		alphamap =(psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 - 0x4000/4] & 0x00008000) >> 15;
226		scrollx = (psikyosh_bgram[(scrollbank*0x800)/4 - 0x4000/4] & 0x000001ff) >> 0;
227		scrolly = (psikyosh_bgram[(scrollbank*0x800)/4 - 0x4000/4] & 0x03ff0000) >> 16;
	225	bank     = (state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 - 0x4000 / 4] & 0x000000ff) >> 0;
	226	alpha    = (state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 - 0x4000 / 4] & 0x00003f00) >> 8;
	227	alphamap = (state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 - 0x4000 / 4] & 0x00008000) >> 15;
	228	scrollx  = (state->bgram[(scrollbank * 0x800) / 4 - 0x4000 / 4] & 0x000001ff) >> 0;
	229	scrolly  = (state->bgram[(scrollbank * 0x800) / 4 - 0x4000 / 4] & 0x03ff0000) >> 16;
228	230
229		if(alphamap) { /* alpha values are per-pen */
	231	if (alphamap)   /* alpha values are per-pen */
230	232	alpha = -1;
231		} else {
232		alpha = ((0x3f-alpha)*0xff)/0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
233		}
	233	else
	234	alpha = ((0x3f - alpha) * 0xff) / 0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
234	235
235
236		if((bank>=0x0c) && (bank<=0x1f)) { /* shouldn't happen, 20 banks of 0x800 bytes */
237		offs=0;
238		for ( sy=0; sy<size; sy++) {
239		for (sx=0; sx<32; sx++)   {
	236	if ((bank >= 0x0c) && (bank <= 0x1f)) /* shouldn't happen, 20 banks of 0x800 bytes */
	237	{
	238	offs = 0;
	239	for (sy = 0; sy < size; sy++)
	240	{
	241	for (sx = 0; sx < 32; sx++)
	242	{
240	243	int tileno, colour;
241	244
242		tileno = (psikyosh_bgram[(bank*0x800)/4 + offs - 0x4000/4] & 0x0007ffff); /* seems to take into account spriteram, hence -0x4000 */
243		colour = (psikyosh_bgram[(bank*0x800)/4 + offs - 0x4000/4] & 0xff000000) >> 24;
	245	tileno = (state->bgram[(bank * 0x800) / 4 + offs - 0x4000 / 4] & 0x0007ffff); /* seems to take into account spriteram, hence -0x4000 */
	246	colour = (state->bgram[(bank * 0x800) / 4 + offs - 0x4000 / 4] & 0xff000000) >> 24;
244	247
245		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,(16*sx+scrollx)&0x1ff,((16*sy+scrolly)&(width-1)),alpha); /* normal */
246		if(scrollx)
247		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,((16*sx+scrollx)&0x1ff)-0x200,((16*sy+scrolly)&(width-1)),alpha); /* wrap x */
248		if(scrolly)
249		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,(16*sx+scrollx)&0x1ff,((16*sy+scrolly)&(width-1))-width,alpha); /* wrap y */
250		if(scrollx && scrolly)
251		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,((16*sx+scrollx)&0x1ff)-0x200,((16*sy+scrolly)&(width-1))-width,alpha); /* wrap xy */
	248	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, (16 * sx + scrollx) & 0x1ff, ((16 * sy + scrolly) & (width - 1)), alpha); /* normal */
252	249
	250	if (scrollx)
	251	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, ((16 * sx + scrollx) & 0x1ff) - 0x200, ((16 * sy + scrolly) & (width - 1)), alpha); /* wrap x */
	252	if (scrolly)
	253	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, (16 * sx + scrollx) & 0x1ff, ((16 * sy + scrolly) & (width - 1)) - width, alpha); /* wrap y */
	254	if (scrollx && scrolly)
	255	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, ((16 * sx + scrollx) & 0x1ff) - 0x200, ((16 * sy + scrolly) & (width - 1)) - width, alpha); /* wrap xy */
	256
253	257	offs++;
254		}}}
	258	}
	259	}
	260	}
255	261
256	262	/* Use first values from the second set of scroll values */
257		bank    = (psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 + 0x20/4 - 0x4000/4] & 0x000000ff) >> 0;
258		alpha   = (psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 + 0x20/4 - 0x4000/4] & 0x00003f00) >> 8;
259		alphamap =(psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 + 0x20/4 - 0x4000/4] & 0x00008000) >> 15;
260		scrollx = (psikyosh_bgram[(scrollbank*0x800)/4 - 0x4000/4 + 0x20/4] & 0x000001ff) >> 0;
261		scrolly = (psikyosh_bgram[(scrollbank*0x800)/4 - 0x4000/4 + 0x20/4] & 0x03ff0000) >> 16;
	263	bank     = (state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 + 0x20 / 4 - 0x4000 / 4] & 0x000000ff) >> 0;
	264	alpha    = (state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 + 0x20 / 4 - 0x4000 / 4] & 0x00003f00) >> 8;
	265	alphamap = (state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 + 0x20 / 4 - 0x4000 / 4] & 0x00008000) >> 15;
	266	scrollx  = (state->bgram[(scrollbank * 0x800) / 4 - 0x4000 / 4 + 0x20 / 4] & 0x000001ff) >> 0;
	267	scrolly  = (state->bgram[(scrollbank * 0x800) / 4 - 0x4000 / 4 + 0x20 / 4] & 0x03ff0000) >> 16;
262	268
263		if(alphamap) { /* alpha values are per-pen */
	269	if (alphamap) /* alpha values are per-pen */
264	270	alpha = -1;
265		} else {
266		alpha = ((0x3f-alpha)*0xff)/0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
267		}
	271	else
	272	alpha = ((0x3f - alpha) * 0xff) / 0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
268	273
269		if((bank>=0x0c) && (bank<=0x1f)) { /* shouldn't happen, 20 banks of 0x800 bytes */
270		offs=0;
271		for ( sy=0; sy<size; sy++) {
272		for (sx=0; sx<32; sx++) {
	274	if ((bank >= 0x0c) && (bank <= 0x1f)) /* shouldn't happen, 20 banks of 0x800 bytes */
	275	{
	276	offs = 0;
	277	for (sy = 0; sy < size; sy++)
	278	{
	279	for (sx = 0; sx < 32; sx++)
	280	{
273	281	int tileno, colour;
274	282
275		tileno = (psikyosh_bgram[(bank*0x800)/4 + offs - 0x4000/4] & 0x0007ffff); /* seems to take into account spriteram, hence -0x4000 */
276		colour = (psikyosh_bgram[(bank*0x800)/4 + offs - 0x4000/4] & 0xff000000) >> 24;
	283	tileno = (state->bgram[(bank * 0x800) / 4 + offs - 0x4000 / 4] & 0x0007ffff); /* seems to take into account spriteram, hence -0x4000 */
	284	colour = (state->bgram[(bank * 0x800) / 4 + offs - 0x4000 / 4] & 0xff000000) >> 24;
277	285
278		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,(16*sx+scrollx)&0x1ff,((16*sy+scrolly)&(width-1)),alpha); /* normal */
279		if(scrollx)
280		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,((16*sx+scrollx)&0x1ff)-0x200,((16*sy+scrolly)&(width-1)),alpha); /* wrap x */
281		if(scrolly)
282		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,(16*sx+scrollx)&0x1ff,((16*sy+scrolly)&(width-1))-width,alpha); /* wrap y */
283		if(scrollx && scrolly)
284		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,((16*sx+scrollx)&0x1ff)-0x200,((16*sy+scrolly)&(width-1))-width,alpha); /* wrap xy */
	286	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, (16 * sx + scrollx) & 0x1ff, ((16 * sy + scrolly) & (width - 1)), alpha); /* normal */
285	287
	288	if (scrollx)
	289	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, ((16 * sx + scrollx) & 0x1ff) - 0x200, ((16 * sy + scrolly) & (width - 1)), alpha); /* wrap x */
	290	if (scrolly)
	291	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, (16 * sx + scrollx) & 0x1ff, ((16 * sy + scrolly) & (width - 1)) - width, alpha); /* wrap y */
	292	if (scrollx && scrolly)
	293	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, ((16 * sx + scrollx) & 0x1ff) - 0x200, ((16 * sy + scrolly) & (width - 1)) - width, alpha); /* wrap xy */
	294
286	295	offs++;
287		}}}
	296	}
	297	}
	298	}
288	299	}
289	300
290	301	/* Row Scroll and/or Column Scroll/Zoom, has per-column Alpha/Bank/Priority. This isn't correct, just testing */
291	302	/* For now I'm just using the first alpha/bank/priority values and sodding the rest of it */
292		static void draw_bglayerscroll(running_machine *machine, int layer, bitmap_t *bitmap, const rectangle *cliprect )
	303	static void draw_bglayerscroll( running_machine *machine, int layer, bitmap_t *bitmap, const rectangle *cliprect )
293	304	{
	305	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
294	306	gfx_element *gfx;
295	307	int offs, sx, sy;
296	308	int scrollx, scrolly, bank, alpha, alphamap, size, width, scrollbank;
r6740	r6741
300	312	//  bank = BG_TYPE(layer) - 0x02; /* This is an assumption which seems to hold true so far, although the bank seems to be selectable per-line */
301	313
302	314	/* Take the following details from the info for the first row, the same for every row in all cases so far */
303		bank    = (psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 - 0x4000/4] & 0x000000ff) >> 0;
304		alpha   = (psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 - 0x4000/4] & 0x00003f00) >> 8;
305		alphamap =(psikyosh_bgram[(scrollbank*0x800)/4 + 0x400/4 - 0x4000/4] & 0x00008000) >> 15;
	315	bank    = (state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 - 0x4000 / 4] & 0x000000ff) >> 0;
	316	alpha   = (state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 - 0x4000 / 4] & 0x00003f00) >> 8;
	317	alphamap =(state->bgram[(scrollbank * 0x800) / 4 + 0x400 / 4 - 0x4000 / 4] & 0x00008000) >> 15;
306	318
307	319	/* Just to get things moving :) */
308		scrollx =(psikyosh_bgram[(scrollbank*0x800)/4 - 0x4000/4] & 0x000001ff) >> 0;
	320	scrollx =(state->bgram[(scrollbank * 0x800) / 4 - 0x4000 / 4] & 0x000001ff) >> 0;
309	321	scrolly = 0; // ColumnZoom is combined with ColumnScroll values :(
310	322
311	323	gfx = BG_DEPTH_8BPP(layer) ? machine->gfx[1] : machine->gfx[0];
312	324	size = BG_LARGE(layer) ? 32 : 16;
313	325	width = BG_LARGE(layer) ? 0x200 : 0x100;
314	326
315		if(alphamap) { /* alpha values are per-pen */
	327	if (alphamap) /* alpha values are per-pen */
316	328	alpha = -1;
317		} else {
318		alpha = ((0x3f-alpha)*0xff)/0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
319		}
	329	else
	330	alpha = ((0x3f - alpha) * 0xff) / 0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
320	331
321		if((bank>=0x0c) && (bank<=0x1f)) /* shouldn't happen, 20 banks of 0x800 bytes */
	332	if ((bank >= 0x0c) && (bank <= 0x1f)) /* shouldn't happen, 20 banks of 0x800 bytes */
322	333	{
323	334	/* Looks better with blending and one scroll value than with 1D linescroll and no zoom */
324	335	#if 0
325	336	int bg_scrollx[256], bg_scrolly[512];
326		bitmap_fill(zoom_bitmap, NULL, get_black_pen(screen->machine));
327		for (offs=0; offs<(0x400/4); offs++) /* 224 values for each */
	337	bitmap_fill(state->zoom_bitmap, NULL, get_black_pen(screen->machine));
	338	for (offs = 0; offs < (0x400 / 4); offs++) /* 224 values for each */
328	339	{
329		bg_scrollx[offs] = (psikyosh_bgram[(scrollbank*0x800)/4 + offs - 0x4000/4] & 0x000001ff) >> 0;
330		bg_scrolly[2*offs] = (psikyosh_bgram[(scrollbank*0x800)/4 + offs - 0x4000/4] & 0x03ff0000) >> 16;
331		bg_scrolly[2*offs+1] = (psikyosh_bgram[(scrollbank*0x800)/4 + offs - 0x4000/4] & 0x03ff0000) >> 16;
	340	bg_scrollx[offs]         = (state->bgram[(scrollbank * 0x800) / 4 + offs - 0x4000 / 4] & 0x000001ff) >> 0;
	341	bg_scrolly[2 * offs]     = (state->bgram[(scrollbank * 0x800) / 4 + offs - 0x4000 / 4] & 0x03ff0000) >> 16;
	342	bg_scrolly[2 * offs + 1] = (state->bgram[(scrollbank * 0x800) / 4 + offs - 0x4000 / 4] & 0x03ff0000) >> 16;
332	343	}
333	344	#endif
334	345
335		offs=0;
336		for ( sy=0; sy<size; sy++)
	346	offs = 0;
	347	for (sy = 0; sy < size; sy++)
337	348	{
338		for (sx=0; sx<32; sx++)
	349	for (sx = 0; sx < 32; sx++)
339	350	{
340	351	int tileno, colour;
341	352
342		tileno = (psikyosh_bgram[(bank*0x800)/4 + offs - 0x4000/4] & 0x0007ffff); /* seems to take into account spriteram, hence -0x4000 */
343		colour = (psikyosh_bgram[(bank*0x800)/4 + offs - 0x4000/4] & 0xff000000) >> 24;
	353	tileno = (state->bgram[(bank * 0x800) / 4 + offs - 0x4000 / 4] & 0x0007ffff); /* seems to take into account spriteram, hence -0x4000 */
	354	colour = (state->bgram[(bank * 0x800) / 4 + offs - 0x4000 / 4] & 0xff000000) >> 24;
344	355
345		//              drawgfx_transpen(zoom_bitmap,NULL,gfx,tileno,colour,0,0,(16*sx)&0x1ff,((16*sy)&(width-1)),0);
	356	//              drawgfx_transpen(state->zoom_bitmap, NULL, gfx, tileno, colour, 0, 0, (16 * sx) & 0x1ff, ((16 * sy) & (width - 1)), 0);
346	357
347		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,(16*sx+scrollx)&0x1ff,((16*sy+scrolly)&(width-1)),alpha); /* normal */
348		if(scrollx)
349		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,((16*sx+scrollx)&0x1ff)-0x200,((16*sy+scrolly)&(width-1)),alpha); /* wrap x */
350		if(scrolly)
351		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,(16*sx+scrollx)&0x1ff,((16*sy+scrolly)&(width-1))-width,alpha); /* wrap y */
352		if(scrollx && scrolly)
353		drawgfx_alphatable(bitmap,cliprect,gfx,tileno,colour,0,0,((16*sx+scrollx)&0x1ff)-0x200,((16*sy+scrolly)&(width-1))-width,alpha); /* wrap xy */
	358	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, (16 * sx + scrollx) & 0x1ff, ((16 * sy + scrolly) & (width - 1)), alpha); /* normal */
354	359
	360	if (scrollx)
	361	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, ((16 * sx + scrollx) & 0x1ff) - 0x200, ((16 * sy + scrolly) & (width - 1)), alpha); /* wrap x */
	362	if (scrolly)
	363	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, (16 * sx + scrollx) & 0x1ff, ((16 * sy + scrolly) & (width - 1)) - width, alpha); /* wrap y */
	364	if (scrollx && scrolly)
	365	drawgfx_alphatable(bitmap, cliprect, gfx, tileno, colour, 0, 0, ((16 * sx + scrollx) & 0x1ff) - 0x200, ((16 * sy + scrolly) & (width - 1)) - width, alpha); /* wrap xy */
	366
355	367	offs++;
356	368	}
357	369	}
358	370	/* Only ever seems to use one linescroll value, ok for now */
359	371	/* Disabled for now, as they doesn't even support alpha :( */
360		//      copyscrollbitmap_trans(bitmap,zoom_bitmap,1,bg_scrollx,512,bg_scrolly,cliprect,0);
361		//      copyscrollbitmap_trans(bitmap,zoom_bitmap,256,bg_scrollx,0,bg_scrolly,cliprect,0);
	372	//      copyscrollbitmap_trans(bitmap, state->zoom_bitmap, 1, bg_scrollx, 512, bg_scrolly, cliprect, 0);
	373	//      copyscrollbitmap_trans(bitmap, state->zoom_bitmap, 256, bg_scrollx, 0, bg_scrolly, cliprect, 0);
362	374	}
363	375	}
364	376
365	377	/* 3 BG layers, with priority */
366		static void draw_background(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT8 req_pri )
	378	static void draw_background( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT8 req_pri )
367	379	{
	380	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
368	381	int i;
369	382
370	383	#if 0
r6740	r6741
377	390	#endif
378	391
379	392	/* 1st-3rd layers */
380		for(i=0; i<3; i++)
	393	for (i = 0; i < 3; i++)
381	394	{
382		if ( !BG_LAYER_ENABLE(i) )
	395	if (!BG_LAYER_ENABLE(i))
383	396	continue;
384	397
385		switch(BG_TYPE(i))
	398	switch (BG_TYPE(i))
386	399	{
387	400	case BG_NORMAL:
388		if(((psikyosh_bgram[0x17f0/4 + (i*0x04)/4] & 0xff000000) >> 24) == req_pri)
	401	if (((state->bgram[0x17f0 / 4 + (i * 0x04) / 4] & 0xff000000) >> 24) == req_pri)
389	402	draw_bglayer(machine, i, bitmap, cliprect);
390	403	break;
391	404	case BG_NORMAL_ALT:
392		if(((psikyosh_bgram[0x1ff0/4 + (i*0x04)/4] & 0xff000000) >> 24) == req_pri)
	405	if (((state->bgram[0x1ff0 / 4 + (i * 0x04) / 4] & 0xff000000) >> 24) == req_pri)
393	406	draw_bglayer(machine, i, bitmap, cliprect);
394	407	break;
395	408	case BG_SCROLL_0C: // Using normal for now
396	409	case BG_SCROLL_0D: // Using normal for now
397		if(((psikyosh_bgram[(BG_TYPE(i)*0x800)/4 + 0x400/4 - 0x4000/4] & 0xff000000) >> 24) == req_pri)
	410	if (((state->bgram[(BG_TYPE(i) * 0x800) / 4 + 0x400 / 4 - 0x4000 / 4] & 0xff000000) >> 24) == req_pri)
398	411	draw_bglayertext(machine, i, bitmap, cliprect);
399	412	break;
400	413	case BG_SCROLL_ZOOM:
r6740	r6741
403	416	case 0x14: case 0x15: case 0x16: case 0x17:
404	417	case 0x18: case 0x19: case 0x1a: case 0x1b:
405	418	case 0x1c: case 0x1d: case 0x1e: case 0x1f:
406		if(((psikyosh_bgram[(BG_TYPE(i)*0x800)/4 + 0x400/4 - 0x4000/4] & 0xff000000) >> 24) == req_pri)
	419	if (((state->bgram[(BG_TYPE(i) * 0x800) / 4 + 0x400 / 4 - 0x4000 / 4] & 0xff000000) >> 24) == req_pri)
407	420	draw_bglayerscroll(machine, i, bitmap, cliprect);
408	421	break;
409	422	default:
r6740	r6741
421	434	/* sx and sy is top-left of entire sprite regardless of flip */
422	435	/* Note that Level 5-4 of sbomberb boss is perfect! (Alpha blended zoomed) as well as S1945II logo */
423	436	/* pixel is only plotted if z is >= priority_buffer[y][x] */
424		static void psikyosh_drawgfxzoom(
	437	static void psikyosh_drawgfxzoom( running_machine *machine,
425	438	bitmap_t *dest_bmp,const rectangle *clip,const gfx_element *gfx,
426	439	UINT32 code,UINT32 color,int flipx,int flipy,int offsx,int offsy,
427	440	int alpha,
428	441	int zoomx, int zoomy, int wide, int high, UINT32 z)
429	442	{
	443	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
430	444	rectangle myclip; /* Clip to screen boundaries */
431	445	int code_offset = 0;
432	446	int xtile, ytile, xpixel, ypixel;
433	447
434		if (!zoomx || !zoomy) return;
	448	if (!zoomx || !zoomy)
	449	return;
435	450
436	451	profiler_mark_start(PROFILER_DRAWGFX);
437	452
438	453	assert(dest_bmp->bpp == 32);
439	454
440	455	/* KW 991012 -- Added code to force clip to bitmap boundary */
441		if(clip)
	456	if (clip)
442	457	{
443	458	myclip.min_x = clip->min_x;
444	459	myclip.max_x = clip->max_x;
r6740	r6741
446	461	myclip.max_y = clip->max_y;
447	462
448	463	if (myclip.min_x < 0) myclip.min_x = 0;
449		if (myclip.max_x >= dest_bmp->width) myclip.max_x = dest_bmp->width-1;
	464	if (myclip.max_x >= dest_bmp->width) myclip.max_x = dest_bmp->width - 1;
450	465	if (myclip.min_y < 0) myclip.min_y = 0;
451	466	if (myclip.max_y >= dest_bmp->height) myclip.max_y = dest_bmp->height-1;
452	467
453		clip=&myclip;
	468	clip = &myclip;
454	469	}
455	470
456	471	/* Temporary fallback for non-zoomed, needs z-buffer. Note that this is probably a lot slower than drawgfx.c, especially if there was seperate code for flipped cases */
r6740	r6741
458	473	{
459	474	int xstart, ystart, xend, yend, xinc, yinc;
460	475
461		if (flipx)   { xstart = wide-1; xend = -1;   xinc = -1; }
462		else      { xstart = 0;      xend = wide; xinc = +1; }
	476	if (flipx)   { xstart = wide - 1; xend = -1;   xinc = -1; }
	477	else      { xstart = 0;        xend = wide; xinc = +1; }
463	478
464		if (flipy)   { ystart = high-1; yend = -1;   yinc = -1; }
465		else      { ystart = 0;      yend = high; yinc = +1; }
	479	if (flipy)   { ystart = high - 1; yend = -1;   yinc = -1; }
	480	else      { ystart = 0;        yend = high; yinc = +1; }
466	481
467	482	/* Start drawing */
468		if( gfx )
	483	if (gfx)
469	484	{
470		for (ytile = ystart; ytile != yend; ytile += yinc )
	485	for (ytile = ystart; ytile != yend; ytile += yinc)
471	486	{
472		for (xtile = xstart; xtile != xend; xtile += xinc )
	487	for (xtile = xstart; xtile != xend; xtile += xinc)
473	488	{
474	489	const pen_t *pal = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
475	490	const UINT8 *code_base = gfx_element_get_data(gfx, (code + code_offset++) % gfx->total_elements);
476	491
477	492	int x_index_base, y_index, sx, sy, ex, ey;
478	493
479		if (flipx)   { x_index_base = gfx->width-1; }
	494	if (flipx)   { x_index_base = gfx->width - 1; }
480	495	else      { x_index_base = 0; }
481	496
482	497	if (flipy)   { y_index = gfx->height-1; }
483	498	else      { y_index = 0; }
484	499
485	500	/* start coordinates */
486		sx = offsx + xtile*gfx->width;
487		sy = offsy + ytile*gfx->height;
	501	sx = offsx + xtile * gfx->width;
	502	sy = offsy + ytile * gfx->height;
488	503
489	504	/* end coordinates */
490	505	ex = sx + gfx->width;
491	506	ey = sy + gfx->height;
492	507
493		if( clip )
	508	if (clip)
494	509	{
495		if( sx < clip->min_x)
	510	if (sx < clip->min_x)
496	511	{ /* clip left */
497		int pixels = clip->min_x-sx;
	512	int pixels = clip->min_x - sx;
498	513	sx += pixels;
499		x_index_base += xinc*pixels;
	514	x_index_base += xinc * pixels;
500	515	}
501		if( sy < clip->min_y )
	516	if (sy < clip->min_y)
502	517	{ /* clip top */
503		int pixels = clip->min_y-sy;
	518	int pixels = clip->min_y - sy;
504	519	sy += pixels;
505		y_index += yinc*pixels;
	520	y_index += yinc * pixels;
506	521	}
507	522	/* NS 980211 - fixed incorrect clipping */
508		if( ex > clip->max_x+1 )
	523	if (ex > clip->max_x + 1)
509	524	{ /* clip right */
510		int pixels = ex-clip->max_x-1;
	525	int pixels = ex - clip->max_x - 1;
511	526	ex -= pixels;
512	527	}
513		if( ey > clip->max_y+1 )
	528	if (ey > clip->max_y + 1)
514	529	{ /* clip bottom */
515		int pixels = ey-clip->max_y-1;
	530	int pixels = ey - clip->max_y - 1;
516	531	ey -= pixels;
517	532	}
518	533	}
519	534
520		if( ex>sx )
	535	if (ex > sx)
521	536	{ /* skip if inner loop doesn't draw anything */
522	537	int y;
523	538
524	539	/* case 1: no alpha */
525	540	if (alpha == 0xff)
526	541	{
527		if( z > 0 )
	542	if (z > 0)
528	543	{
529		const UINT8 *source = code_base + (y_index)*gfx->line_modulo + x_index_base;
530		UINT32 *dest = (UINT32 *)dest_bmp->base + sy*dest_bmp->rowpixels + sx;
531		UINT16 *pri = (UINT16 *)z_bitmap->base + sy*z_bitmap->rowpixels + sx;
532		int src_modulo = yinc*gfx->line_modulo - xinc*(ex-sx);
533		int dst_modulo = dest_bmp->rowpixels - (ex-sx);
	544	const UINT8 *source = code_base + (y_index) * gfx->line_modulo + x_index_base;
	545	UINT32 *dest = (UINT32 *)dest_bmp->base + sy * dest_bmp->rowpixels + sx;
	546	UINT16 *pri = (UINT16 *)state->z_bitmap->base + sy * state->z_bitmap->rowpixels + sx;
	547	int src_modulo = yinc * gfx->line_modulo - xinc * (ex - sx);
	548	int dst_modulo = dest_bmp->rowpixels - (ex - sx);
534	549
535		for( y=sy; y<ey; y++ )
	550	for (y = sy; y < ey; y++)
536	551	{
537	552	int x;
538		for( x=sx; x<ex; x++ )
	553	for (x = sx; x < ex; x++)
539	554	{
540		if(z >= *pri)
	555	if (z >= *pri)
541	556	{
542	557	int c = *source;
543		if( c != 0 )
	558	if (c != 0)
544	559	{
545	560	*dest = pal[c];
546	561	*pri = z;
r6740	r6741
557	572	}
558	573	else
559	574	{
560		const UINT8 *source = code_base + y_index*gfx->line_modulo + x_index_base;
561		UINT32 *dest = (UINT32 *)dest_bmp->base + sy*dest_bmp->rowpixels + sx;
562		int src_modulo = yinc*gfx->line_modulo - xinc*(ex-sx);
563		int dst_modulo = dest_bmp->rowpixels - (ex-sx);
	575	const UINT8 *source = code_base + y_index * gfx->line_modulo + x_index_base;
	576	UINT32 *dest = (UINT32 *)dest_bmp->base + sy * dest_bmp->rowpixels + sx;
	577	int src_modulo = yinc * gfx->line_modulo - xinc * (ex - sx);
	578	int dst_modulo = dest_bmp->rowpixels - (ex - sx);
564	579
565		for( y=sy; y<ey; y++ )
	580	for (y = sy; y < ey; y++)
566	581	{
567	582	int x;
568		for( x=sx; x<ex; x++ )
	583	for (x = sx; x < ex; x++)
569	584	{
570	585	int c = *source;
571		if( c != 0 ) *dest = pal[c];
	586	if (c != 0)
	587	*dest = pal[c];
572	588
573	589	dest++;
574	590	source += xinc;
r6740	r6741
582	598	/* case 6: alpha-blended */
583	599	else if (alpha >= 0)
584	600	{
585		if ( z > 0 )
	601	if (z > 0)
586	602	{
587		const UINT8 *source = code_base + y_index*gfx->line_modulo + x_index_base;
588		UINT32 *dest = (UINT32 *)dest_bmp->base + sy*dest_bmp->rowpixels + sx;
589		UINT16 *pri = (UINT16 *)z_bitmap->base + sy*z_bitmap->rowpixels + sx;
590		int src_modulo = yinc*gfx->line_modulo - xinc*(ex-sx);
591		int dst_modulo = dest_bmp->rowpixels - (ex-sx);
	603	const UINT8 *source = code_base + y_index * gfx->line_modulo + x_index_base;
	604	UINT32 *dest = (UINT32 *)dest_bmp->base + sy * dest_bmp->rowpixels + sx;
	605	UINT16 *pri = (UINT16 *)state->z_bitmap->base + sy * state->z_bitmap->rowpixels + sx;
	606	int src_modulo = yinc * gfx->line_modulo - xinc * (ex - sx);
	607	int dst_modulo = dest_bmp->rowpixels - (ex - sx);
592	608
593		for( y=sy; y<ey; y++ )
	609	for (y = sy; y < ey; y++)
594	610	{
595	611	int x;
596		for( x=sx; x<ex; x++ )
	612	for (x = sx; x < ex; x++)
597	613	{
598		if(z >= *pri)
	614	if (z >= *pri)
599	615	{
600	616	int c = *source;
601		if( c != 0 )
	617	if (c != 0)
602	618	{
603	619	*dest = alpha_blend_r32(*dest, pal[c], alpha);
604	620	*pri = z;
r6740	r6741
615	631	}
616	632	else
617	633	{
618		const UINT8 *source = code_base + y_index*gfx->line_modulo + x_index_base;
619		UINT32 *dest = (UINT32 *)dest_bmp->base + sy*dest_bmp->rowpixels + sx;
620		int src_modulo = yinc*gfx->line_modulo - xinc*(ex-sx);
621		int dst_modulo = dest_bmp->rowpixels - (ex-sx);
	634	const UINT8 *source = code_base + y_index * gfx->line_modulo + x_index_base;
	635	UINT32 *dest = (UINT32 *)dest_bmp->base + sy * dest_bmp->rowpixels + sx;
	636	int src_modulo = yinc * gfx->line_modulo - xinc * (ex - sx);
	637	int dst_modulo = dest_bmp->rowpixels - (ex - sx);
622	638
623		for( y=sy; y<ey; y++ )
	639	for (y = sy; y < ey; y++)
624	640	{
625	641	int x;
626		for( x=sx; x<ex; x++ )
	642	for (x = sx; x < ex; x++)
627	643	{
628	644	int c = *source;
629		if( c != 0 ) *dest = alpha_blend_r32(*dest, pal[c], alpha);
	645	if (c != 0)
	646	*dest = alpha_blend_r32(*dest, pal[c], alpha);
630	647
631	648	dest++;
632	649	source += xinc;
r6740	r6741
641	658	/* case 7: TRANSPARENCY_ALPHARANGE */
642	659	else
643	660	{
644		if ( z > 0 )
	661	if (z > 0)
645	662	{
646		const UINT8 *source = code_base + y_index*gfx->line_modulo + x_index_base;
647		UINT32 *dest = (UINT32 *)dest_bmp->base + sy*dest_bmp->rowpixels + sx;
648		UINT16 *pri = (UINT16 *)z_bitmap->base + sy*z_bitmap->rowpixels + sx;
649		int src_modulo = yinc*gfx->line_modulo - xinc*(ex-sx);
650		int dst_modulo = dest_bmp->rowpixels - (ex-sx);
	663	const UINT8 *source = code_base + y_index * gfx->line_modulo + x_index_base;
	664	UINT32 *dest = (UINT32 *)dest_bmp->base + sy * dest_bmp->rowpixels + sx;
	665	UINT16 *pri = (UINT16 *)state->z_bitmap->base + sy * state->z_bitmap->rowpixels + sx;
	666	int src_modulo = yinc * gfx->line_modulo - xinc * (ex - sx);
	667	int dst_modulo = dest_bmp->rowpixels - (ex - sx);
651	668
652		for( y=sy; y<ey; y++ )
	669	for (y = sy; y < ey; y++)
653	670	{
654	671	int x;
655		for( x=sx; x<ex; x++ )
	672	for (x = sx; x < ex; x++)
656	673	{
657		if(z >= *pri)
	674	if (z >= *pri)
658	675	{
659	676	int c = *source;
660		if( c != 0 )
	677	if (c != 0)
661	678	{
662		if( alphatable[c] == 0xff )
	679	if (alphatable[c] == 0xff)
663	680	*dest = pal[c];
664	681	else
665	682	*dest = alpha_blend_r32(*dest, pal[c], alphatable[c]);
r6740	r6741
678	695	}
679	696	else
680	697	{
681		const UINT8 *source = code_base + y_index*gfx->line_modulo + x_index_base;
682		UINT32 *dest = (UINT32 *)dest_bmp->base + sy*dest_bmp->rowpixels + sx;
683		int src_modulo = yinc*gfx->line_modulo - xinc*(ex-sx);
684		int dst_modulo = dest_bmp->rowpixels - (ex-sx);
	698	const UINT8 *source = code_base + y_index * gfx->line_modulo + x_index_base;
	699	UINT32 *dest = (UINT32 *)dest_bmp->base + sy * dest_bmp->rowpixels + sx;
	700	int src_modulo = yinc * gfx->line_modulo - xinc * (ex - sx);
	701	int dst_modulo = dest_bmp->rowpixels - (ex - sx);
685	702
686		for( y=sy; y<ey; y++ )
	703	for (y = sy; y < ey; y++)
687	704	{
688	705	int x;
689		for( x=sx; x<ex; x++ )
	706	for (x = sx; x < ex; x++)
690	707	{
691	708	int c = *source;
692		if( c != 0 )
	709	if (c != 0)
693	710	{
694		if( alphatable[c] == 0xff )
	711	if (alphatable[c] == 0xff)
695	712	*dest = pal[c];
696	713	else
697	714	*dest = alpha_blend_r32(*dest, pal[c], alphatable[c]);
r6740	r6741
714	731	{
715	732	/* Make a copy of complete sprite at top-left of zoom_bitmap */
716	733	/* Because I'm too slow to get it to work on the fly */
717		for(ytile=0; ytile<high; ytile++)
	734	for (ytile = 0; ytile < high; ytile++)
718	735	{
719		for(xtile=0; xtile<wide; xtile++)
	736	for (xtile = 0; xtile < wide; xtile++)
720	737	{
721	738	const UINT8 *code_base = gfx_element_get_data(gfx, (code + code_offset++) % gfx->total_elements);
722		for( ypixel=0; ypixel<gfx->height; ypixel++ )
	739	for (ypixel = 0; ypixel < gfx->height; ypixel++)
723	740	{
724	741	const UINT8 *source = code_base + ypixel * gfx->line_modulo;
725		UINT8 *dest = BITMAP_ADDR8(zoom_bitmap, ypixel + ytile*gfx->height, 0);
	742	UINT8 *dest = BITMAP_ADDR8(state->zoom_bitmap, ypixel + ytile*gfx->height, 0);
726	743
727		for( xpixel=0; xpixel<gfx->width; xpixel++ )
	744	for (xpixel = 0; xpixel < gfx->width; xpixel++)
728	745	{
729	746	dest[xpixel + xtile*gfx->width] = source[xpixel];
730	747	}
r6740	r6741
733	750	}
734	751
735	752	/* Start drawing */
736		if( gfx )
	753	if (gfx)
737	754	{
738	755	const pen_t *pal = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
739	756
740		int sprite_screen_height = ((high*gfx->height*(0x400*0x400))/zoomy + 0x200)>>10; /* Round up to nearest pixel */
741		int sprite_screen_width = ((wide*gfx->width*(0x400*0x400))/zoomx + 0x200)>>10;
	757	int sprite_screen_height = ((high * gfx->height * (0x400 * 0x400)) / zoomy + 0x200) >> 10; /* Round up to nearest pixel */
	758	int sprite_screen_width = ((wide * gfx->width * (0x400 * 0x400)) / zoomx + 0x200) >> 10;
742	759
743	760	if (sprite_screen_width && sprite_screen_height)
744	761	{
r6740	r6741
755	772
756	773	int dx, dy;
757	774
758		if( flipx )   { x_index_base = (sprite_screen_width-1)*zoomx; dx = -zoomx; }
	775	if (flipx)   { x_index_base = (sprite_screen_width - 1) * zoomx; dx = -zoomx; }
759	776	else      { x_index_base = 0; dx = zoomx; }
760	777
761		if( flipy )   { y_index = (sprite_screen_height-1)*zoomy; dy = -zoomy; }
	778	if (flipy)   { y_index = (sprite_screen_height - 1) * zoomy; dy = -zoomy; }
762	779	else      { y_index = 0; dy = zoomy; }
763	780
764		if( clip )
	781	if (clip)
765	782	{
766		if( sx < clip->min_x)
	783	if (sx < clip->min_x)
767	784	{ /* clip left */
768		int pixels = clip->min_x-sx;
	785	int pixels = clip->min_x - sx;
769	786	sx += pixels;
770		x_index_base += pixels*dx;
	787	x_index_base += pixels * dx;
771	788	}
772		if( sy < clip->min_y )
	789	if (sy < clip->min_y)
773	790	{ /* clip top */
774		int pixels = clip->min_y-sy;
	791	int pixels = clip->min_y - sy;
775	792	sy += pixels;
776		y_index += pixels*dy;
	793	y_index += pixels * dy;
777	794	}
778	795	/* NS 980211 - fixed incorrect clipping */
779		if( ex > clip->max_x+1 )
	796	if (ex > clip->max_x + 1)
780	797	{ /* clip right */
781		int pixels = ex-clip->max_x-1;
	798	int pixels = ex-clip->max_x - 1;
782	799	ex -= pixels;
783	800	}
784		if( ey > clip->max_y+1 )
	801	if (ey > clip->max_y + 1)
785	802	{ /* clip bottom */
786		int pixels = ey-clip->max_y-1;
	803	int pixels = ey-clip->max_y - 1;
787	804	ey -= pixels;
788	805	}
789	806	}
790	807
791		if( ex>sx )
	808	if (ex > sx)
792	809	{ /* skip if inner loop doesn't draw anything */
793	810	int y;
794	811
r6740	r6741
796	813	/* Note: adjusted to >>10 and draws from zoom_bitmap not gfx */
797	814	if (alpha == 0xff)
798	815	{
799		if( z > 0 )
	816	if (z > 0)
800	817	{
801		for( y=sy; y<ey; y++ )
	818	for (y = sy; y < ey; y++)
802	819	{
803		UINT8 *source = BITMAP_ADDR8(zoom_bitmap, y_index>>10, 0);
	820	UINT8 *source = BITMAP_ADDR8(state->zoom_bitmap, y_index >> 10, 0);
804	821	UINT32 *dest = BITMAP_ADDR32(dest_bmp, y, 0);
805		UINT16 *pri = BITMAP_ADDR16(z_bitmap, y, 0);
	822	UINT16 *pri = BITMAP_ADDR16(state->z_bitmap, y, 0);
806	823
807	824	int x, x_index = x_index_base;
808		for( x=sx; x<ex; x++ )
	825	for (x = sx; x < ex; x++)
809	826	{
810		if(z >= pri[x])
	827	if (z >= pri[x])
811	828	{
812		int c = source[x_index>>10];
813		if( c != 0 )
	829	int c = source[x_index >> 10];
	830	if (c != 0)
814	831	{
815	832	dest[x] = pal[c];
816	833	pri[x] = z;
r6740	r6741
824	841	}
825	842	else
826	843	{
827		for( y=sy; y<ey; y++ )
	844	for (y = sy; y < ey; y++)
828	845	{
829		UINT8 *source = BITMAP_ADDR8(zoom_bitmap, y_index>>10, 0);
	846	UINT8 *source = BITMAP_ADDR8(state->zoom_bitmap, y_index >> 10, 0);
830	847	UINT32 *dest = BITMAP_ADDR32(dest_bmp, y, 0);
831	848
832	849	int x, x_index = x_index_base;
833		for( x=sx; x<ex; x++ )
	850	for (x = sx; x < ex; x++)
834	851	{
835		int c = source[x_index>>10];
836		if( c != 0 ) dest[x] = pal[c];
	852	int c = source[x_index >> 10];
	853	if (c != 0)
	854	dest[x] = pal[c];
837	855	x_index += dx;
838	856	}
839	857
r6740	r6741
845	863	/* case 6: alpha-blended */
846	864	else if (alpha >= 0)
847	865	{
848		if( z > 0 )
	866	if (z > 0)
849	867	{
850		for( y=sy; y<ey; y++ )
	868	for (y = sy; y < ey; y++)
851	869	{
852		UINT8 *source = BITMAP_ADDR8(zoom_bitmap, y_index>>10, 0);
	870	UINT8 *source = BITMAP_ADDR8(state->zoom_bitmap, y_index >> 10, 0);
853	871	UINT32 *dest = BITMAP_ADDR32(dest_bmp, y, 0);
854		UINT16 *pri = BITMAP_ADDR16(z_bitmap, y, 0);
	872	UINT16 *pri = BITMAP_ADDR16(state->z_bitmap, y, 0);
855	873
856	874	int x, x_index = x_index_base;
857		for( x=sx; x<ex; x++ )
	875	for (x = sx; x < ex; x++)
858	876	{
859		if(z >= pri[x])
	877	if (z >= pri[x])
860	878	{
861		int c = source[x_index>>10];
862		if( c != 0 )
	879	int c = source[x_index >> 10];
	880	if (c != 0)
863	881	{
864	882	dest[x] = alpha_blend_r32(dest[x], pal[c], alpha);
865	883	pri[x] = z;
r6740	r6741
873	891	}
874	892	else
875	893	{
876		for( y=sy; y<ey; y++ )
	894	for (y = sy; y < ey; y++)
877	895	{
878		UINT8 *source = BITMAP_ADDR8(zoom_bitmap, y_index>>10, 0);
	896	UINT8 *source = BITMAP_ADDR8(state->zoom_bitmap, y_index >> 10, 0);
879	897	UINT32 *dest = BITMAP_ADDR32(dest_bmp, y, 0);
880	898
881	899	int x, x_index = x_index_base;
882		for( x=sx; x<ex; x++ )
	900	for (x = sx; x < ex; x++)
883	901	{
884		int c = source[x_index>>10];
885		if( c != 0 ) dest[x] = alpha_blend_r32(dest[x], pal[c], alpha);
	902	int c = source[x_index >> 10];
	903	if (c != 0) dest[x] = alpha_blend_r32(dest[x], pal[c], alpha);
886	904	x_index += dx;
887	905	}
888	906
r6740	r6741
894	912	/* case 7: TRANSPARENCY_ALPHARANGE */
895	913	else
896	914	{
897		if( z > 0 )
	915	if (z > 0)
898	916	{
899		for( y=sy; y<ey; y++ )
	917	for (y = sy; y < ey; y++)
900	918	{
901		UINT8 *source = BITMAP_ADDR8(zoom_bitmap, y_index>>10, 0);
	919	UINT8 *source = BITMAP_ADDR8(state->zoom_bitmap, y_index >> 10, 0);
902	920	UINT32 *dest = BITMAP_ADDR32(dest_bmp, y, 0);
903		UINT16 *pri = BITMAP_ADDR16(z_bitmap, y, 0);
	921	UINT16 *pri = BITMAP_ADDR16(state->z_bitmap, y, 0);
904	922
905	923	int x, x_index = x_index_base;
906		for( x=sx; x<ex; x++ )
	924	for (x = sx; x < ex; x++)
907	925	{
908		if(z >= pri[x])
	926	if (z >= pri[x])
909	927	{
910		int c = source[x_index>>10];
911		if( c != 0 )
	928	int c = source[x_index >> 10];
	929	if (c != 0)
912	930	{
913		if( alphatable[c] == 0xff )
	931	if (alphatable[c] == 0xff)
914	932	dest[x] = pal[c];
915	933	else
916	934	dest[x] = alpha_blend_r32(dest[x], pal[c], alphatable[c]);
r6740	r6741
926	944	}
927	945	else
928	946	{
929		for( y=sy; y<ey; y++ )
	947	for (y = sy; y < ey; y++)
930	948	{
931		UINT8 *source = BITMAP_ADDR8(zoom_bitmap, y_index>>10, 0);
	949	UINT8 *source = BITMAP_ADDR8(state->zoom_bitmap, y_index >> 10, 0);
932	950	UINT32 *dest = BITMAP_ADDR32(dest_bmp, y, 0);
933	951
934	952	int x, x_index = x_index_base;
935		for( x=sx; x<ex; x++ )
	953	for (x = sx; x < ex; x++)
936	954	{
937		int c = source[x_index>>10];
938		if( c != 0 )
	955	int c = source[x_index >> 10];
	956	if (c != 0)
939	957	{
940		if( alphatable[c] == 0xff )
	958	if (alphatable[c] == 0xff)
941	959	dest[x] = pal[c];
942	960	else
943	961	dest[x] = alpha_blend_r32(dest[x], pal[c], alphatable[c]);
r6740	r6741
956	974	profiler_mark_end();
957	975	}
958	976
959		#define SPRITE_PRI(n) (((psikyosh_vidregs[2] << (4*n)) & 0xf0000000 ) >> 28)
	977	#define SPRITE_PRI(n) (((state->vidregs[2] << (4*n)) & 0xf0000000 ) >> 28)
960	978
961	979	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT8 req_pri )
962	980	{
r6740	r6741
990	1008
991	1009	**- End Sprite Format -*/
992	1010
	1011	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
993	1012	const gfx_element *gfx;
994	1013	UINT32 *src = machine->generic.buffered_spriteram.u32; /* Use buffered spriteram */
995		UINT16 *list = (UINT16 *)src + 0x3800/2;
996		UINT16 listlen=0x800/2, listcntr=0;
997		UINT16 *zoom_table = (UINT16 *)psikyosh_zoomram;
998		UINT8  *alpha_table = (UINT8 *)psikyosh_vidregs;
	1014	UINT16 *list = (UINT16 *)src + 0x3800 / 2;
	1015	UINT16 listlen = 0x800/2, listcntr = 0;
	1016	UINT16 *zoom_table = (UINT16 *)state->zoomram;
	1017	UINT8  *alpha_table = (UINT8 *)state->vidregs;
999	1018
1000		while( listcntr < listlen )
	1019	while (listcntr < listlen)
1001	1020	{
1002	1021	UINT32 listdat, sprnum, xpos, ypos, high, wide, flpx, flpy, zoomx, zoomy, tnum, colr, dpth;
1003	1022	UINT32 pri, alphamap;
r6740	r6741
1006	1025	listdat = list[BYTE_XOR_BE(listcntr)];
1007	1026	sprnum = (listdat & 0x03ff) * 4;
1008	1027
1009		pri  = (src[sprnum+1] & 0x00003000) >> 12; // & 0x00007000/0x00003000 ?
	1028	pri  = (src[sprnum + 1] & 0x00003000) >> 12; // & 0x00007000/0x00003000 ?
1010	1029	pri = SPRITE_PRI(pri);
1011	1030
1012		if(pri == req_pri)
	1031	if (pri == req_pri)
1013	1032	{
1014		ypos = (src[sprnum+0] & 0x03ff0000) >> 16;
1015		xpos = (src[sprnum+0] & 0x000003ff) >> 00;
	1033	ypos = (src[sprnum + 0] & 0x03ff0000) >> 16;
	1034	xpos = (src[sprnum + 0] & 0x000003ff) >> 00;
1016	1035
1017		if(ypos & 0x200) ypos -= 0x400;
1018		if(xpos & 0x200) xpos -= 0x400;
	1036	if (ypos & 0x200) ypos -= 0x400;
	1037	if (xpos & 0x200) xpos -= 0x400;
1019	1038
1020		high  = ((src[sprnum+1] & 0x0f000000) >> 24) + 1;
1021		wide  = ((src[sprnum+1] & 0x00000f00) >> 8) + 1;
	1039	high  = ((src[sprnum + 1] & 0x0f000000) >> 24) + 1;
	1040	wide  = ((src[sprnum + 1] & 0x00000f00) >> 8) + 1;
1022	1041
1023		flpy  = (src[sprnum+1] & 0x80000000) >> 31;
1024		flpx  = (src[sprnum+1] & 0x00008000) >> 15;
	1042	flpy  = (src[sprnum + 1] & 0x80000000) >> 31;
	1043	flpx  = (src[sprnum + 1] & 0x00008000) >> 15;
1025	1044
1026		zoomy = (src[sprnum+1] & 0x00ff0000) >> 16;
1027		zoomx = (src[sprnum+1] & 0x000000ff) >> 00;
	1045	zoomy = (src[sprnum + 1] & 0x00ff0000) >> 16;
	1046	zoomx = (src[sprnum + 1] & 0x000000ff) >> 00;
1028	1047
1029		tnum  = (src[sprnum+2] & 0x0007ffff) >> 00;
1030		dpth  = (src[sprnum+2] & 0x00800000) >> 23;
1031		colr  = (src[sprnum+2] & 0xff000000) >> 24;
	1048	tnum  = (src[sprnum + 2] & 0x0007ffff) >> 00;
	1049	dpth  = (src[sprnum + 2] & 0x00800000) >> 23;
	1050	colr  = (src[sprnum + 2] & 0xff000000) >> 24;
1032	1051
1033		alpha = (src[sprnum+2] & 0x00700000) >> 20;
	1052	alpha = (src[sprnum + 2] & 0x00700000) >> 20;
1034	1053
1035	1054	alphamap = (alpha_table[BYTE4_XOR_BE(alpha)] & 0x80)? 1:0;
1036	1055	alpha = alpha_table[BYTE4_XOR_BE(alpha)] & 0x3f;
1037	1056
1038	1057	gfx = dpth ? machine->gfx[1] : machine->gfx[0];
1039	1058
1040		if(alphamap) { /* alpha values are per-pen */
	1059	if (alphamap) /* alpha values are per-pen */
1041	1060	alpha = -1;
1042		} else {
1043		alpha = ((0x3f-alpha)*0xff)/0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
1044		}
	1061	else
	1062	alpha = ((0x3f - alpha) * 0xff) / 0x3f; /* 0x3f-0x00 maps to 0x00-0xff */
1045	1063
1046	1064	/* start drawing */
1047		if( zoom_table[BYTE_XOR_BE(zoomy)] && zoom_table[BYTE_XOR_BE(zoomx)] ) /* Avoid division-by-zero when table contains 0 (Uninitialised/Bug) */
	1065	if (zoom_table[BYTE_XOR_BE(zoomy)] && zoom_table[BYTE_XOR_BE(zoomx)]) /* Avoid division-by-zero when table contains 0 (Uninitialised/Bug) */
1048	1066	{
1049		psikyosh_drawgfxzoom(bitmap,cliprect,gfx,tnum,colr,flpx,flpy,xpos,ypos,alpha,
	1067	psikyosh_drawgfxzoom(machine, bitmap, cliprect, gfx, tnum, colr, flpx, flpy, xpos, ypos, alpha,
1050	1068	(UINT32)zoom_table[BYTE_XOR_BE(zoomx)], (UINT32)zoom_table[BYTE_XOR_BE(zoomy)], wide, high, listcntr);
1051	1069
1052	1070	#if 0
r6740	r6741
1057	1075	int x, y;
1058	1076
1059	1077	sprintf(buf, "%X",xdim/16); /* Display Zoom in 16.16 */
1060		if (machine->gamedrv->flags & ORIENTATION_SWAP_XY) {
	1078	if (machine->gamedrv->flags & ORIENTATION_SWAP_XY)
	1079	{
1061	1080	x = ypos;
1062	1081	y = video_screen_get_visible_area(machine->primary_screen)->max_x - xpos; /* ORIENTATION_FLIP_Y */
1063	1082	}
1064		else {
	1083	else
	1084	{
1065	1085	x = xpos;
1066	1086	y = ypos;
1067	1087	}
r6740	r6741
1079	1099
1080	1100	VIDEO_START( psikyosh )
1081	1101	{
	1102	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
1082	1103	int width = video_screen_get_width(machine->primary_screen);
1083	1104	int height = video_screen_get_height(machine->primary_screen);
1084		z_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	1105	state->z_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
1085	1106
1086	1107	/* Need 16-bit z-buffer */
1087		zoom_bitmap = auto_bitmap_alloc(machine, 16*16, 16*16, BITMAP_FORMAT_INDEXED8);
	1108	state->zoom_bitmap = auto_bitmap_alloc(machine, 16*16, 16*16, BITMAP_FORMAT_INDEXED8);
1088	1109
1089		machine->gfx[1]->color_granularity=16; /* 256 colour sprites with palette selectable on 16 colour boundaries */
	1110	machine->gfx[1]->color_granularity = 16; /* 256 colour sprites with palette selectable on 16 colour boundaries */
1090	1111
1091	1112	{ /* Pens 0xc0-0xff have a gradient of alpha values associated with them */
1092	1113	int i;
1093		for (i=0; i<0xc0; i++)
	1114	for (i = 0; i < 0xc0; i++)
1094	1115	alphatable[i] = 0xff;
1095		for (i=0; i<0x40; i++) {
1096		int alpha = ((0x3f-i)*0xff)/0x3f;
1097		alphatable[i+0xc0] = alpha;
	1116	for (i = 0; i < 0x40; i++)
	1117	{
	1118	int alpha = ((0x3f - i) * 0xff) / 0x3f;
	1119	alphatable[i + 0xc0] = alpha;
1098	1120	}
1099	1121	}
1100	1122
	1123	state_save_register_global_bitmap(machine, state->z_bitmap);
	1124	state_save_register_global_bitmap(machine, state->zoom_bitmap);
1101	1125	}
1102	1126
1103		static void psikyosh_prelineblend( bitmap_t *bitmap, const rectangle *cliprect )
	1127	static void psikyosh_prelineblend( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
1104	1128	{
1105	1129	/* There are 224 values for pre-lineblending. Using one for every row currently */
1106	1130	/* I suspect that it should be blended against black by the amount specified as
1107	1131	gnbarich sets the 0x000000ff to 0x7f in test mode whilst the others use 0x80.
1108	1132	As it's only used in testmode I'll just leave it as a toggle for now */
	1133	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
1109	1134	UINT32 *dstline;
1110		UINT32 *linefill = psikyosh_bgram; /* Per row */
1111		int x,y;
	1135	UINT32 *linefill = state->bgram; /* Per row */
	1136	int x, y;
1112	1137
1113	1138	assert(bitmap->bpp == 32);
1114	1139
r6740	r6741
1117	1142
1118	1143	dstline = BITMAP_ADDR32(bitmap, y, 0);
1119	1144
1120		if(linefill[y]&0xff) /* Row */
	1145	if (linefill[y] & 0xff) /* Row */
1121	1146	for (x = cliprect->min_x; x <= cliprect->max_x; x += 1)
1122		dstline[x] = linefill[y]>>8;
	1147	dstline[x] = linefill[y] >> 8;
1123	1148	}
1124	1149	profiler_mark_end();
1125	1150	}
1126	1151
1127		static void psikyosh_postlineblend( bitmap_t *bitmap, const rectangle *cliprect )
	1152	static void psikyosh_postlineblend( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
1128	1153	{
1129	1154	/* There are 224 values for post-lineblending. Using one for every row currently */
	1155	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
1130	1156	UINT32 *dstline;
1131		UINT32 *lineblend = psikyosh_bgram+0x400/4; /* Per row */
1132		int x,y;
	1157	UINT32 *lineblend = state->bgram + 0x400 / 4; /* Per row */
	1158	int x, y;
1133	1159
1134	1160	assert(bitmap->bpp == 32);
1135	1161
r6740	r6741
1138	1164
1139	1165	dstline = BITMAP_ADDR32(bitmap, y, 0);
1140	1166
1141		if(lineblend[y]&0x80) /* Row */
	1167	if (lineblend[y] & 0x80) /* Row */
1142	1168	{
1143	1169	for (x = cliprect->min_x; x <= cliprect->max_x; x += 1)
1144		dstline[x] = lineblend[y]>>8;
	1170	dstline[x] = lineblend[y] >> 8;
1145	1171	}
1146		else if(lineblend[y]&0x7f) /* Row */
	1172	else if (lineblend[y] & 0x7f) /* Row */
1147	1173	{
1148	1174	for (x = cliprect->min_x; x <= cliprect->max_x; x += 1)
1149		dstline[x] = alpha_blend_r32(dstline[x], lineblend[y]>>8, 2*(lineblend[y]&0x7f));
	1175	dstline[x] = alpha_blend_r32(dstline[x], lineblend[y] >> 8, 2 * (lineblend[y] & 0x7f));
1150	1176	}
1151	1177	}
1152	1178	profiler_mark_end();
r6740	r6741
1154	1180
1155	1181	VIDEO_UPDATE( psikyosh ) /* Note the z-buffer on each sprite to get correct priority */
1156	1182	{
1157		int i;
1158		bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
1159		bitmap_fill(z_bitmap,cliprect,0); /* z-buffer */
	1183	psikyosh_state *state = (psikyosh_state *)screen->machine->driver_data;
	1184	int i;
1160	1185
1161		psikyosh_prelineblend(bitmap, cliprect);
	1186	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
	1187	bitmap_fill(state->z_bitmap, cliprect, 0); /* z-buffer */
1162	1188
1163		for (i=0; i<=7; i++) {
	1189	psikyosh_prelineblend(screen->machine, bitmap, cliprect);
	1190
	1191	for (i = 0; i <= 7; i++)
	1192	{
1164	1193	draw_sprites(screen->machine, bitmap, cliprect, i); // When same priority bg's have higher pri
1165	1194	draw_background(screen->machine, bitmap, cliprect, i);
1166		if((psikyosh_vidregs[2]&0xf) == i) psikyosh_postlineblend(bitmap, cliprect);
1167		}
	1195	if ((state->vidregs[2] & 0xf) == i)
	1196	psikyosh_postlineblend(screen->machine, bitmap, cliprect);
	1197	}
1168	1198	return 0;
1169	1199	}
1170	1200
r6740	r6741
1172	1202	{
1173	1203	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1174	1204
1175		buffer_spriteram32_w(space,0,0,0xffffffff);
	1205	buffer_spriteram32_w(space, 0, 0, 0xffffffff);
1176	1206	}
1177	1207
1178	1208	/*popmessage   ("Regs %08x %08x %08x\n     %08x %08x %08x",
1179		psikyosh_bgram[0x17f0/4], psikyosh_bgram[0x17f4/4], psikyosh_bgram[0x17f8/4],
1180		psikyosh_bgram[0x1ff0/4], psikyosh_bgram[0x1ff4/4], psikyosh_bgram[0x1ff8/4]);*/
	1209	state->bgram[0x17f0 / 4], state->bgram[0x17f4 / 4], state->bgram[0x17f8 / 4],
	1210	state->bgram[0x1ff0 / 4], state->bgram[0x1ff4 / 4], state->bgram[0x1ff8 / 4]);*/
1181	1211	/*popmessage   ("Regs %08x %08x %08x\n     %08x %08x %08x",
1182		psikyosh_bgram[0x13f0/4], psikyosh_bgram[0x13f4/4], psikyosh_bgram[0x13f8/4],
1183		psikyosh_bgram[0x1bf0/4], psikyosh_bgram[0x1bf4/4], psikyosh_bgram[0x1bf8/4]);*/
	1212	state->bgram[0x13f0 / 4], state->bgram[0x13f4 / 4], state->bgram[0x13f8 / 4],
	1213	state->bgram[0x1bf0 / 4], state->bgram[0x1bf4 / 4], state->bgram[0x1bf8 / 4]);*/
1184	1214	/*popmessage   ("Regs %08x %08x %08x %08x %08x %08x %08x %08x",
1185		psikyosh_vidregs[0], psikyosh_vidregs[1],
1186		psikyosh_vidregs[2], psikyosh_vidregs[3],
1187		psikyosh_vidregs[4], psikyosh_vidregs[5],
1188		psikyosh_vidregs[6], psikyosh_vidregs[7]);*/
	1215	state->vidregs[0], state->vidregs[1],
	1216	state->vidregs[2], state->vidregs[3],
	1217	state->vidregs[4], state->vidregs[5],
	1218	state->vidregs[6], state->vidregs[7]);*/

src/mame/video/boogwing.c

r6740	r6741
1	1	#include "driver.h"
2		#include "deco16ic.h"
	2	#include "includes/deco16ic.h"
3	3
4	4	static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect, UINT16* spriteram_base, int gfx_region)
5	5	{

src/mame/video/offtwall.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "offtwall.h"
	8	#include "includes/offtwall.h"
9	9
10	10
11	11

src/mame/video/equites.c

r6740	r6741
1	1	#include "driver.h"
2		#include "equites.h"
	2	#include "includes/equites.h"
3	3
4	4
5	5	/*************************************

src/mame/video/gradius3.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	#define TOTAL_CHARS 0x1000
r6740	r6741
17	17
18	18	***************************************************************************/
19	19
20		static void gradius3_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	20	void gradius3_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
21	21	{
22	22	/* (color & 0x02) is flip y handled internally by the 052109 */
23	23	*code |= ((*color & 0x01) << 8) | ((*color & 0x1c) << 7);
r6740	r6741
32	32
33	33	***************************************************************************/
34	34
35		static void gradius3_sprite_callback(int *code,int *color,int *priority_mask,int *shadow)
	35	void gradius3_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow)
36	36	{
37	37	#define L0 0xaa
38	38	#define L1 0xcc
r6740	r6741
60	60
61	61	VIDEO_START( gradius3 )
62	62	{
	63	const device_config *k052109 = devtag_get_device(machine, "k052109");
	64	const device_config *k051960 = devtag_get_device(machine, "k051960");
63	65	int i;
64	66
65	67	layer_colorbase[0] = 0;
66	68	layer_colorbase[1] = 32;
67	69	layer_colorbase[2] = 48;
68	70	sprite_colorbase = 16;
69		K052109_vh_start(machine,"gfx1",GRADIUS3_PLANE_ORDER,gradius3_tile_callback);
70		K051960_vh_start(machine,"gfx2",GRADIUS3_PLANE_ORDER,gradius3_sprite_callback);
71	71
72		K052109_set_layer_offsets(2, -2, 0);
73		K051960_set_sprite_offsets(2, 0);
	72	k052109_set_layer_offsets(k052109, 2, -2, 0);
	73	k051960_set_sprite_offsets(k051960, 2, 0);
74	74
75	75	/* re-decode the sprites because the ROMs are connected to the custom IC differently
76	76	from how they are connected to the CPU. */
77		for (i = 0;i < TOTAL_SPRITES;i++)
	77	for (i = 0; i < TOTAL_SPRITES; i++)
78	78	gfx_element_mark_dirty(machine->gfx[1],i);
79	79
80	80	gfx_element_set_source(machine->gfx[0], (UINT8 *)gradius3_gfxram);
r6740	r6741
113	113
114	114	VIDEO_UPDATE( gradius3 )
115	115	{
116		const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	116	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	117	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
117	118
118	119	/* TODO: this kludge enforces the char banks. For some reason, they don't work otherwise. */
119		K052109_w(space,0x1d80,0x10);
120		K052109_w(space,0x1f00,0x32);
	120	k052109_w(k052109, 0x1d80, 0x10);
	121	k052109_w(k052109, 0x1f00, 0x32);
121	122
122		K052109_tilemap_update();
	123	k052109_tilemap_update(k052109);
123	124
124	125	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
125	126	if (gradius3_priority == 0)
126	127	{
127		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],TILEMAP_DRAW_OPAQUE,2);
128		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,4);
129		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,1);
	128	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE, 2);
	129	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 4);
	130	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 1);
130	131	}
131	132	else
132	133	{
133		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],TILEMAP_DRAW_OPAQUE,1);
134		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,2);
135		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,4);
	134	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, TILEMAP_DRAW_OPAQUE, 1);
	135	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 2);
	136	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 4);
136	137	}
137	138
138		K051960_sprites_draw(screen->machine,bitmap,cliprect,-1,-1);
	139	k051960_sprites_draw(k051960, bitmap, cliprect, -1, -1);
139	140	return 0;
140	141	}

src/mame/video/mystwarr.c

r6740	r6741
7	7
8	8	#include "driver.h"
9	9	#include "video/konamiic.h"
10		#include "konamigx.h"
	10	#include "includes/konamigx.h"
11	11
12	12	static int layer_colorbase[6];
13	13	static int oinprion, cbparam;

src/mame/video/irobot.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "irobot.h"
	8	#include "includes/irobot.h"
9	9
10	10	#define BITMAP_WIDTH   256
11	11	static UINT8 *polybitmap1,*polybitmap2;

src/mame/video/klax.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "klax.h"
	8	#include "includes/klax.h"
9	9
10	10
11	11

src/mame/video/konicdev.c

r0	r6741
	1	/***************************************************************************
	2
	3	TODO:
	4	- It seems shadows can both affect underlying sprites and not. This is currently
	5	hardcoded in the drivers; there might be a control bit somewhere.
	6	Games requiring shadows to affect sprites behind them:
	7	- Surprise Attack (dark glass walls in level 3)
	8	- 88 Games (angle indicator in the long jump event).
	9	- Sunset Riders (bull's eye in the saloon cutscene)
	10	Games requiring shadows to NOT affect sprites behind them:
	11	- Asterix (Asterix's shadow would be over his feet otherwise)
	12	- X-Men is dubious, see enemies halfway through level 1 coming from above with
	13	boulders over their heads.
	14
	15	- scrollcontrol = 30 in Golfing Greats (leader board)
	16
	17	- detatwin: sprites are left on screen during attract mode
	18
	19
	20	Emulated
	21	|
	22	board #|year    CPU      tiles        sprites  priority palette    other
	23	-----|---- ------- ------------- ------------- ------ ------ ----------------
	24	Hyper Crash         GX401 1985                   GX400
	25	Twinbee             GX412*1985   68000           GX400
	26	Yie Ar Kung Fu      GX407*1985    6809
	27	Gradius / Nemesis   GX456*1985   68000           GX400
	28	Shao-lins Road      GX477*1985    6809
	29	Jail Break          GX507*1986 KONAMI-1          005849                   PROMs
	30	Finalizer           GX523*1985 KONAMI-1          005885                   PROMs
	31	Konami's Ping Pong  GX555*1985     Z80
	32	Iron Horse          GX560*1986    6809           005885                   PROMs
	33	Konami GT           GX561*1985   68000           GX400
	34	Green Beret         GX577*1985     Z80           005849                   PROMs
	35	Galactic Warriors   GX578*1985   68000           GX400
	36	Salamander          GX587*1986   68000           GX400
	37	WEC Le Mans 24      GX602*1986 2x68000
	38	BAW / Black Panther GX604*1987   68000           GX400                    007593
	39	Combat School /     GX611*1987    6309           007121(x2)               007327
	40	Boot Camp
	41	Rock 'n Rage /      GX620*1986    6309 007342        007420               007327
	42	Koi no Hotrock
	43	Mr Kabuki/Mr Goemon GX621*1986     Z80           005849
	44	Jackal              GX631*1986    6809           005885(x2)               007327 007343 (address decoder)
	45	Contra / Gryzor     GX633*1987    6809?          007121(x2)               007593
	46	Flak Attack         GX669*1987    6309           007121                   007327 007452
	47	Devil World / Dark  GX687*1987 2x68000           TWIN16
	48	Adventure / Majuu no Oukoku
	49	Double Dribble      GX690*1986  3x6809           005885(x2)               007327 007452
	50	Kitten Kaboodle /   GX712*1988                   GX400                    007593 051550
	51	Nyan Nyan Panic
	52	Chequered Flag      GX717*1988  052001               051960 051937(x2)           051316(x2) (roz) 051733 (protection)
	53	Fast Lane           GX752*1987    6309           007121                          051733 (protection) 007801
	54	Hot Chase           GX763*1988 2x68000                                           051316(x3) (roz) 007634 007635 007558 007557
	55	Rack 'Em Up /       GX765*1987    6309 007342        007420               007327 007324
	56	The Hustler
	57	Haunted Castle      GX768*1988  052001           007121(x2)               007327
	58	Ajax / Typhoon      GX770*1987   6309+ 052109 051962 051960 051937  PROM  007327 051316 (roz)
	59	052001
	60	Labyrinth Runner /  GX771*1987    6309           007121                   007593 051733 (protection) 051550
	61	Trick Trap
	62	Super Contra        GX775*1988  052001 052109 051962 051960 051937  PROM  007327
	63	Battlantis          GX777*1987    6309 007342        007420               007327 007324
	64	Vulcan Venture /    GX785*1988 2x68000           TWIN16
	65	Gradius 2
	66	City Bomber         GX787*1987   68000           GX400                    007593 051550
	67	Over Drive          GX789*1990 2x68000               053247 053246 053251 051316(x2) (roz) 053249 053250(x2) (road) 053252(*)
	68	Hyper Crash         GX790 1987
	69	Blades of Steel     GX797*1987    6309 007342        007420               007327 051733 (protection)
	70	The Main Event      GX799*1988    6309 052109 051962 051960 051937  PROM
	71	Missing in Action   GX808*1989   68000 052109 051962 051960 051937  PROM
	72	Missing in Action J GX808*1989 2x68000           TWIN16
	73	Crime Fighters      GX821*1989  052526 052109 051962 051960 051937  PROM
	74	Special Project Y   GX857*1989    6309 052109 051962 051960 051937  PROM         052591 (protection)
	75	'88 Games           GX861*1988  052001 052109 051962 051960 051937  PROM         051316 (roz)
	76	Final Round /       GX870*1988 1x68000           TWIN16?
	77	Hard Puncher
	78	Thunder Cross       GX873*1988  052001 052109 051962 051960 051937  PROM  007327 052591 (protection)
	79	Aliens              GX875*1990  052526 052109 051962 051960 051937  PROM
	80	Gang Busters        GX878*1988  052526 052109 051962 051960 051937  PROM
	81	Devastators         GX890*1988    6309 052109 051962 051960 051937  PROM         007324 051733 (protection)
	82	Bottom of the Ninth GX891*1989    6809 052109 051962 051960 051937  PROM         051316 (roz)
	83	Cue Brick           GX903*1989   68000 052109 051962 051960 051937  PROM
	84	Cue Brick           GX903*1989 2x68000           TWIN16
	85	Punk Shot           GX907*1990   68000 052109 051962 051960 051937 053251
	86	Ultraman            GX910*1991   68000 ------ ------ 051960 051937  PROM         051316(x3) (roz) 051550
	87	Surprise Attack     GX911*1990  053248 052109 051962 053245 053244 053251
	88	Lightning Fighters /GX939*1990   68000 052109 051962 053245 053244 053251
	89	Trigon
	90	Gradius 3           GX945*1989 2x68000 052109 051962 051960 051937  PROM
	91	Parodius            GX955*1990  053248 052109 051962 053245 053244 053251
	92	TMNT                GX963*1989   68000 052109 051962 051960 051937  PROM
	93	Block Hole          GX973*1989  052526 052109 051962 051960 051937  PROM
	94	Escape Kids         GX975*1991  053248 052109 051962 053247 053246 053251        053252(*)
	95	Rollergames         GX999*1991  053248 ------ ------ 053245 053244               051316 (roz) 053252(*)
	96	Bells & Whistles /  GX060*1991   68000 052109 051962 053245 053244 053251        054000 (collision)
	97	Detana!! Twin Bee
	98	Golfing Greats      GX061*1991   68000 052109 051962 053245 053244 053251        053936 (roz+)
	99	TMNT 2              GX063*1991   68000 052109 051962 053245 053244 053251        053990 (protection) 051550
	100	Sunset Riders       GX064*1991   68000 052109 051962 053245 053244 053251        054358
	101	X-Men               GX065*1992   68000 052109 051962 053247 053246 053251        054539 (sound)
	102	XEXEX               GX067*1991   68000 054157 054156 053247 053246 053251        053250?("road") 054338 (alpha blending) 054539 (sound)
	103	Asterix             GX068*1992   68000 054157 054156 053245 053244 053251        054358
	104	G.I. Joe            GX069*1992   68000 054157 054156 053247 053246 053251        054539 (sound)
	105	The Simpsons        GX072*1991  053248 052109 051962 053247 053246 053251
	106	Thunder Cross 2     GX073*1991   68000 052109 051962 051960 051937 053251        054000 (collision)
	107	Vendetta /          GX081*1991  053248 052109 051962 053247 053246 053251        054000 (collision)
	108	Crime Fighters 2
	109	Premier Soccer      GX101*1993   68000 052109 051962 053245 053244 053251        053936 (roz+) 054986
	110	Hexion              GX122*1992     Z80                                           052591 (protection) 053252(*)
	111	Entapous /          GX123*1993   68000 054157 054156 055673 053246 055555        053252(*) 054000 053936 (roz+)
	112	Gaiapolis
	113	Mystic Warrior      GX128*1993   68000 054157 054156 055673 053246 055555        054338 (alpha blending) 053252(*) 054539(x2) (sound)
	114	Cowboys of Moo Mesa GX151*1992   68000 054157 054156 053247 053246 053251        053252(*) 054338 (alpha blending) 053990 (protection)
	115	Violent Storm       GX168*1993   68000 054157 054156 055673 053246 055555        054338 (alpha blending) 055550 054539(x2) (sound)
	116	Monster Maulers /   GX170*1993   68000 054157 054156 055673 053246 055555        053252(*) 055550 054338 (alpha blending) 054539 (sound) 053936 (roz+)
	117	Ultimate Battler Dadandarn
	118	Bucky 'O Hare       GX173*1992   68000 054157 054156 053247 053246 053251        054338 (alpha blending) 054539 (sound)
	119	Potrio              GX174 1992
	120	Lethal Enforcers    GX191*1992    6309 054157(x2) 054156 053245 053244(x2)       054000 054539 (sound)
	121	Metamorphic Force   GX224*1993   68000 054157 054157 055673 053246 055555
	122	Martial Champion    GX234*1993   68000 054157 054156 055673 053246 055555        053252(*) 054338 (alpha blending) 053990 054539 (sound)
	123	Run and Gun         GX247*1993   68000 (TTL tilemap) 055673 053246               053253(x2) 053252(*) 053936 (roz+) 054539(x2) (sound)
	124	Quiz Gakumon no     GX248*1993   68000 052109 051962 053245 053244 053251        053990 (protection) 051550 - same board as TMNT2
	125	Susume
	126	Polygonet Commander GX305+1993   68020 (TTL tilemap)                             XC56156-40(3D DSP) 054009(x2) 054010(x2) 054539 (sound)
	127	System GX (ver 1)   GX300*1993   68020 056832 054156 055673 053246 055555        054338 (alpha blending) 054539(x2) (sound) 053252(*) 053936 (optional on ROM board, roz+)
	128	System GX (ver 2)   GX300*1995   68020 056832 058143 055673 058142 055555        058144 (alpha blending) 058141 (sound) 053252(*) 053936 (optional on ROM board, roz+)
	129	Beatmania DJ Main   GX858+1996   68020 056832 058143 056766        055555        058144 (alpha blending) 058141 (sound) 053252(*)
	130	Tail to Nose             *1989   68000          V-System                         051316 (roz)
	131	F-1 Grand Prix           *1991 2x68000          V-System                         053936 (roz+)
	132	F-1 Grand Prix Part II   *1992 2x68000          V-System                         053936 (roz+)
	133	Lethal Crash Race        *1993   68000          V-System                         053936 (roz+)
	134	Super Slams              *1995   68000          V-System                         053936 (roz+)
	135	Blazing Tornado          *1991   68000            Metro                          053936 (roz+)
	136	Dragonball Z 2           *1994   68000 054157 054156 053247 053246 053251(x2)    053936(x2) (roz+) 053252(*)
	137
	138
	139	Notes:
	140	* 053252 seems to be just a timing/interrupt controller (see Vendetta schematics).
	141
	142	- Old games use 051961 instead of 052109, it is an earlier version functionally
	143	equivalent (maybe 052109 had bugs fixed). The list always shows 052109 because
	144	the two are exchangeable and 052109's are found also on original boards whose
	145	schematics show a 051961.
	146
	147	- Starting with the version 2 System GX mainboard, the following chip substitutions took place.
	148	All "new" chips are equivalent to their older counterparts, but are in a smaller package (and
	149	presumably are made on a smaller process).  The exception is the 058141, which is equivalent
	150	to 2 54539s (and yet takes less board space than even 1).
	151
	152	058141 = 054539 (x2) (2 sound chips in one)
	153	058142 = 053246 (sprites)
	154	058143 = 054156 (tiles)
	155	058144 = 054338 (alpha blending)
	156
	157
	158
	159	Status of the ROM tests in the emulated games:
	160
	161	Chequered Flag      pass
	162	Ajax / Typhoon      pass
	163	Super Contra        pass
	164	Over Drive          fails 16..20 (053250)
	165	The Main Event      pass
	166	Missing in Action   pass
	167	Crime Fighters      pass
	168	Special Project Y   pass
	169	Konami 88           pass
	170	Thunder Cross       pass
	171	Aliens              pass
	172	Gang Busters        pass
	173	Devastators         pass
	174	Bottom of the Ninth pass
	175	Punk Shot           pass
	176	Surprise Attack     fails D05-6 (052109) because it uses mirror addresses to
	177	select banks, and supporting those addresses breaks the
	178	normal game ;-(
	179	Lightning Fighters  pass
	180	Gradius 3           pass
	181	Parodius            pass
	182	TMNT                pass
	183	Block Hole          pass
	184	Escape Kids         pass
	185	Rollergames         pass
	186	Bells & Whistles    pass
	187	Golfing Greats      pass
	188	TMNT 2              pass
	189	Sunset Riders       pass
	190	X-Men               pass
	191	The Simpsons        pass
	192	Thunder Cross 2     pass
	193	Xexex               pass
	194	Asterix             pass
	195	GiJoe               pass
	196	Vendetta            pass
	197	Premier Soccer      fails 16D 18D 18F (053936)
	198	Hexion              pass
	199	Run and Gun         fails 36M (053936) 2U 2Y 5U 5Y (sprites)
	200	Quiz Gakumon no Susume  pass
	201	Dragonball Z 2      fails
	202
	203
	204	THE FOLLOWING INFORMATION IS PRELIMINARY AND INACCURATE. DON'T RELY ON IT.
	205
	206
	207	005885
	208	------
	209	Some games use two of these in pair. Jackal even puts together the two 4bpp
	210	tilemaps to form a single 8bpp one.
	211	It manages sprites and 32x32 or 64x32 tilemap (only Double Dribble uses the
	212	64x32 one).
	213	The chip also generates clock and interrupt signals suitable for a 6809.
	214	It uses 0x2000 bytes of RAM for the tilemaps and sprites, and an additional
	215	0x100 bytes, maybe for scroll RAM and line buffers. The maximum addressable
	216	ROM is 0x20000 bytes (addressed 16 bits at a time). Tile and sprite data both
	217	come from the same ROM space. Double Dribble and Jackal have external circuitry
	218	to extend the limits and use separated addressing spaces for sprites and tiles.
	219	All games use external circuitry to reuse one or both the tile flip attributes
	220	as an additional address bit.
	221	Two 256x4 lookup PROMs are also used to increase the color combinations.
	222	All tilemap / sprite priority handling is done internally and the chip exports
	223	5 bits of color code, composed of 1 bit indicating tile or sprite, and 4 bits
	224	of ROM data remapped through the PROM.
	225
	226	inputs:
	227	- address lines (A0-A13)
	228	- data lines (DB0-DB7)
	229	- misc interface stuff
	230	- data from the gfx ROMs (RDL0-RDL7, RDU0-RDU7)
	231	- data from the tile lookup PROMs (VCD0-VCD3)
	232	- data from the sprite lookup PROMs (OCD0-OCD3)
	233
	234	outputs:
	235	- address lines for tilemap RAM (AX0-AX12)
	236	- data lines for tilemap RAM (VO0-VO7)
	237	- address lines for the small RAM (FA0-FA7)
	238	- data lines for the small RAM (FD0-FD7)
	239	- address lines for the gfx ROMs (R0-R15)
	240	- address lines for the tile lookup PROMs (VCF0-VCF3, VCB0-VCB3)
	241	- address lines for the sprite lookup PROMs (OCB0-OCB3, OCF0-OCF3)
	242	- NNMI, NIRQ, NFIR, NCPE, NCPQ, NEQ for the main CPU
	243	- misc interface stuff
	244	- color code to be output on screen (COL0-COL4)
	245
	246
	247	control registers
	248	000:          scroll y
	249	001:          scroll x (low 8 bits)
	250	002: -------x scroll x (high bit)
	251	----xxx- row/colscroll control
	252	000 = solid scroll (finalizr, ddribble bg)
	253	100 = solid scroll (jackal)
	254	001 = ? (ddribble fg)
	255	011 = colscroll (jackal high scores)
	256	101 = rowscroll (ironhors, jackal map)
	257	003: ------xx high bits of the tile code
	258	-----x-- unknown (finalizr)
	259	----x--- selects sprite buffer (and makes a copy to a private buffer?)
	260	--x----- unknown (ironhors)
	261	-x------ unknown (ironhors)
	262	x------- unknown (ironhors, jackal)
	263	004: -------x nmi enable
	264	------x- irq enable
	265	-----x-- firq enable
	266	----x--- flip screen
	267
	268
	269
	270	007121
	271	------
	272	This is an interesting beast. It is an evolution of the 005885, with more
	273	features. Many games use two of these in pair.
	274	It manages sprites and two 32x32 tilemaps. The tilemaps can be joined to form
	275	a single 64x32 one, or one of them can be moved to the side of screen, giving
	276	a high score display suitable for vertical games.
	277	The chip also generates clock and interrupt signals suitable for a 6809.
	278	It uses 0x2000 bytes of RAM for the tilemaps and sprites, and an additional
	279	0x100 bytes, maybe for scroll RAM and line buffers. The maximum addressable
	280	ROM is 0x80000 bytes (addressed 16 bits at a time). Tile and sprite data both
	281	come from the same ROM space.
	282	Two 256x4 lookup PROMs are also used to increase the color combinations.
	283	All tilemap / sprite priority handling is done internally and the chip exports
	284	7 bits of color code, composed of 2 bits of palette bank, 1 bit indicating tile
	285	or sprite, and 4 bits of ROM data remapped through the PROM.
	286
	287	inputs:
	288	- address lines (A0-A13)
	289	- data lines (DB0-DB7)
	290	- misc interface stuff
	291	- data from the gfx ROMs (RDL0-RDL7, RDU0-RDU7)
	292	- data from the tile lookup PROMs (VCD0-VCD3)
	293	- data from the sprite lookup PROMs (OCD0-OCD3)
	294
	295	outputs:
	296	- address lines for tilemap RAM (AX0-AX12)
	297	- data lines for tilemap RAM (VO0-VO7)
	298	- address lines for the small RAM (FA0-FA7)
	299	- data lines for the small RAM (FD0-FD7)
	300	- address lines for the gfx ROMs (R0-R17)
	301	- address lines for the tile lookup PROMs (VCF0-VCF3, VCB0-VCB3)
	302	- address lines for the sprite lookup PROMs (OCB0-OCB3, OCF0-OCF3)
	303	- NNMI, NIRQ, NFIR, NE, NQ for the main CPU
	304	- misc interface stuff
	305	- color code to be output on screen (COA0-COA6)
	306
	307
	308	control registers
	309	000:          scroll x (low 8 bits)
	310	001: -------x scroll x (high bit)
	311	------x- enable rowscroll? (combasc)
	312	----x--- this probably selects an alternate screen layout used in combat
	313	school where tilemap #2 is overlayed on front and doesn't scroll.
	314	The 32 lines of the front layer can be individually turned on or
	315	off using the second 32 bytes of scroll RAM.
	316	002:          scroll y
	317	003: -------x bit 13 of the tile code
	318	------x- unknown (contra)
	319	-----x-- might be sprite / tilemap priority (0 = sprites have priority)
	320	(combat school, contra, haunted castle(0/1), labyrunr)
	321	----x--- selects sprite buffer (and makes a copy to a private buffer?)
	322	---x---- screen layout selector:
	323	when this is set, 5 columns are added on the left of the screen
	324	(that means 5 rows at the top for vertical games), and the
	325	rightmost 2 columns are chopped away.
	326	Tilemap #2 is used to display the 5 additional columns on the
	327	left. The rest of tilemap #2 is not used and can be used as work
	328	RAM by the program.
	329	The visible area becomes 280x224.
	330	Note that labyrunr changes this at runtime, setting it during
	331	gameplay and resetting it on the title screen and crosshatch.
	332	--x----- might be sprite / tilemap priority (0 = sprites have priority)
	333	(combat school, contra, haunted castle(0/1), labyrunr)
	334	-x------ Chops away the leftmost and rightmost columns, switching the
	335	visible area from 256 to 240 pixels. This is used by combasc on
	336	the scrolling stages, and by labyrunr on the title screen.
	337	At first I thought that this enabled an extra bank of 0x40
	338	sprites, needed by combasc, but labyrunr proves that this is not
	339	the case
	340	x------- unknown (contra)
	341	004: ----xxxx bits 9-12 of the tile code. Only the bits enabled by the following
	342	mask are actually used, and replace the ones selected by register
	343	005.
	344	xxxx---- mask enabling the above bits
	345	005: selects where in the attribute byte to pick bits 9-12 of the tile code,
	346	output to pins R12-R15. The bit of the attribute byte to use is the
	347	specified bit (0-3) + 3, that is one of bits 3-6. Bit 7 is hardcoded as
	348	bit 8 of the code. Bits 0-2 are used for the color, however note that
	349	some games use bit 3 as well (see below).
	350	------xx attribute bit to use for tile code bit  9
	351	----xx-- attribute bit to use for tile code bit 10
	352	--xx---- attribute bit to use for tile code bit 11
	353	xx------ attribute bit to use for tile code bit 12
	354	006: ----xxxx select additional effect for bits 3-6 of the tile attribute (the
	355	same ones indexed by register 005). Note that an attribute bit
	356	can therefore be used at the same time to be BOTH a tile code bit
	357	and an additional effect.
	358	-------x bit 3 of attribute is bit 3 of color (combasc, fastlane, flkatck)
	359	------x- bit 4 of attribute is tile flip X (assumption - no game uses this)
	360	-----x-- bit 5 of attribute is tile flip Y (flkatck)
	361	----x--- bit 6 of attribute is tile priority over sprites (combasc, hcastle,
	362	labyrunr)
	363	Note that hcastle sets this bit for layer 0, and bit 6 of the
	364	attribute is also used as bit 12 of the tile code, however that
	365	bit is ALWAYS set throughout the game.
	366	combasc uses the bit in the "graduation" scene during attract mode,
	367	to place soldiers behind the stand.
	368	Use in labyrunr has not been investigated yet.
	369	--xx---- palette bank (both tiles and sprites, see contra)
	370	007: -------x nmi enable
	371	------x- irq enable
	372	-----x-- firq enable
	373	----x--- flip screen
	374	---x---- unknown (contra, labyrunr)
	375
	376
	377
	378	007342
	379	------
	380	The 007342 manages 2 64x32 scrolling tilemaps with 8x8 characters, and
	381	optionally generates timing clocks and interrupt signals. It uses 0x2000
	382	bytes of RAM, plus 0x0200 bytes for scrolling, and a variable amount of ROM.
	383	It cannot read the ROMs.
	384
	385	control registers
	386	000: ------x- INT control
	387	---x---- flip screen (TODO: doesn't work with thehustl)
	388	001: Used for banking in Rock'n'Rage
	389	002: -------x MSB of x scroll 1
	390	------x- MSB of x scroll 2
	391	---xxx-- layer 1 row/column scroll control
	392	000 = disabled
	393	010 = unknown (bladestl shootout between periods)
	394	011 = 32 columns (Blades of Steel)
	395	101 = 256 rows (Battlantis, Rock 'n Rage)
	396	x------- enable sprite wraparound from bottom to top (see Blades of Steel
	397	high score table)
	398	003: x scroll 1
	399	004: y scroll 1
	400	005: x scroll 2
	401	006: y scroll 2
	402	007: not used
	403
	404
	405	007420
	406	------
	407	Sprite generator. 8 bytes per sprite with zoom. It uses 0x200 bytes of RAM,
	408	and a variable amount of ROM. Nothing is known about its external interface.
	409
	410
	411
	412	052109/051962
	413	-------------
	414	These work in pair.
	415	The 052109 manages 3 64x32 scrolling tilemaps with 8x8 characters, and
	416	optionally generates timing clocks and interrupt signals. It uses 0x4000
	417	bytes of RAM, and a variable amount of ROM. It cannot read the ROMs:
	418	instead, it exports 21 bits (16 from the tilemap RAM + 3 for the character
	419	raster line + 2 additional ones for ROM banking) and these are externally
	420	used to generate the address of the required data on the ROM; the output of
	421	the ROMs is sent to the 051962, along with a color code. In theory you could
	422	have any combination of bits in the tilemap RAM, as long as they add to 16.
	423	In practice, all the games supported so far standardize on the same format
	424	which uses 3 bits for the color code and 13 bits for the character code.
	425	The 051962 multiplexes the data of the three layers and converts it into
	426	palette indexes and transparency bits which will be mixed later in the video
	427	chain.
	428	Priority is handled externally: these chips only generate the tilemaps, they
	429	don't mix them.
	430	Both chips are interfaced with the main CPU. When the RMRD pin is asserted,
	431	the CPU can read the gfx ROM data. This is done by telling the 052109 which
	432	dword to read (this is a combination of some banking registers, and the CPU
	433	address lines), and then reading it from the 051962.
	434
	435	052109 inputs:
	436	- address lines (AB0-AB15, AB13-AB15 seem to have a different function)
	437	- data lines (DB0-DB7)
	438	- misc interface stuff
	439
	440	052109 outputs:
	441	- address lines for the private RAM (RA0-RA12)
	442	- data lines for the private RAM (VD0-VD15)
	443	- NMI, IRQ, FIRQ for the main CPU
	444	- misc interface stuff
	445	- ROM bank selector (CAB1-CAB2)
	446	- character "code" (VC0-VC10)
	447	- character "color" (COL0-COL7); used foc color but also bank switching and tile
	448	flipping. Exact meaning depends on externl connections. All evidence indicates
	449	that COL2 and COL3 select the tile bank, and are replaced with the low 2 bits
	450	from the bank register. The top 2 bits of the register go to CAB1-CAB2.
	451	However, this DOES NOT WORK with Gradius III. "color" seems to pass through
	452	unaltered.
	453	- layer A horizontal scroll (ZA1H-ZA4H)
	454	- layer B horizontal scroll (ZB1H-ZB4H)
	455	- ????? (BEN)
	456
	457	051962 inputs:
	458	- gfx data from the ROMs (VC0-VC31)
	459	- color code (COL0-COL7); only COL4-COL7 seem to really be used for color; COL0
	460	is tile flip X.
	461	- layer A horizontal scroll (ZA1H-ZA4H)
	462	- layer B horizontal scroll (ZB1H-ZB4H)
	463	- let main CPU read the gfx ROMs (RMRD)
	464	- address lines to be used with RMRD (AB0-AB1)
	465	- data lines to be used with RMRD (DB0-DB7)
	466	- ????? (BEN)
	467	- misc interface stuff
	468
	469	051962 outputs:
	470	- FIX layer palette index (DFI0-DFI7)
	471	- FIX layer transparency (NFIC)
	472	- A layer palette index (DSA0-DSAD); DSAA-DSAD seem to be unused
	473	- A layer transparency (NSAC)
	474	- B layer palette index (DSB0-DSBD); DSBA-DSBD seem to be unused
	475	- B layer transparency (NSBC)
	476	- misc interface stuff
	477
	478
	479	052109 memory layout:
	480	0000-07ff: layer FIX tilemap (attributes)
	481	0800-0fff: layer A tilemap (attributes)
	482	1000-1fff: layer B tilemap (attributes)
	483	180c-1833: A y scroll
	484	1a00-1bff: A x scroll
	485	1c00     : ?
	486	1c80     : row/column scroll control
	487	------xx layer A row scroll
	488	00 = disabled
	489	01 = disabled? (gradius3, vendetta)
	490	10 = 32 lines
	491	11 = 256 lines
	492	-----x-- layer A column scroll
	493	0 = disabled
	494	1 = 64 (actually 40) columns
	495	---xx--- layer B row scroll
	496	--x----- layer B column scroll
	497	surpratk sets this register to 70 during the second boss. There is
	498	nothing obviously wrong so it's not clear what should happen.
	499	glfgreat sets it to 30 when showing the leader board
	500	1d00     : bits 0 & 1 might enable NMI and FIRQ, not sure
	501	: bit 2 = IRQ enable
	502	1d80     : ROM bank selector bits 0-3 = bank 0 bits 4-7 = bank 1
	503	1e00     : ROM subbank selector for ROM testing
	504	1e80     : bit 0 = flip screen (applies to tilemaps only, not sprites)
	505	: bit 1 = set by crimfght, mainevt, surpratk, xmen, mia, punkshot, thndrx2, spy
	506	:         it seems to enable tile flip X, however flip X is handled by the
	507	:         051962 and it is not hardwired to a specific tile attribute.
	508	:         Note that xmen, punkshot and thndrx2 set the bit but the current
	509	:         drivers don't use flip X and seem to work fine.
	510	: bit 2 = enables tile flip Y when bit 1 of the tile attribute is set
	511	1f00     : ROM bank selector bits 0-3 = bank 2 bits 4-7 = bank 3
	512	2000-27ff: layer FIX tilemap (code)
	513	2800-2fff: layer A tilemap (code)
	514	3000-37ff: layer B tilemap (code)
	515	3800-3807: nothing here, so the chip can share address space with a 051937
	516	380c-3833: B y scroll
	517	3a00-3bff: B x scroll
	518	3c00-3fff: nothing here, so the chip can share address space with a 051960
	519	3d80     : mirror of 1d80, but ONLY during ROM test (surpratk)
	520	3e00     : mirror of 1e00, but ONLY during ROM test (surpratk)
	521	3f00     : mirror of 1f00, but ONLY during ROM test (surpratk)
	522	EXTRA ADDRESSING SPACE USED BY X-MEN:
	523	4000-47ff: layer FIX tilemap (code high bits)
	524	4800-4fff: layer A tilemap (code high bits)
	525	5000-57ff: layer B tilemap (code high bits)
	526
	527	The main CPU doesn't have direct acces to the RAM used by the 052109, it has
	528	to through the chip.
	529
	530
	531
	532	054156/054157
	533	054156/056832
	534	-------------
	535
	536	[Except for tilemap sizes, all numbers are in hex]
	537
	538	These work in pairs.  Similar in principle to the 052109/051962, they
	539	manage 4 64x32 or 64x64 tilemaps.  They also handle linescroll on each
	540	layer, and optional tile banking.  They use 4000 to 10000 bytes of
	541	RAM, organized in 1000 or 2000 bytes banks.
	542
	543	The 56832 is a complete superset of the 54157 and supports higher color
	544	depths (the 156/157 combo only goes to 5 bpp, the 156/832 combo goes to 8bpp).
	545
	546	These chips work in a fairly unusual way.  There are 4, 8, or 16 pages of VRAM, arranged
	547	conceptually in a 4x4 2 dimensional grid.  Each page is a complete 64x32 tile tilemap.
	548
	549	The 4 physical tilemaps A, B, C, and, D are made up of these pages "glued together".
	550	Each physical tilemap has an X and Y position in the 4x4 page grid indicating where
	551	the page making up it's upper left corner is, as well as a width and height in pages.
	552	If two tilemaps try to use the same page, the higher-letter one wins and the lower-letter
	553	one is disabled completely.  E.g. A > B > C > D, so if A and B both try to use the
	554	same page only A will be displayed.  Some games rely on this behavior to implicitly
	555	disable tilemaps which otherwise should be displayed.
	556
	557	Tile encoding 2 bytes/tile (banks of 1000 bytes):
	558	pppx bbcc cccc cccc
	559	p = color palette
	560	x = flip x
	561	b = tile bank (0..3)
	562	c = tile code (0..3ff)
	563
	564
	565	Tile encoding 4 bytes/tile (banks of 2000 bytes):
	566	---- ---- pppp --yx  cccc cccc cccc cccc
	567	p = color palette
	568	x = flip x
	569	y = flip y
	570	b = tile bank (0..3)
	571	c = tile code (0..3ff)
	572
	573
	574	Communication with these ics go through 4 memory zones:
	575	1000/2000 bytes: access to the currently selected ram bank
	576	2000 bytes: readonly access the the currently select tile
	577	rom bank for rom checksumming
	578	40 bytes: writeonly access to the first register bank
	579	8 bytes: writeonly access to the second register bank
	580
	581	One of the register banks is probably on the 054156, and the other on
	582	the 054157.
	583
	584	First register bank map (offsets in bytes, '-' means unused):
	585	00    ---- ---- ??yx ????
	586	flip control
	587
	588	02    ---- ---- ???? ????
	589	unknown
	590
	591	04    ---- ---- ???? ????
	592	unknown (bit 1 may be bank count selection, 0 in xexex, 1 everywhere
	593	else)
	594
	595	06    ---- ---- ???? ???e
	596	enable irq
	597
	598	08    ---- ---- ???? ????
	599	unknown
	600
	601	0a    ---- ---- 3322 1100
	602	linescroll control, each pair of bits indicates the mode for the
	603	corresponding layer:
	604	0: per-line linescroll
	605	1: unused/unknown
	606	2: per-8 lines linescroll
	607	3: no linescroll
	608
	609	0c    ---- ---- ???? ????
	610	unknown (bit 1 may be bank size selection, 1 in asterix, 0 everywhere
	611	else)
	612
	613	0e    ---- ---- ---- ----
	614
	615	10-13 ---- ---- ---y y-hh
	616	layer Y position in the VRAM grid and height in pages
	617
	618	14-17 ---- ---- ---x x-ww
	619	layer X position in the VRAM grid and width in pages
	620	18-1f ---- ---- ???? ????
	621
	622	20-27 yyyy yyyy yyyy yyyy
	623	scroll y position for each layer
	624
	625	28-2f xxxx xxxx xxxx xxxx
	626	scroll x position for each layer
	627
	628	30    ---- ---- ---b b--b
	629	linescroll ram bank selection
	630
	631	32    ---- ---- ---b b--b
	632	cpu-accessible ram bank selection
	633
	634	34    bbbb bbbb bbbb bbbb
	635	rom bank selection for checksumming (each bank is 0x2000 bytes)
	636
	637	36    ---- ---- ---- bbbb
	638	secondary rom bank selection for checksumming when tile banking is
	639	used
	640
	641	38    3333 2222 1111 0000
	642	tile banking look up table.  4 bits are looked up here for the two
	643	bits in the tile data.
	644
	645	3a    ???? ???? ???? ????
	646	unknown
	647
	648	3c    ???? ???? ???? ????
	649	unknown
	650
	651	3e    ---- ---- ---- ----
	652
	653
	654	Second register bank map:
	655	00    ---- ---- ???? ????
	656	unknown
	657
	658	02-07 are copies of the 02-07 registers from the first bank.
	659
	660
	661	Linescroll:
	662
	663	The linescroll is controlled by the register 0b, and uses the data in
	664	the ram bank pointed by register 31.  The data for tilemap <n> starts
	665	at offset 400*n in the bank for 1000 bytes ram banks, and 800*n+2 for
	666	2000 bytes ram banks.  The scrolling information is a vector of half
	667	words separated by 1 word padding for 2000 bytes banks.
	668
	669	This is a source-oriented linescroll, i.e. the first word is
	670	associated to the first one of the tilemap, not matter what the
	671	current scrolly position is.
	672
	673	In per-line mode, each word indicates the horizontal scroll of the
	674	associated line.  Global scrollx is ignored.
	675
	676	In per-8 lines mode, each word associated to a line multiple of 8
	677	indicates the horizontal scroll for that line and the 7 following
	678	ones.  The other 7 words are ignored.  Global scrollx is ignored.
	679
	680
	681
	682	051960/051937
	683	-------------
	684	Sprite generators. Designed to work in pair. The 051960 manages the sprite
	685	list and produces and address that is fed to the gfx ROMs. The data from the
	686	ROMs is sent to the 051937, along with color code and other stuff from the
	687	051960. The 051937 outputs up to 12 bits of palette index, plus "shadow" and
	688	transparency information.
	689	Both chips are interfaced to the main CPU, through 8-bit data buses and 11
	690	bits of address space. The 051937 sits in the range 000-007, while the 051960
	691	in the range 400-7ff (all RAM). The main CPU can read the gfx ROM data though
	692	the 051937 data bus, while the 051960 provides the address lines.
	693	The 051960 is designed to directly address 1MB of ROM space, since it produces
	694	18 address lines that go to two 16-bit wide ROMs (the 051937 has a 32-bit data
	695	bus to the ROMs). However, the addressing space can be increased by using one
	696	or more of the "color attribute" bits of the sprites as bank selectors.
	697	Moreover a few games store the gfx data in the ROMs in a format different from
	698	the one expected by the 051960, and use external logic to reorder the address
	699	lines.
	700	The 051960 can also genenrate IRQ, FIRQ and NMI signals.
	701
	702	memory map:
	703	000-007 is for the 051937, but also seen by the 051960
	704	400-7ff is 051960 only
	705	000     R  bit 0 = unknown, looks like a status flag or something
	706	aliens waits for it to be 0 before starting to copy sprite data
	707	thndrx2 needs it to pulse for the startup checks to succeed
	708	000     W  bit 0 = irq enable/acknowledge?
	709	bit 2 = nmi enable?
	710	bit 3 = flip screen (applies to sprites only, not tilemaps)
	711	bit 4 = unknown, used by Devastators, TMNT, Aliens, Chequered Flag, maybe others
	712	aliens sets it just after checking bit 0, and before copying
	713	the sprite data
	714	bit 5 = enable gfx ROM reading
	715	001     W  Devastators sets bit 1, function unknown.
	716	Ultraman sets the register to 0x0f.
	717	None of the other games I tested seem to set this register to other than 0.
	718	002-003 W  selects the portion of the gfx ROMs to be read.
	719	004     W  Aliens uses this to select the ROM bank to be read, but Punk Shot
	720	and TMNT don't, they use another bit of the registers above. Many
	721	other games write to this register before testing.
	722	It is possible that bits 2-7 of 003 go to OC0-OC5, and bits 0-1 of
	723	004 go to OC6-OC7.
	724	004-007 R  reads data from the gfx ROMs (32 bits in total). The address of the
	725	data is determined by the register above and by the last address
	726	accessed on the 051960; plus bank switch bits for larger ROMs.
	727	It seems that the data can also be read directly from the 051960
	728	address space: 88 Games does this. First it reads 004 and discards
	729	the result, then it reads from the 051960 the data at the address
	730	it wants. The normal order is the opposite, read from the 051960 at
	731	the address you want, discard the result, and fetch the data from
	732	004-007.
	733	400-7ff RW sprite RAM, 8 bytes per sprite
	734
	735
	736
	737	053245/053244
	738	-------------
	739	Sprite generators. The 053245 has a 16-bit data bus to the main CPU.
	740	The sprites are buffered, a write to 006 activates to copy between the
	741	main ram and the buffer.
	742
	743	053244 memory map (but the 053245 sees and processes them too):
	744	000-001  W global X offset
	745	002-003  W global Y offset
	746	004      W unknown
	747	005      W bit 0 = flip screen X
	748	bit 1 = flip screen Y
	749	bit 2 = unknown, used by Parodius
	750	bit 4 = enable gfx ROM reading
	751	bit 5 = unknown, used by Rollergames
	752	006     RW accessing this register copies the sprite ram to the internal buffer
	753	007      W unknown
	754	008-009  W low 16 bits of the ROM address to read
	755	00a-00b  W high bits of the ROM address to read.  3 bits for most games, 1 for asterix
	756	00c-00f R  reads data from the gfx ROMs (32 bits in total). The address of the
	757	data is determined by the registers above; plus bank switch bits for
	758	larger ROMs.
	759
	760
	761
	762	053247/053246
	763	-------------
	764	Sprite generators. Nothing is known about their external interface.
	765	The sprite RAM format is very similar to the 053245.
	766
	767	053246 memory map (but the 053247 sees and processes them too):
	768	000-001 W  global X offset
	769	002-003 W  global Y offset
	770	004     W  low 8 bits of the ROM address to read
	771	005     W  bit 0 = flip screen X
	772	bit 1 = flip screen Y
	773	bit 2 = unknown
	774	bit 4 = interrupt enable
	775	bit 5 = unknown
	776	006-007 W  high 16 bits of the ROM address to read
	777
	778	???-??? R  reads data from the gfx ROMs (16 bits in total). The address of the
	779	data is determined by the registers above
	780
	781
	782
	783	051316
	784	------
	785	Manages a 32x32 tilemap (16x16 tiles, 512x512 pixels) which can be zoomed,
	786	distorted and rotated.
	787	It uses two internal 24 bit counters which are incremented while scanning the
	788	picture. The coordinates of the pixel in the tilemap that has to be drawn to
	789	the current beam position are the counters / (2^11).
	790	The chip doesn't directly generate the color information for the pixel, it
	791	just generates a 24 bit address (whose top 16 bits are the contents of the
	792	tilemap RAM), and a "visible" signal. It's up to external circuitry to convert
	793	the address into a pixel color. Most games seem to use 4bpp graphics, but Ajax
	794	uses 7bpp.
	795	If the value in the internal counters is out of the visible range (0..511), it
	796	is truncated and the corresponding address is still generated, but the "visible"
	797	signal is not asserted. The external circuitry might ignore that signal and
	798	still generate the pixel, therefore making the tilemap a continuous playfield
	799	that wraps around instead of a large sprite.
	800
	801	control registers
	802	000-001 X counter starting value / 256
	803	002-003 amount to add to the X counter after each horizontal pixel
	804	004-005 amount to add to the X counter after each line (0 = no rotation)
	805	006-007 Y counter starting value / 256
	806	008-009 amount to add to the Y counter after each horizontal pixel (0 = no rotation)
	807	00a-00b amount to add to the Y counter after each line
	808	00c-00d ROM bank to read, used during ROM testing
	809	00e     bit 0 = enable ROM reading (active low). This only makes the chip output the
	810	requested address: the ROM is actually read externally, not through
	811	the chip's data bus.
	812	bit 1 = unknown
	813	bit 2 = unknown
	814	00f     unused
	815
	816
	817
	818	053936
	819	------
	820	Evolution of the 051316. The data bus is 16-bit instead of 8-bit.
	821	When used in "simple" mode it can generate the same effects of the 051316, but it
	822	doesn't have internal tilemap RAM, so it just generates a couple of X/Y coordinates
	823	indicating the pixel to display at each moment. Therefore, the tilemap and tile
	824	sizes are not fixed.
	825	The important addition over the 051316 is 512x4 words of internal RAM used to control
	826	rotation and zoom scanline by scanline instead that on the whole screen, allowing for
	827	effects like linescroll (Super Slams) or 3D rotation of the tilemap (Golfing Greats,
	828	Premier Soccer).
	829
	830	control registers
	831	000 X counter starting value / 256
	832	001 Y counter starting value / 256
	833	002 ["simple" mode only] amount to add to the X counter after each line (0 = no rotation)
	834	003 ["simple" mode only] amount to add to the Y counter after each line
	835	004 ["simple" mode only] amount to add to the X counter after each horizontal pixel
	836	005 ["simple" mode only] amount to add to the Y counter after each horizontal pixel (0 = no rotation)
	837	006 x------- -------- when set, register (line*4)+2 must be multiplied by 256
	838	-x------ -------- when set, registers 002 and 003 must be multiplied by 256
	839	--xxxxxx -------- clipping for the generated address? usually 3F, Premier Soccer
	840	sets it to 07 before penalty kicks
	841	-------- x------- when set, register (line*4)+3 must be multiplied by 256
	842	-------- -x------ when set, registers 004 and 005 must be multiplied by 256
	843	-------- --xxxxxx clipping for the generated address? usually 3F, Premier Soccer
	844	sets it to 0F before penalty kicks
	845	007 -------- -x------ enable "super" mode
	846	-------- --x----- unknown (enable address clipping from register 006?)
	847	-------- ---x---- unknown
	848	-------- ------x- (not sure) enable clipping with registers 008-00b
	849	008 min x screen coordinate to draw to (only when enabled by register 7)
	850	009 max x screen coordinate to draw to (only when enabled by register 7)
	851	00a min y screen coordinate to draw to (only when enabled by register 7)
	852	00b max y screen coordinate to draw to (only when enabled by register 7)
	853	00c unknown
	854	00d unknown
	855	00e unknown
	856	00f unknown
	857
	858	additional control from extra RAM:
	859	(line*4)+0 X counter starting value / 256 (add to register 000)
	860	(line*4)+1 Y counter starting value / 256 (add to register 001)
	861	(line*4)+2 amount to add to the X counter after each horizontal pixel
	862	(line*4)+3 amount to add to the Y counter after each horizontal pixel
	863
	864
	865
	866	053251
	867	------
	868	Priority encoder.
	869
	870	The chip has inputs for 5 layers (CI0-CI4); only 4 are used (CI1-CI4)
	871	CI0-CI2 are 9(=5+4) bits inputs, CI3-CI4 8(=4+4) bits
	872
	873	The input connctions change from game to game. E.g. in Simpsons,
	874	CI0 = grounded (background color)
	875	CI1 = sprites
	876	CI2 = FIX
	877	CI3 = A
	878	CI4 = B
	879
	880	in lgtnfght:
	881	CI0 = grounded
	882	CI1 = sprites
	883	CI2 = FIX
	884	CI3 = B
	885	CI4 = A
	886
	887	there are three 6 bit priority inputs, PR0-PR2
	888
	889	simpsons:
	890	PR0 = 111111
	891	PR1 = xxxxx0 x bits coming from the sprite attributes
	892	PR2 = 111111
	893
	894	lgtnfght:
	895	PR0 = 111111
	896	PR1 = 1xx000 x bits coming from the sprite attributes
	897	PR2 = 111111
	898
	899	also two shadow inputs, SDI0 and SDI1 (from the sprite attributes)
	900
	901	the chip outputs the 11 bit palette index, CO0-CO10, and two shadow bits.
	902
	903	16 internal registers; registers are 6 bits wide (input is D0-D5)
	904	For the most part, their meaning is unknown
	905	All registers are write only.
	906	There must be a way to enable/disable the three external PR inputs.
	907	Some games initialize the priorities of the sprite & background layers,
	908	others don't. It isn't clear whether the data written to those registers is
	909	actually used, since the priority is taken from the external ports.
	910
	911	0  priority of CI0 (higher = lower priority)
	912	punkshot: unused?
	913	lgtnfght: unused?
	914	simpsons: 3f = 111111
	915	xmen:     05 = 000101  default value
	916	xmen:     09 = 001001  used to swap CI0 and CI2
	917	1  priority of CI1 (higher = lower priority)
	918	punkshot: 28 = 101000
	919	lgtnfght: unused?
	920	simpsons: unused?
	921	xmen:     02 = 000010
	922	2  priority of CI2 (higher = lower priority)
	923	punkshot: 24 = 100100
	924	lgtnfght: 24 = 100100
	925	simpsons: 04 = 000100
	926	xmen:     09 = 001001  default value
	927	xmen:     05 = 000101  used to swap CI0 and CI2
	928	3  priority of CI3 (higher = lower priority)
	929	punkshot: 34 = 110100
	930	lgtnfght: 34 = 110100
	931	simpsons: 28 = 101000
	932	xmen:     00 = 000000
	933	4  priority of CI4 (higher = lower priority)
	934	punkshot: 2c = 101100  default value
	935	punkshot: 3c = 111100  used to swap CI3 and CI4
	936	punkshot: 26 = 100110  used to swap CI1 and CI4
	937	lgtnfght: 2c = 101100
	938	simpsons: 18 = 011000
	939	xmen:     fe = 111110
	940	5  unknown
	941	punkshot: unused?
	942	lgtnfght: 2a = 101010
	943	simpsons: unused?
	944	xmen: unused?
	945	6  unknown
	946	punkshot: 26 = 100110
	947	lgtnfght: 30 = 110000
	948	simpsons: 17 = 010111
	949	xmen:     03 = 000011 (written after initial tests)
	950	7  unknown
	951	punkshot: unused?
	952	lgtnfght: unused?
	953	simpsons: 27 = 100111
	954	xmen:     07 = 000111 (written after initial tests)
	955	8  unknown
	956	punkshot: unused?
	957	lgtnfght: unused?
	958	simpsons: 37 = 110111
	959	xmen:     ff = 111111 (written after initial tests)
	960	9  ----xx CI0 palette index base (CO9-CO10)
	961	--xx-- CI1 palette index base (CO9-CO10)
	962	xx---- CI2 palette index base (CO9-CO10)
	963	10  ---xxx CI3 palette index base (CO8-CO10)
	964	xxx--- CI4 palette index base (CO8-CO10)
	965	11  unknown
	966	punkshot: 00 = 000000
	967	lgtnfght: 00 = 000000
	968	simpsons: 00 = 000000
	969	xmen:     00 = 000000 (written after initial tests)
	970	12  unknown
	971	punkshot: 04 = 000100
	972	lgtnfght: 04 = 000100
	973	simpsons: 05 = 000101
	974	xmen:     05 = 000101
	975	13  unused
	976	14  unused
	977	15  unused
	978
	979
	980	054000
	981	------
	982	Sort of a protection device, used for collision detection.
	983	It is passed a few parameters, and returns a boolean telling if collision
	984	happened. It has no access to gfx data, it only does arithmetical operations
	985	on the parameters.
	986
	987	Memory map:
	988	00      unused
	989	01-03 W A center X
	990	04    W unknown, needed by thndrx2 to pass the startup check, we use a hack
	991	05      unused
	992	06    W A semiaxis X
	993	07    W A semiaxis Y
	994	08      unused
	995	09-0b W A center Y
	996	0c    W unknown, needed by thndrx2 to pass the startup check, we use a hack
	997	0d      unused
	998	0e    W B semiaxis X
	999	0f    W B semiaxis Y
	1000	10      unused
	1001	11-13 W B center Y
	1002	14      unused
	1003	15-17 W B center X
	1004	18    R 0 = collision, 1 = no collision
	1005
	1006
	1007	051733
	1008	------
	1009	Sort of a protection device, used for collision detection, and for
	1010	arithmetical operations.
	1011	It is passed a few parameters, and returns the result.
	1012
	1013	Memory map(preliminary):
	1014	------------------------
	1015	00-01 W operand 1
	1016	02-03 W operand 2
	1017	04-05 W operand 3
	1018
	1019	00-01 R operand 1 / operand 2
	1020	02-03 R operand 1 % operand 2?
	1021	04-05 R sqrt(operand 3<<16)
	1022	06    R unknown - return value written to 13?
	1023
	1024	06-07 W distance for collision check
	1025	08-09 W Y pos of obj1
	1026	0a-0b W X pos of obj1
	1027	0c-0d W Y pos of obj2
	1028	0e-0f W X pos of obj2
	1029	13    W unknown
	1030
	1031	07    R collision (0x80 = no, 0x00 = yes)
	1032	0a-0b R unknown (chequered flag), might just read back X pos
	1033	0e-0f R unknown (chequered flag), might just read back X pos
	1034
	1035	Other addresses are unknown or unused.
	1036
	1037	Fast Lane:
	1038	----------
	1039	$9def:
	1040	This routine is called only after a collision.
	1041	(R) 0x0006: unknown. Only bits 0-3 are used.
	1042
	1043	Blades of Steel:
	1044	----------------
	1045	$ac2f:
	1046	(R) 0x2f86: unknown. Only uses bit 0.
	1047
	1048	$a5de:
	1049	writes to 0x2f84-0x2f85, waits a little, and then reads from 0x2f84.
	1050
	1051	$7af3:
	1052	(R) 0x2f86: unknown. Only uses bit 0.
	1053
	1054
	1055	Devastators:
	1056	------------
	1057	$6ce8:
	1058	reads from 0x0006, and only uses bit 1.
	1059
	1060
	1061	K055550
	1062	-------
	1063
	1064	Protection chip which performs a memset() operation.
	1065
	1066	Used in Violent Storm and Ultimate Battler to clear VRAM between scenes, among
	1067	other things.  May also perform other functions since Violent Storm still isn't
	1068	happy...
	1069
	1070	Has word-wide registers as follows:
	1071
	1072	0: Count of units to transfer.  The write here triggers the transfer.
	1073	1-6: Unknown
	1074	7: Destination address, MSW
	1075	8: Destination address, LSW
	1076	9: Unknown
	1077	10: Size of transfer units, MSW
	1078	11: Size of transfer units, LSW
	1079	12: Unknown
	1080	13: Value to fill destination region with
	1081	14-15: Unknown
	1082
	1083
	1084	K055555
	1085	-------
	1086
	1087	Priority encoder.  Always found in conjunction with k054338, but the reverse
	1088	isn't true.  The 55555 has 8 inputs: "A", "B", "C", and "D" intended for a 156/157
	1089	type tilemap chip, "OBJ" intended for a '246 type sprite chip, and "SUB1-SUB3"
	1090	which can be used for 3 additional layers.
	1091
	1092	When used in combintion with a k054338, each input can be chosen to participate
	1093	in shadow/highlight operations, R/G/B alpha blending, and R/G/B brightness control.
	1094	Per-tile priority is supported for tilemap planes A and B.
	1095
	1096	There are also 3 shadow priority registers.  When these are enabled, layers and
	1097	sprites with a priority greater than or equal to them become a shadow, and either
	1098	then gets drawn as a shadow/highlight or not at all (I'm not sure what selects
	1099	this yet.  Dadandarn relies on this mechanism to hide the 53936 plane when
	1100	it doesn't want it visible).
	1101
	1102	It also appears that brightness control and alpha blend can be decided per-tile
	1103	and per-sprite, although this is not certain.
	1104
	1105	Additionally the 55555 can provide a gradient background with one palette entry
	1106	per scanline.  This is fairly rarely used, but does turn up in Gokujou Parodius as
	1107	well as the Sexy Parodius title screen.
	1108
	1109	Lots of byte-wise registers.  A partial map:
	1110
	1111	0: Palette index(?) for the gradient background
	1112	1: related to tilemap brightness control
	1113	2-5: COLSEL for various inputs (?)
	1114	6: COLCHG ON
	1115	7-18: priority levels (VA1/VA2/VAC/VB1/VB2/VBC/VC/VD/OBJ/S1/S2/S3)
	1116	19-22: INPRI for OBJ/S1/S2/S3
	1117	23-32: palette bases (VA/VB/VC/VD/OBJ/S1/S2/S3)
	1118	37: shadow 1 priority
	1119	38: shadow 2 priority
	1120	39: shadow 3 priority
	1121	40: shadow/highlight master enable
	1122	41: master shadow/highlight priority
	1123	42: VBRI: enables brightness control for each VRAM layer (bits: x x x x D B C A)
	1124	43: OSBRI: enables brightness control for OBJ and SUB layers, depending for OBJ on attr bits
	1125	44: OSBRI_ON: not quite sure
	1126	45: input enables.  bits as follows: (MSB) S3 S2 S1 OB VD VC VB VA (LSB)
	1127
	1128
	1129	k054338
	1130	-------
	1131	Color combiner engine.  Designed for use with the 55555, but also found in games
	1132	without one.
	1133
	1134	Registers (word-wise):
	1135
	1136	0: first 8 bits unknown, second 8 bits are the R component of the background color
	1137	1: G and B components (8 bits each) of the background color
	1138	2-4: shadow 1 R/G/B (16 bits per component.  In shadow mode, determines a blend
	1139	value between total blackness and the original color.  In highlight mode,
	1140	determines a blend value between total whiteness and the original color.
	1141	The hardware clamps at black or white as necessary: see the Graphics Test
	1142	in many System GX games).
	1143	5-7: shadow 2 R/G/B
	1144	8-10: shadow 3 R/G/B
	1145	11-12: brightness R/G/B (external circuit such as the 55555 decides which layers
	1146	this applies to)
	1147	13-14: alpha blend R/G/B (external circuit such as the 55555 decides which layers
	1148	this applies to)
	1149
	1150	***************************************************************************/
	1151
	1152	#include "driver.h"
	1153	#include "video/konicdev.h"
	1154
	1155	#define VERBOSE 0
	1156	#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
	1157
	1158
	1159	#define XOR(a) WORD_XOR_BE(a)
	1160
	1161	/*
	1162	This recursive function doesn't use additional memory
	1163	(it could be easily converted into an iterative one).
	1164	It's called shuffle because it mimics the shuffling of a deck of cards.
	1165	*/
	1166	static void konami_shuffle_16(UINT16 *buf,int len)
	1167	{
	1168	int i;
	1169	UINT16 t;
	1170
	1171	if (len == 2) return;
	1172
	1173	if (len % 4) fatalerror("shuffle() - not modulo 4");   /* must not happen */
	1174
	1175	len /= 2;
	1176
	1177	for (i = 0;i < len/2;i++)
	1178	{
	1179	t = buf[len/2 + i];
	1180	buf[len/2 + i] = buf[len + i];
	1181	buf[len + i] = t;
	1182	}
	1183
	1184	konami_shuffle_16(buf,len);
	1185	konami_shuffle_16(buf + len,len);
	1186	}
	1187
	1188	static void konami_shuffle_8(UINT8 *buf,int len)
	1189	{
	1190	int i;
	1191	UINT8 t;
	1192
	1193	if (len == 2) return;
	1194
	1195	if (len % 4) fatalerror("shuffle() - not modulo 4");   /* must not happen */
	1196
	1197	len /= 2;
	1198
	1199	for (i = 0;i < len/2;i++)
	1200	{
	1201	t = buf[len/2 + i];
	1202	buf[len/2 + i] = buf[len + i];
	1203	buf[len + i] = t;
	1204	}
	1205
	1206	konami_shuffle_8(buf,len);
	1207	konami_shuffle_8(buf + len,len);
	1208	}
	1209
	1210
	1211	/* helper function to join two 16-bit ROMs and form a 32-bit data stream */
	1212	void konamid_rom_deinterleave_2(running_machine *machine, const char *mem_region)
	1213	{
	1214	konami_shuffle_16((UINT16 *)memory_region(machine, mem_region),memory_region_length(machine, mem_region)/2);
	1215	}
	1216
	1217	/* hacked version of rom_deinterleave_2_half for Lethal Enforcers */
	1218	void konamid_rom_deinterleave_2_half(running_machine *machine, const char *mem_region)
	1219	{
	1220	UINT8 *rgn = memory_region(machine, mem_region);
	1221
	1222	konami_shuffle_16((UINT16 *)rgn,memory_region_length(machine, mem_region)/4);
	1223	konami_shuffle_16((UINT16 *)(rgn+memory_region_length(machine, mem_region)/2),memory_region_length(machine, mem_region)/4);
	1224	}
	1225
	1226	/* helper function to join four 16-bit ROMs and form a 64-bit data stream */
	1227	void konamid_rom_deinterleave_4(running_machine *machine, const char *mem_region)
	1228	{
	1229	konamid_rom_deinterleave_2(machine, mem_region);
	1230	konamid_rom_deinterleave_2(machine, mem_region);
	1231	}
	1232
	1233
	1234	static void decode_gfx(running_machine *machine, int gfx_index, UINT8 *data, UINT32 total, const gfx_layout *layout, int bpp)
	1235	{
	1236	gfx_layout gl;
	1237
	1238	memcpy(&gl, layout, sizeof(gl));
	1239	gl.total = total;
	1240	machine->gfx[gfx_index] = gfx_element_alloc(machine, &gl, data, machine->config->total_colors >> bpp, 0);
	1241	}
	1242
	1243
	1244	static void deinterleave_gfx(running_machine *machine, const char *gfx_memory_region, int deinterleave)
	1245	{
	1246	switch (deinterleave)
	1247	{
	1248	case KONAMI_ROM_DEINTERLEAVE_NONE:
	1249	break;
	1250	case KONAMI_ROM_DEINTERLEAVE_2:
	1251	konamid_rom_deinterleave_2(machine, gfx_memory_region);
	1252	break;
	1253	case KONAMI_ROM_DEINTERLEAVE_2_HALF:
	1254	konamid_rom_deinterleave_2_half(machine, gfx_memory_region);
	1255	break;
	1256	case KONAMI_ROM_DEINTERLEAVE_4:
	1257	konamid_rom_deinterleave_4(machine, gfx_memory_region);
	1258	break;
	1259	case KONAMI_ROM_SHUFFLE8:
	1260	konami_shuffle_8(memory_region(machine, gfx_memory_region), memory_region_length(machine, gfx_memory_region));
	1261	break;
	1262	}
	1263	}
	1264
	1265	/***************************************************************************/
	1266	/*                                                                         */
	1267	/*                                 007121                                  */
	1268	/*                                                                         */
	1269	/***************************************************************************/
	1270
	1271	typedef struct _k007121_state  k007121_state ;
	1272	struct _k007121_state
	1273	{
	1274
	1275	UINT8    ctrlram[8];
	1276	int      flipscreen;
	1277	};
	1278
	1279	/*****************************************************************************
	1280	INLINE FUNCTIONS
	1281	*****************************************************************************/
	1282
	1283	INLINE k007121_state *k007121_get_safe_token( const device_config *device )
	1284	{
	1285	assert(device != NULL);
	1286	assert(device->token != NULL);
	1287	assert(device->type == K007121);
	1288
	1289	return (k007121_state *)device->token;
	1290	}
	1291
	1292	/*****************************************************************************
	1293	DEVICE HANDLERS
	1294	*****************************************************************************/
	1295
	1296	/* FIXME: this is probably unused... check! */
	1297	WRITE8_DEVICE_HANDLER( k007121_ctrlram_w )
	1298	{
	1299	k007121_state *k007121 = k007121_get_safe_token(device);
	1300
	1301	assert(offset < 8);
	1302
	1303	k007121->ctrlram[offset] = data;
	1304	}
	1305
	1306
	1307	READ8_DEVICE_HANDLER( k007121_ctrlram_r )
	1308	{
	1309	k007121_state *k007121 = k007121_get_safe_token(device);
	1310
	1311	assert(offset < 8);
	1312
	1313	return k007121->ctrlram[offset];
	1314	}
	1315
	1316
	1317	WRITE8_DEVICE_HANDLER( k007121_ctrl_w )
	1318	{
	1319	k007121_state *k007121 = k007121_get_safe_token(device);
	1320
	1321	assert(offset < 8);
	1322
	1323	switch (offset)
	1324	{
	1325	case 6:
	1326	/* palette bank change */
	1327	if ((k007121->ctrlram[offset] & 0x30) != (data & 0x30))
	1328	tilemap_mark_all_tiles_dirty_all(device->machine);
	1329	break;
	1330	case 7:
	1331	k007121->flipscreen = data & 0x08;
	1332	break;
	1333	}
	1334
	1335	k007121->ctrlram[offset] = data;
	1336	}
	1337
	1338	/*
	1339	* Sprite Format
	1340	* ------------------
	1341	*
	1342	* There are 0x40 sprites, each one using 5 bytes. However the number of
	1343	* sprites can be increased to 0x80 with a control register (Combat School
	1344	* sets it on and off during the game).
	1345	*
	1346	* Byte | Bit(s)   | Use
	1347	* -----+-76543210-+----------------
	1348	*   0  | xxxxxxxx | sprite code
	1349	*   1  | xxxx---- | color
	1350	*   1  | ----xx-- | sprite code low 2 bits for 16x8/8x8 sprites
	1351	*   1  | ------xx | sprite code bank bits 1/0
	1352	*   2  | xxxxxxxx | y position
	1353	*   3  | xxxxxxxx | x position (low 8 bits)
	1354	*   4  | xx------ | sprite code bank bits 3/2
	1355	*   4  | --x----- | flip y
	1356	*   4  | ---x---- | flip x
	1357	*   4  | ----xxx- | sprite size 000=16x16 001=16x8 010=8x16 011=8x8 100=32x32
	1358	*   4  | -------x | x position (high bit)
	1359	*
	1360	* Flack Attack uses a different, "wider" layout with 32 bytes per sprite,
	1361	* mapped as follows, and the priority order is reversed. Maybe it is a
	1362	* compatibility mode with an older custom IC. It is not known how this
	1363	* alternate layout is selected.
	1364	*
	1365	* 0 -> e
	1366	* 1 -> f
	1367	* 2 -> 6
	1368	* 3 -> 4
	1369	* 4 -> 8
	1370	*
	1371	*/
	1372
	1373	void k007121_sprites_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, gfx_element *gfx, colortable_t *ctable,
	1374	const UINT8 *source, int base_color, int global_x_offset, int bank_base, UINT32 pri_mask )
	1375	{
	1376	k007121_state *k007121 = k007121_get_safe_token(device);
	1377	//  const gfx_element *gfx = gfxs[chip];
	1378	bitmap_t *priority_bitmap = gfx->machine->priority_bitmap;
	1379	int flipscreen = k007121->flipscreen;
	1380	int i, num, inc, offs[5];
	1381	int is_flakatck = (ctable == NULL);
	1382
	1383	if (is_flakatck)
	1384	{
	1385	num = 0x40;
	1386	inc = -0x20;
	1387	source += 0x3f * 0x20;
	1388	offs[0] = 0x0e;
	1389	offs[1] = 0x0f;
	1390	offs[2] = 0x06;
	1391	offs[3] = 0x04;
	1392	offs[4] = 0x08;
	1393	}
	1394	else   /* all others */
	1395	{
	1396	//num = (k007121->ctrlram[0x03] & 0x40) ? 0x80 : 0x40; /* WRONG!!! (needed by combasc)  */
	1397	num = 0x40; // Combasc writes 70 sprites to VRAM at peak but the chip only processes the first 64.
	1398
	1399	inc = 5;
	1400	offs[0] = 0x00;
	1401	offs[1] = 0x01;
	1402	offs[2] = 0x02;
	1403	offs[3] = 0x03;
	1404	offs[4] = 0x04;
	1405	/* when using priority buffer, draw front to back */
	1406	if (pri_mask != -1)
	1407	{
	1408	source += (num - 1)*inc;
	1409	inc = -inc;
	1410	}
	1411	}
	1412
	1413	for (i = 0; i < num; i++)
	1414	{
	1415	int number = source[offs[0]];            /* sprite number */
	1416	int sprite_bank = source[offs[1]] & 0x0f;   /* sprite bank */
	1417	int sx = source[offs[3]];               /* vertical position */
	1418	int sy = source[offs[2]];               /* horizontal position */
	1419	int attr = source[offs[4]];            /* attributes */
	1420	int xflip = source[offs[4]] & 0x10;      /* flip x */
	1421	int yflip = source[offs[4]] & 0x20;      /* flip y */
	1422	int color = base_color + ((source[offs[1]] & 0xf0) >> 4);
	1423	int width, height;
	1424	int transparent_mask;
	1425	static const int x_offset[4] = {0x0,0x1,0x4,0x5};
	1426	static const int y_offset[4] = {0x0,0x2,0x8,0xa};
	1427	int x,y, ex, ey, flipx, flipy, destx, desty;
	1428
	1429	if (attr & 0x01) sx -= 256;
	1430	if (sy >= 240) sy -= 256;
	1431
	1432	number += ((sprite_bank & 0x3) << 8) + ((attr & 0xc0) << 4);
	1433	number = number << 2;
	1434	number += (sprite_bank >> 2) & 3;
	1435
	1436	/* Flak Attack doesn't use a lookup PROM, it maps the color code directly */
	1437	/* to a palette entry */
	1438	if (is_flakatck)
	1439	transparent_mask = 1 << 0;
	1440	else
	1441	transparent_mask = colortable_get_transpen_mask(ctable, gfx, color, 0);
	1442
	1443	if (!is_flakatck || source[0x00])   /* Flak Attack needs this */
	1444	{
	1445	number += bank_base;
	1446
	1447	switch (attr & 0xe)
	1448	{
	1449	case 0x06: width = height = 1; break;
	1450	case 0x04: width = 1; height = 2; number &= (~2); break;
	1451	case 0x02: width = 2; height = 1; number &= (~1); break;
	1452	case 0x00: width = height = 2; number &= (~3); break;
	1453	case 0x08: width = height = 4; number &= (~3); break;
	1454	default: width = 1; height = 1;
	1455	//                  logerror("Unknown sprite size %02x\n", attr & 0xe);
	1456	//                  popmessage("Unknown sprite size %02x\n", attr & 0xe);
	1457	}
	1458
	1459	for (y = 0; y < height; y++)
	1460	{
	1461	for (x = 0; x < width; x++)
	1462	{
	1463	ex = xflip ? (width - 1 - x) : x;
	1464	ey = yflip ? (height - 1 - y) : y;
	1465
	1466	if (flipscreen)
	1467	{
	1468	flipx = !xflip;
	1469	flipy = !yflip;
	1470	destx = 248 - (sx + x * 8);
	1471	desty = 248 - (sy + y * 8);
	1472	}
	1473	else
	1474	{
	1475	flipx = xflip;
	1476	flipy = yflip;
	1477	destx = global_x_offset + sx + x * 8;
	1478	desty = sy + y * 8;
	1479	}
	1480
	1481	if (pri_mask != -1)
	1482	pdrawgfx_transmask(bitmap,cliprect,gfx,
	1483	number + x_offset[ex] + y_offset[ey],
	1484	color,
	1485	flipx,flipy,
	1486	destx,desty,
	1487	priority_bitmap,pri_mask,
	1488	transparent_mask);
	1489	else
	1490	drawgfx_transmask(bitmap,cliprect,gfx,
	1491	number + x_offset[ex] + y_offset[ey],
	1492	color,
	1493	flipx,flipy,
	1494	destx,desty,
	1495	transparent_mask);
	1496	}
	1497	}
	1498	}
	1499
	1500	source += inc;
	1501	}
	1502	}
	1503
	1504	/*****************************************************************************
	1505	DEVICE INTERFACE
	1506	*****************************************************************************/
	1507
	1508	static DEVICE_START( k007121 )
	1509	{
	1510	k007121_state *k007121 = k007121_get_safe_token(device);
	1511
	1512	state_save_register_device_item_array(device, 0, k007121->ctrlram);
	1513	state_save_register_device_item(device, 0, k007121->flipscreen);
	1514	}
	1515
	1516	static DEVICE_RESET( k007121 )
	1517	{
	1518	k007121_state *k007121 = k007121_get_safe_token(device);
	1519	int i;
	1520
	1521	k007121->flipscreen = 0;
	1522
	1523	for (i = 0; i < 8; i++)
	1524	k007121->ctrlram[i] = 0;
	1525	}
	1526
	1527
	1528	/***************************************************************************/
	1529	/*                                                                         */
	1530	/*                                 007342                                  */
	1531	/*                                                                         */
	1532	/***************************************************************************/
	1533
	1534	typedef struct _k007342_state k007342_state;
	1535	struct _k007342_state
	1536	{
	1537	UINT8    *ram;
	1538	UINT8    *scroll_ram;
	1539	UINT8    *videoram_0;
	1540	UINT8    *videoram_1;
	1541	UINT8    *colorram_0;
	1542	UINT8    *colorram_1;
	1543
	1544	tilemap  *tilemap[2];
	1545	int      flipscreen, gfxnum, int_enabled;
	1546	UINT8    regs[8];
	1547	UINT16   scrollx[2];
	1548	UINT8    scrolly[2];
	1549
	1550	k007342_callback callback;
	1551	};
	1552
	1553	/*****************************************************************************
	1554	INLINE FUNCTIONS
	1555	*****************************************************************************/
	1556
	1557	INLINE k007342_state *k007342_get_safe_token( const device_config *device )
	1558	{
	1559	assert(device != NULL);
	1560	assert(device->token != NULL);
	1561	assert(device->type == K007342);
	1562
	1563	return (k007342_state *)device->token;
	1564	}
	1565
	1566	INLINE const k007342_interface *k007342_get_interface( const device_config *device )
	1567	{
	1568	assert(device != NULL);
	1569	assert((device->type == K007342));
	1570	return (const k007342_interface *) device->static_config;
	1571	}
	1572
	1573	/*****************************************************************************
	1574	DEVICE HANDLERS
	1575	*****************************************************************************/
	1576
	1577	READ8_DEVICE_HANDLER( k007342_r )
	1578	{
	1579	k007342_state *k007342 = k007342_get_safe_token(device);
	1580	return k007342->ram[offset];
	1581	}
	1582
	1583	WRITE8_DEVICE_HANDLER( k007342_w )
	1584	{
	1585	k007342_state *k007342 = k007342_get_safe_token(device);
	1586	k007342->ram[offset] = data;
	1587
	1588	if (offset < 0x1000)   /* layer 0 */
	1589	tilemap_mark_tile_dirty(k007342->tilemap[0], offset & 0x7ff);
	1590	else            /* layer 1 */
	1591	tilemap_mark_tile_dirty(k007342->tilemap[1], offset & 0x7ff);
	1592	}
	1593
	1594	READ8_DEVICE_HANDLER( k007342_scroll_r )
	1595	{
	1596	k007342_state *k007342 = k007342_get_safe_token(device);
	1597	return k007342->scroll_ram[offset];
	1598	}
	1599
	1600	WRITE8_DEVICE_HANDLER( k007342_scroll_w )
	1601	{
	1602	k007342_state *k007342 = k007342_get_safe_token(device);
	1603	k007342->scroll_ram[offset] = data;
	1604	}
	1605
	1606	WRITE8_DEVICE_HANDLER( k007342_vreg_w )
	1607	{
	1608	k007342_state *k007342 = k007342_get_safe_token(device);
	1609	switch(offset)
	1610	{
	1611	case 0x00:
	1612	/* bit 1: INT control */
	1613	k007342->int_enabled = data & 0x02;
	1614	k007342->flipscreen = data & 0x10;
	1615	tilemap_set_flip(k007342->tilemap[0], k007342->flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	1616	tilemap_set_flip(k007342->tilemap[1], k007342->flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	1617	break;
	1618	case 0x01:  /* used for banking in Rock'n'Rage */
	1619	if (data != k007342->regs[1])
	1620	tilemap_mark_all_tiles_dirty_all(device->machine);
	1621	case 0x02:
	1622	k007342->scrollx[0] = (k007342->scrollx[0] & 0xff) | ((data & 0x01) << 8);
	1623	k007342->scrollx[1] = (k007342->scrollx[1] & 0xff) | ((data & 0x02) << 7);
	1624	break;
	1625	case 0x03:  /* scroll x (register 0) */
	1626	k007342->scrollx[0] = (k007342->scrollx[0] & 0x100) | data;
	1627	break;
	1628	case 0x04:  /* scroll y (register 0) */
	1629	k007342->scrolly[0] = data;
	1630	break;
	1631	case 0x05:  /* scroll x (register 1) */
	1632	k007342->scrollx[1] = (k007342->scrollx[1] & 0x100) | data;
	1633	break;
	1634	case 0x06:  /* scroll y (register 1) */
	1635	k007342->scrolly[1] = data;
	1636	case 0x07:  /* unused */
	1637	break;
	1638	}
	1639	k007342->regs[offset] = data;
	1640	}
	1641
	1642	void k007342_tilemap_update( const device_config *device )
	1643	{
	1644	k007342_state *k007342 = k007342_get_safe_token(device);
	1645	int offs;
	1646
	1647	/* update scroll */
	1648	switch (k007342->regs[2] & 0x1c)
	1649	{
	1650	case 0x00:
	1651	case 0x08:   /* unknown, blades of steel shootout between periods */
	1652	tilemap_set_scroll_rows(k007342->tilemap[0], 1);
	1653	tilemap_set_scroll_cols(k007342->tilemap[0], 1);
	1654	tilemap_set_scrollx(k007342->tilemap[0], 0, k007342->scrollx[0]);
	1655	tilemap_set_scrolly(k007342->tilemap[0], 0, k007342->scrolly[0]);
	1656	break;
	1657
	1658	case 0x0c:   /* 32 columns */
	1659	tilemap_set_scroll_rows(k007342->tilemap[0], 1);
	1660	tilemap_set_scroll_cols(k007342->tilemap[0], 512);
	1661	tilemap_set_scrollx(k007342->tilemap[0], 0, k007342->scrollx[0]);
	1662	for (offs = 0; offs < 256; offs++)
	1663	tilemap_set_scrolly(k007342->tilemap[0], (offs + k007342->scrollx[0]) & 0x1ff,
	1664	k007342->scroll_ram[2 * (offs / 8)] + 256 * k007342->scroll_ram[2 * (offs / 8) + 1]);
	1665	break;
	1666
	1667	case 0x14:   /* 256 rows */
	1668	tilemap_set_scroll_rows(k007342->tilemap[0], 256);
	1669	tilemap_set_scroll_cols(k007342->tilemap[0], 1);
	1670	tilemap_set_scrolly(k007342->tilemap[0], 0, k007342->scrolly[0]);
	1671	for (offs = 0; offs < 256; offs++)
	1672	tilemap_set_scrollx(k007342->tilemap[0], (offs + k007342->scrolly[0]) & 0xff,
	1673	k007342->scroll_ram[2 * offs] + 256 * k007342->scroll_ram[2 * offs + 1]);
	1674	break;
	1675
	1676	default:
	1677	//          popmessage("unknown scroll ctrl %02x", k007342->regs[2] & 0x1c);
	1678	break;
	1679	}
	1680
	1681	tilemap_set_scrollx(k007342->tilemap[1], 0, k007342->scrollx[1]);
	1682	tilemap_set_scrolly(k007342->tilemap[1], 0, k007342->scrolly[1]);
	1683
	1684	#if 0
	1685	{
	1686	static int current_layer = 0;
	1687
	1688	if (input_code_pressed_once(machine, KEYCODE_Z)) current_layer = !current_layer;
	1689	tilemap_set_enable(k007342->tilemap[current_layer], 1);
	1690	tilemap_set_enable(k007342->tilemap[!current_layer], 0);
	1691
	1692	popmessage("regs:%02x %02x %02x %02x-%02x %02x %02x %02x:%02x",
	1693	k007342->regs[0], k007342->regs[1], k007342->regs[2], k007342->regs[3],
	1694	k007342->regs[4], k007342->regs[5], k007342->regs[6], k007342->regs[7],
	1695	current_layer);
	1696	}
	1697	#endif
	1698	}
	1699
	1700	void k007342_tilemap_set_enable( const device_config *device, int tmap, int enable )
	1701	{
	1702	k007342_state *k007342 = k007342_get_safe_token(device);
	1703	tilemap_set_enable(k007342->tilemap[tmap], enable);
	1704	}
	1705
	1706	void k007342_tilemap_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int num, int flags, UINT32 priority )
	1707	{
	1708	k007342_state *k007342 = k007342_get_safe_token(device);
	1709	tilemap_draw(bitmap, cliprect, k007342->tilemap[num], flags, priority);
	1710	}
	1711
	1712	int k007342_is_int_enabled( const device_config *device )
	1713	{
	1714	k007342_state *k007342 = k007342_get_safe_token(device);
	1715	return k007342->int_enabled;
	1716	}
	1717
	1718
	1719	/***************************************************************************
	1720
	1721	Callbacks for the TileMap code
	1722
	1723	***************************************************************************/
	1724
	1725	/*
	1726	data format:
	1727	video RAM     xxxxxxxx    tile number (bits 0-7)
	1728	color RAM     x-------    tiles with priority over the sprites
	1729	color RAM     -x------    depends on external conections
	1730	color RAM     --x-----    flip Y
	1731	color RAM     ---x----    flip X
	1732	color RAM     ----xxxx    depends on external connections (usually color and banking)
	1733	*/
	1734
	1735	static TILEMAP_MAPPER( k007342_scan )
	1736	{
	1737	/* logical (col,row) -> memory offset */
	1738	return (col & 0x1f) + ((row & 0x1f) << 5) + ((col & 0x20) << 5);
	1739	}
	1740
	1741	INLINE void k007342_get_tile_info( const device_config *device, tile_data *tileinfo, int tile_index, int layer, UINT8 *cram, UINT8 *vram )
	1742	{
	1743	k007342_state *k007342 = k007342_get_safe_token(device);
	1744	int color, code, flags;
	1745
	1746	color = cram[tile_index];
	1747	code = vram[tile_index];
	1748	flags = TILE_FLIPYX((color & 0x30) >> 4);
	1749
	1750	tileinfo->category = (color & 0x80) >> 7;
	1751
	1752	k007342->callback(device->machine, layer, k007342->regs[1], &code, &color, &flags);
	1753
	1754	SET_TILE_INFO_DEVICE(
	1755	k007342->gfxnum,
	1756	code,
	1757	color,
	1758	flags);
	1759	}
	1760
	1761	static TILE_GET_INFO_DEVICE( k007342_get_tile_info0 )
	1762	{
	1763	k007342_state *k007342 = k007342_get_safe_token(device);
	1764	k007342_get_tile_info(device, tileinfo, tile_index, 0, k007342->colorram_0, k007342->videoram_0);
	1765	}
	1766
	1767	static TILE_GET_INFO_DEVICE( k007342_get_tile_info1 )
	1768	{
	1769	k007342_state *k007342 = k007342_get_safe_token(device);
	1770	k007342_get_tile_info(device, tileinfo, tile_index, 1, k007342->colorram_1, k007342->videoram_1);
	1771	}
	1772
	1773
	1774	/*****************************************************************************
	1775	DEVICE INTERFACE
	1776	*****************************************************************************/
	1777
	1778	static DEVICE_START( k007342 )
	1779	{
	1780	k007342_state *k007342 = k007342_get_safe_token(device);
	1781	const k007342_interface *intf = k007342_get_interface(device);
	1782
	1783	k007342->gfxnum = intf->gfxnum;
	1784	k007342->callback = intf->callback;
	1785
	1786	k007342->tilemap[0] = tilemap_create_device(device, k007342_get_tile_info0, k007342_scan, 8, 8, 64, 32);
	1787	k007342->tilemap[1] = tilemap_create_device(device, k007342_get_tile_info1, k007342_scan, 8, 8, 64, 32);
	1788
	1789	k007342->ram = auto_alloc_array(device->machine, UINT8, 0x2000);
	1790	k007342->scroll_ram = auto_alloc_array(device->machine, UINT8, 0x0200);
	1791
	1792	k007342->colorram_0 = &k007342->ram[0x0000];
	1793	k007342->colorram_1 = &k007342->ram[0x1000];
	1794	k007342->videoram_0 = &k007342->ram[0x0800];
	1795	k007342->videoram_1 = &k007342->ram[0x1800];
	1796
	1797	tilemap_set_transparent_pen(k007342->tilemap[0], 0);
	1798	tilemap_set_transparent_pen(k007342->tilemap[1], 0);
	1799
	1800	state_save_register_device_item_pointer(device, 0, k007342->ram, 0x2000);
	1801	state_save_register_device_item_pointer(device, 0, k007342->scroll_ram, 0x0200);
	1802	state_save_register_device_item(device, 0, k007342->int_enabled);
	1803	state_save_register_device_item(device, 0, k007342->flipscreen);
	1804	state_save_register_device_item_array(device, 0, k007342->scrollx);
	1805	state_save_register_device_item_array(device, 0, k007342->scrolly);
	1806	state_save_register_device_item_array(device, 0, k007342->regs);
	1807	}
	1808
	1809	static DEVICE_RESET( k007342 )
	1810	{
	1811	k007342_state *k007342 = k007342_get_safe_token(device);
	1812	int i;
	1813
	1814	k007342->int_enabled = 0;
	1815	k007342->flipscreen = 0;
	1816	k007342->scrollx[0] = 0;
	1817	k007342->scrollx[1] = 0;
	1818	k007342->scrolly[0] = 0;
	1819	k007342->scrolly[1] = 0;
	1820
	1821	for (i = 0; i < 8; i++)
	1822	k007342->regs[i] = 0;
	1823	}
	1824
	1825
	1826	/***************************************************************************/
	1827	/*                                                                         */
	1828	/*                                 007420                                  */
	1829	/*                                                                         */
	1830	/***************************************************************************/
	1831
	1832	typedef struct _k007420_state k007420_state;
	1833	struct _k007420_state
	1834	{
	1835	UINT8        *ram;
	1836
	1837	int          banklimit;
	1838	int          flipscreen;   // current code uses the 7342 flipscreen!!
	1839	UINT8        regs[8];   // current code uses the 7342 regs!! (only [2])
	1840
	1841	k007420_callback callback;
	1842	};
	1843
	1844	/*****************************************************************************
	1845	INLINE FUNCTIONS
	1846	*****************************************************************************/
	1847
	1848	INLINE k007420_state *k007420_get_safe_token( const device_config *device )
	1849	{
	1850	assert(device != NULL);
	1851	assert(device->token != NULL);
	1852	assert(device->type == K007420);
	1853
	1854	return (k007420_state *)device->token;
	1855	}
	1856
	1857	INLINE const k007420_interface *k007420_get_interface( const device_config *device )
	1858	{
	1859	assert(device != NULL);
	1860	assert((device->type == K007420));
	1861	return (const k007420_interface *) device->static_config;
	1862	}
	1863
	1864	/*****************************************************************************
	1865	DEVICE HANDLERS
	1866	*****************************************************************************/
	1867
	1868	READ8_DEVICE_HANDLER( k007420_r )
	1869	{
	1870	k007420_state *k007420 = k007420_get_safe_token(device);
	1871	return k007420->ram[offset];
	1872	}
	1873
	1874	WRITE8_DEVICE_HANDLER( k007420_w )
	1875	{
	1876	k007420_state *k007420 = k007420_get_safe_token(device);
	1877	k007420->ram[offset] = data;
	1878	}
	1879
	1880	/*
	1881	* Sprite Format
	1882	* ------------------
	1883	*
	1884	* Byte | Bit(s)   | Use
	1885	* -----+-76543210-+----------------
	1886	*   0  | xxxxxxxx | y position
	1887	*   1  | xxxxxxxx | sprite code (low 8 bits)
	1888	*   2  | xxxxxxxx | depends on external conections. Usually banking
	1889	*   3  | xxxxxxxx | x position (low 8 bits)
	1890	*   4  | x------- | x position (high bit)
	1891	*   4  | -xxx---- | sprite size 000=16x16 001=8x16 010=16x8 011=8x8 100=32x32
	1892	*   4  | ----x--- | flip y
	1893	*   4  | -----x-- | flip x
	1894	*   4  | ------xx | zoom (bits 8 & 9)
	1895	*   5  | xxxxxxxx | zoom (low 8 bits)  0x080 = normal, < 0x80 enlarge, > 0x80 reduce
	1896	*   6  | xxxxxxxx | unused
	1897	*   7  | xxxxxxxx | unused
	1898	*/
	1899
	1900	void k007420_sprites_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, gfx_element *gfx )
	1901	{
	1902	k007420_state *k007420 = k007420_get_safe_token(device);
	1903	int offs;
	1904	int codemask = k007420->banklimit;
	1905	int bankmask = ~k007420->banklimit;
	1906
	1907	for (offs = K007420_SPRITERAM_SIZE - 8; offs >= 0; offs -= 8)
	1908	{
	1909	int ox, oy, code, color, flipx, flipy, zoom, w, h, x, y, bank;
	1910	static const int xoffset[4] = { 0, 1, 4, 5 };
	1911	static const int yoffset[4] = { 0, 2, 8, 10 };
	1912
	1913	code = k007420->ram[offs + 1];
	1914	color = k007420->ram[offs + 2];
	1915	ox = k007420->ram[offs + 3] - ((k007420->ram[offs + 4] & 0x80) << 1);
	1916	oy = 256 - k007420->ram[offs + 0];
	1917	flipx = k007420->ram[offs + 4] & 0x04;
	1918	flipy = k007420->ram[offs + 4] & 0x08;
	1919
	1920	k007420->callback(device->machine, &code, &color);
	1921
	1922	bank = code & bankmask;
	1923	code &= codemask;
	1924
	1925	/* 0x080 = normal scale, 0x040 = double size, 0x100 half size */
	1926	zoom = k007420->ram[offs + 5] | ((k007420->ram[offs + 4] & 0x03) << 8);
	1927	if (!zoom)
	1928	continue;
	1929	zoom = 0x10000 * 128 / zoom;
	1930
	1931	switch (k007420->ram[offs + 4] & 0x70)
	1932	{
	1933	case 0x30: w = h = 1; break;
	1934	case 0x20: w = 2; h = 1; code &= (~1); break;
	1935	case 0x10: w = 1; h = 2; code &= (~2); break;
	1936	case 0x00: w = h = 2; code &= (~3); break;
	1937	case 0x40: w = h = 4; code &= (~3); break;
	1938	default: w = 1; h = 1;
	1939	//logerror("Unknown sprite size %02x\n",(k007420->ram[offs + 4] & 0x70) >> 4);
	1940	}
	1941
	1942	if (k007420->flipscreen)
	1943	{
	1944	ox = 256 - ox - ((zoom * w + (1 << 12)) >> 13);
	1945	oy = 256 - oy - ((zoom * h + (1 << 12)) >> 13);
	1946	flipx = !flipx;
	1947	flipy = !flipy;
	1948	}
	1949
	1950	if (zoom == 0x10000)
	1951	{
	1952	int sx, sy;
	1953
	1954	for (y = 0; y < h; y++)
	1955	{
	1956	sy = oy + 8 * y;
	1957
	1958	for (x = 0; x < w; x++)
	1959	{
	1960	int c = code;
	1961
	1962	sx = ox + 8 * x;
	1963	if (flipx)
	1964	c += xoffset[(w - 1 - x)];
	1965	else
	1966	c += xoffset[x];
	1967
	1968	if (flipy)
	1969	c += yoffset[(h - 1 - y)];
	1970	else
	1971	c += yoffset[y];
	1972
	1973	if (c & bankmask)
	1974	continue;
	1975	else
	1976	c += bank;
	1977
	1978	drawgfx_transpen(bitmap,cliprect,gfx,
	1979	c,
	1980	color,
	1981	flipx,flipy,
	1982	sx,sy,0);
	1983
	1984	if (k007420->regs[2] & 0x80)
	1985	drawgfx_transpen(bitmap,cliprect,gfx,
	1986	c,
	1987	color,
	1988	flipx,flipy,
	1989	sx,sy-256,0);
	1990	}
	1991	}
	1992	}
	1993	else
	1994	{
	1995	int sx, sy, zw, zh;
	1996	for (y = 0; y < h; y++)
	1997	{
	1998	sy = oy + ((zoom * y + (1 << 12)) >> 13);
	1999	zh = (oy + ((zoom * (y + 1) + (1 << 12)) >> 13)) - sy;
	2000
	2001	for (x = 0; x < w; x++)
	2002	{
	2003	int c = code;
	2004
	2005	sx = ox + ((zoom * x + (1<<12)) >> 13);
	2006	zw = (ox + ((zoom * (x + 1) + (1 << 12)) >> 13)) - sx;
	2007	if (flipx)
	2008	c += xoffset[(w - 1 - x)];
	2009	else
	2010	c += xoffset[x];
	2011
	2012	if (flipy)
	2013	c += yoffset[(h - 1 - y)];
	2014	else
	2015	c += yoffset[y];
	2016
	2017	if (c & bankmask)
	2018	continue;
	2019	else
	2020	c += bank;
	2021
	2022	drawgfxzoom_transpen(bitmap,cliprect,gfx,
	2023	c,
	2024	color,
	2025	flipx,flipy,
	2026	sx,sy,
	2027	(zw << 16) / 8,(zh << 16) / 8,0);
	2028
	2029	if (k007420->regs[2] & 0x80)
	2030	drawgfxzoom_transpen(bitmap,cliprect,gfx,
	2031	c,
	2032	color,
	2033	flipx,flipy,
	2034	sx,sy-256,
	2035	(zw << 16) / 8,(zh << 16) / 8,0);
	2036	}
	2037	}
	2038	}
	2039	}
	2040	#if 0
	2041	{
	2042	static int current_sprite = 0;
	2043
	2044	if (input_code_pressed_once(machine, KEYCODE_Z)) current_sprite = (current_sprite+1) & ((K007420_SPRITERAM_SIZE/8)-1);
	2045	if (input_code_pressed_once(machine, KEYCODE_X)) current_sprite = (current_sprite-1) & ((K007420_SPRITERAM_SIZE/8)-1);
	2046
	2047	popmessage("%02x:%02x %02x %02x %02x %02x %02x %02x %02x", current_sprite,
	2048	k007420->ram[(current_sprite*8)+0], k007420->ram[(current_sprite*8)+1],
	2049	k007420->ram[(current_sprite*8)+2], k007420->ram[(current_sprite*8)+3],
	2050	k007420->ram[(current_sprite*8)+4], k007420->ram[(current_sprite*8)+5],
	2051	k007420->ram[(current_sprite*8)+6], k007420->ram[(current_sprite*8)+7]);
	2052	}
	2053	#endif
	2054	}
	2055
	2056	/*****************************************************************************
	2057	DEVICE INTERFACE
	2058	*****************************************************************************/
	2059
	2060	static DEVICE_START( k007420 )
	2061	{
	2062	k007420_state *k007420 = k007420_get_safe_token(device);
	2063	const k007420_interface *intf = k007420_get_interface(device);
	2064
	2065	k007420->callback = intf->callback;
	2066	k007420->banklimit = intf->banklimit;
	2067
	2068	k007420->ram = auto_alloc_array(device->machine, UINT8, 0x200);
	2069
	2070	state_save_register_device_item_pointer(device, 0, k007420->ram, 0x200);
	2071	state_save_register_device_item(device, 0, k007420->flipscreen);   // current one uses 7342 one
	2072	state_save_register_device_item_array(device, 0, k007420->regs);   // current one uses 7342 ones
	2073	}
	2074
	2075	static DEVICE_RESET( k007420 )
	2076	{
	2077	k007420_state *k007420 = k007420_get_safe_token(device);
	2078	int i;
	2079
	2080	k007420->flipscreen = 0;
	2081	for (i = 0; i < 8; i++)
	2082	k007420->regs[i] = 0;
	2083	}
	2084
	2085
	2086	/***************************************************************************/
	2087	/*                                                                         */
	2088	/*                                 052109                                  */
	2089	/*                                                                         */
	2090	/***************************************************************************/
	2091
	2092	typedef struct _k052109_state k052109_state;
	2093	struct _k052109_state
	2094	{
	2095	UINT8    *ram;
	2096	UINT8    *videoram_F;
	2097	UINT8    *videoram_A;
	2098	UINT8    *videoram_B;
	2099	UINT8    *videoram2_F;
	2100	UINT8    *videoram2_A;
	2101	UINT8    *videoram2_B;
	2102	UINT8    *colorram_F;
	2103	UINT8    *colorram_A;
	2104	UINT8    *colorram_B;
	2105
	2106	tilemap  *tilemap[3];
	2107	int      tileflip_enable, gfxnum;
	2108	UINT8    charrombank[4];
	2109	UINT8    charrombank_2[4];
	2110	UINT8    has_extra_video_ram;
	2111	INT32    RMRD_line;
	2112	UINT8    irq_enabled;
	2113	INT32    dx[3], dy[3];
	2114	UINT8    romsubbank, scrollctrl;
	2115
	2116	k052109_callback callback;
	2117
	2118	const char *memory_region;
	2119	};
	2120
	2121
	2122	/*****************************************************************************
	2123	INLINE FUNCTIONS
	2124	*****************************************************************************/
	2125
	2126	INLINE k052109_state *k052109_get_safe_token( const device_config *device )
	2127	{
	2128	assert(device != NULL);
	2129	assert(device->token != NULL);
	2130	assert(device->type == K052109);
	2131
	2132	return (k052109_state *)device->token;
	2133	}
	2134
	2135	INLINE const k052109_interface *k052109_get_interface( const device_config *device )
	2136	{
	2137	assert(device != NULL);
	2138	assert((device->type == K052109));
	2139	return (const k052109_interface *) device->static_config;
	2140	}
	2141
	2142	/*****************************************************************************
	2143	DEVICE HANDLERS
	2144	*****************************************************************************/
	2145
	2146	READ8_DEVICE_HANDLER( k052109_r )
	2147	{
	2148	k052109_state *k052109 = k052109_get_safe_token(device);
	2149
	2150	if (k052109->RMRD_line == CLEAR_LINE)
	2151	{
	2152	if ((offset & 0x1fff) >= 0x1800)
	2153	{
	2154	if (offset >= 0x180c && offset < 0x1834)
	2155	{   /* A y scroll */   }
	2156	else if (offset >= 0x1a00 && offset < 0x1c00)
	2157	{   /* A x scroll */   }
	2158	else if (offset == 0x1d00)
	2159	{   /* read for bitwise operations before writing */   }
	2160	else if (offset >= 0x380c && offset < 0x3834)
	2161	{   /* B y scroll */   }
	2162	else if (offset >= 0x3a00 && offset < 0x3c00)
	2163	{   /* B x scroll */   }
	2164	//          else
	2165	//logerror("%04x: read from unknown 052109 address %04x\n",cpu_get_pc(space->cpu),offset);
	2166	}
	2167
	2168	return k052109->ram[offset];
	2169	}
	2170	else   /* Punk Shot and TMNT read from 0000-1fff, Aliens from 2000-3fff */
	2171	{
	2172	int code = (offset & 0x1fff) >> 5;
	2173	int color = k052109->romsubbank;
	2174	int flags = 0;
	2175	int priority = 0;
	2176	int bank = k052109->charrombank[(color & 0x0c) >> 2] >> 2;   /* discard low bits (TMNT) */
	2177	int addr;
	2178
	2179	bank |= (k052109->charrombank_2[(color & 0x0c) >> 2] >> 2); // Surprise Attack uses this 2nd bank in the rom test
	2180
	2181	if (k052109->has_extra_video_ram)
	2182	code |= color << 8;   /* kludge for X-Men */
	2183	else
	2184	k052109->callback(device->machine, 0, bank, &code, &color, &flags, &priority);
	2185
	2186	addr = (code << 5) + (offset & 0x1f);
	2187	addr &= memory_region_length(device->machine, k052109->memory_region) - 1;
	2188
	2189	//      logerror("%04x: off = %04x sub = %02x (bnk = %x) adr = %06x\n", cpu_get_pc(space->cpu), offset, k052109->romsubbank, bank, addr);
	2190
	2191	return memory_region(device->machine, k052109->memory_region)[addr];
	2192	}
	2193	}
	2194
	2195	WRITE8_DEVICE_HANDLER( k052109_w )
	2196	{
	2197	k052109_state *k052109 = k052109_get_safe_token(device);
	2198
	2199	if ((offset & 0x1fff) < 0x1800) /* tilemap RAM */
	2200	{
	2201	if (offset >= 0x4000)
	2202	k052109->has_extra_video_ram = 1;  /* kludge for X-Men */
	2203
	2204	k052109->ram[offset] = data;
	2205	tilemap_mark_tile_dirty(k052109->tilemap[(offset & 0x1800) >> 11],offset & 0x7ff);
	2206	}
	2207	else   /* control registers */
	2208	{
	2209	k052109->ram[offset] = data;
	2210
	2211	if (offset >= 0x180c && offset < 0x1834)
	2212	{   /* A y scroll */   }
	2213	else if (offset >= 0x1a00 && offset < 0x1c00)
	2214	{   /* A x scroll */   }
	2215	else if (offset == 0x1c80)
	2216	{
	2217	if (k052109->scrollctrl != data)
	2218	{
	2219	//popmessage("scrollcontrol = %02x", data);
	2220	//logerror("%04x: rowscrollcontrol = %02x\n", cpu_get_pc(space->cpu), data);
	2221	k052109->scrollctrl = data;
	2222	}
	2223	}
	2224	else if (offset == 0x1d00)
	2225	{
	2226	//logerror("%04x: 052109 register 1d00 = %02x\n", cpu_get_pc(space->cpu), data);
	2227	/* bit 2 = irq enable */
	2228	/* the custom chip can also generate NMI and FIRQ, for use with a 6809 */
	2229	k052109->irq_enabled = data & 0x04;
	2230	}
	2231	else if (offset == 0x1d80)
	2232	{
	2233	int dirty = 0;
	2234
	2235	if (k052109->charrombank[0] != (data & 0x0f))
	2236	dirty |= 1;
	2237	if (k052109->charrombank[1] != ((data >> 4) & 0x0f))
	2238	dirty |= 2;
	2239
	2240	if (dirty)
	2241	{
	2242	int i;
	2243
	2244	k052109->charrombank[0] = data & 0x0f;
	2245	k052109->charrombank[1] = (data >> 4) & 0x0f;
	2246
	2247	for (i = 0; i < 0x1800; i++)
	2248	{
	2249	int bank = (k052109->ram[i]&0x0c) >> 2;
	2250	if ((bank == 0 && (dirty & 1)) || (bank == 1 && (dirty & 2)))
	2251	{
	2252	tilemap_mark_tile_dirty(k052109->tilemap[(i & 0x1800) >> 11], i & 0x7ff);
	2253	}
	2254	}
	2255	}
	2256	}
	2257	else if (offset == 0x1e00 || offset == 0x3e00) // Surprise Attack uses offset 0x3e00
	2258	{
	2259	//logerror("%04x: 052109 register 1e00 = %02x\n",cpu_get_pc(space->cpu),data);
	2260	k052109->romsubbank = data;
	2261	}
	2262	else if (offset == 0x1e80)
	2263	{
	2264	//if ((data & 0xfe)) logerror("%04x: 052109 register 1e80 = %02x\n",cpu_get_pc(space->cpu),data);
	2265	tilemap_set_flip(k052109->tilemap[0], (data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	2266	tilemap_set_flip(k052109->tilemap[1], (data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	2267	tilemap_set_flip(k052109->tilemap[2], (data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	2268	if (k052109->tileflip_enable != ((data & 0x06) >> 1))
	2269	{
	2270	k052109->tileflip_enable = ((data & 0x06) >> 1);
	2271
	2272	tilemap_mark_all_tiles_dirty(k052109->tilemap[0]);
	2273	tilemap_mark_all_tiles_dirty(k052109->tilemap[1]);
	2274	tilemap_mark_all_tiles_dirty(k052109->tilemap[2]);
	2275	}
	2276	}
	2277	else if (offset == 0x1f00)
	2278	{
	2279	int dirty = 0;
	2280
	2281	if (k052109->charrombank[2] != (data & 0x0f))
	2282	dirty |= 1;
	2283
	2284	if (k052109->charrombank[3] != ((data >> 4) & 0x0f))
	2285	dirty |= 2;
	2286
	2287	if (dirty)
	2288	{
	2289	int i;
	2290
	2291	k052109->charrombank[2] = data & 0x0f;
	2292	k052109->charrombank[3] = (data >> 4) & 0x0f;
	2293
	2294	for (i = 0; i < 0x1800; i++)
	2295	{
	2296	int bank = (k052109->ram[i] & 0x0c) >> 2;
	2297	if ((bank == 2 && (dirty & 1)) || (bank == 3 && (dirty & 2)))
	2298	tilemap_mark_tile_dirty(k052109->tilemap[(i & 0x1800) >> 11],i & 0x7ff);
	2299	}
	2300	}
	2301	}
	2302	else if (offset >= 0x380c && offset < 0x3834)
	2303	{   /* B y scroll */   }
	2304	else if (offset >= 0x3a00 && offset < 0x3c00)
	2305	{   /* B x scroll */   }
	2306	else if (offset == 0x3d80) // Surprise Attack uses offset 0x3d80 in rom test
	2307	{
	2308	// mirroring this write, breaks Surprise Attack in game tilemaps
	2309	k052109->charrombank_2[0] = data & 0x0f;
	2310	k052109->charrombank_2[1] = (data >> 4) & 0x0f;
	2311	}
	2312	else if (offset == 0x3f00) // Surprise Attack uses offset 0x3f00 in rom test
	2313	{
	2314	// mirroring this write, breaks Surprise Attack in game tilemaps
	2315	k052109->charrombank_2[2] = data & 0x0f;
	2316	k052109->charrombank_2[3] = (data >> 4) & 0x0f;
	2317	}
	2318	//      else
	2319	//          logerror("%04x: write %02x to unknown 052109 address %04x\n",cpu_get_pc(space->cpu),data,offset);
	2320	}
	2321	}
	2322
	2323	READ16_DEVICE_HANDLER( k052109_word_r )
	2324	{
	2325	return k052109_r(device, offset + 0x2000) | (k052109_r(device, offset) << 8);
	2326	}
	2327
	2328	WRITE16_DEVICE_HANDLER( k052109_word_w )
	2329	{
	2330	if (ACCESSING_BITS_8_15)
	2331	k052109_w(device, offset, (data >> 8) & 0xff);
	2332	if (ACCESSING_BITS_0_7)
	2333	k052109_w(device, offset + 0x2000, data & 0xff);
	2334	}
	2335
	2336	READ16_DEVICE_HANDLER( k052109_lsb_r )
	2337	{
	2338	return k052109_r(device, offset);
	2339	}
	2340
	2341	WRITE16_DEVICE_HANDLER( k052109_lsb_w )
	2342	{
	2343	if(ACCESSING_BITS_0_7)
	2344	k052109_w(device, offset, data & 0xff);
	2345	}
	2346
	2347	void k052109_set_rmrd_line( const device_config *device, int state )
	2348	{
	2349	k052109_state *k052109 = k052109_get_safe_token(device);
	2350	k052109->RMRD_line = state;
	2351	}
	2352
	2353	int k052109_get_rmrd_line(const device_config *device )
	2354	{
	2355	k052109_state *k052109 = k052109_get_safe_token(device);
	2356	return k052109->RMRD_line;
	2357	}
	2358
	2359
	2360	void k052109_tilemap_mark_dirty( const device_config *device, int tmap_num )
	2361	{
	2362	k052109_state *k052109 = k052109_get_safe_token(device);
	2363	tilemap_mark_all_tiles_dirty(k052109->tilemap[tmap_num]);
	2364	}
	2365
	2366
	2367	void k052109_tilemap_update( const device_config *device )
	2368	{
	2369	k052109_state *k052109 = k052109_get_safe_token(device);
	2370	int xscroll, yscroll, offs;
	2371
	2372	#if 0
	2373	{
	2374	popmessage("%x %x %x %x",
	2375	k052109->charrombank[0],
	2376	k052109->charrombank[1],
	2377	k052109->charrombank[2],
	2378	k052109->charrombank[3]);
	2379	}
	2380	#endif
	2381
	2382	if ((k052109->scrollctrl & 0x03) == 0x02)
	2383	{
	2384	UINT8 *scrollram = &k052109->ram[0x1a00];
	2385
	2386	tilemap_set_scroll_rows(k052109->tilemap[1], 256);
	2387	tilemap_set_scroll_cols(k052109->tilemap[1], 1);
	2388	yscroll = k052109->ram[0x180c];
	2389	tilemap_set_scrolly(k052109->tilemap[1], 0, yscroll + k052109->dy[1]);
	2390	for (offs = 0; offs < 256; offs++)
	2391	{
	2392	xscroll = scrollram[2 * (offs & 0xfff8) + 0] + 256 * scrollram[2 * (offs & 0xfff8) + 1];
	2393	xscroll -= 6;
	2394	tilemap_set_scrollx(k052109->tilemap[1], (offs + yscroll) & 0xff, xscroll + k052109->dx[1]);
	2395	}
	2396	}
	2397	else if ((k052109->scrollctrl & 0x03) == 0x03)
	2398	{
	2399	UINT8 *scrollram = &k052109->ram[0x1a00];
	2400
	2401	tilemap_set_scroll_rows(k052109->tilemap[1], 256);
	2402	tilemap_set_scroll_cols(k052109->tilemap[1], 1);
	2403	yscroll = k052109->ram[0x180c];
	2404	tilemap_set_scrolly(k052109->tilemap[1], 0, yscroll + k052109->dy[1]);
	2405	for (offs = 0; offs < 256; offs++)
	2406	{
	2407	xscroll = scrollram[2 * offs + 0] + 256 * scrollram[2 * offs + 1];
	2408	xscroll -= 6;
	2409	tilemap_set_scrollx(k052109->tilemap[1], (offs + yscroll) & 0xff, xscroll + k052109->dx[1]);
	2410	}
	2411	}
	2412	else if ((k052109->scrollctrl & 0x04) == 0x04)
	2413	{
	2414	UINT8 *scrollram = &k052109->ram[0x1800];
	2415
	2416	tilemap_set_scroll_rows(k052109->tilemap[1], 1);
	2417	tilemap_set_scroll_cols(k052109->tilemap[1], 512);
	2418	xscroll = k052109->ram[0x1a00] + 256 * k052109->ram[0x1a01];
	2419	xscroll -= 6;
	2420	tilemap_set_scrollx(k052109->tilemap[1], 0, xscroll + k052109->dx[1]);
	2421	for (offs = 0; offs < 512; offs++)
	2422	{
	2423	yscroll = scrollram[offs / 8];
	2424	tilemap_set_scrolly(k052109->tilemap[1], (offs + xscroll) & 0x1ff, yscroll + k052109->dy[1]);
	2425	}
	2426	}
	2427	else
	2428	{
	2429	UINT8 *scrollram = &k052109->ram[0x1a00];
	2430
	2431	tilemap_set_scroll_rows(k052109->tilemap[1], 1);
	2432	tilemap_set_scroll_cols(k052109->tilemap[1], 1);
	2433	xscroll = scrollram[0] + 256 * scrollram[1];
	2434	xscroll -= 6;
	2435	yscroll = k052109->ram[0x180c];
	2436	tilemap_set_scrollx(k052109->tilemap[1], 0, xscroll + k052109->dx[1]);
	2437	tilemap_set_scrolly(k052109->tilemap[1], 0, yscroll + k052109->dy[1]);
	2438	}
	2439
	2440	if ((k052109->scrollctrl & 0x18) == 0x10)
	2441	{
	2442	UINT8 *scrollram = &k052109->ram[0x3a00];
	2443
	2444	tilemap_set_scroll_rows(k052109->tilemap[2], 256);
	2445	tilemap_set_scroll_cols(k052109->tilemap[2], 1);
	2446	yscroll = k052109->ram[0x380c];
	2447	tilemap_set_scrolly(k052109->tilemap[2], 0, yscroll + k052109->dy[2]);
	2448	for (offs = 0; offs < 256; offs++)
	2449	{
	2450	xscroll = scrollram[2 * (offs & 0xfff8) + 0] + 256 * scrollram[2 * (offs & 0xfff8) + 1];
	2451	xscroll -= 6;
	2452	tilemap_set_scrollx(k052109->tilemap[2], (offs + yscroll) & 0xff, xscroll + k052109->dx[2]);
	2453	}
	2454	}
	2455	else if ((k052109->scrollctrl & 0x18) == 0x18)
	2456	{
	2457	UINT8 *scrollram = &k052109->ram[0x3a00];
	2458
	2459	tilemap_set_scroll_rows(k052109->tilemap[2], 256);
	2460	tilemap_set_scroll_cols(k052109->tilemap[2], 1);
	2461	yscroll = k052109->ram[0x380c];
	2462	tilemap_set_scrolly(k052109->tilemap[2], 0, yscroll + k052109->dy[2]);
	2463	for (offs = 0; offs < 256; offs++)
	2464	{
	2465	xscroll = scrollram[2 * offs + 0] + 256 * scrollram[2 * offs + 1];
	2466	xscroll -= 6;
	2467	tilemap_set_scrollx(k052109->tilemap[2], (offs + yscroll) & 0xff, xscroll + k052109->dx[2]);
	2468	}
	2469	}
	2470	else if ((k052109->scrollctrl & 0x20) == 0x20)
	2471	{
	2472	UINT8 *scrollram = &k052109->ram[0x3800];
	2473
	2474	tilemap_set_scroll_rows(k052109->tilemap[2], 1);
	2475	tilemap_set_scroll_cols(k052109->tilemap[2], 512);
	2476	xscroll = k052109->ram[0x3a00] + 256 * k052109->ram[0x3a01];
	2477	xscroll -= 6;
	2478	tilemap_set_scrollx(k052109->tilemap[2], 0, xscroll + k052109->dx[2]);
	2479	for (offs = 0; offs < 512; offs++)
	2480	{
	2481	yscroll = scrollram[offs / 8];
	2482	tilemap_set_scrolly(k052109->tilemap[2], (offs + xscroll) & 0x1ff, yscroll + k052109->dy[2]);
	2483	}
	2484	}
	2485	else
	2486	{
	2487	UINT8 *scrollram = &k052109->ram[0x3a00];
	2488
	2489	tilemap_set_scroll_rows(k052109->tilemap[2], 1);
	2490	tilemap_set_scroll_cols(k052109->tilemap[2], 1);
	2491	xscroll = scrollram[0] + 256 * scrollram[1];
	2492	xscroll -= 6;
	2493	yscroll = k052109->ram[0x380c];
	2494	tilemap_set_scrollx(k052109->tilemap[2], 0, xscroll + k052109->dx[2]);
	2495	tilemap_set_scrolly(k052109->tilemap[2], 0, yscroll + k052109->dy[2]);
	2496	}
	2497
	2498	#if 0
	2499	if ((k052109->scrollctrl & 0x03) == 0x01 ||
	2500	(k052109->scrollctrl & 0x18) == 0x08 ||
	2501	((k052109->scrollctrl & 0x04) && (k052109->scrollctrl & 0x03)) ||
	2502	((k052109->scrollctrl & 0x20) && (k052109->scrollctrl & 0x18)) ||
	2503	(k052109->scrollctrl & 0xc0) != 0)
	2504	popmessage("scrollcontrol = %02x", k052109->scrollctrl);
	2505
	2506	if (input_code_pressed(machine, KEYCODE_F))
	2507	{
	2508	FILE *fp;
	2509	fp=fopen("TILE.DMP", "w+b");
	2510	if (fp)
	2511	{
	2512	fwrite(k052109->ram, 0x6000, 1, fp);
	2513	popmessage("saved");
	2514	fclose(fp);
	2515	}
	2516	}
	2517	#endif
	2518	}
	2519
	2520	void k052109_tilemap_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int tmap_num, UINT32 flags, UINT8 priority )
	2521	{
	2522	k052109_state *k052109 = k052109_get_safe_token(device);
	2523	tilemap_draw(bitmap, cliprect, k052109->tilemap[tmap_num], flags, priority);
	2524	}
	2525
	2526	int k052109_is_irq_enabled( const device_config *device )
	2527	{
	2528	k052109_state *k052109 = k052109_get_safe_token(device);
	2529
	2530	return k052109->irq_enabled;
	2531	}
	2532
	2533	void k052109_set_layer_offsets( const device_config *device, int layer, int dx, int dy )
	2534	{
	2535	k052109_state *k052109 = k052109_get_safe_token(device);
	2536
	2537	k052109->dx[layer] = dx;
	2538	k052109->dy[layer] = dy;
	2539	}
	2540
	2541
	2542	/***************************************************************************
	2543
	2544	Callbacks for the TileMap code
	2545
	2546	***************************************************************************/
	2547
	2548	/*
	2549	data format:
	2550	video RAM    xxxxxxxx  tile number (low 8 bits)
	2551	color RAM    xxxx----  depends on external connections (usually color and banking)
	2552	color RAM    ----xx--  bank select (0-3): these bits are replaced with the 2
	2553	bottom bits of the bank register before being placed on
	2554	the output pins. The other two bits of the bank register are
	2555	placed on the CAB1 and CAB2 output pins.
	2556	color RAM    ------xx  depends on external connections (usually banking, flip)
	2557	*/
	2558
	2559	INLINE void k052109_get_tile_info( const device_config *device, tile_data *tileinfo, int tile_index, int layer, UINT8 *cram, UINT8 *vram1, UINT8 *vram2 )
	2560	{
	2561	k052109_state *k052109 = k052109_get_safe_token(device);
	2562	int flipy = 0;
	2563	int code = vram1[tile_index] + 256 * vram2[tile_index];
	2564	int color = cram[tile_index];
	2565	int flags = 0;
	2566	int priority = 0;
	2567	int bank = k052109->charrombank[(color & 0x0c) >> 2];
	2568	if (k052109->has_extra_video_ram)
	2569	bank = (color & 0x0c) >> 2;   /* kludge for X-Men */
	2570
	2571	color = (color & 0xf3) | ((bank & 0x03) << 2);
	2572	bank >>= 2;
	2573
	2574	flipy = color & 0x02;
	2575
	2576	k052109->callback(device->machine, layer, bank, &code, &color, &flags, &priority);
	2577
	2578	/* if the callback set flip X but it is not enabled, turn it off */
	2579	if (!(k052109->tileflip_enable & 1))
	2580	flags &= ~TILE_FLIPX;
	2581
	2582	/* if flip Y is enabled and the attribute but is set, turn it on */
	2583	if (flipy && (k052109->tileflip_enable & 2))
	2584	flags |= TILE_FLIPY;
	2585
	2586	SET_TILE_INFO_DEVICE(
	2587	k052109->gfxnum,
	2588	code,
	2589	color,
	2590	flags);
	2591
	2592	tileinfo->category = priority;
	2593	}
	2594
	2595	static TILE_GET_INFO_DEVICE( k052109_get_tile_info0 )
	2596	{
	2597	k052109_state *k052109 = k052109_get_safe_token(device);
	2598	k052109_get_tile_info(device, tileinfo, tile_index, 0, k052109->colorram_F, k052109->videoram_F, k052109->videoram2_F);
	2599	}
	2600
	2601	static TILE_GET_INFO_DEVICE( k052109_get_tile_info1 )
	2602	{
	2603	k052109_state *k052109 = k052109_get_safe_token(device);
	2604	k052109_get_tile_info(device, tileinfo, tile_index, 1, k052109->colorram_A, k052109->videoram_A, k052109->videoram2_A);
	2605	}
	2606
	2607	static TILE_GET_INFO_DEVICE( k052109_get_tile_info2 )
	2608	{
	2609	k052109_state *k052109 = k052109_get_safe_token(device);
	2610	k052109_get_tile_info(device, tileinfo, tile_index, 2, k052109->colorram_B, k052109->videoram_B, k052109->videoram2_B);
	2611	}
	2612
	2613
	2614	//static STATE_POSTLOAD( k052109_tileflip_reset )
	2615	void k052109_postload_tileflip_reset( const device_config *device )
	2616	{
	2617	k052109_state *k052109 = k052109_get_safe_token(device);
	2618	int data = k052109->ram[0x1e80];
	2619	tilemap_set_flip(k052109->tilemap[0], (data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	2620	tilemap_set_flip(k052109->tilemap[1], (data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	2621	tilemap_set_flip(k052109->tilemap[2], (data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	2622	k052109->tileflip_enable = ((data & 0x06) >> 1);
	2623	}
	2624
	2625	static DEVICE_START( k052109 )
	2626	{
	2627	k052109_state *k052109 = k052109_get_safe_token(device);
	2628	const k052109_interface *intf = k052109_get_interface(device);
	2629	running_machine *machine = device->machine;
	2630	UINT32 total;
	2631	static const gfx_layout charlayout =
	2632	{
	2633	8,8,
	2634	0,
	2635	4,
	2636	{ 24, 16, 8, 0 },
	2637	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	2638	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
	2639	32*8
	2640	};
	2641	static const gfx_layout charlayout_gradius3 =
	2642	{
	2643	8,8,
	2644	0,
	2645	4,
	2646	{ 0, 1, 2, 3 },
	2647	{ XOR(0)*4, XOR(1)*4, XOR(2)*4, XOR(3)*4, XOR(4)*4, XOR(5)*4, XOR(6)*4, XOR(7)*4 },
	2648	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
	2649	32*8
	2650	};
	2651
	2652
	2653	/* decode the graphics */
	2654	switch (intf->plane_order)
	2655	{
	2656	case NORMAL_PLANE_ORDER:
	2657	total = memory_region_length(machine, intf->gfx_memory_region) / 32;
	2658	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout, 4);
	2659	break;
	2660
	2661	case GRADIUS3_PLANE_ORDER:
	2662	total = 0x1000;
	2663	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout_gradius3, 4);
	2664	break;
	2665
	2666	default:
	2667	fatalerror("Unsupported plane_order");
	2668	}
	2669
	2670	/* deinterleave the graphics, if needed */
	2671	deinterleave_gfx(machine, intf->gfx_memory_region, intf->deinterleave);
	2672
	2673	k052109->memory_region = intf->gfx_memory_region;
	2674	k052109->gfxnum = intf->gfx_num;
	2675	k052109->callback = intf->callback;
	2676
	2677	k052109->tilemap[0] = tilemap_create_device(device, k052109_get_tile_info0, tilemap_scan_rows, 8, 8, 64, 32);
	2678	k052109->tilemap[1] = tilemap_create_device(device, k052109_get_tile_info1, tilemap_scan_rows, 8, 8, 64, 32);
	2679	k052109->tilemap[2] = tilemap_create_device(device, k052109_get_tile_info2, tilemap_scan_rows, 8, 8, 64, 32);
	2680
	2681	k052109->ram = auto_alloc_array(machine, UINT8, 0x6000);
	2682
	2683	k052109->colorram_F = &k052109->ram[0x0000];
	2684	k052109->colorram_A = &k052109->ram[0x0800];
	2685	k052109->colorram_B = &k052109->ram[0x1000];
	2686	k052109->videoram_F = &k052109->ram[0x2000];
	2687	k052109->videoram_A = &k052109->ram[0x2800];
	2688	k052109->videoram_B = &k052109->ram[0x3000];
	2689	k052109->videoram2_F = &k052109->ram[0x4000];
	2690	k052109->videoram2_A = &k052109->ram[0x4800];
	2691	k052109->videoram2_B = &k052109->ram[0x5000];
	2692
	2693	tilemap_set_transparent_pen(k052109->tilemap[0], 0);
	2694	tilemap_set_transparent_pen(k052109->tilemap[1], 0);
	2695	tilemap_set_transparent_pen(k052109->tilemap[2], 0);
	2696
	2697	state_save_register_device_item_pointer(device, 0, k052109->ram, 0x6000);
	2698	state_save_register_device_item(device, 0, k052109->RMRD_line);
	2699	state_save_register_device_item(device, 0, k052109->romsubbank);
	2700	state_save_register_device_item(device, 0, k052109->scrollctrl);
	2701	state_save_register_device_item(device, 0, k052109->irq_enabled);
	2702	state_save_register_device_item_array(device, 0, k052109->charrombank);
	2703	state_save_register_device_item_array(device, 0, k052109->charrombank_2);
	2704	state_save_register_device_item_array(device, 0, k052109->dx);
	2705	state_save_register_device_item_array(device, 0, k052109->dy);
	2706	state_save_register_device_item(device, 0, k052109->has_extra_video_ram);
	2707
	2708	//  state_save_register_postload(machine, k052109_tileflip_reset, NULL);    // to be moved into the drivers
	2709	}
	2710
	2711	static DEVICE_RESET( k052109 )
	2712	{
	2713	k052109_state *k052109 = k052109_get_safe_token(device);
	2714	int i;
	2715
	2716	k052109->RMRD_line = CLEAR_LINE;
	2717	k052109->irq_enabled = 0;
	2718
	2719	k052109->has_extra_video_ram = 0;
	2720
	2721	for (i = 0; i < 3; i++)
	2722	k052109->dx[i] = k052109->dy[i] = 0;
	2723	}
	2724
	2725
	2726	/***************************************************************************/
	2727	/*                                                                         */
	2728	/*                                 051960                                  */
	2729	/*                                                                         */
	2730	/***************************************************************************/
	2731
	2732	typedef struct _k051960_state k051960_state;
	2733	struct _k051960_state
	2734	{
	2735	UINT8    *ram;
	2736
	2737	gfx_element *gfx;
	2738
	2739	UINT8    spriterombank[3];
	2740	int      dx, dy;
	2741	int      romoffset;
	2742	int      spriteflip, readroms;
	2743	int      irq_enabled, nmi_enabled;
	2744
	2745	int      k051937_counter;
	2746
	2747	k051960_callback callback;
	2748
	2749	const char *memory_region;
	2750	};
	2751
	2752
	2753	/*****************************************************************************
	2754	INLINE FUNCTIONS
	2755	*****************************************************************************/
	2756
	2757	INLINE k051960_state *k051960_get_safe_token( const device_config *device )
	2758	{
	2759	assert(device != NULL);
	2760	assert(device->token != NULL);
	2761	assert(device->type == K051960);
	2762
	2763	return (k051960_state *)device->token;
	2764	}
	2765
	2766	INLINE const k051960_interface *k051960_get_interface( const device_config *device )
	2767	{
	2768	assert(device != NULL);
	2769	assert((device->type == K051960));
	2770	return (const k051960_interface *) device->static_config;
	2771	}
	2772
	2773	/*****************************************************************************
	2774	DEVICE HANDLERS
	2775	*****************************************************************************/
	2776
	2777	static int k051960_fetchromdata( const device_config *device, int byte )
	2778	{
	2779	k051960_state *k051960 = k051960_get_safe_token(device);
	2780	int code, color, pri, shadow, off1, addr;
	2781
	2782	addr = k051960->romoffset + (k051960->spriterombank[0] << 8) + ((k051960->spriterombank[1] & 0x03) << 16);
	2783	code = (addr & 0x3ffe0) >> 5;
	2784	off1 = addr & 0x1f;
	2785	color = ((k051960->spriterombank[1] & 0xfc) >> 2) + ((k051960->spriterombank[2] & 0x03) << 6);
	2786	pri = 0;
	2787	shadow = color & 0x80;
	2788	k051960->callback(device->machine, &code, &color, &pri, &shadow);
	2789
	2790	addr = (code << 7) | (off1 << 2) | byte;
	2791	addr &= memory_region_length(device->machine, k051960->memory_region) - 1;
	2792
	2793	//  popmessage("%s: addr %06x", cpuexec_describe_context(device->machine), addr);
	2794
	2795	return memory_region(device->machine, k051960->memory_region)[addr];
	2796	}
	2797
	2798	READ8_DEVICE_HANDLER( k051960_r )
	2799	{
	2800	k051960_state *k051960 = k051960_get_safe_token(device);
	2801	if (k051960->readroms)
	2802	{
	2803	/* the 051960 remembers the last address read and uses it when reading the sprite ROMs */
	2804	k051960->romoffset = (offset & 0x3fc) >> 2;
	2805	return k051960_fetchromdata(device, offset & 3);   /* only 88 Games reads the ROMs from here */
	2806	}
	2807	else
	2808	return k051960->ram[offset];
	2809	}
	2810
	2811	WRITE8_DEVICE_HANDLER( k051960_w )
	2812	{
	2813	k051960_state *k051960 = k051960_get_safe_token(device);
	2814	k051960->ram[offset] = data;
	2815	}
	2816
	2817	READ16_DEVICE_HANDLER( k051960_word_r )
	2818	{
	2819	return k051960_r(device, offset * 2 + 1) | (k051960_r(device, offset * 2) << 8);
	2820	}
	2821
	2822	WRITE16_DEVICE_HANDLER( k051960_word_w )
	2823	{
	2824	if (ACCESSING_BITS_8_15)
	2825	k051960_w(device, offset * 2, (data >> 8) & 0xff);
	2826	if (ACCESSING_BITS_0_7)
	2827	k051960_w(device, offset * 2 + 1, data & 0xff);
	2828	}
	2829
	2830
	2831	/* should this be split by k051960? */
	2832	READ8_DEVICE_HANDLER( k051937_r )
	2833	{
	2834	k051960_state *k051960 = k051960_get_safe_token(device);
	2835
	2836	if (k051960->readroms && offset >= 4 && offset < 8)
	2837	return k051960_fetchromdata(device, offset & 3);
	2838	else
	2839	{
	2840	if (offset == 0)
	2841	{
	2842	/* some games need bit 0 to pulse */
	2843	return (k051960->k051937_counter++) & 1;
	2844	}
	2845	//logerror("%04x: read unknown 051937 address %x\n", cpu_get_pc(device->cpu), offset);
	2846	return 0;
	2847	}
	2848	}
	2849
	2850	WRITE8_DEVICE_HANDLER( k051937_w )
	2851	{
	2852	k051960_state *k051960 = k051960_get_safe_token(device);
	2853
	2854	if (offset == 0)
	2855	{
	2856
	2857	//if (data & 0xc2) popmessage("051937 reg 00 = %02x",data);
	2858
	2859	/* bit 0 is IRQ enable */
	2860	k051960->irq_enabled = data & 0x01;
	2861
	2862	/* bit 1: probably FIRQ enable */
	2863
	2864	/* bit 2 is NMI enable */
	2865	k051960->nmi_enabled = data & 0x04;
	2866
	2867	/* bit 3 = flip screen */
	2868	k051960->spriteflip = data & 0x08;
	2869
	2870	/* bit 4 used by Devastators and TMNT, unknown */
	2871
	2872	/* bit 5 = enable gfx ROM reading */
	2873	k051960->readroms = data & 0x20;
	2874	//logerror("%04x: write %02x to 051937 address %x\n", cpu_get_pc(machine->cpu), data, offset);
	2875	}
	2876	else if (offset == 1)
	2877	{
	2878	//  popmessage("%04x: write %02x to 051937 address %x", cpu_get_pc(machine->cpu), data, offset);
	2879	//logerror("%04x: write %02x to unknown 051937 address %x\n", cpu_get_pc(machine->cpu), data, offset);
	2880	}
	2881	else if (offset >= 2 && offset < 5)
	2882	{
	2883	k051960->spriterombank[offset - 2] = data;
	2884	}
	2885	else
	2886	{
	2887	//  popmessage("%04x: write %02x to 051937 address %x", cpu_get_pc(machine->cpu), data, offset);
	2888	//logerror("%04x: write %02x to unknown 051937 address %x\n", cpu_get_pc(machine->cpu), data, offset);
	2889	}
	2890	}
	2891
	2892	int k051960_is_irq_enabled( const device_config *device )
	2893	{
	2894	k051960_state *k051960 = k051960_get_safe_token(device);
	2895	return k051960->irq_enabled;
	2896	}
	2897
	2898	int k051960_is_nmi_enabled( const device_config *device )
	2899	{
	2900	k051960_state *k051960 = k051960_get_safe_token(device);
	2901	return k051960->nmi_enabled;
	2902	}
	2903
	2904	void k051960_set_sprite_offsets( const device_config *device, int dx, int dy )
	2905	{
	2906	k051960_state *k051960 = k051960_get_safe_token(device);
	2907	k051960->dx = dx;
	2908	k051960->dy = dy;
	2909	}
	2910
	2911
	2912	READ16_DEVICE_HANDLER( k051937_word_r )
	2913	{
	2914	return k051937_r(device, offset * 2 + 1) | (k051937_r(device, offset * 2) << 8);
	2915	}
	2916
	2917	WRITE16_DEVICE_HANDLER( k051937_word_w )
	2918	{
	2919	if (ACCESSING_BITS_8_15)
	2920	k051937_w(device, offset * 2,(data >> 8) & 0xff);
	2921	if (ACCESSING_BITS_0_7)
	2922	k051937_w(device, offset * 2 + 1,data & 0xff);
	2923	}
	2924
	2925	/*
	2926	* Sprite Format
	2927	* ------------------
	2928	*
	2929	* Byte | Bit(s)   | Use
	2930	* -----+-76543210-+----------------
	2931	*   0  | x------- | active (show this sprite)
	2932	*   0  | -xxxxxxx | priority order
	2933	*   1  | xxx----- | sprite size (see below)
	2934	*   1  | ---xxxxx | sprite code (high 5 bits)
	2935	*   2  | xxxxxxxx | sprite code (low 8 bits)
	2936	*   3  | xxxxxxxx | "color", but depends on external connections (see below)
	2937	*   4  | xxxxxx-- | zoom y (0 = normal, >0 = shrink)
	2938	*   4  | ------x- | flip y
	2939	*   4  | -------x | y position (high bit)
	2940	*   5  | xxxxxxxx | y position (low 8 bits)
	2941	*   6  | xxxxxx-- | zoom x (0 = normal, >0 = shrink)
	2942	*   6  | ------x- | flip x
	2943	*   6  | -------x | x position (high bit)
	2944	*   7  | xxxxxxxx | x position (low 8 bits)
	2945	*
	2946	* Example of "color" field for Punk Shot:
	2947	*   3  | x------- | shadow
	2948	*   3  | -xx----- | priority
	2949	*   3  | ---x---- | use second gfx ROM bank
	2950	*   3  | ----xxxx | color code
	2951	*
	2952	* shadow enables transparent shadows. Note that it applies to pen 0x0f ONLY.
	2953	* The rest of the sprite remains normal.
	2954	* Note that Aliens also uses the shadow bit to select the second sprite bank.
	2955	*/
	2956
	2957	void k051960_sprites_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int min_priority, int max_priority )
	2958	{
	2959	#define NUM_SPRITES 128
	2960	k051960_state *k051960 = k051960_get_safe_token(device);
	2961	running_machine *machine = device->machine;
	2962	int offs, pri_code;
	2963	int sortedlist[NUM_SPRITES];
	2964	UINT8 drawmode_table[256];
	2965
	2966	memset(drawmode_table, DRAWMODE_SOURCE, sizeof(drawmode_table));
	2967	drawmode_table[0] = DRAWMODE_NONE;
	2968
	2969	for (offs = 0; offs < NUM_SPRITES; offs++)
	2970	sortedlist[offs] = -1;
	2971
	2972	/* prebuild a sorted table */
	2973	for (offs = 0; offs < 0x400; offs += 8)
	2974	{
	2975	if (k051960->ram[offs] & 0x80)
	2976	{
	2977	if (max_priority == -1)   /* draw front to back when using priority buffer */
	2978	sortedlist[(k051960->ram[offs] & 0x7f) ^ 0x7f] = offs;
	2979	else
	2980	sortedlist[k051960->ram[offs] & 0x7f] = offs;
	2981	}
	2982	}
	2983
	2984	for (pri_code = 0; pri_code < NUM_SPRITES; pri_code++)
	2985	{
	2986	int ox, oy, code, color, pri, shadow, size, w, h, x, y, flipx, flipy, zoomx, zoomy;
	2987	/* sprites can be grouped up to 8x8. The draw order is
	2988	0  1  4  5 16 17 20 21
	2989	2  3  6  7 18 19 22 23
	2990	8  9 12 13 24 25 28 29
	2991	10 11 14 15 26 27 30 31
	2992	32 33 36 37 48 49 52 53
	2993	34 35 38 39 50 51 54 55
	2994	40 41 44 45 56 57 60 61
	2995	42 43 46 47 58 59 62 63
	2996	*/
	2997	static const int xoffset[8] = { 0, 1, 4, 5, 16, 17, 20, 21 };
	2998	static const int yoffset[8] = { 0, 2, 8, 10, 32, 34, 40, 42 };
	2999	static const int width[8] =  { 1, 2, 1, 2, 4, 2, 4, 8 };
	3000	static const int height[8] = { 1, 1, 2, 2, 2, 4, 4, 8 };
	3001
	3002	offs = sortedlist[pri_code];
	3003	if (offs == -1)
	3004	continue;
	3005
	3006	code = k051960->ram[offs + 2] + ((k051960->ram[offs + 1] & 0x1f) << 8);
	3007	color = k051960->ram[offs + 3] & 0xff;
	3008	pri = 0;
	3009	shadow = color & 0x80;
	3010	k051960->callback(device->machine, &code, &color, &pri, &shadow);
	3011
	3012	if (max_priority != -1)
	3013	if (pri < min_priority || pri > max_priority)
	3014	continue;
	3015
	3016	size = (k051960->ram[offs + 1] & 0xe0) >> 5;
	3017	w = width[size];
	3018	h = height[size];
	3019
	3020	if (w >= 2) code &= ~0x01;
	3021	if (h >= 2) code &= ~0x02;
	3022	if (w >= 4) code &= ~0x04;
	3023	if (h >= 4) code &= ~0x08;
	3024	if (w >= 8) code &= ~0x10;
	3025	if (h >= 8) code &= ~0x20;
	3026
	3027	ox = (256 * k051960->ram[offs + 6] + k051960->ram[offs + 7]) & 0x01ff;
	3028	oy = 256 - ((256 * k051960->ram[offs + 4] + k051960->ram[offs + 5]) & 0x01ff);
	3029	ox += k051960->dx;
	3030	oy += k051960->dy;
	3031	flipx = k051960->ram[offs + 6] & 0x02;
	3032	flipy = k051960->ram[offs + 4] & 0x02;
	3033	zoomx = (k051960->ram[offs + 6] & 0xfc) >> 2;
	3034	zoomy = (k051960->ram[offs + 4] & 0xfc) >> 2;
	3035	zoomx = 0x10000 / 128 * (128 - zoomx);
	3036	zoomy = 0x10000 / 128 * (128 - zoomy);
	3037
	3038	if (k051960->spriteflip)
	3039	{
	3040	ox = 512 - (zoomx * w >> 12) - ox;
	3041	oy = 256 - (zoomy * h >> 12) - oy;
	3042	flipx = !flipx;
	3043	flipy = !flipy;
	3044	}
	3045
	3046	drawmode_table[k051960->gfx->color_granularity - 1] = shadow ? DRAWMODE_SHADOW : DRAWMODE_SOURCE;
	3047
	3048	if (zoomx == 0x10000 && zoomy == 0x10000)
	3049	{
	3050	int sx, sy;
	3051
	3052	for (y = 0; y < h; y++)
	3053	{
	3054	sy = oy + 16 * y;
	3055
	3056	for (x = 0; x < w; x++)
	3057	{
	3058	int c = code;
	3059
	3060	sx = ox + 16 * x;
	3061	if (flipx)
	3062	c += xoffset[(w - 1 - x)];
	3063	else
	3064	c += xoffset[x];
	3065
	3066	if (flipy)
	3067	c += yoffset[(h - 1 - y)];
	3068	else
	3069	c += yoffset[y];
	3070
	3071	if (max_priority == -1)
	3072	pdrawgfx_transtable(bitmap,cliprect,k051960->gfx,
	3073	c,
	3074	color,
	3075	flipx,flipy,
	3076	sx & 0x1ff,sy,
	3077	machine->priority_bitmap,pri,
	3078	drawmode_table,machine->shadow_table);
	3079	else
	3080	drawgfx_transtable(bitmap,cliprect,k051960->gfx,
	3081	c,
	3082	color,
	3083	flipx,flipy,
	3084	sx & 0x1ff,sy,
	3085	drawmode_table,machine->shadow_table);
	3086	}
	3087	}
	3088	}
	3089	else
	3090	{
	3091	int sx, sy, zw, zh;
	3092
	3093	for (y = 0; y < h; y++)
	3094	{
	3095	sy = oy + ((zoomy * y + (1 << 11)) >> 12);
	3096	zh = (oy + ((zoomy * (y + 1) + (1 << 11)) >> 12)) - sy;
	3097
	3098	for (x = 0; x < w; x++)
	3099	{
	3100	int c = code;
	3101
	3102	sx = ox + ((zoomx * x + (1 << 11)) >> 12);
	3103	zw = (ox + ((zoomx * (x+1) + (1 << 11)) >> 12)) - sx;
	3104	if (flipx)
	3105	c += xoffset[(w - 1 - x)];
	3106	else
	3107	c += xoffset[x];
	3108
	3109	if (flipy)
	3110	c += yoffset[(h - 1 - y)];
	3111	else
	3112	c += yoffset[y];
	3113
	3114	if (max_priority == -1)
	3115	pdrawgfxzoom_transtable(bitmap,cliprect,k051960->gfx,
	3116	c,
	3117	color,
	3118	flipx,flipy,
	3119	sx & 0x1ff,sy,
	3120	(zw << 16) / 16,(zh << 16) / 16,
	3121	machine->priority_bitmap,pri,
	3122	drawmode_table,machine->shadow_table);
	3123	else
	3124	drawgfxzoom_transtable(bitmap,cliprect,k051960->gfx,
	3125	c,
	3126	color,
	3127	flipx,flipy,
	3128	sx & 0x1ff,sy,
	3129	(zw << 16) / 16,(zh << 16) / 16,
	3130	drawmode_table,machine->shadow_table);
	3131	}
	3132	}
	3133	}
	3134	}
	3135	#if 0
	3136	if (input_code_pressed(machine, KEYCODE_D))
	3137	{
	3138	FILE *fp;
	3139	fp=fopen("SPRITE.DMP", "w+b");
	3140	if (fp)
	3141	{
	3142	fwrite(k051960_ram, 0x400, 1, fp);
	3143	popmessage("saved");
	3144	fclose(fp);
	3145	}
	3146	}
	3147	#endif
	3148	#undef NUM_SPRITES
	3149	}
	3150
	3151	/*****************************************************************************
	3152	DEVICE INTERFACE
	3153	*****************************************************************************/
	3154
	3155	static DEVICE_START( k051960 )
	3156	{
	3157	k051960_state *k051960 = k051960_get_safe_token(device);
	3158	const k051960_interface *intf = k051960_get_interface(device);
	3159	running_machine *machine = device->machine;
	3160	UINT32 total;
	3161	static const gfx_layout spritelayout =
	3162	{
	3163	16,16,
	3164	0,
	3165	4,
	3166	{ 0, 8, 16, 24 },
	3167	{ 0, 1, 2, 3, 4, 5, 6, 7,
	3168	8*32+0, 8*32+1, 8*32+2, 8*32+3, 8*32+4, 8*32+5, 8*32+6, 8*32+7 },
	3169	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
	3170	16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32 },
	3171	128*8
	3172	};
	3173	static const gfx_layout spritelayout_reverse =
	3174	{
	3175	16,16,
	3176	0,
	3177	4,
	3178	{ 24, 16, 8, 0 },
	3179	{ 0, 1, 2, 3, 4, 5, 6, 7,
	3180	8*32+0, 8*32+1, 8*32+2, 8*32+3, 8*32+4, 8*32+5, 8*32+6, 8*32+7 },
	3181	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
	3182	16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32 },
	3183	128*8
	3184	};
	3185	static const gfx_layout spritelayout_gradius3 =
	3186	{
	3187	16,16,
	3188	0,
	3189	4,
	3190	{ 0, 1, 2, 3 },
	3191	{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4,
	3192	32*8+2*4, 32*8+3*4, 32*8+0*4, 32*8+1*4, 32*8+6*4, 32*8+7*4, 32*8+4*4, 32*8+5*4 },
	3193	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
	3194	64*8+0*32, 64*8+1*32, 64*8+2*32, 64*8+3*32, 64*8+4*32, 64*8+5*32, 64*8+6*32, 64*8+7*32 },
	3195	128*8
	3196	};
	3197
	3198	/* decode the graphics */
	3199	switch (intf->plane_order)
	3200	{
	3201	case NORMAL_PLANE_ORDER:
	3202	total = memory_region_length(machine, intf->gfx_memory_region) / 128;
	3203	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &spritelayout, 4);
	3204	break;
	3205
	3206	case REVERSE_PLANE_ORDER:
	3207	total = memory_region_length(machine, intf->gfx_memory_region) / 128;
	3208	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &spritelayout_reverse, 4);
	3209	break;
	3210
	3211	case GRADIUS3_PLANE_ORDER:
	3212	total = 0x4000;
	3213	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &spritelayout_gradius3, 4);
	3214	break;
	3215
	3216	default:
	3217	fatalerror("Unknown plane_order");
	3218	}
	3219
	3220	if (VERBOSE && !(machine->config->video_attributes & VIDEO_HAS_SHADOWS))
	3221	popmessage("driver should use VIDEO_HAS_SHADOWS");
	3222
	3223	/* deinterleave the graphics, if needed */
	3224	deinterleave_gfx(machine, intf->gfx_memory_region, intf->deinterleave);
	3225
	3226	k051960->memory_region = intf->gfx_memory_region;
	3227	k051960->gfx = machine->gfx[intf->gfx_num];
	3228	k051960->callback = intf->callback;
	3229	k051960->ram = auto_alloc_array_clear(machine, UINT8, 0x400);
	3230
	3231	state_save_register_device_item(device, 0, k051960->romoffset);
	3232	state_save_register_device_item(device, 0, k051960->spriteflip);
	3233	state_save_register_device_item(device, 0, k051960->readroms);
	3234	state_save_register_device_item_array(device, 0, k051960->spriterombank);
	3235	state_save_register_device_item_pointer(device, 0, k051960->ram, 0x400);
	3236	state_save_register_device_item(device, 0, k051960->irq_enabled);
	3237	state_save_register_device_item(device, 0, k051960->nmi_enabled);
	3238	state_save_register_device_item(device, 0, k051960->dx);
	3239	state_save_register_device_item(device, 0, k051960->dy);
	3240
	3241	state_save_register_device_item(device, 0, k051960->k051937_counter);
	3242	}
	3243
	3244	static DEVICE_RESET( k051960 )
	3245	{
	3246	k051960_state *k051960 = k051960_get_safe_token(device);
	3247
	3248	k051960->dx = k051960->dy = 0;
	3249	k051960->k051937_counter = 0;
	3250	}
	3251
	3252
	3253	#if 0 // to be moved in the specific drivers!
	3254	READ8_DEVICE_HANDLER( k052109_051960_r )
	3255	{
	3256	if (k052109_RMRD_line == CLEAR_LINE)
	3257	{
	3258	if (offset >= 0x3800 && offset < 0x3808)
	3259	return k051937_r(space,offset - 0x3800);
	3260	else if (offset < 0x3c00)
	3261	return k052109_r(space,offset);
	3262	else
	3263	return k051960_r(space,offset - 0x3c00);
	3264	}
	3265	else return k052109_r(space,offset);
	3266	}
	3267
	3268	WRITE8_DEVICE_HANDLER( k052109_051960_w )
	3269	{
	3270	if (offset >= 0x3800 && offset < 0x3808)
	3271	k051937_w(space,offset - 0x3800,data);
	3272	else if (offset < 0x3c00)
	3273	k052109_w(space,offset,data);
	3274	else
	3275	k051960_w(space,offset - 0x3c00,data);
	3276	}
	3277	#endif
	3278
	3279
	3280	/***************************************************************************/
	3281	/*                                                                         */
	3282	/*                      05324x Family Sprite Generators                    */
	3283	/*                                                                         */
	3284	/***************************************************************************/
	3285
	3286	/***************************************************************************/
	3287	/*                                                                         */
	3288	/*                         053244 / 053245                                 */
	3289	/*                                                                         */
	3290	/***************************************************************************/
	3291
	3292	typedef struct _k05324x_state k05324x_state;
	3293	struct _k05324x_state
	3294	{
	3295	UINT16    *ram;
	3296	UINT16    *buffer;
	3297
	3298	gfx_element *gfx;
	3299
	3300	UINT8    regs[0x10];   // 053244
	3301	int      dx, dy;
	3302	int      rombank;      // 053244
	3303	int      ramsize;
	3304	int      z_rejection;
	3305
	3306	k05324x_callback callback;
	3307
	3308	const char *memory_region;
	3309	};
	3310
	3311
	3312	/*****************************************************************************
	3313	INLINE FUNCTIONS
	3314	*****************************************************************************/
	3315
	3316	INLINE k05324x_state *k05324x_get_safe_token( const device_config *device )
	3317	{
	3318	assert(device != NULL);
	3319	assert(device->token != NULL);
	3320	assert((device->type == K053244 || device->type == K053245));
	3321
	3322	return (k05324x_state *)device->token;
	3323	}
	3324
	3325	INLINE const k05324x_interface *k05324x_get_interface( const device_config *device )
	3326	{
	3327	assert(device != NULL);
	3328	assert((device->type == K053244 || device->type == K053245));
	3329	return (const k05324x_interface *) device->static_config;
	3330	}
	3331
	3332	/*****************************************************************************
	3333	DEVICE HANDLERS
	3334	*****************************************************************************/
	3335
	3336	void k053245_set_sprite_offs( const device_config *device, int offsx, int offsy )
	3337	{
	3338	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3339	k053245->dx = offsx;
	3340	k053245->dy = offsy;
	3341	}
	3342
	3343	READ16_DEVICE_HANDLER( k053245_word_r )
	3344	{
	3345	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3346	return k053245->ram[offset];
	3347	}
	3348
	3349	WRITE16_DEVICE_HANDLER( k053245_word_w )
	3350	{
	3351	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3352	COMBINE_DATA(k053245->ram + offset);
	3353	}
	3354
	3355	READ8_DEVICE_HANDLER( k053245_r )
	3356	{
	3357	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3358
	3359	if(offset & 1)
	3360	return k053245->ram[offset >> 1] & 0xff;
	3361	else
	3362	return (k053245->ram[offset >> 1] >> 8) & 0xff;
	3363	}
	3364
	3365
	3366	WRITE8_DEVICE_HANDLER( k053245_w )
	3367	{
	3368	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3369
	3370	if(offset & 1)
	3371	k053245->ram[offset >> 1] = (k053245->ram[offset >> 1] & 0xff00) | data;
	3372	else
	3373	k053245->ram[offset >> 1] = (k053245->ram[offset >> 1] & 0x00ff) | (data << 8);
	3374	}
	3375
	3376	void k053245_clear_buffer( const device_config *device )
	3377	{
	3378	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3379	int i, e;
	3380
	3381	for (e = k053245->ramsize / 2, i = 0; i < e; i += 8)
	3382	k053245->buffer[i] = 0;
	3383	}
	3384
	3385	INLINE void k053245_update_buffer( const device_config *device )
	3386	{
	3387	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3388	memcpy(k053245->buffer, k053245->ram, k053245->ramsize);
	3389	}
	3390
	3391	READ8_DEVICE_HANDLER( k053244_r )
	3392	{
	3393	k05324x_state *k053244 = k05324x_get_safe_token(device);
	3394	running_machine *machine = device->machine;
	3395
	3396	if ((k053244->regs[5] & 0x10) && offset >= 0x0c && offset < 0x10)
	3397	{
	3398	int addr;
	3399
	3400	addr = (k053244->rombank << 19) | ((k053244->regs[11] & 0x7) << 18)
	3401	| (k053244->regs[8] << 10) | (k053244->regs[9] << 2)
	3402	| ((offset & 3) ^ 1);
	3403	addr &= memory_region_length(machine, k053244->memory_region) - 1;
	3404
	3405	//  popmessage("%s: offset %02x addr %06x", cpuexec_describe_context(machine), offset & 3, addr);
	3406
	3407	return memory_region(machine, k053244->memory_region)[addr];
	3408	}
	3409	else if (offset == 0x06)
	3410	{
	3411	k053245_update_buffer(device);
	3412	return 0;
	3413	}
	3414	else
	3415	{
	3416	//logerror("%s: read from unknown 053244 address %x\n", cpuexec_describe_context(machine), offset);
	3417	return 0;
	3418	}
	3419	}
	3420
	3421	WRITE8_DEVICE_HANDLER( k053244_w )
	3422	{
	3423	k05324x_state *k053244 = k05324x_get_safe_token(device);
	3424
	3425	k053244->regs[offset] = data;
	3426
	3427	switch(offset)
	3428	{
	3429	case 0x05:
	3430	//      if (data & 0xc8)
	3431	//          popmessage("053244 reg 05 = %02x",data);
	3432	/* bit 2 = unknown, Parodius uses it */
	3433	/* bit 5 = unknown, Rollergames uses it */
	3434	//      logerror("%s: write %02x to 053244 address 5\n", cpuexec_describe_context(device->machine), data);
	3435	break;
	3436
	3437	case 0x06:
	3438	k053245_update_buffer(device);
	3439	break;
	3440	}
	3441	}
	3442
	3443
	3444	READ16_DEVICE_HANDLER( k053244_lsb_r )
	3445	{
	3446	return k053244_r(device, offset);
	3447	}
	3448
	3449	WRITE16_DEVICE_HANDLER( k053244_lsb_w )
	3450	{
	3451	if (ACCESSING_BITS_0_7)
	3452	k053244_w(device, offset, data & 0xff);
	3453	}
	3454
	3455	READ16_DEVICE_HANDLER( k053244_word_r )
	3456	{
	3457	return (k053244_r(device, offset * 2) << 8) | k053244_r(device, offset * 2 + 1);
	3458	}
	3459
	3460	WRITE16_DEVICE_HANDLER( k053244_word_w )
	3461	{
	3462	if (ACCESSING_BITS_8_15)
	3463	k053244_w(device, offset * 2, (data >> 8) & 0xff);
	3464	if (ACCESSING_BITS_0_7)
	3465	k053244_w(device, offset * 2 + 1, data & 0xff);
	3466	}
	3467
	3468	void k053244_bankselect( const device_config *device, int bank )
	3469	{
	3470	k05324x_state *k053244 = k05324x_get_safe_token(device);
	3471	k053244->rombank = bank;
	3472	}
	3473
	3474	/*
	3475	* Sprite Format
	3476	* ------------------
	3477	*
	3478	* Word | Bit(s)           | Use
	3479	* -----+-fedcba9876543210-+----------------
	3480	*   0  | x--------------- | active (show this sprite)
	3481	*   0  | -x-------------- | maintain aspect ratio (when set, zoom y acts on both axis)
	3482	*   0  | --x------------- | flip y
	3483	*   0  | ---x------------ | flip x
	3484	*   0  | ----xxxx-------- | sprite size (see below)
	3485	*   0  | ---------xxxxxxx | priority order
	3486	*   1  | --xxxxxxxxxxxxxx | sprite code. We use an additional bit in TMNT2, but this is
	3487	*                           probably not accurate (protection related so we can't verify)
	3488	*   2  | ------xxxxxxxxxx | y position
	3489	*   3  | ------xxxxxxxxxx | x position
	3490	*   4  | xxxxxxxxxxxxxxxx | zoom y (0x40 = normal, <0x40 = enlarge, >0x40 = reduce)
	3491	*   5  | xxxxxxxxxxxxxxxx | zoom x (0x40 = normal, <0x40 = enlarge, >0x40 = reduce)
	3492	*   6  | ------x--------- | mirror y (top half is drawn as mirror image of the bottom)
	3493	*   6  | -------x-------- | mirror x (right half is drawn as mirror image of the left)
	3494	*   6  | --------x------- | shadow
	3495	*   6  | ---------xxxxxxx | "color", but depends on external connections
	3496	*   7  | ---------------- |
	3497	*
	3498	* shadow enables transparent shadows. Note that it applies to pen 0x0f ONLY.
	3499	* The rest of the sprite remains normal.
	3500	*/
	3501
	3502	void k053245_sprites_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect )
	3503	{
	3504	#define NUM_SPRITES 128
	3505	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3506	running_machine *machine = device->machine;
	3507	int offs, pri_code, i;
	3508	int sortedlist[NUM_SPRITES];
	3509	int flipscreenX, flipscreenY, spriteoffsX, spriteoffsY;
	3510	UINT8 drawmode_table[256];
	3511
	3512	memset(drawmode_table, DRAWMODE_SOURCE, sizeof(drawmode_table));
	3513	drawmode_table[0] = DRAWMODE_NONE;
	3514
	3515	flipscreenX = k053245->regs[5] & 0x01;
	3516	flipscreenY = k053245->regs[5] & 0x02;
	3517	spriteoffsX = (k053245->regs[0] << 8) | k053245->regs[1];
	3518	spriteoffsY = (k053245->regs[2] << 8) | k053245->regs[3];
	3519
	3520	for (offs = 0; offs < NUM_SPRITES; offs++)
	3521	sortedlist[offs] = -1;
	3522
	3523	/* prebuild a sorted table */
	3524	for (i = k053245->ramsize / 2, offs = 0; offs < i; offs += 8)
	3525	{
	3526	pri_code = k053245->buffer[offs];
	3527	if (pri_code & 0x8000)
	3528	{
	3529	pri_code &= 0x007f;
	3530
	3531	if (offs && pri_code == k053245->z_rejection)
	3532	continue;
	3533
	3534	if (sortedlist[pri_code] == -1)
	3535	sortedlist[pri_code] = offs;
	3536	}
	3537	}
	3538
	3539	for (pri_code = NUM_SPRITES - 1; pri_code >= 0; pri_code--)
	3540	{
	3541	int ox, oy, color, code, size, w, h, x, y, flipx, flipy, mirrorx, mirrory, shadow, zoomx, zoomy, pri;
	3542
	3543	offs = sortedlist[pri_code];
	3544	if (offs == -1)
	3545	continue;
	3546
	3547	/* the following changes the sprite draw order from
	3548	0  1  4  5 16 17 20 21
	3549	2  3  6  7 18 19 22 23
	3550	8  9 12 13 24 25 28 29
	3551	10 11 14 15 26 27 30 31
	3552	32 33 36 37 48 49 52 53
	3553	34 35 38 39 50 51 54 55
	3554	40 41 44 45 56 57 60 61
	3555	42 43 46 47 58 59 62 63
	3556
	3557	to
	3558
	3559	0  1  2  3  4  5  6  7
	3560	8  9 10 11 12 13 14 15
	3561	16 17 18 19 20 21 22 23
	3562	24 25 26 27 28 29 30 31
	3563	32 33 34 35 36 37 38 39
	3564	40 41 42 43 44 45 46 47
	3565	48 49 50 51 52 53 54 55
	3566	56 57 58 59 60 61 62 63
	3567	*/
	3568
	3569	/* NOTE: from the schematics, it looks like the top 2 bits should be ignored */
	3570	/* (there are not output pins for them), and probably taken from the "color" */
	3571	/* field to do bank switching. However this applies only to TMNT2, with its */
	3572	/* protection mcu creating the sprite table, so we don't know where to fetch */
	3573	/* the bits from. */
	3574	code = k053245->buffer[offs + 1];
	3575	code = ((code & 0xffe1) + ((code & 0x0010) >> 2) + ((code & 0x0008) << 1)
	3576	+ ((code & 0x0004) >> 1) + ((code & 0x0002) << 2));
	3577	color = k053245->buffer[offs + 6] & 0x00ff;
	3578	pri = 0;
	3579
	3580	k053245->callback(device->machine, &code, &color, &pri);
	3581
	3582	size = (k053245->buffer[offs] & 0x0f00) >> 8;
	3583
	3584	w = 1 << (size & 0x03);
	3585	h = 1 << ((size >> 2) & 0x03);
	3586
	3587	/* zoom control:
	3588	0x40 = normal scale
	3589	<0x40 enlarge (0x20 = double size)
	3590	>0x40 reduce (0x80 = half size)
	3591	*/
	3592	zoomy = k053245->buffer[offs + 4];
	3593	if (zoomy > 0x2000)
	3594	continue;
	3595
	3596	if (zoomy)
	3597	zoomy = (0x400000 + zoomy / 2) / zoomy;
	3598	else
	3599	zoomy = 2 * 0x400000;
	3600	if ((k053245->buffer[offs] & 0x4000) == 0)
	3601	{
	3602	zoomx = k053245->buffer[offs + 5];
	3603	if (zoomx > 0x2000)
	3604	continue;
	3605	if (zoomx)
	3606	zoomx = (0x400000 + zoomx / 2) / zoomx;
	3607	else
	3608	zoomx = 2 * 0x400000;
	3609	//          else zoomx = zoomy; /* workaround for TMNT2 */
	3610	}
	3611	else
	3612	zoomx = zoomy;
	3613
	3614	ox = k053245->buffer[offs+3] + spriteoffsX;
	3615	oy = k053245->buffer[offs+2];
	3616
	3617	ox += k053245->dx;
	3618	oy += k053245->dy;
	3619
	3620	flipx = k053245->buffer[offs] & 0x1000;
	3621	flipy = k053245->buffer[offs] & 0x2000;
	3622	mirrorx = k053245->buffer[offs + 6] & 0x0100;
	3623	if (mirrorx)
	3624	flipx = 0; // documented and confirmed
	3625
	3626	mirrory = k053245->buffer[offs + 6] & 0x0200;
	3627	shadow = k053245->buffer[offs + 6] & 0x0080;
	3628
	3629	if (flipscreenX)
	3630	{
	3631	ox = 512 - ox;
	3632	if (!mirrorx)
	3633	flipx = !flipx;
	3634	}
	3635	if (flipscreenY)
	3636	{
	3637	oy = -oy;
	3638	if (!mirrory)
	3639	flipy = !flipy;
	3640	}
	3641
	3642	ox = (ox + 0x5d) & 0x3ff;
	3643	if (ox >= 768) ox -= 1024;
	3644	oy = (-(oy + spriteoffsY + 0x07)) & 0x3ff;
	3645	if (oy >= 640) oy -= 1024;
	3646
	3647	/* the coordinates given are for the *center* of the sprite */
	3648	ox -= (zoomx * w) >> 13;
	3649	oy -= (zoomy * h) >> 13;
	3650
	3651	drawmode_table[k053245->gfx->color_granularity - 1] = shadow ? DRAWMODE_SHADOW : DRAWMODE_SOURCE;
	3652
	3653	for (y = 0; y < h; y++)
	3654	{
	3655	int sx, sy, zw, zh;
	3656
	3657	sy = oy + ((zoomy * y + (1 << 11)) >> 12);
	3658	zh = (oy + ((zoomy * (y + 1) + (1 << 11)) >> 12)) - sy;
	3659
	3660	for (x = 0; x < w; x++)
	3661	{
	3662	int c, fx, fy;
	3663
	3664	sx = ox + ((zoomx * x + (1 << 11)) >> 12);
	3665	zw = (ox + ((zoomx * (x+1) + (1 << 11)) >> 12)) - sx;
	3666	c = code;
	3667	if (mirrorx)
	3668	{
	3669	if ((flipx == 0) ^ (2*x < w))
	3670	{
	3671	/* mirror left/right */
	3672	c += (w - x - 1);
	3673	fx = 1;
	3674	}
	3675	else
	3676	{
	3677	c += x;
	3678	fx = 0;
	3679	}
	3680	}
	3681	else
	3682	{
	3683	if (flipx) c += w-1-x;
	3684	else c += x;
	3685	fx = flipx;
	3686	}
	3687	if (mirrory)
	3688	{
	3689	if ((flipy == 0) ^ (2*y >= h))
	3690	{
	3691	/* mirror top/bottom */
	3692	c += 8 * (h - y - 1);
	3693	fy = 1;
	3694	}
	3695	else
	3696	{
	3697	c += 8 * y;
	3698	fy = 0;
	3699	}
	3700	}
	3701	else
	3702	{
	3703	if (flipy) c += 8 * (h - 1 - y);
	3704	else c += 8 * y;
	3705	fy = flipy;
	3706	}
	3707
	3708	/* the sprite can start at any point in the 8x8 grid, but it must stay */
	3709	/* in a 64 entries window, wrapping around at the edges. The animation */
	3710	/* at the end of the saloon level in Sunset Riders breaks otherwise. */
	3711	c = (c & 0x3f) | (code & ~0x3f);
	3712
	3713	if (zoomx == 0x10000 && zoomy == 0x10000)
	3714	{
	3715	pdrawgfx_transtable(bitmap,cliprect,k053245->gfx,
	3716	c,
	3717	color,
	3718	fx,fy,
	3719	sx,sy,
	3720	machine->priority_bitmap,pri,
	3721	drawmode_table,machine->shadow_table);
	3722	}
	3723	else
	3724	{
	3725	pdrawgfxzoom_transtable(bitmap,cliprect,k053245->gfx,
	3726	c,
	3727	color,
	3728	fx,fy,
	3729	sx,sy,
	3730	(zw << 16) / 16,(zh << 16) / 16,
	3731	machine->priority_bitmap,pri,
	3732	drawmode_table,machine->shadow_table);
	3733
	3734	}
	3735	}
	3736	}
	3737	}
	3738	#if 0
	3739	if (input_code_pressed(machine, KEYCODE_D))
	3740	{
	3741	FILE *fp;
	3742	fp=fopen("SPRITE.DMP", "w+b");
	3743	if (fp)
	3744	{
	3745	fwrite(k053245->buffer, 0x800, 1, fp);
	3746	popmessage("saved");
	3747	fclose(fp);
	3748	}
	3749	}
	3750	#endif
	3751	#undef NUM_SPRITES
	3752	}
	3753
	3754	/* Lethal Enforcers has 2 of these chips hooked up in parallel to give 6bpp gfx.. lets cheat a
	3755	bit and make emulating it a little less messy by using a custom function instead */
	3756	void k053245_sprites_draw_lethal( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect )
	3757	{
	3758	#define NUM_SPRITES 128
	3759	k05324x_state *k053245 = k05324x_get_safe_token(device);
	3760	int offs, pri_code, i;
	3761	int sortedlist[NUM_SPRITES];
	3762	int flipscreenX, flipscreenY, spriteoffsX, spriteoffsY;
	3763	UINT8 drawmode_table[256];
	3764	running_machine *machine = device->machine;
	3765
	3766	memset(drawmode_table, DRAWMODE_SOURCE, sizeof(drawmode_table));
	3767	drawmode_table[0] = DRAWMODE_NONE;
	3768
	3769	flipscreenX = k053245->regs[5] & 0x01;
	3770	flipscreenY = k053245->regs[5] & 0x02;
	3771	spriteoffsX = (k053245->regs[0] << 8) | k053245->regs[1];
	3772	spriteoffsY = (k053245->regs[2] << 8) | k053245->regs[3];
	3773
	3774	for (offs = 0; offs < NUM_SPRITES; offs++)
	3775	sortedlist[offs] = -1;
	3776
	3777	/* prebuild a sorted table */
	3778	for (i = k053245->ramsize / 2, offs = 0; offs < i; offs += 8)
	3779	{
	3780	pri_code = k053245->buffer[offs];
	3781	if (pri_code & 0x8000)
	3782	{
	3783	pri_code &= 0x007f;
	3784
	3785	if (offs && pri_code == k053245->z_rejection)
	3786	continue;
	3787
	3788	if (sortedlist[pri_code] == -1)
	3789	sortedlist[pri_code] = offs;
	3790	}
	3791	}
	3792
	3793	for (pri_code = NUM_SPRITES - 1; pri_code >= 0; pri_code--)
	3794	{
	3795	int ox, oy, color, code, size, w, h, x, y, flipx, flipy, mirrorx, mirrory, shadow, zoomx, zoomy, pri;
	3796
	3797	offs = sortedlist[pri_code];
	3798	if (offs == -1)
	3799	continue;
	3800
	3801	/* the following changes the sprite draw order from
	3802	0  1  4  5 16 17 20 21
	3803	2  3  6  7 18 19 22 23
	3804	8  9 12 13 24 25 28 29
	3805	10 11 14 15 26 27 30 31
	3806	32 33 36 37 48 49 52 53
	3807	34 35 38 39 50 51 54 55
	3808	40 41 44 45 56 57 60 61
	3809	42 43 46 47 58 59 62 63
	3810
	3811	to
	3812
	3813	0  1  2  3  4  5  6  7
	3814	8  9 10 11 12 13 14 15
	3815	16 17 18 19 20 21 22 23
	3816	24 25 26 27 28 29 30 31
	3817	32 33 34 35 36 37 38 39
	3818	40 41 42 43 44 45 46 47
	3819	48 49 50 51 52 53 54 55
	3820	56 57 58 59 60 61 62 63
	3821	*/
	3822
	3823	/* NOTE: from the schematics, it looks like the top 2 bits should be ignored */
	3824	/* (there are not output pins for them), and probably taken from the "color" */
	3825	/* field to do bank switching. However this applies only to TMNT2, with its */
	3826	/* protection mcu creating the sprite table, so we don't know where to fetch */
	3827	/* the bits from. */
	3828	code = k053245->buffer[offs + 1];
	3829	code = ((code & 0xffe1) + ((code & 0x0010) >> 2) + ((code & 0x0008) << 1)
	3830	+ ((code & 0x0004) >> 1) + ((code & 0x0002) << 2));
	3831	color = k053245->buffer[offs + 6] & 0x00ff;
	3832	pri = 0;
	3833
	3834	k053245->callback(device->machine, &code, &color, &pri);
	3835
	3836	size = (k053245->buffer[offs] & 0x0f00) >> 8;
	3837
	3838	w = 1 << (size & 0x03);
	3839	h = 1 << ((size >> 2) & 0x03);
	3840
	3841	/* zoom control:
	3842	0x40 = normal scale
	3843	<0x40 enlarge (0x20 = double size)
	3844	>0x40 reduce (0x80 = half size)
	3845	*/
	3846	zoomy = k053245->buffer[offs + 4];
	3847	if (zoomy > 0x2000)
	3848	continue;
	3849	if (zoomy)
	3850	zoomy = (0x400000 + zoomy / 2) / zoomy;
	3851	else
	3852	zoomy = 2 * 0x400000;
	3853	if ((k053245->buffer[offs] & 0x4000) == 0)
	3854	{
	3855	zoomx = k053245->buffer[offs + 5];
	3856	if (zoomx > 0x2000)
	3857	continue;
	3858	if (zoomx)
	3859	zoomx = (0x400000 + zoomx / 2) / zoomx;
	3860	else
	3861	zoomx = 2 * 0x400000;
	3862	//          else zoomx = zoomy; /* workaround for TMNT2 */
	3863	}
	3864	else
	3865	zoomx = zoomy;
	3866
	3867	ox = k053245->buffer[offs + 3] + spriteoffsX;
	3868	oy = k053245->buffer[offs + 2];
	3869
	3870	ox += k053245->dx;
	3871	oy += k053245->dy;
	3872
	3873	flipx = k053245->buffer[offs] & 0x1000;
	3874	flipy = k053245->buffer[offs] & 0x2000;
	3875	mirrorx = k053245->buffer[offs + 6] & 0x0100;
	3876	if (mirrorx)
	3877	flipx = 0; // documented and confirmed
	3878	mirrory = k053245->buffer[offs + 6] & 0x0200;
	3879	shadow = k053245->buffer[offs + 6] & 0x0080;
	3880
	3881	if (flipscreenX)
	3882	{
	3883	ox = 512 - ox;
	3884	if (!mirrorx) flipx = !flipx;
	3885	}
	3886	if (flipscreenY)
	3887	{
	3888	oy = -oy;
	3889	if (!mirrory) flipy = !flipy;
	3890	}
	3891
	3892	ox = (ox + 0x5d) & 0x3ff;
	3893	if (ox >= 768) ox -= 1024;
	3894	oy = (-(oy + spriteoffsY + 0x07)) & 0x3ff;
	3895	if (oy >= 640) oy -= 1024;
	3896
	3897	/* the coordinates given are for the *center* of the sprite */
	3898	ox -= (zoomx * w) >> 13;
	3899	oy -= (zoomy * h) >> 13;
	3900
	3901	drawmode_table[machine->gfx[0]->color_granularity - 1] = shadow ? DRAWMODE_SHADOW : DRAWMODE_SOURCE;
	3902
	3903	for (y = 0; y < h; y++)
	3904	{
	3905	int sx, sy, zw, zh;
	3906
	3907	sy = oy + ((zoomy * y + (1<<11)) >> 12);
	3908	zh = (oy + ((zoomy * (y+1) + (1<<11)) >> 12)) - sy;
	3909
	3910	for (x = 0; x < w; x++)
	3911	{
	3912	int c, fx, fy;
	3913
	3914	sx = ox + ((zoomx * x + (1 << 11)) >> 12);
	3915	zw = (ox + ((zoomx * (x+1) + (1 << 11)) >> 12)) - sx;
	3916	c = code;
	3917	if (mirrorx)
	3918	{
	3919	if ((flipx == 0) ^ (2 * x < w))
	3920	{
	3921	/* mirror left/right */
	3922	c += (w - x - 1);
	3923	fx = 1;
	3924	}
	3925	else
	3926	{
	3927	c += x;
	3928	fx = 0;
	3929	}
	3930	}
	3931	else
	3932	{
	3933	if (flipx) c += w-1-x;
	3934	else c += x;
	3935	fx = flipx;
	3936	}
	3937	if (mirrory)
	3938	{
	3939	if ((flipy == 0) ^ (2 * y >= h))
	3940	{
	3941	/* mirror top/bottom */
	3942	c += 8 * (h - y - 1);
	3943	fy = 1;
	3944	}
	3945	else
	3946	{
	3947	c += 8 * y;
	3948	fy = 0;
	3949	}
	3950	}
	3951	else
	3952	{
	3953	if (flipy) c += 8 * (h - 1 - y);
	3954	else c += 8 * y;
	3955	fy = flipy;
	3956	}
	3957
	3958	/* the sprite can start at any point in the 8x8 grid, but it must stay */
	3959	/* in a 64 entries window, wrapping around at the edges. The animation */
	3960	/* at the end of the saloon level in Sunset Riders breaks otherwise. */
	3961	c = (c & 0x3f) | (code & ~0x3f);
	3962
	3963	if (zoomx == 0x10000 && zoomy == 0x10000)
	3964	{
	3965	pdrawgfx_transtable(bitmap,cliprect,machine->gfx[0], /* hardcoded to 0 (decoded 6bpp gfx) for le */
	3966	c,
	3967	color,
	3968	fx,fy,
	3969	sx,sy,
	3970	machine->priority_bitmap,pri,
	3971	drawmode_table,machine->shadow_table);
	3972	}
	3973	else
	3974	{
	3975	pdrawgfxzoom_transtable(bitmap,cliprect,machine->gfx[0],  /* hardcoded to 0 (decoded 6bpp gfx) for le */
	3976	c,
	3977	color,
	3978	fx,fy,
	3979	sx,sy,
	3980	(zw << 16) / 16,(zh << 16) / 16,
	3981	machine->priority_bitmap,pri,
	3982	drawmode_table,machine->shadow_table);
	3983
	3984	}
	3985	}
	3986	}
	3987	}
	3988	#if 0
	3989	if (input_code_pressed(machine, KEYCODE_D))
	3990	{
	3991	FILE *fp;
	3992	fp=fopen("SPRITE.DMP", "w+b");
	3993	if (fp)
	3994	{
	3995	fwrite(k053245->buffer, 0x800, 1, fp);
	3996	popmessage("saved");
	3997	fclose(fp);
	3998	}
	3999	}
	4000	#endif
	4001	#undef NUM_SPRITES
	4002	}
	4003
	4004
	4005	/*****************************************************************************
	4006	DEVICE INTERFACE
	4007	*****************************************************************************/
	4008
	4009	static DEVICE_START( k05324x )
	4010	{
	4011	k05324x_state *k05324x = k05324x_get_safe_token(device);
	4012	const k05324x_interface *intf = k05324x_get_interface(device);
	4013	running_machine *machine = device->machine;
	4014	UINT32 total;
	4015	static const gfx_layout spritelayout =
	4016	{
	4017	16,16,
	4018	0,
	4019	4,
	4020	{ 24, 16, 8, 0 },
	4021	{ 0, 1, 2, 3, 4, 5, 6, 7,
	4022	8*32+0, 8*32+1, 8*32+2, 8*32+3, 8*32+4, 8*32+5, 8*32+6, 8*32+7 },
	4023	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
	4024	16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32 },
	4025	128*8
	4026	};
	4027
	4028	/* decode the graphics */
	4029	switch (intf->plane_order)
	4030	{
	4031	case NORMAL_PLANE_ORDER:
	4032	total = memory_region_length(machine, intf->gfx_memory_region) / 128;
	4033	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &spritelayout, 4);
	4034	break;
	4035
	4036	default:
	4037	fatalerror("Unsupported plane_order");
	4038	}
	4039
	4040	if (VERBOSE && !(machine->config->video_attributes & VIDEO_HAS_SHADOWS))
	4041	popmessage("driver should use VIDEO_HAS_SHADOWS");
	4042
	4043	/* deinterleave the graphics, if needed */
	4044	deinterleave_gfx(machine, intf->gfx_memory_region, intf->deinterleave);
	4045
	4046	k05324x->ramsize = 0x800;
	4047
	4048	k05324x->memory_region = intf->gfx_memory_region;
	4049	k05324x->gfx = machine->gfx[intf->gfx_num];
	4050	k05324x->dx = intf->dx;
	4051	k05324x->dy = intf->dy;
	4052	k05324x->callback = intf->callback;
	4053	k05324x->ram = auto_alloc_array(machine, UINT16, k05324x->ramsize / 2);
	4054
	4055	k05324x->buffer = auto_alloc_array(machine, UINT16, k05324x->ramsize / 2);
	4056
	4057	state_save_register_device_item_pointer(device, 0, k05324x->ram, k05324x->ramsize / 2);
	4058	state_save_register_device_item_pointer(device, 0, k05324x->buffer, k05324x->ramsize / 2);
	4059	state_save_register_device_item(device, 0, k05324x->rombank);
	4060	state_save_register_device_item(device, 0, k05324x->z_rejection);
	4061	state_save_register_device_item_array(device, 0, k05324x->regs);
	4062	}
	4063
	4064	static DEVICE_RESET( k05324x )
	4065	{
	4066	k05324x_state *k05324x = k05324x_get_safe_token(device);
	4067	int i;
	4068
	4069	k05324x->z_rejection = -1;
	4070	k05324x->rombank = 0;
	4071
	4072	for (i = 0; i < 0x10; i++)
	4073	k05324x->regs[i] = 0;
	4074	}
	4075
	4076	/***************************************************************************/
	4077	/*                                                                         */
	4078	/*                                 053246/053247                           */
	4079	/*                                                                         */
	4080	/***************************************************************************/
	4081
	4082	typedef struct _k053247_state k053247_state;
	4083	struct _k053247_state
	4084	{
	4085	UINT16    *ram;
	4086
	4087	gfx_element *gfx;
	4088
	4089	UINT8    Kx46_regs[8];
	4090	UINT16   Kx47_regs[16];
	4091	int      dx, dy, wraparound;
	4092	UINT8    objcha_line;
	4093	int      z_rejection;
	4094
	4095	k05324x_callback callback;
	4096
	4097	const char *memory_region;
	4098	const device_config *screen;
	4099	};
	4100
	4101
	4102
	4103	/*****************************************************************************
	4104	INLINE FUNCTIONS
	4105	*****************************************************************************/
	4106
	4107	INLINE k053247_state *k053247_get_safe_token( const device_config *device )
	4108	{
	4109	assert(device != NULL);
	4110	assert(device->token != NULL);
	4111	assert((device->type == K053246 || device->type == K053247 || device->type == K055673));
	4112
	4113	return (k053247_state *)device->token;
	4114	}
	4115
	4116	INLINE const k053247_interface *k053247_get_interface( const device_config *device )
	4117	{
	4118	assert(device != NULL);
	4119	assert((device->type == K053246 || device->type == K053247 || device->type == K055673));
	4120	return (const k053247_interface *) device->static_config;
	4121	}
	4122
	4123	/*****************************************************************************
	4124	DEVICE HANDLERS
	4125	*****************************************************************************/
	4126
	4127	#if 0
	4128	void k053247_get_gfx( const device_config *device, gfx_element **gfx )
	4129	{
	4130	k053247_state *k053247 = k053247_get_safe_token(device);
	4131	*gfx = k053247->gfx;
	4132	}
	4133
	4134	void k053247_get_cb( const device_config *device, void (**callback)(int *, int *, int *) )
	4135	{
	4136	k053247_state *k053247 = k053247_get_safe_token(device);
	4137	*callback = k053247->callback;
	4138	}
	4139
	4140	#endif
	4141
	4142	void k053247_get_ram( const device_config *device, UINT16 **ram )
	4143	{
	4144	k053247_state *k053247 = k053247_get_safe_token(device);
	4145	*ram = k053247->ram;
	4146	}
	4147
	4148	int k053247_get_dx( const device_config *device )
	4149	{
	4150	k053247_state *k053247 = k053247_get_safe_token(device);
	4151	return k053247->dx;
	4152	}
	4153
	4154	int k053247_get_dy( const device_config *device )
	4155	{
	4156	k053247_state *k053247 = k053247_get_safe_token(device);
	4157	return k053247->dy;
	4158	}
	4159
	4160	int k053246_read_register( const device_config *device, int regnum )
	4161	{
	4162	k053247_state *k053247 = k053247_get_safe_token(device);
	4163	return(k053247->Kx46_regs[regnum]);
	4164	}
	4165
	4166	int k053247_read_register( const device_config *device, int regnum )
	4167	{
	4168	k053247_state *k053247 = k053247_get_safe_token(device);
	4169	return(k053247->Kx47_regs[regnum]);
	4170	}
	4171
	4172	void k053247_set_sprite_offs( const device_config *device, int offsx, int offsy )
	4173	{
	4174	k053247_state *k053247 = k053247_get_safe_token(device);
	4175	k053247->dx = offsx;
	4176	k053247->dy = offsy;
	4177	}
	4178
	4179	void k053247_wraparound_enable( const device_config *device, int status )
	4180	{
	4181	k053247_state *k053247 = k053247_get_safe_token(device);
	4182	k053247->wraparound = status;
	4183	}
	4184
	4185	WRITE16_DEVICE_HANDLER( k053247_reg_word_w ) // write-only OBJSET2 registers (see p.43 table 6.1)
	4186	{
	4187	k053247_state *k053247 = k053247_get_safe_token(device);
	4188	COMBINE_DATA(k053247->Kx47_regs + offset);
	4189	}
	4190
	4191	WRITE32_DEVICE_HANDLER( k053247_reg_long_w )
	4192	{
	4193	k053247_state *k053247 = k053247_get_safe_token(device);
	4194	offset <<= 1;
	4195	COMBINE_DATA(k053247->Kx47_regs + offset + 1);
	4196	mem_mask >>= 16;
	4197	data >>= 16;
	4198	COMBINE_DATA(k053247->Kx47_regs + offset);
	4199	}
	4200
	4201	READ16_DEVICE_HANDLER( k053247_word_r )
	4202	{
	4203	k053247_state *k053247 = k053247_get_safe_token(device);
	4204	return k053247->ram[offset];
	4205	}
	4206
	4207	WRITE16_DEVICE_HANDLER( k053247_word_w )
	4208	{
	4209	k053247_state *k053247 = k053247_get_safe_token(device);
	4210	COMBINE_DATA(k053247->ram + offset);
	4211	}
	4212
	4213	READ32_DEVICE_HANDLER( k053247_long_r )
	4214	{
	4215	k053247_state *k053247 = k053247_get_safe_token(device);
	4216	return k053247->ram[offset * 2 + 1] | (k053247->ram[offset * 2] << 16);
	4217	}
	4218
	4219	WRITE32_DEVICE_HANDLER( k053247_long_w )
	4220	{
	4221	k053247_state *k053247 = k053247_get_safe_token(device);
	4222	offset <<= 1;
	4223	COMBINE_DATA(k053247->ram + offset + 1);
	4224	mem_mask >>= 16;
	4225	data >>= 16;
	4226	COMBINE_DATA(k053247->ram + offset);
	4227	}
	4228
	4229	READ8_DEVICE_HANDLER( k053247_r )
	4230	{
	4231	k053247_state *k053247 = k053247_get_safe_token(device);
	4232	int offs = offset >> 1;
	4233
	4234	if (offset & 1)
	4235	return(k053247->ram[offs] & 0xff);
	4236	else
	4237	return(k053247->ram[offs] >> 8);
	4238	}
	4239
	4240	WRITE8_DEVICE_HANDLER( k053247_w )
	4241	{
	4242	k053247_state *k053247 = k053247_get_safe_token(device);
	4243	int offs = offset >> 1;
	4244
	4245	if (offset & 1)
	4246	k053247->ram[offs] = (k053247->ram[offs] & 0xff00) | data;
	4247	else
	4248	k053247->ram[offs] = (k053247->ram[offs] & 0x00ff) | (data << 8);
	4249	}
	4250
	4251	// Mystic Warriors hardware games support a non-objcha based ROM readback
	4252	// write the address to the 246 as usual, but there's a completely separate ROM
	4253	// window that works without needing an objcha line.
	4254	// in this window, +0 = 32 bits from one set of ROMs, and +8 = 32 bits from another set
	4255	READ16_DEVICE_HANDLER( k055673_rom_word_r )   // 5bpp
	4256	{
	4257	k053247_state *k053246 = k053247_get_safe_token(device);
	4258	UINT8 *ROM8 = (UINT8 *)memory_region(device->machine, k053246->memory_region);
	4259	UINT16 *ROM = (UINT16 *)memory_region(device->machine, k053246->memory_region);
	4260	int size4 = (memory_region_length(device->machine, k053246->memory_region) / (1024 * 1024)) / 5;
	4261	int romofs;
	4262
	4263	size4 *= 4 * 1024 * 1024;   // get offset to 5th bit
	4264	ROM8 += size4;
	4265
	4266	romofs = k053246->Kx46_regs[6] << 16 | k053246->Kx46_regs[7] << 8 | k053246->Kx46_regs[4];
	4267
	4268	switch (offset)
	4269	{
	4270	case 0:   // 20k / 36u
	4271	return ROM[romofs + 2];
	4272	case 1:   // 17k / 36y
	4273	return ROM[romofs + 3];
	4274	case 2: // 10k / 32y
	4275	case 3:
	4276	romofs /= 2;
	4277	return ROM8[romofs + 1];
	4278	case 4:   // 22k / 34u
	4279	return ROM[romofs];
	4280	case 5:   // 19k / 34y
	4281	return ROM[romofs + 1];
	4282	case 6:   // 12k / 29y
	4283	case 7:
	4284	romofs /= 2;
	4285	return ROM8[romofs];
	4286	default:
	4287	LOG(("55673_rom_word_r: Unknown read offset %x\n", offset));
	4288	break;
	4289	}
	4290
	4291	return 0;
	4292	}
	4293
	4294	READ16_DEVICE_HANDLER( k055673_GX6bpp_rom_word_r )
	4295	{
	4296	k053247_state *k053246 = k053247_get_safe_token(device);
	4297	UINT16 *ROM = (UINT16 *)memory_region(device->machine, k053246->memory_region);
	4298	int romofs;
	4299
	4300	romofs = k053246->Kx46_regs[6] << 16 | k053246->Kx46_regs[7] << 8 | k053246->Kx46_regs[4];
	4301
	4302	romofs /= 4;   // romofs increments 4 at a time
	4303	romofs *= 12 / 2;   // each increment of romofs = 12 new bytes (6 new words)
	4304
	4305	switch (offset)
	4306	{
	4307	case 0:
	4308	return ROM[romofs + 3];
	4309	case 1:
	4310	return ROM[romofs + 4];
	4311	case 2:
	4312	case 3:
	4313	return ROM[romofs + 5];
	4314	case 4:
	4315	return ROM[romofs];
	4316	case 5:
	4317	return ROM[romofs + 1];
	4318	case 6:
	4319	case 7:
	4320	return ROM[romofs + 2];
	4321	default:
	4322	//          LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, cpu_get_pc(space->cpu)));
	4323	break;
	4324	}
	4325
	4326	return 0;
	4327	}
	4328
	4329	READ8_DEVICE_HANDLER( k053246_r )
	4330	{
	4331	k053247_state *k053246 = k053247_get_safe_token(device);
	4332	if (k053246->objcha_line == ASSERT_LINE)
	4333	{
	4334	int addr;
	4335
	4336	addr = (k053246->Kx46_regs[6] << 17) | (k053246->Kx46_regs[7] << 9) | (k053246->Kx46_regs[4] << 1) | ((offset & 1) ^ 1);
	4337	addr &= memory_region_length(device->machine, k053246->memory_region) - 1;
	4338	//      if (VERBOSE)
	4339	//          popmessage("%04x: offset %02x addr %06x", cpu_get_pc(space->cpu), offset, addr);
	4340	return memory_region(device->machine, k053246->memory_region)[addr];
	4341	}
	4342	else
	4343	{
	4344	//      LOG(("%04x: read from unknown 053246 address %x\n", cpu_get_pc(space->cpu), offset));
	4345	return 0;
	4346	}
	4347	}
	4348
	4349	WRITE8_DEVICE_HANDLER( k053246_w )
	4350	{
	4351	k053247_state *k053247 = k053247_get_safe_token(device);
	4352	k053247->Kx46_regs[offset] = data;
	4353	}
	4354
	4355	READ16_DEVICE_HANDLER( k053246_word_r )
	4356	{
	4357	offset <<= 1;
	4358	return k053246_r(device, offset + 1) | (k053246_r(device, offset) << 8);
	4359	}
	4360
	4361	WRITE16_DEVICE_HANDLER( k053246_word_w )
	4362	{
	4363	if (ACCESSING_BITS_8_15)
	4364	k053246_w(device, offset << 1,(data >> 8) & 0xff);
	4365	if (ACCESSING_BITS_0_7)
	4366	k053246_w(device, (offset << 1) + 1,data & 0xff);
	4367	}
	4368
	4369	READ32_DEVICE_HANDLER( k053246_long_r )
	4370	{
	4371	offset <<= 1;
	4372	return (k053246_word_r(device, offset + 1, 0xffff) | k053246_word_r(device, offset, 0xffff) << 16);
	4373	}
	4374
	4375	WRITE32_DEVICE_HANDLER( k053246_long_w )
	4376	{
	4377	offset <<= 1;
	4378	k053246_word_w(device, offset, data >> 16, mem_mask >> 16);
	4379	k053246_word_w(device, offset + 1, data, mem_mask);
	4380	}
	4381
	4382	void k053246_set_objcha_line( const device_config *device, int state )
	4383	{
	4384	k053247_state *k053246 = k053247_get_safe_token(device);
	4385	k053246->objcha_line = state;
	4386	}
	4387
	4388	int k053246_is_irq_enabled( const device_config *device )
	4389	{
	4390	k053247_state *k053247 = k053247_get_safe_token(device);
	4391	// This bit enables obj DMA rather than obj IRQ even though the two functions usually coincide.
	4392	return k053247->Kx46_regs[5] & 0x10;
	4393	}
	4394
	4395	/*
	4396	* Sprite Format
	4397	* ------------------
	4398	*
	4399	* Word | Bit(s)           | Use
	4400	* -----+-fedcba9876543210-+----------------
	4401	*   0  | x--------------- | active (show this sprite)
	4402	*   0  | -x-------------- | maintain aspect ratio (when set, zoom y acts on both axis)
	4403	*   0  | --x------------- | flip y
	4404	*   0  | ---x------------ | flip x
	4405	*   0  | ----xxxx-------- | sprite size (see below)
	4406	*   0  | --------xxxxxxxx | zcode
	4407	*   1  | xxxxxxxxxxxxxxxx | sprite code
	4408	*   2  | ------xxxxxxxxxx | y position
	4409	*   3  | ------xxxxxxxxxx | x position
	4410	*   4  | xxxxxxxxxxxxxxxx | zoom y (0x40 = normal, <0x40 = enlarge, >0x40 = reduce)
	4411	*   5  | xxxxxxxxxxxxxxxx | zoom x (0x40 = normal, <0x40 = enlarge, >0x40 = reduce)
	4412	*   6  | x--------------- | mirror y (top half is drawn as mirror image of the bottom)
	4413	*   6  | -x-------------- | mirror x (right half is drawn as mirror image of the left)
	4414	*   6  | --xx------------ | reserved (sprites with these two bits set don't seem to be graphics data at all)
	4415	*   6  | ----xx---------- | shadow code: 0=off, 0x400=preset1, 0x800=preset2, 0xc00=preset3
	4416	*   6  | ------xx-------- | effect code: flicker, upper palette, full shadow...etc. (game dependent)
	4417	*   6  | --------xxxxxxxx | "color", but depends on external connections (implies priority)
	4418	*   7  | xxxxxxxxxxxxxxxx | game dependent
	4419	*
	4420	* shadow enables transparent shadows. Note that it applies to the last sprite pen ONLY.
	4421	* The rest of the sprite remains normal.
	4422	*/
	4423
	4424	void k053247_sprites_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect )
	4425	{
	4426	#define NUM_SPRITES 256
	4427	k053247_state *k053246 = k053247_get_safe_token(device);
	4428	running_machine *machine = device->machine;
	4429
	4430	/* sprites can be grouped up to 8x8. The draw order is
	4431	0  1  4  5 16 17 20 21
	4432	2  3  6  7 18 19 22 23
	4433	8  9 12 13 24 25 28 29
	4434	10 11 14 15 26 27 30 31
	4435	32 33 36 37 48 49 52 53
	4436	34 35 38 39 50 51 54 55
	4437	40 41 44 45 56 57 60 61
	4438	42 43 46 47 58 59 62 63
	4439	*/
	4440	static const int xoffset[8] = { 0, 1, 4, 5, 16, 17, 20, 21 };
	4441	static const int yoffset[8] = { 0, 2, 8, 10, 32, 34, 40, 42 };
	4442
	4443	int sortedlist[NUM_SPRITES];
	4444	int offs,zcode;
	4445	int ox, oy, color, code, size, w, h, x, y, xa, ya, flipx, flipy, mirrorx, mirrory, shadow, zoomx, zoomy, primask;
	4446	int shdmask, nozoom, count, temp;
	4447
	4448	int flipscreenx = k053246->Kx46_regs[5] & 0x01;
	4449	int flipscreeny = k053246->Kx46_regs[5] & 0x02;
	4450	int offx = (short)((k053246->Kx46_regs[0] << 8) | k053246->Kx46_regs[1]);
	4451	int offy = (short)((k053246->Kx46_regs[2] << 8) | k053246->Kx46_regs[3]);
	4452
	4453	int screen_width = video_screen_get_width(k053246->screen);
	4454	UINT8 drawmode_table[256];
	4455	UINT8 shadowmode_table[256];
	4456	UINT8 *whichtable;
	4457
	4458	memset(drawmode_table, DRAWMODE_SOURCE, sizeof(drawmode_table));
	4459	drawmode_table[0] = DRAWMODE_NONE;
	4460	memset(shadowmode_table, DRAWMODE_SHADOW, sizeof(shadowmode_table));
	4461	shadowmode_table[0] = DRAWMODE_NONE;
	4462
	4463	/*
	4464	safeguard older drivers missing any of the following video attributes:
	4465
	4466	VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS
	4467	*/
	4468	if (machine->config->video_attributes & VIDEO_HAS_SHADOWS)
	4469	{
	4470	if (bitmap->bpp == 32 && (machine->config->video_attributes & VIDEO_HAS_HIGHLIGHTS))
	4471	shdmask = 3; // enable all shadows and highlights
	4472	else
	4473	shdmask = 0; // enable default shadows
	4474	}
	4475	else
	4476	shdmask = -1; // disable everything
	4477
	4478	/*
	4479	The k053247 does not draw pixels on top of those with equal or smaller Z-values
	4480	regardless of priority. Embedded shadows inherit Z-values from their host sprites
	4481	but do not assume host priorities unless explicitly told. In other words shadows
	4482	can have priorities different from that of normal pens in the same sprite,
	4483	in addition to the ability of masking themselves from specific layers or pixels
	4484	on the other sprites.
	4485
	4486	In front-to-back rendering, sprites cannot sandwich between alpha blended layers
	4487	or the draw code will have to figure out the percentage opacities of what is on
	4488	top and beneath each sprite pixel and blend the target accordingly. The process
	4489	is overly demanding for realtime software and is thus another shortcoming of
	4490	pdrawgfx and pixel based mixers. Even mahjong games with straight forward video
	4491	subsystems are feeling the impact by which the girls cannot appear under
	4492	translucent dialogue boxes.
	4493
	4494	These are a small part of the k053247's feature set but many games expect them
	4495	to be the minimum compliances. The specification will undoubtedly require
	4496	redesigning the priority system from the ground up. Drawgfx.c and tilemap.c must
	4497	also undergo heavy facelifts but in the end the changes could hurt simpler games
	4498	more than they help complex systems; therefore the new engine should remain
	4499	completely stand alone and self-contained. Implementation details are being
	4500	hammered down but too early to make propositions.
	4501	*/
	4502
	4503	// Prebuild a sorted table by descending Z-order.
	4504	zcode = k053246->z_rejection;
	4505	offs = count = 0;
	4506
	4507	if (zcode == -1)
	4508	{
	4509	for (; offs < 0x800; offs += 8)
	4510	if (k053246->ram[offs] & 0x8000)
	4511	sortedlist[count++] = offs;
	4512	}
	4513	else
	4514	{
	4515	for (; offs < 0x800; offs += 8)
	4516	if ((k053246->ram[offs] & 0x8000) && ((k053246->ram[offs] & 0xff) != zcode))
	4517	sortedlist[count++] = offs;
	4518	}
	4519
	4520	w = count;
	4521	count--;
	4522	h = count;
	4523
	4524	if (!(k053246->Kx47_regs[0xc / 2] & 0x10))
	4525	{
	4526	// sort objects in decending order(smaller z closer) when OPSET PRI is clear
	4527	for (y = 0; y < h; y++)
	4528	{
	4529	offs = sortedlist[y];
	4530	zcode = k053246->ram[offs] & 0xff;
	4531	for (x = y + 1; x < w; x++)
	4532	{
	4533	temp = sortedlist[x];
	4534	code = k053246->ram[temp] & 0xff;
	4535	if (zcode <= code)
	4536	{
	4537	zcode = code;
	4538	sortedlist[x] = offs;
	4539	sortedlist[y] = offs = temp;
	4540	}
	4541	}
	4542	}
	4543	}
	4544	else
	4545	{
	4546	// sort objects in ascending order(bigger z closer) when OPSET PRI is set
	4547	for (y = 0; y < h; y++)
	4548	{
	4549	offs = sortedlist[y];
	4550	zcode = k053246->ram[offs] & 0xff;
	4551	for (x = y + 1; x < w; x++)
	4552	{
	4553	temp = sortedlist[x];
	4554	code = k053246->ram[temp] & 0xff;
	4555	if (zcode >= code)
	4556	{
	4557	zcode = code;
	4558	sortedlist[x] = offs;
	4559	sortedlist[y] = offs = temp;
	4560	}
	4561	}
	4562	}
	4563	}
	4564
	4565	for (; count >= 0; count--)
	4566	{
	4567	offs = sortedlist[count];
	4568
	4569	code = k053246->ram[offs + 1];
	4570	shadow = color = k053246->ram[offs + 6];
	4571	primask = 0;
	4572
	4573	k053246->callback(device->machine, &code, &color, &primask);
	4574
	4575	temp = k053246->ram[offs];
	4576
	4577	size = (temp & 0x0f00) >> 8;
	4578	w = 1 << (size & 0x03);
	4579	h = 1 << ((size >> 2) & 0x03);
	4580
	4581	/* the sprite can start at any point in the 8x8 grid. We have to */
	4582	/* adjust the offsets to draw it correctly. Simpsons does this all the time. */
	4583	xa = 0;
	4584	ya = 0;
	4585	if (code & 0x01) xa += 1;
	4586	if (code & 0x02) ya += 1;
	4587	if (code & 0x04) xa += 2;
	4588	if (code & 0x08) ya += 2;
	4589	if (code & 0x10) xa += 4;
	4590	if (code & 0x20) ya += 4;
	4591	code &= ~0x3f;
	4592
	4593	oy = (short)k053246->ram[offs + 2];
	4594	ox = (short)k053246->ram[offs + 3];
	4595
	4596	if (k053246->wraparound)
	4597	{
	4598	offx &= 0x3ff;
	4599	offy &= 0x3ff;
	4600	oy &= 0x3ff;
	4601	ox &= 0x3ff;
	4602	}
	4603
	4604	/* zoom control:
	4605	0x40 = normal scale
	4606	<0x40 enlarge (0x20 = double size)
	4607	>0x40 reduce (0x80 = half size)
	4608	*/
	4609	y = zoomy = k053246->ram[offs + 4] & 0x3ff;
	4610	if (zoomy)
	4611	zoomy = (0x400000 + (zoomy >> 1)) / zoomy;
	4612	else
	4613	zoomy = 0x800000;
	4614
	4615	if (!(temp & 0x4000))
	4616	{
	4617	x = zoomx = k053246->ram[offs + 5] & 0x3ff;
	4618	if (zoomx)
	4619	zoomx = (0x400000 + (zoomx >> 1)) / zoomx;
	4620	else
	4621	zoomx = 0x800000;
	4622	}
	4623	else
	4624	{
	4625	zoomx = zoomy;
	4626	x = y;
	4627	}
	4628
	4629	// ************************************************************************************
	4630	//  for Escape Kids (GX975)
	4631	// ************************************************************************************
	4632	//    Escape Kids use 053246 #5 register's UNKNOWN Bit #5, #3 and #2.
	4633	//    Bit #5, #3, #2 always set "1".
	4634	//    Maybe, Bit #5 or #3 or #2 or combination means "FIX SPRITE WIDTH TO HALF" ?????
	4635	//    Below 7 lines supports this 053246's(???) function.
	4636	//    Don't rely on it, Please.  But, Escape Kids works correctly!
	4637	// ************************************************************************************
	4638	if ( k053246->Kx46_regs[5] & 0x08 ) // Check only "Bit #3 is '1'?" (NOTE: good guess)
	4639	{
	4640	zoomx >>= 1;      // Fix sprite width to HALF size
	4641	ox = (ox >> 1) + 1;   // Fix sprite draw position
	4642	if (flipscreenx)
	4643	ox += screen_width;
	4644	nozoom = 0;
	4645	}
	4646	else
	4647	nozoom = (x == 0x40 && y == 0x40);
	4648
	4649	flipx = temp & 0x1000;
	4650	flipy = temp & 0x2000;
	4651	mirrorx = shadow & 0x4000;
	4652	if (mirrorx)
	4653	flipx = 0; // documented and confirmed
	4654	mirrory = shadow & 0x8000;
	4655
	4656	whichtable = drawmode_table;
	4657	if (color == -1)
	4658	{
	4659	// drop the entire sprite to shadow unconditionally
	4660	if (shdmask < 0) continue;
	4661	color = 0;
	4662	shadow = -1;
	4663	whichtable = shadowmode_table;
	4664	palette_set_shadow_mode(machine, 0);
	4665	}
	4666	else
	4667	{
	4668	if (shdmask >= 0)
	4669	{
	4670	shadow = (color & K053247_CUSTOMSHADOW) ? (color >> K053247_SHDSHIFT) : (shadow >> 10);
	4671	if (shadow &= 3) palette_set_shadow_mode(machine, (shadow - 1) & shdmask);
	4672	}
	4673	else
	4674	shadow = 0;
	4675	}
	4676
	4677	color &= 0xffff; // strip attribute flags
	4678
	4679	if (flipscreenx)
	4680	{
	4681	ox = -ox;
	4682	if (!mirrorx) flipx = !flipx;
	4683	}
	4684	if (flipscreeny)
	4685	{
	4686	oy = -oy;
	4687	if (!mirrory) flipy = !flipy;
	4688	}
	4689
	4690	// apply wrapping and global offsets
	4691	if (k053246->wraparound)
	4692	{
	4693	ox = ( ox - offx) & 0x3ff;
	4694	oy = (-oy - offy) & 0x3ff;
	4695	if (ox >= 0x300) ox -= 0x400;
	4696	if (oy >= 0x280) oy -= 0x400;
	4697	}
	4698	else
	4699	{
	4700	ox =  ox - offx;
	4701	oy = -oy - offy;
	4702	}
	4703	ox += k053246->dx;
	4704	oy -= k053246->dy;
	4705
	4706	// apply global and display window offsets
	4707
	4708	/* the coordinates given are for the *center* of the sprite */
	4709	ox -= (zoomx * w) >> 13;
	4710	oy -= (zoomy * h) >> 13;
	4711
	4712	drawmode_table[k053246->gfx->color_granularity - 1] = shadow ? DRAWMODE_SHADOW : DRAWMODE_SOURCE;
	4713
	4714	for (y = 0; y < h; y++)
	4715	{
	4716	int sx, sy, zw, zh;
	4717
	4718	sy = oy + ((zoomy * y + (1 << 11)) >> 12);
	4719	zh = (oy + ((zoomy * (y + 1) + (1 << 11)) >> 12)) - sy;
	4720
	4721	for (x = 0; x < w; x++)
	4722	{
	4723	int c, fx, fy;
	4724
	4725	sx = ox + ((zoomx * x + (1 << 11)) >> 12);
	4726	zw = (ox + ((zoomx * (x+1) + (1 << 11)) >> 12)) - sx;
	4727	c = code;
	4728	if (mirrorx)
	4729	{
	4730	if ((flipx == 0) ^ ((x << 1) < w))
	4731	{
	4732	/* mirror left/right */
	4733	c += xoffset[(w - 1 - x + xa) & 7];
	4734	fx = 1;
	4735	}
	4736	else
	4737	{
	4738	c += xoffset[(x + xa) & 7];
	4739	fx = 0;
	4740	}
	4741	}
	4742	else
	4743	{
	4744	if (flipx) c += xoffset[(w - 1 - x + xa) & 7];
	4745	else c += xoffset[(x + xa) & 7];
	4746	fx = flipx;
	4747	}
	4748	if (mirrory)
	4749	{
	4750	if ((flipy == 0) ^ ((y<<1) >= h))
	4751	{
	4752	/* mirror top/bottom */
	4753	c += yoffset[(h - 1 - y + ya) & 7];
	4754	fy = 1;
	4755	}
	4756	else
	4757	{
	4758	c += yoffset[(y + ya) & 7];
	4759	fy = 0;
	4760	}
	4761	}
	4762	else
	4763	{
	4764	if (flipy) c += yoffset[(h - 1 - y + ya) & 7];
	4765	else c += yoffset[(y + ya) & 7];
	4766	fy = flipy;
	4767	}
	4768
	4769	if (nozoom)
	4770	{
	4771	pdrawgfx_transtable(bitmap,cliprect,k053246->gfx,
	4772	c,
	4773	color,
	4774	fx,fy,
	4775	sx,sy,
	4776	machine->priority_bitmap,primask,
	4777	whichtable,machine->shadow_table);
	4778	}
	4779	else
	4780	{
	4781	pdrawgfxzoom_transtable(bitmap,cliprect,k053246->gfx,
	4782	c,
	4783	color,
	4784	fx,fy,
	4785	sx,sy,
	4786	(zw << 16) >> 4,(zh << 16) >> 4,
	4787	machine->priority_bitmap,primask,
	4788	whichtable,machine->shadow_table);
	4789	}
	4790
	4791	if (mirrory && h == 1)  /* Simpsons shadows */
	4792	{
	4793	if (nozoom)
	4794	{
	4795	pdrawgfx_transtable(bitmap,cliprect,k053246->gfx,
	4796	c,
	4797	color,
	4798	fx,!fy,
	4799	sx,sy,
	4800	machine->priority_bitmap,primask,
	4801	whichtable,machine->shadow_table);
	4802	}
	4803	else
	4804	{
	4805	pdrawgfxzoom_transtable(bitmap,cliprect,k053246->gfx,
	4806	c,
	4807	color,
	4808	fx,!fy,
	4809	sx,sy,
	4810	(zw << 16) >> 4,(zh << 16) >> 4,
	4811	machine->priority_bitmap,primask,
	4812	whichtable,machine->shadow_table);
	4813	}
	4814	}
	4815	} // end of X loop
	4816	} // end of Y loop
	4817
	4818	} // end of sprite-list loop
	4819	#undef NUM_SPRITES
	4820	}
	4821
	4822
	4823	/*****************************************************************************
	4824	DEVICE INTERFACE
	4825	*****************************************************************************/
	4826
	4827	static DEVICE_START( k053247 )
	4828	{
	4829	k053247_state *k053247 = k053247_get_safe_token(device);
	4830	const k053247_interface *intf = k053247_get_interface(device);
	4831	running_machine *machine = device->machine;
	4832	UINT32 total;
	4833	static const gfx_layout spritelayout =
	4834	{
	4835	16,16,
	4836	0,
	4837	4,
	4838	{ 0, 1, 2, 3 },
	4839	{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4,
	4840	10*4, 11*4, 8*4, 9*4, 14*4, 15*4, 12*4, 13*4 },
	4841	{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
	4842	8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
	4843	128*8
	4844	};
	4845
	4846	k053247->screen = devtag_get_device(device->machine, intf->screen);
	4847
	4848	/* decode the graphics */
	4849	switch (intf->plane_order)
	4850	{
	4851	case NORMAL_PLANE_ORDER:
	4852	total = memory_region_length(machine, intf->gfx_memory_region) / 128;
	4853	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &spritelayout, 4);
	4854	break;
	4855
	4856	default:
	4857	fatalerror("Unsupported plane_order");
	4858	}
	4859
	4860	if (VERBOSE)
	4861	{
	4862	if (video_screen_get_format(k053247->screen) == BITMAP_FORMAT_RGB32)
	4863	{
	4864	if ((machine->config->video_attributes & (VIDEO_HAS_SHADOWS|VIDEO_HAS_HIGHLIGHTS)) != VIDEO_HAS_SHADOWS+VIDEO_HAS_HIGHLIGHTS)
	4865	popmessage("driver missing SHADOWS or HIGHLIGHTS flag");
	4866	}
	4867	else
	4868	{
	4869	if (!(machine->config->video_attributes & VIDEO_HAS_SHADOWS))
	4870	popmessage("driver should use VIDEO_HAS_SHADOWS");
	4871	}
	4872	}
	4873
	4874	/* deinterleave the graphics, if needed */
	4875	deinterleave_gfx(machine, intf->gfx_memory_region, intf->deinterleave);
	4876
	4877	k053247->dx = intf->dx;
	4878	k053247->dy = intf->dy;
	4879	k053247->memory_region = intf->gfx_memory_region;
	4880	k053247->gfx = machine->gfx[intf->gfx_num];
	4881	k053247->callback = intf->callback;
	4882
	4883	k053247->ram = auto_alloc_array(machine, UINT16, 0x1000/2);
	4884
	4885	state_save_register_device_item_pointer(device, 0, k053247->ram, 0x800);
	4886	state_save_register_device_item_array(device, 0, k053247->Kx46_regs);
	4887	state_save_register_device_item_array(device, 0, k053247->Kx47_regs);
	4888	state_save_register_device_item(device, 0, k053247->objcha_line);
	4889	state_save_register_device_item(device, 0, k053247->wraparound);
	4890	state_save_register_device_item(device, 0, k053247->z_rejection);
	4891	}
	4892
	4893	/* K055673 used with the 54246 in PreGX/Run and Gun/System GX games */
	4894	static DEVICE_START( k055673 )
	4895	{
	4896	k053247_state *k053247 = k053247_get_safe_token(device);
	4897	const k053247_interface *intf = k053247_get_interface(device);
	4898	running_machine *machine = device->machine;
	4899	UINT32 total;
	4900	UINT8 *s1, *s2, *d;
	4901	long i;
	4902	UINT16 *K055673_rom;
	4903	int size4;
	4904
	4905	static const gfx_layout spritelayout =   /* System GX sprite layout */
	4906	{
	4907	16,16,
	4908	0,
	4909	5,
	4910	{ 32, 24, 16, 8, 0 },
	4911	{ 0, 1, 2, 3, 4, 5, 6, 7, 40, 41, 42, 43, 44, 45, 46, 47 },
	4912	{ 0, 10*8, 10*8*2, 10*8*3, 10*8*4, 10*8*5, 10*8*6, 10*8*7, 10*8*8,
	4913	10*8*9, 10*8*10, 10*8*11, 10*8*12, 10*8*13, 10*8*14, 10*8*15 },
	4914	16*16*5
	4915	};
	4916	static const gfx_layout spritelayout2 =   /* Run and Gun sprite layout */
	4917	{
	4918	16,16,
	4919	0,
	4920	4,
	4921	{ 24, 16, 8, 0 },
	4922	{ 0, 1, 2, 3, 4, 5, 6, 7, 32, 33, 34, 35, 36, 37, 38, 39 },
	4923	{ 0, 64, 128, 192, 256, 320, 384, 448, 512, 576, 640, 704, 768, 832, 896, 960 },
	4924	16*16*4
	4925	};
	4926	static const gfx_layout spritelayout3 =   /* Lethal Enforcers II sprite layout */
	4927	{
	4928	16,16,
	4929	0,
	4930	8,
	4931	{ 8*1,8*0,8*3,8*2,8*5,8*4,8*7,8*6 },
	4932	{  0,1,2,3,4,5,6,7,64+0,64+1,64+2,64+3,64+4,64+5,64+6,64+7 },
	4933	{ 128*0, 128*1, 128*2,  128*3,  128*4,  128*5,  128*6,  128*7,
	4934	128*8, 128*9, 128*10, 128*11, 128*12, 128*13, 128*14, 128*15 },
	4935	128*16
	4936	};
	4937	static const gfx_layout spritelayout4 =   /* System GX 6bpp sprite layout */
	4938	{
	4939	16,16,
	4940	0,
	4941	6,
	4942	{ 40, 32, 24, 16, 8, 0 },
	4943	{ 0, 1, 2, 3, 4, 5, 6, 7, 48, 49, 50, 51, 52, 53, 54, 55 },
	4944	{ 0, 12*8, 12*8*2, 12*8*3, 12*8*4, 12*8*5, 12*8*6, 12*8*7, 12*8*8,
	4945	12*8*9, 12*8*10, 12*8*11, 12*8*12, 12*8*13, 12*8*14, 12*8*15 },
	4946	16*16*6
	4947	};
	4948
	4949	k053247->screen = devtag_get_device(device->machine, intf->screen);
	4950
	4951	K055673_rom = (UINT16 *)memory_region(machine, intf->gfx_memory_region);
	4952
	4953	/* decode the graphics */
	4954	switch (intf->plane_order)   /* layout would be more correct than plane_order, but we use k053247_interface */
	4955	{
	4956	case K055673_LAYOUT_GX:
	4957	size4 = (memory_region_length(machine, intf->gfx_memory_region) / (1024 * 1024)) / 5;
	4958	size4 *= 4 * 1024 * 1024;
	4959	/* set the # of tiles based on the 4bpp section */
	4960	K055673_rom = auto_alloc_array(machine, UINT16, size4 * 5 / 2);
	4961	d = (UINT8 *)K055673_rom;
	4962	// now combine the graphics together to form 5bpp
	4963	s1 = memory_region(machine, intf->gfx_memory_region); // 4bpp area
	4964	s2 = s1 + (size4);    // 1bpp area
	4965	for (i = 0; i < size4; i+= 4)
	4966	{
	4967	*d++ = *s1++;
	4968	*d++ = *s1++;
	4969	*d++ = *s1++;
	4970	*d++ = *s1++;
	4971	*d++ = *s2++;
	4972	}
	4973
	4974	total = size4 / 128;
	4975	decode_gfx(machine, intf->gfx_num, (UINT8 *)K055673_rom, total, &spritelayout, 4);
	4976	break;
	4977
	4978	case K055673_LAYOUT_RNG:
	4979	total = memory_region_length(machine, intf->gfx_memory_region) / (16 * 16 / 2);
	4980	decode_gfx(machine, intf->gfx_num, (UINT8 *)K055673_rom, total, &spritelayout2, 4);
	4981	break;
	4982
	4983	case K055673_LAYOUT_LE2:
	4984	total = memory_region_length(machine, intf->gfx_memory_region) / (16 * 16);
	4985	decode_gfx(machine, intf->gfx_num, (UINT8 *)K055673_rom, total, &spritelayout3, 4);
	4986	break;
	4987
	4988	case K055673_LAYOUT_GX6:
	4989	total = memory_region_length(machine, intf->gfx_memory_region) / (16 * 16 * 6 / 8);
	4990	decode_gfx(machine, intf->gfx_num, (UINT8 *)K055673_rom, total, &spritelayout4, 4);
	4991	break;
	4992
	4993	default:
	4994	fatalerror("Unsupported layout");
	4995	}
	4996
	4997	if (VERBOSE && !(machine->config->video_attributes & VIDEO_HAS_SHADOWS))
	4998	popmessage("driver should use VIDEO_HAS_SHADOWS");
	4999
	5000	k053247->dx = intf->dx;
	5001	k053247->dy = intf->dy;
	5002	k053247->memory_region = intf->gfx_memory_region;
	5003	k053247->gfx = machine->gfx[intf->gfx_num];
	5004	k053247->callback = intf->callback;
	5005
	5006	k053247->ram = auto_alloc_array(machine, UINT16, 0x1000 / 2);
	5007
	5008	state_save_register_device_item_pointer(device, 0, k053247->ram, 0x800);
	5009	state_save_register_device_item_array(device, 0, k053247->Kx46_regs);
	5010	state_save_register_device_item_array(device, 0, k053247->Kx47_regs);
	5011	state_save_register_device_item(device, 0, k053247->objcha_line);
	5012	state_save_register_device_item(device, 0, k053247->wraparound);
	5013	state_save_register_device_item(device, 0, k053247->z_rejection);
	5014	}
	5015
	5016	static DEVICE_RESET( k053247 )
	5017	{
	5018	k053247_state *k053247 = k053247_get_safe_token(device);
	5019
	5020	k053247->wraparound = 1;
	5021	k053247->z_rejection = -1;
	5022	k053247->objcha_line = CLEAR_LINE;
	5023
	5024	memset(k053247->Kx46_regs, 0, 8);
	5025	memset(k053247->Kx47_regs, 0, 32);
	5026	}
	5027
	5028	/*
	5029	In a K053247+K055555 setup objects with Z-code 0x00 should be ignored
	5030	when PRFLIP is cleared, while objects with Z-code 0xff should be
	5031	ignored when PRFLIP is set.
	5032
	5033	These behaviors can also be seen in older K053245(6)+K053251 setups.
	5034	Bucky'O Hare, The Simpsons and Sunset Riders rely on their implications
	5035	to prepare and retire sprites. They probably apply to many other Konami
	5036	games but it's hard to tell because most artifacts have been filtered
	5037	by exclusion sort.
	5038
	5039	A driver may call K05324x_set_z_rejection() to set which zcode to ignore.
	5040	Parameter:
	5041	-1 = accept all(default)
	5042	0x00-0xff = zcode to ignore
	5043	*/
	5044
	5045
	5046	void k05324x_set_z_rejection( const device_config *device, int zcode )
	5047	{
	5048	k05324x_state *k05324x = k05324x_get_safe_token(device);
	5049	k05324x->z_rejection = zcode;
	5050	}
	5051
	5052	void k053247_set_z_rejection( const device_config *device, int zcode )
	5053	{
	5054	k053247_state *k053247 = k053247_get_safe_token(device);
	5055	k053247->z_rejection = zcode;
	5056	}
	5057
	5058	/***************************************************************************/
	5059	/*                                                                         */
	5060	/*                                 051316                                  */
	5061	/*                                                                         */
	5062	/***************************************************************************/
	5063
	5064	typedef struct _k051316_state k051316_state;
	5065	struct _k051316_state
	5066	{
	5067	UINT8    *ram;
	5068
	5069	tilemap  *tmap;
	5070
	5071	int      gfxnum, wraparound, bpp;
	5072	int      offset[2];
	5073	UINT8    ctrlram[16];
	5074
	5075	k051316_callback callback;
	5076
	5077	const char *memory_region;
	5078	};
	5079
	5080	/*****************************************************************************
	5081	INLINE FUNCTIONS
	5082	*****************************************************************************/
	5083
	5084	INLINE k051316_state *k051316_get_safe_token( const device_config *device )
	5085	{
	5086	assert(device != NULL);
	5087	assert(device->token != NULL);
	5088	assert(device->type == K051316);
	5089
	5090	return (k051316_state *)device->token;
	5091	}
	5092
	5093	INLINE const k051316_interface *k051316_get_interface( const device_config *device )
	5094	{
	5095	assert(device != NULL);
	5096	assert(device->type == K051316);
	5097	return (const k051316_interface *) device->static_config;
	5098	}
	5099
	5100	/*****************************************************************************
	5101	DEVICE HANDLERS
	5102	*****************************************************************************/
	5103
	5104	READ8_DEVICE_HANDLER( k051316_r )
	5105	{
	5106	k051316_state *k051316= k051316_get_safe_token(device);
	5107	return k051316->ram[offset];
	5108	}
	5109
	5110	WRITE8_DEVICE_HANDLER( k051316_w )
	5111	{
	5112	k051316_state *k051316= k051316_get_safe_token(device);
	5113
	5114	k051316->ram[offset] = data;
	5115	tilemap_mark_tile_dirty(k051316->tmap, offset & 0x3ff);
	5116	}
	5117
	5118
	5119	READ8_DEVICE_HANDLER( k051316_rom_r )
	5120	{
	5121	k051316_state *k051316= k051316_get_safe_token(device);
	5122
	5123	if ((k051316->ctrlram[0x0e] & 0x01) == 0)
	5124	{
	5125	int addr = offset + (k051316->ctrlram[0x0c] << 11) + (k051316->ctrlram[0x0d] << 19);
	5126	if (k051316->bpp <= 4)
	5127	addr /= 2;
	5128	addr &= memory_region_length(device->machine, k051316->memory_region) - 1;
	5129
	5130	//  popmessage("%s: offset %04x addr %04x", cpuexec_describe_context(device->machine), offset, addr);
	5131
	5132	return memory_region(device->machine, k051316->memory_region)[addr];
	5133	}
	5134	else
	5135	{
	5136	//logerror("%s: read 051316 ROM offset %04x but reg 0x0c bit 0 not clear\n", cpuexec_describe_context(device->machine), offset);
	5137	return 0;
	5138	}
	5139	}
	5140
	5141	WRITE8_DEVICE_HANDLER( k051316_ctrl_w )
	5142	{
	5143	k051316_state *k051316= k051316_get_safe_token(device);
	5144	k051316->ctrlram[offset] = data;
	5145	//if (offset >= 0x0c) logerror("%s: write %02x to 051316 reg %x\n", cpuexec_describe_context(device->machine), data, offset);
	5146	}
	5147
	5148	// a few games (ajax, rollerg, ultraman, etc.) can enable and disable wraparound after start
	5149	void k051316_wraparound_enable( const device_config *device, int status )
	5150	{
	5151	k051316_state *k051316= k051316_get_safe_token(device);
	5152	k051316->wraparound = status;
	5153	}
	5154
	5155	/***************************************************************************
	5156
	5157	Callbacks for the TileMap code
	5158
	5159	***************************************************************************/
	5160
	5161	INLINE void k051316_get_tile_info( const device_config *device, tile_data *tileinfo, int tile_index )
	5162	{
	5163	k051316_state *k051316 = k051316_get_safe_token(device);
	5164	int code = k051316->ram[tile_index];
	5165	int color = k051316->ram[tile_index + 0x400];
	5166	int flags = 0;
	5167
	5168	k051316->callback(device->machine, &code, &color, &flags);
	5169
	5170	SET_TILE_INFO_DEVICE(
	5171	k051316->gfxnum,
	5172	code,
	5173	color,
	5174	flags);
	5175	}
	5176
	5177
	5178	static TILE_GET_INFO_DEVICE( k051316_get_tile_info0 ) { k051316_get_tile_info(device, tileinfo, tile_index); }
	5179
	5180
	5181	void k051316_zoom_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int flags, UINT32 priority )
	5182	{
	5183	k051316_state *k051316= k051316_get_safe_token(device);
	5184	UINT32 startx, starty;
	5185	int incxx, incxy, incyx, incyy;
	5186
	5187	startx = 256 * ((INT16)(256 * k051316->ctrlram[0x00] + k051316->ctrlram[0x01]));
	5188	incxx  =        (INT16)(256 * k051316->ctrlram[0x02] + k051316->ctrlram[0x03]);
	5189	incyx  =        (INT16)(256 * k051316->ctrlram[0x04] + k051316->ctrlram[0x05]);
	5190	starty = 256 * ((INT16)(256 * k051316->ctrlram[0x06] + k051316->ctrlram[0x07]));
	5191	incxy  =        (INT16)(256 * k051316->ctrlram[0x08] + k051316->ctrlram[0x09]);
	5192	incyy  =        (INT16)(256 * k051316->ctrlram[0x0a] + k051316->ctrlram[0x0b]);
	5193
	5194	startx -= (16 + k051316->offset[1]) * incyx;
	5195	starty -= (16 + k051316->offset[1]) * incyy;
	5196
	5197	startx -= (89 + k051316->offset[0]) * incxx;
	5198	starty -= (89 + k051316->offset[0]) * incxy;
	5199
	5200	tilemap_draw_roz(bitmap,cliprect,k051316->tmap,startx << 5,starty << 5,
	5201	incxx << 5,incxy << 5,incyx << 5,incyy << 5,
	5202	k051316->wraparound,
	5203	flags,priority);
	5204
	5205	#if 0
	5206	popmessage("%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x",
	5207	k051316->ctrlram[0x00],
	5208	k051316->ctrlram[0x01],
	5209	k051316->ctrlram[0x02],
	5210	k051316->ctrlram[0x03],
	5211	k051316->ctrlram[0x04],
	5212	k051316->ctrlram[0x05],
	5213	k051316->ctrlram[0x06],
	5214	k051316->ctrlram[0x07],
	5215	k051316->ctrlram[0x08],
	5216	k051316->ctrlram[0x09],
	5217	k051316->ctrlram[0x0a],
	5218	k051316->ctrlram[0x0b],
	5219	k051316->ctrlram[0x0c],   /* bank for ROM testing */
	5220	k051316->ctrlram[0x0d],
	5221	k051316->ctrlram[0x0e],   /* 0 = test ROMs */
	5222	k051316->ctrlram[0x0f]);
	5223	#endif
	5224	}
	5225
	5226
	5227	/*****************************************************************************
	5228	DEVICE INTERFACE
	5229	*****************************************************************************/
	5230
	5231	static DEVICE_START( k051316 )
	5232	{
	5233	k051316_state *k051316 = k051316_get_safe_token(device);
	5234	const k051316_interface *intf = k051316_get_interface(device);
	5235	running_machine *machine = device->machine;
	5236
	5237	int is_tail2nos = 0;
	5238	UINT32 total;
	5239
	5240	static const gfx_layout charlayout4 =
	5241	{
	5242	16,16,
	5243	0,
	5244	4,
	5245	{ 0, 1, 2, 3 },
	5246	{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4,
	5247	8*4, 9*4, 10*4, 11*4, 12*4, 13*4, 14*4, 15*4 },
	5248	{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
	5249	8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
	5250	128*8
	5251	};
	5252
	5253	static const gfx_layout charlayout7 =
	5254	{
	5255	16,16,
	5256	0,
	5257	7,
	5258	{ 1,2,3,4,5,6,7 },
	5259	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
	5260	8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
	5261	{ 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128,
	5262	8*128, 9*128, 10*128, 11*128, 12*128, 13*128, 14*128, 15*128 },
	5263	256*8
	5264	};
	5265
	5266	static const gfx_layout charlayout8 =
	5267	{
	5268	16,16,
	5269	0,
	5270	8,
	5271	{ 0,1,2,3,4,5,6,7 },
	5272	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
	5273	8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
	5274	{ 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128,
	5275	8*128, 9*128, 10*128, 11*128, 12*128, 13*128, 14*128, 15*128 },
	5276	256*8
	5277	};
	5278
	5279	static const gfx_layout charlayout_tail2nos =
	5280	{
	5281	16,16,
	5282	0,
	5283	4,
	5284	{ 0, 1, 2, 3 },
	5285	{ XOR(0)*4, XOR(1)*4, XOR(2)*4, XOR(3)*4, XOR(4)*4, XOR(5)*4, XOR(6)*4, XOR(7)*4,
	5286	XOR(8)*4, XOR(9)*4, XOR(10)*4, XOR(11)*4, XOR(12)*4, XOR(13)*4, XOR(14)*4, XOR(15)*4 },
	5287	{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
	5288	8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
	5289	128*8
	5290	};
	5291
	5292	/* decode the graphics */
	5293	switch (intf->bpp)
	5294	{
	5295	case -4:
	5296	total = 0x400;
	5297	is_tail2nos = 1;
	5298	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout_tail2nos, 4);
	5299	break;
	5300
	5301	case 4:
	5302	total = memory_region_length(machine, intf->gfx_memory_region) / 128;
	5303	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout4, 4);
	5304	break;
	5305
	5306	case 7:
	5307	total = memory_region_length(machine, intf->gfx_memory_region) / 256;
	5308	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout7, 7);
	5309	break;
	5310
	5311	case 8:
	5312	total = memory_region_length(machine, intf->gfx_memory_region) / 256;
	5313	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout8, 8);
	5314	break;
	5315
	5316	default:
	5317	fatalerror("Unsupported bpp");
	5318	}
	5319
	5320	k051316->memory_region = intf->gfx_memory_region;
	5321	k051316->gfxnum = intf->gfx_num;
	5322	k051316->bpp = is_tail2nos ? 4 : intf->bpp;   // tail2nos is passed with bpp = -4 to setup the custom charlayout!
	5323	k051316->callback = intf->callback;
	5324
	5325	k051316->tmap = tilemap_create_device(device, k051316_get_tile_info0, tilemap_scan_rows, 16, 16, 32, 32);
	5326
	5327	k051316->ram = auto_alloc_array(machine, UINT8, 0x800);
	5328
	5329	if (!intf->pen_is_mask)
	5330	tilemap_set_transparent_pen(k051316->tmap, intf->transparent_pen);
	5331	else
	5332	{
	5333	tilemap_map_pens_to_layer(k051316->tmap, 0, 0, 0, TILEMAP_PIXEL_LAYER1);
	5334	tilemap_map_pens_to_layer(k051316->tmap, 0, intf->transparent_pen, intf->transparent_pen, TILEMAP_PIXEL_LAYER0);
	5335	}
	5336
	5337	k051316->wraparound = intf->wrap;
	5338	k051316->offset[0] = intf->xoffs;
	5339	k051316->offset[1] = intf->yoffs;
	5340
	5341	state_save_register_device_item_pointer(device, 0, k051316->ram, 0x800);
	5342	state_save_register_device_item_array(device, 0, k051316->ctrlram);
	5343	state_save_register_device_item(device, 0, k051316->wraparound);
	5344	}
	5345
	5346	static DEVICE_RESET( k051316 )
	5347	{
	5348	k051316_state *k051316 = k051316_get_safe_token(device);
	5349
	5350	memset(k051316->ctrlram,  0, 0x10);
	5351	}
	5352
	5353	/***************************************************************************/
	5354	/*                                                                         */
	5355	/*                                 053936                                  */
	5356	/*                                                                         */
	5357	/***************************************************************************/
	5358
	5359	typedef struct _k053936_state k053936_state;
	5360	struct _k053936_state
	5361	{
	5362	UINT16    *ctrl;
	5363	UINT16    *linectrl;
	5364
	5365	int      wraparound;
	5366	int      offset[2];
	5367	};
	5368
	5369	/*****************************************************************************
	5370	INLINE FUNCTIONS
	5371	*****************************************************************************/
	5372
	5373	INLINE k053936_state *k053936_get_safe_token( const device_config *device )
	5374	{
	5375	assert(device != NULL);
	5376	assert(device->token != NULL);
	5377	assert(device->type == K053936);
	5378
	5379	return (k053936_state *)device->token;
	5380	}
	5381
	5382	INLINE const k053936_interface *k053936_get_interface( const device_config *device )
	5383	{
	5384	assert(device != NULL);
	5385	assert(device->type == K053936);
	5386	return (const k053936_interface *) device->static_config;
	5387	}
	5388
	5389	/*****************************************************************************
	5390	DEVICE HANDLERS
	5391	*****************************************************************************/
	5392
	5393	WRITE16_DEVICE_HANDLER( k053936_ctrl_w )
	5394	{
	5395	k053936_state *k053936= k053936_get_safe_token(device);
	5396	COMBINE_DATA(&k053936->ctrl[offset]);
	5397	}
	5398
	5399	/* FIXME: this is probably unused... check! */
	5400	READ16_DEVICE_HANDLER( k053936_ctrl_r )
	5401	{
	5402	k053936_state *k053936= k053936_get_safe_token(device);
	5403	return k053936->ctrl[offset];
	5404	}
	5405
	5406	WRITE16_DEVICE_HANDLER( k053936_linectrl_w )
	5407	{
	5408	k053936_state *k053936= k053936_get_safe_token(device);
	5409	COMBINE_DATA(&k053936->linectrl[offset]);
	5410	}
	5411
	5412	READ16_DEVICE_HANDLER( k053936_linectrl_r )
	5413	{
	5414	k053936_state *k053936= k053936_get_safe_token(device);
	5415	return k053936->linectrl[offset];
	5416	}
	5417
	5418	// there is another implementation of this in  video/konamigx.c (!)
	5419	//  why? shall they be merged?
	5420	void k053936_zoom_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, tilemap *tmap, int flags, UINT32 priority, int glfgreat_hack )
	5421	{
	5422	k053936_state *k053936= k053936_get_safe_token(device);
	5423	if (!tmap)
	5424	return;
	5425
	5426	if (k053936->ctrl[0x07] & 0x0040)
	5427	{
	5428	UINT32 startx, starty;
	5429	int incxx, incxy;
	5430	rectangle my_clip;
	5431	int y, maxy;
	5432
	5433	// Racin' Force will get to here if glfgreat_hack is enabled, and it ends
	5434	// up setting a maximum y value of '13', thus causing nothing to be drawn.
	5435	// It looks like the roz output should be flipped somehow as it seems to be
	5436	// displaying the wrong areas of the tilemap and is rendered upside down,
	5437	// although due to the additional post-processing the voxel renderer performs
	5438	// it's difficult to know what the output SHOULD be.  (hold W in Racin' Force
	5439	// to see the chip output)
	5440
	5441	if (((k053936->ctrl[0x07] & 0x0002) && k053936->ctrl[0x09]) && (glfgreat_hack))   /* wrong, but fixes glfgreat */
	5442	{
	5443	my_clip.min_x = k053936->ctrl[0x08] + k053936->offset[0] + 2;
	5444	my_clip.max_x = k053936->ctrl[0x09] + k053936->offset[0] + 2 - 1;
	5445	if (my_clip.min_x < cliprect->min_x)
	5446	my_clip.min_x = cliprect->min_x;
	5447	if (my_clip.max_x > cliprect->max_x)
	5448	my_clip.max_x = cliprect->max_x;
	5449
	5450	y = k053936->ctrl[0x0a] + k053936->offset[1] - 2;
	5451	if (y < cliprect->min_y)
	5452	y = cliprect->min_y;
	5453	maxy = k053936->ctrl[0x0b] + k053936->offset[1] - 2 - 1;
	5454	if (maxy > cliprect->max_y)
	5455	maxy = cliprect->max_y;
	5456	}
	5457	else
	5458	{
	5459	my_clip.min_x = cliprect->min_x;
	5460	my_clip.max_x = cliprect->max_x;
	5461
	5462	y = cliprect->min_y;
	5463	maxy = cliprect->max_y;
	5464	}
	5465
	5466	while (y <= maxy)
	5467	{
	5468	UINT16 *lineaddr = k053936->linectrl + 4 * ((y - k053936->offset[1]) & 0x1ff);
	5469
	5470	my_clip.min_y = my_clip.max_y = y;
	5471
	5472	startx = 256 * (INT16)(lineaddr[0] + k053936->ctrl[0x00]);
	5473	starty = 256 * (INT16)(lineaddr[1] + k053936->ctrl[0x01]);
	5474	incxx  =       (INT16)(lineaddr[2]);
	5475	incxy  =       (INT16)(lineaddr[3]);
	5476
	5477	if (k053936->ctrl[0x06] & 0x8000)
	5478	incxx *= 256;
	5479
	5480	if (k053936->ctrl[0x06] & 0x0080)
	5481	incxy *= 256;
	5482
	5483	startx -= k053936->offset[0] * incxx;
	5484	starty -= k053936->offset[0] * incxy;
	5485
	5486	tilemap_draw_roz(bitmap,&my_clip,tmap,startx << 5,starty << 5,
	5487	incxx << 5,incxy << 5,0,0,
	5488	k053936->wraparound,
	5489	flags,priority);
	5490
	5491	y++;
	5492	}
	5493	}
	5494	else   /* "simple" mode */
	5495	{
	5496	UINT32 startx, starty;
	5497	int incxx, incxy, incyx, incyy;
	5498
	5499	startx = 256 * (INT16)(k053936->ctrl[0x00]);
	5500	starty = 256 * (INT16)(k053936->ctrl[0x01]);
	5501	incyx  =       (INT16)(k053936->ctrl[0x02]);
	5502	incyy  =       (INT16)(k053936->ctrl[0x03]);
	5503	incxx  =       (INT16)(k053936->ctrl[0x04]);
	5504	incxy  =       (INT16)(k053936->ctrl[0x05]);
	5505
	5506	if (k053936->ctrl[0x06] & 0x4000)
	5507	{
	5508	incyx *= 256;
	5509	incyy *= 256;
	5510	}
	5511
	5512	if (k053936->ctrl[0x06] & 0x0040)
	5513	{
	5514	incxx *= 256;
	5515	incxy *= 256;
	5516	}
	5517
	5518	startx -= k053936->offset[1] * incyx;
	5519	starty -= k053936->offset[1] * incyy;
	5520
	5521	startx -= k053936->offset[0] * incxx;
	5522	starty -= k053936->offset[0] * incxy;
	5523
	5524	tilemap_draw_roz(bitmap,cliprect,tmap,startx << 5,starty << 5,
	5525	incxx << 5,incxy << 5,incyx << 5,incyy << 5,
	5526	k053936->wraparound,
	5527	flags,priority);
	5528	}
	5529
	5530	#if 0
	5531	if (input_code_pressed(machine, KEYCODE_D))
	5532	popmessage("%04x %04x %04x %04x\n%04x %04x %04x %04x\n%04x %04x %04x %04x\n%04x %04x %04x %04x",
	5533	k053936->ctrl[0x00],
	5534	k053936->ctrl[0x01],
	5535	k053936->ctrl[0x02],
	5536	k053936->ctrl[0x03],
	5537	k053936->ctrl[0x04],
	5538	k053936->ctrl[0x05],
	5539	k053936->ctrl[0x06],
	5540	k053936->ctrl[0x07],
	5541	k053936->ctrl[0x08],
	5542	k053936->ctrl[0x09],
	5543	k053936->ctrl[0x0a],
	5544	k053936->ctrl[0x0b],
	5545	k053936->ctrl[0x0c],
	5546	k053936->ctrl[0x0d],
	5547	k053936->ctrl[0x0e],
	5548	k053936->ctrl[0x0f]);
	5549	#endif
	5550	}
	5551
	5552	/*****************************************************************************
	5553	DEVICE INTERFACE
	5554	*****************************************************************************/
	5555
	5556	static DEVICE_START( k053936 )
	5557	{
	5558	k053936_state *k053936 = k053936_get_safe_token(device);
	5559	const k053936_interface *intf = k053936_get_interface(device);
	5560
	5561	k053936->ctrl = auto_alloc_array(device->machine, UINT16, 0x20);
	5562	k053936->linectrl = auto_alloc_array(device->machine, UINT16, 0x4000);
	5563
	5564	k053936->wraparound = intf->wrap;
	5565	k053936->offset[0] = intf->xoff;
	5566	k053936->offset[1] = intf->yoff;
	5567
	5568	state_save_register_device_item_pointer(device, 0, k053936->ctrl, 0x20);
	5569	state_save_register_device_item_pointer(device, 0, k053936->linectrl, 0x4000);
	5570	}
	5571
	5572	static DEVICE_RESET( k053936 )
	5573	{
	5574	k053936_state *k053936 = k053936_get_safe_token(device);
	5575
	5576	memset(k053936->ctrl, 0, 0x20);
	5577	}
	5578
	5579	/***************************************************************************/
	5580	/*                                                                         */
	5581	/*                                 053251                                  */
	5582	/*                                                                         */
	5583	/***************************************************************************/
	5584
	5585	typedef struct _k053251_state k053251_state;
	5586	struct _k053251_state
	5587	{
	5588	int      dirty_tmap[5];
	5589
	5590	UINT8    ram[16];
	5591	int      tilemaps_set;
	5592	int      palette_index[5];
	5593	};
	5594
	5595	/*****************************************************************************
	5596	INLINE FUNCTIONS
	5597	*****************************************************************************/
	5598
	5599	INLINE k053251_state *k053251_get_safe_token( const device_config *device )
	5600	{
	5601	assert(device != NULL);
	5602	assert(device->token != NULL);
	5603	assert(device->type == K053251);
	5604
	5605	return (k053251_state *)device->token;
	5606	}
	5607
	5608	/*****************************************************************************
	5609	DEVICE HANDLERS
	5610	*****************************************************************************/
	5611
	5612	void k053251_postload_reset_indexes( const device_config *device )
	5613	{
	5614	k053251_state *k053251 = k053251_get_safe_token(device);
	5615
	5616	k053251->palette_index[0] = 32 * ((k053251->ram[9] >> 0) & 0x03);
	5617	k053251->palette_index[1] = 32 * ((k053251->ram[9] >> 2) & 0x03);
	5618	k053251->palette_index[2] = 32 * ((k053251->ram[9] >> 4) & 0x03);
	5619	k053251->palette_index[3] = 16 * ((k053251->ram[10] >> 0) & 0x07);
	5620	k053251->palette_index[4] = 16 * ((k053251->ram[10] >> 3) & 0x07);
	5621	}
	5622
	5623	WRITE8_DEVICE_HANDLER( k053251_w )
	5624	{
	5625	k053251_state *k053251 = k053251_get_safe_token(device);
	5626	int i, newind;
	5627
	5628	data &= 0x3f;
	5629
	5630	if (k053251->ram[offset] != data)
	5631	{
	5632	k053251->ram[offset] = data;
	5633	if (offset == 9)
	5634	{
	5635	/* palette base index */
	5636	for (i = 0; i < 3; i++)
	5637	{
	5638	newind = 32 * ((data >> 2 * i) & 0x03);
	5639	if (k053251->palette_index[i] != newind)
	5640	{
	5641	k053251->palette_index[i] = newind;
	5642	k053251->dirty_tmap[i] = 1;
	5643	}
	5644	}
	5645
	5646	if (!k053251->tilemaps_set)
	5647	tilemap_mark_all_tiles_dirty_all(device->machine);
	5648	}
	5649	else if (offset == 10)
	5650	{
	5651	/* palette base index */
	5652	for (i = 0; i < 2; i++)
	5653	{
	5654	newind = 16 * ((data >> 3 * i) & 0x07);
	5655	if (k053251->palette_index[3 + i] != newind)
	5656	{
	5657	k053251->palette_index[3 + i] = newind;
	5658	k053251->dirty_tmap[3 + i] = 1;
	5659	}
	5660	}
	5661
	5662	if (!k053251->tilemaps_set)
	5663	tilemap_mark_all_tiles_dirty_all(device->machine);
	5664	}
	5665	}
	5666	}
	5667
	5668	WRITE16_DEVICE_HANDLER( k053251_lsb_w )
	5669	{
	5670	if (ACCESSING_BITS_0_7)
	5671	k053251_w(device, offset, data & 0xff);
	5672	}
	5673
	5674	WRITE16_DEVICE_HANDLER( k053251_msb_w )
	5675	{
	5676	if (ACCESSING_BITS_8_15)
	5677	k053251_w(device, offset, (data >> 8) & 0xff);
	5678	}
	5679
	5680	int k053251_get_priority( const device_config *device, int ci )
	5681	{
	5682	k053251_state *k053251 = k053251_get_safe_token(device);
	5683	return k053251->ram[ci];
	5684	}
	5685
	5686	int k053251_get_palette_index( const device_config *device, int ci )
	5687	{
	5688	k053251_state *k053251 = k053251_get_safe_token(device);
	5689	return k053251->palette_index[ci];
	5690	}
	5691
	5692	int k053251_get_tmap_dirty( const device_config *device, int tmap_num )
	5693	{
	5694	k053251_state *k053251 = k053251_get_safe_token(device);
	5695	assert(tmap_num < 5);
	5696	return k053251->dirty_tmap[tmap_num];
	5697	}
	5698
	5699	void k053251_set_tmap_dirty( const device_config *device, int tmap_num, int data )
	5700	{
	5701	k053251_state *k053251 = k053251_get_safe_token(device);
	5702	assert(tmap_num < 5);
	5703	k053251->dirty_tmap[tmap_num] = data ? 1 : 0;
	5704	}
	5705
	5706
	5707	/*****************************************************************************
	5708	DEVICE INTERFACE
	5709	*****************************************************************************/
	5710
	5711	static DEVICE_START( k053251 )
	5712	{
	5713	k053251_state *k053251 = k053251_get_safe_token(device);
	5714
	5715	state_save_register_device_item_array(device, 0, k053251->ram);
	5716	state_save_register_device_item(device, 0, k053251->tilemaps_set);
	5717	state_save_register_device_item_array(device, 0, k053251->dirty_tmap);
	5718	}
	5719
	5720	static DEVICE_RESET( k053251 )
	5721	{
	5722	k053251_state *k053251 = k053251_get_safe_token(device);
	5723	int i;
	5724
	5725	for (i = 0; i < 0x10; i++)
	5726	k053251->ram[i] = 0;
	5727
	5728	for (i = 0; i < 5; i++)
	5729	k053251->dirty_tmap[i] = 0;
	5730	}
	5731
	5732
	5733	/***************************************************************************/
	5734	/*                                                                         */
	5735	/*                                 054000                                  */
	5736	/*                                                                         */
	5737	/***************************************************************************/
	5738
	5739	typedef struct _k054000_state k054000_state;
	5740	struct _k054000_state
	5741	{
	5742	UINT8    regs[0x20];
	5743	};
	5744
	5745	/*****************************************************************************
	5746	INLINE FUNCTIONS
	5747	*****************************************************************************/
	5748
	5749	INLINE k054000_state *k054000_get_safe_token( const device_config *device )
	5750	{
	5751	assert(device != NULL);
	5752	assert(device->token != NULL);
	5753	assert(device->type == K054000);
	5754
	5755	return (k054000_state *)device->token;
	5756	}
	5757
	5758	/*****************************************************************************
	5759	DEVICE HANDLERS
	5760	*****************************************************************************/
	5761
	5762	WRITE8_DEVICE_HANDLER( k054000_w )
	5763	{
	5764	k054000_state *k054000 = k054000_get_safe_token(device);
	5765
	5766	//logerror("%04x: write %02x to 054000 address %02x\n",cpu_get_pc(space->cpu),data,offset);
	5767	k054000->regs[offset] = data;
	5768	}
	5769
	5770	READ8_DEVICE_HANDLER( k054000_r )
	5771	{
	5772	k054000_state *k054000 = k054000_get_safe_token(device);
	5773	int Acx, Acy, Aax, Aay;
	5774	int Bcx, Bcy, Bax, Bay;
	5775
	5776	//logerror("%04x: read 054000 address %02x\n", cpu_get_pc(space->cpu), offset);
	5777
	5778	if (offset != 0x18)
	5779	return 0;
	5780
	5781	Acx = (k054000->regs[0x01] << 16) | (k054000->regs[0x02] << 8) | k054000->regs[0x03];
	5782	Acy = (k054000->regs[0x09] << 16) | (k054000->regs[0x0a] << 8) | k054000->regs[0x0b];
	5783
	5784	/* TODO: this is a hack to make thndrx2 pass the startup check. It is certainly wrong. */
	5785	if (k054000->regs[0x04] == 0xff)
	5786	Acx+=3;
	5787	if (k054000->regs[0x0c] == 0xff)
	5788	Acy+=3;
	5789
	5790	Aax = k054000->regs[0x06] + 1;
	5791	Aay = k054000->regs[0x07] + 1;
	5792
	5793	Bcx = (k054000->regs[0x15] << 16) | (k054000->regs[0x16] << 8) | k054000->regs[0x17];
	5794	Bcy = (k054000->regs[0x11] << 16) | (k054000->regs[0x12] << 8) | k054000->regs[0x13];
	5795	Bax = k054000->regs[0x0e] + 1;
	5796	Bay = k054000->regs[0x0f] + 1;
	5797
	5798	if (Acx + Aax < Bcx - Bax)
	5799	return 1;
	5800
	5801	if (Bcx + Bax < Acx - Aax)
	5802	return 1;
	5803
	5804	if (Acy + Aay < Bcy - Bay)
	5805	return 1;
	5806
	5807	if (Bcy + Bay < Acy - Aay)
	5808	return 1;
	5809
	5810	return 0;
	5811	}
	5812
	5813	READ16_DEVICE_HANDLER( k054000_lsb_r )
	5814	{
	5815	return k054000_r(device, offset);
	5816	}
	5817
	5818	WRITE16_DEVICE_HANDLER( k054000_lsb_w )
	5819	{
	5820	if (ACCESSING_BITS_0_7)
	5821	k054000_w(device, offset, data & 0xff);
	5822	}
	5823
	5824	/*****************************************************************************
	5825	DEVICE INTERFACE
	5826	*****************************************************************************/
	5827
	5828	static DEVICE_START( k054000 )
	5829	{
	5830	k054000_state *k054000 = k054000_get_safe_token(device);
	5831
	5832	state_save_register_device_item_array(device, 0, k054000->regs);
	5833	}
	5834
	5835	static DEVICE_RESET( k054000 )
	5836	{
	5837	k054000_state *k054000 = k054000_get_safe_token(device);
	5838	int i;
	5839
	5840	for (i = 0; i < 0x20; i++)
	5841	k054000->regs[i] = 0;
	5842	}
	5843
	5844
	5845	/***************************************************************************/
	5846	/*                                                                         */
	5847	/*                                 051733                                  */
	5848	/*                                                                         */
	5849	/***************************************************************************/
	5850
	5851	typedef struct _k051733_state k051733_state;
	5852	struct _k051733_state
	5853	{
	5854	UINT8    ram[0x20];
	5855	};
	5856
	5857	/*****************************************************************************
	5858	INLINE FUNCTIONS
	5859	*****************************************************************************/
	5860
	5861	INLINE k051733_state *k051733_get_safe_token( const device_config *device )
	5862	{
	5863	assert(device != NULL);
	5864	assert(device->token != NULL);
	5865	assert(device->type == K051733);
	5866
	5867	return (k051733_state *)device->token;
	5868	}
	5869
	5870	/*****************************************************************************
	5871	DEVICE HANDLERS
	5872	*****************************************************************************/
	5873
	5874	WRITE8_DEVICE_HANDLER( k051733_w )
	5875	{
	5876	k051733_state *k051733= k051733_get_safe_token(device);
	5877	//logerror("%04x: write %02x to 051733 address %02x\n", cpu_get_pc(space->cpu), data, offset);
	5878
	5879	k051733->ram[offset] = data;
	5880	}
	5881
	5882
	5883	static int k051733_int_sqrt( UINT32 op )
	5884	{
	5885	UINT32 i = 0x8000;
	5886	UINT32 step = 0x4000;
	5887
	5888	while (step)
	5889	{
	5890	if (i * i == op)
	5891	return i;
	5892	else if (i * i > op)
	5893	i -= step;
	5894	else
	5895	i += step;
	5896	step >>= 1;
	5897	}
	5898	return i;
	5899	}
	5900
	5901	READ8_DEVICE_HANDLER( k051733_r )
	5902	{
	5903	k051733_state *k051733= k051733_get_safe_token(device);
	5904
	5905	int op1 = (k051733->ram[0x00] << 8) | k051733->ram[0x01];
	5906	int op2 = (k051733->ram[0x02] << 8) | k051733->ram[0x03];
	5907	int op3 = (k051733->ram[0x04] << 8) | k051733->ram[0x05];
	5908
	5909	int rad = (k051733->ram[0x06] << 8) | k051733->ram[0x07];
	5910	int yobj1c = (k051733->ram[0x08] << 8) | k051733->ram[0x09];
	5911	int xobj1c = (k051733->ram[0x0a] << 8) | k051733->ram[0x0b];
	5912	int yobj2c = (k051733->ram[0x0c] << 8) | k051733->ram[0x0d];
	5913	int xobj2c = (k051733->ram[0x0e] << 8) | k051733->ram[0x0f];
	5914
	5915	//logerror("%04x: read 051733 address %02x\n", cpu_get_pc(space->cpu), offset);
	5916
	5917	switch (offset)
	5918	{
	5919	case 0x00:
	5920	if (op2)
	5921	return (op1 / op2) >> 8;
	5922	else
	5923	return 0xff;
	5924	case 0x01:
	5925	if (op2)
	5926	return (op1 / op2) & 0xff;
	5927	else
	5928	return 0xff;
	5929
	5930	/* this is completely unverified */
	5931	case 0x02:
	5932	if (op2)
	5933	return (op1 % op2) >> 8;
	5934	else
	5935	return 0xff;
	5936	case 0x03:
	5937	if (op2)
	5938	return (op1 % op2) & 0xff;
	5939	else
	5940	return 0xff;
	5941
	5942	case 0x04:
	5943	return k051733_int_sqrt(op3 << 16) >> 8;
	5944
	5945	case 0x05:
	5946	return k051733_int_sqrt(op3 << 16) & 0xff;
	5947
	5948	case 0x06:
	5949	return k051733->ram[0x13];
	5950
	5951	case 0x07:{
	5952	if (xobj1c + rad < xobj2c)
	5953	return 0x80;
	5954
	5955	if (xobj2c + rad < xobj1c)
	5956	return 0x80;
	5957
	5958	if (yobj1c + rad < yobj2c)
	5959	return 0x80;
	5960
	5961	if (yobj2c + rad < yobj1c)
	5962	return 0x80;
	5963
	5964	return 0;
	5965	}
	5966	case 0x0e:
	5967	return ~k051733->ram[offset];
	5968	case 0x0f:
	5969	return ~k051733->ram[offset];
	5970	default:
	5971	return k051733->ram[offset];
	5972	}
	5973	}
	5974
	5975	/*****************************************************************************
	5976	DEVICE INTERFACE
	5977	*****************************************************************************/
	5978
	5979	static DEVICE_START( k051733 )
	5980	{
	5981	k051733_state *k051733 = k051733_get_safe_token(device);
	5982
	5983	state_save_register_device_item_array(device, 0, k051733->ram);
	5984	}
	5985
	5986	static DEVICE_RESET( k051733 )
	5987	{
	5988	k051733_state *k051733 = k051733_get_safe_token(device);
	5989	int i;
	5990
	5991	for (i = 0; i < 0x20; i++)
	5992	k051733->ram[i] = 0;
	5993	}
	5994
	5995
	5996	/***************************************************************************/
	5997	/*                                                                         */
	5998	/*                                 054157 / 056832                         */
	5999	/*                                                                         */
	6000	/***************************************************************************/
	6001
	6002	#define K056832_PAGE_COLS 64
	6003	#define K056832_PAGE_ROWS 32
	6004	#define K056832_PAGE_HEIGHT (K056832_PAGE_ROWS*8)
	6005	#define K056832_PAGE_WIDTH  (K056832_PAGE_COLS*8)
	6006	#define K056832_PAGE_COUNT 16
	6007
	6008	typedef struct _k056832_state k056832_state;
	6009	struct _k056832_state
	6010	{
	6011	tilemap   *tilemap[K056832_PAGE_COUNT];
	6012	bitmap_t  *pixmap[K056832_PAGE_COUNT];
	6013
	6014	UINT16    regs[0x20];   // 157/832 regs group 1
	6015	UINT16    regsb[4];   // 157/832 regs group 2, board dependent
	6016
	6017	UINT8 *   rombase;   // pointer to tile gfx data
	6018	UINT16 *  videoram;
	6019	int       num_gfx_banks;   // depends on size of graphics ROMs
	6020	int       cur_gfx_banks;      // cached info for K056832_regs[0x1a]
	6021	int       gfxnum;         // graphics element index for unpacked tiles
	6022	const char *memory_region;   // memory region for tile gfx data
	6023
	6024
	6025	// ROM readback involves reading 2 halves of a word
	6026	// from the same location in a row.  Reading the
	6027	// RAM window resets this state so you get the first half.
	6028	int       rom_half;
	6029
	6030
	6031	// locally cached values
	6032	int       layer_assoc_with_page[K056832_PAGE_COUNT];
	6033	int       layer_offs[8][2];
	6034	int       lsram_page[8][2];
	6035	INT32     x[8];   // 0..3 left
	6036	INT32     y[8];   // 0..3 top
	6037	INT32     w[8];   // 0..3 width  -> 1..4 pages
	6038	INT32     h[8];   // 0..3 height -> 1..4 pages
	6039	INT32     dx[8];   // scroll
	6040	INT32     dy[8];   // scroll
	6041	UINT32    line_dirty[K056832_PAGE_COUNT][8];
	6042	UINT8     all_lines_dirty[K056832_PAGE_COUNT];
	6043	UINT8     page_tile_mode[K056832_PAGE_COUNT];
	6044	int       last_colorbase[K056832_PAGE_COUNT];
	6045	UINT8     layer_tile_mode[8];
	6046	int       default_layer_association;
	6047	int       layer_association;
	6048	int       active_layer;
	6049	int       selected_page;
	6050	int       selected_page_x4096;
	6051	int       linemap_enabled;
	6052	int       use_ext_linescroll;
	6053	int       uses_tile_banks, cur_tile_bank;
	6054
	6055	int       djmain_hack;
	6056
	6057	k056832_callback  callback;
	6058
	6059	const device_config *k055555;   /* used to choose colorbase */
	6060	};
	6061
	6062	/*****************************************************************************
	6063	INLINE FUNCTIONS
	6064	*****************************************************************************/
	6065
	6066	INLINE k056832_state *k056832_get_safe_token( const device_config *device )
	6067	{
	6068	assert(device != NULL);
	6069	assert(device->token != NULL);
	6070	assert(device->type == K056832);
	6071
	6072	return (k056832_state *)device->token;
	6073	}
	6074
	6075	INLINE const k056832_interface *k056832_get_interface( const device_config *device )
	6076	{
	6077	assert(device != NULL);
	6078	assert(device->type == K056832);
	6079	return (const k056832_interface *) device->static_config;
	6080	}
	6081
	6082	/*****************************************************************************
	6083	DEVICE HANDLERS
	6084	*****************************************************************************/
	6085
	6086	#define k056832_mark_line_dirty(P, L) if (L < 0x100) k056832->line_dirty[P][L >> 5] |= 1 << (L & 0x1f)
	6087	#define k056832_mark_all_lines_dirty(P) k056832->all_lines_dirty[P] = 1
	6088
	6089	static void k056832_mark_page_dirty( const device_config *device, int page )
	6090	{
	6091	k056832_state *k056832 = k056832_get_safe_token(device);
	6092
	6093	if (k056832->page_tile_mode[page])
	6094	tilemap_mark_all_tiles_dirty(k056832->tilemap[page]);
	6095	else
	6096	k056832_mark_all_lines_dirty(page);
	6097	}
	6098
	6099	void k056832_mark_plane_dirty( const device_config *device, int layer )
	6100	{
	6101	k056832_state *k056832 = k056832_get_safe_token(device);
	6102	int tilemode, i;
	6103
	6104	tilemode = k056832->layer_tile_mode[layer];
	6105
	6106	for (i = 0; i < K056832_PAGE_COUNT; i++)
	6107	{
	6108	if (k056832->layer_assoc_with_page[i] == layer)
	6109	{
	6110	k056832->page_tile_mode[i] = tilemode;
	6111	k056832_mark_page_dirty(device, i);
	6112	}
	6113	}
	6114	}
	6115
	6116	void k056832_mark_all_tmaps_dirty( const device_config *device )
	6117	{
	6118	k056832_state *k056832 = k056832_get_safe_token(device);
	6119	int i;
	6120
	6121	for (i = 0; i < K056832_PAGE_COUNT; i++)
	6122	{
	6123	if (k056832->layer_assoc_with_page[i] != -1)
	6124	{
	6125	k056832->page_tile_mode[i] = k056832->layer_tile_mode[k056832->layer_assoc_with_page[i]];
	6126	k056832_mark_page_dirty(device, i);
	6127	}
	6128	}
	6129	}
	6130
	6131	static void k056832_update_page_layout( const device_config *device )
	6132	{
	6133	k056832_state *k056832 = k056832_get_safe_token(device);
	6134	int layer, rowstart, rowspan, colstart, colspan, r, c, page_idx, setlayer;
	6135
	6136	// enable layer association by default
	6137	k056832->layer_association = k056832->default_layer_association;
	6138
	6139	// disable association if a layer grabs the entire 4x4 map (happens in Twinbee and Dadandarn)
	6140	for (layer = 0; layer < 4; layer++)
	6141	{
	6142	if (!k056832->y[layer] && !k056832->x[layer] && k056832->h[layer] == 3 && k056832->w[layer] == 3)
	6143	{
	6144	k056832->layer_association = 0;
	6145	break;
	6146	}
	6147	}
	6148
	6149	// winning spike doesn't like layer association..
	6150	if (k056832->djmain_hack == 2)
	6151	k056832->layer_association = 0;
	6152
	6153	// disable all tilemaps
	6154	for (page_idx = 0; page_idx < K056832_PAGE_COUNT; page_idx++)
	6155	{
	6156	k056832->layer_assoc_with_page[page_idx] = -1;
	6157	}
	6158
	6159
	6160	// enable associated tilemaps
	6161	for (layer = 0; layer < 4; layer++)
	6162	{
	6163	rowstart = k056832->y[layer];
	6164	colstart = k056832->x[layer];
	6165	rowspan  = k056832->h[layer] + 1;
	6166	colspan  = k056832->w[layer] + 1;
	6167
	6168	setlayer = (k056832->layer_association) ? layer : k056832->active_layer;
	6169
	6170	for (r = 0; r < rowspan; r++)
	6171	{
	6172	for (c = 0; c < colspan; c++)
	6173	{
	6174	page_idx = (((rowstart + r) & 3) << 2) + ((colstart + c) & 3);
	6175	if (!(k056832->djmain_hack==1) || k056832->layer_assoc_with_page[page_idx] == -1)
	6176	k056832->layer_assoc_with_page[page_idx] = setlayer;
	6177	}
	6178	}
	6179	}
	6180
	6181	// refresh associated tilemaps
	6182	k056832_mark_all_tmaps_dirty(device);
	6183	}
	6184
	6185	int k056832_get_lookup( const device_config *device, int bits )
	6186	{
	6187	k056832_state *k056832 = k056832_get_safe_token(device);
	6188	int res;
	6189
	6190	res = (k056832->regs[0x1c] >> (bits << 2)) & 0x0f;
	6191
	6192	if (k056832->uses_tile_banks)   /* Asterix */
	6193	res |= k056832->cur_tile_bank << 4;
	6194
	6195	return res;
	6196	}
	6197
	6198	INLINE void k056832_get_tile_info( const device_config *device, tile_data *tileinfo, int tile_index, int pageIndex )
	6199	{
	6200	k056832_state *k056832 = k056832_get_safe_token(device);
	6201	static const struct K056832_SHIFTMASKS
	6202	{
	6203	int flips, palm1, pals2, palm2;
	6204	}
	6205	k056832_shiftmasks[4] = {{6,0x3f,0,0x00},{4,0x0f,2,0x30},{2,0x03,2,0x3c},{0,0x00,2,0x3f}};
	6206
	6207	const struct K056832_SHIFTMASKS *smptr;
	6208	int layer, flip, fbits, attr, code, color, flags;
	6209	UINT16 *pMem;
	6210
	6211	pMem  = &k056832->videoram[(pageIndex << 12) + (tile_index << 1)];
	6212
	6213	if (k056832->layer_association)
	6214	{
	6215	layer = k056832->layer_assoc_with_page[pageIndex];
	6216	if (layer == -1)
	6217	layer = 0;   // use layer 0's palette info for unmapped pages
	6218	}
	6219	else
	6220	layer = k056832->active_layer;
	6221
	6222	fbits = (k056832->regs[3] >> 6) & 3;
	6223	flip  = (k056832->regs[1] >> (layer << 1)) & 0x3; // tile-flip override (see p.20 3.2.2 "REG2")
	6224	smptr = &k056832_shiftmasks[fbits];
	6225	attr  = pMem[0];
	6226	code  = pMem[1];
	6227
	6228	// normalize the flip/palette flags
	6229	// see the tables on pages 4 and 10 of the Pt. 2-3 "VRAM" manual
	6230	// for a description of these bits "FBIT0" and "FBIT1"
	6231	flip &= attr >> smptr->flips & 3;
	6232	color = (attr & smptr->palm1) | (attr >> smptr->pals2 & smptr->palm2);
	6233	flags = TILE_FLIPYX(flip);
	6234
	6235	k056832->callback(device->machine, layer, &code, &color, &flags);
	6236
	6237	SET_TILE_INFO_DEVICE(
	6238	k056832->gfxnum,
	6239	code,
	6240	color,
	6241	flags);
	6242	}
	6243
	6244	static TILE_GET_INFO_DEVICE( k056832_get_tile_info0 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x0); }
	6245	static TILE_GET_INFO_DEVICE( k056832_get_tile_info1 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x1); }
	6246	static TILE_GET_INFO_DEVICE( k056832_get_tile_info2 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x2); }
	6247	static TILE_GET_INFO_DEVICE( k056832_get_tile_info3 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x3); }
	6248	static TILE_GET_INFO_DEVICE( k056832_get_tile_info4 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x4); }
	6249	static TILE_GET_INFO_DEVICE( k056832_get_tile_info5 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x5); }
	6250	static TILE_GET_INFO_DEVICE( k056832_get_tile_info6 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x6); }
	6251	static TILE_GET_INFO_DEVICE( k056832_get_tile_info7 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x7); }
	6252	static TILE_GET_INFO_DEVICE( k056832_get_tile_info8 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x8); }
	6253	static TILE_GET_INFO_DEVICE( k056832_get_tile_info9 ) { k056832_get_tile_info(device, tileinfo, tile_index, 0x9); }
	6254	static TILE_GET_INFO_DEVICE( k056832_get_tile_infoa ) { k056832_get_tile_info(device, tileinfo, tile_index, 0xa); }
	6255	static TILE_GET_INFO_DEVICE( k056832_get_tile_infob ) { k056832_get_tile_info(device, tileinfo, tile_index, 0xb); }
	6256	static TILE_GET_INFO_DEVICE( k056832_get_tile_infoc ) { k056832_get_tile_info(device, tileinfo, tile_index, 0xc); }
	6257	static TILE_GET_INFO_DEVICE( k056832_get_tile_infod ) { k056832_get_tile_info(device, tileinfo, tile_index, 0xd); }
	6258	static TILE_GET_INFO_DEVICE( k056832_get_tile_infoe ) { k056832_get_tile_info(device, tileinfo, tile_index, 0xe); }
	6259	static TILE_GET_INFO_DEVICE( k056832_get_tile_infof ) { k056832_get_tile_info(device, tileinfo, tile_index, 0xf); }
	6260
	6261	static void k056832_change_rambank( const device_config *device )
	6262	{
	6263	/* ------xx page col
	6264	* ---xx--- page row
	6265	*/
	6266	k056832_state *k056832 = k056832_get_safe_token(device);
	6267	int bank = k056832->regs[0x19];
	6268
	6269	if (k056832->regs[0] & 0x02)   // external linescroll enable
	6270	k056832->selected_page = K056832_PAGE_COUNT;
	6271	else
	6272	k056832->selected_page = ((bank >> 1) & 0xc) | (bank & 3);
	6273
	6274	k056832->selected_page_x4096 = k056832->selected_page << 12;
	6275
	6276	// refresh associated tilemaps
	6277	k056832_mark_all_tmaps_dirty(device);
	6278	}
	6279
	6280	int k056832_get_current_rambank( const device_config *device )
	6281	{
	6282	k056832_state *k056832 = k056832_get_safe_token(device);
	6283	int bank = k056832->regs[0x19];
	6284
	6285	return ((bank >> 1) & 0xc) | (bank & 3);
	6286	}
	6287
	6288	static void k056832_change_rombank( const device_config *device )
	6289	{
	6290	k056832_state *k056832 = k056832_get_safe_token(device);
	6291	int bank;
	6292
	6293	if (k056832->uses_tile_banks)   /* Asterix */
	6294	bank = (k056832->regs[0x1a] >> 8) | (k056832->regs[0x1b] << 4) | (k056832->cur_tile_bank << 6);
	6295	else
	6296	bank = k056832->regs[0x1a] | (k056832->regs[0x1b] << 16);
	6297
	6298	k056832->cur_gfx_banks = bank % k056832->num_gfx_banks;
	6299	}
	6300
	6301	void k056832_set_tile_bank( const device_config *device, int bank )
	6302	{
	6303	k056832_state *k056832 = k056832_get_safe_token(device);
	6304	k056832->uses_tile_banks = 1;
	6305
	6306	if (k056832->cur_tile_bank != bank)
	6307	{
	6308	k056832->cur_tile_bank = bank;
	6309
	6310	k056832_mark_plane_dirty(device, 0);
	6311	k056832_mark_plane_dirty(device, 1);
	6312	k056832_mark_plane_dirty(device, 2);
	6313	k056832_mark_plane_dirty(device, 3);
	6314	}
	6315
	6316	k056832_change_rombank(device);
	6317	}
	6318
	6319	/* call if a game uses external linescroll */
	6320	void k056832_SetExtLinescroll( const device_config *device )
	6321	{
	6322	k056832_state *k056832 = k056832_get_safe_token(device);
	6323	k056832->use_ext_linescroll = 1;
	6324	}
	6325
	6326	/* generic helper routine for ROM checksumming */
	6327	static int k056832_rom_read_b( const device_config *device, int offset, int blksize, int blksize2, int zerosec )
	6328	{
	6329	k056832_state *k056832 = k056832_get_safe_token(device);
	6330	UINT8 *rombase;
	6331	int base, ret;
	6332
	6333	rombase = (UINT8 *)memory_region(device->machine, k056832->memory_region);
	6334
	6335	if ((k056832->rom_half) && (zerosec))
	6336	{
	6337	return 0;
	6338	}
	6339
	6340	// add in the bank offset
	6341	offset += (k056832->cur_gfx_banks * 0x2000);
	6342
	6343	// figure out the base of the ROM block
	6344	base = (offset / blksize) * blksize2;
	6345
	6346	// get the starting offset of the proper word inside the block
	6347	base += (offset % blksize) * 2;
	6348
	6349	if (k056832->rom_half)
	6350	{
	6351	ret = rombase[base + 1];
	6352	}
	6353	else
	6354	{
	6355	ret = rombase[base];
	6356	k056832->rom_half = 1;
	6357	}
	6358
	6359	return ret;
	6360	}
	6361
	6362	READ16_DEVICE_HANDLER( k056832_5bpp_rom_word_r )
	6363	{
	6364	if (mem_mask == 0xff00)
	6365	return k056832_rom_read_b(device, offset * 2, 4, 5, 0)<<8;
	6366	else if (mem_mask == 0x00ff)
	6367	return k056832_rom_read_b(device, offset * 2 + 1, 4, 5, 0)<<16;
	6368	else
	6369	{
	6370	//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", cpu_get_pc(space->cpu), mem_mask));
	6371	}
	6372	return 0;
	6373	}
	6374
	6375	READ32_DEVICE_HANDLER( k056832_5bpp_rom_long_r )
	6376	{
	6377	if (mem_mask == 0xff000000)
	6378	return k056832_rom_read_b(device, offset * 4, 4, 5, 0) << 24;
	6379	else if (mem_mask == 0x00ff0000)
	6380	return k056832_rom_read_b(device, offset * 4 + 1, 4, 5, 0) << 16;
	6381	else if (mem_mask == 0x0000ff00)
	6382	return k056832_rom_read_b(device, offset * 4 + 2, 4, 5, 0) << 8;
	6383	else if (mem_mask == 0x000000ff)
	6384	return k056832_rom_read_b(device, offset * 4 + 3, 4, 5, 1);
	6385	else
	6386	{
	6387	//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", cpu_get_pc(space->cpu), mem_mask));
	6388	}
	6389	return 0;
	6390	}
	6391
	6392	READ32_DEVICE_HANDLER( k056832_6bpp_rom_long_r )
	6393	{
	6394	if (mem_mask == 0xff000000)
	6395	return k056832_rom_read_b(device, offset * 4, 4, 6, 0) << 24;
	6396	else if (mem_mask == 0x00ff0000)
	6397	return k056832_rom_read_b(device, offset * 4 + 1, 4, 6, 0) << 16;
	6398	else if (mem_mask == 0x0000ff00)
	6399	return k056832_rom_read_b(device, offset * 4 + 2, 4, 6, 0) << 8;
	6400	else if (mem_mask == 0x000000ff)
	6401	return k056832_rom_read_b(device, offset * 4 + 3, 4, 6, 0);
	6402	else
	6403	{
	6404	//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", cpu_get_pc(space->cpu), mem_mask));
	6405	}
	6406	return 0;
	6407	}
	6408
	6409	READ16_DEVICE_HANDLER( k056832_rom_word_r )
	6410	{
	6411	k056832_state *k056832 = k056832_get_safe_token(device);
	6412	int ofs16, ofs8;
	6413	UINT8 *rombase;
	6414	int ret;
	6415
	6416	ofs16 = (offset / 8)*5;
	6417	ofs8 = (offset / 4)*5;
	6418
	6419	ofs16 += (k056832->cur_gfx_banks * 5 * 1024);
	6420	ofs8 += (k056832->cur_gfx_banks * 10 * 1024);
	6421
	6422	if (!k056832->rombase)
	6423	{
	6424	k056832->rombase = memory_region(device->machine, k056832->memory_region);
	6425	}
	6426	rombase = (UINT8 *)k056832->rombase;
	6427
	6428	ret = (rombase[ofs8 + 4]<<8);
	6429	if ((offset % 8) >= 4)
	6430	{
	6431	ret |= (rombase[ofs16 + 1] << 24) | (rombase[ofs16 + 3] << 16);
	6432	}
	6433	else
	6434	{
	6435	ret |= (rombase[ofs16] << 24) | (rombase[ofs16 + 2] << 16);
	6436	}
	6437
	6438	return ret;
	6439	}
	6440
	6441	// data is arranged like this:
	6442	// 0000 1111 22 0000 1111 22
	6443	READ16_DEVICE_HANDLER( k056832_mw_rom_word_r )
	6444	{
	6445	k056832_state *k056832 = k056832_get_safe_token(device);
	6446	int bank = 10240 * k056832->cur_gfx_banks;
	6447	int addr;
	6448
	6449	if (!k056832->rombase)
	6450	k056832->rombase = memory_region(device->machine, k056832->memory_region);
	6451
	6452	if (k056832->regsb[2] & 0x8)
	6453	{
	6454	// we want only the 2s
	6455	int bit;
	6456	int res, temp;
	6457
	6458	bit = offset % 4;
	6459	addr = (offset / 4) * 5;
	6460
	6461	temp = k056832->rombase[addr + 4 + bank];
	6462
	6463	switch (bit)
	6464	{
	6465	default:
	6466	case 0:
	6467	res = (temp & 0x80) << 5;
	6468	res |= ((temp & 0x40) >> 2);
	6469	break;
	6470
	6471	case 1:
	6472	res = (temp & 0x20) << 7;
	6473	res |= (temp & 0x10);
	6474	break;
	6475
	6476	case 2:
	6477	res = (temp & 0x08) << 9;
	6478	res |= ((temp & 0x04) << 2);
	6479	break;
	6480
	6481	case 3:
	6482	res = (temp & 0x02) << 11;
	6483	res |= ((temp & 0x01) << 4);
	6484	break;
	6485	}
	6486
	6487	return res;
	6488	}
	6489	else
	6490	{
	6491	// we want only the 0s and 1s.
	6492
	6493	addr = (offset >> 1) * 5;
	6494
	6495	if (offset & 1)
	6496	{
	6497	addr += 2;
	6498	}
	6499
	6500	addr += bank;
	6501
	6502	return k056832->rombase[addr + 1] | (k056832->rombase[addr] << 8);
	6503	}
	6504
	6505	}
	6506
	6507	READ16_DEVICE_HANDLER( k056832_bishi_rom_word_r )
	6508	{
	6509	k056832_state *k056832 = k056832_get_safe_token(device);
	6510	int addr = 0x4000 * k056832->cur_gfx_banks + offset;
	6511
	6512	if (!k056832->rombase)
	6513	k056832->rombase = memory_region(device->machine, k056832->memory_region);
	6514
	6515	return k056832->rombase[addr + 2] | (k056832->rombase[addr] << 8);
	6516	}
	6517
	6518	READ16_DEVICE_HANDLER( k056832_rom_word_8000_r )
	6519	{
	6520	k056832_state *k056832 = k056832_get_safe_token(device);
	6521	int addr = 0x8000 * k056832->cur_gfx_banks + 2 * offset;
	6522
	6523	if (!k056832->rombase)
	6524	k056832->rombase = memory_region(device->machine, k056832->memory_region);
	6525
	6526	return k056832->rombase[addr + 2] | (k056832->rombase[addr] << 8);
	6527	}
	6528
	6529	READ16_DEVICE_HANDLER( k056832_old_rom_word_r )
	6530	{
	6531	k056832_state *k056832 = k056832_get_safe_token(device);
	6532	int addr = 0x2000 * k056832->cur_gfx_banks + 2 * offset;
	6533
	6534	if (!k056832->rombase)
	6535	k056832->rombase = memory_region(device->machine, k056832->memory_region);
	6536
	6537	return k056832->rombase[addr + 1] | (k056832->rombase[addr] << 8);
	6538	}
	6539
	6540	READ32_DEVICE_HANDLER( k056832_rom_long_r )
	6541	{
	6542	offset <<= 1;
	6543	return (k056832_rom_word_r(device, offset + 1, 0xffff) | (k056832_rom_word_r(device, offset, 0xffff) << 16));
	6544	}
	6545
	6546	/* only one page is mapped to videoram at a time through a window */
	6547	READ16_DEVICE_HANDLER( k056832_ram_word_r )
	6548	{
	6549	k056832_state *k056832 = k056832_get_safe_token(device);
	6550
	6551	// reading from tile RAM resets the ROM readback "half" offset
	6552	k056832->rom_half = 0;
	6553
	6554	return k056832->videoram[k056832->selected_page_x4096 + offset];
	6555	}
	6556
	6557	READ16_DEVICE_HANDLER( k056832_ram_half_word_r )
	6558	{
	6559	k056832_state *k056832 = k056832_get_safe_token(device);
	6560	return k056832->videoram[k056832->selected_page_x4096 + (((offset << 1) & 0xffe) | ((offset >> 11) ^ 1))];
	6561	}
	6562
	6563	READ32_DEVICE_HANDLER( k056832_ram_long_r )
	6564	{
	6565	k056832_state *k056832 = k056832_get_safe_token(device);
	6566	UINT16 *pMem = &k056832->videoram[k056832->selected_page_x4096 + offset * 2];
	6567
	6568	// reading from tile RAM resets the ROM readback "half" offset
	6569	k056832->rom_half = 0;
	6570
	6571	return (pMem[0]<<16 | pMem[1]);
	6572	}
	6573
	6574	/* special 8-bit handlers for Lethal Enforcers */
	6575	READ8_DEVICE_HANDLER( k056832_ram_code_lo_r )
	6576	{
	6577	k056832_state *k056832 = k056832_get_safe_token(device);
	6578	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (offset * 2) + 1];
	6579
	6580	return *adr & 0xff;
	6581	}
	6582
	6583	READ8_DEVICE_HANDLER( k056832_ram_code_hi_r )
	6584	{
	6585	k056832_state *k056832 = k056832_get_safe_token(device);
	6586	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (offset * 2) + 1];
	6587
	6588	return *adr >> 8;
	6589	}
	6590
	6591	READ8_DEVICE_HANDLER( k056832_ram_attr_lo_r )
	6592	{
	6593	k056832_state *k056832 = k056832_get_safe_token(device);
	6594	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (offset * 2)];
	6595
	6596	return *adr & 0xff;
	6597	}
	6598
	6599	READ8_DEVICE_HANDLER( k056832_ram_attr_hi_r )
	6600	{
	6601	k056832_state *k056832 = k056832_get_safe_token(device);
	6602	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (offset * 2)];
	6603
	6604	return *adr >> 8;
	6605	}
	6606
	6607	WRITE8_DEVICE_HANDLER( k056832_ram_code_lo_w )
	6608	{
	6609	k056832_state *k056832 = k056832_get_safe_token(device);
	6610	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (offset * 2) + 1];
	6611
	6612	*adr &= 0xff00;
	6613	*adr |= data;
	6614
	6615	if (!(k056832->regs[0] & 0x02))   // external linescroll enable
	6616	{
	6617	if (k056832->page_tile_mode[k056832->selected_page])
	6618	tilemap_mark_tile_dirty(k056832->tilemap[k056832->selected_page], offset);
	6619	else
	6620	k056832_mark_line_dirty(k056832->selected_page, offset);
	6621	}
	6622	}
	6623
	6624	WRITE8_DEVICE_HANDLER( k056832_ram_code_hi_w )
	6625	{
	6626	k056832_state *k056832 = k056832_get_safe_token(device);
	6627	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (offset * 2) + 1];
	6628
	6629	*adr &= 0x00ff;
	6630	*adr |= data << 8;
	6631
	6632	if (!(k056832->regs[0] & 0x02))   // external linescroll enable
	6633	{
	6634	if (k056832->page_tile_mode[k056832->selected_page])
	6635	tilemap_mark_tile_dirty(k056832->tilemap[k056832->selected_page], offset);
	6636	else
	6637	k056832_mark_line_dirty(k056832->selected_page, offset);
	6638	}
	6639	}
	6640
	6641	WRITE8_DEVICE_HANDLER( k056832_ram_attr_lo_w )
	6642	{
	6643	k056832_state *k056832 = k056832_get_safe_token(device);
	6644	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (offset * 2)];
	6645
	6646	*adr &= 0xff00;
	6647	*adr |= data;
	6648
	6649	if (!(k056832->regs[0] & 0x02))   // external linescroll enable
	6650	{
	6651	if (k056832->page_tile_mode[k056832->selected_page])
	6652	tilemap_mark_tile_dirty(k056832->tilemap[k056832->selected_page], offset);
	6653	else
	6654	k056832_mark_line_dirty(k056832->selected_page, offset);
	6655	}
	6656	}
	6657
	6658	WRITE8_DEVICE_HANDLER( k056832_ram_attr_hi_w )
	6659	{
	6660	k056832_state *k056832 = k056832_get_safe_token(device);
	6661	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (offset * 2)];
	6662
	6663	*adr &= 0x00ff;
	6664	*adr |= data << 8;
	6665
	6666	if (!(k056832->regs[0] & 0x02))   // external linescroll enable
	6667	{
	6668	if (k056832->page_tile_mode[k056832->selected_page])
	6669	tilemap_mark_tile_dirty(k056832->tilemap[k056832->selected_page], offset);
	6670	else
	6671	k056832_mark_line_dirty(k056832->selected_page, offset);
	6672	}
	6673	}
	6674
	6675	WRITE16_DEVICE_HANDLER( k056832_ram_word_w )
	6676	{
	6677	k056832_state *k056832 = k056832_get_safe_token(device);
	6678	UINT16 *tile_ptr;
	6679	UINT16 old_mask, old_data;
	6680
	6681	tile_ptr = &k056832->videoram[k056832->selected_page_x4096 + offset];
	6682	old_mask = ~mem_mask;
	6683	old_data = *tile_ptr;
	6684	data = (data & mem_mask) | (old_data & old_mask);
	6685
	6686	if(data != old_data)
	6687	{
	6688	offset >>= 1;
	6689	*tile_ptr = data;
	6690
	6691	if (k056832->page_tile_mode[k056832->selected_page])
	6692	tilemap_mark_tile_dirty(k056832->tilemap[k056832->selected_page], offset);
	6693	else
	6694	k056832_mark_line_dirty(k056832->selected_page, offset);
	6695	}
	6696	}
	6697
	6698	WRITE16_DEVICE_HANDLER( k056832_ram_half_word_w )
	6699	{
	6700	k056832_state *k056832 = k056832_get_safe_token(device);
	6701	UINT16 *adr = &k056832->videoram[k056832->selected_page_x4096 + (((offset << 1) & 0xffe) | 1)];
	6702	UINT16 old = *adr;
	6703
	6704	COMBINE_DATA(adr);
	6705	if(*adr != old)
	6706	{
	6707	int dofs = (((offset << 1) & 0xffe) | 1);
	6708
	6709	dofs >>= 1;
	6710
	6711	if (k056832->page_tile_mode[k056832->selected_page])
	6712	tilemap_mark_tile_dirty(k056832->tilemap[k056832->selected_page], dofs);
	6713	else
	6714	k056832_mark_line_dirty(k056832->selected_page, dofs);
	6715	}
	6716	}
	6717
	6718	WRITE32_DEVICE_HANDLER( k056832_ram_long_w )
	6719	{
	6720	k056832_state *k056832 = k056832_get_safe_token(device);
	6721	UINT16 *tile_ptr;
	6722	UINT32 old_mask, old_data;
	6723
	6724	tile_ptr = &k056832->videoram[k056832->selected_page_x4096 + offset * 2];
	6725	old_mask = ~mem_mask;
	6726	old_data = (UINT32)tile_ptr[0] << 16 | (UINT32)tile_ptr[1];
	6727	data = (data & mem_mask) | (old_data & old_mask);
	6728
	6729	if (data != old_data)
	6730	{
	6731	tile_ptr[0] = data >> 16;
	6732	tile_ptr[1] = data;
	6733
	6734	if (k056832->page_tile_mode[k056832->selected_page])
	6735	tilemap_mark_tile_dirty(k056832->tilemap[k056832->selected_page], offset);
	6736	else
	6737	k056832_mark_line_dirty(k056832->selected_page, offset);
	6738	}
	6739	}
	6740
	6741	WRITE16_DEVICE_HANDLER( k056832_word_w )
	6742	{
	6743	k056832_state *k056832 = k056832_get_safe_token(device);
	6744	int layer, flip, mask, i;
	6745	UINT32 old_data, new_data;
	6746
	6747	old_data = k056832->regs[offset];
	6748	COMBINE_DATA(&k056832->regs[offset]);
	6749	new_data = k056832->regs[offset];
	6750
	6751	if (new_data != old_data)
	6752	{
	6753	switch(offset)
	6754	{
	6755	/* -x-- ---- dotclock select: 0=8Mhz, 1=6Mhz (not used by GX)
	6756	* --x- ---- screen flip y
	6757	* ---x ---- screen flip x
	6758	* ---- --x- external linescroll RAM page enable
	6759	*/
	6760	case 0x00/2:
	6761	if ((new_data & 0x30) != (old_data & 0x30))
	6762	{
	6763	flip = 0;
	6764	if (new_data & 0x20) flip |= TILEMAP_FLIPY;
	6765	if (new_data & 0x10) flip |= TILEMAP_FLIPX;
	6766	for (i = 0; i < K056832_PAGE_COUNT; i++)
	6767	{
	6768	tilemap_set_flip(k056832->tilemap[i], flip);
	6769	}
	6770	}
	6771
	6772	if ((new_data & 0x02) != (old_data & 0x02))
	6773	{
	6774	k056832_change_rambank(device);
	6775	}
	6776	break;
	6777
	6778	/* -------- -----xxx external irqlines enable (not used by GX)
	6779	* -------- xx------ tilemap attribute config (FBIT0 and FBIT1)
	6780	*/
	6781	//case 0x06/2: break;
	6782
	6783	// -------- ----DCBA tile mode: 0=512x1, 1=8x8
	6784	// -------- DCBA---- synchronous scroll: 0=off, 1=on
	6785	case 0x08/2:
	6786	for (layer = 0; layer < 4; layer++)
	6787	{
	6788	mask = 1 << layer;
	6789	i = new_data & mask;
	6790	if (i != (old_data & mask))
	6791	{
	6792	k056832->layer_tile_mode[layer] = i;
	6793	k056832_mark_plane_dirty(device, layer);
	6794	}
	6795	}
	6796	break;
	6797
	6798	/* -------- ------xx layer A linescroll config
	6799	* -------- ----xx-- layer B linescroll config
	6800	* -------- --xx---- layer C linescroll config
	6801	* -------- xx------ layer D linescroll config
	6802	*
	6803	* 0: linescroll
	6804	* 2: rowscroll
	6805	* 3: xy scroll
	6806	*/
	6807	//case 0x0a/2: break;
	6808
	6809	case 0x32/2:
	6810	k056832_change_rambank(device);
	6811	break;
	6812
	6813	case 0x34/2: /* ROM bank select for checksum */
	6814	case 0x36/2: /* secondary ROM bank select for use with tile banking */
	6815	k056832_change_rombank(device);
	6816	break;
	6817
	6818	// extended tile address
	6819	//case 0x38/2: break;
	6820
	6821	// 12 bit (signed) horizontal offset if global HFLIP enabled
	6822	//case 0x3a/2: break;
	6823
	6824	// 11 bit (signed) vertical offset if global VFLIP enabled
	6825	//case 0x3c/2: break;
	6826
	6827	default:
	6828	layer = offset & 3;
	6829
	6830	if (offset >= 0x10/2 && offset <= 0x16/2)
	6831	{
	6832	k056832->y[layer] = (new_data & 0x18) >> 3;
	6833	k056832->h[layer] = (new_data & 0x3);
	6834	k056832->active_layer = layer;
	6835	k056832_update_page_layout(device);
	6836	} else
	6837
	6838	if (offset >= 0x18/2 && offset <= 0x1e/2)
	6839	{
	6840	k056832->x[layer] = (new_data & 0x18) >> 3;
	6841	k056832->w[layer] = (new_data & 0x03);
	6842	k056832->active_layer = layer;
	6843	k056832_update_page_layout(device);
	6844	} else
	6845
	6846	if (offset >= 0x20/2 && offset <= 0x26/2)
	6847	{
	6848	k056832->dy[layer] = (INT16)new_data;
	6849	} else
	6850
	6851	if (offset >= 0x28/2 && offset <= 0x2e/2)
	6852	{
	6853	k056832->dx[layer] = (INT16)new_data;
	6854	}
	6855	break;
	6856	}
	6857	}
	6858	}
	6859
	6860	WRITE32_DEVICE_HANDLER( k056832_long_w )
	6861	{
	6862	// GX does access of all 3 widths (8/16/32) so we can't do the
	6863	// if (ACCESSING_xxx) trick.  in particular, 8-bit writes
	6864	// are used to the tilemap bank register.
	6865	offset <<= 1;
	6866	k056832_word_w(device, offset, data >> 16, mem_mask >> 16);
	6867	k056832_word_w(device, offset + 1, data, mem_mask);
	6868	}
	6869
	6870	WRITE16_DEVICE_HANDLER( k056832_b_word_w )
	6871	{
	6872	k056832_state *k056832 = k056832_get_safe_token(device);
	6873	COMBINE_DATA(&k056832->regsb[offset]);
	6874	}
	6875
	6876	WRITE8_DEVICE_HANDLER( k056832_w )
	6877	{
	6878	if (offset & 1)
	6879	{
	6880	k056832_word_w(device, (offset >> 1), data, 0x00ff);
	6881	}
	6882	else
	6883	{
	6884	k056832_word_w(device, (offset >> 1), data << 8, 0xff00);
	6885	}
	6886	}
	6887
	6888	WRITE8_DEVICE_HANDLER( k056832_b_w )
	6889	{
	6890	if (offset & 1)
	6891	{
	6892	k056832_b_word_w(device, (offset >> 1), data, 0x00ff);
	6893	}
	6894	else
	6895	{
	6896	k056832_b_word_w(device, (offset >> 1), data<<8, 0xff00);
	6897	}
	6898	}
	6899
	6900	WRITE32_DEVICE_HANDLER( k056832_b_long_w )
	6901	{
	6902	if (ACCESSING_BITS_16_31)
	6903	{
	6904	k056832_b_word_w(device, offset << 1, data >> 16, mem_mask >> 16);
	6905	}
	6906	if (ACCESSING_BITS_0_15)
	6907	{
	6908	k056832_b_word_w(device, (offset << 1) + 1, data, mem_mask);
	6909	}
	6910	}
	6911
	6912	static int k056832_update_linemap( const device_config *device, bitmap_t *bitmap, int page, int flags )
	6913	{
	6914	k056832_state *k056832 = k056832_get_safe_token(device);
	6915
	6916	if (k056832->page_tile_mode[page])
	6917	return(0);
	6918	if (!k056832->linemap_enabled)
	6919	return(1);
	6920
	6921	{
	6922	rectangle zerorect;
	6923	tilemap *tmap;
	6924	UINT32 *dirty;
	6925	int all_dirty;
	6926	bitmap_t* xprmap;
	6927	UINT8 *xprdata;
	6928
	6929	tmap = k056832->tilemap[page];
	6930	xprmap  = tilemap_get_flagsmap(tmap);
	6931	xprdata = tilemap_get_tile_flags(tmap);
	6932
	6933	dirty = k056832->line_dirty[page];
	6934	all_dirty = k056832->all_lines_dirty[page];
	6935
	6936	if (all_dirty)
	6937	{
	6938	dirty[7] = dirty[6] = dirty[5] = dirty[4] = dirty[3] = dirty[2] = dirty[1] = dirty[0] = 0;
	6939	k056832->all_lines_dirty[page] = 0;
	6940
	6941	// force tilemap into a clean, static state
	6942	// *really ugly but it minimizes alteration to tilemap.c
	6943	memset(&zerorect, 0, sizeof(rectangle));   // zero dimension
	6944	tilemap_draw(bitmap, &zerorect, tmap, 0, 0);   // dummy call to reset tile_dirty_map
	6945	bitmap_fill(xprmap, 0, 0);                  // reset pixel transparency_bitmap;
	6946	memset(xprdata, TILEMAP_PIXEL_LAYER0, 0x800);   // reset tile transparency_data;
	6947	}
	6948	else
	6949	{
	6950	if (!(dirty[0] | dirty[1] | dirty[2] | dirty[3] | dirty[4] | dirty[5] | dirty[6] | dirty[7]))
	6951	return 0;
	6952	}
	6953
	6954	#if 0   /* this code is broken.. really broken .. gijoe uses it for some line/column scroll style effects (lift level of attract mode)
	6955	we REALLY shouldn't be writing directly back into the pixmap, surely this should
	6956	be done when rendering instead
	6957
	6958	*/
	6959	{
	6960
	6961	bitmap_t *pixmap;
	6962	running_machine *machine = device->machine;
	6963
	6964	UINT8 code_transparent, code_opaque;
	6965	const pen_t *pal_ptr;
	6966	const UINT8  *src_ptr;
	6967	UINT8  *xpr_ptr;
	6968	UINT16 *dst_ptr;
	6969	UINT16 pen, basepen;
	6970	int count, src_pitch, src_modulo;
	6971	int dst_pitch;
	6972	int line;
	6973	const gfx_element *src_gfx;
	6974	int offs, mask;
	6975
	6976	#define LINE_WIDTH 512
	6977
	6978	#define DRAW_PIX(N) \
	6979	pen = src_ptr[N]; \
	6980	if (pen) \
	6981	{ pen += basepen; xpr_ptr[count+N] = TILEMAP_PIXEL_LAYER0; dst_ptr[count+N] = pen; } else \
	6982	{ xpr_ptr[count+N] = 0; }
	6983
	6984	pixmap  = k056832->pixmap[page];
	6985	pal_ptr = machine->pens;
	6986	src_gfx = machine->gfx[k056832->gfxnum];
	6987	src_pitch  = src_gfx->line_modulo;
	6988	src_modulo = src_gfx->char_modulo;
	6989	dst_pitch  = pixmap->rowpixels;
	6990
	6991	for (line = 0; line < 256; line++)
	6992	{
	6993	tile_data tileinfo = {0};
	6994
	6995	dst_ptr = BITMAP_ADDR16(pixmap, line, 0);
	6996	xpr_ptr = BITMAP_ADDR8(xprmap, line, 0);
	6997
	6998	if (!all_dirty)
	6999	{
	7000	offs = line >> 5;
	7001	mask = 1 << (line & 0x1f);
	7002	if (!(dirty[offs] & mask)) continue;
	7003	dirty[offs] ^= mask;
	7004	}
	7005
	7006	for (count = 0; count < LINE_WIDTH; count += 8)
	7007	{
	7008	k056832_get_tile_info(device, &tileinfo, line, page);
	7009	basepen = tileinfo.palette_base;
	7010	code_transparent = tileinfo.category;
	7011	code_opaque = code_transparent | TILEMAP_PIXEL_LAYER0;
	7012
	7013	src_ptr = tileinfo.pen_data + count * 8;//src_base + ((tileinfo.tile_number & ~7) << 6);
	7014
	7015	DRAW_PIX(0)
	7016	DRAW_PIX(1)
	7017	DRAW_PIX(2)
	7018	DRAW_PIX(3)
	7019	DRAW_PIX(4)
	7020	DRAW_PIX(5)
	7021	DRAW_PIX(6)
	7022	DRAW_PIX(7)
	7023	}
	7024	}
	7025
	7026	#undef LINE_WIDTH
	7027	#undef DRAW_PIX
	7028	}
	7029	#endif
	7030
	7031	}
	7032
	7033	return(0);
	7034	}
	7035
	7036	void k056832_tilemap_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int layer, UINT32 flags, UINT32 priority )
	7037	{
	7038	k056832_state *k056832 = k056832_get_safe_token(device);
	7039	UINT32 last_dx, last_visible, new_colorbase, last_active;
	7040	int sx, sy, ay, tx, ty, width, height;
	7041	int clipw, clipx, cliph, clipy, clipmaxy;
	7042	int line_height, line_endy, line_starty, line_y;
	7043	int sdat_start, sdat_walk, sdat_adv, sdat_wrapmask, sdat_offs;
	7044	int pageIndex, flipx, flipy, corr, r, c;
	7045	int cminy, cmaxy, cminx, cmaxx;
	7046	int dminy, dmaxy, dminx, dmaxx;
	7047	rectangle drawrect;
	7048	tilemap *tmap;
	7049	UINT16 *p_scroll_data;
	7050	UINT16 ram16[2];
	7051
	7052	int rowstart = k056832->y[layer];
	7053	int colstart = k056832->x[layer];
	7054	int rowspan  = k056832->h[layer] + 1;
	7055	int colspan  = k056832->w[layer] + 1;
	7056	int dy = k056832->dy[layer];
	7057	int dx = k056832->dx[layer];
	7058	int scrollbank = ((k056832->regs[0x18] >> 1) & 0xc) | (k056832->regs[0x18] & 3);
	7059	int scrollmode = k056832->regs[0x05] >> (k056832->lsram_page[layer][0] << 1) & 3;
	7060
	7061	if (k056832->use_ext_linescroll)
	7062	{
	7063	scrollbank = K056832_PAGE_COUNT;
	7064	}
	7065
	7066	height = rowspan * K056832_PAGE_HEIGHT;
	7067	width  = colspan * K056832_PAGE_WIDTH;
	7068
	7069	cminx = cliprect->min_x;
	7070	cmaxx = cliprect->max_x;
	7071	cminy = cliprect->min_y;
	7072	cmaxy = cliprect->max_y;
	7073
	7074	// flip correction registers
	7075	flipy = k056832->regs[0] & 0x20;
	7076	if (flipy)
	7077	{
	7078	corr = k056832->regs[0x3c/2];
	7079	if (corr & 0x400)
	7080	corr |= 0xfffff800;
	7081	}
	7082	else
	7083	corr = 0;
	7084
	7085	dy += corr;
	7086	ay = (unsigned)(dy - k056832->layer_offs[layer][1]) % height;
	7087
	7088	flipx = k056832->regs[0] & 0x10;
	7089	if (flipx)
	7090	{
	7091	corr = k056832->regs[0x3a/2];
	7092	if (corr & 0x800)
	7093	corr |= 0xfffff000;
	7094	}
	7095	else
	7096	corr = 0;
	7097
	7098	corr -= k056832->layer_offs[layer][0];
	7099
	7100	if (scrollmode == 0 && (flags & K056832_DRAW_FLAG_FORCE_XYSCROLL))
	7101	{
	7102	scrollmode = 3;
	7103	flags &= ~K056832_DRAW_FLAG_FORCE_XYSCROLL;
	7104	}
	7105
	7106	switch( scrollmode )
	7107	{
	7108	case 0: // linescroll
	7109	p_scroll_data = &k056832->videoram[scrollbank<<12] + (k056832->lsram_page[layer][1]>>1);
	7110	line_height = 1;
	7111	sdat_wrapmask = 0x3ff;
	7112	sdat_adv = 2;
	7113	break;
	7114	case 2: // rowscroll
	7115
	7116	p_scroll_data = &k056832->videoram[scrollbank << 12] + (k056832->lsram_page[layer][1] >> 1);
	7117	line_height = 8;
	7118	sdat_wrapmask = 0x3ff;
	7119	sdat_adv = 16;
	7120	break;
	7121	default: // xyscroll
	7122	p_scroll_data = ram16;
	7123	line_height = K056832_PAGE_HEIGHT;
	7124	sdat_wrapmask = 0;
	7125	sdat_adv = 0;
	7126	ram16[0] = 0;
	7127	ram16[1] = dx;
	7128	}
	7129	if (flipy)
	7130	sdat_adv = -sdat_adv;
	7131
	7132	last_active = k056832->active_layer;
	7133	new_colorbase = (k056832->k055555 != NULL) ? k055555_get_palette_index(k056832->k055555, layer) : 0;
	7134
	7135	for (r = 0; r < rowspan; r++)
	7136	{
	7137	if (rowspan > 1)
	7138	{
	7139	sy = ay;
	7140	ty = r * K056832_PAGE_HEIGHT;
	7141
	7142	if (!flipy)
	7143	{
	7144	// handle bottom-edge wraparoundness and cull off-screen tilemaps
	7145	if ((r == 0) && (sy > height - K056832_PAGE_HEIGHT)) sy -= height;
	7146	if ((sy + K056832_PAGE_HEIGHT <= ty) || (sy - K056832_PAGE_HEIGHT >= ty)) continue;
	7147
	7148	// switch frame of reference and clip y
	7149	if ((ty -= sy) >= 0)
	7150	{
	7151	cliph = K056832_PAGE_HEIGHT - ty;
	7152	clipy = line_starty = ty;
	7153	line_endy = K056832_PAGE_HEIGHT;
	7154	sdat_start = 0;
	7155	}
	7156	else
	7157	{
	7158	cliph = K056832_PAGE_HEIGHT + ty;
	7159	ty = -ty;
	7160	clipy = line_starty = 0;
	7161	line_endy = cliph;
	7162	sdat_start = ty;
	7163	if (scrollmode == 2) { sdat_start &= ~7; line_starty -= ty & 7; }
	7164	}
	7165	}
	7166	else
	7167	{
	7168	ty += K056832_PAGE_HEIGHT;
	7169
	7170	// handle top-edge wraparoundness and cull off-screen tilemaps
	7171	if ((r == rowspan - 1) && (sy < K056832_PAGE_HEIGHT)) sy += height;
	7172	if ((sy + K056832_PAGE_HEIGHT <= ty) || (sy - K056832_PAGE_HEIGHT >= ty)) continue;
	7173
	7174	// switch frame of reference and clip y
	7175	if ((ty -= sy) <= 0)
	7176	{
	7177	cliph = K056832_PAGE_HEIGHT + ty;
	7178	clipy = line_starty = -ty;
	7179	line_endy = K056832_PAGE_HEIGHT;
	7180	sdat_start = K056832_PAGE_HEIGHT - 1;
	7181	if (scrollmode == 2) sdat_start &= ~7;
	7182	}
	7183	else
	7184	{
	7185	cliph = K056832_PAGE_HEIGHT - ty;
	7186	clipy = line_starty = 0;
	7187	line_endy = cliph;
	7188	sdat_start = cliph - 1;
	7189	if (scrollmode == 2)
	7190	{
	7191	sdat_start &= ~7;
	7192	line_starty -= ty & 7;
	7193	}
	7194	}
	7195	}
	7196	}
	7197	else
	7198	{
	7199	cliph = line_endy = K056832_PAGE_HEIGHT;
	7200	clipy = line_starty = 0;
	7201
	7202	if (!flipy)
	7203	sdat_start = dy;
	7204	else
	7205	/*
	7206	doesn't work with Metamorphic Force and Martial Champion (software Y-flipped) but
	7207	LE2U (naturally Y-flipped) seems to expect this condition as an override.
	7208
	7209	sdat_start = K056832_PAGE_HEIGHT-1 -dy;
	7210	*/
	7211	sdat_start = K056832_PAGE_HEIGHT - 1;
	7212
	7213	if (scrollmode == 2) { sdat_start &= ~7; line_starty -= dy & 7; }
	7214	}
	7215
	7216	sdat_start += r * K056832_PAGE_HEIGHT;
	7217	sdat_start <<= 1;
	7218
	7219	clipmaxy = clipy + cliph - 1;
	7220
	7221	for (c = 0; c < colspan; c++)
	7222	{
	7223	pageIndex = (((rowstart + r) & 3) << 2) + ((colstart + c) & 3);
	7224
	7225	if (k056832->layer_association)
	7226	{
	7227	if (k056832->layer_assoc_with_page[pageIndex] != layer)
	7228	continue;
	7229	}
	7230	else
	7231	{
	7232	if (k056832->layer_assoc_with_page[pageIndex] == -1)
	7233	continue;
	7234
	7235	k056832->active_layer = layer;
	7236	}
	7237
	7238	if (k056832->k055555 != NULL)      // are we using k055555 palette?
	7239	{
	7240	if (k056832->last_colorbase[pageIndex] != new_colorbase)
	7241	{
	7242	k056832->last_colorbase[pageIndex] = new_colorbase;
	7243	k056832_mark_page_dirty(device, pageIndex);
	7244	}
	7245	}
	7246	else
	7247	{
	7248	if (!pageIndex)
	7249	k056832->active_layer = 0;
	7250	}
	7251
	7252	if (k056832_update_linemap(device, bitmap, pageIndex, flags))
	7253	continue;
	7254
	7255	tmap = k056832->tilemap[pageIndex];
	7256	tilemap_set_scrolly(tmap, 0, ay);
	7257
	7258	last_dx = 0x100000;
	7259	last_visible = 0;
	7260
	7261	for (sdat_walk = sdat_start, line_y = line_starty; line_y < line_endy; sdat_walk += sdat_adv, line_y += line_height)
	7262	{
	7263	dminy = line_y;
	7264	dmaxy = line_y + line_height - 1;
	7265
	7266	if (dminy < clipy) dminy = clipy;
	7267	if (dmaxy > clipmaxy) dmaxy = clipmaxy;
	7268	if (dminy > cmaxy || dmaxy < cminy) continue;
	7269
	7270	sdat_offs = sdat_walk & sdat_wrapmask;
	7271
	7272	drawrect.min_y = (dminy < cminy ) ? cminy : dminy;
	7273	drawrect.max_y = (dmaxy > cmaxy ) ? cmaxy : dmaxy;
	7274
	7275	dx = ((int)p_scroll_data[sdat_offs]<<16 | (int)p_scroll_data[sdat_offs + 1]) + corr;
	7276
	7277	if (last_dx == dx) { if (last_visible) goto LINE_SHORTCIRCUIT; continue; }
	7278	last_dx = dx;
	7279
	7280	if (colspan > 1)
	7281	{
	7282	//sx = (unsigned)dx % width;
	7283	sx = (unsigned)dx & (width-1);
	7284
	7285	//tx = c * K056832_PAGE_WIDTH;
	7286	tx = c << 9;
	7287
	7288	if (!flipx)
	7289	{
	7290	// handle right-edge wraparoundness and cull off-screen tilemaps
	7291	if ((c == 0) && (sx > width - K056832_PAGE_WIDTH)) sx -= width;
	7292	if ((sx + K056832_PAGE_WIDTH <= tx) || (sx - K056832_PAGE_WIDTH >= tx))
	7293	{ last_visible = 0; continue; }
	7294
	7295	// switch frame of reference and clip x
	7296	if ((tx -= sx) <= 0) { clipw = K056832_PAGE_WIDTH + tx; clipx = 0; }
	7297	else { clipw = K056832_PAGE_WIDTH - tx; clipx = tx; }
	7298	}
	7299	else
	7300	{
	7301	tx += K056832_PAGE_WIDTH;
	7302
	7303	// handle left-edge wraparoundness and cull off-screen tilemaps
	7304	if ((c == colspan-1) && (sx < K056832_PAGE_WIDTH)) sx += width;
	7305	if ((sx + K056832_PAGE_WIDTH <= tx) || (sx - K056832_PAGE_WIDTH >= tx))
	7306	{ last_visible = 0; continue; }
	7307
	7308	// switch frame of reference and clip y
	7309	if ((tx -= sx) >= 0) { clipw = K056832_PAGE_WIDTH - tx; clipx = 0; }
	7310	else { clipw = K056832_PAGE_WIDTH + tx; clipx = -tx; }
	7311	}
	7312	}
	7313	else { clipw = K056832_PAGE_WIDTH; clipx = 0; }
	7314
	7315	last_visible = 1;
	7316
	7317	dminx = clipx;
	7318	dmaxx = clipx + clipw - 1;
	7319
	7320	drawrect.min_x = (dminx < cminx ) ? cminx : dminx;
	7321	drawrect.max_x = (dmaxx > cmaxx ) ? cmaxx : dmaxx;
	7322
	7323	// soccer superstars visible area is >512 pixels, this causes problems with the logic because
	7324	// the tilemaps are 512 pixels across.  Assume that if the limits were set as below that we
	7325	// want the tilemap to be drawn on the right hand side..  this is probably not the correct
	7326	// logic, but it works.
	7327	if ((drawrect.min_x>0) && (drawrect.max_x==511))
	7328	drawrect.max_x=cliprect->max_x;
	7329
	7330	tilemap_set_scrollx(tmap, 0, dx);
	7331
	7332	LINE_SHORTCIRCUIT:
	7333	tilemap_draw(bitmap, &drawrect, tmap, flags, priority);
	7334
	7335	} // end of line loop
	7336	} // end of column loop
	7337	} // end of row loop
	7338
	7339	k056832->active_layer = last_active;
	7340	} // end of function
	7341
	7342
	7343	void k056832_tilemap_draw_dj( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int layer, UINT32 flags, UINT32 priority )
	7344	{
	7345	k056832_state *k056832 = k056832_get_safe_token(device);
	7346	UINT32 last_dx, last_visible, new_colorbase, last_active;
	7347	int sx, sy, ay, tx, ty, width, height;
	7348	int clipw, clipx, cliph, clipy, clipmaxy;
	7349	int line_height, line_endy, line_starty, line_y;
	7350	int sdat_start, sdat_walk, sdat_adv, sdat_wrapmask, sdat_offs;
	7351	int pageIndex, flipx, flipy, corr, r, c;
	7352	int cminy, cmaxy, cminx, cmaxx;
	7353	int dminy, dmaxy, dminx, dmaxx;
	7354	rectangle drawrect;
	7355	tilemap *tmap;
	7356	UINT16 *p_scroll_data;
	7357	UINT16 ram16[2];
	7358
	7359	int rowstart = k056832->y[layer];
	7360	int colstart = k056832->x[layer];
	7361	int rowspan  = k056832->h[layer] + 1;
	7362	int colspan  = k056832->w[layer] + 1;
	7363	int dy = k056832->dy[layer];
	7364	int dx = k056832->dx[layer];
	7365	int scrollbank = ((k056832->regs[0x18] >> 1) & 0xc) | (k056832->regs[0x18] & 3);
	7366	int scrollmode = k056832->regs[0x05] >> (k056832->lsram_page[layer][0] << 1) & 3;
	7367	int need_wrap = -1;
	7368
	7369	height = rowspan * K056832_PAGE_HEIGHT;
	7370	width  = colspan * K056832_PAGE_WIDTH;
	7371
	7372	cminx = cliprect->min_x;
	7373	cmaxx = cliprect->max_x;
	7374	cminy = cliprect->min_y;
	7375	cmaxy = cliprect->max_y;
	7376
	7377	// flip correction registers
	7378	flipy = k056832->regs[0] & 0x20;
	7379	if (flipy)
	7380	{
	7381	corr = k056832->regs[0x3c/2];
	7382	if (corr & 0x400)
	7383	corr |= 0xfffff800;
	7384	}
	7385	else
	7386	corr = 0;
	7387	dy += corr;
	7388	ay = (unsigned)(dy - k056832->layer_offs[layer][1]) % height;
	7389
	7390	flipx = k056832->regs[0] & 0x10;
	7391	if (flipx)
	7392	{
	7393	corr = k056832->regs[0x3a/2];
	7394	if (corr & 0x800)
	7395	corr |= 0xfffff000;
	7396	}
	7397	else
	7398	corr = 0;
	7399
	7400	corr -= k056832->layer_offs[layer][0];
	7401
	7402	if (scrollmode == 0 && (flags & K056832_DRAW_FLAG_FORCE_XYSCROLL))
	7403	{
	7404	scrollmode = 3;
	7405	flags &= ~K056832_DRAW_FLAG_FORCE_XYSCROLL;
	7406	}
	7407
	7408	switch( scrollmode )
	7409	{
	7410	case 0: // linescroll
	7411	p_scroll_data = &k056832->videoram[scrollbank << 12] + (k056832->lsram_page[layer][1] >> 1);
	7412	line_height = 1;
	7413	sdat_wrapmask = 0x3ff;
	7414	sdat_adv = 2;
	7415	break;
	7416	case 2: // rowscroll
	7417	p_scroll_data = &k056832->videoram[scrollbank << 12] + (k056832->lsram_page[layer][1] >> 1);
	7418	line_height = 8;
	7419	sdat_wrapmask = 0x3ff;
	7420	sdat_adv = 16;
	7421	break;
	7422	default: // xyscroll
	7423	p_scroll_data = ram16;
	7424	line_height = K056832_PAGE_HEIGHT;
	7425	sdat_wrapmask = 0;
	7426	sdat_adv = 0;
	7427	ram16[0] = 0;
	7428	ram16[1] = dx;
	7429	}
	7430	if (flipy)
	7431	sdat_adv = -sdat_adv;
	7432
	7433	last_active = k056832->active_layer;
	7434	new_colorbase = (k056832->k055555 != NULL) ? k055555_get_palette_index(k056832->k055555, layer) : 0;
	7435
	7436	for (r = 0; r <= rowspan; r++)
	7437	{
	7438	sy = ay;
	7439	if (r == rowspan)
	7440	{
	7441	if (need_wrap < 0)
	7442	continue;
	7443
	7444	ty = need_wrap * K056832_PAGE_HEIGHT;
	7445	}
	7446	else
	7447	{
	7448	ty = r * K056832_PAGE_HEIGHT;
	7449	}
	7450
	7451	// cull off-screen tilemaps
	7452	if ((sy + height <= ty) || (sy - height >= ty))
	7453	continue;
	7454
	7455	// switch frame of reference
	7456	ty -= sy;
	7457
	7458	// handle top-edge wraparoundness
	7459	if (r == rowspan)
	7460	{
	7461	cliph = K056832_PAGE_HEIGHT + ty;
	7462	clipy = line_starty = 0;
	7463	line_endy = cliph;
	7464	ty = -ty;
	7465	sdat_start = ty;
	7466	if (scrollmode == 2) { sdat_start &= ~7; line_starty -= ty & 7; }
	7467	}
	7468
	7469	// clip y
	7470	else
	7471	{
	7472	if (ty < 0)
	7473	ty += height;
	7474
	7475	clipy = ty;
	7476	cliph = K056832_PAGE_HEIGHT;
	7477
	7478	if (clipy + cliph > height)
	7479	{
	7480	cliph = height - clipy;
	7481	need_wrap =r;
	7482	}
	7483
	7484	line_starty = ty;
	7485	line_endy = line_starty + cliph;
	7486	sdat_start = 0;
	7487	}
	7488
	7489	if (r == rowspan)
	7490	sdat_start += need_wrap * K056832_PAGE_HEIGHT;
	7491	else
	7492	sdat_start += r * K056832_PAGE_HEIGHT;
	7493	sdat_start <<= 1;
	7494
	7495	clipmaxy = clipy + cliph - 1;
	7496
	7497	for (c = 0; c < colspan; c++)
	7498	{
	7499	if (r == rowspan)
	7500	pageIndex = (((rowstart + need_wrap) & 3) << 2) + ((colstart + c) & 3);
	7501	else
	7502	pageIndex = (((rowstart + r) & 3) << 2) + ((colstart + c) & 3);
	7503
	7504	if (k056832->layer_association)
	7505	{
	7506	if (k056832->layer_assoc_with_page[pageIndex] != layer)
	7507	continue;
	7508	}
	7509	else
	7510	{
	7511	if (k056832->layer_assoc_with_page[pageIndex] == -1) continue;
	7512	k056832->active_layer = layer;
	7513	}
	7514
	7515	if (k056832->k055555 != NULL)      // are we using k055555 palette?
	7516	{
	7517	if (k056832->last_colorbase[pageIndex] != new_colorbase)
	7518	{
	7519	k056832->last_colorbase[pageIndex] = new_colorbase;
	7520	k056832_mark_page_dirty(device, pageIndex);
	7521	}
	7522	}
	7523	else
	7524	{
	7525	if (!pageIndex)
	7526	k056832->active_layer = 0;
	7527	}
	7528
	7529	if (k056832_update_linemap(device, bitmap, pageIndex, flags))
	7530	continue;
	7531
	7532	tmap = k056832->tilemap[pageIndex];
	7533	tilemap_set_scrolly(tmap, 0, ay);
	7534
	7535	last_dx = 0x100000;
	7536	last_visible = 0;
	7537
	7538	for (sdat_walk = sdat_start, line_y = line_starty; line_y < line_endy; sdat_walk += sdat_adv, line_y += line_height)
	7539	{
	7540	dminy = line_y;
	7541	dmaxy = line_y + line_height - 1;
	7542
	7543	if (dminy < clipy) dminy = clipy;
	7544	if (dmaxy > clipmaxy) dmaxy = clipmaxy;
	7545	if (dminy > cmaxy || dmaxy < cminy) continue;
	7546
	7547	sdat_offs = sdat_walk & sdat_wrapmask;
	7548
	7549	drawrect.min_y = (dminy < cminy ) ? cminy : dminy;
	7550	drawrect.max_y = (dmaxy > cmaxy ) ? cmaxy : dmaxy;
	7551
	7552	dx = ((int)p_scroll_data[sdat_offs] << 16 | (int)p_scroll_data[sdat_offs + 1]) + corr;
	7553
	7554	if (last_dx == dx) { if (last_visible) goto LINE_SHORTCIRCUIT; continue; }
	7555	last_dx = dx;
	7556
	7557	if (colspan > 1)
	7558	{
	7559	//sx = (unsigned)dx % width;
	7560	sx = (unsigned)dx & (width-1);
	7561
	7562	//tx = c * K056832_PAGE_WIDTH;
	7563	tx = c << 9;
	7564
	7565	if (!flipx)
	7566	{
	7567	// handle right-edge wraparoundness and cull off-screen tilemaps
	7568	if ((c == 0) && (sx > width - K056832_PAGE_WIDTH)) sx -= width;
	7569	if ((sx + K056832_PAGE_WIDTH <= tx) || (sx - K056832_PAGE_WIDTH >= tx))
	7570	{ last_visible = 0; continue; }
	7571
	7572	// switch frame of reference and clip x
	7573	if ((tx -= sx) <= 0) { clipw = K056832_PAGE_WIDTH + tx; clipx = 0; }
	7574	else { clipw = K056832_PAGE_WIDTH - tx; clipx = tx; }
	7575	}
	7576	else
	7577	{
	7578	tx += K056832_PAGE_WIDTH;
	7579
	7580	// handle left-edge wraparoundness and cull off-screen tilemaps
	7581	if ((c == colspan-1) && (sx < K056832_PAGE_WIDTH)) sx += width;
	7582	if ((sx + K056832_PAGE_WIDTH <= tx) || (sx - K056832_PAGE_WIDTH >= tx))
	7583	{ last_visible = 0; continue; }
	7584
	7585	// switch frame of reference and clip y
	7586	if ((tx -= sx) >= 0) { clipw = K056832_PAGE_WIDTH - tx; clipx = 0; }
	7587	else { clipw = K056832_PAGE_WIDTH + tx; clipx = -tx; }
	7588	}
	7589	}
	7590	else
	7591	{
	7592	clipw = K056832_PAGE_WIDTH;
	7593	clipx = 0;
	7594	}
	7595
	7596	last_visible = 1;
	7597
	7598	dminx = clipx;
	7599	dmaxx = clipx + clipw - 1;
	7600
	7601	drawrect.min_x = (dminx < cminx ) ? cminx : dminx;
	7602	drawrect.max_x = (dmaxx > cmaxx ) ? cmaxx : dmaxx;
	7603
	7604	tilemap_set_scrollx(tmap, 0, dx);
	7605
	7606	LINE_SHORTCIRCUIT:
	7607	tilemap_draw(bitmap, &drawrect, tmap, flags, priority);
	7608
	7609	} // end of line loop
	7610	} // end of column loop
	7611	} // end of row loop
	7612
	7613	k056832->active_layer = last_active;
	7614
	7615	} // end of function
	7616
	7617
	7618	void k056832_set_layer_association( const device_config *device, int status )
	7619	{
	7620	k056832_state *k056832 = k056832_get_safe_token(device);
	7621	k056832->default_layer_association = status;
	7622	}
	7623
	7624	int k056832_get_layer_association( const device_config *device )
	7625	{
	7626	k056832_state *k056832 = k056832_get_safe_token(device);
	7627	return(k056832->layer_association);
	7628	}
	7629
	7630	void k056832_set_layer_offs( const device_config *device, int layer, int offsx, int offsy )
	7631	{
	7632	k056832_state *k056832 = k056832_get_safe_token(device);
	7633	k056832->layer_offs[layer][0] = offsx;
	7634	k056832->layer_offs[layer][1] = offsy;
	7635	}
	7636
	7637	void k056832_set_lsram_page( const device_config *device, int logical_page, int physical_page, int physical_offset )
	7638	{
	7639	k056832_state *k056832 = k056832_get_safe_token(device);
	7640	k056832->lsram_page[logical_page][0] = physical_page;
	7641	k056832->lsram_page[logical_page][1] = physical_offset;
	7642	}
	7643
	7644	void k056832_linemap_enable( const device_config *device, int enable )
	7645	{
	7646	k056832_state *k056832 = k056832_get_safe_token(device);
	7647	k056832->linemap_enabled = enable;
	7648	}
	7649
	7650	int k056832_is_irq_enabled( const device_config *device, int irqline )
	7651	{
	7652	k056832_state *k056832 = k056832_get_safe_token(device);
	7653	return(k056832->regs[0x06/2] & (1 << irqline & 7));
	7654	}
	7655
	7656	void k056832_read_avac( const device_config *device, int *mode, int *data )
	7657	{
	7658	k056832_state *k056832 = k056832_get_safe_token(device);
	7659	*mode = k056832->regs[0x04/2] & 7;
	7660	*data = k056832->regs[0x38/2];
	7661	}
	7662
	7663	int k056832_read_register( const device_config *device, int regnum )
	7664	{
	7665	k056832_state *k056832 = k056832_get_safe_token(device);
	7666	return(k056832->regs[regnum]);
	7667	}
	7668
	7669	//static STATE_POSTLOAD( k056832_postload )
	7670	void k056832_postload( const device_config *device )
	7671	{
	7672	k056832_update_page_layout(device);
	7673	k056832_change_rambank(device);
	7674	k056832_change_rombank(device);
	7675	}
	7676
	7677	/*****************************************************************************
	7678	DEVICE INTERFACE
	7679	*****************************************************************************/
	7680
	7681	/* TODO: understand which elements MUST be init here (to keep correct layer
	7682	associations) and which ones can can be init at RESET, if any */
	7683	static DEVICE_START( k056832 )
	7684	{
	7685	k056832_state *k056832 = k056832_get_safe_token(device);
	7686	const k056832_interface *intf = k056832_get_interface(device);
	7687	running_machine *machine = device->machine;
	7688	tilemap *tmap;
	7689	int i;
	7690	UINT32 total;
	7691	static const gfx_layout charlayout8 =
	7692	{
	7693	8, 8,
	7694	0,
	7695	8,
	7696	{ 8*7,8*3,8*5,8*1,8*6,8*2,8*4,8*0 },
	7697	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	7698	{ 0, 8*8, 8*8*2, 8*8*3, 8*8*4, 8*8*5, 8*8*6, 8*8*7 },
	7699	8*8*8
	7700	};
	7701	static const gfx_layout charlayout8le =
	7702	{
	7703	8, 8,
	7704	0,
	7705	8,
	7706	//      { 0, 1, 2, 3, 0+(0x200000*8), 1+(0x200000*8), 2+(0x200000*8), 3+(0x200000*8) },
	7707	{ 0+(0x200000*8), 1+(0x200000*8), 2+(0x200000*8), 3+(0x200000*8), 0, 1, 2, 3 },
	7708	{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 },
	7709	{ 0*8*4, 1*8*4, 2*8*4, 3*8*4, 4*8*4, 5*8*4, 6*8*4, 7*8*4 },
	7710	8*8*4
	7711	};
	7712	static const gfx_layout charlayout6 =
	7713	{
	7714	8, 8,
	7715	0,
	7716	6,
	7717	{ 40, 32, 24, 8, 16, 0 },
	7718	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	7719	{ 0, 6*8, 6*8*2, 6*8*3, 6*8*4, 6*8*5, 6*8*6, 6*8*7 },
	7720	8*8*6
	7721	};
	7722	static const gfx_layout charlayout5 =
	7723	{
	7724	8, 8,
	7725	0,
	7726	5,
	7727	{ 32, 24, 8, 16, 0 },
	7728	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	7729	{ 0, 5*8, 5*8*2, 5*8*3, 5*8*4, 5*8*5, 5*8*6, 5*8*7 },
	7730	8*8*5
	7731	};
	7732	static const gfx_layout charlayout4 =
	7733	{
	7734	8, 8,
	7735	0,
	7736	4,
	7737	{ 0, 1, 2, 3 },
	7738	{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 },
	7739	{ 0*8*4, 1*8*4, 2*8*4, 3*8*4, 4*8*4, 5*8*4, 6*8*4, 7*8*4 },
	7740	8*8*4
	7741	};
	7742	static const gfx_layout charlayout4dj =
	7743	{
	7744	8, 8,
	7745	0,
	7746	4,
	7747	{ 8*3,8*1,8*2,8*0 },
	7748	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	7749	{ 0, 8*4, 8*4*2, 8*4*3, 8*4*4, 8*4*5, 8*4*6, 8*4*7 },
	7750	8*8*4
	7751	};
	7752
	7753
	7754	/* handle the various graphics formats */
	7755	i = (intf->big) ? 8 : 16;
	7756
	7757
	7758	/* decode the graphics */
	7759	switch (intf->bpp)
	7760	{
	7761	case K056832_BPP_4:
	7762	total = memory_region_length(machine, intf->gfx_memory_region) / (i * 4);
	7763	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout4, 4);
	7764	break;
	7765
	7766	case K056832_BPP_5:
	7767	total = memory_region_length(machine, intf->gfx_memory_region) / (i * 5);
	7768	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout5, 4);
	7769	break;
	7770
	7771	case K056832_BPP_6:
	7772	total = memory_region_length(machine, intf->gfx_memory_region) / (i * 6);
	7773	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout6, 4);
	7774	break;
	7775
	7776	case K056832_BPP_8:
	7777	total = memory_region_length(machine, intf->gfx_memory_region) / (i * 8);
	7778	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout8, 4);
	7779	break;
	7780
	7781	case K056832_BPP_8LE:
	7782	total = memory_region_length(machine, intf->gfx_memory_region) / (i * 8);
	7783	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout8le, 4);
	7784	break;
	7785
	7786	case K056832_BPP_4dj:
	7787	total = memory_region_length(machine, intf->gfx_memory_region) / (i * 4);
	7788	decode_gfx(machine, intf->gfx_num, memory_region(machine, intf->gfx_memory_region), total, &charlayout4dj, 4);
	7789	break;
	7790
	7791	default:
	7792	fatalerror("Unsupported bpp");
	7793	}
	7794
	7795	machine->gfx[intf->gfx_num]->color_granularity = 16; /* override */
	7796
	7797	/* deinterleave the graphics, if needed */
	7798	deinterleave_gfx(machine, intf->gfx_memory_region, intf->deinterleave);
	7799
	7800	k056832->memory_region = intf->gfx_memory_region;
	7801	k056832->gfxnum = intf->gfx_num;
	7802	k056832->callback = intf->callback;
	7803
	7804	k056832->rombase = memory_region(machine, intf->gfx_memory_region);
	7805	k056832->num_gfx_banks = memory_region_length(machine, intf->gfx_memory_region) / 0x2000;
	7806	k056832->djmain_hack = intf->djmain_hack;
	7807
	7808	k056832->cur_gfx_banks = 0;
	7809	k056832->use_ext_linescroll = 0;
	7810	k056832->uses_tile_banks = 0;
	7811
	7812	for (i = 0; i < 4; i++)
	7813	{
	7814	k056832->layer_offs[i][0] = 0;
	7815	k056832->layer_offs[i][1] = 0;
	7816	k056832->lsram_page[i][0] = i;
	7817	k056832->lsram_page[i][1] = i << 11;
	7818	k056832->x[i] = 0;
	7819	k056832->y[i] = 0;
	7820	k056832->w[i] = 0;
	7821	k056832->h[i] = 0;
	7822	k056832->dx[i] = 0;
	7823	k056832->dy[i] = 0;
	7824	k056832->layer_tile_mode[i] = 1;
	7825	}
	7826
	7827	k056832->default_layer_association = 1;
	7828	k056832->active_layer = 0;
	7829	k056832->linemap_enabled = 0;
	7830
	7831	k056832->k055555 = devtag_get_device(device->machine, intf->k055555);
	7832
	7833	memset(k056832->line_dirty, 0, sizeof(UINT32) * K056832_PAGE_COUNT * 8);
	7834
	7835	for (i = 0; i < K056832_PAGE_COUNT; i++)
	7836	{
	7837	k056832->all_lines_dirty[i] = 0;
	7838	k056832->page_tile_mode[i] = 1;
	7839	}
	7840
	7841	k056832->videoram = auto_alloc_array(machine, UINT16, 0x2000 * (K056832_PAGE_COUNT + 1) / 2);
	7842
	7843	k056832->tilemap[0x0] = tilemap_create_device(device, k056832_get_tile_info0, tilemap_scan_rows,  8, 8, 64, 32);
	7844	k056832->tilemap[0x1] = tilemap_create_device(device, k056832_get_tile_info1, tilemap_scan_rows,  8, 8, 64, 32);
	7845	k056832->tilemap[0x2] = tilemap_create_device(device, k056832_get_tile_info2, tilemap_scan_rows,  8, 8, 64, 32);
	7846	k056832->tilemap[0x3] = tilemap_create_device(device, k056832_get_tile_info3, tilemap_scan_rows,  8, 8, 64, 32);
	7847	k056832->tilemap[0x4] = tilemap_create_device(device, k056832_get_tile_info4, tilemap_scan_rows,  8, 8, 64, 32);
	7848	k056832->tilemap[0x5] = tilemap_create_device(device, k056832_get_tile_info5, tilemap_scan_rows,  8, 8, 64, 32);
	7849	k056832->tilemap[0x6] = tilemap_create_device(device, k056832_get_tile_info6, tilemap_scan_rows,  8, 8, 64, 32);
	7850	k056832->tilemap[0x7] = tilemap_create_device(device, k056832_get_tile_info7, tilemap_scan_rows,  8, 8, 64, 32);
	7851	k056832->tilemap[0x8] = tilemap_create_device(device, k056832_get_tile_info8, tilemap_scan_rows,  8, 8, 64, 32);
	7852	k056832->tilemap[0x9] = tilemap_create_device(device, k056832_get_tile_info9, tilemap_scan_rows,  8, 8, 64, 32);
	7853	k056832->tilemap[0xa] = tilemap_create_device(device, k056832_get_tile_infoa, tilemap_scan_rows,  8, 8, 64, 32);
	7854	k056832->tilemap[0xb] = tilemap_create_device(device, k056832_get_tile_infob, tilemap_scan_rows,  8, 8, 64, 32);
	7855	k056832->tilemap[0xc] = tilemap_create_device(device, k056832_get_tile_infoc, tilemap_scan_rows,  8, 8, 64, 32);
	7856	k056832->tilemap[0xd] = tilemap_create_device(device, k056832_get_tile_infod, tilemap_scan_rows,  8, 8, 64, 32);
	7857	k056832->tilemap[0xe] = tilemap_create_device(device, k056832_get_tile_infoe, tilemap_scan_rows,  8, 8, 64, 32);
	7858	k056832->tilemap[0xf] = tilemap_create_device(device, k056832_get_tile_infof, tilemap_scan_rows,  8, 8, 64, 32);
	7859
	7860	for (i = 0; i < K056832_PAGE_COUNT; i++)
	7861	{
	7862	tmap = k056832->tilemap[i];
	7863
	7864	k056832->pixmap[i] = tilemap_get_pixmap(tmap);
	7865
	7866	tilemap_set_transparent_pen(tmap, 0);
	7867	}
	7868
	7869	memset(k056832->videoram, 0x00, 0x20000);
	7870	memset(k056832->regs,     0x00, sizeof(k056832->regs) );
	7871	memset(k056832->regsb,    0x00, sizeof(k056832->regsb) );
	7872
	7873	k056832_update_page_layout(device);
	7874
	7875	k056832_change_rambank(device);
	7876	k056832_change_rombank(device);
	7877
	7878	state_save_register_device_item_pointer(device, 0, k056832->videoram, 0x10000);
	7879	state_save_register_device_item_array(device, 0, k056832->regs);
	7880	state_save_register_device_item_array(device, 0, k056832->regsb);
	7881	state_save_register_device_item_array(device, 0, k056832->x);
	7882	state_save_register_device_item_array(device, 0, k056832->y);
	7883	state_save_register_device_item_array(device, 0, k056832->w);
	7884	state_save_register_device_item_array(device, 0, k056832->h);
	7885	state_save_register_device_item_array(device, 0, k056832->dx);
	7886	state_save_register_device_item_array(device, 0, k056832->dy);
	7887	state_save_register_device_item_array(device, 0, k056832->layer_tile_mode);
	7888
	7889	state_save_register_device_item(device, 0, k056832->default_layer_association);
	7890	state_save_register_device_item(device, 0, k056832->active_layer);
	7891	state_save_register_device_item(device, 0, k056832->linemap_enabled);
	7892	state_save_register_device_item(device, 0, k056832->use_ext_linescroll);
	7893	state_save_register_device_item(device, 0, k056832->uses_tile_banks);
	7894	state_save_register_device_item(device, 0, k056832->cur_tile_bank);
	7895	state_save_register_device_item(device, 0, k056832->rom_half);
	7896	state_save_register_device_item_array(device, 0, k056832->all_lines_dirty);
	7897	state_save_register_device_item_array(device, 0, k056832->page_tile_mode);
	7898
	7899	for (i = 0; i < 8; i++)
	7900	{
	7901	state_save_register_device_item_array(device, i, k056832->layer_offs[i]);
	7902	state_save_register_device_item_array(device, i, k056832->lsram_page[i]);
	7903	}
	7904
	7905	for (i = 0; i < K056832_PAGE_COUNT; i++)
	7906	{
	7907	state_save_register_device_item_array(device, i, k056832->line_dirty[i]);
	7908	state_save_register_device_item(device, i, k056832->all_lines_dirty[i]);
	7909	state_save_register_device_item(device, i, k056832->page_tile_mode[i]);
	7910	state_save_register_device_item(device, i, k056832->last_colorbase[i]);
	7911	}
	7912
	7913	//  state_save_register_postload(device->machine, k056832_postload, NULL);
	7914	}
	7915
	7916	/***************************************************************************/
	7917	/*                                                                         */
	7918	/*                                 055555                                  */
	7919	/*                                                                         */
	7920	/***************************************************************************/
	7921
	7922	/* K055555 5-bit-per-pixel priority encoder */
	7923	/* This device has 48 8-bit-wide registers */
	7924
	7925	typedef struct _k055555_state k055555_state;
	7926	struct _k055555_state
	7927	{
	7928	UINT8    regs[128];
	7929	};
	7930
	7931	/*****************************************************************************
	7932	INLINE FUNCTIONS
	7933	*****************************************************************************/
	7934
	7935	INLINE k055555_state *k055555_get_safe_token( const device_config *device )
	7936	{
	7937	assert(device != NULL);
	7938	assert(device->token != NULL);
	7939	assert(device->type == K055555);
	7940
	7941	return (k055555_state *)device->token;
	7942	}
	7943
	7944	/*****************************************************************************
	7945	DEVICE HANDLERS
	7946	*****************************************************************************/
	7947
	7948	void k055555_write_reg( const device_config *device, UINT8 regnum, UINT8 regdat )
	7949	{
	7950	k055555_state *k055555 = k055555_get_safe_token(device);
	7951
	7952	static const char *const rnames[46] =
	7953	{
	7954	"BGC CBLK", "BGC SET", "COLSET0", "COLSET1", "COLSET2", "COLSET3", "COLCHG ON",
	7955	"A PRI 0", "A PRI 1", "A COLPRI", "B PRI 0", "B PRI 1", "B COLPRI", "C PRI", "D PRI",
	7956	"OBJ PRI", "SUB1 PRI", "SUB2 PRI", "SUB3 PRI", "OBJ INPRI ON", "S1 INPRI ON", "S2 INPRI ON",
	7957	"S3 INPRI ON", "A PAL", "B PAL", "C PAL", "D PAL", "OBJ PAL", "SUB1 PAL", "SUB2 PAL", "SUB3 PAL",
	7958	"SUB2 PAL ON", "SUB3 PAL ON", "V INMIX", "V INMIX ON", "OS INMIX", "OS INMIX ON", "SHD PRI 1",
	7959	"SHD PRI 2", "SHD PRI 3", "SHD ON", "SHD PRI SEL", "V BRI", "OS INBRI", "OS INBRI ON", "ENABLE"
	7960	};
	7961
	7962	if (regdat != k055555->regs[regnum])
	7963	{
	7964	LOG(("5^5: %x to reg %x (%s)\n", regdat, regnum, rnames[regnum]));
	7965	}
	7966
	7967	k055555->regs[regnum] = regdat;
	7968	}
	7969
	7970	WRITE32_DEVICE_HANDLER( k055555_long_w )
	7971	{
	7972	UINT8 regnum, regdat;
	7973
	7974	if (ACCESSING_BITS_24_31)
	7975	{
	7976	regnum = offset << 1;
	7977	regdat = data >> 24;
	7978	}
	7979	else
	7980	{
	7981	if (ACCESSING_BITS_8_15)
	7982	{
	7983	regnum = (offset << 1) + 1;
	7984	regdat = data >> 8;
	7985	}
	7986	else
	7987	{
	7988	// logerror("5^5: unknown mem_mask %08x\n", mem_mask);
	7989	return;
	7990	}
	7991	}
	7992
	7993	k055555_write_reg(device, regnum, regdat);
	7994	}
	7995
	7996	WRITE16_DEVICE_HANDLER( k055555_word_w )
	7997	{
	7998	if (mem_mask == 0x00ff)
	7999	{
	8000	k055555_write_reg(device, offset, data & 0xff);
	8001	}
	8002	else
	8003	{
	8004	k055555_write_reg(device, offset, data >> 8);
	8005	}
	8006	}
	8007
	8008	int k055555_read_register( const device_config *device, int regnum )
	8009	{
	8010	k055555_state *k055555 = k055555_get_safe_token(device);
	8011	return k055555->regs[regnum];
	8012	}
	8013
	8014	int k055555_get_palette_index( const device_config *device, int idx )
	8015	{
	8016	k055555_state *k055555 = k055555_get_safe_token(device);
	8017	return k055555->regs[K55_PALBASE_A + idx];
	8018	}
	8019
	8020	/*****************************************************************************
	8021	DEVICE INTERFACE
	8022	*****************************************************************************/
	8023
	8024	static DEVICE_START( k055555 )
	8025	{
	8026	k055555_state *k055555 = k055555_get_safe_token(device);
	8027	state_save_register_device_item_array(device, 0, k055555->regs);
	8028	}
	8029
	8030	static DEVICE_RESET( k055555 )
	8031	{
	8032	k055555_state *k055555 = k055555_get_safe_token(device);
	8033	memset(k055555->regs, 0, 64 * sizeof(UINT8));
	8034	}
	8035
	8036
	8037	/***************************************************************************/
	8038	/*                                                                         */
	8039	/*                                 054338                                  */
	8040	/*                                                                         */
	8041	/***************************************************************************/
	8042
	8043	// k054338 alpha blend / final mixer (normally used with the 55555)
	8044	// because the implementation is video dependant, this is just a
	8045	// register-handling shell.
	8046
	8047
	8048	typedef struct _k054338_state k054338_state;
	8049	struct _k054338_state
	8050	{
	8051	UINT16    regs[32];
	8052	int       shd_rgb[9];
	8053	int       alphainverted;
	8054
	8055	const device_config *screen;
	8056	const device_config *k055555;   /* used to fill BG color */
	8057	};
	8058
	8059	/*****************************************************************************
	8060	INLINE FUNCTIONS
	8061	*****************************************************************************/
	8062
	8063	INLINE k054338_state *k054338_get_safe_token( const device_config *device )
	8064	{
	8065	assert(device != NULL);
	8066	assert(device->token != NULL);
	8067	assert(device->type == K054338);
	8068
	8069	return (k054338_state *)device->token;
	8070	}
	8071
	8072	INLINE const k054338_interface *k054338_get_interface( const device_config *device )
	8073	{
	8074	assert(device != NULL);
	8075	assert(device->type == K054338);
	8076	return (const k054338_interface *) device->static_config;
	8077	}
	8078
	8079	/*****************************************************************************
	8080	DEVICE HANDLERS
	8081	*****************************************************************************/
	8082
	8083	WRITE16_DEVICE_HANDLER( k054338_word_w )
	8084	{
	8085	k054338_state *k054338 = k054338_get_safe_token(device);
	8086	COMBINE_DATA(k054338->regs + offset);
	8087	}
	8088
	8089	WRITE32_DEVICE_HANDLER( k054338_long_w )
	8090	{
	8091	offset <<= 1;
	8092	k054338_word_w(device, offset, data >> 16, mem_mask >> 16);
	8093	k054338_word_w(device, offset + 1, data, mem_mask);
	8094	}
	8095
	8096	// returns a 16-bit '338 register
	8097	int  k054338_register_r( const device_config *device, int reg )
	8098	{
	8099	k054338_state *k054338 = k054338_get_safe_token(device);
	8100	return k054338->regs[reg];
	8101	}
	8102
	8103	void k054338_update_all_shadows( const device_config *device, int rushingheroes_hack )
	8104	{
	8105	k054338_state *k054338 = k054338_get_safe_token(device);
	8106	running_machine *machine = device->machine;
	8107	int i, d;
	8108	int noclip = k054338->regs[K338_REG_CONTROL] & K338_CTL_CLIPSL;
	8109
	8110	for (i = 0; i < 9; i++)
	8111	{
	8112	d = k054338->regs[K338_REG_SHAD1R + i] & 0x1ff;
	8113	if (d >= 0x100)
	8114	d -= 0x200;
	8115	k054338->shd_rgb[i] = d;
	8116	}
	8117
	8118	if (!rushingheroes_hack)
	8119	{
	8120	palette_set_shadow_dRGB32(machine, 0, k054338->shd_rgb[0], k054338->shd_rgb[1], k054338->shd_rgb[2], noclip);
	8121	palette_set_shadow_dRGB32(machine, 1, k054338->shd_rgb[3], k054338->shd_rgb[4], k054338->shd_rgb[5], noclip);
	8122	palette_set_shadow_dRGB32(machine, 2, k054338->shd_rgb[6], k054338->shd_rgb[7], k054338->shd_rgb[8], noclip);
	8123	}
	8124	else // rushing heroes seems to specify shadows in another format, or it's not being interpreted properly.
	8125	{
	8126	palette_set_shadow_dRGB32(machine, 0, -80, -80, -80, 0);
	8127	palette_set_shadow_dRGB32(machine, 1, -80, -80, -80, 0);
	8128	palette_set_shadow_dRGB32(machine, 2, -80, -80, -80, 0);
	8129	}
	8130	}
	8131
	8132	// k054338 BG color fill
	8133	void k054338_fill_solid_bg( const device_config *device, bitmap_t *bitmap )
	8134	{
	8135	UINT32 bgcolor;
	8136	UINT32 *pLine;
	8137	int x, y;
	8138
	8139	bgcolor = (k054338_register_r(device, K338_REG_BGC_R) & 0xff) << 16;
	8140	bgcolor |= k054338_register_r(device, K338_REG_BGC_GB);
	8141
	8142	/* and fill the screen with it */
	8143	for (y = 0; y < bitmap->height; y++)
	8144	{
	8145	pLine = (UINT32 *)bitmap->base;
	8146	pLine += (bitmap->rowpixels * y);
	8147	for (x = 0; x < bitmap->width; x++)
	8148	*pLine++ = bgcolor;
	8149	}
	8150	}
	8151
	8152	// Unified k054338/K055555 BG color fill
	8153	void k054338_fill_backcolor( const device_config *device, bitmap_t *bitmap, int mode ) // (see p.67)
	8154	{
	8155	k054338_state *k054338 = k054338_get_safe_token(device);
	8156	int clipx, clipy, clipw, cliph, i, dst_pitch;
	8157	int BGC_CBLK, BGC_SET;
	8158	UINT32 *dst_ptr, *pal_ptr;
	8159	int bgcolor;
	8160	const rectangle *visarea = video_screen_get_visible_area(k054338->screen);
	8161
	8162	clipx = visarea->min_x & ~3;
	8163	clipy = visarea->min_y;
	8164	clipw = (visarea->max_x - clipx + 4) & ~3;
	8165	cliph = visarea->max_y - clipy + 1;
	8166
	8167	dst_ptr = BITMAP_ADDR32(bitmap, clipy, 0);
	8168	dst_pitch = bitmap->rowpixels;
	8169	dst_ptr += clipx;
	8170
	8171	BGC_SET = 0;
	8172	pal_ptr = device->machine->generic.paletteram.u32;
	8173
	8174	if (!mode || k054338->k055555 == NULL)
	8175	{
	8176	// single color output from CLTC
	8177	bgcolor = (int)(k054338->regs[K338_REG_BGC_R] & 0xff) << 16 | (int)k054338->regs[K338_REG_BGC_GB];
	8178	}
	8179	else
	8180	{
	8181	BGC_CBLK = k055555_read_register(k054338->k055555, 0);
	8182	BGC_SET  = k055555_read_register(k054338->k055555, 1);
	8183
	8184	pal_ptr += BGC_CBLK << 9;
	8185
	8186	// single color output from PCU2
	8187	if (!(BGC_SET & 2))
	8188	{
	8189	bgcolor = *pal_ptr;
	8190	mode = 0;
	8191	}
	8192	else bgcolor = 0;
	8193	}
	8194
	8195	if (!mode)
	8196	{
	8197	// single color fill
	8198	dst_ptr += clipw;
	8199	i = clipw = -clipw;
	8200	do
	8201	{
	8202	do
	8203	{
	8204	dst_ptr[i] = dst_ptr[i+1] = dst_ptr[i+2] = dst_ptr[i+3] = bgcolor;
	8205	}
	8206	while (i += 4);
	8207
	8208	dst_ptr += dst_pitch;
	8209	i = clipw;
	8210	}
	8211	while (--cliph);
	8212	}
	8213	else
	8214	{
	8215	if (!(BGC_SET & 1))
	8216	{
	8217	// vertical gradient fill
	8218	pal_ptr += clipy;
	8219	dst_ptr += clipw;
	8220	bgcolor = *pal_ptr++;
	8221	i = clipw = -clipw;
	8222	do
	8223	{
	8224	do
	8225	{
	8226	dst_ptr[i] = dst_ptr[i+1] = dst_ptr[i+2] = dst_ptr[i+3] = bgcolor;
	8227	}
	8228	while (i += 4);
	8229
	8230	dst_ptr += dst_pitch;
	8231	bgcolor = *pal_ptr++;
	8232	i = clipw;
	8233	}
	8234	while (--cliph);
	8235	}
	8236	else
	8237	{
	8238	// horizontal gradient fill
	8239	pal_ptr += clipx;
	8240	clipw <<= 2;
	8241	do
	8242	{
	8243	memcpy(dst_ptr, pal_ptr, clipw);
	8244	dst_ptr += dst_pitch;
	8245	}
	8246	while (--cliph);
	8247	}
	8248	}
	8249	}
	8250
	8251	// addition blending unimplemented (requires major changes to drawgfx and tilemap.c)
	8252	int k054338_set_alpha_level( const device_config *device, int pblend )
	8253	{
	8254	k054338_state *k054338 = k054338_get_safe_token(device);
	8255	UINT16 *regs;
	8256	int ctrl, mixpri, mixset, mixlv;
	8257
	8258	if (pblend <= 0 || pblend > 3)
	8259	{
	8260	return (255);
	8261	}
	8262
	8263	regs   = k054338->regs;
	8264	ctrl   = k054338->regs[K338_REG_CONTROL];
	8265	mixpri = ctrl & K338_CTL_MIXPRI;
	8266	mixset = regs[K338_REG_PBLEND + (pblend >> 1 & 1)] >> (~pblend << 3 & 8);
	8267	mixlv  = mixset & 0x1f;
	8268
	8269	if (k054338->alphainverted)
	8270	mixlv = 0x1f - mixlv;
	8271
	8272	if (!(mixset & 0x20))
	8273	{
	8274	mixlv = (mixlv << 3) | (mixlv >> 2);
	8275	}
	8276	else
	8277	{
	8278	if (!mixpri)
	8279	{
	8280	// source x alpha  +  target (clipped at 255)
	8281	}
	8282	else
	8283	{
	8284	// source  +  target x alpha (clipped at 255)
	8285	}
	8286
	8287	// DUMMY
	8288	if (mixlv && mixlv < 0x1f)
	8289	mixlv = 0x10;
	8290
	8291	mixlv = (mixlv << 3) | (mixlv >> 2);
	8292
	8293	if (VERBOSE)
	8294	popmessage("MIXSET%1d %s addition mode: %02x", pblend, (mixpri) ? "dst" : "src", mixset & 0x1f);
	8295	}
	8296
	8297	return mixlv;
	8298	}
	8299
	8300	void k054338_invert_alpha( const device_config *device, int invert )
	8301	{
	8302	k054338_state *k054338 = k054338_get_safe_token(device);
	8303	k054338->alphainverted = invert;
	8304	}
	8305
	8306
	8307	#if 0
	8308	// FIXME
	8309	void k054338->export_config( const device_config *device, int **shd_rgb )
	8310	{
	8311	k054338_state *k054338 = k054338_get_safe_token(device);
	8312	*shd_rgb = k054338->shd_rgb;
	8313	}
	8314	#endif
	8315
	8316	/*****************************************************************************
	8317	DEVICE INTERFACE
	8318	*****************************************************************************/
	8319
	8320	static DEVICE_START( k054338 )
	8321	{
	8322	k054338_state *k054338 = k054338_get_safe_token(device);
	8323	const k054338_interface *intf = k054338_get_interface(device);
	8324
	8325	k054338->screen = devtag_get_device(device->machine, intf->screen);
	8326	k054338->k055555 = devtag_get_device(device->machine, intf->k055555);
	8327
	8328	k054338->alphainverted = intf->alpha_inv;
	8329
	8330	state_save_register_device_item_array(device, 0, k054338->regs);
	8331	state_save_register_device_item_array(device, 0, k054338->shd_rgb);
	8332	}
	8333
	8334	static DEVICE_RESET( k054338 )
	8335	{
	8336	k054338_state *k054338 = k054338_get_safe_token(device);
	8337
	8338	memset(k054338->regs, 0, sizeof(UINT16)*32);
	8339	memset(k054338->shd_rgb, 0, sizeof(int)*9);
	8340	}
	8341
	8342
	8343	/***************************************************************************/
	8344	/*                                                                         */
	8345	/*                                 053250                                  */
	8346	/*                                                                         */
	8347	/***************************************************************************/
	8348
	8349	typedef struct _k053250_state k053250_state;
	8350	struct _k053250_state
	8351	{
	8352	UINT8       regs[8];
	8353	UINT8       *base;
	8354	UINT16      *ram, *rammax;
	8355	UINT16      *buffer[2];
	8356	UINT32      rommask;
	8357	int         page;
	8358	int         frame, offsx, offsy;
	8359
	8360	const device_config *screen;
	8361	};
	8362
	8363	/*****************************************************************************
	8364	INLINE FUNCTIONS
	8365	*****************************************************************************/
	8366
	8367	INLINE k053250_state *k053250_get_safe_token( const device_config *device )
	8368	{
	8369	assert(device != NULL);
	8370	assert(device->token != NULL);
	8371	assert(device->type == K053250);
	8372
	8373	return (k053250_state *)device->token;
	8374	}
	8375
	8376	INLINE const k053250_interface *k053250_get_interface( const device_config *device )
	8377	{
	8378	assert(device != NULL);
	8379	assert((device->type == K053250));
	8380	return (const k053250_interface *) device->static_config;
	8381	}
	8382
	8383
	8384	/*****************************************************************************
	8385	DEVICE HANDLERS
	8386	*****************************************************************************/
	8387
	8388	// The DMA process should be instantaneous but since rendering in MAME is performed at VIDEO_UPDATE()
	8389	// the k053250 memory must be buffered to maintain visual integrity.
	8390	void k053250_dma( const device_config *device, int limiter )
	8391	{
	8392	k053250_state *k053250 = k053250_get_safe_token(device);
	8393	int last_frame, current_frame;
	8394
	8395	current_frame = video_screen_get_frame_number(k053250->screen);
	8396	last_frame = k053250->frame;
	8397
	8398	if (limiter && current_frame == last_frame)
	8399	return; // make sure we only do DMA transfer once per frame
	8400
	8401	k053250->frame = current_frame;
	8402	memcpy(k053250->buffer[k053250->page], k053250->ram, 0x1000);
	8403	k053250->page ^= 1;
	8404	}
	8405
	8406	WRITE16_DEVICE_HANDLER( k053250_w )
	8407	{
	8408	k053250_state *k053250 = k053250_get_safe_token(device);
	8409
	8410	if (ACCESSING_BITS_0_7)
	8411	{
	8412	// start LVC DMA transfer at the falling edge of control register's bit1
	8413	if (offset == 4 && !(data & 2) && (k053250->regs[4] & 2))
	8414	k053250_dma(device, 1);
	8415
	8416	k053250->regs[offset] = data;
	8417	}
	8418	}
	8419
	8420	READ16_DEVICE_HANDLER( k053250_r )
	8421	{
	8422	k053250_state *k053250 = k053250_get_safe_token(device);
	8423	return k053250->regs[offset];
	8424	}
	8425
	8426	WRITE16_DEVICE_HANDLER( k053250_ram_w )
	8427	{
	8428	k053250_state *k053250 = k053250_get_safe_token(device);
	8429	COMBINE_DATA(k053250->ram + offset);
	8430	}
	8431
	8432	READ16_DEVICE_HANDLER( k053250_ram_r )
	8433	{
	8434	k053250_state *k053250 = k053250_get_safe_token(device);
	8435	return k053250->ram[offset];
	8436	}
	8437
	8438	READ16_DEVICE_HANDLER( k053250_rom_r )
	8439	{
	8440	k053250_state *k053250 = k053250_get_safe_token(device);
	8441
	8442	//  if (!(k053250->regs[5] & 1)) logerror("Back: Reading rom memory with enable=0\n");
	8443
	8444	return *(k053250->base + 0x80000 * k053250->regs[6] + 0x800 * k053250->regs[7] + (offset >> 1));
	8445	}
	8446
	8447
	8448	// Pixel data of the k053250 is nibble packed. It's preferable to be unpacked into byte format.
	8449	static void k053250_unpack_pixels(running_machine *machine, const char *region)
	8450	{
	8451	UINT8 *src_ptr, *dst_ptr;
	8452	int hi_nibble, lo_nibble, offset;
	8453
	8454	dst_ptr = src_ptr = memory_region(machine, region);
	8455	offset = memory_region_length(machine, region) / 2 - 1;
	8456
	8457	do
	8458	{
	8459	lo_nibble = hi_nibble = src_ptr[offset];
	8460	hi_nibble >>= 4;
	8461	lo_nibble &= 0xf;
	8462	dst_ptr[offset * 2    ] = hi_nibble;
	8463	dst_ptr[offset * 2 + 1] = lo_nibble;
	8464	}
	8465	while ((--offset) >= 0);
	8466	}
	8467
	8468
	8469	// utility function to render a clipped scanline vertically or horizontally
	8470	INLINE void k053250_pdraw_scanline32(bitmap_t *bitmap, const pen_t *palette, UINT8 *source,
	8471	const rectangle *cliprect, int linepos, int scroll, int zoom,
	8472	UINT32 clipmask, UINT32 wrapmask, UINT32 orientation, bitmap_t *priority, UINT8 pri)
	8473	{
	8474	// a sixteen-bit fixed point resolution should be adequate to our application
	8475	#define FIXPOINT_PRECISION      16
	8476	#define FIXPOINT_PRECISION_HALF   (1<<(FIXPOINT_PRECISION-1))
	8477
	8478	int end_pixel, flip, dst_min, dst_max, dst_start, dst_length;
	8479
	8480	UINT32 src_wrapmask;
	8481	UINT8  *src_base;
	8482	//int src_x;
	8483	int src_fx, src_fdx;
	8484	int pix_data, dst_offset;
	8485	const pen_t  *pal_base;
	8486	UINT8  *pri_base;
	8487	UINT32 *dst_base;
	8488	int dst_adv;
	8489
	8490	// flip X and flip Y also switch role when the X Y coordinates are swapped
	8491	if (!(orientation & ORIENTATION_SWAP_XY))
	8492	{
	8493	flip = orientation & ORIENTATION_FLIP_X;
	8494	dst_min = cliprect->min_x;
	8495	dst_max = cliprect->max_x;
	8496	}
	8497	else
	8498	{
	8499	flip = orientation & ORIENTATION_FLIP_Y;
	8500	dst_min = cliprect->min_y;
	8501	dst_max = cliprect->max_y;
	8502	}
	8503
	8504	if (clipmask)
	8505	{
	8506	// reject scanlines that are outside of the target bitmap's right(bottom) clip boundary
	8507	dst_start = -scroll;
	8508	if (dst_start > dst_max) return;
	8509
	8510	// calculate target length
	8511	dst_length = clipmask + 1;
	8512	if (zoom) dst_length = (dst_length << 6) / zoom;
	8513
	8514	// reject scanlines that are outside of the target bitmap's left(top) clip boundary
	8515	end_pixel = dst_start + dst_length - 1;
	8516	if (end_pixel < dst_min) return;
	8517
	8518	// clip scanline tail
	8519	if ((end_pixel -= dst_max) > 0) dst_length -= end_pixel;
	8520
	8521	// reject zero-length scanlines
	8522	if (dst_length <= 0) return;
	8523
	8524	// calculate zoom factor
	8525	src_fdx = zoom << (FIXPOINT_PRECISION-6);
	8526
	8527	// clip scanline head
	8528	end_pixel = dst_min;
	8529	if ((end_pixel -= dst_start) > 0)
	8530	{
	8531	// chop scanline to the correct length and move target start location to the left(top) clip boundary
	8532	dst_length -= end_pixel;
	8533	dst_start = dst_min;
	8534
	8535	// and skip the source for the left(top) clip region
	8536	src_fx = end_pixel * src_fdx + FIXPOINT_PRECISION_HALF;
	8537	}
	8538	else
	8539	// the point five bias is to ensure even distribution of stretched or shrinked pixels
	8540	src_fx = FIXPOINT_PRECISION_HALF;
	8541
	8542	// adjust flipped source
	8543	if (flip)
	8544	{
	8545	// start from the target's clipped end if the scanline is flipped
	8546	dst_start = dst_max + dst_min - dst_start - (dst_length-1);
	8547
	8548	// and move source start location to the opposite end
	8549	src_fx += (dst_length-1) * src_fdx - 1;
	8550	src_fdx = -src_fdx;
	8551	}
	8552	}
	8553	else
	8554	{
	8555	// draw wrapped scanline at virtual bitmap boundary when source clipping is off
	8556	dst_start = dst_min;
	8557	dst_length = dst_max - dst_min + 1;   // target scanline spans the entire visible area
	8558	src_fdx = zoom << (FIXPOINT_PRECISION-6);
	8559
	8560	// pre-advance source for the clipped region
	8561	if (!flip)
	8562	src_fx = (scroll + dst_min) * src_fdx + FIXPOINT_PRECISION_HALF;
	8563	else
	8564	{
	8565	src_fx = (scroll + dst_max) * src_fdx + FIXPOINT_PRECISION_HALF-1;
	8566	src_fdx = -src_fdx;
	8567	}
	8568	}
	8569
	8570	if (!(orientation & ORIENTATION_SWAP_XY))
	8571	{
	8572	// calculate target increment for horizontal scanlines which is exactly one
	8573	dst_adv = 1;
	8574	dst_offset = dst_length;
	8575	pri_base = BITMAP_ADDR8(priority, linepos, dst_start + dst_offset);
	8576	dst_base = BITMAP_ADDR32(bitmap, linepos, dst_start + dst_length);
	8577	}
	8578	else
	8579	{
	8580	// calculate target increment for vertical scanlines which is the bitmap's pitch value
	8581	dst_adv = bitmap->rowpixels;
	8582	dst_offset= dst_length * dst_adv;
	8583	pri_base = BITMAP_ADDR8(priority, dst_start, linepos + dst_offset);
	8584	dst_base = BITMAP_ADDR32(bitmap, dst_start, linepos + dst_offset);
	8585	}
	8586
	8587	// generalized
	8588	src_base = source;
	8589	//src_x = 0;
	8590
	8591	// there is no need to wrap source offsets along with source clipping
	8592	// so we set all bits of the wrapmask to one
	8593	src_wrapmask = (clipmask) ? ~0 : wrapmask;
	8594
	8595	pal_base = palette;
	8596	dst_offset = -dst_offset; // negate target offset in order to terminated draw loop at zero condition
	8597
	8598	if (pri)
	8599	{
	8600	// draw scanline and update priority bitmap
	8601	do
	8602	{
	8603	pix_data = src_base[(src_fx>>FIXPOINT_PRECISION) & src_wrapmask];
	8604	src_fx += src_fdx;
	8605
	8606	if (pix_data)
	8607	{
	8608	pix_data = pal_base[pix_data];
	8609	pri_base[dst_offset] = pri;
	8610	dst_base[dst_offset] = pix_data;
	8611	}
	8612	}
	8613	while (dst_offset += dst_adv);
	8614	}
	8615	else
	8616	{
	8617	// draw scanline but do not update priority bitmap
	8618	do
	8619	{
	8620	pix_data = src_base[(src_fx>>FIXPOINT_PRECISION) & src_wrapmask];
	8621	src_fx += src_fdx;
	8622
	8623	if (pix_data)
	8624	{
	8625	dst_base[dst_offset] = pal_base[pix_data];
	8626	}
	8627	}
	8628	while (dst_offset += dst_adv);
	8629	}
	8630
	8631	#undef FIXPOINT_PRECISION
	8632	#undef FIXPOINT_PRECISION_HALF
	8633	}
	8634
	8635	void k053250_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int colorbase, int flags, int priority )
	8636	{
	8637	k053250_state *k053250 = k053250_get_safe_token(device);
	8638	UINT16 *line_ram;
	8639	UINT8 *pix_base, *pix_ptr, *regs;
	8640	const pen_t *pal_base, *pal_ptr;
	8641	UINT32 rommask, src_clipmask, src_wrapmask, dst_wrapmask;
	8642	int map_scrollx, map_scrolly, ctrl, orientation;
	8643	int dst_minx, dst_maxx, dst_miny, dst_maxy;
	8644	int linedata_offs, linedata_adv, line_pos, line_start, line_end, scroll_corr;
	8645	int color, offset, zoom, scroll, passes, i, dst_height;
	8646
	8647	line_ram = k053250->buffer[k053250->page];   // pointer to physical line RAM
	8648	pix_base = k053250->base;                     // pointer to source pixel ROM
	8649	rommask  = k053250->rommask;                  // source ROM limit
	8650	regs     = k053250->regs;                     // pointer to registers group
	8651
	8652	map_scrollx = (short)(regs[0] << 8 | regs[1]);      // signed horizontal scroll value
	8653	map_scrolly = (short)(regs[2] << 8 | regs[3]);      // signed vertical scroll value
	8654	map_scrollx -= k053250->offsx;                  // add user X offset to horizontal scroll
	8655	map_scrolly -= k053250->offsy;                  // add user Y offset to vertical scroll
	8656	ctrl = regs[4];                              // register four is the main control register
	8657
	8658	// copy visible boundary values to more accessible locations
	8659	dst_minx  = cliprect->min_x;
	8660	dst_maxx  = cliprect->max_x;
	8661	dst_miny  = cliprect->min_y;
	8662	dst_maxy  = cliprect->max_y;
	8663
	8664	orientation  = 0;   // orientation defaults to no swapping and no flipping
	8665	dst_height   = 512;   // virtual bitmap height defaults to five hundred and twelve pixels
	8666	linedata_adv = 4;   // line info packets are four words(eight bytes) apart
	8667
	8668	{
	8669	// switch X and Y parameters when the first bit of the control register is cleared
	8670	if (!(ctrl & 0x01)) orientation |= ORIENTATION_SWAP_XY;
	8671
	8672	// invert X parameters when the forth bit of the control register is set
	8673	if   (ctrl & 0x08)  orientation |= ORIENTATION_FLIP_X;
	8674
	8675	// invert Y parameters when the fifth bit of the control register is set
	8676	if   (ctrl & 0x10)  orientation |= ORIENTATION_FLIP_Y;
	8677
	8678	switch (ctrl >> 5) // the upper four bits of the control register select source and target dimensions
	8679	{
	8680	case 0 :
	8681	// Xexex: L6 galaxies
	8682	// Metam: L4 forest, L5 arena, L6 tower interior, final boss
	8683
	8684	// crop source offset between zero and two hundred and fifty-five inclusive,
	8685	// and set virtual bitmap height to two hundred and fifty-six pixels
	8686	src_wrapmask = src_clipmask = 0xff;
	8687	dst_height = 0x100;
	8688	break;
	8689	case 1 :
	8690	// Xexex: prologue, L7 nebulae
	8691
	8692	// the source offset is cropped to zero and five hundred and eleven inclusive
	8693	src_wrapmask = src_clipmask = 0x1ff;
	8694	break;
	8695	case 4 :
	8696	// Xexex: L1 sky and boss, L3 planet, L5 poly-face, L7 battle ship patches
	8697	// Metam: L1 summoning circle, L3 caves, L6 gargoyle towers
	8698
	8699	// crop source offset between zero and two hundred and fifty-five inclusive,
	8700	// and allow source offset to wrap back at 500 hexadecimal to minus 300 hexadecimal
	8701	src_wrapmask = src_clipmask = 0xff;
	8702	flags |= K053250_WRAP500;
	8703	break;
	8704	//          case 2 : // Xexex: title
	8705	//          case 7 : // Xexex: L4 organic stage
	8706	default:
	8707
	8708	// crop source offset between zero and one thousand and eleven inclusive,
	8709	// keep other dimensions to their defaults
	8710	src_wrapmask = src_clipmask = 0x3ff;
	8711	break;
	8712	}
	8713
	8714	// disable source clipping when the third bit of the control register is set
	8715	if (ctrl & 0x04) src_clipmask = 0;
	8716
	8717	if (!(orientation & ORIENTATION_SWAP_XY))   // normal orientaion with no X Y switching
	8718	{
	8719	line_start = dst_miny;         // the first scanline starts at the minimum Y clip location
	8720	line_end   = dst_maxy;         // the last scanline ends at the maximum Y clip location
	8721	scroll_corr = map_scrollx;      // concentrate global X scroll
	8722	linedata_offs = map_scrolly;   // determine where to get info for the first line
	8723
	8724	if (orientation & ORIENTATION_FLIP_X)
	8725	{
	8726	scroll_corr = -scroll_corr;   // X scroll adjustment should be negated in X flipped scenarioes
	8727	}
	8728
	8729	if (orientation & ORIENTATION_FLIP_Y)
	8730	{
	8731	linedata_adv = -linedata_adv;         // traverse line RAM backward in Y flipped scenarioes
	8732	linedata_offs += bitmap->height - 1;   // and get info for the first line from the bottom
	8733	}
	8734
	8735	dst_wrapmask = ~0;   // scanlines don't seem to wrap horizontally in normal orientation
	8736	passes = 1;         // draw scanline in a single pass
	8737	}
	8738	else  // orientaion with X and Y parameters switched
	8739	{
	8740	line_start = dst_minx;         // the first scanline starts at the minimum X clip location
	8741	line_end   = dst_maxx;         // the last scanline ends at the maximum X clip location
	8742	scroll_corr = map_scrolly;      // concentrate global Y scroll
	8743	linedata_offs = map_scrollx;   // determine where to get info for the first line
	8744
	8745	if (orientation & ORIENTATION_FLIP_Y)
	8746	{
	8747	scroll_corr = 0x100 - scroll_corr;   // apply common vertical correction
	8748
	8749	// Y correction (ref: 1st and 5th boss)
	8750	scroll_corr -= 2;   // apply unique vertical correction
	8751
	8752	// X correction (ref: 1st boss, seems to undo non-rotated global X offset)
	8753	linedata_offs -= 5;   // apply unique horizontal correction
	8754	}
	8755
	8756	if (orientation & ORIENTATION_FLIP_X)
	8757	{
	8758	linedata_adv = -linedata_adv;      // traverse line RAM backward in X flipped scenarioes
	8759	linedata_offs += bitmap->width - 1;   // and get info for the first line from the bottom
	8760	}
	8761
	8762	if (src_clipmask)
	8763	{
	8764	// determine target wrap boundary and draw scanline in two passes if the source is clipped
	8765	dst_wrapmask = dst_height - 1;
	8766	passes = 2;
	8767	}
	8768	else
	8769	{
	8770	// otherwise disable target wraparound and draw scanline in a single pass
	8771	dst_wrapmask = ~0;
	8772	passes = 1;
	8773	}
	8774	}
	8775	}
	8776
	8777	linedata_offs *= 4;                        // each line info packet has four words(eight bytes)
	8778	linedata_offs &= 0x7ff;                     // and it should wrap at the four-kilobyte boundary
	8779	linedata_offs += line_start * linedata_adv;      // pre-advance line info offset for the clipped region
	8780
	8781	// load physical palette base
	8782	pal_base = device->machine->pens + (colorbase << 4) % device->machine->config->total_colors;
	8783
	8784	// walk the target bitmap within the visible area vertically or horizontally, one line at a time
	8785	for (line_pos=line_start; line_pos <= line_end; linedata_offs += linedata_adv, line_pos++)
	8786	{
	8787	linedata_offs &= 0x7ff;                  // line info data wraps at the four-kilobyte boundary
	8788
	8789	color  = line_ram[linedata_offs];         // get scanline color code
	8790	if (color == 0xffff) continue;            // reject scanline if color code equals minus one
	8791
	8792	offset   = line_ram[linedata_offs + 1];      // get first pixel offset in ROM
	8793	if (!(color & 0xff) && !offset) continue;   // reject scanline if both color and pixel offset are zero
	8794
	8795	// calculate physical palette location
	8796	// there can be thirty-two color codes and each code represents sixteen pens
	8797	pal_ptr = pal_base + ((color & 0x1f) << 4);
	8798
	8799	// calculate physical pixel location
	8800	// each offset unit represents two hundred and fifty six pixels and should wrap at ROM boundary for safty
	8801	pix_ptr = pix_base + (offset << 8) % rommask;
	8802
	8803	// get scanline zoom factor
	8804	// For example, 0x20 doubles the length, 0x40 maintains a one-to-one length,
	8805	// and 0x80 halves the length. The zoom center is at the beginning of the
	8806	// scanline therefore it is not necessary to adjust render start position
	8807	zoom    = line_ram[linedata_offs + 2];
	8808
	8809	scroll  = (short)line_ram[linedata_offs + 3];   // get signed local scroll value for the current scanline
	8810
	8811	// scavenged from old code; improves Xexex' first level sky
	8812	if (flags & K053250_WRAP500 && scroll >= 0x500) scroll -= 0x800;
	8813
	8814	scroll += scroll_corr;   // apply final scroll correction
	8815	scroll &= dst_wrapmask;   // wraparound scroll value if necessary
	8816
	8817	// draw scanlines wrapped at virtual bitmap boundary in two passes
	8818	// this should not impose too much overhead due to clipping performed by the render code
	8819	i = passes;
	8820	do
	8821	{
	8822	/*
	8823	Parameter descriptions:
	8824
	8825	bitmap       : pointer to a MAME bitmap as the render target
	8826	pal_ptr      : pointer to the palette's physical location relative to the scanline
	8827	pix_ptr      : pointer to the physical start location of source pixels in ROM
	8828	cliprect     : pointer to a rectangle structue which describes the visible area of the target bitmap
	8829	line_pos     : scanline render position relative to the target bitmap
	8830	should be a Y offset to the target bitmap in normal orientaion,
	8831	or an X offset to the target bitmap if X,Y are swapped
	8832	scroll       : source scroll value of the scanline
	8833	zoom         : source zoom factor of the scanline
	8834	src_clipmask : source offset clip mask; source pixels with offsets beyond the scope of this mask will not be drawn
	8835	src_wrapmask : source offset wrap mask; wraps source offset around, no effect when src_clipmask is set
	8836	orientation  : flags indicating whether scanlines should be drawn horizontally, vertically, forward or backward
	8837	priority     : value to be written to the priority bitmap, no effect when equals zero
	8838	*/
	8839	k053250_pdraw_scanline32(bitmap, pal_ptr, pix_ptr, cliprect,
	8840	line_pos, scroll, zoom, src_clipmask, src_wrapmask, orientation, device->machine->priority_bitmap, (UINT8)priority);
	8841
	8842	// shift scanline position one virtual screen upward to render the wrapped end if necessary
	8843	scroll -= dst_height;
	8844	}
	8845	while (--i);
	8846	}
	8847	}
	8848
	8849	/*****************************************************************************
	8850	DEVICE INTERFACE
	8851	*****************************************************************************/
	8852
	8853	static DEVICE_START( k053250 )
	8854	{
	8855	k053250_state *k053250 = k053250_get_safe_token(device);
	8856	const k053250_interface *intf = k053250_get_interface(device);
	8857
	8858	k053250->base = memory_region(device->machine, intf->gfx_memory_region);
	8859	k053250->rommask = memory_region_length(device->machine, intf->gfx_memory_region);
	8860
	8861	k053250->screen = devtag_get_device(device->machine, intf->screen);
	8862
	8863	k053250->ram = auto_alloc_array(device->machine, UINT16, 0x6000 / 2);
	8864
	8865	k053250->rammax = k053250->ram + 0x800;
	8866	k053250->buffer[0] = k053250->ram + 0x2000;
	8867	k053250->buffer[1] = k053250->ram + 0x2800;
	8868
	8869	k053250->offsx = intf->xoff;
	8870	k053250->offsy = intf->yoff;
	8871
	8872	/* unpack graphics */
	8873	k053250_unpack_pixels(device->machine, intf->gfx_memory_region);
	8874
	8875	state_save_register_device_item_pointer(device, 0, k053250->ram, 0x6000 / 2);
	8876	state_save_register_device_item_array(device, 0, k053250->regs);
	8877	state_save_register_device_item(device, 0, k053250->page);
	8878	state_save_register_device_item(device, 0, k053250->frame);
	8879	}
	8880
	8881	static DEVICE_RESET( k053250 )
	8882	{
	8883	k053250_state *k053250 = k053250_get_safe_token(device);
	8884	int i;
	8885
	8886	k053250->page = 0;
	8887	k053250->frame = -1;
	8888
	8889	for (i = 0; i < 8; i++)
	8890	k053250->regs[i] = 0;
	8891
	8892	}
	8893
	8894
	8895	/***************************************************************************/
	8896	/*                                                                         */
	8897	/*                                 053252                                  */
	8898	/*                                                                         */
	8899	/***************************************************************************/
	8900
	8901	typedef struct _k053252_state k053252_state;
	8902	struct _k053252_state
	8903	{
	8904	UINT16   regs[16];
	8905	};
	8906
	8907	/*****************************************************************************
	8908	INLINE FUNCTIONS
	8909	*****************************************************************************/
	8910
	8911	INLINE k053252_state *k053252_get_safe_token( const device_config *device )
	8912	{
	8913	assert(device != NULL);
	8914	assert(device->token != NULL);
	8915	assert(device->type == K053252);
	8916
	8917	return (k053252_state *)device->token;
	8918	}
	8919
	8920	/*****************************************************************************
	8921	DEVICE HANDLERS
	8922	*****************************************************************************/
	8923
	8924	READ16_DEVICE_HANDLER( k053252_word_r )
	8925	{
	8926	k053252_state *k053252 = k053252_get_safe_token(device);
	8927	return k053252->regs[offset];
	8928	}
	8929
	8930	WRITE16_DEVICE_HANDLER( k053252_word_w )
	8931	{
	8932	k053252_state *k053252 = k053252_get_safe_token(device);
	8933	COMBINE_DATA(k053252->regs + offset);
	8934	}
	8935
	8936	WRITE32_DEVICE_HANDLER( k053252_long_w )
	8937	{
	8938	offset <<= 1;
	8939	k053252_word_w(device, offset, data >> 16, mem_mask >> 16);
	8940	k053252_word_w(device, offset + 1, data, mem_mask);
	8941	}
	8942
	8943	/*****************************************************************************
	8944	DEVICE INTERFACE
	8945	*****************************************************************************/
	8946
	8947	static DEVICE_START( k053252 )
	8948	{
	8949	k053252_state *k053252 = k053252_get_safe_token(device);
	8950
	8951	state_save_register_device_item_array(device, 0, k053252->regs);
	8952	}
	8953
	8954	static DEVICE_RESET( k053252 )
	8955	{
	8956	k053252_state *k053252 = k053252_get_safe_token(device);
	8957	int i;
	8958
	8959	for (i = 0; i < 16; i++)
	8960	k053252->regs[i] = 0;
	8961	}
	8962
	8963
	8964	// debug handlers
	8965	READ16_DEVICE_HANDLER( k056832_word_r )
	8966	{
	8967	k056832_state *k056832 = k056832_get_safe_token(device);
	8968	return (k056832->regs[offset]);
	8969	}      // VACSET
	8970
	8971	READ16_DEVICE_HANDLER( k056832_b_word_r )
	8972	{
	8973	k056832_state *k056832 = k056832_get_safe_token(device);
	8974	return (k056832->regsb[offset]);
	8975	}   // VSCCS (board dependent)
	8976
	8977	READ16_DEVICE_HANDLER( k053246_reg_word_r )
	8978	{
	8979	k053247_state *k053247 = k053247_get_safe_token(device);
	8980	return(k053247->Kx46_regs[offset * 2] << 8 | k053247->Kx46_regs[offset * 2 + 1]);
	8981	}   // OBJSET1
	8982
	8983	READ16_DEVICE_HANDLER( k053247_reg_word_r )
	8984	{
	8985	k053247_state *k053247 = k053247_get_safe_token(device);
	8986	return(k053247->Kx47_regs[offset]);
	8987	}   // OBJSET2
	8988
	8989	READ16_DEVICE_HANDLER( k054338_word_r )
	8990	{
	8991	k054338_state *k054338 = k054338_get_safe_token(device);
	8992	return(k054338->regs[offset]);
	8993	}      // CLTC
	8994
	8995	READ16_DEVICE_HANDLER( k053251_lsb_r )
	8996	{
	8997	k053251_state *k053251 = k053251_get_safe_token(device);
	8998	return(k053251->ram[offset]);
	8999	}      // PCU1
	9000
	9001	READ16_DEVICE_HANDLER( k053251_msb_r )
	9002	{
	9003	k053251_state *k053251 = k053251_get_safe_token(device);
	9004	return(k053251->ram[offset] << 8);
	9005	}      // PCU1
	9006
	9007	READ16_DEVICE_HANDLER( k055555_word_r )
	9008	{
	9009	k055555_state *k055555 = k055555_get_safe_token(device);
	9010	return(k055555->regs[offset] << 8);
	9011	}   // PCU2
	9012
	9013	READ32_DEVICE_HANDLER( k056832_long_r )
	9014	{
	9015	offset <<= 1;
	9016	return (k056832_word_r(device, offset + 1, 0xffff) | k056832_word_r(device, offset, 0xffff) << 16);
	9017	}
	9018
	9019	READ32_DEVICE_HANDLER( k053247_reg_long_r )
	9020	{
	9021	offset <<= 1;
	9022	return (k053247_reg_word_r(device, offset + 1, 0xffff) | k053247_reg_word_r(device, offset, 0xffff) << 16);
	9023	}
	9024
	9025	READ32_DEVICE_HANDLER( k055555_long_r )
	9026	{
	9027	offset <<= 1;
	9028	return (k055555_word_r(device, offset + 1, 0xffff) | k055555_word_r(device, offset, 0xffff) << 16);
	9029	}
	9030
	9031	READ16_DEVICE_HANDLER( k053244_reg_word_r )
	9032	{
	9033	k05324x_state *k053244 = k05324x_get_safe_token(device);
	9034	return(k053244->regs[offset * 2] << 8 | k053244->regs[offset * 2 + 1]);
	9035	}
	9036
	9037	/*************************************************************************/
	9038
	9039	DEVICE_GET_INFO( k007121 )
	9040	{
	9041	switch (state)
	9042	{
	9043	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9044	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k007121_state);               break;
	9045	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9046
	9047	/* --- the following bits of info are returned as pointers to data or functions --- */
	9048	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k007121);      break;
	9049	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9050	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k007121);      break;
	9051
	9052	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9053	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 007121");            break;
	9054	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9055	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9056	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9057	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9058	}
	9059	}
	9060
	9061
	9062	DEVICE_GET_INFO( k007342 )
	9063	{
	9064	switch (state)
	9065	{
	9066	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9067	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k007342_state);               break;
	9068	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9069
	9070	/* --- the following bits of info are returned as pointers to data or functions --- */
	9071	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k007342);      break;
	9072	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9073	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k007342);      break;
	9074
	9075	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9076	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 007342");            break;
	9077	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9078	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9079	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9080	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9081	}
	9082	}
	9083
	9084
	9085	DEVICE_GET_INFO( k007420 )
	9086	{
	9087	switch (state)
	9088	{
	9089	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9090	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k007420_state);               break;
	9091	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9092
	9093	/* --- the following bits of info are returned as pointers to data or functions --- */
	9094	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k007420);      break;
	9095	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9096	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k007420);      break;
	9097
	9098	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9099	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 007420");            break;
	9100	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9101	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9102	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9103	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9104	}
	9105	}
	9106
	9107
	9108	DEVICE_GET_INFO( k052109 )
	9109	{
	9110	switch (state)
	9111	{
	9112	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9113	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k052109_state);               break;
	9114	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9115
	9116	/* --- the following bits of info are returned as pointers to data or functions --- */
	9117	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k052109);      break;
	9118	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9119	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k052109);      break;
	9120
	9121	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9122	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 052109");            break;
	9123	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9124	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9125	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9126	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9127	}
	9128	}
	9129
	9130	DEVICE_GET_INFO( k051960 )
	9131	{
	9132	switch (state)
	9133	{
	9134	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9135	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k051960_state);               break;
	9136	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9137
	9138	/* --- the following bits of info are returned as pointers to data or functions --- */
	9139	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k051960);      break;
	9140	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9141	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k051960);      break;
	9142
	9143	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9144	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 051960");            break;
	9145	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9146	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9147	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9148	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9149	}
	9150	}
	9151
	9152	DEVICE_GET_INFO( k05324x )
	9153	{
	9154	switch (state)
	9155	{
	9156	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9157	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k05324x_state);               break;
	9158	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9159
	9160	/* --- the following bits of info are returned as pointers to data or functions --- */
	9161	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k05324x);      break;
	9162	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9163	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k05324x);      break;
	9164
	9165	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9166	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 053244 & 053245");            break;
	9167	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9168	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9169	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9170	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9171	}
	9172	}
	9173
	9174	DEVICE_GET_INFO( k053247 )
	9175	{
	9176	switch (state)
	9177	{
	9178	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9179	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k053247_state);               break;
	9180	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9181
	9182	/* --- the following bits of info are returned as pointers to data or functions --- */
	9183	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k053247);      break;
	9184	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9185	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k053247);      break;
	9186
	9187	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9188	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 053246 & 053247");            break;
	9189	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9190	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9191	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9192	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9193	}
	9194	}
	9195
	9196	DEVICE_GET_INFO( k055673 )
	9197	{
	9198	switch (state)
	9199	{
	9200	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9201	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k053247_state);               break;
	9202	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9203
	9204	/* --- the following bits of info are returned as pointers to data or functions --- */
	9205	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k055673);      break;
	9206	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9207	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k053247);      break;
	9208
	9209	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9210	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 055673");            break;
	9211	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9212	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9213	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9214	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9215	}
	9216	}
	9217
	9218	DEVICE_GET_INFO( k051316 )
	9219	{
	9220	switch (state)
	9221	{
	9222	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9223	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k051316_state);               break;
	9224	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9225
	9226	/* --- the following bits of info are returned as pointers to data or functions --- */
	9227	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k051316);      break;
	9228	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9229	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k051316);      break;
	9230
	9231	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9232	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 051316");            break;
	9233	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9234	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9235	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9236	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9237	}
	9238	}
	9239
	9240	DEVICE_GET_INFO( k053936 )
	9241	{
	9242	switch (state)
	9243	{
	9244	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9245	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k053936_state);               break;
	9246	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9247
	9248	/* --- the following bits of info are returned as pointers to data or functions --- */
	9249	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k053936);      break;
	9250	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9251	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k053936);               break;
	9252
	9253	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9254	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 053936");            break;
	9255	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9256	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9257	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9258	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9259	}
	9260	}
	9261
	9262	DEVICE_GET_INFO( k053251 )
	9263	{
	9264	switch (state)
	9265	{
	9266	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9267	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k053251_state);               break;
	9268	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9269
	9270	/* --- the following bits of info are returned as pointers to data or functions --- */
	9271	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k053251);      break;
	9272	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9273	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k053251);      break;
	9274
	9275	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9276	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 053251");            break;
	9277	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9278	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9279	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9280	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9281	}
	9282	}
	9283
	9284	DEVICE_GET_INFO( k054000 )
	9285	{
	9286	switch (state)
	9287	{
	9288	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9289	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k054000_state);               break;
	9290	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9291
	9292	/* --- the following bits of info are returned as pointers to data or functions --- */
	9293	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k054000);      break;
	9294	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9295	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k054000);      break;
	9296
	9297	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9298	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 054000");            break;
	9299	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9300	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9301	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9302	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9303	}
	9304	}
	9305
	9306	DEVICE_GET_INFO( k051733 )
	9307	{
	9308	switch (state)
	9309	{
	9310	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9311	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k051733_state);               break;
	9312	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9313
	9314	/* --- the following bits of info are returned as pointers to data or functions --- */
	9315	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k051733);      break;
	9316	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9317	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k051733);      break;
	9318
	9319	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9320	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 051733");            break;
	9321	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9322	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9323	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9324	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9325	}
	9326	}
	9327
	9328	DEVICE_GET_INFO( k056832 )
	9329	{
	9330	switch (state)
	9331	{
	9332	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9333	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k056832_state);               break;
	9334	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9335
	9336	/* --- the following bits of info are returned as pointers to data or functions --- */
	9337	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k056832);      break;
	9338	case DEVINFO_FCT_STOP:               /* Nothing */                  break;
	9339	case DEVINFO_FCT_RESET:               /* Nothing */                  break;
	9340
	9341	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9342	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 056832");            break;
	9343	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9344	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9345	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9346	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9347	}
	9348	}
	9349
	9350	DEVICE_GET_INFO( k055555 )
	9351	{
	9352	switch (state)
	9353	{
	9354	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9355	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k055555_state);               break;
	9356	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9357
	9358	/* --- the following bits of info are returned as pointers to data or functions --- */
	9359	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k055555);      break;
	9360	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9361	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k055555);      break;
	9362
	9363	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9364	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 055555");            break;
	9365	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9366	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9367	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9368	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9369	}
	9370	}
	9371
	9372	DEVICE_GET_INFO( k054338 )
	9373	{
	9374	switch (state)
	9375	{
	9376	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9377	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k054338_state);               break;
	9378	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9379
	9380	/* --- the following bits of info are returned as pointers to data or functions --- */
	9381	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k054338);      break;
	9382	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9383	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k054338);      break;
	9384
	9385	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9386	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 054338");            break;
	9387	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9388	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9389	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9390	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9391	}
	9392	}
	9393
	9394	DEVICE_GET_INFO( k053250 )
	9395	{
	9396	switch (state)
	9397	{
	9398	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9399	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k053250_state);               break;
	9400	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9401
	9402	/* --- the following bits of info are returned as pointers to data or functions --- */
	9403	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k053250);      break;
	9404	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9405	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k053250);      break;
	9406
	9407	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9408	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 053250");            break;
	9409	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9410	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9411	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9412	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9413	}
	9414	}
	9415
	9416	DEVICE_GET_INFO( k053252 )
	9417	{
	9418	switch (state)
	9419	{
	9420	/* --- the following bits of info are returned as 64-bit signed integers --- */
	9421	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(k053252_state);               break;
	9422	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;               break;
	9423
	9424	/* --- the following bits of info are returned as pointers to data or functions --- */
	9425	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(k053252);      break;
	9426	case DEVINFO_FCT_STOP:               /* Nothing */                           break;
	9427	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(k053252);      break;
	9428
	9429	/* --- the following bits of info are returned as NULL-terminated strings --- */
	9430	case DEVINFO_STR_NAME:               strcpy(info->s, "Konami 053252");            break;
	9431	case DEVINFO_STR_FAMILY:            strcpy(info->s, "Konami Video IC");               break;
	9432	case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0");                     break;
	9433	case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__);                  break;
	9434	case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright MAME Team");         break;
	9435	}
	9436	}

src/mame/video/djmain.c

r6740	r6741
4	4	*/
5	5
6	6	#include "driver.h"
7		#include "video/konamiic.h"
	7	#include "video/konicdev.h"
8	8
9	9	#define NUM_SPRITES   (0x800 / 16)
10	10	#define NUM_LAYERS   2
r6740	r6741
14	14
15	15	static void draw_sprites(running_machine* machine, bitmap_t *bitmap, const rectangle *cliprect)
16	16	{
	17	const device_config *k055555 = devtag_get_device(machine, "k055555");
17	18	int offs, pri_code;
18	19	int sortedlist[NUM_SPRITES];
19	20
20		machine->gfx[0]->color_base = K055555_read_register(K55_PALBASE_SUB2) * 0x400;
	21	machine->gfx[0]->color_base = k055555_read_register(k055555, K55_PALBASE_SUB2) * 0x400;
21	22
22	23	for (offs = 0; offs < NUM_SPRITES; offs++)
23	24	sortedlist[offs] = -1;
r6740	r6741
128	129	}
129	130
130	131
131		static void game_tile_callback(int layer, int *code, int *color, int *flags)
	132	void djmain_tile_callback(running_machine* machine, int layer, int *code, int *color, int *flags)
132	133	{
133	134	}
134	135
135	136	VIDEO_START( djmain )
136	137	{
137		static int scrolld[NUM_LAYERS][4][2] = {
138		{{ 0, 0}, {0, 0}, {0, 0}, {0, 0}},
139		{{ 0, 0}, {0, 0}, {0, 0}, {0, 0}}
140		};
	138	const device_config *k056832 = devtag_get_device(machine, "k056832");
141	139
142		K056832_vh_start(machine, "gfx2", K056832_BPP_4dj, 1, scrolld, game_tile_callback, 1);
143		K055555_vh_start(machine);
144
145		K056832_set_LayerOffset(0, -92, -27);
146		// K056832_set_LayerOffset(1, -87, -27);
147		K056832_set_LayerOffset(1, -88, -27);
	140	k056832_set_layer_offs(k056832, 0, -92, -27);
	141	// k056832_set_layer_offs(k056832, 1, -87, -27);
	142	k056832_set_layer_offs(k056832, 1, -88, -27);
148	143	}
149	144
150	145	VIDEO_UPDATE( djmain )
151	146	{
152		int enables = K055555_read_register(K55_INPUT_ENABLES);
	147	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
	148	const device_config *k055555 = devtag_get_device(screen->machine, "k055555");
	149	int enables = k055555_read_register(k055555, K55_INPUT_ENABLES);
153	150	int pri[NUM_LAYERS + 1];
154	151	int order[NUM_LAYERS + 1];
155	152	int i, j;
156	153
157	154	for (i = 0; i < NUM_LAYERS; i++)
158		pri[i] = K055555_read_register(K55_PRIINP_0 + i * 3);
159		pri[i] = K055555_read_register(K55_PRIINP_10);
	155	pri[i] = k055555_read_register(k055555, K55_PRIINP_0 + i * 3);
	156	pri[i] = k055555_read_register(k055555, K55_PRIINP_10);
160	157
161	158	for (i = 0; i < NUM_LAYERS + 1; i++)
162	159	order[i] = i;
r6740	r6741
185	182	else
186	183	{
187	184	if (enables & (K55_INP_VRAM_A << layer))
188		K056832_tilemap_draw_dj(screen->machine, bitmap, cliprect, layer, 0, 1 << i);
	185	k056832_tilemap_draw_dj(k056832, bitmap, cliprect, layer, 0, 1 << i);
189	186	}
190	187	}
191	188	return 0;

src/mame/video/firetrk.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "firetrk.h"
	8	#include "includes/firetrk.h"
9	9
10	10
11	11	UINT8 *firetrk_alpha_num_ram;

src/mame/video/konicdev.h

r0	r6741
	1	/*************************************************************************
	2
	3	konicdev.h
	4
	5	Implementation of various Konami custom IC used for video
	6
	7	**************************************************************************/
	8
	9	#include "devcb.h"
	10
	11
	12	/***************************************************************************
	13	TYPE DEFINITIONS
	14	***************************************************************************/
	15
	16	typedef void (*k007342_callback)(running_machine *machine, int tmap, int bank, int *code, int *color, int *flags);
	17	typedef void (*k007420_callback)(running_machine *machine, int *code, int *color);
	18	typedef void (*k052109_callback)(running_machine *machine, int layer, int bank, int *code, int *color, int *flags, int *priority);
	19	typedef void (*k051960_callback)(running_machine *machine, int *code, int *color, int *priority, int *shadow);
	20	typedef void (*k05324x_callback)(running_machine *machine, int *code, int *color, int *priority);
	21	typedef void (*k051316_callback)(running_machine *machine, int *code, int *color, int *flags);
	22	typedef void (*k056832_callback)(running_machine *machine, int layer, int *code, int *color, int *flags);
	23
	24
	25	typedef struct _k007342_interface k007342_interface;
	26	struct _k007342_interface
	27	{
	28	int                gfxnum;
	29	k007342_callback   callback;
	30	};
	31
	32	typedef struct _k007420_interface k007420_interface;
	33	struct _k007420_interface
	34	{
	35	int                banklimit;
	36	k007420_callback   callback;
	37	};
	38
	39	typedef struct _k052109_interface k052109_interface;
	40	struct _k052109_interface
	41	{
	42	const char         *gfx_memory_region;
	43	int                gfx_num;
	44	int                plane_order;
	45	int                deinterleave;
	46	k052109_callback   callback;
	47	};
	48
	49	typedef struct _k051960_interface k051960_interface;
	50	struct _k051960_interface
	51	{
	52	const char         *gfx_memory_region;
	53	int                gfx_num;
	54	int                plane_order;
	55	int                deinterleave;
	56	k051960_callback   callback;
	57	};
	58
	59	typedef struct _k05324x_interface k05324x_interface;
	60	struct _k05324x_interface
	61	{
	62	const char         *gfx_memory_region;
	63	int                gfx_num;
	64	int                plane_order;
	65	int                dx, dy;
	66	int                deinterleave;
	67	k05324x_callback   callback;
	68	};
	69
	70	typedef struct _k053247_interface k053247_interface;
	71	struct _k053247_interface
	72	{
	73	const char         *screen;
	74	const char         *gfx_memory_region;
	75	int                gfx_num;
	76	int                plane_order;
	77	int                dx, dy;
	78	int                deinterleave;
	79	k05324x_callback   callback;
	80	};
	81
	82	typedef struct _k051316_interface k051316_interface;
	83	struct _k051316_interface
	84	{
	85	const char         *gfx_memory_region;
	86	int                gfx_num;
	87	int                bpp, pen_is_mask, transparent_pen;
	88	int                wrap, xoffs, yoffs;
	89	k051316_callback   callback;
	90	};
	91
	92	typedef struct _k053936_interface k053936_interface;
	93	struct _k053936_interface
	94	{
	95	int                wrap, xoff, yoff;
	96	};
	97
	98	typedef struct _k056832_interface k056832_interface;
	99	struct _k056832_interface
	100	{
	101	const char         *gfx_memory_region;
	102	int                gfx_num;
	103	int                bpp;
	104	int                big;
	105	int                djmain_hack;
	106	int                deinterleave;
	107	k056832_callback   callback;
	108
	109	const char         *k055555;   // tbyahhoo uses the k056832 together with a k055555
	110	};
	111
	112	typedef struct _k054338_interface k054338_interface;
	113	struct _k054338_interface
	114	{
	115	const char         *screen;
	116	int                alpha_inv;
	117	const char         *k055555;
	118	};
	119
	120	typedef struct _k053250_interface k053250_interface;
	121	struct _k053250_interface
	122	{
	123	const char         *screen;
	124	const char         *gfx_memory_region;
	125	int                xoff, yoff;
	126	};
	127
	128
	129	/***************************************************************************
	130	FUNCTION PROTOTYPES
	131	***************************************************************************/
	132
	133	DEVICE_GET_INFO( k007121 );
	134	DEVICE_GET_INFO( k007342 );
	135	DEVICE_GET_INFO( k007420 );
	136	DEVICE_GET_INFO( k052109 );
	137	DEVICE_GET_INFO( k051960 );
	138	DEVICE_GET_INFO( k05324x );
	139	DEVICE_GET_INFO( k053247 );
	140	DEVICE_GET_INFO( k055673 );
	141	DEVICE_GET_INFO( k051316 );
	142	DEVICE_GET_INFO( k053936 );
	143	DEVICE_GET_INFO( k053251 );
	144	DEVICE_GET_INFO( k054000 );
	145	DEVICE_GET_INFO( k051733 );
	146	DEVICE_GET_INFO( k056832 );
	147	DEVICE_GET_INFO( k055555 );
	148	DEVICE_GET_INFO( k054338 );
	149	DEVICE_GET_INFO( k053250 );
	150	DEVICE_GET_INFO( k053252 );
	151
	152
	153	/***************************************************************************
	154	DEVICE CONFIGURATION MACROS
	155	***************************************************************************/
	156
	157	#define K007121 DEVICE_GET_INFO_NAME( k007121 )
	158
	159	#define MDRV_K007121_ADD(_tag) \
	160	MDRV_DEVICE_ADD(_tag, K007121, 0)
	161
	162	#define K007342 DEVICE_GET_INFO_NAME( k007342 )
	163
	164	#define MDRV_K007342_ADD(_tag, _interface) \
	165	MDRV_DEVICE_ADD(_tag, K007342, 0) \
	166	MDRV_DEVICE_CONFIG(_interface)
	167
	168	#define K007420 DEVICE_GET_INFO_NAME( k007420 )
	169
	170	#define MDRV_K007420_ADD(_tag, _interface) \
	171	MDRV_DEVICE_ADD(_tag, K007420, 0) \
	172	MDRV_DEVICE_CONFIG(_interface)
	173
	174	#define K052109 DEVICE_GET_INFO_NAME( k052109 )
	175
	176	#define MDRV_K052109_ADD(_tag, _interface) \
	177	MDRV_DEVICE_ADD(_tag, K052109, 0) \
	178	MDRV_DEVICE_CONFIG(_interface)
	179
	180	#define K051960 DEVICE_GET_INFO_NAME( k051960 )
	181
	182	#define MDRV_K051960_ADD(_tag, _interface) \
	183	MDRV_DEVICE_ADD(_tag, K051960, 0) \
	184	MDRV_DEVICE_CONFIG(_interface)
	185
	186	#define K053244 DEVICE_GET_INFO_NAME( k05324x )
	187	#define K053245 DEVICE_GET_INFO_NAME( k05324x )
	188
	189	#define MDRV_K053244_ADD(_tag, _interface) \
	190	MDRV_DEVICE_ADD(_tag, K053244, 0) \
	191	MDRV_DEVICE_CONFIG(_interface)
	192
	193	#define MDRV_K053245_ADD(_tag, _interface) \
	194	MDRV_DEVICE_ADD(_tag, K053245, 0) \
	195	MDRV_DEVICE_CONFIG(_interface)
	196
	197	#define K053246 DEVICE_GET_INFO_NAME( k053247 )
	198	#define K053247 DEVICE_GET_INFO_NAME( k053247 )
	199
	200	#define MDRV_K053246_ADD(_tag, _interface) \
	201	MDRV_DEVICE_ADD(_tag, K053246, 0) \
	202	MDRV_DEVICE_CONFIG(_interface)
	203
	204	#define MDRV_K053247_ADD(_tag, _interface) \
	205	MDRV_DEVICE_ADD(_tag, K053247, 0) \
	206	MDRV_DEVICE_CONFIG(_interface)
	207
	208	#define K055673 DEVICE_GET_INFO_NAME( k055673 )
	209
	210	#define MDRV_K055673_ADD(_tag, _interface) \
	211	MDRV_DEVICE_ADD(_tag, K055673, 0) \
	212	MDRV_DEVICE_CONFIG(_interface)
	213
	214	#define K051316 DEVICE_GET_INFO_NAME( k051316 )
	215
	216	#define MDRV_K051316_ADD(_tag, _interface) \
	217	MDRV_DEVICE_ADD(_tag, K051316, 0) \
	218	MDRV_DEVICE_CONFIG(_interface)
	219
	220	#define K053936 DEVICE_GET_INFO_NAME( k053936 )
	221
	222	#define MDRV_K053936_ADD(_tag, _interface) \
	223	MDRV_DEVICE_ADD(_tag, K053936, 0) \
	224	MDRV_DEVICE_CONFIG(_interface)
	225
	226	#define K053251 DEVICE_GET_INFO_NAME( k053251 )
	227
	228	#define MDRV_K053251_ADD(_tag) \
	229	MDRV_DEVICE_ADD(_tag, K053251, 0)
	230
	231	#define K054000 DEVICE_GET_INFO_NAME( k054000 )
	232
	233	#define MDRV_K054000_ADD(_tag) \
	234	MDRV_DEVICE_ADD(_tag, K054000, 0)
	235
	236	#define K051733 DEVICE_GET_INFO_NAME( k051733 )
	237
	238	#define MDRV_K051733_ADD(_tag) \
	239	MDRV_DEVICE_ADD(_tag, K051733, 0)
	240
	241	#define K056832 DEVICE_GET_INFO_NAME( k056832 )
	242
	243	#define MDRV_K056832_ADD(_tag, _interface) \
	244	MDRV_DEVICE_ADD(_tag, K056832, 0) \
	245	MDRV_DEVICE_CONFIG(_interface)
	246
	247	#define K055555 DEVICE_GET_INFO_NAME( k055555 )
	248
	249	#define MDRV_K055555_ADD(_tag) \
	250	MDRV_DEVICE_ADD(_tag, K055555, 0)
	251
	252	#define K054338 DEVICE_GET_INFO_NAME( k054338 )
	253
	254	#define MDRV_K054338_ADD(_tag, _interface) \
	255	MDRV_DEVICE_ADD(_tag, K054338, 0) \
	256	MDRV_DEVICE_CONFIG(_interface)
	257
	258	#define K053250 DEVICE_GET_INFO_NAME( k053250 )
	259
	260	#define MDRV_K053250_ADD(_tag, _interface) \
	261	MDRV_DEVICE_ADD(_tag, K053250, 0) \
	262	MDRV_DEVICE_CONFIG(_interface)
	263
	264	#define K053252 DEVICE_GET_INFO_NAME( k053252 )
	265
	266	#define MDRV_K053252_ADD(_tag) \
	267	MDRV_DEVICE_ADD(_tag, K053252, 0)
	268
	269
	270	/***************************************************************************
	271	HELPERS FOR DRIVERS
	272	***************************************************************************/
	273
	274	enum
	275	{
	276	KONAMI_ROM_DEINTERLEAVE_NONE = 0,
	277	KONAMI_ROM_DEINTERLEAVE_2,
	278	KONAMI_ROM_DEINTERLEAVE_2_HALF,
	279	KONAMI_ROM_DEINTERLEAVE_4,
	280	KONAMI_ROM_SHUFFLE8
	281	};
	282
	283	/* helper function to join two 16-bit ROMs and form a 32-bit data stream */
	284	void konamid_rom_deinterleave_2(running_machine *machine, const char *mem_region);
	285	void konamid_rom_deinterleave_2_half(running_machine *machine, const char *mem_region);
	286	/* helper function to join four 16-bit ROMs and form a 64-bit data stream */
	287	void konamid_rom_deinterleave_4(running_machine *machine, const char *mem_region);
	288
	289	/***************************************************************************
	290	DEVICE I/O FUNCTIONS
	291	***************************************************************************/
	292
	293	/**  Konami 007121  **/
	294	WRITE8_DEVICE_HANDLER( k007121_ctrlram_w );   // FIXME: this is probably unused: writes to ctrlram should use ctrl_w below!
	295	READ8_DEVICE_HANDLER( k007121_ctrlram_r );
	296	WRITE8_DEVICE_HANDLER( k007121_ctrl_w );
	297
	298	/* shall we move source in the interface? */
	299	/* also notice that now we directly pass *gfx[chip] instead of **gfx !! */
	300	void k007121_sprites_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, gfx_element *gfx, colortable_t *ctable,
	301	const UINT8 *source, int base_color, int global_x_offset, int bank_base, UINT32 pri_mask );
	302
	303
	304	/**  Konami 007342  **/
	305	READ8_DEVICE_HANDLER( k007342_r );
	306	WRITE8_DEVICE_HANDLER( k007342_w );
	307	READ8_DEVICE_HANDLER( k007342_scroll_r );
	308	WRITE8_DEVICE_HANDLER( k007342_scroll_w );
	309	WRITE8_DEVICE_HANDLER( k007342_vreg_w );
	310
	311	void k007342_tilemap_update(const device_config *device);
	312	void k007342_tilemap_set_enable(const device_config *device, int layer, int enable);
	313	void k007342_tilemap_draw(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int num, int flags, UINT32 priority);
	314	int k007342_is_int_enabled(const device_config *device);
	315
	316
	317	/**  Konami 007420  **/
	318	#define K007420_SPRITERAM_SIZE 0x200
	319
	320	READ8_DEVICE_HANDLER( k007420_r );
	321	WRITE8_DEVICE_HANDLER( k007420_w );
	322	void k007420_sprites_draw(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, gfx_element *gfx);
	323
	324
	325	/**  Konami 052109  **/
	326	/*
	327	You don't have to decode the graphics: the vh_start() routines will do that
	328	for you, using the plane order passed.
	329	Of course the ROM data must be in the correct order. This is a way to ensure
	330	that the ROM test will pass.
	331	The konami_rom_deinterleave() function above will do the reorganization for
	332	you in most cases (but see tmnt.c for additional bit rotations or byte
	333	permutations which may be required).
	334	*/
	335	#define NORMAL_PLANE_ORDER 0x0123
	336	#define REVERSE_PLANE_ORDER 0x3210
	337	#define GRADIUS3_PLANE_ORDER 0x1111
	338
	339
	340	/*
	341	The callback is passed:
	342	- layer number (0 = FIX, 1 = A, 2 = B)
	343	- bank (range 0-3, output of the pins CAB1 and CAB2)
	344	- code (range 00-FF, output of the pins VC3-VC10)
	345	NOTE: code is in the range 0000-FFFF for X-Men, which uses extra RAM
	346	- color (range 00-FF, output of the pins COL0-COL7)
	347	The callback must put:
	348	- in code the resulting tile number
	349	- in color the resulting color index
	350	- if necessary, put flags and/or priority for the TileMap code in the tile_info
	351	structure (e.g. TILE_FLIPX). Note that TILE_FLIPY is handled internally by the
	352	chip so it must not be set by the callback.
	353	*/
	354
	355	READ8_DEVICE_HANDLER( k052109_r );
	356	WRITE8_DEVICE_HANDLER( k052109_w );
	357	READ16_DEVICE_HANDLER( k052109_word_r );
	358	WRITE16_DEVICE_HANDLER( k052109_word_w );
	359	READ16_DEVICE_HANDLER( k052109_lsb_r );
	360	WRITE16_DEVICE_HANDLER( k052109_lsb_w );
	361
	362	void k052109_set_rmrd_line(const device_config *device, int state);
	363	int k052109_get_rmrd_line(const device_config *device);
	364	void k052109_tilemap_update(const device_config *device);
	365	int k052109_is_irq_enabled(const device_config *device);
	366	void k052109_set_layer_offsets(const device_config *device, int layer, int dx, int dy);
	367	void k052109_tilemap_mark_dirty(const device_config *device, int tmap_num);
	368	void k052109_tilemap_draw(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int tmap_num, UINT32 flags, UINT8 priority);
	369	void k052109_postload_tileflip_reset( const device_config *device );   // this has to be added to POSTLOAD functions in each driver
	370
	371
	372	/**  Konami 051960 / 051937  **/
	373	/*
	374	The callback is passed:
	375	- code (range 00-1FFF, output of the pins CA5-CA17)
	376	- color (range 00-FF, output of the pins OC0-OC7). Note that most of the
	377	time COL7 seems to be "shadow", but not always (e.g. Aliens).
	378	The callback must put:
	379	- in code the resulting sprite number
	380	- in color the resulting color index
	381	- if necessary, in priority the priority of the sprite wrt tilemaps
	382	- if necessary, alter shadow to indicate whether the sprite has shadows enabled.
	383	shadow is preloaded with color & 0x80 so it doesn't need to be changed unless
	384	the game has special treatment (Aliens)
	385	*/
	386
	387	READ8_DEVICE_HANDLER( k051960_r );
	388	WRITE8_DEVICE_HANDLER( k051960_w );
	389	READ16_DEVICE_HANDLER( k051960_word_r );
	390	WRITE16_DEVICE_HANDLER( k051960_word_w );
	391
	392	READ8_DEVICE_HANDLER( k051937_r );
	393	WRITE8_DEVICE_HANDLER( k051937_w );
	394	READ16_DEVICE_HANDLER( k051937_word_r );
	395	WRITE16_DEVICE_HANDLER( k051937_word_w );
	396
	397	void k051960_sprites_draw(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int min_priority, int max_priority);
	398	int k051960_is_irq_enabled(const device_config *device);
	399	int k051960_is_nmi_enabled(const device_config *device);
	400	void k051960_set_sprite_offsets(const device_config *device, int dx, int dy);
	401
	402	#if 0 // to be moved in the specific drivers!
	403	/* special handling for the chips sharing address space */
	404	READ8_HANDLER( k052109_051960_r );
	405	WRITE8_HANDLER( k052109_051960_w );
	406	#endif
	407
	408
	409	/**  Konami 053244 / 053245  **/
	410	READ16_DEVICE_HANDLER( k053245_word_r );
	411	WRITE16_DEVICE_HANDLER( k053245_word_w );
	412	READ8_DEVICE_HANDLER( k053245_r );
	413	WRITE8_DEVICE_HANDLER( k053245_w );
	414	READ8_DEVICE_HANDLER( k053244_r );
	415	WRITE8_DEVICE_HANDLER( k053244_w );
	416	READ16_DEVICE_HANDLER( k053244_lsb_r );
	417	WRITE16_DEVICE_HANDLER( k053244_lsb_w );
	418	READ16_DEVICE_HANDLER( k053244_word_r );
	419	WRITE16_DEVICE_HANDLER( k053244_word_w );
	420	void k053244_bankselect(const device_config *device, int bank);   /* used by TMNT2, Asterix and Premier Soccer for ROM testing */
	421	void k053245_sprites_draw(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect);
	422	void k053245_sprites_draw_lethal(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect); /* for lethal enforcers */
	423	void k053245_clear_buffer(const device_config *device);
	424	void k053245_set_sprite_offs(const device_config *device, int offsx, int offsy);
	425
	426
	427
	428	/**  Konami 053246 / 053247 / 055673  **/
	429	#define K055673_LAYOUT_GX  0
	430	#define K055673_LAYOUT_RNG 1
	431	#define K055673_LAYOUT_LE2 2
	432	#define K055673_LAYOUT_GX6 3
	433
	434	READ16_DEVICE_HANDLER( k055673_rom_word_r );
	435	READ16_DEVICE_HANDLER( k055673_GX6bpp_rom_word_r );
	436
	437	/*
	438	Callback procedures for non-standard shadows:
	439
	440	1) translate shadow code to the correct 2-bit form (0=off, 1-3=style)
	441	2) shift shadow code left by K053247_SHDSHIFT and add the K053247_CUSTOMSHADOW flag
	442	3) combine the result with sprite color
	443	*/
	444	#define K053247_CUSTOMSHADOW   0x20000000
	445	#define K053247_SHDSHIFT      20
	446
	447	READ8_DEVICE_HANDLER( k053247_r );
	448	WRITE8_DEVICE_HANDLER( k053247_w );
	449	READ16_DEVICE_HANDLER( k053247_word_r );
	450	WRITE16_DEVICE_HANDLER( k053247_word_w );
	451	READ32_DEVICE_HANDLER( k053247_long_r );
	452	WRITE32_DEVICE_HANDLER( k053247_long_w );
	453	WRITE16_DEVICE_HANDLER( k053247_reg_word_w ); // "OBJSET2" registers
	454	WRITE32_DEVICE_HANDLER( k053247_reg_long_w );
	455
	456	void k053247_sprites_draw(const device_config *device, bitmap_t *bitmap,const rectangle *cliprect);
	457	int k053247_read_register(const device_config *device, int regnum);
	458	void k053247_set_sprite_offs(const device_config *device, int offsx, int offsy);
	459	void k053247_wraparound_enable(const device_config *device, int status);
	460	void k05324x_set_z_rejection(const device_config *device, int zcode); // common to k053244/5
	461	void k053247_set_z_rejection(const device_config *device, int zcode); // common to k053246/7
	462	void k053247_get_ram(const device_config *device, UINT16 **ram);
	463	int k053247_get_dx(const device_config *device);
	464	int k053247_get_dy(const device_config *device);
	465
	466	READ8_DEVICE_HANDLER( k053246_r );
	467	WRITE8_DEVICE_HANDLER( k053246_w );
	468	READ16_DEVICE_HANDLER( k053246_word_r );
	469	WRITE16_DEVICE_HANDLER( k053246_word_w );
	470	READ32_DEVICE_HANDLER( k053246_long_r );
	471	WRITE32_DEVICE_HANDLER( k053246_long_w );
	472
	473	void k053246_set_objcha_line(const device_config *device, int state);
	474	int k053246_is_irq_enabled(const device_config *device);
	475	int k053246_read_register(const device_config *device, int regnum);
	476
	477	/**  Konami 051316  **/
	478	/*
	479	The callback is passed:
	480	- code (range 00-FF, contents of the first tilemap RAM byte)
	481	- color (range 00-FF, contents of the first tilemap RAM byte). Note that bit 6
	482	seems to be hardcoded as flip X.
	483	The callback must put:
	484	- in code the resulting tile number
	485	- in color the resulting color index
	486	- if necessary, put flags for the TileMap code in the tile_info
	487	structure (e.g. TILE_FLIPX)
	488	*/
	489
	490	READ8_DEVICE_HANDLER( k051316_r );
	491	WRITE8_DEVICE_HANDLER( k051316_w );
	492	READ8_DEVICE_HANDLER( k051316_rom_r );
	493	WRITE8_DEVICE_HANDLER( k051316_ctrl_w );
	494	void k051316_zoom_draw(const device_config *device, bitmap_t *bitmap,const rectangle *cliprect,int flags,UINT32 priority);
	495	void k051316_wraparound_enable(const device_config *device, int status);
	496
	497
	498	/**  Konami 053936  **/
	499	WRITE16_DEVICE_HANDLER( k053936_ctrl_w );
	500	READ16_DEVICE_HANDLER( k053936_ctrl_r );   // FIXME: this is probably unused... to be checked!
	501	WRITE16_DEVICE_HANDLER( k053936_linectrl_w );
	502	READ16_DEVICE_HANDLER( k053936_linectrl_r );
	503	void k053936_zoom_draw(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, tilemap *tmap, int flags, UINT32 priority, int glfgreat_hack);
	504	void k053936_wraparound_enable(const device_config *device, int status);   // shall we merge this into the configuration intf?
	505	void k053936_set_offset(const device_config *device, int xoffs, int yoffs);   // shall we merge this into the configuration intf?
	506
	507
	508	/**  Konami 053251 **/
	509	/*
	510	Note: k053251_w() automatically does a tilemap_mark_all_tiles_dirty(ALL_TILEMAPS)
	511	when some palette index changes. If ALL_TILEMAPS is too expensive, use
	512	k053251_set_tilemaps() to indicate which tilemap is associated with each index.
	513	*/
	514	WRITE8_DEVICE_HANDLER( k053251_w );
	515	WRITE16_DEVICE_HANDLER( k053251_lsb_w );
	516	WRITE16_DEVICE_HANDLER( k053251_msb_w );
	517	int k053251_get_priority(const device_config *device, int ci);
	518	int k053251_get_palette_index(const device_config *device, int ci);
	519	int k053251_get_tmap_dirty(const device_config *device, int tmap_num);
	520	void k053251_set_tmap_dirty(const device_config *device, int tmap_num, int data);
	521	void k053251_postload_reset_indexes(const device_config *device);
	522
	523	enum
	524	{
	525	K053251_CI0 = 0,
	526	K053251_CI1,
	527	K053251_CI2,
	528	K053251_CI3,
	529	K053251_CI4
	530	};
	531
	532	/**  Konami 054000 **/
	533	WRITE8_DEVICE_HANDLER( k054000_w );
	534	READ8_DEVICE_HANDLER( k054000_r );
	535	WRITE16_DEVICE_HANDLER( k054000_lsb_w );
	536	READ16_DEVICE_HANDLER( k054000_lsb_r );
	537
	538
	539	/**  Konami 051733 **/
	540	WRITE8_DEVICE_HANDLER( k051733_w );
	541	READ8_DEVICE_HANDLER( k051733_r );
	542
	543
	544	/**  Konami 056832 **/
	545	void k056832_SetExtLinescroll(const device_config *device);   /* Lethal Enforcers */
	546
	547	#define K056832_DRAW_FLAG_FORCE_XYSCROLL      0x00800000
	548
	549	READ16_DEVICE_HANDLER( k056832_ram_word_r );
	550	WRITE16_DEVICE_HANDLER( k056832_ram_word_w );
	551	READ16_DEVICE_HANDLER( k056832_ram_half_word_r );
	552	WRITE16_DEVICE_HANDLER( k056832_ram_half_word_w );
	553	READ16_DEVICE_HANDLER( k056832_5bpp_rom_word_r );
	554	READ32_DEVICE_HANDLER( k056832_5bpp_rom_long_r );
	555	READ32_DEVICE_HANDLER( k056832_6bpp_rom_long_r );
	556	READ16_DEVICE_HANDLER( k056832_rom_word_r );
	557	READ16_DEVICE_HANDLER( k056832_mw_rom_word_r );
	558	READ16_DEVICE_HANDLER( k056832_bishi_rom_word_r );
	559	READ16_DEVICE_HANDLER( k056832_old_rom_word_r );
	560	READ16_DEVICE_HANDLER( k056832_rom_word_8000_r );
	561	WRITE16_DEVICE_HANDLER( k056832_word_w ); // "VRAM" registers
	562	WRITE16_DEVICE_HANDLER( k056832_b_word_w );
	563	READ8_DEVICE_HANDLER( k056832_ram_code_lo_r );
	564	READ8_DEVICE_HANDLER( k056832_ram_code_hi_r );
	565	READ8_DEVICE_HANDLER( k056832_ram_attr_lo_r );
	566	READ8_DEVICE_HANDLER( k056832_ram_attr_hi_r );
	567	WRITE8_DEVICE_HANDLER( k056832_ram_code_lo_w );
	568	WRITE8_DEVICE_HANDLER( k056832_ram_code_hi_w );
	569	WRITE8_DEVICE_HANDLER( k056832_ram_attr_lo_w );
	570	WRITE8_DEVICE_HANDLER( k056832_ram_attr_hi_w );
	571	WRITE8_DEVICE_HANDLER( k056832_w );
	572	WRITE8_DEVICE_HANDLER( k056832_b_w );
	573	void k056832_mark_plane_dirty(const device_config *device, int num);
	574	void k056832_mark_all_tmaps_dirty(const device_config *device);
	575	void k056832_tilemap_draw(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int num, UINT32 flags, UINT32 priority);
	576	void k056832_tilemap_draw_dj(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int layer, UINT32 flags, UINT32 priority);
	577	void k056832_set_layer_association(const device_config *device, int status);
	578	int  k056832_get_layer_association(const device_config *device);
	579	void k056832_set_layer_offs(const device_config *device, int layer, int offsx, int offsy);
	580	void k056832_set_lsram_page(const device_config *device, int logical_page, int physical_page, int physical_offset);
	581	void k056832_linemap_enable(const device_config *device, int enable);
	582	int  k056832_is_irq_enabled(const device_config *device, int irqline);
	583	void k056832_read_avac(const device_config *device, int *mode, int *data);
	584	int  k056832_read_register(const device_config *device, int regnum);
	585	int k056832_get_current_rambank(const device_config *device);
	586	int k056832_get_lookup(const device_config *device, int bits);   /* Asterix */
	587	void k056832_set_tile_bank(const device_config *device, int bank);   /* Asterix */
	588
	589	READ32_DEVICE_HANDLER( k056832_ram_long_r );
	590	READ32_DEVICE_HANDLER( k056832_rom_long_r );
	591	WRITE32_DEVICE_HANDLER( k056832_ram_long_w );
	592	WRITE32_DEVICE_HANDLER( k056832_long_w );
	593	WRITE32_DEVICE_HANDLER( k056832_b_long_w );
	594
	595	/* bit depths for the 56832 */
	596	#define K056832_BPP_4   0
	597	#define K056832_BPP_5   1
	598	#define K056832_BPP_6   2
	599	#define K056832_BPP_8   3
	600	#define K056832_BPP_4dj   4
	601	#define K056832_BPP_8LE   5
	602
	603	/**  Konami 055555  **/
	604	void k055555_write_reg(const device_config *device, UINT8 regnum, UINT8 regdat);
	605	WRITE16_DEVICE_HANDLER( k055555_word_w );
	606	WRITE32_DEVICE_HANDLER( k055555_long_w );
	607	int k055555_read_register(const device_config *device, int regnum);
	608	int k055555_get_palette_index(const device_config *device, int idx);
	609
	610
	611	/* K055555 registers */
	612	/* priority inputs */
	613	#define K55_PALBASE_BG        0   // background palette
	614	#define K55_CONTROL           1   // control register
	615	#define K55_COLSEL_0          2   // layer A, B color depth
	616	#define K55_COLSEL_1          3   // layer C, D color depth
	617	#define K55_COLSEL_2          4   // object, S1 color depth
	618	#define K55_COLSEL_3          5   // S2, S3 color depth
	619
	620	#define K55_PRIINP_0          7   // layer A pri 0
	621	#define K55_PRIINP_1          8   // layer A pri 1
	622	#define K55_PRIINP_2          9   // layer A "COLPRI"
	623	#define K55_PRIINP_3          10   // layer B pri 0
	624	#define K55_PRIINP_4          11   // layer B pri 1
	625	#define K55_PRIINP_5          12   // layer B "COLPRI"
	626	#define K55_PRIINP_6          13   // layer C pri
	627	#define K55_PRIINP_7          14   // layer D pri
	628	#define K55_PRIINP_8          15   // OBJ pri
	629	#define K55_PRIINP_9          16   // sub 1 (GP:PSAC) pri
	630	#define K55_PRIINP_10         17   // sub 2 (GX:PSAC) pri
	631	#define K55_PRIINP_11         18   // sub 3 pri
	632
	633	#define K55_OINPRI_ON         19   // object priority bits selector
	634
	635	#define K55_PALBASE_A         23   // layer A palette
	636	#define K55_PALBASE_B         24   // layer B palette
	637	#define K55_PALBASE_C         25   // layer C palette
	638	#define K55_PALBASE_D         26   // layer D palette
	639	#define K55_PALBASE_OBJ       27   // OBJ palette
	640	#define K55_PALBASE_SUB1      28   // SUB1 palette
	641	#define K55_PALBASE_SUB2      29   // SUB2 palette
	642	#define K55_PALBASE_SUB3      30   // SUB3 palette
	643
	644	#define K55_BLEND_ENABLES     33   // blend enables for tilemaps
	645	#define K55_VINMIX_ON         34   // additional blend enables for tilemaps
	646	#define K55_OSBLEND_ENABLES   35   // obj/sub blend enables
	647	#define K55_OSBLEND_ON        36   // not sure, related to obj/sub blend
	648
	649	#define K55_SHAD1_PRI         37   // shadow/highlight 1 priority
	650	#define K55_SHAD2_PRI         38   // shadow/highlight 2 priority
	651	#define K55_SHAD3_PRI         39   // shadow/highlight 3 priority
	652	#define K55_SHD_ON            40   // shadow/highlight
	653	#define K55_SHD_PRI_SEL       41   // shadow/highlight
	654
	655	#define K55_VBRI              42   // VRAM layer brightness enable
	656	#define K55_OSBRI             43   // obj/sub brightness enable, part 1
	657	#define K55_OSBRI_ON          44   // obj/sub brightness enable, part 2
	658	#define K55_INPUT_ENABLES     45   // input enables
	659
	660	/* bit masks for the control register */
	661	#define K55_CTL_GRADDIR       0x01   // 0=vertical, 1=horizontal
	662	#define K55_CTL_GRADENABLE    0x02   // 0=BG is base color only, 1=gradient
	663	#define K55_CTL_FLIPPRI       0x04   // 0=standard Konami priority, 1=reverse
	664	#define K55_CTL_SDSEL         0x08   // 0=normal shadow timing, 1=(not used by GX)
	665
	666	/* bit masks for the input enables */
	667	#define K55_INP_VRAM_A        0x01
	668	#define K55_INP_VRAM_B        0x02
	669	#define K55_INP_VRAM_C        0x04
	670	#define K55_INP_VRAM_D        0x08
	671	#define K55_INP_OBJ           0x10
	672	#define K55_INP_SUB1          0x20
	673	#define K55_INP_SUB2          0x40
	674	#define K55_INP_SUB3          0x80
	675
	676
	677	/**  Konami 054338  **/
	678	/* mixer/alpha blender */
	679
	680	WRITE16_DEVICE_HANDLER( k054338_word_w ); // "CLCT" registers
	681	WRITE32_DEVICE_HANDLER( k054338_long_w );
	682	int k054338_register_r(const device_config *device, int reg);
	683	void k054338_update_all_shadows(const device_config *device, int rushingheroes_hack);         // called at the beginning of VIDEO_UPDATE()
	684	void k054338_fill_solid_bg(const device_config *device, bitmap_t *bitmap);            // solid backcolor fill
	685	void k054338_fill_backcolor(const device_config *device, bitmap_t *bitmap, int mode);   // unified fill, 0=solid, 1=gradient (by using a k055555)
	686	int  k054338_set_alpha_level(const device_config *device, int pblend);                     // blend style 0-2
	687	void k054338_invert_alpha(const device_config *device, int invert);                        // 0=0x00(invis)-0x1f(solid), 1=0x1f(invis)-0x00(solod)
	688	//void K054338_export_config(const device_config *device, int **shdRGB);
	689
	690	#define K338_REG_BGC_R      0
	691	#define K338_REG_BGC_GB      1
	692	#define K338_REG_SHAD1R      2
	693	#define K338_REG_BRI3      11
	694	#define K338_REG_PBLEND      13
	695	#define K338_REG_CONTROL   15
	696
	697	#define K338_CTL_KILL      0x01   /* 0 = no video output, 1 = enable */
	698	#define K338_CTL_MIXPRI      0x02
	699	#define K338_CTL_SHDPRI      0x04
	700	#define K338_CTL_BRTPRI      0x08
	701	#define K338_CTL_WAILSL      0x10
	702	#define K338_CTL_CLIPSL      0x20
	703
	704
	705	/**  Konami 053250  **/
	706	WRITE16_DEVICE_HANDLER( k053250_w );
	707	READ16_DEVICE_HANDLER( k053250_r );
	708	WRITE16_DEVICE_HANDLER( k053250_ram_w );
	709	READ16_DEVICE_HANDLER( k053250_ram_r );
	710	READ16_DEVICE_HANDLER( k053250_rom_r );
	711
	712	// K053250_draw() control flags
	713	#define K053250_WRAP500      0x01
	714	#define K053250_OVERDRIVE   0x02
	715
	716	void k053250_draw(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int colorbase, int flags, int pri);
	717	void k053250_dma(const device_config *device, int limiter);
	718
	719
	720	/**  Konami 053252  **/
	721	/* CRT and interrupt control unit */
	722	READ16_DEVICE_HANDLER( k053252_word_r );   // CCU registers
	723	WRITE16_DEVICE_HANDLER( k053252_word_w );
	724	WRITE32_DEVICE_HANDLER( k053252_long_w );
	725
	726
	727	// debug handlers
	728	READ16_DEVICE_HANDLER( k056832_word_r );        // VACSET
	729	READ16_DEVICE_HANDLER( k056832_b_word_r );      // VSCCS  (board dependent)
	730	READ16_DEVICE_HANDLER( k053246_reg_word_r );    // OBJSET1
	731	READ16_DEVICE_HANDLER( k053247_reg_word_r );    // OBJSET2
	732	READ16_DEVICE_HANDLER( k053251_lsb_r );         // PCU1
	733	READ16_DEVICE_HANDLER( k053251_msb_r );         // PCU1
	734	READ16_DEVICE_HANDLER( k055555_word_r );        // PCU2
	735	READ16_DEVICE_HANDLER( k054338_word_r );        // CLTC
	736
	737	READ32_DEVICE_HANDLER( k056832_long_r );        // VACSET
	738	READ32_DEVICE_HANDLER( k053247_reg_long_r );    // OBJSET2
	739	READ32_DEVICE_HANDLER( k055555_long_r );        // PCU2
	740
	741	READ16_DEVICE_HANDLER( k053244_reg_word_r );    // OBJSET0

src/mame/video/neogeo.c

r6740	r6741
5	5	****************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "neogeo.h"
	8	#include "includes/neogeo.h"
9	9	#include "video/resnet.h"
10	10
11
12	11	#define NUM_PENS   (0x1000)
13	12
14	13	#define VERBOSE    (0)
15	14
16		static UINT8 *sprite_gfx;
17		static UINT32 sprite_gfx_address_mask;
18		static UINT16 *neogeo_videoram;
19		static UINT16 *palettes[2]; /* 0x100*16 2 byte palette entries */
20		static pen_t *pens;
21		static UINT8 palette_bank;
22		static UINT8 screen_dark;
23		static UINT16 videoram_read_buffer;
24		static UINT16 videoram_modulo;
25		static UINT16 videoram_offset;
26
27		static UINT8 fixed_layer_source;
28		int neogeo_fixed_layer_bank_type;      /* no need to state save */
29
30		static UINT8 auto_animation_speed;
31		static UINT8 auto_animation_disabled;
32		static UINT8 auto_animation_counter;
33		static UINT8 auto_animation_frame_counter;
34		static emu_timer *auto_animation_timer;
35
36		static emu_timer *sprite_line_timer;
37
38		static const UINT8 *region_zoomy;
39
40
41	15	/*************************************
42	16	*
43	17	*  Video RAM access
44	18	*
45	19	*************************************/
46	20
47		static void set_videoram_offset(UINT16 data)
	21	static void set_videoram_offset( running_machine *machine, UINT16 data )
48	22	{
49		videoram_offset = data;
	23	neogeo_state *state = (neogeo_state *)machine->driver_data;
	24	state->videoram_offset = data;
50	25
51	26	/* the read happens right away */
52		videoram_read_buffer = neogeo_videoram[videoram_offset];
	27	state->videoram_read_buffer = state->videoram[state->videoram_offset];
53	28	}
54	29
55	30
56		static UINT16 get_videoram_data(void)
	31	static UINT16 get_videoram_data( running_machine *machine )
57	32	{
58		return videoram_read_buffer;
	33	neogeo_state *state = (neogeo_state *)machine->driver_data;
	34	return state->videoram_read_buffer;
59	35	}
60	36
61	37
62		static void set_videoram_data(UINT16 data)
	38	static void set_videoram_data( running_machine *machine, UINT16 data)
63	39	{
64		neogeo_videoram[videoram_offset] = data;
	40	neogeo_state *state = (neogeo_state *)machine->driver_data;
	41	state->videoram[state->videoram_offset] = data;
65	42
66	43	/* auto increment/decrement the current offset - A15 is NOT effected */
67		videoram_offset = (videoram_offset & 0x8000) | ((videoram_offset + videoram_modulo) & 0x7fff);
	44	state->videoram_offset = (state->videoram_offset & 0x8000) | ((state->videoram_offset + state->videoram_modulo) & 0x7fff);
68	45
69	46	/* read next value right away */
70		videoram_read_buffer = neogeo_videoram[videoram_offset];
	47	state->videoram_read_buffer = state->videoram[state->videoram_offset];
71	48	}
72	49
73	50
74		static void set_videoram_modulo(UINT16 data)
	51	static void set_videoram_modulo( running_machine *machine, UINT16 data)
75	52	{
76		videoram_modulo = data;
	53	neogeo_state *state = (neogeo_state *)machine->driver_data;
	54	state->videoram_modulo = data;
77	55	}
78	56
79	57
80		static UINT16 get_videoram_modulo(void)
	58	static UINT16 get_videoram_modulo( running_machine *machine )
81	59	{
82		return videoram_modulo;
	60	neogeo_state *state = (neogeo_state *)machine->driver_data;
	61	return state->videoram_modulo;
83	62	}
84	63
85	64
r6740	r6741
90	69	*
91	70	*************************************/
92	71
93		static double rgb_weights_normal[5];
94		static double rgb_weights_normal_bit15[5];
95		static double rgb_weights_dark[5];
96		static double rgb_weights_dark_bit15[5];
97
98		static void compute_rgb_weights(void)
	72	static void compute_rgb_weights( running_machine *machine )
99	73	{
	74	neogeo_state *state = (neogeo_state *)machine->driver_data;
100	75	static const int resistances[] = { 220, 470, 1000, 2200, 3900 };
101	76
102	77	/* compute four sets of weights - with or without the pulldowns -
103	78	ensuring that we use the same scaler for all */
104	79
105	80	double scaler = compute_resistor_weights(0, 0xff, -1,
106		5, resistances, rgb_weights_normal, 0, 0,
	81	5, resistances, state->rgb_weights_normal, 0, 0,
107	82	0, 0, 0, 0, 0,
108	83	0, 0, 0, 0, 0);
109	84
110	85	compute_resistor_weights(0, 0xff, scaler,
111		5, resistances, rgb_weights_normal_bit15, 8200, 0,
	86	5, resistances, state->rgb_weights_normal_bit15, 8200, 0,
112	87	0, 0, 0, 0, 0,
113	88	0, 0, 0, 0, 0);
114	89
115	90	compute_resistor_weights(0, 0xff, scaler,
116		5, resistances, rgb_weights_dark, 150, 0,
	91	5, resistances, state->rgb_weights_dark, 150, 0,
117	92	0, 0, 0, 0, 0,
118	93	0, 0, 0, 0, 0);
119	94
120	95	compute_resistor_weights(0, 0xff, scaler,
121		5, resistances, rgb_weights_dark_bit15, 1 / ((1.0 / 8200) + (1.0 / 150)), 0,
	96	5, resistances, state->rgb_weights_dark_bit15, 1 / ((1.0 / 8200) + (1.0 / 150)), 0,
122	97	0, 0, 0, 0, 0,
123	98	0, 0, 0, 0, 0);
124	99	}
125	100
126	101
127		static pen_t get_pen(UINT16 data)
	102	static pen_t get_pen( running_machine *machine, UINT16 data )
128	103	{
	104	neogeo_state *state = (neogeo_state *)machine->driver_data;
129	105	double *weights;
130	106	UINT8 r, g, b;
131	107
132		if (screen_dark)
	108	if (state->screen_dark)
133	109	{
134	110	if (data & 0x8000)
135		weights = rgb_weights_dark_bit15;
	111	weights = state->rgb_weights_dark_bit15;
136	112	else
137		weights = rgb_weights_dark;
	113	weights = state->rgb_weights_dark;
138	114	}
139	115	else
140	116	{
141	117	if (data & 0x8000)
142		weights = rgb_weights_normal_bit15;
	118	weights = state->rgb_weights_normal_bit15;
143	119	else
144		weights = rgb_weights_normal;
	120	weights = state->rgb_weights_normal;
145	121	}
146	122
147	123	r = combine_5_weights(weights,
r6740	r6741
171	147
172	148	static STATE_POSTLOAD( regenerate_pens )
173	149	{
	150	neogeo_state *state = (neogeo_state *)machine->driver_data;
174	151	int i;
175	152
176	153	for (i = 0; i < NUM_PENS; i++)
177		pens[i] = get_pen(palettes[palette_bank][i]);
	154	state->pens[i] = get_pen(machine, state->palettes[state->palette_bank][i]);
178	155	}
179	156
180	157
181		void neogeo_set_palette_bank(running_machine *machine, UINT8 data)
	158	void neogeo_set_palette_bank( running_machine *machine, UINT8 data )
182	159	{
183		if (data != palette_bank)
	160	neogeo_state *state = (neogeo_state *)machine->driver_data;
	161	if (data != state->palette_bank)
184	162	{
185		palette_bank = data;
	163	state->palette_bank = data;
186	164
187	165	regenerate_pens(machine, NULL);
188	166	}
189	167	}
190	168
191	169
192		void neogeo_set_screen_dark(running_machine *machine, UINT8 data)
	170	void neogeo_set_screen_dark( running_machine *machine, UINT8 data )
193	171	{
194		if (data != screen_dark)
	172	neogeo_state *state = (neogeo_state *)machine->driver_data;
	173	if (data != state->screen_dark)
195	174	{
196		screen_dark = data;
	175	state->screen_dark = data;
197	176
198	177	regenerate_pens(machine, NULL);
199	178	}
r6740	r6741
202	181
203	182	READ16_HANDLER( neogeo_paletteram_r )
204	183	{
205		return palettes[palette_bank][offset];
	184	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	185	return state->palettes[state->palette_bank][offset];
206	186	}
207	187
208	188
209	189	WRITE16_HANDLER( neogeo_paletteram_w )
210	190	{
211		UINT16 *addr = &palettes[palette_bank][offset];
	191	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	192	UINT16 *addr = &state->palettes[state->palette_bank][offset];
212	193
213	194	COMBINE_DATA(addr);
214	195
215		pens[offset] = get_pen(*addr);
	196	state->pens[offset] = get_pen(space->machine, *addr);
216	197	}
217	198
218	199
r6740	r6741
223	204	*
224	205	*************************************/
225	206
226		static void set_auto_animation_speed(UINT8 data)
	207	static void set_auto_animation_speed( running_machine *machine, UINT8 data)
227	208	{
228		auto_animation_speed = data;
	209	neogeo_state *state = (neogeo_state *)machine->driver_data;
	210	state->auto_animation_speed = data;
229	211	}
230	212
231	213
232		static void set_auto_animation_disabled(UINT8 data)
	214	static void set_auto_animation_disabled( running_machine *machine, UINT8 data)
233	215	{
234		auto_animation_disabled = data;
	216	neogeo_state *state = (neogeo_state *)machine->driver_data;
	217	state->auto_animation_disabled = data;
235	218	}
236	219
237	220
238		UINT8 neogeo_get_auto_animation_counter(void)
	221	UINT8 neogeo_get_auto_animation_counter( running_machine *machine )
239	222	{
240		return auto_animation_counter;
	223	neogeo_state *state = (neogeo_state *)machine->driver_data;
	224	return state->auto_animation_counter;
241	225	}
242	226
243	227
244	228	static TIMER_CALLBACK( auto_animation_timer_callback )
245	229	{
246		if (auto_animation_frame_counter == 0)
	230	neogeo_state *state = (neogeo_state *)machine->driver_data;
	231	if (state->auto_animation_frame_counter == 0)
247	232	{
248		auto_animation_frame_counter = auto_animation_speed;
249		auto_animation_counter = auto_animation_counter + 1;
	233	state->auto_animation_frame_counter = state->auto_animation_speed;
	234	state->auto_animation_counter += 1;
250	235	}
251	236	else
252		auto_animation_frame_counter = auto_animation_frame_counter - 1;
	237	state->auto_animation_frame_counter = state->auto_animation_frame_counter - 1;
253	238
254		timer_adjust_oneshot(auto_animation_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VSSTART, 0), 0);
	239	timer_adjust_oneshot(state->auto_animation_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VSSTART, 0), 0);
255	240	}
256	241
257	242
258		static void create_auto_animation_timer(running_machine *machine)
	243	static void create_auto_animation_timer( running_machine *machine )
259	244	{
260		auto_animation_timer = timer_alloc(machine, auto_animation_timer_callback, NULL);
	245	neogeo_state *state = (neogeo_state *)machine->driver_data;
	246	state->auto_animation_timer = timer_alloc(machine, auto_animation_timer_callback, NULL);
261	247	}
262	248
263	249
264		static void start_auto_animation_timer(running_machine *machine)
	250	static void start_auto_animation_timer( running_machine *machine )
265	251	{
266		timer_adjust_oneshot(auto_animation_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VSSTART, 0), 0);
	252	neogeo_state *state = (neogeo_state *)machine->driver_data;
	253	timer_adjust_oneshot(state->auto_animation_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VSSTART, 0), 0);
267	254	}
268	255
269	256
r6740	r6741
274	261	*
275	262	*************************************/
276	263
277		void neogeo_set_fixed_layer_source(UINT8 data)
	264	void neogeo_set_fixed_layer_source( running_machine *machine, UINT8 data )
278	265	{
279		fixed_layer_source = data;
	266	neogeo_state *state = (neogeo_state *)machine->driver_data;
	267	state->fixed_layer_source = data;
280	268	}
281	269
282	270
283		static void draw_fixed_layer(running_machine *machine, bitmap_t *bitmap, int scanline)
	271	static void draw_fixed_layer( running_machine *machine, bitmap_t *bitmap, int scanline )
284	272	{
	273	neogeo_state *state = (neogeo_state *)machine->driver_data;
285	274	int x;
286	275
287		UINT8* gfx_base = memory_region(machine, fixed_layer_source ? "fixed" : "fixedbios");
288		UINT32 addr_mask = memory_region_length(machine, fixed_layer_source ? "fixed" : "fixedbios") - 1;
289		UINT16 *video_data = &neogeo_videoram[0x7000 | (scanline >> 3)];
	276	UINT8* gfx_base = memory_region(machine, state->fixed_layer_source ? "fixed" : "fixedbios");
	277	UINT32 addr_mask = memory_region_length(machine, state->fixed_layer_source ? "fixed" : "fixedbios") - 1;
	278	UINT16 *video_data = &state->videoram[0x7000 | (scanline >> 3)];
290	279	UINT32 *pixel_addr = BITMAP_ADDR32(bitmap, scanline, NEOGEO_HBEND);
291	280
292		int garouoffsets[32];
293		int banked = fixed_layer_source && (addr_mask > 0x1ffff);
294		{
295		/* thanks to Mr K for the garou & kof2000 banking info */
296		/* Build line banking table for Garou & MS3 before starting render */
297		if (banked && neogeo_fixed_layer_bank_type == 1)
298		{
299		int garoubank = 0;
300		int k = 0;
301		int y = 0;
302		while (y < 32)
	281	int garouoffsets[32];
	282	int banked = state->fixed_layer_source && (addr_mask > 0x1ffff);
	283
	284	/* thanks to Mr K for the garou & kof2000 banking info */
	285	/* Build line banking table for Garou & MS3 before starting render */
	286	if (banked && state->fixed_layer_bank_type == 1)
303	287	{
304		if (neogeo_videoram[0x7500+k] == 0x0200 && (neogeo_videoram[0x7580+k] & 0xff00) == 0xff00)
	288	int garoubank = 0;
	289	int k = 0;
	290	int y = 0;
	291	while (y < 32)
305	292	{
306		garoubank = neogeo_videoram[0x7580+k] & 3;
	293	if (state->videoram[0x7500 + k] == 0x0200 && (state->videoram[0x7580 + k] & 0xff00) == 0xff00)
	294	{
	295	garoubank = state->videoram[0x7580 + k] & 3;
	296	garouoffsets[y++] = garoubank;
	297	}
307	298	garouoffsets[y++] = garoubank;
	299	k += 2;
308	300	}
309		garouoffsets[y++] = garoubank;
310		k += 2;
311	301	}
312		}
313		}
314	302
315	303	for (x = 0; x < 40; x++)
316	304	{
317	305	UINT16 code_and_palette = *video_data;
318
319	306	UINT16 code = code_and_palette & 0x0fff;
320	307
321		if (banked)
322		{
323		int y = scanline >> 3;
324		switch (neogeo_fixed_layer_bank_type)
325		{
326		case 1:
327		/* Garou, MSlug 3 */
328		code += 0x1000 * (garouoffsets[(y-2)&31] ^ 3);
329		break;
330		case 2:
331		code += 0x1000 * (((neogeo_videoram[0x7500 + ((y-1)&31) + 32 * (x/6)] >> (5-(x%6))*2) & 3) ^ 3);
332		break;
333		}
334		}
	308	if (banked)
	309	{
	310	int y = scanline >> 3;
	311	switch (state->fixed_layer_bank_type)
	312	{
	313	case 1:
	314	/* Garou, MSlug 3 */
	315	code += 0x1000 * (garouoffsets[(y - 2) & 31] ^ 3);
	316	break;
	317	case 2:
	318	code += 0x1000 * (((state->videoram[0x7500 + ((y - 1) & 31) + 32 * (x / 6)] >> (5 - (x % 6)) * 2) & 3) ^ 3);
	319	break;
	320	}
	321	}
335	322
336	323	{
337	324	UINT8 data;
338	325	int i;
339	326
340	327	UINT8 *gfx = &gfx_base[((code << 5) | (scanline & 0x07)) & addr_mask];
341		pen_t *char_pens = &pens[code_and_palette >> 12 << 4];
	328	pen_t *char_pens = &state->pens[code_and_palette >> 12 << 4];
342	329
343	330	for (i = 0; i < 4; i++)
344	331	{
r6740	r6741
368	355	*
369	356	*************************************/
370	357
371		#define MAX_SPRITES_PER_SCREEN   (381)
372		#define MAX_SPRITES_PER_LINE   (96)
	358	#define MAX_SPRITES_PER_SCREEN    (381)
	359	#define MAX_SPRITES_PER_LINE      (96)
373	360
374	361
375	362	/* horizontal zoom table - verified on real hardware */
r6740	r6741
414	401	}
415	402
416	403
417		static void draw_sprites(bitmap_t *bitmap, int scanline)
	404	static void draw_sprites( running_machine *machine, bitmap_t *bitmap, int scanline )
418	405	{
	406	neogeo_state *state = (neogeo_state *)machine->driver_data;
419	407	int sprite_index;
420	408	int max_sprite_index;
421	409
r6740	r6741
428	416
429	417	/* select the active list */
430	418	if (scanline & 0x01)
431		sprite_list = &neogeo_videoram[0x8680];
	419	sprite_list = &state->videoram[0x8680];
432	420	else
433		sprite_list = &neogeo_videoram[0x8600];
	421	sprite_list = &state->videoram[0x8600];
434	422
435	423	/* optimization -- find last non-zero entry and only draw that many +1
436	424	sprite.  This is not 100% correct as the hardware will keep drawing
437	425	the #0 sprite over and over, but we need the speed */
438		for (max_sprite_index = (MAX_SPRITES_PER_LINE - 1); max_sprite_index >= 0; max_sprite_index--)
439		{
	426	for (max_sprite_index = (MAX_SPRITES_PER_LINE - 1); max_sprite_index >= 0; max_sprite_index--)
	427	{
440	428	if (sprite_list[max_sprite_index] != 0)
441	429	break;
442	430	}
r6740	r6741
448	436	for (sprite_index = 0; sprite_index <= max_sprite_index; sprite_index++)
449	437	{
450	438	UINT16 sprite_number = sprite_list[sprite_index] & 0x01ff;
	439	UINT16 y_control = state->videoram[0x8200 | sprite_number];
	440	UINT16 zoom_control = state->videoram[0x8000 | sprite_number];
451	441
452		UINT16 y_control = neogeo_videoram[0x8200 | sprite_number];
453		UINT16 zoom_control = neogeo_videoram[0x8000 | sprite_number];
454
455	442	/* if chained, go to next X coordinate and get new X zoom */
456	443	if (y_control & 0x40)
457	444	{
r6740	r6741
462	449	else
463	450	{
464	451	y = 0x200 - (y_control >> 7);
465		x = neogeo_videoram[0x8400 | sprite_number] >> 7;
	452	x = state->videoram[0x8400 | sprite_number] >> 7;
466	453	zoom_y = zoom_control & 0xff;
467	454	zoom_x = (zoom_control >> 8) & 0x0f;
468	455	rows = y_control & 0x3f;
r6740	r6741
505	492	}
506	493	}
507	494
508		sprite_y_and_tile = region_zoomy[(zoom_y << 8) | zoom_line];
	495	sprite_y_and_tile = state->region_zoomy[(zoom_y << 8) | zoom_line];
509	496	sprite_y = sprite_y_and_tile & 0x0f;
510	497	tile = sprite_y_and_tile >> 4;
511	498
r6740	r6741
516	503	}
517	504
518	505	attr_and_code_offs = (sprite_number << 6) | (tile << 1);
519		attr = neogeo_videoram[attr_and_code_offs + 1];
520		code = ((attr << 12) & 0x70000) | neogeo_videoram[attr_and_code_offs];
	506	attr = state->videoram[attr_and_code_offs + 1];
	507	code = ((attr << 12) & 0x70000) | state->videoram[attr_and_code_offs];
521	508
522	509	/* substitute auto animation bits */
523		if (!auto_animation_disabled)
	510	if (!state->auto_animation_disabled)
524	511	{
525	512	if (attr & 0x0008)
526		code = (code & ~0x07) | (auto_animation_counter & 0x07);
	513	code = (code & ~0x07) | (state->auto_animation_counter & 0x07);
527	514	else if (attr & 0x0004)
528		code = (code & ~0x03) | (auto_animation_counter & 0x03);
	515	code = (code & ~0x03) | (state->auto_animation_counter & 0x03);
529	516	}
530	517
531	518	/* vertical flip? */
r6740	r6741
535	522	zoom_x_table = zoom_x_tables[zoom_x];
536	523
537	524	/* compute offset in gfx ROM and mask it to the number of bits available */
538		gfx = &sprite_gfx[((code << 8) | (sprite_y << 4)) & sprite_gfx_address_mask];
	525	gfx = &state->sprite_gfx[((code << 8) | (sprite_y << 4)) & state->sprite_gfx_address_mask];
539	526
540		line_pens = &pens[attr >> 8 << 4];
	527	line_pens = &state->pens[attr >> 8 << 4];
541	528
542	529	/* horizontal flip? */
543	530	if (attr & 0x0001)
r6740	r6741
603	590	}
604	591
605	592
606		static void parse_sprites(int scanline)
	593	static void parse_sprites( running_machine *machine, int scanline )
607	594	{
	595	neogeo_state *state = (neogeo_state *)machine->driver_data;
608	596	UINT16 sprite_number;
609	597	int y = 0;
610	598	int rows = 0;
r6740	r6741
614	602
615	603	/* select the active list */
616	604	if (scanline & 0x01)
617		sprite_list = &neogeo_videoram[0x8680];
	605	sprite_list = &state->videoram[0x8680];
618	606	else
619		sprite_list = &neogeo_videoram[0x8600];
	607	sprite_list = &state->videoram[0x8600];
620	608
621	609	/* scan all sprites */
622	610	for (sprite_number = 0; sprite_number < MAX_SPRITES_PER_SCREEN; sprite_number++)
623	611	{
624		UINT16 y_control = neogeo_videoram[0x8200 | sprite_number];
	612	UINT16 y_control = state->videoram[0x8200 | sprite_number];
625	613
626	614	/* if not chained, get Y position and height, otherwise use previous values */
627	615	if (~y_control & 0x40)
r6740	r6741
650	638	}
651	639
652	640	/* fill the rest of the sprite list with 0, including one extra entry */
653		memset(sprite_list, 0,
654		sizeof(sprite_list[0]) * (MAX_SPRITES_PER_LINE - active_sprite_count + 1));
	641	memset(sprite_list, 0, sizeof(sprite_list[0]) * (MAX_SPRITES_PER_LINE - active_sprite_count + 1));
655	642	}
656	643
657	644
658	645	static TIMER_CALLBACK( sprite_line_timer_callback )
659	646	{
	647	neogeo_state *state = (neogeo_state *)machine->driver_data;
660	648	int scanline = param;
661	649
662	650	/* we are at the beginning of a scanline -
663	651	we need to draw the previous scanline and parse the sprites on the current one */
664		if (scanline != 0)
665		video_screen_update_partial(machine->primary_screen, scanline - 1);
	652	if (scanline != 0)
	653	video_screen_update_partial(machine->primary_screen, scanline - 1);
666	654
667		parse_sprites(scanline);
	655	parse_sprites(machine, scanline);
668	656
669	657	/* let's come back at the beginning of the next line */
670	658	scanline = (scanline + 1) % NEOGEO_VTOTAL;
671	659
672		timer_adjust_oneshot(sprite_line_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
	660	timer_adjust_oneshot(state->sprite_line_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
673	661	}
674	662
675	663
676		static void create_sprite_line_timer(running_machine *machine)
	664	static void create_sprite_line_timer( running_machine *machine )
677	665	{
678		sprite_line_timer = timer_alloc(machine, sprite_line_timer_callback, NULL);
	666	neogeo_state *state = (neogeo_state *)machine->driver_data;
	667	state->sprite_line_timer = timer_alloc(machine, sprite_line_timer_callback, NULL);
679	668	}
680	669
681	670
682		static void start_sprite_line_timer(running_machine *machine)
	671	static void start_sprite_line_timer( running_machine *machine )
683	672	{
684		timer_adjust_oneshot(sprite_line_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
	673	neogeo_state *state = (neogeo_state *)machine->driver_data;
	674	timer_adjust_oneshot(state->sprite_line_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
685	675	}
686	676
687	677
688		static void optimize_sprite_data(running_machine *machine)
	678	static void optimize_sprite_data( running_machine *machine )
689	679	{
	680	neogeo_state *state = (neogeo_state *)machine->driver_data;
	681
690	682	/* convert the sprite graphics data into a format that
691	683	allows faster blitting */
692	684	int i;
r6740	r6741
697	689
698	690	/* get mask based on the length rounded up to the nearest
699	691	power of 2 */
700		sprite_gfx_address_mask = 0xffffffff;
	692	state->sprite_gfx_address_mask = 0xffffffff;
701	693
702	694	len = memory_region_length(machine, "sprites");
	695
703	696	for (bit = 0x80000000; bit != 0; bit >>= 1)
704	697	{
705	698	if (((len * 2) - 1) & bit)
706	699	break;
707	700
708		sprite_gfx_address_mask >>= 1;
	701	state->sprite_gfx_address_mask >>= 1;
709	702	}
710	703
711		sprite_gfx = auto_alloc_array_clear(machine, UINT8, sprite_gfx_address_mask + 1);
	704	state->sprite_gfx = auto_alloc_array_clear(machine, UINT8, state->sprite_gfx_address_mask + 1);
712	705
713	706	src = memory_region(machine, "sprites");
714		dest = sprite_gfx;
	707	dest = state->sprite_gfx;
715	708
716	709	for (i = 0; i < len; i += 0x80, src += 0x80)
717	710	{
r6740	r6741
748	741	*
749	742	*************************************/
750	743
751		static UINT16 get_video_control(running_machine *machine)
	744	static UINT16 get_video_control( running_machine *machine )
752	745	{
753	746	UINT16 ret;
754	747	UINT16 v_counter;
r6740	r6741
780	773	if (v_counter >= 0x200)
781	774	v_counter = v_counter - NEOGEO_VTOTAL;
782	775
783		ret = (v_counter << 7) | (neogeo_get_auto_animation_counter() & 0x0007);
	776	ret = (v_counter << 7) | (neogeo_get_auto_animation_counter(machine) & 0x0007);
784	777
785	778	if (VERBOSE) logerror("%s: video_control read (%04x)\n", cpuexec_describe_context(machine), ret);
786	779
r6740	r6741
788	781	}
789	782
790	783
791		static void set_video_control(running_machine *machine, UINT16 data)
	784	static void set_video_control( running_machine *machine, UINT16 data )
792	785	{
793	786	/* this does much more than this, but I'm not sure exactly what */
794	787	if (VERBOSE) logerror("%s: video control write %04x\n", cpuexec_describe_context(machine), data);
795	788
796		set_auto_animation_speed(data >> 8);
797		set_auto_animation_disabled(data & 0x0008);
	789	set_auto_animation_speed(machine, data >> 8);
	790	set_auto_animation_disabled(machine, data & 0x0008);
798	791
799		neogeo_set_display_position_interrupt_control(data & 0x00f0);
	792	neogeo_set_display_position_interrupt_control(machine, data & 0x00f0);
800	793	}
801	794
802	795
r6740	r6741
813	806	{
814	807	default:
815	808	case 0x00:
816		case 0x01: ret = get_videoram_data(); break;
817		case 0x02: ret = get_videoram_modulo(); break;
	809	case 0x01: ret = get_videoram_data(space->machine); break;
	810	case 0x02: ret = get_videoram_modulo(space->machine); break;
818	811	case 0x03: ret = get_video_control(space->machine); break;
819	812	}
820	813	}
r6740	r6741
834	827
835	828	switch (offset)
836	829	{
837		case 0x00: set_videoram_offset(data); break;
838		case 0x01: set_videoram_data(data); break;
839		case 0x02: set_videoram_modulo(data); break;
	830	case 0x00: set_videoram_offset(space->machine, data); break;
	831	case 0x01: set_videoram_data(space->machine, data); break;
	832	case 0x02: set_videoram_modulo(space->machine, data); break;
840	833	case 0x03: set_video_control(space->machine, data); break;
841	834	case 0x04: neogeo_set_display_counter_msb(space, data); break;
842	835	case 0x05: neogeo_set_display_counter_lsb(space, data); break;
r6740	r6741
856	849
857	850	VIDEO_START( neogeo )
858	851	{
	852	neogeo_state *state = (neogeo_state *)machine->driver_data;
	853
859	854	/* allocate memory not directly mapped */
860		palettes[0] = auto_alloc_array(machine, UINT16, NUM_PENS);
861		palettes[1] = auto_alloc_array(machine, UINT16, NUM_PENS);
862		pens = auto_alloc_array(machine, pen_t, NUM_PENS);
863		neogeo_videoram = auto_alloc_array(machine, UINT16, 0x20000/2);
	855	state->palettes[0] = auto_alloc_array(machine, UINT16, NUM_PENS);
	856	state->palettes[1] = auto_alloc_array(machine, UINT16, NUM_PENS);
	857	state->pens = auto_alloc_array(machine, pen_t, NUM_PENS);
	858	state->videoram = auto_alloc_array(machine, UINT16, 0x20000/2);
864	859
865	860	/* clear allocated memory */
866		memset(palettes[0],0x00, NUM_PENS * sizeof(UINT16));
867		memset(palettes[1],0x00, NUM_PENS * sizeof(UINT16));
868		memset(pens,0x00, NUM_PENS * sizeof(pen_t));
869		memset(neogeo_videoram,0x00, 0x20000);
	861	memset(state->palettes[0], 0x00, NUM_PENS * sizeof(UINT16));
	862	memset(state->palettes[1], 0x00, NUM_PENS * sizeof(UINT16));
	863	memset(state->pens, 0x00, NUM_PENS * sizeof(pen_t));
	864	memset(state->videoram, 0x00, 0x20000);
870	865
871		compute_rgb_weights();
	866	compute_rgb_weights(machine);
872	867	create_sprite_line_timer(machine);
873	868	create_auto_animation_timer(machine);
874	869	optimize_sprite_data(machine);
875	870
876	871	/* initialize values that are not modified on a reset */
877		videoram_read_buffer = 0;
878		videoram_offset = 0;
879		videoram_modulo = 0;
880		auto_animation_speed = 0;
881		auto_animation_disabled = 0;
882		auto_animation_counter = 0;
883		auto_animation_frame_counter = 0;
	872	state->videoram_read_buffer = 0;
	873	state->videoram_offset = 0;
	874	state->videoram_modulo = 0;
	875	state->auto_animation_speed = 0;
	876	state->auto_animation_disabled = 0;
	877	state->auto_animation_counter = 0;
	878	state->auto_animation_frame_counter = 0;
884	879
885	880	/* register for state saving */
886		state_save_register_global_pointer(machine, palettes[0], NUM_PENS);
887		state_save_register_global_pointer(machine, palettes[1], NUM_PENS);
888		state_save_register_global_pointer(machine, neogeo_videoram, 0x20000/2);
889		state_save_register_global(machine, videoram_read_buffer);
890		state_save_register_global(machine, videoram_modulo);
891		state_save_register_global(machine, videoram_offset);
892		state_save_register_global(machine, fixed_layer_source);
893		state_save_register_global(machine, screen_dark);
894		state_save_register_global(machine, palette_bank);
895		state_save_register_global(machine, auto_animation_speed);
896		state_save_register_global(machine, auto_animation_disabled);
897		state_save_register_global(machine, auto_animation_counter);
898		state_save_register_global(machine, auto_animation_frame_counter);
	881	state_save_register_global_pointer(machine, state->palettes[0], NUM_PENS);
	882	state_save_register_global_pointer(machine, state->palettes[1], NUM_PENS);
	883	state_save_register_global_pointer(machine, state->videoram, 0x20000/2);
	884	state_save_register_global(machine, state->videoram_read_buffer);
	885	state_save_register_global(machine, state->videoram_modulo);
	886	state_save_register_global(machine, state->videoram_offset);
	887	state_save_register_global(machine, state->fixed_layer_source);
	888	state_save_register_global(machine, state->screen_dark);
	889	state_save_register_global(machine, state->palette_bank);
	890	state_save_register_global(machine, state->auto_animation_speed);
	891	state_save_register_global(machine, state->auto_animation_disabled);
	892	state_save_register_global(machine, state->auto_animation_counter);
	893	state_save_register_global(machine, state->auto_animation_frame_counter);
899	894
900	895	state_save_register_postload(machine, regenerate_pens, NULL);
901	896
902		region_zoomy = memory_region(machine, "zoomy");
	897	state->region_zoomy = memory_region(machine, "zoomy");
903	898	}
904	899
905	900
r6740	r6741
926	921
927	922	VIDEO_UPDATE( neogeo )
928	923	{
	924	neogeo_state *state = (neogeo_state *)screen->machine->driver_data;
	925
929	926	/* fill with background color first */
930		bitmap_fill(bitmap, cliprect, pens[0x0fff]);
	927	bitmap_fill(bitmap, cliprect, state->pens[0x0fff]);
931	928
932		draw_sprites(bitmap, cliprect->min_y);
	929	draw_sprites(screen->machine, bitmap, cliprect->min_y);
933	930
934	931	draw_fixed_layer(screen->machine, bitmap, cliprect->min_y);
935	932

src/mame/video/snookr10.c

r6740	r6741
40	40	#include "driver.h"
41	41	#include "video/resnet.h"
42	42
	43	UINT8 *snookr10_videoram;
	44	UINT8 *snookr10_colorram;
43	45	static tilemap *bg_tilemap;
44	46
45	47
46	48	WRITE8_HANDLER( snookr10_videoram_w )
47	49	{
48		space->machine->generic.videoram.u8[offset] = data;
	50	snookr10_videoram[offset] = data;
49	51	tilemap_mark_tile_dirty(bg_tilemap, offset);
50	52	}
51	53
52	54	WRITE8_HANDLER( snookr10_colorram_w )
53	55	{
54		space->machine->generic.colorram.u8[offset] = data;
	56	snookr10_colorram[offset] = data;
55	57	tilemap_mark_tile_dirty(bg_tilemap, offset);
56	58	}
57	59
r6740	r6741
102	104	---- xxxx   seems unused.
103	105	*/
104	106	int offs = tile_index;
105		int attr = machine->generic.videoram.u8[offs] + (machine->generic.colorram.u8[offs] << 8);
	107	int attr = snookr10_videoram[offs] + (snookr10_colorram[offs] << 8);
106	108	int code = attr & 0xfff;
107		int color = machine->generic.colorram.u8[offs] >> 4;
	109	int color = snookr10_colorram[offs] >> 4;
108	110
109	111	SET_TILE_INFO(0, code, color, 0);
110	112	}
r6740	r6741
164	166	---- xxxx   seems unused.
165	167	*/
166	168	int offs = tile_index;
167		int attr = machine->generic.videoram.u8[offs] + (machine->generic.colorram.u8[offs] << 8);
	169	int attr = snookr10_videoram[offs] + (snookr10_colorram[offs] << 8);
168	170	int code = BITSWAP16((attr & 0xfff),15,14,13,12,8,9,10,11,0,1,2,3,4,5,6,7);   /* encrypted tile matrix */
169		int color = machine->generic.colorram.u8[offs] >> 4;
	171	int color = snookr10_colorram[offs] >> 4;
170	172
171	173	SET_TILE_INFO(0, code, color, 0);
172	174	}

src/mame/video/konamigx.c

r6740	r6741
5	5
6	6	#include "driver.h"
7	7	#include "video/konamiic.h"
8		#include "konamigx.h"
	8	#include "includes/konamigx.h"
9	9
10	10
11	11	#define GX_DEBUG 0

src/mame/video/ultraman.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4		#define SPRITEROM_MEM_REGION "gfx1"
5		#define ZOOMROM0_MEM_REGION "gfx2"
6		#define ZOOMROM1_MEM_REGION "gfx3"
7		#define ZOOMROM2_MEM_REGION "gfx4"
8
9	4	static int sprite_colorbase, zoom_colorbase[3];
10	5	static int bank0,bank1,bank2;
11	6
r6740	r6741
16	11
17	12	***************************************************************************/
18	13
19		static void sprite_callback(int *code,int *color,int *priority,int *shadow)
	14	void ultraman_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
20	15	{
21	16	*priority = (*color & 0x80) >> 7;
22	17	*color = sprite_colorbase + ((*color & 0x7e) >> 1);
r6740	r6741
30	25
31	26	***************************************************************************/
32	27
33		static void zoom_callback_0(int *code,int *color,int *flags)
	28	void ultraman_zoom_callback_0(running_machine *machine, int *code,int *color,int *flags)
34	29	{
35	30	*code |= ((*color & 0x07) << 8) | (bank0 << 11);
36	31	*color = zoom_colorbase[0] + ((*color & 0xf8) >> 3);
37	32	}
38	33
39		static void zoom_callback_1(int *code,int *color,int *flags)
	34	void ultraman_zoom_callback_1(running_machine *machine, int *code,int *color,int *flags)
40	35	{
41	36	*code |= ((*color & 0x07) << 8) | (bank1 << 11);
42	37	*color = zoom_colorbase[1] + ((*color & 0xf8) >> 3);
43	38	}
44	39
45		static void zoom_callback_2(int *code,int *color,int *flags)
	40	void ultraman_zoom_callback_2(running_machine *machine, int *code,int *color,int *flags)
46	41	{
47	42	*code |= ((*color & 0x07) << 8) | (bank2 << 11);
48	43	*color = zoom_colorbase[2] + ((*color & 0xf8) >> 3);
r6740	r6741
62	57	zoom_colorbase[0] = 0;
63	58	zoom_colorbase[1] = 64;
64	59	zoom_colorbase[2] = 128;
65
66		K051960_vh_start(machine,SPRITEROM_MEM_REGION,NORMAL_PLANE_ORDER,sprite_callback);
67		K051316_vh_start_0(machine,ZOOMROM0_MEM_REGION,4,FALSE,0,zoom_callback_0);
68		K051316_vh_start_1(machine,ZOOMROM1_MEM_REGION,4,FALSE,0,zoom_callback_1);
69		K051316_vh_start_2(machine,ZOOMROM2_MEM_REGION,4,TRUE,0,zoom_callback_2);
70
71		K051316_set_offset(0, 8, 0);
72		K051316_set_offset(1, 8, 0);
73		K051316_set_offset(2, 8, 0);
74	60	}
75	61
76	62
r6740	r6741
83	69
84	70	WRITE16_HANDLER( ultraman_gfxctrl_w )
85	71	{
	72	const device_config *k051316_1 = devtag_get_device(space->machine, "k051316_1");
	73	const device_config *k051316_2 = devtag_get_device(space->machine, "k051316_2");
	74	const device_config *k051316_3 = devtag_get_device(space->machine, "k051316_3");
	75
86	76	if (ACCESSING_BITS_0_7)
87	77	{
88	78	/*  bit 0: enable wraparound for scr #1
r6740	r6741
93	83	bit 5: msb of code for scr #3
94	84	bit 6: coin counter 1
95	85	bit 7: coin counter 2 */
96		K051316_wraparound_enable(0,data & 0x01);
	86
	87	k051316_wraparound_enable(k051316_1, data & 0x01);
	88
97	89	if (bank0 != ((data & 0x02) >> 1))
98	90	{
99	91	bank0 = (data & 0x02) >> 1;
100	92	tilemap_mark_all_tiles_dirty_all(space->machine);   /* should mark only zoom0 */
101	93	}
102		K051316_wraparound_enable(1,data & 0x04);
	94
	95	k051316_wraparound_enable(k051316_2, data & 0x04);
	96
103	97	if (bank1 != ((data & 0x08) >> 3))
104	98	{
105	99	bank1 = (data & 0x08) >> 3;
106	100	tilemap_mark_all_tiles_dirty_all(space->machine);   /* should mark only zoom1 */
107	101	}
108		K051316_wraparound_enable(2,data & 0x10);
	102
	103	k051316_wraparound_enable(k051316_3, data & 0x10);
	104
109	105	if (bank2 != ((data & 0x20) >> 5))
110	106	{
111	107	bank2 = (data & 0x20) >> 5;
112	108	tilemap_mark_all_tiles_dirty_all(space->machine);   /* should mark only zoom2 */
113	109	}
	110
114	111	coin_counter_w(space->machine, 0, data & 0x40);
115	112	coin_counter_w(space->machine, 1, data & 0x80);
116	113	}
r6740	r6741
126	123
127	124	VIDEO_UPDATE( ultraman )
128	125	{
129		K051316_zoom_draw_2(bitmap,cliprect,0,0);
130		K051316_zoom_draw_1(bitmap,cliprect,0,0);
131		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
132		K051316_zoom_draw_0(bitmap,cliprect,0,0);
133		K051960_sprites_draw(screen->machine,bitmap,cliprect,1,1);
	126	const device_config *k051316_1 = devtag_get_device(screen->machine, "k051316_1");
	127	const device_config *k051316_2 = devtag_get_device(screen->machine, "k051316_2");
	128	const device_config *k051316_3 = devtag_get_device(screen->machine, "k051316_3");
	129	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
	130
	131	k051316_zoom_draw(k051316_3, bitmap, cliprect, 0, 0);
	132	k051316_zoom_draw(k051316_2, bitmap, cliprect, 0, 0);
	133	k051960_sprites_draw(k051960, bitmap, cliprect, 0, 0);
	134	k051316_zoom_draw(k051316_1, bitmap, cliprect, 0, 0);
	135	k051960_sprites_draw(k051960, bitmap, cliprect, 1, 1);
134	136	return 0;
135	137	}

src/mame/video/parodius.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	static int layer_colorbase[3],sprite_colorbase,bg_colorbase;
r6740	r6741
12	12
13	13	***************************************************************************/
14	14
15		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	15	void parodius_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
16	16	{
17	17	*code |= ((*color & 0x03) << 8) | ((*color & 0x10) << 6) | ((*color & 0x0c) << 9) | (bank << 13);
18	18	*color = layer_colorbase[layer] + ((*color & 0xe0) >> 5);
r6740	r6741
24	24
25	25	***************************************************************************/
26	26
27		static void sprite_callback(int *code,int *color,int *priority_mask)
	27	void parodius_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
28	28	{
29	29	int pri = 0x20 | ((*color & 0x60) >> 2);
30	30	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
42	42
43	43	***************************************************************************/
44	44
45		VIDEO_START( parodius )
46		{
47		K053251_vh_start(machine);
48		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
49		K053245_vh_start(machine,0,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
50		}
51
52	45	/* useful function to sort the three tile layers by priority order */
53	46	static void sortlayers(int *layer,int *pri)
54	47	{
r6740	r6741
67	60
68	61	VIDEO_UPDATE( parodius )
69	62	{
	63	const device_config *k053245 = devtag_get_device(screen->machine, "k053245");
	64	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	65	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
70	66	int layer[3];
71	67
	68	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI0);
	69	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	70	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	71	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI4);
	72	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI3);
72	73
73		bg_colorbase       = K053251_get_palette_index(K053251_CI0);
74		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
75		layer_colorbase[0] = K053251_get_palette_index(K053251_CI2);
76		layer_colorbase[1] = K053251_get_palette_index(K053251_CI4);
77		layer_colorbase[2] = K053251_get_palette_index(K053251_CI3);
	74	k052109_tilemap_update(k052109);
78	75
79		K052109_tilemap_update();
80
81	76	layer[0] = 0;
82		layerpri[0] = K053251_get_priority(K053251_CI2);
	77	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
83	78	layer[1] = 1;
84		layerpri[1] = K053251_get_priority(K053251_CI4);
	79	layerpri[1] = k053251_get_priority(k053251, K053251_CI4);
85	80	layer[2] = 2;
86		layerpri[2] = K053251_get_priority(K053251_CI3);
	81	layerpri[2] = k053251_get_priority(k053251, K053251_CI3);
87	82
88		sortlayers(layer,layerpri);
	83	sortlayers(layer, layerpri);
89	84
90	85	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
91	86	bitmap_fill(bitmap,cliprect,16 * bg_colorbase);
92		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[0]],0,1);
93		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[1]],0,2);
94		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[2]],0,4);
	87	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[0], 0,1);
	88	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[1], 0,2);
	89	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[2], 0,4);
95	90
96		K053245_sprites_draw(screen->machine,0,bitmap,cliprect);
	91	k053245_sprites_draw(k053245, bitmap, cliprect);
97	92	return 0;
98	93	}

src/mame/video/combatsc.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "video/konamiic.h"
	10	#include "video/konicdev.h"
	11	#include "includes/combatsc.h"
11	12
12		static tilemap *bg_tilemap[2];
13		static tilemap *textlayer;
14		static UINT8 *private_spriteram[2];
15		static int priority;
16
17		static UINT8 *combasc_io_ram;
18		static int combasc_vreg;
19
20		static int combasc_bank_select; /* 0x00..0x1f */
21		static int combasc_video_circuit; /* 0 or 1 */
22		static UINT8 *combasc_page[2];
23		static UINT8 combasc_scrollram0[0x40];
24		static UINT8 combasc_scrollram1[0x40];
25		static UINT8 *combasc_scrollram;
26
27
28		PALETTE_INIT( combasc )
	13	PALETTE_INIT( combatsc )
29	14	{
30	15	int pal;
31	16
r6740	r6741
75	60	}
76	61
77	62
78		PALETTE_INIT( combascb )
	63	PALETTE_INIT( combatscb )
79	64	{
80	65	int pal;
81	66
r6740	r6741
103	88	}
104	89
105	90
106		static void set_pens(running_machine *machine)
	91	static void set_pens( running_machine *machine )
107	92	{
	93	combatsc_state *state = (combatsc_state *)machine->driver_data;
108	94	int i;
109	95
110	96	for (i = 0x00; i < 0x100; i += 2)
111	97	{
112		UINT16 data = machine->generic.paletteram.u8[i] | (machine->generic.paletteram.u8[i | 1] << 8);
	98	UINT16 data = state->paletteram[i] | (state->paletteram[i | 1] << 8);
113	99
114	100	rgb_t color = MAKE_RGB(pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
115	101
r6740	r6741
127	113
128	114	static TILE_GET_INFO( get_tile_info0 )
129	115	{
130		UINT8 attributes = combasc_page[0][tile_index];
131		int bank = 4*((combasc_vreg & 0x0f) - 1);
132		int number,color;
	116	combatsc_state *state = (combatsc_state *)machine->driver_data;
	117	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_1, 6);
	118	UINT8 attributes = state->page[0][tile_index];
	119	int bank = 4 * ((state->vreg & 0x0f) - 1);
	120	int number, color;
133	121
134		if (bank < 0) bank = 0;
135		if ((attributes & 0xb0) == 0) bank = 0;   /* text bank */
	122	if (bank < 0)
	123	bank = 0;
136	124
137		if (attributes & 0x80) bank += 1;
138		if (attributes & 0x10) bank += 2;
139		if (attributes & 0x20) bank += 4;
	125	if ((attributes & 0xb0) == 0)
	126	bank = 0;   /* text bank */
140	127
141		color = ((K007121_ctrlram[0][6]&0x10)*2+16) + (attributes & 0x0f);
	128	if (attributes & 0x80)
	129	bank += 1;
142	130
143		number = combasc_page[0][tile_index + 0x400] + 256*bank;
	131	if (attributes & 0x10)
	132	bank += 2;
144	133
	134	if (attributes & 0x20)
	135	bank += 4;
	136
	137	color = ((ctrl_6 & 0x10) * 2 + 16) + (attributes & 0x0f);
	138
	139	number = state->page[0][tile_index + 0x400] + 256 * bank;
	140
145	141	SET_TILE_INFO(
146	142	0,
147	143	number,
r6740	r6741
152	148
153	149	static TILE_GET_INFO( get_tile_info1 )
154	150	{
155		UINT8 attributes = combasc_page[1][tile_index];
156		int bank = 4*((combasc_vreg >> 4) - 1);
	151	combatsc_state *state = (combatsc_state *)machine->driver_data;
	152	UINT8 ctrl_6 = k007121_ctrlram_r(state->k007121_2, 6);
	153	UINT8 attributes = state->page[1][tile_index];
	154	int bank = 4 * ((state->vreg >> 4) - 1);
157	155	int number, color;
158	156
159		if (bank < 0) bank = 0;
160		if ((attributes & 0xb0) == 0) bank = 0;   /* text bank */
	157	if (bank < 0)
	158	bank = 0;
161	159
162		if (attributes & 0x80) bank += 1;
163		if (attributes & 0x10) bank += 2;
164		if (attributes & 0x20) bank += 4;
	160	if ((attributes & 0xb0) == 0)
	161	bank = 0;   /* text bank */
165	162
166		color = ((K007121_ctrlram[1][6]&0x10)*2+16+4*16) + (attributes & 0x0f);
	163	if (attributes & 0x80)
	164	bank += 1;
167	165
168		number = combasc_page[1][tile_index + 0x400] + 256*bank;
	166	if (attributes & 0x10)
	167	bank += 2;
169	168
	169	if (attributes & 0x20)
	170	bank += 4;
	171
	172	color = ((ctrl_6 & 0x10) * 2 + 16 + 4 * 16) + (attributes & 0x0f);
	173
	174	number = state->page[1][tile_index + 0x400] + 256 * bank;
	175
170	176	SET_TILE_INFO(
171	177	1,
172	178	number,
r6740	r6741
177	183
178	184	static TILE_GET_INFO( get_text_info )
179	185	{
180		UINT8 attributes = combasc_page[0][tile_index + 0x800];
181		int number = combasc_page[0][tile_index + 0xc00];
	186	combatsc_state *state = (combatsc_state *)machine->driver_data;
	187	UINT8 attributes = state->page[0][tile_index + 0x800];
	188	int number = state->page[0][tile_index + 0xc00];
182	189	int color = 16 + (attributes & 0x0f);
183	190
184	191	SET_TILE_INFO(
r6740	r6741
191	198
192	199	static TILE_GET_INFO( get_tile_info0_bootleg )
193	200	{
194		UINT8 attributes = combasc_page[0][tile_index];
195		int bank = 4*((combasc_vreg & 0x0f) - 1);
	201	combatsc_state *state = (combatsc_state *)machine->driver_data;
	202	UINT8 attributes = state->page[0][tile_index];
	203	int bank = 4 * ((state->vreg & 0x0f) - 1);
196	204	int number, pal, color;
197	205
198		if (bank < 0) bank = 0;
199		if ((attributes & 0xb0) == 0) bank = 0;   /* text bank */
	206	if (bank < 0)
	207	bank = 0;
200	208
201		if (attributes & 0x80) bank += 1;
202		if (attributes & 0x10) bank += 2;
203		if (attributes & 0x20) bank += 4;
	209	if ((attributes & 0xb0) == 0)
	210	bank = 0;   /* text bank */
204	211
	212	if (attributes & 0x80)
	213	bank += 1;
	214
	215	if (attributes & 0x10)
	216	bank += 2;
	217
	218	if (attributes & 0x20)
	219	bank += 4;
	220
205	221	pal = (bank == 0 || bank >= 0x1c || (attributes & 0x40)) ? 1 : 3;
206	222	color = pal*16;// + (attributes & 0x0f);
207		number = combasc_page[0][tile_index + 0x400] + 256*bank;
	223	number = state->page[0][tile_index + 0x400] + 256 * bank;
208	224
209	225	SET_TILE_INFO(
210	226	0,
r6740	r6741
215	231
216	232	static TILE_GET_INFO( get_tile_info1_bootleg )
217	233	{
218		UINT8 attributes = combasc_page[1][tile_index];
219		int bank = 4*((combasc_vreg >> 4) - 1);
	234	combatsc_state *state = (combatsc_state *)machine->driver_data;
	235	UINT8 attributes = state->page[1][tile_index];
	236	int bank = 4*((state->vreg >> 4) - 1);
220	237	int number, pal, color;
221	238
222		if (bank < 0) bank = 0;
223		if ((attributes & 0xb0) == 0) bank = 0;   /* text bank */
	239	if (bank < 0)
	240	bank = 0;
224	241
225		if (attributes & 0x80) bank += 1;
226		if (attributes & 0x10) bank += 2;
227		if (attributes & 0x20) bank += 4;
	242	if ((attributes & 0xb0) == 0)
	243	bank = 0;   /* text bank */
228	244
	245	if (attributes & 0x80)
	246	bank += 1;
	247
	248	if (attributes & 0x10)
	249	bank += 2;
	250
	251	if (attributes & 0x20)
	252	bank += 4;
	253
229	254	pal = (bank == 0 || bank >= 0x1c || (attributes & 0x40)) ? 5 : 7;
230		color = pal*16;// + (attributes & 0x0f);
231		number = combasc_page[1][tile_index + 0x400] + 256*bank;
	255	color = pal * 16;// + (attributes & 0x0f);
	256	number = state->page[1][tile_index + 0x400] + 256 * bank;
232	257
233	258	SET_TILE_INFO(
234	259	1,
r6740	r6741
239	264
240	265	static TILE_GET_INFO( get_text_info_bootleg )
241	266	{
242		//  UINT8 attributes = combasc_page[0][tile_index + 0x800];
243		int number = combasc_page[0][tile_index + 0xc00];
	267	combatsc_state *state = (combatsc_state *)machine->driver_data;
	268	//  UINT8 attributes = state->page[0][tile_index + 0x800];
	269	int number = state->page[0][tile_index + 0xc00];
244	270	int color = 16;// + (attributes & 0x0f);
245	271
246	272	SET_TILE_INFO(
r6740	r6741
256	282
257	283	***************************************************************************/
258	284
259		VIDEO_START( combasc )
	285	VIDEO_START( combatsc )
260	286	{
261		combasc_vreg = -1;
	287	combatsc_state *state = (combatsc_state *)machine->driver_data;
262	288
263		bg_tilemap[0] = tilemap_create(machine, get_tile_info0,tilemap_scan_rows,8,8,32,32);
264		bg_tilemap[1] = tilemap_create(machine, get_tile_info1,tilemap_scan_rows,8,8,32,32);
265		textlayer =  tilemap_create(machine, get_text_info, tilemap_scan_rows,     8,8,32,32);
	289	state->bg_tilemap[0] = tilemap_create(machine, get_tile_info0, tilemap_scan_rows, 8, 8, 32, 32);
	290	state->bg_tilemap[1] = tilemap_create(machine, get_tile_info1, tilemap_scan_rows, 8, 8, 32, 32);
	291	state->textlayer =  tilemap_create(machine, get_text_info, tilemap_scan_rows, 8, 8, 32, 32);
266	292
267		private_spriteram[0] = auto_alloc_array_clear(machine, UINT8, 0x800);
268		private_spriteram[1] = auto_alloc_array_clear(machine, UINT8, 0x800);
	293	state->spriteram[0] = auto_alloc_array_clear(machine, UINT8, 0x800);
	294	state->spriteram[1] = auto_alloc_array_clear(machine, UINT8, 0x800);
269	295
270		tilemap_set_transparent_pen(bg_tilemap[0],0);
271		tilemap_set_transparent_pen(bg_tilemap[1],0);
272		tilemap_set_transparent_pen(textlayer,0);
	296	tilemap_set_transparent_pen(state->bg_tilemap[0], 0);
	297	tilemap_set_transparent_pen(state->bg_tilemap[1], 0);
	298	tilemap_set_transparent_pen(state->textlayer, 0);
273	299
274		tilemap_set_scroll_rows(textlayer,32);
	300	tilemap_set_scroll_rows(state->textlayer, 32);
	301
	302	state_save_register_global_pointer(machine, state->spriteram[0], 0x800);
	303	state_save_register_global_pointer(machine, state->spriteram[1], 0x800);
275	304	}
276	305
277		VIDEO_START( combascb )
	306	VIDEO_START( combatscb )
278	307	{
279		combasc_vreg = -1;
	308	combatsc_state *state = (combatsc_state *)machine->driver_data;
280	309
281		bg_tilemap[0] = tilemap_create(machine, get_tile_info0_bootleg,tilemap_scan_rows,8,8,32,32);
282		bg_tilemap[1] = tilemap_create(machine, get_tile_info1_bootleg,tilemap_scan_rows,8,8,32,32);
283		textlayer =  tilemap_create(machine, get_text_info_bootleg, tilemap_scan_rows,8,8,32,32);
	310	state->bg_tilemap[0] = tilemap_create(machine, get_tile_info0_bootleg, tilemap_scan_rows, 8, 8, 32, 32);
	311	state->bg_tilemap[1] = tilemap_create(machine, get_tile_info1_bootleg, tilemap_scan_rows, 8, 8, 32, 32);
	312	state->textlayer = tilemap_create(machine, get_text_info_bootleg, tilemap_scan_rows, 8, 8, 32, 32);
284	313
285		private_spriteram[0] = auto_alloc_array_clear(machine, UINT8, 0x800);
286		private_spriteram[1] = auto_alloc_array_clear(machine, UINT8, 0x800);
	314	state->spriteram[0] = auto_alloc_array_clear(machine, UINT8, 0x800);
	315	state->spriteram[1] = auto_alloc_array_clear(machine, UINT8, 0x800);
287	316
288		tilemap_set_transparent_pen(bg_tilemap[0],0);
289		tilemap_set_transparent_pen(bg_tilemap[1],0);
290		tilemap_set_transparent_pen(textlayer,0);
	317	tilemap_set_transparent_pen(state->bg_tilemap[0], 0);
	318	tilemap_set_transparent_pen(state->bg_tilemap[1], 0);
	319	tilemap_set_transparent_pen(state->textlayer, 0);
291	320
292		tilemap_set_scroll_rows(bg_tilemap[0],32);
293		tilemap_set_scroll_rows(bg_tilemap[1],32);
	321	tilemap_set_scroll_rows(state->bg_tilemap[0], 32);
	322	tilemap_set_scroll_rows(state->bg_tilemap[1], 32);
	323
	324	state_save_register_global_pointer(machine, state->spriteram[0], 0x800);
	325	state_save_register_global_pointer(machine, state->spriteram[1], 0x800);
294	326	}
295	327
296	328	/***************************************************************************
r6740	r6741
299	331
300	332	***************************************************************************/
301	333
302		READ8_HANDLER( combasc_video_r )
	334	READ8_HANDLER( combatsc_video_r )
303	335	{
304		return space->machine->generic.videoram.u8[offset];
	336	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	337	return state->videoram[offset];
305	338	}
306	339
307		WRITE8_HANDLER( combasc_video_w )
	340	WRITE8_HANDLER( combatsc_video_w )
308	341	{
309		space->machine->generic.videoram.u8[offset] = data;
310		if( offset<0x800 )
	342	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	343	state->videoram[offset] = data;
	344
	345	if (offset < 0x800)
311	346	{
312		if (combasc_video_circuit)
313		tilemap_mark_tile_dirty(bg_tilemap[1],offset & 0x3ff);
	347	if (state->video_circuit)
	348	tilemap_mark_tile_dirty(state->bg_tilemap[1], offset & 0x3ff);
314	349	else
315		tilemap_mark_tile_dirty(bg_tilemap[0],offset & 0x3ff);
	350	tilemap_mark_tile_dirty(state->bg_tilemap[0], offset & 0x3ff);
316	351	}
317		else if( offset<0x1000 && combasc_video_circuit==0 )
	352	else if (offset < 0x1000 && state->video_circuit == 0)
318	353	{
319		tilemap_mark_tile_dirty( textlayer,offset & 0x3ff);
	354	tilemap_mark_tile_dirty(state->textlayer, offset & 0x3ff);
320	355	}
321	356	}
322	357
323
324		WRITE8_HANDLER( combasc_vreg_w )
	358	WRITE8_HANDLER( combatsc_pf_control_w )
325	359	{
326		if (data != combasc_vreg)
327		{
328		tilemap_mark_all_tiles_dirty( textlayer );
329		if ((data & 0x0f) != (combasc_vreg & 0x0f))
330		tilemap_mark_all_tiles_dirty( bg_tilemap[0] );
331		if ((data >> 4) != (combasc_vreg >> 4))
332		tilemap_mark_all_tiles_dirty( bg_tilemap[1] );
333		combasc_vreg = data;
334		}
335		}
	360	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	361	const device_config *k007121 = state->video_circuit ? state->k007121_2 : state->k007121_1;
	362	k007121_ctrl_w(k007121, offset, data);
336	363
337		static WRITE8_HANDLER( combascb_sh_irqtrigger_w )
338		{
339		soundlatch_w(space, offset, data);
340		cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
341		}
342
343		static READ8_HANDLER( combascb_io_r )
344		{
345		static const char *const portnames[] = { "IN0", "IN1", "DSW1", "DSW2" };
346
347		return input_port_read(space->machine, portnames[offset]);
348		}
349
350		static WRITE8_HANDLER( combascb_priority_w )
351		{
352		priority = data & 0x20;
353		}
354
355		WRITE8_HANDLER( combasc_bankselect_w )
356		{
357		UINT8 *page = memory_region(space->machine, "maincpu") + 0x10000;
358
359		if (data & 0x40)
360		{
361		combasc_video_circuit = 1;
362		space->machine->generic.videoram.u8 = combasc_page[1];
363		combasc_scrollram = combasc_scrollram1;
364		}
365		else
366		{
367		combasc_video_circuit = 0;
368		space->machine->generic.videoram.u8 = combasc_page[0];
369		combasc_scrollram = combasc_scrollram0;
370		}
371
372		priority = data & 0x20;
373
374		if (data & 0x10)
375		{
376		memory_set_bankptr(space->machine, "bank1",page + 0x4000 * ((data & 0x0e) >> 1));
377		}
378		else
379		{
380		memory_set_bankptr(space->machine, "bank1",page + 0x20000 + 0x4000 * (data & 1));
381		}
382		}
383
384		WRITE8_HANDLER( combascb_bankselect_w )
385		{
386		if (data & 0x40)
387		{
388		combasc_video_circuit = 1;
389		space->machine->generic.videoram.u8 = combasc_page[1];
390		}
391		else
392		{
393		combasc_video_circuit = 0;
394		space->machine->generic.videoram.u8 = combasc_page[0];
395		}
396
397		data = data & 0x1f;
398		if( data != combasc_bank_select )
399		{
400		UINT8 *page = memory_region(space->machine, "maincpu") + 0x10000;
401		combasc_bank_select = data;
402
403		if (data & 0x10)
404		{
405		memory_set_bankptr(space->machine, "bank1",page + 0x4000 * ((data & 0x0e) >> 1));
406		}
407		else
408		{
409		memory_set_bankptr(space->machine, "bank1",page + 0x20000 + 0x4000 * (data & 1));
410		}
411
412		if (data == 0x1f)
413		{
414		memory_set_bankptr(space->machine, "bank1",page + 0x20000 + 0x4000 * (data & 1));
415		memory_install_read8_handler(space, 0x4400, 0x4403, 0, 0, combascb_io_r);/* IO RAM & Video Registers */
416		memory_install_write8_handler(space, 0x4400, 0x4400, 0, 0, combascb_priority_w);
417		memory_install_write8_handler(space, 0x4800, 0x4800, 0, 0, combascb_sh_irqtrigger_w);
418		memory_install_write8_handler(space, 0x4c00, 0x4c00, 0, 0, combasc_vreg_w);
419		}
420		else
421		{
422		memory_install_read_bank(space, 0x4000, 0x7fff, 0, 0, "bank1");   /* banked ROM */
423		memory_unmap_write(space, 0x4000, 0x7fff, 0, 0);   /* banked ROM */
424		}
425		}
426		}
427
428		MACHINE_RESET( combasc )
429		{
430		UINT8 *MEM = memory_region(machine, "maincpu") + 0x38000;
431		const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
432
433		combasc_io_ram  = MEM + 0x0000;
434		combasc_page[0] = MEM + 0x4000;
435		combasc_page[1] = MEM + 0x6000;
436
437		memset( combasc_io_ram,  0x00, 0x4000 );
438		memset( combasc_page[0], 0x00, 0x2000 );
439		memset( combasc_page[1], 0x00, 0x2000 );
440
441		combasc_bank_select = -1;
442		combasc_bankselect_w(space, 0, 0);
443		}
444
445		WRITE8_HANDLER( combasc_pf_control_w )
446		{
447		K007121_ctrl_w(space->machine,combasc_video_circuit,offset,data);
448
449	364	if (offset == 7)
450		tilemap_set_flip(bg_tilemap[combasc_video_circuit],(data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
	365	tilemap_set_flip(state->bg_tilemap[state->video_circuit],(data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
451	366
452	367	if (offset == 3)
453	368	{
454	369	if (data & 0x08)
455		memcpy(private_spriteram[combasc_video_circuit],combasc_page[combasc_video_circuit]+0x1000,0x800);
	370	memcpy(state->spriteram[state->video_circuit], state->page[state->video_circuit] + 0x1000, 0x800);
456	371	else
457		memcpy(private_spriteram[combasc_video_circuit],combasc_page[combasc_video_circuit]+0x1800,0x800);
	372	memcpy(state->spriteram[state->video_circuit], state->page[state->video_circuit] + 0x1800, 0x800);
458	373	}
459	374	}
460	375
461		READ8_HANDLER( combasc_scrollram_r )
	376	READ8_HANDLER( combatsc_scrollram_r )
462	377	{
463		return combasc_scrollram[offset];
	378	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	379	return state->scrollram[offset];
464	380	}
465	381
466		WRITE8_HANDLER( combasc_scrollram_w )
	382	WRITE8_HANDLER( combatsc_scrollram_w )
467	383	{
468		combasc_scrollram[offset] = data;
	384	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	385	state->scrollram[offset] = data;
469	386	}
470	387
471	388
r6740	r6741
476	393
477	394	***************************************************************************/
478	395
479		static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, const UINT8 *source,int circuit,UINT32 pri_mask)
	396	static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, const UINT8 *source, int circuit, UINT32 pri_mask )
480	397	{
481		int base_color = (circuit*4)*16+(K007121_ctrlram[circuit][6]&0x10)*2;
	398	combatsc_state *state = (combatsc_state *)machine->driver_data;
	399	const device_config *k007121 = circuit ? state->k007121_2 : state->k007121_1;
	400	int base_color = (circuit * 4) * 16 + (k007121_ctrlram_r(k007121, 6) & 0x10) * 2;
482	401
483		K007121_sprites_draw(circuit,bitmap,cliprect,machine->gfx,machine->colortable,source,base_color,0,0,pri_mask);
	402	k007121_sprites_draw(k007121, bitmap, cliprect, machine->gfx[circuit], machine->colortable, source, base_color, 0, 0, pri_mask);
484	403	}
485	404
486	405
487		VIDEO_UPDATE( combasc )
	406	VIDEO_UPDATE( combatsc )
488	407	{
	408	combatsc_state *state = (combatsc_state *)screen->machine->driver_data;
489	409	int i;
490	410
491	411	set_pens(screen->machine);
492	412
493		if (K007121_ctrlram[0][0x01] & 0x02)
	413	if (k007121_ctrlram_r(state->k007121_1, 1) & 0x02)
494	414	{
495		tilemap_set_scroll_rows(bg_tilemap[0],32);
496		for (i = 0;i < 32;i++)
497		tilemap_set_scrollx(bg_tilemap[0],i,combasc_scrollram0[i]);
	415	tilemap_set_scroll_rows(state->bg_tilemap[0], 32);
	416	for (i = 0; i < 32; i++)
	417	tilemap_set_scrollx(state->bg_tilemap[0], i, state->scrollram0[i]);
498	418	}
499	419	else
500	420	{
501		tilemap_set_scroll_rows(bg_tilemap[0],1);
502		tilemap_set_scrollx(bg_tilemap[0],0,K007121_ctrlram[0][0x00] | ((K007121_ctrlram[0][0x01] & 0x01) << 8));
	421	tilemap_set_scroll_rows(state->bg_tilemap[0], 1);
	422	tilemap_set_scrollx(state->bg_tilemap[0], 0, k007121_ctrlram_r(state->k007121_1, 0) | ((k007121_ctrlram_r(state->k007121_1, 1) & 0x01) << 8));
503	423	}
504	424
505		if (K007121_ctrlram[1][0x01] & 0x02)
	425	if (k007121_ctrlram_r(state->k007121_2, 1) & 0x02)
506	426	{
507		tilemap_set_scroll_rows(bg_tilemap[1],32);
508		for (i = 0;i < 32;i++)
509		tilemap_set_scrollx(bg_tilemap[1],i,combasc_scrollram1[i]);
	427	tilemap_set_scroll_rows(state->bg_tilemap[1], 32);
	428	for (i = 0; i < 32; i++)
	429	tilemap_set_scrollx(state->bg_tilemap[1], i, state->scrollram1[i]);
510	430	}
511	431	else
512	432	{
513		tilemap_set_scroll_rows(bg_tilemap[1],1);
514		tilemap_set_scrollx(bg_tilemap[1],0,K007121_ctrlram[1][0x00] | ((K007121_ctrlram[1][0x01] & 0x01) << 8));
	433	tilemap_set_scroll_rows(state->bg_tilemap[1], 1);
	434	tilemap_set_scrollx(state->bg_tilemap[1], 0, k007121_ctrlram_r(state->k007121_2, 0) | ((k007121_ctrlram_r(state->k007121_2, 1) & 0x01) << 8));
515	435	}
516	436
517		tilemap_set_scrolly(bg_tilemap[0],0,K007121_ctrlram[0][0x02]);
518		tilemap_set_scrolly(bg_tilemap[1],0,K007121_ctrlram[1][0x02]);
	437	tilemap_set_scrolly(state->bg_tilemap[0], 0, k007121_ctrlram_r(state->k007121_1, 2));
	438	tilemap_set_scrolly(state->bg_tilemap[1], 0, k007121_ctrlram_r(state->k007121_2, 2));
519	439
520		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
	440	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
521	441
522		if (priority == 0)
	442	if (state->priority == 0)
523	443	{
524		tilemap_draw(bitmap,cliprect,bg_tilemap[1],TILEMAP_DRAW_OPAQUE|0,4);
525		tilemap_draw(bitmap,cliprect,bg_tilemap[1],TILEMAP_DRAW_OPAQUE|1,8);
526		tilemap_draw(bitmap,cliprect,bg_tilemap[0],0,1);
527		tilemap_draw(bitmap,cliprect,bg_tilemap[0],1,2);
	444	tilemap_draw(bitmap, cliprect, state->bg_tilemap[1], TILEMAP_DRAW_OPAQUE | 0, 4);
	445	tilemap_draw(bitmap, cliprect, state->bg_tilemap[1], TILEMAP_DRAW_OPAQUE | 1, 8);
	446	tilemap_draw(bitmap, cliprect, state->bg_tilemap[0], 0, 1);
	447	tilemap_draw(bitmap, cliprect, state->bg_tilemap[0], 1, 2);
528	448
529	449	/* we use the priority buffer so sprites are drawn front to back */
530		draw_sprites(screen->machine,bitmap,cliprect,private_spriteram[1],1,0x0f00);
531		draw_sprites(screen->machine,bitmap,cliprect,private_spriteram[0],0,0x4444);
	450	draw_sprites(screen->machine, bitmap, cliprect, state->spriteram[1], 1, 0x0f00);
	451	draw_sprites(screen->machine, bitmap, cliprect, state->spriteram[0], 0, 0x4444);
532	452	}
533	453	else
534	454	{
535		tilemap_draw(bitmap,cliprect,bg_tilemap[0],TILEMAP_DRAW_OPAQUE|0,1);
536		tilemap_draw(bitmap,cliprect,bg_tilemap[0],TILEMAP_DRAW_OPAQUE|1,2);
537		tilemap_draw(bitmap,cliprect,bg_tilemap[1],1,4);
538		tilemap_draw(bitmap,cliprect,bg_tilemap[1],0,8);
	455	tilemap_draw(bitmap, cliprect, state->bg_tilemap[0], TILEMAP_DRAW_OPAQUE | 0, 1);
	456	tilemap_draw(bitmap, cliprect, state->bg_tilemap[0], TILEMAP_DRAW_OPAQUE | 1, 2);
	457	tilemap_draw(bitmap, cliprect, state->bg_tilemap[1], 1, 4);
	458	tilemap_draw(bitmap, cliprect, state->bg_tilemap[1], 0, 8);
539	459
540	460	/* we use the priority buffer so sprites are drawn front to back */
541		draw_sprites(screen->machine,bitmap,cliprect,private_spriteram[1],1,0x0f00);
542		draw_sprites(screen->machine,bitmap,cliprect,private_spriteram[0],0,0x4444);
	461	draw_sprites(screen->machine, bitmap, cliprect, state->spriteram[1], 1, 0x0f00);
	462	draw_sprites(screen->machine, bitmap, cliprect, state->spriteram[0], 0, 0x4444);
543	463	}
544	464
545		if (K007121_ctrlram[0][0x01] & 0x08)
	465	if (k007121_ctrlram_r(state->k007121_1, 1) & 0x08)
546	466	{
547		for (i = 0;i < 32;i++)
	467	for (i = 0; i < 32; i++)
548	468	{
549		tilemap_set_scrollx(textlayer,i,combasc_scrollram0[0x20+i] ? 0 : TILE_LINE_DISABLED);
550		tilemap_draw(bitmap,cliprect,textlayer,0,0);
	469	tilemap_set_scrollx(state->textlayer, i, state->scrollram0[0x20 + i] ? 0 : TILE_LINE_DISABLED);
	470	tilemap_draw(bitmap, cliprect, state->textlayer, 0, 0);
551	471	}
552	472	}
553	473
554	474	/* chop the extreme columns if necessary */
555		if (K007121_ctrlram[0][0x03] & 0x40)
	475	if (k007121_ctrlram_r(state->k007121_1, 3) & 0x40)
556	476	{
557	477	rectangle clip;
558	478
559	479	clip = *cliprect;
560	480	clip.max_x = clip.min_x + 7;
561		bitmap_fill(bitmap,&clip,0);
	481	bitmap_fill(bitmap, &clip, 0);
562	482
563	483	clip = *cliprect;
564	484	clip.min_x = clip.max_x - 7;
565		bitmap_fill(bitmap,&clip,0);
	485	bitmap_fill(bitmap, &clip, 0);
566	486	}
567	487	return 0;
568	488	}
r6740	r6741
595	515
596	516	***************************************************************************/
597	517
598		static void bootleg_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, const UINT8 *source, int circuit )
	518	static void bootleg_draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, const UINT8 *source, int circuit )
599	519	{
600	520	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
601		const gfx_element *gfx = machine->gfx[circuit+2];
	521	const gfx_element *gfx = machine->gfx[circuit + 2];
602	522
603		int limit = ( circuit) ? (memory_read_byte(space, 0xc2)*256 + memory_read_byte(space, 0xc3)) : (memory_read_byte(space, 0xc0)*256 + memory_read_byte(space, 0xc1));
	523	int limit = circuit ? (memory_read_byte(space, 0xc2) * 256 + memory_read_byte(space, 0xc3)) : (memory_read_byte(space, 0xc0) * 256 + memory_read_byte(space, 0xc1));
604	524	const UINT8 *finish;
605	525
606		source+=0x1000;
	526	source += 0x1000;
607	527	finish = source;
608		source+=0x400;
609		limit = (0x3400-limit)/8;
610		if( limit>=0 ) finish = source-limit*8;
611		source-=8;
	528	source += 0x400;
	529	limit = (0x3400 - limit) / 8;
	530	if (limit >= 0)
	531	finish = source - limit * 8;
	532	source -= 8;
612	533
613		while( source>finish )
	534	while (source > finish)
614	535	{
615	536	UINT8 attributes = source[3]; /* PBxF ?xxX */
616	537	{
r6740	r6741
622	543	int bank = (color & 0x03) | ((attributes & 0x40) >> 4);
623	544
624	545	number = ((number & 0x02) << 1) | ((number & 0x04) >> 1) | (number & (~6));
625		number += 256*bank;
	546	number += 256 * bank;
626	547
627		color = (circuit*4)*16 + (color >> 4);
	548	color = (circuit * 4) * 16 + (color >> 4);
628	549
629	550	/*  hacks to select alternate palettes */
630		//          if(combasc_vreg == 0x40 && (attributes & 0x40)) color += 1*16;
631		//          if(combasc_vreg == 0x23 && (attributes & 0x02)) color += 1*16;
632		//          if(combasc_vreg == 0x66 ) color += 2*16;
	551	//          if(state->vreg == 0x40 && (attributes & 0x40)) color += 1*16;
	552	//          if(state->vreg == 0x23 && (attributes & 0x02)) color += 1*16;
	553	//          if(state->vreg == 0x66 ) color += 2*16;
633	554
634	555	drawgfx_transpen( bitmap, cliprect, gfx,
635	556	number, color,
r6740	r6741
640	561	}
641	562	}
642	563
643		VIDEO_UPDATE( combascb )
	564	VIDEO_UPDATE( combatscb )
644	565	{
	566	combatsc_state *state = (combatsc_state *)screen->machine->driver_data;
645	567	int i;
646	568
647	569	set_pens(screen->machine);
648	570
649		for( i=0; i<32; i++ )
	571	for (i = 0; i < 32; i++)
650	572	{
651		tilemap_set_scrollx( bg_tilemap[0],i, combasc_io_ram[0x040+i]+5 );
652		tilemap_set_scrollx( bg_tilemap[1],i, combasc_io_ram[0x060+i]+3 );
	573	tilemap_set_scrollx(state->bg_tilemap[0], i, state->io_ram[0x040 + i] + 5);
	574	tilemap_set_scrollx(state->bg_tilemap[1], i, state->io_ram[0x060 + i] + 3);
653	575	}
654		tilemap_set_scrolly( bg_tilemap[0],0, combasc_io_ram[0x000] );
655		tilemap_set_scrolly( bg_tilemap[1],0, combasc_io_ram[0x020] );
	576	tilemap_set_scrolly(state->bg_tilemap[0], 0, state->io_ram[0x000]);
	577	tilemap_set_scrolly(state->bg_tilemap[1], 0, state->io_ram[0x020]);
656	578
657		if (priority == 0)
	579	if (state->priority == 0)
658	580	{
659		tilemap_draw( bitmap,cliprect,bg_tilemap[1],TILEMAP_DRAW_OPAQUE,0);
660		bootleg_draw_sprites(screen->machine, bitmap,cliprect, combasc_page[1], 1 );
	581	tilemap_draw(bitmap, cliprect, state->bg_tilemap[1], TILEMAP_DRAW_OPAQUE,0);
	582	bootleg_draw_sprites(screen->machine, bitmap,cliprect, state->page[1], 1);
661	583
662		tilemap_draw( bitmap,cliprect,bg_tilemap[0],0 ,0);
663		bootleg_draw_sprites(screen->machine, bitmap,cliprect, combasc_page[0], 0 );
	584	tilemap_draw(bitmap, cliprect, state->bg_tilemap[0], 0 ,0);
	585	bootleg_draw_sprites(screen->machine, bitmap, cliprect, state->page[0], 0);
664	586	}
665	587	else
666	588	{
667		tilemap_draw( bitmap,cliprect,bg_tilemap[0],TILEMAP_DRAW_OPAQUE,0);
668		bootleg_draw_sprites(screen->machine, bitmap,cliprect, combasc_page[0], 0 );
	589	tilemap_draw(bitmap, cliprect, state->bg_tilemap[0], TILEMAP_DRAW_OPAQUE, 0);
	590	bootleg_draw_sprites(screen->machine, bitmap,cliprect, state->page[0], 0);
669	591
670		tilemap_draw( bitmap,cliprect,bg_tilemap[1],0 ,0);
671		bootleg_draw_sprites(screen->machine, bitmap,cliprect, combasc_page[1], 1 );
	592	tilemap_draw(bitmap,cliprect, state->bg_tilemap[1], 0, 0);
	593	bootleg_draw_sprites(screen->machine, bitmap,cliprect, state->page[1], 1);
672	594	}
673	595
674		tilemap_draw( bitmap,cliprect,textlayer,0,0);
	596	tilemap_draw(bitmap, cliprect, state->textlayer, 0, 0);
675	597	return 0;
676	598	}

src/mame/video/blueprnt.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "blueprnt.h"
	8	#include "includes/blueprnt.h"
9	9
10	10
11	11	/***************************************************************************

src/mame/video/rockrage.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
	3	#include "includes/rockrage.h"
3	4
4		static int layer_colorbase[2];
5		static int rockrage_vreg;
6
7
8	5	PALETTE_INIT( rockrage )
9	6	{
10	7	int i;
r6740	r6741
30	27	}
31	28
32	29
33		static void set_pens(running_machine *machine)
	30	static void set_pens( running_machine *machine )
34	31	{
	32	rockrage_state *state = (rockrage_state *)machine->driver_data;
35	33	int i;
36	34
37	35	for (i = 0x00; i < 0x80; i += 2)
38	36	{
39		UINT16 data = machine->generic.paletteram.u8[i] | (machine->generic.paletteram.u8[i | 1] << 8);
	37	UINT16 data = state->paletteram[i] | (state->paletteram[i | 1] << 8);
40	38
41	39	rgb_t color = MAKE_RGB(pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
42	40
r6740	r6741
51	49
52	50	***************************************************************************/
53	51
54		static void tile_callback(int layer, int bank, int *code, int *color, int *flags)
	52	void rockrage_tile_callback( running_machine *machine, int layer, int bank, int *code, int *color, int *flags )
55	53	{
	54	rockrage_state *state = (rockrage_state *)machine->driver_data;
	55
56	56	if (layer == 1)
57	57	*code |= ((*color & 0x40) << 2) | ((bank & 0x01) << 9);
58	58	else
59		*code |= ((*color & 0x40) << 2) | ((bank & 0x03) << 10) | ((rockrage_vreg & 0x04) << 7) | ((rockrage_vreg & 0x08) << 9);
60		*color = layer_colorbase[layer] + (*color & 0x0f);
	59	*code |= ((*color & 0x40) << 2) | ((bank & 0x03) << 10) | ((state->vreg & 0x04) << 7) | ((state->vreg & 0x08) << 9);
	60	*color = state->layer_colorbase[layer] + (*color & 0x0f);
61	61	}
62	62
63	63	/***************************************************************************
r6740	r6741
66	66
67	67	***************************************************************************/
68	68
69		static void sprite_callback(int *code,int *color)
	69	void rockrage_sprite_callback( running_machine *machine, int *code, int *color )
70	70	{
71		*code |= ((*color & 0x40) << 2) | ((*color & 0x80) << 1)*((rockrage_vreg & 0x03) << 1);
	71	rockrage_state *state = (rockrage_state *)machine->driver_data;
	72
	73	*code |= ((*color & 0x40) << 2) | ((*color & 0x80) << 1) * ((state->vreg & 0x03) << 1);
72	74	*code = (*code << 2) | ((*color & 0x30) >> 4);
73	75	*color = 0;
74	76	}
75	77
76	78
77		WRITE8_HANDLER( rockrage_vreg_w ){
	79	WRITE8_HANDLER( rockrage_vreg_w )
	80	{
78	81	/* bits 4-7: unused */
79	82	/* bit 3: bit 4 of bank # (layer 0) */
80	83	/* bit 2: bit 1 of bank # (layer 0) */
81	84	/* bits 0-1: sprite bank select */
	85	rockrage_state *state = (rockrage_state *)space->machine->driver_data;
82	86
83		if ((data & 0x0c) != (rockrage_vreg & 0x0c))
	87	if ((data & 0x0c) != (state->vreg & 0x0c))
84	88	tilemap_mark_all_tiles_dirty_all(space->machine);
85	89
86		rockrage_vreg = data;
	90	state->vreg = data;
87	91	}
88	92
89	93	/***************************************************************************
90	94
91		Start the video hardware emulation.
92
93		***************************************************************************/
94
95		VIDEO_START( rockrage )
96		{
97		layer_colorbase[0] = 0x00;
98		layer_colorbase[1] = 0x10;
99
100		K007342_vh_start(machine,0,tile_callback);
101		K007420_vh_start(machine,1,sprite_callback);
102
103		K007420_set_banklimit(0x3ff); // bladestl and battlnts may also need this
104		}
105
106
107		/***************************************************************************
108
109	95	Screen Refresh
110	96
111	97	***************************************************************************/
112	98
113	99	VIDEO_UPDATE( rockrage )
114	100	{
	101	rockrage_state *state = (rockrage_state *)screen->machine->driver_data;
	102
115	103	set_pens(screen->machine);
116	104
117		K007342_tilemap_update();
	105	k007342_tilemap_update(state->k007342);
118	106
119		K007342_tilemap_draw(bitmap,cliprect, 0, TILEMAP_DRAW_OPAQUE ,0);
120		K007420_sprites_draw(bitmap,cliprect );
121		K007342_tilemap_draw(bitmap,cliprect, 0, 1 | TILEMAP_DRAW_OPAQUE ,0);
122		K007342_tilemap_draw(bitmap,cliprect, 1, 0 ,0);
123		K007342_tilemap_draw(bitmap,cliprect, 1, 1 ,0);
	107	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 0, TILEMAP_DRAW_OPAQUE, 0);
	108	k007420_sprites_draw(state->k007420, bitmap, cliprect, screen->machine->gfx[1]);
	109	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 0, 1 | TILEMAP_DRAW_OPAQUE, 0);
	110	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 1, 0, 0);
	111	k007342_tilemap_draw(state->k007342, bitmap, cliprect, 1, 1, 0);
124	112	return 0;
125	113	}

src/mame/video/pandoras.c

r6740	r6741
1	1	#include "driver.h"
2		#include "pandoras.h"
	2	#include "includes/pandoras.h"
3	3	#include "video/resnet.h"
4	4
5	5	/***********************************************************************

src/mame/video/n64.c

r6740	r6741
783	783	//vibuffering = 0; // Disabled for now
784	784
785	785	/*
786		if (vibuffering && ((n64_vi_control & 3) == 2))
787		{
788		if (frame_buffer)
789		{
790		for (j=0; j < vres; j++)
791		{
792		for (i=0; i < hres; i++)
793		{
794		UINT16 pix;
795		pix = frame_buffer[pixels ^ WORD_ADDR_XOR];
796		curpixel_cvg = ((pix & 1) << 2) | (hidden_buffer[pixels ^ BYTE_ADDR_XOR] & 3); // Reuse of this variable
797		if (curpixel_cvg < 7 && i > 1 && j > 1 && i < (hres - 2) && j < (vres - 2) && fsaa)
798		{
799		newc = video_filter16(&frame_buffer[pixels ^ WORD_ADDR_XOR], &hidden_buffer[pixels ^ BYTE_ADDR_XOR], n64_vi_width);
800		ViBuffer[i][j] = newc;
801		}
802		else
803		{
804		newc.i.r = ((pix >> 8) & 0xf8) | (pix >> 13);
805		newc.i.g = ((pix >> 3) & 0xf8) | ((pix >>  8) & 0x07);
806		newc.i.b = ((pix << 2) & 0xf8) | ((pix >>  3) & 0x07);
807		ViBuffer[i][j] = newc;
808		}
809		pixels++;
810		}
811		pixels += invisiblewidth;
812		}
813		}
814		}
815		*/
	786	if (vibuffering && ((n64_vi_control & 3) == 2))
	787	{
	788	if (frame_buffer)
	789	{
	790	for (j=0; j < vres; j++)
	791	{
	792	for (i=0; i < hres; i++)
	793	{
	794	UINT16 pix;
	795	pix = frame_buffer[pixels ^ WORD_ADDR_XOR];
	796	curpixel_cvg = ((pix & 1) << 2) | (hidden_buffer[pixels ^ BYTE_ADDR_XOR] & 3); // Reuse of this variable
	797	if (curpixel_cvg < 7 && i > 1 && j > 1 && i < (hres - 2) && j < (vres - 2) && fsaa)
	798	{
	799	newc = video_filter16(&frame_buffer[pixels ^ WORD_ADDR_XOR], &hidden_buffer[pixels ^ BYTE_ADDR_XOR], n64_vi_width);
	800	ViBuffer[i][j] = newc;
	801	}
	802	else
	803	{
	804	newc.i.r = ((pix >> 8) & 0xf8) | (pix >> 13);
	805	newc.i.g = ((pix >> 3) & 0xf8) | ((pix >>  8) & 0x07);
	806	newc.i.b = ((pix << 2) & 0xf8) | ((pix >>  3) & 0x07);
	807	ViBuffer[i][j] = newc;
	808	}
	809	pixels++;
	810	}
	811	pixels += invisiblewidth;
	812	}
	813	}
	814	}
	815	*/
816	816
817	817	if (n64_vi_blank)
818	818	{
r6740	r6741
1301	1301	#define XOR_SWAP_DWORD   1
1302	1302
1303	1303	/*
1304		UINT32 twidth = tile[tilenum].line;
1305		UINT32 tbase = tile[tilenum].tmem;
1306		UINT32 tpal = tile[tilenum].palette & 0xf;
	1304	UINT32 twidth = tile[tilenum].line;
	1305	UINT32 tbase = tile[tilenum].tmem;
	1306	UINT32 tpal = tile[tilenum].palette & 0xf;
1307	1307
1308		if (t < 0) t = 0;
1309		if (s < 0) s = 0;
	1308	if (t < 0) t = 0;
	1309	if (s < 0) s = 0;
1310	1310	*/
1311	1311
1312	1312	static INT32 tbase;
r6740	r6741
2848	2848	/*
2849	2849	static void triangle(UINT32 w1, UINT32 w2, int shade, int texture, int zbuffer)
2850	2850	{
2851		int j;
2852		int xleft, xright, xleft_inc, xright_inc;
2853		int xstart, xend;
2854		int r = 0, g = 0, b = 0, a = 0, z = 0, s = 0, t = 0, w = 0;
2855		int dr, dg, db, da;
2856		int drdx = 0, dgdx = 0, dbdx = 0, dadx = 0, dzdx = 0, dsdx = 0, dtdx = 0, dwdx = 0;
2857		int drdy = 0, dgdy = 0, dbdy = 0, dady = 0, dzdy = 0, dsdy = 0, dtdy = 0, dwdy = 0;
2858		int drde = 0, dgde = 0, dbde = 0, dade = 0, dzde = 0, dsde = 0, dtde = 0, dwde = 0;
2859		int tilenum;
2860		int flip = (w1 & 0x800000) ? 1 : 0;
	2851	int j;
	2852	int xleft, xright, xleft_inc, xright_inc;
	2853	int xstart, xend;
	2854	int r = 0, g = 0, b = 0, a = 0, z = 0, s = 0, t = 0, w = 0;
	2855	int dr, dg, db, da;
	2856	int drdx = 0, dgdx = 0, dbdx = 0, dadx = 0, dzdx = 0, dsdx = 0, dtdx = 0, dwdx = 0;
	2857	int drdy = 0, dgdy = 0, dbdy = 0, dady = 0, dzdy = 0, dsdy = 0, dtdy = 0, dwdy = 0;
	2858	int drde = 0, dgde = 0, dbde = 0, dade = 0, dzde = 0, dsde = 0, dtde = 0, dwde = 0;
	2859	int tilenum;
	2860	int flip = (w1 & 0x800000) ? 1 : 0;
2861	2861
2862		INT32 yl, ym, yh;
2863		INT32 xl, xm, xh;
2864		INT32 dxldy, dxhdy, dxmdy;
2865		int dzdy_dz, dzdx_dz;
2866		int dsdylod, dtdylod;
2867		UINT32 w3, w4, w5, w6, w7, w8;
	2862	INT32 yl, ym, yh;
	2863	INT32 xl, xm, xh;
	2864	INT32 dxldy, dxhdy, dxmdy;
	2865	int dzdy_dz, dzdx_dz;
	2866	int dsdylod, dtdylod;
	2867	UINT32 w3, w4, w5, w6, w7, w8;
2868	2868
2869		int k = 0;
	2869	int k = 0;
2870	2870
2871		INT32 limcvg = 0;
2872		INT32 startcvg = 0;
	2871	INT32 limcvg = 0;
	2872	INT32 startcvg = 0;
2873	2873
2874		int sign_dxldy = 0;
2875		int sign_dxmdy = 0;
2876		int samesign = 0;
	2874	int sign_dxldy = 0;
	2875	int sign_dxmdy = 0;
	2876	int samesign = 0;
2877	2877
2878		int dsdiff = 0, dtdiff = 0, dwdiff = 0, drdiff = 0, dgdiff = 0, dbdiff = 0, dadiff = 0, dzdiff = 0;
2879		int sign_dxhdy = 0;
	2878	int dsdiff = 0, dtdiff = 0, dwdiff = 0, drdiff = 0, dgdiff = 0, dbdiff = 0, dadiff = 0, dzdiff = 0;
	2879	int sign_dxhdy = 0;
2880	2880
2881		int dsdeh = 0, dtdeh = 0, dwdeh = 0, drdeh = 0, dgdeh = 0, dbdeh = 0, dadeh = 0, dzdeh = 0, dsdyh = 0, dtdyh = 0, dwdyh = 0, drdyh = 0, dgdyh = 0, dbdyh = 0, dadyh = 0, dzdyh = 0;
2882		int do_offset = 0;
	2881	int dsdeh = 0, dtdeh = 0, dwdeh = 0, drdeh = 0, dgdeh = 0, dbdeh = 0, dadeh = 0, dzdeh = 0, dsdyh = 0, dtdyh = 0, dwdyh = 0, drdyh = 0, dgdyh = 0, dbdyh = 0, dadyh = 0, dzdyh = 0;
	2882	int do_offset = 0;
2883	2883
2884		int xfrac = 0;
2885		int dseoff = 0, dteoff = 0, dweoff = 0, dreoff = 0, dgeoff = 0, dbeoff = 0, daeoff = 0, dzeoff = 0;
	2884	int xfrac = 0;
	2885	int dseoff = 0, dteoff = 0, dweoff = 0, dreoff = 0, dgeoff = 0, dbeoff = 0, daeoff = 0, dzeoff = 0;
2886	2886
2887		int dsdxh = 0, dtdxh = 0, dwdxh = 0, drdxh = 0, dgdxh = 0, dbdxh = 0, dadxh = 0, dzdxh = 0;
	2887	int dsdxh = 0, dtdxh = 0, dwdxh = 0, drdxh = 0, dgdxh = 0, dbdxh = 0, dadxh = 0, dzdxh = 0;
2888	2888
2889		int m_inc;
2890		UINT32 min=0, max=3;
2891		INT32 maxxmx = 0, minxmx = 0, maxxhx = 0, minxhx = 0;
	2889	int m_inc;
	2890	UINT32 min=0, max=3;
	2891	INT32 maxxmx = 0, minxmx = 0, maxxhx = 0, minxhx = 0;
2892	2892
2893		int spix = 0; // Current subpixel
2894		int ycur;
2895		int ylfar;
2896		int ldflag;
2897		int yhpix;
2898		int ympix;
2899		int ylpix;
	2893	int spix = 0; // Current subpixel
	2894	int ycur;
	2895	int ylfar;
	2896	int ldflag;
	2897	int yhpix;
	2898	int ympix;
	2899	int ylpix;
2900	2900
2901		int shade_base = rdp_cmd_cur + 8;
2902		int texture_base = rdp_cmd_cur + 8;
2903		int zbuffer_base = rdp_cmd_cur + 8;
	2901	int shade_base = rdp_cmd_cur + 8;
	2902	int texture_base = rdp_cmd_cur + 8;
	2903	int zbuffer_base = rdp_cmd_cur + 8;
2904	2904
2905		if (shade)
2906		{
2907		texture_base += 16;
2908		zbuffer_base += 16;
2909		}
2910		if (texture)
2911		{
2912		zbuffer_base += 16;
2913		}
	2905	if (shade)
	2906	{
	2907	texture_base += 16;
	2908	zbuffer_base += 16;
	2909	}
	2910	if (texture)
	2911	{
	2912	zbuffer_base += 16;
	2913	}
2914	2914
2915		w3 = rdp_cmd_data[rdp_cmd_cur+2];
2916		w4 = rdp_cmd_data[rdp_cmd_cur+3];
2917		w5 = rdp_cmd_data[rdp_cmd_cur+4];
2918		w6 = rdp_cmd_data[rdp_cmd_cur+5];
2919		w7 = rdp_cmd_data[rdp_cmd_cur+6];
2920		w8 = rdp_cmd_data[rdp_cmd_cur+7];
	2915	w3 = rdp_cmd_data[rdp_cmd_cur+2];
	2916	w4 = rdp_cmd_data[rdp_cmd_cur+3];
	2917	w5 = rdp_cmd_data[rdp_cmd_cur+4];
	2918	w6 = rdp_cmd_data[rdp_cmd_cur+5];
	2919	w7 = rdp_cmd_data[rdp_cmd_cur+6];
	2920	w8 = rdp_cmd_data[rdp_cmd_cur+7];
2921	2921
2922		yl = (w1 & 0x3fff);
2923		ym = ((w2 >> 16) & 0x3fff);
2924		yh = ((w2 >>  0) & 0x3fff);
2925		xl = (INT32)(w3 & 0x3fffffff);
2926		xh = (INT32)(w5 & 0x3fffffff);
2927		xm = (INT32)(w7 & 0x3fffffff);
2928		// Inverse slopes in 16.16 format
2929		dxldy = (INT32)(w4);
2930		dxhdy = (INT32)(w6);
2931		dxmdy = (INT32)(w8);
	2922	yl = (w1 & 0x3fff);
	2923	ym = ((w2 >> 16) & 0x3fff);
	2924	yh = ((w2 >>  0) & 0x3fff);
	2925	xl = (INT32)(w3 & 0x3fffffff);
	2926	xh = (INT32)(w5 & 0x3fffffff);
	2927	xm = (INT32)(w7 & 0x3fffffff);
	2928	// Inverse slopes in 16.16 format
	2929	dxldy = (INT32)(w4);
	2930	dxhdy = (INT32)(w6);
	2931	dxmdy = (INT32)(w8);
2932	2932
2933		max_level = ((w1 >> 19) & 7);
2934		tilenum = (w1 >> 16) & 0x7;
	2933	max_level = ((w1 >> 19) & 7);
	2934	tilenum = (w1 >> 16) & 0x7;
2935	2935
2936		if (yl & 0x2000)  yl |= 0xffffc000;
2937		if (ym & 0x2000)  ym |= 0xffffc000;
2938		if (yh & 0x2000)  yh |= 0xffffc000;
	2936	if (yl & 0x2000)  yl |= 0xffffc000;
	2937	if (ym & 0x2000)  ym |= 0xffffc000;
	2938	if (yh & 0x2000)  yh |= 0xffffc000;
2939	2939
2940		if (xl & 0x20000000)  xl |= 0xc0000000;
2941		if (xm & 0x20000000)  xm |= 0xc0000000;
2942		if (xh & 0x20000000)  xh |= 0xc0000000;
	2940	if (xl & 0x20000000)  xl |= 0xc0000000;
	2941	if (xm & 0x20000000)  xm |= 0xc0000000;
	2942	if (xh & 0x20000000)  xh |= 0xc0000000;
2943	2943
2944		z = 0;
2945		s = 0;   t = 0;   w = 0;
2946		dr = 0;      dg = 0;      db = 0;      da = 0;
	2944	z = 0;
	2945	s = 0;  t = 0;  w = 0;
	2946	dr = 0;     dg = 0;     db = 0;     da = 0;
2947	2947
2948		if (shade)
2949		{
2950		r    = (rdp_cmd_data[shade_base+0 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+4 ] >> 16) & 0x0000ffff);
2951		g    = ((rdp_cmd_data[shade_base+0 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+4 ] & 0x0000ffff);
2952		b    = (rdp_cmd_data[shade_base+1 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+5 ] >> 16) & 0x0000ffff);
2953		a    = ((rdp_cmd_data[shade_base+1 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+5 ] & 0x0000ffff);
2954		drdx = (rdp_cmd_data[shade_base+2 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+6 ] >> 16) & 0x0000ffff);
2955		dgdx = ((rdp_cmd_data[shade_base+2 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+6 ] & 0x0000ffff);
2956		dbdx = (rdp_cmd_data[shade_base+3 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+7 ] >> 16) & 0x0000ffff);
2957		dadx = ((rdp_cmd_data[shade_base+3 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+7 ] & 0x0000ffff);
2958		drde = (rdp_cmd_data[shade_base+8 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+12] >> 16) & 0x0000ffff);
2959		dgde = ((rdp_cmd_data[shade_base+8 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+12] & 0x0000ffff);
2960		dbde = (rdp_cmd_data[shade_base+9 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+13] >> 16) & 0x0000ffff);
2961		dade = ((rdp_cmd_data[shade_base+9 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+13] & 0x0000ffff);
2962		drdy = (rdp_cmd_data[shade_base+10] & 0xffff0000) | ((rdp_cmd_data[shade_base+14] >> 16) & 0x0000ffff);
2963		dgdy = ((rdp_cmd_data[shade_base+10] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+14] & 0x0000ffff);
2964		dbdy = (rdp_cmd_data[shade_base+11] & 0xffff0000) | ((rdp_cmd_data[shade_base+15] >> 16) & 0x0000ffff);
2965		dady = ((rdp_cmd_data[shade_base+11] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+15] & 0x0000ffff);
2966		}
2967		if (texture)
2968		{
2969		s    = (rdp_cmd_data[texture_base+0 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+4 ] >> 16) & 0x0000ffff);
2970		t    = ((rdp_cmd_data[texture_base+0 ] << 16) & 0xffff0000)   | (rdp_cmd_data[texture_base+4 ] & 0x0000ffff);
2971		w    = (rdp_cmd_data[texture_base+1 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+5 ] >> 16) & 0x0000ffff);
2972		dsdx = (rdp_cmd_data[texture_base+2 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+6 ] >> 16) & 0x0000ffff);
2973		dtdx = ((rdp_cmd_data[texture_base+2 ] << 16) & 0xffff0000)   | (rdp_cmd_data[texture_base+6 ] & 0x0000ffff);
2974		dwdx = (rdp_cmd_data[texture_base+3 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+7 ] >> 16) & 0x0000ffff);
2975		dsde = (rdp_cmd_data[texture_base+8 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+12] >> 16) & 0x0000ffff);
2976		dtde = ((rdp_cmd_data[texture_base+8 ] << 16) & 0xffff0000)   | (rdp_cmd_data[texture_base+12] & 0x0000ffff);
2977		dwde = (rdp_cmd_data[texture_base+9 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+13] >> 16) & 0x0000ffff);
2978		dsdy = (rdp_cmd_data[texture_base+10] & 0xffff0000) | ((rdp_cmd_data[texture_base+14] >> 16) & 0x0000ffff);
2979		dtdy = ((rdp_cmd_data[texture_base+10] << 16) & 0xffff0000)   | (rdp_cmd_data[texture_base+14] & 0x0000ffff);
2980		dwdy = (rdp_cmd_data[texture_base+11] & 0xffff0000) | ((rdp_cmd_data[texture_base+15] >> 16) & 0x0000ffff);
2981		}
2982		if (zbuffer)
2983		{
2984		z    = rdp_cmd_data[zbuffer_base+0];
2985		dzdx = rdp_cmd_data[zbuffer_base+1];
2986		dzde = rdp_cmd_data[zbuffer_base+2];
2987		dzdy = rdp_cmd_data[zbuffer_base+3];
2988		}
	2948	if (shade)
	2949	{
	2950	r    = (rdp_cmd_data[shade_base+0 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+4 ] >> 16) & 0x0000ffff);
	2951	g    = ((rdp_cmd_data[shade_base+0 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+4 ] & 0x0000ffff);
	2952	b    = (rdp_cmd_data[shade_base+1 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+5 ] >> 16) & 0x0000ffff);
	2953	a    = ((rdp_cmd_data[shade_base+1 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+5 ] & 0x0000ffff);
	2954	drdx = (rdp_cmd_data[shade_base+2 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+6 ] >> 16) & 0x0000ffff);
	2955	dgdx = ((rdp_cmd_data[shade_base+2 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+6 ] & 0x0000ffff);
	2956	dbdx = (rdp_cmd_data[shade_base+3 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+7 ] >> 16) & 0x0000ffff);
	2957	dadx = ((rdp_cmd_data[shade_base+3 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+7 ] & 0x0000ffff);
	2958	drde = (rdp_cmd_data[shade_base+8 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+12] >> 16) & 0x0000ffff);
	2959	dgde = ((rdp_cmd_data[shade_base+8 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+12] & 0x0000ffff);
	2960	dbde = (rdp_cmd_data[shade_base+9 ] & 0xffff0000) | ((rdp_cmd_data[shade_base+13] >> 16) & 0x0000ffff);
	2961	dade = ((rdp_cmd_data[shade_base+9 ] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+13] & 0x0000ffff);
	2962	drdy = (rdp_cmd_data[shade_base+10] & 0xffff0000) | ((rdp_cmd_data[shade_base+14] >> 16) & 0x0000ffff);
	2963	dgdy = ((rdp_cmd_data[shade_base+10] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+14] & 0x0000ffff);
	2964	dbdy = (rdp_cmd_data[shade_base+11] & 0xffff0000) | ((rdp_cmd_data[shade_base+15] >> 16) & 0x0000ffff);
	2965	dady = ((rdp_cmd_data[shade_base+11] << 16) & 0xffff0000) | (rdp_cmd_data[shade_base+15] & 0x0000ffff);
	2966	}
	2967	if (texture)
	2968	{
	2969	s    = (rdp_cmd_data[texture_base+0 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+4 ] >> 16) & 0x0000ffff);
	2970	t    = ((rdp_cmd_data[texture_base+0 ] << 16) & 0xffff0000) | (rdp_cmd_data[texture_base+4 ] & 0x0000ffff);
	2971	w    = (rdp_cmd_data[texture_base+1 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+5 ] >> 16) & 0x0000ffff);
	2972	dsdx = (rdp_cmd_data[texture_base+2 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+6 ] >> 16) & 0x0000ffff);
	2973	dtdx = ((rdp_cmd_data[texture_base+2 ] << 16) & 0xffff0000) | (rdp_cmd_data[texture_base+6 ] & 0x0000ffff);
	2974	dwdx = (rdp_cmd_data[texture_base+3 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+7 ] >> 16) & 0x0000ffff);
	2975	dsde = (rdp_cmd_data[texture_base+8 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+12] >> 16) & 0x0000ffff);
	2976	dtde = ((rdp_cmd_data[texture_base+8 ] << 16) & 0xffff0000) | (rdp_cmd_data[texture_base+12] & 0x0000ffff);
	2977	dwde = (rdp_cmd_data[texture_base+9 ] & 0xffff0000) | ((rdp_cmd_data[texture_base+13] >> 16) & 0x0000ffff);
	2978	dsdy = (rdp_cmd_data[texture_base+10] & 0xffff0000) | ((rdp_cmd_data[texture_base+14] >> 16) & 0x0000ffff);
	2979	dtdy = ((rdp_cmd_data[texture_base+10] << 16) & 0xffff0000) | (rdp_cmd_data[texture_base+14] & 0x0000ffff);
	2980	dwdy = (rdp_cmd_data[texture_base+11] & 0xffff0000) | ((rdp_cmd_data[texture_base+15] >> 16) & 0x0000ffff);
	2981	}
	2982	if (zbuffer)
	2983	{
	2984	z    = rdp_cmd_data[zbuffer_base+0];
	2985	dzdx = rdp_cmd_data[zbuffer_base+1];
	2986	dzde = rdp_cmd_data[zbuffer_base+2];
	2987	dzdy = rdp_cmd_data[zbuffer_base+3];
	2988	}
2989	2989
2990		span[0].ds.w = dsdx;
2991		span[0].dt.w = dtdx;
2992		span[0].dw.w = dwdx;
2993		span[0].dr.w = drdx & ~0x1f;
2994		span[0].dg.w = dgdx & ~0x1f;
2995		span[0].db.w = dbdx & ~0x1f;
2996		span[0].da.w = dadx & ~0x1f;
2997		span[0].dz.w = dzdx;
2998		dzdy_dz = (dzdy >> 16) & 0xffff;
2999		dzdx_dz = (dzdx >> 16) & 0xffff;
3000		span[0].dzpix = ((dzdy_dz & 0x8000) ? ((~dzdy_dz) & 0x7fff) : dzdy_dz) + ((dzdx_dz & 0x8000) ? ((~dzdx_dz) & 0x7fff) : dzdx_dz);
3001		span[0].dzpix = normalize_dzpix(span[0].dzpix);
3002		dsdylod = dsdy >> 16;
3003		dtdylod = dtdy >> 16;
3004		if (dsdylod & 0x20000)
3005		{
3006		dsdylod = ~dsdylod & 0x1ffff;
3007		}
3008		if (dtdylod & 0x20000)
3009		{
3010		dtdylod = ~dtdylod & 0x1ffff;
3011		}
3012		span[0].dymax = (dsdylod > dtdylod)? dsdylod : dtdylod;
	2990	span[0].ds.w = dsdx;
	2991	span[0].dt.w = dtdx;
	2992	span[0].dw.w = dwdx;
	2993	span[0].dr.w = drdx & ~0x1f;
	2994	span[0].dg.w = dgdx & ~0x1f;
	2995	span[0].db.w = dbdx & ~0x1f;
	2996	span[0].da.w = dadx & ~0x1f;
	2997	span[0].dz.w = dzdx;
	2998	dzdy_dz = (dzdy >> 16) & 0xffff;
	2999	dzdx_dz = (dzdx >> 16) & 0xffff;
	3000	span[0].dzpix = ((dzdy_dz & 0x8000) ? ((~dzdy_dz) & 0x7fff) : dzdy_dz) + ((dzdx_dz & 0x8000) ? ((~dzdx_dz) & 0x7fff) : dzdx_dz);
	3001	span[0].dzpix = normalize_dzpix(span[0].dzpix);
	3002	dsdylod = dsdy >> 16;
	3003	dtdylod = dtdy >> 16;
	3004	if (dsdylod & 0x20000)
	3005	{
	3006	dsdylod = ~dsdylod & 0x1ffff;
	3007	}
	3008	if (dtdylod & 0x20000)
	3009	{
	3010	dtdylod = ~dtdylod & 0x1ffff;
	3011	}
	3012	span[0].dymax = (dsdylod > dtdylod)? dsdylod : dtdylod;
3013	3013
3014		xleft_inc = dxmdy >> 2;
3015		xright_inc = dxhdy >> 2;
	3014	xleft_inc = dxmdy >> 2;
	3015	xright_inc = dxhdy >> 2;
3016	3016
3017		xright = xh;
3018		xleft = xm;
	3017	xright = xh;
	3018	xleft = xm;
3019	3019
3020		limcvg = ((yl>>2) <= 1023) ? (yl>>2) : 1023; // Needed by 40 Winks
3021		if (limcvg < 0)
3022		{
3023		limcvg = 0;
3024		}
	3020	limcvg = ((yl>>2) <= 1023) ? (yl>>2) : 1023; // Needed by 40 Winks
	3021	if (limcvg < 0)
	3022	{
	3023	limcvg = 0;
	3024	}
3025	3025
3026		startcvg = ((yh>>2)>=0) ? (yh>>2) : 0;
3027		for (k = startcvg; k <= limcvg; k++)
3028		{
3029		memset((void*)&span[k].cvg[0],0,640);
3030		}
	3026	startcvg = ((yh>>2)>=0) ? (yh>>2) : 0;
	3027	for (k = startcvg; k <= limcvg; k++)
	3028	{
	3029	memset((void*)&span[k].cvg[0],0,640);
	3030	}
3031	3031
3032		sign_dxldy = (dxldy & 0x80000000) ? 1 : 0;
3033		sign_dxmdy = (dxmdy & 0x80000000) ? 1 : 0;
3034		samesign = !(sign_dxldy ^ sign_dxmdy);
	3032	sign_dxldy = (dxldy & 0x80000000) ? 1 : 0;
	3033	sign_dxmdy = (dxmdy & 0x80000000) ? 1 : 0;
	3034	samesign = !(sign_dxldy ^ sign_dxmdy);
3035	3035
3036		sign_dxhdy = (dxhdy & 0x80000000) ? 1 : 0;
	3036	sign_dxhdy = (dxhdy & 0x80000000) ? 1 : 0;
3037	3037
3038		do_offset = !(sign_dxhdy ^ (flip));
	3038	do_offset = !(sign_dxhdy ^ (flip));
3039	3039
3040		if (do_offset)
3041		{
3042		dsdeh = dsde >> 9;   dsdyh = dsdy >> 9;
3043		dtdeh = dtde >> 9;   dtdyh = dtdy >> 9;
3044		dwdeh = dwde >> 9;   dwdyh = dwdy >> 9;
3045		drdeh = drde >> 9;   drdyh = drdy >> 9;
3046		dgdeh = dgde >> 9;   dgdyh = dgdy >> 9;
3047		dbdeh = dbde >> 9;   dbdyh = dbdy >> 9;
3048		dadeh = dade >> 9;   dadyh = dady >> 9;
3049		dzdeh = dzde >> 9;   dzdyh = dzdy >> 9;
	3040	if (do_offset)
	3041	{
	3042	dsdeh = dsde >> 9;  dsdyh = dsdy >> 9;
	3043	dtdeh = dtde >> 9;  dtdyh = dtdy >> 9;
	3044	dwdeh = dwde >> 9;  dwdyh = dwdy >> 9;
	3045	drdeh = drde >> 9;  drdyh = drdy >> 9;
	3046	dgdeh = dgde >> 9;  dgdyh = dgdy >> 9;
	3047	dbdeh = dbde >> 9;  dbdyh = dbdy >> 9;
	3048	dadeh = dade >> 9;  dadyh = dady >> 9;
	3049	dzdeh = dzde >> 9;  dzdyh = dzdy >> 9;
3050	3050
3051		dsdiff = (dsdeh*3 - dsdyh*3) << 7;
3052		dtdiff = (dtdeh*3 - dtdyh*3) << 7;
3053		dwdiff = (dwdeh*3 - dwdyh*3) << 7;
3054		drdiff = (drdeh*3 - drdyh*3) << 7;
3055		dgdiff = (dgdeh*3 - dgdyh*3) << 7;
3056		dbdiff = (dbdeh*3 - dbdyh*3) << 7;
3057		dadiff = (dadeh*3 - dadyh*3) << 7;
3058		dzdiff = (dzdeh*3 - dzdyh*3) << 7;
3059		}
3060		else
3061		{
3062		dsdiff = dtdiff = dwdiff = drdiff = dgdiff = dbdiff = dadiff = dzdiff = 0;
3063		}
	3051	dsdiff = (dsdeh*3 - dsdyh*3) << 7;
	3052	dtdiff = (dtdeh*3 - dtdyh*3) << 7;
	3053	dwdiff = (dwdeh*3 - dwdyh*3) << 7;
	3054	drdiff = (drdeh*3 - drdyh*3) << 7;
	3055	dgdiff = (dgdeh*3 - dgdyh*3) << 7;
	3056	dbdiff = (dbdeh*3 - dbdyh*3) << 7;
	3057	dadiff = (dadeh*3 - dadyh*3) << 7;
	3058	dzdiff = (dzdeh*3 - dzdyh*3) << 7;
	3059	}
	3060	else
	3061	{
	3062	dsdiff = dtdiff = dwdiff = drdiff = dgdiff = dbdiff = dadiff = dzdiff = 0;
	3063	}
3064	3064
3065		if (do_offset)
3066		{
3067		dseoff = (dsdeh*3) << 7;
3068		dteoff = (dtdeh*3) << 7;
3069		dweoff = (dwdeh*3) << 7;
3070		dreoff = (drdeh*3) << 7;
3071		dgeoff = (dgdeh*3) << 7;
3072		dbeoff = (dbdeh*3) << 7;
3073		daeoff = (dadeh*3) << 7;
3074		dzeoff = (dzdeh*3) << 7;
3075		}
3076		else
3077		{
3078		dseoff = dteoff = dweoff = dreoff = dgeoff = dbeoff = daeoff = dzeoff = 0;
3079		}
3080		#define adjust_deoff_only()      \
3081		{                     \
3082		span[j].s = s + dseoff;            \
3083		span[j].t = t + dteoff;            \
3084		span[j].w = w + dweoff;            \
3085		span[j].r = r + dreoff;            \
3086		span[j].g = g + dgeoff;            \
3087		span[j].b = b + dbeoff;            \
3088		span[j].a = a + daeoff;            \
3089		span[j].z = z + dzeoff;            \
	3065	if (do_offset)
	3066	{
	3067	dseoff = (dsdeh*3) << 7;
	3068	dteoff = (dtdeh*3) << 7;
	3069	dweoff = (dwdeh*3) << 7;
	3070	dreoff = (drdeh*3) << 7;
	3071	dgeoff = (dgdeh*3) << 7;
	3072	dbeoff = (dbdeh*3) << 7;
	3073	daeoff = (dadeh*3) << 7;
	3074	dzeoff = (dzdeh*3) << 7;
	3075	}
	3076	else
	3077	{
	3078	dseoff = dteoff = dweoff = dreoff = dgeoff = dbeoff = daeoff = dzeoff = 0;
	3079	}
	3080	#define adjust_deoff_only()     \
	3081	{                           \
	3082	span[j].s = s + dseoff;             \
	3083	span[j].t = t + dteoff;             \
	3084	span[j].w = w + dweoff;             \
	3085	span[j].r = r + dreoff;             \
	3086	span[j].g = g + dgeoff;             \
	3087	span[j].b = b + dbeoff;             \
	3088	span[j].a = a + daeoff;             \
	3089	span[j].z = z + dzeoff;             \
3090	3090	}
3091	3091
3092	3092	#define addleft(x) addleftcvg(x,k)
3093	3093	#define addright(x) addrightcvg(x,k)
3094		#define setvalues() {               \
3095		addvalues();            \
3096		adjust_attr();   \
	3094	#define setvalues() {                   \
	3095	addvalues();                \
	3096	adjust_attr();  \
3097	3097	}
3098	3098
3099		dsdxh = dsdx >> 8;
3100		dtdxh = dtdx >> 8;
3101		dwdxh = dwdx >> 8;
3102		drdxh = drdx >> 8;
3103		dgdxh = dgdx >> 8;
3104		dbdxh = dbdx >> 8;
3105		dadxh = dadx >> 8;
3106		dzdxh = dzdx >> 8;
	3099	dsdxh = dsdx >> 8;
	3100	dtdxh = dtdx >> 8;
	3101	dwdxh = dwdx >> 8;
	3102	drdxh = drdx >> 8;
	3103	dgdxh = dgdx >> 8;
	3104	dbdxh = dbdx >> 8;
	3105	dadxh = dadx >> 8;
	3106	dzdxh = dzdx >> 8;
3107	3107
3108		#define adjust_attr()      \
3109		{                     \
3110		span[j].s.w = (s + dsdiff - (xfrac * dsdxh)) & ~0x1f;            \
3111		span[j].t.w = (t + dtdiff - (xfrac * dtdxh)) & ~0x1f;            \
3112		span[j].w.w = (w + dwdiff - (xfrac * dwdxh)) & ~0x1f;            \
3113		span[j].r.w = r + drdiff - (xfrac * drdxh);            \
3114		span[j].g.w = g + dgdiff - (xfrac * dgdxh);            \
3115		span[j].b.w = b + dbdiff - (xfrac * dbdxh);            \
3116		span[j].a.w = a + dadiff - (xfrac * dadxh);            \
3117		span[j].z.w = z + dzdiff - (xfrac * dzdxh);            \
	3108	#define adjust_attr()       \
	3109	{                           \
	3110	span[j].s.w = (s + dsdiff - (xfrac * dsdxh)) & ~0x1f;               \
	3111	span[j].t.w = (t + dtdiff - (xfrac * dtdxh)) & ~0x1f;               \
	3112	span[j].w.w = (w + dwdiff - (xfrac * dwdxh)) & ~0x1f;               \
	3113	span[j].r.w = r + drdiff - (xfrac * drdxh);             \
	3114	span[j].g.w = g + dgdiff - (xfrac * dgdxh);             \
	3115	span[j].b.w = b + dbdiff - (xfrac * dbdxh);             \
	3116	span[j].a.w = a + dadiff - (xfrac * dadxh);             \
	3117	span[j].z.w = z + dzdiff - (xfrac * dzdxh);             \
3118	3118	}
3119	3119
3120		#define adjust_diffonly()      \
3121		{                     \
3122		span[j].s = s + dsdiff;            \
3123		span[j].t = t + dtdiff;            \
3124		span[j].w = w + dwdiff;            \
3125		span[j].r = r + drdiff;            \
3126		span[j].g = g + dgdiff;            \
3127		span[j].b = b + dbdiff;            \
3128		span[j].a = a + dadiff;            \
3129		span[j].z = z + dzdiff;            \
	3120	#define adjust_diffonly()       \
	3121	{                           \
	3122	span[j].s = s + dsdiff;             \
	3123	span[j].t = t + dtdiff;             \
	3124	span[j].w = w + dwdiff;             \
	3125	span[j].r = r + drdiff;             \
	3126	span[j].g = g + dgdiff;             \
	3127	span[j].b = b + dbdiff;             \
	3128	span[j].a = a + dadiff;             \
	3129	span[j].z = z + dzdiff;             \
3130	3130	}
3131	3131
3132		#define addvalues() {   \
3133		s += dsde;   \
3134		t += dtde;   \
3135		w += dwde; \
3136		r += drde; \
3137		g += dgde; \
3138		b += dbde; \
3139		a += dade; \
3140		z += dzde; \
	3132	#define addvalues() {   \
	3133	s += dsde;  \
	3134	t += dtde;  \
	3135	w += dwde; \
	3136	r += drde; \
	3137	g += dgde; \
	3138	b += dbde; \
	3139	a += dade; \
	3140	z += dzde; \
3141	3141	}
3142	3142
3143		#define justassign()      \
3144		{                     \
3145		span[j].s = s & ~0x1f;            \
3146		span[j].t = t & ~0x1f;            \
3147		span[j].w = w & ~0x1f;            \
3148		span[j].r = r;            \
3149		span[j].g = g;            \
3150		span[j].b = b;            \
3151		span[j].a = a;            \
3152		span[j].z = z;            \
	3143	#define justassign()        \
	3144	{                           \
	3145	span[j].s = s & ~0x1f;              \
	3146	span[j].t = t & ~0x1f;              \
	3147	span[j].w = w & ~0x1f;              \
	3148	span[j].r = r;              \
	3149	span[j].g = g;              \
	3150	span[j].b = b;              \
	3151	span[j].a = a;              \
	3152	span[j].z = z;              \
3153	3153	}
3154	3154
3155		m_inc = flip ? 1 : -1;
	3155	m_inc = flip ? 1 : -1;
3156	3156
3157		ycur =   yh & ~3;
3158		ylfar = yl | 3;
3159		ldflag = (sign_dxhdy ^ flip) ? 0 : 3;
3160		yhpix = yh >> 2;
3161		ympix = ym >> 2;
3162		ylpix = yl >> 2;
	3157	ycur =  yh & ~3;
	3158	ylfar = yl | 3;
	3159	ldflag = (sign_dxhdy ^ flip) ? 0 : 3;
	3160	yhpix = yh >> 2;
	3161	ympix = ym >> 2;
	3162	ylpix = yl >> 2;
3163	3163
3164		for (k = ycur; k <= ylfar; k++)
3165		{
3166		if (k == ym)
3167		{
3168		xleft = xl;
3169		xleft_inc = dxldy >> 2;
3170		}
	3164	for (k = ycur; k <= ylfar; k++)
	3165	{
	3166	if (k == ym)
	3167	{
	3168	xleft = xl;
	3169	xleft_inc = dxldy >> 2;
	3170	}
3171	3171
3172		xstart = xleft >> 16;
3173		xend = xright >> 16;
3174		j = k >> 2;
3175		spix = k & 3;
	3172	xstart = xleft >> 16;
	3173	xend = xright >> 16;
	3174	j = k >> 2;
	3175	spix = k & 3;
3176	3176
3177		if (k >= 0 && k < 0x1000)
3178		{
3179		int m = 0;
3180		int n = 0;
3181		int length = 0;
3182		min = 0; max = 3;
3183		if (j == yhpix)
3184		{
3185		min = yh & 3;
3186		}
3187		if (j == ylpix)
3188		{
3189		max = yl & 3;
3190		}
3191		if (spix >= min && spix <= max)
3192		{
3193		if (spix == min)
3194		{
3195		minxmx = maxxmx = xstart;
3196		minxhx = maxxhx = xend;
3197		}
3198		else
3199		{
3200		minxmx = (xstart < minxmx) ? xstart : minxmx;
3201		maxxmx = (xstart > maxxmx) ? xstart : maxxmx;
3202		minxhx = (xend < minxhx) ? xend : minxhx;
3203		maxxhx = (xend > maxxhx) ? xend : maxxhx;
3204		}
3205		}
	3177	if (k >= 0 && k < 0x1000)
	3178	{
	3179	int m = 0;
	3180	int n = 0;
	3181	int length = 0;
	3182	min = 0; max = 3;
	3183	if (j == yhpix)
	3184	{
	3185	min = yh & 3;
	3186	}
	3187	if (j == ylpix)
	3188	{
	3189	max = yl & 3;
	3190	}
	3191	if (spix >= min && spix <= max)
	3192	{
	3193	if (spix == min)
	3194	{
	3195	minxmx = maxxmx = xstart;
	3196	minxhx = maxxhx = xend;
	3197	}
	3198	else
	3199	{
	3200	minxmx = (xstart < minxmx) ? xstart : minxmx;
	3201	maxxmx = (xstart > maxxmx) ? xstart : maxxmx;
	3202	minxhx = (xend < minxhx) ? xend : minxhx;
	3203	maxxhx = (xend > maxxhx) ? xend : maxxhx;
	3204	}
	3205	}
3206	3206
3207		if (spix == max)
3208		{
3209		if (flip)
3210		{
3211		span[j].lx = maxxmx;
3212		span[j].rx = minxhx;
3213		}
3214		else
3215		{
3216		span[j].lx = minxmx;
3217		span[j].rx = maxxhx;
3218		}
3219		}
	3207	if (spix == max)
	3208	{
	3209	if (flip)
	3210	{
	3211	span[j].lx = maxxmx;
	3212	span[j].rx = minxhx;
	3213	}
	3214	else
	3215	{
	3216	span[j].lx = minxmx;
	3217	span[j].rx = maxxhx;
	3218	}
	3219	}
3220	3220
3221		length = flip ? (xstart - xend) : (xend - xstart);
	3221	length = flip ? (xstart - xend) : (xend - xstart);
3222	3222
3223		if (spix == ldflag)
3224		{
3225		xfrac = ((xright >> 8) & 0xff);
3226		adjust_attr();
3227		}
	3223	if (spix == ldflag)
	3224	{
	3225	xfrac = ((xright >> 8) & 0xff);
	3226	adjust_attr();
	3227	}
3228	3228
3229		m = flip ? (xend+1) : (xend-1);
	3229	m = flip ? (xend+1) : (xend-1);
3230	3230
3231		if (k >= yh && length >= 0 && k <= yl)
3232		{
3233		if (xstart>=0 && xstart <1024)
3234		{
3235		if (!flip)
3236		{
3237		span[j].cvg[xstart] += addleft(xleft);
3238		}
3239		else
3240		{
3241		span[j].cvg[xstart] += addright(xleft);
3242		}
3243		}
3244		if (xend>=0 && xend<1024)
3245		{
3246		if (xstart != xend)
3247		{
3248		if (!flip)
3249		{
3250		span[j].cvg[xend] += addright(xright);
3251		}
3252		else
3253		{
3254		span[j].cvg[xend] += addleft(xright);
3255		}
3256		}
3257		else
3258		{
3259		if (!flip)
3260		{
3261		span[j].cvg[xend] -= (2 - addright(xright));
3262		}
3263		else
3264		{
3265		span[j].cvg[xend] -= (2 - addleft(xright));
3266		}
3267		if (span[j].cvg[xend] > 200)
3268		{
3269		span[j].cvg[xend] = 0;
3270		}
3271		}
3272		}
3273		for (n = 0; n < (length - 1); n++)
3274		{
3275		if (m>=0 && m < 640)
3276		{
3277		span[j].cvg[m] += 2;
3278		}
	3231	if (k >= yh && length >= 0 && k <= yl)
	3232	{
	3233	if (xstart>=0 && xstart <1024)
	3234	{
	3235	if (!flip)
	3236	{
	3237	span[j].cvg[xstart] += addleft(xleft);
	3238	}
	3239	else
	3240	{
	3241	span[j].cvg[xstart] += addright(xleft);
	3242	}
	3243	}
	3244	if (xend>=0 && xend<1024)
	3245	{
	3246	if (xstart != xend)
	3247	{
	3248	if (!flip)
	3249	{
	3250	span[j].cvg[xend] += addright(xright);
	3251	}
	3252	else
	3253	{
	3254	span[j].cvg[xend] += addleft(xright);
	3255	}
	3256	}
	3257	else
	3258	{
	3259	if (!flip)
	3260	{
	3261	span[j].cvg[xend] -= (2 - addright(xright));
	3262	}
	3263	else
	3264	{
	3265	span[j].cvg[xend] -= (2 - addleft(xright));
	3266	}
	3267	if (span[j].cvg[xend] > 200)
	3268	{
	3269	span[j].cvg[xend] = 0;
	3270	}
	3271	}
	3272	}
	3273	for (n = 0; n < (length - 1); n++)
	3274	{
	3275	if (m>=0 && m < 640)
	3276	{
	3277	span[j].cvg[m] += 2;
	3278	}
3279	3279
3280		m += m_inc;
3281		}
3282		}
3283		}
	3280	m += m_inc;
	3281	}
	3282	}
	3283	}
3284	3284
3285		if (spix == 3)
3286		{
3287		addvalues();
3288		}
3289		xleft += xleft_inc;
3290		xright += xright_inc;
3291		}
	3285	if (spix == 3)
	3286	{
	3287	addvalues();
	3288	}
	3289	xleft += xleft_inc;
	3290	xright += xright_inc;
	3291	}
3292	3292
3293		switch (fb_size) // 8bpp needs to be implemented
3294		{
3295		case PIXEL_SIZE_16BIT:   render_spans_16(yh>>2, yl>>2, &tile[tilenum], shade, texture, zbuffer, flip); break;
3296		case PIXEL_SIZE_32BIT:   render_spans_32(yh>>2, yl>>2, &tile[tilenum], shade, texture, zbuffer, flip); break;
3297		default: break; // V-Rally2 does this, fb_size=0
3298		}
	3293	switch (fb_size) // 8bpp needs to be implemented
	3294	{
	3295	case PIXEL_SIZE_16BIT:  render_spans_16(yh>>2, yl>>2, &tile[tilenum], shade, texture, zbuffer, flip); break;
	3296	case PIXEL_SIZE_32BIT:  render_spans_32(yh>>2, yl>>2, &tile[tilenum], shade, texture, zbuffer, flip); break;
	3297	default: break; // V-Rally2 does this, fb_size=0
	3298	}
3299	3299	}
3300	3300	*/
3301	3301

src/mame/video/gottlieb.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "gottlieb.h"
	8	#include "includes/gottlieb.h"
9	9	#include "machine/laserdsc.h"
10	10	#include "video/resnet.h"
11	11

src/mame/video/ddragon.c

r6740	r6741
41	41	***************************************************************************/
42	42
43	43	#include "driver.h"
44		#include "ddragon.h"
	44	#include "includes/ddragon.h"
45	45
46	46
47	47	/***************************************************************************

src/mame/video/asterix.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	static int sprite_colorbase;
r6740	r6741
8	8	static int tilebanks[4];
9	9	static int spritebanks[4];
10	10
11		static void reset_spritebank(void)
	11	static void reset_spritebank( running_machine *machine )
12	12	{
13		K053244_bankselect(0, spritebank & 7);
	13	const device_config *k053244 = devtag_get_device(machine, "k053244");
	14	k053244_bankselect(k053244, spritebank & 7);
14	15	spritebanks[0] = (spritebank << 12) & 0x7000;
15	16	spritebanks[1] = (spritebank <<  9) & 0x7000;
16	17	spritebanks[2] = (spritebank <<  6) & 0x7000;
r6740	r6741
20	21	WRITE16_HANDLER( asterix_spritebank_w )
21	22	{
22	23	COMBINE_DATA(&spritebank);
23		reset_spritebank();
	24	reset_spritebank(space->machine);
24	25	}
25	26
26		static void asterix_sprite_callback(int *code, int *color, int *priority_mask)
	27	void asterix_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask)
27	28	{
28	29	int pri = (*color & 0x00e0) >> 2;
29	30	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
35	36	}
36	37
37	38
38		static void asterix_tile_callback(int layer, int *code, int *color, int *flags)
	39	void asterix_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags)
39	40	{
40	41	*flags = *code & 0x1000 ? TILE_FLIPX : 0;
41	42	*color = (layer_colorbase[layer] + ((*code & 0xe000) >> 13)) & 0x7f;
42	43	*code = (*code & 0x03ff) | tilebanks[(*code >> 10) & 3];
43	44	}
44	45
45		VIDEO_START( asterix )
46		{
47		K053251_vh_start(machine);
48		K056832_vh_start(machine, "gfx1", K056832_BPP_4, 1, NULL, asterix_tile_callback, 1);
49		K053245_vh_start(machine,0, "gfx2",NORMAL_PLANE_ORDER, asterix_sprite_callback);
50
51		K053245_set_SpriteOffset(0,-3,-1);
52		}
53
54	46	/* useful function to sort the three tile layers by priority order */
55	47	static void sortlayers(int *layer,int *pri)
56	48	{
r6740	r6741
70	62	VIDEO_UPDATE( asterix )
71	63	{
72	64	static const int K053251_CI[4] = { K053251_CI0, K053251_CI2, K053251_CI3, K053251_CI4 };
	65	const device_config *k053244 = devtag_get_device(screen->machine, "k053244");
	66	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
	67	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
73	68	int layer[3], plane, new_colorbase;
74	69
75	70	/* Layer offsets are different if horizontally flipped */
76		if (K056832_read_register(0x0) & 0x10)
	71	if (k056832_read_register(k056832, 0x0) & 0x10)
77	72	{
78		K056832_set_LayerOffset(0, 89-176, 0);
79		K056832_set_LayerOffset(1, 91-176, 0);
80		K056832_set_LayerOffset(2, 89-176, 0);
81		K056832_set_LayerOffset(3, 95-176, 0);
	73	k056832_set_layer_offs(k056832, 0, 89 - 176, 0);
	74	k056832_set_layer_offs(k056832, 1, 91 - 176, 0);
	75	k056832_set_layer_offs(k056832, 2, 89 - 176, 0);
	76	k056832_set_layer_offs(k056832, 3, 95 - 176, 0);
82	77	}
83	78	else
84	79	{
85		K056832_set_LayerOffset(0, 89, 0);
86		K056832_set_LayerOffset(1, 91, 0);
87		K056832_set_LayerOffset(2, 89, 0);
88		K056832_set_LayerOffset(3, 95, 0);
	80	k056832_set_layer_offs(k056832, 0, 89, 0);
	81	k056832_set_layer_offs(k056832, 1, 91, 0);
	82	k056832_set_layer_offs(k056832, 2, 89, 0);
	83	k056832_set_layer_offs(k056832, 3, 95, 0);
89	84	}
90	85
91	86
92		tilebanks[0] = (K056832_get_lookup(0) << 10);
93		tilebanks[1] = (K056832_get_lookup(1) << 10);
94		tilebanks[2] = (K056832_get_lookup(2) << 10);
95		tilebanks[3] = (K056832_get_lookup(3) << 10);
	87	tilebanks[0] = (k056832_get_lookup(k056832, 0) << 10);
	88	tilebanks[1] = (k056832_get_lookup(k056832, 1) << 10);
	89	tilebanks[2] = (k056832_get_lookup(k056832, 2) << 10);
	90	tilebanks[3] = (k056832_get_lookup(k056832, 3) << 10);
96	91
97	92	// update color info and refresh tilemaps
98		sprite_colorbase = K053251_get_palette_index(K053251_CI1);
	93	sprite_colorbase = k053251_get_palette_index(k053251, K053251_CI1);
99	94
100		for (plane=0; plane<4; plane++)
	95	for (plane = 0; plane < 4; plane++)
101	96	{
102		new_colorbase = K053251_get_palette_index(K053251_CI[plane]);
	97	new_colorbase = k053251_get_palette_index(k053251, K053251_CI[plane]);
103	98	if (layer_colorbase[plane] != new_colorbase)
104	99	{
105	100	layer_colorbase[plane] = new_colorbase;
106		K056832_mark_plane_dirty(plane);
	101	k056832_mark_plane_dirty(k056832, plane);
107	102	}
108	103	}
109	104
110	105	layer[0] = 0;
111		layerpri[0] = K053251_get_priority(K053251_CI0);
	106	layerpri[0] = k053251_get_priority(k053251, K053251_CI0);
112	107	layer[1] = 1;
113		layerpri[1] = K053251_get_priority(K053251_CI2);
	108	layerpri[1] = k053251_get_priority(k053251, K053251_CI2);
114	109	layer[2] = 3;
115		layerpri[2] = K053251_get_priority(K053251_CI4);
	110	layerpri[2] = k053251_get_priority(k053251, K053251_CI4);
116	111
117	112	sortlayers(layer, layerpri);
118	113
119	114	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
120	115	bitmap_fill(bitmap, cliprect, 0);
121	116
122		K056832_tilemap_draw(screen->machine, bitmap, cliprect, layer[0], 0, 1);
123		K056832_tilemap_draw(screen->machine, bitmap, cliprect, layer[1], 0, 2);
124		K056832_tilemap_draw(screen->machine, bitmap, cliprect, layer[2], 0, 4);
	117	k056832_tilemap_draw(k056832, bitmap, cliprect, layer[0], 0, 1);
	118	k056832_tilemap_draw(k056832, bitmap, cliprect, layer[1], 0, 2);
	119	k056832_tilemap_draw(k056832, bitmap, cliprect, layer[2], 0, 4);
125	120
126	121	/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
127	122	pdrawgfx_shadow_lowpri = 1; fix shadows in front of feet */
128		K053245_sprites_draw(screen->machine, 0, bitmap, cliprect);
	123	k053245_sprites_draw(k053244, bitmap, cliprect);
129	124
130		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 2, 0, 0);
	125	k056832_tilemap_draw(k056832, bitmap, cliprect, 2, 0, 0);
131	126	return 0;
132	127	}

src/mame/video/homedata.c

r6740	r6741
1	1	#include "driver.h"
2	2	#include "cpu/m6809/m6809.h"
3		#include "homedata.h"
	3	#include "includes/homedata.h"
4	4
5	5	/*
6	6	video control registers:

src/mame/video/exidy.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "deprecat.h"
9		#include "exidy.h"
	9	#include "includes/exidy.h"
10	10
11	11
12	12	UINT8 *exidy_videoram;

src/mame/video/hyhoo.c

r6740	r6741
7	7	******************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "nb1413m3.h"
	10	#include "includes/nb1413m3.h"
11	11
12	12
13	13	UINT8 *hyhoo_clut;

src/mame/video/hng64.c

r6740	r6741
1	1	#include "driver.h"
2		#include "hng64.h"
	2	#include "includes/hng64.h"
3	3
4	4	#include <math.h>
5	5	#include "drawgfxm.h"
r6740	r6741
33	33
34	34	UINT8 hng64_screen_dis;
35	35
36		// 3d memory and prototypes
37		#define MAX_ONSCREEN_POLYS (10000)
38		struct polyVert
39		{
40		float worldCoords[4];   // World space coordinates (X Y Z 1.0)
41
42		float texCoords[4];      // Texture coordinates (U V 0 1.0) -> OpenGL style...
43
44		float normal[4];      // Normal (X Y Z 1.0)
45		float clipCoords[4];   // Homogeneous screen space coordinates (X Y Z W)
46
47		float light[3];         // The intensity of the illumination at this point
48		};
49
50		struct polygon
51		{
52		int n;                  // Number of sides
53		struct polyVert vert[10];   // Vertices (maximum number per polygon is 10 -> 3+6)
54
55		float faceNormal[4];      // Normal of the face overall - for calculating visibility and flat-shading...
56		int visible;            // Polygon visibility in scene
57
58		INT8 texIndex;            // Which texture to draw from (0x00-0x0f)
59		INT8 texType;            // How to index into the texture
60		UINT8 palIndex;            // Which palette to use when rasterizing
61		};
62
	36	// 3d display buffers
	37	// (Temporarily global - someday they will live with the proper bit-depth in the memory map)
63	38	static float* depthBuffer3d;
64	39	static UINT32* colorBuffer3d;
65		static struct polygon *polys;
66		static void draw3d(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect);
	40	static void clear3d(running_machine *machine);   // TODO: Inline
67	41
68	42
69
70	43	static void hng64_mark_all_tiles_dirty( int tilemap )
71	44	{
72	45	if (tilemap == 0)
r6740	r6741
390	363
391	364	//      if (((source[2] & 0xffff0000) >> 16) == 0x0001)
392	365	//      {
393		//          usrintf_showmessage("T %.8x %.8x %.8x %.8x %.8x", source[0], source[1], source[2], source[3], source[4]);
394		//          // usrintf_showmessage("T %.8x %.8x %.8x %.8x %.8x", source[0], source[1], source[2], source[3], source[4]);
	366	//          popmessage("T %.8x %.8x %.8x %.8x %.8x", source[0], source[1], source[2], source[3], source[4]);
	367	//          // popmessage("T %.8x %.8x %.8x %.8x %.8x", source[0], source[1], source[2], source[3], source[4]);
395	368	//      }
396	369
397	370	for(ydrw=0;ydrw<=chainy;ydrw++)
r6740	r6741
1521	1494	if (hng64_mcu_type != RACING_MCU) // disable on racing games until it stops crashing MAME!
1522	1495	{
1523	1496	int x, y;
1524		draw3d(screen->machine, bitmap, cliprect);
1525	1497
1526	1498	// Blit the color buffer into the primary bitmap
1527	1499	for (y = cliprect->min_y; y <= cliprect->max_y; y++)
r6740	r6741
1538	1510	src++;
1539	1511	}
1540	1512	}
	1513	//printf("\n");   /* Debug - ajg */
	1514	clear3d(screen->machine);
1541	1515	}
1542	1516
1543	1517	if(0)
r6740	r6741
1548	1522
1549	1523	if (0)
1550	1524	popmessage("%08x %08x TR(%04x %04x %04x %04x) SB(%04x %04x %04x %04x) %08x %08x %08x %08x %08x AA(%08x %08x) %08x %08x",
1551		hng64_videoregs[0x00],
1552		hng64_videoregs[0x01],
	1525	hng64_videoregs[0x00],
	1526	hng64_videoregs[0x01],
1553	1527	(hng64_videoregs[0x02]>>16)&0xf9ff, // bits we're sure about are masked out
1554	1528	(hng64_videoregs[0x02]>>0)&0xf9ff,
1555	1529	(hng64_videoregs[0x03]>>16)&0xf9ff,
r6740	r6741
1558	1532	(hng64_videoregs[0x04]>>0)&0xffff,
1559	1533	(hng64_videoregs[0x05]>>16)&0xffff,
1560	1534	(hng64_videoregs[0x05]>>0)&0xffff,
1561		hng64_videoregs[0x06],
1562		hng64_videoregs[0x07],
1563		hng64_videoregs[0x08],
1564		hng64_videoregs[0x09],
1565		hng64_videoregs[0x0a],
1566		hng64_videoregs[0x0b],
1567		hng64_videoregs[0x0c],
1568		hng64_videoregs[0x0d],
1569		hng64_videoregs[0x0e]);
	1535	hng64_videoregs[0x06],
	1536	hng64_videoregs[0x07],
	1537	hng64_videoregs[0x08],
	1538	hng64_videoregs[0x09],
	1539	hng64_videoregs[0x0a],
	1540	hng64_videoregs[0x0b],
	1541	hng64_videoregs[0x0c],
	1542	hng64_videoregs[0x0d],
	1543	hng64_videoregs[0x0e]);
1570	1544
1571	1545	if (0)
1572	1546	popmessage("3D: %08x %08x %08x %08x : %08x %08x %08x %08x : %08x %08x %08x %08x",
r6740	r6741
1662	1636	tilemap_set_transparent_pen(hng64_tilemap3_16x16,0);
1663	1637	tilemap_set_transparent_pen(hng64_tilemap3_16x16_alt,0);
1664	1638
1665		// debug switch, turn on / off additive blending on a per-tilemap basis
	1639	// Debug switch, turn on / off additive blending on a per-tilemap basis
1666	1640	additive_tilemap_debug = 0;
1667	1641
1668	1642	// 3d Buffer Allocation
1669	1643	depthBuffer3d = auto_alloc_array(machine, float,  (visarea->max_x)*(visarea->max_y));
1670	1644	colorBuffer3d = auto_alloc_array(machine, UINT32, (visarea->max_x)*(visarea->max_y));
1671
1672		// The general display list of polygons in the scene...
1673		polys = auto_alloc_array(machine, struct polygon, MAX_ONSCREEN_POLYS);
1674	1645	}
1675	1646
1676	1647
r6740	r6741
1679	1650	///////////////
1680	1651	UINT32 hng64_dls[2][0x81];
1681	1652
1682		static float uToF(UINT16 input);
	1653	// 3d State
	1654	static int paletteState3d = 0x00;
	1655	static float projectionMatrix[16];
	1656	static float modelViewMatrix[16];
	1657	static float cameraMatrix[16];
1683	1658
	1659	struct polyVert
	1660	{
	1661	float worldCoords[4];   // World space coordinates (X Y Z 1.0)
	1662
	1663	float texCoords[4];      // Texture coordinates (U V 0 1.0) -> OpenGL style...
	1664
	1665	float normal[4];      // Normal (X Y Z 1.0)
	1666	float clipCoords[4];   // Homogeneous screen space coordinates (X Y Z W)
	1667
	1668	float light[3];         // The intensity of the illumination at this point
	1669	};
	1670
	1671	struct polygon
	1672	{
	1673	int n;                  // Number of sides
	1674	struct polyVert vert[10];   // Vertices (maximum number per polygon is 10 -> 3+6)
	1675
	1676	float faceNormal[4];      // Normal of the face overall - for calculating visibility and flat-shading...
	1677	int visible;            // Polygon visibility in scene
	1678
	1679	INT8 texIndex;            // Which texture to draw from (0x00-0x0f)
	1680	INT8 texType;            // How to index into the texture
	1681	UINT8 palIndex;            // Which palette to use when rasterizing
	1682	};
	1683
1684	1684	static void setIdentity(float *matrix);
1685	1685	static void matmul4(float *product, const float *a, const float *b);
1686	1686	static void vecmatmul4(float *product, const float *a, const float *b);
r6740	r6741
1688	1688	//static void normalize(float* x);
1689	1689
1690	1690	static void performFrustumClip(struct polygon *p);
1691		static void drawShaded(running_machine *machine, struct polygon *p, bitmap_t *bitmap);
	1691	static void drawShaded(running_machine *machine, struct polygon *p);
1692	1692	//static void plot(INT32 x, INT32 y, INT32 color, bitmap_t *bitmap);
1693	1693	//static void drawline2d(INT32 x0, INT32 y0, INT32 x1, INT32 y1, INT32 color, bitmap_t *bitmap);
1694	1694	//static void DrawWireframe(struct polygon *p, bitmap_t *bitmap);
1695	1695
1696		#define WORD_AT(BUFFER,OFFSET) ( (BUFFER[OFFSET] << 8) | BUFFER[OFFSET+1] )
	1696	static float uToF(UINT16 input);
1697	1697
1698		/* 3D/framebuffer video registers
1699		* ------------------------------
1700		*
1701		* UINT32 | Bits                                    | Use
1702		*        | 3322 2222 2222 1111 1111 11             |
1703		* -------+-1098-7654-3210-9876-5432-1098-7654-3210-+----------------
1704		*      0 | ???? ???? ???? ???? ccc? ???? ???? ???? | framebuffer color base, 0x311800 in Fatal Fury WA, 0x313800 in Buriki One
1705		*      1 |                                         |
1706		*      2 | ???? ???? ???? ???? ???? ???? ???? ???? | camera / framebuffer global x/y? Actively used by Samurai Shodown 64 2
1707		*      3 | ---- --?x ---- ---- ---- ---- ---- ---- | unknown, unsetted by Buriki One and setted by Fatal Fury WA, buffering mode?
1708		*   4-11 | ---- ???? ---- ???? ---- ???? ---- ???? | Table filled with 0x0? data
1709		*
1710		*/
1711		static void draw3d(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
1712		{
1713		int i,j,k,l,m;
1714	1698
1715		float projectionMatrix[16];
1716		float modelViewMatrix[16];
1717		float cameraMatrix[16];
1718		float objectMatrix[16];
	1699	////////////////////
	1700	// 3d 'Functions' //
	1701	////////////////////
1719	1702
1720		int paletteState = 0x00;
	1703	// Operation 0001
	1704	// Camera transformation.
	1705	static void setCameraTransformation(const UINT16* packet)
	1706	{
	1707	/*//////////////
	1708	// PACKET FORMAT
	1709	// [0]  - 0001 ... ID
	1710	// [1]  - xxxx ... Extrinsic camera matrix
	1711	// [2]  - xxxx ... Extrinsic camera matrix
	1712	// [3]  - xxxx ... Extrinsic camera matrix
	1713	// [4]  - xxxx ... Extrinsic camera matrix
	1714	// [5]  - xxxx ... Extrinsic camera matrix
	1715	// [6]  - xxxx ... Extrinsic camera matrix
	1716	// [7]  - xxxx ... Extrinsic camera matrix
	1717	// [8]  - xxxx ... Extrinsic camera matrix
	1718	// [9]  - xxxx ... Extrinsic camera matrix
	1719	// [10] - xxxx ... Extrinsic camera matrix
	1720	// [11] - xxxx ... Extrinsic camera matrix
	1721	// [12] - xxxx ... Extrinsic camera matrix
	1722	// [13] - ???? ... ? Flips per-frame during fatfurwa 'HNG64'
	1723	// [14] - ???? ... ? Could be some floating-point values during buriki 'door run'
	1724	// [15] - ???? ... ? Same as 13 & 14
	1725	////////////*/
	1726	// CAMERA TRANSFORMATION MATRIX
	1727	cameraMatrix[0]  = uToF(packet[1]);
	1728	cameraMatrix[4]  = uToF(packet[2]);
	1729	cameraMatrix[8]  = uToF(packet[3]);
	1730	cameraMatrix[3]  = 0.0f;
1721	1731
1722		UINT32 numPolys = 0;
	1732	cameraMatrix[1]  = uToF(packet[4]);
	1733	cameraMatrix[5]  = uToF(packet[5]);
	1734	cameraMatrix[9]  = uToF(packet[6]);
	1735	cameraMatrix[7]  = 0.0f;
1723	1736
1724		struct polygon lastPoly = { 0 };
1725		const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen);
	1737	cameraMatrix[2]  = uToF(packet[7]);
	1738	cameraMatrix[6]  = uToF(packet[8]);
	1739	cameraMatrix[10] = uToF(packet[9]);
	1740	cameraMatrix[11] = 0.0f;
1726	1741
1727		// Set some matrices to the identity...
1728		setIdentity(projectionMatrix);
1729		setIdentity(modelViewMatrix);
1730		setIdentity(cameraMatrix);
1731		setIdentity(objectMatrix);
	1742	cameraMatrix[12] = uToF(packet[10]);
	1743	cameraMatrix[13] = uToF(packet[11]);
	1744	cameraMatrix[14] = uToF(packet[12]);
	1745	cameraMatrix[15] = 1.0f;
	1746	}
1732	1747
1733		// Display list 2 comes after display list 1.  Go figure.
1734		for (j = 1; j >= 0; j--)
1735		{
1736		UINT32 *workingList = hng64_dls[j];
	1748	// Operation 0011
	1749	// Palette / Model flags?
	1750	static void set3dFlags(const UINT16* packet)
	1751	{
	1752	/*//////////////
	1753	// PACKET FORMAT
	1754	// [0]  - 0011 ... ID
	1755	// [1]  - ???? ...
	1756	// [2]  - ???? ...
	1757	// [3]  - ???? ...
	1758	// [4]  - ???? ...
	1759	// [5]  - ???? ...
	1760	// [6]  - ???? ... ? Flip & flop around like mad during fatfurwa intro
	1761	// [7]  - ???? ... ? Flip & flop around like mad during fatfurwa intro
	1762	// [8]  - xx?? ... Palette offset & ??
	1763	// [9]  - ???? ... ? Very much used - seem to bounce around when characters are on screen
	1764	// [10] - ???? ... ? ''  ''
	1765	// [11] - ???? ... ? ''  ''
	1766	// [12] - ???? ... ? ''  ''
	1767	// [13] - ???? ... ? ''  ''
	1768	// [14] - ???? ... ? ''  ''
	1769	// [15] - ???? ... ? ''  ''
	1770	////////////*/
	1771	paletteState3d  = (packet[8] & 0xff00) >> 8;
	1772	paletteState3d += ((hng64_3dregs[0x00/4] & 0x2000) >> 9); /* Palette is + 0x0800 in buriki. */
	1773	/* FIXME: Buriki One door colors in attract mode still aren't quite right, investigate... */
	1774	}
1737	1775
1738		for (i = 0; i < 0x80; i += 0x08)
1739		{
1740		float left, right, top, bottom, near_, far_;
1741		UINT8 *threeDRoms;
1742		UINT8 *threeDPointer;
1743		UINT32 threeDOffset;
1744		UINT32 size[4];
1745		UINT32 address[4];
1746		UINT32 megaOffset;
1747		float eyeCoords[4];         // objectCoords transformed by the modelViewMatrix
1748		// float clipCoords[4];     // eyeCoords transformed by the projectionMatrix
1749		float ndCoords[4];         // normalized device coordinates/clipCoordinates (x/w, y/w, z/w)
1750		float windowCoords[4];      // mapped ndCoordinates to screen space
1751		float cullRay[4];
	1776	// Operation 0012
	1777	// Projection Matrix.
	1778	static void setCameraProjectionMatrix(const UINT16* packet)
	1779	{
	1780	/*//////////////
	1781	// PACKET FORMAT
	1782	// [0]  - 0012 ... ID
	1783	// [1]  - ???? ... ? Contains a value in buriki's 'how to play' - probably a projection window/offset.
	1784	// [2]  - ???? ... ? Contains a value in buriki's 'how to play' - probably a projection window/offset.
	1785	// [3]  - ???? ... ? Contains a value
	1786	// [4]  - ???? ... ? Contains a value in buriki
	1787	// [5]  - ???? ... ? Contains a value
	1788	// [6]  - xxxx ... camera projection near
	1789	// [7]  - xxxx ... camera projection far
	1790	// [8]  - ???? ... ? Contains a value
	1791	// [9]  - ???? ... ? Contains a value
	1792	// [10] - xxxx ... camera projection right
	1793	// [11] - xxxx ... camera projection left
	1794	// [12] - xxxx ... camera projection top
	1795	// [13] - xxxx ... camera projection bottom
	1796	// [14] - ???? ... ? Gets data during buriki door-run
	1797	// [15] - ???? ... ? Gets data during buriki door-run
	1798	////////////*/
1752	1799
1753		// Debug...
1754		//          mame_printf_debug("Element %.2d (%d) : %.8x %.8x %.8x %.8x %.8x %.8x %.8x %.8x\n", i/0x08, j,
1755		//                             (UINT32)hng64_dls[j][i+0], (UINT32)hng64_dls[j][i+1],
1756		//                             (UINT32)hng64_dls[j][i+2], (UINT32)hng64_dls[j][i+3],
1757		//                             (UINT32)hng64_dls[j][i+4], (UINT32)hng64_dls[j][i+5],
1758		//                             (UINT32)hng64_dls[j][i+6], (UINT32)hng64_dls[j][i+7]);
	1800	// This packet changes when fatfurwa 'How to play' is on the screen.
	1801	// Not too much, but if this is right, the aspect ratio is different...
1759	1802
1760		// Depending on what the initial flags are, do sumthin'...
1761		switch((workingList[i+0] & 0xffff0000) >> 16)
1762		{
1763		case 0x0012:
1764		// UNKNOWN - seems an awful lot parameters for a projection matrix though...
	1803	// Heisted from GLFrustum - 6 parameters...
	1804	float left, right, top, bottom, near_, far_;
1765	1805
1766		;
	1806	left    = uToF(packet[11]);
	1807	right   = uToF(packet[10]);
	1808	top     = uToF(packet[12]);
	1809	bottom  = uToF(packet[13]);
	1810	near_   = uToF(packet[6]);
	1811	far_    = uToF(packet[7]);
1767	1812
1768		// It changes when 'How to play' is on the screen...  not too much, but if this is right, the aspect
1769		// ratio is different...
	1813	projectionMatrix[0]  = (2.0f*near_)/(right-left);
	1814	projectionMatrix[1]  = 0.0f;
	1815	projectionMatrix[2]  = 0.0f;
	1816	projectionMatrix[3]  = 0.0f;
1770	1817
1771		// Heisted from GLFrustum - 6 parameters...
1772		left   = uToF( workingList[i+5] & 0x0000ffff);
1773		right  = uToF((workingList[i+5] & 0xffff0000) >> 16);
1774		top    = uToF((workingList[i+6] & 0xffff0000) >> 16);
1775		bottom = uToF( workingList[i+6] & 0x0000ffff);
1776		near_   = uToF((workingList[i+3] & 0xffff0000) >> 16);
1777		far_    = uToF( workingList[i+3] & 0x0000ffff);
	1818	projectionMatrix[4]  = 0.0f;
	1819	projectionMatrix[5]  = (2.0f*near_)/(top-bottom);
	1820	projectionMatrix[6]  = 0.0f;
	1821	projectionMatrix[7]  = 0.0f;
1778	1822
1779		// It's almost .always. these values in fatfurwa...
1780		// 0.070313    0.000000 [0]     (scaled by 128)
1781		// 0.000000   10.000000 [1]
1782		// 0.000000    0.500000 [2]
1783		// 2.000000   11.062500 [3]
1784		// 10.000000  11.000000 [4]
1785		// 1.000000   -1.000000 [5]
1786		// 0.875000   -0.875000 [6]
1787		// 0.000000    0.000000 [7]
	1823	projectionMatrix[8]  = (right+left)/(right-left);
	1824	projectionMatrix[9]  = (top+bottom)/(top-bottom);
	1825	projectionMatrix[10] = -((far_+near_)/(far_-near_));
	1826	projectionMatrix[11] = -1.0f;
1788	1827
1789		projectionMatrix[0]  = (2.0f*near_)/(right-left);
1790		projectionMatrix[1]  = 0.0f;
1791		projectionMatrix[2]  = 0.0f;
1792		projectionMatrix[3]  = 0.0f;
	1828	projectionMatrix[12] = 0.0f;
	1829	projectionMatrix[13] = 0.0f;
	1830	projectionMatrix[14] = -((2.0f*far_*near_)/(far_-near_));
	1831	projectionMatrix[15] = 0.0f;
	1832	}
1793	1833
1794		projectionMatrix[4]  = 0.0f;
1795		projectionMatrix[5]  = (2.0f*near_)/(top-bottom);
1796		projectionMatrix[6]  = 0.0f;
1797		projectionMatrix[7]  = 0.0f;
	1834	// Operation 0100
	1835	// Polygon rasterization.
	1836	void recoverPolygonBlock(running_machine* machine, const UINT16* packet, struct polygon* polys, int* numPolys)
	1837	{
	1838	/*//////////////
	1839	// PACKET FORMAT
	1840	// [0]  - 0100 ... ID
	1841	// [1]  - xxxx ... Flags for sure (0118 for buriki characters,
	1842	//                                 0010 for buriki door,
	1843	//                                 0110 for fatfurwa hng64,
	1844	//                                 0118|0108 for fatfurwa building intro,
	1845	//                                 0118|0108 for fatfurwa fighters infight,
	1846	//                                 0108->0118 for fatfurwa globe (transitions when players are selected,
	1847	//                                 00d8 for segfaulting geo in xrally & roadedge)
	1848	//                                (00!0 is thought to be for lighting maybe?)
	1849	// [2]  - xxxx ... offset into ROM
	1850	// [3]  - xxxx ... offset into ROM
	1851	// [4]  - xxxx ... Transformation matrix
	1852	// [5]  - xxxx ... Transformation matrix
	1853	// [6]  - xxxx ... Transformation matrix
	1854	// [7]  - xxxx ... Transformation matrix
	1855	// [8]  - xxxx ... Transformation matrix
	1856	// [9]  - xxxx ... Transformation matrix
	1857	// [10] - xxxx ... Transformation matrix
	1858	// [11] - xxxx ... Transformation matrix
	1859	// [12] - xxxx ... Transformation matrix
	1860	// [13] - ???? ... Transformation matrix
	1861	// [14] - ???? ... Transformation matrix
	1862	// [15] - ???? ... Transformation matrix
	1863	////////////*/
	1864	int k, l, m;
1798	1865
1799		projectionMatrix[8]  = (right+left)/(right-left);
1800		projectionMatrix[9]  = (top+bottom)/(top-bottom);
1801		projectionMatrix[10] = -((far_+near_)/(far_-near_));
1802		projectionMatrix[11] = -1.0f;
	1866	UINT32  tempDWord;
	1867	UINT32  threeDOffset;
	1868	UINT16* threeDRoms;
	1869	UINT16* threeDPointer;
1803	1870
1804		projectionMatrix[12] = 0.0f;
1805		projectionMatrix[13] = 0.0f;
1806		projectionMatrix[14] = -((2.0f*far_*near_)/(far_-near_));
1807		projectionMatrix[15] = 0.0f;
	1871	UINT32 size[4];
	1872	UINT32 address[4];
	1873	UINT32 megaOffset;
	1874	float eyeCoords[4];         // ObjectCoords transformed by the modelViewMatrix
	1875	// float clipCoords[4];     // EyeCoords transformed by the projectionMatrix
	1876	float ndCoords[4];         // Normalized device coordinates/clipCoordinates (x/w, y/w, z/w)
	1877	float windowCoords[4];      // Mapped ndCoordinates to screen space
	1878	float cullRay[4];
1808	1879
1809		/*
1810		int xxx;
1811		for (xxx = 0; xxx < 16; xxx++)
1812		mame_printf_debug("%f ", projectionMatrix[xxx]);
1813		mame_printf_debug("\n");
	1880	float objectMatrix[16];
	1881	struct polygon lastPoly = { 0 };
1814	1882
1815		mame_printf_debug("Vars   : %f %f %f %f %f %f\n", left, right, top, bottom, near, far);
1816		mame_printf_debug("Camera : %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f\n",
1817		uToF((workingList[i+0] & 0xffff0000) >> 16)*128, uToF( workingList[i+0] & 0x0000ffff)*128,
1818		uToF((workingList[i+1] & 0xffff0000) >> 16)*128, uToF( workingList[i+1] & 0x0000ffff)*128,
	1883	const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen);
1819	1884
1820		uToF((workingList[i+2] & 0xffff0000) >> 16)*128, uToF( workingList[i+2] & 0x0000ffff)*128,
1821		uToF((workingList[i+3] & 0xffff0000) >> 16)*128, uToF( workingList[i+3] & 0x0000ffff)*128,
	1885	// GEOMETRY
	1886	setIdentity(objectMatrix);
1822	1887
1823		uToF((workingList[i+4] & 0xffff0000) >> 16)*128, uToF( workingList[i+4] & 0x0000ffff)*128,
1824		uToF((workingList[i+5] & 0xffff0000) >> 16)*128, uToF( workingList[i+5] & 0x0000ffff)*128,
	1888	/////////////////
	1889	// HEADER INFO //
	1890	/////////////////
1825	1891
1826		uToF((workingList[i+6] & 0xffff0000) >> 16)*128, uToF( workingList[i+6] & 0x0000ffff)*128,
1827		uToF((workingList[i+7] & 0xffff0000) >> 16)*128, uToF( workingList[i+7] & 0x0000ffff)*128);
1828		*/
	1892	// 3d ROM Offset
	1893	tempDWord = (((UINT32)packet[2]) << 16) | ((UINT32)packet[3]);
	1894	threeDOffset = tempDWord & 0xffffffff;
1829	1895
1830		break;
	1896	threeDRoms = (UINT16*)(memory_region(machine, "verts"));
	1897	threeDPointer = &threeDRoms[threeDOffset * 3];
1831	1898
1832		case 0x0001:
1833		// CAMERA TRANSFORMATION MATRIX
1834		cameraMatrix[0]  = uToF( workingList[i+0] & 0x0000ffff);
1835		cameraMatrix[4]  = uToF((workingList[i+1] & 0xffff0000) >> 16);
1836		cameraMatrix[8]  = uToF( workingList[i+1] & 0x0000ffff);
1837		cameraMatrix[3]  = 0.0f;
	1899	// Debug - ajg
	1900	/*
	1901	printf("%08x : ", tempDWord*3*2);
	1902	for (k = 0; k < 7*3; k++)
	1903	{
	1904	printf("%04x ", threeDPointer[k]);
	1905	if ((k % 3) == 2) printf(" ");
	1906	}
	1907	printf("\n");
	1908	*/
1838	1909
1839		cameraMatrix[1]  = uToF((workingList[i+2] & 0xffff0000) >> 16);
1840		cameraMatrix[5]  = uToF( workingList[i+2] & 0x0000ffff);
1841		cameraMatrix[9]  = uToF((workingList[i+3] & 0xffff0000) >> 16);
1842		cameraMatrix[7]  = 0.0f;
	1910	//////////////////////////////////////
	1911	// THE OBJECT TRANSFORMATION MATRIX //
	1912	//////////////////////////////////////
	1913	objectMatrix[8] = uToF(packet[7]);
	1914	objectMatrix[4] = uToF(packet[8]);
	1915	objectMatrix[0] = uToF(packet[9]);
	1916	objectMatrix[3] = 0.0f;
1843	1917
1844		cameraMatrix[2]  = uToF( workingList[i+3] & 0x0000ffff);
1845		cameraMatrix[6]  = uToF((workingList[i+4] & 0xffff0000) >> 16);
1846		cameraMatrix[10] = uToF( workingList[i+4] & 0x0000ffff);
1847		cameraMatrix[11] = 0.0f;
	1918	objectMatrix[9] = uToF(packet[10]);
	1919	objectMatrix[5] = uToF(packet[11]);
	1920	objectMatrix[1] = uToF(packet[12]);
	1921	objectMatrix[7] = 0.0f;
1848	1922
1849		cameraMatrix[12] = uToF((workingList[i+5] & 0xffff0000) >> 16);
1850		cameraMatrix[13] = uToF( workingList[i+5] & 0x0000ffff);
1851		cameraMatrix[14] = uToF((workingList[i+6] & 0xffff0000) >> 16);
1852		cameraMatrix[15] = 1.0f;
1853		break;
	1923	objectMatrix[10] = uToF(packet[13]);
	1924	objectMatrix[6 ] = uToF(packet[14]);
	1925	objectMatrix[2 ] = uToF(packet[15]);
	1926	objectMatrix[11] = 0.0f;
1854	1927
1855		case 0x0010:
1856		// UNKNOWN - light maybe
1857		break;
	1928	objectMatrix[12] = uToF(packet[4]);
	1929	objectMatrix[13] = uToF(packet[5]);
	1930	objectMatrix[14] = uToF(packet[6]);
	1931	objectMatrix[15] = 1.0f;
1858	1932
1859		case 0x0011:
1860		// Model Flags?
1861		// 00110000 00000000 00000100 01000100 0400-0000 00007fff 00000000 00000020
1862		// ----                                pal  ---- -------- -------- -------- not used (known)
1863		paletteState = (workingList[i+4] & 0xff000000) >> 24;
1864		paletteState+=((hng64_3dregs[0x00/4] & 0x2000) >> 9); //framebuffer base color reg? Used by Buriki One
1865		/* FIXME: Buriki One door colors in attract mode still aren't quite right, investigate... */
1866		break;
1867	1933
1868		case 0x0100:
1869		// GEOMETRY
1870		;
	1934	//////////////////////////////////////////////////////////
	1935	// EXTRACT DATA FROM THE ADDRESS POINTED TO IN THE FILE //
	1936	//////////////////////////////////////////////////////////
	1937	/*//////////////////////////////////////////////
	1938	// DIRECTLY-POINTED-TO FORMAT (7 words x 3 ROMs)
	1939	// [0]  - lower word of sub-address 1
	1940	// [1]  - lower word of sub-address 2
	1941	// [2]  - upper word of all sub-addresses
	1942	// [3]  - lower word of sub-address 3
	1943	// [4]  - lower word of sub-address 4
	1944	// [5]  - ???? always 0 ????
	1945	// [6]  - number of triangles in sub-address 1 block
	1946	// [7]  - number of triangles in sub-address 2 block
	1947	// [8]  - ???? always 0 ????
	1948	// [9]  - number of triangles in sub-address 3 block
	1949	// [10] - number of triangles in sub-address 4 block
	1950	// [11] - ? definitely used.
	1951	// [12] - ? definitely used.
	1952	// [13] - ? definitely used.
	1953	// [14] - ? definitely used.
	1954	// [15] - ???? always 0 ????
	1955	// [16] - ???? always 0 ????
	1956	// [17] - ???? always 0 ????
	1957	// [18] - ???? always 0 ????
	1958	// [19] - ???? always 0 ????
	1959	// [20] - ???? always 0 ????
	1960	//////////////////////////////////////////////*/
1871	1961
1872		threeDRoms = memory_region(machine, "verts");
	1962	// There are 4 hunks per address.
	1963	address[0] = threeDPointer[0];
	1964	address[1] = threeDPointer[1];
	1965	megaOffset = threeDPointer[2];
1873	1966
1874		/////////////////////////
1875		// GET THE HEADER INFO //
1876		/////////////////////////
	1967	address[2] = threeDPointer[3];
	1968	address[3] = threeDPointer[4];
	1969	if (threeDPointer[5] != 0x0000) printf("ZOMG!  3dPointer[5] is non-zero!\n");
1877	1970
1878		// 3d ROM Offset
1879		// !!! This might be more than just 20 bits...
1880		threeDOffset = workingList[i+1] & 0x000fffff;
1881		threeDOffset = (threeDOffset<<1) * 3;
	1971	size[0]    = threeDPointer[6];
	1972	size[1]    = threeDPointer[7];
	1973	if (threeDPointer[8] != 0x0000) printf("ZOMG!  3dPointer[8] is non-zero!\n");
1882	1974
1883		threeDPointer = &threeDRoms[threeDOffset];
	1975	size[2]    = threeDPointer[9];
	1976	size[3]    = threeDPointer[10];
	1977	/*           ????         [11]; Used. */
1884	1978
	1979	/*           ????         [12]; Used. */
	1980	/*           ????         [13]; Used. */
	1981	/*           ????         [14]; Used. */
1885	1982
1886		// 66 byte versus 48 byte chunk flag
1887		//    WRONG !  I think it's something to do with lighting...
1888		//    it's 0 for the 66-byte lit globe in the character select and 0 for something in terry's hand...
1889		// if (workingList[i+0] & 0x00000010)
	1983	/*           ????         [15]; Used? */
	1984	/*           ????         [16]; Used? */
	1985	/*           ????         [17]; Used? */
1890	1986
	1987	/*           ????         [18]; Used? */
	1988	/*           ????         [19]; Used? */
	1989	/*           ????         [20]; Used? */
1891	1990
1892		//////////////////////////////////////////
1893		// GET THE OBJECT TRANSFORMATION MATRIX //
1894		//////////////////////////////////////////
	1991	/* Concatenate the megaOffset with the addresses */
	1992	address[0] |= (megaOffset << 16);
	1993	address[1] |= (megaOffset << 16);
	1994	address[2] |= (megaOffset << 16);
	1995	address[3] |= (megaOffset << 16);
1895	1996
1896		objectMatrix[8 ] = uToF( workingList[i+3] & 0x0000ffff);
1897		objectMatrix[4 ] = uToF((workingList[i+4] & 0xffff0000) >> 16);
1898		objectMatrix[0 ] = uToF( workingList[i+4] & 0x0000ffff);
1899		objectMatrix[3]  = 0.0f;
	1997	/* For all 4 polygon chunks */
	1998	for (k = 0; k < 4; k++)
	1999	{
	2000	threeDPointer = &threeDRoms[address[k] * 3];
	2001	for (l = 0; l < size[k]; l++)
	2002	{
	2003	////////////////////////////////////////////
	2004	// GATHER A SINGLE TRIANGLE'S INFORMATION //
	2005	////////////////////////////////////////////
	2006	/*/////////////////////////
	2007	// SINGLE POLY CHUNK FORMAT
	2008	// [0] ??-- - ???? unused ????
	2009	// [0] --xx - chunk type
	2010	// [1] x--- - 'texture type' (or UV-mapping style)?
	2011	// [1] -??- - ???? '18' for untextured buildings in fatfurwa ????
	2012	// [1] ---x - texture index
	2013	// [2] ???? - used in fatfurwa 'hng64' & everywhere in roadedge
	2014	/////////////////////////*/
	2015	UINT8 chunkLength = 0;
	2016	UINT8 chunkType = threeDPointer[0] & 0x00ff;
1900	2017
1901		objectMatrix[9 ] = uToF((workingList[i+5] & 0xffff0000) >> 16);
1902		objectMatrix[5 ] = uToF( workingList[i+5] & 0x0000ffff);
1903		objectMatrix[1 ] = uToF((workingList[i+6] & 0xffff0000) >> 16);
1904		objectMatrix[7]  = 0.0f;
	2018	// Debug - ajg
	2019	//printf("%d (%08x) : %04x %04x %04x ", k, address[k]*3*2, threeDPointer[0], threeDPointer[1], threeDPointer[2]);
	2020	//break;
1905	2021
1906		objectMatrix[10] = uToF( workingList[i+6] & 0x0000ffff);
1907		objectMatrix[6 ] = uToF((workingList[i+7] & 0xffff0000) >> 16);
1908		objectMatrix[2 ] = uToF( workingList[i+7] & 0x0000ffff);
1909		objectMatrix[11] = 0.0f;
	2022	// Debug - ajg
	2023	//if ((threeDPointer[0] & 0xff00) != 0x0000)
	2024	//{
	2025	//  printf("!!! Doesn't appear to be a valid chunk !!!\n");
	2026	//  continue;
	2027	//}
1910	2028
1911		objectMatrix[12] = uToF((workingList[i+2] & 0xffff0000) >> 16);
1912		objectMatrix[13] = uToF( workingList[i+2] & 0x0000ffff);
1913		objectMatrix[14] = uToF((workingList[i+3] & 0xffff0000) >> 16);
1914		objectMatrix[15] = 1.0f;
	2029	// Get which texture this polygon refers to...
	2030	// In fatfur it's 0xc for the smooth-shaded earth - maybe this is for all things with alpha - check the hair at some point.
	2031	//                0x9 for the untextured buildings
	2032	//                0xd for the 'explosion' of the HNG64
	2033	//            and 0x8 everywhere else...
	2034	//        they're 0x8 in the buriki intro too (those are 66-byte chunks!)
	2035	polys[*numPolys].texType = ((threeDPointer[1] & 0xf000) >> 4 >> 8);
1915	2036
	2037	if (polys[*numPolys].texType == 0x8 || polys[*numPolys].texType == 0xc)      //  || polys[*numPolys].texType == 0x9
	2038	{
	2039	polys[*numPolys].texIndex = threeDPointer[1] & 0x000f;
	2040	}
	2041	else
	2042	{
	2043	polys[*numPolys].texIndex = -1;
	2044	}
1916	2045
	2046	// Set the polygon's palette
	2047	polys[*numPolys].palIndex = paletteState3d;
1917	2048
1918		//////////////////////////////////////////////////////////
1919		// EXTRACT DATA FROM THE ADDRESS POINTED TO IN THE FILE //
1920		//////////////////////////////////////////////////////////
	2049	switch(chunkType)
	2050	{
	2051	/*/////////////////////////
	2052	// CHUNK TYPE BITS - These are very likely incorrect.
	2053	// x--- ---- - 1 = Has only 1 vertex (part of a triangle fan/strip)
	2054	// -x-- ---- -
	2055	// --x- ---- -
	2056	// ---x ---- -
	2057	// ---- x--- -
	2058	// ---- -x-- - 1 = Has per-vert UVs
	2059	// ---- --x- -
	2060	// ---- ---x - 1 = Has per-vert normals
	2061	/////////////////////////*/
1921	2062
1922		// Okay, there are 4 hunks per address.  They all seem good too...
	2063	// 33 word chunk, 3 vertices, per-vertex UVs & normals
	2064	case 0x05:   // 0000 0101
	2065	case 0x0f:   // 0000 1111
	2066	for (m = 0; m < 3; m++)
	2067	{
	2068	polys[*numPolys].vert[m].worldCoords[0] = uToF(threeDPointer[3 + (9*m)]);
	2069	polys[*numPolys].vert[m].worldCoords[1] = uToF(threeDPointer[4 + (9*m)]);
	2070	polys[*numPolys].vert[m].worldCoords[2] = uToF(threeDPointer[5 + (9*m)]);
	2071	polys[*numPolys].vert[m].worldCoords[3] = 1.0f;
	2072	polys[*numPolys].n = 3;
1923	2073
1924		// First tell me how many 'chunks' are at each address...
1925		size[0] = WORD_AT( threeDPointer, ( 6<<1) );
1926		size[1] = WORD_AT( threeDPointer, ( 7<<1) );
1927		size[2] = WORD_AT( threeDPointer, ( 9<<1) );
1928		size[3] = WORD_AT( threeDPointer, (10<<1) );
	2074	// threeDPointer[6 + (9*m)] is almost always 0080, but it's 0070 for the translucent globe in fatfurwa player select
	2075	polys[*numPolys].vert[m].texCoords[0] = uToF(threeDPointer[7 + (9*m)]);
	2076	polys[*numPolys].vert[m].texCoords[1] = uToF(threeDPointer[8 + (9*m)]);
	2077	polys[*numPolys].vert[m].texCoords[2] = 0.0f;
	2078	polys[*numPolys].vert[m].texCoords[3] = 1.0f;
1929	2079
1930		megaOffset = ( WORD_AT(threeDRoms, (threeDOffset + 4)) ) << 16;
1931		address[0] = megaOffset | WORD_AT(threeDPointer, (0<<1));
1932		address[1] = megaOffset | WORD_AT(threeDPointer, (1<<1));
1933		address[2] = megaOffset | WORD_AT(threeDPointer, (3<<1));
1934		address[3] = megaOffset | WORD_AT(threeDPointer, (4<<1));
	2080	polys[*numPolys].vert[m].normal[0] = uToF(threeDPointer[9  + (9*m)]);
	2081	polys[*numPolys].vert[m].normal[1] = uToF(threeDPointer[10 + (9*m)] );
	2082	polys[*numPolys].vert[m].normal[2] = uToF(threeDPointer[11 + (9*m)] );
	2083	polys[*numPolys].vert[m].normal[3] = 0.0f;
1935	2084
1936		// DEBUG
1937		// mame_printf_debug("%.5x %.3x %.5x %.3x %.5x %.3x %.5x %.3x\n", address[0], size[0], address[1], size[1], address[2], size[2], address[3], size[3]);
1938		// !! END DEBUG !!
	2085	// !!! DUMB !!!
	2086	polys[*numPolys].vert[m].light[0] = polys[*numPolys].vert[m].texCoords[0] * 255.0f;
	2087	polys[*numPolys].vert[m].light[1] = polys[*numPolys].vert[m].texCoords[1] * 255.0f;
	2088	polys[*numPolys].vert[m].light[2] = polys[*numPolys].vert[m].texCoords[2] * 255.0f;
	2089	}
1939	2090
	2091	// Redundantly called, but it works...
	2092	polys[*numPolys].faceNormal[0] = uToF(threeDPointer[30]);
	2093	polys[*numPolys].faceNormal[1] = uToF(threeDPointer[31]);
	2094	polys[*numPolys].faceNormal[2] = uToF(threeDPointer[32]);
	2095	polys[*numPolys].faceNormal[3] = 0.0f;
1940	2096
	2097	chunkLength = 33;
	2098	break;
1941	2099
1942		////////////////////////////////////
1943		// A FEW 'GLOBAL' TRANSFORMATIONS //
1944		////////////////////////////////////
1945	2100
1946		// Now perform the world transformations...
1947		// !! Can eliminate this step with a matrix stack (maybe necessary?) !!
1948		setIdentity(modelViewMatrix);
1949		matmul4(modelViewMatrix, modelViewMatrix, cameraMatrix);
1950		matmul4(modelViewMatrix, modelViewMatrix, objectMatrix);
1951
1952		for (k = 0; k < 4; k++)                              // For all 4 chunks
	2101	// 24 word chunk, 3 vertices, per-vertex UVs
	2102	case 0x04:   // 0000 0100
	2103	case 0x0e:   // 0000 1110
	2104	for (m = 0; m < 3; m++)
1953	2105	{
1954		threeDPointer = &threeDRoms[(address[k]<<1) * 3];
	2106	polys[*numPolys].vert[m].worldCoords[0] = uToF(threeDPointer[3 + (6*m)]);
	2107	polys[*numPolys].vert[m].worldCoords[1] = uToF(threeDPointer[4 + (6*m)]);
	2108	polys[*numPolys].vert[m].worldCoords[2] = uToF(threeDPointer[5 + (6*m)]);
	2109	polys[*numPolys].vert[m].worldCoords[3] = 1.0f;
	2110	polys[*numPolys].n = 3;
1955	2111
1956		for (l = 0; l < size[k]; l++)
1957		{
1958		////////////////////////////////////////////
1959		// GATHER A SINGLE TRIANGLE'S INFORMATION //
1960		////////////////////////////////////////////
	2112	// threeDPointer[6 + (6*m)] is almost always 0080, but it's 0070 for the translucent globe in fatfurwa player select
	2113	polys[*numPolys].vert[m].texCoords[0] = uToF(threeDPointer[7 + (6*m)]);
	2114	polys[*numPolys].vert[m].texCoords[1] = uToF(threeDPointer[8 + (6*m)]);
	2115	polys[*numPolys].vert[m].texCoords[2] = 0.0f;
	2116	polys[*numPolys].vert[m].texCoords[3] = 1.0f;
1961	2117
1962		UINT8 triangleType = threeDPointer[1];
	2118	polys[*numPolys].vert[m].normal[0] = uToF(threeDPointer[21]);
	2119	polys[*numPolys].vert[m].normal[1] = uToF(threeDPointer[22]);
	2120	polys[*numPolys].vert[m].normal[2] = uToF(threeDPointer[23]);
	2121	polys[*numPolys].vert[m].normal[3] = 0.0f;
1963	2122
1964		UINT8 numVertices = 3;
1965		UINT8 chunkLength = 0;
	2123	// !!! DUMB !!!
	2124	polys[*numPolys].vert[m].light[0] = polys[*numPolys].vert[m].texCoords[0] * 255.0f;
	2125	polys[*numPolys].vert[m].light[1] = polys[*numPolys].vert[m].texCoords[1] * 255.0f;
	2126	polys[*numPolys].vert[m].light[2] = polys[*numPolys].vert[m].texCoords[2] * 255.0f;
	2127	}
1966	2128
1967		// Some chunks only have 1 vertex (they act as a vertex fan)
1968		if (triangleType == 0x97 ||
1969		triangleType == 0x87 ||
1970		triangleType == 0xd7 ||
1971		triangleType == 0x96)
1972		numVertices = 1;
	2129	// Redundantly called, but it works...
	2130	polys[*numPolys].faceNormal[0] = polys[*numPolys].vert[m].normal[0];
	2131	polys[*numPolys].faceNormal[1] = polys[*numPolys].vert[m].normal[1];
	2132	polys[*numPolys].faceNormal[2] = polys[*numPolys].vert[m].normal[2];
	2133	polys[*numPolys].faceNormal[3] = 0.0f;
1973	2134
1974		// Get which texture this polygon refers to...
1975		// In fatfur it's 0xc for the smooth-shaded earth       - maybe this is for all things with alpha - check the hair at some point...
1976		//                0x9 for the untextured buildings
1977		//                0xd for the 'explosion' of the HNG64
1978		//            and 0x8 everywhere else...
1979		//        they're 0x8 in the buriki intro too (those are 66-byte chunks!)
1980		polys[numPolys].texType = ((threeDPointer[2] & 0xf0) >> 4);
	2135	chunkLength = 24;
	2136	break;
1981	2137
1982		if (polys[numPolys].texType == 0x8 || polys[numPolys].texType == 0xc)      //  || polys[numPolys].texType == 0x9
1983		polys[numPolys].texIndex = threeDPointer[3] & 0x0f;
1984		else
1985		polys[numPolys].texIndex = -1;
1986	2138
1987		// Set the polygon's palette
1988		polys[numPolys].palIndex = paletteState;
	2139	// 15 word chunk, 1 vertex, per-vertex UVs & normals
	2140	case 0x97:   // 1001 0111
	2141	case 0x87:   // 1000 0111
	2142	case 0xd7:   // 1101 0111
	2143	// Copy over the proper vertices from the previous triangle...
	2144	memcpy(&polys[*numPolys].vert[1], &lastPoly.vert[0], sizeof(struct polyVert));
	2145	memcpy(&polys[*numPolys].vert[2], &lastPoly.vert[2], sizeof(struct polyVert));
1989	2146
1990		for (m = 0; m < numVertices; m++)                        // For all vertices of the chunk
1991		{
1992		switch(triangleType)
1993		{
1994		// 42 byte chunk
1995		case 0x04:
1996		case 0x0e:
1997		polys[numPolys].vert[m].worldCoords[0] = uToF(WORD_AT(threeDPointer, ((3<<1) + (6<<1)*m)) );
1998		polys[numPolys].vert[m].worldCoords[1] = uToF(WORD_AT(threeDPointer, ((4<<1) + (6<<1)*m)) );
1999		polys[numPolys].vert[m].worldCoords[2] = uToF(WORD_AT(threeDPointer, ((5<<1) + (6<<1)*m)) );
2000		polys[numPolys].vert[m].worldCoords[3] = 1.0f;
2001		polys[numPolys].n = 3;
	2147	// Fill in the appropriate data...
	2148	polys[*numPolys].vert[0].worldCoords[0] = uToF(threeDPointer[3]);
	2149	polys[*numPolys].vert[0].worldCoords[1] = uToF(threeDPointer[4]);
	2150	polys[*numPolys].vert[0].worldCoords[2] = uToF(threeDPointer[5]);
	2151	polys[*numPolys].vert[0].worldCoords[3] = 1.0f;
	2152	polys[*numPolys].n = 3;
2002	2153
2003		// !! What is the first coordinate here (6) - maybe denotes size of chunk? !!
2004		polys[numPolys].vert[m].texCoords[0] = uToF(WORD_AT(threeDPointer, ((7<<1) + (6<<1)*m)) );
2005		polys[numPolys].vert[m].texCoords[1] = uToF(WORD_AT(threeDPointer, ((8<<1) + (6<<1)*m)) );
2006		polys[numPolys].vert[m].texCoords[2] = 0.0f;
2007		polys[numPolys].vert[m].texCoords[3] = 1.0f;
	2154	// threeDPointer[6] is almost always 0080, but it's 0070 for the translucent globe in fatfurwa player select
	2155	polys[*numPolys].vert[0].texCoords[0] = uToF(threeDPointer[7]);
	2156	polys[*numPolys].vert[0].texCoords[1] = uToF(threeDPointer[8]);
	2157	polys[*numPolys].vert[0].texCoords[2] = 0.0f;
	2158	polys[*numPolys].vert[0].texCoords[3] = 1.0f;
2008	2159
2009		polys[numPolys].vert[m].normal[0] = uToF(WORD_AT(threeDPointer, (21<<1) ));
2010		polys[numPolys].vert[m].normal[1] = uToF(WORD_AT(threeDPointer, (22<<1) ));
2011		polys[numPolys].vert[m].normal[2] = uToF(WORD_AT(threeDPointer, (23<<1) ));
2012		polys[numPolys].vert[m].normal[3] = 0.0f;
	2160	polys[*numPolys].vert[0].normal[0] = uToF(threeDPointer[9]);
	2161	polys[*numPolys].vert[0].normal[1] = uToF(threeDPointer[10]);
	2162	polys[*numPolys].vert[0].normal[2] = uToF(threeDPointer[11]);
	2163	polys[*numPolys].vert[0].normal[3] = 0.0f;
2013	2164
2014		// !!! DUMB !!!
2015		polys[numPolys].vert[m].light[0] = polys[numPolys].vert[m].texCoords[0] * 255.0f;
2016		polys[numPolys].vert[m].light[1] = polys[numPolys].vert[m].texCoords[1] * 255.0f;
2017		polys[numPolys].vert[m].light[2] = polys[numPolys].vert[m].texCoords[2] * 255.0f;
	2165	polys[*numPolys].vert[0].light[0] = polys[*numPolys].vert[0].texCoords[0] * 255.0f;
	2166	polys[*numPolys].vert[0].light[1] = polys[*numPolys].vert[0].texCoords[1] * 255.0f;
	2167	polys[*numPolys].vert[0].light[2] = polys[*numPolys].vert[0].texCoords[2] * 255.0f;
2018	2168
2019		// Redundantly called, but it works...
2020		polys[numPolys].faceNormal[0] = polys[numPolys].vert[m].normal[0];
2021		polys[numPolys].faceNormal[1] = polys[numPolys].vert[m].normal[1];
2022		polys[numPolys].faceNormal[2] = polys[numPolys].vert[m].normal[2];
2023		polys[numPolys].faceNormal[3] = 0.0f;
	2169	polys[*numPolys].faceNormal[0] = uToF(threeDPointer[12]);
	2170	polys[*numPolys].faceNormal[1] = uToF(threeDPointer[13]);
	2171	polys[*numPolys].faceNormal[2] = uToF(threeDPointer[14]);
	2172	polys[*numPolys].faceNormal[3] = 0.0f;
2024	2173
2025		chunkLength = (24<<1);
2026		break;
	2174	chunkLength = 15;
	2175	break;
2027	2176
2028		// 66 byte chunk
2029		case 0x05:
2030		case 0x0f:
2031		polys[numPolys].vert[m].worldCoords[0] = uToF(WORD_AT(threeDPointer, ((3<<1) + (9<<1)*m)) );
2032		polys[numPolys].vert[m].worldCoords[1] = uToF(WORD_AT(threeDPointer, ((4<<1) + (9<<1)*m)) );
2033		polys[numPolys].vert[m].worldCoords[2] = uToF(WORD_AT(threeDPointer, ((5<<1) + (9<<1)*m)) );
2034		polys[numPolys].vert[m].worldCoords[3] = 1.0f;
2035		polys[numPolys].n = 3;
2036	2177
2037		// !! See above - (6) - why? !!
2038		polys[numPolys].vert[m].texCoords[0] = uToF(WORD_AT(threeDPointer, ((7<<1) + (9<<1)*m)) );
2039		polys[numPolys].vert[m].texCoords[1] = uToF(WORD_AT(threeDPointer, ((8<<1) + (9<<1)*m)) );
2040		polys[numPolys].vert[m].texCoords[2] = 0.0f;
2041		polys[numPolys].vert[m].texCoords[3] = 1.0f;
	2178	// 12 word chunk, 1 vertex, per-vertex UVs
	2179	case 0x96:   // 1001 0110
	2180	// Copy over the proper vertices from the previous triangle...
	2181	memcpy(&polys[*numPolys].vert[1], &lastPoly.vert[0], sizeof(struct polyVert));
	2182	memcpy(&polys[*numPolys].vert[2], &lastPoly.vert[2], sizeof(struct polyVert));
2042	2183
2043		polys[numPolys].vert[m].normal[0] = uToF(WORD_AT(threeDPointer, ((9<<1) + (9<<1)*m)) );
2044		polys[numPolys].vert[m].normal[1] = uToF(WORD_AT(threeDPointer, ((10<<1) + (9<<1)*m)) );
2045		polys[numPolys].vert[m].normal[2] = uToF(WORD_AT(threeDPointer, ((11<<1) + (9<<1)*m)) );
2046		polys[numPolys].vert[m].normal[3] = 0.0f;
	2184	polys[*numPolys].vert[0].worldCoords[0] = uToF(threeDPointer[3]);
	2185	polys[*numPolys].vert[0].worldCoords[1] = uToF(threeDPointer[4]);
	2186	polys[*numPolys].vert[0].worldCoords[2] = uToF(threeDPointer[5]);
	2187	polys[*numPolys].vert[0].worldCoords[3] = 1.0f;
	2188	polys[*numPolys].n = 3;
2047	2189
2048		// !!! DUMB !!!
2049		polys[numPolys].vert[m].light[0] = polys[numPolys].vert[m].texCoords[0] * 255.0f;
2050		polys[numPolys].vert[m].light[1] = polys[numPolys].vert[m].texCoords[1] * 255.0f;
2051		polys[numPolys].vert[m].light[2] = polys[numPolys].vert[m].texCoords[2] * 255.0f;
	2190	// threeDPointer[6] is almost always 0080, but it's 0070 for the translucent globe in fatfurwa player select
	2191	polys[*numPolys].vert[0].texCoords[0] = uToF(threeDPointer[7]);
	2192	polys[*numPolys].vert[0].texCoords[1] = uToF(threeDPointer[8]);
	2193	polys[*numPolys].vert[0].texCoords[2] = 0.0f;
	2194	polys[*numPolys].vert[0].texCoords[3] = 1.0f;
2052	2195
2053		// Redundantly called, but it works...
2054		polys[numPolys].faceNormal[0] = uToF(WORD_AT(threeDPointer, (30<<1) ));
2055		polys[numPolys].faceNormal[1] = uToF(WORD_AT(threeDPointer, (31<<1) ));
2056		polys[numPolys].faceNormal[2] = uToF(WORD_AT(threeDPointer, (32<<1) ));
2057		polys[numPolys].faceNormal[3] = 0.0f;
	2196	// !!! DUMB !!!
	2197	polys[*numPolys].vert[0].light[0] = polys[*numPolys].vert[0].texCoords[0] * 255.0f;
	2198	polys[*numPolys].vert[0].light[1] = polys[*numPolys].vert[0].texCoords[1] * 255.0f;
	2199	polys[*numPolys].vert[0].light[2] = polys[*numPolys].vert[0].texCoords[2] * 255.0f;
2058	2200
2059		chunkLength = (33<<1);
2060		break;
	2201	// This normal could be right, but I'm not entirely sure - there is no normal in the 18 bytes!
	2202	polys[*numPolys].vert[0].normal[0] = lastPoly.faceNormal[0];
	2203	polys[*numPolys].vert[0].normal[1] = lastPoly.faceNormal[1];
	2204	polys[*numPolys].vert[0].normal[2] = lastPoly.faceNormal[2];
	2205	polys[*numPolys].vert[0].normal[3] = lastPoly.faceNormal[3];
2061	2206
2062		// 30 byte chunk
2063		case 0x97:
2064		case 0x87:
2065		case 0xd7:
	2207	polys[*numPolys].faceNormal[0] = lastPoly.faceNormal[0];
	2208	polys[*numPolys].faceNormal[1] = lastPoly.faceNormal[1];
	2209	polys[*numPolys].faceNormal[2] = lastPoly.faceNormal[2];
	2210	polys[*numPolys].faceNormal[3] = lastPoly.faceNormal[3];
2066	2211
2067		// Copy over the proper vertices from the previous triangle...
2068		memcpy(&polys[numPolys].vert[1], &lastPoly.vert[0], sizeof(struct polyVert));
2069		memcpy(&polys[numPolys].vert[2], &lastPoly.vert[2], sizeof(struct polyVert));
	2212	// TODO: I'm not reading 3 necessary words here (maybe face normal) !!!
2070	2213
2071		// Fill in the appropriate data...
2072		polys[numPolys].vert[0].worldCoords[0] = uToF(WORD_AT(threeDPointer, (3<<1) ));
2073		polys[numPolys].vert[0].worldCoords[1] = uToF(WORD_AT(threeDPointer, (4<<1) ));
2074		polys[numPolys].vert[0].worldCoords[2] = uToF(WORD_AT(threeDPointer, (5<<1) ));
2075		polys[numPolys].vert[0].worldCoords[3] = 1.0f;
2076		polys[numPolys].n = 3;
	2214	chunkLength = 12;
	2215	break;
2077	2216
2078		// !! See above - (6) - why? !!
2079		polys[numPolys].vert[0].texCoords[0] = uToF(WORD_AT(threeDPointer, (7<<1) ));
2080		polys[numPolys].vert[0].texCoords[1] = uToF(WORD_AT(threeDPointer, (8<<1) ));
2081		polys[numPolys].vert[0].texCoords[2] = 0.0f;
2082		polys[numPolys].vert[0].texCoords[3] = 1.0f;
	2217	#if 0
	2218	// TODO: DECODE THESE GUYS //
	2219	case 0x2e:   // 0010 1110
	2220	/* There's something fishy about this guy - see 0x7a below.  Very likely not fixed-length */
	2221	/*
	2222	printf("0x2e : %08x\n", address[k]*3*2);
	2223	for (m = 0; m < 37; m++)
	2224	printf("%04x ", threeDPointer[m]);
	2225	printf("\n\n");
	2226	*/
	2227	chunkLength = 36;
	2228	break;
2083	2229
2084		polys[numPolys].vert[0].normal[0] = uToF(WORD_AT(threeDPointer, (9<<1) ));
2085		polys[numPolys].vert[0].normal[1] = uToF(WORD_AT(threeDPointer, (10<<1) ));
2086		polys[numPolys].vert[0].normal[2] = uToF(WORD_AT(threeDPointer, (11<<1) ));
2087		polys[numPolys].vert[0].normal[3] = 0.0f;
	2230	/* This shouldn't exist. */
	2231	/* There's something funky going on with 0x2e - it's often well-behaved, except for
	2232	when it "ends" with e67a.  Maybe this chunkLength thing isn't where it's at?
	2233	Luckily the 0x7a is always at the end of a series of 2 chunks (2e,7a) so ignoring
	2234	it won't kill us for now. */
	2235	case 0x7a:   // 0111 1010
	2236	/*
	2237	printf("0x7a : %08x (%d/%d)\n", mame_rand(machine), l, size[k]);
	2238	for (m = 0; m < 100; m++)
	2239	printf("%04x ", threeDPointer[m]);
	2240	printf("\n\n");
	2241	*/
	2242	chunkLength = 0;
	2243	break;
2088	2244
2089		polys[numPolys].vert[0].light[0] = polys[numPolys].vert[0].texCoords[0] * 255.0f;
2090		polys[numPolys].vert[0].light[1] = polys[numPolys].vert[0].texCoords[1] * 255.0f;
2091		polys[numPolys].vert[0].light[2] = polys[numPolys].vert[0].texCoords[2] * 255.0f;
	2245	case 0x24:   // 0010 0100
	2246	/*
	2247	printf("0x24 : %08x\n", address[k]*3*2);
	2248	for (m = 0; m < 49; m++)
	2249	printf("%04x ", threeDPointer[m]);
	2250	printf("\n\n");
	2251	*/
	2252	chunkLength = 48;
	2253	break;
2092	2254
2093		polys[numPolys].faceNormal[0] = uToF(WORD_AT(threeDPointer, (12<<1) ));
2094		polys[numPolys].faceNormal[1] = uToF(WORD_AT(threeDPointer, (13<<1) ));
2095		polys[numPolys].faceNormal[2] = uToF(WORD_AT(threeDPointer, (14<<1) ));
2096		polys[numPolys].faceNormal[3] = 0.0f;
	2255	case 0xb6:   // 1011 0110
	2256	/*
	2257	printf("0xb6 : %08x\n", address[k]*3*2);
	2258	for (m = 0; m < 13; m++)
	2259	printf("%04x ", threeDPointer[m]);
	2260	printf("\n\n");
	2261	*/
	2262	chunkLength = 12;
	2263	break;
2097	2264
2098		chunkLength = (15<<1);
2099		break;
	2265	case 0x86:   // 1000 0110
	2266	/* Very likely not fixed-length since it leads into c6 & d6 */
	2267	/*
	2268	printf("0x86 : %08x\n", address[k]*3*2);
	2269	for (m = 0; m < 13; m++)
	2270	printf("%04x ", threeDPointer[m]);
	2271	printf("\n\n");
	2272	*/
	2273	chunkLength = 12;
	2274	break;
2100	2275
2101		// 18 byte chunk
2102		case 0x96:
	2276	/* Are c6 and d6 just insanely long? They aren't at the end of the numTris like 0x7a */
	2277	case 0xc6:   // 1100 0110
	2278	/*
	2279	printf("0xc6 : %08x (%d/%d)\n", address[k]*3*2, l, size[k]);
	2280	for (m = 0; m < 100; m++)
	2281	printf("%04x ", threeDPointer[m]);
	2282	printf("\n\n");
	2283	*/
	2284	chunkLength = 0;
	2285	break;
2103	2286
2104		// Copy over the proper vertices from the previous triangle...
2105		memcpy(&polys[numPolys].vert[1], &lastPoly.vert[0], sizeof(struct polyVert));
2106		memcpy(&polys[numPolys].vert[2], &lastPoly.vert[2], sizeof(struct polyVert));
	2287	/* Are c6 and d6 just insanely long? They aren't at the end of numTris like 0x7a */
	2288	case 0xd6:   // 1101 0110
	2289	/*
	2290	printf("0xd6 : %08x (%d/%d)\n", address[k]*3*2, l, size[k]);
	2291	for (m = 0; m < 100; m++)
	2292	printf("%04x ", threeDPointer[m]);
	2293	printf("\n\n");
	2294	*/
	2295	chunkLength = 0;
	2296	break;
	2297	#endif
2107	2298
2108		// !!! Too lazy to have finished this yet !!!
	2299	default:
	2300	logerror("UNKNOWN geometry CHUNK TYPE : %02x\n", chunkType);
	2301	chunkLength = 0;
	2302	break;
	2303	}
2109	2304
2110		polys[numPolys].vert[0].worldCoords[0] = uToF(WORD_AT(threeDPointer, (3<<1)));
2111		polys[numPolys].vert[0].worldCoords[1] = uToF(WORD_AT(threeDPointer, (4<<1)));
2112		polys[numPolys].vert[0].worldCoords[2] = uToF(WORD_AT(threeDPointer, (5<<1)));
2113		polys[numPolys].vert[0].worldCoords[3] = 1.0f;
2114		polys[numPolys].n = 3;
	2305	// Debug - ajg
	2306	//printf("(chunkLength %d)\n", chunkLength);
2115	2307
2116		// !! See above - (6) - why? !!
2117		polys[numPolys].vert[0].texCoords[0] = uToF(WORD_AT(threeDPointer, (7<<1)));
2118		polys[numPolys].vert[0].texCoords[1] = uToF(WORD_AT(threeDPointer, (8<<1)));
2119		polys[numPolys].vert[0].texCoords[2] = 0.0f;
2120		polys[numPolys].vert[0].texCoords[3] = 1.0f;
	2308	polys[*numPolys].visible = 1;
2121	2309
2122		// !!! DUMB !!!
2123		polys[numPolys].vert[0].light[0] = polys[numPolys].vert[0].texCoords[0] * 255.0f;
2124		polys[numPolys].vert[0].light[1] = polys[numPolys].vert[0].texCoords[1] * 255.0f;
2125		polys[numPolys].vert[0].light[2] = polys[numPolys].vert[0].texCoords[2] * 255.0f;
	2310	// Backup the last polygon (for triangle fans [strips?])
	2311	memcpy(&lastPoly, &polys[*numPolys], sizeof(struct polygon));
2126	2312
2127		// This normal could be right, but I'm not entirely sure - there is no normal in the 18 bytes!
2128		polys[numPolys].vert[0].normal[0] = lastPoly.faceNormal[0];
2129		polys[numPolys].vert[0].normal[1] = lastPoly.faceNormal[1];
2130		polys[numPolys].vert[0].normal[2] = lastPoly.faceNormal[2];
2131		polys[numPolys].vert[0].normal[3] = lastPoly.faceNormal[3];
2132	2313
2133		polys[numPolys].faceNormal[0] = lastPoly.faceNormal[0];
2134		polys[numPolys].faceNormal[1] = lastPoly.faceNormal[1];
2135		polys[numPolys].faceNormal[2] = lastPoly.faceNormal[2];
2136		polys[numPolys].faceNormal[3] = lastPoly.faceNormal[3];
	2314	////////////////////////////////////
	2315	// Project and clip               //
	2316	////////////////////////////////////
	2317	// Perform the world transformations...
	2318	// !! Can eliminate this step with a matrix stack (maybe necessary?) !!
	2319	setIdentity(modelViewMatrix);
	2320	matmul4(modelViewMatrix, modelViewMatrix, cameraMatrix);
	2321	matmul4(modelViewMatrix, modelViewMatrix, objectMatrix);
2137	2322
2138		chunkLength = (9<<1);
2139		break;
	2323	// BACKFACE CULL //
	2324	// EMPIRICAL EVIDENCE SEEMS TO SHOW THE HNG64 HARDWARE DOES NOT BACKFACE CULL //
	2325	/*
	2326	float cullRay[4];
	2327	float cullNorm[4];
2140	2328
2141		default:
2142		mame_printf_debug("UNKNOWN geometry CHUNK TYPE : %x\n", triangleType);
2143		break;
2144		}
2145		}
	2329	// Cast a ray out of the camera towards the polygon's point in eyespace.
	2330	vecmatmul4(cullRay, modelViewMatrix, polys[*numPolys].vert[0].worldCoords);
	2331	normalize(cullRay);
	2332	// Dot product that with the normal to see if you're negative...
	2333	vecmatmul4(cullNorm, modelViewMatrix, polys[*numPolys].faceNormal);
2146	2334
2147		polys[numPolys].visible = 1;
	2335	float result = vecDotProduct(cullRay, cullNorm);
2148	2336
2149		memcpy(&lastPoly, &polys[numPolys], sizeof(struct polygon));
	2337	if (result < 0.0f)
	2338	polys[*numPolys].visible = 1;
	2339	else
	2340	polys[*numPolys].visible = 0;
	2341	*/
2150	2342
	2343	// BEHIND-THE-CAMERA CULL //
	2344	vecmatmul4(cullRay, modelViewMatrix, polys[*numPolys].vert[0].worldCoords);
	2345	if (cullRay[2] > 0.0f)            // Camera is pointing down -Z
	2346	{
	2347	polys[*numPolys].visible = 0;
	2348	}
2151	2349
2152	2350
	2351	// TRANSFORM THE TRIANGLE INTO HOMOGENEOUS SCREEN SPACE //
	2352	if (polys[*numPolys].visible)
	2353	{
	2354	for (m = 0; m < polys[*numPolys].n; m++)
	2355	{
	2356	// Transform and project the vertex into pre-divided homogeneous coordinates...
	2357	vecmatmul4(eyeCoords, modelViewMatrix, polys[*numPolys].vert[m].worldCoords);
	2358	vecmatmul4(polys[*numPolys].vert[m].clipCoords, projectionMatrix, eyeCoords);
	2359	}
2153	2360
2154		// THE HNG64 HARDWARE DOES NOT SEEM TO BACKFACE CULL //
	2361	if (polys[*numPolys].visible)
	2362	{
	2363	// Clip the triangles to the view frustum...
	2364	performFrustumClip(&polys[*numPolys]);
2155	2365
2156		///////////////////
2157		// BACKFACE CULL //
2158		///////////////////
2159		/*
2160		float cullRay[4];
2161		float cullNorm[4];
	2366	for (m = 0; m < polys[*numPolys].n; m++)
	2367	{
	2368	// Convert into normalized device coordinates...
	2369	ndCoords[0] = polys[*numPolys].vert[m].clipCoords[0] / polys[*numPolys].vert[m].clipCoords[3];
	2370	ndCoords[1] = polys[*numPolys].vert[m].clipCoords[1] / polys[*numPolys].vert[m].clipCoords[3];
	2371	ndCoords[2] = polys[*numPolys].vert[m].clipCoords[2] / polys[*numPolys].vert[m].clipCoords[3];
	2372	ndCoords[3] = polys[*numPolys].vert[m].clipCoords[3];
2162	2373
2163		// Cast a ray out of the camera towards the polygon's point in eyespace.
2164		vecmatmul4(cullRay, modelViewMatrix, polys[numPolys].vert[0].worldCoords);
2165		normalize(cullRay);
2166		// Dot product that with the normal to see if you're negative...
2167		vecmatmul4(cullNorm, modelViewMatrix, polys[numPolys].faceNormal);
	2374	// Final pixel values are garnered here :
	2375	windowCoords[0] = (ndCoords[0]+1.0f) * ((float)(visarea->max_x) / 2.0f) + 0.0f;
	2376	windowCoords[1] = (ndCoords[1]+1.0f) * ((float)(visarea->max_y) / 2.0f) + 0.0f;
	2377	windowCoords[2] = (ndCoords[2]+1.0f) * 0.5f;
2168	2378
2169		float result = vecDotProduct(cullRay, cullNorm);
	2379	windowCoords[1] = (float)visarea->max_y - windowCoords[1];      // Flip Y
2170	2380
2171		if (result < 0.0f)
2172		polys[numPolys].visible = 1;
2173		else
2174		polys[numPolys].visible = 0;
2175		*/
	2381	// Store the points in a list for later use...
	2382	polys[*numPolys].vert[m].clipCoords[0] = windowCoords[0];
	2383	polys[*numPolys].vert[m].clipCoords[1] = windowCoords[1];
	2384	polys[*numPolys].vert[m].clipCoords[2] = windowCoords[2];
	2385	polys[*numPolys].vert[m].clipCoords[3] = ndCoords[3];
	2386	}
	2387	}
	2388	}
2176	2389
2177		////////////////////////////
2178		// BEHIND-THE-CAMERA CULL //
2179		////////////////////////////
2180		vecmatmul4(cullRay, modelViewMatrix, polys[numPolys].vert[0].worldCoords);
	2390	/*
	2391	// DEBUG
	2392	if (chunkLength == (9 << 1))
	2393	{
	2394	mame_printf_debug("Chunk : ");
	2395	for (int a = 0; a < chunkLength; a+=2)
	2396	mame_printf_debug("%.2x%.2x ", threeDPointer[a], threeDPointer[a+1]);
	2397	mame_printf_debug("\n");
	2398	}
	2399	// END DEBUG
	2400	*/
2181	2401
2182		if (cullRay[2] > 0.0f)            // Camera is pointing down -Z
2183		{
2184		polys[numPolys].visible = 0;
2185		}
	2402	// Advance to the next polygon chunk...
	2403	threeDPointer += chunkLength;
2186	2404
	2405	(*numPolys)++;
	2406	}
	2407	}
	2408	}
2187	2409
2188		//////////////////////////////////////////////////////////
2189		// TRANSFORM THE TRIANGLE INTO HOMOGENEOUS SCREEN SPACE //
2190		//////////////////////////////////////////////////////////
	2410	#ifdef UNUSED_FUNCTION
	2411	void printPacket(const UINT16* packet, int hex)
	2412	{
	2413	if (hex)
	2414	{
	2415	printf("Packet : %04x %04x  2:%04x %04x  4:%04x %04x  6:%04x %04x  8:%04x %04x  10:%04x %04x  12:%04x %04x  14:%04x %04x\n",
	2416	packet[0],  packet[1],
	2417	packet[2],  packet[3],
	2418	packet[4],  packet[5],
	2419	packet[6],  packet[7],
	2420	packet[8],  packet[9],
	2421	packet[10], packet[11],
	2422	packet[12], packet[13],
	2423	packet[14], packet[15]);
	2424	}
	2425	else
	2426	{
	2427	printf("Packet : %04x %3.4f  2:%3.4f %3.4f  4:%3.4f %3.4f  6:%3.4f %3.4f  8:%3.4f %3.4f  10:%3.4f %3.4f  12:%3.4f %3.4f  14:%3.4f %3.4f\n",
	2428	packet[0],            uToF(packet[1] )*128,
	2429	uToF(packet[2] )*128, uToF(packet[3] )*128,
	2430	uToF(packet[4] )*128, uToF(packet[5] )*128,
	2431	uToF(packet[6] )*128, uToF(packet[7] )*128,
	2432	uToF(packet[8] )*128, uToF(packet[9] )*128,
	2433	uToF(packet[10])*128, uToF(packet[11])*128,
	2434	uToF(packet[12])*128, uToF(packet[13])*128,
	2435	uToF(packet[14])*128, uToF(packet[15])*128);
	2436	}
	2437	}
	2438	#endif
2191	2439
2192		if (polys[numPolys].visible)
2193		{
2194		for (m = 0; m < polys[numPolys].n; m++)
2195		{
2196		// Transform and project the vertex into pre-divided homogeneous coordinates...
2197		vecmatmul4(eyeCoords, modelViewMatrix, polys[numPolys].vert[m].worldCoords);
2198		vecmatmul4(polys[numPolys].vert[m].clipCoords, projectionMatrix, eyeCoords);
2199		}
	2440	void hng64_command3d(running_machine* machine, const UINT16* packet)
	2441	{
	2442	int i;
2200	2443
2201		if (polys[numPolys].visible)
2202		{
2203		// Clip the triangles to the view frustum...
2204		performFrustumClip(&polys[numPolys]);
	2444	/* A temporary place to put some polygons.  This will optimize away if the compiler's any good. */
	2445	int numPolys = 0;
	2446	struct polygon* polys = malloc(sizeof(struct polygon) * (1024*5));
2205	2447
2206		for (m = 0; m < polys[numPolys].n; m++)
2207		{
2208		// Convert into normalized device coordinates...
2209		ndCoords[0] = polys[numPolys].vert[m].clipCoords[0] / polys[numPolys].vert[m].clipCoords[3];
2210		ndCoords[1] = polys[numPolys].vert[m].clipCoords[1] / polys[numPolys].vert[m].clipCoords[3];
2211		ndCoords[2] = polys[numPolys].vert[m].clipCoords[2] / polys[numPolys].vert[m].clipCoords[3];
2212		ndCoords[3] = polys[numPolys].vert[m].clipCoords[3];
	2448	//printf("packet type : %04x\n", packet[0]);
	2449	switch (packet[0])
	2450	{
	2451	case 0x0000:   // Appears to be a NOP.
	2452	break;
2213	2453
2214		// Final pixel values are garnered here :
2215		windowCoords[0] = (ndCoords[0]+1.0f) * ((float)(visarea->max_x) / 2.0f) + 0.0f;
2216		windowCoords[1] = (ndCoords[1]+1.0f) * ((float)(visarea->max_y) / 2.0f) + 0.0f;
2217		windowCoords[2] = (ndCoords[2]+1.0f) * 0.5f;
	2454	case 0x0001:   // Camera transformation.
	2455	setCameraTransformation(packet);
	2456	break;
2218	2457
2219		windowCoords[1] = (float)visarea->max_y - windowCoords[1];      // Flip Y
	2458	case 0x0010:   // Unknown
	2459	// Called very interestingly per-frame in every game.  Floats for sure.  Light-related?
	2460	break;
2220	2461
2221		// Store the points in a list for later use...
2222		polys[numPolys].vert[m].clipCoords[0] = windowCoords[0];
2223		polys[numPolys].vert[m].clipCoords[1] = windowCoords[1];
2224		polys[numPolys].vert[m].clipCoords[2] = windowCoords[2];
2225		polys[numPolys].vert[m].clipCoords[3] = ndCoords[3];
2226		}
2227		}
2228		}
	2462	case 0x0011:   // Palette / Model flags?
	2463	set3dFlags(packet);
	2464	break;
2229	2465
	2466	case 0x0012:   // Projection Matrix
	2467	setCameraProjectionMatrix(packet);
	2468	break;
2230	2469
2231		/*
2232		// DEBUG
2233		if (chunkLength == (9 << 1))
2234		{
2235		mame_printf_debug("Chunk : ");
2236		for (int ajg = 0; ajg < chunkLength; ajg+=2)
2237		mame_printf_debug("%.2x%.2x ", threeDPointer[ajg], threeDPointer[ajg+1]);
2238		mame_printf_debug("\n");
2239		}
2240		// END DEBUG
2241		*/
	2470	case 0x0100:   // Geometry
	2471	recoverPolygonBlock(machine, packet, polys, &numPolys);
2242	2472
2243		// Advance to the next polygon chunk...
2244		threeDPointer += chunkLength;
	2473	/* Immeditately rasterize the chunk's polygons into the display buffer */
	2474	for (i = 0; i < numPolys; i++)
	2475	{
	2476	if (polys[i].visible)
	2477	{
	2478	//DrawWireframe(&polys[i], bitmap);
	2479	drawShaded(machine, &polys[i]);
	2480	}
	2481	}
2245	2482
2246		numPolys++;            // Add one more to the display list...
2247		}
2248		}
	2483	numPolys = 0;
	2484	break;
2249	2485
2250		break;
	2486	case 0x0101:   // Unknown: Geometry?
	2487	break;
2251	2488
2252		default:
2253		break;
2254		}
2255		}
	2489	case 0x0102:   // Unknown: Geometry?
	2490	break;
2256	2491
2257		// Don't forget about this !!!
2258		//mame_printf_debug("                 %.8x\n\n", (UINT32)hng64_dls[j][0x80]);
	2492	case 0x1000:   // Unknown: Some sort of global flags?
	2493	break;
2259	2494
	2495	case 0x1001:   // Unknown: Some sort of global flags (a group of 4, actually)?
	2496	break;
	2497
	2498	default:
	2499	printf("HNG64: Unknown 3d command %04x.\n", packet[0]);
	2500	break;
2260	2501	}
2261	2502
	2503	free(polys);
	2504	}
2262	2505
2263		/////////////////////////////////////////////////
2264		// FINALLY RENDER THE TRIANGLES INTO THE FRAME //
2265		/////////////////////////////////////////////////
	2506	static void clear3d(running_machine *machine)
	2507	{
	2508	int i;
2266	2509
	2510	const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen);
	2511
	2512	// Clear each of the display list buffers after drawing - todo: kill!
	2513	for (i = 0; i < 0x81; i++)
	2514	{
	2515	hng64_dls[0][i] = 0;
	2516	hng64_dls[1][i] = 0;
	2517	}
	2518
2267	2519	// Reset the buffers...
2268	2520	for (i = 0; i < (visarea->max_x)*(visarea->max_y); i++)
2269	2521	{
r6740	r6741
2271	2523	colorBuffer3d[i] = MAKE_ARGB(0,0,0,0);
2272	2524	}
2273	2525
2274		for (i = 0; i < numPolys; i++)
2275		{
2276		if (polys[i].visible)
2277		{
2278		//DrawWireframe(&polys[i], bitmap);
2279		drawShaded(machine, &polys[i], bitmap);
2280		}
2281		}
	2526	// Set some matrices to the identity...
	2527	setIdentity(projectionMatrix);
	2528	setIdentity(modelViewMatrix);
	2529	setIdentity(cameraMatrix);
	2530	}
2282	2531
2283		// usrintf_showmessage("%d", numPolys);
	2532	/* 3D/framebuffer video registers
	2533	* ------------------------------
	2534	*
	2535	* UINT32 | Bits                                    | Use
	2536	*        | 3322 2222 2222 1111 1111 11             |
	2537	* -------+-1098-7654-3210-9876-5432-1098-7654-3210-+----------------
	2538	*      0 | ???? ???? ???? ???? ccc? ???? ???? ???? | framebuffer color base, 0x311800 in Fatal Fury WA, 0x313800 in Buriki One
	2539	*      1 |                                         |
	2540	*      2 | ???? ???? ???? ???? ???? ???? ???? ???? | camera / framebuffer global x/y? Actively used by Samurai Shodown 64 2
	2541	*      3 | ---- --?x ---- ---- ---- ---- ---- ---- | unknown, unsetted by Buriki One and setted by Fatal Fury WA, buffering mode?
	2542	*   4-11 | ---- ???? ---- ???? ---- ???? ---- ???? | Table filled with 0x0? data
	2543	*
	2544	*/
2284	2545
2285		// Clear each of the display list buffers after drawing...
2286		for (i = 0; i < 0x81; i++)
2287		{
2288		hng64_dls[0][i] = 0;
2289		hng64_dls[1][i] = 0;
2290		}
2291		}
	2546	/////////////////////
	2547	// 3D UTILITY CODE //
	2548	/////////////////////
2292	2549
2293
2294	2550	/* 4x4 matrix multiplication */
2295	2551	static void matmul4( float *product, const float *a, const float *b )
2296	2552	{
2297	2553	int i;
2298	2554	for (i = 0; i < 4; i++)
2299	2555	{
2300		const float ai0 = a[0  + i];
2301		const float ai1 = a[4  + i];
2302		const float ai2 = a[8  + i];
2303		const float ai3 = a[12 + i];
	2556	const float ai0 = a[0  + i];
	2557	const float ai1 = a[4  + i];
	2558	const float ai2 = a[8  + i];
	2559	const float ai3 = a[12 + i];
2304	2560
2305		product[0  + i] = ai0 * b[0 ] + ai1 * b[1 ] + ai2 * b[2 ] + ai3 * b[3 ];
2306		product[4  + i] = ai0 * b[4 ] + ai1 * b[5 ] + ai2 * b[6 ] + ai3 * b[7 ];
2307		product[8  + i] = ai0 * b[8 ] + ai1 * b[9 ] + ai2 * b[10] + ai3 * b[11];
2308		product[12 + i] = ai0 * b[12] + ai1 * b[13] + ai2 * b[14] + ai3 * b[15];
	2561	product[0  + i] = ai0 * b[0 ] + ai1 * b[1 ] + ai2 * b[2 ] + ai3 * b[3 ];
	2562	product[4  + i] = ai0 * b[4 ] + ai1 * b[5 ] + ai2 * b[6 ] + ai3 * b[7 ];
	2563	product[8  + i] = ai0 * b[8 ] + ai1 * b[9 ] + ai2 * b[10] + ai3 * b[11];
	2564	product[12 + i] = ai0 * b[12] + ai1 * b[13] + ai2 * b[14] + ai3 * b[15];
2309	2565	}
2310	2566	}
2311	2567
r6740	r6741
2348	2604	retVal = (float)((INT16)input) / 32768.0f;
2349	2605	return retVal;
2350	2606
2351		/*  if ((INT16)input < 0)
	2607	/*
	2608	if ((INT16)input < 0)
2352	2609	retVal = (float)((INT16)input) / 32768.0f;
2353	2610	else
2354		retVal = (float)((INT16)input) / 32767.0f; */
	2611	retVal = (float)((INT16)input) / 32767.0f;
	2612	*/
2355	2613	}
2356	2614
2357	2615	#ifdef UNUSED_FUNCTION
r6740	r6741
2375	2633	///////////////////////////////////////////////////////////////////////////////////
2376	2634	// The remainder of the code in this file is heavily                             //
2377	2635	//   influenced by, and sometimes copied verbatim from Andrew Zaferakis' SoftGL  //
2378		//   rasterizing system.  http://www.cs.unc.edu/~andrewz/comp236/                //
	2636	//   rasterizing system.                                                         //
2379	2637	//                                                                               //
2380	2638	//   Andrew granted permission for its use in MAME in October of 2004.           //
2381	2639	///////////////////////////////////////////////////////////////////////////////////
r6740	r6741
2405	2663
2406	2664	case HNG64_NEAR:
2407	2665	return (v->clipCoords[2] <=  v->clipCoords[3]) ? 1 : 0;
2408
2409	2666	case HNG64_FAR:
2410	2667	return (v->clipCoords[2] >= -v->clipCoords[3]) ? 1 : 0;
2411
2412	2668	}
2413	2669
2414	2670	return 0;
r6740	r6741
2469	2725
2470	2726	static void performFrustumClip(struct polygon *p)
2471	2727	{
2472		int i, j;
2473		int k;
2474
	2728	int i, j, k;
2475	2729	//////////////////////////////////////////////////////////////////////////
2476	2730	// Clip against the volumes defined by the homogeneous clip coordinates //
2477	2731	//////////////////////////////////////////////////////////////////////////
r6740	r6741
2634	2888	/**                                                                 **/
2635	2889	/**     Output: none                                                **/
2636	2890	/*********************************************************************/
2637		INLINE void FillSmoothTexPCHorizontalLine(running_machine *machine, bitmap_t *Color,
	2891	INLINE void FillSmoothTexPCHorizontalLine(running_machine *machine,
2638	2892	int Wrapping, int Filtering, int Function,
2639	2893	int x_start, int x_end, int y, float z_start, float z_delta,
2640	2894	float w_start, float w_delta, float r_start, float r_delta,
r6740	r6741
2676	2930	// Greyscale texture - for Buriki...
2677	2931	// *BITMAP_ADDR32(Color, y, x_start) = MAKE_ARGB(255, (UINT8)paletteEntry, (UINT8)paletteEntry, (UINT8)paletteEntry);
2678	2932
2679		//*BITMAP_ADDR32(Color, y, x_start) = machine->pens[(128*(Filtering))+paletteEntry];
	2933	// *BITMAP_ADDR32(Color, y, x_start) = machine->pens[(128*(Filtering))+paletteEntry];
2680	2934	*cb = machine->pens[(128*(Filtering))+paletteEntry];
2681	2935	*db = z_start;
2682	2936	}
2683	2937	}
2684	2938	else
2685	2939	{
2686		//*BITMAP_ADDR32(Color, y, x_start) = MAKE_ARGB(255, (UINT8)(r_start/w_start), (UINT8)(g_start/w_start), (UINT8)(b_start/w_start));
	2940	// *BITMAP_ADDR32(Color, y, x_start) = MAKE_ARGB(255, (UINT8)(r_start/w_start), (UINT8)(g_start/w_start), (UINT8)(b_start/w_start));
2687	2941	*cb = MAKE_ARGB(255, (UINT8)(r_start/w_start), (UINT8)(g_start/w_start), (UINT8)(b_start/w_start));
2688	2942	*db = z_start;
2689	2943	}
r6740	r6741
2730	2984	//   nearest and bilinear filtering: Filtering={0,1}
2731	2985	//   replace and modulate application modes: Function={0,1}
2732	2986	//---------------------------------------------------------------------------
2733		static void RasterizeTriangle_SMOOTH_TEX_PC(running_machine *machine, bitmap_t *Color,
	2987	static void RasterizeTriangle_SMOOTH_TEX_PC(running_machine *machine,
2734	2988	float A[4], float B[4], float C[4],
2735	2989	float Ca[3], float Cb[3], float Cc[3], // PER-VERTEX RGB COLORS
2736	2990	float Ta[2], float Tb[2], float Tc[2], // PER-VERTEX (S,T) TEX-COORDS
r6740	r6741
2925	3179
2926	3180	// Pass the horizontal line to the filler, this could be put in the routine
2927	3181	// then interpolate for the next values of x and z
2928		FillSmoothTexPCHorizontalLine(machine, Color, Wrapping, Filtering, Function,
	3182	FillSmoothTexPCHorizontalLine(machine, Wrapping, Filtering, Function,
2929	3183	x_start, x_end, y_min, z_interp_x, z_delta_x, w_interp_x, w_delta_x,
2930	3184	r_interp_x, r_delta_x, g_interp_x, g_delta_x, b_interp_x, b_delta_x,
2931	3185	s_interp_x, s_delta_x, t_interp_x, t_delta_x);
r6740	r6741
3005	3259
3006	3260	// Pass the horizontal line to the filler, this could be put in the routine
3007	3261	// then interpolate for the next values of x and z
3008		FillSmoothTexPCHorizontalLine(machine, Color, Wrapping, Filtering, Function,
	3262	FillSmoothTexPCHorizontalLine(machine, Wrapping, Filtering, Function,
3009	3263	x_start, x_end, y_mid, z_interp_x, z_delta_x, w_interp_x, w_delta_x,
3010	3264	r_interp_x, r_delta_x, g_interp_x, g_delta_x, b_interp_x, b_delta_x,
3011	3265	s_interp_x, s_delta_x, t_interp_x, t_delta_x);
r6740	r6741
3020	3274	}
3021	3275	}
3022	3276
3023		static void drawShaded(running_machine *machine, struct polygon *p, bitmap_t *bitmap)
	3277	static void drawShaded(running_machine *machine, struct polygon *p)
3024	3278	{
3025	3279	// The perspective-correct texture divide...
3026	3280	// !!! There is a very good chance the HNG64 hardware does not do perspective-correct texture-mapping !!!
r6740	r6741
3037	3291
3038	3292	for (j = 1; j < p->n-1; j++)
3039	3293	{
3040		RasterizeTriangle_SMOOTH_TEX_PC(machine, bitmap,
	3294	RasterizeTriangle_SMOOTH_TEX_PC(machine,
3041	3295	p->vert[0].clipCoords, p->vert[j].clipCoords, p->vert[j+1].clipCoords,
3042	3296	p->vert[0].light,      p->vert[j].light,      p->vert[j+1].light,
3043	3297	p->vert[0].texCoords,  p->vert[j].texCoords,  p->vert[j+1].texCoords,

src/mame/video/solomon.c

r6740	r6741
1	1	#include "driver.h"
2	2
	3	UINT8 *solomon_videoram;
	4	UINT8 *solomon_colorram;
3	5	UINT8 *solomon_videoram2;
4	6	UINT8 *solomon_colorram2;
5	7
r6740	r6741
7	9
8	10	WRITE8_HANDLER( solomon_videoram_w )
9	11	{
10		space->machine->generic.videoram.u8[offset] = data;
	12	solomon_colorram[offset] = data;
11	13	tilemap_mark_tile_dirty(fg_tilemap, offset);
12	14	}
13	15
14	16	WRITE8_HANDLER( solomon_colorram_w )
15	17	{
16		space->machine->generic.colorram.u8[offset] = data;
	18	solomon_colorram[offset] = data;
17	19	tilemap_mark_tile_dirty(fg_tilemap, offset);
18	20	}
19	21
r6740	r6741
50	52
51	53	static TILE_GET_INFO( get_fg_tile_info )
52	54	{
53		int attr = machine->generic.colorram.u8[tile_index];
54		int code = machine->generic.videoram.u8[tile_index] + 256 * (attr & 0x07);
	55	int attr = solomon_colorram[tile_index];
	56	int code = solomon_colorram[tile_index] + 256 * (attr & 0x07);
55	57	int color = (attr & 0x70) >> 4;
56	58
57	59	SET_TILE_INFO(0, code, color, 0);

src/mame/video/moo.c

r6740	r6741
9	9	***************************************************************************/
10	10
11	11	#include "driver.h"
12		#include "video/konamiic.h"
	12	#include "video/konicdev.h"
13	13
14	14	static int sprite_colorbase;
15	15	static int layer_colorbase[4], layerpri[3];
r6740	r6741
22	22	}
23	23	#endif
24	24
25		static void moo_sprite_callback(int *code, int *color, int *priority_mask)
	25	void moo_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask)
26	26	{
27	27	int pri = (*color & 0x03e0) >> 4;
28	28
r6740	r6741
34	34	*color = sprite_colorbase | (*color & 0x001f);
35	35	}
36	36
37		static void moo_tile_callback(int layer, int *code, int *color, int *flags)
	37	void moo_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags)
38	38	{
39	39	*color = layer_colorbase[layer] | (*color>>2 & 0x0f);
40	40	}
41	41
42	42	VIDEO_START(moo)
43	43	{
44		int offsx, offsy;
45
	44	const device_config *k056832 = devtag_get_device(machine, "k056832");
46	45	assert(video_screen_get_format(machine->primary_screen) == BITMAP_FORMAT_RGB32);
47	46
48	47	alpha_enabled = 0;
49	48
50		K053251_vh_start(machine);
51		K054338_vh_start(machine);
52
53		K056832_vh_start(machine, "gfx1", K056832_BPP_4, 1, NULL, moo_tile_callback, 0);
54
55	49	if (!strcmp(machine->gamedrv->name, "bucky") || !strcmp(machine->gamedrv->name, "buckyua") || !strcmp(machine->gamedrv->name, "buckyaa"))
56	50	{
57	51	// Bucky doesn't chain tilemaps
58		K056832_set_LayerAssociation(0);
	52	k056832_set_layer_association(k056832, 0);
59	53
60		K056832_set_LayerOffset(0, -2, 0);
61		K056832_set_LayerOffset(1,  2, 0);
62		K056832_set_LayerOffset(2,  4, 0);
63		K056832_set_LayerOffset(3,  6, 0);
64
65		offsx = -48;
66		offsy =  23;
	54	k056832_set_layer_offs(k056832, 0, -2, 0);
	55	k056832_set_layer_offs(k056832, 1,  2, 0);
	56	k056832_set_layer_offs(k056832, 2,  4, 0);
	57	k056832_set_layer_offs(k056832, 3,  6, 0);
67	58	}
68	59	else
69	60	{
70	61	// other than the intro showing one blank line alignment is good through the game
71		K056832_set_LayerOffset(0, -2+1, 0);
72		K056832_set_LayerOffset(1,  2+1, 0);
73		K056832_set_LayerOffset(2,  4+1, 0);
74		K056832_set_LayerOffset(3,  6+1, 0);
75
76		offsx = -48+1;
77		offsy =  23;
	62	k056832_set_layer_offs(k056832, 0, -2+1, 0);
	63	k056832_set_layer_offs(k056832, 1,  2+1, 0);
	64	k056832_set_layer_offs(k056832, 2,  4+1, 0);
	65	k056832_set_layer_offs(k056832, 3,  6+1, 0);
78	66	}
79
80		K053247_vh_start(machine, "gfx2", offsx, offsy, NORMAL_PLANE_ORDER, moo_sprite_callback);
81
82		K054338_invert_alpha(0);
83	67	}
84	68
85	69	/* useful function to sort the three tile layers by priority order */
r6740	r6741
100	84
101	85	VIDEO_UPDATE(moo)
102	86	{
	87	const device_config *k053246 = devtag_get_device(screen->machine, "k053246");
	88	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
	89	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	90	const device_config *k054338 = devtag_get_device(screen->machine, "k054338");
103	91	static const int K053251_CI[4] = { K053251_CI1, K053251_CI2, K053251_CI3, K053251_CI4 };
104	92	int layers[3];
105	93	int bg_colorbase, new_colorbase, plane, dirty, alpha;
106	94
107		bg_colorbase       = K053251_get_palette_index(K053251_CI1);
108		sprite_colorbase   = K053251_get_palette_index(K053251_CI0);
	95	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI1);
	96	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI0);
109	97	layer_colorbase[0] = 0x70;
110	98
111		if (K056832_get_LayerAssociation())
	99	if (k056832_get_layer_association(k056832))
112	100	{
113		for (plane=1; plane<4; plane++)
	101	for (plane = 1; plane < 4; plane++)
114	102	{
115		new_colorbase = K053251_get_palette_index(K053251_CI[plane]);
	103	new_colorbase = k053251_get_palette_index(k053251, K053251_CI[plane]);
116	104	if (layer_colorbase[plane] != new_colorbase)
117	105	{
118	106	layer_colorbase[plane] = new_colorbase;
119		K056832_mark_plane_dirty(plane);
	107	k056832_mark_plane_dirty(k056832, plane);
120	108	}
121	109	}
122	110	}
123	111	else
124	112	{
125		for (dirty=0, plane=1; plane<4; plane++)
	113	for (dirty = 0, plane = 1; plane < 4; plane++)
126	114	{
127		new_colorbase = K053251_get_palette_index(K053251_CI[plane]);
	115	new_colorbase = k053251_get_palette_index(k053251, K053251_CI[plane]);
128	116	if (layer_colorbase[plane] != new_colorbase)
129	117	{
130	118	layer_colorbase[plane] = new_colorbase;
131	119	dirty = 1;
132	120	}
133	121	}
134		if (dirty) K056832_MarkAllTilemapsDirty();
	122	if (dirty)
	123	k056832_mark_all_tmaps_dirty(k056832);
135	124	}
136	125
137	126	layers[0] = 1;
138		layerpri[0] = K053251_get_priority(K053251_CI2);
	127	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
139	128	layers[1] = 2;
140		layerpri[1] = K053251_get_priority(K053251_CI3);
	129	layerpri[1] = k053251_get_priority(k053251, K053251_CI3);
141	130	layers[2] = 3;
142		layerpri[2] = K053251_get_priority(K053251_CI4);
	131	layerpri[2] = k053251_get_priority(k053251, K053251_CI4);
143	132
144	133	sortlayers(layers, layerpri);
145	134
146		K054338_update_all_shadows(screen->machine, 0);
147		K054338_fill_backcolor(screen->machine, bitmap, 0);
	135	k054338_update_all_shadows(k054338, 0);
	136	k054338_fill_backcolor(k054338, bitmap, 0);
148	137
149	138	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
150	139
151		if (layerpri[0] < K053251_get_priority(K053251_CI1))   /* bucky hides back layer behind background */
152		K056832_tilemap_draw(screen->machine, bitmap, cliprect, layers[0], 0, 1);
	140	if (layerpri[0] < k053251_get_priority(k053251, K053251_CI1))   /* bucky hides back layer behind background */
	141	k056832_tilemap_draw(k056832, bitmap, cliprect, layers[0], 0, 1);
153	142
154		K056832_tilemap_draw(screen->machine, bitmap, cliprect, layers[1], 0, 2);
	143	k056832_tilemap_draw(k056832, bitmap, cliprect, layers[1], 0, 2);
155	144
156	145	// Enabling alpha improves fog and fading in Moo but causes other things to disappear.
157	146	// There is probably a control bit somewhere to turn off alpha blending.
158		alpha_enabled = K054338_read_register(K338_REG_CONTROL) & K338_CTL_MIXPRI; // DUMMY
	147	alpha_enabled = k054338_register_r(k054338, K338_REG_CONTROL) & K338_CTL_MIXPRI; // DUMMY
159	148
160		alpha = (alpha_enabled) ? K054338_set_alpha_level(1) : 255;
	149	alpha = (alpha_enabled) ? k054338_set_alpha_level(k054338, 1) : 255;
161	150
162	151	if (alpha > 0)
163		K056832_tilemap_draw(screen->machine, bitmap, cliprect, layers[2], TILEMAP_DRAW_ALPHA(alpha), 4);
	152	k056832_tilemap_draw(k056832, bitmap, cliprect, layers[2], TILEMAP_DRAW_ALPHA(alpha), 4);
164	153
165		K053247_sprites_draw(screen->machine, bitmap,cliprect);
	154	k053247_sprites_draw(k053246, bitmap, cliprect);
166	155
167		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 0, 0, 0);
	156	k056832_tilemap_draw(k056832, bitmap, cliprect, 0, 0, 0);
168	157	return 0;
169	158	}

src/mame/video/fastlane.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
	3	#include "includes/fastlane.h"
3	4
4		UINT8 *fastlane_k007121_regs,*fastlane_videoram1,*fastlane_videoram2;
5		static tilemap *layer0, *layer1;
6		static rectangle clip0, clip1;
7	5
8
9	6	PALETTE_INIT( fastlane )
10	7	{
11	8	int pal;
r6740	r6741
26	23	}
27	24
28	25
29		static void set_pens(running_machine *machine)
	26	static void set_pens( running_machine *machine )
30	27	{
	28	fastlane_state *state = (fastlane_state *)machine->driver_data;
31	29	int i;
32	30
33	31	for (i = 0x00; i < 0x800; i += 2)
34	32	{
35		UINT16 data = machine->generic.paletteram.u8[i | 1] | (machine->generic.paletteram.u8[i] << 8);
	33	UINT16 data = state->paletteram[i | 1] | (state->paletteram[i] << 8);
36	34
37	35	rgb_t color = MAKE_RGB(pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
38	36
r6740	r6741
50	48
51	49	static TILE_GET_INFO( get_tile_info0 )
52	50	{
53		int attr = fastlane_videoram1[tile_index];
54		int code = fastlane_videoram1[tile_index + 0x400];
55		int bit0 = (K007121_ctrlram[0][0x05] >> 0) & 0x03;
56		int bit1 = (K007121_ctrlram[0][0x05] >> 2) & 0x03;
57		int bit2 = (K007121_ctrlram[0][0x05] >> 4) & 0x03;
58		int bit3 = (K007121_ctrlram[0][0x05] >> 6) & 0x03;
	51	fastlane_state *state = (fastlane_state *)machine->driver_data;
	52	UINT8 ctrl_3 = k007121_ctrlram_r(state->k007121, 3);
	53	UINT8 ctrl_4 = k007121_ctrlram_r(state->k007121, 4);
	54	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121, 5);
	55	int attr = state->videoram1[tile_index];
	56	int code = state->videoram1[tile_index + 0x400];
	57	int bit0 = (ctrl_5 >> 0) & 0x03;
	58	int bit1 = (ctrl_5 >> 2) & 0x03;
	59	int bit2 = (ctrl_5 >> 4) & 0x03;
	60	int bit3 = (ctrl_5 >> 6) & 0x03;
59	61	int bank = ((attr & 0x80) >> 7) |
60	62	((attr >> (bit0+2)) & 0x02) |
61	63	((attr >> (bit1+1)) & 0x04) |
62	64	((attr >> (bit2  )) & 0x08) |
63	65	((attr >> (bit3-1)) & 0x10) |
64		((K007121_ctrlram[0][0x03] & 0x01) << 5);
65		int mask = (K007121_ctrlram[0][0x04] & 0xf0) >> 4;
	66	((ctrl_3 & 0x01) << 5);
	67	int mask = (ctrl_4 & 0xf0) >> 4;
66	68
67		bank = (bank & ~(mask << 1)) | ((K007121_ctrlram[0][0x04] & mask) << 1);
	69	bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
68	70
69	71	SET_TILE_INFO(
70	72	0,
r6740	r6741
75	77
76	78	static TILE_GET_INFO( get_tile_info1 )
77	79	{
78		int attr = fastlane_videoram2[tile_index];
79		int code = fastlane_videoram2[tile_index + 0x400];
80		int bit0 = (K007121_ctrlram[0][0x05] >> 0) & 0x03;
81		int bit1 = (K007121_ctrlram[0][0x05] >> 2) & 0x03;
82		int bit2 = (K007121_ctrlram[0][0x05] >> 4) & 0x03;
83		int bit3 = (K007121_ctrlram[0][0x05] >> 6) & 0x03;
	80	fastlane_state *state = (fastlane_state *)machine->driver_data;
	81	UINT8 ctrl_3 = k007121_ctrlram_r(state->k007121, 3);
	82	UINT8 ctrl_4 = k007121_ctrlram_r(state->k007121, 4);
	83	UINT8 ctrl_5 = k007121_ctrlram_r(state->k007121, 5);
	84	int attr = state->videoram2[tile_index];
	85	int code = state->videoram2[tile_index + 0x400];
	86	int bit0 = (ctrl_5 >> 0) & 0x03;
	87	int bit1 = (ctrl_5 >> 2) & 0x03;
	88	int bit2 = (ctrl_5 >> 4) & 0x03;
	89	int bit3 = (ctrl_5 >> 6) & 0x03;
84	90	int bank = ((attr & 0x80) >> 7) |
85	91	((attr >> (bit0+2)) & 0x02) |
86	92	((attr >> (bit1+1)) & 0x04) |
87	93	((attr >> (bit2  )) & 0x08) |
88	94	((attr >> (bit3-1)) & 0x10) |
89		((K007121_ctrlram[0][0x03] & 0x01) << 5);
90		int mask = (K007121_ctrlram[0][0x04] & 0xf0) >> 4;
	95	((ctrl_3 & 0x01) << 5);
	96	int mask = (ctrl_4 & 0xf0) >> 4;
91	97
92		bank = (bank & ~(mask << 1)) | ((K007121_ctrlram[0][0x04] & mask) << 1);
	98	bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1);
93	99
94	100	SET_TILE_INFO(
95	101	0,
r6740	r6741
106	112
107	113	VIDEO_START( fastlane )
108	114	{
109		layer0 = tilemap_create(machine, get_tile_info0,tilemap_scan_rows,8,8,32,32);
110		layer1 = tilemap_create(machine, get_tile_info1,tilemap_scan_rows,8,8,32,32);
	115	fastlane_state *state = (fastlane_state *)machine->driver_data;
111	116
112		tilemap_set_scroll_rows( layer0, 32 );
	117	state->layer0 = tilemap_create(machine, get_tile_info0, tilemap_scan_rows, 8, 8, 32, 32);
	118	state->layer1 = tilemap_create(machine, get_tile_info1, tilemap_scan_rows, 8, 8, 32, 32);
113	119
114		clip0 = *video_screen_get_visible_area(machine->primary_screen);
115		clip0.min_x += 40;
	120	tilemap_set_scroll_rows(state->layer0, 32);
116	121
117		clip1 = *video_screen_get_visible_area(machine->primary_screen);
118		clip1.max_x = 39;
119		clip1.min_x = 0;
	122	state->clip0 = *video_screen_get_visible_area(machine->primary_screen);
	123	state->clip0.min_x += 40;
	124
	125	state->clip1 = *video_screen_get_visible_area(machine->primary_screen);
	126	state->clip1.max_x = 39;
	127	state->clip1.min_x = 0;
120	128	}
121	129
122	130	/***************************************************************************
r6740	r6741
127	135
128	136	WRITE8_HANDLER( fastlane_vram1_w )
129	137	{
130		fastlane_videoram1[offset] = data;
131		tilemap_mark_tile_dirty(layer0,offset & 0x3ff);
	138	fastlane_state *state = (fastlane_state *)space->machine->driver_data;
	139	state->videoram1[offset] = data;
	140	tilemap_mark_tile_dirty(state->layer0, offset & 0x3ff);
132	141	}
133	142
134	143	WRITE8_HANDLER( fastlane_vram2_w )
135	144	{
136		fastlane_videoram2[offset] = data;
137		tilemap_mark_tile_dirty(layer1,offset & 0x3ff);
	145	fastlane_state *state = (fastlane_state *)space->machine->driver_data;
	146	state->videoram2[offset] = data;
	147	tilemap_mark_tile_dirty(state->layer1, offset & 0x3ff);
138	148	}
139	149
140	150
r6740	r6741
147	157
148	158	VIDEO_UPDATE( fastlane )
149	159	{
150		rectangle finalclip0 = clip0, finalclip1 = clip1;
	160	fastlane_state *state = (fastlane_state *)screen->machine->driver_data;
	161	rectangle finalclip0 = state->clip0, finalclip1 = state->clip1;
151	162	int i, xoffs;
152	163
153	164	sect_rect(&finalclip0, cliprect);
r6740	r6741
156	167	set_pens(screen->machine);
157	168
158	169	/* set scroll registers */
159		xoffs = K007121_ctrlram[0][0x00];
160		for( i=0; i<32; i++ ){
161		tilemap_set_scrollx(layer0, i, fastlane_k007121_regs[0x20 + i] + xoffs - 40);
162		}
163		tilemap_set_scrolly( layer0, 0, K007121_ctrlram[0][0x02] );
	170	xoffs = k007121_ctrlram_r(state->k007121, 0);
	171	for (i = 0; i < 32; i++)
	172	tilemap_set_scrollx(state->layer0, i, state->k007121_regs[0x20 + i] + xoffs - 40);
164	173
165		tilemap_draw(bitmap,&finalclip0,layer0,0,0);
166		K007121_sprites_draw(0,bitmap,cliprect,screen->machine->gfx,screen->machine->colortable,screen->machine->generic.spriteram.u8,0,40,0,-1);
167		tilemap_draw(bitmap,&finalclip1,layer1,0,0);
	174	tilemap_set_scrolly(state->layer0, 0, k007121_ctrlram_r(state->k007121, 2));
	175
	176	tilemap_draw(bitmap, &finalclip0, state->layer0, 0, 0);
	177	k007121_sprites_draw(state->k007121, bitmap, cliprect, screen->machine->gfx[0], screen->machine->colortable, state->spriteram, 0, 40, 0, -1);
	178	tilemap_draw(bitmap, &finalclip1, state->layer1, 0, 0);
168	179	return 0;
169	180	}

src/mame/video/cidelsa.c

r6740	r6741
1	1	#include "driver.h"
2	2	#include "sound/cdp1869.h"
3	3	#include "sound/ay8910.h"
4		#include "cidelsa.h"
	4	#include "includes/cidelsa.h"
5	5
6	6	/* Page RAM Access */
7	7

src/mame/video/vendetta.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	static int layer_colorbase[3],bg_colorbase,sprite_colorbase;
r6740	r6741
12	12
13	13	***************************************************************************/
14	14
15		static void vendetta_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	15	void vendetta_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
16	16	{
17	17	*code |= ((*color & 0x03) << 8) | ((*color & 0x30) << 6) |
18	18	((*color & 0x0c) << 10) | (bank << 14);
19	19	*color = layer_colorbase[layer] + ((*color & 0xc0) >> 6);
20	20	}
21	21
22		static void esckids_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	22	void esckids_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
23	23	{
24	24	*code |= ((*color & 0x03) << 8) | ((*color & 0x10) << 6) |
25	25	((*color & 0x0c) <<  9) | (bank << 13);
r6740	r6741
33	33
34	34	***************************************************************************/
35	35
36		static void sprite_callback(int *code,int *color,int *priority_mask)
	36	void vendetta_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
37	37	{
38	38	int pri = (*color & 0x03e0) >> 4;   /* ??????? */
39	39	if (pri <= layerpri[2])                        *priority_mask = 0;
r6740	r6741
45	45	}
46	46
47	47
48
49	48	/***************************************************************************
50	49
51		Start the video hardware emulation.
52
53		***************************************************************************/
54
55		VIDEO_START( vendetta )
56		{
57		K053251_vh_start(machine);
58
59		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,vendetta_tile_callback);
60		K053247_vh_start(machine,"gfx2",53,6,NORMAL_PLANE_ORDER,sprite_callback);
61		}
62
63		VIDEO_START( esckids )
64		{
65		K053251_vh_start(machine);
66
67		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,esckids_tile_callback);
68		K053247_vh_start(machine,"gfx2",101,6,NORMAL_PLANE_ORDER,sprite_callback);
69		}
70
71
72
73		/***************************************************************************
74
75	50	Display refresh
76	51
77	52	***************************************************************************/
r6740	r6741
94	69
95	70	VIDEO_UPDATE( vendetta )
96	71	{
	72	const device_config *k053246 = devtag_get_device(screen->machine, "k053246");
	73	const device_config *k053251 = devtag_get_device(screen->machine, "k053251");
	74	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
97	75	int layer[3];
98	76
99	77
100		bg_colorbase       = K053251_get_palette_index(K053251_CI0);
101		sprite_colorbase   = K053251_get_palette_index(K053251_CI1);
102		layer_colorbase[0] = K053251_get_palette_index(K053251_CI2);
103		layer_colorbase[1] = K053251_get_palette_index(K053251_CI3);
104		layer_colorbase[2] = K053251_get_palette_index(K053251_CI4);
	78	bg_colorbase       = k053251_get_palette_index(k053251, K053251_CI0);
	79	sprite_colorbase   = k053251_get_palette_index(k053251, K053251_CI1);
	80	layer_colorbase[0] = k053251_get_palette_index(k053251, K053251_CI2);
	81	layer_colorbase[1] = k053251_get_palette_index(k053251, K053251_CI3);
	82	layer_colorbase[2] = k053251_get_palette_index(k053251, K053251_CI4);
105	83
106		K052109_tilemap_update();
	84	k052109_tilemap_update(k052109);
107	85
108	86	layer[0] = 0;
109		layerpri[0] = K053251_get_priority(K053251_CI2);
	87	layerpri[0] = k053251_get_priority(k053251, K053251_CI2);
110	88	layer[1] = 1;
111		layerpri[1] = K053251_get_priority(K053251_CI3);
	89	layerpri[1] = k053251_get_priority(k053251, K053251_CI3);
112	90	layer[2] = 2;
113		layerpri[2] = K053251_get_priority(K053251_CI4);
	91	layerpri[2] = k053251_get_priority(k053251, K053251_CI4);
114	92
115	93	sortlayers(layer,layerpri);
116	94
117	95	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
118		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[0]],TILEMAP_DRAW_OPAQUE,1);
119		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[1]],0,2);
120		tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[2]],0,4);
	96	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[0], TILEMAP_DRAW_OPAQUE, 1);
	97	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[1], 0, 2);
	98	k052109_tilemap_draw(k052109, bitmap, cliprect, layer[2], 0, 4);
121	99
122		K053247_sprites_draw(screen->machine, bitmap,cliprect);
	100	k053247_sprites_draw(k053246, bitmap, cliprect);
123	101	return 0;
124	102	}

src/mame/video/fcombat.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "fcombat.h"
	8	#include "includes/fcombat.h"
9	9
10	10
11	11	static TILE_GET_INFO( get_bg_tile_info )

src/mame/video/pktgaldx.c

r6740	r6741
1	1	#include "driver.h"
2		#include "deco16ic.h"
	2	#include "includes/deco16ic.h"
3	3
4	4	UINT16* pcktgaldb_fgram;
5	5	UINT16* pcktgaldb_sprites;

src/mame/video/atarigx2.c

r6740	r6741
21	21
22	22	#include "driver.h"
23	23	#include "machine/atarigen.h"
24		#include "atarigx2.h"
	24	#include "includes/atarigx2.h"
25	25
26	26
27	27
r6740	r6741
108	108	/* initialize the alphanumerics */
109	109	state->atarigen.alpha_tilemap = tilemap_create(machine, get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
110	110	tilemap_set_transparent_pen(state->atarigen.alpha_tilemap, 0);
	111
	112	/* save states */
	113	state_save_register_global(machine, state->current_control);
	114	state_save_register_global(machine, state->playfield_tile_bank);
	115	state_save_register_global(machine, state->playfield_color_bank);
	116	state_save_register_global(machine, state->playfield_xscroll);
	117	state_save_register_global(machine, state->playfield_yscroll);
111	118	}
112	119
113	120

src/mame/video/fuukifg2.c

r6740	r6741
25	25	***************************************************************************/
26	26
27	27	#include "driver.h"
28		#include "fuukifg2.h"
	28	#include "includes/fuukifg2.h"
29	29
30	30	/***************************************************************************
31	31

src/mame/video/circus.c

r6740	r6741
12	12
13	13	#include "driver.h"
14	14	#include "sound/samples.h"
15		#include "circus.h"
	15	#include "includes/circus.h"
16	16
17	17
18	18	WRITE8_HANDLER( circus_videoram_w )

src/mame/video/relief.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "machine/atarigen.h"
9		#include "relief.h"
	9	#include "includes/relief.h"
10	10
11	11
12	12

src/mame/video/taito_f3.c

r6740	r6741
205	205	***************************************************************************/
206	206
207	207	#include "driver.h"
208		#include "taito_f3.h"
	208	#include "includes/taito_f3.h"
209	209	#include "ui.h"
210	210
211	211	#define VERBOSE 0

src/mame/video/champbas.c

r6740	r6741
1	1	#include "driver.h"
2	2	#include "video/resnet.h"
3		#include "champbas.h"
	3	#include "includes/champbas.h"
4	4
5	5
6	6	/***************************************************************************

src/mame/video/ssozumo.c

r6740	r6741
9	9
10	10	#include "driver.h"
11	11
	12	UINT8 *ssozumo_videoram;
	13	UINT8 *ssozumo_colorram;
12	14	UINT8 *ssozumo_videoram2;
13	15	UINT8 *ssozumo_colorram2;
14	16
r6740	r6741
46	48
47	49	WRITE8_HANDLER( ssozumo_videoram_w )
48	50	{
49		space->machine->generic.videoram.u8[offset] = data;
	51	ssozumo_videoram[offset] = data;
50	52	tilemap_mark_tile_dirty(bg_tilemap, offset);
51	53	}
52	54
53	55	WRITE8_HANDLER( ssozumo_colorram_w )
54	56	{
55		space->machine->generic.colorram.u8[offset] = data;
	57	ssozumo_colorram[offset] = data;
56	58	tilemap_mark_tile_dirty(bg_tilemap, offset);
57	59	}
58	60
r6740	r6741
113	115
114	116	static TILE_GET_INFO( get_bg_tile_info )
115	117	{
116		int code = machine->generic.videoram.u8[tile_index] + ((machine->generic.colorram.u8[tile_index] & 0x08) << 5);
117		int color = (machine->generic.colorram.u8[tile_index] & 0x30) >> 4;
	118	int code = ssozumo_videoram[tile_index] + ((ssozumo_colorram[tile_index] & 0x08) << 5);
	119	int color = (ssozumo_colorram[tile_index] & 0x30) >> 4;
118	120	int flags = ((tile_index % 32) >= 16) ? TILE_FLIPY : 0;
119	121
120	122	SET_TILE_INFO(1, code, color, flags);

src/mame/video/mcr.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "mcr.h"
	8	#include "includes/mcr.h"
9	9
10	10
11	11	INT8 mcr12_sprite_xoffs;

src/mame/video/m107.c

r6740	r6741
35	35	*****************************************************************************/
36	36
37	37	#include "driver.h"
38		#include "m107.h"
	38	#include "includes/m107.h"
39	39
40	40	typedef struct _pf_layer_info pf_layer_info;
41	41	struct _pf_layer_info

src/mame/video/matmania.c

r6740	r6741
17	17
18	18
19	19
	20	UINT8 *matmania_videoram,*matmania_colorram;
	21	size_t matmania_videoram_size;
20	22	UINT8 *matmania_videoram2,*matmania_colorram2;
21	23	size_t matmania_videoram2_size;
22	24	UINT8 *matmania_videoram3,*matmania_colorram3;
r6740	r6741
144	146
145	147
146	148	/* Update the tiles in the left tile ram bank */
147		for (offs = screen->machine->generic.videoram_size - 1;offs >= 0;offs--)
	149	for (offs = matmania_videoram_size - 1;offs >= 0;offs--)
148	150	{
149	151	int sx,sy;
150	152
r6740	r6741
153	155	sy = offs % 32;
154	156
155	157	drawgfx_opaque(tmpbitmap,0,screen->machine->gfx[1],
156		screen->machine->generic.videoram.u8[offs] + ((screen->machine->generic.colorram.u8[offs] & 0x08) << 5),
157		(screen->machine->generic.colorram.u8[offs] & 0x30) >> 4,
	158	matmania_videoram3[offs] + ((matmania_colorram[offs] & 0x08) << 5),
	159	(matmania_colorram[offs] & 0x30) >> 4,
158	160	0,sy >= 16,   /* flip horizontally tiles on the right half of the bitmap */
159	161	16*sx,16*sy);
160	162	}
r6740	r6741
228	230
229	231
230	232	/* Update the tiles in the left tile ram bank */
231		for (offs = screen->machine->generic.videoram_size - 1;offs >= 0;offs--)
	233	for (offs = matmania_videoram_size - 1;offs >= 0;offs--)
232	234	{
233	235	int sx,sy;
234	236
r6740	r6741
237	239	sy = offs % 32;
238	240
239	241	drawgfx_opaque(tmpbitmap,0,screen->machine->gfx[1],
240		screen->machine->generic.videoram.u8[offs] + ((screen->machine->generic.colorram.u8[offs] & 0x03) << 8),
241		(screen->machine->generic.colorram.u8[offs] & 0x30) >> 4,
	242	matmania_videoram[offs] + ((matmania_colorram[offs] & 0x03) << 8),
	243	(matmania_colorram[offs] & 0x30) >> 4,
242	244	0,sy >= 16,   /* flip horizontally tiles on the right half of the bitmap */
243	245	16*sx,16*sy);
244	246	}

src/mame/video/megasys1.c

r6740	r6741
192	192	***************************************************************************/
193	193
194	194	#include "driver.h"
195		#include "megasys1.h"
	195	#include "includes/megasys1.h"
196	196
197	197	/* Variables defined here, that have to be shared: */
198	198	tilemap *megasys1_tmap[3];

src/mame/video/crshrace.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
3		#include "crshrace.h"
	2	#include "video/konicdev.h"
	3	#include "includes/crshrace.h"
4	4
5	5
6		UINT16 *crshrace_videoram1,*crshrace_videoram2;
7		//UINT16 *crshrace_roz_ctrl1,*crshrace_roz_ctrl2;
8
9		static int roz_bank,gfxctrl,flipscreen;
10
11		static tilemap *tilemap1,*tilemap2;
12
13
14
15	6	/***************************************************************************
16	7
17	8	Callbacks for the TileMap code
r6740	r6741
20	11
21	12	static TILE_GET_INFO( get_tile_info1 )
22	13	{
23		int code = crshrace_videoram1[tile_index];
	14	crshrace_state *state = (crshrace_state *)machine->driver_data;
	15	int code = state->videoram1[tile_index];
24	16
25		SET_TILE_INFO(1,(code & 0xfff) + (roz_bank << 12),code >> 12,0);
	17	SET_TILE_INFO(1, (code & 0xfff) + (state->roz_bank << 12), code >> 12, 0);
26	18	}
27	19
28	20	static TILE_GET_INFO( get_tile_info2 )
29	21	{
30		int code = crshrace_videoram2[tile_index];
	22	crshrace_state *state = (crshrace_state *)machine->driver_data;
	23	int code = state->videoram2[tile_index];
31	24
32		SET_TILE_INFO(0,code,0,0);
	25	SET_TILE_INFO(0, code, 0, 0);
33	26	}
34	27
35	28
r6740	r6741
41	34
42	35	VIDEO_START( crshrace )
43	36	{
44		tilemap1 = tilemap_create(machine, get_tile_info1,tilemap_scan_rows,16,16,64,64);
45		tilemap2 = tilemap_create(machine, get_tile_info2,tilemap_scan_rows, 8, 8,64,64);
	37	crshrace_state *state = (crshrace_state *)machine->driver_data;
46	38
47		K053936_wraparound_enable(0, 1);
48		K053936_set_offset(0, -48, -21);
	39	state->tilemap1 = tilemap_create(machine, get_tile_info1, tilemap_scan_rows, 16, 16, 64, 64);
	40	state->tilemap2 = tilemap_create(machine, get_tile_info2, tilemap_scan_rows, 8, 8, 64, 64);
49	41
50		tilemap_set_transparent_pen(tilemap1,0x0f);
51		tilemap_set_transparent_pen(tilemap2,0xff);
	42	tilemap_set_transparent_pen(state->tilemap1, 0x0f);
	43	tilemap_set_transparent_pen(state->tilemap2, 0xff);
52	44	}
53	45
54	46
r6740	r6741
60	52
61	53	WRITE16_HANDLER( crshrace_videoram1_w )
62	54	{
63		COMBINE_DATA(&crshrace_videoram1[offset]);
64		tilemap_mark_tile_dirty(tilemap1,offset);
	55	crshrace_state *state = (crshrace_state *)space->machine->driver_data;
	56
	57	COMBINE_DATA(&state->videoram1[offset]);
	58	tilemap_mark_tile_dirty(state->tilemap1, offset);
65	59	}
66	60
67	61	WRITE16_HANDLER( crshrace_videoram2_w )
68	62	{
69		COMBINE_DATA(&crshrace_videoram2[offset]);
70		tilemap_mark_tile_dirty(tilemap2,offset);
	63	crshrace_state *state = (crshrace_state *)space->machine->driver_data;
	64
	65	COMBINE_DATA(&state->videoram2[offset]);
	66	tilemap_mark_tile_dirty(state->tilemap2, offset);
71	67	}
72	68
73	69	WRITE16_HANDLER( crshrace_roz_bank_w )
74	70	{
	71	crshrace_state *state = (crshrace_state *)space->machine->driver_data;
	72
75	73	if (ACCESSING_BITS_0_7)
76	74	{
77		if (roz_bank != (data & 0xff))
	75	if (state->roz_bank != (data & 0xff))
78	76	{
79		roz_bank = data & 0xff;
80		tilemap_mark_all_tiles_dirty(tilemap1);
	77	state->roz_bank = data & 0xff;
	78	tilemap_mark_all_tiles_dirty(state->tilemap1);
81	79	}
82	80	}
83	81	}
r6740	r6741
85	83
86	84	WRITE16_HANDLER( crshrace_gfxctrl_w )
87	85	{
	86	crshrace_state *state = (crshrace_state *)space->machine->driver_data;
	87
88	88	if (ACCESSING_BITS_0_7)
89	89	{
90		gfxctrl = data & 0xdf;
91		flipscreen = data & 0x20;
	90	state->gfxctrl = data & 0xdf;
	91	state->flipscreen = data & 0x20;
92	92	}
93	93	}
94	94
r6740	r6741
101	101
102	102	static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
103	103	{
104		UINT16 *buffered_spriteram16 = machine->generic.buffered_spriteram.u16;
105		UINT16 *buffered_spriteram16_2 = machine->generic.buffered_spriteram2.u16;
	104	crshrace_state *state = (crshrace_state *)machine->driver_data;
	105	UINT16 *buffered_spriteram = machine->generic.buffered_spriteram.u16;
	106	UINT16 *buffered_spriteram_2 = machine->generic.buffered_spriteram2.u16;
106	107	int offs;
107	108
108
109	109	offs = 0;
110		while (offs < 0x0400 && (buffered_spriteram16[offs] & 0x4000) == 0)
	110	while (offs < 0x0400 && (buffered_spriteram[offs] & 0x4000) == 0)
111	111	{
112	112	int attr_start;
113	113	int map_start;
114		int ox,oy,x,y,xsize,ysize,zoomx,zoomy,flipx,flipy,color;
	114	int ox, oy, x, y, xsize, ysize, zoomx, zoomy, flipx, flipy, color;
115	115	/* table hand made by looking at the ship explosion in aerofgt attract mode */
116	116	/* it's almost a logarithmic scale but not exactly */
117	117	static const int zoomtable[16] = { 0,7,14,20,25,30,34,38,42,46,49,52,54,57,59,61 };
118	118
119		attr_start = 4 * (buffered_spriteram16[offs++] & 0x03ff);
	119	attr_start = 4 * (buffered_spriteram[offs++] & 0x03ff);
120	120
121		ox = buffered_spriteram16[attr_start + 1] & 0x01ff;
122		xsize = (buffered_spriteram16[attr_start + 1] & 0x0e00) >> 9;
123		zoomx = (buffered_spriteram16[attr_start + 1] & 0xf000) >> 12;
124		oy = buffered_spriteram16[attr_start + 0] & 0x01ff;
125		ysize = (buffered_spriteram16[attr_start + 0] & 0x0e00) >> 9;
126		zoomy = (buffered_spriteram16[attr_start + 0] & 0xf000) >> 12;
127		flipx = buffered_spriteram16[attr_start + 2] & 0x4000;
128		flipy = buffered_spriteram16[attr_start + 2] & 0x8000;
129		color = (buffered_spriteram16[attr_start + 2] & 0x1f00) >> 8;
130		map_start = buffered_spriteram16[attr_start + 3] & 0x7fff;
	121	ox = buffered_spriteram[attr_start + 1] & 0x01ff;
	122	xsize = (buffered_spriteram[attr_start + 1] & 0x0e00) >> 9;
	123	zoomx = (buffered_spriteram[attr_start + 1] & 0xf000) >> 12;
	124	oy = buffered_spriteram[attr_start + 0] & 0x01ff;
	125	ysize = (buffered_spriteram[attr_start + 0] & 0x0e00) >> 9;
	126	zoomy = (buffered_spriteram[attr_start + 0] & 0xf000) >> 12;
	127	flipx = buffered_spriteram[attr_start + 2] & 0x4000;
	128	flipy = buffered_spriteram[attr_start + 2] & 0x8000;
	129	color = (buffered_spriteram[attr_start + 2] & 0x1f00) >> 8;
	130	map_start = buffered_spriteram[attr_start + 3] & 0x7fff;
131	131
132		zoomx = 16 - zoomtable[zoomx]/8;
133		zoomy = 16 - zoomtable[zoomy]/8;
	132	zoomx = 16 - zoomtable[zoomx] / 8;
	133	zoomy = 16 - zoomtable[zoomy] / 8;
134	134
135		if (buffered_spriteram16[attr_start + 2] & 0x20ff) color = mame_rand(machine);
	135	if (buffered_spriteram[attr_start + 2] & 0x20ff) color = mame_rand(machine);
136	136
137		for (y = 0;y <= ysize;y++)
	137	for (y = 0; y <= ysize; y++)
138	138	{
139	139	int sx,sy;
140	140
141	141	if (flipy) sy = ((oy + zoomy * (ysize - y) + 16) & 0x1ff) - 16;
142	142	else sy = ((oy + zoomy * y + 16) & 0x1ff) - 16;
143	143
144		for (x = 0;x <= xsize;x++)
	144	for (x = 0; x <= xsize; x++)
145	145	{
146	146	int code;
147	147
148	148	if (flipx) sx = ((ox + zoomx * (xsize - x) + 16) & 0x1ff) - 16;
149	149	else sx = ((ox + zoomx * x + 16) & 0x1ff) - 16;
150	150
151		code = buffered_spriteram16_2[map_start & 0x7fff];
	151	code = buffered_spriteram_2[map_start & 0x7fff];
152	152	map_start++;
153	153
154		if (flipscreen)
	154	if (state->flipscreen)
155	155	drawgfxzoom_transpen(bitmap,cliprect,machine->gfx[2],
156	156	code,
157	157	color,
r6740	r6741
171	171	}
172	172
173	173
174		static void draw_bg(bitmap_t *bitmap,const rectangle *cliprect)
	174	static void draw_bg( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
175	175	{
176		tilemap_draw(bitmap,cliprect,tilemap2,0,0);
	176	crshrace_state *state = (crshrace_state *)machine->driver_data;
	177	tilemap_draw(bitmap, cliprect, state->tilemap2, 0, 0);
177	178	}
178	179
179	180
180		static void draw_fg(bitmap_t *bitmap,const rectangle *cliprect)
	181	static void draw_fg(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
181	182	{
182		K053936_0_zoom_draw(bitmap,cliprect,tilemap1,0,0,1);
	183	crshrace_state *state = (crshrace_state *)machine->driver_data;
	184	k053936_zoom_draw(state->k053936, bitmap, cliprect, state->tilemap1, 0, 0, 1);
183	185	}
184	186
185	187
186	188	VIDEO_UPDATE( crshrace )
187	189	{
188		if (gfxctrl & 0x04)   /* display disable? */
	190	crshrace_state *state = (crshrace_state *)screen->machine->driver_data;
	191
	192	if (state->gfxctrl & 0x04)   /* display disable? */
189	193	{
190		bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
	194	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
191	195	return 0;
192	196	}
193	197
194		bitmap_fill(bitmap,cliprect,0x1ff);
	198	bitmap_fill(bitmap, cliprect, 0x1ff);
195	199
196		switch (gfxctrl & 0xfb)
	200	switch (state->gfxctrl & 0xfb)
197	201	{
198	202	case 0x00:   /* high score screen */
199		draw_sprites(screen->machine,bitmap,cliprect);
200		draw_bg(bitmap,cliprect);
201		draw_fg(bitmap,cliprect);
	203	draw_sprites(screen->machine, bitmap, cliprect);
	204	draw_bg(screen->machine, bitmap, cliprect);
	205	draw_fg(screen->machine, bitmap, cliprect);
202	206	break;
203	207	case 0x01:
204	208	case 0x02:
205		draw_bg(bitmap,cliprect);
206		draw_fg(bitmap,cliprect);
207		draw_sprites(screen->machine,bitmap,cliprect);
	209	draw_bg(screen->machine, bitmap, cliprect);
	210	draw_fg(screen->machine, bitmap, cliprect);
	211	draw_sprites(screen->machine, bitmap, cliprect);
208	212	break;
209	213	default:
210		popmessage("gfxctrl = %02x",gfxctrl);
	214	popmessage("gfxctrl = %02x", state->gfxctrl);
211	215	break;
212	216	}
213	217	return 0;
r6740	r6741
217	221	{
218	222	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
219	223
220		buffer_spriteram16_w(space,0,0,0xffff);
221		buffer_spriteram16_2_w(space,0,0,0xffff);
	224	buffer_spriteram16_w(space, 0, 0, 0xffff);
	225	buffer_spriteram16_2_w(space, 0, 0, 0xffff);
222	226	}

src/mame/video/airbustr.c

r6740	r6741
31	31
32	32	**************************************************************************/
33	33	#include "driver.h"
34		#include "kan_pand.h"
	34	#include "video/kan_pand.h"
	35	#include "includes/airbustr.h"
35	36
36		UINT8 *airbustr_videoram2, *airbustr_colorram2;
37		//int airbustr_clear_sprites;
38		static tilemap *bg_tilemap, *fg_tilemap;
39		static bitmap_t *sprites_bitmap;
40
41	37	WRITE8_HANDLER( airbustr_videoram_w )
42	38	{
43		space->machine->generic.videoram.u8[offset] = data;
44		tilemap_mark_tile_dirty(bg_tilemap, offset);
	39	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	40	state->videoram[offset] = data;
	41	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
45	42	}
46	43
47	44	WRITE8_HANDLER( airbustr_colorram_w )
48	45	{
49		space->machine->generic.colorram.u8[offset] = data;
50		tilemap_mark_tile_dirty(bg_tilemap, offset);
	46	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	47	state->colorram[offset] = data;
	48	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
51	49	}
52	50
53	51	WRITE8_HANDLER( airbustr_videoram2_w )
54	52	{
55		airbustr_videoram2[offset] = data;
56		tilemap_mark_tile_dirty(fg_tilemap, offset);
	53	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	54	state->videoram2[offset] = data;
	55	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
57	56	}
58	57
59	58	WRITE8_HANDLER( airbustr_colorram2_w )
60	59	{
61		airbustr_colorram2[offset] = data;
62		tilemap_mark_tile_dirty(fg_tilemap, offset);
	60	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	61	state->colorram2[offset] = data;
	62	tilemap_mark_tile_dirty(state->fg_tilemap, offset);
63	63	}
64	64
65	65	/*  Scroll Registers
r6740	r6741
76	76
77	77	WRITE8_HANDLER( airbustr_scrollregs_w )
78	78	{
79		static int bg_scrollx, bg_scrolly, fg_scrollx, fg_scrolly, highbits;
80
	79	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
81	80	switch (offset)      // offset 0 <-> port 4
82	81	{
83		case 0x00:   fg_scrolly =  data;   break;   // low 8 bits
84		case 0x02:   fg_scrollx =  data;   break;
85		case 0x04:   bg_scrolly =  data;   break;
86		case 0x06:   bg_scrollx =  data;   break;
87		case 0x08:   highbits   = ~data;   break;   // complemented high bits
	82	case 0x00:   state->fg_scrolly = data;   break;   // low 8 bits
	83	case 0x02:   state->fg_scrollx = data;   break;
	84	case 0x04:   state->bg_scrolly = data;   break;
	85	case 0x06:   state->bg_scrollx = data;   break;
	86	case 0x08:   state->highbits   = ~data;   break;   // complemented high bits
88	87
89	88	default:   logerror("CPU #2 - port %02X written with %02X - PC = %04X\n", offset, data, cpu_get_pc(space->cpu));
90	89	}
91	90
92		tilemap_set_scrolly(bg_tilemap, 0, ((highbits << 5) & 0x100) + bg_scrolly);
93		tilemap_set_scrollx(bg_tilemap, 0, ((highbits << 6) & 0x100) + bg_scrollx);
94		tilemap_set_scrolly(fg_tilemap, 0, ((highbits << 7) & 0x100) + fg_scrolly);
95		tilemap_set_scrollx(fg_tilemap, 0, ((highbits << 8) & 0x100) + fg_scrollx);
	91	tilemap_set_scrolly(state->bg_tilemap, 0, ((state->highbits << 5) & 0x100) + state->bg_scrolly);
	92	tilemap_set_scrollx(state->bg_tilemap, 0, ((state->highbits << 6) & 0x100) + state->bg_scrollx);
	93	tilemap_set_scrolly(state->fg_tilemap, 0, ((state->highbits << 7) & 0x100) + state->fg_scrolly);
	94	tilemap_set_scrollx(state->fg_tilemap, 0, ((state->highbits << 8) & 0x100) + state->fg_scrollx);
96	95	}
97	96
98	97	static TILE_GET_INFO( get_fg_tile_info )
99	98	{
100		int attr = airbustr_colorram2[tile_index];
101		int code = airbustr_videoram2[tile_index] + ((attr & 0x0f) << 8);
	99	airbustr_state *state = (airbustr_state *)machine->driver_data;
	100	int attr = state->colorram2[tile_index];
	101	int code = state->videoram2[tile_index] + ((attr & 0x0f) << 8);
102	102	int color = attr >> 4;
103	103
104	104	SET_TILE_INFO(0, code, color, 0);
r6740	r6741
106	106
107	107	static TILE_GET_INFO( get_bg_tile_info )
108	108	{
109		int attr = machine->generic.colorram.u8[tile_index];
110		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0x0f) << 8);
	109	airbustr_state *state = (airbustr_state *)machine->driver_data;
	110	int attr = state->colorram[tile_index];
	111	int code = state->videoram[tile_index] + ((attr & 0x0f) << 8);
111	112	int color = (attr >> 4) + 16;
112	113
113	114	SET_TILE_INFO(0, code, color, 0);
r6740	r6741
115	116
116	117	VIDEO_START( airbustr )
117	118	{
118		bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 16, 16, 32, 32);
119		fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 16, 16, 32, 32);
	119	airbustr_state *state = (airbustr_state *)machine->driver_data;
120	120
121		sprites_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
122		state_save_register_global_bitmap(machine, sprites_bitmap);
123		tilemap_set_transparent_pen(fg_tilemap, 0);
	121	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 16, 16, 32, 32);
	122	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 16, 16, 32, 32);
124	123
125		tilemap_set_scrolldx(bg_tilemap, 0x094, 0x06a);
126		tilemap_set_scrolldy(bg_tilemap, 0x100, 0x1ff);
127		tilemap_set_scrolldx(fg_tilemap, 0x094, 0x06a);
128		tilemap_set_scrolldy(fg_tilemap, 0x100, 0x1ff);
	124	state->sprites_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
	125	tilemap_set_transparent_pen(state->fg_tilemap, 0);
	126
	127	tilemap_set_scrolldx(state->bg_tilemap, 0x094, 0x06a);
	128	tilemap_set_scrolldy(state->bg_tilemap, 0x100, 0x1ff);
	129	tilemap_set_scrolldx(state->fg_tilemap, 0x094, 0x06a);
	130	tilemap_set_scrolldy(state->fg_tilemap, 0x100, 0x1ff);
	131
	132	state_save_register_global_bitmap(machine, state->sprites_bitmap);
129	133	}
130	134
131	135
132	136	VIDEO_UPDATE( airbustr )
133	137	{
134		const device_config *pandora = devtag_get_device(screen->machine, "pandora");
135		tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
136		tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
	138	airbustr_state *state = (airbustr_state *)screen->machine->driver_data;
137	139
	140	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
	141	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
	142
138	143	// copy the sprite bitmap to the screen
139		pandora_update(pandora, bitmap, cliprect);
	144	pandora_update(state->pandora, bitmap, cliprect);
140	145
141	146	return 0;
142	147	}
143	148
144	149	VIDEO_EOF( airbustr )
145	150	{
146		const device_config *pandora = devtag_get_device(machine, "pandora");
	151	airbustr_state *state = (airbustr_state *)machine->driver_data;
	152
147	153	// update the sprite bitmap
148		pandora_eof(pandora);
	154	pandora_eof(state->pandora);
149	155	}
150	156

src/mame/video/pacman.c

r6740	r6741
20	20	#include "includes/pacman.h"
21	21	#include "video/resnet.h"
22	22
	23	UINT8 *pacman_videoram;
	24	UINT8 *pacman_colorram;
23	25	static tilemap *bg_tilemap;
24	26	static UINT8 charbank;
25	27	static UINT8 spritebank;
r6740	r6741
152	154
153	155	static TILE_GET_INFO( pacman_get_tile_info )
154	156	{
155		int code = machine->generic.videoram.u8[tile_index] | (charbank << 8);
156		int attr = (machine->generic.colorram.u8[tile_index] & 0x1f) | (colortablebank << 5) | (palettebank << 6 );
	157	int code = pacman_videoram[tile_index] | (charbank << 8);
	158	int attr = (pacman_colorram[tile_index] & 0x1f) | (colortablebank << 5) | (palettebank << 6 );
157	159
158	160	SET_TILE_INFO(0,code,attr,0);
159	161	}
r6740	r6741
198	200
199	201	WRITE8_HANDLER( pacman_videoram_w )
200	202	{
201		space->machine->generic.videoram.u8[offset] = data;
	203	pacman_videoram[offset] = data;
202	204	tilemap_mark_tile_dirty( bg_tilemap, offset );
203	205	}
204	206
205	207	WRITE8_HANDLER( pacman_colorram_w )
206	208	{
207		space->machine->generic.colorram.u8[offset] = data;
	209	pacman_colorram[offset] = data;
208	210	tilemap_mark_tile_dirty( bg_tilemap, offset );
209	211	}
210	212
r6740	r6741
367	369
368	370	colbank = s2650games_tileram[tile_index & 0x1f] & 0x3;
369	371
370		code = machine->generic.videoram.u8[tile_index] + (colbank << 8);
371		attr = machine->generic.colorram.u8[tile_index & 0x1f];
	372	code = pacman_videoram[tile_index] + (colbank << 8);
	373	attr = pacman_colorram[tile_index & 0x1f];
372	374
373	375	SET_TILE_INFO(0,code,attr & 0x1f,0);
374	376	}
r6740	r6741
442	444
443	445	WRITE8_HANDLER( s2650games_videoram_w )
444	446	{
445		space->machine->generic.videoram.u8[offset] = data;
	447	pacman_videoram[offset] = data;
446	448	tilemap_mark_tile_dirty(bg_tilemap,offset);
447	449	}
448	450
449	451	WRITE8_HANDLER( s2650games_colorram_w )
450	452	{
451	453	int i;
452		space->machine->generic.colorram.u8[offset & 0x1f] = data;
	454	pacman_colorram[offset & 0x1f] = data;
453	455	for (i = offset; i < 0x0400; i += 32)
454	456	tilemap_mark_tile_dirty(bg_tilemap, i);
455	457	}
r6740	r6741
512	514	color_index = tile_index + 0x80;
513	515	}
514	516
515		code = machine->generic.videoram.u8[tile_index] | (charbank << 8);
516		attr = (machine->generic.videoram.u8[color_index] & 0x1f) | (colortablebank << 5) | (palettebank << 6 );
	517	code = pacman_videoram[tile_index] | (charbank << 8);
	518	attr = (pacman_videoram[color_index] & 0x1f) | (colortablebank << 5) | (palettebank << 6 );
517	519
518	520	SET_TILE_INFO(0,code,attr,0);
519	521	}
r6740	r6741
567	569
568	570	WRITE8_HANDLER( jrpacman_videoram_w )
569	571	{
570		space->machine->generic.videoram.u8[offset] = data;
	572	pacman_videoram[offset] = data;
571	573	jrpacman_mark_tile_dirty(offset);
572	574	}
573	575

src/mame/video/dcheese.c

r6740	r6741
6	6
7	7
8	8	#include "driver.h"
9		#include "dcheese.h"
	9	#include "includes/dcheese.h"
10	10
11	11
12	12	/*************************************

src/mame/video/chqflag.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "video/konamiic.h"
11		#include "cpu/z80/z80.h"
	10	#include "video/konicdev.h"
12	11
13		#define SPRITEROM_MEM_REGION "gfx1"
14		#define ZOOMROM0_MEM_REGION "gfx2"
15		#define ZOOMROM1_MEM_REGION "gfx3"
16
17	12	static int sprite_colorbase,zoom_colorbase[2];
18	13
19	14	/***************************************************************************
r6740	r6741
22	17
23	18	***************************************************************************/
24	19
25		static void sprite_callback(int *code,int *color,int *priority,int *shadow)
	20	void chqflag_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
26	21	{
27	22	*priority = (*color & 0x10) >> 4;
28	23	*color = sprite_colorbase + (*color & 0x0f);
r6740	r6741
35	30
36	31	***************************************************************************/
37	32
38		static void zoom_callback_0(int *code,int *color,int *flags)
39		{
40		*code |= ((*color & 0x03) << 8);
	33	void chqflag_zoom_callback_0(running_machine *machine, int *code,int *color,int *flags)
	34	{   *code |= ((*color & 0x03) << 8);
41	35	*color = zoom_colorbase[0] + ((*color & 0x3c) >> 2);
42	36	}
43	37
44		static void zoom_callback_1(int *code,int *color,int *flags)
	38	void chqflag_zoom_callback_1(running_machine *machine, int *code,int *color,int *flags)
45	39	{
46	40	*flags = TILE_FLIPYX((*color & 0xc0) >> 6);
47	41	*code |= ((*color & 0x0f) << 8);
r6740	r6741
59	53	sprite_colorbase = 0;
60	54	zoom_colorbase[0] = 0x10;
61	55	zoom_colorbase[1] = 0x02;
62
63		K051960_vh_start(machine,SPRITEROM_MEM_REGION,NORMAL_PLANE_ORDER,sprite_callback);
64		K051316_vh_start_0(machine,ZOOMROM0_MEM_REGION,4,FALSE,0,zoom_callback_0);
65		K051316_vh_start_1(machine,ZOOMROM1_MEM_REGION,8,TRUE,0xc0,zoom_callback_1);
66
67		K051316_set_offset(0,7,0);
68		K051316_wraparound_enable(1,1);
69	56	}
70	57
71	58	/***************************************************************************
r6740	r6741
76	63
77	64	VIDEO_UPDATE( chqflag )
78	65	{
79		bitmap_fill(bitmap,cliprect,0);
	66	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
	67	const device_config *k051316_1 = devtag_get_device(screen->machine, "k051316_1");
	68	const device_config *k051316_2 = devtag_get_device(screen->machine, "k051316_2");
80	69
81		K051316_zoom_draw_1(bitmap,cliprect,TILEMAP_DRAW_LAYER1,0);
82		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
83		K051316_zoom_draw_1(bitmap,cliprect,TILEMAP_DRAW_LAYER0,0);
84		K051960_sprites_draw(screen->machine,bitmap,cliprect,1,1);
85		K051316_zoom_draw_0(bitmap,cliprect,0,0);
	70	bitmap_fill(bitmap, cliprect, 0);
	71
	72	k051316_zoom_draw(k051316_2, bitmap, cliprect, TILEMAP_DRAW_LAYER1, 0);
	73	k051960_sprites_draw(k051960, bitmap, cliprect, 0, 0);
	74	k051316_zoom_draw(k051316_2, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0);
	75	k051960_sprites_draw(k051960, bitmap, cliprect, 1, 1);
	76	k051316_zoom_draw(k051316_1, bitmap, cliprect, 0, 0);
86	77	return 0;
87	78	}

src/mame/video/bwing.c

r6740	r6741
9	9	// Directives
10	10
11	11	#include "driver.h"
12		#include "bwing.h"
	12	#include "includes/bwing.h"
13	13
14	14
15	15	#define BW_DEBUG 0

src/mame/video/sf.c

r6740	r6741
1	1	#include "driver.h"
	2	#include "includes/sf.h"
2	3
3
4		UINT16 *sf_objectram,*sf_videoram;
5
6		static int sf_active = 0;
7
8		static tilemap *bg_tilemap, *fg_tilemap, *tx_tilemap;
9
10
11	4	/***************************************************************************
12	5
13	6	Callbacks for the TileMap code
r6740	r6741
16	9
17	10	static TILE_GET_INFO( get_bg_tile_info )
18	11	{
19		UINT8 *base = memory_region(machine, "gfx5") + 2*tile_index;
	12	UINT8 *base = memory_region(machine, "gfx5") + 2 * tile_index;
20	13	int attr = base[0x10000];
21	14	int color = base[0];
22		int code = (base[0x10000+1]<<8) | base[1];
	15	int code = (base[0x10000 + 1] << 8) | base[1];
23	16	SET_TILE_INFO(
24	17	0,
25	18	code,
r6740	r6741
29	22
30	23	static TILE_GET_INFO( get_fg_tile_info )
31	24	{
32		UINT8 *base = memory_region(machine, "gfx5") + 0x20000 + 2*tile_index;
	25	UINT8 *base = memory_region(machine, "gfx5") + 0x20000 + 2 * tile_index;
33	26	int attr = base[0x10000];
34	27	int color = base[0];
35		int code = (base[0x10000+1]<<8) | base[1];
	28	int code = (base[0x10000 + 1] << 8) | base[1];
36	29	SET_TILE_INFO(
37	30	1,
38	31	code,
r6740	r6741
42	35
43	36	static TILE_GET_INFO( get_tx_tile_info )
44	37	{
45		int code = sf_videoram[tile_index];
	38	sf_state *state = (sf_state *)machine->driver_data;
	39	int code = state->videoram[tile_index];
46	40	SET_TILE_INFO(
47	41	3,
48	42	code & 0x3ff,
r6740	r6741
60	54
61	55	VIDEO_START( sf )
62	56	{
63		bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan_cols,     16,16,2048,16);
64		fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_cols,16,16,2048,16);
65		tx_tilemap = tilemap_create(machine, get_tx_tile_info,tilemap_scan_rows, 8, 8,  64,32);
	57	sf_state *state = (sf_state *)machine->driver_data;
66	58
67		tilemap_set_transparent_pen(fg_tilemap,15);
68		tilemap_set_transparent_pen(tx_tilemap,3);
	59	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_cols, 16, 16, 2048, 16);
	60	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_cols, 16, 16, 2048, 16);
	61	state->tx_tilemap = tilemap_create(machine, get_tx_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
	62
	63	tilemap_set_transparent_pen(state->fg_tilemap, 15);
	64	tilemap_set_transparent_pen(state->tx_tilemap, 3);
69	65	}
70	66
71	67
r6740	r6741
78	74
79	75	WRITE16_HANDLER( sf_videoram_w )
80	76	{
81		COMBINE_DATA(&sf_videoram[offset]);
82		tilemap_mark_tile_dirty(tx_tilemap,offset);
	77	sf_state *state = (sf_state *)space->machine->driver_data;
	78	COMBINE_DATA(&state->videoram[offset]);
	79	tilemap_mark_tile_dirty(state->tx_tilemap, offset);
83	80	}
84	81
85	82	WRITE16_HANDLER( sf_bg_scroll_w )
86	83	{
87		static UINT16 scroll;
88		COMBINE_DATA(&scroll);
89		tilemap_set_scrollx(bg_tilemap,0,scroll);
	84	sf_state *state = (sf_state *)space->machine->driver_data;
	85	COMBINE_DATA(&state->bgscroll);
	86	tilemap_set_scrollx(state->bg_tilemap, 0, state->bgscroll);
90	87	}
91	88
92	89	WRITE16_HANDLER( sf_fg_scroll_w )
93	90	{
94		static UINT16 scroll;
95		COMBINE_DATA(&scroll);
96		tilemap_set_scrollx(fg_tilemap,0,scroll);
	91	sf_state *state = (sf_state *)space->machine->driver_data;
	92	COMBINE_DATA(&state->fgscroll);
	93	tilemap_set_scrollx(state->fg_tilemap, 0, state->fgscroll);
97	94	}
98	95
99	96	WRITE16_HANDLER( sf_gfxctrl_w )
100	97	{
101		/* b0 = reset, or maybe "set anyway" */
102		/* b1 = pulsed when control6.b6==0 until it's 1 */
103		/* b2 = active when dip 8 (flip) on */
104		/* b3 = active character plane */
105		/* b4 = unused */
106		/* b5 = active background plane */
107		/* b6 = active middle plane */
108		/* b7 = active sprites */
	98	/* b0 = reset, or maybe "set anyway" */
	99	/* b1 = pulsed when control6.b6==0 until it's 1 */
	100	/* b2 = active when dip 8 (flip) on */
	101	/* b3 = active character plane */
	102	/* b4 = unused */
	103	/* b5 = active background plane */
	104	/* b6 = active middle plane */
	105	/* b7 = active sprites */
	106
	107	sf_state *state = (sf_state *)space->machine->driver_data;
109	108	if (ACCESSING_BITS_0_7)
110	109	{
111		sf_active = data & 0xff;
	110	state->sf_active = data & 0xff;
112	111	flip_screen_set(space->machine, data & 0x04);
113		tilemap_set_enable(tx_tilemap,data & 0x08);
114		tilemap_set_enable(bg_tilemap,data & 0x20);
115		tilemap_set_enable(fg_tilemap,data & 0x40);
	112	tilemap_set_enable(state->tx_tilemap, data & 0x08);
	113	tilemap_set_enable(state->bg_tilemap, data & 0x20);
	114	tilemap_set_enable(state->fg_tilemap, data & 0x40);
116	115	}
117	116	}
118	117
r6740	r6741
124	123
125	124	***************************************************************************/
126	125
127		INLINE int sf_invert(int nb)
	126	INLINE int sf_invert( int nb )
128	127	{
129	128	static const int delta[4] = {0x00, 0x18, 0x18, 0x00};
130	129	return nb ^ delta[(nb >> 3) & 3];
131	130	}
132	131
133		static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
	132	static void draw_sprites( running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect )
134	133	{
	134	sf_state *state = (sf_state *)machine->driver_data;
135	135	int offs;
136	136
137		for (offs = 0x1000-0x20;offs >= 0;offs -= 0x20)
	137	for (offs = 0x1000 - 0x20; offs >= 0; offs -= 0x20)
138	138	{
139		int c = sf_objectram[offs];
140		int attr = sf_objectram[offs+1];
141		int sy = sf_objectram[offs+2];
142		int sx = sf_objectram[offs+3];
	139	int c = state->objectram[offs];
	140	int attr = state->objectram[offs + 1];
	141	int sy = state->objectram[offs + 2];
	142	int sx = state->objectram[offs + 3];
143	143	int color = attr & 0x000f;
144	144	int flipx = attr & 0x0100;
145	145	int flipy = attr & 0x0200;
146	146
147	147	if (attr & 0x400)   /* large sprite */
148	148	{
149		int c1,c2,c3,c4,t;
	149	int c1, c2, c3, c4, t;
150	150
151	151	if (flip_screen_get(machine))
152	152	{
r6740	r6741
157	157	}
158	158
159	159	c1 = c;
160		c2 = c+1;
161		c3 = c+16;
162		c4 = c+17;
	160	c2 = c + 1;
	161	c3 = c + 16;
	162	c4 = c + 17;
163	163
164	164	if (flipx)
165	165	{
r6740	r6741
220	220
221	221	VIDEO_UPDATE( sf )
222	222	{
223		if (sf_active & 0x20)
224		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
	223	sf_state *state = (sf_state *)screen->machine->driver_data;
	224
	225	if (state->sf_active & 0x20)
	226	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
225	227	else
226		bitmap_fill(bitmap,cliprect,0);
	228	bitmap_fill(bitmap, cliprect, 0);
227	229
228		tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
	230	tilemap_draw(bitmap, cliprect, state->fg_tilemap, 0, 0);
229	231
230		if (sf_active & 0x80)
231		draw_sprites(screen->machine,bitmap,cliprect);
	232	if (state->sf_active & 0x80)
	233	draw_sprites(screen->machine, bitmap, cliprect);
232	234
233		tilemap_draw(bitmap,cliprect,tx_tilemap,0,0);
	235	tilemap_draw(bitmap, cliprect, state->tx_tilemap, 0, 0);
234	236	return 0;
235	237	}

src/mame/video/cave.c

r6740	r6741
45	45	**************************************************************************/
46	46
47	47	#include "driver.h"
48		#include "cave.h"
	48	#include "includes/cave.h"
49	49
50	50	/* Variables that driver has access to: */
51	51

src/mame/video/brkthru.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "brkthru.h"
	8	#include "includes/brkthru.h"
9	9
10	10
11	11	/***************************************************************************

src/mame/video/williams.c

r6740	r6741
93	93
94	94	#include "driver.h"
95	95	#include "video/resnet.h"
96		#include "williams.h"
	96	#include "includes/williams.h"
97	97
98	98
99	99

src/mame/video/fuukifg3.c

r6740	r6741
28	28	***************************************************************************/
29	29
30	30	#include "driver.h"
31		#include "fuukifg3.h"
	31	#include "includes/fuukifg3.h"
32	32
33	33
34	34	/***************************************************************************

src/mame/video/battlane.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "battlane.h"
	8	#include "includes/battlane.h"
9	9
10	10	/*
11	11	Video control register

src/mame/video/atarigt.c

r6740	r6741
21	21
22	22	#include "driver.h"
23	23	#include "machine/atarigen.h"
24		#include "atarigt.h"
	24	#include "includes/atarigt.h"
25	25
26	26
27	27	/*************************************
r6740	r6741
130	130
131	131	/* reset statics */
132	132	memset(state->colorram, 0, 0x80000);
	133
	134	/* save states */
	135	state_save_register_global(machine, state->playfield_tile_bank);
	136	state_save_register_global(machine, state->playfield_color_bank);
	137	state_save_register_global(machine, state->playfield_xscroll);
	138	state_save_register_global(machine, state->playfield_yscroll);
	139	state_save_register_global(machine, state->tram_checksum);
	140	state_save_register_global_array(machine, state->expanded_mram);
133	141	}
134	142
135	143

src/mame/video/genesis.c

r6740	r6741
10	10	#include "driver.h"
11	11	#include "sound/sn76496.h"
12	12
13		#include "genesis.h"
	13	#include "includes/genesis.h"
14	14
15	15
16	16	static const device_config *genesis_screen;

src/mame/video/cloud9.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "cloud9.h"
	8	#include "includes/cloud9.h"
9	9	#include "video/resnet.h"
10	10
11	11

src/mame/video/crimfght.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	static int layer_colorbase[3],sprite_colorbase;
r6740	r6741
10	10
11	11	***************************************************************************/
12	12
13		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	13	void crimfght_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
14	14	{
15	15	*flags = (*color & 0x20) ? TILE_FLIPX : 0;
16	16	*code |= ((*color & 0x1f) << 8) | (bank << 13);
r6740	r6741
23	23
24	24	***************************************************************************/
25	25
26		static void sprite_callback(int *code,int *color,int *priority,int *shadow)
	26	void crimfght_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
27	27	{
28	28	/* Weird priority scheme. Why use three bits when two would suffice? */
29	29	/* The PROM allows for mixed priorities, where sprites would have */
r6740	r6741
60	60	layer_colorbase[1] = 4;
61	61	layer_colorbase[2] = 8;
62	62	sprite_colorbase = 16;
63		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
64		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
65	63	}
66	64
67	65
r6740	r6741
74	72
75	73	VIDEO_UPDATE( crimfght )
76	74	{
77		K052109_tilemap_update();
	75	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	76	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
78	77
79		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],TILEMAP_DRAW_OPAQUE,0);
80		K051960_sprites_draw(screen->machine,bitmap,cliprect,2,2);
81		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,0);
82		K051960_sprites_draw(screen->machine,bitmap,cliprect,1,1);
83		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,0);
84		K051960_sprites_draw(screen->machine,bitmap,cliprect,0,0);
	78	k052109_tilemap_update(k052109);
	79
	80	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, TILEMAP_DRAW_OPAQUE, 0);
	81	k051960_sprites_draw(k051960, bitmap,cliprect,2,2);
	82	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 0);
	83	k051960_sprites_draw(k051960, bitmap,cliprect,1,1);
	84	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 0);
	85	k051960_sprites_draw(k051960, bitmap,cliprect,0,0);
85	86	return 0;
86	87	}

src/mame/video/triplhnt.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "triplhnt.h"
	8	#include "includes/triplhnt.h"
9	9
10	10
11	11	UINT8* triplhnt_playfield_ram;

src/mame/video/rollerg.c

r6740	r6741
1	1	#include "driver.h"
2		#include "video/konamiic.h"
	2	#include "video/konicdev.h"
3	3
4	4
5	5	static int bg_colorbase,sprite_colorbase,zoom_colorbase;
r6740	r6741
12	12
13	13	***************************************************************************/
14	14
15		static void sprite_callback(int *code,int *color,int *priority_mask)
	15	void rollerg_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask)
16	16	{
17	17	#if 0
18	18	if (input_code_pressed(machine, KEYCODE_Q) && (*color & 0x80)) *color = rand();
r6740	r6741
31	31
32	32	***************************************************************************/
33	33
34		static void zoom_callback(int *code,int *color,int *flags)
	34	void rollerg_zoom_callback(running_machine *machine, int *code,int *color,int *flags)
35	35	{
36	36	*flags = TILE_FLIPYX((*color & 0xc0) >> 6);
37	37	*code |= ((*color & 0x0f) << 8);
r6740	r6741
51	51	bg_colorbase = 16;
52	52	sprite_colorbase = 16;
53	53	zoom_colorbase = 0;
54
55		K053245_vh_start(machine,0,"gfx1",NORMAL_PLANE_ORDER,sprite_callback);
56		K051316_vh_start_0(machine,"gfx2",4,FALSE,0,zoom_callback);
57
58		K051316_set_offset(0, 22, 1);
59	54	}
60	55
61	56
r6740	r6741
68	63
69	64	VIDEO_UPDATE( rollerg )
70	65	{
71		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
72		bitmap_fill(bitmap,cliprect,16 * bg_colorbase);
73		K051316_zoom_draw_0(bitmap,cliprect,0,1);
74		K053245_sprites_draw(screen->machine,0,bitmap,cliprect);
	66	const device_config *k053244 = devtag_get_device(screen->machine, "k053244");
	67	const device_config *k051316 = devtag_get_device(screen->machine, "k051316");
	68
	69	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
	70	bitmap_fill(bitmap, cliprect, 16 * bg_colorbase);
	71	k051316_zoom_draw(k051316, bitmap, cliprect, 0, 1);
	72	k053245_sprites_draw(k053244, bitmap, cliprect);
75	73	return 0;
76	74	}

src/mame/video/sidepckt.c

r6740	r6741
1	1	#include "driver.h"
2	2
3	3
	4	UINT8 *sidepckt_videoram;
	5	UINT8 *sidepckt_colorram;
4	6	static tilemap *bg_tilemap;
5	7	static int flipscreen;
6	8
r6740	r6741
46	48
47	49	static TILE_GET_INFO( get_tile_info )
48	50	{
49		UINT8 attr = machine->generic.colorram.u8[tile_index];
	51	UINT8 attr = sidepckt_colorram[tile_index];
50	52	SET_TILE_INFO(
51	53	0,
52		machine->generic.videoram.u8[tile_index] + ((attr & 0x07) << 8),
	54	sidepckt_videoram[tile_index] + ((attr & 0x07) << 8),
53	55	((attr & 0x10) >> 3) | ((attr & 0x20) >> 5),
54	56	TILE_FLIPX);
55	57	tileinfo->group = (attr & 0x80) >> 7;
r6740	r6741
83	85
84	86	WRITE8_HANDLER( sidepckt_videoram_w )
85	87	{
86		space->machine->generic.videoram.u8[offset] = data;
	88	sidepckt_videoram[offset] = data;
87	89	tilemap_mark_tile_dirty(bg_tilemap,offset);
88	90	}
89	91
90	92	WRITE8_HANDLER( sidepckt_colorram_w )
91	93	{
92		space->machine->generic.colorram.u8[offset] = data;
	94	sidepckt_colorram[offset] = data;
93	95	tilemap_mark_tile_dirty(bg_tilemap,offset);
94	96	}
95	97

src/mame/video/exerion.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "video/resnet.h"
9		#include "exerion.h"
	9	#include "includes/exerion.h"
10	10
11	11
12	12	#define BACKGROUND_X_START      32

src/mame/video/crospang.c

r6740	r6741
10	10	*/
11	11
12	12	#include "driver.h"
13		#include "crospang.h"
	13	#include "includes/crospang.h"
14	14
15	15	WRITE16_HANDLER( bestri_tilebank_w)
16	16	{

src/mame/video/subs.c

r6740	r6741
5	5	***************************************************************************/
6	6
7	7	#include "driver.h"
8		#include "subs.h"
	8	#include "includes/subs.h"
9	9	#include "sound/discrete.h"
10	10
11	11	WRITE8_HANDLER( subs_invert1_w )

src/mame/video/ajax.c

r6740	r6741
7	7	***************************************************************************/
8	8
9	9	#include "driver.h"
10		#include "video/konamiic.h"
	10	#include "video/konicdev.h"
11	11	#include "includes/ajax.h"
12	12
13	13
r6740	r6741
21	21
22	22	***************************************************************************/
23	23
24		static void tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
	24	void ajax_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority)
25	25	{
26	26	*code |= ((*color & 0x0f) << 8) | (bank << 12);
27	27	*color = layer_colorbase[layer] + ((*color & 0xf0) >> 4);
r6740	r6741
34	34
35	35	***************************************************************************/
36	36
37		static void sprite_callback(int *code,int *color,int *priority,int *shadow)
	37	void ajax_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow)
38	38	{
39	39	/* priority bits:
40	40	4 over zoom (0 = have priority)
r6740	r6741
56	56
57	57	***************************************************************************/
58	58
59		static void zoom_callback(int *code,int *color,int *flags)
	59	void ajax_zoom_callback(running_machine *machine, int *code,int *color,int *flags)
60	60	{
61	61	*code |= ((*color & 0x07) << 8);
62	62	*color = zoom_colorbase + ((*color & 0x08) >> 3);
r6740	r6741
76	76	layer_colorbase[2] = 32;
77	77	sprite_colorbase = 16;
78	78	zoom_colorbase = 6;   /* == 48 since it's 7-bit graphics */
79		K052109_vh_start(machine,"gfx1",NORMAL_PLANE_ORDER,tile_callback);
80		K051960_vh_start(machine,"gfx2",NORMAL_PLANE_ORDER,sprite_callback);
81		K051316_vh_start_0(machine,"gfx3",7,FALSE,0,zoom_callback);
82		state_save_register_global(machine, ajax_priority);
	79	state_save_register_global(machine, ajax_priority);
83	80	}
84	81
85	82
r6740	r6741
92	89
93	90	VIDEO_UPDATE( ajax )
94	91	{
95		K052109_tilemap_update();
	92	const device_config *k051316 = devtag_get_device(screen->machine, "k051316");
	93	const device_config *k052109 = devtag_get_device(screen->machine, "k052109");
	94	const device_config *k051960 = devtag_get_device(screen->machine, "k051960");
96	95
	96	k052109_tilemap_update(k052109);
	97
97	98	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
98	99
99	100	bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
100		tilemap_draw(bitmap,cliprect,K052109_tilemap[2],0,1);
	101	k052109_tilemap_draw(k052109, bitmap, cliprect, 2, 0, 1);
101	102	if (ajax_priority)
102	103	{
103	104	/* basic layer order is B, zoom, A, F */
104		K051316_zoom_draw_0(bitmap,cliprect,0,4);
105		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,2);
	105	k051316_zoom_draw(k051316, bitmap, cliprect, 0, 4);
	106	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 2);
106	107	}
107	108	else
108	109	{
109	110	/* basic layer order is B, A, zoom, F */
110		tilemap_draw(bitmap,cliprect,K052109_tilemap[1],0,2);
111		K051316_zoom_draw_0(bitmap,cliprect,0,4);
	111	k052109_tilemap_draw(k052109, bitmap, cliprect, 1, 0, 2);
	112	k051316_zoom_draw(k051316, bitmap, cliprect, 0, 4);
112	113	}
113		tilemap_draw(bitmap,cliprect,K052109_tilemap[0],0,8);
	114	k052109_tilemap_draw(k052109, bitmap, cliprect, 0, 0, 8);
114	115
115		K051960_sprites_draw(screen->machine,bitmap,cliprect,-1,-1);
	116	k051960_sprites_draw(k051960, bitmap, cliprect, -1, -1);
116	117	return 0;
117	118	}

src/mame/video/funybubl.c

r6740	r6741
6	6
7	7
8	8	#include "driver.h"
9		#include "funybubl.h"
	9	#include "includes/funybubl.h"
10	10
11	11
12	12	WRITE8_HANDLER ( funybubl_paldatawrite )

src/mame/video/m10.c

r6740	r6741
11	11	***************************************************************************/
12	12
13	13	#include "driver.h"
14		#include "m10.h"
	14	#include "includes/m10.h"
15	15
16	16	static UINT32 extyoffs[32 * 8];   // FIXME: this should be moved to m10_state, but backlayout would have problems
17	17

src/mame/drivers/bfcobra.c

r6740	r6741
90	90	/*
91	91	Globals
92	92	*/
93		static UINT8 bank[4];
	93	static UINT8 bank_data[4];
94	94	static UINT8 *work_ram;
95	95	static UINT8 *video_ram;
96	96	static UINT8 h_scroll;
r6740	r6741
121	121	/*
122	122	Function prototypes
123	123	*/
124		INLINE void z80_bank(running_machine *machine, const char *bank, int data);
	124	INLINE void z80_bank(running_machine *machine, int num, int data);
125	125
126	126
127	127	static void update_irqs(running_machine *machine)
r6740	r6741
389	389	else if(addr < 0x20000)
390	390	{
391	391	addr &= 0xffff;
392		addr += (bank[0] & 1) ? 0x10000 : 0;
	392	addr += (bank_data[0] & 1) ? 0x10000 : 0;
393	393
394		return (UINT8*)(memory_region(machine, "user1") + addr + ((bank[0] >> 1) * 0x20000));
	394	return (UINT8*)(memory_region(machine, "user1") + addr + ((bank_data[0] >> 1) * 0x20000));
395	395	}
396	396	else if (addr >= 0x20000 && addr < 0x40000)
397	397	{
r6740	r6741
830	830	case 2:
831	831	case 3:
832	832	{
833		val = bank[offset];
	833	val = bank_data[offset];
834	834	break;
835	835	}
836	836	case 6:
r6740	r6741
882	882	case 0x02:
883	883	case 0x03:
884	884	{
885		static const char * const bankname[] = { "bank1", "bank2", "bank3" };
886	885	if (data > 0x3f)
887	886	popmessage("%x: Unusual bank access (%x)\n", cpu_get_previouspc(space->cpu), data);
888	887
889	888	data &= 0x3f;
890		bank[offset] = data;
891		z80_bank(space->machine, bankname[offset - 1], data);
	889	bank_data[offset] = data;
	890	z80_bank(space->machine, offset, data);
892	891	break;
893	892	}
894	893
r6740	r6741
963	962	}
964	963	}
965	964
966		INLINE void z80_bank(running_machine *machine, const char *bank, int data)
	965	INLINE void z80_bank(running_machine *machine, int num, int data)
967	966	{
	967	static const char * const bank_names[] = { "bank1", "bank2", "bank3" };
	968
968	969	if (data < 0x08)
969	970	{
970		/* TODO: Don't need this table! */
971		static const UINT32 offs_table[2][8] =
972		{
973		{ 0x10000, 0x14000, 0x18000, 0x1c000, 0x00000, 0x04000, 0x08000, 0x0c000 },
974		{ 0x00000, 0x04000, 0x08000, 0x0c000, 0x10000, 0x14000, 0x18000, 0x1c000 }
975		};
	971	UINT32 offset = ((bank_data[0] >> 1) * 0x20000) + ((0x4000 * data) ^ ((bank_data[0] & 1) ? 0 : 0x10000));
976	972
977		UINT32 offset = ((bank[0] >> 1) * 0x20000) + offs_table[bank[0] & 0x1][data];
978
979		memory_set_bankptr(machine, bank, memory_region(machine, "user1") + offset);
	973	memory_set_bankptr(machine, bank_names[num - 1], memory_region(machine, "user1") + offset);
980	974	}
981	975	else if (data < 0x10)
982	976	{
983		memory_set_bankptr(machine, bank, &video_ram[(data - 0x08) * 0x4000]);
	977	memory_set_bankptr(machine, bank_names[num - 1], &video_ram[(data - 0x08) * 0x4000]);
984	978	}
985	979	else
986	980	{
987		memory_set_bankptr(machine, bank, &work_ram[(data - 0x10) * 0x4000]);
	981	memory_set_bankptr(machine, bank_names[num - 1], &work_ram[(data - 0x10) * 0x4000]);
988	982	}
989	983	}
990	984
991	985	static WRITE8_HANDLER( rombank_w )
992	986	{
993		bank[0] = data;
994		z80_bank(space->machine, "bank1", bank[1]);
995		z80_bank(space->machine, "bank2", bank[2]);
996		z80_bank(space->machine, "bank3", bank[3]);
	987	bank_data[0] = data;
	988	z80_bank(space->machine, 1, bank_data[1]);
	989	z80_bank(space->machine, 2, bank_data[2]);
	990	z80_bank(space->machine, 3, bank_data[3]);
997	991	}
998	992
999	993
r6740	r6741
1293	1287	palette_set_color_rgb(machine, pal, pal3bit((pal>>5)&7), pal3bit((pal>>2)&7), pal2bit(pal&3));
1294	1288	}
1295	1289
1296		bank[0] = 1;
	1290	bank_data[0] = 1;
1297	1291	memset(&ramdac, 0, sizeof(ramdac));
1298	1292	reset_fdc();
1299	1293
r6740	r6741
1695	1689
1696	1690	init_ram(machine);
1697	1691
1698		bank[0] = 1;
1699		bank[1] = 0;
1700		bank[2] = 0;
1701		bank[3] = 0;
	1692	bank_data[0] = 1;
	1693	bank_data[1] = 0;
	1694	bank_data[2] = 0;
	1695	bank_data[3] = 0;
1702	1696
1703	1697	/* Fixed 16kB ROM region */
1704	1698	memory_set_bankptr(machine, "bank4", memory_region(machine, "user1"));
r6740	r6741
1717	1711	state_save_register_global(machine, flip_22);
1718	1712	state_save_register_global(machine, z80_int);
1719	1713	state_save_register_global(machine, z80_inten);
1720		state_save_register_global_array(machine, bank);
	1714	state_save_register_global_array(machine, bank_data);
1721	1715	state_save_register_global_pointer(machine, work_ram, 0xc0000);
1722	1716	state_save_register_global_pointer(machine, video_ram, 0x20000);
1723	1717	}

src/mame/drivers/mitchell.c

r6740	r6741
1		/***************************************************************************
	1	/*************************************************************************************
2	2
3		"Mitchell hardware". Actually used mostly by Capcom.
	3	"Mitchell hardware". Actually used mostly by Capcom.
4	4
5		All games run on the same hardware except mgakuen, which runs on an
6		earlier version, without RAM banking, not encrypted (standard Z80)
7		and without EEPROM.
	5	All games run on the same hardware except mgakuen, which runs on an
	6	earlier version, without RAM banking, not encrypted (standard Z80)
	7	and without EEPROM.
8	8
9		Other games that might run on this hardware:
10		"Chi-toitsu"(YUGA 1988)-Another version of"Mahjong Gakuen"
	9	Other games that might run on this hardware:
	10	"Chi-toitsu"(YUGA 1988)-Another version of"Mahjong Gakuen"
11	11
12		Notes:
13		- Super Pang has a protection which involves copying code stored in the
14		EEPROM to RAM and execute it from there. The first time the game is run,
15		you have to keep the player 1 start button pressed until the title screen
16		appears. This forces the game to initialize the EEPROM, otherwise it will
17		not work.
18		This is simulated with a kluge in input_r.
19		This doesn't work with spangj! The data written to EEPROM is wrong. This is
20		currently fixed by patching the ROM data so the EEPROM is right. It would be
21		better to just preload the correct EEPROM, without needing the input_r kludge.
	12	Notes:
	13	- Super Pang has a protection which involves copying code stored in the
	14	EEPROM to RAM and execute it from there. The first time the game is run,
	15	you have to keep the player 1 start button pressed until the title screen
	16	appears. This forces the game to initialize the EEPROM, otherwise it will
	17	not work.
	18	This is simulated with a kluge in input_r.
	19	This doesn't work with spangj! The data written to EEPROM is wrong. This is
	20	currently fixed by patching the ROM data so the EEPROM is right. It would be
	21	better to just preload the correct EEPROM, without needing the input_r kludge.
22	22
23		TODO:
24		- understand what bits 0 and 3 of input port 0x05 are
25		- ball speed is erratic in Block Block. It was not like this at one point.
26		This is probably related to interrupts and maybe to the above bits.
	23	TODO:
	24	- understand what bits 0 and 3 of input port 0x05 are
	25	- ball speed is erratic in Block Block. It was not like this at one point.
	26	This is probably related to interrupts and maybe to the above bits.
27	27
28		***************************************************************************/
29	28
30		/*****************************************************************************
	29	******************************************************************************
31	30	Monsters World (c)1994 TCH
32	31
33	32	Monsters World is basically a bootleg of Mitchell's Super Pang
r6740	r6741
73	72	mw-8.rom = ST M27C1001 \
74	73	mw-9.rom = ST M27C1001 / GFX
75	74
76		******************************************************************************/
	75	*************************************************************************************/
77	76
78	77
79	78	#include "driver.h"
80	79	#include "cpu/z80/z80.h"
81	80	#include "deprecat.h"
82	81	#include "machine/eeprom.h"
83		#include "includes/cps1.h"
	82	#include "includes/cps1.h"   // needed for decoding functions only
	83	#include "includes/mitchell.h"
84	84	#include "sound/okim6295.h"
85	85	#include "sound/3812intf.h"
86	86	#include "sound/2413intf.h"
87	87	#include "sound/msm5205.h"
88	88
89	89
90		VIDEO_START( pang );
91		VIDEO_UPDATE( pang );
	90	/*************************************
	91	*
	92	*  EEPROM
	93	*
	94	*************************************/
92	95
93		WRITE8_HANDLER( mgakuen_paletteram_w );
94		READ8_HANDLER( mgakuen_paletteram_r );
95		WRITE8_HANDLER( mgakuen_videoram_w );
96		READ8_HANDLER( mgakuen_videoram_r );
97		WRITE8_HANDLER( mgakuen_objram_w );
98		READ8_HANDLER( mgakuen_objram_r );
99
100		WRITE8_HANDLER( pang_video_bank_w );
101		WRITE8_HANDLER( pang_videoram_w );
102		READ8_HANDLER( pang_videoram_r );
103		WRITE8_HANDLER( pang_colorram_w );
104		READ8_HANDLER( pang_colorram_r );
105		WRITE8_HANDLER( pang_gfxctrl_w );
106		WRITE8_HANDLER( pang_paletteram_w );
107		READ8_HANDLER( pang_paletteram_r );
108
109		extern UINT8 *pang_videoram;
110		extern UINT8 *pang_colorram;
111
112		extern size_t pang_videoram_size;
113		static UINT8 pang_port5_kludge = 0;
114
115
116
117		static WRITE8_HANDLER( pang_bankswitch_w )
118		{
119		memory_set_bank(space->machine, "bank1", data & 0x0f);
120		}
121
122
123
124		/***************************************************************************
125
126		EEPROM
127
128		***************************************************************************/
129
130	96	static const eeprom_interface eeprom_intf =
131	97	{
132	98	6,      /* address bits */
r6740	r6741
166	132
167	133	static READ8_HANDLER( pang_port5_r )
168	134	{
	135	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
169	136	int bit;
170	137
171	138	bit = eeprom_read_bit() << 7;
r6740	r6741
175	142	/* bit 3 is checked before updating the palette so it really seems to be vblank. */
176	143	/* Many games require two interrupts per frame and for these bits to toggle, */
177	144	/* otherwise music doesn't work. */
178		if (cpu_getiloops(space->cpu) & 1) bit |= 0x01;
179		else bit |= 0x08;
	145	if (cpu_getiloops(space->cpu) & 1)
	146	bit |= 0x01;
	147	else
	148	bit |= 0x08;
180	149
181		if (pang_port5_kludge)   /* hack... music doesn't work otherwise */
182		bit ^= 0x08;
	150	if (state->port5_kludge)   /* hack... music doesn't work otherwise */
	151	bit ^= 0x08;
183	152
184	153	return (input_port_read(space->machine, "DSW0") & 0x76) | bit;
185	154	}
r6740	r6741
200	169	}
201	170
202	171
	172	/*************************************
	173	*
	174	*  Bankswitch handling
	175	*
	176	*************************************/
203	177
204		/***************************************************************************
	178	static WRITE8_HANDLER( pang_bankswitch_w )
	179	{
	180	memory_set_bank(space->machine, "bank1", data & 0x0f);
	181	}
205	182
206		Input handling
	183	/*************************************
	184	*
	185	*  Input handling
	186	*
	187	*************************************/
207	188
208		***************************************************************************/
209
210		static int dial[2],dial_selected;
211
212	189	static READ8_HANDLER( block_input_r )
213	190	{
214		static int dir[2];
	191	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
215	192	static const char *const dialnames[] = { "DIAL1", "DIAL2" };
216	193	static const char *const portnames[] = { "IN1", "IN2" };
217	194
218		if (dial_selected)
	195	if (state->dial_selected)
219	196	{
220		int delta;
	197	int delta = (input_port_read(space->machine, dialnames[offset]) - state->dial[offset]) & 0xff;
221	198
222		delta = (input_port_read(space->machine, dialnames[offset]) - dial[offset]) & 0xff;
223	199	if (delta & 0x80)
224	200	{
225	201	delta = (-delta) & 0xff;
226		if (dir[offset])
	202	if (state->dir[offset])
227	203	{
228	204	/* don't report movement on a direction change, otherwise it will stutter */
229		dir[offset] = 0;
	205	state->dir[offset] = 0;
230	206	delta = 0;
231	207	}
232	208	}
233	209	else if (delta > 0)
234	210	{
235		if (dir[offset] == 0)
	211	if (!state->dir[offset])
236	212	{
237	213	/* don't report movement on a direction change, otherwise it will stutter */
238		dir[offset] = 1;
	214	state->dir[offset] = 1;
239	215	delta = 0;
240	216	}
241	217	}
242		if (delta > 0x3f) delta = 0x3f;
	218	if (delta > 0x3f)
	219	delta = 0x3f;
	220
243	221	return delta << 2;
244	222	}
245	223	else
246	224	{
247		int res;
	225	int res = input_port_read(space->machine, portnames[offset]) & 0xf7;
248	226
249		res = input_port_read(space->machine, portnames[offset]) & 0xf7;
250		if (dir[offset]) res |= 0x08;
	227	if (state->dir[offset])
	228	res |= 0x08;
251	229
252	230	return res;
253	231	}
r6740	r6741
255	233
256	234	static WRITE8_HANDLER( block_dial_control_w )
257	235	{
	236	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	237
258	238	if (data == 0x08)
259	239	{
260	240	/* reset the dial counters */
261		dial[0] = input_port_read(space->machine, "DIAL1");
262		dial[1] = input_port_read(space->machine, "DIAL2");
	241	state->dial[0] = input_port_read(space->machine, "DIAL1");
	242	state->dial[1] = input_port_read(space->machine, "DIAL2");
263	243	}
264	244	else if (data == 0x80)
265		dial_selected = 0;
	245	state->dial_selected = 0;
266	246	else
267		dial_selected = 1;
	247	state->dial_selected = 1;
268	248	}
269	249
270	250
271		static int keymatrix;
272
273	251	static READ8_HANDLER( mahjong_input_r )
274	252	{
	253	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
275	254	int i;
276	255	static const char *const keynames[2][5] =
277	256	{
r6740	r6741
280	259	};
281	260
282	261	for (i = 0; i < 5; i++)
283		if (keymatrix & (0x80 >> i)) return input_port_read(space->machine, keynames[offset][i]);
	262	{
	263	if (state->keymatrix & (0x80 >> i))
	264	return input_port_read(space->machine, keynames[offset][i]);
	265	}
284	266
285	267	return 0xff;
286	268	}
287	269
288	270	static WRITE8_HANDLER( mahjong_input_select_w )
289	271	{
290		keymatrix = data;
	272	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	273	state->keymatrix = data;
291	274	}
292	275
293	276
294		static int input_type;
295
296	277	static READ8_HANDLER( input_r )
297	278	{
	279	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
298	280	static const char *const portnames[] = { "IN0", "IN1", "IN2" };
299	281
300		switch (input_type)
	282	switch (state->input_type)
301	283	{
302	284	case 0:
303	285	default:
304	286	return input_port_read(space->machine, portnames[offset]);
305	287	case 1:      /* Mahjong games */
306		if (offset) return mahjong_input_r(space, offset-1);
307		else return input_port_read(space->machine, "IN0");
	288	if (offset)
	289	return mahjong_input_r(space, offset - 1);
	290	else
	291	return input_port_read(space->machine, "IN0");
308	292	break;
309	293	case 2:      /* Block Block - dial control */
310		if (offset) return block_input_r(space, offset-1);
311		else return input_port_read(space->machine, "IN0");
	294	if (offset)
	295	return block_input_r(space, offset - 1);
	296	else
	297	return input_port_read(space->machine, "IN0");
312	298	break;
313	299	case 3:      /* Super Pang - simulate START 1 press to initialize EEPROM */
314		if (offset || init_eeprom_count == 0) return input_port_read(space->machine, portnames[offset]);
	300	if (offset || init_eeprom_count == 0)
	301	return input_port_read(space->machine, portnames[offset]);
315	302	else
316	303	{
317	304	init_eeprom_count--;
r6740	r6741
324	311
325	312	static WRITE8_HANDLER( input_w )
326	313	{
327		switch (input_type)
	314	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	315
	316	switch (state->input_type)
328	317	{
329	318	case 0:
330	319	default:
331		logerror("PC %04x: write %02x to port 01\n",cpu_get_pc(space->cpu),data);
	320	logerror("PC %04x: write %02x to port 01\n", cpu_get_pc(space->cpu), data);
332	321	break;
333	322	case 1:
334		mahjong_input_select_w(space,offset,data);
	323	mahjong_input_select_w(space, offset, data);
335	324	break;
336	325	case 2:
337		block_dial_control_w(space,offset,data);
	326	block_dial_control_w(space, offset, data);
338	327	break;
339	328	}
340	329	}
341	330
342	331
	332	/*************************************
	333	*
	334	*  Address maps
	335	*
	336	*************************************/
343	337
344		/***************************************************************************
345
346		Memory handlers
347
348		***************************************************************************/
349
350	338	static ADDRESS_MAP_START( mgakuen_map, ADDRESS_SPACE_PROGRAM, 8 )
351	339	AM_RANGE(0x0000, 0x7fff) AM_ROM
352	340	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
353		AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(mgakuen_paletteram_r,mgakuen_paletteram_w)   /* palette RAM */
354		AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r,pang_colorram_w) AM_BASE(&pang_colorram) /* Attribute RAM */
355		AM_RANGE(0xd000, 0xdfff) AM_READWRITE(mgakuen_videoram_r,mgakuen_videoram_w) AM_BASE(&pang_videoram) AM_SIZE(&pang_videoram_size) /* char RAM */
	341	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(mgakuen_paletteram_r, mgakuen_paletteram_w)   /* palette RAM */
	342	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r, pang_colorram_w) AM_BASE_MEMBER(mitchell_state, colorram) /* Attribute RAM */
	343	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(mgakuen_videoram_r, mgakuen_videoram_w) AM_BASE_SIZE_MEMBER(mitchell_state, videoram, videoram_size) /* char RAM */
356	344	AM_RANGE(0xe000, 0xefff) AM_RAM   /* Work RAM */
357		AM_RANGE(0xf000, 0xffff) AM_READWRITE(mgakuen_objram_r,mgakuen_objram_w)   /* OBJ RAM */
	345	AM_RANGE(0xf000, 0xffff) AM_READWRITE(mgakuen_objram_r, mgakuen_objram_w)   /* OBJ RAM */
358	346	ADDRESS_MAP_END
359	347
360	348	static ADDRESS_MAP_START( mitchell_map, ADDRESS_SPACE_PROGRAM, 8 )
361	349	AM_RANGE(0x0000, 0x7fff) AM_ROM
362	350	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
363	351	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(pang_paletteram_r,pang_paletteram_w) /* Banked palette RAM */
364		AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r,pang_colorram_w) AM_BASE(&pang_colorram) /* Attribute RAM */
365		AM_RANGE(0xd000, 0xdfff) AM_READWRITE(pang_videoram_r,pang_videoram_w) AM_BASE(&pang_videoram) AM_SIZE(&pang_videoram_size)/* Banked char / OBJ RAM */
	352	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r,pang_colorram_w) AM_BASE_MEMBER(mitchell_state, colorram) /* Attribute RAM */
	353	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(pang_videoram_r,pang_videoram_w) AM_BASE_SIZE_MEMBER(mitchell_state, videoram, videoram_size)/* Banked char / OBJ RAM */
366	354	AM_RANGE(0xe000, 0xffff) AM_RAM   /* Work RAM */
367	355	ADDRESS_MAP_END
368	356
r6740	r6741
384	372	ADDRESS_MAP_END
385	373
386	374	/* spangbl */
387
388	375	static ADDRESS_MAP_START( spangbl_map, ADDRESS_SPACE_PROGRAM, 8 )
389	376	AM_RANGE(0x0000, 0x7fff) AM_ROM
390	377	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1") AM_WRITENOP
391	378	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(pang_paletteram_r, pang_paletteram_w)   /* Banked palette RAM */
392		AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r, pang_colorram_w)   AM_BASE(&pang_colorram)/* Attribute RAM */
393		AM_RANGE(0xd000, 0xdfff) AM_READWRITE(pang_videoram_r, pang_videoram_w)   AM_BASE(&pang_videoram) AM_SIZE(&pang_videoram_size) /* Banked char / OBJ RAM */
	379	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r, pang_colorram_w)   AM_BASE_MEMBER(mitchell_state, colorram)/* Attribute RAM */
	380	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(pang_videoram_r, pang_videoram_w)   AM_BASE_SIZE_MEMBER(mitchell_state, videoram, videoram_size) /* Banked char / OBJ RAM */
394	381	AM_RANGE(0xe000, 0xffff) AM_RAM      /* Work RAM */
395	382	ADDRESS_MAP_END
396	383
r6740	r6741
410	397	ADDRESS_MAP_END
411	398
412	399
413		static int sample_buffer = 0;
414		static int sample_select = 0;
415
416	400	#ifdef UNUSED_FUNCTION
417	401	static WRITE8_HANDLER( spangbl_msm5205_data_w )
418	402	{
419		sample_buffer = data;
	403	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
	404	state->sample_buffer = data;
420	405	}
421	406	#endif
422	407
r6740	r6741
430	415	ADDRESS_MAP_GLOBAL_MASK(0xff)
431	416	ADDRESS_MAP_END
432	417
	418
433	419	/**** Monsters World ****/
434
435	420	static WRITE8_DEVICE_HANDLER( oki_banking_w )
436	421	{
437	422	okim6295_set_bank_base(device, 0x40000 * (data & 3));
r6740	r6741
447	432
448	433	static WRITE8_HANDLER(mstworld_sound_w)
449	434	{
	435	mitchell_state *state = (mitchell_state *)space->machine->driver_data;
450	436	soundlatch_w(space, 0, data);
451		cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
	437	cpu_set_input_line(state->audiocpu, 0, HOLD_LINE);
452	438	}
453	439
454		extern WRITE8_HANDLER( mstworld_gfxctrl_w );
455		extern WRITE8_HANDLER( mstworld_video_bank_w );
456
457	440	static ADDRESS_MAP_START( mstworld_io_map, ADDRESS_SPACE_IO, 8 )
458	441	ADDRESS_MAP_GLOBAL_MASK(0xff)
459	442	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(mstworld_gfxctrl_w)   /* Palette bank, layer enable, coin counters, more */
r6740	r6741
467	450	AM_RANGE(0x07, 0x07) AM_WRITE(mstworld_video_bank_w)   /* Video RAM bank register */
468	451	ADDRESS_MAP_END
469	452
470		/**** End Monsters World ****/
471	453
	454	/*************************************
	455	*
	456	*  Input ports
	457	*
	458	*************************************/
472	459
473	460	static INPUT_PORTS_START( mj_common )
474		PORT_START("DSW0")   /* DSW */
	461	PORT_START("DSW0")
475	462	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* USED - handled in port5_r */
476	463	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
477	464	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
r6740	r6741
479	466	PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
480	467	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* data from EEPROM */
481	468
482		PORT_START("IN0")   /* IN0 */
	469	PORT_START("IN0")
483	470	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
484	471	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
485	472	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
489	476	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
490	477	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
491	478
492		PORT_START("KEY0")   /* IN1 */
	479	PORT_START("KEY0")
493	480	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
494	481	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
495	482	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
r6740	r6741
499	486	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MAHJONG_E )
500	487	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_MAHJONG_A )
501	488
502		PORT_START("KEY1")   /* IN1 */
	489	PORT_START("KEY1")
503	490	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
504	491	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
505	492	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
509	496	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MAHJONG_F )
510	497	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_MAHJONG_B )
511	498
512		PORT_START("KEY2")   /* IN1 */
	499	PORT_START("KEY2")
513	500	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
514	501	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
515	502	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
519	506	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MAHJONG_G )
520	507	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_MAHJONG_C )
521	508
522		PORT_START("KEY3")   /* IN1 */
	509	PORT_START("KEY3")
523	510	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
524	511	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
525	512	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
529	516	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MAHJONG_H )
530	517	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_MAHJONG_D )
531	518
532		PORT_START("KEY4")   /* IN1 */
	519	PORT_START("KEY4")
533	520	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
534	521	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
535	522	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
539	526	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
540	527	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
541	528
542		PORT_START("KEY5")   /* IN2 */
	529	PORT_START("KEY5")
543	530	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
544	531	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
545	532	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
r6740	r6741
549	536	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(2)
550	537	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2)
551	538
552		PORT_START("KEY6")   /* IN2 */
	539	PORT_START("KEY6")
553	540	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
554	541	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
555	542	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
559	546	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(2)
560	547	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2)
561	548
562		PORT_START("KEY7")   /* IN2 */
	549	PORT_START("KEY7")
563	550	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
564	551	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
565	552	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
569	556	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(2)
570	557	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2)
571	558
572		PORT_START("KEY8")   /* IN2 */
	559	PORT_START("KEY8")
573	560	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
574	561	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
575	562	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
579	566	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(2)
580	567	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2)
581	568
582		PORT_START("KEY9")   /* IN2 */
	569	PORT_START("KEY9")
583	570	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
584	571	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
585	572	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
593	580	static INPUT_PORTS_START( mgakuen )
594	581	PORT_INCLUDE( mj_common )
595	582
596		PORT_START("DSW1")   /* DSW1 */
	583	PORT_START("DSW1")
597	584	PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) )
598	585	PORT_DIPSETTING(    0x00, DEF_STR( 4C_1C ) )
599	586	PORT_DIPSETTING(    0x01, DEF_STR( 3C_1C ) )
r6740	r6741
617	604	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
618	605	PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
619	606
620		PORT_START("DSW2")      /* DSW2 */
	607	PORT_START("DSW2")
621	608	PORT_DIPNAME( 0x03, 0x03, "Player 1 Skill" )
622	609	PORT_DIPSETTING(    0x03, "Weak" )
623	610	PORT_DIPSETTING(    0x02, DEF_STR( Normal ) )
r6740	r6741
653	640	/* same unknown ports as the mahjong games, so we include the following */
654	641	PORT_INCLUDE( marukin )
655	642
656		PORT_MODIFY("IN0")      /* IN0 */
	643	PORT_MODIFY("IN0")
657	644	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE )   /* same as the service mode farther down */
658	645
659		PORT_MODIFY("KEY0")      /* IN1 */
	646	PORT_MODIFY("KEY0")
660	647	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
661	648	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
662	649	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
664	651	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 E") PORT_CODE(KEYCODE_E)
665	652	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 A") PORT_CODE(KEYCODE_A)
666	653
667		PORT_MODIFY("KEY1")      /* IN1 */
	654	PORT_MODIFY("KEY1")
668	655	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
669	656	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
670	657	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 Cancel") PORT_CODE(KEYCODE_LALT)
671	658	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
672	659	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 B") PORT_CODE(KEYCODE_B)
673	660
674		PORT_MODIFY("KEY2")      /* IN1 */
	661	PORT_MODIFY("KEY2")
675	662	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
676	663	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
677	664	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 Flip") PORT_CODE(KEYCODE_SPACE)
678	665	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
679	666	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 C") PORT_CODE(KEYCODE_C)
680	667
681		PORT_MODIFY("KEY3")      /* IN1 */
	668	PORT_MODIFY("KEY3")
682	669	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
683	670	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
684	671	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
685	672	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 D") PORT_CODE(KEYCODE_D)
686	673
687		PORT_MODIFY("KEY4")      /* IN1 */
	674	PORT_MODIFY("KEY4")
688	675	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
689	676
690		PORT_MODIFY("KEY5")      /* IN2 */
	677	PORT_MODIFY("KEY5")
691	678	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
692	679	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
693	680	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
695	682	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 E") PORT_CODE(KEYCODE_E)
696	683	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 A") PORT_CODE(KEYCODE_A)
697	684
698		PORT_MODIFY("KEY6")      /* IN2 */
	685	PORT_MODIFY("KEY6")
699	686	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
700	687	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
701	688	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 Cancel") PORT_CODE(KEYCODE_LALT)
702	689	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
703	690	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 B") PORT_CODE(KEYCODE_B)
704	691
705		PORT_MODIFY("KEY7")      /* IN2 */
	692	PORT_MODIFY("KEY7")
706	693	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
707	694	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
708	695	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 Flip") PORT_CODE(KEYCODE_SPACE)
709	696	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
710	697	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 C") PORT_CODE(KEYCODE_C)
711	698
712		PORT_MODIFY("KEY8")      /* IN2 */
	699	PORT_MODIFY("KEY8")
713	700	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
714	701	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
715	702	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
716	703	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 D") PORT_CODE(KEYCODE_D)
717	704
718		PORT_MODIFY("KEY9")      /* IN2 */
	705	PORT_MODIFY("KEY9")
719	706	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
720	707	INPUT_PORTS_END
721	708
722	709	static INPUT_PORTS_START( pang )
723		PORT_START("DSW0")      /* DSW */
	710	PORT_START("DSW0")
724	711	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* USED - handled in port5_r */
725	712	PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW )
726	713	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
r6740	r6741
728	715	PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
729	716	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* data from EEPROM */
730	717
731		PORT_START("IN0")      /* IN0 */
	718	PORT_START("IN0")
732	719	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
733	720	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
734	721	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )    /* probably unused */
r6740	r6741
738	725	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
739	726	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
740	727
741		PORT_START("IN1")      /* IN1 */
	728	PORT_START("IN1")
742	729	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
743	730	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
744	731	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 )
r6740	r6741
748	735	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
749	736	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
750	737
751		PORT_START("IN2")      /* IN2 */
	738	PORT_START("IN2")
752	739	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
753	740	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
754	741	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
r6740	r6741
768	755
769	756	static INPUT_PORTS_START( mstworld )
770	757	/* this port may not have the same role */
771		PORT_START("DSW0")      /* DSW */
	758	PORT_START("DSW0")
772	759	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* USED - handled in port5_r */
773	760	PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW )
774	761	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
r6740	r6741
776	763	PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
777	764	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* data from EEPROM (spang) */
778	765
779		PORT_START("IN0")      /* IN0 */
	766	PORT_START("IN0")
780	767	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
781	768	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
782	769	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )    /* probably unused */
r6740	r6741
786	773	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
787	774	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
788	775
789		PORT_START("IN1")      /* IN1 */
	776	PORT_START("IN1")
790	777	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) // don't think this one matters..
791	778	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 )
792	779	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 )
r6740	r6741
796	783	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
797	784	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
798	785
799		PORT_START("IN2")      /* IN2 */
	786	PORT_START("IN2")
800	787	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // if not active high gfx aren't copied for game screen?! .. is this instead of a bit in port 5?
801	788	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
802	789	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
r6740	r6741
884	871	INPUT_PORTS_END
885	872
886	873	static INPUT_PORTS_START( qtono1 )
887		PORT_START("DSW0")      /* DSW */
	874	PORT_START("DSW0")
888	875	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* USED - handled in port5_r */
889	876	PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW )
890	877	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
r6740	r6741
892	879	PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
893	880	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* data from EEPROM */
894	881
895		PORT_START("IN0")      /* IN0 */
	882	PORT_START("IN0")
896	883	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE )   /* same as the service mode farther down */
897	884	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
898	885	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
902	889	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
903	890	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
904	891
905		PORT_START("IN1")      /* IN1 */
	892	PORT_START("IN1")
906	893	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
907	894	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
908	895	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
r6740	r6741
912	899	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )
913	900	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
914	901
915		PORT_START("IN2")      /* IN2 */
	902	PORT_START("IN2")
916	903	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
917	904	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
918	905	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
r6740	r6741
924	911	INPUT_PORTS_END
925	912
926	913	static INPUT_PORTS_START( block )
927		PORT_START("DSW0")      /* DSW */
	914	PORT_START("DSW0")
928	915	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* USED - handled in port5_r */
929	916	PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW )
930	917	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
r6740	r6741
932	919	PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
933	920	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* data from EEPROM */
934	921
935		PORT_START("IN0")      /* IN0 */
	922	PORT_START("IN0")
936	923	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
937	924	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
938	925	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )    /* probably unused */
r6740	r6741
942	929	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
943	930	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
944	931
945		PORT_START("IN1")      /* IN1 */
	932	PORT_START("IN1")
946	933	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
947	934	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
948	935	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
950	937	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
951	938	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
952	939
953		PORT_START("IN2")      /* IN2 */
	940	PORT_START("IN2")
954	941	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
955	942	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
956	943	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
958	945	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
959	946	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
960	947
961		PORT_START("DIAL1")      /* DIAL1 */
	948	PORT_START("DIAL1")
962	949	PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(20)
963	950
964		PORT_START("DIAL2")      /* DIAL2 */
	951	PORT_START("DIAL2")
965	952	PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(20) PORT_PLAYER(2)
966	953	INPUT_PORTS_END
967	954
968	955	static INPUT_PORTS_START( blockjoy )
969		PORT_START("DSW0")      /* DSW */
	956	PORT_START("DSW0")
970	957	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* USED - handled in port5_r */
971	958	PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW )
972	959	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
r6740	r6741
974	961	PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
975	962	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* data from EEPROM */
976	963
977		PORT_START("IN0")      /* IN0 */
	964	PORT_START("IN0")
978	965	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
979	966	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
980	967	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )    /* probably unused */
r6740	r6741
984	971	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
985	972	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
986	973
987		PORT_START("IN1")      /* IN1 */
	974	PORT_START("IN1")
988	975	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
989	976	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
990	977	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
994	981	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
995	982	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
996	983
997		PORT_START("IN2")      /* IN2 */
	984	PORT_START("IN2")
998	985	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
999	986	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
1000	987	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
1007	994
1008	995
1009	996
	997	/*************************************
	998	*
	999	*  Graphics definitions
	1000	*
	1001	*************************************/
	1002
1010	1003	static const gfx_layout charlayout =
1011	1004	{
1012	1005	8,8,   /* 8*8 characters */
r6740	r6741
1088	1081	GFXDECODE_ENTRY( "gfx2", 0, mstworld_spritelayout, 0x000, 0x40 )
1089	1082	GFXDECODE_END
1090	1083
	1084
	1085	/*************************************
	1086	*
	1087	*  Machine driver
	1088	*
	1089	*************************************/
	1090
	1091	static MACHINE_START( mitchell )
	1092	{
	1093	mitchell_state *state = (mitchell_state *)machine->driver_data;
	1094
	1095	state->audiocpu = devtag_get_device(machine, "audiocpu");
	1096	state->oki = devtag_get_device(machine, "oki");
	1097
	1098	state_save_register_global(machine, state->sample_buffer);
	1099	state_save_register_global(machine, state->sample_select);
	1100	state_save_register_global(machine, state->dial_selected);
	1101	state_save_register_global(machine, state->keymatrix);
	1102	state_save_register_global_array(machine, state->dir);
	1103	state_save_register_global_array(machine, state->dial);
	1104	//  state_save_register_global(machine, init_eeprom_count);
	1105	}
	1106
	1107	static MACHINE_RESET( mitchell )
	1108	{
	1109	mitchell_state *state = (mitchell_state *)machine->driver_data;
	1110
	1111	state->sample_buffer = 0;
	1112	state->sample_select = 0;
	1113	state->dial_selected = 0;
	1114	state->dial[0] = 0;
	1115	state->dial[1] = 0;
	1116	state->dir[0] = 0;
	1117	state->dir[1] = 0;
	1118	state->keymatrix = 0;
	1119	}
	1120
1091	1121	static MACHINE_DRIVER_START( mgakuen )
1092	1122
	1123	/* driver data */
	1124	MDRV_DRIVER_DATA(mitchell_state)
	1125
1093	1126	/* basic machine hardware */
1094	1127	MDRV_CPU_ADD("maincpu", Z80, 6000000)   /* ??? */
1095	1128	MDRV_CPU_PROGRAM_MAP(mgakuen_map)
1096	1129	MDRV_CPU_IO_MAP(mitchell_io_map)
1097	1130	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)   /* ??? one extra irq seems to be needed for music (see input5_r) */
1098	1131
	1132	MDRV_MACHINE_START(mitchell)
	1133	MDRV_MACHINE_RESET(mitchell)
	1134
1099	1135	/* video hardware */
1100	1136	MDRV_SCREEN_ADD("screen", RASTER)
1101	1137	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
1124	1160
1125	1161	static MACHINE_DRIVER_START( pang )
1126	1162
	1163	/* driver data */
	1164	MDRV_DRIVER_DATA(mitchell_state)
	1165
1127	1166	/* basic machine hardware */
1128	1167	MDRV_CPU_ADD("maincpu",Z80, XTAL_16MHz/2) /* verified on pcb */
1129	1168	MDRV_CPU_PROGRAM_MAP(mitchell_map)
1130	1169	MDRV_CPU_IO_MAP(mitchell_io_map)
1131	1170	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)   /* ??? one extra irq seems to be needed for music (see input5_r) */
1132	1171
	1172	MDRV_MACHINE_START(mitchell)
	1173	MDRV_MACHINE_RESET(mitchell)
	1174
1133	1175	MDRV_NVRAM_HANDLER(mitchell)
1134	1176
1135	1177	/* video hardware */
r6740	r6741
1176	1218
1177	1219
1178	1220
1179		static void spangbl_adpcm_int(const device_config *device)
	1221	static void spangbl_adpcm_int( const device_config *device )
1180	1222	{
1181		msm5205_data_w(device, sample_buffer & 0x0F);
1182		sample_buffer >>= 4;
1183		sample_select ^= 1;
1184		if(sample_select == 0)
1185		cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
	1223	mitchell_state *state = (mitchell_state *)device->machine->driver_data;
	1224	msm5205_data_w(device, state->sample_buffer & 0x0f);
	1225	state->sample_buffer >>= 4;
	1226	state->sample_select ^= 1;
	1227	if(state->sample_select == 0)
	1228	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE);
1186	1229	}
1187	1230
1188	1231
r6740	r6741
1201	1244	MDRV_CPU_IO_MAP(spangbl_io_map)
1202	1245	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1203	1246
1204		MDRV_CPU_ADD("soundcpu",Z80, 8000000)
	1247	MDRV_CPU_ADD("audiocpu", Z80, 8000000)
1205	1248	MDRV_CPU_PROGRAM_MAP(spangbl_sound_map)
1206	1249	MDRV_CPU_IO_MAP(spangbl_sound_io_map)
1207	1250	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
r6740	r6741
1209	1252
1210	1253	MDRV_GFXDECODE(spangbl)
1211	1254
1212
1213	1255	MDRV_SOUND_REPLACE("oki", MSM5205, 384000)
1214	1256	MDRV_SOUND_CONFIG(msm5205_config)
1215	1257	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
r6740	r6741
1217	1259
1218	1260	static MACHINE_DRIVER_START( mstworld )
1219	1261
	1262	/* driver data */
	1263	MDRV_DRIVER_DATA(mitchell_state)
	1264
1220	1265	/* basic machine hardware */
1221	1266	/* it doesn't glitch with the clock speed set to 4x normal, however this is incorrect..
1222	1267	the interrupt handling (and probably various irq flags / vbl flags handling etc.) is
r6740	r6741
1229	1274	MDRV_CPU_ADD("audiocpu", Z80,6000000)       /* 6 MHz? */
1230	1275	MDRV_CPU_PROGRAM_MAP(mstworld_sound_map)
1231	1276
	1277	MDRV_MACHINE_START(mitchell)
	1278	MDRV_MACHINE_RESET(mitchell)
	1279
1232	1280	/* video hardware */
1233	1281	MDRV_SCREEN_ADD("screen", RASTER)
1234	1282	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
1254	1302
1255	1303	static MACHINE_DRIVER_START( marukin )
1256	1304
	1305	/* driver data */
	1306	MDRV_DRIVER_DATA(mitchell_state)
	1307
1257	1308	/* basic machine hardware */
1258	1309	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* Super Pang says 8MHZ ORIGINAL BOARD */
1259	1310	MDRV_CPU_PROGRAM_MAP(mitchell_map)
r6740	r6741
1288	1339	MACHINE_DRIVER_END
1289	1340
1290	1341
	1342	/*************************************
	1343	*
	1344	*  ROM definition(s)
	1345	*
	1346	*************************************/
1291	1347
1292	1348	ROM_START( mgakuen )
1293	1349	ROM_REGION( 0x50000, "maincpu", 0 )
r6740	r6741
1522	1578	ROM_CONTINUE(        0x74000, 0x04000 )
1523	1579	ROM_CONTINUE(        0x24000, 0x04000 )
1524	1580
1525		ROM_REGION( 0x20000, "soundcpu", 0 ) /* Sound Z80 + M5205(?) samples */
	1581	ROM_REGION( 0x20000, "audiocpu", 0 ) /* Sound Z80 + M5205(?) samples */
1526	1582	ROM_LOAD( "pang.4",   0x00000, 0x10000, CRC(88a7b1f8) SHA1(b34fa26dbc613bf3b525d19df90fa3ba4efb6e5d) ) // this is the same as the microhard game 'rebus' ...
1527	1583
1528	1584	ROM_REGION( 0x100000, "gfx1", ROMREGION_INVERT | ROMREGION_ERASEFF )
r6740	r6741
1735	1791	ROM_CONTINUE(0x44000,0x4000)
1736	1792	ROM_CONTINUE(0x4c000,0x4000)
1737	1793
1738		ROM_REGION( 0x20000, "soundcpu", 0 ) /* Sound Z80 + M5205 samples */
	1794	ROM_REGION( 0x20000, "audiocpu", 0 ) /* Sound Z80 + M5205 samples */
1739	1795	ROM_LOAD( "ic28.4",   0x00000, 0x10000, CRC(02b07d0a) SHA1(77cb9bf1b0d93ebad1bd8cdbedb7fdbad23697be) )
1740	1796	ROM_LOAD( "ic45.5",   0x10000, 0x10000, CRC(95c32824) SHA1(02de90a7bfbe89feb7708fda8dfac4ed32bc0773) )
1741	1797
r6740	r6741
1967	2023	ROM_END
1968	2024
1969	2025
1970		static void bootleg_decode(running_machine *machine)
	2026	/*************************************
	2027	*
	2028	*  Driver initialization
	2029	*
	2030	*************************************/
	2031
	2032	static void bootleg_decode( running_machine *machine )
1971	2033	{
1972	2034	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1973	2035	memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x50000);
r6740	r6741
1975	2037	}
1976	2038
1977	2039
1978		static void configure_banks(running_machine *machine)
	2040	static void configure_banks( running_machine *machine )
1979	2041	{
	2042	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2043
1980	2044	memory_configure_bank(machine, "bank1", 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x4000);
1981		pang_port5_kludge = 0;
	2045	state->port5_kludge = 0;
1982	2046	}
1983	2047
1984	2048
1985	2049	static DRIVER_INIT( dokaben )
1986	2050	{
1987		input_type = 0;
	2051	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2052	state->input_type = 0;
1988	2053	nvram_size = 0;
1989	2054	mgakuen2_decode(machine);
1990	2055	configure_banks(machine);
1991	2056	}
1992	2057	static DRIVER_INIT( pang )
1993	2058	{
1994		input_type = 0;
	2059	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2060	state->input_type = 0;
1995	2061	nvram_size = 0;
1996	2062	pang_decode(machine);
1997	2063	configure_banks(machine);
1998	2064	}
1999	2065	static DRIVER_INIT( pangb )
2000	2066	{
2001		input_type = 0;
	2067	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2068	state->input_type = 0;
2002	2069	nvram_size = 0;
2003	2070	bootleg_decode(machine);
2004	2071	configure_banks(machine);
2005	2072	}
2006	2073	static DRIVER_INIT( cworld )
2007	2074	{
2008		input_type = 0;
	2075	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2076	state->input_type = 0;
2009	2077	nvram_size = 0;
2010	2078	cworld_decode(machine);
2011	2079	configure_banks(machine);
2012	2080	}
2013	2081	static DRIVER_INIT( hatena )
2014	2082	{
2015		input_type = 0;
	2083	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2084	state->input_type = 0;
2016	2085	nvram_size = 0;
2017	2086	hatena_decode(machine);
2018	2087	configure_banks(machine);
2019	2088	}
2020	2089	static DRIVER_INIT( spang )
2021	2090	{
2022		input_type = 3;
	2091	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2092	state->input_type = 3;
2023	2093	nvram_size = 0x80;
2024	2094	nvram = &memory_region(machine, "maincpu")[0xe000];   /* NVRAM */
2025	2095	spang_decode(machine);
r6740	r6741
2028	2098
2029	2099	static DRIVER_INIT( spangbl )
2030	2100	{
2031		input_type = 3;
	2101	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2102	state->input_type = 3;
2032	2103	nvram_size = 0x80;
2033	2104	nvram = &memory_region(machine, "maincpu")[0xe000];   /* NVRAM */
2034	2105	bootleg_decode(machine);
r6740	r6741
2037	2108
2038	2109	static DRIVER_INIT( spangj )
2039	2110	{
2040		input_type = 3;
	2111	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2112	state->input_type = 3;
2041	2113	nvram_size = 0x80;
2042	2114	nvram = &memory_region(machine, "maincpu")[0xe000];   /* NVRAM */
2043	2115	spangj_decode(machine);
r6740	r6741
2053	2125	}
2054	2126	static DRIVER_INIT( sbbros )
2055	2127	{
2056		input_type = 3;
	2128	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2129	state->input_type = 3;
2057	2130	nvram_size = 0x80;
2058	2131	nvram = &memory_region(machine, "maincpu")[0xe000];   /* NVRAM */
2059	2132	sbbros_decode(machine);
r6740	r6741
2061	2134	}
2062	2135	static DRIVER_INIT( qtono1 )
2063	2136	{
2064		input_type = 0;
	2137	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2138	state->input_type = 0;
2065	2139	nvram_size = 0;
2066	2140	qtono1_decode(machine);
2067	2141	configure_banks(machine);
2068	2142	}
2069	2143	static DRIVER_INIT( qsangoku )
2070	2144	{
2071		input_type = 0;
	2145	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2146	state->input_type = 0;
2072	2147	nvram_size = 0;
2073	2148	qsangoku_decode(machine);
2074	2149	configure_banks(machine);
2075	2150	}
2076	2151	static DRIVER_INIT( mgakuen )
2077	2152	{
2078		input_type = 1;
	2153	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2154	state->input_type = 1;
2079	2155	configure_banks(machine);
2080	2156	memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x03, 0x03, 0, 0, "DSW1");
2081	2157	memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x04, 0x04, 0, 0, "DSW2");
2082	2158	}
2083	2159	static DRIVER_INIT( mgakuen2 )
2084	2160	{
2085		input_type = 1;
	2161	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2162	state->input_type = 1;
2086	2163	nvram_size = 0;
2087	2164	mgakuen2_decode(machine);
2088	2165	configure_banks(machine);
2089		pang_port5_kludge = 1;
	2166	state->port5_kludge = 1;
2090	2167	}
2091	2168	static DRIVER_INIT( pkladies )
2092	2169	{
2093		input_type = 1;
	2170	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2171	state->input_type = 1;
2094	2172	nvram_size = 0;
2095	2173	mgakuen2_decode(machine);
2096	2174	configure_banks(machine);
2097	2175	}
2098	2176	static DRIVER_INIT( marukin )
2099	2177	{
2100		input_type = 1;
	2178	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2179	state->input_type = 1;
2101	2180	nvram_size = 0;
2102	2181	marukin_decode(machine);
2103	2182	configure_banks(machine);
2104	2183	}
2105	2184	static DRIVER_INIT( block )
2106	2185	{
2107		input_type = 2;
	2186	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2187	state->input_type = 2;
2108	2188	nvram_size = 0x80;
2109	2189	nvram = &memory_region(machine, "maincpu")[0xff80];   /* NVRAM */
2110	2190	block_decode(machine);
r6740	r6741
2112	2192	}
2113	2193	static DRIVER_INIT( blockbl )
2114	2194	{
2115		input_type = 2;
	2195	mitchell_state *state = (mitchell_state *)machine->driver_data;
	2196	state->input_type = 2;
2116	2197	nvram_size = 0x80;
2117	2198	nvram = &memory_region(machine, "maincpu")[0xff80];   /* NVRAM */
2118	2199	bootleg_decode(machine);
r6740	r6741
2124	2205	/* descramble the program rom .. */
2125	2206	int len = memory_region_length(machine, "maincpu");
2126	2207	UINT8* source = alloc_array_or_die(UINT8, len);
2127		UINT8* dst    = memory_region(machine, "maincpu") ;
	2208	UINT8* dst = memory_region(machine, "maincpu") ;
2128	2209	int x;
2129	2210
2130	2211	static const int tablebank[]=
r6740	r6741
2152	2233	};
2153	2234
2154	2235	memcpy(source, dst, len);
2155		for (x=0;x<40;x+=2)
	2236	for (x = 0; x < 40; x += 2)
2156	2237	{
2157		if (tablebank[x]!=-1)
	2238	if (tablebank[x] != -1)
2158	2239	{
2159		memcpy(&dst[(x/2)*0x4000],&source[tablebank[x]*0x4000],0x4000);
2160		memcpy(&dst[((x/2)*0x4000)+0x50000],&source[tablebank[x+1]*0x4000],0x4000);
	2240	memcpy(&dst[(x / 2) * 0x4000], &source[tablebank[x] * 0x4000], 0x4000);
	2241	memcpy(&dst[((x / 2) * 0x4000) + 0x50000],&source[tablebank[x + 1] * 0x4000], 0x4000);
2161	2242	}
2162	2243	}
2163	2244	free(source);
r6740	r6741
2167	2248	}
2168	2249
2169	2250
2170		GAME( 1988, mgakuen,   0,        mgakuen, mgakuen,  mgakuen,  ROT0,   "Yuga", "Mahjong Gakuen", 0 )
2171		GAME( 1988, 7toitsu,   mgakuen,  mgakuen, mgakuen,  mgakuen,  ROT0,   "Yuga", "Chi-Toitsu", 0 )
2172		GAME( 1989, mgakuen2,  0,        marukin, marukin,  mgakuen2, ROT0,   "Face", "Mahjong Gakuen 2 Gakuen-chou no Fukushuu", 0 )
2173		GAME( 1989, pkladies,  0,        marukin, pkladies, pkladies, ROT0,   "Mitchell", "Poker Ladies", 0 )
2174		GAME( 1989, pkladiesl, pkladies, marukin, pkladies, pkladies, ROT0,   "Leprechaun", "Poker Ladies (Leprechaun ver. 510)", 0 )
2175		GAME( 1989, pkladiesla,pkladies, marukin, pkladies, pkladies, ROT0,   "Leprechaun", "Poker Ladies (Leprechaun ver. 401)", 0 )
2176		GAME( 1989, dokaben,   0,        pang,    pang,     dokaben,  ROT0,   "Capcom", "Dokaben (Japan)", 0 )
2177		GAME( 1989, pang,      0,        pang,    pang,     pang,     ROT0,   "Mitchell", "Pang (World)", 0 )
2178		GAME( 1989, pangb,     pang,     pang,    pang,     pangb,    ROT0,   "[Mitchell] (bootleg)", "Pang (bootleg, set 1)", 0 )
2179		GAME( 1989, pangbold,  pang,     pang,    pang,     pangb,    ROT0,   "[Mitchell] (bootleg)", "Pang (bootleg, set 2)", 0 )
2180		GAME( 1989, pangba,    pang,     spangbl, pang,     pangb,    ROT0,   "[Mitchell] (bootleg)", "Pang (bootleg, set 3)", GAME_NO_SOUND )
2181		GAME( 1989, bbros,     pang,     pang,    pang,     pang,     ROT0,   "Capcom", "Buster Bros. (US)", 0 )
2182		GAME( 1989, pompingw,  pang,     pang,    pang,     pang,     ROT0,   "Mitchell", "Pomping World (Japan)", 0 )
2183		GAME( 1989, cworld,    0,        pang,    qtono1,   cworld,   ROT0,   "Capcom", "Capcom World (Japan)", 0 )
2184		GAME( 1990, hatena,    0,        pang,    qtono1,   hatena,   ROT0,   "Capcom", "Adventure Quiz 2 Hatena Hatena no Dai-Bouken (Japan 900228)", 0 )
2185		GAME( 1990, spang,     0,        pang,    pang,     spang,    ROT0,   "Mitchell", "Super Pang (World 900914)", 0 )
2186		GAME( 1990, spangj,    spang,    pang,    pang,     spangj,   ROT0,   "Mitchell", "Super Pang (Japan 901023)", 0 )
2187		GAME( 1990, spangbl,   spang,    spangbl, spangbl,  spangbl,  ROT0,   "[Mitchell] (bootleg)", "Super Pang (World 900914, bootleg)", GAME_NO_SOUND ) // different sound hardware
2188		GAME( 1994, mstworld,  0,        mstworld,mstworld, mstworld, ROT0,   "TCH", "Monsters World",GAME_IMPERFECT_GRAPHICS ) // bootleg of Spang
2189		GAME( 1990, sbbros,    spang,    pang,    pang,     sbbros,   ROT0,   "Mitchell + Capcom", "Super Buster Bros. (US 901001)", 0 )
2190		GAME( 1990, marukin,   0,        marukin, marukin,  marukin,  ROT0,   "Yuga", "Super Marukin-Ban (Japan 901017)", 0 )
2191		GAME( 1991, qtono1,    0,        pang,    qtono1,   qtono1,   ROT0,   "Capcom", "Quiz Tonosama no Yabou (Japan)", 0 )
2192		GAME( 1991, qsangoku,  0,        pang,    qtono1,   qsangoku, ROT0,   "Capcom", "Quiz Sangokushi (Japan)", 0 )
2193		GAME( 1991, block,     0,        pang,    block,    block,    ROT270, "Capcom", "Block Block (World 910910)", 0 )
2194		GAME( 1991, blockj,    block,    pang,    block,    block,    ROT270, "Capcom", "Block Block (Japan 910910)", 0 )
2195		GAME( 1991, blockjoy,  block,    pang,    blockjoy, block,    ROT270, "Capcom", "Block Block (World 911106 Joystick)", 0 )
2196		GAME( 1991, blockbl,   block,    pang,    block,    blockbl,  ROT270, "bootleg", "Block Block (bootleg)", 0 )
	2251	/*************************************
	2252	*
	2253	*  Game driver(s)
	2254	*
	2255	*************************************/
2197	2256
	2257	GAME( 1988, mgakuen,   0,        mgakuen, mgakuen,  mgakuen,  ROT0,   "Yuga", "Mahjong Gakuen", GAME_SUPPORTS_SAVE )
	2258	GAME( 1988, 7toitsu,   mgakuen,  mgakuen, mgakuen,  mgakuen,  ROT0,   "Yuga", "Chi-Toitsu", GAME_SUPPORTS_SAVE )
	2259	GAME( 1989, mgakuen2,  0,        marukin, marukin,  mgakuen2, ROT0,   "Face", "Mahjong Gakuen 2 Gakuen-chou no Fukushuu", GAME_SUPPORTS_SAVE )
	2260	GAME( 1989, pkladies,  0,        marukin, pkladies, pkladies, ROT0,   "Mitchell", "Poker Ladies", GAME_SUPPORTS_SAVE )
	2261	GAME( 1989, pkladiesl, pkladies, marukin, pkladies, pkladies, ROT0,   "Leprechaun", "Poker Ladies (Leprechaun ver. 510)", GAME_SUPPORTS_SAVE )
	2262	GAME( 1989, pkladiesla,pkladies, marukin, pkladies, pkladies, ROT0,   "Leprechaun", "Poker Ladies (Leprechaun ver. 401)", GAME_SUPPORTS_SAVE )
	2263	GAME( 1989, dokaben,   0,        pang,    pang,     dokaben,  ROT0,   "Capcom", "Dokaben (Japan)", GAME_SUPPORTS_SAVE )
	2264	GAME( 1989, pang,      0,        pang,    pang,     pang,     ROT0,   "Mitchell", "Pang (World)", GAME_SUPPORTS_SAVE )
	2265	GAME( 1989, pangb,     pang,     pang,    pang,     pangb,    ROT0,   "[Mitchell] (bootleg)", "Pang (bootleg, set 1)", GAME_SUPPORTS_SAVE )
	2266	GAME( 1989, pangbold,  pang,     pang,    pang,     pangb,    ROT0,   "[Mitchell] (bootleg)", "Pang (bootleg, set 2)", GAME_SUPPORTS_SAVE )
	2267	GAME( 1989, pangba,    pang,     spangbl, pang,     pangb,    ROT0,   "[Mitchell] (bootleg)", "Pang (bootleg, set 3)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
	2268	GAME( 1989, bbros,     pang,     pang,    pang,     pang,     ROT0,   "Capcom", "Buster Bros. (US)", GAME_SUPPORTS_SAVE )
	2269	GAME( 1989, pompingw,  pang,     pang,    pang,     pang,     ROT0,   "Mitchell", "Pomping World (Japan)", GAME_SUPPORTS_SAVE )
	2270	GAME( 1989, cworld,    0,        pang,    qtono1,   cworld,   ROT0,   "Capcom", "Capcom World (Japan)", GAME_SUPPORTS_SAVE )
	2271	GAME( 1990, hatena,    0,        pang,    qtono1,   hatena,   ROT0,   "Capcom", "Adventure Quiz 2 Hatena Hatena no Dai-Bouken (Japan 900228)", GAME_SUPPORTS_SAVE )
	2272	GAME( 1990, spang,     0,        pang,    pang,     spang,    ROT0,   "Mitchell", "Super Pang (World 900914)", GAME_SUPPORTS_SAVE )
	2273	GAME( 1990, spangj,    spang,    pang,    pang,     spangj,   ROT0,   "Mitchell", "Super Pang (Japan 901023)", GAME_SUPPORTS_SAVE )
	2274	GAME( 1990, spangbl,   spang,    spangbl, spangbl,  spangbl,  ROT0,   "[Mitchell] (bootleg)", "Super Pang (World 900914, bootleg)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE ) // different sound hardware
	2275	GAME( 1994, mstworld,  0,        mstworld,mstworld, mstworld, ROT0,   "TCH", "Monsters World", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) // bootleg of Spang
	2276	GAME( 1990, sbbros,    spang,    pang,    pang,     sbbros,   ROT0,   "Mitchell + Capcom", "Super Buster Bros. (US 901001)", GAME_SUPPORTS_SAVE )
	2277	GAME( 1990, marukin,   0,        marukin, marukin,  marukin,  ROT0,   "Yuga", "Super Marukin-Ban (Japan 901017)", GAME_SUPPORTS_SAVE )
	2278	GAME( 1991, qtono1,    0,        pang,    qtono1,   qtono1,   ROT0,   "Capcom", "Quiz Tonosama no Yabou (Japan)", GAME_SUPPORTS_SAVE )
	2279	GAME( 1991, qsangoku,  0,        pang,    qtono1,   qsangoku, ROT0,   "Capcom", "Quiz Sangokushi (Japan)", GAME_SUPPORTS_SAVE )
	2280	GAME( 1991, block,     0,        pang,    block,    block,    ROT270, "Capcom", "Block Block (World 910910)", GAME_SUPPORTS_SAVE )
	2281	GAME( 1991, blockj,    block,    pang,    block,    block,    ROT270, "Capcom", "Block Block (Japan 910910)", GAME_SUPPORTS_SAVE )
	2282	GAME( 1991, blockjoy,  block,    pang,    blockjoy, block,    ROT270, "Capcom", "Block Block (World 911106 Joystick)", GAME_SUPPORTS_SAVE )
	2283	GAME( 1991, blockbl,   block,    pang,    block,    blockbl,  ROT270, "bootleg", "Block Block (bootleg)", GAME_SUPPORTS_SAVE )

src/mame/drivers/blktiger.c

r6740	r6741
17	17	#include "cpu/z80/z80.h"
18	18	#include "sound/2203intf.h"
19	19	#include "cpu/mcs51/mcs51.h"
20		#include "blktiger.h"
	20	#include "includes/blktiger.h"
21	21
22	22
23	23	/**************************************************

src/mame/drivers/deco_mlc.c

r6740	r6741
99	99	#include "includes/decocrpt.h"
100	100	#include "machine/eeprom.h"
101	101	#include "sound/ymz280b.h"
102		#include "decoprot.h"
	102	#include "includes/decoprot.h"
103	103	#include "cpu/arm/arm.h"
104	104	#include "cpu/sh2/sh2.h"
105	105
r6740	r6741
109	109
110	110	extern UINT32 *mlc_vram, *mlc_clip_ram;
111	111	static UINT32 *mlc_ram, *irq_ram;
112		static emu_timer *raster_irq_timer;
	112	static const device_config *raster_irq_timer;
113	113	static int mainCpuIsArm;
114	114	static int mlc_raster_table[9][256];
115	115	static UINT32 vbl_i;
r6740	r6741
174	174	return video_screen_get_vpos(space->machine->primary_screen);
175	175	}
176	176
177		static TIMER_CALLBACK( interrupt_gen )
	177	static TIMER_DEVICE_CALLBACK( interrupt_gen )
178	178	{
179	179	//  logerror("hit scanline IRQ %d (%08x)\n", video_screen_get_vpos(machine->primary_screen), info.i);
180		cputag_set_input_line(machine, "maincpu", mainCpuIsArm ? ARM_IRQ_LINE : 1, HOLD_LINE);
	180	cputag_set_input_line(timer->machine, "maincpu", mainCpuIsArm ? ARM_IRQ_LINE : 1, HOLD_LINE);
181	181	}
182	182
183	183	static WRITE32_HANDLER( mlc_irq_w )
r6740	r6741
192	192	cputag_set_input_line(space->machine, "maincpu", mainCpuIsArm ? ARM_IRQ_LINE : 1, CLEAR_LINE);
193	193	return;
194	194	case 0x14: /* Prepare scanline interrupt */
195		timer_adjust_oneshot(raster_irq_timer,video_screen_get_time_until_pos(space->machine->primary_screen, irq_ram[0x14/4], 0),0);
	195	timer_device_adjust_oneshot(raster_irq_timer,video_screen_get_time_until_pos(space->machine->primary_screen, irq_ram[0x14/4], 0),0);
196	196	//logerror("prepare scanline to fire at %d (currently on %d)\n", irq_ram[0x14/4], video_screen_get_vpos(space->machine->primary_screen));
197	197	return;
198	198	case 0x18:
r6740	r6741
379	379	static MACHINE_RESET( mlc )
380	380	{
381	381	vbl_i = 0xffffffff;
382		raster_irq_timer = timer_alloc(machine, interrupt_gen, NULL);
	382	raster_irq_timer = devtag_get_device(machine, "int_timer");
383	383	}
384	384
385	385	static NVRAM_HANDLER( mlc )
r6740	r6741
410	410	MDRV_MACHINE_RESET(mlc)
411	411	MDRV_NVRAM_HANDLER(mlc) /* Actually 93c45 */
412	412
	413	MDRV_TIMER_ADD("int_timer", interrupt_gen)
	414
413	415	/* video hardware */
414	416	MDRV_SCREEN_ADD("screen", RASTER)
415	417	MDRV_SCREEN_REFRESH_RATE(58)
r6740	r6741
441	443	MDRV_MACHINE_RESET(mlc)
442	444	MDRV_NVRAM_HANDLER(mlc) /* Actually 93c45 */
443	445
	446	MDRV_TIMER_ADD("int_timer", interrupt_gen)
	447
444	448	/* video hardware */
445	449	MDRV_SCREEN_ADD("screen", RASTER)
446	450	MDRV_SCREEN_REFRESH_RATE(58)

src/mame/drivers/fgoal.c

r6740	r6741
18	18
19	19	#include "driver.h"
20	20	#include "cpu/m6800/m6800.h"
	21	#include "machine/mb14241.h"
21	22	#include "includes/fgoal.h"
22	23
23	24
r6740	r6741
138	139	static WRITE8_HANDLER( fgoal_row_w )
139	140	{
140	141	fgoal_state *state = (fgoal_state *)space->machine->driver_data;
	142
141	143	state->row = data;
142		state->shift_data = state->shift_data >> 8;
	144	mb14241_shift_data_w(state->mb14241, 0, 0);
143	145	}
144	146
145	147	static WRITE8_HANDLER( fgoal_col_w )
146	148	{
147	149	fgoal_state *state = (fgoal_state *)space->machine->driver_data;
	150
148	151	state->col = data;
149		state->shift_bits = data & 7;
	152	mb14241_shift_count_w(state->mb14241, 0, data);
150	153	}
151	154
152
153		static WRITE8_HANDLER( fgoal_shifter_w )
154		{
155		fgoal_state *state = (fgoal_state *)space->machine->driver_data;
156		state->shift_data = (state->shift_data >> 8) | (data << 8); /* MB14241 custom chip */
157		}
158
159
160	155	static READ8_HANDLER( fgoal_address_hi_r )
161	156	{
162	157	return video_ram_address(space->machine) >> 8;
r6740	r6741
167	162	return video_ram_address(space->machine) & 0xff;
168	163	}
169	164
170
171	165	static READ8_HANDLER( fgoal_shifter_r )
172	166	{
173	167	fgoal_state *state = (fgoal_state *)space->machine->driver_data;
174		UINT8 v = state->shift_data >> (8 - state->shift_bits);
	168	UINT8 v = mb14241_shift_result_r(state->mb14241, 0);
175	169
176	170	return BITSWAP8(v, 7, 6, 5, 4, 3, 2, 1, 0);
177	171	}
r6740	r6741
179	173	static READ8_HANDLER( fgoal_shifter_reverse_r )
180	174	{
181	175	fgoal_state *state = (fgoal_state *)space->machine->driver_data;
182		UINT8 v = state->shift_data >> (8 - state->shift_bits);
	176	UINT8 v = mb14241_shift_result_r(state->mb14241, 0);
183	177
184	178	return BITSWAP8(v, 0, 1, 2, 3, 4, 5, 6, 7);
185	179	}
r6740	r6741
230	224	AM_RANGE(0x00f1, 0x00f1) AM_WRITE(fgoal_col_w)
231	225	AM_RANGE(0x00f2, 0x00f2) AM_WRITE(fgoal_row_w)
232	226	AM_RANGE(0x00f3, 0x00f3) AM_WRITE(fgoal_col_w)
233		AM_RANGE(0x00f4, 0x00f7) AM_WRITE(fgoal_shifter_w)
	227	AM_RANGE(0x00f4, 0x00f7) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
234	228	AM_RANGE(0x00f8, 0x00fb) AM_WRITE(fgoal_sound1_w)
235	229	AM_RANGE(0x00fc, 0x00ff) AM_WRITE(fgoal_sound2_w)
236	230
r6740	r6741
347	341	fgoal_state *state = (fgoal_state *)machine->driver_data;
348	342
349	343	state->maincpu = devtag_get_device(machine, "maincpu");
	344	state->mb14241 = devtag_get_device(machine, "mb14241");
350	345
351	346	state_save_register_global(machine, state->xpos);
352	347	state_save_register_global(machine, state->ypos);
r6740	r6741
354	349	state_save_register_global(machine, state->fgoal_player);
355	350	state_save_register_global(machine, state->row);
356	351	state_save_register_global(machine, state->col);
357		state_save_register_global(machine, state->shift_data);
358		state_save_register_global(machine, state->shift_bits);
359	352	state_save_register_global(machine, state->prev_coin);
360	353	}
361	354
r6740	r6741
371	364	state->fgoal_player = 0;
372	365	state->row = 0;
373	366	state->col = 0;
374		state->shift_data = 0;
375		state->shift_bits = 0;
376	367	state->prev_coin = 0;
377	368	}
378	369
r6740	r6741
388	379	MDRV_MACHINE_START(fgoal)
389	380	MDRV_MACHINE_RESET(fgoal)
390	381
	382	/* add shifter */
	383	MDRV_MB14241_ADD("mb14241")
	384
391	385	/* video hardware */
392	386	MDRV_SCREEN_ADD("screen", RASTER)
393	387	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/mystston.c

r6740	r6741
16	16	#include "driver.h"
17	17	#include "cpu/m6502/m6502.h"
18	18	#include "sound/ay8910.h"
19		#include "mystston.h"
	19	#include "includes/mystston.h"
20	20
21	21
22	22

src/mame/drivers/mainsnk.c

r6740	r6741
109	109
110	110	#include "driver.h"
111	111	#include "cpu/z80/z80.h"
112		#include "snk.h"
	112	#include "includes/snk.h"
113	113	#include "sound/ay8910.h"
114	114
115	115	extern UINT8 *mainsnk_fgram;

src/mame/drivers/rampart.c

r6740	r6741
24	24
25	25	#include "driver.h"
26	26	#include "cpu/m68000/m68000.h"
27		#include "rampart.h"
	27	#include "includes/rampart.h"
28	28	#include "sound/okim6295.h"
29	29	#include "sound/2413intf.h"
30	30
r6740	r6741
60	60	*
61	61	*************************************/
62	62
	63	static MACHINE_START( rampart )
	64	{
	65	atarigen_init(machine);
	66	}
	67
	68
63	69	static MACHINE_RESET( rampart )
64	70	{
65	71	rampart_state *state = (rampart_state *)machine->driver_data;
r6740	r6741
343	349	MDRV_CPU_PROGRAM_MAP(main_map)
344	350	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
345	351
	352	MDRV_MACHINE_START(rampart)
346	353	MDRV_MACHINE_RESET(rampart)
347	354	MDRV_NVRAM_HANDLER(atarigen)
348	355	MDRV_WATCHDOG_VBLANK_INIT(8)

src/mame/drivers/segaxbd.c

r6740	r6741
233	233
234	234	#include "driver.h"
235	235	#include "cpu/z80/z80.h"
236		#include "system16.h"
	236	#include "includes/system16.h"
237	237	#include "cpu/m68000/m68000.h"
238	238	#include "machine/segaic16.h"
239	239	#include "sound/2151intf.h"

src/mame/drivers/nbmj9195.c

r6740	r6741
22	22	#include "driver.h"
23	23	#include "cpu/z80/z80.h"
24	24	#include "machine/z80ctc.h"
25		#include "nb1413m3.h"      // needed for mahjong input controller
	25	#include "includes/nb1413m3.h"      // needed for mahjong input controller
26	26	#include "sound/3812intf.h"
27	27	#include "sound/dac.h"
28	28	#include "cpu/z80/z80daisy.h"

src/mame/drivers/hcastle.c

r6740	r6741
12	12	#include "sound/3812intf.h"
13	13	#include "sound/k007232.h"
14	14	#include "sound/k051649.h"
15		#include "konamipt.h"
	15	#include "video/konicdev.h"
	16	#include "includes/konamipt.h"
	17	#include "includes/hcastle.h"
16	18
17		PALETTE_INIT( hcastle );
18		VIDEO_UPDATE( hcastle );
19		VIDEO_START( hcastle );
20	19
21		extern UINT8 *hcastle_pf1_videoram,*hcastle_pf2_videoram;
22
23		WRITE8_HANDLER( hcastle_pf1_video_w );
24		WRITE8_HANDLER( hcastle_pf2_video_w );
25		READ8_HANDLER( hcastle_gfxbank_r );
26		WRITE8_HANDLER( hcastle_gfxbank_w );
27		WRITE8_HANDLER( hcastle_pf1_control_w );
28		WRITE8_HANDLER( hcastle_pf2_control_w );
29
30	20	static WRITE8_HANDLER( hcastle_bankswitch_w )
31	21	{
32		UINT8 *RAM = memory_region(space->machine, "maincpu");
33		int bankaddress;
34
35		bankaddress = 0x10000 + (data & 0x1f) * 0x2000;
36		memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
	22	memory_set_bank(space->machine, "bank1", data & 0x1f);
37	23	}
38	24
39	25	static WRITE8_HANDLER( hcastle_soundirq_w )
40	26	{
41		cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE );
	27	hcastle_state *state = (hcastle_state *)space->machine->driver_data;
	28	cpu_set_input_line(state->audiocpu, 0, HOLD_LINE);
42	29	}
43	30
44	31	static WRITE8_HANDLER( hcastle_coin_w )
45	32	{
46		coin_counter_w(space->machine, 0,data & 0x40);
47		coin_counter_w(space->machine, 1,data & 0x80);
	33	coin_counter_w(space->machine, 0, data & 0x40);
	34	coin_counter_w(space->machine, 1, data & 0x80);
48	35	}
49	36
50	37
r6740	r6741
65	52	AM_RANGE(0x0414, 0x0414) AM_READ_PORT("DSW1")
66	53	AM_RANGE(0x0415, 0x0415) AM_READ_PORT("DSW2")
67	54	AM_RANGE(0x0418, 0x0418) AM_READWRITE(hcastle_gfxbank_r, hcastle_gfxbank_w)
68		AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_GENERIC(paletteram)
	55	AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_MEMBER(hcastle_state, paletteram)
69	56	AM_RANGE(0x0700, 0x1fff) AM_RAM
70		AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(hcastle_pf1_video_w) AM_BASE(&hcastle_pf1_videoram)
	57	AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(hcastle_pf1_video_w) AM_BASE_MEMBER(hcastle_state, pf1_videoram)
71	58	AM_RANGE(0x3000, 0x3fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
72		AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(hcastle_pf2_video_w) AM_BASE(&hcastle_pf2_videoram)
	59	AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(hcastle_pf2_video_w) AM_BASE_MEMBER(hcastle_state, pf2_videoram)
73	60	AM_RANGE(0x5000, 0x5fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram2)
74	61	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
75	62	AM_RANGE(0x8000, 0xffff) AM_ROM
r6740	r6741
169	156
170	157	static void irqhandler(const device_config *device, int linestate)
171	158	{
172		//  cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
	159	//  hcastle_state *state = (hcastle_state *)device->machine->driver_data;
	160	//  cputag_set_input_line(state->audiocpu, 0, linestate);
173	161	}
174	162
175	163	static void volume_callback(const device_config *device, int v)
176	164	{
177		k007232_set_volume(device,0,(v >> 4) * 0x11,0);
178		k007232_set_volume(device,1,0,(v & 0x0f) * 0x11);
	165	k007232_set_volume(device, 0, (v >> 4) * 0x11, 0);
	166	k007232_set_volume(device, 1, 0, (v & 0x0f) * 0x11);
179	167	}
180	168
181	169	static const k007232_interface k007232_config =
r6740	r6741
188	176	irqhandler
189	177	};
190	178
	179	static MACHINE_START( hcastle )
	180	{
	181	hcastle_state *state = (hcastle_state *)machine->driver_data;
	182	UINT8 *ROM = memory_region(machine, "maincpu");
	183
	184	memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x10000], 0x2000);
	185
	186	state->audiocpu = devtag_get_device(machine, "audiocpu");
	187	state->k007121_1 = devtag_get_device(machine, "k007121_1");
	188	state->k007121_2 = devtag_get_device(machine, "k007121_2");
	189
	190	state_save_register_global(machine, state->pf2_bankbase);
	191	state_save_register_global(machine, state->pf1_bankbase);
	192	state_save_register_global(machine, state->gfx_bank);
	193	state_save_register_global(machine, state->old_pf1);
	194	state_save_register_global(machine, state->old_pf2);
	195	}
	196
	197	static MACHINE_RESET( hcastle )
	198	{
	199	hcastle_state *state = (hcastle_state *)machine->driver_data;
	200
	201	state->pf2_bankbase = 0;
	202	state->pf1_bankbase = 0;
	203	state->gfx_bank = 0;
	204	state->old_pf1 = -1;
	205	state->old_pf2 = -1;
	206	}
	207
191	208	static MACHINE_DRIVER_START( hcastle )
192	209
	210	/* driver data */
	211	MDRV_DRIVER_DATA(hcastle_state)
	212
193	213	/* basic machine hardware */
194	214	MDRV_CPU_ADD("maincpu", KONAMI, 3000000)   /* Derived from 24 MHz clock */
195	215	MDRV_CPU_PROGRAM_MAP(hcastle_map)
r6740	r6741
198	218	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
199	219	MDRV_CPU_PROGRAM_MAP(sound_map)
200	220
	221	MDRV_MACHINE_START(hcastle)
	222	MDRV_MACHINE_RESET(hcastle)
	223
201	224	/* video hardware */
202	225	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
203	226
r6740	r6741
215	238	MDRV_VIDEO_START(hcastle)
216	239	MDRV_VIDEO_UPDATE(hcastle)
217	240
	241	MDRV_K007121_ADD("k007121_1")
	242	MDRV_K007121_ADD("k007121_2")
	243
218	244	/* sound hardware */
219	245	MDRV_SPEAKER_STANDARD_MONO("mono")
220	246
r6740	r6741
343	369
344	370
345	371
346		GAME( 1988, hcastle,  0,       hcastle, hcastle, 0, ROT0, "Konami", "Haunted Castle (version M)", 0 )
347		GAME( 1988, hcastleo, hcastle, hcastle, hcastle, 0, ROT0, "Konami", "Haunted Castle (version K)", 0 )
348		GAME( 1988, hcastlej, hcastle, hcastle, hcastle, 0, ROT0, "Konami", "Akuma-Jou Dracula (Japan version P)", 0 )
349		GAME( 1988, hcastljo, hcastle, hcastle, hcastle, 0, ROT0, "Konami", "Akuma-Jou Dracula (Japan version N)", 0 )
	372	GAME( 1988, hcastle,  0,       hcastle, hcastle, 0, ROT0, "Konami", "Haunted Castle (version M)", GAME_SUPPORTS_SAVE )
	373	GAME( 1988, hcastleo, hcastle, hcastle, hcastle, 0, ROT0, "Konami", "Haunted Castle (version K)", GAME_SUPPORTS_SAVE )
	374	GAME( 1988, hcastlej, hcastle, hcastle, hcastle, 0, ROT0, "Konami", "Akuma-Jou Dracula (Japan version P)", GAME_SUPPORTS_SAVE )
	375	GAME( 1988, hcastljo, hcastle, hcastle, hcastle, 0, ROT0, "Konami", "Akuma-Jou Dracula (Japan version N)", GAME_SUPPORTS_SAVE )

src/mame/drivers/copsnrob.c

r6740	r6741
57	57
58	58	#include "driver.h"
59	59	#include "cpu/m6502/m6502.h"
60		#include "copsnrob.h"
	60	#include "includes/copsnrob.h"
61	61	#include "copsnrob.lh"
62	62
63	63

src/mame/drivers/dblewing.c

r6740	r6741
20	20	#include "driver.h"
21	21	#include "cpu/z80/z80.h"
22	22	#include "cpu/m68000/m68000.h"
23		#include "decocrpt.h"
24		#include "deco16ic.h"
	23	#include "includes/decocrpt.h"
	24	#include "includes/deco16ic.h"
25	25	#include "sound/2151intf.h"
26	26	#include "sound/okim6295.h"
27	27

src/mame/drivers/arabian.c

r6740	r6741
68	68
69	69	#include "driver.h"
70	70	#include "cpu/z80/z80.h"
71		#include "arabian.h"
	71	#include "includes/arabian.h"
72	72	#include "sound/ay8910.h"
73	73
74	74	/* constants */

src/mame/drivers/labyrunr.c

r6740	r6741
1	1	/***************************************************************************
2	2
3		Labyrinth Runner (GX771) (c) 1987 Konami
	3	Labyrinth Runner (GX771) (c) 1987 Konami
4	4
5		similar to Fast Lane
	5	similar to Fast Lane
6	6
7		Driver by Nicola Salmoria
	7	Driver by Nicola Salmoria
8	8
9	9	***************************************************************************/
10	10
11	11	#include "driver.h"
12	12	#include "deprecat.h"
13	13	#include "cpu/hd6309/hd6309.h"
14		#include "video/konamiic.h"
15	14	#include "sound/2203intf.h"
16		#include "konamipt.h"
	15	#include "video/konicdev.h"
	16	#include "includes/konamipt.h"
	17	#include "includes/labyrunr.h"
17	18
18		/* from video/labyrunr.c */
19		extern UINT8 *labyrunr_videoram1,*labyrunr_videoram2,*labyrunr_scrollram;
20		PALETTE_INIT( labyrunr );
21		WRITE8_HANDLER( labyrunr_vram1_w );
22		WRITE8_HANDLER( labyrunr_vram2_w );
23		VIDEO_START( labyrunr );
24		VIDEO_UPDATE( labyrunr );
25	19
26	20	static INTERRUPT_GEN( labyrunr_interrupt )
27	21	{
	22	labyrunr_state *state = (labyrunr_state *)device->machine->driver_data;
	23
28	24	if (cpu_getiloops(device) == 0)
29	25	{
30		if (K007121_ctrlram[0][0x07] & 0x02)
	26	if (k007121_ctrlram_r(state->k007121, 7) & 0x02)
31	27	cpu_set_input_line(device, HD6309_IRQ_LINE, HOLD_LINE);
32	28	}
33	29	else if (cpu_getiloops(device) % 2)
34	30	{
35		if (K007121_ctrlram[0][0x07] & 0x01)
	31	if (k007121_ctrlram_r(state->k007121, 7) & 0x01)
36	32	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
37	33	}
38	34	}
39	35
40	36	static WRITE8_HANDLER( labyrunr_bankswitch_w )
41	37	{
42		int bankaddress;
43		UINT8 *RAM = memory_region(space->machine, "maincpu");
	38	if (data & 0xe0) popmessage("bankswitch %02x", data);
44	39
45		if (data & 0xe0) popmessage("bankswitch %02x",data);
46
47	40	/* bits 0-2 = bank number */
48		bankaddress = 0x10000 + (data & 0x07) * 0x4000;
49		memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
	41	memory_set_bank(space->machine, "bank1", data & 0x07);   // shall we check if data&7 > #banks?
50	42
51	43	/* bits 3 and 4 are coin counters */
52		coin_counter_w(space->machine, 0,data & 0x08);
53		coin_counter_w(space->machine, 1,data & 0x10);
	44	coin_counter_w(space->machine, 0, data & 0x08);
	45	coin_counter_w(space->machine, 1, data & 0x10);
54	46	}
55	47
56	48	static ADDRESS_MAP_START( labyrunr_map, ADDRESS_SPACE_PROGRAM, 8 )
57		AM_RANGE(0x0000, 0x0007) AM_WRITE(K007121_ctrl_0_w)
58		AM_RANGE(0x0020, 0x005f) AM_RAM AM_BASE(&labyrunr_scrollram)
	49	AM_RANGE(0x0000, 0x0007) AM_DEVWRITE("k007121", k007121_ctrl_w)
	50	AM_RANGE(0x0020, 0x005f) AM_RAM AM_BASE_MEMBER(labyrunr_state, scrollram)
59	51	AM_RANGE(0x0800, 0x0800) AM_DEVREADWRITE("ym1", ym2203_read_port_r, ym2203_write_port_w)
60	52	AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("ym1", ym2203_status_port_r, ym2203_control_port_w)
61	53	AM_RANGE(0x0900, 0x0900) AM_DEVREADWRITE("ym2", ym2203_read_port_r, ym2203_write_port_w)
r6740	r6741
64	56	AM_RANGE(0x0a01, 0x0a01) AM_READ_PORT("P1")
65	57	AM_RANGE(0x0b00, 0x0b00) AM_READ_PORT("SYSTEM")
66	58	AM_RANGE(0x0c00, 0x0c00) AM_WRITE(labyrunr_bankswitch_w)
67		AM_RANGE(0x0d00, 0x0d1f) AM_READWRITE(K051733_r, K051733_w)
	59	AM_RANGE(0x0d00, 0x0d1f) AM_DEVREADWRITE("k051733", k051733_r, k051733_w)
68	60	AM_RANGE(0x0e00, 0x0e00) AM_WRITE(watchdog_reset_w)
69		AM_RANGE(0x1000, 0x10ff) AM_RAM AM_BASE_GENERIC(paletteram)
	61	AM_RANGE(0x1000, 0x10ff) AM_RAM AM_BASE_MEMBER(labyrunr_state, paletteram)
70	62	AM_RANGE(0x1800, 0x1fff) AM_RAM
71		AM_RANGE(0x2000, 0x2fff) AM_RAM AM_BASE_GENERIC(spriteram)
72		AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(labyrunr_vram1_w) AM_BASE(&labyrunr_videoram1)
73		AM_RANGE(0x3800, 0x3fff) AM_RAM_WRITE(labyrunr_vram2_w) AM_BASE(&labyrunr_videoram2)
	63	AM_RANGE(0x2000, 0x2fff) AM_RAM AM_BASE_MEMBER(labyrunr_state, spriteram)
	64	AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(labyrunr_vram1_w) AM_BASE_MEMBER(labyrunr_state, videoram1)
	65	AM_RANGE(0x3800, 0x3fff) AM_RAM_WRITE(labyrunr_vram2_w) AM_BASE_MEMBER(labyrunr_state, videoram2)
74	66	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
75	67	AM_RANGE(0x8000, 0xffff) AM_ROM
76	68	ADDRESS_MAP_END
r6740	r6741
191	183
192	184
193	185
	186	static MACHINE_START( labyrunr )
	187	{
	188	labyrunr_state *state = (labyrunr_state *)machine->driver_data;
	189	UINT8 *ROM = memory_region(machine, "maincpu");
	190
	191	memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
	192
	193	state->k007121 = devtag_get_device(machine, "k007121");
	194	}
	195
194	196	static MACHINE_DRIVER_START( labyrunr )
195	197
	198	/* driver data */
	199	MDRV_DRIVER_DATA(labyrunr_state)
	200
196	201	/* basic machine hardware */
197	202	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)      /* 24MHz/8? */
198	203	MDRV_CPU_PROGRAM_MAP(labyrunr_map)
199	204	MDRV_CPU_VBLANK_INT_HACK(labyrunr_interrupt,8)   /* 1 IRQ + 4 NMI (generated by 007121) */
200	205
	206	MDRV_MACHINE_START(labyrunr)
	207
201	208	/* video hardware */
202	209	MDRV_SCREEN_ADD("screen", RASTER)
203	210	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
213	220	MDRV_VIDEO_START(labyrunr)
214	221	MDRV_VIDEO_UPDATE(labyrunr)
215	222
	223	MDRV_K007121_ADD("k007121")
	224	MDRV_K051733_ADD("k051733")
	225
216	226	/* sound hardware */
217	227	MDRV_SPEAKER_STANDARD_MONO("mono")
218	228
r6740	r6741
287	297	ROM_END
288	298
289	299
290		GAME( 1987, tricktrp, 0,        labyrunr, labyrunr, 0, ROT90, "Konami", "Trick Trap (World?)", 0 )
291		GAME( 1987, labyrunr, tricktrp, labyrunr, labyrunr, 0, ROT90, "Konami", "Labyrinth Runner (Japan)", 0 )
292		GAME( 1987, labyrunrk,tricktrp, labyrunr, labyrunr, 0, ROT90, "Konami", "Labyrinth Runner (World Ver. K)", 0 )
	300	GAME( 1987, tricktrp, 0,        labyrunr, labyrunr, 0, ROT90, "Konami", "Trick Trap (World?)", GAME_SUPPORTS_SAVE )
	301	GAME( 1987, labyrunr, tricktrp, labyrunr, labyrunr, 0, ROT90, "Konami", "Labyrinth Runner (Japan)", GAME_SUPPORTS_SAVE )
	302	GAME( 1987, labyrunrk,tricktrp, labyrunr, labyrunr, 0, ROT90, "Konami", "Labyrinth Runner (World Ver. K)", GAME_SUPPORTS_SAVE )

src/mame/drivers/hornet.c

r6740	r6741
311	311	#include "cpu/m68000/m68000.h"
312	312	#include "cpu/powerpc/ppc.h"
313	313	#include "cpu/sharc/sharc.h"
314		#include "machine/eeprom.h"
	314	#include "machine/eepromdev.h"
315	315	#include "machine/konppc.h"
316		#include "machine/konamiic.h"
317	316	#include "video/voodoo.h"
318	317	#include "machine/timekpr.h"
319	318	#include "sound/rf5c400.h"
320	319	#include "rendlay.h"
321	320	#include "machine/adc1213x.h"
	321	#include "sound/k056800.h"
322	322
323	323	static UINT8 led_reg0, led_reg1;
324	324	static UINT32 *workram;
r6740	r6741
633	633	UINT8 r = 0;
634	634	static const char *const portnames[] = { "IN0", "IN1", "IN2" };
635	635	const device_config *adc12138 = devtag_get_device(space->machine, "adc12138");
	636	const device_config *eeprom = devtag_get_device(space->machine, "eeprom");
636	637
637	638	switch (offset)
638	639	{
r6740	r6741
652	653	0x02 = ADDOR (ADC DOR)
653	654	0x01 = ADDO (ADC DO)
654	655	*/
655		r = 0xf0 | (eeprom_read_bit() << 3);
	656	r = 0xf0 | (eepromdev_read_bit(eeprom) << 3);
656	657	r |= adc1213x_do_r(adc12138, 0) | (adc1213x_eoc_r(adc12138, 0) << 2);
657	658	break;
658	659
r6740	r6741
692	693	0x02 = LAMP1
693	694	0x01 = LAMP0
694	695	*/
695		eeprom_write_bit((data & 0x10) ? 1 : 0);
696		eeprom_set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
697		eeprom_set_cs_line((data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
	696	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
698	697	mame_printf_debug("System register 0 = %02X\n", data);
699	698	break;
700	699
r6740	r6741
807	806	AM_RANGE(0x7d000000, 0x7d00ffff) AM_READ8(sysreg_r, 0xffffffff)
808	807	AM_RANGE(0x7d010000, 0x7d01ffff) AM_WRITE8(sysreg_w, 0xffffffff)
809	808	AM_RANGE(0x7d020000, 0x7d021fff) AM_DEVREADWRITE8("m48t58", timekeeper_r, timekeeper_w, 0xffffffff)   /* M48T58Y RTC/NVRAM */
810		AM_RANGE(0x7d030000, 0x7d030007) AM_READWRITE(K056800_host_r, K056800_host_w)
	809	AM_RANGE(0x7d030000, 0x7d030007) AM_DEVREADWRITE("k056800", k056800_host_r, k056800_host_w)
811	810	AM_RANGE(0x7d042000, 0x7d043fff) AM_RAM            /* COMM BOARD 0 */
812	811	AM_RANGE(0x7d044000, 0x7d044007) AM_READ(comm0_unk_r)
813	812	AM_RANGE(0x7d048000, 0x7d048003) AM_WRITE(comm1_w)
r6740	r6741
824	823	AM_RANGE(0x000000, 0x07ffff) AM_ROM
825	824	AM_RANGE(0x100000, 0x10ffff) AM_RAM      /* Work RAM */
826	825	AM_RANGE(0x200000, 0x200fff) AM_DEVREADWRITE("rfsnd", rf5c400_r, rf5c400_w)      /* Ricoh RF5C400 */
827		AM_RANGE(0x300000, 0x30000f) AM_READWRITE(K056800_sound_r, K056800_sound_w)
	826	AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("k056800", k056800_sound_r, k056800_sound_w)
828	827	AM_RANGE(0x480000, 0x480001) AM_WRITENOP
829	828	AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP
830	829	AM_RANGE(0x500000, 0x500001) AM_WRITENOP
r6740	r6741
967	966	PORT_DIPNAME( 0x01, 0x01, "Monitor Type" ) PORT_DIPLOCATION("SW:8")
968	967	PORT_DIPSETTING( 0x01, "24KHz" )
969	968	PORT_DIPSETTING( 0x00, "15KHz" )
	969
	970	PORT_START( "EEPROMOUT" )
	971	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	972	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	973	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
970	974	INPUT_PORTS_END
971	975
972	976	static INPUT_PORTS_START( sscope )
r6740	r6741
1014	1018	PORT_DIPNAME( 0x01, 0x01, "Monitor Type" ) PORT_DIPLOCATION("SW:8")
1015	1019	PORT_DIPSETTING( 0x01, "24KHz" )
1016	1020	PORT_DIPSETTING( 0x00, "15KHz" )
	1021
	1022	PORT_START( "EEPROMOUT" )
	1023	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	1024	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	1025	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
1017	1026	INPUT_PORTS_END
1018	1027
1019	1028	static const sharc_config sharc_cfg =
r6740	r6741
1064	1073	memory_set_bankptr(machine, "bank5", usr5);
1065	1074	}
1066	1075
1067		static NVRAM_HANDLER( hornet )
1068		{
1069		NVRAM_HANDLER_CALL(93C46);
1070		}
1071
1072	1076	static double adc12138_input_callback( const device_config *device, UINT8 input )
1073	1077	{
1074	1078	return (double)0.0;
r6740	r6741
1078	1082	adc12138_input_callback
1079	1083	};
1080	1084
	1085	static TIMER_CALLBACK( irq_off )
	1086	{
	1087	cputag_set_input_line(machine, "audiocpu", param, CLEAR_LINE);
	1088	}
	1089
	1090	static void sound_irq_callback( running_machine *machine, int irq )
	1091	{
	1092	int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
	1093
	1094	cputag_set_input_line(machine, "audiocpu", line, ASSERT_LINE);
	1095	timer_set(machine, ATTOTIME_IN_USEC(1), NULL, line, irq_off);
	1096	}
	1097
	1098	static const k056800_interface hornet_k056800_interface =
	1099	{
	1100	sound_irq_callback
	1101	};
	1102
1081	1103	static MACHINE_DRIVER_START( hornet )
1082	1104
1083	1105	/* basic machine hardware */
r6740	r6741
1096	1118	MDRV_MACHINE_START( hornet )
1097	1119	MDRV_MACHINE_RESET( hornet )
1098	1120
1099		MDRV_NVRAM_HANDLER( hornet )
	1121	MDRV_EEPROM_93C46_NODEFAULT_ADD("eeprom")
1100	1122
1101	1123	MDRV_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, 2, "screen")
1102	1124	MDRV_3DFX_VOODOO_CPU("dsp")
r6740	r6741
1115	1137	MDRV_VIDEO_START(hornet)
1116	1138	MDRV_VIDEO_UPDATE(hornet)
1117	1139
	1140	MDRV_K056800_ADD("k056800", hornet_k056800_interface)
	1141
1118	1142	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1119	1143
1120	1144	MDRV_SOUND_ADD("rfsnd", RF5C400, 16934400)   // value from Guru readme, gives 44100 Hz sample rate
r6740	r6741
1126	1150	MDRV_ADC12138_ADD( "adc12138", hornet_adc_interface )
1127	1151	MACHINE_DRIVER_END
1128	1152
	1153
1129	1154	static MACHINE_RESET( hornet_2board )
1130	1155	{
1131	1156	UINT8 *usr3 = memory_region(machine, "user3");
r6740	r6741
1352	1377	/*****************************************************************************/
1353	1378
1354	1379
1355		static TIMER_CALLBACK( irq_off )
1356		{
1357		cputag_set_input_line(machine, "audiocpu", param, CLEAR_LINE);
1358		}
1359
1360		static void sound_irq_callback(running_machine *machine, int irq)
1361		{
1362		int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
1363		cputag_set_input_line(machine, "audiocpu", line, ASSERT_LINE);
1364		timer_set(machine, ATTOTIME_IN_USEC(1), NULL, line, irq_off);
1365		}
1366
1367	1380	static DRIVER_INIT(hornet)
1368	1381	{
1369	1382	init_konami_cgboard(machine, 1, CGBOARD_TYPE_HORNET);
1370	1383	set_cgboard_texture_bank(machine, 0, "bank5", memory_region(machine, "user5"));
1371	1384
1372		K056800_init(machine, sound_irq_callback);
1373	1385	K033906_init(machine);
1374	1386
1375	1387	led_reg0 = led_reg1 = 0x7f;
r6740	r6741
1383	1395	set_cgboard_texture_bank(machine, 0, "bank5", memory_region(machine, "user5"));
1384	1396	set_cgboard_texture_bank(machine, 1, "bank6", memory_region(machine, "user5"));
1385	1397
1386		K056800_init(machine, sound_irq_callback);
1387	1398	K033906_init(machine);
1388	1399
1389	1400	led_reg0 = led_reg1 = 0x7f;
r6740	r6741
1595	1606
1596	1607	/*************************************************************************/
1597	1608
1598		GAME(  1998, gradius4, 0,      hornet,           hornet, hornet,        ROT0, "Konami", "Gradius 4: Fukkatsu", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
1599		GAME(  1998, nbapbp,   0,      hornet,           hornet, hornet,        ROT0, "Konami", "NBA Play By Play", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
1600		GAMEL( 1998, terabrst, 0,      terabrst,        hornet, hornet_2board, ROT0, "Konami", "Teraburst (1998/07/17 ver UEL)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE, layout_dualhsxs )
1601		GAMEL( 1998, terabrsta,terabrst,terabrst,       hornet, hornet_2board, ROT0, "Konami", "Teraburst (1998/02/25 ver AAA)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE, layout_dualhsxs )
1602		GAMEL( 2000, sscope,   0,      hornet_2board,    sscope, hornet_2board, ROT0, "Konami", "Silent Scope (ver JZD)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
1603		GAMEL( 2000, sscopea,  sscope, hornet_2board,    sscope, hornet_2board, ROT0, "Konami", "Silent Scope (ver UAB)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
1604		GAMEL( 2000, sscopeb,  sscope, hornet_2board,    sscope, hornet_2board, ROT0, "Konami", "Silent Scope (ver UAA)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
1605		GAMEL( 2000, sscope2,  0,      hornet_2board_v2, sscope, hornet_2board, ROT0, "Konami", "Silent Scope 2", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
	1609	GAME(  1998, gradius4,  0,        hornet,           hornet, hornet,        ROT0, "Konami", "Gradius 4: Fukkatsu", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1610	GAME(  1998, nbapbp,    0,        hornet,           hornet, hornet,        ROT0, "Konami", "NBA Play By Play", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1611	GAMEL( 1998, terabrst,  0,        terabrst,         hornet, hornet_2board, ROT0, "Konami", "Teraburst (1998/07/17 ver UEL)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE, layout_dualhsxs )
	1612	GAMEL( 1998, terabrsta, terabrst, terabrst,         hornet, hornet_2board, ROT0, "Konami", "Teraburst (1998/02/25 ver AAA)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE, layout_dualhsxs )
	1613	GAMEL( 2000, sscope,    0,        hornet_2board,    sscope, hornet_2board, ROT0, "Konami", "Silent Scope (ver JZD)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
	1614	GAMEL( 2000, sscopea,   sscope,   hornet_2board,    sscope, hornet_2board, ROT0, "Konami", "Silent Scope (ver UAB)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
	1615	GAMEL( 2000, sscopeb,   sscope,   hornet_2board,    sscope, hornet_2board, ROT0, "Konami", "Silent Scope (ver UAA)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
	1616	GAMEL( 2000, sscope2,   0,        hornet_2board_v2, sscope, hornet_2board, ROT0, "Konami", "Silent Scope 2", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )

src/mame/drivers/ccastles.c

r6740	r6741
122	122	#include "driver.h"
123	123	#include "cpu/m6502/m6502.h"
124	124	#include "sound/pokey.h"
125		#include "ccastles.h"
	125	#include "includes/ccastles.h"
126	126
127	127
128	128	#define MASTER_CLOCK   (10000000)

src/mame/drivers/ddragon3.c

r6740	r6741
143	143	#include "cpu/m68000/m68000.h"
144	144	#include "sound/2151intf.h"
145	145	#include "sound/okim6295.h"
146		#include "ddragon3.h"
	146	#include "includes/ddragon3.h"
147	147
148	148	#define PIXEL_CLOCK      (XTAL_28MHz / 4)
149	149

src/mame/drivers/mediagx.c

r6740	r6741
113	113	static int dacl_ptr = 0;
114	114	static int dacr_ptr = 0;
115	115
116		static emu_timer *sound_timer;
117	116	static UINT8 ad1847_regs[16];
118	117	static UINT32 ad1847_sample_counter = 0;
119	118	static UINT32 ad1847_sample_rate;
r6740	r6741
635	634
636	635	/* Analog Devices AD1847 Stereo DAC */
637	636
638		static TIMER_CALLBACK( sound_timer_callback )
	637	static TIMER_DEVICE_CALLBACK( sound_timer_callback )
639	638	{
640	639	ad1847_sample_counter = 0;
641		timer_adjust_oneshot(sound_timer, ATTOTIME_IN_MSEC(10), 0);
	640	timer_device_adjust_oneshot(timer, ATTOTIME_IN_MSEC(10), 0);
642	641
643	642	dmadac_transfer(&dmadac[0], 1, 0, 1, dacl_ptr, dacl);
644	643	dmadac_transfer(&dmadac[1], 1, 0, 1, dacr_ptr, dacr);
r6740	r6741
965	964	mediagx_devices.pic8259_2 = devtag_get_device( machine, "pic8259_slave" );
966	965	mediagx_devices.dma8237_1 = devtag_get_device( machine, "dma8237_1" );
967	966	mediagx_devices.dma8237_2 = devtag_get_device( machine, "dma8237_2" );
	967
	968	dacl = auto_alloc_array(machine, INT16, 65536);
	969	dacr = auto_alloc_array(machine, INT16, 65536);
968	970	}
969	971
970	972	static MACHINE_RESET(mediagx)
r6740	r6741
976	978	memcpy(bios_ram, rom, 0x40000);
977	979	device_reset(cputag_get_cpu(machine, "maincpu"));
978	980
979		dacl = auto_alloc_array(machine, INT16, 65536);
980		dacr = auto_alloc_array(machine, INT16, 65536);
	981	timer_device_adjust_oneshot(devtag_get_device(machine, "sound_timer"), ATTOTIME_IN_MSEC(10), 0);
981	982
982		sound_timer = timer_alloc(machine, sound_timer_callback, NULL);
983		timer_adjust_oneshot(sound_timer, ATTOTIME_IN_MSEC(10), 0);
984
985	983	dmadac[0] = devtag_get_device(machine, "dac1");
986	984	dmadac[1] = devtag_get_device(machine, "dac2");
987	985	dmadac_enable(&dmadac[0], 2, 1);
r6740	r6741
1070	1068
1071	1069	MDRV_IDE_CONTROLLER_ADD("ide", ide_interrupt)
1072	1070
	1071	MDRV_TIMER_ADD("sound_timer", sound_timer_callback)
	1072
1073	1073	MDRV_NVRAM_HANDLER( mc146818 )
1074	1074
1075	1075	/* video hardware */

src/mame/drivers/ambush.c

r6740	r6741
36	36	#include "driver.h"
37	37	#include "cpu/z80/z80.h"
38	38	#include "sound/ay8910.h"
39		#include "ambush.h"
	39	#include "includes/ambush.h"
40	40
41	41
42	42	/*************************************

src/mame/drivers/orbit.c

r6740	r6741
19	19
20	20	#include "driver.h"
21	21	#include "cpu/m6800/m6800.h"
22		#include "orbit.h"
	22	#include "includes/orbit.h"
23	23	#include "sound/discrete.h"
24	24
25	25

src/mame/drivers/policetr.c

r6740	r6741
86	86	#include "driver.h"
87	87	#include "cpu/mips/r3000.h"
88	88	#include "machine/eeprom.h"
89		#include "policetr.h"
	89	#include "includes/policetr.h"
90	90	#include "sound/bsmt2000.h"
91	91
92	92

src/mame/drivers/carpolo.c

r6740	r6741
18	18
19	19	#include "driver.h"
20	20	#include "cpu/m6502/m6502.h"
	21	#include "machine/7474.h"
	22	#include "machine/74148.h"
	23	#include "machine/74153.h"
21	24	#include "machine/6821pia.h"
22		#include "carpolo.h"
	25	#include "includes/carpolo.h"
23	26
24	27
25	28
r6740	r6741
241	244	MDRV_PIA6821_ADD("pia0", carpolo_pia0_intf)
242	245	MDRV_PIA6821_ADD("pia1", carpolo_pia1_intf)
243	246
	247	MDRV_7474_ADD("7474_2s_1", carpolo_7474_2s_1_cb)
	248	MDRV_7474_ADD("7474_2s_2", carpolo_7474_2s_2_cb)
	249	MDRV_7474_ADD("7474_2u_1", carpolo_7474_2u_1_cb)
	250	MDRV_7474_ADD("7474_2u_2", carpolo_7474_2u_2_cb)
	251	MDRV_7474_ADD("7474_1f_1", NULL)
	252	MDRV_7474_ADD("7474_1f_2", NULL)
	253	MDRV_7474_ADD("7474_1d_1", NULL)
	254	MDRV_7474_ADD("7474_1d_2", NULL)
	255	MDRV_7474_ADD("7474_1c_1", NULL)
	256	MDRV_7474_ADD("7474_1c_2", NULL)
	257	MDRV_7474_ADD("7474_1a_1", NULL)
	258	MDRV_7474_ADD("7474_1a_2", NULL)
	259
	260	MDRV_74148_ADD("74148_3s", carpolo_74148_3s_cb)
	261	MDRV_74153_ADD("74153_1k", NULL)
	262
244	263	/* video hardware */
245	264	MDRV_SCREEN_ADD("screen", RASTER)
246	265	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/speedatk.c

r6740	r6741
79	79	#include "sound/ay8910.h"
80	80	#include "video/mc6845.h"
81	81
	82	extern UINT8 *speedatk_videoram;
	83	extern UINT8 *speedatk_colorram;
82	84	static UINT8 mux_data;
83	85	static UINT8 km_status,coin_settings;
84	86
r6740	r6741
189	191	AM_RANGE(0x8000, 0x8000) AM_READWRITE(key_matrix_r,key_matrix_w)
190	192	AM_RANGE(0x8001, 0x8001) AM_READWRITE(key_matrix_status_r,key_matrix_status_w)
191	193	AM_RANGE(0x8800, 0x8fff) AM_RAM
192		AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(speedatk_videoram_w) AM_BASE_GENERIC(videoram)
193		AM_RANGE(0xb000, 0xb3ff) AM_RAM_WRITE(speedatk_colorram_w) AM_BASE_GENERIC(colorram)
	194	AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(speedatk_videoram_w) AM_BASE(&speedatk_videoram)
	195	AM_RANGE(0xb000, 0xb3ff) AM_RAM_WRITE(speedatk_colorram_w) AM_BASE(&speedatk_colorram)
194	196	ADDRESS_MAP_END
195	197
196	198	static ADDRESS_MAP_START( speedatk_io, ADDRESS_SPACE_IO, 8 )

src/mame/drivers/vroulet.c

r6740	r6741
42	42	/* video */
43	43
44	44	static UINT8 *vroulet_ball;
	45	static UINT8 *videoram;
	46	static UINT8 *colorram;
45	47	static tilemap *bg_tilemap;
46	48
47	49	static WRITE8_HANDLER(vroulet_paletteram_w)
r6740	r6741
66	68
67	69	static WRITE8_HANDLER( vroulet_videoram_w )
68	70	{
69		space->machine->generic.videoram.u8[offset] = data;
	71	videoram[offset] = data;
70	72	tilemap_mark_tile_dirty(bg_tilemap, offset);
71	73	}
72	74
73	75	static WRITE8_HANDLER( vroulet_colorram_w )
74	76	{
75		space->machine->generic.colorram.u8[offset] = data;
	77	colorram[offset] = data;
76	78	tilemap_mark_tile_dirty(bg_tilemap, offset);
77	79	}
78	80
79	81	static TILE_GET_INFO( get_bg_tile_info )
80	82	{
81		int attr = machine->generic.colorram.u8[tile_index];
82		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0xc0) << 2);
	83	int attr = colorram[tile_index];
	84	int code = videoram[tile_index] + ((attr & 0xc0) << 2);
83	85	int color = attr & 0x1f;
84	86
85	87	SET_TILE_INFO(0, code, color, 0);
r6740	r6741
105	107	AM_RANGE(0x0000, 0x5fff) AM_ROM
106	108	AM_RANGE(0x6000, 0x67ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
107	109	AM_RANGE(0x8000, 0x8000) AM_NOP
108		AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(vroulet_videoram_w) AM_BASE_GENERIC(videoram)
109		AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(vroulet_colorram_w) AM_BASE_GENERIC(colorram)
	110	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(vroulet_videoram_w) AM_BASE(&videoram)
	111	AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(vroulet_colorram_w) AM_BASE(&colorram)
110	112	AM_RANGE(0xa000, 0xa001) AM_RAM AM_BASE(&vroulet_ball)
111	113	AM_RANGE(0xb000, 0xb0ff) AM_WRITE(vroulet_paletteram_w) AM_BASE_GENERIC(paletteram)
112	114	AM_RANGE(0xc000, 0xc000) AM_NOP

src/mame/drivers/exedexes.c

r6740	r6741
14	14	#include "deprecat.h"
15	15	#include "sound/ay8910.h"
16	16	#include "sound/sn76496.h"
17		#include "exedexes.h"
	17	#include "includes/exedexes.h"
18	18
19	19
20	20	static INTERRUPT_GEN( exedexes_interrupt )

src/mame/drivers/jedi.c

r6740	r6741
112	112
113	113	#include "driver.h"
114	114	#include "cpu/m6502/m6502.h"
115		#include "jedi.h"
	115	#include "includes/jedi.h"
116	116
117	117
118	118

src/mame/drivers/seta2.c

r6740	r6741
533	533	#include "cpu/m68000/m68000.h"
534	534	#include "machine/tmp68301.h"
535	535	#include "cpu/h83002/h8.h"
536		#include "machine/eeprom.h"
	536	#include "machine/eepromdev.h"
537	537	#include "sound/x1_010.h"
538		#include "seta.h"
	538	#include "includes/seta.h"
539	539
540	540	/***************************************************************************
541	541
r6740	r6741
600	600	Mobile Suit Gundam EX Revue
601	601	***************************************************************************/
602	602
603		static NVRAM_HANDLER(93C46_gundamex)
	603	static READ16_DEVICE_HANDLER( gundamex_eeprom_r )
604	604	{
605		if (read_or_write)
606		{
607		eeprom_save(file);
608		}
609		else
610		{
611		eeprom_init(machine, &eeprom_interface_93C46);
612		if (file)
613		{
614		eeprom_load(file);
615		}
616		else
617		{
618		UINT32 length, size;
619		UINT16 *dat;
620
621		dat = (UINT16 *)eeprom_get_data_pointer(&length, &size);
622		dat[0] = 0x7008;
623		}
624		}
	605	return ((eepromdev_read_bit(device) & 1)) << 3;
625	606	}
626	607
627		static READ16_HANDLER( gundamex_eeprom_r )
	608	static WRITE16_DEVICE_HANDLER( gundamex_eeprom_w )
628	609	{
629		return ((eeprom_read_bit() & 1)) << 3;
	610	eepromdev_set_clock_line(device, (data & 0x2) ? ASSERT_LINE : CLEAR_LINE);
	611	eepromdev_write_bit(device, data & 0x1);
	612	eepromdev_set_cs_line(device, (data & 0x4) ? CLEAR_LINE : ASSERT_LINE);
630	613	}
631	614
632		static WRITE16_HANDLER( gundamex_eeprom_w )
633		{
634		eeprom_set_clock_line((data & 0x2) ? ASSERT_LINE : CLEAR_LINE);
635		eeprom_write_bit(data & 0x1);
636		eeprom_set_cs_line((data & 0x4) ? CLEAR_LINE : ASSERT_LINE);
637		}
638
639	615	static ADDRESS_MAP_START( gundamex_map, ADDRESS_SPACE_PROGRAM, 16 )
640	616	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM
641	617	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
r6740	r6741
655	631	AM_RANGE(0xc50000, 0xc5ffff) AM_RAM                        // cleared
656	632	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs)   // Video Registers
657	633	AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
658		AM_RANGE(0xfffd0a, 0xfffd0b) AM_READWRITE(gundamex_eeprom_r,gundamex_eeprom_w)   // parallel data register
	634	AM_RANGE(0xfffd0a, 0xfffd0b) AM_DEVREADWRITE("eeprom", gundamex_eeprom_r,gundamex_eeprom_w)   // parallel data register
659	635	AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)   // TMP68301 Registers
660	636	ADDRESS_MAP_END
661	637
r6740	r6741
2298	2274	MDRV_CPU_PROGRAM_MAP(mj4simai_map)
2299	2275	MDRV_CPU_VBLANK_INT("screen", seta2_interrupt)
2300	2276
	2277	MDRV_MACHINE_START( tmp68301 )
2301	2278	MDRV_MACHINE_RESET( tmp68301 )
2302	2279
2303	2280	/* video hardware */
r6740	r6741
2331	2308	MDRV_CPU_MODIFY("maincpu")
2332	2309	MDRV_CPU_PROGRAM_MAP(gundamex_map)
2333	2310
2334		MDRV_NVRAM_HANDLER(93C46_gundamex)
	2311	MDRV_EEPROM_93C46_NODEFAULT_ADD("eeprom")
2335	2312
2336	2313	/* video hardware */
2337	2314	MDRV_SCREEN_MODIFY("screen")
r6740	r6741
2533	2510	ROM_REGION( 0x300000, "x1snd", 0 )   /* Samples */
2534	2511	/* Leave 1MB empty (addressable by the chip) */
2535	2512	ROM_LOAD( "ka001015.u28", 0x100000, 0x200000, CRC(ada2843b) SHA1(09d06026031bc7558da511c3c0e29187ea0a0099) )
	2513
	2514	ROM_REGION16_BE( 0x80, "eeprom", 0 )
	2515	ROM_LOAD( "eeprom.bin", 0x0000, 0x0080, CRC(80f8e248) SHA1(1a9787811e56d95f7acbedfb00225b6e7df265eb) )
2536	2516	ROM_END
2537	2517
2538	2518	ROM_START( grdians )

src/mame/drivers/flkatck.c

r6740	r6741
1	1	/***************************************************************************
2	2
3		Flak Attack/MX5000 (Konami GX669)
	3	Flak Attack / MX5000 (Konami GX669)
4	4
5		Driver by:
6		Manuel Abadia <manu@teleline.es>
	5	Driver by:
	6	Manuel Abadia <manu@teleline.es>
7	7
8		TO DO:
9		-What does 0x900X do? (Z80)
	8	TO DO:
	9	-What does 0x900X do? (Z80)
10	10
11	11	***************************************************************************/
12	12
r6740	r6741
15	15	#include "cpu/hd6309/hd6309.h"
16	16	#include "sound/2151intf.h"
17	17	#include "sound/k007232.h"
18		#include "konamipt.h"
	18	#include "video/konicdev.h"
	19	#include "includes/konamipt.h"
	20	#include "includes/flkatck.h"
19	21
20		/* from video/flkatck.c */
21		VIDEO_START( flkatck );
22		VIDEO_UPDATE( flkatck );
23		WRITE8_HANDLER( flkatck_k007121_w );
24		WRITE8_HANDLER( flkatck_k007121_regs_w );
25	22
26		extern UINT8 *k007121_ram;
27		extern int flkatck_irq_enabled;
28
29		static int multiply_reg[2];
30
31		/***************************************************************************/
32
33		static MACHINE_RESET( flkatck )
	23	static INTERRUPT_GEN( flkatck_interrupt )
34	24	{
35		k007232_set_bank( devtag_get_device(machine, "konami"), 0, 1 );
36		}
	25	flkatck_state *state = (flkatck_state *)device->machine->driver_data;
37	26
38		static INTERRUPT_GEN( flkatck_interrupt )
39		{
40		if (flkatck_irq_enabled)
	27	if (state->irq_enabled)
41	28	cpu_set_input_line(device, HD6309_IRQ_LINE, HOLD_LINE);
42	29	}
43	30
44	31	static WRITE8_HANDLER( flkatck_bankswitch_w )
45	32	{
46		UINT8 *RAM = memory_region(space->machine, "maincpu");
47		int bankaddress = 0;
48
49	33	/* bits 3-4: coin counters */
50		coin_counter_w(space->machine, 0,data & 0x08);
51		coin_counter_w(space->machine, 1,data & 0x10);
	34	coin_counter_w(space->machine, 0, data & 0x08);
	35	coin_counter_w(space->machine, 1, data & 0x10);
52	36
53	37	/* bits 0-1: bank # */
54		bankaddress += 0x10000 + (data & 0x03)*0x2000;
55	38	if ((data & 0x03) != 0x03)   /* for safety */
56		memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
	39	memory_set_bank(space->machine, "bank1", data & 0x03);
57	40	}
58	41
59	42	static READ8_HANDLER( flkatck_ls138_r )
60	43	{
61	44	int data = 0;
62	45
63		switch ((offset & 0x1c) >> 2){
	46	switch ((offset & 0x1c) >> 2)
	47	{
64	48	case 0x00:
65	49	if (offset & 0x02)
66	50	data = input_port_read(space->machine, (offset & 0x01) ? "COIN" : "DSW3");
r6740	r6741
78	62
79	63	static WRITE8_HANDLER( flkatck_ls138_w )
80	64	{
81		switch ((offset & 0x1c) >> 2){
	65	flkatck_state *state = (flkatck_state *)space->machine->driver_data;
	66
	67	switch ((offset & 0x1c) >> 2)
	68	{
82	69	case 0x04:   /* bankswitch */
83	70	flkatck_bankswitch_w(space, 0, data);
84	71	break;
r6740	r6741
86	73	soundlatch_w(space, 0, data);
87	74	break;
88	75	case 0x06:   /* Cause interrupt on audio CPU */
89		cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
	76	cpu_set_input_line(state->audiocpu, 0, HOLD_LINE);
90	77	break;
91	78	case 0x07:   /* watchdog reset */
92	79	watchdog_reset_w(space, 0, data);
r6740	r6741
97	84	/* Protection - an external multiplyer connected to the sound CPU */
98	85	static READ8_HANDLER( multiply_r )
99	86	{
100		return (multiply_reg[0] * multiply_reg[1]) & 0xFF;
	87	flkatck_state *state = (flkatck_state *)space->machine->driver_data;
	88	return (state->multiply_reg[0] * state->multiply_reg[1]) & 0xff;
101	89	}
102	90
103	91	static WRITE8_HANDLER( multiply_w )
104	92	{
105		multiply_reg[offset] = data;
	93	flkatck_state *state = (flkatck_state *)space->machine->driver_data;
	94	state->multiply_reg[offset] = data;
106	95	}
107	96
108	97
r6740	r6741
112	101	AM_RANGE(0x0400, 0x041f) AM_READWRITE(flkatck_ls138_r, flkatck_ls138_w)                     /* inputs, DIPS, bankswitch, counters, sound command */
113	102	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_le_w) AM_BASE_GENERIC(paletteram)   /* palette */
114	103	AM_RANGE(0x1000, 0x1fff) AM_RAM                                                   /* RAM */
115		AM_RANGE(0x2000, 0x3fff) AM_RAM_WRITE(flkatck_k007121_w) AM_BASE(&k007121_ram)               /* Video RAM (007121) */
	104	AM_RANGE(0x2000, 0x3fff) AM_RAM_WRITE(flkatck_k007121_w) AM_BASE_MEMBER(flkatck_state, k007121_ram)               /* Video RAM (007121) */
116	105	AM_RANGE(0x4000, 0x5fff) AM_ROMBANK("bank1")                                             /* banked ROM */
117	106	AM_RANGE(0x6000, 0xffff) AM_ROM                                                   /* ROM */
118	107	ADDRESS_MAP_END
r6740	r6741
196	185
197	186	static void volume_callback0(const device_config *device, int v)
198	187	{
199		k007232_set_volume(device,0,(v >> 4) * 0x11,0);
200		k007232_set_volume(device,1,0,(v & 0x0f) * 0x11);
	188	k007232_set_volume(device, 0, (v >> 4) * 0x11, 0);
	189	k007232_set_volume(device, 1, 0, (v & 0x0f) * 0x11);
201	190	}
202	191
203	192	static const k007232_interface k007232_config =
r6740	r6741
206	195	};
207	196
208	197
	198	static MACHINE_START( flkatck )
	199	{
	200	flkatck_state *state = (flkatck_state *)machine->driver_data;
	201	UINT8 *ROM = memory_region(machine, "maincpu");
	202
	203	memory_configure_bank(machine, "bank1", 0, 3, &ROM[0x10000], 0x2000);
	204
	205	state->audiocpu = devtag_get_device(machine, "audiocpu");
	206	state->k007121 = devtag_get_device(machine, "k007121");
	207
	208	state_save_register_global(machine, state->irq_enabled);
	209	state_save_register_global_array(machine, state->multiply_reg);
	210	state_save_register_global(machine, state->flipscreen);
	211	}
	212
	213	static MACHINE_RESET( flkatck )
	214	{
	215	flkatck_state *state = (flkatck_state *)machine->driver_data;
	216
	217	k007232_set_bank(devtag_get_device(machine, "konami"), 0, 1);
	218
	219	state->irq_enabled = 0;
	220	state->multiply_reg[0] = 0;
	221	state->multiply_reg[1] = 0;
	222	state->flipscreen = 0;
	223	}
	224
209	225	static MACHINE_DRIVER_START( flkatck )
210	226
	227	/* driver data */
	228	MDRV_DRIVER_DATA(flkatck_state)
	229
211	230	/* basic machine hardware */
212	231	MDRV_CPU_ADD("maincpu", HD6309,3000000*4) /* HD63C09EP, 24/8 MHz */
213	232	MDRV_CPU_PROGRAM_MAP(flkatck_map)
r6740	r6741
218	237
219	238	MDRV_QUANTUM_TIME(HZ(600))
220	239
	240	MDRV_MACHINE_START(flkatck)
221	241	MDRV_MACHINE_RESET(flkatck)
222	242
223	243	/* video hardware */
r6740	r6741
234	254	MDRV_VIDEO_START(flkatck)
235	255	MDRV_VIDEO_UPDATE(flkatck)
236	256
	257	MDRV_K007121_ADD("k007121")
	258
237	259	/* sound hardware */
238	260	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
239	261
r6740	r6741
283	305
284	306
285	307
286		GAME( 1987, mx5000,  0,     flkatck, flkatck, 0, ROT90, "Konami", "MX5000", 0 )
287		GAME( 1987, flkatck, mx5000, flkatck, flkatck, 0, ROT90, "Konami", "Flak Attack (Japan)", 0 )
	308	GAME( 1987, mx5000,  0,     flkatck, flkatck, 0, ROT90, "Konami", "MX5000", GAME_SUPPORTS_SAVE )
	309	GAME( 1987, flkatck, mx5000, flkatck, flkatck, 0, ROT90, "Konami", "Flak Attack (Japan)", GAME_SUPPORTS_SAVE )

src/mame/drivers/contra.c

r6740	r6741
19	19	#include "driver.h"
20	20	#include "cpu/m6809/m6809.h"
21	21	#include "sound/2151intf.h"
22		#include "konamipt.h"
	22	#include "video/konicdev.h"
	23	#include "includes/konamipt.h"
	24	#include "includes/contra.h"
23	25
24		extern UINT8 *contra_fg_vram,*contra_fg_cram;
25		extern UINT8 *contra_bg_vram,*contra_bg_cram;
26		extern UINT8 *contra_text_vram,*contra_text_cram;
27	26
28		PALETTE_INIT( contra );
29
30		WRITE8_HANDLER( contra_fg_vram_w );
31		WRITE8_HANDLER( contra_fg_cram_w );
32		WRITE8_HANDLER( contra_bg_vram_w );
33		WRITE8_HANDLER( contra_bg_cram_w );
34		WRITE8_HANDLER( contra_text_vram_w );
35		WRITE8_HANDLER( contra_text_cram_w );
36
37		WRITE8_HANDLER( contra_K007121_ctrl_0_w );
38		WRITE8_HANDLER( contra_K007121_ctrl_1_w );
39		VIDEO_UPDATE( contra );
40		VIDEO_START( contra );
41
42
43	27	static WRITE8_HANDLER( contra_bankswitch_w )
44	28	{
45		UINT32 bankaddress;
46		UINT8 *RAM = memory_region(space->machine, "maincpu");
47
48
49		bankaddress = 0x10000 + (data & 0x0f) * 0x2000;
50		if (bankaddress < 0x28000)   /* for safety */
51		memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
	29	if ((data & 0x0f) < 12)   /* for safety */
	30	memory_set_bank(space->machine, "bank1", data & 0x0f);
52	31	}
53	32
54	33	static WRITE8_HANDLER( contra_sh_irqtrigger_w )
55	34	{
56		cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
	35	contra_state *state = (contra_state *)space->machine->driver_data;
	36	cpu_set_input_line(state->audiocpu, M6809_IRQ_LINE, HOLD_LINE);
57	37	}
58	38
59	39	static WRITE8_HANDLER( contra_coin_counter_w )
60	40	{
61		if (data & 0x01) coin_counter_w(space->machine, 0,data & 0x01);
62		if (data & 0x02) coin_counter_w(space->machine, 1,(data & 0x02) >> 1);
	41	if (data & 0x01)
	42	coin_counter_w(space->machine, 0, data & 0x01);
	43
	44	if (data & 0x02)
	45	coin_counter_w(space->machine, 1, (data & 0x02) >> 1);
63	46	}
64	47
65	48	static WRITE8_HANDLER( cpu_sound_command_w )
66	49	{
67		soundlatch_w(space,offset,data);
	50	soundlatch_w(space, offset, data);
68	51	}
69	52
70	53
r6740	r6741
85	68	AM_RANGE(0x001e, 0x001e) AM_WRITENOP   /* ? */
86	69	AM_RANGE(0x0060, 0x0067) AM_WRITE(contra_K007121_ctrl_1_w)
87	70
88		AM_RANGE(0x0c00, 0x0cff) AM_RAM AM_BASE_GENERIC(paletteram)
	71	AM_RANGE(0x0c00, 0x0cff) AM_RAM AM_BASE_MEMBER(contra_state, paletteram)
89	72
90	73	AM_RANGE(0x1000, 0x1fff) AM_RAM
91	74
92	75	AM_RANGE(0x2000, 0x5fff) AM_READONLY
93		AM_RANGE(0x2000, 0x23ff) AM_WRITE(contra_fg_cram_w) AM_BASE(&contra_fg_cram)
94		AM_RANGE(0x2400, 0x27ff) AM_WRITE(contra_fg_vram_w) AM_BASE(&contra_fg_vram)
95		AM_RANGE(0x2800, 0x2bff) AM_WRITE(contra_text_cram_w) AM_BASE(&contra_text_cram)
96		AM_RANGE(0x2c00, 0x2fff) AM_WRITE(contra_text_vram_w) AM_BASE(&contra_text_vram)
	76	AM_RANGE(0x2000, 0x23ff) AM_WRITE(contra_fg_cram_w) AM_BASE_MEMBER(contra_state, fg_cram)
	77	AM_RANGE(0x2400, 0x27ff) AM_WRITE(contra_fg_vram_w) AM_BASE_MEMBER(contra_state, fg_vram)
	78	AM_RANGE(0x2800, 0x2bff) AM_WRITE(contra_text_cram_w) AM_BASE_MEMBER(contra_state, tx_cram)
	79	AM_RANGE(0x2c00, 0x2fff) AM_WRITE(contra_text_vram_w) AM_BASE_MEMBER(contra_state, tx_vram)
97	80	AM_RANGE(0x3000, 0x37ff) AM_WRITEONLY AM_BASE_GENERIC(spriteram)/* 2nd bank is at 0x5000 */
98	81	AM_RANGE(0x3800, 0x3fff) AM_WRITEONLY // second sprite buffer
99		AM_RANGE(0x4000, 0x43ff) AM_WRITE(contra_bg_cram_w) AM_BASE(&contra_bg_cram)
100		AM_RANGE(0x4400, 0x47ff) AM_WRITE(contra_bg_vram_w) AM_BASE(&contra_bg_vram)
	82	AM_RANGE(0x4000, 0x43ff) AM_WRITE(contra_bg_cram_w) AM_BASE_MEMBER(contra_state, bg_cram)
	83	AM_RANGE(0x4400, 0x47ff) AM_WRITE(contra_bg_vram_w) AM_BASE_MEMBER(contra_state, bg_vram)
101	84	AM_RANGE(0x4800, 0x5fff) AM_WRITEONLY
102	85
103	86	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
r6740	r6741
186	169
187	170
188	171
	172	static MACHINE_START( contra )
	173	{
	174	contra_state *state = (contra_state *)machine->driver_data;
	175	UINT8 *ROM = memory_region(machine, "maincpu");
	176
	177	memory_configure_bank(machine, "bank1", 0, 12, &ROM[0x10000], 0x2000);
	178
	179	state->audiocpu = devtag_get_device(machine, "audiocpu");
	180	state->k007121_1 = devtag_get_device(machine, "k007121_1");
	181	state->k007121_2 = devtag_get_device(machine, "k007121_2");
	182	}
	183
189	184	static MACHINE_DRIVER_START( contra )
190	185
	186	/* driver data */
	187	MDRV_DRIVER_DATA(contra_state)
	188
191	189	/* basic machine hardware */
192	190	MDRV_CPU_ADD("maincpu", M6809, XTAL_24MHz/16) /* 1500000? */
193	191	MDRV_CPU_PROGRAM_MAP(contra_map)
r6740	r6741
198	196
199	197	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
200	198
	199	MDRV_MACHINE_START(contra)
	200
201	201	/* video hardware */
202	202	MDRV_SCREEN_ADD("screen", RASTER)
203	203	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
213	213	MDRV_VIDEO_START(contra)
214	214	MDRV_VIDEO_UPDATE(contra)
215	215
	216	MDRV_K007121_ADD("k007121_1")
	217	MDRV_K007121_ADD("k007121_2")
	218
216	219	/* sound hardware */
217	220	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
218	221
r6740	r6741
246	249	ROM_LOAD( "633f11.20g",   0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) )   /* 007121 #1 char lookup table */
247	250
248	251	ROM_REGION( 0x0001, "pals", 0 )
249		ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
	252	ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
250	253	ROM_END
251	254
252	255	ROM_START( contra1 )
r6740	r6741
273	276	ROM_LOAD( "633f11.20g",   0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) )   /* 007121 #1 char lookup table */
274	277
275	278	ROM_REGION( 0x0001, "pals", 0 )
276		ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
	279	ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
277	280	ROM_END
278	281
279	282	ROM_START( contrab )
r6740	r6741
339	342	ROM_LOAD( "633f11.20g",   0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) )   /* 007121 #1 char lookup table */
340	343
341	344	ROM_REGION( 0x0001, "pals", 0 )
342		ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
	345	ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
343	346	ROM_END
344	347
345	348	ROM_START( contrajb )
r6740	r6741
405	408	ROM_LOAD( "633f11.20g",   0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) )   /* 007121 #1 char lookup table */
406	409
407	410	ROM_REGION( 0x0001, "pals", 0 )
408		ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
	411	ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
409	412	ROM_END
410	413
411	414	ROM_START( gryzora )
r6740	r6741
432	435	ROM_LOAD( "633f11.20g",   0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) )   /* 007121 #1 char lookup table */
433	436
434	437	ROM_REGION( 0x0001, "pals", 0 )
435		ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
	438	ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
436	439	ROM_END
437	440
438	441
439	442
440		GAME( 1987, contra,   0,      contra, contra, 0, ROT90, "Konami", "Contra (US, Set 1)", 0 )
441		GAME( 1987, contra1,  contra, contra, contra, 0, ROT90, "Konami", "Contra (US, Set 2)", 0 )
442		GAME( 1987, contrab,  contra, contra, contra, 0, ROT90, "bootleg", "Contra (bootleg)", 0 )
443		GAME( 1987, contraj,  contra, contra, contra, 0, ROT90, "Konami", "Contra (Japan)", 0 )
444		GAME( 1987, contrajb, contra, contra, contra, 0, ROT90, "bootleg", "Contra (Japan bootleg)", 0 )
445		GAME( 1987, gryzor,   contra, contra, contra, 0, ROT90, "Konami", "Gryzor (Set 1)", 0 )
446		GAME( 1987, gryzora,  contra, contra, contra, 0, ROT90, "Konami", "Gryzor (Set 2)", 0 )
	443	GAME( 1987, contra,   0,      contra, contra, 0, ROT90, "Konami", "Contra (US, Set 1)", GAME_SUPPORTS_SAVE )
	444	GAME( 1987, contra1,  contra, contra, contra, 0, ROT90, "Konami", "Contra (US, Set 2)", GAME_SUPPORTS_SAVE )
	445	GAME( 1987, contrab,  contra, contra, contra, 0, ROT90, "bootleg", "Contra (bootleg)", GAME_SUPPORTS_SAVE )
	446	GAME( 1987, contraj,  contra, contra, contra, 0, ROT90, "Konami", "Contra (Japan)", GAME_SUPPORTS_SAVE )
	447	GAME( 1987, contrajb, contra, contra, contra, 0, ROT90, "bootleg", "Contra (Japan bootleg)", GAME_SUPPORTS_SAVE )
	448	GAME( 1987, gryzor,   contra, contra, contra, 0, ROT90, "Konami", "Gryzor (Set 1)", GAME_SUPPORTS_SAVE )
	449	GAME( 1987, gryzora,  contra, contra, contra, 0, ROT90, "Konami", "Gryzor (Set 2)", GAME_SUPPORTS_SAVE )

src/mame/drivers/paradise.c

r6740	r6741
32	32	#include "driver.h"
33	33	#include "cpu/z80/z80.h"
34	34	#include "deprecat.h"
35		#include "paradise.h"
	35	#include "includes/paradise.h"
36	36	#include "sound/okim6295.h"
37	37
38	38	/***************************************************************************

src/mame/drivers/balsente.c

r6740	r6741
228	228	#include "cpu/z80/z80.h"
229	229	#include "cpu/m6809/m6809.h"
230	230	#include "cpu/m68000/m68000.h"
231		#include "balsente.h"
	231	#include "includes/balsente.h"
232	232	#include "sound/cem3394.h"
233	233
234	234	#include "stocker.lh"
r6740	r6741
300	300	/* CPU 1 read addresses */
301	301	static ADDRESS_MAP_START( shrike68k_map, ADDRESS_SPACE_PROGRAM, 16 )
302	302	AM_RANGE(0x000000, 0x003fff) AM_ROM
303		AM_RANGE(0x010000, 0x01001f) AM_RAM AM_BASE(&shrike_io)
304		AM_RANGE(0x018000, 0x018fff) AM_RAM AM_BASE(&shrike_shared)
	303	AM_RANGE(0x010000, 0x01001f) AM_RAM AM_BASE_MEMBER(balsente_state, shrike_io)
	304	AM_RANGE(0x018000, 0x018fff) AM_RAM AM_BASE_MEMBER(balsente_state, shrike_shared)
305	305	ADDRESS_MAP_END
306	306
307	307
r6740	r6741
1191	1191	*************************************/
1192	1192
1193	1193	static MACHINE_DRIVER_START( balsente )
	1194	MDRV_DRIVER_DATA(balsente_state)
1194	1195
1195	1196	/* basic machine hardware */
1196	1197	MDRV_CPU_ADD("maincpu", M6809, 5000000/4)
r6740	r6741
1203	1204
1204	1205	MDRV_QUANTUM_TIME(HZ(600))
1205	1206
	1207	MDRV_MACHINE_START(balsente)
1206	1208	MDRV_MACHINE_RESET(balsente)
1207	1209	MDRV_NVRAM_HANDLER(generic_0fill)
1208	1210
	1211	MDRV_TIMER_ADD("scan_timer", balsente_interrupt_timer)
	1212	MDRV_TIMER_ADD("8253_0_timer", balsente_clock_counter_0_ff)
	1213	MDRV_TIMER_ADD("8253_1_timer", balsente_counter_callback)
	1214	MDRV_TIMER_ADD("8253_2_timer", balsente_counter_callback)
	1215
1209	1216	/* video hardware */
1210	1217	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1211	1218
r6740	r6741
2047	2054	}
2048	2055	}
2049	2056
2050		static DRIVER_INIT( sentetst ) { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; /* noanalog */ }
2051		static DRIVER_INIT( cshift )   { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; /* noanalog */ }
2052		static DRIVER_INIT( gghost )   { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; balsente_adc_shift = 1; }
2053		static DRIVER_INIT( hattrick ) { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; /* noanalog */ }
2054		static DRIVER_INIT( otwalls )  { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; balsente_adc_shift = 0; }
2055		static DRIVER_INIT( snakepit ) { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; balsente_adc_shift = 1; }
2056		static DRIVER_INIT( snakjack ) { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; balsente_adc_shift = 1; }
2057		static DRIVER_INIT( stocker )  { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; balsente_adc_shift = 0; }
2058		static DRIVER_INIT( triviag1 ) { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; /* noanalog */ }
	2057	INLINE void config_shooter_adc(running_machine *machine, UINT8 shooter, UINT8 adc_shift)
	2058	{
	2059	balsente_state *state = (balsente_state *)machine->driver_data;
	2060	state->shooter = shooter;
	2061	state->adc_shift = adc_shift;
	2062	}
	2063
	2064	static DRIVER_INIT( sentetst ) { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
	2065	static DRIVER_INIT( cshift )   { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
	2066	static DRIVER_INIT( gghost )   { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 1); }
	2067	static DRIVER_INIT( hattrick ) { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
	2068	static DRIVER_INIT( otwalls )  { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0); }
	2069	static DRIVER_INIT( snakepit ) { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 1); }
	2070	static DRIVER_INIT( snakjack ) { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 1); }
	2071	static DRIVER_INIT( stocker )  { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0); }
	2072	static DRIVER_INIT( triviag1 ) { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
2059	2073	static DRIVER_INIT( triviag2 )
2060	2074	{
2061	2075	UINT8 *rom = memory_region(machine, "maincpu");
2062	2076	memcpy(&rom[0x20000], &rom[0x28000], 0x4000);
2063	2077	memcpy(&rom[0x24000], &rom[0x28000], 0x4000);
2064		expand_roms(machine, EXPAND_NONE); balsente_shooter = 0; /* noanalog */
	2078	expand_roms(machine, EXPAND_NONE); config_shooter_adc(machine, FALSE, 0 /* noanalog */);
2065	2079	}
2066		static DRIVER_INIT( triviaes )
2067		{
2068		expand_roms(machine, EXPAND_NONE | SWAP_HALVES); balsente_shooter = 0; /* noanalog */
2069		}
2070		static DRIVER_INIT( gimeabrk ) { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; balsente_adc_shift = 1; }
2071		static DRIVER_INIT( minigolf ) { expand_roms(machine, EXPAND_NONE); balsente_shooter = 0; balsente_adc_shift = 2; }
2072		static DRIVER_INIT( minigol2 ) { expand_roms(machine, 0x0c);        balsente_shooter = 0; balsente_adc_shift = 2; }
2073		static DRIVER_INIT( toggle )   { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; /* noanalog */ }
	2080	static DRIVER_INIT( triviaes ) { expand_roms(machine, EXPAND_NONE | SWAP_HALVES); config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
	2081	static DRIVER_INIT( gimeabrk ) { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 1); }
	2082	static DRIVER_INIT( minigolf ) { expand_roms(machine, EXPAND_NONE); config_shooter_adc(machine, FALSE, 2); }
	2083	static DRIVER_INIT( minigol2 ) { expand_roms(machine, 0x0c);        config_shooter_adc(machine, FALSE, 2); }
	2084	static DRIVER_INIT( toggle )   { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
2074	2085	static DRIVER_INIT( nametune )
2075	2086	{
2076	2087	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2077	2088	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2078		expand_roms(machine, EXPAND_NONE | SWAP_HALVES); balsente_shooter = 0; /* noanalog */
	2089	expand_roms(machine, EXPAND_NONE | SWAP_HALVES); config_shooter_adc(machine, FALSE, 0 /* noanalog */);
2079	2090	}
2080	2091	static DRIVER_INIT( nstocker )
2081	2092	{
2082	2093	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2083	2094	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2084		expand_roms(machine, EXPAND_NONE | SWAP_HALVES); balsente_shooter = 1; balsente_adc_shift = 1;
	2095	expand_roms(machine, EXPAND_NONE | SWAP_HALVES); config_shooter_adc(machine, TRUE, 1);
2085	2096	}
2086	2097	static DRIVER_INIT( sfootbal )
2087	2098	{
2088	2099	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2089	2100	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2090		expand_roms(machine, EXPAND_ALL  | SWAP_HALVES); balsente_shooter = 0; balsente_adc_shift = 0;
	2101	expand_roms(machine, EXPAND_ALL  | SWAP_HALVES); config_shooter_adc(machine, FALSE, 0);
2091	2102	}
2092	2103	static DRIVER_INIT( spiker )
2093	2104	{
2094	2105	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2095	2106	memory_install_readwrite8_handler(space, 0x9f80, 0x9f8f, 0, 0, spiker_expand_r, spiker_expand_w);
2096	2107	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2097		expand_roms(machine, EXPAND_ALL  | SWAP_HALVES); balsente_shooter = 0; balsente_adc_shift = 1;
	2108	expand_roms(machine, EXPAND_ALL  | SWAP_HALVES); config_shooter_adc(machine, FALSE, 1);
2098	2109	}
2099	2110	static DRIVER_INIT( stompin )
2100	2111	{
2101	2112	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2102	2113	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2103		expand_roms(machine, 0x0c | SWAP_HALVES); balsente_shooter = 0; balsente_adc_shift = 32;
	2114	expand_roms(machine, 0x0c | SWAP_HALVES); config_shooter_adc(machine, FALSE, 32);
2104	2115	}
2105		static DRIVER_INIT( rescraid ) { expand_roms(machine, EXPAND_NONE); balsente_shooter = 0; /* noanalog */ }
	2116	static DRIVER_INIT( rescraid ) { expand_roms(machine, EXPAND_NONE); config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
2106	2117	static DRIVER_INIT( grudge )
2107	2118	{
2108	2119	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2109	2120	memory_install_read8_handler(space, 0x9400, 0x9400, 0, 0, grudge_steering_r);
2110		expand_roms(machine, EXPAND_NONE); balsente_shooter = 0;
	2121	expand_roms(machine, EXPAND_NONE); config_shooter_adc(machine, FALSE, 0);
2111	2122	}
2112	2123	static DRIVER_INIT( shrike )
2113	2124	{
r6740	r6741
2116	2127	memory_install_write8_handler(space, 0x9e01, 0x9e01, 0, 0, shrike_sprite_select_w );
2117	2128	memory_install_readwrite16_handler(cputag_get_address_space(machine, "68k", ADDRESS_SPACE_PROGRAM), 0x10000, 0x1001f, 0, 0, shrike_io_68k_r, shrike_io_68k_w);
2118	2129
2119		expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; balsente_adc_shift = 32;
	2130	expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 32);
2120	2131	}
2121	2132
2122	2133

src/mame/drivers/galpani3.c

r6740	r6741
68	68	#include "deprecat.h"
69	69	#include "sound/ymz280b.h"
70	70	#include "includes/suprnova.h"
71		#include "kaneko16.h"
	71	#include "includes/kaneko16.h"
72	72
73	73	/***************************************************************************
74	74

src/mame/drivers/vertigo.c

r6740	r6741
13	13	#include "cpu/m6805/m6805.h"
14	14	#include "cpu/m68000/m68000.h"
15	15	#include "video/vector.h"
16		#include "vertigo.h"
17		#include "exidy440.h"
	16	#include "includes/vertigo.h"
	17	#include "includes/exidy440.h"
	18	#include "machine/74148.h"
18	19	#include "machine/pit8253.h"
19	20
20	21
r6740	r6741
114	115
115	116	MDRV_PIT8254_ADD( "pit8254", vertigo_pit8254_config )
116	117
	118	MDRV_74148_ADD( "74148", vertigo_update_irq )
	119
117	120	/* motor controller */
118	121	/*
119	122	MDRV_CPU_ADD("motor", M6805, 1000000)
120	123	MDRV_CPU_PROGRAM_MAP(vertigo_motor)
121	124	*/
	125	MDRV_MACHINE_START(vertigo)
122	126	MDRV_MACHINE_RESET(vertigo)
123	127	MDRV_NVRAM_HANDLER(generic_0fill)
124	128

src/mame/drivers/deco32.c

r6740	r6741
229	229	#include "cpu/arm/arm.h"
230	230	#include "cpu/h6280/h6280.h"
231	231	#include "cpu/m6809/m6809.h"
232		#include "decocrpt.h"
233		#include "decoprot.h"
	232	#include "includes/decocrpt.h"
	233	#include "includes/decoprot.h"
234	234	#include "machine/eeprom.h"
235		#include "deco32.h"
	235	#include "includes/deco32.h"
236	236	#include "sound/2151intf.h"
237	237	#include "sound/okim6295.h"
238	238	#include "sound/bsmt2000.h"
239	239
240	240	static UINT32 *deco32_ram;
241	241	static int raster_enable;
242		static emu_timer *raster_irq_timer;
	242	static const device_config *raster_irq_timer;
243	243	static UINT8 nslasher_sound_irq;
244	244
245	245	/**********************************************************************************/
246	246
247		static TIMER_CALLBACK( interrupt_gen )
	247	static TIMER_DEVICE_CALLBACK( interrupt_gen )
248	248	{
249	249	/* Save state of scroll registers before the IRQ */
250		deco32_raster_display_list[deco32_raster_display_position++]=video_screen_get_vpos(machine->primary_screen);
	250	deco32_raster_display_list[deco32_raster_display_position++]=video_screen_get_vpos(timer->machine->primary_screen);
251	251	deco32_raster_display_list[deco32_raster_display_position++]=deco32_pf12_control[1]&0xffff;
252	252	deco32_raster_display_list[deco32_raster_display_position++]=deco32_pf12_control[2]&0xffff;
253	253	deco32_raster_display_list[deco32_raster_display_position++]=deco32_pf12_control[3]&0xffff;
254	254	deco32_raster_display_list[deco32_raster_display_position++]=deco32_pf12_control[4]&0xffff;
255	255
256		cputag_set_input_line(machine, "maincpu", ARM_IRQ_LINE, HOLD_LINE);
	256	cputag_set_input_line(timer->machine, "maincpu", ARM_IRQ_LINE, HOLD_LINE);
257	257	}
258	258
259	259	static READ32_HANDLER( deco32_irq_controller_r )
r6740	r6741
305	305	case 1: /* Raster IRQ scanline position, only valid for values between 1 & 239 (0 and 240-256 do NOT generate IRQ's) */
306	306	scanline=(data&0xff);
307	307	if (raster_enable && scanline>0 && scanline<240)
308		timer_adjust_oneshot(raster_irq_timer,video_screen_get_time_until_pos(space->machine->primary_screen, scanline-1, 320),0);
	308	timer_device_adjust_oneshot(raster_irq_timer,video_screen_get_time_until_pos(space->machine->primary_screen, scanline-1, 320),0);
309	309	else
310		timer_adjust_oneshot(raster_irq_timer,attotime_never,0);
	310	timer_device_adjust_oneshot(raster_irq_timer,attotime_never,0);
311	311	break;
312	312	case 2: /* VBL irq ack */
313	313	break;
r6740	r6741
1657	1657
1658	1658	static MACHINE_RESET( deco32 )
1659	1659	{
1660		raster_irq_timer = timer_alloc(machine, interrupt_gen, NULL);
	1660	raster_irq_timer = devtag_get_device(machine, "int_timer");
1661	1661	}
1662	1662
1663	1663	static INTERRUPT_GEN( deco32_vbl_interrupt )
r6740	r6741
1682	1682
1683	1683	MDRV_MACHINE_RESET(deco32)
1684	1684
	1685	MDRV_TIMER_ADD("int_timer", interrupt_gen)
	1686
1685	1687	/* video hardware */
1686	1688	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
1687	1689
r6740	r6741
1822	1824	MDRV_MACHINE_RESET(deco32)
1823	1825	MDRV_NVRAM_HANDLER(93C46)
1824	1826
	1827	MDRV_TIMER_ADD("int_timer", interrupt_gen)
	1828
1825	1829	/* video hardware */
1826	1830	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM )
1827	1831
r6740	r6741
1875	1879	MDRV_MACHINE_RESET(deco32)
1876	1880	MDRV_NVRAM_HANDLER(93C46)
1877	1881
	1882	MDRV_TIMER_ADD("int_timer", interrupt_gen)
	1883
1878	1884	/* video hardware */
1879	1885	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM )
1880	1886

src/mame/drivers/malzak.c

r6740	r6741
63	63	*/
64	64
65	65	#include "driver.h"
66		#include "video/s2636.h"
67	66	#include "cpu/s2650/s2650.h"
68	67	#include "sound/sn76477.h"
	68	#include "video/s2636.h"
	69	#include "video/saa5050.h"
	70	#include "includes/malzak.h"
69	71
70		#define SAA5050_VBLANK 2500
71	72
72		static int malzak_bank1;
73
74		extern int malzak_x;
75		extern int malzak_y;
76
77		extern UINT8 *saa5050_vidram;  /* Video RAM for SAA 5050 */
78
79		// in video/malzak.c
80		VIDEO_START( malzak );
81		VIDEO_UPDATE( malzak );
82		WRITE8_HANDLER( malzak_playfield_w );
83
84
85	73	static READ8_HANDLER( fake_VRLE_r )
86	74	{
87		const device_config *s2636_0 = devtag_get_device(space->machine, "s2636_0");
88
89		return (s2636_work_ram_r(s2636_0, 0xcb) & 0x3f) + (video_screen_get_vblank(space->machine->primary_screen)*0x40);
	75	malzak_state *state = (malzak_state *)space->machine->driver_data;
	76	return (s2636_work_ram_r(state->s2636_0, 0xcb) & 0x3f) + (video_screen_get_vblank(space->machine->primary_screen) * 0x40);
90	77	}
91	78
92		static READ8_HANDLER( bank_r )
93		{
94		UINT8* bank = memory_region(space->machine, "user2");
95
96		return bank[offset + (malzak_bank1 * 0x0400)];
97		}
98
99	79	static READ8_HANDLER( s2636_portA_r )
100	80	{
101	81	// POT switch position, read from port A of the first S2636
102	82	// Not sure of the correct values to return, but these should
103	83	// do based on the game code.
104		switch(input_port_read(space->machine, "POT"))
	84	switch (input_port_read(space->machine, "POT"))
105	85	{
106	86	case 0:  // Normal play
107	87	return 0xf0;
r6740	r6741
119	99	static ADDRESS_MAP_START( malzak_map, ADDRESS_SPACE_PROGRAM, 8 )
120	100	ADDRESS_MAP_GLOBAL_MASK(0x7fff)
121	101	AM_RANGE(0x0000, 0x0bff) AM_ROM
122		AM_RANGE(0x0c00, 0x0fff) AM_READ(bank_r)
	102	AM_RANGE(0x0c00, 0x0fff) AM_ROMBANK("bank1")
123	103	AM_RANGE(0x1000, 0x10ff) AM_MIRROR(0x6000) AM_RAM
124	104	AM_RANGE(0x1100, 0x11ff) AM_MIRROR(0x6000) AM_RAM
125	105	AM_RANGE(0x1200, 0x12ff) AM_MIRROR(0x6000) AM_RAM
r6740	r6741
129	109	AM_RANGE(0x1500, 0x15ff) AM_MIRROR(0x6000) AM_DEVREADWRITE("s2636_1", s2636_work_ram_r, s2636_work_ram_w)
130	110	AM_RANGE(0x1600, 0x16ff) AM_MIRROR(0x6000) AM_RAM_WRITE(malzak_playfield_w)
131	111	AM_RANGE(0x1700, 0x17ff) AM_MIRROR(0x6000) AM_RAM
132		AM_RANGE(0x1800, 0x1fff) AM_MIRROR(0x6000) AM_RAM AM_BASE(&saa5050_vidram)
	112	AM_RANGE(0x1800, 0x1fff) AM_MIRROR(0x6000) AM_DEVREADWRITE("saa5050", saa5050_videoram_r, saa5050_videoram_w)
133	113	AM_RANGE(0x2000, 0x2fff) AM_ROM
134	114	AM_RANGE(0x4000, 0x4fff) AM_ROM
135	115	AM_RANGE(0x6000, 0x6fff) AM_ROM
r6740	r6741
139	119	static ADDRESS_MAP_START( malzak2_map, ADDRESS_SPACE_PROGRAM, 8 )
140	120	ADDRESS_MAP_GLOBAL_MASK(0x7fff)
141	121	AM_RANGE(0x0000, 0x0bff) AM_ROM
142		AM_RANGE(0x0c00, 0x0fff) AM_READ(bank_r)
	122	AM_RANGE(0x0c00, 0x0fff) AM_ROMBANK("bank1")
143	123	AM_RANGE(0x1000, 0x10ff) AM_MIRROR(0x6000) AM_RAM
144	124	AM_RANGE(0x1100, 0x11ff) AM_MIRROR(0x6000) AM_RAM
145	125	AM_RANGE(0x1200, 0x12ff) AM_MIRROR(0x6000) AM_RAM
r6740	r6741
150	130	AM_RANGE(0x1500, 0x15ff) AM_MIRROR(0x6000) AM_DEVREADWRITE("s2636_1", s2636_work_ram_r, s2636_work_ram_w)
151	131	AM_RANGE(0x1600, 0x16ff) AM_MIRROR(0x6000) AM_RAM_WRITE(malzak_playfield_w)
152	132	AM_RANGE(0x1700, 0x17ff) AM_MIRROR(0x6000) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
153		AM_RANGE(0x1800, 0x1fff) AM_MIRROR(0x6000) AM_RAM AM_BASE(&saa5050_vidram)
	133	AM_RANGE(0x1800, 0x1fff) AM_MIRROR(0x6000) AM_DEVREADWRITE("saa5050", saa5050_videoram_r, saa5050_videoram_w)
154	134	AM_RANGE(0x2000, 0x2fff) AM_ROM
155	135	AM_RANGE(0x4000, 0x4fff) AM_ROM
156	136	AM_RANGE(0x6000, 0x6fff) AM_ROM
r6740	r6741
172	152	//  Bit 6 is used only in Malzak II, and is set high after checking
173	153	//        the selected version
174	154	//  logerror("S2650 [0x%04x]: port 0x40 write: 0x%02x\n", cpu_get_pc(cputag_get_cpu(space->machine, "maincpu")), data);
175		if(data & 0x40)
176		malzak_bank1 = 1;
177		else
178		malzak_bank1 = 0;
	155	memory_set_bank(space->machine, "bank1", (data & 0x40) >> 6);
179	156	}
180	157
181	158	static WRITE8_HANDLER( port60_w )
182	159	{
183		malzak_x = data;
184		//  logerror("I/O: port 0x60 write 0x%02x\n",data);
	160	malzak_state *state = (malzak_state *)space->machine->driver_data;
	161	state->malzak_x = data;
	162	//  logerror("I/O: port 0x60 write 0x%02x\n", data);
185	163	}
186	164
187	165	static WRITE8_HANDLER( portc0_w )
188	166	{
189		malzak_y = data;
190		//  logerror("I/O: port 0xc0 write 0x%02x\n",data);
	167	malzak_state *state = (malzak_state *)space->machine->driver_data;
	168	state->malzak_y = data;
	169	//  logerror("I/O: port 0xc0 write 0x%02x\n", data);
191	170	}
192	171
193	172	static READ8_HANDLER( collision_r )
194	173	{
	174	malzak_state *state = (malzak_state *)space->machine->driver_data;
	175
195	176	// High 4 bits seem to refer to the row affected.
196		static int counter;
	177	if(++state->collision_counter > 15)
	178	state->collision_counter = 0;
197	179
198		if(++counter > 15)
199		counter = 0;
200		//  logerror("I/O port 0x00 read\n");
201		return 0xd0 + counter;
	180	//  logerror("I/O port 0x00 read\n");
	181	return 0xd0 + state->collision_counter;
202	182	}
203	183
204	184	static ADDRESS_MAP_START( malzak_io_map, ADDRESS_SPACE_IO, 8 )
r6740	r6741
231	211	PORT_START("POT")
232	212	/* No POT switch on Malzak as far as I know */
233	213
234		PORT_START("SENSE")      /* SENSE */
	214	PORT_START("SENSE")
235	215	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
236	216
237	217	INPUT_PORTS_END
r6740	r6741
258	238	PORT_DIPSETTING( 0x02, "3" )
259	239	PORT_DIPSETTING( 0x03, "4" )  // Change settings
260	240
261		PORT_START("SENSE")      /* SENSE */
	241	PORT_START("SENSE")
262	242	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
263	243
264	244	INPUT_PORTS_END
r6740	r6741
327	307	{
328	308	int i;
329	309
330		for (i = 0; i < 8*8; i++)
	310	for (i = 0; i < 8 * 8; i++)
331	311	{
332	312	palette_set_color_rgb(machine, i * 2 + 0, pal1bit(i >> 3), pal1bit(i >> 4), pal1bit(i >> 5));
333	313	palette_set_color_rgb(machine, i * 2 + 1, pal1bit(i >> 0), pal1bit(i >> 1), pal1bit(i >> 2));
r6740	r6741
363	343	};
364	344
365	345
366		static const s2636_interface s2636_0_config =
	346	static const s2636_interface malzac_s2636_0_config =
367	347	{
368	348	"screen",
369		0xff,
	349	0x100,
370	350	0, -16   /* -8, -16 */
371	351	};
372	352
373		static const s2636_interface s2636_1_config =
	353	static const s2636_interface malzac_s2636_1_config =
374	354	{
375	355	"screen",
376		0xff,
	356	0x100,
377	357	0, -16   /* -9, -16 */
378	358	};
379	359
	360	static const saa5050_interface malzac_saa5050_intf =
	361	{
	362	"screen",
	363	1,   /* starting gfxnum */
	364	42, 24, 64,  /* x, y, size */
	365	1     /* rev y order */
	366	};
	367
	368
	369	static MACHINE_START( malzak )
	370	{
	371	malzak_state *state = (malzak_state *)machine->driver_data;
	372
	373	memory_configure_bank(machine, "bank1", 0, 2, memory_region(machine, "user2"), 0x400);
	374
	375	state->s2636_0 = devtag_get_device(machine, "s2636_0");
	376	state->s2636_1 = devtag_get_device(machine, "s2636_1");
	377	state->saa5050 = devtag_get_device(machine, "saa5050");
	378
	379	state_save_register_global_array(machine, state->playfield_code);
	380	state_save_register_global(machine, state->malzak_x);
	381	state_save_register_global(machine, state->malzak_y);
	382	}
	383
	384	static MACHINE_RESET( malzak )
	385	{
	386	malzak_state *state = (malzak_state *)machine->driver_data;
	387
	388	memset(state->playfield_code, 0, 256);
	389
	390	state->malzak_x = 0;
	391	state->malzak_y = 0;
	392	}
	393
380	394	static MACHINE_DRIVER_START( malzak )
381	395
	396	/* driver data */
	397	MDRV_DRIVER_DATA(malzak_state)
	398
382	399	/* basic machine hardware */
383	400	MDRV_CPU_ADD("maincpu", S2650, 3800000/4)
384	401	MDRV_CPU_PROGRAM_MAP(malzak_map)
385	402	MDRV_CPU_IO_MAP(malzak_io_map)
386	403
	404	MDRV_MACHINE_START(malzak)
	405	MDRV_MACHINE_RESET(malzak)
	406
387	407	/* video hardware */
388	408	MDRV_SCREEN_ADD("screen", RASTER)
389	409	MDRV_SCREEN_REFRESH_RATE(50)
r6740	r6741
396	416	MDRV_PALETTE_LENGTH(128)
397	417	MDRV_PALETTE_INIT(malzak)
398	418
399		//  MDRV_MACHINE_RESET(malzak)
	419	MDRV_S2636_ADD("s2636_0", malzac_s2636_0_config)
	420	MDRV_S2636_ADD("s2636_1", malzac_s2636_1_config)
400	421
401		MDRV_S2636_ADD("s2636_0", s2636_0_config)
402		MDRV_S2636_ADD("s2636_1", s2636_1_config)
403
	422	MDRV_SAA5050_ADD("saa5050", malzac_saa5050_intf)
404	423	MDRV_VIDEO_UPDATE(malzak)
405	424
406	425	/* sound hardware */
r6740	r6741
470	489	ROM_END
471	490
472	491
473		GAME( 19??, malzak,   0,       malzak,  malzak,  0,        ROT0, "Kitronix", "Malzak", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
474		GAME( 19??, malzak2, malzak,   malzak2, malzak2, 0,        ROT0, "Kitronix", "Malzak II", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
	492	GAME( 19??, malzak,   0,       malzak,  malzak,  0,        ROT0, "Kitronix", "Malzak", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
	493	GAME( 19??, malzak2, malzak,   malzak2, malzak2, 0,        ROT0, "Kitronix", "Malzak II", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )

src/mame/drivers/midzeus.c

r6740	r6741
1198	1198	ROM_LOAD32_WORD( "mk4_l2.u17", 0x0c00002, 0x200000, CRC(3a1a082c) SHA1(5f8e8ce760d8ebadd1240ef08f1382a37cf11d0b) )
1199	1199	ROM_END
1200	1200
	1201	ROM_START( mk4b )
	1202	ROM_REGION16_LE( 0x1000000, "dcs", ROMREGION_ERASEFF )   /* sound data */
	1203	ROM_LOAD16_BYTE( "mk4_l1.u2", 0x000000, 0x200000, CRC(daac8ab5) SHA1(b93aa205868212077a9b6ac8e93205e1ebf8c05e) ) /* All sound roms were labeled as v1.0 & are M27C160 type */
	1204	ROM_LOAD16_BYTE( "mk4_l1.u3", 0x400000, 0x200000, CRC(cb59413e) SHA1(f7e5c589a8f6a2e7dceee4881594e7403be4d4ad) )
	1205	ROM_LOAD16_BYTE( "mk4_l1.u4", 0x800000, 0x200000, CRC(dee91696) SHA1(00a182a36a414744cd014fcfc53c2e1a66ab5189) )
	1206	ROM_LOAD16_BYTE( "mk4_l1.u5", 0xc00000, 0x200000, CRC(44d072be) SHA1(8a636c2801d799dfb84e69607ade76d2b49cf09f) )
	1207
	1208	ROM_REGION32_LE( 0x1800000, "user1", 0 )
	1209	ROM_LOAD32_WORD( "mk4_l1.u10", 0x0000000, 0x200000, CRC(6fcc86dd) SHA1(b3b2b463daf51450fbcd5d2922ac1b091bd91c4a) ) /* All roms were labeled as v1.0 */
	1210	ROM_LOAD32_WORD( "mk4_l1.u11", 0x0000002, 0x200000, CRC(04895940) SHA1(55d368905f5986587c4e3da236401fdd5e2c269c) )
	1211	ROM_LOAD32_WORD( "mk4_l1.u12", 0x0400000, 0x200000, CRC(323ddc5c) SHA1(4303c109c68a7cc15ff6fe91b6d34383b6066351) )
	1212	ROM_LOAD32_WORD( "mk4_l1.u13", 0x0400002, 0x200000, CRC(0b95bdf0) SHA1(a25d48b33a861b5e52736720c7a79291fa837f78) )
	1213	ROM_LOAD32_WORD( "mk4_l1.u14", 0x0800000, 0x200000, CRC(cb6816ef) SHA1(9c828c188d297aee0f211acc283035289e80b5a8) )
	1214	ROM_LOAD32_WORD( "mk4_l1.u15", 0x0800002, 0x200000, CRC(cde47df7) SHA1(63383d983c03703b2f3f1973ce2a7553654836d4) )
	1215	/* No U16 or U17 roms present in this version */
	1216	ROM_END
	1217
1201	1218	ROM_START( invasnab ) /* Version 5.0 Program roms, v4.0 Graphics roms, v2.0 Sound roms */
1202	1219	ROM_REGION16_LE( 0x1000000, "dcs", ROMREGION_ERASEFF )   /* sound data */
1203	1220	ROM_LOAD16_BYTE( "invasion2.u2", 0x000000, 0x200000, CRC(59d2e1d6) SHA1(994a4311ac4841d4341449c0c7480952b6f3855d) ) /* These four sound roms were labeled as v2.0 */
r6740	r6741
1418	1435
1419	1436	GAME(  1997, mk4,      0,        midzeus,  mk4,      mk4,      ROT0, "Midway", "Mortal Kombat 4 (version 3.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
1420	1437	GAME(  1997, mk4a,     mk4,      midzeus,  mk4,      mk4,      ROT0, "Midway", "Mortal Kombat 4 (version 2.1)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
	1438	GAME(  1997, mk4b,     mk4,      midzeus,  mk4,      mk4,      ROT0, "Midway", "Mortal Kombat 4 (version 1.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
1421	1439	GAME(  1999, invasnab, 0,        midzeus,  invasn,   invasn,   ROT0, "Midway", "Invasion - The Abductors (version 5.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
1422	1440	GAME(  1999, invasnv4, invasnab, midzeus,  invasn,   invasn,   ROT0, "Midway", "Invasion - The Abductors (version 4.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
1423	1441	GAMEL( 1999, crusnexo, 0,        midzeus2, crusnexo, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.4)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )

src/mame/drivers/norautp.c

r6740	r6741
533	533	#include "cpu/z80/z80.h"
534	534	#include "cpu/i8085/i8085.h"
535	535	#include "machine/i8255a.h"
536		#include "norautp.h"
	536	#include "includes/norautp.h"
537	537
538	538	#include "noraut11.lh"
539	539	#include "noraut12.lh"

src/mame/drivers/fastfred.c

r6740	r6741
8	8	#include "driver.h"
9	9	#include "cpu/z80/z80.h"
10	10	#include "deprecat.h"
11		#include "fastfred.h"
	11	#include "includes/fastfred.h"
12	12	#include "sound/ay8910.h"
13	13
14	14

src/mame/drivers/xtheball.c

r6740	r6741
34	34	static MACHINE_RESET( xtheball )
35	35	{
36	36	tlc34076_reset(6);
37		ticket_dispenser_init(machine, 100, 1, 1);
38	37	}
39	38
40	39
r6740	r6741
134	133	switch (offset)
135	134	{
136	135	case 7:
137		ticket_dispenser_w(space, 0, data << 7);
	136	ticket_dispenser_w(devtag_get_device(space->machine, "ticket"), 0, data << 7);
138	137	break;
139	138
140	139	case 8:
r6740	r6741
191	190	*
192	191	*************************************/
193	192
194		static READ16_HANDLER( port0_r )
195		{
196		int result = input_port_read(space->machine, "DSW");
197		result ^= ticket_dispenser_r(space,0) >> 3;
198		return result;
199		}
200
201
202	193	static READ16_HANDLER( analogx_r )
203	194	{
204	195	return (input_port_read(space->machine, "ANALOGX") << 8) | 0x00ff;
r6740	r6741
226	217	AM_RANGE(0x02000000, 0x020fffff) AM_RAM AM_BASE(&vram_fg)
227	218	AM_RANGE(0x03000000, 0x030000ff) AM_READWRITE(tlc34076_lsb_r, tlc34076_lsb_w)
228	219	AM_RANGE(0x03040000, 0x030401ff) AM_WRITE(bit_controls_w)
229		AM_RANGE(0x03040080, 0x0304008f) AM_READ(port0_r)
	220	AM_RANGE(0x03040080, 0x0304008f) AM_READ_PORT("DSW")
230	221	AM_RANGE(0x03040100, 0x0304010f) AM_READ(analogx_r)
231	222	AM_RANGE(0x03040110, 0x0304011f) AM_READ_PORT("COIN1")
232	223	AM_RANGE(0x03040130, 0x0304013f) AM_READ_PORT("SERVICE2")
r6740	r6741
251	242
252	243	static INPUT_PORTS_START( xtheball )
253	244	PORT_START("DSW")
254		PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
	245	PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED )
	246	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)
	247	PORT_BIT( 0x00e0, IP_ACTIVE_LOW, IPT_UNUSED )
255	248	PORT_DIPNAME( 0x0700, 0x0000, "Target Tickets")
256	249	PORT_DIPSETTING(      0x0000, "3" )
257	250	PORT_DIPSETTING(      0x0100, "4" )
r6740	r6741
350	343	MDRV_MACHINE_RESET(xtheball)
351	344	MDRV_NVRAM_HANDLER(generic_1fill)
352	345
	346	MDRV_TICKET_DISPENSER_ADD("ticket", 100, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
	347
353	348	/* video hardware */
354	349	MDRV_VIDEO_UPDATE(tms340x0)
355	350

src/mame/drivers/maxaflex.c

r6740	r6741
31	31	static UINT8 portB_in,portB_out,ddrB;
32	32	static UINT8 portC_in,portC_out,ddrC;
33	33	static UINT8 tdr,tcr;
34		static emu_timer *mcu_timer;
	34	static const device_config *mcu_timer;
35	35
36	36	/* Port A:
37	37	0   (in)  DSW
r6740	r6741
147	147	ddrC = data;
148	148	}
149	149
150		static TIMER_CALLBACK( mcu_timer_proc )
	150	static TIMER_DEVICE_CALLBACK( mcu_timer_proc )
151	151	{
152	152	if ( --tdr == 0x00 )
153	153	{
154	154	if ( (tcr & 0x40) == 0 )
155	155	{
156	156	//timer interrupt!
157		generic_pulse_irq_line(cputag_get_cpu(machine, "mcu"), M68705_INT_TIMER);
	157	generic_pulse_irq_line(cputag_get_cpu(timer->machine, "mcu"), M68705_INT_TIMER);
158	158	}
159	159	}
160	160	}
r6740	r6741
202	202	}
203	203
204	204	period = attotime_mul(ATTOTIME_IN_HZ(3579545), divider);
205		timer_adjust_periodic( mcu_timer, period, 0, period);
	205	timer_device_adjust_periodic( mcu_timer, period, 0, period);
206	206	}
207	207	}
208	208
r6740	r6741
212	212	portB_in = portB_out = ddrB   = 0;
213	213	portC_in = portC_out = ddrC   = 0;
214	214	tdr = tcr = 0;
215		mcu_timer = timer_alloc(machine, mcu_timer_proc , NULL);
	215	mcu_timer = devtag_get_device(machine, "mcu_timer");
216	216
217	217	output_set_lamp_value(0, 0);
218	218	output_set_lamp_value(1, 0);
r6740	r6741
437	437	MDRV_CPU_PROGRAM_MAP(mcu_mem)
438	438
439	439	MDRV_PIA6821_ADD("pia", atarixl_pia_interface)
	440	MDRV_TIMER_ADD("mcu_timer", mcu_timer_proc)
440	441
441	442	/* video hardware */
442	443	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/news.c

r6740	r6741
15	15
16	16	#include "driver.h"
17	17	#include "cpu/z80/z80.h"
18		#include "news.h"
	18	#include "includes/news.h"
19	19	#include "sound/okim6295.h"
20	20
21	21

src/mame/drivers/segaybd.c

r6740	r6741
24	24
25	25	#include "driver.h"
26	26	#include "cpu/z80/z80.h"
27		#include "system16.h"
	27	#include "includes/system16.h"
28	28	#include "cpu/m68000/m68000.h"
29	29	#include "machine/segaic16.h"
30	30	#include "sound/2151intf.h"
r6740	r6741
55	55
56	56	static UINT16 *backupram;
57	57
58		static emu_timer *interrupt_timer;
	58	static const device_config *interrupt_timer;
59	59
60	60
61	61
r6740	r6741
133	133
134	134	static int irq2_scanline = 170;
135	135
136		static TIMER_CALLBACK( scanline_callback )
	136	static TIMER_DEVICE_CALLBACK( scanline_callback )
137	137	{
138	138	int scanline = param;
139	139
r6740	r6741
166	166	}
167	167
168	168	/* update IRQs on the main CPU */
169		update_main_irqs(machine);
	169	update_main_irqs(timer->machine);
170	170
171	171	/* come back at the next appropriate scanline */
172		timer_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
	172	timer_device_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, scanline, 0), scanline);
173	173
174	174	#if TWEAK_IRQ2_SCANLINE
175	175	if (scanline == 223)
r6740	r6741
177	177	int old = irq2_scanline;
178	178
179	179	/* Q = -10 scanlines, W = -1 scanline, E = +1 scanline, R = +10 scanlines */
180		if (input_code_pressed(machine, KEYCODE_Q)) { while (input_code_pressed(machine, KEYCODE_Q)) ; irq2_scanline -= 10; }
181		if (input_code_pressed(machine, KEYCODE_W)) { while (input_code_pressed(machine, KEYCODE_W)) ; irq2_scanline -= 1; }
182		if (input_code_pressed(machine, KEYCODE_E)) { while (input_code_pressed(machine, KEYCODE_E)) ; irq2_scanline += 1; }
183		if (input_code_pressed(machine, KEYCODE_R)) { while (input_code_pressed(machine, KEYCODE_R)) ; irq2_scanline += 10; }
	180	if (input_code_pressed(timer->machine, KEYCODE_Q)) { while (input_code_pressed(timer->machine, KEYCODE_Q)) ; irq2_scanline -= 10; }
	181	if (input_code_pressed(timer->machine, KEYCODE_W)) { while (input_code_pressed(timer->machine, KEYCODE_W)) ; irq2_scanline -= 1; }
	182	if (input_code_pressed(timer->machine, KEYCODE_E)) { while (input_code_pressed(timer->machine, KEYCODE_E)) ; irq2_scanline += 1; }
	183	if (input_code_pressed(timer->machine, KEYCODE_R)) { while (input_code_pressed(timer->machine, KEYCODE_R)) ; irq2_scanline += 10; }
184	184	if (old != irq2_scanline)
185	185	popmessage("scanline = %d", irq2_scanline);
186	186	}
r6740	r6741
188	188	}
189	189
190	190
191		static MACHINE_RESET( yboard )
	191	static MACHINE_START( yboard )
192	192	{
193		interrupt_timer = timer_alloc(machine, scanline_callback, NULL);
194		timer_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 223, 0), 223);
195
196	193	state_save_register_global_array(machine, misc_io_data);
197	194	state_save_register_global_array(machine, analog_data);
198	195	state_save_register_global(machine, vblank_irq_state);
r6740	r6741
200	197	}
201	198
202	199
	200	static MACHINE_RESET( yboard )
	201	{
	202	interrupt_timer = devtag_get_device(machine, "int_timer");
	203	timer_device_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 223, 0), 223);
	204	}
203	205
	206
	207
204	208	/*************************************
205	209	*
206	210	*  Sound comm and interrupts
r6740	r6741
980	984	MDRV_CPU_PROGRAM_MAP(sound_map)
981	985	MDRV_CPU_IO_MAP(sound_portmap)
982	986
	987	MDRV_MACHINE_START(yboard)
983	988	MDRV_MACHINE_RESET(yboard)
984	989	MDRV_NVRAM_HANDLER(yboard)
985	990	MDRV_QUANTUM_TIME(HZ(6000))
986	991
	992	MDRV_TIMER_ADD("int_timer", scanline_callback)
	993
987	994	/* video hardware */
988	995	MDRV_SCREEN_ADD("screen", RASTER)
989	996	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/foodf.c

r6740	r6741
77	77	#include "cpu/m68000/m68000.h"
78	78	#include "machine/atarigen.h"
79	79	#include "sound/pokey.h"
80		#include "foodf.h"
	80	#include "includes/foodf.h"
81	81
82	82
83	83	#define MASTER_CLOCK      12096000
r6740	r6741
111	111	}
112	112
113	113
114		static TIMER_CALLBACK( scanline_update )
	114	static TIMER_DEVICE_CALLBACK( scanline_update )
115	115	{
116		foodf_state *state = (foodf_state *)machine->driver_data;
117	116	int scanline = param;
118	117
119	118	/* WARNING: the timing of this is not perfectly accurate; it should fire on
r6740	r6741
122	121	mystery yet */
123	122
124	123	/* INT 1 is on 32V */
125		atarigen_scanline_int_gen(cputag_get_cpu(machine, "maincpu"));
	124	atarigen_scanline_int_gen(cputag_get_cpu(timer->machine, "maincpu"));
126	125
127	126	/* advance to the next interrupt */
128	127	scanline += 64;
r6740	r6741
130	129	scanline = 0;
131	130
132	131	/* set a timer for it */
133		timer_adjust_oneshot(state->scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
	132	timer_device_adjust_oneshot(timer, video_screen_get_time_until_pos(timer->machine->primary_screen, scanline, 0), scanline);
134	133	}
135	134
136	135
137	136	static MACHINE_START( foodf )
138	137	{
139	138	foodf_state *state = (foodf_state *)machine->driver_data;
	139	atarigen_init(machine);
140	140	state_save_register_global(machine, state->whichport);
141		state->scanline_timer = timer_alloc(machine, scanline_update, NULL);
142	141	}
143	142
144	143
r6740	r6741
146	145	{
147	146	foodf_state *state = (foodf_state *)machine->driver_data;
148	147	atarigen_interrupt_reset(&state->atarigen, update_interrupts);
149		timer_adjust_oneshot(state->scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
	148	timer_device_adjust_oneshot(devtag_get_device(machine, "scan_timer"), video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
150	149	}
151	150
152	151
r6740	r6741
366	365	MDRV_NVRAM_HANDLER(generic_1fill)
367	366	MDRV_WATCHDOG_VBLANK_INIT(8)
368	367
	368	MDRV_TIMER_ADD("scan_timer", scanline_update)
	369
369	370	/* video hardware */
370	371	MDRV_GFXDECODE(foodf)
371	372	MDRV_PALETTE_LENGTH(256)

src/mame/drivers/skyraid.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/m6502/m6502.h"
9		#include "skyraid.h"
	9	#include "includes/skyraid.h"
10	10
11	11	extern UINT8* skyraid_alpha_num_ram;
12	12	extern UINT8* skyraid_pos_ram;

src/mame/drivers/aliens.c

r6740	r6741
10	10	#include "driver.h"
11	11	#include "cpu/z80/z80.h"
12	12	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
13		#include "video/konamiic.h"
14	13	#include "sound/k007232.h"
15	14	#include "sound/2151intf.h"
16		#include "konamipt.h"
	15	#include "video/konicdev.h"
	16	#include "includes/konamipt.h"
17	17
18	18	/* prototypes */
19	19	static MACHINE_RESET( aliens );
20	20	static KONAMI_SETLINES_CALLBACK( aliens_banking );
21	21
	22	extern void aliens_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color, int *flags, int *priority);
	23	extern void aliens_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow);
22	24
23	25	VIDEO_START( aliens );
24	26	VIDEO_UPDATE( aliens );
r6740	r6741
30	32
31	33	static INTERRUPT_GEN( aliens_interrupt )
32	34	{
33		if (K051960_is_IRQ_enabled())
	35	const device_config *k051960 = devtag_get_device(device->machine, "k051960");
	36
	37	if (k051960_is_irq_enabled(k051960))
34	38	cpu_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE);
35	39	}
36	40
r6740	r6741
52	56
53	57	static WRITE8_HANDLER( aliens_coin_counter_w )
54	58	{
	59	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	60
55	61	/* bits 0-1 = coin counters */
56	62	coin_counter_w(space->machine, 0,data & 0x01);
57	63	coin_counter_w(space->machine, 1,data & 0x02);
r6740	r6741
60	66	palette_selected = data & 0x20;
61	67
62	68	/* bit 6 = enable char ROM reading through the video RAM */
63		K052109_set_RMRD_line((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
	69	k052109_set_rmrd_line(k052109, (data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
64	70
65	71	/* other bits unknown */
66	72	#if 0
r6740	r6741
90	96	}
91	97
92	98
	99	static READ8_HANDLER( k052109_051960_r )
	100	{
	101	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	102	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	103
	104	if (k052109_get_rmrd_line(k052109) == CLEAR_LINE)
	105	{
	106	if (offset >= 0x3800 && offset < 0x3808)
	107	return k051937_r(k051960, offset - 0x3800);
	108	else if (offset < 0x3c00)
	109	return k052109_r(k052109, offset);
	110	else
	111	return k051960_r(k051960, offset - 0x3c00);
	112	}
	113	else
	114	return k052109_r(k052109, offset);
	115	}
	116
	117	static WRITE8_HANDLER( k052109_051960_w )
	118	{
	119	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	120	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	121
	122	if (offset >= 0x3800 && offset < 0x3808)
	123	k051937_w(k051960, offset - 0x3800, data);
	124	else if (offset < 0x3c00)
	125	k052109_w(k052109, offset, data);
	126	else
	127	k051960_w(k051960, offset - 0x3c00, data);
	128	}
	129
93	130	static ADDRESS_MAP_START( aliens_map, ADDRESS_SPACE_PROGRAM, 8 )
94	131	AM_RANGE(0x0000, 0x03ff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram)      /* palette + work RAM */
95	132	AM_RANGE(0x0400, 0x1fff) AM_RAM
r6740	r6741
101	138	AM_RANGE(0x5f84, 0x5f84) AM_READ_PORT("DSW1")
102	139	AM_RANGE(0x5f88, 0x5f88) AM_READWRITE(watchdog_reset_r, aliens_coin_counter_w)      /* coin counters */
103	140	AM_RANGE(0x5f8c, 0x5f8c) AM_WRITE(aliens_sh_irqtrigger_w)                     /* cause interrupt on audio CPU */
104		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
	141	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
105	142	AM_RANGE(0x8000, 0xffff) AM_ROM                                          /* ROM e24_j02.bin */
106	143	ADDRESS_MAP_END
107	144
r6740	r6741
186	223	aliens_snd_bankswitch_w
187	224	};
188	225
	226
	227	static const k052109_interface aliens_k052109_intf =
	228	{
	229	"gfx1", 0,
	230	NORMAL_PLANE_ORDER,
	231	KONAMI_ROM_DEINTERLEAVE_2,
	232	aliens_tile_callback
	233	};
	234
	235	static const k051960_interface aliens_k051960_intf =
	236	{
	237	"gfx2", 1,
	238	NORMAL_PLANE_ORDER,
	239	KONAMI_ROM_DEINTERLEAVE_2,
	240	aliens_sprite_callback
	241	};
	242
189	243	static MACHINE_DRIVER_START( aliens )
190	244
191	245	/* basic machine hardware */
r6740	r6741
216	270	MDRV_VIDEO_START(aliens)
217	271	MDRV_VIDEO_UPDATE(aliens)
218	272
	273	MDRV_K052109_ADD("k052109", aliens_k052109_intf)
	274	MDRV_K051960_ADD("k051960", aliens_k051960_intf)
	275
219	276	/* sound hardware */
220	277	MDRV_SPEAKER_STANDARD_MONO("mono")
221	278
r6740	r6741
493	550
494	551	static DRIVER_INIT( aliens )
495	552	{
496		konami_rom_deinterleave_2(machine, "gfx1");
497		konami_rom_deinterleave_2(machine, "gfx2");
498
499	553	state_save_register_global(machine, palette_selected);
500	554	}
501	555

src/mame/drivers/88games.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "cpu/konami/konami.h"
9	9	#include "cpu/z80/z80.h"
10		#include "video/konamiic.h"
	10	#include "video/konicdev.h"
11	11	#include "sound/2151intf.h"
12	12	#include "sound/upd7759.h"
	13	#include "includes/88games.h"
13	14
14	15
15		static MACHINE_RESET( 88games );
16		static MACHINE_START( 88games );
17		static KONAMI_SETLINES_CALLBACK( k88games_banking );
18
19		static UINT8 *ram;
20		static UINT8 *banked_rom;
21	16	static UINT8 *paletteram_1000;
22		static int videobank;
23	17
24		extern int k88games_priority;
25		VIDEO_START( 88games );
26		VIDEO_UPDATE( 88games );
27	18
	19	/*************************************
	20	*
	21	*  Memory handlers
	22	*
	23	*************************************/
28	24
29	25	static INTERRUPT_GEN( k88games_interrupt )
30	26	{
31		if (K052109_is_IRQ_enabled())
	27	_88games_state *state = (_88games_state *)device->machine->driver_data;
	28
	29	if (k052109_is_irq_enabled(state->k052109))
32	30	irq0_line_hold(device);
33	31	}
34	32
35		static int zoomreadroms;
36
37	33	static READ8_HANDLER( bankedram_r )
38	34	{
39		if (videobank) return ram[offset];
	35	_88games_state *state = (_88games_state *)space->machine->driver_data;
	36
	37	if (state->videobank)
	38	return state->ram[offset];
40	39	else
41	40	{
42		if (zoomreadroms)
43		return K051316_rom_0_r(space,offset);
	41	if (state->zoomreadroms)
	42	return k051316_rom_r(state->k051316, offset);
44	43	else
45		return K051316_0_r(space,offset);
	44	return k051316_r(state->k051316, offset);
46	45	}
47	46	}
48	47
49	48	static WRITE8_HANDLER( bankedram_w )
50	49	{
51		if (videobank) ram[offset] = data;
52		else K051316_0_w(space,offset,data);
	50	_88games_state *state = (_88games_state *)space->machine->driver_data;
	51
	52	if (state->videobank)
	53	state->ram[offset] = data;
	54	else
	55	k051316_w(state->k051316, offset, data);
53	56	}
54	57
55	58	static WRITE8_HANDLER( k88games_5f84_w )
56	59	{
	60	_88games_state *state = (_88games_state *)space->machine->driver_data;
	61
57	62	/* bits 0/1 coin counters */
58		coin_counter_w(space->machine, 0,data & 0x01);
59		coin_counter_w(space->machine, 1,data & 0x02);
	63	coin_counter_w(space->machine, 0, data & 0x01);
	64	coin_counter_w(space->machine, 1, data & 0x02);
60	65
61	66	/* bit 2 enables ROM reading from the 051316 */
62	67	/* also 5fce == 2 read roms, == 3 read ram */
63		zoomreadroms = data & 0x04;
	68	state->zoomreadroms = data & 0x04;
64	69
65	70	if (data & 0xf8)
66		popmessage("5f84 = %02x",data);
	71	popmessage("5f84 = %02x", data);
67	72	}
68	73
69	74	static WRITE8_HANDLER( k88games_sh_irqtrigger_w )
70	75	{
71		cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
	76	_88games_state *state = (_88games_state *)space->machine->driver_data;
	77	cpu_set_input_line_and_vector(state->audiocpu, 0, HOLD_LINE, 0xff);
72	78	}
73	79
74		static UINT8 speech_chip[8];
	80
75	81	static WRITE8_HANDLER( speech_control_w )
76	82	{
	83	_88games_state *state = (_88games_state *)space->machine->driver_data;
77	84	const device_config *upd;
78	85
79		strcpy((char *)speech_chip, ( data & 4 ) ? "upd2" : "upd1");
	86	state->speech_chip = (data & 4) ? 1 : 0;
	87	upd = state->speech_chip ? state->upd_2 : state->upd_1;
80	88
81		upd = devtag_get_device(space->machine, (char *)speech_chip);
82		upd7759_reset_w( upd, data & 2 );
83		upd7759_start_w( upd, data & 1 );
	89	upd7759_reset_w(upd, data & 2);
	90	upd7759_start_w(upd, data & 1);
84	91	}
85	92
86	93	static WRITE8_HANDLER( speech_msg_w )
87	94	{
88		upd7759_port_w( devtag_get_device(space->machine, (char *)speech_chip), 0, data );
	95	_88games_state *state = (_88games_state *)space->machine->driver_data;
	96	const device_config *upd = state->speech_chip ? state->upd_2 : state->upd_1;
	97
	98	upd7759_port_w(upd, 0, data);
89	99	}
90	100
	101	/* special handlers to combine 052109 & 051960 */
	102	static READ8_HANDLER( k052109_051960_r )
	103	{
	104	_88games_state *state = (_88games_state *)space->machine->driver_data;
	105
	106	if (k052109_get_rmrd_line(state->k052109) == CLEAR_LINE)
	107	{
	108	if (offset >= 0x3800 && offset < 0x3808)
	109	return k051937_r(state->k051960, offset - 0x3800);
	110	else if (offset < 0x3c00)
	111	return k052109_r(state->k052109, offset);
	112	else
	113	return k051960_r(state->k051960, offset - 0x3c00);
	114	}
	115	else
	116	return k052109_r(state->k052109, offset);
	117	}
	118
	119	static WRITE8_HANDLER( k052109_051960_w )
	120	{
	121	_88games_state *state = (_88games_state *)space->machine->driver_data;
	122
	123	if (offset >= 0x3800 && offset < 0x3808)
	124	k051937_w(state->k051960, offset - 0x3800, data);
	125	else if (offset < 0x3c00)
	126	k052109_w(state->k052109, offset, data);
	127	else
	128	k051960_w(state->k051960, offset - 0x3c00, data);
	129	}
	130
	131	/*************************************
	132	*
	133	*  Address maps
	134	*
	135	*************************************/
	136
91	137	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
92		AM_RANGE(0x0000, 0x0fff) AM_RAM   AM_BASE(&banked_rom) /* banked ROM + palette RAM */
	138	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_BASE_MEMBER(_88games_state, banked_rom) /* banked ROM + palette RAM */
93	139	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram_1000)   /* banked ROM + palette RAM */
94	140	AM_RANGE(0x2000, 0x2fff) AM_RAM
95	141	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
96		AM_RANGE(0x3800, 0x3fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram)
	142	AM_RANGE(0x3800, 0x3fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE_MEMBER(_88games_state, ram)
97	143	AM_RANGE(0x5f84, 0x5f84) AM_WRITE(k88games_5f84_w)
98	144	AM_RANGE(0x5f88, 0x5f88) AM_WRITE(watchdog_reset_w)
99	145	AM_RANGE(0x5f8c, 0x5f8c) AM_WRITE(soundlatch_w)
r6740	r6741
103	149	AM_RANGE(0x5f96, 0x5f96) AM_READ_PORT("IN2")
104	150	AM_RANGE(0x5f97, 0x5f97) AM_READ_PORT("DSW1")
105	151	AM_RANGE(0x5f9b, 0x5f9b) AM_READ_PORT("DSW2")
106		AM_RANGE(0x5fc0, 0x5fcf) AM_WRITE(K051316_ctrl_0_w)
107		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
	152	AM_RANGE(0x5fc0, 0x5fcf) AM_DEVWRITE("k051316", k051316_ctrl_w)
	153	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
108	154	AM_RANGE(0x8000, 0xffff) AM_ROM
109	155	ADDRESS_MAP_END
110	156
r6740	r6741
119	165
120	166
121	167
122		/***************************************************************************
	168	/*************************************
	169	*
	170	*  Input ports
	171	*
	172	*************************************/
123	173
124		Input Ports
125
126		***************************************************************************/
127
128	174	static INPUT_PORTS_START( 88games )
129	175	PORT_START("IN0")
130	176	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
r6740	r6741
219	265	INPUT_PORTS_END
220	266
221	267
	268	/*************************************
	269	*
	270	*  Machine driver
	271	*
	272	*************************************/
222	273
	274	static KONAMI_SETLINES_CALLBACK( k88games_banking )
	275	{
	276	_88games_state *state = (_88games_state *)device->machine->driver_data;
	277	UINT8 *RAM = memory_region(device->machine, "maincpu");
	278	int offs;
	279
	280	logerror("%04x: bank select %02x\n", cpu_get_pc(device), lines);
	281
	282	/* bits 0-2 select ROM bank for 0000-1fff */
	283	/* bit 3: when 1, palette RAM at 1000-1fff */
	284	/* bit 4: when 0, 051316 RAM at 3800-3fff; when 1, work RAM at 2000-3fff (NVRAM 3370-37ff) */
	285	offs = 0x10000 + (lines & 0x07) * 0x2000;
	286	memcpy(state->banked_rom, &RAM[offs], 0x1000);
	287	if (lines & 0x08)
	288	{
	289	if (device->machine->generic.paletteram.u8 != paletteram_1000)
	290	{
	291	memcpy(paletteram_1000, device->machine->generic.paletteram.u8, 0x1000);
	292	device->machine->generic.paletteram.u8 = paletteram_1000;
	293	}
	294	}
	295	else
	296	{
	297	if (device->machine->generic.paletteram.u8 != &RAM[0x20000])
	298	{
	299	memcpy(&RAM[0x20000], device->machine->generic.paletteram.u8, 0x1000);
	300	device->machine->generic.paletteram.u8 = &RAM[0x20000];
	301	}
	302	memcpy(paletteram_1000, &RAM[offs+0x1000], 0x1000);
	303	}
	304
	305	state->videobank = lines & 0x10;
	306
	307	/* bit 5 = enable char ROM reading through the video RAM */
	308	k052109_set_rmrd_line(state->k052109, (lines & 0x20) ? ASSERT_LINE : CLEAR_LINE);
	309
	310	/* bit 6 is unknown, 1 most of the time */
	311
	312	/* bit 7 controls layer priority */
	313	state->k88games_priority = lines & 0x80;
	314	}
	315
	316	static MACHINE_START( 88games )
	317	{
	318	_88games_state *state = (_88games_state *)machine->driver_data;
	319
	320	state->audiocpu = devtag_get_device(machine, "audiocpu");
	321	state->k052109 = devtag_get_device(machine, "k052109");
	322	state->k051960 = devtag_get_device(machine, "k051960");
	323	state->k051316 = devtag_get_device(machine, "k051316");
	324	state->upd_1 = devtag_get_device(machine, "upd1");
	325	state->upd_2 = devtag_get_device(machine, "upd2");
	326
	327	state_save_register_global(machine, state->videobank);
	328	state_save_register_global(machine, state->zoomreadroms);
	329	state_save_register_global(machine, state->speech_chip);
	330	state_save_register_global_array(machine, state->layer_colorbase);
	331	state_save_register_global(machine, state->k88games_priority);
	332	state_save_register_global(machine, state->sprite_colorbase);
	333	state_save_register_global(machine, state->zoom_colorbase);
	334	}
	335
	336	static MACHINE_RESET( 88games )
	337	{
	338	_88games_state *state = (_88games_state *)machine->driver_data;
	339
	340	konami_configure_set_lines(devtag_get_device(machine, "maincpu"), k88games_banking);
	341	machine->generic.paletteram.u8 = &memory_region(machine, "maincpu")[0x20000];
	342
	343	state->videobank = 0;
	344	state->zoomreadroms = 0;
	345	state->speech_chip = 0;
	346	state->k88games_priority = 0;
	347	state->layer_colorbase[0] = 64;
	348	state->layer_colorbase[1] = 0;
	349	state->layer_colorbase[2] = 16;
	350	state->sprite_colorbase = 32;
	351	state->zoom_colorbase = 48;
	352	}
	353
	354	static const k052109_interface _88games_k052109_intf =
	355	{
	356	"gfx1", 0,
	357	NORMAL_PLANE_ORDER,
	358	KONAMI_ROM_DEINTERLEAVE_2,
	359	_88games_tile_callback
	360	};
	361
	362	static const k051960_interface _88games_k051960_intf =
	363	{
	364	"gfx2", 1,
	365	NORMAL_PLANE_ORDER,
	366	KONAMI_ROM_DEINTERLEAVE_2,
	367	_88games_sprite_callback
	368	};
	369
	370	static const k051316_interface _88games_k051316_intf =
	371	{
	372	"gfx3", 2,
	373	4, FALSE, 0,
	374	0, 0, 0,
	375	_88games_zoom_callback
	376	};
	377
223	378	static MACHINE_DRIVER_START( 88games )
224	379
	380	/* driver data */
	381	MDRV_DRIVER_DATA(_88games_state)
	382
225	383	/* basic machine hardware */
226	384	MDRV_CPU_ADD("maincpu", KONAMI, 3000000) /* ? */
227	385	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
230	388	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
231	389	MDRV_CPU_PROGRAM_MAP(sound_map)
232	390
	391	MDRV_MACHINE_START(88games)
233	392	MDRV_MACHINE_RESET(88games)
	393
234	394	MDRV_NVRAM_HANDLER(generic_0fill)
235	395
236	396	/* video hardware */
r6740	r6741
244	404	MDRV_SCREEN_VISIBLE_AREA(13*8, (64-13)*8-1, 2*8, 30*8-1 )
245	405	MDRV_PALETTE_LENGTH(2048)
246	406
247		MDRV_VIDEO_START(88games)
	407	MDRV_K052109_ADD("k052109", _88games_k052109_intf)
	408	MDRV_K051960_ADD("k051960", _88games_k051960_intf)
	409	MDRV_K051316_ADD("k051316", _88games_k051316_intf)
	410
248	411	MDRV_VIDEO_UPDATE(88games)
249	412
250		MDRV_MACHINE_START(88games)
251
252	413	/* sound hardware */
253	414	MDRV_SPEAKER_STANDARD_MONO("mono")
254	415
r6740	r6741
265	426
266	427
267	428
268		/***************************************************************************
	429	/*************************************
	430	*
	431	*  ROM definition(s)
	432	*
	433	*************************************/
269	434
270		Game ROMs
271
272		***************************************************************************/
273
274	435	ROM_START( 88games )
275	436	ROM_REGION( 0x21000, "maincpu", 0 ) /* code + banked roms + space for banked ram */
276		ROM_LOAD( "861m01.k18", 0x08000, 0x08000, CRC(4a4e2959) SHA1(95572686bef48b5c1ce1dedf0afc891d92aff00d) )
	437	ROM_LOAD( "861m01.k18", 0x08000, 0x08000, CRC(4a4e2959) SHA1(95572686bef48b5c1ce1dedf0afc891d92aff00d) )
277	438	ROM_LOAD( "861m02.k16", 0x10000, 0x10000, CRC(e19f15f6) SHA1(6c801b274e87eaff7f40148381ade5b38120cc12) )
278	439
279	440	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code */
r6740	r6741
434	595	ROM_END
435	596
436	597
	598	/*************************************
	599	*
	600	*  Game driver(s)
	601	*
	602	*************************************/
437	603
438		static KONAMI_SETLINES_CALLBACK( k88games_banking )
439		{
440		UINT8 *RAM = memory_region(device->machine, "maincpu");
441		int offs;
442
443		logerror("%04x: bank select %02x\n",cpu_get_pc(device),lines);
444
445		/* bits 0-2 select ROM bank for 0000-1fff */
446		/* bit 3: when 1, palette RAM at 1000-1fff */
447		/* bit 4: when 0, 051316 RAM at 3800-3fff; when 1, work RAM at 2000-3fff (NVRAM 3370-37ff) */
448		offs = 0x10000 + (lines & 0x07) * 0x2000;
449		memcpy(banked_rom,&RAM[offs],0x1000);
450		if (lines & 0x08)
451		{
452		if (device->machine->generic.paletteram.u8 != paletteram_1000)
453		{
454		memcpy(paletteram_1000,device->machine->generic.paletteram.u8,0x1000);
455		device->machine->generic.paletteram.u8 = paletteram_1000;
456		}
457		}
458		else
459		{
460		if (device->machine->generic.paletteram.u8 != &RAM[0x20000])
461		{
462		memcpy(&RAM[0x20000],device->machine->generic.paletteram.u8,0x1000);
463		device->machine->generic.paletteram.u8 = &RAM[0x20000];
464		}
465		memcpy(paletteram_1000,&RAM[offs+0x1000],0x1000);
466		}
467		videobank = lines & 0x10;
468
469		/* bit 5 = enable char ROM reading through the video RAM */
470		K052109_set_RMRD_line((lines & 0x20) ? ASSERT_LINE : CLEAR_LINE);
471
472		/* bit 6 is unknown, 1 most of the time */
473
474		/* bit 7 controls layer priority */
475		k88games_priority = lines & 0x80;
476		}
477
478		static MACHINE_RESET( 88games )
479		{
480		konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), k88games_banking);
481		machine->generic.paletteram.u8 = &memory_region(machine, "maincpu")[0x20000];
482		}
483
484		static MACHINE_START( 88games )
485		{
486		state_save_register_global(machine, videobank);
487		state_save_register_global(machine, zoomreadroms);
488		state_save_register_global_array(machine, speech_chip);
489		}
490
491		static DRIVER_INIT( 88games )
492		{
493		konami_rom_deinterleave_2(machine, "gfx1");
494		konami_rom_deinterleave_2(machine, "gfx2");
495		}
496
497
498
499		GAME( 1988, 88games,  0,       88games, 88games, 88games, ROT0, "Konami", "'88 Games", GAME_SUPPORTS_SAVE )
500		GAME( 1988, konami88, 88games, 88games, 88games, 88games, ROT0, "Konami", "Konami '88", GAME_SUPPORTS_SAVE )
501		GAME( 1988, hypsptsp, 88games, 88games, 88games, 88games, ROT0, "Konami", "Hyper Sports Special (Japan)", GAME_SUPPORTS_SAVE )
	604	GAME( 1988, 88games,  0,       88games, 88games, 0, ROT0, "Konami", "'88 Games", GAME_SUPPORTS_SAVE )
	605	GAME( 1988, konami88, 88games, 88games, 88games, 0, ROT0, "Konami", "Konami '88", GAME_SUPPORTS_SAVE )
	606	GAME( 1988, hypsptsp, 88games, 88games, 88games, 0, ROT0, "Konami", "Hyper Sports Special (Japan)", GAME_SUPPORTS_SAVE )

src/mame/drivers/chinagat.c

r6740	r6741
78	78	#include "sound/2203intf.h"
79	79	#include "sound/okim6295.h"
80	80	#include "sound/msm5205.h"
81		#include "ddragon.h"
	81	#include "includes/ddragon.h"
82	82
83	83	#define MAIN_CLOCK      XTAL_12MHz
84	84	#define PIXEL_CLOCK      MAIN_CLOCK / 2

src/mame/drivers/gauntlet.c

r6740	r6741
124	124	#include "sound/tms5220.h"
125	125	#include "sound/2151intf.h"
126	126	#include "sound/pokey.h"
127		#include "gauntlet.h"
	127	#include "includes/gauntlet.h"
128	128
129	129
130	130
131	131	/*************************************
132	132	*
133		*  Statics
134		*
135		*************************************/
136
137
138
139
140		/*************************************
141		*
142	133	*  Initialization & interrupts
143	134	*
144	135	*************************************/
r6740	r6741
163	154	}
164	155
165	156
	157	static MACHINE_START( gauntlet )
	158	{
	159	gauntlet_state *state = (gauntlet_state *)machine->driver_data;
	160	atarigen_init(machine);
	161
	162	state_save_register_global(machine, state->sound_reset_val);
	163	}
	164
	165
166	166	static MACHINE_RESET( gauntlet )
167	167	{
168	168	gauntlet_state *state = (gauntlet_state *)machine->driver_data;
r6740	r6741
514	514	MDRV_CPU_ADD("audiocpu", M6502, ATARI_CLOCK_14MHz/8)
515	515	MDRV_CPU_PROGRAM_MAP(sound_map)
516	516
	517	MDRV_MACHINE_START(gauntlet)
517	518	MDRV_MACHINE_RESET(gauntlet)
518	519	MDRV_NVRAM_HANDLER(atarigen)
519	520

src/mame/drivers/deniam.c

r6740	r6741
47	47	#include "cpu/z80/z80.h"
48	48	#include "sound/okim6295.h"
49	49	#include "sound/3812intf.h"
50		#include "deniam.h"
	50	#include "includes/deniam.h"
51	51
52	52
53	53	static WRITE16_HANDLER( sound_command_w )

src/mame/drivers/redalert.c

r6740	r6741
93	93
94	94	#include "driver.h"
95	95	#include "cpu/m6502/m6502.h"
96		#include "redalert.h"
	96	#include "includes/redalert.h"
97	97
98	98
99	99	#define MAIN_PCB_CLOCK      (XTAL_12_5MHz)

src/mame/drivers/mcr3.c

r6740	r6741
106	106	#include "deprecat.h"
107	107	#include "machine/z80ctc.h"
108	108	#include "audio/mcr.h"
109		#include "mcr.h"
	109	#include "includes/mcr.h"
110	110
111	111	#include "turbotag.lh"
112	112

src/mame/drivers/taito_b.c

r6740	r6741
169	169
170	170	#include "driver.h"
171	171	#include "cpu/z80/z80.h"
172		#include "taitoipt.h"
	172	#include "includes/taitoipt.h"
173	173	#include "cpu/m68000/m68000.h"
174	174	#include "video/taitoic.h"
175	175	#include "machine/eepromdev.h"

src/mame/drivers/mw8080bw.c

r6740	r6741
147	147	#include "cpu/i8085/i8085.h"
148	148	#include "rendlay.h"
149	149	#include "machine/rescap.h"
150		#include "mw8080bw.h"
151	150	#include "machine/mb14241.h"
	151	#include "includes/mw8080bw.h"
152	152
153	153	#include "280zzzap.lh"
154	154	#include "clowns.lh"
r6740	r6741
165	165	*
166	166	*************************************/
167	167
168		static UINT8 rev_shift_res;
169
170
171	168	static READ8_HANDLER( mw8080bw_shift_result_rev_r )
172	169	{
173		UINT8 ret = mb14241_0_shift_result_r(space, 0);
	170	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	171	UINT8 ret = mb14241_shift_result_r(state->mb14241, 0);
174	172
175	173	return BITSWAP8(ret,0,1,2,3,4,5,6,7);
176	174	}
r6740	r6741
178	176
179	177	static READ8_HANDLER( mw8080bw_reversable_shift_result_r )
180	178	{
	179	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
181	180	UINT8 ret;
182	181
183		if (rev_shift_res)
	182	if (state->rev_shift_res)
184	183	{
185	184	ret = mw8080bw_shift_result_rev_r(space, 0);
186	185	}
187	186	else
188	187	{
189		ret = mb14241_0_shift_result_r(space, 0);
	188	ret = mb14241_shift_result_r(state->mb14241, 0);
190	189	}
191	190
192	191	return ret;
r6740	r6741
194	193
195	194	static WRITE8_HANDLER( mw8080bw_reversable_shift_count_w)
196	195	{
197		mb14241_0_shift_count_w(space, offset, data);
	196	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	197	mb14241_shift_count_w(state->mb14241, offset, data);
198	198
199		rev_shift_res = data & 0x08;
	199	state->rev_shift_res = data & 0x08;
200	200	}
201	201
202	202
r6740	r6741
207	207	*
208	208	*************************************/
209	209
210		UINT8 *mw8080bw_ram;
211		size_t mw8080bw_ram_size;
212
213
214	210	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
215	211	ADDRESS_MAP_GLOBAL_MASK(0x7fff)
216	212	AM_RANGE(0x0000, 0x1fff) AM_ROM AM_WRITENOP
217		AM_RANGE(0x2000, 0x3fff) AM_MIRROR(0x4000) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
	213	AM_RANGE(0x2000, 0x3fff) AM_MIRROR(0x4000) AM_RAM AM_BASE_SIZE_MEMBER(mw8080bw_state, main_ram, main_ram_size)
218	214	AM_RANGE(0x4000, 0x5fff) AM_ROM AM_WRITENOP
219	215	ADDRESS_MAP_END
220	216
r6740	r6741
228	224
229	225	MACHINE_DRIVER_START( mw8080bw_root )
230	226
	227	/* driver data */
	228	MDRV_DRIVER_DATA(mw8080bw_state)
	229
231	230	/* basic machine hardware */
232	231	MDRV_CPU_ADD("maincpu",8080,MW8080BW_CPU_CLOCK)
233	232	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
335	334	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ(mw8080bw_shift_result_rev_r)
336	335	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN0")
337	336	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN1")
338		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	337	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
339	338
340	339	AM_RANGE(0x01, 0x01) AM_WRITE(seawolf_explosion_lamp_w)
341	340	AM_RANGE(0x02, 0x02) AM_WRITE(seawolf_periscope_lamp_w)
342		AM_RANGE(0x03, 0x03) AM_WRITE(mb14241_0_shift_data_w)
343		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_count_w)
	341	AM_RANGE(0x03, 0x03) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
	342	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
344	343	AM_RANGE(0x05, 0x05) AM_WRITE(seawolf_audio_w)
345	344	ADDRESS_MAP_END
346	345
r6740	r6741
413	412	MDRV_CPU_IO_MAP(seawolf_io_map)
414	413	/* there is no watchdog */
415	414
	415	/* add shifter */
	416	MDRV_MB14241_ADD("mb14241")
	417
416	418	/* audio hardware */
417	419	MDRV_IMPORT_FROM(seawolf_audio)
418	420
r6740	r6741
428	430
429	431	static WRITE8_HANDLER( gunfight_io_w )
430	432	{
431		if (offset & 0x01)  gunfight_audio_w(space, 0, data);
	433	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
432	434
433		if (offset & 0x02)  mb14241_0_shift_count_w(space, 0, data);
	435	if (offset & 0x01)
	436	gunfight_audio_w(space, 0, data);
434	437
435		if (offset & 0x04)  mb14241_0_shift_data_w(space, 0, data);
	438	if (offset & 0x02)
	439	mb14241_shift_count_w(state->mb14241, 0, data);
	440
	441	if (offset & 0x04)
	442	mb14241_shift_data_w(state->mb14241, 0, data);
436	443	}
437	444
438	445
r6740	r6741
441	448	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ_PORT("IN0")
442	449	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN1")
443	450	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN2")
444		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	451	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
445	452
446	453	/* no decoder, just 3 AND gates */
447	454	AM_RANGE(0x00, 0x07) AM_WRITE(gunfight_io_w)
r6740	r6741
507	514	MDRV_CPU_IO_MAP(gunfight_io_map)
508	515	/* there is no watchdog */
509	516
	517	/* add shifter */
	518	MDRV_MB14241_ADD("mb14241")
	519
510	520	/* audio hardware */
511	521	MDRV_IMPORT_FROM(gunfight_audio)
512	522
r6740	r6741
617	627
618	628	static WRITE8_HANDLER( tornbase_io_w )
619	629	{
620		if (offset & 0x01)  tornbase_audio_w(devtag_get_device(space->machine, "discrete"), 0, data);
	630	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
621	631
622		if (offset & 0x02)  mb14241_0_shift_count_w(space, 0, data);
	632	if (offset & 0x01)
	633	tornbase_audio_w(devtag_get_device(space->machine, "discrete"), 0, data);
623	634
624		if (offset & 0x04)  mb14241_0_shift_data_w(space, 0, data);
	635	if (offset & 0x02)
	636	mb14241_shift_count_w(state->mb14241, 0, data);
	637
	638	if (offset & 0x04)
	639	mb14241_shift_data_w(state->mb14241, 0, data);
625	640	}
626	641
627	642
r6740	r6741
630	645	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ_PORT("IN0")
631	646	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN1")
632	647	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN2")
633		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	648	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
634	649
635	650	/* no decoder, just 3 AND gates */
636	651	AM_RANGE(0x00, 0x07) AM_WRITE(tornbase_io_w)
r6740	r6741
730	745	MDRV_CPU_IO_MAP(tornbase_io_map)
731	746	/* there is no watchdog */
732	747
	748	/* add shifter */
	749	MDRV_MB14241_ADD("mb14241")
	750
733	751	/* audio hardware */
734	752	MDRV_IMPORT_FROM(tornbase_audio)
735	753
r6740	r6741
748	766	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ_PORT("IN0")
749	767	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN1")
750	768	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN2")
751		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	769	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
752	770
753	771	AM_RANGE(0x02, 0x02) AM_WRITE(zzzap_audio_1_w)
754		AM_RANGE(0x03, 0x03) AM_WRITE(mb14241_0_shift_data_w)
755		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_count_w)
	772	AM_RANGE(0x03, 0x03) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
	773	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
756	774	AM_RANGE(0x05, 0x05) AM_WRITE(zzzap_audio_2_w)
757	775	AM_RANGE(0x07, 0x07) AM_WRITE(watchdog_reset_w)
758	776	ADDRESS_MAP_END
r6740	r6741
843	861	MDRV_CPU_IO_MAP(zzzap_io_map)
844	862	MDRV_WATCHDOG_TIME_INIT(NSEC(PERIOD_OF_555_MONOSTABLE_NSEC(RES_M(1), CAP_U(1)))) /* 1.1s */
845	863
	864	/* add shifter */
	865	MDRV_MB14241_ADD("mb14241")
	866
846	867	/* audio hardware */
847	868	/* MDRV_IMPORT_FROM(zzzap_audio) */
848	869
r6740	r6741
859	880	/* schematic says 12.5 Hz, but R/C values shown give 8.5Hz */
860	881	#define MAZE_555_B1_PERIOD      PERIOD_OF_555_ASTABLE(RES_K(33) /* R200 */, RES_K(68) /* R201 */, CAP_U(1) /* C201 */)
861	882
862		/* output of IC C1, pin 5 */
863		static UINT8 maze_tone_timing_state;
864
865
866	883	static STATE_POSTLOAD( maze_update_discrete )
867	884	{
868		maze_write_discrete(devtag_get_device(machine, "discrete"), maze_tone_timing_state);
	885	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	886	maze_write_discrete(devtag_get_device(machine, "discrete"), state->maze_tone_timing_state);
869	887	}
870	888
871	889
872	890	static TIMER_CALLBACK( maze_tone_timing_timer_callback )
873	891	{
874		maze_tone_timing_state = !maze_tone_timing_state;
875		maze_write_discrete(devtag_get_device(machine, "discrete"), maze_tone_timing_state);
	892	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	893	state->maze_tone_timing_state = !state->maze_tone_timing_state;
	894	maze_write_discrete(state->discrete, state->maze_tone_timing_state);
876	895	}
877	896
878	897
879	898	static MACHINE_START( maze )
880	899	{
	900	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	901
881	902	/* create astable timer for IC B1 */
882	903	timer_pulse(machine, MAZE_555_B1_PERIOD, NULL, 0, maze_tone_timing_timer_callback);
883	904
884	905	/* initialize state of Tone Timing FF, IC C1 */
885		maze_tone_timing_state = 0;
	906	state->maze_tone_timing_state = 0;
886	907
887	908	/* setup for save states */
888		state_save_register_global(machine, maze_tone_timing_state);
	909	state_save_register_global(machine, state->maze_tone_timing_state);
889	910	state_save_register_postload(machine, maze_update_discrete, NULL);
890	911
891	912	MACHINE_START_CALL(mw8080bw);
r6740	r6741
970	991
971	992	static MACHINE_START( boothill )
972	993	{
	994	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	995
973	996	/* setup for save states */
974		state_save_register_global(machine, rev_shift_res);
	997	state_save_register_global(machine, state->rev_shift_res);
975	998
976	999	MACHINE_START_CALL(mw8080bw);
977	1000	}
r6740	r6741
985	1008	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mw8080bw_reversable_shift_result_r)
986	1009
987	1010	AM_RANGE(0x01, 0x01) AM_WRITE(mw8080bw_reversable_shift_count_w)
988		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	1011	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
989	1012	AM_RANGE(0x03, 0x03) AM_DEVWRITE("discrete", boothill_audio_w)
990	1013	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
991	1014	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", midway_tone_generator_lo_w)
r6740	r6741
1032	1055	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
1033	1056	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1034	1057
1035		PORT_START("MUSIC_ADJ")  /* 3 */
	1058	PORT_START("MUSIC_ADJ")
1036	1059	PORT_ADJUSTER( 35, "Music Volume" )
1037	1060	INPUT_PORTS_END
1038	1061
r6740	r6741
1046	1069	MDRV_MACHINE_START(boothill)
1047	1070	MDRV_WATCHDOG_TIME_INIT(NSEC(PERIOD_OF_555_MONOSTABLE_NSEC(RES_K(270), CAP_U(10)))) /* 2.97s */
1048	1071
	1072	/* add shifter */
	1073	MDRV_MB14241_ADD("mb14241")
	1074
1049	1075	/* audio hardware */
1050	1076	MDRV_IMPORT_FROM(boothill_audio)
1051	1077
r6740	r6741
1061	1087
1062	1088	static WRITE8_HANDLER( checkmat_io_w )
1063	1089	{
1064		if (offset & 0x01)  checkmat_audio_w(devtag_get_device(space->machine, "discrete"), 0, data);
	1090	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
1065	1091
	1092	if (offset & 0x01)  checkmat_audio_w(state->discrete, 0, data);
	1093
1066	1094	if (offset & 0x02)  watchdog_reset_w(space, 0, data);
1067	1095	}
1068	1096
r6740	r6741
1132	1160	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
1133	1161	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 )
1134	1162
1135		PORT_START("R309")  /* 4 */
	1163	PORT_START("R309")
1136	1164	PORT_ADJUSTER( 50, "Boom Volume" )
1137	1165
1138		PORT_START("R411")  /* 5 */
	1166	PORT_START("R411")
1139	1167	PORT_ADJUSTER( 50, "Tone Volume" )
1140	1168	INPUT_PORTS_END
1141	1169
r6740	r6741
1165	1193	#define DESERTGU_DIP_SW_0_1_SET_2_TAG   ("DIPSW01SET2")
1166	1194
1167	1195
1168		static UINT8 desertgu_controller_select;
1169
1170
1171	1196	static MACHINE_START( desertgu )
1172	1197	{
	1198	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	1199
1173	1200	/* setup for save states */
1174		state_save_register_global(machine, desertgu_controller_select);
	1201	state_save_register_global(machine, state->desertgun_controller_select);
1175	1202
1176	1203	MACHINE_START_CALL(mw8080bw);
1177	1204	}
1178	1205
1179	1206
1180		void desertgun_set_controller_select(UINT8 data)
1181		{
1182		desertgu_controller_select = data;
1183		}
1184
1185
1186	1207	static CUSTOM_INPUT( desertgu_gun_input_r )
1187	1208	{
	1209	mw8080bw_state *state = (mw8080bw_state *)field->port->machine->driver_data;
1188	1210	UINT32 ret;
1189	1211
1190		if (desertgu_controller_select)
	1212	if (state->desertgun_controller_select)
1191	1213	ret = input_port_read(field->port->machine, DESERTGU_GUN_X_PORT_TAG);
1192	1214	else
1193	1215	ret = input_port_read(field->port->machine, DESERTGU_GUN_Y_PORT_TAG);
r6740	r6741
1198	1220
1199	1221	static CUSTOM_INPUT( desertgu_dip_sw_0_1_r )
1200	1222	{
	1223	mw8080bw_state *state = (mw8080bw_state *)field->port->machine->driver_data;
1201	1224	UINT32 ret;
1202	1225
1203		if (desertgu_controller_select)
	1226	if (state->desertgun_controller_select)
1204	1227	ret = input_port_read(field->port->machine, DESERTGU_DIP_SW_0_1_SET_2_TAG);
1205	1228	else
1206	1229	ret = input_port_read(field->port->machine, DESERTGU_DIP_SW_0_1_SET_1_TAG);
r6740	r6741
1214	1237	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ(mw8080bw_shift_result_rev_r)
1215	1238	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN0")
1216	1239	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN1")
1217		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	1240	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
1218	1241
1219		AM_RANGE(0x01, 0x01) AM_WRITE(mb14241_0_shift_count_w)
1220		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	1242	AM_RANGE(0x01, 0x01) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1243	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1221	1244	AM_RANGE(0x03, 0x03) AM_DEVWRITE("discrete", desertgu_audio_1_w)
1222	1245	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
1223	1246	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", midway_tone_generator_lo_w)
r6740	r6741
1284	1307	MDRV_MACHINE_START(desertgu)
1285	1308	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
1286	1309
	1310	/* add shifter */
	1311	MDRV_MB14241_ADD("mb14241")
	1312
1287	1313	/* audio hardware */
1288	1314	MDRV_IMPORT_FROM(desertgu_audio)
1289	1315
r6740	r6741
1334	1360	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ_PORT("IN0")
1335	1361	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN1")
1336	1362	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN2")
1337		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	1363	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
1338	1364
1339		AM_RANGE(0x01, 0x01) AM_WRITE(mb14241_0_shift_count_w)
1340		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	1365	AM_RANGE(0x01, 0x01) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1366	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1341	1367	AM_RANGE(0x03, 0x03) AM_DEVWRITE("discrete", dplay_audio_w)
1342	1368	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
1343	1369	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", midway_tone_generator_lo_w)
r6740	r6741
1481	1507	MDRV_CPU_IO_MAP(dplay_io_map)
1482	1508	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
1483	1509
	1510	/* add shifter */
	1511	MDRV_MB14241_ADD("mb14241")
	1512
1484	1513	/* audio hardware */
1485	1514	MDRV_IMPORT_FROM(dplay_audio)
1486	1515
r6740	r6741
1496	1525
1497	1526	static MACHINE_START( gmissile )
1498	1527	{
	1528	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	1529
1499	1530	/* setup for save states */
1500		state_save_register_global(machine, rev_shift_res);
	1531	state_save_register_global(machine, state->rev_shift_res);
1501	1532
1502	1533	MACHINE_START_CALL(mw8080bw);
1503	1534	}
r6740	r6741
1511	1542	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mw8080bw_reversable_shift_result_r)
1512	1543
1513	1544	AM_RANGE(0x01, 0x01) AM_WRITE(mw8080bw_reversable_shift_count_w)
1514		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	1545	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1515	1546	AM_RANGE(0x03, 0x03) AM_WRITE(gmissile_audio_1_w)
1516	1547	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
1517	1548	AM_RANGE(0x05, 0x05) AM_WRITE(gmissile_audio_2_w)
r6740	r6741
1573	1604	MDRV_MACHINE_START(gmissile)
1574	1605	MDRV_WATCHDOG_VBLANK_INIT(255) /* really based on a 60Hz clock source */
1575	1606
	1607	/* add shifter */
	1608	MDRV_MB14241_ADD("mb14241")
	1609
1576	1610	/* audio hardware */
1577	1611	MDRV_IMPORT_FROM(gmissile_audio)
1578	1612
r6740	r6741
1588	1622
1589	1623	static MACHINE_START( m4 )
1590	1624	{
	1625	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	1626
1591	1627	/* setup for save states */
1592		state_save_register_global(machine, rev_shift_res);
	1628	state_save_register_global(machine, state->rev_shift_res);
1593	1629
1594	1630	MACHINE_START_CALL(mw8080bw);
1595	1631	}
r6740	r6741
1603	1639	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mw8080bw_reversable_shift_result_r)
1604	1640
1605	1641	AM_RANGE(0x01, 0x01) AM_WRITE(mw8080bw_reversable_shift_count_w)
1606		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	1642	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1607	1643	AM_RANGE(0x03, 0x03) AM_WRITE(m4_audio_1_w)
1608	1644	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
1609	1645	AM_RANGE(0x05, 0x05) AM_WRITE(m4_audio_2_w)
r6740	r6741
1663	1699	MDRV_MACHINE_START(m4)
1664	1700	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
1665	1701
	1702	/* add shifter */
	1703	MDRV_MB14241_ADD("mb14241")
	1704
1666	1705	/* audio hardware */
1667	1706	MDRV_IMPORT_FROM(m4_audio)
1668	1707
r6740	r6741
1680	1719	#define CLOWNS_CONTROLLER_P2_TAG      ("CONTP2")
1681	1720
1682	1721
1683		static UINT8 clowns_controller_select;
1684
1685
1686	1722	static MACHINE_START( clowns )
1687	1723	{
	1724	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	1725
1688	1726	/* setup for save states */
1689		state_save_register_global(machine, clowns_controller_select);
	1727	state_save_register_global(machine, state->clowns_controller_select);
1690	1728
1691	1729	MACHINE_START_CALL(mw8080bw);
1692	1730	}
1693	1731
1694	1732
1695		void clowns_set_controller_select(UINT8 data)
1696		{
1697		clowns_controller_select = data;
1698		}
1699
1700
1701	1733	static CUSTOM_INPUT( clowns_controller_r )
1702	1734	{
	1735	mw8080bw_state *state = (mw8080bw_state *)field->port->machine->driver_data;
1703	1736	UINT32 ret;
1704	1737
1705		if (clowns_controller_select)
	1738	if (state->clowns_controller_select)
1706	1739	{
1707	1740	ret = input_port_read(field->port->machine, CLOWNS_CONTROLLER_P2_TAG);
1708	1741	}
r6740	r6741
1720	1753	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ_PORT("IN0")
1721	1754	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN1")
1722	1755	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN2")
1723		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	1756	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
1724	1757
1725		AM_RANGE(0x01, 0x01) AM_WRITE(mb14241_0_shift_count_w)
1726		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	1758	AM_RANGE(0x01, 0x01) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1759	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1727	1760	AM_RANGE(0x03, 0x03) AM_WRITE(clowns_audio_1_w)
1728	1761	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
1729	1762	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", midway_tone_generator_lo_w)
r6740	r6741
1837	1870	MDRV_MACHINE_START(clowns)
1838	1871	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
1839	1872
	1873	/* add shifter */
	1874	MDRV_MB14241_ADD("mb14241")
	1875
1840	1876	/* audio hardware */
1841	1877	MDRV_IMPORT_FROM(clowns_audio)
1842	1878
r6740	r6741
1856	1892	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
1857	1893	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
1858	1894	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2")
1859		AM_RANGE(0x03, 0x03) AM_READ(mb14241_0_shift_result_r)
	1895	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r)
1860	1896
1861		AM_RANGE(0x01, 0x01) AM_WRITE(mb14241_0_shift_count_w)
1862		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	1897	AM_RANGE(0x01, 0x01) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1898	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1863	1899	AM_RANGE(0x03, 0x03) AM_DEVWRITE("discrete", spacwalk_audio_1_w)
1864	1900	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
1865	1901	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", midway_tone_generator_lo_w)
r6740	r6741
1929	1965	MDRV_MACHINE_START(clowns)
1930	1966	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
1931	1967
	1968	/* add shifter */
	1969	MDRV_MB14241_ADD("mb14241")
	1970
1932	1971	/* audio hardware */
1933	1972	MDRV_IMPORT_FROM(spacwalk_audio)
1934	1973
r6740	r6741
1944	1983
1945	1984	static ADDRESS_MAP_START( shuffle_io_map, ADDRESS_SPACE_IO, 8 )
1946	1985	ADDRESS_MAP_GLOBAL_MASK(0xf)   /* yes, 4, and no mirroring on the read handlers */
1947		AM_RANGE(0x01, 0x01) AM_READ(mb14241_0_shift_result_r)
	1986	AM_RANGE(0x01, 0x01) AM_DEVREAD("mb14241", mb14241_shift_result_r)
1948	1987	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN0")
1949	1988	AM_RANGE(0x03, 0x03) AM_READ(mw8080bw_shift_result_rev_r)
1950	1989	AM_RANGE(0x04, 0x04) AM_READ_PORT("IN1")
1951	1990	AM_RANGE(0x05, 0x05) AM_READ_PORT("IN2")
1952	1991	AM_RANGE(0x06, 0x06) AM_READ_PORT("IN3")
1953	1992
1954		AM_RANGE(0x01, 0x01) AM_MIRROR(0x08) AM_WRITE(mb14241_0_shift_count_w)
1955		AM_RANGE(0x02, 0x02) AM_MIRROR(0x08) AM_WRITE(mb14241_0_shift_data_w)
	1993	AM_RANGE(0x01, 0x01) AM_MIRROR(0x08) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1994	AM_RANGE(0x02, 0x02) AM_MIRROR(0x08) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1956	1995	AM_RANGE(0x04, 0x04) AM_MIRROR(0x08) AM_WRITE(watchdog_reset_w)
1957	1996	AM_RANGE(0x05, 0x05) AM_MIRROR(0x08) AM_DEVWRITE("discrete", shuffle_audio_1_w)
1958	1997	AM_RANGE(0x06, 0x06) AM_MIRROR(0x08) AM_DEVWRITE("discrete", shuffle_audio_2_w)
r6740	r6741
2007	2046	MDRV_CPU_IO_MAP(shuffle_io_map)
2008	2047	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
2009	2048
	2049	/* add shifter */
	2050	MDRV_MB14241_ADD("mb14241")
	2051
2010	2052	/* audio hardware */
2011	2053	MDRV_IMPORT_FROM(shuffle_audio)
2012	2054
r6740	r6741
2025	2067	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ_PORT("IN0")
2026	2068	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN1")
2027	2069	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN2")
2028		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	2070	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
2029	2071
2030		AM_RANGE(0x01, 0x01) AM_WRITE(mb14241_0_shift_count_w)
2031		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	2072	AM_RANGE(0x01, 0x01) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	2073	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
2032	2074	AM_RANGE(0x03, 0x03) AM_WRITE(dogpatch_audio_w)
2033	2075	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
2034	2076	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", midway_tone_generator_lo_w)
r6740	r6741
2092	2134	/* Midway boards of the era used the same circuit */
2093	2135	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
2094	2136
	2137	/* add shifter */
	2138	MDRV_MB14241_ADD("mb14241")
	2139
2095	2140	/* audio hardware */
2096	2141	MDRV_IMPORT_FROM(dogpatch_audio)
2097	2142
r6740	r6741
2109	2154	#define SPCENCTR_STROBE_DUTY_CYCLE   (95)    /* % */
2110	2155
2111	2156
2112		static UINT8 spcenctr_strobe_state;
2113		static UINT8 spcenctr_trench_width;
2114		static UINT8 spcenctr_trench_center;
2115		static UINT8 spcenctr_trench_slope[16];  /* 16x4 bit RAM */
2116
2117
2118	2157	static TIMER_DEVICE_CALLBACK( spcenctr_strobe_timer_callback )
2119	2158	{
2120		output_set_value("STROBE", param && spcenctr_strobe_state);
	2159	mw8080bw_state *state = (mw8080bw_state *)timer->machine->driver_data;
	2160	output_set_value("STROBE", param && state->spcenctr_strobe_state);
2121	2161	}
2122	2162
2123	2163
2124	2164	static MACHINE_START( spcenctr )
2125	2165	{
	2166	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	2167
2126	2168	/* setup for save states */
2127		state_save_register_global(machine, spcenctr_strobe_state);
2128		state_save_register_global(machine, spcenctr_trench_width);
2129		state_save_register_global(machine, spcenctr_trench_center);
2130		state_save_register_global_array(machine, spcenctr_trench_slope);
	2169	state_save_register_global(machine, state->spcenctr_strobe_state);
	2170	state_save_register_global(machine, state->spcenctr_trench_width);
	2171	state_save_register_global(machine, state->spcenctr_trench_center);
	2172	state_save_register_global_array(machine, state->spcenctr_trench_slope);
2131	2173
2132	2174	MACHINE_START_CALL(mw8080bw);
2133	2175	}
2134	2176
2135
2136		void spcenctr_set_strobe_state(UINT8 data)
	2177	#if 0
	2178	UINT8 spcenctr_get_trench_width( *running_machine *machine )
2137	2179	{
2138		spcenctr_strobe_state = data;
	2180	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	2181	return state->spcenctr_trench_width;
2139	2182	}
2140	2183
2141	2184
2142		UINT8 spcenctr_get_trench_width(void)
	2185	UINT8 spcenctr_get_trench_center( *running_machine *machine )
2143	2186	{
2144		return spcenctr_trench_width;
	2187	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	2188	return state->spcenctr_trench_center;
2145	2189	}
2146	2190
2147	2191
2148		UINT8 spcenctr_get_trench_center(void)
	2192	UINT8 spcenctr_get_trench_slope( *running_machine *machine , UINT8 addr )
2149	2193	{
2150		return spcenctr_trench_center;
	2194	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	2195	return state->spcenctr_trench_slope[addr & 0x0f];
2151	2196	}
	2197	#endif
2152	2198
2153
2154		UINT8 spcenctr_get_trench_slope(UINT8 addr)
2155		{
2156		return spcenctr_trench_slope[addr & 0x0f];
2157		}
2158
2159
2160	2199	static WRITE8_HANDLER( spcenctr_io_w )
2161	2200	{                                    /* A7 A6 A5 A4 A3 A2 A1 A0 */
	2201	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
	2202
2162	2203	if ((offset & 0x07) == 0x02)
2163	2204	watchdog_reset_w(space, 0, data);      /*  -  -  -  -  -  0  1  0 */
2164	2205
2165	2206	else if ((offset & 0x5f) == 0x01)
2166		spcenctr_audio_1_w(devtag_get_device(space->machine, "discrete"), 0, data);   /*  -  0  -  0  0  0  0  1 */
	2207	spcenctr_audio_1_w(state->discrete, 0, data);   /*  -  0  -  0  0  0  0  1 */
2167	2208
2168	2209	else if ((offset & 0x5f) == 0x09)
2169		spcenctr_audio_2_w(devtag_get_device(space->machine, "discrete"), 0, data);   /*  -  0  -  0  1  0  0  1 */
	2210	spcenctr_audio_2_w(state->discrete, 0, data);   /*  -  0  -  0  1  0  0  1 */
2170	2211
2171	2212	else if ((offset & 0x5f) == 0x11)
2172		spcenctr_audio_3_w(devtag_get_device(space->machine, "discrete"), 0, data);   /*  -  0  -  1  0  0  0  1 */
	2213	spcenctr_audio_3_w(state->discrete, 0, data);   /*  -  0  -  1  0  0  0  1 */
2173	2214
2174	2215	else if ((offset & 0x07) == 0x03)
2175	2216	{                                 /*  -  -  -  -  -  0  1  1 */
2176	2217	UINT8 addr = ((offset & 0xc0) >> 4) | ((offset & 0x18) >> 3);
2177		spcenctr_trench_slope[addr] = data;
	2218	state->spcenctr_trench_slope[addr] = data;
2178	2219	}
2179	2220	else if ((offset & 0x07) == 0x04)
2180		spcenctr_trench_center = data;         /*  -  -  -  -  -  1  0  0 */
	2221	state->spcenctr_trench_center = data;         /*  -  -  -  -  -  1  0  0 */
2181	2222
2182	2223	else if ((offset & 0x07) == 0x07)
2183		spcenctr_trench_width = data;         /*  -  -  -  -  -  1  1  1 */
	2224	state->spcenctr_trench_width = data;         /*  -  -  -  -  -  1  1  1 */
2184	2225
2185	2226	else
2186	2227	logerror("%04x:  Unmapped I/O port write to %02x = %02x\n", cpu_get_pc(space->cpu), offset, data);
r6740	r6741
2282	2323	*
2283	2324	*************************************/
2284	2325
2285		static UINT16 phantom2_cloud_counter = 0;
2286	2326
2287
2288	2327	static MACHINE_START( phantom2 )
2289	2328	{
	2329	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	2330
2290	2331	/* setup for save states */
2291		state_save_register_global(machine, phantom2_cloud_counter);
	2332	state_save_register_global(machine, state->phantom2_cloud_counter);
2292	2333
2293	2334	MACHINE_START_CALL(mw8080bw);
2294	2335	}
2295	2336
2296	2337
2297		UINT16 phantom2_get_cloud_counter(void)
2298		{
2299		return phantom2_cloud_counter;
2300		}
2301
2302
2303		void phantom2_set_cloud_counter(UINT16 data)
2304		{
2305		phantom2_cloud_counter = data;
2306		}
2307
2308
2309	2338	static ADDRESS_MAP_START( phantom2_io_map, ADDRESS_SPACE_IO, 8 )
2310	2339	ADDRESS_MAP_GLOBAL_MASK(0x7)
2311	2340	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ(mw8080bw_shift_result_rev_r)
2312	2341	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN0")
2313	2342	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN1")
2314		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	2343	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
2315	2344
2316		AM_RANGE(0x01, 0x01) AM_WRITE(mb14241_0_shift_count_w)
2317		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	2345	AM_RANGE(0x01, 0x01) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	2346	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
2318	2347	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
2319	2348	AM_RANGE(0x05, 0x05) AM_WRITE(phantom2_audio_1_w)
2320	2349	AM_RANGE(0x06, 0x06) AM_WRITE(phantom2_audio_2_w)
r6740	r6741
2370	2399	MDRV_VIDEO_UPDATE(phantom2)
2371	2400	MDRV_VIDEO_EOF(phantom2)
2372	2401
	2402	/* add shifter */
	2403	MDRV_MB14241_ADD("mb14241")
	2404
2373	2405	/* audio hardware */
2374	2406	MDRV_IMPORT_FROM(phantom2_audio)
2375	2407
r6740	r6741
2388	2420	/* ZV - not too sure why this is needed, I don't see
2389	2421	anything unusual on the schematics that would cause
2390	2422	the bits to flip */
	2423	mw8080bw_state *state = (mw8080bw_state *)space->machine->driver_data;
2391	2424
2392		return ~mb14241_0_shift_result_r(space,0);
	2425	return ~mb14241_shift_result_r(state->mb14241, 0);
2393	2426	}
2394	2427
2395	2428	static WRITE8_HANDLER( bowler_lights_1_w )
r6740	r6741
2437	2470	AM_RANGE(0x05, 0x05) AM_READ_PORT("IN2")
2438	2471	AM_RANGE(0x06, 0x06) AM_READ_PORT("IN3")
2439	2472
2440		AM_RANGE(0x01, 0x01) AM_WRITE(mb14241_0_shift_count_w)
2441		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	2473	AM_RANGE(0x01, 0x01) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	2474	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
2442	2475	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
2443	2476	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", bowler_audio_1_w)
2444	2477	AM_RANGE(0x06, 0x06) AM_WRITE(bowler_audio_2_w)
r6740	r6741
2501	2534	MDRV_CPU_IO_MAP(bowler_io_map)
2502	2535	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
2503	2536
	2537	/* add shifter */
	2538	MDRV_MB14241_ADD("mb14241")
	2539
2504	2540	/* audio hardware */
2505	2541	MDRV_IMPORT_FROM(bowler_audio)
2506	2542
r6740	r6741
2518	2554	#define INVADERS_SW6_SW7_PORT_TAG      ("SW6SW7")
2519	2555	#define INVADERS_SW5_PORT_TAG         ("SW5")
2520	2556
2521		static UINT8 invaders_flip_screen = 0;
2522	2557
2523
2524	2558	static MACHINE_START( invaders )
2525	2559	{
	2560	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	2561
2526	2562	/* setup for save states */
2527		state_save_register_global(machine, invaders_flip_screen);
	2563	state_save_register_global(machine, state->invaders_flip_screen);
2528	2564
2529	2565	MACHINE_START_CALL(mw8080bw);
2530	2566	}
2531	2567
2532	2568
2533		UINT8 invaders_is_flip_screen(void)
2534		{
2535		return invaders_flip_screen;
2536		}
2537	2569
2538
2539		void invaders_set_flip_screen(UINT8 data)
2540		{
2541		invaders_flip_screen = data;
2542		}
2543
2544
2545	2570	static CUSTOM_INPUT( invaders_coin_input_r )
2546	2571	{
2547	2572	UINT32 ret = input_port_read(field->port->machine, INVADERS_COIN_INPUT_PORT_TAG);
r6740	r6741
2633	2658	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ_PORT("IN0")
2634	2659	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN1")
2635	2660	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN2")
2636		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	2661	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
2637	2662
2638		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_count_w)
	2663	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
2639	2664	AM_RANGE(0x03, 0x03) AM_DEVWRITE("discrete", invaders_audio_1_w)
2640		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	2665	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
2641	2666	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", invaders_audio_2_w)
2642	2667	AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
2643	2668	ADDRESS_MAP_END
r6740	r6741
2730	2755	/* video hardware */
2731	2756	MDRV_VIDEO_UPDATE(invaders)
2732	2757
	2758	/* add shifter */
	2759	MDRV_MB14241_ADD("mb14241")
	2760
2733	2761	/* audio hardware */
2734	2762	MDRV_IMPORT_FROM(invaders_audio)
2735	2763
r6740	r6741
2761	2789	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ(mw8080bw_shift_result_rev_r)
2762	2790	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN0")
2763	2791	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN1")
2764		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	2792	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
2765	2793
2766		AM_RANGE(0x01, 0x01) AM_WRITE(mb14241_0_shift_count_w)
2767		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_data_w)
	2794	AM_RANGE(0x01, 0x01) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	2795	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
2768	2796	AM_RANGE(0x03, 0x03) AM_DEVWRITE("discrete", blueshrk_audio_w)
2769	2797	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
2770	2798	ADDRESS_MAP_END
r6740	r6741
2806	2834	MDRV_CPU_IO_MAP(blueshrk_io_map)
2807	2835	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
2808	2836
	2837	/* add shifter */
	2838	MDRV_MB14241_ADD("mb14241")
	2839
2809	2840	/* audio hardware */
2810	2841	MDRV_IMPORT_FROM(blueshrk_audio)
2811	2842
r6740	r6741
2839	2870	AM_RANGE(0x00, 0x00) AM_MIRROR(0x04) AM_READ_PORT("IN0")
2840	2871	AM_RANGE(0x01, 0x01) AM_MIRROR(0x04) AM_READ_PORT("IN1")
2841	2872	AM_RANGE(0x02, 0x02) AM_MIRROR(0x04) AM_READ_PORT("IN2")
2842		AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_READ(mb14241_0_shift_result_r)
	2873	AM_RANGE(0x03, 0x03) AM_MIRROR(0x04) AM_DEVREAD("mb14241", mb14241_shift_result_r)
2843	2874
2844	2875	AM_RANGE(0x01, 0x01) AM_DEVWRITE("discrete", invad2ct_audio_3_w)
2845		AM_RANGE(0x02, 0x02) AM_WRITE(mb14241_0_shift_count_w)
	2876	AM_RANGE(0x02, 0x02) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
2846	2877	AM_RANGE(0x03, 0x03) AM_DEVWRITE("discrete", invad2ct_audio_1_w)
2847		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	2878	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
2848	2879	AM_RANGE(0x05, 0x05) AM_DEVWRITE("discrete", invad2ct_audio_2_w)
2849	2880	AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
2850	2881	AM_RANGE(0x07, 0x07) AM_DEVWRITE("discrete", invad2ct_audio_4_w)
r6740	r6741
2904	2935	MDRV_CPU_IO_MAP(invad2ct_io_map)
2905	2936	MDRV_WATCHDOG_TIME_INIT(USEC(255000000 / (MW8080BW_PIXEL_CLOCK / MW8080BW_HTOTAL / MW8080BW_VTOTAL)))
2906	2937
	2938	/* add shifter */
	2939	MDRV_MB14241_ADD("mb14241")
	2940
2907	2941	/* audio hardware */
2908	2942	MDRV_IMPORT_FROM(invad2ct_audio)
2909	2943

src/mame/drivers/vaportra.c

r6740	r6741
14	14	#include "sound/2203intf.h"
15	15	#include "sound/2151intf.h"
16	16	#include "sound/okim6295.h"
17		#include "deco16ic.h"
	17	#include "includes/deco16ic.h"
18	18
19	19	VIDEO_START( vaportra );
20	20	VIDEO_UPDATE( vaportra );

src/mame/drivers/suna8.c

r6740	r6741
569	569	return 0x02;
570	570	}
571	571
	572	static WRITE8_HANDLER( sranger_prot_w )
	573	{
	574	/* check code at 0x2ce2 (in sranger), protection is so dire that I can't even exactly
	575	estabilish if what I'm doing can be considered or not a kludge... -AS */
	576	memory_write_byte(space,0xcd99,0xff);
	577	}
	578
572	579	static ADDRESS_MAP_START( rranger_map, ADDRESS_SPACE_PROGRAM, 8 )
573	580	AM_RANGE(0x0000, 0x7fff) AM_ROM                        // ROM
574	581	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")                  // Banked ROM
r6740	r6741
577	584	AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P1")               // P1 (Inputs)
578	585	AM_RANGE(0xc003, 0xc003) AM_READ_PORT("P2")               // P2
579	586	AM_RANGE(0xc004, 0xc004) AM_READ(rranger_soundstatus_r   )   // Latch Status?
580		AM_RANGE(0xc200, 0xc200) AM_NOP                        // Protection?
	587	AM_RANGE(0xc200, 0xc200) AM_READNOP AM_WRITE(sranger_prot_w)// Protection?
581	588	AM_RANGE(0xc280, 0xc280) AM_WRITENOP   // ? NMI Ack
582	589	AM_RANGE(0xc280, 0xc280) AM_READ_PORT("DSW1")            // DSW 1
583	590	AM_RANGE(0xc2c0, 0xc2c0) AM_READ_PORT("DSW2")            // DSW 2
r6740	r6741
821	828	Spark Man
822	829	***************************************************************************/
823	830
824		/* Probably wrong: */
825		static WRITE8_HANDLER( sparkman_nmi_w )
	831	/*
	832	Thrash protection code snippet:
	833
	834	0B48: 3E 81         ld   a,$81
	835	0B4A: 32 BF C3      ld   ($C3BF),a
	836	0B4D: 21 10 D0      ld   hl,$C808
	837	0B50: 11 11 D0      ld   de,$C809
	838	0B53: ED 5F         ld   a,r  ;check this, pretty pointless
	839	0B55: 77            ld   (hl),a
	840	0B56: 01 80 00      ld   bc,$0080
	841	0B59: ED B0         ldir
	842	0B5B: 3E 18         ld   a,$18
	843	0B5D: 32 C4 C3      ld   ($C3C4),a
	844	0B60: 21 67 13      ld   hl,$0B67
	845	0B63: 22 00 D0      ld   ($C800),hl
	846	0B66: C9            ret
	847
	848	*/
	849
	850	static UINT8 suna8_trash_prot, *suna8_wram;
	851
	852	/* This is a command-based protection. */
	853	static WRITE8_HANDLER( sparkman_cmd_prot_w )
826	854	{
827		suna8_nmi_enable = data & 0x01;
828		if (data & ~0x01)    logerror("CPU #0 - PC %04X: unknown nmi bits: %02X\n",cpu_get_pc(space->cpu),data);
	855	switch(data)
	856	{
	857	case 0xa6: suna8_nmi_enable = 1; break;
	858	case 0x00: suna8_nmi_enable = 0; break;
	859	case 0x18: suna8_trash_prot = 0; break;
	860	case 0x81: suna8_trash_prot = 1; break;
	861	default: logerror("CPU #0 - PC %04X: unknown protection command: %02X\n",cpu_get_pc(space->cpu),data);
	862	}
829	863	}
830	864
	865	static WRITE8_HANDLER( suna8_wram_w )
	866	{
	867	if(!suna8_trash_prot)
	868	suna8_wram[offset] = data;
	869	}
	870
831	871	/*
832	872	7654 321-
833	873	---- ---0   Flip Screen
r6740	r6741
853	893	*/
854	894	static WRITE8_HANDLER( sparkman_spritebank_w )
855	895	{
856		suna8_spritebank = (data >> 1) & 1;
	896	if(data == 0xf7) //???
	897	suna8_spritebank = 0;
	898	else
	899	suna8_spritebank = (data) & 1;
857	900	if (data & ~0x02)    logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(space->cpu),data);
858	901	}
859	902
r6740	r6741
888	931	AM_RANGE(0xc200, 0xc200) AM_WRITE(sparkman_spritebank_w      )   // Sprite RAM Bank
889	932	AM_RANGE(0xc280, 0xc280) AM_WRITE(sparkman_rombank_w      )   // ROM Bank (?mirrored up to c2ff?)
890	933	AM_RANGE(0xc300, 0xc300) AM_WRITE(sparkman_flipscreen_w      )   // Flip Screen
891		AM_RANGE(0xc380, 0xc380) AM_WRITE(sparkman_nmi_w         )   // ? NMI related ?
	934	AM_RANGE(0xc380, 0xc3ff) AM_WRITE(sparkman_cmd_prot_w      )   // Protection
892	935	AM_RANGE(0xc400, 0xc400) AM_WRITE(sparkman_leds_w         )   // Leds + Coin Counter
893	936	AM_RANGE(0xc500, 0xc500) AM_WRITE(soundlatch_w            )   // To Sound CPU
894	937	AM_RANGE(0xc600, 0xc7ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_be_w) AM_BASE_GENERIC(paletteram   )   // Palette (Banked??)
895		AM_RANGE(0xc800, 0xdfff) AM_RAM                           // RAM
	938	AM_RANGE(0xc800, 0xdfff) AM_RAM_WRITE(suna8_wram_w) AM_BASE(&suna8_wram)                        // RAM
896	939	AM_RANGE(0xe000, 0xffff) AM_READWRITE(suna8_banked_spriteram_r, suna8_banked_spriteram_w   )   // Sprites (Banked)
897	940	ADDRESS_MAP_END
898	941
r6740	r6741
2080	2123	ROM_LOAD( "brickzon.011", 0x00000, 0x10000, CRC(6c54161a) SHA1(ea216d9f45b441acd56b9fed81a83e3bfe299fbd) )
2081	2124
2082	2125	ROM_REGION( 0xc0000, "gfx1", ROMREGION_INVERT )   /* Sprites */
2083		ROM_LOAD( "brickzon.002", 0x00000, 0x20000, CRC(241f0659) SHA1(71b577bf7097b3b367d068df42f991d515f9003a) )
2084		ROM_LOAD( "brickzon.001", 0x20000, 0x20000, CRC(6970ada9) SHA1(5cfe5dcf25af7aff67ee5d78eb963d598251025f) )
2085		ROM_LOAD( "brickzon.003", 0x40000, 0x20000, CRC(2e4f194b) SHA1(86da1a582ea274f2af96d3e3e2ac72bcaf3638cb) )
2086		ROM_LOAD( "brickzon.005", 0x60000, 0x20000, CRC(118f8392) SHA1(598fa4df3ae348ec9796cd6d90c3045bec546da3) )
2087		ROM_LOAD( "brickzon.004", 0x80000, 0x20000, CRC(2be5f335) SHA1(dc870a3c5303cb2ea1fea4a25f53db016ed5ecee) )
2088		ROM_LOAD( "brickzon.006", 0xa0000, 0x20000, CRC(bbf31081) SHA1(1fdbd0e0853082345225e18df340184a7a604b78) )
	2126	ROM_LOAD( "brickzon.005", 0x00000, 0x20000, CRC(118f8392) SHA1(598fa4df3ae348ec9796cd6d90c3045bec546da3) )
	2127	ROM_LOAD( "brickzon.004", 0x20000, 0x20000, CRC(2be5f335) SHA1(dc870a3c5303cb2ea1fea4a25f53db016ed5ecee) )
	2128	ROM_LOAD( "brickzon.006", 0x40000, 0x20000, CRC(bbf31081) SHA1(1fdbd0e0853082345225e18df340184a7a604b78) )
	2129	ROM_LOAD( "brickzon.002", 0x60000, 0x20000, CRC(241f0659) SHA1(71b577bf7097b3b367d068df42f991d515f9003a) )
	2130	ROM_LOAD( "brickzon.001", 0x80000, 0x20000, CRC(6970ada9) SHA1(5cfe5dcf25af7aff67ee5d78eb963d598251025f) )
	2131	ROM_LOAD( "brickzon.003", 0xa0000, 0x20000, CRC(2e4f194b) SHA1(86da1a582ea274f2af96d3e3e2ac72bcaf3638cb) )
2089	2132	ROM_END
2090	2133
2091	2134	ROM_START( brickzn3 )
r6740	r6741
2271	2314	}
2272	2315
2273	2316	/* Working Games */
2274		GAME( 1988, rranger,  0,        rranger,  rranger,  suna8,    ROT0,  "SunA (Sharp Image license)", "Rough Ranger (v2.0)", 0)
	2317	GAME( 1988, sranger,  0,        rranger,  rranger,  suna8,    ROT0,  "SunA", "Super Ranger (v2.0)", 0 )
	2318	GAME( 1988, rranger,  sranger,  rranger,  rranger,  suna8,    ROT0,  "SunA (Sharp Image license)", "Rough Ranger (v2.0, unprotected, bootleg?)", 0) //protection is patched out in this.
	2319	GAME( 1988, srangerb, sranger,  rranger,  rranger,  suna8,    ROT0,  "bootleg", "Super Ranger (bootleg)", 0 )
	2320	GAME( 1988, srangerw, sranger,  rranger,  rranger,  suna8,    ROT0,  "SunA (WDK license)", "Super Ranger (WDK)", 0 )
2275	2321	GAME( 1988, hardhead, 0,        hardhead, hardhead, hardhead, ROT0,  "SunA", "Hard Head" , 0)
2276	2322	GAME( 1988, hardheadb,hardhead, hardhead, hardhead, hardhedb, ROT0,  "bootleg", "Hard Head (bootleg)" , 0)
2277	2323	GAME( 1988, pop_hh,   hardhead, hardhead, hardhead, hardhedb, ROT0,  "bootleg", "Popper (Hard Head bootleg)" , 0)
2278	2324	GAME( 1991, hardhea2, 0,        hardhea2, hardhea2, hardhea2, ROT0,  "SunA", "Hard Head 2 (v2.0)" , 0 )
2279	2325
2280	2326	/* Non Working Games */
2281		GAME( 1988, sranger,  rranger,  rranger,  rranger,  suna8,    ROT0,  "SunA", "Super Ranger (v2.0)", GAME_NOT_WORKING )
2282		GAME( 1988, srangerb, rranger,  rranger,  rranger,  suna8,    ROT0,  "bootleg", "Super Ranger (bootleg)", GAME_NOT_WORKING )
2283		GAME( 1988, srangerw, rranger,  rranger,  rranger,  suna8,    ROT0,  "SunA (WDK license)", "Super Ranger (WDK)", GAME_NOT_WORKING )
2284	2327	GAME( 1989, sparkman, 0,        sparkman, sparkman, sparkman, ROT0,  "SunA", "Spark Man (v 2.0)", GAME_NOT_WORKING )
2285	2328	GAME( 1990, starfigh, 0,        starfigh, hardhea2, starfigh, ROT90, "SunA", "Star Fighter (v1)", GAME_NOT_WORKING )
2286	2329	GAME( 1992, brickzn,  0,        brickzn,  brickzn,  brickzn,  ROT90, "SunA", "Brick Zone (v5.0)", GAME_NOT_WORKING )

src/mame/drivers/nova2001.c

r6740	r6741
121	121	#include "cpu/z80/z80.h"
122	122	#include "deprecat.h"
123	123	#include "sound/ay8910.h"
124		#include "nova2001.h"
	124	#include "includes/nova2001.h"
125	125
126	126	#define MAIN_CLOCK XTAL_12MHz
127	127

src/mame/drivers/mermaid.c

r6740	r6741
117	117	#include "cpu/z80/z80.h"
118	118	#include "sound/ay8910.h"
119	119
	120	extern UINT8* mermaid_videoram;
	121	extern UINT8* mermaid_colorram;
120	122	extern UINT8* mermaid_videoram2;
121	123	extern UINT8* mermaid_bg_scrollram;
122	124	extern UINT8* mermaid_fg_scrollram;
r6740	r6741
161	163	AM_RANGE(0x0000, 0x9fff) AM_ROM
162	164	AM_RANGE(0xc000, 0xc7ff) AM_RAM
163	165	AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(mermaid_videoram2_w) AM_BASE(&mermaid_videoram2)
164		AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(mermaid_videoram_w) AM_BASE_GENERIC(videoram)
	166	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(mermaid_videoram_w) AM_BASE(&mermaid_videoram)
165	167	AM_RANGE(0xd800, 0xd81f) AM_RAM_WRITE(mermaid_bg_scroll_w) AM_BASE(&mermaid_bg_scrollram)
166	168	AM_RANGE(0xd840, 0xd85f) AM_RAM_WRITE(mermaid_fg_scroll_w) AM_BASE(&mermaid_fg_scrollram)
167	169	AM_RANGE(0xd880, 0xd8bf) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
168		AM_RANGE(0xdc00, 0xdfff) AM_RAM_WRITE(mermaid_colorram_w) AM_BASE_GENERIC(colorram)
	170	AM_RANGE(0xdc00, 0xdfff) AM_RAM_WRITE(mermaid_colorram_w) AM_BASE(&mermaid_colorram)
169	171	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("DSW")
170	172	AM_RANGE(0xe000, 0xe001) AM_RAM AM_BASE(&mermaid_ay8910_enable)
171	173	AM_RANGE(0xe002, 0xe002) AM_WRITENOP   // ???

src/mame/drivers/gaelco3d.c

r6740	r6741
144	144
145	145	#include "driver.h"
146	146	#include "cpu/m68000/m68000.h"
147		#include "gaelco3d.h"
	147	#include "includes/gaelco3d.h"
148	148	#include "cpu/tms32031/tms32031.h"
149	149	#include "cpu/adsp2100/adsp2100.h"
150		#include "machine/eeprom.h"
	150	#include "machine/eepromdev.h"
151	151	#include "sound/dmadac.h"
152	152
153	153	#define   LOG            0
r6740	r6741
164	164	static UINT8 analog_ports[4];
165	165	static UINT8 framenum;
166	166
167		static emu_timer *adsp_autobuffer_timer;
	167	static const device_config *adsp_autobuffer_timer;
168	168	static UINT16 *adsp_control_regs;
169	169	static UINT16 *adsp_fastram_base;
170	170	static UINT8 adsp_ireg;
r6740	r6741
172	172	static const device_config *dmadac[SOUND_CHANNELS];
173	173
174	174	static void adsp_tx_callback(const device_config *device, int port, INT32 data);
175		static TIMER_CALLBACK( adsp_autobuffer_irq );
176	175
177	176
178	177	/*************************************
r6740	r6741
181	180	*
182	181	*************************************/
183	182
	183	static MACHINE_START( gaelco3d )
	184	{
	185	/* Save state support */
	186	state_save_register_global(machine, sound_data);
	187	state_save_register_global(machine, sound_status);
	188	state_save_register_global_array(machine, analog_ports);
	189	state_save_register_global(machine, framenum);
	190	state_save_register_global(machine, adsp_ireg);
	191	state_save_register_global(machine, adsp_ireg_base);
	192	state_save_register_global(machine, adsp_incs);
	193	state_save_register_global(machine, adsp_size);
	194	}
	195
	196
184	197	static MACHINE_RESET( common )
185	198	{
186	199	UINT16 *src;
r6740	r6741
197	210	}
198	211
199	212	/* allocate a timer for feeding the autobuffer */
200		adsp_autobuffer_timer = timer_alloc(machine, adsp_autobuffer_irq, NULL);
	213	adsp_autobuffer_timer = devtag_get_device(machine, "adsp_timer");
201	214
202	215	memory_configure_bank(machine, "bank1", 0, 256, memory_region(machine, "user1"), 0x4000);
203	216	memory_set_bank(machine, "bank1", 0);
r6740	r6741
211	224	sprintf(buffer, "dac%d", i + 1);
212	225	dmadac[i] = devtag_get_device(machine, buffer);
213	226	}
214
215		/* Save state support */
216		state_save_register_global(machine, sound_data);
217		state_save_register_global(machine, sound_status);
218		state_save_register_global_array(machine, analog_ports);
219		state_save_register_global(machine, framenum);
220		state_save_register_global(machine, adsp_ireg);
221		state_save_register_global(machine, adsp_ireg_base);
222		state_save_register_global(machine, adsp_incs);
223		state_save_register_global(machine, adsp_size);
224	227	}
225	228
226	229
r6740	r6741
228	231	{
229	232	MACHINE_RESET_CALL( common );
230	233	tms_offset_xor = 0;
231		state_save_register_global(machine, tms_offset_xor);
232	234	}
233	235
234	236
r6740	r6741
236	238	{
237	239	MACHINE_RESET_CALL( common );
238	240	tms_offset_xor = BYTE_XOR_BE(0);
239		state_save_register_global(machine, tms_offset_xor);
240	241	}
241	242
242	243
r6740	r6741
267	268	*
268	269	*************************************/
269	270
270		static READ16_HANDLER( eeprom_data_r )
	271	static READ16_DEVICE_HANDLER( eeprom_data_r )
271	272	{
272	273	UINT16 result = 0xffff;
273		if (eeprom_read_bit())
	274	if (eepromdev_read_bit(device))
274	275	result ^= 0x0004;
275	276	if (LOG)
276	277	logerror("eeprom_data_r(%02X)\n", result);
r6740	r6741
278	279	}
279	280
280	281
281		static WRITE16_HANDLER( eeprom_data_w )
	282	static WRITE16_DEVICE_HANDLER( eeprom_data_w )
282	283	{
283	284	if (ACCESSING_BITS_0_7)
284		eeprom_write_bit(data & 0x01);
	285	eepromdev_write_bit(device, data & 0x01);
285	286	}
286	287
287	288
288		static WRITE16_HANDLER( eeprom_clock_w )
	289	static WRITE16_DEVICE_HANDLER( eeprom_clock_w )
289	290	{
290	291	if (ACCESSING_BITS_0_7)
291		eeprom_set_clock_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
	292	eepromdev_set_clock_line(device, (data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
292	293	}
293	294
294	295
295		static WRITE16_HANDLER( eeprom_cs_w )
	296	static WRITE16_DEVICE_HANDLER( eeprom_cs_w )
296	297	{
297	298	if (ACCESSING_BITS_0_7)
298		eeprom_set_cs_line((data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
	299	eepromdev_set_cs_line(device, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
299	300	}
300	301
301	302
r6740	r6741
530	531	if ((data & 0x0800) == 0)
531	532	{
532	533	dmadac_enable(&dmadac[0], SOUND_CHANNELS, 0);
533		timer_adjust_oneshot(adsp_autobuffer_timer, attotime_never, 0);
	534	timer_device_adjust_oneshot(adsp_autobuffer_timer, attotime_never, 0);
534	535	}
535	536	break;
536	537
r6740	r6741
539	540	if ((data & 0x0002) == 0)
540	541	{
541	542	dmadac_enable(&dmadac[0], SOUND_CHANNELS, 0);
542		timer_adjust_oneshot(adsp_autobuffer_timer, attotime_never, 0);
	543	timer_device_adjust_oneshot(adsp_autobuffer_timer, attotime_never, 0);
543	544	}
544	545	break;
545	546
r6740	r6741
568	569	*
569	570	*************************************/
570	571
571		static TIMER_CALLBACK( adsp_autobuffer_irq )
	572	static TIMER_DEVICE_CALLBACK( adsp_autobuffer_irq )
572	573	{
573	574	/* get the index register */
574		int reg = cpu_get_reg(cputag_get_cpu(machine, "adsp"), ADSP2100_I0 + adsp_ireg);
	575	int reg = cpu_get_reg(cputag_get_cpu(timer->machine, "adsp"), ADSP2100_I0 + adsp_ireg);
575	576
576	577	/* copy the current data into the buffer */
577	578	// logerror("ADSP buffer: I%d=%04X incs=%04X size=%04X\n", adsp_ireg, reg, adsp_incs, adsp_size);
r6740	r6741
588	589	reg = adsp_ireg_base;
589	590
590	591	/* generate the (internal, thats why the pulse) irq */
591		generic_pulse_irq_line(cputag_get_cpu(machine, "adsp"), ADSP2105_IRQ1);
	592	generic_pulse_irq_line(cputag_get_cpu(timer->machine, "adsp"), ADSP2105_IRQ1);
592	593	}
593	594
594	595	/* store it */
595		cpu_set_reg(cputag_get_cpu(machine, "adsp"), ADSP2100_I0 + adsp_ireg, reg);
	596	cpu_set_reg(cputag_get_cpu(timer->machine, "adsp"), ADSP2100_I0 + adsp_ireg, reg);
596	597	}
597	598
598	599
r6740	r6741
647	648	/* fire off a timer wich will hit every half-buffer */
648	649	sample_period = attotime_div(attotime_mul(sample_period, adsp_size), SOUND_CHANNELS * adsp_incs);
649	650
650		timer_adjust_periodic(adsp_autobuffer_timer, sample_period, 0, sample_period);
	651	timer_device_adjust_periodic(adsp_autobuffer_timer, sample_period, 0, sample_period);
651	652
652	653	return;
653	654	}
r6740	r6741
659	660	dmadac_enable(&dmadac[0], SOUND_CHANNELS, 0);
660	661
661	662	/* remove timer */
662		timer_adjust_oneshot(adsp_autobuffer_timer, attotime_never, 0);
	663	timer_device_adjust_oneshot(adsp_autobuffer_timer, attotime_never, 0);
663	664	}
664	665
665	666
r6740	r6741
741	742	AM_RANGE(0x51003c, 0x51003d) AM_READ_PORT("IN3")
742	743	AM_RANGE(0x510040, 0x510041) AM_WRITE(sound_data_w)
743	744	AM_RANGE(0x510042, 0x510043) AM_READ(sound_status_r)
744		AM_RANGE(0x510100, 0x510101) AM_READ(eeprom_data_r)
	745	AM_RANGE(0x510100, 0x510101) AM_DEVREAD("eeprom", eeprom_data_r)
745	746	AM_RANGE(0x510100, 0x510101) AM_WRITE(irq_ack_w)
746	747	AM_RANGE(0x51010a, 0x51010b) AM_WRITENOP      // very noisy when starting a new game
747		AM_RANGE(0x510110, 0x510113) AM_WRITE(eeprom_data_w)
	748	AM_RANGE(0x510110, 0x510113) AM_DEVWRITE("eeprom", eeprom_data_w)
748	749	AM_RANGE(0x510116, 0x510117) AM_WRITE(tms_control3_w)
749		AM_RANGE(0x510118, 0x51011b) AM_WRITE(eeprom_clock_w)
750		AM_RANGE(0x510120, 0x510123) AM_WRITE(eeprom_cs_w)
	750	AM_RANGE(0x510118, 0x51011b) AM_DEVWRITE("eeprom", eeprom_clock_w)
	751	AM_RANGE(0x510120, 0x510123) AM_DEVWRITE("eeprom", eeprom_cs_w)
751	752	AM_RANGE(0x51012a, 0x51012b) AM_WRITE(tms_reset_w)
752	753	AM_RANGE(0x510132, 0x510133) AM_WRITE(tms_irq_w)
753	754	AM_RANGE(0x510146, 0x510147) AM_WRITE(led_0_w)
r6740	r6741
768	769	AM_RANGE(0x51003c, 0x51003f) AM_READ_PORT("IN3")
769	770	AM_RANGE(0x510040, 0x510043) AM_READ16(sound_status_r, 0x0000ffff)
770	771	AM_RANGE(0x510040, 0x510043) AM_WRITE16(sound_data_w, 0xffff0000)
771		AM_RANGE(0x510100, 0x510103) AM_READ16(eeprom_data_r, 0xffff0000)
	772	AM_RANGE(0x510100, 0x510103) AM_DEVREAD16("eeprom", eeprom_data_r, 0xffff0000)
772	773	AM_RANGE(0x510100, 0x510103) AM_WRITE16(irq_ack_w, 0xffff0000)
773	774	AM_RANGE(0x510104, 0x510107) AM_WRITE(unknown_107_w)
774		AM_RANGE(0x510110, 0x510113) AM_WRITE16(eeprom_data_w, 0x0000ffff)
	775	AM_RANGE(0x510110, 0x510113) AM_DEVWRITE16("eeprom", eeprom_data_w, 0x0000ffff)
775	776	AM_RANGE(0x510114, 0x510117) AM_WRITE16(tms_control3_w, 0x0000ffff)
776		AM_RANGE(0x510118, 0x51011b) AM_WRITE16(eeprom_clock_w, 0x0000ffff)
777		AM_RANGE(0x510120, 0x510123) AM_WRITE16(eeprom_cs_w, 0x0000ffff)
	777	AM_RANGE(0x510118, 0x51011b) AM_DEVWRITE16("eeprom", eeprom_clock_w, 0x0000ffff)
	778	AM_RANGE(0x510120, 0x510123) AM_DEVWRITE16("eeprom", eeprom_cs_w, 0x0000ffff)
778	779	AM_RANGE(0x510124, 0x510127) AM_WRITE(unknown_127_w)
779	780	AM_RANGE(0x510128, 0x51012b) AM_WRITE16(tms_reset_w, 0x0000ffff)
780	781	AM_RANGE(0x510130, 0x510133) AM_WRITE16(tms_irq_w, 0x0000ffff)
r6740	r6741
804	805	AM_RANGE(0x0000, 0x0001) AM_WRITE(adsp_rombank_w)
805	806	AM_RANGE(0x0000, 0x1fff) AM_ROMBANK("bank1")
806	807	AM_RANGE(0x2000, 0x2000) AM_READWRITE(sound_data_r, sound_status_w)
807		AM_RANGE(0x3800, 0x39ff) AM_RAM   AM_BASE(&adsp_fastram_base)   /* 512 words internal RAM */
	808	AM_RANGE(0x3800, 0x39ff) AM_RAM AM_BASE(&adsp_fastram_base)   /* 512 words internal RAM */
808	809	AM_RANGE(0x3fe0, 0x3fff) AM_WRITE(adsp_control_w) AM_BASE(&adsp_control_regs)
809	810	ADDRESS_MAP_END
810	811
r6740	r6741
966	967	MDRV_CPU_PROGRAM_MAP(adsp_program_map)
967	968	MDRV_CPU_DATA_MAP(adsp_data_map)
968	969
	970	MDRV_MACHINE_START(gaelco3d)
969	971	MDRV_MACHINE_RESET(gaelco3d)
970		MDRV_NVRAM_HANDLER(93C66B)
971	972
	973	MDRV_EEPROM_93C66B_NODEFAULT_ADD("eeprom")
	974
972	975	MDRV_QUANTUM_TIME(HZ(6000))
973	976
	977	MDRV_TIMER_ADD("adsp_timer", adsp_autobuffer_irq)
	978
974	979	/* video hardware */
975	980	MDRV_SCREEN_ADD("screen", RASTER)
976	981	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/avalnche.c

r6740	r6741
31	31	#include "cpu/m6502/m6502.h"
32	32	#include "deprecat.h"
33	33	#include "sound/discrete.h"
34		#include "avalnche.h"
	34	#include "includes/avalnche.h"
35	35
36	36	#include "avalnche.lh"
37	37

src/mame/drivers/gstriker.c

r6740	r6741
35	35	#include "driver.h"
36	36	#include "cpu/z80/z80.h"
37	37	#include "cpu/m68000/m68000.h"
38		#include "gstriker.h"
	38	#include "includes/gstriker.h"
39	39	#include "sound/2610intf.h"
40	40
41	41	/*** README INFO **************************************************************

src/mame/drivers/snk.c

r6740	r6741
260	260
261	261	#include "driver.h"
262	262	#include "cpu/z80/z80.h"
263		#include "snk.h"
	263	#include "includes/snk.h"
264	264	#include "sound/snkwave.h"
265	265	#include "sound/ay8910.h"
266	266	#include "sound/3526intf.h"

src/mame/drivers/namconb1.c

r6740	r6741
271	271	#include "driver.h"
272	272	#include "cpu/m68000/m68000.h"
273	273	#include "deprecat.h"
274		#include "namconb1.h"
275		#include "namcos2.h"
276		#include "namcoic.h"
	274	#include "includes/namconb1.h"
	275	#include "includes/namcos2.h"
	276	#include "includes/namcoic.h"
277	277	#include "sound/c352.h"
278	278	#include "cpu/m37710/m37710.h"
279	279

src/mame/drivers/fcrash.c

r6740	r6741
35	35	#include "driver.h"
36	36	#include "cpu/z80/z80.h"
37	37	#include "cpu/m68000/m68000.h"
38		#include "cps1.h"
	38	#include "includes/cps1.h"
39	39	#include "sound/2203intf.h"
40	40	#include "sound/msm5205.h"
41	41
42	42
43		static int sample_buffer1, sample_buffer2;
44		static int sample_select1, sample_select2;
45
46	43	static WRITE16_HANDLER( fcrash_soundlatch_w )
47	44	{
	45	cps_state *state = (cps_state *)space->machine->driver_data;
	46
48	47	if (ACCESSING_BITS_0_7)
49	48	{
50		soundlatch_w(space,0,data & 0xff);
51		cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE);
	49	soundlatch_w(space, 0, data & 0xff);
	50	cpu_set_input_line(state->audiocpu, 0, HOLD_LINE);
52	51	}
53	52	}
54	53
55	54	static WRITE8_HANDLER( fcrash_snd_bankswitch_w )
56	55	{
57		UINT8 *RAM = memory_region(space->machine, "soundcpu");
58		int bankaddr;
	56	cps_state *state = (cps_state *)space->machine->driver_data;
59	57
60		sound_set_output_gain(devtag_get_device(space->machine, "msm1"), 0, (data & 0x08) ? 0.0 : 1.0);
61		sound_set_output_gain(devtag_get_device(space->machine, "msm2"), 0, (data & 0x10) ? 0.0 : 1.0);
	58	sound_set_output_gain(state->msm_1, 0, (data & 0x08) ? 0.0 : 1.0);
	59	sound_set_output_gain(state->msm_2, 0, (data & 0x10) ? 0.0 : 1.0);
62	60
63		bankaddr = ((data & 7) * 0x4000);
64		memory_set_bankptr(space->machine, "bank1",&RAM[0x10000 + bankaddr]);
	61	memory_set_bank(space->machine, "bank1", data & 0x07);
65	62	}
66	63
67		static void m5205_int1(const device_config *device)
	64	static void m5205_int1( const device_config *device )
68	65	{
69		msm5205_data_w(device, sample_buffer1 & 0x0F);
70		sample_buffer1 >>= 4;
71		sample_select1 ^= 1;
72		if (sample_select1 == 0)
73		cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
	66	cps_state *state = (cps_state *)device->machine->driver_data;
	67
	68	msm5205_data_w(device, state->sample_buffer1 & 0x0f);
	69	state->sample_buffer1 >>= 4;
	70	state->sample_select1 ^= 1;
	71	if (state->sample_select1 == 0)
	72	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE);
74	73	}
75	74
76		static void m5205_int2(const device_config *device)
	75	static void m5205_int2( const device_config *device )
77	76	{
78		msm5205_data_w(device, sample_buffer2 & 0x0F);
79		sample_buffer2 >>= 4;
80		sample_select2 ^= 1;
	77	cps_state *state = (cps_state *)device->machine->driver_data;
	78
	79	msm5205_data_w(device, state->sample_buffer2 & 0x0f);
	80	state->sample_buffer2 >>= 4;
	81	state->sample_select2 ^= 1;
81	82	}
82	83
83	84
84	85	static WRITE8_HANDLER( fcrash_msm5205_0_data_w )
85	86	{
86		sample_buffer1 = data;
	87	cps_state *state = (cps_state *)space->machine->driver_data;
	88	state->sample_buffer1 = data;
87	89	}
88	90
89	91	static WRITE8_HANDLER( fcrash_msm5205_1_data_w )
90	92	{
91		sample_buffer2 = data;
	93	cps_state *state = (cps_state *)space->machine->driver_data;
	94	state->sample_buffer2 = data;
92	95	}
93	96
94	97
r6740	r6741
96	99	/* not verified */
97	100	#define CPS1_ROWSCROLL_OFFS     (0x20/2)    /* base of row scroll offsets in other RAM */
98	101
99		static void fcrash_update_transmasks(void)
	102	static void fcrash_update_transmasks( running_machine *machine )
100	103	{
	104	cps_state *state = (cps_state *)machine->driver_data;
101	105	int i;
102	106	int priority[4];
103	107
104		priority[0]=0x26;
105		priority[1]=0x30;
106		priority[2]=0x28;
107		priority[3]=0x32;
	108	priority[0] = 0x26;
	109	priority[1] = 0x30;
	110	priority[2] = 0x28;
	111	priority[3] = 0x32;
108	112
109		for (i = 0;i < 4;i++)
	113	for (i = 0; i < 4; i++)
110	114	{
111	115	int mask;
112	116
113	117	/* Get transparency registers */
114	118	if (priority[i])
115		mask = cps1_cps_b_regs[priority[i]/2] ^ 0xffff;
116		else mask = 0xffff;   /* completely transparent if priority masks not defined (mercs, qad) */
	119	mask = state->cps_b_regs[priority[i] / 2] ^ 0xffff;
	120	else
	121	mask = 0xffff;   /* completely transparent if priority masks not defined (mercs, qad) */
117	122
118		tilemap_set_transmask(cps1_bg_tilemap[0],i,mask,0x8000);
119		tilemap_set_transmask(cps1_bg_tilemap[1],i,mask,0x8000);
120		tilemap_set_transmask(cps1_bg_tilemap[2],i,mask,0x8000);
	123	tilemap_set_transmask(state->bg_tilemap[0], i, mask, 0x8000);
	124	tilemap_set_transmask(state->bg_tilemap[1], i, mask, 0x8000);
	125	tilemap_set_transmask(state->bg_tilemap[2], i, mask, 0x8000);
121	126	}
122	127	}
123	128
124		static void fcrash_render_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
	129	static void fcrash_render_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
125	130	{
	131	cps_state *state = (cps_state *)machine->driver_data;
126	132	int pos;
127		int base=0x50c8/2;
	133	int base = 0x50c8 / 2;
128	134
129	135	// sprite base registers need hooking up properly.. on fcrash it is NOT cps1_cps_a_regs[0]
130	136	//  on kodb, it might still be, unless that's just a leftover and it writes somewhere else too
131		//  if (cps1_cps_a_regs[0] & 0x00ff) base=0x10c8/2;
132		//  printf("cps1_cps_a_regs %04x\n", cps1_cps_a_regs[0]);
	137	//  if (state->cps_a_regs[0] & 0x00ff) base = 0x10c8/2;
	138	//  printf("cps1_cps_a_regs %04x\n", state->cps_a_regs[0]);
133	139
134		for (pos=0x1ffc;pos>=0x0000;pos-=4)
	140	for (pos = 0x1ffc; pos >= 0x0000; pos -= 4)
135	141	{
136	142	int tileno;
137	143	int xpos;
138	144	int ypos;
139		int flipx,flipy;
	145	int flipx, flipy;
140	146	int colour;
141	147
142		tileno = cps1_gfxram[base+pos];
143		xpos   = cps1_gfxram[base+pos+2];
144		ypos   = cps1_gfxram[base+pos-1]&0xff;
145		flipx  = cps1_gfxram[base+pos+1]&0x20;
146		flipy  = cps1_gfxram[base+pos+1]&0x40;
147		colour = cps1_gfxram[base+pos+1]&0x1f;
148		ypos = 256-ypos;
	148	tileno = state->gfxram[base +pos];
	149	xpos   = state->gfxram[base +pos + 2];
	150	ypos   = state->gfxram[base +pos - 1] & 0xff;
	151	flipx  = state->gfxram[base +pos + 1] & 0x20;
	152	flipy  = state->gfxram[base +pos + 1] & 0x40;
	153	colour = state->gfxram[base +pos + 1] & 0x1f;
	154	ypos = 256 - ypos;
149	155
150		pdrawgfx_transpen(bitmap,cliprect,machine->gfx[2],tileno,colour,flipx,flipy,xpos+49,ypos-16,machine->priority_bitmap,0x02,15);
	156	pdrawgfx_transpen(bitmap, cliprect, machine->gfx[2], tileno, colour, flipx, flipy, xpos + 49, ypos - 16, machine->priority_bitmap, 0x02, 15);
151	157
152	158	}
153	159
154	160	}
155	161
156		static void fcrash_render_layer(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect,int layer,int primask)
	162	static void fcrash_render_layer( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int layer, int primask )
157	163	{
	164	cps_state *state = (cps_state *)machine->driver_data;
	165
158	166	switch (layer)
159	167	{
160	168	case 0:
161		fcrash_render_sprites(machine,bitmap,cliprect);
	169	fcrash_render_sprites(machine, bitmap, cliprect);
162	170	break;
163	171	case 1:
164	172	case 2:
165	173	case 3:
166		tilemap_draw(bitmap,cliprect,cps1_bg_tilemap[layer-1],TILEMAP_DRAW_LAYER1,primask);
	174	tilemap_draw(bitmap, cliprect, state->bg_tilemap[layer - 1], TILEMAP_DRAW_LAYER1, primask);
167	175	break;
168	176	}
169	177	}
170	178
171		static void fcrash_render_high_layer(bitmap_t *bitmap, const rectangle *cliprect, int layer)
	179	static void fcrash_render_high_layer( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int layer )
172	180	{
	181	cps_state *state = (cps_state *)machine->driver_data;
	182
173	183	switch (layer)
174	184	{
175	185	case 0:
r6740	r6741
178	188	case 1:
179	189	case 2:
180	190	case 3:
181		tilemap_draw(NULL,cliprect,cps1_bg_tilemap[layer-1],TILEMAP_DRAW_LAYER0,1);
	191	tilemap_draw(NULL, cliprect, state->bg_tilemap[layer - 1], TILEMAP_DRAW_LAYER0, 1);
182	192	break;
183	193	}
184	194	}
185	195
186		static void fcrash_build_palette(running_machine *machine)
	196	static void fcrash_build_palette( running_machine *machine )
187	197	{
	198	cps_state *state = (cps_state *)machine->driver_data;
188	199	int offset;
189	200
190		for (offset = 0; offset < 32*6*16; offset++)
	201	for (offset = 0; offset < 32 * 6 * 16; offset++)
191	202	{
192		int palette = cps1_gfxram[0x14000/2 + offset];
	203	int palette = state->gfxram[0x14000 / 2 + offset];
193	204	int r, g, b, bright;
194	205
195	206	// from my understanding of the schematics, when the 'brightness'
196	207	// component is set to 0 it should reduce brightness to 1/3
197	208
198		bright = 0x0f + ((palette>>12)<<1);
	209	bright = 0x0f + ((palette >> 12) << 1);
199	210
200		r = ((palette>>8)&0x0f) * 0x11 * bright / 0x2d;
201		g = ((palette>>4)&0x0f) * 0x11 * bright / 0x2d;
202		b = ((palette>>0)&0x0f) * 0x11 * bright / 0x2d;
	211	r = ((palette >> 8) & 0x0f) * 0x11 * bright / 0x2d;
	212	g = ((palette >> 4) & 0x0f) * 0x11 * bright / 0x2d;
	213	b = ((palette >> 0) & 0x0f) * 0x11 * bright / 0x2d;
203	214
204	215	palette_set_color (machine, offset, MAKE_RGB(r, g, b));
205	216	}
r6740	r6741
207	218
208	219	static VIDEO_UPDATE( fcrash )
209	220	{
210		int layercontrol,l0,l1,l2,l3;
211		int videocontrol=cps1_cps_a_regs[0x22/2];
	221	cps_state *state = (cps_state *)screen->machine->driver_data;
	222	int layercontrol, l0, l1, l2, l3;
	223	int videocontrol = state->cps_a_regs[0x22 / 2];
212	224
213	225
214	226	flip_screen_set(screen->machine, videocontrol & 0x8000);
215	227
216		layercontrol = cps1_cps_b_regs[0x20/2];
	228	layercontrol = state->cps_b_regs[0x20 / 2];
217	229
218	230	/* Get video memory base registers */
219		cps1_get_video_base();
	231	cps1_get_video_base(screen->machine);
220	232
221	233	/* Build palette */
222	234	fcrash_build_palette(screen->machine);
223	235
224		fcrash_update_transmasks();
	236	fcrash_update_transmasks(screen->machine);
225	237
226		tilemap_set_scrollx(cps1_bg_tilemap[0],0,cps1_scroll1x-62);
227		tilemap_set_scrolly(cps1_bg_tilemap[0],0,cps1_scroll1y);
	238	tilemap_set_scrollx(state->bg_tilemap[0], 0, state->scroll1x - 62);
	239	tilemap_set_scrolly(state->bg_tilemap[0], 0, state->scroll1y);
	240
228	241	if (videocontrol & 0x01)   /* linescroll enable */
229	242	{
230		int scrly=-cps1_scroll2y;
	243	int scrly = -state->scroll2y;
231	244	int i;
232	245	int otheroffs;
233	246
234		tilemap_set_scroll_rows(cps1_bg_tilemap[1],1024);
	247	tilemap_set_scroll_rows(state->bg_tilemap[1], 1024);
235	248
236		otheroffs = cps1_cps_a_regs[CPS1_ROWSCROLL_OFFS];
	249	otheroffs = state->cps_a_regs[CPS1_ROWSCROLL_OFFS];
237	250
238		for (i = 0;i < 256;i++)
239		tilemap_set_scrollx(cps1_bg_tilemap[1],(i - scrly) & 0x3ff,cps1_scroll2x + cps1_other[(i + otheroffs) & 0x3ff]);
	251	for (i = 0; i < 256; i++)
	252	tilemap_set_scrollx(state->bg_tilemap[1], (i - scrly) & 0x3ff, state->scroll2x + state->other[(i + otheroffs) & 0x3ff]);
240	253	}
241	254	else
242	255	{
243		tilemap_set_scroll_rows(cps1_bg_tilemap[1],1);
244		tilemap_set_scrollx(cps1_bg_tilemap[1],0,cps1_scroll2x-60);
	256	tilemap_set_scroll_rows(state->bg_tilemap[1], 1);
	257	tilemap_set_scrollx(state->bg_tilemap[1], 0, state->scroll2x - 60);
245	258	}
246		tilemap_set_scrolly(cps1_bg_tilemap[1],0,cps1_scroll2y);
247		tilemap_set_scrollx(cps1_bg_tilemap[2],0,cps1_scroll3x-64);
248		tilemap_set_scrolly(cps1_bg_tilemap[2],0,cps1_scroll3y);
	259	tilemap_set_scrolly(state->bg_tilemap[1], 0, state->scroll2y);
	260	tilemap_set_scrollx(state->bg_tilemap[2], 0, state->scroll3x - 64);
	261	tilemap_set_scrolly(state->bg_tilemap[2], 0, state->scroll3y);
249	262
250	263
251	264	/* turn all tilemaps on regardless of settings in get_video_base() */
252	265	/* write a custom get_video_base for this bootleg hardware? */
253		tilemap_set_enable(cps1_bg_tilemap[0],1);
254		tilemap_set_enable(cps1_bg_tilemap[1],1);
255		tilemap_set_enable(cps1_bg_tilemap[2],1);
	266	tilemap_set_enable(state->bg_tilemap[0], 1);
	267	tilemap_set_enable(state->bg_tilemap[1], 1);
	268	tilemap_set_enable(state->bg_tilemap[2], 1);
256	269
257	270	/* Blank screen */
258		bitmap_fill(bitmap,cliprect,0xbff);
	271	bitmap_fill(bitmap, cliprect, 0xbff);
259	272
260	273	bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
261	274	l0 = (layercontrol >> 0x06) & 03;
r6740	r6741
263	276	l2 = (layercontrol >> 0x0a) & 03;
264	277	l3 = (layercontrol >> 0x0c) & 03;
265	278
266		fcrash_render_layer(screen->machine,bitmap,cliprect,l0,0);
267		if (l1 == 0) fcrash_render_high_layer(bitmap,cliprect,l0);
268		fcrash_render_layer(screen->machine,bitmap,cliprect,l1,0);
269		if (l2 == 0) fcrash_render_high_layer(bitmap,cliprect,l1);
270		fcrash_render_layer(screen->machine,bitmap,cliprect,l2,0);
271		if (l3 == 0) fcrash_render_high_layer(bitmap,cliprect,l2);
272		fcrash_render_layer(screen->machine,bitmap,cliprect,l3,0);
	279	fcrash_render_layer(screen->machine, bitmap, cliprect, l0, 0);
273	280
	281	if (l1 == 0)
	282	fcrash_render_high_layer(screen->machine, bitmap, cliprect, l0);
274	283
	284	fcrash_render_layer(screen->machine, bitmap, cliprect, l1, 0);
	285
	286	if (l2 == 0)
	287	fcrash_render_high_layer(screen->machine, bitmap, cliprect, l1);
	288
	289	fcrash_render_layer(screen->machine, bitmap, cliprect, l2, 0);
	290
	291	if (l3 == 0)
	292	fcrash_render_high_layer(screen->machine, bitmap, cliprect, l2);
	293
	294	fcrash_render_layer(screen->machine, bitmap, cliprect, l3, 0);
	295
275	296	return 0;
276	297	}
277	298
278	299	// doesn't have the scroll offsets like fcrash
279	300	static VIDEO_UPDATE( kodb )
280	301	{
281		int layercontrol,l0,l1,l2,l3;
282		int videocontrol=cps1_cps_a_regs[0x22/2];
	302	cps_state *state = (cps_state *)screen->machine->driver_data;
	303	int layercontrol, l0, l1, l2, l3;
	304	int videocontrol = state->cps_a_regs[0x22 / 2];
283	305
284
285	306	flip_screen_set(screen->machine, videocontrol & 0x8000);
286	307
287		layercontrol = cps1_cps_b_regs[0x20/2];
	308	layercontrol = state->cps_b_regs[0x20 / 2];
288	309
289	310	/* Get video memory base registers */
290		cps1_get_video_base();
	311	cps1_get_video_base(screen->machine);
291	312
292	313	/* Build palette */
293	314	fcrash_build_palette(screen->machine);
294	315
295		fcrash_update_transmasks();
	316	fcrash_update_transmasks(screen->machine);
296	317
297		tilemap_set_scrollx(cps1_bg_tilemap[0],0,cps1_scroll1x);
298		tilemap_set_scrolly(cps1_bg_tilemap[0],0,cps1_scroll1y);
	318	tilemap_set_scrollx(state->bg_tilemap[0], 0, state->scroll1x);
	319	tilemap_set_scrolly(state->bg_tilemap[0], 0, state->scroll1y);
	320
299	321	if (videocontrol & 0x01)   /* linescroll enable */
300	322	{
301		int scrly=-cps1_scroll2y;
	323	int scrly= -state->scroll2y;
302	324	int i;
303	325	int otheroffs;
304	326
305		tilemap_set_scroll_rows(cps1_bg_tilemap[1],1024);
	327	tilemap_set_scroll_rows(state->bg_tilemap[1], 1024);
306	328
307		otheroffs = cps1_cps_a_regs[CPS1_ROWSCROLL_OFFS];
	329	otheroffs = state->cps_a_regs[CPS1_ROWSCROLL_OFFS];
308	330
309		for (i = 0;i < 256;i++)
310		tilemap_set_scrollx(cps1_bg_tilemap[1],(i - scrly) & 0x3ff,cps1_scroll2x + cps1_other[(i + otheroffs) & 0x3ff]);
	331	for (i = 0; i < 256; i++)
	332	tilemap_set_scrollx(state->bg_tilemap[1], (i - scrly) & 0x3ff, state->scroll2x + state->other[(i + otheroffs) & 0x3ff]);
311	333	}
312	334	else
313	335	{
314		tilemap_set_scroll_rows(cps1_bg_tilemap[1],1);
315		tilemap_set_scrollx(cps1_bg_tilemap[1],0,cps1_scroll2x);
	336	tilemap_set_scroll_rows(state->bg_tilemap[1], 1);
	337	tilemap_set_scrollx(state->bg_tilemap[1], 0, state->scroll2x);
316	338	}
317		tilemap_set_scrolly(cps1_bg_tilemap[1],0,cps1_scroll2y);
318		tilemap_set_scrollx(cps1_bg_tilemap[2],0,cps1_scroll3x);
319		tilemap_set_scrolly(cps1_bg_tilemap[2],0,cps1_scroll3y);
320	339
	340	tilemap_set_scrolly(state->bg_tilemap[1], 0, state->scroll2y);
	341	tilemap_set_scrollx(state->bg_tilemap[2], 0, state->scroll3x);
	342	tilemap_set_scrolly(state->bg_tilemap[2], 0, state->scroll3y);
321	343
	344
322	345	/* turn all tilemaps on regardless of settings in get_video_base() */
323	346	/* write a custom get_video_base for this bootleg hardware? */
324		tilemap_set_enable(cps1_bg_tilemap[0],1);
325		tilemap_set_enable(cps1_bg_tilemap[1],1);
326		tilemap_set_enable(cps1_bg_tilemap[2],1);
	347	tilemap_set_enable(state->bg_tilemap[0], 1);
	348	tilemap_set_enable(state->bg_tilemap[1], 1);
	349	tilemap_set_enable(state->bg_tilemap[2], 1);
327	350
328	351	/* Blank screen */
329		bitmap_fill(bitmap,cliprect,0xbff);
	352	bitmap_fill(bitmap, cliprect, 0xbff);
330	353
331		bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
	354	bitmap_fill(screen->machine->priority_bitmap, cliprect, 0);
332	355	l0 = (layercontrol >> 0x06) & 03;
333	356	l1 = (layercontrol >> 0x08) & 03;
334	357	l2 = (layercontrol >> 0x0a) & 03;
335	358	l3 = (layercontrol >> 0x0c) & 03;
336	359
337		fcrash_render_layer(screen->machine,bitmap,cliprect,l0,0);
338		if (l1 == 0) fcrash_render_high_layer(bitmap,cliprect,l0);
339		fcrash_render_layer(screen->machine,bitmap,cliprect,l1,0);
340		if (l2 == 0) fcrash_render_high_layer(bitmap,cliprect,l1);
341		fcrash_render_layer(screen->machine,bitmap,cliprect,l2,0);
342		if (l3 == 0) fcrash_render_high_layer(bitmap,cliprect,l2);
343		fcrash_render_layer(screen->machine,bitmap,cliprect,l3,0);
	360	fcrash_render_layer(screen->machine, bitmap, cliprect, l0, 0);
344	361
	362	if (l1 == 0)
	363	fcrash_render_high_layer(screen->machine, bitmap, cliprect, l0);
345	364
	365	fcrash_render_layer(screen->machine, bitmap, cliprect, l1, 0);
	366
	367	if (l2 == 0)
	368	fcrash_render_high_layer(screen->machine, bitmap, cliprect, l1);
	369
	370	fcrash_render_layer(screen->machine, bitmap, cliprect, l2, 0);
	371
	372	if (l3 == 0)
	373	fcrash_render_high_layer(screen->machine, bitmap, cliprect, l2);
	374
	375	fcrash_render_layer(screen->machine, bitmap, cliprect, l3, 0);
	376
346	377	return 0;
347	378	}
348	379
r6740	r6741
350	381	static ADDRESS_MAP_START( fcrash_map, ADDRESS_SPACE_PROGRAM, 16 )
351	382	AM_RANGE(0x000000, 0x1fffff) AM_ROM
352	383	AM_RANGE(0x800030, 0x800031) AM_WRITE(cps1_coinctrl_w)
353		AM_RANGE(0x800100, 0x80013f) AM_RAM AM_BASE(&cps1_cps_a_regs)   /* CPS-A custom */
354		AM_RANGE(0x800140, 0x80017f) AM_RAM AM_BASE(&cps1_cps_b_regs)   /* CPS-B custom */
	384	AM_RANGE(0x800100, 0x80013f) AM_RAM AM_BASE_MEMBER(cps_state, cps_a_regs)   /* CPS-A custom */
	385	AM_RANGE(0x800140, 0x80017f) AM_RAM AM_BASE_MEMBER(cps_state, cps_b_regs)   /* CPS-B custom */
355	386	AM_RANGE(0x880000, 0x880001) AM_READ_PORT("IN1")            /* Player input ports */
356	387	AM_RANGE(0x880006, 0x880007) AM_WRITE(fcrash_soundlatch_w)      /* Sound command */
357	388	AM_RANGE(0x880008, 0x88000f) AM_READ(cps1_dsw_r)            /* System input ports / Dip Switches */
358	389	AM_RANGE(0x890000, 0x890001) AM_WRITENOP   // palette related?
359		AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)
	390	AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE_SIZE_MEMBER(cps_state, gfxram, gfxram_size)
360	391	AM_RANGE(0xff0000, 0xffffff) AM_RAM
361	392	ADDRESS_MAP_END
362	393
r6740	r6741
381	412	AM_RANGE(0x800020, 0x800021) AM_READNOP                  /* ? Used by Rockman ? not mapped according to PAL */
382	413	AM_RANGE(0x800030, 0x800037) AM_WRITE(cps1_coinctrl_w)
383	414	/* Forgotten Worlds has dial controls on B-board mapped at 800040-80005f. See DRIVER_INIT */
384		AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)   /* CPS-A custom */
385		AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)   /* CPS-B custom */
	415	AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs)   /* CPS-A custom */
	416	AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE_MEMBER(cps_state, cps_b_regs)   /* CPS-B custom */
386	417	//  AM_RANGE(0x800180, 0x800187) AM_WRITE(cps1_soundlatch_w)    /* Sound command */
387	418	//  AM_RANGE(0x800188, 0x80018f) AM_WRITE(cps1_soundlatch2_w)   /* Sound timer fade */
388	419	AM_RANGE(0x8001c0, 0x8001ff) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w)   /* mirror (SF2 revision "E" US 910228) */
389		AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)   /* SF2CE executes code from here */
	420	AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE_SIZE_MEMBER(cps_state, gfxram, gfxram_size)   /* SF2CE executes code from here */
390	421	AM_RANGE(0xff0000, 0xffffff) AM_RAM
391	422	ADDRESS_MAP_END
392	423
r6740	r6741
633	664	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
634	665	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
635	666
636		PORT_START("IN2")      /* Player 3 */
	667	PORT_START("IN2")
637	668	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(3)
638	669	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(3)
639	670	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(3)
r6740	r6741
658	689	};
659	690
660	691
	692	static MACHINE_START( fcrash )
	693	{
	694	cps_state *state = (cps_state *)machine->driver_data;
	695	UINT8 *ROM = memory_region(machine, "maincpu");
	696
	697	memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	698
	699	state->maincpu = devtag_get_device(machine, "maincpu");
	700	state->audiocpu = devtag_get_device(machine, "soundcpu");
	701	state->msm_1 = devtag_get_device(machine, "msm1");
	702	state->msm_2 = devtag_get_device(machine, "msm2");
	703
	704	state_save_register_global(machine, state->sample_buffer1);
	705	state_save_register_global(machine, state->sample_buffer2);
	706	state_save_register_global(machine, state->sample_select1);
	707	state_save_register_global(machine, state->sample_select2);
	708	}
	709
	710	static MACHINE_START( kodb )
	711	{
	712	cps_state *state = (cps_state *)machine->driver_data;
	713
	714	state->maincpu = devtag_get_device(machine, "maincpu");
	715	state->audiocpu = devtag_get_device(machine, "soundcpu");
	716	}
	717
	718	static MACHINE_RESET( fcrash )
	719	{
	720	cps_state *state = (cps_state *)machine->driver_data;
	721
	722	state->sample_buffer1 = 0;
	723	state->sample_buffer2 = 0;
	724	state->sample_select1 = 0;
	725	state->sample_select2 = 0;
	726	}
	727
661	728	static MACHINE_DRIVER_START( fcrash )
662	729
	730	/* driver data */
	731	MDRV_DRIVER_DATA(cps_state)
	732
663	733	/* basic machine hardware */
664	734	MDRV_CPU_ADD("maincpu", M68000, 10000000)
665	735	MDRV_CPU_PROGRAM_MAP(fcrash_map)
r6740	r6741
668	738	MDRV_CPU_ADD("soundcpu", Z80, 24000000/6) /* ? */
669	739	MDRV_CPU_PROGRAM_MAP(sound_map)
670	740
	741	MDRV_MACHINE_START(fcrash)
	742	MDRV_MACHINE_RESET(fcrash)
	743
671	744	/* video hardware */
672	745	MDRV_SCREEN_ADD("screen", RASTER)
673	746	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
709	782
710	783	static MACHINE_DRIVER_START( kodb )
711	784
	785	/* driver data */
	786	MDRV_DRIVER_DATA(cps_state)
	787
712	788	/* basic machine hardware */
713	789	MDRV_CPU_ADD("maincpu", M68000, 10000000)
714	790	MDRV_CPU_PROGRAM_MAP(kodb_map)
715	791	MDRV_CPU_VBLANK_INT("screen", cps1_interrupt)
716	792
717		//  MDRV_CPU_ADD("audiocpu", Z80, 3579545)
	793	//  MDRV_CPU_ADD("soundcpu", Z80, 3579545)
718	794	//  MDRV_CPU_PROGRAM_MAP(sub_map)
719	795
	796	MDRV_MACHINE_START(kodb)
	797
720	798	/* video hardware */
721	799	MDRV_SCREEN_ADD("screen", RASTER)
722	800	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
844	922	ROM_LOAD( "2.ic19",      0x00000, 0x40000, CRC(a2db1575) SHA1(1a4a29e4b045af50700adf1665697feab12cc234) )
845	923	ROM_END
846	924
847		GAME( 1990, fcrash,   ffight,  fcrash,     fcrash,   cps1,     ROT0,   "[Capcom] (Playmark bootleg)", "Final Crash (bootleg of Final Fight)", 0 )
848		GAME( 1991, kodb,     kod,     kodb,       kodb,     cps1,     ROT0,   "[Capcom] (Playmark bootleg)", "The King of Dragons (bootleg)", GAME_NOT_WORKING | GAME_NO_SOUND )   // 910731  "ETC"
	925	GAME( 1990, fcrash,   ffight,  fcrash,     fcrash,   cps1,     ROT0,   "[Capcom] (Playmark bootleg)", "Final Crash (bootleg of Final Fight)", GAME_SUPPORTS_SAVE )
	926	GAME( 1991, kodb,     kod,     kodb,       kodb,     cps1,     ROT0,   "[Capcom] (Playmark bootleg)", "The King of Dragons (bootleg)", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_SUPPORTS_SAVE )   // 910731  "ETC"

src/mame/drivers/cosmic.c

r6740	r6741
42	42	#include "cpu/z80/z80.h"
43	43	#include "sound/samples.h"
44	44	#include "sound/dac.h"
45		#include "cosmic.h"
	45	#include "includes/cosmic.h"
46	46
47	47
48	48	/* Schematics show 12 triggers for discrete sound circuits */

src/mame/drivers/model2.c

r6740	r6741
72	72
73	73	static UINT32 model2_timervals[4], model2_timerorig[4];
74	74	static int      model2_timerrun[4];
75		static emu_timer *model2_timers[4];
	75	static const device_config *model2_timers[4];
76	76	static int model2_ctrlmode;
77	77	static int analog_channel;
78	78
r6740	r6741
271	271	if (model2_timerrun[offset])
272	272	{
273	273	// get elapsed time, convert to units of 25 MHz
274		UINT32 cur = attotime_to_double(attotime_mul(timer_timeelapsed(model2_timers[offset]), 25000000));
	274	UINT32 cur = attotime_to_double(attotime_mul(timer_device_timeelapsed(model2_timers[offset]), 25000000));
275	275
276	276	// subtract units from starting value
277	277	model2_timervals[offset] = model2_timerorig[offset] - cur;
r6740	r6741
289	289
290	290	model2_timerorig[offset] = model2_timervals[offset];
291	291	period = attotime_mul(ATTOTIME_IN_HZ(25000000), model2_timerorig[offset]);
292		timer_adjust_oneshot(model2_timers[offset], period, 0);
	292	timer_device_adjust_oneshot(model2_timers[offset], period, 0);
293	293	model2_timerrun[offset] = 1;
294	294	}
295	295
296		static TIMER_CALLBACK( model2_timer_cb )
	296	static TIMER_DEVICE_CALLBACK( model2_timer_cb )
297	297	{
298	298	int tnum = (int)(FPTR)ptr;
299	299	int bit = tnum + 2;
300	300
301		timer_adjust_oneshot(model2_timers[tnum], attotime_never, 0);
	301	timer_device_adjust_oneshot(model2_timers[tnum], attotime_never, 0);
302	302
303	303	model2_intreq |= (1<<bit);
304	304	if (model2_intena & (1<<bit))
305	305	{
306		cputag_set_input_line(machine, "maincpu", I960_IRQ2, ASSERT_LINE);
	306	cputag_set_input_line(timer->machine, "maincpu", I960_IRQ2, ASSERT_LINE);
307	307	}
308	308
309	309	model2_timervals[tnum] = 0;
r6740	r6741
330	330
331	331	model2_timerrun[0] = model2_timerrun[1] = model2_timerrun[2] = model2_timerrun[3] = 0;
332	332
	333	model2_timers[0] = devtag_get_device(machine, "timer0");
	334	model2_timers[1] = devtag_get_device(machine, "timer1");
	335	model2_timers[2] = devtag_get_device(machine, "timer2");
	336	model2_timers[3] = devtag_get_device(machine, "timer3");
333	337	for (i=0; i<4; i++)
334		{
335		model2_timers[i] = timer_alloc(machine, model2_timer_cb, (void*)(FPTR)i);
336		timer_adjust_oneshot(model2_timers[i], attotime_never, 0);
337		}
	338	timer_device_adjust_oneshot(model2_timers[i], attotime_never, 0);
338	339	}
339	340
340	341	static MACHINE_RESET(model2o)
r6740	r6741
1843	1844	MDRV_MACHINE_RESET(model2o)
1844	1845	MDRV_NVRAM_HANDLER( model2 )
1845	1846
	1847	MDRV_TIMER_ADD("timer0", model2_timer_cb)
	1848	MDRV_TIMER_PTR((FPTR)0)
	1849	MDRV_TIMER_ADD("timer1", model2_timer_cb)
	1850	MDRV_TIMER_PTR((FPTR)1)
	1851	MDRV_TIMER_ADD("timer2", model2_timer_cb)
	1852	MDRV_TIMER_PTR((FPTR)2)
	1853	MDRV_TIMER_ADD("timer3", model2_timer_cb)
	1854	MDRV_TIMER_PTR((FPTR)3)
	1855
1846	1856	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK )
1847	1857
1848	1858	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
1888	1898	MDRV_MACHINE_RESET(model2)
1889	1899	MDRV_NVRAM_HANDLER( model2 )
1890	1900
	1901	MDRV_TIMER_ADD("timer0", model2_timer_cb)
	1902	MDRV_TIMER_PTR((FPTR)0)
	1903	MDRV_TIMER_ADD("timer1", model2_timer_cb)
	1904	MDRV_TIMER_PTR((FPTR)1)
	1905	MDRV_TIMER_ADD("timer2", model2_timer_cb)
	1906	MDRV_TIMER_PTR((FPTR)2)
	1907	MDRV_TIMER_ADD("timer3", model2_timer_cb)
	1908	MDRV_TIMER_PTR((FPTR)3)
	1909
1891	1910	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK )
1892	1911
1893	1912	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
1938	1957	MDRV_MACHINE_RESET(model2b)
1939	1958	MDRV_NVRAM_HANDLER( model2 )
1940	1959
	1960	MDRV_TIMER_ADD("timer0", model2_timer_cb)
	1961	MDRV_TIMER_PTR((FPTR)0)
	1962	MDRV_TIMER_ADD("timer1", model2_timer_cb)
	1963	MDRV_TIMER_PTR((FPTR)1)
	1964	MDRV_TIMER_ADD("timer2", model2_timer_cb)
	1965	MDRV_TIMER_PTR((FPTR)2)
	1966	MDRV_TIMER_ADD("timer3", model2_timer_cb)
	1967	MDRV_TIMER_PTR((FPTR)3)
	1968
1941	1969	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK )
1942	1970
1943	1971	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
1972	2000	MDRV_MACHINE_RESET(model2c)
1973	2001	MDRV_NVRAM_HANDLER( model2 )
1974	2002
	2003	MDRV_TIMER_ADD("timer0", model2_timer_cb)
	2004	MDRV_TIMER_PTR((FPTR)0)
	2005	MDRV_TIMER_ADD("timer1", model2_timer_cb)
	2006	MDRV_TIMER_PTR((FPTR)1)
	2007	MDRV_TIMER_ADD("timer2", model2_timer_cb)
	2008	MDRV_TIMER_PTR((FPTR)2)
	2009	MDRV_TIMER_ADD("timer3", model2_timer_cb)
	2010	MDRV_TIMER_PTR((FPTR)3)
	2011
1975	2012	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK )
1976	2013
1977	2014	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/ataxx.c

r6740	r6741
29	29	#include "cpu/i86/i86.h"
30	30	#include "machine/eeprom.h"
31	31	#include "cpu/z80/z80.h"
32		#include "leland.h"
	32	#include "includes/leland.h"
33	33	#include "sound/2151intf.h"
34	34
35	35

src/mame/drivers/wiping.c

r6740	r6741
85	85
86	86	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
87	87	AM_RANGE(0x0000, 0x5fff) AM_ROM
88		AM_RANGE(0x8000, 0x83ff) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)      /* Fallthrough */
89		AM_RANGE(0x8400, 0x87ff) AM_BASE_GENERIC(colorram)
	88	AM_RANGE(0x8000, 0x83ff) AM_BASE(&wiping_videoram)
	89	AM_RANGE(0x8400, 0x87ff) AM_BASE(&wiping_colorram)
90	90	AM_RANGE(0x8800, 0x88ff) AM_BASE_SIZE_GENERIC(spriteram)
91	91	AM_RANGE(0x8000, 0x8bff) AM_RAM
92	92	AM_RANGE(0x9000, 0x93ff) AM_READWRITE(shared1_r,shared1_w) AM_BASE(&sharedram1)

src/mame/drivers/popeye.c

r6740	r6741
21	21	#include "sound/ay8910.h"
22	22
23	23
	24	extern UINT8 *popeye_videoram;
	25	extern UINT8 *popeye_colorram;
24	26	extern UINT8 *popeye_background_pos;
25	27	extern UINT8 *popeye_palettebank;
26	28
r6740	r6741
86	88	AM_RANGE(0x8c03, 0x8c03) AM_RAM AM_BASE(&popeye_palettebank)
87	89	AM_RANGE(0x8c04, 0x8e7f) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
88	90	AM_RANGE(0x8e80, 0x8fff) AM_RAM
89		AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE_GENERIC(videoram)
90		AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE_GENERIC(colorram)
	91	AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE(&popeye_videoram)
	92	AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE(&popeye_colorram)
91	93	AM_RANGE(0xc000, 0xcfff) AM_WRITE(skyskipr_bitmap_w)
92	94	AM_RANGE(0xe000, 0xe001) AM_READWRITE(protection_r,protection_w)
93	95	ADDRESS_MAP_END
r6740	r6741
100	102	AM_RANGE(0x8c03, 0x8c03) AM_RAM AM_BASE(&popeye_palettebank)
101	103	AM_RANGE(0x8c04, 0x8e7f) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
102	104	AM_RANGE(0x8e80, 0x8fff) AM_RAM
103		AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE_GENERIC(videoram)
104		AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE_GENERIC(colorram)
	105	AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE(&popeye_videoram)
	106	AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE(&popeye_colorram)
105	107	AM_RANGE(0xc000, 0xdfff) AM_WRITE(popeye_bitmap_w)
106	108	AM_RANGE(0xe000, 0xe001) AM_READWRITE(protection_r,protection_w)
107	109	ADDRESS_MAP_END
r6740	r6741
113	115	AM_RANGE(0x8c03, 0x8c03) AM_RAM AM_BASE(&popeye_palettebank)
114	116	AM_RANGE(0x8c04, 0x8e7f) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
115	117	AM_RANGE(0x8e80, 0x8fff) AM_RAM
116		AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE_GENERIC(videoram)
117		AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE_GENERIC(colorram)
	118	AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE(&popeye_videoram)
	119	AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE(&popeye_colorram)
118	120	AM_RANGE(0xc000, 0xcfff) AM_WRITE(skyskipr_bitmap_w)
119	121	AM_RANGE(0xe000, 0xe01f) AM_ROM
120	122	ADDRESS_MAP_END

src/mame/drivers/taxidrvr.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "cpu/z80/z80.h"
9	9	#include "machine/8255ppi.h"
10		#include "taxidrvr.h"
	10	#include "includes/taxidrvr.h"
11	11	#include "sound/ay8910.h"
12	12
13	13

src/mame/drivers/compgolf.c

r6740	r6741
13	13	#include "driver.h"
14	14	#include "cpu/m6809/m6809.h"
15	15	#include "sound/2203intf.h"
16		#include "compgolf.h"
	16	#include "includes/compgolf.h"
17	17
18	18
19	19	/*************************************

src/mame/drivers/cps2.c

r6740	r6741
591	591	#include "sound/qsound.h"
592	592	#include "sound/okim6295.h" // gigamn2 bootleg
593	593
594		#include "cps1.h"       /* External CPS1 definitions */
	594	#include "includes/cps1.h"       /* External CPS1 definitions */
595	595
596		/*
597		Export this function so that the video routine can drive the
598		Q-Sound hardware
599		*/
600		#ifdef UNUSED_FUNCTION
601		WRITE16_HANDLER( cps2_qsound_sharedram_w )
602		{
603		qsound_sharedram1_w(offset/2, data, 0xff00);
604		}
605		#endif
606	596
607
608	597	/*************************************
609	598	*
610	599	*  Constants
r6740	r6741
621	610
622	611	/*************************************
623	612	*
624		*  Global variables
625		*
626		*************************************/
627
628		static int readpaddle;
629		static int cps2networkpresent;
630
631
632		/*************************************
633		*
634	613	*  Interrupt generation
635	614	*
636	615	*************************************/
637	616
638	617	static INTERRUPT_GEN( cps2_interrupt )
639	618	{
640		static int scancount;
	619	cps_state *state = (cps_state *)device->machine->driver_data;
641	620
642	621	/* 2 is vblank, 4 is some sort of scanline interrupt, 6 is both at the same time. */
643
644		if(scancount >= 258)
	622	if (state->scancount >= 258)
645	623	{
646		scancount = -1;
647		cps1_scancalls = 0;
	624	state->scancount = -1;
	625	state->scancalls = 0;
648	626	}
649		scancount++;
	627	state->scancount++;
650	628
651		if (cps1_cps_b_regs[0x10/2] & 0x8000)
652		cps1_cps_b_regs[0x10/2] = cps1_cps_b_regs[0x10/2] & 0x1ff;
653		if (cps1_cps_b_regs[0x12/2] & 0x8000)
654		cps1_cps_b_regs[0x12/2] = cps1_cps_b_regs[0x12/2] & 0x1ff;
	629	if (state->cps_b_regs[0x10 / 2] & 0x8000)
	630	state->cps_b_regs[0x10 / 2] &= 0x1ff;
655	631
656		//  popmessage("%04x %04x - %04x %04x",cps1_scanline1,cps1_scanline2,cps1_cps_b_regs[0x10/2],cps1_cps_b_regs[0x12/2]);
	632	if (state->cps_b_regs[0x12 / 2] & 0x8000)
	633	state->cps_b_regs[0x12 / 2] &= 0x1ff;
657	634
	635	//  popmessage("%04x %04x - %04x %04x",state->scanline1,state->scanline2,state->cps_b_regs[0x10/2],state->cps_b_regs[0x12/2]);
	636
658	637	/* raster effects */
659		if(cps1_scanline1 == scancount || (cps1_scanline1 < scancount && !cps1_scancalls))
	638	if (state->scanline1 == state->scancount || (state->scanline1 < state->scancount && !state->scancalls))
660	639	{
661		cps1_cps_b_regs[0x10/2] = 0;
	640	state->cps_b_regs[0x10/2] = 0;
662	641	cpu_set_input_line(device, 4, HOLD_LINE);
663		cps2_set_sprite_priorities();
664		video_screen_update_partial(device->machine->primary_screen, 16 - 10 + scancount);   /* visarea.min_y - [first visible line?] + scancount */
665		cps1_scancalls++;
666		//          popmessage("IRQ4 scancounter = %04i",scancount);
	642	cps2_set_sprite_priorities(device->machine);
	643	video_screen_update_partial(device->machine->primary_screen, 16 - 10 + state->scancount);   /* visarea.min_y - [first visible line?] + scancount */
	644	state->scancalls++;
	645	//          popmessage("IRQ4 scancounter = %04i", state->scancount);
667	646	}
668	647
669	648	/* raster effects */
670		if(cps1_scanline2 == scancount || (cps1_scanline2 < scancount && !cps1_scancalls))
	649	if(state->scanline2 == state->scancount || (state->scanline2 < state->scancount && !state->scancalls))
671	650	{
672		cps1_cps_b_regs[0x12/2] = 0;
	651	state->cps_b_regs[0x12 / 2] = 0;
673	652	cpu_set_input_line(device, 4, HOLD_LINE);
674		cps2_set_sprite_priorities();
675		video_screen_update_partial(device->machine->primary_screen, 16 - 10 + scancount);   /* visarea.min_y - [first visible line?] + scancount */
676		cps1_scancalls++;
	653	cps2_set_sprite_priorities(device->machine);
	654	video_screen_update_partial(device->machine->primary_screen, 16 - 10 + state->scancount);   /* visarea.min_y - [first visible line?] + scancount */
	655	state->scancalls++;
677	656	//          popmessage("IRQ4 scancounter = %04i",scancount);
678	657	}
679	658
680		if(scancount == 240)  /* VBlank */
	659	if (state->scancount == 240)  /* VBlank */
681	660	{
682		cps1_cps_b_regs[0x10/2] = cps1_scanline1;
683		cps1_cps_b_regs[0x12/2] = cps1_scanline2;
	661	state->cps_b_regs[0x10 / 2] = state->scanline1;
	662	state->cps_b_regs[0x12 / 2] = state->scanline2;
684	663	cpu_set_input_line(device, 2, HOLD_LINE);
685		if(cps1_scancalls)
	664	if(state->scancalls)
686	665	{
687		cps2_set_sprite_priorities();
	666	cps2_set_sprite_priorities(device->machine);
688	667	video_screen_update_partial(device->machine->primary_screen, 256);
689	668	}
690		cps2_objram_latch();
	669	cps2_objram_latch(device->machine);
691	670	}
692		//popmessage("Raster calls = %i",cps1_scancalls);
	671	//popmessage("Raster calls = %i", state->scancalls);
693	672	}
694	673
695	674
r6740	r6741
710	689
711	690	static WRITE16_HANDLER( cps2_eeprom_port_w )
712	691	{
	692	cps_state *state = (cps_state *)space->machine->driver_data;
	693
713	694	if (ACCESSING_BITS_8_15)
714	695	{
715	696	/* bit 0 - Unused */
r6740	r6741
737	718	/* bit 7 - */
738	719
739	720	/* Z80 Reset */
740		if (cputag_get_cpu(space->machine, "audiocpu"))
741		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 0x0008) ? CLEAR_LINE : ASSERT_LINE);
	721	if (state->audiocpu != NULL)
	722	cpu_set_input_line(state->audiocpu, INPUT_LINE_RESET, (data & 0x0008) ? CLEAR_LINE : ASSERT_LINE);
742	723
743	724	coin_counter_w(space->machine, 0, data & 0x0001);
744		if( (strncmp(space->machine->gamedrv->name,"pzloop2",8)==0) ||
745		(strncmp(space->machine->gamedrv->name,"pzloop2j",8)==0) )
	725	if ((strncmp(space->machine->gamedrv->name, "pzloop2", 8) == 0) ||
	726	(strncmp(space->machine->gamedrv->name, "pzloop2j", 8) == 0))
746	727	{
747	728	// Puzz Loop 2 uses coin counter 2 input to switch between stick and paddle controls
748		readpaddle = data & 0x0002;
	729	state->readpaddle = data & 0x0002;
749	730	}
750	731	else
751	732	{
752	733	coin_counter_w(space->machine, 1, data & 0x0002);
753	734	}
754	735
755		if(strncmp(space->machine->gamedrv->name,"mmatrix",7)==0)      // Mars Matrix seems to require the coin lockout bit to be reversed
	736	if (strncmp(space->machine->gamedrv->name, "mmatrix", 7) == 0)      // Mars Matrix seems to require the coin lockout bit to be reversed
756	737	{
757		coin_lockout_w(space->machine, 0,data & 0x0010);
758		coin_lockout_w(space->machine, 1,data & 0x0020);
759		coin_lockout_w(space->machine, 2,data & 0x0040);
760		coin_lockout_w(space->machine, 3,data & 0x0080);
	738	coin_lockout_w(space->machine, 0, data & 0x0010);
	739	coin_lockout_w(space->machine, 1, data & 0x0020);
	740	coin_lockout_w(space->machine, 2, data & 0x0040);
	741	coin_lockout_w(space->machine, 3, data & 0x0080);
761	742	}
762	743	else
763	744	{
764		coin_lockout_w(space->machine, 0,~data & 0x0010);
765		coin_lockout_w(space->machine, 1,~data & 0x0020);
766		coin_lockout_w(space->machine, 2,~data & 0x0040);
767		coin_lockout_w(space->machine, 3,~data & 0x0080);
	745	coin_lockout_w(space->machine, 0, ~data & 0x0010);
	746	coin_lockout_w(space->machine, 1, ~data & 0x0020);
	747	coin_lockout_w(space->machine, 2, ~data & 0x0040);
	748	coin_lockout_w(space->machine, 3, ~data & 0x0080);
768	749	}
769	750
770	751	/*
771		set_led_status(space->machine, 0,data & 0x01);
772		set_led_status(space->machine, 1,data & 0x10);
773		set_led_status(space->machine, 2,data & 0x20);
	752	set_led_status(space->machine, 0, data & 0x01);
	753	set_led_status(space->machine, 1, data & 0x10);
	754	set_led_status(space->machine, 2, data & 0x20);
774	755	*/
775	756	}
776	757	}
r6740	r6741
784	765
785	766	static READ16_HANDLER( cps2_qsound_volume_r )
786	767	{
	768	cps_state *state = (cps_state *)space->machine->driver_data;
	769
787	770	/* Extra adapter memory (0x660000-0x663fff) available when bit 14 = 0 */
788	771	/* Network adapter (ssf2tb) present when bit 15 = 0 */
789	772	/* Only game known to use both these so far is SSF2TB */
790	773
791		if(cps2networkpresent)
	774	if (state->cps2networkpresent)
792	775	return 0x2021;
793	776	else
794	777	return 0xe021;
r6740	r6741
808	791
809	792	static READ16_HANDLER( joy_or_paddle_r )
810	793	{
811		if (readpaddle != 0)
	794	cps_state *state = (cps_state *)space->machine->driver_data;
	795
	796	if (state->readpaddle != 0)
812	797	return (input_port_read(space->machine, "IN0"));
813	798	else
814	799	return (input_port_read(space->machine, "PADDLE1") & 0xff) | (input_port_read(space->machine, "PADDLE2") << 8);
r6740	r6741
823	808
824	809	static ADDRESS_MAP_START( cps2_map, ADDRESS_SPACE_PROGRAM, 16 )
825	810	AM_RANGE(0x000000, 0x3fffff) AM_ROM                                                         /* 68000 ROM */
826		AM_RANGE(0x400000, 0x40000b) AM_RAM AM_BASE(&cps2_output) AM_SIZE(&cps2_output_size)                  /* CPS2 object output */
	811	AM_RANGE(0x400000, 0x40000b) AM_RAM AM_BASE_SIZE_MEMBER(cps_state, output, output_size)                  /* CPS2 object output */
827	812	AM_RANGE(0x618000, 0x619fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w)                      /* Q RAM */
828	813	AM_RANGE(0x662000, 0x662001) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
829	814	AM_RANGE(0x662008, 0x662009) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
830	815	AM_RANGE(0x662020, 0x662021) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
831	816	AM_RANGE(0x660000, 0x663fff) AM_RAM                                                         /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */
832	817	AM_RANGE(0x664000, 0x664001) AM_RAM                                                         /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */
833		AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE(&cps2_objram1)                          /* Object RAM, no game seems to use it directly */
834		AM_RANGE(0x708000, 0x709fff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* Object RAM */
835		AM_RANGE(0x70a000, 0x70bfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
836		AM_RANGE(0x70c000, 0x70dfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
837		AM_RANGE(0x70e000, 0x70ffff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
838		AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)                        /* mirror (sfa) */
839		AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)          /* mirror (sfa) */
	818	AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE_MEMBER(cps_state, objram1)                          /* Object RAM, no game seems to use it directly */
	819	AM_RANGE(0x708000, 0x709fff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2)         /* Object RAM */
	820	AM_RANGE(0x70a000, 0x70bfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2)         /* mirror */
	821	AM_RANGE(0x70c000, 0x70dfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2)         /* mirror */
	822	AM_RANGE(0x70e000, 0x70ffff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2)         /* mirror */
	823	AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs)                        /* mirror (sfa) */
	824	AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE_MEMBER(cps_state, cps_b_regs)          /* mirror (sfa) */
840	825	AM_RANGE(0x804000, 0x804001) AM_READ_PORT("IN0")                                                 /* IN0 */
841	826	AM_RANGE(0x804010, 0x804011) AM_READ_PORT("IN1")                                                 /* IN1 */
842	827	AM_RANGE(0x804020, 0x804021) AM_READ_PORT("IN2")                                                 /* IN2 + EEPROM */
r6740	r6741
845	830	AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP                                                         /* Unknown (reset once on startup) */
846	831	AM_RANGE(0x8040b0, 0x8040b3) AM_READ(kludge_r)                                                /* unknown (xmcotaj hangs if this is 0) */
847	832	AM_RANGE(0x8040e0, 0x8040e1) AM_WRITE(cps2_objram_bank_w)                                       /* bit 0 = Object ram bank swap */
848		AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)                         /* CPS-A custom */
	833	AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs)                     /* CPS-A custom */
849	834	AM_RANGE(0x804140, 0x80417f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w)                                   /* CPS-B custom */
850		AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)   /* Video RAM */
	835	AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE_SIZE_MEMBER(cps_state, gfxram, gfxram_size)   /* Video RAM */
851	836	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                                         /* RAM */
852	837	ADDRESS_MAP_END
853	838
854	839
855	840	static ADDRESS_MAP_START( dead_cps2_map, ADDRESS_SPACE_PROGRAM, 16 )
856	841	AM_RANGE(0x000000, 0x3fffff) AM_ROM                                                         /* 68000 ROM */
857		AM_RANGE(0x400000, 0x40000b) AM_RAM AM_BASE(&cps2_output) AM_SIZE(&cps2_output_size)                  /* CPS2 object output */
	842	AM_RANGE(0x400000, 0x40000b) AM_RAM AM_BASE_SIZE_MEMBER(cps_state, output, output_size)                  /* CPS2 object output */
858	843	AM_RANGE(0x618000, 0x619fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w)                      /* Q RAM */
859	844	AM_RANGE(0x662000, 0x662001) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
860	845	AM_RANGE(0x662008, 0x662009) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
861	846	AM_RANGE(0x662020, 0x662021) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
862	847	AM_RANGE(0x660000, 0x663fff) AM_RAM                                                         /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */
863	848	AM_RANGE(0x664000, 0x664001) AM_RAM                                                         /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */
864		AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE(&cps2_objram1)                          /* Object RAM, no game seems to use it directly */
865		AM_RANGE(0x708000, 0x709fff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* Object RAM */
866		AM_RANGE(0x70a000, 0x70bfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
867		AM_RANGE(0x70c000, 0x70dfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
868		AM_RANGE(0x70e000, 0x70ffff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
869		AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)                        /* mirror (sfa) */
870		AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)          /* mirror (sfa) */
	849	AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE_MEMBER(cps_state, objram1)                          /* Object RAM, no game seems to use it directly */
	850	AM_RANGE(0x708000, 0x709fff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2)         /* Object RAM */
	851	AM_RANGE(0x70a000, 0x70bfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2)         /* mirror */
	852	AM_RANGE(0x70c000, 0x70dfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2)         /* mirror */
	853	AM_RANGE(0x70e000, 0x70ffff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2)         /* mirror */
	854	AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs)                        /* mirror (sfa) */
	855	AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE_MEMBER(cps_state, cps_b_regs)          /* mirror (sfa) */
871	856	AM_RANGE(0x804000, 0x804001) AM_READ_PORT("IN0")                                                 /* IN0 */
872	857	AM_RANGE(0x804010, 0x804011) AM_READ_PORT("IN1")                                                 /* IN1 */
873	858	AM_RANGE(0x804020, 0x804021) AM_READ_PORT("IN2")                                                 /* IN2 + EEPROM */
r6740	r6741
876	861	AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP                                                         /* Unknown (reset once on startup) */
877	862	AM_RANGE(0x8040b0, 0x8040b3) AM_READ(kludge_r)                                                /* unknown (xmcotaj hangs if this is 0) */
878	863	AM_RANGE(0x8040e0, 0x8040e1) AM_WRITE(cps2_objram_bank_w)                                       /* bit 0 = Object ram bank swap */
879		AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)                         /* CPS-A custom */
	864	AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs)                         /* CPS-A custom */
880	865	AM_RANGE(0x804140, 0x80417f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w)                                   /* CPS-B custom */
881		AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)   /* Video RAM */
	866	AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE_SIZE_MEMBER(cps_state, gfxram, gfxram_size)   /* Video RAM */
882	867	AM_RANGE(0xff0000, 0xffffef) AM_RAM                                                         /* RAM */
883		AM_RANGE(0xfffff0, 0xfffffb) AM_RAM AM_BASE(&cps2_output) AM_SIZE(&cps2_output_size)                  /* CPS2 output */
	868	AM_RANGE(0xfffff0, 0xfffffb) AM_RAM AM_BASE_SIZE_MEMBER(cps_state, output, output_size)                  /* CPS2 output */
884	869	ADDRESS_MAP_END
885	870
886	871
r6740	r6741
892	877
893	878	/* 4 players and 4 buttons */
894	879	static INPUT_PORTS_START( cps2_4p4b )
895		PORT_START("IN0")      /* IN0 (0x00) */
	880	PORT_START("IN0")      /* (0x00) */
896	881	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
897	882	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
898	883	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
r6740	r6741
910	895	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
911	896	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
912	897
913		PORT_START("IN1")      /* IN1 (0x10) */
	898	PORT_START("IN1")      /* (0x10) */
914	899	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(3)
915	900	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(3)
916	901	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(3)
r6740	r6741
928	913	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(4)
929	914	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(4)
930	915
931		PORT_START("IN2")      /* IN2 (0x20) */
	916	PORT_START("IN2")      /* (0x20) */
932	917	PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
933	918	PORT_SERVICE_NO_TOGGLE( 0x0002, IP_ACTIVE_LOW )
934	919	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
r6740	r6741
1198	1183	*
1199	1184	*************************************/
1200	1185
	1186	static MACHINE_START( cps2 )
	1187	{
	1188	cps_state *state = (cps_state *)machine->driver_data;
	1189
	1190	state->maincpu = devtag_get_device(machine, "maincpu");
	1191	state->audiocpu = devtag_get_device(machine, "audiocpu");
	1192
	1193	state_save_register_global(machine, state->scancount);
	1194
	1195	if (state->audiocpu != NULL)   // gigamn2 has no audiocpu
	1196	memory_configure_bank(machine, "bank1", 0, (QSOUND_SIZE - 0x10000) / 0x4000, memory_region(machine, "audiocpu") + 0x10000, 0x4000);
	1197	}
	1198
	1199
1201	1200	static MACHINE_DRIVER_START( cps2 )
1202	1201
	1202	/* driver data */
	1203	MDRV_DRIVER_DATA(cps_state)
	1204
1203	1205	/* basic machine hardware */
1204	1206	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
1205	1207	MDRV_CPU_PROGRAM_MAP(cps2_map)
r6740	r6741
1209	1211	MDRV_CPU_PROGRAM_MAP(qsound_sub_map)
1210	1212	MDRV_CPU_PERIODIC_INT(irq0_line_hold, 251)   /* 251 is good (see 'mercy mercy mercy'section of sgemf attract mode for accurate sound sync */
1211	1213
	1214	MDRV_MACHINE_START(cps2)
	1215
1212	1216	MDRV_EEPROM_NODEFAULT_ADD("eeprom", cps2_eeprom_interface)
1213	1217
1214	1218	/* video hardware */
r6740	r6741
3305	3309	ROM_LOAD16_WORD_SWAP( "ggw.12m",   0x400000, 0x400000, CRC(4bee4e8f) SHA1(c440b5a38359ec3b8002f39690b79bf78703f5d0) )
3306	3310	ROM_END
3307	3311
3308
3309	3312	ROM_START( hsf2 )
3310	3313	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
	3314	ROM_LOAD16_WORD_SWAP( "hs2.03u",  0x000000, 0x80000, CRC(b308151e) SHA1(afdfd3b049c6435e2291bc35d8c26ff5bff223d8) )
	3315	ROM_LOAD16_WORD_SWAP( "hs2.04u",  0x080000, 0x80000, CRC(327aa49c) SHA1(6719cd6ecc2a4487fdbf5cbcd47e35fc43000607) )
	3316	ROM_LOAD16_WORD_SWAP( "hs2.05",   0x100000, 0x80000, CRC(dde34a35) SHA1(f5be2d2916db6e86e0886d61d55bddf138273ebc) )
	3317	ROM_LOAD16_WORD_SWAP( "hs2.06",   0x180000, 0x80000, CRC(f4e56dda) SHA1(c6490707c2a416ab88612c2d73abbe5853d8cb92) )
	3318	ROM_LOAD16_WORD_SWAP( "hs2.07",   0x200000, 0x80000, CRC(ee4420fc) SHA1(06cf76660b0c794d2460c52d9fe8334fff51e9de) )
	3319	ROM_LOAD16_WORD_SWAP( "hs2.08",   0x280000, 0x80000, CRC(c9441533) SHA1(bf178fac1f060fcce3ff9118333c8517dadc9429) )
	3320	ROM_LOAD16_WORD_SWAP( "hs2.09",   0x300000, 0x80000, CRC(3fc638a8) SHA1(2a42877b26c8abc437da46225701f0bba6e40058) )
	3321	ROM_LOAD16_WORD_SWAP( "hs2.10",   0x380000, 0x80000, CRC(20d0f9e4) SHA1(80a5eeef9472e327b0d4ee26434bad109a9434ea) )
	3322
	3323	ROM_REGION( 0x2000000, "gfx", 0 )
	3324	ROMX_LOAD( "hs2.13m",   0x0000000, 0x800000, CRC(a6ecab17) SHA1(6749a4c8dc81f4b10f910c31c82cf6674e2a44eb) , ROM_GROUPWORD | ROM_SKIP(6) )
	3325	ROMX_LOAD( "hs2.15m",   0x0000002, 0x800000, CRC(10a0ae4d) SHA1(701b4900fbc8bef20efa1a706891c8df4bf14641) , ROM_GROUPWORD | ROM_SKIP(6) )
	3326	ROMX_LOAD( "hs2.17m",   0x0000004, 0x800000, CRC(adfa7726) SHA1(8d36ec125a8c91abfe5213893d794f8bc11c8acd) , ROM_GROUPWORD | ROM_SKIP(6) )
	3327	ROMX_LOAD( "hs2.19m",   0x0000006, 0x800000, CRC(bb3ae322) SHA1(ecd289d7a0fe365fdd7c5527cb17796002beb553) , ROM_GROUPWORD | ROM_SKIP(6) )
	3328
	3329	ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */
	3330	ROM_LOAD( "hs2.01",   0x00000, 0x08000, CRC(c1a13786) SHA1(c7392c7efb15ea4042e75bd9007e974293d8935d) )
	3331	ROM_CONTINUE(         0x10000, 0x18000 )
	3332	ROM_LOAD( "hs2.02",   0x28000, 0x20000, CRC(2d8794aa) SHA1(c634affdc2568020cce6af97b4fa79925d9943f3) )
	3333
	3334	ROM_REGION( 0x800000, "qsound", 0 ) /* QSound samples */
	3335	ROM_LOAD16_WORD_SWAP( "hs2.11m",   0x000000, 0x800000, CRC(0e15c359) SHA1(176108b0d76d821a849324680aba0cd04b5016c1) )
	3336	ROM_END
	3337
	3338	ROM_START( hsf2a )
	3339	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
3311	3340	ROM_LOAD16_WORD_SWAP( "hs2a.03",  0x000000, 0x80000, CRC(d50a17e0) SHA1(5d8d6d309260cc2d862aa080d44a72886ee08c77) )
3312	3341	ROM_LOAD16_WORD_SWAP( "hs2a.04",  0x080000, 0x80000, CRC(a27f42de) SHA1(7a355831b57a35e327b2618fd5dca11afed2a233) )
3313	3342	ROM_LOAD16_WORD_SWAP( "hs2.05",   0x100000, 0x80000, CRC(dde34a35) SHA1(f5be2d2916db6e86e0886d61d55bddf138273ebc) )
3314	3343	ROM_LOAD16_WORD_SWAP( "hs2.06",   0x180000, 0x80000, CRC(f4e56dda) SHA1(c6490707c2a416ab88612c2d73abbe5853d8cb92) )
3315		ROM_LOAD16_WORD_SWAP( "hs2a.07",  0x200000, 0x80000, CRC(ee4420fc) SHA1(06cf76660b0c794d2460c52d9fe8334fff51e9de) )
	3344	ROM_LOAD16_WORD_SWAP( "hs2.07",   0x200000, 0x80000, CRC(ee4420fc) SHA1(06cf76660b0c794d2460c52d9fe8334fff51e9de) )
3316	3345	ROM_LOAD16_WORD_SWAP( "hs2.08",   0x280000, 0x80000, CRC(c9441533) SHA1(bf178fac1f060fcce3ff9118333c8517dadc9429) )
3317	3346	ROM_LOAD16_WORD_SWAP( "hs2.09",   0x300000, 0x80000, CRC(3fc638a8) SHA1(2a42877b26c8abc437da46225701f0bba6e40058) )
3318	3347	ROM_LOAD16_WORD_SWAP( "hs2.10",   0x380000, 0x80000, CRC(20d0f9e4) SHA1(80a5eeef9472e327b0d4ee26434bad109a9434ea) )
r6740	r6741
3337	3366	ROM_LOAD16_WORD_SWAP( "hs2j.03",  0x000000, 0x80000, CRC(00738f73) SHA1(99947a621f21a88dc4c425d9bfbc30b3c5f76ecd) )
3338	3367	ROM_LOAD16_WORD_SWAP( "hs2j.04",  0x080000, 0x80000, CRC(40072c4a) SHA1(85b95bd3c907b4276a31777e092b8c40d3763257) )
3339	3368	ROM_LOAD16_WORD_SWAP( "hs2.05",   0x100000, 0x80000, CRC(dde34a35) SHA1(f5be2d2916db6e86e0886d61d55bddf138273ebc) )
3340		ROM_LOAD16_WORD_SWAP( "hs2.06",   0x180000, 0x80000, CRC(f4e56dda) SHA1(c6490707c2a416ab88612c2d73abbe5853d8cb92) )
3341		ROM_LOAD16_WORD_SWAP( "hs2j.07",  0x200000, 0x80000, CRC(09fe85b4) SHA1(b15b3ae28a6a395d26580dc8f4b506507792df38) )
	3369	ROM_LOAD16_WORD_SWAP( "hs2.06",   0x180000, 0x80000, CRC(f4e56dda) SHA1(c6490707c2a416ab88612c2d73abbe5853d8cb92) ) /* Rom 07 needs to be verified, US & Asia 07 match */
	3370	ROM_LOAD16_WORD_SWAP( "hs2j.07",  0x200000, 0x80000, BAD_DUMP CRC(09fe85b4) SHA1(b15b3ae28a6a395d26580dc8f4b506507792df38) ) /* 1 bit difference at 7C1AD EF <-> FF */
3342	3371	ROM_LOAD16_WORD_SWAP( "hs2.08",   0x280000, 0x80000, CRC(c9441533) SHA1(bf178fac1f060fcce3ff9118333c8517dadc9429) )
3343	3372	ROM_LOAD16_WORD_SWAP( "hs2.09",   0x300000, 0x80000, CRC(3fc638a8) SHA1(2a42877b26c8abc437da46225701f0bba6e40058) )
3344	3373	ROM_LOAD16_WORD_SWAP( "hs2.10",   0x380000, 0x80000, CRC(20d0f9e4) SHA1(80a5eeef9472e327b0d4ee26434bad109a9434ea) )
r6740	r6741
7550	7579
7551	7580	/*************************************
7552	7581	*
7553		*  Games initialisation
	7582	*  Games initialization
7554	7583	*
7555	7584	*************************************/
7556	7585
7557	7586	static DRIVER_INIT( cps2 )
7558	7587	{
	7588	cps_state *state = (cps_state *)machine->driver_data;
	7589
7559	7590	/* Decrypt the game - see machine/cps2crpt.c */
7560	7591	DRIVER_INIT_CALL(cps2crpt);
7561		cps2networkpresent = 0;
7562	7592
	7593	/* Initialize some video elements */
	7594	DRIVER_INIT_CALL(cps2_video);
	7595
	7596	state->scancount = 0;
	7597	state->cps2networkpresent = 0;
	7598
7563	7599	cpu_set_clockscale(cputag_get_cpu(machine, "maincpu"), 0.7375f); /* RAM access waitstates etc. aren't emulated - slow the CPU to compensate */
7564	7600	}
7565	7601
7566	7602	static DRIVER_INIT( ssf2tb )
7567	7603	{
	7604	cps_state *state = (cps_state *)machine->driver_data;
	7605
7568	7606	DRIVER_INIT_CALL(cps2);
7569		cps2networkpresent = 0;
7570	7607
	7608	state->cps2networkpresent = 0;
	7609
7571	7610	/* we don't emulate the network board, so don't say it's present for now, otherwise the game will
7572	7611	attempt to boot in tournament mode and fail */
7573		//cps2networkpresent = 1;
	7612	//state->cps2networkpresent = 1;
7574	7613
7575	7614	}
7576	7615
7577	7616	static DRIVER_INIT ( pzloop2 )
7578	7617	{
	7618	cps_state *state = (cps_state *)machine->driver_data;
	7619
7579	7620	DRIVER_INIT_CALL(cps2);
	7621
	7622	state->readpaddle = 0;
	7623
	7624	state_save_register_global(machine, state->readpaddle);
	7625
7580	7626	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x804000, 0x804001, 0, 0, joy_or_paddle_r);
7581	7627	}
7582	7628
7583		static UINT16* gigamn2_dummyqsound_ram;
7584		static READ16_HANDLER( gigamn2_dummyqsound_r ) { return gigamn2_dummyqsound_ram[offset]; };
7585		static WRITE16_HANDLER( gigamn2_dummyqsound_w ) { gigamn2_dummyqsound_ram[offset] = data; };
	7629	static READ16_HANDLER( gigamn2_dummyqsound_r )
	7630	{
	7631	cps_state *state = (cps_state *)space->machine->driver_data;
	7632	return state->gigamn2_dummyqsound_ram[offset];
	7633	};
7586	7634
	7635	static WRITE16_HANDLER( gigamn2_dummyqsound_w )
	7636	{
	7637	cps_state *state = (cps_state *)space->machine->driver_data;
	7638	state->gigamn2_dummyqsound_ram[offset] = data;
	7639	};
	7640
7587	7641	static DRIVER_INIT( gigamn2 )
7588	7642	{
	7643	cps_state *state = (cps_state *)machine->driver_data;
7589	7644	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
7590	7645	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
7591	7646	int length = memory_region_length(machine, "maincpu");
7592	7647
7593	7648	DRIVER_INIT_CALL(cps2);
7594	7649
7595		gigamn2_dummyqsound_ram = auto_alloc_array(machine, UINT16, 0x20000/2);
	7650	state->gigamn2_dummyqsound_ram = auto_alloc_array(machine, UINT16, 0x20000 / 2);
	7651	state_save_register_global_pointer(machine, state->gigamn2_dummyqsound_ram, 0x20000 / 2);
	7652
7596	7653	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x618000, 0x619fff, 0, 0, gigamn2_dummyqsound_r, gigamn2_dummyqsound_w); // no qsound..
7597	7654	memory_set_decrypted_region(space, 0x000000, (length) - 1, &rom[length/4]);
7598		m68k_set_encrypted_opcode_range(cputag_get_cpu(machine, "maincpu"), 0, length);
	7655	m68k_set_encrypted_opcode_range(devtag_get_device(machine, "maincpu"), 0, length);
7599	7656	}
7600	7657
7601	7658
r6740	r6741
7605	7662	*
7606	7663	*************************************/
7607	7664
7608		GAME( 1993, ssf2,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (World 930911)", 0 )
7609		GAME( 1993, ssf2u,    ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (USA 930911)", 0 )
7610		GAME( 1993, ssf2a,    ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Asia 931005)", 0 )
7611		GAME( 1993, ssf2ar1,  ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Asia 930914)", 0 )
7612		GAME( 1993, ssf2j,    ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Japan 931005)", 0 )
7613		GAME( 1993, ssf2jr1,  ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Japan 930911)", 0 )
7614		GAME( 1993, ssf2jr2,  ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Japan 930910)", 0 )
7615		GAME( 1993, ssf2h,    ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Hispanic 930911)", 0 )
7616		GAME( 1993, ssf2tb,   ssf2,     cps2, cps2_2p6b, ssf2tb,   ROT0,   "Capcom", "Super Street Fighter II: The Tournament Battle (World 931119)", 0 )   // works, but not in tournament mode
7617		GAME( 1993, ssf2tbr1, ssf2,     cps2, cps2_2p6b, ssf2tb,   ROT0,   "Capcom", "Super Street Fighter II: The Tournament Battle (World 930911)", 0 )   // works, but not in tournament mode
7618		GAME( 1993, ssf2tbj,  ssf2,     cps2, cps2_2p6b, ssf2tb,   ROT0,   "Capcom", "Super Street Fighter II: The Tournament Battle (Japan 930911)", 0 )   // works, but not in tournament mode
7619		GAME( 1993, ecofghtr, 0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Eco Fighters (World 931203)", 0 )
7620		GAME( 1993, ecofghtru,ecofghtr, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Eco Fighters (USA 940215)", 0 )
7621		GAME( 1993, ecofghtru1,ecofghtr,cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Eco Fighters (USA 931203)", 0 )
7622		GAME( 1993, uecology, ecofghtr, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Ultimate Ecology (Japan 931203)", 0 )
7623		GAME( 1993, ecofghtra,ecofghtr, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Eco Fighters (Asia 931203)", 0 )
7624		GAME( 1993, ddtod,    0,        cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Euro 940412)", 0 )
7625		GAME( 1993, ddtodr1,  ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Euro 940113)", 0 )
7626		GAME( 1993, ddtodu,   ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (USA 940125)", 0 )
7627		GAME( 1993, ddtodur1, ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (USA 940113)", 0 )
7628		GAME( 1993, ddtodj,   ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Japan 940412)", 0 )
7629		GAME( 1993, ddtodjr1, ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Japan 940125)", 0 )
7630		GAME( 1993, ddtodjr2, ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Japan 940113)", 0 )
7631		GAME( 1993, ddtoda,   ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Asia 940113)", 0 )
7632		GAME( 1993, ddtodh,   ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Hispanic 940412)", 0 )
7633		GAME( 1993, ddtodhr1, ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Hispanic 940125)", 0 )
7634		GAME( 1994, ssf2t,    ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II Turbo (World 940223)", 0 )
7635		GAME( 1994, ssf2ta,   ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II Turbo (Asia 940223)", 0 )
7636		GAME( 1994, ssf2tu,   ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II Turbo (USA 940323)", 0 )
7637		GAME( 1994, ssf2tur1, ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II Turbo (USA 940223)", 0 )
7638		GAME( 1994, ssf2xj,   ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II X: Grand Master Challenge (Japan 940223)", 0 )
7639		GAME( 1994, avsp,     0,        cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (Euro 940520)", 0 )
7640		GAME( 1994, avspu,    avsp,     cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (USA 940520)", 0 )
7641		GAME( 1994, avspj,    avsp,     cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (Japan 940520)", 0 )
7642		GAME( 1994, avspa,    avsp,     cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (Asia 940520)", 0 )
7643		GAME( 1994, avsph,    avsp,     cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (Hispanic 940520)", 0 )
7644		GAME( 1994, dstlk,    0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (Euro 940705)", 0 )
7645		GAME( 1994, dstlku,   dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (USA 940818)", 0 )
7646		GAME( 1994, dstlkur1, dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (USA 940705)", 0 )
7647		GAME( 1994, dstlka,   dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (Asia 940705)", 0 )
7648		GAME( 1994, dstlkh,   dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (Hispanic 940818)", 0 )
7649		GAME( 1994, vampj,    dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire: The Night Warriors (Japan 940705)", 0 )   // partial update set? Only rom 04 is "B" revision
7650		GAME( 1994, vampja,   dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire: The Night Warriors (Japan 940705 alt)", 0 )
7651		GAME( 1994, vampjr1,  dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire: The Night Warriors (Japan 940630)", 0 )
7652		GAME( 1994, ringdest, 0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Ring of Destruction: Slammasters II (Euro 940902)", 0 )
7653		GAME( 1994, smbomb,   ringdest, cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Muscle Bomber: The International Blowout (Japan 940831)", 0 )
7654		GAME( 1994, smbombr1, ringdest, cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Muscle Bomber: The International Blowout (Japan 940808)", 0 )
7655		GAME( 1994, armwar,   0,        cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (Euro 941024)", 0 )
7656		GAME( 1994, armwarr1, armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (Euro 941011)", 0 )
7657		GAME( 1994, armwaru,  armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (USA 941024)", 0 )
7658		GAME( 1994, armwaru1, armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (USA 940920)", 0 )
7659		GAME( 1994, pgear,    armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Powered Gear: Strategic Variant Armor Equipment (Japan 941024)", 0 )
7660		GAME( 1994, pgearr1,  armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Powered Gear: Strategic Variant Armor Equipment (Japan 940916)", 0 )
7661		GAME( 1994, armwara,  armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (Asia 940920)", 0 )
7662		GAME( 1994, xmcota,   0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Euro 950105)", 0 )
7663		GAME( 1994, xmcotau,  xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (USA 950105)", 0 )
7664		GAME( 1994, xmcotah,  xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Hispanic 950331)", 0 )
7665		GAME( 1994, xmcotaj,  xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Japan 941222)", 0 )
7666		GAME( 1994, xmcotaj1, xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Japan 941219)", 0 )
7667		GAME( 1994, xmcotaj2, xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Japan 941217)", 0 )
7668		GAME( 1994, xmcotajr, xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Japan 941208 rent version)", 0 )
7669		GAME( 1994, xmcotaa,  xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Asia 941217)", 0 )
7670		GAME( 1995, nwarr,    0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (Euro 950316)", 0 )
7671		GAME( 1995, nwarru,   nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (USA 950406)", 0 )
7672		GAME( 1995, nwarrh,   nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (Hispanic 950403)", 0 )
7673		GAME( 1995, nwarrb,   nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (Brazil 950403)", 0 )
7674		GAME( 1995, nwarra,   nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (Asia 950302)", 0 )
7675		GAME( 1995, vhuntj,   nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950316)", 0 )
7676		GAME( 1995, vhuntjr1, nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950307)", 0 )
7677		GAME( 1995, vhuntjr2, nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950302)", 0 )
7678		GAME( 1995, cybots,   0,        cps2, cybots,    cps2,     ROT0,   "Capcom", "Cyberbots: Fullmetal Madness (Euro 950424)", 0 )
7679		GAME( 1995, cybotsu,  cybots,   cps2, cybots,    cps2,     ROT0,   "Capcom", "Cyberbots: Fullmetal Madness (USA 950424)", 0 )
7680		GAME( 1995, cybotsj,  cybots,   cps2, cybots,    cps2,     ROT0,   "Capcom", "Cyberbots: Fullmetal Madness (Japan 950420)", 0 )
7681		GAME( 1995, sfa,      0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (Euro 950727)", 0 )
7682		GAME( 1995, sfar1,    sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (Euro 950718)", 0 )
7683		GAME( 1995, sfar2,    sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (Euro 950627)", 0 )
7684		GAME( 1995, sfar3,    sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (Euro 950605)", 0 )
7685		GAME( 1995, sfau,     sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (USA 950627)", 0 )
7686		GAME( 1995, sfza,     sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Asia 950627)", 0 )
7687		GAME( 1995, sfzj,     sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Japan 950727)", 0 )
7688		GAME( 1995, sfzjr1,   sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Japan 950627)", 0 )
7689		GAME( 1995, sfzjr2,   sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Japan 950605)", 0 )
7690		GAME( 1995, sfzh,     sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Hispanic 950627)", 0 )
7691		GAME( 1995, sfzb,     sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Brazil 951109)", 0 )
7692		GAME( 1995, sfzbr1,   sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Brazil 950727)", 0 )
7693		GAME( 1995, mmancp2u, megaman,  cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Mega Man - The Power Battle (CPS2, USA 951006, SAMPLE Version)", 0 )
7694		GAME( 1995, rmancp2j, megaman,  cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Rockman: The Power Battle (CPS2, Japan 950922)", 0 )
7695		GAME( 1995, msh,      0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Euro 951024)", 0 )
7696		GAME( 1995, mshu,     msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (USA 951024)", 0 )
7697		GAME( 1995, mshj,     msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Japan 951117)", 0 )
7698		GAME( 1995, mshjr1,   msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Japan 951024)", 0 )
7699		GAME( 1995, msha,     msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Asia 951024)", 0 )
7700		GAME( 1995, mshh,     msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Hispanic 951117)", 0 )
7701		GAME( 1995, mshb,     msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Brazil 951117)", 0 )
7702		GAME( 1996, 19xx,     0,        cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (USA 951207)", 0 )
7703		GAME( 1996, 19xxa,    19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Asia 951207)", 0 )
7704		GAME( 1996, 19xxj,    19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Japan 951225)", 0 )
7705		GAME( 1996, 19xxjr1,  19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Japan 951207)", 0 )
7706		GAME( 1996, 19xxh,    19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Hispanic 951218)", 0 )
7707		GAME( 1996, 19xxb,    19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Brazil 951218)", 0 )
7708		GAME( 1996, ddsom,    0,        cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Euro 960619)", 0 )
7709		GAME( 1996, ddsomr1,  ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Euro 960223)", 0 )
7710		GAME( 1996, ddsomr2,  ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Euro 960209)", 0 )
7711		GAME( 1996, ddsomr3,  ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Euro 960208)", 0 )
7712		GAME( 1996, ddsomu,   ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (USA 960619)", 0 )
7713		GAME( 1996, ddsomur1, ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (USA 960209)", 0 )
7714		GAME( 1996, ddsomj,   ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Japan 960619)", 0 )
7715		GAME( 1996, ddsomjr1, ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Japan 960206)", 0 )
7716		GAME( 1996, ddsoma,   ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Asia 960619)", 0 )
7717		GAME( 1996, ddsomh,   ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Hispanic 960223)", 0 )
7718		GAME( 1996, ddsomb,   ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Brazil 960223)", 0 )
7719		GAME( 1996, sfa2,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 2 (Euro 960229)", 0 )
7720		GAME( 1996, sfa2u,    sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 2 (USA 960306)", 0 )
7721		GAME( 1996, sfz2j,    sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Japan 960227)", 0 )
7722		GAME( 1996, sfz2a,    sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Asia 960227)", 0 )
7723		GAME( 1996, sfz2b,    sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Brazil 960531)", 0 )
7724		GAME( 1996, sfz2br1,  sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Brazil 960304)", 0 )
7725		GAME( 1996, sfz2h,    sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Hispanic 960304)", 0 )
7726		GAME( 1996, sfz2n,    sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Oceania 960229)", 0 )
7727		GAME( 1996, sfz2al,   0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 Alpha (Asia 960826)", 0 )
7728		GAME( 1996, sfz2alj,  sfz2al,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 Alpha (Japan 960805)", 0 )
7729		GAME( 1996, sfz2alh,  sfz2al,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 Alpha (Hispanic 960813)", 0 )
7730		GAME( 1996, sfz2alb,  sfz2al,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 Alpha (Brazil 960813)", 0 )
7731		GAME( 1996, spf2t,    0,        cps2, cps2_2p2b, cps2,     ROT0,   "Capcom", "Super Puzzle Fighter II Turbo (USA 960620)", 0 )
7732		GAME( 1996, spf2xj,   spf2t,    cps2, cps2_2p2b, cps2,     ROT0,   "Capcom", "Super Puzzle Fighter II X (Japan 960531)", 0 )
7733		GAME( 1996, spf2ta,   spf2t,    cps2, cps2_2p2b, cps2,     ROT0,   "Capcom", "Super Puzzle Fighter II Turbo (Asia 960529)", 0 )
7734		GAME( 1996, spf2th,   spf2t,    cps2, cps2_2p2b, cps2,     ROT0,   "Capcom", "Super Puzzle Fighter II Turbo (Hispanic 960531)", 0 )
7735		GAME( 1996, megaman2, 0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Mega Man 2: The Power Fighters (USA 960708)", 0 )
7736		GAME( 1996, megaman2a,megaman2, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Mega Man 2: The Power Fighters (Asia 960708)", 0 )
7737		GAME( 1996, rockman2j,megaman2, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Rockman 2: The Power Fighters (Japan 960708)", 0 )
7738		GAME( 1996, megaman2h,megaman2, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Mega Man 2: The Power Fighters (Hispanic 960712)", 0 )
7739		GAME( 1996, qndream,  0,        cps2, qndream,   cps2,     ROT0,   "Capcom", "Quiz Nanairo Dreams: Nijiirochou no Kiseki (Japan 960826)", 0 )
7740		GAME( 1996, xmvsf,    0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Euro 961004)", 0 )
7741		GAME( 1996, xmvsfr1,  xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Euro 960910)", 0 )
7742		GAME( 1996, xmvsfu,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (USA 961023)", 0 )
7743		GAME( 1996, xmvsfur1, xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (USA 961004)", 0 )
7744		GAME( 1996, xmvsfj,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Japan 961004)", 0 )
7745		GAME( 1996, xmvsfjr1, xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Japan 960910)", 0 )
7746		GAME( 1996, xmvsfjr2, xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Japan 960909)", 0 )
7747		GAME( 1996, xmvsfa,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Asia 961023)", 0 )
7748		GAME( 1996, xmvsfar1, xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Asia 960919)", 0 )
7749		GAME( 1996, xmvsfh,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Hispanic 961004)", 0 )
7750		GAME( 1996, xmvsfb,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Brazil 961023)", 0 )
7751		GAME( 1997, batcir,   0,        cps2, cps2_4p2b, cps2,     ROT0,   "Capcom", "Battle Circuit (Euro 970319)", 0 )
7752		GAME( 1997, batcira,  batcir,   cps2, cps2_4p2b, cps2,     ROT0,   "Capcom", "Battle Circuit (Asia 970319)", 0 )
7753		GAME( 1997, batcirj,  batcir,   cps2, cps2_4p2b, cps2,     ROT0,   "Capcom", "Battle Circuit (Japan 970319)", 0 )
7754		GAME( 1997, vsav,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (Euro 970519)", 0 )
7755		GAME( 1997, vsavu,    vsav,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (USA 970519)", 0 )
7756		GAME( 1997, vsavj,    vsav,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (Japan 970519)", 0 )
7757		GAME( 1997, vsava,    vsav,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (Asia 970519)", 0 )
7758		GAME( 1997, vsavh,    vsav,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (Hispanic 970519)", 0 )
7759		GAME( 1997, mshvsf,   0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Euro 970625)", 0 )
7760		GAME( 1997, mshvsfu,  mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (USA 970827)", 0 )
7761		GAME( 1997, mshvsfu1, mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (USA 970625)", 0 )
7762		GAME( 1997, mshvsfj,  mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Japan 970707)", 0 )
7763		GAME( 1997, mshvsfj1, mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Japan 970702)", 0 )
7764		GAME( 1997, mshvsfj2, mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Japan 970625)", 0 )
7765		GAME( 1997, mshvsfh,  mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Hispanic 970625)", 0 )
7766		GAME( 1997, mshvsfa,  mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Asia 970625)", 0 )
7767		GAME( 1997, mshvsfa1, mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Asia 970620)", 0 )
7768		GAME( 1997, mshvsfb,  mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Brazil 970827)", 0 )
7769		GAME( 1997, mshvsfb1, mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Brazil 970625)", 0 )
7770		GAME( 1997, csclub,   0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Euro 971017)", 0 )
7771		GAME( 1997, csclub1,  csclub,   cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Euro 970722)", 0 )
7772		GAME( 1997, cscluba,  csclub,   cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Asia 970722)", 0 )
7773		GAME( 1997, csclubj,  csclub,   cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Japan 970722)", 0 )
7774		GAME( 1997, csclubh,  csclub,   cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Hispanic 970722)", 0 )
7775		GAME( 1997, sgemf,    0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Super Gem Fighter Mini Mix (USA 970904)", 0 )
7776		GAME( 1997, pfghtj,   sgemf,    cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Pocket Fighter (Japan 970904)", 0 )
7777		GAME( 1997, sgemfa,   sgemf,    cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Super Gem Fighter: Mini Mix (Asia 970904)", 0 )
7778		GAME( 1997, sgemfh,   sgemf,    cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Super Gem Fighter: Mini Mix (Hispanic 970904)", 0 )
7779		GAME( 1997, vhunt2,   0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter 2: Darkstalkers Revenge (Japan 970929)", 0 )
7780		GAME( 1997, vhunt2r1, vhunt2,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter 2: Darkstalkers Revenge (Japan 970913)", 0 )
7781		GAME( 1997, vsav2,    0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior 2: The Lord of Vampire (Japan 970913)", 0 )
7782		GAME( 1998, mvsc,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Euro 980123)", 0 )
7783		GAME( 1998, mvscr1,   mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Euro 980112)", 0 )
7784		GAME( 1998, mvscu,    mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (USA 980123)", 0 )
7785		GAME( 1998, mvscj,    mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Japan 980123)", 0 )
7786		GAME( 1998, mvscjr1,  mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Japan 980112)", 0 )
7787		GAME( 1998, mvsca,    mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Asia 980123)", 0 )
7788		GAME( 1998, mvscar1,  mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Asia 980112)", 0 )
7789		GAME( 1998, mvsch,    mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Hispanic 980123)", 0 )
7790		GAME( 1998, mvscb,    mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Brazil 980123)", 0 )
7791		GAME( 1998, sfa3,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 3 (Euro 980904)", 0 )
7792		GAME( 1998, sfa3u,    sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 3 (USA 980904)", 0 )
7793		GAME( 1998, sfa3ur1,  sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 3 (USA 980629)", 0 )
7794		GAME( 1998, sfa3b,    sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 3 (Brazil 980629)", 0 )
7795		GAME( 1998, sfz3j,    sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Japan 980904)", 0 )
7796		GAME( 1998, sfz3jr1,  sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Japan 980727)", 0 )
7797		GAME( 1998, sfz3jr2,  sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Japan 980629)", 0 )
7798		GAME( 1998, sfz3a,    sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Asia 980904)", 0 )
7799		GAME( 1998, sfz3ar1,  sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Asia 980701)", 0 )
7800		GAME( 1999, jyangoku, 0,        cps2, cps2_1p2b, cps2,     ROT0,   "Capcom", "Jyangokushi: Haoh no Saihai (Japan 990527)", 0 )
7801		GAME( 2004, hsf2,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Hyper Street Fighter 2: The Anniversary Edition (Asia 040202)", 0 )
7802		GAME( 2004, hsf2j,    hsf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Hyper Street Fighter 2: The Anniversary Edition (Japan 031222)", 0 )
	7665	GAME( 1993, ssf2,       0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (World 930911)", GAME_SUPPORTS_SAVE )
	7666	GAME( 1993, ssf2u,      ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (USA 930911)", GAME_SUPPORTS_SAVE )
	7667	GAME( 1993, ssf2a,      ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Asia 931005)", GAME_SUPPORTS_SAVE )
	7668	GAME( 1993, ssf2ar1,    ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Asia 930914)", GAME_SUPPORTS_SAVE )
	7669	GAME( 1993, ssf2j,      ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Japan 931005)", GAME_SUPPORTS_SAVE )
	7670	GAME( 1993, ssf2jr1,    ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Japan 930911)", GAME_SUPPORTS_SAVE )
	7671	GAME( 1993, ssf2jr2,    ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Japan 930910)", GAME_SUPPORTS_SAVE )
	7672	GAME( 1993, ssf2h,      ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II: The New Challengers (Hispanic 930911)", GAME_SUPPORTS_SAVE )
	7673	GAME( 1993, ssf2tb,     ssf2,     cps2, cps2_2p6b, ssf2tb,   ROT0,   "Capcom", "Super Street Fighter II: The Tournament Battle (World 931119)", GAME_SUPPORTS_SAVE )   // works, but not in tournament mode
	7674	GAME( 1993, ssf2tbr1,   ssf2,     cps2, cps2_2p6b, ssf2tb,   ROT0,   "Capcom", "Super Street Fighter II: The Tournament Battle (World 930911)", GAME_SUPPORTS_SAVE )   // works, but not in tournament mode
	7675	GAME( 1993, ssf2tbj,    ssf2,     cps2, cps2_2p6b, ssf2tb,   ROT0,   "Capcom", "Super Street Fighter II: The Tournament Battle (Japan 930911)", GAME_SUPPORTS_SAVE )   // works, but not in tournament mode
	7676	GAME( 1993, ecofghtr,   0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Eco Fighters (World 931203)", GAME_SUPPORTS_SAVE )
	7677	GAME( 1993, ecofghtru,  ecofghtr, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Eco Fighters (USA 940215)", GAME_SUPPORTS_SAVE )
	7678	GAME( 1993, ecofghtru1, ecofghtr, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Eco Fighters (USA 931203)", GAME_SUPPORTS_SAVE )
	7679	GAME( 1993, uecology,   ecofghtr, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Ultimate Ecology (Japan 931203)", GAME_SUPPORTS_SAVE )
	7680	GAME( 1993, ecofghtra,  ecofghtr, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Eco Fighters (Asia 931203)", GAME_SUPPORTS_SAVE )
	7681	GAME( 1993, ddtod,      0,        cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Euro 940412)", GAME_SUPPORTS_SAVE )
	7682	GAME( 1993, ddtodr1,    ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Euro 940113)", GAME_SUPPORTS_SAVE )
	7683	GAME( 1993, ddtodu,     ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (USA 940125)", GAME_SUPPORTS_SAVE )
	7684	GAME( 1993, ddtodur1,   ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (USA 940113)", GAME_SUPPORTS_SAVE )
	7685	GAME( 1993, ddtodj,     ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Japan 940412)", GAME_SUPPORTS_SAVE )
	7686	GAME( 1993, ddtodjr1,   ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Japan 940125)", GAME_SUPPORTS_SAVE )
	7687	GAME( 1993, ddtodjr2,   ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Japan 940113)", GAME_SUPPORTS_SAVE )
	7688	GAME( 1993, ddtoda,     ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Asia 940113)", GAME_SUPPORTS_SAVE )
	7689	GAME( 1993, ddtodh,     ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Hispanic 940412)", GAME_SUPPORTS_SAVE )
	7690	GAME( 1993, ddtodhr1,   ddtod,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Tower of Doom (Hispanic 940125)", GAME_SUPPORTS_SAVE )
	7691	GAME( 1994, ssf2t,      ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II Turbo (World 940223)", GAME_SUPPORTS_SAVE )
	7692	GAME( 1994, ssf2ta,     ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II Turbo (Asia 940223)", GAME_SUPPORTS_SAVE )
	7693	GAME( 1994, ssf2tu,     ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II Turbo (USA 940323)", GAME_SUPPORTS_SAVE )
	7694	GAME( 1994, ssf2tur1,   ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II Turbo (USA 940223)", GAME_SUPPORTS_SAVE )
	7695	GAME( 1994, ssf2xj,     ssf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Street Fighter II X: Grand Master Challenge (Japan 940223)", GAME_SUPPORTS_SAVE )
	7696	GAME( 1994, avsp,       0,        cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (Euro 940520)", GAME_SUPPORTS_SAVE )
	7697	GAME( 1994, avspu,      avsp,     cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (USA 940520)", GAME_SUPPORTS_SAVE )
	7698	GAME( 1994, avspj,      avsp,     cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (Japan 940520)", GAME_SUPPORTS_SAVE )
	7699	GAME( 1994, avspa,      avsp,     cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (Asia 940520)", GAME_SUPPORTS_SAVE )
	7700	GAME( 1994, avsph,      avsp,     cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Alien vs. Predator (Hispanic 940520)", GAME_SUPPORTS_SAVE )
	7701	GAME( 1994, dstlk,      0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (Euro 940705)", GAME_SUPPORTS_SAVE )
	7702	GAME( 1994, dstlku,     dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (USA 940818)", GAME_SUPPORTS_SAVE )
	7703	GAME( 1994, dstlkur1,   dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (USA 940705)", GAME_SUPPORTS_SAVE )
	7704	GAME( 1994, dstlka,     dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (Asia 940705)", GAME_SUPPORTS_SAVE )
	7705	GAME( 1994, dstlkh,     dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Darkstalkers: The Night Warriors (Hispanic 940818)", GAME_SUPPORTS_SAVE )
	7706	GAME( 1994, vampj,      dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire: The Night Warriors (Japan 940705)", GAME_SUPPORTS_SAVE )   // partial update set? Only rom 04 is "B" revision
	7707	GAME( 1994, vampja,     dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire: The Night Warriors (Japan 940705 alt)", GAME_SUPPORTS_SAVE )
	7708	GAME( 1994, vampjr1,    dstlk,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire: The Night Warriors (Japan 940630)", GAME_SUPPORTS_SAVE )
	7709	GAME( 1994, ringdest,   0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Ring of Destruction: Slammasters II (Euro 940902)", GAME_SUPPORTS_SAVE )
	7710	GAME( 1994, smbomb,     ringdest, cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Muscle Bomber: The International Blowout (Japan 940831)", GAME_SUPPORTS_SAVE )
	7711	GAME( 1994, smbombr1,   ringdest, cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Super Muscle Bomber: The International Blowout (Japan 940808)", GAME_SUPPORTS_SAVE )
	7712	GAME( 1994, armwar,     0,        cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (Euro 941024)", GAME_SUPPORTS_SAVE )
	7713	GAME( 1994, armwarr1,   armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (Euro 941011)", GAME_SUPPORTS_SAVE )
	7714	GAME( 1994, armwaru,    armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (USA 941024)", GAME_SUPPORTS_SAVE )
	7715	GAME( 1994, armwaru1,   armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (USA 940920)", GAME_SUPPORTS_SAVE )
	7716	GAME( 1994, pgear,      armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Powered Gear: Strategic Variant Armor Equipment (Japan 941024)", GAME_SUPPORTS_SAVE )
	7717	GAME( 1994, pgearr1,    armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Powered Gear: Strategic Variant Armor Equipment (Japan 940916)", GAME_SUPPORTS_SAVE )
	7718	GAME( 1994, armwara,    armwar,   cps2, cps2_3p3b, cps2,     ROT0,   "Capcom", "Armored Warriors (Asia 940920)", GAME_SUPPORTS_SAVE )
	7719	GAME( 1994, xmcota,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Euro 950105)", GAME_SUPPORTS_SAVE )
	7720	GAME( 1994, xmcotau,    xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (USA 950105)", GAME_SUPPORTS_SAVE )
	7721	GAME( 1994, xmcotah,    xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Hispanic 950331)", GAME_SUPPORTS_SAVE )
	7722	GAME( 1994, xmcotaj,    xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Japan 941222)", GAME_SUPPORTS_SAVE )
	7723	GAME( 1994, xmcotaj1,   xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Japan 941219)", GAME_SUPPORTS_SAVE )
	7724	GAME( 1994, xmcotaj2,   xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Japan 941217)", GAME_SUPPORTS_SAVE )
	7725	GAME( 1994, xmcotajr,   xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Japan 941208 rent version)", GAME_SUPPORTS_SAVE )
	7726	GAME( 1994, xmcotaa,    xmcota,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men: Children of the Atom (Asia 941217)", GAME_SUPPORTS_SAVE )
	7727	GAME( 1995, nwarr,      0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (Euro 950316)", GAME_SUPPORTS_SAVE )
	7728	GAME( 1995, nwarru,     nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (USA 950406)", GAME_SUPPORTS_SAVE )
	7729	GAME( 1995, nwarrh,     nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (Hispanic 950403)", GAME_SUPPORTS_SAVE )
	7730	GAME( 1995, nwarrb,     nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (Brazil 950403)", GAME_SUPPORTS_SAVE )
	7731	GAME( 1995, nwarra,     nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Night Warriors: Darkstalkers' Revenge (Asia 950302)", GAME_SUPPORTS_SAVE )
	7732	GAME( 1995, vhuntj,     nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950316)", GAME_SUPPORTS_SAVE )
	7733	GAME( 1995, vhuntjr1,   nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950307)", GAME_SUPPORTS_SAVE )
	7734	GAME( 1995, vhuntjr2,   nwarr,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950302)", GAME_SUPPORTS_SAVE )
	7735	GAME( 1995, cybots,     0,        cps2, cybots,    cps2,     ROT0,   "Capcom", "Cyberbots: Fullmetal Madness (Euro 950424)", GAME_SUPPORTS_SAVE )
	7736	GAME( 1995, cybotsu,    cybots,   cps2, cybots,    cps2,     ROT0,   "Capcom", "Cyberbots: Fullmetal Madness (USA 950424)", GAME_SUPPORTS_SAVE )
	7737	GAME( 1995, cybotsj,    cybots,   cps2, cybots,    cps2,     ROT0,   "Capcom", "Cyberbots: Fullmetal Madness (Japan 950420)", GAME_SUPPORTS_SAVE )
	7738	GAME( 1995, sfa,        0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (Euro 950727)", GAME_SUPPORTS_SAVE )
	7739	GAME( 1995, sfar1,      sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (Euro 950718)", GAME_SUPPORTS_SAVE )
	7740	GAME( 1995, sfar2,      sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (Euro 950627)", GAME_SUPPORTS_SAVE )
	7741	GAME( 1995, sfar3,      sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (Euro 950605)", GAME_SUPPORTS_SAVE )
	7742	GAME( 1995, sfau,       sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha: Warriors' Dreams (USA 950627)", GAME_SUPPORTS_SAVE )
	7743	GAME( 1995, sfza,       sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Asia 950627)", GAME_SUPPORTS_SAVE )
	7744	GAME( 1995, sfzj,       sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Japan 950727)", GAME_SUPPORTS_SAVE )
	7745	GAME( 1995, sfzjr1,     sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Japan 950627)", GAME_SUPPORTS_SAVE )
	7746	GAME( 1995, sfzjr2,     sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Japan 950605)", GAME_SUPPORTS_SAVE )
	7747	GAME( 1995, sfzh,       sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Hispanic 950627)", GAME_SUPPORTS_SAVE )
	7748	GAME( 1995, sfzb,       sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Brazil 951109)", GAME_SUPPORTS_SAVE )
	7749	GAME( 1995, sfzbr1,     sfa,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero (Brazil 950727)", GAME_SUPPORTS_SAVE )
	7750	GAME( 1995, mmancp2u,   megaman,  cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Mega Man - The Power Battle (CPS2, USA 951006, SAMPLE Version)", GAME_SUPPORTS_SAVE )
	7751	GAME( 1995, rmancp2j,   megaman,  cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Rockman: The Power Battle (CPS2, Japan 950922)", GAME_SUPPORTS_SAVE )
	7752	GAME( 1995, msh,        0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Euro 951024)", GAME_SUPPORTS_SAVE )
	7753	GAME( 1995, mshu,       msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (USA 951024)", GAME_SUPPORTS_SAVE )
	7754	GAME( 1995, mshj,       msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Japan 951117)", GAME_SUPPORTS_SAVE )
	7755	GAME( 1995, mshjr1,     msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Japan 951024)", GAME_SUPPORTS_SAVE )
	7756	GAME( 1995, msha,       msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Asia 951024)", GAME_SUPPORTS_SAVE )
	7757	GAME( 1995, mshh,       msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Hispanic 951117)", GAME_SUPPORTS_SAVE )
	7758	GAME( 1995, mshb,       msh,      cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes (Brazil 951117)", GAME_SUPPORTS_SAVE )
	7759	GAME( 1996, 19xx,       0,        cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (USA 951207)", GAME_SUPPORTS_SAVE )
	7760	GAME( 1996, 19xxa,      19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Asia 951207)", GAME_SUPPORTS_SAVE )
	7761	GAME( 1996, 19xxj,      19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Japan 951225)", GAME_SUPPORTS_SAVE )
	7762	GAME( 1996, 19xxjr1,    19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Japan 951207)", GAME_SUPPORTS_SAVE )
	7763	GAME( 1996, 19xxh,      19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Hispanic 951218)", GAME_SUPPORTS_SAVE )
	7764	GAME( 1996, 19xxb,      19xx,     cps2, cps2_2p2b, cps2,     ROT270, "Capcom", "19XX: The War Against Destiny (Brazil 951218)", GAME_SUPPORTS_SAVE )
	7765	GAME( 1996, ddsom,      0,        cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Euro 960619)", GAME_SUPPORTS_SAVE )
	7766	GAME( 1996, ddsomr1,    ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Euro 960223)", GAME_SUPPORTS_SAVE )
	7767	GAME( 1996, ddsomr2,    ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Euro 960209)", GAME_SUPPORTS_SAVE )
	7768	GAME( 1996, ddsomr3,    ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Euro 960208)", GAME_SUPPORTS_SAVE )
	7769	GAME( 1996, ddsomu,     ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (USA 960619)", GAME_SUPPORTS_SAVE )
	7770	GAME( 1996, ddsomur1,   ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (USA 960209)", GAME_SUPPORTS_SAVE )
	7771	GAME( 1996, ddsomj,     ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Japan 960619)", GAME_SUPPORTS_SAVE )
	7772	GAME( 1996, ddsomjr1,   ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Japan 960206)", GAME_SUPPORTS_SAVE )
	7773	GAME( 1996, ddsoma,     ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Asia 960619)", GAME_SUPPORTS_SAVE )
	7774	GAME( 1996, ddsomh,     ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Hispanic 960223)", GAME_SUPPORTS_SAVE )
	7775	GAME( 1996, ddsomb,     ddsom,    cps2, cps2_4p4b, cps2,     ROT0,   "Capcom", "Dungeons & Dragons: Shadow over Mystara (Brazil 960223)", GAME_SUPPORTS_SAVE )
	7776	GAME( 1996, sfa2,       0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 2 (Euro 960229)", GAME_SUPPORTS_SAVE )
	7777	GAME( 1996, sfa2u,      sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 2 (USA 960306)", GAME_SUPPORTS_SAVE )
	7778	GAME( 1996, sfz2j,      sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Japan 960227)", GAME_SUPPORTS_SAVE )
	7779	GAME( 1996, sfz2a,      sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Asia 960227)", GAME_SUPPORTS_SAVE )
	7780	GAME( 1996, sfz2b,      sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Brazil 960531)", GAME_SUPPORTS_SAVE )
	7781	GAME( 1996, sfz2br1,    sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Brazil 960304)", GAME_SUPPORTS_SAVE )
	7782	GAME( 1996, sfz2h,      sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Hispanic 960304)", GAME_SUPPORTS_SAVE )
	7783	GAME( 1996, sfz2n,      sfa2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 (Oceania 960229)", GAME_SUPPORTS_SAVE )
	7784	GAME( 1996, sfz2al,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 Alpha (Asia 960826)", GAME_SUPPORTS_SAVE )
	7785	GAME( 1996, sfz2alj,    sfz2al,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 Alpha (Japan 960805)", GAME_SUPPORTS_SAVE )
	7786	GAME( 1996, sfz2alh,    sfz2al,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 Alpha (Hispanic 960813)", GAME_SUPPORTS_SAVE )
	7787	GAME( 1996, sfz2alb,    sfz2al,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 2 Alpha (Brazil 960813)", GAME_SUPPORTS_SAVE )
	7788	GAME( 1996, spf2t,      0,        cps2, cps2_2p2b, cps2,     ROT0,   "Capcom", "Super Puzzle Fighter II Turbo (USA 960620)", GAME_SUPPORTS_SAVE )
	7789	GAME( 1996, spf2xj,     spf2t,    cps2, cps2_2p2b, cps2,     ROT0,   "Capcom", "Super Puzzle Fighter II X (Japan 960531)", GAME_SUPPORTS_SAVE )
	7790	GAME( 1996, spf2ta,     spf2t,    cps2, cps2_2p2b, cps2,     ROT0,   "Capcom", "Super Puzzle Fighter II Turbo (Asia 960529)", GAME_SUPPORTS_SAVE )
	7791	GAME( 1996, spf2th,     spf2t,    cps2, cps2_2p2b, cps2,     ROT0,   "Capcom", "Super Puzzle Fighter II Turbo (Hispanic 960531)", GAME_SUPPORTS_SAVE )
	7792	GAME( 1996, megaman2,   0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Mega Man 2: The Power Fighters (USA 960708)", GAME_SUPPORTS_SAVE )
	7793	GAME( 1996, megaman2a,  megaman2, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Mega Man 2: The Power Fighters (Asia 960708)", GAME_SUPPORTS_SAVE )
	7794	GAME( 1996, rockman2j,  megaman2, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Rockman 2: The Power Fighters (Japan 960708)", GAME_SUPPORTS_SAVE )
	7795	GAME( 1996, megaman2h,  megaman2, cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Mega Man 2: The Power Fighters (Hispanic 960712)", GAME_SUPPORTS_SAVE )
	7796	GAME( 1996, qndream,    0,        cps2, qndream,   cps2,     ROT0,   "Capcom", "Quiz Nanairo Dreams: Nijiirochou no Kiseki (Japan 960826)", GAME_SUPPORTS_SAVE )
	7797	GAME( 1996, xmvsf,      0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Euro 961004)", GAME_SUPPORTS_SAVE )
	7798	GAME( 1996, xmvsfr1,    xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Euro 960910)", GAME_SUPPORTS_SAVE )
	7799	GAME( 1996, xmvsfu,     xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (USA 961023)", GAME_SUPPORTS_SAVE )
	7800	GAME( 1996, xmvsfur1,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (USA 961004)", GAME_SUPPORTS_SAVE )
	7801	GAME( 1996, xmvsfj,     xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Japan 961004)", GAME_SUPPORTS_SAVE )
	7802	GAME( 1996, xmvsfjr1,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Japan 960910)", GAME_SUPPORTS_SAVE )
	7803	GAME( 1996, xmvsfjr2,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Japan 960909)", GAME_SUPPORTS_SAVE )
	7804	GAME( 1996, xmvsfa,     xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Asia 961023)", GAME_SUPPORTS_SAVE )
	7805	GAME( 1996, xmvsfar1,   xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Asia 960919)", GAME_SUPPORTS_SAVE )
	7806	GAME( 1996, xmvsfh,     xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Hispanic 961004)", GAME_SUPPORTS_SAVE )
	7807	GAME( 1996, xmvsfb,     xmvsf,    cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "X-Men Vs. Street Fighter (Brazil 961023)", GAME_SUPPORTS_SAVE )
	7808	GAME( 1997, batcir,     0,        cps2, cps2_4p2b, cps2,     ROT0,   "Capcom", "Battle Circuit (Euro 970319)", GAME_SUPPORTS_SAVE )
	7809	GAME( 1997, batcira,    batcir,   cps2, cps2_4p2b, cps2,     ROT0,   "Capcom", "Battle Circuit (Asia 970319)", GAME_SUPPORTS_SAVE )
	7810	GAME( 1997, batcirj,    batcir,   cps2, cps2_4p2b, cps2,     ROT0,   "Capcom", "Battle Circuit (Japan 970319)", GAME_SUPPORTS_SAVE )
	7811	GAME( 1997, vsav,       0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (Euro 970519)", GAME_SUPPORTS_SAVE )
	7812	GAME( 1997, vsavu,      vsav,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (USA 970519)", GAME_SUPPORTS_SAVE )
	7813	GAME( 1997, vsavj,      vsav,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (Japan 970519)", GAME_SUPPORTS_SAVE )
	7814	GAME( 1997, vsava,      vsav,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (Asia 970519)", GAME_SUPPORTS_SAVE )
	7815	GAME( 1997, vsavh,      vsav,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior: The Lord of Vampire (Hispanic 970519)", GAME_SUPPORTS_SAVE )
	7816	GAME( 1997, mshvsf,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Euro 970625)", GAME_SUPPORTS_SAVE )
	7817	GAME( 1997, mshvsfu,    mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (USA 970827)", GAME_SUPPORTS_SAVE )
	7818	GAME( 1997, mshvsfu1,   mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (USA 970625)", GAME_SUPPORTS_SAVE )
	7819	GAME( 1997, mshvsfj,    mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Japan 970707)", GAME_SUPPORTS_SAVE )
	7820	GAME( 1997, mshvsfj1,   mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Japan 970702)", GAME_SUPPORTS_SAVE )
	7821	GAME( 1997, mshvsfj2,   mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Japan 970625)", GAME_SUPPORTS_SAVE )
	7822	GAME( 1997, mshvsfh,    mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Hispanic 970625)", GAME_SUPPORTS_SAVE )
	7823	GAME( 1997, mshvsfa,    mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Asia 970625)", GAME_SUPPORTS_SAVE )
	7824	GAME( 1997, mshvsfa1,   mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Asia 970620)", GAME_SUPPORTS_SAVE )
	7825	GAME( 1997, mshvsfb,    mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Brazil 970827)", GAME_SUPPORTS_SAVE )
	7826	GAME( 1997, mshvsfb1,   mshvsf,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Super Heroes Vs. Street Fighter (Brazil 970625)", GAME_SUPPORTS_SAVE )
	7827	GAME( 1997, csclub,     0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Euro 971017)", GAME_SUPPORTS_SAVE )
	7828	GAME( 1997, csclub1,    csclub,   cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Euro 970722)", GAME_SUPPORTS_SAVE )
	7829	GAME( 1997, cscluba,    csclub,   cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Asia 970722)", GAME_SUPPORTS_SAVE )
	7830	GAME( 1997, csclubj,    csclub,   cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Japan 970722)", GAME_SUPPORTS_SAVE )
	7831	GAME( 1997, csclubh,    csclub,   cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Capcom Sports Club (Hispanic 970722)", GAME_SUPPORTS_SAVE )
	7832	GAME( 1997, sgemf,      0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Super Gem Fighter Mini Mix (USA 970904)", GAME_SUPPORTS_SAVE )
	7833	GAME( 1997, pfghtj,     sgemf,    cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Pocket Fighter (Japan 970904)", GAME_SUPPORTS_SAVE )
	7834	GAME( 1997, sgemfa,     sgemf,    cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Super Gem Fighter: Mini Mix (Asia 970904)", GAME_SUPPORTS_SAVE )
	7835	GAME( 1997, sgemfh,     sgemf,    cps2, cps2_2p3b, cps2,     ROT0,   "Capcom", "Super Gem Fighter: Mini Mix (Hispanic 970904)", GAME_SUPPORTS_SAVE )
	7836	GAME( 1997, vhunt2,     0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter 2: Darkstalkers Revenge (Japan 970929)", GAME_SUPPORTS_SAVE )
	7837	GAME( 1997, vhunt2r1,   vhunt2,   cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Hunter 2: Darkstalkers Revenge (Japan 970913)", GAME_SUPPORTS_SAVE )
	7838	GAME( 1997, vsav2,      0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Vampire Savior 2: The Lord of Vampire (Japan 970913)", GAME_SUPPORTS_SAVE )
	7839	GAME( 1998, mvsc,       0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Euro 980123)", GAME_SUPPORTS_SAVE )
	7840	GAME( 1998, mvscr1,     mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Euro 980112)", GAME_SUPPORTS_SAVE )
	7841	GAME( 1998, mvscu,      mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (USA 980123)", GAME_SUPPORTS_SAVE )
	7842	GAME( 1998, mvscj,      mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Japan 980123)", GAME_SUPPORTS_SAVE )
	7843	GAME( 1998, mvscjr1,    mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Japan 980112)", GAME_SUPPORTS_SAVE )
	7844	GAME( 1998, mvsca,      mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Asia 980123)", GAME_SUPPORTS_SAVE )
	7845	GAME( 1998, mvscar1,    mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Asia 980112)", GAME_SUPPORTS_SAVE )
	7846	GAME( 1998, mvsch,      mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Hispanic 980123)", GAME_SUPPORTS_SAVE )
	7847	GAME( 1998, mvscb,      mvsc,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Brazil 980123)", GAME_SUPPORTS_SAVE )
	7848	GAME( 1998, sfa3,       0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 3 (Euro 980904)", GAME_SUPPORTS_SAVE )
	7849	GAME( 1998, sfa3u,      sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 3 (USA 980904)", GAME_SUPPORTS_SAVE )
	7850	GAME( 1998, sfa3ur1,    sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 3 (USA 980629)", GAME_SUPPORTS_SAVE )
	7851	GAME( 1998, sfa3b,      sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Alpha 3 (Brazil 980629)", GAME_SUPPORTS_SAVE )
	7852	GAME( 1998, sfz3j,      sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Japan 980904)", GAME_SUPPORTS_SAVE )
	7853	GAME( 1998, sfz3jr1,    sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Japan 980727)", GAME_SUPPORTS_SAVE )
	7854	GAME( 1998, sfz3jr2,    sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Japan 980629)", GAME_SUPPORTS_SAVE )
	7855	GAME( 1998, sfz3a,      sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Asia 980904)", GAME_SUPPORTS_SAVE )
	7856	GAME( 1998, sfz3ar1,    sfa3,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Street Fighter Zero 3 (Asia 980701)", GAME_SUPPORTS_SAVE )
	7857	GAME( 1999, jyangoku,   0,        cps2, cps2_1p2b, cps2,     ROT0,   "Capcom", "Jyangokushi: Haoh no Saihai (Japan 990527)", GAME_SUPPORTS_SAVE )
	7858	GAME( 2004, hsf2,       0,        cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Hyper Street Fighter 2: The Anniversary Edition (USA 040202)", GAME_SUPPORTS_SAVE )
	7859	GAME( 2004, hsf2a,      hsf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Hyper Street Fighter 2: The Anniversary Edition (Asia 040202)", GAME_SUPPORTS_SAVE )
	7860	GAME( 2004, hsf2j,      hsf2,     cps2, cps2_2p6b, cps2,     ROT0,   "Capcom", "Hyper Street Fighter 2: The Anniversary Edition (Japan 031222)", GAME_SUPPORTS_SAVE )
7803	7861
7804	7862	/* Games released on CPS-2 hardware by Takumi */
7805	7863
7806		GAME( 1999, gigawing, 0,        cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Takumi", "Giga Wing (USA 990222)", 0 )
7807		GAME( 1999, gigawingj,gigawing, cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Takumi", "Giga Wing (Japan 990223)", 0 )
7808		GAME( 1999, gigawinga,gigawing, cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Takumi", "Giga Wing (Asia 990222)", 0 )
7809		GAME( 1999, gigawingb,gigawing, cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Takumi", "Giga Wing (Brazil 990222)", 0 )
7810		GAME( 2000, mmatrix,  0,        cps2, cps2_2p1b, cps2,     ROT0,   "Capcom, supported by Takumi", "Mars Matrix: Hyper Solid Shooting (USA 000412)", 0 )
7811		GAME( 2000, mmatrixj, mmatrix,  cps2, cps2_2p1b, cps2,     ROT0,   "Capcom, supported by Takumi", "Mars Matrix: Hyper Solid Shooting (Japan 000412)", 0 )
	7864	GAME( 1999, gigawing,   0,        cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Takumi", "Giga Wing (USA 990222)", GAME_SUPPORTS_SAVE )
	7865	GAME( 1999, gigawingj,  gigawing, cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Takumi", "Giga Wing (Japan 990223)", GAME_SUPPORTS_SAVE )
	7866	GAME( 1999, gigawinga,  gigawing, cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Takumi", "Giga Wing (Asia 990222)", GAME_SUPPORTS_SAVE )
	7867	GAME( 1999, gigawingb,  gigawing, cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Takumi", "Giga Wing (Brazil 990222)", GAME_SUPPORTS_SAVE )
	7868	GAME( 2000, mmatrix,    0,        cps2, cps2_2p1b, cps2,     ROT0,   "Capcom, supported by Takumi", "Mars Matrix: Hyper Solid Shooting (USA 000412)", GAME_SUPPORTS_SAVE )
	7869	GAME( 2000, mmatrixj,   mmatrix,  cps2, cps2_2p1b, cps2,     ROT0,   "Capcom, supported by Takumi", "Mars Matrix: Hyper Solid Shooting (Japan 000412)", GAME_SUPPORTS_SAVE )
7812	7870
7813	7871	/* Games released on CPS-2 hardware by Mitchell */
7814	7872
7815		GAME( 2000, mpang,    0,        cps2, cps2_2p1b, cps2,     ROT0,   "Mitchell, distributed by Capcom", "Mighty! Pang (Euro 001010)", 0 )
7816		GAME( 2000, mpangr1,  mpang,    cps2, cps2_2p1b, cps2,     ROT0,   "Mitchell, distributed by Capcom", "Mighty! Pang (Euro 000925)", 0 )
7817		GAME( 2000, mpangu,   mpang,    cps2, cps2_2p1b, cps2,     ROT0,   "Mitchell, distributed by Capcom", "Mighty! Pang (USA 001010)", 0 )
7818		GAME( 2000, mpangj,   mpang,    cps2, cps2_2p1b, cps2,     ROT0,   "Mitchell, distributed by Capcom", "Mighty! Pang (Japan 001011)", 0 )
7819		GAME( 2001, pzloop2,  0,        cps2, pzloop2,   pzloop2,  ROT0,   "Mitchell, distributed by Capcom", "Puzz Loop 2 (Euro 010302)", 0 )
7820		GAME( 2001, pzloop2j, pzloop2,  cps2, pzloop2,   pzloop2,  ROT0,   "Mitchell, distributed by Capcom", "Puzz Loop 2 (Japan 010205)", 0 )
7821		GAME( 2001, choko,    0,        cps2, choko,     cps2,     ROT0,   "Mitchell, distributed by Capcom", "Janpai Puzzle Choukou (Japan 010820)", 0 )
	7873	GAME( 2000, mpang,      0,        cps2, cps2_2p1b, cps2,     ROT0,   "Mitchell, distributed by Capcom", "Mighty! Pang (Euro 001010)", GAME_SUPPORTS_SAVE )
	7874	GAME( 2000, mpangr1,    mpang,    cps2, cps2_2p1b, cps2,     ROT0,   "Mitchell, distributed by Capcom", "Mighty! Pang (Euro 000925)", GAME_SUPPORTS_SAVE )
	7875	GAME( 2000, mpangu,     mpang,    cps2, cps2_2p1b, cps2,     ROT0,   "Mitchell, distributed by Capcom", "Mighty! Pang (USA 001010)", GAME_SUPPORTS_SAVE )
	7876	GAME( 2000, mpangj,     mpang,    cps2, cps2_2p1b, cps2,     ROT0,   "Mitchell, distributed by Capcom", "Mighty! Pang (Japan 001011)", GAME_SUPPORTS_SAVE )
	7877	GAME( 2001, pzloop2,    0,        cps2, pzloop2,   pzloop2,  ROT0,   "Mitchell, distributed by Capcom", "Puzz Loop 2 (Euro 010302)", GAME_SUPPORTS_SAVE )
	7878	GAME( 2001, pzloop2j,   pzloop2,  cps2, pzloop2,   pzloop2,  ROT0,   "Mitchell, distributed by Capcom", "Puzz Loop 2 (Japan 010205)", GAME_SUPPORTS_SAVE )
	7879	GAME( 2001, choko,      0,        cps2, choko,     cps2,     ROT0,   "Mitchell, distributed by Capcom", "Janpai Puzzle Choukou (Japan 010820)", GAME_SUPPORTS_SAVE )
7822	7880
7823	7881	/* Games released on CPS-2 hardware by Eighting/Raizing */
7824	7882
7825		GAME( 2000, dimahoo,  0,        cps2, cps2_2p3b, cps2,     ROT270, "Eighting/Raizing, distributed by Capcom", "Dimahoo (Euro 000121)", 0 )
7826		GAME( 2000, dimahoou, dimahoo,  cps2, cps2_2p3b, cps2,     ROT270, "Eighting/Raizing, distributed by Capcom", "Dimahoo (USA 000121)", 0 )
7827		GAME( 2000, gmahou,   dimahoo,  cps2, cps2_2p3b, cps2,     ROT270, "Eighting/Raizing, distributed by Capcom", "Great Mahou Daisakusen (Japan 000121)", 0 )
7828		GAME( 2000, 1944,     0,        cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Eighting/Raizing", "1944: The Loop Master (USA 000620)", 0 )
7829		GAME( 2000, 1944j,    1944,     cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Eighting/Raizing", "1944: The Loop Master (Japan 000620)", 0 )
	7883	GAME( 2000, dimahoo,    0,        cps2, cps2_2p3b, cps2,     ROT270, "Eighting/Raizing, distributed by Capcom", "Dimahoo (Euro 000121)", GAME_SUPPORTS_SAVE )
	7884	GAME( 2000, dimahoou,   dimahoo,  cps2, cps2_2p3b, cps2,     ROT270, "Eighting/Raizing, distributed by Capcom", "Dimahoo (USA 000121)", GAME_SUPPORTS_SAVE )
	7885	GAME( 2000, gmahou,     dimahoo,  cps2, cps2_2p3b, cps2,     ROT270, "Eighting/Raizing, distributed by Capcom", "Great Mahou Daisakusen (Japan 000121)", GAME_SUPPORTS_SAVE )
	7886	GAME( 2000, 1944,       0,        cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Eighting/Raizing", "1944: The Loop Master (USA 000620)", GAME_SUPPORTS_SAVE )
	7887	GAME( 2000, 1944j,      1944,     cps2, cps2_2p2b, cps2,     ROT0,   "Capcom, supported by Eighting/Raizing", "1944: The Loop Master (Japan 000620)", GAME_SUPPORTS_SAVE )
7830	7888
7831	7889	/* Games released on CPS-2 hardware by Cave */
7832	7890
7833		GAME( 2001, progear,  0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom, supported by Cave", "Progear (USA 010117)", 0 )
7834		GAME( 2001, progearj, progear,  cps2, cps2_2p3b, cps2,     ROT0,   "Capcom, supported by Cave", "Progear no Arashi (Japan 010117)", 0 )
7835		GAME( 2001, progeara, progear,  cps2, cps2_2p3b, cps2,     ROT0,   "Capcom, supported by Cave", "Progear (Asia 010117)", 0 )
	7891	GAME( 2001, progear,    0,        cps2, cps2_2p3b, cps2,     ROT0,   "Capcom, supported by Cave", "Progear (USA 010117)", GAME_SUPPORTS_SAVE )
	7892	GAME( 2001, progearj,   progear,  cps2, cps2_2p3b, cps2,     ROT0,   "Capcom, supported by Cave", "Progear no Arashi (Japan 010117)", GAME_SUPPORTS_SAVE )
	7893	GAME( 2001, progeara,   progear,  cps2, cps2_2p3b, cps2,     ROT0,   "Capcom, supported by Cave", "Progear (Asia 010117)", GAME_SUPPORTS_SAVE )
7836	7894
7837	7895	/*
7838	7896	------------------------
r6740	r6741
8112	8170	ROM_LOAD16_WORD_SWAP( "hs2ad.04", 0x080000, 0x80000, CRC(0276b78a) SHA1(3f5502f77eb9889ca4658eb323579e05b35c9868) )
8113	8171	ROM_LOAD16_WORD_SWAP( "hs2.05",   0x100000, 0x80000, CRC(dde34a35) SHA1(f5be2d2916db6e86e0886d61d55bddf138273ebc) )
8114	8172	ROM_LOAD16_WORD_SWAP( "hs2.06",   0x180000, 0x80000, CRC(f4e56dda) SHA1(c6490707c2a416ab88612c2d73abbe5853d8cb92) )
8115		ROM_LOAD16_WORD_SWAP( "hs2a.07",  0x200000, 0x80000, CRC(ee4420fc) SHA1(06cf76660b0c794d2460c52d9fe8334fff51e9de) )
	8173	ROM_LOAD16_WORD_SWAP( "hs2.07",   0x200000, 0x80000, CRC(ee4420fc) SHA1(06cf76660b0c794d2460c52d9fe8334fff51e9de) )
8116	8174	ROM_LOAD16_WORD_SWAP( "hs2.08",   0x280000, 0x80000, CRC(c9441533) SHA1(bf178fac1f060fcce3ff9118333c8517dadc9429) )
8117	8175	ROM_LOAD16_WORD_SWAP( "hs2.09",   0x300000, 0x80000, CRC(3fc638a8) SHA1(2a42877b26c8abc437da46225701f0bba6e40058) )
8118	8176	ROM_LOAD16_WORD_SWAP( "hs2.10",   0x380000, 0x80000, CRC(20d0f9e4) SHA1(80a5eeef9472e327b0d4ee26434bad109a9434ea) )
r6740	r6741
8783	8841
8784	8842
8785	8843
8786		GAME( 1993, ssf2ud,   ssf2,    dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Super Street Fighter II: The New Challengers (USA 930911 Phoenix Edition) (bootleg)", 0 )
8787		GAME( 1993, ddtodd,   ddtod,   dead_cps2, cps2_4p4b, cps2,   ROT0,   "bootleg", "Dungeons & Dragons: Tower of Doom (Euro 940412 Phoenix Edition) (bootleg)", 0 )
8788		GAME( 1994, armwar1d, armwar,  dead_cps2, cps2_3p3b, cps2,   ROT0,   "bootleg", "Armored Warriors (Euro 941011 Phoenix Edition) (bootleg)", 0 )
8789		GAME( 1994, avspd,    avsp,    dead_cps2, cps2_3p3b, cps2,   ROT0,   "bootleg", "Alien vs. Predator (Euro 940520 Phoenix Edition) (bootleg)", 0 )
8790		GAME( 1994, dstlku1d, dstlk,   dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Darkstalkers: The Night Warriors (USA 940705 Phoenix Edition) (bootleg)", 0 )
8791		GAME( 1994, ringdstd, ringdest,dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Ring of Destruction: Slammasters II (Euro 940902 Phoenix Edition) (bootleg)", 0 )
8792		GAME( 1994, xmcotad,  xmcota,  dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "X-Men: Children of the Atom (Euro 950105 Phoenix Edition) (bootleg)", 0 )
8793		GAME( 1995, nwarrud,  nwarr,   dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Night Warriors: Darkstalkers' Revenge (USA 950406 Phoenix Edition) (bootleg)", 0 )
8794		GAME( 1995, sfad,     sfa,     dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Street Fighter Alpha: Warriors' Dreams (Euro 950727 Phoenix Edition) (bootleg)", 0 )
8795		GAME( 1995, mshud,    msh,     dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Marvel Super Heroes (US 951024 Phoenix Edition) (bootleg)", 0 )
8796		GAME( 1996, 19xxd,    19xx,    dead_cps2, cps2_2p2b, cps2,   ROT270, "bootleg", "19XX: The War Against Destiny (USA 951207 Phoenix Edition) (bootleg)", 0 )
8797		GAME( 1996, sfz2ad,   sfa2,    dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Street Fighter Zero 2 (Asia 960227 Phoenix Edition) (bootleg)", 0 )
8798		GAME( 1996, spf2xjd,  spf2t,   dead_cps2, cps2_2p2b, cps2,   ROT0,   "bootleg", "Super Puzzle Fighter II X (Japan 960531 Phoenix Edition) (bootleg)", 0 )
8799		GAME( 1996, ddsomud,  ddsom,   dead_cps2, cps2_4p4b, cps2,   ROT0,   "bootleg", "Dungeons & Dragons: Shadow over Mystara (USA 960619 Phoenix Edition) (bootleg)", 0 )
8800		GAME( 1996, gigamn2,  megaman2, gigamn2, cps2_2p3b, gigamn2,  ROT0,   "bootleg", "Giga Man 2: The Power Fighters (bootleg of Mega Man 2: The Power Fighters)", GAME_NOT_WORKING ) // flash roms aren't dumped, layer offsets different, different sound system
8801		GAME( 1996, megamn2d, megaman2,dead_cps2, cps2_2p3b, cps2,   ROT0,   "bootleg", "Mega Man 2: The Power Fighters (USA 960708 Phoenix Edition) (bootleg)", 0 )
8802		GAME( 1996, sfz2ald,  sfz2al,  dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Street Fighter Zero 2 Alpha (Asia 960826 Phoenix Edition) (bootleg)", 0 )
8803		GAME( 1996, xmvsfu1d, xmvsf,   dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "X-Men Vs. Street Fighter (USA 961004 Phoenix Edition) (bootleg)", 0 )
8804		GAME( 1997, batcird,  batcir,  dead_cps2, cps2_4p2b, cps2,   ROT0,   "bootleg", "Battle Circuit (Euro 970319 Phoenix Edition) (bootleg)", 0 )
8805		GAME( 1997, vsavd,    vsav,    dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Vampire Savior: The Lord of Vampire (Euro 970519 Phoenix Edition) (bootleg)", 0 )
8806		GAME( 1998, mvscud,   mvsc,    dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Marvel Vs. Capcom: Clash of Super Heroes (USA 980123 Phoenix Edition) (bootleg)", 0 )
8807		GAME( 1998, sfa3ud,   sfa3,    dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Street Fighter Alpha 3 (USA 980904 Phoenix Edition) (bootleg)", 0 )
8808		GAME( 1999, gwingjd,  gigawing,dead_cps2, cps2_2p2b, cps2,   ROT0,   "bootleg", "Giga Wing (Japan 990223 Phoenix Edition) (bootleg)", 0 )
8809		GAME( 2000, 1944d,    1944,    dead_cps2, cps2_2p2b, cps2,   ROT0,   "bootleg", "1944: The Loop Master (USA 000620 Phoenix Edition) (bootleg)", 0 )
8810		GAME( 2001, progerjd, progear, dead_cps2, cps2_2p3b, cps2,   ROT0,   "bootleg", "Progear no Arashi (Japan 010117 Phoenix Edition) (bootleg)", 0 ) // doesn't display phoenix edition screen, hacked bootleg?
8811		GAME( 2004, hsf2d,    hsf2,    dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Hyper Street Fighter II: The Anniversary Edition (Asia 040202 Phoenix Edition) (bootleg)", 0 )
8812		GAME( 1993, ssf2tbd,  ssf2,    dead_cps2, cps2_2p6b, ssf2tb, ROT0,   "bootleg", "Super Street Fighter II: The Tournament Battle (World 931119 Phoenix Edition) (bootleg)", 0 )
8813		GAME( 1994, ssf2xjd,  ssf2,    dead_cps2, cps2_2p6b, cps2,   ROT0,   "bootleg", "Super Street Fighter II X: Grand Master Challenge (Japan 940223 Phoenix Edition) (bootleg)", 0 )
8814		GAME( 1997, sgemfd,   sgemf,   dead_cps2, cps2_2p3b, cps2,   ROT0,   "bootleg", "Super Gem Fighter Mini Mix (USA 970904 Phoenix Edition) (bootleg)", 0 )
8815		GAME( 2000, mmatrixd, mmatrix, dead_cps2, cps2_2p1b, cps2,   ROT0,   "bootleg", "Mars Matrix: Hyper Solid Shooting (Japan 000412 Phoenix Edition) (bootleg)", 0 )
8816		GAME( 2000, dimahoud, dimahoo, dead_cps2, cps2_2p3b, cps2,   ROT270, "bootleg", "Dimahoo (USA 000121 Phoenix Edition) (bootleg)", 0 )
	8844	GAME( 1993, ssf2ud,   ssf2,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Super Street Fighter II: The New Challengers (USA 930911 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8845	GAME( 1993, ddtodd,   ddtod,    dead_cps2, cps2_4p4b, cps2,    ROT0,   "bootleg", "Dungeons & Dragons: Tower of Doom (Euro 940412 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8846	GAME( 1994, armwar1d, armwar,   dead_cps2, cps2_3p3b, cps2,    ROT0,   "bootleg", "Armored Warriors (Euro 941011 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8847	GAME( 1994, avspd,    avsp,     dead_cps2, cps2_3p3b, cps2,    ROT0,   "bootleg", "Alien vs. Predator (Euro 940520 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8848	GAME( 1994, dstlku1d, dstlk,    dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Darkstalkers: The Night Warriors (USA 940705 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8849	GAME( 1994, ringdstd, ringdest, dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Ring of Destruction: Slammasters II (Euro 940902 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8850	GAME( 1994, xmcotad,  xmcota,   dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "X-Men: Children of the Atom (Euro 950105 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8851	GAME( 1995, nwarrud,  nwarr,    dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Night Warriors: Darkstalkers' Revenge (USA 950406 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8852	GAME( 1995, sfad,     sfa,      dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Street Fighter Alpha: Warriors' Dreams (Euro 950727 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8853	GAME( 1995, mshud,    msh,      dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Marvel Super Heroes (US 951024 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8854	GAME( 1996, 19xxd,    19xx,     dead_cps2, cps2_2p2b, cps2,    ROT270, "bootleg", "19XX: The War Against Destiny (USA 951207 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8855	GAME( 1996, sfz2ad,   sfa2,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Street Fighter Zero 2 (Asia 960227 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8856	GAME( 1996, spf2xjd,  spf2t,    dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "Super Puzzle Fighter II X (Japan 960531 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8857	GAME( 1996, ddsomud,  ddsom,    dead_cps2, cps2_4p4b, cps2,    ROT0,   "bootleg", "Dungeons & Dragons: Shadow over Mystara (USA 960619 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8858	GAME( 1996, gigamn2,  megaman2, gigamn2,   cps2_2p3b, gigamn2, ROT0,   "bootleg", "Giga Man 2: The Power Fighters (bootleg of Mega Man 2: The Power Fighters)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // flash roms aren't dumped, layer offsets different, different sound system
	8859	GAME( 1996, megamn2d, megaman2, dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Mega Man 2: The Power Fighters (USA 960708 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8860	GAME( 1996, sfz2ald,  sfz2al,   dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Street Fighter Zero 2 Alpha (Asia 960826 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8861	GAME( 1996, xmvsfu1d, xmvsf,    dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "X-Men Vs. Street Fighter (USA 961004 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8862	GAME( 1997, batcird,  batcir,   dead_cps2, cps2_4p2b, cps2,    ROT0,   "bootleg", "Battle Circuit (Euro 970319 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8863	GAME( 1997, vsavd,    vsav,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Vampire Savior: The Lord of Vampire (Euro 970519 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8864	GAME( 1998, mvscud,   mvsc,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Marvel Vs. Capcom: Clash of Super Heroes (USA 980123 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8865	GAME( 1998, sfa3ud,   sfa3,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Street Fighter Alpha 3 (USA 980904 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8866	GAME( 1999, gwingjd,  gigawing, dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "Giga Wing (Japan 990223 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8867	GAME( 2000, 1944d,    1944,     dead_cps2, cps2_2p2b, cps2,    ROT0,   "bootleg", "1944: The Loop Master (USA 000620 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8868	GAME( 2001, progerjd, progear,  dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Progear no Arashi (Japan 010117 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE ) // doesn't display phoenix edition screen, hacked bootleg?
	8869	GAME( 2004, hsf2d,    hsf2,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Hyper Street Fighter II: The Anniversary Edition (Asia 040202 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8870	GAME( 1993, ssf2tbd,  ssf2,     dead_cps2, cps2_2p6b, ssf2tb,  ROT0,   "bootleg", "Super Street Fighter II: The Tournament Battle (World 931119 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8871	GAME( 1994, ssf2xjd,  ssf2,     dead_cps2, cps2_2p6b, cps2,    ROT0,   "bootleg", "Super Street Fighter II X: Grand Master Challenge (Japan 940223 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8872	GAME( 1997, sgemfd,   sgemf,    dead_cps2, cps2_2p3b, cps2,    ROT0,   "bootleg", "Super Gem Fighter Mini Mix (USA 970904 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8873	GAME( 2000, mmatrixd, mmatrix,  dead_cps2, cps2_2p1b, cps2,    ROT0,   "bootleg", "Mars Matrix: Hyper Solid Shooting (Japan 000412 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )
	8874	GAME( 2000, dimahoud, dimahoo,  dead_cps2, cps2_2p3b, cps2,    ROT270, "bootleg", "Dimahoo (USA 000121 Phoenix Edition) (bootleg)", GAME_SUPPORTS_SAVE )

src/mame/drivers/amaticmg.c

r6740	r6741
422	422	//  AM_RANGE(0x0000, 0x0000) AM_RAM // AM_BASE_SIZE_GENERIC(nvram)
423	423	//  AM_RANGE(0x0000, 0x0000) AM_DEVWRITE("crtc", mc6845_address_w)
424	424	//  AM_RANGE(0x0000, 0x0000) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
425		//  AM_RANGE(0x0000, 0x0000) AM_RAM_WRITE(amaticmg_videoram_w) AM_BASE_GENERIC(videoram)
426		//  AM_RANGE(0x0000, 0x0000) AM_RAM_WRITE(amaticmg_colorram_w) AM_BASE_GENERIC(colorram)
	425	//  AM_RANGE(0x0000, 0x0000) AM_RAM_WRITE(amaticmg_videoram_w) AM_BASE(&amaticmg_videoram)
	426	//  AM_RANGE(0x0000, 0x0000) AM_RAM_WRITE(amaticmg_colorram_w) AM_BASE(&amaticmg_colorram)
427	427	ADDRESS_MAP_END
428	428
429	429	static ADDRESS_MAP_START( amaticmg_portmap, ADDRESS_SPACE_IO, 8 )

src/mame/drivers/jpmimpct.c

r6740	r6741
81	81	#include "cpu/m68000/m68000.h"
82	82	#include "cpu/tms34010/tms34010.h"
83	83	#include "sound/upd7759.h"
84		#include "jpmimpct.h"
	84	#include "includes/jpmimpct.h"
85	85	#include "machine/meters.h"
86	86
87	87	/*************************************
r6740	r6741
94	94	static UINT8 duart_1_irq;
95	95	static UINT8 touch_cnt;
96	96	static UINT8 touch_data[3];
97		static emu_timer *duart_1_timer;
98	97
99	98	static int lamp_strobe;
100	99	static UINT8 Lamps[256];
101		static TIMER_CALLBACK( duart_1_timer_event );
102	100
103	101
104	102	/*************************************
r6740	r6741
166	164	*
167	165	*************************************/
168	166
169		static MACHINE_RESET( jpmimpct )
	167	static MACHINE_START( jpmimpct )
170	168	{
171		memset(&duart_1, 0, sizeof(duart_1));
172
173		duart_1_timer = timer_alloc(machine, duart_1_timer_event, NULL);
174
175		/* Reset states */
176		duart_1_irq = tms_irq = 0;
177		touch_cnt = 0;
178
179		//  duart_1.IVR=0x0f;
180	169	state_save_register_global(machine, tms_irq);
181	170	state_save_register_global(machine, duart_1_irq);
182	171	state_save_register_global(machine, touch_cnt);
r6740	r6741
189	178	}
190	179
191	180
	181	static MACHINE_RESET( jpmimpct )
	182	{
	183	memset(&duart_1, 0, sizeof(duart_1));
	184
	185	/* Reset states */
	186	duart_1_irq = tms_irq = 0;
	187	touch_cnt = 0;
	188
	189	//  duart_1.IVR=0x0f;
	190	}
	191
	192
192	193	/*************************************
193	194	*
194	195	*  TMS34010 host interface
r6740	r6741
234	235	*  TxDB/TxDB: Data retrieval unit
235	236	*/
236	237
237		static TIMER_CALLBACK( duart_1_timer_event )
	238	static TIMER_DEVICE_CALLBACK( duart_1_timer_event )
238	239	{
239	240	duart_1.tc = 0;
240	241	duart_1.ISR |= 0x08;
241	242
242	243	duart_1_irq = 1;
243		update_irqs(machine);
	244	update_irqs(timer->machine);
244	245	}
245	246
246	247	static READ16_HANDLER( duart_1_r )
r6740	r6741
291	292	case 0xe:
292	293	{
293	294	attotime rate = attotime_mul(ATTOTIME_IN_HZ(MC68681_1_CLOCK), 16 * duart_1.CT);
294		timer_adjust_periodic(duart_1_timer, rate, 0, rate);
	295	timer_device_adjust_periodic(devtag_get_device(space->machine, "duart_1_timer"), rate, 0, rate);
295	296	break;
296	297	}
297	298	case 0xf:
r6740	r6741
852	853	MDRV_CPU_PROGRAM_MAP(tms_program_map)
853	854
854	855	MDRV_QUANTUM_TIME(HZ(30000))
	856	MDRV_MACHINE_START(jpmimpct)
855	857	MDRV_MACHINE_RESET(jpmimpct)
856	858	MDRV_NVRAM_HANDLER(generic_0fill)
857	859
	860	MDRV_TIMER_ADD( "duart_1_timer", duart_1_timer_event)
	861
858	862	MDRV_SCREEN_ADD("screen", RASTER)
859	863	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
860	864	MDRV_SCREEN_RAW_PARAMS(40000000/4, 156*4, 0, 100*4, 328, 0, 300)
r6740	r6741
1128	1132	}
1129	1133	};
1130	1134
1131		static MACHINE_RESET( impctawp )
	1135	static MACHINE_START( impctawp )
1132	1136	{
1133		memset(&duart_1, 0, sizeof(duart_1));
1134
1135		duart_1_timer = timer_alloc(machine, duart_1_timer_event, NULL);
1136
1137		/* Reset states */
1138		duart_1_irq = 0;
1139
1140	1137	state_save_register_global(machine, duart_1_irq);
1141	1138	state_save_register_global(machine, touch_cnt);
1142	1139	state_save_register_global_array(machine, touch_data);
r6740	r6741
1146	1143	state_save_register_global(machine, duart_1.IMR);
1147	1144	state_save_register_global(machine, duart_1.CT);
1148	1145
1149		ROC10937_init(0, MSC1937,0);
1150		ROC10937_reset(0);   /* reset display1 */
1151	1146	stepper_config(machine, 0, &starpoint_interface_48step);
1152	1147	stepper_config(machine, 1, &starpoint_interface_48step);
1153	1148	stepper_config(machine, 2, &starpoint_interface_48step);
r6740	r6741
1156	1151	stepper_config(machine, 5, &starpoint_interface_48step);
1157	1152	stepper_config(machine, 6, &starpoint_interface_48step);
1158	1153	}
	1154
	1155	static MACHINE_RESET( impctawp )
	1156	{
	1157	memset(&duart_1, 0, sizeof(duart_1));
	1158
	1159	/* Reset states */
	1160	duart_1_irq = 0;
	1161
	1162	ROC10937_init(0, MSC1937,0);
	1163	ROC10937_reset(0);   /* reset display1 */
	1164	}
1159	1165	/*************************************
1160	1166	*
1161	1167	*  I/O handlers
r6740	r6741
1320	1326
1321	1327	MDRV_QUANTUM_TIME(HZ(30000))
1322	1328
	1329	MDRV_MACHINE_START(impctawp)
1323	1330	MDRV_MACHINE_RESET(impctawp)
1324	1331	MDRV_NVRAM_HANDLER(generic_0fill)
1325	1332
1326	1333	MDRV_PPI8255_ADD( "ppi8255_0", ppi8255_intf[0] )
1327	1334
	1335	MDRV_TIMER_ADD( "duart_1_timer", duart_1_timer_event)
	1336
1328	1337	MDRV_SPEAKER_STANDARD_MONO("mono")
1329	1338	MDRV_SOUND_ADD("upd",UPD7759, UPD7759_STANDARD_CLOCK)
1330	1339	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)

src/mame/drivers/scramble.c

r6740	r6741
31	31	#include "sound/ay8910.h"
32	32	#include "sound/dac.h"
33	33	#include "sound/flt_rc.h"
	34	#include "machine/7474.h"
34	35	#include "machine/8255ppi.h"
35		#include "galaxold.h"
	36	#include "includes/galaxold.h"
36	37
37	38
38	39
r6740	r6741
1242	1243	MDRV_CPU_PROGRAM_MAP(scramble_sound_map)
1243	1244	MDRV_CPU_IO_MAP(scramble_sound_io_map)
1244	1245
	1246	MDRV_7474_ADD("7474_9m_1", galaxold_7474_9m_1_callback)
	1247	MDRV_7474_ADD("7474_9m_2", galaxold_7474_9m_2_callback)
	1248	MDRV_7474_ADD("konami_7474", scramble_sh_7474_callback)
	1249
	1250	MDRV_TIMER_ADD("int_timer", galaxold_interrupt_timer)
	1251
1245	1252	MDRV_MACHINE_RESET(scramble)
1246	1253
1247	1254	MDRV_PPI8255_ADD( "ppi8255_0", scramble_ppi_0_intf )
r6740	r6741
1471	1478	MDRV_CPU_ADD("maincpu", Z80, 18432000/6)   /* 3.072 MHz */
1472	1479	MDRV_CPU_PROGRAM_MAP(ad2083_map)
1473	1480
	1481	MDRV_7474_ADD("7474_9m_1", galaxold_7474_9m_1_callback)
	1482	MDRV_7474_ADD("7474_9m_2", galaxold_7474_9m_2_callback)
	1483	MDRV_7474_ADD("konami_7474", scramble_sh_7474_callback)
	1484
	1485	MDRV_TIMER_ADD("int_timer", galaxold_interrupt_timer)
	1486
1474	1487	MDRV_MACHINE_RESET(galaxold)
1475	1488
1476	1489	/* video hardware */

src/mame/drivers/liberatr.c

r6740	r6741
138	138	#include "deprecat.h"
139	139	#include "machine/atari_vg.h"
140	140	#include "sound/pokey.h"
141		#include "liberatr.h"
	141	#include "includes/liberatr.h"
142	142
143	143	#define MASTER_CLOCK 20000000 /* 20Mhz Main Clock Xtal */
144	144

src/mame/drivers/tehkanwc.c

r6740	r6741
94	94	#include "sound/msm5205.h"
95	95	#include "gridiron.lh"
96	96
	97	extern UINT8 *tehkanwc_videoram;
	98	extern UINT8 *tehkanwc_colorram;
97	99	extern UINT8 *tehkanwc_videoram2;
98	100
99	101	extern WRITE8_HANDLER( tehkanwc_videoram_w );
r6740	r6741
232	234	AM_RANGE(0x0000, 0xbfff) AM_ROM
233	235	AM_RANGE(0xc000, 0xc7ff) AM_RAM
234	236	AM_RANGE(0xc800, 0xcfff) AM_RAM AM_SHARE("share1")
235		AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(tehkanwc_videoram_w) AM_SHARE("share2") AM_BASE_GENERIC(videoram)
236		AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(tehkanwc_colorram_w) AM_SHARE("share3") AM_BASE_GENERIC(colorram)
	237	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(tehkanwc_videoram_w) AM_SHARE("share2") AM_BASE(&tehkanwc_videoram)
	238	AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(tehkanwc_colorram_w) AM_SHARE("share3") AM_BASE(&tehkanwc_colorram)
237	239	AM_RANGE(0xd800, 0xddff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_SHARE("share4") AM_BASE_GENERIC(paletteram)
238	240	AM_RANGE(0xde00, 0xdfff) AM_RAM AM_SHARE("share5") /* unused part of the palette RAM, I think? Gridiron uses it */
239	241	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(tehkanwc_videoram2_w) AM_SHARE("share6") AM_BASE(&tehkanwc_videoram2)

src/mame/drivers/bionicc.c

r6740	r6741
59	59	#include "cpu/m68000/m68000.h"
60	60	#include "deprecat.h"
61	61	#include "sound/2151intf.h"
62		#include "bionicc.h"
	62	#include "includes/bionicc.h"
63	63
64	64	#define MASTER_CLOCK       XTAL_24MHz
65	65	#define EXO3_F0_CLK        XTAL_14_31818MHz

src/mame/drivers/citycon.c

r6740	r6741
11	11	#include "cpu/m6809/m6809.h"
12	12	#include "sound/ay8910.h"
13	13	#include "sound/2203intf.h"
14		#include "citycon.h"
	14	#include "includes/citycon.h"
15	15
16	16
17	17	static READ8_HANDLER( citycon_in_r )

src/mame/drivers/namcos21.c

r6740	r6741
292	292	#include "cpu/m68000/m68000.h"
293	293	#include "cpu/m6805/m6805.h"
294	294	#include "deprecat.h"
295		#include "namcos2.h"
	295	#include "includes/namcos2.h"
296	296	#include "cpu/m6809/m6809.h"
297	297	#include "cpu/tms32025/tms32025.h"
298		#include "namcoic.h"
	298	#include "includes/namcoic.h"
299	299	#include "sound/2151intf.h"
300	300	#include "sound/c140.h"
301		#include "namcos21.h"
	301	#include "includes/namcos21.h"
302	302
303	303	#define PTRAM_SIZE 0x20000
304	304

src/mame/drivers/pgm.c

r6740	r6741
291	291	#include "cpu/arm7/arm7core.h"
292	292	#include "includes/pgm.h"
293	293
	294	UINT16 *pgm_mainram;
294	295
295		UINT16 *pgm_mainram, *pgm_bg_videoram, *pgm_tx_videoram, *pgm_videoregs, *pgm_rowscrollram;
296		static UINT16 *pgm_videoram;
297		static UINT8 *z80_mainram;
298		static UINT32 *arm7_shareram;
299		static UINT32 *svg_shareram[2];   //for 5585G MACHINE
300		static UINT32 kov2_latchdata_68k_w;
301		static UINT32 kov2_latchdata_arm_w;
302
303
304	296	static WRITE16_HANDLER( pgm_videoram_w )
305	297	{
306		if (offset<0x4000/2)
	298	pgm_state *state = (pgm_state *)space->machine->driver_data;
	299
	300	if (offset < 0x4000 / 2)
307	301	pgm_bg_videoram_w(space, offset, data, mem_mask);
308		else if (offset<0x7000/2)
309		pgm_tx_videoram_w(space, offset-0x4000/2, data, mem_mask);
310		else COMBINE_DATA(&pgm_videoram[offset/2]);
	302	else if (offset < 0x7000 / 2)
	303	pgm_tx_videoram_w(space, offset - 0x4000 / 2, data, mem_mask);
	304	else
	305	COMBINE_DATA(&state->videoram[offset / 2]);
311	306	}
312	307
313	308	static READ16_HANDLER ( z80_ram_r )
314	309	{
315		return (z80_mainram[offset*2] << 8)|z80_mainram[offset*2+1];
	310	pgm_state *state = (pgm_state *)space->machine->driver_data;
	311	return (state->z80_mainram[offset * 2] << 8) | state->z80_mainram[offset * 2 + 1];
316	312	}
317	313
318	314	static READ32_HANDLER( arm7_latch_arm_r )
319	315	{
320		if (PGMARM7LOGERROR) logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", kov2_latchdata_68k_w, mem_mask, cpu_get_pc(space->cpu) );
321		return kov2_latchdata_68k_w;
	316	pgm_state *state = (pgm_state *)space->machine->driver_data;
	317
	318	if (PGMARM7LOGERROR)
	319	logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->kov2_latchdata_68k_w, mem_mask, cpu_get_pc(space->cpu));
	320	return state->kov2_latchdata_68k_w;
322	321	}
323	322
324	323	static WRITE32_HANDLER( arm7_latch_arm_w )
325	324	{
326		if (PGMARM7LOGERROR) logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, cpu_get_pc(space->cpu) );
327		COMBINE_DATA(&kov2_latchdata_arm_w);
	325	pgm_state *state = (pgm_state *)space->machine->driver_data;
	326
	327	if (PGMARM7LOGERROR)
	328	logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, cpu_get_pc(space->cpu));
	329
	330	COMBINE_DATA(&state->kov2_latchdata_arm_w);
328	331	}
329	332
330	333	static READ32_HANDLER( arm7_shareram_r )
331	334	{
332		if (PGMARM7LOGERROR) logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, arm7_shareram[offset], mem_mask, cpu_get_pc(space->cpu) );
333		return arm7_shareram[offset];
	335	pgm_state *state = (pgm_state *)space->machine->driver_data;
	336
	337	if (PGMARM7LOGERROR)
	338	logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->arm7_shareram[offset], mem_mask, cpu_get_pc(space->cpu));
	339	return state->arm7_shareram[offset];
334	340	}
335	341
336	342	static WRITE32_HANDLER( arm7_shareram_w )
337	343	{
338		if (PGMARM7LOGERROR) logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, cpu_get_pc(space->cpu) );
339		COMBINE_DATA(&arm7_shareram[offset]);
	344	pgm_state *state = (pgm_state *)space->machine->driver_data;
	345
	346	if (PGMARM7LOGERROR)
	347	logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, cpu_get_pc(space->cpu));
	348	COMBINE_DATA(&state->arm7_shareram[offset]);
340	349	}
341	350
342	351	static READ16_HANDLER( arm7_latch_68k_r )
343	352	{
344		if (PGMARM7LOGERROR) logerror("M68K: Latch read: %04x (%04x) (%06x)\n", kov2_latchdata_arm_w & 0x0000ffff, mem_mask, cpu_get_pc(space->cpu) );
345		return kov2_latchdata_arm_w;
	353	pgm_state *state = (pgm_state *)space->machine->driver_data;
	354
	355	if (PGMARM7LOGERROR)
	356	logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->kov2_latchdata_arm_w & 0x0000ffff, mem_mask, cpu_get_pc(space->cpu));
	357	return state->kov2_latchdata_arm_w;
346	358	}
347	359
348	360	static WRITE16_HANDLER( arm7_latch_68k_w )
349	361	{
350		if (PGMARM7LOGERROR) logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(space->cpu) );
351		COMBINE_DATA(&kov2_latchdata_68k_w);
	362	pgm_state *state = (pgm_state *)space->machine->driver_data;
352	363
353		generic_pulse_irq_line(cputag_get_cpu(space->machine, "prot"), ARM7_FIRQ_LINE);
	364	if (PGMARM7LOGERROR)
	365	logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(space->cpu));
	366	COMBINE_DATA(&state->kov2_latchdata_68k_w);
	367
	368	generic_pulse_irq_line(state->prot, ARM7_FIRQ_LINE);
354	369	cpuexec_boost_interleave(space->machine, attotime_zero, ATTOTIME_IN_USEC(200));
355		cpu_spinuntil_time(space->cpu, cputag_clocks_to_attotime(space->machine, "prot", 200)); // give the arm time to respond (just boosting the interleave doesn't help)
	370	cpu_spinuntil_time(space->cpu, cpu_clocks_to_attotime(state->prot, 200)); // give the arm time to respond (just boosting the interleave doesn't help)
356	371	}
357	372
358	373	static READ16_HANDLER( arm7_ram_r )
359	374	{
360		UINT16 *share16 = (UINT16 *)arm7_shareram;
361		if (PGMARM7LOGERROR) logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, cpu_get_pc(space->cpu) );
	375	pgm_state *state = (pgm_state *)space->machine->driver_data;
	376	UINT16 *share16 = (UINT16 *)state->arm7_shareram;
	377
	378	if (PGMARM7LOGERROR)
	379	logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, cpu_get_pc(space->cpu));
362	380	return share16[BYTE_XOR_LE(offset)];
363	381	}
364	382
365	383	static WRITE16_HANDLER( arm7_ram_w )
366	384	{
367		UINT16 *share16 = (UINT16 *)arm7_shareram;
368		if (PGMARM7LOGERROR) logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, cpu_get_pc(space->cpu) );
	385	pgm_state *state = (pgm_state *)space->machine->driver_data;
	386	UINT16 *share16 = (UINT16 *)state->arm7_shareram;
369	387
	388	if (PGMARM7LOGERROR)
	389	logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, cpu_get_pc(space->cpu));
370	390	COMBINE_DATA(&share16[BYTE_XOR_LE(offset)]);
371	391	}
372	392
373	393	static WRITE16_HANDLER ( z80_ram_w )
374	394	{
	395	pgm_state *state = (pgm_state *)space->machine->driver_data;
375	396	int pc = cpu_get_pc(space->cpu);
376		if(ACCESSING_BITS_8_15)
377		z80_mainram[offset*2] = data >> 8;
378		if(ACCESSING_BITS_0_7)
379		z80_mainram[offset*2+1] = data;
380	397
381		if(pc != 0xf12 && pc != 0xde2 && pc != 0x100c50 && pc != 0x100b20)
382		if (PGMLOGERROR) logerror("Z80: write %04x, %04x @ %04x (%06x)\n", offset*2, data, mem_mask, cpu_get_pc(space->cpu));
	398	if (ACCESSING_BITS_8_15)
	399	state->z80_mainram[offset * 2] = data >> 8;
	400	if (ACCESSING_BITS_0_7)
	401	state->z80_mainram[offset * 2 + 1] = data;
	402
	403	if (pc != 0xf12 && pc != 0xde2 && pc != 0x100c50 && pc != 0x100b20)
	404	if (PGMLOGERROR)
	405	logerror("Z80: write %04x, %04x @ %04x (%06x)\n", offset * 2, data, mem_mask, cpu_get_pc(space->cpu));
383	406	}
384	407
385	408	static WRITE16_HANDLER ( z80_reset_w )
386	409	{
387		if (PGMLOGERROR) logerror("Z80: reset %04x @ %04x (%06x)\n", data, mem_mask, cpu_get_pc(space->cpu));
	410	pgm_state *state = (pgm_state *)space->machine->driver_data;
388	411
389		if(data == 0x5050)
	412	if (PGMLOGERROR)
	413	logerror("Z80: reset %04x @ %04x (%06x)\n", data, mem_mask, cpu_get_pc(space->cpu));
	414
	415	if (data == 0x5050)
390	416	{
391		devtag_reset(space->machine, "ics");
392		cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_HALT, CLEAR_LINE);
393		cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, PULSE_LINE);
	417	device_reset(state->ics);
	418	cpu_set_input_line(state->soundcpu, INPUT_LINE_HALT, CLEAR_LINE);
	419	cpu_set_input_line(state->soundcpu, INPUT_LINE_RESET, PULSE_LINE);
394	420	if(0)
395	421	{
396	422	FILE *out;
397	423	out = fopen("z80ram.bin", "wb");
398		fwrite(z80_mainram, 1, 65536, out);
	424	fwrite(state->z80_mainram, 1, 65536, out);
399	425	fclose(out);
400	426	}
401	427	}
r6740	r6741
403	429	{
404	430	/* this might not be 100% correct, but several of the games (ddp2, puzzli2 etc. expect the z80 to be turned
405	431	off during data uploads, they write here before the upload */
406		cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_HALT, ASSERT_LINE);
	432	cpu_set_input_line(state->soundcpu, INPUT_LINE_HALT, ASSERT_LINE);
407	433	}
408	434	}
409	435
410	436	static WRITE16_HANDLER ( z80_ctrl_w )
411	437	{
412		if (PGMLOGERROR) logerror("Z80: ctrl %04x @ %04x (%06x)\n", data, mem_mask, cpu_get_pc(space->cpu));
	438	if (PGMLOGERROR)
	439	logerror("Z80: ctrl %04x @ %04x (%06x)\n", data, mem_mask, cpu_get_pc(space->cpu));
413	440	}
414	441
415	442	static WRITE16_HANDLER ( m68k_l1_w )
416	443	{
	444	pgm_state *state = (pgm_state *)space->machine->driver_data;
	445
417	446	if(ACCESSING_BITS_0_7)
418	447	{
419		if (PGMLOGERROR) logerror("SL 1 m68.w %02x (%06x) IRQ\n", data & 0xff, cpu_get_pc(space->cpu));
	448	if (PGMLOGERROR)
	449	logerror("SL 1 m68.w %02x (%06x) IRQ\n", data & 0xff, cpu_get_pc(space->cpu));
420	450	soundlatch_w(space, 0, data);
421		cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE );
	451	cpu_set_input_line(state->soundcpu, INPUT_LINE_NMI, PULSE_LINE );
422	452	}
423	453	}
424	454
425	455	static WRITE8_HANDLER( z80_l3_w )
426	456	{
427		if (PGMLOGERROR) logerror("SL 3 z80.w %02x (%04x)\n", data, cpu_get_pc(space->cpu));
	457	if (PGMLOGERROR)
	458	logerror("SL 3 z80.w %02x (%04x)\n", data, cpu_get_pc(space->cpu));
428	459	soundlatch3_w(space, 0, data);
429	460	}
430	461
431		static void sound_irq(const device_config *device, int level)
	462	static void sound_irq( const device_config *device, int level )
432	463	{
433		cputag_set_input_line(device->machine, "soundcpu", 0, level);
	464	pgm_state *state = (pgm_state *)device->machine->driver_data;
	465	cpu_set_input_line(state->soundcpu, 0, level);
434	466	}
435	467
436		static const ics2115_interface pgm_ics2115_interface = {
	468	static const ics2115_interface pgm_ics2115_interface =
	469	{
437	470	sound_irq
438	471	};
439	472
	473
440	474	/* Calendar Emulation */
441	475
442		static UINT8 CalVal, CalMask, CalCom=0, CalCnt=0;
443
444		static UINT8 bcd(UINT8 data)
	476	static UINT8 bcd( UINT8 data )
445	477	{
446	478	return ((data / 10) << 4) | (data % 10);
447	479	}
448	480
449	481	static READ16_HANDLER( pgm_calendar_r )
450	482	{
451		UINT8 calr;
452		calr = (CalVal & CalMask) ? 1 : 0;
453		CalMask <<= 1;
	483	pgm_state *state = (pgm_state *)space->machine->driver_data;
	484	UINT8 calr = (state->cal_val & state->cal_mask) ? 1 : 0;
	485
	486	state->cal_mask <<= 1;
454	487	return calr;
455	488	}
456	489
457	490	static WRITE16_HANDLER( pgm_calendar_w )
458	491	{
459		static mame_system_time systime;
	492	pgm_state *state = (pgm_state *)space->machine->driver_data;
460	493
461		mame_get_base_datetime(space->machine, &systime);
	494	mame_get_base_datetime(space->machine, &state->systime);
462	495
463		// initialize the time, otherwise it crashes
464		if( !systime.time )
465		mame_get_base_datetime(space->machine, &systime);
	496	state->cal_com <<= 1;
	497	state->cal_com |= data & 1;
	498	++state->cal_cnt;
466	499
467		CalCom <<= 1;
468		CalCom |= data & 1;
469		++CalCnt;
470		if(CalCnt==4)
	500	if (state->cal_cnt == 4)
471	501	{
472		CalMask = 1;
473		CalVal = 1;
474		CalCnt = 0;
475		switch(CalCom & 0xf)
	502	state->cal_mask = 1;
	503	state->cal_val = 1;
	504	state->cal_cnt = 0;
	505
	506	switch (state->cal_com & 0xf)
476	507	{
477	508	case 1: case 3: case 5: case 7: case 9: case 0xb: case 0xd:
478		CalVal++;
	509	state->cal_val++;
479	510	break;
480	511
481	512	case 0:
482		CalVal=bcd(systime.local_time.weekday); //??
	513	state->cal_val = bcd(state->systime.local_time.weekday); //??
483	514	break;
484	515
485	516	case 2:  //Hours
486		CalVal=bcd(systime.local_time.hour);
	517	state->cal_val = bcd(state->systime.local_time.hour);
487	518	break;
488	519
489	520	case 4:  //Seconds
490		CalVal=bcd(systime.local_time.second);
	521	state->cal_val = bcd(state->systime.local_time.second);
491	522	break;
492	523
493	524	case 6:  //Month
494		CalVal=bcd(systime.local_time.month + 1); //?? not bcd in MVS
	525	state->cal_val = bcd(state->systime.local_time.month + 1); //?? not bcd in MVS
495	526	break;
496	527
497	528	case 8:
498		CalVal=0; //Controls blinking speed, maybe milliseconds
	529	state->cal_val = 0; //Controls blinking speed, maybe milliseconds
499	530	break;
500	531
501	532	case 0xa: //Day
502		CalVal=bcd(systime.local_time.mday);
	533	state->cal_val = bcd(state->systime.local_time.mday);
503	534	break;
504	535
505	536	case 0xc: //Minute
506		CalVal=bcd(systime.local_time.minute);
	537	state->cal_val = bcd(state->systime.local_time.minute);
507	538	break;
508	539
509	540	case 0xe:  //Year
510		CalVal=bcd(systime.local_time.year % 100);
	541	state->cal_val = bcd(state->systime.local_time.year % 100);
511	542	break;
512	543
513	544	case 0xf:  //Load Date
514		mame_get_base_datetime(space->machine, &systime);
	545	mame_get_base_datetime(space->machine, &state->systime);
515	546	break;
516	547	}
517	548	}
r6740	r6741
542	573
543	574	AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) /* Main Ram */
544	575
545		//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE(&pgm_bg_videoram) /* Backgrounds */
546		//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE(&pgm_tx_videoram) /* Text Layer */
547		//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE(&pgm_rowscrollram)
548		AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE(&pgm_videoram) /* IGS023 VIDEO CHIP */
	576	//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE_MEMBER(pgm_state, bg_videoram) /* Backgrounds */
	577	//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE_MEMBER(pgm_state, tx_videoram) /* Text Layer */
	578	//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE_MEMBER(pgm_state, rowscrollram)
	579	AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE_MEMBER(pgm_state, videoram) /* IGS023 VIDEO CHIP */
549	580	AM_RANGE(0xa00000, 0xa011ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
550		AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE(&pgm_videoregs) /* Video Regs inc. Zoom Table */
	581	AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE_MEMBER(pgm_state, videoregs) /* Video Regs inc. Zoom Table */
551	582
552	583	AM_RANGE(0xc00002, 0xc00003) AM_READWRITE(soundlatch_word_r, m68k_l1_w)
553	584	AM_RANGE(0xc00004, 0xc00005) AM_READWRITE(soundlatch2_word_r, soundlatch2_word_w)
r6740	r6741
564	595	AM_RANGE(0xc10000, 0xc1ffff) AM_READWRITE(z80_ram_r, z80_ram_w) /* Z80 Program */
565	596	ADDRESS_MAP_END
566	597
567		static UINT16 *killbld_sharedprotram;
568
569	598	static ADDRESS_MAP_START( killbld_mem, ADDRESS_SPACE_PROGRAM, 16)
570	599	AM_RANGE(0x000000, 0x01ffff) AM_ROM   /* BIOS ROM */
571	600	AM_RANGE(0x100000, 0x2fffff) AM_ROMBANK("bank1") /* Game ROM */
572		AM_RANGE(0x300000, 0x303fff) AM_RAM AM_BASE(&killbld_sharedprotram) // Shared with protection device
	601	AM_RANGE(0x300000, 0x303fff) AM_RAM AM_BASE_MEMBER(pgm_state, sharedprotram) // Shared with protection device
573	602
574	603	AM_RANGE(0x700006, 0x700007) AM_WRITENOP // Watchdog?
575	604
576	605	AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) /* Main Ram */
577	606
578		//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE(&pgm_bg_videoram) /* Backgrounds */
579		//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE(&pgm_tx_videoram) /* Text Layer */
580		//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE(&pgm_rowscrollram)
581		AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE(&pgm_videoram) /* IGS023 VIDEO CHIP */
	607	//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE_MEMBER(pgm_state, bg_videoram) /* Backgrounds */
	608	//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE_MEMBER(pgm_state, tx_videoram) /* Text Layer */
	609	//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE_MEMBER(pgm_state, rowscrollram)
	610	AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE_MEMBER(pgm_state, videoram) /* IGS023 VIDEO CHIP */
582	611	AM_RANGE(0xa00000, 0xa011ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
583		AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE(&pgm_videoregs) /* Video Regs inc. Zoom Table */
	612	AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE_MEMBER(pgm_state, videoregs) /* Video Regs inc. Zoom Table */
584	613
585	614	AM_RANGE(0xc00002, 0xc00003) AM_READWRITE(soundlatch_word_r, m68k_l1_w)
586	615	AM_RANGE(0xc00004, 0xc00005) AM_READWRITE(soundlatch2_word_r, soundlatch2_word_w)
r6740	r6741
597	626	AM_RANGE(0xc10000, 0xc1ffff) AM_READWRITE(z80_ram_r, z80_ram_w) /* Z80 Program */
598	627	ADDRESS_MAP_END
599	628
600		static UINT16 *olds_sharedprotram;
601
602	629	static ADDRESS_MAP_START( olds_mem, ADDRESS_SPACE_PROGRAM, 16)
603	630	AM_RANGE(0x000000, 0x01ffff) AM_ROM   /* BIOS ROM */
604	631	AM_RANGE(0x100000, 0x3fffff) AM_ROMBANK("bank1") /* Game ROM */
605		AM_RANGE(0x400000, 0x403fff) AM_RAM AM_BASE(&olds_sharedprotram) // Shared with protection device
	632	AM_RANGE(0x400000, 0x403fff) AM_RAM AM_BASE_MEMBER(pgm_state, sharedprotram) // Shared with protection device
606	633
607	634	AM_RANGE(0x700006, 0x700007) AM_WRITENOP // Watchdog?
608	635
609	636	AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) /* Main Ram */
610	637
611		//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE(&pgm_bg_videoram) /* Backgrounds */
612		//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE(&pgm_tx_videoram) /* Text Layer */
613		//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE(&pgm_rowscrollram)
614		AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE(&pgm_videoram) /* IGS023 VIDEO CHIP */
	638	//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE_MEMBER(pgm_state, bg_videoram) /* Backgrounds */
	639	//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE_MEMBER(pgm_state, tx_videoram) /* Text Layer */
	640	//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE_MEMBER(pgm_state, rowscrollram)
	641	AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE_MEMBER(pgm_state, videoram) /* IGS023 VIDEO CHIP */
615	642	AM_RANGE(0xa00000, 0xa011ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
616		AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE(&pgm_videoregs) /* Video Regs inc. Zoom Table */
	643	AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE_MEMBER(pgm_state, videoregs) /* Video Regs inc. Zoom Table */
617	644
618	645	AM_RANGE(0xc00002, 0xc00003) AM_READWRITE(soundlatch_word_r, m68k_l1_w)
619	646	AM_RANGE(0xc00004, 0xc00005) AM_READWRITE(soundlatch2_word_r, soundlatch2_word_w)
r6740	r6741
638	665
639	666	AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) /* Main Ram */
640	667
641		//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE(&pgm_bg_videoram) /* Backgrounds */
642		//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE(&pgm_tx_videoram) /* Text Layer */
643		//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE(&pgm_rowscrollram)
644		AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE(&pgm_videoram) /* IGS023 VIDEO CHIP */
	668	//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE_MEMBER(pgm_state, bg_videoram) /* Backgrounds */
	669	//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE_MEMBER(pgm_state, tx_videoram) /* Text Layer */
	670	//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE_MEMBER(pgm_state, rowscrollram)
	671	AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE_MEMBER(pgm_state, videoram) /* IGS023 VIDEO CHIP */
645	672	AM_RANGE(0xa00000, 0xa011ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
646		AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE(&pgm_videoregs) /* Video Regs inc. Zoom Table */
	673	AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE_MEMBER(pgm_state, videoregs) /* Video Regs inc. Zoom Table */
647	674
648	675	AM_RANGE(0xc00002, 0xc00003) AM_READWRITE(soundlatch_word_r, m68k_l1_w)
649	676	AM_RANGE(0xc00004, 0xc00005) AM_READWRITE(soundlatch2_word_r, soundlatch2_word_w)
r6740	r6741
666	693	static ADDRESS_MAP_START( cavepgm_mem, ADDRESS_SPACE_PROGRAM, 16)
667	694	AM_RANGE(0x000000, 0x07ffff) AM_ROM   /* larger BIOS ROM */
668	695	AM_RANGE(0xfffffe, 0xffffff) AM_ROMBANK("bank1") /* Game ROM (unmapped for now, might not even have it) */
669		AM_RANGE(0x400000, 0x4fffff) AM_RAM AM_BASE(&olds_sharedprotram) // Shared with protection device
	696	AM_RANGE(0x400000, 0x4fffff) AM_RAM AM_BASE_MEMBER(pgm_state, sharedprotram) // Shared with protection device
670	697
671	698	AM_RANGE(0x700006, 0x700007) AM_WRITENOP // Watchdog?
672	699
673	700	AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) /* Main Ram */
674	701
675		//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE(&pgm_bg_videoram) /* Backgrounds */
676		//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE(&pgm_tx_videoram) /* Text Layer */
677		//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE(&pgm_rowscrollram)
678		AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE(&pgm_videoram) /* IGS023 VIDEO CHIP */
	702	//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE_MEMBER(pgm_state, bg_videoram) /* Backgrounds */
	703	//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE_MEMBER(pgm_state, tx_videoram) /* Text Layer */
	704	//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE_MEMBER(pgm_state, rowscrollram)
	705	AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE_MEMBER(pgm_state, videoram) /* IGS023 VIDEO CHIP */
679	706	AM_RANGE(0xa00000, 0xa011ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
680		AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE(&pgm_videoregs) /* Video Regs inc. Zoom Table */
	707	AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE_MEMBER(pgm_state, videoregs) /* Video Regs inc. Zoom Table */
681	708
682	709	AM_RANGE(0xc00002, 0xc00003) AM_READWRITE(soundlatch_word_r, m68k_l1_w)
683	710	AM_RANGE(0xc00004, 0xc00005) AM_READWRITE(soundlatch2_word_r, soundlatch2_word_w)
r6740	r6741
696	723	#endif
697	724
698	725	static ADDRESS_MAP_START( z80_mem, ADDRESS_SPACE_PROGRAM, 8 )
699		AM_RANGE(0x0000, 0xffff) AM_RAM AM_BASE(&z80_mainram)
	726	AM_RANGE(0x0000, 0xffff) AM_RAM AM_BASE_MEMBER(pgm_state, z80_mainram)
700	727	ADDRESS_MAP_END
701	728
702	729	static ADDRESS_MAP_START( z80_io, ADDRESS_SPACE_IO, 8 )
r6740	r6741
712	739	AM_RANGE(0x10000000, 0x100003ff) AM_RAM
713	740	AM_RANGE(0x18000000, 0x1800ffff) AM_RAM
714	741	AM_RANGE(0x38000000, 0x38000003) AM_READWRITE(arm7_latch_arm_r, arm7_latch_arm_w) /* 68k Latch */
715		AM_RANGE(0x48000000, 0x4800ffff) AM_READWRITE(arm7_shareram_r, arm7_shareram_w) AM_BASE(&arm7_shareram)
	742	AM_RANGE(0x48000000, 0x4800ffff) AM_READWRITE(arm7_shareram_r, arm7_shareram_w) AM_BASE_MEMBER(pgm_state, arm7_shareram)
716	743	AM_RANGE(0x50000000, 0x500003ff) AM_RAM
717	744	ADDRESS_MAP_END
718	745
719	746	/* Kov Superheroes */
720	747
721		static UINT16 kovsh_highlatch_arm_w, kovsh_lowlatch_arm_w;
722		static UINT16 kovsh_highlatch_68k_w, kovsh_lowlatch_68k_w;
723
724	748	static READ32_HANDLER( kovsh_arm7_protlatch_r )
725	749	{
	750	pgm_state *state = (pgm_state *)space->machine->driver_data;
	751
726	752	timer_call_after_resynch(space->machine, NULL, 0, 0); // force resync
727	753
728		return (kovsh_highlatch_68k_w << 16) | (kovsh_lowlatch_68k_w);
	754	return (state->kovsh_highlatch_68k_w << 16) | (state->kovsh_lowlatch_68k_w);
729	755	}
730	756
731	757	static WRITE32_HANDLER( kovsh_arm7_protlatch_w )
732	758	{
	759	pgm_state *state = (pgm_state *)space->machine->driver_data;
	760
733	761	timer_call_after_resynch(space->machine, NULL, 0, 0); // force resync
734	762
735	763	if (ACCESSING_BITS_16_31)
736	764	{
737		kovsh_highlatch_arm_w = data>>16;
738		kovsh_highlatch_68k_w = 0;
	765	state->kovsh_highlatch_arm_w = data >> 16;
	766	state->kovsh_highlatch_68k_w = 0;
739	767	}
740	768	if (ACCESSING_BITS_0_15)
741	769	{
742		kovsh_lowlatch_arm_w = data;
743		kovsh_lowlatch_68k_w = 0;
	770	state->kovsh_lowlatch_arm_w = data;
	771	state->kovsh_lowlatch_68k_w = 0;
744	772	}
745	773	}
746	774
747	775	static READ16_HANDLER( kovsh_68k_protlatch_r )
748	776	{
	777	pgm_state *state = (pgm_state *)space->machine->driver_data;
	778
749	779	timer_call_after_resynch(space->machine, NULL, 0, 0); // force resync
750	780
751	781	switch (offset)
752	782	{
753		case 1: return kovsh_highlatch_arm_w;
754		case 0: return kovsh_lowlatch_arm_w;
	783	case 1: return state->kovsh_highlatch_arm_w;
	784	case 0: return state->kovsh_lowlatch_arm_w;
755	785	}
756	786	return -1;
757	787	}
758	788
759	789	static WRITE16_HANDLER( kovsh_68k_protlatch_w )
760	790	{
	791	pgm_state *state = (pgm_state *)space->machine->driver_data;
	792
761	793	timer_call_after_resynch(space->machine, NULL, 0, 0); // force resync
762	794
763	795	switch (offset)
764	796	{
765	797	case 1:
766		{
767		kovsh_highlatch_68k_w = data;
768		}
	798	state->kovsh_highlatch_68k_w = data;
769	799	break;
770	800
771	801	case 0:
772		{
773		kovsh_lowlatch_68k_w = data;
774		}
	802	state->kovsh_lowlatch_68k_w = data;
775	803	break;
776	804	}
777	805	}
778	806
779	807	static READ16_HANDLER( kovsh_arm7_ram_r )
780	808	{
781		UINT16 *share16 = (UINT16 *)arm7_shareram;
782		if (PGMARM7LOGERROR) logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, cpu_get_pc(space->cpu) );
783		return share16[BYTE_XOR_LE(offset<<1)];
	809	pgm_state *state = (pgm_state *)space->machine->driver_data;
	810	UINT16 *share16 = (UINT16 *)state->arm7_shareram;
	811
	812	if (PGMARM7LOGERROR)
	813	logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, cpu_get_pc(space->cpu));
	814	return share16[BYTE_XOR_LE(offset << 1)];
784	815	}
785	816
786	817	static WRITE16_HANDLER( kovsh_arm7_ram_w )
787	818	{
788		UINT16 *share16 = (UINT16 *)arm7_shareram;
789		if (PGMARM7LOGERROR) logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, cpu_get_pc(space->cpu) );
	819	pgm_state *state = (pgm_state *)space->machine->driver_data;
	820	UINT16 *share16 = (UINT16 *)state->arm7_shareram;
790	821
791		COMBINE_DATA(&share16[BYTE_XOR_LE(offset<<1)]);
	822	if (PGMARM7LOGERROR)
	823	logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, cpu_get_pc(space->cpu));
	824	COMBINE_DATA(&share16[BYTE_XOR_LE(offset << 1)]);
792	825	}
793	826
794	827	static ADDRESS_MAP_START( kovsh_mem, ADDRESS_SPACE_PROGRAM, 16)
r6740	r6741
799	832
800	833	AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) /* Main Ram */
801	834
802		//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE(&pgm_bg_videoram) /* Backgrounds */
803		//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE(&pgm_tx_videoram) /* Text Layer */
804		//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE(&pgm_rowscrollram)
805		AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE(&pgm_videoram) /* IGS023 VIDEO CHIP */
	835	//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE_MEMBER(pgm_state, bg_videoram) /* Backgrounds */
	836	//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE_MEMBER(pgm_state, tx_videoram) /* Text Layer */
	837	//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE_MEMBER(pgm_state, rowscrollram)
	838	AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE_MEMBER(pgm_state, videoram) /* IGS023 VIDEO CHIP */
806	839	AM_RANGE(0xa00000, 0xa011ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
807		AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE(&pgm_videoregs) /* Video Regs inc. Zoom Table */
	840	AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE_MEMBER(pgm_state, videoregs) /* Video Regs inc. Zoom Table */
808	841
809	842	AM_RANGE(0xc00002, 0xc00003) AM_READWRITE(soundlatch_word_r, m68k_l1_w)
810	843	AM_RANGE(0xc00004, 0xc00005) AM_READWRITE(soundlatch2_word_r, soundlatch2_word_w)
r6740	r6741
823	856	AM_RANGE(0x500000, 0x500005) AM_READWRITE(kovsh_68k_protlatch_r, kovsh_68k_protlatch_w) /* ARM7 Latch */
824	857	ADDRESS_MAP_END
825	858
826		static UINT32 kovsh_counter;
827	859
828	860	static READ32_HANDLER( kovsh_arm7_unk_r )
829	861	{
830		return kovsh_counter++;
	862	pgm_state *state = (pgm_state *)space->machine->driver_data;
	863	return state->kovsh_counter++;
831	864	}
832	865
833	866	static READ32_HANDLER( kovsh_exrom_r )
r6740	r6741
839	872	AM_RANGE(0x00000000, 0x00003fff) AM_ROM
840	873	AM_RANGE(0x08100000, 0x083fffff) AM_READ(kovsh_exrom_r) // unpopulated, returns 0 to keep checksum happy
841	874	AM_RANGE(0x10000000, 0x100003ff) AM_RAM // internal ram for asic
842		AM_RANGE(0x40000000, 0x40000003) AM_READ(kovsh_arm7_protlatch_r) AM_WRITE(kovsh_arm7_protlatch_w)
	875	AM_RANGE(0x40000000, 0x40000003) AM_READWRITE(kovsh_arm7_protlatch_r, kovsh_arm7_protlatch_w)
843	876	AM_RANGE(0x40000008, 0x4000000b) AM_WRITENOP // ?
844	877	AM_RANGE(0x4000000c, 0x4000000f) AM_READ(kovsh_arm7_unk_r)
845		AM_RANGE(0x50800000, 0x5080003f) AM_READWRITE(arm7_shareram_r, arm7_shareram_w) AM_BASE(&arm7_shareram)
	878	AM_RANGE(0x50800000, 0x5080003f) AM_READWRITE(arm7_shareram_r, arm7_shareram_w) AM_BASE_MEMBER(pgm_state, arm7_shareram)
846	879	AM_RANGE(0x50000000, 0x500003ff) AM_RAM // uploads xor table to decrypt 68k rom here
847	880	ADDRESS_MAP_END
848	881
849	882
850	883	//5585G
851		static unsigned char svg_ram_sel;
852	884
853	885	static WRITE32_HANDLER( svg_arm7_ram_sel_w )
854	886	{
855		svg_ram_sel=data&1;
	887	pgm_state *state = (pgm_state *)space->machine->driver_data;
	888	state->svg_ram_sel = data & 1;
856	889	}
857	890
858	891	static READ32_HANDLER( svg_arm7_shareram_r )
859	892	{
860		unsigned char ram_sel=svg_ram_sel&1;
861
862		return svg_shareram[ram_sel][offset];
	893	pgm_state *state = (pgm_state *)space->machine->driver_data;
	894	return state->svg_shareram[state->svg_ram_sel & 1][offset];
863	895	}
864	896
865	897	static WRITE32_HANDLER( svg_arm7_shareram_w )
866	898	{
867		unsigned char ram_sel=svg_ram_sel&1;
868		COMBINE_DATA(&svg_shareram[ram_sel][offset]);
	899	pgm_state *state = (pgm_state *)space->machine->driver_data;
	900	COMBINE_DATA(&state->svg_shareram[state->svg_ram_sel & 1][offset]);
869	901	}
870	902
871	903	static READ16_HANDLER( svg_m68k_ram_r )
872	904	{
873		unsigned char ram_sel=(svg_ram_sel&1)^1;
874		UINT16 *share16 = (UINT16 *)(svg_shareram[ram_sel]);
	905	pgm_state *state = (pgm_state *)space->machine->driver_data;
	906	int ram_sel = (state->svg_ram_sel & 1) ^ 1;
	907	UINT16 *share16 = (UINT16 *)(state->svg_shareram[ram_sel & 1]);
	908
875	909	return share16[BYTE_XOR_LE(offset)];
876	910	}
877	911
878	912	static WRITE16_HANDLER( svg_m68k_ram_w )
879	913	{
880		unsigned char ram_sel=(svg_ram_sel&1)^1;
881		UINT16 *share16 = (UINT16 *)(svg_shareram[ram_sel]);
	914	pgm_state *state = (pgm_state *)space->machine->driver_data;
	915	int ram_sel = (state->svg_ram_sel & 1) ^ 1;
	916	UINT16 *share16 = (UINT16 *)(state->svg_shareram[ram_sel & 1]);
	917
882	918	COMBINE_DATA(&share16[BYTE_XOR_LE(offset)]);
883	919	}
884	920
r6740	r6741
889	925
890	926	static WRITE16_HANDLER( svg_68k_nmi_w )
891	927	{
892		generic_pulse_irq_line(cputag_get_cpu(space->machine, "prot"), ARM7_FIRQ_LINE);
	928	pgm_state *state = (pgm_state *)space->machine->driver_data;
	929	generic_pulse_irq_line(state->prot, ARM7_FIRQ_LINE);
893	930	cpuexec_boost_interleave(space->machine, attotime_zero, ATTOTIME_IN_USEC(200));
894		cpu_spinuntil_time(space->cpu, cputag_clocks_to_attotime(space->machine, "prot", 200)); // give the arm time to respond (just boosting the interleave doesn't help)
	931	cpu_spinuntil_time(space->cpu, cpu_clocks_to_attotime(state->prot, 200)); // give the arm time to respond (just boosting the interleave doesn't help)
895	932	}
896	933
897	934	static WRITE16_HANDLER( svg_latch_68k_w )
898	935	{
899		if (PGMARM7LOGERROR) logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(space->cpu) );
900		COMBINE_DATA(&kov2_latchdata_68k_w);
	936	pgm_state *state = (pgm_state *)space->machine->driver_data;
	937	if (PGMARM7LOGERROR)
	938	logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(space->cpu));
	939	COMBINE_DATA(&state->kov2_latchdata_68k_w);
901	940	}
902	941
903	942	static ADDRESS_MAP_START( svg_68k_mem, ADDRESS_SPACE_PROGRAM, 16)
r6740	r6741
908	947
909	948	AM_RANGE(0x800000, 0x81ffff) AM_RAM AM_MIRROR(0x0e0000) AM_BASE(&pgm_mainram) /* Main Ram */
910	949
911		//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE(&pgm_bg_videoram) /* Backgrounds */
912		//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE(&pgm_tx_videoram) /* Text Layer */
913		//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE(&pgm_rowscrollram)
914		AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE(&pgm_videoram) /* IGS023 VIDEO CHIP */
	950	//  AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(pgm_bg_videoram_w) AM_BASE_MEMBER(pgm_state, bg_videoram) /* Backgrounds */
	951	//  AM_RANGE(0x904000, 0x905fff) AM_RAM_WRITE(pgm_tx_videoram_w) AM_BASE_MEMBER(pgm_state, tx_videoram) /* Text Layer */
	952	//  AM_RANGE(0x907000, 0x9077ff) AM_RAM AM_BASE_MEMBER(pgm_state, rowscrollram)
	953	AM_RANGE(0x900000, 0x907fff) AM_MIRROR(0x0f8000) AM_RAM_WRITE(pgm_videoram_w) AM_BASE_MEMBER(pgm_state, videoram) /* IGS023 VIDEO CHIP */
915	954	AM_RANGE(0xa00000, 0xa011ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
916		AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE(&pgm_videoregs) /* Video Regs inc. Zoom Table */
	955	AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE_MEMBER(pgm_state, videoregs) /* Video Regs inc. Zoom Table */
917	956
918	957	AM_RANGE(0xc00002, 0xc00003) AM_READWRITE(soundlatch_word_r, m68k_l1_w)
919	958	AM_RANGE(0xc00004, 0xc00005) AM_READWRITE(soundlatch2_word_r, soundlatch2_word_w)
r6740	r6741
1265	1304	is the source? maybe the protection device? */
1266	1305	static INTERRUPT_GEN( drgw_interrupt )
1267	1306	{
1268		if( cpu_getiloops(device) == 0 )
	1307	if (cpu_getiloops(device) == 0)
1269	1308	cpu_set_input_line(device, 6, HOLD_LINE);
1270	1309	else
1271	1310	cpu_set_input_line(device, 4, HOLD_LINE);
1272	1311	}
1273	1312
1274		static MACHINE_RESET ( pgm )
	1313	static MACHINE_START( pgm )
1275	1314	{
	1315	pgm_state *state = (pgm_state *)machine->driver_data;
	1316
	1317	mame_get_base_datetime(machine, &state->systime);
	1318
	1319	state->soundcpu = devtag_get_device(machine, "soundcpu");
	1320	state->prot = devtag_get_device(machine, "prot");
	1321	state->ics = devtag_get_device(machine, "ics");
	1322
	1323	state_save_register_global(machine, state->cal_val);
	1324	state_save_register_global(machine, state->cal_mask);
	1325	state_save_register_global(machine, state->cal_com);
	1326	state_save_register_global(machine, state->cal_cnt);
	1327	}
	1328
	1329	static MACHINE_RESET( pgm )
	1330	{
	1331	pgm_state *state = (pgm_state *)machine->driver_data;
	1332
1276	1333	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_HALT, ASSERT_LINE);
	1334
	1335	state->cal_val = 0;
	1336	state->cal_mask = 0;
	1337	state->cal_com = 0;
	1338	state->cal_cnt = 0;
1277	1339	}
1278	1340
1279	1341	static MACHINE_DRIVER_START( pgm )
1280	1342
	1343	/* driver data */
	1344	MDRV_DRIVER_DATA(pgm_state)
	1345
1281	1346	/* basic machine hardware */
1282	1347	MDRV_CPU_ADD("maincpu", M68000, 20000000) /* 20 mhz! verified on real board */
1283	1348	MDRV_CPU_PROGRAM_MAP(pgm_mem)
r6740	r6741
1287	1352	MDRV_CPU_PROGRAM_MAP(z80_mem)
1288	1353	MDRV_CPU_IO_MAP(z80_io)
1289	1354
1290		MDRV_SPEAKER_STANDARD_MONO("mono")
1291		MDRV_SOUND_ADD("ics", ICS2115, 0)
1292		MDRV_SOUND_CONFIG(pgm_ics2115_interface)
1293		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 5.0)
	1355	MDRV_MACHINE_START( pgm )
	1356	MDRV_MACHINE_RESET( pgm )
	1357	MDRV_NVRAM_HANDLER( pgm )
1294	1358
1295	1359	/* video hardware */
1296	1360	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
1302	1366
1303	1367	MDRV_GFXDECODE(pgm)
1304	1368	MDRV_PALETTE_LENGTH(0x1200/2)
1305		MDRV_MACHINE_RESET ( pgm )
1306		MDRV_NVRAM_HANDLER ( pgm )
1307	1369
1308	1370	MDRV_VIDEO_START(pgm)
1309	1371	MDRV_VIDEO_EOF(pgm)
1310	1372	MDRV_VIDEO_UPDATE(pgm)
	1373
	1374	/*sound hardware */
	1375	MDRV_SPEAKER_STANDARD_MONO("mono")
	1376	MDRV_SOUND_ADD("ics", ICS2115, 0)
	1377	MDRV_SOUND_CONFIG(pgm_ics2115_interface)
	1378	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 5.0)
1311	1379	MACHINE_DRIVER_END
1312	1380
1313	1381	static MACHINE_DRIVER_START( drgw2 )
r6740	r6741
1388	1456	#endif
1389	1457
1390	1458
1391		/*** Init Stuff **************************************************************/
1392
1393		/* This function expands the 32x32 5-bit data into a format which is easier to
1394		decode in MAME */
1395
1396		static void expand_32x32x5bpp(running_machine *machine)
1397		{
1398		UINT8 *src    = memory_region       ( machine, "gfx1" );
1399		UINT8 *dst    = memory_region       ( machine, "gfx2" );
1400		size_t  srcsize = memory_region_length( machine, "gfx1" );
1401		int cnt, pix;
1402
1403		for (cnt = 0; cnt < srcsize/5 ; cnt ++)
1404		{
1405		pix =  ((src[0+5*cnt] >> 0)& 0x1f );                       dst[0+8*cnt]=pix;
1406		pix =  ((src[0+5*cnt] >> 5)& 0x07) | ((src[1+5*cnt] << 3) & 0x18);dst[1+8*cnt]=pix;
1407		pix =  ((src[1+5*cnt] >> 2)& 0x1f );                        dst[2+8*cnt]=pix;
1408		pix =  ((src[1+5*cnt] >> 7)& 0x01) | ((src[2+5*cnt] << 1) & 0x1e);dst[3+8*cnt]=pix;
1409		pix =  ((src[2+5*cnt] >> 4)& 0x0f) | ((src[3+5*cnt] << 4) & 0x10);dst[4+8*cnt]=pix;
1410		pix =  ((src[3+5*cnt] >> 1)& 0x1f );                       dst[5+8*cnt]=pix;
1411		pix =  ((src[3+5*cnt] >> 6)& 0x03) | ((src[4+5*cnt] << 2) & 0x1c);dst[6+8*cnt]=pix;
1412		pix =  ((src[4+5*cnt] >> 3)& 0x1f );                       dst[7+8*cnt]=pix;
1413		}
1414		}
1415
1416		/* This function expands the sprite colour data (in the A Roms) from 3 pixels
1417		in each word to a byte per pixel making it easier to use */
1418
1419		UINT8 *pgm_sprite_a_region;
1420		size_t   pgm_sprite_a_region_allocate;
1421
1422		static void expand_colourdata(running_machine *machine)
1423		{
1424		UINT8 *src    = memory_region       ( machine, "gfx3" );
1425		size_t  srcsize = memory_region_length( machine, "gfx3" );
1426		int cnt;
1427		size_t   needed = srcsize / 2 * 3;
1428
1429		/* work out how much ram we need to allocate to expand the sprites into
1430		and be able to mask the offset */
1431		pgm_sprite_a_region_allocate = 1;
1432		while (pgm_sprite_a_region_allocate < needed)
1433		pgm_sprite_a_region_allocate = pgm_sprite_a_region_allocate <<1;
1434
1435		pgm_sprite_a_region = auto_alloc_array(machine, UINT8, pgm_sprite_a_region_allocate);
1436
1437
1438		for (cnt = 0 ; cnt < srcsize/2 ; cnt++)
1439		{
1440		UINT16 colpack;
1441
1442		colpack = ((src[cnt*2]) | (src[cnt*2+1] << 8));
1443		pgm_sprite_a_region[cnt*3+0] = (colpack >> 0 ) & 0x1f;
1444		pgm_sprite_a_region[cnt*3+1] = (colpack >> 5 ) & 0x1f;
1445		pgm_sprite_a_region[cnt*3+2] = (colpack >> 10) & 0x1f;
1446		}
1447		}
1448
1449		static void pgm_basic_init(running_machine *machine)
1450		{
1451		UINT8 *ROM = memory_region(machine, "maincpu");
1452		memory_set_bankptr(machine, "bank1",&ROM[0x100000]);
1453
1454		expand_32x32x5bpp(machine);
1455		expand_colourdata(machine);
1456
1457		pgm_bg_videoram = &pgm_videoram[0];
1458		pgm_tx_videoram = &pgm_videoram[0x4000/2];
1459		pgm_rowscrollram = &pgm_videoram[0x7000/2];
1460		kovsh_counter = 1;
1461		}
1462
1463		static DRIVER_INIT( pgm )
1464		{
1465		pgm_basic_init(machine);
1466		}
1467
1468		/* Oriental Legend INIT */
1469
1470		static DRIVER_INIT( orlegend )
1471		{
1472		pgm_basic_init(machine);
1473
1474		memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC0400e, 0xC0400f, 0, 0, pgm_asic3_r, pgm_asic3_w);
1475		memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC04000, 0xC04001, 0, 0, pgm_asic3_reg_w);
1476		}
1477
1478		static void drgwld2_common_init(running_machine *machine)
1479		{
1480		pgm_basic_init(machine);
1481		pgm_dw2_decrypt(machine);
1482		/*
1483		Info from Elsemi
1484		Here is how to "bypass" the dw2 hang protection, it fixes the mode
1485		select and after failing in the 2nd stage (probably there are other checks
1486		out there).
1487		*/
1488		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd80000, 0xd80003, 0, 0, dw2_d80000_r);
1489		}
1490
1491		static DRIVER_INIT( drgw2 )
1492		{   /* incomplete? */
1493		UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
1494		drgwld2_common_init(machine);
1495		/* These ROM patches are not hacks, the protection device
1496		overlays the normal ROM code, this has been confirmed on a real PCB
1497		although some addresses may be missing */
1498		mem16[0x131098/2]=0x4e93;
1499		mem16[0x13113e/2]=0x4e93;
1500		mem16[0x1311ce/2]=0x4e93;
1501		}
1502
1503		static DRIVER_INIT( drgw2c )
1504		{
1505		UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
1506		drgwld2_common_init(machine);
1507		/* These ROM patches are not hacks, the protection device
1508		overlays the normal ROM code, this has been confirmed on a real PCB
1509		although some addresses may be missing */
1510		mem16[0x1303bc/2]=0x4e93;
1511		mem16[0x130462/2]=0x4e93;
1512		mem16[0x1304F2/2]=0x4e93;
1513		}
1514
1515		static DRIVER_INIT( drgw2j )
1516		{
1517		UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
1518		drgwld2_common_init(machine);
1519		/* These ROM patches are not hacks, the protection device
1520		overlays the normal ROM code, this has been confirmed on a real PCB
1521		although some addresses may be missing */
1522		mem16[0x1302C0/2]=0x4e93;
1523		mem16[0x130366/2]=0x4e93;
1524		mem16[0x1303F6/2]=0x4e93;
1525		}
1526
1527		static DRIVER_INIT( kov )
1528		{
1529		pgm_basic_init(machine);
1530		pgm_kov_decrypt(machine);
1531		}
1532
1533		static DRIVER_INIT( pstar )
1534		{
1535		pgm_basic_init(machine);
1536		pgm_pstar_decrypt(machine);
1537		}
1538
1539		static DRIVER_INIT( djlzz )
1540		{
1541		pgm_basic_init(machine);
1542		pgm_djlzz_decrypt(machine);
1543		}
1544
1545		static DRIVER_INIT( kovsh )
1546		{
1547		pgm_basic_init(machine);
1548		pgm_kovsh_decrypt(machine);
1549		}
1550
1551		static DRIVER_INIT( kovshp )
1552		{
1553		pgm_basic_init(machine);
1554		pgm_kovshp_decrypt(machine);
1555		}
1556
1557		static DRIVER_INIT( oldsplus )
1558		{
1559		pgm_basic_init(machine);
1560		pgm_oldsplus_decrypt(machine);
1561		}
1562
1563		static DRIVER_INIT( kov2 )
1564		{
1565		pgm_basic_init(machine);
1566		pgm_kov2_decrypt(machine);
1567		}
1568
1569		static DRIVER_INIT( kov2p )
1570		{
1571		pgm_basic_init(machine);
1572		pgm_kov2p_decrypt(machine);
1573		}
1574
1575		static DRIVER_INIT( martmast )
1576		{
1577		pgm_basic_init(machine);
1578		pgm_mm_decrypt(machine);
1579		}
1580
1581		static DRIVER_INIT( ddp2 )
1582		{
1583		pgm_basic_init(machine);
1584		pgm_ddp2_decrypt(machine);
1585		}
1586
1587		static void svg_basic_init(running_machine *machine)
1588		{
1589		pgm_basic_init(machine);
1590		svg_shareram[0]=auto_alloc_array(machine, UINT32, 0x10000/4);
1591		svg_shareram[1]=auto_alloc_array(machine, UINT32, 0x10000/4);
1592		svg_ram_sel=0;
1593		}
1594
1595		static DRIVER_INIT( theglad )
1596		{
1597		svg_basic_init(machine);
1598		pgm_theglad_decrypt(machine);
1599		}
1600
1601		static DRIVER_INIT( svg )
1602		{
1603		svg_basic_init(machine);
1604		pgm_svg_decrypt(machine);
1605		}
1606
1607		static DRIVER_INIT( killbldp )
1608		{
1609		svg_basic_init(machine);
1610		pgm_killbldp_decrypt(machine);
1611		}
1612
1613		static DRIVER_INIT( dmnfrnt )
1614		{
1615		svg_basic_init(machine);
1616		pgm_dfront_decrypt(machine);
1617		}
1618
1619		static DRIVER_INIT( dw3 )
1620		{
1621		pgm_basic_init(machine);
1622
1623		//  memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xda0000, 0xdaffff, 0, 0, dw3_prot_r, dw3_prot_w);
1624
1625		pgm_dw3_decrypt(machine);
1626		}
1627
1628		/* Killing Blade uses some kind of DMA protection device which can copy data from a data rom.  The
1629		MCU appears to have an internal ROM as if you remove the data ROM then the shared ram is filled
1630		with a constant value.
1631
1632		The device can perform various decryption operations on the data it copies.  for now we're just
1633		using a dump of the shared RAM instead.  This will be improved later.
1634		*/
1635
1636		static int kb_cmd;
1637		static int reg;
1638		static int ptr=0;
1639
1640		static WRITE16_HANDLER( killbld_prot_w )
1641		{
1642		//  mame_printf_debug("killbrd prot r\n");
1643		//  return 0;
1644		offset&=0xf;
1645
1646		if(offset==0)
1647		kb_cmd=data;
1648		else //offset==2
1649		{
1650		logerror("%06X: ASIC25 W CMD %X  VAL %X",cpu_get_pc(space->cpu),kb_cmd,data);
1651		if(kb_cmd==0)
1652		reg=data;
1653		else if(kb_cmd==2)
1654		{
1655
1656		if(data==1)   //Execute cmd
1657		{
1658		UINT16 cmd=killbld_sharedprotram[0x200/2];
1659		//mame_printf_debug("command %04x\n",cmd);
1660		if(cmd==0x6d)   //Store values to asic ram
1661		{
1662		UINT32 p1=(killbld_sharedprotram[0x298/2] << 16) | killbld_sharedprotram[0x29a/2];
1663		UINT32 p2=(killbld_sharedprotram[0x29c/2] << 16) | killbld_sharedprotram[0x29e/2];
1664		static UINT32 Regs[0x10];
1665		if((p2&0xFFFF)==0x9)   //Set value
1666		{
1667		int reg=(p2>>16)&0xFFFF;
1668		if(reg&0x200)
1669		Regs[reg&0xFF]=p1;
1670		}
1671		if((p2&0xFFFF)==0x6)   //Add value
1672		{
1673		int src1=(p1>>16)&0xFF;
1674		int src2=(p1>>0)&0xFF;
1675		int dst=(p2>>16)&0xFF;
1676		Regs[dst]=Regs[src2]-Regs[src1];
1677		}
1678		if((p2&0xFFFF)==0x1)   //Add Imm?
1679		{
1680		int reg=(p2>>16)&0xFF;
1681		int imm=(p1>>0)&0xFFFF;
1682		Regs[reg]+=imm;
1683		}
1684		if((p2&0xFFFF)==0xa)   //Get value
1685		{
1686		int reg=(p1>>16)&0xFF;
1687		killbld_sharedprotram[0x29c/2] = (Regs[reg]>>16)&0xffff;
1688		killbld_sharedprotram[0x29e/2] = Regs[reg]&0xffff;
1689		}
1690		}
1691		if(cmd==0x4f)   //memcpy with encryption / scrambling
1692		{
1693		UINT16 src=killbld_sharedprotram[0x290/2]>>1; // ?
1694		UINT32 dst=killbld_sharedprotram[0x292/2];
1695		UINT16 size=killbld_sharedprotram[0x294/2];
1696		UINT16 mode=killbld_sharedprotram[0x296/2];
1697
1698
1699		//  int a=1;
1700		//  if(src==0x580)
1701		//      int a=1;
1702		/*
1703		P_SRC =0x300290 (offset from prot rom base)
1704		P_DST =0x300292 (words from 0x300000)
1705		P_SIZE=0x300294 (words)
1706		P_MODE=0x300296
1707
1708		Mode 5 direct
1709		Mode 6 swap nibbles and bytes
1710
1711		1,2,3 unk.
1712		*/
1713
1714		//mame_printf_debug("src %04x dst %04x size %04x mode %04x\n",src,dst,size,mode);
1715
1716		//if (src&1) mame_printf_debug("odd offset\n");
1717
1718		mode &=0xf;  // what are the other bits?
1719
1720		if (mode == 1 || mode == 2 || mode == 3)
1721		{
1722		/* for now, cheat -- the scramble isn't understood, it might
1723		be state based */
1724		int x;
1725		UINT16 *RAMDUMP = (UINT16*)memory_region(space->machine, "user2");
1726		for (x=0;x<size;x++)
1727		{
1728		UINT16 dat;
1729
1730		dat = RAMDUMP[dst+x];
1731		killbld_sharedprotram[dst+x] = dat;
1732		}
1733		}
1734		else if (mode == 5)
1735		{
1736		/* mode 5 seems to be a straight copy */
1737		int x;
1738		UINT16 *RAMDUMP = (UINT16*)memory_region(space->machine, "user2");
1739		UINT16 *PROTROM = (UINT16*)memory_region(space->machine, "user1");
1740		for (x=0;x<size;x++)
1741		{
1742		UINT16 dat;
1743		dat = PROTROM[src+x];
1744
1745		if (RAMDUMP[dst+x] != dat)
1746		mame_printf_debug("Mismatch! %04x %04x\n", RAMDUMP[dst+x], dat);
1747
1748		killbld_sharedprotram[dst+x] = dat;
1749		}
1750		}
1751		else if (mode == 6)
1752		{
1753		/* mode 6 seems to swap bytes and nibbles */
1754		int x;
1755		UINT16 *RAMDUMP = (UINT16*)memory_region(space->machine, "user2");
1756		UINT16 *PROTROM = (UINT16*)memory_region(space->machine, "user1");
1757		for (x=0;x<size;x++)
1758		{
1759		UINT16 dat;
1760		dat = PROTROM[src+x];
1761
1762		dat = ((dat & 0xf000) >> 12)|
1763		((dat & 0x0f00) >> 4)|
1764		((dat & 0x00f0) << 4)|
1765		((dat & 0x000f) << 12);
1766
1767
1768		if (RAMDUMP[dst+x] != dat)
1769		mame_printf_debug("Mismatch! Mode 6 %04x %04x\n", RAMDUMP[dst+x], dat);
1770
1771		killbld_sharedprotram[dst+x] = dat;
1772		}
1773		}
1774		else
1775		{
1776		mame_printf_debug("unknown copy mode!\n");
1777		}
1778		/* hack.. it jumps here but there isn't valid code even when we do
1779		use what was in ram.. probably some more protection as the game
1780		still doesn't behave 100% correctly :-/
1781
1782		the code is copied in 'mode 3' but even the code put here on
1783		the real ram dump is corrupt??? something _very_ strange is
1784		going on.. maybe more rom overlays, or ram overlays too??
1785
1786		*/
1787		killbld_sharedprotram[0x2600/2]=0x4e75;
1788
1789
1790		}
1791		reg++;
1792		}
1793		}
1794		else if(kb_cmd==4)
1795		ptr=data;
1796		else if(kb_cmd==0x20)
1797		ptr++;
1798		}
1799		}
1800
1801		static READ16_HANDLER( killbld_prot_r )
1802		{
1803		//  mame_printf_debug("killbld prot w\n");
1804		UINT16 res ;
1805
1806		offset&=0xf;
1807		res=0;
1808
1809		if(offset==1)
1810		{
1811		if(kb_cmd==1)
1812		{
1813		res=reg&0x7f;
1814		}
1815		else if(kb_cmd==5)
1816		{
1817		UINT32 protvalue;
1818		protvalue = 0x89911400|input_port_read(space->machine, "Region");
1819		res=(protvalue>>(8*(ptr-1)))&0xff;
1820		}
1821		}
1822		logerror("%06X: ASIC25 R CMD %X  VAL %X",cpu_get_pc(space->cpu),kb_cmd,res);
1823		return res;
1824		}
1825
1826		static MACHINE_RESET( killbld )
1827		{
1828		int i;
1829
1830		MACHINE_RESET_CALL(pgm);
1831
1832		/* fill the protection ram with a5 */
1833		for (i = 0;i < 0x4000/2;i++)
1834		killbld_sharedprotram[i] = 0xa5a5;
1835		}
1836
1837
1838		static DRIVER_INIT( killbld )
1839		{
1840		UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
1841
1842		pgm_basic_init(machine);
1843		pgm_killbld_decrypt(machine);
1844
1845		/* this isn't a hack.. doing a rom dump while the game is running shows the
1846		rom space to look like this.. there may be more overlays / enables tho */
1847
1848		/* the game actually performs a CRC check of the rom during the 'Please Wait'
1849		screen, the checksum expected is that of the patched rom.  if the checksum
1850		fails the please wait screen doesn't last as long and the region supplied
1851		by the protection device is ignored and the attract sequence appears out
1852		of order */
1853		mem16[0x108a2c/2]=0xB6AA;
1854		mem16[0x108a30/2]=0x6610;
1855		mem16[0x108a32/2]=0x13c2;
1856		mem16[0x108a34/2]=0x0080;
1857		mem16[0x108a36/2]=0x9c76;
1858		mem16[0x108a38/2]=0x23c3;
1859		mem16[0x108a3a/2]=0x0080;
1860		mem16[0x108a3c/2]=0x9c78;
1861		mem16[0x108a3e/2]=0x1002;
1862		mem16[0x108a40/2]=0x6054;
1863		mem16[0x108a42/2]=0x5202;
1864		mem16[0x108a44/2]=0x0c02;
1865
1866		memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd40000, 0xd40003, 0, 0, killbld_prot_r, killbld_prot_w);
1867		}
1868
1869		static DRIVER_INIT( puzzli2 )
1870		{
1871		/* this protection emulation is wrong
1872		it uses an arm with no external rom
1873		an acts in a similar way to kov etc. */
1874
1875		UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
1876
1877		pgm_basic_init(machine);
1878
1879		memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x500000, 0x500003, 0, 0, ASIC28_r16, ASIC28_w16);
1880
1881		/* 0x4f0000 - ? is actually ram shared with the protection device,
1882		the protection device provides the region code */
1883		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4f0000, 0x4fffff, 0, 0, sango_protram_r);
1884
1885		pgm_puzzli2_decrypt(machine);
1886
1887		/* protection related? */
1888		mem16[0x1548ec/2]=0x4e71;
1889		mem16[0x1548fc/2]=0x4e71;
1890		mem16[0x1549FA/2]=0x4e71;
1891		mem16[0x154A0A/2]=0x4e71;
1892		mem16[0x15496A/2]=0x4e71;
1893		mem16[0x14cee0/2]=0x4e71;
1894		mem16[0x1268c0/2]=0x4e71;
1895		mem16[0x1268c2/2]=0x4e71;
1896		mem16[0x1268c4/2]=0x4e71;
1897		mem16[0x154948/2]=0x4e71;
1898		mem16[0x13877a/2]=0x662c;
1899
1900		/* patch irq4 vector (irq4 should be disabled on this game? how?) */
1901		//  mem16[0x100070/2]=0x0012;
1902		//  mem16[0x100072/2]=0x5D78;
1903		}
1904
1905		static UINT16 olds_bs,olds_cmd3;
1906
1907		static UINT32 olds_prot_addr( UINT16 addr)
1908		{
1909		UINT32 mode = addr&0xff;
1910		UINT32 offset = addr >> 8;
1911		UINT32 realaddr;
1912
1913		switch(mode)
1914		{
1915		case 0:
1916		case 5:
1917		case 0xA:
1918		realaddr= 0x402A00+(offset<<2);
1919		break;
1920
1921		case 2:
1922		case 8:
1923		realaddr= 0x402E00+(offset<<2);
1924		break;
1925
1926		case 1:
1927		realaddr= 0x40307E;
1928		break;
1929
1930		case 3:
1931		realaddr= 0x403090;
1932		break;
1933
1934		case 4:
1935		realaddr= 0x40309A;
1936		break;
1937
1938		case 6:
1939		realaddr= 0x4030A4;
1940		break;
1941
1942		case 7:
1943		realaddr= 0x403000;
1944		break;
1945
1946		case 9:
1947		realaddr= 0x40306E;
1948		break;
1949
1950		default:
1951		realaddr= 0;
1952		}
1953		return realaddr;
1954		}
1955
1956		static UINT32 olds_read_reg( UINT16 addr)
1957		{
1958		UINT32 protaddr = (olds_prot_addr(addr)-0x400000)/2;
1959		return olds_sharedprotram[protaddr]<<16|olds_sharedprotram[protaddr+1];
1960		}
1961
1962		static void olds_write_reg( UINT16 addr, UINT32 val)
1963		{
1964		olds_sharedprotram[(olds_prot_addr(addr)-0x400000)/2]=val>>16;
1965		olds_sharedprotram[(olds_prot_addr(addr)-0x400000)/2+1]=val&0xffff;
1966		}
1967
1968		static MACHINE_RESET( olds )
1969		{
1970		UINT16 *mem16 = (UINT16 *)memory_region(machine, "user2");
1971		int i;
1972
1973		MACHINE_RESET_CALL(pgm);
1974
1975		/* populate shared protection ram with data read from pcb .. */
1976
1977		for(i=0;i<0x4000/2;i++)
1978		{
1979		olds_sharedprotram[i] = mem16[i];
1980		}
1981
1982		//ROM:004008B4                 .word 0xFBA5
1983		for(i=0;i<0x4000/2;i++)
1984		{
1985		if(olds_sharedprotram[i]==(0xffff-i))
1986		olds_sharedprotram[i]=0x4e75;
1987		}
1988		}
1989
1990		static READ16_HANDLER( olds_r16 )
1991		{
1992		UINT16 res ;
1993		res = 0;
1994
1995		if(offset == 1)
1996		{
1997		if(kb_cmd == 1)
1998		res = reg&0x7f;
1999		if(kb_cmd == 2)
2000		res = olds_bs|0x80;
2001		if(kb_cmd == 3)
2002		res = olds_cmd3;
2003		else if(kb_cmd == 5)
2004		{
2005		UINT32 protvalue = 0x900000 | input_port_read(space->machine, "Region"); // region from protection device.
2006		res = (protvalue>>(8 * (ptr-1))) & 0xff; // includes region 1 = taiwan , 2 = china, 3 = japan (title = orlegend special), 4 = korea, 5 = hongkong, 6 = world
2007
2008		}
2009		}
2010		logerror("%06X: ASIC25 R CMD %X  VAL %X\n",cpu_get_pc(space->cpu),kb_cmd,res);
2011		return res;
2012		}
2013
2014		static WRITE16_HANDLER( olds_w16 )
2015		{
2016		if(offset==0)
2017		kb_cmd=data;
2018		else //offset==2
2019		{
2020		logerror("%06X: ASIC25 W CMD %X  VAL %X\n",cpu_get_pc(space->cpu),kb_cmd,data);
2021		if(kb_cmd==0)
2022		reg=data;
2023		else if(kb_cmd==2)   //a bitswap=
2024		{
2025		int reg=0;
2026		if(data&0x01)
2027		reg|=0x40;
2028		if(data&0x02)
2029		reg|=0x80;
2030		if(data&0x04)
2031		reg|=0x20;
2032		if(data&0x08)
2033		reg|=0x10;
2034		olds_bs=reg;
2035		}
2036		else if(kb_cmd==3)
2037		{
2038		UINT16 cmd=olds_sharedprotram[0x3026/2];
2039		switch(cmd)
2040		{
2041		case 0x11:
2042		case 0x12:
2043		break;
2044		case 0x64:
2045		{
2046		UINT16 cmd0 = olds_sharedprotram[0x3082/2];
2047		UINT16 val0 = olds_sharedprotram[0x3050/2];   //CMD_FORMAT
2048		{
2049		if((cmd0&0xff)==0x2)
2050		olds_write_reg(val0,olds_read_reg(val0)+0x10000);
2051		}
2052		break;
2053		}
2054
2055		default:
2056		break;
2057		}
2058		olds_cmd3=((data>>4)+1)&0x3;
2059		}
2060		else if(kb_cmd==4)
2061		ptr=data;
2062		else if(kb_cmd==0x20)
2063		ptr++;
2064		}
2065		}
2066
2067		static READ16_HANDLER( olds_prot_swap_r16 )
2068		{
2069
2070		if(cpu_get_pc(space->cpu)<0x100000)      //bios
2071		return pgm_mainram[0x178F4/2];
2072		else                  //game
2073		return pgm_mainram[0x178D8/2];
2074
2075		}
2076
2077		static DRIVER_INIT( olds )
2078		{
2079		pgm_basic_init(machine);
2080
2081		memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xdcb400, 0xdcb403, 0, 0, olds_r16, olds_w16);
2082		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8178f4, 0x8178f5, 0, 0, olds_prot_swap_r16);
2083		}
2084
2085	1459	/*** Rom Loading *************************************************************/
2086	1460
2087	1461	/* take note of "gfx2" needed for expanding the 32x32x5bpp data and
r6740	r6741
4137	3511	ROM_LOAD( "w05602b032.bin",  0xc00000, 0x400000, CRC(0685166d) SHA1(64dac49abd2a46d5fb58c678027aa5e23d672dc4) )
4138	3512	ROM_END
4139	3513
	3514	ROM_START( happy6 )
	3515	ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */
	3516	ROM_LOAD16_WORD_SWAP( "pgm_p01s.rom", 0x000000, 0x020000, CRC(e42b166e) SHA1(2a9df9ec746b14b74fae48b1a438da14973702ea) )  // (BIOS)
	3517	ROM_LOAD16_WORD_SWAP( "happy6in1_v100cn.u5",      0x100000, 0x080000, CRC(a25418e8) SHA1(acd7e7b69956cb4ce8e26c6420cb97bb4bf404e7) )
4140	3518
	3519	/* CPU2 = Z80, romless, code uploaded by 68k */
	3520
	3521	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
	3522	// data before 0x188 is read-protected and cannot be read even with a trojan (as with most 2001/2+ IGS titles)
	3523	ROM_LOAD( "happy6_igs027a.bin", 0x000000, 0x04000, NO_DUMP )
	3524
	3525	ROM_REGION( 0x800000, "user1", 0 ) /* Protection Data (encrypted external ARM data) */
	3526	ROM_LOAD( "happy6in1_v101cn.u26", 0x000000, 0x400000, CRC(4a48ca1c) SHA1(3bebc091787903d45cb84c7302046602a903f59c) )
	3527
	3528	ROM_REGION( 0xc00000, "gfx1", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */
	3529	ROM_LOAD( "pgm_t01s.rom",  0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // (BIOS)
	3530	ROM_LOAD( "t01w64m.u29",0x400000, 0x800000, CRC(2d3feb8b) SHA1(9832b1c46b1ee73febf5c5c8913859f4e0581665) )
	3531
	3532	ROM_REGION( 0xc00000/5*8, "gfx2", ROMREGION_ERASEFF ) /* Region for 32x32 BG Tiles */
	3533	/* 32x32 Tile Data is put here for easier Decoding */
	3534
	3535	ROM_REGION( 0x1c00000, "gfx3", 0 ) /* Sprite Colour Data */
	3536	ROM_LOAD( "a01w64m.u5",  0x0000000, 0x0800000, CRC(bbaa3df3) SHA1(a72268d3989e96d571242279922291d0dc72db28) )
	3537	ROM_LOAD( "a02w64m.u6",  0x0800000, 0x0800000, CRC(f8c9cd36) SHA1(d9613a83bcc2364492fa922fde1c4f0d07b3009c) )
	3538
	3539	ROM_REGION( 0x1000000, "gfx4", 0 ) /* Sprite Masks + Colour Indexes */
	3540	ROM_LOAD( "b01w64m.u19",  0x0000000, 0x0800000, CRC(73f5f225) SHA1(507126fa96dcec967bdbc0978d79fbce9d25db37) )
	3541
	3542	ROM_REGION( 0x1000000, "ics", 0 ) /* Samples - (8 bit mono 11025Hz) - */
	3543	ROM_LOAD( "pgm_m01s.rom",    0x000000, 0x200000, CRC(45ae7159) SHA1(d3ed3ff3464557fd0df6b069b2e431528b0ebfa8) ) // (BIOS)
	3544	ROM_LOAD( "w01w64m.u17",  0x400000, 0x800000, CRC(7e23e2be) SHA1(5e920b8e480f00b6666292d4a56039b40af18141) )
	3545	ROM_END
	3546
	3547
	3548
	3549	/*** Init Stuff **************************************************************/
	3550
	3551	/* This function expands the 32x32 5-bit data into a format which is easier to
	3552	decode in MAME */
	3553
	3554	static void expand_32x32x5bpp(running_machine *machine)
	3555	{
	3556	UINT8 *src = memory_region( machine, "gfx1" );
	3557	UINT8 *dst = memory_region( machine, "gfx2" );
	3558	size_t  srcsize = memory_region_length( machine, "gfx1" );
	3559	int cnt, pix;
	3560
	3561	for (cnt = 0; cnt < srcsize/5 ; cnt ++)
	3562	{
	3563	pix = ((src[0 + 5 * cnt] >> 0)& 0x1f );
	3564	dst[0 + 8 * cnt]=pix;
	3565	pix = ((src[0 + 5 * cnt] >> 5)& 0x07) | ((src[1 + 5 * cnt] << 3) & 0x18);
	3566	dst[1 + 8 * cnt]=pix;
	3567	pix = ((src[1 + 5 * cnt] >> 2)& 0x1f );
	3568	dst[2 + 8 * cnt]=pix;
	3569	pix = ((src[1 + 5 * cnt] >> 7)& 0x01) | ((src[2 + 5 * cnt] << 1) & 0x1e);
	3570	dst[3 + 8 * cnt]=pix;
	3571	pix = ((src[2 + 5 * cnt] >> 4)& 0x0f) | ((src[3 + 5 * cnt] << 4) & 0x10);
	3572	dst[4 + 8 * cnt]=pix;
	3573	pix = ((src[3 + 5 * cnt] >> 1)& 0x1f );
	3574	dst[5 + 8 * cnt]=pix;
	3575	pix = ((src[3 + 5 * cnt] >> 6)& 0x03) | ((src[4 + 5 * cnt] << 2) & 0x1c);
	3576	dst[6 + 8 * cnt]=pix;
	3577	pix = ((src[4 + 5 * cnt] >> 3)& 0x1f );
	3578	dst[7 + 8 * cnt]=pix;
	3579	}
	3580	}
	3581
	3582	/* This function expands the sprite colour data (in the A Roms) from 3 pixels
	3583	in each word to a byte per pixel making it easier to use */
	3584
	3585	static void expand_colourdata( running_machine *machine )
	3586	{
	3587	pgm_state *state = (pgm_state *)machine->driver_data;
	3588	UINT8 *src = memory_region( machine, "gfx3" );
	3589	size_t srcsize = memory_region_length( machine, "gfx3" );
	3590	int cnt;
	3591	size_t needed = srcsize / 2 * 3;
	3592
	3593	/* work out how much ram we need to allocate to expand the sprites into
	3594	and be able to mask the offset */
	3595	state->sprite_a_region_size = 1;
	3596	while (state->sprite_a_region_size < needed)
	3597	state->sprite_a_region_size <<= 1;
	3598
	3599	state->sprite_a_region = auto_alloc_array(machine, UINT8, state->sprite_a_region_size);
	3600
	3601	for (cnt = 0 ; cnt < srcsize / 2 ; cnt++)
	3602	{
	3603	UINT16 colpack;
	3604
	3605	colpack = ((src[cnt * 2]) | (src[cnt * 2 + 1] << 8));
	3606	state->sprite_a_region[cnt * 3 + 0] = (colpack >> 0 ) & 0x1f;
	3607	state->sprite_a_region[cnt * 3 + 1] = (colpack >> 5 ) & 0x1f;
	3608	state->sprite_a_region[cnt * 3 + 2] = (colpack >> 10) & 0x1f;
	3609	}
	3610	}
	3611
	3612	static void pgm_basic_init( running_machine *machine )
	3613	{
	3614	pgm_state *state = (pgm_state *)machine->driver_data;
	3615	UINT8 *ROM = memory_region(machine, "maincpu");
	3616	memory_set_bankptr(machine, "bank1", &ROM[0x100000]);
	3617
	3618	expand_32x32x5bpp(machine);
	3619	expand_colourdata(machine);
	3620
	3621	state->bg_videoram = &state->videoram[0];
	3622	state->tx_videoram = &state->videoram[0x4000/2];
	3623	state->rowscrollram = &state->videoram[0x7000/2];
	3624	}
	3625
	3626	static DRIVER_INIT( pgm )
	3627	{
	3628	pgm_basic_init(machine);
	3629	}
	3630
	3631	/* Oriental Legend INIT */
	3632
	3633	static DRIVER_INIT( orlegend )
	3634	{
	3635	pgm_state *state = (pgm_state *)machine->driver_data;
	3636	pgm_basic_init(machine);
	3637
	3638	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC0400e, 0xC0400f, 0, 0, pgm_asic3_r, pgm_asic3_w);
	3639	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC04000, 0xC04001, 0, 0, pgm_asic3_reg_w);
	3640
	3641	state->asic3_reg = 0;
	3642	state->asic3_latch[0] = 0;
	3643	state->asic3_latch[1] = 0;
	3644	state->asic3_latch[2] = 0;
	3645	state->asic3_x = 0;
	3646	state->asic3_y = 0;
	3647	state->asic3_z = 0;
	3648	state->asic3_h1 = 0;
	3649	state->asic3_h2 = 0;
	3650	state->asic3_hold = 0;
	3651
	3652	state_save_register_global(machine, state->asic3_reg);
	3653	state_save_register_global_array(machine, state->asic3_latch);
	3654	state_save_register_global(machine, state->asic3_x);
	3655	state_save_register_global(machine, state->asic3_y);
	3656	state_save_register_global(machine, state->asic3_z);
	3657	state_save_register_global(machine, state->asic3_h1);
	3658	state_save_register_global(machine, state->asic3_h2);
	3659	state_save_register_global(machine, state->asic3_hold);
	3660	}
	3661
	3662	static void drgwld2_common_init(running_machine *machine)
	3663	{
	3664	pgm_basic_init(machine);
	3665	pgm_dw2_decrypt(machine);
	3666	/*
	3667	Info from Elsemi
	3668	Here is how to "bypass" the dw2 hang protection, it fixes the mode
	3669	select and after failing in the 2nd stage (probably there are other checks
	3670	out there).
	3671	*/
	3672	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd80000, 0xd80003, 0, 0, dw2_d80000_r);
	3673	}
	3674
	3675	static DRIVER_INIT( drgw2 )
	3676	{   /* incomplete? */
	3677	UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
	3678	drgwld2_common_init(machine);
	3679	/* These ROM patches are not hacks, the protection device
	3680	overlays the normal ROM code, this has been confirmed on a real PCB
	3681	although some addresses may be missing */
	3682	mem16[0x131098 / 2] = 0x4e93;
	3683	mem16[0x13113e / 2] = 0x4e93;
	3684	mem16[0x1311ce / 2] = 0x4e93;
	3685	}
	3686
	3687	static DRIVER_INIT( drgw2c )
	3688	{
	3689	UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
	3690	drgwld2_common_init(machine);
	3691	/* These ROM patches are not hacks, the protection device
	3692	overlays the normal ROM code, this has been confirmed on a real PCB
	3693	although some addresses may be missing */
	3694	mem16[0x1303bc / 2] = 0x4e93;
	3695	mem16[0x130462 / 2] = 0x4e93;
	3696	mem16[0x1304f2 / 2] = 0x4e93;
	3697	}
	3698
	3699	static DRIVER_INIT( drgw2j )
	3700	{
	3701	UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
	3702	drgwld2_common_init(machine);
	3703	/* These ROM patches are not hacks, the protection device
	3704	overlays the normal ROM code, this has been confirmed on a real PCB
	3705	although some addresses may be missing */
	3706	mem16[0x1302c0 / 2] = 0x4e93;
	3707	mem16[0x130366 / 2] = 0x4e93;
	3708	mem16[0x1303f6 / 2] = 0x4e93;
	3709	}
	3710
	3711	static void kovsh_latch_init( running_machine *machine )
	3712	{
	3713	pgm_state *state = (pgm_state *)machine->driver_data;
	3714
	3715	state->kovsh_highlatch_arm_w = 0;
	3716	state->kovsh_lowlatch_arm_w = 0;
	3717	state->kovsh_highlatch_68k_w = 0;
	3718	state->kovsh_lowlatch_68k_w = 0;
	3719	state->kovsh_counter = 1;
	3720
	3721	state_save_register_global(machine, state->kovsh_highlatch_arm_w);
	3722	state_save_register_global(machine, state->kovsh_lowlatch_arm_w);
	3723	state_save_register_global(machine, state->kovsh_highlatch_68k_w);
	3724	state_save_register_global(machine, state->kovsh_lowlatch_68k_w);
	3725	state_save_register_global(machine, state->kovsh_counter);
	3726	}
	3727
	3728	static DRIVER_INIT( kov )
	3729	{
	3730	pgm_basic_init(machine);
	3731	pgm_kov_decrypt(machine);
	3732	kovsh_latch_init(machine);
	3733	}
	3734
	3735	static DRIVER_INIT( pstar )
	3736	{
	3737	pgm_state *state = (pgm_state *)machine->driver_data;
	3738
	3739	pgm_basic_init(machine);
	3740	pgm_pstar_decrypt(machine);
	3741	kovsh_latch_init(machine);
	3742
	3743	state->pstars_key = 0;
	3744	state->pstars_int[0] = 0;
	3745	state->pstars_int[1] = 0;
	3746	state->pstars_val = 0;
	3747	state->pstar_e7 = 0;
	3748	state->pstar_b1 = 0;
	3749	state->pstar_ce = 0;
	3750	state->pstar_ram[0] = 0;
	3751	state->pstar_ram[1] = 0;
	3752	state->pstar_ram[2] = 0;
	3753	memset(state->pstars_regs, 0, 16);
	3754
	3755	state_save_register_global(machine, state->pstars_key);
	3756	state_save_register_global_array(machine, state->pstars_int);
	3757	state_save_register_global_array(machine, state->pstars_regs);
	3758	state_save_register_global(machine, state->pstars_val);
	3759	state_save_register_global(machine, state->pstar_e7);
	3760	state_save_register_global(machine, state->pstar_b1);
	3761	state_save_register_global(machine, state->pstar_ce);
	3762	state_save_register_global_array(machine, state->pstar_ram);
	3763	}
	3764
	3765	static DRIVER_INIT( djlzz )
	3766	{
	3767	pgm_basic_init(machine);
	3768	pgm_djlzz_decrypt(machine);
	3769	kovsh_latch_init(machine);
	3770	}
	3771
	3772	static DRIVER_INIT( kovsh )
	3773	{
	3774	pgm_basic_init(machine);
	3775	pgm_kovsh_decrypt(machine);
	3776	kovsh_latch_init(machine);
	3777	}
	3778
	3779	static DRIVER_INIT( kovshp )
	3780	{
	3781	pgm_basic_init(machine);
	3782	pgm_kovshp_decrypt(machine);
	3783	kovsh_latch_init(machine);
	3784	}
	3785
	3786	static DRIVER_INIT( oldsplus )
	3787	{
	3788	pgm_basic_init(machine);
	3789	pgm_oldsplus_decrypt(machine);
	3790	kovsh_latch_init(machine);
	3791	}
	3792
	3793	static void kov2_latch_init( running_machine *machine )
	3794	{
	3795	pgm_state *state = (pgm_state *)machine->driver_data;
	3796
	3797	state->kov2_latchdata_68k_w = 0;
	3798	state->kov2_latchdata_arm_w = 0;
	3799
	3800	state_save_register_global(machine, state->kov2_latchdata_68k_w);
	3801	state_save_register_global(machine, state->kov2_latchdata_arm_w);
	3802	}
	3803
	3804	static DRIVER_INIT( kov2 )
	3805	{
	3806	pgm_basic_init(machine);
	3807	pgm_kov2_decrypt(machine);
	3808	kov2_latch_init(machine);
	3809	}
	3810
	3811	static DRIVER_INIT( kov2p )
	3812	{
	3813	pgm_basic_init(machine);
	3814	pgm_kov2p_decrypt(machine);
	3815	kov2_latch_init(machine);
	3816	}
	3817
	3818	static DRIVER_INIT( martmast )
	3819	{
	3820	pgm_basic_init(machine);
	3821	pgm_mm_decrypt(machine);
	3822	kov2_latch_init(machine);
	3823	}
	3824
	3825	static DRIVER_INIT( ddp2 )
	3826	{
	3827	pgm_basic_init(machine);
	3828	pgm_ddp2_decrypt(machine);
	3829	kov2_latch_init(machine);
	3830	}
	3831
	3832	static void svg_basic_init(running_machine *machine)
	3833	{
	3834	pgm_state *state = (pgm_state *)machine->driver_data;
	3835
	3836	pgm_basic_init(machine);
	3837	state->svg_shareram[0] = auto_alloc_array(machine, UINT32, 0x10000 / 4);
	3838	state->svg_shareram[1] = auto_alloc_array(machine, UINT32, 0x10000 / 4);
	3839	state->svg_ram_sel = 0;
	3840
	3841	state_save_register_global_pointer(machine, state->svg_shareram[0], 0x10000 / 4);
	3842	state_save_register_global_pointer(machine, state->svg_shareram[1], 0x10000 / 4);
	3843	state_save_register_global(machine, state->svg_ram_sel);
	3844	}
	3845
	3846	static DRIVER_INIT( theglad )
	3847	{
	3848	svg_basic_init(machine);
	3849	pgm_theglad_decrypt(machine);
	3850	kov2_latch_init(machine);
	3851	}
	3852
	3853	static DRIVER_INIT( svg )
	3854	{
	3855	svg_basic_init(machine);
	3856	pgm_svg_decrypt(machine);
	3857	kov2_latch_init(machine);
	3858	}
	3859
	3860	static DRIVER_INIT( killbldp )
	3861	{
	3862	svg_basic_init(machine);
	3863	pgm_killbldp_decrypt(machine);
	3864	kov2_latch_init(machine);
	3865	}
	3866
	3867	static DRIVER_INIT( dmnfrnt )
	3868	{
	3869	svg_basic_init(machine);
	3870	pgm_dfront_decrypt(machine);
	3871	kov2_latch_init(machine);
	3872	}
	3873
	3874	static DRIVER_INIT( dw3 )
	3875	{
	3876	pgm_basic_init(machine);
	3877
	3878	//  memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xda0000, 0xdaffff, 0, 0, dw3_prot_r, dw3_prot_w);
	3879
	3880	pgm_dw3_decrypt(machine);
	3881	}
	3882
	3883	/* Killing Blade uses some kind of DMA protection device which can copy data from a data rom.  The
	3884	MCU appears to have an internal ROM as if you remove the data ROM then the shared ram is filled
	3885	with a constant value.
	3886
	3887	The device can perform various decryption operations on the data it copies.  for now we're just
	3888	using a dump of the shared RAM instead.  This will be improved later.
	3889	*/
	3890
	3891
	3892	static WRITE16_HANDLER( killbld_prot_w )
	3893	{
	3894	//  mame_printf_debug("killbrd prot r\n");
	3895	//  return 0;
	3896	pgm_state *state = (pgm_state *)space->machine->driver_data;
	3897	offset &= 0xf;
	3898
	3899	if (offset == 0)
	3900	state->kb_cmd = data;
	3901	else //offset==2
	3902	{
	3903	logerror("%06X: ASIC25 W CMD %X  VAL %X", cpu_get_pc(space->cpu), state->kb_cmd, data);
	3904	if (state->kb_cmd == 0)
	3905	state->kb_reg = data;
	3906	else if (state->kb_cmd == 2)
	3907	{
	3908	if (data == 1)   //Execute cmd
	3909	{
	3910	UINT16 cmd = state->sharedprotram[0x200/2];
	3911	//mame_printf_debug("command %04x\n", cmd);
	3912	if (cmd == 0x6d)   //Store values to asic ram
	3913	{
	3914	UINT32 p1 = (state->sharedprotram[0x298/2] << 16) | state->sharedprotram[0x29a/2];
	3915	UINT32 p2 = (state->sharedprotram[0x29c/2] << 16) | state->sharedprotram[0x29e/2];
	3916
	3917	if ((p2 & 0xffff) == 0x9)   //Set value
	3918	{
	3919	int reg = (p2 >> 16) & 0xffff;
	3920	if (reg & 0x200)
	3921	state->kb_regs[reg & 0xff] = p1;
	3922	}
	3923	if ((p2 & 0xffff) == 0x6)   //Add value
	3924	{
	3925	int src1 = (p1 >> 16) & 0xff;
	3926	int src2 = (p1 >> 0) & 0xff;
	3927	int dst = (p2 >> 16) & 0xff;
	3928	state->kb_regs[dst] = state->kb_regs[src2] - state->kb_regs[src1];
	3929	}
	3930	if ((p2 & 0xffff) == 0x1)   //Add Imm?
	3931	{
	3932	int reg = (p2 >> 16) & 0xff;
	3933	int imm = (p1 >> 0) & 0xffff;
	3934	state->kb_regs[reg] += imm;
	3935	}
	3936	if ((p2 & 0xffff) == 0xa)   //Get value
	3937	{
	3938	int reg = (p1 >> 16) & 0xFF;
	3939	state->sharedprotram[0x29c/2] = (state->kb_regs[reg] >> 16) & 0xffff;
	3940	state->sharedprotram[0x29e/2] = state->kb_regs[reg] & 0xffff;
	3941	}
	3942	}
	3943	if(cmd == 0x4f)   //memcpy with encryption / scrambling
	3944	{
	3945	UINT16 src = state->sharedprotram[0x290 / 2] >> 1; // ?
	3946	UINT32 dst = state->sharedprotram[0x292 / 2];
	3947	UINT16 size = state->sharedprotram[0x294 / 2];
	3948	UINT16 mode = state->sharedprotram[0x296 / 2];
	3949
	3950
	3951	//  int a=1;
	3952	//  if(src==0x580)
	3953	//      int a=1;
	3954	/*
	3955	P_SRC =0x300290 (offset from prot rom base)
	3956	P_DST =0x300292 (words from 0x300000)
	3957	P_SIZE=0x300294 (words)
	3958	P_MODE=0x300296
	3959
	3960	Mode 5 direct
	3961	Mode 6 swap nibbles and bytes
	3962
	3963	1,2,3 unk.
	3964	*/
	3965
	3966	//mame_printf_debug("src %04x dst %04x size %04x mode %04x\n", src, dst, size, mode);
	3967
	3968	//if (src&1) mame_printf_debug("odd offset\n");
	3969
	3970	mode &=0xf;  // what are the other bits?
	3971
	3972	if (mode == 1 || mode == 2 || mode == 3)
	3973	{
	3974	/* for now, cheat -- the scramble isn't understood, it might
	3975	be state based */
	3976	int x;
	3977	UINT16 *RAMDUMP = (UINT16*)memory_region(space->machine, "user2");
	3978	for (x = 0; x < size; x++)
	3979	{
	3980	UINT16 dat;
	3981
	3982	dat = RAMDUMP[dst + x];
	3983	state->sharedprotram[dst + x] = dat;
	3984	}
	3985	}
	3986	else if (mode == 5)
	3987	{
	3988	/* mode 5 seems to be a straight copy */
	3989	int x;
	3990	UINT16 *RAMDUMP = (UINT16*)memory_region(space->machine, "user2");
	3991	UINT16 *PROTROM = (UINT16*)memory_region(space->machine, "user1");
	3992	for (x = 0; x < size; x++)
	3993	{
	3994	UINT16 dat = PROTROM[src + x];
	3995
	3996	if (RAMDUMP[dst + x] != dat)
	3997	mame_printf_debug("Mismatch! %04x %04x\n", RAMDUMP[dst + x], dat);
	3998
	3999	state->sharedprotram[dst + x] = dat;
	4000	}
	4001	}
	4002	else if (mode == 6)
	4003	{
	4004	/* mode 6 seems to swap bytes and nibbles */
	4005	int x;
	4006	UINT16 *RAMDUMP = (UINT16*)memory_region(space->machine, "user2");
	4007	UINT16 *PROTROM = (UINT16*)memory_region(space->machine, "user1");
	4008	for (x = 0; x < size; x++)
	4009	{
	4010	UINT16 dat = PROTROM[src + x];
	4011
	4012	dat = ((dat & 0xf000) >> 12)|
	4013	((dat & 0x0f00) >> 4)|
	4014	((dat & 0x00f0) << 4)|
	4015	((dat & 0x000f) << 12);
	4016
	4017	if (RAMDUMP[dst + x] != dat)
	4018	mame_printf_debug("Mismatch! Mode 6 %04x %04x\n", RAMDUMP[dst + x], dat);
	4019
	4020	state->sharedprotram[dst + x] = dat;
	4021	}
	4022	}
	4023	else
	4024	{
	4025	mame_printf_debug("unknown copy mode!\n");
	4026	}
	4027	/* hack.. it jumps here but there isn't valid code even when we do
	4028	use what was in ram.. probably some more protection as the game
	4029	still doesn't behave 100% correctly :-/
	4030
	4031	the code is copied in 'mode 3' but even the code put here on
	4032	the real ram dump is corrupt??? something _very_ strange is
	4033	going on.. maybe more rom overlays, or ram overlays too??
	4034
	4035	*/
	4036	state->sharedprotram[0x2600 / 2] = 0x4e75;
	4037
	4038
	4039	}
	4040	state->kb_reg++;
	4041	}
	4042	}
	4043	else if (state->kb_cmd == 4)
	4044	state->kb_ptr = data;
	4045	else if (state->kb_cmd == 0x20)
	4046	state->kb_ptr++;
	4047	}
	4048	}
	4049
	4050	static READ16_HANDLER( killbld_prot_r )
	4051	{
	4052	//  mame_printf_debug("killbld prot w\n");
	4053	pgm_state *state = (pgm_state *)space->machine->driver_data;
	4054	UINT16 res ;
	4055
	4056	offset &= 0xf;
	4057	res = 0;
	4058
	4059	if (offset == 1)
	4060	{
	4061	if (state->kb_cmd == 1)
	4062	{
	4063	res = state->kb_reg & 0x7f;
	4064	}
	4065	else if (state->kb_cmd == 5)
	4066	{
	4067	UINT32 protvalue = 0x89911400 | input_port_read(space->machine, "Region");
	4068	res = (protvalue >> (8 * (state->kb_ptr - 1))) & 0xff;
	4069	}
	4070	}
	4071	logerror("%06X: ASIC25 R CMD %X  VAL %X", cpu_get_pc(space->cpu), state->kb_cmd, res);
	4072	return res;
	4073	}
	4074
	4075	static MACHINE_RESET( killbld )
	4076	{
	4077	pgm_state *state = (pgm_state *)machine->driver_data;
	4078	int i;
	4079
	4080	MACHINE_RESET_CALL(pgm);
	4081
	4082	/* fill the protection ram with a5 */
	4083	for (i = 0; i < 0x4000/2; i++)
	4084	state->sharedprotram[i] = 0xa5a5;
	4085	}
	4086
	4087
	4088	static DRIVER_INIT( killbld )
	4089	{
	4090	pgm_state *state = (pgm_state *)machine->driver_data;
	4091	UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
	4092
	4093	pgm_basic_init(machine);
	4094	pgm_killbld_decrypt(machine);
	4095
	4096	/* this isn't a hack.. doing a rom dump while the game is running shows the
	4097	rom space to look like this.. there may be more overlays / enables tho */
	4098
	4099	/* the game actually performs a CRC check of the rom during the 'Please Wait'
	4100	screen, the checksum expected is that of the patched rom.  if the checksum
	4101	fails the please wait screen doesn't last as long and the region supplied
	4102	by the protection device is ignored and the attract sequence appears out
	4103	of order */
	4104	mem16[0x108a2c / 2] = 0xb6aa;
	4105	mem16[0x108a30 / 2] = 0x6610;
	4106	mem16[0x108a32 / 2] = 0x13c2;
	4107	mem16[0x108a34 / 2] = 0x0080;
	4108	mem16[0x108a36 / 2] = 0x9c76;
	4109	mem16[0x108a38 / 2] = 0x23c3;
	4110	mem16[0x108a3a / 2] = 0x0080;
	4111	mem16[0x108a3c / 2] = 0x9c78;
	4112	mem16[0x108a3e / 2] = 0x1002;
	4113	mem16[0x108a40 / 2] = 0x6054;
	4114	mem16[0x108a42 / 2] = 0x5202;
	4115	mem16[0x108a44 / 2] = 0x0c02;
	4116
	4117	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd40000, 0xd40003, 0, 0, killbld_prot_r, killbld_prot_w);
	4118
	4119	state->kb_cmd = 0;
	4120	state->kb_reg = 0;
	4121	state->kb_ptr = 0;
	4122	memset(state->kb_regs, 0, 0x10);
	4123
	4124	state_save_register_global(machine, state->kb_cmd);
	4125	state_save_register_global(machine, state->kb_reg);
	4126	state_save_register_global(machine, state->kb_ptr);
	4127	state_save_register_global_array(machine, state->kb_regs);
	4128	}
	4129
	4130	static DRIVER_INIT( puzzli2 )
	4131	{
	4132	/* this protection emulation is wrong
	4133	it uses an arm with no external rom
	4134	an acts in a similar way to kov etc. */
	4135
	4136	pgm_state *state = (pgm_state *)machine->driver_data;
	4137	UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
	4138
	4139	pgm_basic_init(machine);
	4140	kovsh_latch_init(machine);
	4141
	4142	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x500000, 0x500003, 0, 0, asic28_r, asic28_w);
	4143
	4144	/* 0x4f0000 - ? is actually ram shared with the protection device,
	4145	the protection device provides the region code */
	4146	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4f0000, 0x4fffff, 0, 0, sango_protram_r);
	4147
	4148	pgm_puzzli2_decrypt(machine);
	4149
	4150	/* protection related? */
	4151	mem16[0x1548ec / 2] = 0x4e71;
	4152	mem16[0x1548fc / 2] = 0x4e71;
	4153	mem16[0x1549fa / 2] = 0x4e71;
	4154	mem16[0x154a0a / 2] = 0x4e71;
	4155	mem16[0x15496a / 2] = 0x4e71;
	4156	mem16[0x14cee0 / 2] = 0x4e71;
	4157	mem16[0x1268c0 / 2] = 0x4e71;
	4158	mem16[0x1268c2 / 2] = 0x4e71;
	4159	mem16[0x1268c4 / 2] = 0x4e71;
	4160	mem16[0x154948 / 2] = 0x4e71;
	4161	mem16[0x13877a / 2] = 0x662c;
	4162
	4163	/* patch irq4 vector (irq4 should be disabled on this game? how?) */
	4164	//  mem16[0x100070 / 2] = 0x0012;
	4165	//  mem16[0x100072 / 2] = 0x5d78;
	4166
	4167	state->asic28_key = 0;
	4168	state->asic28_rcnt = 0;
	4169	memset(state->asic28_regs, 0, 10);
	4170	memset(state->asic_params, 0, 256);
	4171	memset(state->eoregs, 0, 16);
	4172
	4173	state_save_register_global(machine, state->asic28_key);
	4174	state_save_register_global(machine, state->asic28_rcnt);
	4175	state_save_register_global_array(machine, state->asic28_regs);
	4176	state_save_register_global_array(machine, state->asic_params);
	4177	state_save_register_global_array(machine, state->eoregs);
	4178	}
	4179
	4180	static UINT32 olds_prot_addr( UINT16 addr )
	4181	{
	4182	UINT32 mode = addr & 0xff;
	4183	UINT32 offset = addr >> 8;
	4184	UINT32 realaddr;
	4185
	4186	switch(mode)
	4187	{
	4188	case 0x0:
	4189	case 0x5:
	4190	case 0xa:
	4191	realaddr = 0x402a00 + (offset << 2);
	4192	break;
	4193
	4194	case 0x2:
	4195	case 0x8:
	4196	realaddr = 0x402e00 + (offset << 2);
	4197	break;
	4198
	4199	case 0x1:
	4200	realaddr = 0x40307e;
	4201	break;
	4202
	4203	case 0x3:
	4204	realaddr = 0x403090;
	4205	break;
	4206
	4207	case 0x4:
	4208	realaddr = 0x40309a;
	4209	break;
	4210
	4211	case 0x6:
	4212	realaddr = 0x4030a4;
	4213	break;
	4214
	4215	case 0x7:
	4216	realaddr = 0x403000;
	4217	break;
	4218
	4219	case 0x9:
	4220	realaddr = 0x40306e;
	4221	break;
	4222
	4223	default:
	4224	realaddr = 0;
	4225	}
	4226	return realaddr;
	4227	}
	4228
	4229	static UINT32 olds_read_reg( running_machine *machine, UINT16 addr )
	4230	{
	4231	pgm_state *state = (pgm_state *)machine->driver_data;
	4232	UINT32 protaddr = (olds_prot_addr(addr) - 0x400000) / 2;
	4233	return state->sharedprotram[protaddr] << 16 | state->sharedprotram[protaddr + 1];
	4234	}
	4235
	4236	static void olds_write_reg( running_machine *machine, UINT16 addr, UINT32 val )
	4237	{
	4238	pgm_state *state = (pgm_state *)machine->driver_data;
	4239	state->sharedprotram[(olds_prot_addr(addr) - 0x400000) / 2]     = val >> 16;
	4240	state->sharedprotram[(olds_prot_addr(addr) - 0x400000) / 2 + 1] = val & 0xffff;
	4241	}
	4242
	4243	static MACHINE_RESET( olds )
	4244	{
	4245	pgm_state *state = (pgm_state *)machine->driver_data;
	4246	UINT16 *mem16 = (UINT16 *)memory_region(machine, "user2");
	4247	int i;
	4248
	4249	MACHINE_RESET_CALL(pgm);
	4250
	4251	/* populate shared protection ram with data read from pcb .. */
	4252	for (i = 0; i < 0x4000 / 2; i++)
	4253	{
	4254	state->sharedprotram[i] = mem16[i];
	4255	}
	4256
	4257	//ROM:004008B4                 .word 0xFBA5
	4258	for(i = 0; i < 0x4000 / 2; i++)
	4259	{
	4260	if (state->sharedprotram[i] == (0xffff - i))
	4261	state->sharedprotram[i] = 0x4e75;
	4262	}
	4263	}
	4264
	4265	static READ16_HANDLER( olds_r )
	4266	{
	4267	pgm_state *state = (pgm_state *)space->machine->driver_data;
	4268	UINT16 res = 0;
	4269
	4270	if (offset == 1)
	4271	{
	4272	if (state->kb_cmd == 1)
	4273	res = state->kb_reg & 0x7f;
	4274	if (state->kb_cmd == 2)
	4275	res = state->olds_bs | 0x80;
	4276	if (state->kb_cmd == 3)
	4277	res = state->olds_cmd3;
	4278	else if (state->kb_cmd == 5)
	4279	{
	4280	UINT32 protvalue = 0x900000 | input_port_read(space->machine, "Region"); // region from protection device.
	4281	res = (protvalue >> (8 * (state->kb_ptr - 1))) & 0xff; // includes region 1 = taiwan , 2 = china, 3 = japan (title = orlegend special), 4 = korea, 5 = hongkong, 6 = world
	4282
	4283	}
	4284	}
	4285	logerror("%06X: ASIC25 R CMD %X  VAL %X\n", cpu_get_pc(space->cpu), state->kb_cmd, res);
	4286	return res;
	4287	}
	4288
	4289	static WRITE16_HANDLER( olds_w )
	4290	{
	4291	pgm_state *state = (pgm_state *)space->machine->driver_data;
	4292	if (offset == 0)
	4293	state->kb_cmd = data;
	4294	else //offset==2
	4295	{
	4296	logerror("%06X: ASIC25 W CMD %X  VAL %X\n",cpu_get_pc(space->cpu), state->kb_cmd, data);
	4297	if (state->kb_cmd == 0)
	4298	state->kb_reg = data;
	4299	else if(state->kb_cmd == 2)   //a bitswap=
	4300	{
	4301	int reg = 0;
	4302	if (data & 0x01)
	4303	reg |= 0x40;
	4304	if (data & 0x02)
	4305	reg |= 0x80;
	4306	if (data & 0x04)
	4307	reg |= 0x20;
	4308	if (data & 0x08)
	4309	reg |= 0x10;
	4310	state->olds_bs = reg;
	4311	}
	4312	else if (state->kb_cmd == 3)
	4313	{
	4314	UINT16 cmd = state->sharedprotram[0x3026 / 2];
	4315	switch (cmd)
	4316	{
	4317	case 0x11:
	4318	case 0x12:
	4319	break;
	4320	case 0x64:
	4321	{
	4322	UINT16 cmd0 = state->sharedprotram[0x3082 / 2];
	4323	UINT16 val0 = state->sharedprotram[0x3050 / 2];   //CMD_FORMAT
	4324	{
	4325	if ((cmd0 & 0xff) == 0x2)
	4326	olds_write_reg(space->machine, val0, olds_read_reg(space->machine, val0) + 0x10000);
	4327	}
	4328	break;
	4329	}
	4330
	4331	default:
	4332	break;
	4333	}
	4334	state->olds_cmd3 = ((data >> 4) + 1) & 0x3;
	4335	}
	4336	else if (state->kb_cmd == 4)
	4337	state->kb_ptr = data;
	4338	else if(state->kb_cmd == 0x20)
	4339	state->kb_ptr++;
	4340	}
	4341	}
	4342
	4343	static READ16_HANDLER( olds_prot_swap_r )
	4344	{
	4345	if (cpu_get_pc(space->cpu) < 0x100000)      //bios
	4346	return pgm_mainram[0x178f4 / 2];
	4347	else                  //game
	4348	return pgm_mainram[0x178d8 / 2];
	4349
	4350	}
	4351
	4352	static DRIVER_INIT( olds )
	4353	{
	4354	pgm_state *state = (pgm_state *)machine->driver_data;
	4355	pgm_basic_init(machine);
	4356
	4357	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xdcb400, 0xdcb403, 0, 0, olds_r, olds_w);
	4358	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8178f4, 0x8178f5, 0, 0, olds_prot_swap_r);
	4359
	4360	state->kb_cmd = 0;
	4361	state->kb_reg = 0;
	4362	state->kb_ptr = 0;
	4363	state->olds_bs = 0;
	4364	state->olds_cmd3 = 0;
	4365
	4366	state_save_register_global(machine, state->kb_cmd);
	4367	state_save_register_global(machine, state->kb_reg);
	4368	state_save_register_global(machine, state->kb_ptr);
	4369	state_save_register_global(machine, state->olds_bs);
	4370	state_save_register_global(machine, state->olds_cmd3);
	4371	}
	4372
4141	4373	/*** GAME ********************************************************************/
4142	4374
4143		GAME( 1997, pgm,      0,          pgm, pgm,      pgm,        ROT0,   "IGS", "PGM (Polygame Master) System BIOS", GAME_IS_BIOS_ROOT )
	4375	GAME( 1997, pgm,          0,         pgm,    pgm,      pgm,        ROT0,   "IGS", "PGM (Polygame Master) System BIOS", GAME_IS_BIOS_ROOT )
4144	4376
4145		GAME( 1997, orlegend, pgm,        pgm, pgm,      orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 126)", GAME_IMPERFECT_SOUND  )
4146		GAME( 1997, orlegende, orlegend,   pgm, pgm,      orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112)", GAME_IMPERFECT_SOUND  )
4147		GAME( 1997, orlegendc, orlegend,   pgm, pgm,      orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112, Chinese Board)", GAME_IMPERFECT_SOUND  )
4148		GAME( 1997, orlegend111c, orlegend,   pgm, pgm,      orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 111, Chinese Board)", GAME_IMPERFECT_SOUND  )
4149		GAME( 1997, orlegend105k, orlegend,   pgm, orld105k, orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 105, Korean Board)", GAME_IMPERFECT_SOUND  )
4150		GAME( 1997, drgw2c,   drgw2,    drgw2, pgm,      drgw2c,     ROT0,   "IGS", "Zhong Guo Long II (ver. 100C, China)", GAME_IMPERFECT_SOUND )
4151		GAME( 1999, photoy2k, pgm,        kov, photoy2k, djlzz,      ROT0,   "IGS", "Photo Y2K (ver. 104)", GAME_IMPERFECT_SOUND ) /* region provided by protection device */
4152		GAME( 1999, raf102j,  photoy2k,   kov, photoy2k, djlzz,      ROT0,   "IGS", "Real and Fake / Photo Y2K (ver. 102, Japanese Board)", GAME_IMPERFECT_SOUND ) /* region provided by protection device */
4153		GAME( 1999, kovsh,    kov,        kov, sango,    kovsh,      ROT0,   "IGS", "Knights of Valour Super Heroes / Sangoku Senki Super Heroes (ver. 104)", GAME_IMPERFECT_SOUND )
4154		GAME( 2000, kov2,     pgm,       kov2, sango,    kov2,       ROT0,   "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 100)", GAME_IMPERFECT_SOUND )
4155		GAME( 2000, kov2106,  kov2,      kov2, sango,    kov2,       ROT0,   "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 106)", GAME_IMPERFECT_SOUND )
4156		GAME( 2001, martmast, pgm,       kov2, sango,    martmast,   ROT0,   "IGS", "Martial Masters (ver. 102)", GAME_IMPERFECT_SOUND )
4157		GAME( 2001, martmastc,martmast,  kov2, sango,    martmast,   ROT0,   "IGS", "Martial Masters (ver. 101, Chinese Board)", GAME_IMPERFECT_SOUND )
	4377	GAME( 1997, orlegend,     pgm,       pgm,     pgm,      orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 126)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4378	GAME( 1997, orlegende,    orlegend,  pgm,     pgm,      orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4379	GAME( 1997, orlegendc,    orlegend,  pgm,     pgm,      orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4380	GAME( 1997, orlegend111c, orlegend,  pgm,     pgm,      orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 111, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4381	GAME( 1997, orlegend105k, orlegend,  pgm,     orld105k, orlegend,   ROT0,   "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 105, Korean Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4382	GAME( 1997, drgw2c,       drgw2,     drgw2,   pgm,      drgw2c,     ROT0,   "IGS", "Zhong Guo Long II (ver. 100C, China)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4383	GAME( 1999, photoy2k,     pgm,       kov,     photoy2k, djlzz,      ROT0,   "IGS", "Photo Y2K (ver. 104)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* region provided by protection device */
	4384	GAME( 1999, raf102j,      photoy2k,  kov,     photoy2k, djlzz,      ROT0,   "IGS", "Real and Fake / Photo Y2K (ver. 102, Japanese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* region provided by protection device */
	4385	GAME( 1999, kovsh,        kov,       kov,     sango,    kovsh,      ROT0,   "IGS", "Knights of Valour Super Heroes / Sangoku Senki Super Heroes (ver. 104)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4386	GAME( 2000, kov2,         pgm,       kov2,    sango,    kov2,       ROT0,   "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 100)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4387	GAME( 2000, kov2106,      kov2,      kov2,    sango,    kov2,       ROT0,   "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 106)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4388	GAME( 2001, martmast,     pgm,       kov2,    sango,    martmast,   ROT0,   "IGS", "Martial Masters (ver. 102)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	4389	GAME( 2001, martmastc,    martmast,  kov2,    sango,    martmast,   ROT0,   "IGS", "Martial Masters (ver. 101, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
4158	4390
4159	4391	/* Playable but maybe imperfect protection emulation */
4160		GAME( 1997, drgw2,    pgm,       drgw2, pgm,     drgw2,      ROT0,   "IGS", "Dragon World II (ver. 110X, Export)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
4161		GAME( 1997, drgw2j,   drgw2,     drgw2, pgm,     drgw2j,     ROT0,   "IGS", "Chuugokuryuu II (ver. 100J, Japan)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
4162		GAME( 1998, killbldt, killbld, killbld, killbld, killbld,    ROT0,   "IGS", "The Killing Blade (ver. 109, Chinese Board)", GAME_IMPERFECT_SOUND ) // it's playable, but there are some things unclear about the protection
4163		GAME( 1998, olds,     pgm,       olds, olds,     olds,       ROT0,   "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 101, Korean Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
4164		GAME( 1998, olds100,  olds,      olds, olds,     olds,       ROT0,   "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
4165		GAME( 1998, olds100a, olds,      olds, olds,     olds,       ROT0,   "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (alt ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING  ) // grashes on some bosses, high score table etc.
	4392	GAME( 1997, drgw2,        pgm,       drgw2,   pgm,      drgw2,      ROT0,   "IGS", "Dragon World II (ver. 110X, Export)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	4393	GAME( 1997, drgw2j,       drgw2,     drgw2,   pgm,      drgw2j,     ROT0,   "IGS", "Chuugokuryuu II (ver. 100J, Japan)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	4394	GAME( 1998, killbldt,     killbld,   killbld, killbld,  killbld,    ROT0,   "IGS", "The Killing Blade (ver. 109, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // it's playable, but there are some things unclear about the protection
	4395	GAME( 1998, olds,         pgm,       olds,    olds,     olds,       ROT0,   "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 101, Korean Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	4396	GAME( 1998, olds100,      olds,      olds,    olds,     olds,       ROT0,   "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	4397	GAME( 1998, olds100a,     olds,      olds,    olds,     olds,       ROT0,   "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (alt ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // grashes on some bosses, high score table etc.
4166	4398
4167	4399	/* not working */
4168		GAME( 1998, drgw3,    pgm,        pgm, sango,    dw3,        ROT0,   "IGS", "Dragon World 3 (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
4169		GAME( 1998, drgw3k,   drgw3,      pgm, sango,    dw3,        ROT0,   "IGS", "Dragon World 3 (ver. 106, Korean Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
4170		GAME( 1998, killbld,  pgm,    killbld, killbld,  killbld,    ROT0,   "IGS", "The Killing Blade (ver. 104)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
4171		GAME( 1999, kov,      pgm,        kov, sango,    kov,        ROT0,   "IGS", "Knights of Valour / Sangoku Senki (ver. 117)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4172		GAME( 1999, kov115,   kov,        kov, sango,    kov,        ROT0,   "IGS", "Knights of Valour / Sangoku Senki (ver. 115)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4173		GAME( 1999, kovj,     kov,        kov, sango,    kov,        ROT0,   "IGS", "Knights of Valour / Sangoku Senki (ver. 100, Japanese Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4174		GAME( 1999, kovplus,  kov,        kov, sango,    kov,        ROT0,   "IGS", "Knights of Valour Plus / Sangoku Senki Plus (ver. 119)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4175		GAME( 1999, kovplusa, kov,        kov, sango,    kov,        ROT0,   "IGS", "Knights of Valour Plus / Sangoku Senki Plus (alt ver. 119)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4176		GAME( 1999, puzlstar, pgm,        kov, sango,    pstar,      ROT0,   "IGS", "Puzzle Star (ver. 100MG)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4177		GAME( 2001, kov2p,    kov2,      kov2, sango,    kov2p,      ROT0,   "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M204XX)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4178		GAME( 2001, kov2p205, kov2,      kov2, sango,    kov2p,      ROT0,   "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M205XX)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4179		GAME( 2001, ddp2,     pgm,       kov2, ddp2,     ddp2,       ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4180		GAME( 2001, ddp2a,    ddp2,      kov2, ddp2,     ddp2,       ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 102)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4181		GAME( 2001, puzzli2,  pgm,        kov, sango,    puzzli2,    ROT0,   "IGS", "Puzzli 2 Super (ver. 200)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
4182		GAME( 2002, dmnfrnt,  pgm,        svg, sango,    dmnfrnt,    ROT0,   "IGS", "Demon Front (ver. 102)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4183		GAME( 2002, dmnfrnta, dmnfrnt,    svg, sango,    dmnfrnt,    ROT0,   "IGS", "Demon Front (ver. 105)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4184		GAME( 2003, theglad,  pgm,        svg, sango,    theglad,    ROT0,   "IGS", "The Gladiator (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4185		GAME( 2003, theglada, theglad,    svg, sango,    theglad,    ROT0,   "IGS", "The Gladiator (ver. 101)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4186		GAME( 2004, oldsplus, pgm,        kov, olds,     oldsplus,   ROT0,   "IGS", "Oriental Legend Special Plus / Xi You Shi E Zhuan Super Plus", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4187		GAME( 2004, kovshp,   kov,        kov, sango,    kovshp,     ROT0,   "IGS", "Knights of Valour Super Heroes Plus / Sangoku Senki Super Heroes Plus (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4188		GAME( 2005, killbldp, pgm,        svg, sango,    killbldp,   ROT0,   "IGS", "The Killing Blade Plus (ver. 300)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
4189		GAME( 2005, svg,      pgm,        svg, sango,    svg,        ROT0,   "IGS", "S.V.G. - Spectral vs Generation (ver. 200)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) /* need internal rom of IGS027A */
	4400	GAME( 1998, drgw3,        pgm,       pgm,     sango,    dw3,        ROT0,   "IGS", "Dragon World 3 (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	4401	GAME( 1998, drgw3k,       drgw3,     pgm,     sango,    dw3,        ROT0,   "IGS", "Dragon World 3 (ver. 106, Korean Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	4402	GAME( 1998, killbld,      pgm,       killbld, killbld,  killbld,    ROT0,   "IGS", "The Killing Blade (ver. 104)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	4403	GAME( 1999, kov,          pgm,       kov,     sango,    kov,        ROT0,   "IGS", "Knights of Valour / Sangoku Senki (ver. 117)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4404	GAME( 1999, kov115,       kov,       kov,     sango,    kov,        ROT0,   "IGS", "Knights of Valour / Sangoku Senki (ver. 115)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4405	GAME( 1999, kovj,         kov,       kov,     sango,    kov,        ROT0,   "IGS", "Knights of Valour / Sangoku Senki (ver. 100, Japanese Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4406	GAME( 1999, kovplus,      kov,       kov,     sango,    kov,        ROT0,   "IGS", "Knights of Valour Plus / Sangoku Senki Plus (ver. 119)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4407	GAME( 1999, kovplusa,     kov,       kov,     sango,    kov,        ROT0,   "IGS", "Knights of Valour Plus / Sangoku Senki Plus (alt ver. 119)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4408	GAME( 1999, puzlstar,     pgm,       kov,     sango,    pstar,      ROT0,   "IGS", "Puzzle Star (ver. 100MG)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4409	GAME( 2001, kov2p,        kov2,      kov2,    sango,    kov2p,      ROT0,   "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M204XX)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4410	GAME( 2001, kov2p205,     kov2,      kov2,    sango,    kov2p,      ROT0,   "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M205XX)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4411	GAME( 2001, ddp2,         pgm,       kov2,    ddp2,     ddp2,       ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4412	GAME( 2001, ddp2a,        ddp2,      kov2,    ddp2,     ddp2,       ROT270, "IGS", "Bee Storm - DoDonPachi II (ver. 102)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4413	GAME( 2001, puzzli2,      pgm,       kov,     sango,    puzzli2,    ROT0,   "IGS", "Puzzli 2 Super (ver. 200)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	4414	GAME( 2002, dmnfrnt,      pgm,       svg,     sango,    dmnfrnt,    ROT0,   "IGS", "Demon Front (ver. 102)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4415	GAME( 2002, dmnfrnta,     dmnfrnt,   svg,     sango,    dmnfrnt,    ROT0,   "IGS", "Demon Front (ver. 105)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4416	GAME( 2003, theglad,      pgm,       svg,     sango,    theglad,    ROT0,   "IGS", "The Gladiator (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4417	GAME( 2003, theglada,     theglad,   svg,     sango,    theglad,    ROT0,   "IGS", "The Gladiator (ver. 101)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4418	GAME( 2004, oldsplus,     pgm,       kov,     olds,     oldsplus,   ROT0,   "IGS", "Oriental Legend Special Plus / Xi You Shi E Zhuan Super Plus", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4419	GAME( 2004, kovshp,       kov,       kov,     sango,    kovshp,     ROT0,   "IGS", "Knights of Valour Super Heroes Plus / Sangoku Senki Super Heroes Plus (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4420	GAME( 2005, killbldp,     pgm,       svg,     sango,    killbldp,   ROT0,   "IGS", "The Killing Blade Plus (ver. 300)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4421	GAME( 2004, happy6,       pgm,       svg,     sango,    svg,        ROT0,   "IGS", "Happy 6-in-1 (ver. 101CN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
	4422	GAME( 2005, svg,          pgm,       svg,     sango,    svg,        ROT0,   "IGS", "S.V.G. - Spectral vs Generation (ver. 200)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */

src/mame/drivers/gameplan.c

r6740	r6741
79	79	#include "machine/6532riot.h"
80	80	#include "machine/6522via.h"
81	81	#include "sound/ay8910.h"
82		#include "gameplan.h"
	82	#include "includes/gameplan.h"
83	83
84	84
85	85
r6740	r6741
988	988	state->audiocpu = devtag_get_device(machine, "audiocpu");
989	989	state->riot = devtag_get_device(machine, "riot");
990	990	state->via_0 = devtag_get_device(machine, "via6522_0");
	991	state->via_1 = devtag_get_device(machine, "via6522_1");
	992	state->via_2 = devtag_get_device(machine, "via6522_2");
991	993
992	994	/* register for save states */
993	995	state_save_register_global(machine, state->current_port);

src/mame/drivers/capbowl.c

r6740	r6741
90	90	#include "driver.h"
91	91	#include "machine/ticket.h"
92	92	#include "cpu/m6809/m6809.h"
93		#include "capbowl.h"
	93	#include "includes/capbowl.h"
94	94	#include "sound/2203intf.h"
95	95	#include "sound/dac.h"
96	96
r6740	r6741
329	329	{
330	330	AY8910_LEGACY_OUTPUT,
331	331	AY8910_DEFAULT_LOADS,
332		DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, ticket_dispenser_r),
	332	DEVCB_DEVICE_HANDLER("ticket", ticket_dispenser_r),
333	333	DEVCB_NULL,
334	334	DEVCB_NULL,
335		DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, ticket_dispenser_w),  /* Also a status LED. See memory map above */
	335	DEVCB_DEVICE_HANDLER("ticket", ticket_dispenser_w),  /* Also a status LED. See memory map above */
336	336	},
337	337	firqhandler
338	338	};
r6740	r6741
386	386	MDRV_MACHINE_RESET(capbowl)
387	387	MDRV_NVRAM_HANDLER(capbowl)
388	388
	389	MDRV_TICKET_DISPENSER_ADD("ticket", 100, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW)
	390
389	391	/* video hardware */
390	392	MDRV_VIDEO_START(capbowl)
391	393	MDRV_VIDEO_UPDATE(capbowl)
r6740	r6741
511	513	*
512	514	*************************************/
513	515
514		static DRIVER_INIT( bowlrama )
515		{
516		/* Initialize the ticket dispenser to 100 milliseconds */
517		/* (I'm not sure what the correct value really is) */
518		ticket_dispenser_init(machine, 100, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);
519		}
520
521	516	static DRIVER_INIT( capbowl )
522	517	{
523	518	UINT8 *ROM = memory_region(machine, "maincpu");
524	519
525	520	/* configure ROM banks in 0x0000-0x3fff */
526	521	memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
527
528		DRIVER_INIT_CALL(bowlrama);
529	522	}
530	523
531	524
r6740	r6741
540	533	GAME( 1988, capbowl3, capbowl, capbowl,  capbowl, capbowl,  ROT270, "Incredible Technologies", "Capcom Bowling (set 3)", 0 )
541	534	GAME( 1988, capbowl4, capbowl, capbowl,  capbowl, capbowl,  ROT270, "Incredible Technologies", "Capcom Bowling (set 4)", 0 )
542	535	GAME( 1989, clbowl,   capbowl, capbowl,  capbowl, capbowl,  ROT270, "Incredible Technologies", "Coors Light Bowling", 0 )
543		GAME( 1991, bowlrama, 0,       bowlrama, capbowl, bowlrama, ROT270, "P&P Marketing", "Bowl-O-Rama", 0 )
	536	GAME( 1991, bowlrama, 0,       bowlrama, capbowl, 0,        ROT270, "P&P Marketing", "Bowl-O-Rama", 0 )

src/mame/drivers/cbasebal.c

r6740	r6741
1	1	/***************************************************************************
2	2
3		Capcom Baseball
	3	Capcom Baseball
4	4
5	5
6		Somewhat similar to the "Mitchell hardware", but different enough to
7		deserve its own driver.
	6	Somewhat similar to the "Mitchell hardware", but different enough to
	7	deserve its own driver.
8	8
9		TODO:
10		- understand what bit 6 of input port 0x12 is
11		- unknown bit 5 of bankswitch register
	9	TODO:
	10	- understand what bit 6 of input port 0x12 is
	11	- unknown bit 5 of bankswitch register
12	12
13	13	***************************************************************************/
14	14
15	15	#include "driver.h"
16	16	#include "cpu/z80/z80.h"
17		#include "includes/cps1.h"
18		#include "machine/eeprom.h"
	17	#include "includes/cps1.h"   // needed for decoding functions only
	18	#include "includes/cbasebal.h"
	19	#include "machine/eepromdev.h"
19	20	#include "sound/okim6295.h"
20	21	#include "sound/2413intf.h"
21	22
22	23
23		VIDEO_START( cbasebal );
24		WRITE8_HANDLER( cbasebal_textram_w );
25		READ8_HANDLER( cbasebal_textram_r );
26		WRITE8_HANDLER( cbasebal_scrollram_w );
27		READ8_HANDLER( cbasebal_scrollram_r );
28		WRITE8_HANDLER( cbasebal_gfxctrl_w );
29		WRITE8_HANDLER( cbasebal_scrollx_w );
30		WRITE8_HANDLER( cbasebal_scrolly_w );
31		VIDEO_UPDATE( cbasebal );
	24	/*************************************
	25	*
	26	*  Memory handlers
	27	*
	28	*************************************/
32	29
33
34		static UINT8 rambank;
35
36	30	static WRITE8_HANDLER( cbasebal_bankswitch_w )
37	31	{
	32	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	33
38	34	/* bits 0-4 select ROM bank */
39		//logerror("%04x: bankswitch %02x\n",cpu_get_pc(space->cpu),data);
	35	//logerror("%04x: bankswitch %02x\n", cpu_get_pc(space->cpu), data);
40	36	memory_set_bank(space->machine, "bank1", data & 0x1f);
41	37
42	38	/* bit 5 used but unknown */
43	39
44	40	/* bits 6-7 select RAM bank */
45		rambank = (data & 0xc0) >> 6;
	41	state->rambank = (data & 0xc0) >> 6;
46	42	}
47	43
48	44
49	45	static READ8_HANDLER( bankedram_r )
50	46	{
51		if (rambank == 2)
52		return cbasebal_textram_r(space,offset);   /* VRAM */
53		else if (rambank == 1)
	47	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	48
	49	switch (state->rambank)
54	50	{
	51	case 2:
	52	return cbasebal_textram_r(space, offset);   /* VRAM */
	53	break;
	54	case 1:
55	55	if (offset < 0x800)
56	56	return space->machine->generic.paletteram.u8[offset];
57		else return 0;
	57	else
	58	return 0;
	59	break;
	60	default:
	61	return cbasebal_scrollram_r(space, offset);   /* SCROLL */
	62	break;
58	63	}
59		else
60		{
61		return cbasebal_scrollram_r(space,offset);   /* SCROLL */
62		}
63	64	}
64	65
65	66	static WRITE8_HANDLER( bankedram_w )
66	67	{
67		if (rambank == 2)
68		cbasebal_textram_w(space,offset,data);
69		else if (rambank == 1)
	68	cbasebal_state *state = (cbasebal_state *)space->machine->driver_data;
	69
	70	switch (state->rambank)
70	71	{
	72	case 2:
	73	cbasebal_textram_w(space, offset, data);
	74	break;
	75	case 1:
71	76	if (offset < 0x800)
72		paletteram_xxxxBBBBRRRRGGGG_le_w(space,offset,data);
	77	paletteram_xxxxBBBBRRRRGGGG_le_w(space, offset, data);
	78	break;
	79	default:
	80	cbasebal_scrollram_w(space, offset, data);
	81	break;
73	82	}
74		else
75		cbasebal_scrollram_w(space,offset,data);
76	83	}
77	84
78	85	static WRITE8_HANDLER( cbasebal_coinctrl_w )
79	86	{
80		coin_lockout_w(space->machine, 0,~data & 0x04);
81		coin_lockout_w(space->machine, 1,~data & 0x08);
82		coin_counter_w(space->machine, 0,data & 0x01);
83		coin_counter_w(space->machine, 1,data & 0x02);
	87	coin_lockout_w(space->machine, 0, ~data & 0x04);
	88	coin_lockout_w(space->machine, 1, ~data & 0x08);
	89	coin_counter_w(space->machine, 0, data & 0x01);
	90	coin_counter_w(space->machine, 1, data & 0x02);
84	91	}
85	92
86	93
	94	/*************************************
	95	*
	96	*  EEPROM
	97	*
	98	*************************************/
87	99
88		/***************************************************************************
89
90		EEPROM
91
92		***************************************************************************/
93
94		static const eeprom_interface eeprom_intf =
	100	static const eeprom_interface cbasebal_eeprom_intf =
95	101	{
96	102	6,      /* address bits */
97	103	16,      /* data bits */
r6740	r6741
101	107	};
102	108
103	109
104		static NVRAM_HANDLER( cbasebal )
105		{
106		if (read_or_write)
107		eeprom_save(file);
108		else
109		{
110		eeprom_init(machine, &eeprom_intf);
	110	/*************************************
	111	*
	112	*  Address maps
	113	*
	114	*************************************/
111	115
112		if (file)
113		eeprom_load(file);
114		}
115		}
116
117		static WRITE8_HANDLER( eeprom_cs_w )
118		{
119		eeprom_set_cs_line(data ? CLEAR_LINE : ASSERT_LINE);
120		}
121
122		static WRITE8_HANDLER( eeprom_clock_w )
123		{
124		eeprom_set_clock_line(data ? CLEAR_LINE : ASSERT_LINE);
125		}
126
127		static WRITE8_HANDLER( eeprom_serial_w )
128		{
129		eeprom_write_bit(data);
130		}
131
132
133
134	116	static ADDRESS_MAP_START( cbasebal_map, ADDRESS_SPACE_PROGRAM, 8 )
135	117	AM_RANGE(0x0000, 0x7fff) AM_ROM
136	118	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
137	119	AM_RANGE(0xc000, 0xcfff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE_GENERIC(paletteram)   /* palette + vram + scrollram */
138	120	AM_RANGE(0xe000, 0xfdff) AM_RAM      /* work RAM */
139		AM_RANGE(0xfe00, 0xffff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
	121	AM_RANGE(0xfe00, 0xffff) AM_RAM AM_BASE_SIZE_MEMBER(cbasebal_state, spriteram, spriteram_size)
140	122	ADDRESS_MAP_END
141	123
142	124	static ADDRESS_MAP_START( cbasebal_portmap, ADDRESS_SPACE_IO, 8 )
143	125	ADDRESS_MAP_GLOBAL_MASK(0xff)
144	126	AM_RANGE(0x00, 0x00) AM_WRITE(cbasebal_bankswitch_w)
145		AM_RANGE(0x01, 0x01) AM_WRITE(eeprom_cs_w)
146		AM_RANGE(0x02, 0x02) AM_WRITE(eeprom_clock_w)
147		AM_RANGE(0x03, 0x03) AM_WRITE(eeprom_serial_w)
	127	AM_RANGE(0x01, 0x01) AM_WRITE_PORT("IO_01")
	128	AM_RANGE(0x02, 0x02) AM_WRITE_PORT("IO_02")
	129	AM_RANGE(0x03, 0x03) AM_WRITE_PORT("IO_03")
148	130	AM_RANGE(0x05, 0x05) AM_DEVWRITE("oki", okim6295_w)
149	131	AM_RANGE(0x06, 0x07) AM_DEVWRITE("ymsnd", ym2413_w)
150	132	AM_RANGE(0x08, 0x09) AM_WRITE(cbasebal_scrollx_w)
r6740	r6741
157	139	ADDRESS_MAP_END
158	140
159	141
	142	/*************************************
	143	*
	144	*  Input ports
	145	*
	146	*************************************/
	147
160	148	static INPUT_PORTS_START( cbasebal )
161	149	PORT_START("P1")
162	150	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
186	174	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
187	175	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
188	176	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_VBLANK )      /* ? */
189		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
	177	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	178
	179	PORT_START( "IO_01" )
	180	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	181
	182	PORT_START( "IO_02" )
	183	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	184
	185	PORT_START( "IO_03" )
	186	PORT_BIT( 0x00000040, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
190	187	INPUT_PORTS_END
191	188
192	189
193	190
	191	/*************************************
	192	*
	193	*  Graphics definitions
	194	*
	195	*************************************/
194	196
195	197	static const gfx_layout cbasebal_textlayout =
196	198	{
r6740	r6741
236	238	GFXDECODE_END
237	239
238	240
	241	/*************************************
	242	*
	243	*  Machine driver
	244	*
	245	*************************************/
239	246
	247	static MACHINE_START( cbasebal )
	248	{
	249	cbasebal_state *state = (cbasebal_state *)machine->driver_data;
	250
	251	memory_configure_bank(machine, "bank1", 0, 32, memory_region(machine, "maincpu") + 0x10000, 0x4000);
	252
	253	state_save_register_global(machine, state->rambank);
	254	state_save_register_global(machine, state->tilebank);
	255	state_save_register_global(machine, state->spritebank);
	256	state_save_register_global(machine, state->text_on);
	257	state_save_register_global(machine, state->bg_on);
	258	state_save_register_global(machine, state->obj_on);
	259	state_save_register_global(machine, state->flipscreen);
	260	state_save_register_global_array(machine, state->scroll_x);
	261	state_save_register_global_array(machine, state->scroll_y);
	262	}
	263
	264	static MACHINE_RESET( cbasebal )
	265	{
	266	cbasebal_state *state = (cbasebal_state *)machine->driver_data;
	267
	268	state->rambank = 0;
	269	state->tilebank = 0;
	270	state->spritebank = 0;
	271	state->text_on = 0;
	272	state->bg_on = 0;
	273	state->obj_on = 0;
	274	state->flipscreen = 0;
	275	state->scroll_x[0] = 0;
	276	state->scroll_x[1] = 0;
	277	state->scroll_y[0] = 0;
	278	state->scroll_y[1] = 0;
	279	}
	280
240	281	static MACHINE_DRIVER_START( cbasebal )
241	282
	283	/* driver data */
	284	MDRV_DRIVER_DATA(cbasebal_state)
	285
242	286	/* basic machine hardware */
243	287	MDRV_CPU_ADD("maincpu", Z80, 6000000)   /* ??? */
244	288	MDRV_CPU_PROGRAM_MAP(cbasebal_map)
245	289	MDRV_CPU_IO_MAP(cbasebal_portmap)
246	290	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)   /* ??? */
247	291
248		MDRV_NVRAM_HANDLER(cbasebal)
	292	MDRV_MACHINE_START(cbasebal)
	293	MDRV_MACHINE_RESET(cbasebal)
249	294
	295	MDRV_EEPROM_NODEFAULT_ADD("eeprom", cbasebal_eeprom_intf)
	296
250	297	/* video hardware */
251	298	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
252	299
r6740	r6741
276	323
277	324
278	325
	326	/*************************************
	327	*
	328	*  ROM definition(s)
	329	*
	330	*************************************/
	331
279	332	ROM_START( cbasebal )
280	333	ROM_REGION( 0x90000, "maincpu", 0 )
281	334	ROM_LOAD( "cbj10.11j",    0x00000, 0x08000, CRC(bbff0acc) SHA1(db9e2c89e030255851789caaf85f24dc73609d9b) )
r6740	r6741
304	357	ROM_END
305	358
306	359
	360	/*************************************
	361	*
	362	*  Driver initialization
	363	*
	364	*************************************/
	365
307	366	static DRIVER_INIT( cbasebal )
308	367	{
309		memory_configure_bank(machine, "bank1", 0, 32, memory_region(machine, "maincpu") + 0x10000, 0x4000);
310	368	pang_decode(machine);
311	369	}
312	370
313	371
314		GAME( 1989, cbasebal, 0, cbasebal, cbasebal, cbasebal, ROT0, "Capcom", "Capcom Baseball (Japan)", 0 )
	372	/*************************************
	373	*
	374	*  Game driver(s)
	375	*
	376	*************************************/
	377
	378	GAME( 1989, cbasebal, 0, cbasebal, cbasebal, cbasebal, ROT0, "Capcom", "Capcom Baseball (Japan)", GAME_SUPPORTS_SAVE )

src/mame/drivers/beathead.c

r6740	r6741
101	101	#include "cpu/asap/asap.h"
102	102	#include "machine/atarigen.h"
103	103	#include "audio/atarijsa.h"
104		#include "beathead.h"
	104	#include "includes/beathead.h"
105	105
106	106
107	107
r6740	r6741
135	135
136	136	static void update_interrupts(running_machine *machine);
137	137
138		static TIMER_CALLBACK( scanline_callback )
	138	static TIMER_DEVICE_CALLBACK( scanline_callback )
139	139	{
140	140	int scanline = param;
141	141
142	142	/* update the video */
143		video_screen_update_now(machine->primary_screen);
	143	video_screen_update_now(timer->machine->primary_screen);
144	144
145	145	/* on scanline zero, clear any halt condition */
146	146	if (scanline == 0)
147		cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
	147	cputag_set_input_line(timer->machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
148	148
149	149	/* wrap around at 262 */
150	150	scanline++;
r6740	r6741
153	153
154	154	/* set the scanline IRQ */
155	155	irq_state[2] = 1;
156		update_interrupts(machine);
	156	update_interrupts(timer->machine);
157	157
158	158	/* set the timer for the next one */
159		timer_set(machine, double_to_attotime(attotime_to_double(video_screen_get_time_until_pos(machine->primary_screen, scanline, 0)) - hblank_offset), NULL, scanline, scanline_callback);
	159	timer_device_adjust_oneshot(timer, double_to_attotime(attotime_to_double(video_screen_get_time_until_pos(timer->machine->primary_screen, scanline, 0)) - hblank_offset), scanline);
160	160	}
161	161
162	162
	163	static MACHINE_START( beathead )
	164	{
	165	atarigen_init(machine);
	166	}
	167
	168
163	169	static MACHINE_RESET( beathead )
164	170	{
165	171	beathead_state *state = (beathead_state *)machine->driver_data;
r6740	r6741
175	181
176	182	/* compute the timing of the HBLANK interrupt and set the first timer */
177	183	hblank_offset = attotime_to_double(video_screen_get_scan_period(machine->primary_screen)) * ((455. - 336. - 25.) / 455.);
178		timer_set(machine, double_to_attotime(attotime_to_double(video_screen_get_time_until_pos(machine->primary_screen, 0, 0)) - hblank_offset), NULL, 0, scanline_callback);
	184	timer_device_adjust_oneshot(devtag_get_device(machine, "scan_timer"), double_to_attotime(attotime_to_double(video_screen_get_time_until_pos(machine->primary_screen, 0, 0)) - hblank_offset), 0);
179	185
180	186	/* reset IRQs */
181	187	irq_line_state = CLEAR_LINE;
r6740	r6741
416	422	MDRV_CPU_ADD("maincpu", ASAP, ATARI_CLOCK_14MHz)
417	423	MDRV_CPU_PROGRAM_MAP(main_map)
418	424
	425	MDRV_MACHINE_START(beathead)
419	426	MDRV_MACHINE_RESET(beathead)
420	427	MDRV_NVRAM_HANDLER(generic_1fill)
421	428
	429	MDRV_TIMER_ADD("scan_timer", scanline_callback)
	430
422	431	/* video hardware */
423	432	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
424	433

src/mame/drivers/st0016.c

r6740	r6741
14	14	#include "deprecat.h"
15	15	#include "cpu/z80/z80.h"
16	16	#include "sound/st0016.h"
17		#include "st0016.h"
	17	#include "includes/st0016.h"
18	18
19	19
20	20

src/mame/drivers/cchasm.c

r6740	r6741
21	21	#include "video/vector.h"
22	22	#include "machine/6840ptm.h"
23	23	#include "machine/z80ctc.h"
24		#include "cchasm.h"
	24	#include "includes/cchasm.h"
25	25
26	26	#define CCHASM_68K_CLOCK (XTAL_8MHz)
27	27

src/mame/drivers/skyarmy.c

r6740	r6741
31	31
32	32	static TILE_GET_INFO( get_skyarmy_tile_info )
33	33	{
34		int code = skyarmy_videoram[tile_index];
35		int attr = skyarmy_colorram[tile_index];
	34	int code = skyarmy_videoram[tile_index];
	35	int attr = BITSWAP8(skyarmy_colorram[tile_index], 7, 6, 5, 4, 3, 0, 1, 2) & 7;
36	36
37		/* bit 0 <-> bit 2 ????? */
38		switch(attr)
39		{
40		case 1: attr=4; break;
41		case 3: attr=6; break;
42		case 4: attr=1; break;
43		case 6: attr=3; break;
44		}
45
46	37	SET_TILE_INFO( 0, code, attr, 0);
47	38	}
48	39
49	40	static WRITE8_HANDLER( skyarmy_videoram_w )
50	41	{
51		skyarmy_videoram[offset] = data;
52		tilemap_mark_tile_dirty(skyarmy_tilemap,offset);
	42	skyarmy_videoram[offset] = data;
	43	tilemap_mark_tile_dirty(skyarmy_tilemap,offset);
53	44	}
54	45
55	46	static WRITE8_HANDLER( skyarmy_colorram_w )
56	47	{
57		skyarmy_colorram[offset] = data;
58		tilemap_mark_tile_dirty(skyarmy_tilemap,offset);
	48	skyarmy_colorram[offset] = data;
	49	tilemap_mark_tile_dirty(skyarmy_tilemap,offset);
59	50	}
60	51
61	52	static PALETTE_INIT( skyarmy )
r6740	r6741
88	79
89	80	static VIDEO_START( skyarmy )
90	81	{
91		skyarmy_tilemap = tilemap_create(machine, get_skyarmy_tile_info,tilemap_scan_rows,8,8,32,32);
92		tilemap_set_scroll_cols(skyarmy_tilemap,32);
	82	skyarmy_tilemap = tilemap_create(machine, get_skyarmy_tile_info,tilemap_scan_rows,8,8,32,32);
	83	tilemap_set_scroll_cols(skyarmy_tilemap,32);
93	84	}
94	85
95	86
96	87	static VIDEO_UPDATE( skyarmy )
97	88	{
98	89	UINT8 *spriteram = screen->machine->generic.spriteram.u8;
99		int sx, sy, flipx, flipy, offs,pal;
100		int i;
101		for(i=0;i<0x20;i++)tilemap_set_scrolly( skyarmy_tilemap,i,skyarmy_scrollram[i]);
	90	int sx, sy, flipx, flipy, offs,pal;
	91	int i;
102	92
103		tilemap_draw(bitmap,cliprect,skyarmy_tilemap,0,0);
	93	for(i=0;i<0x20;i++)
	94	tilemap_set_scrolly( skyarmy_tilemap,i,skyarmy_scrollram[i]);
104	95
	96	tilemap_draw(bitmap,cliprect,skyarmy_tilemap,0,0);
	97
105	98	for (offs = 0 ; offs < 0x40; offs+=4)
106	99	{
	100	pal = BITSWAP8(spriteram[offs+2], 7, 6, 5, 4, 3, 0, 1, 2) & 7;
107	101
108		pal=spriteram[offs+2]&0x7;
109
110		switch(pal)
111		{
112		case 1: pal=4; break;
113		case 2: pal=2; break;
114		case 3: pal=6; break;
115		case 4: pal=1; break;
116		case 6: pal=3; break;
117		}
118	102	sx = spriteram[offs+3];
119	103	sy = 242-spriteram[offs];
120	104	flipy = (spriteram[offs+1]&0x80)>>7;
121	105	flipx = (spriteram[offs+1]&0x40)>>6;
	106
122	107	drawgfx_transpen(bitmap,cliprect,screen->machine->gfx[1],
123		spriteram[offs+1]&0x3f,
124		pal,
125		flipx,flipy,
126		sx,sy,0);
	108	spriteram[offs+1]&0x3f,
	109	pal,
	110	flipx,flipy,
	111	sx,sy,0);
127	112	}
	113
128	114	return 0;
129	115	}
130	116
r6740	r6741
132	118
133	119	static INTERRUPT_GEN( skyarmy_nmi_source )
134	120	{
135		if(skyarmy_nmi) cpu_set_input_line(device,INPUT_LINE_NMI, PULSE_LINE)   ;
	121	if(skyarmy_nmi) cpu_set_input_line(device,INPUT_LINE_NMI, PULSE_LINE);
136	122	}
137	123
138	124
139	125	static WRITE8_HANDLER( nmi_enable_w )
140	126	{
141		skyarmy_nmi=data&1;
	127	skyarmy_nmi=data&1;
142	128	}
143	129
144	130
r6740	r6741
209	195	static const gfx_layout charlayout =
210	196	{
211	197	8,8,
212		256,
213		2,
214		{ 0, 256*8*8 },
215		{ 0, 1, 2, 3, 4, 5, 6, 7 },
216		{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
217		8*8
	198	256,
	199	2,
	200	{ 0, 256*8*8 },
	201	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	202	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
	203	8*8
218	204	};
219	205
220	206	static const gfx_layout spritelayout =
221	207	{
222		16,16,
223		32*2,
224		2,
225		{ 0, 256*8*8 },
226		{ 0, 1, 2, 3, 4, 5, 6, 7,
227		8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
228		{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
229		16*8,17*8,18*8,19*8,20*8,21*8,22*8,23*8 },
230		32*8
	208	16,16,
	209	32*2,
	210	2,
	211	{ 0, 256*8*8 },
	212	{ 0, 1, 2, 3, 4, 5, 6, 7,
	213	8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
	214	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
	215	16*8,17*8,18*8,19*8,20*8,21*8,22*8,23*8 },
	216	32*8
231	217	};
232	218
233	219	static GFXDECODE_START( skyarmy )
234		GFXDECODE_ENTRY( "gfx1", 0, charlayout,   0, 32 )
235		GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 0, 32 )
	220	GFXDECODE_ENTRY( "gfx1", 0, charlayout,   0, 8 )
	221	GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 0, 8 )
236	222	GFXDECODE_END
237	223
238	224	static MACHINE_DRIVER_START( skyarmy )
r6740	r6741
283	269	ROM_LOAD( "a6.bin",  0x0000, 0x0020, CRC(c721220b) SHA1(61b3320fb616c0600d56840cb6438616c7e0c6eb) )
284	270	ROM_END
285	271
286		GAME( 1982, skyarmy, 0, skyarmy, skyarmy, 0, ROT90, "Shoei", "Sky Army", GAME_WRONG_COLORS )
	272	GAME( 1982, skyarmy, 0, skyarmy, skyarmy, 0, ROT90, "Shoei", "Sky Army", 0 )
287	273

src/mame/drivers/qix.c

r6740	r6741
224	224	#include "driver.h"
225	225	#include "cpu/m6805/m6805.h"
226	226	#include "rendlay.h"
227		#include "qix.h"
	227	#include "includes/qix.h"
228	228	#include "cpu/m6809/m6809.h"
229	229
230	230	#include "elecyoyo.lh"

src/mame/drivers/battlex.c

r6740	r6741
47	47	#include "cpu/z80/z80.h"
48	48	#include "deprecat.h"
49	49	#include "sound/ay8910.h"
50		#include "battlex.h"
	50	#include "includes/battlex.h"
51	51
52	52
53	53	/*************************************

src/mame/drivers/konamigq.c

r6740	r6741
49	49	#include "cpu/m68000/m68000.h"
50	50	#include "cpu/mips/psx.h"
51	51	#include "includes/psx.h"
52		#include "konamigx.h"
	52	#include "includes/konamigx.h"
53	53	#include "machine/eepromdev.h"
54	54	#include "machine/am53cf96.h"
55	55	#include "harddisk.h"

src/mame/drivers/cinemat.c

r6740	r6741
32	32	#include "driver.h"
33	33	#include "video/vector.h"
34	34	#include "cpu/ccpu/ccpu.h"
35		#include "cinemat.h"
	35	#include "includes/cinemat.h"
36	36	#include "rendlay.h"
37	37
38	38	#include "armora.lh"

src/mame/drivers/toaplan2.c

r6740	r6741
4540	4540	ROM_LOAD( "tp025-3.bin", 0x100000, 0x100000, CRC(7b16101e) SHA1(ae0119bbfa0937d18c4fbb0a3ef7cdc3b9fa6b56) )
4541	4541	ROM_END
4542	4542
	4543	ROM_START( pipibibsa )
	4544	ROM_REGION( 0x040000, "maincpu", 0 )         /* Main 68K code */
	4545	ROM_LOAD16_BYTE( "tp025-1.alt.bin", 0x000000, 0x020000, CRC(3e522d98) SHA1(043dd76b99e130909e47063d4cc773177a2eaccf) )
	4546	ROM_LOAD16_BYTE( "tp025-2.alt.bin", 0x000001, 0x020000, CRC(48370485) SHA1(9895e086c9a5eeec4f454cbc6098adb2f66d4e11) )
4543	4547
	4548	ROM_REGION( 0x10000, "audiocpu", 0 )         /* Sound Z80 code */
	4549	ROM_LOAD( "tp025-5.bin", 0x0000, 0x8000, CRC(bf8ffde5) SHA1(79c09cc9a0ea979f5af5a7e5ad671ea486f5f43e) )
	4550
	4551	ROM_REGION( 0x200000, "gfx1", 0 )
	4552	ROM_LOAD( "tp025-4.bin", 0x000000, 0x100000, CRC(ab97f744) SHA1(c1620e614345dbd5c6567e4cb6f55c61b900d0ee) )
	4553	ROM_LOAD( "tp025-3.bin", 0x100000, 0x100000, CRC(7b16101e) SHA1(ae0119bbfa0937d18c4fbb0a3ef7cdc3b9fa6b56) )
	4554	ROM_END
	4555
4544	4556	ROM_START( whoopee )
4545	4557	ROM_REGION( 0x040000, "maincpu", 0 )         /* Main 68K code */
4546	4558	ROM_LOAD16_BYTE( "whoopee.1", 0x000000, 0x020000, CRC(28882e7e) SHA1(8fcd278a7d005eb81cd9e461139c0c0f756a4fa4) )
r6740	r6741
5395	5407
5396	5408	GAME( 1992, truxton2, 0,        truxton2, truxton2, T2_noZ80, ROT270, "Toaplan", "Truxton II / Tatsujin Oh", GAME_SUPPORTS_SAVE )
5397	5409
5398		GAME( 1991, pipibibs, 0,        pipibibs, pipibibs, T2_Z80,   ROT0,   "Toaplan", "Pipi & Bibis / Whoopee!! (Z80 sound cpu)", GAME_SUPPORTS_SAVE )
5399		GAME( 1991, whoopee,  pipibibs, whoopee,  whoopee,  T2_Z80,   ROT0,   "Toaplan", "Whoopee!! / Pipi & Bibis", GAME_SUPPORTS_SAVE )
	5410	GAME( 1991, pipibibs, 0,        pipibibs, pipibibs, T2_Z80,   ROT0,   "Toaplan", "Pipi & Bibis / Whoopee!! (Z80 sound cpu, set 1)", GAME_SUPPORTS_SAVE )
	5411	GAME( 1991, pipibibsa,pipibibs, pipibibs, pipibibs, T2_Z80,   ROT0,   "Toaplan", "Pipi & Bibis / Whoopee!! (Z80 sound cpu, set 2)", GAME_SUPPORTS_SAVE )
	5412	GAME( 1991, whoopee,  pipibibs, whoopee,  whoopee,  T2_Z80,   ROT0,   "Toaplan", "Whoopee!! / Pipi & Bibis", GAME_SUPPORTS_SAVE ) // original Whoopee!! boards have a HD647180 instead
5400	5413	GAME( 1991, pipibibi, pipibibs, pipibibi, pipibibi, pipibibi, ROT0,   "[Toaplan] Ryouta Kikaku", "Pipi & Bibis / Whoopee!! (bootleg?)", GAME_SUPPORTS_SAVE )
5401	5414
5402	5415	GAME( 1992, fixeight, 0,        fixeight, fixeight, fixeight, ROT270, "Toaplan", "FixEight", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )

src/mame/drivers/wecleman.c

r6740	r6741
273	273	#include "cpu/z80/z80.h"
274	274	#include "cpu/m68000/m68000.h"
275	275	#include "deprecat.h"
276		#include "video/konamiic.h"
	276	#include "video/konicdev.h"
277	277	#include "cpu/m6809/m6809.h"
278	278	#include "sound/2151intf.h"
279	279	#include "sound/k007232.h"
r6740	r6741
305	305	VIDEO_UPDATE( hotchase );
306	306	VIDEO_START( hotchase );
307	307
	308	extern void hotchase_zoom_callback_0(running_machine *machine, int *code,int *color,int *flags);
	309	extern void hotchase_zoom_callback_1(running_machine *machine, int *code,int *color,int *flags);
308	310
309	311	/***************************************************************************
310	312	Common Routines
r6740	r6741
564	566	Hot Chase Main CPU Handlers
565	567	***************************************************************************/
566	568
567		static READ16_HANDLER( hotchase_K051316_0_r )
568		{
569		return K051316_0_r(space, offset) & 0xff;
570		}
571
572		static READ16_HANDLER( hotchase_K051316_1_r )
573		{
574		return K051316_1_r(space, offset) & 0xff;
575		}
576
577		static WRITE16_HANDLER( hotchase_K051316_0_w )
578		{
579		if (ACCESSING_BITS_0_7)      K051316_0_w(space, offset, data & 0xff);
580		}
581
582		static WRITE16_HANDLER( hotchase_K051316_1_w )
583		{
584		if (ACCESSING_BITS_0_7)      K051316_1_w(space, offset, data & 0xff);
585		}
586
587		static WRITE16_HANDLER( hotchase_K051316_ctrl_0_w )
588		{
589		if (ACCESSING_BITS_0_7)      K051316_ctrl_0_w(space, offset, data & 0xff);
590		}
591
592		static WRITE16_HANDLER( hotchase_K051316_ctrl_1_w )
593		{
594		if (ACCESSING_BITS_0_7)      K051316_ctrl_1_w(space, offset, data & 0xff);
595		}
596
597	569	static WRITE16_HANDLER( hotchase_soundlatch_w );
598	570
599	571	static ADDRESS_MAP_START( hotchase_map, ADDRESS_SPACE_PROGRAM, 16 )
600	572	AM_RANGE(0x000000, 0x03ffff) AM_ROM
601	573	AM_RANGE(0x040000, 0x063fff) AM_RAM                              // RAM (weird size!?)
602	574	AM_RANGE(0x080000, 0x080011) AM_RAM_WRITE(blitter_w) AM_BASE(&blitter_regs)   // Blitter
603		AM_RANGE(0x100000, 0x100fff) AM_READWRITE(hotchase_K051316_0_r, hotchase_K051316_0_w)   // Background
604		AM_RANGE(0x101000, 0x10101f) AM_WRITE(hotchase_K051316_ctrl_0_w)   // Background Ctrl
605		AM_RANGE(0x102000, 0x102fff) AM_READWRITE(hotchase_K051316_1_r, hotchase_K051316_1_w)   // Foreground
606		AM_RANGE(0x103000, 0x10301f) AM_WRITE(hotchase_K051316_ctrl_1_w)   // Foreground Ctrl
	575	AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE8("k051316_1", k051316_r, k051316_w, 0x00ff)   // Background
	576	AM_RANGE(0x101000, 0x10101f) AM_DEVWRITE8("k051316_1", k051316_ctrl_w, 0x00ff)   // Background Ctrl
	577	AM_RANGE(0x102000, 0x102fff) AM_DEVREADWRITE8("k051316_2", k051316_r, k051316_w, 0x00ff)   // Foreground
	578	AM_RANGE(0x103000, 0x10301f) AM_DEVWRITE8("k051316_2", k051316_ctrl_w, 0x00ff)   // Foreground Ctrl
607	579	AM_RANGE(0x110000, 0x111fff) AM_RAM_WRITE(hotchase_paletteram16_SBGRBBBBGGGGRRRR_word_w) AM_BASE_GENERIC(paletteram)
608	580	AM_RANGE(0x120000, 0x123fff) AM_RAM AM_SHARE("share1")               // Shared with sub CPU
609	581	AM_RANGE(0x130000, 0x130fff) AM_RAM AM_BASE_GENERIC(spriteram)   // Sprites
r6740	r6741
1135	1107	generic_pulse_irq_line(device, M6809_FIRQ_LINE);
1136	1108	}
1137	1109
	1110	static const k051316_interface hotchase_k051316_intf_0 =
	1111	{
	1112	"gfx2", 1,
	1113	4, FALSE, 0,
	1114	1, -0xb0 / 2, -16,
	1115	hotchase_zoom_callback_0
	1116	};
	1117
	1118	static const k051316_interface hotchase_k051316_intf_1 =
	1119	{
	1120	"gfx3", 2,
	1121	4, FALSE, 0,
	1122	0, -0xb0 / 2, -16,
	1123	hotchase_zoom_callback_1
	1124	};
	1125
1138	1126	static MACHINE_DRIVER_START( hotchase )
1139	1127
1140	1128	/* basic machine hardware */
r6740	r6741
1167	1155	MDRV_VIDEO_START(hotchase)
1168	1156	MDRV_VIDEO_UPDATE(hotchase)
1169	1157
	1158	MDRV_K051316_ADD("k051316_1", hotchase_k051316_intf_0)
	1159	MDRV_K051316_ADD("k051316_2", hotchase_k051316_intf_1)
	1160
1170	1161	/* sound hardware */
1171	1162	MDRV_SPEAKER_STANDARD_MONO("mono")
1172	1163

src/mame/drivers/crbaloon.c

r6740	r6741
16	16
17	17	#include "driver.h"
18	18	#include "cpu/z80/z80.h"
19		#include "crbaloon.h"
	19	#include "includes/crbaloon.h"
20	20
21	21
22	22	static UINT8 *pc3092_data;

src/mame/drivers/funkybee.c

r6740	r6741
74	74	#include "driver.h"
75	75	#include "cpu/z80/z80.h"
76	76	#include "sound/ay8910.h"
77		#include "funkybee.h"
	77	#include "includes/funkybee.h"
78	78
79	79
80	80	static READ8_HANDLER( funkybee_input_port_0_r )

src/mame/drivers/btoads.c

r6740	r6741
10	10	#include "cpu/z80/z80.h"
11	11	#include "cpu/tms34010/tms34010.h"
12	12	#include "video/tlc34076.h"
13		#include "btoads.h"
	13	#include "includes/btoads.h"
14	14	#include "sound/bsmt2000.h"
15	15
16	16

src/mame/drivers/freekick.c

r6740	r6741
33	33	#include "machine/8255ppi.h"
34	34	#include "machine/mc8123.h"
35	35	#include "sound/sn76496.h"
36		#include "freekick.h"
	36	#include "includes/freekick.h"
37	37
38	38
39	39	/*************************************

src/mame/drivers/cischeat.c

r6740	r6741
172	172	#include "cpu/m68000/m68000.h"
173	173	#include "sound/2151intf.h"
174	174	#include "sound/okim6295.h"
175		#include "megasys1.h"
	175	#include "includes/megasys1.h"
176	176	#include "includes/cischeat.h"
177	177
178	178	static UINT16 *rom_1, *rom_2, *rom_3;

src/mame/drivers/vicdual.c

r6740	r6741
54	54	#include "driver.h"
55	55	#include "cpu/z80/z80.h"
56	56	#include "cpu/i8085/i8085.h"
57		#include "vicdual.h"
	57	#include "includes/vicdual.h"
58	58
59	59	#include "depthch.lh"
60	60
r6740	r6741
125	125	*
126	126	*************************************/
127	127
128		static int timer_started;
129		static UINT32 timer_value;
130
131		#define TIMER_HALF_PERIOD   ATTOTIME_IN_MSEC(4 / 2)   /* 4Mhz square wave */
132
133
134	128	static int get_vcounter(running_machine *machine)
135	129	{
136	130	int vcounter = video_screen_get_vpos(machine->primary_screen);
r6740	r6741
162	156	}
163	157
164	158
165		static TIMER_CALLBACK( vicdual_timer_callback )
166		{
167		timer_value = timer_value ^ 1;
168		}
169
170
171	159	static CUSTOM_INPUT( vicdual_get_timer_value )
172	160	{
173		/* start the timer, if this is the first call */
174		if (!timer_started)
175		{
176		timer_started = 1;
177		timer_pulse(field->port->machine, TIMER_HALF_PERIOD, NULL, 0, vicdual_timer_callback);
178		}
179
180		return timer_value;
	161	/* return the state of the timer (old code claims "4MHz square wave", but it was toggled once every 2msec, or 500Hz) */
	162	return attotime_to_ticks(timer_get_time(field->port->machine), 500) & 1;
181	163	}
182	164
183	165

src/mame/drivers/xybots.c

r6740	r6741
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "machine/atarigen.h"
23	23	#include "audio/atarijsa.h"
24		#include "xybots.h"
	24	#include "includes/xybots.h"
25	25
26	26
27	27
r6740	r6741
39	39	}
40	40
41	41
	42	static MACHINE_START( xybots )
	43	{
	44	atarigen_init(machine);
	45	}
	46
	47
42	48	static MACHINE_RESET( xybots )
43	49	{
44	50	xybots_state *state = (xybots_state *)machine->driver_data;
r6740	r6741
193	199	MDRV_CPU_PROGRAM_MAP(main_map)
194	200	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
195	201
	202	MDRV_MACHINE_START(xybots)
196	203	MDRV_MACHINE_RESET(xybots)
197	204	MDRV_NVRAM_HANDLER(atarigen)
198	205

src/mame/drivers/speglsht.c

r6740	r6741
107	107	#include "cpu/z80/z80.h"
108	108	#include "cpu/mips/r3000.h"
109	109	#include "sound/st0016.h"
110		#include "st0016.h"
	110	#include "includes/st0016.h"
111	111
112	112	READ8_HANDLER(st0016_dma_r);
113	113	static UINT8 *shared;

src/mame/drivers/magicfly.c

r6740	r6741
405	405	*     Video Hardware     *
406	406	*************************/
407	407
	408	static UINT8 *videoram;
	409	static UINT8 *colorram;
408	410	static tilemap *bg_tilemap;
409	411
410	412	static WRITE8_HANDLER( magicfly_videoram_w )
411	413	{
412		space->machine->generic.videoram.u8[offset] = data;
	414	videoram[offset] = data;
413	415	tilemap_mark_tile_dirty(bg_tilemap, offset);
414	416	}
415	417
416	418	static WRITE8_HANDLER( magicfly_colorram_w )
417	419	{
418		space->machine->generic.colorram.u8[offset] = data;
	420	colorram[offset] = data;
419	421	tilemap_mark_tile_dirty(bg_tilemap, offset);
420	422	}
421	423
r6740	r6741
430	432	x--- ----   Mirrored from bit 3. The code check this one to boot the game.
431	433
432	434	*/
433		int attr = machine->generic.colorram.u8[tile_index];
434		int code = machine->generic.videoram.u8[tile_index];
	435	int attr = colorram[tile_index];
	436	int code = videoram[tile_index];
435	437	int bank = (attr & 0x10) >> 4;   /* bit 4 switch the gfx banks */
436	438	int color = attr & 0x07;         /* bits 0-2 for color */
437	439
438	440	/* Seems that bit 7 is mirrored from bit 3 to have a normal boot */
439	441	/* Boot only check the first color RAM offset */
440	442
441		machine->generic.colorram.u8[0] = machine->generic.colorram.u8[0] | ((machine->generic.colorram.u8[0] & 0x08) << 4);   /* only for 1st offset */
442		//  machine->generic.colorram.u8[tile_index] = attr | ((attr & 0x08) << 4);         /* for the whole color RAM */
	443	colorram[0] = colorram[0] | ((colorram[0] & 0x08) << 4);   /* only for 1st offset */
	444	//colorram[tile_index] = attr | ((attr & 0x08) << 4);         /* for the whole color RAM */
443	445
444	446	SET_TILE_INFO(bank, code, color, 0);
445	447	}
r6740	r6741
460	462	x--- ----   Mirrored from bit 2. The code check this one to boot the game.
461	463
462	464	*/
463		int attr = machine->generic.colorram.u8[tile_index];
464		int code = machine->generic.videoram.u8[tile_index];
	465	int attr = colorram[tile_index];
	466	int code = videoram[tile_index];
465	467	int bank = (attr & 0x10) >> 4;    /* bit 4 switch the gfx banks */
466	468	int color = attr & 0x07;          /* bits 0-2 for color */
467	469
468	470	/* Seems that bit 7 is mirrored from bit 2 to have a normal boot */
469	471	/* Boot only check the first color RAM offset */
470	472
471		machine->generic.colorram.u8[0] = machine->generic.colorram.u8[0] | ((machine->generic.colorram.u8[0] & 0x04) << 5);   /* only for 1st offset */
472		//  machine->generic.colorram.u8[tile_index] = attr | ((attr & 0x04) << 5);         /* for the whole color RAM */
	473	colorram[0] = colorram[0] | ((colorram[0] & 0x04) << 5);   /* only for 1st offset */
	474	//colorram[tile_index] = attr | ((attr & 0x04) << 5);         /* for the whole color RAM */
473	475
474	476	SET_TILE_INFO(bank, code, color, 0);
475	477	}
r6740	r6741
556	558	AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)    /* MK48Z02B NVRAM */
557	559	AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("crtc", mc6845_address_w)
558	560	AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
559		AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(magicfly_videoram_w) AM_BASE_GENERIC(videoram)   /* HM6116LP #1 (2K x 8) RAM (only 1st half used) */
560		AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(magicfly_colorram_w) AM_BASE_GENERIC(colorram)   /* HM6116LP #2 (2K x 8) RAM (only 1st half used) */
	561	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(magicfly_videoram_w) AM_BASE(&videoram)   /* HM6116LP #1 (2K x 8) RAM (only 1st half used) */
	562	AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(magicfly_colorram_w) AM_BASE(&colorram)   /* HM6116LP #2 (2K x 8) RAM (only 1st half used) */
561	563	AM_RANGE(0x2800, 0x2800) AM_READ(mux_port_r)   /* multiplexed input port */
562	564	AM_RANGE(0x3000, 0x3000) AM_WRITE(mux_port_w)   /* output port */
563	565	AM_RANGE(0xc000, 0xffff) AM_ROM               /* ROM space */

src/mame/drivers/centiped.c

r6740	r6741
422	422	#include "cpu/m6502/m6502.h"
423	423	#include "cpu/s2650/s2650.h"
424	424	#include "machine/atari_vg.h"
425		#include "centiped.h"
	425	#include "includes/centiped.h"
426	426	#include "sound/ay8910.h"
427	427	#include "sound/sn76496.h"
428	428	#include "sound/pokey.h"

src/mame/drivers/wgp.c

r6740	r6741
395	395
396	396	#include "driver.h"
397	397	#include "cpu/z80/z80.h"
398		#include "taitoipt.h"
	398	#include "includes/taitoipt.h"
399	399	#include "cpu/m68000/m68000.h"
400	400	#include "video/taitoic.h"
401	401	#include "audio/taitosnd.h"

src/mame/drivers/taitoair.c

r6740	r6741
218	218	#include "driver.h"
219	219	#include "cpu/z80/z80.h"
220	220	#include "cpu/m68000/m68000.h"
221		#include "taitoipt.h"
	221	#include "includes/taitoipt.h"
222	222	#include "audio/taitosnd.h"
223	223	#include "video/taitoic.h"
224	224	#include "cpu/tms32025/tms32025.h"

src/mame/drivers/tceptor.c

r6740	r6741
11	11	#include "cpu/m6809/m6809.h"
12	12	#include "cpu/m6800/m6800.h"
13	13	#include "cpu/m68000/m68000.h"
14		#include "namcoic.h"
	14	#include "includes/namcoic.h"
15	15	#include "sound/dac.h"
16	16	#include "sound/2151intf.h"
17	17	#include "sound/namco.h"

src/mame/drivers/gal3.c

r6740	r6741
126	126
127	127	#include "driver.h"
128	128	#include "cpu/m68000/m68000.h"
129		#include "namcos2.h"
	129	#include "includes/namcos2.h"
130	130	#include "cpu/tms32025/tms32025.h"
131		#include "namcoic.h"
	131	#include "includes/namcoic.h"
132	132	#include "sound/c140.h"
133		#include "namcos21.h"
	133	#include "includes/namcos21.h"
134	134	#include "rendlay.h"
135	135
136	136	static UINT32 *mpSharedRAM0;

src/mame/drivers/metro.c

r6740	r6741
87	87	#include "cpu/h83002/h8.h"
88	88	#include "cpu/upd7810/upd7810.h"
89	89	#include "machine/eeprom.h"
90		#include "video/konamiic.h"
	90	#include "video/konicdev.h"
91	91	#include "sound/2610intf.h"
92	92	#include "sound/2151intf.h"
93	93	#include "sound/2413intf.h"
r6740	r6741
1705	1705	AM_RANGE(0x279700, 0x279713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
1706	1706
1707	1707	AM_RANGE(0x400000, 0x43ffff) AM_RAM_WRITE(metro_K053936_w) AM_BASE(&metro_K053936_ram)   // 053936
1708		AM_RANGE(0x500000, 0x500fff) AM_WRITEONLY AM_BASE(&K053936_0_linectrl)            // 053936 line control
1709		AM_RANGE(0x600000, 0x60001f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)               // 053936 control
	1708	AM_RANGE(0x500000, 0x500fff) AM_DEVWRITE("k053936", k053936_linectrl_w)            // 053936 line control
	1709	AM_RANGE(0x600000, 0x60001f) AM_DEVWRITE("k053936", k053936_ctrl_w)            // 053936 control
1710	1710
1711	1711	AM_RANGE(0xe00000, 0xe00001) AM_READ_PORT("DSW0") AM_WRITENOP                  // Inputs
1712	1712	AM_RANGE(0xe00002, 0xe00003) AM_READ_PORT("DSW1") AM_WRITE(blzntrnd_sound_w)      //
r6740	r6741
2048	2048	COINS
2049	2049
2050	2050	PORT_START("IN2")   // Strangely mapped in the 0xc00000-0xc1ffff range
2051		PORT_DIPNAME( 0x0001, 0x0001, "0" )
2052		PORT_DIPSETTING(      0x0001, DEF_STR( Off ) )
2053		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2054		PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
2055		PORT_DIPSETTING(      0x0002, DEF_STR( Off ) )
2056		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2057		PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
2058		PORT_DIPSETTING(      0x0004, DEF_STR( Off ) )
2059		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2060		PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
2061		PORT_DIPSETTING(      0x0008, DEF_STR( Off ) )
2062		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2063		PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
2064		PORT_DIPSETTING(      0x0010, DEF_STR( Off ) )
2065		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2066		PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
2067		PORT_DIPSETTING(      0x0020, DEF_STR( Off ) )
2068		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2069		PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
2070		PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
2071		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2051	PORT_DIPNAME( 0x0001, 0x0001, "0" )
	2052	PORT_DIPSETTING(      0x0001, DEF_STR( Off ) )
	2053	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2054	PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
	2055	PORT_DIPSETTING(      0x0002, DEF_STR( Off ) )
	2056	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2057	PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
	2058	PORT_DIPSETTING(      0x0004, DEF_STR( Off ) )
	2059	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2060	PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
	2061	PORT_DIPSETTING(      0x0008, DEF_STR( Off ) )
	2062	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2063	PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
	2064	PORT_DIPSETTING(      0x0010, DEF_STR( Off ) )
	2065	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2066	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
	2067	PORT_DIPSETTING(      0x0020, DEF_STR( Off ) )
	2068	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2069	PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
	2070	PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
	2071	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2072	2072	PORT_DIPNAME( 0x0080, 0x0080, "Debug Mode?" )
2073	2073	PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
2074	2074	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2075		PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
2076		PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
2077		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2078		PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
2079		PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
2080		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2081		PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
2082		PORT_DIPSETTING(      0x0400, DEF_STR( Off ) )
2083		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2084		PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
2085		PORT_DIPSETTING(      0x0800, DEF_STR( Off ) )
2086		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2087		PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
2088		PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
2089		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2090		PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
2091		PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
2092		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2093		PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
2094		PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
2095		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2096		PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
2097		PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
2098		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2075	PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
	2076	PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
	2077	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2078	PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
	2079	PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
	2080	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2081	PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
	2082	PORT_DIPSETTING(      0x0400, DEF_STR( Off ) )
	2083	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2084	PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
	2085	PORT_DIPSETTING(      0x0800, DEF_STR( Off ) )
	2086	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2087	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
	2088	PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
	2089	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2090	PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
	2091	PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
	2092	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2093	PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
	2094	PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
	2095	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
	2096	PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
	2097	PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
	2098	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
2099	2099	INPUT_PORTS_END
2100	2100
2101	2101	/***************************************************************************
r6740	r6741
4222	4222	MACHINE_DRIVER_END
4223	4223
4224	4224
	4225	static const k053936_interface blzntrnd_k053936_intf =
	4226	{
	4227	0, -69, -21
	4228	};
	4229
4225	4230	static MACHINE_DRIVER_START( blzntrnd )
4226	4231
4227	4232	/* basic machine hardware */
r6740	r6741
4249	4254	MDRV_VIDEO_START(blzntrnd)
4250	4255	MDRV_VIDEO_UPDATE(metro)
4251	4256
	4257	MDRV_K053936_ADD("k053936", blzntrnd_k053936_intf)
	4258
4252	4259	/* sound hardware */
4253	4260	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
4254	4261
r6740	r6741
4261	4268	MACHINE_DRIVER_END
4262	4269
4263	4270	/* like blzntrnd but new vidstart / gfxdecode for the different bg tilemap */
	4271
	4272	static const k053936_interface gstrik2_k053936_intf =
	4273	{
	4274	0, -69, -19
	4275	};
	4276
4264	4277	static MACHINE_DRIVER_START( gstrik2 )
4265	4278
4266	4279	/* basic machine hardware */
r6740	r6741
4288	4301	MDRV_VIDEO_START(gstrik2)
4289	4302	MDRV_VIDEO_UPDATE(metro)
4290	4303
	4304	MDRV_K053936_ADD("k053936", gstrik2_k053936_intf)
	4305
4291	4306	/* sound hardware */
4292	4307	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
4293	4308

src/mame/drivers/angelkds.c

r6740	r6741
130	130	#include "cpu/z80/z80.h"
131	131	#include "machine/segacrpt.h"
132	132	#include "sound/2203intf.h"
133		#include "angelkds.h"
	133	#include "includes/angelkds.h"
134	134
135	135	static READ8_HANDLER( angelkds_main_sound_r );
136	136	static WRITE8_HANDLER( angelkds_main_sound_w );

src/mame/drivers/jrpacman.c

r6740	r6741
100	100
101	101	#include "driver.h"
102	102	#include "cpu/z80/z80.h"
103		#include "pacman.h"
	103	#include "includes/pacman.h"
104	104	#include "sound/namco.h"
105	105
106	106
r6740	r6741
120	120
121	121	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
122	122	AM_RANGE(0x0000, 0x3fff) AM_ROM
123		AM_RANGE(0x4000, 0x47ff) AM_RAM_WRITE(jrpacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
	123	AM_RANGE(0x4000, 0x47ff) AM_RAM_WRITE(jrpacman_videoram_w) AM_BASE(&pacman_videoram)
124	124	AM_RANGE(0x4800, 0x4fef) AM_RAM
125	125	AM_RANGE(0x4ff0, 0x4fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
126	126	AM_RANGE(0x5000, 0x503f) AM_READ_PORT("P1")

src/mame/drivers/namcond1.c

r6740	r6741
69	69	#include "cpu/m68000/m68000.h"
70	70	#include "video/ygv608.h"
71	71	#include "cpu/h83002/h8.h"
72		#include "namcond1.h"
	72	#include "includes/namcond1.h"
73	73	#include "sound/c352.h"
74	74	#include "machine/at28c16.h"
75	75

src/mame/drivers/surpratk.c

r6740	r6741
10	10
11	11	#include "driver.h"
12	12	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
13		#include "video/konamiic.h"
	13	#include "video/konicdev.h"
14	14	#include "sound/2151intf.h"
15		#include "konamipt.h"
	15	#include "includes/konamipt.h"
16	16
17	17	/* prototypes */
18	18	static MACHINE_RESET( surpratk );
19	19	static KONAMI_SETLINES_CALLBACK( surpratk_banking );
20		VIDEO_START( surpratk );
21	20	VIDEO_UPDATE( surpratk );
22	21
	22	extern void surpratk_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	23	extern void surpratk_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
23	24
	25
24	26	static int videobank;
25	27	static UINT8 *ram;
26	28
27	29	static INTERRUPT_GEN( surpratk_interrupt )
28	30	{
29		if (K052109_is_IRQ_enabled()) cpu_set_input_line(device,0,HOLD_LINE);
	31	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	32	if (k052109_is_irq_enabled(k052109))
	33	cpu_set_input_line(device,0,HOLD_LINE);
30	34	}
31	35
32	36	static READ8_HANDLER( bankedram_r )
33	37	{
	38	const device_config *k053244 = devtag_get_device(space->machine, "k053244");
34	39	if (videobank & 0x02)
35	40	{
36	41	if (videobank & 0x04)
r6740	r6741
39	44	return space->machine->generic.paletteram.u8[offset];
40	45	}
41	46	else if (videobank & 0x01)
42		return K053245_r(space,offset);
	47	return k053245_r(k053244, offset);
43	48	else
44	49	return ram[offset];
45	50	}
46	51
47	52	static WRITE8_HANDLER( bankedram_w )
48	53	{
	54	const device_config *k053244 = devtag_get_device(space->machine, "k053244");
49	55	if (videobank & 0x02)
50	56	{
51	57	if (videobank & 0x04)
r6740	r6741
54	60	paletteram_xBBBBBGGGGGRRRRR_be_w(space,offset,data);
55	61	}
56	62	else if (videobank & 0x01)
57		K053245_w(space,offset,data);
	63	k053245_w(k053244, offset, data);
58	64	else
59	65	ram[offset] = data;
60	66	}
r6740	r6741
70	76
71	77	static WRITE8_HANDLER( surpratk_5fc0_w )
72	78	{
	79	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
73	80	if ((data & 0xf4) != 0x10) logerror("%04x: 3fc0 = %02x\n",cpu_get_pc(space->cpu),data);
74	81
75	82	/* bit 0/1 = coin counters */
r6740	r6741
77	84	coin_counter_w(space->machine, 1,data & 0x02);
78	85
79	86	/* bit 3 = enable char ROM reading through the video RAM */
80		K052109_set_RMRD_line( ( data & 0x08 ) ? ASSERT_LINE : CLEAR_LINE );
	87	k052109_set_rmrd_line(k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
81	88
82	89	/* other bits unknown */
83	90	}
r6740	r6741
94	101	AM_RANGE(0x5f8e, 0x5f8e) AM_READ_PORT("DSW3")
95	102	AM_RANGE(0x5f8f, 0x5f8f) AM_READ_PORT("DSW1")
96	103	AM_RANGE(0x5f90, 0x5f90) AM_READ_PORT("DSW2")
97		AM_RANGE(0x5fa0, 0x5faf) AM_READWRITE(K053244_r, K053244_w)
98		AM_RANGE(0x5fb0, 0x5fbf) AM_WRITE(K053251_w)
	104	AM_RANGE(0x5fa0, 0x5faf) AM_DEVREADWRITE("k053244", k053244_r, k053244_w)
	105	AM_RANGE(0x5fb0, 0x5fbf) AM_DEVWRITE("k053251", k053251_w)
99	106	AM_RANGE(0x5fc0, 0x5fc0) AM_READWRITE(watchdog_reset_r, surpratk_5fc0_w)
100	107	AM_RANGE(0x5fd0, 0x5fd1) AM_DEVWRITE("ymsnd", ym2151_w)
101	108	AM_RANGE(0x5fc4, 0x5fc4) AM_WRITE(surpratk_videobank_w)
102		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(K052109_r, K052109_w)
	109	AM_RANGE(0x4000, 0x7fff) AM_DEVREADWRITE("k052109", k052109_r, k052109_w)
103	110	AM_RANGE(0x8000, 0xffff) AM_ROM               /* ROM */
104	111	ADDRESS_MAP_END
105	112
r6740	r6741
175	182
176	183
177	184
	185	static const k052109_interface surpratk_k052109_intf =
	186	{
	187	"gfx1", 0,
	188	NORMAL_PLANE_ORDER,
	189	KONAMI_ROM_DEINTERLEAVE_2,
	190	surpratk_tile_callback
	191	};
	192
	193	static const k05324x_interface surpratk_k05324x_intf =
	194	{
	195	"gfx2", 1,
	196	NORMAL_PLANE_ORDER,
	197	0, 0,
	198	KONAMI_ROM_DEINTERLEAVE_2,
	199	surpratk_sprite_callback
	200	};
	201
178	202	static MACHINE_DRIVER_START( surpratk )
179	203
180	204	/* basic machine hardware */
r6740	r6741
196	220
197	221	MDRV_PALETTE_LENGTH(2048)
198	222
199		MDRV_VIDEO_START(surpratk)
200	223	MDRV_VIDEO_UPDATE(surpratk)
201	224
	225	MDRV_K052109_ADD("k052109", surpratk_k052109_intf)
	226	MDRV_K053244_ADD("k053244", surpratk_k05324x_intf)
	227	MDRV_K053251_ADD("k053251")
	228
202	229	/* sound hardware */
203	230	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
204	231
r6740	r6741
285	312	machine->generic.paletteram.u8 = &memory_region(machine, "maincpu")[0x48000];
286	313	}
287	314
288		static DRIVER_INIT( surpratk )
289		{
290		konami_rom_deinterleave_2(machine, "gfx1");
291		konami_rom_deinterleave_2(machine, "gfx2");
292		}
293	315
294
295		GAME( 1990, suratk,  0,      surpratk, surpratk, surpratk, ROT0, "Konami", "Surprise Attack (World ver. K)", 0 )
296		GAME( 1990, suratka, suratk, surpratk, surpratk, surpratk, ROT0, "Konami", "Surprise Attack (Asia ver. L)", 0 )
297		GAME( 1990, suratkj, suratk, surpratk, surpratk, surpratk, ROT0, "Konami", "Surprise Attack (Japan ver. M)", 0 )
	316	GAME( 1990, suratk,  0,      surpratk, surpratk, 0, ROT0, "Konami", "Surprise Attack (World ver. K)", 0 )
	317	GAME( 1990, suratka, suratk, surpratk, surpratk, 0, ROT0, "Konami", "Surprise Attack (Asia ver. L)", 0 )
	318	GAME( 1990, suratkj, suratk, surpratk, surpratk, 0, ROT0, "Konami", "Surprise Attack (Japan ver. M)", 0 )

src/mame/drivers/tagteam.c

r6740	r6741
30	30	#include "sound/ay8910.h"
31	31	#include "sound/dac.h"
32	32
	33	extern UINT8 *tagteam_videoram;
	34	extern UINT8 *tagteam_colorram;
	35
33	36	extern WRITE8_HANDLER( tagteam_videoram_w );
34	37	extern WRITE8_HANDLER( tagteam_colorram_w );
35	38	extern READ8_HANDLER( tagteam_mirrorvideoram_r );
r6740	r6741
60	63	AM_RANGE(0x4000, 0x43ff) AM_READWRITE(tagteam_mirrorvideoram_r, tagteam_mirrorvideoram_w)
61	64	AM_RANGE(0x4400, 0x47ff) AM_READWRITE(tagteam_mirrorcolorram_r, tagteam_mirrorcolorram_w)
62	65	AM_RANGE(0x4800, 0x4fff) AM_READONLY
63		AM_RANGE(0x4800, 0x4bff) AM_WRITE(tagteam_videoram_w) AM_BASE_GENERIC(videoram)
64		AM_RANGE(0x4c00, 0x4fff) AM_WRITE(tagteam_colorram_w) AM_BASE_GENERIC(colorram)
	66	AM_RANGE(0x4800, 0x4bff) AM_WRITE(tagteam_videoram_w) AM_BASE(&tagteam_videoram)
	67	AM_RANGE(0x4c00, 0x4fff) AM_WRITE(tagteam_colorram_w) AM_BASE(&tagteam_colorram)
65	68	AM_RANGE(0x8000, 0xffff) AM_ROM
66	69	ADDRESS_MAP_END
67	70

src/mame/drivers/eolith.c

r6740	r6741
65	65
66	66	static int coin_counter_bit = 0;
67	67
68		#include "eolithsp.h"
	68	#include "includes/eolithsp.h"
69	69
70	70	// It's configured for 512 bytes
71	71	static const eeprom_interface eeprom_interface_93C66 =

src/mame/drivers/chihiro.c

r6740	r6741
37	37	#include "driver.h"
38	38	#include "cpu/i386/i386.h"
39	39	#include "video/generic.h"
40		#include "naomibd.h"
	40	#include "includes/naomibd.h"
41	41
42	42	static ADDRESS_MAP_START( xbox_map, ADDRESS_SPACE_PROGRAM, 32 )
43	43	AM_RANGE(0x00000000, 0x0007ffff) AM_RAM

src/mame/drivers/commando.c

r6740	r6741
46	46	#include "cpu/z80/z80.h"
47	47	#include "deprecat.h"
48	48	#include "sound/2203intf.h"
49		#include "commando.h"
	49	#include "includes/commando.h"
50	50
51	51
52	52	/* Memory Maps */

src/mame/drivers/atarisy2.c

r6740	r6741
126	126	#include "driver.h"
127	127	#include "cpu/m6502/m6502.h"
128	128	#include "cpu/t11/t11.h"
129		#include "slapstic.h"
130		#include "atarisy2.h"
	129	#include "includes/slapstic.h"
	130	#include "includes/atarisy2.h"
131	131	#include "sound/tms5220.h"
132	132	#include "sound/2151intf.h"
133	133	#include "sound/pokey.h"
r6740	r6741
225	225	static MACHINE_START( atarisy2 )
226	226	{
227	227	atarisy2_state *state = (atarisy2_state *)machine->driver_data;
	228	atarigen_init(machine);
	229
228	230	state_save_register_global(machine, state->interrupt_enable);
229	231	state_save_register_global(machine, state->tms5220_data);
230	232	state_save_register_global(machine, state->tms5220_data_strobe);

src/mame/drivers/skydiver.c

r6740	r6741
89	89	#include "driver.h"
90	90	#include "cpu/m6800/m6800.h"
91	91	#include "deprecat.h"
92		#include "skydiver.h"
	92	#include "includes/skydiver.h"
93	93	#include "sound/discrete.h"
94	94
95	95	#define MASTER_CLOCK (XTAL_12_096MHz)

src/mame/drivers/ninjakd2.c

r6740	r6741
133	133	#include "sound/2203intf.h"
134	134	#include "sound/samples.h"
135	135	#include "machine/mc8123.h"
136		#include "ninjakd2.h"
	136	#include "includes/ninjakd2.h"
137	137
138	138	#define MAIN_CLOCK_12 XTAL_12MHz
139	139	#define MAIN_CLOCK_5  XTAL_5MHz

src/mame/drivers/warpwarp.c

r6740	r6741
128	128
129	129	#include "driver.h"
130	130	#include "cpu/i8085/i8085.h"
131		#include "warpwarp.h"
	131	#include "includes/warpwarp.h"
132	132	#include "geebee.lh"
133	133	#include "sos.lh"
134	134

src/mame/drivers/spacefb.c

r6740	r6741
106	106
107	107	#include "driver.h"
108	108	#include "cpu/z80/z80.h"
109		#include "spacefb.h"
	109	#include "includes/spacefb.h"
110	110	#include "cpu/mcs48/mcs48.h"
111	111	#include "sound/dac.h"
112	112

src/mame/drivers/m52.c

r6740	r6741
43	43	***************************************************************************/
44	44
45	45	#include "driver.h"
46		#include "iremipt.h"
	46	#include "includes/iremipt.h"
47	47	#include "includes/iremz80.h"
48	48	#include "cpu/z80/z80.h"
49	49

src/mame/drivers/wheelfir.c

r6740	r6741
540	540	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
541	541	INPUT_PORTS_END
542	542
543		static emu_timer* frame_timer;
544		static emu_timer* scanline_timer;
	543	static const device_config* frame_timer;
	544	static const device_config* scanline_timer;
545	545
546		static TIMER_CALLBACK( frame_timer_callback )
	546	static TIMER_DEVICE_CALLBACK( frame_timer_callback )
547	547	{
548	548	/* callback */
549	549	}
r6740	r6741
570	570
571	571	}
572	572
573		static TIMER_CALLBACK( scanline_timer_callback )
	573	static TIMER_DEVICE_CALLBACK( scanline_timer_callback )
574	574	{
575		timer_call_after_resynch(machine, NULL, 0, 0);
	575	timer_call_after_resynch(timer->machine, NULL, 0, 0);
576	576
577	577	if (scanline_counter != (total_scanlines - 1))
578	578	{
579	579	scanline_counter++;
580		cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE); // raster IRQ, changes scroll values for road
581		timer_adjust_oneshot(scanline_timer, attotime_div(ATTOTIME_IN_HZ(60), total_scanlines), 0);
	580	cputag_set_input_line(timer->machine, "maincpu", 5, HOLD_LINE); // raster IRQ, changes scroll values for road
	581	timer_device_adjust_oneshot(timer, attotime_div(ATTOTIME_IN_HZ(60), total_scanlines), 0);
582	582
583	583	if (scanline_counter < 256)
584	584	{
r6740	r6741
587	587
588	588	if (scanline_counter == 256)
589	589	{
590		cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE); // vblank IRQ?
	590	cputag_set_input_line(timer->machine, "maincpu", 3, HOLD_LINE); // vblank IRQ?
591	591	toggle_bit = 0x8000; // must toggle..
592	592	}
593	593
r6740	r6741
609	609	scanline_counter = -1;
610	610	bitmap_fill(wheelfir_tmp_bitmap[0], video_screen_get_visible_area(machine->primary_screen),0);
611	611
612		timer_adjust_oneshot(frame_timer,  attotime_zero, 0);
613		timer_adjust_oneshot(scanline_timer,  attotime_zero, 0);
	612	timer_device_adjust_oneshot(frame_timer,  attotime_zero, 0);
	613	timer_device_adjust_oneshot(scanline_timer,  attotime_zero, 0);
614	614	}
615	615
616	616	static MACHINE_RESET(wheelfir)
617	617	{
618		frame_timer = timer_alloc(machine, frame_timer_callback, NULL);
619		scanline_timer = timer_alloc(machine, scanline_timer_callback, NULL);
620		timer_adjust_oneshot(frame_timer, attotime_zero, 0);
621		timer_adjust_oneshot(scanline_timer,  attotime_zero, 0);
	618	frame_timer = devtag_get_device(machine, "frame_timer");
	619	scanline_timer = devtag_get_device(machine, "scan_timer");
	620	timer_device_adjust_oneshot(frame_timer, attotime_zero, 0);
	621	timer_device_adjust_oneshot(scanline_timer,  attotime_zero, 0);
622	622	scanline_counter = -1;
623	623	}
624	624
r6740	r6741
640	640
641	641	MDRV_MACHINE_RESET (wheelfir)
642	642
	643	MDRV_TIMER_ADD("frame_timer", frame_timer_callback)
	644	MDRV_TIMER_ADD("scan_timer", scanline_timer_callback)
643	645
644	646	MDRV_SCREEN_ADD("screen", RASTER)
645	647	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/nbmj8891.c

r6740	r6741
43	43
44	44	#include "driver.h"
45	45	#include "cpu/z80/z80.h"
46		#include "nb1413m3.h"
	46	#include "includes/nb1413m3.h"
47	47	#include "sound/dac.h"
48	48	#include "sound/ay8910.h"
49	49	#include "sound/3812intf.h"

src/mame/drivers/liberate.c

r6740	r6741
18	18	#include "cpu/m6502/m6502.h"
19	19	#include "sound/ay8910.h"
20	20
	21	extern UINT8 *liberate_videoram;
	22	extern UINT8 *liberate_colorram;
	23
21	24	PALETTE_INIT( liberate );
22	25	VIDEO_UPDATE( prosoccr );
23	26	VIDEO_UPDATE( prosport );
r6740	r6741
56	59	return ROM[offset];
57	60
58	61	/* Else the handler falls through to read the usual address */
59		if (offset<0x400) return space->machine->generic.colorram.u8[offset];
60		if (offset<0x800) return space->machine->generic.videoram.u8[offset-0x400];
	62	if (offset<0x400) return liberate_colorram[offset];
	63	if (offset<0x800) return liberate_videoram[offset-0x400];
61	64	if (offset<0x1000) return space->machine->generic.spriteram.u8[offset-0x800];
62	65	if (offset<0x2200) { logerror("%04x: Unmapped bank read %04x\n",cpu_get_pc(space->cpu),offset); return 0; }
63	66	if (offset<0x2800) return scratchram[offset-0x2200];
r6740	r6741
99	102	return ROM[offset];
100	103
101	104	/* Else the handler falls through to read the usual address */
102		if (offset<0x400) return space->machine->generic.colorram.u8[offset];
103		if (offset<0x800) return space->machine->generic.videoram.u8[offset-0x400];
104		if (offset<0xc00) return space->machine->generic.colorram.u8[offset-0x800];
	105	if (offset<0x400) return liberate_colorram[offset];
	106	if (offset<0x800) return liberate_videoram[offset-0x400];
	107	if (offset<0xc00) return liberate_colorram[offset-0x800];
105	108	if (offset<0x1000) return space->machine->generic.spriteram.u8[offset-0xc00];
106	109	if (offset<0x2200) { logerror("%04x: Unmapped bank read %04x\n",cpu_get_pc(space->cpu),offset); return 0; }
107	110	if (offset<0x2800) return scratchram[offset-0x2200];
r6740	r6741
246	249	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(prosport_bg_vram_w) AM_BASE(&prosport_bg_vram)
247	250	AM_RANGE(0x0800, 0x1fff) AM_READWRITE(prosport_charram_r,prosport_charram_w) //0x1e00-0x1fff isn't charram!
248	251	AM_RANGE(0x2400, 0x2fff) AM_RAM
249		AM_RANGE(0x3000, 0x33ff) AM_RAM_WRITE(liberate_colorram_w) AM_BASE_GENERIC(colorram)
250		AM_RANGE(0x3400, 0x37ff) AM_RAM_WRITE(liberate_videoram_w) AM_BASE_GENERIC(videoram)
	252	AM_RANGE(0x3000, 0x33ff) AM_RAM_WRITE(liberate_colorram_w) AM_BASE(&liberate_colorram)
	253	AM_RANGE(0x3400, 0x37ff) AM_RAM_WRITE(liberate_videoram_w) AM_BASE(&liberate_videoram)
251	254	AM_RANGE(0x3800, 0x3fff) AM_RAM AM_BASE_GENERIC(spriteram)
252	255	AM_RANGE(0x8000, 0x800f) AM_WRITE(prosport_io_w)
253	256	AM_RANGE(0x8000, 0x800f) AM_ROMBANK("bank1")
r6740	r6741
258	261	AM_RANGE(0x0000, 0x0fff) AM_RAM
259	262	AM_RANGE(0x1000, 0x3fff) AM_ROM /* Mirror of main rom */
260	263	AM_RANGE(0x4000, 0x7fff) AM_READ(deco16_bank_r)
261		AM_RANGE(0x4000, 0x43ff) AM_WRITE(liberate_colorram_w) AM_BASE_GENERIC(colorram)
262		AM_RANGE(0x4400, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE_GENERIC(videoram)
	264	AM_RANGE(0x4000, 0x43ff) AM_WRITE(liberate_colorram_w) AM_BASE(&liberate_colorram)
	265	AM_RANGE(0x4400, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE(&liberate_videoram)
263	266	AM_RANGE(0x4800, 0x4fff) AM_WRITEONLY AM_BASE_GENERIC(spriteram)
264	267	AM_RANGE(0x6200, 0x67ff) AM_RAM AM_BASE(&scratchram)
265	268	AM_RANGE(0x8000, 0x800f) AM_WRITE(deco16_io_w)
r6740	r6741
271	274	AM_RANGE(0x0000, 0x0fff) AM_RAM
272	275	AM_RANGE(0x1000, 0x3fff) AM_ROM /* Mirror of main rom */
273	276	AM_RANGE(0x4000, 0x7fff) AM_READ(prosoccr_bank_r)
274		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x800) AM_WRITE(liberate_colorram_w) AM_BASE_GENERIC(colorram)
275		AM_RANGE(0x4400, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE_GENERIC(videoram)
	277	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x800) AM_WRITE(liberate_colorram_w) AM_BASE(&liberate_colorram)
	278	AM_RANGE(0x4400, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE(&liberate_videoram)
276	279	AM_RANGE(0x4c00, 0x4fff) AM_WRITEONLY AM_BASE_GENERIC(spriteram)
277	280	AM_RANGE(0x6200, 0x67ff) AM_RAM AM_BASE(&scratchram)
278	281	AM_RANGE(0x8000, 0x97ff) AM_READWRITE(prosoccr_charram_r,prosoccr_charram_w)
r6740	r6741
295	298	AM_RANGE(0x0000, 0x0fff) AM_RAM
296	299	AM_RANGE(0x1000, 0x3fff) AM_ROM /* Mirror of main rom */
297	300	AM_RANGE(0x4000, 0x7fff) AM_READ(deco16_bank_r)
298		AM_RANGE(0x4000, 0x43ff) AM_WRITE(liberate_colorram_w) AM_BASE_GENERIC(colorram)
299		AM_RANGE(0x4400, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE_GENERIC(videoram)
	301	AM_RANGE(0x4000, 0x43ff) AM_WRITE(liberate_colorram_w) AM_BASE(&liberate_colorram)
	302	AM_RANGE(0x4400, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE(&liberate_videoram)
300	303	AM_RANGE(0x4800, 0x4fff) AM_WRITEONLY AM_BASE_GENERIC(spriteram)
301	304	AM_RANGE(0x6200, 0x67ff) AM_WRITEONLY AM_BASE(&scratchram)
302	305	AM_RANGE(0xf000, 0xf00f) AM_WRITE(deco16_io_w)

src/mame/drivers/seta.c

r6740	r6741
1301	1301	#include "cpu/m68000/m68000.h"
1302	1302	#include "cpu/m6502/m6502.h"
1303	1303	#include "deprecat.h"
1304		#include "seta.h"
	1304	#include "includes/seta.h"
1305	1305	#include "machine/6821pia.h"
1306	1306	#include "machine/6850acia.h"
1307	1307	#include "machine/msm6242.h"
r6740	r6741
7455	7455	cpu_set_input_line(device, 2, HOLD_LINE );
7456	7456	}
7457	7457
7458		static MACHINE_RESET( wrofaero ) { uPD71054_timer_init(machine); }
	7458	static MACHINE_START( wrofaero ) { uPD71054_timer_init(machine); }
7459	7459	#endif   // __uPD71054_TIMER
7460	7460
7461	7461
r6740	r6741
7479	7479	#endif   // __uPD71054_TIMER
7480	7480
7481	7481	#if   __uPD71054_TIMER
7482		MDRV_MACHINE_RESET( wrofaero )
	7482	MDRV_MACHINE_START( wrofaero )
7483	7483	#endif   // __uPD71054_TIMER
7484	7484
7485	7485	/* video hardware */
r6740	r6741
7590	7590	MDRV_CPU_VBLANK_INT("screen", wrofaero_interrupt)
7591	7591
7592	7592	#if   __uPD71054_TIMER
7593		MDRV_MACHINE_RESET( wrofaero )
	7593	MDRV_MACHINE_START( wrofaero )
7594	7594	#endif   // __uPD71054_TIMER
7595	7595
7596	7596	/* video hardware */
r6740	r6741
7738	7738	MDRV_CPU_VBLANK_INT("screen", wrofaero_interrupt)
7739	7739
7740	7740	#if   __uPD71054_TIMER
7741		MDRV_MACHINE_RESET( wrofaero )
	7741	MDRV_MACHINE_START( wrofaero )
7742	7742	#endif   // __uPD71054_TIMER
7743	7743
7744	7744	/* video hardware */
r6740	r6741
7784	7784	#endif   // __uPD71054_TIMER
7785	7785
7786	7786	#if   __uPD71054_TIMER
7787		MDRV_MACHINE_RESET( wrofaero )
	7787	MDRV_MACHINE_START( wrofaero )
7788	7788	#endif   // __uPD71054_TIMER
7789	7789
7790	7790	/* video hardware */
r6740	r6741
8154	8154	#endif   // __uPD71054_TIMER
8155	8155
8156	8156	#if   __uPD71054_TIMER
8157		MDRV_MACHINE_RESET( wrofaero )
	8157	MDRV_MACHINE_START( wrofaero )
8158	8158	#endif   // __uPD71054_TIMER
8159	8159
8160	8160	/* video hardware */

src/mame/drivers/laserbat.c

r6740	r6741
684	684	static const s2636_interface s2636_1_config =
685	685	{
686	686	"screen",
687		0xff,
	687	0x100,
688	688	0, -19
689	689	};
690	690
691	691	static const s2636_interface s2636_2_config =
692	692	{
693	693	"screen",
694		0xff,
	694	0x100,
695	695	0, -19
696	696	};
697	697
698	698	static const s2636_interface s2636_3_config =
699	699	{
700	700	"screen",
701		0xff,
	701	0x100,
702	702	0, -19
703	703	};
704	704

src/mame/drivers/tp84.c

r6740	r6741
69	69	#include "cpu/m6809/m6809.h"
70	70	#include "sound/sn76496.h"
71	71	#include "sound/flt_rc.h"
72		#include "konamipt.h"
	72	#include "includes/konamipt.h"
73	73
74	74	extern UINT8 *tp84_bg_videoram;
75	75	extern UINT8 *tp84_bg_colorram;

src/mame/drivers/naomi.c

r6740	r6741
1049	1049	#include "video/generic.h"
1050	1050	#include "machine/eeprom.h"
1051	1051	#include "machine/intelfsh.h"
1052		#include "naomibd.h"
1053		#include "naomi.h"
	1052	#include "includes/naomibd.h"
	1053	#include "includes/naomi.h"
1054	1054	#include "cpu/sh4/sh4.h"
1055	1055	#include "cpu/arm7/arm7core.h"
1056	1056	#include "sound/aica.h"
1057		#include "dc.h"
	1057	#include "includes/dc.h"
1058	1058
1059	1059	#define CPU_CLOCK (200000000)
1060	1060	static UINT32 *dc_sound_ram;
r6740	r6741
1903	1903	EPR-21577g - NAOMI BOOT ROM 2001 09/10  1.70 (USA)
1904	1904	EPR-21577e - NAOMI BOOT ROM 2000 08/25  1.50 (USA)
1905	1905	EPR-21577d - NAOMI BOOT ROM 1999 06/04  1.40 (USA)
	1906	EPR-21578h - NAOMI BOOT ROM 2002 07/08  1.8- (Export)
	1907	EPR-21578g - NAOMI BOOT ROM 2001 09/10  1.70 (Export)
1906	1908	EPR-21578e - NAOMI BOOT ROM 2000 08/25  1.50 (Export)
1907	1909	EPR-21578d - NAOMI BOOT ROM 1999 06/04  1.40 (Export)
1908	1910	EPR-21578b - NAOMI BOOT ROM 1999 02/15  1.20 (Export)
1909	1911	EPR-21579  - No known dump (Korea)
1910	1912	EPR-21580  - No known dump (Australia)
1911		EPR-22851  - NAOMI BOOT ROM 1999 08/30  1.35 (Multisystem 3 screen Ferrari F355)
1912	1913
1913	1914	EPR-21577e & EPR-2178e differ by 7 bytes:
1914	1915
r6740	r6741
1973	1974	ROM_LOAD16_WORD_SWAP_BIOS( 4, "epr-21576b.bin",  0x000000, 0x200000, CRC(755a6e07) SHA1(7e8b8ccfc063144d89668e7224dcd8a36c54f3b3) ) \
1974	1975	ROM_SYSTEM_BIOS( 5, "bios5", "epr-21576 (Japan)" ) \
1975	1976	ROM_LOAD16_WORD_SWAP_BIOS( 5, "epr-21576.bin", 0x000000, 0x200000, CRC(9dad3495) SHA1(5fb66f9a2b68d120f059c72758e65d34f461044a) ) \
1976		ROM_SYSTEM_BIOS( 6, "bios6", "epr-21578g (Export)" ) \
1977		ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-21578g.ic27", 0x000000, 0x200000, CRC(55413214) SHA1(bd2748365a9fc1821c9369aa7155d7c41c4df43e) ) \
1978		ROM_SYSTEM_BIOS( 7, "bios7", "epr-21578e (Export)" ) \
1979		ROM_LOAD16_WORD_SWAP_BIOS( 7, "epr-21578e.bin",  0x000000, 0x200000, CRC(087f09a3) SHA1(0418eb2cf9766f0b1b874a4e92528779e22c0a4a) ) \
1980		ROM_SYSTEM_BIOS( 8, "bios8", "epr-21578d (Export)" ) \
1981		ROM_LOAD16_WORD_SWAP_BIOS( 8, "epr-21578d.bin",  0x000000, 0x200000, CRC(dfd5f42a) SHA1(614a0db4743a5e5a206190d6786ade24325afbfd) ) \
1982		ROM_SYSTEM_BIOS( 9, "bios9", "epr-21578b (Export)" ) \
1983		ROM_LOAD16_WORD_SWAP_BIOS( 9, "epr-21578b.bin",  0x000000, 0x200000, CRC(6c9aad83) SHA1(555918de76d8dbee2a97d8a95297ef694b3e803f) ) \
1984		ROM_SYSTEM_BIOS( 10, "bios10", "epr-21577g (USA)" ) \
1985		ROM_LOAD16_WORD_SWAP_BIOS( 10, "epr-21577g.bin",  0x000000, 0x200000, CRC(25f64af7) SHA1(99f9e6cc0642319bd2da492611220540add573e8) ) \
1986		ROM_SYSTEM_BIOS( 11, "bios11", "epr-21577e (USA)" ) \
1987		ROM_LOAD16_WORD_SWAP_BIOS( 11, "epr-21577e.bin",  0x000000, 0x200000, CRC(cf36e97b) SHA1(b085305982e7572e58b03a9d35f17ae319c3bbc6) ) \
1988		ROM_SYSTEM_BIOS( 12, "bios12", "epr-21577d (USA)" ) \
1989		ROM_LOAD16_WORD_SWAP_BIOS( 12, "epr-21577d.bin",  0x000000, 0x200000, CRC(60ddcbbe) SHA1(58b15096d269d6df617ca1810b66b47deb184958) ) \
1990		ROM_SYSTEM_BIOS( 13, "bios13", "Naomi Dev BIOS" ) \
1991		ROM_LOAD16_WORD_SWAP_BIOS( 13,  "dcnaodev.bios", 0x000000, 0x080000, CRC(7a50fab9) SHA1(ef79f448e0bf735d1264ad4f051d24178822110f) ) /* This one comes from a dev / beta board. The eprom was a 27C4096 */
	1977	ROM_SYSTEM_BIOS( 6, "bios6", "epr-21578h (Export)" ) \
	1978	ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-21578h.ic27", 0x000000, 0x200000, CRC(7b452946) SHA1(8e9f153bbada24b37066dc45b64a7bf0d4f26a9b) ) \
	1979	ROM_SYSTEM_BIOS( 7, "bios7", "epr-21578g (Export)" ) \
	1980	ROM_LOAD16_WORD_SWAP_BIOS( 7, "epr-21578g.ic27", 0x000000, 0x200000, CRC(55413214) SHA1(bd2748365a9fc1821c9369aa7155d7c41c4df43e) ) \
	1981	ROM_SYSTEM_BIOS( 8, "bios8", "epr-21578e (Export)" ) \
	1982	ROM_LOAD16_WORD_SWAP_BIOS( 8, "epr-21578e.bin",  0x000000, 0x200000, CRC(087f09a3) SHA1(0418eb2cf9766f0b1b874a4e92528779e22c0a4a) ) \
	1983	ROM_SYSTEM_BIOS( 9, "bios9", "epr-21578d (Export)" ) \
	1984	ROM_LOAD16_WORD_SWAP_BIOS( 9, "epr-21578d.bin",  0x000000, 0x200000, CRC(dfd5f42a) SHA1(614a0db4743a5e5a206190d6786ade24325afbfd) ) \
	1985	ROM_SYSTEM_BIOS( 10, "bios10", "epr-21578b (Export)" ) \
	1986	ROM_LOAD16_WORD_SWAP_BIOS( 10, "epr-21578b.bin",  0x000000, 0x200000, CRC(6c9aad83) SHA1(555918de76d8dbee2a97d8a95297ef694b3e803f) ) \
	1987	ROM_SYSTEM_BIOS( 11, "bios11", "epr-21577g (USA)" ) \
	1988	ROM_LOAD16_WORD_SWAP_BIOS( 11, "epr-21577g.bin",  0x000000, 0x200000, CRC(25f64af7) SHA1(99f9e6cc0642319bd2da492611220540add573e8) ) \
	1989	ROM_SYSTEM_BIOS( 12, "bios12", "epr-21577e (USA)" ) \
	1990	ROM_LOAD16_WORD_SWAP_BIOS( 12, "epr-21577e.bin",  0x000000, 0x200000, CRC(cf36e97b) SHA1(b085305982e7572e58b03a9d35f17ae319c3bbc6) ) \
	1991	ROM_SYSTEM_BIOS( 13, "bios13", "epr-21577d (USA)" ) \
	1992	ROM_LOAD16_WORD_SWAP_BIOS( 13, "epr-21577d.bin",  0x000000, 0x200000, CRC(60ddcbbe) SHA1(58b15096d269d6df617ca1810b66b47deb184958) ) \
	1993	ROM_SYSTEM_BIOS( 14, "bios14", "Naomi Dev BIOS" ) \
	1994	ROM_LOAD16_WORD_SWAP_BIOS( 14,  "dcnaodev.bios", 0x000000, 0x080000, CRC(7a50fab9) SHA1(ef79f448e0bf735d1264ad4f051d24178822110f) ) /* This one comes from a dev / beta board. The eprom was a 27C4096 */
1992	1995
1993	1996	// bios for House of the Dead 2
1994	1997	#define HOTD2_BIOS \
r6740	r6741
2020	2023	ROM_LOAD16_WORD_SWAP_BIOS( 2, "epr-21576h.bin",  0x000000, 0x200000, CRC(d4895685) SHA1(91424d481ff99a8d3f4c45cea6d3f0eada049a6d) ) \
2021	2024	ROM_SYSTEM_BIOS( 3, "bios3", "epr-21576d (Japan)" ) \
2022	2025	ROM_LOAD16_WORD_SWAP_BIOS( 3, "epr-21576d.bin",  0x000000, 0x200000, CRC(3b2afa7b) SHA1(d007e1d321c198a38c5baff86eb2ab84385d150a) ) \
2023		ROM_SYSTEM_BIOS( 4, "bios4", "epr-21578e (Export)" ) \
2024		ROM_LOAD16_WORD_SWAP_BIOS( 4, "epr-21578e.bin",  0x000000, 0x200000, CRC(087f09a3) SHA1(0418eb2cf9766f0b1b874a4e92528779e22c0a4a) ) \
2025		ROM_SYSTEM_BIOS( 5, "bios5", "epr-21578d (Export)" ) \
2026		ROM_LOAD16_WORD_SWAP_BIOS( 5, "epr-21578d.bin",  0x000000, 0x200000, CRC(dfd5f42a) SHA1(614a0db4743a5e5a206190d6786ade24325afbfd) ) \
2027		ROM_SYSTEM_BIOS( 6, "bios6", "epr-21577g (USA)" ) \
2028		ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-21577g.bin",  0x000000, 0x200000, CRC(25f64af7) SHA1(99f9e6cc0642319bd2da492611220540add573e8) ) \
2029		ROM_SYSTEM_BIOS( 7, "bios7", "epr-21577e (USA)" ) \
2030		ROM_LOAD16_WORD_SWAP_BIOS( 7, "epr-21577e.bin",  0x000000, 0x200000, CRC(cf36e97b) SHA1(b085305982e7572e58b03a9d35f17ae319c3bbc6) ) \
2031		ROM_SYSTEM_BIOS( 8, "bios8", "epr-21577d (USA)" ) \
2032		ROM_LOAD16_WORD_SWAP_BIOS( 8, "epr-21577d.bin",  0x000000, 0x200000, CRC(60ddcbbe) SHA1(58b15096d269d6df617ca1810b66b47deb184958) ) \
	2026	ROM_SYSTEM_BIOS( 4, "bios4", "epr-21578h (Export)" ) \
	2027	ROM_LOAD16_WORD_SWAP_BIOS( 4, "epr-21578h.ic27", 0x000000, 0x200000, CRC(7b452946) SHA1(8e9f153bbada24b37066dc45b64a7bf0d4f26a9b) ) \
	2028	ROM_SYSTEM_BIOS( 5, "bios5", "epr-21578g (Export)" ) \
	2029	ROM_LOAD16_WORD_SWAP_BIOS( 5, "epr-21578g.ic27", 0x000000, 0x200000, CRC(55413214) SHA1(bd2748365a9fc1821c9369aa7155d7c41c4df43e) ) \
	2030	ROM_SYSTEM_BIOS( 6, "bios6", "epr-21578e (Export)" ) \
	2031	ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-21578e.bin",  0x000000, 0x200000, CRC(087f09a3) SHA1(0418eb2cf9766f0b1b874a4e92528779e22c0a4a) ) \
	2032	ROM_SYSTEM_BIOS( 7, "bios7", "epr-21578d (Export)" ) \
	2033	ROM_LOAD16_WORD_SWAP_BIOS( 7, "epr-21578d.bin",  0x000000, 0x200000, CRC(dfd5f42a) SHA1(614a0db4743a5e5a206190d6786ade24325afbfd) ) \
	2034	ROM_SYSTEM_BIOS( 8, "bios8", "epr-21577g (USA)" ) \
	2035	ROM_LOAD16_WORD_SWAP_BIOS( 8, "epr-21577g.bin",  0x000000, 0x200000, CRC(25f64af7) SHA1(99f9e6cc0642319bd2da492611220540add573e8) ) \
	2036	ROM_SYSTEM_BIOS( 9, "bios9", "epr-21577e (USA)" ) \
	2037	ROM_LOAD16_WORD_SWAP_BIOS( 9, "epr-21577e.bin",  0x000000, 0x200000, CRC(cf36e97b) SHA1(b085305982e7572e58b03a9d35f17ae319c3bbc6) ) \
	2038	ROM_SYSTEM_BIOS( 10, "bios10", "epr-21577d (USA)" ) \
	2039	ROM_LOAD16_WORD_SWAP_BIOS( 10, "epr-21577d.bin",  0x000000, 0x200000, CRC(60ddcbbe) SHA1(58b15096d269d6df617ca1810b66b47deb184958) ) \
2033	2040	ROM_REGION( 0x200000, "user2", 0) \
2034	2041	ROM_LOAD16_WORD_SWAP( "fpr-23489c.ic14", 0x000000, 0x200000, CRC(bc38bea1) SHA1(b36fcc6902f397d9749e9d02de1bbb7a5e29d468) ) \
2035	2042
r6740	r6741
2043	2050	EPR-23607B - NAOMI BOOT ROM 2001 09/10  1.70 (USA)
2044	2051	EPR-23608  - NAOMI BOOT ROM 2001 01/19  1.50 (Export)
2045	2052	EPR-23608B - NAOMI BOOT ROM 2001 09/10  1.70 (Export)
	2053	EPR-23608C - NAOMI BOOT ROM 2002 07/08  1.8- (Export)
2046	2054
2047	2055	EPR-23605B, EPR-23607B & EPR-23608B all differ by 8 bytes:
2048	2056
r6740	r6741
2070	2078	ROM_LOAD16_WORD_SWAP_BIOS( 2, "epr-23605a.bin",   0x000000, 0x200000, CRC(7bc3fc2d) SHA1(a4a9531a7c66ff30046908cf71f6c7b6fb59c392) ) \
2071	2079	ROM_SYSTEM_BIOS( 3, "bios3", "epr-23605 (Japan)"  ) \
2072	2080	ROM_LOAD16_WORD_SWAP_BIOS( 3, "epr-23605.bin",    0x000000, 0x200000, CRC(5731e446) SHA1(787b0844fc408cf124c12405c095c59948709ea6) ) \
2073		ROM_SYSTEM_BIOS( 4, "bios4", "epr-23608b (Export)" ) \
2074		ROM_LOAD16_WORD_SWAP_BIOS( 4, "epr-23608b.bin",   0x000000, 0x200000, CRC(a554b1e3) SHA1(343b727a3619d1c75a9b6d4cc156a9050447f155) ) \
2075		ROM_SYSTEM_BIOS( 5, "bios5", "epr-23608 (Export)"  ) \
2076		ROM_LOAD16_WORD_SWAP_BIOS( 5, "epr-23608.bin",    0x000000, 0x200000, CRC(929cc3a6) SHA1(47d00c818de23f733a4a33b1bbc72eb8aa729246) ) \
2077		ROM_SYSTEM_BIOS( 6, "bios6", "epr-23607b (USA)" ) \
2078		ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-23607b.bin",   0x000000, 0x200000, CRC(f308c5e9) SHA1(5470ab1cee6afecbd8ca8cf40f8fbe4ec2cb1471) ) \
2079		ROM_SYSTEM_BIOS( 7, "bios7", "epr-23607 (USA)"  ) \
2080		ROM_LOAD16_WORD_SWAP_BIOS( 7, "epr-23607.bin",    0x000000, 0x200000, CRC(2b55add2) SHA1(547de5f97d3183c8cd069c4fa3c09f13d8b637d9) ) \
	2081	ROM_SYSTEM_BIOS( 4, "bios4", "epr-23608c (Export)" ) \
	2082	ROM_LOAD16_WORD_SWAP_BIOS( 4, "epr-23608c.bin",   0x000000, 0x200000, CRC(6ef1dd8e) SHA1(25ef957ec1c58fdaff5e89102002bca6c38832c5) ) \
	2083	ROM_SYSTEM_BIOS( 5, "bios5", "epr-23608b (Export)" ) \
	2084	ROM_LOAD16_WORD_SWAP_BIOS( 5, "epr-23608b.bin",   0x000000, 0x200000, CRC(a554b1e3) SHA1(343b727a3619d1c75a9b6d4cc156a9050447f155) ) \
	2085	ROM_SYSTEM_BIOS( 6, "bios6", "epr-23608 (Export)"  ) \
	2086	ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-23608.bin",    0x000000, 0x200000, CRC(929cc3a6) SHA1(47d00c818de23f733a4a33b1bbc72eb8aa729246) ) \
	2087	ROM_SYSTEM_BIOS( 7, "bios7", "epr-23607b (USA)" ) \
	2088	ROM_LOAD16_WORD_SWAP_BIOS( 7, "epr-23607b.bin",   0x000000, 0x200000, CRC(f308c5e9) SHA1(5470ab1cee6afecbd8ca8cf40f8fbe4ec2cb1471) ) \
	2089	ROM_SYSTEM_BIOS( 8, "bios8", "epr-23607 (USA)"  ) \
	2090	ROM_LOAD16_WORD_SWAP_BIOS( 8, "epr-23607.bin",    0x000000, 0x200000, CRC(2b55add2) SHA1(547de5f97d3183c8cd069c4fa3c09f13d8b637d9) ) \
2081	2091
2082	2092	/* First half is BIOS, second half is game settings and is blanked/reprogrammed by the BIOS as necessary */
2083	2093	#define AW_BIOS \
2084	2094	ROM_SYSTEM_BIOS( 0, "bios0", "Atomiswave BIOS" ) \
2085		ROM_LOAD16_WORD_SWAP_BIOS( 0, "bios.ic23_l",                         0x000000, 0x010000, BAD_DUMP CRC(e5693ce3) SHA1(1bde3ed87af64b0f675ebd47f12a53e1fc5709c1) ) /* Might be bad.. especially. bytes 0x0000, 0x6000, 0x8000 which gave different reads */
	2095	ROM_LOAD16_WORD_SWAP_BIOS( 0, "bios.ic23_l", 0x000000, 0x010000, BAD_DUMP CRC(e5693ce3) SHA1(1bde3ed87af64b0f675ebd47f12a53e1fc5709c1) ) /* Might be bad.. especially. bytes 0x0000, 0x6000, 0x8000 which gave different reads */
2086	2096
2087	2097
2088	2098	ROM_START( naomi )

src/mame/drivers/cheekyms.c

r6740	r6741
9	9	#include "driver.h"
10	10	#include "cpu/z80/z80.h"
11	11	#include "sound/dac.h"
12		#include "cheekyms.h"
	12	#include "includes/cheekyms.h"
13	13
14	14
15	15	static INPUT_CHANGED( coin_inserted )

src/mame/drivers/asteroid.c

r6740	r6741
189	189	#include "video/vector.h"
190	190	#include "video/avgdvg.h"
191	191	#include "machine/atari_vg.h"
192		#include "asteroid.h"
	192	#include "includes/asteroid.h"
193	193	#include "sound/discrete.h"
194	194	#include "sound/pokey.h"
195	195

src/mame/drivers/stv.c

r6740	r6741
2574	2574
2575	2575	/* to do, update bios idle skips so they work better with this arrangement.. */
2576	2576
2577		static emu_timer *vblank_out_timer,*scan_timer,*t1_timer;
	2577	static const device_config *vblank_out_timer,*scan_timer,*t1_timer;
2578	2578	static int h_sync,v_sync;
2579	2579	static int cur_scan;
2580	2580
r6740	r6741
2582	2582	timer_0 = 0; \
2583	2583	{ \
2584	2584	/*if(LOG_IRQ) logerror ("Interrupt: VBlank-OUT Vector 0x41 Level 0x0e\n");*/ \
2585		cputag_set_input_line_and_vector(machine, "maincpu", 0xe, (stv_irq.vblank_out) ? HOLD_LINE : CLEAR_LINE , 0x41); \
	2585	cputag_set_input_line_and_vector(timer->machine, "maincpu", 0xe, (stv_irq.vblank_out) ? HOLD_LINE : CLEAR_LINE , 0x41); \
2586	2586	} \
2587	2587
2588	2588	#define VBLANK_IN_IRQ \
r6740	r6741
2595	2595	timer_1 = stv_scu[37] & 0x1ff; \
2596	2596	{ \
2597	2597	/*if(LOG_IRQ) logerror ("Interrupt: HBlank-In at scanline %04x, Vector 0x42 Level 0x0d\n",scanline);*/ \
2598		cputag_set_input_line_and_vector(machine, "maincpu", 0xd, (stv_irq.hblank_in) ? HOLD_LINE : CLEAR_LINE, 0x42); \
	2598	cputag_set_input_line_and_vector(timer->machine, "maincpu", 0xd, (stv_irq.hblank_in) ? HOLD_LINE : CLEAR_LINE, 0x42); \
2599	2599	} \
2600	2600
2601	2601	#define TIMER_0_IRQ \
2602	2602	if(timer_0 == (stv_scu[36] & 0x3ff)) \
2603	2603	{ \
2604	2604	/*if(LOG_IRQ) logerror ("Interrupt: Timer 0 at scanline %04x, Vector 0x43 Level 0x0c\n",scanline);*/ \
2605		cputag_set_input_line_and_vector(machine, "maincpu", 0xc, (stv_irq.timer_0) ? HOLD_LINE : CLEAR_LINE, 0x43 ); \
	2605	cputag_set_input_line_and_vector(timer->machine, "maincpu", 0xc, (stv_irq.timer_0) ? HOLD_LINE : CLEAR_LINE, 0x43 ); \
2606	2606	} \
2607	2607
2608	2608	#define TIMER_1_IRQ   \
r6740	r6741
2611	2611	if(!(stv_scu[38] & 0x80)) \
2612	2612	{ \
2613	2613	/*if(LOG_IRQ) logerror ("Interrupt: Timer 1 at point %04x, Vector 0x44 Level 0x0b\n",point);*/ \
2614		cputag_set_input_line_and_vector(machine, "maincpu", 0xb, (stv_irq.timer_1) ? HOLD_LINE : CLEAR_LINE, 0x44 ); \
	2614	cputag_set_input_line_and_vector(timer->machine, "maincpu", 0xb, (stv_irq.timer_1) ? HOLD_LINE : CLEAR_LINE, 0x44 ); \
2615	2615	} \
2616	2616	else \
2617	2617	{ \
2618	2618	if((timer_0) == (stv_scu[36] & 0x3ff)) \
2619	2619	{ \
2620	2620	/*if(LOG_IRQ) logerror ("Interrupt: Timer 1 at point %04x, Vector 0x44 Level 0x0b\n",point);*/ \
2621		cputag_set_input_line_and_vector(machine, "maincpu", 0xb, (stv_irq.timer_1) ? HOLD_LINE : CLEAR_LINE, 0x44 ); \
	2621	cputag_set_input_line_and_vector(timer->machine, "maincpu", 0xb, (stv_irq.timer_1) ? HOLD_LINE : CLEAR_LINE, 0x44 ); \
2622	2622	} \
2623	2623	} \
2624	2624	} \
r6740	r6741
2628	2628	cputag_set_input_line_and_vector(machine, "maincpu", 2, (stv_irq.vdp1_end) ? HOLD_LINE : CLEAR_LINE, 0x4d); \
2629	2629	} \
2630	2630
2631		static TIMER_CALLBACK( hblank_in_irq )
	2631	static TIMER_DEVICE_CALLBACK( hblank_in_irq )
2632	2632	{
2633	2633	int scanline = param;
2634	2634
2635		//  h = video_screen_get_height(machine->primary_screen);
2636		//  w = video_screen_get_width(machine->primary_screen);
	2635	//  h = video_screen_get_height(timer->machine->primary_screen);
	2636	//  w = video_screen_get_width(timer->machine->primary_screen);
2637	2637
2638	2638	HBLANK_IN_IRQ;
2639	2639	TIMER_0_IRQ;
r6740	r6741
2641	2641	if(scanline+1 < v_sync)
2642	2642	{
2643	2643	if(stv_irq.hblank_in || stv_irq.timer_0)
2644		timer_adjust_oneshot(scan_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline+1, h_sync), scanline+1);
	2644	timer_device_adjust_oneshot(scan_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, scanline+1, h_sync), scanline+1);
2645	2645	/*set the first Timer-1 event*/
2646	2646	cur_scan = scanline+1;
2647	2647	if(stv_irq.timer_1)
2648		timer_adjust_oneshot(t1_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline+1, timer_1), scanline+1);
	2648	timer_device_adjust_oneshot(t1_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, scanline+1, timer_1), scanline+1);
2649	2649	}
2650	2650
2651	2651	timer_0++;
2652	2652	}
2653	2653
2654		static TIMER_CALLBACK( timer1_irq )
	2654	static TIMER_DEVICE_CALLBACK( timer1_irq )
2655	2655	{
2656	2656	int scanline = param;
2657	2657
2658	2658	TIMER_1_IRQ;
2659	2659
2660	2660	if(stv_irq.timer_1)
2661		timer_adjust_oneshot(t1_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline+1, timer_1), scanline+1);
	2661	timer_device_adjust_oneshot(t1_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, scanline+1, timer_1), scanline+1);
2662	2662	}
2663	2663
2664	2664	static TIMER_CALLBACK( vdp1_irq )
r6740	r6741
2666	2666	VDP1_IRQ;
2667	2667	}
2668	2668
2669		static TIMER_CALLBACK( vblank_out_irq )
	2669	static TIMER_DEVICE_CALLBACK( vblank_out_irq )
2670	2670	{
2671	2671	VBLANK_OUT_IRQ;
2672	2672	}
r6740	r6741
2684	2684
2685	2685	/*Next V-Blank-OUT event*/
2686	2686	if(stv_irq.vblank_out)
2687		timer_adjust_oneshot(vblank_out_timer,video_screen_get_time_until_pos(device->machine->primary_screen, 0, 0), 0);
	2687	timer_device_adjust_oneshot(vblank_out_timer,video_screen_get_time_until_pos(device->machine->primary_screen, 0, 0), 0);
2688	2688	/*Set the first Hblank-IN event*/
2689	2689	if(stv_irq.hblank_in || stv_irq.timer_0 || stv_irq.timer_1)
2690		timer_adjust_oneshot(scan_timer, video_screen_get_time_until_pos(device->machine->primary_screen, 0, h_sync), 0);
	2690	timer_device_adjust_oneshot(scan_timer, video_screen_get_time_until_pos(device->machine->primary_screen, 0, h_sync), 0);
2691	2691
2692	2692	/*TODO: timing of this one (related to the VDP1 speed)*/
2693	2693	/*      (NOTE: value shouldn't be at h_sync/v_sync position (will break shienryu))*/
r6740	r6741
2717	2717	stvcd_reset(machine);
2718	2718
2719	2719	/* set the first scanline 0 timer to go off */
2720		scan_timer = timer_alloc(machine, hblank_in_irq, NULL);
2721		t1_timer = timer_alloc(machine, timer1_irq,NULL);
2722		vblank_out_timer = timer_alloc(machine, vblank_out_irq,NULL);
2723		timer_adjust_oneshot(vblank_out_timer,video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
2724		timer_adjust_oneshot(scan_timer, video_screen_get_time_until_pos(machine->primary_screen, 224, 352), 0);
	2720	scan_timer = devtag_get_device(machine, "scan_timer");
	2721	t1_timer = devtag_get_device(machine, "t1_timer");
	2722	vblank_out_timer = devtag_get_device(machine, "vbout_timer");
	2723	timer_device_adjust_oneshot(vblank_out_timer,video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
	2724	timer_device_adjust_oneshot(scan_timer, video_screen_get_time_until_pos(machine->primary_screen, 224, 352), 0);
2725	2725	}
2726	2726
2727	2727
r6740	r6741
2744	2744	MDRV_MACHINE_RESET(stv)
2745	2745	MDRV_NVRAM_HANDLER(stv) /* Actually 93c45 */
2746	2746
	2747	MDRV_TIMER_ADD("scan_timer", hblank_in_irq)
	2748	MDRV_TIMER_ADD("t1_timer", timer1_irq)
	2749	MDRV_TIMER_ADD("vbout_timer", vblank_out_irq)
	2750	MDRV_TIMER_ADD("sector_timer", stv_sector_cb)
	2751
2747	2752	/* video hardware */
2748	2753	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
2749	2754
r6740	r6741
2800	2805
2801	2806	#define STV_BIOS \
2802	2807	ROM_REGION( 0x080000, "maincpu", 0 ) /* SH2 code */ \
2803		ROM_SYSTEM_BIOS( 0, "jp",   "EPR-20091 (Japan 97/08/21)" ) \
2804		ROM_LOAD16_WORD_SWAP_BIOS( 0, "epr-20091.ic8",   0x000000, 0x080000, CRC(59ed40f4) SHA1(eff0f54c70bce05ff3a289bf30b1027e1c8cd117) ) \
2805		ROM_SYSTEM_BIOS( 1, "jp1",  "EPR-19730 (Japan 97/02/17)" ) \
2806		ROM_LOAD16_WORD_SWAP_BIOS( 1, "epr-19730.ic8",   0x000000, 0x080000, CRC(d0e0889d) SHA1(fae53107c894e0c41c49e191dbe706c9cd6e50bd) ) \
2807		ROM_SYSTEM_BIOS( 2, "jp2",  "EPR-17951A (Japan 95/04/25)" ) \
2808		ROM_LOAD16_WORD_SWAP_BIOS( 2, "epr-17951a.ic8",  0x000000, 0x080000, CRC(2672f9d8) SHA1(63cf4a6432f6c87952f9cf3ab0f977aed2367303) ) \
2809		ROM_SYSTEM_BIOS( 3, "jp3",  "EPR-17740 (Japan 95/01/31)" ) \
2810		ROM_LOAD16_WORD_SWAP_BIOS( 3, "epr-17740.ic8",   0x000000, 0x080000, CRC(5c5aa63d) SHA1(06860d96923b81afbc21e0ad32ee19487d8ff6e7) ) \
2811		ROM_SYSTEM_BIOS( 4, "euro", "EPR-17954A (Europe 95/04/25)" ) \
2812		ROM_LOAD16_WORD_SWAP_BIOS( 4, "epr-17954a.ic8",  0x000000, 0x080000, CRC(f7722da3) SHA1(af79cff317e5b57d49e463af16a9f616ed1eee08) ) \
2813		ROM_SYSTEM_BIOS( 5, "us",   "EPR-17952A (USA 95/04/25)" ) \
2814		ROM_LOAD16_WORD_SWAP_BIOS( 5, "epr-17952a.ic8",  0x000000, 0x080000, CRC(d1be2adf) SHA1(eaf1c3e5d602e1139d2090a78d7e19f04f916794) ) \
2815		ROM_SYSTEM_BIOS( 6, "tw",   "EPR-17953A (Taiwan 95/04/25)" ) \
2816		ROM_LOAD16_WORD_SWAP_BIOS( 6, "epr-17953a.ic8",  0x000000, 0x080000, CRC(a4c47570) SHA1(9efc73717ec8a13417e65c54344ded9fc25bf5ef) ) \
2817		ROM_SYSTEM_BIOS( 7, "debug","Debug (95/01/13)" ) \
2818		ROM_LOAD16_WORD_SWAP_BIOS( 7, "stv110.bin",      0x000000, 0x080000, CRC(3dfeda92) SHA1(8eb33192a57df5f3a1dfb57263054867c6b2db6d) ) \
2819		ROM_SYSTEM_BIOS( 8, "dev",  "Development (bios 1.061)" ) \
2820		ROM_LOAD16_WORD_SWAP_BIOS( 8, "stv1061.bin",     0x000000, 0x080000, CRC(728dbca3) SHA1(0ed2030177f0aa8285645c395ae9ad9f568ab1d6) ) \
	2808	ROM_SYSTEM_BIOS( 0,  "jp",    "EPR-20091 (Japan 97/08/21)" ) \
	2809	ROM_LOAD16_WORD_SWAP_BIOS( 0,  "epr-20091.ic8",   0x000000, 0x080000, CRC(59ed40f4) SHA1(eff0f54c70bce05ff3a289bf30b1027e1c8cd117) ) \
	2810	ROM_SYSTEM_BIOS( 1,  "jp1",   "EPR-19730 (Japan 97/02/17)" ) \
	2811	ROM_LOAD16_WORD_SWAP_BIOS( 1,  "epr-19730.ic8",   0x000000, 0x080000, CRC(d0e0889d) SHA1(fae53107c894e0c41c49e191dbe706c9cd6e50bd) ) \
	2812	ROM_SYSTEM_BIOS( 2,  "jp2",   "EPR-17951A (Japan 95/04/25)" ) \
	2813	ROM_LOAD16_WORD_SWAP_BIOS( 2,  "epr-17951a.ic8",  0x000000, 0x080000, CRC(2672f9d8) SHA1(63cf4a6432f6c87952f9cf3ab0f977aed2367303) ) \
	2814	ROM_SYSTEM_BIOS( 3,  "jp3",   "STVB1.11J (Japan 95/02/20)" ) \
	2815	ROM_LOAD16_WORD_SWAP_BIOS( 3,  "stvb111j.ic8",    0x000000, 0x080000, CRC(3e23c81f) SHA1(f9b282fd27693e9891843597b2e1823da3d23c7b) ) \
	2816	ROM_SYSTEM_BIOS( 4,  "jp4",   "EPR-17740 (Japan 95/01/31)" ) \
	2817	ROM_LOAD16_WORD_SWAP_BIOS( 4,  "epr-17740.ic8",   0x000000, 0x080000, CRC(5c5aa63d) SHA1(06860d96923b81afbc21e0ad32ee19487d8ff6e7) ) \
	2818	ROM_SYSTEM_BIOS( 5,  "euro",  "EPR-17954A (Europe 95/04/25)" ) \
	2819	ROM_LOAD16_WORD_SWAP_BIOS( 5,  "epr-17954a.ic8",  0x000000, 0x080000, CRC(f7722da3) SHA1(af79cff317e5b57d49e463af16a9f616ed1eee08) ) \
	2820	ROM_SYSTEM_BIOS( 6,  "us",    "EPR-17952A (USA 95/04/25)" ) \
	2821	ROM_LOAD16_WORD_SWAP_BIOS( 6,  "epr-17952a.ic8",  0x000000, 0x080000, CRC(d1be2adf) SHA1(eaf1c3e5d602e1139d2090a78d7e19f04f916794) ) \
	2822	ROM_SYSTEM_BIOS( 7,  "tw",    "EPR-17953A (Taiwan 95/04/25)" ) \
	2823	ROM_LOAD16_WORD_SWAP_BIOS( 7,  "epr-17953a.ic8",  0x000000, 0x080000, CRC(a4c47570) SHA1(9efc73717ec8a13417e65c54344ded9fc25bf5ef) ) \
	2824	ROM_SYSTEM_BIOS( 8,  "tw1",   "STVB1.11T (Taiwan 95/02/20)" ) \
	2825	ROM_LOAD16_WORD_SWAP_BIOS( 8,  "stvb111t.ic8",    0x000000, 0x080000, CRC(02daf123) SHA1(23185beb1ce9c09b8719e57d1adb7b28c8141fd5) ) \
	2826	ROM_SYSTEM_BIOS( 9,  "debug", "Debug (95/01/13)" ) \
	2827	ROM_LOAD16_WORD_SWAP_BIOS( 9,  "stv110.bin",      0x000000, 0x080000, CRC(3dfeda92) SHA1(8eb33192a57df5f3a1dfb57263054867c6b2db6d) ) \
	2828	ROM_SYSTEM_BIOS( 10, "dev",   "Development (bios 1.061)" ) \
	2829	ROM_LOAD16_WORD_SWAP_BIOS( 10, "stv1061.bin",     0x000000, 0x080000, CRC(728dbca3) SHA1(0ed2030177f0aa8285645c395ae9ad9f568ab1d6) ) \
2821	2830	\
2822	2831	ROM_REGION( 0x080000, "slave", 0 ) /* SH2 code */ \
2823	2832	ROM_COPY( "maincpu",0,0,0x080000) \

src/mame/drivers/bishi.c

r6740	r6741
88	88
89	89	#include "driver.h"
90	90	#include "deprecat.h"
91		#include "video/konamiic.h"
	91	#include "video/konicdev.h"
92	92	#include "cpu/m68000/m68000.h"
93	93	#include "sound/ymz280b.h"
94	94
95	95	VIDEO_START(bishi);
96	96	VIDEO_UPDATE(bishi);
97	97
	98	extern void bishi_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags);
	99
	100
98	101	static UINT16 cur_control, cur_control2;
99	102
100	103	static MACHINE_START( bishi )
r6740	r6741
146	149
147	150	static READ16_HANDLER( bishi_K056832_rom_r )
148	151	{
	152	const device_config *k056832 = devtag_get_device(space->machine, "k056832");
149	153	UINT16 ouroffs;
150	154
151		ouroffs = (offset>>1)*8;
152		if (offset&1)
153		{
	155	ouroffs = (offset >> 1) * 8;
	156	if (offset & 1)
154	157	ouroffs++;
155		}
156	158
157	159	if (cur_control2 & 0x1000)
158		{
159	160	ouroffs += 4;
160		}
161	161
162		return K056832_bishi_rom_word_r(space, ouroffs, mem_mask);
	162	return k056832_bishi_rom_word_r(k056832, ouroffs, mem_mask);
163	163	}
164	164
165	165	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
r6740	r6741
171	171	AM_RANGE(0x800008, 0x800009) AM_READ_PORT("INPUTS")
172	172	AM_RANGE(0x810000, 0x810003) AM_WRITE(control2_w)      // bank switch for K056832 character ROM test
173	173	AM_RANGE(0x820000, 0x820001) AM_WRITENOP         // lamps (see lamp test in service menu)
174		AM_RANGE(0x830000, 0x83003f) AM_WRITE(K056832_word_w)
175		AM_RANGE(0x840000, 0x840007) AM_WRITE(K056832_b_word_w)   // VSCCS
176		AM_RANGE(0x850000, 0x85001f) AM_WRITE(K054338_word_w)   // CLTC
177		AM_RANGE(0x870000, 0x8700ff) AM_WRITE(K055555_word_w)   // PCU2
	174	AM_RANGE(0x830000, 0x83003f) AM_DEVWRITE("k056832", k056832_word_w)
	175	AM_RANGE(0x840000, 0x840007) AM_DEVWRITE("k056832", k056832_b_word_w)   // VSCCS
	176	AM_RANGE(0x850000, 0x85001f) AM_DEVWRITE("k054338", k054338_word_w)   // CLTC
	177	AM_RANGE(0x870000, 0x8700ff) AM_DEVWRITE("k055555", k055555_word_w)   // PCU2
178	178	AM_RANGE(0x880000, 0x880003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0xff00)
179		AM_RANGE(0xa00000, 0xa01fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)   // Graphic planes
	179	AM_RANGE(0xa00000, 0xa01fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)   // Graphic planes
180	180	AM_RANGE(0xb00000, 0xb03fff) AM_RAM_WRITE(paletteram16_xbgr_word_be_w) AM_BASE_GENERIC(paletteram)
181	181	AM_RANGE(0xb04000, 0xb047ff) AM_READ(bishi_mirror_r)   // bug in the ram/rom test?
182	182	AM_RANGE(0xc00000, 0xc01fff) AM_READ(bishi_K056832_rom_r)
r6740	r6741
397	397	sound_irq_gen
398	398	};
399	399
	400
	401	static const k056832_interface bishi_k056832_intf =
	402	{
	403	"gfx1", 0,
	404	K056832_BPP_8,
	405	1, 0,
	406	KONAMI_ROM_DEINTERLEAVE_NONE,
	407	bishi_tile_callback, "none"
	408	};
	409
	410	static const k054338_interface bishi_k054338_intf =
	411	{
	412	"screen",
	413	0,
	414	"none"
	415	};
	416
400	417	static MACHINE_DRIVER_START( bishi )
401	418
402	419	/* basic machine hardware */
r6740	r6741
422	439	MDRV_VIDEO_START(bishi)
423	440	MDRV_VIDEO_UPDATE(bishi)
424	441
	442	MDRV_K056832_ADD("k056832", bishi_k056832_intf)
	443	MDRV_K054338_ADD("k054338", bishi_k054338_intf)
	444	MDRV_K055555_ADD("k055555")
	445
425	446	/* sound hardware */
426	447	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
427	448

src/mame/drivers/1942.c

r6740	r6741
67	67	#include "cpu/z80/z80.h"
68	68	#include "deprecat.h"
69	69	#include "sound/ay8910.h"
70		#include "1942.h"
	70	#include "includes/1942.h"
71	71
72	72
73	73	static WRITE8_HANDLER( c1942_bankswitch_w )

src/mame/drivers/poolshrk.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/m6800/m6800.h"
9		#include "poolshrk.h"
	9	#include "includes/poolshrk.h"
10	10	#include "sound/discrete.h"
11	11
12	12

src/mame/drivers/bloodbro.c

r6740	r6741
566	566	ROM_LOAD( "bb_08.bin",    0x00000, 0x20000, CRC(deb1b975) SHA1(08f2e9a0a23171201b71d381d091edcd3787c287) )
567	567	ROM_END
568	568
	569	ROM_START( bloodbrob )
	570	ROM_REGION( 0x80000, "maincpu", 0 )
	571	ROM_LOAD16_BYTE( "bloodbros02.bin",    0x00001, 0x20000, CRC(204dca6e) SHA1(f04cb2116d699ac2deec2d55597beb5d7b3dc793) )
	572	ROM_LOAD16_BYTE( "bloodbros01.bin",    0x00000, 0x20000, CRC(ac6719e7) SHA1(bcefd61ed5d2f5eeb4424243f03037c7d123b9f6) )
	573	ROM_LOAD16_BYTE( "bb_04.bin",    0x40001, 0x20000, CRC(fd951c2c) SHA1(f4031bf303c67c82f2f78f7456f78382d8c1ac85) )
	574	ROM_LOAD16_BYTE( "bb_03.bin",    0x40000, 0x20000, CRC(18d3c460) SHA1(93b86af1199f0fedeaf1fe64d27ffede4b819e42) )
	575
	576	ROM_REGION( 0x20000, "audiocpu", 0 )
	577	ROM_LOAD( "bb_07.bin",    0x000000, 0x08000, CRC(411b94e8) SHA1(6968441f64212c0935afeca68f07deaadf86d614) )
	578	ROM_CONTINUE(             0x010000, 0x08000 )
	579	ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
	580
	581	ROM_REGION( 0x20000, "gfx1", 0 )
	582	ROM_LOAD( "bb_05.bin",    0x00000, 0x10000, CRC(04ba6d19) SHA1(7333075c3323756d51917418b5234d785a9bee00) )   /* characters */
	583	ROM_LOAD( "bb_06.bin",    0x10000, 0x10000, CRC(7092e35b) SHA1(659d30b2e2fd9ffa34a47e98193c8f0a87ac1315) )
	584
	585	ROM_REGION( 0x100000, "gfx2", 0 )
	586	ROM_LOAD( "bloodb.bk",   0x00000, 0x100000, CRC(1aa87ee6) SHA1(e7843c1e8a0f3a685f0b5d6e3a2eb3176c410847) )   /* Background+Foreground */
	587
	588	ROM_REGION( 0x100000, "gfx3", 0 )
	589	ROM_LOAD( "bloodb.obj",   0x00000, 0x100000, CRC(d27c3952) SHA1(de7306432b682f238b911507ad7aa2fa8acbee80) )   /* sprites */
	590
	591	ROM_REGION( 0x40000, "oki", 0 )   /* ADPCM samples */
	592	ROM_LOAD( "bb_08.bin",    0x00000, 0x20000, CRC(deb1b975) SHA1(08f2e9a0a23171201b71d381d091edcd3787c287) )
	593	ROM_END
	594
	595
569	596	ROM_START( weststry )
570	597	ROM_REGION( 0x80000, "maincpu", 0 )   /* 64k for cpu code */
571	598	ROM_LOAD16_BYTE( "ws13.bin",    0x00001, 0x20000, CRC(158e302a) SHA1(52cc1bf526424ff025a6b79f3fc7bba4b9bbfcbb) )
r6740	r6741
655	682
656	683	GAME( 1990, bloodbro, 0,        bloodbro, bloodbro, 0,        ROT0,   "Tad", "Blood Bros. (set 1)", GAME_NO_COCKTAIL )
657	684	GAME( 1990, bloodbroa,bloodbro, bloodbro, bloodbro, 0,        ROT0,   "Tad", "Blood Bros. (set 2)", GAME_NO_COCKTAIL )
	685	GAME( 1990, bloodbrob,bloodbro, bloodbro, bloodbro, 0,        ROT0,   "Tad", "Blood Bros. (set 3)", GAME_NO_COCKTAIL )
658	686	GAME( 1990, weststry, bloodbro, weststry, weststry, weststry, ROT0,   "bootleg", "West Story", GAME_NO_COCKTAIL | GAME_NO_SOUND )
659	687	GAME( 1990, skysmash, 0,        skysmash, skysmash, 0,        ROT270, "Nihon System", "Sky Smasher", 0 )

src/mame/drivers/vegaeo.c

r6740	r6741
16	16	#include "cpu/e132xs/e132xs.h"
17	17	#include "deprecat.h"
18	18	#include "machine/at28c16.h"
19		#include "eolithsp.h"
	19	#include "includes/eolithsp.h"
20	20
21	21	static UINT32 *vega_vram;
22	22	static UINT8 vega_vbuffer = 0;

src/mame/drivers/galaxia.c

r6740	r6741
234	234	static const s2636_interface s2636_0_config =
235	235	{
236	236	"screen",
237		0xff,
	237	0x100,
238	238	3, -27
239	239	};
240	240
241	241	static const s2636_interface s2636_1_config =
242	242	{
243	243	"screen",
244		0xff,
	244	0x100,
245	245	3, -27
246	246	};
247	247
248	248	static const s2636_interface s2636_2_config =
249	249	{
250	250	"screen",
251		0xff,
	251	0x100,
252	252	3, -27
253	253	};
254	254

src/mame/drivers/gridlee.c

r6740	r6741
79	79
80	80	#include "driver.h"
81	81	#include "cpu/m6809/m6809.h"
82		#include "gridlee.h"
83		#include "balsente.h"
	82	#include "includes/gridlee.h"
	83	#include "includes/balsente.h"
84	84	#include "sound/samples.h"
85	85
86	86

src/mame/drivers/realbrk.c

r6740	r6741
45	45	#include "cpu/m68000/m68000.h"
46	46	#include "deprecat.h"
47	47	#include "machine/tmp68301.h"
48		#include "realbrk.h"
	48	#include "includes/realbrk.h"
49	49	#include "sound/2413intf.h"
50	50	#include "sound/ymz280b.h"
51	51
r6740	r6741
680	680	MDRV_CPU_PROGRAM_MAP(realbrk_mem)
681	681	MDRV_CPU_VBLANK_INT("screen", realbrk_interrupt)
682	682
	683	MDRV_MACHINE_START( tmp68301 )
683	684	MDRV_MACHINE_RESET( tmp68301 )
684	685
685	686	/* video hardware */

src/mame/drivers/carjmbre.c

r6740	r6741
45	45	#include "driver.h"
46	46	#include "cpu/z80/z80.h"
47	47	#include "sound/ay8910.h"
48		#include "carjmbre.h"
	48	#include "includes/carjmbre.h"
49	49
50	50	/*************************************
51	51	*

src/mame/drivers/superchs.c

r6740	r6741
348	348	MACHINE DRIVERS
349	349	***********************************************************/
350	350
351		static MACHINE_RESET( superchs )
352		{
353		taito_f3_soundsystem_reset(machine);
354
355		f3_68681_reset(machine);
356		}
357
358	351	static const eeprom_interface superchs_eeprom_interface =
359	352	{
360	353	6,            /* address bits */
r6740	r6741
399	392	MDRV_CPU_PROGRAM_MAP(superchs_map)
400	393	MDRV_CPU_VBLANK_INT("screen", irq2_line_hold)/* VBL */
401	394
402		TAITO_F3_SOUND_SYSTEM_CPU(16000000)
403
404	395	MDRV_CPU_ADD("sub", M68000, 16000000)   /* 16 MHz */
405	396	MDRV_CPU_PROGRAM_MAP(superchs_cpub_map)
406	397	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)/* VBL */
407	398
408	399	MDRV_QUANTUM_TIME(HZ(480))   /* CPU slices - Need to interleave Cpu's 1 & 3 */
409	400
410		MDRV_MACHINE_RESET(superchs)
411	401	MDRV_NVRAM_HANDLER(superchs)
412	402
413	403	/* video hardware */
r6740	r6741
425	415	MDRV_VIDEO_UPDATE(superchs)
426	416
427	417	/* sound hardware */
428		TAITO_F3_SOUND_SYSTEM_ES5505(30476100/2)
	418	MDRV_IMPORT_FROM(taito_f3_sound)
429	419	MACHINE_DRIVER_END
430	420
431	421	/***************************************************************************/

src/mame/drivers/mainevt.c

r6740	r6741
23	23	#include "driver.h"
24	24	#include "cpu/z80/z80.h"
25	25	#include "cpu/hd6309/hd6309.h"
26		#include "video/konamiic.h"
	26	#include "video/konicdev.h"
27	27	#include "cpu/m6809/m6809.h"
28	28	#include "sound/2151intf.h"
29	29	#include "sound/k007232.h"
30	30	#include "sound/upd7759.h"
31		#include "konamipt.h"
	31	#include "includes/konamipt.h"
32	32
33	33	VIDEO_UPDATE( mainevt );
34	34	VIDEO_UPDATE( dv );
35	35	VIDEO_START( mainevt );
36	36	VIDEO_START( dv );
37	37
	38	extern void mainevt_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	39	extern void dv_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	40	extern void mainevt_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow);
	41	extern void dv_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
38	42
39	43
40	44	static INTERRUPT_GEN( mainevt_interrupt )
41	45	{
42		if (K052109_is_IRQ_enabled())
	46	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	47
	48	if (k052109_is_irq_enabled(k052109))
43	49	irq0_line_hold(device);
44	50	}
45	51
r6740	r6741
60	66
61	67	static WRITE8_HANDLER( mainevt_bankswitch_w )
62	68	{
	69	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
63	70	UINT8 *RAM = memory_region(space->machine, "maincpu");
64	71	int bankaddress;
65	72
r6740	r6741
71	78	//  palette_selected = data & 0x20;
72	79
73	80	/* bit 6 = enable char ROM reading through the video RAM */
74		K052109_set_RMRD_line((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
	81	k052109_set_rmrd_line(k052109, (data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
75	82
76	83	/* bit 7 = NINITSET (unknown) */
77	84
r6740	r6741
139	146	k007232_set_bank( device, bank_A, bank_B );
140	147	}
141	148
	149	static READ8_HANDLER( k052109_051960_r )
	150	{
	151	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	152	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
142	153
	154	if (k052109_get_rmrd_line(k052109) == CLEAR_LINE)
	155	{
	156	if (offset >= 0x3800 && offset < 0x3808)
	157	return k051937_r(k051960, offset - 0x3800);
	158	else if (offset < 0x3c00)
	159	return k052109_r(k052109, offset);
	160	else
	161	return k051960_r(k051960, offset - 0x3c00);
	162	}
	163	else
	164	return k052109_r(k052109, offset);
	165	}
	166
	167	static WRITE8_HANDLER( k052109_051960_w )
	168	{
	169	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	170	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	171
	172	if (offset >= 0x3800 && offset < 0x3808)
	173	k051937_w(k051960, offset - 0x3800, data);
	174	else if (offset < 0x3c00)
	175	k052109_w(k052109, offset, data);
	176	else
	177	k051960_w(k051960, offset - 0x3c00, data);
	178	}
	179
	180
143	181	static ADDRESS_MAP_START( mainevt_map, ADDRESS_SPACE_PROGRAM, 8 )
144	182	AM_RANGE(0x1f80, 0x1f80) AM_WRITE(mainevt_bankswitch_w)
145	183	AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w)            /* probably */
r6740	r6741
156	194	AM_RANGE(0x1f9a, 0x1f9a) AM_READ_PORT("P4")
157	195	AM_RANGE(0x1f9b, 0x1f9b) AM_READ_PORT("DSW2")
158	196
159		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r,K052109_051960_w)
	197	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
160	198
161	199	AM_RANGE(0x4000, 0x5dff) AM_RAM
162	200	AM_RANGE(0x5e00, 0x5fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE_GENERIC(paletteram)
r6740	r6741
178	216	AM_RANGE(0x1f97, 0x1f97) AM_READ_PORT("DSW1")
179	217	AM_RANGE(0x1f98, 0x1f98) AM_READ_PORT("DSW3")
180	218	AM_RANGE(0x1f9b, 0x1f9b) AM_READ_PORT("DSW2")
181		AM_RANGE(0x1fa0, 0x1fbf) AM_READWRITE(K051733_r,K051733_w)
	219	AM_RANGE(0x1fa0, 0x1fbf) AM_DEVREADWRITE("k051733", k051733_r, k051733_w)
182	220
183		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r,K052109_051960_w)
	221	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
184	222
185	223	AM_RANGE(0x4000, 0x5dff) AM_RAM
186	224	AM_RANGE(0x5e00, 0x5fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE_GENERIC(paletteram)
r6740	r6741
373	411	volume_callback   /* external port callback */
374	412	};
375	413
	414	static const k052109_interface mainevt_k052109_intf =
	415	{
	416	"gfx1", 0,
	417	NORMAL_PLANE_ORDER,
	418	KONAMI_ROM_DEINTERLEAVE_2,
	419	mainevt_tile_callback
	420	};
	421
	422	static const k051960_interface mainevt_k051960_intf =
	423	{
	424	"gfx2", 1,
	425	NORMAL_PLANE_ORDER,
	426	KONAMI_ROM_DEINTERLEAVE_2,
	427	mainevt_sprite_callback
	428	};
	429
376	430	static MACHINE_DRIVER_START( mainevt )
377	431
378	432	/* basic machine hardware */
r6740	r6741
399	453	MDRV_VIDEO_START(mainevt)
400	454	MDRV_VIDEO_UPDATE(mainevt)
401	455
	456	MDRV_K052109_ADD("k052109", mainevt_k052109_intf)
	457	MDRV_K051960_ADD("k051960", mainevt_k051960_intf)
	458
402	459	/* sound hardware */
403	460	MDRV_SPEAKER_STANDARD_MONO("mono")
404	461
r6740	r6741
412	469	MACHINE_DRIVER_END
413	470
414	471
	472	static const k052109_interface dv_k052109_intf =
	473	{
	474	"gfx1", 0,
	475	NORMAL_PLANE_ORDER,
	476	KONAMI_ROM_DEINTERLEAVE_2,
	477	dv_tile_callback
	478	};
	479
	480	static const k051960_interface dv_k051960_intf =
	481	{
	482	"gfx2", 1,
	483	NORMAL_PLANE_ORDER,
	484	KONAMI_ROM_DEINTERLEAVE_2,
	485	dv_sprite_callback
	486	};
	487
415	488	static MACHINE_DRIVER_START( devstors )
416	489
417	490	/* basic machine hardware */
r6740	r6741
438	511	MDRV_VIDEO_START(dv)
439	512	MDRV_VIDEO_UPDATE(dv)
440	513
	514	MDRV_K052109_ADD("k052109", dv_k052109_intf)
	515	MDRV_K051960_ADD("k051960", dv_k051960_intf)
	516	MDRV_K051733_ADD("k051733")
	517
441	518	/* sound hardware */
442	519	MDRV_SPEAKER_STANDARD_MONO("mono")
443	520
r6740	r6741
684	761
685	762
686	763
687		static DRIVER_INIT( mainevt )
688		{
689		konami_rom_deinterleave_2(machine, "gfx1");
690		konami_rom_deinterleave_2(machine, "gfx2");
691		}
692
693
694
695		GAME( 1988, mainevt,  0,        mainevt,  mainevt,  mainevt, ROT0,  "Konami", "The Main Event (4 Players ver. Y)", 0 )
696		GAME( 1988, mainevto, mainevt,  mainevt,  mainevt,  mainevt, ROT0,  "Konami", "The Main Event (4 Players ver. F)", 0 )
697		GAME( 1988, mainevt2p,mainevt,  mainevt,  mainev2p, mainevt, ROT0,  "Konami", "The Main Event (2 Players ver. X)", 0 )
698		GAME( 1988, ringohja, mainevt,  mainevt,  mainev2p, mainevt, ROT0,  "Konami", "Ring no Ohja (Japan 2 Players ver. N)", 0 )
699		GAME( 1988, devstors, 0,        devstors, devstors, mainevt, ROT90, "Konami", "Devastators (ver. Z)", 0 )
700		GAME( 1988, devstors2,devstors, devstors, devstor2, mainevt, ROT90, "Konami", "Devastators (ver. X)", 0 )
701		GAME( 1988, devstors3,devstors, devstors, devstors, mainevt, ROT90, "Konami", "Devastators (ver. V)", 0 )
702		GAME( 1988, garuka,   devstors, devstors, devstor2, mainevt, ROT90, "Konami", "Garuka (Japan ver. W)", 0 )
	764	GAME( 1988, mainevt,  0,        mainevt,  mainevt,  0, ROT0,  "Konami", "The Main Event (4 Players ver. Y)", 0 )
	765	GAME( 1988, mainevto, mainevt,  mainevt,  mainevt,  0, ROT0,  "Konami", "The Main Event (4 Players ver. F)", 0 )
	766	GAME( 1988, mainevt2p,mainevt,  mainevt,  mainev2p, 0, ROT0,  "Konami", "The Main Event (2 Players ver. X)", 0 )
	767	GAME( 1988, ringohja, mainevt,  mainevt,  mainev2p, 0, ROT0,  "Konami", "Ring no Ohja (Japan 2 Players ver. N)", 0 )
	768	GAME( 1988, devstors, 0,        devstors, devstors, 0, ROT90, "Konami", "Devastators (ver. Z)", 0 )
	769	GAME( 1988, devstors2,devstors, devstors, devstor2, 0, ROT90, "Konami", "Devastators (ver. X)", 0 )
	770	GAME( 1988, devstors3,devstors, devstors, devstors, 0, ROT90, "Konami", "Devastators (ver. V)", 0 )
	771	GAME( 1988, garuka,   devstors, devstors, devstor2, 0, ROT90, "Konami", "Garuka (Japan ver. W)", 0 )

src/mame/drivers/deco156.c

r6740	r6741
14	14
15	15	#define DE156CPU ARM
16	16	#include "driver.h"
17		#include "decocrpt.h"
18		#include "deco32.h"
	17	#include "includes/decocrpt.h"
	18	#include "includes/deco32.h"
19	19	#include "machine/eepromdev.h"
20	20	#include "sound/okim6295.h"
21	21	#include "sound/ymz280b.h"
22	22	#include "cpu/arm/arm.h"
23		#include "deco16ic.h"
	23	#include "includes/deco16ic.h"
24	24
25	25	static int simpl156_bank_callback(const int bank)
26	26	{

src/mame/drivers/nbmj8688.c

r6740	r6741
32	32
33	33	#include "driver.h"
34	34	#include "cpu/z80/z80.h"
35		#include "nb1413m3.h"
	35	#include "includes/nb1413m3.h"
36	36	#include "sound/dac.h"
37	37	#include "sound/ay8910.h"
38	38	#include "sound/3812intf.h"

src/mame/drivers/hitpoker.c

r6740	r6741
49	49
50	50	static UINT8 *hitpoker_sys_regs;
51	51	static UINT8 hitpoker_pic_data;
	52	static UINT8 *videoram;
	53	static UINT8 *paletteram;
	54	static UINT8 *colorram;
52	55
53	56	#define CRTC_CLOCK XTAL_3_579545MHz
54	57
55	58	static VIDEO_START(hitpoker)
56	59	{
57		machine->generic.videoram.u8 = auto_alloc_array(machine, UINT8, 0x35ff);
58		machine->generic.paletteram.u8 = auto_alloc_array(machine, UINT8, 0x1000);
59		machine->generic.colorram.u8 = auto_alloc_array(machine, UINT8, 0x2000);
	60	videoram = auto_alloc_array(machine, UINT8, 0x35ff);
	61	paletteram = auto_alloc_array(machine, UINT8, 0x1000);
	62	colorram = auto_alloc_array(machine, UINT8, 0x2000);
60	63	}
61	64
62	65	static VIDEO_UPDATE(hitpoker)
r6740	r6741
72	75	{
73	76	int tile,color,gfx_bpp;
74	77
75		tile = (((screen->machine->generic.videoram.u8[count]<<8)|(screen->machine->generic.videoram.u8[count+1])) & 0x3fff);
76		gfx_bpp = (screen->machine->generic.colorram.u8[count] & 0x80)>>7; //flag between 4 and 8 bpp
77		color = gfx_bpp ? ((screen->machine->generic.colorram.u8[count] & 0x70)>>4) : (screen->machine->generic.colorram.u8[count] & 0xf);
	78	tile = (((videoram[count]<<8)|(videoram[count+1])) & 0x3fff);
	79	gfx_bpp = (colorram[count] & 0x80)>>7; //flag between 4 and 8 bpp
	80	color = gfx_bpp ? ((colorram[count] & 0x70)>>4) : (colorram[count] & 0xf);
78	81
79	82	drawgfx_opaque(bitmap,cliprect,screen->machine->gfx[gfx_bpp],tile,color,0,0,x*8,y*8);
80	83
r6740	r6741
90	93	UINT8 *ROM = memory_region(space->machine, "maincpu");
91	94
92	95	if(hitpoker_pic_data & 0x10)
93		return space->machine->generic.videoram.u8[offset];
	96	return videoram[offset];
94	97	else
95	98	return ROM[offset+0x8000];
96	99	}
r6740	r6741
100	103	//  UINT8 *ROM = memory_region(space->machine, "maincpu");
101	104
102	105	//  if(hitpoker_sys_regs[0x00] & 0x10)
103		space->machine->generic.videoram.u8[offset] = data;
	106	videoram[offset] = data;
104	107	}
105	108
106	109	static READ8_HANDLER( hitpoker_cram_r )
r6740	r6741
108	111	UINT8 *ROM = memory_region(space->machine, "maincpu");
109	112
110	113	if(hitpoker_pic_data & 0x10)
111		return space->machine->generic.colorram.u8[offset];
	114	return colorram[offset];
112	115	else
113	116	return ROM[offset+0xc000];
114	117	}
115	118
116	119	static WRITE8_HANDLER( hitpoker_cram_w )
117	120	{
118		space->machine->generic.colorram.u8[offset] = data;
	121	colorram[offset] = data;
119	122	}
120	123
121	124	static READ8_HANDLER( hitpoker_paletteram_r )
r6740	r6741
123	126	UINT8 *ROM = memory_region(space->machine, "maincpu");
124	127
125	128	if(hitpoker_pic_data & 0x10)
126		return space->machine->generic.paletteram.u8[offset];
	129	return paletteram[offset];
127	130	else
128	131	return ROM[offset+0xe000];
129	132	}
r6740	r6741
131	134	static WRITE8_HANDLER( hitpoker_paletteram_w )
132	135	{
133	136	int r,g,b,datax;
134		space->machine->generic.paletteram.u8[offset] = data;
	137	paletteram[offset] = data;
135	138	offset>>=1;
136		datax=256*space->machine->generic.paletteram.u8[offset*2]+space->machine->generic.paletteram.u8[offset*2+1];
	139	datax=256*paletteram[offset*2]+paletteram[offset*2+1];
137	140
138	141	/* RGB565 */
139	142	b = ((datax)&0xf800)>>11;

src/mame/drivers/taito_h.c

r6740	r6741
143	143	#include "driver.h"
144	144	#include "cpu/z80/z80.h"
145	145	#include "cpu/m68000/m68000.h"
146		#include "taitoipt.h"
	146	#include "includes/taitoipt.h"
147	147	#include "audio/taitosnd.h"
148	148	#include "video/taitoic.h"
149	149	#include "sound/2610intf.h"

src/mame/drivers/tail2nos.c

r6740	r6741
11	11
12	12	#include "driver.h"
13	13	#include "cpu/m68000/m68000.h"
14		#include "video/konamiic.h"
	14	#include "video/konicdev.h"
15	15	#include "cpu/z80/z80.h"
16	16	#include "sound/2608intf.h"
17	17
18	18
19	19	extern UINT16 *tail2nos_bgvideoram;
	20	extern void tail2nos_zoom_callback(running_machine *machine, int *code,int *color,int *flags);
20	21
21	22	WRITE16_HANDLER( tail2nos_bgvideoram_w );
22	23	READ16_HANDLER( tail2nos_zoomdata_r );
r6740	r6741
46	47	}
47	48	}
48	49
	50	#if 0
49	51	static READ16_HANDLER( tail2nos_K051316_0_r )
50	52	{
51	53	return K051316_0_r(space,offset);
r6740	r6741
62	64	if (ACCESSING_BITS_0_7)
63	65	K051316_ctrl_0_w(space,offset,data & 0xff);
64	66	}
	67	#endif
65	68
66	69	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
67	70	{
r6740	r6741
73	76	AM_RANGE(0x200000, 0x27ffff) AM_ROMBANK("bank1")   /* extra ROM */
74	77	AM_RANGE(0x2c0000, 0x2dffff) AM_ROMBANK("bank2")
75	78	AM_RANGE(0x400000, 0x41ffff) AM_READWRITE(tail2nos_zoomdata_r, tail2nos_zoomdata_w)
76		AM_RANGE(0x500000, 0x500fff) AM_READWRITE(tail2nos_K051316_0_r, tail2nos_K051316_0_w)
77		AM_RANGE(0x510000, 0x51001f) AM_WRITE(tail2nos_K051316_ctrl_0_w)
	79	AM_RANGE(0x500000, 0x500fff) AM_DEVREADWRITE8("k051316", k051316_r, k051316_w, 0x00ff)
	80	AM_RANGE(0x510000, 0x51001f) AM_DEVWRITE8("k051316", k051316_ctrl_w, 0x00ff)
78	81	AM_RANGE(0xff8000, 0xffbfff) AM_RAM                        /* work RAM */
79	82	AM_RANGE(0xffc000, 0xffc2ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
80	83	AM_RANGE(0xffc300, 0xffcfff) AM_RAM
r6740	r6741
232	235	};
233	236
234	237
	238	static const k051316_interface tail2nos_k051316_intf =
	239	{
	240	"gfx3", 2,
	241	-4, TRUE, 0,
	242	1, -89, -14,
	243	tail2nos_zoom_callback
	244	};
235	245
236	246	static MACHINE_DRIVER_START( tail2nos )
237	247
r6740	r6741
260	270	MDRV_VIDEO_START(tail2nos)
261	271	MDRV_VIDEO_UPDATE(tail2nos)
262	272
	273	MDRV_K051316_ADD("k051316", tail2nos_k051316_intf)
	274
263	275	/* sound hardware */
264	276	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
265	277

src/mame/drivers/mrjong.c

r6740	r6741
47	47	#include "sound/sn76496.h"
48	48
49	49
	50	extern UINT8 *mrjong_videoram;
	51	extern UINT8 *mrjong_colorram;
	52
50	53	extern WRITE8_HANDLER( mrjong_videoram_w );
51	54	extern WRITE8_HANDLER( mrjong_colorram_w );
52	55	extern WRITE8_HANDLER( mrjong_flipscreen_w );
r6740	r6741
60	63	AM_RANGE(0x0000, 0x7fff) AM_ROM
61	64	AM_RANGE(0x8000, 0x87ff) AM_RAM
62	65	AM_RANGE(0xa000, 0xa7ff) AM_RAM
63		AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(mrjong_videoram_w) AM_BASE_GENERIC(videoram)
64		AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(mrjong_colorram_w) AM_BASE_GENERIC(colorram)
	66	AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(mrjong_videoram_w) AM_BASE(&mrjong_videoram)
	67	AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(mrjong_colorram_w) AM_BASE(&mrjong_colorram)
65	68	ADDRESS_MAP_END
66	69
67	70	static WRITE8_HANDLER( io_0x00_w )

src/mame/drivers/m79amb.c

r6740	r6741
55	55	*/
56	56
57	57	#include "driver.h"
58		#include "m79amb.h"
	58	#include "includes/m79amb.h"
59	59	#include "cpu/i8085/i8085.h"
60	60
61	61	static UINT8 *ramtek_videoram;

src/mame/drivers/koftball.c

r6740	r6741
36	36
37	37	static UINT16 *bmc_1_videoram, *bmc_2_videoram,*main_ram;
38	38	static tilemap *tilemap_1,*tilemap_2;
	39	static UINT8 *bmc_colorram;
39	40	static int clr_offset=0;
40	41
41	42	static TILE_GET_INFO( get_t1_tile_info )
r6740	r6741
75	76
76	77	static WRITE16_HANDLER( bmc_RAMDAC_offset_w )
77	78	{
78		clr_offset=data*3;
	79	clr_offset=data*3;
79	80	}
80	81
81	82	static WRITE16_HANDLER( bmc_RAMDAC_color_w )
82	83	{
83		space->machine->generic.colorram.u8[clr_offset]=data;
84		palette_set_color_rgb(space->machine,clr_offset/3,pal6bit(space->machine->generic.colorram.u8[(clr_offset/3)*3]),pal6bit(space->machine->generic.colorram.u8[(clr_offset/3)*3+1]),pal6bit(space->machine->generic.colorram.u8[(clr_offset/3)*3+2]));
85		clr_offset=(clr_offset+1)%768;
	84	bmc_colorram[clr_offset]=data;
	85	palette_set_color_rgb(space->machine,clr_offset/3,pal6bit(bmc_colorram[(clr_offset/3)*3]),pal6bit(bmc_colorram[(clr_offset/3)*3+1]),pal6bit(bmc_colorram[(clr_offset/3)*3+2]));
	86	clr_offset=(clr_offset+1)%768;
86	87	}
87	88
88	89	static READ16_HANDLER( bmc_RAMDAC_color_r )
89	90	{
90		return space->machine->generic.colorram.u8[clr_offset];
	91	return bmc_colorram[clr_offset];
91	92	}
92	93
93	94	static READ16_HANDLER(random_number_r)
r6740	r6741
271	272	#endif
272	273	static DRIVER_INIT(koftball)
273	274	{
274		machine->generic.colorram.u8=auto_alloc_array(machine, UINT8, 768);
	275	bmc_colorram = auto_alloc_array(machine, UINT8, 768);
275	276
276	277	#if NVRAM_HACK
277	278	{

src/mame/drivers/victory.c

r6740	r6741
96	96
97	97	#include "driver.h"
98	98	#include "cpu/z80/z80.h"
99		#include "exidy.h"
100		#include "victory.h"
	99	#include "includes/exidy.h"
	100	#include "includes/victory.h"
101	101
102	102
103	103

src/mame/drivers/wardner.c

r6740	r6741
126	126	#include "driver.h"
127	127	#include "cpu/z80/z80.h"
128	128	#include "cpu/tms32010/tms32010.h"
129		#include "twincobr.h"
	129	#include "includes/twincobr.h"
130	130	#include "sound/3812intf.h"
131	131
132	132

src/mame/drivers/cninja.c

r6740	r6741
43	43	#include "driver.h"
44	44	#include "cpu/z80/z80.h"
45	45	#include "cpu/m68000/m68000.h"
46		#include "cninja.h"
	46	#include "includes/cninja.h"
47	47	#include "cpu/h6280/h6280.h"
48		#include "deco16ic.h"
49		#include "decocrpt.h"
50		#include "decoprot.h"
	48	#include "includes/deco16ic.h"
	49	#include "includes/decocrpt.h"
	50	#include "includes/decoprot.h"
51	51	#include "sound/2203intf.h"
52	52	#include "sound/2151intf.h"
53	53	#include "sound/okim6295.h"
54	54
55	55	static int cninja_scanline, cninja_irq_mask;
56		static emu_timer *raster_irq_timer;
	56	static const device_config *raster_irq_timer;
57	57	static UINT16 *cninja_ram;
58	58
59	59	/**********************************************************************************/
r6740	r6741
70	70	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
71	71	}
72	72
73		static TIMER_CALLBACK( interrupt_gen )
	73	static TIMER_DEVICE_CALLBACK( interrupt_gen )
74	74	{
75	75	int scanline = param;
76	76
r6740	r6741
85	85	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf34_control[3] & 0xffff;
86	86	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf34_control[4] & 0xffff;
87	87
88		cputag_set_input_line(machine, "maincpu", (cninja_irq_mask&0x10) ? 3 : 4, ASSERT_LINE);
89		timer_adjust_oneshot(raster_irq_timer, attotime_never, 0);
	88	cputag_set_input_line(timer->machine, "maincpu", (cninja_irq_mask&0x10) ? 3 : 4, ASSERT_LINE);
	89	timer_device_adjust_oneshot(raster_irq_timer, attotime_never, 0);
90	90	}
91	91
92	92	static READ16_HANDLER( cninja_irq_r )
r6740	r6741
122	122	case 1: /* Raster IRQ scanline position, only valid for values between 1 & 239 (0 and 240-256 do NOT generate IRQ's) */
123	123	cninja_scanline=data&0xff;
124	124	if ((cninja_irq_mask&0x2)==0 && cninja_scanline>0 && cninja_scanline<240)
125		timer_adjust_oneshot(raster_irq_timer, video_screen_get_time_until_pos(space->machine->primary_screen, cninja_scanline, 0), cninja_scanline);
	125	timer_device_adjust_oneshot(raster_irq_timer, video_screen_get_time_until_pos(space->machine->primary_screen, cninja_scanline, 0), cninja_scanline);
126	126	else
127		timer_adjust_oneshot(raster_irq_timer,attotime_never,0);
	127	timer_device_adjust_oneshot(raster_irq_timer,attotime_never,0);
128	128	return;
129	129
130	130	case 2: /* VBL irq ack */
r6740	r6741
180	180	AM_RANGE(0x308000, 0x308fff) AM_WRITENOP /* Bootleg only */
181	181	ADDRESS_MAP_END
182	182
	183	static WRITE16_HANDLER( cninjabl_soundlatch_w )
	184	{
	185	// todo:
	186	}
	187
	188	static ADDRESS_MAP_START( cninjabl_map, ADDRESS_SPACE_PROGRAM, 16 )
	189	AM_RANGE(0x000000, 0x0bffff) AM_ROM
	190
	191	AM_RANGE(0x138000, 0x1387ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) /* bootleg sprite-ram (sprites rewritten here in new format) */
	192
	193	AM_RANGE(0x140000, 0x14000f) AM_WRITEONLY AM_BASE(&deco16_pf12_control)
	194	AM_RANGE(0x144000, 0x144fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	195	AM_RANGE(0x146000, 0x146fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	196	AM_RANGE(0x14c000, 0x14c7ff) AM_WRITEONLY AM_BASE(&deco16_pf1_rowscroll)
	197	AM_RANGE(0x14e000, 0x14e7ff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
	198
	199	AM_RANGE(0x150000, 0x15000f) AM_WRITEONLY AM_BASE(&deco16_pf34_control) // not used / incorrect on this
	200	AM_RANGE(0x154000, 0x154fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	201	AM_RANGE(0x156000, 0x156fff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	202	AM_RANGE(0x15c000, 0x15c7ff) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	203	AM_RANGE(0x15e000, 0x15e7ff) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
	204
	205	AM_RANGE(0x17ff22, 0x17ff23) AM_READ_PORT("DSW")
	206	AM_RANGE(0x17ff28, 0x17ff29) AM_READ_PORT("IN1")
	207	AM_RANGE(0x17ff2a, 0x17ff2b) AM_WRITE( cninjabl_soundlatch_w )
	208	AM_RANGE(0x17ff2c, 0x17ff2d) AM_READ_PORT("IN0")
	209
	210	AM_RANGE(0x180000, 0x187fff) AM_RAM // more ram on bootleg?
	211
	212	AM_RANGE(0x190000, 0x190007) AM_READWRITE(cninja_irq_r, cninja_irq_w)
	213	AM_RANGE(0x19c000, 0x19dfff) AM_RAM_WRITE(deco16_nonbuffered_palette_w) AM_BASE_GENERIC(paletteram)
	214
	215	AM_RANGE(0x1b4000, 0x1b4001) AM_WRITE(buffer_spriteram16_w) /* DMA flag */
	216	ADDRESS_MAP_END
	217
183	218	static ADDRESS_MAP_START( edrandy_map, ADDRESS_SPACE_PROGRAM, 16 )
184	219	AM_RANGE(0x000000, 0x0fffff) AM_ROM
185	220
r6740	r6741
588	623	16*8   /* every char takes 8 consecutive bytes */
589	624	};
590	625
	626	static const gfx_layout charlayout_boot =
	627	{
	628	8,8,
	629	RGN_FRAC(1,1),
	630	4,
	631	{ 16, 0, 24, 8 },
	632	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	633	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
	634	8*32
	635	};
	636
591	637	static const gfx_layout spritelayout =
592	638	{
593	639	16,16,
r6740	r6741
634	680	GFXDECODE_ENTRY( "gfx4", 0, spritelayout,768, 32 )   /* Sprites 16x16 */
635	681	GFXDECODE_END
636	682
	683	static GFXDECODE_START( cninjabl )
	684	GFXDECODE_ENTRY( "gfx1", 0, charlayout_boot,  0, 32 )   /* Characters 8x8 */
	685	GFXDECODE_ENTRY( "gfx2", 0, spritelayout,0, 32 )   /* Tiles 16x16 */
	686	GFXDECODE_ENTRY( "gfx3", 0, spritelayout,512, 64 )   /* Tiles 16x16 */
	687	GFXDECODE_ENTRY( "gfx4", 0, spritelayout,768, 32 )   /* Sprites 16x16 */
	688	GFXDECODE_END
	689
	690
637	691	static GFXDECODE_START( robocop2 )
638	692	GFXDECODE_ENTRY( "gfx1", 0, charlayout,    0, 32 )   /* Characters 8x8 */
639	693	GFXDECODE_ENTRY( "gfx2", 0, tilelayout,    0, 32 )   /* Tiles 16x16 */
r6740	r6741
654	708
655	709	static MACHINE_RESET( cninja )
656	710	{
657		raster_irq_timer = timer_alloc(machine, interrupt_gen, NULL);
	711	raster_irq_timer = devtag_get_device(machine, "raster_timer");
658	712	cninja_scanline=0;
659	713	cninja_irq_mask=0;
660	714	}
r6740	r6741
700	754
701	755	MDRV_MACHINE_RESET(cninja)
702	756
	757	MDRV_TIMER_ADD("raster_timer", interrupt_gen)
	758
703	759	/* video hardware */
704	760	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
705	761
r6740	r6741
748	804
749	805	MDRV_MACHINE_RESET(cninja)
750	806
	807	MDRV_TIMER_ADD("raster_timer", interrupt_gen)
	808
751	809	/* video hardware */
752	810	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
753	811
r6740	r6741
781	839	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.60)
782	840	MACHINE_DRIVER_END
783	841
	842
	843	static MACHINE_DRIVER_START( cninjabl )
	844
	845	/* basic machine hardware */
	846	MDRV_CPU_ADD("maincpu", M68000, 12000000)
	847	MDRV_CPU_PROGRAM_MAP(cninjabl_map)
	848	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
	849
	850	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
	851	MDRV_CPU_PROGRAM_MAP(stoneage_s_map)
	852
	853	MDRV_MACHINE_RESET(cninja)
	854
	855	MDRV_TIMER_ADD("raster_timer", interrupt_gen)
	856
	857	/* video hardware */
	858	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
	859
	860	MDRV_SCREEN_ADD("screen", RASTER)
	861	MDRV_SCREEN_REFRESH_RATE(58)
	862	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	863	MDRV_SCREEN_SIZE(32*8, 32*8)
	864	MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
	865
	866	MDRV_GFXDECODE(cninjabl)
	867	MDRV_PALETTE_LENGTH(2048)
	868
	869	MDRV_VIDEO_START(stoneage)
	870	MDRV_VIDEO_UPDATE(cninja)
	871	MDRV_VIDEO_EOF(cninja)
	872
	873	/* sound hardware */
	874	MDRV_SPEAKER_STANDARD_MONO("mono")
	875
	876	MDRV_SOUND_ADD("ymsnd", YM2151, 32220000/9)
	877	MDRV_SOUND_CONFIG(ym2151_interface2)
	878	MDRV_SOUND_ROUTE(0, "mono", 0.45)
	879	MDRV_SOUND_ROUTE(1, "mono", 0.45)
	880
	881	MDRV_SOUND_ADD("oki1", OKIM6295, 32220000/32)
	882	MDRV_SOUND_CONFIG(okim6295_interface_pin7high)
	883	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
	884	MACHINE_DRIVER_END
	885
	886
784	887	static MACHINE_DRIVER_START( edrandy )
785	888
786	889	/* basic machine hardware */
r6740	r6741
793	896
794	897	MDRV_MACHINE_RESET(cninja)
795	898
	899	MDRV_TIMER_ADD("raster_timer", interrupt_gen)
	900
796	901	/* video hardware */
797	902	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
798	903
r6740	r6741
841	946
842	947	MDRV_MACHINE_RESET(cninja)
843	948
	949	MDRV_TIMER_ADD("raster_timer", interrupt_gen)
	950
844	951	/* video hardware */
845	952	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
846	953
r6740	r6741
1131	1238	ROM_REGION( 0x80000, "oki2", ROMREGION_ERASEFF )
1132	1239	ROM_END
1133	1240
	1241	ROM_START( cninjabl )
	1242	ROM_REGION( 0xc0000, "maincpu", 0 ) /* 68000 code */
	1243	ROM_LOAD16_WORD_SWAP( "joe mac 3.68k", 0x00000, 0x80000,  CRC(dc931d80) SHA1(78103f74fb428c4735e77d99a143cdf28915ef26) )
	1244	ROM_LOAD16_WORD_SWAP( "joe mac 4.68k", 0x80000, 0x40000,  CRC(e8dfe0b5) SHA1(f7f883c19023bc68146aea5eaf98d2fdd606d5e3) )
	1245	ROM_IGNORE(0x40000) //  1xxxxxxxxxxxxxxxxxx = 0xFF
	1246
	1247	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 Sound CPU */
	1248	ROM_LOAD( "joe mac 5.z80",  0x00000,  0x10000, CRC(d791b9d7) SHA1(7842ab7e960b692bdbcadf5c64f09ddd1a3fb861) ) // 1ST AND 2ND HALF IDENTICAL
	1249
	1250	ROM_REGION( 0x400000, "gfxtemp", 0 ) // the bootleg has the gfx in 2 roms
	1251	ROM_LOAD16_BYTE( "joe mac 1.gfx",  0x00000,  0x200000,  CRC(17ea5931) SHA1(cb686dea0d960d35ab3709f1f592598c2d757045) )
	1252	ROM_LOAD16_BYTE( "joe mac 2.gfx",  0x00001,  0x200000,  CRC(cc95317b) SHA1(ffa97dde954f73d8e0f6e55387b44f5bcc08242b) )
	1253
	1254	// split larger bootleg GFX roms into required regions
	1255	ROM_REGION( 0x020000, "gfx1", ROMREGION_INVERT ) // chars
	1256	ROM_COPY( "gfxtemp", 0x000000, 0x000000, 0x020000 )
	1257
	1258	ROM_REGION( 0x080000, "gfx2", ROMREGION_INVERT ) // tiles 3
	1259	ROM_COPY( "gfxtemp", 0x080000, 0x000000, 0x080000 )
	1260
	1261	ROM_REGION( 0x100000, "gfx3", ROMREGION_INVERT ) // tiles 2
	1262	ROM_COPY( "gfxtemp", 0x180000, 0x000000, 0x080000 )
	1263	ROM_COPY( "gfxtemp", 0x100000, 0x080000, 0x080000 )
	1264
	1265	ROM_REGION( 0x200000, "gfx4", 0 ) // sprites
	1266	ROM_COPY( "gfxtemp", 0x200000, 0x000000, 0x200000 )
	1267
	1268	ROM_REGION( 0x80000, "oki1", 0 ) /* Oki samples */
	1269	ROM_LOAD( "joe mac 6.samples",  0x00000,  0x80000, CRC(dbecad83) SHA1(de34653606f12d2c606ff7d1cbce993521772884) ) // 1ST AND 2ND HALF IDENTICAL
	1270	ROM_END
	1271
	1272
1134	1273	ROM_START( edrandy ) /* World ver 3 */
1135	1274	ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */
1136	1275	ROM_LOAD16_BYTE( "gg-00-2.k1", 0x00000, 0x20000, CRC(ce1ba964) SHA1(da21734721344eff41a64a7f2382d5c027a24782) )
r6740	r6741
1715	1854	GAME( 1991, cninja1,  cninja,  cninja,   cninja,  cninja,   ROT0, "Data East Corporation", "Caveman Ninja (World ver 1)", 0 )
1716	1855	GAME( 1991, cninjau,  cninja,  cninja,   cninjau, cninja,   ROT0, "Data East Corporation", "Caveman Ninja (US ver 4)", 0 )
1717	1856	GAME( 1991, joemac,   cninja,  cninja,   cninja,  cninja,   ROT0, "Data East Corporation", "Tatakae Genshizin Joe & Mac (Japan ver 1)", 0 )
1718		GAME( 1991, stoneage, cninja,  stoneage, cninja,  stoneage, ROT0, "bootleg", "Stoneage", 0 )
	1857	GAME( 1991, stoneage, cninja,  stoneage, cninja,  stoneage, ROT0, "bootleg", "Stoneage (bootleg of Caveman Ninja)", 0 )
	1858	GAME( 1991, cninjabl, cninja,  cninjabl, cninja,  0,        ROT0, "bootleg", "Caveman Ninja (bootleg)", GAME_NOT_WORKING )
1719	1859	GAME( 1991, robocop2, 0,       robocop2, robocop2,0,        ROT0, "Data East Corporation", "Robocop 2 (Euro/Asia v0.10)", 0 )
1720	1860	GAME( 1991, robocop2u,robocop2,robocop2, robocop2,0,        ROT0, "Data East Corporation", "Robocop 2 (US v0.05)", 0 )
1721	1861	GAME( 1991, robocop2j,robocop2,robocop2, robocop2,0,        ROT0, "Data East Corporation", "Robocop 2 (Japan v0.11)", 0 )

src/mame/drivers/dogfgt.c

r6740	r6741
10	10	#include "driver.h"
11	11	#include "cpu/m6502/m6502.h"
12	12	#include "deprecat.h"
13		#include "dogfgt.h"
	13	#include "includes/dogfgt.h"
14	14	#include "sound/ay8910.h"
15	15
16	16

src/mame/drivers/vigilant.c

r6740	r6741
536	536	MDRV_CPU_IO_MAP(sound_io_map)
537	537	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1 */
538	538	/* IRQs are generated by main Z80 and YM2151 */
539		MDRV_MACHINE_RESET(m72_sound)
	539	MDRV_SOUND_START(m72)
	540	MDRV_SOUND_RESET(m72)
540	541
541	542	/* video hardware */
542	543	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
579	580	MDRV_CPU_IO_MAP(buccanrs_sound_io_map)
580	581	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1 */
581	582	/* IRQs are generated by main Z80 and YM2151 */
582		MDRV_MACHINE_RESET(m72_sound)
	583	MDRV_SOUND_START(m72)
	584	MDRV_SOUND_RESET(m72)
583	585
584	586	/* video hardware */
585	587	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
638	640	MDRV_CPU_IO_MAP(sound_io_map)
639	641	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1 */
640	642	/* IRQs are generated by main Z80 and YM2151 */
641		MDRV_MACHINE_RESET(m72_sound)
	643	MDRV_SOUND_START(m72)
	644	MDRV_SOUND_RESET(m72)
642	645
643	646	/* video hardware */
644	647	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/nbmj8991.c

r6740	r6741
30	30
31	31	#include "driver.h"
32	32	#include "cpu/z80/z80.h"
33		#include "nb1413m3.h"
	33	#include "includes/nb1413m3.h"
34	34	#include "sound/ay8910.h"
35	35	#include "sound/3812intf.h"
36	36	#include "sound/dac.h"

src/mame/drivers/canyon.c

r6740	r6741
38	38
39	39	#include "driver.h"
40	40	#include "cpu/m6502/m6502.h"
41		#include "canyon.h"
	41	#include "includes/canyon.h"
42	42	#include "sound/discrete.h"
43	43
44	44

src/mame/drivers/midwunit.c

r6740	r6741
88	88	#include "cpu/tms34010/tms34010.h"
89	89	#include "cpu/adsp2100/adsp2100.h"
90	90	#include "audio/dcs.h"
91		#include "midwunit.h"
	91	#include "includes/midwunit.h"
92	92
93	93
94	94	#define PIXEL_CLOCK      (8000000)

src/mame/drivers/tecmosys.c

r6740	r6741
184	184	#include "driver.h"
185	185	#include "cpu/z80/z80.h"
186	186	#include "machine/eeprom.h"
187		#include "tecmosys.h"
	187	#include "includes/tecmosys.h"
188	188	#include "cpu/m68000/m68000.h"
189	189	#include "sound/okim6295.h"
190	190	#include "sound/262intf.h"

src/mame/drivers/snk6502.c

r6740	r6741
268	268	#include "video/mc6845.h"
269	269	#include "sound/sn76477.h"
270	270	#include "sound/samples.h"
271		#include "snk6502.h"
	271	#include "includes/snk6502.h"
272	272
273	273
274	274	#define MASTER_CLOCK   XTAL_11_289MHz
r6740	r6741
284	284
285	285	/* binary counter (1.4MHz update) */
286	286	static UINT8 sasuke_counter;
287		static emu_timer *sasuke_timer;
288	287
289		static TIMER_CALLBACK( sasuke_update_counter )
	288	static TIMER_DEVICE_CALLBACK( sasuke_update_counter )
290	289	{
291	290	sasuke_counter += 0x10;
292	291	}
r6740	r6741
294	293	static void sasuke_start_counter(running_machine *machine)
295	294	{
296	295	sasuke_counter = 0;
297
298		sasuke_timer = timer_alloc(machine, sasuke_update_counter, NULL);
299		timer_adjust_periodic(sasuke_timer, attotime_zero, 0, ATTOTIME_IN_HZ(MASTER_CLOCK / 8));   // 1.4 MHz
300	296	}
301	297
302	298
r6740	r6741
326	322	static ADDRESS_MAP_START( sasuke_map, ADDRESS_SPACE_PROGRAM, 8 )
327	323	AM_RANGE(0x0000, 0x03ff) AM_RAM
328	324	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
329		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_GENERIC(videoram)
330		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_GENERIC(colorram)
	325	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
	326	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
331	327	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
332	328	AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("crtc", mc6845_address_w)
333	329	AM_RANGE(0x3001, 0x3001) AM_DEVWRITE("crtc", mc6845_register_w)
r6740	r6741
345	341	static ADDRESS_MAP_START( satansat_map, ADDRESS_SPACE_PROGRAM, 8 )
346	342	AM_RANGE(0x0000, 0x03ff) AM_RAM
347	343	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
348		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_GENERIC(videoram)
349		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_GENERIC(colorram)
	344	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
	345	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
350	346	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
351	347	AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("crtc", mc6845_address_w)
352	348	AM_RANGE(0x3001, 0x3001) AM_DEVWRITE("crtc", mc6845_register_w)
r6740	r6741
364	360	static ADDRESS_MAP_START( vanguard_map, ADDRESS_SPACE_PROGRAM, 8 )
365	361	AM_RANGE(0x0000, 0x03ff) AM_RAM
366	362	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
367		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_GENERIC(videoram)
368		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_GENERIC(colorram)
	363	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
	364	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
369	365	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
370	366	AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("crtc", mc6845_address_w)
371	367	AM_RANGE(0x3001, 0x3001) AM_DEVWRITE("crtc", mc6845_register_w)
r6740	r6741
385	381	static ADDRESS_MAP_START( fantasy_map, ADDRESS_SPACE_PROGRAM, 8 )
386	382	AM_RANGE(0x0000, 0x03ff) AM_RAM
387	383	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
388		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_GENERIC(videoram)
389		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_GENERIC(colorram)
	384	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
	385	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
390	386	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
391	387	AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("crtc", mc6845_address_w)
392	388	AM_RANGE(0x2001, 0x2001) AM_DEVWRITE("crtc", mc6845_register_w)
r6740	r6741
405	401	static ADDRESS_MAP_START( pballoon_map, ADDRESS_SPACE_PROGRAM, 8 )
406	402	AM_RANGE(0x0000, 0x03ff) AM_RAM
407	403	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(snk6502_videoram2_w) AM_BASE(&snk6502_videoram2)
408		AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE_GENERIC(videoram)
409		AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE_GENERIC(colorram)
	404	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(snk6502_videoram_w) AM_BASE(&snk6502_videoram)
	405	AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(snk6502_colorram_w) AM_BASE(&snk6502_colorram)
410	406	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(snk6502_charram_w) AM_BASE(&snk6502_charram)
411	407	AM_RANGE(0x3000, 0x9fff) AM_ROM
412	408	AM_RANGE(0xb000, 0xb000) AM_DEVWRITE("crtc", mc6845_address_w)
r6740	r6741
847	843
848	844	MDRV_MC6845_ADD("crtc", MC6845, MASTER_CLOCK / 16, mc6845_intf)
849	845
	846	MDRV_TIMER_ADD_PERIODIC("sasuke_timer", sasuke_update_counter, HZ(MASTER_CLOCK / 8))   // 1.4 MHz
	847
850	848	// sound hardware
851	849	MDRV_SPEAKER_STANDARD_MONO("mono")
852	850

src/mame/drivers/polyplay.c

r6740	r6741
96	96	static int channel2_const;
97	97
98	98	/* timer handling */
99		static TIMER_CALLBACK( polyplay_timer_callback );
100		static emu_timer* polyplay_timer;
	99	static TIMER_DEVICE_CALLBACK( polyplay_timer_callback );
	100	static const device_config* polyplay_timer;
101	101	static WRITE8_HANDLER( polyplay_start_timer2 );
102	102	static WRITE8_HANDLER( polyplay_sound_channel );
103	103
r6740	r6741
123	123	polyplay_set_channel2(0);
124	124	polyplay_play_channel2(machine, 0);
125	125
126		polyplay_timer = timer_alloc(machine, polyplay_timer_callback, NULL);
	126	polyplay_timer = devtag_get_device(machine, "timer");
127	127	}
128	128
129	129
r6740	r6741
234	234	static WRITE8_HANDLER( polyplay_start_timer2 )
235	235	{
236	236	if (data == 0x03)
237		timer_adjust_oneshot(polyplay_timer, attotime_never, 0);
	237	timer_device_adjust_oneshot(polyplay_timer, attotime_never, 0);
238	238
239	239	if (data == 0xb5)
240		timer_adjust_periodic(polyplay_timer, ATTOTIME_IN_HZ(40), 0, ATTOTIME_IN_HZ(40));
	240	timer_device_adjust_periodic(polyplay_timer, ATTOTIME_IN_HZ(40), 0, ATTOTIME_IN_HZ(40));
241	241	}
242	242
243	243	static READ8_HANDLER( polyplay_random_read )
r6740	r6741
287	287
288	288	MDRV_MACHINE_RESET(polyplay)
289	289
	290	MDRV_TIMER_ADD("timer", polyplay_timer_callback)
	291
	292
290	293	/* video hardware */
291	294	MDRV_SCREEN_ADD("screen", RASTER)
292	295	MDRV_SCREEN_REFRESH_RATE(50)
r6740	r6741
354	357	ROM_END
355	358
356	359
357		static TIMER_CALLBACK( polyplay_timer_callback )
	360	static TIMER_DEVICE_CALLBACK( polyplay_timer_callback )
358	361	{
359		cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, 0x4c);
	362	cputag_set_input_line_and_vector(timer->machine, "maincpu", 0, HOLD_LINE, 0x4c);
360	363	}
361	364
362	365	/* game driver */

src/mame/drivers/exidy440.c

r6740	r6741
216	216
217	217	#include "driver.h"
218	218	#include "cpu/m6809/m6809.h"
219		#include "exidy440.h"
	219	#include "includes/exidy440.h"
220	220
221	221
222	222	/* constants */

src/mame/drivers/dassault.c

r6740	r6741
124	124	#include "driver.h"
125	125	#include "cpu/m68000/m68000.h"
126	126	#include "cpu/h6280/h6280.h"
127		#include "deco16ic.h"
	127	#include "includes/deco16ic.h"
128	128	#include "sound/2203intf.h"
129	129	#include "sound/2151intf.h"
130	130	#include "sound/okim6295.h"

src/mame/drivers/dambustr.c

r6740	r6741
16	16	#include "cpu/z80/z80.h"
17	17	#include "includes/galaxian.h"
18	18	#include "includes/galaxold.h"
	19	#include "machine/7474.h"
19	20
20	21	static int noise_data = 0;
21	22
r6740	r6741
187	188
188	189	MDRV_MACHINE_RESET(galaxold)
189	190
	191	MDRV_7474_ADD("7474_9m_1", galaxold_7474_9m_1_callback)
	192	MDRV_7474_ADD("7474_9m_2", galaxold_7474_9m_2_callback)
	193
	194	MDRV_TIMER_ADD("int_timer", galaxold_interrupt_timer)
	195
190	196	/* video hardware */
191	197	MDRV_SCREEN_ADD("screen", RASTER)
192	198	MDRV_SCREEN_REFRESH_RATE(16000.0/132/2)

src/mame/drivers/tatsumi.c

r6740	r6741
141	141	#include "cpu/z80/z80.h"
142	142	#include "cpu/nec/nec.h"
143	143	#include "cpu/m68000/m68000.h"
144		#include "tatsumi.h"
	144	#include "includes/tatsumi.h"
145	145	#include "sound/2151intf.h"
146	146	#include "sound/okim6295.h"
147	147

src/mame/drivers/supbtime.c

r6740	r6741
25	25	#include "cpu/h6280/h6280.h"
26	26	#include "sound/2151intf.h"
27	27	#include "sound/okim6295.h"
28		#include "deco16ic.h"
	28	#include "includes/deco16ic.h"
29	29
30	30	VIDEO_START( supbtime );
31	31	VIDEO_UPDATE( supbtime );

src/mame/drivers/ggconnie.c

r6740	r6741
45	45	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
46	46
47	47	PORT_START("SWA")
48		PORT_DIPNAME(0x03, 0x03, "Coin Set")
49		PORT_DIPSETTING(0x03, DEF_STR(1C_1C))
50		PORT_DIPNAME(0x1c, 0x1c, "100 Yen -> Coin" )
	48	PORT_DIPNAME(0x03, 0x03, "Coin Set")  PORT_DIPLOCATION("SWA:1,2")
	49	PORT_DIPSETTING(0x03, DEF_STR(1C_1C) )
	50	PORT_DIPNAME(0x1c, 0x1c, "100 Yen -> Coin" )  PORT_DIPLOCATION("SWA:3,4,5")
51	51	PORT_DIPSETTING(0x00, "11 Coin")
52	52	PORT_DIPSETTING(0x04, "12 Coin")
53	53	PORT_DIPSETTING(0x08, "0 Coin")
r6740	r6741
56	56	PORT_DIPSETTING(0x14, "7 Coin")
57	57	PORT_DIPSETTING(0x18, "8 Coin")
58	58	PORT_DIPSETTING(0x1c, "10 Coin")
59		PORT_DIPUNUSED(0x20, IP_ACTIVE_LOW )
60		PORT_DIPUNUSED(0x40, IP_ACTIVE_LOW )
61		PORT_DIPUNUSED(0x80, IP_ACTIVE_LOW )
	59	PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SWA:6" )
	60	PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SWA:7" )
	61	PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SWA:8" )
62	62
63	63	PORT_START("SWB")
64		PORT_DIPNAME(0x07, 0x07, "Payout")
	64	PORT_DIPNAME(0x07, 0x07, "Payout")  PORT_DIPLOCATION("SWB:1,2,3")
65	65	PORT_DIPSETTING(0x00, "85%")
66	66	PORT_DIPSETTING(0x01, "90%")
67	67	PORT_DIPSETTING(0x02, "55%")
r6740	r6741
70	70	PORT_DIPSETTING(0x05, "70%")
71	71	PORT_DIPSETTING(0x06, "75%")
72	72	PORT_DIPSETTING(0x07, "80%")
73		PORT_DIPNAME(0x18, 0x18, DEF_STR(Difficulty))
	73	PORT_DIPNAME(0x18, 0x18, DEF_STR(Difficulty))  PORT_DIPLOCATION("SWB:4,5")
74	74	PORT_DIPSETTING(0x00, DEF_STR(Easy))
75	75	PORT_DIPSETTING(0x08, DEF_STR(Very_Hard))
76	76	PORT_DIPSETTING(0x10, DEF_STR(Hard))
77	77	PORT_DIPSETTING(0x18, DEF_STR(Normal))
78		PORT_DIPNAME(0x20, 0x20, "Payout Info")
	78	PORT_DIPNAME(0x20, 0x20, "Payout Info")  PORT_DIPLOCATION("SWB:6")
79	79	PORT_DIPSETTING(0x00, DEF_STR(Off))
80	80	PORT_DIPSETTING(0x20, DEF_STR(On))
81		PORT_DIPNAME(0xc0, 0xc0, "Rate")
	81	PORT_DIPNAME(0xc0, 0xc0, "Rate")  PORT_DIPLOCATION("SWB:7,8")
82	82	PORT_DIPSETTING(0x00, "Few" )
83	83	PORT_DIPSETTING(0x40, "Most" )
84	84	PORT_DIPSETTING(0x80, "More" )
85	85	PORT_DIPSETTING(0xc0, DEF_STR(Normal))
86	86
87	87	PORT_START("SWC")
88		PORT_DIPNAME(0x03, 0x03, "Demo Sound" )
	88	PORT_DIPNAME(0x03, 0x03, "Demo Sound" )  PORT_DIPLOCATION("SWC:1,2")
89	89	PORT_DIPSETTING(0x00, DEF_STR(Off) )
90	90	PORT_DIPSETTING(0x01, "3/1" )
91	91	PORT_DIPSETTING(0x02, "2/1" )
92	92	PORT_DIPSETTING(0x03, "1/1" )
93		PORT_DIPNAME(0x0c, 0x0c, "Start Time" )
	93	PORT_DIPNAME(0x0c, 0x0c, "Start Time" )  PORT_DIPLOCATION("SWC:3,4")
94	94	PORT_DIPSETTING(0x00, "4 sec" )
95	95	PORT_DIPSETTING(0x04, "8 sec" )
96	96	PORT_DIPSETTING(0x08, "6 sec" )
97	97	PORT_DIPSETTING(0x0c, "5 sec" )
98		PORT_DIPUNUSED(0x10, IP_ACTIVE_LOW )
99		PORT_DIPUNUSED(0x20, IP_ACTIVE_LOW )
100		PORT_DIPNAME(0x40, 0x00, "RAM Clear" )
	98	PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SWC:5" )
	99	PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SWC:6" )
	100	PORT_DIPNAME(0x40, 0x00, "RAM Clear" )  PORT_DIPLOCATION("SWC:7")
101	101	PORT_DIPSETTING(0x40, DEF_STR(Off) )
102	102	PORT_DIPSETTING(0x00, DEF_STR(On) )
103		PORT_SERVICE(0x80, IP_ACTIVE_LOW)
	103	PORT_SERVICE(0x80, IP_ACTIVE_LOW)  PORT_DIPLOCATION("SWC:8")
104	104
105	105	INPUT_PORTS_END
106	106
r6740	r6741
187	187	DRIVER_INIT_CALL(pce);
188	188	}
189	189
190		GAME( 19??, ggconnie, 0, ggconnie, ggconnie, ggconnie, ROT0, "Capcom", "Go! Go! Connie chan Jaka Jaka Janken", GAME_NO_SOUND | GAME_NOT_WORKING )
	190	GAME( 1996, ggconnie, 0, ggconnie, ggconnie, ggconnie, ROT0, "Capcom", "Go! Go! Connie chan Jaka Jaka Janken", GAME_NO_SOUND | GAME_NOT_WORKING )

src/mame/drivers/toratora.c

r6740	r6741
23	23	#include "sound/sn76477.h"
24	24
25	25
26		static UINT8 *toratora_videoram;
27		static size_t toratora_videoram_size;
	26	typedef struct _toratora_state toratora_state;
	27	struct _toratora_state
	28	{
	29	/* memory pointers */
	30	UINT8 *    videoram;
	31	size_t     videoram_size;
28	32
29		static UINT8 clear_tv;
	33	/* video-related */
	34	int        timer;
	35	UINT8      last;
	36	UINT8      clear_tv;
30	37
	38	/* devices */
	39	const device_config *maincpu;
	40	const device_config *pia_u1;
	41	const device_config *pia_u2;
	42	const device_config *pia_u3;
	43	};
31	44
32	45
	46
33	47	/*************************************
34	48	*
35	49	*  Input handling
36	50	*
37	51	*************************************/
38	52
39		static READ8_DEVICE_HANDLER( port_b_u3_r )
40		{
41		logerror("%s: read DIP\n",cpuexec_describe_context(device->machine));
42		return input_port_read(device->machine, "DSW");
43		}
44
45
46	53	static WRITE_LINE_DEVICE_HANDLER( cb2_u3_w )
47	54	{
48	55	logerror("DIP tristate %sactive\n",(state & 1) ? "in" : "");
49	56	}
50	57
51	58
52
53	59	/*************************************
54	60	*
55	61	*  Video hardware
r6740	r6741
58	64
59	65	static VIDEO_UPDATE( toratora )
60	66	{
	67	toratora_state *state = (toratora_state *)screen->machine->driver_data;
61	68	offs_t offs;
62	69
63		for (offs = 0; offs < toratora_videoram_size; offs++)
	70	for (offs = 0; offs < state->videoram_size; offs++)
64	71	{
65	72	int i;
66	73
67	74	UINT8 y = offs >> 5;
68	75	UINT8 x = offs << 3;
69		UINT8 data = toratora_videoram[offs];
	76	UINT8 data = state->videoram[offs];
70	77
71	78	for (i = 0; i < 8; i++)
72	79	{
r6740	r6741
78	85	}
79	86
80	87	/* the video system clears as it writes out the pixels */
81		if (clear_tv)
82		toratora_videoram[offs] = 0;
	88	if (state->clear_tv)
	89	state->videoram[offs] = 0;
83	90	}
84	91
85		clear_tv = 0;
	92	state->clear_tv = 0;
86	93
87	94	return 0;
88	95	}
r6740	r6741
90	97
91	98	static WRITE8_HANDLER( clear_tv_w )
92	99	{
93		clear_tv = 1;
	100	toratora_state *state = (toratora_state *)space->machine->driver_data;
	101	state->clear_tv = 1;
94	102	}
95	103
96	104
97
98	105	/*************************************
99	106	*
100	107	*  Coin counter
r6740	r6741
110	117	}
111	118
112	119
113
114	120	/*************************************
115	121	*
116	122	*  Interrupt generation
r6740	r6741
119	125
120	126	static WRITE_LINE_DEVICE_HANDLER( main_cpu_irq )
121	127	{
	128	toratora_state *toratora = (toratora_state *)device->machine->driver_data;
122	129	int combined_state = pia6821_get_irq_a(device) | pia6821_get_irq_b(device);
123	130
124		logerror("GEN IRQ: %x\n", combined_state);
125		cputag_set_input_line(device->machine, "maincpu", 0, combined_state ? ASSERT_LINE : CLEAR_LINE);
	131	logerror("GEN IRQ: %x\n", combined_state);
	132	cpu_set_input_line(toratora->maincpu, 0, combined_state ? ASSERT_LINE : CLEAR_LINE);
126	133	}
127	134
128	135
129
130
131
132		static int timer;
133
134	136	static INTERRUPT_GEN( toratora_timer )
135	137	{
136		const device_config *pia = devtag_get_device(device->machine, "pia_u1");
137		static UINT8 last = 0;
138		timer++;   /* timer counting at 16 Hz */
	138	toratora_state *state = (toratora_state *)device->machine->driver_data;
	139	state->timer++;   /* timer counting at 16 Hz */
139	140
140	141	/* also, when the timer overflows (16 seconds) watchdog would kick in */
141		if (timer & 0x100) popmessage("watchdog!");
	142	if (state->timer & 0x100)
	143	popmessage("watchdog!");
142	144
143
144		if (last != (input_port_read(device->machine, "INPUT") & 0x0f))
	145	if (state->last != (input_port_read(device->machine, "INPUT") & 0x0f))
145	146	{
146		last = input_port_read(device->machine, "INPUT") & 0x0f;
	147	state->last = input_port_read(device->machine, "INPUT") & 0x0f;
147	148	generic_pulse_irq_line(device, 0);
148	149	}
149		pia6821_set_input_a(pia, input_port_read(device->machine, "INPUT") & 0x0f, 0);
150
151		pia6821_ca1_w(pia, 0, input_port_read(device->machine, "INPUT") & 0x10);
152
153		pia6821_ca2_w(pia, 0, input_port_read(device->machine, "INPUT") & 0x20);
	150	pia6821_set_input_a(state->pia_u1, input_port_read(device->machine, "INPUT") & 0x0f, 0);
	151	pia6821_ca1_w(state->pia_u1, 0, input_port_read(device->machine, "INPUT") & 0x10);
	152	pia6821_ca2_w(state->pia_u1, 0, input_port_read(device->machine, "INPUT") & 0x20);
154	153	}
155	154
156	155	static READ8_HANDLER( timer_r )
157	156	{
158		return timer;
	157	toratora_state *state = (toratora_state *)space->machine->driver_data;
	158	return state->timer;
159	159	}
160	160
161	161	static WRITE8_HANDLER( clear_timer_w )
162	162	{
163		timer = 0;
	163	toratora_state *state = (toratora_state *)space->machine->driver_data;
	164	state->timer = 0;
164	165	}
165	166
166	167
167
168	168	/*************************************
169	169	*
170	170	*  Audio hardware
r6740	r6741
279	279	static const pia6821_interface pia_u3_intf =
280	280	{
281	281	DEVCB_NULL,      /* port A in */
282		DEVCB_HANDLER(port_b_u3_r),      /* port B in */
	282	DEVCB_INPUT_PORT("DSW"),      /* port B in */
283	283	DEVCB_NULL,      /* line CA1 in */
284	284	DEVCB_NULL,      /* line CB1 in */
285	285	DEVCB_NULL,      /* line CA2 in */
r6740	r6741
307	307	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
308	308	AM_RANGE(0x0000, 0x0fff) AM_RAM
309	309	AM_RANGE(0x1000, 0x7fff) AM_ROM  /* not fully populated */
310		AM_RANGE(0x8000, 0x9fff) AM_RAM AM_BASE(&toratora_videoram) AM_SIZE(&toratora_videoram_size)
	310	AM_RANGE(0x8000, 0x9fff) AM_RAM AM_BASE_SIZE_MEMBER(toratora_state, videoram, videoram_size)
311	311	AM_RANGE(0xa000, 0xf047) AM_NOP
312	312	AM_RANGE(0xf048, 0xf049) AM_NOP
313	313	AM_RANGE(0xf04a, 0xf04a) AM_WRITE(clear_tv_w)   /* the read is mark *LEDEN, but not used */
r6740	r6741
368	368	*
369	369	*************************************/
370	370
	371	static MACHINE_START( toratora )
	372	{
	373	toratora_state *state = (toratora_state *)machine->driver_data;
	374
	375	state->maincpu = devtag_get_device(machine, "maincpu");
	376	state->pia_u1 = devtag_get_device(machine, "pia_u1");
	377	state->pia_u2 = devtag_get_device(machine, "pia_u2");
	378	state->pia_u3 = devtag_get_device(machine, "pia_u3");
	379
	380	state_save_register_global(machine, state->timer);
	381	state_save_register_global(machine, state->last);
	382	state_save_register_global(machine, state->clear_tv);
	383	}
	384
	385	static MACHINE_RESET( toratora )
	386	{
	387	toratora_state *state = (toratora_state *)machine->driver_data;
	388
	389	state->timer = 0xff;
	390	state->last = 0;
	391	state->clear_tv = 0;
	392	}
	393
371	394	static MACHINE_DRIVER_START( toratora )
372	395
	396	/* driver data */
	397	MDRV_DRIVER_DATA(toratora_state)
	398
373	399	/* basic machine hardware */
374	400	MDRV_CPU_ADD("maincpu", M6800,500000)   /* ?????? game speed is entirely controlled by this */
375	401	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
379	405	MDRV_PIA6821_ADD("pia_u2", pia_u2_intf)
380	406	MDRV_PIA6821_ADD("pia_u3", pia_u3_intf)
381	407
	408	MDRV_MACHINE_START(toratora)
	409	MDRV_MACHINE_RESET(toratora)
	410
382	411	/* video hardware */
383	412	MDRV_VIDEO_UPDATE(toratora)
384	413
r6740	r6741
427	456	*
428	457	*************************************/
429	458
430		GAME( 1980, toratora, 0, toratora, toratora, 0, ROT90, "GamePlan", "Tora Tora (prototype?)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND )
	459	GAME( 1980, toratora, 0, toratora, toratora, 0, ROT90, "GamePlan", "Tora Tora (prototype?)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )

src/mame/drivers/segamsys.c

r6740	r6741
1601	1601	}
1602	1602	else
1603	1603	{
1604		memory_install_read_bank(space, 0x0000, 0xbfff, 0, 0, "bank5");
	1604	memory_install_rom(space, 0x0000, 0xbfff, 0, 0, sms_rom);
1605	1605	memory_unmap_write(space, 0x0000, 0xbfff, 0, 0);
1606	1606	}
1607	1607
r6740	r6741
1674	1674
1675	1675	megatech_set_genz80_as_sms_standard_ports(machine,  tag);
1676	1676
	1677	/* fixed rom bank area */
	1678	sms_rom = memory_install_rom(cputag_get_address_space(machine, tag, ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0, NULL);
	1679
	1680	memcpy(sms_rom, memory_region(machine, "maincpu"), 0xc000);
	1681
1677	1682	if (mapper == MAPPER_STANDARD )
1678	1683	{
1679		/* fixed rom bank area */
1680		sms_rom = auto_alloc_array(machine, UINT8, 0x400000);
1681		memory_install_read_bank(cputag_get_address_space(machine, tag, ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0, "bank5");
1682		memory_unmap_write(cputag_get_address_space(machine, tag, ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0);
1683		memory_set_bankptr(machine,  "bank5", sms_rom );
1684	1684
1685		memcpy(sms_rom, memory_region(machine, "maincpu"), 0x400000);
1686	1685
1687
1688	1686	memory_install_write8_handler(cputag_get_address_space(machine, tag, ADDRESS_SPACE_PROGRAM), 0xfffc, 0xffff, 0, 0, mt_sms_standard_rom_bank_w);
1689	1687
1690	1688	}
1691	1689	else if (mapper == MAPPER_CODEMASTERS )
1692	1690	{
1693		/* fixed rom bank area */
1694		sms_rom = auto_alloc_array(machine, UINT8, 0xc000);
1695		memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0, "bank5");
1696		memory_unmap_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0);
1697		memory_set_bankptr(machine,  "bank5", sms_rom );
1698
1699		memcpy(sms_rom, memory_region(machine, "maincpu"), 0xc000);
1700
1701	1691	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x0000, 0, 0, codemasters_rom_bank_0000_w);
1702	1692	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x4000, 0, 0, codemasters_rom_bank_4000_w);
1703	1693	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x8000, 0, 0, codemasters_rom_bank_8000_w);

src/mame/drivers/blmbycar.c

r6740	r6741
26	26	#include "driver.h"
27	27	#include "cpu/m68000/m68000.h"
28	28	#include "sound/okim6295.h"
29		#include "blmbycar.h"
	29	#include "includes/blmbycar.h"
30	30
31	31
32	32	/***************************************************************************

src/mame/drivers/gbusters.c

r6740	r6741
10	10	#include "driver.h"
11	11	#include "cpu/z80/z80.h"
12	12	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
13		#include "video/konamiic.h"
	13	#include "video/konicdev.h"
14	14	#include "sound/2151intf.h"
15	15	#include "sound/k007232.h"
16		#include "konamipt.h"
	16	#include "includes/konamipt.h"
17	17
18	18	/* prototypes */
19	19	static MACHINE_RESET( gbusters );
20	20	static KONAMI_SETLINES_CALLBACK( gbusters_banking );
21	21
	22	extern void gbusters_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags, int *priority);
	23	extern void gbusters_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
22	24
23	25	extern int gbusters_priority;
24	26
r6740	r6741
30	32
31	33	static INTERRUPT_GEN( gbusters_interrupt )
32	34	{
33		if (K052109_is_IRQ_enabled())
	35	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	36
	37	if (k052109_is_irq_enabled(k052109))
34	38	cpu_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE);
35	39	}
36	40
r6740	r6741
52	56
53	57	static WRITE8_HANDLER( gbusters_1f98_w )
54	58	{
	59	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
55	60
56	61	/* bit 0 = enable char ROM reading through the video RAM */
57		K052109_set_RMRD_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
	62	k052109_set_rmrd_line(k052109, (data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
58	63
59	64	/* bit 7 used (during gfx rom tests), but unknown */
60	65
r6740	r6741
122	127	#endif
123	128	}
124	129
	130	/* special handlers to combine 052109 & 051960 */
	131	static READ8_HANDLER( k052109_051960_r )
	132	{
	133	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	134	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	135
	136	if (k052109_get_rmrd_line(k052109) == CLEAR_LINE)
	137	{
	138	if (offset >= 0x3800 && offset < 0x3808)
	139	return k051937_r(k051960, offset - 0x3800);
	140	else if (offset < 0x3c00)
	141	return k052109_r(k052109, offset);
	142	else
	143	return k051960_r(k051960, offset - 0x3c00);
	144	}
	145	else
	146	return k052109_r(k052109, offset);
	147	}
	148
	149	static WRITE8_HANDLER( k052109_051960_w )
	150	{
	151	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	152	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	153
	154	if (offset >= 0x3800 && offset < 0x3808)
	155	k051937_w(k051960, offset - 0x3800, data);
	156	else if (offset < 0x3c00)
	157	k052109_w(k052109, offset, data);
	158	else
	159	k051960_w(k051960, offset - 0x3c00, data);
	160	}
	161
	162
125	163	static ADDRESS_MAP_START( gbusters_map, ADDRESS_SPACE_PROGRAM, 8 )
126	164	AM_RANGE(0x1f80, 0x1f80) AM_WRITE(gbusters_coin_counter_w)                  /* coin counters */
127	165	AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w)                           /* sound code # */
r6740	r6741
135	173	AM_RANGE(0x1f95, 0x1f95) AM_READ_PORT("DSW2")
136	174	AM_RANGE(0x1f98, 0x1f98) AM_WRITE(gbusters_1f98_w)                        /* enable gfx ROM read through VRAM */
137	175	AM_RANGE(0x1f9c, 0x1f9c) AM_WRITE(gbusters_unknown_w)                     /* ??? */
138		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)      /* tiles + sprites (RAM H21, G21 & H6) */
	176	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)      /* tiles + sprites (RAM H21, G21 & H6) */
139	177	AM_RANGE(0x4000, 0x57ff) AM_RAM                                       /* RAM I12 */
140	178	AM_RANGE(0x5800, 0x5fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram)   /* palette + work RAM (RAM D16 & C16) */
141	179	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")                                 /* banked ROM */
r6740	r6741
223	261	volume_callback   /* external port callback */
224	262	};
225	263
	264	static const k052109_interface gbusters_k052109_intf =
	265	{
	266	"gfx1", 0,
	267	NORMAL_PLANE_ORDER,
	268	KONAMI_ROM_DEINTERLEAVE_2,
	269	gbusters_tile_callback
	270	};
	271
	272	static const k051960_interface gbusters_k051960_intf =
	273	{
	274	"gfx2", 1,
	275	NORMAL_PLANE_ORDER,
	276	KONAMI_ROM_DEINTERLEAVE_2,
	277	gbusters_sprite_callback
	278	};
	279
226	280	static MACHINE_DRIVER_START( gbusters )
227	281
228	282	/* basic machine hardware */
r6740	r6741
250	304	MDRV_VIDEO_START(gbusters)
251	305	MDRV_VIDEO_UPDATE(gbusters)
252	306
	307	MDRV_K052109_ADD("k052109", gbusters_k052109_intf)
	308	MDRV_K051960_ADD("k051960", gbusters_k051960_intf)
	309
253	310	/* sound hardware */
254	311	MDRV_SPEAKER_STANDARD_MONO("mono")
255	312
r6740	r6741
373	430	}
374	431
375	432
376		static DRIVER_INIT( gbusters )
377		{
378		konami_rom_deinterleave_2(machine, "gfx1");
379		konami_rom_deinterleave_2(machine, "gfx2");
380		}
381
382
383
384		GAME( 1988, gbusters, 0,        gbusters, gbusters, gbusters, ROT90, "Konami", "Gang Busters (set 1)", 0 ) /* N02 & J03 program roms */
385		GAME( 1988, gbustersa,gbusters, gbusters, gbusters, gbusters, ROT90, "Konami", "Gang Busters (set 2)", 0 ) /* unknown region program roms */
386		GAME( 1988, crazycop, gbusters, gbusters, gbusters, gbusters, ROT90, "Konami", "Crazy Cop (Japan)", 0 )    /* M02 & J03 program roms */
	433	GAME( 1988, gbusters, 0,        gbusters, gbusters, 0, ROT90, "Konami", "Gang Busters (set 1)", 0 ) /* N02 & J03 program roms */
	434	GAME( 1988, gbustersa,gbusters, gbusters, gbusters, 0, ROT90, "Konami", "Gang Busters (set 2)", 0 ) /* unknown region program roms */
	435	GAME( 1988, crazycop, gbusters, gbusters, gbusters, 0, ROT90, "Konami", "Crazy Cop (Japan)", 0 )    /* M02 & J03 program roms */

src/mame/drivers/bogeyman.c

r6740	r6741
15	15	#include "deprecat.h"
16	16	#include "cpu/m6502/m6502.h"
17	17	#include "sound/ay8910.h"
18		#include "bogeyman.h"
	18	#include "includes/bogeyman.h"
19	19
20	20
21	21	/* Read/Write Handlers */

src/mame/drivers/m72.c

r6740	r6741
88	88	#include "audio/m72.h"
89	89	#include "sound/dac.h"
90	90	#include "sound/2151intf.h"
91		#include "iremipt.h"
92		#include "m72.h"
	91	#include "includes/iremipt.h"
	92	#include "includes/m72.h"
93	93	#include "cpu/mcs51/mcs51.h"
94	94
95	95	#define MASTER_CLOCK      XTAL_32MHz
r6740	r6741
110	110	static MACHINE_START( m72 )
111	111	{
112	112	scanline_timer = timer_alloc(machine, m72_scanline_interrupt, NULL);
	113
	114	state_save_register_global(machine, mcu_sample_addr);
	115	state_save_register_global(machine, mcu_snd_cmd_latch);
113	116	}
114	117
115	118	static TIMER_CALLBACK( synch_callback )
r6740	r6741
124	127	mcu_sample_addr = 0;
125	128	mcu_snd_cmd_latch = 0;
126	129
127		MACHINE_RESET_CALL(m72_sound);
128
129		state_save_register_global(machine, mcu_sample_addr);
130		state_save_register_global(machine, mcu_snd_cmd_latch);
131
132	130	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
133	131	timer_call_after_resynch(machine,  NULL, 0, synch_callback);
134	132	}
r6740	r6741
136	134	static MACHINE_RESET( xmultipl )
137	135	{
138	136	m72_irq_base = 0x08;
139		MACHINE_RESET_CALL(m72_sound);
140	137	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
141	138	}
142	139
143	140	static MACHINE_RESET( kengo )
144	141	{
145	142	m72_irq_base = 0x18;
146		MACHINE_RESET_CALL(m72_sound);
147	143	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
148	144	}
149	145
r6740	r6741
1796	1792	MDRV_MACHINE_START(m72)
1797	1793	MDRV_MACHINE_RESET(m72)
1798	1794
	1795	MDRV_SOUND_START(m72)
	1796	MDRV_SOUND_RESET(m72)
	1797
1799	1798	/* video hardware */
1800	1799	MDRV_GFXDECODE(m72)
1801	1800	MDRV_PALETTE_LENGTH(512)
r6740	r6741
1830	1829	MDRV_MACHINE_START(m72)
1831	1830	MDRV_MACHINE_RESET(m72)
1832	1831
	1832	MDRV_SOUND_START(m72)
	1833	MDRV_SOUND_RESET(m72)
	1834
1833	1835	/* video hardware */
1834	1836	MDRV_GFXDECODE(m72)
1835	1837	MDRV_PALETTE_LENGTH(512)
r6740	r6741
1890	1892	MDRV_MACHINE_START(m72)
1891	1893	MDRV_MACHINE_RESET(xmultipl)
1892	1894
	1895	MDRV_SOUND_START(m72)
	1896	MDRV_SOUND_RESET(m72)
	1897
1893	1898	/* video hardware */
1894	1899	MDRV_GFXDECODE(m72)
1895	1900	MDRV_PALETTE_LENGTH(512)
r6740	r6741
1931	1936	MDRV_MACHINE_START(m72)
1932	1937	MDRV_MACHINE_RESET(xmultipl)
1933	1938
	1939	MDRV_SOUND_START(m72)
	1940	MDRV_SOUND_RESET(m72)
	1941
1934	1942	/* video hardware */
1935	1943	MDRV_GFXDECODE(m72)
1936	1944	MDRV_PALETTE_LENGTH(512)
r6740	r6741
1972	1980	MDRV_MACHINE_START(m72)
1973	1981	MDRV_MACHINE_RESET(xmultipl)
1974	1982
	1983	MDRV_SOUND_START(m72)
	1984	MDRV_SOUND_RESET(m72)
	1985
1975	1986	/* video hardware */
1976	1987	MDRV_GFXDECODE(rtype2)
1977	1988	MDRV_PALETTE_LENGTH(512)
r6740	r6741
2012	2023	MDRV_MACHINE_START(m72)
2013	2024	MDRV_MACHINE_RESET(xmultipl)
2014	2025
	2026	MDRV_SOUND_START(m72)
	2027	MDRV_SOUND_RESET(m72)
	2028
2015	2029	/* video hardware */
2016	2030	MDRV_GFXDECODE(m72)
2017	2031	MDRV_PALETTE_LENGTH(512)
r6740	r6741
2053	2067	MDRV_MACHINE_START(m72)
2054	2068	MDRV_MACHINE_RESET(m72)
2055	2069
	2070	MDRV_SOUND_START(m72)
	2071	MDRV_SOUND_RESET(m72)
	2072
2056	2073	/* video hardware */
2057	2074	MDRV_GFXDECODE(rtype2)
2058	2075	MDRV_PALETTE_LENGTH(512)
r6740	r6741
2093	2110	MDRV_MACHINE_START(m72)
2094	2111	MDRV_MACHINE_RESET(m72)
2095	2112
	2113	MDRV_SOUND_START(m72)
	2114	MDRV_SOUND_RESET(m72)
	2115
2096	2116	/* video hardware */
2097	2117	MDRV_GFXDECODE(majtitle)
2098	2118	MDRV_PALETTE_LENGTH(512)
r6740	r6741
2133	2153	MDRV_MACHINE_START(m72)
2134	2154	MDRV_MACHINE_RESET(xmultipl)
2135	2155
	2156	MDRV_SOUND_START(m72)
	2157	MDRV_SOUND_RESET(m72)
	2158
2136	2159	/* video hardware */
2137	2160	MDRV_GFXDECODE(rtype2)
2138	2161	MDRV_PALETTE_LENGTH(512)
r6740	r6741
2174	2197	MDRV_MACHINE_START(m72)
2175	2198	MDRV_MACHINE_RESET(xmultipl)
2176	2199
	2200	MDRV_SOUND_START(m72)
	2201	MDRV_SOUND_RESET(m72)
	2202
2177	2203	/* video hardware */
2178	2204	MDRV_GFXDECODE(rtype2)
2179	2205	MDRV_PALETTE_LENGTH(512)
r6740	r6741
2215	2241	MDRV_MACHINE_START(m72)
2216	2242	MDRV_MACHINE_RESET(m72)
2217	2243
	2244	MDRV_SOUND_START(m72)
	2245	MDRV_SOUND_RESET(m72)
	2246
2218	2247	/* video hardware */
2219	2248	MDRV_GFXDECODE(rtype2)
2220	2249	MDRV_PALETTE_LENGTH(512)
r6740	r6741
2255	2284	MDRV_MACHINE_START(m72)
2256	2285	MDRV_MACHINE_RESET(kengo)
2257	2286
	2287	MDRV_SOUND_START(m72)
	2288	MDRV_SOUND_RESET(m72)
	2289
2258	2290	/* video hardware */
2259	2291	MDRV_GFXDECODE(rtype2)
2260	2292	MDRV_PALETTE_LENGTH(512)

src/mame/drivers/crgolf.c

r6740	r6741
31	31
32	32	#include "driver.h"
33	33	#include "cpu/z80/z80.h"
34		#include "crgolf.h"
	34	#include "includes/crgolf.h"
35	35	#include "sound/ay8910.h"
36	36	#include "sound/msm5205.h"
37	37

src/mame/drivers/rmhaihai.c

r6740	r6741
34	34	#include "sound/msm5205.h"
35	35
36	36	static int gfxbank;
	37	static UINT8 *videoram;
	38	static UINT8 *colorram;
37	39	static tilemap *bg_tilemap;
38	40
39	41	static WRITE8_HANDLER( rmhaihai_videoram_w )
40	42	{
41		space->machine->generic.videoram.u8[offset] = data;
	43	videoram[offset] = data;
42	44	tilemap_mark_tile_dirty(bg_tilemap, offset);
43	45	}
44	46
45	47	static WRITE8_HANDLER( rmhaihai_colorram_w )
46	48	{
47		space->machine->generic.colorram.u8[offset] = data;
	49	colorram[offset] = data;
48	50	tilemap_mark_tile_dirty(bg_tilemap, offset);
49	51	}
50	52
51	53	static TILE_GET_INFO( get_bg_tile_info )
52	54	{
53		int attr = machine->generic.colorram.u8[tile_index];
54		int code = machine->generic.videoram.u8[tile_index] + (gfxbank << 12) + ((attr & 0x07) << 8) + ((attr & 0x80) << 4);
	55	int attr = colorram[tile_index];
	56	int code = videoram[tile_index] + (gfxbank << 12) + ((attr & 0x07) << 8) + ((attr & 0x80) << 4);
55	57	int color = (gfxbank << 5) + (attr >> 3);
56	58
57	59	SET_TILE_INFO(0, code, color, 0);
r6740	r6741
174	176	static ADDRESS_MAP_START( rmhaihai_map, ADDRESS_SPACE_PROGRAM, 8 )
175	177	AM_RANGE(0x0000, 0x9fff) AM_ROM
176	178	AM_RANGE(0xa000, 0xa7ff) AM_RAM
177		AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(rmhaihai_colorram_w) AM_BASE_GENERIC(colorram)
178		AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(rmhaihai_videoram_w) AM_BASE_GENERIC(videoram)
	179	AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(rmhaihai_colorram_w) AM_BASE(&colorram)
	180	AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(rmhaihai_videoram_w) AM_BASE(&videoram)
179	181	AM_RANGE(0xb83c, 0xb83c) AM_WRITENOP   // ??
180	182	AM_RANGE(0xbc00, 0xbc00) AM_WRITENOP   // ??
181	183	AM_RANGE(0xc000, 0xdfff) AM_ROM
r6740	r6741
199	201	AM_RANGE(0x0000, 0x7fff) AM_ROM
200	202	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1")
201	203	AM_RANGE(0xa000, 0xa7ff) AM_RAM
202		AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(rmhaihai_colorram_w) AM_BASE_GENERIC(colorram)
203		AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(rmhaihai_videoram_w) AM_BASE_GENERIC(videoram)
	204	AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(rmhaihai_colorram_w) AM_BASE(&colorram)
	205	AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(rmhaihai_videoram_w) AM_BASE(&videoram)
204	206	AM_RANGE(0xc000, 0xdfff) AM_ROMBANK("bank2")
205	207	AM_RANGE(0xe000, 0xffff) AM_ROM
206	208	ADDRESS_MAP_END

src/mame/drivers/topspeed.c

r6740	r6741
231	231
232	232	#include "driver.h"
233	233	#include "cpu/z80/z80.h"
234		#include "taitoipt.h"
	234	#include "includes/taitoipt.h"
235	235	#include "cpu/m68000/m68000.h"
236	236	#include "video/taitoic.h"
237	237	#include "audio/taitosnd.h"

src/mame/drivers/fantland.c

r6740	r6741
51	51	#include "sound/3526intf.h"
52	52	#include "sound/dac.h"
53	53	#include "sound/msm5205.h"
54		#include "fantland.h"
	54	#include "includes/fantland.h"
55	55
56	56	/***************************************************************************
57	57

src/mame/drivers/atarig1.c

r6740	r6741
22	22	#include "cpu/m68000/m68000.h"
23	23	#include "audio/atarijsa.h"
24	24	#include "video/atarirle.h"
25		#include "atarig1.h"
	25	#include "includes/atarig1.h"
26	26
27	27
28	28
r6740	r6741
43	43	static MACHINE_START( atarig1 )
44	44	{
45	45	atarig1_state *state = (atarig1_state *)machine->driver_data;
	46	atarigen_init(machine);
46	47	state_save_register_global(machine, state->which_input);
47	48	}
48	49

src/mame/drivers/toobin.c

r6740	r6741
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "machine/atarigen.h"
23	23	#include "audio/atarijsa.h"
24		#include "toobin.h"
	24	#include "includes/toobin.h"
25	25
26	26	#define MASTER_CLOCK      XTAL_32MHz
27	27
r6740	r6741
42	42	}
43	43
44	44
	45	static MACHINE_START( toobin )
	46	{
	47	atarigen_init(machine);
	48	}
	49
	50
45	51	static MACHINE_RESET( toobin )
46	52	{
47	53	toobin_state *state = (toobin_state *)machine->driver_data;
r6740	r6741
224	230	MDRV_CPU_ADD("maincpu", M68010, MASTER_CLOCK/4)
225	231	MDRV_CPU_PROGRAM_MAP(main_map)
226	232
	233	MDRV_MACHINE_START(toobin)
227	234	MDRV_MACHINE_RESET(toobin)
228	235	MDRV_NVRAM_HANDLER(atarigen)
229	236	MDRV_WATCHDOG_VBLANK_INIT(8)

src/mame/drivers/thunderx.c

r6740	r6741
11	11	#include "driver.h"
12	12	#include "cpu/z80/z80.h"
13	13	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
14		#include "video/konamiic.h"
	14	#include "video/konicdev.h"
15	15	#include "sound/2151intf.h"
16	16	#include "sound/k007232.h"
17		#include "konamipt.h"
	17	#include "includes/konamipt.h"
18	18
19	19	static MACHINE_RESET( scontra );
20	20	static MACHINE_RESET( thunderx );
r6740	r6741
26	26
27	27	static UINT8 thunderx_1f98_data = 0;
28	28
	29	extern void thunderx_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	30	extern void thunderx_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow);
	31
	32
29	33	/***************************************************************************/
30	34
31	35	static INTERRUPT_GEN( scontra_interrupt )
32	36	{
33		if (K052109_is_IRQ_enabled())
	37	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	38
	39	if (k052109_is_irq_enabled(k052109))
34	40	cpu_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE);
35	41	}
36	42
r6740	r6741
296	302
297	303	static WRITE8_HANDLER( thunderx_1f98_w )
298	304	{
299		// logerror("%04x: 1f98_w %02x\n",cpu_get_pc(space->cpu),data);
	305	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
300	306
	307	// logerror("%04x: 1f98_w %02x\n",cpu_get_pc(space->cpu),data);
	308
301	309	/* bit 0 = enable char ROM reading through the video RAM */
302		K052109_set_RMRD_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
	310	k052109_set_rmrd_line(k052109, (data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
303	311
304	312	/* bit 1 = PMC-BK */
305	313	pmcbank = (data & 0x02) >> 1;
r6740	r6741
369	377	k007232_set_bank( device, bank_A, bank_B );
370	378	}
371	379
	380	static READ8_HANDLER( k052109_051960_r )
	381	{
	382	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	383	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	384
	385	if (k052109_get_rmrd_line(k052109) == CLEAR_LINE)
	386	{
	387	if (offset >= 0x3800 && offset < 0x3808)
	388	return k051937_r(k051960, offset - 0x3800);
	389	else if (offset < 0x3c00)
	390	return k052109_r(k052109, offset);
	391	else
	392	return k051960_r(k051960, offset - 0x3c00);
	393	}
	394	else
	395	return k052109_r(k052109, offset);
	396	}
	397
	398	static WRITE8_HANDLER( k052109_051960_w )
	399	{
	400	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	401	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	402
	403	if (offset >= 0x3800 && offset < 0x3808)
	404	k051937_w(k051960, offset - 0x3800, data);
	405	else if (offset < 0x3c00)
	406	k052109_w(k052109, offset, data);
	407	else
	408	k051960_w(k051960, offset - 0x3c00, data);
	409	}
	410
372	411	/***************************************************************************/
373	412
374	413	static ADDRESS_MAP_START( scontra_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
383	422	AM_RANGE(0x1f94, 0x1f94) AM_READ_PORT("DSW1")
384	423	AM_RANGE(0x1f95, 0x1f95) AM_READ_PORT("DSW2")
385	424	AM_RANGE(0x1f98, 0x1f98) AM_WRITE(thunderx_1f98_w)
386		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)      /* video RAM + sprite RAM */
	425	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)      /* video RAM + sprite RAM */
387	426
388	427	AM_RANGE(0x4000, 0x57ff) AM_RAM
389	428	AM_RANGE(0x5800, 0x5fff) AM_READWRITE(scontra_bankedram_r, scontra_bankedram_w) AM_BASE(&ram)         /* palette + work RAM */
r6740	r6741
403	442	AM_RANGE(0x1f94, 0x1f94) AM_READ_PORT("DSW1")
404	443	AM_RANGE(0x1f95, 0x1f95) AM_READ_PORT("DSW2")
405	444	AM_RANGE(0x1f98, 0x1f98) AM_READWRITE(thunderx_1f98_r, thunderx_1f98_w) /* registers */
406		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
	445	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
407	446
408	447	AM_RANGE(0x4000, 0x57ff) AM_RAM
409	448	AM_RANGE(0x5800, 0x5fff) AM_READWRITE(thunderx_bankedram_r, thunderx_bankedram_w) AM_BASE(&ram)         /* palette + work RAM + unknown RAM */
r6740	r6741
574	613
575	614
576	615
	616	static const k052109_interface thunderx_k052109_intf =
	617	{
	618	"gfx1", 0,
	619	NORMAL_PLANE_ORDER,
	620	KONAMI_ROM_DEINTERLEAVE_2,
	621	thunderx_tile_callback
	622	};
	623
	624	static const k051960_interface thunderx_k051960_intf =
	625	{
	626	"gfx2", 1,
	627	NORMAL_PLANE_ORDER,
	628	KONAMI_ROM_DEINTERLEAVE_2,
	629	thunderx_sprite_callback
	630	};
	631
577	632	static MACHINE_DRIVER_START( scontra )
578	633
579	634	/* basic machine hardware */
r6740	r6741
601	656	MDRV_VIDEO_START(scontra)
602	657	MDRV_VIDEO_UPDATE(scontra)
603	658
	659	MDRV_K052109_ADD("k052109", thunderx_k052109_intf)
	660	MDRV_K051960_ADD("k051960", thunderx_k051960_intf)
	661
604	662	/* sound hardware */
605	663	MDRV_SPEAKER_STANDARD_MONO("mono")
606	664
r6740	r6741
642	700	MDRV_VIDEO_START(scontra)
643	701	MDRV_VIDEO_UPDATE(scontra)
644	702
	703	MDRV_K052109_ADD("k052109", thunderx_k052109_intf)
	704	MDRV_K051960_ADD("k051960", thunderx_k051960_intf)
	705
645	706	/* sound hardware */
646	707	MDRV_SPEAKER_STANDARD_MONO("mono")
647	708
r6740	r6741
931	992	pmcram = &RAM[0x28800];
932	993	}
933	994
934		static DRIVER_INIT( scontra )
935		{
936		konami_rom_deinterleave_2(machine, "gfx1");
937		konami_rom_deinterleave_2(machine, "gfx2");
938		}
939
940
941
942		GAME( 1988, scontra,  0,        scontra,  scontra,  scontra, ROT90, "Konami", "Super Contra", 0 )
943		GAME( 1988, scontraj, scontra,  scontra,  scontra,  scontra, ROT90, "Konami", "Super Contra (Japan)", 0 )
944		GAME( 1988, thunderx, 0,        thunderx, thunderx, scontra, ROT0,  "Konami", "Thunder Cross (set 1)", 0 )
945		GAME( 1988, thunderxa,thunderx, thunderx, thunderx, scontra, ROT0,  "Konami", "Thunder Cross (set 2)", 0 )
946		GAME( 1988, thunderxb,thunderx, thunderx, thunderx, scontra, ROT0,  "Konami", "Thunder Cross (set 3)", 0 )
947		GAME( 1988, thunderxj,thunderx, thunderx, thnderxj, scontra, ROT0,  "Konami", "Thunder Cross (Japan)", 0 )
948		//GAME( 1988, thndrxja, thunderx, thunderx, thndrxja, scontra, ROT0,  "Konami", "Thunder Cross (Japan, newer revision)", 0 )
	995	GAME( 1988, scontra,  0,        scontra,  scontra,  0, ROT90, "Konami", "Super Contra", 0 )
	996	GAME( 1988, scontraj, scontra,  scontra,  scontra,  0, ROT90, "Konami", "Super Contra (Japan)", 0 )
	997	GAME( 1988, thunderx, 0,        thunderx, thunderx, 0, ROT0,  "Konami", "Thunder Cross (set 1)", 0 )
	998	GAME( 1988, thunderxa,thunderx, thunderx, thunderx, 0, ROT0,  "Konami", "Thunder Cross (set 2)", 0 )
	999	GAME( 1988, thunderxb,thunderx, thunderx, thunderx, 0, ROT0,  "Konami", "Thunder Cross (set 3)", 0 )
	1000	GAME( 1988, thunderxj,thunderx, thunderx, thnderxj, 0, ROT0,  "Konami", "Thunder Cross (Japan)", 0 )
	1001	//GAME( 1988, thndrxja, thunderx, thunderx, thndrxja, 0, ROT0,  "Konami", "Thunder Cross (Japan, newer revision)", 0 )

src/mame/drivers/videopin.c

r6740	r6741
12	12
13	13	#include "driver.h"
14	14	#include "cpu/m6502/m6502.h"
15		#include "videopin.h"
	15	#include "includes/videopin.h"
16	16	#include "videopin.lh"
17	17	#include "sound/discrete.h"
18	18

src/mame/drivers/tumbleb.c

r6740	r6741
312	312	#include "cpu/z80/z80.h"
313	313	#include "cpu/m68000/m68000.h"
314	314	#include "cpu/h6280/h6280.h"
315		#include "decocrpt.h"
	315	#include "includes/decocrpt.h"
316	316	#include "sound/2151intf.h"
317	317	#include "sound/3812intf.h"
318	318	#include "sound/okim6295.h"

src/mame/drivers/ultratnk.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/m6502/m6502.h"
9		#include "ultratnk.h"
	9	#include "includes/ultratnk.h"
10	10	#include "audio/sprint4.h"
11	11
12	12	#define MASTER_CLOCK    12096000

src/mame/drivers/olibochu.c

r6740	r6741
56	56	#include "deprecat.h"
57	57	#include "sound/ay8910.h"
58	58
	59	static UINT8 *videoram;
	60	static UINT8 *colorram;
59	61	static tilemap *bg_tilemap;
60	62
61	63	static PALETTE_INIT( olibochu )
r6740	r6741
97	99
98	100	static WRITE8_HANDLER( olibochu_videoram_w )
99	101	{
100		space->machine->generic.videoram.u8[offset] = data;
	102	videoram[offset] = data;
101	103	tilemap_mark_tile_dirty(bg_tilemap, offset);
102	104	}
103	105
104	106	static WRITE8_HANDLER( olibochu_colorram_w )
105	107	{
106		space->machine->generic.colorram.u8[offset] = data;
	108	colorram[offset] = data;
107	109	tilemap_mark_tile_dirty(bg_tilemap, offset);
108	110	}
109	111
r6740	r6741
120	122
121	123	static TILE_GET_INFO( get_bg_tile_info )
122	124	{
123		int attr = machine->generic.colorram.u8[tile_index];
124		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0x20) << 3);
	125	int attr = colorram[tile_index];
	126	int code = videoram[tile_index] + ((attr & 0x20) << 3);
125	127	int color = (attr & 0x1f) + 0x20;
126	128	int flags = ((attr & 0x40) ? TILE_FLIPX : 0) | ((attr & 0x80) ? TILE_FLIPY : 0);
127	129
r6740	r6741
220	222
221	223	static ADDRESS_MAP_START( olibochu_map, ADDRESS_SPACE_PROGRAM, 8 )
222	224	AM_RANGE(0x0000, 0x7fff) AM_ROM
223		AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(olibochu_videoram_w) AM_BASE_GENERIC(videoram)
224		AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(olibochu_colorram_w) AM_BASE_GENERIC(colorram)
	225	AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(olibochu_videoram_w) AM_BASE(&videoram)
	226	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(olibochu_colorram_w) AM_BASE(&colorram)
225	227	AM_RANGE(0x9000, 0x903f) AM_RAM //???
226	228	AM_RANGE(0x9800, 0x983f) AM_RAM //???
227	229	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")

src/mame/drivers/m90.c

r6740	r6741
28	28	#include "cpu/z80/z80.h"
29	29	#include "cpu/nec/nec.h"
30	30	#include "deprecat.h"
31		#include "iremipt.h"
	31	#include "includes/iremipt.h"
32	32	#include "machine/irem_cpu.h"
33	33	#include "audio/m72.h"
34	34	#include "sound/dac.h"
r6740	r6741
710	710	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
711	711	/* IRQs are generated by main Z80 and YM2151 */
712	712
713		MDRV_MACHINE_RESET(m72_sound)
	713	MDRV_SOUND_START(m72)
	714	MDRV_SOUND_RESET(m72)
714	715
715	716	/* video hardware */
716	717	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
790	791	MDRV_CPU_IO_MAP(m90_sound_cpu_io_map)
791	792	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
792	793	/* IRQs are generated by main Z80 and YM2151 */
793		MDRV_MACHINE_RESET(m72_sound)
	794	MDRV_SOUND_START(m72)
	795	MDRV_SOUND_RESET(m72)
794	796
795	797	/* video hardware */
796	798	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
834	836	MDRV_CPU_IO_MAP(bbmanw_sound_io_map)
835	837	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
836	838	/* IRQs are generated by main Z80 and YM2151 */
837		MDRV_MACHINE_RESET(m72_sound)
	839	MDRV_SOUND_START(m72)
	840	MDRV_SOUND_RESET(m72)
838	841
839	842	/* video hardware */
840	843	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
903	906	MDRV_CPU_IO_MAP(m90_sound_cpu_io_map)
904	907	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
905	908	/* IRQs are generated by main Z80 and YM2151 */
906		MDRV_MACHINE_RESET(m72_sound)
	909	MDRV_SOUND_START(m72)
	910	MDRV_SOUND_RESET(m72)
907	911
908	912	/* video hardware */
909	913	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/phoenix.c

r6740	r6741
34	34	#include "sound/tms36xx.h"
35	35	#include "cpu/i8085/i8085.h"
36	36	#include "sound/ay8910.h"
37		#include "phoenix.h"
	37	#include "includes/phoenix.h"
38	38
39	39
40	40	static ADDRESS_MAP_START( phoenix_memory_map, ADDRESS_SPACE_PROGRAM, 8 )

src/mame/drivers/dday.c

r6740	r6741
52	52	#include "driver.h"
53	53	#include "cpu/z80/z80.h"
54	54	#include "sound/ay8910.h"
55		#include "dday.h"
	55	#include "includes/dday.h"
56	56
57	57
58	58	static ADDRESS_MAP_START( dday_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
353	353	ROM_END
354	354
355	355
356		GAME( 1982, dday,  0,    dday, dday,  0, ROT0, "Olympia", "D-Day", GAME_IMPERFECT_COLORS )
357		GAME( 1982, ddayc, dday, dday, ddayc, 0, ROT0, "Olympia (Centuri license)", "D-Day (Centuri)", GAME_IMPERFECT_COLORS )
	356	GAME( 1982, dday,  0,    dday, dday,  0, ROT0, "Olympia", "D-Day", GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE )
	357	GAME( 1982, ddayc, dday, dday, ddayc, 0, ROT0, "Olympia (Centuri license)", "D-Day (Centuri)", GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE )

src/mame/drivers/cyberbal.c

r6740	r6741
26	26	#include "sound/dac.h"
27	27	#include "rendlay.h"
28	28	#include "audio/atarijsa.h"
29		#include "cyberbal.h"
	29	#include "includes/cyberbal.h"
30	30
31	31
32	32	/*************************************
r6740	r6741
43	43	}
44	44
45	45
	46	static MACHINE_START( cyberbal )
	47	{
	48	cyberbal_state *state = (cyberbal_state *)machine->driver_data;
	49	atarigen_init(machine);
	50
	51	state_save_register_global(machine, state->fast_68k_int);
	52	state_save_register_global(machine, state->io_68k_int);
	53	state_save_register_global(machine, state->sound_data_from_68k);
	54	state_save_register_global(machine, state->sound_data_from_6502);
	55	state_save_register_global(machine, state->sound_data_from_68k_ready);
	56	state_save_register_global(machine, state->sound_data_from_6502_ready);
	57	}
	58
	59
46	60	static MACHINE_RESET( cyberbal )
47	61	{
48	62	cyberbal_state *state = (cyberbal_state *)machine->driver_data;
r6740	r6741
436	450
437	451	MDRV_QUANTUM_TIME(HZ(600))
438	452
	453	MDRV_MACHINE_START(cyberbal)
439	454	MDRV_MACHINE_RESET(cyberbal)
440	455	MDRV_NVRAM_HANDLER(atarigen)
441	456
r6740	r6741
483	498	MDRV_CPU_PROGRAM_MAP(cyberb2p_map)
484	499	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
485	500
	501	MDRV_MACHINE_START(cyberbal)
486	502	MDRV_MACHINE_RESET(cyberb2p)
487	503	MDRV_NVRAM_HANDLER(atarigen)
488	504

src/mame/drivers/lockon.c

r6740	r6741
14	14	#include "cpu/nec/nec.h"
15	15	#include "sound/2203intf.h"
16	16	#include "sound/flt_vol.h"
17		#include "lockon.h"
	17	#include "includes/lockon.h"
18	18
19	19	#define V30_GND_ADDR   ((lockon_ctrl_reg & 0x3) << 16)
20	20	#define V30_OBJ_ADDR   ((lockon_ctrl_reg & 0x18) << 13)

src/mame/drivers/gijoe.c

r6740	r6741
38	38
39	39	#include "driver.h"
40	40	#include "cpu/m68000/m68000.h"
41		#include "video/konamiic.h"
	41	#include "video/konicdev.h"
42	42	#include "cpu/z80/z80.h"
43		#include "machine/eeprom.h"
	43	#include "machine/eepromdev.h"
44	44	#include "sound/k054539.h"
45		#include "konamipt.h"
	45	#include "includes/konamipt.h"
46	46
47	47	VIDEO_START( gijoe );
48	48	VIDEO_UPDATE( gijoe );
49	49
	50	extern void gijoe_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask);
	51	extern void gijoe_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags);
	52
50	53	static UINT16 *gijoe_workram;
51	54	static UINT16 cur_control2;
52		static int init_eeprom_count;
53	55	static emu_timer *dmadelay_timer;
54	56
55	57	static const eeprom_interface eeprom_intf =
r6740	r6741
63	65	"0100110000000" /* unlock command */
64	66	};
65	67
66		static NVRAM_HANDLER( gijoe )
67		{
68		if (read_or_write)
69		eeprom_save(file);
70		else
71		{
72		eeprom_init(machine, &eeprom_intf);
73	68
74		if (file)
75		{
76		init_eeprom_count = 0;
77		eeprom_load(file);
78		}
79		else
80		init_eeprom_count = 2720;
81		}
82		}
83
84		static READ16_HANDLER( control1_r )
85		{
86		int res;
87
88		/* bit 8  is EEPROM data */
89		/* bit 9  is EEPROM ready */
90		/* bit 11 is service button */
91		res = input_port_read(space->machine, "START");
92
93		if (init_eeprom_count)
94		{
95		init_eeprom_count--;
96		res &= 0xf7ff;
97		}
98
99		return res;
100		}
101
102	69	static READ16_HANDLER( control2_r )
103	70	{
104	71	return cur_control2;
r6740	r6741
106	73
107	74	static WRITE16_HANDLER( control2_w )
108	75	{
109		if(ACCESSING_BITS_0_7) {
	76	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
	77	if(ACCESSING_BITS_0_7)
	78	{
110	79	/* bit 0  is data */
111	80	/* bit 1  is cs (active low) */
112	81	/* bit 2  is clock (active high) */
113	82	/* bit 3  (unknown: coin) */
114	83	/* bit 5  is enable irq 6 */
115	84	/* bit 7  (unknown: enable irq 5?) */
	85	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
116	86
117		eeprom_write_bit(data & 0x01);
118		eeprom_set_cs_line((data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
119		eeprom_set_clock_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
120	87	cur_control2 = data;
121	88
122	89	/* bit 6 = enable sprite ROM reading */
123		K053246_set_OBJCHA_line((data & 0x0040) ? ASSERT_LINE : CLEAR_LINE);
	90	k053246_set_objcha_line(k053246, (data & 0x0040) ? ASSERT_LINE : CLEAR_LINE);
124	91	}
125	92	}
126	93
127	94	static void gijoe_objdma(running_machine *machine)
128	95	{
	96	const device_config *k053246 = devtag_get_device(machine, "k053246");
129	97	UINT16 *src_head, *src_tail, *dst_head, *dst_tail;
130	98
131	99	src_head = machine->generic.spriteram.u16;
132	100	src_tail = machine->generic.spriteram.u16 + 255*8;
133		K053247_export_config(&dst_head, 0, 0, 0, 0);
	101	k053247_get_ram(k053246, &dst_head);
134	102	dst_tail = dst_head + 255*8;
135	103
136	104	for (; src_head<=src_tail; src_head+=8)
r6740	r6741
156	124
157	125	static INTERRUPT_GEN( gijoe_interrupt )
158	126	{
	127	const device_config *k053246 = devtag_get_device(device->machine, "k053246");
	128	const device_config *k056832 = devtag_get_device(device->machine, "k056832");
	129
159	130	// global interrupt masking (*this game only)
160		if (!K056832_is_IRQ_enabled(0)) return;
	131	if (!k056832_is_irq_enabled(k056832, 0))
	132	return;
161	133
162		if (K053246_is_IRQ_enabled())
	134	if (k053246_is_irq_enabled(k053246))
163	135	{
164	136	gijoe_objdma(device->machine);
165	137
r6740	r6741
174	146
175	147	static WRITE16_HANDLER( sound_cmd_w )
176	148	{
177		if(ACCESSING_BITS_0_7) {
	149	if(ACCESSING_BITS_0_7)
	150	{
178	151	data &= 0xff;
179	152	soundlatch_w(space, 0, data);
180	153	}
r6740	r6741
206	179	static ADDRESS_MAP_START( gijoe_map, ADDRESS_SPACE_PROGRAM, 16 )
207	180	AM_RANGE(0x000000, 0x0fffff) AM_ROM
208	181	AM_RANGE(0x100000, 0x100fff) AM_RAM AM_BASE_GENERIC(spriteram)                        // Sprites
209		AM_RANGE(0x110000, 0x110007) AM_WRITE(K053246_word_w)
210		AM_RANGE(0x120000, 0x121fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)      // Graphic planes
211		AM_RANGE(0x122000, 0x123fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)      // Graphic planes mirror read
212		AM_RANGE(0x130000, 0x131fff) AM_READ(K056832_rom_word_r)                         // Passthrough to tile roms
213		AM_RANGE(0x160000, 0x160007) AM_WRITE(K056832_b_word_w)                           // VSCCS (board dependent)
	182	AM_RANGE(0x110000, 0x110007) AM_DEVWRITE("k053246", k053246_word_w)
	183	AM_RANGE(0x120000, 0x121fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)      // Graphic planes
	184	AM_RANGE(0x122000, 0x123fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)      // Graphic planes mirror read
	185	AM_RANGE(0x130000, 0x131fff) AM_DEVREAD("k056832", k056832_rom_word_r)                         // Passthrough to tile roms
	186	AM_RANGE(0x160000, 0x160007) AM_DEVWRITE("k056832", k056832_b_word_w)                           // VSCCS (board dependent)
214	187	AM_RANGE(0x170000, 0x170001) AM_WRITENOP                                    // Watchdog
215	188	AM_RANGE(0x180000, 0x18ffff) AM_RAM AM_BASE(&gijoe_workram)               // Main RAM.  Spec. 180000-1803ff, 180400-187fff
216	189	AM_RANGE(0x190000, 0x190fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
217		AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(K053251_lsb_w)
218		AM_RANGE(0x1b0000, 0x1b003f) AM_WRITE(K056832_word_w)
	190	AM_RANGE(0x1a0000, 0x1a001f) AM_DEVWRITE("k053251", k053251_lsb_w)
	191	AM_RANGE(0x1b0000, 0x1b003f) AM_DEVWRITE("k056832", k056832_word_w)
219	192	AM_RANGE(0x1c000c, 0x1c000d) AM_WRITE(sound_cmd_w)
220	193	AM_RANGE(0x1c0014, 0x1c0015) AM_READ(sound_status_r)
221	194	AM_RANGE(0x1c0000, 0x1c001f) AM_RAM
r6740	r6741
223	196	AM_RANGE(0x1e0000, 0x1e0001) AM_READ_PORT("P1_P2")
224	197	AM_RANGE(0x1e0002, 0x1e0003) AM_READ_PORT("P3_P4")
225	198	AM_RANGE(0x1e4000, 0x1e4001) AM_READ_PORT("SYSTEM")
226		AM_RANGE(0x1e4002, 0x1e4003) AM_READ(control1_r)
	199	AM_RANGE(0x1e4002, 0x1e4003) AM_READ_PORT("START")
227	200	AM_RANGE(0x1e8000, 0x1e8001) AM_READWRITE(control2_r, control2_w)
228		AM_RANGE(0x1f0000, 0x1f0001) AM_READ(K053246_word_r)
	201	AM_RANGE(0x1f0000, 0x1f0001) AM_DEVREAD("k053246", k053246_word_r)
229	202	#if JOE_DEBUG
230		AM_RANGE(0x110000, 0x110007) AM_READ(K053246_reg_word_r)
231		AM_RANGE(0x160000, 0x160007) AM_READ(K056832_b_word_r)
232		AM_RANGE(0x1a0000, 0x1a001f) AM_READ(K053251_lsb_r)
233		AM_RANGE(0x1b0000, 0x1b003f) AM_READ(K056832_word_r)
	203	AM_RANGE(0x110000, 0x110007) AM_DEVREAD("k053246", k053246_reg_word_r)
	204	AM_RANGE(0x160000, 0x160007) AM_DEVREAD("k056832", k056832_b_word_r)
	205	AM_RANGE(0x1a0000, 0x1a001f) AM_DEVREAD("k053251", k053251_lsb_r)
	206	AM_RANGE(0x1b0000, 0x1b003f) AM_DEVREAD("k056832", k056832_word_r)
234	207	#endif
235	208	ADDRESS_MAP_END
236	209
r6740	r6741
248	221	PORT_BIT( 0x0002, IP_ACTIVE_LOW,  IPT_START2 )
249	222	PORT_BIT( 0x0004, IP_ACTIVE_LOW,  IPT_START3 )
250	223	PORT_BIT( 0x0008, IP_ACTIVE_LOW,  IPT_START4 )
251		PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   // EEPROM data
	224	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
252	225	PORT_BIT( 0x0200, IP_ACTIVE_LOW,  IPT_SPECIAL )   // EEPROM ready (always 1)
253	226	PORT_SERVICE_NO_TOGGLE( 0x0800, IP_ACTIVE_LOW )
254	227
	228	PORT_START( "EEPROMOUT" )
	229	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	230	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	231	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	232
255	233	PORT_START("SYSTEM")
256	234	PORT_BIT( 0x0001, IP_ACTIVE_LOW,  IPT_COIN1 )
257	235	PORT_BIT( 0x0002, IP_ACTIVE_LOW,  IPT_COIN2 )
r6740	r6741
288	266	sound_nmi
289	267	};
290	268
	269	static const k056832_interface gijoe_k056832_intf =
	270	{
	271	"gfx1", 0,
	272	K056832_BPP_4,
	273	1, 0,
	274	KONAMI_ROM_DEINTERLEAVE_2,
	275	gijoe_tile_callback, "none"
	276	};
	277
	278	static const k053247_interface gijoe_k053247_intf =
	279	{
	280	"screen",
	281	"gfx2", 1,
	282	NORMAL_PLANE_ORDER,
	283	-37, 20,
	284	KONAMI_ROM_DEINTERLEAVE_4,
	285	gijoe_sprite_callback
	286	};
	287
291	288	static MACHINE_DRIVER_START( gijoe )
292	289
293	290	/* basic machine hardware */
r6740	r6741
299	296	MDRV_CPU_PROGRAM_MAP(sound_map)
300	297
301	298	MDRV_MACHINE_START(gijoe)
302		MDRV_NVRAM_HANDLER(gijoe)
303	299
	300	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
	301
304	302	/* video hardware */
305	303	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_UPDATE_BEFORE_VBLANK)
306	304
r6740	r6741
316	314	MDRV_VIDEO_START(gijoe)
317	315	MDRV_VIDEO_UPDATE(gijoe)
318	316
	317	MDRV_K056832_ADD("k056832", gijoe_k056832_intf)
	318	MDRV_K053246_ADD("k053246", gijoe_k053247_intf)
	319	MDRV_K053251_ADD("k053251")
	320
319	321	/* sound hardware */
320	322	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
321	323
r6740	r6741
398	400	ROM_LOAD( "069a04", 0x000000, 0x200000, CRC(11d6dcd6) SHA1(04cbff9f61cd8641db538db809ddf20da29fd5ac) )
399	401	ROM_END
400	402
401		static DRIVER_INIT( gijoe )
402		{
403		konami_rom_deinterleave_2(machine, "gfx1");
404		konami_rom_deinterleave_4(machine, "gfx2");
405		}
406	403
407		GAME( 1992, gijoe,  0,     gijoe, gijoe, gijoe, ROT0, "Konami", "GI Joe (World)", 0)
408		GAME( 1992, gijoeu, gijoe, gijoe, gijoe, gijoe, ROT0, "Konami", "GI Joe (US)", 0)
409		GAME( 1992, gijoej, gijoe, gijoe, gijoe, gijoe, ROT0, "Konami", "GI Joe (Japan)", 0)
	404	GAME( 1992, gijoe,  0,     gijoe, gijoe, 0, ROT0, "Konami", "GI Joe (World)", 0)
	405	GAME( 1992, gijoeu, gijoe, gijoe, gijoe, 0, ROT0, "Konami", "GI Joe (US)", 0)
	406	GAME( 1992, gijoej, gijoe, gijoe, gijoe, 0, ROT0, "Konami", "GI Joe (Japan)", 0)

src/mame/drivers/gei.c

r6740	r6741
140	140	set_led_status(device->machine, 9,data & 0x08);
141	141
142	142	/* bit 5 - ticket out in trivia games */
143		ticket_dispenser_w(space, 0, (data & 0x20)<< 2);
	143	ticket_dispenser_w(devtag_get_device(device->machine, "ticket"), 0, (data & 0x20)<< 2);
144	144
145	145	/* bit 6 enables NMI */
146	146	interrupt_enable_w(space, 0, data & 0x40);
r6740	r6741
501	501	PORT_START("IN0")
502	502	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)
503	503	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2)
504		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, 0)      /* ticket status */
	504	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)      /* ticket status */
505	505	PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
506	506	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
507	507	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
609	609	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_IMPULSE(2) PORT_CONDITION("DSWA", 0x40, PORTCOND_EQUALS, 0x00) PORT_NAME ("Start in no coins mode")
610	610	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) PORT_CONDITION("DSWA", 0x40, PORTCOND_EQUALS, 0x40)
611	611	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSWA", 0x40, PORTCOND_EQUALS, 0x00)
612		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, 0)      /* ticket status */
	612	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)      /* ticket status */
613	613	PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
614	614	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
615	615	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
786	786	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_IMPULSE(2) PORT_CONDITION("DSWA", 0x40, PORTCOND_EQUALS, 0x00) PORT_NAME ("Start in no coins mode")
787	787	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) PORT_CONDITION("DSWA", 0x40, PORTCOND_EQUALS, 0x40)
788	788	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSWA", 0x40, PORTCOND_EQUALS, 0x00)
789		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, 0)      /* ticket status */
	789	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)      /* ticket status */
790	790	PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
791	791	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
792	792	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
892	892	PORT_MODIFY("IN0")
893	893	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)
894	894	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2)
895		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, 0)      /* ticket status */
	895	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)      /* ticket status */
896	896	PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
897	897	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
898	898	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
992	992	}
993	993	};
994	994
995		static MACHINE_RESET( getrivia )
996		{
997		ticket_dispenser_init(machine, 100, 1, 1);
998		}
999
1000		static MACHINE_RESET( gselect )
1001		{
1002		}
1003
1004	995	static MACHINE_DRIVER_START( getrivia )
1005	996	MDRV_CPU_ADD("maincpu",Z80,4000000) /* 4 MHz */
1006	997	MDRV_CPU_PROGRAM_MAP(getrivia_map)
r6740	r6741
1017	1008	MDRV_PALETTE_LENGTH(8)
1018	1009	MDRV_PALETTE_INIT(gei)
1019	1010
1020		MDRV_MACHINE_RESET(getrivia)
1021	1011	MDRV_NVRAM_HANDLER(generic_0fill)
1022	1012
1023	1013	MDRV_VIDEO_START(generic_bitmapped)
r6740	r6741
1025	1015
1026	1016	MDRV_PPI8255_ADD( "ppi8255_0", getrivia_ppi8255_intf[0] )
1027	1017	MDRV_PPI8255_ADD( "ppi8255_1", getrivia_ppi8255_intf[1] )
	1018	MDRV_TICKET_DISPENSER_ADD("ticket", 100, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
1028	1019
1029	1020	/* sound hardware */
1030	1021	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
1048	1039	/* basic machine hardware */
1049	1040	MDRV_IMPORT_FROM(getrivia)
1050	1041
	1042	MDRV_DEVICE_REMOVE("ticket")
	1043
1051	1044	MDRV_CPU_MODIFY("maincpu")
1052	1045	MDRV_CPU_PROGRAM_MAP(gselect_map)
1053	1046
1054		MDRV_MACHINE_RESET(gselect)
1055
1056	1047	MDRV_PPI8255_RECONFIG( "ppi8255_0", gselect_ppi8255_intf[0] )
1057	1048	MDRV_PPI8255_RECONFIG( "ppi8255_1", gselect_ppi8255_intf[1] )
1058	1049	MACHINE_DRIVER_END
r6740	r6741
1062	1053	/* basic machine hardware */
1063	1054	MDRV_IMPORT_FROM(getrivia)
1064	1055
	1056	MDRV_DEVICE_REMOVE("ticket")
	1057
1065	1058	MDRV_CPU_MODIFY("maincpu")
1066	1059	MDRV_CPU_PROGRAM_MAP(gselect_map)
1067	1060
1068		MDRV_MACHINE_RESET(gselect)
1069	1061	MDRV_PPI8255_RECONFIG( "ppi8255_0", gselect_ppi8255_intf[0] )
1070	1062	MACHINE_DRIVER_END
1071	1063

src/mame/drivers/segas32.c

r6740	r6741
319	319	#include "cpu/v60/v60.h"
320	320	#include "cpu/nec/nec.h"
321	321	#include "rendlay.h"
322		#include "segas32.h"
	322	#include "includes/segas32.h"
323	323	#include "machine/eeprom.h"
324	324	#include "sound/2612intf.h"
325	325	#include "sound/rf5c68.h"
r6740	r6741
376	376
377	377	/* V60 interrupt controller */
378	378	static UINT8 v60_irq_control[0x10];
379		static emu_timer *v60_irq_timer[2];
	379	static const device_config *v60_irq_timer[2];
380	380
381	381	/* sound interrupt controller */
382	382	static UINT8 sound_irq_control[4];
r6740	r6741
403	403	*************************************/
404	404
405	405	static void signal_v60_irq(running_machine *machine, int data);
406		static TIMER_CALLBACK( signal_v60_irq_callback );
407	406	static void signal_sound_irq(running_machine *machine, int which);
408	407
409	408
r6740	r6741
420	419	memset(v60_irq_control, 0xff, sizeof(v60_irq_control));
421	420
422	421	/* allocate timers */
423		v60_irq_timer[0] = timer_alloc(machine, signal_v60_irq_callback, NULL);
424		v60_irq_timer[1] = timer_alloc(machine, signal_v60_irq_callback, NULL);
	422	v60_irq_timer[0] = devtag_get_device(machine, "v60_irq0");
	423	v60_irq_timer[1] = devtag_get_device(machine, "v60_irq1");
425	424
426	425	/* clear IRQ lines */
427	426	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
r6740	r6741
467	466	}
468	467
469	468
470		static TIMER_CALLBACK( signal_v60_irq_callback )
	469	static TIMER_DEVICE_CALLBACK( signal_v60_irq_callback )
471	470	{
472		signal_v60_irq(machine, param);
	471	signal_v60_irq(timer->machine, param);
473	472	}
474	473
475	474
r6740	r6741
509	508	if (duration)
510	509	{
511	510	attotime period = attotime_make(0, attotime_to_attoseconds(ATTOTIME_IN_HZ(TIMER_0_CLOCK)) * duration);
512		timer_adjust_oneshot(v60_irq_timer[0], period, MAIN_IRQ_TIMER0);
	511	timer_device_adjust_oneshot(v60_irq_timer[0], period, MAIN_IRQ_TIMER0);
513	512	}
514	513	break;
515	514
r6740	r6741
520	519	if (duration)
521	520	{
522	521	attotime period = attotime_make(0, attotime_to_attoseconds(ATTOTIME_IN_HZ(TIMER_1_CLOCK)) * duration);
523		timer_adjust_oneshot(v60_irq_timer[1], period, MAIN_IRQ_TIMER1);
	522	timer_device_adjust_oneshot(v60_irq_timer[1], period, MAIN_IRQ_TIMER1);
524	523	}
525	524	break;
526	525
r6740	r6741
2190	2189	MDRV_MACHINE_RESET(system32)
2191	2190	MDRV_NVRAM_HANDLER(system32)
2192	2191
	2192	MDRV_TIMER_ADD("v60_irq0", signal_v60_irq_callback)
	2193	MDRV_TIMER_ADD("v60_irq1", signal_v60_irq_callback)
	2194
2193	2195	/* video hardware */
2194	2196	MDRV_GFXDECODE(segas32)
2195	2197	MDRV_PALETTE_LENGTH(0x4000)
r6740	r6741
2244	2246	MDRV_MACHINE_RESET(system32)
2245	2247	MDRV_NVRAM_HANDLER(system32)
2246	2248
	2249	MDRV_TIMER_ADD("v60_irq0", signal_v60_irq_callback)
	2250	MDRV_TIMER_ADD("v60_irq1", signal_v60_irq_callback)
	2251
2247	2252	/* video hardware */
2248	2253	MDRV_GFXDECODE(segas32)
2249	2254	MDRV_PALETTE_LENGTH(0x8000)

src/mame/drivers/slapfght.c

r6740	r6741
413	413	AM_RANGE(0x8000, 0x87ff) AM_RAM
414	414	AM_RANGE(0x8800, 0x880f) AM_RAM AM_SHARE("share1")
415	415	AM_RANGE(0x8810, 0x8fff) AM_RAMBANK("bank1") /* Shared RAM with sound CPU */
416		AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
417		AM_RANGE(0x9800, 0x9fff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE_GENERIC(colorram)
	416	AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE(&slapfight_videoram)
	417	AM_RANGE(0x9800, 0x9fff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE(&slapfight_colorram)
418	418	AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
419	419	ADDRESS_MAP_END
420	420
r6740	r6741
423	423	AM_RANGE(0xc000, 0xc7ff) AM_RAM
424	424	AM_RANGE(0xc800, 0xc80f) AM_RAM AM_SHARE("share1")
425	425	AM_RANGE(0xc810, 0xcfff) AM_RAM
426		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
427		AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE_GENERIC(colorram)
	426	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE(&slapfight_videoram)
	427	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE(&slapfight_colorram)
428	428	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
429	429	AM_RANGE(0xe800, 0xe800) AM_WRITEONLY AM_BASE(&slapfight_scrollx_lo)
430	430	AM_RANGE(0xe801, 0xe801) AM_WRITEONLY AM_BASE(&slapfight_scrollx_hi)
431	431	AM_RANGE(0xe802, 0xe802) AM_WRITEONLY AM_BASE(&slapfight_scrolly)
432		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_videoram) AM_SIZE(&slapfight_videoram_size)
433		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_colorram)
	432	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_fixvideoram)
	433	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_fixcolorram)
434	434	ADDRESS_MAP_END
435	435
436	436	static ADDRESS_MAP_START( slapfght_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
439	439	AM_RANGE(0xc000, 0xc7ff) AM_RAM
440	440	AM_RANGE(0xc800, 0xc80f) AM_RAM AM_SHARE("share1")
441	441	AM_RANGE(0xc810, 0xcfff) AM_RAM
442		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
443		AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE_GENERIC(colorram)
	442	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE(&slapfight_videoram)
	443	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE(&slapfight_colorram)
444	444	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
445	445	AM_RANGE(0xe800, 0xe800) AM_WRITEONLY AM_BASE(&slapfight_scrollx_lo)
446	446	AM_RANGE(0xe801, 0xe801) AM_WRITEONLY AM_BASE(&slapfight_scrollx_hi)
447	447	AM_RANGE(0xe802, 0xe802) AM_WRITEONLY AM_BASE(&slapfight_scrolly)
448	448	//  AM_RANGE(0xe803, 0xe803) AM_READ(mcu_r) // MCU lives here
449		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_videoram) AM_SIZE(&slapfight_videoram_size)
450		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_colorram)
	449	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_fixvideoram)
	450	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_fixcolorram)
451	451	ADDRESS_MAP_END
452	452
453	453	static ADDRESS_MAP_START( slapbtuk_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
456	456	AM_RANGE(0xc000, 0xc7ff) AM_RAM
457	457	AM_RANGE(0xc800, 0xc80f) AM_RAM AM_SHARE("share1")
458	458	AM_RANGE(0xc810, 0xcfff) AM_RAM
459		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
460		AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE_GENERIC(colorram)
	459	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE(&slapfight_videoram)
	460	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE(&slapfight_colorram)
461	461	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
462	462	AM_RANGE(0xe800, 0xe800) AM_WRITEONLY AM_BASE(&slapfight_scrollx_hi)
463	463	AM_RANGE(0xe802, 0xe802) AM_WRITEONLY AM_BASE(&slapfight_scrolly)
464	464	AM_RANGE(0xe803, 0xe803) AM_WRITEONLY AM_BASE(&slapfight_scrollx_lo)
465	465	//  AM_RANGE(0xe803, 0xe803) AM_READ(getstar_e803_r)
466	466	AM_RANGE(0xec00, 0xefff) AM_ROM // it reads a copy of the logo from here!
467		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_videoram) AM_SIZE(&slapfight_videoram_size)
468		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_colorram)
	467	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_fixvideoram)
	468	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_fixcolorram)
469	469	ADDRESS_MAP_END
470	470
471	471	static ADDRESS_MAP_START( slapfght_io_map, ADDRESS_SPACE_IO, 8 )

src/mame/drivers/badlands.c

r6740	r6741
165	165	#include "cpu/z80/z80.h"
166	166	#include "cpu/m68000/m68000.h"
167	167	#include "cpu/m6502/m6502.h"
168		#include "badlands.h"
	168	#include "includes/badlands.h"
169	169	#include "sound/2151intf.h"
170	170
171	171
r6740	r6741
196	196	}
197	197
198	198
	199	static MACHINE_START( badlands )
	200	{
	201	badlands_state *state = (badlands_state *)machine->driver_data;
	202
	203	atarigen_init(machine);
	204
	205	state_save_register_global_array(machine, state->pedal_value);
	206	}
	207
	208
199	209	static MACHINE_RESET( badlands )
200	210	{
201	211	badlands_state *state = (badlands_state *)machine->driver_data;
r6740	r6741
504	514	MDRV_CPU_ADD("audiocpu", M6502, ATARI_CLOCK_14MHz/8)
505	515	MDRV_CPU_PROGRAM_MAP(audio_map)
506	516
	517	MDRV_MACHINE_START(badlands)
507	518	MDRV_MACHINE_RESET(badlands)
508	519	MDRV_NVRAM_HANDLER(atarigen)
509	520
r6740	r6741
713	724	//  MDRV_CPU_ADD("audiocpu", Z80, 2800000/8)
714	725	//  MDRV_CPU_PROGRAM_MAP(bootleg_soundmap)
715	726
	727	MDRV_MACHINE_START(badlands)
716	728	MDRV_MACHINE_RESET(badlandb)
717	729	MDRV_NVRAM_HANDLER(atarigen)
718	730

src/mame/drivers/psikyosh.c

r6740	r6741
275	275	#include "machine/eeprom.h"
276	276	#include "sound/ymf278b.h"
277	277
278		#include "psikyosh.h"
	278	#include "includes/psikyosh.h"
279	279
280	280	#define ROMTEST 1 /* Does necessary stuff to perform rom test, uses RAM as it doesn't dispose of GFX after decoding */
281	281
r6740	r6741
288	288
289	289	static int use_factory_eeprom;
290	290
291		UINT32 *psikyosh_bgram, *psikyosh_zoomram, *psikyosh_vidregs;
292		static UINT32 *psh_ram;
293
294	291	static const gfx_layout layout_16x16x4 =
295	292	{
296	293	16,16,
r6740	r6741
433	430	// bit 0 controls game speed on readback, mechanism is a little weird
434	431	static WRITE32_HANDLER( psikyosh_irqctrl_w )
435	432	{
	433	psikyosh_state *state = (psikyosh_state *)space->machine->driver_data;
436	434	if (!(data & 0x00c00000))
437	435	{
438		cputag_set_input_line(space->machine, "maincpu", 4, CLEAR_LINE);
	436	cpu_set_input_line(state->maincpu, 4, CLEAR_LINE);
439	437	}
440	438	}
441	439
442	440	static WRITE32_HANDLER( paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w )
443	441	{
444		int r,g,b;
445		COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]); /* is this ok .. */
	442	psikyosh_state *state = (psikyosh_state *)space->machine->driver_data;
	443	int r, g, b;
	444	COMBINE_DATA(&state->paletteram[offset]); /* is this ok .. */
446	445
447		b = ((space->machine->generic.paletteram.u32[offset] & 0x0000ff00) >>8);
448		g = ((space->machine->generic.paletteram.u32[offset] & 0x00ff0000) >>16);
449		r = ((space->machine->generic.paletteram.u32[offset] & 0xff000000) >>24);
	446	b = ((state->paletteram[offset] & 0x0000ff00) >>8);
	447	g = ((state->paletteram[offset] & 0x00ff0000) >>16);
	448	r = ((state->paletteram[offset] & 0xff000000) >>24);
450	449
451		palette_set_color(space->machine,offset,MAKE_RGB(r,g,b));
	450	palette_set_color(space->machine, offset, MAKE_RGB(r, g, b));
452	451	}
453	452
454	453	static WRITE32_HANDLER( psikyosh_vidregs_w )
455	454	{
456		COMBINE_DATA(&psikyosh_vidregs[offset]);
	455	psikyosh_state *state = (psikyosh_state *)space->machine->driver_data;
	456	COMBINE_DATA(&state->vidregs[offset]);
457	457
458	458	#if ROMTEST
459		if(offset==4) /* Configure bank for gfx test */
	459	if (offset == 4) /* Configure bank for gfx test */
460	460	{
461	461	if (ACCESSING_BITS_0_15)   // Bank
462		{
463		UINT8 *ROM = memory_region(space->machine, "gfx1");
464		memory_set_bankptr(space->machine, "bank2",&ROM[0x20000 * (psikyosh_vidregs[offset]&0xfff)]); /* Bank comes from vidregs */
465		}
	462	memory_set_bank(space->machine, "bank2", state->vidregs[offset] & 0xfff);
466	463	}
467	464	#endif
468	465	}
469	466
470	467	#if ROMTEST
471		static UINT32 sample_offs = 0;
472
473	468	static READ32_HANDLER( psh_sample_r ) /* Send sample data for test */
474	469	{
	470	psikyosh_state *state = (psikyosh_state *)space->machine->driver_data;
475	471	UINT8 *ROM = memory_region(space->machine, "ymf");
476	472
477		return ROM[sample_offs++]<<16;
	473	return ROM[state->sample_offs++] << 16;
478	474	}
479	475	#endif
480	476
r6740	r6741
483	479	AM_RANGE(0x00000000, 0x000fffff) AM_ROM               // program ROM (1 meg)
484	480	AM_RANGE(0x02000000, 0x021fffff) AM_ROMBANK("bank1") // data ROM
485	481	AM_RANGE(0x03000000, 0x03003fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)   // sprites (might be a bit longer)
486		AM_RANGE(0x03004000, 0x0300ffff) AM_RAM AM_BASE(&psikyosh_bgram) // backgrounds
487		AM_RANGE(0x03040000, 0x03044fff) AM_RAM_WRITE(paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE_GENERIC(paletteram) // palette..
488		AM_RANGE(0x03050000, 0x030501ff) AM_RAM AM_BASE(&psikyosh_zoomram) // a gradient sometimes ...
	482	AM_RANGE(0x03004000, 0x0300ffff) AM_RAM AM_BASE_MEMBER(psikyosh_state, bgram) // backgrounds
	483	AM_RANGE(0x03040000, 0x03044fff) AM_RAM_WRITE(paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE_MEMBER(psikyosh_state, paletteram) // palette..
	484	AM_RANGE(0x03050000, 0x030501ff) AM_RAM AM_BASE_MEMBER(psikyosh_state, zoomram) // a gradient sometimes ...
489	485	AM_RANGE(0x0305ffdc, 0x0305ffdf) AM_READNOP AM_WRITE(psikyosh_irqctrl_w) // also writes to this address - might be vblank reads?
490		AM_RANGE(0x0305ffe0, 0x0305ffff) AM_RAM_WRITE(psikyosh_vidregs_w) AM_BASE(&psikyosh_vidregs) //  video registers
	486	AM_RANGE(0x0305ffe0, 0x0305ffff) AM_RAM_WRITE(psikyosh_vidregs_w) AM_BASE_MEMBER(psikyosh_state, vidregs) //  video registers
491	487	AM_RANGE(0x05000000, 0x05000003) AM_DEVREAD8("ymf", ymf278b_r, 0xffffffff) // read YMF status
492	488	AM_RANGE(0x05000000, 0x05000007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
493	489	AM_RANGE(0x05800000, 0x05800003) AM_READ_PORT("INPUTS")
494		AM_RANGE(0x05800004, 0x05800007) AM_READWRITE(psh_eeprom_r,psh_eeprom_w)
495		AM_RANGE(0x06000000, 0x060fffff) AM_RAM   AM_BASE(&psh_ram) // main RAM (1 meg)
	490	AM_RANGE(0x05800004, 0x05800007) AM_READWRITE(psh_eeprom_r, psh_eeprom_w)
	491	AM_RANGE(0x06000000, 0x060fffff) AM_RAM AM_BASE_MEMBER(psikyosh_state, ram) // main RAM (1 meg)
496	492
497	493	#if ROMTEST
498	494	AM_RANGE(0x05000004, 0x05000007) AM_READ(psh_sample_r) // data for rom tests (Used to verify Sample rom)
r6740	r6741
508	504	AM_RANGE(0x03100000, 0x03100003) AM_DEVREAD8("ymf", ymf278b_r, 0xffffffff)
509	505	AM_RANGE(0x03100000, 0x03100007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
510	506	AM_RANGE(0x04000000, 0x04003fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
511		AM_RANGE(0x04004000, 0x0400ffff) AM_RAM AM_BASE(&psikyosh_bgram) // backgrounds
512		AM_RANGE(0x04040000, 0x04044fff) AM_RAM_WRITE(paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE_GENERIC(paletteram)
513		AM_RANGE(0x04050000, 0x040501ff) AM_RAM AM_BASE(&psikyosh_zoomram)
	507	AM_RANGE(0x04004000, 0x0400ffff) AM_RAM AM_BASE_MEMBER(psikyosh_state, bgram) // backgrounds
	508	AM_RANGE(0x04040000, 0x04044fff) AM_RAM_WRITE(paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE_MEMBER(psikyosh_state, paletteram)
	509	AM_RANGE(0x04050000, 0x040501ff) AM_RAM AM_BASE_MEMBER(psikyosh_state, zoomram)
514	510	AM_RANGE(0x0405ffdc, 0x0405ffdf) AM_READNOP AM_WRITE(psikyosh_irqctrl_w) // also writes to this address - might be vblank reads?
515		AM_RANGE(0x0405ffe0, 0x0405ffff) AM_RAM_WRITE(psikyosh_vidregs_w) AM_BASE(&psikyosh_vidregs) // video registers
	511	AM_RANGE(0x0405ffe0, 0x0405ffff) AM_RAM_WRITE(psikyosh_vidregs_w) AM_BASE_MEMBER(psikyosh_state, vidregs) // video registers
516	512	AM_RANGE(0x05000000, 0x0507ffff) AM_ROMBANK("bank1") // data ROM
517		AM_RANGE(0x06000000, 0x060fffff) AM_RAM  AM_BASE(&psh_ram)
	513	AM_RANGE(0x06000000, 0x060fffff) AM_RAM  AM_BASE_MEMBER(psikyosh_state, ram)
518	514
519	515	#if ROMTEST
520	516	AM_RANGE(0x03100004, 0x03100007) AM_READ(psh_sample_r) // data for rom tests (Used to verify Sample rom)
r6740	r6741
523	519	ADDRESS_MAP_END
524	520
525	521
526		static void irqhandler(const device_config *device, int linestate)
527		{
528		if (linestate)
529		cputag_set_input_line(device->machine, "maincpu", 12, ASSERT_LINE);
530		else
531		cputag_set_input_line(device->machine, "maincpu", 12, CLEAR_LINE);
532		}
533
534		static const ymf278b_interface ymf278b_config =
535		{
536		irqhandler
537		};
538
539		static MACHINE_DRIVER_START( psikyo3v1 )
540		/* basic machine hardware */
541		MDRV_CPU_ADD("maincpu", SH2, MASTER_CLOCK/2)
542		MDRV_CPU_PROGRAM_MAP(ps3v1_map)
543		MDRV_CPU_VBLANK_INT("screen", psikyosh_interrupt)
544
545		MDRV_NVRAM_HANDLER(93C56)
546
547		/* video hardware */
548		MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM ) /* If using alpha */
549
550		MDRV_SCREEN_ADD("screen", RASTER)
551		MDRV_SCREEN_REFRESH_RATE(60)
552		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
553		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
554		MDRV_SCREEN_SIZE(64*8, 32*8)
555		MDRV_SCREEN_VISIBLE_AREA(0, 40*8-1, 0, 28*8-1)
556
557		MDRV_GFXDECODE(psikyosh)
558		MDRV_PALETTE_LENGTH(0x5000/4)
559
560		MDRV_VIDEO_START(psikyosh)
561		MDRV_VIDEO_EOF(psikyosh)
562		MDRV_VIDEO_UPDATE(psikyosh)
563
564		/* sound hardware */
565		MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
566
567		MDRV_SOUND_ADD("ymf", YMF278B, MASTER_CLOCK/2)
568		MDRV_SOUND_CONFIG(ymf278b_config)
569		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
570		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
571		MACHINE_DRIVER_END
572
573		static MACHINE_DRIVER_START( psikyo5 )
574		/* basic machine hardware */
575		MDRV_IMPORT_FROM(psikyo3v1)
576
577		MDRV_CPU_MODIFY("maincpu")
578		MDRV_CPU_PROGRAM_MAP(ps5_map)
579		MACHINE_DRIVER_END
580
581		static MACHINE_DRIVER_START( psikyo5_240 )
582		/* basic machine hardware */
583		MDRV_IMPORT_FROM(psikyo3v1)
584
585		MDRV_CPU_MODIFY("maincpu")
586		MDRV_CPU_PROGRAM_MAP(ps5_map)
587
588		/* It probably has a register to change visarea */
589		MDRV_SCREEN_MODIFY("screen")
590		MDRV_SCREEN_VISIBLE_AREA(0, 40*8-1, 0, 30*8-1)
591		MACHINE_DRIVER_END
592
593	522	static INPUT_PORTS_START( common )
594	523	PORT_START("INPUTS")
595	524	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
r6740	r6741
762	691	INPUT_PORTS_END
763	692
764	693
	694	static void irqhandler(const device_config *device, int linestate)
	695	{
	696	psikyosh_state *state = (psikyosh_state *)device->machine->driver_data;
	697	cpu_set_input_line(state->maincpu, 12, linestate ? ASSERT_LINE : CLEAR_LINE);
	698	}
	699
	700	static const ymf278b_interface ymf278b_config =
	701	{
	702	irqhandler
	703	};
	704
	705
	706	static MACHINE_START( psikyosh )
	707	{
	708	psikyosh_state *state = (psikyosh_state *)machine->driver_data;
	709
	710	state->maincpu = devtag_get_device(machine, "maincpu");
	711
	712	#if ROMTEST
	713	memory_configure_bank(machine, "bank2", 0, 0x1000, memory_region(machine, "gfx1"), 0x20000);
	714
	715	state->sample_offs = 0;
	716	state_save_register_global(machine, state->sample_offs);
	717	#endif
	718	}
	719
	720
	721	static MACHINE_DRIVER_START( psikyo3v1 )
	722
	723	/* driver data */
	724	MDRV_DRIVER_DATA(psikyosh_state)
	725
	726	/* basic machine hardware */
	727	MDRV_CPU_ADD("maincpu", SH2, MASTER_CLOCK/2)
	728	MDRV_CPU_PROGRAM_MAP(ps3v1_map)
	729	MDRV_CPU_VBLANK_INT("screen", psikyosh_interrupt)
	730
	731	MDRV_MACHINE_START(psikyosh)
	732
	733	MDRV_NVRAM_HANDLER(93C56)
	734
	735	/* video hardware */
	736	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM ) /* If using alpha */
	737
	738	MDRV_SCREEN_ADD("screen", RASTER)
	739	MDRV_SCREEN_REFRESH_RATE(60)
	740	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	741	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
	742	MDRV_SCREEN_SIZE(64*8, 32*8)
	743	MDRV_SCREEN_VISIBLE_AREA(0, 40*8-1, 0, 28*8-1)
	744
	745	MDRV_GFXDECODE(psikyosh)
	746	MDRV_PALETTE_LENGTH(0x5000/4)
	747
	748	MDRV_VIDEO_START(psikyosh)
	749	MDRV_VIDEO_EOF(psikyosh)
	750	MDRV_VIDEO_UPDATE(psikyosh)
	751
	752	/* sound hardware */
	753	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
	754
	755	MDRV_SOUND_ADD("ymf", YMF278B, MASTER_CLOCK/2)
	756	MDRV_SOUND_CONFIG(ymf278b_config)
	757	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
	758	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
	759	MACHINE_DRIVER_END
	760
	761	static MACHINE_DRIVER_START( psikyo5 )
	762	/* basic machine hardware */
	763	MDRV_IMPORT_FROM(psikyo3v1)
	764
	765	MDRV_CPU_MODIFY("maincpu")
	766	MDRV_CPU_PROGRAM_MAP(ps5_map)
	767	MACHINE_DRIVER_END
	768
	769	static MACHINE_DRIVER_START( psikyo5_240 )
	770	/* basic machine hardware */
	771	MDRV_IMPORT_FROM(psikyo3v1)
	772
	773	MDRV_CPU_MODIFY("maincpu")
	774	MDRV_CPU_PROGRAM_MAP(ps5_map)
	775
	776	/* It probably has a register to change visarea */
	777	MDRV_SCREEN_MODIFY("screen")
	778	MDRV_SCREEN_VISIBLE_AREA(0, 40*8-1, 0, 30*8-1)
	779	MACHINE_DRIVER_END
	780
	781
765	782	/* PS3 */
766	783
767	784	ROM_START( soldivid )
r6740	r6741
1067	1084
1068	1085	static DRIVER_INIT( soldivid )
1069	1086	{
1070		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1087	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1071	1088	use_factory_eeprom = eeprom_0;
1072	1089	}
1073	1090
1074	1091	static DRIVER_INIT( s1945ii )
1075	1092	{
1076		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1093	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1077	1094	use_factory_eeprom = eeprom_DEFAULT;
1078	1095	}
1079	1096
r6740	r6741
1081	1098	{
1082	1099	UINT8 *RAM = memory_region(machine, "maincpu");
1083	1100	memory_set_bankptr(machine, "bank1", &RAM[0x100000]);
1084		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1101	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1085	1102	use_factory_eeprom = eeprom_DARAKU;
1086	1103	}
1087	1104
1088	1105	static DRIVER_INIT( sbomberb )
1089	1106	{
1090		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1107	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1091	1108	use_factory_eeprom = eeprom_DEFAULT;
1092	1109	}
1093	1110
r6740	r6741
1095	1112	{
1096	1113	UINT8 *RAM = memory_region(machine, "maincpu");
1097	1114	memory_set_bankptr(machine, "bank1", &RAM[0x100000]);
1098		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1115	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1099	1116	use_factory_eeprom = eeprom_DEFAULT;
1100	1117	}
1101	1118
r6740	r6741
1103	1120	{
1104	1121	UINT8 *RAM = memory_region(machine, "maincpu");
1105	1122	memory_set_bankptr(machine, "bank1", &RAM[0x100000]);
1106		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1123	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1107	1124	use_factory_eeprom = eeprom_S1945III;
1108	1125	}
1109	1126
1110	1127	static DRIVER_INIT( dragnblz )
1111	1128	{
1112		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1129	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1113	1130	use_factory_eeprom = eeprom_DRAGNBLZ;
1114	1131	}
1115	1132
1116	1133	static DRIVER_INIT( gnbarich )
1117	1134	{
1118		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1135	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1119	1136	use_factory_eeprom = eeprom_GNBARICH;
1120	1137	}
1121	1138
1122	1139	static DRIVER_INIT( tgm2 )
1123	1140	{
1124		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1141	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1125	1142	use_factory_eeprom = eeprom_USER1;
1126	1143	}
1127	1144
1128	1145	static DRIVER_INIT( mjgtaste )
1129	1146	{
1130		sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1147	sh2drc_set_options(devtag_get_device(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
1131	1148	use_factory_eeprom = eeprom_MJGTASTE;
1132	1149	/* needs to install mahjong controls too (can select joystick in test mode tho) */
1133	1150	}

src/mame/drivers/boogwing.c

r6740	r6741
81	81	#include "driver.h"
82	82	#include "cpu/m68000/m68000.h"
83	83	#include "cpu/h6280/h6280.h"
84		#include "decocrpt.h"
85		#include "deco16ic.h"
86		#include "decoprot.h"
	84	#include "includes/decocrpt.h"
	85	#include "includes/deco16ic.h"
	86	#include "includes/decoprot.h"
87	87	#include "sound/2151intf.h"
88	88	#include "sound/okim6295.h"
89	89

src/mame/drivers/offtwall.c

r6740	r6741
20	20	#include "driver.h"
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "audio/atarijsa.h"
23		#include "offtwall.h"
	23	#include "includes/offtwall.h"
24	24
25	25
26	26
r6740	r6741
45	45	*
46	46	*************************************/
47	47
	48	static MACHINE_START( offtwall )
	49	{
	50	atarigen_init(machine);
	51	}
	52
	53
48	54	static MACHINE_RESET( offtwall )
49	55	{
50	56	offtwall_state *state = (offtwall_state *)machine->driver_data;
r6740	r6741
404	410	MDRV_CPU_ADD("maincpu", M68000, ATARI_CLOCK_14MHz/2)
405	411	MDRV_CPU_PROGRAM_MAP(main_map)
406	412
	413	MDRV_MACHINE_START(offtwall)
407	414	MDRV_MACHINE_RESET(offtwall)
408	415	MDRV_NVRAM_HANDLER(atarigen)
409	416

src/mame/drivers/neodrvr.c

r6740	r6741
7227	7227
7228	7228	static DRIVER_INIT ( kof98 )
7229	7229	{
	7230	DRIVER_INIT_CALL(neogeo);
7230	7231	kof98_decrypt_68k(machine);
7231		DRIVER_INIT_CALL(neogeo);
7232	7232	install_kof98_protection(machine);
7233	7233	}
7234	7234
r6740	r6741
7240	7240
7241	7241	static DRIVER_INIT( kof99 )
7242	7242	{
	7243	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7244	DRIVER_INIT_CALL(neogeo);
7243	7245	kof99_decrypt_68k(machine);
7244		neogeo_fixed_layer_bank_type = 1;
	7246	state->fixed_layer_bank_type = 1;
7245	7247	kof99_neogeo_gfx_decrypt(machine, 0x00);
7246		DRIVER_INIT_CALL(neogeo);
7247	7248	kof99_install_protection(machine);
7248	7249	}
7249	7250
7250	7251	static DRIVER_INIT( kof99n )
7251	7252	{
7252		neogeo_fixed_layer_bank_type = 1;
	7253	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7254	DRIVER_INIT_CALL(neogeo);
	7255	state->fixed_layer_bank_type = 1;
7253	7256	kof99_neogeo_gfx_decrypt(machine, 0x00);
7254		DRIVER_INIT_CALL(neogeo);
7255	7257	}
7256	7258
7257	7259	static DRIVER_INIT( garou )
7258	7260	{
	7261	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7262	DRIVER_INIT_CALL(neogeo);
7259	7263	garou_decrypt_68k(machine);
7260		neogeo_fixed_layer_bank_type = 1;
	7264	state->fixed_layer_bank_type = 1;
7261	7265	kof99_neogeo_gfx_decrypt(machine, 0x06);
7262		DRIVER_INIT_CALL(neogeo);
7263	7266	garou_install_protection(machine);
7264	7267	}
7265	7268
7266	7269	static DRIVER_INIT( garouo )
7267	7270	{
	7271	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7272	DRIVER_INIT_CALL(neogeo);
7268	7273	garouo_decrypt_68k(machine);
7269		neogeo_fixed_layer_bank_type = 1;
	7274	state->fixed_layer_bank_type = 1;
7270	7275	kof99_neogeo_gfx_decrypt(machine, 0x06);
7271		DRIVER_INIT_CALL(neogeo);
7272	7276	garouo_install_protection(machine);
7273	7277	}
7274	7278
7275	7279	static DRIVER_INIT( garoubl )
7276	7280	{
	7281	DRIVER_INIT_CALL(neogeo);
7277	7282	neogeo_bootleg_sx_decrypt(machine, 2);
7278	7283	neogeo_bootleg_cx_decrypt(machine);
7279		DRIVER_INIT_CALL(neogeo);
7280	7284	}
7281	7285
7282	7286	static DRIVER_INIT( mslug3 )
7283	7287	{
	7288	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7289	DRIVER_INIT_CALL(neogeo);
7284	7290	mslug3_decrypt_68k(machine);
7285		neogeo_fixed_layer_bank_type = 1;
	7291	state->fixed_layer_bank_type = 1;
7286	7292	kof99_neogeo_gfx_decrypt(machine, 0xad);
7287		DRIVER_INIT_CALL(neogeo);
7288	7293	mslug3_install_protection(machine);
7289	7294	}
7290	7295
7291	7296	static DRIVER_INIT( mslug3h )
7292	7297	{
7293		neogeo_fixed_layer_bank_type = 1;
	7298	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7299	DRIVER_INIT_CALL(neogeo);
	7300	state->fixed_layer_bank_type = 1;
7294	7301	kof99_neogeo_gfx_decrypt(machine, 0xad);
7295		DRIVER_INIT_CALL(neogeo);
7296	7302	}
7297	7303
7298	7304	static DRIVER_INIT( mslug3b6 )
7299	7305	{
	7306	DRIVER_INIT_CALL(neogeo);
7300	7307	neogeo_bootleg_sx_decrypt(machine, 2);
7301	7308	cmc42_neogeo_gfx_decrypt(machine, 0xad);
7302		DRIVER_INIT_CALL(neogeo);
7303	7309	}
7304	7310
7305	7311	static DRIVER_INIT( kof2000 )
7306	7312	{
	7313	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7314	DRIVER_INIT_CALL(neogeo);
7307	7315	kof2000_decrypt_68k(machine);
7308		neogeo_fixed_layer_bank_type = 2;
	7316	state->fixed_layer_bank_type = 2;
7309	7317	neogeo_cmc50_m1_decrypt(machine);
7310	7318	kof2000_neogeo_gfx_decrypt(machine, 0x00);
7311		DRIVER_INIT_CALL(neogeo);
7312	7319	kof2000_install_protection(machine);
7313	7320	}
7314	7321
7315	7322	static DRIVER_INIT( kof2000n )
7316	7323	{
7317		neogeo_fixed_layer_bank_type = 2;
	7324	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7325	DRIVER_INIT_CALL(neogeo);
	7326	state->fixed_layer_bank_type = 2;
7318	7327	neogeo_cmc50_m1_decrypt(machine);
7319	7328	kof2000_neogeo_gfx_decrypt(machine, 0x00);
7320		DRIVER_INIT_CALL(neogeo);
7321	7329	}
7322	7330
7323	7331	static DRIVER_INIT( kof2001 )
7324	7332	{
7325		neogeo_fixed_layer_bank_type = 1;
	7333	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7334	DRIVER_INIT_CALL(neogeo);
	7335	state->fixed_layer_bank_type = 1;
7326	7336	kof2000_neogeo_gfx_decrypt(machine, 0x1e);
7327	7337	neogeo_cmc50_m1_decrypt(machine);
7328		DRIVER_INIT_CALL(neogeo);
7329	7338	}
7330	7339
7331	7340	static DRIVER_INIT( cthd2003 )
7332	7341	{
	7342	DRIVER_INIT_CALL(neogeo);
7333	7343	decrypt_cthd2003(machine);
7334		DRIVER_INIT_CALL(neogeo);
7335	7344	patch_cthd2003(machine);
7336	7345	}
7337	7346
7338	7347	static DRIVER_INIT ( ct2k3sp )
7339	7348	{
	7349	DRIVER_INIT_CALL(neogeo);
7340	7350	decrypt_ct2k3sp(machine);
7341		DRIVER_INIT_CALL(neogeo);
7342	7351	patch_cthd2003(machine);
7343	7352	}
7344	7353
7345	7354	static DRIVER_INIT ( ct2k3sa )
7346	7355	{
	7356	DRIVER_INIT_CALL(neogeo);
7347	7357	decrypt_ct2k3sa(machine);
7348		DRIVER_INIT_CALL(neogeo);
7349	7358	patch_ct2k3sa(machine);
7350	7359	}
7351	7360
7352	7361	static DRIVER_INIT( mslug4 )
7353	7362	{
7354		neogeo_fixed_layer_bank_type = 1; /* USA violent content screen is wrong -- not a bug, confirmed on real hardware! */
	7363	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7364	DRIVER_INIT_CALL(neogeo);
	7365	state->fixed_layer_bank_type = 1; /* USA violent content screen is wrong -- not a bug, confirmed on real hardware! */
7355	7366	neogeo_cmc50_m1_decrypt(machine);
7356	7367	kof2000_neogeo_gfx_decrypt(machine, 0x31);
7357		DRIVER_INIT_CALL(neogeo);
7358	7368	neo_pcm2_snk_1999(machine, 8);
7359	7369	}
7360	7370
7361	7371	static DRIVER_INIT( ms4plus )
7362	7372	{
	7373	DRIVER_INIT_CALL(neogeo);
7363	7374	cmc50_neogeo_gfx_decrypt(machine, 0x31);
7364	7375	neo_pcm2_snk_1999(machine, 8);
7365	7376	neogeo_cmc50_m1_decrypt(machine);
7366		DRIVER_INIT_CALL(neogeo);
7367	7377	}
7368	7378
7369	7379	static DRIVER_INIT( ganryu )
7370	7380	{
7371		neogeo_fixed_layer_bank_type = 1;
	7381	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7382	DRIVER_INIT_CALL(neogeo);
	7383	state->fixed_layer_bank_type = 1;
7372	7384	kof99_neogeo_gfx_decrypt(machine, 0x07);
7373		DRIVER_INIT_CALL(neogeo);
7374	7385	}
7375	7386
7376	7387	static DRIVER_INIT( s1945p )
7377	7388	{
7378		neogeo_fixed_layer_bank_type = 1;
	7389	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7390	DRIVER_INIT_CALL(neogeo);
	7391	state->fixed_layer_bank_type = 1;
7379	7392	kof99_neogeo_gfx_decrypt(machine, 0x05);
7380		DRIVER_INIT_CALL(neogeo);
7381	7393	}
7382	7394
7383	7395	static DRIVER_INIT( preisle2 )
7384	7396	{
7385		neogeo_fixed_layer_bank_type = 1;
	7397	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7398	DRIVER_INIT_CALL(neogeo);
	7399	state->fixed_layer_bank_type = 1;
7386	7400	kof99_neogeo_gfx_decrypt(machine, 0x9f);
7387		DRIVER_INIT_CALL(neogeo);
7388	7401	}
7389	7402
7390	7403	static DRIVER_INIT( bangbead )
7391	7404	{
7392		neogeo_fixed_layer_bank_type = 1;
	7405	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7406	DRIVER_INIT_CALL(neogeo);
	7407	state->fixed_layer_bank_type = 1;
7393	7408	kof99_neogeo_gfx_decrypt(machine, 0xf8);
7394		DRIVER_INIT_CALL(neogeo);
7395	7409	}
7396	7410
7397	7411	static DRIVER_INIT( nitd )
7398	7412	{
7399		neogeo_fixed_layer_bank_type = 1;
	7413	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7414	DRIVER_INIT_CALL(neogeo);
	7415	state->fixed_layer_bank_type = 1;
7400	7416	kof99_neogeo_gfx_decrypt(machine, 0xff);
7401		DRIVER_INIT_CALL(neogeo);
7402	7417	}
7403	7418
7404	7419	static DRIVER_INIT( zupapa )
7405	7420	{
7406		neogeo_fixed_layer_bank_type = 1;
	7421	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7422	DRIVER_INIT_CALL(neogeo);
	7423	state->fixed_layer_bank_type = 1;
7407	7424	kof99_neogeo_gfx_decrypt(machine, 0xbd);
7408		DRIVER_INIT_CALL(neogeo);
7409	7425	}
7410	7426
7411	7427	static DRIVER_INIT( sengoku3 )
7412	7428	{
7413		neogeo_fixed_layer_bank_type = 1;
	7429	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7430	DRIVER_INIT_CALL(neogeo);
	7431	state->fixed_layer_bank_type = 1;
7414	7432	kof99_neogeo_gfx_decrypt(machine, 0xfe);
7415		DRIVER_INIT_CALL(neogeo);
7416	7433	}
7417	7434
7418	7435	static DRIVER_INIT( rotd )
7419	7436	{
	7437	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7438	DRIVER_INIT_CALL(neogeo);
7420	7439	neo_pcm2_snk_1999(machine, 16);
7421		neogeo_fixed_layer_bank_type = 1;
	7440	state->fixed_layer_bank_type = 1;
7422	7441	neogeo_cmc50_m1_decrypt(machine);
7423	7442	kof2000_neogeo_gfx_decrypt(machine, 0x3f);
7424		DRIVER_INIT_CALL(neogeo);
7425	7443	}
7426	7444
7427	7445	static DRIVER_INIT( kof2002 )
7428	7446	{
	7447	DRIVER_INIT_CALL(neogeo);
7429	7448	kof2002_decrypt_68k(machine);
7430	7449	neo_pcm2_swap(machine, 0);
7431	7450	neogeo_cmc50_m1_decrypt(machine);
7432	7451	kof2000_neogeo_gfx_decrypt(machine, 0xec);
7433		DRIVER_INIT_CALL(neogeo);
7434	7452	}
7435	7453
7436	7454	static DRIVER_INIT( kof2002b )
7437	7455	{
	7456	DRIVER_INIT_CALL(neogeo);
7438	7457	kof2002_decrypt_68k(machine);
7439	7458	neo_pcm2_swap(machine, 0);
7440	7459	neogeo_cmc50_m1_decrypt(machine);
7441	7460	kof2002b_gfx_decrypt(machine, memory_region(machine, "sprites"),0x4000000);
7442	7461	kof2002b_gfx_decrypt(machine, memory_region(machine, "fixed"),0x20000);
7443		DRIVER_INIT_CALL(neogeo);
7444	7462	}
7445	7463
7446	7464	static DRIVER_INIT( kf2k2pls )
7447	7465	{
	7466	DRIVER_INIT_CALL(neogeo);
7448	7467	kof2002_decrypt_68k(machine);
7449	7468	neo_pcm2_swap(machine, 0);
7450	7469	neogeo_cmc50_m1_decrypt(machine);
7451	7470	cmc50_neogeo_gfx_decrypt(machine, 0xec);
7452		DRIVER_INIT_CALL(neogeo);
7453	7471	}
7454	7472
7455	7473	static DRIVER_INIT( kf2k2mp )
7456	7474	{
	7475	DRIVER_INIT_CALL(neogeo);
7457	7476	kf2k2mp_decrypt(machine);
7458	7477	neo_pcm2_swap(machine, 0);
7459	7478	neogeo_cmc50_m1_decrypt(machine);
7460	7479	neogeo_bootleg_sx_decrypt(machine, 2);
7461	7480	cmc50_neogeo_gfx_decrypt(machine, 0xec);
7462		DRIVER_INIT_CALL(neogeo);
7463	7481	}
7464	7482
7465	7483	static DRIVER_INIT( kf2k2mp2 )
7466	7484	{
	7485	DRIVER_INIT_CALL(neogeo);
7467	7486	kf2k2mp2_px_decrypt(machine);
7468	7487	neo_pcm2_swap(machine, 0);
7469	7488	neogeo_cmc50_m1_decrypt(machine);
7470	7489	neogeo_bootleg_sx_decrypt(machine, 1);
7471	7490	cmc50_neogeo_gfx_decrypt(machine, 0xec);
7472		DRIVER_INIT_CALL(neogeo);
7473	7491	}
7474	7492
7475	7493	static DRIVER_INIT( kof10th )
7476	7494	{
	7495	DRIVER_INIT_CALL(neogeo);
7477	7496	decrypt_kof10th(machine);
7478		DRIVER_INIT_CALL(neogeo);
7479	7497	install_kof10th_protection(machine);
7480	7498	}
7481	7499
7482	7500	static DRIVER_INIT( kf10thep )
7483	7501	{
	7502	DRIVER_INIT_CALL(neogeo);
7484	7503	decrypt_kf10thep(machine);
7485		DRIVER_INIT_CALL(neogeo);
7486	7504	}
7487	7505
7488	7506	static DRIVER_INIT( kf2k5uni )
7489	7507	{
	7508	DRIVER_INIT_CALL(neogeo);
7490	7509	decrypt_kf2k5uni(machine);
7491		DRIVER_INIT_CALL(neogeo);
7492	7510	}
7493	7511
7494	7512	static DRIVER_INIT( kof2k4se )
7495	7513	{
	7514	DRIVER_INIT_CALL(neogeo);
7496	7515	decrypt_kof2k4se_68k(machine);
7497		DRIVER_INIT_CALL(neogeo);
7498	7516	}
7499	7517
7500	7518	static DRIVER_INIT( matrim )
7501	7519	{
	7520	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7521	DRIVER_INIT_CALL(neogeo);
7502	7522	matrim_decrypt_68k(machine);
7503	7523	neo_pcm2_swap(machine, 1);
7504		neogeo_fixed_layer_bank_type = 2;
	7524	state->fixed_layer_bank_type = 2;
7505	7525	neogeo_cmc50_m1_decrypt(machine);
7506	7526	kof2000_neogeo_gfx_decrypt(machine, 0x6a);
7507		DRIVER_INIT_CALL(neogeo);
7508	7527	}
7509	7528
7510	7529	static DRIVER_INIT( matrimbl )
7511	7530	{
	7531	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7532	DRIVER_INIT_CALL(neogeo);
7512	7533	matrim_decrypt_68k(machine);
7513		neogeo_fixed_layer_bank_type = 2;
	7534	state->fixed_layer_bank_type = 2;
7514	7535	matrimbl_decrypt(machine);
7515	7536	neogeo_sfix_decrypt(machine); /* required for text layer */
7516		DRIVER_INIT_CALL(neogeo);
7517	7537	}
7518	7538
7519	7539	static DRIVER_INIT( pnyaa )
7520	7540	{
	7541	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7542	DRIVER_INIT_CALL(neogeo);
7521	7543	neo_pcm2_snk_1999(machine, 4);
7522		neogeo_fixed_layer_bank_type = 1;
	7544	state->fixed_layer_bank_type = 1;
7523	7545	neogeo_cmc50_m1_decrypt(machine);
7524	7546	kof2000_neogeo_gfx_decrypt(machine, 0x2e);
7525		DRIVER_INIT_CALL(neogeo);
7526	7547	}
7527	7548
7528	7549	static DRIVER_INIT( mslug5 )
7529	7550	{
	7551	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7552	DRIVER_INIT_CALL(neogeo);
7530	7553	mslug5_decrypt_68k(machine);
7531	7554	neo_pcm2_swap(machine, 2);
7532		neogeo_fixed_layer_bank_type = 1;
	7555	state->fixed_layer_bank_type = 1;
7533	7556	neogeo_cmc50_m1_decrypt(machine);
7534	7557	kof2000_neogeo_gfx_decrypt(machine, 0x19);
7535		DRIVER_INIT_CALL(neogeo);
7536	7558	install_pvc_protection(machine);
7537	7559	}
7538	7560
7539	7561	static TIMER_CALLBACK( ms5pcb_bios_timer_callback )
7540	7562	{
7541	7563	int harddip3 = input_port_read(machine, "HARDDIP") & 1;
7542		memory_set_bankptr(machine, NEOGEO_BANK_BIOS, memory_region(machine, "mainbios")+0x20000+harddip3*0x20000);
	7564	memory_set_bankptr(machine, NEOGEO_BANK_BIOS, memory_region(machine, "mainbios") + 0x20000 + harddip3 * 0x20000);
7543	7565	}
7544	7566
7545	7567	static DRIVER_INIT( ms5pcb )
7546	7568	{
	7569	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7570	DRIVER_INIT_CALL(neogeo);
	7571
7547	7572	/* start a timer that will check the BIOS select DIP every second */
7548	7573	timer_set(machine, attotime_zero, NULL, 0, ms5pcb_bios_timer_callback);
7549	7574	timer_pulse(machine, ATTOTIME_IN_MSEC(1000), NULL, 0, ms5pcb_bios_timer_callback);
r6740	r6741
7552	7577	svcpcb_gfx_decrypt(machine);
7553	7578	neogeo_cmc50_m1_decrypt(machine);
7554	7579	kof2000_neogeo_gfx_decrypt(machine, 0x19);
7555		neogeo_fixed_layer_bank_type = 2;
	7580	state->fixed_layer_bank_type = 2;
7556	7581	svcpcb_s1data_decrypt(machine);
7557	7582	neo_pcm2_swap(machine, 2);
7558		DRIVER_INIT_CALL(neogeo);
7559	7583	install_pvc_protection(machine);
7560	7584	}
7561	7585
7562	7586	static DRIVER_INIT( ms5plus )
7563	7587	{
	7588	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7589	DRIVER_INIT_CALL(neogeo);
7564	7590	cmc50_neogeo_gfx_decrypt(machine, 0x19);
7565	7591	neo_pcm2_swap(machine, 2);
7566	7592	neogeo_bootleg_sx_decrypt(machine, 1);
7567		neogeo_fixed_layer_bank_type = 1;
	7593	state->fixed_layer_bank_type = 1;
7568	7594	neogeo_cmc50_m1_decrypt(machine);
7569		DRIVER_INIT_CALL(neogeo);
7570	7595	install_ms5plus_protection(machine);
7571	7596	}
7572	7597
7573	7598	static TIMER_CALLBACK( svcpcb_bios_timer_callback )
7574	7599	{
7575	7600	int harddip3 = input_port_read(machine, "HARDDIP") & 1;
7576		memory_set_bankptr(machine, NEOGEO_BANK_BIOS, memory_region(machine, "mainbios")+0x20000+harddip3*0x20000);
	7601	memory_set_bankptr(machine, NEOGEO_BANK_BIOS, memory_region(machine, "mainbios") + 0x20000 + harddip3 * 0x20000);
7577	7602	}
7578	7603
7579	7604	static DRIVER_INIT( svcpcb )
7580	7605	{
	7606	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7607	DRIVER_INIT_CALL(neogeo);
	7608
7581	7609	/* start a timer that will check the BIOS select DIP every second */
7582	7610	timer_set(machine, attotime_zero, NULL, 0, svcpcb_bios_timer_callback);
7583	7611	timer_pulse(machine, ATTOTIME_IN_MSEC(1000), NULL, 0, svcpcb_bios_timer_callback);
r6740	r6741
7588	7616	kof2000_neogeo_gfx_decrypt(machine, 0x57);
7589	7617	svcpcb_s1data_decrypt(machine);
7590	7618	neo_pcm2_swap(machine, 3);
7591		neogeo_fixed_layer_bank_type = 2;
7592		DRIVER_INIT_CALL(neogeo);
	7619	state->fixed_layer_bank_type = 2;
7593	7620	install_pvc_protection(machine);
7594	7621	}
7595	7622
7596	7623	static DRIVER_INIT( svc )
7597	7624	{
	7625	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7626	DRIVER_INIT_CALL(neogeo);
7598	7627	svc_px_decrypt(machine);
7599	7628	neo_pcm2_swap(machine, 3);
7600		neogeo_fixed_layer_bank_type = 2;
	7629	state->fixed_layer_bank_type = 2;
7601	7630	neogeo_cmc50_m1_decrypt(machine);
7602	7631	kof2000_neogeo_gfx_decrypt(machine, 0x57);
7603		DRIVER_INIT_CALL(neogeo);
7604	7632	install_pvc_protection(machine);
7605	7633	}
7606	7634
7607	7635	static DRIVER_INIT( svcboot )
7608	7636	{
	7637	DRIVER_INIT_CALL(neogeo);
7609	7638	svcboot_px_decrypt(machine);
7610	7639	svcboot_cx_decrypt(machine);
7611		DRIVER_INIT_CALL(neogeo);
7612	7640	install_pvc_protection(machine);
7613	7641	}
7614	7642
7615	7643	static DRIVER_INIT( svcplus )
7616	7644	{
	7645	DRIVER_INIT_CALL(neogeo);
7617	7646	svcplus_px_decrypt(machine);
7618	7647	svcboot_cx_decrypt(machine);
7619	7648	neogeo_bootleg_sx_decrypt(machine, 1);
7620	7649	svcplus_px_hack(machine);
7621		DRIVER_INIT_CALL(neogeo);
7622	7650	}
7623	7651
7624	7652	static DRIVER_INIT( svcplusa )
7625	7653	{
	7654	DRIVER_INIT_CALL(neogeo);
7626	7655	svcplusa_px_decrypt(machine);
7627	7656	svcboot_cx_decrypt(machine);
7628	7657	svcplus_px_hack(machine);
7629		DRIVER_INIT_CALL(neogeo);
7630	7658	}
7631	7659
7632	7660	static DRIVER_INIT( svcsplus )
7633	7661	{
	7662	DRIVER_INIT_CALL(neogeo);
7634	7663	svcsplus_px_decrypt(machine);
7635	7664	neogeo_bootleg_sx_decrypt(machine, 2);
7636	7665	svcboot_cx_decrypt(machine);
7637	7666	svcsplus_px_hack(machine);
7638		DRIVER_INIT_CALL(neogeo);
7639	7667	install_pvc_protection(machine);
7640	7668	}
7641	7669
7642	7670	static DRIVER_INIT( samsho5 )
7643	7671	{
	7672	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7673	DRIVER_INIT_CALL(neogeo);
7644	7674	samsho5_decrypt_68k(machine);
7645	7675	neo_pcm2_swap(machine, 4);
7646		neogeo_fixed_layer_bank_type = 1;
	7676	state->fixed_layer_bank_type = 1;
7647	7677	neogeo_cmc50_m1_decrypt(machine);
7648	7678	kof2000_neogeo_gfx_decrypt(machine, 0x0f);
7649		DRIVER_INIT_CALL(neogeo);
7650	7679	}
7651	7680
7652	7681	static DRIVER_INIT( samsho5b )
7653	7682	{
	7683	DRIVER_INIT_CALL(neogeo);
7654	7684	samsho5b_px_decrypt(machine);
7655	7685	samsho5b_vx_decrypt(machine);
7656	7686	neogeo_bootleg_sx_decrypt(machine, 1);
7657	7687	neogeo_bootleg_cx_decrypt(machine);
7658		DRIVER_INIT_CALL(neogeo);
7659	7688	}
7660	7689
7661	7690	static DRIVER_INIT( kf2k3pcb )
7662	7691	{
	7692	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7693	DRIVER_INIT_CALL(neogeo);
7663	7694	kf2k3pcb_decrypt_68k(machine);
7664	7695	kf2k3pcb_gfx_decrypt(machine);
7665	7696	kof2003biosdecode(machine);
r6740	r6741
7671	7702	{
7672	7703	int i;
7673	7704	UINT8* rom = memory_region(machine, "audiocpu");
7674		for (i=0;i<0x90000;i++)
	7705	for (i = 0; i < 0x90000; i++)
7675	7706	{
7676	7707	rom[i] = BITSWAP8(rom[i], 5, 6, 1, 4, 3, 0, 7, 2);
7677	7708	}
r6740	r6741
7681	7712	kof2000_neogeo_gfx_decrypt(machine, 0x9d);
7682	7713	kf2k3pcb_decrypt_s1data(machine);
7683	7714	neo_pcm2_swap(machine, 5);
7684		neogeo_fixed_layer_bank_type = 2;
7685		DRIVER_INIT_CALL(neogeo);
	7715	state->fixed_layer_bank_type = 2;
7686	7716	install_pvc_protection(machine);
7687		memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc7ffff, 0, 0, "bank6" );  // 512k bios
	7717	memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc7ffff, 0, 0, "bios" );  // 512k bios
7688	7718	}
7689	7719
7690	7720	static DRIVER_INIT( kof2003 )
7691	7721	{
	7722	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7723	DRIVER_INIT_CALL(neogeo);
7692	7724	kof2003_decrypt_68k(machine);
7693	7725	neo_pcm2_swap(machine, 5);
7694		neogeo_fixed_layer_bank_type = 2;
	7726	state->fixed_layer_bank_type = 2;
7695	7727	neogeo_cmc50_m1_decrypt(machine);
7696	7728	kof2000_neogeo_gfx_decrypt(machine, 0x9d);
7697		DRIVER_INIT_CALL(neogeo);
7698	7729	install_pvc_protection(machine);
7699	7730	}
7700	7731
7701	7732	static DRIVER_INIT( kof2003h )
7702	7733	{
	7734	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7735	DRIVER_INIT_CALL(neogeo);
7703	7736	kof2003h_decrypt_68k(machine);
7704	7737	neo_pcm2_swap(machine, 5);
7705		neogeo_fixed_layer_bank_type = 2;
	7738	state->fixed_layer_bank_type = 2;
7706	7739	neogeo_cmc50_m1_decrypt(machine);
7707	7740	kof2000_neogeo_gfx_decrypt(machine, 0x9d);
7708		DRIVER_INIT_CALL(neogeo);
7709	7741	install_pvc_protection(machine);
7710	7742	}
7711	7743
7712	7744	static DRIVER_INIT( kf2k3bl )
7713	7745	{
	7746	DRIVER_INIT_CALL(neogeo);
7714	7747	cmc50_neogeo_gfx_decrypt(machine, 0x9d);
7715	7748	neo_pcm2_swap(machine, 5);
7716	7749	neogeo_bootleg_sx_decrypt(machine, 1);
7717		DRIVER_INIT_CALL(neogeo);
7718	7750	kf2k3bl_install_protection(machine);
7719	7751	}
7720	7752
7721	7753	static DRIVER_INIT( kf2k3pl )
7722	7754	{
	7755	DRIVER_INIT_CALL(neogeo);
7723	7756	cmc50_neogeo_gfx_decrypt(machine, 0x9d);
7724	7757	neo_pcm2_swap(machine, 5);
7725	7758	kf2k3pl_px_decrypt(machine);
7726	7759	neogeo_bootleg_sx_decrypt(machine, 1);
7727		DRIVER_INIT_CALL(neogeo);
7728	7760	kf2k3pl_install_protection(machine);
7729	7761	}
7730	7762
7731	7763	static DRIVER_INIT( kf2k3upl )
7732	7764	{
	7765	DRIVER_INIT_CALL(neogeo);
7733	7766	cmc50_neogeo_gfx_decrypt(machine, 0x9d);
7734	7767	neo_pcm2_swap(machine, 5);
7735	7768	kf2k3upl_px_decrypt(machine);
7736	7769	neogeo_bootleg_sx_decrypt(machine, 2);
7737		DRIVER_INIT_CALL(neogeo);
7738	7770	kf2k3upl_install_protection(machine);
7739	7771	}
7740	7772
7741	7773	static DRIVER_INIT( samsh5sp )
7742	7774	{
	7775	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7776	DRIVER_INIT_CALL(neogeo);
7743	7777	samsh5sp_decrypt_68k(machine);
7744	7778	neo_pcm2_swap(machine, 6);
7745		neogeo_fixed_layer_bank_type = 1;
	7779	state->fixed_layer_bank_type = 1;
7746	7780	neogeo_cmc50_m1_decrypt(machine);
7747	7781	kof2000_neogeo_gfx_decrypt(machine, 0x0d);
7748		DRIVER_INIT_CALL(neogeo);
7749	7782	}
7750	7783
7751	7784	static DRIVER_INIT( jockeygp )
7752	7785	{
7753		neogeo_fixed_layer_bank_type = 1;
	7786	neogeo_state *state = (neogeo_state *)machine->driver_data;
	7787	DRIVER_INIT_CALL(neogeo);
	7788	state->fixed_layer_bank_type = 1;
7754	7789	neogeo_cmc50_m1_decrypt(machine);
7755	7790	kof2000_neogeo_gfx_decrypt(machine, 0xac);
7756	7791
r6740	r6741
7759	7794
7760	7795	//  memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x280000, 0x280001, 0, 0, "IN5");
7761	7796	//  memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2c0000, 0x2c0001, 0, 0, "IN6");
7762
7763		DRIVER_INIT_CALL(neogeo);
7764	7797	}
7765	7798
7766	7799	static DRIVER_INIT( vliner )
r6740	r6741
7796	7829	/***********************************************************************/
7797	7830
7798	7831
7799		/*    YEAR  NAME      PARENT    MACHINE   INPUT     INIT      MONITOR  */
7800		GAME( 1990, neogeo,   0,        neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Neo-Geo", GAME_IS_BIOS_ROOT )
	7832	/*    YEAR  NAME       PARENT    MACHINE   INPUT     INIT      MONITOR  */
	7833	GAME( 1990, neogeo,    0,        neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Neo-Geo", GAME_IS_BIOS_ROOT | GAME_SUPPORTS_SAVE )
7801	7834
7802	7835	/* SNK */
7803		GAME( 1990, nam1975,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "NAM-1975", 0 )
7804		GAME( 1990, bstars,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Baseball Stars Professional (set 1)", 0 )
7805		GAME( 1990, bstarsh,  bstars,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Baseball Stars Professional (set 2)", 0 )
7806		GAME( 1990, tpgolf,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Top Player's Golf", 0 )
7807		GAME( 1990, mahretsu, neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "SNK", "Mahjong Kyoretsuden", 0 )
7808		GAME( 1990, ridhero,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Riding Hero (set 1)", 0 )
7809		GAME( 1990, ridheroh, ridhero,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Riding Hero (set 2)", 0 )
7810		GAME( 1991, alpham2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Alpha Mission II / ASO II - Last Guardian", 0 )
7811		GAME( 1990, cyberlip, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Cyber-Lip", 0 )
7812		GAME( 1990, superspy, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The Super Spy", 0 )
7813		GAME( 1992, mutnat,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Mutation Nation", 0 )
7814		GAME( 1991, kotm,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "King of the Monsters (set 1)", 0 )
7815		GAME( 1991, kotmh,    kotm,     neogeo,   neogeo,   neogeo,   ROT0, "SNK", "King of the Monsters (set 2)", 0 )
7816		GAME( 1991, sengoku,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku / Sengoku Denshou (set 1)", 0 )
7817		GAME( 1991, sengokh,  sengoku,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku / Sengoku Denshou (set 2)", 0 )
7818		GAME( 1991, burningf, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Burning Fight (set 1)", 0 )
7819		GAME( 1991, burningfh,burningf, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Burning Fight (set 2)", 0 )
7820		GAME( 1990, lbowling, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "League Bowling", 0 )
7821		GAME( 1991, gpilots,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Ghost Pilots (set 1)", 0 )
7822		GAME( 1991, gpilotsh, gpilots,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Ghost Pilots (set 2)", 0 )
7823		GAME( 1990, joyjoy,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Puzzled / Joy Joy Kid", 0 )
7824		GAME( 1991, quizdais, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Quiz Daisousa Sen - The Last Count Down", 0 )
7825		GAME( 1992, lresort,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Last Resort", 0 )
7826		GAME( 1991, eightman, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK / Pallas", "Eight Man", 0 )
7827		GAME( 1991, legendos, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Legend of Success Joe / Ashitano Joe Densetsu", 0 )
7828		GAME( 1991, 2020bb,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK / Pallas", "2020 Super Baseball (set 1)", 0 )
7829		GAME( 1991, 2020bba,  2020bb,   neogeo,   neogeo,   neogeo,   ROT0, "SNK / Pallas", "2020 Super Baseball (set 2)", 0 )
7830		GAME( 1991, 2020bbh,  2020bb,   neogeo,   neogeo,   neogeo,   ROT0, "SNK / Pallas", "2020 Super Baseball (set 3)", 0 )
7831		GAME( 1991, socbrawl, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Soccer Brawl (set 1)", 0 )
7832		GAME( 1991, socbrawla, socbrawl, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Soccer Brawl (set 2)", 0 )
7833		GAME( 1991, fatfury1, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury - King of Fighters / Garou Densetsu - shukumei no tatakai", 0 )
7834		GAME( 1991, roboarmy, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Robo Army", 0 )
7835		//GAME( 1991, roboarma, roboarmy, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Robo Army (set 2)", 0 )
7836		GAME( 1992, fbfrenzy, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Football Frenzy", 0 )
7837		GAME( 1992, kotm2,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "King of the Monsters 2 - The Next Thing", 0 )
7838		GAME( 1993, sengoku2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku 2 / Sengoku Denshou 2", 0 )
7839		GAME( 1992, bstars2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Baseball Stars 2", 0 )
7840		GAME( 1992, quizdai2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Quiz Meitantei Neo & Geo - Quiz Daisousa Sen part 2", 0 )
7841		GAME( 1993, 3countb,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "3 Count Bout / Fire Suplex", 0 )
7842		GAME( 1992, aof,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting / Ryuuko no Ken", 0 )
7843		GAME( 1993, samsho,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown / Samurai Spirits (set 1)", 0 )
7844		GAME( 1993, samshoh,  samsho,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown / Samurai Spirits (set 2)", 0 )
7845		GAME( 1994, tophuntr, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Top Hunter - Roddy & Cathy (set 1)", 0 )
7846		GAME( 1994, tophuntrh,tophuntr, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Top Hunter - Roddy & Cathy (set 2)", 0 )
7847		GAME( 1992, fatfury2, neogeo,   neogeo,   neogeo,   fatfury2, ROT0, "SNK", "Fatal Fury 2 / Garou Densetsu 2 - arata-naru tatakai", 0 )
7848		GAME( 1992, ssideki,  neogeo,   neogeo,   neogeo,   fatfury2, ROT0, "SNK", "Super Sidekicks / Tokuten Ou", 0 )
7849		GAME( 1994, kof94,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '94", 0 )
7850		GAME( 1994, aof2,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 2 / Ryuuko no Ken 2 (set 1)", 0 )
7851		GAME( 1994, aof2a,    aof2,     neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 2 / Ryuuko no Ken 2 (set 2)", 0 )
7852		GAME( 1993, fatfursp, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury Special / Garou Densetsu Special (set 1)", 0 )
7853		GAME( 1993, fatfursa, fatfursp, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury Special / Garou Densetsu Special (set 2)", 0 )
7854		GAME( 1995, savagere, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Savage Reign / Fu'un Mokushiroku - kakutou sousei", 0 )
7855		GAME( 1994, ssideki2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Super Sidekicks 2 - The World Championship / Tokuten Ou 2 - real fight football", 0 )
7856		GAME( 1994, samsho2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown II / Shin Samurai Spirits - Haohmaru jigokuhen", 0 )
7857		GAME( 1994, samsho2k, samsho2,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Saulabi Spirits / Jin Saulabi Tu Hon (Korean release of Samurai Shodown II)", 0 ) // official or hack?
7858		GAME( 1995, fatfury3, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury 3 - Road to the Final Victory / Garou Densetsu 3 - haruka-naru tatakai", 0 )
7859		GAME( 1995, ssideki3, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Super Sidekicks 3 - The Next Glory / Tokuten Ou 3 - eikoue no michi", 0 )
7860		GAME( 1995, kof95,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '95 (set 1)", 0 )
7861		GAME( 1995, kof95h,   kof95,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '95 (set 2)", 0 )
7862		GAME( 1995, samsho3,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown III / Samurai Spirits - Zankurou Musouken (set 1)", 0 )
7863		GAME( 1995, samsho3h, samsho3,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown III / Samurai Spirits - Zankurou Musouken (set 2)", 0 )
7864		GAME( 1995, fswords,  samsho3,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fighters Swords (Korean release of Samurai Shodown III)", 0 )
7865		GAME( 1995, rbff1,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury / Real Bout Garou Densetsu", 0 )
7866		GAME( 1995, rbff1a,   rbff1,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury / Real Bout Garou Densetsu (bug fix revision)", 0 )
7867		GAME( 1996, aof3,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 3 - The Path of the Warrior / Art of Fighting - Ryuuko no Ken Gaiden", 0 )
7868		GAME( 1996, aof3k,    aof3,     neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 3 - The Path of the Warrior (Korean release)", 0 ) // no Japanese title / mode
7869		GAME( 1996, kof96,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '96 (set 1)", 0 )
7870		GAME( 1996, kof96h,   kof96,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '96 (set 2)", 0 )
7871		GAME( 1996, ssideki4, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Ultimate 11 - The SNK Football Championship / Tokuten Ou - Honoo no Libero, The", 0 )
7872		GAME( 1996, kizuna,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Kizuna Encounter - Super Tag Battle / Fu'un Super Tag Battle", 0 )
7873		GAME( 1996, samsho4,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown IV - Amakusa's Revenge / Samurai Spirits - Amakusa Kourin", 0 )
7874		GAME( 1996, samsho4k, samsho4,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Pae Wang Jeon Seol / Legend of a Warrior (Korean censored Samurai Shodown IV)", 0 )
7875		GAME( 1996, rbffspec, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury Special / Real Bout Garou Densetsu Special", 0 )
7876		GAME( 1997, kof97,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '97 (set 1)", 0 )
7877		GAME( 1997, kof97h,   kof97,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '97 (set 2)", 0 )
7878		GAME( 1997, kof97pls, kof97,    neogeo,   neogeo,   neogeo,   ROT0, "bootleg", "The King of Fighters '97 Plus (bootleg)", 0 )
7879		GAME( 1997, kog,      kof97,    neogeo,   kog,      kog,      ROT0, "bootleg", "King of Gladiator (The King of Fighters '97 bootleg)", GAME_NOT_WORKING) // protected bootleg
7880		GAME( 1997, lastblad, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Last Blade / Bakumatsu Roman - Gekka no Kenshi, The (set 1)", 0 )
7881		GAME( 1997, lastbladh,lastblad, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Last Blade / Bakumatsu Roman - Gekka no Kenshi, The (set 2)", 0 )
7882		GAME( 1997, lastsold, lastblad, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The Last Soldier (Korean release of The Last Blade)", 0 )
7883		GAME( 1997, irrmaze,  neogeo,   neogeo,   irrmaze,  neogeo,   ROT0, "SNK / Saurus", "The Irritating Maze / Ultra Denryu Iraira Bou", 0 )
7884		GAME( 1998, rbff2,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury 2 - The Newcomers / Real Bout Garou Densetsu 2 - the newcomers (set 1)", 0 )
7885		GAME( 1998, rbff2h,   rbff2,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury 2 - The Newcomers / Real Bout Garou Densetsu 2 - the newcomers (set 2)", 0 )
7886		GAME( 1998, rbff2k,   rbff2,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury 2 - The Newcomers (Korean release)", 0 ) // no Japanese title / mode
7887		GAME( 1998, mslug2,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Metal Slug 2 - Super Vehicle-001/II", 0 )
7888		GAME( 1998, kof98,    neogeo,   neogeo,   neogeo,   kof98,    ROT0, "SNK", "The King of Fighters '98 - The Slugfest / King of Fighters '98 - dream match never ends", 0 )
7889		GAME( 1998, kof98k,   kof98,    neogeo,   neogeo,   kof98,    ROT0, "SNK", "The King of Fighters '98 - The Slugfest / King of Fighters '98 - dream match never ends (Korean board)", 0 )
7890		GAME( 1998, kof98n,   kof98,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '98 - The Slugfest / King of Fighters '98 - dream match never ends (not encrypted)", 0 )
7891		GAME( 1998, lastbld2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Last Blade 2 / Bakumatsu Roman - Dai Ni Maku Gekka no Kenshi, The", 0 )
7892		GAME( 1998, neocup98, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Neo-Geo Cup '98 - The Road to the Victory", 0 )
7893		GAME( 1999, mslugx,   neogeo,   neogeo,   neogeo,   mslugx,   ROT0, "SNK", "Metal Slug X - Super Vehicle-001", 0 )
7894		GAME( 1999, kof99,    neogeo,   neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (set 1)" , 0 ) /* Encrypted Code & GFX */
7895		GAME( 1999, kof99a,   kof99,    neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (set 2)" , 0 ) /* Encrypted Code & GFX, crashes going into attract demo */
7896		GAME( 1999, kof99e,   kof99,    neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (earlier)" , 0 ) /* Encrypted Code & GFX */
7897		GAME( 1999, kof99n,   kof99,    neogeo,   neogeo,   kof99n,   ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (not encrypted)" , 0 )   /* Encrypted GFX */
7898		GAME( 1999, kof99p,   kof99,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (prototype)", 0 )
7899		GAME( 1999, garou,    neogeo,   neogeo,   neogeo,   garou,    ROT0, "SNK", "Garou - Mark of the Wolves (set 1)" , 0 ) /* Encrypted Code & GFX */
7900		GAME( 1999, garouo,   garou,    neogeo,   neogeo,   garouo,   ROT0, "SNK", "Garou - Mark of the Wolves (set 2)" , 0 ) /* Encrypted Code & GFX */
7901		GAME( 1999, garoup,   garou,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Garou - Mark of the Wolves (prototype)", 0 )
7902		GAME( 1999, garoubl,  garou,    neogeo,   neogeo,   garoubl,  ROT0, "bootleg", "Garou - Mark of the Wolves (bootleg)", 0 ) /* Bootleg of garoup */
7903		GAME( 2000, mslug3,   neogeo,   neogeo,   neogeo,   mslug3,   ROT0, "SNK", "Metal Slug 3" , 0 ) /* Encrypted Code & GFX */
7904		GAME( 2000, mslug3h,  mslug3,   neogeo,   neogeo,   mslug3h,  ROT0, "SNK", "Metal Slug 3 (not encrypted)" , 0 ) /* Encrypted GFX */
7905		GAME( 2000, mslug3b6, mslug3,   neogeo,   neogeo,   mslug3b6, ROT0, "bootleg", "Metal Slug 6 (Metal Slug 3 bootleg)", 0 ) /* real Metal Slug 6 is an Atomiswave HW game, see atomswav.c ;-) */
7906		GAME( 2000, kof2000,  neogeo,   neogeo,   neogeo,   kof2000,  ROT0, "SNK", "The King of Fighters 2000" , 0 ) /* Encrypted Code & GFX */
7907		GAME( 2000, kof2000n, kof2000,  neogeo,   neogeo,   kof2000n, ROT0, "SNK", "The King of Fighters 2000 (not encrypted)" , 0 ) /* Encrypted GFX */
7908		GAME( 2001, zupapa,   neogeo,   neogeo,   neogeo,   zupapa,   ROT0, "SNK", "Zupapa!" , 0 )   /* Encrypted GFX */
7909		GAME( 2001, sengoku3, neogeo,   neogeo,   neogeo,   sengoku3, ROT0, "Noise Factory / SNK", "Sengoku 3 / Sengoku Densho 2001" , 0 )   /* Encrypted GFX */
7910		GAME( 2001, kof2001,  neogeo,   neogeo,   neogeo,   kof2001,  ROT0, "Eolith / SNK", "The King of Fighters 2001 (set 1)" , 0 ) /* Encrypted GFX */
7911		GAME( 2001, kof2001h, kof2001,  neogeo,   neogeo,   kof2001,  ROT0, "Eolith / SNK", "The King of Fighters 2001 (set 2)" , 0 ) /* Encrypted GFX */
7912		GAME( 2003, cthd2003, kof2001,  neogeo,   neogeo,   cthd2003, ROT0, "bootleg", "Crouching Tiger Hidden Dragon 2003 (The King of Fighters 2001 bootleg)", 0 ) /* Protected Hack / Bootleg of kof2001 */
7913		GAME( 2003, ct2k3sp,  kof2001,  neogeo,   neogeo,   ct2k3sp,  ROT0, "bootleg", "Crouching Tiger Hidden Dragon 2003 Super Plus (The King of Fighters 2001 bootleg)", 0 ) /* Protected Hack / Bootleg of kof2001 */
7914		GAME( 2003, ct2k3sa,  kof2001,  neogeo,   neogeo,   ct2k3sa,  ROT0, "bootleg", "Crouching Tiger Hidden Dragon 2003 Super Plus alternate (The King of Fighters 2001 bootleg)", 0 ) /* Hack / Bootleg of kof2001 */
7915		GAME( 2002, kof2002,  neogeo,   neogeo,   neogeo,   kof2002,  ROT0, "Eolith / Playmore", "The King of Fighters 2002" , 0 ) /* Encrypted GFX */
7916		GAME( 2002, kof2002b, kof2002,  neogeo,   neogeo,   kof2002b, ROT0, "bootleg", "The King of Fighters 2002 (bootleg)", 0 )
7917		GAME( 2002, kf2k2pls, kof2002,  neogeo,   neogeo,   kf2k2pls, ROT0, "bootleg", "The King of Fighters 2002 Plus (bootleg set 1)" , 0 ) /* Encrypted GFX */
7918		GAME( 2002, kf2k2pla, kof2002,  neogeo,   neogeo,   kf2k2pls, ROT0, "bootleg", "The King of Fighters 2002 Plus (bootleg set 2)" , 0 ) /* Encrypted GFX */
7919		GAME( 2002, kf2k2mp,  kof2002,  neogeo,   neogeo,   kf2k2mp,  ROT0, "bootleg", "The King of Fighters 2002 Magic Plus (bootleg)" , 0 ) /* Encrypted GFX */
7920		GAME( 2002, kf2k2mp2, kof2002,  neogeo,   neogeo,   kf2k2mp2, ROT0, "bootleg", "The King of Fighters 2002 Magic Plus II (bootleg)" , 0 ) /* Encrypted GFX */
7921		GAME( 2002, kof10th,  kof2002,  neogeo,   neogeo,   kof10th,  ROT0, "bootleg", "The King of Fighters 10th Anniversary (The King of Fighters 2002 bootleg)", 0 ) // fake SNK copyright
7922		GAME( 2005, kf10thep, kof2002,  neogeo,   neogeo,   kf10thep, ROT0, "bootleg", "The King of Fighters 10th Anniversary Extra Plus (The King of Fighters 2002 bootleg)", 0 ) // fake SNK copyright
7923		GAME( 2004, kf2k5uni, kof2002,  neogeo,   neogeo,   kf2k5uni, ROT0, "bootleg", "The King of Fighters 10th Anniversary 2005 Unique (The King of Fighters 2002 bootleg)", 0 ) // fake SNK copyright
7924		GAME( 2004, kof2k4se, kof2002,  neogeo,   neogeo,   kof2k4se, ROT0, "bootleg", "The King of Fighters Special Edition 2004 (The King of Fighters 2002 bootleg)", 0 ) /* Hack / Bootleg of kof2002 */
7925		GAME( 2003, mslug5,   neogeo,   neogeo,   neogeo,   mslug5,   ROT0, "SNK Playmore", "Metal Slug 5", 0 )
7926		GAME( 2003, mslug5h,  mslug5,   neogeo,   neogeo,   mslug5,   ROT0, "SNK Playmore", "Metal Slug 5 (AES Cart)", 0 ) /* Also found in later MVS carts */
7927		GAME( 2003, ms5pcb,   0,        neogeo,   ms5pcb,   ms5pcb,   ROT0, "SNK Playmore", "Metal Slug 5 (JAMMA PCB)", 0 )
7928		GAME( 2003, ms5plus,  mslug5,   neogeo,   neogeo,   ms5plus,  ROT0, "bootleg", "Metal Slug 5 Plus (bootleg)",0 )
7929		GAME( 2003, svcpcb,   0,        neogeo,   svcpcb,   svcpcb,   ROT0, "SNK Playmore", "SNK vs. CAPCOM SVC CHAOS (JAMMA PCB, set 1)", 0 ) // not a clone of neogeo because it's NOT a neogeo cart.
7930		GAME( 2003, svcpcba,  svcpcb,   neogeo,   svcpcb,   svcpcb,   ROT0, "SNK Playmore", "SNK vs. CAPCOM SVC CHAOS (JAMMA PCB, set 2)" , 0 ) /* Encrypted Code */
7931		GAME( 2003, svc,      neogeo,   neogeo,   neogeo,   svc,      ROT0, "SNK Playmore", "SNK vs. CAPCOM SVC CHAOS", 0 )
7932		GAME( 2003, svcboot,  svc,      neogeo,   neogeo,   svcboot,  ROT0, "bootleg", "SNK vs. CAPCOM SVC CHAOS (bootleg)", 0 )
7933		GAME( 2003, svcplus,  svc,      neogeo,   neogeo,   svcplus,  ROT0, "bootleg", "SNK vs. CAPCOM SVC CHAOS Plus (bootleg set 1)", 0 )
7934		GAME( 2003, svcplusa, svc,      neogeo,   neogeo,   svcplusa, ROT0, "bootleg", "SNK vs. CAPCOM SVC CHAOS Plus (bootleg set 2)", 0 )
7935		GAME( 2003, svcsplus, svc,      neogeo,   neogeo,   svcsplus, ROT0, "bootleg", "SNK vs. CAPCOM SVC CHAOS Super Plus (bootleg)", 0 )
7936		GAME( 2003, samsho5,  neogeo,   neogeo,   neogeo,   samsho5,  ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V / Samurai Spirits Zero (set 1)", 0 )
7937		GAME( 2003, samsho5h, samsho5,  neogeo,   neogeo,   samsho5,  ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V / Samurai Spirits Zero (set 2)", 0 )
7938		GAME( 2003, samsho5b, samsho5,  neogeo,   neogeo,   samsho5b, ROT0, "bootleg", "Samurai Shodown V / Samurai Spirits Zero (bootleg)", 0 ) // different program scrambling
7939		GAME( 2003, kf2k3pcb, 0,        neogeo,   neogeo,   kf2k3pcb, ROT0, "SNK Playmore", "The King of Fighters 2003 (Japan, JAMMA PCB)", 0 ) // not a clone of neogeo because it's NOT a neogeo cart.
7940		GAME( 2003, kof2003,  neogeo,   neogeo,   neogeo,   kof2003,  ROT0, "SNK Playmore", "The King of Fighters 2003 (set 1)", 0 )
7941		GAME( 2003, kof2003h, kof2003,  neogeo,   neogeo,   kof2003h, ROT0, "SNK Playmore", "The King of Fighters 2003 (set 2)", 0 )
7942		GAME( 2003, kf2k3bl,  kof2003,  neogeo,   neogeo,   kf2k3bl , ROT0, "bootleg", "The King of Fighters 2003 (bootleg set 1)", 0 ) // zooming is wrong because its a bootleg of the pcb version on a cart (unless it was a bootleg pcb with the new bios?)
7943		GAME( 2003, kf2k3bla, kof2003,  neogeo,   neogeo,   kf2k3pl,  ROT0, "bootleg", "The King of Fighters 2003 (bootleg set 2)", 0 ) // zooming is wrong because its a bootleg of the pcb version on a cart
7944		GAME( 2003, kf2k3pl,  kof2003,  neogeo,   neogeo,   kf2k3pl,  ROT0, "bootleg", "The King of Fighters 2004 Plus / Hero (The King of Fighters 2003 bootleg)", 0 ) // zooming is wrong because its a bootleg of the pcb version on a cart
7945		GAME( 2003, kf2k3upl, kof2003,  neogeo,   neogeo,   kf2k3upl, ROT0, "bootleg", "The King of Fighters 2004 Ultra Plus (The King of Fighters 2003 bootleg)", 0 ) // zooming is wrong because its a bootleg of the pcb version on a cart
7946		GAME( 2003, samsh5sp, neogeo,   neogeo,   neogeo,   samsh5sp, ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V Special / Samurai Spirits Zero Special (set 1, uncensored)", 0 )
7947		GAME( 2003, samsh5sph,samsh5sp, neogeo,   neogeo,   samsh5sp, ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V Special / Samurai Spirits Zero Special (set 2, censored)", 0 )
7948		GAME( 2003, samsh5spn,samsh5sp, neogeo,   neogeo,   samsh5sp, ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V Special / Samurai Spirits Zero Special (set 3, less censored)", 0 )
	7836	GAME( 1990, nam1975,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "NAM-1975", GAME_SUPPORTS_SAVE )
	7837	GAME( 1990, bstars,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Baseball Stars Professional (set 1)", GAME_SUPPORTS_SAVE )
	7838	GAME( 1990, bstarsh,   bstars,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Baseball Stars Professional (set 2)", GAME_SUPPORTS_SAVE )
	7839	GAME( 1990, tpgolf,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Top Player's Golf", GAME_SUPPORTS_SAVE )
	7840	GAME( 1990, mahretsu,  neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "SNK", "Mahjong Kyoretsuden", GAME_SUPPORTS_SAVE )
	7841	GAME( 1990, ridhero,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Riding Hero (set 1)", GAME_SUPPORTS_SAVE )
	7842	GAME( 1990, ridheroh,  ridhero,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Riding Hero (set 2)", GAME_SUPPORTS_SAVE )
	7843	GAME( 1991, alpham2,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Alpha Mission II / ASO II - Last Guardian", GAME_SUPPORTS_SAVE )
	7844	GAME( 1990, cyberlip,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Cyber-Lip", GAME_SUPPORTS_SAVE )
	7845	GAME( 1990, superspy,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The Super Spy", GAME_SUPPORTS_SAVE )
	7846	GAME( 1992, mutnat,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Mutation Nation", GAME_SUPPORTS_SAVE )
	7847	GAME( 1991, kotm,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "King of the Monsters (set 1)", GAME_SUPPORTS_SAVE )
	7848	GAME( 1991, kotmh,     kotm,     neogeo,   neogeo,   neogeo,   ROT0, "SNK", "King of the Monsters (set 2)", GAME_SUPPORTS_SAVE )
	7849	GAME( 1991, sengoku,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku / Sengoku Denshou (set 1)", GAME_SUPPORTS_SAVE )
	7850	GAME( 1991, sengokh,   sengoku,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku / Sengoku Denshou (set 2)", GAME_SUPPORTS_SAVE )
	7851	GAME( 1991, burningf,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Burning Fight (set 1)", GAME_SUPPORTS_SAVE )
	7852	GAME( 1991, burningfh, burningf, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Burning Fight (set 2)", GAME_SUPPORTS_SAVE )
	7853	GAME( 1990, lbowling,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "League Bowling", GAME_SUPPORTS_SAVE )
	7854	GAME( 1991, gpilots,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Ghost Pilots (set 1)", GAME_SUPPORTS_SAVE )
	7855	GAME( 1991, gpilotsh,  gpilots,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Ghost Pilots (set 2)", GAME_SUPPORTS_SAVE )
	7856	GAME( 1990, joyjoy,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Puzzled / Joy Joy Kid", GAME_SUPPORTS_SAVE )
	7857	GAME( 1991, quizdais,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Quiz Daisousa Sen - The Last Count Down", GAME_SUPPORTS_SAVE )
	7858	GAME( 1992, lresort,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Last Resort", GAME_SUPPORTS_SAVE )
	7859	GAME( 1991, eightman,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK / Pallas", "Eight Man", GAME_SUPPORTS_SAVE )
	7860	GAME( 1991, legendos,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Legend of Success Joe / Ashitano Joe Densetsu", GAME_SUPPORTS_SAVE )
	7861	GAME( 1991, 2020bb,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK / Pallas", "2020 Super Baseball (set 1)", GAME_SUPPORTS_SAVE )
	7862	GAME( 1991, 2020bba,   2020bb,   neogeo,   neogeo,   neogeo,   ROT0, "SNK / Pallas", "2020 Super Baseball (set 2)", GAME_SUPPORTS_SAVE )
	7863	GAME( 1991, 2020bbh,   2020bb,   neogeo,   neogeo,   neogeo,   ROT0, "SNK / Pallas", "2020 Super Baseball (set 3)", GAME_SUPPORTS_SAVE )
	7864	GAME( 1991, socbrawl,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Soccer Brawl (set 1)", GAME_SUPPORTS_SAVE )
	7865	GAME( 1991, socbrawla, socbrawl, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Soccer Brawl (set 2)", GAME_SUPPORTS_SAVE )
	7866	GAME( 1991, fatfury1,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury - King of Fighters / Garou Densetsu - shukumei no tatakai", GAME_SUPPORTS_SAVE )
	7867	GAME( 1991, roboarmy,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Robo Army", GAME_SUPPORTS_SAVE )
	7868	//GAME( 1991, roboarma,  roboarmy, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Robo Army (set 2)", GAME_SUPPORTS_SAVE )
	7869	GAME( 1992, fbfrenzy,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Football Frenzy", GAME_SUPPORTS_SAVE )
	7870	GAME( 1992, kotm2,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "King of the Monsters 2 - The Next Thing", GAME_SUPPORTS_SAVE )
	7871	GAME( 1993, sengoku2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Sengoku 2 / Sengoku Denshou 2", GAME_SUPPORTS_SAVE )
	7872	GAME( 1992, bstars2,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Baseball Stars 2", GAME_SUPPORTS_SAVE )
	7873	GAME( 1992, quizdai2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Quiz Meitantei Neo & Geo - Quiz Daisousa Sen part 2", GAME_SUPPORTS_SAVE )
	7874	GAME( 1993, 3countb,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "3 Count Bout / Fire Suplex", GAME_SUPPORTS_SAVE )
	7875	GAME( 1992, aof,       neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting / Ryuuko no Ken", GAME_SUPPORTS_SAVE )
	7876	GAME( 1993, samsho,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown / Samurai Spirits (set 1)", GAME_SUPPORTS_SAVE )
	7877	GAME( 1993, samshoh,   samsho,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown / Samurai Spirits (set 2)", GAME_SUPPORTS_SAVE )
	7878	GAME( 1994, tophuntr,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Top Hunter - Roddy & Cathy (set 1)", GAME_SUPPORTS_SAVE )
	7879	GAME( 1994, tophuntrh, tophuntr, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Top Hunter - Roddy & Cathy (set 2)", GAME_SUPPORTS_SAVE )
	7880	GAME( 1992, fatfury2,  neogeo,   neogeo,   neogeo,   fatfury2, ROT0, "SNK", "Fatal Fury 2 / Garou Densetsu 2 - arata-naru tatakai", GAME_SUPPORTS_SAVE )
	7881	GAME( 1992, ssideki,   neogeo,   neogeo,   neogeo,   fatfury2, ROT0, "SNK", "Super Sidekicks / Tokuten Ou", GAME_SUPPORTS_SAVE )
	7882	GAME( 1994, kof94,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '94", GAME_SUPPORTS_SAVE )
	7883	GAME( 1994, aof2,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 2 / Ryuuko no Ken 2 (set 1)", GAME_SUPPORTS_SAVE )
	7884	GAME( 1994, aof2a,     aof2,     neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 2 / Ryuuko no Ken 2 (set 2)", GAME_SUPPORTS_SAVE )
	7885	GAME( 1993, fatfursp,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury Special / Garou Densetsu Special (set 1)", GAME_SUPPORTS_SAVE )
	7886	GAME( 1993, fatfursa,  fatfursp, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury Special / Garou Densetsu Special (set 2)", GAME_SUPPORTS_SAVE )
	7887	GAME( 1995, savagere,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Savage Reign / Fu'un Mokushiroku - kakutou sousei", GAME_SUPPORTS_SAVE )
	7888	GAME( 1994, ssideki2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Super Sidekicks 2 - The World Championship / Tokuten Ou 2 - real fight football", GAME_SUPPORTS_SAVE )
	7889	GAME( 1994, samsho2,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown II / Shin Samurai Spirits - Haohmaru jigokuhen", GAME_SUPPORTS_SAVE )
	7890	GAME( 1994, samsho2k,  samsho2,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Saulabi Spirits / Jin Saulabi Tu Hon (Korean release of Samurai Shodown II)", GAME_SUPPORTS_SAVE ) // official or hack?
	7891	GAME( 1995, fatfury3,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fatal Fury 3 - Road to the Final Victory / Garou Densetsu 3 - haruka-naru tatakai", GAME_SUPPORTS_SAVE )
	7892	GAME( 1995, ssideki3,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Super Sidekicks 3 - The Next Glory / Tokuten Ou 3 - eikoue no michi", GAME_SUPPORTS_SAVE )
	7893	GAME( 1995, kof95,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '95 (set 1)", GAME_SUPPORTS_SAVE )
	7894	GAME( 1995, kof95h,    kof95,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '95 (set 2)", GAME_SUPPORTS_SAVE )
	7895	GAME( 1995, samsho3,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown III / Samurai Spirits - Zankurou Musouken (set 1)", GAME_SUPPORTS_SAVE )
	7896	GAME( 1995, samsho3h,  samsho3,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown III / Samurai Spirits - Zankurou Musouken (set 2)", GAME_SUPPORTS_SAVE )
	7897	GAME( 1995, fswords,   samsho3,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Fighters Swords (Korean release of Samurai Shodown III)", GAME_SUPPORTS_SAVE )
	7898	GAME( 1995, rbff1,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury / Real Bout Garou Densetsu", GAME_SUPPORTS_SAVE )
	7899	GAME( 1995, rbff1a,    rbff1,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury / Real Bout Garou Densetsu (bug fix revision)", GAME_SUPPORTS_SAVE )
	7900	GAME( 1996, aof3,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 3 - The Path of the Warrior / Art of Fighting - Ryuuko no Ken Gaiden", GAME_SUPPORTS_SAVE )
	7901	GAME( 1996, aof3k,     aof3,     neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Art of Fighting 3 - The Path of the Warrior (Korean release)", GAME_SUPPORTS_SAVE ) // no Japanese title / mode
	7902	GAME( 1996, kof96,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '96 (set 1)", GAME_SUPPORTS_SAVE )
	7903	GAME( 1996, kof96h,    kof96,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '96 (set 2)", GAME_SUPPORTS_SAVE )
	7904	GAME( 1996, ssideki4,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Ultimate 11 - The SNK Football Championship / Tokuten Ou - Honoo no Libero, The", GAME_SUPPORTS_SAVE )
	7905	GAME( 1996, kizuna,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Kizuna Encounter - Super Tag Battle / Fu'un Super Tag Battle", GAME_SUPPORTS_SAVE )
	7906	GAME( 1996, samsho4,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Samurai Shodown IV - Amakusa's Revenge / Samurai Spirits - Amakusa Kourin", GAME_SUPPORTS_SAVE )
	7907	GAME( 1996, samsho4k,  samsho4,  neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Pae Wang Jeon Seol / Legend of a Warrior (Korean censored Samurai Shodown IV)", GAME_SUPPORTS_SAVE )
	7908	GAME( 1996, rbffspec,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury Special / Real Bout Garou Densetsu Special", GAME_SUPPORTS_SAVE )
	7909	GAME( 1997, kof97,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '97 (set 1)", GAME_SUPPORTS_SAVE )
	7910	GAME( 1997, kof97h,    kof97,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '97 (set 2)", GAME_SUPPORTS_SAVE )
	7911	GAME( 1997, kof97pls,  kof97,    neogeo,   neogeo,   neogeo,   ROT0, "bootleg", "The King of Fighters '97 Plus (bootleg)", GAME_SUPPORTS_SAVE )
	7912	GAME( 1997, kog,       kof97,    neogeo,   kog,      kog,      ROT0, "bootleg", "King of Gladiator (The King of Fighters '97 bootleg)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // protected bootleg
	7913	GAME( 1997, lastblad,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Last Blade / Bakumatsu Roman - Gekka no Kenshi, The (set 1)", GAME_SUPPORTS_SAVE )
	7914	GAME( 1997, lastbladh, lastblad, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Last Blade / Bakumatsu Roman - Gekka no Kenshi, The (set 2)", GAME_SUPPORTS_SAVE )
	7915	GAME( 1997, lastsold,  lastblad, neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The Last Soldier (Korean release of The Last Blade)", GAME_SUPPORTS_SAVE )
	7916	GAME( 1997, irrmaze,   neogeo,   neogeo,   irrmaze,  neogeo,   ROT0, "SNK / Saurus", "The Irritating Maze / Ultra Denryu Iraira Bou", GAME_SUPPORTS_SAVE )
	7917	GAME( 1998, rbff2,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury 2 - The Newcomers / Real Bout Garou Densetsu 2 - the newcomers (set 1)", GAME_SUPPORTS_SAVE )
	7918	GAME( 1998, rbff2h,    rbff2,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury 2 - The Newcomers / Real Bout Garou Densetsu 2 - the newcomers (set 2)", GAME_SUPPORTS_SAVE )
	7919	GAME( 1998, rbff2k,    rbff2,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Real Bout Fatal Fury 2 - The Newcomers (Korean release)", GAME_SUPPORTS_SAVE ) // no Japanese title / mode
	7920	GAME( 1998, mslug2,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Metal Slug 2 - Super Vehicle-001/II", GAME_SUPPORTS_SAVE )
	7921	GAME( 1998, kof98,     neogeo,   neogeo,   neogeo,   kof98,    ROT0, "SNK", "The King of Fighters '98 - The Slugfest / King of Fighters '98 - dream match never ends", GAME_SUPPORTS_SAVE )
	7922	GAME( 1998, kof98k,    kof98,    neogeo,   neogeo,   kof98,    ROT0, "SNK", "The King of Fighters '98 - The Slugfest / King of Fighters '98 - dream match never ends (Korean board)", GAME_SUPPORTS_SAVE )
	7923	GAME( 1998, kof98n,    kof98,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '98 - The Slugfest / King of Fighters '98 - dream match never ends (not encrypted)", GAME_SUPPORTS_SAVE )
	7924	GAME( 1998, lastbld2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Last Blade 2 / Bakumatsu Roman - Dai Ni Maku Gekka no Kenshi, The", GAME_SUPPORTS_SAVE )
	7925	GAME( 1998, neocup98,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Neo-Geo Cup '98 - The Road to the Victory", GAME_SUPPORTS_SAVE )
	7926	GAME( 1999, mslugx,    neogeo,   neogeo,   neogeo,   mslugx,   ROT0, "SNK", "Metal Slug X - Super Vehicle-001", GAME_SUPPORTS_SAVE )
	7927	GAME( 1999, kof99,     neogeo,   neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (set 1)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX */
	7928	GAME( 1999, kof99a,    kof99,    neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (set 2)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX, crashes going into attract demo */
	7929	GAME( 1999, kof99e,    kof99,    neogeo,   neogeo,   kof99,    ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (earlier)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX */
	7930	GAME( 1999, kof99n,    kof99,    neogeo,   neogeo,   kof99n,   ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (not encrypted)" , GAME_SUPPORTS_SAVE )   /* Encrypted GFX */
	7931	GAME( 1999, kof99p,    kof99,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "The King of Fighters '99 - Millennium Battle (prototype)", GAME_SUPPORTS_SAVE )
	7932	GAME( 1999, garou,     neogeo,   neogeo,   neogeo,   garou,    ROT0, "SNK", "Garou - Mark of the Wolves (set 1)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX */
	7933	GAME( 1999, garouo,    garou,    neogeo,   neogeo,   garouo,   ROT0, "SNK", "Garou - Mark of the Wolves (set 2)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX */
	7934	GAME( 1999, garoup,    garou,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Garou - Mark of the Wolves (prototype)", GAME_SUPPORTS_SAVE )
	7935	GAME( 1999, garoubl,   garou,    neogeo,   neogeo,   garoubl,  ROT0, "bootleg", "Garou - Mark of the Wolves (bootleg)", GAME_SUPPORTS_SAVE ) /* Bootleg of garoup */
	7936	GAME( 2000, mslug3,    neogeo,   neogeo,   neogeo,   mslug3,   ROT0, "SNK", "Metal Slug 3" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX */
	7937	GAME( 2000, mslug3h,   mslug3,   neogeo,   neogeo,   mslug3h,  ROT0, "SNK", "Metal Slug 3 (not encrypted)" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7938	GAME( 2000, mslug3b6,  mslug3,   neogeo,   neogeo,   mslug3b6, ROT0, "bootleg", "Metal Slug 6 (Metal Slug 3 bootleg)", GAME_SUPPORTS_SAVE ) /* real Metal Slug 6 is an Atomiswave HW game, see atomswav.c ;-) */
	7939	GAME( 2000, kof2000,   neogeo,   neogeo,   neogeo,   kof2000,  ROT0, "SNK", "The King of Fighters 2000" , GAME_SUPPORTS_SAVE ) /* Encrypted Code & GFX */
	7940	GAME( 2000, kof2000n,  kof2000,  neogeo,   neogeo,   kof2000n, ROT0, "SNK", "The King of Fighters 2000 (not encrypted)" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7941	GAME( 2001, zupapa,    neogeo,   neogeo,   neogeo,   zupapa,   ROT0, "SNK", "Zupapa!" , GAME_SUPPORTS_SAVE )   /* Encrypted GFX */
	7942	GAME( 2001, sengoku3,  neogeo,   neogeo,   neogeo,   sengoku3, ROT0, "Noise Factory / SNK", "Sengoku 3 / Sengoku Densho 2001" , GAME_SUPPORTS_SAVE )   /* Encrypted GFX */
	7943	GAME( 2001, kof2001,   neogeo,   neogeo,   neogeo,   kof2001,  ROT0, "Eolith / SNK", "The King of Fighters 2001 (set 1)" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7944	GAME( 2001, kof2001h,  kof2001,  neogeo,   neogeo,   kof2001,  ROT0, "Eolith / SNK", "The King of Fighters 2001 (set 2)" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7945	GAME( 2003, cthd2003,  kof2001,  neogeo,   neogeo,   cthd2003, ROT0, "bootleg", "Crouching Tiger Hidden Dragon 2003 (The King of Fighters 2001 bootleg)", GAME_SUPPORTS_SAVE ) /* Protected Hack / Bootleg of kof2001 */
	7946	GAME( 2003, ct2k3sp,   kof2001,  neogeo,   neogeo,   ct2k3sp,  ROT0, "bootleg", "Crouching Tiger Hidden Dragon 2003 Super Plus (The King of Fighters 2001 bootleg)", GAME_SUPPORTS_SAVE ) /* Protected Hack / Bootleg of kof2001 */
	7947	GAME( 2003, ct2k3sa,   kof2001,  neogeo,   neogeo,   ct2k3sa,  ROT0, "bootleg", "Crouching Tiger Hidden Dragon 2003 Super Plus alternate (The King of Fighters 2001 bootleg)", GAME_SUPPORTS_SAVE ) /* Hack / Bootleg of kof2001 */
	7948	GAME( 2002, kof2002,   neogeo,   neogeo,   neogeo,   kof2002,  ROT0, "Eolith / Playmore", "The King of Fighters 2002" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7949	GAME( 2002, kof2002b,  kof2002,  neogeo,   neogeo,   kof2002b, ROT0, "bootleg", "The King of Fighters 2002 (bootleg)", GAME_SUPPORTS_SAVE )
	7950	GAME( 2002, kf2k2pls,  kof2002,  neogeo,   neogeo,   kf2k2pls, ROT0, "bootleg", "The King of Fighters 2002 Plus (bootleg set 1)" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7951	GAME( 2002, kf2k2pla,  kof2002,  neogeo,   neogeo,   kf2k2pls, ROT0, "bootleg", "The King of Fighters 2002 Plus (bootleg set 2)" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7952	GAME( 2002, kf2k2mp,   kof2002,  neogeo,   neogeo,   kf2k2mp,  ROT0, "bootleg", "The King of Fighters 2002 Magic Plus (bootleg)" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7953	GAME( 2002, kf2k2mp2,  kof2002,  neogeo,   neogeo,   kf2k2mp2, ROT0, "bootleg", "The King of Fighters 2002 Magic Plus II (bootleg)" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	7954	GAME( 2002, kof10th,   kof2002,  neogeo,   neogeo,   kof10th,  ROT0, "bootleg", "The King of Fighters 10th Anniversary (The King of Fighters 2002 bootleg)", GAME_SUPPORTS_SAVE ) // fake SNK copyright
	7955	GAME( 2005, kf10thep,  kof2002,  neogeo,   neogeo,   kf10thep, ROT0, "bootleg", "The King of Fighters 10th Anniversary Extra Plus (The King of Fighters 2002 bootleg)", GAME_SUPPORTS_SAVE ) // fake SNK copyright
	7956	GAME( 2004, kf2k5uni,  kof2002,  neogeo,   neogeo,   kf2k5uni, ROT0, "bootleg", "The King of Fighters 10th Anniversary 2005 Unique (The King of Fighters 2002 bootleg)", GAME_SUPPORTS_SAVE ) // fake SNK copyright
	7957	GAME( 2004, kof2k4se,  kof2002,  neogeo,   neogeo,   kof2k4se, ROT0, "bootleg", "The King of Fighters Special Edition 2004 (The King of Fighters 2002 bootleg)", GAME_SUPPORTS_SAVE ) /* Hack / Bootleg of kof2002 */
	7958	GAME( 2003, mslug5,    neogeo,   neogeo,   neogeo,   mslug5,   ROT0, "SNK Playmore", "Metal Slug 5", GAME_SUPPORTS_SAVE )
	7959	GAME( 2003, mslug5h,   mslug5,   neogeo,   neogeo,   mslug5,   ROT0, "SNK Playmore", "Metal Slug 5 (AES Cart)", GAME_SUPPORTS_SAVE ) /* Also found in later MVS carts */
	7960	GAME( 2003, ms5pcb,    0,        neogeo,   ms5pcb,   ms5pcb,   ROT0, "SNK Playmore", "Metal Slug 5 (JAMMA PCB)", GAME_SUPPORTS_SAVE )
	7961	GAME( 2003, ms5plus,   mslug5,   neogeo,   neogeo,   ms5plus,  ROT0, "bootleg", "Metal Slug 5 Plus (bootleg)", GAME_SUPPORTS_SAVE )
	7962	GAME( 2003, svcpcb,    0,        neogeo,   svcpcb,   svcpcb,   ROT0, "SNK Playmore", "SNK vs. CAPCOM SVC CHAOS (JAMMA PCB, set 1)", GAME_SUPPORTS_SAVE ) // not a clone of neogeo because it's NOT a neogeo cart.
	7963	GAME( 2003, svcpcba,   svcpcb,   neogeo,   svcpcb,   svcpcb,   ROT0, "SNK Playmore", "SNK vs. CAPCOM SVC CHAOS (JAMMA PCB, set 2)" , GAME_SUPPORTS_SAVE ) /* Encrypted Code */
	7964	GAME( 2003, svc,       neogeo,   neogeo,   neogeo,   svc,      ROT0, "SNK Playmore", "SNK vs. CAPCOM SVC CHAOS", GAME_SUPPORTS_SAVE )
	7965	GAME( 2003, svcboot,   svc,      neogeo,   neogeo,   svcboot,  ROT0, "bootleg", "SNK vs. CAPCOM SVC CHAOS (bootleg)", GAME_SUPPORTS_SAVE )
	7966	GAME( 2003, svcplus,   svc,      neogeo,   neogeo,   svcplus,  ROT0, "bootleg", "SNK vs. CAPCOM SVC CHAOS Plus (bootleg set 1)", GAME_SUPPORTS_SAVE )
	7967	GAME( 2003, svcplusa,  svc,      neogeo,   neogeo,   svcplusa, ROT0, "bootleg", "SNK vs. CAPCOM SVC CHAOS Plus (bootleg set 2)", GAME_SUPPORTS_SAVE )
	7968	GAME( 2003, svcsplus,  svc,      neogeo,   neogeo,   svcsplus, ROT0, "bootleg", "SNK vs. CAPCOM SVC CHAOS Super Plus (bootleg)", GAME_SUPPORTS_SAVE )
	7969	GAME( 2003, samsho5,   neogeo,   neogeo,   neogeo,   samsho5,  ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V / Samurai Spirits Zero (set 1)", GAME_SUPPORTS_SAVE )
	7970	GAME( 2003, samsho5h,  samsho5,  neogeo,   neogeo,   samsho5,  ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V / Samurai Spirits Zero (set 2)", GAME_SUPPORTS_SAVE )
	7971	GAME( 2003, samsho5b,  samsho5,  neogeo,   neogeo,   samsho5b, ROT0, "bootleg", "Samurai Shodown V / Samurai Spirits Zero (bootleg)", GAME_SUPPORTS_SAVE ) // different program scrambling
	7972	GAME( 2003, kf2k3pcb,  0,        neogeo,   neogeo,   kf2k3pcb, ROT0, "SNK Playmore", "The King of Fighters 2003 (Japan, JAMMA PCB)", GAME_SUPPORTS_SAVE ) // not a clone of neogeo because it's NOT a neogeo cart.
	7973	GAME( 2003, kof2003,   neogeo,   neogeo,   neogeo,   kof2003,  ROT0, "SNK Playmore", "The King of Fighters 2003 (set 1)", GAME_SUPPORTS_SAVE )
	7974	GAME( 2003, kof2003h,  kof2003,  neogeo,   neogeo,   kof2003h, ROT0, "SNK Playmore", "The King of Fighters 2003 (set 2)", GAME_SUPPORTS_SAVE )
	7975	GAME( 2003, kf2k3bl,   kof2003,  neogeo,   neogeo,   kf2k3bl , ROT0, "bootleg", "The King of Fighters 2003 (bootleg set 1)", GAME_SUPPORTS_SAVE ) // zooming is wrong because its a bootleg of the pcb version on a cart (unless it was a bootleg pcb with the new bios?)
	7976	GAME( 2003, kf2k3bla,  kof2003,  neogeo,   neogeo,   kf2k3pl,  ROT0, "bootleg", "The King of Fighters 2003 (bootleg set 2)", GAME_SUPPORTS_SAVE ) // zooming is wrong because its a bootleg of the pcb version on a cart
	7977	GAME( 2003, kf2k3pl,   kof2003,  neogeo,   neogeo,   kf2k3pl,  ROT0, "bootleg", "The King of Fighters 2004 Plus / Hero (The King of Fighters 2003 bootleg)", GAME_SUPPORTS_SAVE ) // zooming is wrong because its a bootleg of the pcb version on a cart
	7978	GAME( 2003, kf2k3upl,  kof2003,  neogeo,   neogeo,   kf2k3upl, ROT0, "bootleg", "The King of Fighters 2004 Ultra Plus (The King of Fighters 2003 bootleg)", GAME_SUPPORTS_SAVE ) // zooming is wrong because its a bootleg of the pcb version on a cart
	7979	GAME( 2003, samsh5sp,  neogeo,   neogeo,   neogeo,   samsh5sp, ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V Special / Samurai Spirits Zero Special (set 1, uncensored)", GAME_SUPPORTS_SAVE )
	7980	GAME( 2003, samsh5sph, samsh5sp, neogeo,   neogeo,   samsh5sp, ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V Special / Samurai Spirits Zero Special (set 2, censored)", GAME_SUPPORTS_SAVE )
	7981	GAME( 2003, samsh5spn, samsh5sp, neogeo,   neogeo,   samsh5sp, ROT0, "Yuki Enterprise / SNK Playmore", "Samurai Shodown V Special / Samurai Spirits Zero Special (set 3, less censored)", GAME_SUPPORTS_SAVE )
7949	7982
7950	7983	/* there are other bootlegs kof96ep, kf2k1pls etc.? -- work out which should be supported */
7951	7984
7952	7985	/* Alpha Denshi Co. / ADK (changed name in 1993) */
7953		GAME( 1990, maglord,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Magician Lord (set 1)", 0 )
7954		GAME( 1990, maglordh, maglord,  neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Magician Lord (set 2)", 0 )
7955		GAME( 1990, ncombat,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Ninja Combat (set 1)", 0 )
7956		GAME( 1990, ncombath, ncombat,  neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Ninja Combat (set 2)", 0 )
7957		GAME( 1990, bjourney, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Blue's Journey / Raguy", 0 )
7958		GAME( 1991, crsword,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Crossed Swords", 0 )
7959		GAME( 1991, trally,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Thrash Rally", 0 )
7960		GAME( 1992, ncommand, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Ninja Commando", 0 )
7961		GAME( 1992, wh1,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "World Heroes (set 1)", 0 )
7962		GAME( 1992, wh1h,     wh1,      neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "World Heroes (set 2)", 0 )
7963		GAME( 1992, wh1ha,    wh1,      neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "World Heroes (set 3)", 0 )
7964		GAME( 1993, wh2,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK",              "World Heroes 2", 0 )
7965		GAME( 1994, wh2j,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes 2 Jet (set 1)", 0 )
7966		GAME( 1994, wh2jh,    wh2j,     neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes 2 Jet (set 2)", 0 )
7967		GAME( 1994, aodk,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "Aggressors of Dark Kombat / Tsuukai GANGAN Koushinkyoku", 0 )
7968		GAME( 1995, whp,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes Perfect", 0 )
7969		GAME( 1995, mosyougi, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "Syougi No Tatsujin - Master of Syougi", 0 )
7970		GAME( 1996, overtop,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK",              "Over Top", 0 )
7971		GAME( 1996, ninjamas, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "Ninja Master's - haoh-ninpo-cho", 0 )
7972		GAME( 1996, twinspri, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK",              "Twinkle Star Sprites", 0 )
7973		GAME( 1996, zintrckb, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "hack / bootleg",   "Zintrick / Oshidashi Zentrix (hack / bootleg)", 0 )
	7986	GAME( 1990, maglord,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Magician Lord (set 1)", GAME_SUPPORTS_SAVE )
	7987	GAME( 1990, maglordh,  maglord,  neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Magician Lord (set 2)", GAME_SUPPORTS_SAVE )
	7988	GAME( 1990, ncombat,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Ninja Combat (set 1)", GAME_SUPPORTS_SAVE )
	7989	GAME( 1990, ncombath,  ncombat,  neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Ninja Combat (set 2)", GAME_SUPPORTS_SAVE )
	7990	GAME( 1990, bjourney,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Blue's Journey / Raguy", GAME_SUPPORTS_SAVE )
	7991	GAME( 1991, crsword,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Crossed Swords", GAME_SUPPORTS_SAVE )
	7992	GAME( 1991, trally,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Thrash Rally", GAME_SUPPORTS_SAVE )
	7993	GAME( 1992, ncommand,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "Ninja Commando", GAME_SUPPORTS_SAVE )
	7994	GAME( 1992, wh1,       neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "World Heroes (set 1)", GAME_SUPPORTS_SAVE )
	7995	GAME( 1992, wh1h,      wh1,      neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "World Heroes (set 2)", GAME_SUPPORTS_SAVE )
	7996	GAME( 1992, wh1ha,     wh1,      neogeo,   neogeo,   neogeo,   ROT0, "Alpha Denshi Co.", "World Heroes (set 3)", GAME_SUPPORTS_SAVE )
	7997	GAME( 1993, wh2,       neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK",              "World Heroes 2", GAME_SUPPORTS_SAVE )
	7998	GAME( 1994, wh2j,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes 2 Jet (set 1)", GAME_SUPPORTS_SAVE )
	7999	GAME( 1994, wh2jh,     wh2j,     neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes 2 Jet (set 2)", GAME_SUPPORTS_SAVE )
	8000	GAME( 1994, aodk,      neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "Aggressors of Dark Kombat / Tsuukai GANGAN Koushinkyoku", GAME_SUPPORTS_SAVE )
	8001	GAME( 1995, whp,       neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "World Heroes Perfect", GAME_SUPPORTS_SAVE )
	8002	GAME( 1995, mosyougi,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "Syougi No Tatsujin - Master of Syougi", GAME_SUPPORTS_SAVE )
	8003	GAME( 1996, overtop,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK",              "Over Top", GAME_SUPPORTS_SAVE )
	8004	GAME( 1996, ninjamas,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK / SNK",        "Ninja Master's - haoh-ninpo-cho", GAME_SUPPORTS_SAVE )
	8005	GAME( 1996, twinspri,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK",              "Twinkle Star Sprites", GAME_SUPPORTS_SAVE )
	8006	GAME( 1996, zintrckb,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "hack / bootleg",   "Zintrick / Oshidashi Zentrix (hack / bootleg)", GAME_SUPPORTS_SAVE )
7974	8007
7975	8008	/* Aicom (was a part of Sammy) / Yumekobo (changed name in 1996) */
7976		GAME( 1992, viewpoin, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Sammy / Aicom", "Viewpoint", 0 )
7977		GAME( 1994, janshin,  neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Aicom", "Jyanshin Densetsu - Quest of Jongmaster", 0 )
7978		GAME( 1995, pulstar,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Aicom", "Pulstar", 0 )
7979		GAME( 1998, blazstar, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Yumekobo", "Blazing Star", 0 )
7980		GAME( 1999, preisle2, neogeo,   neogeo,   neogeo,   preisle2, ROT0, "Yumekobo", "Prehistoric Isle 2" , 0 ) /* Encrypted GFX */
	8009	GAME( 1992, viewpoin,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Sammy / Aicom", "Viewpoint", GAME_SUPPORTS_SAVE )
	8010	GAME( 1994, janshin,   neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Aicom", "Jyanshin Densetsu - Quest of Jongmaster", GAME_SUPPORTS_SAVE )
	8011	GAME( 1995, pulstar,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Aicom", "Pulstar", GAME_SUPPORTS_SAVE )
	8012	GAME( 1998, blazstar,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Yumekobo", "Blazing Star", GAME_SUPPORTS_SAVE )
	8013	GAME( 1999, preisle2,  neogeo,   neogeo,   neogeo,   preisle2, ROT0, "Yumekobo", "Prehistoric Isle 2" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
7981	8014
7982	8015	/* Data East Corporation */
7983		GAME( 1993, spinmast, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Spin Master / Miracle Adventure", 0 )
7984		GAME( 1994, wjammers, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Windjammers / Flying Power Disc", 0 )
7985		GAME( 1994, karnovr,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Karnov's Revenge / Fighter's History Dynamite", 0 )
7986		GAME( 1994, strhoop,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Street Hoop / Street Slam / Dunk Dream", 0 )
7987		GAME( 1996, ghostlop, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Ghostlop (prototype)", 0 )
7988		GAME( 1996, magdrop2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Magical Drop II", 0 )
7989		GAME( 1997, magdrop3, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Magical Drop III", 0 )
	8016	GAME( 1993, spinmast,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Spin Master / Miracle Adventure", GAME_SUPPORTS_SAVE )
	8017	GAME( 1994, wjammers,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Windjammers / Flying Power Disc", GAME_SUPPORTS_SAVE )
	8018	GAME( 1994, karnovr,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Karnov's Revenge / Fighter's History Dynamite", GAME_SUPPORTS_SAVE )
	8019	GAME( 1994, strhoop,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Street Hoop / Street Slam / Dunk Dream", GAME_SUPPORTS_SAVE )
	8020	GAME( 1996, ghostlop,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Ghostlop (prototype)", GAME_SUPPORTS_SAVE )
	8021	GAME( 1996, magdrop2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Magical Drop II", GAME_SUPPORTS_SAVE )
	8022	GAME( 1997, magdrop3,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Magical Drop III", GAME_SUPPORTS_SAVE )
7990	8023
7991	8024	/* Eleven */
7992		GAME( 2000, nitd,     neogeo,   neogeo,   neogeo,   nitd,     ROT0, "Eleven / Gavaking", "Nightmare in the Dark" , 0 ) /* Encrypted GFX */
7993		GAME( 2001, nitdbl,   nitd,     neogeo,   neogeo,   neogeo,   ROT0, "bootleg", "Nightmare in the Dark (bootleg)" , 0 )
	8025	GAME( 2000, nitd,      neogeo,   neogeo,   neogeo,   nitd,     ROT0, "Eleven / Gavaking", "Nightmare in the Dark" , GAME_SUPPORTS_SAVE ) /* Encrypted GFX */
	8026	GAME( 2001, nitdbl,    nitd,     neogeo,   neogeo,   neogeo,   ROT0, "bootleg", "Nightmare in the Dark (bootleg)" , GAME_SUPPORTS_SAVE )
7994	8027
7995	8028	/* Face */
7996		GAME( 1994, gururin,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Face", "Gururin", 0 )
7997		GAME( 1997, miexchng, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Face", "Money Puzzle Exchanger / Money Idol Exchanger", 0 )
	8029	GAME( 1994, gururin,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Face", "Gururin", GAME_SUPPORTS_SAVE )
	8030	GAME( 1997, miexchng,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Face", "Money Puzzle Exchanger / Money Idol Exchanger", GAME_SUPPORTS_SAVE )
7998	8031
7999	8032	/* Hudson Soft */
8000		GAME( 1994, panicbom, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Eighting / Hudson", "Panic Bomber", 0 )
8001		GAME( 1995, kabukikl, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Hudson", "Far East of Eden - Kabuki Klash / Tengai Makyou - Shin Den", 0 )
8002		GAME( 1997, neobombe, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Hudson", "Neo Bomberman", 0 )
	8033	GAME( 1994, panicbom,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Eighting / Hudson", "Panic Bomber", GAME_SUPPORTS_SAVE )
	8034	GAME( 1995, kabukikl,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Hudson", "Far East of Eden - Kabuki Klash / Tengai Makyou - Shin Den", GAME_SUPPORTS_SAVE )
	8035	GAME( 1997, neobombe,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Hudson", "Neo Bomberman", GAME_SUPPORTS_SAVE )
8003	8036
8004	8037	/* Monolith Corp. */
8005		GAME( 1990, minasan,  neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Monolith Corp.", "Minnasanno Okagesamadesu", 0 )
8006		GAME( 1991, bakatono, neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Monolith Corp.", "Bakatonosama Mahjong Manyuki", 0 )
	8038	GAME( 1990, minasan,   neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Monolith Corp.", "Minnasanno Okagesamadesu", GAME_SUPPORTS_SAVE )
	8039	GAME( 1991, bakatono,  neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Monolith Corp.", "Bakatonosama Mahjong Manyuki", GAME_SUPPORTS_SAVE )
8007	8040
8008	8041	/* Nazca (later acquired by SNK) */
8009		GAME( 1996, turfmast, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Nazca", "Neo Turf Masters / Big Tournament Golf", 0 )
8010		GAME( 1996, mslug,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Nazca", "Metal Slug - Super Vehicle-001", 0 )
	8042	GAME( 1996, turfmast,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Nazca", "Neo Turf Masters / Big Tournament Golf", GAME_SUPPORTS_SAVE )
	8043	GAME( 1996, mslug,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Nazca", "Metal Slug - Super Vehicle-001", GAME_SUPPORTS_SAVE )
8011	8044
8012	8045	/* NMK */
8013		GAME( 1994, zedblade, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "NMK", "Zed Blade / Operation Ragnarok", 0 )
	8046	GAME( 1994, zedblade, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "NMK", "Zed Blade / Operation Ragnarok", GAME_SUPPORTS_SAVE )
8014	8047
8015	8048	/* Psikyo */
8016		GAME( 1999, s1945p,   neogeo,   neogeo,   neogeo,   s1945p,   ROT0, "Psikyo", "Strikers 1945 Plus" , 0 )   /* Encrypted GFX */
	8049	GAME( 1999, s1945p,    neogeo,   neogeo,   neogeo,   s1945p,   ROT0, "Psikyo", "Strikers 1945 Plus" , GAME_SUPPORTS_SAVE )   /* Encrypted GFX */
8017	8050
8018	8051	/* Saurus */
8019		GAME( 1995, quizkof,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Quiz King of Fighters", 0 )
8020		GAME( 1995, stakwin,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Stakes Winner / Stakes Winner - GI kinzen seihae no michi", 0 )
8021		GAME( 1996, ragnagrd, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Ragnagard / Shin-Oh-Ken", 0 )
8022		GAME( 1996, pgoal,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Pleasure Goal / Futsal - 5 on 5 Mini Soccer", 0 )
8023		GAME( 1996, stakwin2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Stakes Winner 2", 0 )
8024		GAME( 1997, shocktro, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers (set 1)", 0 )
8025		GAME( 1997, shocktra, shocktro, neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers (set 2)", 0 )
8026		GAME( 1998, shocktr2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers - 2nd Squad", 0 )
8027		GAME( 1998, lans2004, shocktr2, neogeo,   neogeo,   lans2004, ROT0, "bootleg", "Lansquenet 2004 (Shock Troopers - 2nd Squad bootleg)", 0 )
	8052	GAME( 1995, quizkof,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Quiz King of Fighters", GAME_SUPPORTS_SAVE )
	8053	GAME( 1995, stakwin,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Stakes Winner / Stakes Winner - GI kinzen seihae no michi", GAME_SUPPORTS_SAVE )
	8054	GAME( 1996, ragnagrd,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Ragnagard / Shin-Oh-Ken", GAME_SUPPORTS_SAVE )
	8055	GAME( 1996, pgoal,     neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Pleasure Goal / Futsal - 5 on 5 Mini Soccer", GAME_SUPPORTS_SAVE )
	8056	GAME( 1996, stakwin2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Stakes Winner 2", GAME_SUPPORTS_SAVE )
	8057	GAME( 1997, shocktro,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers (set 1)", GAME_SUPPORTS_SAVE )
	8058	GAME( 1997, shocktra,  shocktro, neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers (set 2)", GAME_SUPPORTS_SAVE )
	8059	GAME( 1998, shocktr2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Shock Troopers - 2nd Squad", GAME_SUPPORTS_SAVE )
	8060	GAME( 1998, lans2004,  shocktr2, neogeo,   neogeo,   lans2004, ROT0, "bootleg", "Lansquenet 2004 (Shock Troopers - 2nd Squad bootleg)", GAME_SUPPORTS_SAVE )
8028	8061
8029	8062	/* Sunsoft */
8030		GAME( 1995, galaxyfg, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Sunsoft", "Galaxy Fight - Universal Warriors", 0 )
8031		GAME( 1996, wakuwak7, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Sunsoft", "Waku Waku 7", 0 )
	8063	GAME( 1995, galaxyfg,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Sunsoft", "Galaxy Fight - Universal Warriors", GAME_SUPPORTS_SAVE )
	8064	GAME( 1996, wakuwak7,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Sunsoft", "Waku Waku 7", GAME_SUPPORTS_SAVE )
8032	8065
8033	8066	/* Taito */
8034		GAME( 1994, pbobblen, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Taito", "Puzzle Bobble / Bust-A-Move (Neo-Geo) (set 1)", 0 )
8035		GAME( 1994, pbobblenb,pbobblen, neogeo,   neogeo,   neogeo,   ROT0, "Taito", "Puzzle Bobble / Bust-A-Move (Neo-Geo) (bootleg)", 0 )
8036		GAME( 1999, pbobbl2n, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Taito (SNK license)", "Puzzle Bobble 2 / Bust-A-Move Again (Neo-Geo)", 0 )
8037		GAME( 2003, pnyaa,    neogeo,   neogeo,   neogeo,   pnyaa,    ROT0, "Aiky / Taito", "Pochi and Nyaa", 0 )
	8067	GAME( 1994, pbobblen,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Taito", "Puzzle Bobble / Bust-A-Move (Neo-Geo) (set 1)", GAME_SUPPORTS_SAVE )
	8068	GAME( 1994, pbobblenb, pbobblen, neogeo,   neogeo,   neogeo,   ROT0, "Taito", "Puzzle Bobble / Bust-A-Move (Neo-Geo) (bootleg)", GAME_SUPPORTS_SAVE )
	8069	GAME( 1999, pbobbl2n,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Taito (SNK license)", "Puzzle Bobble 2 / Bust-A-Move Again (Neo-Geo)", GAME_SUPPORTS_SAVE )
	8070	GAME( 2003, pnyaa,     neogeo,   neogeo,   neogeo,   pnyaa,    ROT0, "Aiky / Taito", "Pochi and Nyaa", GAME_SUPPORTS_SAVE )
8038	8071
8039	8072	/* Takara */
8040		GAME( 1995, marukodq, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Takara", "Chibi Marukochan Deluxe Quiz", 0 )
	8073	GAME( 1995, marukodq, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Takara", "Chibi Marukochan Deluxe Quiz", GAME_SUPPORTS_SAVE )
8041	8074
8042	8075	/* Technos Japan */
8043		GAME( 1995, doubledr, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Technos Japan", "Double Dragon (Neo-Geo)", 0 )
8044		GAME( 1995, gowcaizr, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Technos Japan", "Voltage Fighter - Gowcaizer / Choujin Gakuen Gowcaizer", 0 )
8045		GAME( 1996, sdodgeb,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Technos Japan", "Super Dodge Ball / Kunio no Nekketsu Toukyuu Densetsu", 0 )
	8076	GAME( 1995, doubledr,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Technos Japan", "Double Dragon (Neo-Geo)", GAME_SUPPORTS_SAVE )
	8077	GAME( 1995, gowcaizr,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Technos Japan", "Voltage Fighter - Gowcaizer / Choujin Gakuen Gowcaizer", GAME_SUPPORTS_SAVE )
	8078	GAME( 1996, sdodgeb,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Technos Japan", "Super Dodge Ball / Kunio no Nekketsu Toukyuu Densetsu", GAME_SUPPORTS_SAVE )
8046	8079
8047	8080	/* Tecmo */
8048		GAME( 1996, tws96,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Tecmo", "Tecmo World Soccer '96", 0 )
	8081	GAME( 1996, tws96,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Tecmo", "Tecmo World Soccer '96", GAME_SUPPORTS_SAVE )
8049	8082
8050	8083	/* Viccom */
8051		GAME( 1994, fightfev, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Viccom", "Fight Fever (set 1)", 0 )
8052		GAME( 1994, fightfeva, fightfev, neogeo,   neogeo,   neogeo,   ROT0, "Viccom", "Fight Fever (set 2)", 0 )
	8084	GAME( 1994, fightfev,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Viccom", "Fight Fever (set 1)", GAME_SUPPORTS_SAVE )
	8085	GAME( 1994, fightfeva, fightfev, neogeo,   neogeo,   neogeo,   ROT0, "Viccom", "Fight Fever (set 2)", GAME_SUPPORTS_SAVE )
8053	8086
8054	8087	/* Video System Co. */
8055		GAME( 1994, pspikes2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Video System Co.", "Power Spikes II", 0 )
8056		GAME( 1994, sonicwi2, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Video System Co.", "Aero Fighters 2 / Sonic Wings 2", 0 )
8057		GAME( 1995, sonicwi3, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Video System Co.", "Aero Fighters 3 / Sonic Wings 3", 0 )
8058		GAME( 1997, popbounc, neogeo,   neogeo,   popbounc, neogeo,   ROT0, "Video System Co.", "Pop 'n Bounce / Gapporin", 0 )
	8088	GAME( 1994, pspikes2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Video System Co.", "Power Spikes II", GAME_SUPPORTS_SAVE )
	8089	GAME( 1994, sonicwi2,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Video System Co.", "Aero Fighters 2 / Sonic Wings 2", GAME_SUPPORTS_SAVE )
	8090	GAME( 1995, sonicwi3,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Video System Co.", "Aero Fighters 3 / Sonic Wings 3", GAME_SUPPORTS_SAVE )
	8091	GAME( 1997, popbounc,  neogeo,   neogeo,   popbounc, neogeo,   ROT0, "Video System Co.", "Pop 'n Bounce / Gapporin", GAME_SUPPORTS_SAVE )
8059	8092
8060	8093	/* Visco */
8061		GAME( 1992, androdun, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Andro Dunos", 0 )
8062		GAME( 1995, puzzledp, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Taito (Visco license)", "Puzzle De Pon!", 0 )
8063		GAME( 1996, neomrdo,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Neo Mr. Do!", 0 )
8064		GAME( 1995, goalx3,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Goal! Goal! Goal!", 0 )
8065		GAME( 1996, neodrift, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Neo Drift Out - New Technology", 0 )
8066		GAME( 1996, breakers, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Breakers", 0 )
8067		GAME( 1997, puzzldpr, puzzledp, neogeo,   neogeo,   neogeo,   ROT0, "Taito (Visco license)", "Puzzle De Pon! R!", 0 )
8068		GAME( 1998, breakrev, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Breakers Revenge", 0 )
8069		GAME( 1998, flipshot, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Battle Flip Shot", 0 )
8070		GAME( 1999, ctomaday, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Captain Tomaday", 0 )
8071		GAME( 1999, ganryu,   neogeo,   neogeo,   neogeo,   ganryu,   ROT0, "Visco", "Ganryu / Musashi Ganryuki" , 0 )   /* Encrypted GFX */
8072		GAME( 2000, bangbead, neogeo,   neogeo,   neogeo,   bangbead, ROT0, "Visco", "Bang Bead", 0 )
8073		//GAME( 2000, bangbedp, bangbead, neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Bang Bead (prototype)", 0 )
	8094	GAME( 1992, androdun,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Andro Dunos", GAME_SUPPORTS_SAVE )
	8095	GAME( 1995, puzzledp,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Taito (Visco license)", "Puzzle De Pon!", GAME_SUPPORTS_SAVE )
	8096	GAME( 1996, neomrdo,   neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Neo Mr. Do!", GAME_SUPPORTS_SAVE )
	8097	GAME( 1995, goalx3,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Goal! Goal! Goal!", GAME_SUPPORTS_SAVE )
	8098	GAME( 1996, neodrift,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Neo Drift Out - New Technology", GAME_SUPPORTS_SAVE )
	8099	GAME( 1996, breakers,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Breakers", GAME_SUPPORTS_SAVE )
	8100	GAME( 1997, puzzldpr,  puzzledp, neogeo,   neogeo,   neogeo,   ROT0, "Taito (Visco license)", "Puzzle De Pon! R!", GAME_SUPPORTS_SAVE )
	8101	GAME( 1998, breakrev,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Breakers Revenge", GAME_SUPPORTS_SAVE )
	8102	GAME( 1998, flipshot,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Battle Flip Shot", GAME_SUPPORTS_SAVE )
	8103	GAME( 1999, ctomaday,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Captain Tomaday", GAME_SUPPORTS_SAVE )
	8104	GAME( 1999, ganryu,    neogeo,   neogeo,   neogeo,   ganryu,   ROT0, "Visco", "Ganryu / Musashi Ganryuki" , GAME_SUPPORTS_SAVE )   /* Encrypted GFX */
	8105	GAME( 2000, bangbead,  neogeo,   neogeo,   neogeo,   bangbead, ROT0, "Visco", "Bang Bead", GAME_SUPPORTS_SAVE )
	8106	//GAME( 2000, bangbedp,  bangbead, neogeo,   neogeo,   neogeo,   ROT0, "Visco", "Bang Bead (prototype)", GAME_SUPPORTS_SAVE )
8074	8107
8075	8108	/* Mega Enterprise */
8076		GAME( 2002, mslug4,   neogeo,   neogeo,   neogeo,   mslug4,   ROT0, "Mega / Playmore", "Metal Slug 4 (set 1)", 0 )
8077		GAME( 2002, mslug4h,  mslug4,   neogeo,   neogeo,   mslug4,   ROT0, "Mega / Playmore", "Metal Slug 4 (set 2)", 0 )
8078		GAME( 2002, ms4plus,  mslug4,   neogeo,   neogeo,   ms4plus,  ROT0, "bootleg", "Metal Slug 4 Plus (bootleg)", 0 )
	8109	GAME( 2002, mslug4,    neogeo,   neogeo,   neogeo,   mslug4,   ROT0, "Mega / Playmore", "Metal Slug 4 (set 1)", GAME_SUPPORTS_SAVE )
	8110	GAME( 2002, mslug4h,   mslug4,   neogeo,   neogeo,   mslug4,   ROT0, "Mega / Playmore", "Metal Slug 4 (set 2)", GAME_SUPPORTS_SAVE )
	8111	GAME( 2002, ms4plus,   mslug4,   neogeo,   neogeo,   ms4plus,  ROT0, "bootleg", "Metal Slug 4 Plus (bootleg)", GAME_SUPPORTS_SAVE )
8079	8112
8080	8113	/* Evoga */
8081		GAME( 2002, rotd,     neogeo,   neogeo,   neogeo,   rotd,     ROT0, "Evoga / Playmore", "Rage of the Dragons", 0 )
	8114	GAME( 2002, rotd,      neogeo,   neogeo,   neogeo,   rotd,     ROT0, "Evoga / Playmore", "Rage of the Dragons", GAME_SUPPORTS_SAVE )
8082	8115
8083	8116	/* Atlus */
8084		GAME( 2002, matrim,   neogeo,   neogeo,   neogeo,   matrim,   ROT0, "Noise Factory / Atlus", "Matrimelee / Shin Gouketsuji Ichizoku Toukon", 0 )
8085		GAME( 2002, matrimbl, matrim,   neogeo,   neogeo,   matrimbl, ROT0, "bootleg", "Matrimelee / Shin Gouketsuji Ichizoku Toukon (bootleg)", 0 )
	8117	GAME( 2002, matrim,    neogeo,   neogeo,   neogeo,   matrim,   ROT0, "Noise Factory / Atlus", "Matrimelee / Shin Gouketsuji Ichizoku Toukon", GAME_SUPPORTS_SAVE )
	8118	GAME( 2002, matrimbl,  matrim,   neogeo,   neogeo,   matrimbl, ROT0, "bootleg", "Matrimelee / Shin Gouketsuji Ichizoku Toukon (bootleg)", GAME_SUPPORTS_SAVE )
8086	8119
8087	8120	/* BrezzaSoft */
8088		GAME( 2001, jockeygp, neogeo,   neogeo,   jockeygp, jockeygp, ROT0, "Sun Amusement / BrezzaSoft", "Jockey Grand Prix", 0 )
8089		GAME( 2001, vliner,   neogeo,   neogeo,   vliner,   vliner,   ROT0, "Dyna / BrezzaSoft", "V-Liner (set 1)", 0 )
8090		GAME( 2001, vlinero,  vliner,   neogeo,   vliner,   vliner,   ROT0, "Dyna / BrezzaSoft", "V-Liner (set 2)", 0 )
	8121	GAME( 2001, jockeygp,  neogeo,   neogeo,   jockeygp, jockeygp, ROT0, "Sun Amusement / BrezzaSoft", "Jockey Grand Prix", GAME_SUPPORTS_SAVE )
	8122	GAME( 2001, vliner,    neogeo,   neogeo,   vliner,   vliner,   ROT0, "Dyna / BrezzaSoft", "V-Liner (set 1)", GAME_SUPPORTS_SAVE )
	8123	GAME( 2001, vlinero,   vliner,   neogeo,   vliner,   vliner,   ROT0, "Dyna / BrezzaSoft", "V-Liner (set 2)", GAME_SUPPORTS_SAVE )
8091	8124
8092	8125	/* Kyle Hodgetts */
8093		GAME( 2000, diggerma, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Kyle Hodgetts", "Digger Man (prototype)", 0 )
	8126	GAME( 2000, diggerma, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Kyle Hodgetts", "Digger Man (prototype)", GAME_SUPPORTS_SAVE )
8094	8127
8095	8128	/* Neo Print */
8096		GAME( 1998, 98best44, 0,        neogeo,   neogeo,   neogeo,   ROT0, "SNK", "'98 NeoPri Best 44 (Neo Print)", GAME_NOT_WORKING )
8097
	8129	GAME( 1998, 98best44,  0,        neogeo,   neogeo,   neogeo,   ROT0, "SNK", "'98 NeoPri Best 44 (Neo Print)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )

src/mame/drivers/halleys.c

r6740	r6741
159	159
160	160	#include "driver.h"
161	161	#include "cpu/z80/z80.h"
162		#include "taitoipt.h"
	162	#include "includes/taitoipt.h"
163	163	#include "deprecat.h"
164	164	#include "cpu/m6809/m6809.h"
165	165	#include "sound/ay8910.h"

src/mame/drivers/djmain.c

r6740	r6741
68	68	#include "cpu/m68000/m68000.h"
69	69	#include "machine/idectrl.h"
70	70	#include "sound/k054539.h"
71		#include "video/konamiic.h"
	71	#include "video/konicdev.h"
72	72
73	73
74	74	extern UINT32 *djmain_obj_ram;
75	75
76	76	VIDEO_UPDATE( djmain );
77	77	VIDEO_START( djmain );
	78	extern void djmain_tile_callback(running_machine* machine, int layer, int *code, int *color, int *flags);
78	79
79	80
80	81	static int sndram_bank;
r6740	r6741
245	246
246	247	static READ32_HANDLER( v_rom_r )
247	248	{
	249	const device_config *k056832 = devtag_get_device(space->machine, "k056832");
248	250	UINT8 *mem8 = memory_region(space->machine, "gfx2");
249		int bank = K056832_word_r(space, 0x34/2, 0xffff);
	251	int bank = k056832_word_r(k056832, 0x34/2, 0xffff);
250	252
251	253	offset *= 2;
252	254
r6740	r6741
474	476	AM_RANGE(0x480000, 0x48443f) AM_RAM_WRITE(paletteram32_w)      // COLOR RAM
475	477	AM_BASE_GENERIC(paletteram)
476	478	AM_RANGE(0x500000, 0x57ffff) AM_READWRITE(sndram_r, sndram_w)            // SOUND RAM
477		AM_RANGE(0x580000, 0x58003f) AM_READWRITE(K056832_long_r, K056832_long_w)      // VIDEO REG (tilemap)
	479	AM_RANGE(0x580000, 0x58003f) AM_DEVREADWRITE("k056832", k056832_long_r, k056832_long_w)      // VIDEO REG (tilemap)
478	480	AM_RANGE(0x590000, 0x590007) AM_WRITE(unknown590000_w)               // ??
479		AM_RANGE(0x5a0000, 0x5a005f) AM_WRITE(K055555_long_w)               // 055555: priority encoder
	481	AM_RANGE(0x5a0000, 0x5a005f) AM_DEVWRITE("k055555", k055555_long_w)               // 055555: priority encoder
480	482	AM_RANGE(0x5b0000, 0x5b04ff) AM_READWRITE16(dual539_r, dual539_w, 0xffffffff)            // SOUND regs
481	483	AM_RANGE(0x5c0000, 0x5c0003) AM_READ8(inp1_r, 0xffffffff)  //  DSW3,BTN3,BTN2,BTN1  // input port control (buttons and DIP switches)
482	484	AM_RANGE(0x5c8000, 0x5c8003) AM_READ8(inp2_r, 0xffffffff)  //  DSW1,DSW2,UNK2,UNK1  // input port control (DIP switches)
r6740	r6741
490	492	AM_RANGE(0x802000, 0x802fff) AM_WRITE(unknown802000_w)               // ??
491	493	AM_RANGE(0x803000, 0x80309f) AM_READWRITE(obj_ctrl_r, obj_ctrl_w)         // OBJECT REGS
492	494	AM_RANGE(0x803800, 0x803fff) AM_READ(obj_rom_r)                  // OBJECT ROM readthrough (for POST)
493		AM_RANGE(0xc00000, 0xc01fff) AM_READWRITE(K056832_ram_long_r, K056832_ram_long_w)   // VIDEO RAM (tilemap) (beatmania)
	495	AM_RANGE(0xc00000, 0xc01fff) AM_DEVREADWRITE("k056832", k056832_ram_long_r, k056832_ram_long_w)   // VIDEO RAM (tilemap) (beatmania)
494	496	AM_RANGE(0xc02000, 0xc02047) AM_WRITE(unknownc02000_w)               // ??
495	497	AM_RANGE(0xd00000, 0xd0000f) AM_DEVREADWRITE("ide", ide_std_r, ide_std_w)            // IDE control regs (hiphopmania)
496	498	AM_RANGE(0xd4000c, 0xd4000f) AM_DEVREADWRITE("ide", ide_alt_r, ide_alt_w)            // IDE status control reg (hiphopmania)
497		AM_RANGE(0xe00000, 0xe01fff) AM_READWRITE(K056832_ram_long_r, K056832_ram_long_w)   // VIDEO RAM (tilemap) (hiphopmania)
	499	AM_RANGE(0xe00000, 0xe01fff) AM_DEVREADWRITE("k056832", k056832_ram_long_r, k056832_ram_long_w)   // VIDEO RAM (tilemap) (hiphopmania)
498	500	AM_RANGE(0xf00000, 0xf0000f) AM_DEVREADWRITE("ide", ide_std_r, ide_std_w)            // IDE control regs (beatmania)
499	501	AM_RANGE(0xf4000c, 0xf4000f) AM_DEVREADWRITE("ide", ide_alt_r, ide_alt_w)            // IDE status control reg (beatmania)
500	502	ADDRESS_MAP_END
r6740	r6741
1474	1476	*
1475	1477	*************************************/
1476	1478
	1479	static const k056832_interface djmain_k056832_intf =
	1480	{
	1481	"gfx2", 1,
	1482	K056832_BPP_4dj,
	1483	1, 1,
	1484	KONAMI_ROM_DEINTERLEAVE_NONE,
	1485	djmain_tile_callback, "none"
	1486	};
	1487
1477	1488	static MACHINE_DRIVER_START( djmain )
1478	1489
1479	1490	/* basic machine hardware */
r6740	r6741
1501	1512	MDRV_VIDEO_START(djmain)
1502	1513	MDRV_VIDEO_UPDATE(djmain)
1503	1514
	1515	MDRV_K056832_ADD("k056832", djmain_k056832_intf)
	1516	MDRV_K055555_ADD("k055555")
	1517
1504	1518	/* sound hardware */
1505	1519	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1506	1520

src/mame/drivers/namcoic.c

r6740	r6741
1	1	#include "driver.h"
2		#include "namcos2.h" /* for game-specific hacks */
3		#include "namcoic.h"
	2	#include "includes/namcos2.h" /* for game-specific hacks */
	3	#include "includes/namcoic.h"
4	4
5	5	/**************************************************************************************/
6	6	static int mPalXOR;      /* XOR'd with palette select register; needed for System21 */

src/mame/drivers/segas16a.c

r6740	r6741
147	147	#include "cpu/z80/z80.h"
148	148	#include "cpu/m68000/m68000.h"
149	149	#include "cpu/mcs51/mcs51.h"
150		#include "system16.h"
	150	#include "includes/system16.h"
151	151	#include "machine/8255ppi.h"
152	152	#include "machine/fd1089.h"
153	153	#include "machine/i8243.h"

src/mame/drivers/snookr10.c

r6740	r6741
368	368
369	369
370	370	/* from video */
	371	extern UINT8 *snookr10_videoram;
	372	extern UINT8 *snookr10_colorram;
	373
371	374	WRITE8_HANDLER( snookr10_videoram_w );
372	375	WRITE8_HANDLER( snookr10_colorram_w );
373	376	PALETTE_INIT( snookr10 );
r6740	r6741
514	517	AM_RANGE(0x3004, 0x3004) AM_READ(dsw_port_1_r)      /* complement of DS1, bit 7 */
515	518	AM_RANGE(0x5000, 0x5000) AM_WRITE(output_port_0_w)   /* OUT0 */
516	519	AM_RANGE(0x5001, 0x5001) AM_WRITE(output_port_1_w)   /* OUT1 */
517		AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(snookr10_videoram_w) AM_BASE_GENERIC(videoram)
518		AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(snookr10_colorram_w) AM_BASE_GENERIC(colorram)
	520	AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(snookr10_videoram_w) AM_BASE(&snookr10_videoram)
	521	AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(snookr10_colorram_w) AM_BASE(&snookr10_colorram)
519	522	AM_RANGE(0x8000, 0xffff) AM_ROM
520	523	ADDRESS_MAP_END
521	524
r6740	r6741
528	531	AM_RANGE(0x4003, 0x4003) AM_READ_PORT("SW1")      /* DS1 */
529	532	AM_RANGE(0x5000, 0x5000) AM_WRITE(output_port_0_w)   /* OUT0 */
530	533	AM_RANGE(0x5001, 0x5001) AM_WRITE(output_port_1_w)   /* OUT1 */
531		AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(snookr10_videoram_w) AM_BASE_GENERIC(videoram)
532		AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(snookr10_colorram_w) AM_BASE_GENERIC(colorram)
	534	AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(snookr10_videoram_w) AM_BASE(&snookr10_videoram)
	535	AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(snookr10_colorram_w) AM_BASE(&snookr10_colorram)
533	536	AM_RANGE(0x8000, 0xffff) AM_ROM
534	537	ADDRESS_MAP_END
535	538

src/mame/drivers/neogeo.c

r6740	r6741
193	193
194	194	#include "driver.h"
195	195	#include "cpu/m68000/m68000.h"
196		#include "neogeo.h"
	196	#include "includes/neogeo.h"
197	197	#include "machine/pd4990a.h"
198	198	#include "cpu/z80/z80.h"
199	199	#include "sound/2610intf.h"
r6740	r6741
201	201	#include "neogeo.lh"
202	202
203	203
204		#define LOG_VIDEO_SYSTEM      (0)
205		#define LOG_CPU_COMM         (0)
206		#define LOG_MAIN_CPU_BANKING   (0)
207		#define LOG_AUDIO_CPU_BANKING   (0)
	204	#define LOG_VIDEO_SYSTEM         (0)
	205	#define LOG_CPU_COMM             (0)
	206	#define LOG_MAIN_CPU_BANKING     (0)
	207	#define LOG_AUDIO_CPU_BANKING    (0)
208	208
209	209
210
211	210	/*************************************
212	211	*
213	212	*  Global variables
214	213	*
215	214	*************************************/
216	215
217		static UINT8 display_position_interrupt_control;
218		static UINT32 display_counter;
219		static UINT32 vblank_interrupt_pending;
220		static UINT32 display_position_interrupt_pending;
221		static UINT32 irq3_pending;
222		static emu_timer *display_position_interrupt_timer;
223		static emu_timer *display_position_vblank_timer;
224		static emu_timer *vblank_interrupt_timer;
225
226		static UINT8 controller_select;
227
228	216	static UINT8 *memcard_data;
229
230		static UINT32 main_cpu_bank_address;
231		static UINT8 main_cpu_vector_table_source;
232
233		static UINT8 audio_result;
234		static UINT8 audio_cpu_banks[4];
235		static UINT8 audio_cpu_rom_source;
236		static UINT8 audio_cpu_rom_source_last;
237
238	217	static UINT16 *save_ram;
239		static UINT8 save_ram_unlocked;
240	218
241		static UINT8 output_data;
242		static UINT8 output_latch;
243		static UINT8 el_value;
244		static UINT8 led1_value;
245		static UINT8 led2_value;
246	219
247
248
249	220	/*************************************
250	221	*
251	222	*  Forward declerations
r6740	r6741
253	224	*************************************/
254	225
255	226	static void set_output_latch(running_machine *machine, UINT8 data);
256		static void set_output_data(UINT8 data);
	227	static void set_output_data(running_machine *machine, UINT8 data);
257	228
258	229
259
260	230	/*************************************
261	231	*
262	232	*  Main CPU interrupt generation
263	233	*
264	234	*************************************/
265	235
266		#define IRQ2CTRL_ENABLE            (0x10)
267		#define IRQ2CTRL_LOAD_RELATIVE      (0x20)
268		#define IRQ2CTRL_AUTOLOAD_VBLANK   (0x40)
269		#define IRQ2CTRL_AUTOLOAD_REPEAT   (0x80)
	236	#define IRQ2CTRL_ENABLE             (0x10)
	237	#define IRQ2CTRL_LOAD_RELATIVE      (0x20)
	238	#define IRQ2CTRL_AUTOLOAD_VBLANK    (0x40)
	239	#define IRQ2CTRL_AUTOLOAD_REPEAT    (0x80)
270	240
271	241
272		static void adjust_display_position_interrupt_timer(running_machine *machine)
	242	static void adjust_display_position_interrupt_timer( running_machine *machine )
273	243	{
274		if ((display_counter + 1) != 0)
	244	neogeo_state *state = (neogeo_state *)machine->driver_data;
	245
	246	if ((state->display_counter + 1) != 0)
275	247	{
276		attotime period = attotime_mul(ATTOTIME_IN_HZ(NEOGEO_PIXEL_CLOCK), display_counter + 1);
277		if (LOG_VIDEO_SYSTEM) logerror("adjust_display_position_interrupt_timer  current y: %02x  current x: %02x   target y: %x  target x: %x\n", video_screen_get_vpos(machine->primary_screen), video_screen_get_hpos(machine->primary_screen), (display_counter + 1) / NEOGEO_HTOTAL, (display_counter + 1) % NEOGEO_HTOTAL);
	248	attotime period = attotime_mul(ATTOTIME_IN_HZ(NEOGEO_PIXEL_CLOCK), state->display_counter + 1);
	249	if (LOG_VIDEO_SYSTEM) logerror("adjust_display_position_interrupt_timer  current y: %02x  current x: %02x   target y: %x  target x: %x\n", video_screen_get_vpos(machine->primary_screen), video_screen_get_hpos(machine->primary_screen), (state->display_counter + 1) / NEOGEO_HTOTAL, (state->display_counter + 1) % NEOGEO_HTOTAL);
278	250
279		timer_adjust_oneshot(display_position_interrupt_timer, period, 0);
	251	timer_adjust_oneshot(state->display_position_interrupt_timer, period, 0);
280	252	}
281	253	}
282	254
283	255
284		void neogeo_set_display_position_interrupt_control(UINT16 data)
	256	void neogeo_set_display_position_interrupt_control( running_machine *machine, UINT16 data )
285	257	{
286		display_position_interrupt_control = data;
	258	neogeo_state *state = (neogeo_state *)machine->driver_data;
	259	state->display_position_interrupt_control = data;
287	260	}
288	261
289	262
290		void neogeo_set_display_counter_msb(const address_space *space, UINT16 data)
	263	void neogeo_set_display_counter_msb( const address_space *space, UINT16 data )
291	264	{
292		display_counter = (display_counter & 0x0000ffff) | ((UINT32)data << 16);
	265	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
293	266
294		if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", cpu_get_pc(space->cpu), display_counter);
	267	state->display_counter = (state->display_counter & 0x0000ffff) | ((UINT32)data << 16);
	268
	269	if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", cpu_get_pc(space->cpu), state->display_counter);
295	270	}
296	271
297	272
298		void neogeo_set_display_counter_lsb(const address_space *space, UINT16 data)
	273	void neogeo_set_display_counter_lsb( const address_space *space, UINT16 data )
299	274	{
300		display_counter = (display_counter & 0xffff0000) | data;
	275	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
301	276
302		if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", cpu_get_pc(space->cpu), display_counter);
	277	state->display_counter = (state->display_counter & 0xffff0000) | data;
303	278
304		if (display_position_interrupt_control & IRQ2CTRL_LOAD_RELATIVE)
	279	if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", cpu_get_pc(space->cpu), state->display_counter);
	280
	281	if (state->display_position_interrupt_control & IRQ2CTRL_LOAD_RELATIVE)
305	282	{
306	283	if (LOG_VIDEO_SYSTEM) logerror("AUTOLOAD_RELATIVE ");
307	284	adjust_display_position_interrupt_timer(space->machine);
r6740	r6741
309	286	}
310	287
311	288
312		static void update_interrupts(running_machine *machine)
	289	static void update_interrupts( running_machine *machine )
313	290	{
314		cputag_set_input_line(machine, "maincpu", 1, vblank_interrupt_pending ? ASSERT_LINE : CLEAR_LINE);
315		cputag_set_input_line(machine, "maincpu", 2, display_position_interrupt_pending ? ASSERT_LINE : CLEAR_LINE);
316		cputag_set_input_line(machine, "maincpu", 3, irq3_pending ? ASSERT_LINE : CLEAR_LINE);
	291	neogeo_state *state = (neogeo_state *)machine->driver_data;
	292
	293	cputag_set_input_line(machine, "maincpu", 1, state->vblank_interrupt_pending ? ASSERT_LINE : CLEAR_LINE);
	294	cputag_set_input_line(machine, "maincpu", 2, state->display_position_interrupt_pending ? ASSERT_LINE : CLEAR_LINE);
	295	cputag_set_input_line(machine, "maincpu", 3, state->irq3_pending ? ASSERT_LINE : CLEAR_LINE);
317	296	}
318	297
319	298
320		void neogeo_acknowledge_interrupt(running_machine *machine, UINT16 data)
	299	void neogeo_acknowledge_interrupt( running_machine *machine, UINT16 data )
321	300	{
322		if (data & 0x01) irq3_pending = 0;
323		if (data & 0x02) display_position_interrupt_pending = 0;
324		if (data & 0x04) vblank_interrupt_pending = 0;
	301	neogeo_state *state = (neogeo_state *)machine->driver_data;
325	302
	303	if (data & 0x01)
	304	state->irq3_pending = 0;
	305	if (data & 0x02)
	306	state->display_position_interrupt_pending = 0;
	307	if (data & 0x04)
	308	state->vblank_interrupt_pending = 0;
	309
326	310	update_interrupts(machine);
327	311	}
328	312
329	313
330	314	static TIMER_CALLBACK( display_position_interrupt_callback )
331	315	{
	316	neogeo_state *state = (neogeo_state *)machine->driver_data;
	317
332	318	if (LOG_VIDEO_SYSTEM) logerror("--- Scanline @ %d,%d\n", video_screen_get_vpos(machine->primary_screen), video_screen_get_hpos(machine->primary_screen));
333		if (display_position_interrupt_control & IRQ2CTRL_ENABLE)
	319
	320	if (state->display_position_interrupt_control & IRQ2CTRL_ENABLE)
334	321	{
335	322	if (LOG_VIDEO_SYSTEM) logerror("*** Scanline interrupt (IRQ2) ***  y: %02x  x: %02x\n", video_screen_get_vpos(machine->primary_screen), video_screen_get_hpos(machine->primary_screen));
336		display_position_interrupt_pending = 1;
	323	state->display_position_interrupt_pending = 1;
337	324
338	325	update_interrupts(machine);
339	326	}
340	327
341		if (display_position_interrupt_control & IRQ2CTRL_AUTOLOAD_REPEAT)
	328	if (state->display_position_interrupt_control & IRQ2CTRL_AUTOLOAD_REPEAT)
342	329	{
343	330	if (LOG_VIDEO_SYSTEM) logerror("AUTOLOAD_REPEAT ");
344	331	adjust_display_position_interrupt_timer(machine);
r6740	r6741
348	335
349	336	static TIMER_CALLBACK( display_position_vblank_callback )
350	337	{
351		if (display_position_interrupt_control & IRQ2CTRL_AUTOLOAD_VBLANK)
	338	neogeo_state *state = (neogeo_state *)machine->driver_data;
	339
	340	if (state->display_position_interrupt_control & IRQ2CTRL_AUTOLOAD_VBLANK)
352	341	{
353	342	if (LOG_VIDEO_SYSTEM) logerror("AUTOLOAD_VBLANK ");
354	343	adjust_display_position_interrupt_timer(machine);
355	344	}
356	345
357	346	/* set timer for next screen */
358		timer_adjust_oneshot(display_position_vblank_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VBSTART, NEOGEO_VBLANK_RELOAD_HPOS), 0);
	347	timer_adjust_oneshot(state->display_position_vblank_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VBSTART, NEOGEO_VBLANK_RELOAD_HPOS), 0);
359	348	}
360	349
361	350
362	351	static TIMER_CALLBACK( vblank_interrupt_callback )
363	352	{
364		const device_config *upd4990a = devtag_get_device(machine, "upd4990a");
	353	neogeo_state *state = (neogeo_state *)machine->driver_data;
365	354
366	355	if (LOG_VIDEO_SYSTEM) logerror("+++ VBLANK @ %d,%d\n", video_screen_get_vpos(machine->primary_screen), video_screen_get_hpos(machine->primary_screen));
367	356
368	357	/* add a timer tick to the pd4990a */
369		upd4990a_addretrace(upd4990a);
	358	upd4990a_addretrace(state->upd4990a);
370	359
371		vblank_interrupt_pending = 1;
	360	state->vblank_interrupt_pending = 1;
372	361
373	362	update_interrupts(machine);
374	363
375	364	/* set timer for next screen */
376		timer_adjust_oneshot(vblank_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VBSTART, 0), 0);
	365	timer_adjust_oneshot(state->vblank_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VBSTART, 0), 0);
377	366	}
378	367
379	368
380		static void create_interrupt_timers(running_machine *machine)
	369	static void create_interrupt_timers( running_machine *machine )
381	370	{
382		display_position_interrupt_timer = timer_alloc(machine, display_position_interrupt_callback, NULL);
383		display_position_vblank_timer = timer_alloc(machine, display_position_vblank_callback, NULL);
384		vblank_interrupt_timer = timer_alloc(machine, vblank_interrupt_callback, NULL);
	371	neogeo_state *state = (neogeo_state *)machine->driver_data;
	372	state->display_position_interrupt_timer = timer_alloc(machine, display_position_interrupt_callback, NULL);
	373	state->display_position_vblank_timer = timer_alloc(machine, display_position_vblank_callback, NULL);
	374	state->vblank_interrupt_timer = timer_alloc(machine, vblank_interrupt_callback, NULL);
385	375	}
386	376
387	377
388		static void start_interrupt_timers(running_machine *machine)
	378	static void start_interrupt_timers( running_machine *machine )
389	379	{
390		timer_adjust_oneshot(vblank_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VBSTART, 0), 0);
391		timer_adjust_oneshot(display_position_vblank_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VBSTART, NEOGEO_VBLANK_RELOAD_HPOS), 0);
	380	neogeo_state *state = (neogeo_state *)machine->driver_data;
	381	timer_adjust_oneshot(state->vblank_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VBSTART, 0), 0);
	382	timer_adjust_oneshot(state->display_position_vblank_timer, video_screen_get_time_until_pos(machine->primary_screen, NEOGEO_VBSTART, NEOGEO_VBLANK_RELOAD_HPOS), 0);
392	383	}
393	384
394	385
r6740	r6741
401	392
402	393	static void audio_cpu_irq(const device_config *device, int assert)
403	394	{
404		cputag_set_input_line(device->machine, "audiocpu", 0, assert ? ASSERT_LINE : CLEAR_LINE);
	395	neogeo_state *state = (neogeo_state *)device->machine->driver_data;
	396	cpu_set_input_line(state->audiocpu, 0, assert ? ASSERT_LINE : CLEAR_LINE);
405	397	}
406	398
407	399
408	400	static void audio_cpu_assert_nmi(running_machine *machine)
409	401	{
410		cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
	402	neogeo_state *state = (neogeo_state *)machine->driver_data;
	403	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, ASSERT_LINE);
411	404	}
412	405
413	406
414	407	static WRITE8_HANDLER( audio_cpu_clear_nmi_w )
415	408	{
416		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
	409	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	410	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, CLEAR_LINE);
417	411	}
418	412
419	413
r6740	r6741
424	418	*
425	419	*************************************/
426	420
427		static void select_controller(UINT8 data)
	421	static void select_controller( running_machine *machine, UINT8 data )
428	422	{
429		controller_select = data;
	423	neogeo_state *state = (neogeo_state *)machine->driver_data;
	424	state->controller_select = data;
430	425	}
431	426
432	427
433	428	static CUSTOM_INPUT( multiplexed_controller_r )
434	429	{
	430	neogeo_state *state = (neogeo_state *)field->port->machine->driver_data;
435	431	int port = (FPTR)param;
436	432
437	433	static const char *const cntrl[2][2] =
r6740	r6741
439	435	{ "IN0-0", "IN0-1" }, { "IN1-0", "IN1-1" }
440	436	};
441	437
442		return input_port_read_safe(field->port->machine, cntrl[port][controller_select & 0x01], 0x00);
	438	return input_port_read_safe(field->port->machine, cntrl[port][state->controller_select & 0x01], 0x00);
443	439	}
444	440
445	441
446	442	static CUSTOM_INPUT( mahjong_controller_r )
447	443	{
	444	neogeo_state *state = (neogeo_state *)field->port->machine->driver_data;
448	445	UINT32 ret;
449	446
450	447	/*
r6740	r6741
454	451	cpu #0 (PC=00C18D6C): unmapped memory word write to 00380000 = 0009 & 00FF
455	452	cpu #0 (PC=00C18C40): unmapped memory word write to 00380000 = 0000 & 00FF
456	453	*/
457		switch (controller_select)
	454	switch (state->controller_select)
458	455	{
459	456	default:
460	457	case 0x00: ret = 0x0000; break; /* nothing? */
r6740	r6741
470	467
471	468	static WRITE16_HANDLER( io_control_w )
472	469	{
473		const device_config *upd4990a = devtag_get_device(space->machine, "upd4990a");
474
	470	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
475	471	switch (offset)
476	472	{
477		case 0x00: select_controller(data & 0x00ff); break;
	473	case 0x00: select_controller(space->machine, data & 0x00ff); break;
478	474	case 0x18: set_output_latch(space->machine, data & 0x00ff); break;
479		case 0x20: set_output_data(data & 0x00ff); break;
480		case 0x28: upd4990a_control_16_w(upd4990a, 0, data, mem_mask); break;
	475	case 0x20: set_output_data(space->machine, data & 0x00ff); break;
	476	case 0x28: upd4990a_control_16_w(state->upd4990a, 0, data, mem_mask); break;
481	477	//  case 0x30: break; // coin counters
482	478	//  case 0x31: break; // coin counters
483	479	//  case 0x32: break; // coin lockout
r6740	r6741
499	495
500	496	READ16_HANDLER( neogeo_unmapped_r )
501	497	{
502		static UINT8 recurse = 0;
	498	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
503	499	UINT16 ret;
504	500
505	501	/* unmapped memory returns the last word on the data bus, which is almost always the opcode
506	502	of the next instruction due to prefetch */
507	503
508	504	/* prevent recursion */
509		if (recurse)
	505	if (state->recurse)
510	506	ret = 0xffff;
511	507	else
512	508	{
513		recurse = 1;
	509	state->recurse = 1;
514	510	ret = memory_read_word(space, cpu_get_pc(space->cpu));
515		recurse = 0;
	511	state->recurse = 0;
516	512	}
517	513
518	514	return ret;
r6740	r6741
528	524
529	525	static CUSTOM_INPUT( get_calendar_status )
530	526	{
531		const device_config *upd4990a = devtag_get_device(field->port->machine, "upd4990a");
532		return (upd4990a_databit_r(upd4990a, 0) << 1) | upd4990a_testbit_r(upd4990a, 0);
	527	neogeo_state *state = (neogeo_state *)field->port->machine->driver_data;
	528	return (upd4990a_databit_r(state->upd4990a, 0) << 1) | upd4990a_testbit_r(state->upd4990a, 0);
533	529	}
534	530
535	531
r6740	r6741
556	552	}
557	553
558	554
559		static void set_save_ram_unlock(UINT8 data)
	555	static void set_save_ram_unlock( running_machine *machine, UINT8 data )
560	556	{
561		save_ram_unlocked = data;
	557	neogeo_state *state = (neogeo_state *)machine->driver_data;
	558	state->save_ram_unlocked = data;
562	559	}
563	560
564	561
565	562	static WRITE16_HANDLER( save_ram_w )
566	563	{
567		if (save_ram_unlocked)
	564	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	565
	566	if (state->save_ram_unlocked)
568	567	COMBINE_DATA(&save_ram[offset]);
569	568	}
570	569
r6740	r6741
669	668
670	669	static WRITE8_HANDLER( audio_result_w )
671	670	{
672		if (LOG_CPU_COMM && (audio_result != data)) logerror(" AUD CPU PC   %04x: audio_result_w %02x\n", cpu_get_pc(space->cpu), data);
	671	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
673	672
674		audio_result = data;
	673	if (LOG_CPU_COMM && (state->audio_result != data)) logerror(" AUD CPU PC   %04x: audio_result_w %02x\n", cpu_get_pc(space->cpu), data);
	674
	675	state->audio_result = data;
675	676	}
676	677
677	678
678	679	static CUSTOM_INPUT( get_audio_result )
679	680	{
680		UINT32 ret = audio_result;
	681	neogeo_state *state = (neogeo_state *)field->port->machine->driver_data;
	682	UINT32 ret = state->audio_result;
681	683
682	684	//  if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_result_r %02x\n", cpu_get_pc(cputag_get_cpu(field->port->machine, "maincpu")), ret);
683	685
r6740	r6741
692	694	*
693	695	*************************************/
694	696
695		static void _set_main_cpu_vector_table_source(running_machine *machine)
	697	static void _set_main_cpu_vector_table_source( running_machine *machine )
696	698	{
697		memory_set_bank(machine, NEOGEO_BANK_VECTORS, main_cpu_vector_table_source);
	699	neogeo_state *state = (neogeo_state *)machine->driver_data;
	700	memory_set_bank(machine, NEOGEO_BANK_VECTORS, state->main_cpu_vector_table_source);
698	701	}
699	702
700	703
701		static void set_main_cpu_vector_table_source(running_machine *machine, UINT8 data)
	704	static void set_main_cpu_vector_table_source( running_machine *machine, UINT8 data )
702	705	{
703		main_cpu_vector_table_source = data;
	706	neogeo_state *state = (neogeo_state *)machine->driver_data;
	707	state->main_cpu_vector_table_source = data;
704	708
705	709	_set_main_cpu_vector_table_source(machine);
706	710	}
707	711
708	712
709		static void _set_main_cpu_bank_address(running_machine *machine)
	713	static void _set_main_cpu_bank_address( running_machine *machine )
710	714	{
711		memory_set_bankptr(machine, NEOGEO_BANK_CARTRIDGE, &memory_region(machine, "maincpu")[main_cpu_bank_address]);
	715	neogeo_state *state = (neogeo_state *)machine->driver_data;
	716	memory_set_bankptr(machine, NEOGEO_BANK_CARTRIDGE, &memory_region(machine, "maincpu")[state->main_cpu_bank_address]);
712	717	}
713	718
714	719
715		void neogeo_set_main_cpu_bank_address(const address_space *space, UINT32 bank_address)
	720	void neogeo_set_main_cpu_bank_address( const address_space *space, UINT32 bank_address )
716	721	{
	722	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	723
717	724	if (LOG_MAIN_CPU_BANKING) logerror("MAIN CPU PC %06x: neogeo_set_main_cpu_bank_address %06x\n", cpu_get_pc(space->cpu), bank_address);
718	725
719		main_cpu_bank_address = bank_address;
	726	state->main_cpu_bank_address = bank_address;
720	727
721	728	_set_main_cpu_bank_address(space->machine);
722	729	}
r6740	r6741
744	751	}
745	752
746	753
747		static void main_cpu_banking_init(running_machine *machine)
	754	static void main_cpu_banking_init( running_machine *machine )
748	755	{
749	756	const address_space *mainspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
750	757
r6740	r6741
767	774	*
768	775	*************************************/
769	776
770		static void set_audio_cpu_banking(running_machine *machine)
	777	static void set_audio_cpu_banking( running_machine *machine )
771	778	{
	779	neogeo_state *state = (neogeo_state *)machine->driver_data;
772	780	int region;
773	781
774	782	for (region = 0; region < 4; region++)
775		memory_set_bank(machine, NEOGEO_BANK_AUDIO_CPU_CART_BANK + region, audio_cpu_banks[region]);
	783	memory_set_bank(machine, NEOGEO_BANK_AUDIO_CPU_CART_BANK + region, state->audio_cpu_banks[region]);
776	784	}
777	785
778	786
779		static void audio_cpu_bank_select(const address_space *space, int region, UINT8 bank)
	787	static void audio_cpu_bank_select( const address_space *space, int region, UINT8 bank )
780	788	{
	789	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	790
781	791	if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", cpu_get_pc(space->cpu), region, bank);
782	792
783		audio_cpu_banks[region] = bank;
	793	state->audio_cpu_banks[region] = bank;
784	794
785	795	set_audio_cpu_banking(space->machine);
786	796	}
r6740	r6741
818	828	}
819	829
820	830
821		static void _set_audio_cpu_rom_source(const address_space *space)
	831	static void _set_audio_cpu_rom_source( const address_space *space )
822	832	{
	833	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	834
823	835	/*  if (!memory_region(machine, "audiobios"))   */
824		audio_cpu_rom_source = 1;
	836	state->audio_cpu_rom_source = 1;
825	837
826		memory_set_bank(space->machine, NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, audio_cpu_rom_source);
	838	memory_set_bank(space->machine, NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, state->audio_cpu_rom_source);
827	839
828	840	/* reset CPU if the source changed -- this is a guess */
829		if (audio_cpu_rom_source != audio_cpu_rom_source_last)
	841	if (state->audio_cpu_rom_source != state->audio_cpu_rom_source_last)
830	842	{
831		audio_cpu_rom_source_last = audio_cpu_rom_source;
	843	state->audio_cpu_rom_source_last = state->audio_cpu_rom_source;
832	844
833	845	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
834	846
835		if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", cpu_get_pc(space->cpu), audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
	847	if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", cpu_get_pc(space->cpu), state->audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
836	848	}
837	849	}
838	850
839	851
840		static void set_audio_cpu_rom_source(const address_space *space, UINT8 data)
	852	static void set_audio_cpu_rom_source( const address_space *space, UINT8 data )
841	853	{
842		audio_cpu_rom_source = data;
	854	neogeo_state *state = (neogeo_state *)space->machine->driver_data;
	855	state->audio_cpu_rom_source = data;
843	856
844	857	_set_audio_cpu_rom_source(space);
845	858	}
846	859
847	860
848		static void audio_cpu_banking_init(running_machine *machine)
	861	static void audio_cpu_banking_init( running_machine *machine )
849	862	{
	863	neogeo_state *state = (neogeo_state *)machine->driver_data;
850	864	int region;
851	865	int bank;
852	866	UINT8 *rgn;
r6740	r6741
872	886
873	887	/* set initial audio banks --
874	888	how does this really work, or is it even neccessary? */
875		audio_cpu_banks[0] = 0x1e;
876		audio_cpu_banks[1] = 0x0e;
877		audio_cpu_banks[2] = 0x06;
878		audio_cpu_banks[3] = 0x02;
	889	state->audio_cpu_banks[0] = 0x1e;
	890	state->audio_cpu_banks[1] = 0x0e;
	891	state->audio_cpu_banks[2] = 0x06;
	892	state->audio_cpu_banks[3] = 0x02;
879	893
880	894	set_audio_cpu_banking(machine);
881	895
882		audio_cpu_rom_source_last = 0;
	896	state->audio_cpu_rom_source_last = 0;
883	897	set_audio_cpu_rom_source(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0);
884	898	}
885	899
r6740	r6741
904	918	case 0x01: set_main_cpu_vector_table_source(space->machine, bit);
905	919	set_audio_cpu_rom_source(space, bit); /* this is a guess */
906	920	break;
907		case 0x05: neogeo_set_fixed_layer_source(bit); break;
908		case 0x06: set_save_ram_unlock(bit); break;
	921	case 0x05: neogeo_set_fixed_layer_source(space->machine, bit); break;
	922	case 0x06: set_save_ram_unlock(space->machine, bit); break;
909	923	case 0x07: neogeo_set_palette_bank(space->machine, bit); break;
910	924
911	925	case 0x02: /* unknown - HC32 middle pin 1 */
r6740	r6741
972	986	*
973	987	*************************************/
974	988
975		static void set_outputs(void)
	989	static void set_outputs( running_machine *machine )
976	990	{
	991	neogeo_state *state = (neogeo_state *)machine->driver_data;
977	992	static const UINT8 led_map[0x10] =
978	993	{ 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0x58,0x4c,0x62,0x69,0x78,0x00 };
979	994
980	995	/* EL */
981		output_set_digit_value(0, led_map[el_value]);
	996	output_set_digit_value(0, led_map[state->el_value]);
982	997
983	998	/* LED1 */
984		output_set_digit_value(1, led_map[led1_value >> 4]);
985		output_set_digit_value(2, led_map[led1_value & 0x0f]);
	999	output_set_digit_value(1, led_map[state->led1_value >> 4]);
	1000	output_set_digit_value(2, led_map[state->led1_value & 0x0f]);
986	1001
987	1002	/* LED2 */
988		output_set_digit_value(3, led_map[led2_value >> 4]);
989		output_set_digit_value(4, led_map[led2_value & 0x0f]);
	1003	output_set_digit_value(3, led_map[state->led2_value >> 4]);
	1004	output_set_digit_value(4, led_map[state->led2_value & 0x0f]);
990	1005	}
991	1006
992	1007
993		static void set_output_latch(running_machine *machine, UINT8 data)
	1008	static void set_output_latch( running_machine *machine, UINT8 data )
994	1009	{
	1010	neogeo_state *state = (neogeo_state *)machine->driver_data;
	1011
995	1012	/* looks like the LEDs are set on the
996	1013	falling edge */
997		UINT8 falling_bits = output_latch & ~data;
	1014	UINT8 falling_bits = state->output_latch & ~data;
998	1015
999		if (falling_bits & 0x08)
1000		el_value = 16 - (output_data & 0x0f);
	1016	if (falling_bits & 0x08)
	1017	state->el_value = 16 - (state->output_data & 0x0f);
1001	1018
1002		if (falling_bits & 0x10)
1003		led1_value = ~output_data;
	1019	if (falling_bits & 0x10)
	1020	state->led1_value = ~state->output_data;
1004	1021
1005		if (falling_bits & 0x20)
1006		led2_value = ~output_data;
	1022	if (falling_bits & 0x20)
	1023	state->led2_value = ~state->output_data;
1007	1024
1008	1025	if (falling_bits & 0xc7)
1009	1026	logerror("%s  Unmaped LED write.  Data: %x\n", cpuexec_describe_context(machine), falling_bits);
1010	1027
1011		output_latch = data;
	1028	state->output_latch = data;
1012	1029
1013		set_outputs();
	1030	set_outputs(machine);
1014	1031	}
1015	1032
1016	1033
1017		static void set_output_data(UINT8 data)
	1034	static void set_output_data( running_machine *machine, UINT8 data )
1018	1035	{
1019		output_data = data;
	1036	neogeo_state *state = (neogeo_state *)machine->driver_data;
	1037	state->output_data = data;
1020	1038	}
1021	1039
1022	1040
r6740	r6741
1033	1051	_set_main_cpu_vector_table_source(machine);
1034	1052	set_audio_cpu_banking(machine);
1035	1053	_set_audio_cpu_rom_source(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM));
1036		set_outputs();
	1054	set_outputs(machine);
1037	1055	}
1038	1056
1039	1057	static MACHINE_START( neogeo )
1040	1058	{
	1059	neogeo_state *state = (neogeo_state *)machine->driver_data;
	1060
1041	1061	/* set the BIOS bank */
1042	1062	memory_set_bankptr(machine, NEOGEO_BANK_BIOS, memory_region(machine, "mainbios"));
1043	1063
r6740	r6741
1053	1073	memcard_data = auto_alloc_array_clear(machine, UINT8, MEMCARD_SIZE);
1054	1074
1055	1075	/* start with an IRQ3 - but NOT on a reset */
1056		irq3_pending = 1;
	1076	state->irq3_pending = 1;
1057	1077
	1078	/* get devices */
	1079	state->maincpu = devtag_get_device(machine, "maincpu");
	1080	state->audiocpu = devtag_get_device(machine, "audiocpu");
	1081	state->upd4990a = devtag_get_device(machine, "upd4990a");
	1082
1058	1083	/* register state save */
1059		state_save_register_global(machine, display_position_interrupt_control);
1060		state_save_register_global(machine, display_counter);
1061		state_save_register_global(machine, vblank_interrupt_pending);
1062		state_save_register_global(machine, display_position_interrupt_pending);
1063		state_save_register_global(machine, irq3_pending);
1064		state_save_register_global(machine, audio_result);
1065		state_save_register_global(machine, controller_select);
1066		state_save_register_global(machine, main_cpu_bank_address);
1067		state_save_register_global(machine, main_cpu_vector_table_source);
1068		state_save_register_global_array(machine, audio_cpu_banks);
1069		state_save_register_global(machine, audio_cpu_rom_source);
1070		state_save_register_global(machine, audio_cpu_rom_source_last);
1071		state_save_register_global(machine, save_ram_unlocked);
	1084	state_save_register_global(machine, state->display_position_interrupt_control);
	1085	state_save_register_global(machine, state->display_counter);
	1086	state_save_register_global(machine, state->vblank_interrupt_pending);
	1087	state_save_register_global(machine, state->display_position_interrupt_pending);
	1088	state_save_register_global(machine, state->irq3_pending);
	1089	state_save_register_global(machine, state->audio_result);
	1090	state_save_register_global(machine, state->controller_select);
	1091	state_save_register_global(machine, state->main_cpu_bank_address);
	1092	state_save_register_global(machine, state->main_cpu_vector_table_source);
	1093	state_save_register_global_array(machine, state->audio_cpu_banks);
	1094	state_save_register_global(machine, state->audio_cpu_rom_source);
	1095	state_save_register_global(machine, state->audio_cpu_rom_source_last);
	1096	state_save_register_global(machine, state->save_ram_unlocked);
1072	1097	state_save_register_global_pointer(machine, memcard_data, 0x800);
1073		state_save_register_global(machine, output_data);
1074		state_save_register_global(machine, output_latch);
1075		state_save_register_global(machine, el_value);
1076		state_save_register_global(machine, led1_value);
1077		state_save_register_global(machine, led2_value);
	1098	state_save_register_global(machine, state->output_data);
	1099	state_save_register_global(machine, state->output_latch);
	1100	state_save_register_global(machine, state->el_value);
	1101	state_save_register_global(machine, state->led1_value);
	1102	state_save_register_global(machine, state->led2_value);
	1103	state_save_register_global(machine, state->recurse);
1078	1104
1079	1105	state_save_register_postload(machine, neogeo_postload, NULL);
1080	1106	}
r6740	r6741
1089	1115
1090	1116	static MACHINE_RESET( neogeo )
1091	1117	{
	1118	neogeo_state *state = (neogeo_state *)machine->driver_data;
1092	1119	offs_t offs;
1093	1120	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1094	1121
1095	1122	/* reset system control registers */
1096	1123	for (offs = 0; offs < 8; offs++)
1097	1124	system_control_w(space, offs, 0, 0x00ff);
	1125
1098	1126	device_reset(cputag_get_cpu(machine, "maincpu"));
1099	1127
1100		neogeo_reset_rng();
	1128	neogeo_reset_rng(machine);
1101	1129
1102	1130	start_interrupt_timers(machine);
1103	1131
1104	1132	/* trigger the IRQ3 that was set by MACHINE_START */
1105	1133	update_interrupts(machine);
	1134
	1135	state->recurse = 0;
1106	1136	}
1107	1137
1108	1138
r6740	r6741
1309	1339
1310	1340	static MACHINE_DRIVER_START( neogeo )
1311	1341
	1342	/* driver data */
	1343	MDRV_DRIVER_DATA(neogeo_state)
	1344
1312	1345	/* basic machine hardware */
1313	1346	MDRV_CPU_ADD("maincpu", M68000, NEOGEO_MAIN_CPU_CLOCK)
1314	1347	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
1356	1389
1357	1390	static DRIVER_INIT( neogeo )
1358	1391	{
	1392	neogeo_state *state = (neogeo_state *)machine->driver_data;
	1393	state->fixed_layer_bank_type = 0;
1359	1394	}
1360	1395
1361	1396

src/mame/drivers/segahang.c

r6740	r6741
17	17	#include "cpu/z80/z80.h"
18	18	#include "cpu/mcs51/mcs51.h"
19	19	#include "deprecat.h"
20		#include "system16.h"
	20	#include "includes/system16.h"
21	21	#include "machine/segaic16.h"
22	22	#include "machine/fd1089.h"
23	23	#include "machine/8255ppi.h"

src/mame/drivers/carrera.c

r6740	r6741
38	38	There is also a 'Bomberman' title in the GFX roms, unused from what I can see.
39	39
40	40	TODO:
41		- Needs a reference for the colors.
	41	- Are colors 100% correct? Needs a reference to be sure.
42	42	- There are reel gfxs on the roms (near the end), left-over or there's a way to enable it?
	43	Update: if you trigger a normal irq 0 instead of a NMI the game will change into a proper 8 liner game without inputs. Investigate on it...
43	44
44	45	*/
45	46
r6740	r6741
274	275	static PALETTE_INIT(carrera)
275	276	{
276	277	int br_bit0, br_bit1, bit0, bit1, r, g, b;
277		int i;
	278	int   i;
278	279
279		for (i = 0; i < 0x20; ++i)
	280	for (i = 0; i < 0x40; ++i)
280	281	{
281		br_bit0 = (color_prom[0] >> 0) & 0x01;
282		br_bit1 = (color_prom[0] >> 1) & 0x01;
	282	br_bit0 = (color_prom[0] >> 6) & 0x01;
	283	br_bit1 = (color_prom[0] >> 7) & 0x01;
283	284
284		bit0 = (color_prom[0] >> 2) & 0x01;
	285	bit0 = (color_prom[0] >> 0) & 0x01;
285	286	bit1 = (color_prom[0] >> 3) & 0x01;
286	287	b = 0x0e * br_bit0 + 0x1f * br_bit1 + 0x43 * bit0 + 0x8f * bit1;
287		bit0 = (color_prom[0] >> 4) & 0x01;
	288	bit0 = (color_prom[0] >> 1) & 0x01;
	289	bit1 = (color_prom[0] >> 4) & 0x01;
	290	g = 0x0e * br_bit0 + 0x1f * br_bit1 + 0x43 * bit0 + 0x8f * bit1;
	291	bit0 = (color_prom[0] >> 2) & 0x01;
288	292	bit1 = (color_prom[0] >> 5) & 0x01;
289		g = 0x0e * br_bit0 + 0x1f * br_bit1 + 0x43 * bit0 + 0x8f * bit1;
290		bit0 = (color_prom[0] >> 6) & 0x01;
291		bit1 = (color_prom[0] >> 7) & 0x01;
292	293	r = 0x0e * br_bit0 + 0x1f * br_bit1 + 0x43 * bit0 + 0x8f * bit1;
293	294
294	295	palette_set_color(machine, i, MAKE_RGB(r, g, b));
r6740	r6741
360	361	ROM_END
361	362
362	363
363		GAME( 19??, carrera, 0, carrera, carrera,0, ROT0, "BS Electronics", "Carrera (Version 6.7)", GAME_WRONG_COLORS )
	364	GAME( 19??, carrera, 0, carrera, carrera,0, ROT0, "BS Electronics", "Carrera (Version 6.7)", 0 )
364	365

src/mame/drivers/ultraman.c

r6740	r6741
12	12	#include "driver.h"
13	13	#include "cpu/z80/z80.h"
14	14	#include "cpu/m68000/m68000.h"
15		#include "video/konamiic.h"
	15	#include "video/konicdev.h"
16	16	#include "sound/2151intf.h"
17	17	#include "sound/okim6295.h"
18	18
r6740	r6741
22	22	VIDEO_START( ultraman );
23	23	VIDEO_UPDATE( ultraman );
24	24
	25	extern void ultraman_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
	26	extern void ultraman_zoom_callback_0(running_machine *machine, int *code,int *color,int *flags);
	27	extern void ultraman_zoom_callback_1(running_machine *machine, int *code,int *color,int *flags);
	28	extern void ultraman_zoom_callback_2(running_machine *machine, int *code,int *color,int *flags);
25	29
26	30
27		static READ16_HANDLER( ultraman_K051937_r )
28		{
29		return K051937_r(space, offset);
30		}
31
32		static READ16_HANDLER( ultraman_K051960_r )
33		{
34		return K051960_r(space, offset);
35		}
36
37		static READ16_HANDLER( ultraman_K051316_0_r )
38		{
39		return K051316_0_r(space, offset);
40		}
41
42		static READ16_HANDLER( ultraman_K051316_1_r )
43		{
44		return K051316_1_r(space, offset);
45		}
46
47		static READ16_HANDLER( ultraman_K051316_2_r )
48		{
49		return K051316_2_r(space, offset);
50		}
51
52		static WRITE16_HANDLER( ultraman_K051316_0_w )
53		{
54		if (ACCESSING_BITS_0_7)
55		K051316_0_w(space, offset, data & 0xff);
56		}
57
58		static WRITE16_HANDLER( ultraman_K051316_1_w )
59		{
60		if (ACCESSING_BITS_0_7)
61		K051316_1_w(space, offset, data & 0xff);
62		}
63
64		static WRITE16_HANDLER( ultraman_K051316_2_w )
65		{
66		if (ACCESSING_BITS_0_7)
67		K051316_2_w(space, offset, data & 0xff);
68		}
69
70		static WRITE16_HANDLER( ultraman_K051316_ctrl_0_w )
71		{
72		if (ACCESSING_BITS_0_7)
73		K051316_ctrl_0_w(space, offset, data & 0xff);
74		}
75
76		static WRITE16_HANDLER( ultraman_K051316_ctrl_1_w )
77		{
78		if (ACCESSING_BITS_0_7)
79		K051316_ctrl_1_w(space, offset, data & 0xff);
80
81		}
82
83		static WRITE16_HANDLER( ultraman_K051316_ctrl_2_w )
84		{
85		if (ACCESSING_BITS_0_7)
86		K051316_ctrl_2_w(space, offset, data & 0xff);
87		}
88
89		static WRITE16_HANDLER( ultraman_K051937_w )
90		{
91		if (ACCESSING_BITS_0_7)
92		K051937_w(space, offset, data & 0xff);
93		}
94
95		static WRITE16_HANDLER( ultraman_K051960_w )
96		{
97		if (ACCESSING_BITS_0_7)
98		K051960_w(space, offset, data & 0xff);
99		}
100
101	31	static WRITE16_HANDLER( sound_cmd_w )
102	32	{
103	33	if (ACCESSING_BITS_0_7)
r6740	r6741
111	41	}
112	42
113	43
114
115	44	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
116	45	AM_RANGE(0x000000, 0x03ffff) AM_ROM
117	46	AM_RANGE(0x080000, 0x08ffff) AM_RAM
r6740	r6741
125	54	AM_RANGE(0x1c0020, 0x1c0021) AM_WRITE(sound_cmd_w)
126	55	AM_RANGE(0x1c0028, 0x1c0029) AM_WRITE(sound_irq_trigger_w)
127	56	AM_RANGE(0x1c0030, 0x1c0031) AM_WRITE(watchdog_reset16_w)
128		AM_RANGE(0x204000, 0x204fff) AM_READWRITE(ultraman_K051316_0_r, ultraman_K051316_0_w)   /* K051316 #0 RAM */
129		AM_RANGE(0x205000, 0x205fff) AM_READWRITE(ultraman_K051316_1_r, ultraman_K051316_1_w)   /* K051316 #1 RAM */
130		AM_RANGE(0x206000, 0x206fff) AM_READWRITE(ultraman_K051316_2_r, ultraman_K051316_2_w)   /* K051316 #2 RAM */
131		AM_RANGE(0x207f80, 0x207f9f) AM_WRITE(ultraman_K051316_ctrl_0_w   )   /* K051316 #0 registers */
132		AM_RANGE(0x207fa0, 0x207fbf) AM_WRITE(ultraman_K051316_ctrl_1_w   )   /* K051316 #1 registers */
133		AM_RANGE(0x207fc0, 0x207fdf) AM_WRITE(ultraman_K051316_ctrl_2_w   )   /* K051316 #2 registers */
134		AM_RANGE(0x304000, 0x30400f) AM_READWRITE(ultraman_K051937_r, ultraman_K051937_w)      /* Sprite control */
135		AM_RANGE(0x304800, 0x304fff) AM_READWRITE(ultraman_K051960_r, ultraman_K051960_w)      /* Sprite RAM */
	57	AM_RANGE(0x204000, 0x204fff) AM_DEVREADWRITE8("k051316_1", k051316_r, k051316_w, 0x00ff)   /* K051316 #0 RAM */
	58	AM_RANGE(0x205000, 0x205fff) AM_DEVREADWRITE8("k051316_2", k051316_r, k051316_w, 0x00ff)   /* K051316 #1 RAM */
	59	AM_RANGE(0x206000, 0x206fff) AM_DEVREADWRITE8("k051316_3", k051316_r, k051316_w, 0x00ff)   /* K051316 #2 RAM */
	60	AM_RANGE(0x207f80, 0x207f9f) AM_DEVWRITE8("k051316_1", k051316_ctrl_w, 0x00ff)   /* K051316 #0 registers */
	61	AM_RANGE(0x207fa0, 0x207fbf) AM_DEVWRITE8("k051316_2", k051316_ctrl_w, 0x00ff)   /* K051316 #1 registers */
	62	AM_RANGE(0x207fc0, 0x207fdf) AM_DEVWRITE8("k051316_3", k051316_ctrl_w, 0x00ff)   /* K051316 #2 registers */
	63	AM_RANGE(0x304000, 0x30400f) AM_DEVREADWRITE8("k051960", k051937_r, k051937_w, 0x00ff)      /* Sprite control */
	64	AM_RANGE(0x304800, 0x304fff) AM_DEVREADWRITE8("k051960", k051960_r, k051960_w, 0x00ff)      /* Sprite RAM */
136	65	ADDRESS_MAP_END
137	66
138	67	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
239	168	INPUT_PORTS_END
240	169
241	170
	171	static const k051960_interface ultraman_k051960_intf =
	172	{
	173	"gfx1", 0,
	174	NORMAL_PLANE_ORDER,
	175	KONAMI_ROM_DEINTERLEAVE_2,
	176	ultraman_sprite_callback
	177	};
242	178
	179	static const k051316_interface ultraman_k051316_intf_0 =
	180	{
	181	"gfx2", 1,
	182	4, FALSE, 0,
	183	0, 8, 0,
	184	ultraman_zoom_callback_0
	185	};
243	186
	187	static const k051316_interface ultraman_k051316_intf_1 =
	188	{
	189	"gfx3", 2,
	190	4, FALSE, 0,
	191	0, 8, 0,
	192	ultraman_zoom_callback_1
	193	};
	194
	195	static const k051316_interface ultraman_k051316_intf_2 =
	196	{
	197	"gfx4", 3,
	198	4, TRUE, 0,
	199	0, 8, 0,
	200	ultraman_zoom_callback_2
	201	};
	202
244	203	static MACHINE_DRIVER_START( ultraman )
245	204
246	205	/* basic machine hardware */
r6740	r6741
269	228	MDRV_VIDEO_START(ultraman)
270	229	MDRV_VIDEO_UPDATE(ultraman)
271	230
	231	MDRV_K051960_ADD("k051960", ultraman_k051960_intf)
	232	MDRV_K051316_ADD("k051316_1", ultraman_k051316_intf_0)
	233	MDRV_K051316_ADD("k051316_2", ultraman_k051316_intf_1)
	234	MDRV_K051316_ADD("k051316_3", ultraman_k051316_intf_2)
	235
272	236	/* sound hardware */
273	237	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
274	238
r6740	r6741
322	286	ROM_END
323	287
324	288
325
326		static DRIVER_INIT( ultraman )
327		{
328		konami_rom_deinterleave_2(machine, "gfx1");
329		}
330
331
332		GAME( 1991, ultraman, 0, ultraman, ultraman, ultraman, ROT0, "Banpresto/Bandai", "Ultraman (Japan)", 0 )
	289	GAME( 1991, ultraman, 0, ultraman, ultraman, 0, ROT0, "Banpresto/Bandai", "Ultraman (Japan)", 0 )

src/mame/drivers/blueprnt.c

r6740	r6741
56	56	#include "deprecat.h"
57	57	#include "cpu/z80/z80.h"
58	58	#include "sound/ay8910.h"
59		#include "blueprnt.h"
	59	#include "includes/blueprnt.h"
60	60
61	61	/*************************************
62	62	*

src/mame/drivers/taito_f2.c

r6740	r6741
294	294
295	295	#include "driver.h"
296	296	#include "cpu/z80/z80.h"
297		#include "taitoipt.h"
	297	#include "includes/taitoipt.h"
298	298	#include "cpu/m68000/m68000.h"
299	299	#include "video/taitoic.h"
300	300	#include "audio/taitosnd.h"
301		#include "taito_f2.h"
	301	#include "includes/taito_f2.h"
302	302	#include "sound/2203intf.h"
303	303	#include "sound/2610intf.h"
304	304	#include "sound/okim6295.h"

src/mame/drivers/pandoras.c

r6740	r6741
27	27	#include "cpu/mcs48/mcs48.h"
28	28	#include "sound/ay8910.h"
29	29	#include "sound/dac.h"
30		#include "konamipt.h"
31		#include "pandoras.h"
	30	#include "includes/konamipt.h"
	31	#include "includes/pandoras.h"
32	32
33	33
34	34	#define MASTER_CLOCK      XTAL_18_432MHz
	35	#define SOUND_CLOCK         XTAL_14_31818MHz
35	36
36	37
37	38	static INTERRUPT_GEN( pandoras_master_interrupt )
r6740	r6741
362	363	MDRV_CPU_PROGRAM_MAP(pandoras_slave_map)
363	364	MDRV_CPU_VBLANK_INT("screen", pandoras_slave_interrupt)
364	365
365		MDRV_CPU_ADD("audiocpu", Z80, MASTER_CLOCK/8)
	366	MDRV_CPU_ADD("audiocpu", Z80, SOUND_CLOCK/8)
366	367	MDRV_CPU_PROGRAM_MAP(pandoras_sound_map)
367	368
368		MDRV_CPU_ADD("mcu", I8039, MASTER_CLOCK/2)
	369	MDRV_CPU_ADD("mcu", I8039, SOUND_CLOCK/2)
369	370	MDRV_CPU_PROGRAM_MAP(pandoras_i8039_map)
370	371	MDRV_CPU_IO_MAP(pandoras_i8039_io_map)
371	372
r6740	r6741
392	393	/* sound hardware */
393	394	MDRV_SPEAKER_STANDARD_MONO("mono")
394	395
395		MDRV_SOUND_ADD("aysnd", AY8910, MASTER_CLOCK/8)
	396	MDRV_SOUND_ADD("aysnd", AY8910, SOUND_CLOCK/8)
396	397	MDRV_SOUND_CONFIG(ay8910_config)
397	398	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
398	399

src/mame/drivers/gottlieb.c

r6740	r6741
202	202	#include "sound/samples.h"
203	203	#include "sound/sp0250.h"
204	204	#include "streams.h"
205		#include "gottlieb.h"
	205	#include "includes/gottlieb.h"
206	206
207	207
208	208	#define LOG_AUDIO_DECODE   (0)

src/mame/drivers/ddragon.c

r6740	r6741
77	77	#include "sound/2151intf.h"
78	78	#include "sound/okim6295.h"
79	79	#include "sound/msm5205.h"
80		#include "ddragon.h"
	80	#include "includes/ddragon.h"
81	81
82	82
83	83	#define MAIN_CLOCK      XTAL_12MHz

src/mame/drivers/asterix.c

r6740	r6741
11	11
12	12	#include "driver.h"
13	13	#include "cpu/m68000/m68000.h"
14		#include "video/konamiic.h"
15	14	#include "cpu/z80/z80.h"
16		#include "machine/eeprom.h"
	15	#include "machine/eepromdev.h"
17	16	#include "sound/2151intf.h"
18	17	#include "sound/k053260.h"
19		#include "konamipt.h"
	18	#include "video/konicdev.h"
	19	#include "includes/konamipt.h"
20	20
21		VIDEO_START( asterix );
22	21	VIDEO_UPDATE( asterix );
23	22	WRITE16_HANDLER( asterix_spritebank_w );
24	23
	24	extern void asterix_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags);
	25	extern void asterix_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask);
	26
25	27	static UINT8 cur_control2;
26		static int init_eeprom_count;
27	28
28	29	static const eeprom_interface eeprom_intf =
29	30	{
r6740	r6741
36	37	"1100110000000" /* unlock command */
37	38	};
38	39
39		static NVRAM_HANDLER( asterix )
40		{
41		if (read_or_write)
42		eeprom_save(file);
43		else
44		{
45		eeprom_init(machine, &eeprom_intf);
46
47		if (file)
48		{
49		init_eeprom_count = 0;
50		eeprom_load(file);
51		}
52		else
53		init_eeprom_count = 10;
54		}
55		}
56
57		static READ16_HANDLER( control1_r )
58		{
59		int res;
60
61		/* bit 8  is EEPROM data */
62		/* bit 9  is EEPROM ready */
63		/* bit 10 is service button */
64		res = input_port_read(space->machine, "IN1");
65
66		if (init_eeprom_count)
67		{
68		init_eeprom_count--;
69		res &= 0xfbff;
70		}
71
72		return res;
73		}
74
75
76
77	40	#if 0
78	41	static READ16_HANDLER( control2_r )
79	42	{
r6740	r6741
83	46
84	47	static WRITE16_HANDLER( control2_w )
85	48	{
	49	const device_config *k056832 = devtag_get_device(space->machine, "k056832");
	50
86	51	if (ACCESSING_BITS_0_7)
87	52	{
88	53	cur_control2 = data;
89	54	/* bit 0 is data */
90	55	/* bit 1 is cs (active low) */
91	56	/* bit 2 is clock (active high) */
	57	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
92	58
93		eeprom_write_bit(data & 0x01);
94		eeprom_set_cs_line((data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
95		eeprom_set_clock_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
96
97	59	/* bit 5 is select tile bank */
98		K056832_set_tile_bank((data & 0x20) >> 5);
	60	k056832_set_tile_bank(k056832, (data & 0x20) >> 5);
99	61	}
100	62	}
101	63
102	64	static INTERRUPT_GEN( asterix_interrupt )
103	65	{
	66	const device_config *k056832 = devtag_get_device(device->machine, "k056832");
	67
104	68	// global interrupt masking
105		if (!K056832_is_IRQ_enabled(0)) return;
	69	if (!k056832_is_irq_enabled(k056832, 0)) return;
106	70
107	71	cpu_set_input_line(device, 5, HOLD_LINE); /* ??? All irqs have the same vector, and the
108	72	mask used is 0 or 7 */
r6740	r6741
179	143	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
180	144	AM_RANGE(0x000000, 0x0fffff) AM_ROM
181	145	AM_RANGE(0x100000, 0x107fff) AM_RAM
182		AM_RANGE(0x180000, 0x1807ff) AM_READWRITE(K053245_word_r, K053245_word_w)
	146	AM_RANGE(0x180000, 0x1807ff) AM_DEVREADWRITE("k053244", k053245_word_r, k053245_word_w)
183	147	AM_RANGE(0x180800, 0x180fff) AM_RAM                        // extra RAM, or mirror for the above?
184		AM_RANGE(0x200000, 0x20000f) AM_READWRITE(K053244_word_r, K053244_word_w)
	148	AM_RANGE(0x200000, 0x20000f) AM_DEVREADWRITE("k053244", k053244_word_r, k053244_word_w)
185	149	AM_RANGE(0x280000, 0x280fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
186		AM_RANGE(0x300000, 0x30001f) AM_READWRITE(K053244_lsb_r, K053244_lsb_w)
	150	AM_RANGE(0x300000, 0x30001f) AM_DEVREADWRITE("k053244", k053244_lsb_r, k053244_lsb_w)
187	151	AM_RANGE(0x380000, 0x380001) AM_READ_PORT("IN0")
188		AM_RANGE(0x380002, 0x380003) AM_READ(control1_r)
	152	AM_RANGE(0x380002, 0x380003) AM_READ_PORT("IN1")
189	153	AM_RANGE(0x380100, 0x380101) AM_WRITE(control2_w)
190	154	AM_RANGE(0x380200, 0x380203) AM_DEVREADWRITE8("konami", asterix_sound_r, k053260_w, 0x00ff)
191	155	AM_RANGE(0x380300, 0x380301) AM_WRITE(sound_irq_w)
192	156	AM_RANGE(0x380400, 0x380401) AM_WRITE(asterix_spritebank_w)
193		AM_RANGE(0x380500, 0x38051f) AM_WRITE(K053251_lsb_w)
	157	AM_RANGE(0x380500, 0x38051f) AM_DEVWRITE("k053251", k053251_lsb_w)
194	158	AM_RANGE(0x380600, 0x380601) AM_NOP                        // Watchdog
195		AM_RANGE(0x380700, 0x380707) AM_WRITE(K056832_b_word_w)
	159	AM_RANGE(0x380700, 0x380707) AM_DEVWRITE("k056832", k056832_b_word_w)
196	160	AM_RANGE(0x380800, 0x380803) AM_WRITE(protection_w)
197		AM_RANGE(0x400000, 0x400fff) AM_READWRITE(K056832_ram_half_word_r, K056832_ram_half_word_w)
198		AM_RANGE(0x420000, 0x421fff) AM_READ(K056832_old_rom_word_r)   // Passthrough to tile roms
199		AM_RANGE(0x440000, 0x44003f) AM_WRITE(K056832_word_w)
	161	AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("k056832", k056832_ram_half_word_r, k056832_ram_half_word_w)
	162	AM_RANGE(0x420000, 0x421fff) AM_DEVREAD("k056832", k056832_old_rom_word_r)   // Passthrough to tile roms
	163	AM_RANGE(0x440000, 0x44003f) AM_DEVWRITE("k056832", k056832_word_w)
200	164	ADDRESS_MAP_END
201	165
202	166	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
220	184
221	185	PORT_START("IN1")
222	186	KONAMI16_LSB(2, IPT_UNKNOWN, IPT_START2)
223		PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   // EEPROM data
	187	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
224	188	PORT_BIT( 0x0200, IP_ACTIVE_LOW,  IPT_UNUSED )   // EEPROM ready (always 1)
225	189	PORT_SERVICE_NO_TOGGLE(0x0400, IP_ACTIVE_LOW )
226	190	PORT_BIT( 0xf800, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	191
	192	PORT_START( "EEPROMOUT" )
	193	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	194	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	195	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
227	196	INPUT_PORTS_END
228	197
	198
	199	static const k056832_interface asterix_k056832_intf =
	200	{
	201	"gfx1", 0,
	202	K056832_BPP_4,
	203	1, 1,
	204	KONAMI_ROM_DEINTERLEAVE_2,
	205	asterix_tile_callback, "none"
	206	};
	207
	208	static const k05324x_interface asterix_k05324x_intf =
	209	{
	210	"gfx2", 1,
	211	NORMAL_PLANE_ORDER,
	212	-3, -1,
	213	KONAMI_ROM_DEINTERLEAVE_2,
	214	asterix_sprite_callback
	215	};
	216
229	217	static MACHINE_DRIVER_START( asterix )
230	218
231	219	/* basic machine hardware */
r6740	r6741
236	224	MDRV_CPU_ADD("audiocpu", Z80, 8000000)
237	225	MDRV_CPU_PROGRAM_MAP(sound_map)
238	226
239		MDRV_NVRAM_HANDLER(asterix)
	227	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
240	228
241	229	/* video hardware */
242	230	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
r6740	r6741
249	237	MDRV_SCREEN_VISIBLE_AREA(14*8, (64-14)*8-1, 2*8, 30*8-1 )
250	238	MDRV_PALETTE_LENGTH(2048)
251	239
252		MDRV_VIDEO_START(asterix)
253	240	MDRV_VIDEO_UPDATE(asterix)
254	241
	242	MDRV_K056832_ADD("k056832", asterix_k056832_intf)
	243	MDRV_K053244_ADD("k053244", asterix_k05324x_intf)
	244	MDRV_K053251_ADD("k053251")
	245
255	246	/* sound hardware */
256	247	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
257	248
r6740	r6741
356	347
357	348	static DRIVER_INIT( asterix )
358	349	{
359		konami_rom_deinterleave_2(machine, "gfx1");
360		konami_rom_deinterleave_2(machine, "gfx2");
361
362	350	#if 0
363	351	*(UINT16 *)(memory_region(machine, "maincpu") + 0x07f34) = 0x602a;
364	352	*(UINT16 *)(memory_region(machine, "maincpu") + 0x00008) = 0x0400;

src/mame/drivers/goldnpkr.c

r6740	r6741
630	630	*     Video Hardware     *
631	631	*************************/
632	632
	633	static UINT8 *videoram;
	634	static UINT8 *colorram;
633	635	static tilemap *bg_tilemap;
634	636
635	637	static WRITE8_HANDLER( goldnpkr_videoram_w )
636	638	{
637		space->machine->generic.videoram.u8[offset] = data;
	639	videoram[offset] = data;
638	640	tilemap_mark_tile_dirty(bg_tilemap, offset);
639	641	}
640	642
641	643	static WRITE8_HANDLER( goldnpkr_colorram_w )
642	644	{
643		space->machine->generic.colorram.u8[offset] = data;
	645	colorram[offset] = data;
644	646	tilemap_mark_tile_dirty(bg_tilemap, offset);
645	647	}
646	648
r6740	r6741
654	656	xx-- ----   unused.
655	657	*/
656	658
657		int attr = machine->generic.colorram.u8[tile_index];
658		int code = ((attr & 1) << 8) | machine->generic.videoram.u8[tile_index];
	659	int attr = colorram[tile_index];
	660	int code = ((attr & 1) << 8) | videoram[tile_index];
659	661	int bank = (attr & 0x02) >> 1;   /* bit 1 switch the gfx banks */
660	662	int color = (attr & 0x3c) >> 2;   /* bits 2-3-4-5 for color */
661	663
r6740	r6741
898	900	AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
899	901	AM_RANGE(0x0844, 0x0847) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w)
900	902	AM_RANGE(0x0848, 0x084b) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w)
901		AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(goldnpkr_videoram_w) AM_BASE_GENERIC(videoram)
902		AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(goldnpkr_colorram_w) AM_BASE_GENERIC(colorram)
	903	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(goldnpkr_videoram_w) AM_BASE(&videoram)
	904	AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(goldnpkr_colorram_w) AM_BASE(&colorram)
903	905	AM_RANGE(0x4000, 0x7fff) AM_ROM
904	906	ADDRESS_MAP_END
905	907
r6740	r6741
910	912	AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
911	913	AM_RANGE(0x0844, 0x0847) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w)
912	914	AM_RANGE(0x0848, 0x084b) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w)
913		AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(goldnpkr_videoram_w) AM_BASE_GENERIC(videoram)
914		AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(goldnpkr_colorram_w) AM_BASE_GENERIC(colorram)
	915	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(goldnpkr_videoram_w) AM_BASE(&videoram)
	916	AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(goldnpkr_colorram_w) AM_BASE(&colorram)
915	917	AM_RANGE(0x2000, 0x3fff) AM_ROM
916	918	ADDRESS_MAP_END
917	919
r6740	r6741
922	924	AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
923	925	AM_RANGE(0x0844, 0x0847) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w)
924	926	AM_RANGE(0x0848, 0x084b) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w)
925		AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(goldnpkr_videoram_w) AM_BASE_GENERIC(videoram)
926		AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(goldnpkr_colorram_w) AM_BASE_GENERIC(colorram)
	927	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(goldnpkr_videoram_w) AM_BASE(&videoram)
	928	AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(goldnpkr_colorram_w) AM_BASE(&colorram)
927	929	AM_RANGE(0x2000, 0x2000) AM_READ_PORT("SW2")
928	930	//  AM_RANGE(0x2108, 0x210b) AM_NOP /* unknown 40-pin device */
929	931	AM_RANGE(0x4000, 0x7fff) AM_ROM

src/mame/drivers/hyhoo.c

r6740	r6741
23	23
24	24	#include "driver.h"
25	25	#include "cpu/z80/z80.h"
26		#include "nb1413m3.h"
	26	#include "includes/nb1413m3.h"
27	27	#include "sound/ay8910.h"
28	28	#include "sound/dac.h"
29	29

src/mame/drivers/moo.c

r6740	r6741
42	42	***************************************************************************/
43	43
44	44	#include "driver.h"
45		#include "video/konamiic.h"
46	45	#include "cpu/m68000/m68000.h"
47	46	#include "cpu/z80/z80.h"
48		#include "machine/eeprom.h"
	47	#include "machine/eepromdev.h"
49	48	#include "sound/2151intf.h"
50	49	#include "sound/okim6295.h"
51	50	#include "sound/k054539.h"
52		#include "konamipt.h"
	51	#include "video/konicdev.h"
	52	#include "includes/konamipt.h"
53	53
54	54	VIDEO_START(moo);
55	55	VIDEO_UPDATE(moo);
56	56
57		static int init_eeprom_count, init_nosound_count, game_type;
	57	static int init_nosound_count, game_type;
58	58	static UINT16 *workram;
59	59	static UINT16 protram[16];
60	60	static UINT16 cur_control2;
61	61
	62	extern void moo_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags);
	63	extern void moo_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask);
62	64
	65
63	66	static const eeprom_interface eeprom_intf =
64	67	{
65	68	7,         /* address bits */
r6740	r6741
71	74	"0100110000000"    /* unlock command */
72	75	};
73	76
74		static NVRAM_HANDLER( moo )
75		{
76		if (read_or_write)
77		eeprom_save(file);
78		else
79		{
80		eeprom_init(machine, &eeprom_intf);
81
82		if (file)
83		{
84		init_eeprom_count = 0;
85		eeprom_load(file);
86		}
87		else
88		init_eeprom_count = 10;
89		}
90		}
91
92		static READ16_HANDLER( control1_r )
93		{
94		int res;
95
96		/* bit 0 is EEPROM data */
97		/* bit 1 is EEPROM ready */
98		/* bit 3 is service button */
99		/* bits 4-7 are DIP switches */
100		res = input_port_read(space->machine, "IN1");
101
102		if (init_eeprom_count)
103		{
104		init_eeprom_count--;
105		res &= 0xf7;
106		}
107
108		return res;
109		}
110
111	77	static READ16_HANDLER( control2_r )
112	78	{
113	79	return cur_control2;
r6740	r6741
123	89	/* bit 10 is watchdog */
124	90	/* bit 11 is enable irq 4 (unconfirmed) */
125	91
	92	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
	93
126	94	COMBINE_DATA(&cur_control2);
127	95
128		eeprom_write_bit(cur_control2 & 0x01);
129		eeprom_set_cs_line((cur_control2 & 0x02) ? CLEAR_LINE : ASSERT_LINE);
130		eeprom_set_clock_line((cur_control2 & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	96	input_port_write(space->machine, "EEPROMOUT", cur_control2, 0xff);
131	97
132	98	if (data & 0x100)
133		{
134		K053246_set_OBJCHA_line(ASSERT_LINE);
135		}
	99	k053246_set_objcha_line(k053246, ASSERT_LINE);
136	100	else
137		{
138		K053246_set_OBJCHA_line(CLEAR_LINE);
139		}
	101	k053246_set_objcha_line(k053246, CLEAR_LINE);
140	102	}
141	103
142	104
143	105	static void moo_objdma(running_machine *machine, int type)
144	106	{
145		int counter, num_inactive;
	107	int num_inactive;
146	108	UINT16 *src, *dst, zmask;
	109	const device_config *k053246 = devtag_get_device(machine, "k053246");
	110	int counter = k053247_get_dy(k053246);
147	111
148		K053247_export_config(&dst, 0, 0, 0, &counter);
	112	k053247_get_ram(k053246, &dst);
149	113	src = machine->generic.spriteram.u16;
150	114	num_inactive = counter = 256;
151	115
r6740	r6741
173	137
174	138	static INTERRUPT_GEN(moo_interrupt)
175	139	{
176		if (K053246_is_IRQ_enabled())
	140	const device_config *k053246 = devtag_get_device(device->machine, "k053246");
	141
	142	if (k053246_is_irq_enabled(k053246))
177	143	{
178	144	moo_objdma(device->machine, game_type);
179	145
r6740	r6741
234	200	/* of RAM, but they put 0x10000 there. The CPU can access them all. */
235	201	static READ16_HANDLER( K053247_scattered_word_r )
236	202	{
	203	const device_config *k053246 = devtag_get_device(device->machine, "k053246");
	204
237	205	if (offset & 0x0078)
238	206	return space->machine->generic.spriteram.u16[offset];
239	207	else
240	208	{
241	209	offset = (offset & 0x0007) | ((offset & 0x7f80) >> 4);
242		return K053247_word_r(space,offset,mem_mask);
	210	return k053247_word_r(k053246, offset, mem_mask);
243	211	}
244	212	}
245	213
246	214	static WRITE16_HANDLER( K053247_scattered_word_w )
247	215	{
	216	const device_config *k053246 = devtag_get_device(device->machine, "k053246");
	217
248	218	if (offset & 0x0078)
249	219	COMBINE_DATA(space->machine->generic.spriteram.u16+offset);
250	220	else
251	221	{
252	222	offset = (offset & 0x0007) | ((offset & 0x7f80) >> 4);
253	223
254		K053247_word_w(space,offset,data,mem_mask);
	224	k053247_word_w(k053246, offset, data, mem_mask);
255	225	}
256	226	}
257	227
r6740	r6741
297	267
298	268	static ADDRESS_MAP_START( moo_map, ADDRESS_SPACE_PROGRAM, 16 )
299	269	AM_RANGE(0x000000, 0x07ffff) AM_ROM
300		AM_RANGE(0x0c0000, 0x0c003f) AM_WRITE(K056832_word_w)
301		AM_RANGE(0x0c2000, 0x0c2007) AM_WRITE(K053246_word_w)
	270	AM_RANGE(0x0c0000, 0x0c003f) AM_DEVWRITE("k056832", k056832_word_w)
	271	AM_RANGE(0x0c2000, 0x0c2007) AM_DEVWRITE("k053246", k053246_word_w)
302	272
303		AM_RANGE(0x0c4000, 0x0c4001) AM_READ(K053246_word_r)
304		AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)      /* K054338 alpha blending engine */
305		AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
	273	AM_RANGE(0x0c4000, 0x0c4001) AM_DEVREAD("k053246", k053246_word_r)
	274	AM_RANGE(0x0ca000, 0x0ca01f) AM_DEVWRITE("k054338", k054338_word_w)      /* K054338 alpha blending engine */
	275	AM_RANGE(0x0cc000, 0x0cc01f) AM_DEVWRITE("k053251", k053251_lsb_w)
306	276	AM_RANGE(0x0ce000, 0x0ce01f) AM_WRITE(moo_prot_w)
307	277	AM_RANGE(0x0d0000, 0x0d001f) AM_WRITEONLY               /* CCU regs (ignored) */
308	278	AM_RANGE(0x0d4000, 0x0d4001) AM_WRITE(sound_irq_w)
r6740	r6741
310	280	AM_RANGE(0x0d600e, 0x0d600f) AM_WRITE(sound_cmd2_w)
311	281	AM_RANGE(0x0d6014, 0x0d6015) AM_READ(sound_status_r)
312	282	AM_RANGE(0x0d6000, 0x0d601f) AM_RAM                     /* sound regs fall through */
313		AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)      /* VSCCS regs */
	283	AM_RANGE(0x0d8000, 0x0d8007) AM_DEVWRITE("k056832", k056832_b_word_w)      /* VSCCS regs */
314	284	AM_RANGE(0x0da000, 0x0da001) AM_READ_PORT("P1_P3")
315	285	AM_RANGE(0x0da002, 0x0da003) AM_READ_PORT("P2_P4")
316	286	AM_RANGE(0x0dc000, 0x0dc001) AM_READ_PORT("IN0")
317		AM_RANGE(0x0dc002, 0x0dc003) AM_READ(control1_r)
318		AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r,control2_w)
	287	AM_RANGE(0x0dc002, 0x0dc003) AM_READ_PORT("IN1")
	288	AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r, control2_w)
319	289	AM_RANGE(0x100000, 0x17ffff) AM_ROM
320	290	AM_RANGE(0x180000, 0x18ffff) AM_RAM   AM_BASE(&workram)      /* Work RAM */
321	291	AM_RANGE(0x190000, 0x19ffff) AM_RAM AM_BASE_GENERIC(spriteram)   /* Sprite RAM */
322		AM_RANGE(0x1a0000, 0x1a1fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes */
323		AM_RANGE(0x1a2000, 0x1a3fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes mirror */
324		AM_RANGE(0x1b0000, 0x1b1fff) AM_READ(K056832_rom_word_r)   /* Passthrough to tile roms */
	292	AM_RANGE(0x1a0000, 0x1a1fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)   /* Graphic planes */
	293	AM_RANGE(0x1a2000, 0x1a3fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)   /* Graphic planes mirror */
	294	AM_RANGE(0x1b0000, 0x1b1fff) AM_DEVREAD("k056832", k056832_rom_word_r)   /* Passthrough to tile roms */
325	295	AM_RANGE(0x1c0000, 0x1c1fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE_GENERIC(paletteram)
326	296	#if MOO_DEBUG
327		AM_RANGE(0x0c0000, 0x0c003f) AM_READ(K056832_word_r)
328		AM_RANGE(0x0c2000, 0x0c2007) AM_READ(K053246_reg_word_r)
329		AM_RANGE(0x0ca000, 0x0ca01f) AM_READ(K054338_word_r)
330		AM_RANGE(0x0cc000, 0x0cc01f) AM_READ(K053251_lsb_r)
	297	AM_RANGE(0x0c0000, 0x0c003f) AM_DEVREAD("k056832", k056832_word_r)
	298	AM_RANGE(0x0c2000, 0x0c2007) AM_DEVREAD("k053246", k053246_reg_word_r)
	299	AM_RANGE(0x0ca000, 0x0ca01f) AM_DEVREAD("k054338", k054338_word_r)
	300	AM_RANGE(0x0cc000, 0x0cc01f) AM_DEVREAD("k053251", k053251_lsb_r)
331	301	AM_RANGE(0x0d0000, 0x0d001f) AM_RAM
332		AM_RANGE(0x0d8000, 0x0d8007) AM_READ(K056832_b_word_r)
	302	AM_RANGE(0x0d8000, 0x0d8007) AM_DEVREAD("k056832", k056832_b_word_r)
333	303	#endif
334	304	ADDRESS_MAP_END
335	305
336	306	static ADDRESS_MAP_START( moobl_map, ADDRESS_SPACE_PROGRAM, 16 )
337	307	AM_RANGE(0x000000, 0x07ffff) AM_ROM
338		AM_RANGE(0x0c0000, 0x0c003f) AM_WRITE(K056832_word_w)
339		AM_RANGE(0x0c2000, 0x0c2007) AM_WRITE(K053246_word_w)
	308	AM_RANGE(0x0c0000, 0x0c003f) AM_DEVWRITE("k056832", k056832_word_w)
	309	AM_RANGE(0x0c2000, 0x0c2007) AM_DEVWRITE("k053246", k053246_word_w)
340	310	AM_RANGE(0x0c2f00, 0x0c2f01) AM_READNOP                  /* heck if I know, but it's polled constantly */
341		AM_RANGE(0x0c4000, 0x0c4001) AM_READ(K053246_word_r)
342		AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)       /* K054338 alpha blending engine */
343		AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
	311	AM_RANGE(0x0c4000, 0x0c4001) AM_DEVREAD("k053246", k053246_word_r)
	312	AM_RANGE(0x0ca000, 0x0ca01f) AM_DEVWRITE("k054338", k054338_word_w)       /* K054338 alpha blending engine */
	313	AM_RANGE(0x0cc000, 0x0cc01f) AM_DEVWRITE("k053251", k053251_lsb_w)
344	314	AM_RANGE(0x0d0000, 0x0d001f) AM_WRITEONLY                  /* CCU regs (ignored) */
345	315	AM_RANGE(0x0d6ffc, 0x0d6ffd) AM_DEVWRITE("oki", moobl_oki_bank_w)
346	316	AM_RANGE(0x0d6ffe, 0x0d6fff) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
347		AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)     /* VSCCS regs */
	317	AM_RANGE(0x0d8000, 0x0d8007) AM_DEVWRITE("k056832", k056832_b_word_w)     /* VSCCS regs */
348	318	AM_RANGE(0x0da000, 0x0da001) AM_READ_PORT("P1_P3")
349	319	AM_RANGE(0x0da002, 0x0da003) AM_READ_PORT("P2_P4")
350	320	AM_RANGE(0x0dc000, 0x0dc001) AM_READ_PORT("IN0")
351		AM_RANGE(0x0dc002, 0x0dc003) AM_READ(control1_r)
352		AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r,control2_w)
	321	AM_RANGE(0x0dc002, 0x0dc003) AM_READ_PORT("IN1")
	322	AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r, control2_w)
353	323	AM_RANGE(0x100000, 0x17ffff) AM_ROM
354	324	AM_RANGE(0x180000, 0x18ffff) AM_RAM AM_BASE(&workram)       /* Work RAM */
355	325	AM_RANGE(0x190000, 0x19ffff) AM_RAM AM_BASE_GENERIC(spriteram)     /* Sprite RAM */
356		AM_RANGE(0x1a0000, 0x1a1fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) /* Graphic planes */
357		AM_RANGE(0x1a2000, 0x1a3fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes mirror */
358		AM_RANGE(0x1b0000, 0x1b1fff) AM_READ(K056832_rom_word_r)   /* Passthrough to tile roms */
	326	AM_RANGE(0x1a0000, 0x1a1fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w) /* Graphic planes */
	327	AM_RANGE(0x1a2000, 0x1a3fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)   /* Graphic planes mirror */
	328	AM_RANGE(0x1b0000, 0x1b1fff) AM_DEVREAD("k056832", k056832_rom_word_r)   /* Passthrough to tile roms */
359	329	AM_RANGE(0x1c0000, 0x1c1fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE_GENERIC(paletteram)
360	330	ADDRESS_MAP_END
361	331
r6740	r6741
364	334	AM_RANGE(0x080000, 0x08ffff) AM_RAM
365	335	AM_RANGE(0x090000, 0x09ffff) AM_RAM AM_BASE_GENERIC(spriteram)   /* Sprite RAM */
366	336	AM_RANGE(0x0a0000, 0x0affff) AM_RAM                     /* extra sprite RAM? */
367		AM_RANGE(0x0c0000, 0x0c003f) AM_WRITE(K056832_word_w)
368		AM_RANGE(0x0c2000, 0x0c2007) AM_WRITE(K053246_word_w)
369		AM_RANGE(0x0c4000, 0x0c4001) AM_READ(K053246_word_r)
370		AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)      /* K054338 alpha blending engine */
371		AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
	337	AM_RANGE(0x0c0000, 0x0c003f) AM_DEVWRITE("k056832", k056832_word_w)
	338	AM_RANGE(0x0c2000, 0x0c2007) AM_DEVWRITE("k053246", k053246_word_w)
	339	AM_RANGE(0x0c4000, 0x0c4001) AM_DEVREAD("k053246", k053246_word_r)
	340	AM_RANGE(0x0ca000, 0x0ca01f) AM_DEVWRITE("k054338", k054338_word_w)      /* K054338 alpha blending engine */
	341	AM_RANGE(0x0cc000, 0x0cc01f) AM_DEVWRITE("k053251", k053251_lsb_w)
372	342	AM_RANGE(0x0ce000, 0x0ce01f) AM_WRITE(moo_prot_w)
373	343	AM_RANGE(0x0d0000, 0x0d001f) AM_WRITEONLY               /* CCU regs (ignored) */
374		AM_RANGE(0x0d2000, 0x0d20ff) AM_READWRITE(K054000_lsb_r,K054000_lsb_w)
	344	AM_RANGE(0x0d2000, 0x0d20ff) AM_DEVREADWRITE("k054000", k054000_lsb_r, k054000_lsb_w)
375	345	AM_RANGE(0x0d4000, 0x0d4001) AM_WRITE(sound_irq_w)
376	346	AM_RANGE(0x0d600c, 0x0d600d) AM_WRITE(sound_cmd1_w)
377	347	AM_RANGE(0x0d600e, 0x0d600f) AM_WRITE(sound_cmd2_w)
378	348	AM_RANGE(0x0d6014, 0x0d6015) AM_READ(sound_status_r)
379	349	AM_RANGE(0x0d6000, 0x0d601f) AM_RAM                     /* sound regs fall through */
380		AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)      /* VSCCS regs */
	350	AM_RANGE(0x0d8000, 0x0d8007) AM_DEVWRITE("k056832", k056832_b_word_w)      /* VSCCS regs */
381	351	AM_RANGE(0x0da000, 0x0da001) AM_READ_PORT("P1_P3")
382	352	AM_RANGE(0x0da002, 0x0da003) AM_READ_PORT("P2_P4")
383	353	AM_RANGE(0x0dc000, 0x0dc001) AM_READ_PORT("IN0")
384		AM_RANGE(0x0dc002, 0x0dc003) AM_READ(control1_r)
385		AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r,control2_w)
386		AM_RANGE(0x180000, 0x181fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes */
387		AM_RANGE(0x182000, 0x183fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes mirror */
	354	AM_RANGE(0x0dc002, 0x0dc003) AM_READ_PORT("IN1")
	355	AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r, control2_w)
	356	AM_RANGE(0x180000, 0x181fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)   /* Graphic planes */
	357	AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)   /* Graphic planes mirror */
388	358	AM_RANGE(0x184000, 0x187fff) AM_RAM                     /* extra tile RAM? */
389		AM_RANGE(0x190000, 0x191fff) AM_READ(K056832_rom_word_r)   /* Passthrough to tile roms */
	359	AM_RANGE(0x190000, 0x191fff) AM_DEVREAD("k056832", k056832_rom_word_r)   /* Passthrough to tile roms */
390	360	AM_RANGE(0x1b0000, 0x1b3fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE_GENERIC(paletteram)
391	361	AM_RANGE(0x200000, 0x23ffff) AM_ROM                     /* data */
392	362	#if MOO_DEBUG
393		AM_RANGE(0x0c0000, 0x0c003f) AM_READ(K056832_word_r)
394		AM_RANGE(0x0c2000, 0x0c2007) AM_READ(K053246_reg_word_r)
395		AM_RANGE(0x0ca000, 0x0ca01f) AM_READ(K054338_word_r)
396		AM_RANGE(0x0cc000, 0x0cc01f) AM_READ(K053251_lsb_r)
	363	AM_RANGE(0x0c0000, 0x0c003f) AM_DEVREAD("k056832", k056832_word_r)
	364	AM_RANGE(0x0c2000, 0x0c2007) AM_DEVREAD("k053246", k053246_reg_word_r)
	365	AM_RANGE(0x0ca000, 0x0ca01f) AM_DEVREAD("k054338", k054338_word_r)
	366	AM_RANGE(0x0cc000, 0x0cc01f) AM_DEVREAD("k053251", k053251_lsb_r)
397	367	AM_RANGE(0x0d0000, 0x0d001f) AM_RAM
398		AM_RANGE(0x0d8000, 0x0d8007) AM_READ(K056832_b_word_r)
	368	AM_RANGE(0x0d8000, 0x0d8007) AM_DEVREAD("k056832", k056832_b_word_r)
399	369	#endif
400	370	ADDRESS_MAP_END
401	371
r6740	r6741
423	393	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE4 )
424	394
425	395	PORT_START("IN1")
426		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	396	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
427	397	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
428	398	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
429	399	PORT_SERVICE_NO_TOGGLE(0x08, IP_ACTIVE_LOW)
r6740	r6741
438	408	PORT_DIPSETTING(    0x40, "3")
439	409	PORT_DIPSETTING(    0x80, "4")
440	410
	411	PORT_START( "EEPROMOUT" )
	412	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	413	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	414	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	415
441	416	PORT_START("P1_P3")
442	417	KONAMI16_LSB( 1, IPT_UNKNOWN, IPT_START1 )
443	418	KONAMI16_MSB( 3, IPT_UNKNOWN, IPT_START3 )
r6740	r6741
473	448	}
474	449
475	450
	451	static const k056832_interface moo_k056832_intf =
	452	{
	453	"gfx1", 0,
	454	K056832_BPP_4,
	455	1, 0,
	456	KONAMI_ROM_DEINTERLEAVE_2,
	457	moo_tile_callback, "none"
	458	};
	459
	460	static const k053247_interface moo_k053247_intf =
	461	{
	462	"screen",
	463	"gfx2", 1,
	464	NORMAL_PLANE_ORDER,
	465	-48+1, 23,
	466	KONAMI_ROM_DEINTERLEAVE_4,
	467	moo_sprite_callback
	468	};
	469
	470	static const k053247_interface bucky_k053247_intf =
	471	{
	472	"screen",
	473	"gfx2", 1,
	474	NORMAL_PLANE_ORDER,
	475	-48, 23,
	476	KONAMI_ROM_DEINTERLEAVE_4,
	477	moo_sprite_callback
	478	};
	479
	480	static const k054338_interface moo_k054338_intf =
	481	{
	482	"screen",
	483	0,
	484	"none"
	485	};
	486
	487
476	488	static MACHINE_DRIVER_START( moo )
477	489
478	490	/* basic machine hardware */
r6740	r6741
486	498	MDRV_MACHINE_START(moo)
487	499	MDRV_MACHINE_RESET(moo)
488	500
489		MDRV_NVRAM_HANDLER(moo)
	501	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
490	502
491	503	/* video hardware */
492	504	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
r6740	r6741
503	515	MDRV_VIDEO_START(moo)
504	516	MDRV_VIDEO_UPDATE(moo)
505	517
	518	MDRV_K053247_ADD("k053246", moo_k053247_intf)
	519	MDRV_K056832_ADD("k056832", moo_k056832_intf)
	520	MDRV_K053251_ADD("k053251")
	521	MDRV_K054338_ADD("k054338", moo_k054338_intf)
	522
506	523	/* sound hardware */
507	524	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
508	525
r6740	r6741
524	541
525	542	MDRV_MACHINE_START(moo)
526	543	MDRV_MACHINE_RESET(moo)
527		MDRV_NVRAM_HANDLER(moo)
528	544
	545	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
	546
529	547	/* video hardware */
530	548	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
531	549
r6740	r6741
541	559	MDRV_VIDEO_START(moo)
542	560	MDRV_VIDEO_UPDATE(moo)
543	561
	562	MDRV_K053247_ADD("k053246", moo_k053247_intf)
	563	MDRV_K056832_ADD("k056832", moo_k056832_intf)
	564	MDRV_K053251_ADD("k053251")
	565	MDRV_K054338_ADD("k054338", moo_k054338_intf)
	566
544	567	/* sound hardware */
545	568	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
546	569
r6740	r6741
556	579	MDRV_CPU_MODIFY("maincpu")
557	580	MDRV_CPU_PROGRAM_MAP(bucky_map)
558	581
	582	MDRV_K054000_ADD("k054000")
	583
	584	MDRV_DEVICE_REMOVE("k053246")
	585	MDRV_K053247_ADD("k053246", bucky_k053247_intf)      // diff x offset
	586
559	587	/* video hardware */
560	588	MDRV_PALETTE_LENGTH(4096)
561	589	MACHINE_DRIVER_END
r6740	r6741
749	777	ROM_LOAD( "173a10.b8",  0x000000, 0x200000, CRC(42fb0a0c) SHA1(d68c932cfabdec7896698b433525fe47ef4698d0) )
750	778	ROM_LOAD( "173a11.a8",  0x200000, 0x200000, CRC(b0d747c4) SHA1(0cf1ee1b9a35ded31a81c321df2a076f7b588971) )
751	779	ROM_LOAD( "173a12.b10", 0x400000, 0x200000, CRC(0fc2ad24) SHA1(6eda1043ee1266b8ba938a03a90bc7787210a936) )
752		ROM_LOAD( "173a13.a10", 0x600000, 0x200000, CRC(4cf85439) SHA1(8c298bf0e659a830a1830a1180f4ce71215ade45) )
	780	ROM_LOAD(    "173a13.a10", 0x600000, 0x200000, CRC(4cf85439) SHA1(8c298bf0e659a830a1830a1180f4ce71215ade45) )
753	781
754	782	ROM_REGION( 0x400000, "konami", 0 )
755	783	/* K054539 samples */
r6740	r6741
760	788
761	789	static DRIVER_INIT( moo )
762	790	{
763		konami_rom_deinterleave_2(machine, "gfx1");
764		konami_rom_deinterleave_4(machine, "gfx2");
765
766	791	game_type = (!strcmp(machine->gamedrv->name, "bucky") || !strcmp(machine->gamedrv->name, "buckyua"));
767	792	}
768	793

src/mame/drivers/taito_l.c

r6740	r6741
52	52
53	53	#include "driver.h"
54	54	#include "deprecat.h"
55		#include "taitoipt.h"
	55	#include "includes/taitoipt.h"
56	56	#include "cpu/z80/z80.h"
57	57	#include "audio/taitosnd.h"
58	58	#include "sound/2203intf.h"
r6740	r6741
136	136	}
137	137	}
138	138
139		static void machine_init(running_machine *machine)
	139	static MACHINE_START( taito_l )
140	140	{
141		int i;
142
143	141	taitol_rambanks = auto_alloc_array(machine, UINT8, 0x1000*12);
144	142	palette_ram = auto_alloc_array(machine, UINT8, 0x1000);
145	143	empty_ram = auto_alloc_array(machine, UINT8, 0x1000);
	144	}
146	145
	146	static void machine_reset(running_machine *machine)
	147	{
	148	int i;
	149
147	150	for(i=0;i<3;i++)
148	151	irq_adr_table[i] = 0;
149	152
r6740	r6741
178	181
179	182	static MACHINE_RESET( fhawk )
180	183	{
181		machine_init(machine);
	184	machine_reset(machine);
182	185	porte0_tag = NULL;
183	186	porte1_tag = NULL;
184	187	portf0_tag = NULL;
r6740	r6741
187	190
188	191	static MACHINE_RESET( raimais )
189	192	{
190		machine_init(machine);
	193	machine_reset(machine);
191	194	porte0_tag = NULL;
192	195	porte1_tag = NULL;
193	196	portf0_tag = NULL;
r6740	r6741
196	199
197	200	static MACHINE_RESET( champwr )
198	201	{
199		machine_init(machine);
	202	machine_reset(machine);
200	203	porte0_tag = NULL;
201	204	porte1_tag = NULL;
202	205	portf0_tag = NULL;
r6740	r6741
206	209
207	210	static MACHINE_RESET( kurikint )
208	211	{
209		machine_init(machine);
	212	machine_reset(machine);
210	213	porte0_tag = NULL;
211	214	porte1_tag = NULL;
212	215	portf0_tag = NULL;
r6740	r6741
215	218
216	219	static MACHINE_RESET( evilston )
217	220	{
218		machine_init(machine);
	221	machine_reset(machine);
219	222	porte0_tag = NULL;
220	223	porte1_tag = NULL;
221	224	portf0_tag = NULL;
r6740	r6741
224	227
225	228	static MACHINE_RESET( puzznic )
226	229	{
227		machine_init(machine);
	230	machine_reset(machine);
228	231	porte0_tag = "DSWA";
229	232	porte1_tag = "DSWB";
230	233	portf0_tag = "IN0";
r6740	r6741
233	236
234	237	static MACHINE_RESET( plotting )
235	238	{
236		machine_init(machine);
	239	machine_reset(machine);
237	240	porte0_tag = "DSWA";
238	241	porte1_tag = "DSWB";
239	242	portf0_tag = "IN0";
r6740	r6741
242	245
243	246	static MACHINE_RESET( palamed )
244	247	{
245		machine_init(machine);
	248	machine_reset(machine);
246	249	porte0_tag = "DSWA";
247	250	porte1_tag = NULL;
248	251	portf0_tag = "DSWB";
r6740	r6741
251	254
252	255	static MACHINE_RESET( cachat )
253	256	{
254		machine_init(machine);
	257	machine_reset(machine);
255	258	porte0_tag = "DSWA";
256	259	porte1_tag = NULL;
257	260	portf0_tag = "DSWB";
r6740	r6741
260	263
261	264	static MACHINE_RESET( horshoes )
262	265	{
263		machine_init(machine);
	266	machine_reset(machine);
264	267	porte0_tag = "DSWA";
265	268	porte1_tag = "DSWB";
266	269	portf0_tag = "IN0";
r6740	r6741
1965	1968
1966	1969	MDRV_QUANTUM_TIME(HZ(6000))
1967	1970
	1971	MDRV_MACHINE_START(taito_l)
1968	1972	MDRV_MACHINE_RESET(fhawk)
1969	1973
1970	1974	/* video hardware */
r6740	r6741
2061	2065
2062	2066	MDRV_QUANTUM_TIME(HZ(6000))
2063	2067
	2068	MDRV_MACHINE_START(taito_l)
2064	2069	MDRV_MACHINE_RESET(kurikint)
2065	2070
2066	2071	/* video hardware */
r6740	r6741
2106	2111	MDRV_CPU_PROGRAM_MAP(plotting_map)
2107	2112	MDRV_CPU_VBLANK_INT_HACK(vbl_interrupt,3)
2108	2113
	2114	MDRV_MACHINE_START(taito_l)
2109	2115	MDRV_MACHINE_RESET(plotting)
2110	2116
2111	2117	/* video hardware */
r6740	r6741
2201	2207
2202	2208	MDRV_QUANTUM_TIME(HZ(6000))
2203	2209
	2210	MDRV_MACHINE_START(taito_l)
2204	2211	MDRV_MACHINE_RESET(evilston)
2205	2212
2206	2213	/* video hardware */

src/mame/drivers/eolith16.c

r6740	r6741
14	14	#include "deprecat.h"
15	15	#include "machine/eepromdev.h"
16	16	#include "sound/okim6295.h"
17		#include "eolithsp.h"
	17	#include "includes/eolithsp.h"
18	18
19	19	static UINT16 *vram;
20	20	static int vbuffer = 0;

src/mame/drivers/groundfx.c

r6740	r6741
115	115	EPROM
116	116	**********************************************************/
117	117
118		static const UINT8 default_eeprom[128]=
119		{
120		0x62,0x11,0x00,0x00,0x00,0x00,0x01,0x00,0x80,0x80,0x30,0x05,0x00,0x00,0x96,0x14,
121		0x17,0x70,0x35,0xcd,0x75,0x30,0x24,0xaa,0x75,0x30,0x51,0xd9,0x75,0x30,0x2d,0x2b,
122		0x75,0x30,0x51,0xb9,0x00,0x00,0xe0,0xa0,0x17,0x70,0x35,0xcd,0x75,0x30,0x24,0xaa,
123		0x75,0x30,0x51,0xd9,0x75,0x30,0x2d,0x2b,0x75,0x30,0x51,0xb9,0x00,0x00,0xff,0xff,
124		0x17,0x70,0x35,0xcd,0x75,0x30,0x24,0xaa,0x75,0x30,0x51,0xd9,0x75,0x30,0x2d,0x2b,
125		0x75,0x30,0x51,0xb9,0xff,0xff,0xff,0xff,0x17,0x70,0x35,0xcd,0x75,0x30,0x24,0xaa,
126		0x75,0x30,0x51,0xd9,0x75,0x30,0x2d,0x2b,0x75,0x30,0x51,0xb9,0xff,0xff,0xff,0xff,
127		0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
128		};
129
130	118	static const eeprom_interface groundfx_eeprom_interface =
131	119	{
132	120	6,            /* address bits */
r6740	r6741
353	341	MACHINE DRIVERS
354	342	***********************************************************/
355	343
356		static MACHINE_RESET( groundfx )
357		{
358		taito_f3_soundsystem_reset(machine);
359		f3_68681_reset(machine);
360		}
361
362	344	static INTERRUPT_GEN( groundfx_interrupt )
363	345	{
364	346	frame_counter^=1;
r6740	r6741
372	354	MDRV_CPU_PROGRAM_MAP(groundfx_map)
373	355	MDRV_CPU_VBLANK_INT("screen", groundfx_interrupt)
374	356
375		TAITO_F3_SOUND_SYSTEM_CPU(16000000)
	357	MDRV_EEPROM_NODEFAULT_ADD("eeprom", groundfx_eeprom_interface)
376	358
377		MDRV_MACHINE_RESET(groundfx)
378		//  MDRV_NVRAM_HANDLER(groundfx)
379		MDRV_EEPROM_ADD("eeprom", groundfx_eeprom_interface, 128, default_eeprom)
380
381	359	/* video hardware */
382	360	MDRV_SCREEN_ADD("screen", RASTER)
383	361	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
393	371	MDRV_VIDEO_UPDATE(groundfx)
394	372
395	373	/* sound hardware */
396		TAITO_F3_SOUND_SYSTEM_ES5505(30476100/2)
	374	MDRV_IMPORT_FROM(taito_f3_sound)
397	375	MACHINE_DRIVER_END
398	376
399	377	/***************************************************************************
r6740	r6741
434	412	ROM_REGION16_BE( 0x1000000, "ensoniq.0", ROMREGION_ERASE00 )
435	413	ROM_LOAD16_BYTE( "d51-01.73", 0x000000, 0x200000, CRC(92f09155) SHA1(8015e1997818bb480174394eb43840bf26679bcf) )   /* Ensoniq samples */
436	414	ROM_LOAD16_BYTE( "d51-02.74", 0xc00000, 0x200000, CRC(20a9428f) SHA1(c9033d02a49c72f704808f5f899101617d5814e5) )
	415
	416	ROM_REGION16_BE( 0x80, "eeprom", 0 )
	417	ROM_LOAD( "93c46.164", 0x0000, 0x0080, CRC(6f58851d) SHA1(33bd4478f097dca6b5d222adb89699c6d35ed009) )
437	418	ROM_END
438	419
439	420

src/mame/drivers/tickee.c

r6740	r6741
38	38	static int palette_bank;
39	39	static UINT8 gunx[2];
40	40
	41
	42
41	43	/*************************************
42	44	*
43	45	*  Compute X/Y coordinates
r6740	r6741
73	75	}
74	76
75	77
76
77
78
79	78	static TIMER_CALLBACK( clear_gun_interrupt )
80	79	{
81	80	/* clear the IRQ on the next scanline? */
r6740	r6741
108	107
109	108
110	109
111
112	110	/*************************************
113	111	*
114	112	*  Video startup
r6740	r6741
123	121	}
124	122
125	123
	124
126	125	/*************************************
127	126	*
128	127	*  Video update
r6740	r6741
173	172	}
174	173	else
175	174	{
176
177	175	/* copy the non-blanked portions of this scanline */
178	176	for (x = params->heblnk; x < params->hsblnk; x += 2)
179	177	{
r6740	r6741
181	179	dest[x + 0] = pens[pixels & 0xff];
182	180	dest[x + 1] = pens[pixels >> 8];
183	181	}
184
185	182	}
186	183	}
187	184
r6740	r6741
196	193	{
197	194	beamxadd = 50;
198	195	beamyadd = 0;
199		ticket_dispenser_init(machine, 100, 0, 1);
200	196	tlc34076_reset(6);
201	197	}
202	198
r6740	r6741
227	223	return tickee_vram[offset];
228	224	}
229	225
	226
230	227	void rapidfir_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
231	228	{
232	229	if (address < 0x800000)
r6740	r6741
240	237	memcpy(&tickee_vram[TOWORD(address)], shiftreg, TOBYTE(0x2000));
241	238	}
242	239
243		/*************************************
244		*
245		*  Miscellaneous control bits
246		*
247		*************************************/
248	240
249		static READ8_DEVICE_HANDLER( port1_r )
250		{
251		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
252		return input_port_read(device->machine, "IN0") | (ticket_dispenser_0_r(space, 0) >> 5) | (ticket_dispenser_1_r(space, 0) >> 6);
253		}
254	241
255		static READ8_DEVICE_HANDLER( port2_r )
256		{
257		const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
258		return input_port_read(device->machine, "IN2") | (ticket_dispenser_0_r(space, 0) >> 5) | (ticket_dispenser_1_r(space, 0) >> 6);
259		}
260
261
262
263	242	/*************************************
264	243	*
265	244	*  Miscellaneous control bits
r6740	r6741
281	260
282	261	if (offset == 3)
283	262	{
284		ticket_dispenser_0_w(space, 0, (data & 8) << 4);
285		ticket_dispenser_1_w(space, 0, (data & 4) << 5);
	263	ticket_dispenser_w(devtag_get_device(space->machine, "ticket1"), 0, (data & 8) << 4);
	264	ticket_dispenser_w(devtag_get_device(space->machine, "ticket2"), 0, (data & 4) << 5);
286	265	}
287	266
288	267	if (olddata != tickee_control[offset])
r6740	r6741
291	270
292	271
293	272
294
295	273	/*************************************
296	274	*
297	275	*  Unknowns
r6740	r6741
303	281	return 0xffff;
304	282	}
305	283
	284
306	285	static READ16_HANDLER( rapidfir_gun1_r )
307	286	{
308	287	return gunx[0];
r6740	r6741
320	299	return 0xff7f;
321	300	}
322	301
	302
323	303	static WRITE16_HANDLER( rapidfir_control_w )
324	304	{
325	305	/* other bits like control on tickee? */
r6740	r6741
327	307	palette_bank = data & 1;
328	308	}
329	309
	310
	311
330	312	/*************************************
331	313	*
332	314	*  Sound
r6740	r6741
342	324	break;
343	325
344	326	case 0x2d:
345		okim6295_set_bank_base(device, 0x50000);
	327	okim6295_set_bank_base(device, 0x40000);
346	328	break;
347	329
348	330	case 0x1c:
r6740	r6741
359	341	}
360	342	}
361	343
	344
	345
362	346	/*************************************
363	347	*
364	348	*  Memory maps
r6740	r6741
398	382	AM_RANGE(0xff000000, 0xffffffff) AM_ROM AM_REGION("user1", 0)
399	383	ADDRESS_MAP_END
400	384
	385
401	386	/* newer hardware */
402	387	static ADDRESS_MAP_START( rapidfir_map, ADDRESS_SPACE_PROGRAM, 16 )
403	388	AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_BASE(&tickee_vram)
r6740	r6741
423	408	ADDRESS_MAP_END
424	409
425	410
	411
426	412	/*************************************
427	413	*
428	414	*  Input ports
r6740	r6741
455	441
456	442	PORT_START("IN0")
457	443	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
458		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* right ticket status */
459		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* left ticket status */
	444	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket2", ticket_dispenser_line_r) /* right ticket status */
	445	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket1", ticket_dispenser_line_r)   /* left ticket status */
460	446	PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNUSED )
461	447
462	448	PORT_START("IN1")
r6740	r6741
485	471	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2)
486	472	INPUT_PORTS_END
487	473
	474
488	475	static INPUT_PORTS_START( ghoshunt )
489	476	PORT_START("DSW")
490	477	PORT_DIPNAME( 0x01, 0x01, "Messages in Play")
r6740	r6741
512	499
513	500	PORT_START("IN0")
514	501	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
515		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* right ticket status */
516		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* left ticket status */
	502	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket2", ticket_dispenser_line_r)   /* right ticket status */
	503	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket1", ticket_dispenser_line_r)   /* left ticket status */
517	504	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
518	505	PORT_BIT( 0xd8, IP_ACTIVE_LOW, IPT_UNUSED )
519	506
r6740	r6741
528	515
529	516	PORT_START("IN2")
530	517	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
531		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* right ticket status */
532		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* left ticket status */
	518	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket2", ticket_dispenser_line_r)   /* right ticket status */
	519	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket1", ticket_dispenser_line_r)   /* left ticket status */
533	520	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
534	521	PORT_BIT( 0xd8, IP_ACTIVE_LOW, IPT_UNUSED )
535	522
r6740	r6741
546	533	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2)
547	534	INPUT_PORTS_END
548	535
	536
549	537	static INPUT_PORTS_START( rapidfir )
550	538	PORT_START("IN0")
551	539	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
r6740	r6741
627	615	{
628	616	AY8910_LEGACY_OUTPUT,
629	617	AY8910_DEFAULT_LOADS,
630		DEVCB_HANDLER(port1_r),
631		DEVCB_HANDLER(port2_r),
	618	DEVCB_INPUT_PORT("IN0"),
	619	DEVCB_INPUT_PORT("IN2"),
632	620	DEVCB_NULL,
633	621	DEVCB_NULL
634	622	};
r6740	r6741
667	655	};
668	656
669	657
	658
670	659	/*************************************
671	660	*
672	661	*  Machine drivers
r6740	r6741
683	672	MDRV_MACHINE_RESET(tickee)
684	673	MDRV_NVRAM_HANDLER(generic_1fill)
685	674
	675	MDRV_TICKET_DISPENSER_ADD("ticket1", 100, TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH)
	676	MDRV_TICKET_DISPENSER_ADD("ticket2", 100, TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH)
	677
686	678	/* video hardware */
687	679	MDRV_VIDEO_START(tickee)
688	680	MDRV_VIDEO_UPDATE(tms340x0)
r6740	r6741
703	695	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
704	696	MACHINE_DRIVER_END
705	697
	698
706	699	static MACHINE_DRIVER_START( ghoshunt )
707	700	MDRV_IMPORT_FROM(tickee)
708	701
r6740	r6741
711	704	MDRV_CPU_PROGRAM_MAP(ghoshunt_map)
712	705	MACHINE_DRIVER_END
713	706
	707
714	708	static MACHINE_DRIVER_START( rapidfir )
715	709
716	710	/* basic machine hardware */
r6740	r6741
737	731	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
738	732	MACHINE_DRIVER_END
739	733
	734
	735
740	736	/*************************************
741	737	*
742	738	*  ROM definitions
r6740	r6741
941	937	ROM_END
942	938
943	939
	940
944	941	/*************************************
945	942	*
946	943	*  Game drivers

src/mame/drivers/srmp5.c

r6740	r6741
39	39	#include "cpu/z80/z80.h"
40	40	#include "cpu/mips/r3000.h"
41	41	#include "sound/st0016.h"
42		#include "st0016.h"
	42	#include "includes/st0016.h"
43	43
44	44	#define DEBUG_CHAR
45	45	static UINT32 databank;

src/mame/drivers/m92.c

r6740	r6741
195	195
196	196	#include "driver.h"
197	197	#include "cpu/nec/nec.h"
198		#include "m92.h"
199		#include "iremipt.h"
	198	#include "includes/m92.h"
	199	#include "includes/iremipt.h"
200	200	#include "machine/irem_cpu.h"
201	201	#include "sound/2151intf.h"
202	202	#include "sound/iremga20.h"

src/mame/drivers/m58.c

r6740	r6741
11	11
12	12	#include "driver.h"
13	13	#include "cpu/z80/z80.h"
14		#include "iremipt.h"
	14	#include "includes/iremipt.h"
15	15	#include "includes/iremz80.h"
16	16
17	17	#define MASTER_CLOCK      XTAL_18_432MHz

src/mame/drivers/fcombat.c

r6740	r6741
31	31	#include "driver.h"
32	32	#include "cpu/z80/z80.h"
33	33	#include "sound/ay8910.h"
34		#include "fcombat.h"
	34	#include "includes/fcombat.h"
35	35
36	36
37	37	static INPUT_CHANGED( coin_inserted )

src/mame/drivers/wwfwfest.c

r6740	r6741
40	40	#include "driver.h"
41	41	#include "cpu/m68000/m68000.h"
42	42	#include "cpu/z80/z80.h"
43		#include "wwfwfest.h"
	43	#include "includes/wwfwfest.h"
44	44	#include "sound/2151intf.h"
45	45	#include "sound/okim6295.h"
46	46

src/mame/drivers/fuukifg2.c

r6740	r6741
40	40	#include "sound/2203intf.h"
41	41	#include "sound/3812intf.h"
42	42	#include "sound/okim6295.h"
43		#include "fuukifg2.h"
	43	#include "includes/fuukifg2.h"
44	44
45	45
46	46	/***************************************************************************

src/mame/drivers/pkscram.c

r6740	r6741
25	25	static UINT16* pkscramble_bgtilemap_ram;
26	26
27	27	static tilemap *fg_tilemap, *md_tilemap, *bg_tilemap;
28		static emu_timer *scanline_timer;
	28	static const device_config *scanline_timer;
29	29
30	30	static WRITE16_HANDLER( pkscramble_fgtilemap_w )
31	31	{
r6740	r6741
191	191	SET_TILE_INFO(0,tile,color,0);
192	192	}
193	193
194		static TIMER_CALLBACK( scanline_callback )
	194	static TIMER_DEVICE_CALLBACK( scanline_callback )
195	195	{
196	196	if (param == interrupt_scanline)
197	197	{
198	198	if (out & 0x2000)
199		cputag_set_input_line(machine, "maincpu", 1, ASSERT_LINE);
200		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, param + 1, 0), param+1);
	199	cputag_set_input_line(timer->machine, "maincpu", 1, ASSERT_LINE);
	200	timer_device_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, param + 1, 0), param+1);
201	201	interrupt_line_active = 1;
202	202	}
203	203	else
204	204	{
205	205	if (interrupt_line_active)
206		cputag_set_input_line(machine, "maincpu", 1, CLEAR_LINE);
207		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, interrupt_scanline, 0), interrupt_scanline);
	206	cputag_set_input_line(timer->machine, "maincpu", 1, CLEAR_LINE);
	207	timer_device_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(timer->machine->primary_screen, interrupt_scanline, 0), interrupt_scanline);
208	208	interrupt_line_active = 0;
209	209	}
210	210	}
r6740	r6741
259	259	irqhandler
260	260	};
261	261
	262	static MACHINE_START( pkscramble)
	263	{
	264	state_save_register_global(machine, out);
	265	state_save_register_global(machine, interrupt_line_active);
	266	}
	267
262	268	static MACHINE_RESET( pkscramble)
263	269	{
264	270	out = 0;
265	271	interrupt_line_active=0;
266		scanline_timer = timer_alloc(machine, scanline_callback, NULL);
267		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, interrupt_scanline, 0), interrupt_scanline);
268
269		state_save_register_global(machine, out);
270		state_save_register_global(machine, interrupt_line_active);
	272	scanline_timer = devtag_get_device(machine, "scan_timer");
	273	timer_device_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, interrupt_scanline, 0), interrupt_scanline);
271	274	}
272	275
273	276	static MACHINE_DRIVER_START( pkscramble )
r6740	r6741
278	281
279	282	MDRV_NVRAM_HANDLER(generic_0fill)
280	283
	284	MDRV_MACHINE_START(pkscramble)
281	285	MDRV_MACHINE_RESET(pkscramble)
282	286
	287	MDRV_TIMER_ADD("scan_timer", scanline_callback)
	288
283	289	/* video hardware */
284	290	MDRV_SCREEN_ADD("screen", RASTER)
285	291	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/mcr.c

r6740	r6741
290	290	#include "machine/z80sio.h"
291	291	#include "audio/mcr.h"
292	292	#include "sound/samples.h"
293		#include "mcr.h"
	293	#include "includes/mcr.h"
294	294
295	295
296	296	static UINT8 input_mux;

src/mame/drivers/matmania.c

r6740	r6741
58	58	AM_RANGE(0x0780, 0x07df) AM_WRITEONLY AM_BASE_SIZE_GENERIC(spriteram)
59	59	AM_RANGE(0x1000, 0x13ff) AM_RAM AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
60	60	AM_RANGE(0x1400, 0x17ff) AM_RAM AM_BASE(&matmania_colorram2)
61		AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
62		AM_RANGE(0x2200, 0x23ff) AM_RAM AM_BASE_GENERIC(colorram)
	61	AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE(&matmania_videoram) AM_SIZE(&matmania_videoram_size)
	62	AM_RANGE(0x2200, 0x23ff) AM_RAM AM_BASE(&matmania_colorram)
63	63	AM_RANGE(0x2400, 0x25ff) AM_RAM AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
64	64	AM_RANGE(0x2600, 0x27ff) AM_RAM AM_BASE(&matmania_colorram3)
65	65	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0") AM_WRITEONLY AM_BASE(&matmania_pageselect)
r6740	r6741
75	75	AM_RANGE(0x0780, 0x07df) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
76	76	AM_RANGE(0x1000, 0x13ff) AM_RAM AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
77	77	AM_RANGE(0x1400, 0x17ff) AM_RAM AM_BASE(&matmania_colorram2)
78		AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
79		AM_RANGE(0x2200, 0x23ff) AM_RAM AM_BASE_GENERIC(colorram)
	78	AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE(&matmania_videoram) AM_SIZE(&matmania_videoram_size)
	79	AM_RANGE(0x2200, 0x23ff) AM_RAM AM_BASE(&matmania_colorram)
80	80	AM_RANGE(0x2400, 0x25ff) AM_RAM AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
81	81	AM_RANGE(0x2600, 0x27ff) AM_RAM AM_BASE(&matmania_colorram3)
82	82	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0") AM_WRITEONLY AM_BASE(&matmania_pageselect)

src/mame/drivers/dcheese.c

r6740	r6741
34	34	#include "machine/eepromdev.h"
35	35	#include "machine/ticket.h"
36	36	#include "sound/bsmt2000.h"
37		#include "dcheese.h"
	37	#include "includes/dcheese.h"
38	38
39	39
40	40	#define MAIN_OSC   14318180
r6740	r6741
131	131	if (ACCESSING_BITS_0_7)
132	132	{
133	133	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
134		ticket_dispenser_w(space, 0, (data & 1) << 7);
	134	ticket_dispenser_w(devtag_get_device(space->machine, "ticket"), 0, (data & 1) << 7);
135	135	}
136	136	}
137	137
r6740	r6741
270	270
271	271	PORT_START("240000")
272	272	PORT_BIT( 0x001f, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* low 5 bits read as a unit */
273		PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, NULL)
	273	PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)
274	274	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL )      /* sound->main buffer status (0=empty) */
275	275	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(sound_latch_state_r, NULL)
276	276	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNUSED )
r6740	r6741
319	319
320	320	PORT_START("240000")
321	321	PORT_BIT( 0x001f, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* low 5 bits read as a unit */
322		PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, NULL)
	322	PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)
323	323	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL )      /* sound->main buffer status (0=empty) */
324	324	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(sound_latch_state_r, NULL)
325	325	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNUSED )
r6740	r6741
366	366
367	367	PORT_START("240000")
368	368	PORT_BIT( 0x001f, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* low 5 bits read as a unit */
369		PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, NULL)
	369	PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)
370	370	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL )      /* sound->main buffer status (0=empty) */
371	371	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(sound_latch_state_r, NULL)
372	372	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNUSED )
r6740	r6741
422	422	MDRV_MACHINE_START(dcheese)
423	423
424	424	MDRV_EEPROM_93C46_NODEFAULT_ADD("eeprom")
	425	MDRV_TICKET_DISPENSER_ADD("ticket", 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW)
425	426
426	427	/* video hardware */
427	428	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
801	802
802	803	/*************************************
803	804	*
804		*  Driver configuration
805		*
806		*************************************/
807
808		static DRIVER_INIT( dcheese )
809		{
810		ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);
811		}
812
813
814
815		/*************************************
816		*
817	805	*  Game driver(s)
818	806	*
819	807	*************************************/
820	808
821		GAME( 1993, dcheese,  0,       dcheese, dcheese, dcheese, ROT90, "HAR", "Double Cheese", GAME_SUPPORTS_SAVE )
822		GAME( 1993, lottof2,  0,       dcheese, lottof2, dcheese, ROT0,  "HAR", "Lotto Fun 2", GAME_SUPPORTS_SAVE )
823		GAME( 1993, cecmatch, 0,       fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "ChuckECheese's Match Game", GAME_SUPPORTS_SAVE )
824		GAME( 1994, fredmem,  0,       fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (World?, Ticket version, 3/17/95)", GAME_SUPPORTS_SAVE )
825		GAME( 1994, fredmemus,fredmem, fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (US, High Score version, 3/10/95)", GAME_SUPPORTS_SAVE )
826		GAME( 1994, fredmemuk,fredmem, fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (UK, 3/17/95)", GAME_SUPPORTS_SAVE )
827		GAME( 1994, fredmemj, fredmem, fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Japan, High Score version, 3/20/95)", GAME_SUPPORTS_SAVE )
828		GAME( 1994, fredmemc, fredmem, fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Mandarin Chinese, 3/17/95)", GAME_SUPPORTS_SAVE )
829		GAME( 1994, fredmesp, fredmem, fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Spanish, 3/17/95)", GAME_SUPPORTS_SAVE )
	809	GAME( 1993, dcheese,   0,       dcheese, dcheese, 0, ROT90, "HAR", "Double Cheese", GAME_SUPPORTS_SAVE )
	810	GAME( 1993, lottof2,   0,       dcheese, lottof2, 0, ROT0,  "HAR", "Lotto Fun 2", GAME_SUPPORTS_SAVE )
	811	GAME( 1993, cecmatch,  0,       fredmem, fredmem, 0, ROT0,  "Coastal Amusements", "ChuckECheese's Match Game", GAME_SUPPORTS_SAVE )
	812	GAME( 1994, fredmem,   0,       fredmem, fredmem, 0, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (World?, Ticket version, 3/17/95)", GAME_SUPPORTS_SAVE )
	813	GAME( 1994, fredmemus, fredmem, fredmem, fredmem, 0, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (US, High Score version, 3/10/95)", GAME_SUPPORTS_SAVE )
	814	GAME( 1994, fredmemuk, fredmem, fredmem, fredmem, 0, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (UK, 3/17/95)", GAME_SUPPORTS_SAVE )
	815	GAME( 1994, fredmemj,  fredmem, fredmem, fredmem, 0, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Japan, High Score version, 3/20/95)", GAME_SUPPORTS_SAVE )
	816	GAME( 1994, fredmemc,  fredmem, fredmem, fredmem, 0, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Mandarin Chinese, 3/17/95)", GAME_SUPPORTS_SAVE )
	817	GAME( 1994, fredmesp,  fredmem, fredmem, fredmem, 0, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Spanish, 3/17/95)", GAME_SUPPORTS_SAVE )

src/mame/drivers/chqflag.c

r6740	r6741
15	15	#include "deprecat.h"
16	16	#include "cpu/z80/z80.h"
17	17	#include "cpu/konami/konami.h"
18		#include "video/konamiic.h"
	18	#include "video/konicdev.h"
19	19	#include "sound/2151intf.h"
20	20	#include "sound/k007232.h"
21	21
22	22	#include "chqflag.lh"
23	23
24		static int K051316_readroms;
	24	static int k051316_readroms;
25	25
26	26	static WRITE8_DEVICE_HANDLER( k007232_extvolume_w );
27	27
r6740	r6741
29	29	VIDEO_START( chqflag );
30	30	VIDEO_UPDATE( chqflag );
31	31
	32	extern void chqflag_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
	33	extern void chqflag_zoom_callback_0(running_machine *machine, int *code,int *color,int *flags);
	34	extern void chqflag_zoom_callback_1(running_machine *machine, int *code,int *color,int *flags);
32	35
33	36	static INTERRUPT_GEN( chqflag_interrupt )
34	37	{
	38	const device_config *k051960 = devtag_get_device(device->machine, "k051960");
35	39	if (cpu_getiloops(device) == 0)
36	40	{
37		if (K051960_is_IRQ_enabled())
	41	if (k051960_is_irq_enabled(k051960))
38	42	cpu_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE);
39	43	}
40	44	else if (cpu_getiloops(device) % 2)
41	45	{
42		if (K051960_is_NMI_enabled())
	46	if (k051960_is_nmi_enabled(k051960))
43	47	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
44	48	}
45	49	}
46	50
47	51	static WRITE8_HANDLER( chqflag_bankswitch_w )
48	52	{
	53	const device_config *k051316_1 = devtag_get_device(space->machine, "k051316_1");
49	54	int bankaddress;
50	55	UINT8 *RAM = memory_region(space->machine, "maincpu");
51	56
r6740	r6741
60	65	memory_install_write8_handler(space, 0x1800, 0x1fff, 0, 0, paletteram_xBBBBBGGGGGRRRRR_be_w);
61	66	memory_set_bankptr(space->machine, "bank5", space->machine->generic.paletteram.v);
62	67
63		if (K051316_readroms)
64		memory_install_readwrite8_handler(space, 0x1000, 0x17ff, 0, 0, K051316_rom_0_r, K051316_0_w);   /* 051316 #1 (ROM test) */
	68	if (k051316_readroms)
	69	memory_install_readwrite8_device_handler(space, k051316_1, 0x1000, 0x17ff, 0, 0, k051316_rom_r, k051316_w);   /* 051316 #1 (ROM test) */
65	70	else
66		memory_install_readwrite8_handler(space, 0x1000, 0x17ff, 0, 0, K051316_0_r, K051316_0_w);      /* 051316 #1 */
	71	memory_install_readwrite8_device_handler(space, k051316_1, 0x1000, 0x17ff, 0, 0, k051316_r, k051316_w);      /* 051316 #1 */
67	72	}
68	73	else
69	74	{
r6740	r6741
76	81
77	82	static WRITE8_HANDLER( chqflag_vreg_w )
78	83	{
	84	const device_config *k051316_2 = devtag_get_device(space->machine, "k051316_2");
79	85	static int last;
80	86
81	87	/* bits 0 & 1 = coin counters */
82		coin_counter_w(space->machine, 1,data & 0x01);
83		coin_counter_w(space->machine, 0,data & 0x02);
	88	coin_counter_w(space->machine, 1, data & 0x01);
	89	coin_counter_w(space->machine, 0, data & 0x02);
84	90
85	91	/* bit 4 = enable rom reading thru K051316 #1 & #2 */
86		K051316_readroms = (data & 0x10);
87		if (K051316_readroms)
88		memory_install_read8_handler(space, 0x2800, 0x2fff, 0, 0, K051316_rom_1_r);   /* 051316 (ROM test) */
	92	k051316_readroms = (data & 0x10);
	93	if (k051316_readroms)
	94	memory_install_read8_device_handler(space, k051316_2, 0x2800, 0x2fff, 0, 0, k051316_rom_r);   /* 051316 (ROM test) */
89	95	else
90		memory_install_read8_handler(space, 0x2800, 0x2fff, 0, 0, K051316_1_r);      /* 051316 */
	96	memory_install_read8_device_handler(space, k051316_2, 0x2800, 0x2fff, 0, 0, k051316_r);      /* 051316 */
91	97
92	98	/* Bits 3-7 probably control palette dimming in a similar way to TMNT2/Sunset Riders, */
93	99	/* however I don't have enough evidence to determine the exact behaviour. */
r6740	r6741
152	158	AM_RANGE(0x0000, 0x0fff) AM_RAM                                    /* RAM */
153	159	AM_RANGE(0x1000, 0x17ff) AM_RAMBANK("bank1")                        /* banked RAM (RAM/051316 (chip 1)) */
154	160	AM_RANGE(0x1800, 0x1fff) AM_RAMBANK("bank2")                        /* palette + RAM */
155		AM_RANGE(0x2000, 0x2007) AM_READWRITE(K051937_r, K051937_w)               /* Sprite control registers */
156		AM_RANGE(0x2400, 0x27ff) AM_READWRITE(K051960_r, K051960_w)               /* Sprite RAM */
157		AM_RANGE(0x2800, 0x2fff) AM_READ_BANK("bank3") AM_WRITE(K051316_1_w)      /* 051316 zoom/rotation (chip 2) */
	161	AM_RANGE(0x2000, 0x2007) AM_DEVREADWRITE("k051960", k051937_r, k051937_w)               /* Sprite control registers */
	162	AM_RANGE(0x2400, 0x27ff) AM_DEVREADWRITE("k051960", k051960_r, k051960_w)               /* Sprite RAM */
	163	AM_RANGE(0x2800, 0x2fff) AM_READ_BANK("bank3") AM_DEVWRITE("k051316_2", k051316_w)      /* 051316 zoom/rotation (chip 2) */
158	164	AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_w)                        /* sound code # */
159	165	AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w)               /* cause interrupt on audio CPU */
160	166	AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w)                  /* bankswitch control */
r6740	r6741
164	170	AM_RANGE(0x3201, 0x3201) AM_READ_PORT("IN0")                        /* DIPSW #3, SW 4 */
165	171	AM_RANGE(0x3203, 0x3203) AM_READ_PORT("DSW2")                        /* DIPSW #2 */
166	172	AM_RANGE(0x3300, 0x3300) AM_WRITE(watchdog_reset_w)                     /* watchdog timer */
167		AM_RANGE(0x3400, 0x341f) AM_READWRITE(K051733_r, K051733_w)               /* 051733 (protection) */
168		AM_RANGE(0x3500, 0x350f) AM_WRITE(K051316_ctrl_0_w)                     /* 051316 control registers (chip 1) */
169		AM_RANGE(0x3600, 0x360f) AM_WRITE(K051316_ctrl_1_w)                     /* 051316 control registers (chip 2) */
	173	AM_RANGE(0x3400, 0x341f) AM_DEVREADWRITE("k051733", k051733_r, k051733_w)               /* 051733 (protection) */
	174	AM_RANGE(0x3500, 0x350f) AM_DEVWRITE("k051316_1", k051316_ctrl_w)                     /* 051316 control registers (chip 1) */
	175	AM_RANGE(0x3600, 0x360f) AM_DEVWRITE("k051316_2", k051316_ctrl_w)                     /* 051316 control registers (chip 2) */
170	176	AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w)                  /* select accelerator/wheel */
171	177	AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2")                        /* Brake + Shift + ? */
172	178	AM_RANGE(0x3702, 0x3702) AM_READWRITE(analog_read_r, select_analog_ctrl_w)   /* accelerator/wheel */
r6740	r6741
326	332	volume_callback1
327	333	};
328	334
	335	static const k051960_interface chqflag_k051960_intf =
	336	{
	337	"gfx1", 0,
	338	NORMAL_PLANE_ORDER,
	339	KONAMI_ROM_DEINTERLEAVE_2,
	340	chqflag_sprite_callback
	341	};
	342
	343	static const k051316_interface chqflag_k051316_intf_1 =
	344	{
	345	"gfx2", 1,
	346	4, FALSE, 0,
	347	0, 7, 0,
	348	chqflag_zoom_callback_0
	349	};
	350
	351	static const k051316_interface chqflag_k051316_intf_2 =
	352	{
	353	"gfx3", 2,
	354	8, TRUE, 0xc0,
	355	1, 0, 0,
	356	chqflag_zoom_callback_1
	357	};
	358
329	359	static MACHINE_DRIVER_START( chqflag )
330	360
331	361	/* basic machine hardware */
r6740	r6741
353	383	MDRV_VIDEO_START(chqflag)
354	384	MDRV_VIDEO_UPDATE(chqflag)
355	385
	386	MDRV_K051960_ADD("k051960", chqflag_k051960_intf)
	387	MDRV_K051316_ADD("k051316_1", chqflag_k051316_intf_1)
	388	MDRV_K051316_ADD("k051316_2", chqflag_k051316_intf_2)
	389	MDRV_K051733_ADD("k051733")
	390
356	391	/* sound hardware */
357	392	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
358	393
r6740	r6741
384	419	ROM_REGION( 0x10000, "audiocpu", 0 )   /* 64k for the SOUND CPU */
385	420	ROM_LOAD( "717e01",      0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) )
386	421
387		ROM_REGION( 0x100000, "gfx1", 0 )   /* graphics (addressable by the main CPU) */
	422	ROM_REGION( 0x100000, "gfx1", 0 )   /* graphics (addressable by the main CPU) */
388	423	ROM_LOAD( "717e04",      0x000000, 0x080000, CRC(1a50a1cc) SHA1(bc16fab84c637ed124e37b115ddc0149560b727d) )   /* sprites */
389	424	ROM_LOAD( "717e05",      0x080000, 0x080000, CRC(46ccb506) SHA1(3ed1f54744fc5cdc0f48e42f250c366267a8199a) )   /* sprites */
390	425
r6740	r6741
414	449	ROM_REGION( 0x10000, "audiocpu", 0 )   /* 64k for the SOUND CPU */
415	450	ROM_LOAD( "717e01",      0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) )
416	451
417		ROM_REGION( 0x100000, "gfx1", 0 )   /* graphics (addressable by the main CPU) */
	452	ROM_REGION( 0x100000, "gfx1", 0 )   /* graphics (addressable by the main CPU) */
418	453	ROM_LOAD( "717e04",      0x000000, 0x080000, CRC(1a50a1cc) SHA1(bc16fab84c637ed124e37b115ddc0149560b727d) )   /* sprites */
419	454	ROM_LOAD( "717e05",      0x080000, 0x080000, CRC(46ccb506) SHA1(3ed1f54744fc5cdc0f48e42f250c366267a8199a) )   /* sprites */
420	455
r6740	r6741
439	474	static DRIVER_INIT( chqflag )
440	475	{
441	476	UINT8 *RAM = memory_region(machine, "maincpu");
442
443		konami_rom_deinterleave_2(machine, "gfx1");
444	477	machine->generic.paletteram.u8 = &RAM[0x58000];
445	478	}
446	479

src/mame/drivers/brkthru.c

r6740	r6741
53	53	#include "cpu/m6809/m6809.h"
54	54	#include "sound/2203intf.h"
55	55	#include "sound/3526intf.h"
56		#include "brkthru.h"
	56	#include "includes/brkthru.h"
57	57
58	58
59	59	#define MASTER_CLOCK      XTAL_12MHz

src/mame/drivers/tourtabl.c

r6740	r6741
13	13	#include "video/tia.h"
14	14
15	15
16		#define MASTER_CLOCK   3579575
	16	#define MASTER_CLOCK   XTAL_3_579545MHz
17	17
18	18
19	19	static WRITE8_DEVICE_HANDLER( tourtabl_led_w )

src/mame/drivers/trvmadns.c

r6740	r6741
77	77
78	78	if((data & 0xf0) == 0xa0)
79	79	{
	80	/* FIXME: selects GFX char RAM bank here */
80	81	}
81	82	else if((data & 0xf0) == 0x80 || (data & 0xf0) == 0x90)
82	83	{
r6740	r6741
146	147	gfx_element_mark_dirty(space->machine->gfx[0], offset/16);
147	148	}
148	149
149		#ifdef UNUSED_FUNCTION
150		//WRONG!
151	150	static WRITE8_HANDLER( trvmadns_palette_w )
152	151	{
153		int r, g, b;
154
	152	int r,g,b,datax;
155	153	space->machine->generic.paletteram.u8[offset] = data;
	154	offset>>=1;
	155	datax=space->machine->generic.paletteram.u8[offset*2+1]+256*space->machine->generic.paletteram.u8[offset*2];
156	156
157		r = space->machine->generic.paletteram.u8[offset & ~1] & 0xf;
158		g = (space->machine->generic.paletteram.u8[offset | 1] & 0xf0) >> 4;
159		b = space->machine->generic.paletteram.u8[offset | 1] & 0xf;
	157	b = (((datax & 0x0007)>>0) | ((datax & 0x0200)>>6)) ^ 0xf;
	158	r = (((datax & 0x0038)>>3) | ((datax & 0x0400)>>7)) ^ 0xf;
	159	g = (((datax & 0x01c0)>>6) | ((datax & 0x0800)>>8)) ^ 0xf;
160	160
161		palette_set_color_rgb(space->machine, offset >> 1, pal4bit(r), pal4bit(g), pal4bit(b));
	161	palette_set_color_rgb(space->machine, offset, pal4bit(r), pal4bit(g), pal4bit(b));
162	162	}
163		#endif
164	163
	164
165	165	static WRITE8_HANDLER( w2 )
166	166	{
167	167	/*  static int old = -1;
r6740	r6741
202	202	AM_RANGE(0x7000, 0x7fff) AM_ROMBANK("bank2")
203	203	AM_RANGE(0x6000, 0x7fff) AM_WRITE(trvmadns_gfxram_w) AM_BASE(&trvmadns_gfxram)
204	204	AM_RANGE(0x8000, 0x87ff) AM_RAM
205		AM_RANGE(0xc000, 0xc01f) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_le_w) AM_BASE_GENERIC(paletteram)
206		AM_RANGE(0xa000, 0xbfff) AM_RAM_WRITE(trvmadns_tileram_w) AM_BASE(&trvmadns_tileram)
	205	AM_RANGE(0xa000, 0xa7ff) AM_RAM_WRITE(trvmadns_tileram_w) AM_BASE(&trvmadns_tileram)
	206	AM_RANGE(0xc000, 0xc01f) AM_RAM_WRITE(trvmadns_palette_w) AM_BASE_GENERIC(paletteram)
207	207	AM_RANGE(0xe000, 0xe000) AM_WRITE(w2)//NOP
208	208	AM_RANGE(0xe004, 0xe004) AM_WRITE(w3)//NOP
209	209	ADDRESS_MAP_END
r6740	r6741
251	251	color = (attr & 0x18) >> 3;
252	252	flag = TILE_FLIPXY((attr & 0x06) >> 1);
253	253
254		if((~attr & 0x20) || (~attr & 0x40))
255		flag |= TILE_FORCE_LAYER0;
	254	//  if((~attr & 0x20) || (~attr & 0x40))
	255	//      flag |= TILE_FORCE_LAYER0;
256	256
257	257	//0x20? tile transparent pen 1?
258	258	//0x40? tile transparent pen 1?
259	259
260	260	SET_TILE_INFO(0,tile,color,flag);
	261
	262	tileinfo->category = (attr & 0x20)>>5;
261	263	}
262	264
263	265	static VIDEO_START( trvmadns )
264	266	{
265	267	bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
266	268
267		tilemap_set_transparent_pen(bg_tilemap,1);
	269	//  tilemap_set_transparent_pen(fg_tilemap,1);
268	270
269	271	gfx_element_set_source(machine->gfx[0], trvmadns_gfxram);
270	272	}
271	273
272	274	static VIDEO_UPDATE( trvmadns )
273	275	{
	276	int x,y,count;
	277	const gfx_element *gfx = screen->machine->gfx[0];
	278
274	279	bitmap_fill(bitmap,cliprect,0xd);
275	280
276		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
	281	count = 0;
277	282
	283	for (y=0;y<32;y++)
	284	{
	285	for (x=0;x<32;x++)
	286	{
	287	int attr = trvmadns_tileram[count*2+0];
	288	int tile = trvmadns_tileram[count*2+1] | ((attr & 0x01) << 8);
	289	int color = (attr & 0x18) >> 3;
	290	int flipx = attr & 4;
	291	int flipy = attr & 2;
	292
	293	if(!(attr & 0x20))
	294	drawgfx_opaque(bitmap,cliprect,gfx,tile,color,flipx,flipy,(x*8),(y*8));
	295	count++;
	296	}
	297	}
	298
	299	count = 0;
	300
	301	for (y=0;y<32;y++)
	302	{
	303	for (x=0;x<32;x++)
	304	{
	305	int attr = trvmadns_tileram[count*2+0];
	306	int tile = trvmadns_tileram[count*2+1] | ((attr & 0x01) << 8);
	307	int color = (attr & 0x18) >> 3;
	308	int flipx = attr & 4;
	309	int flipy = attr & 2;
	310
	311	if(attr & 0x20)
	312	drawgfx_transpen(bitmap,cliprect,gfx,tile,color,flipx,flipy,(x*8),(y*8),1);
	313	count++;
	314	}
	315	}
	316
278	317	return 0;
279	318	}
280	319

src/mame/drivers/cloud9.c

r6740	r6741
93	93	#include "driver.h"
94	94	#include "cpu/m6502/m6502.h"
95	95	#include "sound/pokey.h"
96		#include "cloud9.h"
	96	#include "includes/cloud9.h"
97	97
98	98
99	99	#define MASTER_CLOCK          (10000000)

src/mame/drivers/backfire.c

r6740	r6741
12	12
13	13	#define DE156CPU ARM
14	14	#include "driver.h"
15		#include "decocrpt.h"
16		#include "deco32.h"
	15	#include "includes/decocrpt.h"
	16	#include "includes/deco32.h"
17	17	#include "machine/eeprom.h"
18	18	#include "sound/okim6295.h"
19	19	#include "sound/ymz280b.h"
20	20	#include "cpu/arm/arm.h"
21		#include "deco16ic.h"
	21	#include "includes/deco16ic.h"
22	22	#include "rendlay.h"
23	23
24	24	static UINT32 *backfire_spriteram32_1;

src/mame/drivers/sidepckt.c

r6740	r6741
20	20	#include "sound/3526intf.h"
21	21
22	22	/* from video */
	23	extern UINT8 *sidepckt_videoram;
	24	extern UINT8 *sidepckt_colorram;
	25
23	26	PALETTE_INIT( sidepckt );
24	27	VIDEO_START( sidepckt );
25	28	VIDEO_UPDATE( sidepckt );
r6740	r6741
127	130
128	131	static ADDRESS_MAP_START( sidepckt_map, ADDRESS_SPACE_PROGRAM, 8 )
129	132	AM_RANGE(0x0000, 0x0fff) AM_RAM
130		AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(sidepckt_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
	133	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(sidepckt_videoram_w) AM_BASE(&sidepckt_videoram)
131	134	AM_RANGE(0x1400, 0x17ff) AM_RAM // ???
132		AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(sidepckt_colorram_w) AM_BASE_GENERIC(colorram)
	135	AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(sidepckt_colorram_w) AM_BASE(&sidepckt_colorram)
133	136	AM_RANGE(0x1c00, 0x1fff) AM_RAM // ???
134	137	AM_RANGE(0x2000, 0x20ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
135	138	AM_RANGE(0x2100, 0x24ff) AM_RAM // ???

src/mame/drivers/starwars.c

r6740	r6741
28	28	#include "video/avgdvg.h"
29	29	#include "sound/tms5220.h"
30	30	#include "sound/pokey.h"
31		#include "starwars.h"
32		#include "slapstic.h"
	31	#include "includes/starwars.h"
	32	#include "includes/slapstic.h"
33	33
34	34	#define MASTER_CLOCK (12096000)
35	35	#define CLOCK_3KHZ  (MASTER_CLOCK / 4096)

src/mame/drivers/exerion.c

r6740	r6741
15	15
16	16	#include "driver.h"
17	17	#include "cpu/z80/z80.h"
18		#include "exerion.h"
	18	#include "includes/exerion.h"
19	19	#include "sound/ay8910.h"
20	20
21	21

src/mame/drivers/segas18.c

r6740	r6741
33	33	#include "cpu/mcs51/mcs51.h"
34	34	#include "deprecat.h"
35	35	#include "machine/segaic16.h"
36		#include "system16.h"
37		#include "genesis.h"
	36	#include "includes/system16.h"
	37	#include "includes/genesis.h"
38	38	#include "sound/2612intf.h"
39	39	#include "sound/rf5c68.h"
40	40

src/mame/drivers/coolridr.c

r6740	r6741
22	22
23	23	This game runs on SYSTEM-H1 hardware. Only one known game exists on this
24	24	PCB and this is it. The hardware seems overly complex for a 2D bike
25		racing game? This might have been an experimental design transitioning
26		between Model 1 and Model 2 or a step up from ST-V's 2D to pseudo 3D/2.5D?
27		The design of the PCB is very similar to vanilla Model 2
	25	racing game? The design of the PCB is very similar to vanilla Model 2
28	26	(i.e. Daytona etc). However instead of fully custom-badged chips,
29		many of the custom chips are off-the-shelf Hitachi gate-arrays.
	27	many of the custom chips are off-the-shelf Hitachi/Toshiba gate-arrays.
30	28
31	29
32	30	PCB Layouts
r6740	r6741
60	58	JP9 set to 1-2
61	59	JP10-12 open (no jumpers) but JP12 pin 2 tied to JP10 pin 1
62	60	IC*     - IC29-IC32 are 27C4002 EPROM
63		All other ROMs are 42 pin DIP 16M mask ROM
	61	IC1-IC10 are DIP42 32M mask ROM
	62	IC11-IC18 are DIP42 16M mask ROM
64	63
65	64
66	65	SYSTEM-H1 COMMUNICATION-BD
r6740	r6741
70	69	|                 CN2              |
71	70	|       74F74   74F245  MB84256    |
72	71	|       74F373  74F245  MB84256    |
73		|MB89273A         CN1              |
	72	|MB89237A         CN1              |
74	73	|                                  |
75	74	|       74F138 74F04   74F125      |
76	75	|                                  |
r6740	r6741
84	83	|       LED               CN3      |
85	84	|----------------------------------|
86	85	Notes: (All IC's shown)
87		CN1/2 - Connectors joining to CPU board
88		CN3   - Connector joining to Filter board
89		RX/TX - Optical cable connections for network (not used)
90		JP*   - 3x 2-pin jumpers. JP1 shorted, other jumpers open
	86	CN1/2   - Connectors joining to CPU board
	87	CN3     - Connector joining to Filter board
	88	RX/TX   - Optical cable connections for network (not used)
	89	JP*     - 3x 2-pin jumpers. JP1 shorted, other jumpers open
	90	MB84256 - Fujitsu MB84256 32k x8 SRAM (NDIP28)
	91	MB89374 - Fujitsu MB89374 Data Link Controller (SDIP42)
	92	MB89237A- Fujitsu MB89237A 8-Bit Proprietary Microcontroller (?) (DIP40)
	93	SN75179 - Texas Instruments SN75179 Differential Driver and Receiver Pair (DIP8)
91	94
92	95
93	96	SYSTEM-H1 CPU BD
r6740	r6741
197	200	M5M411860   - Mitsubishi M5M411860TP435SF00-7 DRAM with fast page mode, 64k-words x 18 bits per word (maybe?) (TSOP42)
198	201	TC55328     - Toshiba TC55328AJ-15 32k x8 SRAM (SOJ24)
199	202	PAL1        - GAL16V8B also marked '315-5803' (DIP20)
200		PAL2        - GAL16V8B also marked '315-5804' (DIP20)
	203	PAL2        - GAL16V8B also marked '315-5864' (DIP20)
201	204	Sega Custom - 315-5648 (QFP64, x4)
202	205	315-5691 also marked 'HG62S0791R17F' (QFP208)
203	206	315-5692 also marked 'HG51B152FD' (QFP256)
r6740	r6741
208	211	315-5697 (QFP208)
209	212	315-5698 (QFP144)
210	213
	214	*******************************************************************************************************
211	215
	216	Note: This hardware appears to have been designed as a test-bed for a new RLE based compression system
	217	used by the zooming sprites.  It is possible that Sega planned on using this for ST-V, but
	218	decided against it. Video/CPU part numbers give an interesting insight, since video hardware #
	219	sits between Model 1 & Model 2.
	220
	221	Year on
	222	System      PCB     PCB #      PALs
	223	---------------------------------------------------------
	224	System32    1990    837-7428   315-5441 315-5442
	225	SysMulti32  1992    837-8676   315-5596
	226	Model 1     1992    837-8886   315-5546 315-5483 315-5484
	227	Model 2     1994    837-10071  315-5737 315-5741
	228	Model 2A    1994    837-10848  315-5737 315-5815
	229	STV         1994    837-10934  315-5833
	230
	231	H1 (CPU)    1994    837-10389  315-5800 315-5801 315-5802
	232	H1 (Video)  1994    837-9621   315-5803 315-5864
	233
212	234	******************************************************************************************************/
213	235
214	236	#include "driver.h"
r6740	r6741
1088	1110	ROM_REGION( 0x100000, "sub", 0 ) /* SH1 */
1089	1111	ROM_LOAD16_WORD_SWAP( "ep17662.12", 0x000000, 0x020000,  CRC(50d66b1f) SHA1(f7b7f2f5b403a13b162f941c338a3e1207762a0b) )
1090	1112
1091		/* these 10 interleave somehow?? */
1092		ROM_REGION( 0x1600000, "gfx5", ROMREGION_ERASEFF ) /* Other Roms */
	1113	/* these are compressed sprite data */
	1114	ROM_REGION( 0x2800000, "gfx5", ROMREGION_ERASEFF )
1093	1115	/* logical interleaving according to the readme? */
1094		ROM_LOAD32_WORD_SWAP( "mp17640.1", 0x0000002, 0x0200000, CRC(5ecd98c7) SHA1(22027c1e9e6195d27f29a5779695d8597f68809e) )
1095		ROM_LOAD32_WORD_SWAP( "mp17645.6", 0x0000000, 0x0200000, CRC(00954173) SHA1(863f32565296448ef10992dc3c0480411eb2b193) )
1096		ROM_LOAD32_WORD_SWAP( "mp17641.2", 0x0400002, 0x0200000, CRC(a59b0605) SHA1(c93f84fd58f1942b40b7a55058e02a18a3dec3af) )
1097		ROM_LOAD32_WORD_SWAP( "mp17646.7", 0x0400000, 0x0200000, CRC(7ae4d92e) SHA1(8a0eaa5dce112289ac5d16ad5dc7f5895e71e87b) )
1098		ROM_LOAD32_WORD_SWAP( "mp17642.3", 0x0800002, 0x0200000, CRC(5f8a1827) SHA1(23179d751777436f2a4f652132001d5e425d8cd5) )
1099		ROM_LOAD32_WORD_SWAP( "mp17647.8", 0x0800000, 0x0200000, CRC(082faee8) SHA1(c047b8475517f96f481c09471a77aa0d103631d6) )
1100		ROM_LOAD32_WORD_SWAP( "mp17643.4", 0x0c00002, 0x0200000, CRC(44a05dd0) SHA1(32aa86f8761ec6ffceb63979c44828603c244e7d) )
1101		ROM_LOAD32_WORD_SWAP( "mp17648.9", 0x0c00000, 0x0200000, CRC(0791802f) SHA1(acad55bbd22c7e955a729c8abed9509fc6f10927) )
1102		ROM_LOAD32_WORD_SWAP( "mp17644.5", 0x1000002, 0x0200000, CRC(be2763c5) SHA1(1044b0a73e334337b0b9ac958df59480aedfb942) )
1103		ROM_LOAD32_WORD_SWAP( "mp17649.10",0x1000000, 0x0200000, CRC(567fbc0a) SHA1(3999c99b26f13d97ac1c58de00a44049ee7775fd) )
1104
1105		/*  ROMX_LOAD( "mp17640.1", 0x0000000, 0x0200000, CRC(5ecd98c7) SHA1(22027c1e9e6195d27f29a5779695d8597f68809e), ROM_SKIP(9) )
1106		ROMX_LOAD( "mp17641.2", 0x0000001, 0x0200000, CRC(a59b0605) SHA1(c93f84fd58f1942b40b7a55058e02a18a3dec3af), ROM_SKIP(9) )
1107		ROMX_LOAD( "mp17642.3", 0x0000002, 0x0200000, CRC(5f8a1827) SHA1(23179d751777436f2a4f652132001d5e425d8cd5), ROM_SKIP(9) )
1108		ROMX_LOAD( "mp17643.4", 0x0000003, 0x0200000, CRC(44a05dd0) SHA1(32aa86f8761ec6ffceb63979c44828603c244e7d), ROM_SKIP(9) )
1109		ROMX_LOAD( "mp17644.5", 0x0000004, 0x0200000, CRC(be2763c5) SHA1(1044b0a73e334337b0b9ac958df59480aedfb942), ROM_SKIP(9) )
1110		ROMX_LOAD( "mp17645.6", 0x0000005, 0x0200000, CRC(00954173) SHA1(863f32565296448ef10992dc3c0480411eb2b193), ROM_SKIP(9) )
1111		ROMX_LOAD( "mp17646.7", 0x0000006, 0x0200000, CRC(7ae4d92e) SHA1(8a0eaa5dce112289ac5d16ad5dc7f5895e71e87b), ROM_SKIP(9) )
1112		ROMX_LOAD( "mp17647.8", 0x0000007, 0x0200000, CRC(082faee8) SHA1(c047b8475517f96f481c09471a77aa0d103631d6), ROM_SKIP(9) )
1113		ROMX_LOAD( "mp17648.9", 0x0000008, 0x0200000, CRC(0791802f) SHA1(acad55bbd22c7e955a729c8abed9509fc6f10927), ROM_SKIP(9) )
1114		ROMX_LOAD( "mp17649.10",0x0000009, 0x0200000, CRC(567fbc0a) SHA1(3999c99b26f13d97ac1c58de00a44049ee7775fd), ROM_SKIP(9) )*/
	1116	ROM_LOAD32_WORD_SWAP( "mpr-17640.ic1", 0x0000002, 0x0400000, CRC(981e3e69) SHA1(d242055e0359ec4b5fac4676b2f974fbc974cc68) )
	1117	ROM_LOAD32_WORD_SWAP( "mpr-17645.ic6", 0x0000000, 0x0400000, CRC(56968d07) SHA1(e88c3d66ea05affb4681a25d155f097bd1b5a84b) )
	1118	ROM_LOAD32_WORD_SWAP( "mpr-17641.ic2", 0x0800002, 0x0400000, CRC(fccc3dae) SHA1(0df7fd8b1110ba9063dc4dc40301267229cb9a35) )
	1119	ROM_LOAD32_WORD_SWAP( "mpr-17646.ic7", 0x0800000, 0x0400000, CRC(b77eb2ad) SHA1(b832c0f1798aca39adba840d56ae96a75346670a) )
	1120	ROM_LOAD32_WORD_SWAP( "mpr-17642.ic3", 0x1000002, 0x0400000, CRC(1a5bcc73) SHA1(a7df04c0a326323ea185db5f55b3e0449d76c535) )
	1121	ROM_LOAD32_WORD_SWAP( "mpr-17647.ic8", 0x1000000, 0x0400000, CRC(9dd9330c) SHA1(c91a7f497c1f4bd283bd683b06dff88893724d51) )
	1122	ROM_LOAD32_WORD_SWAP( "mpr-17643.ic4", 0x1800002, 0x0400000, CRC(5100f23b) SHA1(659c2300399ff1cbd24fb1eb18cfd6c26e06fd96) )
	1123	ROM_LOAD32_WORD_SWAP( "mpr-17648.ic9", 0x1800000, 0x0400000, CRC(bf184cce) SHA1(62c004ea279f9a649d21426369336c2e1f9d24da) )
	1124	ROM_LOAD32_WORD_SWAP( "mpr-17644.ic5", 0x2000002, 0x0400000, CRC(80199c79) SHA1(e525d8ee9f9176101629853e50cca73b02b16a38) )
	1125	ROM_LOAD32_WORD_SWAP( "mpr-17649.ic10",0x2000000, 0x0400000, CRC(618c47ae) SHA1(5b69ad36fcf8e70d34c3b2fc71412ce953c5ceb3) )
1115	1126	ROM_END
1116	1127
1117	1128	/*TODO: there must be an irq line with custom vector located somewhere that writes to here...*/

src/mame/drivers/nitedrvr.c

r6740	r6741
38	38	#include "cpu/m6502/m6502.h"
39	39	#include "machine/rescap.h"
40	40	#include "sound/discrete.h"
41		#include "nitedrvr.h"
	41	#include "includes/nitedrvr.h"
42	42
43	43	/* Memory Map */
44	44
r6740	r6741
136	136
137	137	static MACHINE_DRIVER_START( nitedrvr )
138	138	// basic machine hardware
139		MDRV_CPU_ADD("maincpu", M6502, 12096000/12) // 1 MHz
	139	MDRV_CPU_ADD("maincpu", M6502, XTAL_12_096MHz/12) // 1 MHz
140	140	MDRV_CPU_PROGRAM_MAP(nitedrvr_map)
141	141	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
142	142	MDRV_WATCHDOG_VBLANK_INIT(3)
r6740	r6741
144	144	MDRV_MACHINE_START(nitedrvr)
145	145	MDRV_MACHINE_RESET(nitedrvr)
146	146
	147	MDRV_TIMER_ADD_PERIODIC("crash_timer", nitedrvr_crash_toggle_callback, NSEC(PERIOD_OF_555_ASTABLE_NSEC(RES_K(180), 330, CAP_U(1))))
	148
147	149	// video hardware
148	150
149	151	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/rainbow.c

r6740	r6741
320	320	#include "driver.h"
321	321	#include "cpu/z80/z80.h"
322	322	#include "cpu/m68000/m68000.h"
323		#include "taitoipt.h"
	323	#include "includes/taitoipt.h"
324	324	#include "video/taitoic.h"
325	325	#include "audio/taitosnd.h"
326	326	#include "sound/2203intf.h"

src/mame/drivers/rungun.c

r6740	r6741
37	37
38	38	#include "driver.h"
39	39
40		#include "video/konamiic.h"
	40	#include "video/konicdev.h"
41	41	#include "cpu/m68000/m68000.h"
42	42	#include "cpu/z80/z80.h"
43		#include "machine/eeprom.h"
	43	#include "machine/eepromdev.h"
44	44	#include "sound/k054539.h"
45		#include "konamipt.h"
	45	#include "includes/konamipt.h"
46	46
47	47	VIDEO_START( rng );
48	48	VIDEO_UPDATE( rng );
r6740	r6741
52	52	WRITE16_HANDLER( rng_936_videoram_w );
53	53
54	54	extern UINT16 *rng_936_videoram;
	55	extern void rng_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask);
55	56
56	57	static UINT16 *rng_sysreg;
57		static int init_eeprom_count;
58	58	static int rng_z80_control;
59	59	static int rng_sound_status;
60	60
r6740	r6741
69	69	"0100110000000" /* unlock command */
70	70	};
71	71
72		static NVRAM_HANDLER( rungun )
73		{
74		if (read_or_write)
75		eeprom_save(file);
76		else
77		{
78		eeprom_init(machine, &eeprom_intf);
79
80		if (file)
81		{
82		init_eeprom_count = 0;
83		eeprom_load(file);
84		}
85		else
86		init_eeprom_count = 10;
87		}
88		}
89
90	72	static READ16_HANDLER( rng_sysregs_r )
91	73	{
92	74	UINT16 data = 0;
r6740	r6741
95	77	{
96	78	case 0x00/2:
97	79	if (input_port_read(space->machine, "DSW") & 0x20)
98		return(input_port_read(space->machine, "P1") | input_port_read(space->machine, "P3")<<8);
	80	return(input_port_read(space->machine, "P1") | input_port_read(space->machine, "P3") << 8);
99	81	else
100	82	{
101	83	data = input_port_read(space->machine, "P1") & input_port_read(space->machine, "P3");
102		return(data<<8 | data);
	84	return(data << 8 | data);
103	85	}
104	86
105	87	case 0x02/2:
106	88	if (input_port_read(space->machine, "DSW") & 0x20)
107		return(input_port_read(space->machine, "P2") | input_port_read(space->machine, "P4")<<8);
	89	return(input_port_read(space->machine, "P2") | input_port_read(space->machine, "P4") << 8);
108	90	else
109	91	{
110	92	data = input_port_read(space->machine, "P2") & input_port_read(space->machine, "P4");
111		return(data<<8 | data);
	93	return(data << 8 | data);
112	94	}
113	95
114	96	case 0x04/2:
r6740	r6741
123	105	if (ACCESSING_BITS_0_7)
124	106	{
125	107	data = input_port_read(space->machine, "DSW");
126
127		if (init_eeprom_count)
128		{
129		init_eeprom_count--;
130		data &= 0xf7;
131		}
132	108	}
133	109	return((rng_sysreg[0x06/2] & 0xff00) | data);
134	110	}
r6740	r6741
138	114
139	115	static WRITE16_HANDLER( rng_sysregs_w )
140	116	{
	117	const device_config *k055673 = devtag_get_device(space->machine, "k055673");
141	118	COMBINE_DATA(rng_sysreg + offset);
142	119
143	120	switch (offset)
r6740	r6741
153	130	*/
154	131	if (ACCESSING_BITS_0_7)
155	132	{
156		eeprom_write_bit((data & 0x01) ? 1 : 0);
157		eeprom_set_cs_line((data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
158		eeprom_set_clock_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	133	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
159	134	}
160	135
161	136	if (!(data & 0x40))
r6740	r6741
169	144	bit 2 : OBJCHA
170	145	bit 3 : enable IRQ 5
171	146	*/
172		K053246_set_OBJCHA_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	147	k053246_set_objcha_line(k055673, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
173	148	break;
174	149	}
175	150	}
r6740	r6741
212	187	AM_RANGE(0x380000, 0x39ffff) AM_RAM                                 // work RAM
213	188	AM_RANGE(0x400000, 0x43ffff) AM_READNOP   // AM_READ( K053936_0_rom_r )       // '936 ROM readback window
214	189	AM_RANGE(0x480000, 0x48001f) AM_READWRITE(rng_sysregs_r,rng_sysregs_w) AM_BASE(&rng_sysreg)
215		AM_RANGE(0x4c0000, 0x4c001f) AM_READ(K053252_word_r)                  // CCU (for scanline and vblank polling)
	190	AM_RANGE(0x4c0000, 0x4c001f) AM_DEVREAD("k053252", k053252_word_r)                  // CCU (for scanline and vblank polling)
216	191	AM_RANGE(0x540000, 0x540001) AM_WRITE(sound_irq_w)
217	192	AM_RANGE(0x58000c, 0x58000d) AM_WRITE(sound_cmd1_w)
218	193	AM_RANGE(0x58000e, 0x58000f) AM_WRITE(sound_cmd2_w)
219	194	AM_RANGE(0x580014, 0x580015) AM_READ(sound_status_msb_r)
220	195	AM_RANGE(0x580000, 0x58001f) AM_RAM                                 // sound regs read/write fall-through
221		AM_RANGE(0x5c0000, 0x5c000d) AM_READ(K053246_word_r)                  // 246A ROM readback window
222		AM_RANGE(0x5c0010, 0x5c001f) AM_WRITE(K053247_reg_word_w)
223		AM_RANGE(0x600000, 0x600fff) AM_READWRITE(K053247_word_r,K053247_word_w)   // OBJ RAM
	196	AM_RANGE(0x5c0000, 0x5c000d) AM_DEVREAD("k055673", k053246_word_r)                  // 246A ROM readback window
	197	AM_RANGE(0x5c0010, 0x5c001f) AM_DEVWRITE("k055673", k053247_reg_word_w)
	198	AM_RANGE(0x600000, 0x600fff) AM_DEVREADWRITE("k055673", k053247_word_r, k053247_word_w)   // OBJ RAM
224	199	AM_RANGE(0x601000, 0x601fff) AM_RAM                                 // communication? second monitor buffer?
225		AM_RANGE(0x640000, 0x640007) AM_WRITE(K053246_word_w)                  // '246A registers
226		AM_RANGE(0x680000, 0x68001f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)         // '936 registers
	200	AM_RANGE(0x640000, 0x640007) AM_DEVWRITE("k055673", k053246_word_w)                  // '246A registers
	201	AM_RANGE(0x680000, 0x68001f) AM_DEVWRITE("k053936", k053936_ctrl_w)         // '936 registers
227	202	AM_RANGE(0x6c0000, 0x6cffff) AM_RAM_WRITE(rng_936_videoram_w) AM_BASE(&rng_936_videoram)   // PSAC2 ('936) RAM (34v + 35v)
228		AM_RANGE(0x700000, 0x7007ff) AM_RAM AM_BASE(&K053936_0_linectrl)         // PSAC "Line RAM"
	203	AM_RANGE(0x700000, 0x7007ff) AM_DEVREADWRITE("k053936", k053936_linectrl_r, k053936_linectrl_w)         // PSAC "Line RAM"
229	204	AM_RANGE(0x740000, 0x741fff) AM_READWRITE(rng_ttl_ram_r,rng_ttl_ram_w)      // text plane RAM
230	205	AM_RANGE(0x7c0000, 0x7c0001) AM_WRITENOP                           // watchdog
231	206	#if RNG_DEBUG
232		AM_RANGE(0x5c0010, 0x5c001f) AM_READ(K053247_reg_word_r)
233		AM_RANGE(0x640000, 0x640007) AM_READ(K053246_reg_word_r)
	207	AM_RANGE(0x5c0010, 0x5c001f) AM_DEVREAD("k055673", k053247_reg_word_r)
	208	AM_RANGE(0x640000, 0x640007) AM_DEVREAD("k055673", k053246_reg_word_r)
234	209	#endif
235	210	ADDRESS_MAP_END
236	211
r6740	r6741
277	252	ADDRESS_MAP_END
278	253
279	254
280		static const k054539_interface k054539_config =
281		{
282		"shared"
283		};
	255	static INPUT_PORTS_START( rng )
	256	PORT_START("SYSTEM")
	257	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
	258	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	259	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
	260	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
	261	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
	262	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
	263	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE3 )
	264	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE4 )
	265	PORT_DIPNAME( 0x0100, 0x0000, "Freeze" )
	266	PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
	267	PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
	268	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
	269	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
	270	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
284	271
	272	PORT_START("DSW")
	273	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	274	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
	275	PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
	276	PORT_DIPNAME( 0x10, 0x00, "Monitors" )
	277	PORT_DIPSETTING(    0x00, "1" )
	278	PORT_DIPSETTING(    0x10, "2" )
	279	PORT_DIPNAME( 0x20, 0x00, "Number of players" )
	280	PORT_DIPSETTING(    0x00, "2" )
	281	PORT_DIPSETTING(    0x20, "4" )
	282	PORT_DIPNAME( 0x40, 0x00, "Sound Output" )
	283	PORT_DIPSETTING(    0x40, DEF_STR( Mono ) )
	284	PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
	285	PORT_DIPNAME( 0x04, 0x04, "Bit2 (Unknown)" )
	286	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	287	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	288	PORT_DIPNAME( 0x80, 0x80, "Bit7 (Unknown)" )
	289	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	290	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	291
	292	PORT_START( "EEPROMOUT" )
	293	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	294	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	295	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	296
	297	PORT_START("P1")
	298	KONAMI8_B123_START(1)
	299
	300	PORT_START("P2")
	301	KONAMI8_B123_START(2)
	302
	303	PORT_START("P3")
	304	KONAMI8_B123_START(3)
	305
	306	PORT_START("P4")
	307	KONAMI8_B123_START(4)
	308	INPUT_PORTS_END
	309
	310
	311
285	312	/**********************************************************************************/
286	313
287	314	static const gfx_layout bglayout =
r6740	r6741
301	328	GFXDECODE_ENTRY( "gfx1", 0, bglayout, 0x0000, 64 )
302	329	GFXDECODE_END
303	330
	331
	332
	333	static const k054539_interface k054539_config =
	334	{
	335	"shared"
	336	};
	337
	338
	339	static const k053936_interface rng_k053936_intf =
	340	{
	341	0, 34, 9
	342	};
	343
	344	static const k053247_interface rng_k055673_intf =
	345	{
	346	"screen",
	347	"gfx2", 1,
	348	K055673_LAYOUT_RNG,
	349	-8, 15,
	350	KONAMI_ROM_DEINTERLEAVE_NONE,   // there is some interleave in VIDEO_START...
	351	rng_sprite_callback
	352	};
	353
	354
304	355	static MACHINE_DRIVER_START( rng )
305	356
306	357	/* basic machine hardware */
r6740	r6741
317	368	MDRV_GFXDECODE(rungun)
318	369
319	370	MDRV_MACHINE_RESET(rng)
320		MDRV_NVRAM_HANDLER(rungun)
321	371
	372	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
	373
322	374	/* video hardware */
323	375	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_BEFORE_VBLANK)
324	376
r6740	r6741
334	386	MDRV_VIDEO_START(rng)
335	387	MDRV_VIDEO_UPDATE(rng)
336	388
	389	MDRV_K053936_ADD("k053936", rng_k053936_intf)
	390	MDRV_K055673_ADD("k055673", rng_k055673_intf)
	391	MDRV_K053252_ADD("k053252")
	392
337	393	/* sound hardware */
338	394	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
339	395
r6740	r6741
348	404	MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
349	405	MACHINE_DRIVER_END
350	406
351		static INPUT_PORTS_START( rng )
352		PORT_START("SYSTEM")
353		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
354		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
355		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
356		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
357		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
358		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
359		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE3 )
360		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE4 )
361		PORT_DIPNAME( 0x0100, 0x0000, "Freeze" )
362		PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
363		PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
364		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
365		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
366		PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
367	407
368		PORT_START("DSW")
369		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
370		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
371		PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
372		PORT_DIPNAME( 0x10, 0x00, "Monitors" )
373		PORT_DIPSETTING(    0x00, "1" )
374		PORT_DIPSETTING(    0x10, "2" )
375		PORT_DIPNAME( 0x20, 0x00, "Number of players" )
376		PORT_DIPSETTING(    0x00, "2" )
377		PORT_DIPSETTING(    0x20, "4" )
378		PORT_DIPNAME( 0x40, 0x00, "Sound Output" )
379		PORT_DIPSETTING(    0x40, DEF_STR( Mono ) )
380		PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
381		PORT_DIPNAME( 0x04, 0x04, "Bit2 (Unknown)" )
382		PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
383		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
384		PORT_DIPNAME( 0x80, 0x80, "Bit7 (Unknown)" )
385		PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
386		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
387
388		PORT_START("P1")
389		KONAMI8_B123_START(1)
390
391		PORT_START("P2")
392		KONAMI8_B123_START(2)
393
394		PORT_START("P3")
395		KONAMI8_B123_START(3)
396
397		PORT_START("P4")
398		KONAMI8_B123_START(4)
399		INPUT_PORTS_END
400
401
402	408	ROM_START( rungun )
403	409	/* main program Europe Version AA  1993, 10.8 */
404	410	ROM_REGION( 0x300000, "maincpu", 0)
r6740	r6741
597	603
598	604	memset(rng_sysreg, 0, 0x20);
599	605
600		init_eeprom_count = 0;
601	606	rng_z80_control = 0;
602	607	rng_sound_status = 0;
603	608	}

src/mame/drivers/eprom.c

r6740	r6741
26	26	#include "driver.h"
27	27	#include "cpu/m68000/m68000.h"
28	28	#include "audio/atarijsa.h"
29		#include "eprom.h"
	29	#include "includes/eprom.h"
30	30
31	31
32	32
r6740	r6741
49	49	}
50	50
51	51
52		static MACHINE_RESET( klaxp )
	52	static MACHINE_START( eprom )
53	53	{
	54	atarigen_init(machine);
	55	}
	56
	57
	58	static MACHINE_RESET( eprom )
	59	{
54	60	eprom_state *state = (eprom_state *)machine->driver_data;
55	61
56	62	atarigen_eeprom_reset(&state->atarigen);
57	63	atarigen_interrupt_reset(&state->atarigen, update_interrupts);
58	64	atarigen_scanline_timer_reset(machine->primary_screen, eprom_scanline_update, 8);
59	65	atarijsa_reset();
60		atarigen_init_save_state(machine);
61	66	}
62	67
63	68
64		static MACHINE_RESET( eprom )
65		{
66		eprom_state *state = (eprom_state *)machine->driver_data;
67		MACHINE_RESET_CALL(klaxp);
68		state_save_register_global_pointer(machine, state->sync_data, 2);
69		}
70	69
71
72
73	70	/*************************************
74	71	*
75	72	*  I/O handling
r6740	r6741
422	419
423	420	MDRV_QUANTUM_TIME(HZ(6000))
424	421
	422	MDRV_MACHINE_START(eprom)
425	423	MDRV_MACHINE_RESET(eprom)
426	424	MDRV_NVRAM_HANDLER(atarigen)
427	425
r6740	r6741
454	452
455	453	MDRV_QUANTUM_TIME(HZ(600))
456	454
457		MDRV_MACHINE_RESET(klaxp)
	455	MDRV_MACHINE_START(eprom)
	456	MDRV_MACHINE_RESET(eprom)
458	457	MDRV_NVRAM_HANDLER(atarigen)
459	458
460	459	/* video hardware */
r6740	r6741
486	485
487	486	MDRV_QUANTUM_TIME(HZ(600))
488	487
	488	MDRV_MACHINE_START(eprom)
489	489	MDRV_MACHINE_RESET(eprom)
490	490	MDRV_NVRAM_HANDLER(atarigen)
491	491

src/mame/drivers/chinsan.c

r6740	r6741
47	47	#include "sound/2203intf.h"
48	48	#include "sound/msm5205.h"
49	49
50		static UINT8* chinsan_video;
51		static UINT8 chinsan_port_select;
	50	typedef struct _chinsan_state chinsan_state;
	51	struct _chinsan_state
	52	{
	53	/* memory pointers */
	54	UINT8 *  video;
52	55
53		static UINT32 adpcm_pos;
54		static UINT8 adpcm_idle,adpcm_data;
	56	/* misc */
	57	UINT8    port_select;
	58	UINT32   adpcm_pos;
	59	UINT8    adpcm_idle, adpcm_data;
	60	UINT8    trigger;
	61	};
55	62
56		static VIDEO_START(chinsan)
	63
	64	/*************************************
	65	*
	66	*  Video emulation
	67	*
	68	*************************************/
	69
	70	static PALETTE_INIT( chinsan )
57	71	{
	72	UINT8 *src = memory_region( machine, "color_proms" );
	73	int i;
	74
	75	for (i = 0; i < 0x100; i++)
	76	palette_set_color_rgb(machine, i, pal4bit(src[i + 0x200]), pal4bit(src[i + 0x100]), pal4bit(src[i + 0x000]));
58	77	}
59	78
60		static VIDEO_UPDATE(chinsan)
	79	static VIDEO_START( chinsan )
61	80	{
62		int y,x, count;
	81	}
	82
	83	static VIDEO_UPDATE( chinsan )
	84	{
	85	chinsan_state *state = (chinsan_state *)screen->machine->driver_data;
	86	int y, x, count;
63	87	count = 0;
64		for(y=0;y<32;y++)
	88	for (y = 0; y < 32; y++)
65	89	{
66		for (x=0;x<64;x++)
	90	for (x = 0; x < 64; x++)
67	91	{
68		int tileno,colour;
69		tileno = chinsan_video[count] | (chinsan_video[count+0x800]<<8);
70		colour = chinsan_video[count+0x1000]>>3;
	92	int tileno, colour;
	93	tileno = state->video[count] | (state->video[count + 0x800] << 8);
	94	colour = state->video[count + 0x1000] >> 3;
71	95	drawgfx_opaque(bitmap,cliprect,screen->machine->gfx[0],tileno,colour,0,0,x*8,y*8);
72	96	count++;
73	97	}
r6740	r6741
78	102
79	103
80	104
81		static MACHINE_RESET( chinsan )
82		{
83		memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "maincpu") + 0x10000, 0x4000);
	105	/*************************************
	106	*
	107	*  Memory handlers
	108	*
	109	*************************************/
84	110
85		adpcm_idle = 1;
86		}
87
88
89		static WRITE8_HANDLER(ctrl_w)
	111	static WRITE8_HANDLER( ctrl_w )
90	112	{
91	113	memory_set_bank(space->machine, "bank1", data >> 6);
92	114	}
93	115
94	116	static WRITE8_DEVICE_HANDLER( ym_port_w1 )
95	117	{
96		logerror("ym_write port 1 %02x\n",data);
	118	logerror("ym_write port 1 %02x\n", data);
97	119	}
98	120
99	121
100	122	static WRITE8_DEVICE_HANDLER( ym_port_w2 )
101	123	{
102		logerror("ym_write port 2 %02x\n",data);
	124	logerror("ym_write port 2 %02x\n", data);
103	125	}
104	126
105	127
r6740	r6741
117	139
118	140	static WRITE8_HANDLER( chinsan_port00_w )
119	141	{
	142	chinsan_state *state = (chinsan_state *)space->machine->driver_data;
120	143
121		chinsan_port_select = data;
	144	state->port_select = data;
122	145
123	146	if (
124		(data!=0x40) &&
125		(data!=0x4f) &&
126		(data!=0x53) &&
127		(data!=0x57) &&
128		(data!=0x5b) &&
129		(data!=0x5d) &&
130		(data!=0x5e))
131		logerror("write port 00 %02x\n",data);
	147	(data != 0x40) &&
	148	(data != 0x4f) &&
	149	(data != 0x53) &&
	150	(data != 0x57) &&
	151	(data != 0x5b) &&
	152	(data != 0x5d) &&
	153	(data != 0x5e))
	154	logerror("write port 00 %02x\n", data);
132	155
133	156	}
134	157
135	158	static READ8_HANDLER( chinsan_input_port_0_r )
136	159	{
	160	chinsan_state *state = (chinsan_state *)space->machine->driver_data;
137	161
138	162	//return 0xff; // the inputs don't seem to work, so just return ff for now
139	163
140		switch (chinsan_port_select)
	164	switch (state->port_select)
141	165	{
142	166	/* i doubt these are both really the same.. */
143	167	case 0x40:
r6740	r6741
160	184	return input_port_read(space->machine, "MAHJONG_P2_6");
161	185	}
162	186
163		printf("chinsan_input_port_0_r unk_r %02x\n", chinsan_port_select);
	187	printf("chinsan_input_port_0_r unk_r %02x\n", state->port_select);
164	188	return mame_rand(space->machine);
165	189	}
166	190
167	191	static READ8_HANDLER( chinsan_input_port_1_r )
168	192	{
169		switch (chinsan_port_select)
	193	chinsan_state *state = (chinsan_state *)space->machine->driver_data;
	194
	195	switch (state->port_select)
170	196	{
171	197	/* i doubt these are both really the same.. */
172	198	case 0x40:
r6740	r6741
189	215	return input_port_read(space->machine, "MAHJONG_P1_6");
190	216	}
191	217
192		printf("chinsan_input_port_1_r unk_r %02x\n", chinsan_port_select);
	218	printf("chinsan_input_port_1_r unk_r %02x\n", state->port_select);
193	219	return mame_rand(space->machine);
194	220	}
195	221
196	222	static WRITE8_DEVICE_HANDLER( chin_adpcm_w )
197	223	{
198		adpcm_pos = (data & 0xff) * 0x100;
199		adpcm_idle = 0;
200		msm5205_reset_w(device,0);
	224	chinsan_state *state = (chinsan_state *)device->machine->driver_data;
	225	state->adpcm_pos = (data & 0xff) * 0x100;
	226	state->adpcm_idle = 0;
	227	msm5205_reset_w(device, 0);
201	228	}
202	229
	230	/*************************************
	231	*
	232	*  Address maps
	233	*
	234	*************************************/
	235
203	236	static ADDRESS_MAP_START( chinsan_map, ADDRESS_SPACE_PROGRAM, 8 )
204	237	AM_RANGE(0x0000, 0x7fff) AM_ROM
205	238	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
206	239	AM_RANGE(0xc000, 0xdfff) AM_RAM
207		AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_BASE(&chinsan_video)
	240	AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_BASE_MEMBER(chinsan_state, video)
208	241	ADDRESS_MAP_END
209	242
210	243	static ADDRESS_MAP_START( chinsan_io, ADDRESS_SPACE_IO, 8 )
r6740	r6741
218	251	ADDRESS_MAP_END
219	252
220	253
	254	/*************************************
	255	*
	256	*  Input ports
	257	*
	258	*************************************/
	259
221	260	static INPUT_PORTS_START( chinsan )
222	261	PORT_START("DSW1")
223	262	PORT_DIPNAME( 0x01, 0x01, "DSW1" )
r6740	r6741
457	496
458	497
459	498
	499	/*************************************
	500	*
	501	*  Graphics definitions
	502	*
	503	*************************************/
	504
460	505	static const gfx_layout tiles8x8_layout =
461	506	{
462	507	8,8,
r6740	r6741
472	517	GFXDECODE_ENTRY( "gfx1", 0, tiles8x8_layout, 0, 32 )
473	518	GFXDECODE_END
474	519
475		static void chin_adpcm_int(const device_config *device)
	520	/*************************************
	521	*
	522	*  Sound interface
	523	*
	524	*************************************/
	525
	526	static void chin_adpcm_int( const device_config *device )
476	527	{
477		static UINT8 trigger;
	528	chinsan_state *state = (chinsan_state *)device->machine->driver_data;
478	529
479		if (adpcm_pos >= 0x10000 || adpcm_idle)
	530	if (state->adpcm_pos >= 0x10000 || state->adpcm_idle)
480	531	{
481		//adpcm_idle = 1;
482		msm5205_reset_w(device,1);
483		trigger = 0;
	532	//state->adpcm_idle = 1;
	533	msm5205_reset_w(device, 1);
	534	state->trigger = 0;
484	535	}
485	536	else
486	537	{
487	538	UINT8 *ROM = memory_region(device->machine, "adpcm");
488	539
489		adpcm_data = ((trigger ? (ROM[adpcm_pos] & 0x0f) : (ROM[adpcm_pos] & 0xf0)>>4) );
490		msm5205_data_w(device,adpcm_data & 0xf);
491		trigger^=1;
492		if(trigger == 0)
	540	state->adpcm_data = ((state->trigger ? (ROM[state->adpcm_pos] & 0x0f) : (ROM[state->adpcm_pos] & 0xf0) >> 4));
	541	msm5205_data_w(device, state->adpcm_data & 0xf);
	542	state->trigger ^= 1;
	543	if(state->trigger == 0)
493	544	{
494		adpcm_pos++;
495		if((ROM[adpcm_pos] & 0xff) == 0x70)
496		adpcm_idle = 1;
	545	state->adpcm_pos++;
	546	if ((ROM[state->adpcm_pos] & 0xff) == 0x70)
	547	state->adpcm_idle = 1;
497	548	}
498	549	}
499	550	}
r6740	r6741
504	555	MSM5205_S64_4B   /* 8kHz */
505	556	};
506	557
507		static PALETTE_INIT( chinsan )
	558	/*************************************
	559	*
	560	*  Machine driver
	561	*
	562	*************************************/
	563
	564	static MACHINE_START( chinsan )
508	565	{
509		UINT8 *src = memory_region( machine, "color_proms" );
510		int i;
	566	chinsan_state *state = (chinsan_state *)machine->driver_data;
511	567
512		for (i=0;i<0x100;i++)
513		{
514		palette_set_color_rgb(machine,i,pal4bit(src[i+0x200]),pal4bit(src[i+0x100]),pal4bit(src[i+0x000]));
515		}
	568	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "maincpu") + 0x10000, 0x4000);
	569
	570	state_save_register_global(machine, state->adpcm_idle);
	571	state_save_register_global(machine, state->port_select);
	572	state_save_register_global(machine, state->adpcm_pos);
	573	state_save_register_global(machine, state->adpcm_data);
	574	state_save_register_global(machine, state->trigger);
516	575	}
517	576
	577	static MACHINE_RESET( chinsan )
	578	{
	579	chinsan_state *state = (chinsan_state *)machine->driver_data;
	580
	581	state->adpcm_idle = 1;
	582	state->port_select = 0;
	583	state->adpcm_pos = 0;
	584	state->adpcm_data = 0;
	585	state->trigger = 0;
	586	}
	587
	588
518	589	static MACHINE_DRIVER_START( chinsan )
	590
	591	/* driver data */
	592	MDRV_DRIVER_DATA(chinsan_state)
	593
519	594	/* basic machine hardware */
520	595	MDRV_CPU_ADD("maincpu", Z80,10000000/2)       /* ? MHz */
521	596	MDRV_CPU_PROGRAM_MAP(chinsan_map)
522	597	MDRV_CPU_IO_MAP(chinsan_io)
523	598	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
524	599
	600	MDRV_MACHINE_START( chinsan )
525	601	MDRV_MACHINE_RESET( chinsan )
526	602
527	603	/* video hardware */
r6740	r6741
539	615	MDRV_VIDEO_START(chinsan)
540	616	MDRV_VIDEO_UPDATE(chinsan)
541	617
542		// sound hardware
	618	/* sound hardware */
543	619	MDRV_SPEAKER_STANDARD_MONO("mono")
544	620
545	621	MDRV_SOUND_ADD("ymsnd", YM2203, 1500000) /* ? Mhz */
r6740	r6741
556	632
557	633
558	634
	635	/*************************************
	636	*
	637	*  ROM definition(s)
	638	*
	639	*************************************/
	640
559	641	ROM_START( chinsan )
560	642	ROM_REGION( 0x20000, "maincpu", 0 ) /* encrypted code / data */
561	643	ROM_LOAD( "mm00.7d", 0x00000, 0x08000, CRC(f7a4414f) SHA1(f65223b2928f610ab97fda2f2c008806cf2420e5) )
r6740	r6741
583	665	ROM_END
584	666
585	667
	668	/*************************************
	669	*
	670	*  Driver initialization
	671	*
	672	*************************************/
	673
586	674	static DRIVER_INIT( chinsan )
587	675	{
588	676	mc8123_decrypt_rom(machine, "maincpu", "user1", "bank1", 4);
589	677	}
590	678
591	679
592		GAME( 1987, chinsan,  0,    chinsan, chinsan, chinsan, ROT0, "Sanritsu", "Ganbare Chinsan Ooshoubu (MC-8123A, 317-5012)", 0 )
	680	/*************************************
	681	*
	682	*  Game driver(s)
	683	*
	684	*************************************/
	685
	686	GAME( 1987, chinsan,  0,    chinsan, chinsan, chinsan, ROT0, "Sanritsu", "Ganbare Chinsan Ooshoubu (MC-8123A, 317-5012)", GAME_SUPPORTS_SAVE )

src/mame/drivers/ultrsprt.c

r6740	r6741
12	12	#include "cpu/m68000/m68000.h"
13	13	#include "cpu/powerpc/ppc.h"
14	14	#include "sound/k054539.h"
15		#include "machine/eeprom.h"
	15	#include "machine/eepromdev.h"
16	16	#include "machine/konppc.h"
17		#include "machine/konamiic.h"
	17	#include "sound/k056800.h"
18	18
	19
19	20	static UINT32 *vram;
20	21	static UINT32 *workram;
21	22
r6740	r6741
65	66	static WRITE32_HANDLER( eeprom_w )
66	67	{
67	68	if (ACCESSING_BITS_24_31)
68		{
69		eeprom_write_bit((data & 0x01000000) ? 1 : 0);
70		eeprom_set_clock_line((data & 0x02000000) ? CLEAR_LINE : ASSERT_LINE);
71		eeprom_set_cs_line((data & 0x04000000) ? CLEAR_LINE : ASSERT_LINE);
72		}
	69	input_port_write(space->machine, "EEPROMOUT", data, 0xffffffff);
73	70	}
74	71
75	72	static CUSTOM_INPUT( analog_ctrl_r )
r6740	r6741
100	97	AM_RANGE(0x70000000, 0x70000003) AM_READWRITE(eeprom_r, eeprom_w)
101	98	AM_RANGE(0x70000020, 0x70000023) AM_READ_PORT("P1")
102	99	AM_RANGE(0x70000040, 0x70000043) AM_READ_PORT("P2")
103		AM_RANGE(0x70000080, 0x70000087) AM_WRITE(K056800_host_w)
104		AM_RANGE(0x70000088, 0x7000008f) AM_READ(K056800_host_r)
	100	AM_RANGE(0x70000080, 0x70000087) AM_DEVWRITE("k056800", k056800_host_w)
	101	AM_RANGE(0x70000088, 0x7000008f) AM_DEVREAD("k056800", k056800_host_r)
105	102	AM_RANGE(0x700000e0, 0x700000e3) AM_WRITE(int_ack_w)
106	103	AM_RANGE(0x7f000000, 0x7f01ffff) AM_RAM AM_BASE(&workram)
107	104	AM_RANGE(0x7f700000, 0x7f703fff) AM_RAM_WRITE(palette_w) AM_BASE_GENERIC(paletteram)
r6740	r6741
114	111
115	112	static READ16_HANDLER( K056800_68k_r )
116	113	{
	114	const device_config *k056800 = devtag_get_device(space->machine, "k056800");
117	115	UINT16 r = 0;
118	116
119	117	if (ACCESSING_BITS_8_15)
120		r |= K056800_sound_r(space, (offset*2)+0, 0xffff) << 8;
	118	r |= k056800_sound_r(k056800, (offset*2)+0, 0xffff) << 8;
121	119
122	120	if (ACCESSING_BITS_0_7)
123		r |= K056800_sound_r(space, (offset*2)+1, 0xffff) << 0;
	121	r |= k056800_sound_r(k056800, (offset*2)+1, 0xffff) << 0;
124	122
125	123	return r;
126	124	}
127	125
128	126	static WRITE16_HANDLER( K056800_68k_w )
129	127	{
	128	const device_config *k056800 = devtag_get_device(space->machine, "k056800");
	129
130	130	if (ACCESSING_BITS_8_15)
131		K056800_sound_w(space, (offset*2)+0, (data >> 8) & 0xff, 0x00ff);
	131	k056800_sound_w(k056800, (offset*2)+0, (data >> 8) & 0xff, 0x00ff);
132	132
133	133	if (ACCESSING_BITS_0_7)
134		K056800_sound_w(space, (offset*2)+1, (data >> 0) & 0xff, 0x00ff);
	134	k056800_sound_w(k056800, (offset*2)+1, (data >> 0) & 0xff, 0x00ff);
135	135	}
136	136
137	137	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 16 )
r6740	r6741
160	160	PORT_BIT( 0x10000000, IP_ACTIVE_HIGH, IPT_START2 )
161	161
162	162	PORT_START("SERVICE")
163		PORT_BIT( 0x02000000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
	163	PORT_BIT( 0x02000000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
164	164	PORT_SERVICE_NO_TOGGLE( 0x08000000, IP_ACTIVE_LOW )
165	165
	166	PORT_START( "EEPROMOUT" )
	167	PORT_BIT( 0x01000000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	168	PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	169	PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	170
166	171	PORT_START("STICKX1")
167	172	PORT_BIT( 0xfff, 0x800, IPT_AD_STICK_X ) PORT_MINMAX(0x000,0xfff) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(1)
168	173
r6740	r6741
176	181	PORT_BIT( 0xfff, 0x800, IPT_AD_STICK_Y ) PORT_MINMAX(0x000,0xfff) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(2)
177	182	INPUT_PORTS_END
178	183
179		static NVRAM_HANDLER(ultrsprt)
180		{
181		if (read_or_write)
182		{
183		eeprom_save(file);
184		}
185		else
186		{
187		eeprom_init(machine, &eeprom_interface_93C46);
188		if (file)
189		{
190		eeprom_load(file);
191		}
192		}
193		}
194	184
195	185	static INTERRUPT_GEN( ultrsprt_vblank )
196	186	{
197	187	cpu_set_input_line(device, INPUT_LINE_IRQ1, ASSERT_LINE);
198	188	}
199	189
	190	static void sound_irq_callback(running_machine *machine, int irq)
	191	{
	192	if (irq == 0)
	193	/*generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ5)*/;
	194	else
	195	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_IRQ6, HOLD_LINE);
	196	}
200	197
	198	static const k056800_interface ultrsprt_k056800_interface =
	199	{
	200	sound_irq_callback
	201	};
	202
	203
201	204	static MACHINE_DRIVER_START( ultrsprt )
202	205	/* basic machine hardware */
203	206	MDRV_CPU_ADD("maincpu", PPC403GA, 25000000)      /* PowerPC 403GA 25MHz */
r6740	r6741
210	213
211	214	MDRV_QUANTUM_TIME(HZ(12000))
212	215
213		MDRV_NVRAM_HANDLER(ultrsprt)
	216	MDRV_EEPROM_93C46_NODEFAULT_ADD("eeprom")
214	217	MDRV_MACHINE_START(ultrsprt)
215	218
216	219	/* video hardware */
r6740	r6741
226	229	MDRV_VIDEO_UPDATE(ultrsprt)
227	230
228	231	/* sound hardware */
	232	MDRV_K056800_ADD("k056800", ultrsprt_k056800_interface)
	233
229	234	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
230	235
231	236	MDRV_SOUND_ADD("konami", K054539, 48000)
r6740	r6741
233	238	MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
234	239	MACHINE_DRIVER_END
235	240
236		static void sound_irq_callback(running_machine *machine, int irq)
237		{
238		if (irq == 0)
239		/*generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ5)*/;
240		else
241		cputag_set_input_line(machine, "audiocpu", INPUT_LINE_IRQ6, HOLD_LINE);
242		}
243	241
244		static DRIVER_INIT( ultrsprt )
245		{
246		K056800_init(machine, sound_irq_callback);
247		}
248
249	242	/*****************************************************************************/
250	243
251	244	ROM_START( fiveside )
r6740	r6741
263	256	ROM_LOAD("479_a07.bin", 0x080000, 0x80000, CRC(75835df8) SHA1(105b95c16f2ce6902c2e4c9c2fd9f2f7a848c546))
264	257	ROM_END
265	258
266		GAME(1995, fiveside, 0, ultrsprt, ultrsprt, ultrsprt, ROT90, "Konami", "Five a Side Soccer (ver UAA)", GAME_IMPERFECT_SOUND)
	259	GAME(1995, fiveside, 0, ultrsprt, ultrsprt, 0, ROT90, "Konami", "Five a Side Soccer (ver UAA)", GAME_IMPERFECT_SOUND)

src/mame/drivers/midyunit.c

r6740	r6741
116	116	#include "cpu/tms34010/tms34010.h"
117	117	#include "audio/williams.h"
118	118	#include "sound/okim6295.h"
119		#include "midyunit.h"
	119	#include "includes/midyunit.h"
120	120
121	121
122	122	/* master clocks vary based on game */

src/mame/drivers/bzone.c

r6740	r6741
207	207	#include "machine/mathbox.h"
208	208	#include "machine/atari_vg.h"
209	209	#include "rendlay.h"
210		#include "bzone.h"
	210	#include "includes/bzone.h"
211	211
212	212	#include "sound/pokey.h"
213	213

src/mame/drivers/mhavoc.c

r6740	r6741
190	190	#include "video/vector.h"
191	191	#include "sound/tms5220.h"
192	192	#include "sound/pokey.h"
193		#include "mhavoc.h"
	193	#include "includes/mhavoc.h"
194	194
195	195	/*************************************
196	196	*
r6740	r6741
480	480	MDRV_CPU_ADD("gamma", M6502, MHAVOC_CLOCK_1_25M)   /* 1.25 MHz */
481	481	MDRV_CPU_PROGRAM_MAP(gamma_map)
482	482
	483	MDRV_MACHINE_START(mhavoc)
483	484	MDRV_MACHINE_RESET(mhavoc)
484	485	MDRV_NVRAM_HANDLER(generic_1fill)
485	486
	487	MDRV_TIMER_ADD_PERIODIC("5k_timer", mhavoc_cpu_irq_clock, HZ(MHAVOC_CLOCK_5K))
	488
486	489	/* video hardware */
487	490	MDRV_SCREEN_ADD("screen", VECTOR)
488	491	MDRV_SCREEN_REFRESH_RATE(50)

src/mame/drivers/twinkle.c

r6740	r6741
241	241
242	242	/* RTC */
243	243
244		static UINT8 xram[ 4096 ];
245
246		static NVRAM_HANDLER(twinkle)
247		{
248		if (read_or_write)
249		{
250		rtc65271_file_save(file);
251		}
252		else
253		{
254		if (file != NULL)
255		{
256		rtc65271_file_load(machine, file);
257		}
258		}
259
260		NVRAM_HANDLER_CALL(i2cmem_0);
261		}
262
263	244	static UINT32 twinkle_unknown;
264	245
265	246	static WRITE32_HANDLER( twinkle_unknown_w )
r6740	r6741
657	638	AM_RANGE(0x1f260000, 0x1f260003) AM_WRITE(serial_w)
658	639	AM_RANGE(0x1f270000, 0x1f270003) AM_WRITE(security_w)
659	640	AM_RANGE(0x1f280000, 0x1f280003) AM_READ(security_r)
660		AM_RANGE(0x1f290000, 0x1f29007f) AM_READWRITE8(rtc65271_rtc_r, rtc65271_rtc_w, 0x00ff00ff)
661		AM_RANGE(0x1f2a0000, 0x1f2a007f) AM_READWRITE8(rtc65271_xram_r, rtc65271_xram_w, 0x00ff00ff)
	641	AM_RANGE(0x1f290000, 0x1f29007f) AM_DEVREADWRITE8("rtc", rtc65271_rtc_r, rtc65271_rtc_w, 0x00ff00ff)
	642	AM_RANGE(0x1f2a0000, 0x1f2a007f) AM_DEVREADWRITE8("rtc", rtc65271_xram_r, rtc65271_xram_w, 0x00ff00ff)
662	643	AM_RANGE(0x1f2b0000, 0x1f2b00ff) AM_WRITE(twinkle_output_w)
663	644	AM_RANGE(0x1f800000, 0x1f8003ff) AM_RAM /* scratchpad */
664	645	AM_RANGE(0x1f801000, 0x1f801007) AM_WRITENOP
r6740	r6741
894	875	psx_dma_install_read_handler(5, scsi_dma_read);
895	876	psx_dma_install_write_handler(5, scsi_dma_write);
896	877
897		rtc65271_init(machine, xram, NULL);
898
899	878	i2cmem_init( machine, 0, I2CMEM_SLAVE_ADDRESS, 0, memory_region_length( machine, "user2" ), memory_region( machine, "user2" ) );
900	879	i2cmem_write( machine, 0, I2CMEM_E0, 0 );
901	880	i2cmem_write( machine, 0, I2CMEM_E1, 0 );
r6740	r6741
936	915	MDRV_WATCHDOG_TIME_INIT(MSEC(1200)) /* check TD pin on LTC1232 */
937	916
938	917	MDRV_MACHINE_RESET( twinkle )
939		MDRV_NVRAM_HANDLER( twinkle )
	918	MDRV_NVRAM_HANDLER( i2cmem_0 )
940	919
941	920	MDRV_IDE_CONTROLLER_ADD("ide", ide_interrupt)
	921	MDRV_RTC65271_ADD("rtc", NULL)
942	922
943	923	/* video hardware */
944	924	MDRV_SCREEN_ADD("mainscreen", RASTER)

src/mame/drivers/spool99.c

r6740	r6741
94	94
95	95	static UINT8 *spool99_main;
96	96	static tilemap *sc0_tilemap;
	97	static UINT8 *spool99_cram;
	98	static UINT8 *spool99_vram;
97	99
98	100	static TILE_GET_INFO( get_spool99_tile_info )
99	101	{
100		int code = ((machine->generic.videoram.u8[tile_index*2+1]<<8) | (machine->generic.videoram.u8[tile_index*2+0]));
101		int color = machine->generic.colorram.u8[tile_index*2+0];
	102	int code = ((spool99_vram[tile_index*2+1]<<8) | (spool99_vram[tile_index*2+0]));
	103	int color = spool99_cram[tile_index*2+0];
102	104
103	105	SET_TILE_INFO(
104	106	0,
r6740	r6741
120	122
121	123	static WRITE8_HANDLER( spool99_vram_w )
122	124	{
123		space->machine->generic.videoram.u8[offset] = data;
	125	spool99_vram[offset] = data;
124	126	tilemap_mark_tile_dirty(sc0_tilemap,offset/2);
125	127	}
126	128
127	129	static WRITE8_HANDLER( spool99_cram_w )
128	130	{
129		space->machine->generic.colorram.u8[offset] = data;
	131	spool99_cram[offset] = data;
130	132	tilemap_mark_tile_dirty(sc0_tilemap,offset/2);
131	133	}
132	134
r6740	r6741
193	195	AM_RANGE(0xb000, 0xb3ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE_GENERIC(paletteram) // palette
194	196
195	197	AM_RANGE(0xb800, 0xdfff) AM_RAM
196		AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(spool99_vram_w) AM_BASE_GENERIC(videoram)
197		AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(spool99_cram_w) AM_BASE_GENERIC(colorram)
	198	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(spool99_vram_w) AM_BASE(&spool99_vram)
	199	AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(spool99_cram_w) AM_BASE(&spool99_cram)
198	200	ADDRESS_MAP_END
199	201
200	202

src/mame/drivers/simpl156.c

r6740	r6741
89	89	*/
90	90
91	91	#include "driver.h"
92		#include "decocrpt.h"
93		#include "deco32.h"
	92	#include "includes/decocrpt.h"
	93	#include "includes/deco32.h"
94	94	#include "cpu/arm/arm.h"
95	95	#include "machine/eeprom.h"
96	96	#include "sound/okim6295.h"
97		#include "deco16ic.h"
	97	#include "includes/deco16ic.h"
98	98
99	99	static UINT32 *simpl156_systemram;
100	100	static const UINT8 *simpl156_default_eeprom;

src/mame/drivers/artmagic.c

r6740	r6741
25	25	#include "cpu/m68000/m68000.h"
26	26	#include "cpu/tms34010/tms34010.h"
27	27	#include "video/tlc34076.h"
28		#include "artmagic.h"
	28	#include "includes/artmagic.h"
29	29	#include "sound/okim6295.h"
30	30
31	31
r6740	r6741
94	94	tms_irq = hack_irq = 0;
95	95	update_irq_state(machine);
96	96	tlc34076_reset(6);
97		tlc34076_state_save(machine);
98	97	}
99	98
100	99

src/mame/drivers/twincobr.c

r6740	r6741
191	191	#include "cpu/z80/z80.h"
192	192	#include "cpu/m68000/m68000.h"
193	193	#include "cpu/tms32010/tms32010.h"
194		#include "twincobr.h"
	194	#include "includes/twincobr.h"
195	195	#include "sound/3812intf.h"
196	196
197	197

src/mame/drivers/hexion.c

r6740	r6741
83	83	#include "deprecat.h"
84	84	#include "sound/okim6295.h"
85	85	#include "sound/k051649.h"
86		#include "konamipt.h"
	86	#include "includes/konamipt.h"
87	87
88	88	VIDEO_START( hexion );
89	89	VIDEO_UPDATE( hexion );

src/mame/drivers/battlnts.c

r6740	r6741
1	1	/***************************************************************************
2	2
3		Konami Battlantis Hardware
	3	Konami Battlantis Hardware
4	4
5		Supports:
6		GX765 - Rack 'em Up/The Hustler (c) 1987 Konami
7		GX777 - Battlantis (c) 1987 Konami
	5	Supports:
	6	GX765 - Rack 'em Up/The Hustler (c) 1987 Konami
	7	GX777 - Battlantis (c) 1987 Konami
8	8
9		Preliminary driver by: Manuel Abadia <manu@teleline.es>
	9	Preliminary driver by: Manuel Abadia <manu@teleline.es>
10	10
11	11	***************************************************************************/
12	12
13	13	#include "driver.h"
14	14	#include "cpu/hd6309/hd6309.h"
15	15	#include "cpu/z80/z80.h"
16		#include "video/konamiic.h"
17	16	#include "sound/3812intf.h"
18		#include "konamipt.h"
	17	#include "video/konicdev.h"
	18	#include "includes/konamipt.h"
	19	#include "includes/battlnts.h"
19	20
20		/* from video */
21		WRITE8_HANDLER( battlnts_spritebank_w );
22		VIDEO_START( battlnts );
23		VIDEO_UPDATE( battlnts );
24	21
	22	/*************************************
	23	*
	24	*  Memory handlers
	25	*
	26	*************************************/
	27
25	28	static INTERRUPT_GEN( battlnts_interrupt )
26	29	{
27		if (K007342_is_INT_enabled())
	30	battlnts_state *state = (battlnts_state *)device->machine->driver_data;
	31	if (k007342_is_int_enabled(state->k007342))
28	32	cpu_set_input_line(device, HD6309_IRQ_LINE, HOLD_LINE);
29	33	}
30	34
31	35	static WRITE8_HANDLER( battlnts_sh_irqtrigger_w )
32	36	{
33		cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
	37	battlnts_state *state = (battlnts_state *)space->machine->driver_data;
	38	cpu_set_input_line_and_vector(state->audiocpu, 0, HOLD_LINE, 0xff);
34	39	}
35	40
36	41	static WRITE8_HANDLER( battlnts_bankswitch_w )
37	42	{
38		UINT8 *RAM = memory_region(space->machine, "maincpu");
39		UINT32 bankaddress;
40
41	43	/* bits 6 & 7 = bank number */
42		bankaddress = 0x10000 + ((data & 0xc0) >> 6) * 0x4000;
43		memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
	44	memory_set_bank(space->machine, "bank1", (data & 0xc0) >> 6);
44	45
45	46	/* bits 4 & 5 = coin counters */
46		coin_counter_w(space->machine, 0,data & 0x10);
47		coin_counter_w(space->machine, 1,data & 0x20);
	47	coin_counter_w(space->machine, 0, data & 0x10);
	48	coin_counter_w(space->machine, 1, data & 0x20);
48	49
49	50	/* other bits unknown */
50	51	}
51	52
	53
	54	/*************************************
	55	*
	56	*  Address maps
	57	*
	58	*************************************/
	59
52	60	static ADDRESS_MAP_START( battlnts_map, ADDRESS_SPACE_PROGRAM, 8 )
53		AM_RANGE(0x0000, 0x1fff) AM_READWRITE(K007342_r, K007342_w)   /* Color RAM + Video RAM */
54		AM_RANGE(0x2000, 0x21ff) AM_READWRITE(K007420_r, K007420_w)   /* Sprite RAM */
55		AM_RANGE(0x2200, 0x23ff) AM_READWRITE(K007342_scroll_r, K007342_scroll_w)      /* Scroll RAM */
	61	AM_RANGE(0x0000, 0x1fff) AM_DEVREADWRITE("k007342", k007342_r, k007342_w)   /* Color RAM + Video RAM */
	62	AM_RANGE(0x2000, 0x21ff) AM_DEVREADWRITE("k007420", k007420_r, k007420_w)   /* Sprite RAM */
	63	AM_RANGE(0x2200, 0x23ff) AM_DEVREADWRITE("k007342", k007342_scroll_r, k007342_scroll_w)      /* Scroll RAM */
56	64	AM_RANGE(0x2400, 0x24ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE_GENERIC(paletteram)/* palette */
57		AM_RANGE(0x2600, 0x2607) AM_WRITE(K007342_vreg_w)          /* Video Registers */
	65	AM_RANGE(0x2600, 0x2607) AM_DEVWRITE("k007342", k007342_vreg_w)          /* Video Registers */
58	66	AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("DSW1")
59	67	AM_RANGE(0x2e01, 0x2e01) AM_READ_PORT("P2")
60	68	AM_RANGE(0x2e02, 0x2e02) AM_READ_PORT("P1")
r6740	r6741
77	85	AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)         /* soundlatch_r */
78	86	ADDRESS_MAP_END
79	87
80		/***************************************************************************
	88	/*************************************
	89	*
	90	*  Input ports
	91	*
	92	*************************************/
81	93
82		Input Ports
83
84		***************************************************************************/
85
86	94	static INPUT_PORTS_START( battlnts )
87	95	PORT_START("DSW1")
88	96	KONAMI_COINAGE_LOC(DEF_STR( Free_Play ), "No Coin B", SW1)
r6740	r6741
158	166	INPUT_PORTS_END
159	167
160	168
	169	/*************************************
	170	*
	171	*  Graphics definitions
	172	*
	173	*************************************/
	174
161	175	static const gfx_layout charlayout =
162	176	{
163	177	8,8,         /* 8 x 8 characters */
r6740	r6741
186	200	GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 4*16, 1 ) /* colors 64-79 */
187	201	GFXDECODE_END
188	202
189		/***************************************************************************
190	203
191		Machine Driver
	204	/*************************************
	205	*
	206	*  Machine driver
	207	*
	208	*************************************/
192	209
193		***************************************************************************/
	210	static const k007342_interface bladestl_k007342_intf =
	211	{
	212	0,   battlnts_tile_callback   /* gfx_num (for tile creation), callback */
	213	};
194	214
	215	static const k007420_interface bladestl_k007420_intf =
	216	{
	217	0x3ff,    battlnts_sprite_callback   /* banklimit, callback */
	218	};
	219
	220
	221	static MACHINE_START( battlnts )
	222	{
	223	battlnts_state *state = (battlnts_state *)machine->driver_data;
	224	UINT8 *ROM = memory_region(machine, "maincpu");
	225
	226	memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	227
	228	state->audiocpu = devtag_get_device(machine, "audiocpu");
	229	state->k007342 = devtag_get_device(machine, "k007342");
	230	state->k007420 = devtag_get_device(machine, "k007420");
	231
	232	state_save_register_global(machine, state->spritebank);
	233	state_save_register_global_array(machine, state->layer_colorbase);
	234	}
	235
	236	static MACHINE_RESET( battlnts )
	237	{
	238	battlnts_state *state = (battlnts_state *)machine->driver_data;
	239
	240	state->layer_colorbase[0] = 0;
	241	state->layer_colorbase[1] = 0;
	242	state->spritebank = 0;
	243	}
	244
195	245	static MACHINE_DRIVER_START( battlnts )
196	246
	247	/* driver data */
	248	MDRV_DRIVER_DATA(battlnts_state)
	249
197	250	/* basic machine hardware */
198	251	MDRV_CPU_ADD("maincpu", HD6309, XTAL_24MHz / 2 /* 3000000*4? */)
199	252	MDRV_CPU_PROGRAM_MAP(battlnts_map)
r6740	r6741
202	255	MDRV_CPU_ADD("audiocpu", Z80, XTAL_24MHz / 6 /* 3579545? */)
203	256	MDRV_CPU_PROGRAM_MAP(battlnts_sound_map)
204	257
	258	MDRV_MACHINE_START(battlnts)
	259	MDRV_MACHINE_RESET(battlnts)
	260
205	261	/* video hardware */
206	262	MDRV_SCREEN_ADD("screen", RASTER)
207	263	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
212	268	MDRV_GFXDECODE(battlnts)
213	269	MDRV_PALETTE_LENGTH(128)
214	270
215		MDRV_VIDEO_START(battlnts)
216	271	MDRV_VIDEO_UPDATE(battlnts)
217	272
	273	MDRV_K007342_ADD("k007342", bladestl_k007342_intf)
	274	MDRV_K007420_ADD("k007420", bladestl_k007420_intf)
	275
218	276	/* sound hardware */
219	277	MDRV_SPEAKER_STANDARD_MONO("mono")
220	278
r6740	r6741
226	284	MACHINE_DRIVER_END
227	285
228	286
229		/***************************************************************************
	287	/*************************************
	288	*
	289	*  ROM definition(s)
	290	*
	291	*************************************/
230	292
231		Game ROMs
232
233		***************************************************************************/
234
235	293	ROM_START( battlnts )
236	294	ROM_REGION( 0x20000, "maincpu", 0 ) /* code + banked roms */
237	295	ROM_LOAD( "777_g02.7e", 0x08000, 0x08000, CRC(dbd8e17e) SHA1(586a22b714011c67a915c4a350ceca19ff875635) ) /* fixed ROM */
r6740	r6741
308	366	ROM_END
309	367
310	368
	369	/*************************************
	370	*
	371	*  Driver initialization
	372	*
	373	*************************************/
	374
311	375	/*
312	376	This recursive function doesn't use additional memory
313	377	(it could be easily converted into an iterative one).
314	378	It's called shuffle because it mimics the shuffling of a deck of cards.
315	379	*/
316		static void shuffle(UINT8 *buf,int len)
	380	static void shuffle( UINT8 *buf, int len )
317	381	{
318	382	int i;
319	383	UINT8 t;
320	384
321		if (len == 2) return;
	385	if (len == 2)
	386	return;
322	387
323		if (len % 4) fatalerror("shuffle() - not modulo 4");   /* must not happen */
	388	if (len % 4)
	389	fatalerror("shuffle() - not modulo 4");   /* must not happen */
324	390
325	391	len /= 2;
326	392
327		for (i = 0;i < len/2;i++)
	393	for (i = 0; i < len / 2; i++)
328	394	{
329		t = buf[len/2 + i];
330		buf[len/2 + i] = buf[len + i];
	395	t = buf[len / 2 + i];
	396	buf[len / 2 + i] = buf[len + i];
331	397	buf[len + i] = t;
332	398	}
333	399
334		shuffle(buf,len);
335		shuffle(buf + len,len);
	400	shuffle(buf, len);
	401	shuffle(buf + len, len);
336	402	}
337	403
338	404
339	405	static DRIVER_INIT( rackemup )
340	406	{
341	407	/* rearrange char ROM */
342		shuffle(memory_region(machine, "gfx1"),memory_region_length(machine, "gfx1"));
	408	shuffle(memory_region(machine, "gfx1"), memory_region_length(machine, "gfx1"));
343	409	}
344	410
345	411
346	412
347		GAME( 1987, battlnts, 0,        battlnts, battlnts, 0,        ROT90, "Konami", "Battlantis", 0 )
348		GAME( 1987, battlntsj,battlnts, battlnts, battlnts, 0,        ROT90, "Konami", "Battlantis (Japan)", 0 )
349		GAME( 1987, rackemup, 0,        battlnts, thehustj, rackemup, ROT90, "Konami", "Rack 'em Up", GAME_NO_COCKTAIL )
350		GAME( 1987, thehustl, rackemup, battlnts, thehustj, 0,        ROT90, "Konami", "The Hustler (Japan version M)", GAME_NO_COCKTAIL )
351		GAME( 1987, thehustlj,rackemup, battlnts, thehustj, 0,        ROT90, "Konami", "The Hustler (Japan version J)", GAME_NO_COCKTAIL )
	413	/*************************************
	414	*
	415	*  Game driver(s)
	416	*
	417	*************************************/
	418
	419	GAME( 1987, battlnts,  0,        battlnts, battlnts, 0,        ROT90, "Konami", "Battlantis", GAME_SUPPORTS_SAVE )
	420	GAME( 1987, battlntsj, battlnts, battlnts, battlnts, 0,        ROT90, "Konami", "Battlantis (Japan)", GAME_SUPPORTS_SAVE )
	421	GAME( 1987, rackemup,  0,        battlnts, thehustj, rackemup, ROT90, "Konami", "Rack 'em Up", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
	422	GAME( 1987, thehustl,  rackemup, battlnts, thehustj, 0,        ROT90, "Konami", "The Hustler (Japan version M)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
	423	GAME( 1987, thehustlj, rackemup, battlnts, thehustj, 0,        ROT90, "Konami", "The Hustler (Japan version J)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )

src/mame/drivers/galpani2.c

r6740	r6741
23	23	#include "cpu/m68000/m68000.h"
24	24	#include "deprecat.h"
25	25	#include "machine/eeprom.h"
26		#include "kaneko16.h"
	26	#include "includes/kaneko16.h"
27	27	#include "sound/okim6295.h"
28	28
29	29	/***************************************************************************

src/mame/drivers/sprint2.c

r6740	r6741
19	19
20	20	#include "driver.h"
21	21	#include "cpu/m6502/m6502.h"
22		#include "sprint2.h"
	22	#include "includes/sprint2.h"
23	23	#include "sound/discrete.h"
24	24
25	25	#define GAME_IS_SPRINT1   (game == 1)

src/mame/drivers/exterm.c

r6740	r6741
65	65	#include "cpu/m6502/m6502.h"
66	66	#include "sound/dac.h"
67	67	#include "sound/2151intf.h"
68		#include "exterm.h"
	68	#include "includes/exterm.h"
69	69
70	70
71	71
r6740	r6741
78	78	static UINT8 aimpos[2];
79	79	static UINT8 trackball_old[2];
80	80
81		static emu_timer *sound_nmi_timer;
82	81	static UINT8 master_sound_latch;
83	82	static UINT8 slave_sound_latch;
84	83	static UINT8 sound_control;
r6740	r6741
88	87
89	88	/*************************************
90	89	*
91		*  Prototypes
92		*
93		*************************************/
94
95		static TIMER_CALLBACK( master_sound_nmi_callback );
96
97
98
99		/*************************************
100		*
101		*  System init
102		*
103		*************************************/
104
105		static MACHINE_RESET( exterm )
106		{
107		sound_nmi_timer = timer_alloc(machine, master_sound_nmi_callback, NULL);
108		}
109
110
111
112		/*************************************
113		*
114	90	*  Master/slave communications
115	91	*
116	92	*************************************/
r6740	r6741
232	208	*
233	209	*************************************/
234	210
235		static TIMER_CALLBACK( master_sound_nmi_callback )
	211	static TIMER_DEVICE_CALLBACK( master_sound_nmi_callback )
236	212	{
237	213	/* bit 0 of the sound control determines if the NMI is actually delivered */
238	214	if (sound_control & 0x01)
239		cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
	215	cputag_set_input_line(timer->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
240	216	}
241	217
242	218
r6740	r6741
253	229	/* this value is latched into up-counters, which are clocked at the */
254	230	/* input clock / 256 */
255	231	attotime nmi_rate = attotime_mul(ATTOTIME_IN_HZ(4000000), 4096 * (256 - data));
256		timer_adjust_periodic(sound_nmi_timer, nmi_rate, 0, nmi_rate);
	232	timer_device_adjust_periodic(devtag_get_device(space->machine, "snd_nmi_timer"), nmi_rate, 0, nmi_rate);
257	233	}
258	234
259	235
r6740	r6741
488	464
489	465	MDRV_QUANTUM_TIME(HZ(6000))
490	466
491		MDRV_MACHINE_RESET(exterm)
492	467	MDRV_NVRAM_HANDLER(generic_0fill)
493	468
	469	MDRV_TIMER_ADD("snd_nmi_timer", master_sound_nmi_callback)
	470
494	471	/* video hardware */
495	472	MDRV_PALETTE_LENGTH(2048+32768)
496	473

src/mame/drivers/dragrace.c

r6740	r6741
7	7	#include "driver.h"
8	8	#include "cpu/m6800/m6800.h"
9	9	#include "deprecat.h"
10		#include "dragrace.h"
	10	#include "includes/dragrace.h"
11	11	#include "sound/discrete.h"
12	12
13	13
14		static TIMER_CALLBACK( dragrace_frame_callback )
	14	static TIMER_DEVICE_CALLBACK( dragrace_frame_callback )
15	15	{
16		dragrace_state *state = (dragrace_state *)machine->driver_data;
	16	dragrace_state *state = (dragrace_state *)timer->machine->driver_data;
17	17	int i;
18	18	static const char *const portnames[] = { "P1", "P2" };
19	19
20	20	for (i = 0; i < 2; i++)
21	21	{
22		switch (input_port_read(machine, portnames[i]))
	22	switch (input_port_read(timer->machine, portnames[i]))
23	23	{
24	24	case 0x01: state->gear[i] = 1; break;
25	25	case 0x02: state->gear[i] = 2; break;
r6740	r6741
30	30	}
31	31
32	32	/* watchdog is disabled during service mode */
33		watchdog_enable(machine, input_port_read(machine, "IN0") & 0x20);
	33	watchdog_enable(timer->machine, input_port_read(timer->machine, "IN0") & 0x20);
34	34	}
35	35
36	36
r6740	r6741
328	328	{
329	329	dragrace_state *state = (dragrace_state *)machine->driver_data;
330	330
331		timer_pulse(machine, video_screen_get_frame_period(machine->primary_screen), NULL, 0, dragrace_frame_callback);
332
333	331	state->misc_flags = 0;
334	332	state->gear[0] = 0;
335	333	state->gear[1] = 0;
r6740	r6741
349	347	MDRV_MACHINE_START(dragrace)
350	348	MDRV_MACHINE_RESET(dragrace)
351	349
	350	MDRV_TIMER_ADD_PERIODIC("frame_timer", dragrace_frame_callback, HZ(60))
	351
352	352	/* video hardware */
353	353	MDRV_SCREEN_ADD("screen", RASTER)
354	354	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/seibuspi.c

r6740	r6741
888	888	return 0xffffffff;
889	889	}
890	890
891		static WRITE32_HANDLER( ds2404_reset_w )
892		{
893		if( ACCESSING_BITS_0_7 ) {
894		DS2404_1W_reset_w(space, offset, data);
895		}
896		}
897
898		static READ32_HANDLER( ds2404_data_r )
899		{
900		if( ACCESSING_BITS_0_7 ) {
901		return DS2404_data_r(space, offset);
902		}
903		return 0;
904		}
905
906		static WRITE32_HANDLER( ds2404_data_w )
907		{
908		if( ACCESSING_BITS_0_7 ) {
909		DS2404_data_w(space, offset, data);
910		}
911		}
912
913		static WRITE32_HANDLER( ds2404_clk_w )
914		{
915		if( ACCESSING_BITS_0_7 ) {
916		DS2404_clk_w(space, offset, data);
917		}
918		}
919
920	891	static WRITE32_HANDLER( eeprom_w )
921	892	{
922	893	const device_config *oki2 = devtag_get_device(space->machine, "oki2");
r6740	r6741
1090	1061	AM_RANGE(0x00000680, 0x00000683) AM_WRITE(sound_fifo_w)
1091	1062	AM_RANGE(0x00000684, 0x00000687) AM_READ(sound_fifo_status_r)
1092	1063	AM_RANGE(0x00000684, 0x00000687) AM_WRITENOP            /* Unknown */
1093		AM_RANGE(0x000006d0, 0x000006d3) AM_WRITE(ds2404_reset_w)
1094		AM_RANGE(0x000006d4, 0x000006d7) AM_WRITE(ds2404_data_w)
1095		AM_RANGE(0x000006d8, 0x000006db) AM_WRITE(ds2404_clk_w)
1096		AM_RANGE(0x000006dc, 0x000006df) AM_READ(ds2404_data_r)
	1064	AM_RANGE(0x000006d0, 0x000006d3) AM_DEVWRITE8("ds2404", ds2404_1w_reset_w, 0x000000ff)
	1065	AM_RANGE(0x000006d4, 0x000006d7) AM_DEVWRITE8("ds2404", ds2404_data_w, 0x000000ff)
	1066	AM_RANGE(0x000006d8, 0x000006db) AM_DEVWRITE8("ds2404", ds2404_clk_w, 0x000000ff)
	1067	AM_RANGE(0x000006dc, 0x000006df) AM_DEVREAD8("ds2404", ds2404_data_r, 0x000000ff)
1097	1068	AM_RANGE(0x00000800, 0x0003ffff) AM_RAM AM_BASE(&spimainram)
1098	1069	AM_RANGE(0x00200000, 0x003fffff) AM_ROM AM_SHARE("share2")
1099	1070	AM_RANGE(0x00a00000, 0x013fffff) AM_READ(soundrom_r)
r6740	r6741
1822	1793
1823	1794	static NVRAM_HANDLER( spi )
1824	1795	{
1825		if( read_or_write ) {
1826		DS2404_save(file);
1827		} else {
1828		DS2404_init(machine, 1995, 1, 1);
1829
1830		if(file) {
1831		DS2404_load(file);
1832		}
1833		}
1834
1835	1796	nvram_handler_intelflash(machine, 0, file, read_or_write);
1836	1797	nvram_handler_intelflash(machine, 1, file, read_or_write);
1837	1798	}
r6740	r6741
1874	1835
1875	1836	/* SPI */
1876	1837
	1838	static MACHINE_START( spi )
	1839	{
	1840	z80_rom = auto_alloc_array(machine, UINT8, 0x40000);
	1841	}
	1842
1877	1843	static MACHINE_RESET( spi )
1878	1844	{
1879	1845	int i;
r6740	r6741
1889	1855	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000688, 0x0000068b, 0, 0, z80_prg_fifo_w);
1890	1856	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000068c, 0x0000068f, 0, 0, z80_enable_w);
1891	1857
1892		z80_rom = auto_alloc_array(machine, UINT8, 0x40000);
1893	1858	memory_set_bankptr(machine, "bank4", z80_rom);
1894	1859	memory_set_bankptr(machine, "bank5", z80_rom);
1895	1860
r6740	r6741
1923	1888
1924	1889	MDRV_QUANTUM_TIME(HZ(12000))
1925	1890
	1891	MDRV_MACHINE_START(spi)
1926	1892	MDRV_MACHINE_RESET(spi)
1927	1893	MDRV_NVRAM_HANDLER(spi)
1928	1894
	1895	MDRV_DS2404_ADD("ds2404", 1995, 1, 1)
	1896
1929	1897	/* video hardware */
1930	1898	MDRV_SCREEN_ADD("screen", RASTER)
1931	1899	MDRV_SCREEN_REFRESH_RATE(54)
r6740	r6741
1948	1916	MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
1949	1917	MACHINE_DRIVER_END
1950	1918
	1919	static MACHINE_START( sxx2f )
	1920	{
	1921	z80_rom = auto_alloc_array(machine, UINT8, 0x40000);
	1922	}
	1923
1951	1924	static MACHINE_RESET( sxx2f )
1952	1925	{
1953	1926	UINT8 *rom = memory_region(machine, "soundcpu");
1954	1927
1955		z80_rom = auto_alloc_array(machine, UINT8, 0x40000);
1956	1928	memory_set_bankptr(machine, "bank4", z80_rom);
1957	1929	memory_set_bankptr(machine, "bank5", z80_rom);
1958	1930
r6740	r6741
1960	1932
1961	1933	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000068c, 0x0000068f, 0, 0, eeprom_w);
1962	1934	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000680, 0x00000683, 0, 0, sb_coin_r);
	1935
1963	1936	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), spi_irq_callback);
1964	1937
1965	1938	sb_coin_latch = 0;
r6740	r6741
1969	1942
1970	1943	MDRV_IMPORT_FROM(spi)
1971	1944
	1945	MDRV_MACHINE_START(sxx2f)
1972	1946	MDRV_MACHINE_RESET(sxx2f)
1973	1947	MDRV_NVRAM_HANDLER(sxx2f)
1974	1948
r6740	r6741
1988	1962	MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)
1989	1963	MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
1990	1964
	1965	MDRV_MACHINE_START(sxx2f)
1991	1966	MDRV_MACHINE_RESET(sxx2f)
1992	1967	MDRV_NVRAM_HANDLER(sxx2f)
1993	1968

src/mame/drivers/coolpool.c

r6740	r6741
54	54	#define NVRAM_UNLOCK_SEQ_LEN (ARRAY_LENGTH(nvram_unlock_seq))
55	55	static UINT16 nvram_write_seq[NVRAM_UNLOCK_SEQ_LEN];
56	56	static UINT8 nvram_write_enable;
57		static emu_timer *nvram_write_timer;
58	57
59	58
60	59
61	60	/*************************************
62	61	*
63		*  Prototypes
64		*
65		*************************************/
66
67		static TIMER_CALLBACK( nvram_write_timeout );
68
69
70
71
72		/*************************************
73		*
74	62	*  Video updates
75	63	*
76	64	*************************************/
r6740	r6741
148	136	static MACHINE_RESET( amerdart )
149	137	{
150	138	nvram_write_enable = 0;
151		nvram_write_timer = timer_alloc(machine, nvram_write_timeout, NULL);
152	139	}
153	140
154	141
r6740	r6741
156	143	{
157	144	tlc34076_reset(6);
158	145	nvram_write_enable = 0;
159		nvram_write_timer = timer_alloc(machine, nvram_write_timeout, NULL);
160	146	}
161	147
162	148
r6740	r6741
167	153	*
168	154	*************************************/
169	155
170		static TIMER_CALLBACK( nvram_write_timeout )
	156	static TIMER_DEVICE_CALLBACK( nvram_write_timeout )
171	157	{
172	158	nvram_write_enable = 0;
173	159	}
r6740	r6741
183	169	if (!memcmp(nvram_unlock_seq, nvram_write_seq, sizeof(nvram_unlock_seq)))
184	170	{
185	171	nvram_write_enable = 1;
186		timer_adjust_oneshot(nvram_write_timer, ATTOTIME_IN_MSEC(1000), 0);
	172	timer_device_adjust_oneshot(devtag_get_device(space->machine, "nvram_timer"), ATTOTIME_IN_MSEC(1000), 0);
187	173	}
188	174	}
189	175
r6740	r6741
695	681	MDRV_MACHINE_RESET(amerdart)
696	682	MDRV_NVRAM_HANDLER(generic_0fill)
697	683
	684	MDRV_TIMER_ADD("nvram_timer", nvram_write_timeout)
	685
698	686	/* video hardware */
699	687	MDRV_VIDEO_UPDATE(tms340x0)
700	688
r6740	r6741
724	712	MDRV_MACHINE_RESET(coolpool)
725	713	MDRV_NVRAM_HANDLER(generic_0fill)
726	714
	715	MDRV_TIMER_ADD("nvram_timer", nvram_write_timeout)
	716
727	717	/* video hardware */
728	718	MDRV_VIDEO_UPDATE(tms340x0)
729	719

src/mame/drivers/midtunit.c

r6740	r6741
24	24	#include "cpu/adsp2100/adsp2100.h"
25	25	#include "audio/williams.h"
26	26	#include "audio/dcs.h"
27		#include "midtunit.h"
	27	#include "includes/midtunit.h"
28	28
29	29
30	30	#define CPU_CLOCK      (50000000)

src/mame/drivers/drmicro.c

r6740	r6741
12	12	#include "cpu/z80/z80.h"
13	13	#include "sound/msm5205.h"
14	14	#include "sound/sn76496.h"
15		#include "drmicro.h"
	15	#include "includes/drmicro.h"
16	16
17	17	#define MCLK 18432000
18	18

src/mame/drivers/niyanpai.c

r6740	r6741
37	37	#include "cpu/m68000/m68000.h"
38	38	#include "machine/m68kfmly.h"
39	39	#include "machine/z80ctc.h"
40		#include "nb1413m3.h"
	40	#include "includes/nb1413m3.h"
41	41	#include "sound/dac.h"
42	42	#include "sound/3812intf.h"
43	43	#include "cpu/z80/z80daisy.h"

src/mame/drivers/suprnova.c

r6740	r6741
449	449	/* start old driver code */
450	450
451	451
452		static TIMER_CALLBACK( interrupt_callback )
	452	static TIMER_DEVICE_CALLBACK( interrupt_callback )
453	453	{
454		cputag_set_input_line(machine, "maincpu", param, HOLD_LINE);
	454	cputag_set_input_line(timer->machine, "maincpu", param, HOLD_LINE);
455	455	}
456	456
457	457	static MACHINE_RESET(skns)
458	458	{
459		timer_pulse(machine, ATTOTIME_IN_MSEC(2), NULL, 15, interrupt_callback);
460		timer_pulse(machine, ATTOTIME_IN_MSEC(8), NULL, 11, interrupt_callback);
461		timer_pulse(machine, cputag_clocks_to_attotime(machine, "maincpu", 1824), NULL, 9, interrupt_callback);
462
463	459	memory_set_bankptr(machine, "bank1",memory_region(machine, "user1"));
464	460	}
465	461
r6740	r6741
842	838	MDRV_MACHINE_RESET(skns)
843	839	MDRV_NVRAM_HANDLER(generic_1fill)
844	840
	841	MDRV_TIMER_ADD_PERIODIC("int15_timer", interrupt_callback, MSEC(2))
	842	MDRV_TIMER_PARAM(15)
	843	MDRV_TIMER_ADD_PERIODIC("int11_timer", interrupt_callback, MSEC(8))
	844	MDRV_TIMER_PARAM(11)
	845	MDRV_TIMER_ADD_PERIODIC("int9_timer", interrupt_callback, HZ(28638000/1824))
	846	MDRV_TIMER_PARAM(9)
	847
845	848	MDRV_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE)
846	849
847	850	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/namcofl.c

r6740	r6741
158	158	#include "driver.h"
159	159	#include "deprecat.h"
160	160	#include "machine/eeprom.h"
161		#include "namconb1.h"
162		#include "namcos2.h"
163		#include "namcoic.h"
	161	#include "includes/namconb1.h"
	162	#include "includes/namcos2.h"
	163	#include "includes/namcoic.h"
164	164	#include "cpu/i960/i960.h"
165	165	#include "cpu/m37710/m37710.h"
166	166	#include "sound/c352.h"

src/mame/drivers/luckgrln.c

r6740	r6741
75	75
76	76	#include "driver.h"
77	77	#include "cpu/z180/z180.h"
	78	#include "video/mc6845.h"
78	79
79	80
80	81	static ADDRESS_MAP_START( mainmap, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
87	88
88	89	static ADDRESS_MAP_START( portmap, ADDRESS_SPACE_IO, 8 )
89	90	ADDRESS_MAP_GLOBAL_MASK(0xff) // i think
90		AM_RANGE( 0x0000, 0x003f ) AM_RAM // Z180 internal regs
	91	AM_RANGE(0x0000, 0x003f) AM_RAM // Z180 internal regs
	92	AM_RANGE(0x00b0, 0x00b0) AM_DEVWRITE("crtc", mc6845_address_w)
	93	AM_RANGE(0x00b1, 0x00b1) AM_DEVWRITE("crtc", mc6845_register_w)
91	94	ADDRESS_MAP_END
92	95
93	96
r6740	r6741
120	123	return 0;
121	124	}
122	125
	126	static const mc6845_interface mc6845_intf =
	127	{
	128	"screen",   /* screen we are acting on */
	129	8,         /* number of pixels per video memory address */
	130	NULL,      /* before pixel update callback */
	131	NULL,      /* row update callback */
	132	NULL,      /* after pixel update callback */
	133	DEVCB_NULL,   /* callback for display state changes */
	134	DEVCB_NULL,   /* callback for cursor state changes */
	135	DEVCB_NULL,   /* HSYNC callback */
	136	DEVCB_NULL,   /* VSYNC callback */
	137	NULL      /* update address callback */
	138	};
	139
123	140	static MACHINE_DRIVER_START( luckgrln )
124	141	MDRV_CPU_ADD("maincpu", Z180,8000000)
125	142	MDRV_CPU_PROGRAM_MAP(mainmap)
126	143	MDRV_CPU_IO_MAP(portmap)
127	144	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
128	145
	146	MDRV_MC6845_ADD("crtc", H46505, 6000000/4, mc6845_intf)   /* unknown clock, hand tuned to get ~60 fps */
	147
	148
129	149	MDRV_SCREEN_ADD("screen", RASTER)
130	150	MDRV_SCREEN_REFRESH_RATE(60)
131	151	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))

src/mame/drivers/volfied.c

r6740	r6741
50	50	#include "driver.h"
51	51	#include "cpu/z80/z80.h"
52	52	#include "cpu/m68000/m68000.h"
53		#include "taitoipt.h"
	53	#include "includes/taitoipt.h"
54	54	#include "video/taitoic.h"
55	55	#include "audio/taitosnd.h"
56	56	#include "sound/2203intf.h"

src/mame/drivers/dribling.c

r6740	r6741
28	28	#include "driver.h"
29	29	#include "cpu/z80/z80.h"
30	30	#include "machine/8255ppi.h"
31		#include "dribling.h"
	31	#include "includes/dribling.h"
32	32
33	33
34	34

src/mame/drivers/megadriv.c

r6740	r6741
163	163	static int megadrive_max_hposition;
164	164
165	165
166		static emu_timer* frame_timer;
167		static emu_timer* scanline_timer;
168		static emu_timer* irq6_on_timer;
169		static emu_timer* irq4_on_timer;
	166	static const device_config* frame_timer;
	167	static const device_config* scanline_timer;
	168	static const device_config* irq6_on_timer;
	169	static const device_config* irq4_on_timer;
170	170	static bitmap_t* render_bitmap;
171	171	//emu_timer* vblankirq_off_timer;
172	172
r6740	r6741
1431	1431	for (i=0; i<3; i++)
1432	1432	{
1433	1433	io_timeout[i] = timer_alloc(machine, io_timeout_timer_callback, (void*)(FPTR)i);
1434		io_stage[i] = -1;
1435	1434	}
1436	1435	}
1437	1436
r6740	r6741
1650	1649	{
1651	1650	const input_port_token *ipt = machine->gamedrv->ipt;
1652	1651
	1652	if (ipt == INPUT_PORTS_NAME(megadri6))
	1653	init_megadri6_io(machine);
	1654
	1655	if (ipt == INPUT_PORTS_NAME(ssf2ghw))
	1656	init_megadri6_io(machine);
	1657	}
	1658
	1659	static void megadrive_reset_io(running_machine *machine)
	1660	{
	1661	int i;
	1662
1653	1663	megadrive_io_data_regs[0] = 0x7f;
1654	1664	megadrive_io_data_regs[1] = 0x7f;
1655	1665	megadrive_io_data_regs[2] = 0x7f;
r6740	r6741
1660	1670	megadrive_io_tx_regs[1] = 0xff;
1661	1671	megadrive_io_tx_regs[2] = 0xff;
1662	1672
1663		if (ipt == INPUT_PORTS_NAME(megadri6))
1664		init_megadri6_io(machine);
1665
1666		if (ipt == INPUT_PORTS_NAME(ssf2ghw))
1667		init_megadri6_io(machine);
	1673	for (i=0; i<3; i++)
	1674	{
	1675	io_stage[i] = -1;
	1676	}
1668	1677	}
1669	1678
1670	1679	/************* 6 buttons version **************************/
r6740	r6741
3838	3847	//  int xxx;
3839	3848	/* reference */
3840	3849
3841		//  time_elapsed_since_crap = timer_timeelapsed(frame_timer);
	3850	//  time_elapsed_since_crap = timer_device_timeelapsed(frame_timer);
3842	3851	//  xxx = cputag_attotime_to_clocks(screen->machine, "maincpu", time_elapsed_since_crap);
3843	3852	//  mame_printf_debug("update cycles %d, %08x %08x\n",xxx, (UINT32)(time_elapsed_since_crap.attoseconds>>32),(UINT32)(time_elapsed_since_crap.attoseconds&0xffffffff));
3844	3853
r6740	r6741
3847	3856
3848	3857
3849	3858
3850		static TIMER_CALLBACK( frame_timer_callback )
	3859	static TIMER_DEVICE_CALLBACK( frame_timer_callback )
3851	3860	{
3852	3861	/* callback */
3853	3862	}
r6740	r6741
5383	5392	attotime time_elapsed_since_scanline_timer;
5384	5393	UINT16 value4;
5385	5394
5386		time_elapsed_since_scanline_timer = timer_timeelapsed(scanline_timer);
	5395	time_elapsed_since_scanline_timer = timer_device_timeelapsed(scanline_timer);
5387	5396
5388	5397	if (time_elapsed_since_scanline_timer.attoseconds<(ATTOSECONDS_PER_SECOND/megadriv_framerate /megadrive_total_scanlines))
5389	5398	{
r6740	r6741
5671	5680
5672	5681	static int irq4counter;
5673	5682
5674		static emu_timer* render_timer;
	5683	static const device_config* render_timer;
5675	5684
5676		static TIMER_CALLBACK( render_timer_callback )
	5685	static TIMER_DEVICE_CALLBACK( render_timer_callback )
5677	5686	{
5678	5687	if (genesis_scanline_counter>=0 && genesis_scanline_counter<megadrive_visible_scanlines)
5679	5688	{
5680		genesis_render_scanline(machine, genesis_scanline_counter);
	5689	genesis_render_scanline(timer->machine, genesis_scanline_counter);
5681	5690	}
5682	5691	}
5683	5692
5684	5693
5685		static TIMER_CALLBACK( scanline_timer_callback )
	5694	static TIMER_DEVICE_CALLBACK( scanline_timer_callback )
5686	5695	{
5687	5696	/* This function is called at the very start of every scanline starting at the very
5688	5697	top-left of the screen.  The first scanline is scanline 0 (we set scanline to -1 in
5689	5698	VIDEO_EOF) */
5690	5699
5691		timer_call_after_resynch(machine, NULL, 0, 0);
	5700	timer_call_after_resynch(timer->machine, NULL, 0, 0);
5692	5701	/* Compensate for some rounding errors
5693	5702
5694	5703	When the counter reaches 261 we should have reached the end of the frame, however due
r6740	r6741
5700	5709	{
5701	5710	genesis_scanline_counter++;
5702	5711	//      mame_printf_debug("scanline %d\n",genesis_scanline_counter);
5703		timer_adjust_oneshot(scanline_timer, attotime_div(ATTOTIME_IN_HZ(megadriv_framerate), megadrive_total_scanlines), 0);
5704		timer_adjust_oneshot(render_timer, ATTOTIME_IN_USEC(1), 0);
	5712	timer_device_adjust_oneshot(scanline_timer, attotime_div(ATTOTIME_IN_HZ(megadriv_framerate), megadrive_total_scanlines), 0);
	5713	timer_device_adjust_oneshot(render_timer, ATTOTIME_IN_USEC(1), 0);
5705	5714
5706	5715	if (genesis_scanline_counter==megadrive_irq6_scanline )
5707	5716	{
5708	5717	//  mame_printf_debug("x %d",genesis_scanline_counter);
5709		timer_adjust_oneshot(irq6_on_timer,  ATTOTIME_IN_USEC(6), 0);
	5718	timer_device_adjust_oneshot(irq6_on_timer,  ATTOTIME_IN_USEC(6), 0);
5710	5719	megadrive_irq6_pending = 1;
5711	5720	megadrive_vblank_flag = 1;
5712	5721
r6740	r6741
5743	5752
5744	5753	if (MEGADRIVE_REG0_IRQ4_ENABLE)
5745	5754	{
5746		timer_adjust_oneshot(irq4_on_timer,  ATTOTIME_IN_USEC(1), 0);
	5755	timer_device_adjust_oneshot(irq4_on_timer,  ATTOTIME_IN_USEC(1), 0);
5747	5756	//mame_printf_debug("irq4 on scanline %d reload %d\n",genesis_scanline_counter,MEGADRIVE_REG0A_HINT_VALUE);
5748	5757	}
5749	5758	}
r6740	r6741
5754	5763	else irq4counter=MEGADRIVE_REG0A_HINT_VALUE;
5755	5764	}
5756	5765
5757		//if (genesis_scanline_counter==0) timer_adjust_oneshot(irq4_on_timer,  ATTOTIME_IN_USEC(2), 0);
	5766	//if (genesis_scanline_counter==0) timer_device_adjust_oneshot(irq4_on_timer,  ATTOTIME_IN_USEC(2), 0);
5758	5767
5759	5768
5760	5769
5761	5770
5762		if (cputag_get_cpu(machine, "genesis_snd_z80") != NULL)
	5771	if (cputag_get_cpu(timer->machine, "genesis_snd_z80") != NULL)
5763	5772	{
5764	5773	if (genesis_scanline_counter == megadrive_z80irq_scanline)
5765	5774	{
5766	5775	if ((genz80.z80_has_bus == 1) && (genz80.z80_is_reset == 0))
5767		cputag_set_input_line(machine, "genesis_snd_z80", 0, HOLD_LINE);
	5776	cputag_set_input_line(timer->machine, "genesis_snd_z80", 0, HOLD_LINE);
5768	5777	}
5769	5778	if (genesis_scanline_counter == megadrive_z80irq_scanline + 1)
5770	5779	{
5771		cputag_set_input_line(machine, "genesis_snd_z80", 0, CLEAR_LINE);
	5780	cputag_set_input_line(timer->machine, "genesis_snd_z80", 0, CLEAR_LINE);
5772	5781	}
5773	5782	}
5774	5783
r6740	r6741
5780	5789
5781	5790	}
5782	5791
5783		static TIMER_CALLBACK( irq6_on_callback )
	5792	static TIMER_DEVICE_CALLBACK( irq6_on_callback )
5784	5793	{
5785	5794	//mame_printf_debug("irq6 active on %d\n",genesis_scanline_counter);
5786	5795
5787	5796	{
5788	5797	//      megadrive_irq6_pending = 1;
5789	5798	if (MEGADRIVE_REG01_IRQ6_ENABLE || genesis_always_irq6)
5790		cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
	5799	cputag_set_input_line(timer->machine, "maincpu", 6, HOLD_LINE);
5791	5800	}
5792	5801	}
5793	5802
5794		static TIMER_CALLBACK( irq4_on_callback )
	5803	static TIMER_DEVICE_CALLBACK( irq4_on_callback )
5795	5804	{
5796	5805	//mame_printf_debug("irq4 active on %d\n",genesis_scanline_counter);
5797		cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
	5806	cputag_set_input_line(timer->machine, "maincpu", 4, HOLD_LINE);
5798	5807	}
5799	5808
5800	5809	/*****************************************************************************************/
r6740	r6741
5803	5812	static int hazemdchoice_megadrive_region_pal;
5804	5813	static int hazemdchoice_megadriv_framerate;
5805	5814
	5815	MACHINE_START( megadriv )
	5816	{
	5817	megadrive_init_io(machine);
	5818	}
	5819
5806	5820	MACHINE_RESET( megadriv )
5807	5821	{
5808	5822	/* default state of z80 = reset, with bus */
r6740	r6741
5853	5867
5854	5868	megadrive_imode = 0;
5855	5869
5856		megadrive_init_io(machine);
	5870	megadrive_reset_io(machine);
5857	5871
5858		frame_timer = timer_alloc(machine, frame_timer_callback, NULL);
5859		scanline_timer = timer_alloc(machine, scanline_timer_callback, NULL);
5860		render_timer = timer_alloc(machine, render_timer_callback, NULL);
	5872	frame_timer = devtag_get_device(machine, "frame_timer");
	5873	scanline_timer = devtag_get_device(machine, "scanline_timer");
	5874	render_timer = devtag_get_device(machine, "render_timer");
5861	5875
5862		irq6_on_timer = timer_alloc(machine, irq6_on_callback, NULL);
5863		irq4_on_timer = timer_alloc(machine, irq4_on_callback, NULL);
	5876	irq6_on_timer = devtag_get_device(machine, "irq6_timer");
	5877	irq4_on_timer = devtag_get_device(machine, "irq4_timer");
5864	5878
5865		timer_adjust_oneshot(frame_timer, attotime_zero, 0);
5866		timer_adjust_oneshot(scanline_timer, attotime_zero, 0);
	5879	timer_device_adjust_oneshot(frame_timer, attotime_zero, 0);
	5880	timer_device_adjust_oneshot(scanline_timer, attotime_zero, 0);
5867	5881
5868	5882	if (genesis_other_hacks)
5869	5883	{
r6740	r6741
5902	5916
5903	5917	void megadriv_stop_scanline_timer(void)
5904	5918	{
5905		timer_adjust_oneshot(scanline_timer,  attotime_never, 0);
	5919	timer_device_adjust_oneshot(scanline_timer,  attotime_never, 0);
5906	5920	}
5907	5921
5908	5922	/*
r6740	r6741
6014	6028	//  /* reference */
6015	6029	frametime = ATTOSECONDS_PER_SECOND/megadriv_framerate;
6016	6030
6017		//time_elapsed_since_crap = timer_timeelapsed(frame_timer);
	6031	//time_elapsed_since_crap = timer_device_timeelapsed(frame_timer);
6018	6032	//xxx = cputag_attotime_to_clocks(machine, "maincpu",time_elapsed_since_crap);
6019	6033	//mame_printf_debug("---------- cycles %d, %08x %08x\n",xxx, (UINT32)(time_elapsed_since_crap.attoseconds>>32),(UINT32)(time_elapsed_since_crap.attoseconds&0xffffffff));
6020	6034	//mame_printf_debug("---------- framet %d, %08x %08x\n",xxx, (UINT32)(frametime>>32),(UINT32)(frametime&0xffffffff));
6021		timer_adjust_oneshot(frame_timer,  attotime_zero, 0);
	6035	timer_device_adjust_oneshot(frame_timer,  attotime_zero, 0);
6022	6036	}
6023	6037
6024		timer_adjust_oneshot(scanline_timer,  attotime_zero, 0);
	6038	timer_device_adjust_oneshot(scanline_timer,  attotime_zero, 0);
6025	6039
6026	6040	}
6027	6041
r6740	r6741
6054	6068	#endif
6055	6069
6056	6070
	6071	MACHINE_DRIVER_START( megadriv_timers )
	6072	MDRV_TIMER_ADD("frame_timer", frame_timer_callback)
	6073	MDRV_TIMER_ADD("scanline_timer", scanline_timer_callback)
	6074	MDRV_TIMER_ADD("render_timer", render_timer_callback)
	6075	MDRV_TIMER_ADD("irq6_timer", irq6_on_callback)
	6076	MDRV_TIMER_ADD("irq4_timer", irq4_on_callback)
	6077	MACHINE_DRIVER_END
	6078
	6079
6057	6080	MACHINE_DRIVER_START( megadriv )
6058	6081	MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK_NTSC / 7) /* 7.67 MHz */
6059	6082	MDRV_CPU_PROGRAM_MAP(megadriv_map)
r6740	r6741
6064	6087	MDRV_CPU_IO_MAP(megadriv_z80_io_map)
6065	6088	/* IRQ handled via the timers */
6066	6089
	6090	MDRV_MACHINE_START(megadriv)
6067	6091	MDRV_MACHINE_RESET(megadriv)
6068	6092
	6093	MDRV_IMPORT_FROM(megadriv_timers)
	6094
6069	6095	MDRV_SCREEN_ADD("megadriv", RASTER)
6070	6096	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB15)
6071	6097	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
6108	6134	MDRV_CPU_IO_MAP(megadriv_z80_io_map)
6109	6135	/* IRQ handled via the timers */
6110	6136
	6137	MDRV_MACHINE_START(megadriv)
6111	6138	MDRV_MACHINE_RESET(megadriv)
6112	6139
	6140	MDRV_IMPORT_FROM(megadriv_timers)
	6141
6113	6142	MDRV_SCREEN_ADD("megadriv", RASTER)
6114	6143	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB15)
6115	6144	MDRV_SCREEN_REFRESH_RATE(50)

src/mame/drivers/itech32.c

r6740	r6741
352	352	#include "cpu/m68000/m68000.h"
353	353	#include "machine/6522via.h"
354	354	#include "machine/ticket.h"
355		#include "itech32.h"
	355	#include "includes/itech32.h"
356	356	#include "sound/es5506.h"
357	357	#include "machine/timekpr.h"
358	358	#include "devconv.h"
r6740	r6741
468	468	sound_data = 0;
469	469	sound_return = 0;
470	470	sound_int_state = 0;
471
472		/* reset the ticket dispenser */
473		ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH);
474	471	}
475	472
476	473
r6740	r6741
735	732	set_led_status(space->machine, 1, data & 0x01);
736	733	set_led_status(space->machine, 2, data & 0x02);
737	734	set_led_status(space->machine, 3, data & 0x04);
738		ticket_dispenser_w(space, 0, (data & 0x10) << 3);
	735	ticket_dispenser_w(devtag_get_device(device->machine, "ticket"), 0, (data & 0x10) << 3);
739	736	coin_counter_w(space->machine, 0, (data & 0x20) >> 5);
740	737	}
741	738
r6740	r6741
754	751	/* bit 4 controls the ticket dispenser */
755	752	/* bit 5 controls the coin counter */
756	753	/* bit 6 controls the diagnostic sound LED */
757		ticket_dispenser_w(space, 0, (data & 0x10) << 3);
	754	ticket_dispenser_w(devtag_get_device(device->machine, "ticket"), 0, (data & 0x10) << 3);
758	755	coin_counter_w(space->machine, 0, (data & 0x20) >> 5);
759	756	}
760	757
r6740	r6741
1738	1735	MDRV_MACHINE_RESET(itech32)
1739	1736	MDRV_NVRAM_HANDLER(itech32)
1740	1737
	1738	MDRV_TICKET_DISPENSER_ADD("ticket", 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
	1739
1741	1740	/* video hardware */
1742	1741	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1743	1742	MDRV_PALETTE_LENGTH(8192)
r6740	r6741
4123	4122	*
4124	4123	*************************************/
4125	4124
4126		GAME( 1992, timekill, 0,        timekill, timekill, timekill, ROT0, "Strata/Incredible Technologies", "Time Killers (v1.32)", 0 )
	4125	GAME( 1992, timekill,    0,        timekill, timekill, timekill, ROT0, "Strata/Incredible Technologies", "Time Killers (v1.32)", 0 )
4127	4126	GAME( 1992, timekill131, timekill, timekill, timekill, timekill, ROT0, "Strata/Incredible Technologies", "Time Killers (v1.31)", 0 )
4128		GAME( 1993, hardyard, 0,        bloodstm, hardyard, hardyard, ROT0, "Strata/Incredible Technologies", "Hard Yardage (v1.20)", 0 )
4129		GAME( 1993, hardyard10, hardyard, bloodstm, hardyard, hardyard, ROT0, "Strata/Incredible Technologies", "Hard Yardage (v1.00)", 0 )
4130		GAME( 1994, bloodstm, 0,        bloodstm, bloodstm, bloodstm, ROT0, "Strata/Incredible Technologies", "Blood Storm (v2.22)", 0 )
4131		GAME( 1994, bloodstm22, bloodstm, bloodstm, bloodstm, bloodstm, ROT0, "Strata/Incredible Technologies", "Blood Storm (v2.20)", 0 )
4132		GAME( 1994, bloodstm21, bloodstm, bloodstm, bloodstm, bloodstm, ROT0, "Strata/Incredible Technologies", "Blood Storm (v2.10)", 0 )
4133		GAME( 1994, bloodstm11, bloodstm, bloodstm, bloodstm, bloodstm, ROT0, "Strata/Incredible Technologies", "Blood Storm (v1.10)", 0 )
4134		GAME( 1994, pairs,    0,        bloodstm, pairs,    bloodstm, ROT0, "Strata/Incredible Technologies", "Pairs (V1.2, 09/30/94)", 0 )
4135		GAME( 1994, pairsa,   pairs,    bloodstm, pairs,    bloodstm, ROT0, "Strata/Incredible Technologies", "Pairs (09/07/94)", 0 )
4136		GAME( 1994, hotmemry, pairs,    bloodstm, pairs,    bloodstm, ROT0, "Tuning/Incredible Technologies", "Hot Memory (V1.2, Germany)", 0 )
4137		GAME( 1994, drivedge, 0,        drivedge, drivedge, drivedge, ROT0, "Strata/Incredible Technologies", "Driver's Edge", GAME_IMPERFECT_GRAPHICS )
4138		GAME( 1995, wcbowl,   0,        sftm,     wcbowln,  wcbowln,  ROT0, "Incredible Technologies",        "World Class Bowling (v1.66)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
4139		GAME( 1995, wcbowl165, wcbowl,   sftm,     shufbowl, wcbowln,  ROT0, "Incredible Technologies",        "World Class Bowling (v1.65)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
4140		GAME( 1995, wcbowl161, wcbowl,   sftm,     shufbowl, wcbowln,  ROT0, "Incredible Technologies",        "World Class Bowling (v1.61)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
4141		GAME( 1995, wcbowl16,  wcbowl,   sftm,     shufbowl, wcbowln,  ROT0, "Incredible Technologies",        "World Class Bowling (v1.6)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
4142		GAME( 1995, wcbowl15,  wcbowl,   bloodstm, wcbowl,   wcbowl,   ROT0, "Incredible Technologies",        "World Class Bowling (v1.5)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
4143		GAME( 1995, wcbowl13,  wcbowl,   bloodstm, wcbowl,   wcbowl,   ROT0, "Incredible Technologies",        "World Class Bowling (v1.3)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
4144		GAME( 1995, wcbowl12,  wcbowl,   bloodstm, wcbowl,   wcbowl,   ROT0, "Incredible Technologies",        "World Class Bowling (v1.2)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
4145		GAME( 1995, sftm,     0,        sftm,     sftm,     sftm,     ROT0, "Capcom/Incredible Technologies", "Street Fighter: The Movie (v1.12)" , 0) /* PIC 16C54 labeled as ITSF-1 */
4146		GAME( 1995, sftm111,  sftm,     sftm,     sftm,     sftm110,  ROT0, "Capcom/Incredible Technologies", "Street Fighter: The Movie (v1.11)" , 0) /* PIC 16C54 labeled as ITSF-1 */
4147		GAME( 1995, sftm110,  sftm,     sftm,     sftm,     sftm110,  ROT0, "Capcom/Incredible Technologies", "Street Fighter: The Movie (v1.10)" , 0) /* PIC 16C54 labeled as ITSF-1 */
4148		GAME( 1995, sftmj,    sftm,     sftm,     sftm,     sftm,     ROT0, "Capcom/Incredible Technologies", "Street Fighter: The Movie (v1.12N, Japan)" , 0) /* PIC 16C54 labeled as ITSF-1 */
4149		GAME( 1997, shufshot, 0,        sftm,     shufshot, shufshot, ROT0, "Strata/Incredible Technologies", "Shuffleshot (v1.40)" , 0) /* PIC 16C54 labeled as ITSHF-1 */
	4127	GAME( 1993, hardyard,    0,        bloodstm, hardyard, hardyard, ROT0, "Strata/Incredible Technologies", "Hard Yardage (v1.20)", 0 )
	4128	GAME( 1993, hardyard10,  hardyard, bloodstm, hardyard, hardyard, ROT0, "Strata/Incredible Technologies", "Hard Yardage (v1.00)", 0 )
	4129	GAME( 1994, bloodstm,    0,        bloodstm, bloodstm, bloodstm, ROT0, "Strata/Incredible Technologies", "Blood Storm (v2.22)", 0 )
	4130	GAME( 1994, bloodstm22,  bloodstm, bloodstm, bloodstm, bloodstm, ROT0, "Strata/Incredible Technologies", "Blood Storm (v2.20)", 0 )
	4131	GAME( 1994, bloodstm21,  bloodstm, bloodstm, bloodstm, bloodstm, ROT0, "Strata/Incredible Technologies", "Blood Storm (v2.10)", 0 )
	4132	GAME( 1994, bloodstm11,  bloodstm, bloodstm, bloodstm, bloodstm, ROT0, "Strata/Incredible Technologies", "Blood Storm (v1.10)", 0 )
	4133	GAME( 1994, pairs,       0,        bloodstm, pairs,    bloodstm, ROT0, "Strata/Incredible Technologies", "Pairs (V1.2, 09/30/94)", 0 )
	4134	GAME( 1994, pairsa,      pairs,    bloodstm, pairs,    bloodstm, ROT0, "Strata/Incredible Technologies", "Pairs (09/07/94)", 0 )
	4135	GAME( 1994, hotmemry,    pairs,    bloodstm, pairs,    bloodstm, ROT0, "Tuning/Incredible Technologies", "Hot Memory (V1.2, Germany)", 0 )
	4136	GAME( 1994, drivedge,    0,        drivedge, drivedge, drivedge, ROT0, "Strata/Incredible Technologies", "Driver's Edge", GAME_IMPERFECT_GRAPHICS )
	4137	GAME( 1995, wcbowl,      0,        sftm,     wcbowln,  wcbowln,  ROT0, "Incredible Technologies",        "World Class Bowling (v1.66)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
	4138	GAME( 1995, wcbowl165,   wcbowl,   sftm,     shufbowl, wcbowln,  ROT0, "Incredible Technologies",        "World Class Bowling (v1.65)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
	4139	GAME( 1995, wcbowl161,   wcbowl,   sftm,     shufbowl, wcbowln,  ROT0, "Incredible Technologies",        "World Class Bowling (v1.61)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
	4140	GAME( 1995, wcbowl16,    wcbowl,   sftm,     shufbowl, wcbowln,  ROT0, "Incredible Technologies",        "World Class Bowling (v1.6)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
	4141	GAME( 1995, wcbowl15,    wcbowl,   bloodstm, wcbowl,   wcbowl,   ROT0, "Incredible Technologies",        "World Class Bowling (v1.5)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
	4142	GAME( 1995, wcbowl13,    wcbowl,   bloodstm, wcbowl,   wcbowl,   ROT0, "Incredible Technologies",        "World Class Bowling (v1.3)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
	4143	GAME( 1995, wcbowl12,    wcbowl,   bloodstm, wcbowl,   wcbowl,   ROT0, "Incredible Technologies",        "World Class Bowling (v1.2)" , 0) /* PIC 16C54 labeled as ITBWL-1 */
	4144	GAME( 1995, sftm,        0,        sftm,     sftm,     sftm,     ROT0, "Capcom/Incredible Technologies", "Street Fighter: The Movie (v1.12)" , 0) /* PIC 16C54 labeled as ITSF-1 */
	4145	GAME( 1995, sftm111,     sftm,     sftm,     sftm,     sftm110,  ROT0, "Capcom/Incredible Technologies", "Street Fighter: The Movie (v1.11)" , 0) /* PIC 16C54 labeled as ITSF-1 */
	4146	GAME( 1995, sftm110,     sftm,     sftm,     sftm,     sftm110,  ROT0, "Capcom/Incredible Technologies", "Street Fighter: The Movie (v1.10)" , 0) /* PIC 16C54 labeled as ITSF-1 */
	4147	GAME( 1995, sftmj,       sftm,     sftm,     sftm,     sftm,     ROT0, "Capcom/Incredible Technologies", "Street Fighter: The Movie (v1.12N, Japan)" , 0) /* PIC 16C54 labeled as ITSF-1 */
	4148	GAME( 1997, shufshot,    0,        sftm,     shufshot, shufshot, ROT0, "Strata/Incredible Technologies", "Shuffleshot (v1.40)" , 0) /* PIC 16C54 labeled as ITSHF-1 */
4150	4149	GAME( 1997, shufshot139, shufshot, sftm,     shufshot, shufshot, ROT0, "Strata/Incredible Technologies", "Shuffleshot (v1.39)" , 0) /* PIC 16C54 labeled as ITSHF-1 */
4151	4150	GAME( 1997, shufshot137, shufshot, sftm,     shufbowl, shufshot, ROT0, "Strata/Incredible Technologies", "Shuffleshot (v1.37)" , 0) /* PIC 16C54 labeled as ITSHF-1 */
4152		GAME( 1997, wcbowl140, wcbowldx, tourny,   wcbowldx, wcbowlt,  ROT0, "Incredible Technologies",        "World Class Bowling Tournament (v1.40)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
4153		GAME( 1999, wcbowldx, 0,        sftm,     wcbowldx, shufshot, ROT0, "Incredible Technologies",        "World Class Bowling Deluxe (v2.00)" , 0) /* PIC 16C54 labeled as ITBWL-4 */
	4151	GAME( 1997, wcbowl140,   wcbowldx, tourny,   wcbowldx, wcbowlt,  ROT0, "Incredible Technologies",        "World Class Bowling Tournament (v1.40)" , 0) /* PIC 16C54 labeled as ITBWL-3 */
	4152	GAME( 1999, wcbowldx,    0,        sftm,     wcbowldx, shufshot, ROT0, "Incredible Technologies",        "World Class Bowling Deluxe (v2.00)" , 0) /* PIC 16C54 labeled as ITBWL-4 */
4154	4153
4155	4154	/*
4156	4155	The following naming conventions are used:

src/mame/drivers/megadriv.h

r6740	r6741
17	17	INPUT_PORTS_EXTERN( ssf2ghw );
18	18	INPUT_PORTS_EXTERN( megdsvp );
19	19
	20	MACHINE_DRIVER_EXTERN( megadriv_timers );
	21
20	22	MACHINE_DRIVER_EXTERN( megdsvppal );
21	23	MACHINE_DRIVER_EXTERN( megadriv );
22	24	MACHINE_DRIVER_EXTERN( megadpal );
r6740	r6741
53	55	extern UINT8 megadrive_io_data_regs[3];
54	56	extern UINT8 megadrive_io_ctrl_regs[3];
55	57
	58	MACHINE_START( megadriv );
56	59	MACHINE_RESET( megadriv );
57	60	VIDEO_START( megadriv );
58	61	VIDEO_UPDATE( megadriv );

src/mame/drivers/sspeedr.c

r6740	r6741
134	134	PORT_BIT( 0x1f, 0x00, IPT_POSITIONAL_V ) PORT_POSITIONS(30) PORT_REMAP_TABLE(sspeedr_controller_table + 2) PORT_SENSITIVITY(25) PORT_KEYDELTA(20)
135	135
136	136	PORT_START("DSW")
137		PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) )
	137	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) )  PORT_DIPLOCATION("SW1:1,2")
138	138	PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
139	139	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
140	140	PORT_DIPSETTING(    0x03, DEF_STR( 2C_3C ) )
141	141	PORT_DIPSETTING(    0x02, DEF_STR( 1C_2C ) )
142		PORT_DIPNAME( 0x0C, 0x08, "Play Time" )
	142	PORT_DIPNAME( 0x0C, 0x08, "Play Time" )  PORT_DIPLOCATION("SW1:3,4")
143	143	PORT_DIPSETTING(    0x00, "60 seconds")
144	144	PORT_DIPSETTING(    0x04, "70 seconds")
145	145	PORT_DIPSETTING(    0x08, "80 seconds")
146	146	PORT_DIPSETTING(    0x0C, "90 seconds")
147		PORT_DIPNAME( 0x10, 0x00, "Extended Play" )
	147	PORT_DIPNAME( 0x10, 0x00, "Extended Play" )  PORT_DIPLOCATION("SW1:5")
148	148	PORT_DIPSETTING(    0x00, "20 seconds" )
149	149	PORT_DIPSETTING(    0x10, "30 seconds" )
150		PORT_DIPNAME( 0xE0, 0x20, DEF_STR( Service_Mode ) )
	150	PORT_DIPNAME( 0xE0, 0x20, DEF_STR( Service_Mode ) )  PORT_DIPLOCATION("SW1:6,7,8")
151	151	PORT_DIPSETTING(    0x20, "Play Mode" )
152	152	PORT_DIPSETTING(    0xA0, "RAM/ROM Test" )
153	153	PORT_DIPSETTING(    0xE0, "Accelerator Adjustment" )
r6740	r6741
189	189	static MACHINE_DRIVER_START( sspeedr )
190	190
191	191	/* basic machine hardware */
192		MDRV_CPU_ADD("maincpu", Z80, 19968000 / 8)
	192	MDRV_CPU_ADD("maincpu", Z80, XTAL_19_968MHz/8)
193	193	MDRV_CPU_PROGRAM_MAP(sspeedr_map)
194	194	MDRV_CPU_IO_MAP(sspeedr_io_map)
195	195	MDRV_CPU_VBLANK_INT("screen", irq0_line_assert)

src/mame/drivers/ashnojoe.c

r6740	r6741
77	77	#include "cpu/m68000/m68000.h"
78	78	#include "sound/2203intf.h"
79	79	#include "sound/msm5205.h"
80		#include "ashnojoe.h"
	80	#include "includes/ashnojoe.h"
81	81
82	82	static READ16_HANDLER(fake_4a00a_r)
83	83	{

src/mame/drivers/mouser.c

r6740	r6741
21	21	static UINT8 mouser_nmi_enable;
22	22
23	23	/* From "video/mouser.c" */
	24	extern UINT8 *mouser_videoram;
	25	extern UINT8 *mouser_colorram;
	26
24	27	PALETTE_INIT( mouser );
25	28	WRITE8_HANDLER( mouser_flip_screen_x_w );
26	29	WRITE8_HANDLER( mouser_flip_screen_y_w );
r6740	r6741
57	60	AM_RANGE(0x0000, 0x5fff) AM_ROM
58	61	AM_RANGE(0x6000, 0x6bff) AM_RAM
59	62	AM_RANGE(0x8800, 0x88ff) AM_WRITENOP /* unknown */
60		AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
	63	AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE(&mouser_videoram)
61	64	AM_RANGE(0x9800, 0x9cff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
62		AM_RANGE(0x9c00, 0x9fff) AM_RAM AM_BASE_GENERIC(colorram)
	65	AM_RANGE(0x9c00, 0x9fff) AM_RAM AM_BASE(&mouser_colorram)
63	66	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1") AM_WRITE(mouser_nmi_enable_w) /* bit 0 = NMI Enable */
64	67	AM_RANGE(0xa001, 0xa001) AM_WRITE(mouser_flip_screen_x_w)
65	68	AM_RANGE(0xa002, 0xa002) AM_WRITE(mouser_flip_screen_y_w)

src/mame/drivers/undrfire.c

r6740	r6741
717	717	MACHINE DRIVERS
718	718	***********************************************************/
719	719
720		static MACHINE_RESET( undrfire )
721		{
722		taito_f3_soundsystem_reset(machine);
723
724		f3_68681_reset(machine);
725		}
726
727
728	720	static INTERRUPT_GEN( undrfire_interrupt )
729	721	{
730	722	frame_counter^=1;
r6740	r6741
738	730	MDRV_CPU_PROGRAM_MAP(undrfire_map)
739	731	MDRV_CPU_VBLANK_INT("screen", undrfire_interrupt)
740	732
741		TAITO_F3_SOUND_SYSTEM_CPU(16000000)
742
743		MDRV_MACHINE_RESET(undrfire)
744	733	MDRV_NVRAM_HANDLER(undrfire)
745	734
746	735	/* video hardware */
r6740	r6741
758	747	MDRV_VIDEO_UPDATE(undrfire)
759	748
760	749	/* sound hardware */
761		TAITO_F3_SOUND_SYSTEM_ES5505(30476100/2)
	750	MDRV_IMPORT_FROM(taito_f3_sound)
762	751	MACHINE_DRIVER_END
763	752
764	753
r6740	r6741
769	758	MDRV_CPU_PROGRAM_MAP(cbombers_cpua_map)
770	759	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
771	760
772		TAITO_F3_SOUND_SYSTEM_CPU(16000000)
773
774	761	MDRV_CPU_ADD("sub", M68000, 16000000)   /* 16 MHz */
775	762	MDRV_CPU_PROGRAM_MAP(cbombers_cpub_map)
776	763	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
777	764
778	765	MDRV_QUANTUM_TIME(HZ(480))   /* CPU slices - Need to interleave Cpu's 1 & 3 */
779	766
780		MDRV_MACHINE_RESET(undrfire)
781	767	MDRV_NVRAM_HANDLER(undrfire)
782	768
783	769	/* video hardware */
r6740	r6741
796	782	MDRV_VIDEO_UPDATE(cbombers)
797	783
798	784	/* sound hardware */
799		TAITO_F3_SOUND_SYSTEM_ES5505(30476100/2)
	785	MDRV_IMPORT_FROM(taito_f3_sound)
800	786	MACHINE_DRIVER_END
801	787
802	788

src/mame/drivers/grchamp.c

r6740	r6741
44	44	#include "driver.h"
45	45	#include "cpu/z80/z80.h"
46	46	#include "sound/ay8910.h"
47		#include "grchamp.h"
	47	#include "includes/grchamp.h"
48	48
49	49	#include "grchamp.lh"
50	50

src/mame/drivers/gaiden.c

r6740	r6741
129	129	#include "sound/2203intf.h"
130	130	#include "sound/2151intf.h"
131	131	#include "sound/okim6295.h"
132		#include "gaiden.h"
	132	#include "includes/gaiden.h"
133	133
134	134	static WRITE16_HANDLER( gaiden_sound_command_w )
135	135	{

src/mame/drivers/aleck64.c

r6740	r6741
184	184
185	185	static ADDRESS_MAP_START( n64_map, ADDRESS_SPACE_PROGRAM, 32 )
186	186	AM_RANGE(0x00000000, 0x007fffff) AM_RAM   AM_BASE(&rdram)            // RDRAM
187		AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("share1")               // RSP DMEM
188		AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("share2")               // RSP IMEM
	187	AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("dmem")               // RSP DMEM
	188	AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("imem")               // RSP IMEM
189	189	AM_RANGE(0x04040000, 0x040fffff) AM_READWRITE(n64_sp_reg_r, n64_sp_reg_w)   // RSP
190	190	AM_RANGE(0x04100000, 0x041fffff) AM_READWRITE(n64_dp_reg_r, n64_dp_reg_w)   // RDP
191	191	AM_RANGE(0x04300000, 0x043fffff) AM_READWRITE(n64_mi_reg_r, n64_mi_reg_w)   // MIPS Interface
r6740	r6741
204	204	ADDRESS_MAP_END
205	205
206	206	static ADDRESS_MAP_START( rsp_map, ADDRESS_SPACE_PROGRAM, 32 )
207		AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_BASE(&rsp_dmem) AM_SHARE("share1")
208		AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_BASE(&rsp_imem) AM_SHARE("share2")
	207	AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("dmem")
	208	AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("imem")
	209	AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_BASE(&rsp_dmem) AM_SHARE("dmem")
	210	AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_BASE(&rsp_imem) AM_SHARE("imem")
209	211	ADDRESS_MAP_END
210	212
211	213	static INPUT_PORTS_START( aleck64 )

src/mame/drivers/astrof.c

r6740	r6741
58	58
59	59	#include "driver.h"
60	60	#include "cpu/m6502/m6502.h"
61		#include "astrof.h"
	61	#include "includes/astrof.h"
62	62
63	63
64	64	#define MASTER_CLOCK        (XTAL_10_595MHz)

src/mame/drivers/finalizr.c

r6740	r6741
17	17	#include "cpu/mcs48/mcs48.h"
18	18	#include "sound/sn76496.h"
19	19	#include "sound/dac.h"
20		#include "konamipt.h"
21		#include "finalizr.h"
	20	#include "includes/konamipt.h"
	21	#include "includes/finalizr.h"
22	22
23	23
24	24	static INTERRUPT_GEN( finalizr_interrupt )

src/mame/drivers/shuuz.c

r6740	r6741
19	19
20	20	#include "driver.h"
21	21	#include "cpu/m68000/m68000.h"
22		#include "shuuz.h"
	22	#include "includes/shuuz.h"
23	23	#include "sound/okim6295.h"
24	24
25	25
r6740	r6741
63	63	*
64	64	*************************************/
65	65
	66	static MACHINE_START( shuuz )
	67	{
	68	atarigen_init(machine);
	69	}
	70
	71
66	72	static MACHINE_RESET( shuuz )
67	73	{
68	74	shuuz_state *state = (shuuz_state *)machine->driver_data;
r6740	r6741
259	265	MDRV_CPU_ADD("maincpu", M68000, ATARI_CLOCK_14MHz/2)
260	266	MDRV_CPU_PROGRAM_MAP(main_map)
261	267
	268	MDRV_MACHINE_START(shuuz)
262	269	MDRV_MACHINE_RESET(shuuz)
263	270	MDRV_NVRAM_HANDLER(atarigen)
264	271

src/mame/drivers/cowrace.c

r6740	r6741
12	12	#include "sound/2203intf.h"
13	13
14	14	static tilemap *tmap;
	15	static UINT8 *colorram;
	16	static UINT8 *videoram;
15	17
16	18	static WRITE8_HANDLER( cowrace_videoram_w )
17	19	{
18		space->machine->generic.videoram.u8[offset] = data;
	20	videoram[offset] = data;
19	21	tilemap_mark_tile_dirty(tmap, offset);
20	22	}
21	23
22	24	static WRITE8_HANDLER( cowrace_colorram_w )
23	25	{
24		space->machine->generic.colorram.u8[offset] = data;
	26	colorram[offset] = data;
25	27	tilemap_mark_tile_dirty(tmap, offset);
26	28	}
27	29
28	30	static TILE_GET_INFO( get_tile_info )
29	31	{
30		UINT16 code = machine->generic.videoram.u8[ tile_index ] + (machine->generic.colorram.u8[ tile_index ] << 8) ;
31		UINT8 color = 0;//(machine->generic.colorram.u8[ tile_index ] & 0x3e)>>1;
	32	UINT16 code = videoram[ tile_index ] + (colorram[ tile_index ] << 8) ;
	33	UINT8 color = 0;//(colorram[ tile_index ] & 0x3e)>>1;
32	34
33	35	SET_TILE_INFO(1, code & 0x1ff, color, TILE_FLIPYX( 0 ));;
34	36	}
r6740	r6741
90	92
91	93	AM_RANGE(0x0000, 0x2fff) AM_ROM
92	94	AM_RANGE(0x3000, 0x33ff) AM_RAM
93		AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(cowrace_videoram_w) AM_BASE_GENERIC(videoram)
94		AM_RANGE(0x5000, 0x53ff) AM_RAM_WRITE(cowrace_colorram_w) AM_BASE_GENERIC(colorram)
	95	AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(cowrace_videoram_w) AM_BASE(&videoram)
	96	AM_RANGE(0x5000, 0x53ff) AM_RAM_WRITE(cowrace_colorram_w) AM_BASE(&colorram)
95	97	ADDRESS_MAP_END
96	98
97	99	static ADDRESS_MAP_START( io_map_cowrace, ADDRESS_SPACE_IO, 8 )

src/mame/drivers/segaorun.c

r6740	r6741
1	1	/***************************************************************************
2
3	2	Sega Out Run hardware
4
5	3	****************************************************************************
6	4
7	5	Known bugs:
r6740	r6741
11	9	* verify analog input min/max
12	10	* verify protection
13	11
	12	--
	13
	14	Guru's Outrun & Super Hang On Board Notes:
	15
	16	Outrun & Super Hang On
	17	Sega, 1986, 1987
	18
	19	PCB Layouts
	20	-----------
	21
	22	CPU Board: The CPU board used on Outrun and Super Hang On is identical. Only the ROMs are changed,
	23	all other chips including PALs/PLDs and custom chips are the same.
	24	The non-encrypted versions are documented below as they are easy to repair and that version is used to
	25	resurrect dead FD1089/1094 versions :-)
	26
	27	171-5376-01
	28	837-6063-01 SEGA 1986
	29	Sticker: 837-6278-02 (for Super Hang On)
	30	Sticker: 834-6277-02 SUPER HANG ON
	31	Sticker: 834-6065-02 OUT RUN
	32	Sticker: 834-6065-04 OUT RUN (REV B)
	33	|-----------------------------------------------------------------------------------|
	34	|                        IC71   TMM2115                      J     5.5V_0.1F        |
	35	|                               TMM2115       16MHz                                 |
	36	|                        IC70     |--------|          MF6CN-50                    N |
	37	|                                 |315-5218|          MF6CN-50   4066  LM324        |
	38	|                        IC69     |        |                                        |
	39	|                                 |--------|          MP7633JN                    P |
	40	|                        IC68                                                       |
	41	|                                          Z80A              TL084               LED|
	42	|                        IC67              IC88    315-5224           |-----------| |
	43	|                                       TMM2115              YM3012   |SEGA       | |
	44	|                        IC66                      YM2151             |315-5195   | |
	45	| 315-5222 315-5155 315-5155            40MHz      MB3771             |           | |
	46	| IC11          IC47                                                  |           | |
	47	|                                                                     |-----------| |
	48	|                           315-5225 315-5226                                       |
	49	|                           |---------------------|         |---------------------| |
	50	|          315-5223A        |        68000        |         |        68000        | |
	51	|                           |---------------------|         |---------------------| |
	52	|                                                                                   |
	53	|                                                                                   |
	54	|                                                                                   |
	55	|                                                                                   |
	56	|                               IC58        IC76                IC118       IC133   |
	57	|                                                                                   |
	58	|                               IC57        IC75                IC117       IC132   |
	59	|           TMM2115   TMM2115                                                       |
	60	|                               IC56        IC74                IC116       IC131   |
	61	|           TMM2115   TMM2115                                                       |
	62	|                               TMM2063     TMM2063             TMM2063     TMM2063 |
	63	|                                                                                   |
	64	|                               TMM2063     TMM2063             TMM2062     TMM2063 |
	65	|                                                                                   |
	66	|                                                                                   |
	67	|         A                         B                                 C             |
	68	|-----------------------------------------------------------------------------------|
	69	Notes:
	70	68000     - Clock Input 10.000MHz [40/4]
	71	Z80A      - Clock Input 4.000MHz [16/4]
	72	YM2151    - Yamaha YM2151 FM Operator Type M (OPM) Sound Generator IC. Clock Input 4.000MHz [16/4]
	73	YM3012    - Yamaha YM3012 2-Channel Serial Input Floating Point Digital to Analog Convertor (DIP16)
	74	TMM2063   - Toshiba TMM2063 8kx8 SRAM (NDIP28)
	75	TMM2115   - Toshiba TMM2115 2kx8 SRAM (NDIP24)
	76	TL084     - Texas Instruments TL084 Quad JFET-Input General-Purpose Operational Amplifier (DIP14)
	77	LM324     - National Semiconductor LM324 Low Power Quad Operational Amplifier (DIP14)
	78	MP7633JN  - Exar Corporation MP7633JN 15V CMOS 10-Bit Multiplying Digital-to-Analog Converter (DIP16)
	79	Also equivalent to National Semiconductor DAC1022LCN and AD7520JN / AD7530JN
	80	MF6CN-50  - National Semiconductor MF6CN-50 6th Order Switched Capacitor Butterworth Lowpass Filter (DIP14)
	81	5.5V_0.1F - 0.1 Farad Super Cap for Capacitor Backed RAM
	82	4066      - NEC D74HC4066 Quad Bilateral Switch (DIP14)
	83	MB3771    - Fujitsu MB3771 Master Reset IC (DIP8)
	84	J         - 10 Pin Connector for 5V Input and GND
	85	N         - 6 Pin Connector for Unamplified Stereo Sound Output
	86	P         - 4 Pin Connector (not used)
	87	A/B/C     - 50 Pin Connectors (x3) for joining CPU Board to Video Board
	88	315-5155  - Sega custom PAL (Road Bit Extraction) (DIP20)
	89	315-5195  - Sega Memory Mapper IC (in PGA package)
	90	315-5218  - Sega PCM Sound Controller IC (QFP100).
	91	Clock input 16.000MHz on pin 80
	92	Clock outputs: pin 2 - 4.000MHz, pin 80 - 500.000kHz, pin 89 - 62.500KHz
	93	315-5222  - Signetics PLS153N (Road Mixing) (DIP20)
	94	315-5223A - Signetics CK2605 (DIP20)
	95	315-5224  - Signetics CK2605 (DIP20)
	96	315-5225  - MMI PAL16R4 (DIP20)
	97	315-5226  - MMI PAL16R4 (DIP20)
	98
	99	Measurements
	100	------------
	101	OSC1 - 39.99967MHz
	102	OSC2 - 16.00019MHz
	103
	104
	105	ROMs (EPR/MPR)
	106	----
	107	IC88  IC66  IC67  IC68  IC69  IC70  IC71  IC47  IC11  IC58  IC57  IC56  IC76  IC75  IC74  IC118  IC117  IC116  IC133  IC132  IC131
	108	-------------------------------------------------------------------------------------------------------------------------------------------------
	109	Out Run        10187 10193 10192 10191 10190 10189 10188 10186 10185 10329 10330 -     10327 10328 -     10382  10383  -      10380  10381  -
	110	Super Hang On  10649 10643 10644 10645 10646 -     -     10642 -     10790 10791 -     10792 10793 -     10884  10885  -      10886  10887  -
	111	-------------------------------------------------------------------------------------------------------------------------------------------------
	112
	113
	114	Video Board: (Used only on Super Hang On)
	115
	116	171-5480
	117	837-6279 SEGA 1987
	118	Sticker: 837-6279-03
	119	|-----------------------------------------------------------------------------------|
	120	|10675.8 10676.7 10677.6 10678.5 10679.4 10680.3 10681.2 IC1  LED  CN6       CN5    |
	121	|                                                                                   |
	122	|                                                                               DSWB|
	123	|                                                                                   |
	124	|10682.16 10683.15 10684.14 10685.13 10686.12 10687.11 10688.10 IC9                 |
	125	|JP3 JP1                                                                        DSWA|
	126	|JP4 JP2                                                                            |
	127	|                                                                TLP521-4           |
	128	|315-5251           315-5213          TMM2018  TMM2018           TLP521-4           |
	129	|      |-----------|                                             TLP521-4           |
	130	|      | SEGA      |                                             TLP521-4           |
	131	|      | 315-5196  |                                                                |
	132	|      |           |                                                   ULN2003      |
	133	|      |           |                                                     D4051      |
	134	|      |-----------|                                                             CN4|
	135	|                                                                                   |
	136	|                                                                                   |
	137	|                                                                                   |
	138	|                                                                                   |
	139	|                                                                                   |
	140	|  TMM2018  TMM2018  TMM2018  TMM2018                                               |
	141	|JP5                                                                                |
	142	|JP6  10650.56 10651.55 10652.54                                                    |
	143	|                                  D42832   TMM2115                           DAP601|
	144	|                                                                             DAP601|
	145	|25.1748MHz                                                                 ADC0804 |
	146	|      |-----------|                                                                |
	147	|   JP7| SEGA      |               D42832   TMM2115                                 |
	148	|      | 315-5197  |                                                                |
	149	|JP8   |           |                                               |----------|     |
	150	|      |           |                                               | SEGA     |     |
	151	|      |-----------|               TMM2115  TMM2115                | 315-5242 |     |
	152	|                                                                  |----------|     |
	153	|         A                         B                                 C             |
	154	|-----------------------------------------------------------------------------------|
	155	Notes:
	156	D42832   - NEC D42832 32kx8 SRAM (DIP28)
	157	TMM2018  - Toshiba TMM2018 2kx8 SRAM (NDIP24)
	158	TMM2115  - Toshiba TMM2115 2kx8 SRAM (NDIP24)
	159	TLP521-4 - Toshiba TLP521-4 Photocoupler Gallium Arsenide Infrared Diode & Photo???Transistor (DIP16)
	160	ADC0804  - National Semiconductor ADC0804 8-Bit Microprocessor Compatible A/D Converter (DIP20)
	161	ULN2003  - NEC uPA2003 7 High-Voltage, High-Current Darlington Transistor Arrays (DIP16)
	162	D4051    - NEC D4051 Single 8-Channel, Dual 4-Channel, Triple 2-Channel Analog Multiplexer/Demultiplexer with Logic Level Conversion (DIP16)
	163	DAP601   - Diotec Semiconductor DAP601 Small Signal Diode Array IC (SIP7)
	164	CN4      - 50 Pin Connector for Controls/Inputs/Outputs
	165	CN5      - 6 Pin Connector for Video Output (RGB/Sync/GND)
	166	CN6      - 10 Pin Connector for 5V Input and GND
	167	A/B/C    - 50 Pin Connectors (x3) for joining Video Board to CPU Board
	168	315-5196 - Sega Custom Sprite Generator (PGA package)
	169	315-5197 - Sega Custom Tilemap Generator (PGA package)
	170	315-5213 - MMI PAL16R6 (sprite-related) (DIP20)
	171	315-5242 - Sega Custom Color Encoder (wide custom DIP32 ceramic package with surface mount caps/resistors/transistors and a QFP44 IC)
	172	315-5251 - Signetics CK2605 (DIP20)
	173	JPx      - 0-Ohm Resistors for ROM Configuration
	174	JP1: 512 populated
	175	JP2: 1M  populated from lower hole to JP4 upper hole (i.e. diagonally across both JP2 and JP4)
	176	JP3: 1M  not populated
	177	JP4: 512, see JP2
	178	JP5: 256 populated
	179	JP6: 512 not populated
	180	JP7: 512 not populated
	181	JP8: 256 populated
	182	106xx.xx   ROMs, 1065x = 27C256, all other 106xx.xx are 27C512
	183	IC1/9    - DIP28 sockets not populated
	184
	185	Measurements
	186	------------
	187	VSync - 60.0543Hz
	188	HSync - 15.6740kHz
	189	OSC1  - 25.1747MHz
	190
	191
	192	Video Board: (Used only on Out Run)
	193
	194	171-5377-01
	195	837-6064 SEGA 1986
	196	|-----------------------------------------------------------------------------------|
	197	|HM65256 HM65256 HM65256 HM65256                              LED   K         H     |
	198	|                HM65256 HM65256 HM65256 HM65256  TMM2063                           |
	199	|                                                 TMM2063                       DSWB|
	200	|                                                                                   |
	201	|HM65256 HM65256 HM65256 HM65256                                                    |
	202	|                HM65256 HM65256 HM65256 HM65256                                DSWA|
	203	|                                                                                   |
	204	|                                                                                   |
	205	|                   25.1748MHz  TMM2018               TMM2015             2401      |
	206	| |-----------|                 TMM2018               HM65256             2401      |
	207	| | SEGA      |                                       TMM2015             2401      |
	208	| | 315-5211  |                                       HM65256             2401      |
	209	| |           |                                                                     |
	210	| |           |                                                                     |
	211	| |-----------|                                                                    G|
	212	|               315-5227A                                                           |
	213	|   R1    R2     R3                                                                 |
	214	|                                                                                   |
	215	|IC12 IC16 IC20 IC24 IC28 IC32 IC36 IC40 IC44                                       |
	216	|                                                |-----------|       315-5228       |
	217	|                                                | SEGA      |                      |
	218	|                                                | 315-5197  |                      |
	219	|IC11 IC15 IC19 IC23 IC27 IC31 IC35 IC39 IC43    |           |             UPD2003  |
	220	|                                                |           |             UPD2003 F|
	221	|                                                |-----------|             UPD2003  |
	222	|                                                     R11 R12 R13                   |
	223	|IC10 IC14 IC18 IC22 IC26 IC30 IC34 IC38 IC42  IC102 IC103 IC104                    |
	224	|                                                                                   |
	225	|                                                                      8255         |
	226	|                                                                                   |
	227	|IC9  IC13 IC17 IC21 IC25 IC29 IC33 IC37 IC41  IC99  IC100 IC101            DAP601  |
	228	|                                                                           DAP601 D|
	229	|                                                                           ADC0804 |
	230	|         A                         B                                 C     4051    |
	231	|-----------------------------------------------------------------------------------|
	232	Notes:
	233	HM65256  - Hitachi HM65256 or uPD42832 32kx8 SRAM (DIP28)
	234	TMM2063  - Toshiba TMM2063 8kx8 SRAM (NDIP28)
	235	TMM2018  - Toshiba TMM2018 2kx8 SRAM (NDIP24)
	236	TMM2015  - Toshiba TMM2015 2kx8 SRAM (NDIP24)
	237	ADC0804  - National Semiconductor ADC0804 8-Bit Microprocessor Compatible A/D Converter (DIP20)
	238	ULN2003  - NEC uPA2003 7 High-Voltage, High-Current Darlington Transistor Arrays (DIP16)
	239	D4051    - NEC D4051 Single 8-Channel, Dual 4-Channel, Triple 2-Channel Analog Multiplexer/Demultiplexer with Logic Level Conversion (DIP16)
	240	DAP601   - Diotec Semiconductor DAP601 Small Signal Diode Array IC (SIP7)
	241	8255     - NEC D8255AC-2 Programmable Peripheral Interface Adapter (DIP40)
	242	2401     - NEC 2401 (or Sharp PC817) 4-Channel Type Photocoupler (DIP16)
	243	G        - 50 Pin Connector for Controls/Inputs/Outputs
	244	H        - 6 Pin Connector for Video Output (RGB/Sync/GND)
	245	K        - 10 Pin Connector for 5V Input and GND
	246	A/B/C    - 50 Pin Connectors (x3) for joining Video Board to CPU Board
	247	F        - 26 Pin Connector
	248	D        - 20 Pin Connector
	249	315-5197 - Sega Custom Tilemap Generator (PGA package)
	250	315-5211 - Sega Custom Sprite Generator (PGA package)
	251	315-5227A- Signetics CK2678 (DIP20)
	252	315-5228 - Signetics CK2605 (DIP20)
	253	R1/2/3   - 0-Ohm Resistors for ROM Configuration (for IC9 - IC44)
	254	For 831000 mask ROMs: R1 populated, R2 & R3 not populated
	255	For 27C256 EPROMs: R1 not populated, R2 & R3 populated
	256	Other possible configurations unknown
	257	R11/12/13- 0-Ohm Resistors for ROM Configuration (for IC99 - IC104)
	258	For 27C256 EPROMs: R11 & R13 populated, R12 not populated
	259	Other possible configurations unknown
	260	ICxx     - DIP28 sockets
	261
	262	Measurements
	263	------------
	264	VSync - 60.0543Hz
	265	HSync - 15.6740kHz
	266	OSC1  - 25.1747MHz
	267
14	268	***************************************************************************/
15	269
	270
16	271	#include "driver.h"
17	272	#include "cpu/z80/z80.h"
18		#include "system16.h"
	273	#include "includes/system16.h"
19	274	#include "machine/fd1089.h"
20	275	#include "machine/segaic16.h"
21	276	#include "machine/8255ppi.h"
r6740	r6741
26	281	#include "outrun.lh"
27	282
28	283
29		#define MASTER_CLOCK         (50000000)
30		#define SOUND_CLOCK          (16000000)
31		#define MASTER_CLOCK_25MHz   (25174800)   /* super hang-on only */
	284	#define MASTER_CLOCK         (XTAL_40MHz)
	285	#define SOUND_CLOCK          (XTAL_16MHz)
	286	#define MASTER_CLOCK_25MHz   (XTAL_25_1748MHz)   /* super hang-on only */
32	287
33	288
34	289

src/mame/drivers/videopkr.c

r6740	r6741
276	276	static UINT16 p1, p2;
277	277	static UINT8 t0_latch;
278	278	static UINT16 n_offs;
279		static emu_timer *t1_timer;
280	279
281	280	static UINT8 vp_sound_p2;
282	281	static UINT8 p24_data;
r6740	r6741
856	855	}
857	856
858	857
859		static TIMER_CALLBACK(sound_t1_callback)
	858	static TIMER_DEVICE_CALLBACK(sound_t1_callback)
860	859	{
861	860	if (te_40103 == 1)
862	861	{
r6740	r6741
864	863
865	864	if (dc_40103 == 0)
866	865	{
867		cputag_set_input_line(machine, "soundcpu", 0, ASSERT_LINE);
	866	cputag_set_input_line(timer->machine, "soundcpu", 0, ASSERT_LINE);
868	867	}
869	868	}
870	869	}
r6740	r6741
1136	1135	p1 = 0xff;
1137	1136	ant_cio = 0;
1138	1137	count0 = 0;
1139		t1_timer = timer_alloc(machine, sound_t1_callback, NULL);
1140		timer_adjust_periodic(t1_timer, attotime_zero, 0, ATTOTIME_IN_HZ(50));   /* 50Hz. */
1141	1138	}
1142	1139
1143	1140	static const ay8910_interface ay8910_config =
r6740	r6741
1170	1167	MDRV_MACHINE_START(videopkr)
1171	1168	MDRV_NVRAM_HANDLER(videopkr)
1172	1169
	1170	MDRV_TIMER_ADD_PERIODIC("t1_timer", sound_t1_callback, HZ(50))
	1171
1173	1172	/* video hardware */
1174	1173	MDRV_SCREEN_ADD("screen", RASTER)
1175	1174	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)

src/mame/drivers/koikoi.c

r6740	r6741
8	8
9	9	TODO:
10	10	- map missing inputs (temp mapped to z-x-left shift)
11		- is there (still..) some kind of protection ? timers looks weird (2nd player timer is frozen)
12		- colors (afaik color(?) prom outputs are connected to one of pals), might help to have a screenshot of the original thing.
	11	- is there (still..) some kind of protection ? timers looks weird (2nd player timer is frozen) (this seems fixed now -AS)
	12	- colors (afaik color(?) prom outputs are connected to one of pals), Missing color prom apparently.
13	13
14	14
15	15	Basic hw is...
r6740	r6741
78	78	SET_TILE_INFO( 0, code, color, flip);
79	79	}
80	80
81		static PALETTE_INIT( koikoi ) //wrong
	81	static PALETTE_INIT( koikoi )
82	82	{
83	83	int i;
84	84
85		for (i = 0; i < 0x100; i++)
	85	/* allocate the colortable */
	86	machine->colortable = colortable_alloc(machine, 0x10);
	87
	88	/* create a lookup table for the palette */
	89	for (i = 0; i < 0x10; i++)
86	90	{
87		int bit0, bit1, bit2, bit3, r, g, b;
	91	int bit0, bit1, bit2;
	92	int r, g, b;
88	93
	94	/* red component */
	95	bit0 = (color_prom[i] >> 0) & 0x01;
	96	bit1 = (color_prom[i] >> 1) & 0x01;
	97	bit2 = (color_prom[i] >> 2) & 0x01;
	98	r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
	99
	100	/* green component */
89	101	bit0 = (color_prom[i] >> 3) & 0x01;
90		bit1 = (color_prom[i] >> 2) & 0x01;
91		bit2 = (color_prom[i] >> 1) & 0x01;
92		bit3 = (color_prom[i] >> 0) & 0x01;
	102	bit1 = (color_prom[i] >> 4) & 0x01;
	103	bit2 = (color_prom[i] >> 5) & 0x01;
	104	g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
93	105
94		r = bit0 * 0xaa + bit3 * 0x55;
95		g = bit1 * 0xaa + bit3 * 0x55;
96		b = bit2 * 0xaa + bit3 * 0x55;
	106	/* blue component */
	107	bit0 = 0;
	108	bit1 = (color_prom[i] >> 6) & 0x01;
	109	bit2 = (color_prom[i] >> 7) & 0x01;
	110	b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
97	111
98		palette_set_color(machine, i, MAKE_RGB(r, g, b));
	112	colortable_palette_set_color(machine->colortable, i, MAKE_RGB(r, g, b));
99	113	}
	114
	115	/* color_prom now points to the beginning of the lookup table */
	116	color_prom += 0x20;
	117
	118	/* characters/sprites */
	119	for (i = 0; i < 0x100; i++)
	120	{
	121	UINT8 ctabentry = color_prom[i] & 0x0f;
	122	colortable_entry_set_value(machine->colortable, i, ctabentry);
	123	}
100	124	}
101	125
102	126	static VIDEO_START(koikoi)
r6740	r6741
165	189
166	190	static WRITE8_DEVICE_HANDLER( unknown_w )
167	191	{
168		//unknown... could be input select (player 1 or 2 = fd/fe or ef/df(??) )
	192	//xor'ed mux select, player 1 = 1,2,4,8, player 2 = 0x10, 0x20, 0x40, 0x80
169	193	}
170	194
171	195	static READ8_HANDLER( io_r )
r6740	r6741
202	226
203	227	static ADDRESS_MAP_START( koikoi_io_map, ADDRESS_SPACE_IO, 8 )
204	228	ADDRESS_MAP_GLOBAL_MASK(0xff)
205		AM_RANGE(0x02, 0x02) AM_WRITENOP //unknown , many writes
	229	AM_RANGE(0x02, 0x02) AM_WRITENOP //watchdog
206	230	AM_RANGE(0x03, 0x03) AM_DEVREAD("aysnd", ay8910_r)
207	231	AM_RANGE(0x06, 0x07) AM_DEVWRITE("aysnd", ay8910_data_address_w)
208	232	ADDRESS_MAP_END
r6740	r6741
263	287
264	288	/*************************************
265	289	*
266		*  Graphics definitions
	290	*  Graphic definitions
267	291	*
268	292	*************************************/
269	293
r6740	r6741
272	296	8, 8,
273	297	RGN_FRAC(1,3),
274	298	3,
275		{ RGN_FRAC(0,3), RGN_FRAC(2,3), RGN_FRAC(1,3) },
276		//{ RGN_FRAC(2,3), RGN_FRAC(0,3), RGN_FRAC(1,3) },
	299	{ RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) },
277	300	{ 0, 1, 2, 3, 4, 5, 6, 7 },
278	301	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
279	302	8*8
r6740	r6741
384	407	ROM_LOAD( "ic26", 0x1000, 0x1000, CRC(79cb1e93) SHA1(4d08b3d88727b437673f7a51d47396f19bbc3caa) )
385	408	ROM_LOAD( "ic18", 0x2000, 0x1000, CRC(c209362d) SHA1(0620c19fe72e8407db0f487b6413c5d45ac8046c) )
386	409
387		ROM_REGION( 0x0100, "proms", 0 )
388		ROM_LOAD( "prom.ic23", 0x000, 0x100,  CRC(f1d169a6) SHA1(5ee4b1dfe61e8b97a90cc113ba234298189f1a73) )
	410	ROM_REGION( 0x0120, "proms", 0 )
	411	ROM_LOAD( "prom.x",    0x000, 0x020,  NO_DUMP )
	412	ROM_LOAD( "prom.ic23", 0x020, 0x100,  CRC(f1d169a6) SHA1(5ee4b1dfe61e8b97a90cc113ba234298189f1a73) )
389	413
390	414	ROM_REGION( 0x0a00, "plds", 0 )
391	415	ROM_LOAD( "pal16r8-10_pink.ic9",   0x0000, 0x0104, CRC(9f8fdb95) SHA1(cdcdb1a6baef18961cf6c75fba0c3aba47f3edbb) )

src/mame/drivers/hexa.c

r6740	r6741
49	49	#include "driver.h"
50	50	#include "cpu/z80/z80.h"
51	51	#include "sound/ay8910.h"
52		#include "hexa.h"
	52	#include "includes/hexa.h"
53	53
54	54
55	55	static ADDRESS_MAP_START( hexa_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
77	77	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 )
78	78
79	79	PORT_START("DSW")
80		PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )
	80	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )  PORT_DIPLOCATION("SW1:1,2")
81	81	PORT_DIPSETTING(    0x00, DEF_STR( 3C_1C ) )
82	82	PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
83	83	PORT_DIPSETTING(    0x03, DEF_STR( 1C_1C ) )
84	84	PORT_DIPSETTING(    0x02, DEF_STR( 1C_2C ) )
85		PORT_DIPNAME( 0x04, 0x00, "Naughty Pics" )
	85	PORT_DIPNAME( 0x04, 0x00, "Naughty Pics" )  PORT_DIPLOCATION("SW1:3")
86	86	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
87	87	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
88		PORT_DIPNAME( 0x08, 0x08, DEF_STR( Flip_Screen ) )
	88	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Flip_Screen ) )  PORT_DIPLOCATION("SW1:4")
89	89	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
90	90	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
91		PORT_DIPNAME( 0x30, 0x30, "Difficulty?" )
	91	PORT_DIPNAME( 0x30, 0x30, "Difficulty?" )  PORT_DIPLOCATION("SW1:5,6")
92	92	PORT_DIPSETTING(    0x30, "Easy?" )
93	93	PORT_DIPSETTING(    0x20, "Medium?" )
94	94	PORT_DIPSETTING(    0x10, "Hard?" )
95	95	PORT_DIPSETTING(    0x00, "Hardest?" )
96		PORT_DIPNAME( 0x40, 0x40, "Pobys" )
	96	PORT_DIPNAME( 0x40, 0x40, "Pobys" )  PORT_DIPLOCATION("SW1:7")
97	97	PORT_DIPSETTING(    0x40, "2" )
98	98	PORT_DIPSETTING(    0x00, "4" )
99		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) )
	99	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) )  PORT_DIPLOCATION("SW1:8")
100	100	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
101	101	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
102	102	INPUT_PORTS_END
r6740	r6741
154	154	MDRV_DRIVER_DATA(hexa_state)
155	155
156	156	/* basic machine hardware */
157		MDRV_CPU_ADD("maincpu", Z80, 4000000)      /* 4 MHz ??????? */
	157	MDRV_CPU_ADD("maincpu", Z80, XTAL_12MHz/2)   /* Imported from arkanoid - correct? */
158	158	MDRV_CPU_PROGRAM_MAP(hexa_map)
159	159	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
160	160
r6740	r6741
178	178
179	179	/* sound hardware */
180	180	MDRV_SPEAKER_STANDARD_MONO("mono")
181		MDRV_SOUND_ADD("aysnd", AY8910, 1500000)
	181	MDRV_SOUND_ADD("aysnd", AY8910, XTAL_12MHz/4/2)   /* Imported from arkanoid - correct? */
182	182	MDRV_SOUND_CONFIG(ay8910_config)
183	183	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
184	184	MACHINE_DRIVER_END

src/mame/drivers/gticlub.c

r6740	r6741
224	224	#include "cpu/powerpc/ppc.h"
225	225	#include "cpu/sharc/sharc.h"
226	226	#include "machine/konppc.h"
227		#include "machine/konamiic.h"
228	227	#include "sound/rf5c400.h"
229	228	#include "video/voodoo.h"
230	229	#include "video/gticlub.h"
231	230	#include "rendlay.h"
	231	#include "sound/k056800.h"
232	232
233	233	static UINT32 *work_ram;
234	234
r6740	r6741
614	614	AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
615	615	AM_RANGE(0x7e008000, 0x7e009fff) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff)
616	616	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_READWRITE(lanc_ram_r, lanc_ram_w) AM_BASE(&lanc_ram)
617		AM_RANGE(0x7e00c000, 0x7e00c007) AM_WRITE(K056800_host_w)
618		AM_RANGE(0x7e00c000, 0x7e00c007) AM_READ(K056800_host_r)      // Hang Pilot
619		AM_RANGE(0x7e00c008, 0x7e00c00f) AM_READ(K056800_host_r)
	617	AM_RANGE(0x7e00c000, 0x7e00c007) AM_DEVWRITE("k056800", k056800_host_w)
	618	AM_RANGE(0x7e00c000, 0x7e00c007) AM_DEVREAD("k056800", k056800_host_r)      // Hang Pilot
	619	AM_RANGE(0x7e00c008, 0x7e00c00f) AM_DEVREAD("k056800", k056800_host_r)
620	620	AM_RANGE(0x7f000000, 0x7f3fffff) AM_ROM AM_REGION("user2", 0)   /* Data ROM */
621	621	AM_RANGE(0x7f800000, 0x7f9fffff) AM_ROM AM_SHARE("share2")
622	622	AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION("user1", 0) AM_SHARE("share2")   /* Program ROM */
r6740	r6741
627	627	static ADDRESS_MAP_START( sound_memmap, ADDRESS_SPACE_PROGRAM, 16 )
628	628	AM_RANGE(0x000000, 0x07ffff) AM_ROM
629	629	AM_RANGE(0x200000, 0x20ffff) AM_RAM
630		AM_RANGE(0x300000, 0x30000f) AM_READWRITE(K056800_sound_r, K056800_sound_w)
	630	AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("k056800", k056800_sound_r, k056800_sound_w)
631	631	AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rfsnd", rf5c400_r, rf5c400_w)      /* Ricoh RF5C400 */
632	632	AM_RANGE(0x580000, 0x580001) AM_WRITENOP
633	633	AM_RANGE(0x600000, 0x600001) AM_WRITENOP
r6740	r6741
694	694	eeprom_handler(machine, file, read_or_write);
695	695	}
696	696
697
698	697	static INPUT_PORTS_START( gticlub )
699	698	PORT_START("IN0")
700	699	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )      // View switch
r6740	r6741
898	897	BOOT_MODE_EPROM
899	898	};
900	899
	900
	901	static TIMER_CALLBACK( irq_off )
	902	{
	903	cputag_set_input_line(machine, "audiocpu", param, CLEAR_LINE);
	904	}
	905
	906	static void sound_irq_callback( running_machine *machine, int irq )
	907	{
	908	int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
	909
	910	cputag_set_input_line(machine, "audiocpu", line, ASSERT_LINE);
	911	timer_set(machine, ATTOTIME_IN_USEC(1), NULL, line, irq_off);
	912	}
	913
	914	static const k056800_interface gticlub_k056800_interface =
	915	{
	916	sound_irq_callback
	917	};
	918
901	919	static MACHINE_RESET( gticlub )
902	920	{
903	921	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
r6740	r6741
935	953	MDRV_VIDEO_START(gticlub)
936	954	MDRV_VIDEO_UPDATE(gticlub)
937	955
	956	MDRV_K056800_ADD("k056800", gticlub_k056800_interface)
	957
938	958	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
939	959
940	960	MDRV_SOUND_ADD("rfsnd", RF5C400, 64000000/4)
r6740	r6741
1001	1021	MDRV_VIDEO_START(hangplt)
1002	1022	MDRV_VIDEO_UPDATE(hangplt)
1003	1023
	1024	MDRV_K056800_ADD("k056800", gticlub_k056800_interface)
	1025
1004	1026	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1005	1027
1006	1028	MDRV_SOUND_ADD("rfsnd", RF5C400, 64000000/4)
r6740	r6741
1201	1223	ROM_LOAD32_WORD( "685a14.12w", 0x000000, 0x400000, CRC(87437739) SHA1(0d45637af40938a54d5efd29c125b0fafd55f9a4) )
1202	1224	ROM_END
1203	1225
1204		static TIMER_CALLBACK( irq_off )
1205		{
1206		cputag_set_input_line(machine, "audiocpu", param, CLEAR_LINE);
1207		}
1208
1209		static void sound_irq_callback(running_machine *machine, int irq)
1210		{
1211		int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
1212		cputag_set_input_line(machine, "audiocpu", line, ASSERT_LINE);
1213		timer_set(machine, ATTOTIME_IN_USEC(1), NULL, line, irq_off);
1214		}
1215
1216	1226	static DRIVER_INIT(gticlub)
1217	1227	{
1218	1228	init_konami_cgboard(machine, 1, CGBOARD_TYPE_GTICLUB);
r6740	r6741
1222	1232
1223	1233	K001005_preprocess_texture_data(memory_region(machine, "gfx1"), memory_region_length(machine, "gfx1"), 1);
1224	1234
1225		K056800_init(machine, sound_irq_callback);
1226
1227	1235	adc1038_init(machine);
1228	1236	}
1229	1237
r6740	r6741
1237	1245	sharc_dataram_1 = auto_alloc_array(machine, UINT32, 0x100000/4);
1238	1246	gticlub_led_reg0 = gticlub_led_reg1 = 0x7f;
1239	1247
1240		K056800_init(machine, sound_irq_callback);
1241	1248	K033906_init(machine);
1242	1249
1243	1250	adc1038_init(machine);

src/mame/drivers/namcona1.c

r6740	r6741
161	161	#include "driver.h"
162	162	#include "cpu/m68000/m68000.h"
163	163	#include "deprecat.h"
164		#include "namcona1.h"
	164	#include "includes/namcona1.h"
165	165	#include "sound/c140.h"
166	166	#include "cpu/m37710/m37710.h"
167	167

src/mame/drivers/bsktball.c

r6740	r6741
26	26	#include "driver.h"
27	27	#include "cpu/m6502/m6502.h"
28	28	#include "deprecat.h"
29		#include "bsktball.h"
	29	#include "includes/bsktball.h"
30	30	#include "sound/discrete.h"
31	31
32	32

src/mame/drivers/acefruit.c

r6740	r6741
13	13
14	14	#include "sidewndr.lh"
15	15
	16	static UINT8 *colorram;
	17	static UINT8 *videoram;
	18
16	19	static void acefruit_update_irq(running_machine *machine, int vpos )
17	20	{
18	21	int col;
r6740	r6741
21	24	for( col = 0; col < 32; col++ )
22	25	{
23	26	int tile_index = ( col * 32 ) + row;
24		int color = machine->generic.colorram.u8[ tile_index ];
	27	int color = colorram[ tile_index ];
25	28
26	29	switch( color )
27	30	{
r6740	r6741
73	76	for( col = 0; col < 32; col++ )
74	77	{
75	78	int tile_index = ( col * 32 ) + row;
76		int code = screen->machine->generic.videoram.u8[ tile_index ];
77		int color = screen->machine->generic.colorram.u8[ tile_index ];
	79	int code = videoram[ tile_index ];
	80	int color = colorram[ tile_index ];
78	81
79	82	if( color < 0x4 )
80	83	{
r6740	r6741
197	200
198	201	static WRITE8_HANDLER( acefruit_colorram_w )
199	202	{
200		space->machine->generic.colorram.u8[ offset ] = data & 0xf;
	203	colorram[ offset ] = data & 0xf;
201	204	}
202	205
203	206	static WRITE8_HANDLER( acefruit_coin_w )
r6740	r6741
256	259	static ADDRESS_MAP_START( acefruit_map, ADDRESS_SPACE_PROGRAM, 8 )
257	260	AM_RANGE(0x0000, 0x1fff) AM_ROM
258	261	AM_RANGE(0x2000, 0x20ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
259		AM_RANGE(0x4000, 0x43ff) AM_RAM AM_BASE_GENERIC(videoram)
260		AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(acefruit_colorram_w) AM_BASE_GENERIC(colorram)
	262	AM_RANGE(0x4000, 0x43ff) AM_RAM AM_BASE(&videoram)
	263	AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(acefruit_colorram_w) AM_BASE(&colorram)
261	264	AM_RANGE(0x8000, 0x8000) AM_READ_PORT("IN0")
262	265	AM_RANGE(0x8001, 0x8001) AM_READ_PORT("IN1")
263	266	AM_RANGE(0x8002, 0x8002) AM_READ_PORT("IN2")

src/mame/drivers/appoooh.c

r6740	r6741
163	163
164	164	#include "driver.h"
165	165	#include "cpu/z80/z80.h"
166		#include "appoooh.h"
	166	#include "includes/appoooh.h"
167	167	#include "machine/segacrpt.h"      // needed for robowres_decode
168	168	#include "sound/msm5205.h"
169	169	#include "sound/sn76496.h"

src/mame/drivers/goldstar.c

r6740	r6741
110	110
111	111	static int dataoffset=0;
112	112
	113	extern UINT8 *goldstar_fg_atrram;
	114	extern UINT8 *goldstar_fg_vidram;
113	115	extern UINT8 *goldstar_reel1_scroll, *goldstar_reel2_scroll, *goldstar_reel3_scroll;
114	116
115	117
r6740	r6741
168	170	AM_RANGE(0x0000, 0xb7ff) AM_ROM
169	171	AM_RANGE(0xb800, 0xbfff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
170	172	AM_RANGE(0xc000, 0xc7ff) AM_ROM
171		AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
172		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	173	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	174	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
173	175	AM_RANGE(0xd800, 0xd9ff) AM_RAM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
174	176	AM_RANGE(0xe000, 0xe1ff) AM_RAM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
175	177	AM_RANGE(0xe800, 0xe9ff) AM_RAM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
r6740	r6741
211	213	AM_RANGE(0x0000, 0xb7ff) AM_ROM
212	214	AM_RANGE(0xb800, 0xbfff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
213	215	AM_RANGE(0xc000, 0xc7ff) AM_ROM
214		AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
215		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	216	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	217	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
216	218	AM_RANGE(0xd800, 0xd9ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
217	219	AM_RANGE(0xe000, 0xe1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
218	220	AM_RANGE(0xe800, 0xe9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
r6740	r6741
285	287	AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
286	288
287	289
288		AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
289		AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	290	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	291	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
290	292
291	293	AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
292	294	AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
r6740	r6741
307	309	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
308	310
309	311
310		AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
311		AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	312	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	313	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
312	314
313	315	AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
314	316	AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
r6740	r6741
381	383	static ADDRESS_MAP_START( lucky8_map, ADDRESS_SPACE_PROGRAM, 8 )
382	384	AM_RANGE(0x0000, 0x7fff) AM_ROM
383	385	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
384		AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
385		AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	386	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	387	AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
386	388	AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
387	389	AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
388	390	AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
r6740	r6741
403	405	static ADDRESS_MAP_START( kkojnoli_map, ADDRESS_SPACE_PROGRAM, 8 )
404	406	AM_RANGE(0x0000, 0x7fff) AM_ROM
405	407	AM_RANGE(0x8000, 0x87ff) AM_RAM   /* definitelly no NVRAM */
406		AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
407		AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	408	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	409	AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
408	410	AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
409	411	AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
410	412	AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
r6740	r6741
442	444	static ADDRESS_MAP_START( ladylinr_map, ADDRESS_SPACE_PROGRAM, 8 )
443	445	AM_RANGE(0x0000, 0x7fff) AM_ROM
444	446	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
445		AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
446		AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	447	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	448	AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
447	449	AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
448	450	AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
449	451	AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
r6740	r6741
463	465	static ADDRESS_MAP_START( wcat3_map, ADDRESS_SPACE_PROGRAM, 8 )
464	466	AM_RANGE(0x0000, 0x7fff) AM_ROM
465	467	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
466		AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
467		AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	468	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	469	AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
468	470	AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
469	471	AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
470	472	AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
r6740	r6741
500	502	AM_RANGE(0xd800, 0xdfff) AM_RAM
501	503
502	504
503		AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
504		AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
	505	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE(&goldstar_fg_vidram)
	506	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE(&goldstar_fg_atrram)
505	507
506	508	AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
507	509	AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)

src/mame/drivers/dbz.c

r6740	r6741
53	53	#include "driver.h"
54	54	#include "deprecat.h"
55	55
56		#include "video/konamiic.h"
	56	#include "video/konicdev.h"
57	57	#include "cpu/m68000/m68000.h"
58	58	#include "cpu/z80/z80.h"
59	59	#include "sound/2151intf.h"
r6740	r6741
72	72	VIDEO_START(dbz);
73	73	VIDEO_UPDATE(dbz);
74	74
	75	extern void dbz_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask);
	76	extern void dbz_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags);
	77
	78
75	79	static INTERRUPT_GEN( dbz_interrupt )
76	80	{
	81	const device_config *k053246 = devtag_get_device(device->machine, "k053246");
	82
77	83	switch (cpu_getiloops(device))
78	84	{
79	85	case 0:
r6740	r6741
81	87	break;
82	88
83	89	case 1:
84		if (K053246_is_IRQ_enabled())
	90	if (k053246_is_irq_enabled(k053246))
85	91	cpu_set_input_line(device, M68K_IRQ_4, HOLD_LINE);
86	92	break;
87	93	}
r6740	r6741
96	102
97	103	static WRITE16_HANDLER( dbzcontrol_w )
98	104	{
	105	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
99	106	/* bit 10 = enable '246 readback */
100	107
101	108	COMBINE_DATA(&dbz_control);
102	109
103	110	if (data & 0x400)
104	111	{
105		K053246_set_OBJCHA_line(ASSERT_LINE);
	112	k053246_set_objcha_line(k053246, ASSERT_LINE);
106	113	}
107	114	else
108	115	{
109		K053246_set_OBJCHA_line(CLEAR_LINE);
	116	k053246_set_objcha_line(k053246, CLEAR_LINE);
110	117	}
111	118
112	119	coin_counter_w(space->machine, 0, data & 1);
r6740	r6741
134	141	static ADDRESS_MAP_START( dbz_map, ADDRESS_SPACE_PROGRAM, 16 )
135	142	AM_RANGE(0x000000, 0x0fffff) AM_ROM
136	143	AM_RANGE(0x480000, 0x48ffff) AM_RAM
137		AM_RANGE(0x490000, 0x491fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)   // '157 RAM is mirrored twice
138		AM_RANGE(0x492000, 0x493fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)
139		AM_RANGE(0x498000, 0x49ffff) AM_READ(K056832_rom_word_8000_r)   // code near a60 in dbz2, subroutine at 730 in dbz
140		AM_RANGE(0x4a0000, 0x4a0fff) AM_READWRITE(K053247_word_r, K053247_word_w)
	144	AM_RANGE(0x490000, 0x491fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)   // '157 RAM is mirrored twice
	145	AM_RANGE(0x492000, 0x493fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)
	146	AM_RANGE(0x498000, 0x49ffff) AM_DEVREAD("k056832", k056832_rom_word_8000_r)   // code near a60 in dbz2, subroutine at 730 in dbz
	147	AM_RANGE(0x4a0000, 0x4a0fff) AM_DEVREADWRITE("k053246", k053247_word_r, k053247_word_w)
141	148	AM_RANGE(0x4a1000, 0x4a3fff) AM_RAM
142	149	AM_RANGE(0x4a8000, 0x4abfff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram) // palette
143		AM_RANGE(0x4c0000, 0x4c0001) AM_READ(K053246_word_r)
144		AM_RANGE(0x4c0000, 0x4c0007) AM_WRITE(K053246_word_w)
145		AM_RANGE(0x4c4000, 0x4c4007) AM_WRITE(K053246_word_w)
146		AM_RANGE(0x4c8000, 0x4c8007) AM_WRITE(K056832_b_word_w)
147		AM_RANGE(0x4cc000, 0x4cc03f) AM_WRITE(K056832_word_w)
148		AM_RANGE(0x4d0000, 0x4d001f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
149		AM_RANGE(0x4d4000, 0x4d401f) AM_WRITEONLY AM_BASE(&K053936_1_ctrl)
	150	AM_RANGE(0x4c0000, 0x4c0001) AM_DEVREAD("k053246", k053246_word_r)
	151	AM_RANGE(0x4c0000, 0x4c0007) AM_DEVWRITE("k053246", k053246_word_w)
	152	AM_RANGE(0x4c4000, 0x4c4007) AM_DEVWRITE("k053246", k053246_word_w)
	153	AM_RANGE(0x4c8000, 0x4c8007) AM_DEVWRITE("k056832", k056832_b_word_w)
	154	AM_RANGE(0x4cc000, 0x4cc03f) AM_DEVWRITE("k056832", k056832_word_w)
	155	AM_RANGE(0x4d0000, 0x4d001f) AM_DEVWRITE("k053936_1", k053936_ctrl_w)
	156	AM_RANGE(0x4d4000, 0x4d401f) AM_DEVWRITE("k053936_2", k053936_ctrl_w)
150	157	AM_RANGE(0x4e0000, 0x4e0001) AM_READ_PORT("P1_P2")
151	158	AM_RANGE(0x4e0002, 0x4e0003) AM_READ_PORT("SYSTEM_DSW1")
152	159	AM_RANGE(0x4e4000, 0x4e4001) AM_READ_PORT("DSW2")
r6740	r6741
155	162	AM_RANGE(0x4f0000, 0x4f0001) AM_WRITE(dbz_sound_command_w)
156	163	AM_RANGE(0x4f4000, 0x4f4001) AM_WRITE(dbz_sound_cause_nmi)
157	164	AM_RANGE(0x4f8000, 0x4f801f) AM_WRITENOP      // 251 #1
158		AM_RANGE(0x4fc000, 0x4fc01f) AM_WRITE(K053251_lsb_w)   // 251 #2
	165	AM_RANGE(0x4fc000, 0x4fc01f) AM_DEVWRITE("k053251", k053251_lsb_w)   // 251 #2
159	166
160	167	AM_RANGE(0x500000, 0x501fff) AM_RAM_WRITE(dbz_bg2_videoram_w) AM_BASE(&dbz_bg2_videoram)
161	168	AM_RANGE(0x508000, 0x509fff) AM_RAM_WRITE(dbz_bg1_videoram_w) AM_BASE(&dbz_bg1_videoram)
162		AM_RANGE(0x510000, 0x513fff) AM_RAM AM_BASE(&K053936_0_linectrl) // ?? guess, it might not be
163		AM_RANGE(0x518000, 0x51bfff) AM_RAM AM_BASE(&K053936_1_linectrl) // ?? guess, it might not be
	169	AM_RANGE(0x510000, 0x513fff) AM_DEVREADWRITE("k053936_1", k053936_linectrl_r, k053936_linectrl_w) // ?? guess, it might not be
	170	AM_RANGE(0x518000, 0x51bfff) AM_DEVREADWRITE("k053936_2", k053936_linectrl_r, k053936_linectrl_w) // ?? guess, it might not be
164	171	AM_RANGE(0x600000, 0x6fffff) AM_READNOP          // PSAC 1 ROM readback window
165	172	AM_RANGE(0x700000, 0x7fffff) AM_READNOP          // PSAC 2 ROM readback window
166	173	ADDRESS_MAP_END
r6740	r6741
318	325
319	326	/**********************************************************************************/
320	327
	328	static const k056832_interface dbz_k056832_intf =
	329	{
	330	"gfx1", 2,
	331	K056832_BPP_4,
	332	1, 1,
	333	KONAMI_ROM_DEINTERLEAVE_2,
	334	dbz_tile_callback, "none"
	335	};
	336
	337	static const k053247_interface dbz_k053246_intf =
	338	{
	339	"screen",
	340	"gfx2", 3,
	341	NORMAL_PLANE_ORDER,
	342	-52, 16,
	343	KONAMI_ROM_DEINTERLEAVE_NONE,
	344	dbz_sprite_callback
	345	};
	346
	347	/* both k053936 use the same wrap/offs */
	348	static const k053936_interface dbz_k053936_intf =
	349	{
	350	1, -46, -16
	351	};
	352
	353
321	354	static MACHINE_DRIVER_START( dbz )
322	355
323	356	/* basic machine hardware */
r6740	r6741
345	378	MDRV_VIDEO_UPDATE(dbz)
346	379	MDRV_PALETTE_LENGTH(0x4000/2)
347	380
	381	MDRV_K056832_ADD("k056832", dbz_k056832_intf)
	382	MDRV_K053246_ADD("k053246", dbz_k053246_intf)
	383	MDRV_K053251_ADD("k053251")
	384	MDRV_K053936_ADD("k053936_1", dbz_k053936_intf)
	385	MDRV_K053936_ADD("k053936_2", dbz_k053936_intf)
	386
348	387	/* sound hardware */
349	388	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
350	389
r6740	r6741
441	480	{
442	481	UINT16 *ROM;
443	482
444		konami_rom_deinterleave_2(machine, "gfx1");
445
446	483	ROM = (UINT16 *)memory_region(machine, "maincpu");
447	484
448	485	// nop out dbz1's mask rom test
r6740	r6741
460	497	ROM[0x990/2] = 0x4e71;
461	498	}
462	499
463		static DRIVER_INIT( dbz2 )
464		{
465		konami_rom_deinterleave_2(machine, "gfx1");
466		}
467
468	500	GAME( 1993, dbz,  0, dbz, dbz,  dbz,  ROT0, "Banpresto", "Dragonball Z", GAME_IMPERFECT_GRAPHICS )
469		GAME( 1994, dbz2, 0, dbz, dbz2, dbz2, ROT0, "Banpresto", "Dragonball Z 2 - Super Battle", GAME_IMPERFECT_GRAPHICS )
	501	GAME( 1994, dbz2, 0, dbz, dbz2, 0,    ROT0, "Banpresto", "Dragonball Z 2 - Super Battle", GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/20pacgal.c

r6740	r6741
40	40	#include "machine/eepromdev.h"
41	41	#include "sound/namco.h"
42	42	#include "sound/dac.h"
43		#include "20pacgal.h"
	43	#include "includes/20pacgal.h"
44	44
45	45
46	46	/*************************************

src/mame/drivers/seicross.c

r6740	r6741
48	48	#include "sound/ay8910.h"
49	49	#include "sound/dac.h"
50	50
	51	extern UINT8 *seicross_videoram;
	52	extern UINT8 *seicross_colorram;
51	53	extern UINT8 *seicross_row_scroll;
52	54
53	55	extern WRITE8_HANDLER( seicross_videoram_w );
r6740	r6741
121	123	AM_RANGE(0x0000, 0x77ff) AM_ROM
122	124	AM_RANGE(0x7800, 0x7fff) AM_RAM AM_SHARE("share1")
123	125	AM_RANGE(0x8820, 0x887f) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
124		AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(seicross_videoram_w) AM_BASE_GENERIC(videoram)   /* video RAM */
	126	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(seicross_videoram_w) AM_BASE(&seicross_videoram)   /* video RAM */
125	127	AM_RANGE(0x9800, 0x981f) AM_RAM AM_BASE(&seicross_row_scroll)
126	128	AM_RANGE(0x9880, 0x989f) AM_WRITEONLY AM_BASE_SIZE_GENERIC(spriteram2)
127		AM_RANGE(0x9c00, 0x9fff) AM_RAM_WRITE(seicross_colorram_w) AM_BASE_GENERIC(colorram)
	129	AM_RANGE(0x9c00, 0x9fff) AM_RAM_WRITE(seicross_colorram_w) AM_BASE(&seicross_colorram)
128	130	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")      /* IN0 */
129	131	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("IN1")      /* IN1 */
130	132	AM_RANGE(0xb000, 0xb000) AM_READ_PORT("TEST")      /* test */

src/mame/drivers/system16.c

r6740	r6741
88	88
89	89	#include "driver.h"
90	90	#include "cpu/z80/z80.h"
91		#include "system16.h"
	91	#include "includes/system16.h"
92	92	#include "cpu/m68000/m68000.h"
93	93	#include "sound/msm5205.h"
94	94	#include "sound/2151intf.h"

src/mame/drivers/pengo.c

r6740	r6741
64	64	#include "driver.h"
65	65	#include "cpu/z80/z80.h"
66	66	#include "machine/segacrpt.h"
67		#include "pacman.h"
	67	#include "includes/pacman.h"
68	68	#include "sound/namco.h"
69	69
70	70
r6740	r6741
98	98
99	99	static ADDRESS_MAP_START( pengo_map, ADDRESS_SPACE_PROGRAM, 8 )
100	100	AM_RANGE(0x0000, 0x7fff) AM_ROM
101		AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram) /* video and color RAM, scratchpad RAM, sprite codes */
102		AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	101	AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram) /* video and color RAM, scratchpad RAM, sprite codes */
	102	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
103	103	AM_RANGE(0x8800, 0x8fef) AM_RAM
104	104	AM_RANGE(0x8ff0, 0x8fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
105	105	AM_RANGE(0x9000, 0x901f) AM_DEVWRITE("namco", pacman_sound_w) AM_BASE(&pacman_soundregs)
r6740	r6741
121	121
122	122	static ADDRESS_MAP_START( jrpacmbl_map, ADDRESS_SPACE_PROGRAM, 8 )
123	123	AM_RANGE(0x0000, 0x7fff) AM_ROM
124		AM_RANGE(0x8000, 0x87ff) AM_RAM_WRITE(jrpacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
	124	AM_RANGE(0x8000, 0x87ff) AM_RAM_WRITE(jrpacman_videoram_w) AM_BASE(&pacman_videoram)
125	125	AM_RANGE(0x8800, 0x8fef) AM_RAM
126	126	AM_RANGE(0x8ff0, 0x8fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
127	127	AM_RANGE(0x9000, 0x901f) AM_DEVWRITE("namco", pacman_sound_w) AM_BASE(&pacman_soundregs)

src/mame/drivers/simpsons.c

r6740	r6741
69	69	#include "driver.h"
70	70	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
71	71	#include "cpu/z80/z80.h"
72		#include "video/konamiic.h"
	72	#include "video/konicdev.h"
	73	#include "machine/eepromdev.h"
73	74	#include "sound/2151intf.h"
74	75	#include "sound/k053260.h"
75	76	#include "includes/simpsons.h"
76		#include "konamipt.h"
	77	#include "includes/konamipt.h"
77	78
78	79
79	80	/***************************************************************************
r6740	r6741
85	86	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
86	87	AM_RANGE(0x0000, 0x0fff) AM_RAM
87	88	AM_RANGE(0x1f80, 0x1f80) AM_READ_PORT("COIN")
88		AM_RANGE(0x1f81, 0x1f81) AM_READ(simpsons_eeprom_r)
	89	AM_RANGE(0x1f81, 0x1f81) AM_READ_PORT("TEST")
89	90	AM_RANGE(0x1f90, 0x1f90) AM_READ_PORT("P1")
90	91	AM_RANGE(0x1f91, 0x1f91) AM_READ_PORT("P2")
91	92	AM_RANGE(0x1f92, 0x1f92) AM_READ_PORT("P3")
92	93	AM_RANGE(0x1f93, 0x1f93) AM_READ_PORT("P4")
93		AM_RANGE(0x1fa0, 0x1fa7) AM_WRITE(K053246_w)
94		AM_RANGE(0x1fb0, 0x1fbf) AM_WRITE(K053251_w)
	94	AM_RANGE(0x1fa0, 0x1fa7) AM_DEVWRITE("k053246", k053246_w)
	95	AM_RANGE(0x1fb0, 0x1fbf) AM_DEVWRITE("k053251", k053251_w)
95	96	AM_RANGE(0x1fc0, 0x1fc0) AM_WRITE(simpsons_coin_counter_w)
96	97	AM_RANGE(0x1fc2, 0x1fc2) AM_WRITE(simpsons_eeprom_w)
97	98	AM_RANGE(0x1fc4, 0x1fc4) AM_READ(simpsons_sound_interrupt_r)
98	99	AM_RANGE(0x1fc6, 0x1fc7) AM_DEVREADWRITE("konami", simpsons_sound_r, k053260_w)
99		AM_RANGE(0x1fc8, 0x1fc9) AM_READ(K053246_r)
	100	AM_RANGE(0x1fc8, 0x1fc9) AM_DEVREAD("k053246", k053246_r)
100	101	AM_RANGE(0x1fca, 0x1fca) AM_READ(watchdog_reset_r)
101	102	AM_RANGE(0x2000, 0x3fff) AM_RAMBANK("bank4")
102		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_r, K052109_w)
	103	AM_RANGE(0x0000, 0x3fff) AM_DEVREADWRITE("k052109", k052109_r, k052109_w)
103	104	AM_RANGE(0x4000, 0x5fff) AM_RAM
104	105	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
105	106	AM_RANGE(0x8000, 0xffff) AM_ROM
r6740	r6741
174	175
175	176	PORT_START("TEST")
176	177	PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_LOW )
177		PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNKNOWN )
	178	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	179	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )   // eeprom ack
	180	PORT_BIT( 0xce, IP_ACTIVE_LOW, IPT_UNKNOWN )
	181
	182	PORT_START( "EEPROMOUT" )
	183	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	184	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	185	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
178	186	INPUT_PORTS_END
179	187
180	188	static INPUT_PORTS_START( simpsn2p )
r6740	r6741
200	208	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) //SERVICE3 Unused
201	209	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) //SERVICE4 Unused
202	210
203		PORT_START("TEST") /* IN5 */
	211	PORT_START("TEST")
204	212	PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_LOW )
205		PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNKNOWN )
	213	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	214	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )   // eeprom ack
	215	PORT_BIT( 0xce, IP_ACTIVE_LOW, IPT_UNKNOWN )
	216
	217	PORT_START( "EEPROMOUT" )
	218	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	219	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	220	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
206	221	INPUT_PORTS_END
207	222
208	223
r6740	r6741
215	230
216	231	static void simpsons_objdma(running_machine *machine)
217	232	{
	233	const device_config *k053246 = devtag_get_device(machine, "k053246");
218	234	int counter, num_inactive;
219	235	UINT16 *src, *dst;
220	236
221		K053247_export_config(&dst, 0, 0, 0, &counter);
	237	k053247_get_ram(k053246, &dst);
	238	counter = k053247_get_dy(k053246);
	239
222	240	src = machine->generic.spriteram.u16;
223	241	num_inactive = counter = 256;
224	242
r6740	r6741
242	260	cputag_set_input_line(machine, "maincpu", KONAMI_FIRQ_LINE, HOLD_LINE);
243	261	}
244	262
	263
245	264	static INTERRUPT_GEN( simpsons_irq )
246	265	{
247		if (K053246_is_IRQ_enabled())
	266	const device_config *k053246 = devtag_get_device(device->machine, "k053246");
	267	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	268
	269	if (k053246_is_irq_enabled(k053246))
248	270	{
249	271	simpsons_objdma(device->machine);
250
251	272	// 32+256us delay at 8MHz dotclock; artificially shortened since actual V-blank length is unknown
252	273	timer_set(device->machine, ATTOTIME_IN_USEC(30), NULL, 0, dmaend_callback);
253	274	}
254	275
255		if (K052109_is_IRQ_enabled())
	276	if (k052109_is_irq_enabled(k052109))
256	277	cpu_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE);
257	278	}
258	279
	280	static const k052109_interface simpsons_k052109_intf =
	281	{
	282	"gfx1", 0,
	283	NORMAL_PLANE_ORDER,
	284	KONAMI_ROM_DEINTERLEAVE_2,
	285	simpsons_tile_callback
	286	};
	287
	288	static const k053247_interface simpsons_k053246_intf =
	289	{
	290	"screen",
	291	"gfx2", 1,
	292	NORMAL_PLANE_ORDER,
	293	53, 23,
	294	KONAMI_ROM_DEINTERLEAVE_4,
	295	simpsons_sprite_callback
	296	};
	297
	298	static const eeprom_interface eeprom_intf =
	299	{
	300	7,            /* address bits */
	301	8,            /* data bits */
	302	"011000",      /*  read command */
	303	"011100",      /* write command */
	304	0,            /* erase command */
	305	"0100000000000",/* lock command */
	306	"0100110000000" /* unlock command */
	307	};
	308
259	309	static MACHINE_DRIVER_START( simpsons )
260	310
261	311	/* basic machine hardware */
r6740	r6741
268	318	/* NMIs are generated by the 053260 */
269	319
270	320	MDRV_MACHINE_RESET(simpsons)
271		MDRV_NVRAM_HANDLER(simpsons)
272	321
	322	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
	323
273	324	/* video hardware */
274	325	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
275	326
r6740	r6741
282	333
283	334	MDRV_PALETTE_LENGTH(2048)
284	335
285		MDRV_VIDEO_START(simpsons)
286	336	MDRV_VIDEO_UPDATE(simpsons)
287	337
	338	MDRV_K052109_ADD("k052109", simpsons_k052109_intf)
	339	MDRV_K053246_ADD("k053246", simpsons_k053246_intf)
	340	MDRV_K053251_ADD("k053251")
	341
288	342	/* sound hardware */
289	343	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
290	344
r6740	r6741
475	529
476	530	***************************************************************************/
477	531
478		static DRIVER_INIT( simpsons )
479		{
480		konami_rom_deinterleave_2(machine, "gfx1");
481		konami_rom_deinterleave_4(machine, "gfx2");
482		}
483
484	532	// the region warning, if one exists, is shown after the high-score screen in attract mode
485		GAME( 1991, simpsons,    0,        simpsons, simpsons, simpsons, ROT0, "Konami", "The Simpsons (4 Players World, set 1)", 0 )
486		GAME( 1991, simpsons4pa, simpsons, simpsons, simpsons, simpsons, ROT0, "Konami", "The Simpsons (4 Players World, set 2)", 0 )
487		GAME( 1991, simpsons2p,  simpsons, simpsons, simpsn2p, simpsons, ROT0, "Konami", "The Simpsons (2 Players World, set 1)", 0 )
488		GAME( 1991, simpsons2p2, simpsons, simpsons, simpsons, simpsons, ROT0, "Konami", "The Simpsons (2 Players World, set 2)", 0 )
489		GAME( 1991, simpsons2pa, simpsons, simpsons, simpsn2p, simpsons, ROT0, "Konami", "The Simpsons (2 Players Asia)", 0 )
490		GAME( 1991, simpsons2pj, simpsons, simpsons, simpsn2p, simpsons, ROT0, "Konami", "The Simpsons (2 Players Japan)", 0 )
	533	GAME( 1991, simpsons,    0,        simpsons, simpsons, 0, ROT0, "Konami", "The Simpsons (4 Players World, set 1)", 0 )
	534	GAME( 1991, simpsons4pa, simpsons, simpsons, simpsons, 0, ROT0, "Konami", "The Simpsons (4 Players World, set 2)", 0 )
	535	GAME( 1991, simpsons2p,  simpsons, simpsons, simpsn2p, 0, ROT0, "Konami", "The Simpsons (2 Players World, set 1)", 0 )
	536	GAME( 1991, simpsons2p2, simpsons, simpsons, simpsons, 0, ROT0, "Konami", "The Simpsons (2 Players World, set 2)", 0 )
	537	GAME( 1991, simpsons2pa, simpsons, simpsons, simpsn2p, 0, ROT0, "Konami", "The Simpsons (2 Players Asia)", 0 )
	538	GAME( 1991, simpsons2pj, simpsons, simpsons, simpsn2p, 0, ROT0, "Konami", "The Simpsons (2 Players Japan)", 0 )

src/mame/drivers/actfancr.c

r6740	r6741
28	28	#include "sound/2203intf.h"
29	29	#include "sound/3812intf.h"
30	30	#include "sound/okim6295.h"
31		#include "actfancr.h"
	31	#include "includes/actfancr.h"
32	32
33	33
34	34	/******************************************************************************/

src/mame/drivers/model1.c

r6740	r6741
628	628	#include "cpu/v60/v60.h"
629	629	#include "deprecat.h"
630	630	#include "machine/eeprom.h"
631		#include "system16.h"
	631	#include "includes/system16.h"
632	632	#include "video/segaic24.h"
633	633	#include "cpu/m68000/m68000.h"
634	634	#include "cpu/mb86233/mb86233.h"
r6740	r6741
1457	1457	MDRV_CPU_ADD("audiocpu", M68000, 10000000)   // verified on real h/w
1458	1458	MDRV_CPU_PROGRAM_MAP(model1_snd)
1459	1459
	1460	MDRV_MACHINE_START(model1)
1460	1461	MDRV_MACHINE_RESET(model1)
1461	1462	MDRV_NVRAM_HANDLER(generic_0fill)
1462	1463
r6740	r6741
1500	1501	MDRV_CPU_CONFIG(model1_vr_tgp_config)
1501	1502	MDRV_CPU_PROGRAM_MAP(model1_vr_tgp_map)
1502	1503
	1504	MDRV_MACHINE_START(model1)
1503	1505	MDRV_MACHINE_RESET(model1_vr)
1504	1506	MDRV_NVRAM_HANDLER(generic_0fill)
1505	1507

src/mame/drivers/polepos.c

r6740	r6741
228	228	#include "sound/samples.h"
229	229	#include "audio/namco52.h"
230	230	#include "audio/namco54.h"
231		#include "polepos.h"
	231	#include "includes/polepos.h"
232	232	#include "sound/tms5220.h"
233	233
234	234	#include "polepos.lh"

src/mame/drivers/tank8.c

r6740	r6741
6	6
7	7	#include "driver.h"
8	8	#include "cpu/m6800/m6800.h"
9		#include "tank8.h"
	9	#include "includes/tank8.h"
10	10	#include "sound/discrete.h"
11	11
12	12	static int collision_index;

src/mame/drivers/cps1.c

r6740	r6741
239	239	#include "sound/qsound.h"
240	240	#include "sound/msm5205.h"
241	241
	242	#include "includes/cps1.h"       /* External CPS1 definitions */
242	243
243		#include "cps1.h"       /* External CPS1 definitions */
244	244
	245
245	246	READ16_HANDLER( cps1_dsw_r )
246	247	{
247	248	static const char *const dswname[] = { "IN0", "DSWA", "DSWB", "DSWC" };
r6740	r6741
256	257	return (in << 8) | in;
257	258	}
258	259
259		static int dial[2];
260
261	260	static READ16_HANDLER( forgottn_dial_0_r )
262	261	{
263		return ((input_port_read(space->machine, "DIAL0") - dial[0]) >> (8*offset)) & 0xff;
	262	cps_state *state = (cps_state *)space->machine->driver_data;
	263	return ((input_port_read(space->machine, "DIAL0") - state->dial[0]) >> (8 * offset)) & 0xff;
264	264	}
265	265
266	266	static READ16_HANDLER( forgottn_dial_1_r )
267	267	{
268		return ((input_port_read(space->machine, "DIAL1") - dial[1]) >> (8*offset)) & 0xff;
	268	cps_state *state = (cps_state *)space->machine->driver_data;
	269	return ((input_port_read(space->machine, "DIAL1") - state->dial[1]) >> (8 * offset)) & 0xff;
269	270	}
270	271
271	272	static WRITE16_HANDLER( forgottn_dial_0_reset_w )
272	273	{
273		dial[0] = input_port_read(space->machine, "DIAL0");
	274	cps_state *state = (cps_state *)space->machine->driver_data;
	275	state->dial[0] = input_port_read(space->machine, "DIAL0");
274	276	}
275	277
276	278	static WRITE16_HANDLER( forgottn_dial_1_reset_w )
277	279	{
278		dial[1] = input_port_read(space->machine, "DIAL1");
	280	cps_state *state = (cps_state *)space->machine->driver_data;
	281	state->dial[1] = input_port_read(space->machine, "DIAL1");
279	282	}
280	283
281	284
282	285	static WRITE8_HANDLER( cps1_snd_bankswitch_w )
283	286	{
284		UINT8 *RAM = memory_region(space->machine, "audiocpu");
285		int bankaddr;
286
287		bankaddr = ((data & 1) * 0x4000);
288		memory_set_bankptr(space->machine, "bank1",&RAM[0x10000 + bankaddr]);
	287	memory_set_bank(space->machine, "bank1", data & 0x01);
289	288	}
290	289
291	290	static WRITE8_DEVICE_HANDLER( cps1_oki_pin7_w )
r6740	r6741
296	295	static WRITE16_HANDLER( cps1_soundlatch_w )
297	296	{
298	297	if (ACCESSING_BITS_0_7)
299		soundlatch_w(space,0,data & 0xff);
	298	soundlatch_w(space, 0, data & 0xff);
300	299	}
301	300
302	301	static WRITE16_HANDLER( cps1_soundlatch2_w )
303	302	{
304	303	if (ACCESSING_BITS_0_7)
305		soundlatch2_w(space,0,data & 0xff);
	304	soundlatch2_w(space, 0, data & 0xff);
306	305	}
307	306
308	307	WRITE16_HANDLER( cps1_coinctrl_w )
309	308	{
310	309	if (ACCESSING_BITS_8_15)
311	310	{
312		coin_counter_w(space->machine, 0,data & 0x0100);
313		coin_counter_w(space->machine, 1,data & 0x0200);
314		coin_lockout_w(space->machine, 0,~data & 0x0400);
315		coin_lockout_w(space->machine, 1,~data & 0x0800);
	311	coin_counter_w(space->machine, 0, data & 0x0100);
	312	coin_counter_w(space->machine, 1, data & 0x0200);
	313	coin_lockout_w(space->machine, 0, ~data & 0x0400);
	314	coin_lockout_w(space->machine, 1, ~data & 0x0800);
316	315
317	316	// bit 15 = CPS-A custom reset?
318	317	}
r6740	r6741
322	321	{
323	322	if (ACCESSING_BITS_0_7)
324	323	{
325		coin_counter_w(space->machine, 2,data & 0x01);
326		coin_lockout_w(space->machine, 2,~data & 0x02);
327		coin_counter_w(space->machine, 3,data & 0x04);
328		coin_lockout_w(space->machine, 3,~data & 0x08);
	324	coin_counter_w(space->machine, 2, data & 0x01);
	325	coin_lockout_w(space->machine, 2, ~data & 0x02);
	326	coin_counter_w(space->machine, 3, data & 0x04);
	327	coin_lockout_w(space->machine, 3, ~data & 0x08);
329	328	}
330	329	}
331	330
r6740	r6741
343	342	*
344	343	********************************************************************/
345	344
346		static UINT8 *qsound_sharedram1,*qsound_sharedram2;
347	345
348	346	static INTERRUPT_GEN( cps1_qsound_interrupt )
349	347	{
r6740	r6741
355	353	{
356	354	UINT8 *rom = memory_region(space->machine, "user1");
357	355
358		if (rom) return rom[offset] | 0xff00;
	356	if (rom)
	357	return rom[offset] | 0xff00;
359	358	else
360	359	{
361		popmessage("%06x: read sound ROM byte %04x",cpu_get_pc(space->cpu),offset);
	360	popmessage("%06x: read sound ROM byte %04x", cpu_get_pc(space->cpu), offset);
362	361	return 0;
363	362	}
364	363	}
365	364
366	365	READ16_HANDLER( qsound_sharedram1_r )
367	366	{
368		return qsound_sharedram1[offset] | 0xff00;
	367	cps_state *state = (cps_state *)space->machine->driver_data;
	368	return state->qsound_sharedram1[offset] | 0xff00;
369	369	}
370	370
371	371	WRITE16_HANDLER( qsound_sharedram1_w )
372	372	{
	373	cps_state *state = (cps_state *)space->machine->driver_data;
	374
373	375	if (ACCESSING_BITS_0_7)
374		qsound_sharedram1[offset] = data;
	376	state->qsound_sharedram1[offset] = data;
375	377	}
376	378
377	379	static READ16_HANDLER( qsound_sharedram2_r )
378	380	{
379		return qsound_sharedram2[offset] | 0xff00;
	381	cps_state *state = (cps_state *)space->machine->driver_data;
	382	return state->qsound_sharedram2[offset] | 0xff00;
380	383	}
381	384
382	385	static WRITE16_HANDLER( qsound_sharedram2_w )
383	386	{
	387	cps_state *state = (cps_state *)space->machine->driver_data;
	388
384	389	if (ACCESSING_BITS_0_7)
385		qsound_sharedram2[offset] = data;
	390	state->qsound_sharedram2[offset] = data;
386	391	}
387	392
388	393	static WRITE8_HANDLER( qsound_banksw_w )
389	394	{
390		/*
391		Z80 bank register for music note data. It's odd that it isn't encrypted
392		though.
393		*/
394		UINT8 *RAM = memory_region(space->machine, "audiocpu");
395		int bankaddress=0x10000+((data&0x0f)*0x4000);
396		if (bankaddress >= memory_region_length(space->machine, "audiocpu"))
	395	/* Z80 bank register for music note data. It's odd that it isn't encrypted though. */
	396	int bank = data & 0x0f;
	397	if ((0x10000 + (bank * 0x4000)) >= memory_region_length(space->machine, "audiocpu"))
397	398	{
398	399	logerror("WARNING: Q sound bank overflow (%02x)\n", data);
399		bankaddress=0x10000;
	400	bank = 0;
400	401	}
401		memory_set_bankptr(space->machine, "bank1", &RAM[bankaddress]);
	402
	403	memory_set_bank(space->machine, "bank1", bank);
402	404	}
403	405
404	406
r6740	r6741
432	434	};
433	435	#endif
434	436
435		// FIXME: these are still needed by pang3
436		static READ16_HANDLER( cps1_eeprom_port_r )
437		{
438		const device_config *eeprom = devtag_get_device(space->machine, "eeprom");
439		return eepromdev_read_bit(eeprom);
440		}
441	437
442		static WRITE16_HANDLER( cps1_eeprom_port_w )
443		{
444		if (ACCESSING_BITS_0_7)
445		{
446		/*
447		bit 0 = data
448		bit 6 = clock
449		bit 7 = cs
450		*/
451		input_port_write(space->machine, "EEPROMOUT", data, 0xff);
452		}
453		}
454
455
456
457	438	/*
458	439	PAL PRG1 (16P8B @ 12H):
459	440
r6740	r6741
569	550	AM_RANGE(0x800020, 0x800021) AM_READNOP                  /* ? Used by Rockman ? not mapped according to PAL */
570	551	AM_RANGE(0x800030, 0x800037) AM_WRITE(cps1_coinctrl_w)
571	552	/* Forgotten Worlds has dial controls on B-board mapped at 800040-80005f. See DRIVER_INIT */
572		AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)   /* CPS-A custom */
	553	AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs)   /* CPS-A custom */
573	554	/* CPS-B custom is mapped by a PAL on B-board. SF2 revision "E" US 910228 has it a a different
574	555	address, see DRIVER_INIT */
575		AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)
	556	AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE_MEMBER(cps_state, cps_b_regs)
576	557	AM_RANGE(0x800180, 0x800187) AM_WRITE(cps1_soundlatch_w)   /* Sound command */
577	558	AM_RANGE(0x800188, 0x80018f) AM_WRITE(cps1_soundlatch2_w)   /* Sound timer fade */
578		AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)   /* SF2CE executes code from here */
	559	AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE_SIZE_MEMBER(cps_state, gfxram, gfxram_size)   /* SF2CE executes code from here */
579	560	AM_RANGE(0xff0000, 0xffffff) AM_RAM
580	561	ADDRESS_MAP_END
581	562
r6740	r6741
620	601	AM_RANGE(0x800000, 0x800007) AM_READ_PORT("IN1")         /* Player input ports */
621	602	AM_RANGE(0x800018, 0x80001f) AM_READ(cps1_dsw_r)         /* System input ports / Dip Switches */
622	603	AM_RANGE(0x800030, 0x800037) AM_WRITE(cps1_coinctrl_w)
623		AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)   /* CPS-A custom */
624		AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)   /* CPS-B custom (mapped by LWIO/IOB1 PAL on B-board) */
625		AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)   /* SF2CE executes code from here */
	604	AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs)   /* CPS-A custom */
	605	AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE_MEMBER(cps_state, cps_b_regs)   /* CPS-B custom (mapped by LWIO/IOB1 PAL on B-board) */
	606	AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE_SIZE_MEMBER(cps_state, gfxram, gfxram_size)   /* SF2CE executes code from here */
626	607	AM_RANGE(0xf00000, 0xf0ffff) AM_READ(qsound_rom_r)         /* Slammasters protection */
627	608	AM_RANGE(0xf18000, 0xf19fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w)  /* Q RAM */
628	609	AM_RANGE(0xf1c000, 0xf1c001) AM_READ_PORT("IN2")         /* Player 3 controls (later games) */
r6740	r6741
636	617	ADDRESS_MAP_START( qsound_sub_map, ADDRESS_SPACE_PROGRAM, 8 )   // used by cps2.c too
637	618	AM_RANGE(0x0000, 0x7fff) AM_ROM
638	619	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")   /* banked (contains music data) */
639		AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE(&qsound_sharedram1)
	620	AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE_MEMBER(cps_state, qsound_sharedram1)
640	621	AM_RANGE(0xd000, 0xd002) AM_DEVWRITE("qsound", qsound_w)
641	622	AM_RANGE(0xd003, 0xd003) AM_WRITE(qsound_banksw_w)
642	623	AM_RANGE(0xd007, 0xd007) AM_DEVREAD("qsound", qsound_r)
643		AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE(&qsound_sharedram2)
	624	AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE_MEMBER(cps_state, qsound_sharedram2)
644	625	ADDRESS_MAP_END
645	626
646	627	/***********************************************************
r6740	r6741
2758	2739
2759	2740	static void cps1_irq_handler_mus(const device_config *device, int irq)
2760	2741	{
2761		cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
	2742	cps_state *state = (cps_state *)device->machine->driver_data;
	2743	cpu_set_input_line(state->audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE);
2762	2744	}
2763	2745
2764	2746	static const ym2151_interface ym2151_config =
r6740	r6741
2777	2759	*
2778	2760	********************************************************************/
2779	2761
	2762	static MACHINE_START( common )
	2763	{
	2764	cps_state *state = (cps_state *)machine->driver_data;
	2765
	2766	state->maincpu = devtag_get_device(machine, "maincpu");
	2767	state->audiocpu = devtag_get_device(machine, "audiocpu");
	2768	}
	2769
	2770	static MACHINE_START( cps1 )
	2771	{
	2772	MACHINE_START_CALL(common);
	2773	memory_configure_bank(machine, "bank1", 0, 2, memory_region(machine, "audiocpu") + 0x10000, 0x4000);
	2774	}
	2775
	2776	static MACHINE_START( qsound )
	2777	{
	2778	MACHINE_START_CALL(common);
	2779	memory_configure_bank(machine, "bank1", 0, 6, memory_region(machine, "audiocpu") + 0x10000, 0x4000);
	2780	}
	2781
2780	2782	static MACHINE_DRIVER_START( cps1_10MHz )
2781	2783
	2784	/* driver data */
	2785	MDRV_DRIVER_DATA(cps_state)
	2786
2782	2787	/* basic machine hardware */
2783	2788	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz )   /* verified on pcb */
2784	2789	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
2787	2792	MDRV_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz)  /* verified on pcb */
2788	2793	MDRV_CPU_PROGRAM_MAP(sub_map)
2789	2794
	2795	MDRV_MACHINE_START(cps1)
	2796
2790	2797	/* video hardware */
2791	2798	MDRV_SCREEN_ADD("screen", RASTER)
2792	2799	MDRV_SCREEN_REFRESH_RATE(59.61) /* verified on one of the input gates of the 74ls08@4J on GNG romboard 88620-b-2 */
r6740	r6741
2846	2853	MDRV_CPU_PROGRAM_MAP(qsound_sub_map)
2847	2854	MDRV_CPU_PERIODIC_INT(irq0_line_hold, 250)   /* ?? */
2848	2855
	2856	MDRV_MACHINE_START(qsound)
	2857
2849	2858	MDRV_EEPROM_NODEFAULT_ADD("eeprom", qsound_eeprom_interface)
2850	2859
2851	2860	/* sound hardware */
r6740	r6741
2864	2873
2865	2874	static MACHINE_DRIVER_START( cpspicb )
2866	2875
	2876	/* driver data */
	2877	MDRV_DRIVER_DATA(cps_state)
	2878
2867	2879	/* basic machine hardware */
2868	2880	MDRV_CPU_ADD("maincpu", M68000, 12000000)
2869	2881	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
2872	2884	MDRV_CPU_ADD("audiocpu", PIC16C57, 12000000)
2873	2885	MDRV_CPU_FLAGS(CPU_DISABLE) /* no valid dumps .. */
2874	2886
	2887	MDRV_MACHINE_START(common)
	2888
2875	2889	/* video hardware */
2876	2890	MDRV_SCREEN_ADD("screen", RASTER)
2877	2891	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
2939	2953
2940	2954	static MACHINE_DRIVER_START( sf2mdt )
2941	2955
	2956	/* driver data */
	2957	MDRV_DRIVER_DATA(cps_state)
	2958
2942	2959	/* basic machine hardware */
2943	2960	MDRV_CPU_ADD("maincpu", M68000, 12000000)
2944	2961	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
2947	2964	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
2948	2965	MDRV_CPU_PROGRAM_MAP(sf2mdt_z80map)
2949	2966
	2967	MDRV_MACHINE_START(common)
	2968
2950	2969	/* video hardware */
2951	2970	MDRV_SCREEN_ADD("screen", RASTER)
2952	2971	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
3022	3041
3023	3042	static MACHINE_DRIVER_START( knightsb )
3024	3043
	3044	/* driver data */
	3045	MDRV_DRIVER_DATA(cps_state)
	3046
3025	3047	/* basic machine hardware */
3026	3048	MDRV_CPU_ADD("maincpu", M68000, 24000000 / 2)
3027	3049	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
3030	3052	MDRV_CPU_ADD("audiocpu", Z80, 29821000 / 8)
3031	3053	MDRV_CPU_PROGRAM_MAP(sf2mdt_z80map)
3032	3054
	3055	MDRV_MACHINE_START(common)
	3056
3033	3057	/* video hardware */
3034	3058	MDRV_SCREEN_ADD("screen", RASTER)
3035	3059	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
8603	8627
8604	8628	static DRIVER_INIT( forgottn )
8605	8629	{
	8630	cps_state *state = (cps_state *)machine->driver_data;
	8631
8606	8632	/* Forgotten Worlds has a NEC uPD4701AC on the B-board handling dial inputs from the CN-MOWS connector. */
8607	8633	/* The memory mapping is handled by PAL LWIO */
8608	8634	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800040, 0x800041, 0, 0, forgottn_dial_0_reset_w);
8609	8635	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800048, 0x800049, 0, 0, forgottn_dial_1_reset_w);
8610		memory_install_read16_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800052, 0x800055, 0, 0, forgottn_dial_0_r);
8611		memory_install_read16_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80005a, 0x80005d, 0, 0, forgottn_dial_1_r);
	8636	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800052, 0x800055, 0, 0, forgottn_dial_0_r);
	8637	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80005a, 0x80005d, 0, 0, forgottn_dial_1_r);
8612	8638
	8639	state_save_register_global_array(machine, state->dial);
	8640
	8641	state->dial[0] = 0;
	8642	state->dial[1] = 0;
	8643
8613	8644	DRIVER_INIT_CALL(cps1);
8614	8645	}
8615	8646
r6740	r6741
8626	8657	static DRIVER_INIT( sf2hack )
8627	8658	{
8628	8659	/* some SF2 hacks have some inputs wired to the LSB instead of MSB */
8629		memory_install_read16_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800018, 0x80001f, 0, 0, cps1_hack_dsw_r);
	8660	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800018, 0x80001f, 0, 0, cps1_hack_dsw_r);
8630	8661
8631	8662	DRIVER_INIT_CALL(cps1);
8632	8663	}
r6740	r6741
8659	8690	{
8660	8691	/* Pang 3 is the only non-QSound game to have an EEPROM. */
8661	8692	/* It is mapped in the CPS-B address range so probably is on the C-board. */
8662		memory_install_readwrite16_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80017a, 0x80017b, 0, 0, cps1_eeprom_port_r, cps1_eeprom_port_w);
	8693	memory_install_readwrite_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80017a, 0x80017b, 0, 0, "EEPROMIN", "EEPROMOUT");
8663	8694
8664	8695	DRIVER_INIT_CALL(cps1);
8665	8696	}
r6740	r6741
8667	8698	static DRIVER_INIT( pang3j )
8668	8699	{
8669	8700	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
8670		int A,src,dst;
	8701	int A, src, dst;
8671	8702
8672		for (A = 0x80000;A < 0x100000;A += 2)
	8703	for (A = 0x80000; A < 0x100000; A += 2)
8673	8704	{
8674	8705	/* only the low 8 bits of each word are encrypted */
8675		src = rom[A/2];
	8706	src = rom[A / 2];
8676	8707	dst = src & 0xff00;
8677	8708	if ( src & 0x01) dst ^= 0x04;
8678	8709	if ( src & 0x02) dst ^= 0x21;
r6740	r6741
8703	8734
8704	8735	for( i = 0; i < gfx_size; i += 8 )
8705	8736	{
8706		tmp = rom[i+1];
8707		rom[i+1] = rom[i+4];
8708		rom[i+4] = tmp;
8709		tmp = rom[i+3];
8710		rom[i+3] = rom[i+6];
8711		rom[i+6] = tmp;
	8737	tmp = rom[i + 1];
	8738	rom[i + 1] = rom[i + 4];
	8739	rom[i + 4] = tmp;
	8740	tmp = rom[i + 3];
	8741	rom[i + 3] = rom[i + 6];
	8742	rom[i + 6] = tmp;
8712	8743	}
8713	8744	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x70c01a, 0x70c01b, 0, 0, sf2mdt_r);
8714	8745	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x70c01c, 0x70c01d, 0, 0, sf2mdt_r);
r6740	r6741
8720	8751	}
8721	8752
8722	8753
8723		GAME( 1988, forgottn, 0,        cps1_10MHz, forgottn, forgottn, ROT0,   "Capcom", "Forgotten Worlds (World)", 0 )
8724		GAME( 1988, forgottnu,forgottn, cps1_10MHz, forgottn, forgottn, ROT0,   "Capcom", "Forgotten Worlds (US)", 0 )
8725		GAME( 1988, lostwrld, forgottn, cps1_10MHz, forgottn, forgottn, ROT0,   "Capcom", "Lost Worlds (Japan)", 0 )
8726		GAME( 1988, lostwrldo,forgottn, cps1_10MHz, forgottn, forgottn, ROT0,   "Capcom", "Lost Worlds (Japan Old Ver.)", 0 )
8727		GAME( 1988, ghouls,   0,        cps1_10MHz, ghouls,   cps1,     ROT0,   "Capcom", "Ghouls'n Ghosts (World)" , 0)            // Wed.26.10.1988 in the ROMS
8728		GAME( 1988, ghoulsu,  ghouls,   cps1_10MHz, ghoulsu,  cps1,     ROT0,   "Capcom", "Ghouls'n Ghosts (US)" , 0)               // Wed.26.10.1988 in the ROMS
8729		GAME( 1988, daimakai, ghouls,   cps1_10MHz, daimakai, cps1,     ROT0,   "Capcom", "Dai Makai-Mura (Japan)" , 0)               // Wed.26.10.1988 in the ROMS
8730		GAME( 1988, daimakair,ghouls,   cps1_10MHz, daimakai, cps1,     ROT0,   "Capcom", "Dai Makai-Mura (Japan Resale Ver.)" , 0)      // still Wed.26.10.1988 in the ROMS...
8731		GAME( 1989, strider,  0,        cps1_10MHz, strider,  cps1,     ROT0,   "Capcom", "Strider (US set 1)", 0 )
8732		GAME( 1989, striderua,strider,  cps1_10MHz, stridrua, cps1,     ROT0,   "Capcom", "Strider (US set 2)", 0 )
8733		GAME( 1989, striderj, strider,  cps1_10MHz, strider,  cps1,     ROT0,   "Capcom", "Strider Hiryu (Japan)", 0 )
8734		GAME( 1989, striderjr,strider,  cps1_10MHz, strider,  cps1,     ROT0,   "Capcom", "Strider Hiryu (Japan Resale Ver.)", 0 )
8735		GAME( 1989, dynwar,   0,        cps1_10MHz, dynwar,   cps1,     ROT0,   "Capcom", "Dynasty Wars (US set 1)", 0 )            // (c) Capcom U.S.A.
8736		GAME( 1989, dynwaru,  dynwar,   cps1_10MHz, dynwar,   cps1,     ROT0,   "Capcom", "Dynasty Wars (US set 2)", 0 )            // (c) Capcom U.S.A.
8737		GAME( 1989, dynwarj,  dynwar,   cps1_10MHz, dynwar,   cps1,     ROT0,   "Capcom", "Tenchi wo Kurau (Japan)", 0 )
8738		GAME( 1989, willow,   0,        cps1_10MHz, willow,   cps1,     ROT0,   "Capcom", "Willow (US)", 0 )
8739		GAME( 1989, willowj,  willow,   cps1_10MHz, willow,   cps1,     ROT0,   "Capcom", "Willow (Japan, Japanese)" , 0)            // Japan "warning"
8740		GAME( 1989, willowje, willow,   cps1_10MHz, willow,   cps1,     ROT0,   "Capcom", "Willow (Japan, English)", 0 )            // (c) Capcom U.S.A. but Japan "warning"
8741		GAME( 1989, unsquad,  0,        cps1_10MHz, unsquad,  cps1,     ROT0,   "Capcom", "U.N. Squadron (US)", 0 )
8742		GAME( 1989, area88,   unsquad,  cps1_10MHz, unsquad,  cps1,     ROT0,   "Capcom", "Area 88 (Japan)", 0 )
8743		GAME( 1989, ffight,   0,        cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (World)", 0 )
8744		GAME( 1989, ffightu,  ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (US)", 0 )
8745		GAME( 1989, ffightua, ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (US 900112)", 0 )
8746		GAME( 1989, ffightub, ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (US 900613)", 0 )
8747		GAME( 1989, ffightj,  ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (Japan)", 0 )
8748		GAME( 1989, ffightj1, ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (Japan 900305)", 0 )
8749		GAME( 1989, ffightj2, ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (Japan 900112)", 0 )
8750		GAME( 1990, 1941,     0,        cps1_10MHz, 1941,     cps1,     ROT270, "Capcom", "1941 - Counter Attack (World)", 0 )
8751		GAME( 1990, 1941j,    1941,     cps1_10MHz, 1941,     cps1,     ROT270, "Capcom", "1941 - Counter Attack (Japan)", 0 )
8752		GAME( 1990, mercs,    0,        cps1_10MHz, mercs,    cps1,     ROT270, "Capcom", "Mercs (World 900302)" , 0)               // "ETC"
8753		GAME( 1990, mercsu,   mercs,    cps1_10MHz, mercs,    cps1,     ROT270, "Capcom", "Mercs (US 900302)", 0 )
8754		GAME( 1990, mercsua,  mercs,    cps1_10MHz, mercs,    cps1,     ROT270, "Capcom", "Mercs (US 900608)", 0 )
8755		GAME( 1990, mercsj,   mercs,    cps1_10MHz, mercs,    cps1,     ROT270, "Capcom", "Senjou no Ookami II (Japan 900302)", 0 )
8756		GAME( 1990, mtwins,   0,        cps1_10MHz, mtwins,   cps1,     ROT0,   "Capcom", "Mega Twins (World 900619)", 0 )            // "ETC" - (c) Capcom U.S.A. with World "warning"
8757		GAME( 1990, chikij,   mtwins,   cps1_10MHz, mtwins,   cps1,     ROT0,   "Capcom", "Chiki Chiki Boys (Japan 900619)", 0 )
8758		GAME( 1990, msword,   0,        cps1_10MHz, msword,   cps1,     ROT0,   "Capcom", "Magic Sword - Heroic Fantasy (World 900725)" , 0)   // 25.07.1990  "Other Country"
8759		GAME( 1990, mswordr1, msword,   cps1_10MHz, msword,   cps1,     ROT0,   "Capcom", "Magic Sword - Heroic Fantasy (World 900623)" , 0)   // 23.06.1990  "Other Country"
8760		GAME( 1990, mswordu,  msword,   cps1_10MHz, msword,   cps1,     ROT0,   "Capcom", "Magic Sword - Heroic Fantasy (US 900725)" , 0)      // 25.07.1990  "U.S.A."
8761		GAME( 1990, mswordj,  msword,   cps1_10MHz, msword,   cps1,     ROT0,   "Capcom", "Magic Sword (Japan 900623)" , 0)                  // 23.06.1990  "Japan"
8762		GAME( 1990, cawing,   0,        cps1_10MHz, cawing,   cps1,     ROT0,   "Capcom", "Carrier Air Wing (World 901012)" , 0)         // "ETC"
8763		GAME( 1990, cawingr1, cawing,   cps1_10MHz, cawing,   cps1,     ROT0,   "Capcom", "Carrier Air Wing (World 901009)" , 0)         // "ETC"
8764		GAME( 1990, cawingu,  cawing,   cps1_10MHz, cawing,   cps1,     ROT0,   "Capcom", "Carrier Air Wing (US 901012)", 0 )
8765		GAME( 1990, cawingj,  cawing,   cps1_10MHz, cawing,   cps1,     ROT0,   "Capcom", "U.S. Navy (Japan 901012)", 0 )
8766		GAME( 1990, nemo,     0,        cps1_10MHz, nemo,     cps1,     ROT0,   "Capcom", "Nemo (World 901130)" , 0)                  // "ETC"
8767		GAME( 1990, nemoj,    nemo,     cps1_10MHz, nemo,     cps1,     ROT0,   "Capcom", "Nemo (Japan 901120)", 0 )
8768		GAME( 1991, sf2,      0,        cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (World 910522)" , 0)   // "ETC"
8769		GAME( 1991, sf2eb,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (World 910214)" , 0)   // "ETC"
8770		GAME( 1992, sf2ebbl,  sf2,      cps1_10MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II - The World Warrior (World 910214, TAB Austria bootleg)", 0 )
8771		GAME( 1991, sf2ua,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910206)", 0 )
8772		GAME( 1991, sf2ub,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910214)", 0 )
8773		GAME( 1991, sf2ud,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910318)", 0 )
8774		GAME( 1991, sf2ue,    sf2,      cps1_10MHz, sf2,      sf2ue,    ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910228)", 0 )
8775		GAME( 1991, sf2uf,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910411)", 0 )
8776		GAME( 1991, sf2ui,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910522)", 0 )
8777		GAME( 1991, sf2uk,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 911101)", 0 )
8778		GAME( 1991, sf2j,     sf2,      cps1_10MHz, sf2j,     cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (Japan 911210)", 0 )
8779		GAME( 1991, sf2ja,    sf2,      cps1_10MHz, sf2j,     cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (Japan 910214)", 0 )
8780		GAME( 1991, sf2jc,    sf2,      cps1_10MHz, sf2j,     cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (Japan 910306)", 0 )
8781		GAME( 1991, sf2qp1,   sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II - The World Warrior (Quicken Pt-I, bootleg)" , 0)      // 910214
8782		GAME( 1991, 3wonders, 0,        cps1_10MHz, 3wonders, cps1,     ROT0,   "Capcom", "Three Wonders (World 910520)" , 0)               // "ETC"
8783		GAME( 1991, 3wondersu,3wonders, cps1_10MHz, 3wonders, cps1,     ROT0,   "Capcom", "Three Wonders (US 910520)", 0 )
8784		GAME( 1991, wonder3,  3wonders, cps1_10MHz, 3wonders, cps1,     ROT0,   "Capcom", "Wonder 3 (Japan 910520)", 0 )
8785		GAME( 1991, 3wondersh,3wonders, cps1_10MHz, 3wonders, cps1,     ROT0,   "bootleg","Three Wonders (hack?)", 0 )
8786		GAME( 1991, kod,      0,        cps1_10MHz, kod,      cps1,     ROT0,   "Capcom", "The King of Dragons (World 910711)" , 0)            // "ETC"
8787		GAME( 1991, kodu,     kod,      cps1_10MHz, kodj,     cps1,     ROT0,   "Capcom", "The King of Dragons (US 910910)", 0 )
8788		GAME( 1991, kodj,     kod,      cps1_10MHz, kodj,     cps1,     ROT0,   "Capcom", "The King of Dragons (Japan 910805)", 0 )
8789		GAME( 1991, captcomm, 0,        cps1_10MHz, captcomm, cps1,     ROT0,   "Capcom", "Captain Commando (World 911014)" , 0)            // "OTHER COUNTRY"
8790		GAME( 1991, captcommu,captcomm, cps1_10MHz, captcomm, cps1,     ROT0,   "Capcom", "Captain Commando (US 910928)", 0 )
8791		GAME( 1991, captcommj,captcomm, cps1_10MHz, captcomm, cps1,     ROT0,   "Capcom", "Captain Commando (Japan 911202)", 0 )
8792		GAME( 1991, captcommb,captcomm, cps1_10MHz, captcomm, cps1,     ROT0,   "bootleg","Captain Commando (bootleg)", GAME_NOT_WORKING )
8793		GAME( 1991, knights,  0,        cps1_10MHz, knights,  cps1,     ROT0,   "Capcom", "Knights of the Round (World 911127)" , 0)         // "ETC"
8794		GAME( 1991, knightsu, knights,  cps1_10MHz, knights,  cps1,     ROT0,   "Capcom", "Knights of the Round (US 911127)", 0 )
8795		GAME( 1991, knightsj, knights,  cps1_10MHz, knights,  cps1,     ROT0,   "Capcom", "Knights of the Round (Japan 911127)", 0 )
8796		GAME( 1991, knightsb, knights,  knightsb,   knights,  cps1,     ROT0,   "bootleg", "Knights of the Round (World 911127, bootleg)" , GAME_NOT_WORKING)
8797		GAME( 1992, sf2ce,    0,        cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (World 920313)" , 0)   // "ETC"
8798		GAME( 1992, sf2ceua,  sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (US 920313)", 0 )
8799		GAME( 1992, sf2ceub,  sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (US 920513)", 0 )
8800		GAME( 1992, sf2ceuc,  sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (US 920803)", 0 )
8801		GAME( 1992, sf2cej,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (Japan 920513)", 0 )
8802		GAME( 1992, sf2rb,    sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Rainbow set 1, bootleg)" , 0)   // 920322 - based on World version
8803		GAME( 1992, sf2rb2,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Rainbow set 2, bootleg)" , 0)   // 920322 - based on World version
8804		GAME( 1992, sf2rb3,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Rainbow set 3, bootleg)" , 0)
8805		GAME( 1992, sf2red,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Red Wave, bootleg)" , 0)      // 920313 - based on World version
8806		GAME( 1992, sf2v004,  sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II! - Champion Edition (V004, bootleg)", 0 )         // "102092" !!! - based on (heavily modified) World version
8807		GAME( 1992, sf2acc,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Accelerator!, bootleg)" , 0)  // 920313 - based on USA version
8808		GAME( 1992, sf2accp2, sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Accelerator Pt.II, bootleg)" , 0)  // 920313 - based on USA version
8809		GAME( 1992, sf2dkot2, sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Double K.O. Turbo II, bootleg)" , 0)  // 902140 - ???
8810		GAME( 1992, sf2m1,    sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (M1, bootleg)", GAME_NOT_WORKING )
8811		GAME( 1992, sf2m2,    sf2ce,    cps1_12MHz, sf2m2,    sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M2, bootleg)", 0 )
8812		GAME( 1992, sf2m3,    sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (M3, bootleg)", GAME_NOT_WORKING )
8813		GAME( 1992, sf2m4,    sf2ce,    cps1_12MHz, sf2m4,    sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M4, bootleg)", 0 )
8814		GAME( 1992, sf2m5,    sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M5, bootleg)", 0 )
8815		GAME( 1992, sf2m6,    sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M6, bootleg)", 0 )
8816		GAME( 1992, sf2m7,    sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M7, bootleg)", 0 )
8817		GAME( 1992, sf2yyc,   sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (YYC, bootleg)", 0 )
8818		GAME( 1992, sf2koryu, sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (Xiang Long, Chinese bootleg)", 0 )
8819		GAME( 1992, sf2mdt,   sf2ce,    sf2mdt,     sf2hack,  sf2mdt,   ROT0,   "bootleg","Street Fighter II' - Champion Edition (Magic Delta Turbo, bootleg)", GAME_NOT_WORKING|GAME_NO_SOUND ); // heavily modified, different sound & gfx hardware
8820		GAME( 1992, varth,    0,        cps1_12MHz, varth,    cps1,     ROT270, "Capcom", "Varth - Operation Thunderstorm (World 920714)" , 0)      // "ETC"    12MHz verified
8821		GAME( 1992, varthr1,  varth,    cps1_12MHz, varth,    cps1,     ROT270, "Capcom", "Varth - Operation Thunderstorm (World 920612)" , 0)      // "ETC"
8822		GAME( 1992, varthu,   varth,    cps1_12MHz, varth,    cps1,     ROT270, "Capcom (Romstar license)", "Varth - Operation Thunderstorm (US 920612)", 0 )
8823		GAME( 1992, varthj,   varth,    cps1_12MHz, varth,    cps1,     ROT270, "Capcom", "Varth - Operation Thunderstorm (Japan 920714)", 0 )
8824		GAME( 1992, cworld2j, 0,        cps1_12MHz, cworld2j, cps1,     ROT0,   "Capcom", "Capcom World 2 (Japan 920611)", 0 )
8825		GAME( 1992, sf2hf,    sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Hyper Fighting (World 921209)", 0 )
8826		GAME( 1992, sf2t,     sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Hyper Fighting (US 921209)", 0 )
8827		GAME( 1992, sf2tj,    sf2ce,    cps1_12MHz, sf2j,     cps1,     ROT0,   "Capcom", "Street Fighter II' Turbo - Hyper Fighting (Japan 921209)", 0 )
8828		GAME( 1992, qad,      0,        cps1_12MHz, qad,      cps1,     ROT0,   "Capcom", "Quiz & Dragons (US 920701)", 0 )   // 12MHz verified
8829		GAME( 1994, qadj,     qad,      cps1_12MHz, qadj,     cps1,     ROT0,   "Capcom", "Quiz & Dragons (Japan 940921)", 0 )
8830		GAME( 1995, qtono2,   0,        cps1_12MHz, qtono2,   cps1,     ROT0,   "Capcom", "Quiz Tonosama no Yabou 2 Zenkoku-ban (Japan 950123)", 0 )
8831		GAME( 1995, megaman,  0,        cps1_12MHz, megaman,  cps1,     ROT0,   "Capcom", "Mega Man - The Power Battle (CPS1 Asia 951006)", 0 )
8832		GAME( 1995, rockmanj, megaman,  cps1_12MHz, rockmanj, cps1,     ROT0,   "Capcom", "Rockman - The Power Battle (CPS1 Japan 950922)", 0 )
8833		GAME( 1992, wof,      0,        qsound,     wof,      wof,      ROT0,   "Capcom", "Warriors of Fate (World 921002)" , 0)            // "ETC"
8834		GAME( 1992, wofa,     wof,      qsound,     wof,      wof,      ROT0,   "Capcom", "Sangokushi II (Asia 921005)" , 0)               // World "warning"
8835		GAME( 1992, wofu,     wof,      qsound,     wof,      wof,      ROT0,   "Capcom", "Warriors of Fate (US 921031)" , 0)               // World "warning"
8836		GAME( 1992, wofj,     wof,      qsound,     wof,      wof,      ROT0,   "Capcom", "Tenchi wo Kurau II - Sekiheki no Tatakai (Japan 921031)", 0 )
8837		GAME( 1999, wofhfh,   wof,      wofhfh,     wofhfh,   cps1,     ROT0,   "bootleg","Sangokushi II: Huo Fenghuang (Chinese bootleg)", 0 )
8838		GAME( 1993, dino,     0,        qsound,     dino,     dino,     ROT0,   "Capcom", "Cadillacs and Dinosaurs (World 930201)" , 0)         // "ETC"
8839		GAME( 1993, dinou,    dino,     qsound,     dino,     dino,     ROT0,   "Capcom", "Cadillacs and Dinosaurs (US 930201)", 0 )
8840		GAME( 1993, dinoj,    dino,     qsound,     dino,     dino,     ROT0,   "Capcom", "Cadillacs Kyouryuu-Shinseiki (Japan 930201)", 0 )
8841		GAME( 1993, dinopic,  dino,     cpspicb,    dinopic,  dino,     ROT0,   "bootleg", "Cadillacs and Dinosaurs (bootleg with PIC16c57, set 1)", GAME_NOT_WORKING )
8842		GAME( 1993, dinopic2, dino,     cpspicb,    dinopic,  dino,     ROT0,   "bootleg", "Cadillacs and Dinosaurs (bootleg with PIC16c57, set 2)", GAME_NOT_WORKING )
8843		GAME( 1993, punisher, 0,        qsound,     punisher, punisher, ROT0,   "Capcom", "The Punisher (World 930422)" , 0)               // "ETC"
8844		GAME( 1993, punisheru,punisher, qsound,     punisher, punisher, ROT0,   "Capcom", "The Punisher (US 930422)", 0 )
8845		GAME( 1993, punisherj,punisher, qsound,     punisher, punisher, ROT0,   "Capcom", "The Punisher (Japan 930422)", 0 )
8846		GAME( 1993, punipic,  punisher, cpspicb,    punipic,  punisher, ROT0,   "Capcom", "The Punisher (bootleg with PIC16c57, set 1)" , GAME_NOT_WORKING)
8847		GAME( 1993, punipic2, punisher, cpspicb,    punipic,  punisher, ROT0,   "Capcom", "The Punisher (bootleg with PIC16c57, set 2)" , GAME_NOT_WORKING)
8848		GAME( 1993, punipic3, punisher, cpspicb,    punipic,  punisher, ROT0,   "Capcom", "The Punisher (bootleg with PIC16c57, set 3)" , GAME_NOT_WORKING)
	8754	GAME( 1988, forgottn, 0,        cps1_10MHz, forgottn, forgottn, ROT0,   "Capcom", "Forgotten Worlds (World)", GAME_SUPPORTS_SAVE )
	8755	GAME( 1988, forgottnu,forgottn, cps1_10MHz, forgottn, forgottn, ROT0,   "Capcom", "Forgotten Worlds (US)", GAME_SUPPORTS_SAVE )
	8756	GAME( 1988, lostwrld, forgottn, cps1_10MHz, forgottn, forgottn, ROT0,   "Capcom", "Lost Worlds (Japan)", GAME_SUPPORTS_SAVE )
	8757	GAME( 1988, lostwrldo,forgottn, cps1_10MHz, forgottn, forgottn, ROT0,   "Capcom", "Lost Worlds (Japan Old Ver.)", GAME_SUPPORTS_SAVE )
	8758	GAME( 1988, ghouls,   0,        cps1_10MHz, ghouls,   cps1,     ROT0,   "Capcom", "Ghouls'n Ghosts (World)", GAME_SUPPORTS_SAVE )      // Wed.26.10.1988 in the ROMS
	8759	GAME( 1988, ghoulsu,  ghouls,   cps1_10MHz, ghoulsu,  cps1,     ROT0,   "Capcom", "Ghouls'n Ghosts (US)", GAME_SUPPORTS_SAVE )         // Wed.26.10.1988 in the ROMS
	8760	GAME( 1988, daimakai, ghouls,   cps1_10MHz, daimakai, cps1,     ROT0,   "Capcom", "Dai Makai-Mura (Japan)", GAME_SUPPORTS_SAVE )         // Wed.26.10.1988 in the ROMS
	8761	GAME( 1988, daimakair,ghouls,   cps1_10MHz, daimakai, cps1,     ROT0,   "Capcom", "Dai Makai-Mura (Japan Resale Ver.)", GAME_SUPPORTS_SAVE )   // still Wed.26.10.1988 in the ROMS...
	8762	GAME( 1989, strider,  0,        cps1_10MHz, strider,  cps1,     ROT0,   "Capcom", "Strider (US set 1)", GAME_SUPPORTS_SAVE )
	8763	GAME( 1989, striderua,strider,  cps1_10MHz, stridrua, cps1,     ROT0,   "Capcom", "Strider (US set 2)", GAME_SUPPORTS_SAVE )
	8764	GAME( 1989, striderj, strider,  cps1_10MHz, strider,  cps1,     ROT0,   "Capcom", "Strider Hiryu (Japan)", GAME_SUPPORTS_SAVE )
	8765	GAME( 1989, striderjr,strider,  cps1_10MHz, strider,  cps1,     ROT0,   "Capcom", "Strider Hiryu (Japan Resale Ver.)", GAME_SUPPORTS_SAVE )
	8766	GAME( 1989, dynwar,   0,        cps1_10MHz, dynwar,   cps1,     ROT0,   "Capcom", "Dynasty Wars (US set 1)", GAME_SUPPORTS_SAVE )      // (c) Capcom U.S.A.
	8767	GAME( 1989, dynwaru,  dynwar,   cps1_10MHz, dynwar,   cps1,     ROT0,   "Capcom", "Dynasty Wars (US set 2)", GAME_SUPPORTS_SAVE )      // (c) Capcom U.S.A.
	8768	GAME( 1989, dynwarj,  dynwar,   cps1_10MHz, dynwar,   cps1,     ROT0,   "Capcom", "Tenchi wo Kurau (Japan)", GAME_SUPPORTS_SAVE )
	8769	GAME( 1989, willow,   0,        cps1_10MHz, willow,   cps1,     ROT0,   "Capcom", "Willow (US)", GAME_SUPPORTS_SAVE )
	8770	GAME( 1989, willowj,  willow,   cps1_10MHz, willow,   cps1,     ROT0,   "Capcom", "Willow (Japan, Japanese)", GAME_SUPPORTS_SAVE )      // Japan "warning"
	8771	GAME( 1989, willowje, willow,   cps1_10MHz, willow,   cps1,     ROT0,   "Capcom", "Willow (Japan, English)", GAME_SUPPORTS_SAVE )      // (c) Capcom U.S.A. but Japan "warning"
	8772	GAME( 1989, unsquad,  0,        cps1_10MHz, unsquad,  cps1,     ROT0,   "Capcom", "U.N. Squadron (US)", GAME_SUPPORTS_SAVE )
	8773	GAME( 1989, area88,   unsquad,  cps1_10MHz, unsquad,  cps1,     ROT0,   "Capcom", "Area 88 (Japan)", GAME_SUPPORTS_SAVE )
	8774	GAME( 1989, ffight,   0,        cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (World)", GAME_SUPPORTS_SAVE )
	8775	GAME( 1989, ffightu,  ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (US)", GAME_SUPPORTS_SAVE )
	8776	GAME( 1989, ffightua, ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (US 900112)", GAME_SUPPORTS_SAVE )
	8777	GAME( 1989, ffightub, ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (US 900613)", GAME_SUPPORTS_SAVE )
	8778	GAME( 1989, ffightj,  ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (Japan)", GAME_SUPPORTS_SAVE )
	8779	GAME( 1989, ffightj1, ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (Japan 900305)", GAME_SUPPORTS_SAVE )
	8780	GAME( 1989, ffightj2, ffight,   cps1_10MHz, ffight,   cps1,     ROT0,   "Capcom", "Final Fight (Japan 900112)", GAME_SUPPORTS_SAVE )
	8781	GAME( 1990, 1941,     0,        cps1_10MHz, 1941,     cps1,     ROT270, "Capcom", "1941 - Counter Attack (World)", GAME_SUPPORTS_SAVE )
	8782	GAME( 1990, 1941j,    1941,     cps1_10MHz, 1941,     cps1,     ROT270, "Capcom", "1941 - Counter Attack (Japan)", GAME_SUPPORTS_SAVE )
	8783	GAME( 1990, mercs,    0,        cps1_10MHz, mercs,    cps1,     ROT270, "Capcom", "Mercs (World 900302)", GAME_SUPPORTS_SAVE )               // "ETC"
	8784	GAME( 1990, mercsu,   mercs,    cps1_10MHz, mercs,    cps1,     ROT270, "Capcom", "Mercs (US 900302)", GAME_SUPPORTS_SAVE )
	8785	GAME( 1990, mercsua,  mercs,    cps1_10MHz, mercs,    cps1,     ROT270, "Capcom", "Mercs (US 900608)", GAME_SUPPORTS_SAVE )
	8786	GAME( 1990, mercsj,   mercs,    cps1_10MHz, mercs,    cps1,     ROT270, "Capcom", "Senjou no Ookami II (Japan 900302)", GAME_SUPPORTS_SAVE )
	8787	GAME( 1990, mtwins,   0,        cps1_10MHz, mtwins,   cps1,     ROT0,   "Capcom", "Mega Twins (World 900619)", GAME_SUPPORTS_SAVE )            // "ETC" - (c) Capcom U.S.A. with World "warning"
	8788	GAME( 1990, chikij,   mtwins,   cps1_10MHz, mtwins,   cps1,     ROT0,   "Capcom", "Chiki Chiki Boys (Japan 900619)", GAME_SUPPORTS_SAVE )
	8789	GAME( 1990, msword,   0,        cps1_10MHz, msword,   cps1,     ROT0,   "Capcom", "Magic Sword - Heroic Fantasy (World 900725)", GAME_SUPPORTS_SAVE )   // 25.07.1990  "Other Country"
	8790	GAME( 1990, mswordr1, msword,   cps1_10MHz, msword,   cps1,     ROT0,   "Capcom", "Magic Sword - Heroic Fantasy (World 900623)", GAME_SUPPORTS_SAVE )   // 23.06.1990  "Other Country"
	8791	GAME( 1990, mswordu,  msword,   cps1_10MHz, msword,   cps1,     ROT0,   "Capcom", "Magic Sword - Heroic Fantasy (US 900725)", GAME_SUPPORTS_SAVE )      // 25.07.1990  "U.S.A."
	8792	GAME( 1990, mswordj,  msword,   cps1_10MHz, msword,   cps1,     ROT0,   "Capcom", "Magic Sword (Japan 900623)", GAME_SUPPORTS_SAVE )                  // 23.06.1990  "Japan"
	8793	GAME( 1990, cawing,   0,        cps1_10MHz, cawing,   cps1,     ROT0,   "Capcom", "Carrier Air Wing (World 901012)", GAME_SUPPORTS_SAVE )      // "ETC"
	8794	GAME( 1990, cawingr1, cawing,   cps1_10MHz, cawing,   cps1,     ROT0,   "Capcom", "Carrier Air Wing (World 901009)", GAME_SUPPORTS_SAVE )      // "ETC"
	8795	GAME( 1990, cawingu,  cawing,   cps1_10MHz, cawing,   cps1,     ROT0,   "Capcom", "Carrier Air Wing (US 901012)", GAME_SUPPORTS_SAVE )
	8796	GAME( 1990, cawingj,  cawing,   cps1_10MHz, cawing,   cps1,     ROT0,   "Capcom", "U.S. Navy (Japan 901012)", GAME_SUPPORTS_SAVE )
	8797	GAME( 1990, nemo,     0,        cps1_10MHz, nemo,     cps1,     ROT0,   "Capcom", "Nemo (World 901130)", GAME_SUPPORTS_SAVE )   // "ETC"
	8798	GAME( 1990, nemoj,    nemo,     cps1_10MHz, nemo,     cps1,     ROT0,   "Capcom", "Nemo (Japan 901120)", GAME_SUPPORTS_SAVE )
	8799	GAME( 1991, sf2,      0,        cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (World 910522)", GAME_SUPPORTS_SAVE )   // "ETC"
	8800	GAME( 1991, sf2eb,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (World 910214)", GAME_SUPPORTS_SAVE )   // "ETC"
	8801	GAME( 1992, sf2ebbl,  sf2,      cps1_10MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II - The World Warrior (World 910214, TAB Austria bootleg)", GAME_SUPPORTS_SAVE )
	8802	GAME( 1991, sf2ua,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910206)", GAME_SUPPORTS_SAVE )
	8803	GAME( 1991, sf2ub,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910214)", GAME_SUPPORTS_SAVE )
	8804	GAME( 1991, sf2ud,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910318)", GAME_SUPPORTS_SAVE )
	8805	GAME( 1991, sf2ue,    sf2,      cps1_10MHz, sf2,      sf2ue,    ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910228)", GAME_SUPPORTS_SAVE )
	8806	GAME( 1991, sf2uf,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910411)", GAME_SUPPORTS_SAVE )
	8807	GAME( 1991, sf2ui,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 910522)", GAME_SUPPORTS_SAVE )
	8808	GAME( 1991, sf2uk,    sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (US 911101)", GAME_SUPPORTS_SAVE )
	8809	GAME( 1991, sf2j,     sf2,      cps1_10MHz, sf2j,     cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (Japan 911210)", GAME_SUPPORTS_SAVE )
	8810	GAME( 1991, sf2ja,    sf2,      cps1_10MHz, sf2j,     cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (Japan 910214)", GAME_SUPPORTS_SAVE )
	8811	GAME( 1991, sf2jc,    sf2,      cps1_10MHz, sf2j,     cps1,     ROT0,   "Capcom", "Street Fighter II - The World Warrior (Japan 910306)", GAME_SUPPORTS_SAVE )
	8812	GAME( 1991, sf2qp1,   sf2,      cps1_10MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II - The World Warrior (Quicken Pt-I, bootleg)", GAME_SUPPORTS_SAVE )   // 910214
	8813	GAME( 1991, 3wonders, 0,        cps1_10MHz, 3wonders, cps1,     ROT0,   "Capcom", "Three Wonders (World 910520)", GAME_SUPPORTS_SAVE )      // "ETC"
	8814	GAME( 1991, 3wondersu,3wonders, cps1_10MHz, 3wonders, cps1,     ROT0,   "Capcom", "Three Wonders (US 910520)", GAME_SUPPORTS_SAVE )
	8815	GAME( 1991, wonder3,  3wonders, cps1_10MHz, 3wonders, cps1,     ROT0,   "Capcom", "Wonder 3 (Japan 910520)", GAME_SUPPORTS_SAVE )
	8816	GAME( 1991, 3wondersh,3wonders, cps1_10MHz, 3wonders, cps1,     ROT0,   "bootleg","Three Wonders (hack?)", GAME_SUPPORTS_SAVE )
	8817	GAME( 1991, kod,      0,        cps1_10MHz, kod,      cps1,     ROT0,   "Capcom", "The King of Dragons (World 910711)", GAME_SUPPORTS_SAVE )   // "ETC"
	8818	GAME( 1991, kodu,     kod,      cps1_10MHz, kodj,     cps1,     ROT0,   "Capcom", "The King of Dragons (US 910910)", GAME_SUPPORTS_SAVE )
	8819	GAME( 1991, kodj,     kod,      cps1_10MHz, kodj,     cps1,     ROT0,   "Capcom", "The King of Dragons (Japan 910805)", GAME_SUPPORTS_SAVE )
	8820	GAME( 1991, captcomm, 0,        cps1_10MHz, captcomm, cps1,     ROT0,   "Capcom", "Captain Commando (World 911014)", GAME_SUPPORTS_SAVE )   // "OTHER COUNTRY"
	8821	GAME( 1991, captcommu,captcomm, cps1_10MHz, captcomm, cps1,     ROT0,   "Capcom", "Captain Commando (US 910928)", GAME_SUPPORTS_SAVE )
	8822	GAME( 1991, captcommj,captcomm, cps1_10MHz, captcomm, cps1,     ROT0,   "Capcom", "Captain Commando (Japan 911202)", GAME_SUPPORTS_SAVE )
	8823	GAME( 1991, captcommb,captcomm, cps1_10MHz, captcomm, cps1,     ROT0,   "bootleg","Captain Commando (bootleg)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	8824	GAME( 1991, knights,  0,        cps1_10MHz, knights,  cps1,     ROT0,   "Capcom", "Knights of the Round (World 911127)", GAME_SUPPORTS_SAVE )      // "ETC"
	8825	GAME( 1991, knightsu, knights,  cps1_10MHz, knights,  cps1,     ROT0,   "Capcom", "Knights of the Round (US 911127)", GAME_SUPPORTS_SAVE )
	8826	GAME( 1991, knightsj, knights,  cps1_10MHz, knights,  cps1,     ROT0,   "Capcom", "Knights of the Round (Japan 911127)", GAME_SUPPORTS_SAVE )
	8827	GAME( 1991, knightsb, knights,  knightsb,   knights,  cps1,     ROT0,   "bootleg", "Knights of the Round (World 911127, bootleg)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	8828	GAME( 1992, sf2ce,    0,        cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (World 920313)", GAME_SUPPORTS_SAVE )   // "ETC"
	8829	GAME( 1992, sf2ceua,  sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (US 920313)", GAME_SUPPORTS_SAVE )
	8830	GAME( 1992, sf2ceub,  sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (US 920513)", GAME_SUPPORTS_SAVE )
	8831	GAME( 1992, sf2ceuc,  sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (US 920803)", GAME_SUPPORTS_SAVE )
	8832	GAME( 1992, sf2cej,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Champion Edition (Japan 920513)", GAME_SUPPORTS_SAVE )
	8833	GAME( 1992, sf2rb,    sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Rainbow set 1, bootleg)", GAME_SUPPORTS_SAVE )   // 920322 - based on World version
	8834	GAME( 1992, sf2rb2,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Rainbow set 2, bootleg)", GAME_SUPPORTS_SAVE )   // 920322 - based on World version
	8835	GAME( 1992, sf2rb3,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Rainbow set 3, bootleg)", GAME_SUPPORTS_SAVE )
	8836	GAME( 1992, sf2red,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Red Wave, bootleg)", GAME_SUPPORTS_SAVE )      // 920313 - based on World version
	8837	GAME( 1992, sf2v004,  sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II! - Champion Edition (V004, bootleg)", GAME_SUPPORTS_SAVE )         // "102092" !!! - based on (heavily modified) World version
	8838	GAME( 1992, sf2acc,   sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Accelerator!, bootleg)", GAME_SUPPORTS_SAVE )  // 920313 - based on USA version
	8839	GAME( 1992, sf2accp2, sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Accelerator Pt.II, bootleg)", GAME_SUPPORTS_SAVE )  // 920313 - based on USA version
	8840	GAME( 1992, sf2dkot2, sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (Double K.O. Turbo II, bootleg)", GAME_SUPPORTS_SAVE )  // 902140 - ???
	8841	GAME( 1992, sf2m1,    sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (M1, bootleg)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	8842	GAME( 1992, sf2m2,    sf2ce,    cps1_12MHz, sf2m2,    sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M2, bootleg)", GAME_SUPPORTS_SAVE )
	8843	GAME( 1992, sf2m3,    sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "bootleg","Street Fighter II' - Champion Edition (M3, bootleg)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	8844	GAME( 1992, sf2m4,    sf2ce,    cps1_12MHz, sf2m4,    sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M4, bootleg)", GAME_SUPPORTS_SAVE )
	8845	GAME( 1992, sf2m5,    sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M5, bootleg)", GAME_SUPPORTS_SAVE )
	8846	GAME( 1992, sf2m6,    sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M6, bootleg)", GAME_SUPPORTS_SAVE )
	8847	GAME( 1992, sf2m7,    sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (M7, bootleg)", GAME_SUPPORTS_SAVE )
	8848	GAME( 1992, sf2yyc,   sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (YYC, bootleg)", GAME_SUPPORTS_SAVE )
	8849	GAME( 1992, sf2koryu, sf2ce,    cps1_12MHz, sf2hack,  sf2hack,  ROT0,   "bootleg","Street Fighter II' - Champion Edition (Xiang Long, Chinese bootleg)", GAME_SUPPORTS_SAVE )
	8850	GAME( 1992, sf2mdt,   sf2ce,    sf2mdt,     sf2hack,  sf2mdt,   ROT0,   "bootleg","Street Fighter II' - Champion Edition (Magic Delta Turbo, bootleg)", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_SUPPORTS_SAVE ); // heavily modified, different sound & gfx hardware
	8851	GAME( 1992, varth,    0,        cps1_12MHz, varth,    cps1,     ROT270, "Capcom", "Varth - Operation Thunderstorm (World 920714)", GAME_SUPPORTS_SAVE )      // "ETC"    12MHz verified
	8852	GAME( 1992, varthr1,  varth,    cps1_12MHz, varth,    cps1,     ROT270, "Capcom", "Varth - Operation Thunderstorm (World 920612)", GAME_SUPPORTS_SAVE )      // "ETC"
	8853	GAME( 1992, varthu,   varth,    cps1_12MHz, varth,    cps1,     ROT270, "Capcom (Romstar license)", "Varth - Operation Thunderstorm (US 920612)", GAME_SUPPORTS_SAVE )
	8854	GAME( 1992, varthj,   varth,    cps1_12MHz, varth,    cps1,     ROT270, "Capcom", "Varth - Operation Thunderstorm (Japan 920714)", GAME_SUPPORTS_SAVE )
	8855	GAME( 1992, cworld2j, 0,        cps1_12MHz, cworld2j, cps1,     ROT0,   "Capcom", "Capcom World 2 (Japan 920611)", GAME_SUPPORTS_SAVE )
	8856	GAME( 1992, sf2hf,    sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Hyper Fighting (World 921209)", GAME_SUPPORTS_SAVE )
	8857	GAME( 1992, sf2t,     sf2ce,    cps1_12MHz, sf2,      cps1,     ROT0,   "Capcom", "Street Fighter II' - Hyper Fighting (US 921209)", GAME_SUPPORTS_SAVE )
	8858	GAME( 1992, sf2tj,    sf2ce,    cps1_12MHz, sf2j,     cps1,     ROT0,   "Capcom", "Street Fighter II' Turbo - Hyper Fighting (Japan 921209)", GAME_SUPPORTS_SAVE )
	8859	GAME( 1992, qad,      0,        cps1_12MHz, qad,      cps1,     ROT0,   "Capcom", "Quiz & Dragons (US 920701)", GAME_SUPPORTS_SAVE )   // 12MHz verified
	8860	GAME( 1994, qadj,     qad,      cps1_12MHz, qadj,     cps1,     ROT0,   "Capcom", "Quiz & Dragons (Japan 940921)", GAME_SUPPORTS_SAVE )
	8861	GAME( 1995, qtono2,   0,        cps1_12MHz, qtono2,   cps1,     ROT0,   "Capcom", "Quiz Tonosama no Yabou 2 Zenkoku-ban (Japan 950123)", GAME_SUPPORTS_SAVE )
	8862	GAME( 1995, megaman,  0,        cps1_12MHz, megaman,  cps1,     ROT0,   "Capcom", "Mega Man - The Power Battle (CPS1 Asia 951006)", GAME_SUPPORTS_SAVE )
	8863	GAME( 1995, rockmanj, megaman,  cps1_12MHz, rockmanj, cps1,     ROT0,   "Capcom", "Rockman - The Power Battle (CPS1 Japan 950922)", GAME_SUPPORTS_SAVE )
	8864	GAME( 1992, wof,      0,        qsound,     wof,      wof,      ROT0,   "Capcom", "Warriors of Fate (World 921002)", GAME_SUPPORTS_SAVE )      // "ETC"
	8865	GAME( 1992, wofa,     wof,      qsound,     wof,      wof,      ROT0,   "Capcom", "Sangokushi II (Asia 921005)", GAME_SUPPORTS_SAVE )      // World "warning"
	8866	GAME( 1992, wofu,     wof,      qsound,     wof,      wof,      ROT0,   "Capcom", "Warriors of Fate (US 921031)", GAME_SUPPORTS_SAVE )      // World "warning"
	8867	GAME( 1992, wofj,     wof,      qsound,     wof,      wof,      ROT0,   "Capcom", "Tenchi wo Kurau II - Sekiheki no Tatakai (Japan 921031)", GAME_SUPPORTS_SAVE )
	8868	GAME( 1999, wofhfh,   wof,      wofhfh,     wofhfh,   cps1,     ROT0,   "bootleg","Sangokushi II: Huo Fenghuang (Chinese bootleg)", GAME_SUPPORTS_SAVE )
	8869	GAME( 1993, dino,     0,        qsound,     dino,     dino,     ROT0,   "Capcom", "Cadillacs and Dinosaurs (World 930201)", GAME_SUPPORTS_SAVE )      // "ETC"
	8870	GAME( 1993, dinou,    dino,     qsound,     dino,     dino,     ROT0,   "Capcom", "Cadillacs and Dinosaurs (US 930201)", GAME_SUPPORTS_SAVE )
	8871	GAME( 1993, dinoj,    dino,     qsound,     dino,     dino,     ROT0,   "Capcom", "Cadillacs Kyouryuu-Shinseiki (Japan 930201)", GAME_SUPPORTS_SAVE )
	8872	GAME( 1993, dinopic,  dino,     cpspicb,    dinopic,  dino,     ROT0,   "bootleg", "Cadillacs and Dinosaurs (bootleg with PIC16c57, set 1)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	8873	GAME( 1993, dinopic2, dino,     cpspicb,    dinopic,  dino,     ROT0,   "bootleg", "Cadillacs and Dinosaurs (bootleg with PIC16c57, set 2)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	8874	GAME( 1993, punisher, 0,        qsound,     punisher, punisher, ROT0,   "Capcom", "The Punisher (World 930422)", GAME_SUPPORTS_SAVE )      // "ETC"
	8875	GAME( 1993, punisheru,punisher, qsound,     punisher, punisher, ROT0,   "Capcom", "The Punisher (US 930422)", GAME_SUPPORTS_SAVE )
	8876	GAME( 1993, punisherj,punisher, qsound,     punisher, punisher, ROT0,   "Capcom", "The Punisher (Japan 930422)", GAME_SUPPORTS_SAVE )
	8877	GAME( 1993, punipic,  punisher, cpspicb,    punipic,  punisher, ROT0,   "Capcom", "The Punisher (bootleg with PIC16c57, set 1)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	8878	GAME( 1993, punipic2, punisher, cpspicb,    punipic,  punisher, ROT0,   "Capcom", "The Punisher (bootleg with PIC16c57, set 2)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
	8879	GAME( 1993, punipic3, punisher, cpspicb,    punipic,  punisher, ROT0,   "Capcom", "The Punisher (bootleg with PIC16c57, set 3)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
8849	8880
8850		GAME( 1993, slammast, 0,        qsound,     slammast, slammast, ROT0,   "Capcom", "Saturday Night Slam Masters (World 930713)" , 0)      // "ETC"
8851		GAME( 1993, slammastu,slammast, qsound,     slammast, slammast, ROT0,   "Capcom", "Saturday Night Slam Masters (US 930713)", 0 )
8852		GAME( 1993, mbomberj, slammast, qsound,     slammast, slammast, ROT0,   "Capcom", "Muscle Bomber - The Body Explosion (Japan 930713)", 0 )
8853		GAME( 1993, mbombrd,  0,        qsound,     slammast, slammast, ROT0,   "Capcom", "Muscle Bomber Duo - Ultimate Team Battle (World 931206)" , 0)  // "ETC"
8854		GAME( 1993, mbombrdj, mbombrd,  qsound,     slammast, slammast, ROT0,   "Capcom", "Muscle Bomber Duo - Heat Up Warriors (Japan 931206)", 0 )
	8881	GAME( 1993, slammast, 0,        qsound,     slammast, slammast, ROT0,   "Capcom", "Saturday Night Slam Masters (World 930713)", GAME_SUPPORTS_SAVE )      // "ETC"
	8882	GAME( 1993, slammastu,slammast, qsound,     slammast, slammast, ROT0,   "Capcom", "Saturday Night Slam Masters (US 930713)", GAME_SUPPORTS_SAVE )
	8883	GAME( 1993, mbomberj, slammast, qsound,     slammast, slammast, ROT0,   "Capcom", "Muscle Bomber - The Body Explosion (Japan 930713)", GAME_SUPPORTS_SAVE )
	8884	GAME( 1993, mbombrd,  0,        qsound,     slammast, slammast, ROT0,   "Capcom", "Muscle Bomber Duo - Ultimate Team Battle (World 931206)", GAME_SUPPORTS_SAVE )  // "ETC"
	8885	GAME( 1993, mbombrdj, mbombrd,  qsound,     slammast, slammast, ROT0,   "Capcom", "Muscle Bomber Duo - Heat Up Warriors (Japan 931206)", GAME_SUPPORTS_SAVE )
8855	8886
8856		GAME( 1994, pnickj,   0,        cps1_12MHz, pnickj,   cps1,     ROT0,   "Compile (Capcom license)", "Pnickies (Japan 940608)", 0 )
	8887	GAME( 1994, pnickj,   0,        cps1_12MHz, pnickj,   cps1,     ROT0,   "Compile (Capcom license)", "Pnickies (Japan 940608)", GAME_SUPPORTS_SAVE )
8857	8888	/* Japanese version of Pang 3 is encrypted, Euro version is not */
8858		GAME( 1995, pang3,    0,        pang3,      pang3,    pang3,    ROT0,   "Mitchell", "Pang! 3 (Euro 950511)", 0 )
8859		GAME( 1995, pang3j,   pang3,    pang3,      pang3,    pang3j,   ROT0,   "Mitchell", "Pang! 3 (Japan 950511)", 0 )
	8889	GAME( 1995, pang3,    0,        pang3,      pang3,    pang3,    ROT0,   "Mitchell", "Pang! 3 (Euro 950511)", GAME_SUPPORTS_SAVE )
	8890	GAME( 1995, pang3j,   pang3,    pang3,      pang3,    pang3j,   ROT0,   "Mitchell", "Pang! 3 (Japan 950511)", GAME_SUPPORTS_SAVE )

src/mame/drivers/yunsun16.c

r6740	r6741
86	86	***************************************************************************/
87	87
88	88	#include "driver.h"
89		#include "yunsun16.h"
	89	#include "includes/yunsun16.h"
90	90	#include "cpu/z80/z80.h"
91	91	#include "cpu/m68000/m68000.h"
92	92	#include "sound/okim6295.h"

src/mame/drivers/scobra.c

r6740	r6741
35	35	#include "driver.h"
36	36	#include "cpu/z80/z80.h"
37	37	#include "machine/8255ppi.h"
38		#include "galaxold.h"
	38	#include "machine/7474.h"
	39	#include "includes/galaxold.h"
39	40	#include "sound/ay8910.h"
40	41
41	42	static const gfx_layout scobra_charlayout =
r6740	r6741
859	860	MDRV_CPU_PROGRAM_MAP(scobra_sound_map)
860	861	MDRV_CPU_IO_MAP(scobra_sound_io_map)
861	862
	863	MDRV_7474_ADD("konami_7474", scramble_sh_7474_callback)
	864
862	865	MDRV_MACHINE_RESET(scramble)
863	866
864	867	MDRV_PPI8255_ADD( "ppi8255_0", scramble_ppi_0_intf )
865	868	MDRV_PPI8255_ADD( "ppi8255_1", scramble_ppi_1_intf )
866	869
	870	MDRV_7474_ADD("7474_9m_1", galaxold_7474_9m_1_callback)
	871	MDRV_7474_ADD("7474_9m_2", galaxold_7474_9m_2_callback)
	872
	873	MDRV_TIMER_ADD("int_timer", galaxold_interrupt_timer)
	874
867	875	/* video hardware */
868	876	MDRV_SCREEN_ADD("screen", RASTER)
869	877	MDRV_SCREEN_REFRESH_RATE(16000.0/132/2)
r6740	r6741
983	991	MDRV_CPU_PROGRAM_MAP(hustler_sound_map)
984	992	MDRV_CPU_IO_MAP(hustler_sound_io_map)
985	993
	994	MDRV_7474_ADD("konami_7474", scramble_sh_7474_callback)
	995
986	996	MDRV_MACHINE_RESET(scramble)
987	997
	998	MDRV_7474_ADD("7474_9m_1", galaxold_7474_9m_1_callback)
	999	MDRV_7474_ADD("7474_9m_2", galaxold_7474_9m_2_callback)
	1000
	1001	MDRV_TIMER_ADD("int_timer", galaxold_interrupt_timer)
	1002
988	1003	/* device config overrides */
989	1004	MDRV_PPI8255_ADD( "ppi8255_0", scramble_ppi_0_intf )
990	1005	MDRV_PPI8255_ADD( "ppi8255_1", scramble_ppi_1_intf )

src/mame/drivers/wiz.c

r6740	r6741
239	239	AM_RANGE(0xd840, 0xd85f) AM_BASE_GENERIC(spriteram2) AM_SIZE_GENERIC(spriteram)
240	240	AM_RANGE(0xd000, 0xd85f) AM_RAM
241	241	AM_RANGE(0xe000, 0xe3ff) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)   /* Fallthrough */
242		AM_RANGE(0xe400, 0xe7ff) AM_BASE_GENERIC(colorram)
	242	AM_RANGE(0xe400, 0xe7ff) AM_RAM
243	243	AM_RANGE(0xe800, 0xe83f) AM_BASE(&wiz_attributesram)
244	244	AM_RANGE(0xe840, 0xe85f) AM_BASE_GENERIC(spriteram)
245	245	AM_RANGE(0xe000, 0xe85f) AM_RAM

src/mame/drivers/stactics.c

r6740	r6741
42	42
43	43	#include "driver.h"
44	44	#include "cpu/i8085/i8085.h"
45		#include "stactics.h"
	45	#include "includes/stactics.h"
46	46	#include "stactics.lh"
47	47
48	48

src/mame/drivers/lethalj.c

r6740	r6741
140	140
141	141	#include "driver.h"
142	142	#include "cpu/tms34010/tms34010.h"
143		#include "lethalj.h"
	143	#include "includes/lethalj.h"
144	144	#include "machine/ticket.h"
145	145	#include "sound/okim6295.h"
146	146
r6740	r6741
159	159	*
160	160	*************************************/
161	161
162		static CUSTOM_INPUT( ticket_status )
163		{
164		const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
165		return ticket_dispenser_0_r(space, 0) >> 7;
166		}
167
168
169	162	static CUSTOM_INPUT( cclownz_paddle )
170	163	{
171	164	int value = input_port_read(field->port->machine, "PADDLE");
r6740	r6741
183	176	static WRITE16_HANDLER( ripribit_control_w )
184	177	{
185	178	coin_counter_w(space->machine, 0, data & 1);
186		ticket_dispenser_0_w(space, 0, ((data >> 1) & 1) << 7);
	179	ticket_dispenser_w(devtag_get_device(space->machine, "ticket"), 0, ((data >> 1) & 1) << 7);
187	180	output_set_lamp_value(0, (data >> 2) & 1);
188	181	}
189	182
190	183
191	184	static WRITE16_HANDLER( cfarm_control_w )
192	185	{
193		ticket_dispenser_0_w(space, 0, ((data >> 0) & 1) << 7);
	186	ticket_dispenser_w(devtag_get_device(space->machine, "ticket"), 0, ((data >> 0) & 1) << 7);
194	187	output_set_lamp_value(0, (data >> 2) & 1);
195	188	output_set_lamp_value(1, (data >> 3) & 1);
196	189	output_set_lamp_value(2, (data >> 4) & 1);
r6740	r6741
200	193
201	194	static WRITE16_HANDLER( cclownz_control_w )
202	195	{
203		ticket_dispenser_0_w(space, 0, ((data >> 0) & 1) << 7);
	196	ticket_dispenser_w(devtag_get_device(space->machine, "ticket"), 0, ((data >> 0) & 1) << 7);
204	197	output_set_lamp_value(0, (data >> 2) & 1);
205	198	output_set_lamp_value(1, (data >> 4) & 1);
206	199	output_set_lamp_value(2, (data >> 5) & 1);
r6740	r6741
411	404	PORT_START("IN0")
412	405	PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED )
413	406	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
414		PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(ticket_status, NULL)
	407	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)
415	408	PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED )
416	409
417	410	PORT_START("IN1")
r6740	r6741
498	491	PORT_DIPSETTING(      0x0000, "10" )
499	492
500	493	PORT_START("IN1")
501		PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(ticket_status, NULL)
	494	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)
502	495	PORT_BIT( 0x0006, IP_ACTIVE_LOW, IPT_UNUSED )
503	496	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
504	497	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
r6740	r6741
549	542
550	543	PORT_START("IN1")
551	544	PORT_BIT( 0x0f0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(cclownz_paddle, NULL)
552		PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(ticket_status, NULL)
	545	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)
553	546	PORT_BIT( 0x0060, IP_ACTIVE_LOW, IPT_UNUSED )
554	547	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
555	548	PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
r6740	r6741
605	598	MDRV_CPU_CONFIG(tms_config)
606	599	MDRV_CPU_PROGRAM_MAP(lethalj_map)
607	600
	601	MDRV_TICKET_DISPENSER_ADD("ticket", 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
	602
608	603	/* video hardware */
609	604	MDRV_SCREEN_ADD("screen", RASTER)
610	605	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
r6740	r6741
906	901
907	902	static DRIVER_INIT( ripribit )
908	903	{
909		ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH);
910	904	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, ripribit_control_w);
911	905	}
912	906
913	907
914	908	static DRIVER_INIT( cfarm )
915	909	{
916		ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH);
917	910	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, cfarm_control_w);
918	911	}
919	912
920	913
921	914	static DRIVER_INIT( cclownz )
922	915	{
923		ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH);
924	916	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, cclownz_control_w);
925	917	}
926	918

src/mame/drivers/itech8.c

r6740	r6741
504	504	#include "machine/ticket.h"
505	505	#include "video/tms34061.h"
506	506	#include "video/tlc34076.h"
507		#include "itech8.h"
	507	#include "includes/itech8.h"
508	508	#include "sound/2203intf.h"
509	509	#include "sound/2608intf.h"
510	510	#include "sound/3812intf.h"
r6740	r6741
552	552	static const pia6821_interface pia_interface =
553	553	{
554	554	DEVCB_NULL,      /* port A in */
555		DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, ticket_dispenser_r),   /* port B in */
	555	DEVCB_DEVICE_LINE("ticket", ticket_dispenser_line_r),         /* port B in */
556	556	DEVCB_NULL,      /* line CA1 in */
557	557	DEVCB_NULL,      /* line CB1 in */
558	558	DEVCB_NULL,      /* line CA2 in */
r6740	r6741
680	680	device_reset(cputag_get_cpu(machine, "maincpu"));
681	681	}
682	682
683		/* reset the ticket dispenser */
684		ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);
685
686	683	/* reset the palette chip */
687	684	tlc34076_reset(6);
688	685
r6740	r6741
779	776	/* bit 5 controls the coin counter */
780	777	/* bit 6 controls the diagnostic sound LED */
781	778	pia_portb_data = data;
782		ticket_dispenser_w(space, 0, (data & 0x10) << 3);
	779	ticket_dispenser_w(devtag_get_device(space->machine, "ticket"), 0, (data & 0x10) << 3);
783	780	coin_counter_w(space->machine, 0, (data & 0x20) >> 5);
784	781	}
785	782
r6740	r6741
793	790	/* bit 6 controls the diagnostic sound LED */
794	791	/* bit 7 controls the ticket dispenser */
795	792	pia_portb_data = data;
796		ticket_dispenser_w(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0, data & 0x80);
	793	ticket_dispenser_w(devtag_get_device(device->machine, "ticket"), 0, data & 0x80);
797	794	coin_counter_w(device->machine, 0, (data & 0x20) >> 5);
798	795	}
799	796
r6740	r6741
1730	1727	MDRV_MACHINE_RESET(itech8)
1731	1728	MDRV_NVRAM_HANDLER(itech8)
1732	1729
	1730	MDRV_TICKET_DISPENSER_ADD("ticket", 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW)
	1731
1733	1732	/* video hardware */
1734	1733	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1735	1734	MDRV_VIDEO_START(itech8)

src/mame/drivers/galaxian.c

r6740	r6741
229	229	#include "driver.h"
230	230	#include "cpu/z80/z80.h"
231	231	#include "cpu/s2650/s2650.h"
232		#include "galaxian.h"
	232	#include "includes/galaxian.h"
233	233	#include "machine/8255ppi.h"
234	234	#include "sound/ay8910.h"
235	235	#include "sound/sn76496.h"

src/mame/drivers/arcadecl.c

r6740	r6741
68	68
69	69	#include "driver.h"
70	70	#include "cpu/m68000/m68000.h"
71		#include "arcadecl.h"
	71	#include "includes/arcadecl.h"
72	72	#include "sound/okim6295.h"
73	73
74	74
r6740	r6741
103	103	*
104	104	*************************************/
105	105
	106	static MACHINE_START( arcadecl )
	107	{
	108	atarigen_init(machine);
	109	}
	110
	111
106	112	static MACHINE_RESET( arcadecl )
107	113	{
108	114	rampart_state *state = (rampart_state *)machine->driver_data;
r6740	r6741
324	330	MDRV_CPU_PROGRAM_MAP(main_map)
325	331	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
326	332
	333	MDRV_MACHINE_START(arcadecl)
327	334	MDRV_MACHINE_RESET(arcadecl)
328	335	MDRV_NVRAM_HANDLER(atarigen)
329	336

src/mame/drivers/suprslam.c

r6740	r6741
83	83	#include "driver.h"
84	84	#include "cpu/z80/z80.h"
85	85	#include "cpu/m68000/m68000.h"
86		#include "video/konamiic.h"
	86	#include "video/konicdev.h"
87	87	#include "sound/2610intf.h"
	88	#include "includes/suprslam.h"
88	89
89	90
90		extern UINT16 *suprslam_screen_videoram, *suprslam_bg_videoram,*suprslam_sp_videoram, *suprslam_spriteram;
91
92		/* in video */
93
94		WRITE16_HANDLER( suprslam_screen_videoram_w );
95		WRITE16_HANDLER( suprslam_bg_videoram_w );
96		VIDEO_START( suprslam );
97		VIDEO_UPDATE( suprslam );
98		WRITE16_HANDLER (suprslam_bank_w);
99
100
101	91	/*** SOUND *******************************************************************/
102	92
103		static int pending_command;
104
105	93	static WRITE16_HANDLER( sound_command_w )
106	94	{
	95	suprslam_state *state = (suprslam_state *)space->machine->driver_data;
107	96	if (ACCESSING_BITS_0_7)
108	97	{
109		pending_command = 1;
	98	state->pending_command = 1;
110	99	soundlatch_w(space, offset, data & 0xff);
111		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
	100	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE);
112	101	}
113	102	}
114	103
115	104	#if 0
116	105	static READ16_HANDLER( pending_command_r )
117	106	{
	107	suprslam_state *state = (suprslam_state *)space->machine->driver_data;
118	108	return pending_command;
119	109	}
120	110	#endif
121	111
122	112	static WRITE8_HANDLER( pending_command_clear_w )
123	113	{
124		pending_command = 0;
	114	suprslam_state *state = (suprslam_state *)space->machine->driver_data;
	115	state->pending_command = 0;
125	116	}
126	117
127	118	static WRITE8_HANDLER( suprslam_sh_bankswitch_w )
r6740	r6741
137	128
138	129	static ADDRESS_MAP_START( suprslam_map, ADDRESS_SPACE_PROGRAM, 16 )
139	130	AM_RANGE(0x000000, 0x0fffff) AM_ROM
140		AM_RANGE(0xfb0000, 0xfb1fff) AM_RAM AM_BASE(&suprslam_spriteram)
141		AM_RANGE(0xfc0000, 0xfcffff) AM_RAM AM_BASE(&suprslam_sp_videoram)
	131	AM_RANGE(0xfb0000, 0xfb1fff) AM_RAM AM_BASE_MEMBER(suprslam_state, spriteram)
	132	AM_RANGE(0xfc0000, 0xfcffff) AM_RAM AM_BASE_MEMBER(suprslam_state, sp_videoram)
142	133	AM_RANGE(0xfd0000, 0xfdffff) AM_RAM
143		AM_RANGE(0xfe0000, 0xfe0fff) AM_RAM_WRITE(suprslam_screen_videoram_w) AM_BASE(&suprslam_screen_videoram)
144		AM_RANGE(0xff0000, 0xff1fff) AM_RAM_WRITE(suprslam_bg_videoram_w) AM_BASE(&suprslam_bg_videoram)
145		//  AM_RANGE(0xff2000, 0xff203f) AM_RAM /* ?? */
146		AM_RANGE(0xff8000, 0xff8fff) AM_RAM AM_BASE(&K053936_0_linectrl)
	134	AM_RANGE(0xfe0000, 0xfe0fff) AM_RAM_WRITE(suprslam_screen_videoram_w) AM_BASE_MEMBER(suprslam_state, screen_videoram)
	135	AM_RANGE(0xff0000, 0xff1fff) AM_RAM_WRITE(suprslam_bg_videoram_w) AM_BASE_MEMBER(suprslam_state, bg_videoram)
	136	AM_RANGE(0xff2000, 0xff203f) AM_RAM AM_BASE_MEMBER(suprslam_state,screen_vregs)
	137	//  AM_RANGE(0xff3000, 0xff3001) AM_WRITENOP // sprite buffer trigger?
	138	AM_RANGE(0xff8000, 0xff8fff) AM_DEVREADWRITE("k053936", k053936_linectrl_r, k053936_linectrl_w)
147	139	AM_RANGE(0xff9000, 0xff9001) AM_WRITE(sound_command_w)
148	140	AM_RANGE(0xffa000, 0xffafff) AM_RAM_WRITE(paletteram16_xGGGGGBBBBBRRRRR_word_w) AM_BASE_GENERIC(paletteram)
149		AM_RANGE(0xffd000, 0xffd01f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
	141	AM_RANGE(0xffd000, 0xffd01f) AM_DEVWRITE("k053936", k053936_ctrl_w)
150	142	AM_RANGE(0xffe000, 0xffe001) AM_WRITE(suprslam_bank_w)
151	143	AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("P1")
152	144	AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("P2")
153	145	AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("SYSTEM")
154	146	AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW1")
155	147	AM_RANGE(0xfff008, 0xfff009) AM_READ_PORT("DSW2")
	148	AM_RANGE(0xfff00c, 0xfff00d) AM_WRITEONLY AM_BASE_MEMBER(suprslam_state, spr_ctrl)
156	149	ADDRESS_MAP_END
157	150
158	151	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
287	280
288	281	static void irqhandler(const device_config *device, int irq)
289	282	{
290		cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
	283	suprslam_state *state = (suprslam_state *)device->machine->driver_data;
	284	cpu_set_input_line(state->audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE);
291	285	}
292	286
293	287	static const ym2610_interface ym2610_config =
r6740	r6741
297	291
298	292	/*** MACHINE DRIVER **********************************************************/
299	293
	294	static const k053936_interface suprslam_k053936_intf =
	295	{
	296	1, -45, -21   /* wrap, xoff, yoff */
	297	};
	298
	299	static MACHINE_START( suprslam )
	300	{
	301	suprslam_state *state = (suprslam_state *)machine->driver_data;
	302
	303	state->audiocpu = devtag_get_device(machine, "audiocpu");
	304	state->k053936 = devtag_get_device(machine, "k053936");
	305
	306	state_save_register_global(machine, state->screen_bank);
	307	state_save_register_global(machine, state->bg_bank);
	308	state_save_register_global(machine, state->pending_command);
	309	}
	310
	311	static MACHINE_RESET( suprslam )
	312	{
	313	suprslam_state *state = (suprslam_state *)machine->driver_data;
	314
	315	state->screen_bank = 0;
	316	state->bg_bank = 0;
	317	state->pending_command = 0;
	318	}
	319
300	320	static MACHINE_DRIVER_START( suprslam )
	321	MDRV_DRIVER_DATA(suprslam_state)
	322
301	323	MDRV_CPU_ADD("maincpu", M68000, 16000000)
302	324	MDRV_CPU_PROGRAM_MAP(suprslam_map)
303	325	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
r6740	r6741
306	328	MDRV_CPU_PROGRAM_MAP(sound_map)
307	329	MDRV_CPU_IO_MAP(sound_io_map)
308	330
	331	MDRV_MACHINE_START(suprslam)
	332	MDRV_MACHINE_RESET(suprslam)
	333
309	334	MDRV_GFXDECODE(suprslam)
310	335
311	336	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
r6740	r6741
322	347	MDRV_VIDEO_START(suprslam)
323	348	MDRV_VIDEO_UPDATE(suprslam)
324	349
	350	MDRV_K053936_ADD("k053936", suprslam_k053936_intf)
	351
325	352	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
326	353
327	354	MDRV_SOUND_ADD("ymsnd", YM2610, 8000000)
r6740	r6741
365	392
366	393	/*** GAME DRIVERS ************************************************************/
367	394
368		GAME( 1995, suprslam, 0, suprslam, suprslam, 0, ROT0, "Banpresto / Toei Animation", "Super Slams", GAME_IMPERFECT_GRAPHICS )
	395	GAME( 1995, suprslam, 0, suprslam, suprslam, 0, ROT0, "Banpresto / Toei Animation", "Super Slams", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )

src/mame/drivers/calomega.c

r6740	r6741
643	643
644	644
645	645	/* from video */
	646	extern UINT8 *calomega_videoram;
	647	extern UINT8 *calomega_colorram;
646	648	WRITE8_HANDLER( calomega_videoram_w );
647	649	WRITE8_HANDLER( calomega_colorram_w );
648	650	PALETTE_INIT( calomega );
r6740	r6741
762	764	AM_RANGE(0x08c8, 0x08cb) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w)
763	765	AM_RANGE(0x08d0, 0x08d0) AM_DEVREADWRITE("acia6850_0", acia6850_stat_r, acia6850_ctrl_w)
764	766	AM_RANGE(0x08d1, 0x08d1) AM_DEVREADWRITE("acia6850_0", acia6850_data_r, acia6850_data_w)
765		AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(calomega_videoram_w) AM_BASE_GENERIC(videoram)
766		AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(calomega_colorram_w) AM_BASE_GENERIC(colorram)
	767	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(calomega_videoram_w) AM_BASE(&calomega_videoram)
	768	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(calomega_colorram_w) AM_BASE(&calomega_colorram)
767	769	AM_RANGE(0x1800, 0x3fff) AM_ROM
768	770	ADDRESS_MAP_END
769	771
r6740	r6741
775	777	AM_RANGE(0x0881, 0x0881) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
776	778	AM_RANGE(0x08c4, 0x08c7) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w)
777	779	AM_RANGE(0x08c8, 0x08cb) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w)
778		AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(calomega_videoram_w) AM_BASE_GENERIC(videoram)
779		AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(calomega_colorram_w) AM_BASE_GENERIC(colorram)
	780	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(calomega_videoram_w) AM_BASE(&calomega_videoram)
	781	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(calomega_colorram_w) AM_BASE(&calomega_colorram)
780	782	AM_RANGE(0x1800, 0xffff) AM_ROM
781	783	ADDRESS_MAP_END
782	784
r6740	r6741
788	790	AM_RANGE(0x1081, 0x1081) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
789	791	AM_RANGE(0x10c4, 0x10c7) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w)
790	792	AM_RANGE(0x10c8, 0x10cb) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w)
791		AM_RANGE(0x2000, 0x23ff) AM_RAM_WRITE(calomega_videoram_w) AM_BASE_GENERIC(videoram)
792		AM_RANGE(0x2400, 0x27ff) AM_RAM_WRITE(calomega_colorram_w) AM_BASE_GENERIC(colorram)
	793	AM_RANGE(0x2000, 0x23ff) AM_RAM_WRITE(calomega_videoram_w) AM_BASE(&calomega_videoram)
	794	AM_RANGE(0x2400, 0x27ff) AM_RAM_WRITE(calomega_colorram_w) AM_BASE(&calomega_colorram)
793	795	AM_RANGE(0x2800, 0xffff) AM_ROM
794	796	ADDRESS_MAP_END
795	797

src/mame/drivers/atetris.c

r6740	r6741
49	49
50	50	#include "driver.h"
51	51	#include "cpu/m6502/m6502.h"
52		#include "slapstic.h"
53		#include "atetris.h"
	52	#include "includes/slapstic.h"
	53	#include "includes/atetris.h"
54	54	#include "sound/sn76496.h"
55	55	#include "sound/pokey.h"
56	56	#include "state.h"

src/mame/drivers/4roses.c

r6740	r6741
178	178	#include "sound/ay8910.h"
179	179
180	180	/* from video */
	181	extern UINT8 *funworld_videoram;
	182	extern UINT8 *funworld_colorram;
	183
181	184	WRITE8_HANDLER( funworld_videoram_w );
182	185	WRITE8_HANDLER( funworld_colorram_w );
183	186	PALETTE_INIT( funworld );
r6740	r6741
197	200
198	201	static ADDRESS_MAP_START( 4roses_map, ADDRESS_SPACE_PROGRAM, 8 )
199	202	AM_RANGE(0x0000, 0x07ff) AM_RAM   // AM_BASE_SIZE_GENERIC(nvram)
200		AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_GENERIC(videoram)
201		AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_GENERIC(colorram)
	203	AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
	204	AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
202	205	AM_RANGE(0x8000, 0xffff) AM_ROM
203	206	ADDRESS_MAP_END
204	207

src/mame/drivers/shaolins.c

r6740	r6741
14	14
15	15	UINT8 shaolins_nmi_enable;
16	16
	17	extern UINT8 *shaolins_videoram;
	18	extern UINT8 *shaolins_colorram;
17	19	WRITE8_HANDLER( shaolins_videoram_w );
18	20	WRITE8_HANDLER( shaolins_colorram_w );
19	21	WRITE8_HANDLER( shaolins_palettebank_w );
r6740	r6741
56	58	AM_RANGE(0x2800, 0x2bff) AM_RAM                     /* RAM BANK 2 */
57	59	AM_RANGE(0x3000, 0x30ff) AM_RAM                     /* RAM BANK 1 */
58	60	AM_RANGE(0x3100, 0x33ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
59		AM_RANGE(0x3800, 0x3bff) AM_RAM_WRITE(shaolins_colorram_w) AM_BASE_GENERIC(colorram)
60		AM_RANGE(0x3c00, 0x3fff) AM_RAM_WRITE(shaolins_videoram_w) AM_BASE_GENERIC(videoram)
	61	AM_RANGE(0x3800, 0x3bff) AM_RAM_WRITE(shaolins_colorram_w) AM_BASE(&shaolins_colorram)
	62	AM_RANGE(0x3c00, 0x3fff) AM_RAM_WRITE(shaolins_videoram_w) AM_BASE(&shaolins_videoram)
61	63	AM_RANGE(0x4000, 0x5fff) AM_ROM                     /* Machine checks for extra rom */
62	64	AM_RANGE(0x6000, 0xffff) AM_ROM
63	65	ADDRESS_MAP_END

src/mame/drivers/bmcbowl.c

r6740	r6741
112	112
113	113	static UINT16 *bmcbowl_vid1;
114	114	static UINT16 *bmcbowl_vid2;
	115	static UINT8 *bmc_colorram;
115	116
116	117	static UINT8 *stats_ram;
117	118	static size_t   stats_ram_size;
r6740	r6741
197	198
198	199	static WRITE16_HANDLER( bmc_RAMDAC_offset_w )
199	200	{
200		clr_offset=data*3;
	201	clr_offset=data*3;
201	202	}
202	203
203	204	static WRITE16_HANDLER( bmc_RAMDAC_color_w )
204	205	{
205		space->machine->generic.colorram.u8[clr_offset]=data;
206		palette_set_color_rgb(space->machine,clr_offset/3,pal6bit(space->machine->generic.colorram.u8[(clr_offset/3)*3]),pal6bit(space->machine->generic.colorram.u8[(clr_offset/3)*3+1]),pal6bit(space->machine->generic.colorram.u8[(clr_offset/3)*3+2]));
207		clr_offset=(clr_offset+1)%768;
	206	bmc_colorram[clr_offset]=data;
	207	palette_set_color_rgb(space->machine,clr_offset/3,pal6bit(bmc_colorram[(clr_offset/3)*3]),pal6bit(bmc_colorram[(clr_offset/3)*3+1]),pal6bit(bmc_colorram[(clr_offset/3)*3+2]));
	208	clr_offset=(clr_offset+1)%768;
208	209	}
209	210
210	211	static WRITE16_HANDLER( scroll_w )
r6740	r6741
551	552
552	553	static DRIVER_INIT(bmcbowl)
553	554	{
554		machine->generic.colorram.u8 = auto_alloc_array(machine, UINT8, 768);
	555	bmc_colorram = auto_alloc_array(machine, UINT8, 768);
555	556	}
556	557
557	558	GAME( 1994, bmcbowl,    0, bmcbowl,    bmcbowl,    bmcbowl, ROT0,  "BMC", "BMC Bowling", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/leland.c

r6740	r6741
45	45	#include "cpu/i86/i86.h"
46	46	#include "machine/eeprom.h"
47	47	#include "cpu/z80/z80.h"
48		#include "leland.h"
	48	#include "includes/leland.h"
49	49	#include "sound/ay8910.h"
50	50
51	51

src/mame/drivers/lordgun.c

r6740	r6741
33	33	#include "machine/eeprom.h"
34	34	#include "sound/3812intf.h"
35	35	#include "sound/okim6295.h"
36		#include "lordgun.h"
	36	#include "includes/lordgun.h"
37	37
38	38
39	39	static UINT16 *lordgun_priority_ram, lordgun_priority;

src/mame/drivers/zerozone.c

r6740	r6741
28	28	*********************************************************************************/
29	29
30	30	#include "driver.h"
31		#include "zerozone.h"
	31	#include "includes/zerozone.h"
32	32	#include "cpu/z80/z80.h"
33	33	#include "cpu/m68000/m68000.h"
34	34	#include "sound/okim6295.h"

src/mame/drivers/espial.c

r6740	r6741
9	9
10	10	#include "driver.h"
11	11	#include "deprecat.h"
12		#include "espial.h"
	12	#include "includes/espial.h"
13	13	#include "cpu/z80/z80.h"
14	14	#include "sound/ay8910.h"
15	15

src/mame/drivers/toaplan1.c

r6740	r6741
65	65	#include "cpu/z80/z80.h"
66	66	#include "cpu/m68000/m68000.h"
67	67	#include "cpu/tms32010/tms32010.h"
68		#include "toaplan1.h"
	68	#include "includes/toaplan1.h"
69	69	#include "sound/3812intf.h"
70	70
71	71

src/mame/drivers/segag80r.c

r6740	r6741
110	110	#include "machine/8255ppi.h"
111	111	#include "machine/segacrpt.h"
112	112	#include "audio/segasnd.h"
113		#include "segag80r.h"
	113	#include "includes/segag80r.h"
114	114	#include "sound/dac.h"
115	115	#include "sound/sn76496.h"
116	116	#include "sound/samples.h"

src/mame/drivers/tmnt.c

r6740	r6741
66	66
67	67	#include "driver.h"
68	68	#include "deprecat.h"
69		#include "video/konamiic.h"
70		#include "machine/eeprom.h"
	69	#include "video/konicdev.h"
	70	#include "machine/eepromdev.h"
71	71	#include "cpu/m68000/m68000.h"
72	72	#include "cpu/z80/z80.h"
73	73	#include "sound/2151intf.h"
r6740	r6741
78	78	#include "sound/k007232.h"
79	79	#include "sound/upd7759.h"
80	80	#include "includes/tmnt.h"
81		#include "konamipt.h"
	81	#include "includes/konamipt.h"
82	82
	83
	84	extern void mia_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	85	extern void cuebrick_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	86	extern void tmnt_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	87	extern void ssbl_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	88	extern void blswhstl_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	89	extern void mia_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
	90	extern void tmnt_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
	91	extern void punkshot_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow);
	92	extern void thndrx2_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow);
	93	extern void lgtnfght_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
	94	extern void blswhstl_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
	95	extern void prmrsocr_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
	96
	97	WRITE16_HANDLER( ssriders_eeprom_w );   /* in video/tmnt.c */
	98
83	99	static int tmnt_soundlatch;
84	100	static int cuebrick_snd_irqlatch, cuebrick_nvram_bank;
85	101	static UINT16 cuebrick_nvram[0x400*0x20];   // 32k paged in a 1k window
86	102	static INT16 *sampledata;
87	103
	104
88	105	static READ16_HANDLER( K052109_word_noA12_r )
89	106	{
	107	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	108
90	109	/* some games have the A12 line not connected, so the chip spans */
91	110	/* twice the memory range, with mirroring */
92	111	offset = ((offset & 0x3000) >> 1) | (offset & 0x07ff);
93		return K052109_word_r(space,offset,mem_mask);
	112	return k052109_word_r(k052109, offset, mem_mask);
94	113	}
95	114
96	115	static WRITE16_HANDLER( K052109_word_noA12_w )
97	116	{
	117	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	118
98	119	/* some games have the A12 line not connected, so the chip spans */
99	120	/* twice the memory range, with mirroring */
100	121	offset = ((offset & 0x3000) >> 1) | (offset & 0x07ff);
101		K052109_word_w(space,offset,data,mem_mask);
	122	k052109_word_w(k052109, offset, data, mem_mask);
102	123	}
103	124
104	125	static WRITE16_HANDLER( punkshot_K052109_word_w )
105	126	{
	127	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	128
106	129	/* it seems that a word write is supposed to affect only the MSB. The */
107	130	/* "ROUND 1" text in punkshtj goes lost otherwise. */
108	131	if (ACCESSING_BITS_8_15)
109		K052109_w(space,offset,(data >> 8) & 0xff);
	132	k052109_w(k052109, offset, (data >> 8) & 0xff);
110	133	else if (ACCESSING_BITS_0_7)
111		K052109_w(space,offset + 0x2000,data & 0xff);
	134	k052109_w(k052109, offset + 0x2000, data & 0xff);
112	135	}
113	136
114	137	static WRITE16_HANDLER( punkshot_K052109_word_noA12_w )
r6740	r6741
116	139	/* some games have the A12 line not connected, so the chip spans */
117	140	/* twice the memory range, with mirroring */
118	141	offset = ((offset & 0x3000) >> 1) | (offset & 0x07ff);
119		punkshot_K052109_word_w(space,offset,data,mem_mask);
	142	punkshot_K052109_word_w(space, offset, data, mem_mask);
120	143	}
121	144
122	145
r6740	r6741
125	148	/* A1, A5 and A6 don't go to the 053245. */
126	149	static READ16_HANDLER( K053245_scattered_word_r )
127	150	{
	151	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	152
128	153	if (offset & 0x0031)
129	154	return space->machine->generic.spriteram.u16[offset];
130	155	else
131	156	{
132	157	offset = ((offset & 0x000e) >> 1) | ((offset & 0x1fc0) >> 3);
133		return K053245_word_r(space,offset,mem_mask);
	158	return k053245_word_r(k053245, offset, mem_mask);
134	159	}
135	160	}
136	161
137	162	static WRITE16_HANDLER( K053245_scattered_word_w )
138	163	{
	164	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	165
139	166	COMBINE_DATA(space->machine->generic.spriteram.u16 + offset);
140	167
141	168	if (!(offset & 0x0031))
142	169	{
143	170	offset = ((offset & 0x000e) >> 1) | ((offset & 0x1fc0) >> 3);
144		K053245_word_w(space,offset,data,mem_mask);
	171	k053245_word_w(k053245, offset, data, mem_mask);
145	172	}
146	173	}
147	174
148	175	static READ16_HANDLER( K053244_word_noA1_r )
149	176	{
	177	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	178
150	179	offset &= ~1;   /* handle mirror address */
151	180
152		return K053244_r(space,offset + 1) | (K053244_r(space,offset) << 8);
	181	return k053244_r(k053245, offset + 1) | (k053244_r(k053245, offset) << 8);
153	182	}
154	183
155	184	static WRITE16_HANDLER( K053244_word_noA1_w )
156	185	{
	186	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	187
157	188	offset &= ~1;   /* handle mirror address */
158	189
159	190	if (ACCESSING_BITS_8_15)
160		K053244_w(space,offset,(data >> 8) & 0xff);
	191	k053244_w(k053245, offset, (data >> 8) & 0xff);
161	192	if (ACCESSING_BITS_0_7)
162		K053244_w(space,offset + 1,data & 0xff);
	193	k053244_w(k053245, offset + 1, data & 0xff);
163	194	}
164	195
165	196	static INTERRUPT_GEN(cuebrick_interrupt)
r6740	r6741
180	211
181	212	static INTERRUPT_GEN( punkshot_interrupt )
182	213	{
183		if (K052109_is_IRQ_enabled()) irq4_line_hold(device);
	214	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
184	215
	216	if (k052109_is_irq_enabled(k052109))
	217	irq4_line_hold(device);
185	218	}
186	219
187	220	static INTERRUPT_GEN( lgtnfght_interrupt )
188	221	{
189		if (K052109_is_IRQ_enabled()) irq5_line_hold(device);
	222	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
190	223
	224	if (k052109_is_irq_enabled(k052109))
	225	irq5_line_hold(device);
191	226	}
192	227
193	228
r6740	r6741
328	363	}
329	364
330	365
331
332
333
334	366	static READ16_HANDLER( punkshot_kludge_r )
335	367	{
336	368	/* I don't know what's going on here; at one point, the code reads location */
r6740	r6741
344	376	/* protection simulation derived from a bootleg */
345	377	static READ16_HANDLER( ssriders_protection_r )
346	378	{
347		int data = memory_read_word(space, 0x105a0a);
348		int cmd = memory_read_word(space, 0x1058fc);
	379	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	380	int data = memory_read_word(space, 0x105a0a);
	381	int cmd = memory_read_word(space, 0x1058fc);
349	382
350	383	switch (cmd)
351	384	{
r6740	r6741
375	408	data = -memory_read_word(space, 0x105818);
376	409	data = ((data / 8 - 4) & 0x1f) * 0x40;
377	410	data += ((memory_read_word(space, 0x105cb0) +
378		256*K052109_r(space,0x1a01) + K052109_r(space,0x1a00) - 6) / 8 + 12) & 0x3f;
	411	256 * k052109_r(k052109, 0x1a01) + k052109_r(k052109, 0x1a00) - 6) / 8 + 12) & 0x3f;
379	412	return data;
380	413
381	414	default:
r6740	r6741
387	420
388	421	static WRITE16_HANDLER( ssriders_protection_w )
389	422	{
	423	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	424
390	425	if (offset == 1)
391	426	{
392	427	int logical_pri,hardware_pri;
r6740	r6741
401	436	{
402	437	if ((memory_read_word(space, 0x180006 + 128*i) >> 8) == logical_pri)
403	438	{
404		K053245_word_w(space,8*i,hardware_pri,0x00ff);
	439	k053245_word_w(k053245, 8 * i, hardware_pri, 0x00ff);
405	440	hardware_pri++;
406	441	}
407	442	}
r6740	r6741
417	452
418	453	***************************************************************************/
419	454
420		static int init_eeprom_count;
421
422
423	455	static const eeprom_interface eeprom_intf =
424	456	{
425	457	7,            /* address bits */
r6740	r6741
431	463	"0100110000000" /* unlock command */
432	464	};
433	465
434		static NVRAM_HANDLER( eeprom )
435		{
436		if (read_or_write)
437		eeprom_save(file);
438		else
439		{
440		eeprom_init(machine, &eeprom_intf);
441	466
442		if (file)
443		{
444		init_eeprom_count = 0;
445		eeprom_load(file);
446		}
447		else
448		init_eeprom_count = 10;
449		}
450		}
451
452	467	static READ16_HANDLER( blswhstl_coin_r )
453	468	{
454	469	int res;
r6740	r6741
457	472	/* bit 3 is service button */
458	473	/* bit 6 is ??? VBLANK? OBJMPX? */
459	474	res = input_port_read(space->machine, "COINS");
460		if (init_eeprom_count)
461		{
462		init_eeprom_count--;
463		res &= 0xf7;
464		}
	475
465	476	toggle ^= 0x40;
466	477	return res ^ toggle;
467	478	}
r6740	r6741
476	487	/* bit 2 is VBLANK (???) */
477	488	/* bit 7 is service button */
478	489	res = input_port_read(space->machine, "EEPROM");
479		if (init_eeprom_count)
480		{
481		init_eeprom_count--;
482		res &= 0x7f;
483		}
	490
484	491	toggle ^= 0x04;
485	492	return res ^ toggle;
486	493	}
r6740	r6741
495	502	/* bit 2 is VBLANK (???) */
496	503	/* bit 3 is service button */
497	504	res = input_port_read(space->machine, "EEPROM");
498		if (init_eeprom_count)
499		{
500		init_eeprom_count--;
501		res &= 0xf7;
502		}
	505
503	506	toggle ^= 0x04;
504	507	return res ^ toggle;
505	508	}
r6740	r6741
511	514	/* bit 0 is data */
512	515	/* bit 1 is cs (active low) */
513	516	/* bit 2 is clock (active high) */
514		eeprom_write_bit(data & 0x01);
515		eeprom_set_cs_line((data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
516		eeprom_set_clock_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	517	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
517	518	}
518	519	}
519	520
520		WRITE16_HANDLER( ssriders_eeprom_w );   /* in video/tmnt.c */
521
522
523		static const eeprom_interface thndrx2_eeprom_interface =
	521	static const eeprom_interface thndrx2_eeprom_intf =
524	522	{
525	523	7,            /* address bits */
526	524	8,            /* data bits */
r6740	r6741
531	529	"0100110000000" /* unlock command */
532	530	};
533	531
534		static NVRAM_HANDLER( thndrx2 )
535		{
536		if (read_or_write)
537		eeprom_save(file);
538		else
539		{
540		eeprom_init(machine, &thndrx2_eeprom_interface);
541
542		if (file)
543		{
544		init_eeprom_count = 0;
545		eeprom_load(file);
546		}
547		else
548		init_eeprom_count = 10;
549		}
550		}
551
552		static READ16_HANDLER( thndrx2_in0_r )
553		{
554		int res;
555
556		res = input_port_read(space->machine, "P1/COINS");
557		if (init_eeprom_count)
558		{
559		init_eeprom_count--;
560		res &= 0xf7ff;
561		}
562		return res;
563		}
564
565	532	static READ16_HANDLER( thndrx2_eeprom_r )
566	533	{
567	534	int res;
r6740	r6741
578	545
579	546	static WRITE16_HANDLER( thndrx2_eeprom_w )
580	547	{
	548	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
581	549	static int last;
582	550
583	551	if (ACCESSING_BITS_0_7)
r6740	r6741
585	553	/* bit 0 is data */
586	554	/* bit 1 is cs (active low) */
587	555	/* bit 2 is clock (active high) */
588		eeprom_write_bit(data & 0x01);
589		eeprom_set_cs_line((data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
590		eeprom_set_clock_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	556	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
591	557
592	558	/* bit 5 triggers IRQ on sound cpu */
593	559	if (last == 0 && (data & 0x20) != 0)
r6740	r6741
595	561	last = data & 0x20;
596	562
597	563	/* bit 6 = enable char ROM reading through the video RAM */
598		K052109_set_RMRD_line((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
	564	k052109_set_rmrd_line(k052109, (data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
599	565	}
600	566	}
601	567
602
603		static READ16_HANDLER( prmrsocr_IN0_r )
604		{
605		/* bit 9 is service button */
606		int res;
607
608		res = input_port_read(space->machine, "P1/COINS");
609		if (init_eeprom_count)
610		{
611		init_eeprom_count--;
612		res &= 0xfdff;
613		}
614		return res;
615		}
616
617	568	static WRITE16_HANDLER( prmrsocr_eeprom_w )
618	569	{
619	570	if (ACCESSING_BITS_0_7)
r6740	r6741
626	577	/* bit 8 is data */
627	578	/* bit 9 is cs (active low) */
628	579	/* bit 10 is clock (active high) */
629		eeprom_write_bit(data & 0x0100);
630		eeprom_set_cs_line((data & 0x0200) ? CLEAR_LINE : ASSERT_LINE);
631		eeprom_set_clock_line((data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
	580	input_port_write(space->machine, "EEPROMOUT", data, 0xffff);
632	581	}
633	582	}
634	583
r6740	r6741
663	612	AM_RANGE(0x0b0400, 0x0b0401) AM_WRITE(cuebrick_nvbank_w)
664	613	AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("ymsnd", ym2151_r, ym2151_w, 0xff00)
665	614	AM_RANGE(0x100000, 0x107fff) AM_READWRITE(K052109_word_noA12_r, K052109_word_noA12_w)
666		AM_RANGE(0x140000, 0x140007) AM_READWRITE(K051937_word_r, K051937_word_w)
667		AM_RANGE(0x140400, 0x1407ff) AM_READWRITE(K051960_word_r, K051960_word_w)
	615	AM_RANGE(0x140000, 0x140007) AM_DEVREADWRITE("k051960", k051937_word_r, k051937_word_w)
	616	AM_RANGE(0x140400, 0x1407ff) AM_DEVREADWRITE("k051960", k051960_word_r, k051960_word_w)
668	617	ADDRESS_MAP_END
669	618
670	619
r6740	r6741
685	634	#endif
686	635	AM_RANGE(0x100000, 0x107fff) AM_READWRITE(K052109_word_noA12_r, K052109_word_noA12_w)
687	636	//  AM_RANGE(0x10e800, 0x10e801) AM_WRITENOP ???
688		AM_RANGE(0x140000, 0x140007) AM_READWRITE(K051937_word_r, K051937_word_w)
689		AM_RANGE(0x140400, 0x1407ff) AM_READWRITE(K051960_word_r, K051960_word_w)
	637	AM_RANGE(0x140000, 0x140007) AM_DEVREADWRITE("k051960", k051937_word_r, k051937_word_w)
	638	AM_RANGE(0x140400, 0x1407ff) AM_DEVREADWRITE("k051960", k051960_word_r, k051960_word_w)
690	639	ADDRESS_MAP_END
691	640
692	641
r6740	r6741
706	655	AM_RANGE(0x0c0000, 0x0c0001) AM_WRITE(tmnt_priority_w)
707	656	AM_RANGE(0x100000, 0x107fff) AM_READWRITE(K052109_word_noA12_r, K052109_word_noA12_w)
708	657	//  AM_RANGE(0x10e800, 0x10e801) AM_WRITENOP ???
709		AM_RANGE(0x140000, 0x140007) AM_READWRITE(K051937_word_r, K051937_word_w)
710		AM_RANGE(0x140400, 0x1407ff) AM_READWRITE(K051960_word_r, K051960_word_w)
	658	AM_RANGE(0x140000, 0x140007) AM_DEVREADWRITE("k051960", k051937_word_r, k051937_word_w)
	659	AM_RANGE(0x140400, 0x1407ff) AM_DEVREADWRITE("k051960", k051960_word_r, k051960_word_w)
711	660	ADDRESS_MAP_END
712	661
713	662
r6740	r6741
722	671	AM_RANGE(0x0a0020, 0x0a0021) AM_WRITE(punkshot_0a0020_w)
723	672	AM_RANGE(0x0a0040, 0x0a0043) AM_DEVREAD8("konami", punkshot_sound_r, 0x00ff)   /* K053260 */
724	673	AM_RANGE(0x0a0040, 0x0a0041) AM_DEVWRITE8("konami", k053260_w, 0x00ff)
725		AM_RANGE(0x0a0060, 0x0a007f) AM_WRITE(K053251_lsb_w)
	674	AM_RANGE(0x0a0060, 0x0a007f) AM_DEVWRITE("k053251", k053251_lsb_w)
726	675	AM_RANGE(0x0a0080, 0x0a0081) AM_WRITE(watchdog_reset16_w)
727	676	AM_RANGE(0x100000, 0x107fff) AM_READWRITE(K052109_word_noA12_r, punkshot_K052109_word_noA12_w)
728		AM_RANGE(0x110000, 0x110007) AM_READWRITE(K051937_word_r, K051937_word_w)
729		AM_RANGE(0x110400, 0x1107ff) AM_READWRITE(K051960_word_r, K051960_word_w)
	677	AM_RANGE(0x110000, 0x110007) AM_DEVREADWRITE("k051960", k051937_word_r, k051937_word_w)
	678	AM_RANGE(0x110400, 0x1107ff) AM_DEVREADWRITE("k051960", k051960_word_r, k051960_word_w)
730	679	AM_RANGE(0xfffffc, 0xffffff) AM_READ(punkshot_kludge_r)
731	680	ADDRESS_MAP_END
732	681
r6740	r6741
747	696	AM_RANGE(0x0a0028, 0x0a0029) AM_WRITE(watchdog_reset16_w)
748	697	AM_RANGE(0x0b0000, 0x0b3fff) AM_READWRITE(K053245_scattered_word_r, K053245_scattered_word_w) AM_BASE_GENERIC(spriteram)
749	698	AM_RANGE(0x0c0000, 0x0c001f) AM_READWRITE(K053244_word_noA1_r, K053244_word_noA1_w)
750		AM_RANGE(0x0e0000, 0x0e001f) AM_WRITE(K053251_lsb_w)
	699	AM_RANGE(0x0e0000, 0x0e001f) AM_DEVWRITE("k053251", k053251_lsb_w)
751	700	AM_RANGE(0x100000, 0x107fff) AM_READWRITE(K052109_word_noA12_r, K052109_word_noA12_w)
752	701	ADDRESS_MAP_END
753	702
r6740	r6741
760	709
761	710	static ADDRESS_MAP_START( blswhstl_main_map, ADDRESS_SPACE_PROGRAM, 16 )
762	711	AM_RANGE(0x000000, 0x07ffff) AM_ROM
763		AM_RANGE(0x180000, 0x183fff) AM_READWRITE(K052109_word_r, K052109_word_w)
	712	AM_RANGE(0x180000, 0x183fff) AM_DEVREADWRITE("k052109", k052109_word_r, k052109_word_w)
764	713	AM_RANGE(0x204000, 0x207fff) AM_RAM   /* main RAM */
765	714	AM_RANGE(0x300000, 0x303fff) AM_READWRITE(K053245_scattered_word_r, K053245_scattered_word_w) AM_BASE_GENERIC(spriteram)
766	715	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
767		AM_RANGE(0x500000, 0x50003f) AM_READWRITE(K054000_lsb_r, K054000_lsb_w)
	716	AM_RANGE(0x500000, 0x50003f) AM_DEVREADWRITE("k054000", k054000_lsb_r, k054000_lsb_w)
768	717	AM_RANGE(0x680000, 0x68001f) AM_READWRITE(K053244_word_noA1_r, K053244_word_noA1_w)
769	718	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("P1")
770	719	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("P2")
r6740	r6741
776	725	AM_RANGE(0x780600, 0x780603) AM_DEVREAD8("konami", punkshot_sound_r, 0x00ff)   /* K053260 */
777	726	AM_RANGE(0x780600, 0x780601) AM_DEVWRITE8("konami", k053260_w, 0x00ff)
778	727	AM_RANGE(0x780604, 0x780605) AM_WRITE(ssriders_soundkludge_w)
779		AM_RANGE(0x780700, 0x78071f) AM_WRITE(K053251_lsb_w)
	728	AM_RANGE(0x780700, 0x78071f) AM_DEVWRITE("k053251", k053251_lsb_w)
780	729	ADDRESS_MAP_END
781	730
782	731
	732	static WRITE16_HANDLER( K053251_glfgreat_w )
	733	{
	734	const device_config *k053251 = devtag_get_device(space->machine, "k053251");
	735	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	736	int i;
	737
	738	if (ACCESSING_BITS_8_15)
	739	{
	740	k053251_w(k053251, offset, (data >> 8) & 0xff);
	741
	742	/* FIXME: in the old code k052109 tilemaps were tilemaps 2,3,4 for k053251
	743	and got marked as dirty in the write above... how was the original hardware working?!? */
	744	for (i = 0; i < 3; i++)
	745	{
	746	if (k053251_get_tmap_dirty(k053251, 2 + i))
	747	{
	748	k052109_tilemap_mark_dirty(k052109, i);
	749	k053251_set_tmap_dirty(k053251, 2 + i, 0);
	750	}
	751	}
	752	}
	753	}
	754
783	755	static ADDRESS_MAP_START( glfgreat_main_map, ADDRESS_SPACE_PROGRAM, 16 )
784	756	AM_RANGE(0x000000, 0x03ffff) AM_ROM
785	757	AM_RANGE(0x100000, 0x103fff) AM_RAM   /* main RAM */
786	758	AM_RANGE(0x104000, 0x107fff) AM_READWRITE(K053245_scattered_word_r, K053245_scattered_word_w) AM_BASE_GENERIC(spriteram)
787	759	AM_RANGE(0x108000, 0x108fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
788		AM_RANGE(0x10c000, 0x10cfff) AM_RAM    AM_BASE(&K053936_0_linectrl)   /* 053936? */
	760	AM_RANGE(0x10c000, 0x10cfff) AM_DEVREADWRITE("k053936", k053936_linectrl_r, k053936_linectrl_w)   /* 053936? */
789	761	AM_RANGE(0x110000, 0x11001f) AM_WRITE(K053244_word_noA1_w)            /* duplicate! */
790		AM_RANGE(0x114000, 0x11401f) AM_READWRITE(K053244_lsb_r, K053244_lsb_w)   /* duplicate! */
791		AM_RANGE(0x118000, 0x11801f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
792		AM_RANGE(0x11c000, 0x11c01f) AM_WRITE(K053251_msb_w)
	762	AM_RANGE(0x114000, 0x11401f) AM_DEVREADWRITE("k053245", k053244_lsb_r, k053244_lsb_w)   /* duplicate! */
	763	AM_RANGE(0x118000, 0x11801f) AM_DEVWRITE("k053936", k053936_ctrl_w)
	764	AM_RANGE(0x11c000, 0x11c01f) AM_DEVWRITE("k053251", k053251_msb_w)
	765	AM_RANGE(0x11c000, 0x11c01f) AM_WRITE(K053251_glfgreat_w)
793	766	AM_RANGE(0x120000, 0x120001) AM_READ_PORT("P1/P2")
794	767	AM_RANGE(0x120002, 0x120003) AM_READ_PORT("P3/P4")
795	768	AM_RANGE(0x120004, 0x120005) AM_READ_PORT("COINS/DSW3")
r6740	r6741
808	781	AM_RANGE(0x100000, 0x103fff) AM_RAM   /* main RAM */
809	782	AM_RANGE(0x104000, 0x107fff) AM_READWRITE(K053245_scattered_word_r, K053245_scattered_word_w) AM_BASE_GENERIC(spriteram)
810	783	AM_RANGE(0x108000, 0x108fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
811		AM_RANGE(0x10c000, 0x10cfff) AM_RAM AM_BASE(&K053936_0_linectrl)
	784	AM_RANGE(0x10c000, 0x10cfff) AM_DEVREADWRITE("k053936", k053936_linectrl_r, k053936_linectrl_w)
812	785	AM_RANGE(0x110000, 0x11001f) AM_WRITE(K053244_word_noA1_w)            /* duplicate! */
813		AM_RANGE(0x114000, 0x11401f) AM_READWRITE(K053244_lsb_r, K053244_lsb_w)   /* duplicate! */
814		AM_RANGE(0x118000, 0x11801f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
815		AM_RANGE(0x11c000, 0x11c01f) AM_WRITE(K053251_msb_w)
816		AM_RANGE(0x120000, 0x120001) AM_READ(prmrsocr_IN0_r)
	786	AM_RANGE(0x114000, 0x11401f) AM_DEVREADWRITE("k053245", k053244_lsb_r, k053244_lsb_w)   /* duplicate! */
	787	AM_RANGE(0x118000, 0x11801f) AM_DEVWRITE("k053936", k053936_ctrl_w)
	788	AM_RANGE(0x11c000, 0x11c01f) AM_DEVWRITE("k053251", k053251_msb_w)
	789	AM_RANGE(0x11c000, 0x11c01f) AM_WRITE(K053251_glfgreat_w)
	790	AM_RANGE(0x120000, 0x120001) AM_READ_PORT("P1/COINS")
817	791	AM_RANGE(0x120002, 0x120003) AM_READ_PORT("P2/EEPROM")
818	792	AM_RANGE(0x12100c, 0x12100f) AM_WRITE(prmrsocr_sound_cmd_w)
819	793	AM_RANGE(0x121014, 0x121015) AM_READ(prmrsocr_sound_r)
r6740	r6741
839	813
840	814	static void tmnt2_put_word(const address_space *space, UINT32 addr, UINT16 data)
841	815	{
	816	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	817
842	818	UINT32 offs;
843	819	if (addr >= 0x180000/2 && addr <= 0x183fff/2)
844	820	{
r6740	r6741
847	823	if (!(offs & 0x0031))
848	824	{
849	825	offs = ((offs & 0x000e) >> 1) | ((offs & 0x1fc0) >> 3);
850		K053245_word_w(space, offs, data, 0xffff);
	826	k053245_word_w(k053245, offs, data, 0xffff);
851	827	}
852	828	}
853	829	else if (addr >= 0x104000/2 && addr <= 0x107fff/2) sunset_104000[addr-0x104000/2] = data;
r6740	r6741
971	947	#else // for reference; do not remove
972	948	static WRITE16_HANDLER( tmnt2_1c0800_w )
973	949	{
974		COMBINE_DATA( tmnt2_1c0800 + offset);
975		if ( offset == 0x0008 && ( tmnt2_1c0800[0x8] & 0xff00 ) == 0x8200 )
	950	COMBINE_DATA( tmnt2_1c0800 + offset);
	951	if ( offset == 0x0008 && ( tmnt2_1c0800[0x8] & 0xff00 ) == 0x8200 )
976	952	{
977	953	UINT32 CellSrc;
978	954	UINT32 CellVar;
r6740	r6741
984	960	dst = tmnt2_1c0800[0x02] | (tmnt2_1c0800[0x03] << 16 );
985	961	CellSrc = tmnt2_1c0800[0x00] | (tmnt2_1c0800[0x01] << 16 );
986	962	//        if ( CellDest >= 0x180000 && CellDest < 0x183fe0 ) {
987		CellVar -= 0x104000;
	963	CellVar -= 0x104000;
988	964	src = (UINT16 *)(memory_region(space->machine, "maincpu") + CellSrc);
989	965
990	966	CellVar >>= 1;
991	967
992	968	memory_write_word(space,dst+0x00, 0x8000 | ((src[1] & 0xfc00) >> 2));   /* size, flip xy */
993		memory_write_word(space,dst+0x04, src[0]);   /* code */
994		memory_write_word(space,dst+0x18, (src[1] & 0x3ff) ^      /* color, mirror, priority */
	969	memory_write_word(space,dst+0x04, src[0]);   /* code */
	970	memory_write_word(space,dst+0x18, (src[1] & 0x3ff) ^      /* color, mirror, priority */
995	971	(sunset_104000[CellVar + 0x00] & 0x0060));
996	972
997	973	/* base color modifier */
r6740	r6741
1077	1053	AM_RANGE(0x5c0600, 0x5c0603) AM_DEVREAD8("konami", punkshot_sound_r, 0x00ff)   /* K053260 */
1078	1054	AM_RANGE(0x5c0600, 0x5c0601) AM_DEVWRITE8("konami", k053260_w, 0x00ff)
1079	1055	AM_RANGE(0x5c0604, 0x5c0605) AM_WRITE(ssriders_soundkludge_w)
1080		AM_RANGE(0x5c0700, 0x5c071f) AM_WRITE(K053251_lsb_w)
1081		AM_RANGE(0x600000, 0x603fff) AM_READWRITE(K052109_word_r, K052109_word_w)
	1056	AM_RANGE(0x5c0700, 0x5c071f) AM_DEVWRITE("k053251", k053251_lsb_w)
	1057	AM_RANGE(0x600000, 0x603fff) AM_DEVREADWRITE("k052109", k052109_word_r, k052109_word_w)
1082	1058	ADDRESS_MAP_END
1083	1059
1084	1060
r6740	r6741
1103	1079	AM_RANGE(0x5c0600, 0x5c0603) AM_DEVREAD8("konami", punkshot_sound_r, 0x00ff)   /* K053260 */
1104	1080	AM_RANGE(0x5c0600, 0x5c0601) AM_DEVWRITE8("konami", k053260_w, 0x00ff)
1105	1081	AM_RANGE(0x5c0604, 0x5c0605) AM_WRITE(ssriders_soundkludge_w)
1106		AM_RANGE(0x5c0700, 0x5c071f) AM_WRITE(K053251_lsb_w)
1107		AM_RANGE(0x600000, 0x603fff) AM_READWRITE(K052109_word_r, K052109_word_w)
	1082	AM_RANGE(0x5c0700, 0x5c071f) AM_DEVWRITE("k053251", k053251_lsb_w)
	1083	AM_RANGE(0x600000, 0x603fff) AM_DEVREADWRITE("k052109", k052109_word_r, k052109_word_w)
1108	1084	ADDRESS_MAP_END
1109	1085
1110	1086
r6740	r6741
1112	1088	AM_RANGE(0x000000, 0x0bffff) AM_ROM
1113	1089	AM_RANGE(0x104000, 0x107fff) AM_RAM   /* main RAM */
1114	1090	AM_RANGE(0x14c000, 0x14cfff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1115		AM_RANGE(0x14e700, 0x14e71f) AM_WRITE(K053251_lsb_w)
	1091	AM_RANGE(0x14e700, 0x14e71f) AM_DEVWRITE("k053251", k053251_lsb_w)
1116	1092	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(K053245_scattered_word_r, K053245_scattered_word_w) AM_BASE_GENERIC(spriteram)
1117	1093	AM_RANGE(0x184000, 0x18ffff) AM_RAM
1118	1094	AM_RANGE(0x1c0300, 0x1c0301) AM_WRITE(ssriders_1c0300_w)
1119	1095	AM_RANGE(0x1c0400, 0x1c0401) AM_WRITENOP
1120	1096	AM_RANGE(0x5a0000, 0x5a001f) AM_READWRITE(K053244_word_noA1_r, K053244_word_noA1_w)
1121		AM_RANGE(0x600000, 0x603fff) AM_READWRITE(K052109_word_r, K052109_word_w)
	1097	AM_RANGE(0x600000, 0x603fff) AM_DEVREADWRITE("k052109", k052109_word_r, k052109_word_w)
1122	1098	AM_RANGE(0x604020, 0x60402f) AM_WRITENOP   /* written every frame */
1123	1099	AM_RANGE(0x604200, 0x604201) AM_WRITENOP   /* watchdog */
1124	1100	AM_RANGE(0x6119e2, 0x6119e3) AM_WRITENOP   /* written a lot in some test menus (PC=18204) */
r6740	r6741
1138	1114	AM_RANGE(0x000000, 0x03ffff) AM_ROM
1139	1115	AM_RANGE(0x100000, 0x103fff) AM_RAM   /* main RAM */
1140	1116	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
1141		AM_RANGE(0x300000, 0x30001f) AM_WRITE(K053251_lsb_w)
	1117	AM_RANGE(0x300000, 0x30001f) AM_DEVWRITE("k053251", k053251_lsb_w)
1142	1118	AM_RANGE(0x400000, 0x400003) AM_DEVREAD8("konami", punkshot_sound_r, 0x00ff)   /* K053260 */
1143	1119	AM_RANGE(0x400000, 0x400001) AM_DEVWRITE8("konami", k053260_w, 0x00ff)
1144		AM_RANGE(0x500000, 0x50003f) AM_READWRITE(K054000_lsb_r, K054000_lsb_w)
	1120	AM_RANGE(0x500000, 0x50003f) AM_DEVREADWRITE("k054000", k054000_lsb_r, k054000_lsb_w)
1145	1121	AM_RANGE(0x500100, 0x500101) AM_WRITE(thndrx2_eeprom_w)
1146		AM_RANGE(0x500200, 0x500201) AM_READ(thndrx2_in0_r)
	1122	AM_RANGE(0x500200, 0x500201) AM_READ_PORT("P1/COINS")
1147	1123	AM_RANGE(0x500202, 0x500203) AM_READ(thndrx2_eeprom_r)
1148	1124	AM_RANGE(0x500300, 0x500301) AM_WRITENOP   /* watchdog reset? irq enable? */
1149	1125	AM_RANGE(0x600000, 0x607fff) AM_READWRITE(K052109_word_noA12_r, K052109_word_noA12_w)
1150		AM_RANGE(0x700000, 0x700007) AM_READWRITE(K051937_word_r, K051937_word_w)
1151		AM_RANGE(0x700400, 0x7007ff) AM_READWRITE(K051960_word_r, K051960_word_w)
	1126	AM_RANGE(0x700000, 0x700007) AM_DEVREADWRITE("k051960", k051937_word_r, k051937_word_w)
	1127	AM_RANGE(0x700400, 0x7007ff) AM_DEVREADWRITE("k051960", k051960_word_r, k051960_word_w)
1152	1128	ADDRESS_MAP_END
1153	1129
1154	1130
r6740	r6741
1738	1714	KONAMI16_LSB( 2, IPT_UNKNOWN, IPT_UNKNOWN )
1739	1715
1740	1716	PORT_START("EEPROM")
1741		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	1717	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
1742	1718	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM status? - always 1 */
1743	1719	PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1720
	1721	PORT_START( "EEPROMOUT" )
	1722	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	1723	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	1724	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
1744	1725	INPUT_PORTS_END
1745	1726
1746	1727	static INPUT_PORTS_START( glfgreat )
r6740	r6741
1829	1810	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
1830	1811
1831	1812	PORT_START("EEPROM")
1832		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	1813	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
1833	1814	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM status? - always 1 */
1834	1815	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* ?? TMNT2: OBJMPX */
1835	1816	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )   /* ?? TMNT2: NVBLK */
1836	1817	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* ?? TMNT2: IPL0 */
1837	1818	PORT_BIT( 0x60, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
1838	1819	PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
	1820
	1821	PORT_START( "EEPROMOUT" )
	1822	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	1823	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	1824	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
1839	1825	INPUT_PORTS_END
1840	1826
1841	1827	static INPUT_PORTS_START( ssridr4p )
r6740	r6741
1862	1848	KONAMI16_LSB( 4, IPT_UNKNOWN, IPT_UNKNOWN )
1863	1849
1864	1850	PORT_START("EEPROM")
1865		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	1851	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
1866	1852	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM status? - always 1 */
1867	1853	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* ?? TMNT2: OBJMPX */
1868	1854	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )   /* ?? TMNT2: NVBLK */
1869	1855	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* ?? TMNT2: IPL0 */
1870	1856	PORT_BIT( 0x60, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
1871	1857	PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
	1858
	1859	PORT_START( "EEPROMOUT" )
	1860	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	1861	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	1862	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
1872	1863	INPUT_PORTS_END
1873	1864
1874	1865	/* Same as 'ssridr4p', but additional Start button for each player.
r6740	r6741
1897	1888	KONAMI16_LSB( 4, IPT_UNKNOWN, IPT_START4 )
1898	1889
1899	1890	PORT_START("EEPROM")
1900		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	1891	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
1901	1892	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM status? - always 1 */
1902	1893	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* ?? TMNT2: OBJMPX */
1903	1894	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )   /* ?? TMNT2: NVBLK */
1904	1895	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* ?? TMNT2: IPL0 */
1905	1896	PORT_BIT( 0x60, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
1906	1897	PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
	1898
	1899	PORT_START( "EEPROMOUT" )
	1900	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	1901	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	1902	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
1907	1903	INPUT_PORTS_END
1908	1904
1909	1905	/* Version for the bootleg, which has the service switch a little different */
r6740	r6741
1931	1927	KONAMI16_LSB( 4, IPT_UNKNOWN, IPT_START4 )
1932	1928
1933	1929	PORT_START("EEPROM")
1934		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	1930	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
1935	1931	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM status? - always 1 */
1936	1932	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1937	1933	PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
1938	1934	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1939	1935	PORT_BIT( 0x60, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
1940	1936	PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
	1937
	1938	PORT_START( "EEPROMOUT" )
	1939	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	1940	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	1941	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
1941	1942	INPUT_PORTS_END
1942	1943
1943	1944	static INPUT_PORTS_START( qgakumon )
r6740	r6741
1978	1979	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1979	1980
1980	1981	PORT_START("EEPROM")
1981		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	1982	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
1982	1983	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM status? - always 1 */
1983	1984	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* ?? TMNT2: OBJMPX */
1984	1985	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )   /* ?? TMNT2: NVBLK (needs to be ACTIVE_HIGH to avoid problems) */
1985	1986	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* ?? TMNT2: IPL0 */
1986	1987	PORT_BIT( 0x60, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
1987	1988	PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
	1989
	1990	PORT_START( "EEPROMOUT" )
	1991	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	1992	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	1993	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
1988	1994	INPUT_PORTS_END
1989	1995
1990	1996	static INPUT_PORTS_START( thndrx2 )
r6740	r6741
2001	2007
2002	2008	PORT_START("P2/EEPROM")
2003	2009	KONAMI16_LSB( 2, IPT_UNKNOWN, IPT_START2 )
2004		PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	2010	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
2005	2011	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM status? - always 1 */
2006	2012	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
2007	2013	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* VBLK?? */
r6740	r6741
2009	2015	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
2010	2016	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
2011	2017	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2018
	2019	PORT_START( "EEPROMOUT" )
	2020	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	2021	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	2022	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
2012	2023	INPUT_PORTS_END
2013	2024
2014	2025	static INPUT_PORTS_START( prmrsocr )
r6740	r6741
2033	2044
2034	2045	PORT_START("P2/EEPROM")
2035	2046	KONAMI16_LSB( 2, IPT_UNKNOWN, IPT_START2 )
2036		PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	2047	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
2037	2048	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM status? - always 1 */
2038	2049	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN2 )
2039	2050	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
2041	2052	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
2042	2053	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
2043	2054	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	2055
	2056	PORT_START( "EEPROMOUT" )
	2057	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	2058	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	2059	PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
2044	2060	INPUT_PORTS_END
2045	2061
2046	2062
r6740	r6741
2072	2088	tmnt_decode_sample
2073	2089	};
2074	2090
	2091
	2092	/* 052109 interfaces */
	2093	static const k052109_interface cuebrick_k052109_intf =
	2094	{
	2095	"gfx1", 0,
	2096	NORMAL_PLANE_ORDER,
	2097	KONAMI_ROM_SHUFFLE8,
	2098	cuebrick_tile_callback
	2099	};
	2100
	2101	static const k052109_interface mia_k052109_intf =
	2102	{
	2103	"gfx1", 0,
	2104	NORMAL_PLANE_ORDER,
	2105	KONAMI_ROM_DEINTERLEAVE_2,
	2106	mia_tile_callback
	2107	};
	2108
	2109	static const k052109_interface tmnt_k052109_intf =
	2110	{
	2111	"gfx1", 0,
	2112	NORMAL_PLANE_ORDER,
	2113	KONAMI_ROM_DEINTERLEAVE_2,
	2114	tmnt_tile_callback
	2115	};
	2116
	2117	static const k052109_interface glfgreat_k052109_intf =
	2118	{
	2119	"gfx1", 1,
	2120	NORMAL_PLANE_ORDER,
	2121	KONAMI_ROM_SHUFFLE8,
	2122	tmnt_tile_callback
	2123	};
	2124
	2125	static const k052109_interface sunsetbl_k052109_intf =
	2126	{
	2127	"gfx1", 0,
	2128	NORMAL_PLANE_ORDER,
	2129	KONAMI_ROM_DEINTERLEAVE_2,
	2130	ssbl_tile_callback
	2131	};
	2132
	2133	static const k052109_interface blswhstl_k052109_intf =
	2134	{
	2135	"gfx1", 0,
	2136	NORMAL_PLANE_ORDER,
	2137	KONAMI_ROM_DEINTERLEAVE_2,
	2138	blswhstl_tile_callback
	2139	};
	2140
	2141	/* 053245 interfaces */
	2142	static const k05324x_interface lgtnfght_k05324x_intf =
	2143	{
	2144	"gfx2", 1,
	2145	NORMAL_PLANE_ORDER,
	2146	0, 0,
	2147	KONAMI_ROM_DEINTERLEAVE_2,
	2148	lgtnfght_sprite_callback
	2149	};
	2150
	2151	static const k05324x_interface prmrsocr_k05324x_intf =
	2152	{
	2153	"gfx2", 2,
	2154	NORMAL_PLANE_ORDER,
	2155	0, 0,
	2156	KONAMI_ROM_SHUFFLE8,
	2157	prmrsocr_sprite_callback
	2158	};
	2159
	2160	static const k05324x_interface blswhstl_k05324x_intf =
	2161	{
	2162	"gfx2", 1,
	2163	NORMAL_PLANE_ORDER,
	2164	0, 0,
	2165	KONAMI_ROM_DEINTERLEAVE_2,
	2166	blswhstl_sprite_callback
	2167	};
	2168
	2169	static const k05324x_interface glfgreat_k05324x_intf =
	2170	{
	2171	"gfx2", 2,
	2172	NORMAL_PLANE_ORDER,
	2173	0, 0,
	2174	KONAMI_ROM_SHUFFLE8,
	2175	lgtnfght_sprite_callback
	2176	};
	2177
	2178	/* 051960 interfaces */
	2179	static const k051960_interface cuebrick_k051960_intf =
	2180	{
	2181	"gfx2", 1,
	2182	REVERSE_PLANE_ORDER,
	2183	KONAMI_ROM_SHUFFLE8,
	2184	mia_sprite_callback
	2185	};
	2186
	2187	static const k051960_interface mia_k051960_intf =
	2188	{
	2189	"gfx2", 1,
	2190	REVERSE_PLANE_ORDER,
	2191	KONAMI_ROM_DEINTERLEAVE_2,
	2192	mia_sprite_callback
	2193	};
	2194
	2195	static const k051960_interface tmnt_k051960_intf =
	2196	{
	2197	"gfx2", 1,
	2198	REVERSE_PLANE_ORDER,
	2199	KONAMI_ROM_DEINTERLEAVE_2,
	2200	tmnt_sprite_callback
	2201	};
	2202
	2203	static const k051960_interface punkshot_k051960_intf =
	2204	{
	2205	"gfx2", 1,
	2206	NORMAL_PLANE_ORDER,
	2207	KONAMI_ROM_DEINTERLEAVE_2,
	2208	punkshot_sprite_callback
	2209	};
	2210
	2211	static const k051960_interface thndrx2_k051960_intf =
	2212	{
	2213	"gfx2", 1,
	2214	NORMAL_PLANE_ORDER,
	2215	KONAMI_ROM_DEINTERLEAVE_2,
	2216	thndrx2_sprite_callback
	2217	};
	2218
	2219
	2220	/* 053936 interfaces */
	2221	static const k053936_interface glfgreat_k053936_interface =
	2222	{
	2223	1, 85, 0      /* wrap, xoff, yoff */
	2224	};
	2225
	2226	static const k053936_interface prmrsocr_k053936_interface =
	2227	{
	2228	0, 85, 1      /* wrap, xoff, yoff */
	2229	};
	2230
	2231
2075	2232	static MACHINE_DRIVER_START( cuebrick )
2076	2233
2077	2234	/* basic machine hardware */
r6740	r6741
2095	2252	MDRV_VIDEO_START(cuebrick)
2096	2253	MDRV_VIDEO_UPDATE(mia)
2097	2254
	2255	MDRV_K052109_ADD("k052109", cuebrick_k052109_intf)
	2256	MDRV_K051960_ADD("k051960", cuebrick_k051960_intf)
	2257
2098	2258	/* sound hardware */
2099	2259	MDRV_SPEAKER_STANDARD_MONO("mono")
2100	2260
r6740	r6741
2130	2290	MDRV_VIDEO_START(mia)
2131	2291	MDRV_VIDEO_UPDATE(mia)
2132	2292
	2293	MDRV_K052109_ADD("k052109", mia_k052109_intf)
	2294	MDRV_K051960_ADD("k051960", mia_k051960_intf)
	2295
2133	2296	/* sound hardware */
2134	2297	MDRV_SPEAKER_STANDARD_MONO("mono")
2135	2298
r6740	r6741
2179	2342	MDRV_VIDEO_START(tmnt)
2180	2343	MDRV_VIDEO_UPDATE(tmnt)
2181	2344
	2345	MDRV_K052109_ADD("k052109", tmnt_k052109_intf)
	2346	MDRV_K051960_ADD("k051960", tmnt_k051960_intf)
	2347
2182	2348	/* sound hardware */
2183	2349	MDRV_SPEAKER_STANDARD_MONO("mono")
2184	2350
r6740	r6741
2223	2389
2224	2390	MDRV_PALETTE_LENGTH(2048)
2225	2391
2226		MDRV_VIDEO_START(punkshot)
2227	2392	MDRV_VIDEO_UPDATE(punkshot)
2228	2393
	2394	MDRV_K052109_ADD("k052109", tmnt_k052109_intf)
	2395	MDRV_K051960_ADD("k051960", punkshot_k051960_intf)
	2396	MDRV_K053251_ADD("k053251")
	2397
2229	2398	/* sound hardware */
2230	2399	MDRV_SPEAKER_STANDARD_MONO("mono")
2231	2400
r6740	r6741
2263	2432	MDRV_VIDEO_START(lgtnfght)
2264	2433	MDRV_VIDEO_UPDATE(lgtnfght)
2265	2434
	2435	MDRV_K052109_ADD("k052109", tmnt_k052109_intf)
	2436	MDRV_K053245_ADD("k053245", lgtnfght_k05324x_intf)
	2437	MDRV_K053251_ADD("k053251")
	2438
2266	2439	/* sound hardware */
2267	2440	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2268	2441
r6740	r6741
2287	2460	MDRV_CPU_PROGRAM_MAP(ssriders_audio_map)
2288	2461	/* NMIs are generated by the 053260 */
2289	2462
2290		MDRV_NVRAM_HANDLER(eeprom)
	2463	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
2291	2464
2292	2465	/* video hardware */
2293	2466	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
r6740	r6741
2301	2474
2302	2475	MDRV_PALETTE_LENGTH(2048)
2303	2476
2304		MDRV_VIDEO_START(blswhstl)
2305	2477	MDRV_VIDEO_UPDATE(lgtnfght)
2306	2478	MDRV_VIDEO_EOF( blswhstl )
2307	2479
	2480	MDRV_K052109_ADD("k052109", blswhstl_k052109_intf)
	2481	MDRV_K053245_ADD("k053245", blswhstl_k05324x_intf)
	2482	MDRV_K053251_ADD("k053251")
	2483	MDRV_K054000_ADD("k054000")
	2484
2308	2485	/* sound hardware */
2309	2486	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2310	2487
r6740	r6741
2362	2539	MDRV_VIDEO_START(glfgreat)
2363	2540	MDRV_VIDEO_UPDATE(glfgreat)
2364	2541
	2542	MDRV_K052109_ADD("k052109", glfgreat_k052109_intf)
	2543	MDRV_K053245_ADD("k053245", glfgreat_k05324x_intf)
	2544	MDRV_K053936_ADD("k053936", glfgreat_k053936_interface)
	2545	MDRV_K053251_ADD("k053251")
	2546
2365	2547	/* sound hardware */
2366	2548	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2367	2549
r6740	r6741
2394	2576	MDRV_CPU_PROGRAM_MAP(prmrsocr_audio_map)
2395	2577	/* NMIs are generated by the 054539 */
2396	2578
2397		MDRV_NVRAM_HANDLER(thndrx2)
	2579	MDRV_EEPROM_NODEFAULT_ADD("eeprom", thndrx2_eeprom_intf)
2398	2580
2399	2581	/* video hardware */
2400	2582	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
r6740	r6741
2412	2594	MDRV_VIDEO_START(prmrsocr)
2413	2595	MDRV_VIDEO_UPDATE(glfgreat)
2414	2596
	2597	MDRV_K052109_ADD("k052109", glfgreat_k052109_intf)
	2598	MDRV_K053245_ADD("k053245", prmrsocr_k05324x_intf)
	2599	MDRV_K053936_ADD("k053936", prmrsocr_k053936_interface)
	2600	MDRV_K053251_ADD("k053251")
	2601
2415	2602	/* sound hardware */
2416	2603	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2417	2604
r6740	r6741
2437	2624	MDRV_CPU_PROGRAM_MAP(ssriders_audio_map)
2438	2625	/* NMIs are generated by the 053260 */
2439	2626
2440		MDRV_NVRAM_HANDLER(eeprom)
	2627	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
2441	2628
2442	2629	/* video hardware */
2443	2630	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
r6740	r6741
2454	2641	MDRV_VIDEO_START(lgtnfght)
2455	2642	MDRV_VIDEO_UPDATE(tmnt2)
2456	2643
	2644	MDRV_K052109_ADD("k052109", tmnt_k052109_intf)
	2645	MDRV_K053245_ADD("k053245", lgtnfght_k05324x_intf)
	2646	MDRV_K053251_ADD("k053251")
	2647
2457	2648	/* sound hardware */
2458	2649	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2459	2650
r6740	r6741
2478	2669	MDRV_CPU_PROGRAM_MAP(ssriders_audio_map)
2479	2670	/* NMIs are generated by the 053260 */
2480	2671
2481		MDRV_NVRAM_HANDLER(eeprom)
	2672	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
2482	2673
2483	2674	/* video hardware */
2484	2675	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
r6740	r6741
2495	2686	MDRV_VIDEO_START(lgtnfght)
2496	2687	MDRV_VIDEO_UPDATE(tmnt2)
2497	2688
	2689	MDRV_K052109_ADD("k052109", tmnt_k052109_intf)
	2690	MDRV_K053245_ADD("k053245", lgtnfght_k05324x_intf)
	2691	MDRV_K053251_ADD("k053251")
	2692
2498	2693	/* sound hardware */
2499	2694	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2500	2695
r6740	r6741
2515	2710	MDRV_CPU_PROGRAM_MAP(sunsetbl_main_map)
2516	2711	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
2517	2712
2518		MDRV_NVRAM_HANDLER(eeprom)
	2713	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
2519	2714
2520	2715	/* video hardware */
2521	2716	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
r6740	r6741
2529	2724
2530	2725	MDRV_PALETTE_LENGTH(2048)
2531	2726
2532		MDRV_VIDEO_START(sunsetbl)
	2727	MDRV_K052109_ADD("k052109", sunsetbl_k052109_intf)
	2728	MDRV_K053245_ADD("k053245", lgtnfght_k05324x_intf)
	2729	MDRV_K053251_ADD("k053251")
	2730
2533	2731	MDRV_VIDEO_UPDATE(tmnt2)
2534	2732
2535	2733	/* sound hardware */
r6740	r6741
2552	2750	MDRV_CPU_PROGRAM_MAP(thndrx2_audio_map)
2553	2751	/* NMIs are generated by the 053260 */
2554	2752
2555		MDRV_NVRAM_HANDLER(thndrx2)
	2753	MDRV_EEPROM_NODEFAULT_ADD("eeprom", thndrx2_eeprom_intf)
2556	2754
2557	2755	/* video hardware */
2558	2756	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS)
r6740	r6741
2566	2764
2567	2765	MDRV_PALETTE_LENGTH(2048)
2568	2766
2569		MDRV_VIDEO_START(thndrx2)
2570	2767	MDRV_VIDEO_UPDATE(thndrx2)
2571	2768
	2769	MDRV_K052109_ADD("k052109", tmnt_k052109_intf)
	2770	MDRV_K051960_ADD("k051960", thndrx2_k051960_intf)
	2771	MDRV_K053251_ADD("k053251")
	2772	MDRV_K054000_ADD("k054000")
	2773
2572	2774	/* sound hardware */
2573	2775	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
2574	2776
r6740	r6741
3690	3892	ROM_LOAD( "101a06.1d",    0x0000, 0x200000, CRC(4f48e043) SHA1(f50e8642d9d3a028c243777640e7cd13da1abf86) )
3691	3893	ROM_END
3692	3894
3693		static DRIVER_INIT( gfx )
3694		{
3695		konami_rom_deinterleave_2(machine, "gfx1");
3696		konami_rom_deinterleave_2(machine, "gfx2");
3697		}
3698	3895
3699	3896	static DRIVER_INIT( mia )
3700	3897	{
r6740	r6741
3704	3901	int bits[32];
3705	3902	UINT8 *temp;
3706	3903
3707
3708		DRIVER_INIT_CALL(gfx);
3709
3710	3904	/*
3711	3905	along with the normal byte reordering, TMNT also needs the bits to
3712	3906	be shuffled around because the ROMs are connected differently to the
r6740	r6741
3800	3994	int bits[32];
3801	3995	UINT8 *temp;
3802	3996
3803
3804		DRIVER_INIT_CALL(gfx);
3805
3806	3997	/*
3807	3998	along with the normal byte reordering, TMNT also needs the bits to
3808	3999	be shuffled around because the ROMs are connected differently to the
r6740	r6741
3900	4091	free(temp);
3901	4092	}
3902	4093
3903		static void shuffle(UINT8 *buf,int len)
3904		{
3905		int i;
3906		UINT8 t;
3907
3908		if (len == 2) return;
3909
3910		if (len % 4) fatalerror("shuffle() - not modulo 4");   /* must not happen */
3911
3912		len /= 2;
3913
3914		for (i = 0;i < len/2;i++)
3915		{
3916		t = buf[len/2 + i];
3917		buf[len/2 + i] = buf[len + i];
3918		buf[len + i] = t;
3919		}
3920
3921		shuffle(buf,len);
3922		shuffle(buf + len,len);
3923		}
3924
3925		static DRIVER_INIT( glfgreat )
3926		{
3927		/* ROMs are interleaved at byte level */
3928		shuffle(memory_region(machine, "gfx1"),memory_region_length(machine, "gfx1"));
3929		shuffle(memory_region(machine, "gfx2"),memory_region_length(machine, "gfx2"));
3930		}
3931
3932	4094	static DRIVER_INIT( cuebrick )
3933	4095	{
3934	4096	machine->generic.nvram.u8 = (UINT8 *)cuebrick_nvram;
3935	4097	machine->generic.nvram_size = 0x400*0x20;
3936
3937		/* ROMs are interleaved at byte level */
3938		shuffle(memory_region(machine, "gfx1"),memory_region_length(machine, "gfx1"));
3939		shuffle(memory_region(machine, "gfx2"),memory_region_length(machine, "gfx2"));
3940	4098	}
3941	4099
3942	4100	GAME( 1989, cuebrick, 0,        cuebrick, cuebrick, cuebrick, ROT0,  "Konami", "Cue Brick (World version D)", 0 )
r6740	r6741
3954	4112	GAME( 1990, tmnt2pj,  tmnt,     tmnt,     tmnt2p,   tmnt,     ROT0,  "Konami", "Teenage Mutant Ninja Turtles (Japan 2 Players)", 0 )
3955	4113	GAME( 1989, tmnt2po,  tmnt,     tmnt,     tmnt2p,   tmnt,     ROT0,  "Konami", "Teenage Mutant Ninja Turtles (Oceania 2 Players)", 0 )
3956	4114
3957		GAME( 1990, punkshot, 0,        punkshot, punkshot, gfx,      ROT0,  "Konami", "Punk Shot (US 4 Players)", 0 )
3958		GAME( 1990, punkshot2,punkshot, punkshot, punksht2, gfx,      ROT0,  "Konami", "Punk Shot (US 2 Players)", 0 )
3959		GAME( 1990, punkshotj,punkshot, punkshot, punksht2, gfx,      ROT0,  "Konami", "Punk Shot (Japan 2 Players)", 0 )
	4115	GAME( 1990, punkshot, 0,        punkshot, punkshot, 0,      ROT0,  "Konami", "Punk Shot (US 4 Players)", 0 )
	4116	GAME( 1990, punkshot2,punkshot, punkshot, punksht2, 0,      ROT0,  "Konami", "Punk Shot (US 2 Players)", 0 )
	4117	GAME( 1990, punkshotj,punkshot, punkshot, punksht2, 0,      ROT0,  "Konami", "Punk Shot (Japan 2 Players)", 0 )
3960	4118
3961		GAME( 1990, lgtnfght, 0,        lgtnfght, lgtnfght, gfx,      ROT90, "Konami", "Lightning Fighters (World)", 0 )
3962		GAME( 1990, lgtnfghta,lgtnfght, lgtnfght, lgtnfght, gfx,      ROT90, "Konami", "Lightning Fighters (Asia)", 0 )
3963		GAME( 1990, lgtnfghtu,lgtnfght, lgtnfght, lgtnfght, gfx,      ROT90, "Konami", "Lightning Fighters (US)", 0 )
3964		GAME( 1990, trigon,   lgtnfght, lgtnfght, lgtnfght, gfx,      ROT90, "Konami", "Trigon (Japan)", 0 )
	4119	GAME( 1990, lgtnfght, 0,        lgtnfght, lgtnfght, 0,      ROT90, "Konami", "Lightning Fighters (World)", 0 )
	4120	GAME( 1990, lgtnfghta,lgtnfght, lgtnfght, lgtnfght, 0,      ROT90, "Konami", "Lightning Fighters (Asia)", 0 )
	4121	GAME( 1990, lgtnfghtu,lgtnfght, lgtnfght, lgtnfght, 0,      ROT90, "Konami", "Lightning Fighters (US)", 0 )
	4122	GAME( 1990, trigon,   lgtnfght, lgtnfght, lgtnfght, 0,      ROT90, "Konami", "Trigon (Japan)", 0 )
3965	4123
3966		GAME( 1991, blswhstl, 0,        blswhstl, blswhstl, gfx,      ROT90, "Konami", "Bells & Whistles (Version L)", 0 )
3967		GAME( 1991, detatwin, blswhstl, blswhstl, blswhstl, gfx,      ROT90, "Konami", "Detana!! Twin Bee (Japan ver. J)", 0 )
	4124	GAME( 1991, blswhstl, 0,        blswhstl, blswhstl, 0,      ROT90, "Konami", "Bells & Whistles (Version L)", 0 )
	4125	GAME( 1991, detatwin, blswhstl, blswhstl, blswhstl, 0,      ROT90, "Konami", "Detana!! Twin Bee (Japan ver. J)", 0 )
3968	4126
3969		GAME( 1991, glfgreat, 0,        glfgreat, glfgreat, glfgreat, ROT0,  "Konami", "Golfing Greats", GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
3970		GAME( 1991, glfgreatj,glfgreat, glfgreat, glfgreat, glfgreat, ROT0,  "Konami", "Golfing Greats (Japan)", GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
	4127	GAME( 1991, glfgreat, 0,        glfgreat, glfgreat, 0, ROT0,  "Konami", "Golfing Greats", GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
	4128	GAME( 1991, glfgreatj,glfgreat, glfgreat, glfgreat, 0, ROT0,  "Konami", "Golfing Greats (Japan)", GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
3971	4129
3972		GAME( 1991, tmnt2,    0,        tmnt2,    ssridr4p, gfx,      ROT0,  "Konami", "Teenage Mutant Ninja Turtles - Turtles in Time (4 Players ver UAA)", 0 ) // ver. UAA
3973		GAME( 1991, tmnt2a,   tmnt2,    tmnt2,    ssrid4ps, gfx,      ROT0,  "Konami", "Teenage Mutant Ninja Turtles - Turtles in Time (4 Players ver ADA)", 0 ) // ver. ADA
3974		GAME( 1991, tmht22pe, tmnt2,    tmnt2,    ssriders, gfx,      ROT0,  "Konami", "Teenage Mutant Hero Turtles - Turtles in Time (2 Players ver EBA)",  0 ) // ver. EBA
3975		GAME( 1991, tmnt22pu, tmnt2,    tmnt2,    ssriders, gfx,      ROT0,  "Konami", "Teenage Mutant Ninja Turtles - Turtles in Time (2 Players ver UDA)", 0 ) // ver. UDA
	4130	GAME( 1991, tmnt2,    0,        tmnt2,    ssridr4p, 0,      ROT0,  "Konami", "Teenage Mutant Ninja Turtles - Turtles in Time (4 Players ver UAA)", 0 ) // ver. UAA
	4131	GAME( 1991, tmnt2a,   tmnt2,    tmnt2,    ssrid4ps, 0,      ROT0,  "Konami", "Teenage Mutant Ninja Turtles - Turtles in Time (4 Players ver ADA)", 0 ) // ver. ADA
	4132	GAME( 1991, tmht22pe, tmnt2,    tmnt2,    ssriders, 0,      ROT0,  "Konami", "Teenage Mutant Hero Turtles - Turtles in Time (2 Players ver EBA)",  0 ) // ver. EBA
	4133	GAME( 1991, tmnt22pu, tmnt2,    tmnt2,    ssriders, 0,      ROT0,  "Konami", "Teenage Mutant Ninja Turtles - Turtles in Time (2 Players ver UDA)", 0 ) // ver. UDA
3976	4134
3977		GAME( 1993, qgakumon, 0,        tmnt2,    qgakumon, gfx,      ROT0,  "Konami", "Quiz Gakumon no Susume (Japan ver. JA2 Type L)", 0 )
	4135	GAME( 1993, qgakumon, 0,        tmnt2,    qgakumon, 0,      ROT0,  "Konami", "Quiz Gakumon no Susume (Japan ver. JA2 Type L)", 0 )
3978	4136
3979		GAME( 1991, ssriders,    0,        ssriders, ssridr4p, gfx,      ROT0,  "Konami", "Sunset Riders (4 Players ver EAC)", GAME_IMPERFECT_GRAPHICS )
3980		GAME( 1991, ssridersebd, ssriders, ssriders, ssriders, gfx,      ROT0,  "Konami", "Sunset Riders (2 Players ver EBD)", GAME_IMPERFECT_GRAPHICS )
3981		GAME( 1991, ssridersebc, ssriders, ssriders, ssriders, gfx,      ROT0,  "Konami", "Sunset Riders (2 Players ver EBC)", GAME_IMPERFECT_GRAPHICS )
3982		GAME( 1991, ssridersuda, ssriders, ssriders, ssrid4ps, gfx,      ROT0,  "Konami", "Sunset Riders (4 Players ver UDA)", GAME_IMPERFECT_GRAPHICS )
3983		GAME( 1991, ssriderseaa, ssriders, ssriders, ssrid4ps, gfx,      ROT0,  "Konami", "Sunset Riders (4 Players ver EAA)", GAME_IMPERFECT_GRAPHICS )
3984		GAME( 1991, ssridersuac, ssriders, ssriders, ssridr4p, gfx,      ROT0,  "Konami", "Sunset Riders (4 Players ver UAC)", GAME_IMPERFECT_GRAPHICS )
3985		GAME( 1991, ssridersubc, ssriders, ssriders, ssriders, gfx,      ROT0,  "Konami", "Sunset Riders (2 Players ver UBC)", GAME_IMPERFECT_GRAPHICS )
3986		GAME( 1991, ssridersabd, ssriders, ssriders, ssriders, gfx,      ROT0,  "Konami", "Sunset Riders (2 Players ver ABD)", GAME_IMPERFECT_GRAPHICS )
3987		GAME( 1991, ssridersadd, ssriders, ssriders, ssrid4ps, gfx,      ROT0,  "Konami", "Sunset Riders (4 Players ver ADD)", GAME_IMPERFECT_GRAPHICS )
3988		GAME( 1991, ssridersjbd, ssriders, ssriders, ssriders, gfx,      ROT0,  "Konami", "Sunset Riders (2 Players ver JBD)", GAME_IMPERFECT_GRAPHICS )
3989		GAME( 1991, ssridersb,   ssriders, sunsetbl, sunsetbl, gfx,      ROT0,  "Konami", "Sunset Riders (bootleg 4 Players ver ADD)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS )
	4137	GAME( 1991, ssriders,    0,        ssriders, ssridr4p, 0,      ROT0,  "Konami", "Sunset Riders (4 Players ver EAC)", GAME_IMPERFECT_GRAPHICS )
	4138	GAME( 1991, ssridersebd, ssriders, ssriders, ssriders, 0,      ROT0,  "Konami", "Sunset Riders (2 Players ver EBD)", GAME_IMPERFECT_GRAPHICS )
	4139	GAME( 1991, ssridersebc, ssriders, ssriders, ssriders, 0,      ROT0,  "Konami", "Sunset Riders (2 Players ver EBC)", GAME_IMPERFECT_GRAPHICS )
	4140	GAME( 1991, ssridersuda, ssriders, ssriders, ssrid4ps, 0,      ROT0,  "Konami", "Sunset Riders (4 Players ver UDA)", GAME_IMPERFECT_GRAPHICS )
	4141	GAME( 1991, ssriderseaa, ssriders, ssriders, ssrid4ps, 0,      ROT0,  "Konami", "Sunset Riders (4 Players ver EAA)", GAME_IMPERFECT_GRAPHICS )
	4142	GAME( 1991, ssridersuac, ssriders, ssriders, ssridr4p, 0,      ROT0,  "Konami", "Sunset Riders (4 Players ver UAC)", GAME_IMPERFECT_GRAPHICS )
	4143	GAME( 1991, ssridersubc, ssriders, ssriders, ssriders, 0,      ROT0,  "Konami", "Sunset Riders (2 Players ver UBC)", GAME_IMPERFECT_GRAPHICS )
	4144	GAME( 1991, ssridersabd, ssriders, ssriders, ssriders, 0,      ROT0,  "Konami", "Sunset Riders (2 Players ver ABD)", GAME_IMPERFECT_GRAPHICS )
	4145	GAME( 1991, ssridersadd, ssriders, ssriders, ssrid4ps, 0,      ROT0,  "Konami", "Sunset Riders (4 Players ver ADD)", GAME_IMPERFECT_GRAPHICS )
	4146	GAME( 1991, ssridersjbd, ssriders, ssriders, ssriders, 0,      ROT0,  "Konami", "Sunset Riders (2 Players ver JBD)", GAME_IMPERFECT_GRAPHICS )
	4147	GAME( 1991, ssridersb,   ssriders, sunsetbl, sunsetbl, 0,      ROT0,  "Konami", "Sunset Riders (bootleg 4 Players ver ADD)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS )
3990	4148
3991		GAME( 1991, thndrx2,  0,        thndrx2,  thndrx2,  gfx,      ROT0,  "Konami", "Thunder Cross II (World)", 0 )
3992		GAME( 1991, thndrx2a, thndrx2,  thndrx2,  thndrx2,  gfx,      ROT0,  "Konami", "Thunder Cross II (Asia)", 0 )
3993		GAME( 1991, thndrx2j, thndrx2,  thndrx2,  thndrx2,  gfx,      ROT0,  "Konami", "Thunder Cross II (Japan)", 0 )
	4149	GAME( 1991, thndrx2,  0,        thndrx2,  thndrx2,  0,      ROT0,  "Konami", "Thunder Cross II (World)", 0 )
	4150	GAME( 1991, thndrx2a, thndrx2,  thndrx2,  thndrx2,  0,      ROT0,  "Konami", "Thunder Cross II (Asia)", 0 )
	4151	GAME( 1991, thndrx2j, thndrx2,  thndrx2,  thndrx2,  0,      ROT0,  "Konami", "Thunder Cross II (Japan)", 0 )
3994	4152
3995		GAME( 1993, prmrsocr, 0,        prmrsocr, prmrsocr, glfgreat, ROT0,  "Konami", "Premier Soccer (ver EAB)", 0 )
3996		GAME( 1993, prmrsocrj,prmrsocr, prmrsocr, prmrsocr, glfgreat, ROT0,  "Konami", "Premier Soccer (ver JAB)", 0 )
	4153	GAME( 1993, prmrsocr, 0,        prmrsocr, prmrsocr, 0, ROT0,  "Konami", "Premier Soccer (ver EAB)", 0 )
	4154	GAME( 1993, prmrsocrj,prmrsocr, prmrsocr, prmrsocr, 0, ROT0,  "Konami", "Premier Soccer (ver JAB)", 0 )

src/mame/drivers/mogura.c

r6740	r6741
3	3	#include "driver.h"
4	4	#include "cpu/z80/z80.h"
5	5	#include "sound/dac.h"
6		#include "konamipt.h"
	6	#include "includes/konamipt.h"
7	7
8	8	static UINT8 *mogura_tileram;
9	9	static UINT8* mogura_gfxram;

src/mame/drivers/taitojc.c

r6740	r6741
352	352	#include "driver.h"
353	353	#include "cpu/tms32051/tms32051.h"
354	354	#include "cpu/m68000/m68000.h"
355		#include "taito_f3.h"
	355	#include "includes/taito_f3.h"
356	356	#include "cpu/mc68hc11/mc68hc11.h"
357	357	#include "sound/es5506.h"
358	358	#include "machine/eepromdev.h"
r6740	r6741
1298	1298	memset(projection_data, 0, sizeof(projection_data));
1299	1299	memset(intersection_data, 0, sizeof(intersection_data));
1300	1300
1301		taito_f3_soundsystem_reset(machine);
1302
1303		f3_68681_reset(machine);
1304
1305	1301	// hold the TMS in reset until we have code
1306	1302	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
1307	1303	}
r6740	r6741
1329	1325	MDRV_CPU_VBLANK_INT("screen", taitojc_vblank)
1330	1326	MDRV_CPU_PERIODIC_INT(taitojc_int6, 1000)
1331	1327
1332		TAITO_F3_SOUND_SYSTEM_CPU(16000000)
1333
1334	1328	MDRV_CPU_ADD("sub", MC68HC11, 4000000) //MC68HC11M0
1335	1329	MDRV_CPU_PROGRAM_MAP(hc11_pgm_map)
1336	1330	MDRV_CPU_IO_MAP(hc11_io_map)
r6740	r6741
1358	1352	MDRV_VIDEO_UPDATE(taitojc)
1359	1353
1360	1354	/* sound hardware */
1361		TAITO_F3_SOUND_SYSTEM_ES5505(30476100/2)
	1355	MDRV_IMPORT_FROM(taito_f3_sound)
1362	1356	MACHINE_DRIVER_END
1363	1357
1364	1358	static DRIVER_INIT( taitojc )

src/mame/drivers/berzerk.c

r6740	r6741
10	10
11	11	#include "driver.h"
12	12	#include "cpu/z80/z80.h"
13		#include "exidy.h"
	13	#include "includes/exidy.h"
14	14	#include "machine/74181.h"
15	15	#include "sound/s14001a.h"
16	16	#include "video/resnet.h"

src/mame/drivers/suprridr.c

r6740	r6741
81	81
82	82	#include "driver.h"
83	83	#include "cpu/z80/z80.h"
84		#include "suprridr.h"
	84	#include "includes/suprridr.h"
85	85	#include "sound/ay8910.h"
86	86
87	87	static UINT8 nmi_enable;

src/mame/drivers/spy.c

r6740	r6741
20	20	#include "driver.h"
21	21	#include "cpu/z80/z80.h"
22	22	#include "cpu/m6809/m6809.h"
23		#include "video/konamiic.h"
	23	#include "video/konicdev.h"
24	24	#include "sound/3812intf.h"
25	25	#include "sound/k007232.h"
26		#include "konamipt.h"
	26	#include "includes/konamipt.h"
27	27
28	28	VIDEO_START( spy );
29	29	VIDEO_UPDATE( spy );
30	30
31	31	static UINT8 *pmcram;
32	32
	33	extern void spy_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	34	extern void spy_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow);
33	35
	36
34	37	static INTERRUPT_GEN( spy_interrupt )
35	38	{
36		if (K052109_is_IRQ_enabled())
	39	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	40	if (k052109_is_irq_enabled(k052109))
37	41	cpu_set_input_line(device, 0, HOLD_LINE);
38	42	}
39	43
r6740	r6741
248	252
249	253	static WRITE8_HANDLER( spy_3f90_w )
250	254	{
	255	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
251	256	extern int spy_video_enable;
252	257	static int old;
253	258
r6740	r6741
290	295	********************************************************************/
291	296
292	297	/* bits 0/1 = coin counters */
293		coin_counter_w(space->machine, 0,data & 0x01);
294		coin_counter_w(space->machine, 1,data & 0x02);
	298	coin_counter_w(space->machine, 0, data & 0x01);
	299	coin_counter_w(space->machine, 1, data & 0x02);
295	300
296	301	/* bit 2 = enable char ROM reading through the video RAM */
297		K052109_set_RMRD_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	302	k052109_set_rmrd_line(k052109, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
298	303
299	304	/* bit 3 = disable video */
300	305	spy_video_enable = ~(data & 0x08);
r6740	r6741
351	356
352	357
353	358
	359	static READ8_HANDLER( k052109_051960_r )
	360	{
	361	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	362	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	363
	364	if (k052109_get_rmrd_line(k052109) == CLEAR_LINE)
	365	{
	366	if (offset >= 0x3800 && offset < 0x3808)
	367	return k051937_r(k051960, offset - 0x3800);
	368	else if (offset < 0x3c00)
	369	return k052109_r(k052109, offset);
	370	else
	371	return k051960_r(k051960, offset - 0x3c00);
	372	}
	373	else
	374	return k052109_r(k052109, offset);
	375	}
	376
	377	static WRITE8_HANDLER( k052109_051960_w )
	378	{
	379	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	380	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	381
	382	if (offset >= 0x3800 && offset < 0x3808)
	383	k051937_w(k051960, offset - 0x3800, data);
	384	else if (offset < 0x3c00)
	385	k052109_w(k052109, offset, data);
	386	else
	387	k051960_w(k051960, offset - 0x3c00, data);
	388	}
	389
354	390	static ADDRESS_MAP_START( spy_map, ADDRESS_SPACE_PROGRAM, 8 )
355	391	AM_RANGE(0x0000, 0x07ff) AM_READWRITE(spy_bankedram1_r,spy_bankedram1_w) AM_BASE(&ram)
356	392	AM_RANGE(0x0800, 0x1aff) AM_RAM
r6740	r6741
364	400	AM_RANGE(0x3fd2, 0x3fd2) AM_READ_PORT("P2")
365	401	AM_RANGE(0x3fd3, 0x3fd3) AM_READ_PORT("DSW1")
366	402	AM_RANGE(0x3fe0, 0x3fe0) AM_READ_PORT("DSW2")
367		AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_051960_r,K052109_051960_w)
	403	AM_RANGE(0x2000, 0x5fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
368	404	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
369	405	AM_RANGE(0x8000, 0xffff) AM_ROM
370	406	ADDRESS_MAP_END
r6740	r6741
373	409	AM_RANGE(0x0000, 0x7fff) AM_ROM
374	410	AM_RANGE(0x8000, 0x87ff) AM_RAM
375	411	AM_RANGE(0x9000, 0x9000) AM_WRITE(sound_bank_w)
376		AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE("konami1", k007232_r,k007232_w)
377		AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami2", k007232_r,k007232_w)
	412	AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE("konami1", k007232_r, k007232_w)
	413	AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami2", k007232_r, k007232_w)
378	414	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ymsnd", ym3812_r,ym3812_w)
379	415	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)
380	416	ADDRESS_MAP_END
r6740	r6741
468	504
469	505
470	506
	507	static const k052109_interface spy_k052109_intf =
	508	{
	509	"gfx1", 0,
	510	NORMAL_PLANE_ORDER,
	511	KONAMI_ROM_DEINTERLEAVE_2,
	512	spy_tile_callback
	513	};
	514
	515	static const k051960_interface spy_k051960_intf =
	516	{
	517	"gfx2", 1,
	518	NORMAL_PLANE_ORDER,
	519	KONAMI_ROM_DEINTERLEAVE_2,
	520	spy_sprite_callback
	521	};
	522
471	523	static MACHINE_DRIVER_START( spy )
472	524
473	525	/* basic machine hardware */
r6740	r6741
494	546	MDRV_VIDEO_START(spy)
495	547	MDRV_VIDEO_UPDATE(spy)
496	548
	549	MDRV_K052109_ADD("k052109", spy_k052109_intf)
	550	MDRV_K051960_ADD("k051960", spy_k051960_intf)
	551
497	552	/* sound hardware */
498	553	MDRV_SPEAKER_STANDARD_MONO("mono")
499	554
r6740	r6741
574	629	ROM_END
575	630
576	631
577
578		static void gfx_untangle(running_machine *machine)
579		{
580		konami_rom_deinterleave_2(machine, "gfx1");
581		konami_rom_deinterleave_2(machine, "gfx2");
582		}
583
584	632	static DRIVER_INIT( spy )
585	633	{
586	634	machine->generic.paletteram.u8 = &memory_region(machine, "maincpu")[0x28000];
587		pmcram =     &memory_region(machine, "maincpu")[0x28800];
588		gfx_untangle(machine);
	635	pmcram = &memory_region(machine, "maincpu")[0x28800];
589	636	}
590	637
591	638

src/mame/drivers/psikyo.c

r6740	r6741
66	66	#include "sound/2610intf.h"
67	67	#include "sound/ymf278b.h"
68	68	#include "sound/okim6295.h"
	69	#include "includes/psikyo.h"
69	70
70	71
71		/* Variables defined in video */
72
73		extern UINT32 *psikyo_vram_0, *psikyo_vram_1, *psikyo_vregs;
74		extern int psikyo_ka302c_banking;
75		extern UINT32* psikyo_bootleg_spritebuffer;
76
77		/* Functions defined in video */
78
79		WRITE32_HANDLER( psikyo_vram_0_w );
80		WRITE32_HANDLER( psikyo_vram_1_w );
81
82		VIDEO_START( psikyo );
83		VIDEO_EOF( psikyo );
84		VIDEO_UPDATE( psikyo );
85		VIDEO_START( sngkace );
86		VIDEO_UPDATE( psikyo_bootleg );
87
88		extern void psikyo_switch_banks( int tmap, int bank );
89
90		/* Variables only used here */
91
92		static UINT8 psikyo_soundlatch;
93		static int z80_nmi, mcu_status;
94
95		static MACHINE_RESET( psikyo )
96		{
97		z80_nmi = mcu_status = 0;
98		}
99
100
101	72	/***************************************************************************
102	73
103	74
r6740	r6741
108	79
109	80	static CUSTOM_INPUT( z80_nmi_r )
110	81	{
	82	psikyo_state *state = (psikyo_state *)field->port->machine->driver_data;
111	83	int ret = 0x00;
112	84
113		if (z80_nmi)
	85	if (state->z80_nmi)
114	86	{
115	87	ret = 0x01;
116	88
r6740	r6741
125	97
126	98	static CUSTOM_INPUT( mcu_status_r )
127	99	{
	100	psikyo_state *state = (psikyo_state *)field->port->machine->driver_data;
128	101	int ret = 0x00;
129	102
130	103	/* Don't know exactly what this bit is, but s1945 and tengai
r6740	r6741
141	114
142	115	Interestingly, s1945jn has the code that spins on this bit,
143	116	but said code is never reached.  Prototype? */
144		if (mcu_status)
	117	if (state->mcu_status)
145	118	ret = 0x01;
146	119
147		mcu_status = !mcu_status;   /* hack */
	120	state->mcu_status = !state->mcu_status;   /* hack */
148	121
149	122	return ret;
150	123	}
151	124
152	125	static READ32_HANDLER( sngkace_input_r )
153	126	{
154		switch(offset)
	127	switch (offset)
155	128	{
156	129	case 0x0:   return input_port_read(space->machine, "P1_P2");
157	130	case 0x1:   return input_port_read(space->machine, "DSW");
158	131	case 0x2:   return input_port_read(space->machine, "COIN");
159	132	default:   logerror("PC %06X - Read input %02X !\n", cpu_get_pc(space->cpu), offset * 2);
160		return 0;
	133	return 0;
161	134	}
162	135	}
163	136
164	137	static READ32_HANDLER( gunbird_input_r )
165	138	{
166		switch(offset)
	139	switch (offset)
167	140	{
168	141	case 0x0:   return input_port_read(space->machine, "P1_P2");
169	142	case 0x1:   return input_port_read(space->machine, "DSW");
170		default:   logerror("PC %06X - Read input %02X !\n", cpu_get_pc(space->cpu), offset*2);
171		return 0;
	143	default:   logerror("PC %06X - Read input %02X !\n", cpu_get_pc(space->cpu), offset * 2);
	144	return 0;
172	145	}
173	146	}
174	147
175	148
176	149	static TIMER_CALLBACK( psikyo_soundlatch_callback )
177	150	{
178		psikyo_soundlatch = param;
179		cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
180		z80_nmi = 1;
	151	psikyo_state *state = (psikyo_state *)machine->driver_data;
	152	state->soundlatch = param;
	153	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, ASSERT_LINE);
	154	state->z80_nmi = 1;
181	155	}
182	156
183	157	static WRITE32_HANDLER( psikyo_soundlatch_w )
r6740	r6741
214	188	0x00, 0x00, 0x32, 0x90, 0x00, 0x00, 0xac, 0x64, 0x00, 0x00, 0x2b, 0xc0
215	189	};
216	190
217		static UINT8 s1945_mcu_direction, s1945_mcu_latch1, s1945_mcu_latch2, s1945_mcu_inlatch, s1945_mcu_index;
218		static UINT8 s1945_mcu_latching, s1945_mcu_mode, s1945_mcu_control, s1945_mcu_bctrl;
219		static const UINT8 *s1945_mcu_table;
220
221		static void s1945_mcu_init(const UINT8 *mcu_table)
222		{
223		s1945_mcu_direction = 0x00;
224		s1945_mcu_inlatch = 0xff;
225		s1945_mcu_latch1 = 0xff;
226		s1945_mcu_latch2 = 0xff;
227		s1945_mcu_latching = 0x5;
228		s1945_mcu_control = 0xff;
229		s1945_mcu_index = 0;
230		s1945_mcu_mode = 0;
231		s1945_mcu_table = mcu_table;
232		s1945_mcu_bctrl = 0x00;
233		}
234
235	191	static WRITE32_HANDLER( s1945_mcu_w )
236	192	{
	193	psikyo_state *state = (psikyo_state *)space->machine->driver_data;
	194
237	195	// Accesses are always bytes, so resolve it
238	196	int suboff;
239		for(suboff=0; suboff < 3; suboff++)
240		if((0xff << (8*suboff)) & mem_mask)
	197
	198	for (suboff = 0; suboff < 3; suboff++)
	199	if ((0xff << (8 * suboff)) & mem_mask)
241	200	break;
242		data >>= 8*suboff;
243		offset = offset*4+4+(3-suboff);
	201	data >>= 8 * suboff;
	202	offset = offset * 4 + 4 + (3 - suboff);
244	203
245		switch(offset) {
	204	switch (offset)
	205	{
246	206	case 0x06:
247		s1945_mcu_inlatch = data;
	207	state->s1945_mcu_inlatch = data;
248	208	break;
249	209	case 0x08:
250		s1945_mcu_control = data;
	210	state->s1945_mcu_control = data;
251	211	break;
252	212	case 0x09:
253		s1945_mcu_direction = data;
	213	state->s1945_mcu_direction = data;
254	214	break;
255	215	case 0x07:
256		psikyo_switch_banks(1, (data >> 6) & 3);
257		psikyo_switch_banks(0, (data >> 4) & 3);
258		s1945_mcu_bctrl = data;
	216	psikyo_switch_banks(space->machine, 1, (data >> 6) & 3);
	217	psikyo_switch_banks(space->machine, 0, (data >> 4) & 3);
	218	state->s1945_mcu_bctrl = data;
259	219	break;
260	220	case 0x0b:
261		switch(data | (s1945_mcu_direction ? 0x100 : 0)) {
	221	switch (data | (state->s1945_mcu_direction ? 0x100 : 0))
	222	{
262	223	case 0x11c:
263		s1945_mcu_latching = 5;
264		s1945_mcu_index = s1945_mcu_inlatch;
	224	state->s1945_mcu_latching = 5;
	225	state->s1945_mcu_index = state->s1945_mcu_inlatch;
265	226	break;
266	227	case 0x013:
267		//          logerror("MCU: Table read index %02x\n", s1945_mcu_index);
268		s1945_mcu_latching = 1;
269		s1945_mcu_latch1 = s1945_mcu_table[s1945_mcu_index];
	228	//          logerror("MCU: Table read index %02x\n", state->s1945_mcu_index);
	229	state->s1945_mcu_latching = 1;
	230	state->s1945_mcu_latch1 = state->s1945_mcu_table[state->s1945_mcu_index];
270	231	break;
271	232	case 0x113:
272		s1945_mcu_mode = s1945_mcu_inlatch;
273		if(s1945_mcu_mode == 1) {
274		s1945_mcu_latching &= ~1;
275		s1945_mcu_latch2 = 0x55;
276		} else {
	233	state->s1945_mcu_mode = state->s1945_mcu_inlatch;
	234	if (state->s1945_mcu_mode == 1)
	235	{
	236	state->s1945_mcu_latching &= ~1;
	237	state->s1945_mcu_latch2 = 0x55;
	238	}
	239	else
	240	{
277	241	// Go figure.
278		s1945_mcu_latching &= ~1;
279		s1945_mcu_latching |= 2;
	242	state->s1945_mcu_latching &= ~1;
	243	state->s1945_mcu_latching |= 2;
280	244	}
281		s1945_mcu_latching &= ~4;
282		s1945_mcu_latch1 = s1945_mcu_inlatch;
	245	state->s1945_mcu_latching &= ~4;
	246	state->s1945_mcu_latch1 = state->s1945_mcu_inlatch;
283	247	break;
284	248	case 0x010:
285	249	case 0x110:
286		s1945_mcu_latching |= 4;
	250	state->s1945_mcu_latching |= 4;
287	251	break;
288	252	default:
289		//          logerror("MCU: function %02x, direction %02x, latch1 %02x, latch2 %02x (%x)\n", data, s1945_mcu_direction, s1945_mcu_latch1, s1945_mcu_latch2, cpu_get_pc(space->cpu));
	253	//          logerror("MCU: function %02x, direction %02x, latch1 %02x, latch2 %02x (%x)\n", data, state->s1945_mcu_direction, state->s1945_mcu_latch1, state->s1945_mcu_latch2, cpu_get_pc(space->cpu));
290	254	break;
291	255	}
292	256	break;
r6740	r6741
298	262
299	263	static READ32_HANDLER( s1945_mcu_r )
300	264	{
301		switch(offset) {
302		case 0: {
	265	psikyo_state *state = (psikyo_state *)space->machine->driver_data;
	266
	267	switch (offset)
	268	{
	269	case 0:
	270	{
303	271	UINT32 res;
304		if(s1945_mcu_control & 16) {
305		res = s1945_mcu_latching & 4 ? 0x0000ff00 : s1945_mcu_latch1 << 8;
306		s1945_mcu_latching |= 4;
307		} else {
308		res = s1945_mcu_latching & 1 ? 0x0000ff00 : s1945_mcu_latch2 << 8;
309		s1945_mcu_latching |= 1;
	272	if (state->s1945_mcu_control & 16)
	273	{
	274	res = state->s1945_mcu_latching & 4 ? 0x0000ff00 : state->s1945_mcu_latch1 << 8;
	275	state->s1945_mcu_latching |= 4;
310	276	}
311		res |= s1945_mcu_bctrl & 0xf0;
	277	else
	278	{
	279	res = state->s1945_mcu_latching & 1 ? 0x0000ff00 : state->s1945_mcu_latch2 << 8;
	280	state->s1945_mcu_latching |= 1;
	281	}
	282	res |= state->s1945_mcu_bctrl & 0xf0;
312	283	return res;
313	284	}
314	285	case 1:
315		return (s1945_mcu_latching << 24) | 0x08000000;
	286	return (state->s1945_mcu_latching << 24) | 0x08000000;
316	287	}
317	288	return 0;
318	289	}
319	290
320	291	static READ32_HANDLER( s1945_input_r )
321	292	{
322		switch(offset)
	293	switch (offset)
323	294	{
324	295	case 0x0:   return input_port_read(space->machine, "P1_P2");
325		case 0x1:   return (input_port_read(space->machine, "DSW") & 0xffff000f) | s1945_mcu_r(space, offset-1, mem_mask);
326		case 0x2:   return s1945_mcu_r(space, offset-1, mem_mask);
327		default:   logerror("PC %06X - Read input %02X !\n", cpu_get_pc(space->cpu), offset*2);
	296	case 0x1:   return (input_port_read(space->machine, "DSW") & 0xffff000f) | s1945_mcu_r(space, offset - 1, mem_mask);
	297	case 0x2:   return s1945_mcu_r(space, offset - 1, mem_mask);
	298	default:   logerror("PC %06X - Read input %02X !\n", cpu_get_pc(space->cpu), offset * 2);
328	299	return 0;
329	300	}
330	301	}
r6740	r6741
341	312	static WRITE32_HANDLER( paletteram32_xRRRRRGGGGGBBBBB_dword_w )
342	313	{
343	314	if (ACCESSING_BITS_16_31)
344		paletteram16_xRRRRRGGGGGBBBBB_word_w(space, offset*2, data >> 16, mem_mask >> 16);
	315	paletteram16_xRRRRRGGGGGBBBBB_word_w(space, offset * 2, data >> 16, mem_mask >> 16);
345	316	if (ACCESSING_BITS_0_15)
346		paletteram16_xRRRRRGGGGGBBBBB_word_w(space, offset*2+1, data, mem_mask);
	317	paletteram16_xRRRRRGGGGGBBBBB_word_w(space, offset * 2 + 1, data, mem_mask);
347	318	}
348	319
349	320	static ADDRESS_MAP_START( psikyo_map, ADDRESS_SPACE_PROGRAM, 32 )
350	321	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                          // ROM (not all used)
351	322	AM_RANGE(0x400000, 0x401fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)      // Sprites, buffered by two frames (list buffered + fb buffered)
352	323	AM_RANGE(0x600000, 0x601fff) AM_RAM_WRITE(paletteram32_xRRRRRGGGGGBBBBB_dword_w) AM_BASE_GENERIC(paletteram)   // Palette
353		AM_RANGE(0x800000, 0x801fff) AM_RAM_WRITE(psikyo_vram_0_w) AM_BASE(&psikyo_vram_0)      // Layer 0
354		AM_RANGE(0x802000, 0x803fff) AM_RAM_WRITE(psikyo_vram_1_w) AM_BASE(&psikyo_vram_1)      // Layer 1
355		AM_RANGE(0x804000, 0x807fff) AM_RAM AM_BASE(&psikyo_vregs)                        // RAM + Vregs
	324	AM_RANGE(0x800000, 0x801fff) AM_RAM_WRITE(psikyo_vram_0_w) AM_BASE_MEMBER(psikyo_state, vram_0)      // Layer 0
	325	AM_RANGE(0x802000, 0x803fff) AM_RAM_WRITE(psikyo_vram_1_w) AM_BASE_MEMBER(psikyo_state, vram_1)      // Layer 1
	326	AM_RANGE(0x804000, 0x807fff) AM_RAM AM_BASE_MEMBER(psikyo_state, vregs)                     // RAM + Vregs
356	327	//  AM_RANGE(0xc00000, 0xc0000b) AM_READ(psikyo_input_r)                                    // Depends on board, see DRIVER_INIT
357	328	//  AM_RANGE(0xc00004, 0xc0000b) AM_WRITE(s1945_mcu_w)                                      // MCU on sh404, see DRIVER_INIT
358	329	//  AM_RANGE(0xc00010, 0xc00013) AM_WRITE(psikyo_soundlatch_w)                              // Depends on board, see DRIVER_INIT
r6740	r6741
361	332
362	333	READ32_DEVICE_HANDLER( s1945bl_oki_r )
363	334	{
364		UINT8 dat = okim6295_r(device,0);
	335	UINT8 dat = okim6295_r(device, 0);
365	336	return dat << 24;
366	337	}
367	338
368	339	static WRITE32_DEVICE_HANDLER( s1945bl_oki_w )
369	340	{
370	341	if (ACCESSING_BITS_24_31)
371		{
372		okim6295_w(device,0,data>>24);
373		}
	342	okim6295_w(device, 0, data >> 24);
	343
374	344	if (ACCESSING_BITS_16_23)
375	345	{
376	346	// not at all sure about this, it seems to write 0 too often
377		UINT8 bank = (data & 0x00ff0000)>>16;
378		if (bank<4)
379		memory_set_bankptr(device->machine, "okibank", memory_region(device->machine,"oki")+0x30000+0x10000*bank);
	347	UINT8 bank = (data & 0x00ff0000) >> 16;
	348	if (bank < 4)
	349	memory_set_bank(device->machine, "okibank", bank);
380	350	}
	351
381	352	if (ACCESSING_BITS_8_15)
382		{
383		printf("ACCESSING_BITS_8_15 ?? %08x %08x\n",data&0x00ff0000,mem_mask);
384		}
	353	printf("ACCESSING_BITS_8_15 ?? %08x %08x\n", data & 0x00ff0000, mem_mask);
	354
385	355	if (ACCESSING_BITS_0_7)
386		{
387		printf("ACCESSING_BITS_0_7 ?? %08x %08x\n",data&0x00ff0000,mem_mask);
388		}
	356	printf("ACCESSING_BITS_0_7 ?? %08x %08x\n", data & 0x00ff0000, mem_mask);
389	357	}
390	358
391	359	static ADDRESS_MAP_START( s1945bl_oki_map, 0, 8 )
r6740	r6741
395	363
396	364	static ADDRESS_MAP_START( psikyo_bootleg_map, ADDRESS_SPACE_PROGRAM, 32 )
397	365	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                          // ROM (not all used)
398		AM_RANGE(0x200000, 0x200fff) AM_RAM AM_BASE(&psikyo_bootleg_spritebuffer)            // RAM (it copies the spritelist here, the HW probably doesn't have automatic buffering like the originals?
	366	AM_RANGE(0x200000, 0x200fff) AM_RAM AM_BASE_MEMBER(psikyo_state, bootleg_spritebuffer)            // RAM (it copies the spritelist here, the HW probably doesn't have automatic buffering like the originals?
399	367
400	368	AM_RANGE(0x400000, 0x401fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)      // Sprites, buffered by two frames (list buffered + fb buffered)
401	369	AM_RANGE(0x600000, 0x601fff) AM_RAM_WRITE(paletteram32_xRRRRRGGGGGBBBBB_dword_w) AM_BASE_GENERIC(paletteram)   // Palette
402		AM_RANGE(0x800000, 0x801fff) AM_RAM_WRITE(psikyo_vram_0_w) AM_BASE(&psikyo_vram_0)      // Layer 0
403		AM_RANGE(0x802000, 0x803fff) AM_RAM_WRITE(psikyo_vram_1_w) AM_BASE(&psikyo_vram_1)      // Layer 1
404		AM_RANGE(0x804000, 0x807fff) AM_RAM AM_BASE(&psikyo_vregs)                        // RAM + Vregs
	370	AM_RANGE(0x800000, 0x801fff) AM_RAM_WRITE(psikyo_vram_0_w) AM_BASE_MEMBER(psikyo_state, vram_0)      // Layer 0
	371	AM_RANGE(0x802000, 0x803fff) AM_RAM_WRITE(psikyo_vram_1_w) AM_BASE_MEMBER(psikyo_state, vram_1)      // Layer 1
	372	AM_RANGE(0x804000, 0x807fff) AM_RAM AM_BASE_MEMBER(psikyo_state, vregs)                        // RAM + Vregs
405	373	//  AM_RANGE(0xc00000, 0xc0000b) AM_READ(psikyo_input_r)                                    // Depends on board, see DRIVER_INIT
406	374	//  AM_RANGE(0xc00004, 0xc0000b) AM_WRITE(s1945_mcu_w)                                      // MCU on sh404, see DRIVER_INIT
407	375	//  AM_RANGE(0xc00010, 0xc00013) AM_WRITE(psikyo_soundlatch_w)                              // Depends on board, see DRIVER_INIT
r6740	r6741
422	390
423	391	static void sound_irq( const device_config *device, int irq )
424	392	{
425		cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
	393	psikyo_state *state = (psikyo_state *)device->machine->driver_data;
	394	cpu_set_input_line(state->audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE);
426	395	}
427	396
428	397	static READ8_HANDLER( psikyo_soundlatch_r )
429	398	{
430		return psikyo_soundlatch;
	399	psikyo_state *state = (psikyo_state *)space->machine->driver_data;
	400	return state->soundlatch;
431	401	}
432	402
433	403	static WRITE8_HANDLER( psikyo_clear_nmi_w )
434	404	{
435		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
436		z80_nmi = 0;
	405	psikyo_state *state = (psikyo_state *)space->machine->driver_data;
	406	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, CLEAR_LINE);
	407	state->z80_nmi = 0;
437	408	}
438	409
439	410
r6740	r6741
443	414
444	415	static WRITE8_HANDLER( sngkace_sound_bankswitch_w )
445	416	{
446		UINT8 *RAM = memory_region(space->machine, "audiocpu");
447		int bank = data & 3;
448		memory_set_bankptr(space->machine, "bank1", &RAM[bank * 0x8000 + 0x10000]);
	417	memory_set_bank(space->machine, "bank1", data & 0x03);
449	418	}
450	419
451	420	static ADDRESS_MAP_START( sngkace_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
469	438
470	439	static WRITE8_HANDLER( gunbird_sound_bankswitch_w )
471	440	{
472		UINT8 *RAM = memory_region(space->machine, "audiocpu");
473		int bank = (data >> 4) & 3;
474
475		/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes
476		of the rom not reachable. */
477
478		memory_set_bankptr(space->machine, "bank1", &RAM[bank * 0x8000 + 0x10000 + 0x200]);
	441	memory_set_bank(space->machine, "bank1", (data >> 4) & 0x03);
479	442	}
480	443
481	444	static ADDRESS_MAP_START( gunbird_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
513	476
514	477	***************************************************************************/
515	478
516		#define PSIKYO_PORT_PLAYER1 \
517		PORT_BIT(  0x01000000, IP_ACTIVE_LOW, IPT_START1 ) \
518		PORT_BIT(  0x02000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) \
519		PORT_BIT(  0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) \
520		PORT_BIT(  0x08000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) \
521		PORT_BIT(  0x10000000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) \
522		PORT_BIT(  0x20000000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) \
523		PORT_BIT(  0x40000000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) \
524		PORT_BIT(  0x80000000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
	479	static INPUT_PORTS_START( psikyo_common )
	480	PORT_START("P1_P2")      /* c00000&1 */
	481	PORT_BIT( 0x0000ffff, IP_ACTIVE_LOW, IPT_UNUSED )   // these depends by the games
	482	PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_START2 )
	483	PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
	484	PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
	485	PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	486	PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
	487	PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
	488	PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
	489	PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
	490	PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 )
	491	PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
	492	PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
	493	PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
	494	PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
	495	PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
	496	PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
	497	PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
525	498
526		#define PSIKYO_PORT_PLAYER2 \
527		PORT_BIT(  0x00010000, IP_ACTIVE_LOW, IPT_START2 ) \
528		PORT_BIT(  0x00020000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) \
529		PORT_BIT(  0x00040000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) \
530		PORT_BIT(  0x00080000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) \
531		PORT_BIT(  0x00100000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) \
532		PORT_BIT(  0x00200000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) \
533		PORT_BIT(  0x00400000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) \
534		PORT_BIT(  0x00800000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
	499	PORT_START("DSW")      /* c00004 -> c00007 */
	500	PORT_BIT( 0x0000ffff, IP_ACTIVE_LOW, IPT_UNUSED )   // these depends by the games
	501	PORT_DIPNAME( 0x00010000, 0x00010000, DEF_STR( Flip_Screen ) )
	502	PORT_DIPSETTING(          0x00010000, DEF_STR( Off ) )
	503	PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
	504	PORT_DIPNAME( 0x00020000, 0x00000000, DEF_STR( Demo_Sounds ) )
	505	PORT_DIPSETTING(          0x00020000, DEF_STR( Off ) )
	506	PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
	507	PORT_DIPNAME( 0x000c0000, 0x000c0000, DEF_STR( Difficulty ) )
	508	PORT_DIPSETTING(          0x00080000, DEF_STR( Easy ) )
	509	PORT_DIPSETTING(          0x000c0000, DEF_STR( Normal ) )
	510	PORT_DIPSETTING(          0x00040000, DEF_STR( Hard ) )
	511	PORT_DIPSETTING(          0x00000000, DEF_STR( Hardest ) )
	512	PORT_DIPNAME( 0x00300000, 0x00300000, DEF_STR( Lives ) )
	513	PORT_DIPSETTING(          0x00200000, "1" )
	514	PORT_DIPSETTING(          0x00100000, "2" )
	515	PORT_DIPSETTING(          0x00300000, "3" )
	516	PORT_DIPSETTING(          0x00000000, "4" )
	517	PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Bonus_Life ) )
	518	PORT_DIPSETTING(          0x00400000, "400K" )
	519	PORT_DIPSETTING(          0x00000000, "600K" )
	520	PORT_SERVICE( 0x00800000, IP_ACTIVE_LOW )
	521	PORT_DIPNAME( 0x01000000, 0x01000000, "Credits/Coinage" )   // [Free Play] on all for free play
	522	PORT_DIPSETTING(          0x01000000, "A+B/A&B" )
	523	PORT_DIPSETTING(          0x00000000, "A&B/A [Free Play]" )
	524	PORT_DIPNAME( 0x0e000000, 0x0e000000, DEF_STR( Coin_A ) )
	525	PORT_DIPSETTING(          0x0a000000, DEF_STR( 3C_1C ) )
	526	PORT_DIPSETTING(          0x0c000000, DEF_STR( 2C_1C ) )
	527	PORT_DIPSETTING(          0x0e000000, DEF_STR( 1C_1C ) )
	528	PORT_DIPSETTING(          0x08000000, DEF_STR( 1C_2C ) )
	529	PORT_DIPSETTING(          0x06000000, DEF_STR( 1C_3C ) )
	530	PORT_DIPSETTING(          0x04000000, DEF_STR( 1C_4C ) )
	531	PORT_DIPSETTING(          0x02000000, DEF_STR( 1C_5C ) )
	532	PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
	533	PORT_DIPNAME( 0x70000000, 0x70000000, DEF_STR( Coin_B ) )
	534	PORT_DIPSETTING(          0x50000000, DEF_STR( 3C_1C ) )
	535	PORT_DIPSETTING(          0x60000000, DEF_STR( 2C_1C ) )
	536	PORT_DIPSETTING(          0x70000000, DEF_STR( 1C_1C ) )
	537	PORT_DIPSETTING(          0x40000000, DEF_STR( 1C_2C ) )
	538	PORT_DIPSETTING(          0x30000000, DEF_STR( 1C_3C ) )
	539	PORT_DIPSETTING(          0x20000000, DEF_STR( 1C_4C ) )
	540	PORT_DIPSETTING(          0x10000000, DEF_STR( 1C_5C ) )
	541	PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
	542	PORT_DIPNAME( 0x80000000, 0x80000000, "2C Start, 1C Continue" )
	543	PORT_DIPSETTING(          0x80000000, DEF_STR( Off ) )
	544	PORT_DIPSETTING(          0x00000000, "On [Free Play]" ) // Forces 1C_1C
	545	INPUT_PORTS_END
535	546
536	547
537	548
r6740	r6741
540	551	***************************************************************************/
541	552
542	553	static INPUT_PORTS_START( samuraia )
543		PORT_START("P1_P2")      /* c00000&1 */
544		PORT_BIT( 0x0000ffff, IP_ACTIVE_LOW, IPT_UNUSED )
545		PSIKYO_PORT_PLAYER2
546		PSIKYO_PORT_PLAYER1
	554	PORT_INCLUDE(psikyo_common)
547	555
548	556	PORT_START("COIN")
549	557	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_VBLANK  )   // vblank
r6740	r6741
571	579	PORT_SERVICE_NO_TOGGLE( 0x00200000, IP_ACTIVE_LOW )
572	580	PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_TILT )
573	581	PORT_BIT( 0x00800000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(z80_nmi_r, NULL)   // From Sound CPU
574		PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_UNKNOWN )   // unused?
575		PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
576		PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
577		PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
578		PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
579		PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
580		PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
581		PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	582	PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNKNOWN )   // unused?
582	583
583		PORT_START("DSW")      /* c00004 -> c00007 */
	584	PORT_MODIFY("DSW")      /* c00004 -> c00007 */
584	585	/***********************************************
585	586
586	587	This Dip port is bit based:
r6740	r6741
600	601	PORT_DIPSETTING(          0x000000df, "Korea" )
601	602	PORT_DIPSETTING(          0x000000bf, "Hong Kong" )
602	603	PORT_DIPSETTING(          0x0000007f, "Taiwan" )
603		PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_UNKNOWN )   // unused?
604		PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_UNKNOWN )
605		PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_UNKNOWN )
606		PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_UNKNOWN )
607		PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_UNKNOWN )
608		PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_UNKNOWN )
609		PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
610		PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_UNKNOWN )
611
612		PORT_DIPNAME( 0x00010000, 0x00010000, DEF_STR( Flip_Screen ) )
613		PORT_DIPSETTING(          0x00010000, DEF_STR( Off ) )
614		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
615		PORT_DIPNAME( 0x00020000, 0x00000000, DEF_STR( Demo_Sounds ) )
616		PORT_DIPSETTING(          0x00020000, DEF_STR( Off ) )
617		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
618		PORT_DIPNAME( 0x000c0000, 0x000c0000, DEF_STR( Difficulty ) )
619		PORT_DIPSETTING(          0x00080000, DEF_STR( Easy ) )
620		PORT_DIPSETTING(          0x000c0000, DEF_STR( Normal ) )
621		PORT_DIPSETTING(          0x00040000, DEF_STR( Hard ) )
622		PORT_DIPSETTING(          0x00000000, DEF_STR( Hardest ) )
623		PORT_DIPNAME( 0x00300000, 0x00300000, DEF_STR( Lives ) )
624		PORT_DIPSETTING(          0x00200000, "1" )
625		PORT_DIPSETTING(          0x00100000, "2" )
626		PORT_DIPSETTING(          0x00300000, "3" )
627		PORT_DIPSETTING(          0x00000000, "4" )
628		PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Bonus_Life ) )
629		PORT_DIPSETTING(          0x00400000, "400K" )
630		PORT_DIPSETTING(          0x00000000, "600K" )
631		PORT_SERVICE( 0x00800000, IP_ACTIVE_LOW )
632		PORT_DIPNAME( 0x01000000, 0x01000000, "Credits/Coinage" )   // [Free Play] on all for free play
633		PORT_DIPSETTING(          0x01000000, "A+B/A&B" )
634		PORT_DIPSETTING(          0x00000000, "A&B/A [Free Play]" )
635		PORT_DIPNAME( 0x0e000000, 0x0e000000, DEF_STR( Coin_A ) )
636		PORT_DIPSETTING(          0x0a000000, DEF_STR( 3C_1C ) )
637		PORT_DIPSETTING(          0x0c000000, DEF_STR( 2C_1C ) )
638		PORT_DIPSETTING(          0x0e000000, DEF_STR( 1C_1C ) )
639		PORT_DIPSETTING(          0x08000000, DEF_STR( 1C_2C ) )
640		PORT_DIPSETTING(          0x06000000, DEF_STR( 1C_3C ) )
641		PORT_DIPSETTING(          0x04000000, DEF_STR( 1C_4C ) )
642		PORT_DIPSETTING(          0x02000000, DEF_STR( 1C_5C ) )
643		PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
644		PORT_DIPNAME( 0x70000000, 0x70000000, DEF_STR( Coin_B ) )
645		PORT_DIPSETTING(          0x50000000, DEF_STR( 3C_1C ) )
646		PORT_DIPSETTING(          0x60000000, DEF_STR( 2C_1C ) )
647		PORT_DIPSETTING(          0x70000000, DEF_STR( 1C_1C ) )
648		PORT_DIPSETTING(          0x40000000, DEF_STR( 1C_2C ) )
649		PORT_DIPSETTING(          0x30000000, DEF_STR( 1C_3C ) )
650		PORT_DIPSETTING(          0x20000000, DEF_STR( 1C_4C ) )
651		PORT_DIPSETTING(          0x10000000, DEF_STR( 1C_5C ) )
652		PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
653		PORT_DIPNAME( 0x80000000, 0x80000000, "2C Start, 1C Continue" )
654		PORT_DIPSETTING(          0x80000000, DEF_STR( Off ) )
655		PORT_DIPSETTING(          0x00000000, "On [Free Play]" ) // Forces 1C_1C
	604	PORT_BIT( 0x0000ff00, IP_ACTIVE_LOW, IPT_UNKNOWN )   // unused?
656	605	INPUT_PORTS_END
657	606
658	607	static INPUT_PORTS_START( sngkace )
r6740	r6741
689	638	***************************************************************************/
690	639
691	640	static INPUT_PORTS_START( btlkroad )
692		PORT_START("P1_P2")         /* c00000 -> c00003 */
	641	PORT_INCLUDE(psikyo_common)
	642
	643	PORT_MODIFY("P1_P2")         /* c00000 -> c00003 */
693	644	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
694	645	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
695	646	PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_SPECIAL )
r6740	r6741
706	657	PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(1)
707	658	PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(1)
708	659	PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
709		PSIKYO_PORT_PLAYER2
710		PSIKYO_PORT_PLAYER1
711	660
712		PORT_START("DSW")      /* c00004 -> c00007 */
	661	PORT_MODIFY("DSW")      /* c00004 -> c00007 */
713	662	/***********************************************
714	663
715	664	Bit 0 1 2 3
r6740	r6741
759	708	PORT_DIPSETTING(          0x00008000, DEF_STR( Off ) )
760	709	PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
761	710
762		PORT_DIPNAME( 0x00010000, 0x00010000, DEF_STR( Flip_Screen ) )
763		PORT_DIPSETTING(          0x00010000, DEF_STR( Off ) )
764		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
765		PORT_DIPNAME( 0x00020000, 0x00000000, DEF_STR( Demo_Sounds ) )
766		PORT_DIPSETTING(          0x00020000, DEF_STR( Off ) )
767		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
768		PORT_DIPNAME( 0x000c0000, 0x000c0000, DEF_STR( Difficulty ) )
769		PORT_DIPSETTING(          0x00080000, DEF_STR( Easy ) )
770		PORT_DIPSETTING(          0x000c0000, DEF_STR( Normal ) )
771		PORT_DIPSETTING(          0x00040000, DEF_STR( Hard ) )
772		PORT_DIPSETTING(          0x00000000, DEF_STR( Hardest ) )
773	711	PORT_DIPNAME( 0x00100000, 0x00100000, "Unknown 2-4" )   // used
774	712	PORT_DIPSETTING(          0x00100000, DEF_STR( Off ) )
775	713	PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
r6740	r6741
779	717	PORT_DIPNAME( 0x00400000, 0x00400000, "Use DSW 3 (Debug)" )
780	718	PORT_DIPSETTING(          0x00400000, DEF_STR( Off ) )
781	719	PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
782		PORT_SERVICE( 0x00800000, IP_ACTIVE_LOW )
783		PORT_DIPNAME( 0x01000000, 0x01000000, "Credits/Coinage" )   // [Free Play] on all for free play
784		PORT_DIPSETTING(          0x01000000, "A+B/A&B" )
785		PORT_DIPSETTING(          0x00000000, "A&B/A [Free Play]" )
786		PORT_DIPNAME( 0x0e000000, 0x0e000000, DEF_STR( Coin_A ) )
787		PORT_DIPSETTING(          0x0a000000, DEF_STR( 3C_1C ) )
788		PORT_DIPSETTING(          0x0c000000, DEF_STR( 2C_1C ) )
789		PORT_DIPSETTING(          0x0e000000, DEF_STR( 1C_1C ) )
790		PORT_DIPSETTING(          0x08000000, DEF_STR( 1C_2C ) )
791		PORT_DIPSETTING(          0x06000000, DEF_STR( 1C_3C ) )
792		PORT_DIPSETTING(          0x04000000, DEF_STR( 1C_4C ) )
793		PORT_DIPSETTING(          0x02000000, DEF_STR( 1C_5C ) )
794		PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
795		PORT_DIPNAME( 0x70000000, 0x70000000, DEF_STR( Coin_B ) )
796		PORT_DIPSETTING(          0x50000000, DEF_STR( 3C_1C ) )
797		PORT_DIPSETTING(          0x60000000, DEF_STR( 2C_1C ) )
798		PORT_DIPSETTING(          0x70000000, DEF_STR( 1C_1C ) )
799		PORT_DIPSETTING(          0x40000000, DEF_STR( 1C_2C ) )
800		PORT_DIPSETTING(          0x30000000, DEF_STR( 1C_3C ) )
801		PORT_DIPSETTING(          0x20000000, DEF_STR( 1C_4C ) )
802		PORT_DIPSETTING(          0x10000000, DEF_STR( 1C_5C ) )
803		PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
804		PORT_DIPNAME( 0x80000000, 0x80000000, "2C Start, 1C Continue" )
805		PORT_DIPSETTING(          0x80000000, DEF_STR( Off ) )
806		PORT_DIPSETTING(          0x00000000, "On [Free Play]" ) // Forces 1C_1C
807	720	INPUT_PORTS_END
808	721
809	722
r6740	r6741
812	725	***************************************************************************/
813	726
814	727	static INPUT_PORTS_START( gunbird )
815		PORT_START("P1_P2")         /* c00000 -> c00003 */
	728	PORT_INCLUDE(psikyo_common)
	729
	730	PORT_MODIFY("P1_P2")         /* c00000 -> c00003 */
816	731	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
817	732	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
818	733	PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_SPECIAL )
r6740	r6741
821	736	PORT_SERVICE_NO_TOGGLE( 0x00000020, IP_ACTIVE_LOW )
822	737	PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_TILT )
823	738	PORT_BIT( 0x00000080, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(z80_nmi_r, NULL)   // From Sound CPU
824		PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_UNKNOWN )
825		PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_UNKNOWN )
826		PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_UNKNOWN )
827		PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_UNKNOWN )
828		PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_UNKNOWN )
829		PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_UNKNOWN )
830		PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
831		PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_UNKNOWN )
832		PSIKYO_PORT_PLAYER2
833		PSIKYO_PORT_PLAYER1
	739	PORT_BIT( 0x0000ff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
834	740
835		PORT_START("DSW")      /* c00004 -> c00007 */
	741	PORT_MODIFY("DSW")      /* c00004 -> c00007 */
836	742	/***********************************************
837	743
838	744	This Dip port is bit based:
r6740	r6741
870	776	PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_UNKNOWN )
871	777	PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
872	778	PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_UNKNOWN )   // tested!
873
874		PORT_DIPNAME( 0x00010000, 0x00010000, DEF_STR( Flip_Screen ) )
875		PORT_DIPSETTING(          0x00010000, DEF_STR( Off ) )
876		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
877		PORT_DIPNAME( 0x00020000, 0x00000000, DEF_STR( Demo_Sounds ) )
878		PORT_DIPSETTING(          0x00020000, DEF_STR( Off ) )
879		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
880		PORT_DIPNAME( 0x000c0000, 0x000c0000, DEF_STR( Difficulty ) )
881		PORT_DIPSETTING(          0x00080000, DEF_STR( Easy ) )
882		PORT_DIPSETTING(          0x000c0000, DEF_STR( Normal ) )
883		PORT_DIPSETTING(          0x00040000, DEF_STR( Hard ) )
884		PORT_DIPSETTING(          0x00000000, DEF_STR( Hardest ) )
885		PORT_DIPNAME( 0x00300000, 0x00300000, DEF_STR( Lives ) )
886		PORT_DIPSETTING(          0x00200000, "1" )
887		PORT_DIPSETTING(          0x00100000, "2" )
888		PORT_DIPSETTING(          0x00300000, "3" )
889		PORT_DIPSETTING(          0x00000000, "4" )
890		PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Bonus_Life ) )
891		PORT_DIPSETTING(          0x00400000, "400K" )
892		PORT_DIPSETTING(          0x00000000, "600K" )
893		PORT_SERVICE( 0x00800000, IP_ACTIVE_LOW )
894		PORT_DIPNAME( 0x01000000, 0x01000000, "Credits/Coinage" )   // [Free Play] on all for free play
895		PORT_DIPSETTING(          0x01000000, "A+B/A&B" )
896		PORT_DIPSETTING(          0x00000000, "A&B/A [Free Play]" )
897		PORT_DIPNAME( 0x0e000000, 0x0e000000, DEF_STR( Coin_A ) )
898		PORT_DIPSETTING(          0x0a000000, DEF_STR( 3C_1C ) )
899		PORT_DIPSETTING(          0x0c000000, DEF_STR( 2C_1C ) )
900		PORT_DIPSETTING(          0x0e000000, DEF_STR( 1C_1C ) )
901		PORT_DIPSETTING(          0x08000000, DEF_STR( 1C_2C ) )
902		PORT_DIPSETTING(          0x06000000, DEF_STR( 1C_3C ) )
903		PORT_DIPSETTING(          0x04000000, DEF_STR( 1C_4C ) )
904		PORT_DIPSETTING(          0x02000000, DEF_STR( 1C_5C ) )
905		PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
906		PORT_DIPNAME( 0x70000000, 0x70000000, DEF_STR( Coin_B ) )
907		PORT_DIPSETTING(          0x50000000, DEF_STR( 3C_1C ) )
908		PORT_DIPSETTING(          0x60000000, DEF_STR( 2C_1C ) )
909		PORT_DIPSETTING(          0x70000000, DEF_STR( 1C_1C ) )
910		PORT_DIPSETTING(          0x40000000, DEF_STR( 1C_2C ) )
911		PORT_DIPSETTING(          0x30000000, DEF_STR( 1C_3C ) )
912		PORT_DIPSETTING(          0x20000000, DEF_STR( 1C_4C ) )
913		PORT_DIPSETTING(          0x10000000, DEF_STR( 1C_5C ) )
914		PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
915		PORT_DIPNAME( 0x80000000, 0x80000000, "2C Start, 1C Continue" )
916		PORT_DIPSETTING(          0x80000000, DEF_STR( Off ) )
917		PORT_DIPSETTING(          0x00000000, "On [Free Play]" ) // Forces 1C_1C
918	779	INPUT_PORTS_END
919	780
920	781	static INPUT_PORTS_START( gunbirdj )
r6740	r6741
933	794	***************************************************************************/
934	795
935	796	static INPUT_PORTS_START( s1945 )
936		PORT_START("P1_P2")         /* c00000 -> c00003 */
	797	PORT_INCLUDE(psikyo_common)
	798
	799	PORT_MODIFY("P1_P2")         /* c00000 -> c00003 */
937	800	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
938	801	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
939	802	PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(mcu_status_r, NULL)
r6740	r6741
942	805	PORT_SERVICE_NO_TOGGLE( 0x00000020, IP_ACTIVE_LOW )
943	806	PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_TILT )
944	807	PORT_BIT( 0x00000080, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(z80_nmi_r, NULL)   // From Sound CPU
945		PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_UNKNOWN )
946		PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_UNKNOWN )
947		PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_UNKNOWN )
948		PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_UNKNOWN )
949		PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_UNKNOWN )
950		PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_UNKNOWN )
951		PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
952		PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_UNKNOWN )
953		PSIKYO_PORT_PLAYER2
954		PSIKYO_PORT_PLAYER1
	808	PORT_BIT( 0x0000ff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
955	809
956		PORT_START("DSW")      /* c00004 -> c00007 */
	810	PORT_MODIFY("DSW")      /* c00004 -> c00007 */
957	811	/***********************************************
958	812
959	813	This Dip port is bit based:
r6740	r6741
993	847	PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
994	848	PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_UNKNOWN )   // tested!
995	849
996		PORT_DIPNAME( 0x00010000, 0x00010000, DEF_STR( Flip_Screen ) )
997		PORT_DIPSETTING(          0x00010000, DEF_STR( Off ) )
998		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
999		PORT_DIPNAME( 0x00020000, 0x00000000, DEF_STR( Demo_Sounds ) )
1000		PORT_DIPSETTING(          0x00020000, DEF_STR( Off ) )
1001		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
1002		PORT_DIPNAME( 0x000c0000, 0x000c0000, DEF_STR( Difficulty ) )
1003		PORT_DIPSETTING(          0x00080000, DEF_STR( Easy ) )
1004		PORT_DIPSETTING(          0x000c0000, DEF_STR( Normal ) )
1005		PORT_DIPSETTING(          0x00040000, DEF_STR( Hard ) )
1006		PORT_DIPSETTING(          0x00000000, DEF_STR( Hardest ) )
1007		PORT_DIPNAME( 0x00300000, 0x00300000, DEF_STR( Lives ) )
1008		PORT_DIPSETTING(          0x00200000, "1" )
1009		PORT_DIPSETTING(          0x00100000, "2" )
1010		PORT_DIPSETTING(          0x00300000, "3" )
1011		PORT_DIPSETTING(          0x00000000, "4" )
1012	850	PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Bonus_Life ) )
1013	851	PORT_DIPSETTING(          0x00400000, "600K" )
1014	852	PORT_DIPSETTING(          0x00000000, "800K" )
1015		PORT_SERVICE( 0x00800000, IP_ACTIVE_LOW )
1016		PORT_DIPNAME( 0x01000000, 0x01000000, "Credits/Coinage" )   // No freeplay for s1945
1017		PORT_DIPSETTING(          0x01000000, "A+B/A&B" )
1018		PORT_DIPSETTING(          0x00000000, "A&B/A" )
1019	853	PORT_DIPNAME( 0x0e000000, 0x0e000000, DEF_STR( Coin_A ) )
1020	854	PORT_DIPSETTING(          0x0a000000, DEF_STR( 3C_1C ) )
1021	855	PORT_DIPSETTING(          0x0c000000, DEF_STR( 2C_1C ) )
r6740	r6741
1084	918	***************************************************************************/
1085	919
1086	920	static INPUT_PORTS_START( tengai )
1087		PORT_START("P1_P2")         /* c00000 -> c00003 */
	921	PORT_INCLUDE(psikyo_common)
	922
	923	PORT_MODIFY("P1_P2")         /* c00000 -> c00003 */
1088	924	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
1089	925	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
1090	926	PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(mcu_status_r, NULL)
r6740	r6741
1093	929	PORT_SERVICE_NO_TOGGLE( 0x00000020, IP_ACTIVE_LOW )
1094	930	PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_TILT )
1095	931	PORT_BIT( 0x00000080, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(z80_nmi_r, NULL)   // From Sound CPU
1096		PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_UNKNOWN )
1097		PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_UNKNOWN )
1098		PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_UNKNOWN )
1099		PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_UNKNOWN )
1100		PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1101		PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1102		PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1103		PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1104		PSIKYO_PORT_PLAYER2
1105		PSIKYO_PORT_PLAYER1
	932	PORT_BIT( 0x0000ff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
1106	933
1107		PORT_START("DSW")      /* c00004 -> c00007 */
	934	PORT_MODIFY("DSW")      /* c00004 -> c00007 */
1108	935	/***********************************************
1109	936
1110	937	This Dip port is bit based:
r6740	r6741
1136	963	PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1137	964	PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_UNKNOWN )   // tested!
1138	965
1139		PORT_DIPNAME( 0x00010000, 0x00010000, DEF_STR( Flip_Screen ) )
1140		PORT_DIPSETTING(          0x00010000, DEF_STR( Off ) )
1141		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
1142		PORT_DIPNAME( 0x00020000, 0x00000000, DEF_STR( Demo_Sounds ) )
1143		PORT_DIPSETTING(          0x00020000, DEF_STR( Off ) )
1144		PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
1145		PORT_DIPNAME( 0x000c0000, 0x000c0000, DEF_STR( Difficulty ) )
1146		PORT_DIPSETTING(          0x00080000, DEF_STR( Easy ) )
1147		PORT_DIPSETTING(          0x000c0000, DEF_STR( Normal ) )
1148		PORT_DIPSETTING(          0x00040000, DEF_STR( Hard ) )
1149		PORT_DIPSETTING(          0x00000000, DEF_STR( Hardest ) )
1150		PORT_DIPNAME( 0x00300000, 0x00300000, DEF_STR( Lives ) )
1151		PORT_DIPSETTING(          0x00200000, "1" )
1152		PORT_DIPSETTING(          0x00100000, "2" )
1153		PORT_DIPSETTING(          0x00300000, "3" )
1154		PORT_DIPSETTING(          0x00000000, "4" )
1155	966	PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Bonus_Life ) )
1156	967	PORT_DIPSETTING(          0x00400000, "600K" )
1157	968	PORT_DIPSETTING(          0x00000000, "800K" )
1158		PORT_SERVICE( 0x00800000, IP_ACTIVE_LOW )
1159		PORT_DIPNAME( 0x01000000, 0x01000000, "Credits/Coinage" )   // [Free Play] on all for free play
1160		PORT_DIPSETTING(          0x01000000, "A+B/A&B" )
1161		PORT_DIPSETTING(          0x00000000, "A&B/A [Free Play]" )
1162		PORT_DIPNAME( 0x0e000000, 0x0e000000, DEF_STR( Coin_A ) )
1163		PORT_DIPSETTING(          0x0a000000, DEF_STR( 3C_1C ) )
1164		PORT_DIPSETTING(          0x0c000000, DEF_STR( 2C_1C ) )
1165		PORT_DIPSETTING(          0x0e000000, DEF_STR( 1C_1C ) )
1166		PORT_DIPSETTING(          0x08000000, DEF_STR( 1C_2C ) )
1167		PORT_DIPSETTING(          0x06000000, DEF_STR( 1C_3C ) )
1168		PORT_DIPSETTING(          0x04000000, DEF_STR( 1C_4C ) )
1169		PORT_DIPSETTING(          0x02000000, DEF_STR( 1C_5C ) )
1170		PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
1171		PORT_DIPNAME( 0x70000000, 0x70000000, DEF_STR( Coin_B ) )
1172		PORT_DIPSETTING(          0x50000000, DEF_STR( 3C_1C ) )
1173		PORT_DIPSETTING(          0x60000000, DEF_STR( 2C_1C ) )
1174		PORT_DIPSETTING(          0x70000000, DEF_STR( 1C_1C ) )
1175		PORT_DIPSETTING(          0x40000000, DEF_STR( 1C_2C ) )
1176		PORT_DIPSETTING(          0x30000000, DEF_STR( 1C_3C ) )
1177		PORT_DIPSETTING(          0x20000000, DEF_STR( 1C_4C ) )
1178		PORT_DIPSETTING(          0x10000000, DEF_STR( 1C_5C ) )
1179		PORT_DIPSETTING(          0x00000000, "1C 6C [Free Play]" )
1180		PORT_DIPNAME( 0x80000000, 0x80000000, "2C Start, 1C Continue" )
1181		PORT_DIPSETTING(          0x80000000, DEF_STR( Off ) )
1182		PORT_DIPSETTING(          0x00000000, "On [Free Play]" ) // Forces 1C_1C
1183	969	INPUT_PORTS_END
1184	970
1185	971	static INPUT_PORTS_START( tengaij )
r6740	r6741
1238	1024
1239	1025	***************************************************************************/
1240	1026
	1027	static MACHINE_START( psikyo )
	1028	{
	1029	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1030
	1031	state->audiocpu = devtag_get_device(machine, "audiocpu");
	1032
	1033	state_save_register_global(machine, state->soundlatch);
	1034	state_save_register_global(machine, state->z80_nmi);
	1035	state_save_register_global(machine, state->mcu_status);
	1036	state_save_register_global(machine, state->tilemap_0_bank);
	1037	state_save_register_global(machine, state->tilemap_1_bank);
	1038	}
	1039
	1040	static MACHINE_RESET( psikyo )
	1041	{
	1042	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1043
	1044	state->soundlatch = 0;
	1045	state->z80_nmi = 0;
	1046	state->mcu_status = 0;
	1047	}
	1048
	1049
1241	1050	/***************************************************************************
1242	1051	Samurai Ace / Sengoku Aces
1243	1052	***************************************************************************/
r6740	r6741
1250	1059
1251	1060	static MACHINE_DRIVER_START( sngkace )
1252	1061
	1062	/* driver data */
	1063	MDRV_DRIVER_DATA(psikyo_state)
	1064
1253	1065	/* basic machine hardware */
1254	1066	MDRV_CPU_ADD("maincpu", M68EC020, XTAL_32MHz/2) /* verified on pcb */
1255	1067	MDRV_CPU_PROGRAM_MAP(psikyo_map)
r6740	r6741
1259	1071	MDRV_CPU_PROGRAM_MAP(sngkace_sound_map)
1260	1072	MDRV_CPU_IO_MAP(sngkace_sound_io_map)
1261	1073
	1074	MDRV_MACHINE_START(psikyo)
1262	1075	MDRV_MACHINE_RESET(psikyo)
1263	1076
1264	1077	/* video hardware */
r6740	r6741
1301	1114
1302	1115	static MACHINE_DRIVER_START( gunbird )
1303	1116
	1117	/* driver data */
	1118	MDRV_DRIVER_DATA(psikyo_state)
	1119
1304	1120	/* basic machine hardware */
1305	1121	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)
1306	1122	MDRV_CPU_PROGRAM_MAP(psikyo_map)
r6740	r6741
1310	1126	MDRV_CPU_PROGRAM_MAP(gunbird_sound_map)
1311	1127	MDRV_CPU_IO_MAP(gunbird_sound_io_map)
1312	1128
	1129	MDRV_MACHINE_START(psikyo)
1313	1130	MDRV_MACHINE_RESET(psikyo)
1314	1131
1315	1132	/* video hardware */
r6740	r6741
1340	1157
1341	1158	static MACHINE_DRIVER_START( s1945bl ) /* Bootleg hardware based on the unprotected Japanese Strikers 1945 set */
1342	1159
	1160	/* driver data */
	1161	MDRV_DRIVER_DATA(psikyo_state)
	1162
1343	1163	/* basic machine hardware */
1344	1164	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)
1345	1165	MDRV_CPU_PROGRAM_MAP(psikyo_bootleg_map)
1346	1166	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
1347	1167
	1168	MDRV_MACHINE_START(psikyo)
1348	1169	MDRV_MACHINE_RESET(psikyo)
1349	1170
1350	1171	/* video hardware */
r6740	r6741
1378	1199	***************************************************************************/
1379	1200
1380	1201
1381		static void irqhandler(const device_config *device, int linestate)
	1202	static void irqhandler( const device_config *device, int linestate )
1382	1203	{
1383		if (linestate)
1384		cputag_set_input_line(device->machine, "audiocpu", 0, ASSERT_LINE);
1385		else
1386		cputag_set_input_line(device->machine, "audiocpu", 0, CLEAR_LINE);
	1204	psikyo_state *state = (psikyo_state *)device->machine->driver_data;
	1205	cpu_set_input_line(state->audiocpu, 0, linestate ? ASSERT_LINE : CLEAR_LINE);
1387	1206	}
1388	1207
1389	1208	static const ymf278b_interface ymf278b_config =
r6740	r6741
1393	1212
1394	1213	static MACHINE_DRIVER_START( s1945 )
1395	1214
	1215	/* driver data */
	1216	MDRV_DRIVER_DATA(psikyo_state)
	1217
1396	1218	/* basic machine hardware */
1397	1219	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)
1398	1220	MDRV_CPU_PROGRAM_MAP(psikyo_map)
r6740	r6741
1404	1226
1405	1227	/* MCU should go here */
1406	1228
	1229	MDRV_MACHINE_START(psikyo)
1407	1230	MDRV_MACHINE_RESET(psikyo)
1408	1231
1409	1232	/* video hardware */
r6740	r6741
1508	1331
1509	1332	ROM_END
1510	1333
1511		static DRIVER_INIT( sngkace )
1512		{
1513		{
1514		UINT8 *RAM   =   memory_region(machine, "ymsnd");
1515		int len      =   memory_region_length(machine, "ymsnd");
1516		int i;
1517	1334
1518		/* Bit 6&7 of the samples are swapped. Naughty, naughty... */
1519		for (i = 0; i < len; i++)
1520		{
1521		int x = RAM[i];
1522		RAM[i] = ((x & 0x40) << 1) | ((x & 0x80) >> 1) | (x & 0x3f);
1523		}
1524		}
1525
1526		/* input ports */
1527		memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, sngkace_input_r);
1528
1529		/* sound latch */
1530		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, psikyo_soundlatch_w);
1531
1532		psikyo_ka302c_banking = 0; // SH201B doesn't have any gfx banking
1533
1534		/* Enable other regions */
1535		#if 0
1536		if (!strcmp(machine->gamedrv->name,"sngkace"))
1537		{
1538		UINT8 *ROM   =   memory_region(machine, "maincpu");
1539		ROM[0x995] = 0x4e;
1540		ROM[0x994] = 0x71;
1541		ROM[0x997] = 0x4e;
1542		ROM[0x996] = 0x71;
1543
1544		}
1545		#endif
1546		}
1547
1548
1549	1335	/***************************************************************************
1550	1336
1551	1337	Gun Bird (Korea)
r6740	r6741
1689	1475
1690	1476	ROM_END
1691	1477
1692
1693
1694		static DRIVER_INIT( gunbird )
1695		{
1696		/* input ports */
1697		memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
1698
1699		/* sound latch */
1700		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, psikyo_soundlatch_w);
1701
1702		psikyo_ka302c_banking = 1;
1703		}
1704
1705
1706	1478	/***************************************************************************
1707	1479
1708	1480	Strikers 1945 (Japan, unprotected)
r6740	r6741
1774	1546	ROM_LOAD( "27c512",  0x000000, 0x010000, CRC(0da8db45) SHA1(7d5bd71c5b0b28ff74c732edd7c662f46f2ab25b) )
1775	1547	ROM_END
1776	1548
1777		static DRIVER_INIT( s1945jn )
1778		{
1779		/* input ports */
1780		memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
1781
1782		/* sound latch */
1783		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
1784
1785		psikyo_ka302c_banking = 1;
1786		}
1787
1788
1789	1549	/***************************************************************************
1790	1550
1791	1551	Strikers 1945
r6740	r6741
1981	1741
1982	1742	ROM_END
1983	1743
1984		static DRIVER_INIT( s1945 )
1985		{
1986		/* input ports */
1987		memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
1988	1744
1989		/* sound latch */
1990		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
1991
1992		/* protection and tile bank switching */
1993		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
1994		s1945_mcu_init(s1945_table);
1995
1996		psikyo_ka302c_banking = 0; // Banking is controlled by mcu
1997		}
1998
1999		static DRIVER_INIT( s1945a )
2000		{
2001		/* input ports */
2002		memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
2003
2004		/* sound latch */
2005		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
2006
2007		/* protection and tile bank switching */
2008		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
2009		s1945_mcu_init(s1945a_table);
2010
2011		psikyo_ka302c_banking = 0; // Banking is controlled by mcu
2012		}
2013
2014		static DRIVER_INIT( s1945j )
2015		{
2016		/* input ports*/
2017		memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
2018
2019		/* sound latch */
2020		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
2021
2022		/* protection and tile bank switching */
2023		memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
2024		s1945_mcu_init(s1945j_table);
2025
2026		psikyo_ka302c_banking = 0; // Banking is controlled by mcu
2027		}
2028
2029
2030	1745	/***************************************************************************
2031	1746
2032	1747	Tengai (World) / Sengoku Blade (Japan)
r6740	r6741
2108	1823
2109	1824	ROM_END
2110	1825
	1826	/***************************************************************************
	1827
	1828
	1829	Driver Initialization
	1830
	1831
	1832	***************************************************************************/
	1833
	1834	static DRIVER_INIT( sngkace )
	1835	{
	1836	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1837
	1838	{
	1839	UINT8 *RAM = memory_region(machine, "ymsnd");
	1840	int len = memory_region_length(machine, "ymsnd");
	1841	int i;
	1842
	1843	/* Bit 6&7 of the samples are swapped. Naughty, naughty... */
	1844	for (i = 0; i < len; i++)
	1845	{
	1846	int x = RAM[i];
	1847	RAM[i] = ((x & 0x40) << 1) | ((x & 0x80) >> 1) | (x & 0x3f);
	1848	}
	1849	}
	1850
	1851	/* input ports */
	1852	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, sngkace_input_r);
	1853
	1854	/* sound latch */
	1855	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, psikyo_soundlatch_w);
	1856
	1857	state->ka302c_banking = 0; // SH201B doesn't have any gfx banking
	1858
	1859	/* setup audiocpu banks */
	1860	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "audiocpu") + 0x10000, 0x8000);
	1861
	1862	/* Enable other regions */
	1863	#if 0
	1864	if (!strcmp(machine->gamedrv->name,"sngkace"))
	1865	{
	1866	UINT8 *ROM   =   memory_region(machine, "maincpu");
	1867	ROM[0x995] = 0x4e;
	1868	ROM[0x994] = 0x71;
	1869	ROM[0x997] = 0x4e;
	1870	ROM[0x996] = 0x71;
	1871
	1872	}
	1873	#endif
	1874	}
	1875
	1876	static void s1945_mcu_init( running_machine *machine )
	1877	{
	1878	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1879	state->s1945_mcu_direction = 0x00;
	1880	state->s1945_mcu_inlatch = 0xff;
	1881	state->s1945_mcu_latch1 = 0xff;
	1882	state->s1945_mcu_latch2 = 0xff;
	1883	state->s1945_mcu_latching = 0x5;
	1884	state->s1945_mcu_control = 0xff;
	1885	state->s1945_mcu_index = 0;
	1886	state->s1945_mcu_mode = 0;
	1887	state->s1945_mcu_bctrl = 0x00;
	1888
	1889	state_save_register_global(machine, state->s1945_mcu_direction);
	1890	state_save_register_global(machine, state->s1945_mcu_inlatch);
	1891	state_save_register_global(machine, state->s1945_mcu_latch1);
	1892	state_save_register_global(machine, state->s1945_mcu_latch2);
	1893	state_save_register_global(machine, state->s1945_mcu_latching);
	1894	state_save_register_global(machine, state->s1945_mcu_control);
	1895	state_save_register_global(machine, state->s1945_mcu_index);
	1896	state_save_register_global(machine, state->s1945_mcu_mode);
	1897	state_save_register_global(machine, state->s1945_mcu_bctrl);
	1898	}
	1899
2111	1900	static DRIVER_INIT( tengai )
2112	1901	{
	1902	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1903
2113	1904	/* input ports */
2114	1905	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
2115	1906
r6740	r6741
2118	1909
2119	1910	/* protection */
2120	1911	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
2121		s1945_mcu_init(0);
2122	1912
2123		psikyo_ka302c_banking = 0; // Banking is controlled by mcu
	1913	s1945_mcu_init(machine);
	1914	state->s1945_mcu_table = 0;
	1915
	1916	state->ka302c_banking = 0; // Banking is controlled by mcu
	1917
	1918	/* setup audiocpu banks */
	1919	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
	1920	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "audiocpu") + 0x10000 + 0x200, 0x8000);
2124	1921	}
2125	1922
	1923	static DRIVER_INIT( gunbird )
	1924	{
	1925	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1926
	1927	/* input ports */
	1928	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
	1929
	1930	/* sound latch */
	1931	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, psikyo_soundlatch_w);
	1932
	1933	state->ka302c_banking = 1;
	1934
	1935	/* setup audiocpu banks */
	1936	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
	1937	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "audiocpu") + 0x10000 + 0x200, 0x8000);
	1938	}
	1939
	1940
	1941	static DRIVER_INIT( s1945 )
	1942	{
	1943	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1944
	1945	/* input ports */
	1946	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
	1947
	1948	/* sound latch */
	1949	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	1950
	1951	/* protection and tile bank switching */
	1952	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
	1953
	1954	s1945_mcu_init(machine);
	1955	state->s1945_mcu_table = s1945_table;
	1956
	1957	state->ka302c_banking = 0; // Banking is controlled by mcu
	1958
	1959	/* setup audiocpu banks */
	1960	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
	1961	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "audiocpu") + 0x10000 + 0x200, 0x8000);
	1962	}
	1963
	1964	static DRIVER_INIT( s1945a )
	1965	{
	1966	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1967
	1968	/* input ports */
	1969	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
	1970
	1971	/* sound latch */
	1972	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	1973
	1974	/* protection and tile bank switching */
	1975	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
	1976
	1977	s1945_mcu_init(machine);
	1978	state->s1945_mcu_table = s1945a_table;
	1979
	1980	state->ka302c_banking = 0; // Banking is controlled by mcu
	1981
	1982	/* setup audiocpu banks */
	1983	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
	1984	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "audiocpu") + 0x10000 + 0x200, 0x8000);
	1985	}
	1986
	1987	static DRIVER_INIT( s1945j )
	1988	{
	1989	psikyo_state *state = (psikyo_state *)machine->driver_data;
	1990
	1991	/* input ports*/
	1992	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
	1993
	1994	/* sound latch */
	1995	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	1996
	1997	/* protection and tile bank switching */
	1998	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
	1999
	2000	s1945_mcu_init(machine);
	2001	state->s1945_mcu_table = s1945j_table;
	2002
	2003	state->ka302c_banking = 0; // Banking is controlled by mcu
	2004
	2005	/* setup audiocpu banks */
	2006	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
	2007	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "audiocpu") + 0x10000 + 0x200, 0x8000);
	2008	}
	2009
	2010	static DRIVER_INIT( s1945jn )
	2011	{
	2012	psikyo_state *state = (psikyo_state *)machine->driver_data;
	2013
	2014	/* input ports */
	2015	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
	2016
	2017	/* sound latch */
	2018	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	2019
	2020	state->ka302c_banking = 1;
	2021
	2022	/* setup audiocpu banks */
	2023	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
	2024	memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "audiocpu") + 0x10000 + 0x200, 0x8000);
	2025	}
	2026
2126	2027	static DRIVER_INIT( s1945bl )
2127	2028	{
2128		DRIVER_INIT_CALL( s1945jn );
	2029	psikyo_state *state = (psikyo_state *)machine->driver_data;
2129	2030
2130		memory_set_bankptr(machine, "okibank", memory_region(machine,"oki")+0x30000);
	2031	/* input ports */
	2032	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
	2033
	2034	/* sound latch */
	2035	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	2036
	2037	state->ka302c_banking = 1;
	2038
	2039	memory_configure_bank(machine, "okibank", 0, 4, memory_region(machine, "oki") + 0x30000, 0x10000);
	2040	memory_set_bank(machine, "okibank", 0);
2131	2041	}
2132	2042
2133	2043
r6740	r6741
2140	2050	***************************************************************************/
2141	2051
2142	2052	/* Working Games */
2143		GAME( 1993, samuraia, 0,        sngkace,  samuraia, sngkace,  ROT270, "Psikyo", "Samurai Aces (World)", 0) // Banpresto?
2144		GAME( 1993, sngkace,  samuraia, sngkace,  sngkace,  sngkace,  ROT270, "Psikyo", "Sengoku Ace (Japan)", 0) // Banpresto?
2145		GAME( 1994, gunbird,  0,        gunbird,  gunbird,  gunbird,  ROT270, "Psikyo", "Gunbird (World)", 0 )
2146		GAME( 1994, gunbirdk, gunbird,  gunbird,  gunbirdj, gunbird,  ROT270, "Psikyo", "Gunbird (Korea)", 0 )
2147		GAME( 1994, gunbirdj, gunbird,  gunbird,  gunbirdj, gunbird,  ROT270, "Psikyo", "Gunbird (Japan)", 0 )
2148		GAME( 1994, btlkroad, 0,        gunbird,  btlkroad, gunbird,  ROT0,   "Psikyo", "Battle K-Road", 0 )
2149		GAME( 1995, s1945,    0,        s1945,    s1945,    s1945,    ROT270, "Psikyo", "Strikers 1945 (World)", 0 )
2150		GAME( 1995, s1945a,   s1945,    s1945,    s1945a,   s1945a,   ROT270, "Psikyo", "Strikers 1945 (Japan / World)", 0) // Region dip - 0x0f=Japan, anything else=World
2151		GAME( 1995, s1945j,   s1945,    s1945,    s1945j,   s1945j,   ROT270, "Psikyo", "Strikers 1945 (Japan)", 0 )
2152		GAME( 1995, s1945jn,  s1945,    gunbird,  s1945j,   s1945jn,  ROT270, "Psikyo", "Strikers 1945 (Japan, unprotected)", 0 )
2153		GAME( 1995, s1945k,   s1945,    s1945,    s1945j,   s1945,    ROT270, "Psikyo", "Strikers 1945 (Korea)", 0 )
2154		GAME( 1995, s1945bl,  s1945,    s1945bl,  s1945bl,  s1945bl,  ROT270, "Psikyo", "Strikers 1945 (Hong Kong, bootleg)", 0 )
2155		GAME( 1996, tengai,   0,        s1945,    tengai,   tengai,   ROT0,   "Psikyo", "Tengai (World)", 0 )
2156		GAME( 1996, tengaij,  tengai,   s1945,    tengaij,  tengai,   ROT0,   "Psikyo", "Sengoku Blade: Sengoku Ace Episode II / Tengai", 0 ) // Region dip - 0x0f=Japan, anything else=World
	2053	GAME( 1993, samuraia, 0,        sngkace,  samuraia, sngkace,  ROT270, "Psikyo", "Samurai Aces (World)", GAME_SUPPORTS_SAVE ) // Banpresto?
	2054	GAME( 1993, sngkace,  samuraia, sngkace,  sngkace,  sngkace,  ROT270, "Psikyo", "Sengoku Ace (Japan)", GAME_SUPPORTS_SAVE ) // Banpresto?
	2055	GAME( 1994, gunbird,  0,        gunbird,  gunbird,  gunbird,  ROT270, "Psikyo", "Gunbird (World)", GAME_SUPPORTS_SAVE )
	2056	GAME( 1994, gunbirdk, gunbird,  gunbird,  gunbirdj, gunbird,  ROT270, "Psikyo", "Gunbird (Korea)", GAME_SUPPORTS_SAVE )
	2057	GAME( 1994, gunbirdj, gunbird,  gunbird,  gunbirdj, gunbird,  ROT270, "Psikyo", "Gunbird (Japan)", GAME_SUPPORTS_SAVE )
	2058	GAME( 1994, btlkroad, 0,        gunbird,  btlkroad, gunbird,  ROT0,   "Psikyo", "Battle K-Road", GAME_SUPPORTS_SAVE )
	2059	GAME( 1995, s1945,    0,        s1945,    s1945,    s1945,    ROT270, "Psikyo", "Strikers 1945 (World)", GAME_SUPPORTS_SAVE )
	2060	GAME( 1995, s1945a,   s1945,    s1945,    s1945a,   s1945a,   ROT270, "Psikyo", "Strikers 1945 (Japan / World)", GAME_SUPPORTS_SAVE ) // Region dip - 0x0f=Japan, anything else=World
	2061	GAME( 1995, s1945j,   s1945,    s1945,    s1945j,   s1945j,   ROT270, "Psikyo", "Strikers 1945 (Japan)", GAME_SUPPORTS_SAVE )
	2062	GAME( 1995, s1945jn,  s1945,    gunbird,  s1945j,   s1945jn,  ROT270, "Psikyo", "Strikers 1945 (Japan, unprotected)", GAME_SUPPORTS_SAVE )
	2063	GAME( 1995, s1945k,   s1945,    s1945,    s1945j,   s1945,    ROT270, "Psikyo", "Strikers 1945 (Korea)", GAME_SUPPORTS_SAVE )
	2064	GAME( 1995, s1945bl,  s1945,    s1945bl,  s1945bl,  s1945bl,  ROT270, "Psikyo", "Strikers 1945 (Hong Kong, bootleg)", GAME_SUPPORTS_SAVE )
	2065	GAME( 1996, tengai,   0,        s1945,    tengai,   tengai,   ROT0,   "Psikyo", "Tengai (World)", GAME_SUPPORTS_SAVE )
	2066	GAME( 1996, tengaij,  tengai,   s1945,    tengaij,  tengai,   ROT0,   "Psikyo", "Sengoku Blade: Sengoku Ace Episode II / Tengai", GAME_SUPPORTS_SAVE ) // Region dip - 0x0f=Japan, anything else=World

src/mame/drivers/esd16.c

r6740	r6741
47	47	#include "machine/eepromdev.h"
48	48	#include "sound/okim6295.h"
49	49	#include "sound/3812intf.h"
50		#include "esd16.h"
	50	#include "includes/esd16.h"
51	51
52	52
53	53	/***************************************************************************

src/mame/drivers/iqblock.c

r6740	r6741
54	54	#include "cpu/z180/z180.h"
55	55	#include "deprecat.h"
56	56	#include "machine/8255ppi.h"
57		#include "iqblock.h"
	57	#include "includes/iqblock.h"
58	58	#include "sound/2413intf.h"
59	59
60	60	static UINT8 *rambase;

src/mame/drivers/cb2001.c

r6740	r6741
40	40
41	41	#include "driver.h"
42	42	#include "cpu/nec/nec.h"
	43	#include "sound/ay8910.h"
	44	#include "machine/8255ppi.h"
43	45
44	46	#define xxxx 0x90 /* Unknown */
45	47
46	48	static const UINT8 cb2001_decryption_table[256] = {
47		0xe8,xxxx,xxxx,xxxx,xxxx,0x61,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 00 */
48		//  pppp                     ????
49		xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, 0x32,xxxx,0xa0,xxxx,0x3a,xxxx,xxxx,0x1f, /* 10 */
50		//                                           pppp     ????       pppp           ????
51		xxxx,0x8e,xxxx,0x0f,xxxx,0x49,0xbc,xxxx, xxxx,xxxx,xxxx,0x75,xxxx,xxxx,xxxx,xxxx, /* 20 */
52		//       !!!!      ????      ???? ????                      pppp
53		0x9d,xxxx,xxxx,xxxx,xxxx,xxxx,0xbe,xxxx, xxxx,xxxx,0x74,xxxx,xxxx,0xa6,0xbf,xxxx, /* 30 */
54		//  ????                          pppp                 ????           ???? ????
	49	0xe8,xxxx,0x94,xxxx,0x80,0x61,0x12,xxxx, 0x3c,xxxx,xxxx,0x23,xxxx,xxxx,xxxx,xxxx, /* 00 */
	50	//    pppp      ????      pppp ???? pppp       pppp           p?p?
	51	xxxx,xxxx,xxxx,0x27,0x1c,xxxx,xxxx,xxxx, 0x32,xxxx,0xa0,0xd3,0x3a,0x14,0x89,xxxx, /* 10 */
	52	//                   pppp pppp                 pppp      ???? pppp pppp pppp pppp ????
	53	xxxx,0x8e,xxxx,0x0f,xxxx,0x49,0xb5,xxxx, xxxx,xxxx,xxxx,0x75,xxxx,xxxx,xxxx,xxxx, /* 20 */
	54	//         !!!!      pppp      ???? pppp                      pppp
	55	0x9d,xxxx,xxxx,xxxx,xxxx,xxxx,0xbe,xxxx, xxxx,xxxx,0x74,xxxx,xxxx,0xa6,0xbf,0x74, /* 30 */
	56	//    ????                          pppp                 ????           ???? ???? pppp
55	57	xxxx,0xea,xxxx,xxxx,xxxx,0xb0,xxxx,xxxx, xxxx,0xa2,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 40 */
56		//       !!!!                gggg                 ????
57		xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x42,xxxx, xxxx,xxxx,xxxx,xxxx,0xeb,xxxx,xxxx,xxxx, /* 50 */
58		//                                ????                           ????
59		xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,0xa5,xxxx,xxxx,xxxx,xxxx,0xba,xxxx, /* 60 */
60		//                                                ????                     gggg
61		0xc3,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, 0x72,xxxx,0xf2,xxxx,xxxx,xxxx,xxxx,xxxx, /* 70 */
62		//  pppp                                     ????      ????
63		xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x34, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* 80 */
64		//                                     ????
	58	//         !!!!                gggg                 pppp
	59	xxxx,xxxx,0x2c,xxxx,xxxx,xxxx,0x42,0xc0, xxxx,xxxx,xxxx,xxxx,0xeb,xxxx,xxxx,xxxx, /* 50 */
	60	//              pppp                ???? pppp                      pppp
	61	xxxx,xxxx,xxxx,xxxx,0x22,xxxx,xxxx,xxxx, xxxx,0xa5,xxxx,xxxx,xxxx,0xbb,0xba,xxxx, /* 60 */
	62	//                        pppp                      ????                pppp gggg
	63	0xc3,xxxx,0x02,xxxx,xxxx,xxxx,0x24,xxxx, 0x72,xxxx,0xf2,xxxx,xxxx,0x43,xxxx,xxxx, /* 70 */
	64	//    pppp      pppp                pppp       pppp      ????           pppp
	65	xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x34, xxxx,xxxx,0x59,xxxx,0x73,xxxx,0x2a,xxxx, /* 80 */
	66	//                                       ????            pppp      pppp      ????
65	67	xxxx,xxxx,0xe9,xxxx,xxxx,0xbe,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,0xb9,xxxx,xxxx,xxxx, /* 90 */
66		//            ????           ????                                pppp
67		xxxx,xxxx,xxxx,0x06,0xaa,0x9c,xxxx,0xb8, xxxx,xxxx,0xfc,xxxx,xxxx,xxxx,xxxx,xxxx, /* A0 */
68		//                 ???? ???? ????      !!!!            ????
69		xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,0x1e,xxxx,0x07,0xcf, /* B0 */
70		//                                                               ????      ???? ????
71		xxxx,xxxx,0xee,xxxx,xxxx,0xe2,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0xa4,xxxx, /* C0 */
72		//            ????           pppp                                          ????
73		xxxx,xxxx,0x46,xxxx,0x60,xxxx,xxxx,xxxx, 0x88,xxxx,xxxx,xxxx,xxxx,0xfa,0xc7,xxxx, /* D0 */
74		//              pppp      ????                 pppp                     ???? !!!!
	68	//              ????           p?p?                                pppp
	69	xxxx,xxxx,xxxx,0x06,0xaa,0x9c,xxxx,0xb8, xxxx,xxxx,0xfc,xxxx,0x51,xxxx,xxxx,0x1a, /* A0 */
	70	//                   ???? ???? ????      !!!!            ????      pppp           pppp
	71	0x75,xxxx,0xb4,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,0x03,xxxx,xxxx,xxxx,0x07,0xcf, /* B0 */
	72	//    ????      pppp                                     pppp      ????      ???? ????
	73	xxxx,0xec,0xee,xxxx,xxxx,0xe2,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,0x2e,xxxx, /* C0 */
	74	//         pppp ????           pppp                                          pppp
	75	xxxx,xxxx,0x46,xxxx,0x60,xxxx,xxxx,0x47, 0x88,xxxx,xxxx,xxxx,xxxx,0xfa,0xc7,0x8b, /* D0 */
	76	//              pppp      ????           pppp  pppp                     ???? !!!! pppp
75	77	0x8a,xxxx,xxxx,0xc6,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* E0 */
76		//  ????           !!!!
77		xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* F0 */
78		//
	78	//    pppp           !!!!
	79	xxxx,xxxx,0xfe,xxxx,xxxx,xxxx,xxxx,xxxx, xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx,xxxx, /* F0 */
	80	//              pppp
79	81	};
80	82
81		/* robiza notes:
	83	/* robiza's notes:
82	84
	85	cmast91 and cmv4 seems similar to this cb2001:
	86
	87	cmast91:                      cb2001:
	88	0067 ld a,$07                 e0130 mov al,7h
	89	0069 out ($23),a              e0132 mov dw,23h
	90	e0135 out dw,al
	91
	92	006b ld a,$3f                 e0136 mov al,3fh
	93	006d out ($22),a              e0138 mov dw,22h
	94	e013b out dw,al
	95
	96	006f ld a,$9b                 e0124 mov al,0ffh
	97	0071 out ($13),a              e0126 mov dw,13h
	98	e0129 out dw,al
	99
	100	-------------------------------------------------
	101
	102	cmv4                          cb2001                     (en -> de)
	103
	104	.                             e025f mov dw,2h
	105	02b2 in a,($06)               e0262 in al,dw             (c1 -> ec)
	106	.                             e0263 xor al,d0h
	107	.                             e0265 and l,c0h
	108	02b4 bit 6,a                  e0267 test1 al,6h          (23 -> 0f)
	109	02b6 jp z,$41e2               e026b be e0270
	110	.                             e026d br e39fe
	111	02b9 bit 7,a                  e0270 test1 al,7h
	112	02bb jp z,$41e2               e0274 be e0279
	113	02be call $0ab2               .
	114	.                             e0276 br e6120
	115	02c1 ld bc,$8000              e0279 mov cw,8000h
	116
	117	029f ld b,$fc
	118	02a1 call $0c38               e0239 call 0e30b8h
	119	02a4 ld hl,$d023              e023d mov ix,90h           (36 -> be)
	120	02a7 call $2b2d               e0240 call 0e32a6h
	121	2b2d ld a,$01                 e32a6 mov al,1h
	122	2b2f or a                     e32a8 and al,al
	123	2b30 add a,(hl)               e32aa add al,b ptr [ix]
	124	2b31 daa                      e32ac daa                (13 -> 27) not sure
	125	2b32 ld (hl),a                e32ad mov b ptr [ix],al
	126	2b33 push bc                  e32af push cw            (ac -> 51)
	127	2b34 ld b,$03                 e32b0 mov cw,3h          (9c -> b9)
	128	2b36 dec hl                   e32b3                               inc ix or dec ix?
	129	2b37 ld a,(hl)                e32b4 mov al,b ptr [ix]  (e0 -> 8a)
	130	2b38 adc a,$00                e32b6 adc al,0h          (1d -> 14)
	131	2b3a daa                      e32b8 daa
	132	2b3b ld (hl),a                e32b9 mov b ptr [ix],al
	133	2b3c djnz $2b36               e32bb dbnz e32b3h        (c5 -> e2)
	134	2b3e pop bc                   e32bd pop cw             (8a -> 59)
	135	2b3f ret                      e32be ret
	136
	137	2b40-2b4b                     e32bf-e32d1              (06 -> 12) (d7 -> 4f dec iy or 47 inc iy)
	138	2b4c-2b57                     e32d2-e32e4              (af -> 1a)
	139	.                             e32e5-                   (8e -> 2a) (14 -> 1c)
	140
	141	02aa ld a,$01                 e0243 mov al,1h
	142	02ac ld ($d618),a             e0245 mov [72dh],al
	143	02af call $4a8e               e0248 call 0e66cbh
	144	4a8e ld a,($d618)             e66cb mov al,[72dh]      (1a -> a0)
	145	4a91 and a                    e66ce and al,al          (64 -> 22)
	146	4a92 jr z,$4abe               e66d0 be e6703           (3f -> 74)
	147	4a94 cp $02                   e66d2 cmp al,2h          (08 -> 3c)
	148	4a96 jr nz,$4aa6              e66d4 bne e66e9          (2b -> 75)
	149	4a98 ld a,$0d                 e66d6 mov al,0dh         (45 -> b0)
	150	.                             e66d8 mov dw,23h         (6e -> ba)
	151	4a9a out ($03),a              e66db out dw,al          (c2 -> ee)
	152	4a9c ld a,$00                 e66dc mov al,00h
	153	.                             e66de mov dw,22h
	154	4a9e out ($02),a              e66e1 out dw,al
	155	4aa0 xor a                    e66e2 xor al,al          (18 -> 32)
	156	4aa1 ld ($d618),al            e66e4 mov [72dh],al      (49 -> a2)
	157	4aa4 jr $4abe                 e66e7 br 0e6703h         (5c -> eb)
	158
	159	4aa6 add a,a                  e66e9 add al,al          (72 -> 02)
	160	4aa7 ld e,a                   .
	161	4aa8 ld d,$00                 e66eb mov ah,00h         (b2 -> b4)
	162	4aaa ld hl,$4b62              e66ed mov bw,67cbh       (6d -> bb)
	163	4aad add lh,de                e66f0 add bw,aw          (ba -> 03)
	164	4aae ld e,(hl)                .
	165	4aaf inc hl                   .
	166	4abo ld d,(hl)                .
	167	4ab1 ex de,hl                 e66f2 mov bw,w ptr ss[bw](df -> 8b)prefix not sure about prefix
	168	4ab2 xor a                    .
	169	4ab3 ld ($d618),a             e66f5 mov b ptr[72dh],ah (d8 -> 88)
	170	4ab6 ld ($d619),a             e66f9 mov b ptr[72eh],ah
	171	4ab9 ld ($d61a),hl            e66fd mov w ptr[72fh],bw (1e -> 89)
	172	4abc jr $4ac9                 e6701 br 0e6712h
	173
	174	4abe ld a,($d619)             e6703 mov al,[72eh]
	175	4ac1 and a                    e6706 and al,al
	176	4ac2 jr z,$4ac9               e6708 be 0e6712h
	177	4ac4 dec a                    e670a dec al             (f2 -> fe)
	178	4ac5 ld ($d619),a             e670c mov [72eh],al
	179	.                             e670f be 0e6712h
	180	4ac8 ret nz                   e6711 ret                (70 -> c3)
	181
	182	4ac9 ld hl,($d61a)            e6712 mov bw,w ptr[72fh]
	183	.                             e6716 or bw,bw                      ??? (0b -> 23) ???
	184	.                             e6718 bne 0e671bh
	185	.                             e671a ret
	186	4acc ld a,(hl)                e671b mov al,b ptr ps[bw](ce -> 2e) (e0 -> 8a) not sure about the prefix
	187	4acd inc hl                   e671e inc bw             (7d -> 43)
	188	4ace cp $f0                   e671f cmp al,0f0h
	189	4ad0 jr nc,$4b14              e6721 bnc 0e676fh        (8c -> 73)
	190
	191	4add sub $50                  e672f sub al,50h         (52 -> 2c)
	192	4adf cp $50                   e6731 cmp al,50h
	193	4ae1 jr c,$4ae7               e6733 bc 0e6739          (78 -> 72)
	194	4ae3 ld b,$04                 e6735 mov ch,4h          (26 -> b5)
	195	4ae5 sub $50                  e6737 sub al,50h
	196	4ae7 ld c,a                   e6739 mov cl,al
	197	4ae8 and $0f                  e673b and al,0fh         (76 -> 24)
	198	4aea add a,a                  e673d add al,al
	199	4aeb ld e,a                   .
	200	4aec ld d,$00                 e673f mov ah,0h
	201	4aee ld hl,$4b42              e6741 mov bw,67ab
	202	4af1 add hl,de                e6744 add bw,aw
	203	4af2 ld e,(hl)                e6746 mov bw,w ptr ps[bw]           not sure the prefix
	204	4af3 inc hl                   .
	205	4af4 ld d,(hl)                .
	206	4af5 ld a,c                   .
	207	4af6 and $f0                  e6749 and cl,f0h         (04 -> 80)
	208	4af8 jr z,$4b05               e674c be 0e6753
	209	4afa rrca                     .
	210	4afb rrca                     .
	211	4afc rrca                     .
	212	4afd rrca                     e674e ror cl,4h          (57 -> c0)
	213	4afe srl d                    .
	214	4b00 rr e                     e6751 shr bw,cl          (1b -> d3)
	215	4b02 dec a                    .
	216	4b03 jr nz,$4afe              .
	217	4b05 ld a,b                   e6753 mov al,ch
	218	.                             e6755 mov dw,23h
	219	4b06 out ($03),a              e6758 out dw,al
	220
	221
	222
	223
	224	-------------------------------------------------
	225
83	226	56 -> ????
84	227
85	228	5c -> conditional jmp for sure
r6740	r6741
142	285	ADDRESS_MAP_END
143	286
144	287	static ADDRESS_MAP_START( cb2001_io, ADDRESS_SPACE_IO, 16 )
	288	//  ADDRESS_MAP_GLOBAL_MASK(0x00ff)
	289	AM_RANGE(0x00, 0x03) AM_DEVREADWRITE8("ppi8255_0", ppi8255_r, ppi8255_w, 0xffff)   /* Input Ports */
	290	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE8("ppi8255_1", ppi8255_r, ppi8255_w, 0xffff)   /* DIP switches */
	291	AM_RANGE(0x20, 0x21) AM_DEVREAD8("aysnd", ay8910_r, 0x00ff)
	292	AM_RANGE(0x22, 0x23) AM_DEVWRITE8("aysnd", ay8910_data_address_w, 0xffff)
145	293	ADDRESS_MAP_END
146	294
147	295	static INPUT_PORTS_START( cb2001 )
	296	PORT_START("IN0")
	297	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	298	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	299	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) PORT_NAME("Stop 2 / Big")
	300	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) PORT_NAME("Stop 1 / D-UP")
	301	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SLOT_STOP_ALL ) PORT_NAME("Stop All / Take")
	302	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET )
	303	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SLOT_STOP3 ) PORT_NAME("Stop 3 / Small / Info")
	304	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
	305
	306	PORT_START("IN1")
	307	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	308	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	309	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2)   /* Coin B */
	310	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	311	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_IMPULSE(2)   /* Coin D */
	312	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2)   /* Coin C */
	313	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
	314	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)   /* Coin A */
	315
	316	PORT_START("IN2")
	317	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	318	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
	319	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	320	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	321	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant")
	322	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	323	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings")
	324	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats")
	325
	326	PORT_START("DSW1")
	327	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )   PORT_DIPLOCATION("DSW1:1")   /* OK */
	328	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	329	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	330	PORT_DIPNAME( 0x02, 0x02, "Hopper Out Switch" )   PORT_DIPLOCATION("DSW1:2")   /* OK */
	331	PORT_DIPSETTING(    0x02, "Active Low" )
	332	PORT_DIPSETTING(    0x00, "Active High" )
	333	PORT_DIPNAME( 0x04, 0x04, "Payout Mode" )      PORT_DIPLOCATION("DSW1:3")   /* OK */
	334	PORT_DIPSETTING(    0x04, "Payout Switch" )
	335	PORT_DIPSETTING(    0x00, "Automatic" )
	336	PORT_DIPNAME( 0x08, 0x00, "W-UP '7'" )         PORT_DIPLOCATION("DSW1:4")   /* not checked */
	337	PORT_DIPSETTING(    0x08, "Loss" )
	338	PORT_DIPSETTING(    0x00, "Even" )
	339	PORT_DIPNAME( 0x10, 0x00, "W-UP Pay Rate" )      PORT_DIPLOCATION("DSW1:5")   /* OK */
	340	PORT_DIPSETTING(    0x00, "80%" )
	341	PORT_DIPSETTING(    0x10, "90%" )
	342	PORT_DIPNAME( 0x20, 0x00, "W-UP Game" )         PORT_DIPLOCATION("DSW1:6")   /* OK */
	343	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	344	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	345	PORT_DIPNAME( 0xc0, 0xc0, "Bet Max" )         PORT_DIPLOCATION("DSW1:7,8")   /* OK */
	346	PORT_DIPSETTING(    0x00, "16" )
	347	PORT_DIPSETTING(    0x40, "32" )
	348	PORT_DIPSETTING(    0x80, "64" )
	349	PORT_DIPSETTING(    0xc0, "96" )
	350
	351	PORT_START("DSW2")
	352	PORT_DIPNAME( 0x07, 0x00, "Main Game Pay Rate" )   PORT_DIPLOCATION("DSW2:1,2,3")   /* OK */
	353	PORT_DIPSETTING(    0x07, "35%" )
	354	PORT_DIPSETTING(    0x06, "40%" )
	355	PORT_DIPSETTING(    0x05, "45%" )
	356	PORT_DIPSETTING(    0x04, "50%" )
	357	PORT_DIPSETTING(    0x03, "55%" )
	358	PORT_DIPSETTING(    0x02, "60%" )
	359	PORT_DIPSETTING(    0x01, "65%" )
	360	PORT_DIPSETTING(    0x00, "70%" )
	361	PORT_DIPNAME( 0x18, 0x00, "Hopper Limit" )         PORT_DIPLOCATION("DSW2:4,5")   /* OK */
	362	PORT_DIPSETTING(    0x18, "300" )
	363	PORT_DIPSETTING(    0x10, "500" )
	364	PORT_DIPSETTING(    0x08, "1000" )
	365	PORT_DIPSETTING(    0x00, "Unlimited" )
	366	PORT_DIPNAME( 0x20, 0x00, "100 Odds Sound" )      PORT_DIPLOCATION("DSW2:6")   /* not checked */
	367	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	368	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	369	PORT_DIPNAME( 0x40, 0x40, "Key-In Type" )         PORT_DIPLOCATION("DSW2:7")   /* OK */
	370	PORT_DIPSETTING(    0x40, "A-Type" )
	371	PORT_DIPSETTING(    0x00, "B-Type" )
	372	PORT_DIPNAME( 0x80, 0x00, "Center Super 7 Bet Limit" )   PORT_DIPLOCATION("DSW2:8")   /* related with DSW 4-6 */
	373	PORT_DIPSETTING(    0x80, "Unlimited" )
	374	PORT_DIPSETTING(    0x00, "Limited" )
	375
	376	PORT_START("DSW3")
	377	PORT_DIPNAME( 0x03, 0x03, "Key In Rate" ) PORT_DIPLOCATION("DSW3:1,2")   /* OK */
	378	PORT_DIPSETTING(    0x00, "1 Coin/10 Credits" )  PORT_CONDITION("DSW2",0x40,PORTCOND_EQUALS,0x40) /* A-Type */
	379	PORT_DIPSETTING(    0x01, "1 Coin/20 Credits" )  PORT_CONDITION("DSW2",0x40,PORTCOND_EQUALS,0x40)
	380	PORT_DIPSETTING(    0x02, "1 Coin/50 Credits" )  PORT_CONDITION("DSW2",0x40,PORTCOND_EQUALS,0x40)
	381	PORT_DIPSETTING(    0x03, "1 Coin/100 Credits" ) PORT_CONDITION("DSW2",0x40,PORTCOND_EQUALS,0x40)
	382	PORT_DIPSETTING(    0x00, DEF_STR( 1C_5C ) )     PORT_CONDITION("DSW2",0x40,PORTCOND_EQUALS,0x00) /* B-Type */
	383	PORT_DIPSETTING(    0x01, "1 Coin/10 Credits" )  PORT_CONDITION("DSW2",0x40,PORTCOND_EQUALS,0x00)
	384	PORT_DIPSETTING(    0x02, "1 Coin/25 Credits" )  PORT_CONDITION("DSW2",0x40,PORTCOND_EQUALS,0x00)
	385	PORT_DIPSETTING(    0x03, "1 Coin/50 Credits" )  PORT_CONDITION("DSW2",0x40,PORTCOND_EQUALS,0x00)
	386	PORT_DIPNAME( 0x0c, 0x0c, "Coin A Rate" ) PORT_DIPLOCATION("DSW3:3,4")   /* OK */
	387	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
	388	PORT_DIPSETTING(    0x04, DEF_STR( 1C_2C ) )
	389	PORT_DIPSETTING(    0x08, DEF_STR( 1C_5C ) )
	390	PORT_DIPSETTING(    0x0c, "1 Coin/10 Credits" )
	391	PORT_DIPNAME( 0x30, 0x30, "Coin D Rate" ) PORT_DIPLOCATION("DSW3:5,6")   /* OK */
	392	PORT_DIPSETTING(    0x30, DEF_STR( 5C_1C ) )    PORT_CONDITION("DSW4",0x10,PORTCOND_EQUALS,0x10) /* C-Type */
	393	PORT_DIPSETTING(    0x20, DEF_STR( 2C_1C ) )    PORT_CONDITION("DSW4",0x10,PORTCOND_EQUALS,0x10)
	394	PORT_DIPSETTING(    0x10, DEF_STR( 1C_1C ) )    PORT_CONDITION("DSW4",0x10,PORTCOND_EQUALS,0x10)
	395	PORT_DIPSETTING(    0x00, DEF_STR( 1C_2C ) )    PORT_CONDITION("DSW4",0x10,PORTCOND_EQUALS,0x10)
	396	PORT_DIPSETTING(    0x00, DEF_STR( 1C_5C ) )    PORT_CONDITION("DSW4",0x10,PORTCOND_EQUALS,0x00) /* D-Type */
	397	PORT_DIPSETTING(    0x10, "1 Coin/10 Credits" ) PORT_CONDITION("DSW4",0x10,PORTCOND_EQUALS,0x00)
	398	PORT_DIPSETTING(    0x20, "1 Coin/25 Credits" ) PORT_CONDITION("DSW4",0x10,PORTCOND_EQUALS,0x00)
	399	PORT_DIPSETTING(    0x30, "1 Coin/50 Credits" ) PORT_CONDITION("DSW4",0x10,PORTCOND_EQUALS,0x00)
	400	PORT_DIPNAME( 0xc0, 0xc0, "Coin C Rate" ) PORT_DIPLOCATION("DSW3:7,8")   /* OK */
	401	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
	402	PORT_DIPSETTING(    0x40, DEF_STR( 1C_2C ) )
	403	PORT_DIPSETTING(    0x80, DEF_STR( 1C_5C ) )
	404	PORT_DIPSETTING(    0xc0, "1 Coin/10 Credits" )
	405
	406	PORT_START("DSW4")
	407	PORT_DIPNAME( 0x07, 0x07, "Credit Limit" )            PORT_DIPLOCATION("DSW4:1,2,3")   /* not checked */
	408	PORT_DIPSETTING(    0x07, "5,000" )
	409	PORT_DIPSETTING(    0x06, "10,000" )
	410	PORT_DIPSETTING(    0x05, "20,000" )
	411	PORT_DIPSETTING(    0x04, "30,000" )
	412	PORT_DIPSETTING(    0x03, "40,000" )
	413	PORT_DIPSETTING(    0x02, "50,000" )
	414	PORT_DIPSETTING(    0x01, "100,000" )
	415	PORT_DIPSETTING(    0x00, "Unlimited" )
	416	PORT_DIPNAME( 0x08, 0x08, "Display Of Payout Limit" ) PORT_DIPLOCATION("DSW4:4") /* not working */
	417	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	418	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	419	PORT_DIPNAME( 0x10, 0x10, "Type Of Coin D" )          PORT_DIPLOCATION("DSW4:5")   /* OK */
	420	PORT_DIPSETTING(    0x10, "C-Type" )
	421	PORT_DIPSETTING(    0x00, "D-Type" )
	422	PORT_DIPNAME( 0x20, 0x20, "Min. Bet For Bonus Play" ) PORT_DIPLOCATION("DSW4:6")   /* OK */
	423	PORT_DIPSETTING(    0x20, "16 Bet" )
	424	PORT_DIPSETTING(    0x00, "8 Bet" )
	425	PORT_DIPNAME( 0x40, 0x40, "Reel Speed" )              PORT_DIPLOCATION("DSW4:7")   /* OK */
	426	PORT_DIPSETTING(    0x40, DEF_STR( Low ) )
	427	PORT_DIPSETTING(    0x00, DEF_STR( High ) )
	428	PORT_DIPNAME( 0x80, 0x80, "Hopper Out By Coin A" )    PORT_DIPLOCATION("DSW4:8")   /* not checked */
	429	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	430	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	431
	432	PORT_START("DSW5")
	433	PORT_DIPNAME( 0x01, 0x00, "Display Of Doll On Demo" )          PORT_DIPLOCATION("DSW5:1")   /* not working */
	434	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	435	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	436	PORT_DIPNAME( 0x06, 0x06, "Coin In Limit" )                    PORT_DIPLOCATION("DSW5:2,3")   /* not checked */
	437	PORT_DIPSETTING(    0x06, "1,000" )
	438	PORT_DIPSETTING(    0x04, "5,000" )
	439	PORT_DIPSETTING(    0x02, "10,000" )
	440	PORT_DIPSETTING(    0x00, "20,000" )
	441	PORT_DIPNAME( 0x18, 0x18, "Condition For 3 Kind Of Bonus" )    PORT_DIPLOCATION("DSW5:4,5")   /* not checked */
	442	PORT_DIPSETTING(    0x18, "12-7-1" )
	443	PORT_DIPSETTING(    0x10, "9-5-1" )
	444	PORT_DIPSETTING(    0x08, "6-3-1" )
	445	PORT_DIPSETTING(    0x00, "3-2-1" )
	446	PORT_DIPNAME( 0x20, 0x00, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
	447	PORT_DIPSETTING(    0x20, DEF_STR( Low ) )
	448	PORT_DIPSETTING(    0x00, DEF_STR( High ) )
	449	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )                 PORT_DIPLOCATION("DSW5:7")   /* listed as unused */
	450	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	451	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	452	PORT_DIPNAME( 0x80, 0x80, "Test Mode For Disp. Of Doll" )      PORT_DIPLOCATION("DSW5:8")   /* not working */
	453	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	454	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	455
148	456	INPUT_PORTS_END
149	457
150	458	static INTERRUPT_GEN( vblank_irq )
r6740	r6741
200	508	}
201	509	}
202	510
	511	static const ppi8255_interface cb2001_ppi8255_intf[2] =
	512	{
	513	{   /* A, B & C set as input */
	514	DEVCB_INPUT_PORT("IN0"),   /* Port A read */
	515	DEVCB_INPUT_PORT("IN1"),   /* Port B read */
	516	DEVCB_INPUT_PORT("IN2"),   /* Port C read */
	517	DEVCB_NULL,               /* Port A write */
	518	DEVCB_NULL,               /* Port B write */
	519	DEVCB_NULL               /* Port C write */
	520	},
	521	{   /* A, B & C set as input */
	522	DEVCB_INPUT_PORT("DSW1"),   /* Port A read */
	523	DEVCB_INPUT_PORT("DSW2"),   /* Port B read */
	524	DEVCB_INPUT_PORT("DSW3"),   /* Port C read */
	525	DEVCB_NULL,               /* Port A write */
	526	DEVCB_NULL,               /* Port B write */
	527	DEVCB_NULL               /* Port C write */
	528	}
	529	};
203	530
	531	static const ay8910_interface cb2001_ay8910_config =
	532	{
	533	AY8910_LEGACY_OUTPUT,
	534	AY8910_DEFAULT_LOADS,
	535	DEVCB_INPUT_PORT("DSW4"),
	536	DEVCB_INPUT_PORT("DSW5"),
	537	DEVCB_NULL,
	538	DEVCB_NULL
	539	};
	540
204	541	static const nec_config cb2001_config = { cb2001_decryption_table, };
205	542	static MACHINE_DRIVER_START( cb2001 )
206	543	MDRV_CPU_ADD("maincpu", V30, 20000000) // CPU91A-011-0016JK004; encrypted cpu like nec v25/35 used in some irem game
r6740	r6741
209	546	MDRV_CPU_IO_MAP(cb2001_io)
210	547	MDRV_CPU_VBLANK_INT("screen", vblank_irq)
211	548
	549	MDRV_PPI8255_ADD( "ppi8255_0", cb2001_ppi8255_intf[0] )
	550	MDRV_PPI8255_ADD( "ppi8255_1", cb2001_ppi8255_intf[1] )
	551
212	552	MDRV_GFXDECODE(cb2001)
213	553
214	554	MDRV_PALETTE_INIT( cb2001 )
r6740	r6741
224	564
225	565	MDRV_VIDEO_START(cb2001)
226	566	MDRV_VIDEO_UPDATE(cb2001)
	567
	568	/* sound hardware */
	569	MDRV_SPEAKER_STANDARD_MONO("mono")
	570	MDRV_SOUND_ADD("aysnd", AY8910, 1500000) // wrong
	571	MDRV_SOUND_CONFIG(cb2001_ay8910_config)
	572	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
227	573	MACHINE_DRIVER_END
228	574
229	575

src/mame/drivers/funkyjet.c

r6740	r6741
93	93	#include "sound/2151intf.h"
94	94	#include "sound/okim6295.h"
95	95
96		#include "decocrpt.h"
97		#include "decoprot.h"
98		#include "deco16ic.h"
	96	#include "includes/decocrpt.h"
	97	#include "includes/decoprot.h"
	98	#include "includes/deco16ic.h"
99	99
100	100	VIDEO_START( funkyjet );
101	101	VIDEO_UPDATE( funkyjet );

src/mame/drivers/xexex.c

r6740	r6741
64	64	#include "driver.h"
65	65	#include "cpu/m68000/m68000.h"
66	66	#include "deprecat.h"
67		#include "video/konamiic.h"
	67	#include "video/konicdev.h"
68	68	#include "cpu/z80/z80.h"
69		#include "machine/eeprom.h"
	69	#include "machine/eepromdev.h"
70	70	#include "sound/k054539.h"
71	71	#include "sound/2151intf.h"
72	72	#include "sound/flt_vol.h"
73		#include "konamipt.h"
	73	#include "includes/konamipt.h"
74	74
75	75	VIDEO_START( xexex );
76	76	VIDEO_UPDATE( xexex );
77	77	void xexex_set_alpha(int on);
78	78
	79	extern void xexex_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask);
	80	extern void xexex_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags);
	81
79	82	static MACHINE_START( xexex );
80	83	static MACHINE_RESET( xexex );
81	84
82	85	static UINT16 *xexex_workram;
83	86	static UINT16 cur_control2;
84		static int init_eeprom_count;
85	87	static INT32 cur_sound_region, xexex_strip0x1a;
86	88	static int suspension_active, resume_trigger;
87	89	static emu_timer *dmadelay_timer;
r6740	r6741
99	101	"0100110000000" /* unlock command */
100	102	};
101	103
102		static NVRAM_HANDLER( xexex )
103		{
104		if (read_or_write)
105		eeprom_save(file);
106		else
107		{
108		eeprom_init(machine, &eeprom_intf);
109
110		if (file)
111		{
112		init_eeprom_count = 0;
113		eeprom_load(file);
114		}
115		else
116		init_eeprom_count = 10;
117		}
118		}
119
120
121	104	#if 0 // (for reference; do not remove)
122	105
123	106	/* the interface with the 053247 is weird. The chip can address only 0x1000 bytes */
r6740	r6741
125	108	/* A1, A5 and A6 don't go to the 053247. */
126	109	static READ16_HANDLER( K053247_scattered_word_r )
127	110	{
	111	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
	112
128	113	if (offset & 0x0031)
129	114	return space->machine->generic.spriteram.u16[offset];
130	115	else
131	116	{
132	117	offset = ((offset & 0x000e) >> 1) | ((offset & 0x3fc0) >> 3);
133		return K053247_word_r(offset,mem_mask);
	118	return k053247_word_r(k053246, offset, mem_mask);
134	119	}
135	120	}
136	121
137	122	static WRITE16_HANDLER( K053247_scattered_word_w )
138	123	{
	124	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
	125
139	126	if (offset & 0x0031)
140	127	COMBINE_DATA(space->machine->generic.spriteram.u16+offset);
141	128	else
142	129	{
143	130	offset = ((offset & 0x000e) >> 1) | ((offset & 0x3fc0) >> 3);
144		K053247_word_w(offset,data,mem_mask);
	131	k053247_word_w(k053246, offset, data, mem_mask);
145	132	}
146	133	}
147	134
r6740	r6741
150	137
151	138	static void xexex_objdma(running_machine *machine, int limiter)
152	139	{
	140	const device_config *k053246 = devtag_get_device(machine, "k053246");
153	141	int counter, num_inactive;
154	142	UINT16 *src, *dst;
155	143
156	144	counter = frame;
157	145	frame = video_screen_get_frame_number(machine->primary_screen);
158		if (limiter && counter == frame) return; // make sure we only do DMA transfer once per frame
	146	if (limiter && counter == frame)
	147	return; // make sure we only do DMA transfer once per frame
159	148
160		K053247_export_config(&dst, 0, 0, 0, &counter);
	149	k053247_get_ram(k053246, &dst);
	150	counter = k053247_get_dy(k053246);
161	151	src = machine->generic.spriteram.u16;
162	152	num_inactive = counter = 256;
163	153
r6740	r6741
201	191	}
202	192
203	193
204		static READ16_HANDLER( control1_r )
	194	static void parse_control2( running_machine *machine )
205	195	{
206		int res;
	196	const device_config *k053246 = devtag_get_device(machine, "k053246");
207	197
208		/* bit 0 is EEPROM data */
209		/* bit 1 is EEPROM ready */
210		/* bit 3 is service button */
211		res = input_port_read(space->machine, "EEPROM");
212
213		if (init_eeprom_count)
214		{
215		init_eeprom_count--;
216		res &= 0xf7;
217		}
218
219		return res;
220		}
221
222		static void parse_control2(void)
223		{
224	198	/* bit 0  is data */
225	199	/* bit 1  is cs (active low) */
226	200	/* bit 2  is clock (active high) */
227	201	/* bit 5  is enable irq 6 */
228	202	/* bit 6  is enable irq 5 */
229	203	/* bit 11 is watchdog */
	204	input_port_write(machine, "EEPROMOUT", cur_control2, 0xff);
230	205
231		eeprom_write_bit(cur_control2 & 0x01);
232		eeprom_set_cs_line((cur_control2 & 0x02) ? CLEAR_LINE : ASSERT_LINE);
233		eeprom_set_clock_line((cur_control2 & 0x04) ? ASSERT_LINE : CLEAR_LINE);
234
235	206	/* bit 8 = enable sprite ROM reading */
236		K053246_set_OBJCHA_line((cur_control2 & 0x0100) ? ASSERT_LINE : CLEAR_LINE);
	207	k053246_set_objcha_line(k053246, (cur_control2 & 0x0100) ? ASSERT_LINE : CLEAR_LINE);
237	208
238	209	/* bit 9 = disable alpha channel on K054157 plane 0 (under investigation) */
239	210	xexex_set_alpha(!(cur_control2 & 0x200));
r6740	r6741
247	218	static WRITE16_HANDLER( control2_w )
248	219	{
249	220	COMBINE_DATA(&cur_control2);
250		parse_control2();
	221	parse_control2(space->machine);
251	222	}
252	223
253	224
r6740	r6741
305	276	if (cur_control2 & 0x0040)
306	277	{
307	278	// foul-proof (CPU0 could be deactivated while we wait)
308		if (suspension_active) { suspension_active = 0; cpuexec_trigger(machine, resume_trigger); }
	279	if (suspension_active)
	280	{
	281	suspension_active = 0;
	282	cpuexec_trigger(machine, resume_trigger);
	283	}
309	284
310	285	// IRQ 5 is the "object DMA end interrupt" and shouldn't be triggered
311	286	// if object data isn't ready for DMA within the frame.
r6740	r6741
315	290
316	291	static INTERRUPT_GEN( xexex_interrupt )
317	292	{
318		if (suspension_active) { suspension_active = 0; cpuexec_trigger(device->machine, resume_trigger); }
	293	const device_config *k053246 = devtag_get_device(device->machine, "k053246");
319	294
	295	if (suspension_active)
	296	{
	297	suspension_active = 0;
	298	cpuexec_trigger(device->machine, resume_trigger);
	299	}
	300
320	301	switch (cpu_getiloops(device))
321	302	{
322	303	case 0:
r6740	r6741
326	307	break;
327	308
328	309	case 1:
329		if (K053246_is_IRQ_enabled())
	310	if (k053246_is_irq_enabled(k053246))
330	311	{
331	312	// OBJDMA starts at the beginning of V-blank
332	313	xexex_objdma(device->machine, 0);
r6740	r6741
354	335
355	336	AM_RANGE(0x090000, 0x097fff) AM_RAM AM_BASE_GENERIC(spriteram)         // K053247 sprite RAM
356	337	AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(spriteram16_mirror_r, spriteram16_mirror_w)   // K053247 sprite RAM mirror read
357		AM_RANGE(0x0c0000, 0x0c003f) AM_WRITE(K056832_word_w)            // VACSET (K054157)
358		AM_RANGE(0x0c2000, 0x0c2007) AM_WRITE(K053246_word_w)            // OBJSET1
359		AM_RANGE(0x0c4000, 0x0c4001) AM_READ(K053246_word_r)            // Passthrough to sprite roms
360		AM_RANGE(0x0c6000, 0x0c7fff) AM_READWRITE(K053250_0_ram_r, K053250_0_ram_w)   // K053250 "road" RAM
361		AM_RANGE(0x0c8000, 0x0c800f) AM_READWRITE(K053250_0_r, K053250_0_w)
362		AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)            // CLTC
363		AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)            // priority encoder
364		AM_RANGE(0x0d0000, 0x0d001f) AM_WRITE(K053252_word_w)            // CCU
	338	AM_RANGE(0x0c0000, 0x0c003f) AM_DEVWRITE("k056832", k056832_word_w)            // VACSET (K054157)
	339	AM_RANGE(0x0c2000, 0x0c2007) AM_DEVWRITE("k053246", k053246_word_w)            // OBJSET1
	340	AM_RANGE(0x0c4000, 0x0c4001) AM_DEVREAD("k053246", k053246_word_r)            // Passthrough to sprite roms
	341	AM_RANGE(0x0c6000, 0x0c7fff) AM_DEVREADWRITE("k053250", k053250_ram_r, k053250_ram_w)   // K053250 "road" RAM
	342	AM_RANGE(0x0c8000, 0x0c800f) AM_DEVREADWRITE("k053250", k053250_r, k053250_w)
	343	AM_RANGE(0x0ca000, 0x0ca01f) AM_DEVWRITE("k054338", k054338_word_w)            // CLTC
	344	AM_RANGE(0x0cc000, 0x0cc01f) AM_DEVWRITE("k053251", k053251_lsb_w)            // priority encoder
	345	AM_RANGE(0x0d0000, 0x0d001f) AM_DEVWRITE("k053252", k053252_word_w)            // CCU
365	346	AM_RANGE(0x0d4000, 0x0d4001) AM_WRITE(sound_irq_w)
366	347	AM_RANGE(0x0d600c, 0x0d600d) AM_WRITE(sound_cmd1_w)
367	348	AM_RANGE(0x0d600e, 0x0d600f) AM_WRITE(sound_cmd2_w)
368	349	AM_RANGE(0x0d6014, 0x0d6015) AM_READ(sound_status_r)
369	350	AM_RANGE(0x0d6000, 0x0d601f) AM_RAM                           // sound regs fall through
370		AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)            // VSCCS regs
	351	AM_RANGE(0x0d8000, 0x0d8007) AM_DEVWRITE("k056832", k056832_b_word_w)            // VSCCS regs
371	352	AM_RANGE(0x0da000, 0x0da001) AM_READ_PORT("P1")
372	353	AM_RANGE(0x0da002, 0x0da003) AM_READ_PORT("P2")
373	354	AM_RANGE(0x0dc000, 0x0dc001) AM_READ_PORT("SYSTEM")
374		AM_RANGE(0x0dc002, 0x0dc003) AM_READ(control1_r)
	355	AM_RANGE(0x0dc002, 0x0dc003) AM_READ_PORT("EEPROM")
375	356	AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r, control2_w)
376	357	AM_RANGE(0x100000, 0x17ffff) AM_ROM
377		AM_RANGE(0x180000, 0x181fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)
378		AM_RANGE(0x182000, 0x183fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)
379		AM_RANGE(0x190000, 0x191fff) AM_READ(K056832_rom_word_r)      // Passthrough to tile roms
380		AM_RANGE(0x1a0000, 0x1a1fff) AM_READ(K053250_0_rom_r)
	358	AM_RANGE(0x180000, 0x181fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)
	359	AM_RANGE(0x182000, 0x183fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w)
	360	AM_RANGE(0x190000, 0x191fff) AM_DEVREAD("k056832", k056832_rom_word_r)      // Passthrough to tile roms
	361	AM_RANGE(0x1a0000, 0x1a1fff) AM_DEVREAD("k053250", k053250_rom_r)
381	362	AM_RANGE(0x1b0000, 0x1b1fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE_GENERIC(paletteram)
382	363
383	364	#if XE_DEBUG
384		AM_RANGE(0x0c0000, 0x0c003f) AM_READ(K056832_word_r)
385		AM_RANGE(0x0c2000, 0x0c2007) AM_READ(K053246_reg_word_r)
386		AM_RANGE(0x0ca000, 0x0ca01f) AM_READ(K054338_word_r)
387		AM_RANGE(0x0cc000, 0x0cc01f) AM_READ(K053251_lsb_r)
388		AM_RANGE(0x0d0000, 0x0d001f) AM_READ(K053252_word_r)
389		AM_RANGE(0x0d8000, 0x0d8007) AM_READ(K056832_b_word_r)
	365	AM_RANGE(0x0c0000, 0x0c003f) AM_DEVREAD("k056832", k056832_word_r)
	366	AM_RANGE(0x0c2000, 0x0c2007) AM_DEVREAD("k053246", k053246_reg_word_r)
	367	AM_RANGE(0x0ca000, 0x0ca01f) AM_DEVREAD("k054338", k054338_word_r)
	368	AM_RANGE(0x0cc000, 0x0cc01f) AM_DEVREAD("k053251", k053251_lsb_r)
	369	AM_RANGE(0x0d0000, 0x0d001f) AM_DEVREAD("k053252", k053252_word_r)
	370	AM_RANGE(0x0d8000, 0x0d8007) AM_DEVREAD("k056832", k056832_b_word_r)
390	371	#endif
391	372
392	373	ADDRESS_MAP_END
r6740	r6741
424	405	KONAMI16_LSB(2, IPT_UNKNOWN, IPT_START2 )
425	406
426	407	PORT_START("EEPROM")
427		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	408	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
428	409	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
429	410	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
430	411	PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
431	412	PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	413
	414	PORT_START( "EEPROMOUT" )
	415	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	416	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	417	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
432	418	INPUT_PORTS_END
433	419
434	420
r6740	r6741
439	425	ym_set_mixing
440	426	};
441	427
	428	static const k054338_interface xexex_k054338_intf =
	429	{
	430	"screen",
	431	0,
	432	"none"
	433	};
	434
	435
	436	static const k053250_interface xexex_k053250_intf =
	437	{
	438	"screen",
	439	"gfx3",
	440	-5, -16
	441	};
	442
	443	static const k056832_interface xexex_k056832_intf =
	444	{
	445	"gfx1", 0,
	446	K056832_BPP_4,
	447	1, 0,
	448	KONAMI_ROM_DEINTERLEAVE_2,
	449	xexex_tile_callback, "none"
	450	};
	451
	452	static const k053247_interface xexex_k053246_intf =
	453	{
	454	"screen",
	455	"gfx2", 1,
	456	NORMAL_PLANE_ORDER,
	457	-48, 32,
	458	KONAMI_ROM_DEINTERLEAVE_4,
	459	xexex_sprite_callback
	460	};
	461
442	462	static MACHINE_DRIVER_START( xexex )
443	463
444	464	/* basic machine hardware */
r6740	r6741
455	475
456	476	MDRV_MACHINE_START(xexex)
457	477	MDRV_MACHINE_RESET(xexex)
458		MDRV_NVRAM_HANDLER(xexex)
459	478
	479	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
	480
460	481	/* video hardware */
461	482	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_BEFORE_VBLANK)
462	483
r6740	r6741
473	494	MDRV_VIDEO_START(xexex)
474	495	MDRV_VIDEO_UPDATE(xexex)
475	496
	497	MDRV_K056832_ADD("k056832", xexex_k056832_intf)
	498	MDRV_K053246_ADD("k053246", xexex_k053246_intf)
	499	MDRV_K053250_ADD("k053250", xexex_k053250_intf)
	500	MDRV_K053251_ADD("k053251")
	501	MDRV_K053252_ADD("k053252")
	502	MDRV_K054338_ADD("k054338", xexex_k054338_intf)
	503
476	504	/* sound hardware */
477	505	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
478	506
r6740	r6741
599	627
600	628	static STATE_POSTLOAD( xexex_postload )
601	629	{
602		parse_control2();
	630	parse_control2(machine);
603	631	reset_sound_region(machine);
604	632	}
605	633
r6740	r6741
610	638	state_save_register_postload(machine, xexex_postload, NULL);
611	639
612	640	resume_trigger = 1000;
613		init_eeprom_count = 0;
614	641
615	642	dmadelay_timer = timer_alloc(machine, dmaend_callback, NULL);
616	643	}
r6740	r6741
625	652	//      *(UINT16 *)(memory_region(machine, "maincpu") + 0x00008) = 0x5500;
626	653	xexex_strip0x1a = 1;
627	654	}
628
629		konami_rom_deinterleave_2(machine, "gfx1");
630		konami_rom_deinterleave_4(machine, "gfx2");
631		K053250_unpack_pixels(machine, "gfx3");
632	655	}
633	656
634	657	GAME( 1991, xexex,  0,     xexex, xexex, xexex, ROT0, "Konami", "Xexex (ver EAA)", 0 )

src/mame/drivers/skullxbo.c

r6740	r6741
20	20	#include "driver.h"
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "audio/atarijsa.h"
23		#include "skullxbo.h"
	23	#include "includes/skullxbo.h"
24	24
25	25
26	26
r6740	r6741
70	70	}
71	71
72	72
	73	static MACHINE_START( skullxbo )
	74	{
	75	atarigen_init(machine);
	76	}
	77
	78
73	79	static MACHINE_RESET( skullxbo )
74	80	{
75	81	skullxbo_state *state = (skullxbo_state *)machine->driver_data;
r6740	r6741
255	261	MDRV_CPU_PROGRAM_MAP(main_map)
256	262	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
257	263
	264	MDRV_MACHINE_START(skullxbo)
258	265	MDRV_MACHINE_RESET(skullxbo)
259	266	MDRV_NVRAM_HANDLER(atarigen)
260	267

src/mame/drivers/sliver.c

r6740	r6741
90	90	static int tmp_counter;
91	91	static int clr_offset=0;
92	92
	93	static UINT8 *colorram;
93	94	static bitmap_t *sliver_bitmap_fg;
94	95	static bitmap_t *sliver_bitmap_bg;
95	96
r6740	r6741
183	184
184	185	static WRITE16_HANDLER( sliver_RAMDAC_color_w )
185	186	{
186		space->machine->generic.colorram.u8[clr_offset]=data;
	187	colorram[clr_offset]=data;
187	188	clr_offset=(clr_offset+1)%768;
188	189	}
189	190
r6740	r6741
214	215	if(y<0 ||x<0 || x>383 || y> 255) return;
215	216	addr*=3;
216	217
217		b=machine->generic.colorram.u8[addr]<<2;
218		g=machine->generic.colorram.u8[addr+1]<<2;
219		r=machine->generic.colorram.u8[addr+2]<<2;
	218	b=colorram[addr]<<2;
	219	g=colorram[addr+1]<<2;
	220	r=colorram[addr+2]<<2;
220	221
221	222	if (sliver_bitmap_fg->bpp == 32)
222	223	{
r6740	r6741
590	591	static DRIVER_INIT(sliver)
591	592	{
592	593	jpeg_addr = -1;
593		machine->generic.colorram.u8=auto_alloc_array(machine, UINT8, 256*3);
	594	colorram=auto_alloc_array(machine, UINT8, 256*3);
594	595	}
595	596
596	597	GAME( 1996, sliver, 0,        sliver, sliver, sliver, ROT0,  "Hollow Corp", "Sliver", GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/epos.c

r6740	r6741
32	32	#include "cpu/z80/z80.h"
33	33	#include "machine/8255ppi.h"
34	34	#include "sound/ay8910.h"
35		#include "epos.h"
	35	#include "includes/epos.h"
36	36
37	37	static WRITE8_HANDLER( dealer_decrypt_rom )
38	38	{

src/mame/drivers/spiders.c

r6740	r6741
194	194	#include "video/mc6845.h"
195	195	#include "machine/6821pia.h"
196	196	#include "machine/74123.h"
197		#include "spiders.h"
	197	#include "includes/spiders.h"
198	198
199	199
200	200	#define MAIN_CPU_MASTER_CLOCK   (11200000)

src/mame/drivers/subsino.c

r6740	r6741
3	3	-= Subsino's Gambling Games =-
4	4
5	5	driver by   Luca Elia (l.elia@tin.it)
	6	additional work by   David Haywood and Angelo Salese
6	7
7	8	CPU:    Z180 (in a black box)
8	9	GFX:    1 Tilemap (8x8 tiles, no scrolling)
r6740	r6741
10	11	SOUND:  M6295, YM2413 or YM3812
11	12	OTHER:  Battery
12	13
13		Preliminary driver, only "Super Rider" works since it has valid z180 code.
14		Note that e.g. "Shark Party" has snippets of valid code (6f - ff).
15
16	14	To enter test mode in smoto, keep F2 pressed during boot.
17	15
18	16	***************************************************************************/
r6740	r6741
28	26	Video Hardware
29	27	***************************************************************************/
30	28
	29	static UINT8 *videoram;
	30	static UINT8 *colorram;
31	31	static tilemap *tmap;
32	32	static int tiles_offset;
33	33
r6740	r6741
40	40
41	41	static WRITE8_HANDLER( subsino_videoram_w )
42	42	{
43		space->machine->generic.videoram.u8[offset] = data;
	43	videoram[offset] = data;
44	44	tilemap_mark_tile_dirty(tmap, offset);
45	45	}
46	46
47	47	static WRITE8_HANDLER( subsino_colorram_w )
48	48	{
49		space->machine->generic.colorram.u8[offset] = data;
	49	colorram[offset] = data;
50	50	tilemap_mark_tile_dirty(tmap, offset);
51	51	}
52	52
53	53	static TILE_GET_INFO( get_tile_info )
54	54	{
55		UINT16 code = machine->generic.videoram.u8[ tile_index ] + (machine->generic.colorram.u8[ tile_index ] << 8);
	55	UINT16 code = videoram[ tile_index ] + (colorram[ tile_index ] << 8);
56	56	UINT16 color = (code >> 8) & 0x0f;
57	57	code = ((code & 0xf000) >> 4) + ((code & 0xff) >> 0);
58	58	code += tiles_offset;
r6740	r6741
75	75
76	76	static PALETTE_INIT( subsino_2proms )
77	77	{
78		// To be done (only 2 roms?)
	78	int i,r,g,b,val;
	79	int bit0,bit1,bit2;
	80
	81	for (i = 0; i < 256; i++)
	82	{
	83	val = (color_prom[i+0x100]) | (color_prom[i+0x000]<<4);
	84
	85	bit0 = 0;
	86	bit1 = (val >> 6) & 0x01;
	87	bit2 = (val >> 7) & 0x01;
	88	b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
	89	bit0 = (val >> 3) & 0x01;
	90	bit1 = (val >> 4) & 0x01;
	91	bit2 = (val >> 5) & 0x01;
	92	g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
	93	bit0 = (val >> 0) & 0x01;
	94	bit1 = (val >> 1) & 0x01;
	95	bit2 = (val >> 2) & 0x01;
	96	r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
	97
	98	palette_set_color(machine, i, MAKE_RGB(r, g, b));
	99	}
79	100	}
80	101
81	102	static PALETTE_INIT( subsino_3proms )
82	103	{
83		int i;
	104	int i,r,g,b,val;
	105	int bit0,bit1,bit2;
	106
84	107	for (i = 0; i < 256; i++)
85		palette_set_color_rgb(machine,i,   pal2bit(color_prom[i+0x200]),
86		pal3bit(color_prom[i+0x100]),
87		pal3bit(color_prom[i+0x000])   );
	108	{
	109	val = (color_prom[i+0x000]) | (color_prom[i+0x100]<<3) | (color_prom[i+0x200]<<6);
	110
	111	bit0 = 0;
	112	bit1 = (val >> 7) & 0x01;
	113	bit2 = (val >> 6) & 0x01;
	114	b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
	115	bit0 = (val >> 5) & 0x01;
	116	bit1 = (val >> 4) & 0x01;
	117	bit2 = (val >> 3) & 0x01;
	118	g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
	119	bit0 = (val >> 2) & 0x01;
	120	bit1 = (val >> 1) & 0x01;
	121	bit2 = (val >> 0) & 0x01;
	122	r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
	123
	124	palette_set_color(machine, i, MAKE_RGB(r, g, b));
	125	}
88	126	}
89	127
90	128	/***************************************************************************
r6740	r6741
126	164
127	165	AM_RANGE( 0x0d01b, 0x0d01b ) AM_WRITE( subsino_tiles_offset_w )
128	166
129		AM_RANGE( 0x0e000, 0x0e7ff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE_GENERIC( colorram )
130		AM_RANGE( 0x0e800, 0x0efff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE_GENERIC( videoram )
	167	AM_RANGE( 0x0e000, 0x0e7ff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE( &colorram )
	168	AM_RANGE( 0x0e800, 0x0efff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE( &videoram )
131	169	ADDRESS_MAP_END
132	170
133	171
	172	static ADDRESS_MAP_START( sharkpy_map, ADDRESS_SPACE_PROGRAM, 8 )
	173	AM_RANGE( 0x09800, 0x09fff ) AM_RAM
	174
	175	AM_RANGE( 0x09000, 0x09000 ) AM_READ_PORT( "DSW1" )
	176	AM_RANGE( 0x09001, 0x09001 ) AM_READ_PORT( "DSW2" )
	177	AM_RANGE( 0x09002, 0x09002 ) AM_READ_PORT( "DSW3" )
	178
	179	AM_RANGE( 0x09004, 0x09004 ) AM_READ_PORT( "DSW4" )
	180	AM_RANGE( 0x09005, 0x09005 ) AM_READ_PORT( "INA" )
	181	AM_RANGE( 0x09006, 0x09006 ) AM_READ_PORT( "INB" )
	182
	183	AM_RANGE( 0x09009, 0x09009 ) AM_WRITE( subsino_out_b_w )
	184	AM_RANGE( 0x0900a, 0x0900a ) AM_WRITE( subsino_out_a_w )
	185
	186	AM_RANGE( 0x0900c, 0x0900c ) AM_READ_PORT( "INC" )
	187
	188	AM_RANGE( 0x09016, 0x09017 ) AM_DEVWRITE( "ymsnd", ym3812_w )
	189
	190	AM_RANGE( 0x09018, 0x09018 ) AM_DEVWRITE( "oki", okim6295_w )
	191
	192	AM_RANGE( 0x0901b, 0x0901b ) AM_WRITE( subsino_tiles_offset_w )
	193
	194	AM_RANGE( 0x07800, 0x07fff ) AM_RAM
	195	AM_RANGE( 0x08000, 0x087ff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE( &colorram )
	196	AM_RANGE( 0x08800, 0x08fff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE( &videoram )
	197
	198	AM_RANGE( 0x00000, 0x13fff ) AM_ROM //overlap unmapped regions
	199	ADDRESS_MAP_END
	200
	201	static ADDRESS_MAP_START( victor21_map, ADDRESS_SPACE_PROGRAM, 8 )
	202	AM_RANGE( 0x09800, 0x09fff ) AM_RAM
	203
	204	AM_RANGE( 0x09002, 0x09002 ) AM_READ_PORT( "INC" )
	205	AM_RANGE( 0x09004, 0x09004 ) AM_READ_PORT( "INA" )
	206	AM_RANGE( 0x09005, 0x09005 ) AM_READ_PORT( "INB" )
	207
	208	AM_RANGE( 0x09006, 0x09006 ) AM_READ_PORT( "DSW1" )
	209	AM_RANGE( 0x09007, 0x09007 ) AM_READ_PORT( "DSW2" )
	210	AM_RANGE( 0x09008, 0x09008 ) AM_READ_PORT( "DSW3" )
	211
	212	//  AM_RANGE( 0x09009, 0x09009 ) AM_WRITE( subsino_out_b_w )
	213	//  AM_RANGE( 0x0900a, 0x0900a ) AM_WRITE( subsino_out_a_w )
	214
	215	//  AM_RANGE( 0x0900b, 0x0900b ) //"flash" status, bit 0
	216	//  AM_RANGE( 0x0900c, 0x0900c ) AM_READ_PORT( "INC" )
	217
	218	AM_RANGE( 0x0900e, 0x0900f ) AM_DEVWRITE( "ymsnd", ym2413_w )
	219
	220	//  AM_RANGE( 0x09018, 0x09018 ) AM_DEVWRITE( "oki", okim6295_w )
	221
	222	AM_RANGE( 0x0900d, 0x0900d ) AM_WRITE( subsino_tiles_offset_w )
	223
	224	AM_RANGE( 0x07800, 0x07fff ) AM_RAM
	225	AM_RANGE( 0x08000, 0x087ff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE( &videoram )
	226	AM_RANGE( 0x08800, 0x08fff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE( &colorram )
	227
	228	AM_RANGE( 0x00000, 0x8fff ) AM_ROM //overlap unmapped regions
	229	AM_RANGE( 0x10000, 0x13fff ) AM_ROM
	230	ADDRESS_MAP_END
	231
	232
	233	/*
	234	Victor 5 has a protection device that calculates the combinations of the screen.
	235	0x00 = you lose
	236	0x01 = royal flush
	237	0x02 = 5 of a kind
	238	...
	239	0x0a = jacks of better
	240
	241	0xd9 is asked at the POST, game refuses to run otherwise.
	242
	243	The fun thing is that the main CPU actually calculates the combinations then it routes to this port
	244	thru packet writes, 0xd* starts the packet, 0xe* ends the packet.
	245	I'm fairly sure that this thing can do a lot more, the POST check makes me think that 0xd9 is actually a result of a RNG.
	246	For now we'll emulate the bare minimum to let this game to work, obviously we need tests/tracing on the real board to understand
	247	what it is exactly and what it can possibly do.
	248	*/
	249
	250	static UINT8 flash_val,flash_packet,flash_packet_start;
	251
	252	static READ8_HANDLER( flash_r )
	253	{
	254	//  printf("R %02x\n",flash_val);
	255
	256	if(flash_val == 0xff)
	257	return 0xd9;
	258	else if(flash_val <= 0xa)
	259	return flash_val;
	260	else if(flash_val == 0x92)
	261	return 0xeb; //protected GFXs in Cross Bingo
	262	else
	263	return 0xd9;
	264	}
	265
	266	static WRITE8_HANDLER( flash_w )
	267	{
	268	switch(flash_packet_start)
	269	{
	270	case 0:
	271	flash_packet = data;
	272	if((flash_packet & 0xf8) == 0xd0)
	273	flash_packet_start = 1; //start of packet
	274	break;
	275	case 1:
	276	flash_packet = data;
	277	if((flash_packet & 0xf8) == 0xe0)
	278	flash_packet_start = 0; //end of packet
	279	else
	280	flash_val = data;
	281	break;
	282	}
	283	}
	284
134	285	static ADDRESS_MAP_START( victor5_map, ADDRESS_SPACE_PROGRAM, 8 )
135		AM_RANGE( 0x00000, 0x0bfff ) AM_ROM
136		AM_RANGE( 0x0c000, 0x0cfff ) AM_RAM
137		AM_RANGE( 0x0e000, 0x0e7ff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE_GENERIC( colorram )
138		AM_RANGE( 0x0e800, 0x0efff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE_GENERIC( videoram )
	286	AM_IMPORT_FROM( victor21_map )
	287	AM_RANGE( 0x0900a, 0x0900a ) AM_READWRITE( flash_r, flash_w )
139	288	ADDRESS_MAP_END
140	289
141	290
	291	static READ8_HANDLER( hwcheck_r )
	292	{
	293	/* Wants this at POST otherwise an "Hardware Error" occurs. */
	294	return 0x55;
	295	}
	296
	297	static ADDRESS_MAP_START( crsbingo_map, ADDRESS_SPACE_PROGRAM, 8 )
	298	AM_RANGE( 0x09800, 0x09fff ) AM_RAM
	299
	300	AM_RANGE( 0x09000, 0x09000 ) AM_READ_PORT( "SW1" )
	301	AM_RANGE( 0x09001, 0x09001 ) AM_READ_PORT( "SW2" )
	302	AM_RANGE( 0x09002, 0x09002 ) AM_READ_PORT( "INA" )
	303	AM_RANGE( 0x09003, 0x09003 ) AM_READ_PORT( "INB" )
	304	AM_RANGE( 0x09004, 0x09004 ) AM_READ_PORT( "INC" )
	305
	306	AM_RANGE( 0x09008, 0x09008 ) AM_READ_PORT( "SW4" )
	307	AM_RANGE( 0x09009, 0x09009 ) AM_READ_PORT( "SW3" ) AM_WRITE( subsino_out_b_w )
	308	AM_RANGE( 0x0900a, 0x0900a ) AM_READ( hwcheck_r )
	309
	310	AM_RANGE( 0x09010, 0x09010 ) AM_READWRITE( flash_r, flash_w )
	311	//  AM_RANGE( 0x09011, 0x09011 ) //"flash" status, bit 0
	312	//  AM_RANGE( 0x0900c, 0x0900c ) AM_READ_PORT( "INC" )
	313	AM_RANGE( 0x0900c, 0x0900d ) AM_DEVWRITE( "ymsnd", ym2413_w )
	314
	315	//  AM_RANGE( 0x09018, 0x09018 ) AM_DEVWRITE( "oki", okim6295_w )
	316
	317	//  AM_RANGE( 0x0900d, 0x0900d ) AM_WRITE( subsino_tiles_offset_w )
	318
	319	AM_RANGE( 0x07800, 0x07fff ) AM_RAM
	320	AM_RANGE( 0x08000, 0x087ff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE( &videoram )
	321	AM_RANGE( 0x08800, 0x08fff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE( &colorram )
	322
	323	AM_RANGE( 0x00000, 0x8fff ) AM_ROM //overlap unmapped regions
	324
	325	AM_RANGE( 0x10000, 0x13fff ) AM_ROM //overlap unmapped regions
	326
	327	ADDRESS_MAP_END
	328
	329
142	330	static ADDRESS_MAP_START( subsino_iomap, ADDRESS_SPACE_IO, 8 )
143	331	AM_RANGE( 0x0000, 0x003f ) AM_RAM // internal regs
144	332	ADDRESS_MAP_END
r6740	r6741
221	409	INPUT_PORTS_END
222	410
223	411	static INPUT_PORTS_START( victor5 )
	412
	413	PORT_START( "DSW1" )
	414	PORT_DIPNAME( 0x01, 0x01, "DSW1" )
	415	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	416	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	417	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	418	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	419	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	420	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	421	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	422	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	423	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	424	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	425	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	426	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	427	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	428	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	429	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	430	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	431	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	432	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	433	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	434	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	435	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	436	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	437	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	438
	439	PORT_START( "DSW2" )
	440	PORT_DIPNAME( 0x01, 0x01, "DSW2" )
	441	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	442	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	443	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	444	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	445	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	446	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	447	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	448	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	449	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	450	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	451	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	452	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	453	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	454	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	455	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	456	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	457	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	458	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	459	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	460	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	461	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	462	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	463	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	464
	465	PORT_START( "DSW3" )
	466	PORT_DIPNAME( 0x01, 0x01, "DSW3" )
	467	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	468	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	469	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	470	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	471	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	472	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	473	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	474	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	475	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	476	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	477	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	478	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	479	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	480	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	481	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	482	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	483	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	484	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	485	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	486	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	487	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	488	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	489	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	490
	491	PORT_START( "INA" )
	492	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
	493	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
	494	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3 / Half Take")
	495	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4 / Small")
	496	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Hold 5 / Big")
	497	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL )
	498	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_BET )
	499	PORT_DIPNAME( 0x80, 0x80, "INA" )
	500	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	501	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	502
	503	PORT_START( "INB" )
	504	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )   // coin
	505	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )   // coin
	506	PORT_DIPNAME( 0x04, 0x04, "INB" )
	507	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	508	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	509	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	510	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	511	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	512	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	513	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	514	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	515	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	516	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	517	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	518	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	519	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	520	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	521	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	522	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	523	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	524
	525	PORT_START( "INC" )
	526	PORT_DIPNAME( 0x01, 0x01, "INC" )
	527	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	528	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	529	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	530	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	531	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	532	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	533	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	534	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	535	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	536	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	537	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	538	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	539	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	540	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	541	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	542	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	543	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	544	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	545	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	546	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	547	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	548	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	549	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
224	550	INPUT_PORTS_END
225	551
	552	static INPUT_PORTS_START( victor21 )
	553
	554	PORT_START( "DSW1" )
	555	PORT_DIPNAME( 0x01, 0x01, "DSW1" )
	556	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	557	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	558	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	559	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	560	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	561	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	562	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	563	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	564	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	565	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	566	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	567	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	568	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	569	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	570	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	571	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	572	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	573	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	574	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	575	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	576	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	577	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	578	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	579
	580	PORT_START( "DSW2" )
	581	PORT_DIPNAME( 0x01, 0x01, "DSW2" )
	582	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	583	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	584	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	585	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	586	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	587	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	588	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	589	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	590	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	591	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	592	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	593	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	594	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	595	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	596	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	597	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	598	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	599	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	600	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	601	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	602	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	603	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	604	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	605
	606	PORT_START( "DSW3" )
	607	PORT_DIPNAME( 0x01, 0x01, "DSW3" )
	608	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	609	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	610	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	611	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	612	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	613	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	614	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	615	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	616	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	617	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	618	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	619	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	620	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	621	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	622	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	623	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	624	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	625	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	626	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	627	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	628	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	629	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	630	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	631
	632	PORT_START( "INA" )
	633	PORT_DIPNAME( 0x01, 0x01, "INA" )
	634	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	635	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	636	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_HALF ) PORT_NAME("Split")
	637	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	638	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	639	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	640	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Hit")
	641	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_BET )
	642	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_STAND )
	643	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	644	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	645	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	646	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
	647
	648	PORT_START( "INB" )
	649	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )   // coin
	650	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )   // coin
	651	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )   // coin
	652	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )   // coin
	653	PORT_SERVICE_NO_TOGGLE( 0x10, IP_ACTIVE_LOW )   // test
	654	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 )   PORT_NAME("Win Rate")
	655	PORT_DIPNAME( 0x40, 0x40, "INB" )
	656	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	657	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	658	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	659	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	660	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	661
	662	PORT_START( "INC" )
	663	PORT_DIPNAME( 0x01, 0x01, "INC" )
	664	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	665	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	666	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	667	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	668	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	669	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE2 )   PORT_NAME("Reset")
	670	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	671	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	672	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	673	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	674	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	675	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	676	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	677	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	678	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	679	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	680	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	681	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	682	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	683	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	684	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	685	INPUT_PORTS_END
	686
226	687	static INPUT_PORTS_START( crsbingo )
	688
	689	PORT_START( "SW1" )
	690	PORT_DIPNAME( 0x01, 0x01, "SW1" )
	691	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	692	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	693	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	694	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	695	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	696	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	697	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	698	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	699	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	700	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	701	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	702	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	703	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	704	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	705	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	706	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	707	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	708	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	709	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	710	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	711	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	712	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	713	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	714
	715	PORT_START( "SW2" )
	716	PORT_DIPNAME( 0x01, 0x01, "SW2" )
	717	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	718	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	719	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	720	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	721	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	722	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	723	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	724	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	725	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	726	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	727	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	728	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	729	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	730	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	731	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	732	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	733	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	734	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	735	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	736	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	737	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	738	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	739	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	740
	741	PORT_START( "SW3" )
	742	PORT_DIPNAME( 0x01, 0x01, "SW3" )
	743	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	744	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	745	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	746	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	747	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	748	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	749	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	750	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	751	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	752	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	753	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	754	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	755	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	756	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	757	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	758	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	759	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	760	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	761	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	762	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	763	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	764	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	765	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	766
	767	PORT_START( "SW4" )
	768	PORT_DIPNAME( 0x01, 0x01, "SW4" )
	769	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	770	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	771	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	772	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	773	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	774	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	775	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	776	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	777	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	778	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	779	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	780	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	781	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	782	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	783	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	784	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	785	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	786	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	787	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	788	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	789	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	790	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	791	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	792
	793	PORT_START( "INA" )
	794	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
	795	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
	796	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3 / Half Take")
	797	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4 / Small")
	798	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Hold 5 / Big")
	799	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL )
	800	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_BET )
	801	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	802	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	803	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	804
	805	PORT_START( "INB" )
	806	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )   // coin
	807	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )   // coin
	808	PORT_DIPNAME( 0x04, 0x04, "INB" )
	809	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	810	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	811	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	812	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	813	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	814	PORT_SERVICE_NO_TOGGLE( 0x10, IP_ACTIVE_LOW )   // test
	815	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	816	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	817	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	818	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	819	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	820	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	821	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	822	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	823	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	824
	825	PORT_START( "INC" )
	826	PORT_DIPNAME( 0x01, 0x01, "INC" )
	827	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
	828	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	829	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
	830	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	831	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	832	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
	833	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	834	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	835	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	836	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	837	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	838	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	839	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	840	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	841	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	842	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	843	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	844	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	845	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	846	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	847	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	848	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	849	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
227	850	INPUT_PORTS_END
228	851
	852
229	853	/***************************************************************************
230	854	Graphics Layout
231	855	***************************************************************************/
r6740	r6741
246	870	8, 8,
247	871	RGN_FRAC(1, 4),
248	872	4,
249		{ RGN_FRAC(0,4),RGN_FRAC(1,4),RGN_FRAC(2,4),RGN_FRAC(3,4) },
	873	{ RGN_FRAC(2,4),RGN_FRAC(3,4),RGN_FRAC(0,4),RGN_FRAC(1,4) },
250	874	{ STEP8(0,1) },
251	875	{ STEP8(0,8) },
252	876	8*8
r6740	r6741
265	889	Machine Drivers
266	890	***************************************************************************/
267	891
268		static MACHINE_DRIVER_START( victor5 )
	892	static MACHINE_DRIVER_START( victor21 )
269	893	/* basic machine hardware */
270	894	MDRV_CPU_ADD("maincpu", Z180, XTAL_12MHz / 3)   // 4 MHz?
271		MDRV_CPU_PROGRAM_MAP(victor5_map)
	895	MDRV_CPU_PROGRAM_MAP(victor21_map)
272	896	MDRV_CPU_IO_MAP(subsino_iomap)
273	897
274	898	/* video hardware */
r6740	r6741
282	906	MDRV_GFXDECODE(subsino_depth3)
283	907
284	908	MDRV_PALETTE_LENGTH(0x100)
285		//  MDRV_PALETTE_INIT(subsino_3proms)   // no proms?
	909	MDRV_PALETTE_INIT(subsino_2proms)
286	910
287	911	MDRV_VIDEO_START(subsino)
288	912	MDRV_VIDEO_UPDATE(subsino)
r6740	r6741
298	922	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
299	923	MACHINE_DRIVER_END
300	924
301		static MACHINE_DRIVER_START( victor21 )
	925	/* same but with an additional protection. */
	926	static MACHINE_DRIVER_START( victor5 )
302	927
303	928	/* basic machine hardware */
304		MDRV_IMPORT_FROM( victor5 )
305		MDRV_PALETTE_INIT(subsino_2proms)
	929	MDRV_IMPORT_FROM( victor21 )
	930	MDRV_CPU_MODIFY("maincpu")
	931	MDRV_CPU_PROGRAM_MAP(victor5_map)
306	932	MACHINE_DRIVER_END
307	933
308	934
r6740	r6741
339	965	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
340	966	MACHINE_DRIVER_END
341	967
	968	static MACHINE_DRIVER_START( sharkpy )
	969	MDRV_IMPORT_FROM(srider)
342	970
	971	/* basic machine hardware */
	972	MDRV_CPU_MODIFY("maincpu")
	973	MDRV_CPU_PROGRAM_MAP(sharkpy_map)
	974	MACHINE_DRIVER_END
	975
343	976	static MACHINE_DRIVER_START( crsbingo )
344	977	/* basic machine hardware */
345	978	MDRV_CPU_ADD("maincpu", Z180, XTAL_12MHz / 3)   // Unknown CPU and clock
346		MDRV_CPU_PROGRAM_MAP(victor5_map)
	979	MDRV_CPU_PROGRAM_MAP(crsbingo_map)
347	980	MDRV_CPU_IO_MAP(subsino_iomap)
348	981
349	982	/* video hardware */
r6740	r6741
367	1000
368	1001	MDRV_SOUND_ADD("ymsnd", YM2413, XTAL_3_579545MHz)   // unknown clock
369	1002	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
370
371		// no OKI
372	1003	MACHINE_DRIVER_END
373	1004
374	1005	/***************************************************************************
r6740	r6741
411	1042	***************************************************************************/
412	1043
413	1044	ROM_START( victor5 )
414		ROM_REGION( 0x10000, "maincpu", 0 )
415		ROM_LOAD( "1.u1", 0x00000, 0x10000, CRC(e3ada2fc) SHA1(eddb460dcb80a29fbbe3ed6c4733c75b892baf52) )
	1045	ROM_REGION( 0x14000, "maincpu", 0 )
	1046	ROM_LOAD( "1.u1", 0x10000, 0x4000, CRC(e3ada2fc) SHA1(eddb460dcb80a29fbbe3ed6c4733c75b892baf52) )
	1047	ROM_CONTINUE(0x0000,0xc000)
416	1048
417	1049	ROM_REGION( 0x18000, "tilemap", 0 )
418		ROM_LOAD( "2.u24", 0x00000, 0x8000, CRC(1229e951) SHA1(1e548625bb60e2d6f52a376a0dea9e5709f94135) )
	1050	ROM_LOAD( "2.u24", 0x10000, 0x8000, CRC(1229e951) SHA1(1e548625bb60e2d6f52a376a0dea9e5709f94135) )
419	1051	ROM_LOAD( "3.u23", 0x08000, 0x8000, CRC(2d89bbf1) SHA1(d7fda0174a835e88b330dfd09bdb604bfe4c2e44) )
420		ROM_LOAD( "4.u22", 0x10000, 0x8000, CRC(ecf840a1) SHA1(9ecf522afb23e3557d37effc3c8568e8a14dad1a) )
	1052	ROM_LOAD( "4.u22", 0x00000, 0x8000, CRC(ecf840a1) SHA1(9ecf522afb23e3557d37effc3c8568e8a14dad1a) )
421	1053
422	1054	ROM_REGION( 0x40000, "oki", ROMREGION_ERASE )
423	1055	// rom socket is empty
	1056
	1057	ROM_REGION( 0x200, "proms", 0 ) //missing proms in this set, we'll use the same as Victor 21 for now.
	1058	ROM_LOAD( "74s287.u35", 0x000, 0x100, BAD_DUMP CRC(40094bed) SHA1(b25d96126b3f7bd06bf76dc9958f8669f83abdb7) )
	1059	ROM_LOAD( "74s287.u36", 0x100, 0x100, BAD_DUMP CRC(9ca021c5) SHA1(6a1d8d4f958d36e4a676dc4f4aee83d637933bc3) )
424	1060	ROM_END
425	1061
426	1062	/***************************************************************************
r6740	r6741
460	1096	***************************************************************************/
461	1097
462	1098	ROM_START( victor21 )
463		ROM_REGION( 0x10000, "maincpu", 0 )
464		ROM_LOAD( "1.u1", 0x00000, 0x10000, CRC(43999b2d) SHA1(7ce26fd332ffe35fd826a1a6166b228d4bc370b8) )
	1099	ROM_REGION( 0x14000, "maincpu", 0 )
	1100	ROM_LOAD( "1.u1", 0x10000, 0x4000, CRC(43999b2d) SHA1(7ce26fd332ffe35fd826a1a6166b228d4bc370b8) )
	1101	ROM_CONTINUE(0x0000,0xc000)
465	1102
466	1103	ROM_REGION( 0x18000, "tilemap", 0 )
467		ROM_LOAD( "2.u24", 0x00000, 0x8000, CRC(f1181b93) SHA1(53cd4d2ce13973495b51d911a4745a69a9784983) )
	1104	ROM_LOAD( "2.u24", 0x10000, 0x8000, CRC(f1181b93) SHA1(53cd4d2ce13973495b51d911a4745a69a9784983) )
468	1105	ROM_LOAD( "3.u25", 0x08000, 0x8000, CRC(437abb27) SHA1(bd3790807d60a41d58e07f60fb990553076d6e96) )
469		ROM_LOAD( "4.u26", 0x10000, 0x8000, CRC(e2f66eee) SHA1(ece924fe626f21fd7d31faabf19225d80e2bcfd3) )
	1106	ROM_LOAD( "4.u26", 0x00000, 0x8000, CRC(e2f66eee) SHA1(ece924fe626f21fd7d31faabf19225d80e2bcfd3) )
470	1107
471	1108	ROM_REGION( 0x40000, "oki", ROMREGION_ERASE )
472	1109	// rom socket is empty
r6740	r6741
517	1154	***************************************************************************/
518	1155
519	1156	ROM_START( sharkpy )
520		ROM_REGION( 0x10000, "maincpu", 0 )
521		ROM_LOAD( "shark_n.1.u18", 0x00000, 0x10000, CRC(25aeac2f) SHA1(d94e3e5cfffd150ac48e1463493a8323f42e7a89) )
	1157	ROM_REGION( 0x14000, "maincpu", 0 )
	1158	ROM_LOAD( "shark_n.1.u18", 0x0a000, 0x6000, CRC(25aeac2f) SHA1(d94e3e5cfffd150ac48e1463493a8323f42e7a89) ) // is this mapped correctly? - used during gameplay?
	1159	ROM_CONTINUE(0x0000, 0xa000)
522	1160
	1161
523	1162	ROM_REGION( 0x40000, "tilemap", 0 )
524		ROM_LOAD( "shark_n.2.u17", 0x00000, 0x08000, CRC(c27f3d0a) SHA1(77c8eb0322c5b9c89777cb080d26ecf9abe01ae7) )
	1163	ROM_LOAD( "shark_n.3.u16", 0x00000, 0x08000, CRC(a7a715ce) SHA1(38b93e05377d9cb816688f5070e847480f195c6b) )
525	1164	ROM_CONTINUE(              0x10000, 0x08000 )
526	1165	ROM_CONTINUE(              0x08000, 0x08000 )
527	1166	ROM_CONTINUE(              0x18000, 0x08000 )
528		ROM_LOAD( "shark_n.3.u16", 0x20000, 0x08000, CRC(a7a715ce) SHA1(38b93e05377d9cb816688f5070e847480f195c6b) )
	1167	ROM_LOAD( "shark_n.2.u17", 0x20000, 0x08000, CRC(c27f3d0a) SHA1(77c8eb0322c5b9c89777cb080d26ecf9abe01ae7) )
529	1168	ROM_CONTINUE(              0x30000, 0x08000 )
530	1169	ROM_CONTINUE(              0x28000, 0x08000 )
531	1170	ROM_CONTINUE(              0x38000, 0x08000 )
r6740	r6741
538	1177	ROM_LOAD( "n82s129an.u12", 0x100, 0x100, CRC(5a7a25ed) SHA1(eebd679195e6ea50f64f3c46cd06ee21a1550491) )
539	1178	ROM_LOAD( "n82s129an.u13", 0x200, 0x100, CRC(0ef5f218) SHA1(a02cf266661385aa078563bd83240d36549c1cf0) )
540	1179	ROM_END
541
542	1180	/***************************************************************************
543	1181
544	1182	Shark Party (alt)
r6740	r6741
579	1217
580	1218	***************************************************************************/
581	1219
	1220
582	1221	ROM_START( sharkpya )
583		ROM_REGION( 0x10000, "maincpu", 0 )
584		ROM_LOAD( "shark1.6.u18", 0x00000, 0x10000, CRC(365312a0) SHA1(de8370b1f35e8d071185d2e5f2fbd2fdf74c55ac) )
	1222	ROM_REGION( 0x14000, "maincpu", 0 )
	1223	ROM_LOAD( "shark1.6.u18", 0x0a000, 0x6000, CRC(365312a0) SHA1(de8370b1f35e8d071185d2e5f2fbd2fdf74c55ac) )
	1224	ROM_CONTINUE(0x0000, 0xa000)
585	1225
586	1226	ROM_REGION( 0x40000, "tilemap", 0 )
587		ROM_LOAD( "shark_n.2.u17", 0x00000, 0x08000, CRC(c27f3d0a) SHA1(77c8eb0322c5b9c89777cb080d26ecf9abe01ae7) )
	1227	ROM_LOAD( "shark_n.3.u16", 0x00000, 0x08000, CRC(a7a715ce) SHA1(38b93e05377d9cb816688f5070e847480f195c6b) )
588	1228	ROM_CONTINUE(              0x10000, 0x08000 )
589	1229	ROM_CONTINUE(              0x08000, 0x08000 )
590	1230	ROM_CONTINUE(              0x18000, 0x08000 )
591		ROM_LOAD( "shark_n.3.u16", 0x20000, 0x08000, CRC(a7a715ce) SHA1(38b93e05377d9cb816688f5070e847480f195c6b) )
	1231	ROM_LOAD( "shark_n.2.u17", 0x20000, 0x08000, CRC(c27f3d0a) SHA1(77c8eb0322c5b9c89777cb080d26ecf9abe01ae7) )
592	1232	ROM_CONTINUE(              0x30000, 0x08000 )
593	1233	ROM_CONTINUE(              0x28000, 0x08000 )
594	1234	ROM_CONTINUE(              0x38000, 0x08000 )
r6740	r6741
778	1418	***************************************************************************/
779	1419
780	1420	ROM_START( crsbingo )
781		ROM_REGION( 0x10000, "maincpu", 0 )
782		ROM_LOAD( "1.u36", 0x00000, 0x10000, CRC(c5aff4eb) SHA1(74f06d7735975657fca9be5fff9e7d53f38fcd02) )
	1421	ROM_REGION( 0x14000, "maincpu", 0 )
	1422	ROM_LOAD( "1.u36", 0x10000, 0x4000, CRC(c5aff4eb) SHA1(74f06d7735975657fca9be5fff9e7d53f38fcd02) )
	1423	ROM_CONTINUE(0x0000,0xc000)
783	1424
784	1425	ROM_REGION( 0x20000, "tilemap", 0 )
785	1426	ROM_LOAD( "2.u4",  0x00000, 0x10000, CRC(ce527722) SHA1(f3759cefab902259eb25f8d4be2fcafc1afd90b9) )
r6740	r6741
789	1430	ROM_LOAD( "82s129.u13", 0x000, 0x100, CRC(89c06859) SHA1(b98d5335f36ea3842086677aca47b605030d442f) )
790	1431	ROM_LOAD( "82s129.u14", 0x100, 0x100, CRC(eaddb54f) SHA1(51fbf31e910a93315204a892d10bcf982a6ed099) )
791	1432
	1433	ROM_REGION( 0x40000, "oki", ROMREGION_ERASE00 )
	1434
792	1435	ROM_REGION( 0x155 * 2, "plds", 0 )
793	1436	ROM_LOAD( "18cv8.u22", 0x000, 0x155, BAD_DUMP CRC(996e8f59) SHA1(630d9b91f6e8eda781061e2a8ff6fb0fecaf034c) )
794	1437	ROM_LOAD( "18cv8.u29", 0x155, 0x155, BAD_DUMP CRC(996e8f59) SHA1(630d9b91f6e8eda781061e2a8ff6fb0fecaf034c) )
795	1438	ROM_END
796	1439
	1440	/****************************
	1441	Decryption
	1442	****************************/
797	1443
798		GAME( 1990, victor5,  0,        victor5,  victor5,  0,        ROT0, "Subsino", "Victor 5",                  GAME_NOT_WORKING )
799		GAME( 1990, victor21, 0,        victor21, victor5,  0,        ROT0, "Subsino", "Victor 21",                 GAME_NOT_WORKING )
800		GAME( 1991, crsbingo, 0,        crsbingo, crsbingo, 0,        ROT0, "Subsino", "Cross Bingo",               GAME_NOT_WORKING )
801		GAME( 1993, sharkpy,  0,        srider,   smoto,    0,        ROT0, "Subsino", "Shark Party",               GAME_NOT_WORKING )
802		GAME( 1993, sharkpya, sharkpy,  srider,   smoto,    0,        ROT0, "Subsino", "Shark Party (alt)",         GAME_NOT_WORKING )
803		GAME( 1996, smoto20,  0,        srider,   smoto,    smoto20,  ROT0, "Subsino", "Super Rider (Italy, v2.0)", GAME_WRONG_COLORS )
804		GAME( 1996, smoto16,  smoto20,  srider,   smoto,    smoto16,  ROT0, "Subsino", "Super Moto (Italy, v1.6)",  GAME_WRONG_COLORS )
	1444	#if 0
	1445	void dump_decrypted(running_machine* machine, UINT8* decrypt)
	1446	{
	1447	FILE *fp;
	1448	char filename[256];
	1449	sprintf(filename,"dat_%s", machine->gamedrv->name);
	1450	fp=fopen(filename, "w+b");
	1451	if (fp)
	1452	{
	1453	fwrite(decrypt, 0x10000, 1, fp);
	1454	fclose(fp);
	1455	}
	1456	}
	1457	#endif
	1458
	1459	static DRIVER_INIT( victor5 )
	1460	{
	1461	unsigned char xors[8] = { 0x99, 0x99, 0x33, 0x44, 0xBB, 0x88, 0x88, 0xBB };
	1462
	1463	int i;
	1464	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
	1465	UINT8* region = memory_region(machine,"maincpu");
	1466	for (i=0;i<0x10000;i++)
	1467	{
	1468	if (i<0xc000)
	1469	{
	1470	decrypt[i] = region[i]^xors[i&7];
	1471
	1472	if ((i&7) == 0) decrypt[i] = BITSWAP8(decrypt[i],7,2,5,4,3,6,1,0);
	1473	if ((i&7) == 1) decrypt[i] = BITSWAP8(decrypt[i],7,6,5,0,3,2,1,4);
	1474	if ((i&7) == 2) decrypt[i] = BITSWAP8(decrypt[i],7,2,1,0,3,6,5,4);
	1475	if ((i&7) == 3) decrypt[i] = BITSWAP8(decrypt[i],7,2,1,0,3,6,5,4);
	1476	if ((i&7) == 4) decrypt[i] = BITSWAP8(decrypt[i],3,2,1,0,7,6,5,4);
	1477	if ((i&7) == 5) decrypt[i] = BITSWAP8(decrypt[i],7,6,5,0,3,2,1,4);
	1478	if ((i&7) == 6) decrypt[i] = BITSWAP8(decrypt[i],3,6,1,0,7,2,5,4);
	1479	if ((i&7) == 7) decrypt[i] = BITSWAP8(decrypt[i],7,2,1,4,3,6,5,0);
	1480
	1481
	1482	}
	1483	else
	1484	{
	1485	decrypt[i] = region[i];
	1486	}
	1487	}
	1488
	1489	//  dump_decrypted(machine, decrypt);
	1490
	1491	memcpy(region, decrypt, 0x10000);
	1492	}
	1493
	1494
	1495	static DRIVER_INIT( victor21 )
	1496	{
	1497	unsigned char xors[8] = { 0x44, 0xBB, 0x66, 0x44, 0xAA, 0x55, 0x88, 0x22 };
	1498
	1499
	1500
	1501	int i;
	1502	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
	1503	UINT8* region = memory_region(machine,"maincpu");
	1504	for (i=0;i<0x10000;i++)
	1505	{
	1506	if (i<0xc000)
	1507	{
	1508	decrypt[i] = region[i]^xors[i&7];
	1509
	1510	if ((i&7) == 0) decrypt[i] = BITSWAP8(decrypt[i],7,2,1,0,3,6,5,4);
	1511	if ((i&7) == 1) decrypt[i] = BITSWAP8(decrypt[i],3,6,1,4,7,2,5,0);
	1512	if ((i&7) == 2) decrypt[i] = BITSWAP8(decrypt[i],3,2,1,4,7,6,5,0);
	1513	if ((i&7) == 3) decrypt[i] = BITSWAP8(decrypt[i],7,2,5,4,3,6,1,0);
	1514	if ((i&7) == 4) decrypt[i] = BITSWAP8(decrypt[i],7,2,5,4,3,6,1,0);
	1515	if ((i&7) == 5) decrypt[i] = BITSWAP8(decrypt[i],3,6,5,0,7,2,1,4);
	1516	if ((i&7) == 6) decrypt[i] = BITSWAP8(decrypt[i],7,6,5,4,3,2,1,0);
	1517	if ((i&7) == 7) decrypt[i] = BITSWAP8(decrypt[i],3,2,1,4,7,6,5,0);
	1518
	1519	}
	1520	else
	1521	{
	1522	decrypt[i] = region[i];
	1523	}
	1524	}
	1525
	1526	//  dump_decrypted(machine, decrypt);
	1527
	1528	memcpy(region, decrypt, 0x10000);
	1529	}
	1530
	1531	static DRIVER_INIT( crsbingo )
	1532	{
	1533	unsigned char xors[8] = { 0x44, 0x33, 0x33, 0x22, 0x55, 0xEE, 0xBB, 0x11 };
	1534
	1535	int i;
	1536	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
	1537	UINT8* region = memory_region(machine,"maincpu");
	1538	for (i=0;i<0x10000;i++)
	1539	{
	1540	if (i<0xc000)
	1541	{
	1542	decrypt[i] = region[i]^xors[i&7]^0xff;
	1543
	1544	if ((i&7) == 0) decrypt[i] = BITSWAP8(decrypt[i],7,2,5,4,3,6,1,0);
	1545	if ((i&7) == 1) decrypt[i] = BITSWAP8(decrypt[i],7,2,1,0,3,6,5,4);
	1546	if ((i&7) == 2) decrypt[i] = BITSWAP8(decrypt[i],3,2,5,0,7,6,1,4);
	1547	if ((i&7) == 3) decrypt[i] = BITSWAP8(decrypt[i],7,2,5,0,3,6,1,4);
	1548	if ((i&7) == 4) decrypt[i] = BITSWAP8(decrypt[i],7,6,5,0,3,2,1,4);
	1549	if ((i&7) == 5) decrypt[i] = BITSWAP8(decrypt[i],7,2,1,4,3,6,5,0);
	1550	if ((i&7) == 6) decrypt[i] = BITSWAP8(decrypt[i],7,2,1,0,3,6,5,4);
	1551	if ((i&7) == 7) decrypt[i] = BITSWAP8(decrypt[i],3,2,1,0,7,6,5,4);
	1552	}
	1553	else
	1554	{
	1555	decrypt[i] = region[i];
	1556	}
	1557	}
	1558
	1559	//  dump_decrypted(machine, decrypt);
	1560
	1561	memcpy(region, decrypt, 0x10000);
	1562	}
	1563
	1564
	1565	static DRIVER_INIT( sharkpy )
	1566	{
	1567	unsigned char xors[8] = { 0x33, 0x55, 0x99, 0x55, 0x11, 0xCC, 0x00, 0x00 };
	1568	int i;
	1569	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
	1570	UINT8* region = memory_region(machine,"maincpu");
	1571	for (i=0;i<0x10000;i++)
	1572	{
	1573	if (i<0xa000)
	1574	{
	1575	decrypt[i] = region[i]^xors[i&7]^0xff;
	1576	if ((i&7) == 0) decrypt[i] = BITSWAP8(decrypt[i],3,2,1,0,7,6,5,4);
	1577	if ((i&7) == 1) decrypt[i] = BITSWAP8(decrypt[i],7,2,5,4,3,6,1,0);
	1578	if ((i&7) == 2) decrypt[i] = BITSWAP8(decrypt[i],7,2,1,4,3,6,5,0);
	1579	if ((i&7) == 3) decrypt[i] = BITSWAP8(decrypt[i],3,6,1,0,7,2,5,4);
	1580	if ((i&7) == 4) decrypt[i] = BITSWAP8(decrypt[i],7,2,5,4,3,6,1,0);
	1581	if ((i&7) == 5) decrypt[i] = BITSWAP8(decrypt[i],3,2,5,4,7,6,1,0);
	1582	if ((i&7) == 6) decrypt[i] = BITSWAP8(decrypt[i],7,6,1,4,3,2,5,0);
	1583	if ((i&7) == 7) decrypt[i] = BITSWAP8(decrypt[i],3,6,1,4,7,2,5,0);
	1584	}
	1585	else
	1586	{
	1587	decrypt[i] = region[i];
	1588	}
	1589	}
	1590
	1591	//  dump_decrypted(machine, decrypt);
	1592
	1593	memcpy(region, decrypt, 0x10000);
	1594	}
	1595
	1596
	1597	GAME( 1990, victor21, 0,        victor21, victor21, victor21, ROT0, "Subsino / Buffy", "Victor 21",                 0 )
	1598	GAME( 1991, victor5,  0,        victor5,  victor5,  victor5,  ROT0, "Subsino",         "Victor 5",                  0 ) // board sticker says Victor 5, in-game says G.E.A with no manufacturer info?
	1599	GAME( 1991, crsbingo, 0,        crsbingo, crsbingo, crsbingo, ROT0, "Subsino",         "Poker Carnival",            0 ) // alt version of Cross Bingo?
	1600	GAME( 1996, sharkpy,  0,        sharkpy,  smoto,    sharkpy,  ROT0, "Subsino",         "Shark Party (Italy, v1.3)", 0 ) // missing POST messages?
	1601	GAME( 1996, sharkpya, sharkpy,  sharkpy,  smoto,    sharkpy,  ROT0, "Subsino",         "Shark Party (Italy, v1.6)", 0 ) // missing POST messages?
	1602	GAME( 1996, smoto20,  0,        srider,   smoto,    smoto20,  ROT0, "Subsino",         "Super Rider (Italy, v2.0)", 0 )
	1603	GAME( 1996, smoto16,  smoto20,  srider,   smoto,    smoto16,  ROT0, "Subsino",         "Super Moto (Italy, v1.6)",  0 )

src/mame/drivers/jchan.c

r6740	r6741
172	172	#include "deprecat.h"
173	173	#include "sound/ymz280b.h"
174	174	#include "includes/suprnova.h"
175		#include "kaneko16.h"
	175	#include "includes/kaneko16.h"
176	176
177	177	static bitmap_t *sprite_bitmap_1;
178	178	static bitmap_t *sprite_bitmap_2;

src/mame/drivers/bankp.c

r6740	r6741
94	94	#include "driver.h"
95	95	#include "cpu/z80/z80.h"
96	96	#include "sound/sn76496.h"
97		#include "bankp.h"
	97	#include "includes/bankp.h"
98	98
99	99
100	100	/*************************************

src/mame/drivers/tankbust.c

r6740	r6741
25	25	VIDEO_UPDATE( tankbust );
26	26
27	27	extern UINT8 *tankbust_txtram;
	28	extern UINT8 *tankbust_videoram;
	29	extern UINT8 *tankbust_colorram;
28	30
29	31	WRITE8_HANDLER( tankbust_background_videoram_w );
30	32	READ8_HANDLER ( tankbust_background_videoram_r );
r6740	r6741
196	198	AM_RANGE(0x0000, 0x5fff) AM_ROM
197	199	AM_RANGE(0x6000, 0x9fff) AM_ROMBANK("bank1")
198	200	AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank2")
199		AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(tankbust_background_videoram_r, tankbust_background_videoram_w) AM_BASE_GENERIC(videoram)
200		AM_RANGE(0xc800, 0xcfff) AM_READWRITE(tankbust_background_colorram_r, tankbust_background_colorram_w) AM_BASE_GENERIC(colorram)
	201	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(tankbust_background_videoram_r, tankbust_background_videoram_w) AM_BASE(&tankbust_videoram)
	202	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(tankbust_background_colorram_r, tankbust_background_colorram_w) AM_BASE(&tankbust_colorram)
201	203	AM_RANGE(0xd000, 0xd7ff) AM_READWRITE(tankbust_txtram_r, tankbust_txtram_w) AM_BASE(&tankbust_txtram)
202	204	AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
203	205	AM_RANGE(0xe000, 0xe007) AM_READWRITE(debug_output_area_r, tankbust_e0xx_w)

src/mame/drivers/pastelg.c

r6740	r6741
22	22
23	23	#include "driver.h"
24	24	#include "cpu/z80/z80.h"
25		#include "nb1413m3.h"
	25	#include "includes/nb1413m3.h"
26	26	#include "sound/ay8910.h"
27	27	#include "sound/dac.h"
28	28

src/mame/drivers/galastrm.c

r6740	r6741
283	283	MACHINE DRIVERS
284	284	***********************************************************/
285	285
286		static MACHINE_RESET( galastrm )
287		{
288		taito_f3_soundsystem_reset(machine);
289		f3_68681_reset(machine);
290		}
291
292
293	286	static const UINT8 default_eeprom[128]={
294	287	0x45,0x58,0x00,0x00,0xff,0xff,0x00,0x00,0x00,0x28,0x00,0x01,0x00,0x00,0x00,0xfa,
295	288	0x00,0xec,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
r6740	r6741
333	326	MDRV_CPU_PROGRAM_MAP(galastrm_map)
334	327	MDRV_CPU_VBLANK_INT("screen", galastrm_interrupt) /* VBL */
335	328
336		TAITO_F3_SOUND_SYSTEM_CPU(16000000)
337
338		MDRV_MACHINE_RESET(galastrm)
339	329	MDRV_NVRAM_HANDLER(galastrm)
340	330
341	331	/* video hardware */
r6740	r6741
353	343	MDRV_VIDEO_UPDATE(galastrm)
354	344
355	345	/* sound hardware */
356		TAITO_F3_SOUND_SYSTEM_ES5505(30476100/2)
	346	MDRV_IMPORT_FROM(taito_f3_sound)
357	347	MACHINE_DRIVER_END
358	348
359	349	/***************************************************************************/

src/mame/drivers/namcos22.c

r6740	r6741
1140	1140	#include "driver.h"
1141	1141	#include "cpu/m68000/m68000.h"
1142	1142	#include "deprecat.h"
1143		#include "namcos22.h"
	1143	#include "includes/namcos22.h"
1144	1144	#include "cpu/tms32025/tms32025.h"
1145	1145	#include "cpu/m37710/m37710.h"
1146	1146	#include "sound/c352.h"

src/mame/drivers/galaxold.c

r6740	r6741
350	350	#include "driver.h"
351	351	#include "cpu/z80/z80.h"
352	352	#include "cpu/s2650/s2650.h"
353		#include "galaxold.h"
	353	#include "includes/galaxold.h"
	354	#include "machine/7474.h"
354	355	#include "sound/ay8910.h"
355	356	#include "sound/sn76496.h"
356	357	#include "sound/dac.h"
r6740	r6741
2108	2109
2109	2110	MDRV_MACHINE_RESET(galaxold)
2110	2111
	2112	MDRV_7474_ADD("7474_9m_1", galaxold_7474_9m_1_callback)
	2113	MDRV_7474_ADD("7474_9m_2", galaxold_7474_9m_2_callback)
	2114
	2115	MDRV_TIMER_ADD("int_timer", galaxold_interrupt_timer)
	2116
2111	2117	/* video hardware */
2112	2118	MDRV_GFXDECODE(galaxian)
2113	2119	MDRV_PALETTE_LENGTH(32+2+64)      /* 32 for the characters, 2 for the bullets, 64 for the stars */

src/mame/drivers/atarisy1.c

r6740	r6741
173	173	#include "cpu/m6502/m6502.h"
174	174	#include "machine/atarigen.h"
175	175	#include "machine/6522via.h"
176		#include "atarisy1.h"
	176	#include "includes/atarisy1.h"
177	177	#include "sound/tms5220.h"
178	178	#include "sound/2151intf.h"
179	179	#include "sound/pokey.h"
180	180
181	181
182	182
183		static TIMER_CALLBACK( delayed_joystick_int );
184
185
186
187	183	/*************************************
188	184	*
189	185	*  Initialization & interrupts
r6740	r6741
200	196	}
201	197
202	198
	199	static MACHINE_START( atarisy1 )
	200	{
	201	atarisy1_state *state = (atarisy1_state *)machine->driver_data;
	202	atarigen_init(machine);
	203
	204	state_save_register_global(machine, state->joystick_int);
	205	state_save_register_global(machine, state->joystick_int_enable);
	206	state_save_register_global(machine, state->joystick_value);
	207	state_save_register_global(machine, state->tms5220_out_data);
	208	state_save_register_global(machine, state->tms5220_in_data);
	209	state_save_register_global(machine, state->tms5220_ctl);
	210	}
	211
	212
203	213	static MACHINE_RESET( atarisy1 )
204	214	{
205	215	atarisy1_state *state = (atarisy1_state *)machine->driver_data;
r6740	r6741
212	222
213	223	/* reset the joystick parameters */
214	224	state->joystick_value = 0;
215		state->joystick_timer = timer_alloc(machine, delayed_joystick_int, NULL);
	225	state->joystick_timer = devtag_get_device(machine, "joystick_timer");
216	226	state->joystick_int = 0;
217	227	state->joystick_int_enable = 0;
218	228	}
r6740	r6741
225	235	*
226	236	*************************************/
227	237
228		static TIMER_CALLBACK( delayed_joystick_int )
	238	static TIMER_DEVICE_CALLBACK( delayed_joystick_int )
229	239	{
230		atarisy1_state *state = (atarisy1_state *)machine->driver_data;
	240	atarisy1_state *state = (atarisy1_state *)timer->machine->driver_data;
231	241	state->joystick_value = param;
232	242	state->joystick_int = 1;
233		atarigen_update_interrupts(machine);
	243	atarigen_update_interrupts(timer->machine);
234	244	}
235	245
236	246
r6740	r6741
257	267
258	268	/* clear any existing interrupt and set a timer for a new one */
259	269	state->joystick_int = 0;
260		timer_adjust_oneshot(state->joystick_timer, ATTOTIME_IN_USEC(50), newval);
	270	timer_device_adjust_oneshot(state->joystick_timer, ATTOTIME_IN_USEC(50), newval);
261	271	atarigen_update_interrupts(space->machine);
262	272
263	273	return state->joystick_value;
r6740	r6741
753	763	MDRV_CPU_ADD("audiocpu", M6502, ATARI_CLOCK_14MHz/8)
754	764	MDRV_CPU_PROGRAM_MAP(sound_map)
755	765
	766	MDRV_MACHINE_START(atarisy1)
756	767	MDRV_MACHINE_RESET(atarisy1)
757	768	MDRV_NVRAM_HANDLER(atarigen)
758	769
	770	MDRV_TIMER_ADD("joystick_timer", delayed_joystick_int)
	771	MDRV_TIMER_ADD("scan_timer", atarisy1_int3_callback)
	772	MDRV_TIMER_ADD("int3off_timer", atarisy1_int3off_callback)
	773	MDRV_TIMER_ADD("yreset_timer", atarisy1_reset_yscroll_callback)
	774
759	775	/* video hardware */
760	776	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
761	777	MDRV_GFXDECODE(atarisy1)

src/mame/drivers/sprint8.c

r6740	r6741
26	26	}
27	27
28	28
29		static TIMER_CALLBACK( input_callback )
	29	static TIMER_DEVICE_CALLBACK( input_callback )
30	30	{
31	31	static UINT8 dial[8];
32	32	static const char *const dialnames[] = { "DIAL1", "DIAL2", "DIAL3", "DIAL4", "DIAL5", "DIAL6", "DIAL7", "DIAL8" };
r6740	r6741
35	35
36	36	for (i = 0; i < 8; i++)
37	37	{
38		UINT8 val = input_port_read(machine, dialnames[i]) >> 4;
	38	UINT8 val = input_port_read(timer->machine, dialnames[i]) >> 4;
39	39
40	40	signed char delta = (val - dial[i]) & 15;
41	41
r6740	r6741
59	59	{
60	60	collision_reset = 0;
61	61	collision_index = 0;
62
63		timer_pulse(machine, video_screen_get_frame_period(machine->primary_screen), NULL, 0, input_callback);
64	62	}
65	63
66	64
r6740	r6741
462	460
463	461	MDRV_MACHINE_RESET(sprint8)
464	462
	463	MDRV_TIMER_ADD_PERIODIC("input_timer", input_callback, HZ(60))
	464
465	465	/* video hardware */
466	466	MDRV_SCREEN_ADD("screen", RASTER)
467	467	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/dec0.c

r6740	r6741
47	47	#include "cpu/m6502/m6502.h"
48	48	#include "cpu/h6280/h6280.h"
49	49	#include "cpu/z80/z80.h"
50		#include "dec0.h"
	50	#include "includes/dec0.h"
51	51	#include "sound/2203intf.h"
52	52	#include "sound/3812intf.h"
53	53	#include "sound/okim6295.h"

src/mame/drivers/ssv.c

r6740	r6741
185	185	#include "deprecat.h"
186	186	#include "machine/eeprom.h"
187	187	#include "sound/es5506.h"
188		#include "seta.h"
	188	#include "includes/seta.h"
189	189
190	190	/***************************************************************************
191	191

src/mame/drivers/janshi.c

r6740	r6741
28	28	*/
29	29
30	30	#include "driver.h"
31		#include "news.h"
	31	#include "includes/news.h"
32	32	#include "cpu/z80/z80.h"
33	33	#include "sound/okim6295.h"
34	34

src/mame/drivers/atarig42.c

r6740	r6741
17	17
18	18	***************************************************************************/
19	19
20
21	20	#include "driver.h"
22	21	#include "cpu/m68000/m68000.h"
23	22	#include "machine/asic65.h"
24	23	#include "audio/atarijsa.h"
25	24	#include "video/atarirle.h"
26		#include "atarig42.h"
	25	#include "includes/atarig42.h"
27	26
28	27
29	28	/*************************************
r6740	r6741
40	39	}
41	40
42	41
	42	static MACHINE_START( atarig42 )
	43	{
	44	atarig42_state *state = (atarig42_state *)machine->driver_data;
	45	atarigen_init(machine);
	46
	47	state_save_register_global(machine, state->analog_data);
	48	state_save_register_global(machine, state->sloop_bank);
	49	state_save_register_global(machine, state->sloop_next_bank);
	50	state_save_register_global(machine, state->sloop_offset);
	51	state_save_register_global(machine, state->sloop_state);
	52	}
	53
	54
43	55	static MACHINE_RESET( atarig42 )
44	56	{
45	57	atarig42_state *state = (atarig42_state *)machine->driver_data;
r6740	r6741
511	523	/* ASIC65 */
512	524	MDRV_IMPORT_FROM(asic65)
513	525
	526	MDRV_MACHINE_START(atarig42)
514	527	MDRV_MACHINE_RESET(atarig42)
515	528	MDRV_NVRAM_HANDLER(atarigen)
516	529

src/mame/drivers/cop01.c

r6740	r6741
53	53	#include "cpu/z80/z80.h"
54	54	#include "sound/ay8910.h"
55	55	#include "sound/3526intf.h"
56		#include "cop01.h"
	56	#include "includes/cop01.h"
57	57
58	58
59	59	#define MIGHTGUY_HACK    0

src/mame/drivers/vindictr.c

r6740	r6741
20	20	#include "driver.h"
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "audio/atarijsa.h"
23		#include "vindictr.h"
	23	#include "includes/vindictr.h"
24	24
25	25
26	26
r6740	r6741
38	38	}
39	39
40	40
	41	static MACHINE_START( vindictr )
	42	{
	43	atarigen_init(machine);
	44	}
	45
	46
41	47	static MACHINE_RESET( vindictr )
42	48	{
43	49	vindictr_state *state = (vindictr_state *)machine->driver_data;
r6740	r6741
194	200	MDRV_CPU_ADD("maincpu", M68010, ATARI_CLOCK_14MHz/2)
195	201	MDRV_CPU_PROGRAM_MAP(main_map)
196	202
	203	MDRV_MACHINE_START(vindictr)
197	204	MDRV_MACHINE_RESET(vindictr)
198	205	MDRV_NVRAM_HANDLER(atarigen)
199	206

src/mame/drivers/circusc.c

r6740	r6741
54	54	#include "sound/dac.h"
55	55	#include "sound/sn76496.h"
56	56	#include "sound/discrete.h"
57		#include "circusc.h"
	57	#include "includes/circusc.h"
58	58
59	59
60	60	static MACHINE_START( circusc )

src/mame/drivers/mikie.c

r6740	r6741
20	20	#include "cpu/z80/z80.h"
21	21	#include "cpu/m6809/m6809.h"
22	22	#include "sound/sn76496.h"
23		#include "konamipt.h"
	23	#include "includes/konamipt.h"
24	24
	25	extern UINT8 *mikie_videoram;
	26	extern UINT8 *mikie_colorram;
	27
25	28	extern WRITE8_HANDLER( mikie_videoram_w );
26	29	extern WRITE8_HANDLER( mikie_colorram_w );
27	30	extern WRITE8_HANDLER( mikie_palettebank_w );
r6740	r6741
81	84	AM_RANGE(0x2501, 0x2501) AM_READ_PORT("DSW1")
82	85	AM_RANGE(0x2800, 0x288f) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
83	86	AM_RANGE(0x2890, 0x37ff) AM_RAM
84		AM_RANGE(0x3800, 0x3bff) AM_RAM_WRITE(mikie_colorram_w) AM_BASE_GENERIC(colorram)
85		AM_RANGE(0x3c00, 0x3fff) AM_RAM_WRITE(mikie_videoram_w) AM_BASE_GENERIC(videoram)
	87	AM_RANGE(0x3800, 0x3bff) AM_RAM_WRITE(mikie_colorram_w) AM_BASE(&mikie_colorram)
	88	AM_RANGE(0x3c00, 0x3fff) AM_RAM_WRITE(mikie_videoram_w) AM_BASE(&mikie_videoram)
86	89	AM_RANGE(0x4000, 0x5fff) AM_ROM   // Machine checks for extra rom
87	90	AM_RANGE(0x6000, 0xffff) AM_ROM
88	91	ADDRESS_MAP_END

src/mame/drivers/midvunit.c

r6740	r6741
24	24	#include "audio/dcs.h"
25	25	#include "machine/idectrl.h"
26	26	#include "machine/midwayic.h"
27		#include "midvunit.h"
	27	#include "includes/midvunit.h"
28	28
29	29
30	30	#define CPU_CLOCK      50000000
r6740	r6741
41	41	static UINT16 last_port0;
42	42	static UINT8 shifter_state;
43	43
44		static emu_timer *timer[2];
	44	static const device_config *timer[2];
45	45	static double timer_rate;
46	46
47	47	static UINT32 *tms32031_control;
r6740	r6741
76	76	memcpy(ram_base, memory_region(machine, "user1"), 0x20000*4);
77	77	device_reset(cputag_get_cpu(machine, "maincpu"));
78	78
79		timer[0] = timer_alloc(machine, NULL, NULL);
80		timer[1] = timer_alloc(machine, NULL, NULL);
	79	timer[0] = devtag_get_device(machine, "timer0");
	80	timer[1] = devtag_get_device(machine, "timer1");
81	81	}
82	82
83	83
r6740	r6741
89	89	memcpy(ram_base, memory_region(machine, "user1"), 0x20000*4);
90	90	device_reset(cputag_get_cpu(machine, "maincpu"));
91	91
92		timer[0] = timer_alloc(machine, NULL, NULL);
93		timer[1] = timer_alloc(machine, NULL, NULL);
	92	timer[0] = devtag_get_device(machine, "timer0");
	93	timer[1] = devtag_get_device(machine, "timer1");
94	94
95	95	devtag_reset(machine, "ide");
96	96	}
r6740	r6741
261	261	{
262	262	/* timer is clocked at 100ns */
263	263	int which = (offset >> 4) & 1;
264		INT32 result = attotime_to_double(attotime_mul(timer_timeelapsed(timer[which]), timer_rate));
	264	INT32 result = attotime_to_double(attotime_mul(timer_device_timeelapsed(timer[which]), timer_rate));
265	265	//      logerror("%06X:tms32031_control_r(%02X) = %08X\n", cpu_get_pc(space->cpu), offset, result);
266	266	return result;
267	267	}
r6740	r6741
288	288	int which = (offset >> 4) & 1;
289	289	//  logerror("%06X:tms32031_control_w(%02X) = %08X\n", cpu_get_pc(space->cpu), offset, data);
290	290	if (data & 0x40)
291		timer_adjust_oneshot(timer[which], attotime_never, 0);
	291	timer_device_adjust_oneshot(timer[which], attotime_never, 0);
292	292
293	293	/* bit 0x200 selects internal clocking, which is 1/2 the main CPU clock rate */
294	294	if (data & 0x200)
r6740	r6741
1028	1028	MDRV_MACHINE_RESET(midvunit)
1029	1029	MDRV_NVRAM_HANDLER(generic_1fill)
1030	1030
	1031	MDRV_TIMER_ADD("timer0", NULL)
	1032	MDRV_TIMER_ADD("timer1", NULL)
	1033
1031	1034	/* video hardware */
1032	1035	MDRV_PALETTE_LENGTH(32768)
1033	1036

src/mame/drivers/opwolf.c

r6740	r6741
277	277	#include "driver.h"
278	278	#include "cpu/z80/z80.h"
279	279	#include "cpu/m68000/m68000.h"
280		#include "taitoipt.h"
	280	#include "includes/taitoipt.h"
281	281	#include "video/taitoic.h"
282	282	#include "audio/taitosnd.h"
283	283	#include "sound/2151intf.h"

src/mame/drivers/firebeat.c

r6740	r6741
130	130	UINT32 visible_area;
131	131	} GCU_REGS;
132	132
133		static UINT8 xram[4096];
134	133	static UINT8 extend_board_irq_enable;
135	134	static UINT8 extend_board_irq_active;
136	135
r6740	r6741
1281	1280	}
1282	1281
1283	1282	/*****************************************************************************/
1284		/* Epson RTC-65271 Real-time Clock/NVRAM */
1285	1283
1286		static READ32_HANDLER( rtc_r )
1287		{
1288		int reg = offset * 4;
1289		UINT32 r = 0;
1290
1291		if (ACCESSING_BITS_24_31)
1292		{
1293		r |= rtc65271_r((reg >> 8) & 0x1, (reg & 0xff) + 0) << 24;
1294		}
1295		if (ACCESSING_BITS_16_23)
1296		{
1297		r |= rtc65271_r((reg >> 8) & 0x1, (reg & 0xff) + 1) << 16;
1298		}
1299		if (ACCESSING_BITS_8_15)
1300		{
1301		r |= rtc65271_r((reg >> 8) & 0x1, (reg & 0xff) + 2) << 8;
1302		}
1303		if (ACCESSING_BITS_0_7)
1304		{
1305		r |= rtc65271_r((reg >> 8) & 0x1, (reg & 0xff) + 3) << 0;
1306		}
1307
1308		return r;
1309		}
1310
1311		static WRITE32_HANDLER( rtc_w )
1312		{
1313		int reg = offset * 4;
1314		if (ACCESSING_BITS_24_31)
1315		{
1316		rtc65271_w((reg >> 8) & 0x1, (reg & 0xff) + 0, (data >> 24) & 0xff);
1317		}
1318		if (ACCESSING_BITS_16_23)
1319		{
1320		rtc65271_w((reg >> 8) & 0x1, (reg & 0xff) + 1, (data >> 16) & 0xff);
1321		}
1322		if (ACCESSING_BITS_8_15)
1323		{
1324		rtc65271_w((reg >> 8) & 0x1, (reg & 0xff) + 2, (data >> 8) & 0xff);
1325		}
1326		if (ACCESSING_BITS_0_7)
1327		{
1328		rtc65271_w((reg >> 8) & 0x1, (reg & 0xff) + 3, (data >> 0) & 0xff);
1329		}
1330		}
1331
1332		/*****************************************************************************/
1333
1334	1284	static const int cab_data[2] = { 0x0, 0x8 };
1335	1285	static const int kbm_cab_data[2] = { 0x2, 0x8 };
1336	1286	static const int ppd_cab_data[2] = { 0x1, 0x9 };
r6740	r6741
1753	1703	AM_RANGE(0x7d400000, 0x7d5fffff) AM_READWRITE(flashram_r, flashram_w)
1754	1704	AM_RANGE(0x7d800000, 0x7dbfffff) AM_READWRITE(soundflash_r, soundflash_w)
1755	1705	AM_RANGE(0x7dc00000, 0x7dc0000f) AM_READWRITE(comm_uart_r, comm_uart_w)
1756		AM_RANGE(0x7e000000, 0x7e00013f) AM_READWRITE(rtc_r, rtc_w)
	1706	AM_RANGE(0x7e000000, 0x7e00003f) AM_DEVREADWRITE8("rtc", rtc65271_rtc_r, rtc65271_rtc_w, 0xffffffff)
	1707	AM_RANGE(0x7e000100, 0x7e00013f) AM_DEVREADWRITE8("rtc", rtc65271_xram_r, rtc65271_xram_w, 0xffffffff)
1757	1708	AM_RANGE(0x7e800000, 0x7e8000ff) AM_READWRITE(gcu0_r, gcu0_w)
1758	1709	AM_RANGE(0x7e800100, 0x7e8001ff) AM_READWRITE(gcu1_r, gcu1_w)
1759	1710	AM_RANGE(0x7fe00000, 0x7fe0000f) AM_READWRITE(atapi_command_r, atapi_command_w)
r6740	r6741
1797	1748	nvram_handler_intelflash(machine, 0, file, read_or_write);
1798	1749	nvram_handler_intelflash(machine, 1, file, read_or_write);
1799	1750	nvram_handler_intelflash(machine, 2, file, read_or_write);
1800
1801		if (read_or_write)
1802		{
1803		rtc65271_file_save(file);
1804		}
1805		else
1806		{
1807		rtc65271_init(machine, xram, NULL);
1808
1809		if (file != NULL)
1810		{
1811		rtc65271_file_load(machine, file);
1812		}
1813		}
1814	1751	}
1815	1752
1816	1753	static INPUT_PORTS_START(ppp)
r6740	r6741
1986	1923	MDRV_MACHINE_RESET(firebeat)
1987	1924	MDRV_NVRAM_HANDLER(firebeat)
1988	1925
	1926	MDRV_RTC65271_ADD("rtc", NULL)
	1927
1989	1928	/* video hardware */
1990	1929	MDRV_SCREEN_ADD("screen", RASTER)
1991	1930	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
2024	1963	MDRV_MACHINE_RESET(firebeat)
2025	1964	MDRV_NVRAM_HANDLER(firebeat)
2026	1965
	1966	MDRV_RTC65271_ADD("rtc", NULL)
	1967
2027	1968	/* video hardware */
2028	1969	MDRV_PALETTE_LENGTH(32768)
2029	1970	MDRV_PALETTE_INIT(RRRRR_GGGGG_BBBBB)
r6740	r6741
2241	2182	intelflash_init(machine, 1, FLASH_FUJITSU_29F016A, NULL);
2242	2183	intelflash_init(machine, 2, FLASH_FUJITSU_29F016A, NULL);
2243	2184
2244		rtc65271_init(machine, xram, NULL);
2245
2246	2185	pc16552d_init(machine, 0, 19660800, comm_uart_irq_callback, 0);      // Network UART
2247	2186	pc16552d_init(machine, 1, 24000000, midi_uart_irq_callback, 0);      // MIDI UART
2248	2187

src/mame/drivers/bagman.c

r6740	r6741
172	172	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
173	173	AM_RANGE(0x0000, 0x5fff) AM_ROM
174	174	AM_RANGE(0x6000, 0x67ff) AM_RAM
175		AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(bagman_videoram_w) AM_BASE_GENERIC(videoram)
176		AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(bagman_colorram_w) AM_BASE_GENERIC(colorram)
	175	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(bagman_videoram_w) AM_BASE(&bagman_videoram)
	176	AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(bagman_colorram_w) AM_BASE(&bagman_colorram)
177	177	AM_RANGE(0x9c00, 0x9fff) AM_WRITENOP   /* written to, but unused */
178	178	AM_RANGE(0xa000, 0xa000) AM_READ(bagman_pal16r6_r)
179	179	//AM_RANGE(0xa800, 0xa805) AM_READ(bagman_ls259_r) /*just for debugging purposes*/
r6740	r6741
201	201	static ADDRESS_MAP_START( pickin_map, ADDRESS_SPACE_PROGRAM, 8 )
202	202	AM_RANGE(0x0000, 0x5fff) AM_ROM
203	203	AM_RANGE(0x7000, 0x77ff) AM_RAM
204		AM_RANGE(0x8800, 0x8bff) AM_RAM_WRITE(bagman_videoram_w) AM_BASE_GENERIC(videoram)
205		AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(bagman_colorram_w) AM_BASE_GENERIC(colorram)
	204	AM_RANGE(0x8800, 0x8bff) AM_RAM_WRITE(bagman_videoram_w) AM_BASE(&bagman_videoram)
	205	AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(bagman_colorram_w) AM_BASE(&bagman_colorram)
206	206	AM_RANGE(0x9800, 0x981f) AM_WRITEONLY AM_BASE_SIZE_GENERIC(spriteram)   /* hidden portion of color RAM */
207	207	/* here only to initialize the pointer, */
208	208	/* writes are handled by bagman_colorram_w */

src/mame/drivers/tattack.c

r6740	r6741
22	22	#include "cpu/z80/z80.h"
23	23
24	24
	25	static UINT8 *videoram;
	26	static UINT8 *colorram;
25	27	static tilemap *tmap;
26	28
27	29	static TILE_GET_INFO( get_tile_info )
28	30	{
29		int code = machine->generic.videoram.u8[tile_index];
30		int color=machine->generic.colorram.u8[tile_index];
	31	int code = videoram[tile_index];
	32	int color = colorram[tile_index];
31	33
32	34	if((color&1 ) || (color>15) )
33	35	logerror("COLOR %i\n",color);
r6740	r6741
56	58	static ADDRESS_MAP_START( mem, ADDRESS_SPACE_PROGRAM, 8 )
57	59	AM_RANGE(0x0000, 0x0fff) AM_ROM
58	60	//  AM_RANGE(0x4000, 0x4000) AM_READNOP $315
59		AM_RANGE(0x5000, 0x53ff) AM_RAM AM_BASE_GENERIC(videoram)
60		AM_RANGE(0x7000, 0x73ff) AM_RAM AM_BASE_GENERIC(colorram)   // color map ? something else .. only bits 1-3 are used
	61	AM_RANGE(0x5000, 0x53ff) AM_RAM AM_BASE(&videoram)
	62	AM_RANGE(0x7000, 0x73ff) AM_RAM AM_BASE(&colorram)   // color map ? something else .. only bits 1-3 are used
61	63	AM_RANGE(0x6000, 0x6000) AM_READ_PORT("DSW2")
62	64	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("DSW1")      // dsw ? something else ?
63	65	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("INPUTS") AM_WRITENOP

src/mame/drivers/cbuster.c

r6740	r6741
22	22	#include "sound/2203intf.h"
23	23	#include "sound/2151intf.h"
24	24	#include "sound/okim6295.h"
25		#include "deco16ic.h"
	25	#include "includes/deco16ic.h"
26	26
27	27	VIDEO_START( twocrude );
28	28	VIDEO_UPDATE( twocrude );

src/mame/drivers/cvs.c

r6740	r6741
95	95	#include "sound/dac.h"
96	96	#include "sound/tms5110.h"
97	97	#include "video/s2636.h"
98		#include "cvs.h"
	98	#include "includes/cvs.h"
99	99
100	100
101	101	/* Turn to 1 so all inputs are always available (this shall only be a debug feature) */
r6740	r6741
106	106	#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
107	107
108	108
109
110	109	/*************************************
111	110	*
112		*  Global variables
113		*
114		*************************************/
115
116		UINT8 *cvs_color_ram;
117		UINT8 *cvs_video_ram;
118		UINT8 *cvs_bullet_ram;
119		UINT8 *cvs_palette_ram;
120		static UINT8 *cvs_character_ram;
121		UINT8 *cvs_fo_state;
122
123		static emu_timer *cvs_393hz_timer;
124		static UINT8 cvs_393hz_clock;
125		static UINT8 *cvs_4_bit_dac_data;
126		static UINT8 *cvs_tms5110_ctl_data;
127		static UINT8 *dac3_state;
128
129		static UINT8 character_banking_mode;
130		static UINT16 character_ram_page_start;
131		static UINT16 speech_rom_bit_address;
132
133
134
135
136		UINT8 cvs_get_character_banking_mode(void)
137		{
138		return character_banking_mode;
139		}
140
141
142
143		/*************************************
144		*
145	111	*  Multiplexed memory access
146	112	*
147	113	*************************************/
148	114
149	115	READ8_HANDLER( cvs_video_or_color_ram_r )
150	116	{
151		if (*cvs_fo_state)
152		return cvs_video_ram[offset];
	117	cvs_state *state = (cvs_state *)space->machine->driver_data;
	118
	119	if (*state->fo_state)
	120	return state->video_ram[offset];
153	121	else
154		return cvs_color_ram[offset];
	122	return state->color_ram[offset];
155	123	}
156	124
157	125	WRITE8_HANDLER( cvs_video_or_color_ram_w )
158	126	{
159		if (*cvs_fo_state)
160		cvs_video_ram[offset] = data;
	127	cvs_state *state = (cvs_state *)space->machine->driver_data;
	128
	129	if (*state->fo_state)
	130	state->video_ram[offset] = data;
161	131	else
162		cvs_color_ram[offset] = data;
	132	state->color_ram[offset] = data;
163	133	}
164	134
165	135
166	136	READ8_HANDLER( cvs_bullet_ram_or_palette_r )
167	137	{
168		if (*cvs_fo_state)
169		return cvs_palette_ram[offset & 0x0f];
	138	cvs_state *state = (cvs_state *)space->machine->driver_data;
	139
	140	if (*state->fo_state)
	141	return state->palette_ram[offset & 0x0f];
170	142	else
171		return cvs_bullet_ram[offset];
	143	return state->bullet_ram[offset];
172	144	}
173	145
174	146	WRITE8_HANDLER( cvs_bullet_ram_or_palette_w )
175	147	{
176		if (*cvs_fo_state)
177		cvs_palette_ram[offset & 0x0f] = data;
	148	cvs_state *state = (cvs_state *)space->machine->driver_data;
	149
	150	if (*state->fo_state)
	151	state->palette_ram[offset & 0x0f] = data;
178	152	else
179		cvs_bullet_ram[offset] = data;
	153	state->bullet_ram[offset] = data;
180	154	}
181	155
182	156
183	157	READ8_HANDLER( cvs_s2636_0_or_character_ram_r )
184	158	{
185		const device_config *s2636_0 = devtag_get_device(space->machine, "s2636_0");
	159	cvs_state *state = (cvs_state *)space->machine->driver_data;
186	160
187		if (*cvs_fo_state)
188		return cvs_character_ram[(0 * 0x800) | 0x400 | character_ram_page_start | offset];
	161	if (*state->fo_state)
	162	return state->character_ram[(0 * 0x800) | 0x400 | state->character_ram_page_start | offset];
189	163	else
190		return s2636_work_ram_r(s2636_0, offset);
	164	return s2636_work_ram_r(state->s2636_0, offset);
191	165	}
192	166
193	167	WRITE8_HANDLER( cvs_s2636_0_or_character_ram_w )
194	168	{
195		const device_config *s2636_0 = devtag_get_device(space->machine, "s2636_0");
	169	cvs_state *state = (cvs_state *)space->machine->driver_data;
196	170
197		if (*cvs_fo_state)
	171	if (*state->fo_state)
198	172	{
199		offset |= (0 * 0x800) | 0x400 | character_ram_page_start;
200		cvs_character_ram[offset] = data;
201		gfx_element_mark_dirty(space->machine->gfx[1], (offset/8) % 256);
	173	offset |= (0 * 0x800) | 0x400 | state->character_ram_page_start;
	174	state->character_ram[offset] = data;
	175	gfx_element_mark_dirty(space->machine->gfx[1], (offset / 8) % 256);
202	176	}
203	177	else
204		s2636_work_ram_w(s2636_0, offset, data);
	178	s2636_work_ram_w(state->s2636_0, offset, data);
205	179	}
206	180
207	181
208	182	READ8_HANDLER( cvs_s2636_1_or_character_ram_r )
209	183	{
210		const device_config *s2636_1 = devtag_get_device(space->machine, "s2636_1");
	184	cvs_state *state = (cvs_state *)space->machine->driver_data;
211	185
212		if (*cvs_fo_state)
213		return cvs_character_ram[(1 * 0x800) | 0x400 | character_ram_page_start | offset];
	186	if (*state->fo_state)
	187	return state->character_ram[(1 * 0x800) | 0x400 | state->character_ram_page_start | offset];
214	188	else
215		return s2636_work_ram_r(s2636_1, offset);
	189	return s2636_work_ram_r(state->s2636_1, offset);
216	190	}
217	191
218	192	WRITE8_HANDLER( cvs_s2636_1_or_character_ram_w )
219	193	{
220		const device_config *s2636_1 = devtag_get_device(space->machine, "s2636_1");
	194	cvs_state *state = (cvs_state *)space->machine->driver_data;
221	195
222		if (*cvs_fo_state)
	196	if (*state->fo_state)
223	197	{
224		offset |= (1 * 0x800) | 0x400 | character_ram_page_start;
225		cvs_character_ram[offset] = data;
226		gfx_element_mark_dirty(space->machine->gfx[1], (offset/8) % 256);
	198	offset |= (1 * 0x800) | 0x400 | state->character_ram_page_start;
	199	state->character_ram[offset] = data;
	200	gfx_element_mark_dirty(space->machine->gfx[1], (offset / 8) % 256);
227	201	}
228	202	else
229		s2636_work_ram_w(s2636_1, offset, data);
	203	s2636_work_ram_w(state->s2636_1, offset, data);
230	204	}
231	205
232	206
233	207	READ8_HANDLER( cvs_s2636_2_or_character_ram_r )
234	208	{
235		const device_config *s2636_2 = devtag_get_device(space->machine, "s2636_2");
	209	cvs_state *state = (cvs_state *)space->machine->driver_data;
236	210
237		if (*cvs_fo_state)
238		return cvs_character_ram[(2 * 0x800) | 0x400 | character_ram_page_start | offset];
	211	if (*state->fo_state)
	212	return state->character_ram[(2 * 0x800) | 0x400 | state->character_ram_page_start | offset];
239	213	else
240		return s2636_work_ram_r(s2636_2, offset);
	214	return s2636_work_ram_r(state->s2636_2, offset);
241	215	}
242	216
243	217	WRITE8_HANDLER( cvs_s2636_2_or_character_ram_w )
244	218	{
245		const device_config *s2636_2 = devtag_get_device(space->machine, "s2636_2");
	219	cvs_state *state = (cvs_state *)space->machine->driver_data;
246	220
247		if (*cvs_fo_state)
	221	if (*state->fo_state)
248	222	{
249		offset |= (2 * 0x800) | 0x400 | character_ram_page_start;
250		cvs_character_ram[offset] = data;
251		gfx_element_mark_dirty(space->machine->gfx[1], (offset/8) % 256);
	223	offset |= (2 * 0x800) | 0x400 | state->character_ram_page_start;
	224	state->character_ram[offset] = data;
	225	gfx_element_mark_dirty(space->machine->gfx[1], (offset / 8) % 256);
252	226	}
253	227	else
254		s2636_work_ram_w(s2636_2, offset, data);
	228	s2636_work_ram_w(state->s2636_2, offset, data);
255	229	}
256	230
257	231
r6740	r6741
267	241	cpu_set_input_line_vector(device, 0, 0x03);
268	242	generic_pulse_irq_line(device, 0);
269	243
270		cvs_scroll_stars();
	244	cvs_scroll_stars(device->machine);
271	245	}
272	246
273	247
274		static void cvs_slave_cpu_interrupt(running_machine *machine, const char *cpu, int state)
	248	static void cvs_slave_cpu_interrupt( const device_config *cpu, int state )
275	249	{
276		cpu_set_input_line_vector(cputag_get_cpu(machine, cpu), 0, 0x03);
277		//cputag_set_input_line(machine, cpu, 0, state ? ASSERT_LINE : CLEAR_LINE);
278		cputag_set_input_line(machine, cpu, 0, state ? HOLD_LINE : CLEAR_LINE);
	250	cpu_set_input_line_vector(cpu, 0, 0x03);
	251	//cpu_set_input_line(cpu, 0, state ? ASSERT_LINE : CLEAR_LINE);
	252	cpu_set_input_line(cpu, 0, state ? HOLD_LINE : CLEAR_LINE);
279	253	}
280	254
281	255
r6740	r6741
288	262
289	263	static READ8_HANDLER( cvs_input_r )
290	264	{
	265	cvs_state *state = (cvs_state *)space->machine->driver_data;
291	266	UINT8 ret = 0;
292	267
293	268	/* the upper 4 bits of the address is used to select the character banking attributes */
294		character_banking_mode = (offset >> 4) & 0x03;
295		character_ram_page_start = (offset << 2) & 0x300;
	269	state->character_banking_mode = (offset >> 4) & 0x03;
	270	state->character_ram_page_start = (offset << 2) & 0x300;
296	271
297	272	/* the lower 4 (or 3?) bits select the port to read */
298	273	switch (offset & 0x0f)   /* might be 0x07 */
r6740	r6741
319	294	#if 0
320	295	static READ8_HANDLER( cvs_393hz_clock_r )
321	296	{
322		return cvs_393hz_clock ? 0x80 : 0;
	297	cvs_state *state = (cvs_state *)space->machine->driver_data;
	298	return state->cvs_393hz_clock ? 0x80 : 0;
323	299	}
324	300	#endif
325	301
r6740	r6741
330	306
331	307	static TIMER_CALLBACK( cvs_393hz_timer_cb )
332	308	{
333		const device_config *dac3 = devtag_get_device(machine, "dac3");
334		cvs_393hz_clock = !cvs_393hz_clock;
	309	cvs_state *state = (cvs_state *)machine->driver_data;
	310	state->cvs_393hz_clock = !state->cvs_393hz_clock;
335	311
336	312	/* quasar.c games use this timer but have no dac3! */
337		if (dac3 != NULL)
	313	if (state->dac3 != NULL)
338	314	{
339		if (dac3_state[2])
340		dac_w(dac3, 0, cvs_393hz_clock * 0xff);
	315	if (state->dac3_state[2])
	316	dac_w(state->dac3, 0, state->cvs_393hz_clock * 0xff);
341	317	}
342	318	}
343	319
344	320
345	321	static void start_393hz_timer(running_machine *machine)
346	322	{
347		cvs_393hz_timer = timer_alloc(machine, cvs_393hz_timer_cb, NULL);
348		timer_adjust_periodic(cvs_393hz_timer, ATTOTIME_IN_HZ(30*393), 0, ATTOTIME_IN_HZ(30*393));
	323	cvs_state *state = (cvs_state *)machine->driver_data;
	324	state->cvs_393hz_timer = timer_alloc(machine, cvs_393hz_timer_cb, NULL);
	325	timer_adjust_periodic(state->cvs_393hz_timer, ATTOTIME_IN_HZ(30*393), 0, ATTOTIME_IN_HZ(30*393));
349	326	}
350	327
351	328
r6740	r6741
358	335
359	336	static WRITE8_DEVICE_HANDLER( cvs_4_bit_dac_data_w )
360	337	{
	338	cvs_state *state = (cvs_state *)device->machine->driver_data;
361	339	UINT8 dac_value;
362	340	static int old_data[4] = {0,0,0,0};
363	341
r6740	r6741
366	344	LOG(("4BIT: %02x %02x\n", offset, data));
367	345	old_data[offset] = data;
368	346	}
369		cvs_4_bit_dac_data[offset] = data >> 7;
	347	state->cvs_4_bit_dac_data[offset] = data >> 7;
370	348
371	349	/* merge into D0-D3 */
372		dac_value = (cvs_4_bit_dac_data[0] << 0) |
373		(cvs_4_bit_dac_data[1] << 1) |
374		(cvs_4_bit_dac_data[2] << 2) |
375		(cvs_4_bit_dac_data[3] << 3);
	350	dac_value = (state->cvs_4_bit_dac_data[0] << 0) |
	351	(state->cvs_4_bit_dac_data[1] << 1) |
	352	(state->cvs_4_bit_dac_data[2] << 2) |
	353	(state->cvs_4_bit_dac_data[3] << 3);
376	354
377	355	/* scale up to a full byte and output */
378	356	dac_data_w(device, (dac_value << 4) | dac_value);
r6740	r6741
380	358
381	359	static WRITE8_DEVICE_HANDLER( cvs_unknown_w )
382	360	{
	361	cvs_state *state = (cvs_state *)device->machine->driver_data;
	362
383	363	/* offset 2 is used in 8ball
384	364	* offset 0 is used in spacefrt
385	365	* offset 3 is used in darkwar
r6740	r6741
387	367	* offset 1 is not used (no trace in disassembly)
388	368	*/
389	369
390		if (data != dac3_state[offset])
	370	if (data != state->dac3_state[offset])
391	371	{
392	372	if (offset != 2)
393	373	popmessage("Unknown: %02x %02x\n", offset, data);
394		dac3_state[offset] = data;
	374	state->dac3_state[offset] = data;
395	375	}
396	376	}
397	377
r6740	r6741
405	385
406	386	static WRITE8_HANDLER( cvs_speech_rom_address_lo_w )
407	387	{
	388	cvs_state *state = (cvs_state *)space->machine->driver_data;
	389
408	390	/* assuming that d0-d2 are cleared here */
409		speech_rom_bit_address = (speech_rom_bit_address & 0xf800) | (data << 3);
410		LOG(("%04x : CVS: Speech Lo %02x Address = %04x\n", cpu_get_pc(space->cpu), data, speech_rom_bit_address >> 3));
	391	state->speech_rom_bit_address = (state->speech_rom_bit_address & 0xf800) | (data << 3);
	392	LOG(("%04x : CVS: Speech Lo %02x Address = %04x\n", cpu_get_pc(space->cpu), data, state->speech_rom_bit_address >> 3));
411	393	}
412	394
413	395	static WRITE8_HANDLER( cvs_speech_rom_address_hi_w )
414	396	{
415		speech_rom_bit_address = (speech_rom_bit_address & 0x07ff) | (data << 11);
416		LOG(("%04x : CVS: Speech Hi %02x Address = %04x\n", cpu_get_pc(space->cpu), data, speech_rom_bit_address >> 3));
	397	cvs_state *state = (cvs_state *)space->machine->driver_data;
	398	state->speech_rom_bit_address = (state->speech_rom_bit_address & 0x07ff) | (data << 11);
	399	LOG(("%04x : CVS: Speech Hi %02x Address = %04x\n", cpu_get_pc(space->cpu), data, state->speech_rom_bit_address >> 3));
417	400	}
418	401
419	402
420	403	static READ8_HANDLER( cvs_speech_command_r )
421	404	{
	405	cvs_state *state = (cvs_state *)space->machine->driver_data;
	406
422	407	/* FIXME: this was by observation on board ???
423	408	*          -bit 7 is TMS status (active LO) */
424		return ((tms5110_ctl_r(devtag_get_device(space->machine, "tms"), 0) ^ 1) << 7) | (soundlatch_r(space, 0) & 0x7f);
	409	return ((tms5110_ctl_r(state->tms, 0) ^ 1) << 7) | (soundlatch_r(space, 0) & 0x7f);
425	410	}
426	411
427	412
428	413	static WRITE8_DEVICE_HANDLER( cvs_tms5110_ctl_w )
429	414	{
	415	cvs_state *state = (cvs_state *)device->machine->driver_data;
430	416	UINT8 ctl;
431	417	/*
432	418	* offset 0: CS ?
433	419	*/
434		cvs_tms5110_ctl_data[offset] = (~data >> 7) & 0x01;
	420	state->tms5110_ctl_data[offset] = (~data >> 7) & 0x01;
435	421
436	422	ctl = 0 |                        /* CTL1 */
437		(cvs_tms5110_ctl_data[1] << 1) |   /* CTL2 */
438		(cvs_tms5110_ctl_data[2] << 2) |   /* CTL4 */
439		(cvs_tms5110_ctl_data[1] << 3);   /* CTL8 */
	423	(state->tms5110_ctl_data[1] << 1) |   /* CTL2 */
	424	(state->tms5110_ctl_data[2] << 2) |   /* CTL4 */
	425	(state->tms5110_ctl_data[1] << 3);   /* CTL8 */
440	426
441	427	LOG(("CVS: Speech CTL = %04x %02x %02x\n",  ctl, offset, data));
442	428	tms5110_ctl_w(device, 0, ctl);
r6740	r6741
451	437	}
452	438
453	439
454		static int speech_rom_read_bit(const device_config *device)
	440	static int speech_rom_read_bit( const device_config *device )
455	441	{
	442	cvs_state *state = (cvs_state *)device->machine->driver_data;
456	443	running_machine *machine = device->machine;
457	444	UINT8 *ROM = memory_region(machine, "speechdata");
458	445	int bit;
459	446
460	447	/* before reading the bit, clamp the address to the region length */
461		speech_rom_bit_address = speech_rom_bit_address & ((memory_region_length(machine, "speechdata") * 8) - 1);
462		bit = (ROM[speech_rom_bit_address >> 3] >> (speech_rom_bit_address & 0x07)) & 0x01;
	448	state->speech_rom_bit_address = state->speech_rom_bit_address & ((memory_region_length(machine, "speechdata") * 8) - 1);
	449	bit = (ROM[state->speech_rom_bit_address >> 3] >> (state->speech_rom_bit_address & 0x07)) & 0x01;
463	450
464	451	/* prepare for next bit */
465		speech_rom_bit_address = speech_rom_bit_address + 1;
	452	state->speech_rom_bit_address = state->speech_rom_bit_address + 1;
466	453
467	454	return bit;
468	455	}
r6740	r6741
484	471
485	472	static WRITE8_HANDLER( audio_command_w )
486	473	{
	474	cvs_state *state = (cvs_state *)space->machine->driver_data;
	475
487	476	LOG(("data %02x\n", data));
488	477	/* cause interrupt on audio CPU if bit 7 set */
489	478	soundlatch_w(space, 0, data);
490		cvs_slave_cpu_interrupt(space->machine, "audiocpu", data & 0x80 ? 1 : 0);
	479	cvs_slave_cpu_interrupt(state->audiocpu, data & 0x80 ? 1 : 0);
491	480	}
492	481
493	482
494	483
495	484	/*************************************
496	485	*
497		*  Machine initialization
498		*
499		*************************************/
500
501		MACHINE_START( cvs )
502		{
503		/* allocate memory */
504		cvs_color_ram = auto_alloc_array(machine, UINT8, 0x400);
505		cvs_palette_ram = auto_alloc_array(machine, UINT8, 0x10);
506		cvs_character_ram = auto_alloc_array(machine, UINT8, 3 * 0x800);  /* only half is used, but
507		by allocating twice the amount,
508		we can use the same gfx_layout */
509
510		if (machine->gfx[1] != NULL)
511		gfx_element_set_source(machine->gfx[1], cvs_character_ram);
512
513		start_393hz_timer(machine);
514
515		/* register state save */
516		state_save_register_global_pointer(machine, cvs_color_ram, 0x400);
517		state_save_register_global_pointer(machine, cvs_palette_ram, 0x10);
518		state_save_register_global_pointer(machine, cvs_character_ram, 3 * 0x800);
519		state_save_register_global(machine, character_banking_mode);
520		state_save_register_global(machine, character_ram_page_start);
521		state_save_register_global(machine, speech_rom_bit_address);
522		state_save_register_global(machine, cvs_393hz_clock);
523		}
524
525
526
527		/*************************************
528		*
529	486	*  Main CPU memory/IO handlers
530	487	*
531	488	*************************************/
r6740	r6741
533	490	static ADDRESS_MAP_START( cvs_main_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
534	491	ADDRESS_MAP_GLOBAL_MASK(0x7fff)
535	492	AM_RANGE(0x0000, 0x13ff) AM_ROM
536		AM_RANGE(0x1400, 0x14ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_bullet_ram_or_palette_r, cvs_bullet_ram_or_palette_w) AM_BASE(&cvs_bullet_ram)
	493	AM_RANGE(0x1400, 0x14ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_bullet_ram_or_palette_r, cvs_bullet_ram_or_palette_w) AM_BASE_MEMBER(cvs_state, bullet_ram)
537	494	AM_RANGE(0x1500, 0x15ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_s2636_2_or_character_ram_r, cvs_s2636_2_or_character_ram_w)
538	495	AM_RANGE(0x1600, 0x16ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_s2636_1_or_character_ram_r, cvs_s2636_1_or_character_ram_w)
539	496	AM_RANGE(0x1700, 0x17ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_s2636_0_or_character_ram_r, cvs_s2636_0_or_character_ram_w)
540		AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0x6000) AM_READWRITE(cvs_video_or_color_ram_r, cvs_video_or_color_ram_w) AM_BASE(&cvs_video_ram)
	497	AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0x6000) AM_READWRITE(cvs_video_or_color_ram_r, cvs_video_or_color_ram_w) AM_BASE_MEMBER(cvs_state, video_ram)
541	498	AM_RANGE(0x1c00, 0x1fff) AM_MIRROR(0x6000) AM_RAM
542	499	AM_RANGE(0x2000, 0x33ff) AM_ROM
543	500	AM_RANGE(0x4000, 0x53ff) AM_ROM
r6740	r6741
550	507	AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(cvs_collision_clear, cvs_video_fx_w)
551	508	AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(cvs_collision_r, audio_command_w)
552	509	AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
553		AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_BASE(&cvs_fo_state)
	510	AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_BASE_MEMBER(cvs_state, fo_state)
554	511	ADDRESS_MAP_END
555	512
556	513
r6740	r6741
567	524	AM_RANGE(0x1000, 0x107f) AM_RAM
568	525	AM_RANGE(0x1800, 0x1800) AM_READ(soundlatch_r)
569	526	AM_RANGE(0x1840, 0x1840) AM_DEVWRITE("dac1", dac_w)
570		AM_RANGE(0x1880, 0x1883) AM_DEVWRITE("dac2", cvs_4_bit_dac_data_w) AM_BASE(&cvs_4_bit_dac_data)
571		AM_RANGE(0x1884, 0x1887) AM_DEVWRITE("dac3", cvs_unknown_w)   AM_BASE(&dac3_state)   /* ???? not connected to anything */
	527	AM_RANGE(0x1880, 0x1883) AM_DEVWRITE("dac2", cvs_4_bit_dac_data_w) AM_BASE_MEMBER(cvs_state, cvs_4_bit_dac_data)
	528	AM_RANGE(0x1884, 0x1887) AM_DEVWRITE("dac3", cvs_unknown_w)   AM_BASE_MEMBER(cvs_state, dac3_state)   /* ???? not connected to anything */
572	529	ADDRESS_MAP_END
573	530
574	531
r6740	r6741
591	548	AM_RANGE(0x1d00, 0x1d00) AM_WRITE(cvs_speech_rom_address_lo_w)
592	549	AM_RANGE(0x1d40, 0x1d40) AM_WRITE(cvs_speech_rom_address_hi_w)
593	550	AM_RANGE(0x1d80, 0x1d80) AM_READ(cvs_speech_command_r)
594		AM_RANGE(0x1ddc, 0x1dde) AM_DEVWRITE("tms", cvs_tms5110_ctl_w) AM_BASE(&cvs_tms5110_ctl_data)
	551	AM_RANGE(0x1ddc, 0x1dde) AM_DEVWRITE("tms", cvs_tms5110_ctl_w) AM_BASE_MEMBER(cvs_state, tms5110_ctl_data)
595	552	AM_RANGE(0x1ddf, 0x1ddf) AM_DEVWRITE("tms", cvs_tms5110_pdc_w)
596	553	ADDRESS_MAP_END
597	554
r6740	r6741
620	577	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
621	578	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
622	579
623		PORT_START("IN1")   /* Dunno */
	580	PORT_START("IN1")
624	581	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL        /* "Green button" */
625	582	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )                      /* "Green button" */
626	583	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
r6740	r6741
630	587	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
631	588	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
632	589
633		PORT_START("IN2")   /* Dunno */
	590	PORT_START("IN2")
634	591	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )           /* not sure it's SERVICE1 : it uses "Coin B" coinage and doesn't say "CREDIT" */
635	592	PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNKNOWN )
636	593
637		PORT_START("IN3")   /* Dunno */
	594	PORT_START("IN3")
638	595	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
639	596	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
640	597	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )   PORT_COCKTAIL
r6740	r6741
644	601	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
645	602	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
646	603
647		PORT_START("DSW3")   /* SW BANK 3 */
	604	PORT_START("DSW3")
648	605	PORT_DIPUNUSED( 0x01, IP_ACTIVE_HIGH )                  /* can't tell if it's ACTIVE_HIGH or ACTIVE_LOW */
649	606	PORT_DIPUNUSED( 0x02, IP_ACTIVE_HIGH )                  /* can't tell if it's ACTIVE_HIGH or ACTIVE_LOW */
650	607	PORT_DIPUNUSED( 0x04, IP_ACTIVE_HIGH )                  /* can't tell if it's ACTIVE_HIGH or ACTIVE_LOW */
r6740	r6741
654	611	PORT_DIPSETTING(    0x10, DEF_STR( Cocktail ) )
655	612	PORT_DIPUNUSED( 0x20, IP_ACTIVE_HIGH )                  /* can't tell if it's ACTIVE_HIGH or ACTIVE_LOW */
656	613
657		PORT_START("DSW2")   /* SW BANK 2 */
	614	PORT_START("DSW2")
658	615	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) )
659	616	PORT_DIPSETTING(    0x03, DEF_STR( 4C_1C ) )
660	617	PORT_DIPSETTING(    0x01, DEF_STR( 3C_1C ) )
r6740	r6741
670	627	PORT_DIPSETTING(    0x10, "5" )
671	628	PORT_DIPUNUSED( 0x20, IP_ACTIVE_HIGH )                  /* can't tell if it's ACTIVE_HIGH or ACTIVE_LOW */
672	629
673		PORT_START("SENSE")   /* SENSE */
	630	PORT_START("SENSE")
674	631	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
675	632	INPUT_PORTS_END
676	633
r6740	r6741
909	866	static INPUT_PORTS_START( heartatk )
910	867	PORT_INCLUDE(cvs_registration)
911	868
912		/* DSW3 bits 2 and 3 stored at 0x1c61 (0, 2, 1, 3) - code at 0x0c52
	869	/* DSW3 bits 2 and 3 stored at 0x1c61 (0, 2, 1, 3) - code at 0x0c52
913	870	read back code at 0x2197 but untested value : bonus life always at 100000 */
914	871
915	872	/* DSW2 bit 5 stored at 0x1e76 - code at 0x0c5c - read back code at 0x00e4 */
r6740	r6741
1026	983	static const s2636_interface s2636_0_config =
1027	984	{
1028	985	"screen",
1029		0xff,
	986	0x100,
1030	987	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
1031	988	};
1032	989
1033	990	static const s2636_interface s2636_1_config =
1034	991	{
1035	992	"screen",
1036		0xff,
	993	0x100,
1037	994	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
1038	995	};
1039	996
1040	997	static const s2636_interface s2636_2_config =
1041	998	{
1042	999	"screen",
1043		0xff,
	1000	0x100,
1044	1001	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
1045	1002	};
1046	1003
1047	1004
	1005	MACHINE_START( cvs )
	1006	{
	1007	cvs_state *state = (cvs_state *)machine->driver_data;
	1008
	1009	/* allocate memory */
	1010	state->color_ram = auto_alloc_array(machine, UINT8, 0x400);
	1011	state->palette_ram = auto_alloc_array(machine, UINT8, 0x10);
	1012	state->character_ram = auto_alloc_array(machine, UINT8, 3 * 0x800);  /* only half is used, but
	1013	by allocating twice the amount,
	1014	we can use the same gfx_layout */
	1015
	1016	if (machine->gfx[1] != NULL)
	1017	gfx_element_set_source(machine->gfx[1], state->character_ram);
	1018
	1019	start_393hz_timer(machine);
	1020
	1021	/* set devices */
	1022	state->maincpu = devtag_get_device(machine, "maincpu");
	1023	state->audiocpu = devtag_get_device(machine, "audiocpu");
	1024	state->speech = devtag_get_device(machine, "speech");
	1025	state->dac3 = devtag_get_device(machine, "dac3");
	1026	state->tms = devtag_get_device(machine, "tms");
	1027	state->s2636_0 = devtag_get_device(machine, "s2636_0");
	1028	state->s2636_1 = devtag_get_device(machine, "s2636_1");
	1029	state->s2636_2 = devtag_get_device(machine, "s2636_2");
	1030
	1031	/* register state save */
	1032	state_save_register_global_pointer(machine, state->color_ram, 0x400);
	1033	state_save_register_global_pointer(machine, state->palette_ram, 0x10);
	1034	state_save_register_global_pointer(machine, state->character_ram, 3 * 0x800);
	1035	state_save_register_global(machine, state->character_banking_mode);
	1036	state_save_register_global(machine, state->character_ram_page_start);
	1037	state_save_register_global(machine, state->speech_rom_bit_address);
	1038	state_save_register_global(machine, state->cvs_393hz_clock);
	1039	state_save_register_global(machine, state->collision_register);
	1040	state_save_register_global(machine, state->total_stars);
	1041	state_save_register_global(machine, state->stars_on);
	1042	state_save_register_global(machine, state->scroll_reg);
	1043	state_save_register_global(machine, state->stars_scroll);
	1044	}
	1045
	1046	MACHINE_RESET( cvs )
	1047	{
	1048	cvs_state *state = (cvs_state *)machine->driver_data;
	1049
	1050	state->character_banking_mode = 0;
	1051	state->character_ram_page_start = 0;
	1052	state->speech_rom_bit_address = 0;
	1053	state->cvs_393hz_clock = 0;
	1054	state->collision_register = 0;
	1055	state->total_stars = 0;
	1056	state->stars_on = 0;
	1057	state->scroll_reg = 0;
	1058	state->stars_scroll = 0;
	1059	}
	1060
	1061
1048	1062	static MACHINE_DRIVER_START( cvs )
1049	1063
	1064	/* driver data */
	1065	MDRV_DRIVER_DATA(cvs_state)
	1066
1050	1067	/* basic machine hardware */
1051	1068	MDRV_CPU_ADD("maincpu", S2650, 894886.25)
1052	1069	MDRV_CPU_PROGRAM_MAP(cvs_main_cpu_map)
r6740	r6741
1062	1079	MDRV_CPU_IO_MAP(cvs_speech_cpu_io_map)
1063	1080
1064	1081	MDRV_MACHINE_START(cvs)
	1082	MDRV_MACHINE_RESET(cvs)
1065	1083
1066	1084	/* video hardware */
1067	1085	MDRV_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE)
r6740	r6741
1685	1703	*
1686	1704	*************************************/
1687	1705
1688		GAME( 1981, cosmos,   0,        cvs,     cosmos,   0,        ROT90, "Century Electronics", "Cosmos", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND )
1689		GAME( 1981, darkwar,  0,        cvs,     darkwar,  0,        ROT90, "Century Electronics", "Dark Warrior", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1690		GAME( 1981, spacefrt, 0,        cvs,     spacefrt, 0,        ROT90, "Century Electronics", "Space Fortress (CVS)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND )
1691		GAME( 1982, 8ball,    0,        cvs,     8ball,    0,        ROT90, "Century Electronics", "Video Eight Ball", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1692		GAME( 1982, 8ball1,   8ball,    cvs,     8ball,    0,        ROT90, "Century Electronics", "Video Eight Ball (Rev.1)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1693		GAME( 1982, logger,   0,        cvs,     logger,   0,        ROT90, "Century Electronics", "Logger", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1694		GAME( 1982, dazzler,  0,        cvs,     dazzler,  0,        ROT90, "Century Electronics", "Dazzler", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1695		GAME( 1982, wallst,   0,        cvs,     wallst,   0,        ROT90, "Century Electronics", "Wall Street", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1696		GAME( 1982, radarzon, 0,        cvs,     radarzon, 0,        ROT90, "Century Electronics", "Radar Zone", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1697		GAME( 1982, radarzon1,radarzon, cvs,     radarzon, 0,        ROT90, "Century Electronics", "Radar Zone (Rev.1)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1698		GAME( 1982, radarzont,radarzon, cvs,     radarzon, 0,        ROT90, "Century Electronics (Tuni Electro Service Inc)", "Radar Zone (Tuni)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1699		GAME( 1982, outline,  radarzon, cvs,     radarzon, 0,        ROT90, "Century Electronics", "Outline", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1700		GAME( 1982, goldbug,  0,        cvs,     goldbug,  0,        ROT90, "Century Electronics", "Gold Bug", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1701		GAME( 1982, diggerc,  0,        cvs,     diggerc,  0,        ROT90, "Century Electronics", "Digger (CVS)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1702		GAME( 1983, heartatk, 0,        cvs,     heartatk, 0,        ROT90, "Century Electronics", "Heart Attack", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1703		GAME( 1983, hunchbak, 0,        cvs,     hunchbak, 0,        ROT90, "Century Electronics", "Hunchback (set 1)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1704		GAME( 1983, hunchbaka,hunchbak, cvs,     hunchbak, hunchbka, ROT90, "Century Electronics", "Hunchback (set 2)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1705		GAME( 1983, superbik, 0,        cvs,     superbik, superbik, ROT90, "Century Electronics", "Superbike", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1706		GAME( 1983, raiders,  0,        cvs,     raiders,  raiders,  ROT90, "Century Electronics", "Raiders", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1707		GAME( 1983, hero,     0,        cvs,     hero,     hero,     ROT90, "Seatongrove Ltd",     "Hero", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
1708		GAME( 1984, huncholy, 0,        cvs,     huncholy, huncholy, ROT90, "Seatongrove Ltd",     "Hunchback Olympic", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND)
	1706	GAME( 1981, cosmos,    0,        cvs,     cosmos,   0,        ROT90, "Century Electronics", "Cosmos", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1707	GAME( 1981, darkwar,   0,        cvs,     darkwar,  0,        ROT90, "Century Electronics", "Dark Warrior", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1708	GAME( 1981, spacefrt,  0,        cvs,     spacefrt, 0,        ROT90, "Century Electronics", "Space Fortress (CVS)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1709	GAME( 1982, 8ball,     0,        cvs,     8ball,    0,        ROT90, "Century Electronics", "Video Eight Ball", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1710	GAME( 1982, 8ball1,    8ball,    cvs,     8ball,    0,        ROT90, "Century Electronics", "Video Eight Ball (Rev.1)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1711	GAME( 1982, logger,    0,        cvs,     logger,   0,        ROT90, "Century Electronics", "Logger", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1712	GAME( 1982, dazzler,   0,        cvs,     dazzler,  0,        ROT90, "Century Electronics", "Dazzler", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1713	GAME( 1982, wallst,    0,        cvs,     wallst,   0,        ROT90, "Century Electronics", "Wall Street", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1714	GAME( 1982, radarzon,  0,        cvs,     radarzon, 0,        ROT90, "Century Electronics", "Radar Zone", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1715	GAME( 1982, radarzon1, radarzon, cvs,     radarzon, 0,        ROT90, "Century Electronics", "Radar Zone (Rev.1)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1716	GAME( 1982, radarzont, radarzon, cvs,     radarzon, 0,        ROT90, "Century Electronics (Tuni Electro Service Inc)", "Radar Zone (Tuni)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1717	GAME( 1982, outline,   radarzon, cvs,     radarzon, 0,        ROT90, "Century Electronics", "Outline", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1718	GAME( 1982, goldbug,   0,        cvs,     goldbug,  0,        ROT90, "Century Electronics", "Gold Bug", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1719	GAME( 1982, diggerc,   0,        cvs,     diggerc,  0,        ROT90, "Century Electronics", "Digger (CVS)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1720	GAME( 1983, heartatk,  0,        cvs,     heartatk, 0,        ROT90, "Century Electronics", "Heart Attack", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1721	GAME( 1983, hunchbak,  0,        cvs,     hunchbak, 0,        ROT90, "Century Electronics", "Hunchback (set 1)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1722	GAME( 1983, hunchbaka, hunchbak, cvs,     hunchbak, hunchbka, ROT90, "Century Electronics", "Hunchback (set 2)", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1723	GAME( 1983, superbik,  0,        cvs,     superbik, superbik, ROT90, "Century Electronics", "Superbike", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1724	GAME( 1983, raiders,   0,        cvs,     raiders,  raiders,  ROT90, "Century Electronics", "Raiders", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1725	GAME( 1983, hero,      0,        cvs,     hero,     hero,     ROT90, "Seatongrove Ltd",     "Hero", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	1726	GAME( 1984, huncholy,  0,        cvs,     huncholy, huncholy, ROT90, "Seatongrove Ltd",     "Hunchback Olympic", GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )

src/mame/drivers/turbo.c

r6740	r6741
147	147	#include "driver.h"
148	148	#include "cpu/z80/z80.h"
149	149	#include "machine/8255ppi.h"
150		#include "turbo.h"
	150	#include "includes/turbo.h"
151	151	#include "machine/segacrpt.h"
152	152	#include "sound/samples.h"
153	153

src/mame/drivers/trvquest.c

r6740	r6741
38	38	#include "cpu/m6809/m6809.h"
39	39	#include "machine/6522via.h"
40	40	#include "sound/ay8910.h"
41		#include "gameplan.h"
	41	#include "includes/gameplan.h"
42	42
43	43	static READ8_HANDLER( trvquest_question_r )
44	44	{
r6740	r6741
49	49
50	50	static WRITE8_DEVICE_HANDLER( trvquest_coin_w )
51	51	{
52		coin_counter_w(device->machine, 0,~data & 1);
	52	coin_counter_w(device->machine, 0, ~data & 1);
53	53	}
54	54
55	55	static WRITE8_DEVICE_HANDLER( trvquest_misc_w )
r6740	r6741
148	148
149	149	static TIMER_CALLBACK( via_irq_delayed )
150	150	{
151		cputag_set_input_line(machine, "maincpu", 0, param);
	151	gameplan_state *state = (gameplan_state *)machine->driver_data;
	152	cpu_set_input_line(state->maincpu, 0, param);
152	153	}
153	154
154		static void via_irq(const device_config *device, int state)
	155	static void via_irq( const device_config *device, int state )
155	156	{
156	157	// from gameplan.c
157	158
r6740	r6741
162	163	}
163	164
164	165
165		static input_port_value input_port_read_indexed(running_machine *machine, int portnum)
166		{
167		const input_port_config *port = input_port_by_index(&machine->portlist, portnum);
168		return input_port_read_direct(port);
169		}
170
171		static READ8_DEVICE_HANDLER( via_input_port_0_r ) { return input_port_read_indexed(device->machine, 0); }
172		static READ8_DEVICE_HANDLER( via_input_port_1_r ) { return input_port_read_indexed(device->machine, 1); }
173		static READ8_DEVICE_HANDLER( via_input_port_2_r ) { return input_port_read_indexed(device->machine, 2); }
174		static READ8_DEVICE_HANDLER( via_input_port_3_r ) { return input_port_read_indexed(device->machine, 3); }
175
176	166	static const via6522_interface via_1_interface =
177	167	{
178		/*inputs : A/B         */ DEVCB_HANDLER(via_input_port_0_r), DEVCB_HANDLER(via_input_port_1_r),
	168	/*inputs : A/B         */ DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"),
179	169	/*inputs : CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
180	170	/*outputs: A/B         */ DEVCB_NULL, DEVCB_NULL,
181	171	/*outputs: CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_HANDLER(trvquest_coin_w), DEVCB_NULL,
r6740	r6741
184	174
185	175	static const via6522_interface via_2_interface =
186	176	{
187		/*inputs : A/B         */ DEVCB_HANDLER(via_input_port_2_r), DEVCB_HANDLER(via_input_port_3_r),
	177	/*inputs : A/B         */ DEVCB_INPUT_PORT("UNK"), DEVCB_INPUT_PORT("DSW"),
188	178	/*inputs : CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
189	179	/*outputs: A/B         */ DEVCB_NULL, DEVCB_NULL,
190	180	/*outputs: CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_HANDLER(trvquest_misc_w), DEVCB_NULL,
r6740	r6741
194	184
195	185	static MACHINE_START( trvquest )
196	186	{
	187	gameplan_state *state = (gameplan_state *)machine->driver_data;
	188
	189	state->maincpu = devtag_get_device(machine, "maincpu");
	190	state->via_0 = devtag_get_device(machine, "via6522_0");
	191	state->via_1 = devtag_get_device(machine, "via6522_1");
	192	state->via_2 = devtag_get_device(machine, "via6522_2");
	193
	194	/* register for save states */
	195	state_save_register_global(machine, state->video_x);
	196	state_save_register_global(machine, state->video_y);
	197	state_save_register_global(machine, state->video_command);
	198	state_save_register_global(machine, state->video_data);
197	199	}
198	200
199	201	static MACHINE_RESET( trvquest )
200	202	{
	203	gameplan_state *state = (gameplan_state *)machine->driver_data;
	204
	205	state->video_x = 0;
	206	state->video_y = 0;
	207	state->video_command = 0;
	208	state->video_data = 0;
201	209	}
202	210
203	211	static INTERRUPT_GEN( trvquest_interrupt )
204	212	{
205		const device_config *via_2 = devtag_get_device(device->machine, "via6522_2");
206		via_ca1_w(via_2, 0, 1);
207		via_ca1_w(via_2, 0, 0);
	213	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
	214	via_ca1_w(state->via_2, 0, 1);
	215	via_ca1_w(state->via_2, 0, 0);
208	216	}
209	217
210	218	static MACHINE_DRIVER_START( trvquest )

src/mame/drivers/tnzs.c

r6740	r6741
621	621
622	622	#include "driver.h"
623	623	#include "cpu/z80/z80.h"
624		#include "taitoipt.h"
	624	#include "includes/taitoipt.h"
625	625	#include "cpu/mcs48/mcs48.h"
626	626	#include "sound/2203intf.h"
627	627	#include "sound/dac.h"

src/mame/drivers/rohga.c

r6740	r6741
107	107	#include "driver.h"
108	108	#include "cpu/m68000/m68000.h"
109	109	#include "cpu/h6280/h6280.h"
110		#include "decocrpt.h"
111		#include "decoprot.h"
112		#include "deco16ic.h"
	110	#include "includes/decocrpt.h"
	111	#include "includes/decoprot.h"
	112	#include "includes/deco16ic.h"
113	113	#include "sound/2151intf.h"
114	114	#include "sound/okim6295.h"
115	115

src/mame/drivers/plygonet.c

r6740	r6741
80	80	*/
81	81
82	82	#include "driver.h"
83		#include "video/konamiic.h"
	83	#include "video/konicdev.h"
84	84	#include "cpu/m68000/m68000.h"
85	85	#include "cpu/z80/z80.h"
86	86	#include "cpu/dsp56k/dsp56k.h"
87	87	#include "sound/k054539.h"
88		#include "machine/eeprom.h"
	88	#include "machine/eepromdev.h"
89	89
90	90	VIDEO_START( polygonet );
91	91	VIDEO_UPDATE( polygonet );
r6740	r6741
95	95	READ32_HANDLER( polygonet_roz_ram_r );
96	96	WRITE32_HANDLER( polygonet_roz_ram_w );
97	97
98		static int init_eeprom_count;
99
100	98	/* 68k-side shared ram */
101	99	static UINT32* shared_ram;
102	100
r6740	r6741
121	119	"0100110000000" /* unlock command */
122	120	};
123	121
124		static NVRAM_HANDLER( polygonet )
	122	static READ32_DEVICE_HANDLER( polygonet_eeprom_r )
125	123	{
126		if (read_or_write)
127		eeprom_save(file);
128		else
129		{
130		eeprom_init(machine, &eeprom_intf);
131
132		if (file)
133		{
134		init_eeprom_count = 0;
135		eeprom_load(file);
136		}
137		else
138		init_eeprom_count = 10;
139		}
140		}
141
142		static READ32_HANDLER( polygonet_eeprom_r )
143		{
144	124	if (ACCESSING_BITS_0_15)
145	125	{
146		return 0x0200 | (eeprom_read_bit()<<8);
	126	return 0x0200 | (eepromdev_read_bit(device) << 8);
147	127	}
148	128	else
149	129	{
150		UINT8 lowInputBits = input_port_read(space->machine, "IN1");
151		UINT8 highInputBits = input_port_read(space->machine, "IN0");
	130	UINT8 lowInputBits = input_port_read(device->machine, "IN1");
	131	UINT8 highInputBits = input_port_read(device->machine, "IN0");
152	132	return ((highInputBits << 24) | (lowInputBits << 16));
153	133	}
154	134
r6740	r6741
161	141	{
162	142	if (ACCESSING_BITS_24_31)
163	143	{
164		eeprom_write_bit((data & 0x01000000) ? ASSERT_LINE : CLEAR_LINE);
165		eeprom_set_cs_line((data & 0x02000000) ? CLEAR_LINE : ASSERT_LINE);
166		eeprom_set_clock_line((data & 0x04000000) ? ASSERT_LINE : CLEAR_LINE);
	144	input_port_write(space->machine, "EEPROMOUT", data, 0xffffffff);
167	145	return;
168	146	}
169	147
r6740	r6741
542	520	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 )
543	521	AM_RANGE(0x000000, 0x1fffff) AM_ROM
544	522	AM_RANGE(0x200000, 0x21ffff) AM_RAM_WRITE(plygonet_palette_w) AM_BASE_GENERIC(paletteram)
545		AM_RANGE(0x400000, 0x40001f) AM_RAM AM_BASE((UINT32**)&K053936_0_ctrl)
	523	AM_RANGE(0x400000, 0x40001f) AM_DEVREADWRITE16("k053936", k053936_ctrl_r, k053936_ctrl_w, 0xffffffff)
546	524	AM_RANGE(0x440000, 0x440fff) AM_READWRITE(polygonet_roz_ram_r, polygonet_roz_ram_w)
547		AM_RANGE(0x480000, 0x4bffff) AM_READ(polygonet_eeprom_r)
	525	AM_RANGE(0x480000, 0x4bffff) AM_DEVREAD("eeprom", polygonet_eeprom_r)
548	526	AM_RANGE(0x4C0000, 0x4fffff) AM_WRITE(polygonet_eeprom_w)
549	527	AM_RANGE(0x500000, 0x503fff) AM_RAM_WRITE(shared_ram_write) AM_BASE(&shared_ram)
550	528	AM_RANGE(0x504000, 0x504003) AM_WRITE(dsp_w_lines)
r6740	r6741
652	630	//cputag_set_input_line(machine, "dsp", DSP56K_IRQ_MODB, CLEAR_LINE);
653	631	}
654	632
	633	static const k053936_interface polygonet_k053936_intf =
	634	{
	635	0, 0, 0   /* wrap, xoff, yoff */
	636	};
	637
655	638	static MACHINE_DRIVER_START( plygonet )
656	639	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)   /* 16 MHz (xtal is 32.0 MHz) */
657	640	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
668	651	MDRV_MACHINE_START(polygonet)
669	652
670	653	MDRV_GFXDECODE(plygonet)
671		MDRV_NVRAM_HANDLER(polygonet)
672	654
	655	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
	656
673	657	/* TODO: TEMPORARY!  UNTIL A MORE LOCALIZED SYNC CAN BE MADE */
674	658	MDRV_QUANTUM_TIME(HZ(1200000))
675	659
r6740	r6741
686	670	MDRV_VIDEO_START(polygonet)
687	671	MDRV_VIDEO_UPDATE(polygonet)
688	672
	673	MDRV_K053936_ADD("k053936", polygonet_k053936_intf)
	674
689	675	/* sound hardware */
690	676	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
691	677
r6740	r6741
722	708	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
723	709	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
724	710	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	711
	712	PORT_START( "EEPROMOUT" )
	713	PORT_BIT( 0x01000000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	714	PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	715	PORT_BIT( 0x04000000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
725	716	INPUT_PORTS_END
726	717
727	718	static INPUT_PORTS_START( polynetw )
r6740	r6741
744	735	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_PLAYER(1)
745	736	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
746	737	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	738
	739	PORT_START( "EEPROMOUT" )
	740	PORT_BIT( 0x01000000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	741	PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	742	PORT_BIT( 0x04000000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
747	743	INPUT_PORTS_END
748	744
749	745
r6740	r6741
765	761	dsp56k_update_handler = memory_set_direct_update_handler(cputag_get_address_space(machine, "dsp", ADDRESS_SPACE_PROGRAM), plygonet_dsp56k_direct_handler);
766	762
767	763	/* save states */
768		state_save_register_global(machine, init_eeprom_count);
769	764	state_save_register_global_pointer(machine, dsp56k_bank00_ram,    2 * 8 * dsp56k_bank00_size);
770	765	state_save_register_global_pointer(machine, dsp56k_bank01_ram,    2 * 8 * dsp56k_bank01_size);
771	766	state_save_register_global_pointer(machine, dsp56k_bank02_ram,    2 * 8 * dsp56k_bank02_size);

src/mame/drivers/batman.c

r6740	r6741
20	20	#include "driver.h"
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "audio/atarijsa.h"
23		#include "batman.h"
	23	#include "includes/batman.h"
24	24
25	25
26	26
r6740	r6741
38	38	}
39	39
40	40
	41	static MACHINE_START( batman )
	42	{
	43	batman_state *state = (batman_state *)machine->driver_data;
	44	atarigen_init(machine);
	45
	46	state_save_register_global(machine, state->latch_data);
	47	state_save_register_global(machine, state->alpha_tile_bank);
	48	}
	49
	50
41	51	static MACHINE_RESET( batman )
42	52	{
43	53	batman_state *state = (batman_state *)machine->driver_data;
r6740	r6741
47	57	atarivc_reset(machine->primary_screen, state->atarigen.atarivc_eof_data, 2);
48	58	atarigen_scanline_timer_reset(machine->primary_screen, batman_scanline_update, 8);
49	59	atarijsa_reset();
50		atarigen_init_save_state(machine);
51		state_save_register_global(machine, state->latch_data);
52	60	}
53	61
54	62
r6740	r6741
231	239	MDRV_CPU_ADD("maincpu", M68000, ATARI_CLOCK_14MHz)
232	240	MDRV_CPU_PROGRAM_MAP(main_map)
233	241
	242	MDRV_MACHINE_START(batman)
234	243	MDRV_MACHINE_RESET(batman)
235	244	MDRV_NVRAM_HANDLER(atarigen)
236	245

src/mame/drivers/nemesis.c

r6740	r6741
50	50	#include "sound/k007232.h"
51	51	#include "sound/k051649.h"
52	52	#include "includes/nemesis.h"
53		#include "konamipt.h"
	53	#include "includes/konamipt.h"
54	54
55	55	int nemesis_irq_on = 0;
56	56	int nemesis_irq2_on = 0;

src/mame/drivers/warriorb.c

r6740	r6741
145	145
146	146	#include "driver.h"
147	147	#include "cpu/z80/z80.h"
148		#include "taitoipt.h"
	148	#include "includes/taitoipt.h"
149	149	#include "rendlay.h"
150	150	#include "cpu/m68000/m68000.h"
151	151	#include "video/taitoic.h"

src/mame/drivers/bombjack.c

r6740	r6741
98	98	#include "driver.h"
99	99	#include "cpu/z80/z80.h"
100	100	#include "sound/ay8910.h"
101		#include "bombjack.h"
	101	#include "includes/bombjack.h"
102	102
103	103
104	104	static TIMER_CALLBACK( soundlatch_callback )

src/mame/drivers/trucocl.c

r6740	r6741
37	37	#include "sound/dac.h"
38	38
39	39	/* from video */
	40	extern UINT8 *trucocl_videoram;
	41	extern UINT8 *trucocl_colorram;
	42
40	43	WRITE8_HANDLER( trucocl_videoram_w );
41	44	WRITE8_HANDLER( trucocl_colorram_w );
42	45	PALETTE_INIT( trucocl );
r6740	r6741
88	91
89	92	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
90	93	AM_RANGE(0x0000, 0x3fff) AM_ROM
91		AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(trucocl_videoram_w) AM_BASE_GENERIC(videoram)
92		AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(trucocl_colorram_w) AM_BASE_GENERIC(colorram)
	94	AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(trucocl_videoram_w) AM_BASE(&trucocl_videoram)
	95	AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(trucocl_colorram_w) AM_BASE(&trucocl_colorram)
93	96	AM_RANGE(0x4c00, 0x4fff) AM_RAM
94	97	AM_RANGE(0x5000, 0x5000) AM_WRITE(irq_enable_w)
95	98	AM_RANGE(0x5000, 0x503f) AM_READ_PORT("IN0")

src/mame/drivers/unico.c

r6740	r6741
25	25	#include "driver.h"
26	26	#include "cpu/m68000/m68000.h"
27	27	#include "machine/eeprom.h"
28		#include "unico.h"
	28	#include "includes/unico.h"
29	29	#include "sound/2151intf.h"
30	30	#include "sound/3812intf.h"
31	31	#include "sound/okim6295.h"

src/mame/drivers/blockhl.c

r6740	r6741
22	22	#include "driver.h"
23	23	#include "cpu/z80/z80.h"
24	24	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
25		#include "video/konamiic.h"
	25	#include "video/konicdev.h"
26	26	#include "sound/2151intf.h"
27		#include "konamipt.h"
	27	#include "includes/konamipt.h"
28	28
29	29	/* prototypes */
30	30	static MACHINE_RESET( blockhl );
31	31	static KONAMI_SETLINES_CALLBACK( blockhl_banking );
32	32
	33	extern void blockhl_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color, int *flags, int *priority);
	34	extern void blockhl_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
33	35
34	36	VIDEO_START( blockhl );
35	37	VIDEO_UPDATE( blockhl );
r6740	r6741
40	42
41	43	static INTERRUPT_GEN( blockhl_interrupt )
42	44	{
43		if (K052109_is_IRQ_enabled() && rombank == 0)   /* kludge to prevent crashes */
	45	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	46
	47	if (k052109_is_irq_enabled(k052109) && rombank == 0)   /* kludge to prevent crashes */
44	48	cpu_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE);
45	49	}
46	50
r6740	r6741
66	70	}
67	71
68	72
	73	/* special handlers to combine 052109 & 051960 */
	74	static READ8_HANDLER( k052109_051960_r )
	75	{
	76	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	77	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
69	78
	79	if (k052109_get_rmrd_line(k052109) == CLEAR_LINE)
	80	{
	81	if (offset >= 0x3800 && offset < 0x3808)
	82	return k051937_r(k051960, offset - 0x3800);
	83	else if (offset < 0x3c00)
	84	return k052109_r(k052109, offset);
	85	else
	86	return k051960_r(k051960, offset - 0x3c00);
	87	}
	88	else
	89	return k052109_r(k052109, offset);
	90	}
	91
	92	static WRITE8_HANDLER( k052109_051960_w )
	93	{
	94	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	95	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	96
	97	if (offset >= 0x3800 && offset < 0x3808)
	98	k051937_w(k051960, offset - 0x3800, data);
	99	else if (offset < 0x3c00)
	100	k052109_w(k052109, offset, data);
	101	else
	102	k051960_w(k051960, offset - 0x3c00, data);
	103	}
	104
	105
70	106	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
71	107	AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w)
72	108	AM_RANGE(0x1f88, 0x1f88) AM_WRITE(blockhl_sh_irqtrigger_w)
r6740	r6741
76	112	AM_RANGE(0x1f96, 0x1f96) AM_READ_PORT("P2")
77	113	AM_RANGE(0x1f97, 0x1f97) AM_READ_PORT("DSW1")
78	114	AM_RANGE(0x1f98, 0x1f98) AM_READ_PORT("DSW2")
79		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
	115	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
80	116	AM_RANGE(0x4000, 0x57ff) AM_RAM
81	117	AM_RANGE(0x5800, 0x5fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram)
82	118	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
r6740	r6741
146	182
147	183	***************************************************************************/
148	184
	185	static const k052109_interface blockhl_k052109_intf =
	186	{
	187	"gfx1", 0,
	188	NORMAL_PLANE_ORDER,
	189	KONAMI_ROM_DEINTERLEAVE_2,
	190	blockhl_tile_callback
	191	};
	192
	193	static const k051960_interface blockhl_k051960_intf =
	194	{
	195	"gfx2", 1,
	196	NORMAL_PLANE_ORDER,
	197	KONAMI_ROM_DEINTERLEAVE_2,
	198	blockhl_sprite_callback
	199	};
	200
149	201	static MACHINE_DRIVER_START( blockhl )
150	202
151	203	/* basic machine hardware */
r6740	r6741
173	225	MDRV_VIDEO_START(blockhl)
174	226	MDRV_VIDEO_UPDATE(blockhl)
175	227
	228	MDRV_K052109_ADD("k052109", blockhl_k052109_intf)
	229	MDRV_K051960_ADD("k051960", blockhl_k051960_intf)
	230
176	231	/* sound hardware */
177	232	MDRV_SPEAKER_STANDARD_MONO("mono")
178	233
r6740	r6741
245	300
246	301	static KONAMI_SETLINES_CALLBACK( blockhl_banking )
247	302	{
	303	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
248	304	UINT8 *RAM = memory_region(device->machine, "maincpu");
249	305	int offs;
250	306
r6740	r6741
261	317	palette_selected = ~lines & 0x20;
262	318
263	319	/* bit 6 = enable char ROM reading through the video RAM */
264		K052109_set_RMRD_line( ( lines & 0x40 ) ? ASSERT_LINE : CLEAR_LINE );
	320	k052109_set_rmrd_line(k052109, (lines & 0x40) ? ASSERT_LINE : CLEAR_LINE);
265	321
266	322	/* bit 7 used but unknown */
267	323
r6740	r6741
280	336	}
281	337
282	338
283		static DRIVER_INIT( blockhl )
284		{
285		konami_rom_deinterleave_2(machine, "gfx1");
286		konami_rom_deinterleave_2(machine, "gfx2");
287		}
288
289
290		GAME( 1989, blockhl, 0,       blockhl, blockhl, blockhl, ROT0, "Konami", "Block Hole", 0 )
291		GAME( 1989, quarth,  blockhl, blockhl, blockhl, blockhl, ROT0, "Konami", "Quarth (Japan)", 0 )
	339	GAME( 1989, blockhl, 0,       blockhl, blockhl, 0, ROT0, "Konami", "Block Hole", 0 )
	340	GAME( 1989, quarth,  blockhl, blockhl, blockhl, 0, ROT0, "Konami", "Quarth (Japan)", 0 )

src/mame/drivers/segag80v.c

r6740	r6741
139	139	#include "audio/segasnd.h"
140	140	#include "video/vector.h"
141	141	#include "includes/segag80r.h"
142		#include "segag80v.h"
	142	#include "includes/segag80v.h"
143	143
144	144
145	145	/*************************************

src/mame/drivers/bottom9.c

r6740	r6741
16	16	#include "cpu/z80/z80.h"
17	17	#include "deprecat.h"
18	18	#include "cpu/m6809/m6809.h"
19		#include "video/konamiic.h"
	19	#include "video/konicdev.h"
20	20	#include "sound/k007232.h"
21		#include "konamipt.h"
	21	#include "includes/konamipt.h"
22	22
23	23	extern int bottom9_video_enable;
24	24
25	25	VIDEO_START( bottom9 );
26	26	VIDEO_UPDATE( bottom9 );
27	27
	28	extern void bottom9_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	29	extern void bottom9_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
	30	extern void bottom9_zoom_callback(running_machine *machine, int *code,int *color,int *flags);
28	31
29	32
30	33	static INTERRUPT_GEN( bottom9_interrupt )
31	34	{
32		if (K052109_is_IRQ_enabled())
	35	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	36	if (k052109_is_irq_enabled(k052109))
33	37	cpu_set_input_line(device, 0, HOLD_LINE);
34	38	}
35	39
36	40
37		static int zoomreadroms,K052109_selected;
	41	static int zoomreadroms, k052109_selected;
38	42
	43	static READ8_HANDLER( k052109_051960_r )
	44	{
	45	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	46	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	47
	48	if (k052109_get_rmrd_line(k052109) == CLEAR_LINE)
	49	{
	50	if (offset >= 0x3800 && offset < 0x3808)
	51	return k051937_r(k051960, offset - 0x3800);
	52	else if (offset < 0x3c00)
	53	return k052109_r(k052109, offset);
	54	else
	55	return k051960_r(k051960, offset - 0x3c00);
	56	}
	57	else
	58	return k052109_r(k052109, offset);
	59	}
	60
	61	static WRITE8_HANDLER( k052109_051960_w )
	62	{
	63	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	64	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	65
	66	if (offset >= 0x3800 && offset < 0x3808)
	67	k051937_w(k051960, offset - 0x3800, data);
	68	else if (offset < 0x3c00)
	69	k052109_w(k052109, offset, data);
	70	else
	71	k051960_w(k051960, offset - 0x3c00, data);
	72	}
	73
39	74	static READ8_HANDLER( bottom9_bankedram1_r )
40	75	{
41		if (K052109_selected)
42		return K052109_051960_r(space,offset);
	76	const device_config *k051316 = devtag_get_device(space->machine, "k051316");
	77
	78	if (k052109_selected)
	79	return k052109_051960_r(space, offset);
43	80	else
44	81	{
45	82	if (zoomreadroms)
46		return K051316_rom_0_r(space,offset);
	83	return k051316_rom_r(k051316, offset);
47	84	else
48		return K051316_0_r(space,offset);
	85	return k051316_r(k051316,offset);
49	86	}
50	87	}
51	88
52	89	static WRITE8_HANDLER( bottom9_bankedram1_w )
53	90	{
54		if (K052109_selected) K052109_051960_w(space,offset,data);
55		else K051316_0_w(space,offset,data);
	91	const device_config *k051316 = devtag_get_device(space->machine, "k051316");
	92
	93	if (k052109_selected)
	94	k052109_051960_w(space, offset, data);
	95	else
	96	k051316_w(k051316, offset, data);
56	97	}
57	98
58	99	static READ8_HANDLER( bottom9_bankedram2_r )
59	100	{
60		if (K052109_selected) return K052109_051960_r(space,offset + 0x2000);
61		else return space->machine->generic.paletteram.u8[offset];
	101	if (k052109_selected)
	102	return k052109_051960_r(space, offset + 0x2000);
	103	else
	104	return space->machine->generic.paletteram.u8[offset];
62	105	}
63	106
64	107	static WRITE8_HANDLER( bottom9_bankedram2_w )
65	108	{
66		if (K052109_selected) K052109_051960_w(space,offset + 0x2000,data);
67		else paletteram_xBBBBBGGGGGRRRRR_be_w(space,offset,data);
	109	if (k052109_selected)
	110	k052109_051960_w(space, offset + 0x2000, data);
	111	else
	112	paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset, data);
68	113	}
69	114
70	115	static WRITE8_HANDLER( bankswitch_w )
r6740	r6741
73	118	int offs;
74	119
75	120	/* bit 0 = RAM bank */
76		if ((data & 1) == 0) popmessage("bankswitch RAM bank 0");
	121	if ((data & 1) == 0)
	122	popmessage("bankswitch RAM bank 0");
77	123
78	124	/* bit 1-4 = ROM bank */
79		if (data & 0x10) offs = 0x20000 + (data & 0x06) * 0x1000;
80		else offs = 0x10000 + (data & 0x0e) * 0x1000;
	125	if (data & 0x10)
	126	offs = 0x20000 + (data & 0x06) * 0x1000;
	127	else
	128	offs = 0x10000 + (data & 0x0e) * 0x1000;
	129
81	130	memory_set_bankptr(space->machine, "bank1",&RAM[offs]);
82	131	}
83	132
84	133	static WRITE8_HANDLER( bottom9_1f90_w )
85	134	{
	135	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	136
86	137	/* bits 0/1 = coin counters */
87		coin_counter_w(space->machine, 0,data & 0x01);
88		coin_counter_w(space->machine, 1,data & 0x02);
	138	coin_counter_w(space->machine, 0, data & 0x01);
	139	coin_counter_w(space->machine, 1, data & 0x02);
89	140
90	141	/* bit 2 = enable char ROM reading through the video RAM */
91		K052109_set_RMRD_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	142	k052109_set_rmrd_line(k052109, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
92	143
93	144	/* bit 3 = disable video */
94	145	bottom9_video_enable = ~data & 0x08;
r6740	r6741
97	148	zoomreadroms = data & 0x10;
98	149
99	150	/* bit 5 = RAM bank */
100		K052109_selected = data & 0x20;
	151	k052109_selected = data & 0x20;
101	152	}
102	153
103	154	static WRITE8_HANDLER( bottom9_sh_irqtrigger_w )
r6740	r6741
143	194	AM_RANGE(0x1fd2, 0x1fd2) AM_READ_PORT("P2")
144	195	AM_RANGE(0x1fd3, 0x1fd3) AM_READ_PORT("DSW1")
145	196	AM_RANGE(0x1fe0, 0x1fe0) AM_READ_PORT("DSW2")
146		AM_RANGE(0x1ff0, 0x1fff) AM_WRITE(K051316_ctrl_0_w)
	197	AM_RANGE(0x1ff0, 0x1fff) AM_DEVWRITE("k051316", k051316_ctrl_w)
147	198	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(bottom9_bankedram2_r, bottom9_bankedram2_w) AM_BASE_GENERIC(paletteram)
148		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
	199	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
149	200	AM_RANGE(0x4000, 0x5fff) AM_RAM
150	201	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
151	202	AM_RANGE(0x8000, 0xffff) AM_ROM
r6740	r6741
256	307
257	308
258	309
	310	static const k052109_interface bottom9_k052109_intf =
	311	{
	312	"gfx1", 0,
	313	NORMAL_PLANE_ORDER,
	314	KONAMI_ROM_DEINTERLEAVE_2,
	315	bottom9_tile_callback
	316	};
	317
	318	static const k051960_interface bottom9_k051960_intf =
	319	{
	320	"gfx2", 1,
	321	NORMAL_PLANE_ORDER,
	322	KONAMI_ROM_DEINTERLEAVE_2,
	323	bottom9_sprite_callback
	324	};
	325
	326	static const k051316_interface bottom9_k051316_intf =
	327	{
	328	"gfx3", 2,
	329	4, FALSE, 0,
	330	0, 0, 0,
	331	bottom9_zoom_callback
	332	};
	333
259	334	static MACHINE_DRIVER_START( bottom9 )
260	335
261	336	/* basic machine hardware */
r6740	r6741
282	357	MDRV_VIDEO_START(bottom9)
283	358	MDRV_VIDEO_UPDATE(bottom9)
284	359
	360	MDRV_K052109_ADD("k052109", bottom9_k052109_intf)
	361	MDRV_K051960_ADD("k051960", bottom9_k051960_intf)
	362	MDRV_K051316_ADD("k051316", bottom9_k051316_intf)
	363
285	364	/* sound hardware */
286	365	MDRV_SPEAKER_STANDARD_MONO("mono")
287	366
r6740	r6741
306	385	ROM_START( bottom9 )
307	386	ROM_REGION( 0x28000, "maincpu", 0 ) /* code + banked roms */
308	387	ROM_LOAD( "891n03.k17",   0x10000, 0x10000, CRC(8b083ff3) SHA1(045fef944b192e4bb147fa0f28680c0602af7377) )
309		ROM_LOAD( "891-t02.k15",  0x20000, 0x08000, CRC(2c10ced2) SHA1(ecd43825a67b495cade94a454c96a19143d87760) )
310		ROM_CONTINUE(             0x08000, 0x08000 )
	388	ROM_LOAD( "891-t02.k15",  0x20000, 0x08000, CRC(2c10ced2) SHA1(ecd43825a67b495cade94a454c96a19143d87760) )
	389	ROM_CONTINUE(             0x08000, 0x08000 )
311	390
312	391	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code */
313	392	ROM_LOAD( "891j01.g8",    0x0000, 0x8000, CRC(31b0a0a8) SHA1(8e047f81c19f25de97fa22e70dcfe9e06bfae699) )
r6740	r6741
363	442	ROM_START( bottom9n )
364	443	ROM_REGION( 0x28000, "maincpu", 0 ) /* code + banked roms */
365	444	ROM_LOAD( "891n03.k17",   0x10000, 0x10000, CRC(8b083ff3) SHA1(045fef944b192e4bb147fa0f28680c0602af7377) )
366		ROM_LOAD( "891n02.k15",   0x20000, 0x08000, CRC(d44d9ed4) SHA1(2a12bcfba81ab7e074569e2ad2da6a237a1c0ce5) )
367		ROM_CONTINUE(             0x08000, 0x08000 )
	445	ROM_LOAD( "891n02.k15",   0x20000, 0x08000, CRC(d44d9ed4) SHA1(2a12bcfba81ab7e074569e2ad2da6a237a1c0ce5) )
	446	ROM_CONTINUE(             0x08000, 0x08000 )
368	447
369	448	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code */
370	449	ROM_LOAD( "891j01.g8",    0x0000, 0x8000, CRC(31b0a0a8) SHA1(8e047f81c19f25de97fa22e70dcfe9e06bfae699) )
r6740	r6741
420	499	ROM_START( mstadium )
421	500	ROM_REGION( 0x28000, "maincpu", 0 ) /* code + banked roms */
422	501	ROM_LOAD( "891-403.k17",   0x10000, 0x10000, CRC(1c00c4e8) SHA1(8a3400a8df44f21616422e5af3bca84d0f390f63) )
423		ROM_LOAD( "891-402.k15",   0x20000, 0x08000, CRC(b850bbce) SHA1(a64300d1b1068e59eb59c427946c9bff164e2da8) )
424		ROM_CONTINUE(             0x08000, 0x08000 )
	502	ROM_LOAD( "891-402.k15",   0x20000, 0x08000, CRC(b850bbce) SHA1(a64300d1b1068e59eb59c427946c9bff164e2da8) )
	503	ROM_CONTINUE(             0x08000, 0x08000 )
425	504
426	505	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code */
427	506	ROM_LOAD( "891w01.g8",    0x0000, 0x8000, CRC(edec565a) SHA1(69cba0d00c6ef76c4ce2b553e3fd15de8abbbf31) )
r6740	r6741
476	555
477	556
478	557
479		static DRIVER_INIT( bottom9 )
480		{
481		konami_rom_deinterleave_2(machine, "gfx1");
482		konami_rom_deinterleave_2(machine, "gfx2");
483		}
484
485
486
487		GAME( 1989, bottom9,  0,       bottom9, bottom9,  bottom9, ROT0, "Konami", "Bottom of the Ninth (version T)", 0 )
488		GAME( 1989, bottom9n, bottom9, bottom9, bottom9,  bottom9, ROT0, "Konami", "Bottom of the Ninth (version N)", 0 )
489		GAME( 1989, mstadium, bottom9, bottom9, mstadium, bottom9, ROT0, "Konami", "Main Stadium (Japan)", 0 )
	558	GAME( 1989, bottom9,  0,       bottom9, bottom9,  0, ROT0, "Konami", "Bottom of the Ninth (version T)", 0 )
	559	GAME( 1989, bottom9n, bottom9, bottom9, bottom9,  0, ROT0, "Konami", "Bottom of the Ninth (version N)", 0 )
	560	GAME( 1989, mstadium, bottom9, bottom9, mstadium, 0, ROT0, "Konami", "Main Stadium (Japan)", 0 )

src/mame/drivers/m62.c

r6740	r6741
70	70	#include "driver.h"
71	71	#include "cpu/z80/z80.h"
72	72	#include "includes/iremz80.h"
73		#include "iremipt.h"
	73	#include "includes/iremipt.h"
74	74
75	75
76	76	/* Lode Runner 2 seems to have a simple protection on the bank switching */

src/mame/drivers/megazone.c

r6740	r6741
14	14	#include "sound/ay8910.h"
15	15	#include "sound/dac.h"
16	16	#include "sound/flt_rc.h"
17		#include "konamipt.h"
	17	#include "includes/konamipt.h"
18	18
19	19	extern UINT8 *megazone_scrollx;
20	20	extern UINT8 *megazone_scrolly;
21	21
	22	extern UINT8 *megazone_videoram;
22	23	extern UINT8 *megazone_videoram2;
	24	extern UINT8 *megazone_colorram;
23	25	extern UINT8 *megazone_colorram2;
	26	extern size_t megazone_videoram_size;
24	27	extern size_t megazone_videoram2_size;
25	28
26	29	static int i8039_status;
r6740	r6741
98	101	AM_RANGE(0x0800, 0x0800) AM_WRITE(watchdog_reset_w)
99	102	AM_RANGE(0x1000, 0x1000) AM_WRITEONLY AM_BASE(&megazone_scrolly)
100	103	AM_RANGE(0x1800, 0x1800) AM_WRITEONLY AM_BASE(&megazone_scrollx)
101		AM_RANGE(0x2000, 0x23ff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
	104	AM_RANGE(0x2000, 0x23ff) AM_RAM AM_BASE(&megazone_videoram) AM_SIZE(&megazone_videoram_size)
102	105	AM_RANGE(0x2400, 0x27ff) AM_RAM AM_BASE(&megazone_videoram2) AM_SIZE(&megazone_videoram2_size)
103		AM_RANGE(0x2800, 0x2bff) AM_RAM AM_BASE_GENERIC(colorram)
	106	AM_RANGE(0x2800, 0x2bff) AM_RAM AM_BASE(&megazone_colorram)
104	107	AM_RANGE(0x2c00, 0x2fff) AM_RAM AM_BASE(&megazone_colorram2)
105	108	AM_RANGE(0x3000, 0x33ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
106	109	AM_RANGE(0x3800, 0x3fff) AM_RAM AM_SHARE("share1")

src/mame/drivers/galaga.c

r6740	r6741
893	893	bosco_latch_w(space,i,0);
894	894	}
895	895
896		static MACHINE_RESET( bosco )
897		{
898		/* Reset all latches */
899		bosco_latch_reset(machine);
900
901		timer_adjust_oneshot(cpu3_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 64, 0), 64);
902		}
903
904	896	static MACHINE_RESET( galaga )
905	897	{
906	898	/* Reset all latches */
r6740	r6741
909	901	timer_adjust_oneshot(cpu3_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 64, 0), 64);
910	902	}
911	903
912		static MACHINE_RESET( xevious )
913		{
914		/* Reset all latches */
915		bosco_latch_reset(machine);
916
917		timer_adjust_oneshot(cpu3_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 64, 0), 64);
918		}
919
920	904	static MACHINE_RESET( battles )
921	905	{
922		/* Reset all latches */
923		bosco_latch_reset(machine);
924
	906	MACHINE_RESET_CALL(galaga);
925	907	battles_customio_init(machine);
926
927		timer_adjust_oneshot(cpu3_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 64, 0), 64);
928	908	}
929	909
930		static MACHINE_RESET( digdug )
931		{
932		/* Reset all latches */
933		bosco_latch_reset(machine);
934	910
935		timer_adjust_oneshot(cpu3_interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, 64, 0), 64);
936		}
937
938
939
940	911	/* the same memory map is used by all three CPUs; all RAM areas are shared */
941	912	static ADDRESS_MAP_START( bosco_map, ADDRESS_SPACE_PROGRAM, 8 )
942	913	AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP         /* the only area different for each CPU */
r6740	r6741
1635	1606	MDRV_QUANTUM_TIME(HZ(6000))   /* 100 CPU slices per frame - an high value to ensure proper */
1636	1607	/* synchronization of the CPUs */
1637	1608	MDRV_MACHINE_START(galaga)
1638		MDRV_MACHINE_RESET(bosco)
	1609	MDRV_MACHINE_RESET(galaga)
1639	1610
1640	1611	/* video hardware */
1641	1612	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
1758	1729	MDRV_QUANTUM_TIME(HZ(60000))   /* 1000 CPU slices per frame - an high value to ensure proper */
1759	1730	/* synchronization of the CPUs */
1760	1731	MDRV_MACHINE_START(galaga)
1761		MDRV_MACHINE_RESET(xevious)
	1732	MDRV_MACHINE_RESET(galaga)
1762	1733
1763	1734	/* video hardware */
1764	1735	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
1801	1772	MDRV_CPU_PROGRAM_MAP(battles_mem4)
1802	1773	MDRV_CPU_VBLANK_INT("screen", battles_interrupt_4)
1803	1774
	1775	MDRV_TIMER_ADD("battles_nmi", battles_nmi_generate)
	1776
1804	1777	MDRV_MACHINE_RESET(battles)
1805	1778
1806	1779	/* video hardware */
r6740	r6741
1837	1810	MDRV_QUANTUM_TIME(HZ(6000))   /* 100 CPU slices per frame - an high value to ensure proper */
1838	1811	/* synchronization of the CPUs */
1839	1812	MDRV_MACHINE_START(galaga)
1840		MDRV_MACHINE_RESET(digdug)
	1813	MDRV_MACHINE_RESET(galaga)
1841	1814
1842	1815	MDRV_ATARIVGEAROM_ADD("earom")
1843	1816

src/mame/drivers/macs.c

r6740	r6741
58	58	#include "driver.h"
59	59	#include "cpu/z80/z80.h"
60	60	#include "sound/st0016.h"
61		#include "st0016.h"
	61	#include "includes/st0016.h"
62	62
63	63
64	64

src/mame/drivers/sbowling.c

r6740	r6741
206	206
207	207	static INPUT_PORTS_START( sbowling )
208	208	PORT_START("IN0")
	209	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	210	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	211	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	212	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
209	213	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1   )
210	214	PORT_BIT( 0x20, IP_ACTIVE_HIGH,   IPT_TILT )
	215	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	216	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
211	217
212	218	PORT_START("IN1")
213	219	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
	220	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	221	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	222	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
	223	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 )
	224	PORT_BIT( 0x20, IP_ACTIVE_HIGH,   IPT_UNKNOWN )
214	225	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START1 )
215	226	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START2 )
216	227
r6740	r6741
221	232	PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE
222	233
223	234	PORT_START("DSW0")   /* coin slots: A 4 LSB, B 4 MSB */
224		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
225		PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
226		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
227		PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
228		PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
229		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
230		PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
231		PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
232		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
233		PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
234		PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
235		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
236		PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
237		PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
238		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
239		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
240		PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
241		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
242		PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
243		PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
244		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
245		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
246		PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
247		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	235	PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) )  PORT_DIPLOCATION("SW1:!1,!2,!3,!4")
	236	PORT_DIPSETTING(    0x0f, DEF_STR( 9C_1C ) )
	237	PORT_DIPSETTING(    0x0e, DEF_STR( 8C_1C ) )
	238	PORT_DIPSETTING(    0x0d, DEF_STR( 7C_1C ) )
	239	PORT_DIPSETTING(    0x0c, DEF_STR( 6C_1C ) )
	240	PORT_DIPSETTING(    0x0b, DEF_STR( 5C_1C ) )
	241	PORT_DIPSETTING(    0x0a, DEF_STR( 4C_1C ) )
	242	PORT_DIPSETTING(    0x09, DEF_STR( 3C_1C ) )
	243	PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
	244	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
	245	PORT_DIPSETTING(    0x01, DEF_STR( 1C_2C ) )
	246	PORT_DIPSETTING(    0x02, DEF_STR( 1C_3C ) )
	247	PORT_DIPSETTING(    0x03, DEF_STR( 1C_4C ) )
	248	PORT_DIPSETTING(    0x04, DEF_STR( 1C_5C ) )
	249	PORT_DIPSETTING(    0x05, DEF_STR( 1C_6C ) )
	250	PORT_DIPSETTING(    0x06, DEF_STR( 1C_7C ) )
	251	PORT_DIPSETTING(    0x07, DEF_STR( 1C_8C ) )
248	252
	253	PORT_DIPNAME( 0xf0, 0x00, DEF_STR( Coin_B ) )  PORT_DIPLOCATION("SW1:!5,!6,!7,!8")
	254	PORT_DIPSETTING(    0xf0, DEF_STR( 9C_1C ) )
	255	PORT_DIPSETTING(    0xe0, DEF_STR( 8C_1C ) )
	256	PORT_DIPSETTING(    0xd0, DEF_STR( 7C_1C ) )
	257	PORT_DIPSETTING(    0xc0, DEF_STR( 6C_1C ) )
	258	PORT_DIPSETTING(    0xb0, DEF_STR( 5C_1C ) )
	259	PORT_DIPSETTING(    0xa0, DEF_STR( 4C_1C ) )
	260	PORT_DIPSETTING(    0x90, DEF_STR( 3C_1C ) )
	261	PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
	262	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
	263	PORT_DIPSETTING(    0x10, DEF_STR( 1C_2C ) )
	264	PORT_DIPSETTING(    0x20, DEF_STR( 1C_3C ) )
	265	PORT_DIPSETTING(    0x30, DEF_STR( 1C_4C ) )
	266	PORT_DIPSETTING(    0x40, DEF_STR( 1C_5C ) )
	267	PORT_DIPSETTING(    0x50, DEF_STR( 1C_6C ) )
	268	PORT_DIPSETTING(    0x60, DEF_STR( 1C_7C ) )
	269	PORT_DIPSETTING(    0x70, DEF_STR( 1C_8C ) )
	270
249	271	PORT_START("DSW1")
250		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) )
	272	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) )  PORT_DIPLOCATION("SW2:!1")
251	273	PORT_DIPSETTING(    0x01, DEF_STR( Upright ) )
252	274	PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
253		PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
254		PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
255		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
256		PORT_DIPNAME( 0x04, 0x04, "Year Display" )
	275	PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x00, "SW2:!2" )
	276	PORT_DIPNAME( 0x04, 0x00, "Year Display" )  PORT_DIPLOCATION("SW2:!3")
257	277	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
258	278	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
259		PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
260		PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
261		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
262		PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
263		PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
264		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
265		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
266		PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
267		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
268		PORT_DIPNAME( 0x40, 0x00, "Ball Controll Check" )
	279	PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW2:!4" )
	280	PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x00, "SW2:!5" )
	281	PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "SW2:!6" )
	282	PORT_DIPNAME( 0x40, 0x00, "Ball Control Check" )  PORT_DIPLOCATION("SW2:!7")
269	283	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
270	284	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
271		PORT_DIPNAME( 0x80, 0x00, "Video Test" )
	285	PORT_DIPNAME( 0x80, 0x00, "Video Test" )  PORT_DIPLOCATION("SW2:!8")
272	286	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
273	287	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
274	288	INPUT_PORTS_END
r6740	r6741
330	344
331	345	static MACHINE_DRIVER_START( sbowling )
332	346
333		MDRV_CPU_ADD("maincpu", 8080, 19968000/10 )
	347	MDRV_CPU_ADD("maincpu", 8080, XTAL_19_968MHz/10)   /* ? */
334	348	MDRV_CPU_PROGRAM_MAP(main_map)
335	349	MDRV_CPU_IO_MAP(port_map)
336	350	MDRV_CPU_VBLANK_INT_HACK(sbw_interrupt, 2)
r6740	r6741
351	365	/* sound hardware */
352	366	MDRV_SPEAKER_STANDARD_MONO("mono")
353	367
354		MDRV_SOUND_ADD("aysnd", AY8910, 19968000 / 16)
355		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.12)
	368	MDRV_SOUND_ADD("aysnd", AY8910, XTAL_19_968MHz/16)   /* ? */
	369	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33)
356	370	MACHINE_DRIVER_END
357	371
358	372	ROM_START( sbowling )

src/mame/drivers/8080bw.c

r6740	r6741
89	89	#include "driver.h"
90	90	#include "cpu/m6800/m6800.h"
91	91	#include "cpu/i8085/i8085.h"
	92	#include "machine/mb14241.h"
92	93	#include "sound/speaker.h"
93	94	#include "deprecat.h"
94		#include "8080bw.h"
95		#include "mw8080bw.h"
96		#include "machine/mb14241.h"
	95	#include "includes/mw8080bw.h"
97	96
98	97	#include "invrvnge.lh"
99	98	#include "shuttlei.lh"
r6740	r6741
106	105
107	106	static MACHINE_START( extra_8080bw )
108	107	{
109		MACHINE_START_CALL(extra_8080bw_sh);
110		MACHINE_START_CALL(extra_8080bw_vh);
111		MACHINE_START_CALL(mw8080bw);
	108	MACHINE_START_CALL(extra_8080bw_sh);
	109	MACHINE_START_CALL(extra_8080bw_vh);
	110	MACHINE_START_CALL(mw8080bw);
112	111	}
113	112
114	113	/*******************************************************/
r6740	r6741
203	202	/*******************************************************/
204	203
205	204	static ADDRESS_MAP_START( invadpt2_io_map, ADDRESS_SPACE_IO, 8 )
206		AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
207		AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
208		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
209		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, invadpt2_sh_port_1_w)
210		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
211		AM_RANGE(0x05, 0x05) AM_WRITE(invadpt2_sh_port_2_w)
212		AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
	205	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
	206	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
	207	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	208	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(invadpt2_sh_port_1_w)
	209	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
	210	AM_RANGE(0x05, 0x05) AM_WRITE(invadpt2_sh_port_2_w)
	211	AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
213	212	ADDRESS_MAP_END
214	213
215	214	static INPUT_PORTS_START( invadpt2 )
r6740	r6741
240	239
241	240	static MACHINE_DRIVER_START( invadpt2 )
242	241
243		/* basic machine hardware */
244		MDRV_IMPORT_FROM(mw8080bw_root)
245		MDRV_CPU_MODIFY("maincpu")
246		MDRV_CPU_IO_MAP(invadpt2_io_map)
247		MDRV_MACHINE_START(extra_8080bw)
	242	/* basic machine hardware */
	243	MDRV_IMPORT_FROM(mw8080bw_root)
	244	MDRV_CPU_MODIFY("maincpu")
	245	MDRV_CPU_IO_MAP(invadpt2_io_map)
	246	MDRV_MACHINE_START(extra_8080bw)
248	247
249		/* 60 Hz signal clocks two LS161. Ripple carry will */
250		/* reset circuit, if LS161 not cleared before.      */
251		MDRV_WATCHDOG_VBLANK_INIT(255)
	248	/* 60 Hz signal clocks two LS161. Ripple carry will */
	249	/* reset circuit, if LS161 not cleared before.      */
	250	MDRV_WATCHDOG_VBLANK_INIT(255)
252	251
	252	/* add shifter */
	253	MDRV_MB14241_ADD("mb14241")
	254
253	255	/* video hardware */
254	256	MDRV_VIDEO_UPDATE(invadpt2)
255	257
256		/* sound hardware */
	258	/* sound hardware */
257	259	MDRV_IMPORT_FROM(invaders_samples_audio)
258	260
259	261	MACHINE_DRIVER_END
r6740	r6741
267	269	static ADDRESS_MAP_START( spcewars_io_map, ADDRESS_SPACE_IO, 8 )
268	270	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
269	271	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
270		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
271		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, spcewars_sh_port_w)
272		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	272	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	273	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(spcewars_sh_port_w)
	274	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
273	275	AM_RANGE(0x05, 0x05) AM_WRITE(invadpt2_sh_port_2_w)
274	276	ADDRESS_MAP_END
275	277
r6740	r6741
300	302	MDRV_IMPORT_FROM(mw8080bw_root)
301	303	MDRV_CPU_MODIFY("maincpu")
302	304	MDRV_CPU_IO_MAP(spcewars_io_map)
303		MDRV_MACHINE_START(extra_8080bw)
	305	MDRV_MACHINE_START(extra_8080bw)
304	306
	307	/* add shifter */
	308	MDRV_MB14241_ADD("mb14241")
	309
305	310	/* sound hardware */
306	311	MDRV_IMPORT_FROM(invaders_samples_audio)
307	312
r6740	r6741
368	373
369	374	static MACHINE_DRIVER_START( astropal )
370	375
371		/* basic machine hardware */
372		MDRV_IMPORT_FROM(invaders)
373		MDRV_CPU_MODIFY("maincpu")
	376	/* basic machine hardware */
	377	MDRV_IMPORT_FROM(invaders)
	378	MDRV_CPU_MODIFY("maincpu")
374	379	MDRV_CPU_IO_MAP(astropal_io_map)
375	380
376	381	MACHINE_DRIVER_END
r6740	r6741
383	388
384	389	static ADDRESS_MAP_START( cosmo_map, ADDRESS_SPACE_PROGRAM, 8 )
385	390	AM_RANGE(0x0000, 0x1fff) AM_ROM
386		AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
	391	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE_SIZE_MEMBER(mw8080bw_state, main_ram, main_ram_size)
387	392	AM_RANGE(0x4000, 0x57ff) AM_ROM
388		AM_RANGE(0x5c00, 0x5fff) AM_RAM AM_BASE(&c8080bw_colorram)
	393	AM_RANGE(0x5c00, 0x5fff) AM_RAM AM_BASE_MEMBER(mw8080bw_state, colorram)
389	394	ADDRESS_MAP_END
390	395
391	396	/* at least one of these MWA8_NOPs must be sound related */
r6740	r6741
393	398	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITENOP
394	399	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") AM_WRITENOP
395	400	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITENOP
396		AM_RANGE(0x03, 0x03) AM_WRITE(invadpt2_sh_port_1_w)
397		AM_RANGE(0x05, 0x05) AM_WRITE(cosmo_sh_port_2_w)
	401	AM_RANGE(0x03, 0x03) AM_WRITE(invadpt2_sh_port_1_w)
	402	AM_RANGE(0x05, 0x05) AM_WRITE(cosmo_sh_port_2_w)
398	403	AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
399	404	AM_RANGE(0x07, 0x07) AM_WRITENOP
400	405	ADDRESS_MAP_END
r6740	r6741
418	423
419	424	static MACHINE_DRIVER_START( cosmo )
420	425
421		/* basic machine hardware */
422		MDRV_IMPORT_FROM(mw8080bw_root)
423		MDRV_CPU_MODIFY("maincpu")
	426	/* basic machine hardware */
	427	MDRV_IMPORT_FROM(mw8080bw_root)
	428	MDRV_CPU_MODIFY("maincpu")
424	429	MDRV_CPU_PROGRAM_MAP(cosmo_map)
425	430	MDRV_CPU_IO_MAP(cosmo_io_map)
426		MDRV_MACHINE_START(extra_8080bw)
	431	MDRV_MACHINE_START(extra_8080bw)
427	432
428		/* video hardware */
	433	/* video hardware */
429	434	MDRV_VIDEO_UPDATE(cosmo)
430	435
431		/* sound hardware */
	436	/* sound hardware */
432	437	MDRV_IMPORT_FROM(invaders_samples_audio)
433	438
434	439	MACHINE_DRIVER_END
r6740	r6741
492	497	static ADDRESS_MAP_START( invrvnge_io_map, ADDRESS_SPACE_IO, 8 )
493	498	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
494	499	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
495		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
496		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, invrvnge_sh_port_w)
497		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	500	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	501	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(invrvnge_sh_port_w)
	502	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
498	503	ADDRESS_MAP_END
499	504
500	505
r6740	r6741
546	551	MDRV_CPU_MODIFY("maincpu")
547	552	MDRV_CPU_IO_MAP(invrvnge_io_map)
548	553
	554	/* add shifter */
	555	MDRV_MB14241_ADD("mb14241")
	556
549	557	/* sound hardware */
550	558	MDRV_IMPORT_FROM(invaders_samples_audio)
551	559
r6740	r6741
573	581	PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x00, "SW1:1" )
574	582	PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x00, "SW1:2" )
575	583	PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW1:3" )
576		PORT_DIPNAME( 0x80, 0x00, DEF_STR(Coinage) )      PORT_DIPLOCATION("SW1:8")
577		PORT_DIPSETTING(    0x00, "1 Coin/1 Or 2 Players" )
578		PORT_DIPSETTING(    0x80, "1 Coin/1 Player  2 Coins/2 Players" )   /* Irrelevant, causes bugs */
	584	PORT_DIPNAME( 0x80, 0x00, DEF_STR(Coinage) )      PORT_DIPLOCATION("SW1:8")
	585	PORT_DIPSETTING(    0x00, "1 Coin/1 Or 2 Players" )
	586	PORT_DIPSETTING(    0x80, "1 Coin/1 Player  2 Coins/2 Players" )   /* Irrelevant, causes bugs */
579	587
580	588	/* Dummy port for cocktail mode (not used) */
581	589	PORT_MODIFY(CABINET_PORT_TAG)
r6740	r6741
623	631	static ADDRESS_MAP_START( lrescue_io_map, ADDRESS_SPACE_IO, 8 )
624	632	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
625	633	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
626		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
627		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, lrescue_sh_port_1_w)
628		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	634	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	635	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(lrescue_sh_port_1_w)
	636	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
629	637	AM_RANGE(0x05, 0x05) AM_WRITE(lrescue_sh_port_2_w)
630	638	ADDRESS_MAP_END
631	639
r6740	r6741
648	656	MDRV_IMPORT_FROM(mw8080bw_root)
649	657	MDRV_CPU_MODIFY("maincpu")
650	658	MDRV_CPU_IO_MAP(lrescue_io_map)
651		MDRV_MACHINE_START(extra_8080bw)
	659	MDRV_MACHINE_START(extra_8080bw)
652	660
	661	/* add shifter */
	662	MDRV_MB14241_ADD("mb14241")
	663
653	664	/* video hardware */
654	665	MDRV_VIDEO_UPDATE(invadpt2)
655	666
r6740	r6741
753	764
754	765	static ADDRESS_MAP_START( rollingc_map, ADDRESS_SPACE_PROGRAM, 8 )
755	766	AM_RANGE(0x0000, 0x1fff) AM_ROM
756		AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
	767	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE_SIZE_MEMBER(mw8080bw_state, main_ram, main_ram_size)
757	768	AM_RANGE(0x4000, 0x5fff) AM_ROM
758		AM_RANGE(0xa000, 0xbfff) AM_MIRROR(0x00e0) AM_RAM AM_BASE(&c8080bw_colorram)
	769	AM_RANGE(0xa000, 0xbfff) AM_MIRROR(0x00e0) AM_RAM AM_BASE_MEMBER(mw8080bw_state, colorram)
759	770	AM_RANGE(0xe400, 0xffff) AM_RAM
760	771	ADDRESS_MAP_END
761	772
r6740	r6741
763	774	static ADDRESS_MAP_START( rollingc_io_map, ADDRESS_SPACE_IO, 8 )
764	775	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(rollingc_sh_port_w)
765	776	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
766		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
767		AM_RANGE(0x03, 0x03) AM_READ(mb14241_0_shift_result_r)
768		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	777	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	778	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r)
	779	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
769	780	ADDRESS_MAP_END
770	781
771	782
r6740	r6741
795	806	MDRV_CPU_PROGRAM_MAP(rollingc_map)
796	807	MDRV_CPU_IO_MAP(rollingc_io_map)
797	808
	809	/* add shifter */
	810	MDRV_MB14241_ADD("mb14241")
	811
798	812	/* video hardware */
799	813	MDRV_VIDEO_UPDATE(rollingc)
800	814
r6740	r6741
813	827
814	828	static ADDRESS_MAP_START( schaser_map, ADDRESS_SPACE_PROGRAM, 8 )
815	829	AM_RANGE(0x0000, 0x1fff) AM_ROM
816		AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
	830	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE_SIZE_MEMBER(mw8080bw_state, main_ram, main_ram_size)
817	831	AM_RANGE(0x4000, 0x5fff) AM_ROM
818		AM_RANGE(0xc000, 0xdfff) AM_MIRROR(0x0060) AM_RAM AM_BASE(&c8080bw_colorram)
	832	AM_RANGE(0xc000, 0xdfff) AM_MIRROR(0x0060) AM_RAM AM_BASE_MEMBER(mw8080bw_state, colorram)
819	833	ADDRESS_MAP_END
820	834
821	835
822	836	static ADDRESS_MAP_START( schaser_io_map, ADDRESS_SPACE_IO, 8 )
823	837	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
824	838	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
825		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
826		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, schaser_sh_port_1_w)
827		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	839	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	840	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(schaser_sh_port_1_w)
	841	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
828	842	AM_RANGE(0x05, 0x05) AM_WRITE(schaser_sh_port_2_w)
829	843	AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
830	844	ADDRESS_MAP_END
r6740	r6741
886	900	PORT_ADJUSTER( 70, "VR3 - Dot Volume" )
887	901	INPUT_PORTS_END
888	902
	903	MACHINE_START( schaser )
	904	{
	905	MACHINE_START_CALL(schaser_sh);
	906	MACHINE_START_CALL(extra_8080bw_vh);
	907	MACHINE_START_CALL(mw8080bw);
	908	}
	909
	910	MACHINE_RESET( schaser )
	911	{
	912	MACHINE_RESET_CALL(schaser_sh);
	913	MACHINE_RESET_CALL(mw8080bw);
	914	}
	915
889	916	static MACHINE_DRIVER_START( schaser )
890	917
891	918	/* basic machine hardware */
892	919	MDRV_IMPORT_FROM(mw8080bw_root)
893		MDRV_CPU_REPLACE("maincpu",8080,1996800)        /* 19.968MHz / 10 */
	920	MDRV_CPU_REPLACE("maincpu",8080,1996800)       /* 19.968MHz / 10 */
894	921	MDRV_CPU_PROGRAM_MAP(schaser_map)
895	922	MDRV_CPU_IO_MAP(schaser_io_map)
896	923	MDRV_WATCHDOG_VBLANK_INIT(255)
897	924	MDRV_MACHINE_START(schaser)
898	925	MDRV_MACHINE_RESET(schaser)
899	926
	927	/* add shifter */
	928	MDRV_MB14241_ADD("mb14241")
	929
900	930	/* video hardware */
901	931	MDRV_VIDEO_UPDATE(schaser)
902	932
r6740	r6741
923	953	static ADDRESS_MAP_START( schasrcv_io_map, ADDRESS_SPACE_IO, 8 )
924	954	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
925	955	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
926		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
927		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, schasrcv_sh_port_1_w)
928		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	956	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	957	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(schasrcv_sh_port_1_w)
	958	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
929	959	AM_RANGE(0x05, 0x05) AM_WRITE(schasrcv_sh_port_2_w)
930	960	ADDRESS_MAP_END
931	961
r6740	r6741
961	991	MDRV_CPU_MODIFY("maincpu")
962	992	MDRV_CPU_PROGRAM_MAP(schaser_map)
963	993	MDRV_CPU_IO_MAP(schasrcv_io_map)
964		MDRV_MACHINE_START(extra_8080bw)
	994	MDRV_MACHINE_START(extra_8080bw)
965	995
	996	/* add shifter */
	997	MDRV_MB14241_ADD("mb14241")
	998
966	999	/* video hardware */
967	1000	MDRV_VIDEO_UPDATE(schasrcv)
968	1001
r6740	r6741
981	1014	/*                                                     */
982	1015	/*******************************************************/
983	1016
984		static UINT8 sfl_int = 0;
985
986	1017	static CUSTOM_INPUT( sflush_80_r )
987	1018	{
988		sfl_int ^= 1;   /* vblank flag ? */
	1019	mw8080bw_state *state = (mw8080bw_state *)field->port->machine->driver_data;
	1020	state->sfl_int ^= 1;   /* vblank flag ? */
989	1021
990		return sfl_int;
	1022	return state->sfl_int;
991	1023	}
992	1024
993	1025	static MACHINE_START( sflush )
994	1026	{
995		state_save_register_global(machine, sfl_int);
	1027	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	1028	state_save_register_global(machine, state->sfl_int);
996	1029
997		MACHINE_START_CALL(mw8080bw);
	1030	MACHINE_START_CALL(mw8080bw);
998	1031	}
999	1032
1000	1033	static ADDRESS_MAP_START( sflush_map, ADDRESS_SPACE_PROGRAM, 8 )
1001	1034	AM_RANGE(0x0000, 0x1fff) AM_RAM
1002		AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
	1035	AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE_SIZE_MEMBER(mw8080bw_state, main_ram, main_ram_size)
1003	1036	AM_RANGE(0x8008, 0x8008) AM_READ_PORT("PADDLE")
1004		AM_RANGE(0x8009, 0x8009) AM_READ(mb14241_0_shift_result_r)
	1037	AM_RANGE(0x8009, 0x8009) AM_DEVREAD("mb14241", mb14241_shift_result_r)
1005	1038	AM_RANGE(0x800a, 0x800a) AM_READ_PORT("IN2")
1006	1039	AM_RANGE(0x800b, 0x800b) AM_READ_PORT("IN0")
1007		AM_RANGE(0x8018, 0x8018) AM_WRITE(mb14241_0_shift_data_w)
1008		AM_RANGE(0x8019, 0x8019) AM_WRITE(mb14241_0_shift_count_w)
	1040	AM_RANGE(0x8018, 0x8018) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
	1041	AM_RANGE(0x8019, 0x8019) AM_DEVWRITE("mb14241", mb14241_shift_count_w)
1009	1042	AM_RANGE(0x801a, 0x801a) AM_WRITENOP
1010	1043	AM_RANGE(0x801c, 0x801c) AM_WRITENOP
1011	1044	AM_RANGE(0x801d, 0x801d) AM_WRITENOP
1012		AM_RANGE(0xa000, 0xbfff) AM_MIRROR(0x0060) AM_RAM AM_BASE(&c8080bw_colorram)
	1045	AM_RANGE(0xa000, 0xbfff) AM_MIRROR(0x0060) AM_RAM AM_BASE_MEMBER(mw8080bw_state, colorram)
1013	1046	AM_RANGE(0xd800, 0xffff) AM_ROM
1014	1047	ADDRESS_MAP_END
1015	1048
1016		static MACHINE_DRIVER_START( sflush )
1017	1049
1018		/* basic machine hardware */
1019		MDRV_IMPORT_FROM(mw8080bw_root)
1020		MDRV_CPU_REPLACE("maincpu",M6800,2000000)        /* ?? */
1021		MDRV_CPU_PROGRAM_MAP(sflush_map)
1022		MDRV_CPU_VBLANK_INT_HACK(irq0_line_pulse,2)
1023		MDRV_MACHINE_START(sflush)
1024
1025		/* video hardware */
1026		MDRV_VIDEO_UPDATE(sflush)
1027
1028		MACHINE_DRIVER_END
1029
1030	1050	static INPUT_PORTS_START( sflush )
1031	1051	PORT_START("IN0")
1032	1052	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
r6740	r6741
1056	1076	INPUT_PORTS_END
1057	1077
1058	1078
	1079	static MACHINE_DRIVER_START( sflush )
1059	1080
	1081	/* basic machine hardware */
	1082	MDRV_IMPORT_FROM(mw8080bw_root)
	1083	MDRV_CPU_REPLACE("maincpu",M6800,2000000)       /* ?? */
	1084	MDRV_CPU_PROGRAM_MAP(sflush_map)
	1085	MDRV_CPU_VBLANK_INT_HACK(irq0_line_pulse,2)
	1086	MDRV_MACHINE_START(sflush)
	1087
	1088	/* add shifter */
	1089	MDRV_MB14241_ADD("mb14241")
	1090
	1091	/* video hardware */
	1092	MDRV_VIDEO_UPDATE(sflush)
	1093
	1094	MACHINE_DRIVER_END
	1095
	1096
1060	1097	/*******************************************************/
1061	1098	/*                                                     */
1062	1099	/* Taito "Lupin III"                                   */
r6740	r6741
1066	1103	static ADDRESS_MAP_START( lupin3_io_map, ADDRESS_SPACE_IO, 8 )
1067	1104	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
1068	1105	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
1069		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
1070		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, lupin3_sh_port_1_w)
1071		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	1106	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1107	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(lupin3_sh_port_1_w)
	1108	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1072	1109	AM_RANGE(0x05, 0x05) AM_WRITE(lupin3_sh_port_2_w)
1073	1110	AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
1074	1111	ADDRESS_MAP_END
r6740	r6741
1153	1190	MDRV_IMPORT_FROM(mw8080bw_root)
1154	1191	MDRV_CPU_MODIFY("maincpu")
1155	1192	MDRV_CPU_IO_MAP(lupin3_io_map)
1156		MDRV_MACHINE_START(extra_8080bw)
	1193	MDRV_MACHINE_START(extra_8080bw)
1157	1194
	1195	/* add shifter */
	1196	MDRV_MB14241_ADD("mb14241")
	1197
1158	1198	/* video hardware */
1159	1199	MDRV_VIDEO_UPDATE(indianbt)
1160	1200
r6740	r6741
1170	1210	MDRV_CPU_MODIFY("maincpu")
1171	1211	MDRV_CPU_PROGRAM_MAP(schaser_map)
1172	1212	MDRV_CPU_IO_MAP(lupin3_io_map)
1173		MDRV_MACHINE_START(extra_8080bw)
	1213	MDRV_MACHINE_START(extra_8080bw)
1174	1214
	1215	/* add shifter */
	1216	MDRV_MB14241_ADD("mb14241")
	1217
1175	1218	/* video hardware */
1176	1219	MDRV_VIDEO_UPDATE(lupin3)
1177	1220
r6740	r6741
1187	1230	/*                                                     */
1188	1231	/*******************************************************/
1189	1232
1190		static UINT8 polaris_cloud_speed;
1191		static UINT8 polaris_cloud_pos;
1192
1193
1194	1233	static INTERRUPT_GEN( polaris_interrupt )
1195	1234	{
1196		polaris_cloud_speed++;
	1235	mw8080bw_state *state = (mw8080bw_state *)device->machine->driver_data;
	1236	state->polaris_cloud_speed++;
1197	1237
1198		if (polaris_cloud_speed >= 4)   /* every 4 frames - this was verified against real machine */
	1238	if (state->polaris_cloud_speed >= 4)   /* every 4 frames - this was verified against real machine */
1199	1239	{
1200		polaris_cloud_speed = 0;
1201
1202		polaris_cloud_pos++;
	1240	state->polaris_cloud_speed = 0;
	1241	state->polaris_cloud_pos++;
1203	1242	}
1204	1243	}
1205	1244
1206
1207		UINT8 polaris_get_cloud_pos(void)
1208		{
1209		return polaris_cloud_pos;
1210		}
1211
1212	1245	static MACHINE_START( polaris )
1213	1246	{
1214		state_save_register_global(machine, polaris_cloud_speed);
1215		state_save_register_global(machine, polaris_cloud_pos);
	1247	mw8080bw_state *state = (mw8080bw_state *)machine->driver_data;
	1248	state_save_register_global(machine, state->polaris_cloud_speed);
	1249	state_save_register_global(machine, state->polaris_cloud_pos);
1216	1250
1217		MACHINE_START_CALL(mw8080bw);
	1251	MACHINE_START_CALL(mw8080bw);
1218	1252	}
1219	1253
1220	1254	// Port 5 is used to reset the watchdog timer.
r6740	r6741
1224	1258	// It sounds better then the actual circuit used.
1225	1259	// Probably an unfinished feature.
1226	1260	static ADDRESS_MAP_START( polaris_io_map, ADDRESS_SPACE_IO, 8 )
1227		AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(mb14241_0_shift_count_w)
	1261	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
1228	1262	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
1229	1263	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("discrete", polaris_sh_port_1_w)
1230		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, mb14241_0_shift_data_w)
	1264	AM_RANGE(0x03, 0x03) AM_DEVREADWRITE("mb14241", mb14241_shift_result_r, mb14241_shift_data_w)
1231	1265	AM_RANGE(0x04, 0x04) AM_DEVWRITE("discrete", polaris_sh_port_2_w)
1232	1266	AM_RANGE(0x05, 0x05) AM_WRITE(watchdog_reset_w)
1233	1267	AM_RANGE(0x06, 0x06) AM_DEVWRITE("discrete", polaris_sh_port_3_w)
r6740	r6741
1292	1326
1293	1327	/* basic machine hardware */
1294	1328	MDRV_IMPORT_FROM(mw8080bw_root)
1295		MDRV_CPU_REPLACE("maincpu",8080,1996800)        /* 19.968MHz / 10 */
	1329	MDRV_CPU_REPLACE("maincpu",8080,1996800)       /* 19.968MHz / 10 */
1296	1330	MDRV_CPU_PROGRAM_MAP(schaser_map)
1297	1331	MDRV_CPU_IO_MAP(polaris_io_map)
1298	1332	MDRV_WATCHDOG_VBLANK_INIT(255)
1299	1333	MDRV_CPU_VBLANK_INT("screen", polaris_interrupt)
1300		MDRV_MACHINE_START(polaris)
	1334	MDRV_MACHINE_START(polaris)
1301	1335
	1336	/* add shifter */
	1337	MDRV_MB14241_ADD("mb14241")
	1338
1302	1339	/* video hardware */
1303	1340	MDRV_VIDEO_UPDATE(polaris)
1304	1341
r6740	r6741
1396	1433	static ADDRESS_MAP_START( ballbomb_io_map, ADDRESS_SPACE_IO, 8 )
1397	1434	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
1398	1435	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
1399		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
1400		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, ballbomb_sh_port_1_w)
1401		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	1436	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1437	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(ballbomb_sh_port_1_w)
	1438	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1402	1439	AM_RANGE(0x05, 0x05) AM_WRITE(ballbomb_sh_port_2_w)
1403	1440	ADDRESS_MAP_END
1404	1441
r6740	r6741
1420	1457	MDRV_IMPORT_FROM(mw8080bw_root)
1421	1458	MDRV_CPU_MODIFY("maincpu")
1422	1459	MDRV_CPU_IO_MAP(ballbomb_io_map)
1423		MDRV_MACHINE_START(extra_8080bw)
	1460	MDRV_MACHINE_START(extra_8080bw)
1424	1461
	1462	/* add shifter */
	1463	MDRV_MB14241_ADD("mb14241")
	1464
1425	1465	/* video hardware */
1426	1466	MDRV_VIDEO_UPDATE(ballbomb)
1427	1467
r6740	r6741
1439	1479
1440	1480	static ADDRESS_MAP_START( yosakdon_map, ADDRESS_SPACE_PROGRAM, 8 )
1441	1481	AM_RANGE(0x0000, 0x1fff) AM_ROM
1442		AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
	1482	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE_SIZE_MEMBER(mw8080bw_state, main_ram, main_ram_size)
1443	1483	AM_RANGE(0x4000, 0x43ff) AM_WRITEONLY /* what's this? */
1444	1484	ADDRESS_MAP_END
1445	1485
r6740	r6741
1495	1535	MDRV_CPU_MODIFY("maincpu")
1496	1536	MDRV_CPU_PROGRAM_MAP(yosakdon_map)
1497	1537	MDRV_CPU_IO_MAP(yosakdon_io_map)
1498		MDRV_MACHINE_START(extra_8080bw)
	1538	MDRV_MACHINE_START(extra_8080bw)
1499	1539
1500	1540	/* sound hardware */
1501	1541	MDRV_IMPORT_FROM(invaders_samples_audio)
r6740	r6741
1577	1617	static ADDRESS_MAP_START( indianbt_io_map, ADDRESS_SPACE_IO, 8 )
1578	1618	AM_RANGE(0x00, 0x00) AM_READ(indianbt_r)
1579	1619	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN0")
1580		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
1581		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, indianbt_sh_port_1_w)
1582		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	1620	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1621	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(indianbt_sh_port_1_w)
	1622	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1583	1623	AM_RANGE(0x05, 0x05) AM_WRITE(indianbt_sh_port_2_w)
1584	1624	AM_RANGE(0x06, 0x06) AM_WRITENOP /* sound ? */
1585	1625	AM_RANGE(0x07, 0x07) AM_DEVWRITE("discrete", indianbt_sh_port_3_w)
r6740	r6741
1592	1632	MDRV_IMPORT_FROM(mw8080bw_root)
1593	1633	MDRV_CPU_MODIFY("maincpu")
1594	1634	MDRV_CPU_IO_MAP(indianbt_io_map)
1595		MDRV_MACHINE_START(extra_8080bw)
	1635	MDRV_MACHINE_START(extra_8080bw)
1596	1636
	1637	/* add shifter */
	1638	MDRV_MB14241_ADD("mb14241")
	1639
1597	1640	/* video hardware */
1598	1641	MDRV_VIDEO_UPDATE(indianbt)
1599	1642
r6740	r6741
1619	1662
1620	1663	static ADDRESS_MAP_START( steelwkr_io_map, ADDRESS_SPACE_IO, 8 )
1621	1664	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
1622		AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_WRITE(mb14241_0_shift_count_w)
1623		AM_RANGE(0x03, 0x03) AM_READWRITE(mb14241_0_shift_result_r, invadpt2_sh_port_1_w)
1624		AM_RANGE(0x04, 0x04) AM_WRITE(mb14241_0_shift_data_w)
	1665	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_DEVWRITE("mb14241", mb14241_shift_count_w)
	1666	AM_RANGE(0x03, 0x03) AM_DEVREAD("mb14241", mb14241_shift_result_r) AM_WRITE(invadpt2_sh_port_1_w)
	1667	AM_RANGE(0x04, 0x04) AM_DEVWRITE("mb14241", mb14241_shift_data_w)
1625	1668	AM_RANGE(0x05, 0x05) AM_WRITE(invadpt2_sh_port_2_w)
1626	1669	AM_RANGE(0x06, 0x06) AM_WRITE(steelwkr_sh_port_3_w)
1627	1670	ADDRESS_MAP_END
r6740	r6741
1665	1708	MDRV_CPU_IO_MAP(steelwkr_io_map)
1666	1709	MDRV_MACHINE_START(extra_8080bw)
1667	1710
	1711	/* add shifter */
	1712	MDRV_MB14241_ADD("mb14241")
	1713
1668	1714	/* video hardware */
1669	1715	MDRV_VIDEO_UPDATE(invadpt2)
1670	1716
r6740	r6741
1776	1822
1777	1823	static ADDRESS_MAP_START( shuttlei_map, ADDRESS_SPACE_PROGRAM, 8 )
1778	1824	AM_RANGE(0x0000, 0x1fff) AM_ROM
1779		AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
	1825	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE_SIZE_MEMBER(mw8080bw_state, main_ram, main_ram_size)
1780	1826	AM_RANGE(0x4000, 0x43ff) AM_RAM AM_SHARE("share1") // shuttlei
1781	1827	AM_RANGE(0x6000, 0x63ff) AM_RAM AM_SHARE("share1") // skylove (is it mirrored, or different PCB hookup?)
1782	1828	ADDRESS_MAP_END
r6740	r6741
1797	1843	MDRV_CPU_MODIFY("maincpu")
1798	1844	MDRV_CPU_PROGRAM_MAP(shuttlei_map)
1799	1845	MDRV_CPU_IO_MAP(shuttlei_io_map)
1800		MDRV_MACHINE_START(extra_8080bw)
	1846	MDRV_MACHINE_START(extra_8080bw)
1801	1847
1802	1848	/* video hardware */
1803	1849	MDRV_SCREEN_MODIFY("screen")
r6740	r6741
1851	1897	static ADDRESS_MAP_START( darthvdr_map, ADDRESS_SPACE_PROGRAM, 8 )
1852	1898	AM_RANGE(0x0000, 0x17ff) AM_ROM
1853	1899	AM_RANGE(0x1800, 0x1fff) AM_RAM
1854		AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE(&mw8080bw_ram) AM_SIZE(&mw8080bw_ram_size)
	1900	AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE_SIZE_MEMBER(mw8080bw_state, main_ram, main_ram_size)
1855	1901	ADDRESS_MAP_END
1856	1902
1857	1903	static ADDRESS_MAP_START( darthvdr_io_map, ADDRESS_SPACE_IO, 8 )
r6740	r6741
1881	1927	PORT_START("P2")
1882	1928	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START2 )
1883	1929	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
1884		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
1885		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2)
	1930	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
	1931	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2)
1886	1932	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1887	1933	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
1888	1934	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r6740	r6741
1902	1948
1903	1949	static MACHINE_DRIVER_START( darthvdr )
1904	1950
1905		/* basic machine hardware */
	1951	/* basic machine hardware */
1906	1952	MDRV_IMPORT_FROM(mw8080bw_root)
1907	1953	MDRV_CPU_MODIFY("maincpu")
1908	1954	MDRV_CPU_PROGRAM_MAP(darthvdr_map)
r6740	r6741
2809	2855	GAME( 1980, lupin3a,  lupin3,   lupin3a,  lupin3a,  0, ROT270, "Taito", "Lupin III (set 2)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
2810	2856	GAME( 1980, polaris,  0,        polaris,  polaris,  0, ROT270, "Taito", "Polaris (set 1)", GAME_SUPPORTS_SAVE )
2811	2857	GAME( 1980, polarisa, polaris,  polaris,  polaris,  0, ROT270, "Taito", "Polaris (set 2)", GAME_SUPPORTS_SAVE )
2812		GAME( 1980, ballbomb, 0,        ballbomb, ballbomb, 0, ROT270, "Taito", "Balloon Bomber", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )    /* missing clouds */
	2858	GAME( 1980, ballbomb, 0,        ballbomb, ballbomb, 0, ROT270, "Taito", "Balloon Bomber", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )   /* missing clouds */
2813	2859	GAME( 1980, indianbt, 0,        indianbt, indianbt, 0, ROT270, "Taito", "Indian Battle", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
2814	2860	GAME( 1980, steelwkr, 0,        steelwkr, steelwkr, 0, ROT0  , "Taito", "Steel Worker", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
2815	2861

src/mame/drivers/othunder.c

r6740	r6741
232	232
233	233	#include "driver.h"
234	234	#include "cpu/z80/z80.h"
235		#include "taitoipt.h"
	235	#include "includes/taitoipt.h"
236	236	#include "cpu/m68000/m68000.h"
237	237	#include "machine/eeprom.h"
238	238	#include "video/taitoic.h"

src/mame/drivers/quasar.c

r6740	r6741
58	58	************************************************************************/
59	59
60	60	#include "driver.h"
61		#include "cvs.h"
62	61	#include "cpu/s2650/s2650.h"
63	62	#include "cpu/mcs48/mcs48.h"
64	63	#include "sound/dac.h"
65	64	#include "video/s2636.h"
	65	#include "includes/cvs.h"
66	66
67
68		PALETTE_INIT( quasar );
69		VIDEO_UPDATE( quasar );
70		VIDEO_START( quasar );
71
72
73		extern UINT8 *quasar_effectram;
74		extern UINT8 quasar_effectcontrol;
75
76		static UINT8 page = 0;
77		static UINT8 IOpage;
78
79
80	67	/************************************************************************
81	68
82	69	Quasar memory layout
r6740	r6741
89	76
90	77	static WRITE8_HANDLER( video_page_select_w )
91	78	{
92		page = offset & 0x03;
	79	cvs_state *state = (cvs_state *)space->machine->driver_data;
	80	state->page = offset & 0x03;
93	81	}
94	82
95	83	static WRITE8_HANDLER( io_page_select_w )
96	84	{
97		IOpage = offset & 0x03;
	85	cvs_state *state = (cvs_state *)space->machine->driver_data;
	86	state->io_page = offset & 0x03;
98	87	}
99	88
100	89	static WRITE8_HANDLER( quasar_video_w )
101	90	{
102		switch (page)
	91	cvs_state *state = (cvs_state *)space->machine->driver_data;
	92
	93	switch (state->page)
103	94	{
104		case 0:  cvs_video_ram[offset] = data; break;
105		case 1:  cvs_color_ram[offset] = data & 7; break;   // 3 bits of ram only - 3 x 2102
106		case 2:  quasar_effectram[offset] = data; break;
107		case 3:  quasar_effectcontrol = data; break;
	95	case 0:  state->video_ram[offset] = data; break;
	96	case 1:  state->color_ram[offset] = data & 7; break;   // 3 bits of ram only - 3 x 2102
	97	case 2:  state->effectram[offset] = data; break;
	98	case 3:  state->effectcontrol = data; break;
108	99	}
109	100	}
110	101
111	102	static READ8_HANDLER( quasar_IO_r )
112	103	{
	104	cvs_state *state = (cvs_state *)space->machine->driver_data;
113	105	UINT8 ans = 0;
114	106
115		if (IOpage == 0) ans = input_port_read(space->machine, "IN0");
116		if (IOpage == 1) ans = input_port_read(space->machine, "IN1");
117		if (IOpage == 2) ans = input_port_read(space->machine, "DSW0");
118		if (IOpage == 3) ans = input_port_read(space->machine, "DSW1");
	107	switch (state->io_page)
	108	{
	109	case 0:  ans = input_port_read(space->machine, "IN0"); break;
	110	case 1:  ans = input_port_read(space->machine, "IN1"); break;
	111	case 2:  ans = input_port_read(space->machine, "DSW0"); break;
	112	case 3:  ans = input_port_read(space->machine, "DSW1"); break;
	113	}
119	114
120	115	return ans;
121	116	}
122	117
123	118	static WRITE8_HANDLER( quasar_bullet_w )
124	119	{
125		cvs_bullet_ram[offset] = (data ^ 0xff);
	120	cvs_state *state = (cvs_state *)space->machine->driver_data;
	121	state->bullet_ram[offset] = (data ^ 0xff);
126	122	}
127	123
128		//static int sh_page=0;
129
130	124	static WRITE8_HANDLER( quasar_sh_command_w )
131	125	{
132	126	// bit 4 = Sound Invader : Linked to an NE555V circuit
r6740	r6741
152	146
153	147	static ADDRESS_MAP_START( quasar, ADDRESS_SPACE_PROGRAM, 8 )
154	148	AM_RANGE(0x0000, 0x13ff) AM_ROM
155		AM_RANGE(0x1400, 0x14ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_bullet_ram_or_palette_r, quasar_bullet_w) AM_BASE(&cvs_bullet_ram)
	149	AM_RANGE(0x1400, 0x14ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_bullet_ram_or_palette_r, quasar_bullet_w) AM_BASE_MEMBER(cvs_state, bullet_ram)
156	150	AM_RANGE(0x1500, 0x15ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_s2636_0_or_character_ram_r, cvs_s2636_0_or_character_ram_w)
157	151	AM_RANGE(0x1600, 0x16ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_s2636_1_or_character_ram_r, cvs_s2636_1_or_character_ram_w)
158	152	AM_RANGE(0x1700, 0x17ff) AM_MIRROR(0x6000) AM_READWRITE(cvs_s2636_2_or_character_ram_r, cvs_s2636_2_or_character_ram_w)
159		AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0x6000) AM_READWRITE(cvs_video_or_color_ram_r, quasar_video_w) AM_BASE(&cvs_video_ram)
	153	AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0x6000) AM_READWRITE(cvs_video_or_color_ram_r, quasar_video_w) AM_BASE_MEMBER(cvs_state, video_ram)
160	154	AM_RANGE(0x1c00, 0x1fff) AM_MIRROR(0x6000) AM_RAM
161	155	AM_RANGE(0x2000, 0x33ff) AM_ROM
162	156	AM_RANGE(0x4000, 0x53ff) AM_ROM
r6740	r6741
169	163	AM_RANGE(S2650_DATA_PORT,  S2650_DATA_PORT) AM_READWRITE(cvs_collision_clear, quasar_sh_command_w)
170	164	AM_RANGE(S2650_CTRL_PORT,  S2650_CTRL_PORT) AM_READ(cvs_collision_r) AM_WRITENOP
171	165	AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
172		AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_BASE(&cvs_fo_state)
	166	AM_RANGE(S2650_FO_PORT, S2650_FO_PORT) AM_RAM AM_BASE_MEMBER(cvs_state, fo_state)
173	167	ADDRESS_MAP_END
174	168
175	169	/*************************************
r6740	r6741
196	190	************************************************************************/
197	191
198	192	static INPUT_PORTS_START( quasar )
199		PORT_START("IN0")   /* Controls 0 */
	193	PORT_START("IN0")
200	194	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
201	195	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
202	196	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 )
r6740	r6741
206	200	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT )
207	201	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 )         /* switch collaudo */
208	202
209		PORT_START("IN1")   /* Controls 1 */
	203	PORT_START("IN1")
210	204	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 )         /* tavalino */
211	205	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
212	206	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
r6740	r6741
216	210	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )
217	211	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START3 )            /* count enable */
218	212
219		PORT_START("DSW0")   /* DSW0 */
	213	PORT_START("DSW0")
220	214	PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Coin_A ) )         /* confirmed */
221	215	PORT_DIPSETTING(    0x00, DEF_STR( 2C_1C ) )
222	216	PORT_DIPSETTING(    0x04, DEF_STR( 1C_1C ) )
r6740	r6741
239	233	PORT_DIPSETTING(    0x00, "Collisions excluded" )
240	234	PORT_DIPSETTING(    0x80, "Collisions included" )
241	235
242		PORT_START("DSW1")   /* DSW1 */
	236	PORT_START("DSW1")
243	237	PORT_DIPNAME( 0x07, 0x01, "High Score" )
244	238	PORT_DIPSETTING(    0x00, "No H.S." ) // this option only wants bit 0 OFF
245	239	PORT_DIPSETTING(    0x01, "Normal H.S." )
r6740	r6741
260	254	PORT_DIPSETTING(    0x80, "Stop at edge" )
261	255	PORT_DIPSETTING(    0x00, "Wrap Around" )
262	256
263		PORT_START("SENSE")   /* SENSE */
	257	PORT_START("SENSE")
264	258	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
265	259
266		PORT_START("DSW2")   /* Sound DIP switch */
	260	PORT_START("DSW2")
267	261	#if 0
268	262	PORT_DIPNAME( 0x0f, 0x00, "Noise to play" )
269	263	PORT_DIPSETTING(    0x00, "00" )
r6740	r6741
311	305
312	306	static INTERRUPT_GEN( quasar_interrupt )
313	307	{
314		generic_pulse_irq_line_and_vector(device,0,0x03);
	308	generic_pulse_irq_line_and_vector(device, 0, 0x03);
315	309	}
316	310
317	311	static const s2636_interface s2636_0_config =
318	312	{
319	313	"screen",
320		0xff,
	314	0x100,
321	315	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
322	316	};
323	317
324	318	static const s2636_interface s2636_1_config =
325	319	{
326	320	"screen",
327		0xff,
	321	0x100,
328	322	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
329	323	};
330	324
331	325	static const s2636_interface s2636_2_config =
332	326	{
333	327	"screen",
334		0xff,
	328	0x100,
335	329	CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET
336	330	};
337	331
r6740	r6741
339	333	// Quasar S2650 Main CPU, I8035 sound board
340	334	// ****************************************
341	335
	336	MACHINE_START( quasar )
	337	{
	338	cvs_state *state = (cvs_state *)machine->driver_data;
	339
	340	MACHINE_START_CALL(cvs);
	341
	342	/* register state save */
	343	state_save_register_global(machine, state->effectcontrol);
	344	state_save_register_global(machine, state->page);
	345	state_save_register_global(machine, state->io_page);
	346	}
	347
	348	static MACHINE_RESET( quasar )
	349	{
	350	cvs_state *state = (cvs_state *)machine->driver_data;
	351
	352	MACHINE_RESET_CALL(cvs);
	353
	354	state->effectcontrol = 0;
	355	state->page = 0;
	356	state->io_page = 8;
	357	}
	358
342	359	static MACHINE_DRIVER_START( quasar )
343	360
	361	/* driver data */
	362	MDRV_DRIVER_DATA(cvs_state)
	363
	364	/* basic machine hardware */
344	365	MDRV_CPU_ADD("maincpu", S2650, 14318000/4)   /* 14 mhz crystal divide by 4 on board */
345	366	MDRV_CPU_PROGRAM_MAP(quasar)
346	367	MDRV_CPU_IO_MAP(quasar_io)
r6740	r6741
350	371	MDRV_CPU_PROGRAM_MAP(sound_map)
351	372	MDRV_CPU_IO_MAP(sound_portmap)
352	373
353		MDRV_MACHINE_START( cvs )
	374	MDRV_MACHINE_START(quasar)
	375	MDRV_MACHINE_RESET(quasar)
354	376
355	377	MDRV_QUANTUM_TIME(HZ(6000))
356	378
r6740	r6741
440	462	ROM_LOAD( "12m_q.bin",    0x0000, 0x0200, CRC(1ab8633d) SHA1(3aed29f2326676a8d8a5de6f6bb923b6510896d8) )
441	463	ROM_END
442	464
443		static DRIVER_INIT( quasar )
444		{
445		page = 0;
446		IOpage = 8;
447		}
448	465
449		GAME( 1980, quasar,        0, quasar,   quasar,   quasar, ROT90, "Zelco / Zaccaria", "Quasar",             GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
450		GAME( 1980, quasara,  quasar, quasar,   quasar,   quasar, ROT90, "Zelco / Zaccaria", "Quasar (Alternate)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
	466	GAME( 1980, quasar,        0, quasar,   quasar,   0, ROT90, "Zelco / Zaccaria", "Quasar",             GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
	467	GAME( 1980, quasara,  quasar, quasar,   quasar,   0, ROT90, "Zelco / Zaccaria", "Quasar (Alternate)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )

src/mame/drivers/1943.c

r6740	r6741
14	14
15	15	/*
16	16
	17	SERVICE TEST INFORMATION:
	18
	19	- To access the unreachable tests (#4-7) in the Service Test, when starting
	20	up the machine after it has been set into Test Mode, hold down the left
	21	coin switch.
	22
	23
17	24	TODO:
18	25
19	26	- use priority PROM for drawing sprites
r6740	r6741
24	31	#include "deprecat.h"
25	32	#include "cpu/z80/z80.h"
26	33	#include "sound/2203intf.h"
27		#include "1943.h"
	34	#include "includes/1943.h"
28	35
29	36
30	37	/* Read/Write Handlers */

src/mame/drivers/psikyo4.c

r6740	r6741
132	132	#include "machine/eeprom.h"
133	133	#include "sound/ymf278b.h"
134	134	#include "rendlay.h"
	135	#include "includes/psikyo4.h"
135	136
136	137	#define ROMTEST 1 /* Does necessary stuff to perform rom test, uses RAM as it doesn't dispose of GFX after decoding */
137	138
138		UINT32 *psikyo4_vidregs;
139		static UINT32 *ps4_ram, *ps4_io_select;
140		static UINT32 *bgpen_1, *bgpen_2;
141	139
142		#define MASTER_CLOCK 57272700   // main oscillator frequency
143
144		/* defined in video/psikyo4.c */
145		VIDEO_START( psikyo4 );
146		VIDEO_UPDATE( psikyo4 );
147
148	140	static const gfx_layout layout_16x16x8 =
149	141	{
150	142	16,16,
r6740	r6741
235	227
236	228	static CUSTOM_INPUT( mahjong_ctrl_r ) /* used by hotgmck/hgkairak */
237	229	{
	230	psikyo4_state *state = (psikyo4_state *)field->port->machine->driver_data;
238	231	int player = (FPTR)param;
239		int sel = (ps4_io_select[0] & 0x0000ff00) >> 8;
	232	int sel = (state->io_select[0] & 0x0000ff00) >> 8;
240	233	int ret = 0xff;
241	234
242	235	if (sel & 1) ret &= input_port_read(field->port->machine, player ? "KEY4" : "KEY0" );
r6740	r6741
249	242
250	243	static WRITE32_HANDLER( ps4_paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w )
251	244	{
252		int r,g,b;
253		COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]);
	245	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
	246	int r, g, b;
	247	COMBINE_DATA(&state->paletteram[offset]);
254	248
255		b = ((space->machine->generic.paletteram.u32[offset] & 0x0000ff00) >>8);
256		g = ((space->machine->generic.paletteram.u32[offset] & 0x00ff0000) >>16);
257		r = ((space->machine->generic.paletteram.u32[offset] & 0xff000000) >>24);
	249	b = ((state->paletteram[offset] & 0x0000ff00) >> 8);
	250	g = ((state->paletteram[offset] & 0x00ff0000) >> 16);
	251	r = ((state->paletteram[offset] & 0xff000000) >> 24);
258	252
259		palette_set_color(space->machine,offset,MAKE_RGB(r,g,b));
260		palette_set_color(space->machine,offset+0x800,MAKE_RGB(r,g,b)); // For screen 2
	253	palette_set_color(space->machine, offset, MAKE_RGB(r, g, b));
	254	palette_set_color(space->machine, offset + 0x800, MAKE_RGB(r, g, b)); // For screen 2
261	255	}
262	256
263	257	static WRITE32_HANDLER( ps4_bgpen_1_dword_w )
264	258	{
265		int r,g,b;
266		COMBINE_DATA(&bgpen_1[0]);
	259	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
	260	int r, g, b;
	261	COMBINE_DATA(&state->bgpen_1[0]);
267	262
268		b = ((bgpen_1[0] & 0x0000ff00) >>8);
269		g = ((bgpen_1[0] & 0x00ff0000) >>16);
270		r = ((bgpen_1[0] & 0xff000000) >>24);
	263	b = ((state->bgpen_1[0] & 0x0000ff00) >>8);
	264	g = ((state->bgpen_1[0] & 0x00ff0000) >>16);
	265	r = ((state->bgpen_1[0] & 0xff000000) >>24);
271	266
272		palette_set_color(space->machine,0x1000,MAKE_RGB(r,g,b)); // Clear colour for screen 1
	267	palette_set_color(space->machine, 0x1000, MAKE_RGB(r, g, b)); // Clear colour for screen 1
273	268	}
274	269
275	270	static WRITE32_HANDLER( ps4_bgpen_2_dword_w )
276	271	{
277		int r,g,b;
278		COMBINE_DATA(&bgpen_2[0]);
	272	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
	273	int r, g, b;
	274	COMBINE_DATA(&state->bgpen_2[0]);
279	275
280		b = ((bgpen_2[0] & 0x0000ff00) >>8);
281		g = ((bgpen_2[0] & 0x00ff0000) >>16);
282		r = ((bgpen_2[0] & 0xff000000) >>24);
	276	b = ((state->bgpen_2[0] & 0x0000ff00) >>8);
	277	g = ((state->bgpen_2[0] & 0x00ff0000) >>16);
	278	r = ((state->bgpen_2[0] & 0xff000000) >>24);
283	279
284		palette_set_color(space->machine,0x1001,MAKE_RGB(r,g,b)); // Clear colour for screen 2
	280	palette_set_color(space->machine, 0x1001, MAKE_RGB(r, g, b)); // Clear colour for screen 2
285	281	}
286	282
287	283	static WRITE32_HANDLER( ps4_screen1_brt_w )
288	284	{
289		if(ACCESSING_BITS_0_7) {
	285	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
	286
	287	if (ACCESSING_BITS_0_7)
	288	{
290	289	/* Need seperate brightness for both screens if displaying together */
291	290	double brt1 = data & 0xff;
292		static double oldbrt1;
293	291
294		if (brt1>0x7f) brt1 = 0x7f; /* I reckon values must be clamped to 0x7f */
	292	if (brt1 > 0x7f)
	293	brt1 = 0x7f; /* I reckon values must be clamped to 0x7f */
295	294
296	295	brt1 = (0x7f - brt1) / 127.0;
297		if (oldbrt1 != brt1)
	296	if (state->oldbrt1 != brt1)
298	297	{
299	298	int i;
300	299
301	300	for (i = 0; i < 0x800; i++)
302		palette_set_pen_contrast(space->machine,i,brt1);
	301	palette_set_pen_contrast(space->machine, i, brt1);
303	302
304		oldbrt1 = brt1;
	303	state->oldbrt1 = brt1;
305	304	}
306		} else {
	305	}
	306	else
	307	{
307	308	/* I believe this to be seperate rgb brightness due to strings in hotdebut, unused in 4 dumped games */
308	309	if((data & mem_mask) != 0)
309	310	logerror("Unk Scr 1 rgb? brt write %08x mask %08x\n", data, mem_mask);
r6740	r6741
312	313
313	314	static WRITE32_HANDLER( ps4_screen2_brt_w )
314	315	{
315		if(ACCESSING_BITS_0_7) {
	316	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
	317
	318	if (ACCESSING_BITS_0_7)
	319	{
316	320	/* Need seperate brightness for both screens if displaying together */
317	321	double brt2 = data & 0xff;
318		static double oldbrt2;
319	322
320		if (brt2>0x7f) brt2 = 0x7f; /* I reckon values must be clamped to 0x7f */
	323	if (brt2 > 0x7f)
	324	brt2 = 0x7f; /* I reckon values must be clamped to 0x7f */
321	325
322	326	brt2 = (0x7f - brt2) / 127.0;
323	327
324		if (oldbrt2 != brt2)
	328	if (state->oldbrt2 != brt2)
325	329	{
326	330	int i;
327	331
328	332	for (i = 0x800; i < 0x1000; i++)
329		palette_set_pen_contrast(space->machine,i,brt2);
	333	palette_set_pen_contrast(space->machine, i, brt2);
330	334
331		oldbrt2 = brt2;
	335	state->oldbrt2 = brt2;
332	336	}
333		} else {
	337	}
	338	else
	339	{
334	340	/* I believe this to be seperate rgb brightness due to strings in hotdebut, unused in 4 dumped games */
335	341	if((data & mem_mask) != 0)
336	342	logerror("Unk Scr 2 rgb? brt write %08x mask %08x\n", data, mem_mask);
r6740	r6741
339	345
340	346	static WRITE32_HANDLER( ps4_vidregs_w )
341	347	{
342		COMBINE_DATA(&psikyo4_vidregs[offset]);
	348	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
	349	COMBINE_DATA(&state->vidregs[offset]);
343	350
344	351	#if ROMTEST
345		if(offset==2) /* Configure bank for gfx test */
	352	if (offset == 2) /* Configure bank for gfx test */
346	353	{
347	354	if (ACCESSING_BITS_0_15)   // Bank
348	355	{
349		UINT8 *ROM = memory_region(space->machine, "gfx1");
350		memory_set_bankptr(space->machine, "bank2",&ROM[0x2000 * (psikyo4_vidregs[offset]&0x1fff)]); /* Bank comes from vidregs */
351		}
	356	//          memory_set_bank(space->machine, "bank2", state->vidregs[offset] & 0x1fff);  /* Bank comes from vidregs */
	357	memory_set_bankptr(space->machine, "bank2", memory_region(space->machine, "gfx1") + 0x2000 * (state->vidregs[offset] & 0x1fff)); /* Bank comes from vidregs */      }
352	358	}
353	359	#endif
354	360	}
355	361
356	362	#if ROMTEST
357		static UINT32 sample_offs = 0;
358
359	363	static READ32_HANDLER( ps4_sample_r ) /* Send sample data for test */
360	364	{
	365	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
361	366	UINT8 *ROM = memory_region(space->machine, "ymf");
362		return ROM[sample_offs++]<<16;
	367	return ROM[state->sample_offs++] << 16;
363	368	}
364	369	#endif
365	370
366		#define PCM_BANK_NO(n)   ((ps4_io_select[0] >> (n * 4 + 24)) & 0x07)
	371	#define PCM_BANK_NO(n)   ((state->io_select[0] >> (n * 4 + 24)) & 0x07)
367	372
368		static void set_hotgmck_pcm_bank(running_machine *machine, int n)
	373	static void set_hotgmck_pcm_bank( running_machine *machine, int n )
369	374	{
	375	psikyo4_state *state = (psikyo4_state *)machine->driver_data;
370	376	UINT8 *ymf_pcmbank = memory_region(machine, "ymf") + 0x200000;
371	377	UINT8 *pcm_rom = memory_region(machine, "ymfsource");
372	378
r6740	r6741
375	381
376	382	static WRITE32_HANDLER( hotgmck_pcm_bank_w )
377	383	{
	384	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
378	385	int old_bank0 = PCM_BANK_NO(0);
379	386	int old_bank1 = PCM_BANK_NO(1);
380	387	int new_bank0, new_bank1;
381	388
382		COMBINE_DATA(&ps4_io_select[0]);
	389	COMBINE_DATA(&state->io_select[0]);
383	390
384	391	new_bank0 = PCM_BANK_NO(0);
385	392	new_bank1 = PCM_BANK_NO(1);
r6740	r6741
394	401	static ADDRESS_MAP_START( ps4_map, ADDRESS_SPACE_PROGRAM, 32 )
395	402	AM_RANGE(0x00000000, 0x000fffff) AM_ROM      // program ROM (1 meg)
396	403	AM_RANGE(0x02000000, 0x021fffff) AM_ROMBANK("bank1") // data ROM
397		AM_RANGE(0x03000000, 0x030037ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
	404	AM_RANGE(0x03000000, 0x030037ff) AM_RAM AM_BASE_SIZE_MEMBER(psikyo4_state, spriteram, spriteram_size)
398	405	AM_RANGE(0x03003fe0, 0x03003fe3) AM_READWRITE(ps4_eeprom_r,ps4_eeprom_w)
399	406	AM_RANGE(0x03003fe4, 0x03003fe7) AM_READNOP // also writes to this address - might be vblank?
400	407	//  AM_RANGE(0x03003fe4, 0x03003fe7) AM_WRITENOP // might be vblank?
401		AM_RANGE(0x03003fe4, 0x03003fef) AM_RAM_WRITE(ps4_vidregs_w) AM_BASE(&psikyo4_vidregs) // vid regs?
	408	AM_RANGE(0x03003fe4, 0x03003fef) AM_RAM_WRITE(ps4_vidregs_w) AM_BASE_MEMBER(psikyo4_state, vidregs) // vid regs?
402	409	AM_RANGE(0x03003ff0, 0x03003ff3) AM_WRITE(ps4_screen1_brt_w) // screen 1 brightness
403		AM_RANGE(0x03003ff4, 0x03003ff7) AM_WRITE(ps4_bgpen_1_dword_w) AM_BASE(&bgpen_1) // screen 1 clear colour
	410	AM_RANGE(0x03003ff4, 0x03003ff7) AM_WRITE(ps4_bgpen_1_dword_w) AM_BASE_MEMBER(psikyo4_state, bgpen_1) // screen 1 clear colour
404	411	AM_RANGE(0x03003ff8, 0x03003ffb) AM_WRITE(ps4_screen2_brt_w) // screen 2 brightness
405		AM_RANGE(0x03003ffc, 0x03003fff) AM_WRITE(ps4_bgpen_2_dword_w) AM_BASE(&bgpen_2) // screen 2 clear colour
406		AM_RANGE(0x03004000, 0x03005fff) AM_RAM_WRITE(ps4_paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE_GENERIC(paletteram) // palette
	412	AM_RANGE(0x03003ffc, 0x03003fff) AM_WRITE(ps4_bgpen_2_dword_w) AM_BASE_MEMBER(psikyo4_state, bgpen_2) // screen 2 clear colour
	413	AM_RANGE(0x03004000, 0x03005fff) AM_RAM_WRITE(ps4_paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE_MEMBER(psikyo4_state, paletteram) // palette
407	414	AM_RANGE(0x05000000, 0x05000003) AM_DEVREAD8("ymf", ymf278b_r, 0xffffffff) // read YMF status
408	415	AM_RANGE(0x05000000, 0x05000007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
409	416	AM_RANGE(0x05800000, 0x05800003) AM_READ_PORT("P1_P2")
410	417	AM_RANGE(0x05800004, 0x05800007) AM_READ_PORT("P3_P4")
411		AM_RANGE(0x05800008, 0x0580000b) AM_WRITEONLY AM_BASE(&ps4_io_select) // Used by Mahjong games to choose input (also maps normal loderndf inputs to offsets)
	418	AM_RANGE(0x05800008, 0x0580000b) AM_WRITEONLY AM_BASE_MEMBER(psikyo4_state, io_select) // Used by Mahjong games to choose input (also maps normal loderndf inputs to offsets)
412	419
413		AM_RANGE(0x06000000, 0x060fffff) AM_RAM   AM_BASE(&ps4_ram) // main RAM (1 meg)
	420	AM_RANGE(0x06000000, 0x060fffff) AM_RAM AM_BASE_MEMBER(psikyo4_state, ram) // main RAM (1 meg)
414	421
415	422	#if ROMTEST
416	423	AM_RANGE(0x05000004, 0x05000007) AM_READ(ps4_sample_r) // data for rom tests (Used to verify Sample rom)
r6740	r6741
418	425	#endif
419	426	ADDRESS_MAP_END
420	427
421		static void irqhandler(const device_config *device, int linestate)
422		{
423		if (linestate)
424		cputag_set_input_line(device->machine, "maincpu", 12, ASSERT_LINE);
425		else
426		cputag_set_input_line(device->machine, "maincpu", 12, CLEAR_LINE);
427		}
428	428
429		static const ymf278b_interface ymf278b_config =
430		{
431		irqhandler
432		};
433
434		static MACHINE_DRIVER_START( ps4big )
435		/* basic machine hardware */
436		MDRV_CPU_ADD("maincpu", SH2, MASTER_CLOCK/2)
437		MDRV_CPU_PROGRAM_MAP(ps4_map)
438		MDRV_CPU_VBLANK_INT("lscreen", psikyosh_interrupt)
439
440		MDRV_NVRAM_HANDLER(93C56)
441
442		/* video hardware */
443		MDRV_GFXDECODE(ps4)
444		MDRV_PALETTE_LENGTH((0x2000/4)*2 + 2) /* 0x2000/4 for each screen. 1 for each screen clear colour */
445		MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
446
447		MDRV_SCREEN_ADD("lscreen", RASTER)
448		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
449		MDRV_SCREEN_REFRESH_RATE(60)
450		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
451		MDRV_SCREEN_SIZE(40*8, 32*8)
452		MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 28*8-1)
453
454		MDRV_SCREEN_ADD("rscreen", RASTER)
455		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
456		MDRV_SCREEN_REFRESH_RATE(60)
457		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
458		MDRV_SCREEN_SIZE(40*8, 32*8)
459		MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 28*8-1)
460
461		MDRV_VIDEO_START(psikyo4)
462		MDRV_VIDEO_UPDATE(psikyo4)
463
464		/* sound hardware */
465		MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
466
467		MDRV_SOUND_ADD("ymf", YMF278B, MASTER_CLOCK/2)
468		MDRV_SOUND_CONFIG(ymf278b_config)
469		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
470		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
471		MACHINE_DRIVER_END
472
473		static MACHINE_DRIVER_START( ps4small )
474		/* basic machine hardware */
475		MDRV_IMPORT_FROM(ps4big)
476
477		MDRV_SCREEN_MODIFY("lscreen")
478		MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 30*8-1)
479
480		MDRV_SCREEN_MODIFY("rscreen")
481		MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 30*8-1)
482		MACHINE_DRIVER_END
483
484
485	429	static INPUT_PORTS_START( hotgmck )
486	430	PORT_START("P1_P2")
487	431	PORT_BIT( 0x000000ff, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_CUSTOM(system_port_r, NULL)
r6740	r6741
764	708	PORT_BIT( 0x00100000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
765	709	INPUT_PORTS_END
766	710
	711
	712	static void irqhandler( const device_config *device, int linestate )
	713	{
	714	psikyo4_state *state = (psikyo4_state *)device->machine->driver_data;
	715	cpu_set_input_line(state->maincpu, 12, linestate ? ASSERT_LINE : CLEAR_LINE);
	716	}
	717
	718	static const ymf278b_interface ymf278b_config =
	719	{
	720	irqhandler
	721	};
	722
	723
	724	static MACHINE_START( psikyo4 )
	725	{
	726	psikyo4_state *state = (psikyo4_state *)machine->driver_data;
	727
	728	state->maincpu = devtag_get_device(machine, "maincpu");
	729
	730	#if ROMTEST
	731	//  FIXME: Too many banks! it cannot be handled in this way, currently
	732	//  memory_configure_bank(machine, "bank2", 0, 0x2000, memory_region(machine, "gfx1"), 0x2000);
	733
	734	state->sample_offs = 0;
	735	state_save_register_global(machine, state->sample_offs);
	736	#endif
	737
	738	state_save_register_global(machine, state->oldbrt1);
	739	state_save_register_global(machine, state->oldbrt2);
	740	}
	741
	742	static MACHINE_RESET( psikyo4 )
	743	{
	744	psikyo4_state *state = (psikyo4_state *)machine->driver_data;
	745
	746	state->oldbrt1 = -1;
	747	state->oldbrt2 = -1;
	748	}
	749
	750	static MACHINE_DRIVER_START( ps4big )
	751
	752	/* driver data */
	753	MDRV_DRIVER_DATA(psikyo4_state)
	754
	755	/* basic machine hardware */
	756	MDRV_CPU_ADD("maincpu", SH2, MASTER_CLOCK/2)
	757	MDRV_CPU_PROGRAM_MAP(ps4_map)
	758	MDRV_CPU_VBLANK_INT("lscreen", psikyosh_interrupt)
	759
	760	MDRV_MACHINE_START(psikyo4)
	761	MDRV_MACHINE_RESET(psikyo4)
	762
	763	MDRV_NVRAM_HANDLER(93C56)
	764
	765	/* video hardware */
	766	MDRV_GFXDECODE(ps4)
	767	MDRV_PALETTE_LENGTH((0x2000/4)*2 + 2) /* 0x2000/4 for each screen. 1 for each screen clear colour */
	768	MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
	769
	770	MDRV_SCREEN_ADD("lscreen", RASTER)
	771	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	772	MDRV_SCREEN_REFRESH_RATE(60)
	773	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	774	MDRV_SCREEN_SIZE(40*8, 32*8)
	775	MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 28*8-1)
	776
	777	MDRV_SCREEN_ADD("rscreen", RASTER)
	778	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	779	MDRV_SCREEN_REFRESH_RATE(60)
	780	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	781	MDRV_SCREEN_SIZE(40*8, 32*8)
	782	MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 28*8-1)
	783
	784	MDRV_VIDEO_START(psikyo4)
	785	MDRV_VIDEO_UPDATE(psikyo4)
	786
	787	/* sound hardware */
	788	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
	789
	790	MDRV_SOUND_ADD("ymf", YMF278B, MASTER_CLOCK/2)
	791	MDRV_SOUND_CONFIG(ymf278b_config)
	792	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
	793	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
	794	MACHINE_DRIVER_END
	795
	796	static MACHINE_DRIVER_START( ps4small )
	797	/* basic machine hardware */
	798	MDRV_IMPORT_FROM(ps4big)
	799
	800	MDRV_SCREEN_MODIFY("lscreen")
	801	MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 30*8-1)
	802
	803	MDRV_SCREEN_MODIFY("rscreen")
	804	MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 30*8-1)
	805	MACHINE_DRIVER_END
	806
	807
	808
767	809	ROM_START( hotgmck )
768	810	/* main program */
769	811	ROM_REGION( 0x300000, "maincpu", 0)
r6740	r6741
852	894	ROM_REGION( 0x500000, "maincpu", 0)
853	895	ROM_LOAD32_WORD_SWAP( "2.u22",   0x000000, 0x080000, CRC(3334c21e) SHA1(8d825448e40bc50d670ab8587a40df6b27ac918e) )
854	896	ROM_LOAD32_WORD_SWAP( "1.u23",   0x000002, 0x080000, CRC(b1a1c643) SHA1(1912a2d231e97ffbe9b668ca7f25cf406664f3ba) )
855		ROM_LOAD16_WORD_SWAP( "prog.u1", 0x100000, 0x400000, CRC(ad556d8e) SHA1(d3dc3c5cbe939b6fc28f861e4132c5485ba89f50) ) // no test
	897	ROM_LOAD16_WORD_SWAP( "prog.u1", 0x100000, 0x400000, CRC(ad556d8e) SHA1(d3dc3c5cbe939b6fc28f861e4132c5485ba89f50) ) // no test
856	898
857	899	ROM_REGION( 0x8000000, "gfx1", 0 )   /* Sprites */
858		ROM_LOAD32_WORD( "0l.u2",  0x0000000, 0x400000, CRC(f65986f7) SHA1(3824a7ea7f14ef3f319b07bd1224847131f6cac0) ) // ok
	900	ROM_LOAD32_WORD( "0l.u2",  0x0000000, 0x400000, CRC(f65986f7) SHA1(3824a7ea7f14ef3f319b07bd1224847131f6cac0) ) // ok
859	901	ROM_LOAD32_WORD( "0h.u11", 0x0000002, 0x400000, CRC(51fd07a9) SHA1(527097a376fc0ecb23aa8707eb5e029ec1126873) ) // ok
860		ROM_LOAD32_WORD( "1l.u3",  0x0800000, 0x400000, CRC(f59d21d7) SHA1(05a1b93f2926b419ff5e031a25fd227706d66050) ) // ok
861		ROM_LOAD32_WORD( "1h.u12", 0x0800002, 0x400000, CRC(60ea4797) SHA1(5da4a26496ac986ba0bdefde63040634775132dc) ) // ok
862		ROM_LOAD32_WORD( "2l.u4",  0x1000000, 0x400000, CRC(fbaf05e3) SHA1(ce929f1e87b05324e5e863bdb8baafef3d73f781) ) // ok
863		ROM_LOAD32_WORD( "2h.u13", 0x1000002, 0x400000, CRC(61281612) SHA1(88af33aa9348044c3620dd7a89e992f3812f45a8) ) // ok
864		ROM_LOAD32_WORD( "3l.u5",  0x1800000, 0x400000, CRC(e2e1bd9f) SHA1(8078bbffd6bf3abae6a3b36ae26628eb53ee5dc2) ) // ok
865		ROM_LOAD32_WORD( "3h.u14", 0x1800002, 0x400000, CRC(c4426542) SHA1(660e0fc3f641034cc0b2a8398951de0579b35d77) ) // ok
866		ROM_LOAD32_WORD( "4l.u6",  0x2000000, 0x400000, CRC(7298a242) SHA1(f1987a466bc1cb569d1b5f918ef6690b24479b3b) ) // ok
867		ROM_LOAD32_WORD( "4h.u15", 0x2000002, 0x400000, CRC(fe91b459) SHA1(18d0dc1c9f9103d505110dbc1a44f805597037d9) ) // ok
868		ROM_LOAD32_WORD( "5l.u7",  0x2800000, 0x400000, CRC(cc714a7d) SHA1(933c08fb34b138279d5ee7783d1b4865b2d4520a) ) // ok
869		ROM_LOAD32_WORD( "5h.u16", 0x2800002, 0x400000, CRC(2f149cf9) SHA1(598c3e606e3cd87938ccfc3c5e08d88c6044b393) ) // ok
870		ROM_LOAD32_WORD( "6l.u8",  0x3000000, 0x400000, CRC(bfe97dfe) SHA1(f249258a620188d0d7c3858cfb36af5d67ba94b2) ) // ok
871		ROM_LOAD32_WORD( "6h.u17", 0x3000002, 0x400000, CRC(3473052a) SHA1(897987422885a19a53a02257a9dde6348ec42f9f) ) // ok
872		ROM_LOAD32_WORD( "7l.u9",  0x3800000, 0x400000, CRC(022a8a31) SHA1(a21dbf36f56e144f9817c7255866546367dda2f6) ) // ok
873		ROM_LOAD32_WORD( "7h.u18", 0x3800002, 0x400000, CRC(77e47409) SHA1(0e1deb01dd1250c90fc3eed776becd51899f0b5f) ) // ok
	902	ROM_LOAD32_WORD( "1l.u3",  0x0800000, 0x400000, CRC(f59d21d7) SHA1(05a1b93f2926b419ff5e031a25fd227706d66050) ) // ok
	903	ROM_LOAD32_WORD( "1h.u12", 0x0800002, 0x400000, CRC(60ea4797) SHA1(5da4a26496ac986ba0bdefde63040634775132dc) ) // ok
	904	ROM_LOAD32_WORD( "2l.u4",  0x1000000, 0x400000, CRC(fbaf05e3) SHA1(ce929f1e87b05324e5e863bdb8baafef3d73f781) ) // ok
	905	ROM_LOAD32_WORD( "2h.u13", 0x1000002, 0x400000, CRC(61281612) SHA1(88af33aa9348044c3620dd7a89e992f3812f45a8) ) // ok
	906	ROM_LOAD32_WORD( "3l.u5",  0x1800000, 0x400000, CRC(e2e1bd9f) SHA1(8078bbffd6bf3abae6a3b36ae26628eb53ee5dc2) ) // ok
	907	ROM_LOAD32_WORD( "3h.u14", 0x1800002, 0x400000, CRC(c4426542) SHA1(660e0fc3f641034cc0b2a8398951de0579b35d77) ) // ok
	908	ROM_LOAD32_WORD( "4l.u6",  0x2000000, 0x400000, CRC(7298a242) SHA1(f1987a466bc1cb569d1b5f918ef6690b24479b3b) ) // ok
	909	ROM_LOAD32_WORD( "4h.u15", 0x2000002, 0x400000, CRC(fe91b459) SHA1(18d0dc1c9f9103d505110dbc1a44f805597037d9) ) // ok
	910	ROM_LOAD32_WORD( "5l.u7",  0x2800000, 0x400000, CRC(cc714a7d) SHA1(933c08fb34b138279d5ee7783d1b4865b2d4520a) ) // ok
	911	ROM_LOAD32_WORD( "5h.u16", 0x2800002, 0x400000, CRC(2f149cf9) SHA1(598c3e606e3cd87938ccfc3c5e08d88c6044b393) ) // ok
	912	ROM_LOAD32_WORD( "6l.u8",  0x3000000, 0x400000, CRC(bfe97dfe) SHA1(f249258a620188d0d7c3858cfb36af5d67ba94b2) ) // ok
	913	ROM_LOAD32_WORD( "6h.u17", 0x3000002, 0x400000, CRC(3473052a) SHA1(897987422885a19a53a02257a9dde6348ec42f9f) ) // ok
	914	ROM_LOAD32_WORD( "7l.u9",  0x3800000, 0x400000, CRC(022a8a31) SHA1(a21dbf36f56e144f9817c7255866546367dda2f6) ) // ok
	915	ROM_LOAD32_WORD( "7h.u18", 0x3800002, 0x400000, CRC(77e47409) SHA1(0e1deb01dd1250c90fc3eed776becd51899f0b5f) ) // ok
874	916
875	917	ROM_REGION( 0x400000, "ymf", ROMREGION_ERASE00 )
876	918
877	919	ROM_REGION( 0x800000, "ymfsource", 0 )
878		ROM_LOAD( "snd0.u10", 0x000000, 0x400000, CRC(051e2fed) SHA1(ee8073332801982549b3c142fba114e27733a756) ) // ok
879		ROM_LOAD( "snd1.u19", 0x400000, 0x400000, CRC(0de0232d) SHA1(c600fe1d3c6c05e451ae7ef249bb92e8fc9cec3a) ) // ok (but fails rom test due to banking error in emulation)
	920	ROM_LOAD( "snd0.u10", 0x000000, 0x400000, CRC(051e2fed) SHA1(ee8073332801982549b3c142fba114e27733a756) ) // ok
	921	ROM_LOAD( "snd1.u19", 0x400000, 0x400000, CRC(0de0232d) SHA1(c600fe1d3c6c05e451ae7ef249bb92e8fc9cec3a) ) // ok (but fails rom test due to banking error in emulation)
880	922	ROM_END
881	923
882	924	ROM_START( hotgmcki )
883	925	ROM_REGION( 0x500000, "maincpu", 0)
884	926	ROM_LOAD32_WORD_SWAP( "2.u22",   0x000000, 0x080000, CRC(abc192dd) SHA1(674c2b8814319605c1b6221bbe18588a98dda093) )
885	927	ROM_LOAD32_WORD_SWAP( "1.u23",   0x000002, 0x080000, CRC(8be896d0) SHA1(5d677dede4ec18cbfc54acae95fe0f10bfc4d566) )
886		ROM_LOAD16_WORD_SWAP( "prog.u1", 0x100000, 0x200000, CRC(9017ae8e) SHA1(0879198606095a2d209df059538ce1c73460b30e) ) // no test
	928	ROM_LOAD16_WORD_SWAP( "prog.u1", 0x100000, 0x200000, CRC(9017ae8e) SHA1(0879198606095a2d209df059538ce1c73460b30e) ) // no test
887	929	ROM_RELOAD(0x300000,0x200000)
888	930
889	931	/* Roms have to be mirrored with ROM_RELOAD for rom tests to pass */
r6740	r6741
894	936	ROM_RELOAD(                0x0400002, 0x200000 )
895	937	ROM_LOAD32_WORD( "1l.u3",  0x0800000, 0x200000, CRC(27576360) SHA1(ed9d6f5b9934e8ddae3f3ca146e99f42dbd495de) ) // ok
896	938	ROM_RELOAD(                0x0c00000, 0x200000 )
897		ROM_LOAD32_WORD( "1h.u12", 0x0800002, 0x200000, CRC(7439a63f) SHA1(c9a74e5e81a2c94ce7a9b3b487f54ac5b3635744) ) // ok
	939	ROM_LOAD32_WORD( "1h.u12", 0x0800002, 0x200000, CRC(7439a63f) SHA1(c9a74e5e81a2c94ce7a9b3b487f54ac5b3635744) ) // ok
898	940	ROM_RELOAD(                0x0c00002, 0x200000 )
899	941	ROM_LOAD32_WORD( "2l.u4",  0x1000000, 0x200000, CRC(fda64e24) SHA1(e8788b5f0e8b0f90c9942f9f4cbcee02be8afd09) ) // ok
900	942	ROM_RELOAD(                0x1400000, 0x200000 )
r6740	r6741
992	1034	PC  :00001B46: TST     R2,R2
993	1035	PC  :00001B48: BT      $00001B3C
994	1036	*/
	1037	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
995	1038
996		if (cpu_get_pc(space->cpu)==0x00001B3E) cpu_spinuntil_int(space->cpu);
997		return ps4_ram[0x000020/4];
	1039	if (cpu_get_pc(space->cpu) == 0x00001b3e)
	1040	cpu_spinuntil_int(space->cpu);
	1041
	1042	return state->ram[0x000020 / 4];
998	1043	}
999	1044
1000	1045	static READ32_HANDLER( loderdfa_speedup_r )
r6740	r6741
1008	1053	PC  :00001B52: TST     R2,R2
1009	1054	PC  :00001B54: BT      $00001B48
1010	1055	*/
	1056	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
1011	1057
1012		if (cpu_get_pc(space->cpu)==0x00001B4A) cpu_spinuntil_int(space->cpu);
1013		return ps4_ram[0x000020/4];
	1058	if (cpu_get_pc(space->cpu) == 0x00001b4a)
	1059	cpu_spinuntil_int(space->cpu);
	1060
	1061	return state->ram[0x000020 / 4];
1014	1062	}
1015	1063
1016	1064	static READ32_HANDLER( hotdebut_speedup_r )
r6740	r6741
1024	1072	PC  :000029F6: TST     R3,R3
1025	1073	PC  :000029F8: BT      $000029EC
1026	1074	*/
	1075	psikyo4_state *state = (psikyo4_state *)space->machine->driver_data;
1027	1076
1028		if (cpu_get_pc(space->cpu)==0x000029EE) cpu_spinuntil_int(space->cpu);
1029		return ps4_ram[0x00001c/4];
	1077	if (cpu_get_pc(space->cpu) == 0x000029ee)
	1078	cpu_spinuntil_int(space->cpu);
	1079
	1080	return state->ram[0x00001c / 4];
1030	1081	}
1031	1082
1032	1083	static STATE_POSTLOAD( hotgmck_pcm_bank_postload )
r6740	r6741
1036	1087
1037	1088	static void install_hotgmck_pcm_bank(running_machine *machine)
1038	1089	{
	1090	psikyo4_state *state = (psikyo4_state *)machine->driver_data;
1039	1091	UINT8 *ymf_pcm = memory_region(machine, "ymf");
1040	1092	UINT8 *pcm_rom = memory_region(machine, "ymfsource");
1041	1093
1042	1094	memcpy(ymf_pcm, pcm_rom, 0x200000);
1043	1095
1044		ps4_io_select[0] = (ps4_io_select[0] & 0x00ffffff) | 0x32000000;
	1096	state->io_select[0] = (state->io_select[0] & 0x00ffffff) | 0x32000000;
1045	1097	set_hotgmck_pcm_bank(machine, 0);
1046	1098	set_hotgmck_pcm_bank(machine, 1);
1047	1099

src/mame/drivers/rollrace.c

r6740	r6741
13	13	#include "sound/ay8910.h"
14	14
15	15
	16	extern UINT8 *rollrace_videoram;
	17	extern UINT8 *rollrace_colorram;
16	18	VIDEO_UPDATE( rollrace );
17	19	PALETTE_INIT( wiz );
18	20
r6740	r6741
40	42	AM_RANGE(0xc000, 0xcfff) AM_RAM
41	43	AM_RANGE(0xd806, 0xd806) AM_READNOP /* looks like a watchdog, bit4 checked*/
42	44	AM_RANGE(0xd900, 0xd900) AM_READWRITE(ra_fake_d800_r,ra_fake_d800_w) /* protection ??*/
43		AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
44		AM_RANGE(0xe400, 0xe47f) AM_RAM AM_BASE_GENERIC(colorram)
	45	AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE(&rollrace_videoram)
	46	AM_RANGE(0xe400, 0xe47f) AM_RAM AM_BASE(&rollrace_colorram)
45	47	AM_RANGE(0xe800, 0xe800) AM_WRITE(soundlatch_w)
46	48	AM_RANGE(0xec00, 0xec0f) AM_NOP /* Analog sound effects ?? ec00 sound enable ?*/
47	49	AM_RANGE(0xf000, 0xf0ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)

src/mame/drivers/mirage.c

r6740	r6741
34	34
35	35	#include "driver.h"
36	36	#include "cpu/m68000/m68000.h"
37		#include "decocrpt.h"
38		#include "decoprot.h"
39		#include "deco16ic.h"
	37	#include "includes/decocrpt.h"
	38	#include "includes/decoprot.h"
	39	#include "includes/deco16ic.h"
40	40	#include "sound/okim6295.h"
41	41
42		#include "deco16ic.h"
43
44	42	static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect, int pri)
45	43	{
46	44	UINT16 *spriteram16 = machine->generic.spriteram.u16;

src/mame/drivers/popper.c

r6740	r6741
85	85	#include "cpu/z80/z80.h"
86	86	#include "deprecat.h"
87	87	#include "sound/ay8910.h"
88		#include "popper.h"
	88	#include "includes/popper.h"
89	89
90	90
91	91	/*************************************

src/mame/drivers/djboy.c

r6740	r6741
1	1	/*
2		DJ Boy (c)1989 Kanako
	2	DJ Boy (c)1989 Kaneko
3	3
4	4	Hardware has many similarities to Airbusters.
5	5
r6740	r6741
159	159	#include "sound/2203intf.h"
160	160	#include "sound/okim6295.h"
161	161	#include "video/kan_pand.h"
	162	#include "includes/djboy.h"
162	163
163		/* public functions from video/djboy.h */
164		extern void djboy_set_videoreg( UINT8 data );
165		extern WRITE8_HANDLER( djboy_scrollx_w );
166		extern WRITE8_HANDLER( djboy_scrolly_w );
167		extern WRITE8_HANDLER( djboy_videoram_w );
168		extern WRITE8_HANDLER( djboy_paletteram_w );
169		extern VIDEO_START( djboy );
170		extern VIDEO_UPDATE( djboy );
171		extern VIDEO_EOF( djboy );
172	164
173		/******************************************************************************/
174
175	165	/* KANEKO BEAST state */
176	166
177		#define PROT_OUTPUT_BUFFER_SIZE 8
178
179		static int prot_busy_count;
180		static UINT8 prot_output_buffer[PROT_OUTPUT_BUFFER_SIZE];
181		static int prot_available_data_count;
182		static int prot_offs; /* internal state */
183		static UINT8 prot_ram[0x80]; /* internal RAM */
184		static UINT8 prot_param[8];
185
186		static int coin;
187		static int complete;
188		static int lives[2];
189		static int addr;
190		static int bankxor;
191
192		static enum
	167	static void ProtectionOut( running_machine *machine, int i, UINT8 data )
193	168	{
194		eDJBOY_ATTRACT_HIGHSCORE,
195		eDJBOY_ATTRACT_TITLE,
196		eDJBOY_ATTRACT_GAMEPLAY,
197		eDJBOY_PRESS_P1_START,
198		eDJBOY_PRESS_P1_OR_P2_START,
199		eDJBOY_ACTIVE_GAMEPLAY
200		} mDjBoyState;
	169	djboy_state *state = (djboy_state *)machine->driver_data;
201	170
202		static enum
203		{
204		ePROT_NORMAL,
205		ePROT_WRITE_BYTES,
206		ePROT_WRITE_BYTE,
207		ePROT_READ_BYTES,
208		ePROT_WAIT_DSW1_WRITEBACK,
209		ePROT_WAIT_DSW2_WRITEBACK,
210		ePROT_STORE_PARAM
211		} prot_mode;
212
213		static void
214		ProtectionOut( int i, UINT8 data )
215		{
216		if( prot_available_data_count == i )
217		{
218		prot_output_buffer[prot_available_data_count++] = data;
219		}
	171	if (state->prot_available_data_count == i)
	172	state->prot_output_buffer[state->prot_available_data_count++] = data;
220	173	else
221	174	{
222		logerror( "prot_output_buffer overflow!\n" );
	175	logerror("prot_output_buffer overflow!\n");
223	176	exit(1);
224	177	}
225	178	} /* ProtectionOut */
226	179
227		static int
228		GetLives( running_machine *machine )
	180	static int GetLives( running_machine *machine )
229	181	{
230	182	int dsw = input_port_read(machine, "DSW2");
231		switch( dsw&0x30 )
	183	switch (dsw & 0x30)
232	184	{
233	185	case 0x10: return 3;
234	186	case 0x00: return 5;
r6740	r6741
238	190	return 0;
239	191	} /* GetLives */
240	192
	193
241	194	static WRITE8_HANDLER( coinplus_w )
242	195	{
	196	djboy_state *state = (djboy_state *)space->machine->driver_data;
	197
243	198	int dsw = input_port_read(space->machine, "DSW1");
244		coin_counter_w( space->machine, 0, data&1 );
245		coin_counter_w( space->machine, 1, data&2 );
246		if( data&1 )
	199	coin_counter_w(space->machine, 0, data & 1);
	200	coin_counter_w(space->machine, 1, data & 2);
	201
	202	if (data & 1)
247	203	{ /* TODO: coinage adjustments */
248		logerror( "COIN A+\n" );
249		switch( (dsw&0x30)>>4 )
	204	logerror("COIN A+\n");
	205	switch ((dsw & 0x30) >> 4)
250	206	{
251		case 0: coin += 4; break; /* 1 coin, 1 credit */
252		case 1: coin += 8; break; /* 1 coin, 2 credits */
253		case 2: coin += 2; break; /* 2 coins, 1 credit */
254		case 3: coin += 6; break; /* 2 coins, 3 credits */
	207	case 0: state->coin += 4; break; /* 1 coin, 1 credit */
	208	case 1: state->coin += 8; break; /* 1 coin, 2 credits */
	209	case 2: state->coin += 2; break; /* 2 coins, 1 credit */
	210	case 3: state->coin += 6; break; /* 2 coins, 3 credits */
255	211	}
256	212	}
257		if( data&2 )
	213	if (data & 2)
258	214	{
259		logerror( "COIN B+\n" );
260		switch( (dsw&0xc0)>>6 )
	215	logerror("COIN B+\n");
	216	switch ((dsw & 0xc0) >> 6)
261	217	{
262		case 0: coin += 4; break; /* 1 coin, 1 credit */
263		case 1: coin += 8; break; /* 1 coin, 2 credits */
264		case 2: coin += 2; break; /* 2 coins, 1 credit */
265		case 3: coin += 6; break; /* 2 coins, 3 credits */
	218	case 0: state->coin += 4; break; /* 1 coin, 1 credit */
	219	case 1: state->coin += 8; break; /* 1 coin, 2 credits */
	220	case 2: state->coin += 2; break; /* 2 coins, 1 credit */
	221	case 3: state->coin += 6; break; /* 2 coins, 3 credits */
266	222	}
267	223	}
268	224	} /* coinplus_w */
269	225
270		static void
271		OutputProtectionState( running_machine *machine, int i, int type )
	226	static void OutputProtectionState( running_machine *machine, int i, int type )
272	227	{
	228	djboy_state *state = (djboy_state *)machine->driver_data;
273	229	int io = ~input_port_read(machine, "IN0");
274	230	int dat = 0x00;
275	231
276		switch( mDjBoyState )
	232	switch (state->mDjBoyState)
277	233	{
278	234	case eDJBOY_ATTRACT_HIGHSCORE:
279		if( coin>=4 )
	235	if (state->coin >= 4)
280	236	{
281	237	dat = 0x01;
282		mDjBoyState = eDJBOY_PRESS_P1_START;
283		logerror( "COIN UP\n" );
	238	state->mDjBoyState = eDJBOY_PRESS_P1_START;
	239	logerror("COIN UP\n");
284	240	}
285		else if( complete )
	241	else if (state->complete)
286	242	{
287	243	dat = 0x06;
288		mDjBoyState = eDJBOY_ATTRACT_TITLE;
	244	state->mDjBoyState = eDJBOY_ATTRACT_TITLE;
289	245	}
290	246	break;
291	247
292	248	case eDJBOY_ATTRACT_TITLE:
293		if( coin>=4 )
	249	if (state->coin >= 4)
294	250	{
295	251	dat = 0x01;
296		mDjBoyState = eDJBOY_PRESS_P1_START;
297		logerror( "COIN UP\n" );
	252	state->mDjBoyState = eDJBOY_PRESS_P1_START;
	253	logerror("COIN UP\n");
298	254	}
299		else if( complete )
	255	else if (state->complete)
300	256	{
301	257	dat = 0x15;
302		mDjBoyState = eDJBOY_ATTRACT_GAMEPLAY;
	258	state->mDjBoyState = eDJBOY_ATTRACT_GAMEPLAY;
303	259	}
304	260	break;
305	261
306	262	case eDJBOY_ATTRACT_GAMEPLAY:
307		if( coin>=4 )
	263	if (state->coin>=4)
308	264	{
309	265	dat = 0x01;
310		mDjBoyState = eDJBOY_PRESS_P1_START;
311		logerror( "COIN UP\n" );
	266	state->mDjBoyState = eDJBOY_PRESS_P1_START;
	267	logerror("COIN UP\n");
312	268	}
313		else if( complete )
	269	else if (state->complete)
314	270	{
315	271	dat = 0x0b;
316		mDjBoyState = eDJBOY_ATTRACT_HIGHSCORE;
	272	state->mDjBoyState = eDJBOY_ATTRACT_HIGHSCORE;
317	273	}
318	274	break;
319	275
320	276	case eDJBOY_PRESS_P1_START:
321		if( io&1 )
322		{ /* p1 start */
	277	if (io & 1) /* p1 start */
	278	{
323	279	dat = 0x16;
324		mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
325		logerror( "P1 START\n" );
	280	state->mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
	281	logerror("P1 START\n");
326	282	}
327		else if( coin>=8 )
	283	else if (state->coin >= 8)
328	284	{
329	285	dat = 0x05;
330		mDjBoyState = eDJBOY_PRESS_P1_OR_P2_START;
331		logerror( "COIN2 UP\n" );
	286	state->mDjBoyState = eDJBOY_PRESS_P1_OR_P2_START;
	287	logerror("COIN2 UP\n");
332	288	}
333	289	break;
334	290
335	291	case eDJBOY_PRESS_P1_OR_P2_START:
336		if( io&1 )
337		{ /* p1 start */
	292	if (io & 1) /* p1 start */
	293	{
338	294	dat = 0x16;
339		mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
340		lives[0] = GetLives(machine);
341		logerror( "P1 START!\n" );
342		coin-=4;
	295	state->mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
	296	state->lives[0] = GetLives(machine);
	297	logerror("P1 START!\n");
	298	state->coin -= 4;
343	299	}
344		else if( io&2 )
345		{ /* p2 start */
	300	else if (io & 2) /* p2 start */
	301	{
346	302	dat = 0x0a;
347		mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
348		lives[0] = GetLives(machine);
349		lives[1] = GetLives(machine);
350		logerror( "P2 START!\n" );
351		coin-=8;
	303	state->mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
	304	state->lives[0] = GetLives(machine);
	305	state->lives[1] = GetLives(machine);
	306	logerror("P2 START!\n");
	307	state->coin -= 8;
352	308	}
353	309	break;
354	310
355	311	case eDJBOY_ACTIVE_GAMEPLAY:
356		if( lives[0]==0 && lives[1]==0 && complete )
357		{ /* continue countdown complete */
	312	if (state->lives[0] == 0 && state->lives[1] == 0 && state->complete) /* continue countdown complete */
	313	{
358	314	dat = 0x0f;
359		logerror( "countdown complete!\n" );
360		mDjBoyState = eDJBOY_ATTRACT_HIGHSCORE;
	315	logerror("countdown complete!\n");
	316	state->mDjBoyState = eDJBOY_ATTRACT_HIGHSCORE;
361	317	}
362		else if( coin>=4 )
	318	else if (state->coin >= 4)
363	319	{
364		if( (io&1) && lives[0]==0 )
	320	if ((io & 1) && state->lives[0] == 0)
365	321	{
366	322	dat = 0x12; /* continue (P1) */
367		lives[0] = GetLives(machine);
368		mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
369		coin-=4;
370		logerror( "P1 CONTINUE!\n" );
	323	state->lives[0] = GetLives(machine);
	324	state->mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
	325	state->coin -= 4;
	326	logerror("P1 CONTINUE!\n");
371	327	}
372		else if( (io&2) && lives[1]==0 )
	328	else if ((io & 2) && state->lives[1] == 0)
373	329	{
374	330	dat = 0x08; /* continue (P2) */
375		lives[1] = GetLives(machine);
376		mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
377		coin-=4;
378		logerror( "P2 CONTINUE!\n" );
	331	state->lives[1] = GetLives(machine);
	332	state->mDjBoyState = eDJBOY_ACTIVE_GAMEPLAY;
	333	state->coin -= 4;
	334	logerror("P2 CONTINUE!\n");
379	335	}
380	336	}
381	337	break;
382	338	}
383		complete = 0;
384		ProtectionOut( i, dat );
	339	state->complete = 0;
	340	ProtectionOut(machine, i, dat);
385	341	} /* OutputProtectionState */
386	342
387		static void
388		CommonProt( running_machine *machine, int i, int type )
	343	static void CommonProt( running_machine *machine, int i, int type )
389	344	{
390		int displayedCredits = coin/4;
391		if( displayedCredits>9 )
392		{
	345	djboy_state *state = (djboy_state *)machine->driver_data;
	346	int displayedCredits = state->coin / 4;
	347	if (displayedCredits > 9)
393	348	displayedCredits = 9;
394		}
395		ProtectionOut( i++, displayedCredits );
396		ProtectionOut( i++, input_port_read(machine, "IN0") ); /* COIN/START */
397		OutputProtectionState( machine, i, type );
	349
	350	ProtectionOut(machine, i++, displayedCredits);
	351	ProtectionOut(machine, i++, input_port_read(machine, "IN0")); /* COIN/START */
	352	OutputProtectionState(machine, i, type);
398	353	} /* CommonProt */
399	354
400	355	static WRITE8_HANDLER( beast_data_w )
401	356	{
402		prot_busy_count = 1;
	357	djboy_state *state = (djboy_state *)space->machine->driver_data;
403	358
404		logerror( "0x%04x: prot_w(0x%02x)\n", cpu_get_pc(space->cpu), data );
	359	state->prot_busy_count = 1;
405	360
406		watchdog_reset_w(space,0,0);
	361	logerror("0x%04x: prot_w(0x%02x)\n", cpu_get_pc(space->cpu), data);
407	362
408		if( prot_mode == ePROT_WAIT_DSW1_WRITEBACK )
	363	watchdog_reset_w(space, 0, 0);
	364
	365	if (state->prot_mode == ePROT_WAIT_DSW1_WRITEBACK)
409	366	{
410		logerror( "[DSW1_WRITEBACK]\n" );
411		ProtectionOut( 0, input_port_read(space->machine, "DSW2") ); /* DSW2 */
412		prot_mode = ePROT_WAIT_DSW2_WRITEBACK;
	367	logerror("[DSW1_WRITEBACK]\n");
	368	ProtectionOut(space->machine, 0, input_port_read(space->machine, "DSW2")); /* DSW2 */
	369	state->prot_mode = ePROT_WAIT_DSW2_WRITEBACK;
413	370	}
414		else if( prot_mode == ePROT_WAIT_DSW2_WRITEBACK )
	371	else if (state->prot_mode == ePROT_WAIT_DSW2_WRITEBACK)
415	372	{
416		logerror( "[DSW2_WRITEBACK]\n" );
417		prot_mode = ePROT_STORE_PARAM;
418		prot_offs = 0;
	373	logerror("[DSW2_WRITEBACK]\n");
	374	state->prot_mode = ePROT_STORE_PARAM;
	375	state->prot_offs = 0;
419	376	}
420		else if( prot_mode == ePROT_STORE_PARAM )
	377	else if (state->prot_mode == ePROT_STORE_PARAM)
421	378	{
422		logerror( "prot param[%d]: 0x%02x\n", prot_offs, data );
423		if( prot_offs<8 )
424		{
425		prot_param[prot_offs++] = data;
426		}
427		if( prot_offs == 8 )
428		{
429		prot_mode = ePROT_NORMAL;
430		}
	379	logerror("prot param[%d]: 0x%02x\n", state->prot_offs, data);
	380	if (state->prot_offs < 8)
	381	state->prot_param[state->prot_offs++] = data;
	382
	383	if(state->prot_offs == 8)
	384	state->prot_mode = ePROT_NORMAL;
431	385	}
432		else if( prot_mode == ePROT_WRITE_BYTE )
	386	else if (state->prot_mode == ePROT_WRITE_BYTE)
433	387	{ /* pc == 0x79cd */
434		prot_ram[(prot_offs++)&0x7f] = data;
435		prot_mode = ePROT_WRITE_BYTES;
	388	state->prot_ram[(state->prot_offs++) & 0x7f] = data;
	389	state->prot_mode = ePROT_WRITE_BYTES;
436	390	}
437	391	else
438	392	{
439		switch( data )
	393	switch (data)
440	394	{
441	395	case 0x00:
442		if( prot_mode == ePROT_WRITE_BYTES )
	396	if (state->prot_mode == ePROT_WRITE_BYTES)
443	397	{ /* next byte is data to write to internal prot RAM */
444		prot_mode = ePROT_WRITE_BYTE;
	398	state->prot_mode = ePROT_WRITE_BYTE;
445	399	}
446		else if( prot_mode == ePROT_READ_BYTES )
	400	else if (state->prot_mode == ePROT_READ_BYTES)
447	401	{ /* request next byte of internal prot RAM */
448		ProtectionOut( 0, prot_ram[(prot_offs++)&0x7f] );
	402	ProtectionOut(space->machine, 0, state->prot_ram[(state->prot_offs++) & 0x7f]);
449	403	}
450	404	else
451		{
452		logerror( "UNEXPECTED PREFIX!\n" );
453		}
	405	logerror("UNEXPECTED PREFIX!\n");
454	406	break;
455	407
456	408	case 0x01: // pc=7389
457		OutputProtectionState( space->machine, 0, 0x01 );
	409	OutputProtectionState(space->machine, 0, 0x01);
458	410	break;
459	411
460	412	case 0x02:
461		CommonProt( space->machine,0,0x02 );
	413	CommonProt(space->machine, 0, 0x02);
462	414	break;
463	415
464	416	case 0x03: /* prepare for memory write to protection device ram (pc == 0x7987) */ // -> 0x02
465		logerror( "[WRITE BYTES]\n" );
466		prot_mode = ePROT_WRITE_BYTES;
467		prot_offs = 0;
	417	logerror("[WRITE BYTES]\n");
	418	state->prot_mode = ePROT_WRITE_BYTES;
	419	state->prot_offs = 0;
468	420	break;
469	421
470	422	case 0x04:
471		ProtectionOut( 0,0 ); // ?
472		ProtectionOut( 1,0 ); // ?
473		ProtectionOut( 2,0 ); // ?
474		ProtectionOut( 3,0 ); // ?
475		CommonProt(    space->machine, 4,0x04 );
	423	ProtectionOut(space->machine, 0, 0); // ?
	424	ProtectionOut(space->machine, 1, 0); // ?
	425	ProtectionOut(space->machine, 2, 0); // ?
	426	ProtectionOut(space->machine, 3, 0); // ?
	427	CommonProt(space->machine, 4, 0x04);
476	428	break;
477	429
478	430	case 0x05: /* 0x71f4 */
479		ProtectionOut( 0,input_port_read(space->machine, "IN1") ); // to $42
480		ProtectionOut( 1,0 ); // ?
481		ProtectionOut( 2,input_port_read(space->machine, "IN2") ); // to $43
482		ProtectionOut( 3,0 ); // ?
483		ProtectionOut( 4,0 ); // ?
484		CommonProt(    space->machine, 5,0x05 );
	431	ProtectionOut(space->machine, 0, input_port_read(space->machine, "IN1")); // to $42
	432	ProtectionOut(space->machine, 1, 0); // ?
	433	ProtectionOut(space->machine, 2, input_port_read(space->machine, "IN2")); // to $43
	434	ProtectionOut(space->machine, 3, 0); // ?
	435	ProtectionOut(space->machine, 4, 0); // ?
	436	CommonProt(space->machine, 5, 0x05);
485	437	break;
486	438
487	439	case 0x07:
488		CommonProt( space->machine, 0,0x07 );
	440	CommonProt(space->machine, 0, 0x07);
489	441	break;
490	442
491	443	case 0x08: /* pc == 0x727a */
492		ProtectionOut( 0,input_port_read(space->machine, "IN0") ); /* COIN/START */
493		ProtectionOut( 1,input_port_read(space->machine, "IN1") ); /* JOY1 */
494		ProtectionOut( 2,input_port_read(space->machine, "IN2") ); /* JOY2 */
495		ProtectionOut( 3,input_port_read(space->machine, "DSW1") ); /* DSW1 */
496		ProtectionOut( 4,input_port_read(space->machine, "DSW2") ); /* DSW2 */
497		CommonProt(    space->machine, 5, 0x08 );
	444	ProtectionOut(space->machine, 0, input_port_read(space->machine, "IN0")); /* COIN/START */
	445	ProtectionOut(space->machine, 1, input_port_read(space->machine, "IN1")); /* JOY1 */
	446	ProtectionOut(space->machine, 2, input_port_read(space->machine, "IN2")); /* JOY2 */
	447	ProtectionOut(space->machine, 3, input_port_read(space->machine, "DSW1")); /* DSW1 */
	448	ProtectionOut(space->machine, 4, input_port_read(space->machine, "DSW2")); /* DSW2 */
	449	CommonProt(space->machine, 5, 0x08);
498	450	break;
499	451
500	452	case 0x09:
501		ProtectionOut( 0,0 ); // ?
502		ProtectionOut( 1,0 ); // ?
503		ProtectionOut( 2,0 ); // ?
504		CommonProt(    space->machine, 3, 0x09 );
	453	ProtectionOut(space->machine, 0, 0); // ?
	454	ProtectionOut(space->machine, 1, 0); // ?
	455	ProtectionOut(space->machine, 2, 0); // ?
	456	CommonProt(space->machine, 3, 0x09);
505	457	break;
506	458
507	459	case 0x0a:
508		CommonProt( space->machine,0,0x0a );
	460	CommonProt(space->machine, 0, 0x0a);
509	461	break;
510	462
511	463	case 0x0c:
512		CommonProt( space->machine,1,0x0c );
	464	CommonProt(space->machine, 1, 0x0c);
513	465	break;
514	466
515	467	case 0x0d:
516		CommonProt( space->machine,2,0x0d );
	468	CommonProt(space->machine, 2, 0x0d);
517	469	break;
518	470
519	471	case 0xfe: /* prepare for memory read from protection device ram (pc == 0x79ee, 0x7a3f) */
520		if( prot_mode == ePROT_WRITE_BYTES )
	472	if (state->prot_mode == ePROT_WRITE_BYTES)
521	473	{
522		prot_mode = ePROT_READ_BYTES;
523		logerror( "[READ BYTES]\n" );
	474	state->prot_mode = ePROT_READ_BYTES;
	475	logerror("[READ BYTES]\n");
524	476	}
525	477	else
526	478	{
527		prot_mode = ePROT_WRITE_BYTES;
528		logerror( "[WRITE BYTES*]\n" );
	479	state->prot_mode = ePROT_WRITE_BYTES;
	480	logerror("[WRITE BYTES*]\n");
529	481	}
530		prot_offs = 0;
	482	state->prot_offs = 0;
531	483	break;
532	484
533	485	case 0xff: /* read DSW (pc == 0x714d) */
534		ProtectionOut( 0,input_port_read(space->machine, "DSW1") ); /* DSW1 */
535		prot_mode = ePROT_WAIT_DSW1_WRITEBACK;
	486	ProtectionOut(space->machine, 0, input_port_read(space->machine, "DSW1")); /* DSW1 */
	487	state->prot_mode = ePROT_WAIT_DSW1_WRITEBACK;
536	488	break;
537	489
538	490	case 0xa9: /* 1-player game: P1 dies
539	491	2-player game: P2 dies */
540		if( lives[0]>0 && lives[1]>0 )
	492	if (state->lives[0] > 0 && state->lives[1] > 0 )
541	493	{
542		lives[1]--;
543		logerror( "%02x P2 DIE(%d)\n", data, lives[1] );
	494	state->lives[1]--;
	495	logerror("%02x P2 DIE(%d)\n", data, state->lives[1]);
544	496	}
545		else if( lives[0]>0 )
	497	else if (state->lives[0] > 0)
546	498	{
547		lives[0]--;
548		logerror( "%02x P1 DIE(%d)\n", data, lives[0] );
	499	state->lives[0]--;
	500	logerror("%02x P1 DIE(%d)\n", data, state->lives[0]);
549	501	}
550	502	else
551	503	{
552		logerror( "%02x COMPLETE.\n", data );
553		complete = 0xa9;
	504	logerror("%02x COMPLETE.\n", data);
	505	state->complete = 0xa9;
554	506	}
555	507	break;
556	508
557	509	case 0x92: /* p2 lost life; in 2-p game, P1 died */
558		if( lives[0]>0 && lives[1]>0 )
	510	if (state->lives[0] > 0 && state->lives[1] > 0 )
559	511	{
560		lives[0]--;
561		logerror( "%02x P1 DIE(%d)\n", data, lives[0] );
	512	state->lives[0]--;
	513	logerror("%02x P1 DIE(%d)\n", data, state->lives[0]);
562	514	}
563		else if( lives[1]>0 )
	515	else if (state->lives[1] > 0)
564	516	{
565		lives[1]--;
566		logerror( "%02x P2 DIE (%d)\n", data, lives[1] );
	517	state->lives[1]--;
	518	logerror("%02x P2 DIE (%d)\n", data, state->lives[1]);
567	519	}
568	520	else
569	521	{
570		logerror( "%02x COMPLETE.\n", data );
571		complete = 0x92;
	522	logerror("%02x COMPLETE.\n", data);
	523	state->complete = 0x92;
572	524	}
573	525	break;
574	526
575	527	case 0xa3: /* p2 bonus life */
576		lives[1]++;
577		logerror( "%02x P2 BONUS(%d)\n", data, lives[1] );
	528	state->lives[1]++;
	529	logerror("%02x P2 BONUS(%d)\n", data, state->lives[1]);
578	530	break;
579	531
580	532	case 0xa5: /* p1 bonus life */
581		lives[0]++;
582		logerror( "%02x P1 BONUS(%d)\n", data, lives[0] );
	533	state->lives[0]++;
	534	logerror("%02x P1 BONUS(%d)\n", data, state->lives[0]);
583	535	break;
584	536
585	537	case 0xad: /* 1p game start ack */
586		logerror( "%02x 1P GAME START\n", data );
	538	logerror("%02x 1P GAME START\n", data);
587	539	break;
588	540
589	541	case 0xb0: /* 1p+2p game start ack */
590		logerror( "%02x 1P+2P GAME START\n", data );
	542	logerror("%02x 1P+2P GAME START\n", data);
591	543	break;
592	544
593	545	case 0xb3: /* 1p continue ack */
594		logerror( "%02x 1P CONTINUE\n", data );
	546	logerror("%02x 1P CONTINUE\n", data);
595	547	break;
596	548
597	549	case 0xb7: /* 2p continue ack */
598		logerror( "%02x 2P CONTINUE\n", data );
	550	logerror("%02x 2P CONTINUE\n", data);
599	551	break;
600	552
601	553	default:
602	554	case 0x97:
603	555	case 0x9a:
604		logerror( "!!0x%04x: prot_w(0x%02x)\n", cpu_get_pc(space->cpu), data );
	556	logerror("!!0x%04x: prot_w(0x%02x)\n", cpu_get_pc(space->cpu), data);
605	557	break;
606	558	}
607	559	}
r6740	r6741
609	561
610	562	static READ8_HANDLER( beast_data_r )
611	563	{ /* port#4 */
	564	djboy_state *state = (djboy_state *)space->machine->driver_data;
612	565	UINT8 data = 0x00;
613		if( prot_available_data_count )
	566	if (state->prot_available_data_count)
614	567	{
615	568	int i;
616		data = prot_output_buffer[0];
617		prot_available_data_count--;
618		for( i=0; i<prot_available_data_count; i++ )
619		{
620		prot_output_buffer[i] = prot_output_buffer[i+1];
621		}
	569	data = state->prot_output_buffer[0];
	570	state->prot_available_data_count--;
	571	for (i = 0; i < state->prot_available_data_count; i++)
	572	state->prot_output_buffer[i] = state->prot_output_buffer[i + 1];
622	573	}
623	574	else
624	575	{
625		logerror( "prot_r: data expected!\n" );
	576	logerror("prot_r: data expected!\n");
626	577	}
627		logerror( "0x%04x: prot_r() == 0x%02x\n", cpu_get_pc(space->cpu), data );
	578	logerror("0x%04x: prot_r() == 0x%02x\n", cpu_get_pc(space->cpu), data);
628	579	return data;
629	580	} /* beast_data_r */
630	581
631	582	static READ8_HANDLER( beast_status_r )
632	583	{ /* port 0xc */
	584	djboy_state *state = (djboy_state *)space->machine->driver_data;
633	585	UINT8 result = 0;
634		if( prot_busy_count )
	586
	587	if (state->prot_busy_count)
635	588	{
636		prot_busy_count--;
637		result |= 1<<3;
	589	state->prot_busy_count--;
	590	result |= 1 << 3;
638	591	}
639		if( !prot_available_data_count )
	592	if (!state->prot_available_data_count)
640	593	{
641		result |= 1<<2;
	594	result |= 1 << 2;
642	595	}
643	596	return result;
644	597	} /* beast_status_r */
645	598
646	599	/******************************************************************************/
647		static DRIVER_INIT( djboy )
648		{
649		coin = 0;
650		complete = 0;
651		memset(lives, 0, sizeof(lives));
652		addr = 0xff;
653		bankxor = 0x00;
654		}
655	600
656		static DRIVER_INIT( djboyj )
657		{
658		DRIVER_INIT_CALL( djboy );
659		bankxor = 0x1f;
660		}
661
662	601	static WRITE8_HANDLER( trigger_nmi_on_cpu0 )
663	602	{
664		cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
	603	djboy_state *state = (djboy_state *)space->machine->driver_data;
	604	cpu_set_input_line(state->maincpu, INPUT_LINE_NMI, PULSE_LINE);
665	605	}
666	606
667	607	static WRITE8_HANDLER( cpu0_bankswitch_w )
668	608	{
669		unsigned char *RAM = memory_region(space->machine, "maincpu");
670		data ^= bankxor;
671		memory_set_bankptr(space->machine, "bank4",&RAM[0x10000]); /* unsure if/how this area is banked */
672		if( data < 4 )
673		{
674		RAM = &RAM[0x2000 * data];
675		}
676		else
677		{
678		RAM = &RAM[0x10000 + 0x2000 * (data-4)];
679		}
680		memory_set_bankptr(space->machine, "bank1",RAM);
	609	djboy_state *state = (djboy_state *)space->machine->driver_data;
	610
	611	data ^= state->bankxor;
	612	memory_set_bank(space->machine, "bank1", data);
	613	memory_set_bank(space->machine, "bank4", 0); /* unsure if/how this area is banked */
681	614	}
682	615
683	616	/******************************************************************************/
r6740	r6741
690	623	*/
691	624	static WRITE8_HANDLER( cpu1_bankswitch_w )
692	625	{
693		UINT8 *RAM = memory_region(space->machine, "cpu1");
694		djboy_set_videoreg( data );
695		switch( data&0xf )
	626	djboy_state *state = (djboy_state *)space->machine->driver_data;
	627	state->videoreg = data;
	628
	629	switch (data & 0xf)
696	630	{
697	631	/* bs65.5y */
698		case 0x00: memory_set_bankptr(space->machine, "bank2",&RAM[0x00000]); break;
699		case 0x01: memory_set_bankptr(space->machine, "bank2",&RAM[0x04000]); break;
700		case 0x02: memory_set_bankptr(space->machine, "bank2",&RAM[0x10000]); break;
701		case 0x03: memory_set_bankptr(space->machine, "bank2",&RAM[0x14000]); break;
	632	case 0x00:
	633	case 0x01:
	634	case 0x02:
	635	case 0x03:
	636	memory_set_bank(space->machine, "bank2", (data & 0xf));
	637	break;
702	638
703	639	/* bs101.6w */
704		case 0x08: memory_set_bankptr(space->machine, "bank2",&RAM[0x18000]); break;
705		case 0x09: memory_set_bankptr(space->machine, "bank2",&RAM[0x1c000]); break;
706		case 0x0a: memory_set_bankptr(space->machine, "bank2",&RAM[0x20000]); break;
707		case 0x0b: memory_set_bankptr(space->machine, "bank2",&RAM[0x24000]); break;
708		case 0x0c: memory_set_bankptr(space->machine, "bank2",&RAM[0x28000]); break;
709		case 0x0d: memory_set_bankptr(space->machine, "bank2",&RAM[0x2c000]); break;
710		case 0x0e: memory_set_bankptr(space->machine, "bank2",&RAM[0x30000]); break;
711		case 0x0f: memory_set_bankptr(space->machine, "bank2",&RAM[0x34000]); break;
	640	case 0x08:
	641	case 0x09:
	642	case 0x0a:
	643	case 0x0b:
	644	case 0x0c:
	645	case 0x0d:
	646	case 0x0e:
	647	case 0x0f:
	648	memory_set_bank(space->machine, "bank2", (data & 0xf) - 4);
	649	break;
712	650
713	651	default:
714	652	break;
r6740	r6741
719	657
720	658	static WRITE8_HANDLER( trigger_nmi_on_sound_cpu2 )
721	659	{
	660	djboy_state *state = (djboy_state *)space->machine->driver_data;
722	661	soundlatch_w(space, 0, data);
723		cputag_set_input_line(space->machine, "cpu2", INPUT_LINE_NMI, PULSE_LINE);
	662	cpu_set_input_line(state->cpu2, INPUT_LINE_NMI, PULSE_LINE);
724	663	} /* trigger_nmi_on_sound_cpu2 */
725	664
726	665	static WRITE8_HANDLER( cpu2_bankswitch_w )
727	666	{
728		UINT8 *RAM = memory_region(space->machine, "cpu2");
729
730		if( data < 3 )
731		{
732		RAM = &RAM[0x04000 * data];
733		}
734		else
735		{
736		RAM = &RAM[0x10000 + 0x4000 * (data - 3)];
737		}
738		memory_set_bankptr(space->machine, "bank3", RAM);
	667	memory_set_bank(space->machine, "bank3", data);   // shall we check data<0x07?
739	668	}
740	669
741	670	/******************************************************************************/
r6740	r6741
760	689	static ADDRESS_MAP_START( cpu1_am, ADDRESS_SPACE_PROGRAM, 8 )
761	690	AM_RANGE(0x0000, 0x7fff) AM_ROM
762	691	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank2")
763		AM_RANGE(0xc000, 0xcfff) AM_RAM_WRITE(djboy_videoram_w) AM_BASE_GENERIC(videoram)
764		AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(djboy_paletteram_w) AM_BASE_GENERIC(paletteram)
	692	AM_RANGE(0xc000, 0xcfff) AM_RAM_WRITE(djboy_videoram_w) AM_BASE_MEMBER(djboy_state, videoram)
	693	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(djboy_paletteram_w) AM_BASE_MEMBER(djboy_state, paletteram)
765	694	AM_RANGE(0xd400, 0xd8ff) AM_RAM
766	695	AM_RANGE(0xe000, 0xffff) AM_RAM AM_SHARE("share1")
767	696	ADDRESS_MAP_END
r6740	r6741
903	832
904	833	static INTERRUPT_GEN( djboy_interrupt )
905	834	{ /* CPU1 uses interrupt mode 2. For now, just alternate the two interrupts. */
906		addr ^= 0x02;
907		cpu_set_input_line_and_vector(device, 0, HOLD_LINE, addr);
	835	djboy_state *state = (djboy_state *)device->machine->driver_data;
	836	state->addr ^= 0x02;
	837	cpu_set_input_line_and_vector(device, 0, HOLD_LINE, state->addr);
908	838	}
909	839
910	840	static const kaneko_pandora_interface djboy_pandora_config =
r6740	r6741
914	844	0, 0   /* x_offs, y_offs */
915	845	};
916	846
	847
	848	static MACHINE_START( djboy )
	849	{
	850	djboy_state *state = (djboy_state *)machine->driver_data;
	851	UINT8 *MAIN = memory_region(machine, "maincpu");
	852	UINT8 *CPU1 = memory_region(machine, "cpu1");
	853	UINT8 *CPU2 = memory_region(machine, "cpu2");
	854
	855	memory_configure_bank(machine, "bank1", 0, 4,  &MAIN[0x00000], 0x2000);
	856	memory_configure_bank(machine, "bank1", 4, 28, &MAIN[0x10000], 0x2000);
	857	memory_configure_bank(machine, "bank2", 0, 2,  &CPU1[0x00000], 0x4000);
	858	memory_configure_bank(machine, "bank2", 2, 10, &CPU1[0x10000], 0x4000);
	859	memory_configure_bank(machine, "bank3", 0, 3,  &CPU2[0x00000], 0x4000);
	860	memory_configure_bank(machine, "bank3", 3, 5,  &CPU2[0x10000], 0x4000);
	861	memory_configure_bank(machine, "bank4", 0, 1,  &MAIN[0x10000], 0x3000); /* unsure if/how this area is banked */
	862
	863	state->maincpu = devtag_get_device(machine, "maincpu");
	864	state->cpu1 = devtag_get_device(machine, "cpu1");
	865	state->cpu2 = devtag_get_device(machine, "cpu2");
	866	state->pandora = devtag_get_device(machine, "pandora");
	867
	868	state_save_register_global(machine, state->videoreg);
	869	state_save_register_global(machine, state->scrollx);
	870	state_save_register_global(machine, state->scrolly);
	871
	872	/* Kaneko BEAST */
	873	state_save_register_global(machine, state->coin);
	874	state_save_register_global(machine, state->complete);
	875	state_save_register_global(machine, state->addr);
	876	state_save_register_global_array(machine, state->lives);
	877
	878	state_save_register_global(machine, state->mDjBoyState );
	879	state_save_register_global(machine, state->prot_mode);
	880	state_save_register_global(machine, state->prot_busy_count);
	881	state_save_register_global(machine, state->prot_available_data_count);
	882	state_save_register_global(machine, state->prot_offs);
	883	state_save_register_global_array(machine, state->prot_output_buffer);
	884	state_save_register_global_array(machine, state->prot_ram);
	885	state_save_register_global_array(machine, state->prot_param);
	886	}
	887
	888	static MACHINE_RESET( djboy )
	889	{
	890	djboy_state *state = (djboy_state *)machine->driver_data;
	891
	892	state->videoreg = 0;
	893	state->scrollx = 0;
	894	state->scrolly = 0;
	895
	896	/* Kaneko BEAST */
	897	state->coin = 0;
	898	state->complete = 0;
	899	state->addr = 0xff;
	900	state->lives[0] = 0;
	901	state->lives[1] = 0;
	902
	903	state->prot_busy_count = 0;
	904	state->prot_available_data_count = 0;
	905	state->prot_offs = 0;
	906
	907	memset(state->prot_output_buffer, 0, PROT_OUTPUT_BUFFER_SIZE);
	908	memset(state->prot_ram, 0, 0x80);
	909	memset(state->prot_param, 0, 8);
	910
	911	state->mDjBoyState = eDJBOY_ATTRACT_HIGHSCORE;
	912	state->prot_mode = ePROT_NORMAL;
	913	}
	914
917	915	static MACHINE_DRIVER_START( djboy )
	916	MDRV_DRIVER_DATA(djboy_state)
	917
918	918	MDRV_CPU_ADD("maincpu", Z80,6000000)
919	919	MDRV_CPU_PROGRAM_MAP(cpu0_am)
920	920	MDRV_CPU_IO_MAP(cpu0_port_am)
r6740	r6741
932	932
933	933	MDRV_QUANTUM_TIME(HZ(6000))
934	934
	935	MDRV_MACHINE_START(djboy)
	936	MDRV_MACHINE_RESET(djboy)
	937
935	938	MDRV_SCREEN_ADD("screen", RASTER)
936	939	MDRV_SCREEN_REFRESH_RATE(60)
937	940	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
r6740	r6741
1072	1075	ROM_END
1073	1076
1074	1077
	1078	static DRIVER_INIT( djboy )
	1079	{
	1080	djboy_state *state = (djboy_state *)machine->driver_data;
	1081	state->bankxor = 0x00;
	1082	}
1075	1083
	1084	static DRIVER_INIT( djboyj )
	1085	{
	1086	djboy_state *state = (djboy_state *)machine->driver_data;
	1087	state->bankxor = 0x1f;
	1088	}
	1089
1076	1090	/*     YEAR, NAME,  PARENT, MACHINE, INPUT, INIT, MNTR,  COMPANY, FULLNAME, FLAGS */
1077		GAME( 1989, djboy,  0,      djboy,   djboy, djboy,    ROT0, "Kaneko (American Sammy license)", "DJ Boy (set 1)", 0) // Sammy & Williams logos in FG ROM
1078		GAME( 1989, djboya, djboy,  djboy,   djboy, djboy,    ROT0, "Kaneko (American Sammy license)", "DJ Boy (set 2)", 0) // Sammy & Williams logos in FG ROM
1079		GAME( 1989, djboyj, djboy,  djboy,   djboy, djboyj,   ROT0, "Kaneko (Sega license)", "DJ Boy (Japan)", 0 ) // Sega logo in FG ROM
	1091	GAME( 1989, djboy,  0,      djboy,   djboy, djboy,    ROT0, "Kaneko (American Sammy license)", "DJ Boy (set 1)", GAME_SUPPORTS_SAVE) // Sammy & Williams logos in FG ROM
	1092	GAME( 1989, djboya, djboy,  djboy,   djboy, djboy,    ROT0, "Kaneko (American Sammy license)", "DJ Boy (set 2)", GAME_SUPPORTS_SAVE) // Sammy & Williams logos in FG ROM
	1093	GAME( 1989, djboyj, djboy,  djboy,   djboy, djboyj,   ROT0, "Kaneko (Sega license)", "DJ Boy (Japan)", GAME_SUPPORTS_SAVE ) // Sega logo in FG ROM

src/mame/drivers/sidearms.c

r6740	r6741
40	40	#include "sound/2203intf.h"
41	41	#include "sound/2151intf.h"
42	42
	43	extern UINT8 *sidearms_videoram;
	44	extern UINT8 *sidearms_colorram;
43	45	extern UINT8 *sidearms_bg_scrollx;
44	46	extern UINT8 *sidearms_bg_scrolly;
45	47
r6740	r6741
99	101	AM_RANGE(0xc808, 0xc809) AM_WRITEONLY AM_BASE(&sidearms_bg_scrollx)
100	102	AM_RANGE(0xc80a, 0xc80b) AM_WRITEONLY AM_BASE(&sidearms_bg_scrolly)
101	103	AM_RANGE(0xc80c, 0xc80c) AM_WRITE(sidearms_gfxctrl_w)   /* background and sprite enable */
102		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE_GENERIC(videoram)
103		AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE_GENERIC(colorram)
	104	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE(&sidearms_videoram)
	105	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE(&sidearms_colorram)
104	106	AM_RANGE(0xe000, 0xefff) AM_RAM
105	107	AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
106	108	ADDRESS_MAP_END
r6740	r6741
122	124	AM_RANGE(0xe808, 0xe809) AM_WRITEONLY AM_BASE(&sidearms_bg_scrollx)
123	125	AM_RANGE(0xe80a, 0xe80b) AM_WRITEONLY AM_BASE(&sidearms_bg_scrolly)
124	126	AM_RANGE(0xe80c, 0xe80c) AM_WRITE(sidearms_gfxctrl_w)   /* background and sprite enable */
125		AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE_GENERIC(videoram)
126		AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE_GENERIC(colorram)
	127	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE(&sidearms_videoram)
	128	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE(&sidearms_colorram)
127	129	ADDRESS_MAP_END
128	130
129	131	static ADDRESS_MAP_START( sidearms_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
172	174	AM_RANGE(0xe805, 0xe805) AM_WRITE(sidearms_star_scrollx_w)
173	175	AM_RANGE(0xe806, 0xe806) AM_WRITE(sidearms_star_scrolly_w)
174	176	AM_RANGE(0xc80c, 0xc80c) AM_WRITE(sidearms_gfxctrl_w)
175		AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE_GENERIC(videoram)
176		AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE_GENERIC(colorram)
	177	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE(&sidearms_videoram)
	178	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE(&sidearms_colorram)
177	179	AM_RANGE(0xe000, 0xefff) AM_RAM
178	180	AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
179	181	ADDRESS_MAP_END

src/mame/drivers/taito_x.c

r6740	r6741
313	313	#include "driver.h"
314	314	#include "cpu/z80/z80.h"
315	315	#include "cpu/m68000/m68000.h"
316		#include "taitoipt.h"
	316	#include "includes/taitoipt.h"
317	317	#include "audio/taitosnd.h"
318		#include "seta.h"
	318	#include "includes/seta.h"
319	319	#include "sound/2610intf.h"
320	320	#include "sound/2151intf.h"
321	321	#include "includes/cchip.h"

src/mame/drivers/tumblep.c

r6740	r6741
42	42	#include "driver.h"
43	43	#include "cpu/m68000/m68000.h"
44	44	#include "cpu/h6280/h6280.h"
45		#include "decocrpt.h"
	45	#include "includes/decocrpt.h"
46	46	#include "sound/2151intf.h"
47	47	#include "sound/3812intf.h"
48	48	#include "sound/okim6295.h"
49		#include "deco16ic.h"
	49	#include "includes/deco16ic.h"
50	50
51	51	#define TUMBLEP_HACK   0
52	52

src/mame/drivers/dietgo.c

r6740	r6741
9	9	#include "cpu/h6280/h6280.h"
10	10	#include "sound/2151intf.h"
11	11	#include "sound/okim6295.h"
12		#include "decocrpt.h"
13		#include "decoprot.h"
14		#include "deco16ic.h"
	12	#include "includes/decocrpt.h"
	13	#include "includes/decoprot.h"
	14	#include "includes/deco16ic.h"
15	15
16	16	VIDEO_UPDATE( dietgo );
17	17	VIDEO_START( dietgo );

src/mame/drivers/esripsys.c

r6740	r6741
31	31	#include "machine/6840ptm.h"
32	32	#include "sound/dac.h"
33	33	#include "sound/tms5220.h"
34		#include "esripsys.h"
	34	#include "includes/esripsys.h"
35	35
36	36
37	37	/*************************************

src/mame/drivers/blockout.c

r6740	r6741
70	70	#include "cpu/z80/z80.h"
71	71	#include "sound/2151intf.h"
72	72	#include "sound/okim6295.h"
73		#include "blockout.h"
	73	#include "includes/blockout.h"
74	74
75	75
76	76	static INTERRUPT_GEN( blockout_interrupt )

src/mame/drivers/tsamurai.c

r6740	r6741
47	47	#include "sound/ay8910.h"
48	48	#include "sound/dac.h"
49	49
	50	extern UINT8 *tsamurai_videoram;
	51	extern UINT8 *tsamurai_colorram;
	52	extern UINT8 *tsamurai_bg_videoram;
	53
50	54	WRITE8_HANDLER( vsgongf_color_w );
51	55
52	56	WRITE8_HANDLER( tsamurai_bgcolor_w );
r6740	r6741
60	64	WRITE8_HANDLER( tsamurai_fg_videoram_w );
61	65	WRITE8_HANDLER( tsamurai_fg_colorram_w );
62	66	extern VIDEO_START( tsamurai );
63		extern UINT8 *tsamurai_videoram;
64	67
65	68	extern VIDEO_START( vsgongf );
66	69	extern VIDEO_UPDATE( vsgongf );
r6740	r6741
142	145	AM_RANGE(0xd900, 0xd900) AM_READ(unknown_d900_r)
143	146	AM_RANGE(0xd938, 0xd938) AM_READ(unknown_d938_r)
144	147
145		AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(tsamurai_fg_videoram_w) AM_BASE_GENERIC(videoram)
146		AM_RANGE(0xe400, 0xe43f) AM_RAM_WRITE(tsamurai_fg_colorram_w) AM_BASE_GENERIC(colorram)
	148	AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(tsamurai_fg_videoram_w) AM_BASE(&tsamurai_videoram)
	149	AM_RANGE(0xe400, 0xe43f) AM_RAM_WRITE(tsamurai_fg_colorram_w) AM_BASE(&tsamurai_colorram)
147	150	AM_RANGE(0xe440, 0xe7ff) AM_RAM
148		AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(tsamurai_bg_videoram_w) AM_BASE(&tsamurai_videoram)
	151	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(tsamurai_bg_videoram_w) AM_BASE(&tsamurai_bg_videoram)
149	152	AM_RANGE(0xf000, 0xf3ff) AM_RAM AM_BASE_GENERIC(spriteram)
150	153
151	154	AM_RANGE(0xf400, 0xf400) AM_WRITENOP
r6740	r6741
175	178	AM_RANGE(0xd900, 0xd900) AM_READ(unknown_d900_r)
176	179	AM_RANGE(0xd938, 0xd938) AM_READ(unknown_d938_r)
177	180
178		AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(tsamurai_fg_videoram_w) AM_BASE_GENERIC(videoram)
179		AM_RANGE(0xe400, 0xe43f) AM_RAM_WRITE(tsamurai_fg_colorram_w) AM_BASE_GENERIC(colorram)
	181	AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(tsamurai_fg_videoram_w) AM_BASE(&tsamurai_videoram)
	182	AM_RANGE(0xe400, 0xe43f) AM_RAM_WRITE(tsamurai_fg_colorram_w) AM_BASE(&tsamurai_colorram)
180	183	AM_RANGE(0xe440, 0xe7ff) AM_RAM
181		AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(tsamurai_bg_videoram_w) AM_BASE(&tsamurai_videoram)
	184	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(tsamurai_bg_videoram_w) AM_BASE(&tsamurai_bg_videoram)
182	185	AM_RANGE(0xf000, 0xf3ff) AM_RAM AM_BASE_GENERIC(spriteram)
183	186
184	187	AM_RANGE(0xf400, 0xf400) AM_WRITENOP/* This is always written with F401, F402 & F403 data */
r6740	r6741
335	338	AM_RANGE(0xa006, 0xa006) AM_READ(vsgongf_a006_r) /* protection */
336	339	AM_RANGE(0xa100, 0xa100) AM_READ(vsgongf_a100_r) /* protection */
337	340	AM_RANGE(0xc000, 0xc7ff) AM_RAM                /* work ram */
338		AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(tsamurai_fg_videoram_w) AM_BASE_GENERIC(videoram)
	341	AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(tsamurai_fg_videoram_w) AM_BASE(&tsamurai_videoram)
339	342	AM_RANGE(0xe400, 0xe43f) AM_RAM AM_BASE_GENERIC(spriteram)
340	343	AM_RANGE(0xe440, 0xe47b) AM_RAM
341	344	AM_RANGE(0xe800, 0xe800) AM_WRITE(vsgongf_sound_command_w)

src/mame/drivers/f1gp.c

r6740	r6741
1	1	/***************************************************************************
2	2
3		F-1 Grand Prix       (c) 1991 Video System Co.
	3	F-1 Grand Prix       (c) 1991 Video System Co.
4	4
5		driver by Nicola Salmoria
	5	driver by Nicola Salmoria
6	6
7		Notes:
8		- The ROZ layer generator is a Konami 053936.
9		- f1gp2's hardware is very similar to Lethal Crash Race, main difference
10		being an extra 68000.
	7	Notes:
	8	- The ROZ layer generator is a Konami 053936.
	9	- f1gp2's hardware is very similar to Lethal Crash Race, main difference
	10	being an extra 68000.
11	11
12		TODO:
13		f1gp:
14		- gfxctrl register not understood - handling of fg/sprite priority to fix
15		"continue" screen is just a kludge.
16		f1gp2:
17		- sprite lag noticeable in the animation at the end of a race (the wheels
18		of the car are sprites while the car is the fg tilemap)
	12	TODO:
	13	f1gp:
	14	- gfxctrl register not understood - handling of fg/sprite priority to fix
	15	"continue" screen is just a kludge.
	16	f1gp2:
	17	- sprite lag noticeable in the animation at the end of a race (the wheels
	18	of the car are sprites while the car is the fg tilemap)
19	19
20	20	***************************************************************************/
21	21
22	22	#include "driver.h"
23	23	#include "cpu/z80/z80.h"
24	24	#include "cpu/m68000/m68000.h"
25		#include "video/konamiic.h"
26		#include "f1gp.h"
	25	#include "video/konicdev.h"
27	26	#include "sound/2610intf.h"
28	27	#include "sound/okim6295.h"
	28	#include "includes/f1gp.h"
29	29
30	30
31		static UINT16 *sharedram;
32
33	31	static READ16_HANDLER( sharedram_r )
34	32	{
35		return sharedram[offset];
	33	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	34	return state->sharedram[offset];
36	35	}
37	36
38	37	static WRITE16_HANDLER( sharedram_w )
39	38	{
40		COMBINE_DATA(&sharedram[offset]);
	39	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	40	COMBINE_DATA(&state->sharedram[offset]);
41	41	}
42	42
43	43	static READ16_HANDLER( extrarom_r )
r6740	r6741
46	46
47	47	offset *= 2;
48	48
49		return rom[offset] | (rom[offset+1] << 8);
	49	return rom[offset] | (rom[offset + 1] << 8);
50	50	}
51	51
52	52	static READ16_HANDLER( extrarom2_r )
r6740	r6741
55	55
56	56	offset *= 2;
57	57
58		return rom[offset] | (rom[offset+1] << 8);
	58	return rom[offset] | (rom[offset + 1] << 8);
59	59	}
60	60
61	61	static WRITE8_HANDLER( f1gp_sh_bankswitch_w )
62	62	{
63		UINT8 *rom = memory_region(space->machine, "audiocpu") + 0x10000;
64
65		memory_set_bankptr(space->machine, "bank1",rom + (data & 0x01) * 0x8000);
	63	memory_set_bank(space->machine, "bank1", data & 0x01);
66	64	}
67	65
68	66
69		static int pending_command;
70
71	67	static WRITE16_HANDLER( sound_command_w )
72	68	{
	69	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	70
73	71	if (ACCESSING_BITS_0_7)
74	72	{
75		pending_command = 1;
	73	state->pending_command = 1;
76	74	soundlatch_w(space, offset, data & 0xff);
77		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
	75	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE);
78	76	}
79	77	}
80	78
81	79	static READ16_HANDLER( command_pending_r )
82	80	{
83		return (pending_command ? 0xff : 0);
	81	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	82	return (state->pending_command ? 0xff : 0);
84	83	}
85	84
86	85	static WRITE8_HANDLER( pending_command_clear_w )
87	86	{
88		pending_command = 0;
	87	f1gp_state *state = (f1gp_state *)space->machine->driver_data;
	88	state->pending_command = 0;
89	89	}
90	90
91	91
92
93	92	static ADDRESS_MAP_START( f1gp_cpu1_map, ADDRESS_SPACE_PROGRAM, 16 )
94	93	AM_RANGE(0x000000, 0x03ffff) AM_ROM
95	94	AM_RANGE(0x100000, 0x2fffff) AM_READ(extrarom_r)
96	95	AM_RANGE(0xa00000, 0xbfffff) AM_READ(extrarom2_r)
97	96	AM_RANGE(0xc00000, 0xc3ffff) AM_READWRITE(f1gp_zoomdata_r, f1gp_zoomdata_w)
98		AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram)
99		AM_RANGE(0xd02000, 0xd03fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram) /* mirror */
100		AM_RANGE(0xd04000, 0xd05fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram) /* mirror */
101		AM_RANGE(0xd06000, 0xd07fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram) /* mirror */
102		AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE(&f1gp_spr1cgram) AM_SIZE(&f1gp_spr1cgram_size)            // SPR-1 CG RAM
103		AM_RANGE(0xe04000, 0xe07fff) AM_RAM AM_BASE(&f1gp_spr2cgram) AM_SIZE(&f1gp_spr2cgram_size)            // SPR-2 CG RAM
104		AM_RANGE(0xf00000, 0xf003ff) AM_RAM AM_BASE(&f1gp_spr1vram)                                    // SPR-1 VRAM
105		AM_RANGE(0xf10000, 0xf103ff) AM_RAM AM_BASE(&f1gp_spr2vram)                                    // SPR-2 VRAM
106		AM_RANGE(0xff8000, 0xffbfff) AM_RAM                                                      // WORK RAM-1
107		AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&sharedram)               // DUAL RAM
108		AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(f1gp_fgvideoram_w) AM_BASE(&f1gp_fgvideoram)               // CHARACTER
	97	AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE_MEMBER(f1gp_state, rozvideoram)
	98	AM_RANGE(0xd02000, 0xd03fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w)                       /* mirror */
	99	AM_RANGE(0xd04000, 0xd05fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w)                       /* mirror */
	100	AM_RANGE(0xd06000, 0xd07fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w)                       /* mirror */
	101	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_SIZE_MEMBER(f1gp_state, spr1cgram, spr1cgram_size)            // SPR-1 CG RAM
	102	AM_RANGE(0xe04000, 0xe07fff) AM_RAM AM_BASE_SIZE_MEMBER(f1gp_state, spr2cgram, spr2cgram_size)            // SPR-2 CG RAM
	103	AM_RANGE(0xf00000, 0xf003ff) AM_RAM AM_BASE_MEMBER(f1gp_state, spr1vram)                        // SPR-1 VRAM
	104	AM_RANGE(0xf10000, 0xf103ff) AM_RAM AM_BASE_MEMBER(f1gp_state, spr2vram)                        // SPR-2 VRAM
	105	AM_RANGE(0xff8000, 0xffbfff) AM_RAM                                             // WORK RAM-1
	106	AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE_MEMBER(f1gp_state, sharedram)      // DUAL RAM
	107	AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(f1gp_fgvideoram_w) AM_BASE_MEMBER(f1gp_state, fgvideoram)         // CHARACTER
109	108	AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)   // PALETTE
110	109	AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("INPUTS")
111	110	AM_RANGE(0xfff000, 0xfff001) AM_WRITE(f1gp_gfxctrl_w)
r6740	r6741
115	114	AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW2")
116	115	AM_RANGE(0xfff008, 0xfff009) AM_READ(command_pending_r)
117	116	AM_RANGE(0xfff008, 0xfff009) AM_WRITE(sound_command_w)
118		AM_RANGE(0xfff040, 0xfff05f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
	117	AM_RANGE(0xfff040, 0xfff05f) AM_DEVWRITE("k053936", k053936_ctrl_w)
119	118	AM_RANGE(0xfff050, 0xfff051) AM_READ_PORT("DSW3")
120	119	ADDRESS_MAP_END
121	120
122	121	static ADDRESS_MAP_START( f1gp2_cpu1_map, ADDRESS_SPACE_PROGRAM, 16 )
123	122	AM_RANGE(0x000000, 0x03ffff) AM_ROM
124	123	AM_RANGE(0x100000, 0x2fffff) AM_READ(extrarom_r)
125		AM_RANGE(0xa00000, 0xa07fff) AM_RAM AM_BASE(&f1gp2_sprcgram)                                       // SPR-1 CG RAM + SPR-2 CG RAM
126		AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram)   // BACK VRAM
127		AM_RANGE(0xe00000, 0xe00fff) AM_RAM AM_BASE(&f1gp2_spritelist)                                       // not checked + SPR-1 VRAM + SPR-2 VRAM
128		AM_RANGE(0xff8000, 0xffbfff) AM_RAM                                                            // WORK RAM-1
129		AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&sharedram)                     // DUAL RAM
130		AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(f1gp_fgvideoram_w) AM_BASE(&f1gp_fgvideoram)                     // CHARACTER
	124	AM_RANGE(0xa00000, 0xa07fff) AM_RAM AM_BASE_MEMBER(f1gp_state, sprcgram)                           // SPR-1 CG RAM + SPR-2 CG RAM
	125	AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE_MEMBER(f1gp_state, rozvideoram)   // BACK VRAM
	126	AM_RANGE(0xe00000, 0xe00fff) AM_RAM AM_BASE_MEMBER(f1gp_state, spritelist)                     // not checked + SPR-1 VRAM + SPR-2 VRAM
	127	AM_RANGE(0xff8000, 0xffbfff) AM_RAM                                                // WORK RAM-1
	128	AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE_MEMBER(f1gp_state, sharedram)         // DUAL RAM
	129	AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(f1gp_fgvideoram_w) AM_BASE_MEMBER(f1gp_state, fgvideoram)            // CHARACTER
131	130	AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)         // PALETTE
132	131	AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("INPUTS") AM_WRITE(f1gp2_gfxctrl_w)
133	132	//  AM_RANGE(0xfff002, 0xfff003)    analog wheel?
r6740	r6741
135	134	AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW2")
136	135	AM_RANGE(0xfff008, 0xfff009) AM_READWRITE(command_pending_r, sound_command_w)
137	136	AM_RANGE(0xfff00a, 0xfff00b) AM_READ_PORT("DSW3")
138		AM_RANGE(0xfff020, 0xfff02f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
	137	AM_RANGE(0xfff020, 0xfff03f) AM_DEVWRITE("k053936", k053936_ctrl_w)
139	138	AM_RANGE(0xfff044, 0xfff047) AM_WRITE(f1gp_fgscroll_w)
140	139	ADDRESS_MAP_END
141	140
r6740	r6741
188	187	AM_RANGE(0x000000, 0x03ffff) AM_ROM
189	188	AM_RANGE(0x100000, 0x2fffff) AM_READ(extrarom_r)
190	189	AM_RANGE(0xa00000, 0xbfffff) AM_READ(extrarom2_r)
191		AM_RANGE(0x800000, 0x801fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
	190	AM_RANGE(0x800000, 0x801fff) AM_RAM AM_BASE_SIZE_MEMBER(f1gp_state, spriteram, spriteram_size)
192	191	AM_RANGE(0xc00000, 0xc3ffff) AM_READWRITE(f1gp_zoomdata_r, f1gp_zoomdata_w)
193		AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram)
	192	AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE_MEMBER(f1gp_state, rozvideoram)
194	193	AM_RANGE(0xd02000, 0xd03fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w)   /* mirror */
195	194	AM_RANGE(0xd04000, 0xd05fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w)   /* mirror */
196	195	AM_RANGE(0xd06000, 0xd07fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w)   /* mirror */
r6740	r6741
199	198	AM_RANGE(0xf00000, 0xf003ff) AM_RAM //unused
200	199	AM_RANGE(0xf10000, 0xf103ff) AM_RAM //unused
201	200	AM_RANGE(0xff8000, 0xffbfff) AM_RAM
202		AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&sharedram)
203		AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(f1gp_fgvideoram_w) AM_BASE(&f1gp_fgvideoram)
	201	AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE_MEMBER(f1gp_state, sharedram)
	202	AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(f1gp_fgvideoram_w) AM_BASE_MEMBER(f1gp_state, fgvideoram)
204	203	AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
205	204	AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("INPUTS")
206	205	AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW1")
207	206	AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW2")
208	207	AM_RANGE(0xfff008, 0xfff009) AM_READNOP //?
209	208	AM_RANGE(0xfff006, 0xfff007) AM_WRITENOP
210		AM_RANGE(0xfff00a, 0xfff00b) AM_RAM AM_BASE(&f1gpb_fgregs)
	209	AM_RANGE(0xfff00a, 0xfff00b) AM_RAM AM_BASE_MEMBER(f1gp_state, fgregs)
211	210	AM_RANGE(0xfff00e, 0xfff00f) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
212	211	AM_RANGE(0xfff00c, 0xfff00d) AM_WRITE(f1gpb_misc_w)
213	212	AM_RANGE(0xfff010, 0xfff011) AM_WRITENOP
214	213	AM_RANGE(0xfff020, 0xfff023) AM_RAM //?
215	214	AM_RANGE(0xfff050, 0xfff051) AM_READ_PORT("DSW3")
216		AM_RANGE(0xfff800, 0xfff809) AM_RAM AM_BASE(&f1gpb_rozregs)
	215	AM_RANGE(0xfff800, 0xfff809) AM_RAM AM_BASE_MEMBER(f1gp_state, rozregs)
217	216	ADDRESS_MAP_END
218	217
219	218	static ADDRESS_MAP_START( f1gpb_cpu2_map, ADDRESS_SPACE_PROGRAM, 16 )
r6740	r6741
410	409
411	410
412	411
413		static void irqhandler(const device_config *device, int irq)
	412	static void irqhandler( const device_config *device, int irq )
414	413	{
415		cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
	414	f1gp_state *state = (f1gp_state *)device->machine->driver_data;
	415	cpu_set_input_line(state->audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE);
416	416	}
417	417
418	418	static const ym2610_interface ym2610_config =
r6740	r6741
420	420	irqhandler
421	421	};
422	422
	423	static const k053936_interface f1gp_k053936_intf =
	424	{
	425	1, -58, -2   /* wrap, xoff, yoff */
	426	};
423	427
	428	static const k053936_interface f1gp2_k053936_intf =
	429	{
	430	1, -48, -21   /* wrap, xoff, yoff */
	431	};
424	432
	433
	434	static MACHINE_START( f1gpb )
	435	{
	436	f1gp_state *state = (f1gp_state *)machine->driver_data;
	437
	438	state_save_register_global(machine, state->pending_command);
	439	state_save_register_global(machine, state->roz_bank);
	440	state_save_register_global(machine, state->flipscreen);
	441	state_save_register_global(machine, state->gfxctrl);
	442	state_save_register_global_array(machine, state->scroll);
	443	}
	444
	445	static MACHINE_START( f1gp )
	446	{
	447	f1gp_state *state = (f1gp_state *)machine->driver_data;
	448	UINT8 *ROM = memory_region(machine, "audiocpu");
	449
	450	memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x8000);
	451
	452	state->audiocpu = devtag_get_device(machine, "audiocpu");
	453	state->k053936 = devtag_get_device(machine, "k053936");
	454
	455	MACHINE_START_CALL(f1gpb);
	456	}
	457
	458	static MACHINE_RESET( f1gp )
	459	{
	460	f1gp_state *state = (f1gp_state *)machine->driver_data;
	461
	462	state->pending_command = 0;
	463	state->roz_bank = 0;
	464	state->flipscreen = 0;
	465	state->gfxctrl = 0;
	466	state->scroll[0] = 0;
	467	state->scroll[1] = 0;
	468	}
	469
425	470	static MACHINE_DRIVER_START( f1gp )
426	471
	472	/* driver data */
	473	MDRV_DRIVER_DATA(f1gp_state)
	474
427	475	/* basic machine hardware */
428	476	MDRV_CPU_ADD("maincpu",M68000,XTAL_20MHz/2)   /* verified on pcb */
429	477	MDRV_CPU_PROGRAM_MAP(f1gp_cpu1_map)
r6740	r6741
439	487
440	488	MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame */
441	489
	490	MDRV_MACHINE_START(f1gp)
	491	MDRV_MACHINE_RESET(f1gp)
	492
442	493	/* video hardware */
443	494	MDRV_SCREEN_ADD("screen", RASTER)
444	495	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
452	503	MDRV_VIDEO_START(f1gp)
453	504	MDRV_VIDEO_UPDATE(f1gp)
454	505
	506	MDRV_K053936_ADD("k053936", f1gp_k053936_intf)
	507
455	508	/* sound hardware */
456	509	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
457	510
r6740	r6741
466	519
467	520	static MACHINE_DRIVER_START( f1gpb )
468	521
	522	/* driver data */
	523	MDRV_DRIVER_DATA(f1gp_state)
	524
469	525	/* basic machine hardware */
470	526	MDRV_CPU_ADD("maincpu",M68000,10000000)   /* 10 MHz ??? */
471	527	MDRV_CPU_PROGRAM_MAP(f1gpb_cpu1_map)
r6740	r6741
478	534	/* NO sound CPU */
479	535	MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame */
480	536
	537	MDRV_MACHINE_START(f1gpb)
	538	MDRV_MACHINE_RESET(f1gp)
	539
481	540	/* video hardware */
482	541	MDRV_SCREEN_ADD("screen", RASTER)
483	542	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
513	572	MDRV_SCREEN_MODIFY("screen")
514	573	MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 28*8-1)
515	574
	575	MDRV_DEVICE_REMOVE("k053936")
	576	MDRV_K053936_ADD("k053936", f1gp2_k053936_intf)
	577
516	578	MDRV_VIDEO_START(f1gp2)
517	579	MDRV_VIDEO_UPDATE(f1gp2)
518	580	MACHINE_DRIVER_END
r6740	r6741
664	726	ROM_END
665	727
666	728
667		GAME( 1991, f1gp,  0,    f1gp,  f1gp,  0, ROT90, "Video System Co.", "F-1 Grand Prix",         GAME_NO_COCKTAIL )
668		GAME( 1991, f1gpb, f1gp, f1gpb, f1gp,  0, ROT90, "[Video System Co.] (Playmark bootleg)", "F-1 Grand Prix (Playmark bootleg)", GAME_NOT_WORKING ) // PCB marked 'Super Formula II', manufactured by Playmark.
	729	GAME( 1991, f1gp,  0,    f1gp,  f1gp,  0, ROT90, "Video System Co.", "F-1 Grand Prix", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
	730	GAME( 1991, f1gpb, f1gp, f1gpb, f1gp,  0, ROT90, "[Video System Co.] (Playmark bootleg)", "F-1 Grand Prix (Playmark bootleg)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // PCB marked 'Super Formula II', manufactured by Playmark.
669	731
670		GAME( 1992, f1gp2, 0,    f1gp2, f1gp2, 0, ROT90, "Video System Co.", "F-1 Grand Prix Part II", GAME_NO_COCKTAIL )
671
	732	GAME( 1992, f1gp2, 0,    f1gp2, f1gp2, 0, ROT90, "Video System Co.", "F-1 Grand Prix Part II", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )

src/mame/drivers/lvcards.c

r6740	r6741
77	77	#include "cpu/z80/z80.h"
78	78	#include "sound/ay8910.h"
79	79
	80	extern UINT8 *lvcards_videoram;
	81	extern UINT8 *lvcards_colorram;
80	82	extern WRITE8_HANDLER( lvcards_videoram_w );
81	83	extern WRITE8_HANDLER( lvcards_colorram_w );
82	84
r6740	r6741
157	159	static ADDRESS_MAP_START( ponttehk_map, ADDRESS_SPACE_PROGRAM, 8 )
158	160	AM_RANGE(0x0000, 0x5fff) AM_ROM
159	161	AM_RANGE(0x6000, 0x67ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
160		AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(lvcards_videoram_w) AM_BASE_GENERIC(videoram)
161		AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(lvcards_colorram_w) AM_BASE_GENERIC(colorram)
	162	AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(lvcards_videoram_w) AM_BASE(&lvcards_videoram)
	163	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(lvcards_colorram_w) AM_BASE(&lvcards_colorram)
162	164	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
163	165	AM_RANGE(0xa001, 0xa001) AM_READ_PORT("IN1") AM_WRITENOP // lamps
164	166	AM_RANGE(0xa002, 0xa002) AM_READ(payout_r) AM_WRITE(control_port_2a_w)//AM_WRITENOP // ???
r6740	r6741
167	169	static ADDRESS_MAP_START( lvcards_map, ADDRESS_SPACE_PROGRAM, 8  )
168	170	AM_RANGE(0x0000, 0x5fff) AM_ROM
169	171	AM_RANGE(0x6000, 0x67ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
170		AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(lvcards_videoram_w) AM_BASE_GENERIC(videoram)
171		AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(lvcards_colorram_w) AM_BASE_GENERIC(colorram)
	172	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(lvcards_videoram_w) AM_BASE(&lvcards_videoram)
	173	AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(lvcards_colorram_w) AM_BASE(&lvcards_colorram)
172	174	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
173	175	AM_RANGE(0xa001, 0xa001) AM_READ_PORT("IN1") AM_WRITENOP
174	176	AM_RANGE(0xa002, 0xa002) AM_READ_PORT("IN2") AM_WRITENOP
r6740	r6741
184	186	static ADDRESS_MAP_START( lvpoker_map, ADDRESS_SPACE_PROGRAM, 8  )
185	187	AM_RANGE(0x0000, 0x5fff) AM_ROM
186	188	AM_RANGE(0x6000, 0x67ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
187		AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(lvcards_videoram_w) AM_BASE_GENERIC(videoram)
188		AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(lvcards_colorram_w) AM_BASE_GENERIC(colorram)
	189	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(lvcards_videoram_w) AM_BASE(&lvcards_videoram)
	190	AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(lvcards_colorram_w) AM_BASE(&lvcards_colorram)
189	191	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
190	192	AM_RANGE(0xa001, 0xa001) AM_READ_PORT("IN1") AM_WRITENOP // lamps
191	193	AM_RANGE(0xa002, 0xa002) AM_READ(payout_r) AM_WRITE(control_port_2_w)

src/mame/drivers/namcos2.c

r6740	r6741
446	446	#include "cpu/m68000/m68000.h"
447	447	#include "cpu/m6805/m6805.h"
448	448	#include "deprecat.h"
449		#include "namcos2.h"
	449	#include "includes/namcos2.h"
450	450	#include "cpu/m6809/m6809.h"
451		#include "namcoic.h"
	451	#include "includes/namcoic.h"
452	452	#include "sound/2151intf.h"
453	453	#include "sound/c140.h"
454	454

src/mame/drivers/exzisus.c

r6740	r6741
34	34
35	35	#include "driver.h"
36	36	#include "cpu/z80/z80.h"
37		#include "taitoipt.h"
	37	#include "includes/taitoipt.h"
38	38	#include "audio/taitosnd.h"
39	39	#include "sound/2151intf.h"
40	40

src/mame/drivers/tx1.c

r6740	r6741
44	44	#include "machine/8255ppi.h"
45	45	#include "sound/ay8910.h"
46	46	#include "rendlay.h"
47		#include "tx1.h"
	47	#include "includes/tx1.h"
48	48
49	49	#include "tx1.lh"
50	50	#include "buggyboy.lh"

src/mame/drivers/merit.c

r6740	r6741
1293	1293	ROM_LOAD( "chr7.u40",   0x0000, 0x2000, CRC(52298162) SHA1(79aa6c4ab6bec6450d882615e64f61cfef934153) )
1294	1294	ROM_END
1295	1295
1296		ROM_START( pitbossa ) /* Program roms were hand labeled */
	1296	ROM_START( pitbossa )
1297	1297	ROM_REGION( 0x10000, "maincpu", 0 )
1298		ROM_LOAD( "pbhd.u5", 0x0000, 0x2000, CRC(97f870bd) SHA1(b1b01abff0385e3b0585e49f78b93bcf56e434ef) ) /* Games included in this set are: */
1299		ROM_LOAD( "pbhd.u6", 0x2000, 0x2000, CRC(086e699b) SHA1(a1d1eafaac9262f924f175961aa52c6d8e779bf0) ) /* Joker Poker, Blackjack, Foto Finish & The Dice Game */
1300		ROM_LOAD( "pbhd.u7", 0x4000, 0x2000, CRC(023e8cb8) SHA1(cdb180a94d801137466c13ddfaf65918cb608c5a) )
	1298	ROM_LOAD( "2214-03.u5-0c", 0x0000, 0x2000, CRC(97f870bd) SHA1(b1b01abff0385e3b0585e49f78b93bcf56e434ef) ) /* Games included in this set are: */
	1299	ROM_LOAD( "2214-03.u6-0",  0x2000, 0x2000, CRC(086e699b) SHA1(a1d1eafaac9262f924f175961aa52c6d8e779bf0) ) /* Joker Poker, Blackjack, Foto Finish & The Dice Game */
	1300	ROM_LOAD( "2214-03.u7-0",  0x4000, 0x2000, CRC(023e8cb8) SHA1(cdb180a94d801137466c13ddfaf65918cb608c5a) ) /* Roms also found labeled simply as "PBHD" U5 through U7 */
1301	1301
1302	1302	ROM_REGION( 0x6000, "gfx1", 0 )
1303	1303	ROM_LOAD( "chr7.u39",   0x0000, 0x2000, CRC(6662f607) SHA1(6b423f8de011d196700839af0be37effbf87383f) ) /* Shows: */
r6740	r6741
1341	1341
1342	1342	ROM_START( casino5 )
1343	1343	ROM_REGION( 0x10000, "maincpu", 0 )
1344		ROM_LOAD( "u5",           0x0000, 0x2000, CRC(abe240d8) SHA1(296eb3251dd51147d6984a8c08c3be22e5ed8e86) )
1345		ROM_LOAD( "u6",           0x2000, 0x4000, CRC(4d9f0c57) SHA1(d19b4b4f42d329ea35907d17c15a55b954b07295) )
1346		ROM_LOAD( "u7",           0x6000, 0x4000, CRC(d3bc510d) SHA1(6222badabf629dd6334591867596f811883aed52) )
	1344	ROM_LOAD( "u5", 0x0000, 0x2000, CRC(abe240d8) SHA1(296eb3251dd51147d6984a8c08c3be22e5ed8e86) )
	1345	ROM_LOAD( "u6", 0x2000, 0x4000, CRC(4d9f0c57) SHA1(d19b4b4f42d329ea35907d17c15a55b954b07295) )
	1346	ROM_LOAD( "u7", 0x6000, 0x4000, CRC(d3bc510d) SHA1(6222badabf629dd6334591867596f811883aed52) )
1347	1347
1348	1348	ROM_REGION( 0x6000, "gfx1", 0 )
1349		ROM_LOAD( "u39",          0x0000, 0x2000, CRC(6662f607) SHA1(6b423f8de011d196700839af0be37effbf87383f) )
1350		ROM_LOAD( "u38",          0x2000, 0x2000, CRC(a014b44f) SHA1(906d426b1de75f26030c19dcd599b6570909f510) )
1351		ROM_LOAD( "u37",          0x4000, 0x2000, CRC(cb12e139) SHA1(06fe91281faae5d0c0ae4b3cd8ad103bd3995c38) )
	1349	ROM_LOAD( "chr7.u39",   0x0000, 0x2000, CRC(6662f607) SHA1(6b423f8de011d196700839af0be37effbf87383f) )
	1350	ROM_LOAD( "chr7.u38",   0x2000, 0x2000, CRC(a014b44f) SHA1(906d426b1de75f26030c19dcd599b6570909f510) )
	1351	ROM_LOAD( "chr7.u37",   0x4000, 0x2000, CRC(cb12e139) SHA1(06fe91281faae5d0c0ae4b3cd8ad103bd3995c38) )
1352	1352
1353	1353	ROM_REGION( 0x2000, "gfx2", 0 )
1354		ROM_LOAD( "u40",          0x0000, 0x2000, CRC(b13a3fb1) SHA1(25760aa27c88b8be248a87df724bf8797d179e7a) )
	1354	ROM_LOAD( "u40", 0x0000, 0x2000, CRC(b13a3fb1) SHA1(25760aa27c88b8be248a87df724bf8797d179e7a) )
1355	1355	ROM_END
1356	1356
1357	1357	ROM_START( bigappg )
1358	1358	ROM_REGION( 0x10000, "maincpu", 0 )
1359		ROM_LOAD( "merit.u5",    0x0000, 0x8000, CRC(47bad6fd) SHA1(87f6c603b52e184f82179869d7b58453cbd34814) )
	1359	ROM_LOAD( "2131-13_u5-0.u5", 0x0000, 0x8000, CRC(47bad6fd) SHA1(87f6c603b52e184f82179869d7b58453cbd34814) )
1360	1360
1361	1361	ROM_REGION( 0x6000, "gfx1", 0 )
1362		ROM_LOAD( "merit.u39",    0x0000, 0x2000, CRC(506e20b4) SHA1(cd28d4f56f83ed3f7cfa44280975c0a6af474707) )
1363		ROM_LOAD( "merit.u38",    0x2000, 0x2000, CRC(1924feeb) SHA1(c4656a04e2284a265554ea9774d0201c44864809) )
1364		ROM_LOAD( "merit.u37",    0x4000, 0x2000, CRC(12a04867) SHA1(8e3a6050d854ccc906ae473a104a16d610e4f1da) )
	1362	ROM_LOAD( "haip_u39.u39", 0x0000, 0x2000, CRC(506e20b4) SHA1(cd28d4f56f83ed3f7cfa44280975c0a6af474707) )
	1363	ROM_LOAD( "haip_u38.u38", 0x2000, 0x2000, CRC(1924feeb) SHA1(c4656a04e2284a265554ea9774d0201c44864809) )
	1364	ROM_LOAD( "haip_u37.u37", 0x4000, 0x2000, CRC(12a04867) SHA1(8e3a6050d854ccc906ae473a104a16d610e4f1da) )
1365	1365
1366	1366	ROM_REGION( 0x2000, "gfx2", 0 )
1367		ROM_LOAD( "merit.u40",    0x0000, 0x2000, CRC(ac4983b8) SHA1(a552a15f813c331de67eaae2ed42cc037b26c5bd) )
	1367	ROM_LOAD( "haip_u40.u40", 0x0000, 0x2000, CRC(ac4983b8) SHA1(a552a15f813c331de67eaae2ed42cc037b26c5bd) )
1368	1368	ROM_END
1369	1369
1370	1370	ROM_START( trvwzh )
r6740	r6741
1378	1378	ROM_LOAD( "triv_1_u37.u37", 0x4000, 0x2000, CRC(f739b5dc) SHA1(fbf469b7f4cab50e06ec2def9344e3b9801a275e) )
1379	1379
1380	1380	ROM_REGION( 0x2000, "gfx2", 0 )
1381		ROM_LOAD( "triv_1_u40.u40",   0x0000, 0x2000, CRC(cea7319f) SHA1(663cd18a4699dfd5ad1d3357094eff247e9b4a47) )
	1381	ROM_LOAD( "triv_1_u40.u40", 0x0000, 0x2000, CRC(cea7319f) SHA1(663cd18a4699dfd5ad1d3357094eff247e9b4a47) )
1382	1382
1383	1383	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1384		ROM_LOAD( "ent-001_01a",  0x08000, 0x8000, CRC(ff45d92b) SHA1(10356bc6a04b2c53ecaf76cb0cba3ec70b4ba612) )
	1384	ROM_LOAD( "ent-001_01a",  0x08000, 0x8000, CRC(ff45d92b) SHA1(10356bc6a04b2c53ecaf76cb0cba3ec70b4ba612) ) /* This set verified as all found on the same question board */
1385	1385	ROM_LOAD( "ent-001_02a",  0x18000, 0x8000, CRC(902e26f7) SHA1(f13b816bfc507fb429fb3f44531de346a82c780d) )
1386	1386	ROM_LOAD( "gen-001_01a",  0x28000, 0x8000, CRC(1d8d353f) SHA1(6bd0cc5c67da81a48737f32bc49cbf235648c4c6) )
1387	1387	ROM_LOAD( "gen-001_02a",  0x3c000, 0x4000, CRC(2000e3c3) SHA1(21737fde3d1a1b22da4590476e4e52ee1bab026f) ) /* 27128 eprom, others are 27256 */
1388		ROM_LOAD( "sex-001_01a",  0x48000, 0x8000, CRC(32519098) SHA1(d070e02bb10e04964893903599a69a8943f9ac8a) )
1389		ROM_LOAD( "sex-001_02a",  0x58000, 0x8000, CRC(0be4ef9a) SHA1(c80080f1c853e1043bf7e47bea322540a8ac9195) )
	1388	ROM_LOAD( "spo-001_01a",  0x48000, 0x8000, CRC(ae111429) SHA1(ff551d7ac7ad367338e908805aeb78c59a747919) )
	1389	ROM_LOAD( "spo-001_02a",  0x58000, 0x8000, CRC(ee9263b3) SHA1(1644ab01f17e3af1e193e509d64dcbb243d3eb80) )
	1390	ROM_LOAD( "spo-001_03a",  0x68000, 0x8000, CRC(64181d34) SHA1(f84e28fc589b86ca6a596815871ed26602bcc095) )
	1391	ROM_LOAD( "sex-001_01a",  0x78000, 0x8000, CRC(32519098) SHA1(d070e02bb10e04964893903599a69a8943f9ac8a) )
	1392	ROM_LOAD( "sex-001_02a",  0x88000, 0x8000, CRC(0be4ef9a) SHA1(c80080f1c853e1043bf7e47bea322540a8ac9195) )
1390	1393	ROM_END
1391	1394
1392	1395	ROM_START( trvwzha )
r6740	r6741
1400	1403	ROM_LOAD( "triv_1_u37.u37", 0x4000, 0x2000, CRC(f739b5dc) SHA1(fbf469b7f4cab50e06ec2def9344e3b9801a275e) )
1401	1404
1402	1405	ROM_REGION( 0x2000, "gfx2", 0 )
1403		ROM_LOAD( "triv_1_u40.u40",   0x0000, 0x2000, CRC(cea7319f) SHA1(663cd18a4699dfd5ad1d3357094eff247e9b4a47) )
	1406	ROM_LOAD( "triv_1_u40.u40", 0x0000, 0x2000, CRC(cea7319f) SHA1(663cd18a4699dfd5ad1d3357094eff247e9b4a47) )
1404	1407
1405	1408	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1406	1409	ROM_LOAD( "spo-001_01a",  0x08000, 0x8000, CRC(ae111429) SHA1(ff551d7ac7ad367338e908805aeb78c59a747919) )
r6740	r6741
1408	1411	ROM_LOAD( "spo-001_03a",  0x28000, 0x8000, CRC(64181d34) SHA1(f84e28fc589b86ca6a596815871ed26602bcc095) )
1409	1412	ROM_END
1410	1413
1411		/* question board only - this contained a variety of roms from the 'trvwzh' and 'trvwzha' sets
1412		as well as 2 unique general knowledge ones */
	1414	/* question board only - this contained a variety of roms from the 'trvwzh' and 'trvwzha' sets as well as 2 unique general knowledge ones */
1413	1415	ROM_START( trvwzhb )
1414	1416	ROM_REGION( 0x10000, "maincpu", 0 )
1415	1417	ROM_LOAD( "trivia.u5",    0x0000, 0x2000, CRC(731fd5b1) SHA1(1074780321029446da0e6765b9e036b06b067a48) )
r6740	r6741
1430	1432
1431	1433	ROM_START( trvwzv )
1432	1434	ROM_REGION( 0x10000, "maincpu", 0 )
1433		ROM_LOAD( "u5.bin",       0x0000, 0x2000, CRC(fd3531ac) SHA1(d11573df65676e704b28cc2d99fb004b48a358a4) )
1434		ROM_LOAD( "u6.bin",       0x2000, 0x2000, CRC(29e43d0e) SHA1(ad610748fe37436880648078f5d1a305cb147c5d) )
	1435	ROM_LOAD( "u5.bin", 0x0000, 0x2000, CRC(fd3531ac) SHA1(d11573df65676e704b28cc2d99fb004b48a358a4) )
	1436	ROM_LOAD( "u6.bin", 0x2000, 0x2000, CRC(29e43d0e) SHA1(ad610748fe37436880648078f5d1a305cb147c5d) )
1435	1437
1436	1438	ROM_REGION( 0x6000, "gfx1", 0 )
1437		ROM_LOAD( "u39",          0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
1438		ROM_LOAD( "u38",          0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
1439		ROM_LOAD( "u37",          0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
	1439	ROM_LOAD( "trvs_u39.u39", 0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
	1440	ROM_LOAD( "trvs_u38.u38", 0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
	1441	ROM_LOAD( "trvs_u37.u37", 0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
1440	1442
1441	1443	ROM_REGION( 0x2000, "gfx2", 0 )
1442		ROM_LOAD( "u40.bin",      0x0000, 0x2000, CRC(1f0ff6e0) SHA1(5a31afde34aeb6f851389d093bb426e5cfdedbf2) )
	1444	ROM_LOAD( "trvs_u40.u40", 0x0000, 0x2000, CRC(1f0ff6e0) SHA1(5a31afde34aeb6f851389d093bb426e5cfdedbf2) )
1443	1445
1444	1446	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1445		ROM_LOAD( "ent_001_01.bin", 0x08000, 0x8000, CRC(c68ce954) SHA1(bf70fe64f095d5cfcf5347d83651b78c6c8bf05f) )
1446		ROM_LOAD( "ent_001_02.bin", 0x18000, 0x8000, CRC(aac4ff63) SHA1(d68c4408b4dad976e317a33f2a4eaee39d90dbed) )
1447		ROM_LOAD( "gen_001_01.bin", 0x28000, 0x8000, CRC(5deb1900) SHA1(b7e9407c37481ef8953e8283d45949d951302e92) )
1448		ROM_LOAD( "gen_001_02.bin", 0x3c000, 0x4000, CRC(d2b53b6a) SHA1(f75334e47885086e277682daf018818a02ce1026) ) /* 27128 eprom, others are 27256 */
1449		ROM_LOAD( "sex_001_01a",    0x48000, 0x8000, CRC(32519098) SHA1(d070e02bb10e04964893903599a69a8943f9ac8a) )
1450		ROM_LOAD( "sex_001_02a",    0x58000, 0x8000, CRC(0be4ef9a) SHA1(c80080f1c853e1043bf7e47bea322540a8ac9195) )
	1447	ROM_LOAD( "ent-001_01",  0x08000, 0x8000, CRC(c68ce954) SHA1(bf70fe64f095d5cfcf5347d83651b78c6c8bf05f) )
	1448	ROM_LOAD( "ent-001_02",  0x18000, 0x8000, CRC(aac4ff63) SHA1(d68c4408b4dad976e317a33f2a4eaee39d90dbed) )
	1449	ROM_LOAD( "gen-001_01",  0x28000, 0x8000, CRC(5deb1900) SHA1(b7e9407c37481ef8953e8283d45949d951302e92) )
	1450	ROM_LOAD( "gen-001_02",  0x3c000, 0x4000, CRC(d2b53b6a) SHA1(f75334e47885086e277682daf018818a02ce1026) ) /* 27128 eprom, others are 27256 */
	1451	ROM_LOAD( "sex-001_01a", 0x48000, 0x8000, CRC(32519098) SHA1(d070e02bb10e04964893903599a69a8943f9ac8a) )
	1452	ROM_LOAD( "sex-001_02a", 0x58000, 0x8000, CRC(0be4ef9a) SHA1(c80080f1c853e1043bf7e47bea322540a8ac9195) )
1451	1453	ROM_END
1452	1454
1453	1455	ROM_START( trvwzva )
1454	1456	ROM_REGION( 0x10000, "maincpu", 0 )
1455		ROM_LOAD( "u5.bin",       0x0000, 0x2000, CRC(fd3531ac) SHA1(d11573df65676e704b28cc2d99fb004b48a358a4) )
1456		ROM_LOAD( "u6.bin",       0x2000, 0x2000, CRC(29e43d0e) SHA1(ad610748fe37436880648078f5d1a305cb147c5d) )
	1457	ROM_LOAD( "u5.bin", 0x0000, 0x2000, CRC(fd3531ac) SHA1(d11573df65676e704b28cc2d99fb004b48a358a4) )
	1458	ROM_LOAD( "u6.bin", 0x2000, 0x2000, CRC(29e43d0e) SHA1(ad610748fe37436880648078f5d1a305cb147c5d) )
1457	1459
1458	1460	ROM_REGION( 0x6000, "gfx1", 0 )
1459		ROM_LOAD( "u39",          0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
1460		ROM_LOAD( "u38",          0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
1461		ROM_LOAD( "u37",          0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
	1461	ROM_LOAD( "trvs_u39.u39", 0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
	1462	ROM_LOAD( "trvs_u38.u38", 0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
	1463	ROM_LOAD( "trvs_u37.u37", 0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
1462	1464
1463	1465	ROM_REGION( 0x2000, "gfx2", 0 )
1464		ROM_LOAD( "u40.bin",      0x0000, 0x2000, CRC(1f0ff6e0) SHA1(5a31afde34aeb6f851389d093bb426e5cfdedbf2) )
	1466	ROM_LOAD( "trvs_u40.u40", 0x0000, 0x2000, CRC(1f0ff6e0) SHA1(5a31afde34aeb6f851389d093bb426e5cfdedbf2) )
1465	1467
1466	1468	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1467		ROM_LOAD( "spo_001_01.bin", 0x08000, 0x8000, CRC(7b56315d) SHA1(4c8c63b80176bfac9594958a7043627012baada3) )
1468		ROM_LOAD( "spo_001_02.bin", 0x18000, 0x8000, CRC(148b63ee) SHA1(9f3b222d979f23b313f379cbc06cc00d88d08c56) )
1469		ROM_LOAD( "spo_001_03.bin", 0x28000, 0x8000, CRC(a6af8e41) SHA1(64f672bfa5fb2c0575103614986e53e238c5984f) )
	1469	ROM_LOAD( "spo-001_01", 0x08000, 0x8000, CRC(7b56315d) SHA1(4c8c63b80176bfac9594958a7043627012baada3) )
	1470	ROM_LOAD( "spo-001_02", 0x18000, 0x8000, CRC(148b63ee) SHA1(9f3b222d979f23b313f379cbc06cc00d88d08c56) )
	1471	ROM_LOAD( "spo-001_03", 0x28000, 0x8000, CRC(a6af8e41) SHA1(64f672bfa5fb2c0575103614986e53e238c5984f) )
1470	1472	ROM_END
1471	1473
1472	1474	ROM_START( trvwz2 )
1473	1475	ROM_REGION( 0x10000, "maincpu", 0 )
1474		ROM_LOAD( "u5_0e",        0x0000, 0x2000, CRC(97b8d320) SHA1(573945531113d8aae9418ba1e9a2063052227029) )
1475		ROM_LOAD( "u6_0e",        0x2000, 0x2000, CRC(2e86288d) SHA1(62c7024d8dfebed9bb05ea91302efe5d18cb7d2a) )
	1476	ROM_LOAD( "6221-05_u5-0e.u5", 0x0000, 0x2000, CRC(97b8d320) SHA1(573945531113d8aae9418ba1e9a2063052227029) )
	1477	ROM_LOAD( "6221-05_u6-0e.u6", 0x2000, 0x2000, CRC(2e86288d) SHA1(62c7024d8dfebed9bb05ea91302efe5d18cb7d2a) )
1476	1478
1477	1479	ROM_REGION( 0x6000, "gfx1", 0 )
1478		ROM_LOAD( "u39",          0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
1479		ROM_LOAD( "u38",          0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
1480		ROM_LOAD( "u37",          0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
	1480	ROM_LOAD( "trvs_u39.u39", 0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
	1481	ROM_LOAD( "trvs_u38.u38", 0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
	1482	ROM_LOAD( "trvs_u37.u37", 0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
1481	1483
1482	1484	ROM_REGION( 0x2000, "gfx2", 0 )
1483		ROM_LOAD( "u40a",        0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
	1485	ROM_LOAD( "trvs_u40a.u40", 0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
1484	1486
1485	1487	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1486		ROM_LOAD( "ent_101.01a",  0x08000, 0x8000, CRC(3825ac47) SHA1(d0da047c4d30a26f496b3663cfda77c229279be8) )
1487		ROM_LOAD( "ent_101.02a",  0x18000, 0x8000, CRC(a0153407) SHA1(e669957a5d4775bfa2c16960a2a909a3505c078b) )
1488		ROM_LOAD( "ent_101.03a",  0x28000, 0x8000, CRC(755b16ab) SHA1(277ea4110479ecdb2c772299ea04f4918cf7f561) )
1489		ROM_LOAD( "gen_101.01a",  0x38000, 0x8000, CRC(74d14039) SHA1(54b85581d60fb535d37a051f375e687a933600ea) )
1490		ROM_LOAD( "gen_101.02a",  0x48000, 0x8000, CRC(b1b930d8) SHA1(57be3ee1c0adcb549088818dc7efda64508b5647) )
1491		ROM_LOAD( "spo_101.01a",  0x58000, 0x8000, CRC(9dc4ba98) SHA1(4ce2bbbd7436a0ba8140879d5d8614bddbd5a8ec) )
1492		ROM_LOAD( "spo_101.02a",  0x68000, 0x8000, CRC(9c106ad9) SHA1(1d1a5c91152283e3937a2df17cd57b8fe04072b7) )
1493		ROM_LOAD( "spo_101.03a",  0x78000, 0x8000, CRC(3d69c3a3) SHA1(9f16d45660f3cb15e44e9fc0d940a7b2b12819e8) )
	1488	ROM_LOAD( "ent-101.01a",  0x08000, 0x8000, CRC(3825ac47) SHA1(d0da047c4d30a26f496b3663cfda77c229279be8) ) /* This set verified as all found on the same question board */
	1489	ROM_LOAD( "ent-101.02a",  0x18000, 0x8000, CRC(a0153407) SHA1(e669957a5d4775bfa2c16960a2a909a3505c078b) )
	1490	ROM_LOAD( "ent-101.03a",  0x28000, 0x8000, CRC(755b16ab) SHA1(277ea4110479ecdb2c772299ea04f4918cf7f561) )
	1491	ROM_LOAD( "gen-101.01a",  0x38000, 0x8000, CRC(74d14039) SHA1(54b85581d60fb535d37a051f375e687a933600ea) )
	1492	ROM_LOAD( "gen-101.02a",  0x48000, 0x8000, CRC(b1b930d8) SHA1(57be3ee1c0adcb549088818dc7efda64508b5647) ) /* These question roms have been found with the "trvwz3ha"    */
	1493	ROM_LOAD( "spo-101.01a",  0x58000, 0x8000, CRC(9dc4ba98) SHA1(4ce2bbbd7436a0ba8140879d5d8614bddbd5a8ec) ) /* program & CHAR roms and might actually be an Edition 3 set */
	1494	ROM_LOAD( "spo-101.02a",  0x68000, 0x8000, CRC(9c106ad9) SHA1(1d1a5c91152283e3937a2df17cd57b8fe04072b7) )
	1495	ROM_LOAD( "spo-101.03a",  0x78000, 0x8000, CRC(3d69c3a3) SHA1(9f16d45660f3cb15e44e9fc0d940a7b2b12819e8) )
1494	1496	ROM_LOAD( "sex-101.01a",  0x88000, 0x8000, CRC(301d65c2) SHA1(48d260077e9c9ed82f6dfa176b1103723dc9e19a) )
1495	1497	ROM_LOAD( "sex-101.02a",  0x98000, 0x8000, CRC(2596091b) SHA1(7fbb9c2c3f74e12714513928c8cf3769bf29fc8b) )
	1498
	1499	ROM_REGION( 0x0100, "prom", 0 )
	1500	ROM_LOAD( "sc-002", 0x00000, 0x0100, CRC(94a8da8a) SHA1(8bdaee436481418425c36de24477c96ec0787916) ) /* N82S129N BPROM found on question board, unknown use */
1496	1501	ROM_END
1497	1502
1498		/* questions only - this dump contained a variety of questions from the 'trvwz2' ones above,
1499		and 2 unique roms, which are Sex Trivia */
	1503	/* questions only - this dump contained a variety of questions from the 'trvwz2' ones above, and 2 unique roms, which are Sex Trivia */
1500	1504	ROM_START( trvwz2a )
1501	1505	ROM_REGION( 0x10000, "maincpu", 0 )
1502		ROM_LOAD( "u5_0e",        0x0000, 0x2000, CRC(97b8d320) SHA1(573945531113d8aae9418ba1e9a2063052227029) )
1503		ROM_LOAD( "u6_0e",        0x2000, 0x2000, CRC(2e86288d) SHA1(62c7024d8dfebed9bb05ea91302efe5d18cb7d2a) )
	1506	ROM_LOAD( "6221-05_u5-0e.u5", 0x0000, 0x2000, CRC(97b8d320) SHA1(573945531113d8aae9418ba1e9a2063052227029) )
	1507	ROM_LOAD( "6221-05_u6-0e.u6", 0x2000, 0x2000, CRC(2e86288d) SHA1(62c7024d8dfebed9bb05ea91302efe5d18cb7d2a) )
1504	1508
1505	1509	ROM_REGION( 0x6000, "gfx1", 0 )
1506		ROM_LOAD( "u39",          0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
1507		ROM_LOAD( "u38",          0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
1508		ROM_LOAD( "u37",          0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
	1510	ROM_LOAD( "trvs_u39.u39", 0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
	1511	ROM_LOAD( "trvs_u38.u38", 0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
	1512	ROM_LOAD( "trvs_u37.u37", 0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
1509	1513
1510	1514	ROM_REGION( 0x2000, "gfx2", 0 )
1511		ROM_LOAD( "u40a",        0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
	1515	ROM_LOAD( "trvs_u40a.u40", 0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
1512	1516
1513	1517	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1514	1518	ROM_LOAD( "merit2_4.0",  0x08000, 0x8000, CRC(069b59a3) SHA1(e3d75edd3a9271df73bf51f409f066547025abbe) ) // Sex Trivia
r6740	r6741
1517	1521
1518	1522	ROM_START( trvwz3h )
1519	1523	ROM_REGION( 0x10000, "maincpu", 0 )
1520		ROM_LOAD( "u5",           0x0000, 0x2000, CRC(ad4ab519) SHA1(80e99f4e5542115e34074b41bbc69906e01a408f) )
1521		ROM_LOAD( "u6",           0x2000, 0x2000, CRC(21a44014) SHA1(331f8b4fa3f837de070b68b959c818122aedc68a) )
	1524	ROM_LOAD( "u5", 0x0000, 0x2000, CRC(ad4ab519) SHA1(80e99f4e5542115e34074b41bbc69906e01a408f) )
	1525	ROM_LOAD( "u6", 0x2000, 0x2000, CRC(21a44014) SHA1(331f8b4fa3f837de070b68b959c818122aedc68a) )
1522	1526
1523	1527	ROM_REGION( 0x6000, "gfx1", 0 )
1524	1528	ROM_LOAD( "triv_1_u39.u39", 0x0000, 0x2000, CRC(f8a5f5fb) SHA1(a511e1a2b5e887ef00dc919e9e664ccec2d36cfa) )
r6740	r6741
1526	1530	ROM_LOAD( "triv_1_u37.u37", 0x4000, 0x2000, CRC(f739b5dc) SHA1(fbf469b7f4cab50e06ec2def9344e3b9801a275e) )
1527	1531
1528	1532	ROM_REGION( 0x2000, "gfx2", 0 )
1529		ROM_LOAD( "u40",          0x0000, 0x2000, CRC(e829473f) SHA1(ba754d9377d955b409970494e1a14dbe1d359ee5) )
	1533	ROM_LOAD( "triv_1_u40b.u40", 0x0000, 0x2000, CRC(e829473f) SHA1(ba754d9377d955b409970494e1a14dbe1d359ee5) )
1530	1534
1531	1535	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1532		ROM_LOAD( "7",            0x08000, 0x8000, CRC(974dca96) SHA1(eb4a745c84307a1bbb220659877f97c28cd515ac) )
1533		ROM_LOAD( "8",            0x18000, 0x8000, CRC(e15ef8d0) SHA1(51c946311ffe507aa9031044bc34e5ae8d3473ab) )
1534		ROM_LOAD( "9",            0x28000, 0x8000, CRC(503115a1) SHA1(5e6630191465b3d2a590fab08b4f47f7408ecc44) )
1535		ROM_LOAD( "10",           0x38000, 0x8000, CRC(0e4fe73d) SHA1(9aee22a5837637ec5e360b72e71555942df1d26f) )
1536		ROM_LOAD( "11",           0x48000, 0x8000, CRC(f56c0935) SHA1(8e16133ad90829bbc0e0f2e9ee9c26e9d0c5057e) )
1537		ROM_LOAD( "12",           0x58000, 0x8000, CRC(057f6676) SHA1(a93a7a76fc8b8263568a50b00a57f3abe76c9aa3) )
1538		ROM_LOAD( "13",           0x68000, 0x8000, CRC(1fa46b86) SHA1(16d54d0932fe342399faf303eafa3c0b7ba2e202) )
1539		ROM_LOAD( "14",           0x78000, 0x8000, CRC(b395cd97) SHA1(a42c7c1687eaba64a725888cd6413568cc90b010) )
1540		ROM_LOAD( "sex-001_02",   0x88000, 0x8000, CRC(b064876b) SHA1(588300fb6603f334de41a9685b1fcf8c642b5c16) )
	1536	ROM_LOAD( "spo-002_01", 0x08000, 0x8000, CRC(974dca96) SHA1(eb4a745c84307a1bbb220659877f97c28cd515ac) )
	1537	ROM_LOAD( "spo-002_02", 0x18000, 0x8000, CRC(e15ef8d0) SHA1(51c946311ffe507aa9031044bc34e5ae8d3473ab) )
	1538	ROM_LOAD( "spo-002_03", 0x28000, 0x8000, CRC(503115a1) SHA1(5e6630191465b3d2a590fab08b4f47f7408ecc44) )
	1539	ROM_LOAD( "ent-002_01", 0x38000, 0x8000, CRC(0e4fe73d) SHA1(9aee22a5837637ec5e360b72e71555942df1d26f) )
	1540	ROM_LOAD( "ent-002_02", 0x48000, 0x8000, CRC(f56c0935) SHA1(8e16133ad90829bbc0e0f2e9ee9c26e9d0c5057e) )
	1541	ROM_LOAD( "ent-002_03", 0x58000, 0x8000, CRC(057f6676) SHA1(a93a7a76fc8b8263568a50b00a57f3abe76c9aa3) )
	1542	ROM_LOAD( "gen-002_02", 0x68000, 0x8000, CRC(1fa46b86) SHA1(16d54d0932fe342399faf303eafa3c0b7ba2e202) )
	1543	ROM_LOAD( "gen-002_02", 0x78000, 0x8000, CRC(b395cd97) SHA1(a42c7c1687eaba64a725888cd6413568cc90b010) )
	1544	ROM_LOAD( "sex-001_02", 0x88000, 0x8000, CRC(b064876b) SHA1(588300fb6603f334de41a9685b1fcf8c642b5c16) ) /* Does this one actually belong here? */
	1545
	1546	ROM_REGION( 0x0100, "prom", 0 )
	1547	ROM_LOAD( "sc-002", 0x00000, 0x0100, CRC(94a8da8a) SHA1(8bdaee436481418425c36de24477c96ec0787916) ) /* N82S129N BPROM found on question board, unknown use */
	1548
	1549	ROM_REGION( 0x8000, "misc", 0 )
	1550	ROM_LOAD( "dec002.u13", 0x00000, 0x01f3, CRC(686d2ad0) SHA1(7aad0a1ed09942528eceaf4d7a5e1fd7601aeac7) ) /* PAL10L8CN */
	1551	ROM_LOAD( "sex-001_01", 0x00000, 0x8000, CRC(77a2a734) SHA1(7ba662d275b7914c9dcc9532116086e091e6cf88) ) /* These seem to be misplaced? Verfied good dumps, not */
	1552	ROM_LOAD( "sex-001_02", 0x00000, 0x8000, CRC(b064876b) SHA1(588300fb6603f334de41a9685b1fcf8c642b5c16) ) /* sure which set they actually belong to, maybe trvwzv */
1541	1553	ROM_END
1542	1554
1543	1555	ROM_START( trvwz3v )
1544	1556	ROM_REGION( 0x10000, "maincpu", 0 )
1545		ROM_LOAD( "u5",    0x0000, 0x2000, CRC(97b8d320) SHA1(573945531113d8aae9418ba1e9a2063052227029) )
1546		ROM_LOAD( "u6",    0x2000, 0x2000, CRC(2e86288d) SHA1(62c7024d8dfebed9bb05ea91302efe5d18cb7d2a) )
	1557	ROM_LOAD( "6221-05_u5-0e.u5", 0x0000, 0x2000, CRC(97b8d320) SHA1(573945531113d8aae9418ba1e9a2063052227029) )
	1558	ROM_LOAD( "6221-05_u6-0e.u6", 0x2000, 0x2000, CRC(2e86288d) SHA1(62c7024d8dfebed9bb05ea91302efe5d18cb7d2a) )
1547	1559
1548	1560	ROM_REGION( 0x6000, "gfx1", 0 )
1549		ROM_LOAD( "u39",   0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
1550		ROM_LOAD( "u38",   0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
1551		ROM_LOAD( "u37",   0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
	1561	ROM_LOAD( "trvs_u39.u39", 0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
	1562	ROM_LOAD( "trvs_u38.u38", 0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
	1563	ROM_LOAD( "trvs_u37.u37", 0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
1552	1564
1553	1565	ROM_REGION( 0x2000, "gfx2", 0 )
1554		ROM_LOAD( "u40",  0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
	1566	ROM_LOAD( "trvs_u40a.u40", 0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
1555	1567
1556	1568	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1557		ROM_LOAD( "10",    0x08000, 0x8000, CRC(15d16703) SHA1(9184f63669e9ec93e88276777e1b7f209543c3e3) )
1558		ROM_LOAD( "8",     0x18000, 0x8000, CRC(647f3394) SHA1(636647ae620fd2f985b82e3516451e3bffd44040) )
1559		ROM_LOAD( "7",     0x28000, 0x8000, CRC(974dca96) SHA1(eb4a745c84307a1bbb220659877f97c28cd515ac) )
1560		ROM_LOAD( "6",     0x38000, 0x8000, CRC(e15ef8d0) SHA1(51c946311ffe507aa9031044bc34e5ae8d3473ab) )
1561		ROM_LOAD( "5",     0x48000, 0x8000, CRC(503115a1) SHA1(5e6630191465b3d2a590fab08b4f47f7408ecc44) )
1562		ROM_LOAD( "4",     0x58000, 0x8000, CRC(0e4fe73d) SHA1(9aee22a5837637ec5e360b72e71555942df1d26f) )
1563		ROM_LOAD( "3",     0x68000, 0x8000, CRC(f56c0935) SHA1(8e16133ad90829bbc0e0f2e9ee9c26e9d0c5057e) )
1564		ROM_LOAD( "2",     0x78000, 0x8000, CRC(057f6676) SHA1(a93a7a76fc8b8263568a50b00a57f3abe76c9aa3) )
1565		ROM_LOAD( "1",     0x88000, 0x8000, CRC(1fa46b86) SHA1(16d54d0932fe342399faf303eafa3c0b7ba2e202) )
1566		ROM_LOAD( "0",     0x98000, 0x8000, CRC(b395cd97) SHA1(a42c7c1687eaba64a725888cd6413568cc90b010) )
	1569	ROM_LOAD( "10",         0x08000, 0x8000, CRC(15d16703) SHA1(9184f63669e9ec93e88276777e1b7f209543c3e3) ) /* Actual label unknown */
	1570	ROM_LOAD( "8",          0x18000, 0x8000, CRC(647f3394) SHA1(636647ae620fd2f985b82e3516451e3bffd44040) ) /* Actual label unknown */
	1571	ROM_LOAD( "spo-002_01", 0x28000, 0x8000, CRC(974dca96) SHA1(eb4a745c84307a1bbb220659877f97c28cd515ac) )
	1572	ROM_LOAD( "spo-002_02", 0x38000, 0x8000, CRC(e15ef8d0) SHA1(51c946311ffe507aa9031044bc34e5ae8d3473ab) )
	1573	ROM_LOAD( "spo-002_03", 0x48000, 0x8000, CRC(503115a1) SHA1(5e6630191465b3d2a590fab08b4f47f7408ecc44) )
	1574	ROM_LOAD( "ent-002_01", 0x58000, 0x8000, CRC(0e4fe73d) SHA1(9aee22a5837637ec5e360b72e71555942df1d26f) )
	1575	ROM_LOAD( "ent-002_02", 0x68000, 0x8000, CRC(f56c0935) SHA1(8e16133ad90829bbc0e0f2e9ee9c26e9d0c5057e) )
	1576	ROM_LOAD( "ent-002_03", 0x78000, 0x8000, CRC(057f6676) SHA1(a93a7a76fc8b8263568a50b00a57f3abe76c9aa3) )
	1577	ROM_LOAD( "gen-002_02", 0x88000, 0x8000, CRC(1fa46b86) SHA1(16d54d0932fe342399faf303eafa3c0b7ba2e202) )
	1578	ROM_LOAD( "gen-002_02", 0x98000, 0x8000, CRC(b395cd97) SHA1(a42c7c1687eaba64a725888cd6413568cc90b010) )
	1579
	1580	ROM_REGION( 0x0100, "prom", 0 )
	1581	ROM_LOAD( "sc-002", 0x00000, 0x0100, CRC(94a8da8a) SHA1(8bdaee436481418425c36de24477c96ec0787916) ) /* N82S129N BPROM found on question board, unknown use */
1567	1582	ROM_END
1568	1583
1569	1584	ROM_START( trvwz3ha )
1570	1585	ROM_REGION( 0x10000, "maincpu", 0 )
1571		ROM_LOAD( "6221-04_u5-0c", 0x0000, 0x2000, CRC(e0a07f06) SHA1(02cde0fc4a62d108ecd3e2f7704b9166c31707f2) )
1572		ROM_LOAD( "6221-04_u6-0c", 0x2000, 0x2000, CRC(223482d6) SHA1(4d9dbce7505b98ccd8e2b55f6f86a59b213d72a1) )
	1586	ROM_LOAD( "6221-04_u5-0c", 0x0000, 0x2000, CRC(e0a07f06) SHA1(02cde0fc4a62d108ecd3e2f7704b9166c31707f2) ) /* Also found labeled as "6221-04 U5-0D" */
	1587	ROM_LOAD( "6221-04_u6-0c", 0x2000, 0x2000, CRC(223482d6) SHA1(4d9dbce7505b98ccd8e2b55f6f86a59b213d72a1) ) /* Also found labeled as "6221-04 U6-0D" */
1573	1588
1574	1589	ROM_REGION( 0x6000, "gfx1", 0 )
1575	1590	ROM_LOAD( "triv_1_u39.u39", 0x0000, 0x2000, CRC(f8a5f5fb) SHA1(a511e1a2b5e887ef00dc919e9e664ccec2d36cfa) )
r6740	r6741
1577	1592	ROM_LOAD( "triv_1_u37.u37", 0x4000, 0x2000, CRC(f739b5dc) SHA1(fbf469b7f4cab50e06ec2def9344e3b9801a275e) )
1578	1593
1579	1594	ROM_REGION( 0x2000, "gfx2", 0 )
1580		ROM_LOAD( "merit6.u40",          0x0000, 0x2000, CRC(e829473f) SHA1(ba754d9377d955b409970494e1a14dbe1d359ee5) )
	1595	ROM_LOAD( "triv_1_u40b.u40", 0x0000, 0x2000, CRC(e829473f) SHA1(ba754d9377d955b409970494e1a14dbe1d359ee5) )
1581	1596
1582	1597	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1583		ROM_LOAD( "merit6.9",   0x08000, 0x8000, CRC(974dca96) SHA1(eb4a745c84307a1bbb220659877f97c28cd515ac) )
1584		ROM_LOAD( "merit6.8",   0x18000, 0x8000, CRC(503115a1) SHA1(5e6630191465b3d2a590fab08b4f47f7408ecc44) )
1585		ROM_LOAD( "merit6.6",   0x28000, 0x8000, CRC(0e4fe73d) SHA1(9aee22a5837637ec5e360b72e71555942df1d26f) )
1586		ROM_LOAD( "merit6.5",   0x38000, 0x8000, CRC(f56c0935) SHA1(8e16133ad90829bbc0e0f2e9ee9c26e9d0c5057e) )
1587		ROM_LOAD( "merit6.7",   0x48000, 0x8000, CRC(057f6676) SHA1(a93a7a76fc8b8263568a50b00a57f3abe76c9aa3) )
1588		ROM_LOAD( "merit6.0",   0x58000, 0x8000, CRC(1fa46b86) SHA1(16d54d0932fe342399faf303eafa3c0b7ba2e202) )
1589		ROM_LOAD( "merit6.3",   0x68000, 0x8000, CRC(b395cd97) SHA1(a42c7c1687eaba64a725888cd6413568cc90b010) )
1590		ROM_LOAD( "sex-001_02", 0x78000, 0x8000, CRC(b064876b) SHA1(588300fb6603f334de41a9685b1fcf8c642b5c16) )
	1598	ROM_LOAD( "spo-002_01", 0x08000, 0x8000, CRC(974dca96) SHA1(eb4a745c84307a1bbb220659877f97c28cd515ac) ) /* This set verified as all found on the same question board */
	1599	ROM_LOAD( "spo-002_02", 0x18000, 0x8000, CRC(e15ef8d0) SHA1(51c946311ffe507aa9031044bc34e5ae8d3473ab) )
	1600	ROM_LOAD( "spo-002_03", 0x28000, 0x8000, CRC(503115a1) SHA1(5e6630191465b3d2a590fab08b4f47f7408ecc44) )
	1601	ROM_LOAD( "ent-002_01", 0x38000, 0x8000, CRC(0e4fe73d) SHA1(9aee22a5837637ec5e360b72e71555942df1d26f) )
	1602	ROM_LOAD( "ent-002_02", 0x48000, 0x8000, CRC(f56c0935) SHA1(8e16133ad90829bbc0e0f2e9ee9c26e9d0c5057e) )
	1603	ROM_LOAD( "ent-002_03", 0x58000, 0x8000, CRC(057f6676) SHA1(a93a7a76fc8b8263568a50b00a57f3abe76c9aa3) )
	1604	ROM_LOAD( "gen-002_01", 0x68000, 0x8000, CRC(1fa46b86) SHA1(16d54d0932fe342399faf303eafa3c0b7ba2e202) )
	1605	ROM_LOAD( "gen-002_02", 0x78000, 0x8000, CRC(b395cd97) SHA1(a42c7c1687eaba64a725888cd6413568cc90b010) )
	1606	ROM_LOAD( "sex-002_03", 0x88000, 0x8000, CRC(2f37dcb0) SHA1(e96eeabfa62c0a56c2f888cf1abdfdcb059572c6) )
	1607	ROM_LOAD( "sex-002_04", 0x98000, 0x8000, CRC(20bf245e) SHA1(1286fd2eb51c6125a7560da3e2390ec51b64fb43) )
1591	1608
1592		ROM_REGION( 0x8000, "misc", 0 )
1593		ROM_LOAD( "merit6.u13",         0x00000, 0x1f3, CRC(686d2ad0) SHA1(7aad0a1ed09942528eceaf4d7a5e1fd7601aeac7) )
1594		ROM_LOAD( "sex-001_01",         0x00000, 0x8000, CRC(77a2a734) SHA1(7ba662d275b7914c9dcc9532116086e091e6cf88) ) // should be a question rom, but doesn't work, bad, or from a different game?
	1609	ROM_REGION( 0x0100, "prom", 0 )
	1610	ROM_LOAD( "sc-002", 0x00000, 0x0100, CRC(94a8da8a) SHA1(8bdaee436481418425c36de24477c96ec0787916) ) /* N82S129N BPROM found on question board, unknown use */
	1611
	1612	ROM_REGION( 0x200, "misc", 0 )
	1613	ROM_LOAD( "dec002.u13", 0x00000, 0x01f3, CRC(686d2ad0) SHA1(7aad0a1ed09942528eceaf4d7a5e1fd7601aeac7) )
1595	1614	ROM_END
1596	1615
1597	1616	ROM_START( trvwz4 )
1598	1617	ROM_REGION( 0x10000, "maincpu", 0 )
1599		ROM_LOAD( "u5.bin",       0x0000, 0x8000, CRC(bc23a1ab) SHA1(b9601f316e373c568c5b208de417617094046559) )
	1618	ROM_LOAD( "u5.bin", 0x0000, 0x8000, CRC(bc23a1ab) SHA1(b9601f316e373c568c5b208de417617094046559) )
1600	1619
1601	1620	ROM_REGION( 0x6000, "gfx1", 0 )
1602		ROM_LOAD( "u39.bin",      0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
1603		ROM_LOAD( "u38.bin",      0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
1604		ROM_LOAD( "u37.bin",      0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
	1621	ROM_LOAD( "trvs_u39.u39", 0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
	1622	ROM_LOAD( "trvs_u38.u38", 0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
	1623	ROM_LOAD( "trvs_u37.u37", 0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
1605	1624
1606	1625	ROM_REGION( 0x2000, "gfx2", 0 )
1607		ROM_LOAD( "u40.bin",      0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
	1626	ROM_LOAD( "trvs_u40a.u40", 0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
1608	1627
1609	1628	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1610	1629	ROM_LOAD( "ent_4_1.bin",  0x08000, 0x8000, CRC(1b317149) SHA1(94e882e9cc041ac8f292136c1ce2d21340ac5e7f) )
1611	1630	ROM_LOAD( "ent_4_2.bin",  0x18000, 0x8000, CRC(43d51697) SHA1(7af3f16f9519184ae63d8818bbc52a2ba897f275) )
1612		ROM_LOAD( "rnp_4_1.bin",  0x28000, 0x8000, CRC(e54fc4bc) SHA1(4607974ed2bf83c475396fc1cbb1e09ad084ace8) )
1613		ROM_LOAD( "rnp_4_2.bin",  0x38000, 0x8000, CRC(fee2d0b0) SHA1(9c9abec4ce693fc2d3976f3d499213c2ce67c197) )
	1631	ROM_LOAD( "tw4-05_rnp-1", 0x28000, 0x8000, CRC(fee2d0b0) SHA1(9c9abec4ce693fc2d3976f3d499213c2ce67c197) )
	1632	ROM_LOAD( "tw4-05_rnp-2", 0x38000, 0x8000, CRC(e54fc4bc) SHA1(4607974ed2bf83c475396fc1cbb1e09ad084ace8) )
1614	1633	ROM_LOAD( "sbt_4_1.bin",  0x48000, 0x8000, CRC(f1560804) SHA1(2ef0d587fbedfc342a12e913fa3c94eb8d67e2c5) )
1615	1634	ROM_LOAD( "sbt_4_2.bin",  0x58000, 0x8000, CRC(b0d6f6b2) SHA1(b08622d3775d1bb40c3b07ef932f3db4166ee284) )
1616	1635	ROM_LOAD( "sex_4_1.bin",  0x68000, 0x8000, CRC(976352b0) SHA1(5f89caca410704ba8a90da3167ba18e45fb21d43) )
1617	1636	ROM_LOAD( "sex_4_2.bin",  0x78000, 0x8000, CRC(5f148bc9) SHA1(2fd2cf819c2f395dcffad59857b3533fe3cce60b) )
1618		ROM_LOAD( "spo_4_1.bin",  0x88000, 0x8000, CRC(5fe0c6a3) SHA1(17bdb5262ce4edf5f022f075537f6161e1397b46) )
1619		ROM_LOAD( "spo_4_2.bin",  0x98000, 0x8000, CRC(3f3390e0) SHA1(50bd7b79268438584bb0f497ab0055b4d4864590) )
	1637	ROM_LOAD( "tw4-05_spo-1", 0x88000, 0x8000, CRC(5fe0c6a3) SHA1(17bdb5262ce4edf5f022f075537f6161e1397b46) )
	1638	ROM_LOAD( "tw4-05_spo-2", 0x98000, 0x8000, CRC(3f3390e0) SHA1(50bd7b79268438584bb0f497ab0055b4d4864590) )
1620	1639	ROM_END
1621	1640
1622	1641	/* only the question board was dumped, but it contained a selection
r6740	r6741
1624	1643	*/
1625	1644	ROM_START( trvwz4a )
1626	1645	ROM_REGION( 0x10000, "maincpu", 0 )
1627		ROM_LOAD( "u5.bin",       0x0000, 0x8000, CRC(bc23a1ab) SHA1(b9601f316e373c568c5b208de417617094046559) )
	1646	ROM_LOAD( "u5.bin", 0x0000, 0x8000, CRC(bc23a1ab) SHA1(b9601f316e373c568c5b208de417617094046559) )
1628	1647
1629	1648	ROM_REGION( 0x6000, "gfx1", 0 )
1630		ROM_LOAD( "u39.bin",      0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
1631		ROM_LOAD( "u38.bin",      0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
1632		ROM_LOAD( "u37.bin",      0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
	1649	ROM_LOAD( "trvs_u39.u39", 0x0000, 0x2000, CRC(b9d9a80e) SHA1(55b6a0d09f8619df93ba936e083835c859a557df) )
	1650	ROM_LOAD( "trvs_u38.u38", 0x2000, 0x2000, CRC(8348083e) SHA1(260a4c1ae043e7ceac65a8818c23940d32275879) )
	1651	ROM_LOAD( "trvs_u37.u37", 0x4000, 0x2000, CRC(b4d3c9f4) SHA1(dda99549306519c147d275d8c6af672e80a96b67) )
1633	1652
1634	1653	ROM_REGION( 0x2000, "gfx2", 0 )
1635		ROM_LOAD( "u40.bin",      0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
	1654	ROM_LOAD( "trvs_u40a.u40", 0x0000, 0x2000, CRC(fbfae092) SHA1(b8569819952a5c805f11b6854d64b3ae9c857f97) )
1636	1655
1637	1656	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1638	1657	ROM_LOAD( "merit2_5.0",  0x08000, 0x8000, CRC(e07d139f) SHA1(e364dcc628719c1bcdc119bdb2f3c98b5538c411) ) // sex trivia III
r6740	r6741
1692	1711
1693	1712	// probably over-dumped, 1st and 2nd half identical
1694	1713	ROM_REGION( 0x18000, "gfx1", 0 )
1695		ROM_LOAD( "phrz.7",       0x00000, 0x8000, CRC(237e221a) SHA1(7aa69375c2b9a9e73e0e4ed207bf595368b2deb2) )
1696		ROM_LOAD( "phrz.10",      0x08000, 0x8000, CRC(bfa78b67) SHA1(1b51c0e00240f798fe717624e706cb15700bc2f9) )
1697		ROM_LOAD( "phrz.8",       0x10000, 0x8000, CRC(9ce22cb3) SHA1(b653afb8f13decd993e434aaad69a6e09ab65f83) )
	1714	ROM_LOAD( "phrz_u37.u37", 0x00000, 0x8000, CRC(237e221a) SHA1(7aa69375c2b9a9e73e0e4ed207bf595368b2deb2) )
	1715	ROM_LOAD( "phrz_u38.u38", 0x08000, 0x8000, CRC(bfa78b67) SHA1(1b51c0e00240f798fe717624e706cb15700bc2f9) )
	1716	ROM_LOAD( "phrz_u39.u39", 0x10000, 0x8000, CRC(9ce22cb3) SHA1(b653afb8f13decd993e434aaad69a6e09ab65f83) )
1698	1717
1699	1718	// probably over-dumped
1700	1719	ROM_REGION( 0x08000, "gfx2", 0 )
1701		ROM_LOAD( "phrz.9",       0x00000, 0x8000, CRC(17dcddd4) SHA1(51682bdbfb67cd0ccf20b97e8fa12d72f0fe82ed) )
	1720	ROM_LOAD( "phrz_u40.u40",0x00000, 0x8000, CRC(17dcddd4) SHA1(51682bdbfb67cd0ccf20b97e8fa12d72f0fe82ed) )
1702	1721
1703	1722	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) // questions
1704		ROM_LOAD( "phrz.1",       0x00000, 0x8000, CRC(0a016c5e) SHA1(1a24ecd7fe59b08c75a1b4575c7fe467cc7f0cf8) )
1705		ROM_LOAD( "phrz.2",       0x10000, 0x8000, CRC(e67dc49e) SHA1(5265af228531dc16db7f7ee78da6e51ef9a1d772) )
1706		ROM_LOAD( "phrz.3",       0x20000, 0x8000, CRC(5c79a653) SHA1(85a904465b347564e937074e2b18159604c83e51) )
1707		ROM_LOAD( "phrz.4",       0x30000, 0x8000, CRC(9837f757) SHA1(01106114b6997fe6432e519101f95c83a1f7cc1e) )
1708		ROM_LOAD( "phrz.5",       0x40000, 0x8000, CRC(dc9d8682) SHA1(46973da4298d0ed149c651498527c91b8ba57e0a) )
1709		ROM_LOAD( "phrz.6",       0x50000, 0x8000, CRC(48e24f17) SHA1(f50c85505f6ab2360f0885494001f174224f8575) )
	1723	ROM_LOAD( "std1.bin",     0x00000, 0x8000, CRC(0a016c5e) SHA1(1a24ecd7fe59b08c75a1b4575c7fe467cc7f0cf8) )
	1724	ROM_LOAD( "std2.bin",     0x10000, 0x8000, CRC(e67dc49e) SHA1(5265af228531dc16db7f7ee78da6e51ef9a1d772) )
	1725	ROM_LOAD( "std3.bin",     0x20000, 0x8000, CRC(5c79a653) SHA1(85a904465b347564e937074e2b18159604c83e51) )
	1726	ROM_LOAD( "std4.bin",     0x30000, 0x8000, CRC(9837f757) SHA1(01106114b6997fe6432e519101f95c83a1f7cc1e) )
	1727	ROM_LOAD( "std5.bin",     0x40000, 0x8000, CRC(dc9d8682) SHA1(46973da4298d0ed149c651498527c91b8ba57e0a) )
	1728	ROM_LOAD( "std6.bin",     0x50000, 0x8000, CRC(48e24f17) SHA1(f50c85505f6ab2360f0885494001f174224f8575) )
1710	1729	ROM_END
1711	1730
1712	1731	ROM_START( phrcrazea )
1713	1732	ROM_REGION( 0x10000, "maincpu", 0 )
1714		ROM_LOAD( "merit5.u5",      0x00000, 0x8000, CRC(d04c7657) SHA1(0b59fbf553eb5b68544ee2f94cf8106ab30ff1ed) )
	1733	ROM_LOAD( "5281-40_u5-3a.u5",0x00000, 0x8000, CRC(d04c7657) SHA1(0b59fbf553eb5b68544ee2f94cf8106ab30ff1ed) )
1715	1734
1716	1735	ROM_REGION( 0x18000, "gfx1", 0 )
1717		ROM_LOAD( "merit5.u37",       0x00000, 0x8000, CRC(237e221a) SHA1(7aa69375c2b9a9e73e0e4ed207bf595368b2deb2) )
1718		ROM_LOAD( "merit5.u38",       0x08000, 0x8000, CRC(bfa78b67) SHA1(1b51c0e00240f798fe717624e706cb15700bc2f9) )
1719		ROM_LOAD( "merit5.u39",       0x10000, 0x8000, CRC(9ce22cb3) SHA1(b653afb8f13decd993e434aaad69a6e09ab65f83) )
	1736	ROM_LOAD( "phrz_u27.u37", 0x00000, 0x8000, CRC(237e221a) SHA1(7aa69375c2b9a9e73e0e4ed207bf595368b2deb2) )
	1737	ROM_LOAD( "phrz_u38.u38", 0x08000, 0x8000, CRC(bfa78b67) SHA1(1b51c0e00240f798fe717624e706cb15700bc2f9) )
	1738	ROM_LOAD( "phrz_u39.u39", 0x10000, 0x8000, CRC(9ce22cb3) SHA1(b653afb8f13decd993e434aaad69a6e09ab65f83) )
1720	1739
1721	1740	ROM_REGION( 0x08000, "gfx2", 0 )
1722		ROM_LOAD( "merit5.u40",       0x00000, 0x8000, CRC(17dcddd4) SHA1(51682bdbfb67cd0ccf20b97e8fa12d72f0fe82ed) )
	1741	ROM_LOAD( "phrz_u40.u40",0x00000, 0x8000, CRC(17dcddd4) SHA1(51682bdbfb67cd0ccf20b97e8fa12d72f0fe82ed) )
1723	1742
1724	1743	ROM_REGION( 0xa0000, "user1", ROMREGION_ERASEFF ) /* questions */
1725		ROM_LOAD( "merit2_0.0",     0x00000, 0x8000, CRC(7ef3bca7) SHA1(f25cd01f996882a500e1a800d924759cd1de255d) )
1726		ROM_LOAD( "merit2_0.1",     0x10000, 0x8000, CRC(ed7604b8) SHA1(b1e841b50b8ef6ae95fafac1c34b6d0337a05d18) )
1727		ROM_LOAD( "merit2_0.2",     0x20000, 0x8000, CRC(423eecd6) SHA1(ca8d181ccba05acba8ebc57f20e0542eda00c917) )
1728		ROM_LOAD( "merit2_0.3",     0x30000, 0x8000, CRC(05dd3900) SHA1(bb13a3c5f84771c450fa88560cc74c5a1be1b876) )
1729		ROM_LOAD( "merit2_0.4",     0x40000, 0x8000, CRC(c5980f24) SHA1(a3b665c74aaa704ffa382f95adac70c7c46fb446) )
1730		ROM_LOAD( "merit2_0.5",     0x50000, 0x8000, CRC(7cb395a9) SHA1(48b3ac524e6ae23f885b9b767e77930a89a81f5f) )
1731		ROM_LOAD( "merit2_0.6",     0x60000, 0x8000, CRC(effc811b) SHA1(2479539965ed541be417bbe48a5e66a58a6294aa) )
1732		ROM_LOAD( "merit2_0.7",     0x70000, 0x8000, CRC(c4c7dcee) SHA1(81d879df3da0fbe1cf2247d92b3853104a99689d) )
1733		ROM_LOAD( "merit2_0.8",     0x80000, 0x8000, CRC(527b3025) SHA1(36dc129d2276909643e90ae3810c8341076fd88c) )
1734		ROM_LOAD( "merit2_0.9",     0x90000, 0x8000, CRC(367f1dfa) SHA1(01d69004c365acefb0e52ac12593a3874c16ab9d) )
	1744	ROM_LOAD( "phrz1-07_sex-2a", 0x00000, 0x8000, CRC(7ef3bca7) SHA1(f25cd01f996882a500e1a800d924759cd1de255d) )
	1745	ROM_LOAD( "phrz1-07_sex-1a", 0x10000, 0x8000, CRC(ed7604b8) SHA1(b1e841b50b8ef6ae95fafac1c34b6d0337a05d18) )
	1746	ROM_LOAD( "phrz1-07_std-8a", 0x20000, 0x8000, CRC(423eecd6) SHA1(ca8d181ccba05acba8ebc57f20e0542eda00c917) )
	1747	ROM_LOAD( "phrz1-07_std-7a", 0x30000, 0x8000, CRC(05dd3900) SHA1(bb13a3c5f84771c450fa88560cc74c5a1be1b876) )
	1748	ROM_LOAD( "phrz1-07_std-6a", 0x40000, 0x8000, CRC(c5980f24) SHA1(a3b665c74aaa704ffa382f95adac70c7c46fb446) )
	1749	ROM_LOAD( "phrz1-07_std-5a", 0x50000, 0x8000, CRC(7cb395a9) SHA1(48b3ac524e6ae23f885b9b767e77930a89a81f5f) )
	1750	ROM_LOAD( "phrz1-07_std-4a", 0x60000, 0x8000, CRC(effc811b) SHA1(2479539965ed541be417bbe48a5e66a58a6294aa) )
	1751	ROM_LOAD( "phrz1-07_std-3a", 0x70000, 0x8000, CRC(c4c7dcee) SHA1(81d879df3da0fbe1cf2247d92b3853104a99689d) )
	1752	ROM_LOAD( "phrz1-07_std-2a", 0x80000, 0x8000, CRC(527b3025) SHA1(36dc129d2276909643e90ae3810c8341076fd88c) )
	1753	ROM_LOAD( "phrz1-07_std-1a", 0x90000, 0x8000, CRC(367f1dfa) SHA1(01d69004c365acefb0e52ac12593a3874c16ab9d) )
1735	1754	ROM_END
1736	1755
1737	1756	ROM_START( phrcrazes )
r6740	r6741
1755	1774	ROM_LOAD( "std6.bin",     0x50000, 0x8000, CRC(48e24f17) SHA1(f50c85505f6ab2360f0885494001f174224f8575) )
1756	1775	/* empty space as per instructions for other "sex" category roms */
1757	1776	/* "Sex" questions revision A */
1758		ROM_LOAD( "sex1_2a.bin",  0x80000, 0x8000, CRC(7ef3bca7) SHA1(f25cd01f996882a500e1a800d924759cd1de255d) )
1759		ROM_LOAD( "sex1_1a.bin",  0x90000, 0x8000, CRC(ed7604b8) SHA1(b1e841b50b8ef6ae95fafac1c34b6d0337a05d18) )
	1777	ROM_LOAD( "phrz1-07_sex-2a", 0x80000, 0x8000, CRC(7ef3bca7) SHA1(f25cd01f996882a500e1a800d924759cd1de255d) )
	1778	ROM_LOAD( "phrz1-07_sex-1a", 0x90000, 0x8000, CRC(ed7604b8) SHA1(b1e841b50b8ef6ae95fafac1c34b6d0337a05d18) )
1760	1779	ROM_END
1761	1780
1762	1781	ROM_START( dodge )

src/mame/drivers/pingpong.c

r6740	r6741
9	9	#include "deprecat.h"
10	10	#include "sound/sn76496.h"
11	11
	12	extern UINT8 *pingpong_videoram;
	13	extern UINT8 *pingpong_colorram;
	14
12	15	extern WRITE8_HANDLER( pingpong_videoram_w );
13	16	extern WRITE8_HANDLER( pingpong_colorram_w );
14	17
r6740	r6741
94	97
95	98	static ADDRESS_MAP_START( pingpong_map, ADDRESS_SPACE_PROGRAM, 8 )
96	99	AM_RANGE(0x0000, 0x7fff) AM_ROM
97		AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(pingpong_colorram_w) AM_BASE_GENERIC(colorram)
98		AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(pingpong_videoram_w) AM_BASE_GENERIC(videoram)
	100	AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(pingpong_colorram_w) AM_BASE(&pingpong_colorram)
	101	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(pingpong_videoram_w) AM_BASE(&pingpong_videoram)
99	102	AM_RANGE(0x9000, 0x9002) AM_RAM
100	103	AM_RANGE(0x9003, 0x9052) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
101	104	AM_RANGE(0x9053, 0x97ff) AM_RAM
r6740	r6741
115	118	AM_RANGE(0x5400, 0x57ff) AM_RAM
116	119	AM_RANGE(0x6000, 0x6007) AM_WRITENOP /* solenoid writes */
117	120	AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN4")
118		AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(pingpong_colorram_w) AM_BASE_GENERIC(colorram)
119		AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(pingpong_videoram_w) AM_BASE_GENERIC(videoram)
	121	AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(pingpong_colorram_w) AM_BASE(&pingpong_colorram)
	122	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(pingpong_videoram_w) AM_BASE(&pingpong_videoram)
120	123	AM_RANGE(0x9000, 0x9002) AM_RAM
121	124	AM_RANGE(0x9003, 0x9052) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
122	125	AM_RANGE(0x9053, 0x97ff) AM_RAM

src/mame/drivers/blstroid.c

r6740	r6741
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "machine/atarigen.h"
23	23	#include "audio/atarijsa.h"
24		#include "blstroid.h"
	24	#include "includes/blstroid.h"
25	25
26	26
27	27
r6740	r6741
46	46	}
47	47
48	48
	49	static MACHINE_START( blstroid )
	50	{
	51	atarigen_init(machine);
	52	}
	53
	54
49	55	static MACHINE_RESET( blstroid )
50	56	{
51	57	blstroid_state *state = (blstroid_state *)machine->driver_data;
r6740	r6741
202	208	MDRV_CPU_PROGRAM_MAP(main_map)
203	209	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
204	210
	211	MDRV_MACHINE_START(blstroid)
205	212	MDRV_MACHINE_RESET(blstroid)
206	213	MDRV_NVRAM_HANDLER(atarigen)
207	214

src/mame/drivers/aztarac.c

r6740	r6741
17	17	#include "cpu/z80/z80.h"
18	18	#include "cpu/m68000/m68000.h"
19	19	#include "video/vector.h"
20		#include "aztarac.h"
	20	#include "includes/aztarac.h"
21	21	#include "sound/ay8910.h"
22	22
23	23

src/mame/drivers/meadows.c

r6740	r6741
118	118
119	119	#include "driver.h"
120	120	#include "cpu/s2650/s2650.h"
121		#include "meadows.h"
	121	#include "includes/meadows.h"
122	122	#include "sound/dac.h"
123	123	#include "sound/samples.h"
124	124

src/mame/drivers/sms.c

r6740	r6741
516	516	static MACHINE_START( sms )
517	517	{
518	518	memory_configure_bank(machine, "bank1", 0, 16, memory_region(machine, "questions"), 0x4000);
	519
	520	state_save_register_global(machine, communication_port_status);
	521	state_save_register_global_array(machine, communication_port);
519	522	}
520	523
521	524	static MACHINE_START( sureshot )
522	525	{
	526	state_save_register_global(machine, communication_port_status);
	527	state_save_register_global_array(machine, communication_port);
523	528	}
524	529
525	530	static MACHINE_RESET( sms )
526	531	{
527	532	communication_port_status = 0;
528
529		state_save_register_global(machine, communication_port_status);
530		state_save_register_global_array(machine, communication_port);
531	533	}
532	534
533	535	static MACHINE_DRIVER_START( sms )

src/mame/drivers/harddriv.c

r6740	r6741
172	172	PCB Layouts
173	173	-----------
174	174
	175
175	176	Driver Sound
176	177	A046491
177	178	|------------------------------------------------------------------------------------------------------|
r6740	r6741
187	188	|               |  8  |   6264                   CY7C168                         SOCKET     136052-1124.55A
188	189	|      16MHz    |  0  |                                        |---|                                   |
189	190	|               |  0  |   136077-1032-70N        CY7C168       |TMS|             SOCKET     136052-1123.65A
190		|               |  0  |                                        |   |                                   |
	191	|      LED      |  0  |                                        |   |                                   |
191	192	|               |     |   6264                   CY7C168       |320|
192	193	|               |     |                                        |C10|                                   |
193		|               |     |                                   20MHz|   |                                   |
	194	|               |     |            LED                    20MHz|   |                                   |
194	195	|               |-----|                                        |   |            95C           95A      |
195	196	|                                                              |---|          GAL16V8       GAL16V8    |
196	197	|                                                                           (136052-1140) (136052-1139)|
197	198	|                                                                                                      |
198	199	|                                                                                                      |
199		|                                                                                                      |
	200	|        LED                                                                                           |
200	201	|  J2                                  J5                  TL084     TL084     TL084                   |
201	202	|------------------------------------------------------------------------------------------------------|
	203	Notes:
	204	68000 clock input - 8.000MHz [16/2]
202	205
	206
	207	DSK
	208	A047724-01
	209	|-----------------------------------------------|
	210	|  (SLAPSTICK?)       |---------------------|   |
	211	|  DIP20_SOCKET       |---------------------|   |
	212	|                                            LED|
	213	|                     40B            60B        |
	214	|                  GAL20V8A       GAL20V8A      |
	215	|                136077-1025     136077-1026    |
	216	|MK48Z02B.10C  MK48Z02B.30C                     |
	217	|                                               |
	218	|                                               |
	219	|62256       62256                      62256   |
	220	|                                               |
	221	|                                               |
	222	|136078-1031.10E         |-----------|  62256   |
	223	|         136078-1030.30E|           |          |
	224	|                        |137661-100 |          |
	225	|SOCKET      SOCKET      |           |  62256   |
	226	|                        |           |          |
	227	|          |-------|     |           |          |
	228	|          |137665-|     |-----------|  62256   |
	229	|          |1020   |                            |
	230	|          |LC9040 |        40MHz               |
	231	|          |-------|                            |
	232	|  LED        20MHz                             |
	233	|-----------------------------------------------|
	234
	235
	236
	237	ADSP II
	238	A047046-01
	239	|------------------------------------------------------------------------------------------------------|
	240	|                     |---------------------|                                                          |
	241	|CY7C168   CY7C168    |---------------------|                  CY7C168           6264       6264       |
	242	|                                                                                                      |
	243	|CY7C168   CY7C168        LED                                  CY7C168                                 |
	244	|                                                                                                      |
	245	|CY7C168   CY7C168                                             CY7C168                                 |
	246	|                                                                                                      |
	247	|                                                              CY7C168                                 |
	248	|                                    32MHz                                                             |
	249	|CY7C168   CY7C168                  |-------|                  CY7C168                                 |
	250	|                                   | ADSP  |                                                          |
	251	|CY7C168   CY7C168                  | 2100  |                  CY7C168                                 |
	252	|                                   |       |                                                          |
	253	|CY7C168   CY7C168                  |-------|                  CY7C168                                 |
	254	|                                                                                                      |
	255	|                                                              CY7C168                                 |
	256	|136077-2022.10H                                                                 6264       6264       |
	257	|      136077-2021.9/10H                                                                               |
	258	|                 SOCKET                                                                               |
	259	|136077-2024.10K                                                                                       |
	260	|      136077-2023.9/10K                                                                               |
	261	|                 SOCKET                                                                               |
	262	|                                          LED  LED                                                    |
	263	|------------------------------------------------------------------------------------------------------|
	264
	265
	266
	267	MULTISYNC
	268	A046901
	269	|------------------------------------------------------------------------------------------------------|
	270	|                     |---------------------|     136078-4001.210R           136078-4009.210V          |
	271	|                     |---------------------|        136078-4003.210S           136078-1011.210W       |
	272	|                                                      136078-4005.210T           136078-1013.210X     |
	273	| 68681       6264  6264  MK48Z02B.210E                  136078-4007.210U           136078-4015.210Y   |
	274	|  3.6864MHz                        (SLAPSTICK)                                                        |
	275	|                                   (DIP20)       136078-4002.200R           136078-4010.200V          |
	276	|J2                                 137412-117       136078-4004.200S           136078-1012.200W       |
	277	|             6264  6264  MK48T02B.200E                136078-4006.200T           136078-1014.200X     |
	278	|                                                        136078-4008.200U           136078-4016.200Y   |
	279	|J3                                                                                                    |
	280	|                                                                      136068-1168.195U                |
	281	|                                                                        (82S123 PROM)                 |
	282	|                  |----------------------------|                                           J13        |
	283	|                  |                            |                                                      |
	284	|J6                |           68010            |                                                      |
	285	|                  |                            |                                                      |
	286	|                  |----------------------------|                                                      |
	287	|                                                                     |-------|                  32MHZ |
	288	|J5                            32MHz                                  |TMS    |                        |
	289	|                                                              48MHz  |34010  |                        |
	290	|                                                                     |       |                   LED  |
	291	|                                                                     |-------|                        |
	292	|                                                                                                      |
	293	|                                                                                                      |
	294	|J4          DSW(8)                                                   |-------|                        |
	295	|                                                                     |SCX    |                        |
	296	|      LED LED                                                        |6218UTP|                        |
	297	|                                                                     |       |                        |
	298	|                                   |-------|                         |-------|                        |
	299	|J15                                |       |                                                          |
	300	|                                   |       |                                                          |
	301	|               J12  LED            |       |             42C4064  42C4064  42C4064  42C4064           |
	302	|                                   |-------|                                                          |
	303	|J14                            (EMPTY PLCC68 SOCKET)     42C4064  42C4064  42C4064  42C4064           |
	304	|                                                                                                      |
	305	|                                                         42C4064  42C4064  42C4064  42C4064           |
	306	|       ADC0809                 |--EMPTY_SOCKETS--|                                                    |
	307	|J9                             DIP20        DIP20        42C4064  42C4064  42C4064  42C4064           |
	308	|               J1                                                                                     |
	309	|                               DIP20        DIP20                  CY2149   CY2149   CY2149           |
	310	|      LED                                                                                             |
	311	|                               DIP20        DIP20                  CY2149   CY2149   CY2149           |
	312	|J8               LED  LED                                                                             |
	313	|                 LED  LED      DIP20        DIP20                                  J10                |
	314	|------------------------------------------------------------------------------------------------------|
	315	Notes:
	316	68010 clock input - 8.000MHz [32/4]
	317	34010 clock input - 48.000MHz
	318
203	319	****************************************************************************/
204	320
205	321
r6740	r6741
212	328	#include "machine/atarigen.h"
213	329	#include "machine/asic65.h"
214	330	#include "audio/atarijsa.h"
215		#include "harddriv.h"
	331	#include "includes/harddriv.h"
216	332	#include "sound/dac.h"
217	333
218	334	/* from slapstic.c */
r6740	r6741
1022	1138	MDRV_MACHINE_RESET(harddriv)
1023	1139	MDRV_NVRAM_HANDLER(atarigen)
1024	1140
	1141	MDRV_TIMER_ADD("duart_timer", hd68k_duart_callback)
	1142
1025	1143	/* video hardware */
1026	1144	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1027	1145	MDRV_PALETTE_LENGTH(1024)

src/mame/drivers/madalien.c

r6740	r6741
10	10	#include "cpu/m6502/m6502.h"
11	11	#include "sound/ay8910.h"
12	12	#include "video/mc6845.h"
13		#include "madalien.h"
	13	#include "includes/madalien.h"
14	14
15	15
16	16	#define SOUND_CLOCK XTAL_4MHz

src/mame/drivers/aeroboto.c

r6740	r6741
25	25	#include "driver.h"
26	26	#include "cpu/m6809/m6809.h"
27	27	#include "sound/ay8910.h"
28		#include "aeroboto.h"
	28	#include "includes/aeroboto.h"
29	29
30	30
31	31	static READ8_HANDLER( aeroboto_201_r )

src/mame/drivers/konamigv.c

r6740	r6741
317	317	psx_dma_install_write_handler(5, scsi_dma_write);
318	318	}
319	319
320		static MACHINE_RESET( konamigv )
	320	static MACHINE_START( konamigv )
321	321	{
322		psx_machine_init(machine);
323
324		/* also hook up CDDA audio to the CD-ROM drive */
325		cdda_set_cdrom(devtag_get_device(machine, "cdda"), am53cf96_get_device(SCSI_ID_4));
326
327	322	state_save_register_global_array(machine, sector_buffer);
328	323	state_save_register_global(machine, flash_address);
329	324	state_save_register_global_array(machine, trackball_prev);
r6740	r6741
332	327	state_save_register_global_array(machine, btc_trackball_data);
333	328	}
334	329
	330	static MACHINE_RESET( konamigv )
	331	{
	332	psx_machine_init(machine);
	333
	334	/* also hook up CDDA audio to the CD-ROM drive */
	335	cdda_set_cdrom(devtag_get_device(machine, "cdda"), am53cf96_get_device(SCSI_ID_4));
	336	}
	337
335	338	static void spu_irq(const device_config *device, UINT32 data)
336	339	{
337	340	psx_irq_set(device->machine, data);
r6740	r6741
351	354	MDRV_CPU_PROGRAM_MAP( konamigv_map)
352	355	MDRV_CPU_VBLANK_INT("screen", psx_vblank)
353	356
	357	MDRV_MACHINE_START( konamigv )
354	358	MDRV_MACHINE_RESET( konamigv )
355	359	MDRV_NVRAM_HANDLER(konamigv_93C46)
356	360

src/mame/drivers/firetrap.c

r6740	r6741
62	62	#include "cpu/m6502/m6502.h"
63	63	#include "sound/3526intf.h"
64	64	#include "sound/msm5205.h"
65		#include "firetrap.h"
	65	#include "includes/firetrap.h"
66	66
67	67
68	68	static WRITE8_HANDLER( firetrap_nmi_disable_w )

src/mame/drivers/thedeep.c

r6740	r6741
28	28	#include "cpu/z80/z80.h"
29	29	#include "cpu/m6502/m6502.h"
30	30	#include "deprecat.h"
31		#include "thedeep.h"
	31	#include "includes/thedeep.h"
32	32	#include "sound/2203intf.h"
33	33
34	34	/***************************************************************************

src/mame/drivers/zr107.c

r6740	r6741
169	169	#include "cpu/sharc/sharc.h"
170	170	#include "sound/k054539.h"
171	171	#include "machine/konppc.h"
172		#include "machine/konamiic.h"
173	172	#include "machine/adc083x.h"
174	173	#include "machine/eepromdev.h"
175		#include "video/konamiic.h"
	174	#include "video/konicdev.h"
176	175	#include "video/gticlub.h"
	176	#include "sound/k056800.h"
177	177
178
179	178	static UINT8 led_reg0, led_reg1;
180	179
181	180
r6740	r6741
237	236
238	237	#define NUM_LAYERS   2
239	238
240		static void game_tile_callback(int layer, int *code, int *color, int *flags)
	239	static void game_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags)
241	240	{
242	241	*color += layer * 0x40;
243	242	}
244	243
245	244	static VIDEO_START( zr107 )
246	245	{
247		static int scrolld[NUM_LAYERS][4][2] = {
248		{{ 0, 0}, {0, 0}, {0, 0}, {0, 0}},
249		{{ 0, 0}, {0, 0}, {0, 0}, {0, 0}}
250		};
	246	const device_config *k056832 = devtag_get_device(machine, "k056832");
251	247
252		K056832_vh_start(machine, "gfx2", K056832_BPP_8, 1, scrolld, game_tile_callback, 0);
	248	k056832_set_layer_offs(k056832, 0, -29, -27);
	249	k056832_set_layer_offs(k056832, 1, -29, -27);
	250	k056832_set_layer_offs(k056832, 2, -29, -27);
	251	k056832_set_layer_offs(k056832, 3, -29, -27);
	252	k056832_set_layer_offs(k056832, 4, -29, -27);
	253	k056832_set_layer_offs(k056832, 5, -29, -27);
	254	k056832_set_layer_offs(k056832, 6, -29, -27);
	255	k056832_set_layer_offs(k056832, 7, -29, -27);
	256
253	257	K001006_init(machine);
254	258	K001005_init(machine);
255	259	}
256	260
257	261	static VIDEO_UPDATE( zr107 )
258	262	{
	263	const device_config *k056832 = devtag_get_device(screen->machine, "k056832");
259	264	bitmap_fill(bitmap, cliprect, screen->machine->pens[0]);
260	265
261		K056832_set_LayerOffset(0, -29, -27);
262		K056832_set_LayerOffset(1, -29, -27);
263		K056832_set_LayerOffset(2, -29, -27);
264		K056832_set_LayerOffset(3, -29, -27);
265		K056832_set_LayerOffset(4, -29, -27);
266		K056832_set_LayerOffset(5, -29, -27);
267		K056832_set_LayerOffset(6, -29, -27);
268		K056832_set_LayerOffset(7, -29, -27);
269
270		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 1, 0, 0);
	266	k056832_tilemap_draw(k056832, bitmap, cliprect, 1, 0, 0);
271	267	K001005_draw(bitmap, cliprect);
272		K056832_tilemap_draw(screen->machine, bitmap, cliprect, 0, 0, 0);
	268	k056832_tilemap_draw(k056832, bitmap, cliprect, 0, 0, 0);
273	269
274	270	draw_7segment_led(bitmap, 3, 3, led_reg0);
275	271	draw_7segment_led(bitmap, 9, 3, led_reg1);
r6740	r6741
410	406
411	407	static ADDRESS_MAP_START( zr107_map, ADDRESS_SPACE_PROGRAM, 32 )
412	408	AM_RANGE(0x00000000, 0x000fffff) AM_RAM   AM_BASE(&workram)   /* Work RAM */
413		AM_RANGE(0x74000000, 0x74003fff) AM_READWRITE(K056832_ram_long_r, K056832_ram_long_w)
414		AM_RANGE(0x74020000, 0x7402003f) AM_READWRITE(K056832_long_r, K056832_long_w)
	409	AM_RANGE(0x74000000, 0x74003fff) AM_DEVREADWRITE("k056832", k056832_ram_long_r, k056832_ram_long_w)
	410	AM_RANGE(0x74020000, 0x7402003f) AM_DEVREADWRITE("k056832", k056832_long_r, k056832_long_w)
415	411	AM_RANGE(0x74060000, 0x7406003f) AM_READWRITE(ccu_r, ccu_w)
416	412	AM_RANGE(0x74080000, 0x74081fff) AM_RAM_WRITE(paletteram32_w) AM_BASE_GENERIC(paletteram)
417		AM_RANGE(0x740a0000, 0x740a3fff) AM_READ(K056832_rom_long_r)
	413	AM_RANGE(0x740a0000, 0x740a3fff) AM_DEVREAD("k056832", k056832_rom_long_r)
418	414	AM_RANGE(0x78000000, 0x7800ffff) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)      /* 21N 21K 23N 23K */
419	415	AM_RANGE(0x78010000, 0x7801ffff) AM_WRITE(cgboard_dsp_shared_w_ppc)
420	416	AM_RANGE(0x78040000, 0x7804000f) AM_READWRITE(K001006_0_r, K001006_0_w)
r6740	r6741
422	418	AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
423	419	AM_RANGE(0x7e008000, 0x7e009fff) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff)            /* LANC registers */
424	420	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_READWRITE(lanc_ram_r, lanc_ram_w) AM_BASE(&lanc_ram)      /* LANC Buffer RAM (27E) */
425		AM_RANGE(0x7e00c000, 0x7e00c007) AM_WRITE(K056800_host_w)
426		AM_RANGE(0x7e00c008, 0x7e00c00f) AM_READ(K056800_host_r)
	421	AM_RANGE(0x7e00c000, 0x7e00c007) AM_DEVWRITE("k056800", k056800_host_w)
	422	AM_RANGE(0x7e00c008, 0x7e00c00f) AM_DEVREAD("k056800", k056800_host_r)
427	423	AM_RANGE(0x7f800000, 0x7f9fffff) AM_ROM AM_SHARE("share2")
428	424	AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION("user1", 0) AM_SHARE("share2")   /* Program ROM */
429	425	ADDRESS_MAP_END
r6740	r6741
450	446	AM_RANGE(0x7e000000, 0x7e003fff) AM_MIRROR(0x80000000) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
451	447	AM_RANGE(0x7e008000, 0x7e009fff) AM_MIRROR(0x80000000) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff)            /* LANC registers */
452	448	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_MIRROR(0x80000000) AM_READWRITE(lanc_ram_r, lanc_ram_w)    AM_BASE(&lanc_ram)   /* LANC Buffer RAM (27E) */
453		AM_RANGE(0x7e00c000, 0x7e00c007) AM_MIRROR(0x80000000) AM_WRITE(K056800_host_w)
454		AM_RANGE(0x7e00c008, 0x7e00c00f) AM_MIRROR(0x80000000) AM_READ(K056800_host_r)
	449	AM_RANGE(0x7e00c000, 0x7e00c007) AM_MIRROR(0x80000000) AM_DEVWRITE("k056800", k056800_host_w)
	450	AM_RANGE(0x7e00c008, 0x7e00c00f) AM_MIRROR(0x80000000) AM_DEVREAD("k056800", k056800_host_r)
455	451	AM_RANGE(0x7f000000, 0x7f3fffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION("user2", 0)
456	452	AM_RANGE(0x7f800000, 0x7f9fffff) AM_MIRROR(0x80000000) AM_ROM AM_SHARE("share2")
457	453	AM_RANGE(0x7fe00000, 0x7fffffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION("user1", 0) AM_SHARE("share2")   /* Program ROM */
r6740	r6741
485	481	AM_RANGE(0x000000, 0x01ffff) AM_ROM
486	482	AM_RANGE(0x100000, 0x103fff) AM_RAM      /* Work RAM */
487	483	AM_RANGE(0x200000, 0x2004ff) AM_READWRITE(dual539_r, dual539_w)
488		AM_RANGE(0x400000, 0x40000f) AM_WRITE(K056800_sound_w)
489		AM_RANGE(0x400010, 0x40001f) AM_READ(K056800_sound_r)
	484	AM_RANGE(0x400000, 0x40000f) AM_DEVWRITE("k056800", k056800_sound_w)
	485	AM_RANGE(0x400010, 0x40001f) AM_DEVREAD("k056800", k056800_sound_r)
490	486	AM_RANGE(0x580000, 0x580001) AM_WRITENOP
491	487	ADDRESS_MAP_END
492	488
r6740	r6741
682	678	};
683	679
684	680
	681	static TIMER_CALLBACK( irq_off )
	682	{
	683	cputag_set_input_line(machine, "audiocpu", param, CLEAR_LINE);
	684	}
	685
	686	static void sound_irq_callback( running_machine *machine, int irq )
	687	{
	688	int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
	689
	690	cputag_set_input_line(machine, "audiocpu", line, ASSERT_LINE);
	691	timer_set(machine, ATTOTIME_IN_USEC(1), NULL, line, irq_off);
	692	}
	693
	694	static const k056800_interface zr107_k056800_interface =
	695	{
	696	sound_irq_callback
	697	};
	698
	699	static const k056832_interface zr107_k056832_intf =
	700	{
	701	"gfx2", 1,
	702	K056832_BPP_8,
	703	1, 0,
	704	KONAMI_ROM_DEINTERLEAVE_NONE,
	705	game_tile_callback, "none"
	706	};
	707
685	708	/* PowerPC interrupts
686	709
687	710	IRQ0:  Vblank
r6740	r6741
693	716	{
694	717	cpu_set_input_line(device, INPUT_LINE_IRQ0, ASSERT_LINE);
695	718	}
	719
696	720	static MACHINE_RESET( zr107 )
697	721	{
698	722	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
r6740	r6741
730	754	MDRV_VIDEO_START(zr107)
731	755	MDRV_VIDEO_UPDATE(zr107)
732	756
	757	MDRV_K056832_ADD("k056832", zr107_k056832_intf)
	758
	759	MDRV_K056800_ADD("k056800", zr107_k056800_interface)
	760
733	761	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
734	762
735	763	MDRV_SOUND_ADD("konami1", K054539, 48000)
r6740	r6741
777	805	MDRV_VIDEO_START(jetwave)
778	806	MDRV_VIDEO_UPDATE(jetwave)
779	807
	808	MDRV_K056800_ADD("k056800", zr107_k056800_interface)
	809
780	810	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
781	811
782	812	MDRV_SOUND_ADD("konami1", K054539, 48000)
r6740	r6741
794	824
795	825	/*****************************************************************************/
796	826
797		static TIMER_CALLBACK( irq_off )
798		{
799		cputag_set_input_line(machine, "audiocpu", param, CLEAR_LINE);
800		}
801
802		static void sound_irq_callback(running_machine *machine, int irq)
803		{
804		int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
805		cputag_set_input_line(machine, "audiocpu", line, ASSERT_LINE);
806		timer_set(machine, ATTOTIME_IN_USEC(1), NULL, line, irq_off);
807		}
808
809	827	static void init_zr107(running_machine *machine)
810	828	{
811	829	sharc_dataram = auto_alloc_array(machine, UINT32, 0x100000/4);
r6740	r6741
813	831	ccu_vcth = ccu_vctl = 0;
814	832
815	833	K001005_preprocess_texture_data(memory_region(machine, "gfx1"), memory_region_length(machine, "gfx1"), 0);
816
817		K056800_init(machine, sound_irq_callback);
818	834	}
819	835
820	836	static DRIVER_INIT(zr107)

src/mame/drivers/bladestl.c

r6740	r6741
1	1	/***************************************************************************
2	2
3		Blades of Steel(GX797) (c) 1987 Konami
	3	Blades of Steel (GX797) (c) 1987 Konami
4	4
5		Driver by Manuel Abadia <manu@teleline.es>
	5	Driver by Manuel Abadia <manu@teleline.es>
6	6
7		Interrupts:
	7	Interrupts:
8	8
9		CPU #0 (6309):
10		--------------
11		* IRQ: not used.
12		* FIRQ: generated by VBLANK.
13		* NMI: writes the sound command to the 6809.
	9	CPU #0 (6309):
	10	--------------
	11	* IRQ: not used.
	12	* FIRQ: generated by VBLANK.
	13	* NMI: writes the sound command to the 6809.
14	14
15		CPU #1 (6809):
16		--------------
17		* IRQ: triggered by the 6309 when a sound command is written.
18		* FIRQ: not used.
19		* NMI: not used.
	15	CPU #1 (6809):
	16	--------------
	17	* IRQ: triggered by the 6309 when a sound command is written.
	18	* FIRQ: not used.
	19	* NMI: not used.
20	20
21		Notes:
22		* The protection is not fully understood(Konami 051733). The
23		game is playable, but is not 100% accurate.
24		* Missing samples.
	21	Notes:
	22	* The protection is not fully understood(Konami 051733). The
	23	game is playable, but is not 100% accurate.
	24	* Missing samples.
25	25
26	26	***************************************************************************/
27	27
r6740	r6741
29	29	#include "deprecat.h"
30	30	#include "cpu/m6809/m6809.h"
31	31	#include "cpu/hd6309/hd6309.h"
32		#include "video/konamiic.h"
33	32	#include "sound/2203intf.h"
34	33	#include "sound/upd7759.h"
35		#include "konamipt.h"
	34	#include "video/konicdev.h"
	35	#include "includes/konamipt.h"
	36	#include "includes/bladestl.h"
36	37
37		/* from video */
38		int bladestl_spritebank;
39		PALETTE_INIT( bladestl );
40		VIDEO_START( bladestl );
41		VIDEO_UPDATE( bladestl );
42	38
43	39	static INTERRUPT_GEN( bladestl_interrupt )
44	40	{
45		if (cpu_getiloops(device) == 0){
46		if (K007342_is_INT_enabled())
	41	bladestl_state *state = (bladestl_state *)device->machine->driver_data;
	42
	43	if (cpu_getiloops(device) == 0)
	44	{
	45	if (k007342_is_int_enabled(state->k007342))
47	46	cpu_set_input_line(device, HD6309_FIRQ_LINE, HOLD_LINE);
48	47	}
49		else if (cpu_getiloops(device) % 2){
	48	else if (cpu_getiloops(device) % 2)
	49	{
50	50	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
51	51	}
52	52	}
53	53
	54	/*************************************
	55	*
	56	*  Memory handlers
	57	*
	58	*************************************/
	59
54	60	static READ8_HANDLER( trackball_r )
55	61	{
56		static int last[4];
57		int curr,delta;
	62	bladestl_state *state = (bladestl_state *)space->machine->driver_data;
58	63	static const char *const port[] = { "TRACKBALL_P1_1", "TRACKBALL_P1_2", "TRACKBALL_P2_1", "TRACKBALL_P1_2" };
	64	int curr, delta;
59	65
60	66	curr = input_port_read(space->machine, port[offset]);
61		delta = (curr - last[offset]) & 0xff;
62		last[offset] = curr;
	67	delta = (curr - state->last_track[offset]) & 0xff;
	68	state->last_track[offset] = curr;
	69
63	70	return (delta & 0x80) | (curr >> 1);
64	71	}
65	72
66	73	static WRITE8_HANDLER( bladestl_bankswitch_w )
67	74	{
68		UINT8 *RAM = memory_region(space->machine, "maincpu");
69		int bankaddress;
	75	bladestl_state *state = (bladestl_state *)space->machine->driver_data;
70	76
71	77	/* bits 0 & 1 = coin counters */
72	78	coin_counter_w(space->machine, 0,data & 0x01);
r6740	r6741
79	85	/* bit 4 = relay (???) */
80	86
81	87	/* bits 5-6 = bank number */
82		bankaddress = 0x10000 + ((data & 0x60) >> 5) * 0x2000;
83		memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
	88	memory_set_bank(space->machine, "bank1", (data & 0x60) >> 5);
84	89
85	90	/* bit 7 = select sprite bank */
86		bladestl_spritebank = (data & 0x80) << 3;
	91	state->spritebank = (data & 0x80) << 3;
87	92
88	93	}
89	94
90	95	static WRITE8_HANDLER( bladestl_sh_irqtrigger_w )
91	96	{
	97	bladestl_state *state = (bladestl_state *)space->machine->driver_data;
	98
92	99	soundlatch_w(space, offset, data);
93		cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
	100	cpu_set_input_line(state->audiocpu, M6809_IRQ_LINE, HOLD_LINE);
94	101	//logerror("(sound) write %02x\n", data);
95	102	}
96	103
97		static WRITE8_DEVICE_HANDLER( bladestl_port_B_w ){
	104	static WRITE8_DEVICE_HANDLER( bladestl_port_B_w )
	105	{
98	106	/* bit 1, 2 unknown */
99		upd7759_set_bank_base(device, ((data & 0x38) >> 3)*0x20000);
	107	upd7759_set_bank_base(device, ((data & 0x38) >> 3) * 0x20000);
100	108	}
101	109
102		static READ8_DEVICE_HANDLER( bladestl_speech_busy_r ){
	110	static READ8_DEVICE_HANDLER( bladestl_speech_busy_r )
	111	{
103	112	return upd7759_busy_r(device) ? 1 : 0;
104	113	}
105	114
106		static WRITE8_DEVICE_HANDLER( bladestl_speech_ctrl_w ){
	115	static WRITE8_DEVICE_HANDLER( bladestl_speech_ctrl_w )
	116	{
107	117	upd7759_reset_w(device, data & 1);
108	118	upd7759_start_w(device, data & 2);
109	119	}
110	120
	121	/*************************************
	122	*
	123	*  Address maps
	124	*
	125	*************************************/
	126
111	127	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
112		AM_RANGE(0x0000, 0x1fff) AM_READWRITE(K007342_r, K007342_w)   /* Color RAM + Video RAM */
113		AM_RANGE(0x2000, 0x21ff) AM_READWRITE(K007420_r, K007420_w)   /* Sprite RAM */
114		AM_RANGE(0x2200, 0x23ff) AM_READWRITE(K007342_scroll_r, K007342_scroll_w)   /* Scroll RAM */
115		AM_RANGE(0x2400, 0x245f) AM_RAM AM_BASE_GENERIC(paletteram)      /* palette */
116		AM_RANGE(0x2600, 0x2607) AM_WRITE(K007342_vreg_w)         /* Video Registers */
	128	AM_RANGE(0x0000, 0x1fff) AM_DEVREADWRITE("k007342", k007342_r, k007342_w)   /* Color RAM + Video RAM */
	129	AM_RANGE(0x2000, 0x21ff) AM_DEVREADWRITE("k007420", k007420_r, k007420_w)   /* Sprite RAM */
	130	AM_RANGE(0x2200, 0x23ff) AM_DEVREADWRITE("k007342", k007342_scroll_r, k007342_scroll_w)   /* Scroll RAM */
	131	AM_RANGE(0x2400, 0x245f) AM_RAM AM_BASE_MEMBER(bladestl_state, paletteram)      /* palette */
	132	AM_RANGE(0x2600, 0x2607) AM_DEVWRITE("k007342", k007342_vreg_w)         /* Video Registers */
117	133	AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("COINSW")            /* DIPSW #3, coinsw, startsw */
118	134	AM_RANGE(0x2e01, 0x2e01) AM_READ_PORT("P1")               /* 1P controls */
119	135	AM_RANGE(0x2e02, 0x2e02) AM_READ_PORT("P2")               /* 2P controls */
r6740	r6741
123	139	AM_RANGE(0x2ec0, 0x2ec0) AM_WRITE(watchdog_reset_w)         /* watchdog reset */
124	140	AM_RANGE(0x2f00, 0x2f03) AM_READ(trackball_r)            /* Trackballs */
125	141	AM_RANGE(0x2f40, 0x2f40) AM_WRITE(bladestl_bankswitch_w)   /* bankswitch control */
126		AM_RANGE(0x2f80, 0x2f9f) AM_READWRITE(K051733_r, K051733_w)   /* Protection: 051733 */
	142	AM_RANGE(0x2f80, 0x2f9f) AM_DEVREADWRITE("k051733", k051733_r, k051733_w)   /* Protection: 051733 */
127	143	AM_RANGE(0x2fc0, 0x2fc0) AM_WRITENOP                  /* ??? */
128	144	AM_RANGE(0x4000, 0x5fff) AM_RAM                        /* Work RAM */
129	145	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")                  /* banked ROM */
r6740	r6741
140	156	AM_RANGE(0x8000, 0xffff) AM_ROM
141	157	ADDRESS_MAP_END
142	158
143		/***************************************************************************
144	159
145		Input Ports
	160	/*************************************
	161	*
	162	*  Input ports
	163	*
	164	*************************************/
146	165
147		***************************************************************************/
148
149	166	static INPUT_PORTS_START( bladestl )
150	167	PORT_START("DSW1")
151	168	KONAMI_COINAGE_ALT_LOC(SW1)
r6740	r6741
223	240
224	241
225	242
	243	/*************************************
	244	*
	245	*  Graphics definitions
	246	*
	247	*************************************/
	248
226	249	static const gfx_layout charlayout =
227	250	{
228	251	8,8,         /* 8 x 8 characters */
r6740	r6741
250	273	GFXDECODE_ENTRY( "gfx1", 0x040000, spritelayout,   32,   16 )   /* colors 32..47 but using lookup table */
251	274	GFXDECODE_END
252	275
253		/***************************************************************************
254	276
255		Machine Driver
	277	/*************************************
	278	*
	279	*  Machine driver
	280	*
	281	*************************************/
256	282
257		***************************************************************************/
258
259	283	static const ym2203_interface ym2203_config =
260	284	{
261	285	{
r6740	r6741
269	293	NULL
270	294	};
271	295
	296	static const k007342_interface bladestl_k007342_intf =
	297	{
	298	0,   bladestl_tile_callback   /* gfx_num (for tile creation), callback */
	299	};
	300
	301	static const k007420_interface bladestl_k007420_intf =
	302	{
	303	0x3ff,    bladestl_sprite_callback   /* banklimit, callback */
	304	};
	305
	306
	307	static MACHINE_START( bladestl )
	308	{
	309	bladestl_state *state = (bladestl_state *)machine->driver_data;
	310	UINT8 *ROM = memory_region(machine, "maincpu");
	311
	312	memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x2000);
	313
	314	state->audiocpu = devtag_get_device(machine, "audiocpu");
	315	state->k007342 = devtag_get_device(machine, "k007342");
	316	state->k007420 = devtag_get_device(machine, "k007420");
	317
	318	state_save_register_global(machine, state->spritebank);
	319	state_save_register_global_array(machine, state->layer_colorbase);
	320	state_save_register_global_array(machine, state->last_track);
	321	}
	322
	323	static MACHINE_RESET( bladestl )
	324	{
	325	bladestl_state *state = (bladestl_state *)machine->driver_data;
	326	int i;
	327
	328	state->layer_colorbase[0] = 0;
	329	state->layer_colorbase[1] = 1;
	330	state->spritebank = 0;
	331
	332	for (i = 0; i < 4 ; i++)
	333	state->last_track[i] = 0;
	334	}
	335
272	336	static MACHINE_DRIVER_START( bladestl )
273	337
	338	/* driver data */
	339	MDRV_DRIVER_DATA(bladestl_state)
	340
274	341	/* basic machine hardware */
275	342	MDRV_CPU_ADD("maincpu", HD6309, 24000000/2)      /* 24MHz/2 (?) */
276	343	MDRV_CPU_PROGRAM_MAP(main_map)
r6740	r6741
281	348
282	349	MDRV_QUANTUM_TIME(HZ(600))
283	350
	351	MDRV_MACHINE_START(bladestl)
	352	MDRV_MACHINE_RESET(bladestl)
	353
284	354	/* video hardware */
285	355	MDRV_SCREEN_ADD("screen", RASTER)
286	356	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
293	363	MDRV_PALETTE_INIT(bladestl)
294	364	MDRV_PALETTE_LENGTH(32 + 16*16)
295	365
296		MDRV_VIDEO_START(bladestl)
297	366	MDRV_VIDEO_UPDATE(bladestl)
298	367
	368	MDRV_K007342_ADD("k007342", bladestl_k007342_intf)
	369	MDRV_K007420_ADD("k007420", bladestl_k007420_intf)
	370	MDRV_K051733_ADD("k051733")
	371
299	372	/* sound hardware */
300	373	/* the initialization order is important, the port callbacks being
301	374	called at initialization time */
r6740	r6741
309	382	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.45)
310	383	MACHINE_DRIVER_END
311	384
312		/***************************************************************************
313	385
314		Game ROMs
	386	/*************************************
	387	*
	388	*  ROM definition(s)
	389	*
	390	*************************************/
315	391
316		***************************************************************************/
317
318	392	ROM_START( bladestl )
319	393	ROM_REGION( 0x18000, "maincpu", 0 ) /* code + banked roms */
320	394	ROM_LOAD( "797t01.bin", 0x10000, 0x08000, CRC(89d7185d) SHA1(0d2f346d9515cab0389106c0e227fb0bd84a2c9c) )   /* fixed ROM */
r6740	r6741
356	430	ROM_END
357	431
358	432
359		GAME( 1987, bladestl, 0,        bladestl, bladestl, 0, ROT90, "Konami", "Blades of Steel (version T)", 0 )
360		GAME( 1987, bladestle,bladestl, bladestl, bladstle, 0, ROT90, "Konami", "Blades of Steel (version E)", 0 )
	433	/*************************************
	434	*
	435	*  Game driver(s)
	436	*
	437	*************************************/
	438
	439	GAME( 1987, bladestl,  0,        bladestl, bladestl, 0, ROT90, "Konami", "Blades of Steel (version T)", GAME_SUPPORTS_SAVE )
	440	GAME( 1987, bladestle, bladestl, bladestl, bladstle, 0, ROT90, "Konami", "Blades of Steel (version E)", GAME_SUPPORTS_SAVE )

src/mame/drivers/mcr68.c

r6740	r6741
57	57	#include "cpu/m68000/m68000.h"
58	58	#include "audio/mcr.h"
59	59	#include "audio/williams.h"
60		#include "mcr.h"
	60	#include "includes/mcr.h"
61	61
62	62
63	63

src/mame/drivers/pbaction.c

r6740	r6741
70	70	#include "machine/segacrpt.h"
71	71
72	72
	73	extern UINT8 *pbaction_videoram,*pbaction_colorram;
73	74	extern UINT8 *pbaction_videoram2,*pbaction_colorram2;
74	75
75	76	extern WRITE8_HANDLER( pbaction_videoram_w );
r6740	r6741
99	100	AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE(&work_ram)
100	101	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(pbaction_videoram2_w) AM_BASE(&pbaction_videoram2)
101	102	AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(pbaction_colorram2_w) AM_BASE(&pbaction_colorram2)
102		AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(pbaction_videoram_w) AM_BASE_GENERIC(videoram)
103		AM_RANGE(0xdc00, 0xdfff) AM_RAM_WRITE(pbaction_colorram_w) AM_BASE_GENERIC(colorram)
	103	AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(pbaction_videoram_w) AM_BASE(&pbaction_videoram)
	104	AM_RANGE(0xdc00, 0xdfff) AM_RAM_WRITE(pbaction_colorram_w) AM_BASE(&pbaction_colorram)
104	105	AM_RANGE(0xe000, 0xe07f) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
105	106	AM_RANGE(0xe400, 0xe5ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE_GENERIC(paletteram)
106	107	AM_RANGE(0xe600, 0xe600) AM_READ_PORT("P1") AM_WRITE(interrupt_enable_w)

src/mame/drivers/funworld.c

r6740	r6741
1060	1060	#include "funworld.lh"
1061	1061
1062	1062	/* from video */
	1063	extern UINT8* funworld_videoram;
	1064	extern UINT8* funworld_colorram;
	1065
1063	1066	WRITE8_HANDLER( funworld_videoram_w );
1064	1067	WRITE8_HANDLER( funworld_colorram_w );
1065	1068	PALETTE_INIT( funworld );
r6740	r6741
1113	1116	AM_RANGE(0x0c00, 0x0c01) AM_DEVWRITE("ay8910", ay8910_address_data_w)
1114	1117	AM_RANGE(0x0e00, 0x0e00) AM_DEVWRITE("crtc", mc6845_address_w)
1115	1118	AM_RANGE(0x0e01, 0x0e01) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
1116		AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_GENERIC(videoram)
1117		AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_GENERIC(colorram)
	1119	AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
	1120	AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
1118	1121	AM_RANGE(0x4000, 0x4000) AM_READNOP
1119	1122	AM_RANGE(0x8000, 0xbfff) AM_ROM
1120	1123	AM_RANGE(0xc000, 0xffff) AM_ROM
r6740	r6741
1131	1134	AM_RANGE(0x2c00, 0x2cff) AM_RAM   /* range for protection */
1132	1135	AM_RANGE(0x3600, 0x36ff) AM_RAM   /* some games use $3603-05 range for protection */
1133	1136	AM_RANGE(0x3c00, 0x3cff) AM_RAM   /* range for protection */
1134		AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_GENERIC(videoram)
1135		AM_RANGE(0x5000, 0x5fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_GENERIC(colorram)
	1137	AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
	1138	AM_RANGE(0x5000, 0x5fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
1136	1139	AM_RANGE(0x6000, 0xffff) AM_ROM
1137	1140	ADDRESS_MAP_END
1138	1141
r6740	r6741
1146	1149	AM_RANGE(0x0e01, 0x0e01) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
1147	1150	AM_RANGE(0x2000, 0x2000) AM_READNOP   /* some unknown reads */
1148	1151	AM_RANGE(0x3e00, 0x3fff) AM_RAM   /* some games use $3e03-05 range for protection */
1149		AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_GENERIC(videoram)
1150		AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_GENERIC(colorram)
	1152	AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
	1153	AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
1151	1154	AM_RANGE(0x8000, 0xffff) AM_ROM
1152	1155	ADDRESS_MAP_END
1153	1156
r6740	r6741
1159	1162	AM_RANGE(0x2c00, 0x2c01) AM_DEVWRITE("ay8910", ay8910_address_data_w)
1160	1163	AM_RANGE(0x2e00, 0x2e00) AM_DEVWRITE("crtc", mc6845_address_w)
1161	1164	AM_RANGE(0x2e01, 0x2e01) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
1162		AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_GENERIC(videoram)
1163		AM_RANGE(0x5000, 0x5fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_GENERIC(colorram)
	1165	AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
	1166	AM_RANGE(0x5000, 0x5fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
1164	1167	AM_RANGE(0x6000, 0xffff) AM_ROM
1165	1168	ADDRESS_MAP_END
1166	1169
r6740	r6741
1174	1177	AM_RANGE(0x1800, 0x1800) AM_DEVREAD("ay8910", ay8910_r)
1175	1178	AM_RANGE(0x1800, 0x1801) AM_DEVWRITE("ay8910", ay8910_address_data_w)
1176	1179	//  AM_RANGE(0x2000, 0x2000) AM_READNOP /* some unknown reads... maybe a DSW */
1177		AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_GENERIC(videoram)
1178		AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_GENERIC(colorram)
	1180	AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
	1181	AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
1179	1182	AM_RANGE(0x8000, 0xffff) AM_ROM
1180	1183	ADDRESS_MAP_END
1181	1184

src/mame/drivers/overdriv.c

r6740	r6741
21	21	#include "driver.h"
22	22	#include "cpu/m68000/m68000.h"
23	23	#include "deprecat.h"
24		#include "video/konamiic.h"
25		#include "machine/eeprom.h"
	24	#include "video/konicdev.h"
	25	#include "machine/eepromdev.h"
26	26	#include "cpu/m6809/m6809.h"
27	27	#include "sound/2151intf.h"
28	28	#include "sound/k053260.h"
r6740	r6741
31	31	VIDEO_START( overdriv );
32	32	VIDEO_UPDATE( overdriv );
33	33
	34	extern void overdriv_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
	35	extern void overdriv_zoom_callback_0(running_machine *machine, int *code,int *color,int *flags);
	36	extern void overdriv_zoom_callback_1(running_machine *machine, int *code,int *color,int *flags);
34	37
35		static READ16_HANDLER( K051316_0_msb_r )
36		{
37		return K051316_0_r(space,offset) << 8;
38		}
39
40		static READ16_HANDLER( K051316_1_msb_r )
41		{
42		return K051316_1_r(space,offset) << 8;
43		}
44
45		static READ16_HANDLER( K051316_rom_0_msb_r )
46		{
47		return K051316_rom_0_r(space,offset) << 8;
48		}
49
50		static READ16_HANDLER( K051316_rom_1_msb_r )
51		{
52		return K051316_rom_1_r(space,offset) << 8;
53		}
54
55		static WRITE16_HANDLER( K051316_0_msb_w )
56		{
57		if (ACCESSING_BITS_8_15)
58		K051316_0_w(space,offset,data >> 8);
59		}
60
61		static WRITE16_HANDLER( K051316_1_msb_w )
62		{
63		if (ACCESSING_BITS_8_15)
64		K051316_1_w(space,offset,data >> 8);
65		}
66
67		static WRITE16_HANDLER( K051316_ctrl_0_msb_w )
68		{
69		if (ACCESSING_BITS_8_15)
70		K051316_ctrl_0_w(space,offset,data >> 8);
71		}
72
73		static WRITE16_HANDLER( K051316_ctrl_1_msb_w )
74		{
75		if (ACCESSING_BITS_8_15)
76		K051316_ctrl_1_w(space,offset,data >> 8);
77		}
78
79
80	38	/***************************************************************************
81	39
82	40	EEPROM
83	41
84	42	***************************************************************************/
85	43
86		static const UINT8 default_eeprom[128] =
	44	static const UINT8 overdriv_default_eeprom[128] =
87	45	{
88	46	0x77,0x58,0xFF,0xFF,0x00,0x78,0x90,0x00,0x00,0x78,0x70,0x00,0x00,0x78,0x50,0x00,
89	47	0x54,0x41,0x4B,0x51,0x31,0x36,0x46,0x55,0x4A,0xFF,0x03,0x00,0x02,0x70,0x02,0x50,
r6740	r6741
107	65	"010011000000"   /* unlock command */
108	66	};
109	67
110		static NVRAM_HANDLER( overdriv )
111		{
112		if (read_or_write)
113		eeprom_save(file);
114		else
115		{
116		eeprom_init(machine, &eeprom_intf);
117
118		if (file)
119		eeprom_load(file);
120		else
121		eeprom_set_data(default_eeprom,sizeof(default_eeprom));
122		}
123		}
124
125	68	static WRITE16_HANDLER( eeprom_w )
126	69	{
127	70	//logerror("%06x: write %04x to eeprom_w\n",cpu_get_pc(space->cpu),data);
r6740	r6741
130	73	/* bit 0 is data */
131	74	/* bit 1 is clock (active high) */
132	75	/* bit 2 is cs (active low) */
133		eeprom_write_bit(data & 0x01);
134		eeprom_set_cs_line((data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
135		eeprom_set_clock_line((data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
	76	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
136	77	}
137	78	}
138	79
139	80
140
141
142
143	81	static INTERRUPT_GEN( cpuA_interrupt )
144	82	{
145		if (cpu_getiloops(device)) cpu_set_input_line(device, 5, HOLD_LINE);
146		else cpu_set_input_line(device, 4, HOLD_LINE);
	83	if (cpu_getiloops(device))
	84	cpu_set_input_line(device, 5, HOLD_LINE);
	85	else
	86	cpu_set_input_line(device, 4, HOLD_LINE);
147	87	}
148	88
149	89	static INTERRUPT_GEN( cpuB_interrupt )
150	90	{
151		if (K053246_is_IRQ_enabled()) cpu_set_input_line(device, 4, HOLD_LINE);
	91	const device_config *k053246 = devtag_get_device(device->machine, "k053246");
	92
	93	if (k053246_is_irq_enabled(k053246))
	94	cpu_set_input_line(device, 4, HOLD_LINE);
152	95	}
153	96
154	97
r6740	r6741
185	128
186	129	static WRITE16_HANDLER( cpuB_ctrl_w )
187	130	{
	131	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
188	132	COMBINE_DATA(&cpuB_ctrl);
189	133
190	134	if (ACCESSING_BITS_0_7)
191	135	{
192	136	/* bit 0 = enable sprite ROM reading */
193		K053246_set_OBJCHA_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
	137	k053246_set_objcha_line(k053246, (data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
194	138
195	139	/* bit 1 used but unknown (irq enable?) */
196	140
r6740	r6741
201	145
202	146	static READ8_DEVICE_HANDLER( overdriv_sound_r )
203	147	{
204		return k053260_r(device,2 + offset);
	148	return k053260_r(device, 2 + offset);
205	149	}
206	150
207	151	static WRITE16_HANDLER( overdriv_soundirq_w )
r6740	r6741
232	176	AM_RANGE(0x100000, 0x10001f) AM_WRITENOP         /* 053252? (LSB) */
233	177	AM_RANGE(0x140000, 0x140001) AM_WRITE(watchdog_reset16_w)
234	178	AM_RANGE(0x180000, 0x180001) AM_READ_PORT("PADDLE")
235		AM_RANGE(0x1c0000, 0x1c001f) AM_WRITE(K051316_ctrl_0_msb_w)
236		AM_RANGE(0x1c8000, 0x1c801f) AM_WRITE(K051316_ctrl_1_msb_w)
237		AM_RANGE(0x1d0000, 0x1d001f) AM_WRITE(K053251_msb_w)
	179	AM_RANGE(0x1c0000, 0x1c001f) AM_DEVWRITE8("k051316_1", k051316_ctrl_w, 0xff00)
	180	AM_RANGE(0x1c8000, 0x1c801f) AM_DEVWRITE8("k051316_2", k051316_ctrl_w, 0xff00)
	181	AM_RANGE(0x1d0000, 0x1d001f) AM_DEVWRITE("k053251", k053251_msb_w)
238	182	AM_RANGE(0x1d8000, 0x1d8003) AM_DEVREADWRITE8("konami1", overdriv_sound_r, k053260_w, 0x00ff)   /* K053260 */
239	183	AM_RANGE(0x1e0000, 0x1e0003) AM_DEVREADWRITE8("konami2", overdriv_sound_r, k053260_w, 0x00ff)   /* K053260 */
240	184	AM_RANGE(0x1e8000, 0x1e8001) AM_WRITE(overdriv_soundirq_w)
241	185	AM_RANGE(0x1f0000, 0x1f0001) AM_WRITE(cpuA_ctrl_w)   /* halt cpu B, coin counter, start lamp, other? */
242	186	AM_RANGE(0x1f8000, 0x1f8001) AM_WRITE(eeprom_w)
243	187	AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE("share1")
244		AM_RANGE(0x210000, 0x210fff) AM_READWRITE(K051316_0_msb_r,K051316_0_msb_w)
245		AM_RANGE(0x218000, 0x218fff) AM_READWRITE(K051316_1_msb_r,K051316_1_msb_w)
246		AM_RANGE(0x220000, 0x220fff) AM_READ(K051316_rom_0_msb_r)
247		AM_RANGE(0x228000, 0x228fff) AM_READ(K051316_rom_1_msb_r)
	188	AM_RANGE(0x210000, 0x210fff) AM_DEVREADWRITE8("k051316_1", k051316_r, k051316_w, 0xff00)
	189	AM_RANGE(0x218000, 0x218fff) AM_DEVREADWRITE8("k051316_2", k051316_r, k051316_w, 0xff00)
	190	AM_RANGE(0x220000, 0x220fff) AM_DEVREAD8("k051316_1", k051316_rom_r, 0xff00)
	191	AM_RANGE(0x228000, 0x228fff) AM_DEVREAD8("k051316_2", k051316_rom_r, 0xff00)
248	192	AM_RANGE(0x230000, 0x230001) AM_WRITE(overdriv_cpuB_irq6_w)
249	193	AM_RANGE(0x238000, 0x238001) AM_WRITE(overdriv_cpuB_irq5_w)
250	194	ADDRESS_MAP_END
r6740	r6741
255	199	AM_RANGE(0x0c0000, 0x0c1fff) AM_RAM
256	200	AM_RANGE(0x100000, 0x10000f) AM_NOP   // K053250 #0
257	201	AM_RANGE(0x108000, 0x10800f) AM_NOP   // K053250 #1
258		AM_RANGE(0x118000, 0x118fff) AM_READWRITE(K053247_word_r,K053247_word_w)
259		AM_RANGE(0x120000, 0x120001) AM_READ(K053246_word_r)
	202	AM_RANGE(0x118000, 0x118fff) AM_DEVREADWRITE("k053246", k053247_word_r, k053247_word_w)
	203	AM_RANGE(0x120000, 0x120001) AM_DEVREAD("k053246", k053246_word_r)
260	204	AM_RANGE(0x128000, 0x128001) AM_READWRITE(cpuB_ctrl_r,cpuB_ctrl_w)    /* enable K053247 ROM reading, plus something else */
261		AM_RANGE(0x130000, 0x130007) AM_WRITE(K053246_word_w)
	205	AM_RANGE(0x130000, 0x130007) AM_DEVWRITE("k053246", k053246_word_w)
262	206	AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE("share1")
263	207	AM_RANGE(0x208000, 0x20bfff) AM_RAM
264	208	AM_RANGE(0x218000, 0x219fff) AM_READNOP   // K053250 #0 gfx ROM read (LSB)
r6740	r6741
286	230	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
287	231	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
288	232	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
289		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	233	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
290	234	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
291	235
292	236	PORT_START("SYSTEM")
r6740	r6741
301	245
302	246	PORT_START("PADDLE")
303	247	PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(100) PORT_KEYDELTA(50)
	248
	249	PORT_START( "EEPROMOUT" )
	250	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	251	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	252	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
304	253	INPUT_PORTS_END
305	254
306	255
307
	256	#if 0
308	257	static const gfx_layout charlayout =
309	258	{
310	259	8,8,
r6740	r6741
320	269	GFXDECODE_ENTRY( "gfx4", 0, charlayout, 0, 0x80 )
321	270	GFXDECODE_ENTRY( "gfx5", 0, charlayout, 0, 0x80 )
322	271	GFXDECODE_END
	272	#endif
323	273
324	274
325
326	275	static const k053260_interface k053260_config =
327	276	{
328	277	"shared"
329	278	};
330	279
	280	static const k053247_interface overdriv_k053246_intf =
	281	{
	282	"screen",
	283	"gfx1", 0,
	284	NORMAL_PLANE_ORDER,
	285	77, 22,
	286	KONAMI_ROM_DEINTERLEAVE_4,
	287	overdriv_sprite_callback
	288	};
331	289
	290	static const k051316_interface overdriv_k051316_intf_1 =
	291	{
	292	"gfx2", 1,
	293	4, TRUE, 0,
	294	1, 14, -1,
	295	overdriv_zoom_callback_0
	296	};
332	297
	298	static const k051316_interface overdriv_k051316_intf_2 =
	299	{
	300	"gfx3", 2,
	301	4, FALSE, 0,
	302	0, 15, 1,
	303	overdriv_zoom_callback_1
	304	};
	305
	306
333	307	static MACHINE_DRIVER_START( overdriv )
334	308
335	309	/* basic machine hardware */
r6740	r6741
350	324	MDRV_QUANTUM_TIME(HZ(12000))
351	325
352	326	MDRV_MACHINE_RESET(overdriv)
353		MDRV_NVRAM_HANDLER(overdriv)
354	327
	328	MDRV_EEPROM_ADD("eeprom", eeprom_intf, 128, overdriv_default_eeprom)
	329
355	330	/* video hardware */
356	331	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
357	332
r6740	r6741
362	337	MDRV_SCREEN_SIZE(64*8, 32*8)
363	338	MDRV_SCREEN_VISIBLE_AREA(13*8, (64-13)*8-1, 0*8, 32*8-1 )
364	339
365		MDRV_GFXDECODE(overdriv)
	340	//  MDRV_GFXDECODE(overdriv)
366	341	MDRV_PALETTE_LENGTH(2048)
367	342
368	343	MDRV_VIDEO_START(overdriv)
369	344	MDRV_VIDEO_UPDATE(overdriv)
370	345
	346	MDRV_K053246_ADD("k053246", overdriv_k053246_intf)
	347	MDRV_K051316_ADD("k051316_1", overdriv_k051316_intf_1)
	348	MDRV_K051316_ADD("k051316_2", overdriv_k051316_intf_2)
	349	MDRV_K053251_ADD("k053251")
	350
371	351	/* sound hardware */
372	352	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
373	353
r6740	r6741
433	413	ROM_END
434	414
435	415
436		static DRIVER_INIT( overdriv )
437		{
438		konami_rom_deinterleave_4(machine, "gfx1");
439		}
440
441
442		GAMEL( 1990, overdriv, 0, overdriv, overdriv, overdriv, ROT90, "Konami", "Over Drive", GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING, layout_overdriv )
	416	GAMEL( 1990, overdriv, 0, overdriv, overdriv, 0, ROT90, "Konami", "Over Drive", GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING, layout_overdriv )

src/mame/drivers/spcforce.c

r6740	r6741
37	37	#include "sound/sn76496.h"
38	38
39	39
	40	extern UINT8 *spcforce_videoram;
	41	extern UINT8 *spcforce_colorram;
40	42	extern UINT8 *spcforce_scrollram;
41	43
42	44	WRITE8_HANDLER( spcforce_flip_screen_w );
r6740	r6741
91	93	AM_RANGE(0x700b, 0x700b) AM_WRITE(spcforce_flip_screen_w)
92	94	AM_RANGE(0x700e, 0x700e) AM_WRITE(interrupt_enable_w)
93	95	AM_RANGE(0x700f, 0x700f) AM_WRITENOP
94		AM_RANGE(0x8000, 0x83ff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
95		AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE_GENERIC(colorram)
	96	AM_RANGE(0x8000, 0x83ff) AM_RAM AM_BASE(&spcforce_videoram)
	97	AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE(&spcforce_colorram)
96	98	AM_RANGE(0xa000, 0xa3ff) AM_RAM AM_BASE(&spcforce_scrollram)
97	99	ADDRESS_MAP_END
98	100

src/mame/drivers/xmen.c

r6740	r6741
16	16	#include "driver.h"
17	17	#include "cpu/m68000/m68000.h"
18	18	#include "deprecat.h"
19		#include "video/konamiic.h"
20		#include "machine/eeprom.h"
	19	#include "video/konicdev.h"
	20	#include "machine/eepromdev.h"
21	21	#include "cpu/z80/z80.h"
22	22	#include "sound/2151intf.h"
23	23	#include "sound/k054539.h"
24	24	#include "rendlay.h"
25	25	#include "includes/xmen.h"
26		#include "konamipt.h"
	26	#include "includes/konamipt.h"
27	27
28	28	UINT16 xmen_current_frame;
29	29
r6740	r6741
39	39
40	40	***************************************************************************/
41	41
42		static int init_eeprom_count;
43
44
45	42	static const eeprom_interface eeprom_intf =
46	43	{
47	44	7,            /* address bits */
r6740	r6741
53	50	"0100110000000" /* unlock command */
54	51	};
55	52
56		static NVRAM_HANDLER( xmen )
	53	static WRITE16_HANDLER( eeprom_w )
57	54	{
58		if (read_or_write)
59		eeprom_save(file);
60		else
61		{
62		eeprom_init(machine, &eeprom_intf);
	55	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	56	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
63	57
64		if (file)
65		{
66		init_eeprom_count = 0;
67		eeprom_load(file);
68		}
69		else
70		init_eeprom_count = 10;
71		}
72		}
73
74		static READ16_HANDLER( eeprom_r )
75		{
76		int res;
77
78		logerror("%06x eeprom_r\n",cpu_get_pc(space->cpu));
79		/* bit 6 is EEPROM data */
80		/* bit 7 is EEPROM ready */
81		/* bit 14 is service button */
82		res = input_port_read(space->machine, "EEPROM");
83		if (init_eeprom_count)
84		{
85		init_eeprom_count--;
86		res &= 0xbfff;
87		}
88		return res;
89		}
90
91
92		static WRITE16_HANDLER( eeprom_w )
93		{
94		logerror("%06x: write %04x to 108000\n",cpu_get_pc(space->cpu),data);
	58	logerror("%06x: write %04x to 108000\n",cpu_get_pc(space->cpu),data);
95	59	if (ACCESSING_BITS_0_7)
96	60	{
97	61	/* bit 0 = coin counter */
r6740	r6741
100	64	/* bit 2 is data */
101	65	/* bit 3 is clock (active high) */
102	66	/* bit 4 is cs (active low) */
103		eeprom_write_bit(data & 0x04);
104		eeprom_set_cs_line((data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
105		eeprom_set_clock_line((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	67	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
106	68	}
107	69	if (ACCESSING_BITS_8_15)
108	70	{
109	71	/* bit 8 = enable sprite ROM reading */
110		K053246_set_OBJCHA_line((data & 0x0100) ? ASSERT_LINE : CLEAR_LINE);
	72	k053246_set_objcha_line(k053246, (data & 0x0100) ? ASSERT_LINE : CLEAR_LINE);
111	73	/* bit 9 = enable char ROM reading through the video RAM */
112		K052109_set_RMRD_line((data & 0x0200) ? ASSERT_LINE : CLEAR_LINE);
	74	k052109_set_rmrd_line(k052109, (data & 0x0200) ? ASSERT_LINE : CLEAR_LINE);
113	75	}
114	76	}
115	77
r6740	r6741
161	123	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
162	124	AM_RANGE(0x000000, 0x03ffff) AM_ROM
163	125	AM_RANGE(0x080000, 0x0fffff) AM_ROM
164		AM_RANGE(0x100000, 0x100fff) AM_READWRITE(K053247_word_r, K053247_word_w)
	126	AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE("k053246", k053247_word_r, k053247_word_w)
165	127	AM_RANGE(0x101000, 0x101fff) AM_RAM
166	128	AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
167	129	AM_RANGE(0x108000, 0x108001) AM_WRITE(eeprom_w)
168		AM_RANGE(0x108020, 0x108027) AM_WRITE(K053246_word_w)
	130	AM_RANGE(0x108020, 0x108027) AM_DEVWRITE("k053246", k053246_word_w)
169	131	AM_RANGE(0x10804c, 0x10804d) AM_WRITE(sound_cmd_w)
170	132	AM_RANGE(0x10804e, 0x10804f) AM_WRITE(sound_irq_w)
171	133	AM_RANGE(0x108054, 0x108055) AM_READ(sound_status_r)
172		AM_RANGE(0x108060, 0x10807f) AM_WRITE(K053251_lsb_w)
	134	AM_RANGE(0x108060, 0x10807f) AM_DEVWRITE("k053251", k053251_lsb_w)
173	135	AM_RANGE(0x10a000, 0x10a001) AM_READ_PORT("P2_P4") AM_WRITE(watchdog_reset16_w)
174	136	AM_RANGE(0x10a002, 0x10a003) AM_READ_PORT("P1_P3")
175		AM_RANGE(0x10a004, 0x10a005) AM_READ(eeprom_r)
176		AM_RANGE(0x10a00c, 0x10a00d) AM_READ(K053246_word_r)
	137	AM_RANGE(0x10a004, 0x10a005) AM_READ_PORT("EEPROM")
	138	AM_RANGE(0x10a00c, 0x10a00d) AM_DEVREAD("k053246", k053246_word_r)
177	139	AM_RANGE(0x110000, 0x113fff) AM_RAM      /* main RAM */
178	140	AM_RANGE(0x18fa00, 0x18fa01) AM_WRITE(xmen_18fa00_w)
179		AM_RANGE(0x18c000, 0x197fff) AM_READWRITE(K052109_lsb_r, K052109_lsb_w)
	141	AM_RANGE(0x18c000, 0x197fff) AM_DEVREADWRITE("k052109", k052109_lsb_r, k052109_lsb_w)
180	142	ADDRESS_MAP_END
181	143
182	144	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
200	162	AM_RANGE(0x103000, 0x103fff) AM_RAM      /* 6p - a buffer? */
201	163	AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
202	164	AM_RANGE(0x108000, 0x108001) AM_WRITE(eeprom_w)
203		AM_RANGE(0x108020, 0x108027) AM_WRITE(K053246_word_w) /* sprites */
	165	AM_RANGE(0x108020, 0x108027) AM_DEVWRITE("k053246", k053246_word_w) /* sprites */
204	166	AM_RANGE(0x10804c, 0x10804d) AM_WRITE(sound_cmd_w)
205	167	AM_RANGE(0x10804e, 0x10804f) AM_WRITE(sound_irq_w)
206	168	AM_RANGE(0x108054, 0x108055) AM_READ(sound_status_r)
207		AM_RANGE(0x108060, 0x10807f) AM_WRITE(K053251_lsb_w)
	169	AM_RANGE(0x108060, 0x10807f) AM_DEVWRITE("k053251", k053251_lsb_w)
208	170	AM_RANGE(0x10a000, 0x10a001) AM_READ_PORT("P2_P4") AM_WRITE(watchdog_reset16_w)
209	171	AM_RANGE(0x10a002, 0x10a003) AM_READ_PORT("P1_P3")
210		AM_RANGE(0x10a004, 0x10a005) AM_READ(eeprom_r)
	172	AM_RANGE(0x10a004, 0x10a005) AM_READ_PORT("EEPROM")
211	173	AM_RANGE(0x10a006, 0x10a007) AM_READ_PORT("P5_P6")
212		AM_RANGE(0x10a00c, 0x10a00d) AM_READ(K053246_word_r) /* sprites */
	174	AM_RANGE(0x10a00c, 0x10a00d) AM_DEVREAD("k053246", k053246_word_r) /* sprites */
213	175	AM_RANGE(0x110000, 0x113fff) AM_RAM      /* main RAM */
214	176	AM_RANGE(0x18fa00, 0x18fa01) AM_WRITE(xmen_18fa00_w)
215		/*  AM_RANGE(0x18c000, 0x197fff) AM_WRITE(K052109_lsb_w) AM_BASE(&xmen6p_tilemapleft) */
	177	/*  AM_RANGE(0x18c000, 0x197fff) AM_DEVWRITE("k052109", k052109_lsb_w) AM_BASE(&xmen6p_tilemapleft) */
216	178	AM_RANGE(0x18c000, 0x197fff) AM_RAM AM_BASE(&xmen6p_tilemapleft) /* left tilemap (p1,p2,p3 counters) */
217	179	/*
218	180	AM_RANGE(0x1ac000, 0x1af7ff) AM_READONLY
r6740	r6741
260	222
261	223	PORT_START("EEPROM")
262	224	PORT_BIT( 0x003f, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
263		PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	225	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
264	226	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* EEPROM status - always 1 */
265	227	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
266	228	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_START2 )
r6740	r6741
269	231	PORT_BIT( 0x3000, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
270	232	PORT_SERVICE_NO_TOGGLE( 0x4000, IP_ACTIVE_LOW )
271	233	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
	234
	235	PORT_START( "EEPROMOUT" )
	236	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	237	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	238	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
272	239	INPUT_PORTS_END
273	240
274	241	static INPUT_PORTS_START( xmen2p )
r6740	r6741
284	251	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 )
285	252	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SERVICE2 )
286	253	PORT_BIT( 0x003c, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
287		PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	254	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
288	255	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* EEPROM status - always 1 */
289	256	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
290	257	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_START2 )
r6740	r6741
293	260	PORT_BIT( 0x3000, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
294	261	PORT_SERVICE_NO_TOGGLE( 0x4000, IP_ACTIVE_LOW )
295	262	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
	263
	264	PORT_START( "EEPROMOUT" )
	265	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	266	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	267	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
296	268	INPUT_PORTS_END
297	269
298	270	static CUSTOM_INPUT( xmen_frame_r )
r6740	r6741
315	287
316	288	PORT_START("EEPROM")
317	289	PORT_BIT( 0x003f, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
318		PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	290	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
319	291	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* EEPROM status - always 1 */
320	292	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
321	293	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_START2 )
r6740	r6741
325	297	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_START6 ) /* not verified */
326	298	PORT_SERVICE_NO_TOGGLE( 0x4000, IP_ACTIVE_LOW )
327	299	PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(xmen_frame_r, NULL)   /* screen indicator? */
	300
	301	PORT_START( "EEPROMOUT" )
	302	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	303	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	304	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
328	305	INPUT_PORTS_END
329	306
330	307
r6740	r6741
346	323	state_save_register_postload(machine, xmen_postload, NULL);
347	324	}
348	325
	326
	327	static const k052109_interface xmen_k052109_intf =
	328	{
	329	"gfx1", 0,
	330	NORMAL_PLANE_ORDER,
	331	KONAMI_ROM_DEINTERLEAVE_2,
	332	xmen_tile_callback
	333	};
	334
	335	static const k053247_interface xmen_k053246_intf =
	336	{
	337	"screen",
	338	"gfx2", 1,
	339	NORMAL_PLANE_ORDER,
	340	53, -2,
	341	KONAMI_ROM_DEINTERLEAVE_4,
	342	xmen_sprite_callback
	343	};
	344
349	345	static MACHINE_DRIVER_START( xmen )
350	346
351	347	/* basic machine hardware */
r6740	r6741
358	354
359	355	MDRV_MACHINE_START(xmen)
360	356
361		MDRV_NVRAM_HANDLER(xmen)
	357	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
362	358
363	359	/* video hardware */
364	360	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
r6740	r6741
371	367	MDRV_SCREEN_VISIBLE_AREA(13*8, (64-13)*8-1, 2*8, 30*8-1 )   /* correct, same issue of TMNT2 */
372	368	MDRV_PALETTE_LENGTH(2048)
373	369
374		MDRV_VIDEO_START(xmen)
375	370	MDRV_VIDEO_UPDATE(xmen)
376	371
	372	MDRV_K052109_ADD("k052109", xmen_k052109_intf)
	373	MDRV_K053246_ADD("k053246", xmen_k053246_intf)
	374	MDRV_K053251_ADD("k053251")
	375
377	376	/* sound hardware */
378	377	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
379	378
r6740	r6741
402	401	}
403	402	else
404	403	{
405		//      if (xmen_irqenabled&0x04)
	404	//      if (xmen_irqenabled & 0x04)
406	405	//      {
407	406	irq3_line_hold(device);
408	407	//          xmen_current_frame = 0x00;
r6740	r6741
411	410	}
412	411	}
413	412
	413	static const k053247_interface xmen6p_k053246_intf =
	414	{
	415	"lscreen",   /* is this correct? */
	416	"gfx2", 1,
	417	NORMAL_PLANE_ORDER,
	418	53, -2,
	419	KONAMI_ROM_DEINTERLEAVE_4,
	420	xmen_sprite_callback
	421	};
	422
414	423	static MACHINE_DRIVER_START( xmen6p )
415	424
416	425	/* basic machine hardware */
r6740	r6741
421	430	MDRV_CPU_ADD("audiocpu", Z80,8000000)   /* verified with M1, guessed but accurate */
422	431	MDRV_CPU_PROGRAM_MAP(sound_map)
423	432
	433	MDRV_MACHINE_RESET(xmen6p)
424	434
425		MDRV_NVRAM_HANDLER(xmen)
	435	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
426	436
427		MDRV_MACHINE_RESET(xmen6p)
428
429	437	/* video hardware */
430	438	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
431	439	MDRV_PALETTE_LENGTH(2048)
r6740	r6741
445	453	MDRV_SCREEN_SIZE(64*8, 32*8)
446	454	MDRV_SCREEN_VISIBLE_AREA(16*8, 52*8-1, 2*8, 30*8-1)
447	455
448
449	456	MDRV_VIDEO_START(xmen6p)
450	457	MDRV_VIDEO_UPDATE(xmen6p)
451	458	MDRV_VIDEO_EOF(xmen6p)
452	459
	460	MDRV_K052109_ADD("k052109", xmen_k052109_intf)
	461	MDRV_K053246_ADD("k053246", xmen6p_k053246_intf)
	462	MDRV_K053251_ADD("k053251")
	463
453	464	/* sound hardware */
454	465	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
455	466
r6740	r6741
774	785	ROM_LOAD( "065-a06.1d",  0x000000, 0x200000, CRC(5adbcee0) SHA1(435feda697193bc51db80eba46be474cbbc1de4b) )
775	786	ROM_END
776	787
	788	GAME( 1992, xmen,    0,    xmen, xmen,    0,   ROT0, "Konami", "X-Men (4 Players ver UBB)", 0 ) /* Second "version" letter denotes players, A=2 players, B=4 players, C=6 players ??? */
	789	GAME( 1992, xmenj,   xmen, xmen, xmen,    0,   ROT0, "Konami", "X-Men (4 Players ver JBA)", 0 )
	790	GAME( 1992, xmene,   xmen, xmen, xmen,    0,   ROT0, "Konami", "X-Men (4 Players ver EBA)", 0 )
	791	GAME( 1992, xmen2pe, xmen, xmen, xmen2p,  0,   ROT0, "Konami", "X-Men (2 Players ver EAA)", 0 )
	792	GAME( 1992, xmen2pa, xmen, xmen, xmen2p,  0,   ROT0, "Konami", "X-Men (2 Players ver AAA)", 0 )
	793	GAME( 1992, xmen2pj, xmen, xmen, xmen2p,  0,   ROT0, "Konami", "X-Men (2 Players ver JAA)", 0 )
777	794
778
779
780		static DRIVER_INIT( xmen )
781		{
782		konami_rom_deinterleave_2(machine, "gfx1");
783		konami_rom_deinterleave_4(machine, "gfx2");
784		}
785
786		GAME( 1992, xmen,    0,    xmen, xmen,   xmen,   ROT0, "Konami", "X-Men (4 Players ver UBB)", 0 ) /* Second "version" letter denotes players, A=2 players, B=4 players, C=6 players ??? */
787		GAME( 1992, xmenj,   xmen, xmen, xmen,   xmen,   ROT0, "Konami", "X-Men (4 Players ver JBA)", 0 )
788		GAME( 1992, xmene,   xmen, xmen, xmen,   xmen,   ROT0, "Konami", "X-Men (4 Players ver EBA)", 0 )
789		GAME( 1992, xmen2pe, xmen, xmen, xmen2p, xmen,   ROT0, "Konami", "X-Men (2 Players ver EAA)", 0 )
790		GAME( 1992, xmen2pa, xmen, xmen, xmen2p, xmen,   ROT0, "Konami", "X-Men (2 Players ver AAA)", 0 )
791		GAME( 1992, xmen2pj, xmen, xmen, xmen2p, xmen,   ROT0, "Konami", "X-Men (2 Players ver JAA)", 0 )
792
793		GAME( 1992, xmen6p,  xmen, xmen6p,xmen6p,   xmen, ROT0, "Konami", "X-Men (6 Players ver ECB)", GAME_IMPERFECT_GRAPHICS )
794		GAME( 1992, xmen6pu, xmen, xmen6p,xmen6p,   xmen, ROT0, "Konami", "X-Men (6 Players ver UCB)", GAME_IMPERFECT_GRAPHICS )
	795	GAME( 1992, xmen6p,  xmen, xmen6p,xmen6p, 0,   ROT0, "Konami", "X-Men (6 Players ver ECB)", GAME_IMPERFECT_GRAPHICS )
	796	GAME( 1992, xmen6pu, xmen, xmen6p,xmen6p, 0,   ROT0, "Konami", "X-Men (6 Players ver UCB)", GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/mario.c

r6740	r6741
93	93	#include "cpu/z80/z80.h"
94	94	#include "machine/z80dma.h"
95	95
96		#include "mario.h"
	96	#include "includes/mario.h"
97	97
98	98	/*************************************
99	99	*

src/mame/drivers/nbmj8900.c

r6740	r6741
24	24	******************************************************************************/
25	25
26	26	#include "driver.h"
27		#include "nb1413m3.h"
	27	#include "includes/nb1413m3.h"
28	28	#include "cpu/z80/z80.h"
29	29	#include "sound/dac.h"
30	30	#include "sound/ay8910.h"

src/mame/drivers/atarifb.c

r6740	r6741
105	105	#include "driver.h"
106	106	#include "cpu/m6502/m6502.h"
107	107	#include "deprecat.h"
108		#include "atarifb.h"
	108	#include "includes/atarifb.h"
109	109	#include "sound/discrete.h"
110	110
111	111	#include "atarifb.lh"

src/mame/drivers/lethal.c

r6740	r6741
165	165	***************************************************************************/
166	166
167	167	#include "driver.h"
168		#include "video/konamiic.h"
	168	#include "video/konicdev.h"
169	169	#include "cpu/m6809/m6809.h"
170	170	#include "cpu/hd6309/hd6309.h"
171	171	#include "cpu/z80/z80.h"
172		#include "machine/eeprom.h"
	172	#include "machine/eepromdev.h"
173	173	#include "sound/k054539.h"
174	174
175	175	#define MAIN_CLOCK      XTAL_24MHz
r6740	r6741
186	186	VIDEO_UPDATE(lethalen);
187	187	WRITE8_HANDLER(lethalen_palette_control);
188	188
189		static int init_eeprom_count;
	189	extern void lethalen_sprite_callback(running_machine *machine, int *code, int *color, int *priority_mask);
	190	extern void lethalen_tile_callback(running_machine *machine, int layer, int *code, int *color, int *flags);
	191
190	192	static UINT8 cur_control2;
191	193
192	194	/* Default Eeprom for the parent.. otherwise it will always complain first boot */
r6740	r6741
208	210	"0100110000000"    /* unlock command */
209	211	};
210	212
211		static NVRAM_HANDLER( lethalen )
212		{
213		if (read_or_write)
214		eeprom_save(file);
215		else
216		{
217		eeprom_init(machine, &eeprom_intf);
218
219		if (file)
220		{
221		init_eeprom_count = 0;
222		eeprom_load(file);
223		}
224		else
225		{
226		init_eeprom_count = 10;
227		eeprom_set_data(lethalen_default_eeprom,48);
228
229		}
230		}
231		}
232
233	213	static WRITE8_HANDLER( control2_w )
234	214	{
235	215	/* bit 0 is data */
r6740	r6741
242	222
243	223	cur_control2 = data;
244	224
245		eeprom_write_bit(cur_control2 & 0x01);
246		eeprom_set_cs_line((cur_control2 & 0x02) ? CLEAR_LINE : ASSERT_LINE);
247		eeprom_set_clock_line((cur_control2 & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	225	input_port_write(space->machine, "EEPROMOUT", cur_control2, 0xff);
248	226	}
249	227
250	228	static INTERRUPT_GEN(lethalen_interrupt)
251	229	{
252		if (K056832_is_IRQ_enabled(0)) cpu_set_input_line(device, HD6309_IRQ_LINE, HOLD_LINE);
	230	const device_config *k056832 = devtag_get_device(device->machine, "k056832");
	231
	232	if (k056832_is_irq_enabled(k056832, 0))
	233	cpu_set_input_line(device, HD6309_IRQ_LINE, HOLD_LINE);
253	234	}
254	235
255	236	static WRITE8_HANDLER( sound_cmd_w )
r6740	r6741
281	262
282	263	static READ8_HANDLER( le_4800_r )
283	264	{
	265	const device_config *k056832 = devtag_get_device(space->machine, "k056832");
	266	const device_config *k053244 = devtag_get_device(space->machine, "k053244");
	267	const device_config *k054000 = devtag_get_device(space->machine, "k054000");
	268
284	269	if (cur_control2 & 0x10)   // RAM enable
285	270	{
286	271	return space->machine->generic.paletteram.u8[offset];
r6740	r6741
298	283	case 0x44:
299	284	case 0x45:
300	285	case 0x46:
301		return K053244_r(space,offset-0x40);
	286	return k053244_r(k053244, offset - 0x40);
302	287
303	288	case 0x80:
304	289	case 0x81:
r6740	r6741
332	317	case 0x9d:
333	318	case 0x9e:
334	319	case 0x9f:
335		return K054000_r(space,offset-0x80);
	320	return k054000_r(k054000, offset - 0x80);
336	321
337	322	case 0xca:
338		return sound_status_r(space,0);
	323	return sound_status_r(space, 0);
339	324	}
340	325	}
341	326	else if (offset < 0x1800)
342		return K053245_r(space,(offset - 0x0800) & 0x07ff);
	327	return k053245_r(k053244, (offset - 0x0800) & 0x07ff);
343	328	else if (offset < 0x2000)
344		return K056832_ram_code_lo_r(space,offset - 0x1800);
	329	return k056832_ram_code_lo_r(k056832, offset - 0x1800);
345	330	else if (offset < 0x2800)
346		return K056832_ram_code_hi_r(space,offset - 0x2000);
	331	return k056832_ram_code_hi_r(k056832, offset - 0x2000);
347	332	else if (offset < 0x3000)
348		return K056832_ram_attr_lo_r(space,offset - 0x2800);
	333	return k056832_ram_attr_lo_r(k056832, offset - 0x2800);
349	334	else // (offset < 0x3800)
350		return K056832_ram_attr_hi_r(space,offset - 0x3000);
	335	return k056832_ram_attr_hi_r(k056832, offset - 0x3000);
351	336	}
352	337
353	338	return 0;
r6740	r6741
355	340
356	341	static WRITE8_HANDLER( le_4800_w )
357	342	{
	343	const device_config *k056832 = devtag_get_device(space->machine, "k056832");
	344	const device_config *k053244 = devtag_get_device(space->machine, "k053244");
	345	const device_config *k054000 = devtag_get_device(space->machine, "k054000");
	346
358	347	if (cur_control2 & 0x10)   // RAM enable
359	348	{
360	349	paletteram_xBBBBBGGGGGRRRRR_be_w(space,offset,data);
r6740	r6741
380	369	case 0x44:
381	370	case 0x45:
382	371	case 0x46:
383		K053244_w(space, offset-0x40, data);
	372	k053244_w(k053244, offset - 0x40, data);
384	373	break;
385	374
386	375	case 0x80:
r6740	r6741
415	404	case 0x9d:
416	405	case 0x9e:
417	406	case 0x9f:
418		K054000_w(space, offset-0x80, data);
	407	k054000_w(k054000, offset - 0x80, data);
419	408	break;
420	409
421	410	default:
r6740	r6741
424	413	}
425	414	}
426	415	else if (offset < 0x1800)
427		{
428		K053245_w(space, (offset - 0x0800) & 0x07ff, data);
429
430		}
	416	k053245_w(k053244, (offset - 0x0800) & 0x07ff, data);
431	417	else if (offset < 0x2000)
432		K056832_ram_code_lo_w(space, offset - 0x1800, data);
	418	k056832_ram_code_lo_w(k056832, offset - 0x1800, data);
433	419	else if (offset < 0x2800)
434		K056832_ram_code_hi_w(space, offset - 0x2000, data);
	420	k056832_ram_code_hi_w(k056832, offset - 0x2000, data);
435	421	else if (offset < 0x3000)
436		K056832_ram_attr_lo_w(space, offset - 0x2800, data);
	422	k056832_ram_attr_lo_w(k056832, offset - 0x2800, data);
437	423	else // (offset < 0x3800)
438		K056832_ram_attr_hi_w(space, offset - 0x3000, data);
	424	k056832_ram_attr_hi_w(k056832, offset - 0x3000, data);
439	425	}
440	426	}
441	427
r6740	r6741
450	436	switch (offset)
451	437	{
452	438	case 0:
453		return GUNX(1)>>1;
	439	return GUNX(1) >> 1;
454	440	case 1:
455		if ((240-GUNY(1)) == 7)
	441	if ((240 - GUNY(1)) == 7)
456	442	return 0;
457	443	else
458		return (240-GUNY(1));
	444	return (240 - GUNY(1));
459	445	break;
460	446	case 2:
461		return GUNX(2)>>1;
	447	return GUNX(2) >> 1;
462	448	case 3:
463		if ((240-GUNY(2)) == 7)
	449	if ((240 - GUNY(2)) == 7)
464	450	return 0;
465	451	else
466		return (240-GUNY(2));
	452	return (240 - GUNY(2));
467	453	break;
468	454	}
469	455
r6740	r6741
483	469	static ADDRESS_MAP_START( le_main, ADDRESS_SPACE_PROGRAM, 8 )
484	470	AM_RANGE(0x0000, 0x1fff) AM_ROMBANK("bank1")
485	471	AM_RANGE(0x2000, 0x3fff) AM_RAM            // work RAM
486		AM_RANGE(0x4000, 0x403f) AM_WRITE(K056832_w)
487		AM_RANGE(0x4040, 0x404f) AM_WRITE(K056832_b_w)
	472	AM_RANGE(0x4000, 0x403f) AM_DEVWRITE("k056832", k056832_w)
	473	AM_RANGE(0x4040, 0x404f) AM_DEVWRITE("k056832", k056832_b_w)
488	474	AM_RANGE(0x4080, 0x4080) AM_READNOP      // watchdog
489	475	AM_RANGE(0x4090, 0x4090) AM_READNOP
490	476	AM_RANGE(0x40a0, 0x40a0) AM_READNOP
r6740	r6741
509	495	AM_RANGE(0xfc03, 0xfc03) AM_READNOP
510	496	ADDRESS_MAP_END
511	497
512		/* sound */
513
514	498	static INPUT_PORTS_START( lethalen )
515	499	PORT_START("INPUTS")
516	500	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
r6740	r6741
523	507	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
524	508
525	509	PORT_START("DSW")
526		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
	510	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
527	511	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* it must be 1 ? */
528	512	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
529	513	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
r6740	r6741
540	524	PORT_DIPSETTING(      0x0000, DEF_STR( Mono ) )
541	525	PORT_DIPSETTING(      0x0080, DEF_STR( Stereo ) )
542	526
	527	PORT_START( "EEPROMOUT" )
	528	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	529	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	530	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	531
543	532	PORT_START("LIGHT0_X")
544	533	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1)
545	534
r6740	r6741
569	558	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, -1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(2) PORT_REVERSE
570	559	INPUT_PORTS_END
571	560
	561
	562	static const gfx_layout lethal_6bpp =
	563	{
	564	16,16,
	565	RGN_FRAC(1,2),
	566	6,
	567	{ RGN_FRAC(1,2)+8,RGN_FRAC(1,2)+0, 8, 0, 24, 16 },
	568	{ 0, 1, 2, 3, 4, 5, 6, 7,
	569	8*32+0, 8*32+1, 8*32+2, 8*32+3, 8*32+4, 8*32+5, 8*32+6, 8*32+7 },
	570	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
	571	16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32 },
	572	128*8
	573	};
	574
	575	/* we use this decode instead of the one done by the sprite video start due to it being 6bpp */
	576	static GFXDECODE_START( lethal )
	577	GFXDECODE_ENTRY( "gfx2", 0, lethal_6bpp,   0x000/*0x400*/, 256  ) /* sprites tiles */
	578	GFXDECODE_END
	579
	580
	581	/* sound */
	582
572	583	static const k054539_interface k054539_config =
573	584	{
574	585	NULL,
r6740	r6741
591	602	device_reset(cputag_get_cpu(machine, "maincpu"));
592	603	}
593	604
594		static const gfx_layout lethal_6bpp =
	605	static const k056832_interface lethalen_k056832_intf =
595	606	{
596		16,16,
597		RGN_FRAC(1,2),
598		6,
599		{ RGN_FRAC(1,2)+8,RGN_FRAC(1,2)+0, 8, 0, 24, 16 },
600		{ 0, 1, 2, 3, 4, 5, 6, 7,
601		8*32+0, 8*32+1, 8*32+2, 8*32+3, 8*32+4, 8*32+5, 8*32+6, 8*32+7 },
602		{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
603		16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32 },
604		128*8
	607	"gfx1", 1,
	608	K056832_BPP_8LE,
	609	1, 0,
	610	KONAMI_ROM_DEINTERLEAVE_NONE,
	611	lethalen_tile_callback, "none"
605	612	};
606	613
607		/* we use this decode instead of the one done by the sprite video start due to it being 6bpp */
608		static GFXDECODE_START( lethal )
609		GFXDECODE_ENTRY( "gfx2", 0, lethal_6bpp,   0x000/*0x400*/, 256  ) /* sprites tiles */
610		GFXDECODE_END
	614	static const k05324x_interface lethalen_k05324x_intf =
	615	{
	616	"gfx3", 2,
	617	NORMAL_PLANE_ORDER,
	618	95, 0,
	619	KONAMI_ROM_DEINTERLEAVE_2,
	620	lethalen_sprite_callback
	621	};
611	622
	623	static const k05324x_interface lethalej_k05324x_intf =
	624	{
	625	"gfx3", 2,
	626	NORMAL_PLANE_ORDER,
	627	-105, 0,
	628	KONAMI_ROM_DEINTERLEAVE_2,
	629	lethalen_sprite_callback
	630	};
	631
612	632	static MACHINE_DRIVER_START( lethalen )
613	633	/* basic machine hardware */
614	634	MDRV_CPU_ADD("maincpu", HD6309, MAIN_CLOCK/2)   // ???
r6740	r6741
621	641	MDRV_MACHINE_START(lethalen)
622	642	MDRV_MACHINE_RESET(lethalen)
623	643
624		MDRV_NVRAM_HANDLER(lethalen)
	644	MDRV_EEPROM_ADD("eeprom", eeprom_intf, 48, lethalen_default_eeprom)
625	645
626	646	MDRV_GFXDECODE(lethal)
627	647
r6740	r6741
640	660	MDRV_VIDEO_START(lethalen)
641	661	MDRV_VIDEO_UPDATE(lethalen)
642	662
	663	MDRV_K056832_ADD("k056832", lethalen_k056832_intf)
	664	MDRV_K053244_ADD("k053244", lethalen_k05324x_intf)
	665	MDRV_K054000_ADD("k054000")
	666
643	667	/* sound hardware */
644	668	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
645	669
r6740	r6741
654	678
655	679	MDRV_SCREEN_MODIFY("screen")
656	680	MDRV_SCREEN_VISIBLE_AREA(224, 512-1, 16, 240-1)
	681
	682	MDRV_DEVICE_REMOVE("k053244")
	683	MDRV_K053244_ADD("k053244", lethalej_k05324x_intf)
657	684	MACHINE_DRIVER_END
658	685
659	686	ROM_START( lethalen )   // US version UAE
r6740	r6741
864	891
865	892	static DRIVER_INIT( lethalen )
866	893	{
867		konami_rom_deinterleave_2_half(machine, "gfx2");
868		konami_rom_deinterleave_2(machine, "gfx3");
869		konami_rom_deinterleave_2(machine, "gfx4");
	894	konamid_rom_deinterleave_2_half(machine, "gfx2");
	895	konamid_rom_deinterleave_2(machine, "gfx4");
870	896	}
871	897
872	898	GAME( 1992, lethalen,   0,        lethalen, lethalen, lethalen, ORIENTATION_FLIP_Y, "Konami", "Lethal Enforcers (ver UAE, 11/19/92 15:04)", GAME_IMPERFECT_GRAPHICS) // writes UE to eeprom

src/mame/drivers/exprraid.c

r6740	r6741
210	210	#include "cpu/m6809/m6809.h"
211	211	#include "sound/2203intf.h"
212	212	#include "sound/3526intf.h"
213		#include "exprraid.h"
	213	#include "includes/exprraid.h"
214	214
215	215
216	216	/*****************************************************************************************/

src/mame/drivers/gunbustr.c

r6740	r6741
302	302	MACHINE DRIVERS
303	303	***********************************************************/
304	304
305		static MACHINE_RESET( gunbustr )
306		{
307		taito_f3_soundsystem_reset(machine);
308
309		f3_68681_reset(machine);
310		}
311
312
313	305	static const UINT8 default_eeprom[128]={
314	306	0x00,0x01,0x00,0x85,0x00,0xfd,0x00,0xff,0x00,0x67,0x00,0x02,0x00,0x00,0x00,0x7b,
315	307	0x00,0xff,0x00,0xff,0x00,0x78,0x00,0x03,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
r6740	r6741
352	344	MDRV_CPU_PROGRAM_MAP(gunbustr_map)
353	345	MDRV_CPU_VBLANK_INT("screen", gunbustr_interrupt) /* VBL */
354	346
355		TAITO_F3_SOUND_SYSTEM_CPU(16000000)
356
357		MDRV_MACHINE_RESET(gunbustr)
358	347	MDRV_NVRAM_HANDLER(gunbustr)
359	348
360	349	/* video hardware */
r6740	r6741
372	361	MDRV_VIDEO_UPDATE(gunbustr)
373	362
374	363	/* sound hardware */
375		TAITO_F3_SOUND_SYSTEM_ES5505(30476100/2)
	364	MDRV_IMPORT_FROM(taito_f3_sound)
376	365	MACHINE_DRIVER_END
377	366
378	367	/***************************************************************************/

src/mame/drivers/scotrsht.c

r6740	r6741
36	36	#include "cpu/z80/z80.h"
37	37	#include "cpu/m6809/m6809.h"
38	38	#include "sound/2203intf.h"
39		#include "konamipt.h"
	39	#include "includes/konamipt.h"
40	40
	41	extern UINT8 *scotrsht_videoram;
	42	extern UINT8 *scotrsht_colorram;
41	43	extern UINT8 *scotrsht_scroll;
42	44
43	45	extern WRITE8_HANDLER( scotrsht_videoram_w );
r6740	r6741
70	72	}
71	73
72	74	static ADDRESS_MAP_START( scotrsht_map, ADDRESS_SPACE_PROGRAM, 8 )
73		AM_RANGE(0x0000, 0x07ff) AM_RAM_WRITE(scotrsht_colorram_w) AM_BASE_GENERIC(colorram)
74		AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(scotrsht_videoram_w) AM_BASE_GENERIC(videoram)
	75	AM_RANGE(0x0000, 0x07ff) AM_RAM_WRITE(scotrsht_colorram_w) AM_BASE(&scotrsht_colorram)
	76	AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(scotrsht_videoram_w) AM_BASE(&scotrsht_videoram)
75	77	AM_RANGE(0x1000, 0x10bf) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) /* sprites */
76	78	AM_RANGE(0x10c0, 0x1fff) AM_RAM /* work ram */
77	79	AM_RANGE(0x2000, 0x201f) AM_RAM AM_BASE(&scotrsht_scroll) /* scroll registers */

src/mame/drivers/taito_z.c

r6740	r6741
877	877
878	878	#include "driver.h"
879	879	#include "cpu/z80/z80.h"
880		#include "taitoipt.h"
	880	#include "includes/taitoipt.h"
881	881	#include "cpu/m68000/m68000.h"
882	882	#include "machine/eepromdev.h"
883	883	#include "video/taitoic.h"

src/mame/drivers/cojag.c

r6740	r6741
294	294	#include "cpu/jaguar/jaguar.h"
295	295	#include "machine/idectrl.h"
296	296	#include "sound/dac.h"
297		#include "jaguar.h"
	297	#include "includes/jaguar.h"
298	298
299	299
300	300	#define JAGUAR_CLOCK      XTAL_52MHz
r6740	r6741
371	371	/* halt the CPUs */
372	372	jaguargpu_ctrl_w(cputag_get_cpu(machine, "gpu"), G_CTRL, 0, 0xffffffff);
373	373	jaguardsp_ctrl_w(cputag_get_cpu(machine, "audiocpu"), D_CTRL, 0, 0xffffffff);
374
375		/* init the sound system */
376		cojag_sound_reset(machine);
377
378		/* reset the IDE controller */
379		devtag_reset(machine, "ide");
380	374	}
381	375
382	376
r6740	r6741
1123	1117
1124	1118	MDRV_IDE_CONTROLLER_ADD("ide", jaguar_external_int)
1125	1119
	1120	MDRV_TIMER_ADD("serial_timer", jaguar_serial_callback)
	1121
1126	1122	/* video hardware */
1127	1123	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1128	1124

src/mame/drivers/rastan.c

r6740	r6741
159	159	#include "driver.h"
160	160	#include "cpu/z80/z80.h"
161	161	#include "cpu/m68000/m68000.h"
162		#include "taitoipt.h"
	162	#include "includes/taitoipt.h"
163	163	#include "video/taitoic.h"
164	164	#include "audio/taitosnd.h"
165	165	#include "sound/2151intf.h"

src/mame/drivers/darkhors.c

r6740	r6741
60	60	#include "machine/eeprom.h"
61	61	#include "sound/okim6295.h"
62	62	#include "sound/st0016.h"
63		#include "st0016.h"
	63	#include "includes/st0016.h"
64	64	#include "cpu/z80/z80.h"
65	65
66	66	#define DARKHORS_DEBUG   0

src/mame/drivers/bishjan.c

r6740	r6741
42	42	Tilemaps Access
43	43	***************************************************************************/
44	44
	45	static UINT8   *bishjan_colorram;
45	46	static UINT8   *bishjan_videoram_1_lo,   *bishjan_videoram_1_hi;
46	47	static UINT8   *bishjan_videoram_2_lo,   *bishjan_videoram_2_hi;
47	48
r6740	r6741
227	228
228	229	bishjan_videoram_2_hi = auto_alloc_array(machine, UINT8, 0x80 * 0x40);
229	230
230		machine->generic.colorram.u8 = auto_alloc_array(machine, UINT8, 256*3);
	231	bishjan_colorram = auto_alloc_array(machine, UINT8, 256*3);
231	232	}
232	233
233	234	static VIDEO_UPDATE( bishjan )
r6740	r6741
282	283	break;
283	284
284	285	case 1:
285		space->machine->generic.colorram.u8[colordac_offs] = data;
	286	bishjan_colorram[colordac_offs] = data;
286	287	palette_set_color_rgb(space->machine, colordac_offs/3,
287		pal6bit(space->machine->generic.colorram.u8[(colordac_offs/3)*3+0]),
288		pal6bit(space->machine->generic.colorram.u8[(colordac_offs/3)*3+1]),
289		pal6bit(space->machine->generic.colorram.u8[(colordac_offs/3)*3+2])
	288	pal6bit(bishjan_colorram[(colordac_offs/3)*3+0]),
	289	pal6bit(bishjan_colorram[(colordac_offs/3)*3+1]),
	290	pal6bit(bishjan_colorram[(colordac_offs/3)*3+2])
290	291	);
291	292	colordac_offs = (colordac_offs+1) % (256*3);
292	293	break;

src/mame/drivers/equites.c

r6740	r6741
372	372	#include "sound/msm5232.h"
373	373	#include "sound/dac.h"
374	374	#include "sound/samples.h"
375		#include "equites.h"
	375	#include "includes/equites.h"
376	376
377	377	#define HVOLTAGE_DEBUG   0
378	378	#define EASY_TEST_MODE   0

src/mame/drivers/mirax.c

r6740	r6741
75	75
76	76	static UINT8 nAyCtrl, nAyData;
77	77	static UINT8 nmi_mask;
	78	static UINT8 *videoram;
	79	static UINT8 *colorram;
78	80
79	81	static VIDEO_START(mirax)
80	82	{
r6740	r6741
117	119	{
118	120	for (x=0;x<32;x++)
119	121	{
120		int tile = screen->machine->generic.videoram.u8[count];
121		int color = (screen->machine->generic.colorram.u8[x*2]<<8) | (screen->machine->generic.colorram.u8[(x*2)+1]);
	122	int tile = videoram[count];
	123	int color = (colorram[x*2]<<8) | (colorram[(x*2)+1]);
122	124	int x_scroll = (color & 0xff00)>>8;
123	125	tile |= ((color & 0xe0)<<3);
124	126
r6740	r6741
139	141	{
140	142	for (x=0;x<32;x++)
141	143	{
142		int tile = screen->machine->generic.videoram.u8[count];
143		int color = (screen->machine->generic.colorram.u8[x*2]<<8) | (screen->machine->generic.colorram.u8[(x*2)+1]);
	144	int tile = videoram[count];
	145	int color = (colorram[x*2]<<8) | (colorram[(x*2)+1]);
144	146	int x_scroll = (color & 0xff00)>>8;
145	147	tile |= ((color & 0xe0)<<3);
146	148
r6740	r6741
204	206	static ADDRESS_MAP_START( mirax_main_map, ADDRESS_SPACE_PROGRAM, 8 )
205	207	AM_RANGE(0x0000, 0xbfff) AM_ROM
206	208	AM_RANGE(0xc800, 0xd7ff) AM_RAM
207		AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE_GENERIC(videoram)
	209	AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE(&videoram)
208	210	AM_RANGE(0xe800, 0xe9ff) AM_RAM AM_BASE_GENERIC(spriteram)
209		AM_RANGE(0xea00, 0xea3f) AM_RAM AM_BASE_GENERIC(colorram) //per-column color + bank bits for the videoram
	211	AM_RANGE(0xea00, 0xea3f) AM_RAM AM_BASE(&colorram) //per-column color + bank bits for the videoram
210	212	AM_RANGE(0xf000, 0xf000) AM_READ_PORT("P1")
211	213	AM_RANGE(0xf100, 0xf100) AM_READ_PORT("P2")
212	214	AM_RANGE(0xf200, 0xf200) AM_READ_PORT("DSW1")

src/mame/drivers/gradius3.c

r6740	r6741
20	20
21	21	#include "driver.h"
22	22	#include "deprecat.h"
23		#include "video/konamiic.h"
	23	#include "video/konicdev.h"
24	24	#include "cpu/m68000/m68000.h"
25	25	#include "cpu/z80/z80.h"
26	26	#include "sound/2151intf.h"
27	27	#include "sound/k007232.h"
28		#include "konamipt.h"
	28	#include "includes/konamipt.h"
29	29
30	30	extern UINT16 *gradius3_gfxram;
31	31	extern int gradius3_priority;
r6740	r6741
34	34	WRITE16_HANDLER( gradius3_gfxram_w );
35	35	VIDEO_UPDATE( gradius3 );
36	36
	37	extern void gradius3_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask,int *shadow);
	38	extern void gradius3_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
37	39
38	40
39	41	static READ16_HANDLER( K052109_halfword_r )
40	42	{
41		return K052109_r(space,offset);
	43	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	44	return k052109_r(k052109, offset);
42	45	}
43	46
44	47	static WRITE16_HANDLER( K052109_halfword_w )
45	48	{
	49	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
46	50	if (ACCESSING_BITS_0_7)
47		K052109_w(space,offset,data & 0xff);
	51	k052109_w(k052109, offset, data & 0xff);
48	52
49	53	/* is this a bug in the game or something else? */
50	54	if (!ACCESSING_BITS_0_7)
51		K052109_w(space,offset,(data >> 8) & 0xff);
	55	k052109_w(k052109, offset, (data >> 8) & 0xff);
52	56	//      logerror("%06x half %04x = %04x\n",cpu_get_pc(space->cpu),offset,data);
53	57	}
54	58
55	59	static READ16_HANDLER( K051937_halfword_r )
56	60	{
57		return K051937_r(space,offset);
	61	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	62	return k051937_r(k051960, offset);
58	63	}
59	64
60	65	static WRITE16_HANDLER( K051937_halfword_w )
61	66	{
	67	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	68
62	69	if (ACCESSING_BITS_0_7)
63		K051937_w(space,offset,data & 0xff);
	70	k051937_w(k051960, offset, data & 0xff);
64	71	}
65	72
66	73	static READ16_HANDLER( K051960_halfword_r )
67	74	{
68		return K051960_r(space,offset);
	75	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	76	return k051960_r(k051960, offset);
69	77	}
70	78
71	79	static WRITE16_HANDLER( K051960_halfword_w )
72	80	{
	81	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
73	82	if (ACCESSING_BITS_0_7)
74		K051960_w(space,offset,data & 0xff);
	83	k051960_w(k051960, offset, data & 0xff);
75	84	}
76	85
77	86
r6740	r6741
287	296
288	297
289	298
	299	static const k052109_interface gradius3_k052109_intf =
	300	{
	301	"gfx1", 0,
	302	GRADIUS3_PLANE_ORDER,
	303	KONAMI_ROM_DEINTERLEAVE_NONE,
	304	gradius3_tile_callback
	305	};
	306
	307	static const k051960_interface gradius3_k051960_intf =
	308	{
	309	"gfx2", 1,
	310	GRADIUS3_PLANE_ORDER,
	311	KONAMI_ROM_DEINTERLEAVE_2,
	312	gradius3_sprite_callback
	313	};
	314
290	315	static MACHINE_DRIVER_START( gradius3 )
291	316
292	317	/* basic machine hardware */
r6740	r6741
321	346	MDRV_VIDEO_START(gradius3)
322	347	MDRV_VIDEO_UPDATE(gradius3)
323	348
	349	MDRV_K052109_ADD("k052109", gradius3_k052109_intf)
	350	MDRV_K051960_ADD("k051960", gradius3_k051960_intf)
	351
324	352	/* sound hardware */
325	353	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
326	354
r6740	r6741
471	499	ROM_END
472	500
473	501
474		static DRIVER_INIT( gradius3 )
475		{
476		konami_rom_deinterleave_2(machine, "gfx2");
477		}
478	502
479
480
481		GAME( 1989, gradius3, 0,        gradius3, gradius3, gradius3, ROT0, "Konami", "Gradius III (Japan)", 0 )
482		GAME( 1989, gradius3a, gradius3, gradius3, gradius3, gradius3, ROT0, "Konami", "Gradius III (Asia)", 0 )
483		GAME( 1989, gradius3e, gradius3, gradius3, gradius3, gradius3, ROT0, "Konami", "Gradius III (World ?)", 0 )
	503	GAME( 1989, gradius3, 0,        gradius3, gradius3, 0, ROT0, "Konami", "Gradius III (Japan)", 0 )
	504	GAME( 1989, gradius3a, gradius3, gradius3, gradius3, 0, ROT0, "Konami", "Gradius III (Asia)", 0 )
	505	GAME( 1989, gradius3e, gradius3, gradius3, gradius3, 0, ROT0, "Konami", "Gradius III (World ?)", 0 )

src/mame/drivers/cardline.c

r6740	r6741
23	23	#include "cardline.lh"
24	24
25	25	static int cardline_video;
	26	static UINT8 *videoram;
	27	static UINT8 *colorram;
26	28
27	29	#define DRAW_TILE(machine, offset, transparency) drawgfx_transpen(bitmap, cliprect, machine->gfx[0],\
28		(machine->generic.videoram.u8[index+offset] | (machine->generic.colorram.u8[index+offset]<<8))&0x3fff,\
29		(machine->generic.colorram.u8[index+offset]&0x80)>>7,\
	30	(videoram[index+offset] | (colorram[index+offset]<<8))&0x3fff,\
	31	(colorram[index+offset]&0x80)>>7,\
30	32	0,0,\
31	33	x<<3, y<<3,\
32	34	transparency?transparency:-1);
r6740	r6741
59	61	static WRITE8_HANDLER(vram_w)
60	62	{
61	63	offset+=0x1000*((cardline_video&2)>>1);
62		space->machine->generic.videoram.u8[offset]=data;
	64	videoram[offset]=data;
63	65	}
64	66
65	67	static WRITE8_HANDLER(attr_w)
66	68	{
67	69	offset+=0x1000*((cardline_video&2)>>1);
68		space->machine->generic.colorram.u8[offset]=data;
	70	colorram[offset]=data;
69	71	}
70	72
71	73	static WRITE8_HANDLER(video_w)
r6740	r6741
111	113	AM_RANGE(0x2840, 0x2840) AM_NOP
112	114	AM_RANGE(0x2880, 0x2880) AM_NOP
113	115	AM_RANGE(0x3003, 0x3003) AM_NOP
114		AM_RANGE(0xc000, 0xdfff) AM_WRITE(vram_w) AM_BASE_GENERIC(videoram)
115		AM_RANGE(0xe000, 0xffff) AM_WRITE(attr_w) AM_BASE_GENERIC(colorram)
	116	AM_RANGE(0xc000, 0xdfff) AM_WRITE(vram_w) AM_BASE(&videoram)
	117	AM_RANGE(0xe000, 0xffff) AM_WRITE(attr_w) AM_BASE(&colorram)
116	118	/* Ports */
117	119	AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_READWRITE(unk_r, video_w)
118	120	ADDRESS_MAP_END

src/mame/drivers/mystwarr.c

r6740	r6741
25	25	#include "deprecat.h"
26	26
27	27	#include "video/konamiic.h"
28		#include "konamigx.h"
	28	#include "includes/konamigx.h"
29	29	#include "cpu/m68000/m68000.h"
30	30	#include "cpu/z80/z80.h"
31		#include "machine/eeprom.h"
	31	#include "machine/eepromdev.h"
32	32	#include "sound/k054539.h"
33		#include "konamipt.h"
	33	#include "includes/konamipt.h"
34	34
35	35	VIDEO_START(gaiapols);
36	36	VIDEO_START(dadandrn);
r6740	r6741
53	53
54	54	static UINT16 *gx_workram;
55	55
56		static INT32 init_eeprom_count;
57	56	static UINT8 mw_irq_control;
58	57
59	58	static const eeprom_interface eeprom_intf =
r6740	r6741
69	68
70	69	/* Gaiapolis and Polygonet Commanders use the ER5911,
71	70	but the command formats are slightly different.  Why? */
72		static const eeprom_interface eeprom_intf_gaia =
	71	static const eeprom_interface gaia_eeprom_intf =
73	72	{
74	73	7,         /* address bits */
75	74	8,         /* data bits */
r6740	r6741
80	79	"0100110000000" /* unlock command */
81	80	};
82	81
83		static NVRAM_HANDLER(mystwarr)
	82	static READ16_HANDLER( eeprom_r )
84	83	{
85		if (read_or_write)
86		eeprom_save(file);
87		else
88		{
89		eeprom_init(machine, &eeprom_intf);
90
91		if (file)
92		{
93		init_eeprom_count = 0;
94		eeprom_load(file);
95		}
96		else
97		init_eeprom_count = 10;
98		}
99		}
100
101		static NVRAM_HANDLER(gaiapols)
102		{
103		if (read_or_write)
104		eeprom_save(file);
105		else
106		{
107		eeprom_init(machine, &eeprom_intf_gaia);
108
109		if (file)
110		{
111		init_eeprom_count = 0;
112		eeprom_load(file);
113		}
114		else
115		init_eeprom_count = 10;
116		}
117		}
118
119		static READ16_HANDLER( mweeprom_r )
120		{
121	84	if (ACCESSING_BITS_0_7)
122	85	{
123		int res = input_port_read(space->machine, "IN1");
124
125		if (init_eeprom_count)
126		{
127		init_eeprom_count--;
128		res &= ~0x04;
129		}
130
131		return res;
	86	return input_port_read(space->machine, "IN1");
132	87	}
133	88
134	89	//  logerror("msb access to eeprom port\n");
r6740	r6741
136	91	return 0;
137	92	}
138	93
139		static READ16_HANDLER( vseeprom_r )
140		{
141		if (ACCESSING_BITS_0_7)
142		{
143		int res = input_port_read(space->machine, "IN1");
144
145		if (init_eeprom_count)
146		{
147		init_eeprom_count--;
148		res &= ~0x08;
149		}
150
151		return res;
152		}
153
154		//  logerror("msb access to eeprom port\n");
155
156		return 0;
157		}
158
159	94	static WRITE16_HANDLER( mweeprom_w )
160	95	{
161	96	if (ACCESSING_BITS_8_15)
162	97	{
163		eeprom_write_bit((data&0x0100) ? 1 : 0);
164		eeprom_set_cs_line((data&0x0200) ? CLEAR_LINE : ASSERT_LINE);
165		eeprom_set_clock_line((data&0x0400) ? ASSERT_LINE : CLEAR_LINE);
166		return;
	98	input_port_write(space->machine, "EEPROMOUT", data, 0xffff);
167	99	}
168	100
169	101	//  logerror("unknown LSB write %x to eeprom\n", data);
r6740	r6741
184	116	{
185	117	if (ACCESSING_BITS_0_7)
186	118	{
187		eeprom_write_bit((data&0x01) ? 1 : 0);
188		eeprom_set_cs_line((data&0x02) ? CLEAR_LINE : ASSERT_LINE);
189		eeprom_set_clock_line((data&0x04) ? ASSERT_LINE : CLEAR_LINE);
190		return;
	119	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
191	120	}
192	121	}
193	122
r6740	r6741
315	244	}
316	245	}
317	246
318		static READ16_HANDLER( mmcoins_r )
319		{
320		int res = input_port_read(space->machine, "IN0");
321
322		if (init_eeprom_count)
323		{
324		init_eeprom_count--;
325		res &= ~0x10;
326		}
327
328		return res;
329		}
330
331		static READ16_HANDLER( dddcoins_r )
332		{
333		int res = (input_port_read(space->machine, "IN0")<<8) | input_port_read(space->machine, "P1");
334
335		if (init_eeprom_count)
336		{
337		init_eeprom_count--;
338		res &= ~0x0800;
339		}
340
341		return res;
342		}
343
344	247	/* the interface with the 053247 is weird. The chip can address only 0x1000 bytes */
345	248	/* of RAM, but they put 0x10000 there. The CPU can access them all. */
346	249	static READ16_HANDLER( K053247_scattered_word_r )
r6740	r6741
385	288	AM_RANGE(0x492000, 0x492001) AM_WRITENOP   // watchdog
386	289	AM_RANGE(0x494000, 0x494001) AM_READ_PORT("P1_P2")
387	290	AM_RANGE(0x494002, 0x494003) AM_READ_PORT("P3_P4")
388		AM_RANGE(0x496000, 0x496001) AM_READ(mmcoins_r)
389		AM_RANGE(0x496002, 0x496003) AM_READ(mweeprom_r)
	291	AM_RANGE(0x496000, 0x496001) AM_READ_PORT("IN0")
	292	AM_RANGE(0x496002, 0x496003) AM_READ(eeprom_r)
390	293	AM_RANGE(0x49800c, 0x49800d) AM_WRITE(sound_cmd1_w)
391	294	AM_RANGE(0x49800e, 0x49800f) AM_WRITE(sound_cmd2_w)
392	295	AM_RANGE(0x498014, 0x498015) AM_READ(sound_status_r)
r6740	r6741
431	334	AM_RANGE(0x270000, 0x27003f) AM_WRITE(K056832_word_w)
432	335	AM_RANGE(0x274000, 0x274001) AM_READ_PORT("P1_P3")
433	336	AM_RANGE(0x274002, 0x274003) AM_READ_PORT("P2_P4")
434		AM_RANGE(0x278000, 0x278001) AM_READ(mmcoins_r)
435		AM_RANGE(0x278002, 0x278003) AM_READ(vseeprom_r)
	337	AM_RANGE(0x278000, 0x278001) AM_READ_PORT("IN0")
	338	AM_RANGE(0x278002, 0x278003) AM_READ(eeprom_r)
436	339	AM_RANGE(0x27c000, 0x27c001) AM_READNOP   // watchdog lives here
437	340	AM_RANGE(0x27c000, 0x27c001) AM_WRITE(mmeeprom_w)
438	341	AM_RANGE(0x300000, 0x301fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)
r6740	r6741
475	378	AM_RANGE(0x270000, 0x27003f) AM_WRITE(K056832_word_w)
476	379	AM_RANGE(0x274000, 0x274001) AM_READ_PORT("P1_P3")
477	380	AM_RANGE(0x274002, 0x274003) AM_READ_PORT("P2_P4")
478		AM_RANGE(0x278000, 0x278001) AM_READ(mmcoins_r)
479		AM_RANGE(0x278002, 0x278003) AM_READ(vseeprom_r)
	381	AM_RANGE(0x278000, 0x278001) AM_READ_PORT("IN0")
	382	AM_RANGE(0x278002, 0x278003) AM_READ(eeprom_r)
480	383	AM_RANGE(0x27c000, 0x27c001) AM_READNOP      // watchdog lives here
481	384	AM_RANGE(0x27c000, 0x27c001) AM_WRITE(mmeeprom_w)
482	385	AM_RANGE(0x300000, 0x301fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)
r6740	r6741
561	464	AM_RANGE(0x412000, 0x412001) AM_READWRITE(mccontrol_r,mccontrol_w)
562	465	AM_RANGE(0x414000, 0x414001) AM_READ_PORT("P1_P2")
563	466	AM_RANGE(0x414002, 0x414003) AM_READ_PORT("P3_P4")
564		AM_RANGE(0x416000, 0x416001) AM_READ(mmcoins_r)                  // coin
565		AM_RANGE(0x416002, 0x416003) AM_READ(mweeprom_r)               // eeprom read
	467	AM_RANGE(0x416000, 0x416001) AM_READ_PORT("IN0")
	468	AM_RANGE(0x416002, 0x416003) AM_READ(eeprom_r)               // eeprom read
566	469	AM_RANGE(0x418014, 0x418015) AM_READ(sound_status_r)            // z80 status
567	470	AM_RANGE(0x41800c, 0x41800d) AM_WRITE(sound_cmd1_w)
568	471	AM_RANGE(0x41800e, 0x41800f) AM_WRITE(sound_cmd2_w)
r6740	r6741
609	512	AM_RANGE(0x48a014, 0x48a015) AM_READ(sound_status_msb_r)
610	513	AM_RANGE(0x48a000, 0x48a01f) AM_RAM               // sound regs fall-through
611	514	AM_RANGE(0x48c000, 0x48c01f) AM_WRITE(K054338_word_w)
612		AM_RANGE(0x48e000, 0x48e001) AM_READ(dddcoins_r)   // bit 3 (0x8) is test switch
	515	AM_RANGE(0x48e000, 0x48e001) AM_READ_PORT("IN0_P1")   // bit 3 (0x8) is test switch
613	516	AM_RANGE(0x48e020, 0x48e021) AM_READ(dddeeprom_r)
614	517	AM_RANGE(0x600000, 0x60ffff) AM_RAM AM_BASE(&gx_workram)
615	518	AM_RANGE(0x680000, 0x68003f) AM_READWRITE(K055550_word_r,K055550_word_w)
r6740	r6741
657	560	AM_RANGE(0x48a014, 0x48a015) AM_READ(sound_status_msb_r)
658	561	AM_RANGE(0x48a000, 0x48a01f) AM_RAM                        // sound regs fall-through
659	562	AM_RANGE(0x48c000, 0x48c01f) AM_WRITE(K054338_word_w)
660		AM_RANGE(0x48e000, 0x48e001) AM_READ(dddcoins_r)            // bit 3 (0x8) is test switch
	563	AM_RANGE(0x48e000, 0x48e001) AM_READ_PORT("IN0_P1")            // bit 3 (0x8) is test switch
661	564	AM_RANGE(0x48e020, 0x48e021) AM_READ(dddeeprom_r)
662	565	AM_RANGE(0x600000, 0x60ffff) AM_RAM AM_BASE(&gx_workram)
663	566	AM_RANGE(0x660000, 0x6600ff) AM_READWRITE(K054000_lsb_r,K054000_lsb_w)
r6740	r6741
726	629
727	630	/**********************************************************************************/
728	631
	632	static INPUT_PORTS_START( mystwarr )
	633	PORT_START("IN0")
	634	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
	635	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	636	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
	637	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
	638	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
	639	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
	640	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	641	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	642
	643	PORT_START("IN1")
	644	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	645	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
	646	PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW )
	647	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* game loops if this is set */
	648	PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
	649	PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
	650	PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
	651	PORT_DIPNAME( 0x20, 0x20, "Coin Mechanism" )
	652	PORT_DIPSETTING(    0x20, "Common" )
	653	PORT_DIPSETTING(    0x00, "Independant" )
	654	PORT_DIPNAME( 0x40, 0x40, "Number of Players" )
	655	PORT_DIPSETTING(    0x00, "4" )
	656	PORT_DIPSETTING(    0x40, "2" )
	657	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	658
	659	PORT_START("P1_P2")
	660	KONAMI16_LSB(1, IPT_BUTTON3, IPT_START1 )
	661	KONAMI16_MSB(2, IPT_BUTTON3, IPT_START2 )
	662
	663	PORT_START("P3_P4")
	664	KONAMI16_LSB(3, IPT_BUTTON3, IPT_START3 )
	665	KONAMI16_MSB(4, IPT_BUTTON3, IPT_START4 )
	666
	667	PORT_START( "EEPROMOUT" )
	668	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	669	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	670	PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	671	INPUT_PORTS_END
	672
	673	static INPUT_PORTS_START( metamrph )
	674	PORT_START("IN0")
	675	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
	676	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	677	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	678	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	679	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
	680	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
	681	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	682	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	683
	684	PORT_START("IN1")
	685	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	686	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
	687	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )
	688	PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
	689	PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
	690	PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
	691	PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
	692	PORT_DIPNAME( 0x20, 0x20, "Coin Mechanism" )
	693	PORT_DIPSETTING(    0x20, "Common" )
	694	PORT_DIPSETTING(    0x00, "Independant" )
	695	PORT_DIPNAME( 0x40, 0x40, "Number of Players" )
	696	PORT_DIPSETTING(    0x00, "4" )
	697	PORT_DIPSETTING(    0x40, "2" )
	698	PORT_DIPNAME( 0x80, 0x80, "Continuous Energy Increment" )
	699	PORT_DIPSETTING(    0x80, DEF_STR( No ) )
	700	PORT_DIPSETTING(    0x00, DEF_STR( Yes ) )
	701
	702	PORT_START("P1_P3")
	703	KONAMI16_LSB(1, IPT_BUTTON3, IPT_START1 )
	704	KONAMI16_MSB(3, IPT_BUTTON3, IPT_START3 )
	705
	706	PORT_START("P2_P4")
	707	KONAMI16_LSB(2, IPT_BUTTON3, IPT_START2 )
	708	KONAMI16_MSB(4, IPT_BUTTON3, IPT_START4 )
	709
	710	PORT_START( "EEPROMOUT" )
	711	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	712	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	713	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	714	INPUT_PORTS_END
	715
	716	static INPUT_PORTS_START( viostorm )
	717	PORT_START("IN0")
	718	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
	719	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	720	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	721	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	722	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
	723	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
	724	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	725	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	726
	727	PORT_START("IN1")
	728	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	729	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
	730	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )
	731	PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
	732	PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
	733	PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
	734	PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
	735	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
	736	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	737	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	738	PORT_DIPNAME( 0x40, 0x40, "Coin Mechanism" )
	739	PORT_DIPSETTING(    0x40, "Common" )
	740	PORT_DIPSETTING(    0x00, "Independant" )
	741	PORT_DIPNAME( 0x80, 0x80, "Number of Players" )
	742	PORT_DIPSETTING(    0x00, "3" )
	743	PORT_DIPSETTING(    0x80, "2" )
	744
	745	PORT_START("P1_P3")
	746	KONAMI16_LSB(1, IPT_BUTTON3, IPT_START1 )
	747	KONAMI16_MSB(3, IPT_BUTTON3, IPT_START3 )
	748
	749	PORT_START("P2_P4")
	750	KONAMI16_LSB(2, IPT_BUTTON3, IPT_START2 )
	751	KONAMI16_MSB(4, IPT_BUTTON3, IPT_START4 )
	752
	753	PORT_START( "EEPROMOUT" )
	754	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	755	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	756	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	757	INPUT_PORTS_END
	758
	759	static INPUT_PORTS_START( dadandrn )
	760	PORT_START("IN0_P1")
	761	KONAMI8_B123_START(1)
	762	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 )
	763	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN2 )
	764	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
	765	PORT_SERVICE_NO_TOGGLE( 0x0800, IP_ACTIVE_LOW )
	766	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE1 )
	767	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_SERVICE2 )
	768	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	769	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	770
	771	PORT_START("IN1")
	772	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	773	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
	774	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )
	775	PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
	776	PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
	777	PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
	778	PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
	779	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
	780	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	781	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	782	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	783	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	784
	785	PORT_START("P2")
	786	KONAMI8_B123_START(2)
	787
	788	PORT_START("P3")
	789	KONAMI8_B123_START(3)
	790
	791	PORT_START("P4")
	792	KONAMI8_B123_START(4)
	793
	794	PORT_START( "EEPROMOUT" )
	795	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	796	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	797	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	798	INPUT_PORTS_END
	799
	800	static INPUT_PORTS_START( martchmp )
	801	PORT_START("IN0")
	802	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
	803	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	804	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
	805	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
	806	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
	807	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
	808	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	809	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	810
	811	PORT_START("IN1")
	812	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
	813	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
	814	PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW )
	815	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* game loops if this is set */
	816	PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
	817	PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
	818	PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
	819	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
	820	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	821	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	822	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
	823	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
	824
	825	PORT_START("P1_P2")
	826	KONAMI16_LSB(1, IPT_BUTTON3, IPT_START1 )
	827	KONAMI16_MSB(2, IPT_BUTTON3, IPT_START2 )
	828
	829	PORT_START("P3_P4")
	830	KONAMI16_LSB(3, IPT_BUTTON3, IPT_START3 )
	831	KONAMI16_MSB(4, IPT_BUTTON3, IPT_START4 )
	832
	833	PORT_START( "EEPROMOUT" )
	834	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	835	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	836	PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	837	INPUT_PORTS_END
	838
	839	/**********************************************************************************/
	840
729	841	static const gfx_layout bglayout_4bpp =
730	842	{
731	843	16,16,
r6740	r6741
858	970
859	971	MDRV_QUANTUM_TIME(HZ(1920))
860	972
861		MDRV_NVRAM_HANDLER(mystwarr)
	973	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
	974
862	975	MDRV_MACHINE_START(mystwarr)
863	976	MDRV_MACHINE_RESET(mystwarr)
864	977
r6740	r6741
966	1079
967	1080	MDRV_GFXDECODE(gaiapols)
968	1081
969		MDRV_NVRAM_HANDLER(gaiapols)
	1082	MDRV_DEVICE_REMOVE("eeprom")
	1083	MDRV_EEPROM_NODEFAULT_ADD("eeprom", gaia_eeprom_intf)
970	1084
971	1085	/* video hardware */
972	1086	MDRV_VIDEO_START(gaiapols)
r6740	r6741
1003	1117
1004	1118	/**********************************************************************************/
1005	1119
1006		static INPUT_PORTS_START( mystwarr )
1007		PORT_START("IN0")
1008		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1009		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1010		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
1011		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
1012		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1013		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1014		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1015		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1016
1017		PORT_START("IN1")
1018		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
1019		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
1020		PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW )
1021		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* game loops if this is set */
1022		PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
1023		PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
1024		PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
1025		PORT_DIPNAME( 0x20, 0x20, "Coin Mechanism" )
1026		PORT_DIPSETTING(    0x20, "Common" )
1027		PORT_DIPSETTING(    0x00, "Independant" )
1028		PORT_DIPNAME( 0x40, 0x40, "Number of Players" )
1029		PORT_DIPSETTING(    0x00, "4" )
1030		PORT_DIPSETTING(    0x40, "2" )
1031		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1032
1033		PORT_START("P1_P2")
1034		KONAMI16_LSB(1, IPT_BUTTON3, IPT_START1 )
1035		KONAMI16_MSB(2, IPT_BUTTON3, IPT_START2 )
1036
1037		PORT_START("P3_P4")
1038		KONAMI16_LSB(3, IPT_BUTTON3, IPT_START3 )
1039		KONAMI16_MSB(4, IPT_BUTTON3, IPT_START4 )
1040		INPUT_PORTS_END
1041
1042		static INPUT_PORTS_START( metamrph )
1043		PORT_START("IN0")
1044		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1045		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1046		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1047		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1048		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
1049		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
1050		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1051		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1052
1053		PORT_START("IN1")
1054		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
1055		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
1056		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )
1057		PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
1058		PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
1059		PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
1060		PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
1061		PORT_DIPNAME( 0x20, 0x20, "Coin Mechanism" )
1062		PORT_DIPSETTING(    0x20, "Common" )
1063		PORT_DIPSETTING(    0x00, "Independant" )
1064		PORT_DIPNAME( 0x40, 0x40, "Number of Players" )
1065		PORT_DIPSETTING(    0x00, "4" )
1066		PORT_DIPSETTING(    0x40, "2" )
1067		PORT_DIPNAME( 0x80, 0x80, "Continuous Energy Increment" )
1068		PORT_DIPSETTING(    0x80, DEF_STR( No ) )
1069		PORT_DIPSETTING(    0x00, DEF_STR( Yes ) )
1070
1071		PORT_START("P1_P3")
1072		KONAMI16_LSB(1, IPT_BUTTON3, IPT_START1 )
1073		KONAMI16_MSB(3, IPT_BUTTON3, IPT_START3 )
1074
1075		PORT_START("P2_P4")
1076		KONAMI16_LSB(2, IPT_BUTTON3, IPT_START2 )
1077		KONAMI16_MSB(4, IPT_BUTTON3, IPT_START4 )
1078		INPUT_PORTS_END
1079
1080		static INPUT_PORTS_START( viostorm )
1081		PORT_START("IN0")
1082		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1083		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1084		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1085		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1086		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
1087		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
1088		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1089		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1090
1091		PORT_START("IN1")
1092		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
1093		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
1094		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )
1095		PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
1096		PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
1097		PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
1098		PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
1099		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
1100		PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1101		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1102		PORT_DIPNAME( 0x40, 0x40, "Coin Mechanism" )
1103		PORT_DIPSETTING(    0x40, "Common" )
1104		PORT_DIPSETTING(    0x00, "Independant" )
1105		PORT_DIPNAME( 0x80, 0x80, "Number of Players" )
1106		PORT_DIPSETTING(    0x00, "3" )
1107		PORT_DIPSETTING(    0x80, "2" )
1108
1109		PORT_START("P1_P3")
1110		KONAMI16_LSB(1, IPT_BUTTON3, IPT_START1 )
1111		KONAMI16_MSB(3, IPT_BUTTON3, IPT_START3 )
1112
1113		PORT_START("P2_P4")
1114		KONAMI16_LSB(2, IPT_BUTTON3, IPT_START2 )
1115		KONAMI16_MSB(4, IPT_BUTTON3, IPT_START4 )
1116		INPUT_PORTS_END
1117
1118		static INPUT_PORTS_START( dadandrn )
1119		PORT_START("IN0")
1120		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1121		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1122		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1123		PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
1124		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
1125		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
1126		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1127		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1128
1129		PORT_START("IN1")
1130		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
1131		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
1132		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL )
1133		PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
1134		PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
1135		PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
1136		PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
1137		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
1138		PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1139		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1140		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1141		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1142
1143		PORT_START("P1")
1144		KONAMI8_B123_START(1)
1145
1146		PORT_START("P2")
1147		KONAMI8_B123_START(2)
1148
1149		PORT_START("P3")
1150		KONAMI8_B123_START(3)
1151
1152		PORT_START("P4")
1153		KONAMI8_B123_START(4)
1154		INPUT_PORTS_END
1155
1156		static INPUT_PORTS_START( martchmp )
1157		PORT_START("IN0")
1158		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1159		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1160		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1161		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1162		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
1163		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
1164		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1165		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1166
1167		PORT_START("IN1")
1168		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
1169		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL )   /* EEPROM ready (always 1) */
1170		PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW )
1171		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* game loops if this is set */
1172		PORT_DIPNAME( 0x10, 0x00, "Sound Output" )
1173		PORT_DIPSETTING(    0x10, DEF_STR( Mono ) )
1174		PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
1175		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
1176		PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1177		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1178		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1179		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1180
1181		PORT_START("P1_P2")
1182		KONAMI16_LSB(1, IPT_BUTTON3, IPT_START1 )
1183		KONAMI16_MSB(2, IPT_BUTTON3, IPT_START2 )
1184
1185		PORT_START("P3_P4")
1186		KONAMI16_LSB(3, IPT_BUTTON3, IPT_START3 )
1187		KONAMI16_MSB(4, IPT_BUTTON3, IPT_START4 )
1188		INPUT_PORTS_END
1189
1190		/**********************************************************************************/
1191
1192	1120	#define ROM_LOADTILE_WORD(name,offset,length,crc) ROMX_LOAD(name, offset, length, crc, ROM_GROUPWORD | ROM_SKIP(3) | ROM_REVERSE)
1193	1121	#define ROM_LOADTILE_BYTE(name,offset,length,crc) ROMX_LOAD(name, offset, length, crc, ROM_GROUPBYTE | ROM_SKIP(4))
1194	1122

src/mame/drivers/irobot.c

r6740	r6741
77	77	#include "driver.h"
78	78	#include "cpu/m6809/m6809.h"
79	79	#include "sound/pokey.h"
80		#include "irobot.h"
	80	#include "includes/irobot.h"
81	81
82	82
83	83
r6740	r6741
306	306	MDRV_VIDEO_START(irobot)
307	307	MDRV_VIDEO_UPDATE(irobot)
308	308
	309	MDRV_TIMER_ADD("irvg_timer", irobot_irvg_done_callback)
	310	MDRV_TIMER_ADD("irmb_timer", irobot_irmb_done_callback)
	311
309	312	/* sound hardware */
310	313	MDRV_SPEAKER_STANDARD_MONO("mono")
311	314

src/mame/drivers/klax.c

r6740	r6741
19	19
20	20	#include "driver.h"
21	21	#include "cpu/m68000/m68000.h"
22		#include "klax.h"
	22	#include "includes/klax.h"
23	23	#include "sound/okim6295.h"
24	24
25	25
r6740	r6741
59	59	*
60	60	*************************************/
61	61
	62	static MACHINE_START( klax )
	63	{
	64	atarigen_init(machine);
	65	}
	66
	67
62	68	static MACHINE_RESET( klax )
63	69	{
64	70	klax_state *state = (klax_state *)machine->driver_data;
r6740	r6741
94	100	ADDRESS_MAP_END
95	101
96	102
	103
97	104	/*************************************
98	105	*
99	106	*  Port definitions
r6740	r6741
165	172	MDRV_CPU_PROGRAM_MAP(klax_map)
166	173	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
167	174
	175	MDRV_MACHINE_START(klax)
168	176	MDRV_MACHINE_RESET(klax)
169	177	MDRV_NVRAM_HANDLER(atarigen)
170	178

src/mame/drivers/gomoku.c

r6740	r6741
79	79	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN2 )
80	80
81	81	PORT_START("DSW")
82		PORT_SERVICE( 0x01, IP_ACTIVE_HIGH )
83		PORT_DIPNAME( 0x06, 0x00, DEF_STR( Lives ))
	82	PORT_SERVICE( 0x01, IP_ACTIVE_HIGH )  PORT_DIPLOCATION("SW1:1")
	83	PORT_DIPNAME( 0x06, 0x00, DEF_STR( Lives ))  PORT_DIPLOCATION("SW1:2,3")
84	84	PORT_DIPSETTING(    0x00, "2" )
	85	PORT_DIPSETTING(    0x04, "3" )
85	86	PORT_DIPSETTING(    0x02, "4" )
86		PORT_DIPSETTING(    0x04, "3" )
87	87	PORT_DIPSETTING(    0x06, "5" )
88		PORT_DIPNAME( 0x08, 0x00, "Time" )
	88	PORT_DIPNAME( 0x08, 0x00, "Time" )  PORT_DIPLOCATION("SW1:4")
89	89	PORT_DIPSETTING(    0x00, "60" )
90	90	PORT_DIPSETTING(    0x08, "80" )
91		PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) )
	91	PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) )  PORT_DIPLOCATION("SW1:5,6")
92	92	PORT_DIPSETTING(    0x10, DEF_STR( 3C_1C ) )
93	93	PORT_DIPSETTING(    0x20, DEF_STR( 2C_1C ) )
94	94	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
95	95	PORT_DIPSETTING(    0x30, DEF_STR( Free_Play ) )
96		PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) )
	96	PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) )  PORT_DIPLOCATION("SW1:7,8")
97	97	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
98	98	PORT_DIPSETTING(    0x80, DEF_STR( 1C_2C ) )
99	99	PORT_DIPSETTING(    0x40, DEF_STR( 1C_3C ) )
r6740	r6741
119	119
120	120	static MACHINE_DRIVER_START( gomoku )
121	121	/* basic machine hardware */
122		MDRV_CPU_ADD("maincpu", Z80, 18432000/12)       /* 1.536 MHz ? */
	122	MDRV_CPU_ADD("maincpu", Z80, XTAL_18_432MHz/12)       /* 1.536 MHz ? */
123	123	MDRV_CPU_PROGRAM_MAP(gomoku_map)
124	124	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
125	125

src/mame/drivers/firetrk.c

r6740	r6741
7	7
8	8	#include "driver.h"
9	9	#include "cpu/m6800/m6800.h"
10		#include "firetrk.h"
	10	#include "includes/firetrk.h"
11	11	#include "sound/discrete.h"
12	12
13	13	#define MASTER_CLOCK (XTAL_12_096MHz)

src/mame/drivers/m57.c

r6740	r6741
49	49
50	50	#include "driver.h"
51	51	#include "cpu/z80/z80.h"
52		#include "iremipt.h"
	52	#include "includes/iremipt.h"
53	53	#include "includes/iremz80.h"
54	54
55	55

src/mame/drivers/segas24.c

r6740	r6741
790	790	static UINT8  irq_timerb;
791	791	static UINT8  irq_allow0, irq_allow1;
792	792	static int    irq_timer_pend0, irq_timer_pend1, irq_yms, irq_vblank, irq_sprite;
793		static emu_timer *irq_timer, *irq_timer_clear;
	793	static const device_config *irq_timer, *irq_timer_clear;
794	794
795		static TIMER_CALLBACK( irq_timer_cb )
	795	static TIMER_DEVICE_CALLBACK( irq_timer_cb )
796	796	{
797	797	irq_timer_pend0 = irq_timer_pend1 = 1;
798	798	if(irq_allow0 & (1 << IRQ_TIMER))
799		cputag_set_input_line(machine, "maincpu", IRQ_TIMER+1, ASSERT_LINE);
	799	cputag_set_input_line(timer->machine, "maincpu", IRQ_TIMER+1, ASSERT_LINE);
800	800	if(irq_allow1 & (1 << IRQ_TIMER))
801		cputag_set_input_line(machine, "sub", IRQ_TIMER+1, ASSERT_LINE);
	801	cputag_set_input_line(timer->machine, "sub", IRQ_TIMER+1, ASSERT_LINE);
802	802	}
803	803
804		static TIMER_CALLBACK( irq_timer_clear_cb )
	804	static TIMER_DEVICE_CALLBACK( irq_timer_clear_cb )
805	805	{
806	806	irq_sprite = irq_vblank = 0;
807		cputag_set_input_line(machine, "maincpu", IRQ_VBLANK+1, CLEAR_LINE);
808		cputag_set_input_line(machine, "maincpu", IRQ_SPRITE+1, CLEAR_LINE);
809		cputag_set_input_line(machine, "sub", IRQ_VBLANK+1, CLEAR_LINE);
810		cputag_set_input_line(machine, "sub", IRQ_SPRITE+1, CLEAR_LINE);
	807	cputag_set_input_line(timer->machine, "maincpu", IRQ_VBLANK+1, CLEAR_LINE);
	808	cputag_set_input_line(timer->machine, "maincpu", IRQ_SPRITE+1, CLEAR_LINE);
	809	cputag_set_input_line(timer->machine, "sub", IRQ_VBLANK+1, CLEAR_LINE);
	810	cputag_set_input_line(timer->machine, "sub", IRQ_SPRITE+1, CLEAR_LINE);
811	811	}
812	812
813	813	static void irq_init(running_machine *machine)
r6740	r6741
820	820	irq_timer_pend1 = 0;
821	821	irq_vblank = 0;
822	822	irq_sprite = 0;
823		irq_timer = timer_alloc(machine, irq_timer_cb, NULL);
824		irq_timer_clear = timer_alloc(machine, irq_timer_clear_cb, NULL);
	823	irq_timer = devtag_get_device(machine, "irq_timer");
	824	irq_timer_clear = devtag_get_device(machine, "irq_timer_clear");
825	825	}
826	826
827	827	static void irq_timer_reset(void)
r6740	r6741
829	829	int freq = (irq_timerb << 12) | irq_timera;
830	830	freq &= 0x1fff;
831	831
832		timer_adjust_periodic(irq_timer, ATTOTIME_IN_HZ(freq), 0, ATTOTIME_IN_HZ(freq));
	832	timer_device_adjust_periodic(irq_timer, ATTOTIME_IN_HZ(freq), 0, ATTOTIME_IN_HZ(freq));
833	833	logerror("New timer frequency: %0d [%02x %04x]\n", freq, irq_timerb, irq_timera);
834	834	}
835	835
r6740	r6741
916	916	irq_vblank = 1;
917	917	}
918	918
919		timer_adjust_oneshot(irq_timer_clear, ATTOTIME_IN_HZ(VIDEO_CLOCK/2/656.0), 0);
	919	timer_device_adjust_oneshot(irq_timer_clear, ATTOTIME_IN_HZ(VIDEO_CLOCK/2/656.0), 0);
920	920
921	921	mask = 1 << irq;
922	922
r6740	r6741
1787	1787	MDRV_MACHINE_START(system24)
1788	1788	MDRV_MACHINE_RESET(system24)
1789	1789
	1790	MDRV_TIMER_ADD("irq_timer", irq_timer_cb)
	1791	MDRV_TIMER_ADD("irq_timer_clear", irq_timer_clear_cb)
	1792
1790	1793	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
1791	1794
1792	1795	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/konamigx.c

r6740	r6741
101	101	#include "cpu/m68000/m68000.h"
102	102	#include "cpu/z80/z80.h"
103	103	#include "cpu/tms57002/tms57002.h"
104		#include "machine/eeprom.h"
	104	#include "machine/eepromdev.h"
105	105	#include "sound/k054539.h"
106		#include "konamigx.h"
	106	#include "includes/konamigx.h"
107	107	#include "machine/adc083x.h"
108	108	#include "rendlay.h"
109	109
r6740	r6741
440	440	}
441	441
442	442	/**********************************************************************************/
443		/* NVRAM and EEPROM handlers */
	443	/* EEPROM handlers */
444	444
445		static int init_eeprom_count;
446
447		static NVRAM_HANDLER(konamigx_93C46)
448		{
449		if (read_or_write)
450		eeprom_save(file);
451		else
452		{
453		eeprom_init(machine, &eeprom_interface_93C46);
454
455		if (file)
456		{
457		init_eeprom_count = 0;
458		eeprom_load(file);
459		}
460		else
461		init_eeprom_count = 10;
462		}
463		}
464
465	445	static CUSTOM_INPUT( gx_rdport1_3_r )
466	446	{
467	447	return (gx_rdport1_3 >> 1);
r6740	r6741
485	465	bit 0: eeprom data
486	466	*/
487	467
488		eeprom_write_bit((odata&0x01) ? 1 : 0);
489		eeprom_set_cs_line((odata&0x02) ? CLEAR_LINE : ASSERT_LINE);
490		eeprom_set_clock_line((odata&0x04) ? ASSERT_LINE : CLEAR_LINE);
	468	input_port_write(space->machine, "EEPROMOUT", odata, 0xff);
491	469
492	470	konamigx_wrport1_0 = odata;
493	471	}
r6740	r6741
912	890	return (p1y<<16)|p2y;
913	891	}
914	892
915		static READ32_HANDLER( service_r )
916		{
917		int res = input_port_read(space->machine, "SERVICE");
918
919		if (init_eeprom_count)
920		{
921		init_eeprom_count--;
922		res &= ~0x08000000;
923		}
924
925		return res;
926		}
927
928
929	893	/**********************************************************************************/
930	894	/* system or game dependent handlers */
931	895
r6740	r6741
1182	1146	AM_RANGE(0xd58000, 0xd58003) AM_WRITE(control_w)
1183	1147	AM_RANGE(0xd5a000, 0xd5a003) AM_READ_PORT("SYSTEM_DSW")
1184	1148	AM_RANGE(0xd5c000, 0xd5c003) AM_READ_PORT("INPUTS")
1185		AM_RANGE(0xd5e000, 0xd5e003) AM_READ(service_r)
	1149	AM_RANGE(0xd5e000, 0xd5e003) AM_READ_PORT("SERVICE")
1186	1150	AM_RANGE(0xd80000, 0xd8001f) AM_WRITE(K054338_long_w)
1187	1151	AM_RANGE(0xda0000, 0xda1fff) AM_READWRITE(K056832_ram_long_r, K056832_ram_long_w)
1188	1152	AM_RANGE(0xda2000, 0xda3fff) AM_READWRITE(K056832_ram_long_r, K056832_ram_long_w)
r6740	r6741
1337	1301
1338	1302
1339	1303	/**********************************************************************************/
1340		/* hardware definitions */
1341
1342		/* i think we could reduce the number of machine drivers with different visible areas by adjusting the sprite
1343		positioning on a per game basis too */
1344
1345		static const gfx_layout bglayout_8bpp =
1346		{
1347		16,16,
1348		RGN_FRAC(1,1),
1349		8,
1350		{ 0, 1, 2, 3, 4, 5, 6, 7 },
1351		{ 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128, 8*128, 9*128, 10*128, 11*128, 12*128, 13*128, 14*128, 15*128 },
1352		{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
1353		16*128
1354		};
1355
1356		// for scanrows on tilemap
1357		#if 0
1358		static const gfx_layout t1_charlayout6 =
1359		{
1360		16, 16,
1361		RGN_FRAC(1,1),
1362		6,
1363		{ 20, 16, 12, 8, 4, 0 },
1364		{ 3, 2, 1, 0, 27, 26, 25, 24, 51, 50, 49, 48, 75, 74, 73, 72 },
1365		{ 0, 12*8, 12*8*2, 12*8*3, 12*8*4, 12*8*5, 12*8*6, 12*8*7,
1366		12*8*8, 12*8*9, 12*8*10, 12*8*11, 12*8*12, 12*8*13, 12*8*14, 12*8*15 },
1367		16*16*6
1368		};
1369
1370		static const gfx_layout t1_charlayout8 =
1371		{
1372		16, 16,
1373		RGN_FRAC(1,1),
1374		8,
1375		{ 28, 24, 20, 16, 12, 8, 4, 0 },
1376		{ 3, 2, 1, 0, 35, 34, 33, 32, 67, 66, 65, 64, 99, 98, 97, 96 },
1377		{ 0, 16*8, 16*8*2, 16*8*3, 16*8*4, 16*8*5, 16*8*6, 16*8*7,
1378		16*8*8, 16*8*9, 16*8*10, 16*8*11, 16*8*12, 16*8*13, 16*8*14, 16*8*15 },
1379		16*16*8
1380		};
1381		#endif
1382
1383		// for scancols on tilemap
1384		static const gfx_layout t1_charlayout6 =
1385		{
1386		16, 16,
1387		RGN_FRAC(1,1),
1388		6,
1389		{ 20, 16, 12, 8, 4, 0 },
1390		{ 0, 12*8, 12*8*2, 12*8*3, 12*8*4, 12*8*5, 12*8*6, 12*8*7,
1391		12*8*8, 12*8*9, 12*8*10, 12*8*11, 12*8*12, 12*8*13, 12*8*14, 12*8*15 },
1392		{ 3, 2, 1, 0, 27, 26, 25, 24, 51, 50, 49, 48, 75, 74, 73, 72 },
1393		16*16*6
1394		};
1395
1396		static const gfx_layout t1_charlayout8 =
1397		{
1398		16, 16,
1399		RGN_FRAC(1,1),
1400		8,
1401		{ 28, 24, 20, 16, 12, 8, 4, 0 },
1402		{ 0, 16*8, 16*8*2, 16*8*3, 16*8*4, 16*8*5, 16*8*6, 16*8*7,
1403		16*8*8, 16*8*9, 16*8*10, 16*8*11, 16*8*12, 16*8*13, 16*8*14, 16*8*15 },
1404		{ 3, 2, 1, 0, 35, 34, 33, 32, 67, 66, 65, 64, 99, 98, 97, 96 },
1405		16*16*8
1406		};
1407
1408		/* type 1 (opengolf + racinfrc) use 6 and 8 bpp planar layouts for the 53936 */
1409		static GFXDECODE_START( opengolf )
1410		GFXDECODE_ENTRY( "gfx3", 0, t1_charlayout8, 0x0000, 8 )
1411		GFXDECODE_ENTRY( "gfx4", 0, t1_charlayout6, 0x0000, 8 )
1412		GFXDECODE_END
1413
1414		static GFXDECODE_START( racinfrc )
1415		GFXDECODE_ENTRY( "gfx3", 0, t1_charlayout6, 0x0000, 8 )
1416		GFXDECODE_ENTRY( "gfx4", 0, t1_charlayout6, 0x0000, 8 )
1417		GFXDECODE_END
1418
1419		/* type 3 & 4 games use a simple 8bpp decode for the 53936 */
1420		static GFXDECODE_START( type34 )
1421		GFXDECODE_ENTRY( "gfx3", 0, bglayout_8bpp, 0x1000, 8 )
1422		GFXDECODE_END
1423
1424		static GFXDECODE_START( type4 )
1425		GFXDECODE_ENTRY( "gfx3", 0, bglayout_8bpp, 0x1800, 8 )
1426		GFXDECODE_END
1427
1428		static MACHINE_DRIVER_START( konamigx )
1429		/* basic machine hardware */
1430		MDRV_CPU_ADD("maincpu", M68EC020, 24000000)
1431		MDRV_CPU_PROGRAM_MAP(gx_type2_map)
1432		MDRV_CPU_VBLANK_INT("screen", konamigx_vbinterrupt)
1433
1434		MDRV_CPU_ADD("soundcpu", M68000, 8000000)
1435		MDRV_CPU_PROGRAM_MAP(gxsndmap)
1436		MDRV_CPU_PERIODIC_INT(irq2_line_hold, 480)
1437
1438		MDRV_CPU_ADD("dasp", TMS57002, 12500000)
1439		MDRV_CPU_DATA_MAP(gxtmsmap)
1440		MDRV_CPU_PERIODIC_INT(tms_sync, 48000)
1441
1442		MDRV_QUANTUM_TIME(HZ(1920))
1443
1444		MDRV_MACHINE_START(konamigx)
1445		MDRV_MACHINE_RESET(konamigx)
1446		MDRV_NVRAM_HANDLER(konamigx_93C46)
1447
1448		/* video hardware */
1449		MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
1450
1451		MDRV_SCREEN_ADD("screen", RASTER)
1452		MDRV_SCREEN_RAW_PARAMS(6000000, 288+16+32+48, 0, 287, 224+16+8+16, 0, 223)
1453		/* These parameters are actual value written to the CCU.
1454		tbyahhoo attract mode desync is caused by another matter. */
1455
1456		//  MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(600))
1457		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
1458		MDRV_SCREEN_SIZE(64*8, 32*8)
1459		MDRV_SCREEN_VISIBLE_AREA(24, 24+288-1, 16, 16+224-1)
1460
1461		MDRV_PALETTE_LENGTH(8192)
1462
1463		MDRV_VIDEO_START(konamigx_5bpp)
1464		MDRV_VIDEO_UPDATE(konamigx)
1465
1466		/* sound hardware */
1467		MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1468
1469		MDRV_SOUND_ADD("konami1", K054539, 48000)
1470		MDRV_SOUND_CONFIG(k054539_config)
1471		MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)
1472		MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
1473
1474		MDRV_SOUND_ADD("konami2", K054539, 48000)
1475		MDRV_SOUND_CONFIG(k054539_config)
1476		MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)
1477		MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
1478		MACHINE_DRIVER_END
1479
1480		static MACHINE_DRIVER_START( dragoonj )
1481		MDRV_IMPORT_FROM(konamigx)
1482		MDRV_CPU_REPLACE("maincpu", M68EC020, 26400000) // needs higher clock to stop sprite flickerings
1483		MDRV_SCREEN_MODIFY("screen")
1484		MDRV_SCREEN_VISIBLE_AREA(40, 40+384-1, 16, 16+224-1)
1485		MDRV_VIDEO_START(dragoonj)
1486		MACHINE_DRIVER_END
1487
1488		static MACHINE_DRIVER_START( le2 )
1489		MDRV_IMPORT_FROM(konamigx)
1490		MDRV_VIDEO_START(le2)
1491		MACHINE_DRIVER_END
1492
1493		static MACHINE_DRIVER_START( konamigx_6bpp )
1494		MDRV_IMPORT_FROM(konamigx)
1495		MDRV_VIDEO_START(konamigx_6bpp)
1496		MACHINE_DRIVER_END
1497
1498		static MACHINE_DRIVER_START( konamigx_6bpp_2 )
1499		MDRV_IMPORT_FROM(konamigx)
1500		MDRV_VIDEO_START(konamigx_6bpp_2)
1501		MACHINE_DRIVER_END
1502
1503		static MACHINE_DRIVER_START( opengolf )
1504		MDRV_IMPORT_FROM(konamigx)
1505		MDRV_SCREEN_MODIFY("screen")
1506		MDRV_SCREEN_RAW_PARAMS(8000000, 384+24+64+40, 0, 383, 224+16+8+16, 0, 223)
1507		MDRV_SCREEN_VISIBLE_AREA(40, 40+384-1, 16, 16+224-1)
1508		MDRV_GFXDECODE(opengolf)
1509		MDRV_VIDEO_START(opengolf)
1510
1511		MDRV_CPU_MODIFY("maincpu")
1512		MDRV_CPU_PROGRAM_MAP(gx_type1_map)
1513
1514		MDRV_ADC0834_ADD( "adc0834", konamigx_adc_interface )
1515		MACHINE_DRIVER_END
1516
1517		static MACHINE_DRIVER_START( racinfrc )
1518		MDRV_IMPORT_FROM(konamigx)
1519		MDRV_SCREEN_MODIFY("screen")
1520		MDRV_SCREEN_RAW_PARAMS(8000000, 384+24+64+40, 0, 383, 224+16+8+16, 0, 223)
1521		MDRV_SCREEN_VISIBLE_AREA(32, 32+384-1, 16, 16+224-1)
1522		MDRV_GFXDECODE(racinfrc)
1523		MDRV_VIDEO_START(racinfrc)
1524
1525		MDRV_CPU_MODIFY("maincpu")
1526		MDRV_CPU_PROGRAM_MAP(gx_type1_map)
1527
1528		MDRV_ADC0834_ADD( "adc0834", konamigx_adc_interface )
1529		MACHINE_DRIVER_END
1530
1531		static MACHINE_DRIVER_START( gxtype3 )
1532		MDRV_IMPORT_FROM(konamigx)
1533
1534		MDRV_CPU_MODIFY("maincpu")
1535		MDRV_CPU_PROGRAM_MAP(gx_type3_map)
1536		MDRV_CPU_VBLANK_INT_HACK(konamigx_hbinterrupt, 262)
1537
1538		MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
1539		MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
1540
1541		MDRV_VIDEO_START(konamigx_type3)
1542		MDRV_PALETTE_LENGTH(16384)
1543		MDRV_SCREEN_MODIFY("screen")
1544		MDRV_SCREEN_SIZE(576, 32*8)
1545		MDRV_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
1546
1547		MDRV_SCREEN_ADD("screen2", RASTER)
1548		MDRV_SCREEN_RAW_PARAMS(6000000, 288+16+32+48, 0, 287, 224+16+8+16, 0, 223)
1549		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
1550		MDRV_SCREEN_SIZE(576, 32*8)
1551		MDRV_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
1552
1553
1554		MDRV_GFXDECODE(type34)
1555		MACHINE_DRIVER_END
1556
1557		static MACHINE_DRIVER_START( gxtype4 )
1558		MDRV_IMPORT_FROM(konamigx)
1559
1560		MDRV_CPU_MODIFY("maincpu")
1561		MDRV_CPU_PROGRAM_MAP(gx_type4_map)
1562		MDRV_CPU_VBLANK_INT_HACK(konamigx_hbinterrupt, 262)
1563
1564		MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
1565		MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
1566
1567		MDRV_SCREEN_MODIFY("screen")
1568		MDRV_SCREEN_SIZE(128*8, 32*8)
1569		MDRV_SCREEN_VISIBLE_AREA(0, 384-1, 16, 32*8-1-16)
1570
1571		MDRV_SCREEN_ADD("screen2", RASTER)
1572		MDRV_SCREEN_RAW_PARAMS(6000000, 288+16+32+48, 0, 287, 224+16+8+16, 0, 223)
1573		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
1574		MDRV_SCREEN_SIZE(128*8, 32*8)
1575		MDRV_SCREEN_VISIBLE_AREA(0, 384-1, 16, 32*8-1-16)
1576
1577
1578		MDRV_PALETTE_LENGTH(8192)
1579		MDRV_GFXDECODE(type4)
1580		MDRV_VIDEO_START(konamigx_type4)
1581		MACHINE_DRIVER_END
1582
1583		static MACHINE_DRIVER_START( gxtype4vsnet )
1584		MDRV_IMPORT_FROM(gxtype4)
1585
1586		MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
1587
1588		MDRV_SCREEN_MODIFY("screen")
1589		MDRV_SCREEN_SIZE(128*8, 32*8)
1590		MDRV_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
1591
1592		MDRV_SCREEN_MODIFY("screen2")
1593		MDRV_SCREEN_SIZE(128*8, 32*8)
1594		MDRV_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
1595		MACHINE_DRIVER_END
1596
1597		static MACHINE_DRIVER_START( gxtype4sd2 )
1598		MDRV_IMPORT_FROM(gxtype4)
1599
1600		MDRV_VIDEO_START(konamigx_type4_sd2)
1601		MACHINE_DRIVER_END
1602
1603
1604		static MACHINE_DRIVER_START( winspike )
1605		MDRV_IMPORT_FROM(konamigx)
1606
1607		MDRV_SCREEN_MODIFY("screen")
1608		MDRV_SCREEN_VISIBLE_AREA(38, 38+384-1, 16, 16+224-1)
1609		MDRV_VIDEO_START(winspike)
1610		MACHINE_DRIVER_END
1611
1612		/**********************************************************************************/
1613	1304	/* port maps */
1614	1305
1615	1306	/* here we collect players' inputs: they are shared among all the ports */
r6740	r6741
1667	1358	//      excpuint stat, objdma stat, eeprom do
1668	1359
1669	1360	// note: racin' force expects bit 1 of the eeprom port to toggle
1670		PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
	1361	PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
1671	1362	PORT_BIT( 0x000000fe, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(gx_rdport1_3_r, NULL)
1672	1363	PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_COIN1 )
1673	1364	PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_COIN2 )
r6740	r6741
1678	1369	PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1679	1370	PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1680	1371	PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNUSED )   /* DIP#1 & DIP#2 */
	1372
	1373	PORT_START( "EEPROMOUT" )
	1374	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
	1375	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	1376	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
1681	1377	INPUT_PORTS_END
1682	1378
1683	1379
r6740	r6741
1956	1652
1957	1653
1958	1654	/**********************************************************************************/
	1655	/* hardware definitions */
	1656
	1657	/* i think we could reduce the number of machine drivers with different visible areas by adjusting the sprite
	1658	positioning on a per game basis too */
	1659
	1660	static const gfx_layout bglayout_8bpp =
	1661	{
	1662	16,16,
	1663	RGN_FRAC(1,1),
	1664	8,
	1665	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	1666	{ 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128, 8*128, 9*128, 10*128, 11*128, 12*128, 13*128, 14*128, 15*128 },
	1667	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
	1668	16*128
	1669	};
	1670
	1671	// for scanrows on tilemap
	1672	#if 0
	1673	static const gfx_layout t1_charlayout6 =
	1674	{
	1675	16, 16,
	1676	RGN_FRAC(1,1),
	1677	6,
	1678	{ 20, 16, 12, 8, 4, 0 },
	1679	{ 3, 2, 1, 0, 27, 26, 25, 24, 51, 50, 49, 48, 75, 74, 73, 72 },
	1680	{ 0, 12*8, 12*8*2, 12*8*3, 12*8*4, 12*8*5, 12*8*6, 12*8*7,
	1681	12*8*8, 12*8*9, 12*8*10, 12*8*11, 12*8*12, 12*8*13, 12*8*14, 12*8*15 },
	1682	16*16*6
	1683	};
	1684
	1685	static const gfx_layout t1_charlayout8 =
	1686	{
	1687	16, 16,
	1688	RGN_FRAC(1,1),
	1689	8,
	1690	{ 28, 24, 20, 16, 12, 8, 4, 0 },
	1691	{ 3, 2, 1, 0, 35, 34, 33, 32, 67, 66, 65, 64, 99, 98, 97, 96 },
	1692	{ 0, 16*8, 16*8*2, 16*8*3, 16*8*4, 16*8*5, 16*8*6, 16*8*7,
	1693	16*8*8, 16*8*9, 16*8*10, 16*8*11, 16*8*12, 16*8*13, 16*8*14, 16*8*15 },
	1694	16*16*8
	1695	};
	1696	#endif
	1697
	1698	// for scancols on tilemap
	1699	static const gfx_layout t1_charlayout6 =
	1700	{
	1701	16, 16,
	1702	RGN_FRAC(1,1),
	1703	6,
	1704	{ 20, 16, 12, 8, 4, 0 },
	1705	{ 0, 12*8, 12*8*2, 12*8*3, 12*8*4, 12*8*5, 12*8*6, 12*8*7,
	1706	12*8*8, 12*8*9, 12*8*10, 12*8*11, 12*8*12, 12*8*13, 12*8*14, 12*8*15 },
	1707	{ 3, 2, 1, 0, 27, 26, 25, 24, 51, 50, 49, 48, 75, 74, 73, 72 },
	1708	16*16*6
	1709	};
	1710
	1711	static const gfx_layout t1_charlayout8 =
	1712	{
	1713	16, 16,
	1714	RGN_FRAC(1,1),
	1715	8,
	1716	{ 28, 24, 20, 16, 12, 8, 4, 0 },
	1717	{ 0, 16*8, 16*8*2, 16*8*3, 16*8*4, 16*8*5, 16*8*6, 16*8*7,
	1718	16*8*8, 16*8*9, 16*8*10, 16*8*11, 16*8*12, 16*8*13, 16*8*14, 16*8*15 },
	1719	{ 3, 2, 1, 0, 35, 34, 33, 32, 67, 66, 65, 64, 99, 98, 97, 96 },
	1720	16*16*8
	1721	};
	1722
	1723	/* type 1 (opengolf + racinfrc) use 6 and 8 bpp planar layouts for the 53936 */
	1724	static GFXDECODE_START( opengolf )
	1725	GFXDECODE_ENTRY( "gfx3", 0, t1_charlayout8, 0x0000, 8 )
	1726	GFXDECODE_ENTRY( "gfx4", 0, t1_charlayout6, 0x0000, 8 )
	1727	GFXDECODE_END
	1728
	1729	static GFXDECODE_START( racinfrc )
	1730	GFXDECODE_ENTRY( "gfx3", 0, t1_charlayout6, 0x0000, 8 )
	1731	GFXDECODE_ENTRY( "gfx4", 0, t1_charlayout6, 0x0000, 8 )
	1732	GFXDECODE_END
	1733
	1734	/* type 3 & 4 games use a simple 8bpp decode for the 53936 */
	1735	static GFXDECODE_START( type34 )
	1736	GFXDECODE_ENTRY( "gfx3", 0, bglayout_8bpp, 0x1000, 8 )
	1737	GFXDECODE_END
	1738
	1739	static GFXDECODE_START( type4 )
	1740	GFXDECODE_ENTRY( "gfx3", 0, bglayout_8bpp, 0x1800, 8 )
	1741	GFXDECODE_END
	1742
	1743	static MACHINE_DRIVER_START( konamigx )
	1744	/* basic machine hardware */
	1745	MDRV_CPU_ADD("maincpu", M68EC020, 24000000)
	1746	MDRV_CPU_PROGRAM_MAP(gx_type2_map)
	1747	MDRV_CPU_VBLANK_INT("screen", konamigx_vbinterrupt)
	1748
	1749	MDRV_CPU_ADD("soundcpu", M68000, 8000000)
	1750	MDRV_CPU_PROGRAM_MAP(gxsndmap)
	1751	MDRV_CPU_PERIODIC_INT(irq2_line_hold, 480)
	1752
	1753	MDRV_CPU_ADD("dasp", TMS57002, 12500000)
	1754	MDRV_CPU_DATA_MAP(gxtmsmap)
	1755	MDRV_CPU_PERIODIC_INT(tms_sync, 48000)
	1756
	1757	MDRV_QUANTUM_TIME(HZ(1920))
	1758
	1759	MDRV_MACHINE_START(konamigx)
	1760	MDRV_MACHINE_RESET(konamigx)
	1761
	1762	MDRV_EEPROM_93C46_NODEFAULT_ADD("eeprom")
	1763
	1764	/* video hardware */
	1765	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK)
	1766
	1767	MDRV_SCREEN_ADD("screen", RASTER)
	1768	MDRV_SCREEN_RAW_PARAMS(6000000, 288+16+32+48, 0, 287, 224+16+8+16, 0, 223)
	1769	/* These parameters are actual value written to the CCU.
	1770	tbyahhoo attract mode desync is caused by another matter. */
	1771
	1772	//  MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(600))
	1773	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
	1774	MDRV_SCREEN_SIZE(64*8, 32*8)
	1775	MDRV_SCREEN_VISIBLE_AREA(24, 24+288-1, 16, 16+224-1)
	1776
	1777	MDRV_PALETTE_LENGTH(8192)
	1778
	1779	MDRV_VIDEO_START(konamigx_5bpp)
	1780	MDRV_VIDEO_UPDATE(konamigx)
	1781
	1782	/* sound hardware */
	1783	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
	1784
	1785	MDRV_SOUND_ADD("konami1", K054539, 48000)
	1786	MDRV_SOUND_CONFIG(k054539_config)
	1787	MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)
	1788	MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
	1789
	1790	MDRV_SOUND_ADD("konami2", K054539, 48000)
	1791	MDRV_SOUND_CONFIG(k054539_config)
	1792	MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)
	1793	MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
	1794	MACHINE_DRIVER_END
	1795
	1796	static MACHINE_DRIVER_START( dragoonj )
	1797	MDRV_IMPORT_FROM(konamigx)
	1798	MDRV_CPU_REPLACE("maincpu", M68EC020, 26400000) // needs higher clock to stop sprite flickerings
	1799	MDRV_SCREEN_MODIFY("screen")
	1800	MDRV_SCREEN_VISIBLE_AREA(40, 40+384-1, 16, 16+224-1)
	1801	MDRV_VIDEO_START(dragoonj)
	1802	MACHINE_DRIVER_END
	1803
	1804	static MACHINE_DRIVER_START( le2 )
	1805	MDRV_IMPORT_FROM(konamigx)
	1806	MDRV_VIDEO_START(le2)
	1807	MACHINE_DRIVER_END
	1808
	1809	static MACHINE_DRIVER_START( konamigx_6bpp )
	1810	MDRV_IMPORT_FROM(konamigx)
	1811	MDRV_VIDEO_START(konamigx_6bpp)
	1812	MACHINE_DRIVER_END
	1813
	1814	static MACHINE_DRIVER_START( konamigx_6bpp_2 )
	1815	MDRV_IMPORT_FROM(konamigx)
	1816	MDRV_VIDEO_START(konamigx_6bpp_2)
	1817	MACHINE_DRIVER_END
	1818
	1819	static MACHINE_DRIVER_START( opengolf )
	1820	MDRV_IMPORT_FROM(konamigx)
	1821	MDRV_SCREEN_MODIFY("screen")
	1822	MDRV_SCREEN_RAW_PARAMS(8000000, 384+24+64+40, 0, 383, 224+16+8+16, 0, 223)
	1823	MDRV_SCREEN_VISIBLE_AREA(40, 40+384-1, 16, 16+224-1)
	1824	MDRV_GFXDECODE(opengolf)
	1825	MDRV_VIDEO_START(opengolf)
	1826
	1827	MDRV_CPU_MODIFY("maincpu")
	1828	MDRV_CPU_PROGRAM_MAP(gx_type1_map)
	1829
	1830	MDRV_ADC0834_ADD( "adc0834", konamigx_adc_interface )
	1831	MACHINE_DRIVER_END
	1832
	1833	static MACHINE_DRIVER_START( racinfrc )
	1834	MDRV_IMPORT_FROM(konamigx)
	1835	MDRV_SCREEN_MODIFY("screen")
	1836	MDRV_SCREEN_RAW_PARAMS(8000000, 384+24+64+40, 0, 383, 224+16+8+16, 0, 223)
	1837	MDRV_SCREEN_VISIBLE_AREA(32, 32+384-1, 16, 16+224-1)
	1838	MDRV_GFXDECODE(racinfrc)
	1839	MDRV_VIDEO_START(racinfrc)
	1840
	1841	MDRV_CPU_MODIFY("maincpu")
	1842	MDRV_CPU_PROGRAM_MAP(gx_type1_map)
	1843
	1844	MDRV_ADC0834_ADD( "adc0834", konamigx_adc_interface )
	1845	MACHINE_DRIVER_END
	1846
	1847	static MACHINE_DRIVER_START( gxtype3 )
	1848	MDRV_IMPORT_FROM(konamigx)
	1849
	1850	MDRV_CPU_MODIFY("maincpu")
	1851	MDRV_CPU_PROGRAM_MAP(gx_type3_map)
	1852	MDRV_CPU_VBLANK_INT_HACK(konamigx_hbinterrupt, 262)
	1853
	1854	MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
	1855	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
	1856
	1857	MDRV_VIDEO_START(konamigx_type3)
	1858	MDRV_PALETTE_LENGTH(16384)
	1859	MDRV_SCREEN_MODIFY("screen")
	1860	MDRV_SCREEN_SIZE(576, 32*8)
	1861	MDRV_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
	1862
	1863	MDRV_SCREEN_ADD("screen2", RASTER)
	1864	MDRV_SCREEN_RAW_PARAMS(6000000, 288+16+32+48, 0, 287, 224+16+8+16, 0, 223)
	1865	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
	1866	MDRV_SCREEN_SIZE(576, 32*8)
	1867	MDRV_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
	1868
	1869
	1870	MDRV_GFXDECODE(type34)
	1871	MACHINE_DRIVER_END
	1872
	1873	static MACHINE_DRIVER_START( gxtype4 )
	1874	MDRV_IMPORT_FROM(konamigx)
	1875
	1876	MDRV_CPU_MODIFY("maincpu")
	1877	MDRV_CPU_PROGRAM_MAP(gx_type4_map)
	1878	MDRV_CPU_VBLANK_INT_HACK(konamigx_hbinterrupt, 262)
	1879
	1880	MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
	1881	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
	1882
	1883	MDRV_SCREEN_MODIFY("screen")
	1884	MDRV_SCREEN_SIZE(128*8, 32*8)
	1885	MDRV_SCREEN_VISIBLE_AREA(0, 384-1, 16, 32*8-1-16)
	1886
	1887	MDRV_SCREEN_ADD("screen2", RASTER)
	1888	MDRV_SCREEN_RAW_PARAMS(6000000, 288+16+32+48, 0, 287, 224+16+8+16, 0, 223)
	1889	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
	1890	MDRV_SCREEN_SIZE(128*8, 32*8)
	1891	MDRV_SCREEN_VISIBLE_AREA(0, 384-1, 16, 32*8-1-16)
	1892
	1893
	1894	MDRV_PALETTE_LENGTH(8192)
	1895	MDRV_GFXDECODE(type4)
	1896	MDRV_VIDEO_START(konamigx_type4)
	1897	MACHINE_DRIVER_END
	1898
	1899	static MACHINE_DRIVER_START( gxtype4vsnet )
	1900	MDRV_IMPORT_FROM(gxtype4)
	1901
	1902	MDRV_DEFAULT_LAYOUT(layout_dualhsxs)
	1903
	1904	MDRV_SCREEN_MODIFY("screen")
	1905	MDRV_SCREEN_SIZE(128*8, 32*8)
	1906	MDRV_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
	1907
	1908	MDRV_SCREEN_MODIFY("screen2")
	1909	MDRV_SCREEN_SIZE(128*8, 32*8)
	1910	MDRV_SCREEN_VISIBLE_AREA(0, 576-1, 16, 32*8-1-16)
	1911	MACHINE_DRIVER_END
	1912
	1913	static MACHINE_DRIVER_START( gxtype4sd2 )
	1914	MDRV_IMPORT_FROM(gxtype4)
	1915
	1916	MDRV_VIDEO_START(konamigx_type4_sd2)
	1917	MACHINE_DRIVER_END
	1918
	1919
	1920	static MACHINE_DRIVER_START( winspike )
	1921	MDRV_IMPORT_FROM(konamigx)
	1922
	1923	MDRV_SCREEN_MODIFY("screen")
	1924	MDRV_SCREEN_VISIBLE_AREA(38, 38+384-1, 16, 16+224-1)
	1925	MDRV_VIDEO_START(winspike)
	1926	MACHINE_DRIVER_END
	1927
	1928
	1929	/**********************************************************************************/
1959	1930	/* BIOS and ROM maps */
1960	1931
1961	1932	#define GX_BIOS ROM_LOAD("300a01.34k", 0x000000, 128*1024, CRC(d5fa95f5) SHA1(c483aa98ff8ef40cdac359c19ad23fea5ecc1906) )

src/mame/drivers/triforce.c

r6740	r6741
399	399	#include "driver.h"
400	400	#include "cpu/powerpc/ppc.h"
401	401	#include "video/generic.h"
402		#include "naomibd.h"
	402	#include "includes/naomibd.h"
403	403
404	404	static ADDRESS_MAP_START( gc_map, ADDRESS_SPACE_PROGRAM, 32 )
405	405	AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION("maincpu", 0) AM_SHARE("share2")   /* Program ROM */

src/mame/drivers/thunderj.c

r6740	r6741
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "machine/atarigen.h"
23	23	#include "audio/atarijsa.h"
24		#include "thunderj.h"
	24	#include "includes/thunderj.h"
25	25
26	26
27	27
r6740	r6741
40	40	}
41	41
42	42
	43	static MACHINE_START( thunderj )
	44	{
	45	thunderj_state *state = (thunderj_state *)machine->driver_data;
	46	atarigen_init(machine);
	47
	48	state_save_register_global(machine, state->alpha_tile_bank);
	49	}
	50
	51
43	52	static MACHINE_RESET( thunderj )
44	53	{
45	54	thunderj_state *state = (thunderj_state *)machine->driver_data;
r6740	r6741
284	293	MDRV_CPU_ADD("extra", M68000, ATARI_CLOCK_14MHz/2)
285	294	MDRV_CPU_PROGRAM_MAP(extra_map)
286	295
	296	MDRV_MACHINE_START(thunderj)
287	297	MDRV_MACHINE_RESET(thunderj)
288	298	MDRV_NVRAM_HANDLER(atarigen)
289	299

src/mame/drivers/parodius.c

r6740	r6741
9	9	#include "driver.h"
10	10	#include "cpu/z80/z80.h"
11	11	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
12		#include "video/konamiic.h"
	12	#include "video/konicdev.h"
13	13	#include "sound/2151intf.h"
14	14	#include "sound/k053260.h"
15		#include "konamipt.h"
	15	#include "includes/konamipt.h"
16	16
17	17	/* prototypes */
18	18	static MACHINE_RESET( parodius );
19	19	static KONAMI_SETLINES_CALLBACK( parodius_banking );
20		VIDEO_START( parodius );
21	20	VIDEO_UPDATE( parodius );
22	21
	22	extern void parodius_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	23	extern void parodius_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
	24
23	25	static int videobank;
24	26	static UINT8 *ram;
25	27
26	28	static INTERRUPT_GEN( parodius_interrupt )
27	29	{
28		if (K052109_is_IRQ_enabled()) cpu_set_input_line(device, 0, HOLD_LINE);
	30	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
	31	if (k052109_is_irq_enabled(k052109))
	32	cpu_set_input_line(device, 0, HOLD_LINE);
29	33	}
30	34
31	35	static READ8_HANDLER( bankedram_r )
r6740	r6741
56	60
57	61	static READ8_HANDLER( parodius_052109_053245_r )
58	62	{
	63	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	64	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	65
59	66	if (videobank & 0x02)
60		return K053245_r(space,offset);
	67	return k053245_r(k053245, offset);
61	68	else
62		return K052109_r(space,offset);
	69	return k052109_r(k052109, offset);
63	70	}
64	71
65	72	static WRITE8_HANDLER( parodius_052109_053245_w )
66	73	{
	74	const device_config *k053245 = devtag_get_device(space->machine, "k053245");
	75	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	76
67	77	if (videobank & 0x02)
68		K053245_w(space,offset,data);
	78	k053245_w(k053245, offset, data);
69	79	else
70		K052109_w(space,offset,data);
	80	k052109_w(k052109, offset, data);
71	81	}
72	82
73	83	static WRITE8_HANDLER( parodius_videobank_w )
r6740	r6741
82	92
83	93	static WRITE8_HANDLER( parodius_3fc0_w )
84	94	{
	95	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	96
85	97	if ((data & 0xf4) != 0x10) logerror("%04x: 3fc0 = %02x\n",cpu_get_pc(space->cpu),data);
86	98
87	99	/* bit 0/1 = coin counters */
r6740	r6741
89	101	coin_counter_w(space->machine, 1,data & 0x02);
90	102
91	103	/* bit 3 = enable char ROM reading through the video RAM */
92		K052109_set_RMRD_line( ( data & 0x08 ) ? ASSERT_LINE : CLEAR_LINE );
	104	k052109_set_rmrd_line(k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
93	105
94	106	/* other bits unknown */
95	107	}
r6740	r6741
137	149	AM_RANGE(0x3f8e, 0x3f8e) AM_READ_PORT("DSW3")
138	150	AM_RANGE(0x3f8f, 0x3f8f) AM_READ_PORT("DSW1")
139	151	AM_RANGE(0x3f90, 0x3f90) AM_READ_PORT("DSW2")
140		AM_RANGE(0x3fa0, 0x3faf) AM_READWRITE(K053244_r,K053244_w)
141		AM_RANGE(0x3fb0, 0x3fbf) AM_WRITE(K053251_w)
	152	AM_RANGE(0x3fa0, 0x3faf) AM_DEVREADWRITE("k053245", k053244_r, k053244_w)
	153	AM_RANGE(0x3fb0, 0x3fbf) AM_DEVWRITE("k053251", k053251_w)
142	154	AM_RANGE(0x3fc0, 0x3fc0) AM_READWRITE(watchdog_reset_r,parodius_3fc0_w)
143	155	AM_RANGE(0x3fc4, 0x3fc4) AM_WRITE(parodius_videobank_w)
144	156	AM_RANGE(0x3fc8, 0x3fc8) AM_WRITE(parodius_sh_irqtrigger_w)
145	157	AM_RANGE(0x3fcc, 0x3fcd) AM_DEVREADWRITE("konami", parodius_sound_r,k053260_w)   /* K053260 */
146	158	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(parodius_052109_053245_r,parodius_052109_053245_w)
147		AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_r,K052109_w)
	159	AM_RANGE(0x2000, 0x5fff) AM_DEVREADWRITE("k052109", k052109_r, k052109_w)
148	160	AM_RANGE(0x6000, 0x9fff) AM_ROMBANK("bank1")         /* banked ROM */
149	161	AM_RANGE(0xa000, 0xffff) AM_ROM               /* ROM */
150	162	ADDRESS_MAP_END
r6740	r6741
223	235
224	236	***************************************************************************/
225	237
	238	static const k052109_interface parodius_k052109_intf =
	239	{
	240	"gfx1", 0,
	241	NORMAL_PLANE_ORDER,
	242	KONAMI_ROM_DEINTERLEAVE_2,
	243	parodius_tile_callback
	244	};
	245
	246	static const k05324x_interface parodius_k05324x_intf =
	247	{
	248	"gfx2", 1,
	249	NORMAL_PLANE_ORDER,
	250	0, 0,
	251	KONAMI_ROM_DEINTERLEAVE_2,
	252	parodius_sprite_callback
	253	};
	254
226	255	static MACHINE_DRIVER_START( parodius )
227	256
228	257	/* basic machine hardware */
r6740	r6741
248	277
249	278	MDRV_PALETTE_LENGTH(2048)
250	279
251		MDRV_VIDEO_START(parodius)
252	280	MDRV_VIDEO_UPDATE(parodius)
253	281
	282	MDRV_K052109_ADD("k052109", parodius_k052109_intf)
	283	MDRV_K053245_ADD("k053245", parodius_k05324x_intf)
	284	MDRV_K053251_ADD("k053251")
	285
254	286	/* sound hardware */
255	287	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
256	288
r6740	r6741
344	376	}
345	377
346	378
347		static DRIVER_INIT( parodius )
348		{
349		konami_rom_deinterleave_2(machine, "gfx1");
350		konami_rom_deinterleave_2(machine, "gfx2");
351		}
352
353
354		GAME( 1990, parodius, 0,        parodius, parodius, parodius, ROT0, "Konami", "Parodius DA! (World)", 0 )
355		GAME( 1990, parodiusj,parodius, parodius, parodius, parodius, ROT0, "Konami", "Parodius DA! (Japan)", 0 )
	379	GAME( 1990, parodius, 0,        parodius, parodius, 0, ROT0, "Konami", "Parodius DA! (World)", 0 )
	380	GAME( 1990, parodiusj,parodius, parodius, parodius, 0, ROT0, "Konami", "Parodius DA! (Japan)", 0 )

src/mame/drivers/combatsc.c

r6740	r6741
3	3	"Combat School" (also known as "Boot Camp") - (Konami GX611)
4	4
5	5	TODO:
6		- in combasc (and more generally the 007121) the number of sprites can be
	6	- in combatsc (and more generally the 007121) the number of sprites can be
7	7	increased from 0x40 to 0x80. There is a hack in konamiic.c to handle that,
8	8	but it is wrong. If you don't pass the Iron Man stage, a few sprites are
9	9	left dangling on the screen.(*not a bug, 64 sprites are the maximum)
10	10	- it seems that to get correct target colors in firing range III we have to
11	11	use the WRONG lookup table (the one for tiles instead of the one for
12	12	sprites).
13		- in combascb, wrong sprite/char priority (see cpu head at beginning of arm
	13	- in combatscb, wrong sprite/char priority (see cpu head at beginning of arm
14	14	wrestling, and heads in intermission after firing range III)
15	15	- hook up sound in bootleg (the current sound is a hack, making use of the
16	16	Konami ROMset)
r6740	r6741
126	126	#include "cpu/z80/z80.h"
127	127	#include "sound/2203intf.h"
128	128	#include "sound/upd7759.h"
	129	#include "video/konicdev.h"
	130	#include "includes/combatsc.h"
129	131
130		/* from video/combasc.c */
131		PALETTE_INIT( combasc );
132		PALETTE_INIT( combascb );
133		READ8_HANDLER( combasc_video_r );
134		WRITE8_HANDLER( combasc_video_w );
135		VIDEO_START( combasc );
136		VIDEO_START( combascb );
137	132
138		WRITE8_HANDLER( combascb_bankselect_w );
139		WRITE8_HANDLER( combasc_bankselect_w );
140		MACHINE_RESET( combasc );
141		WRITE8_HANDLER( combasc_pf_control_w );
142		READ8_HANDLER( combasc_scrollram_r );
143		WRITE8_HANDLER( combasc_scrollram_w );
	133	/*************************************
	134	*
	135	*  Memory handlers
	136	*
	137	*************************************/
144	138
145		VIDEO_UPDATE( combascb );
146		VIDEO_UPDATE( combasc );
147		WRITE8_HANDLER( combasc_vreg_w );
	139	static WRITE8_HANDLER( combatsc_vreg_w )
	140	{
	141	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	142	if (data != state->vreg)
	143	{
	144	tilemap_mark_all_tiles_dirty(state->textlayer);
	145	if ((data & 0x0f) != (state->vreg & 0x0f))
	146	tilemap_mark_all_tiles_dirty(state->bg_tilemap[0]);
	147	if ((data >> 4) != (state->vreg >> 4))
	148	tilemap_mark_all_tiles_dirty(state->bg_tilemap[1]);
	149	state->vreg = data;
	150	}
	151	}
148	152
	153	static WRITE8_HANDLER( combatscb_sh_irqtrigger_w )
	154	{
	155	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	156	soundlatch_w(space, offset, data);
	157	cpu_set_input_line_and_vector(state->audiocpu, 0, HOLD_LINE, 0xff);
	158	}
149	159
	160	static READ8_HANDLER( combatscb_io_r )
	161	{
	162	static const char *const portnames[] = { "IN0", "IN1", "DSW1", "DSW2" };
150	163
	164	return input_port_read(space->machine, portnames[offset]);
	165	}
151	166
152		static WRITE8_HANDLER( combasc_coin_counter_w )
	167	static WRITE8_HANDLER( combatscb_priority_w )
153	168	{
	169	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	170	state->priority = data & 0x20;
	171	}
	172
	173	static WRITE8_HANDLER( combatsc_bankselect_w )
	174	{
	175	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	176
	177	if (data & 0x40)
	178	{
	179	state->video_circuit = 1;
	180	state->videoram = state->page[1];
	181	state->scrollram = state->scrollram1;
	182	}
	183	else
	184	{
	185	state->video_circuit = 0;
	186	state->videoram = state->page[0];
	187	state->scrollram = state->scrollram0;
	188	}
	189
	190	state->priority = data & 0x20;
	191
	192	if (data & 0x10)
	193	memory_set_bank(space->machine, "bank1", (data & 0x0e) >> 1);
	194	else
	195	memory_set_bank(space->machine, "bank1", 8 + (data & 1));
	196	}
	197
	198	static WRITE8_HANDLER( combatscb_io_w )
	199	{
	200	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	201
	202	switch (offset)
	203	{
	204	case 0x400: combatscb_priority_w(space, 0, data); break;
	205	case 0x800: combatscb_sh_irqtrigger_w(space, 0, data); break;
	206	case 0xc00:   combatsc_vreg_w(space, 0, data); break;
	207	default: state->io_ram[offset] = data; break;
	208	}
	209	}
	210
	211	static WRITE8_HANDLER( combatscb_bankselect_w )
	212	{
	213	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	214
	215	if (data & 0x40)
	216	{
	217	state->video_circuit = 1;
	218	state->videoram = state->page[1];
	219	}
	220	else
	221	{
	222	state->video_circuit = 0;
	223	state->videoram = state->page[0];
	224	}
	225
	226	data = data & 0x1f;
	227
	228	if (data != state->bank_select)
	229	{
	230	state->bank_select = data;
	231
	232	if (data & 0x10)
	233	memory_set_bank(space->machine, "bank1", (data & 0x0e) >> 1);
	234	else
	235	memory_set_bank(space->machine, "bank1", 8 + (data & 1));
	236
	237	if (data == 0x1f)
	238	{
	239	memory_set_bank(space->machine, "bank1", 8 + (data & 1));
	240	memory_install_write8_handler(space, 0x4000, 0x7fff, 0, 0, combatscb_io_w);
	241	memory_install_read8_handler(space, 0x4400, 0x4403, 0, 0, combatscb_io_r);/* IO RAM & Video Registers */
	242	}
	243	else
	244	{
	245	memory_install_read_bank(space, 0x4000, 0x7fff, 0, 0, "bank1");   /* banked ROM */
	246	memory_unmap_write(space, 0x4000, 0x7fff, 0, 0);   /* banked ROM */
	247	}
	248	}
	249	}
	250
	251	/****************************************************************************/
	252
	253	static WRITE8_HANDLER( combatsc_coin_counter_w )
	254	{
154	255	/* b7-b3: unused? */
155	256	/* b1: coin counter 2 */
156	257	/* b0: coin counter 1 */
157	258
158		coin_counter_w(space->machine, 0,data & 0x01);
159		coin_counter_w(space->machine, 1,data & 0x02);
	259	coin_counter_w(space->machine, 0, data & 0x01);
	260	coin_counter_w(space->machine, 1, data & 0x02);
160	261	}
161	262
162	263	static READ8_HANDLER( trackball_r )
163	264	{
164		static UINT8 pos[4],sign[4];
	265	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
165	266
166	267	if (offset == 0)
167	268	{
168		int i,dir[4];
	269	int i, dir[4];
169	270	static const char *const tracknames[] = { "TRACK0_Y", "TRACK0_X", "TRACK1_Y", "TRACK1_X" };
170	271
171	272	for (i = 0; i < 4; i++)
r6740	r6741
174	275
175	276	curr = input_port_read_safe(space->machine, tracknames[i], 0xff);
176	277
177		dir[i] = curr - pos[i];
178		sign[i] = dir[i] & 0x80;
179		pos[i] = curr;
	278	dir[i] = curr - state->pos[i];
	279	state->sign[i] = dir[i] & 0x80;
	280	state->pos[i] = curr;
180	281	}
181	282
182	283	/* fix sign for orthogonal movements */
183	284	if (dir[0] || dir[1])
184	285	{
185		if (!dir[0]) sign[0] = sign[1] ^ 0x80;
186		if (!dir[1]) sign[1] = sign[0];
	286	if (!dir[0]) state->sign[0] = state->sign[1] ^ 0x80;
	287	if (!dir[1]) state->sign[1] = state->sign[0];
187	288	}
188	289	if (dir[2] || dir[3])
189	290	{
190		if (!dir[2]) sign[2] = sign[3] ^ 0x80;
191		if (!dir[3]) sign[3] = sign[2];
	291	if (!dir[2]) state->sign[2] = state->sign[3] ^ 0x80;
	292	if (!dir[3]) state->sign[3] = state->sign[2];
192	293	}
193	294	}
194	295
195		return sign[offset] | (pos[offset] & 0x7f);
	296	return state->sign[offset] | (state->pos[offset] & 0x7f);
196	297	}
197	298
198	299
199	300	/* the protection is a simple multiply */
200		static int prot[2];
201
202	301	static WRITE8_HANDLER( protection_w )
203	302	{
204		prot[offset] = data;
	303	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	304	state->prot[offset] = data;
205	305	}
206	306	static READ8_HANDLER( protection_r )
207	307	{
208		return ((prot[0] * prot[1]) >> (offset * 8)) & 0xff;
	308	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	309	return ((state->prot[0] * state->prot[1]) >> (offset * 8)) & 0xff;
209	310	}
210	311	static WRITE8_HANDLER( protection_clock_w )
211	312	{
r6740	r6741
215	316
216	317	/****************************************************************************/
217	318
218		static WRITE8_HANDLER( combasc_sh_irqtrigger_w )
	319	static WRITE8_HANDLER( combatsc_sh_irqtrigger_w )
219	320	{
220		cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
	321	combatsc_state *state = (combatsc_state *)space->machine->driver_data;
	322	cpu_set_input_line_and_vector(state->audiocpu, 0, HOLD_LINE, 0xff);
221	323	}
222	324
223		static READ8_DEVICE_HANDLER( combasc_busy_r )
	325	static READ8_DEVICE_HANDLER( combatsc_busy_r )
224	326	{
225	327	return upd7759_busy_r(device) ? 1 : 0;
226	328	}
227	329
228		static WRITE8_DEVICE_HANDLER( combasc_play_w )
	330	static WRITE8_DEVICE_HANDLER( combatsc_play_w )
229	331	{
230	332	upd7759_start_w(device, data & 2);
231	333	}
232	334
233		static WRITE8_DEVICE_HANDLER( combasc_voice_reset_w )
	335	static WRITE8_DEVICE_HANDLER( combatsc_voice_reset_w )
234	336	{
235		upd7759_reset_w(device,data & 1);
	337	upd7759_reset_w(device,data & 1);
236	338	}
237	339
238		static WRITE8_DEVICE_HANDLER( combasc_portA_w )
	340	static WRITE8_DEVICE_HANDLER( combatsc_portA_w )
239	341	{
240	342	/* unknown. always write 0 */
241	343	}
242	344
243		static int boost;
244		static emu_timer *combasc_interleave_timer;
245
246		static READ8_DEVICE_HANDLER ( combasc_ym2203_r )
	345	static READ8_DEVICE_HANDLER ( combatsc_ym2203_r )
247	346	{
	347	combatsc_state *state = (combatsc_state *)device->machine->driver_data;
248	348	int status = ym2203_r(device,offset);
249	349
250		if (cpu_get_pc(cputag_get_cpu(device->machine, "audiocpu")) == 0x334)
	350	if (cpu_get_pc(state->audiocpu) == 0x334)
251	351	{
252		if (boost)
	352	if (state->boost)
253	353	{
254		boost = 0;
255		timer_adjust_periodic(combasc_interleave_timer, attotime_zero, 0, cputag_clocks_to_attotime(device->machine, "audiocpu", 80));
	354	state->boost = 0;
	355	timer_adjust_periodic(state->interleave_timer, attotime_zero, 0, cpu_clocks_to_attotime(state->audiocpu, 80));
256	356	}
257	357	else if (status & 2)
258	358	{
259		boost = 1;
260		timer_adjust_oneshot(combasc_interleave_timer, attotime_zero, 0);
	359	state->boost = 1;
	360	timer_adjust_oneshot(state->interleave_timer, attotime_zero, 0);
261	361	}
262	362	}
263	363
264		return(status);
	364	return status;
265	365	}
266	366
267		/****************************************************************************/
	367	/*************************************
	368	*
	369	*  Address maps
	370	*
	371	*************************************/
268	372
269		static ADDRESS_MAP_START( combasc_map, ADDRESS_SPACE_PROGRAM, 8 )
270		AM_RANGE(0x0000, 0x0007) AM_WRITE(combasc_pf_control_w)
271		AM_RANGE(0x0020, 0x005f) AM_READWRITE(combasc_scrollram_r, combasc_scrollram_w)
	373	static ADDRESS_MAP_START( combatsc_map, ADDRESS_SPACE_PROGRAM, 8 )
	374	AM_RANGE(0x0000, 0x0007) AM_WRITE(combatsc_pf_control_w)
	375	AM_RANGE(0x0020, 0x005f) AM_READWRITE(combatsc_scrollram_r, combatsc_scrollram_w)
272	376	//  AM_RANGE(0x0060, 0x00ff) AM_WRITEONLY                 /* RAM */
273	377
274	378	AM_RANGE(0x0200, 0x0201) AM_READWRITE(protection_r, protection_w)
r6740	r6741
279	383	AM_RANGE(0x0402, 0x0402) AM_READ_PORT("DSW1")         /* DSW #1 */
280	384	AM_RANGE(0x0403, 0x0403) AM_READ_PORT("DSW2")         /* DSW #2 */
281	385	AM_RANGE(0x0404, 0x0407) AM_READ(trackball_r)         /* 1P & 2P controls / trackball */
282		AM_RANGE(0x0408, 0x0408) AM_WRITE(combasc_coin_counter_w)   /* coin counters */
283		AM_RANGE(0x040c, 0x040c) AM_WRITE(combasc_vreg_w)
284		AM_RANGE(0x0410, 0x0410) AM_WRITE(combasc_bankselect_w)
	386	AM_RANGE(0x0408, 0x0408) AM_WRITE(combatsc_coin_counter_w)   /* coin counters */
	387	AM_RANGE(0x040c, 0x040c) AM_WRITE(combatsc_vreg_w)
	388	AM_RANGE(0x0410, 0x0410) AM_WRITE(combatsc_bankselect_w)
285	389	AM_RANGE(0x0414, 0x0414) AM_WRITE(soundlatch_w)
286		AM_RANGE(0x0418, 0x0418) AM_WRITE(combasc_sh_irqtrigger_w)
	390	AM_RANGE(0x0418, 0x0418) AM_WRITE(combatsc_sh_irqtrigger_w)
287	391	AM_RANGE(0x041c, 0x041c) AM_WRITE(watchdog_reset_w)         /* watchdog reset? */
288	392
289		AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_GENERIC(paletteram)      /* palette */
	393	AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_MEMBER(combatsc_state, paletteram)      /* palette */
290	394	AM_RANGE(0x0800, 0x1fff) AM_RAM                        /* RAM */
291		AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combasc_video_r, combasc_video_w)
	395	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combatsc_video_r, combatsc_video_w)
292	396	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")                  /* banked ROM area */
293	397	AM_RANGE(0x8000, 0xffff) AM_ROM                        /* ROM */
294	398	ADDRESS_MAP_END
295	399
296		static ADDRESS_MAP_START( combascb_map, ADDRESS_SPACE_PROGRAM, 8 )
	400	static ADDRESS_MAP_START( combatscb_map, ADDRESS_SPACE_PROGRAM, 8 )
297	401	AM_RANGE(0x0000, 0x04ff) AM_RAM
298		AM_RANGE(0x0500, 0x0500) AM_WRITE(combascb_bankselect_w)
299		AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_GENERIC(paletteram)      /* palette */
	402	AM_RANGE(0x0500, 0x0500) AM_WRITE(combatscb_bankselect_w)
	403	AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_MEMBER(combatsc_state, paletteram)      /* palette */
300	404	AM_RANGE(0x0800, 0x1fff) AM_RAM
301		AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combasc_video_r, combasc_video_w)
	405	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combatsc_video_r, combatsc_video_w)
302	406	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")                  /* banked ROM/RAM area */
303	407	AM_RANGE(0x8000, 0xffff) AM_ROM                        /* ROM */
304	408	ADDRESS_MAP_END
r6740	r6741
316	420	ADDRESS_MAP_END
317	421	#endif
318	422
319		static ADDRESS_MAP_START( combasc_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	423	static ADDRESS_MAP_START( combatsc_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
320	424	AM_RANGE(0x0000, 0x7fff) AM_ROM                                    /* ROM */
321	425	AM_RANGE(0x8000, 0x87ff) AM_RAM                                    /* RAM */
322	426
323		AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("upd", combasc_play_w)               /* upd7759 play voice */
	427	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("upd", combatsc_play_w)               /* upd7759 play voice */
324	428	AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("upd", upd7759_port_w)               /* upd7759 voice select */
325		AM_RANGE(0xb000, 0xb000) AM_DEVREAD("upd", combasc_busy_r)               /* upd7759 busy? */
326		AM_RANGE(0xc000, 0xc000) AM_DEVWRITE("upd", combasc_voice_reset_w)         /* upd7759 reset? */
	429	AM_RANGE(0xb000, 0xb000) AM_DEVREAD("upd", combatsc_busy_r)               /* upd7759 busy? */
	430	AM_RANGE(0xc000, 0xc000) AM_DEVWRITE("upd", combatsc_voice_reset_w)         /* upd7759 reset? */
327	431
328	432	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)                        /* soundlatch_r? */
329		AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ymsnd", combasc_ym2203_r, ym2203_w)   /* YM 2203 intercepted */
	433	AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ymsnd", combatsc_ym2203_r, ym2203_w)   /* YM 2203 intercepted */
330	434	ADDRESS_MAP_END
331	435
332	436
	437	/*************************************
	438	*
	439	*  Input ports
	440	*
	441	*************************************/
	442
333	443	static INPUT_PORTS_START( common_inputs )
334	444	PORT_START("IN0")
335	445	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
r6740	r6741
410	520	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
411	521	INPUT_PORTS_END
412	522
413		static INPUT_PORTS_START( combasc )
	523	static INPUT_PORTS_START( combatsc )
414	524	PORT_INCLUDE( dips )
415	525
416	526	PORT_INCLUDE( common_inputs )
r6740	r6741
426	536	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
427	537	INPUT_PORTS_END
428	538
429		static INPUT_PORTS_START( combasct )
	539	static INPUT_PORTS_START( combatsct )
430	540	PORT_INCLUDE( dips )
431	541
432	542	PORT_INCLUDE( common_inputs )
r6740	r6741
446	556	PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(10) PORT_KEYDELTA(10) PORT_PLAYER(2)
447	557	INPUT_PORTS_END
448	558
449		static INPUT_PORTS_START( combascb )
	559	static INPUT_PORTS_START( combatscb )
450	560	PORT_INCLUDE( dips )
451	561
452	562	PORT_MODIFY("DSW2")
r6740	r6741
478	588
479	589
480	590
	591	/*************************************
	592	*
	593	*  Graphics definitions
	594	*
	595	*************************************/
	596
481	597	static const gfx_layout gfxlayout =
482	598	{
483	599	8,8,
r6740	r6741
517	633	8*8*4
518	634	};
519	635
520		static GFXDECODE_START( combasc )
	636	static GFXDECODE_START( combatsc )
521	637	GFXDECODE_ENTRY( "gfx1", 0x00000, gfxlayout, 0, 8*16 )
522	638	GFXDECODE_ENTRY( "gfx2", 0x00000, gfxlayout, 0, 8*16 )
523	639	GFXDECODE_END
524	640
525		static GFXDECODE_START( combascb )
	641	static GFXDECODE_START( combatscb )
526	642	GFXDECODE_ENTRY( "gfx1", 0x00000, tile_layout,   0, 8*16 )
527	643	GFXDECODE_ENTRY( "gfx1", 0x40000, tile_layout,   0, 8*16 )
528	644	GFXDECODE_ENTRY( "gfx2", 0x00000, sprite_layout, 0, 8*16 )
529	645	GFXDECODE_ENTRY( "gfx2", 0x40000, sprite_layout, 0, 8*16 )
530	646	GFXDECODE_END
531	647
	648
	649	/*************************************
	650	*
	651	*  Machine driver
	652	*
	653	*************************************/
	654
532	655	static const ym2203_interface ym2203_config =
533	656	{
534	657	{
r6740	r6741
536	659	AY8910_DEFAULT_LOADS,
537	660	DEVCB_NULL,
538	661	DEVCB_NULL,
539		DEVCB_HANDLER(combasc_portA_w),
	662	DEVCB_HANDLER(combatsc_portA_w),
540	663	DEVCB_NULL
541	664	},
542	665	NULL
543	666	};
544	667
545	668
	669	static MACHINE_START( combatsc )
	670	{
	671	combatsc_state *state = (combatsc_state *)machine->driver_data;
	672	UINT8 *MEM = memory_region(machine, "maincpu") + 0x38000;
	673
	674	state->io_ram  = MEM + 0x0000;
	675	state->page[0] = MEM + 0x4000;
	676	state->page[1] = MEM + 0x6000;
	677
	678	state->interleave_timer = timer_alloc(machine, NULL, NULL);
	679
	680	state->audiocpu = devtag_get_device(machine, "audiocpu");
	681	state->k007121_1 = devtag_get_device(machine, "k007121_1");
	682	state->k007121_2 = devtag_get_device(machine, "k007121_2");
	683
	684	memory_configure_bank(machine, "bank1", 0, 10, memory_region(machine, "maincpu") + 0x10000, 0x4000);
	685
	686	state_save_register_global(machine, state->priority);
	687	state_save_register_global(machine, state->vreg);
	688	state_save_register_global(machine, state->bank_select);
	689	state_save_register_global(machine, state->video_circuit);
	690	state_save_register_global(machine, state->boost);
	691	state_save_register_global_array(machine, state->prot);
	692	state_save_register_global_array(machine, state->pos);
	693	state_save_register_global_array(machine, state->sign);
	694	}
	695
	696
	697	static MACHINE_RESET( combatsc )
	698	{
	699	combatsc_state *state = (combatsc_state *)machine->driver_data;
	700	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	701	int i;
	702
	703	memset(state->io_ram,  0x00, 0x4000);
	704	memset(state->page[0], 0x00, 0x2000);
	705	memset(state->page[1], 0x00, 0x2000);
	706
	707	state->vreg = -1;
	708	state->boost = 1;
	709	state->bank_select = -1;
	710	state->prot[0] = 0;
	711	state->prot[1] = 0;
	712
	713	for (i = 0; i < 4; i++)
	714	{
	715	state->pos[i] = 0;
	716	state->sign[i] = 0;
	717	}
	718
	719	combatsc_bankselect_w(space, 0, 0);
	720	}
	721
546	722	/* combat school (original) */
547		static MACHINE_DRIVER_START( combasc )
	723	static MACHINE_DRIVER_START( combatsc )
548	724
	725	/* driver data */
	726	MDRV_DRIVER_DATA(combatsc_state)
	727
549	728	/* basic machine hardware */
550	729	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)   /* 3 MHz? */
551		MDRV_CPU_PROGRAM_MAP(combasc_map)
	730	MDRV_CPU_PROGRAM_MAP(combatsc_map)
552	731	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
553	732
554	733	MDRV_CPU_ADD("audiocpu", Z80,3579545)   /* 3.579545 MHz */
555		MDRV_CPU_PROGRAM_MAP(combasc_sound_map)
	734	MDRV_CPU_PROGRAM_MAP(combatsc_sound_map)
556	735
557	736	MDRV_QUANTUM_TIME(HZ(1200))
558	737
559		MDRV_MACHINE_RESET(combasc)
	738	MDRV_MACHINE_START(combatsc)
	739	MDRV_MACHINE_RESET(combatsc)
560	740
561	741	/* video hardware */
562	742	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
566	746	MDRV_SCREEN_SIZE(32*8, 32*8)
567	747	MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
568	748
569		MDRV_GFXDECODE(combasc)
	749	MDRV_GFXDECODE(combatsc)
570	750	MDRV_PALETTE_LENGTH(8*16*16)
571	751
572		MDRV_PALETTE_INIT(combasc)
573		MDRV_VIDEO_START(combasc)
574		MDRV_VIDEO_UPDATE(combasc)
	752	MDRV_PALETTE_INIT(combatsc)
	753	MDRV_VIDEO_START(combatsc)
	754	MDRV_VIDEO_UPDATE(combatsc)
575	755
	756	MDRV_K007121_ADD("k007121_1")
	757	MDRV_K007121_ADD("k007121_2")
	758
576	759	/* sound hardware */
577	760	MDRV_SPEAKER_STANDARD_MONO("mono")
578	761
r6740	r6741
585	768	MACHINE_DRIVER_END
586	769
587	770	/* combat school (bootleg on different hardware) */
588		static MACHINE_DRIVER_START( combascb )
	771	static MACHINE_DRIVER_START( combatscb )
589	772
	773	/* driver data */
	774	MDRV_DRIVER_DATA(combatsc_state)
	775
590	776	/* basic machine hardware */
591	777	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)   /* 3 MHz? */
592		MDRV_CPU_PROGRAM_MAP(combascb_map)
	778	MDRV_CPU_PROGRAM_MAP(combatscb_map)
593	779	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
594	780
595	781	MDRV_CPU_ADD("audiocpu", Z80,3579545)   /* 3.579545 MHz */
596		MDRV_CPU_PROGRAM_MAP(combasc_sound_map) /* FAKE */
	782	MDRV_CPU_PROGRAM_MAP(combatsc_sound_map) /* FAKE */
597	783
598	784	MDRV_QUANTUM_TIME(HZ(1200))
599	785
600		MDRV_MACHINE_RESET(combasc)
	786	MDRV_MACHINE_START(combatsc)
	787	MDRV_MACHINE_RESET(combatsc)
601	788
602	789	/* video hardware */
603	790	MDRV_SCREEN_ADD("screen", RASTER)
r6740	r6741
607	794	MDRV_SCREEN_SIZE(32*8, 32*8)
608	795	MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
609	796
610		MDRV_GFXDECODE(combascb)
	797	MDRV_GFXDECODE(combatscb)
611	798	MDRV_PALETTE_LENGTH(8*16*16)
612	799
613		MDRV_PALETTE_INIT(combascb)
614		MDRV_VIDEO_START(combascb)
615		MDRV_VIDEO_UPDATE(combascb)
	800	MDRV_PALETTE_INIT(combatscb)
	801	MDRV_VIDEO_START(combatscb)
	802	MDRV_VIDEO_UPDATE(combatscb)
616	803
617	804	/* We are using the original sound subsystem */
618	805	MDRV_SPEAKER_STANDARD_MONO("mono")
r6740	r6741
627	814
628	815
629	816
630		ROM_START( combasc )
	817	/*************************************
	818	*
	819	*  ROM definition(s)
	820	*
	821	*************************************/
	822
	823	ROM_START( combatsc )
631	824	ROM_REGION( 0x40000, "maincpu", 0 ) /* 6309 code */
632	825	ROM_LOAD( "611g01.rom", 0x30000, 0x08000, CRC(857ffffe) SHA1(de7566d58314df4b7fdc07eb31a3f9bdd12d1a73) )
633	826	ROM_CONTINUE(           0x08000, 0x08000 )
r6740	r6741
660	853	ROM_LOAD( "pal20l8.8h",   0x0400, 0x0144, NO_DUMP ) /* PAL is read protected */
661	854	ROM_END
662	855
663		ROM_START( combasct )
	856	ROM_START( combatsct )
664	857	ROM_REGION( 0x40000, "maincpu", 0 ) /* 6309 code */
665	858	ROM_LOAD( "g01.rom",     0x30000, 0x08000, CRC(489c132f) SHA1(c717195f89add4be4a21ecc1ddd58361b0ab4a74) )
666	859	ROM_CONTINUE(            0x08000, 0x08000 )
r6740	r6741
688	881	ROM_LOAD( "611g04.rom",  0x00000, 0x20000, CRC(2987e158) SHA1(87c5129161d3be29a339083349807e60b625c3f7) )
689	882	ROM_END
690	883
691		ROM_START( combascj )
	884	ROM_START( combatscj )
692	885	ROM_REGION( 0x40000, "maincpu", 0 ) /* 6309 code */
693	886	ROM_LOAD( "611p01.a14",  0x30000, 0x08000, CRC(d748268e) SHA1(91588b6a0d3af47065204b980a56544a9f29b6d9) )
694	887	ROM_CONTINUE(            0x08000, 0x08000 )
r6740	r6741
744	937	ROM_LOAD( "611g04.rom",  0x00000, 0x20000, CRC(2987e158) SHA1(87c5129161d3be29a339083349807e60b625c3f7) )
745	938	ROM_END
746	939
747		ROM_START( combascb )
	940	ROM_START( combatscb )
748	941	ROM_REGION( 0x40000, "maincpu", 0 ) /* 6809 code */
749	942	ROM_LOAD( "combat.002",    0x30000, 0x08000, CRC(0996755d) SHA1(bb6bbbf7ab3b5fab5e1c6cebc7b3f0d720493c3b) )
750	943	ROM_CONTINUE(            0x08000, 0x08000 )
r6740	r6741
785	978	ROM_END
786	979
787	980
	981	/*************************************
	982	*
	983	*  Driver initialization
	984	*
	985	*************************************/
788	986
789		static void combasc_init_common(running_machine *machine)
	987	static DRIVER_INIT( combatsc )
790	988	{
791		boost = 1;
792		combasc_interleave_timer = timer_alloc(machine, NULL, NULL);
793		}
794
795		static DRIVER_INIT( combasct )
796		{
797		combasc_init_common(machine);
798		}
799
800		static DRIVER_INIT( combasc )
801		{
802	989	/* joystick instead of trackball */
803	990	memory_install_read_port(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0404, 0x0404, 0, 0, "IN1");
804
805		combasc_init_common(machine);
806	991	}
807	992
808		static DRIVER_INIT( combascb )
809		{
810		combasc_init_common(machine);
811		}
812	993
	994	/*************************************
	995	*
	996	*  Game driver(s)
	997	*
	998	*************************************/
813	999
814
815		GAME( 1988, combasc,  0,       combasc,  combasc,  combasc,  ROT0, "Konami", "Combat School (joystick)", 0 )
816		GAME( 1987, combasct, combasc, combasc,  combasct, combasct, ROT0, "Konami", "Combat School (trackball)", 0 )
817		GAME( 1987, combascj, combasc, combasc,  combasct, combasct, ROT0, "Konami", "Combat School (Japan trackball)", 0 )
818		GAME( 1987, bootcamp, combasc, combasc,  combasct, combasct, ROT0, "Konami", "Boot Camp", 0 )
819		GAME( 1988, combascb, combasc, combascb, combascb, combascb, ROT0, "bootleg", "Combat School (bootleg)", GAME_IMPERFECT_COLORS )
	1000	GAME( 1988, combatsc,  0,        combatsc,  combatsc,  combatsc,  ROT0, "Konami",  "Combat School (joystick)", 0 )
	1001	GAME( 1987, combatsct, combatsc, combatsc,  combatsct, 0,         ROT0, "Konami",  "Combat School (trackball)", 0 )
	1002	GAME( 1987, combatscj, combatsc, combatsc,  combatsct, 0,         ROT0, "Konami",  "Combat School (Japan trackball)", 0 )
	1003	GAME( 1987, bootcamp,  combatsc, combatsc,  combatsct, 0,         ROT0, "Konami",  "Boot Camp", 0 )
	1004	GAME( 1988, combatscb, combatsc, combatscb, combatscb, 0,         ROT0, "bootleg", "Combat School (bootleg)", GAME_IMPERFECT_COLORS )

src/mame/drivers/rockrage.c

r6740	r6741
50	50	#include "driver.h"
51	51	#include "cpu/m6809/m6809.h"
52	52	#include "cpu/hd6309/hd6309.h"
53		#include "video/konamiic.h"
54	53	#include "sound/2151intf.h"
55	54	#include "sound/vlm5030.h"
	55	#include "video/konicdev.h"
	56	#include "includes/rockrage.h"
56	57
57		/* from video */
58		VIDEO_START( rockrage );
59		VIDEO_UPDATE( rockrage );
60		WRITE8_HANDLER( rockrage_vreg_w );
61		PALETTE_INIT( rockrage );
62	58
63	59	static INTERRUPT_GEN( rockrage_interrupt )
64	60	{
65		if (K007342_is_INT_enabled())
66		cpu_set_input_line(device, HD6309_IRQ_LINE, HOLD_LINE);
	61	rockrage_state *state = (rockrage_state *)device->machine->driver_data;
	62	if (k007342_is_int_enabled(state->k007342))
	63	cpu_set_input_line(device, HD6309_IRQ_LINE, HOLD_LINE);
67	64	}
68	65
69	66	static WRITE8_HANDLER( rockrage_bankswitch_w )
70	67	{
71		int bankaddress;
72		UINT8 *RAM = memory_region(space->machine, "maincpu");
73
74	68	/* bits 4-6 = bank number */
75		bankaddress = 0x10000 + ((data & 0x70) >> 4) * 0x2000;
76		memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
	69	memory_set_bank(space->machine, "bank1", (data & 0x70) >> 4);
77	70
78	71	/* bits 0 & 1 = coin counters */
79	72	coin_counter_w(space->machine, 0,data & 0x01);
r6740	r6741
84	77
85	78	static WRITE8_HANDLER( rockrage_sh_irqtrigger_w )
86	79	{
	80	rockrage_state *state = (rockrage_state *)space->machine->driver_data;
87	81	soundlatch_w(space, offset, data);
88		cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
	82	cpu_set_input_line(state->audiocpu, M6809_IRQ_LINE, HOLD_LINE);
89	83	}
90	84
91	85	static READ8_DEVICE_HANDLER( rockrage_VLM5030_busy_r )
92	86	{
93		return ( vlm5030_bsy(device) ? 1 : 0 );
	87	return (vlm5030_bsy(device) ? 1 : 0);
94	88	}
95	89
96	90	static WRITE8_DEVICE_HANDLER( rockrage_speech_w )
97	91	{
98	92	/* bit2 = data bus enable */
99		vlm5030_rst( device, ( data >> 1 ) & 0x01 );
100		vlm5030_st( device, ( data >> 0 ) & 0x01 );
	93	vlm5030_rst(device, (data >> 1) & 0x01);
	94	vlm5030_st(device, (data >> 0) & 0x01);
101	95	}
102	96
103	97	static ADDRESS_MAP_START( rockrage_map, ADDRESS_SPACE_PROGRAM, 8 )
104		AM_RANGE(0x0000, 0x1fff) AM_READWRITE(K007342_r,K007342_w)               /* Color RAM + Video RAM */
105		AM_RANGE(0x2000, 0x21ff) AM_READWRITE(K007420_r,K007420_w)               /* Sprite RAM */
106		AM_RANGE(0x2200, 0x23ff) AM_READWRITE(K007342_scroll_r,K007342_scroll_w)   /* Scroll RAM */
107		AM_RANGE(0x2400, 0x247f) AM_RAM AM_BASE_GENERIC(paletteram)                  /* Palette */
108		AM_RANGE(0x2600, 0x2607) AM_WRITE(K007342_vreg_w)                     /* Video Registers */
	98	AM_RANGE(0x0000, 0x1fff) AM_DEVREADWRITE("k007342", k007342_r, k007342_w)               /* Color RAM + Video RAM */
	99	AM_RANGE(0x2000, 0x21ff) AM_DEVREADWRITE("k007420", k007420_r, k007420_w)               /* Sprite RAM */
	100	AM_RANGE(0x2200, 0x23ff) AM_DEVREADWRITE("k007342", k007342_scroll_r, k007342_scroll_w)   /* Scroll RAM */
	101	AM_RANGE(0x2400, 0x247f) AM_RAM AM_BASE_MEMBER(rockrage_state, paletteram)                  /* Palette */
	102	AM_RANGE(0x2600, 0x2607) AM_DEVWRITE("k007342", k007342_vreg_w)                     /* Video Registers */
109	103	AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("SYSTEM")
110	104	AM_RANGE(0x2e01, 0x2e01) AM_READ_PORT("P1")
111	105	AM_RANGE(0x2e02, 0x2e02) AM_READ_PORT("P2")
r6740	r6741
266	260
267	261	***************************************************************************/
268	262
	263	static const k007342_interface rockrage_k007342_intf =
	264	{
	265	0,   rockrage_tile_callback
	266	};
	267
	268	static const k007420_interface rockrage_k007420_intf =
	269	{
	270	0x3ff, rockrage_sprite_callback
	271	};
	272
	273
	274	static MACHINE_START( rockrage )
	275	{
	276	rockrage_state *state = (rockrage_state *)machine->driver_data;
	277	UINT8 *ROM = memory_region(machine, "maincpu");
	278
	279	memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x2000);
	280
	281	state->audiocpu = devtag_get_device(machine, "audiocpu");
	282	state->k007342 = devtag_get_device(machine, "k007342");
	283	state->k007420 = devtag_get_device(machine, "k007420");
	284
	285	state_save_register_global(machine, state->vreg);
	286	state_save_register_global_array(machine, state->layer_colorbase);
	287	}
	288
	289	static MACHINE_RESET( rockrage )
	290	{
	291	rockrage_state *state = (rockrage_state *)machine->driver_data;
	292
	293	state->vreg = 0;
	294	state->layer_colorbase[0] = 0x00;
	295	state->layer_colorbase[1] = 0x10;
	296	}
	297
269	298	static MACHINE_DRIVER_START( rockrage )
270	299
	300	/* driver data */
	301	MDRV_DRIVER_DATA(rockrage_state)
	302
271	303	/* basic machine hardware */
272	304	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)      /* 24MHz/8 */
273	305	MDRV_CPU_PROGRAM_MAP(rockrage_map)
r6740	r6741
276	308	MDRV_CPU_ADD("audiocpu", M6809, 1500000)      /* 24MHz/16 */
277	309	MDRV_CPU_PROGRAM_MAP(rockrage_sound_map)
278	310
	311	MDRV_MACHINE_START(rockrage)
	312	MDRV_MACHINE_RESET(rockrage)
	313
279	314	/* video hardware */
280	315	MDRV_SCREEN_ADD("screen", RASTER)
281	316	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
284	319	MDRV_SCREEN_SIZE(32*8, 32*8)
285	320	MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
286	321
	322	MDRV_K007342_ADD("k007342", rockrage_k007342_intf)
	323	MDRV_K007420_ADD("k007420", rockrage_k007420_intf)
	324
287	325	MDRV_GFXDECODE(rockrage)
288	326	MDRV_PALETTE_LENGTH(64 + 2*16*16)
289	327
290	328	MDRV_PALETTE_INIT(rockrage)
291		MDRV_VIDEO_START(rockrage)
292	329	MDRV_VIDEO_UPDATE(rockrage)
293	330
294	331	/* sound hardware */
r6740	r6741
394	431
395	432	***************************************************************************/
396	433
397		GAME( 1986, rockrage, 0,        rockrage, rockrage, 0, ROT0, "Konami", "Rock'n Rage (World)", 0 )
398		GAME( 1986, rockragea,rockrage, rockrage, rockrage, 0, ROT0, "Konami", "Rock'n Rage (Prototype?)", 0 )
399		GAME( 1986, rockragej,rockrage, rockrage, rockrage, 0, ROT0, "Konami", "Koi no Hotrock (Japan)", 0 )
	434	GAME( 1986, rockrage, 0,        rockrage, rockrage, 0, ROT0, "Konami", "Rock'n Rage (World)", GAME_SUPPORTS_SAVE )
	435	GAME( 1986, rockragea,rockrage, rockrage, rockrage, 0, ROT0, "Konami", "Rock'n Rage (Prototype?)", GAME_SUPPORTS_SAVE )
	436	GAME( 1986, rockragej,rockrage, rockrage, rockrage, 0, ROT0, "Konami", "Koi no Hotrock (Japan)", GAME_SUPPORTS_SAVE )

src/mame/drivers/midxunit.c

r6740	r6741
83	83	#include "cpu/tms34010/tms34010.h"
84	84	#include "cpu/adsp2100/adsp2100.h"
85	85	#include "audio/dcs.h"
86		#include "midwunit.h"
	86	#include "includes/midwunit.h"
87	87
88	88
89	89	#define PIXEL_CLOCK      (8000000)

src/mame/drivers/segac2.c

r6740	r6741
1370	1370	MDRV_MACHINE_RESET(segac2)
1371	1371	MDRV_NVRAM_HANDLER(generic_randfill)
1372	1372
	1373	MDRV_IMPORT_FROM(megadriv_timers)
	1374
1373	1375	/* video hardware */
1374	1376	//MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS)
1375	1377

src/mame/drivers/tubep.c

r6740	r6741
105	105	#include "sound/ay8910.h"
106	106	#include "sound/msm5205.h"
107	107
108		#include "tubep.h"
	108	#include "includes/tubep.h"
109	109
110	110	/* Global variables */
111	111	static UINT8 sound_latch;

src/mame/drivers/homedata.c

r6740	r6741
219	219	#include "cpu/z80/z80.h"
220	220	#include "cpu/m6809/m6809.h"
221	221	#include "cpu/upd7810/upd7810.h"
222		#include "homedata.h"
	222	#include "includes/homedata.h"
223	223	#include "sound/dac.h"
224	224	#include "sound/2203intf.h"
225	225	#include "sound/sn76496.h"

src/mame/drivers/exidy.c

r6740	r6741
128	128	#include "driver.h"
129	129	#include "cpu/m6502/m6502.h"
130	130	#include "deprecat.h"
131		#include "exidy.h"
132		#include "targ.h"
	131	#include "includes/exidy.h"
	132	#include "includes/targ.h"
133	133	#include "machine/6821pia.h"
134	134
135	135

src/mame/drivers/jokrwild.c

r6740	r6741
100	100	*     Video Hardware     *
101	101	*************************/
102	102
	103	static UINT8 *videoram;
	104	static UINT8 *colorram;
103	105	static tilemap *bg_tilemap;
104	106
105	107
106	108	static WRITE8_HANDLER( jokrwild_videoram_w )
107	109	{
108		space->machine->generic.videoram.u8[offset] = data;
	110	videoram[offset] = data;
109	111	tilemap_mark_tile_dirty(bg_tilemap, offset);
110	112	}
111	113
112	114
113	115	static WRITE8_HANDLER( jokrwild_colorram_w )
114	116	{
115		space->machine->generic.colorram.u8[offset] = data;
	117	colorram[offset] = data;
116	118	tilemap_mark_tile_dirty(bg_tilemap, offset);
117	119	}
118	120
r6740	r6741
124	126	xx-- ----   bank select.
125	127	---- xxxx   color code.
126	128	*/
127		int attr = machine->generic.colorram.u8[tile_index];
128		int code = machine->generic.videoram.u8[tile_index] | ((attr & 0xc0) << 2);
	129	int attr = colorram[tile_index];
	130	int code = videoram[tile_index] | ((attr & 0xc0) << 2);
129	131	int color = (attr & 0x0f);
130	132
131	133	SET_TILE_INFO( 0, code , color , 0);
r6740	r6741
176	178	*************************/
177	179
178	180	static ADDRESS_MAP_START( jokrwild_map, ADDRESS_SPACE_PROGRAM, 8 )
179		AM_RANGE(0x0000, 0x03ff) AM_RAM_WRITE(jokrwild_videoram_w) AM_BASE_GENERIC(videoram)
	181	AM_RANGE(0x0000, 0x03ff) AM_RAM_WRITE(jokrwild_videoram_w) AM_BASE(&videoram)
180	182	AM_RANGE(0x0400, 0x07ff) AM_RAM //FIXME: backup RAM
181		AM_RANGE(0x2000, 0x23ff) AM_RAM_WRITE(jokrwild_colorram_w) AM_BASE_GENERIC(colorram)
	183	AM_RANGE(0x2000, 0x23ff) AM_RAM_WRITE(jokrwild_colorram_w) AM_BASE(&colorram)
182	184	AM_RANGE(0x2400, 0x27ff) AM_RAM //stack RAM
183	185	AM_RANGE(0x4004, 0x4007) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w)
184	186	AM_RANGE(0x4008, 0x400b) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w) //optical sensor is here

src/mame/drivers/hng64.c

r6740	r6741
452	452	#include "cpu/nec/nec.h"
453	453	#include "deprecat.h"
454	454	#include "cpu/mips/mips3.h"
455		#include "hng64.h"
	455	#include "includes/hng64.h"
456	456
457	457	int hng64_mcu_type = 0;
458	458	static UINT32 fake_mcu_time;
r6740	r6741
472	472	extern UINT32 *hng64_tcram;
473	473	extern UINT32 *hng64_3dregs;
474	474
475		extern UINT32 hng64_dls[2][0x81];
	475	extern void hng64_command3d(running_machine* machine, const UINT16* packet);
476	476
477	477	extern UINT8 hng64_screen_dis;
478	478
r6740	r6741
621	621	/* preliminary dma code, dma is used to copy program code -> ram */
622	622	static INT32 hng_dma_start,hng_dma_dst,hng_dma_len;
623	623
624		static void hng64_do_dma (const address_space *space)
	624	static void hng64_do_dma(const address_space *space)
625	625	{
626		printf("Performing DMA Start %08x Len %08x Dst %08x\n",hng_dma_start, hng_dma_len, hng_dma_dst);
	626	//printf("Performing DMA Start %08x Len %08x Dst %08x\n",hng_dma_start, hng_dma_len, hng_dma_dst);
627	627
628	628	while (hng_dma_len>=0)
629	629	{
r6740	r6741
659	659
660	660	switch(offset*4)
661	661	{
	662	//case 0x100c: Extremely likely to be involved with the ROZ groundplane.
	663	//             Probably tells the groundplane which scanline to start drawing at.
	664
662	665	case 0x1084: //MIPS->MCU latch port
663	666	hng_mcu_en = (data & 0xff); //command-based, i.e. doesn't control halt line and such?
664	667	//printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, hng64_sysregs[offset], cpu_get_pc(space->cpu));
r6740	r6741
869	872
870	873
871	874
872		// The 3d 'display list'
873		// is it a fifo?
	875	// The 3d 'display list' - is it a fifo?
874	876	// sams64 / sams64_2 access it in a very different way to fatal fury...
875	877	static WRITE32_HANDLER( dl_w )
876	878	{
877		COMBINE_DATA (&hng64_dl[offset]);
	879	int i;
	880	UINT16 packet3d[16];
	881
	882	COMBINE_DATA(&hng64_dl[offset]);
	883
	884	if (offset == 0x08 || offset == 0x7f ||   // Special buggers.
	885	offset == 0x10 || offset == 0x18 ||
	886	offset == 0x20 || offset == 0x28 ||
	887	offset == 0x30 || offset == 0x38 ||
	888	offset == 0x40 || offset == 0x48 ||
	889	offset == 0x50 || offset == 0x58 ||
	890	offset == 0x60 || offset == 0x68 ||
	891	offset == 0x70 || offset == 0x78)
	892	{
	893	// Create a 3d packet
	894	UINT16 packetStart = offset - 0x08;
	895	if (offset == 0x7f) packetStart += 1;
	896
	897	for (i = 0; i < 0x08; i++)
	898	{
	899	packet3d[i*2+0] = (hng64_dl[packetStart+i] & 0xffff0000) >> 16;
	900	packet3d[i*2+1] = (hng64_dl[packetStart+i] & 0x0000ffff);
	901	}
	902
	903	// Send it off to the 3d subsystem.
	904	hng64_command3d(space->machine, packet3d);
	905	}
878	906	}
879	907
880	908	#if 0
881	909	static READ32_HANDLER( dl_r )
882	910	{
883
884
885	911	//  mame_printf_debug("dl R (%08x) : %x %x\n", cpu_get_pc(space->cpu), offset, hng64_dl[offset]);
886	912	//  usrintf_showmessage("dl R (%08x) : %x %x", cpu_get_pc(space->cpu), offset, hng64_dl[offset]);
887	913	return hng64_dl[offset];
r6740	r6741
894	920	// Some kind of buffering of the display lists, or 'render current buffer' write?
895	921	static WRITE32_HANDLER( dl_control_w )
896	922	{
897		if (activeBuffer==0 || activeBuffer==1)
898		memcpy(&hng64_dls[activeBuffer][0],&hng64_dl[0],0x200);
	923	//printf("\n");   // Debug - ajg
	924	// TODO: put this back in.
	925	/*
	926	if (activeBuffer==0 || activeBuffer==1)
	927	memcpy(&hng64_dls[activeBuffer][0],&hng64_dl[0],0x200);
899	928
900		// Only if it's VALID (hack)
901		if (data & 1)
902		activeBuffer = 0;
903		if (data & 2)
904		activeBuffer = 1;
	929	// Only if it's VALID (hack)
	930	if (data & 1)
	931	activeBuffer = 0;
	932	if (data & 2)
	933	activeBuffer = 1;
	934	*/
905	935	}
906	936
907	937	#ifdef UNUSED_FUNCTION
r6740	r6741
1070	1100	AM_RANGE(0x2000d800, 0x2000e3ff) AM_WRITE(hng64_sprite_clear_even_w)
1071	1101	AM_RANGE(0x2000e400, 0x2000efff) AM_WRITE(hng64_sprite_clear_odd_w)
1072	1102	AM_RANGE(0x20010000, 0x20010013) AM_RAM AM_BASE(&hng64_spriteregs)
1073		AM_RANGE(0x20100000, 0x2017ffff) AM_RAM_WRITE(hng64_videoram_w) AM_BASE(&hng64_videoram)// Tilemap
	1103	AM_RANGE(0x20100000, 0x2017ffff) AM_RAM_WRITE(hng64_videoram_w) AM_BASE(&hng64_videoram)   // Tilemap
1074	1104	AM_RANGE(0x20190000, 0x20190037) AM_RAM AM_BASE(&hng64_videoregs)
1075	1105	AM_RANGE(0x20200000, 0x20203fff) AM_RAM_WRITE(hng64_pal_w) AM_BASE_GENERIC(paletteram)
1076	1106	AM_RANGE(0x20208000, 0x2020805f) AM_READWRITE(tcram_r, tcram_w) AM_BASE(&hng64_tcram)   // Transition Control
1077		AM_RANGE(0x20300000, 0x203001ff) AM_RAM_WRITE(dl_w) AM_BASE(&hng64_dl)      // 3d Display List
	1107	AM_RANGE(0x20300000, 0x203001ff) AM_RAM_WRITE(dl_w) AM_BASE(&hng64_dl)   // 3d Display List
	1108	//  AM_RANGE(0x20300200, 0x20300213) AM_RAM_WRITE(xxxx) AM_BASE(&xxxxxxxx)  // 3d Display List Upload?
1078	1109	AM_RANGE(0x20300214, 0x20300217) AM_WRITE(dl_control_w)
1079	1110	AM_RANGE(0x20300218, 0x2030021b) AM_READ(unk_vreg_r)
1080	1111
r6740	r6741
1698	1729	//  hng64_patch_bios_region(machine, 4); // 'Others'
1699	1730	#endif
1700	1731
	1732	/* 1 meg of virtual address space for the com cpu */
	1733	hng64_com_virtual_mem = auto_alloc_array(machine, UINT8, 0x100000);
	1734	hng64_com_op_base     = auto_alloc_array(machine, UINT8, 0x10000);
	1735
1701	1736	hng64_soundram=auto_alloc_array(machine, UINT16, 0x200000/2);
1702	1737	DRIVER_INIT_CALL(hng64_reorder_gfx);
1703	1738	}
r6740	r6741
1710	1745
1711	1746	static DRIVER_INIT( fatfurwa )
1712	1747	{
	1748	/* FILE* fp = fopen("/tmp/test.bin", "wb"); fwrite(memory_region(machine, "verts"), 1, 0x0c00000*2, fp); fclose(fp); */
1713	1749	DRIVER_INIT_CALL(hng64_fght);
1714	1750	hng64_mcu_type = FIGHT_MCU;
1715	1751	}
r6740	r6741
1803	1839	/* Comm CPU */
1804	1840	KL5C80_init();
1805	1841
1806		/* 1 meg of virtual address space for the com cpu */
1807		hng64_com_virtual_mem = auto_alloc_array(machine, UINT8, 0x100000);
1808		hng64_com_op_base     = auto_alloc_array(machine, UINT8, 0x10000);
1809
1810	1842	/* Fill up virtual memory with ROM */
1811	1843	for (i = 0x0; i < 0x100000; i++)
1812	1844	hng64_com_virtual_mem[i] = rom[i];
r6740	r6741
1861	1893
1862	1894
1863	1895	ROM_START( hng64 )
	1896	/* BIOS */
1864	1897	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
1865	1898	ROM_LOAD ( "brom1.bin", 0x000000, 0x080000,  CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) )
1866	1899	ROM_REGION( 0x0100000, "user2", 0 ) /* KL5C80 BIOS and unknown ROM */
r6740	r6741
1876	1909	ROM_REGION( 0x1000000, "samples", ROMREGION_ERASEFF ) /* Sound Samples? */
1877	1910	ROM_END
1878	1911
	1912
1879	1913	/* roads edge might need a different bios (driving board bios?) */
1880	1914	ROM_START( roadedge )
1881
1882	1915	/* BIOS */
1883	1916	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
1884	1917	ROM_LOAD ( "brom1.bin", 0x000000, 0x080000,  CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) )
r6740	r6741
1937	1970	ROM_END
1938	1971
1939	1972
1940
1941	1973	ROM_START( sams64 )
1942	1974	/* BIOS */
1943	1975	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
r6740	r6741
1983	2015	ROM_LOAD( "002-tx03a.15", 0x0800000, 0x400000, CRC(68c313f7) SHA1(90ce8d0d19a994647c7167e3b256ff31647e575a) )
1984	2016	ROM_LOAD( "002-tx04a.16", 0x0c00000, 0x400000, CRC(f7dac24f) SHA1(1215354f28cbeb9fc38f6a7acae450ad5f34bb6a) )
1985	2017
1986
1987	2018	/* X,Y,Z Vertex ROMs */
1988	2019	ROM_REGION( 0x1800000, "verts", 0 )
1989	2020	ROMX_LOAD( "002-vt01a.17", 0x0000000, 0x400000, CRC(403fd7fd) SHA1(9bdadbeb4cd13c4c4e89a1c233af9eaaa46f8fdf), ROM_GROUPWORD | ROM_SKIP(4) )
r6740	r6741
2181	2212
2182	2213
2183	2214	ROM_START( fatfurwa )
2184
2185	2215	/* BIOS */
2186	2216	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
2187	2217	ROM_LOAD ( "brom1.bin", 0x000000, 0x080000,  CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) )
r6740	r6741
2239	2269	ROM_LOAD( "006tx04a.16",0x0c00000, 0x400000, CRC(82d61652) SHA1(28303ae9e2545a4cb0b5843f9e73407754f41e9e) )
2240	2270
2241	2271	/* X,Y,Z Vertex ROMs */
2242		ROM_REGION16_BE( 0x0c00000, "verts", 0 )
	2272	ROM_REGION( 0x0c00000, "verts", 0 )
2243	2273	ROMX_LOAD( "006vt01a.17", 0x0000000, 0x400000, CRC(5c20ed4c) SHA1(df679f518292d70b9f23d2bddabf975d56b96910), ROM_GROUPWORD | ROM_SKIP(4) )
2244	2274	ROMX_LOAD( "006vt02a.18", 0x0000002, 0x400000, CRC(150eb717) SHA1(9acb067346eb386256047c0f1d24dc8fcc2118ca), ROM_GROUPWORD | ROM_SKIP(4) )
2245	2275	ROMX_LOAD( "006vt03a.19", 0x0000004, 0x400000, CRC(021cfcaf) SHA1(fb8b5f50d3490b31f0a4c3e6d3ae1b98bae41c97), ROM_GROUPWORD | ROM_SKIP(4) )
r6740	r6741
2311	2341	ROM_LOAD( "007tx04a.16",0x0c00000, 0x400000, CRC(02aa3f46) SHA1(1fca89c70586f8ebcdf669ecac121afa5cdf623f) )
2312	2342
2313	2343	/* X,Y,Z Vertex ROMs */
2314		ROM_REGION16_BE( 0x0c00000, "verts", 0 )
	2344	ROM_REGION( 0x0c00000, "verts", 0 )
2315	2345	ROMX_LOAD( "007vt01a.17", 0x0000000, 0x400000, CRC(f78a0376) SHA1(fde4ddd4bf326ae5f1ed10311c237b13b62e060c), ROM_GROUPWORD | ROM_SKIP(4) )
2316	2346	ROMX_LOAD( "007vt02a.18", 0x0000002, 0x400000, CRC(f365f608) SHA1(035fd9b829b7720c4aee6fdf204c080e6157994f), ROM_GROUPWORD | ROM_SKIP(4) )
2317	2347	ROMX_LOAD( "007vt03a.19", 0x0000004, 0x400000, CRC(ba05654d) SHA1(b7fe532732c0af7860c8eded3c5abd304d74e08e), ROM_GROUPWORD | ROM_SKIP(4) )

src/mame/drivers/solomon.c

r6740	r6741
10	10	#include "cpu/z80/z80.h"
11	11	#include "sound/ay8910.h"
12	12
	13	extern UINT8 *solomon_videoram;
	14	extern UINT8 *solomon_colorram;
13	15	extern UINT8 *solomon_videoram2;
14	16	extern UINT8 *solomon_colorram2;
15	17
r6740	r6741
53	55	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
54	56	AM_RANGE(0x0000, 0xbfff) AM_ROM
55	57	AM_RANGE(0xc000, 0xcfff) AM_RAM
56		AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(solomon_colorram_w) AM_BASE_GENERIC(colorram)
57		AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(solomon_videoram_w) AM_BASE_GENERIC(videoram)
	58	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(solomon_colorram_w) AM_BASE(&solomon_colorram)
	59	AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(solomon_videoram_w) AM_BASE(&solomon_videoram)
58	60	AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(solomon_colorram2_w) AM_BASE(&solomon_colorram2)
59	61	AM_RANGE(0xdc00, 0xdfff) AM_RAM_WRITE(solomon_videoram2_w) AM_BASE(&solomon_videoram2)
60	62	AM_RANGE(0xe000, 0xe07f) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)

src/mame/drivers/fastlane.c

r6740	r6741
1	1	/***************************************************************************
2	2
3		Fast Lane(GX752) (c) 1987 Konami
	3	Fast Lane (GX752) (c) 1987 Konami
4	4
5		Driver by Manuel Abadia <manu@teleline.es>
	5	Driver by Manuel Abadia <manu@teleline.es>
6	6
7		TODO:
8		- colors don't seem 100% accurate.
9		- verify that sound is correct (volume and bank switching)
	7	TODO:
	8	- colors don't seem 100% accurate.
	9	- verify that sound is correct (volume and bank switching)
10	10
11	11	***************************************************************************/
12	12
13	13	#include "driver.h"
14	14	#include "deprecat.h"
15	15	#include "cpu/hd6309/hd6309.h"
16		#include "video/konamiic.h"
17	16	#include "sound/k007232.h"
18		#include "konamipt.h"
	17	#include "video/konicdev.h"
	18	#include "includes/konamipt.h"
	19	#include "includes/fastlane.h"
19	20
20		/* from video/fastlane.c */
21		extern UINT8 *fastlane_k007121_regs,*fastlane_videoram1,*fastlane_videoram2;
22		WRITE8_HANDLER( fastlane_vram1_w );
23		WRITE8_HANDLER( fastlane_vram2_w );
24		PALETTE_INIT( fastlane );
25		VIDEO_START( fastlane );
26		VIDEO_UPDATE( fastlane );
27
28	21	static INTERRUPT_GEN( fastlane_interrupt )
29	22	{
	23	fastlane_state *state = (fastlane_state *)device->machine->driver_data;
	24
30	25	if (cpu_getiloops(device) == 0)
31	26	{
32		if (K007121_ctrlram[0][0x07] & 0x02)
	27	if (k007121_ctrlram_r(state->k007121, 7) & 0x02)
33	28	cpu_set_input_line(device, HD6309_IRQ_LINE, HOLD_LINE);
34	29	}
35	30	else if (cpu_getiloops(device) % 2)
36	31	{
37		if (K007121_ctrlram[0][0x07] & 0x01)
	32	if (k007121_ctrlram_r(state->k007121, 7) & 0x01)
38	33	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
39	34	}
40	35	}
41	36
42	37	static WRITE8_HANDLER( k007121_registers_w )
43	38	{
	39	fastlane_state *state = (fastlane_state *)space->machine->driver_data;
	40
44	41	if (offset < 8)
45		K007121_ctrl_0_w(space,offset,data);
	42	k007121_ctrl_w(state->k007121, offset, data);
46	43	else   /* scroll registers */
47		fastlane_k007121_regs[offset] = data;
	44	state->k007121_regs[offset] = data;
48	45	}
49	46
50	47	static WRITE8_HANDLER( fastlane_bankswitch_w )
51	48	{
52		int bankaddress;
53		UINT8 *RAM = memory_region(space->machine, "maincpu");
	49	fastlane_state *state = (fastlane_state *)space->machine->driver_data;
54	50
55	51	/* bits 0 & 1 coin counters */
56	52	coin_counter_w(space->machine, 0,data & 0x01);
57	53	coin_counter_w(space->machine, 1,data & 0x02);
58	54
59	55	/* bits 2 & 3 = bank number */
60		bankaddress = 0x10000 + ((data & 0x0c) >> 2) * 0x4000;
61		memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
	56	memory_set_bank(space->machine, "bank1", (data & 0x0c) >> 2);
62	57
63	58	/* bit 4: bank # for the 007232 (chip 2) */
64		k007232_set_bank(devtag_get_device(space->machine, "konami2"),0 + ((data & 0x10) >> 4),2 + ((data & 0x10) >> 4));
	59	k007232_set_bank(state->konami2, 0 + ((data & 0x10) >> 4), 2 + ((data & 0x10) >> 4));
65	60
66	61	/* other bits seems to be unused */
67	62	}
r6740	r6741
73	68	{
74	69	return k007232_r(device, offset ^ 1);
75	70	}
	71
76	72	static WRITE8_DEVICE_HANDLER( fastlane_k007232_w )
77	73	{
78	74	k007232_w(device, offset ^ 1, data);
79	75	}
80	76
81	77
82
83	78	static ADDRESS_MAP_START( fastlane_map, ADDRESS_SPACE_PROGRAM, 8 )
84		AM_RANGE(0x0000, 0x005f) AM_RAM_WRITE(k007121_registers_w) AM_BASE(&fastlane_k007121_regs)   /* 007121 registers */
	79	AM_RANGE(0x0000, 0x005f) AM_RAM_WRITE(k007121_registers_w) AM_BASE_MEMBER(fastlane_state, k007121_regs)   /* 007121 registers */
85	80	AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW3")
86	81	AM_RANGE(0x0801, 0x0801) AM_READ_PORT("P2")
87	82	AM_RANGE(0x0802, 0x0802) AM_READ_PORT("P1")
r6740	r6741
92	87	AM_RANGE(0x0c00, 0x0c00) AM_WRITE(fastlane_bankswitch_w)                           /* bankswitch control */
93	88	AM_RANGE(0x0d00, 0x0d0d) AM_DEVREADWRITE("konami1", fastlane_k007232_r, fastlane_k007232_w)   /* 007232 registers (chip 1) */
94	89	AM_RANGE(0x0e00, 0x0e0d) AM_DEVREADWRITE("konami2", fastlane_k007232_r, fastlane_k007232_w)   /* 007232 registers (chip 2) */
95		AM_RANGE(0x0f00, 0x0f1f) AM_READWRITE(K051733_r, K051733_w)                           /* 051733 (protection) */
96		AM_RANGE(0x1000, 0x17ff) AM_RAM AM_BASE_GENERIC(paletteram)                              /* Palette RAM */
	90	AM_RANGE(0x0f00, 0x0f1f) AM_DEVREADWRITE("k051733", k051733_r, k051733_w)                           /* 051733 (protection) */
	91	AM_RANGE(0x1000, 0x17ff) AM_RAM AM_BASE_MEMBER(fastlane_state, paletteram)                              /* Palette RAM */
97	92	AM_RANGE(0x1800, 0x1fff) AM_RAM                                                /* Work RAM */
98		AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(fastlane_vram1_w) AM_BASE(&fastlane_videoram1)       /* Video RAM (chip 1) */
99		AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(fastlane_vram2_w) AM_BASE(&fastlane_videoram2)       /* Video RAM (chip 2) */
100		AM_RANGE(0x3000, 0x3fff) AM_RAM AM_BASE_GENERIC(spriteram)                                 /* Sprite RAM */
	93	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(fastlane_vram1_w) AM_BASE_MEMBER(fastlane_state, videoram1)       /* Video RAM (chip 1) */
	94	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(fastlane_vram2_w) AM_BASE_MEMBER(fastlane_state, videoram2)       /* Video RAM (chip 2) */
	95	AM_RANGE(0x3000, 0x3fff) AM_RAM AM_BASE_MEMBER(fastlane_state, spriteram)                                 /* Sprite RAM */
101	96	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")                                          /* banked ROM */
102	97	AM_RANGE(0x8000, 0xffff) AM_ROM                                                /* ROM */
103	98	ADDRESS_MAP_END
r6740	r6741
183	178
184	179	static void volume_callback0(const device_config *device, int v)
185	180	{
186		k007232_set_volume(device,0,(v >> 4) * 0x11,0);
187		k007232_set_volume(device,1,0,(v & 0x0f) * 0x11);
	181	k007232_set_volume(device, 0, (v >> 4) * 0x11, 0);
	182	k007232_set_volume(device, 1, 0, (v & 0x0f) * 0x11);
188	183	}
189	184
190	185	static void volume_callback1(const device_config *device, int v)
191	186	{
192		k007232_set_volume(device,0,(v >> 4) * 0x11,0);
193		k007232_set_volume(device,1,0,(v & 0x0f) * 0x11);
	187	k007232_set_volume(device, 0, (v >> 4) * 0x11, 0);
	188	k007232_set_volume(device, 1, 0, (v & 0x0f) * 0x11);
194	189	}
195	190
196	191	static const k007232_interface k007232_interface_1 =
r6740	r6741
203	198	volume_callback1
204	199	};
205	200
	201	static MACHINE_START( fastlane )
	202	{
	203	fastlane_state *state = (fastlane_state *)machine->driver_data;
	204	UINT8 *ROM = memory_region(machine, "maincpu");
	205
	206	memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	207
	208	state->konami2 = devtag_get_device(machine, "konami2");
	209	state->k007121 = devtag_get_device(machine, "k007121");
	210	}
	211
206	212	static MACHINE_DRIVER_START( fastlane )
207	213
	214	/* driver data */
	215	MDRV_DRIVER_DATA(fastlane_state)
	216
208	217	/* basic machine hardware */
209	218	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)      /* 24MHz/8? */
210	219	MDRV_CPU_PROGRAM_MAP(fastlane_map)
211	220	MDRV_CPU_VBLANK_INT_HACK(fastlane_interrupt,16)   /* 1 IRQ + ??? NMI (generated by the 007121) */
212	221
	222	MDRV_MACHINE_START(fastlane)
	223
213	224	/* video hardware */
214	225	MDRV_SCREEN_ADD("screen", RASTER)
215	226	MDRV_SCREEN_REFRESH_RATE(60)
r6740	r6741
225	236	MDRV_VIDEO_START(fastlane)
226	237	MDRV_VIDEO_UPDATE(fastlane)
227	238
	239	MDRV_K007121_ADD("k007121")
	240	MDRV_K051733_ADD("k051733")
	241
228	242	/* sound hardware */
229	243	MDRV_SPEAKER_STANDARD_MONO("mono")
230	244
r6740	r6741
265	279	ROM_END
266	280
267	281
268		GAME( 1987, fastlane, 0, fastlane, fastlane, 0, ROT90, "Konami", "Fast Lane", GAME_IMPERFECT_COLORS )
	282	GAME( 1987, fastlane, 0, fastlane, fastlane, 0, ROT90, "Konami", "Fast Lane", GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE )

src/mame/drivers/cidelsa.c

r6740	r6741
4	4	#include "sound/cdp1869.h"
5	5	#include "sound/ay8910.h"
6	6	#include "machine/cdp1852.h"
7		#include "cidelsa.h"
	7	#include "includes/cidelsa.h"
8	8
9	9	/* CDP1802 Interface */
10	10

src/mame/drivers/vendetta.c

r6740	r6741
88	88
89	89	#include "driver.h"
90	90	#include "cpu/z80/z80.h"
91		#include "video/konamiic.h"
	91	#include "video/konicdev.h"
92	92	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
93		#include "machine/eeprom.h"
	93	#include "machine/eepromdev.h"
94	94	#include "sound/2151intf.h"
95	95	#include "sound/k053260.h"
96		#include "konamipt.h"
	96	#include "includes/konamipt.h"
97	97
98	98	/* prototypes */
99	99	static MACHINE_RESET( vendetta );
100	100	static KONAMI_SETLINES_CALLBACK( vendetta_banking );
101	101	static void vendetta_video_banking( running_machine *machine, int select );
102	102
103		VIDEO_START( vendetta );
104		VIDEO_START( esckids );
105	103	VIDEO_UPDATE( vendetta );
106	104
	105	extern void vendetta_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	106	extern void esckids_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	107	extern void vendetta_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
107	108
	109
108	110	/***************************************************************************
109	111
110	112	EEPROM
111	113
112	114	***************************************************************************/
113	115
114		static int init_eeprom_count;
115
116
117	116	static const eeprom_interface eeprom_intf =
118	117	{
119	118	7,            /* address bits */
r6740	r6741
125	124	"0100110000000" /* unlock command */
126	125	};
127	126
128		static NVRAM_HANDLER( vendetta )
129		{
130		if (read_or_write)
131		eeprom_save(file);
132		else
133		{
134		eeprom_init(machine, &eeprom_intf);
135	127
136		if (file)
137		{
138		init_eeprom_count = 0;
139		eeprom_load(file);
140		}
141		else
142		init_eeprom_count = 1000;
143		}
144		}
145
146		static READ8_HANDLER( vendetta_eeprom_r )
147		{
148		int res = 0;
149
150		res |= 0x02;   //konami_eeprom_ack() << 5;     /* add the ack */
151
152		res |= input_port_read(space->machine, "EEPROM") & 0x0d;   /* test switch */
153
154		if (init_eeprom_count)
155		{
156		init_eeprom_count--;
157		res &= 0xfb;
158		}
159		return res;
160		}
161
162	128	static int irq_enabled;
163	129
164	130	static WRITE8_HANDLER( vendetta_eeprom_w )
r6740	r6741
176	142	return;
177	143
178	144	/* EEPROM */
179		eeprom_write_bit(data & 0x20);
180		eeprom_set_clock_line((data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
181		eeprom_set_cs_line((data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
	145	input_port_write(space->machine, "EEPROMOUT", data, 0xff);
182	146
183	147	irq_enabled = ( data >> 6 ) & 1;
184	148
r6740	r6741
189	153
190	154	static READ8_HANDLER( vendetta_K052109_r )
191	155	{
192		return K052109_r( space, offset + 0x2000 );
	156	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	157	return k052109_r(k052109, offset + 0x2000);
193	158	}
194		//static WRITE8_HANDLER( vendetta_K052109_w ) { K052109_w( machine, offset + 0x2000, data ); }
	159
195	160	static WRITE8_HANDLER( vendetta_K052109_w )
196	161	{
	162	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	163
197	164	// *************************************************************************************
198	165	// *  Escape Kids uses 052109's mirrored Tilemap ROM bank selector, but only during    *
199	166	// *  Tilemap MASK-ROM Test       (0x1d80<->0x3d80, 0x1e00<->0x3e00, 0x1f00<->0x3f00)  *
200	167	// *************************************************************************************
201	168	if ( ( offset == 0x1d80 ) || ( offset == 0x1e00 ) || ( offset == 0x1f00 ) )
202		K052109_w( space, offset, data );
203		K052109_w( space, offset + 0x2000, data );
	169	k052109_w(k052109, offset, data);
	170	k052109_w(k052109, offset + 0x2000, data);
204	171	}
205	172
206	173	static offs_t video_banking_base;
207	174
208	175	static void vendetta_video_banking( running_machine *machine, int select )
209	176	{
	177	const device_config *k052109 = devtag_get_device(machine, "k052109");
	178	const device_config *k053246 = devtag_get_device(machine, "k053246");
	179	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	180
210	181	if ( select & 1 )
211	182	{
212		memory_install_read_bank(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, "bank4" );
213		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, paletteram_xBBBBBGGGGGRRRRR_be_w );
214		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x0000, video_banking_base + 0x0fff, 0, 0, K053247_r, K053247_w );
	183	memory_install_read_bank(space, video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, "bank4" );
	184	memory_install_write8_handler(space, video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, paletteram_xBBBBBGGGGGRRRRR_be_w );
	185	memory_install_readwrite8_device_handler(space, k053246, video_banking_base + 0x0000, video_banking_base + 0x0fff, 0, 0, k053247_r, k053247_w );
215	186	memory_set_bankptr(machine, "bank4", machine->generic.paletteram.v);
216	187	}
217	188	else
218	189	{
219		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, vendetta_K052109_r, vendetta_K052109_w );
220		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x0000, video_banking_base + 0x0fff, 0, 0, K052109_r, K052109_w );
	190	memory_install_readwrite8_handler(space, video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, vendetta_K052109_r, vendetta_K052109_w );
	191	memory_install_readwrite8_device_handler(space, k052109, video_banking_base + 0x0000, video_banking_base + 0x0fff, 0, 0, k052109_r, k052109_w );
221	192	}
222	193	}
223	194
224	195	static WRITE8_HANDLER( vendetta_5fe0_w )
225	196	{
	197	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	198	const device_config *k053246 = devtag_get_device(space->machine, "k053246");
	199
226	200	/* bit 0,1 coin counters */
227		coin_counter_w(space->machine, 0,data & 0x01);
228		coin_counter_w(space->machine, 1,data & 0x02);
	201	coin_counter_w(space->machine, 0, data & 0x01);
	202	coin_counter_w(space->machine, 1, data & 0x02);
229	203
230	204	/* bit 2 = BRAMBK ?? */
231	205
232	206	/* bit 3 = enable char ROM reading through the video RAM */
233		K052109_set_RMRD_line((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	207	k052109_set_rmrd_line(k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
234	208
235	209	/* bit 4 = INIT ?? */
236	210
237	211	/* bit 5 = enable sprite ROM reading */
238		K053246_set_OBJCHA_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
	212	k053246_set_objcha_line(k053246, (data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
239	213	}
240	214
241	215	static TIMER_CALLBACK( z80_nmi_callback )
r6740	r6741
247	221	{
248	222	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE );
249	223
250		timer_set( space->machine, ATTOTIME_IN_USEC( 25 ), NULL, 0, z80_nmi_callback );
	224	timer_set(space->machine, ATTOTIME_IN_USEC(25), NULL, 0, z80_nmi_callback);
251	225	}
252	226
253	227	static WRITE8_HANDLER( z80_irq_w )
r6740	r6741
271	245	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
272	246	AM_RANGE(0x0000, 0x1fff) AM_ROMBANK("bank1")
273	247	AM_RANGE(0x2000, 0x3fff) AM_RAM
274		AM_RANGE(0x5f80, 0x5f9f) AM_READWRITE(K054000_r, K054000_w)
275		AM_RANGE(0x5fa0, 0x5faf) AM_WRITE(K053251_w)
276		AM_RANGE(0x5fb0, 0x5fb7) AM_WRITE(K053246_w)
	248	AM_RANGE(0x5f80, 0x5f9f) AM_DEVREADWRITE("k054000", k054000_r, k054000_w)
	249	AM_RANGE(0x5fa0, 0x5faf) AM_DEVWRITE("k053251", k053251_w)
	250	AM_RANGE(0x5fb0, 0x5fb7) AM_DEVWRITE("k053246", k053246_w)
277	251	AM_RANGE(0x5fc0, 0x5fc0) AM_READ_PORT("P1")
278	252	AM_RANGE(0x5fc1, 0x5fc1) AM_READ_PORT("P2")
279	253	AM_RANGE(0x5fc2, 0x5fc2) AM_READ_PORT("P3")
280	254	AM_RANGE(0x5fc3, 0x5fc3) AM_READ_PORT("P4")
281		AM_RANGE(0x5fd0, 0x5fd0) AM_READ(vendetta_eeprom_r) /* vblank, service */
	255	AM_RANGE(0x5fd0, 0x5fd0) AM_READ_PORT("EEPROM")
282	256	AM_RANGE(0x5fd1, 0x5fd1) AM_READ_PORT("SERVICE")
283	257	AM_RANGE(0x5fe0, 0x5fe0) AM_WRITE(vendetta_5fe0_w)
284	258	AM_RANGE(0x5fe2, 0x5fe2) AM_WRITE(vendetta_eeprom_w)
285	259	AM_RANGE(0x5fe4, 0x5fe4) AM_READWRITE(vendetta_sound_interrupt_r, z80_irq_w)
286	260	AM_RANGE(0x5fe6, 0x5fe7) AM_DEVREADWRITE("konami", vendetta_sound_r, k053260_w)
287		AM_RANGE(0x5fe8, 0x5fe9) AM_READ(K053246_r)
	261	AM_RANGE(0x5fe8, 0x5fe9) AM_DEVREAD("k053246", k053246_r)
288	262	AM_RANGE(0x5fea, 0x5fea) AM_READ(watchdog_reset_r)
289	263	/* what is the desired effect of overlapping these memory regions anyway? */
290	264	AM_RANGE(0x4000, 0x4fff) AM_RAMBANK("bank3")
291	265	AM_RANGE(0x6000, 0x6fff) AM_RAMBANK("bank2")
292		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(K052109_r, K052109_w)
	266	AM_RANGE(0x4000, 0x7fff) AM_DEVREADWRITE("k052109", k052109_r, k052109_w)
293	267	AM_RANGE(0x8000, 0xffff) AM_ROM
294	268	ADDRESS_MAP_END
295	269
r6740	r6741
299	273	AM_RANGE(0x3f81, 0x3f81) AM_READ_PORT("P2")
300	274	AM_RANGE(0x3f82, 0x3f82) AM_READ_PORT("P3")            // ???  (But not used)
301	275	AM_RANGE(0x3f83, 0x3f83) AM_READ_PORT("P4")            // ???  (But not used)
302		AM_RANGE(0x3f92, 0x3f92) AM_READ(vendetta_eeprom_r)      // vblank, TEST SW on PCB
	276	AM_RANGE(0x3f92, 0x3f92) AM_READ_PORT("EEPROM")
303	277	AM_RANGE(0x3f93, 0x3f93) AM_READ_PORT("SERVICE")
304		AM_RANGE(0x3fa0, 0x3fa7) AM_WRITE(K053246_w)         // 053246 (Sprite)
305		AM_RANGE(0x3fb0, 0x3fbf) AM_WRITE(K053251_w)         // 053251 (Priority Encoder)
	278	AM_RANGE(0x3fa0, 0x3fa7) AM_DEVWRITE("k053246", k053246_w)         // 053246 (Sprite)
	279	AM_RANGE(0x3fb0, 0x3fbf) AM_DEVWRITE("k053251", k053251_w)         // 053251 (Priority Encoder)
306	280	AM_RANGE(0x3fc0, 0x3fcf) AM_WRITENOP            // Not Emulated (053252 ???)
307	281	AM_RANGE(0x3fd0, 0x3fd0) AM_WRITE(vendetta_5fe0_w)      // Coin Counter, 052109 RMRD, 053246 OBJCHA
308	282	AM_RANGE(0x3fd2, 0x3fd2) AM_WRITE(vendetta_eeprom_w)   // EEPROM, Video banking
309	283	AM_RANGE(0x3fd4, 0x3fd4) AM_READWRITE(vendetta_sound_interrupt_r, z80_irq_w)         // Sound
310	284	AM_RANGE(0x3fd6, 0x3fd7) AM_DEVREADWRITE("konami", vendetta_sound_r, k053260_w)      // Sound
311		AM_RANGE(0x3fd8, 0x3fd9) AM_READ(K053246_r)            // 053246 (Sprite)
	285	AM_RANGE(0x3fd8, 0x3fd9) AM_DEVREAD("k053246", k053246_r)            // 053246 (Sprite)
312	286	AM_RANGE(0x3fda, 0x3fda) AM_WRITENOP            // Not Emulated (Watchdog ???)
313	287	/* what is the desired effect of overlapping these memory regions anyway? */
314	288	AM_RANGE(0x2000, 0x2fff) AM_RAMBANK("bank3")               // 052109 (Tilemap) 0x0000-0x0fff
315	289	AM_RANGE(0x4000, 0x4fff) AM_RAMBANK("bank2")               // 052109 (Tilemap) 0x2000-0x3fff, Tilemap MASK-ROM bank selector (MASK-ROM Test)
316		AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_r, K052109_w)         // 052109 (Tilemap)
	290	AM_RANGE(0x2000, 0x5fff) AM_DEVREADWRITE("k052109", k052109_r, k052109_w)         // 052109 (Tilemap)
317	291	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")               // 053248 '975r01' 1M ROM (Banked)
318	292	AM_RANGE(0x8000, 0xffff) AM_ROM                     // 053248 '975r01' 1M ROM (0x18000-0x1ffff)
319	293	ADDRESS_MAP_END
r6740	r6741
358	332	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
359	333
360	334	PORT_START("EEPROM")
361		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	335	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
362	336	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* EEPROM ready */
363	337	PORT_SERVICE_NO_TOGGLE(0x04, IP_ACTIVE_LOW)
364	338	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK ) /* not really vblank, object related. Its timed, otherwise sprites flicker */
365	339	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
	340
	341	PORT_START( "EEPROMOUT" )
	342	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	343	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	344	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
366	345	INPUT_PORTS_END
367	346
368	347	static INPUT_PORTS_START( vendetta )
r6740	r6741
409	388	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
410	389
411	390	PORT_START("EEPROM")
412		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_CUSTOM(eeprom_bit_r, NULL)   /* EEPROM data */
	391	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_READ_LINE_DEVICE("eeprom", eepromdev_read_bit)
413	392	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* EEPROM ready */
414	393	PORT_SERVICE_NO_TOGGLE(0x04, IP_ACTIVE_LOW)
415	394	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK ) /* not really vblank, object related. Its timed, otherwise sprites flicker */
416	395	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
	396
	397	PORT_START( "EEPROMOUT" )
	398	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_cs_line)
	399	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_set_clock_line)
	400	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eepromdev_write_bit)
417	401	INPUT_PORTS_END
418	402
419	403	static INPUT_PORTS_START( esckidsj )
r6740	r6741
438	422	cpu_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE);
439	423	}
440	424
	425	static const k052109_interface vendetta_k052109_intf =
	426	{
	427	"gfx1", 0,
	428	NORMAL_PLANE_ORDER,
	429	KONAMI_ROM_DEINTERLEAVE_2,
	430	vendetta_tile_callback
	431	};
	432
	433	static const k052109_interface esckids_k052109_intf =
	434	{
	435	"gfx1", 0,
	436	NORMAL_PLANE_ORDER,
	437	KONAMI_ROM_DEINTERLEAVE_2,
	438	esckids_tile_callback
	439	};
	440
	441	static const k053247_interface vendetta_k053246_intf =
	442	{
	443	"screen",
	444	"gfx2", 1,
	445	NORMAL_PLANE_ORDER,
	446	53, 6,
	447	KONAMI_ROM_DEINTERLEAVE_4,
	448	vendetta_sprite_callback
	449	};
	450
	451	static const k053247_interface esckids_k053246_intf =
	452	{
	453	"screen",
	454	"gfx2", 1,
	455	NORMAL_PLANE_ORDER,
	456	101, 6,
	457	KONAMI_ROM_DEINTERLEAVE_4,
	458	vendetta_sprite_callback
	459	};
	460
441	461	static MACHINE_DRIVER_START( vendetta )
442	462
443	463	/* basic machine hardware */
r6740	r6741
451	471	/* interrupts are triggered by the main CPU */
452	472
453	473	MDRV_MACHINE_RESET(vendetta)
454		MDRV_NVRAM_HANDLER(vendetta)
455	474
	475	MDRV_EEPROM_NODEFAULT_ADD("eeprom", eeprom_intf)
	476
456	477	/* video hardware */
457	478	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
458	479
r6740	r6741
465	486
466	487	MDRV_PALETTE_LENGTH(2048)
467	488
468		MDRV_VIDEO_START(vendetta)
469	489	MDRV_VIDEO_UPDATE(vendetta)
470	490
	491	MDRV_K052109_ADD("k052109", vendetta_k052109_intf)
	492	MDRV_K053246_ADD("k053246", vendetta_k053246_intf)
	493	MDRV_K053251_ADD("k053251")
	494	MDRV_K054000_ADD("k054000")
	495
471	496	/* sound hardware */
472	497	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
473	498
r6740	r6741
492	517	//MDRV_SCREEN_VISIBLE_AREA(13*8, (64-13)*8-1, 2*8, 30*8-1 )    /* black areas on the edges */
493	518	MDRV_SCREEN_VISIBLE_AREA(14*8, (64-14)*8-1, 2*8, 30*8-1 )
494	519
495		MDRV_VIDEO_START(esckids)
496
	520	MDRV_DEVICE_REMOVE("k054000")
	521	MDRV_DEVICE_REMOVE("k052109")
	522	MDRV_K052109_ADD("k052109", esckids_k052109_intf)
	523	MDRV_DEVICE_REMOVE("k053246")
	524	MDRV_K053246_ADD("k053246", esckids_k053246_intf)
497	525	MACHINE_DRIVER_END
498	526
499	527
r6740	r6741
716	744	static DRIVER_INIT( vendetta )
717	745	{
718	746	video_banking_base = 0x4000;
719		konami_rom_deinterleave_2(machine, "gfx1");
720		konami_rom_deinterleave_4(machine, "gfx2");
721	747	}
722	748
723	749	static DRIVER_INIT( esckids )
724	750	{
725	751	video_banking_base = 0x2000;
726		konami_rom_deinterleave_2(machine, "gfx1");
727		konami_rom_deinterleave_4(machine, "gfx2");
728	752	}
729	753
730	754

src/mame/drivers/segas16b.c

r6740	r6741
871	871	#include "cpu/z80/z80.h"
872	872	#include "cpu/m68000/m68000.h"
873	873	#include "cpu/mcs51/mcs51.h"
874		#include "system16.h"
	874	#include "includes/system16.h"
875	875	#include "machine/segaic16.h"
876	876	#include "machine/fd1089.h"
877	877	#include "machine/fd1094.h"
r6740	r6741
909	909	static UINT16 *workram;
910	910
911	911	static UINT8 rom_board;
912		static int atomicp_sound_rate;
	912	static UINT8 atomicp_sound_divisor;
	913	static UINT8 atomicp_sound_count;
913	914
914	915	static UINT8 has_sound_cpu;
915	916
r6740	r6741
1112	1113	}
1113	1114
1114	1115
1115		static TIMER_CALLBACK( atomicp_sound_irq )
	1116	static TIMER_DEVICE_CALLBACK( atomicp_sound_irq )
1116	1117	{
1117		cputag_set_input_line(machine, "maincpu", 2, HOLD_LINE);
	1118	if (++atomicp_sound_count >= atomicp_sound_divisor)
	1119	{
	1120	cputag_set_input_line(timer->machine, "maincpu", 2, HOLD_LINE);
	1121	atomicp_sound_count = 0;
	1122	}
1118	1123	}
1119	1124
1120	1125
1121		static MACHINE_RESET( atomicp )
1122		{
1123		MACHINE_RESET_CALL(system16b);
1124		timer_pulse(machine, ATTOTIME_IN_HZ(atomicp_sound_rate), NULL, 0, atomicp_sound_irq);
1125		}
1126	1126
1127
1128
1129	1127	/*************************************
1130	1128	*
1131	1129	*  I/O space
r6740	r6741
1556	1554	*
1557	1555	*************************************/
1558	1556
	1557	static MACHINE_START( atomicp )
	1558	{
	1559	state_save_register_global(machine, atomicp_sound_count);
	1560	}
	1561
	1562
1559	1563	static WRITE16_HANDLER( atomicp_sound_w )
1560	1564	{
1561	1565	ym2413_w(devtag_get_device(space->machine, "ymsnd"), offset, data >> 8);
r6740	r6741
3296	3300
3297	3301	/* basic machine hardware */
3298	3302	MDRV_DEVICE_REMOVE("soundcpu")
3299		MDRV_MACHINE_RESET(atomicp)
3300	3303
	3304	MDRV_MACHINE_START(atomicp)
	3305	MDRV_TIMER_ADD_PERIODIC("atomicp_timer", atomicp_sound_irq, HZ(10000))
	3306
3301	3307	/* sound hardware */
3302	3308	MDRV_SOUND_REPLACE("ymsnd", YM2413, XTAL_20MHz/4) /* 20MHz OSC divided by 4 (verified) */
3303	3309	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
r6740	r6741
6356	6362	system16b_generic_init(machine, ROM_BOARD_ATOMICP);
6357	6363	disable_screen_blanking = 1;
6358	6364	segaic16_display_enable = 1;
6359		atomicp_sound_rate = 10000;
	6365	atomicp_sound_divisor = 1;
6360	6366	}
6361	6367
6362	6368
r6740	r6741
6365	6371	system16b_generic_init(machine, ROM_BOARD_ATOMICP);
6366	6372	disable_screen_blanking = 1;
6367	6373	segaic16_display_enable = 1;
6368		atomicp_sound_rate = 2500;
	6374	atomicp_sound_divisor = 4;
6369	6375	}
6370	6376
6371	6377

src/mame/drivers/pktgaldx.c

r6740	r6741
54	54
55	55	#include "driver.h"
56	56	#include "cpu/m68000/m68000.h"
57		#include "decocrpt.h"
58		#include "decoprot.h"
59		#include "deco16ic.h"
	57	#include "includes/decocrpt.h"
	58	#include "includes/decoprot.h"
	59	#include "includes/deco16ic.h"
60	60	#include "sound/okim6295.h"
61	61
62	62	VIDEO_START(pktgaldx);

src/mame/drivers/atarigx2.c

r6740	r6741
23	23	#include "cpu/m68000/m68000.h"
24	24	#include "audio/atarijsa.h"
25	25	#include "video/atarirle.h"
26		#include "atarigx2.h"
	26	#include "includes/atarigx2.h"
27	27
28	28
29	29
r6740	r6741
41	41	}
42	42
43	43
	44	static MACHINE_START( atarigx2 )
	45	{
	46	atarigen_init(machine);
	47	}
	48
	49
44	50	static MACHINE_RESET( atarigx2 )
45	51	{
46	52	atarigx2_state *state = (atarigx2_state *)machine->driver_data;
r6740	r6741
1392	1398	MDRV_CPU_PROGRAM_MAP(main_map)
1393	1399	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
1394	1400
	1401	MDRV_MACHINE_START(atarigx2)
1395	1402	MDRV_MACHINE_RESET(atarigx2)
1396	1403	MDRV_NVRAM_HANDLER(atarigen)
1397	1404

src/mame/drivers/nwk-tr.c

r6740	r6741
217	217	#include "cpu/powerpc/ppc.h"
218	218	#include "cpu/sharc/sharc.h"
219	219	#include "machine/konppc.h"
220		#include "machine/konamiic.h"
221	220	#include "machine/adc1213x.h"
222	221	#include "sound/rf5c400.h"
223	222	#include "video/voodoo.h"
224	223	#include "machine/timekpr.h"
	224	#include "sound/k056800.h"
225	225
226	226	static UINT8 led_reg0, led_reg1;
227	227
r6740	r6741
894	894	AM_RANGE(0x7d000000, 0x7d00ffff) AM_READ(sysreg_r)
895	895	AM_RANGE(0x7d010000, 0x7d01ffff) AM_WRITE(sysreg_w)
896	896	AM_RANGE(0x7d020000, 0x7d021fff) AM_DEVREADWRITE8("m48t58", timekeeper_r, timekeeper_w, 0xffffffff)   /* M48T58Y RTC/NVRAM */
897		AM_RANGE(0x7d030000, 0x7d030007) AM_READ(K056800_host_r)
898		AM_RANGE(0x7d030000, 0x7d030007) AM_WRITE(K056800_host_w)
899		AM_RANGE(0x7d030008, 0x7d03000f) AM_WRITE(K056800_host_w)
	897	AM_RANGE(0x7d030000, 0x7d030007) AM_DEVREAD("k056800", k056800_host_r)
	898	AM_RANGE(0x7d030000, 0x7d030007) AM_DEVWRITE("k056800", k056800_host_w)
	899	AM_RANGE(0x7d030008, 0x7d03000f) AM_DEVWRITE("k056800", k056800_host_w)
900	900	AM_RANGE(0x7d040000, 0x7d04ffff) AM_READWRITE(lanc1_r, lanc1_w)
901	901	AM_RANGE(0x7d050000, 0x7d05ffff) AM_READWRITE(lanc2_r, lanc2_w)
902	902	AM_RANGE(0x7e000000, 0x7e7fffff) AM_ROM AM_REGION("user2", 0)   /* Data ROM */
r6740	r6741
910	910	AM_RANGE(0x000000, 0x07ffff) AM_ROM
911	911	AM_RANGE(0x100000, 0x10ffff) AM_RAM      /* Work RAM */
912	912	AM_RANGE(0x200000, 0x200fff) AM_DEVREADWRITE("rfsnd", rf5c400_r, rf5c400_w)      /* Ricoh RF5C400 */
913		AM_RANGE(0x300000, 0x30000f) AM_READWRITE(K056800_sound_r, K056800_sound_w)
	913	AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("k056800", k056800_sound_r, k056800_sound_w)
914	914	AM_RANGE(0x600000, 0x600001) AM_NOP
915	915	ADDRESS_MAP_END
916	916
r6740	r6741
1029	1029	adc12138_input_callback
1030	1030	};
1031	1031
	1032	static void sound_irq_callback(running_machine *machine, int irq)
	1033	{
	1034	if (irq == 0)
	1035	generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ1);
	1036	else
	1037	generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ2);
	1038	}
1032	1039
	1040	static const k056800_interface nwktr_k056800_interface =
	1041	{
	1042	sound_irq_callback
	1043	};
	1044
1033	1045	static MACHINE_RESET( nwktr )
1034	1046	{
1035	1047	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
r6740	r6741
1071	1083	MDRV_VIDEO_START(nwktr)
1072	1084	MDRV_VIDEO_UPDATE(nwktr)
1073	1085
	1086	MDRV_K056800_ADD("k056800", nwktr_k056800_interface)
	1087
1074	1088	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
1075	1089
1076	1090	MDRV_SOUND_ADD("rfsnd", RF5C400, 16934400)   // as per Guru readme above
r6740	r6741
1084	1098
1085	1099	/*****************************************************************************/
1086	1100
1087		static void sound_irq_callback(running_machine *machine, int irq)
1088		{
1089		if (irq == 0)
1090		generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ1);
1091		else
1092		generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ2);
1093		}
1094
1095	1101	static DRIVER_INIT(nwktr)
1096	1102	{
1097	1103	init_konami_cgboard(machine, 1, CGBOARD_TYPE_NWKTR);
r6740	r6741
1100	1106	sharc_dataram = auto_alloc_array(machine, UINT32, 0x100000/4);
1101	1107	led_reg0 = led_reg1 = 0x7f;
1102	1108
1103		K056800_init(machine, sound_irq_callback);
1104	1109	K033906_init(machine);
1105	1110
1106	1111	lanc2_init(machine);

src/mame/drivers/circus.c

r6740	r6741
37	37	#include "cpu/m6502/m6502.h"
38	38	#include "deprecat.h"
39	39	#include "sound/samples.h"
40		#include "circus.h"
	40	#include "includes/circus.h"
41	41
42	42	#include "circus.lh"
43	43	#include "crash.lh"

src/mame/drivers/relief.c

r6740	r6741
20	20	#include "driver.h"
21	21	#include "cpu/m68000/m68000.h"
22	22	#include "machine/atarigen.h"
23		#include "relief.h"
	23	#include "includes/relief.h"
24	24	#include "sound/okim6295.h"
25	25	#include "sound/2413intf.h"
26	26
r6740	r6741
64	64	*
65	65	*************************************/
66	66
	67	static MACHINE_START( relief )
	68	{
	69	atarigen_init(machine);
	70	}
	71
	72
67	73	static MACHINE_RESET( relief )
68	74	{
69	75	relief_state *state = (relief_state *)machine->driver_data;
r6740	r6741
293	299	MDRV_CPU_ADD("maincpu", M68000, ATARI_CLOCK_14MHz/2)
294	300	MDRV_CPU_PROGRAM_MAP(main_map)
295	301
	302	MDRV_MACHINE_START(relief)
296	303	MDRV_MACHINE_RESET(relief)
297	304	MDRV_NVRAM_HANDLER(atarigen)
298	305

src/mame/drivers/taito_f3.c

r6740	r6741
38	38	#include "driver.h"
39	39	#include "cpu/m68000/m68000.h"
40	40	#include "machine/eepromdev.h"
41		#include "taito_f3.h"
	41	#include "includes/taito_f3.h"
42	42	#include "sound/es5506.h"
43	43	#include "audio/taito_en.h"
44	44	#include "sound/okim6295.h"
r6740	r6741
369	369
370	370	static MACHINE_RESET( f3 )
371	371	{
372		taito_f3_soundsystem_reset(machine);
373	372	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
374
375		f3_68681_reset(machine);
376	373	}
377	374
378	375
r6740	r6741
399	396	MDRV_CPU_PROGRAM_MAP(f3_map)
400	397	MDRV_CPU_VBLANK_INT("screen", f3_interrupt2)
401	398
402		TAITO_F3_SOUND_SYSTEM_CPU(16000000)
403
404	399	MDRV_MACHINE_START(f3)
405	400	MDRV_MACHINE_RESET(f3)
406	401
r6740	r6741
422	417	MDRV_VIDEO_UPDATE(f3)
423	418
424	419	/* sound hardware */
425		TAITO_F3_SOUND_SYSTEM_ES5505(30476100/2)
	420	MDRV_IMPORT_FROM(taito_f3_sound)
426	421	MACHINE_DRIVER_END
427	422
428	423	/* These games reprogram the video output registers to display different scanlines,

src/mame/drivers/champbas.c

r6740	r6741
85	85	#include "cpu/alph8201/alph8201.h"
86	86	#include "sound/ay8910.h"
87	87	#include "sound/dac.h"
88		#include "champbas.h"
	88	#include "includes/champbas.h"
89	89
90	90
91	91	/*************************************

src/mame/drivers/ssozumo.c

r6740	r6741
13	13	#include "sound/ay8910.h"
14	14	#include "sound/dac.h"
15	15
	16	extern UINT8 *ssozumo_videoram;
	17	extern UINT8 *ssozumo_colorram;
16	18	extern UINT8 *ssozumo_videoram2;
17	19	extern UINT8 *ssozumo_colorram2;
18	20
r6740	r6741
40	42	AM_RANGE(0x0780, 0x07ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
41	43	AM_RANGE(0x2000, 0x23ff) AM_RAM_WRITE(ssozumo_videoram2_w) AM_BASE(&ssozumo_videoram2)
42	44	AM_RANGE(0x2400, 0x27ff) AM_RAM_WRITE(ssozumo_colorram2_w) AM_BASE(&ssozumo_colorram2)
43		AM_RANGE(0x3000, 0x31ff) AM_RAM_WRITE(ssozumo_videoram_w) AM_BASE_GENERIC(videoram)
44		AM_RANGE(0x3200, 0x33ff) AM_RAM_WRITE(ssozumo_colorram_w) AM_BASE_GENERIC(colorram)
	45	AM_RANGE(0x3000, 0x31ff) AM_RAM_WRITE(ssozumo_videoram_w) AM_BASE(&ssozumo_videoram)
	46	AM_RANGE(0x3200, 0x33ff) AM_RAM_WRITE(ssozumo_colorram_w) AM_BASE(&ssozumo_colorram)
45	47	AM_RANGE(0x3400, 0x35ff) AM_RAM
46	48	AM_RANGE(0x3600, 0x37ff) AM_RAM
47	49	AM_RANGE(0x4000, 0x4000) AM_READ_PORT("P1") AM_WRITE(ssozumo_flipscreen_w)

src/mame/drivers/m107.c

r6740	r6741
25	25
26	26	#include "driver.h"
27	27	#include "cpu/nec/nec.h"
28		#include "m107.h"
29		#include "iremipt.h"
	28	#include "includes/m107.h"
	29	#include "includes/iremipt.h"
30	30	#include "machine/irem_cpu.h"
31	31	#include "sound/2151intf.h"
32	32	#include "sound/iremga20.h"

src/mame/drivers/ninjaw.c

r6740	r6741
312	312
313	313	#include "driver.h"
314	314	#include "cpu/z80/z80.h"
315		#include "taitoipt.h"
	315	#include "includes/taitoipt.h"
316	316	#include "cpu/m68000/m68000.h"
317	317	#include "video/taitoic.h"
318	318	#include "audio/taitosnd.h"

src/mame/drivers/arkanoid.c

r6740	r6741
505	505
506	506	#include "driver.h"
507	507	#include "cpu/z80/z80.h"
508		#include "arkanoid.h"
	508	#include "includes/arkanoid.h"
509	509	#include "sound/ay8910.h"
510	510	#include "cpu/m6805/m6805.h"
511	511
r6740	r6741
1306	1306
1307	1307	memcpy(srcgfx, buffer, 0x18000);
1308	1308
	1309	free(buffer);
	1310
1309	1311	state->bootleg_id = BLOCK2;
1310	1312	arkanoid_bootleg_init(machine);
1311	1313	}

src/mame/drivers/twin16.c

r6740	r6741
50	50	#include "sound/k007232.h"
51	51	#include "sound/upd7759.h"
52	52	#include "includes/twin16.h"
53		#include "konamipt.h"
	53	#include "includes/konamipt.h"
54	54
55	55	UINT16 twin16_custom_video;
56	56	UINT16 *twin16_gfx_rom;

src/mame/drivers/megasys1.c

r6740	r6741
123	123	#include "cpu/z80/z80.h"
124	124	#include "cpu/m68000/m68000.h"
125	125	#include "deprecat.h"
126		#include "megasys1.h"
	126	#include "includes/megasys1.h"
127	127	#include "sound/2203intf.h"
128	128	#include "sound/2151intf.h"
129	129	#include "sound/okim6295.h"

src/mame/drivers/crshrace.c

r6740	r6741
129	129	#include "driver.h"
130	130	#include "cpu/z80/z80.h"
131	131	#include "cpu/m68000/m68000.h"
132		#include "video/konamiic.h"
133	132	#include "sound/2610intf.h"
134		#include "crshrace.h"
	133	#include "video/konicdev.h"
	134	#include "includes/crshrace.h"
135	135
136	136
137	137	#define CRSHRACE_3P_HACK   0
r6740	r6741
143	143
144	144	offset *= 2;
145	145
146		return rom[offset] | (rom[offset+1] << 8);
	146	return rom[offset] | (rom[offset + 1] << 8);
147	147	}
148	148
149	149	static READ16_HANDLER( extrarom2_r )
r6740	r6741
152	152
153	153	offset *= 2;
154	154
155		return rom[offset] | (rom[offset+1] << 8);
	155	return rom[offset] | (rom[offset + 1] << 8);
156	156	}
157	157
158	158	static WRITE8_HANDLER( crshrace_sh_bankswitch_w )
r6740	r6741
163	163	}
164	164
165	165
166		static int pending_command;
167
168	166	static WRITE16_HANDLER( sound_command_w )
169	167	{
	168	crshrace_state *state = (crshrace_state *)space->machine->driver_data;
	169
170	170	if (ACCESSING_BITS_0_7)
171	171	{
172		pending_command = 1;
173		soundlatch_w(space,offset,data & 0xff);
174		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
	172	state->pending_command = 1;
	173	soundlatch_w(space, offset, data & 0xff);
	174	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE);
175	175	}
176	176	}
177	177
178	178	static CUSTOM_INPUT( country_sndpending_r )
179	179	{
180		return pending_command;
	180	crshrace_state *state = (crshrace_state *)field->port->machine->driver_data;
	181	return state->pending_command;
181	182	}
182	183
183	184	static WRITE8_HANDLER( pending_command_clear_w )
184	185	{
185		pending_command = 0;
	186	crshrace_state *state = (crshrace_state *)space->machine->driver_data;
	187	state->pending_command = 0;
186	188	}
187	189
188	190
r6740	r6741
193	195	AM_RANGE(0x400000, 0x4fffff) AM_READ(extrarom2_r)
194	196	AM_RANGE(0x500000, 0x5fffff) AM_READ(extrarom2_r)   /* mirror */
195	197	AM_RANGE(0xa00000, 0xa0ffff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram2)
196		AM_RANGE(0xd00000, 0xd01fff) AM_RAM_WRITE(crshrace_videoram1_w) AM_BASE(&crshrace_videoram1)
	198	AM_RANGE(0xd00000, 0xd01fff) AM_RAM_WRITE(crshrace_videoram1_w) AM_BASE_MEMBER(crshrace_state, videoram1)
197	199	AM_RANGE(0xe00000, 0xe01fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
198	200	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM
199	201	AM_RANGE(0xffc000, 0xffc001) AM_WRITE(crshrace_roz_bank_w)
200		AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(crshrace_videoram2_w) AM_BASE(&crshrace_videoram2)
	202	AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(crshrace_videoram2_w) AM_BASE_MEMBER(crshrace_state, videoram2)
201	203	AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram16_xGGGGGBBBBBRRRRR_word_w) AM_BASE_GENERIC(paletteram)
202	204	AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("P1") AM_WRITE(crshrace_gfxctrl_w)
203	205	AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("P2")
r6740	r6741
206	208	AM_RANGE(0xfff008, 0xfff009) AM_WRITE(sound_command_w)
207	209	AM_RANGE(0xfff00a, 0xfff00b) AM_READ_PORT("DSW1")
208	210	AM_RANGE(0xfff00e, 0xfff00f) AM_READ_PORT("P3")
209		AM_RANGE(0xfff020, 0xfff03f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
	211	AM_RANGE(0xfff020, 0xfff03f) AM_DEVWRITE("k053936", k053936_ctrl_w)
210	212	AM_RANGE(0xfff044, 0xfff047) AM_WRITEONLY   // ??? moves during race
211	213	ADDRESS_MAP_END
212	214
r6740	r6741
426	428
427	429
428	430
429		static void irqhandler(const device_config *device, int irq)
	431	static void irqhandler( const device_config *device, int irq )
430	432	{
431		cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
	433	crshrace_state *state = (crshrace_state *)device->machine->driver_data;
	434	cpu_set_input_line(state->audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE);
432	435	}
433	436
434	437	static const ym2610_interface ym2610_config =
r6740	r6741
436	439	irqhandler
437	440	};
438	441
	442	static const k053936_interface crshrace_k053936_intf =
	443	{
	444	1, -48, -21   /* wrap, xoff, yoff */
	445	};
439	446
440	447
	448	static MACHINE_START( crshrace )
	449	{
	450	crshrace_state *state = (crshrace_state *)machine->driver_data;
	451
	452	state->audiocpu = devtag_get_device(machine, "audiocpu");
	453	state->k053936 = devtag_get_device(machine, "k053936");
	454
	455	state_save_register_global(machine, state->roz_bank);
	456	state_save_register_global(machine, state->gfxctrl);
	457	state_save_register_global(machine, state->flipscreen);
	458	state_save_register_global(machine, state->pending_command);
	459	}
	460
	461	static MACHINE_RESET( crshrace )
	462	{
	463	crshrace_state *state = (crshrace_state *)machine->driver_data;
	464
	465	state->roz_bank = 0;
	466	state->gfxctrl = 0;
	467	state->flipscreen = 0;
	468	state->pending_command = 0;
	469	}
	470
441	471	static MACHINE_DRIVER_START( crshrace )
442	472
	473	/* driver data */
	474	MDRV_DRIVER_DATA(crshrace_state)
	475
443	476	/* basic machine hardware */
444	477	MDRV_CPU_ADD("maincpu", M68000,16000000)   /* 16 MHz ??? */
445	478	MDRV_CPU_PROGRAM_MAP(crshrace_map)
r6740	r6741
449	482	MDRV_CPU_PROGRAM_MAP(sound_map)
450	483	MDRV_CPU_IO_MAP(sound_io_map)
451	484
	485	MDRV_MACHINE_START(crshrace)
	486	MDRV_MACHINE_RESET(crshrace)
	487
452	488	/* video hardware */
453	489	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
454	490
r6740	r6741
461	497	MDRV_GFXDECODE(crshrace)
462	498	MDRV_PALETTE_LENGTH(2048)
463	499
	500	MDRV_K053936_ADD("k053936", crshrace_k053936_intf)
	501
464	502	MDRV_VIDEO_START(crshrace)
465	503	MDRV_VIDEO_EOF(crshrace)
466	504	MDRV_VIDEO_UPDATE(crshrace)
r6740	r6741
547	585
548	586
549	587	#ifdef UNUSED_FUNCTION
550		void crshrace_patch_code(UINT16 offset)
	588	void crshrace_patch_code( UINT16 offset )
551	589	{
552	590	/* A hack which shows 3 player mode in code which is disabled */
553	591	UINT16 *RAM = (UINT16 *)memory_region(machine, "maincpu");
r6740	r6741
573	611	}
574	612
575	613
576		GAME( 1993, crshrace, 0,        crshrace, crshrace, crshrace, ROT270, "Video System Co.", "Lethal Crash Race (set 1)", GAME_NO_COCKTAIL )
577		GAME( 1993, crshrace2,crshrace, crshrace, crshrac2, crshrac2, ROT270, "Video System Co.", "Lethal Crash Race (set 2)", GAME_NO_COCKTAIL )
578
	614	GAME( 1993, crshrace, 0,        crshrace, crshrace, crshrace, ROT270, "Video System Co.", "Lethal Crash Race (set 1)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
	615	GAME( 1993, crshrace2,crshrace, crshrace, crshrac2, crshrac2, ROT270, "Video System Co.", "Lethal Crash Race (set 2)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )

src/mame/drivers/airbustr.c

r6740	r6741
223	223	#include "sound/2203intf.h"
224	224	#include "sound/okim6295.h"
225	225	#include "video/kan_pand.h"
	226	#include "includes/airbustr.h"
226	227
227		static UINT8 *devram;
228		static int soundlatch_status, soundlatch2_status;
229		static int master_addr;
230		static int slave_addr;
231
232		extern UINT8 *airbustr_videoram2, *airbustr_colorram2;
233
234		extern WRITE8_HANDLER( airbustr_videoram_w );
235		extern WRITE8_HANDLER( airbustr_colorram_w );
236		extern WRITE8_HANDLER( airbustr_videoram2_w );
237		extern WRITE8_HANDLER( airbustr_colorram2_w );
238		extern WRITE8_HANDLER( airbustr_scrollregs_w );
239		extern VIDEO_START( airbustr );
240		extern VIDEO_UPDATE( airbustr );
241		extern VIDEO_EOF( airbustr );
242
243	228	/* Read/Write Handlers */
244
245	229	static READ8_HANDLER( devram_r )
246	230	{
	231	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	232
247	233	// There's an MCU here, possibly
248
249	234	switch (offset)
250	235	{
251	236	/* Reading efe0 probably resets a watchdog mechanism
252	237	that would reset the main cpu. We avoid this and patch
253	238	the rom instead (main cpu has to be reset once at startup) */
254	239	case 0xfe0:
255		return watchdog_reset_r(space,0);
	240	return watchdog_reset_r(space, 0);
256	241
257	242	/* Reading a word at eff2 probably yelds the product
258	243	of the words written to eff0 and eff2 */
259	244	case 0xff2:
260	245	case 0xff3:
261	246	{
262		int   x = (devram[0xff0] + devram[0xff1] * 256) *
263		(devram[0xff2] + devram[0xff3] * 256);
264		if (offset == 0xff2)   return (x & 0x00FF) >> 0;
265		else            return (x & 0xFF00) >> 8;
	247	int   x = (state->devram[0xff0] + state->devram[0xff1] * 256) * (state->devram[0xff2] + state->devram[0xff3] * 256);
	248	if (offset == 0xff2)
	249	return (x & 0x00ff) >> 0;
	250	else
	251	return (x & 0xff00) >> 8;
266	252	}   break;
267	253
268	254	/* Reading eff4, F0 times must yield at most 80-1 consecutive
r6740	r6741
271	257	return mame_rand(space->machine);
272	258
273	259	default:
274		return devram[offset];
	260	return state->devram[offset];
275	261	}
276	262	}
277	263
278	264	static WRITE8_HANDLER( master_nmi_trigger_w )
279	265	{
280		cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, PULSE_LINE);
	266	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	267	cpu_set_input_line(state->slave, INPUT_LINE_NMI, PULSE_LINE);
281	268	}
282	269
283		static void airbustr_bankswitch(running_machine *machine, const char *cpu, const char *bank, int data)
284		{
285		UINT8 *ROM = memory_region(machine, cpu);
286
287		if ((data & 0x07) <  3)
288		ROM = &ROM[0x4000 * (data & 0x07)];
289		else
290		ROM = &ROM[0x10000 + 0x4000 * ((data & 0x07) - 3)];
291
292		memory_set_bankptr(machine, bank, ROM);
293		}
294
295	270	static WRITE8_HANDLER( master_bankswitch_w )
296	271	{
297		airbustr_bankswitch(space->machine, "master", "bank1", data);
	272	memory_set_bank(space->machine, "bank1", data & 0x07);
298	273	}
299	274
300	275	static WRITE8_HANDLER( slave_bankswitch_w )
301	276	{
302		const device_config *pandora = devtag_get_device(space->machine, "pandora");
303		airbustr_bankswitch(space->machine, "slave", "bank2", data);
	277	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
304	278
	279	memory_set_bank(space->machine, "bank2", data & 0x07);
	280
305	281	flip_screen_set(space->machine, data & 0x10);
306	282
307	283	// used at the end of levels, after defeating the boss, to leave trails
308		pandora_set_clear_bitmap(pandora, data&0x20);
	284	pandora_set_clear_bitmap(state->pandora, data & 0x20);
309	285	}
310	286
311	287	static WRITE8_HANDLER( sound_bankswitch_w )
312	288	{
313		airbustr_bankswitch(space->machine, "audiocpu", "bank3", data);
	289	memory_set_bank(space->machine, "bank3", data & 0x07);
314	290	}
315	291
316	292	static READ8_HANDLER( soundcommand_status_r )
317	293	{
	294	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	295
318	296	// bits: 2 <-> ?    1 <-> soundlatch full   0 <-> soundlatch2 empty
319		return 4 + soundlatch_status * 2 + (1 - soundlatch2_status);
	297	return 4 + state->soundlatch_status * 2 + (1 - state->soundlatch2_status);
320	298	}
321	299
322	300	static READ8_HANDLER( soundcommand_r )
323	301	{
324		soundlatch_status = 0;   // soundlatch has been read
325		return soundlatch_r(space,0);
	302	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	303	state->soundlatch_status = 0;   // soundlatch has been read
	304	return soundlatch_r(space, 0);
326	305	}
327	306
328	307	static READ8_HANDLER( soundcommand2_r )
329	308	{
330		soundlatch2_status = 0;   // soundlatch2 has been read
331		return soundlatch2_r(space,0);
	309	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
	310	state->soundlatch2_status = 0;   // soundlatch2 has been read
	311	return soundlatch2_r(space, 0);
332	312	}
333	313
334	314	static WRITE8_HANDLER( soundcommand_w )
335	315	{
	316	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
336	317	soundlatch_w(space, 0, data);
337		soundlatch_status = 1;   // soundlatch has been written
338		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);   // cause a nmi to sub cpu
	318	state->soundlatch_status = 1;   // soundlatch has been written
	319	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE);   // cause a nmi to sub cpu
339	320	}
340	321
341	322	static WRITE8_HANDLER( soundcommand2_w )
342	323	{
	324	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
343	325	soundlatch2_w(space, 0, data);
344		soundlatch2_status = 1;   // soundlatch2 has been written
	326	state->soundlatch2_status = 1;   // soundlatch2 has been written
345	327	}
346	328
347	329	static WRITE8_HANDLER( airbustr_paletteram_w )
348	330	{
	331	airbustr_state *state = (airbustr_state *)space->machine->driver_data;
349	332	int val;
350	333
351	334	/*  ! byte 1 ! ! byte 0 !   */
352	335	/*  xGGG GGRR   RRRB BBBB   */
353	336	/*  x432 1043   2104 3210   */
354	337
355		space->machine->generic.paletteram.u8[offset] = data;
356		val = (space->machine->generic.paletteram.u8[offset | 1] << 8) | space->machine->generic.paletteram.u8[offset & ~1];
	338	state->paletteram[offset] = data;
	339	val = (state->paletteram[offset | 1] << 8) | state->paletteram[offset & ~1];
357	340
358		palette_set_color_rgb(space->machine, offset/2, pal5bit(val >> 5), pal5bit(val >> 10), pal5bit(val >> 0));
	341	palette_set_color_rgb(space->machine, offset / 2, pal5bit(val >> 5), pal5bit(val >> 10), pal5bit(val >> 0));
359	342	}
360	343
361	344	static WRITE8_HANDLER( airbustr_coin_counter_w )
r6740	r6741
367	350	}
368	351
369	352	/* Memory Maps */
370
371	353	static ADDRESS_MAP_START( master_map, ADDRESS_SPACE_PROGRAM, 8 )
372	354	AM_RANGE(0x0000, 0x7fff) AM_ROM
373	355	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
374	356	AM_RANGE(0xc000, 0xcfff) AM_DEVREADWRITE("pandora", pandora_spriteram_r, pandora_spriteram_w)
375	357	AM_RANGE(0xd000, 0xdfff) AM_RAM
376		AM_RANGE(0xe000, 0xefff) AM_RAM AM_BASE(&devram) // shared with protection device
	358	AM_RANGE(0xe000, 0xefff) AM_RAM AM_BASE_MEMBER(airbustr_state, devram) // shared with protection device
377	359	AM_RANGE(0xf000, 0xffff) AM_RAM AM_SHARE("share1")
378	360	ADDRESS_MAP_END
379	361
r6740	r6741
387	369	static ADDRESS_MAP_START( slave_map, ADDRESS_SPACE_PROGRAM, 8 )
388	370	AM_RANGE(0x0000, 0x7fff) AM_ROM
389	371	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank2")
390		AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(airbustr_videoram2_w) AM_BASE(&airbustr_videoram2)
391		AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(airbustr_colorram2_w) AM_BASE(&airbustr_colorram2)
392		AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(airbustr_videoram_w) AM_BASE_GENERIC(videoram)
393		AM_RANGE(0xcc00, 0xcfff) AM_RAM_WRITE(airbustr_colorram_w) AM_BASE_GENERIC(colorram)
394		AM_RANGE(0xd000, 0xd5ff) AM_RAM_WRITE(airbustr_paletteram_w) AM_BASE_GENERIC(paletteram)
	372	AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(airbustr_videoram2_w) AM_BASE_MEMBER(airbustr_state, videoram2)
	373	AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(airbustr_colorram2_w) AM_BASE_MEMBER(airbustr_state, colorram2)
	374	AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(airbustr_videoram_w) AM_BASE_MEMBER(airbustr_state, videoram)
	375	AM_RANGE(0xcc00, 0xcfff) AM_RAM_WRITE(airbustr_colorram_w) AM_BASE_MEMBER(airbustr_state, colorram)
	376	AM_RANGE(0xd000, 0xd5ff) AM_RAM_WRITE(airbustr_paletteram_w) AM_BASE_MEMBER(airbustr_state, paletteram)
395	377	AM_RANGE(0xd600, 0xdfff) AM_RAM
396	378	AM_RANGE(0xe000, 0xefff) AM_RAM
397	379	AM_RANGE(0xf000, 0xffff) AM_RAM AM_SHARE("share1")
r6740	r6741
577	559
578	560	static INTERRUPT_GEN( master_interrupt )
579	561	{
580		master_addr ^= 0x02;
581		cpu_set_input_line_and_vector(device, 0, HOLD_LINE, master_addr);
	562	airbustr_state *state = (airbustr_state *)device->machine->driver_data;
	563	state->master_addr ^= 0x02;
	564	cpu_set_input_line_and_vector(device, 0, HOLD_LINE, state->master_addr);
582	565	}
583	566
584	567	static INTERRUPT_GEN( slave_interrupt )
585	568	{
586		slave_addr ^= 0x02;
587		cpu_set_input_line_and_vector(device, 0, HOLD_LINE, slave_addr);
	569	airbustr_state *state = (airbustr_state *)device->machine->driver_data;
	570	state->slave_addr ^= 0x02;
	571	cpu_set_input_line_and_vector(device, 0, HOLD_LINE, state->slave_addr);
588	572	}
589	573
590	574	/* Machine Initialization */
591	575
592	576	static MACHINE_START( airbustr )
593	577	{
594		state_save_register_global(machine, soundlatch_status);
595		state_save_register_global(machine, soundlatch2_status);
596		state_save_register_global(machine, master_addr);
597		state_save_register_global(machine, slave_addr);
	578	airbustr_state *state = (airbustr_state *)machine->driver_data;
	579	UINT8 *MASTER = memory_region(machine, "master");
	580	UINT8 *SLAVE = memory_region(machine, "slave");
	581	UINT8 *AUDIO = memory_region(machine, "audiocpu");
	582
	583	memory_configure_bank(machine, "bank1", 0, 3, &MASTER[0x00000], 0x4000);
	584	memory_configure_bank(machine, "bank1", 3, 5, &MASTER[0x10000], 0x4000);
	585	memory_configure_bank(machine, "bank2", 0, 3, &SLAVE[0x00000], 0x4000);
	586	memory_configure_bank(machine, "bank2", 3, 5, &SLAVE[0x10000], 0x4000);
	587	memory_configure_bank(machine, "bank3", 0, 3, &AUDIO[0x00000], 0x4000);
	588	memory_configure_bank(machine, "bank3", 3, 5, &AUDIO[0x10000], 0x4000);
	589
	590	state->master = devtag_get_device(machine, "master");
	591	state->slave = devtag_get_device(machine, "slave");
	592	state->audiocpu = devtag_get_device(machine, "audiocpu");
	593	state->pandora = devtag_get_device(machine, "pandora");
	594
	595	state_save_register_global(machine, state->soundlatch_status);
	596	state_save_register_global(machine, state->soundlatch2_status);
	597	state_save_register_global(machine, state->master_addr);
	598	state_save_register_global(machine, state->slave_addr);
	599	state_save_register_global(machine, state->bg_scrollx);
	600	state_save_register_global(machine, state->bg_scrolly);
	601	state_save_register_global(machine, state->fg_scrollx);
	602	state_save_register_global(machine, state->fg_scrolly);
	603	state_save_register_global(machine, state->highbits);
598	604	}
599	605
600	606	static MACHINE_RESET( airbustr )
601	607	{
602		const address_space *space = cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM);
603		soundlatch_status = soundlatch2_status = 0;
604		master_addr = 0xff;
605		slave_addr = 0xfd;
606		master_bankswitch_w(space, 0, 0x02);
607		slave_bankswitch_w(space, 0, 0x02);
608		sound_bankswitch_w(space, 0, 0x02);
	608	airbustr_state *state = (airbustr_state *)machine->driver_data;
	609
	610	state->soundlatch_status = state->soundlatch2_status = 0;
	611	state->master_addr = 0xff;
	612	state->slave_addr = 0xfd;
	613	state->bg_scrollx = 0;
	614	state->bg_scrolly = 0;
	615	state->fg_scrollx = 0;
	616	state->fg_scrolly = 0;
	617	state->highbits = 0;
	618
	619	memory_set_bank(machine, "bank1", 0x02);
	620	memory_set_bank(machine, "bank2", 0x02);
	621	memory_set_bank(machine, "bank3", 0x02);
609	622	}
610	623
611	624	/* Machine Driver */
r6740	r6741
618	631	};
619	632
620	633	static MACHINE_DRIVER_START( airbustr )
621		// basic machine hardware
	634
	635	/* driver data */
	636	MDRV_DRIVER_DATA(airbustr_state)
	637
	638	/* basic machine hardware */
622	639	MDRV_CPU_ADD("master", Z80, 6000000)   // ???
623	640	MDRV_CPU_PROGRAM_MAP(master_map)
624	641	MDRV_CPU_IO_MAP(master_io_map)
r6740	r6741
640	657	MDRV_MACHINE_RESET(airbustr)
641	658	MDRV_WATCHDOG_TIME_INIT(SEC(3))   /* a guess, and certainly wrong */
642	659
643		// video hardware
	660	/* video hardware */
644	661	MDRV_SCREEN_ADD("screen", RASTER)
645	662	MDRV_SCREEN_REFRESH_RATE(60)
646	663	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
r6740	r6741
656	673	MDRV_VIDEO_UPDATE(airbustr)
657	674	MDRV_VIDEO_EOF(airbustr)
658	675
659		// sound hardware
	676	/* sound hardware */
660	677	MDRV_SPEAKER_STANDARD_MONO("mono")
661	678
662	679	MDRV_SOUND_ADD("ymsnd", YM2203, 3000000)

src/mame/drivers/pacman.c

r6740	r6741
339	339	#include "driver.h"
340	340	#include "cpu/z80/z80.h"
341	341	#include "deprecat.h"
342		#include "pacman.h"
	342	#include "includes/pacman.h"
343	343	#include "cpu/s2650/s2650.h"
344	344	#include "sound/namco.h"
345	345	#include "sound/ay8910.h"
r6740	r6741
892	892	static ADDRESS_MAP_START( pacman_map, ADDRESS_SPACE_PROGRAM, 8 )
893	893	//A lot of games don't have an a15 at the cpu.  Generally only games with a cpu daughter board can access the full 32k of romspace.
894	894	AM_RANGE(0x0000, 0x3fff) AM_MIRROR(0x8000) AM_ROM
895		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
896		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	895	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	896	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
897	897	AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
898	898	AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
899	899	AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
r6740	r6741
919	919
920	920
921	921	static ADDRESS_MAP_START( mspacman_map, ADDRESS_SPACE_PROGRAM, 8 )
922		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
923		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	922	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	923	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
924	924	AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
925	925	AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
926	926	AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
r6740	r6741
959	959
960	960	static ADDRESS_MAP_START( woodpek_map, ADDRESS_SPACE_PROGRAM, 8 )
961	961	AM_RANGE(0x0000, 0x3fff) AM_ROM
962		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
963		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	962	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	963	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
964	964	AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
965	965	AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
966	966	AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
r6740	r6741
986	986
987	987	static ADDRESS_MAP_START( alibaba_map, ADDRESS_SPACE_PROGRAM, 8 )
988	988	AM_RANGE(0x0000, 0x3fff) AM_ROM
989		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
990		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	989	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	990	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
991	991	AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
992	992	AM_RANGE(0x4c00, 0x4eef) AM_MIRROR(0xa000) AM_RAM
993	993	AM_RANGE(0x4ef0, 0x4eff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
r6740	r6741
1018	1018
1019	1019	static ADDRESS_MAP_START( dremshpr_map, ADDRESS_SPACE_PROGRAM, 8 )
1020	1020	AM_RANGE(0x0000, 0x3fff) AM_ROM
1021		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
1022		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	1021	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	1022	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
1023	1023	AM_RANGE(0x4800, 0x4fef) AM_MIRROR(0xa000) AM_RAM
1024	1024	AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
1025	1025	AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(interrupt_enable_w)
r6740	r6741
1044	1044
1045	1045	static ADDRESS_MAP_START( epos_map, ADDRESS_SPACE_PROGRAM, 8 )
1046	1046	AM_RANGE(0x0000, 0x3fff) AM_MIRROR(0x8000) AM_ROMBANK("bank1")
1047		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
1048		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	1047	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	1048	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
1049	1049	AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
1050	1050	AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
1051	1051	AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
r6740	r6741
1070	1070
1071	1071	static ADDRESS_MAP_START( vanvan_map, ADDRESS_SPACE_PROGRAM, 8 )
1072	1072	AM_RANGE(0x0000, 0x3fff) AM_ROM
1073		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
1074		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	1073	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	1074	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
1075	1075	AM_RANGE(0x4800, 0x4fef) AM_MIRROR(0xa000) AM_RAM
1076	1076	AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
1077	1077	AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(interrupt_enable_w)
r6740	r6741
1099	1099
1100	1100	static ADDRESS_MAP_START( s2650games_map, ADDRESS_SPACE_PROGRAM, 8 )
1101	1101	AM_RANGE(0x0000, 0x0fff) AM_MIRROR(0x8000) AM_ROMBANK("bank1")
1102		AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0xe000) AM_WRITE(s2650games_colorram_w) AM_BASE_GENERIC(colorram)
	1102	AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0xe000) AM_WRITE(s2650games_colorram_w) AM_BASE(&pacman_colorram)
1103	1103	AM_RANGE(0x1400, 0x141f) AM_MIRROR(0xe000) AM_WRITE(s2650games_scroll_w)
1104	1104	AM_RANGE(0x1420, 0x148f) AM_MIRROR(0xe000) AM_WRITEONLY
1105	1105	AM_RANGE(0x1490, 0x149f) AM_MIRROR(0xe000) AM_WRITEONLY AM_BASE(&s2650games_spriteram)
r6740	r6741
1118	1118	AM_RANGE(0x1500, 0x1500) AM_MIRROR(0xe000) AM_READ_PORT("IN0")
1119	1119	AM_RANGE(0x1540, 0x1540) AM_MIRROR(0xe000) AM_READ_PORT("IN1")
1120	1120	AM_RANGE(0x1580, 0x1580) AM_MIRROR(0xe000) AM_READ_PORT("DSW0")
1121		AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0xe000) AM_WRITE(s2650games_videoram_w) AM_BASE_GENERIC(videoram)
	1121	AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0xe000) AM_WRITE(s2650games_videoram_w) AM_BASE(&pacman_videoram)
1122	1122	AM_RANGE(0x1c00, 0x1fef) AM_MIRROR(0xe000) AM_RAM
1123	1123	AM_RANGE(0x1ff0, 0x1fff) AM_MIRROR(0xe000) AM_WRITEONLY AM_BASE_SIZE_GENERIC(spriteram)
1124	1124	AM_RANGE(0x2000, 0x2fff) AM_MIRROR(0x8000) AM_ROMBANK("bank2")
r6740	r6741
1129	1129
1130	1130	static ADDRESS_MAP_START( rocktrv2_map, ADDRESS_SPACE_PROGRAM, 8 )
1131	1131	AM_RANGE(0x0000, 0x3fff) AM_ROM
1132		AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
1133		AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	1132	AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	1133	AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
1134	1134	AM_RANGE(0x4c00, 0x4fff) AM_RAM
1135	1135	AM_RANGE(0x5000, 0x5000) AM_WRITE(interrupt_enable_w)
1136	1136	AM_RANGE(0x5001, 0x5001) AM_DEVWRITE("namco", pacman_sound_enable_w)
r6740	r6741
1156	1156
1157	1157	static ADDRESS_MAP_START( bigbucks_map, ADDRESS_SPACE_PROGRAM, 8 )
1158	1158	AM_RANGE(0x0000, 0x3fff) AM_ROM
1159		AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
1160		AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	1159	AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	1160	AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
1161	1161	AM_RANGE(0x4c00, 0x4fff) AM_RAM
1162	1162	AM_RANGE(0x5000, 0x5000) AM_WRITE(interrupt_enable_w)
1163	1163	AM_RANGE(0x5001, 0x5001) AM_DEVWRITE("namco", pacman_sound_enable_w)
r6740	r6741
1177	1177
1178	1178	static ADDRESS_MAP_START( mschamp_map, ADDRESS_SPACE_PROGRAM, 8 )
1179	1179	AM_RANGE(0x0000, 0x3fff) AM_ROMBANK("bank1")
1180		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
1181		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	1180	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	1181	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
1182	1182	AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
1183	1183	AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
1184	1184	AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
r6740	r6741
1204	1204	static ADDRESS_MAP_START( crushs_map, ADDRESS_SPACE_PROGRAM, 8 )
1205	1205	//A lot of games don't have an a15 at the cpu.  Generally only games with a cpu daughter board can access the full 32k of romspace.
1206	1206	AM_RANGE(0x0000, 0x3fff) AM_MIRROR(0x8000) AM_ROM
1207		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
1208		AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE_GENERIC(colorram)
	1207	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_videoram_w) AM_BASE(&pacman_videoram)
	1208	AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_BASE(&pacman_colorram)
1209	1209	AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
1210	1210	AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
1211	1211	AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
r6740	r6741
3277	3277	MDRV_CPU_PROGRAM_MAP(epos_map)
3278	3278	MDRV_CPU_IO_MAP(theglobp_portmap)
3279	3279
	3280	MDRV_MACHINE_START(theglobp)
3280	3281	MDRV_MACHINE_RESET(theglobp)
3281	3282	MACHINE_DRIVER_END
3282	3283
r6740	r6741
3290	3291	MDRV_CPU_PROGRAM_MAP(epos_map)
3291	3292	MDRV_CPU_IO_MAP(acitya_portmap)
3292	3293
	3294	MDRV_MACHINE_START(acitya)
3293	3295	MDRV_MACHINE_RESET(acitya)
3294	3296	MACHINE_DRIVER_END
3295	3297

src/mame/drivers/bwing.c

r6740	r6741
28	28	#include "cpu/m6502/m6502.h"
29	29	#include "sound/ay8910.h"
30	30	#include "sound/dac.h"
31		#include "bwing.h"
	31	#include "includes/bwing.h"
32	32
33	33
34	34	//****************************************************************************

src/mame/drivers/sf.c

r6740	r6741
1	1	/***************************************************************************
2	2
3		Street Fighter
	3	Street Fighter
4	4
5		driver by Olivier Galibert
	5	driver by Olivier Galibert
6	6
7		TODO:
8		- is there a third coin input?
	7	TODO:
	8	- is there a third coin input?
9	9
10	10	***************************************************************************/
11	11
r6740	r6741
14	14	#include "cpu/m68000/m68000.h"
15	15	#include "sound/2151intf.h"
16	16	#include "sound/msm5205.h"
	17	#include "includes/sf.h"
17	18
18
19		extern UINT16 *sf_objectram,*sf_videoram;
20
21		WRITE16_HANDLER( sf_bg_scroll_w );
22		WRITE16_HANDLER( sf_fg_scroll_w );
23		WRITE16_HANDLER( sf_videoram_w );
24		WRITE16_HANDLER( sf_gfxctrl_w );
25		VIDEO_START( sf );
26		VIDEO_UPDATE( sf );
27
28
29	19	static READ16_HANDLER( dummy_r )
30	20	{
31	21	return 0xffff;
r6740	r6741
36	26	{
37	27	if (ACCESSING_BITS_0_7)
38	28	{
39		coin_counter_w(space->machine, 0,data & 0x01);
40		coin_counter_w(space->machine, 1,data & 0x02);
41		coin_lockout_w(space->machine, 0,~data & 0x10);
42		coin_lockout_w(space->machine, 1,~data & 0x20);
43		coin_lockout_w(space->machine, 2,~data & 0x40);   /* is there a third coin input? */
	29	coin_counter_w(space->machine, 0, data & 0x01);
	30	coin_counter_w(space->machine, 1,  data & 0x02);
	31	coin_lockout_w(space->machine, 0, ~data & 0x10);
	32	coin_lockout_w(space->machine, 1, ~data & 0x20);
	33	coin_lockout_w(space->machine, 2, ~data & 0x40);   /* is there a third coin input? */
44	34	}
45	35	}
46	36
47	37
48	38	static WRITE16_HANDLER( soundcmd_w )
49	39	{
	40	sf_state *state = (sf_state *)space->machine->driver_data;
	41
50	42	if (ACCESSING_BITS_0_7)
51	43	{
52	44	soundlatch_w(space, offset, data & 0xff);
53		cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
	45	cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE);
54	46	}
55	47	}
56	48
r6740	r6741
58	50	/* The protection of the japanese version */
59	51	/* I'd love to see someone dump the 68705 rom */
60	52
61		static void write_dword(const address_space *space,offs_t offset,UINT32 data)
	53	static void write_dword( const address_space *space, offs_t offset, UINT32 data )
62	54	{
63		memory_write_word(space, offset,data >> 16);
64		memory_write_word(space, offset+2,data);
	55	memory_write_word(space, offset, data >> 16);
	56	memory_write_word(space, offset + 2, data);
65	57	}
66	58
67	59	static WRITE16_HANDLER( protection_w )
r6740	r6741
76	68
77	69	map = maplist
78	70	[memory_read_byte(space, 0xffc006)]
79		[(memory_read_byte(space, 0xffc003)<<1) + (memory_read_word(space, 0xffc004)>>8)];
	71	[(memory_read_byte(space, 0xffc003) << 1) + (memory_read_word(space, 0xffc004) >> 8)];
80	72
81		switch(memory_read_byte(space, 0xffc684)) {
	73	switch (memory_read_byte(space, 0xffc684))
	74	{
82	75	case 1:
83	76	{
84	77	int base;
85	78
86		base = 0x1b6e8+0x300e*map;
	79	base = 0x1b6e8 + 0x300e * map;
87	80
88		write_dword(space, 0xffc01c, 0x16bfc+0x270*map);
89		write_dword(space, 0xffc020, base+0x80);
	81	write_dword(space, 0xffc01c, 0x16bfc + 0x270 * map);
	82	write_dword(space, 0xffc020, base + 0x80);
90	83	write_dword(space, 0xffc024, base);
91		write_dword(space, 0xffc028, base+0x86);
92		write_dword(space, 0xffc02c, base+0x8e);
93		write_dword(space, 0xffc030, base+0x20e);
94		write_dword(space, 0xffc034, base+0x30e);
95		write_dword(space, 0xffc038, base+0x38e);
96		write_dword(space, 0xffc03c, base+0x40e);
97		write_dword(space, 0xffc040, base+0x80e);
98		write_dword(space, 0xffc044, base+0xc0e);
99		write_dword(space, 0xffc048, base+0x180e);
100		write_dword(space, 0xffc04c, base+0x240e);
101		write_dword(space, 0xffc050, 0x19548+0x60*map);
102		write_dword(space, 0xffc054, 0x19578+0x60*map);
	84	write_dword(space, 0xffc028, base + 0x86);
	85	write_dword(space, 0xffc02c, base + 0x8e);
	86	write_dword(space, 0xffc030, base + 0x20e);
	87	write_dword(space, 0xffc034, base + 0x30e);
	88	write_dword(space, 0xffc038, base + 0x38e);
	89	write_dword(space, 0xffc03c, base + 0x40e);
	90	write_dword(space, 0xffc040, base + 0x80e);
	91	write_dword(space, 0xffc044, base + 0xc0e);
	92	write_dword(space, 0xffc048, base + 0x180e);
	93	write_dword(space, 0xffc04c, base + 0x240e);
	94	write_dword(space, 0xffc050, 0x19548 + 0x60 * map);
	95	write_dword(space, 0xffc054, 0x19578 + 0x60 * map);
103	96	break;
104	97	}
105	98	case 2:
r6740	r6741
126	119	case 4:
127	120	{
128	121	int pos = memory_read_byte(space, 0xffc010);
129		pos = (pos+1) & 3;
	122	pos = (pos + 1) & 3;
130	123	memory_write_byte(space, 0xffc010, pos);
131		if(!pos) {
	124	if(!pos)
	125	{
132	126	int d1 = memory_read_word(space, 0xffc682);
133	127	int off = memory_read_word(space, 0xffc00e);
134		if(off!=512) {
	128	if (off!=512)
	129	{
135	130	off++;
136	131	d1++;
137		} else {
	132	}
	133	else
	134	{
138	135	off = 0;
139	136	d1 -= 512;
140	137	}
r6740	r6741
146	143	}
147	144	default:
148	145	{
149		logerror("Write protection at %06x (%04x)\n", cpu_get_pc(space->cpu), data&0xffff);
	146	logerror("Write protection at %06x (%04x)\n", cpu_get_pc(space->cpu), data & 0xffff);
150	147	logerror("*** Unknown protection %d\n", memory_read_byte(space, 0xffc684));
151	148	break;
152	149	}
r6740	r6741
162	159
163	160	static READ16_HANDLER( button1_r )
164	161	{
165		return (scale[input_port_read(space->machine, "IN3")]<<8) | scale[input_port_read(space->machine, "IN1")];
	162	return (scale[input_port_read(space->machine, "IN3")] << 8) | scale[input_port_read(space->machine, "IN1")];
166	163	}
167	164
168	165	static READ16_HANDLER( button2_r )
169	166	{
170		return (scale[input_port_read(space->machine, "IN4")]<<8) | scale[input_port_read(space->machine, "IN2")];
	167	return (scale[input_port_read(space->machine, "IN4")] << 8) | scale[input_port_read(space->machine, "IN2")];
171	168	}
172	169
173	170
174	171	static WRITE8_HANDLER( sound2_bank_w )
175	172	{
176		memory_set_bankptr(space->machine, "bank1",memory_region(space->machine, "audio2")+0x8000*(data+1));
	173	memory_set_bankptr(space->machine, "bank1", memory_region(space->machine, "audio2") + 0x8000 * (data + 1));
177	174	}
178	175
179	176
180	177	static WRITE8_DEVICE_HANDLER( msm5205_w )
181	178	{
182		msm5205_reset_w(device,(data>>7)&1);
	179	msm5205_reset_w(device, (data >> 7) & 1);
183	180	/* ?? bit 6?? */
184		msm5205_data_w(device,data);
185		msm5205_vclk_w(device,1);
186		msm5205_vclk_w(device,0);
	181	msm5205_data_w(device, data);
	182	msm5205_vclk_w(device, 1);
	183	msm5205_vclk_w(device, 0);
187	184	}
188	185
189	186
190	187
191	188	static ADDRESS_MAP_START( sf_map, ADDRESS_SPACE_PROGRAM, 16 )
192	189	AM_RANGE(0x000000, 0x04ffff) AM_ROM
193		AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE(&sf_videoram) AM_SIZE_GENERIC(videoram)
	190	AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE_SIZE_MEMBER(sf_state, videoram, videoram_size)
194	191	AM_RANGE(0xb00000, 0xb007ff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE_GENERIC(paletteram)
195	192	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("COINS")
196	193	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN0")
r6740	r6741
207	204	AM_RANGE(0xc0001c, 0xc0001d) AM_WRITE(soundcmd_w)
208	205	AM_RANGE(0xc0001e, 0xc0001f) AM_WRITE(protection_w)
209	206	AM_RANGE(0xff8000, 0xffdfff) AM_RAM
210		AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE(&sf_objectram)
	207	AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE_MEMBER(sf_state, objectram)
211	208	ADDRESS_MAP_END
212	209
213	210	static ADDRESS_MAP_START( sfus_map, ADDRESS_SPACE_PROGRAM, 16 )
214	211	AM_RANGE(0x000000, 0x04ffff) AM_ROM
215		AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE(&sf_videoram) AM_SIZE_GENERIC(videoram)
	212	AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE_SIZE_MEMBER(sf_state, videoram, videoram_size)
216	213	AM_RANGE(0xb00000, 0xb007ff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE_GENERIC(paletteram)
217	214	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0")
218	215	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1")
r6740	r6741
229	226	AM_RANGE(0xc0001c, 0xc0001d) AM_WRITE(soundcmd_w)
230	227	AM_RANGE(0xc0001e, 0xc0001f) AM_WRITE(protection_w)
231	228	AM_RANGE(0xff8000, 0xffdfff) AM_RAM
232		AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE(&sf_objectram)
	229	AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE_MEMBER(sf_state, objectram)
233	230	ADDRESS_MAP_END
234	231
235	232	static ADDRESS_MAP_START( sfjp_map, ADDRESS_SPACE_PROGRAM, 16 )
236	233	AM_RANGE(0x000000, 0x04ffff) AM_ROM
237		AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE(&sf_videoram) AM_SIZE_GENERIC(videoram)
	234	AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE_SIZE_MEMBER(sf_state, videoram, videoram_size)
238	235	AM_RANGE(0xb00000, 0xb007ff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE_GENERIC(paletteram)
239	236	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("COINS")
240	237	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("P1")
r6740	r6741
251	248	AM_RANGE(0xc0001c, 0xc0001d) AM_WRITE(soundcmd_w)
252	249	AM_RANGE(0xc0001e, 0xc0001f) AM_WRITE(protection_w)
253	250	AM_RANGE(0xff8000, 0xffdfff) AM_RAM
254		AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE(&sf_objectram)
	251	AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE_MEMBER(sf_state, objectram)
255	252	ADDRESS_MAP_END
256	253
257	254	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
786	783
787	784
788	785
789		static void irq_handler(const device_config *device, int irq)
	786	static void irq_handler( const device_config *device, int irq )
790	787	{
791		cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
	788	sf_state *state = (sf_state *)device->machine->driver_data;
	789	cpu_set_input_line(state->audiocpu, 0, irq ? ASSERT_LINE : CLEAR_LINE);
792	790	}
793	791
794	792	static const ym2151_interface ym2151_config =
r6740	r6741
802	800	MSM5205_SEX_4B   /* 8KHz playback ?    */
803	801	};
804	802
	803	static MACHINE_START( sf )
	804	{
	805	sf_state *state = (sf_state *)machine->driver_data;
	806
	807	/* devices */
	808	state->maincpu = devtag_get_device(machine, "maincpu");
	809	state->audiocpu = devtag_get_device(machine, "audiocpu");
	810
	811	state_save_register_global(machine, state->sf_active);
	812	state_save_register_global(machine, state->bgscroll);
	813	state_save_register_global(machine, state->fgscroll);
	814	}
	815
	816	static MACHINE_RESET( sf )
	817	{
	818	sf_state *state = (sf_state *)machine->driver_data;
	819
	820	state->sf_active = 0;
	821	state->bgscroll = 0;
	822	state->fgscroll = 0;
	823	}
	824
805	825	static MACHINE_DRIVER_START( sf )
806	826
	827	/* driver data */
	828	MDRV_DRIVER_DATA(sf_state)
	829
807	830	/* basic machine hardware */
808	831	MDRV_CPU_ADD("maincpu", M68000, 8000000)   /* 8 MHz ? (xtal is 16MHz) */
809	832	MDRV_CPU_PROGRAM_MAP(sf_map)
r6740	r6741
813	836	MDRV_CPU_PROGRAM_MAP(sound_map)
814	837	/* NMIs are caused by the main CPU */
815	838
	839	MDRV_MACHINE_START(sf)
	840	MDRV_MACHINE_RESET(sf)
	841
816	842	MDRV_CPU_ADD("audio2", Z80, 3579545)   /* ? xtal is 3.579545MHz */
817	843	MDRV_CPU_PROGRAM_MAP(sound2_map)
818	844	MDRV_CPU_IO_MAP(sound2_io_map)
r6740	r6741
1133	1159
1134	1160
1135	1161
1136		GAME( 1987, sf,   0,  sf,   sf,   0, ROT0, "Capcom", "Street Fighter (World)", 0 )
1137		GAME( 1987, sfus, sf, sfus, sfus, 0, ROT0, "Capcom", "Street Fighter (US)", 0 )
1138		GAME( 1987, sfj, sf, sfjp, sfjp, 0, ROT0, "Capcom", "Street Fighter (Japan)", 0 )
1139		GAME( 1987, sfp,  sf, sfp,  sf,   0, ROT0, "Capcom", "Street Fighter (prototype)", 0 )
	1162	GAME( 1987, sf,   0,  sf,   sf,   0, ROT0, "Capcom", "Street Fighter (World)", GAME_SUPPORTS_SAVE )
	1163	GAME( 1987, sfus, sf, sfus, sfus, 0, ROT0, "Capcom", "Street Fighter (US)", GAME_SUPPORTS_SAVE )
	1164	GAME( 1987, sfj,  sf, sfjp, sfjp, 0, ROT0, "Capcom", "Street Fighter (Japan)", GAME_SUPPORTS_SAVE )
	1165	GAME( 1987, sfp,  sf, sfp,  sf,   0, ROT0, "Capcom", "Street Fighter (prototype)", GAME_SUPPORTS_SAVE )

src/mame/drivers/cave.c

r6740	r6741
73	73	#include "machine/eeprom.h"
74	74	#include "machine/nmk112.h"
75	75	#include "cpu/z80/z80.h"
76		#include "cave.h"
	76	#include "includes/cave.h"
77	77	#include "sound/2203intf.h"
78	78	#include "sound/2151intf.h"
79	79	#include "sound/okim6295.h"

src/mame/drivers/williams.c

r6740	r6741
497	497	#include "sound/dac.h"
498	498	#include "sound/hc55516.h"
499	499	#include "machine/6821pia.h"
	500	#include "machine/ticket.h"
500	501	#include "audio/williams.h"
501		#include "williams.h"
	502	#include "includes/williams.h"
502	503
503	504
504	505	#define MASTER_CLOCK      (12000000)
505	506	#define SOUND_CLOCK         (3579000)
506	507
	508
	509
507	510	/*************************************
508	511	*
509	512	*  Defender memory handlers
r6740	r6741
1237	1240	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
1238	1241	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START1 )
1239	1242	PORT_BIT( 0x60, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1240		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* Used by ticket dispenser */
	1243	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r)
1241	1244
1242	1245	PORT_START("IN1")
1243	1246	PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
r6740	r6741
1432	1435	MDRV_CPU_ADD("soundcpu", M6808, SOUND_CLOCK)
1433	1436	MDRV_CPU_PROGRAM_MAP(defender_sound_map)
1434	1437
	1438	MDRV_MACHINE_START(defender)
1435	1439	MDRV_MACHINE_RESET(defender)
1436	1440	MDRV_NVRAM_HANDLER(generic_0fill)
1437	1441
	1442	MDRV_TIMER_ADD("scan_timer", williams_va11_callback)
	1443	MDRV_TIMER_ADD("240_timer", williams_count240_callback)
	1444
1438	1445	/* video hardware */
1439	1446	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_SCANLINE)
1440	1447
r6740	r6741
1477	1484	MDRV_CPU_MODIFY("soundcpu")
1478	1485	MDRV_CPU_PROGRAM_MAP(sound_map)
1479	1486
	1487	MDRV_MACHINE_START(williams)
1480	1488	MDRV_MACHINE_RESET(williams)
1481	1489	MDRV_SCREEN_MODIFY("screen")
1482	1490	MDRV_SCREEN_VISIBLE_AREA(6, 298-1, 7, 247-1)
r6740	r6741
1520	1528
1521	1529	/* pia */
1522	1530	MDRV_PIA6821_MODIFY("pia_0", lottofun_pia_0_intf)
	1531	MDRV_TICKET_DISPENSER_ADD("ticket", 70, TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH)
1523	1532	MACHINE_DRIVER_END
1524	1533
1525	1534
r6740	r6741
1531	1540	MDRV_CPU_MODIFY("maincpu")
1532	1541	MDRV_CPU_PROGRAM_MAP(williams_map)
1533	1542
	1543	MDRV_MACHINE_START(williams)
1534	1544	MDRV_MACHINE_RESET(williams)
1535	1545	MDRV_SCREEN_MODIFY("screen")
1536	1546	MDRV_SCREEN_VISIBLE_AREA(6, 298-1, 7, 247-1)
r6740	r6741
1582	1592	MDRV_CPU_MODIFY("maincpu")
1583	1593	MDRV_CPU_PROGRAM_MAP(blaster_map)
1584	1594
	1595	MDRV_MACHINE_START(blaster)
1585	1596	MDRV_MACHINE_RESET(blaster)
1586	1597
1587	1598	/* video hardware */
r6740	r6741
1612	1623	MDRV_CPU_ADD("soundcpu", M6808, MASTER_CLOCK/3)   /* yes, this is different from the older games */
1613	1624	MDRV_CPU_PROGRAM_MAP(williams2_sound_map)
1614	1625
	1626	MDRV_MACHINE_START(williams2)
1615	1627	MDRV_MACHINE_RESET(williams2)
1616	1628	MDRV_NVRAM_HANDLER(generic_0fill)
1617	1629
	1630	MDRV_TIMER_ADD("scan_timer", williams2_va11_callback)
	1631	MDRV_TIMER_ADD("254_timer", williams2_endscreen_callback)
	1632
1618	1633	/* video hardware */
1619	1634	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_SCANLINE)
1620	1635	MDRV_PALETTE_LENGTH(1024)

src/mame/drivers/fuukifg3.c

r6740	r6741
152	152	#include "cpu/z80/z80.h"
153	153	#include "cpu/m68000/m68000.h"
154	154	#include "sound/ymf278b.h"
155		#include "fuukifg3.h"
	155	#include "includes/fuukifg3.h"
156	156
157	157
158	158	static WRITE32_HANDLER( paletteram32_xRRRRRGGGGGBBBBB_dword_w )

src/mame/drivers/battlane.c

r6740	r6741
12	12	#include "driver.h"
13	13	#include "cpu/m6809/m6809.h"
14	14	#include "sound/3526intf.h"
15		#include "battlane.h"
	15	#include "includes/battlane.h"
16	16
17	17	/*************************************
18	18	*

src/mame/drivers/atarigt.c

r6740	r6741
23	23	#include "video/atarirle.h"
24	24	#include "cpu/m68000/m68000.h"
25	25	#include "audio/cage.h"
26		#include "atarigt.h"
	26	#include "includes/atarigt.h"
27	27
28	28
29	29	#define LOG_PROTECTION      (0)
r6740	r6741
56	56	}
57	57
58	58
	59	static MACHINE_START( atarigt )
	60	{
	61	atarigen_init(machine);
	62	}
	63
	64
59	65	static MACHINE_RESET( atarigt )
60	66	{
61	67	atarigt_state *state = (atarigt_state *)machine->driver_data;
r6740	r6741
793	799	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
794	800	MDRV_CPU_PERIODIC_INT(atarigen_scanline_int_gen, 250)
795	801
	802	MDRV_MACHINE_START(atarigt)
796	803	MDRV_MACHINE_RESET(atarigt)
797	804	MDRV_NVRAM_HANDLER(atarigen)
798	805

src/mame/drivers/crimfght.c

r6740	r6741
14	14	#include "driver.h"
15	15	#include "cpu/z80/z80.h"
16	16	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
17		#include "video/konamiic.h"
	17	#include "video/konicdev.h"
18	18	#include "sound/2151intf.h"
19	19	#include "sound/k007232.h"
20		#include "konamipt.h"
	20	#include "includes/konamipt.h"
21	21
22	22	/* prototypes */
23	23	static MACHINE_RESET( crimfght );
24	24	static KONAMI_SETLINES_CALLBACK( crimfght_banking );
25	25
	26	extern void crimfght_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	27	extern void crimfght_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
	28
26	29	VIDEO_START( crimfght );
27	30	VIDEO_UPDATE( crimfght );
28	31
r6740	r6741
49	52	k007232_set_bank( devtag_get_device(device->machine, "konami"), bank_A, bank_B );
50	53	}
51	54
	55	static READ8_HANDLER( k052109_051960_r )
	56	{
	57	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	58	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
52	59
	60	if (k052109_get_rmrd_line(k052109) == CLEAR_LINE)
	61	{
	62	if (offset >= 0x3800 && offset < 0x3808)
	63	return k051937_r(k051960, offset - 0x3800);
	64	else if (offset < 0x3c00)
	65	return k052109_r(k052109, offset);
	66	else
	67	return k051960_r(k051960, offset - 0x3c00);
	68	}
	69	else
	70	return k052109_r(k052109, offset);
	71	}
	72
	73	static WRITE8_HANDLER( k052109_051960_w )
	74	{
	75	const device_config *k052109 = devtag_get_device(space->machine, "k052109");
	76	const device_config *k051960 = devtag_get_device(space->machine, "k051960");
	77
	78	if (offset >= 0x3800 && offset < 0x3808)
	79	k051937_w(k051960, offset - 0x3800, data);
	80	else if (offset < 0x3c00)
	81	k052109_w(k052109, offset, data);
	82	else
	83	k051960_w(k051960, offset - 0x3c00, data);
	84	}
	85
53	86	/********************************************/
54	87
55	88	static ADDRESS_MAP_START( crimfght_map, ADDRESS_SPACE_PROGRAM, 8 )
r6740	r6741
65	98	AM_RANGE(0x3f87, 0x3f87) AM_READ_PORT("DSW1")
66	99	AM_RANGE(0x3f88, 0x3f88) AM_READWRITE(watchdog_reset_r, crimfght_coin_w)   /* watchdog reset */
67	100	AM_RANGE(0x3f8c, 0x3f8c) AM_WRITE(crimfght_sh_irqtrigger_w)   /* cause interrupt on audio CPU? */
68		AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)   /* video RAM + sprite RAM */
	101	AM_RANGE(0x2000, 0x5fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)   /* video RAM + sprite RAM */
69	102	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank2")                  /* banked ROM */
70	103	AM_RANGE(0x8000, 0xffff) AM_ROM                                    /* ROM */
71	104	ADDRESS_MAP_END
r6740	r6741
212	245
213	246
214	247
	248	static const k052109_interface crimfght_k052109_intf =
	249	{
	250	"gfx1", 0,
	251	NORMAL_PLANE_ORDER,
	252	KONAMI_ROM_DEINTERLEAVE_2,
	253	crimfght_tile_callback
	254	};
	255
	256	static const k051960_interface crimfght_k051960_intf =
	257	{
	258	"gfx2", 1,
	259	NORMAL_PLANE_ORDER,
	260	KONAMI_ROM_DEINTERLEAVE_2,
	261	crimfght_sprite_callback
	262	};
	263
215	264	static MACHINE_DRIVER_START( crimfght )
216	265
217	266	/* basic machine hardware */
r6740	r6741
239	288	MDRV_VIDEO_START(crimfght)
240	289	MDRV_VIDEO_UPDATE(crimfght)
241	290
	291	MDRV_K052109_ADD("k052109", crimfght_k052109_intf)
	292	MDRV_K051960_ADD("k051960", crimfght_k051960_intf)
	293
242	294	/* sound hardware */
243	295	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
244	296
r6740	r6741
338	390
339	391	static KONAMI_SETLINES_CALLBACK( crimfght_banking )
340	392	{
	393	const device_config *k052109 = devtag_get_device(device->machine, "k052109");
341	394	UINT8 *RAM = memory_region(device->machine, "maincpu");
342	395	int offs = 0;
343	396
r6740	r6741
352	405	memory_install_readwrite_bank(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, "bank1");                        /* RAM */
353	406
354	407	/* bit 6 = enable char ROM reading through the video RAM */
355		K052109_set_RMRD_line((lines & 0x40) ? ASSERT_LINE : CLEAR_LINE);
	408	k052109_set_rmrd_line(k052109, (lines & 0x40) ? ASSERT_LINE : CLEAR_LINE);
356	409
357	410	offs = 0x10000 + ((lines & 0x0f) * 0x2000);
358	411	memory_set_bankptr(device->machine, "bank2", &RAM[offs]);
r6740	r6741
368	421	memory_set_bankptr(machine,  "bank2", &RAM[0x10000] );
369	422	}
370	423
371		static DRIVER_INIT( crimfght )
372		{
373		konami_rom_deinterleave_2(machine, "gfx1");
374		konami_rom_deinterleave_2(machine, "gfx2");
375		}
376
377
378
379		GAME( 1989, crimfght, 0,        crimfght, crimfght, crimfght, ROT0, "Konami", "Crime Fighters (US 4 players)", 0 )
380		GAME( 1989, crimfght2,crimfght, crimfght, crimfgtj, crimfght, ROT0, "Konami", "Crime Fighters (World 2 Players)", 0 )
381		GAME( 1989, crimfghtj,crimfght, crimfght, crimfgtj, crimfght, ROT0, "Konami", "Crime Fighters (Japan 2 Players)", 0 )
	424	GAME( 1989, crimfght, 0,        crimfght, crimfght, 0, ROT0, "Konami", "Crime Fighters (US 4 players)", 0 )
	425	GAME( 1989, crimfght2,crimfght, crimfght, crimfgtj, 0, ROT0, "Konami", "Crime Fighters (World 2 Players)", 0 )
	426	GAME( 1989, crimfghtj,crimfght, crimfght, crimfgtj, 0, ROT0, "Konami", "Crime Fighters (Japan 2 Players)", 0 )

src/mame/drivers/triplhnt.c

r6740	r6741
12	12
13	13	#include "driver.h"
14	14	#include "cpu/m6800/m6800.h"
15		#include "triplhnt.h"
	15	#include "includes/triplhnt.h"
16	16
17	17	static UINT8 triplhnt_cmos[16];
18	18	static UINT8 triplhnt_da_latch;

src/mame/drivers/asuka.c

r6740	r6741
215	215	#include "driver.h"
216	216	#include "cpu/z80/z80.h"
217	217	#include "cpu/m68000/m68000.h"
218		#include "taitoipt.h"
	218	#include "includes/taitoipt.h"
219	219	#include "video/taitoic.h"
220	220	#include "audio/taitosnd.h"
221	221	#include "sound/2610intf.h"

src/mame/drivers/rollerg.c

r6740	r6741
12	12
13	13	#include "driver.h"
14	14	#include "cpu/z80/z80.h"
15		#include "video/konamiic.h"
	15	#include "video/konicdev.h"
16	16	#include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
17		#include "machine/eeprom.h"
18	17	#include "sound/3812intf.h"
19	18	#include "sound/k053260.h"
20	19
r6740	r6741
25	24	VIDEO_START( rollerg );
26	25	VIDEO_UPDATE( rollerg );
27	26
	27	extern void rollerg_sprite_callback(running_machine *machine, int *code,int *color,int *priority_mask);
	28	extern void rollerg_zoom_callback(running_machine *machine, int *code,int *color,int *flags);
28	29
29
30	30	static int readzoomroms;
31	31
32	32	static WRITE8_HANDLER( rollerg_0010_w )
33	33	{
34		logerror("%04x: write %02x to 0010\n",cpu_get_pc(space->cpu),data);
	34	const device_config *k051316 = devtag_get_device(space->machine, "k051316");
	35	logerror("%04x: write %02x to 0010\n",cpu_get_pc(space->cpu),data);
35	36
36	37	/* bits 0/1 are coin counters */
37	38	coin_counter_w(space->machine, 0,data & 0x01);
r6740	r6741
41	42	readzoomroms = data & 0x04;
42	43
43	44	/* bit 5 enables 051316 wraparound */
44		K051316_wraparound_enable(0, data & 0x20);
	45	k051316_wraparound_enable(k051316, data & 0x20);
45	46
46	47	/* other bits unknown */
47	48	}
48	49
49	50	static READ8_HANDLER( rollerg_K051316_r )
50	51	{
51		if (readzoomroms) return K051316_rom_0_r(space, offset);
52		else return K051316_0_r(space, offset);
	52	const device_config *k051316 = devtag_get_device(space->machine, "k051316");
	53	if (readzoomroms)
	54	return k051316_rom_r(k051316, offset);
	55	else
	56	return k051316_r(k051316, offset);
53	57	}
54	58
55	59	static READ8_DEVICE_HANDLER( rollerg_sound_r )
r6740	r6741
92	96	AM_RANGE(0x0060, 0x0060) AM_READ_PORT("DSW2")
93	97	AM_RANGE(0x0061, 0x0061) AM_READ(pip_r)            /* ????? */
94	98	AM_RANGE(0x0100, 0x010f) AM_WRITENOP   /* 053252? */
95		AM_RANGE(0x0200, 0x020f) AM_WRITE(K051316_ctrl_0_w)
96		AM_RANGE(0x0300, 0x030f) AM_READWRITE(K053244_r,K053244_w)
97		AM_RANGE(0x0800, 0x0fff) AM_READWRITE(rollerg_K051316_r,K051316_0_w)
98		AM_RANGE(0x1000, 0x17ff) AM_READWRITE(K053245_r,K053245_w)
	99	AM_RANGE(0x0200, 0x020f) AM_DEVWRITE("k051316", k051316_ctrl_w)
	100	AM_RANGE(0x0300, 0x030f) AM_DEVREADWRITE("k053244", k053244_r, k053244_w)
	101	AM_RANGE(0x0800, 0x0fff) AM_READ(rollerg_K051316_r) AM_DEVWRITE("k051316", k051316_w)
	102	AM_RANGE(0x1000, 0x17ff) AM_DEVREADWRITE("k053244", k053245_r, k053245_w)
99	103	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE_GENERIC(paletteram)
100	104	AM_RANGE(0x2000, 0x3aff) AM_RAM
101	105	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
r6740	r6741
217	221
218	222	***************************************************************************/
219	223
	224	static const k05324x_interface rollerg_k05324x_intf =
	225	{
	226	"gfx1", 0,
	227	NORMAL_PLANE_ORDER,
	228	-3, -1,
	229	KONAMI_ROM_DEINTERLEAVE_2,
	230	rollerg_sprite_callback
	231	};
	232
	233	static const k051316_interface rollerg_k051316_intf =
	234	{
	235	"gfx2", 1,
	236	4, FALSE, 0,
	237	0, 22, 1,
	238	rollerg_zoom_callback
	239	};
	240
220	241	static MACHINE_DRIVER_START( rollerg )
221	242
222	243	/* basic machine hardware */
r6740	r6741
244	265	MDRV_VIDEO_START(rollerg)
245	266	MDRV_VIDEO_UPDATE(rollerg)
246	267
	268	MDRV_K053244_ADD("k053244", rollerg_k05324x_intf)
	269	MDRV_K051316_ADD("k051316", rollerg_k051316_intf)
	270
247	271	/* sound hardware */
248	272	MDRV_SPEAKER_STANDARD_MONO("mono")
249	273
r6740	r6741
328	352	readzoomroms = 0;
329	353	}
330	354
331		static DRIVER_INIT( rollerg )
332		{
333		konami_rom_deinterleave_2(machine, "gfx1");
334		}
335	355
336
337
338		GAME( 1991, rollerg,  0,       rollerg, rollerg, rollerg, ROT0, "Konami", "Rollergames (US)", 0 )
339		GAME( 1991, rollergj, rollerg, rollerg, rollerg, rollerg, ROT0, "Konami", "Rollergames (Japan)", 0 )
	356	GAME( 1991, rollerg,  0,       rollerg, rollerg, 0, ROT0, "Konami", "Rollergames (US)", 0 )
	357	GAME( 1991, rollergj, rollerg, rollerg, rollerg, 0, ROT0, "Konami", "Rollergames (Japan)", 0 )

src/mame/drivers/hvyunit.c

r6740	r6741
60	60	#include "sound/2203intf.h"
61	61	#include "video/kan_pand.h"
62	62
	63	static UINT8 *videoram;
	64	static UINT8 *colorram;
63	65	static tilemap *bg_tilemap;
64	66	static UINT16 hu_scrollx, hu_scrolly;
65	67	static UINT16 port0_data;
r6740	r6741
276	278
277	279	static TILE_GET_INFO( get_bg_tile_info )
278	280	{
279		int attr = machine->generic.colorram.u8[tile_index];
280		int code = machine->generic.videoram.u8[tile_index] + ((attr & 0x0f) << 8);
	281	int attr = colorram[tile_index];
	282	int code = videoram[tile_index] + ((attr & 0x0f) << 8);
281	283	int color = (attr >> 4);
282	284
283	285	SET_TILE_INFO(1, code, color, 0);
r6740	r6741
336	338
337	339	static WRITE8_HANDLER( hu_videoram_w )
338	340	{
339		space->machine->generic.videoram.u8[offset] = data;
	341	videoram[offset] = data;
340	342	tilemap_mark_tile_dirty(bg_tilemap, offset);
341	343	}
342	344
343	345	static WRITE8_HANDLER( hu_colorram_w )
344	346	{
345		space->machine->generic.colorram.u8[offset] = data;
	347	colorram[offset] = data;
346	348	tilemap_mark_tile_dirty(bg_tilemap, offset);
347	349	}
348	350
r6740	r6741
385	387	static ADDRESS_MAP_START( slave_memory, ADDRESS_SPACE_PROGRAM, 8 )
386	388	AM_RANGE(0x0000, 0x7fff) AM_ROM
387	389	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank2")
388		AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(hu_videoram_w) AM_BASE_GENERIC(videoram)
389		AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(hu_colorram_w) AM_BASE_GENERIC(colorram)
	390	AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(hu_videoram_w) AM_BASE(&videoram)
	391	AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(hu_colorram_w) AM_BASE(&colorram)
390	392	AM_RANGE(0xd000, 0xd1ff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_split2_w) AM_BASE_GENERIC(paletteram2)
391	393	AM_RANGE(0xd800, 0xd9ff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_split1_w) AM_BASE_GENERIC(paletteram)
392	394	AM_RANGE(0xd000, 0xdfff) AM_RAM

src/mame/drivers/pirates.c

r6740	r6741
146	146	static CUSTOM_INPUT( prot_r )
147	147	{
148	148	//  static int prot = 0xa3;
	149	//  offs_t pc;
149	150	int bit;
150	151
151	152	//  logerror("%s: IN1_r\n",cpuexec_describe_context(field->port->machine));
r6740	r6741
155	156	602e and 62a6 */
156	157	/* For Genix, see 6576 for setting values and 67c2,d3b4 and dbc2 for tests. */
157	158
158		if (cpu_get_pc(cputag_get_cpu(field->port->machine, "main")) == 0x6134)
	159	pc = cpu_get_pc(cputag_get_cpu(field->port->machine, "main"));
	160	if (pc == 0x6134)
159	161	{
160	162	bit = prot & 1;
161	163	prot = (prot >> 1) | (bit << 7);
162	164	}
163		else if (cputag_get_cpu(field->port->machine, "main")) == 0x6020)
	165	else if (pc == 0x6020)
164	166	bit = 0;
165		else if (cputag_get_cpu(field->port->machine, "main")) == 0x6168)
	167	else if (pc == 0x6168)
166	168	bit = 0;
167		else if (cputag_get_cpu(field->port->machine, "main")) == 0x61cc)
	169	else if (pc == 0x61cc)
168	170	bit = 1;
169	171	else
170	172	#endif

src/mame/drivers/subs.c

r6740	r6741
20	20	#include "driver.h"
21	21	#include "cpu/m6502/m6502.h"
22	22	#include "deprecat.h"
23		#include "subs.h"
	23	#include "includes/subs.h"
24	24	#include "sound/discrete.h"
25	25	#include "rendlay.h"
26	26

src/mame/drivers/crospang.c

r6740	r6741
33	33	#include "cpu/m68000/m68000.h"
34	34	#include "sound/okim6295.h"
35	35	#include "sound/3812intf.h"
36		#include "crospang.h"
	36	#include "includes/crospang.h"
37	37
38	38
39	39	static WRITE16_HANDLER ( crospang_soundlatch_w )

src/mame/drivers/ajax.c

r6740	r6741
14	14	#include "cpu/z80/z80.h"
15	15	#include "cpu/m6809/m6809.h"
16	16	#include "cpu/konami/konami.h"
17		#include "video/konamiic.h"
	17	#include "video/konicdev.h"
18	18	#include "sound/2151intf.h"
19	19	#include "sound/k007232.h"
20	20	#include "includes/ajax.h"
21		#include "konamipt.h"
	21	#include "includes/konamipt.h"
22	22
23	23	static WRITE8_DEVICE_HANDLER( k007232_extvol_w );
24	24	static WRITE8_HANDLER( sound_bank_w );
25	25
	26	extern void ajax_tile_callback(running_machine *machine, int layer,int bank,int *code,int *color,int *flags,int *priority);
	27	extern void ajax_sprite_callback(running_machine *machine, int *code,int *color,int *priority,int *shadow);
	28	extern void ajax_zoom_callback(running_machine *machine, int *code,int *color,int *flags);
	29
	30
26	31	/****************************************************************************/
27	32
28	33	static ADDRESS_MAP_START( ajax_main_map, ADDRESS_SPACE_PROGRAM, 8 )
29	34	AM_RANGE(0x0000, 0x01c0) AM_READWRITE(ajax_ls138_f10_r, ajax_ls138_f10_w)   /* bankswitch + sound command + FIRQ command */
30		AM_RANGE(0x0800, 0x0807) AM_READWRITE(K051937_r, K051937_w)               /* sprite control registers */
31		AM_RANGE(0x0c00, 0x0fff) AM_READWRITE(K051960_r, K051960_w)               /* sprite RAM 2128SL at J7 */
	35	AM_RANGE(0x0800, 0x0807) AM_DEVREADWRITE("k051960", k051937_r, k051937_w)               /* sprite control registers */
	36	AM_RANGE(0x0c00, 0x0fff) AM_DEVREADWRITE("k051960", k051960_r, k051960_w)               /* sprite RAM 2128SL at J7 */
32	37	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE_GENERIC(paletteram)/* palette */
33	38	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("share1")                           /* shared RAM with the 6809 */
34	39	AM_RANGE(0x4000, 0x5fff) AM_RAM                                    /* RAM 6264L at K10 */
r6740	r6741
37	42	ADDRESS_MAP_END
38	43
39	44	static ADDRESS_MAP_START( ajax_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
40		AM_RANGE(0x0000, 0x07ff) AM_READWRITE(K051316_0_r, K051316_0_w)   /* 051316 zoom/rotation layer */
41		AM_RANGE(0x0800, 0x080f) AM_WRITE(K051316_ctrl_0_w)            /* 051316 control registers */
42		AM_RANGE(0x1000, 0x17ff) AM_READ(K051316_rom_0_r)            /* 051316 (ROM test) */
	45	AM_RANGE(0x0000, 0x07ff) AM_DEVREADWRITE("k051316", k051316_r, k051316_w)   /* 051316 zoom/rotation layer */
	46	AM_RANGE(0x0800, 0x080f) AM_DEVWRITE("k051316", k051316_ctrl_w)            /* 051316 control registers */
	47	AM_RANGE(0x1000, 0x17ff) AM_DEVREAD("k051316", k051316_rom_r)            /* 051316 (ROM test) */
43	48	AM_RANGE(0x1800, 0x1800) AM_WRITE(ajax_bankswitch_2_w)         /* bankswitch control */
44	49	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("share1")                  /* shared RAM with the 052001 */
45		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(K052109_r, K052109_w)      /* video RAM + color RAM + video registers */
	50	AM_RANGE(0x4000, 0x7fff) AM_DEVREADWRITE("k052109", k052109_r, k052109_w)      /* video RAM + color RAM + video registers */
46	51	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1")                     /* banked ROM */
47	52	AM_RANGE(0xa000, 0xffff) AM_ROM                           /* ROM I16 */
48	53	ADDRESS_MAP_END
r6740	r6741
180	185
181	186
182	187
	188	static const k052109_interface ajax_k052109_intf =
	189	{
	190	"gfx1", 0,
	191	NORMAL_PLANE_ORDER,
	192	KONAMI_ROM_DEINTERLEAVE_2,
	193	ajax_tile_callback
	194	};
	195
	196	static const k051960_interface ajax_k051960_intf =
	197	{
	198	"gfx2", 1,
	199	NORMAL_PLANE_ORDER,
	200	KONAMI_ROM_DEINTERLEAVE_2,
	201	ajax_sprite_callback
	202	};
	203
	204	static const k051316_interface ajax_k051316_intf =
	205	{
	206	"gfx3", 2,
	207	7, FALSE, 0,
	208	0, 0, 0,
	209	ajax_zoom_callback
	210	};
	211
183	212	static MACHINE_DRIVER_START( ajax )
184	213
185	214	/* basic machine hardware */
r6740	r6741
196	225	MDRV_QUANTUM_TIME(HZ(600))
197	226
198	227	MDRV_MACHINE_RESET(ajax)
199		MDRV_MACHINE_START(ajax)
	228	MDRV_MACHINE_START(ajax)
200	229
201	230	/* video hardware */
202	231	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
r6740	r6741
212	241	MDRV_VIDEO_START(ajax)
213	242	MDRV_VIDEO_UPDATE(ajax)
214	243
	244	MDRV_K052109_ADD("k052109", ajax_k052109_intf)
	245	MDRV_K051960_ADD("k051960", ajax_k051960_intf)
	246	MDRV_K051316_ADD("k051316", ajax_k051316_intf)
	247
215	248	/* sound hardware */
216	249	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
217	250
r6740	r6741
383	416	ROM_END
384	417
385	418
386		static DRIVER_INIT( ajax )
387		{
388		konami_rom_deinterleave_2(machine, "gfx1");
389		konami_rom_deinterleave_2(machine, "gfx2");
390		}
391
392
393		GAME( 1987, ajax,    0,    ajax, ajax, ajax, ROT90, "Konami", "Ajax", GAME_SUPPORTS_SAVE )
394		GAME( 1987, typhoon, ajax, ajax, ajax, ajax, ROT90, "Konami", "Typhoon", GAME_SUPPORTS_SAVE )
395		GAME( 1987, ajaxj,   ajax, ajax, ajax, ajax, ROT90, "Konami", "Ajax (Japan)", GAME_SUPPORTS_SAVE )
	419	GAME( 1987, ajax,    0,    ajax, ajax, 0, ROT90, "Konami", "Ajax", GAME_SUPPORTS_SAVE )
	420	GAME( 1987, typhoon, ajax, ajax, ajax, 0, ROT90, "Konami", "Typhoon", GAME_SUPPORTS_SAVE )
	421	GAME( 1987, ajaxj,   ajax, ajax, ajax, 0, ROT90, "Konami", "Ajax (Japan)", GAME_SUPPORTS_SAVE )

src/mame/drivers/funybubl.c

r6740	r6741
51	51	#include "driver.h"
52	52	#include "cpu/z80/z80.h"
53	53	#include "sound/okim6295.h"
54		#include "funybubl.h"
	54	#include "includes/funybubl.h"
55	55
56	56
57	57	static WRITE8_HANDLER ( funybubl_vidram_bank_w )

src/mame/drivers/shisen.c

r6740	r6741
229	229	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
230	230	/* IRQs are generated by main Z80 and YM2151 */
231	231
232		MDRV_MACHINE_RESET(m72_sound)
	232	MDRV_SOUND_START(m72)
	233	MDRV_SOUND_RESET(m72)
233	234
234	235	/* video hardware */
235	236	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/miniboy7.c

r6740	r6741
132	132	*     Video Hardware     *
133	133	*************************/
134	134
	135	static UINT8 *videoram;
	136	static UINT8 *colorram;
135	137	static tilemap *bg_tilemap;
136	138
137	139	static WRITE8_HANDLER( miniboy7_videoram_w )
138	140	{
139		space->machine->generic.videoram.u8[offset] = data;
	141	videoram[offset] = data;
140	142	tilemap_mark_tile_dirty(bg_tilemap, offset);
141	143	}
142	144
143	145	static WRITE8_HANDLER( miniboy7_colorram_w )
144	146	{
145		space->machine->generic.colorram.u8[offset] = data;
	147	colorram[offset] = data;
146	148	tilemap_mark_tile_dirty(bg_tilemap, offset);
147	149	}
148	150
r6740	r6741
154	156	---- --x-   tiles bank.
155	157	xx-- ---x   seems unused. */
156	158
157		int attr = machine->generic.colorram.u8[tile_index];
158		int code = machine->generic.videoram.u8[tile_index];
	159	int attr = colorram[tile_index];
	160	int code = videoram[tile_index];
159	161	int bank = (attr & 0x02) >> 1;   /* bit 1 switch the gfx banks */
160	162	int color = (attr & 0x3c);   /* bits 2-3-4-5 for color? */
161	163
r6740	r6741
183	185
184	186	static ADDRESS_MAP_START( miniboy7_map, ADDRESS_SPACE_PROGRAM, 8 )
185	187	AM_RANGE(0x0000, 0x07ff) AM_RAM   /* battery backed RAM? */
186		AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(miniboy7_videoram_w) AM_BASE_GENERIC(videoram)
187		AM_RANGE(0x1000, 0x17ff) AM_RAM_WRITE(miniboy7_colorram_w) AM_BASE_GENERIC(colorram)
	188	AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(miniboy7_videoram_w) AM_BASE(&videoram)
	189	AM_RANGE(0x1000, 0x17ff) AM_RAM_WRITE(miniboy7_colorram_w) AM_BASE(&colorram)
188	190	AM_RANGE(0x1800, 0x25ff) AM_RAM   /* looks like videoram */
189	191	AM_RANGE(0x2600, 0x27ff) AM_RAM
190	192	AM_RANGE(0x2800, 0x2800) AM_DEVWRITE("crtc", mc6845_address_w)

src/mame/drivers/m10.c

r6740	r6741
115	115	#include "machine/rescap.h"
116	116	#include "sound/samples.h"
117	117	#include "machine/74123.h"
118		#include "m10.h"
	118	#include "includes/m10.h"
119	119
120	120
121	121	/*************************************

src/tools/src2html.c

r6740	r6741
590	590	int quotes_are_linked = FALSE;
591	591	char in_quotes = 0;
592	592	int curcol = 0;
	593	int escape = 0;
593	594
594	595	/* start with the line number */
595	596	dstptr += sprintf(dstptr, "<span class=\"linenum\">%5d</span>&nbsp;&nbsp;", linenum++);
r6740	r6741
704	705	}
705	706
706	707	/* track closing quotes */
707		else if (!in_comment && !in_inline_comment && in_quotes && ch == in_quotes && (type != FILE_TYPE_C || srcptr[-2] != '\\' || srcptr[-3] == '\\'))
	708	else if (!in_comment && !in_inline_comment && in_quotes && ch == in_quotes && !escape)
708	709	{
709	710	if (quotes_are_linked)
710	711	dstptr += sprintf(dstptr, "</a>");
r6740	r6741
727	728	*dstptr++ = ch;
728	729	curcol++;
729	730	}
	731
	732	/* Update escape state */
	733	if (in_quotes)
	734	escape = (ch == '\\' && type == FILE_TYPE_C) ? !escape : 0;
730	735	}
731	736
732	737	/* finish inline comments */

src/tools/unidasm.c

r6740	r6741
166	166	CPU_DISASSEMBLE( tx0_64kw );
167	167	CPU_DISASSEMBLE( tx0_8kw );
168	168	CPU_DISASSEMBLE( pic16c5x );
	169	CPU_DISASSEMBLE( pic16c62x );
169	170	CPU_DISASSEMBLE( powerpc );
170	171	CPU_DISASSEMBLE( rsp );
171	172	CPU_DISASSEMBLE( s2650 );
r6740	r6741
291	292	{ "tx0_64kw",   _32be, -2, CPU_DISASSEMBLE_NAME(tx0_64kw) },
292	293	{ "tx0_8kw",    _32be, -2, CPU_DISASSEMBLE_NAME(tx0_8kw) },
293	294	{ "pic16c5x",   _16le, -1, CPU_DISASSEMBLE_NAME(pic16c5x) },
	295	{ "pic16c62x",  _16le, -1, CPU_DISASSEMBLE_NAME(pic16c62x) },
294	296	{ "powerpc",    _32be,  0, CPU_DISASSEMBLE_NAME(powerpc) },
295	297	{ "rsp",        _32le,  0, CPU_DISASSEMBLE_NAME(rsp) },
296	298	{ "s2650",      _8bit,  0, CPU_DISASSEMBLE_NAME(s2650) },

src/tools/srcclean.c

r6740	r6741
128	128
129	129	if (!in_c_string && !in_cpp_comment)
130	130	{
	131	int consume = TRUE;
	132
131	133	/* track whether or not we are within a C-style comment */
132	134	if (!in_c_comment && ch == '/' && original[src] == '*')
133	135	in_c_comment = TRUE;
r6740	r6741
135	137	in_c_comment = FALSE;
136	138
137	139	/* track whether or not we are within a C++-style comment */
138		if (!in_c_comment && ch == '/' && original[src] == '/')
	140	else if (!in_c_comment && ch == '/' && original[src] == '/')
139	141	in_cpp_comment = TRUE;
	142	else
	143	consume = FALSE;
	144
	145	if (consume)
	146	{
	147	modified[dst++] = ch;
	148	col++;
	149	ch = original[src++];
	150	}
140	151	}
141	152	}
142	153

src/osd/windows/winwork.c

r6740	r6741
174	174	volatile INT32      done;         // is the item done?
175	175	};
176	176
	177	//============================================================
	178	//  GLOBAL VARIABLES
	179	//============================================================
177	180
	181	int osd_num_processors = 0;
178	182
179	183	//============================================================
180	184	//  FUNCTION PROTOTYPES
r6740	r6741
677	681
678	682	static int effective_num_processors(void)
679	683	{
680		TCHAR *procsoverride;
681	684	SYSTEM_INFO info;
682		int numprocs = 0;
	685	// fetch the info from the system
	686	GetSystemInfo(&info);
683	687
684		// if the OSDPROCESSORS environment variable is set, use that value if valid
685		procsoverride = _tgetenv(_T("OSDPROCESSORS"));
686		if (procsoverride != NULL && _stscanf(procsoverride, _T("%d"), &numprocs) == 1 && numprocs > 0)
687		return numprocs;
	688	if (osd_num_processors > 0)
	689	{
	690	return MIN(info.dwNumberOfProcessors * 4, osd_num_processors);
	691	}
	692	else
	693	{
	694	TCHAR *procsoverride;
	695	int numprocs = 0;
688	696
689		// otherwise, fetch the info from the system
690		GetSystemInfo(&info);
	697	// if the OSDPROCESSORS environment variable is set, use that value if valid
	698	procsoverride = _tgetenv(_T("OSDPROCESSORS"));
	699	if (procsoverride != NULL && _stscanf(procsoverride, _T("%d"), &numprocs) == 1 && numprocs > 0)
	700	// Be well behaved ...
	701	return MIN(info.dwNumberOfProcessors * 4, numprocs);
691	702
692		// max out at 4 for now since scaling above that seems to do poorly
693		return MIN(info.dwNumberOfProcessors, 4);
	703	// max out at 4 for now since scaling above that seems to do poorly
	704	return MIN(info.dwNumberOfProcessors, 4);
	705	}
694	706	}
695	707
696	708

src/osd/windows/winmain.c

r6740	r6741
165	165	{ NULL,                       NULL,       OPTION_HEADER,     "WINDOWS PERFORMANCE OPTIONS" },
166	166	{ "priority(-15-1)",          "0",        0,                 "thread priority for the main game thread; range from -15 to 1" },
167	167	{ "multithreading;mt",        "0",        OPTION_BOOLEAN,    "enable multithreading; this enables rendering and blitting on a separate thread" },
	168	{ "numprocessors;np",         "auto",     0,             "number of processors; this overrides the number the system reports" },
168	169
169	170	// video options
170	171	{ NULL,                       NULL,       OPTION_HEADER,     "WINDOWS VIDEO OPTIONS" },
r6740	r6741
309	310	void osd_init(running_machine *machine)
310	311	{
311	312	int watchdog = options_get_int(mame_options(), WINOPTION_WATCHDOG);
	313	const char *stemp;
312	314
313	315	// thread priority
314	316	if (!options_get_bool(mame_options(), OPTION_DEBUG))
r6740	r6741
317	319	// ensure we get called on the way out
318	320	add_exit_callback(machine, osd_exit);
319	321
	322	// get number of processors
	323	stemp = options_get_string(mame_options(), WINOPTION_NUMPROCESSORS);
	324
	325	osd_num_processors = 0;
	326
	327	if (strcmp(stemp, "auto") != 0)
	328	{
	329	osd_num_processors = atoi(stemp);
	330	if (osd_num_processors < 1)
	331	{
	332	mame_printf_warning("Warning: numprocessors < 1 doesn't make much sense. Assuming auto ...\n");
	333	osd_num_processors = 0;
	334	}
	335	}
	336
320	337	// initialize the subsystems
321	338	winvideo_init(machine);
322	339	winsound_init(machine);
r6740	r6741
669	686	}
670	687
671	688	fclose(map);
672		return 0;
	689	return result;
673	690	}
674	691
675	692

src/osd/windows/winmain.h

r6740	r6741
53	53	// performance options
54	54	#define WINOPTION_PRIORITY            "priority"
55	55	#define WINOPTION_MULTITHREADING      "multithreading"
	56	#define WINOPTION_NUMPROCESSORS         "numprocessors"
56	57
57	58	// video options
58	59	#define WINOPTION_VIDEO               "video"
r6740	r6741
131	132
132	133	extern const options_entry mame_win_options[];
133	134
	135	// defined in winwork.c
	136	extern int osd_num_processors;
134	137
135	138
136	139	//============================================================

src/emu/debug/debugvw.c

r6740	r6741
166	166	typedef struct _debug_view_memory debug_view_memory;
167	167	struct _debug_view_memory
168	168	{
	169	const memory_subview_item *subviewlist;      /* linked list of memory subviews */
169	170	const memory_subview_item *desc;         /* description of our current subview */
170	171	debug_view_expression expression;         /* expression describing the start address */
171	172	UINT32            chunks_per_row;         /* number of chunks displayed per line */
r6740	r6741
207	208	debug_view *      viewlist;            /* list of views */
208	209	const registers_subview_item *registers_subviews;/* linked list of registers subviews */
209	210	const disasm_subview_item *disasm_subviews;   /* linked list of disassembly subviews */
210		const memory_subview_item *memory_subviews;   /* linked list of memory subviews */
211	211	};
212	212
213	213
r6740	r6741
350	350	/* build a list of disassembly and memory subviews */
351	351	global->registers_subviews = registers_view_enumerate_subviews(machine);
352	352	global->disasm_subviews = disasm_view_enumerate_subviews(machine);
353		global->memory_subviews = memory_view_enumerate_subviews(machine);
354	353	}
355	354
356	355
r6740	r6741
2412	2411	astring_printf(tempstring, "CPU '%s' (%s) %s memory", device->tag, device_get_name(device), space->name);
2413	2412	else
2414	2413	astring_printf(tempstring, "%s '%s' space #%d memory", device_get_name(device), device->tag, spacenum);
2415		subview = (memory_subview_item *)auto_alloc_array_clear(machine, UINT8, sizeof(*subview) + astring_len(tempstring));
	2414	subview = (memory_subview_item *)alloc_array_clear_or_die(UINT8, sizeof(*subview) + astring_len(tempstring));
2416	2415
2417	2416	/* populate the subview */
2418	2417	subview->next = NULL;
r6740	r6741
2441	2440
2442	2441	/* determine the string and allocate a subview large enough */
2443	2442	astring_printf(tempstring, "Region '%s'", rgntag);
2444		subview = (memory_subview_item *)auto_alloc_array_clear(machine, UINT8, sizeof(*subview) + astring_len(tempstring));
	2443	subview = (memory_subview_item *)alloc_array_clear_or_die(UINT8, sizeof(*subview) + astring_len(tempstring));
2445	2444
2446	2445	/* populate the subview */
2447	2446	subview->next = NULL;
r6740	r6741
2472	2471	break;
2473	2472
2474	2473	/* if this is a single-entry global, add it */
2475		if (valcount > 1 && strstr(name, "/globals/"))
	2474	if (valcount > 1 && strstr(name, "globals/"))
2476	2475	{
2477	2476	memory_subview_item *subview;
2478	2477
2479	2478	/* determine the string and allocate a subview large enough */
2480	2479	astring_printf(tempstring, "%s", strrchr(name, '/') + 1);
2481		subview = (memory_subview_item *)auto_alloc_array_clear(machine, UINT8, sizeof(*subview) + astring_len(tempstring));
	2480	subview = (memory_subview_item *)alloc_array_clear_or_die(UINT8, sizeof(*subview) + astring_len(tempstring));
2482	2481
2483	2482	/* populate the subview */
2484	2483	subview->next = NULL;
r6740	r6741
2509	2508
2510	2509	static int memory_view_alloc(debug_view *view)
2511	2510	{
	2511	const memory_subview_item *subviews = memory_view_enumerate_subviews(view->machine);
2512	2512	debug_view_memory *memdata;
2513	2513
2514		/* fail if no available subviews */
2515		if (view->machine->debugvw_data->memory_subviews == NULL)
	2514	/* if no subviews, fail */
	2515	if (subviews == NULL)
2516	2516	return FALSE;
2517	2517
2518	2518	/* allocate memory */
2519		memdata = (debug_view_memory *)malloc(sizeof(*memdata));
2520		if (memdata == NULL)
2521		return FALSE;
2522		memset(memdata, 0, sizeof(*memdata));
	2519	memdata = alloc_clear_or_die(debug_view_memory);
	2520	memdata->subviewlist = subviews;
2523	2521
2524	2522	/* allocate the expression data */
2525	2523	debug_view_expression_alloc(&memdata->expression);
r6740	r6741
2531	2529	view->supports_cursor = TRUE;
2532	2530
2533	2531	/* default to the first subview */
2534		memdata->desc = view->machine->debugvw_data->memory_subviews;
	2532	memdata->desc = memdata->subviewlist;
2535	2533
2536	2534	/* start out with 16 bytes in a single column and ASCII displayed */
2537	2535	memdata->bytes_per_chunk = memdata->desc->prefsize;
r6740	r6741
2555	2553	/* free any memory we allocated */
2556	2554	if (memdata != NULL)
2557	2555	{
	2556	while (memdata->subviewlist != NULL)
	2557	{
	2558	memory_subview_item *item = (memory_subview_item *)memdata->subviewlist;
	2559	memdata->subviewlist = item->next;
	2560	free(item);
	2561	}
2558	2562	debug_view_expression_free(&memdata->expression);
2559	2563	free(memdata);
2560	2564	}
r6740	r6741
3099	3103
3100	3104	const memory_subview_item *memory_view_get_subview_list(debug_view *view)
3101	3105	{
	3106	debug_view_memory *memdata = (debug_view_memory *)view->extra_data;
3102	3107	assert(view->type == DVT_MEMORY);
3103		return view->machine->debugvw_data->memory_subviews;
	3108	return memdata->subviewlist;
3104	3109	}
3105	3110
3106	3111
r6740	r6741
3220	3225
3221	3226	void memory_view_set_subview(debug_view *view, int index)
3222	3227	{
3223		const memory_subview_item *subview = memory_view_get_subview_by_index(view->machine->debugvw_data->memory_subviews, index);
3224	3228	debug_view_memory *memdata = (debug_view_memory *)view->extra_data;
	3229	const memory_subview_item *subview;
3225	3230
3226	3231	assert(view->type == DVT_MEMORY);
3227		assert(subview != NULL);
	3232
	3233	/* pick the requested view */
	3234	subview = memory_view_get_subview_by_index(memdata->subviewlist, index);
3228	3235	if (subview == NULL)
3229	3236	return;
3230	3237

src/emu/cpu/pic16c62x/pic16c62x.c

r0	r6741
	1	/**************************************************************************\
	2	*                  Microchip PIC16C62X Emulator                            *
	3	*                                                                          *
	4	*                          Based On                                        *
	5	*                  Microchip PIC16C5X Emulator                             *
	6	*                    Copyright Tony La Porta                               *
	7	*                 Originally written for the MAME project.                 *
	8	*                                                                          *
	9	*                                                                          *
	10	*      Addressing architecture is based on the Harvard addressing scheme.  *
	11	*                                                                          *
	12	*                                                                          *
	13	*  **** Change Log ****                                                    *
	14	*  SZ (22-Oct-2009)                                                        *
	15	*   - Improvements and tests                                               *
	16	*  SZ (2-Oct-2009)                                                         *
	17	*   - Internal ram and registers                                           *
	18	*  SZ (12-Sep-2009)                                                        *
	19	*   - Started working on it.                                               *
	20	*                                                                          *
	21	*                                                                          *
	22	*  **** TODO ****                                                          *
	23	*   - Finish checking opcodes/instructions                                 *
	24	*   - Internal devices                                                     *
	25	*   - Interrupts                                                           *
	26	*   - Everything !                                                         *
	27	*                                                                          *
	28	*  **** DONE ****                                                          *
	29	*   - I/O ports                                                            *
	30	*   - Savestates                                                           *
	31	*   - Internal memory                                                      *
	32	*   - New opcodes                                                          *
	33	*   - Opcode disassembly                                                   *
	34	*                                                                          *
	35	*  **** Notes (from PIC16C5X): ****                                        *
	36	*  PIC WatchDog Timer has a seperate internal clock. For the moment, we're *
	37	*     basing the count on a 4MHz input clock, since 4MHz is the typical    *
	38	*     input frequency (but by no means always).                            *
	39	*  A single scaler is available for the Counter/Timer or WatchDog Timer.   *
	40	*     When connected to the Counter/Timer, it functions as a Prescaler,    *
	41	*     hence prescale overflows, tick the Counter/Timer.                    *
	42	*     When connected to the WatchDog Timer, it functions as a Postscaler   *
	43	*     hence WatchDog Timer overflows, tick the Postscaler. This scenario   *
	44	*     means that the WatchDog timeout occurs when the Postscaler has       *
	45	*     reached the scaler rate value, not when the WatchDog reaches zero.   *
	46	*  CLRWDT should prevent the WatchDog Timer from timing out and generating *
	47	*     a device reset, but how is not known. The manual also mentions that  *
	48	*     the WatchDog Timer can only be disabled during ROM programming, and  *
	49	*     no other means seem to exist???                                      *
	50	*                                                                          *
	51	\**************************************************************************/
	52
	53	#include "debugger.h"
	54	#include "pic16c62x.h"
	55
	56
	57
	58
	59	typedef struct _pic16c62x_state pic16c62x_state;
	60	struct _pic16c62x_state
	61	{
	62	/******************** CPU Internal Registers *******************/
	63	UINT16   PC;
	64	UINT16   PREVPC;      /* previous program counter */
	65	UINT8   W;
	66	UINT8   PCLATH;      /* 0a,8a */
	67	UINT8   OPTION;      /* 81 */
	68	UINT16   CONFIG;
	69	UINT8   ALU;
	70	UINT16   WDT;
	71	UINT8   TRISA;      /* 85 */
	72	UINT8   TRISB;      /* 86 */
	73	UINT16   STACK[8];
	74	UINT16   prescaler;   /* Note: this is really an 8-bit register */
	75	PAIR   opcode;
	76	UINT8   *internalram;
	77
	78	int      icount;
	79	int      reset_vector;
	80	int      picmodel;
	81	int      delay_timer;
	82	UINT16   temp_config;
	83	UINT8   old_T0;
	84	INT8   old_data;
	85	UINT8   picRAMmask;
	86	int      inst_cycles;
	87
	88
	89	const   device_config *device;
	90	const   address_space *program;
	91	const   address_space *data;
	92	const   address_space *io;
	93	};
	94
	95	INLINE pic16c62x_state *get_safe_token(const device_config *device)
	96	{
	97	assert(device != NULL);
	98	assert(device->token != NULL);
	99	assert(device->type == CPU);
	100	assert(cpu_get_type(device) == CPU_PIC16C620 ||
	101	cpu_get_type(device) == CPU_PIC16C620A ||
	102	//         cpu_get_type(device) == CPU_PIC16CR620A ||
	103	cpu_get_type(device) == CPU_PIC16C621 ||
	104	cpu_get_type(device) == CPU_PIC16C621A ||
	105	cpu_get_type(device) == CPU_PIC16C622 ||
	106	cpu_get_type(device) == CPU_PIC16C622A);
	107	return (pic16c62x_state *)device->token;
	108	}
	109
	110
	111	/* opcode table entry */
	112	typedef struct _pic16c62x_opcode pic16c62x_opcode;
	113	struct _pic16c62x_opcode
	114	{
	115	UINT8   cycles;
	116	void    (*function)(pic16c62x_state *);
	117	};
	118	/* instruction list entry */
	119	typedef struct _pic16c62x_instruction pic16c62x_instruction;
	120	struct _pic16c62x_instruction
	121	{
	122	char   *format;
	123	void    (*function)(pic16c62x_state *);
	124	UINT8   cycles;
	125	};
	126
	127
	128	INLINE void update_internalram_ptr(pic16c62x_state *cpustate)
	129	{
	130	cpustate->internalram = (UINT8 *)memory_get_write_ptr(cpustate->data, 0x00);
	131	}
	132
	133	#define PIC16C62x_RDOP(A)         (memory_decrypted_read_word(cpustate->program, (A)<<1))
	134	#define PIC16C62x_RAM_RDMEM(A)    ((UINT8)memory_read_byte_8le(cpustate->data, A))
	135	#define PIC16C62x_RAM_WRMEM(A,V)  (memory_write_byte_8le(cpustate->data, A,V))
	136	#define PIC16C62x_In(Port)        ((UINT8)memory_read_byte_8le(cpustate->io, (Port)))
	137	#define PIC16C62x_Out(Port,Value) (memory_write_byte_8le(cpustate->io, (Port),Value))
	138	/************  Read the state of the T0 Clock input signal  ************/
	139	#define PIC16C62x_T0_In           (memory_read_byte_8le(cpustate->io, PIC16C62x_T0) >> 4)
	140
	141	#define M_RDRAM(A)      (((A) == 0) ? cpustate->internalram[0] : PIC16C62x_RAM_RDMEM(A))
	142	#define M_WRTRAM(A,V)   do { if ((A) == 0) cpustate->internalram[0] = (V); else PIC16C62x_RAM_WRMEM(A,V); } while (0)
	143	#define M_RDOP(A)      PIC16C62x_RDOP(A)
	144	#define P_IN(A)         PIC16C62x_In(A)
	145	#define P_OUT(A,V)      PIC16C62x_Out(A,V)
	146	#define S_T0_IN         PIC16C62x_T0_In
	147	#define ADDR_MASK      0x1fff
	148
	149
	150
	151	#define TMR0   internalram[1]
	152	#define PCL      internalram[2]
	153	#define STATUS   internalram[3]
	154	#define FSR      internalram[4]
	155	#define PORTA   internalram[5]
	156	#define PORTB   internalram[6]
	157	#define INDF   M_RDRAM(cpustate->FSR)
	158
	159	#define  RISING_EDGE_T0  (( (int)(T0_in - cpustate->old_T0) > 0) ? 1 : 0)
	160	#define FALLING_EDGE_T0  (( (int)(T0_in - cpustate->old_T0) < 0) ? 1 : 0)
	161
	162
	163	/********  The following is the Status Flag register definition.  *********/
	164	/* | 7 | 6 | 5 |  4 |  3 | 2 |  1 | 0 | */
	165	/* |IRP|RP1|RP0| TO | PD | Z | DC | C | */
	166	#define IRP_FLAG   0x80   /* IRP  Register Bank Select bit (used for indirect addressing) */
	167	#define RP1_FLAG   0x40   /* RP1  Register Bank Select bits (used for direct addressing) */
	168	#define RP0_FLAG   0x20   /* RP0  Register Bank Select bits (used for direct addressing) */
	169	#define TO_FLAG      0x10   /* TO   Time Out flag (WatchDog) */
	170	#define PD_FLAG      0x08   /* PD   Power Down flag */
	171	#define Z_FLAG      0x04   /* Z    Zero Flag */
	172	#define DC_FLAG      0x02   /* DC   Digit Carry/Borrow flag (Nibble) */
	173	#define C_FLAG      0x01   /* C    Carry/Borrow Flag (Byte) */
	174
	175	#define IRP      (cpustate->STATUS & IRP_FLAG)
	176	#define RP1      (cpustate->STATUS & RP1_FLAG)
	177	#define RP0      (cpustate->STATUS & RP0_FLAG)
	178	#define TO      (cpustate->STATUS & TO_FLAG)
	179	#define PD      (cpustate->STATUS & PD_FLAG)
	180	#define ZERO   (cpustate->STATUS & Z_FLAG)
	181	#define DC      (cpustate->STATUS & DC_FLAG)
	182	#define CARRY   (cpustate->STATUS & C_FLAG)
	183
	184	#define ADDR   ((cpustate->opcode.b.l & 0x7f) | (RP0 << 2))
	185
	186	/********  The following is the Option Flag register definition.  *********/
	187	/* |   7  |   6    |   5  |   4  |  3  | 2 | 1 | 0 | */
	188	/* | RBPU | INTEDG | TOCS | TOSE | PSA |    PS     | */
	189	#define RBPU_FLAG   0x80   /* RBPU     Pull-up Enable */
	190	#define INTEDG_FLAG   0x40   /* INTEDG   Interrupt Edge Select */
	191	#define T0CS_FLAG   0x20   /* TOCS     Timer 0 clock source select */
	192	#define T0SE_FLAG   0x10   /* TOSE     Timer 0 clock source edge select */
	193	#define PSA_FLAG   0x08   /* PSA      Prescaler Assignment bit */
	194	#define PS_REG      0x07   /* PS       Prescaler Rate select */
	195
	196	#define T0CS   (cpustate->OPTION & T0CS_FLAG)
	197	#define T0SE   (cpustate->OPTION & T0SE_FLAG)
	198	#define PSA      (cpustate->OPTION & PSA_FLAG)
	199	#define PS      (cpustate->OPTION & PS_REG)
	200
	201	/********  The following is the Config Flag register definition.  *********/
	202	/* | 13 | 12 | 11 | 10 | 9 | 8 | 7 |   6   | 5 | 4 |   3   |   2  | 1 | 0 | */
	203	/* |           CP              |   | BODEN |  CP   | PWRTE | WDTE |  FOSC | */
	204	/* CP       Code Protect (ROM read protect) */
	205	#define BODEN_FLAG   0x40   /* BODEN    Brown-out Reset Enable */
	206	#define PWRTE_FLAG   0x08   /* PWRTE    Power-up Timer Enable */
	207	#define WDTE_FLAG   0x04   /* WDTE     WatchDog Timer enable */
	208	#define FOSC_FLAG   0x03   /* FOSC     Oscillator source select */
	209
	210	#define WDTE   (cpustate->CONFIG & WDTE_FLAG)
	211	#define FOSC   (cpustate->CONFIG & FOSC_FLAG)
	212
	213
	214	/************************************************************************
	215	*  Shortcuts
	216	************************************************************************/
	217
	218	#define CLR(flagreg, flag) ( flagreg &= (UINT8)(~flag) )
	219	#define SET(flagreg, flag) ( flagreg |=  flag )
	220
	221
	222	/* Easy bit position selectors */
	223	#define POS    ((cpustate->opcode.w.l >> 7) & 7)
	224	static const unsigned int bit_clr[8] = { 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f };
	225	static const unsigned int bit_set[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
	226
	227
	228
	229	INLINE void CALCULATE_Z_FLAG(pic16c62x_state *cpustate)
	230	{
	231	if (cpustate->ALU == 0) SET(cpustate->STATUS, Z_FLAG);
	232	else CLR(cpustate->STATUS, Z_FLAG);
	233	}
	234
	235	INLINE void CALCULATE_ADD_CARRY(pic16c62x_state *cpustate)
	236	{
	237	if ((UINT8)(cpustate->old_data) > (UINT8)(cpustate->ALU)) {
	238	SET(cpustate->STATUS, C_FLAG);
	239	}
	240	else {
	241	CLR(cpustate->STATUS, C_FLAG);
	242	}
	243	}
	244
	245	INLINE void CALCULATE_ADD_DIGITCARRY(pic16c62x_state *cpustate)
	246	{
	247	if (((UINT8)(cpustate->old_data) & 0x0f) > ((UINT8)(cpustate->ALU) & 0x0f)) {
	248	SET(cpustate->STATUS, DC_FLAG);
	249	}
	250	else {
	251	CLR(cpustate->STATUS, DC_FLAG);
	252	}
	253	}
	254
	255	INLINE void CALCULATE_SUB_CARRY(pic16c62x_state *cpustate)
	256	{
	257	if ((UINT8)(cpustate->old_data) < (UINT8)(cpustate->ALU)) {
	258	CLR(cpustate->STATUS, C_FLAG);
	259	}
	260	else {
	261	SET(cpustate->STATUS, C_FLAG);
	262	}
	263	}
	264
	265	INLINE void CALCULATE_SUB_DIGITCARRY(pic16c62x_state *cpustate)
	266	{
	267	if (((UINT8)(cpustate->old_data) & 0x0f) < ((UINT8)(cpustate->ALU) & 0x0f)) {
	268	CLR(cpustate->STATUS, DC_FLAG);
	269	}
	270	else {
	271	SET(cpustate->STATUS, DC_FLAG);
	272	}
	273	}
	274
	275
	276
	277	INLINE UINT16 POP_STACK(pic16c62x_state *cpustate)
	278	{
	279	UINT16 data = cpustate->STACK[7];
	280	cpustate->STACK[7] = cpustate->STACK[6];
	281	cpustate->STACK[6] = cpustate->STACK[5];
	282	cpustate->STACK[5] = cpustate->STACK[4];
	283	cpustate->STACK[4] = cpustate->STACK[3];
	284	cpustate->STACK[3] = cpustate->STACK[2];
	285	cpustate->STACK[2] = cpustate->STACK[1];
	286	cpustate->STACK[1] = cpustate->STACK[0];
	287	return (data & ADDR_MASK);
	288	}
	289	INLINE void PUSH_STACK(pic16c62x_state *cpustate, UINT16 data)
	290	{
	291	cpustate->STACK[0] = cpustate->STACK[1];
	292	cpustate->STACK[1] = cpustate->STACK[2];
	293	cpustate->STACK[2] = cpustate->STACK[3];
	294	cpustate->STACK[3] = cpustate->STACK[4];
	295	cpustate->STACK[4] = cpustate->STACK[5];
	296	cpustate->STACK[5] = cpustate->STACK[6];
	297	cpustate->STACK[6] = cpustate->STACK[7];
	298	cpustate->STACK[7] = (data & ADDR_MASK);
	299	}
	300
	301
	302
	303	INLINE UINT8 GET_REGFILE(pic16c62x_state *cpustate, offs_t addr)   /* Read from internal memory */
	304	{
	305	UINT8 data;
	306
	307	if (addr == 0) {                  /* Indirect addressing  */
	308	addr = (cpustate->FSR & cpustate->picRAMmask);
	309	}
	310
	311	switch(addr)
	312	{
	313	case 0x00:   /* Not an actual register, so return 0 */
	314	case 0x80:
	315	data = 0;
	316	break;
	317	case 0x02:
	318	case 0x03:
	319	case 0x0b:
	320	case 0x82:
	321	case 0x83:
	322	case 0x8b:
	323	data = M_RDRAM(addr & 0x7f);
	324	break;
	325	case 0x84:
	326	case 0x04:   data = (cpustate->FSR | (UINT8)(~cpustate->picRAMmask));
	327	break;
	328	case 0x05:   data = P_IN(0);
	329	data &= cpustate->TRISA;
	330	data |= ((UINT8)(~cpustate->TRISA) & cpustate->PORTA);
	331	data &= 0x1f;      /* 5-bit port (only lower 5 bits used) */
	332	break;
	333	case 0x06:   data = P_IN(1);
	334	data &= cpustate->TRISB;
	335	data |= ((UINT8)(~cpustate->TRISB) & cpustate->PORTB);
	336	break;
	337	case 0x8a:
	338	case 0x0a:   data = cpustate->PCLATH;
	339	break;
	340	case 0x81:   data = cpustate->OPTION;
	341	break;
	342	case 0x85:   data = cpustate->TRISA;
	343	break;
	344	case 0x86:   data = cpustate->TRISB;
	345	break;
	346	default:   data = M_RDRAM(addr);
	347	break;
	348	}
	349	return data;
	350	}
	351
	352	INLINE void STORE_REGFILE(pic16c62x_state *cpustate, offs_t addr, UINT8 data)   /* Write to internal memory */
	353	{
	354	if (addr == 0) {                  /* Indirect addressing  */
	355	addr = (cpustate->FSR & cpustate->picRAMmask);
	356	}
	357
	358	switch(addr)
	359	{
	360	case 0x80:
	361	case 0x00:   /* Not an actual register, nothing to save */
	362	break;
	363	case 0x01:   cpustate->delay_timer = 2;      /* Timer starts after next two instructions */
	364	if (PSA == 0) cpustate->prescaler = 0;   /* Must clear the Prescaler */
	365	cpustate->TMR0 = data;
	366	break;
	367	case 0x82:
	368	case 0x02:   cpustate->PCL = data;
	369	cpustate->PC = (cpustate->PCLATH << 8) | data;
	370	break;
	371	case 0x83:
	372	case 0x03:   cpustate->STATUS &= (UINT8)(~(IRP_FLAG|RP1_FLAG|RP0_FLAG)); cpustate->STATUS |= (data & (IRP_FLAG|RP1_FLAG|RP0_FLAG));
	373	break;
	374	case 0x84:
	375	case 0x04:   cpustate->FSR = (data | (UINT8)(~cpustate->picRAMmask));
	376	break;
	377	case 0x05:   data &= 0x1f;      /* 5-bit port (only lower 5 bits used) */
	378	P_OUT(0,data & (UINT8)(~cpustate->TRISA)); cpustate->PORTA = data;
	379	break;
	380	case 0x06:   P_OUT(1,data & (UINT8)(~cpustate->TRISB)); cpustate->PORTB = data;
	381	break;
	382	case 0x8a:
	383	case 0x0a:
	384	cpustate->PCLATH = data & 0x1f;
	385	M_WRTRAM(0x0a, cpustate->PCLATH);
	386	break;
	387	case 0x8b:
	388	case 0x0b:   M_WRTRAM(0x0b, data);
	389	break;
	390	case 0x81:   cpustate->OPTION = data;
	391	M_WRTRAM(0x81, data);
	392	break;
	393	case 0x85:   if   (cpustate->TRISA != data)
	394	{
	395	cpustate->TRISA = data | 0xf0;
	396	P_OUT(2,cpustate->TRISA);
	397	P_OUT(0,cpustate->PORTA & (UINT8)(~cpustate->TRISA) & 0x0f);
	398	M_WRTRAM(addr, data);
	399	}
	400	break;
	401	case 0x86:   if   (cpustate->TRISB != data)
	402	{
	403	cpustate->TRISB = data;
	404	P_OUT(3,cpustate->TRISB);
	405	P_OUT(1,cpustate->PORTB & (UINT8)(~cpustate->TRISB));
	406	M_WRTRAM(addr, data);
	407	}
	408	break;
	409	default:   M_WRTRAM(addr, data);
	410	break;
	411	}
	412	}
	413
	414
	415	INLINE void STORE_RESULT(pic16c62x_state *cpustate, offs_t addr, UINT8 data)
	416	{
	417	if (cpustate->opcode.b.l & 0x80)
	418	{
	419	STORE_REGFILE(cpustate, addr, data);
	420	}
	421	else
	422	{
	423	cpustate->W = data;
	424	}
	425	}
	426
	427
	428	/************************************************************************
	429	*  Emulate the Instructions
	430	************************************************************************/
	431
	432	/* This following function is here to fill in the void for */
	433	/* the opcode call function. This function is never called. */
	434
	435
	436	static void illegal(pic16c62x_state *cpustate)
	437	{
	438	logerror("PIC16C62x:  PC=%03x,  Illegal opcode = %04x\n", (cpustate->PC-1), cpustate->opcode.w.l);
	439	}
	440
	441
	442	static void addwf(pic16c62x_state *cpustate)
	443	{
	444	cpustate->old_data = GET_REGFILE(cpustate, ADDR);
	445	cpustate->ALU = cpustate->old_data + cpustate->W;
	446	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	447	CALCULATE_Z_FLAG(cpustate);
	448	CALCULATE_ADD_CARRY(cpustate);
	449	CALCULATE_ADD_DIGITCARRY(cpustate);
	450	}
	451
	452	static void addlw(pic16c62x_state *cpustate)
	453	{
	454	cpustate->ALU = (cpustate->opcode.b.l & 0xff) + cpustate->W;
	455	cpustate->W = cpustate->ALU;
	456	CALCULATE_Z_FLAG(cpustate);
	457	CALCULATE_ADD_CARRY(cpustate);
	458	CALCULATE_ADD_DIGITCARRY(cpustate);
	459	}
	460
	461	static void andwf(pic16c62x_state *cpustate)
	462	{
	463	cpustate->ALU = GET_REGFILE(cpustate, ADDR) & cpustate->W;
	464	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	465	CALCULATE_Z_FLAG(cpustate);
	466	}
	467
	468	static void andlw(pic16c62x_state *cpustate)
	469	{
	470	cpustate->ALU = cpustate->opcode.b.l & cpustate->W;
	471	cpustate->W = cpustate->ALU;
	472	CALCULATE_Z_FLAG(cpustate);
	473	}
	474
	475	static void bcf(pic16c62x_state *cpustate)
	476	{
	477	cpustate->ALU = GET_REGFILE(cpustate, ADDR);
	478	cpustate->ALU &= bit_clr[POS];
	479	STORE_REGFILE(cpustate, ADDR, cpustate->ALU);
	480	}
	481
	482	static void bsf(pic16c62x_state *cpustate)
	483	{
	484	cpustate->ALU = GET_REGFILE(cpustate, ADDR);
	485	cpustate->ALU |= bit_set[POS];
	486	STORE_REGFILE(cpustate, ADDR, cpustate->ALU);
	487	}
	488
	489	static void btfss(pic16c62x_state *cpustate)
	490	{
	491	if ((GET_REGFILE(cpustate, ADDR) & bit_set[POS]) == bit_set[POS])
	492	{
	493	cpustate->PC++ ;
	494	cpustate->PCL = cpustate->PC & 0xff;
	495	cpustate->inst_cycles += 1;      /* Add NOP cycles */
	496	}
	497	}
	498
	499	static void btfsc(pic16c62x_state *cpustate)
	500	{
	501	if ((GET_REGFILE(cpustate, ADDR) & bit_set[POS]) == 0)
	502	{
	503	cpustate->PC++ ;
	504	cpustate->PCL = cpustate->PC & 0xff;
	505	cpustate->inst_cycles += 1;      /* Add NOP cycles */
	506	}
	507	}
	508
	509	static void call(pic16c62x_state *cpustate)
	510	{
	511	PUSH_STACK(cpustate, cpustate->PC);
	512	cpustate->PC = ((cpustate->PCLATH & 0x18) << 8) | (cpustate->opcode.w.l & 0x7ff);
	513	cpustate->PC &= ADDR_MASK;
	514	cpustate->PCL = cpustate->PC & 0xff;
	515	}
	516
	517	static void clrw(pic16c62x_state *cpustate)
	518	{
	519	cpustate->W = 0;
	520	SET(cpustate->STATUS, Z_FLAG);
	521	}
	522
	523	static void clrf(pic16c62x_state *cpustate)
	524	{
	525	STORE_REGFILE(cpustate, ADDR, 0);
	526	SET(cpustate->STATUS, Z_FLAG);
	527	}
	528
	529	static void clrwdt(pic16c62x_state *cpustate)
	530	{
	531	cpustate->WDT = 0;
	532	if (PSA) cpustate->prescaler = 0;
	533	SET(cpustate->STATUS, TO_FLAG);
	534	SET(cpustate->STATUS, PD_FLAG);
	535	}
	536
	537	static void comf(pic16c62x_state *cpustate)
	538	{
	539	cpustate->ALU = (UINT8)(~(GET_REGFILE(cpustate, ADDR)));
	540	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	541	CALCULATE_Z_FLAG(cpustate);
	542	}
	543
	544	static void decf(pic16c62x_state *cpustate)
	545	{
	546	cpustate->ALU = GET_REGFILE(cpustate, ADDR) - 1;
	547	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	548	CALCULATE_Z_FLAG(cpustate);
	549	}
	550
	551	static void decfsz(pic16c62x_state *cpustate)
	552	{
	553	cpustate->ALU = GET_REGFILE(cpustate, ADDR) - 1;
	554	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	555	if (cpustate->ALU == 0)
	556	{
	557	cpustate->PC++ ;
	558	cpustate->PCL = cpustate->PC & 0xff;
	559	cpustate->inst_cycles += 1;      /* Add NOP cycles */
	560	}
	561	}
	562
	563	static void goto_op(pic16c62x_state *cpustate)
	564	{
	565	cpustate->PC = ((cpustate->PCLATH & 0x18) << 8) | (cpustate->opcode.w.l & 0x7ff);
	566	cpustate->PC &= ADDR_MASK;
	567	cpustate->PCL = cpustate->PC & 0xff;
	568	}
	569
	570	static void incf(pic16c62x_state *cpustate)
	571	{
	572	cpustate->ALU = GET_REGFILE(cpustate, ADDR) + 1;
	573	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	574	CALCULATE_Z_FLAG(cpustate);
	575	}
	576
	577	static void incfsz(pic16c62x_state *cpustate)
	578	{
	579	cpustate->ALU = GET_REGFILE(cpustate, ADDR) + 1;
	580	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	581	if (cpustate->ALU == 0)
	582	{
	583	cpustate->PC++ ;
	584	cpustate->PCL = cpustate->PC & 0xff;
	585	cpustate->inst_cycles += 1;      /* Add NOP cycles */
	586	}
	587	}
	588
	589	static void iorlw(pic16c62x_state *cpustate)
	590	{
	591	cpustate->ALU = cpustate->opcode.b.l | cpustate->W;
	592	cpustate->W = cpustate->ALU;
	593	CALCULATE_Z_FLAG(cpustate);
	594	}
	595
	596	static void iorwf(pic16c62x_state *cpustate)
	597	{
	598	cpustate->ALU = GET_REGFILE(cpustate, ADDR) | cpustate->W;
	599	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	600	CALCULATE_Z_FLAG(cpustate);
	601	}
	602
	603	static void movf(pic16c62x_state *cpustate)
	604	{
	605	cpustate->ALU = GET_REGFILE(cpustate, ADDR);
	606	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	607	CALCULATE_Z_FLAG(cpustate);
	608	}
	609
	610	static void movlw(pic16c62x_state *cpustate)
	611	{
	612	cpustate->W = cpustate->opcode.b.l;
	613	}
	614
	615	static void movwf(pic16c62x_state *cpustate)
	616	{
	617	STORE_REGFILE(cpustate, ADDR, cpustate->W);
	618	}
	619
	620	static void nop(pic16c62x_state *cpustate)
	621	{
	622	/* Do nothing */
	623	}
	624
	625	static void option(pic16c62x_state *cpustate)
	626	{
	627	cpustate->OPTION = cpustate->W;
	628	}
	629
	630	static void retlw(pic16c62x_state *cpustate)
	631	{
	632	cpustate->W = cpustate->opcode.b.l;
	633	cpustate->PC = POP_STACK(cpustate);
	634	cpustate->PCL = cpustate->PC & 0xff;
	635	}
	636
	637	static void returns(pic16c62x_state *cpustate)
	638	{
	639	cpustate->PC = POP_STACK(cpustate);
	640	cpustate->PCL = cpustate->PC & 0xff;
	641	}
	642
	643	static void retfie(pic16c62x_state *cpustate)
	644	{
	645	cpustate->PC = POP_STACK(cpustate);
	646	cpustate->PCL = cpustate->PC & 0xff;
	647	//INTCON(7)=1;
	648	}
	649
	650	static void rlf(pic16c62x_state *cpustate)
	651	{
	652	cpustate->ALU = GET_REGFILE(cpustate, ADDR);
	653	cpustate->ALU <<= 1;
	654	if (cpustate->STATUS & C_FLAG) cpustate->ALU |= 1;
	655	if (GET_REGFILE(cpustate, ADDR) & 0x80) SET(cpustate->STATUS, C_FLAG);
	656	else CLR(cpustate->STATUS, C_FLAG);
	657	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	658	}
	659
	660	static void rrf(pic16c62x_state *cpustate)
	661	{
	662	cpustate->ALU = GET_REGFILE(cpustate, ADDR);
	663	cpustate->ALU >>= 1;
	664	if (cpustate->STATUS & C_FLAG) cpustate->ALU |= 0x80;
	665	if (GET_REGFILE(cpustate, ADDR) & 1) SET(cpustate->STATUS, C_FLAG);
	666	else CLR(cpustate->STATUS, C_FLAG);
	667	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	668	}
	669
	670	static void sleepic(pic16c62x_state *cpustate)
	671	{
	672	if (WDTE) cpustate->WDT = 0;
	673	if (PSA) cpustate->prescaler = 0;
	674	SET(cpustate->STATUS, TO_FLAG);
	675	CLR(cpustate->STATUS, PD_FLAG);
	676	}
	677
	678	static void subwf(pic16c62x_state *cpustate)
	679	{
	680	cpustate->old_data = GET_REGFILE(cpustate, ADDR);
	681	cpustate->ALU = cpustate->old_data - cpustate->W;
	682	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	683	CALCULATE_Z_FLAG(cpustate);
	684	CALCULATE_SUB_CARRY(cpustate);
	685	CALCULATE_SUB_DIGITCARRY(cpustate);
	686	}
	687
	688	static void sublw(pic16c62x_state *cpustate)
	689	{
	690	cpustate->ALU = (cpustate->opcode.b.l & 0xff) - cpustate->W;
	691	cpustate->W = cpustate->ALU;
	692	CALCULATE_Z_FLAG(cpustate);
	693	CALCULATE_SUB_CARRY(cpustate);
	694	CALCULATE_SUB_DIGITCARRY(cpustate);
	695	}
	696
	697	static void swapf(pic16c62x_state *cpustate)
	698	{
	699	cpustate->ALU  = ((GET_REGFILE(cpustate, ADDR) << 4) & 0xf0);
	700	cpustate->ALU |= ((GET_REGFILE(cpustate, ADDR) >> 4) & 0x0f);
	701	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	702	}
	703
	704	static void tris(pic16c62x_state *cpustate)
	705	{
	706
	707	switch(cpustate->opcode.b.l & 0x7)
	708	{
	709	case 05:   STORE_REGFILE(cpustate, 0x85, cpustate->W); break;
	710	case 06:   STORE_REGFILE(cpustate, 0x86, cpustate->W); break;
	711	default:   illegal(cpustate); break;
	712	}
	713	}
	714
	715	static void xorlw(pic16c62x_state *cpustate)
	716	{
	717	cpustate->ALU = cpustate->W ^ cpustate->opcode.b.l;
	718	cpustate->W = cpustate->ALU;
	719	CALCULATE_Z_FLAG(cpustate);
	720	}
	721
	722	static void xorwf(pic16c62x_state *cpustate)
	723	{
	724	cpustate->ALU = GET_REGFILE(cpustate, ADDR) ^ cpustate->W;
	725	STORE_RESULT(cpustate, ADDR, cpustate->ALU);
	726	CALCULATE_Z_FLAG(cpustate);
	727	}
	728
	729
	730	/***********************************************************************
	731	*  Instruction Table (Format, Instruction, Cycles)
	732	***********************************************************************/
	733
	734	static const pic16c62x_instruction instructiontable[]=
	735	{
	736	{(char *)"000111dfffffff", addwf, 1},
	737	{(char *)"000101dfffffff", andwf, 1},
	738	{(char *)"0000011fffffff", clrf, 1},
	739	{(char *)"00000100000011", clrw, 1},
	740	{(char *)"001001dfffffff", comf, 1},
	741	{(char *)"000011dfffffff", decf, 1},
	742	{(char *)"001011dfffffff", decfsz, 1},
	743	{(char *)"001010dfffffff", incf, 1},
	744	{(char *)"001111dfffffff", incfsz, 1},
	745	{(char *)"000100dfffffff", iorwf, 1},
	746	{(char *)"001000dfffffff", movf, 1},
	747	{(char *)"0000001fffffff", movwf, 1},
	748	{(char *)"0000000xx00000", nop, 1},
	749	{(char *)"001101dfffffff", rlf, 1},
	750	{(char *)"001100dfffffff", rrf, 1},
	751	{(char *)"000010dfffffff", subwf, 1},
	752	{(char *)"001110dfffffff", swapf, 1},
	753	{(char *)"000110dfffffff", xorwf, 1},
	754	{(char *)"0100bbbfffffff", bcf, 1},
	755	{(char *)"0101bbbfffffff", bsf, 1},
	756	{(char *)"0110bbbfffffff", btfsc, 1},
	757	{(char *)"0111bbbfffffff", btfss, 1},
	758	{(char *)"11111xkkkkkkkk", addlw, 1},
	759	{(char *)"111001kkkkkkkk", andlw, 1},
	760	{(char *)"100aaaaaaaaaaa", call, 2},
	761	{(char *)"101aaaaaaaaaaa", goto_op, 2},
	762	{(char *)"111000kkkkkkkk", iorlw, 1},
	763	{(char *)"1100xxkkkkkkkk", movlw, 1},
	764	{(char *)"00000000001001", retfie, 2},
	765	{(char *)"1101xxkkkkkkkk", retlw, 2},
	766	{(char *)"00000000001000", returns, 2},
	767	{(char *)"00000001100011", sleepic, 1},
	768	{(char *)"11110xkkkkkkkk", sublw, 1},
	769	{(char *)"111010kkkkkkkk", xorlw, 1},
	770	{(char *)"00000001100100", clrwdt, 1},
	771	{(char *)"00000001100010", option, 1},      // deprecated
	772	{(char *)"00000001100fff", tris, 1},      // deprecated
	773	{NULL, NULL, 0}
	774	};
	775
	776	/***********************************************************************
	777	*  Opcode Table (Cycles, Instruction)
	778	***********************************************************************/
	779
	780	static pic16c62x_opcode opcode_table[16384];
	781
	782	/***********************************************************************
	783	*  Opcode Table build function
	784	***********************************************************************/
	785
	786	static void build_opcode_table(void)
	787	{
	788	int instr,mask,bits;
	789	int a;
	790
	791	// defaults
	792	for ( a = 0; a < 16384; a++)
	793	{
	794	opcode_table[a].cycles = 0;
	795	opcode_table[a].function = illegal;
	796	}
	797	// build table
	798	for( instr = 0; instructiontable[instr].cycles != 0; instr++)
	799	{
	800	bits=0;
	801	mask=0;
	802	for ( a = 0; a < 14; a++)
	803	{
	804	switch (instructiontable[instr].format[a])
	805	{
	806	case '0':
	807	bits = bits << 1;
	808	mask = (mask << 1) | 1;
	809	break;
	810	case '1':
	811	bits = (bits << 1) | 1;
	812	mask = (mask << 1) | 1;
	813	break;
	814	default:
	815	bits = bits << 1;
	816	mask = mask << 1;
	817	break;
	818	}
	819	}
	820	for ( a = 0; a < 16384; a++)
	821	{
	822	if (((a & mask) == bits) && (opcode_table[a].cycles == 0))
	823	{
	824	opcode_table[a].cycles = instructiontable[instr].cycles;
	825	opcode_table[a].function = instructiontable[instr].function;
	826	}
	827	}
	828	}
	829	}
	830
	831	/****************************************************************************
	832	*  Inits CPU emulation
	833	****************************************************************************/
	834
	835	static CPU_INIT( pic16c62x )
	836	{
	837	pic16c62x_state *cpustate = get_safe_token(device);
	838
	839	cpustate->device = device;
	840	cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
	841	cpustate->data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
	842	cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO);
	843
	844	cpustate->CONFIG = 0x3fff;
	845
	846	/* ensure the internal ram pointers are set before get_info is called */
	847	update_internalram_ptr(cpustate);
	848
	849	build_opcode_table();
	850
	851	state_save_register_device_item(device, 0, cpustate->W);
	852	state_save_register_device_item(device, 0, cpustate->ALU);
	853	state_save_register_device_item(device, 0, cpustate->OPTION);
	854	state_save_register_device_item(device, 0, cpustate->PCLATH);
	855	state_save_register_device_item(device, 0, cpustate->TMR0);
	856	state_save_register_device_item(device, 0, cpustate->PCL);
	857	state_save_register_device_item(device, 0, cpustate->STATUS);
	858	state_save_register_device_item(device, 0, cpustate->FSR);
	859	state_save_register_device_item(device, 0, cpustate->PORTA);
	860	state_save_register_device_item(device, 0, cpustate->PORTB);
	861	state_save_register_device_item(device, 0, cpustate->TRISA);
	862	state_save_register_device_item(device, 0, cpustate->TRISB);
	863	state_save_register_device_item(device, 0, cpustate->old_T0);
	864	state_save_register_device_item(device, 0, cpustate->old_data);
	865	state_save_register_device_item(device, 0, cpustate->picRAMmask);
	866	state_save_register_device_item(device, 0, cpustate->WDT);
	867	state_save_register_device_item(device, 0, cpustate->prescaler);
	868	state_save_register_device_item(device, 0, cpustate->STACK[0]);
	869	state_save_register_device_item(device, 0, cpustate->STACK[1]);
	870	state_save_register_device_item(device, 0, cpustate->STACK[2]);
	871	state_save_register_device_item(device, 0, cpustate->STACK[3]);
	872	state_save_register_device_item(device, 0, cpustate->STACK[4]);
	873	state_save_register_device_item(device, 0, cpustate->STACK[5]);
	874	state_save_register_device_item(device, 0, cpustate->STACK[6]);
	875	state_save_register_device_item(device, 0, cpustate->STACK[7]);
	876	state_save_register_device_item(device, 0, cpustate->PC);
	877	state_save_register_device_item(device, 0, cpustate->PREVPC);
	878	state_save_register_device_item(device, 0, cpustate->CONFIG);
	879	state_save_register_device_item(device, 0, cpustate->opcode.d);
	880	state_save_register_device_item(device, 0, cpustate->delay_timer);
	881	state_save_register_device_item(device, 0, cpustate->picmodel);
	882	state_save_register_device_item(device, 0, cpustate->reset_vector);
	883
	884	state_save_register_device_item(device, 0, cpustate->icount);
	885	state_save_register_device_item(device, 0, cpustate->temp_config);
	886	state_save_register_device_item(device, 0, cpustate->inst_cycles);
	887	}
	888
	889
	890	/****************************************************************************
	891	*  Reset registers to their initial values
	892	****************************************************************************/
	893
	894	static void pic16c62x_reset_regs(pic16c62x_state *cpustate)
	895	{
	896	cpustate->PC     = cpustate->reset_vector;
	897	cpustate->TRISA  = 0x1f;
	898	cpustate->TRISB  = 0xff;
	899	cpustate->OPTION = 0xff;
	900	cpustate->STATUS = 0x18;
	901	cpustate->PCL    = 0;
	902	cpustate->FSR   |= (UINT8)(~cpustate->picRAMmask);
	903	cpustate->PORTA  = 0;
	904	cpustate->prescaler = 0;
	905	cpustate->delay_timer = 0;
	906	cpustate->old_T0 = 0;
	907	cpustate->inst_cycles = 0;
	908	PIC16C62x_RAM_WRMEM(0x85,cpustate->TRISA);
	909	PIC16C62x_RAM_WRMEM(0x86,cpustate->TRISB);
	910	PIC16C62x_RAM_WRMEM(0x81,cpustate->OPTION);
	911	}
	912
	913	static void pic16c62x_soft_reset(pic16c62x_state *cpustate)
	914	{
	915	SET(cpustate->STATUS, (TO_FLAG | PD_FLAG | Z_FLAG | DC_FLAG | C_FLAG));
	916	pic16c62x_reset_regs(cpustate);
	917	}
	918
	919	void pic16c62x_set_config(const device_config *cpu, int data)
	920	{
	921	pic16c62x_state *cpustate = get_safe_token(cpu);
	922
	923	logerror("Writing %04x to the PIC16C62x configuration bits\n",data);
	924	cpustate->CONFIG = (data & 0x3fff);
	925	}
	926
	927
	928	/****************************************************************************
	929	*  Shut down CPU emulation
	930	****************************************************************************/
	931
	932	static CPU_EXIT( pic16c62x )
	933	{
	934	/* nothing to do */
	935	}
	936
	937
	938	/****************************************************************************
	939	*  WatchDog
	940	****************************************************************************/
	941
	942	static void pic16c62x_update_watchdog(pic16c62x_state *cpustate, int counts)
	943	{
	944	/* TODO: needs updating */
	945	/* WatchDog is set up to count 18,000 (0x464f hex) ticks to provide */
	946	/* the timeout period of 0.018ms based on a 4MHz input clock. */
	947	/* Note: the 4MHz clock should be divided by the PIC16C5x_CLOCK_DIVIDER */
	948	/* which effectively makes the PIC run at 1MHz internally. */
	949
	950	/* If the current instruction is CLRWDT or SLEEP, don't update the WDT */
	951
	952	if ((cpustate->opcode.w.l != 0x64) && (cpustate->opcode.w.l != 0x63))
	953	{
	954	UINT16 old_WDT = cpustate->WDT;
	955
	956	cpustate->WDT -= counts;
	957
	958	if (cpustate->WDT > 0x464f) {
	959	cpustate->WDT = 0x464f - (0xffff - cpustate->WDT);
	960	}
	961
	962	if (((old_WDT != 0) && (old_WDT < cpustate->WDT)) || (cpustate->WDT == 0))
	963	{
	964	if (PSA) {
	965	cpustate->prescaler++;
	966	if (cpustate->prescaler >= (1 << PS)) {   /* Prescale values from 1 to 128 */
	967	cpustate->prescaler = 0;
	968	CLR(cpustate->STATUS, TO_FLAG);
	969	pic16c62x_soft_reset(cpustate);
	970	}
	971	}
	972	else {
	973	CLR(cpustate->STATUS, TO_FLAG);
	974	pic16c62x_soft_reset(cpustate);
	975	}
	976	}
	977	}
	978	}
	979
	980
	981	/****************************************************************************
	982	*  Update Timer
	983	****************************************************************************/
	984
	985	static void pic16c62x_update_timer(pic16c62x_state *cpustate, int counts)
	986	{
	987	if (PSA == 0) {
	988	cpustate->prescaler += counts;
	989	if (cpustate->prescaler >= (2 << PS)) {   /* Prescale values from 2 to 256 */
	990	cpustate->TMR0 += (cpustate->prescaler / (2 << PS));
	991	cpustate->prescaler %= (2 << PS);   /* Overflow prescaler */
	992	}
	993	}
	994	else {
	995	cpustate->TMR0 += counts;
	996	}
	997	}
	998
	999
	1000	/****************************************************************************
	1001	*  Execute IPeriod. Return 0 if emulation should be stopped
	1002	****************************************************************************/
	1003
	1004	static CPU_EXECUTE( pic16c62x )
	1005	{
	1006	pic16c62x_state *cpustate = get_safe_token(device);
	1007	UINT8 T0_in;
	1008
	1009	update_internalram_ptr(cpustate);
	1010
	1011	cpustate->icount = cycles;
	1012
	1013	do
	1014	{
	1015	if (PD == 0)                  /* Sleep Mode */
	1016	{
	1017	cpustate->inst_cycles = 1;
	1018	debugger_instruction_hook(device, cpustate->PC);
	1019	if (WDTE) {
	1020	pic16c62x_update_watchdog(cpustate, 1);
	1021	}
	1022	}
	1023	else
	1024	{
	1025	cpustate->PREVPC = cpustate->PC;
	1026
	1027	debugger_instruction_hook(device, cpustate->PC);
	1028
	1029	cpustate->opcode.d = M_RDOP(cpustate->PC);
	1030	cpustate->PC++;
	1031	cpustate->PCL++;
	1032
	1033	cpustate->inst_cycles = opcode_table[cpustate->opcode.w.l & 16383].cycles;
	1034	(*opcode_table[cpustate->opcode.w.l & 16383].function)(cpustate);
	1035
	1036	if (T0CS) {                  /* Count mode */
	1037	T0_in = S_T0_IN;
	1038	if (T0_in) T0_in = 1;
	1039	if (T0SE) {               /* Count falling edge T0 input */
	1040	if (FALLING_EDGE_T0) {
	1041	pic16c62x_update_timer(cpustate, 1);
	1042	}
	1043	}
	1044	else {                  /* Count rising edge T0 input */
	1045	if (RISING_EDGE_T0) {
	1046	pic16c62x_update_timer(cpustate, 1);
	1047	}
	1048	}
	1049	cpustate->old_T0 = T0_in;
	1050	}
	1051	else {                     /* Timer mode */
	1052	if (cpustate->delay_timer) {
	1053	cpustate->delay_timer--;
	1054	}
	1055	else {
	1056	pic16c62x_update_timer(cpustate, cpustate->inst_cycles);
	1057	}
	1058	}
	1059	if (WDTE) {
	1060	pic16c62x_update_watchdog(cpustate, cpustate->inst_cycles);
	1061	}
	1062	}
	1063
	1064	cpustate->icount -= cpustate->inst_cycles;
	1065
	1066	} while (cpustate->icount > 0);
	1067
	1068	return cycles - cpustate->icount;
	1069	}
	1070
	1071
	1072
	1073	/**************************************************************************
	1074	*  Generic set_info
	1075	**************************************************************************/
	1076
	1077	static CPU_SET_INFO( pic16c62x )
	1078	{
	1079	pic16c62x_state *cpustate = get_safe_token(device);
	1080
	1081	switch (state)
	1082	{
	1083	/* --- the following bits of info are set as 64-bit signed integers --- */
	1084	case CPUINFO_INT_PC:
	1085	case CPUINFO_INT_REGISTER + PIC16C62x_PC:      cpustate->PC = info->i; cpustate->PCL = info->i & 0xff ;break;
	1086	/* This is actually not a stack pointer, but the stack contents */
	1087	/* Stack is a 8 level First In Last Out stack */
	1088	case CPUINFO_INT_SP:
	1089	case CPUINFO_INT_REGISTER + PIC16C62x_STK7:      cpustate->STACK[7] = info->i;               break;
	1090	case CPUINFO_INT_REGISTER + PIC16C62x_STK6:      cpustate->STACK[6] = info->i;               break;
	1091	case CPUINFO_INT_REGISTER + PIC16C62x_STK5:      cpustate->STACK[5] = info->i;               break;
	1092	case CPUINFO_INT_REGISTER + PIC16C62x_STK4:      cpustate->STACK[4] = info->i;               break;
	1093	case CPUINFO_INT_REGISTER + PIC16C62x_STK3:      cpustate->STACK[3] = info->i;               break;
	1094	case CPUINFO_INT_REGISTER + PIC16C62x_STK2:      cpustate->STACK[2] = info->i;               break;
	1095	case CPUINFO_INT_REGISTER + PIC16C62x_STK1:      cpustate->STACK[1] = info->i;               break;
	1096	case CPUINFO_INT_REGISTER + PIC16C62x_STK0:      cpustate->STACK[0] = info->i;               break;
	1097	case CPUINFO_INT_REGISTER + PIC16C62x_W:      cpustate->W      = info->i;                  break;
	1098	case CPUINFO_INT_REGISTER + PIC16C62x_ALU:      cpustate->ALU    = info->i;                  break;
	1099	case CPUINFO_INT_REGISTER + PIC16C62x_OPT:      cpustate->OPTION = info->i & (RBPU_FLAG | INTEDG_FLAG | T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG);   break;
	1100	case CPUINFO_INT_REGISTER + PIC16C62x_TMR0:      cpustate->TMR0   = info->i;                  break;
	1101	case CPUINFO_INT_REGISTER + PIC16C62x_WDT:      cpustate->WDT    = info->i;                  break;
	1102	case CPUINFO_INT_REGISTER + PIC16C62x_PSCL:      cpustate->prescaler = info->i;               break;
	1103	case CPUINFO_INT_REGISTER + PIC16C62x_PRTA:      cpustate->PORTA  = info->i & 0x1f;            break;
	1104	case CPUINFO_INT_REGISTER + PIC16C62x_PRTB:      cpustate->PORTB  = info->i;                  break;
	1105	case CPUINFO_INT_REGISTER + PIC16C62x_FSR:      cpustate->FSR    = ((info->i & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask));   break;
	1106	}
	1107	}
	1108
	1109
	1110
	1111	/**************************************************************************
	1112	*  Generic get_info
	1113	**************************************************************************/
	1114
	1115	static CPU_GET_INFO( pic16c62x )
	1116	{
	1117	pic16c62x_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
	1118
	1119	switch (state)
	1120	{
	1121	/* --- the following bits of info are returned as 64-bit signed integers --- */
	1122	case CPUINFO_INT_CONTEXT_SIZE:               info->i = sizeof(pic16c62x_state);   break;
	1123	case CPUINFO_INT_INPUT_LINES:               info->i = 1;                  break;
	1124	case CPUINFO_INT_DEFAULT_IRQ_VECTOR:         info->i = 0;                  break;
	1125	case DEVINFO_INT_ENDIANNESS:               info->i = ENDIANNESS_LITTLE;      break;
	1126	case CPUINFO_INT_CLOCK_MULTIPLIER:            info->i = 1;                  break;
	1127	case CPUINFO_INT_CLOCK_DIVIDER:               info->i = 4;                  break;
	1128	case CPUINFO_INT_MIN_INSTRUCTION_BYTES:         info->i = 2;                  break;
	1129	case CPUINFO_INT_MAX_INSTRUCTION_BYTES:         info->i = 2;                  break;
	1130	case CPUINFO_INT_MIN_CYCLES:               info->i = 1;                  break;
	1131	case CPUINFO_INT_MAX_CYCLES:               info->i = 2;                  break;
	1132
	1133	case CPUINFO_INT_DATABUS_WIDTH_PROGRAM:         info->i = 16;                  break;
	1134	case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM:         info->i = 12;                  break;
	1135	case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM:         info->i = -1;                  break;
	1136	case CPUINFO_INT_DATABUS_WIDTH_DATA:         info->i = 8;                  break;
	1137	case CPUINFO_INT_ADDRBUS_WIDTH_DATA:         info->i = 8;                  break;
	1138	case CPUINFO_INT_ADDRBUS_SHIFT_DATA:         info->i = 0;                  break;
	1139	case CPUINFO_INT_DATABUS_WIDTH_IO:            info->i = 8;                  break;
	1140	case CPUINFO_INT_ADDRBUS_WIDTH_IO:            info->i = 5;                  break;
	1141	case CPUINFO_INT_ADDRBUS_SHIFT_IO:            info->i = 0;                  break;
	1142
	1143	case CPUINFO_INT_PREVIOUSPC:               info->i = cpustate->PREVPC;                  break;
	1144
	1145	case CPUINFO_INT_PC:
	1146	case CPUINFO_INT_REGISTER + PIC16C62x_PC:      info->i = cpustate->PC;                     break;
	1147	/* This is actually not a stack pointer, but the stack contents */
	1148	case CPUINFO_INT_SP:
	1149	case CPUINFO_INT_REGISTER + PIC16C62x_STK7:      info->i = cpustate->STACK[7];               break;
	1150	case CPUINFO_INT_REGISTER + PIC16C62x_STK6:      info->i = cpustate->STACK[6];               break;
	1151	case CPUINFO_INT_REGISTER + PIC16C62x_STK5:      info->i = cpustate->STACK[5];               break;
	1152	case CPUINFO_INT_REGISTER + PIC16C62x_STK4:      info->i = cpustate->STACK[4];               break;
	1153	case CPUINFO_INT_REGISTER + PIC16C62x_STK3:      info->i = cpustate->STACK[3];               break;
	1154	case CPUINFO_INT_REGISTER + PIC16C62x_STK2:      info->i = cpustate->STACK[2];               break;
	1155	case CPUINFO_INT_REGISTER + PIC16C62x_STK1:      info->i = cpustate->STACK[1];               break;
	1156	case CPUINFO_INT_REGISTER + PIC16C62x_STK0:      info->i = cpustate->STACK[0];               break;
	1157	case CPUINFO_INT_REGISTER + PIC16C62x_W:         info->i = cpustate->W;                     break;
	1158	case CPUINFO_INT_REGISTER + PIC16C62x_ALU:      info->i = cpustate->ALU;                  break;
	1159	case CPUINFO_INT_REGISTER + PIC16C62x_STR:      info->i = cpustate->STATUS;                  break;
	1160	case CPUINFO_INT_REGISTER + PIC16C62x_OPT:      info->i = cpustate->OPTION;                  break;
	1161	case CPUINFO_INT_REGISTER + PIC16C62x_TMR0:      info->i = cpustate->TMR0;                  break;
	1162	case CPUINFO_INT_REGISTER + PIC16C62x_WDT:      info->i = cpustate->WDT;                  break;
	1163	case CPUINFO_INT_REGISTER + PIC16C62x_PSCL:      info->i = cpustate->prescaler;               break;
	1164	case CPUINFO_INT_REGISTER + PIC16C62x_PRTA:      info->i = cpustate->PORTA;                  break;
	1165	case CPUINFO_INT_REGISTER + PIC16C62x_PRTB:      info->i = cpustate->PORTB;                  break;
	1166	case CPUINFO_INT_REGISTER + PIC16C62x_FSR:      info->i = ((cpustate->FSR & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask));   break;
	1167
	1168	/* --- the following bits of info are returned as pointers to data or functions --- */
	1169	case CPUINFO_FCT_SET_INFO:                  info->setinfo = CPU_SET_INFO_NAME(pic16c62x);   break;
	1170	case CPUINFO_FCT_INIT:                     info->init = CPU_INIT_NAME(pic16c62x);         break;
	1171	case CPUINFO_FCT_RESET:                     /* set per-CPU */                        break;
	1172	case CPUINFO_FCT_EXIT:                     info->exit = CPU_EXIT_NAME(pic16c62x);         break;
	1173	case CPUINFO_FCT_EXECUTE:                  info->execute = CPU_EXECUTE_NAME(pic16c62x);      break;
	1174	case CPUINFO_FCT_BURN:                     info->burn = NULL;                        break;
	1175	case CPUINFO_FCT_DISASSEMBLE:               info->disassemble = CPU_DISASSEMBLE_NAME(pic16c62x);   break;
	1176	case CPUINFO_PTR_INSTRUCTION_COUNTER:         info->icount = &cpustate->icount;            break;
	1177
	1178	/* --- the following bits of info are returned as NULL-terminated strings --- */
	1179	case DEVINFO_STR_NAME:                     strcpy(info->s, "PIC16C62x");               break;
	1180	case DEVINFO_STR_FAMILY:                  strcpy(info->s, "Microchip");               break;
	1181	case DEVINFO_STR_VERSION:                  strcpy(info->s, "1.0");                  break;
	1182	case DEVINFO_STR_SOURCE_FILE:               strcpy(info->s, __FILE__);                  break;
	1183	case DEVINFO_STR_CREDITS:                  strcpy(info->s, "Copyright Tony La Porta");      break;
	1184
	1185	case CPUINFO_STR_FLAGS:
	1186	sprintf(info->s, "%01x%c%c%c%c%c %c%c%c%03x",
	1187	(cpustate->STATUS & 0xe0) >> 5,         /* Register bank */
	1188	cpustate->STATUS & 0x10 ? '.':'O',      /* WDT Overflow */
	1189	cpustate->STATUS & 0x08 ? 'P':'D',      /* Power/Down */
	1190	cpustate->STATUS & 0x04 ? 'Z':'.',      /* Zero */
	1191	cpustate->STATUS & 0x02 ? 'c':'b',      /* Nibble Carry/Borrow */
	1192	cpustate->STATUS & 0x01 ? 'C':'B',      /* Carry/Borrow */
	1193
	1194	cpustate->OPTION & 0x20 ? 'C':'T',      /* Counter/Timer */
	1195	cpustate->OPTION & 0x10 ? 'N':'P',      /* Negative/Positive */
	1196	cpustate->OPTION & 0x08 ? 'W':'T',      /* WatchDog/Timer */
	1197	cpustate->OPTION & 0x08 ? (1<<(cpustate->OPTION&7)) : (2<<(cpustate->OPTION&7)) );
	1198	break;
	1199
	1200	case CPUINFO_STR_REGISTER + PIC16C62x_PC:      sprintf(info->s, "PC:%03X",   cpustate->PC);            break;
	1201	case CPUINFO_STR_REGISTER + PIC16C62x_W:         sprintf(info->s, "W:%02X",    cpustate->W);               break;
	1202	case CPUINFO_STR_REGISTER + PIC16C62x_ALU:      sprintf(info->s, "ALU:%02X",  cpustate->ALU);            break;
	1203	case CPUINFO_STR_REGISTER + PIC16C62x_STR:      sprintf(info->s, "STR:%02X",  cpustate->STATUS);         break;
	1204	case CPUINFO_STR_REGISTER + PIC16C62x_TMR0:      sprintf(info->s, "TMR:%02X",  cpustate->TMR0);            break;
	1205	case CPUINFO_STR_REGISTER + PIC16C62x_WDT:      sprintf(info->s, "WDT:%04X",  cpustate->WDT);            break;
	1206	case CPUINFO_STR_REGISTER + PIC16C62x_OPT:      sprintf(info->s, "OPT:%02X",  cpustate->OPTION);         break;
	1207	case CPUINFO_STR_REGISTER + PIC16C62x_STK0:      sprintf(info->s, "STK0:%03X", cpustate->STACK[0]);         break;
	1208	case CPUINFO_STR_REGISTER + PIC16C62x_STK1:      sprintf(info->s, "STK1:%03X", cpustate->STACK[1]);         break;
	1209	case CPUINFO_STR_REGISTER + PIC16C62x_STK2:      sprintf(info->s, "STK2:%03X", cpustate->STACK[2]);         break;
	1210	case CPUINFO_STR_REGISTER + PIC16C62x_STK3:      sprintf(info->s, "STK3:%03X", cpustate->STACK[3]);         break;
	1211	case CPUINFO_STR_REGISTER + PIC16C62x_STK4:      sprintf(info->s, "STK4:%03X", cpustate->STACK[4]);         break;
	1212	case CPUINFO_STR_REGISTER + PIC16C62x_STK5:      sprintf(info->s, "STK5:%03X", cpustate->STACK[5]);         break;
	1213	case CPUINFO_STR_REGISTER + PIC16C62x_STK6:      sprintf(info->s, "STK6:%03X", cpustate->STACK[6]);         break;
	1214	case CPUINFO_STR_REGISTER + PIC16C62x_STK7:      sprintf(info->s, "STK7:%03X", cpustate->STACK[7]);         break;
	1215	case CPUINFO_STR_REGISTER + PIC16C62x_PRTA:      sprintf(info->s, "PRTA:%01X", ((cpustate->PORTA) & 0x1f));   break;
	1216	case CPUINFO_STR_REGISTER + PIC16C62x_PRTB:      sprintf(info->s, "PRTB:%02X", cpustate->PORTB);            break;
	1217	case CPUINFO_STR_REGISTER + PIC16C62x_TRSA:      sprintf(info->s, "TRSA:%01X", ((cpustate->TRISA) & 0x1f));   break;
	1218	case CPUINFO_STR_REGISTER + PIC16C62x_TRSB:      sprintf(info->s, "TRSB:%02X", cpustate->TRISB);            break;
	1219	case CPUINFO_STR_REGISTER + PIC16C62x_FSR:      sprintf(info->s, "FSR:%02X",  ((cpustate->FSR) & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask));   break;
	1220	case CPUINFO_STR_REGISTER + PIC16C62x_PSCL:      sprintf(info->s, "PSCL:%c%02X", ((cpustate->OPTION & 0x08) ? 'W':'T'), cpustate->prescaler);   break;
	1221	}
	1222	}
	1223
	1224
	1225	/****************************************************************************
	1226	*  PIC16C620
	1227	****************************************************************************/
	1228	/****************************************************************************
	1229	*  Internal Memory Map
	1230	****************************************************************************/
	1231
	1232	static ADDRESS_MAP_START( pic16c620_rom, ADDRESS_SPACE_PROGRAM, 16 )
	1233	AM_RANGE(0x000, 0x1ff) AM_ROM
	1234	ADDRESS_MAP_END
	1235
	1236	static ADDRESS_MAP_START( pic16c620_ram, ADDRESS_SPACE_DATA, 8 )
	1237	AM_RANGE(0x00, 0x06) AM_RAM
	1238	AM_RANGE(0x0a, 0x0c) AM_RAM
	1239	AM_RANGE(0x1f, 0x6f) AM_RAM
	1240	AM_RANGE(0x80, 0x86) AM_RAM
	1241	AM_RANGE(0x8a, 0x8e) AM_RAM
	1242	AM_RANGE(0x9f, 0x9f) AM_RAM
	1243	ADDRESS_MAP_END
	1244
	1245
	1246	/****************************************************************************
	1247	*  PIC16C620 Reset
	1248	****************************************************************************/
	1249
	1250	static CPU_RESET( pic16c620 )
	1251	{
	1252	pic16c62x_state *cpustate = get_safe_token(device);
	1253
	1254	update_internalram_ptr(cpustate);
	1255
	1256	cpustate->picmodel = 0x16C620;
	1257	cpustate->picRAMmask = 0xff;
	1258	cpustate->reset_vector = 0x0;
	1259	pic16c62x_reset_regs(cpustate);
	1260	SET(cpustate->STATUS, (TO_FLAG | PD_FLAG));
	1261	}
	1262
	1263
	1264	/**************************************************************************
	1265	*  CPU-specific get_info
	1266	**************************************************************************/
	1267
	1268	CPU_GET_INFO( pic16c620 )
	1269	{
	1270	switch (state)
	1271	{
	1272	case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM:         info->i = 9;                     break;
	1273	case CPUINFO_INT_ADDRBUS_WIDTH_DATA:         info->i = 8;                     break;
	1274
	1275	/* --- the following bits of info are returned as pointers to data or functions --- */
	1276	case CPUINFO_FCT_RESET:                     info->reset = CPU_RESET_NAME(pic16c620);               break;
	1277	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:   info->internal_map16 = ADDRESS_MAP_NAME(pic16c620_rom);   break;
	1278	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:      info->internal_map8 = ADDRESS_MAP_NAME(pic16c620_ram);   break;
	1279
	1280	/* --- the following bits of info are returned as NULL-terminated strings --- */
	1281	case DEVINFO_STR_NAME:                     strcpy(info->s, "PIC16C620");         break;
	1282
	1283	default:                              CPU_GET_INFO_CALL(pic16c62x);         break;
	1284	}
	1285	}
	1286
	1287
	1288	/****************************************************************************
	1289	*  PIC16C621
	1290	****************************************************************************/
	1291	/****************************************************************************
	1292	*  Internal Memory Map
	1293	****************************************************************************/
	1294
	1295	static ADDRESS_MAP_START( pic16c621_rom, ADDRESS_SPACE_PROGRAM, 16 )
	1296	AM_RANGE(0x000, 0x3ff) AM_ROM
	1297	ADDRESS_MAP_END
	1298
	1299	static ADDRESS_MAP_START( pic16c621_ram, ADDRESS_SPACE_DATA, 8 )
	1300	AM_RANGE(0x00, 0x06) AM_RAM
	1301	AM_RANGE(0x0a, 0x0c) AM_RAM
	1302	AM_RANGE(0x1f, 0x6f) AM_RAM
	1303	AM_RANGE(0x80, 0x86) AM_RAM
	1304	AM_RANGE(0x8a, 0x8e) AM_RAM
	1305	AM_RANGE(0x9f, 0x9f) AM_RAM
	1306	ADDRESS_MAP_END
	1307
	1308
	1309	/****************************************************************************
	1310	*  PIC16C621 Reset
	1311	****************************************************************************/
	1312
	1313	static CPU_RESET( pic16c621 )
	1314	{
	1315	pic16c62x_state *cpustate = get_safe_token(device);
	1316
	1317	update_internalram_ptr(cpustate);
	1318
	1319	cpustate->picmodel = 0x16C621;
	1320	cpustate->picRAMmask = 0xff;
	1321	cpustate->reset_vector = 0x0;
	1322	pic16c62x_reset_regs(cpustate);
	1323	SET(cpustate->STATUS, (TO_FLAG | PD_FLAG));
	1324	}
	1325
	1326
	1327	/**************************************************************************
	1328	*  CPU-specific get_info
	1329	**************************************************************************/
	1330
	1331	CPU_GET_INFO( pic16c621 )
	1332	{
	1333	switch (state)
	1334	{
	1335	case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM:         info->i = 10;                     break;
	1336	case CPUINFO_INT_ADDRBUS_WIDTH_DATA:         info->i = 8;                     break;
	1337
	1338	/* --- the following bits of info are returned as pointers to data or functions --- */
	1339	case CPUINFO_FCT_RESET:                     info->reset = CPU_RESET_NAME(pic16c621);               break;
	1340	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:   info->internal_map16 = ADDRESS_MAP_NAME(pic16c621_rom);   break;
	1341	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:      info->internal_map8 = ADDRESS_MAP_NAME(pic16c621_ram);   break;
	1342
	1343	/* --- the following bits of info are returned as NULL-terminated strings --- */
	1344	case DEVINFO_STR_NAME:                     strcpy(info->s, "PIC16C621");         break;
	1345
	1346	default:                              CPU_GET_INFO_CALL(pic16c62x);         break;
	1347	}
	1348	}
	1349
	1350
	1351	/****************************************************************************
	1352	*  PIC16C622
	1353	****************************************************************************/
	1354	/****************************************************************************
	1355	*  Internal Memory Map
	1356	****************************************************************************/
	1357
	1358	static ADDRESS_MAP_START( pic16c622_rom, ADDRESS_SPACE_PROGRAM, 16 )
	1359	AM_RANGE(0x000, 0x7ff) AM_ROM
	1360	ADDRESS_MAP_END
	1361
	1362	static ADDRESS_MAP_START( pic16c622_ram, ADDRESS_SPACE_DATA, 8 )
	1363	AM_RANGE(0x00, 0x06) AM_RAM
	1364	AM_RANGE(0x0a, 0x0c) AM_RAM
	1365	AM_RANGE(0x1f, 0x7f) AM_RAM
	1366	AM_RANGE(0x80, 0x86) AM_RAM
	1367	AM_RANGE(0x8a, 0x8e) AM_RAM
	1368	AM_RANGE(0x9f, 0xbf) AM_RAM
	1369	ADDRESS_MAP_END
	1370
	1371
	1372	/****************************************************************************
	1373	*  PIC16C622 Reset
	1374	****************************************************************************/
	1375
	1376	static CPU_RESET( pic16c622 )
	1377	{
	1378	pic16c62x_state *cpustate = get_safe_token(device);
	1379
	1380	update_internalram_ptr(cpustate);
	1381
	1382	cpustate->picmodel = 0x16C622;
	1383	cpustate->picRAMmask = 0xff;
	1384	cpustate->reset_vector = 0x0;
	1385	pic16c62x_reset_regs(cpustate);
	1386	SET(cpustate->STATUS, (TO_FLAG | PD_FLAG));
	1387	}
	1388
	1389
	1390	/**************************************************************************
	1391	*  CPU-specific get_info
	1392	**************************************************************************/
	1393
	1394	CPU_GET_INFO( pic16c622 )
	1395	{
	1396	switch (state)
	1397	{
	1398	case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM:         info->i = 11;                     break;
	1399	case CPUINFO_INT_ADDRBUS_WIDTH_DATA:         info->i = 8;                     break;
	1400
	1401	/* --- the following bits of info are returned as pointers to data or functions --- */
	1402	case CPUINFO_FCT_RESET:                     info->reset = CPU_RESET_NAME(pic16c622);               break;
	1403	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:   info->internal_map16 = ADDRESS_MAP_NAME(pic16c622_rom);   break;
	1404	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:      info->internal_map8 = ADDRESS_MAP_NAME(pic16c622_ram);   break;
	1405
	1406	/* --- the following bits of info are returned as NULL-terminated strings --- */
	1407	case DEVINFO_STR_NAME:                     strcpy(info->s, "PIC16C622");         break;
	1408
	1409	default:                              CPU_GET_INFO_CALL(pic16c62x);         break;
	1410	}
	1411	}
	1412
	1413
	1414	/****************************************************************************
	1415	*  PIC16C620A
	1416	****************************************************************************/
	1417	/****************************************************************************
	1418	*  Internal Memory Map
	1419	****************************************************************************/
	1420
	1421	static ADDRESS_MAP_START( pic16c620a_rom, ADDRESS_SPACE_PROGRAM, 16 )
	1422	AM_RANGE(0x000, 0x1ff) AM_ROM
	1423	ADDRESS_MAP_END
	1424
	1425	static ADDRESS_MAP_START( pic16c620a_ram, ADDRESS_SPACE_DATA, 8 )
	1426	AM_RANGE(0x00, 0x06) AM_RAM
	1427	AM_RANGE(0x0a, 0x0c) AM_RAM
	1428	AM_RANGE(0x1f, 0x6f) AM_RAM
	1429	AM_RANGE(0x70, 0x7f) AM_RAM AM_SHARE(0)
	1430	AM_RANGE(0x80, 0x86) AM_RAM
	1431	AM_RANGE(0x8a, 0x8e) AM_RAM
	1432	AM_RANGE(0x9f, 0x9f) AM_RAM
	1433	AM_RANGE(0xf0, 0xff) AM_RAM AM_SHARE(0)
	1434	ADDRESS_MAP_END
	1435
	1436
	1437	/****************************************************************************
	1438	*  PIC16C620A Reset
	1439	****************************************************************************/
	1440
	1441	static CPU_RESET( pic16c620a )
	1442	{
	1443	pic16c62x_state *cpustate = get_safe_token(device);
	1444
	1445	update_internalram_ptr(cpustate);
	1446
	1447	cpustate->picmodel = 0x16C620A;
	1448	cpustate->picRAMmask = 0xff;
	1449	cpustate->reset_vector = 0x0;
	1450	pic16c62x_reset_regs(cpustate);
	1451	SET(cpustate->STATUS, (TO_FLAG | PD_FLAG));
	1452	}
	1453
	1454
	1455	/**************************************************************************
	1456	*  CPU-specific get_info
	1457	**************************************************************************/
	1458
	1459	CPU_GET_INFO( pic16c620a )
	1460	{
	1461	switch (state)
	1462	{
	1463	case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM:         info->i = 9;                     break;
	1464	case CPUINFO_INT_ADDRBUS_WIDTH_DATA:         info->i = 8;                     break;
	1465
	1466	/* --- the following bits of info are returned as pointers to data or functions --- */
	1467	case CPUINFO_FCT_RESET:                     info->reset = CPU_RESET_NAME(pic16c620a);               break;
	1468	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:   info->internal_map16 = ADDRESS_MAP_NAME(pic16c620a_rom);   break;
	1469	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:      info->internal_map8 = ADDRESS_MAP_NAME(pic16c620a_ram);   break;
	1470
	1471	/* --- the following bits of info are returned as NULL-terminated strings --- */
	1472	case DEVINFO_STR_NAME:                     strcpy(info->s, "PIC16C620A");         break;
	1473
	1474	default:                              CPU_GET_INFO_CALL(pic16c62x);         break;
	1475	}
	1476	}
	1477
	1478
	1479	/****************************************************************************
	1480	*  PIC16C621A
	1481	****************************************************************************/
	1482	/****************************************************************************
	1483	*  Internal Memory Map
	1484	****************************************************************************/
	1485
	1486	static ADDRESS_MAP_START( pic16c621a_rom, ADDRESS_SPACE_PROGRAM, 16 )
	1487	AM_RANGE(0x000, 0x3ff) AM_ROM
	1488	ADDRESS_MAP_END
	1489
	1490	static ADDRESS_MAP_START( pic16c621a_ram, ADDRESS_SPACE_DATA, 8 )
	1491	AM_RANGE(0x00, 0x06) AM_RAM
	1492	AM_RANGE(0x0a, 0x0c) AM_RAM
	1493	AM_RANGE(0x1f, 0x6f) AM_RAM
	1494	AM_RANGE(0x70, 0x7f) AM_RAM AM_SHARE(0)
	1495	AM_RANGE(0x80, 0x86) AM_RAM
	1496	AM_RANGE(0x8a, 0x8e) AM_RAM
	1497	AM_RANGE(0x9f, 0x9f) AM_RAM
	1498	AM_RANGE(0xf0, 0xff) AM_RAM AM_SHARE(0)
	1499	ADDRESS_MAP_END
	1500
	1501
	1502	/****************************************************************************
	1503	*  PIC16C621A Reset
	1504	****************************************************************************/
	1505
	1506	static CPU_RESET( pic16c621a )
	1507	{
	1508	pic16c62x_state *cpustate = get_safe_token(device);
	1509
	1510	update_internalram_ptr(cpustate);
	1511
	1512	cpustate->picmodel = 0x16C621A;
	1513	cpustate->picRAMmask = 0xff;
	1514	cpustate->reset_vector = 0x0;
	1515	pic16c62x_reset_regs(cpustate);
	1516	SET(cpustate->STATUS, (TO_FLAG | PD_FLAG));
	1517	}
	1518
	1519
	1520	/**************************************************************************
	1521	*  CPU-specific get_info
	1522	**************************************************************************/
	1523
	1524	CPU_GET_INFO( pic16c621a )
	1525	{
	1526	switch (state)
	1527	{
	1528	case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM:         info->i = 10;                     break;
	1529	case CPUINFO_INT_ADDRBUS_WIDTH_DATA:         info->i = 8;                     break;
	1530
	1531	/* --- the following bits of info are returned as pointers to data or functions --- */
	1532	case CPUINFO_FCT_RESET:                     info->reset = CPU_RESET_NAME(pic16c621a);               break;
	1533	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:   info->internal_map16 = ADDRESS_MAP_NAME(pic16c621a_rom);   break;
	1534	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:      info->internal_map8 = ADDRESS_MAP_NAME(pic16c621a_ram);   break;
	1535
	1536	/* --- the following bits of info are returned as NULL-terminated strings --- */
	1537	case DEVINFO_STR_NAME:                     strcpy(info->s, "PIC16C621A");         break;
	1538
	1539	default:                              CPU_GET_INFO_CALL(pic16c62x);         break;
	1540	}
	1541	}
	1542
	1543
	1544	/****************************************************************************
	1545	*  PIC16C622A
	1546	****************************************************************************/
	1547	/****************************************************************************
	1548	*  Internal Memory Map
	1549	****************************************************************************/
	1550
	1551	static ADDRESS_MAP_START( pic16c622a_rom, ADDRESS_SPACE_PROGRAM, 16 )
	1552	AM_RANGE(0x000, 0x7ff) AM_ROM
	1553	ADDRESS_MAP_END
	1554
	1555	static ADDRESS_MAP_START( pic16c622a_ram, ADDRESS_SPACE_DATA, 8 )
	1556	AM_RANGE(0x00, 0x06) AM_RAM
	1557	AM_RANGE(0x0a, 0x0c) AM_RAM
	1558	AM_RANGE(0x1f, 0x6f) AM_RAM
	1559	AM_RANGE(0x70, 0x7f) AM_RAM AM_SHARE(0)
	1560	AM_RANGE(0x80, 0x86) AM_RAM
	1561	AM_RANGE(0x8a, 0x8e) AM_RAM
	1562	AM_RANGE(0x9f, 0xbf) AM_RAM
	1563	AM_RANGE(0xf0, 0xff) AM_RAM AM_SHARE(0)
	1564	ADDRESS_MAP_END
	1565
	1566
	1567	/****************************************************************************
	1568	*  PIC16C622A Reset
	1569	****************************************************************************/
	1570
	1571	static CPU_RESET( pic16c622a )
	1572	{
	1573	pic16c62x_state *cpustate = get_safe_token(device);
	1574
	1575	update_internalram_ptr(cpustate);
	1576
	1577	cpustate->picmodel = 0x16C622A;
	1578	cpustate->picRAMmask = 0xff;
	1579	cpustate->reset_vector = 0x0;
	1580	pic16c62x_reset_regs(cpustate);
	1581	SET(cpustate->STATUS, (TO_FLAG | PD_FLAG));
	1582	}
	1583
	1584
	1585	/**************************************************************************
	1586	*  CPU-specific get_info
	1587	**************************************************************************/
	1588
	1589	CPU_GET_INFO( pic16c622a )
	1590	{
	1591	switch (state)
	1592	{
	1593	case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM:         info->i = 11;                     break;
	1594	case CPUINFO_INT_ADDRBUS_WIDTH_DATA:         info->i = 8;                     break;
	1595
	1596	/* --- the following bits of info are returned as pointers to data or functions --- */
	1597	case CPUINFO_FCT_RESET:                     info->reset = CPU_RESET_NAME(pic16c622a);               break;
	1598	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:   info->internal_map16 = ADDRESS_MAP_NAME(pic16c622a_rom);   break;
	1599	case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:      info->internal_map8 = ADDRESS_MAP_NAME(pic16c622a_ram);   break;
	1600
	1601	/* --- the following bits of info are returned as NULL-terminated strings --- */
	1602	case DEVINFO_STR_NAME:                     strcpy(info->s, "PIC16C622A");         break;
	1603
	1604	default:                              CPU_GET_INFO_CALL(pic16c62x);         break;
	1605	}
	1606	}
	1607

src/emu/cpu/pic16c62x/dis16c62x.c

r0	r6741
	1	/**************************************************************************\
	2	*                  Microchip PIC16C62X Emulator                            *
	3	*                                                                          *
	4	*                          Based On                                        *
	5	*                  Microchip PIC16C5X Emulator                             *
	6	*                    Copyright Tony La Porta                               *
	7	*                 Originally written for the MAME project.                 *
	8	*                                                                          *
	9	*                                                                          *
	10	*      Notes : Data is expected to be read from source file as LSB first.  *
	11	*                                                                          *
	12	\**************************************************************************/
	13
	14	#include <stdio.h>
	15	#include <string.h>
	16
	17	#include "16c62xdsm.c"
	18
	19
	20	unsigned char *Buffer;
	21
	22
	23	int main(int argc,char *argv[])
	24	{
	25	int  length=0, length_to_dump=0, offset=0, disasm_words=0;
	26	int  filelength=0, bytes_read;
	27	int  Counter=0;
	28
	29	FILE *F;
	30	char *String_Output;
	31
	32	if(argc<2)
	33	{
	34	printf("\n");
	35	printf("PIC16C5x Disassembler 1.0 by Tony La Porta (C)2003+\n\n");
	36	printf("Usage: dis16c5x <input-file> [ <start-addr> [ <num-of-addr> ] ]\n");
	37	printf("                <input-file>  source file data must be MSB first\n");
	38	printf("                <start-addr>  starting address to disassemble from (decimal)\n");
	39	printf("                <num-of-addr> number of addresses to disassemble (decimal)\n");
	40	printf("                              Preceed values with 0x if HEX values preffered\n");
	41	exit(1);
	42	}
	43
	44	if(!(F=fopen(argv[1],"rb")))
	45	{
	46	printf("\n%s: Can't open file %s\n",argv[0],argv[1]);
	47	exit(2);
	48	}
	49	argv++; argc--;
	50	if (argv[1])
	51	{
	52	offset = strtol(argv[1],NULL,0);
	53	argv++; argc--;
	54	}
	55	if (argv[1])
	56	{
	57	length = strtol(argv[1],NULL,0);
	58	argv++; argc--;
	59	}
	60
	61	fseek(F,0, SEEK_END);
	62	filelength = ftell(F);
	63
	64	length *= 2;
	65
	66	if ((length > (filelength - (offset*2))) || (length == 0)) length = filelength - (offset*2);
	67	printf("Length=%04Xh(words)  Offset=$%04Xh  filelength=%04Xh(words) %04Xh(bytes)\n",length/2,offset,filelength/2,filelength);
	68	length_to_dump = length;
	69	printf("Starting from %d, dumping %d opcodes (word size)\n",offset,length/2);
	70	Buffer = calloc((filelength+1),sizeof(char));
	71	if (Buffer==NULL)
	72	{
	73	printf("Out of Memory !!!");
	74	fclose(F);
	75	exit(3);
	76	}
	77	String_Output = calloc(80,sizeof(char));
	78	if (String_Output==NULL)
	79	{
	80	printf("Out of Memory !!!");
	81	free(Buffer);
	82	fclose(F);
	83	exit(4);
	84	}
	85
	86	if (fseek(F,0,SEEK_SET) != 0)
	87	{
	88	printf("Error seeking to beginning of file\n");
	89	free(String_Output);
	90	free(Buffer);
	91	fclose(F);
	92	exit(5);
	93	}
	94
	95	Counter = offset;
	96	bytes_read = fread(Buffer,sizeof(char),filelength,F);
	97	if (bytes_read >= length)
	98	{
	99	for (; length > 0; length -= (disasm_words*2))
	100	{
	101	int ii;
	102	disasm_words = Dasm16C5x(String_Output,Counter);
	103	printf("$%03X: ",Counter);
	104	for (ii = 0; ii < disasm_words; ii++)
	105	{
	106	if (((Counter*2) + ii) > filelength)   /* Past end of length to dump ? */
	107	{
	108	sprintf(String_Output,"???? dw %02.2X%02.2Xh (Past end of disassembly !)",Buffer[((Counter-1)*2)+1],Buffer[((Counter-1)*2)]);
	109	}
	110	else
	111	{
	112	printf("%02.2x%02.2x ",Buffer[(Counter*2)+1],Buffer[(Counter*2)]);
	113	}
	114	Counter++ ;
	115	}
	116	for (; ii < 4; ii++)
	117	{
	118	printf(" ");
	119	}
	120	printf("\t%s\n",String_Output);
	121	}
	122	}
	123	else
	124	{
	125	printf("ERROR length to dump was %d ", length_to_dump/2);
	126	printf(", but bytes read from file were %d\n", bytes_read/2);
	127	free(String_Output);
	128	free(Buffer);
	129	fclose(F);
	130	exit(7);
	131	}
	132	free(String_Output);
	133	free(Buffer);
	134	fclose(F);
	135	return(0);
	136	}

src/emu/cpu/pic16c62x/pic16c62x.h

r0	r6741
	1	/**************************************************************************\
	2	*                  Microchip PIC16C62X Emulator                            *
	3	*                                                                          *
	4	*                          Based On                                        *
	5	*                  Microchip PIC16C5X Emulator                             *
	6	*                    Copyright Tony La Porta                               *
	7	*                 Originally written for the MAME project.                 *
	8	*                                                                          *
	9	*                                                                          *
	10	*      Addressing architecture is based on the Harvard addressing scheme.  *
	11	*                                                                          *
	12	\**************************************************************************/
	13
	14	#pragma once
	15
	16	#ifndef __PIC16C62X_H__
	17	#define __PIC16C62X_H__
	18
	19
	20	#include "cpuintrf.h"
	21
	22
	23	/**************************************************************************
	24	*  Internal Clock divisor
	25	*
	26	*  External Clock is divided internally by 4 for the instruction cycle
	27	*  times. (Each instruction cycle passes through 4 machine states). This
	28	*  is handled by the cpu execution engine.
	29	*/
	30
	31	enum
	32	{
	33	PIC16C62x_PC=1, PIC16C62x_STK0, PIC16C62x_STK1, PIC16C62x_STK2,
	34	PIC16C62x_STK3, PIC16C62x_STK4, PIC16C62x_STK5, PIC16C62x_STK6,
	35	PIC16C62x_STK7, PIC16C62x_FSR,   PIC16C62x_W,    PIC16C62x_ALU,
	36	PIC16C62x_STR,  PIC16C62x_OPT,   PIC16C62x_TMR0, PIC16C62x_PRTA,
	37	PIC16C62x_PRTB, PIC16C62x_WDT,  PIC16C62x_TRSA, PIC16C62x_TRSB,
	38	PIC16C62x_PSCL
	39	};
	40
	41	#define PIC16C62x_T0      0
	42
	43
	44	/****************************************************************************
	45	*  Function to configure the CONFIG register. This is actually hard-wired
	46	*  during ROM programming, so should be called in the driver INIT, with
	47	*  the value if known (available in HEX dumps of the ROM).
	48	*/
	49
	50	void pic16c62x_set_config(const device_config *cpu, int data);
	51
	52
	53
	54	CPU_GET_INFO( pic16c620 );
	55	#define CPU_PIC16C620 CPU_GET_INFO_NAME( pic16c620 )
	56
	57
	58	CPU_GET_INFO( pic16c620a );
	59	#define CPU_PIC16C620A CPU_GET_INFO_NAME( pic16c620a )
	60
	61
	62	//CPU_GET_INFO( pic16cr620a );
	63	//#define CPU_PIC16CR620A CPU_GET_INFO_NAME( pic16cr620a )
	64
	65
	66	CPU_GET_INFO( pic16c621 );
	67	#define CPU_PIC16C621 CPU_GET_INFO_NAME( pic16c621 )
	68
	69
	70	CPU_GET_INFO( pic16c621a );
	71	#define CPU_PIC16C621A CPU_GET_INFO_NAME( pic16c621a )
	72
	73	CPU_GET_INFO( pic16c622 );
	74	#define CPU_PIC16C622 CPU_GET_INFO_NAME( pic16c622 )
	75
	76
	77	CPU_GET_INFO( pic16c622a );
	78	#define CPU_PIC16C622A CPU_GET_INFO_NAME( pic16c622a )
	79
	80
	81	CPU_DISASSEMBLE( pic16c62x );
	82
	83
	84	#endif   /* __PIC16C62X_H__ */

src/emu/cpu/pic16c62x/16c62xdsm.c

r0	r6741
	1	/**************************************************************************\
	2	*                  Microchip PIC16C62X Emulator                            *
	3	*                                                                          *
	4	*                          Based On                                        *
	5	*                  Microchip PIC16C5X Emulator                             *
	6	*                    Copyright Tony La Porta                               *
	7	*                 Originally written for the MAME project.                 *
	8	*                                                                          *
	9	*                                                                          *
	10	*      Addressing architecture is based on the Harvard addressing scheme.  *
	11	*                                                                          *
	12	*         Many thanks to those involved in the i8039 Disassembler          *
	13	*                        as this was based on it.                          *
	14	*                                                                          *
	15	*                                                                          *
	16	*                                                                          *
	17	* A Address to jump to.                                                    *
	18	* B Bit address within an 8-bit file register.                             *
	19	* D Destination select (0 = store result in W (accumulator))               *
	20	*                      (1 = store result in file register)                 *
	21	* F Register file address (00-1F).                                         *
	22	* K Literal field, constant data.                                          *
	23	* X Not used                                                               *
	24	*                                                                          *
	25	\**************************************************************************/
	26
	27	#include <stdio.h>
	28	#include <stdlib.h>
	29	#include <string.h>
	30	#include <ctype.h>
	31
	32	#include "cpuintrf.h"
	33	#include "mame.h"
	34	static const UINT8 *rombase;
	35	static const UINT8 *rambase;
	36	static offs_t pcbase;
	37	#define READOP16(A)  (rombase[(A) - pcbase] | (rombase[(A) + 1 - pcbase] << 8))
	38	#define READARG16(A) (rambase[(A) - pcbase] | (rambase[(A) + 1 - pcbase] << 8))
	39
	40
	41
	42	typedef unsigned char byte;
	43	typedef unsigned short int word;
	44
	45	#define FMT(a,b) a, b
	46	#define PTRS_PER_FORMAT 2
	47
	48	/* Registers bank 0/1 */
	49	static const char *const regfile[32] = { "Reg$00 (INDF)",    "Reg$01 (TMR0/OPTION)",    "Reg$02 (PCL)",  "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (PORTA/TRISA)", "Reg$06 (PORTB/TRISB)", "Reg$07",
	50	"Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIR1/PIE1)", "Reg$0D", "Reg$0E (none/PCON)", "Reg$0F",
	51	"Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
	52	"Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (CMCON/VRCON)" };
	53	/* Registers bank 1 */
	54	/*static const char *const regfile1[32] = { "Reg$00 (INDF)",    "Reg$01 (OPTION)",    "Reg$02 (PCL)",  "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (TRISA)", "Reg$06 (TRISB)", "Reg$07",
	55	"Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIE1)", "Reg$0D", "Reg$0E (PCON)", "Reg$0F",
	56	"Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
	57	"Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (VRCON)" };
	58	static const char **regfile[2] = { regfile0, regfile1 };*/
	59
	60	static const char *const dest[2] = { "W", "Reg" };
	61
	62	static const char *const PIC16C62xFormats[] = {
	63	FMT("0000000xx00000", "nop"),
	64	FMT("00000000001000", "return"),
	65	FMT("00000000001001", "retfie"),
	66	FMT("00000001100011", "sleep"),
	67	FMT("00000001100100", "clrwdt"),
	68	FMT("0000001fffffff", "movwf  %F"),
	69	FMT("00000100000011", "clrw"),
	70	FMT("0000011fffffff", "clrf   %F"),
	71	FMT("000010dfffffff", "subwf  %F,%D"),
	72	FMT("000011dfffffff", "decf   %F,%D"),
	73	FMT("000100dfffffff", "iorwf  %F,%D"),
	74	FMT("000101dfffffff", "andwf  %F,%D"),
	75	FMT("000110dfffffff", "xorwf  %F,%D"),
	76	FMT("000111dfffffff", "addwf  %F,%D"),
	77	FMT("001000dfffffff", "movf   %F,%D"),
	78	FMT("001001dfffffff", "comf   %F,%D"),
	79	FMT("001010dfffffff", "incf   %F,%D"),
	80	FMT("001011dfffffff", "decfsz %F,%D"),
	81	FMT("001100dfffffff", "rrf    %F,%D"),
	82	FMT("001101dfffffff", "rlf    %F,%D"),
	83	FMT("001110dfffffff", "swapf  %F,%D"),
	84	FMT("001111dfffffff", "incfsz %F,%D"),
	85	FMT("0100bbbfffffff", "bcf    %F,%B"),
	86	FMT("0101bbbfffffff", "bsf    %F,%B"),
	87	FMT("0110bbbfffffff", "btfsc  %F,%B"),
	88	FMT("0111bbbfffffff", "btfss  %F,%B"),
	89	FMT("1101xxkkkkkkkk", "retlw  %K"),
	90	FMT("100aaaaaaaaaaa", "call   %A"),
	91	FMT("101aaaaaaaaaaa", "goto   %A"),
	92	FMT("1100xxkkkkkkkk", "movlw  %K"),
	93	FMT("111000kkkkkkkk", "iorlw  %K"),
	94	FMT("111001kkkkkkkk", "andlw  %K"),
	95	FMT("111010kkkkkkkk", "xorlw  %K"),
	96	FMT("11110xkkkkkkkk", "sublw  %K"),
	97	FMT("11111xkkkkkkkk", "addlw  %K"),
	98	NULL
	99	};
	100
	101	#define MAX_OPS (((sizeof(PIC16C62xFormats) / sizeof(PIC16C62xFormats[0])) - 1) / PTRS_PER_FORMAT)
	102
	103	typedef struct opcode {
	104	word mask;         /* instruction mask */
	105	word bits;         /* constant bits */
	106	word extcode;      /* value that gets extension code */
	107	const char *parse;   /* how to parse bits */
	108	const char *fmt;   /* instruction format */
	109	} PIC16C62xOpcode;
	110
	111	static PIC16C62xOpcode Op[MAX_OPS+1];
	112	static int OpInizialized = 0;
	113
	114	static void InitDasm16C5x(void)
	115	{
	116	const char *p;
	117	const char *const *ops;
	118	word mask, bits;
	119	int bit;
	120	int i;
	121
	122	ops = PIC16C62xFormats; i = 0;
	123	while (*ops)
	124	{
	125	p = *ops;
	126	mask = 0; bits = 0; bit = 13;
	127	while (*p && bit >= 0)
	128	{
	129	switch (*p++)
	130	{
	131	case '1': mask |= 1<<bit; bits |= 1<<bit; bit--; break;
	132	case '0': mask |= 1<<bit; bit--; break;
	133	case ' ': break;
	134	case 'a':
	135	case 'b':
	136	case 'd':
	137	case 'f':
	138	case 'k':
	139	case 'x':
	140	bit --;
	141	break;
	142	default: fatalerror("Invalid instruction encoding '%s %s'",
	143	ops[0],ops[1]);
	144	}
	145	}
	146	if (bit != -1 )
	147	{
	148	fatalerror("not enough bits in encoding '%s %s' %d",
	149	ops[0],ops[1],bit);
	150	}
	151	while (isspace((UINT8)*p)) p++;
	152	if (*p) Op[i].extcode = *p;
	153	Op[i].bits = bits;
	154	Op[i].mask = mask;
	155	Op[i].fmt = ops[1];
	156	Op[i].parse = ops[0];
	157
	158	ops += PTRS_PER_FORMAT;
	159	i++;
	160	}
	161
	162	OpInizialized = 1;
	163	}
	164
	165	CPU_DISASSEMBLE( pic16c62x )
	166	{
	167	int a, b, d, f, k;   /* these can all be filled in by parsing an instruction */
	168	int i;
	169	int op;
	170	int cnt = 1;
	171	int code;
	172	int bit;
	173	char *buffertmp;
	174	const char *cp;            /* character pointer in OpFormats */
	175	UINT32 flags = 0;
	176
	177	rombase = oprom;
	178	rambase = opram;
	179	pcbase = 2*pc;
	180
	181	if (!OpInizialized) InitDasm16C5x();
	182
	183	op = -1;            /* no matching opcode */
	184	code = READOP16(2*pc);
	185	for ( i = 0; i < MAX_OPS; i++)
	186	{
	187	if ((code & Op[i].mask) == Op[i].bits)
	188	{
	189	if (op != -1)
	190	{
	191	mame_printf_debug("Error: opcode %04Xh matches %d (%s) and %d (%s)\n",
	192	code,i,Op[i].fmt,op,Op[op].fmt);
	193	}
	194	op = i;
	195	}
	196	}
	197	if (op == -1)
	198	{
	199	sprintf(buffer,"???? dw %04Xh",code);
	200	return cnt;
	201	}
	202	buffertmp = buffer;
	203	if (Op[op].extcode)      /* Actually, theres no double length opcodes */
	204	{
	205	bit = 29;
	206	code <<= 16;
	207	code |= READARG16(2*(pc+cnt));
	208	cnt++;
	209	}
	210	else
	211	{
	212	bit = 13;
	213	}
	214
	215	/* shift out operands */
	216	cp = Op[op].parse;
	217	a = b = d = f = k = 0;
	218
	219	while (bit >= 0)
	220	{
	221	/* mame_printf_debug("{%c/%d}",*cp,bit); */
	222	switch(*cp)
	223	{
	224	case 'a': a <<=1; a |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
	225	case 'b': b <<=1; b |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
	226	case 'd': d <<=1; d |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
	227	case 'f': f <<=1; f |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
	228	case 'k': k <<=1; k |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
	229	case ' ': break;
	230	case '1': case '0': case 'x':  bit--; break;
	231	case '\0': fatalerror("premature end of parse string, opcode %x, bit = %d",code,bit);
	232	}
	233	cp++;
	234	}
	235
	236	/* now traverse format string */
	237	cp = Op[op].fmt;
	238	if (!strncmp(cp, "call", 4))
	239	flags = DASMFLAG_STEP_OVER;
	240	else if (!strncmp(cp, "ret", 3))
	241	flags = DASMFLAG_STEP_OUT;
	242
	243	while (*cp)
	244	{
	245	if (*cp == '%')
	246	{
	247	char num[30], *q;
	248	cp++;
	249	switch (*cp++)
	250	{
	251	case 'A': sprintf(num,"$%03X",a); break;
	252	case 'B': sprintf(num,"%d",b); break;
	253	case 'D': sprintf(num,"%s",dest[d]); break;
	254	case 'F': if (f < 0x20) sprintf(num,"%s",regfile[f]); else sprintf(num,"Reg$%02X",f); break;
	255	case 'K': sprintf(num,"%02Xh",k); break;
	256	default:
	257	fatalerror("illegal escape character in format '%s'",Op[op].fmt);
	258	}
	259	q = num; while (*q) *buffer++ = *q++;
	260	*buffer = '\0';
	261	}
	262	else
	263	{
	264	*buffer++ = *cp++;
	265	*buffer = '\0';
	266	}
	267	}
	268	return cnt | flags | DASMFLAG_SUPPORTED;
	269	}

src/emu/cpu/cpu.mak

r6740	r6741
789	789
790	790
791	791	#-------------------------------------------------
	792	# Microchip PIC16C62x
	793	#-------------------------------------------------
	794
	795	ifneq ($(filter PIC16C62X,$(CPUS)),)
	796	OBJDIRS += $(CPUOBJ)/pic16c62x
	797	CPUOBJS += $(CPUOBJ)/pic16c62x/pic16c62x.o
	798	DASMOBJS += $(CPUOBJ)/pic16c62x/16c62xdsm.o
	799	endif
	800
	801	$(CPUOBJ)/pic16c62x/pic16c62x.o:   $(CPUSRC)/pic16c62x/pic16c62x.c \
	802	$(CPUSRC)/pic16c62x/pic16c62x.h
	803
	804
	805
	806	#-------------------------------------------------
792	807	# MIPS R3000 (MIPS I/II) series
793	808	# MIPS R4000 (MIPS III/IV) series
794	809	# Sony PlayStation CPU (R3000-based + GTE)

src/emu/cpu/z180/z180.c

r6740	r6741
2019	2019	cpustate->daisy = z80daisy_init(device, (const z80_daisy_chain *)device->static_config);
2020	2020	cpustate->irq_callback = irqcallback;
2021	2021
	2022	SZHVC_add = auto_alloc_array(device->machine, UINT8, 2*256*256);
	2023	SZHVC_sub = auto_alloc_array(device->machine, UINT8, 2*256*256);
	2024
2022	2025	/* set up the state table */
2023	2026	cpustate->state = state_table_template;
2024	2027	cpustate->state.baseptr = cpustate;
r6740	r6741
2064	2067	int oldval, newval, val;
2065	2068	UINT8 *padd, *padc, *psub, *psbc;
2066	2069	/* allocate big flag arrays once */
2067		SZHVC_add = auto_alloc_array(device->machine, UINT8, 2*256*256);
2068		SZHVC_sub = auto_alloc_array(device->machine, UINT8, 2*256*256);
2069	2070	padd = &SZHVC_add[   0*256];
2070	2071	padc = &SZHVC_add[256*256];
2071	2072	psub = &SZHVC_sub[   0*256];

src/emu/cpu/drcuml.c

r6740	r6741
100	100	#define PTYPES_CFUNC   (PTYPES_MEM | 0x4000)
101	101	#define PTYPES_HAND      (PTYPES_MEM | 0x5000)
102	102	#define PTYPES_SIZE      (PTYPES_IMM | 0x8000)
103		#define PTYPES_SPACE   (PTYPES_IMM | 0x9000)
104		#define PTYPES_SPSZ      (PTYPES_IMM | 0xa000)
105		#define PTYPES_FMOD      (PTYPES_IMM | 0xb000)
106		#define PTYPES_LAB      (PTYPES_IMM | 0xc000)
	103	#define PTYPES_SCSZ      (PTYPES_IMM | 0x9000)
	104	#define PTYPES_SPACE   (PTYPES_IMM | 0xa000)
	105	#define PTYPES_SPSZ      (PTYPES_IMM | 0xb000)
	106	#define PTYPES_FMOD      (PTYPES_IMM | 0xc000)
	107	#define PTYPES_LAB      (PTYPES_IMM | 0xd000)
107	108
108	109	/* combinations of types */
109	110	#define PTYPES_IRM      (PTYPES_IREG | PTYPES_MEM)
r6740	r6741
227	228	OPINFO1(RESTORE, "restore",  4,   FALSE, NONE, ALL,  ALL,  PINFO(IN, OP, STATE))
228	229
229	230	/* Integer Operations */
230		OPINFO4(LOAD,    "!load",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SIZE))
231		OPINFO4(LOADS,   "!loads",   4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SIZE))
232		OPINFO4(STORE,   "!store",   4|8, FALSE, NONE, NONE, ALL,  PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SIZE))
	231	OPINFO4(LOAD,    "!load",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SCSZ))
	232	OPINFO4(LOADS,   "!loads",   4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SCSZ))
	233	OPINFO4(STORE,   "!store",   4|8, FALSE, NONE, NONE, ALL,  PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SCSZ))
233	234	OPINFO3(READ,    "!read",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, 4, IANY), PINFO(IN, OP, SPSZ))
234	235	OPINFO4(READM,   "!readm",   4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSZ))
235	236	OPINFO3(WRITE,   "!write",   4|8, FALSE, NONE, NONE, ALL,  PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSZ))
r6740	r6741
1193	1194	else if (typemask == PTYPES_SPSZ)
1194	1195	dest += sprintf(dest, "%s_%s", address_space_names[param->value / 16], sizes[param->value % 16]);
1195	1196
	1197	/* size + scale immediate */
	1198	else if (typemask == PTYPES_SCSZ)
	1199	{
	1200	int scale = param->value / 16;
	1201	int size  = param->value % 16;
	1202	if (scale == size)
	1203	dest += sprintf(dest, "%s", sizes[size]);
	1204	else
	1205	dest += sprintf(dest, "%s_x%d", sizes[size], 1 << scale);
	1206	}
	1207
1196	1208	/* fmod immediate */
1197	1209	else if (typemask == PTYPES_FMOD)
1198	1210	dest += sprintf(dest, "%s", fmods[param->value]);

src/emu/cpu/drcuml.h

r6740	r6741
163	163	};
164	164
165	165
	166	/* scale/space combinations */
	167	enum
	168	{
	169	DRCUML_SCSIZE_BYTE     =  (0 * 16) + DRCUML_SIZE_BYTE,
	170	DRCUML_SCSIZE_BYTE_x2  =  (1 * 16) + DRCUML_SIZE_BYTE,
	171	DRCUML_SCSIZE_BYTE_x4  =  (2 * 16) + DRCUML_SIZE_BYTE,
	172	DRCUML_SCSIZE_BYTE_x8  =  (3 * 16) + DRCUML_SIZE_BYTE,
	173	DRCUML_SCSIZE_WORD_x1  =  (0 * 16) + DRCUML_SIZE_WORD,
	174	DRCUML_SCSIZE_WORD     =  (1 * 16) + DRCUML_SIZE_WORD,
	175	DRCUML_SCSIZE_WORD_x4  =  (2 * 16) + DRCUML_SIZE_WORD,
	176	DRCUML_SCSIZE_WORD_x8  =  (3 * 16) + DRCUML_SIZE_WORD,
	177	DRCUML_SCSIZE_DWORD_x1 =  (0 * 16) + DRCUML_SIZE_DWORD,
	178	DRCUML_SCSIZE_DWORD_x2 =  (1 * 16) + DRCUML_SIZE_DWORD,
	179	DRCUML_SCSIZE_DWORD    =  (2 * 16) + DRCUML_SIZE_DWORD,
	180	DRCUML_SCSIZE_DWORD_x8 =  (3 * 16) + DRCUML_SIZE_DWORD,
	181	DRCUML_SCSIZE_QWORD_x1 =  (0 * 16) + DRCUML_SIZE_QWORD,
	182	DRCUML_SCSIZE_QWORD_x2 =  (1 * 16) + DRCUML_SIZE_QWORD,
	183	DRCUML_SCSIZE_QWORD_x4 =  (2 * 16) + DRCUML_SIZE_QWORD,
	184	DRCUML_SCSIZE_QWORD    =  (3 * 16) + DRCUML_SIZE_QWORD
	185	};
	186
	187
166	188	/* size/space combinations */
167	189	enum
168	190	{

src/emu/cpu/i386/i386op16.c

r6740	r6741
3110	3110	UINT8 modrm = FETCH(cpustate);
3111	3111	UINT32 limit;
3112	3112	I386_SREG seg;
3113
	3113
3114	3114	if(PROTECTED_MODE)
3115	3115	{
3116	3116	memset(&seg, 0, sizeof(seg));

src/emu/cpu/drcbex64.c

r6740	r6741
18	18
19	19	* Identify common pairs and optimize output
20	20
21		* Convert AND 0xff/0xffff to movzx
22
23	21	* Convert SUB a,0,b to NEG
24	22
25	23	* Optimize, e.g., and [r5],i0,$FF to use rbx as temporary register
r6740	r6741
3808	3806
3809	3807	static x86code *op_load(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
3810	3808	{
3811		drcuml_parameter dstp, basep, indp, sizep;
3812		int basereg, dstreg;
	3809	drcuml_parameter dstp, basep, indp, scalesizep;
	3810	int basereg, dstreg, scale, size;
3813	3811	INT32 baseoffs;
3814	3812
3815	3813	/* validate instruction */
r6740	r6741
3818	3816	assert_no_flags(inst);
3819	3817
3820	3818	/* normalize parameters */
3821		param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &sizep, PTYPE_I);
	3819	param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &scalesizep, PTYPE_I);
	3820	scale = 1 << (scalesizep.value / 16);
	3821	size = scalesizep.value % 16;
3822	3822
3823	3823	/* determine the pointer base */
3824	3824	basereg = get_base_register_and_offset(drcbe, &dst, basep.value, REG_RDX, &baseoffs);
r6740	r6741
3829	3829	/* immediate index */
3830	3830	if (indp.type == DRCUML_PTYPE_IMMEDIATE)
3831	3831	{
3832		if (sizep.value == DRCUML_SIZE_BYTE)
3833		emit_movzx_r32_m8(&dst, dstreg, MBD(basereg, baseoffs + 1*indp.value));      // movzx dstreg,[basep + 1*indp]
3834		else if (sizep.value == DRCUML_SIZE_WORD)
3835		emit_movzx_r32_m16(&dst, dstreg, MBD(basereg, baseoffs + 2*indp.value));   // movzx dstreg,[basep + 2*indp]
3836		else if (sizep.value == DRCUML_SIZE_DWORD)
3837		emit_mov_r32_m32(&dst, dstreg, MBD(basereg, baseoffs + 4*indp.value));      // mov   dstreg,[basep + 4*indp]
3838		else if (sizep.value == DRCUML_SIZE_QWORD)
3839		emit_mov_r64_m64(&dst, dstreg, MBD(basereg, baseoffs + 8*indp.value));      // mov   dstreg,[basep + 8*indp]
	3832	if (size == DRCUML_SIZE_BYTE)
	3833	emit_movzx_r32_m8(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));   // movzx dstreg,[basep + scale*indp]
	3834	else if (size == DRCUML_SIZE_WORD)
	3835	emit_movzx_r32_m16(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));// movzx dstreg,[basep + scale*indp]
	3836	else if (size == DRCUML_SIZE_DWORD)
	3837	emit_mov_r32_m32(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));   // mov   dstreg,[basep + scale*indp]
	3838	else if (size == DRCUML_SIZE_QWORD)
	3839	emit_mov_r64_m64(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));   // mov   dstreg,[basep + scale*indp]
3840	3840	}
3841	3841
3842	3842	/* other index */
r6740	r6741
3844	3844	{
3845	3845	int indreg = param_select_register(REG_ECX, &indp, NULL);
3846	3846	emit_mov_r32_p32(drcbe, &dst, indreg, &indp);
3847		if (sizep.value == DRCUML_SIZE_BYTE)
3848		emit_movzx_r32_m8(&dst, dstreg, MBISD(basereg, indreg, 1, baseoffs));      // movzx dstreg,[basep + 1*indp]
3849		else if (sizep.value == DRCUML_SIZE_WORD)
3850		emit_movzx_r32_m16(&dst, dstreg, MBISD(basereg, indreg, 2, baseoffs));      // movzx dstreg,[basep + 2*indp]
3851		else if (sizep.value == DRCUML_SIZE_DWORD)
3852		emit_mov_r32_m32(&dst, dstreg, MBISD(basereg, indreg, 4, baseoffs));      // mov   dstreg,[basep + 4*indp]
3853		else if (sizep.value == DRCUML_SIZE_QWORD)
3854		emit_mov_r64_m64(&dst, dstreg, MBISD(basereg, indreg, 8, baseoffs));      // mov   dstreg,[basep + 8*indp]
	3847	if (size == DRCUML_SIZE_BYTE)
	3848	emit_movzx_r32_m8(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // movzx dstreg,[basep + scale*indp]
	3849	else if (size == DRCUML_SIZE_WORD)
	3850	emit_movzx_r32_m16(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // movzx dstreg,[basep + scale*indp]
	3851	else if (size == DRCUML_SIZE_DWORD)
	3852	emit_mov_r32_m32(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // mov   dstreg,[basep + scale*indp]
	3853	else if (size == DRCUML_SIZE_QWORD)
	3854	emit_mov_r64_m64(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // mov   dstreg,[basep + scale*indp]
3855	3855	}
3856	3856
3857	3857	/* store result */
r6740	r6741
3870	3870
3871	3871	static x86code *op_loads(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
3872	3872	{
3873		drcuml_parameter dstp, basep, indp, sizep;
3874		int basereg, dstreg;
	3873	drcuml_parameter dstp, basep, indp, scalesizep;
	3874	int basereg, dstreg, scale, size;
3875	3875	INT32 baseoffs;
3876	3876
3877	3877	/* validate instruction */
r6740	r6741
3880	3880	assert_no_flags(inst);
3881	3881
3882	3882	/* normalize parameters */
3883		param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &sizep, PTYPE_I);
	3883	param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &scalesizep, PTYPE_I);
	3884	scale = 1 << (scalesizep.value / 16);
	3885	size = scalesizep.value % 16;
3884	3886
3885	3887	/* determine the pointer base */
3886	3888	basereg = get_base_register_and_offset(drcbe, &dst, basep.value, REG_RDX, &baseoffs);
r6740	r6741
3893	3895	{
3894	3896	if (inst->size == 4)
3895	3897	{
3896		if (sizep.value == DRCUML_SIZE_BYTE)
3897		emit_movsx_r32_m8(&dst, dstreg, MBD(basereg, baseoffs + 1*indp.value));   // movsx dstreg,[basep + 1*indp]
3898		else if (sizep.value == DRCUML_SIZE_WORD)
3899		emit_movsx_r32_m16(&dst, dstreg, MBD(basereg, baseoffs + 2*indp.value));// movsx dstreg,[basep + 2*indp]
3900		else if (sizep.value == DRCUML_SIZE_DWORD)
3901		emit_mov_r32_m32(&dst, dstreg, MBD(basereg, baseoffs + 4*indp.value));   // mov   dstreg,[basep + 4*indp]
	3898	if (size == DRCUML_SIZE_BYTE)
	3899	emit_movsx_r32_m8(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));   // movsx dstreg,[basep + scale*indp]
	3900	else if (size == DRCUML_SIZE_WORD)
	3901	emit_movsx_r32_m16(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));// movsx dstreg,[basep + scale*indp]
	3902	else if (size == DRCUML_SIZE_DWORD)
	3903	emit_mov_r32_m32(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));   // mov   dstreg,[basep + scale*indp]
3902	3904	}
3903	3905	else if (inst->size == 8)
3904	3906	{
3905		if (sizep.value == DRCUML_SIZE_BYTE)
3906		emit_movsx_r64_m8(&dst, dstreg, MBD(basereg, baseoffs + 1*indp.value));   // movzx dstreg,[basep + 1*indp]
3907		else if (sizep.value == DRCUML_SIZE_WORD)
3908		emit_movsx_r64_m16(&dst, dstreg, MBD(basereg, baseoffs + 2*indp.value));// movzx dstreg,[basep + 2*indp]
3909		else if (sizep.value == DRCUML_SIZE_DWORD)
3910		emit_movsxd_r64_m32(&dst, dstreg, MBD(basereg, baseoffs + 4*indp.value));// movsxd dstreg,[basep + 4*indp]
3911		else if (sizep.value == DRCUML_SIZE_QWORD)
3912		emit_mov_r64_m64(&dst, dstreg, MBD(basereg, baseoffs + 8*indp.value));   // mov   dstreg,[basep + 8*indp]
	3907	if (size == DRCUML_SIZE_BYTE)
	3908	emit_movsx_r64_m8(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));   // movzx dstreg,[basep + scale*indp]
	3909	else if (size == DRCUML_SIZE_WORD)
	3910	emit_movsx_r64_m16(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));// movzx dstreg,[basep + scale*indp]
	3911	else if (size == DRCUML_SIZE_DWORD)
	3912	emit_movsxd_r64_m32(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));// movsxd dstreg,[basep + scale*indp]
	3913	else if (size == DRCUML_SIZE_QWORD)
	3914	emit_mov_r64_m64(&dst, dstreg, MBD(basereg, baseoffs + scale*indp.value));   // mov   dstreg,[basep + scale*indp]
3913	3915	}
3914	3916	}
3915	3917
r6740	r6741
3920	3922	emit_mov_r32_p32(drcbe, &dst, indreg, &indp);
3921	3923	if (inst->size == 4)
3922	3924	{
3923		if (sizep.value == DRCUML_SIZE_BYTE)
3924		emit_movsx_r32_m8(&dst, dstreg, MBISD(basereg, indreg, 1, baseoffs));   // movsx dstreg,[basep + 1*indp]
3925		else if (sizep.value == DRCUML_SIZE_WORD)
3926		emit_movsx_r32_m16(&dst, dstreg, MBISD(basereg, indreg, 2, baseoffs));   // movsx dstreg,[basep + 2*indp]
3927		else if (sizep.value == DRCUML_SIZE_DWORD)
3928		emit_mov_r32_m32(&dst, dstreg, MBISD(basereg, indreg, 4, baseoffs));   // mov   dstreg,[basep + 4*indp]
	3925	if (size == DRCUML_SIZE_BYTE)
	3926	emit_movsx_r32_m8(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // movsx dstreg,[basep + scale*indp]
	3927	else if (size == DRCUML_SIZE_WORD)
	3928	emit_movsx_r32_m16(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // movsx dstreg,[basep + scale*indp]
	3929	else if (size == DRCUML_SIZE_DWORD)
	3930	emit_mov_r32_m32(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // mov   dstreg,[basep + scale*indp]
3929	3931	}
3930	3932	else if (inst->size == 8)
3931	3933	{
3932		if (sizep.value == DRCUML_SIZE_BYTE)
3933		emit_movsx_r64_m8(&dst, dstreg, MBISD(basereg, indreg, 1, baseoffs));   // movsx dstreg,[basep + 1*indp]
3934		else if (sizep.value == DRCUML_SIZE_WORD)
3935		emit_movsx_r64_m16(&dst, dstreg, MBISD(basereg, indreg, 2, baseoffs));   // movsx dstreg,[basep + 2*indp]
3936		else if (sizep.value == DRCUML_SIZE_DWORD)
3937		emit_movsxd_r64_m32(&dst, dstreg, MBISD(basereg, indreg, 4, baseoffs));   // movsxd dstreg,[basep + 4*indp]
3938		else if (sizep.value == DRCUML_SIZE_QWORD)
3939		emit_mov_r64_m64(&dst, dstreg, MBISD(basereg, indreg, 8, baseoffs));   // mov   dstreg,[basep + 8*indp]
	3934	if (size == DRCUML_SIZE_BYTE)
	3935	emit_movsx_r64_m8(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // movsx dstreg,[basep + scale*indp]
	3936	else if (size == DRCUML_SIZE_WORD)
	3937	emit_movsx_r64_m16(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // movsx dstreg,[basep + scale*indp]
	3938	else if (size == DRCUML_SIZE_DWORD)
	3939	emit_movsxd_r64_m32(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // movsxd dstreg,[basep + scale*indp]
	3940	else if (size == DRCUML_SIZE_QWORD)
	3941	emit_mov_r64_m64(&dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));   // mov   dstreg,[basep + scale*indp]
3940	3942	}
3941	3943	}
3942	3944
r6740	r6741
3956	3958
3957	3959	static x86code *op_store(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
3958	3960	{
3959		drcuml_parameter srcp, basep, indp, sizep;
3960		int srcreg, basereg;
	3961	drcuml_parameter srcp, basep, indp, scalesizep;
	3962	int srcreg, basereg, scale, size;
3961	3963	INT32 baseoffs;
3962	3964
3963	3965	/* validate instruction */
r6740	r6741
3966	3968	assert_no_flags(inst);
3967	3969
3968	3970	/* normalize parameters */
3969		param_normalize_4(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MRI, &sizep, PTYPE_I);
	3971	param_normalize_4(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MRI, &scalesizep, PTYPE_I);
	3972	scale = 1 << (scalesizep.value / 16);
	3973	size = scalesizep.value % 16;
3970	3974
3971	3975	/* determine the pointer base */
3972	3976	basereg = get_base_register_and_offset(drcbe, &dst, basep.value, REG_RDX, &baseoffs);
r6740	r6741
3980	3984	/* immediate source */
3981	3985	if (srcp.type == DRCUML_PTYPE_IMMEDIATE)
3982	3986	{
3983		if (sizep.value == DRCUML_SIZE_BYTE)
3984		emit_mov_m8_imm(&dst, MBD(basereg, baseoffs + 1*indp.value), srcp.value);   // mov   [basep + 1*indp],srcp
3985		else if (sizep.value == DRCUML_SIZE_WORD)
3986		emit_mov_m16_imm(&dst, MBD(basereg, baseoffs + 2*indp.value), srcp.value);   // mov   [basep + 2*indp],srcp
3987		else if (sizep.value == DRCUML_SIZE_DWORD)
3988		emit_mov_m32_imm(&dst, MBD(basereg, baseoffs + 4*indp.value), srcp.value);   // mov   [basep + 4*indp],srcp
3989		else if (sizep.value == DRCUML_SIZE_QWORD)
	3987	if (size == DRCUML_SIZE_BYTE)
	3988	emit_mov_m8_imm(&dst, MBD(basereg, baseoffs + scale*indp.value), srcp.value);   // mov   [basep + scale*indp],srcp
	3989	else if (size == DRCUML_SIZE_WORD)
	3990	emit_mov_m16_imm(&dst, MBD(basereg, baseoffs + scale*indp.value), srcp.value);   // mov   [basep + scale*indp],srcp
	3991	else if (size == DRCUML_SIZE_DWORD)
	3992	emit_mov_m32_imm(&dst, MBD(basereg, baseoffs + scale*indp.value), srcp.value);   // mov   [basep + scale*indp],srcp
	3993	else if (size == DRCUML_SIZE_QWORD)
3990	3994	{
3991	3995	if (short_immediate(srcp.value))
3992		emit_mov_m64_imm(&dst, MBD(basereg, baseoffs + 8*indp.value), srcp.value);// mov   [basep + 8*indp],srcp
	3996	emit_mov_m64_imm(&dst, MBD(basereg, baseoffs + scale*indp.value), srcp.value);// mov   [basep + scale*indp],srcp
3993	3997	else
3994	3998	{
3995		emit_mov_m32_imm(&dst, MBD(basereg, baseoffs + 8*indp.value), srcp.value);// mov   [basep + 8*indp],srcp
3996		emit_mov_m32_imm(&dst, MBD(basereg, baseoffs + 8*indp.value + 4), srcp.value >> 32);
3997		// mov   [basep + 8*indp + 4],srcp >> 32
	3999	emit_mov_m32_imm(&dst, MBD(basereg, baseoffs + scale*indp.value), srcp.value);// mov   [basep + scale*indp],srcp
	4000	emit_mov_m32_imm(&dst, MBD(basereg, baseoffs + scale*indp.value + 4), srcp.value >> 32);
	4001	// mov   [basep + scale*indp + 4],srcp >> 32
3998	4002	}
3999	4003	}
4000	4004	}
r6740	r6741
4002	4006	/* variable source */
4003	4007	else
4004	4008	{
4005		if (sizep.value != DRCUML_SIZE_QWORD)
	4009	if (size != DRCUML_SIZE_QWORD)
4006	4010	emit_mov_r32_p32(drcbe, &dst, srcreg, &srcp);                     // mov   srcreg,srcp
4007	4011	else
4008	4012	emit_mov_r64_p64(drcbe, &dst, srcreg, &srcp);                     // mov   srcreg,srcp
4009		if (sizep.value == DRCUML_SIZE_BYTE)
4010		emit_mov_m8_r8(&dst, MBD(basereg, baseoffs + 1*indp.value), srcreg);   // mov   [basep + 1*indp],srcreg
4011		else if (sizep.value == DRCUML_SIZE_WORD)
4012		emit_mov_m16_r16(&dst, MBD(basereg, baseoffs + 2*indp.value), srcreg);   // mov   [basep + 2*indp],srcreg
4013		else if (sizep.value == DRCUML_SIZE_DWORD)
4014		emit_mov_m32_r32(&dst, MBD(basereg, baseoffs + 4*indp.value), srcreg);   // mov   [basep + 4*indp],srcreg
4015		else if (sizep.value == DRCUML_SIZE_QWORD)
4016		emit_mov_m64_r64(&dst, MBD(basereg, baseoffs + 8*indp.value), srcreg);   // mov   [basep + 8*indp],srcreg
	4013	if (size == DRCUML_SIZE_BYTE)
	4014	emit_mov_m8_r8(&dst, MBD(basereg, baseoffs + scale*indp.value), srcreg);   // mov   [basep + scale*indp],srcreg
	4015	else if (size == DRCUML_SIZE_WORD)
	4016	emit_mov_m16_r16(&dst, MBD(basereg, baseoffs + scale*indp.value), srcreg);   // mov   [basep + scale*indp],srcreg
	4017	else if (size == DRCUML_SIZE_DWORD)
	4018	emit_mov_m32_r32(&dst, MBD(basereg, baseoffs + scale*indp.value), srcreg);   // mov   [basep + scale*indp],srcreg
	4019	else if (size == DRCUML_SIZE_QWORD)
	4020	emit_mov_m64_r64(&dst, MBD(basereg, baseoffs + scale*indp.value), srcreg);   // mov   [basep + scale*indp],srcreg
4017	4021	}
4018	4022	}
4019	4023
r6740	r6741
4026	4030	/* immediate source */
4027	4031	if (srcp.type == DRCUML_PTYPE_IMMEDIATE)
4028	4032	{
4029		if (sizep.value == DRCUML_SIZE_BYTE)
4030		emit_mov_m8_imm(&dst, MBISD(basereg, indreg, 1, baseoffs), srcp.value);   // mov   [basep + 1*ecx],srcp
4031		else if (sizep.value == DRCUML_SIZE_WORD)
4032		emit_mov_m16_imm(&dst, MBISD(basereg, indreg, 2, baseoffs), srcp.value);// mov   [basep + 2*ecx],srcp
4033		else if (sizep.value == DRCUML_SIZE_DWORD)
4034		emit_mov_m32_imm(&dst, MBISD(basereg, indreg, 4, baseoffs), srcp.value);// mov   [basep + 4*ecx],srcp
4035		else if (sizep.value == DRCUML_SIZE_QWORD)
	4033	if (size == DRCUML_SIZE_BYTE)
	4034	emit_mov_m8_imm(&dst, MBISD(basereg, indreg, scale, baseoffs), srcp.value);   // mov   [basep + scale*ecx],srcp
	4035	else if (size == DRCUML_SIZE_WORD)
	4036	emit_mov_m16_imm(&dst, MBISD(basereg, indreg, scale, baseoffs), srcp.value);// mov   [basep + scale*ecx],srcp
	4037	else if (size == DRCUML_SIZE_DWORD)
	4038	emit_mov_m32_imm(&dst, MBISD(basereg, indreg, scale, baseoffs), srcp.value);// mov   [basep + scale*ecx],srcp
	4039	else if (size == DRCUML_SIZE_QWORD)
4036	4040	{
4037	4041	if (short_immediate(srcp.value))
4038		emit_mov_m64_imm(&dst, MBISD(basereg, indreg, 8, baseoffs), srcp.value);// mov   [basep + 8*indp],srcp
	4042	emit_mov_m64_imm(&dst, MBISD(basereg, indreg, scale, baseoffs), srcp.value);// mov   [basep + scale*indp],srcp
4039	4043	else
4040	4044	{
4041		emit_mov_m32_imm(&dst, MBISD(basereg, indreg, 8, baseoffs), srcp.value);// mov   [basep + 8*ecx],srcp
4042		emit_mov_m32_imm(&dst, MBISD(basereg, indreg, 8, baseoffs + 4), srcp.value >> 32);
4043		// mov   [basep + 8*ecx + 4],srcp >> 32
	4045	emit_mov_m32_imm(&dst, MBISD(basereg, indreg, scale, baseoffs), srcp.value);// mov   [basep + scale*ecx],srcp
	4046	emit_mov_m32_imm(&dst, MBISD(basereg, indreg, scale, baseoffs + 4), srcp.value >> 32);
	4047	// mov   [basep + scale*ecx + 4],srcp >> 32
4044	4048	}
4045	4049	}
4046	4050	}
r6740	r6741
4048	4052	/* variable source */
4049	4053	else
4050	4054	{
4051		if (sizep.value != DRCUML_SIZE_QWORD)
	4055	if (size != DRCUML_SIZE_QWORD)
4052	4056	emit_mov_r32_p32(drcbe, &dst, srcreg, &srcp);                     // mov   srcreg,srcp
4053	4057	else
4054	4058	emit_mov_r64_p64(drcbe, &dst, srcreg, &srcp);                     // mov   edx:srcreg,srcp
4055		if (sizep.value == DRCUML_SIZE_BYTE)
4056		emit_mov_m8_r8(&dst, MBISD(basereg, indreg, 1, baseoffs), srcreg);      // mov   [basep + 1*ecx],srcreg
4057		else if (sizep.value == DRCUML_SIZE_WORD)
4058		emit_mov_m16_r16(&dst, MBISD(basereg, indreg, 2, baseoffs), srcreg);   // mov   [basep + 2*ecx],srcreg
4059		else if (sizep.value == DRCUML_SIZE_DWORD)
4060		emit_mov_m32_r32(&dst, MBISD(basereg, indreg, 4, baseoffs), srcreg);   // mov   [basep + 4*ecx],srcreg
4061		else if (sizep.value == DRCUML_SIZE_QWORD)
4062		emit_mov_m64_r64(&dst, MBISD(basereg, indreg, 8, baseoffs), srcreg);   // mov   [basep + 8*ecx],srcreg
	4059	if (size == DRCUML_SIZE_BYTE)
	4060	emit_mov_m8_r8(&dst, MBISD(basereg, indreg, scale, baseoffs), srcreg);   // mov   [basep + scale*ecx],srcreg
	4061	else if (size == DRCUML_SIZE_WORD)
	4062	emit_mov_m16_r16(&dst, MBISD(basereg, indreg, scale, baseoffs), srcreg);// mov   [basep + scale*ecx],srcreg
	4063	else if (size == DRCUML_SIZE_DWORD)
	4064	emit_mov_m32_r32(&dst, MBISD(basereg, indreg, scale, baseoffs), srcreg);// mov   [basep + scale*ecx],srcreg
	4065	else if (size == DRCUML_SIZE_QWORD)
	4066	emit_mov_m64_r64(&dst, MBISD(basereg, indreg, scale, baseoffs), srcreg);// mov   [basep + scale*ecx],srcreg
4063	4067	}
4064	4068	}
4065	4069	return dst;
r6740	r6741
5440	5444	if (src1p.type == dstp.type && src1p.value == dstp.value && dstp.type == DRCUML_PTYPE_MEMORY)
5441	5445	emit_and_m32_p32(drcbe, &dst, MABS(drcbe, dstp.value), &src2p, inst);      // and   [dstp],src2p
5442	5446
	5447	/* AND with immediate 0xff */
	5448	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xff && inst->flags == 0)
	5449	{
	5450	if (src1p.type == DRCUML_PTYPE_INT_REGISTER)
	5451	emit_movzx_r32_r8(&dst, dstreg, src1p.value);                     // movzx dstreg,src1p
	5452	else if (src1p.type == DRCUML_PTYPE_MEMORY)
	5453	emit_movzx_r32_m8(&dst, dstreg, MABS(drcbe, src1p.value));            // movzx dstreg,[src1p]
	5454	emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5455	}
	5456
	5457	/* AND with immediate 0xffff */
	5458	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xffff && inst->flags == 0)
	5459	{
	5460	if (src1p.type == DRCUML_PTYPE_INT_REGISTER)
	5461	emit_movzx_r32_r16(&dst, dstreg, src1p.value);                     // movzx dstreg,src1p
	5462	else if (src1p.type == DRCUML_PTYPE_MEMORY)
	5463	emit_movzx_r32_m16(&dst, dstreg, MABS(drcbe, src1p.value));            // movzx dstreg,[src1p]
	5464	emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5465	}
	5466
5443	5467	/* general case */
5444	5468	else
5445	5469	{
r6740	r6741
5456	5480	if (src1p.type == dstp.type && src1p.value == dstp.value && dstp.type == DRCUML_PTYPE_MEMORY)
5457	5481	emit_and_m64_p64(drcbe, &dst, MABS(drcbe, dstp.value), &src2p, inst);      // and   [dstp],src2p
5458	5482
	5483	/* AND with immediate 0xff */
	5484	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xff && inst->flags == 0)
	5485	{
	5486	if (src1p.type == DRCUML_PTYPE_INT_REGISTER)
	5487	emit_movzx_r32_r8(&dst, dstreg, src1p.value);                     // movzx dstreg,src1p
	5488	else if (src1p.type == DRCUML_PTYPE_MEMORY)
	5489	emit_movzx_r32_m8(&dst, dstreg, MABS(drcbe, src1p.value));            // movzx dstreg,[src1p]
	5490	emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5491	}
	5492
	5493	/* AND with immediate 0xffff */
	5494	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xffff && inst->flags == 0)
	5495	{
	5496	if (src1p.type == DRCUML_PTYPE_INT_REGISTER)
	5497	emit_movzx_r32_r16(&dst, dstreg, src1p.value);                     // movzx dstreg,src1p
	5498	else if (src1p.type == DRCUML_PTYPE_MEMORY)
	5499	emit_movzx_r32_m16(&dst, dstreg, MABS(drcbe, src1p.value));            // movzx dstreg,[src1p]
	5500	emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5501	}
	5502
	5503	/* AND with immediate 0xffffffff */
	5504	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xffffffff && inst->flags == 0)
	5505	{
	5506	if (src1p.type == dstp.type && src1p.value == dstp.value && dstp.type == DRCUML_PTYPE_INT_REGISTER)
	5507	emit_mov_r32_r32(&dst, dstreg, dstreg);                           // mov   dstreg,dstreg
	5508	else
	5509	{
	5510	emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                     // mov   dstreg,src1p
	5511	emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                     // mov   dstp,dstreg
	5512	}
	5513	}
	5514
5459	5515	/* general case */
5460	5516	else
5461	5517	{

src/emu/cpu/drcbec.c

r6740	r6741
49	49	enum
50	50	{
51	51	DRCUML_OP_LOAD1 = DRCUML_OP_MAX,
	52	DRCUML_OP_LOAD1x2,
	53	DRCUML_OP_LOAD1x4,
	54	DRCUML_OP_LOAD1x8,
	55	DRCUML_OP_LOAD2x1,
52	56	DRCUML_OP_LOAD2,
	57	DRCUML_OP_LOAD2x4,
	58	DRCUML_OP_LOAD2x8,
	59	DRCUML_OP_LOAD4x1,
	60	DRCUML_OP_LOAD4x2,
53	61	DRCUML_OP_LOAD4,
	62	DRCUML_OP_LOAD4x8,
	63	DRCUML_OP_LOAD8x1,
	64	DRCUML_OP_LOAD8x2,
	65	DRCUML_OP_LOAD8x4,
54	66	DRCUML_OP_LOAD8,
55	67	DRCUML_OP_LOADS1,
	68	DRCUML_OP_LOADS1x2,
	69	DRCUML_OP_LOADS1x4,
	70	DRCUML_OP_LOADS1x8,
	71	DRCUML_OP_LOADS2x1,
56	72	DRCUML_OP_LOADS2,
	73	DRCUML_OP_LOADS2x4,
	74	DRCUML_OP_LOADS2x8,
	75	DRCUML_OP_LOADS4x1,
	76	DRCUML_OP_LOADS4x2,
57	77	DRCUML_OP_LOADS4,
	78	DRCUML_OP_LOADS4x8,
	79	DRCUML_OP_LOADS8x1,
	80	DRCUML_OP_LOADS8x2,
	81	DRCUML_OP_LOADS8x4,
58	82	DRCUML_OP_LOADS8,
59	83	DRCUML_OP_STORE1,
	84	DRCUML_OP_STORE1x2,
	85	DRCUML_OP_STORE1x4,
	86	DRCUML_OP_STORE1x8,
	87	DRCUML_OP_STORE2x1,
60	88	DRCUML_OP_STORE2,
	89	DRCUML_OP_STORE2x4,
	90	DRCUML_OP_STORE2x8,
	91	DRCUML_OP_STORE4x1,
	92	DRCUML_OP_STORE4x2,
61	93	DRCUML_OP_STORE4,
	94	DRCUML_OP_STORE4x8,
	95	DRCUML_OP_STORE8x1,
	96	DRCUML_OP_STORE8x2,
	97	DRCUML_OP_STORE8x4,
62	98	DRCUML_OP_STORE8,
63	99	DRCUML_OP_READ1,
64	100	DRCUML_OP_READ2,
r6740	r6741
473	509	if (opcode == DRCUML_OP_FFRINT || opcode == DRCUML_OP_FFRFLT)
474	510	psize[1] = 1 << inst->param[2].value;
475	511
476		/* pre-expand opcodes that encode size in them */
	512	/* pre-expand opcodes that encode size/scale in them */
477	513	if (opcode == DRCUML_OP_LOAD)
478		opcode = (drcuml_opcode)(DRCUML_OP_LOAD1 + (inst->param[3].value & 3));
	514	opcode = (drcuml_opcode)(DRCUML_OP_LOAD1 + (inst->param[3].value & 3) * 4 + ((inst->param[3].value >> 4) & 3));
479	515	if (opcode == DRCUML_OP_LOADS)
480		opcode = (drcuml_opcode)(DRCUML_OP_LOADS1 + (inst->param[3].value & 3));
	516	opcode = (drcuml_opcode)(DRCUML_OP_LOADS1 + (inst->param[3].value & 3) * 4 + ((inst->param[3].value >> 4) & 3));
481	517	if (opcode == DRCUML_OP_STORE)
482		opcode = (drcuml_opcode)(DRCUML_OP_STORE1 + (inst->param[3].value & 3));
	518	opcode = (drcuml_opcode)(DRCUML_OP_STORE1 + (inst->param[3].value & 3) * 4 + ((inst->param[3].value >> 4) & 3));
483	519	if (opcode == DRCUML_OP_READ)
484	520	opcode = (drcuml_opcode)(DRCUML_OP_READ1 + (inst->param[2].value & 3));
485	521	if (opcode == DRCUML_OP_READM)
r6740	r6741
728	764	PARAM0 = inst[1].puint8[PARAM2];
729	765	break;
730	766
	767	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD1x2, 4, 0):   /* LOAD    dst,base,index,BYTE_x2 */
	768	PARAM0 = *(UINT8 *)&inst[1].puint16[PARAM2];
	769	break;
	770
	771	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD1x4, 4, 0):   /* LOAD    dst,base,index,BYTE_x4 */
	772	PARAM0 = *(UINT8 *)&inst[1].puint32[PARAM2];
	773	break;
	774
	775	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD1x8, 4, 0):   /* LOAD    dst,base,index,BYTE_x8 */
	776	PARAM0 = *(UINT8 *)&inst[1].puint64[PARAM2];
	777	break;
	778
	779	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD2x1, 4, 0):   /* LOAD    dst,base,index,WORD_x1 */
	780	PARAM0 = *(UINT16 *)&inst[1].puint8[PARAM2];
	781	break;
	782
731	783	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD2, 4, 0):      /* LOAD    dst,base,index,WORD    */
732	784	PARAM0 = inst[1].puint16[PARAM2];
733	785	break;
734	786
	787	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD2x4, 4, 0):   /* LOAD    dst,base,index,WORD_x4 */
	788	PARAM0 = *(UINT16 *)&inst[1].puint32[PARAM2];
	789	break;
	790
	791	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD2x8, 4, 0):   /* LOAD    dst,base,index,WORD_x8 */
	792	PARAM0 = *(UINT16 *)&inst[1].puint64[PARAM2];
	793	break;
	794
	795	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD4x1, 4, 0):   /* LOAD    dst,base,index,DWORD_x1 */
	796	PARAM0 = *(UINT32 *)&inst[1].puint8[PARAM2];
	797	break;
	798
	799	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD4x2, 4, 0):   /* LOAD    dst,base,index,DWORD_x2 */
	800	PARAM0 = *(UINT32 *)&inst[1].puint16[PARAM2];
	801	break;
	802
735	803	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD4, 4, 0):      /* LOAD    dst,base,index,DWORD   */
736	804	PARAM0 = inst[1].puint32[PARAM2];
737	805	break;
738	806
	807	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD4x8, 4, 0):   /* LOAD    dst,base,index,DWORD_x8 */
	808	PARAM0 = *(UINT32 *)&inst[1].puint64[PARAM2];
	809	break;
	810
739	811	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS1, 4, 0):      /* LOADS   dst,base,index,BYTE    */
740	812	PARAM0 = inst[1].pint8[PARAM2];
741	813	break;
742	814
	815	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS1x2, 4, 0):   /* LOADS   dst,base,index,BYTE_x2 */
	816	PARAM0 = *(INT8 *)&inst[1].pint16[PARAM2];
	817	break;
	818
	819	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS1x4, 4, 0):   /* LOADS   dst,base,index,BYTE_x4 */
	820	PARAM0 = *(INT8 *)&inst[1].pint32[PARAM2];
	821	break;
	822
	823	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS1x8, 4, 0):   /* LOADS   dst,base,index,BYTE_x8 */
	824	PARAM0 = *(INT8 *)&inst[1].pint64[PARAM2];
	825	break;
	826
	827	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS2x1, 4, 0):   /* LOADS   dst,base,index,WORD_x1 */
	828	PARAM0 = *(INT16 *)&inst[1].pint8[PARAM2];
	829	break;
	830
743	831	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS2, 4, 0):      /* LOADS   dst,base,index,WORD    */
744	832	PARAM0 = inst[1].pint16[PARAM2];
745	833	break;
746	834
	835	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS2x4, 4, 0):   /* LOADS   dst,base,index,WORD_x4 */
	836	PARAM0 = *(INT16 *)&inst[1].pint32[PARAM2];
	837	break;
	838
	839	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS2x8, 4, 0):   /* LOADS   dst,base,index,WORD_x8 */
	840	PARAM0 = *(INT16 *)&inst[1].pint64[PARAM2];
	841	break;
	842
	843	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS4x1, 4, 0):   /* LOADS   dst,base,index,DWORD_x1 */
	844	PARAM0 = *(INT32 *)&inst[1].pint8[PARAM2];
	845	break;
	846
	847	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS4x2, 4, 0):   /* LOADS   dst,base,index,DWORD_x2 */
	848	PARAM0 = *(INT32 *)&inst[1].pint16[PARAM2];
	849	break;
	850
747	851	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS4, 4, 0):      /* LOADS   dst,base,index,DWORD   */
748	852	PARAM0 = inst[1].pint32[PARAM2];
749	853	break;
750	854
	855	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS4x8, 4, 0):   /* LOADS   dst,base,index,DWORD_x8 */
	856	PARAM0 = *(INT32 *)&inst[1].pint64[PARAM2];
	857	break;
	858
751	859	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE1, 4, 0):      /* STORE   dst,base,index,BYTE    */
752	860	inst[0].puint8[PARAM1] = PARAM2;
753	861	break;
754	862
	863	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE1x2, 4, 0):   /* STORE   dst,base,index,BYTE_x2 */
	864	*(UINT8 *)&inst[0].puint16[PARAM1] = PARAM2;
	865	break;
	866
	867	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE1x4, 4, 0):   /* STORE   dst,base,index,BYTE_x4 */
	868	*(UINT8 *)&inst[0].puint32[PARAM1] = PARAM2;
	869	break;
	870
	871	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE1x8, 4, 0):   /* STORE   dst,base,index,BYTE_x8 */
	872	*(UINT8 *)&inst[0].puint64[PARAM1] = PARAM2;
	873	break;
	874
	875	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE2x1, 4, 0):   /* STORE   dst,base,index,WORD_x1 */
	876	*(UINT16 *)&inst[0].puint8[PARAM1] = PARAM2;
	877	break;
	878
755	879	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE2, 4, 0):      /* STORE   dst,base,index,WORD    */
756	880	inst[0].puint16[PARAM1] = PARAM2;
757	881	break;
758	882
	883	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE2x4, 4, 0):   /* STORE   dst,base,index,WORD_x4 */
	884	*(UINT16 *)&inst[0].puint32[PARAM1] = PARAM2;
	885	break;
	886
	887	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE2x8, 4, 0):   /* STORE   dst,base,index,WORD_x8 */
	888	*(UINT16 *)&inst[0].puint64[PARAM1] = PARAM2;
	889	break;
	890
	891	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE4x1, 4, 0):   /* STORE   dst,base,index,DWORD_x1 */
	892	*(UINT32 *)&inst[0].puint8[PARAM1] = PARAM2;
	893	break;
	894
	895	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE4x2, 4, 0):   /* STORE   dst,base,index,DWORD_x2 */
	896	*(UINT32 *)&inst[0].puint16[PARAM1] = PARAM2;
	897	break;
	898
759	899	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE4, 4, 0):      /* STORE   dst,base,index,DWORD   */
760	900	inst[0].puint32[PARAM1] = PARAM2;
761	901	break;
762	902
	903	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE4x8, 4, 0):   /* STORE   dst,base,index,DWORD_x8 */
	904	*(UINT32 *)&inst[0].puint64[PARAM1] = PARAM2;
	905	break;
	906
763	907	case MAKE_OPCODE_SHORT(DRCUML_OP_READ1, 4, 0):      /* READ    dst,src1,space_BYTE    */
764	908	PARAM0 = memory_read_byte(drcbe->space[PARAM2 / 16], PARAM1);
765	909	break;
r6740	r6741
1151	1295	DPARAM0 = inst[1].puint8[PARAM2];
1152	1296	break;
1153	1297
	1298	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD1x2, 8, 0):   /* DLOAD   dst,base,index,BYTE_x2 */
	1299	DPARAM0 = *(UINT8 *)&inst[1].puint16[PARAM2];
	1300	break;
	1301
	1302	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD1x4, 8, 0):   /* DLOAD   dst,base,index,BYTE_x4 */
	1303	DPARAM0 = *(UINT8 *)&inst[1].puint32[PARAM2];
	1304	break;
	1305
	1306	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD1x8, 8, 0):   /* DLOAD   dst,base,index,BYTE_x8 */
	1307	DPARAM0 = *(UINT8 *)&inst[1].puint64[PARAM2];
	1308	break;
	1309
	1310	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD2x1, 8, 0):   /* DLOAD   dst,base,index,WORD_x1 */
	1311	DPARAM0 = *(UINT16 *)&inst[1].puint8[PARAM2];
	1312	break;
	1313
1154	1314	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD2, 8, 0):      /* DLOAD   dst,base,index,WORD    */
1155	1315	DPARAM0 = inst[1].puint16[PARAM2];
1156	1316	break;
1157	1317
	1318	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD2x4, 8, 0):   /* DLOAD   dst,base,index,WORD_x4 */
	1319	DPARAM0 = *(UINT16 *)&inst[1].puint32[PARAM2];
	1320	break;
	1321
	1322	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD2x8, 8, 0):   /* DLOAD   dst,base,index,WORD_x8 */
	1323	DPARAM0 = *(UINT16 *)&inst[1].puint64[PARAM2];
	1324	break;
	1325
	1326	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD4x1, 8, 0):   /* DLOAD   dst,base,index,DWORD_x1 */
	1327	DPARAM0 = *(UINT32 *)&inst[1].puint8[PARAM2];
	1328	break;
	1329
	1330	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD4x2, 8, 0):   /* DLOAD   dst,base,index,DWORD_x2 */
	1331	DPARAM0 = *(UINT32 *)&inst[1].puint16[PARAM2];
	1332	break;
	1333
1158	1334	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD4, 8, 0):      /* DLOAD   dst,base,index,DWORD   */
1159	1335	DPARAM0 = inst[1].puint32[PARAM2];
1160	1336	break;
1161	1337
1162		case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD8, 8, 0):      /* DLOAD   dst,base,index,QWORD   */
	1338	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD4x8, 8, 0):   /* DLOAD   dst,base,index,DWORD_x8 */
	1339	DPARAM0 = *(UINT32 *)&inst[1].puint64[PARAM2];
	1340	break;
	1341
	1342	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD8x1, 8, 0):   /* DLOAD   dst,base,index,QWORD_x1 */
	1343	DPARAM0 = *(UINT64 *)&inst[1].puint8[PARAM2];
	1344	break;
	1345
	1346	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD8x2, 8, 0):   /* DLOAD   dst,base,index,QWORD_x2 */
	1347	DPARAM0 = *(UINT64 *)&inst[1].puint16[PARAM2];
	1348	break;
	1349
	1350	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD8x4, 8, 0):   /* DLOAD   dst,base,index,QWORD_x4 */
	1351	DPARAM0 = *(UINT64 *)&inst[1].puint32[PARAM2];
	1352	break;
	1353
	1354	case MAKE_OPCODE_SHORT(DRCUML_OP_LOAD8, 8, 0):      /* DLOAD   dst,base,index,QWORD */
1163	1355	DPARAM0 = inst[1].puint64[PARAM2];
1164	1356	break;
1165	1357
r6740	r6741
1167	1359	DPARAM0 = inst[1].pint8[PARAM2];
1168	1360	break;
1169	1361
	1362	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS1x2, 8, 0):   /* DLOADS  dst,base,index,BYTE_x2 */
	1363	DPARAM0 = *(INT8 *)&inst[1].pint16[PARAM2];
	1364	break;
	1365
	1366	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS1x4, 8, 0):   /* DLOADS  dst,base,index,BYTE_x4 */
	1367	DPARAM0 = *(INT8 *)&inst[1].pint32[PARAM2];
	1368	break;
	1369
	1370	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS1x8, 8, 0):   /* DLOADS  dst,base,index,BYTE_x8 */
	1371	DPARAM0 = *(INT8 *)&inst[1].pint64[PARAM2];
	1372	break;
	1373
	1374	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS2x1, 8, 0):   /* DLOADS  dst,base,index,WORD_x1 */
	1375	DPARAM0 = *(INT16 *)&inst[1].pint8[PARAM2];
	1376	break;
	1377
1170	1378	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS2, 8, 0):      /* DLOADS  dst,base,index,WORD    */
1171	1379	DPARAM0 = inst[1].pint16[PARAM2];
1172	1380	break;
1173	1381
	1382	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS2x4, 8, 0):   /* DLOADS  dst,base,index,WORD_x4 */
	1383	DPARAM0 = *(INT16 *)&inst[1].pint32[PARAM2];
	1384	break;
	1385
	1386	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS2x8, 8, 0):   /* DLOADS  dst,base,index,WORD_x8 */
	1387	DPARAM0 = *(INT16 *)&inst[1].pint64[PARAM2];
	1388	break;
	1389
	1390	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS4x1, 8, 0):   /* DLOADS  dst,base,index,DWORD_x1 */
	1391	DPARAM0 = *(INT32 *)&inst[1].pint8[PARAM2];
	1392	break;
	1393
	1394	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS4x2, 8, 0):   /* DLOADS  dst,base,index,DWORD_x2 */
	1395	DPARAM0 = *(INT32 *)&inst[1].pint16[PARAM2];
	1396	break;
	1397
1174	1398	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS4, 8, 0):      /* DLOADS  dst,base,index,DWORD   */
1175	1399	DPARAM0 = inst[1].pint32[PARAM2];
1176	1400	break;
1177	1401
	1402	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS4x8, 8, 0):   /* DLOADS  dst,base,index,DWORD_x8 */
	1403	DPARAM0 = *(INT32 *)&inst[1].pint64[PARAM2];
	1404	break;
	1405
	1406	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS8x1, 8, 0):   /* DLOADS  dst,base,index,QWORD_x1 */
	1407	DPARAM0 = *(INT64 *)&inst[1].pint8[PARAM2];
	1408	break;
	1409
	1410	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS8x2, 8, 0):   /* DLOADS  dst,base,index,QWORD_x2 */
	1411	DPARAM0 = *(INT64 *)&inst[1].pint16[PARAM2];
	1412	break;
	1413
	1414	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS8x4, 8, 0):   /* DLOADS  dst,base,index,QWORD_x4 */
	1415	DPARAM0 = *(INT64 *)&inst[1].pint32[PARAM2];
	1416	break;
	1417
	1418	case MAKE_OPCODE_SHORT(DRCUML_OP_LOADS8, 8, 0):      /* DLOADS  dst,base,index,QWORD   */
	1419	DPARAM0 = inst[1].pint64[PARAM2];
	1420	break;
	1421
1178	1422	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE1, 8, 0):      /* DSTORE  dst,base,index,BYTE    */
1179	1423	inst[0].puint8[PARAM1] = DPARAM2;
1180	1424	break;
1181	1425
	1426	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE1x2, 8, 0):   /* DSTORE  dst,base,index,BYTE_x2 */
	1427	*(UINT8 *)&inst[0].puint16[PARAM1] = DPARAM2;
	1428	break;
	1429
	1430	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE1x4, 8, 0):   /* DSTORE  dst,base,index,BYTE_x4 */
	1431	*(UINT8 *)&inst[0].puint32[PARAM1] = DPARAM2;
	1432	break;
	1433
	1434	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE1x8, 8, 0):   /* DSTORE  dst,base,index,BYTE_x8 */
	1435	*(UINT8 *)&inst[0].puint64[PARAM1] = DPARAM2;
	1436	break;
	1437
	1438	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE2x1, 8, 0):   /* DSTORE  dst,base,index,WORD_x1 */
	1439	*(UINT16 *)&inst[0].puint8[PARAM1] = DPARAM2;
	1440	break;
	1441
1182	1442	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE2, 8, 0):      /* DSTORE  dst,base,index,WORD    */
1183	1443	inst[0].puint16[PARAM1] = DPARAM2;
1184	1444	break;
1185	1445
	1446	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE2x4, 8, 0):   /* DSTORE  dst,base,index,WORD_x4 */
	1447	*(UINT16 *)&inst[0].puint32[PARAM1] = DPARAM2;
	1448	break;
	1449
	1450	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE2x8, 8, 0):   /* DSTORE  dst,base,index,WORD_x8 */
	1451	*(UINT16 *)&inst[0].puint64[PARAM1] = DPARAM2;
	1452	break;
	1453
	1454	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE4x1, 8, 0):   /* DSTORE  dst,base,index,DWORD_x1 */
	1455	*(UINT32 *)&inst[0].puint8[PARAM1] = DPARAM2;
	1456	break;
	1457
	1458	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE4x2, 8, 0):   /* DSTORE  dst,base,index,DWORD_x2 */
	1459	*(UINT32 *)&inst[0].puint16[PARAM1] = DPARAM2;
	1460	break;
	1461
1186	1462	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE4, 8, 0):      /* DSTORE  dst,base,index,DWORD   */
1187	1463	inst[0].puint32[PARAM1] = DPARAM2;
1188	1464	break;
1189	1465
1190		case MAKE_OPCODE_SHORT(DRCUML_OP_STORE8, 8, 0):      /* DSTORE  dst,base,index,QWORD   */
	1466	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE4x8, 8, 0):   /* DSTORE  dst,base,index,DWORD_x8 */
	1467	*(UINT32 *)&inst[0].puint64[PARAM1] = DPARAM2;
	1468	break;
	1469
	1470	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE8x1, 8, 0):   /* DSTORE  dst,base,index,QWORD_x1 */
	1471	*(UINT64 *)&inst[0].puint8[PARAM1] = DPARAM2;
	1472	break;
	1473
	1474	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE8x2, 8, 0):   /* DSTORE  dst,base,index,QWORD_x2 */
	1475	*(UINT64 *)&inst[0].puint16[PARAM1] = DPARAM2;
	1476	break;
	1477
	1478	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE8x4, 8, 0):   /* DSTORE  dst,base,index,QWORD_x4 */
	1479	*(UINT64 *)&inst[0].puint32[PARAM1] = DPARAM2;
	1480	break;
	1481
	1482	case MAKE_OPCODE_SHORT(DRCUML_OP_STORE8, 8, 0):      /* DSTORE  dst,base,index,QWORD    */
1191	1483	inst[0].puint64[PARAM1] = DPARAM2;
1192	1484	break;
1193	1485

src/emu/cpu/rsp/rspfe.c

r6740	r6741
63	63
64	64	case 0x02:   /* J */
65	65	desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
66		desc->targetpc = LIMMVAL << 2;
	66	desc->targetpc = ((LIMMVAL << 2) & 0x00000fff) | 0x1000;
67	67	desc->delayslots = 1;
68	68	return TRUE;
69	69
70	70	case 0x03:   /* JAL */
71	71	desc->regout[0] |= REGFLAG_R(31);
72	72	desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
73		desc->targetpc = LIMMVAL << 2;
	73	desc->targetpc = ((LIMMVAL << 2) & 0x00000fff) | 0x1000;
74	74	desc->delayslots = 1;
75	75	return TRUE;
76	76
r6740	r6741
83	83	desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
84	84	desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
85	85	}
86		desc->targetpc = (desc->pc + 4 + (SIMMVAL << 2)) | 0x04001000;
	86	desc->targetpc = ((desc->pc + 4 + (SIMMVAL << 2)) & 0x00000fff) | 0x1000;
87	87	desc->delayslots = 1;
88	88	desc->skipslots = (opswitch & 0x10) ? 1 : 0;
89	89	return TRUE;
r6740	r6741
97	97	desc->regin[0] |= REGFLAG_R(RSREG);
98	98	desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
99	99	}
100		desc->targetpc = (desc->pc + 4 + (SIMMVAL << 2)) | 0x04001000;
	100	desc->targetpc = ((desc->pc + 4 + (SIMMVAL << 2)) & 0x00000fff) | 0x1000;
101	101	desc->delayslots = 1;
102	102	desc->skipslots = (opswitch & 0x10) ? 1 : 0;
103	103	return TRUE;
r6740	r6741
236	236	desc->regin[0] |= REGFLAG_R(RSREG);
237	237	desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
238	238	}
239		desc->targetpc = (desc->pc + 4 + (SIMMVAL << 2)) | 0x04001000;
	239	desc->targetpc = ((desc->pc + 4 + (SIMMVAL << 2)) & 0x00000fff) | 0x1000;
240	240	desc->delayslots = 1;
241	241	desc->skipslots = (RTREG & 0x02) ? 1 : 0;
242	242	return TRUE;
r6740	r6741
251	251	desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
252	252	}
253	253	desc->regout[0] |= REGFLAG_R(31);
254		desc->targetpc = (desc->pc + 4 + (SIMMVAL << 2)) | 0x04001000;
	254	desc->targetpc = ((desc->pc + 4 + (SIMMVAL << 2)) & 0x00000fff) | 0x1000;
255	255	desc->delayslots = 1;
256	256	desc->skipslots = (RTREG & 0x02) ? 1 : 0;
257	257	return TRUE;

src/emu/cpu/rsp/rspdrc.c

r6740	r6741
2	2
3	3	rspdrc.c
4	4
5		Universal machine language-based Nintendo/SGI RSP emulator.
6		Written by Harmony of the MESS team.
	5	Universal machine language-based Nintendo/SGI RSP emulator.
	6	Written by Harmony of the MESS team.
7	7
8	8	Copyright the MESS team.
9	9	Released for general non-commercial use under the MAME license
r6740	r6741
20	20
21	21	#include "cpuintrf.h"
22	22	#include "debugger.h"
	23	#include "profiler.h"
23	24	#include "rsp.h"
24	25	#include "rspfe.h"
25	26	#include "cpu/drcfe.h"
r6740	r6741
172	173	static int generate_cop0(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
173	174	static int generate_cop2(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
174	175
	176	static void log_add_disasm_comment(rsp_state *rsp, drcuml_block *block, UINT32 pc, UINT32 op);
	177
175	178	/***************************************************************************
176	179	HELPFUL DEFINES
177	180	***************************************************************************/
r6740	r6741
415	418	debugging
416	419	-------------------------------------------------*/
417	420
	421	#ifndef LSB_FIRST
418	422	static void cfunc_printf_debug(void *param)
419	423	{
420	424	rsp_state *rsp = (rsp_state *)param;
421	425	printf(rsp->impstate->format, rsp->impstate->arg0, rsp->impstate->arg1);
422	426	logerror(rsp->impstate->format, rsp->impstate->arg0, rsp->impstate->arg1);
423	427	}
	428	#endif
424	429
425	430
426	431	static void cfunc_get_cop0_reg(void *param)
r6740	r6741
879	884
880	885	for (i=(16 - index); i < end; i++)
881	886	{
	887	//printf("%d",i);
882	888	W_VREG_B(dest, i & 0xf, READ8(rsp, ea));
883	889	ea += 4;
884	890	}
	891	//printf("\n");
885	892	break;
886	893	}
887	894	case 0x0b:      /* LTV */
r6740	r6741
1213	1220	}
1214	1221	}
1215	1222
1216		INLINE UINT16 SATURATE_ACCUM(rsp_state *rsp, int accum, int slice, UINT16 negative, UINT16 positive)
	1223	INLINE UINT16 SATURATE_ACCUM_SIGNED(rsp_state *rsp, int accum, int slice)
1217	1224	{
1218	1225	if (ACCUM(accum).h.high < 0)
1219	1226	{
1220	1227	if ((UINT16)ACCUM(accum).h.high != 0xffff)
1221	1228	{
1222		return negative;
	1229	return 0x8000;
1223	1230	}
1224	1231	else
1225	1232	{
1226	1233	if (ACCUM(accum).h.mid >= 0)
1227	1234	{
1228		return negative;
	1235	return 0x8000;
1229	1236	}
1230	1237	else
1231	1238	{
r6740	r6741
1244	1251	{
1245	1252	if ((UINT16)ACCUM(accum).h.high != 0)
1246	1253	{
1247		return positive;
	1254	return 0x7fff;
1248	1255	}
1249	1256	else
1250	1257	{
1251	1258	if (ACCUM(accum).h.mid < 0)
1252	1259	{
1253		return positive;
	1260	return 0x7fff;
1254	1261	}
1255	1262	else
1256	1263	{
r6740	r6741
1269	1276	return 0;
1270	1277	}
1271	1278
	1279	INLINE UINT16 SATURATE_ACCUM_UNSIGNED(rsp_state *rsp, int accum, int slice)
	1280	{
	1281	if (ACCUM(accum).h.high < 0)
	1282	{
	1283	if ((UINT16)ACCUM(accum).h.high != 0xffff)
	1284	{
	1285	return 0;
	1286	}
	1287	else
	1288	{
	1289	if (ACCUM(accum).h.mid >= 0)
	1290	{
	1291	return 0;
	1292	}
	1293	else
	1294	{
	1295	if (slice == 0)
	1296	{
	1297	return ACCUM(accum).h.low;
	1298	}
	1299	else if (slice == 1)
	1300	{
	1301	return ACCUM(accum).h.mid;
	1302	}
	1303	}
	1304	}
	1305	}
	1306	else
	1307	{
	1308	if ((UINT16)ACCUM(accum).h.high != 0)
	1309	{
	1310	return 0xffff;
	1311	}
	1312	else
	1313	{
	1314	if (ACCUM(accum).h.mid < 0)
	1315	{
	1316	return 0xffff;
	1317	}
	1318	else
	1319	{
	1320	if (slice == 0)
	1321	{
	1322	return ACCUM(accum).h.low;
	1323	}
	1324	else
	1325	{
	1326	return ACCUM(accum).h.mid;
	1327	}
	1328	}
	1329	}
	1330	}
	1331
	1332	return 0;
	1333	}
	1334
1272	1335	#define WRITEBACK_RESULT()                \
1273	1336	do {                           \
1274	1337	W_VREG_S(VDREG, 0, vres[0]);         \
r6740	r6741
1517	1580
1518	1581	ACCUM(del).l += (INT64)(r) << 17;
1519	1582	//ACCUM(del) += (INT64)(r) << 17;
1520		res = SATURATE_ACCUM(rsp, del, 1, 0x8000, 0x7fff);
	1583	res = SATURATE_ACCUM_SIGNED(rsp, del, 1);
1521	1584
1522	1585	vres[del] = res;
1523	1586	}
r6740	r6741
1604	1667	W_ACCUM_M(del, (UINT16)(r3));
1605	1668	W_ACCUM_H(del, ACCUM(del).h.high + (INT16)(r3 >> 16));
1606	1669
1607		res = SATURATE_ACCUM(rsp, del, 0, 0x0000, 0xffff);
	1670	res = SATURATE_ACCUM_UNSIGNED(rsp, del, 0);
1608	1671
1609	1672	vres[del] = res;
1610	1673	}
r6740	r6741
1640	1703	if ((INT32)(r1) < 0)
1641	1704	W_ACCUM_H(del, (UINT16)ACCUM(del).h.high - 1);
1642	1705
1643		res = SATURATE_ACCUM(rsp, del, 1, 0x8000, 0x7fff);
	1706	res = SATURATE_ACCUM_SIGNED(rsp, del, 1);
1644	1707
1645	1708	vres[del] = res;
1646	1709	}
r6740	r6741
1675	1738	if ((INT32)(r1) < 0)
1676	1739	W_ACCUM_H(del, (UINT16)ACCUM(del).h.high - 1);
1677	1740
1678		vres[del] = SATURATE_ACCUM(rsp, del, 0, 0x0000, 0xffff);
	1741	vres[del] = SATURATE_ACCUM_UNSIGNED(rsp, del, 0);
1679	1742	}
1680	1743	WRITEBACK_RESULT();
1681	1744	}
r6740	r6741
1703	1766
1704	1767	ACCUM(del).l += (INT64)(r) << 32;
1705	1768
1706		res = SATURATE_ACCUM(rsp, del, 1, 0x8000, 0x7fff);
	1769	res = SATURATE_ACCUM_SIGNED(rsp, del, 1);
1707	1770
1708	1771	vres[del] = res;
1709	1772	}
r6740	r6741
2331	2394	WRITEBACK_RESULT();
2332	2395	}
2333	2396
2334		//   switch(EL)
2335		//   {
2336		//      case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */      /* 0, 1, 2, 3, 4, 5, 6, 7 - none */
2337		//         break;
2338		//      case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ???  */      /* 0, 1, 2, 3, 4, 5, 6, 7 - ???  */
2339		//         break;
2340		//      case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q   */      /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q   */
2341		//         break;
2342		//      case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q   */      /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q   */
2343		//         break;
2344		//      case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */      /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
2345		//         break;
2346		//      case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */      /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
2347		//         break;
2348		//      case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h   */      /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h   */
2349		//         break;
2350		//      case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h   */      /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h   */
2351		//         break;
2352		//      case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0    */      /*  0, 0, 0, 0, 0, 0, 0, 0 - 0    */
2353		//         break;
2354		//      case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1    */      /*  1, 1, 1, 1, 1, 1, 1, 1 - 0    */
2355		//         break;
2356		//      case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2    */      /*  2, 2, 2, 2, 2, 2, 2, 2 - 0    */
2357		//         break;
2358		//      case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3    */      /*  3, 3, 3, 3, 3, 3, 3, 3 - 0    */
2359		//         break;
2360		//      case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4    */      /*  4, 4, 4, 4, 4, 4, 4, 4 - 0    */
2361		//         break;
2362		//      case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5    */      /*  5, 5, 5, 5, 5, 5, 5, 5 - 0    */
2363		//         break;
2364		//      case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6    */      /*  6, 6, 6, 6, 6, 6, 6, 6 - 0    */
2365		//         break;
2366		//      case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7    */      /*  7, 7, 7, 7, 7, 7, 7, 7 - 0    */
2367		//         break;
2368		//   }
	2397	//  switch(EL)
	2398	//  {
	2399	//      case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */     /* 0, 1, 2, 3, 4, 5, 6, 7 - none */
	2400	//          break;
	2401	//      case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ???  */     /* 0, 1, 2, 3, 4, 5, 6, 7 - ???  */
	2402	//          break;
	2403	//      case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q   */     /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q   */
	2404	//          break;
	2405	//      case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q   */     /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q   */
	2406	//          break;
	2407	//      case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */     /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
	2408	//          break;
	2409	//      case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */     /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
	2410	//          break;
	2411	//      case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h   */     /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h   */
	2412	//          break;
	2413	//      case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h   */     /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h   */
	2414	//          break;
	2415	//      case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0    */     /*  0, 0, 0, 0, 0, 0, 0, 0 - 0    */
	2416	//          break;
	2417	//      case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1    */     /*  1, 1, 1, 1, 1, 1, 1, 1 - 0    */
	2418	//          break;
	2419	//      case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2    */     /*  2, 2, 2, 2, 2, 2, 2, 2 - 0    */
	2420	//          break;
	2421	//      case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3    */     /*  3, 3, 3, 3, 3, 3, 3, 3 - 0    */
	2422	//          break;
	2423	//      case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4    */     /*  4, 4, 4, 4, 4, 4, 4, 4 - 0    */
	2424	//          break;
	2425	//      case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5    */     /*  5, 5, 5, 5, 5, 5, 5, 5 - 0    */
	2426	//          break;
	2427	//      case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6    */     /*  6, 6, 6, 6, 6, 6, 6, 6 - 0    */
	2428	//          break;
	2429	//      case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7    */     /*  7, 7, 7, 7, 7, 7, 7, 7 - 0    */
	2430	//          break;
	2431	//  }
2369	2432
2370	2433	#define RSP_VMRG(E10, E11, E12, E13, E14, E15, E16, E17, E20, E21, E22, E23, E24, E25, E26, E27) \
2371	2434	if (COMPARE_FLAG(E10))               \
r6740	r6741
2465	2528	RSP_VMRG(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7);
2466	2529	break;
2467	2530	case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */      /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
2468		RSP_VMRG(1, 3, 5, 6, 7, 0, 4, 6, 0, 0, 0, 0, 4, 4, 4, 4);
	2531	RSP_VMRG(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4);
2469	2532	break;
2470	2533	case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */      /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
2471	2534	RSP_VMRG(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5);
r6740	r6741
2546	2609	RSP_VAND(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7);
2547	2610	break;
2548	2611	case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */      /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
2549		RSP_VAND(1, 3, 5, 6, 7, 0, 4, 6, 0, 0, 0, 0, 4, 4, 4, 4);
	2612	RSP_VAND(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4);
2550	2613	break;
2551	2614	case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */      /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
2552	2615	RSP_VAND(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5);
r6740	r6741
2627	2690	RSP_VNAND(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7);
2628	2691	break;
2629	2692	case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */      /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
2630		RSP_VNAND(1, 3, 5, 6, 7, 0, 4, 6, 0, 0, 0, 0, 4, 4, 4, 4);
	2693	RSP_VNAND(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4);
2631	2694	break;
2632	2695	case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */      /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
2633	2696	RSP_VNAND(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5);
r6740	r6741
2708	2771	RSP_VOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7);
2709	2772	break;
2710	2773	case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */      /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
2711		RSP_VOR(1, 3, 5, 6, 7, 0, 4, 6, 0, 0, 0, 0, 4, 4, 4, 4);
	2774	RSP_VOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4);
2712	2775	break;
2713	2776	case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */      /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
2714	2777	RSP_VOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5);
r6740	r6741
2789	2852	RSP_VNOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7);
2790	2853	break;
2791	2854	case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */      /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
2792		RSP_VNOR(1, 3, 5, 6, 7, 0, 4, 6, 0, 0, 0, 0, 4, 4, 4, 4);
	2855	RSP_VNOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4);
2793	2856	break;
2794	2857	case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */      /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
2795	2858	RSP_VNOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5);
r6740	r6741
2870	2933	RSP_VXOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7);
2871	2934	break;
2872	2935	case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */      /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
2873		RSP_VXOR(1, 3, 5, 6, 7, 0, 4, 6, 0, 0, 0, 0, 4, 4, 4, 4);
	2936	RSP_VXOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4);
2874	2937	break;
2875	2938	case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */      /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
2876	2939	RSP_VXOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5);
r6740	r6741
2951	3014	RSP_VNXOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7);
2952	3015	break;
2953	3016	case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h   */      /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h   */
2954		RSP_VNXOR(1, 3, 5, 6, 7, 0, 4, 6, 0, 0, 0, 0, 4, 4, 4, 4);
	3017	RSP_VNXOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4);
2955	3018	break;
2956	3019	case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h   */      /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h   */
2957	3020	RSP_VNXOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5);
r6740	r6741
3560	3623	drcuml_block *block;
3561	3624	jmp_buf errorbuf;
3562	3625
	3626	profiler_mark_start(PROFILER_DRC_COMPILE);
	3627
3563	3628	/* get a description of this sequence */
3564	3629	desclist = drcfe_describe_code(rsp->impstate->drcfe, pc);
3565	3630
r6740	r6741
3639	3704
3640	3705	/* end the sequence */
3641	3706	drcuml_block_end(block);
	3707	profiler_mark_end();
3642	3708	}
3643	3709
3644	3710	/***************************************************************************
r6740	r6741
3662	3728	cfunc_fatalerror - a generic fatalerror call
3663	3729	-------------------------------------------------*/
3664	3730
	3731	#ifndef LSB_FIRST
3665	3732	static void cfunc_fatalerror(void *param)
3666	3733	{
3667	3734	//fatalerror("fatalerror");
3668	3735	}
	3736	#endif
3669	3737
3670	3738
3671	3739	/***************************************************************************
r6740	r6741
3781	3849	drcuml_state *drcuml = rsp->impstate->drcuml;
3782	3850	drcuml_block *block;
3783	3851	jmp_buf errorbuf;
3784		int label = 1;
3785		UINT32 unaligned_w2 = label++;
3786		UINT32 aligned_w2 = label++;
3787		UINT32 unaligned_w4 = label++;
3788		UINT32 unaligned_r2 = label++;
3789		UINT32 unaligned_r4 = label++;
	3852	int unaligned_case = 1;
3790	3853
3791	3854	/* if we get an error back, we're screwed */
3792	3855	if (setjmp(errorbuf) != 0)
r6740	r6741
3801	3864	alloc_handle(drcuml, handleptr, name);
3802	3865	UML_HANDLE(block, *handleptr);                                       // handle  *handleptr
3803	3866
3804		UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));
3805	3867
3806	3868	// write:
3807	3869	if (iswrite)
3808	3870	{
3809	3871	if (size == 1)
3810	3872	{
3811		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));         // xor     i0,i0,bytexor
3812		UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), BYTE);   // store   dmem,i0,i1,byte
	3873	#ifdef LSB_FIRST
	3874	UML_XOR(block, IREG(0), IREG(0), IMM(3));                           // xor     i0,i0,3
	3875	#endif
	3876	UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
	3877	UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), BYTE);            // store   dmem,i0,i1,byte
3813	3878	}
3814	3879	else if (size == 2)
3815	3880	{
3816		static const char text[] = "%08x: Unaligned word write to %08x\n";
	3881	#ifdef LSB_FIRST
3817	3882	UML_TEST(block, IREG(0), IMM(1));                                 // test    i0,1
3818		UML_JMPc(block, IF_NZ, unaligned_w2);                              // jnz     <unaligned_w2>
3819		UML_JMP(block, aligned_w2);                                       // jmp     <aligned_w2>
3820
3821		UML_LABEL(block, unaligned_w2);                                    // <unaligned_w2>:
3822		UML_MOV(block, MEM(&rsp->impstate->format), IMM((FPTR)text));            // mov     [format],text
3823		UML_MOV(block, MEM(&rsp->impstate->arg0), IMM(rsp->pc));               // mov     [arg0],rsp->pc
3824		UML_MOV(block, MEM(&rsp->impstate->arg1), IREG(0));                     // mov     [arg1],i0
3825		UML_CALLC(block, cfunc_printf_debug, rsp);                           // callc   printf_debug
3826		UML_CALLC(block, cfunc_fatalerror, rsp);
3827
3828		UML_LABEL(block, aligned_w2);                                    // <aligned_w2>:
3829		UML_SHR(block, IREG(0), IREG(0), IMM(1));                           // shr     i0,i0,1
3830		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE_XOR_BE(0)));                  // xor     i0,i0,bytexor
3831		UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), WORD);            // store   dmem,i0,i1,word
	3883	UML_JMPc(block, IF_NZ, unaligned_case);                              // jnz     <unaligned_case>
	3884	UML_XOR(block, IREG(0), IREG(0), IMM(2));                           // xor     i0,i0,2
	3885	#endif
	3886	UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
	3887	UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), WORD_x1);         // store   dmem,i0,i1,word_x1
	3888	UML_RET(block);
	3889	#ifdef LSB_FIRST
	3890	UML_LABEL(block, unaligned_case);                              // unaligned_case:
	3891	UML_ROLAND(block, IREG(2), IREG(0), IMM(3), IMM(0x18));                  // roland  i2,i0,3,0x18
	3892	UML_AND(block, IREG(0), IREG(0), IMM(0xffc));                        // and     i0,i0,0xffc
	3893	UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1);          // dload   i3,dmem,i0,qword_x1
	3894	UML_DROL(block, IREG(3), IREG(3), IREG(2));                           // drol    i3,i3,i2
	3895	UML_DAND(block, IREG(1), IREG(1), IMM(0xffff));                        // dand    i1,i1,0xffff
	3896	UML_DAND(block, IREG(3), IREG(3), IMM(U64(0xffffffffffff0000)));         // dand    i3,i3,~0xffff
	3897	UML_DOR(block, IREG(1), IREG(1), IREG(3));                           // dor     i1,i1,i3
	3898	UML_DROR(block, IREG(1), IREG(1), IREG(2));                           // dror    i1,i1,i2
	3899	UML_DSTORE(block, rsp->impstate->dmem, IREG(0), IREG(1), QWORD_x1);       // dstore  dmem,i0,i1,qword_x1
	3900	#endif
3832	3901	}
3833	3902	else if (size == 4)
3834	3903	{
	3904	#ifdef LSB_FIRST
3835	3905	UML_TEST(block, IREG(0), IMM(3));                                 // test    i0,3
3836		UML_JMPc(block, IF_NZ, unaligned_w4);                              // jnz     <unaligned_w4>
3837
3838		UML_SHR(block, IREG(0), IREG(0), IMM(2));                           // shr     i0,i0,2
3839		UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), DWORD);            // store   dmem,i0,i1,dword
	3906	UML_JMPc(block, IF_NZ, unaligned_case);                              // jnz     <unaligned_case>
	3907	#endif
	3908	UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
	3909	UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), DWORD_x1);         // store   dmem,i0,i1,dword_x1
3840	3910	UML_RET(block);
3841
3842		UML_LABEL(block, unaligned_w4);
3843		UML_ADD(block, IREG(0), IREG(0), IMM(3));
3844
3845		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3846		UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), BYTE);
3847
3848		UML_SHR(block, IREG(1), IREG(1), IMM(8));
3849		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3850		UML_SUB(block, IREG(0), IREG(0), IMM(1));
3851		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3852		UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), BYTE);
3853
3854		UML_SHR(block, IREG(1), IREG(1), IMM(8));
3855		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3856		UML_SUB(block, IREG(0), IREG(0), IMM(1));
3857		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3858		UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), BYTE);
3859
3860		UML_SHR(block, IREG(1), IREG(1), IMM(8));
3861		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3862		UML_SUB(block, IREG(0), IREG(0), IMM(1));
3863		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3864		UML_STORE(block, rsp->impstate->dmem, IREG(0), IREG(1), BYTE);
	3911	#ifdef LSB_FIRST
	3912	UML_LABEL(block, unaligned_case);                              // unaligned_case:
	3913	UML_ROLAND(block, IREG(2), IREG(0), IMM(3), IMM(0x18));                  // roland  i2,i0,3,0x18
	3914	UML_AND(block, IREG(0), IREG(0), IMM(0xffc));                        // and     i0,i0,0xffc
	3915	UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1);          // dload   i3,dmem,i0,qword_x1
	3916	UML_DROL(block, IREG(3), IREG(3), IREG(2));                           // drol    i3,i3,i2
	3917	UML_DAND(block, IREG(1), IREG(1), IMM(0xffffffff));                     // dand    i1,i1,0xffffffff
	3918	UML_DAND(block, IREG(3), IREG(3), IMM(U64(0xffffffff00000000)));         // dand    i3,i3,~0xffffffff
	3919	UML_DOR(block, IREG(1), IREG(1), IREG(3));                           // dor     i1,i1,i3
	3920	UML_DROR(block, IREG(1), IREG(1), IREG(2));                           // dror    i1,i1,i2
	3921	UML_DSTORE(block, rsp->impstate->dmem, IREG(0), IREG(1), QWORD_x1);       // dstore  dmem,i0,i1,qword_x1
	3922	#endif
3865	3923	}
3866	3924	}
3867	3925	else
3868	3926	{
3869	3927	if (size == 1)
3870	3928	{
3871		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));                  // xor     i0,i0,bytexor
	3929	#ifdef LSB_FIRST
	3930	UML_XOR(block, IREG(0), IREG(0), IMM(3));                           // xor     i0,i0,3
	3931	#endif
	3932	UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
3872	3933	UML_LOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), BYTE);            // load    i0,dmem,i0,byte
3873	3934	}
3874	3935	else if (size == 2)
3875	3936	{
3876		UML_TEST(block, IREG(0), IMM(1));                                 // test    i0,3
3877		UML_JMPc(block, IF_NZ, unaligned_r2);                              // jnz     <unaligned_r2>
3878
3879		UML_SHR(block, IREG(0), IREG(0), IMM(1));                           // shr     i0,i0,1
3880		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE_XOR_BE(0)));                  // xor     i0,i0,bytexor
3881		UML_LOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), WORD);            // load    i0,dmem,i0,word
	3937	#ifdef LSB_FIRST
	3938	UML_TEST(block, IREG(0), IMM(1));                                 // test    i0,1
	3939	UML_JMPc(block, IF_NZ, unaligned_case);                              // jnz     <unaligned_case>
	3940	UML_XOR(block, IREG(0), IREG(0), IMM(2));                           // xor     i0,i0,2
	3941	#endif
	3942	UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
	3943	UML_LOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), WORD_x1);         // load    i0,dmem,i0,word_x1
3882	3944	UML_RET(block);
3883
3884		UML_LABEL(block, unaligned_r2);
3885		UML_MOV(block, IREG(2), IMM(0));
3886		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3887
3888		UML_LOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), BYTE);
3889		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3890		UML_ADD(block, IREG(0), IREG(0), IMM(1));
3891		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3892		UML_OR(block, IREG(2), IREG(2), IREG(3));
3893
3894		UML_LOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), BYTE);
3895		UML_ADD(block, IREG(0), IREG(0), IMM(1));
3896		UML_SHL(block, IREG(2), IREG(2), IMM(8));
3897		UML_OR(block, IREG(2), IREG(2), IREG(3));
3898
3899		UML_MOV(block, IREG(0), IREG(2));
	3945	#ifdef LSB_FIRST
	3946	UML_LABEL(block, unaligned_case);                              // unaligned_case:
	3947	UML_ROLAND(block, IREG(1), IREG(0), IMM(3), IMM(0x18));                  // roland  i1,i0,3,0x18
	3948	UML_AND(block, IREG(0), IREG(0), IMM(0xffc));                        // and     i0,i0,0xffc
	3949	UML_DLOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), QWORD_x1);          // dload   i0,dmem,i0,qword_x1
	3950	UML_DROL(block, IREG(0), IREG(0), IREG(1));                           // drol    i0,i0,i1
	3951	UML_AND(block, IREG(0), IREG(0), IMM(0xffff));                        // and     i0,i0,0xffff
	3952	#endif
3900	3953	}
3901	3954	else if (size == 4)
3902	3955	{
	3956	#ifdef LSB_FIRST
3903	3957	UML_TEST(block, IREG(0), IMM(3));                                 // test    i0,3
3904		UML_JMPc(block, IF_NZ, unaligned_r4);                              // jnz     <unaligned_r4>
3905
3906		UML_SHR(block, IREG(0), IREG(0), IMM(2));                           // shr     i0,i0,2
3907		UML_LOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), DWORD);            // load    i0,dmem,i0,dword
	3958	UML_JMPc(block, IF_NZ, unaligned_case);                              // jnz     <unaligned_case>
	3959	#endif
	3960	UML_AND(block, IREG(0), IREG(0), IMM(0x00000fff));                     // and     i0,i0,0xfff
	3961	UML_LOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), DWORD_x1);         // load    i0,dmem,i0,dword_x1
3908	3962	UML_RET(block);
3909
3910		UML_LABEL(block, unaligned_r4);
3911		UML_MOV(block, IREG(2), IMM(0));
3912		UML_MOV(block, IREG(3), IMM(0));
3913
3914		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3915		UML_LOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), BYTE);
3916		UML_SHL(block, IREG(3), IREG(3), IMM(24));
3917		UML_OR(block, IREG(2), IREG(2), IREG(3));
3918
3919		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3920		UML_ADD(block, IREG(0), IREG(0), IMM(1));
3921		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3922		UML_LOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), BYTE);
3923		UML_SHL(block, IREG(3), IREG(3), IMM(16));
3924		UML_OR(block, IREG(2), IREG(2), IREG(3));
3925
3926		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3927		UML_ADD(block, IREG(0), IREG(0), IMM(1));
3928		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3929		UML_LOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), BYTE);
3930		UML_SHL(block, IREG(3), IREG(3), IMM(8));
3931		UML_OR(block, IREG(2), IREG(2), IREG(3));
3932
3933		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3934		UML_ADD(block, IREG(0), IREG(0), IMM(1));
3935		UML_XOR(block, IREG(0), IREG(0), IMM(BYTE4_XOR_BE(0)));
3936		UML_LOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), BYTE);
3937		UML_OR(block, IREG(2), IREG(2), IREG(3));
3938
3939		UML_MOV(block, IREG(0), IREG(2));
	3963	#ifdef LSB_FIRST
	3964	UML_LABEL(block, unaligned_case);                              // unaligned_case:
	3965	UML_ROLAND(block, IREG(1), IREG(0), IMM(3), IMM(0x18));                  // roland  i1,i0,3,0x18
	3966	UML_AND(block, IREG(0), IREG(0), IMM(0xffc));                        // and     i0,i0,0xffc
	3967	UML_DLOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), QWORD_x1);          // dload   i0,dmem,i0,qword_x1
	3968	UML_DROL(block, IREG(0), IREG(0), IREG(1));                           // drol    i0,i0,i1
	3969	#endif
3940	3970	}
3941	3971	}
3942	3972	UML_RET(block);
r6740	r6741
4021	4051	{
4022	4052	offs_t expc;
4023	4053
	4054	/* add an entry for the log */
	4055	if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
	4056	log_add_disasm_comment(rsp, block, desc->pc, desc->opptr.l[0]);
	4057
4024	4058	/* set the PC map variable */
4025	4059	expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc;
4026	4060	UML_MAPVAR(block, MAPVAR_PC, expc);                                    // mapvar  PC,expc
r6740	r6741
4042	4076	/* if we hit an unmapped address, fatal error */
4043	4077	//if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
4044	4078	//{
4045		//   UML_MOV(block, MEM(&rsp->pc), IMM(desc->pc));                        // mov     [pc],desc->pc
4046		//   save_fast_iregs(rsp, block);
4047		//   UML_EXIT(block, IMM(EXECUTE_UNMAPPED_CODE));                        // exit    EXECUTE_UNMAPPED_CODE
	4079	//  UML_MOV(block, MEM(&rsp->pc), IMM(desc->pc));                               // mov     [pc],desc->pc
	4080	//  save_fast_iregs(rsp, block);
	4081	//  UML_EXIT(block, IMM(EXECUTE_UNMAPPED_CODE));                                // exit    EXECUTE_UNMAPPED_CODE
4048	4082	//}
4049	4083
4050	4084	/* otherwise, unless this is a virtual no-op, it's a regular instruction */
r6740	r6741
4074	4108	if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
4075	4109	{
4076	4110	UML_MOV(block, MEM(&rsp->impstate->jmpdest), R32(RSREG));               // mov     [jmpdest],<rsreg>
	4111	UML_AND(block, MEM(&rsp->impstate->jmpdest), R32(RSREG), IMM(0x00000fff));
	4112	UML_OR(block, MEM(&rsp->impstate->jmpdest), MEM(&rsp->impstate->jmpdest), IMM(0x1000));
4077	4113	}
4078	4114
4079	4115	/* set the link if needed -- before the delay slot */
r6740	r6741
4194	4230	case 0x09:   /* ADDIU - MIPS I */
4195	4231	if (RTREG != 0)
4196	4232	{
4197		UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));               // add     i0,<rsreg>,SIMMVAL,V
4198		UML_SEXT(block, R32(RTREG), IREG(0), DWORD);                  // dsext   <rtreg>,i0,dword
	4233	UML_ADD(block, R32(RTREG), R32(RSREG), IMM(SIMMVAL));         // add     i0,<rsreg>,SIMMVAL,V
4199	4234	}
4200	4235	return TRUE;
4201	4236
r6740	r6741
4255	4290	UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
4256	4291	UML_CALLH(block, rsp->impstate->read32);                        // callh   read32
4257	4292	if (RTREG != 0)
4258		UML_SEXT(block, R32(RTREG), IREG(0), DWORD);                  // dsext   <rtreg>,i0
	4293	UML_MOV(block, R32(RTREG), IREG(0));                     // mov   <rtreg>,i0
4259	4294	if (!in_delay_slot)
4260	4295	generate_update_cycles(rsp, block, compiler, IMM(desc->pc + 4), TRUE);
4261	4296	return TRUE;
r6740	r6741
4282	4317	UML_MOV(block, MEM(&rsp->impstate->arg0), IMM(desc->opptr.l[0]));      // mov     [arg0],desc->opptr.l
4283	4318	UML_CALLC(block, cfunc_lwc2, rsp);                              // callc   cfunc_mfc2
4284	4319	return TRUE;
	4320	//return generate_lwc2(rsp, block, compiler, desc);
4285	4321
4286	4322
4287	4323	/* ----- memory store operations ----- */
r6740	r6741
4353	4389	case 0x00:   /* SLL - MIPS I */
4354	4390	if (RDREG != 0)
4355	4391	{
4356		UML_SHL(block, IREG(0), R32(RTREG), IMM(SHIFT));               // shl     i0,<rtreg>,<shift>
4357		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4392	UML_SHL(block, R32(RDREG), R32(RTREG), IMM(SHIFT));               // shl     i0,<rtreg>,<shift>
4358	4393	}
4359	4394	return TRUE;
4360	4395
4361	4396	case 0x02:   /* SRL - MIPS I */
4362	4397	if (RDREG != 0)
4363	4398	{
4364		UML_SHR(block, IREG(0), R32(RTREG), IMM(SHIFT));               // shr     i0,<rtreg>,<shift>
4365		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4399	UML_SHR(block, R32(RDREG), R32(RTREG), IMM(SHIFT));               // shr     i0,<rtreg>,<shift>
4366	4400	}
4367	4401	return TRUE;
4368	4402
4369	4403	case 0x03:   /* SRA - MIPS I */
4370	4404	if (RDREG != 0)
4371	4405	{
4372		UML_SAR(block, IREG(0), R32(RTREG), IMM(SHIFT));               // sar     i0,<rtreg>,<shift>
4373		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4406	UML_SAR(block, R32(RDREG), R32(RTREG), IMM(SHIFT));               // sar     i0,<rtreg>,<shift>
4374	4407	}
4375	4408	return TRUE;
4376	4409
4377	4410	case 0x04:   /* SLLV - MIPS I */
4378	4411	if (RDREG != 0)
4379	4412	{
4380		UML_SHL(block, IREG(0), R32(RTREG), R32(RSREG));               // shl     i0,<rtreg>,<rsreg>
4381		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4413	UML_SHL(block, R32(RDREG), R32(RTREG), R32(RSREG));               // shl     i0,<rtreg>,<rsreg>
4382	4414	}
4383	4415	return TRUE;
4384	4416
4385	4417	case 0x06:   /* SRLV - MIPS I */
4386	4418	if (RDREG != 0)
4387	4419	{
4388		UML_SHR(block, IREG(0), R32(RTREG), R32(RSREG));               // shr     i0,<rtreg>,<rsreg>
4389		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4420	UML_SHR(block, R32(RDREG), R32(RTREG), R32(RSREG));               // shr     i0,<rtreg>,<rsreg>
4390	4421	}
4391	4422	return TRUE;
4392	4423
4393	4424	case 0x07:   /* SRAV - MIPS I */
4394	4425	if (RDREG != 0)
4395	4426	{
4396		UML_SAR(block, IREG(0), R32(RTREG), R32(RSREG));               // sar     i0,<rtreg>,<rsreg>
4397		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4427	UML_SAR(block, R32(RDREG), R32(RTREG), R32(RSREG));               // sar     i0,<rtreg>,<rsreg>
4398	4428	}
4399	4429	return TRUE;
4400	4430
r6740	r6741
4403	4433	case 0x20:   /* ADD - MIPS I */
4404	4434	if (RDREG != 0)
4405	4435	{
4406		UML_ADD(block, IREG(0), R32(RSREG), R32(RTREG));               // add     i0,<rsreg>,<rtreg>
4407		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4436	UML_ADD(block, R32(RDREG), R32(RSREG), R32(RTREG));               // add     i0,<rsreg>,<rtreg>
4408	4437	}
4409	4438	return TRUE;
4410	4439
4411	4440	case 0x21:   /* ADDU - MIPS I */
4412	4441	if (RDREG != 0)
4413	4442	{
4414		UML_ADD(block, IREG(0), R32(RSREG), R32(RTREG));               // add     i0,<rsreg>,<rtreg>
4415		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4443	UML_ADD(block, R32(RDREG), R32(RSREG), R32(RTREG));               // add     i0,<rsreg>,<rtreg>
4416	4444	}
4417	4445	return TRUE;
4418	4446
4419	4447	case 0x22:   /* SUB - MIPS I */
4420	4448	if (RDREG != 0)
4421	4449	{
4422		UML_SUB(block, IREG(0), R32(RSREG), R32(RTREG));               // sub     i0,<rsreg>,<rtreg>
4423		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4450	UML_SUB(block, R32(RDREG), R32(RSREG), R32(RTREG));               // sub     i0,<rsreg>,<rtreg>
4424	4451	}
4425	4452	return TRUE;
4426	4453
4427	4454	case 0x23:   /* SUBU - MIPS I */
4428	4455	if (RDREG != 0)
4429	4456	{
4430		UML_SUB(block, IREG(0), R32(RSREG), R32(RTREG));               // sub     i0,<rsreg>,<rtreg>
4431		UML_SEXT(block, R32(RDREG), IREG(0), DWORD);                  // dsext   <rdreg>,i0,dword
	4457	UML_SUB(block, R32(RDREG), R32(RSREG), R32(RTREG));               // sub     i0,<rsreg>,<rtreg>
4432	4458	}
4433	4459	return TRUE;
4434	4460
r6740	r6741
4501	4527	return FALSE;
4502	4528	}
4503	4529
4504
4505
4506	4530	/*-------------------------------------------------
4507	4531	generate_regimm - compile opcodes in the
4508	4532	'REGIMM' group
r6740	r6741
4563	4587	{
4564	4588	UML_MOV(block, MEM(&rsp->impstate->arg0), IMM(desc->opptr.l[0]));   // mov     [arg0],desc->opptr.l
4565	4589	UML_CALLC(block, cfunc_mfc2, rsp);                           // callc   cfunc_mfc2
4566		//UML_SEXT(block, R32(RTREG), IREG(0), DWORD);                  // dsext   <rtreg>,i0,dword
	4590	//UML_SEXT(block, R32(RTREG), IREG(0), DWORD);                      // dsext   <rtreg>,i0,dword
4567	4591	}
4568	4592	return TRUE;
4569	4593
r6740	r6741
4572	4596	{
4573	4597	UML_MOV(block, MEM(&rsp->impstate->arg0), IMM(desc->opptr.l[0]));   // mov     [arg0],desc->opptr.l
4574	4598	UML_CALLC(block, cfunc_cfc2, rsp);                           // callc   cfunc_cfc2
4575		//UML_SEXT(block, R32(RTREG), IREG(0), DWORD);                  // dsext   <rtreg>,i0,dword
	4599	//UML_SEXT(block, R32(RTREG), IREG(0), DWORD);                      // dsext   <rtreg>,i0,dword
4576	4600	}
4577	4601	return TRUE;
4578	4602
r6740	r6741
4609	4633	case 0x00:   /* MFCz */
4610	4634	if (RTREG != 0)
4611	4635	{
4612		UML_SEXT(block, MEM(&rsp->impstate->arg0), IMM(RDREG), DWORD);      // mov     [arg0],<rtreg>,dword
4613		UML_SEXT(block, MEM(&rsp->impstate->arg1), IMM(RTREG), DWORD);      // mov     [arg1],<rdval>,dword
	4636	UML_MOV(block, MEM(&rsp->impstate->arg0), IMM(RDREG));            // mov     [arg0],<rtreg>,dword
	4637	UML_MOV(block, MEM(&rsp->impstate->arg1), IMM(RTREG));            // mov     [arg1],<rdval>,dword
4614	4638	UML_CALLC(block, cfunc_get_cop0_reg, rsp);                     // callc   cfunc_get_cop0_reg
4615	4639	}
4616	4640	return TRUE;
4617	4641
4618	4642	case 0x04:   /* MTCz */
4619		UML_SEXT(block, MEM(&rsp->impstate->arg0), IMM(RDREG), DWORD);         // mov     [arg0],<rtreg>,dword
4620		UML_SEXT(block, MEM(&rsp->impstate->arg1), R32(RTREG), DWORD);         // mov     [arg1],<rdval>,dword
	4643	UML_MOV(block, MEM(&rsp->impstate->arg0), IMM(RDREG));               // mov     [arg0],<rtreg>,dword
	4644	UML_MOV(block, MEM(&rsp->impstate->arg1), R32(RTREG));               // mov     [arg1],<rdval>,dword
4621	4645	UML_CALLC(block, cfunc_set_cop0_reg, rsp);                        // callc   cfunc_set_cop0_reg
4622	4646	return TRUE;
4623	4647	}
r6740	r6741
4670	4694	rsp->flag[RDREG] = RTVAL & 0xffff;
4671	4695	}
4672	4696
	4697	/***************************************************************************
	4698	CODE LOGGING HELPERS
	4699	***************************************************************************/
	4700
	4701	/*-------------------------------------------------
	4702	log_add_disasm_comment - add a comment
	4703	including disassembly of a RSP instruction
	4704	-------------------------------------------------*/
	4705
	4706	static void log_add_disasm_comment(rsp_state *rsp, drcuml_block *block, UINT32 pc, UINT32 op)
	4707	{
	4708	#if (LOG_UML)
	4709	char buffer[100];
	4710	rsp_dasm_one(buffer, pc, op);
	4711	UML_COMMENT(block, "%08X: %s", pc, buffer);                              // comment
	4712	#endif
	4713	}
	4714
	4715
4673	4716	static CPU_SET_INFO( rsp )
4674	4717	{
4675	4718	rsp_state *rsp = get_safe_token(device);

src/emu/cpu/powerpc/ppcdrc.c

r6740	r6741
19	19	#include <stddef.h>
20	20	#include "cpuintrf.h"
21	21	#include "debugger.h"
	22	#include "profiler.h"
22	23	#include "ppccom.h"
23	24	#include "ppcfe.h"
24	25	#include "cpu/drcfe.h"
r6740	r6741
953	954	drcuml_block *block;
954	955	jmp_buf errorbuf;
955	956
	957	profiler_mark_start(PROFILER_DRC_COMPILE);
	958
956	959	/* get a description of this sequence */
957	960	desclist = drcfe_describe_code(ppc->impstate->drcfe, pc);
958	961	if (LOG_UML || LOG_NATIVE)
r6740	r6741
1034	1037
1035	1038	/* end the sequence */
1036	1039	drcuml_block_end(block);
	1040	profiler_mark_end();
1037	1041	}
1038	1042
1039	1043
r6740	r6741
1568	1572	{
1569	1573	if (size == 1)
1570	1574	{
1571		UML_XOR(block, IREG(0), IREG(0), IMM(fastxor >> 0));               // xor     i0,i0,fastxor >>
	1575	UML_XOR(block, IREG(0), IREG(0), IMM(fastxor & 7));                  // xor     i0,i0,fastxor & 7
1572	1576	UML_LOAD(block, IREG(0), fastbase, IREG(0), BYTE);                  // load    i0,fastbase,i0,byte
1573	1577	}
1574	1578	else if (size == 2)
1575	1579	{
1576		UML_SHR(block, IREG(0), IREG(0), IMM(1));                        // shr     i0,i0,1
1577		UML_XOR(block, IREG(0), IREG(0), IMM(fastxor >> 1));               // xor     i0,i0,fastxor >> 1
1578		UML_LOAD(block, IREG(0), fastbase, IREG(0), WORD);                  // load    i0,fastbase,i0,word
	1580	UML_XOR(block, IREG(0), IREG(0), IMM(fastxor & 6));                  // xor     i0,i0,fastxor & 6
	1581	UML_LOAD(block, IREG(0), fastbase, IREG(0), WORD_x1);               // load    i0,fastbase,i0,word_x1
1579	1582	}
1580	1583	else if (size == 4)
1581	1584	{
1582		UML_SHR(block, IREG(0), IREG(0), IMM(2));                        // shr     i0,i0,2
1583		UML_XOR(block, IREG(0), IREG(0), IMM(fastxor >> 2));               // xor     i0,i0,fastxor >> 2
1584		UML_LOAD(block, IREG(0), fastbase, IREG(0), DWORD);                  // load    i0,fastbase,i0,dword
	1585	UML_XOR(block, IREG(0), IREG(0), IMM(fastxor & 4));                  // xor     i0,i0,fastxor & 4
	1586	UML_LOAD(block, IREG(0), fastbase, IREG(0), DWORD_x1);               // load    i0,fastbase,i0,dword_x1
1585	1587	}
1586	1588	else if (size == 8)
1587	1589	{
1588		UML_SHR(block, IREG(0), IREG(0), IMM(3));                        // shr     i0,i0,3
1589		UML_DLOAD(block, IREG(0), fastbase, IREG(0), QWORD);               // dload   i0,fastbase,i0,qword
	1590	UML_DLOAD(block, IREG(0), fastbase, IREG(0), QWORD_x1);               // dload   i0,fastbase,i0,qword
1590	1591	}
1591	1592	UML_RET(block);                                                // ret
1592	1593	}
r6740	r6741
1594	1595	{
1595	1596	if (size == 1)
1596	1597	{
1597		UML_XOR(block, IREG(0), IREG(0), IMM(fastxor >> 0));               // xor     i0,i0,fastxor >>
	1598	UML_XOR(block, IREG(0), IREG(0), IMM(fastxor & 7));                  // xor     i0,i0,fastxor & 7
1598	1599	UML_STORE(block, fastbase, IREG(0), IREG(1), BYTE);                  // store   fastbase,i0,i1,byte
1599	1600	}
1600	1601	else if (size == 2)
1601	1602	{
1602		UML_SHR(block, IREG(0), IREG(0), IMM(1));                        // shr     i0,i0,1
1603		UML_XOR(block, IREG(0), IREG(0), IMM(fastxor >> 1));               // xor     i0,i0,fastxor >> 1
1604		UML_STORE(block, fastbase, IREG(0), IREG(1), WORD);                  // store   fastbase,i0,i1,word
	1603	UML_XOR(block, IREG(0), IREG(0), IMM(fastxor & 6));                  // xor     i0,i0,fastxor & 6
	1604	UML_STORE(block, fastbase, IREG(0), IREG(1), WORD_x1);               // store   fastbase,i0,i1,word_x1
1605	1605	}
1606	1606	else if (size == 4)
1607	1607	{
1608		UML_SHR(block, IREG(0), IREG(0), IMM(2));                        // shr     i0,i0,2
1609		UML_XOR(block, IREG(0), IREG(0), IMM(fastxor >> 2));               // xor     i0,i0,fastxor >> 2
	1608	UML_XOR(block, IREG(0), IREG(0), IMM(fastxor & 4));                  // xor     i0,i0,fastxor & 4
1610	1609	if (ismasked)
1611	1610	{
1612		UML_LOAD(block, IREG(3), fastbase, IREG(0), DWORD);               // load    i3,fastbase,i0,dword
	1611	UML_LOAD(block, IREG(3), fastbase, IREG(0), DWORD_x1);            // load    i3,fastbase,i0,dword_x1
1613	1612	UML_AND(block, IREG(1), IREG(1), IREG(2));                     // and     i1,i1,i2
1614	1613	UML_XOR(block, IREG(2), IREG(2), IMM(0xffffffff));               // xor     i2,i2,0xfffffffff
1615	1614	UML_AND(block, IREG(3), IREG(3), IREG(2));                     // and     i3,i3,i2
1616	1615	UML_OR(block, IREG(1), IREG(1), IREG(3));                     // or      i1,i1,i3
1617	1616	}
1618		UML_STORE(block, fastbase, IREG(0), IREG(1), DWORD);               // store   fastbase,i0,i1,dword
	1617	UML_STORE(block, fastbase, IREG(0), IREG(1), DWORD_x1);               // store   fastbase,i0,i1,dword_x1
1619	1618	}
1620	1619	else if (size == 8)
1621	1620	{
1622		UML_SHR(block, IREG(0), IREG(0), IMM(3));                        // shr     i0,i0,3
1623	1621	if (ismasked)
1624	1622	{
1625		UML_DLOAD(block, IREG(3), fastbase, IREG(0), QWORD);            // dload   i3,fastbase,i0,qword
	1623	UML_DLOAD(block, IREG(3), fastbase, IREG(0), QWORD_x1);            // dload   i3,fastbase,i0,qword_x1
1626	1624	UML_DAND(block, IREG(1), IREG(1), IREG(2));                     // dand    i1,i1,i2
1627	1625	UML_DXOR(block, IREG(2), IREG(2), IMM(U64(0xffffffffffffffff)));   // dxor    i2,i2,0xfffffffffffffffff
1628	1626	UML_DAND(block, IREG(3), IREG(3), IREG(2));                     // dand    i3,i3,i2
1629	1627	UML_DOR(block, IREG(1), IREG(1), IREG(3));                     // dor     i1,i1,i3
1630	1628	}
1631		UML_DSTORE(block, fastbase, IREG(0), IREG(1), QWORD);               // dstore  fastbase,i0,i1,qword
	1629	UML_DSTORE(block, fastbase, IREG(0), IREG(1), QWORD_x1);            // dstore  fastbase,i0,i1,qword_x1
1632	1630	}
1633	1631	UML_RET(block);                                                // ret
1634	1632	}

src/emu/cpu/sh2/sh2drc.c

r6740	r6741
19	19	#include "sh2.h"
20	20	#include "sh2comn.h"
21	21	#include "eminline.h"
	22	#include "profiler.h"
22	23
23	24	CPU_DISASSEMBLE( sh2 );
24	25
r6740	r6741
930	931	drcuml_block *block;
931	932	jmp_buf errorbuf;
932	933
	934	profiler_mark_start(PROFILER_DRC_COMPILE);
	935
933	936	/* get a description of this sequence */
934	937	desclist = drcfe_describe_code(sh2->drcfe, pc);
935	938	if (LOG_UML || LOG_NATIVE)
r6740	r6741
1019	1022
1020	1023	/* end the sequence */
1021	1024	drcuml_block_end(block);
	1025	profiler_mark_end();
1022	1026	}
1023	1027
1024	1028	/*-------------------------------------------------

src/emu/cpu/drcumlsh.h

r6740	r6741
106	106
107	107
108	108	/* ----- 32-Bit Integer Operations ----- */
109		#define UML_LOAD(block, dst, base, index, size)            do { drcuml_block_append_4(block, DRCUML_OP_LOAD,    4, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SIZE_##size)); } while (0)
110		#define UML_LOADS(block, dst, base, index, size)         do { drcuml_block_append_4(block, DRCUML_OP_LOADS,   4, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SIZE_##size)); } while (0)
111		#define UML_STORE(block, base, index, src1, size)         do { drcuml_block_append_4(block, DRCUML_OP_STORE,   4, IF_ALWAYS,  MEM(base), index, src1, IMM(DRCUML_SIZE_##size)); } while (0)
	109	#define UML_LOAD(block, dst, base, index, size)            do { drcuml_block_append_4(block, DRCUML_OP_LOAD,    4, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SCSIZE_##size)); } while (0)
	110	#define UML_LOADS(block, dst, base, index, size)         do { drcuml_block_append_4(block, DRCUML_OP_LOADS,   4, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SCSIZE_##size)); } while (0)
	111	#define UML_STORE(block, base, index, src1, size)         do { drcuml_block_append_4(block, DRCUML_OP_STORE,   4, IF_ALWAYS,  MEM(base), index, src1, IMM(DRCUML_SCSIZE_##size)); } while (0)
112	112	#define UML_READ(block, dst, src1, spsize)               do { drcuml_block_append_3(block, DRCUML_OP_READ,    4, IF_ALWAYS,  dst, src1, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
113	113	#define UML_READM(block, dst, src1, mask, spsize)         do { drcuml_block_append_4(block, DRCUML_OP_READM,   4, IF_ALWAYS,  dst, src1, mask, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
114	114	#define UML_WRITE(block, dst, src1, spsize)               do { drcuml_block_append_3(block, DRCUML_OP_WRITE,   4, IF_ALWAYS,  dst, src1, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
r6740	r6741
145	145
146	146
147	147	/* ----- 64-Bit Integer Operations ----- */
148		#define UML_DLOAD(block, dst, base, index, size)         do { drcuml_block_append_4(block, DRCUML_OP_LOAD,    8, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SIZE_##size)); } while (0)
149		#define UML_DLOADS(block, dst, base, index, size)         do { drcuml_block_append_4(block, DRCUML_OP_LOADS,   8, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SIZE_##size)); } while (0)
150		#define UML_DSTORE(block, base, index, src1, size)         do { drcuml_block_append_4(block, DRCUML_OP_STORE,   8, IF_ALWAYS,  MEM(base), index, src1, IMM(DRCUML_SIZE_##size)); } while (0)
	148	#define UML_DLOAD(block, dst, base, index, size)         do { drcuml_block_append_4(block, DRCUML_OP_LOAD,    8, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SCSIZE_##size)); } while (0)
	149	#define UML_DLOADS(block, dst, base, index, size)         do { drcuml_block_append_4(block, DRCUML_OP_LOADS,   8, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SCSIZE_##size)); } while (0)
	150	#define UML_DSTORE(block, base, index, src1, size)         do { drcuml_block_append_4(block, DRCUML_OP_STORE,   8, IF_ALWAYS,  MEM(base), index, src1, IMM(DRCUML_SCSIZE_##size)); } while (0)
151	151	#define UML_DREAD(block, dst, src1, spsize)               do { drcuml_block_append_3(block, DRCUML_OP_READ,    8, IF_ALWAYS,  dst, src1, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
152	152	#define UML_DREADM(block, dst, src1, mask, spsize)         do { drcuml_block_append_4(block, DRCUML_OP_READM,   8, IF_ALWAYS,  dst, src1, mask, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
153	153	#define UML_DWRITE(block, dst, src1, spsize)            do { drcuml_block_append_3(block, DRCUML_OP_WRITE,   8, IF_ALWAYS,  dst, src1, IMM(DRCUML_SPSIZE_##spsize)); } while (0)

src/emu/cpu/mips/mips3drc.c

r6740	r6741
28	28	#include <stddef.h>
29	29	#include "cpuintrf.h"
30	30	#include "debugger.h"
	31	#include "profiler.h"
31	32	#include "cpuexec.h"
32	33	#include "mips3com.h"
33	34	#include "mips3fe.h"
r6740	r6741
749	750	drcuml_block *block;
750	751	jmp_buf errorbuf;
751	752
	753	profiler_mark_start(PROFILER_DRC_COMPILE);
	754
752	755	/* get a description of this sequence */
753	756	desclist = drcfe_describe_code(mips3->impstate->drcfe, pc);
754	757	if (LOG_UML || LOG_NATIVE)
r6740	r6741
832	835
833	836	/* end the sequence */
834	837	drcuml_block_end(block);
	838	profiler_mark_end();
835	839	}
836	840
837	841
r6740	r6741
1301	1305	}
1302	1306	else if (size == 2)
1303	1307	{
1304		UML_SHR(block, IREG(0), IREG(0), IMM(1));                  // shr     i0,i0,1
1305		UML_XOR(block, IREG(0), IREG(0), IMM(mips3->bigendian ? BYTE_XOR_BE(0) : BYTE_XOR_LE(0)));
1306		// xor     i0,i0,bytexor
1307		UML_LOAD(block, IREG(0), fastbase, IREG(0), WORD);            // load    i0,fastbase,i0,word
	1308	UML_XOR(block, IREG(0), IREG(0), IMM(mips3->bigendian ? WORD_XOR_BE(0) : WORD_XOR_LE(0)));
	1309	// xor     i0,i0,wordxor
	1310	UML_LOAD(block, IREG(0), fastbase, IREG(0), WORD_x1);         // load    i0,fastbase,i0,word_x1
1308	1311	}
1309	1312	else if (size == 4)
1310	1313	{
1311		UML_SHR(block, IREG(0), IREG(0), IMM(2));                  // shr     i0,i0,2
1312		UML_LOAD(block, IREG(0), fastbase, IREG(0), DWORD);            // load    i0,fastbase,i0,dword
	1314	UML_LOAD(block, IREG(0), fastbase, IREG(0), DWORD_x1);         // load    i0,fastbase,i0,dword_x1
1313	1315	}
1314	1316	else if (size == 8)
1315	1317	{
1316		UML_SHR(block, IREG(0), IREG(0), IMM(3));                  // shr     i0,i0,3
1317		UML_DLOAD(block, IREG(0), fastbase, IREG(0), QWORD);         // dload   i0,fastbase,i0,qword
	1318	UML_DLOAD(block, IREG(0), fastbase, IREG(0), QWORD_x1);         // dload   i0,fastbase,i0,qword_x1
1318	1319	UML_DROR(block, IREG(0), IREG(0), IMM(32 * (mips3->bigendian ? BYTE_XOR_BE(0) : BYTE_XOR_LE(0))));
1319	1320	// dror    i0,i0,32*bytexor
1320	1321	}
r6740	r6741
1330	1331	}
1331	1332	else if (size == 2)
1332	1333	{
1333		UML_SHR(block, IREG(0), IREG(0), IMM(1));                  // shr     i0,i0,1
1334		UML_XOR(block, IREG(0), IREG(0), IMM(mips3->bigendian ? BYTE_XOR_BE(0) : BYTE_XOR_LE(0)));
1335		// xor     i0,i0,bytexor
1336		UML_STORE(block, fastbase, IREG(0), IREG(1), WORD);            // store   fastbase,i0,i1,word
	1334	UML_XOR(block, IREG(0), IREG(0), IMM(mips3->bigendian ? WORD_XOR_BE(0) : WORD_XOR_LE(0)));
	1335	// xor     i0,i0,wordxor
	1336	UML_STORE(block, fastbase, IREG(0), IREG(1), WORD_x1);         // store   fastbase,i0,i1,word_x1
1337	1337	}
1338	1338	else if (size == 4)
1339	1339	{
1340		UML_SHR(block, IREG(0), IREG(0), IMM(2));                  // shr     i0,i0,2
1341	1340	if (ismasked)
1342	1341	{
1343		UML_LOAD(block, IREG(3), fastbase, IREG(0), DWORD);         // load    i3,fastbase,i0,dword
	1342	UML_LOAD(block, IREG(3), fastbase, IREG(0), DWORD_x1);      // load    i3,fastbase,i0,dword_x1
1344	1343	UML_ROLINS(block, IREG(3), IREG(1), IMM(0), IREG(2));      // rolins  i3,i1,0,i2
1345		UML_STORE(block, fastbase, IREG(0), IREG(3), DWORD);      // store   fastbase,i0,i3,dword
	1344	UML_STORE(block, fastbase, IREG(0), IREG(3), DWORD_x1);      // store   fastbase,i0,i3,dword_x1
1346	1345	}
1347	1346	else
1348		UML_STORE(block, fastbase, IREG(0), IREG(1), DWORD);      // store   fastbase,i0,i1,dword
	1347	UML_STORE(block, fastbase, IREG(0), IREG(1), DWORD_x1);      // store   fastbase,i0,i1,dword_x1
1349	1348	}
1350	1349	else if (size == 8)
1351	1350	{
1352		UML_SHR(block, IREG(0), IREG(0), IMM(3));                  // shr     i0,i0,3
1353	1351	UML_DROR(block, IREG(1), IREG(1), IMM(32 * (mips3->bigendian ? BYTE_XOR_BE(0) : BYTE_XOR_LE(0))));
1354	1352	// dror    i1,i1,32*bytexor
1355	1353	if (ismasked)
1356	1354	{
1357	1355	UML_DROR(block, IREG(2), IREG(2), IMM(32 * (mips3->bigendian ? BYTE_XOR_BE(0) : BYTE_XOR_LE(0))));
1358	1356	// dror    i2,i2,32*bytexor
1359		UML_DLOAD(block, IREG(3), fastbase, IREG(0), QWORD);      // dload   i3,fastbase,i0,qword
	1357	UML_DLOAD(block, IREG(3), fastbase, IREG(0), QWORD_x1);      // dload   i3,fastbase,i0,qword_x1
1360	1358	UML_DROLINS(block, IREG(3), IREG(1), IMM(0), IREG(2));      // drolins i3,i1,0,i2
1361		UML_DSTORE(block, fastbase, IREG(0), IREG(3), QWORD);      // dstore  fastbase,i0,i3,qword
	1359	UML_DSTORE(block, fastbase, IREG(0), IREG(3), QWORD_x1);   // dstore  fastbase,i0,i3,qword_x1
1362	1360	}
1363	1361	else
1364		UML_DSTORE(block, fastbase, IREG(0), IREG(1), QWORD);      // dstore  fastbase,i0,i1,qword
	1362	UML_DSTORE(block, fastbase, IREG(0), IREG(1), QWORD_x1);   // dstore  fastbase,i0,i1,qword_x1
1365	1363	}
1366	1364	UML_RET(block);                                          // ret
1367	1365	}

src/emu/cpu/x86emit.h

r6740	r6741
1900	1900	INLINE void emit_movsx_r32_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS)               { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, MEMPARAMS); }
1901	1901	INLINE void emit_movsx_r32_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg)                  { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, sreg); }
1902	1902	INLINE void emit_movsx_r32_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS)            { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, MEMPARAMS); }
1903		INLINE void emit_movzx_r32_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg)                  { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, sreg); }
	1903	INLINE void emit_movzx_r32_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg)
	1904	{
	1905	#ifndef PTR64
	1906	if (sreg >= 4)
	1907	{
	1908	emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, sreg);                     // mov dreg,sreg
	1909	emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, 0xff);    // and dreg,0xff
	1910	}
	1911	else
	1912	#endif
	1913	emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, sreg);
	1914	}
1904	1915	INLINE void emit_movzx_r32_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS)               { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, MEMPARAMS); }
1905	1916	INLINE void emit_movzx_r32_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg)                  { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, sreg); }
1906	1917	INLINE void emit_movzx_r32_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS)            { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, MEMPARAMS); }

src/emu/cpu/v810/v810.c

r6740	r6741
140	140	#define D16(x) (((x)&0xffff)|(((x)&0x8000)?0xffff0000:0))
141	141	#define D26(x,y) ((y)|((x&0x3ff)<<16 )|((x&0x200)?0xfc000000:0))
142	142	#define D9(x) ((x&0x1ff)|((x&0x100)?0xfffffe00:0))
143		#define SO(opcode) ((opcode)&0xfc00)>>10)
	143	#define SO(opcode) (((opcode)&0xfc00)>>10)
144	144
145	145	#define CHECK_CY(x)   cpustate->PSW=(cpustate->PSW & ~8)|(((x) & (((UINT64)1) << 32)) ? 8 : 0)
146	146	#define CHECK_OVADD(x,y,z)   cpustate->PSW=(cpustate->PSW & ~0x00000004) |(( ((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 4: 0)

src/emu/cpu/drcbex86.c

r6740	r6741
18	18
19	19	* Identify common pairs and optimize output
20	20
21		* Convert AND 0xff/0xffff to movzx
22
23	21	* Convert SUB a,0,b to NEG
24	22
25	23	* Optimize, e.g., and [r5],i0,$FF to use ebx as temporary register
r6740	r6741
174	172
175	173	UINT32 *            reglo[REG_MAX];         /* pointer to low part of data for each register */
176	174	UINT32 *            reghi[REG_MAX];         /* pointer to high part of data for each register */
	175	UINT8               last_lower_reg;         /* last register we stored a lower from */
	176	x86code *            last_lower_pc;         /* PC after instruction where we last stored a lower register */
	177	UINT32 *            last_lower_addr;      /* address where we last stored an lower register */
	178	UINT8               last_upper_reg;         /* last register we stored an upper from */
	179	x86code *            last_upper_pc;         /* PC after instruction where we last stored an upper register */
	180	UINT32 *            last_upper_addr;      /* address where we last stored an upper register */
177	181	double               fptemp;               /* temporary storage for floating point */
178	182
179	183	const address_space *   space[ADDRESS_SPACES];   /* address spaces */
r6740	r6741
523	527	}
524	528
525	529
	530	/*-------------------------------------------------
	531	reset_last_upper_lower_reg - reset the last
	532	upper/lower register state
	533	-------------------------------------------------*/
526	534
	535	INLINE void reset_last_upper_lower_reg(drcbe_state *drcbe)
	536	{
	537	drcbe->last_lower_reg = REG_NONE;
	538	drcbe->last_upper_reg = REG_NONE;
	539	}
	540
	541
	542	/*-------------------------------------------------
	543	set_last_lower_reg - note that we have just
	544	loaded a lower register
	545	-------------------------------------------------*/
	546
	547	INLINE void set_last_lower_reg(drcbe_state *drcbe, x86code *dst, const drcuml_parameter *param, UINT8 reglo)
	548	{
	549	if (param->type == DRCUML_PTYPE_MEMORY)
	550	{
	551	drcbe->last_lower_reg = reglo;
	552	drcbe->last_lower_addr = (UINT32 *)((FPTR)param->value);
	553	drcbe->last_lower_pc = dst;
	554	}
	555	}
	556
	557
	558	/*-------------------------------------------------
	559	set_last_upper_reg - note that we have just
	560	loaded an upper register
	561	-------------------------------------------------*/
	562
	563	INLINE void set_last_upper_reg(drcbe_state *drcbe, x86code *dst, const drcuml_parameter *param, UINT8 reghi)
	564	{
	565	drcbe->last_upper_reg = reghi;
	566	drcbe->last_upper_addr = (param->type == DRCUML_PTYPE_INT_REGISTER) ? drcbe->reghi[param->value] : (UINT32 *)((FPTR)param->value + 4);
	567	drcbe->last_upper_pc = dst;
	568	}
	569
	570
	571	/*-------------------------------------------------
	572	can_skip_lower_load - return TRUE if we can
	573	skip re-loading a lower half of a register
	574	-------------------------------------------------*/
	575
	576	INLINE int can_skip_lower_load(drcbe_state *drcbe, x86code *dst, UINT32 *memptr, UINT8 reglo)
	577	{
	578	//  return FALSE;
	579	return (dst == drcbe->last_lower_pc && memptr == drcbe->last_lower_addr && reglo == drcbe->last_lower_reg);
	580	}
	581
	582
	583	/*-------------------------------------------------
	584	can_skip_upper_load - return TRUE if we can
	585	skip re-loading an upper half of a register
	586	-------------------------------------------------*/
	587
	588	INLINE int can_skip_upper_load(drcbe_state *drcbe, x86code *dst, UINT32 *memptr, UINT8 reghi)
	589	{
	590	//  return FALSE;
	591	return (dst == drcbe->last_upper_pc && memptr == drcbe->last_upper_addr && reghi == drcbe->last_upper_reg);
	592	}
	593
	594
	595	/*-------------------------------------------------
	596	track_resolve_link - wrapper for resolve_link
	597	that resets all register tracking info
	598	-------------------------------------------------*/
	599
	600	INLINE void track_resolve_link(drcbe_state *drcbe, x86code **destptr, const emit_link *linkinfo)
	601	{
	602	reset_last_upper_lower_reg(drcbe);
	603	resolve_link(destptr, linkinfo);
	604	}
	605
	606	#define resolve_link INVALID
	607
	608
	609
527	610	/***************************************************************************
528	611	BACKEND CALLBACKS
529	612	***************************************************************************/
r6740	r6741
1143	1226	if (param->type == DRCUML_PTYPE_IMMEDIATE)
1144	1227	emit_mov_r32_imm(dst, reg, param->value);                              // mov   reg,param
1145	1228	else if (param->type == DRCUML_PTYPE_MEMORY)
1146		emit_mov_r32_m32(dst, reg, MABS(param->value));                           // mov   reg,[param]
	1229	{
	1230	if (!can_skip_lower_load(drcbe, *dst, (UINT32 *)((FPTR)param->value), reg))
	1231	emit_mov_r32_m32(dst, reg, MABS(param->value));                        // mov   reg,[param]
	1232	}
1147	1233	else if (param->type == DRCUML_PTYPE_INT_REGISTER)
1148	1234	{
1149	1235	if (reg != param->value)
r6740	r6741
1163	1249	emit_mov_m32_imm(dst, MEMPARAMS, param->value);                           // mov   [mem],param
1164	1250	else if (param->type == DRCUML_PTYPE_MEMORY)
1165	1251	{
1166		emit_mov_r32_m32(dst, REG_EAX, MABS(param->value));                        // mov   eax,[param]
	1252	if (!can_skip_lower_load(drcbe, *dst, (UINT32 *)((FPTR)param->value), REG_EAX))
	1253	emit_mov_r32_m32(dst, REG_EAX, MABS(param->value));                     // mov   eax,[param]
1167	1254	emit_mov_m32_r32(dst, MEMPARAMS, REG_EAX);                              // mov   [mem],eax
1168	1255	}
1169	1256	else if (param->type == DRCUML_PTYPE_INT_REGISTER)
r6740	r6741
1180	1267	{
1181	1268	assert(param->type != DRCUML_PTYPE_IMMEDIATE);
1182	1269	if (param->type == DRCUML_PTYPE_MEMORY)
	1270	{
1183	1271	emit_mov_m32_r32(dst, MABS(param->value), reg);                           // mov   [param],reg
	1272	set_last_lower_reg(drcbe, *dst, param, reg);
	1273	}
1184	1274	else if (param->type == DRCUML_PTYPE_INT_REGISTER)
1185	1275	{
1186	1276	if (reg != param->value)
r6740	r6741
1872	1962	{
1873	1963	if (param->type == DRCUML_PTYPE_IMMEDIATE)
1874	1964	{
1875		if ((UINT32)param->value == 0)
	1965	if (reglo == REG_NONE)
	1966	;
	1967	else if ((UINT32)param->value == 0)
1876	1968	emit_xor_r32_r32(dst, reglo, reglo);                              // xor   reglo,reglo
1877	1969	else
1878	1970	emit_mov_r32_imm(dst, reglo, param->value);                           // mov   reglo,param
1879		if ((UINT32)(param->value >> 32) == 0)
	1971	if (reghi == REG_NONE)
	1972	;
	1973	else if ((UINT32)(param->value >> 32) == 0)
1880	1974	emit_xor_r32_r32(dst, reghi, reghi);                              // xor   reghi,reghi
1881	1975	else
1882	1976	emit_mov_r32_imm(dst, reghi, param->value >> 32);                     // mov   reghi,param >> 32
1883	1977	}
1884	1978	else if (param->type == DRCUML_PTYPE_MEMORY)
1885	1979	{
1886		emit_mov_r32_m32(dst, reglo, MABS(param->value));                        // mov   reglo,[param]
1887		emit_mov_r32_m32(dst, reghi, MABS(param->value + 4));                     // mov   reghi,[param+4]
	1980	int skip_lower = can_skip_lower_load(drcbe, *dst, (UINT32 *)((FPTR)param->value), reglo);
	1981	int skip_upper = can_skip_upper_load(drcbe, *dst, (UINT32 *)((FPTR)param->value + 4), reghi);
	1982	if (reglo != REG_NONE && !skip_lower)
	1983	emit_mov_r32_m32(dst, reglo, MABS(param->value));                     // mov   reglo,[param]
	1984	if (reghi != REG_NONE && !skip_upper)
	1985	emit_mov_r32_m32(dst, reghi, MABS(param->value + 4));                  // mov   reghi,[param+4]
1888	1986	}
1889	1987	else if (param->type == DRCUML_PTYPE_INT_REGISTER)
1890	1988	{
1891		if (reglo != param->value)
	1989	int skip_upper = can_skip_upper_load(drcbe, *dst, drcbe->reghi[param->value], reghi);
	1990	if (reglo != REG_NONE && reglo != param->value)
1892	1991	emit_mov_r32_r32(dst, reglo, param->value);                           // mov   reglo,param
1893		emit_mov_r32_m32(dst, reghi, MABS(drcbe->reghi[param->value]));               // mov   reghi,reghi[param]
	1992	if (reghi != REG_NONE && !skip_upper)
	1993	emit_mov_r32_m32(dst, reghi, MABS(drcbe->reghi[param->value]));            // mov   reghi,reghi[param]
1894	1994	}
1895	1995	}
1896	1996
r6740	r6741
1905	2005	{
1906	2006	if (param->type == DRCUML_PTYPE_IMMEDIATE)
1907	2007	{
1908		emit_mov_r32_imm(dst, reglo, param->value);                              // mov   reglo,param
1909		emit_mov_r32_imm(dst, reghi, param->value >> 32);                        // mov   reghi,param >> 32
	2008	if (reglo != REG_NONE)
	2009	emit_mov_r32_imm(dst, reglo, param->value);                           // mov   reglo,param
	2010	if (reghi != REG_NONE)
	2011	emit_mov_r32_imm(dst, reghi, param->value >> 32);                     // mov   reghi,param >> 32
1910	2012	}
1911	2013	else if (param->type == DRCUML_PTYPE_MEMORY)
1912	2014	{
1913		emit_mov_r32_m32(dst, reglo, MABS(param->value));                        // mov   reglo,[param]
1914		emit_mov_r32_m32(dst, reghi, MABS(param->value + 4));                     // mov   reghi,[param+4]
	2015	int skip_lower = can_skip_lower_load(drcbe, *dst, (UINT32 *)((FPTR)param->value), reglo);
	2016	int skip_upper = can_skip_upper_load(drcbe, *dst, (UINT32 *)((FPTR)param->value + 4), reghi);
	2017	if (reglo != REG_NONE && !skip_lower)
	2018	emit_mov_r32_m32(dst, reglo, MABS(param->value));                     // mov   reglo,[param]
	2019	if (reghi != REG_NONE && !skip_upper)
	2020	emit_mov_r32_m32(dst, reghi, MABS(param->value + 4));                  // mov   reghi,[param+4]
1915	2021	}
1916	2022	else if (param->type == DRCUML_PTYPE_INT_REGISTER)
1917	2023	{
1918		if (reglo != param->value)
	2024	int skip_upper = can_skip_upper_load(drcbe, *dst, drcbe->reghi[param->value], reghi);
	2025	if (reglo != REG_NONE && reglo != param->value)
1919	2026	emit_mov_r32_r32(dst, reglo, param->value);                           // mov   reglo,param
1920		emit_mov_r32_m32(dst, reghi, MABS(drcbe->reghi[param->value]));               // mov   reghi,reghi[param]
	2027	if (reghi != REG_NONE && !skip_upper)
	2028	emit_mov_r32_m32(dst, reghi, MABS(drcbe->reghi[param->value]));            // mov   reghi,reghi[param]
1921	2029	}
1922	2030	}
1923	2031
r6740	r6741
1936	2044	}
1937	2045	else if (param->type == DRCUML_PTYPE_MEMORY)
1938	2046	{
1939		emit_mov_r32_m32(dst, REG_EAX, MABS(param->value));                        // mov   eax,[param]
	2047	int skip_lower = can_skip_lower_load(drcbe, *dst, (UINT32 *)((FPTR)param->value), REG_EAX);
	2048	if (!skip_lower)
	2049	emit_mov_r32_m32(dst, REG_EAX, MABS(param->value));                     // mov   eax,[param]
1940	2050	emit_mov_m32_r32(dst, MEMPARAMS + 0, REG_EAX);                           // mov   [mem],eax
1941	2051	emit_mov_r32_m32(dst, REG_EAX, MABS(param->value + 4));                     // mov   eax,[param+4]
1942	2052	emit_mov_m32_r32(dst, MEMPARAMS + 4, REG_EAX);                           // mov   [mem+4],eax
r6740	r6741
1969	2079	emit_mov_r32_r32(dst, param->value, reglo);                           // mov   param,reglo
1970	2080	emit_mov_m32_r32(dst, MABS(drcbe->reghi[param->value]), reghi);               // mov   reghi[param],reghi
1971	2081	}
	2082	set_last_lower_reg(drcbe, *dst, param, reglo);
	2083	set_last_upper_reg(drcbe, *dst, param, reghi);
1972	2084	}
1973	2085
1974	2086
r6740	r6741
2583	2695	emit_sub_r32_imm(dst, REG_ECX, 31);                                 // sub   ecx,31
2584	2696	emit_shld_r32_r32_imm(dst, reghi, reglo, 31);                        // shld  reghi,reglo,31
2585	2697	emit_shl_r32_imm(dst, reglo, 31);                                 // shl   reglo,31
2586		resolve_link(dst, &skip2);                                    // skip2:
	2698	track_resolve_link(drcbe, dst, &skip2);                           // skip2:
2587	2699	}
2588	2700	else
2589	2701	{
2590	2702	emit_mov_r32_r32(dst, reghi, reglo);                              // mov   reghi,reglo
2591	2703	emit_xor_r32_r32(dst, reglo, reglo);                              // xor   reglo,reglo
2592	2704	}
2593		resolve_link(dst, &skip1);                                       // skip1:
	2705	track_resolve_link(drcbe, dst, &skip1);                              // skip1:
2594	2706	emit_shld_r32_r32_cl(dst, reghi, reglo);                              // shld  reghi,reglo,cl
2595	2707	if (saveflags) emit_pushf(dst);                                       // pushf
2596	2708	emit_shl_r32_cl(dst, reglo);                                       // shl   reglo,cl
r6740	r6741
2654	2766	emit_sub_r32_imm(dst, REG_ECX, 31);                                 // sub   ecx,31
2655	2767	emit_shrd_r32_r32_imm(dst, reglo, reghi, 31);                        // shrd  reglo,reghi,31
2656	2768	emit_shr_r32_imm(dst, reghi, 31);                                 // shr   reghi,31
2657		resolve_link(dst, &skip2);                                    // skip2:
	2769	track_resolve_link(drcbe, dst, &skip2);                           // skip2:
2658	2770	}
2659	2771	else
2660	2772	{
2661	2773	emit_mov_r32_r32(dst, reglo, reghi);                              // mov   reglo,reghi
2662	2774	emit_xor_r32_r32(dst, reghi, reghi);                              // xor   reghi,reghi
2663	2775	}
2664		resolve_link(dst, &skip1);                                       // skip1:
	2776	track_resolve_link(drcbe, dst, &skip1);                              // skip1:
2665	2777	emit_shrd_r32_r32_cl(dst, reglo, reghi);                              // shrd  reglo,reghi,cl
2666	2778	if (saveflags) emit_pushf(dst);                                       // pushf
2667	2779	emit_shr_r32_cl(dst, reghi);                                       // shr   reghi,cl
r6740	r6741
2725	2837	emit_sub_r32_imm(dst, REG_ECX, 31);                                 // sub   ecx,31
2726	2838	emit_shrd_r32_r32_imm(dst, reglo, reghi, 31);                        // shrd  reglo,reghi,31
2727	2839	emit_sar_r32_imm(dst, reghi, 31);                                 // sar   reghi,31
2728		resolve_link(dst, &skip2);                                    // skip2:
	2840	track_resolve_link(drcbe, dst, &skip2);                           // skip2:
2729	2841	}
2730	2842	else
2731	2843	{
2732	2844	emit_mov_r32_r32(dst, reglo, reghi);                              // mov   reglo,reghi
2733	2845	emit_sar_r32_imm(dst, reghi, 31);                                 // sar   reghi,31
2734	2846	}
2735		resolve_link(dst, &skip1);                                       // skip1:
	2847	track_resolve_link(drcbe, dst, &skip1);                              // skip1:
2736	2848	emit_shrd_r32_r32_cl(dst, reglo, reghi);                              // shrd  reglo,reghi,cl
2737	2849	if (saveflags) emit_pushf(dst);                                       // pushf
2738	2850	emit_sar_r32_cl(dst, reghi);                                       // sar   reghi,cl
r6740	r6741
2800	2912	emit_mov_r32_r32(dst, REG_EBX, reglo);                              // mov   ebx,reglo
2801	2913	emit_shld_r32_r32_imm(dst, reglo, reghi, 31);                        // shld  reglo,reghi,31
2802	2914	emit_shld_r32_r32_imm(dst, reghi, REG_EBX, 31);                        // shld  reghi,ebx,31
2803		resolve_link(dst, &skip2);                                    // skip2:
	2915	track_resolve_link(drcbe, dst, &skip2);                           // skip2:
2804	2916	}
2805	2917	else
2806	2918	emit_xchg_r32_r32(dst, reghi, reglo);                              // xchg  reghi,reglo
2807		resolve_link(dst, &skip1);                                       // skip1:
	2919	track_resolve_link(drcbe, dst, &skip1);                              // skip1:
2808	2920	emit_mov_r32_r32(dst, REG_EBX, reglo);                                 // mov   ebx,reglo
2809	2921	emit_shld_r32_r32_cl(dst, reglo, reghi);                              // shld  reglo,reghi,cl
2810	2922	if (saveflags) emit_pushf(dst);                                       // pushf
r6740	r6741
2874	2986	emit_mov_r32_r32(dst, REG_EBX, reglo);                              // mov   ebx,reglo
2875	2987	emit_shrd_r32_r32_imm(dst, reglo, reghi, 31);                        // shrd  reglo,reghi,31
2876	2988	emit_shrd_r32_r32_imm(dst, reghi, REG_EBX, 31);                        // shrd  reghi,ebx,31
2877		resolve_link(dst, &skip2);                                    // skip2:
	2989	track_resolve_link(drcbe, dst, &skip2);                           // skip2:
2878	2990	}
2879	2991	else
2880	2992	emit_xchg_r32_r32(dst, reghi, reglo);                              // xchg  reghi,reglo
2881		resolve_link(dst, &skip1);                                       // skip1:
	2993	track_resolve_link(drcbe, dst, &skip1);                              // skip1:
2882	2994	emit_mov_r32_r32(dst, REG_EBX, reglo);                                 // mov   ebx,reglo
2883	2995	emit_shrd_r32_r32_cl(dst, reglo, reghi);                              // shrd  reglo,reghi,cl
2884	2996	if (saveflags) emit_pushf(dst);                                       // pushf
r6740	r6741
2910	3022	emit_rcl_r32_imm(dst, reglo, 1);                                    // rcl   reglo,1
2911	3023	emit_rcl_r32_imm(dst, reghi, 1);                                    // rcl   reghi,1
2912	3024	emit_jmp(dst, loop);                                             // jmp   loop
2913		resolve_link(dst, &skipall);                                    // skipall:
	3025	track_resolve_link(drcbe, dst, &skipall);                           // skipall:
2914	3026	}
2915	3027	else
2916	3028	{
r6740	r6741
2922	3034	emit_rcl_r32_imm(dst, reglo, 1);                                    // rcl   reglo,1
2923	3035	emit_rcl_r32_imm(dst, reghi, 1);                                    // rcl   reghi,1
2924	3036	emit_jmp(dst, loop);                                             // jmp   loop
2925		resolve_link(dst, &skiploop);                                    // skiploop:
	3037	track_resolve_link(drcbe, dst, &skiploop);                           // skiploop:
2926	3038	emit_rcl_r32_imm(dst, reglo, 1);                                    // rcl   reglo,1
2927	3039	emit_pushf(dst);                                                // pushf
2928	3040	emit_rcl_r32_imm(dst, reghi, 1);                                    // rcl   reghi,1
2929		resolve_link(dst, &skipall);                                    // skipall:
	3041	track_resolve_link(drcbe, dst, &skipall);                           // skipall:
2930	3042	emit_combine_z_flags(dst);
2931	3043	}
2932	3044	}
r6740	r6741
2952	3064	emit_rcr_r32_imm(dst, reghi, 1);                                    // rcr   reghi,1
2953	3065	emit_rcr_r32_imm(dst, reglo, 1);                                    // rcr   reglo,1
2954	3066	emit_jmp(dst, loop);                                             // jmp   loop
2955		resolve_link(dst, &skipall);                                    // skipall:
	3067	track_resolve_link(drcbe, dst, &skipall);                           // skipall:
2956	3068	}
2957	3069	else
2958	3070	{
r6740	r6741
2964	3076	emit_rcr_r32_imm(dst, reghi, 1);                                    // rcr   reghi,1
2965	3077	emit_rcr_r32_imm(dst, reglo, 1);                                    // rcr   reglo,1
2966	3078	emit_jmp(dst, loop);                                             // jmp   loop
2967		resolve_link(dst, &skiploop);                                    // skiploop:
	3079	track_resolve_link(drcbe, dst, &skiploop);                           // skiploop:
2968	3080	emit_rcr_r32_imm(dst, reghi, 1);                                    // rcr   reghi,1
2969	3081	emit_pushf(dst);                                                // pushf
2970	3082	emit_rcr_r32_imm(dst, reglo, 1);                                    // rcr   reglo,1
2971		resolve_link(dst, &skipall);                                    // skipall:
	3083	track_resolve_link(drcbe, dst, &skipall);                           // skipall:
2972	3084	emit_combine_z_shl_flags(dst);
2973	3085	}
2974	3086	}
r6740	r6741
3117	3229	assert(inst->numparams == 1);
3118	3230	assert(inst->param[0].type == DRCUML_PTYPE_MEMORY);
3119	3231
	3232	reset_last_upper_lower_reg(drcbe);
	3233
3120	3234	/* emit a jump around the stack adjust in case code falls through here */
3121	3235	emit_jmp_short_link(&dst, &skip);                                       // jmp   skip
3122	3236
r6740	r6741
3125	3239
3126	3240	/* by default, the handle points to prolog code that moves the stack pointer */
3127	3241	emit_lea_r32_m32(&dst, REG_ESP, MBD(REG_ESP, -28));                           // lea   rsp,[rsp-28]
3128		resolve_link(&dst, &skip);                                          // skip:
	3242	track_resolve_link(drcbe, &dst, &skip);                                 // skip:
3129	3243	return dst;
3130	3244	}
3131	3245
r6740	r6741
3144	3258
3145	3259	/* register the current pointer for the mode/PC */
3146	3260	drchash_set_codeptr(drcbe->hash, inst->param[0].value, inst->param[1].value, dst);
	3261	reset_last_upper_lower_reg(drcbe);
3147	3262	return dst;
3148	3263	}
3149	3264
r6740	r6741
3161	3276
3162	3277	/* register the current pointer for the label */
3163	3278	drclabel_set_codeptr(drcbe->labels, inst->param[0].value, dst);
	3279	reset_last_upper_lower_reg(drcbe);
3164	3280	return dst;
3165	3281	}
3166	3282
r6740	r6741
3244	3360	emit_mov_m32_imm(&dst, MBD(REG_ESP, 0), (FPTR)drcbe->device);               // mov   [esp],device
3245	3361	emit_call(&dst, (x86code *)debug_cpu_instruction_hook);                     // call  debug_cpu_instruction_hook
3246	3362
3247		resolve_link(&dst, &skip);                                       // skip:
	3363	track_resolve_link(drcbe, &dst, &skip);                              // skip:
3248	3364	}
3249	3365
3250	3366	return dst;
r6740	r6741
3465	3581
3466	3582	/* resolve the conditional link */
3467	3583	if (inst->condition != DRCUML_COND_ALWAYS)
3468		resolve_link(&dst, &skip);                                       // skip:
	3584	track_resolve_link(drcbe, &dst, &skip);                              // skip:
3469	3585	return dst;
3470	3586	}
3471	3587
r6740	r6741
3494	3610
3495	3611	/* resolve the conditional link */
3496	3612	if (inst->condition != DRCUML_COND_ALWAYS)
3497		resolve_link(&dst, &skip);                                       // skip:
	3613	track_resolve_link(drcbe, &dst, &skip);                              // skip:
3498	3614	return dst;
3499	3615	}
3500	3616
r6740	r6741
3526	3642
3527	3643	/* resolve the conditional link */
3528	3644	if (inst->condition != DRCUML_COND_ALWAYS)
3529		resolve_link(&dst, &skip);                                       // skip:
	3645	track_resolve_link(drcbe, &dst, &skip);                              // skip:
3530	3646	return dst;
3531	3647	}
3532	3648
r6740	r6741
3856	3972
3857	3973	static x86code *op_load(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
3858	3974	{
3859		drcuml_parameter dstp, basep, indp, sizep;
3860		int dstreg;
	3975	drcuml_parameter dstp, basep, indp, scalesizep;
	3976	int dstreg, scale, size;
3861	3977
3862	3978	/* validate instruction */
3863	3979	assert(inst->size == 4 || inst->size == 8);
r6740	r6741
3865	3981	assert_no_flags(inst);
3866	3982
3867	3983	/* normalize parameters */
3868		param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &sizep, PTYPE_I);
	3984	param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &scalesizep, PTYPE_I);
	3985	scale = 1 << (scalesizep.value / 16);
	3986	size = scalesizep.value % 16;
3869	3987
3870	3988	/* pick a target register for the general case */
3871	3989	dstreg = param_select_register(REG_EAX, &dstp, NULL);
r6740	r6741
3873	3991	/* immediate index */
3874	3992	if (indp.type == DRCUML_PTYPE_IMMEDIATE)
3875	3993	{
3876		if (sizep.value == DRCUML_SIZE_BYTE)
3877		emit_movzx_r32_m8(&dst, dstreg, MABS(basep.value + 1*indp.value));         // movzx dstreg,[basep + 1*indp]
3878		else if (sizep.value == DRCUML_SIZE_WORD)
3879		emit_movzx_r32_m16(&dst, dstreg, MABS(basep.value + 2*indp.value));         // movzx dstreg,[basep + 2*indp]
3880		else if (sizep.value == DRCUML_SIZE_DWORD)
3881		emit_mov_r32_m32(&dst, dstreg, MABS(basep.value + 4*indp.value));         // mov   dstreg,[basep + 4*indp]
3882		else if (sizep.value == DRCUML_SIZE_QWORD)
	3994	if (size == DRCUML_SIZE_BYTE)
	3995	emit_movzx_r32_m8(&dst, dstreg, MABS(basep.value + scale*indp.value));      // movzx dstreg,[basep + scale*indp]
	3996	else if (size == DRCUML_SIZE_WORD)
	3997	emit_movzx_r32_m16(&dst, dstreg, MABS(basep.value + scale*indp.value));      // movzx dstreg,[basep + scale*indp]
	3998	else if (size == DRCUML_SIZE_DWORD)
	3999	emit_mov_r32_m32(&dst, dstreg, MABS(basep.value + scale*indp.value));      // mov   dstreg,[basep + scale*indp]
	4000	else if (size == DRCUML_SIZE_QWORD)
3883	4001	{
3884		emit_mov_r32_m32(&dst, REG_EDX, MABS(basep.value + 8*indp.value + 4));      // mov   edx,[basep + 8*indp + 4]
3885		emit_mov_r32_m32(&dst, dstreg, MABS(basep.value + 8*indp.value));         // mov   dstreg,[basep + 8*indp]
	4002	emit_mov_r32_m32(&dst, REG_EDX, MABS(basep.value + scale*indp.value + 4));   // mov   edx,[basep + scale*indp + 4]
	4003	emit_mov_r32_m32(&dst, dstreg, MABS(basep.value + scale*indp.value));      // mov   dstreg,[basep + scale*indp]
3886	4004	}
3887	4005	}
3888	4006
r6740	r6741
3891	4009	{
3892	4010	int indreg = param_select_register(REG_ECX, &indp, NULL);
3893	4011	emit_mov_r32_p32(drcbe, &dst, indreg, &indp);
3894		if (sizep.value == DRCUML_SIZE_BYTE)
3895		emit_movzx_r32_m8(&dst, dstreg, MISD(indreg, 1, basep.value));            // movzx dstreg,[basep + 1*indp]
3896		else if (sizep.value == DRCUML_SIZE_WORD)
3897		emit_movzx_r32_m16(&dst, dstreg, MISD(indreg, 2, basep.value));            // movzx dstreg,[basep + 2*indp]
3898		else if (sizep.value == DRCUML_SIZE_DWORD)
3899		emit_mov_r32_m32(&dst, dstreg, MISD(indreg, 4, basep.value));            // mov   dstreg,[basep + 4*indp]
3900		else if (sizep.value == DRCUML_SIZE_QWORD)
	4012	if (size == DRCUML_SIZE_BYTE)
	4013	emit_movzx_r32_m8(&dst, dstreg, MISD(indreg, scale, basep.value));         // movzx dstreg,[basep + scale*indp]
	4014	else if (size == DRCUML_SIZE_WORD)
	4015	emit_movzx_r32_m16(&dst, dstreg, MISD(indreg, scale, basep.value));         // movzx dstreg,[basep + scale*indp]
	4016	else if (size == DRCUML_SIZE_DWORD)
	4017	emit_mov_r32_m32(&dst, dstreg, MISD(indreg, scale, basep.value));         // mov   dstreg,[basep + scale*indp]
	4018	else if (size == DRCUML_SIZE_QWORD)
3901	4019	{
3902		emit_mov_r32_m32(&dst, REG_EDX, MISD(indreg, 8, basep.value + 4));         // mov   edx,[basep + 8*indp + 4]
3903		emit_mov_r32_m32(&dst, dstreg, MISD(indreg, 8, basep.value));            // mov   dstreg,[basep + 8*indp]
	4020	emit_mov_r32_m32(&dst, REG_EDX, MISD(indreg, scale, basep.value + 4));      // mov   edx,[basep + scale*indp + 4]
	4021	emit_mov_r32_m32(&dst, dstreg, MISD(indreg, scale, basep.value));         // mov   dstreg,[basep + scale*indp]
3904	4022	}
3905	4023	}
3906	4024
r6740	r6741
3911	4029	if (inst->size == 8)
3912	4030	{
3913	4031	/* 1, 2, or 4-byte case */
3914		if (sizep.value != DRCUML_SIZE_QWORD)
	4032	if (size != DRCUML_SIZE_QWORD)
3915	4033	{
3916	4034	if (dstp.type == DRCUML_PTYPE_MEMORY)
3917	4035	emit_mov_m32_imm(&dst, MABS(dstp.value + 4), 0);                  // mov   [dstp+4],0
r6740	r6741
3926	4044	emit_mov_m32_r32(&dst, MABS(dstp.value + 4), REG_EDX);               // mov   [dstp+4],edx
3927	4045	else if (dstp.type == DRCUML_PTYPE_INT_REGISTER)
3928	4046	emit_mov_m32_r32(&dst, MABS(drcbe->reghi[dstp.value]), REG_EDX);      // mov   [reghi],edx
	4047	set_last_upper_reg(drcbe, dst, &dstp, REG_EDX);
3929	4048	}
3930	4049	}
	4050	set_last_lower_reg(drcbe, dst, &dstp, dstreg);
3931	4051	return dst;
3932	4052	}
3933	4053
r6740	r6741
3938	4058
3939	4059	static x86code *op_loads(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
3940	4060	{
3941		drcuml_parameter dstp, basep, indp, sizep;
3942		int dstreg;
	4061	drcuml_parameter dstp, basep, indp, scalesizep;
	4062	int dstreg, scale, size;
3943	4063
3944	4064	/* validate instruction */
3945	4065	assert(inst->size == 4 || inst->size == 8);
r6740	r6741
3947	4067	assert_no_flags(inst);
3948	4068
3949	4069	/* normalize parameters */
3950		param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &sizep, PTYPE_I);
	4070	param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &scalesizep, PTYPE_I);
	4071	scale = 1 << (scalesizep.value / 16);
	4072	size = scalesizep.value % 16;
3951	4073
3952	4074	/* pick a target register for the general case */
3953	4075	dstreg = param_select_register(REG_EAX, &dstp, NULL);
r6740	r6741
3955	4077	/* immediate index */
3956	4078	if (indp.type == DRCUML_PTYPE_IMMEDIATE)
3957	4079	{
3958		if (sizep.value == DRCUML_SIZE_BYTE)
3959		emit_movsx_r32_m8(&dst, dstreg, MABS(basep.value + 1*indp.value));         // movsx dstreg,[basep + 1*indp]
3960		else if (sizep.value == DRCUML_SIZE_WORD)
3961		emit_movsx_r32_m16(&dst, dstreg, MABS(basep.value + 2*indp.value));         // movsx dstreg,[basep + 2*indp]
3962		else if (sizep.value == DRCUML_SIZE_DWORD)
3963		emit_mov_r32_m32(&dst, dstreg, MABS(basep.value + 4*indp.value));         // mov   dstreg,[basep + 4*indp]
3964		else if (sizep.value == DRCUML_SIZE_QWORD)
	4080	if (size == DRCUML_SIZE_BYTE)
	4081	emit_movsx_r32_m8(&dst, dstreg, MABS(basep.value + scale*indp.value));      // movsx dstreg,[basep + scale*indp]
	4082	else if (size == DRCUML_SIZE_WORD)
	4083	emit_movsx_r32_m16(&dst, dstreg, MABS(basep.value + scale*indp.value));      // movsx dstreg,[basep + scale*indp]
	4084	else if (size == DRCUML_SIZE_DWORD)
	4085	emit_mov_r32_m32(&dst, dstreg, MABS(basep.value + scale*indp.value));      // mov   dstreg,[basep + scale*indp]
	4086	else if (size == DRCUML_SIZE_QWORD)
3965	4087	{
3966		emit_mov_r32_m32(&dst, REG_EDX, MABS(basep.value + 8*indp.value + 4));      // mov   edx,[basep + 8*indp + 4]
3967		emit_mov_r32_m32(&dst, dstreg, MABS(basep.value + 8*indp.value));         // mov   dstreg,[basep + 8*indp]
	4088	emit_mov_r32_m32(&dst, REG_EDX, MABS(basep.value + scale*indp.value + 4));   // mov   edx,[basep + scale*indp + 4]
	4089	emit_mov_r32_m32(&dst, dstreg, MABS(basep.value + scale*indp.value));      // mov   dstreg,[basep + scale*indp]
3968	4090	}
3969	4091	}
3970	4092
r6740	r6741
3973	4095	{
3974	4096	int indreg = param_select_register(REG_ECX, &indp, NULL);
3975	4097	emit_mov_r32_p32(drcbe, &dst, indreg, &indp);
3976		if (sizep.value == DRCUML_SIZE_BYTE)
3977		emit_movsx_r32_m8(&dst, dstreg, MISD(indreg, 1, basep.value));            // movsx dstreg,[basep + 1*indp]
3978		else if (sizep.value == DRCUML_SIZE_WORD)
3979		emit_movsx_r32_m16(&dst, dstreg, MISD(indreg, 2, basep.value));            // movsx dstreg,[basep + 2*indp]
3980		else if (sizep.value == DRCUML_SIZE_DWORD)
3981		emit_mov_r32_m32(&dst, dstreg, MISD(indreg, 4, basep.value));            // mov   dstreg,[basep + 4*indp]
3982		else if (sizep.value == DRCUML_SIZE_QWORD)
	4098	if (size == DRCUML_SIZE_BYTE)
	4099	emit_movsx_r32_m8(&dst, dstreg, MISD(indreg, scale, basep.value));         // movsx dstreg,[basep + scale*indp]
	4100	else if (size == DRCUML_SIZE_WORD)
	4101	emit_movsx_r32_m16(&dst, dstreg, MISD(indreg, scale, basep.value));         // movsx dstreg,[basep + scale*indp]
	4102	else if (size == DRCUML_SIZE_DWORD)
	4103	emit_mov_r32_m32(&dst, dstreg, MISD(indreg, scale, basep.value));         // mov   dstreg,[basep + scale*indp]
	4104	else if (size == DRCUML_SIZE_QWORD)
3983	4105	{
3984		emit_mov_r32_m32(&dst, REG_EDX, MISD(indreg, 8, basep.value + 4));         // mov   edx,[basep + 8*indp + 4]
3985		emit_mov_r32_m32(&dst, dstreg, MISD(indreg, 8, basep.value));            // mov   dstreg,[basep + 8*indp]
	4106	emit_mov_r32_m32(&dst, REG_EDX, MISD(indreg, scale, basep.value + 4));      // mov   edx,[basep + scale*indp + 4]
	4107	emit_mov_r32_m32(&dst, dstreg, MISD(indreg, scale, basep.value));         // mov   dstreg,[basep + scale*indp]
3986	4108	}
3987	4109	}
3988	4110
r6740	r6741
3997	4119	emit_mov_m32_r32(&dst, MABS(dstp.value + 4), REG_EDX);                  // mov   [dstp+4],edx
3998	4120	else if (dstp.type == DRCUML_PTYPE_INT_REGISTER)
3999	4121	emit_mov_m32_r32(&dst, MABS(drcbe->reghi[dstp.value]), REG_EDX);         // mov   [reghi],edx
	4122	set_last_upper_reg(drcbe, dst, &dstp, REG_EDX);
4000	4123	}
	4124	set_last_lower_reg(drcbe, dst, &dstp, dstreg);
4001	4125	return dst;
4002	4126	}
4003	4127
r6740	r6741
4008	4132
4009	4133	static x86code *op_store(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
4010	4134	{
4011		drcuml_parameter srcp, basep, indp, sizep;
4012		int srcreg;
	4135	drcuml_parameter srcp, basep, indp, scalesizep;
	4136	int srcreg, scale, size;
4013	4137
4014	4138	/* validate instruction */
4015	4139	assert(inst->size == 4 || inst->size == 8);
r6740	r6741
4017	4141	assert_no_flags(inst);
4018	4142
4019	4143	/* normalize parameters */
4020		param_normalize_4(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MRI, &sizep, PTYPE_I);
	4144	param_normalize_4(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MRI, &scalesizep, PTYPE_I);
	4145	scale = 1 << (scalesizep.value / 16);
	4146	size = scalesizep.value % 16;
4021	4147
4022	4148	/* pick a source register for the general case */
4023	4149	srcreg = param_select_register(REG_EAX, &srcp, NULL);
4024		if (sizep.value == DRCUML_SIZE_BYTE && (srcreg & 4))
	4150	if (size == DRCUML_SIZE_BYTE && (srcreg & 4))
4025	4151	srcreg = REG_EAX;
4026	4152
4027	4153	/* degenerate case: constant index */
r6740	r6741
4030	4156	/* immediate source */
4031	4157	if (srcp.type == DRCUML_PTYPE_IMMEDIATE)
4032	4158	{
4033		if (sizep.value == DRCUML_SIZE_BYTE)
4034		emit_mov_m8_imm(&dst, MABS(basep.value + 1*indp.value), srcp.value);   // mov   [basep + 1*indp],srcp
4035		else if (sizep.value == DRCUML_SIZE_WORD)
4036		emit_mov_m16_imm(&dst, MABS(basep.value + 2*indp.value), srcp.value);   // mov   [basep + 2*indp],srcp
4037		else if (sizep.value == DRCUML_SIZE_DWORD)
4038		emit_mov_m32_imm(&dst, MABS(basep.value + 4*indp.value), srcp.value);   // mov   [basep + 4*indp],srcp
4039		else if (sizep.value == DRCUML_SIZE_QWORD)
	4159	if (size == DRCUML_SIZE_BYTE)
	4160	emit_mov_m8_imm(&dst, MABS(basep.value + scale*indp.value), srcp.value);   // mov   [basep + scale*indp],srcp
	4161	else if (size == DRCUML_SIZE_WORD)
	4162	emit_mov_m16_imm(&dst, MABS(basep.value + scale*indp.value), srcp.value);   // mov   [basep + scale*indp],srcp
	4163	else if (size == DRCUML_SIZE_DWORD)
	4164	emit_mov_m32_imm(&dst, MABS(basep.value + scale*indp.value), srcp.value);   // mov   [basep + scale*indp],srcp
	4165	else if (size == DRCUML_SIZE_QWORD)
4040	4166	{
4041		emit_mov_m32_imm(&dst, MABS(basep.value + 8*indp.value), srcp.value);   // mov   [basep + 8*indp],srcp
4042		emit_mov_m32_imm(&dst, MABS(basep.value + 8*indp.value + 4), srcp.value >> 32);
4043		// mov   [basep + 8*indp + 4],srcp >> 32
	4167	emit_mov_m32_imm(&dst, MABS(basep.value + scale*indp.value), srcp.value);   // mov   [basep + scale*indp],srcp
	4168	emit_mov_m32_imm(&dst, MABS(basep.value + scale*indp.value + 4), srcp.value >> 32);
	4169	// mov   [basep + scale*indp + 4],srcp >> 32
4044	4170	}
4045	4171	}
4046	4172
4047	4173	/* variable source */
4048	4174	else
4049	4175	{
4050		if (sizep.value != DRCUML_SIZE_QWORD)
	4176	if (size != DRCUML_SIZE_QWORD)
4051	4177	emit_mov_r32_p32(drcbe, &dst, srcreg, &srcp);                     // mov   srcreg,srcp
4052	4178	else
4053	4179	emit_mov_r64_p64(drcbe, &dst, srcreg, REG_EDX, &srcp);               // mov   edx:srcreg,srcp
4054		if (sizep.value == DRCUML_SIZE_BYTE)
4055		emit_mov_m8_r8(&dst, MABS(basep.value + 1*indp.value), srcreg);         // mov   [basep + 1*indp],srcreg
4056		else if (sizep.value == DRCUML_SIZE_WORD)
4057		emit_mov_m16_r16(&dst, MABS(basep.value + 2*indp.value), srcreg);      // mov   [basep + 2*indp],srcreg
4058		else if (sizep.value == DRCUML_SIZE_DWORD)
4059		emit_mov_m32_r32(&dst, MABS(basep.value + 4*indp.value), srcreg);      // mov   [basep + 4*indp],srcreg
4060		else if (sizep.value == DRCUML_SIZE_QWORD)
	4180	if (size == DRCUML_SIZE_BYTE)
	4181	emit_mov_m8_r8(&dst, MABS(basep.value + scale*indp.value), srcreg);      // mov   [basep + scale*indp],srcreg
	4182	else if (size == DRCUML_SIZE_WORD)
	4183	emit_mov_m16_r16(&dst, MABS(basep.value + scale*indp.value), srcreg);   // mov   [basep + scale*indp],srcreg
	4184	else if (size == DRCUML_SIZE_DWORD)
	4185	emit_mov_m32_r32(&dst, MABS(basep.value + scale*indp.value), srcreg);   // mov   [basep + scale*indp],srcreg
	4186	else if (size == DRCUML_SIZE_QWORD)
4061	4187	{
4062		emit_mov_m32_r32(&dst, MABS(basep.value + 8*indp.value), srcreg);      // mov   [basep + 8*indp],srcreg
4063		emit_mov_m32_r32(&dst, MABS(basep.value + 8*indp.value + 4), REG_EDX);   // mov   [basep + 8*indp + 4],edx
	4188	emit_mov_m32_r32(&dst, MABS(basep.value + scale*indp.value), srcreg);   // mov   [basep + scale*indp],srcreg
	4189	emit_mov_m32_r32(&dst, MABS(basep.value + scale*indp.value + 4), REG_EDX);   // mov   [basep + scale*indp + 4],edx
4064	4190	}
4065	4191	}
4066	4192	}
r6740	r6741
4074	4200	/* immediate source */
4075	4201	if (srcp.type == DRCUML_PTYPE_IMMEDIATE)
4076	4202	{
4077		if (sizep.value == DRCUML_SIZE_BYTE)
4078		emit_mov_m8_imm(&dst, MISD(indreg, 1, basep.value), srcp.value);      // mov   [basep + 1*ecx],srcp
4079		else if (sizep.value == DRCUML_SIZE_WORD)
4080		emit_mov_m16_imm(&dst, MISD(indreg, 2, basep.value), srcp.value);      // mov   [basep + 2*ecx],srcp
4081		else if (sizep.value == DRCUML_SIZE_DWORD)
4082		emit_mov_m32_imm(&dst, MISD(indreg, 4, basep.value), srcp.value);      // mov   [basep + 4*ecx],srcp
4083		else if (sizep.value == DRCUML_SIZE_QWORD)
	4203	if (size == DRCUML_SIZE_BYTE)
	4204	emit_mov_m8_imm(&dst, MISD(indreg, scale, basep.value), srcp.value);   // mov   [basep + 1*ecx],srcp
	4205	else if (size == DRCUML_SIZE_WORD)
	4206	emit_mov_m16_imm(&dst, MISD(indreg, scale, basep.value), srcp.value);   // mov   [basep + 2*ecx],srcp
	4207	else if (size == DRCUML_SIZE_DWORD)
	4208	emit_mov_m32_imm(&dst, MISD(indreg, scale, basep.value), srcp.value);   // mov   [basep + 4*ecx],srcp
	4209	else if (size == DRCUML_SIZE_QWORD)
4084	4210	{
4085		emit_mov_m32_imm(&dst, MISD(indreg, 8, basep.value), srcp.value);      // mov   [basep + 8*ecx],srcp
4086		emit_mov_m32_imm(&dst, MISD(indreg, 8, basep.value + 4), srcp.value >> 32);
	4211	emit_mov_m32_imm(&dst, MISD(indreg, scale, basep.value), srcp.value);   // mov   [basep + 8*ecx],srcp
	4212	emit_mov_m32_imm(&dst, MISD(indreg, scale, basep.value + 4), srcp.value >> 32);
4087	4213	// mov   [basep + 8*ecx + 4],srcp >> 32
4088	4214	}
4089	4215	}
r6740	r6741
4091	4217	/* variable source */
4092	4218	else
4093	4219	{
4094		if (sizep.value != DRCUML_SIZE_QWORD)
	4220	if (size != DRCUML_SIZE_QWORD)
4095	4221	emit_mov_r32_p32(drcbe, &dst, srcreg, &srcp);                     // mov   srcreg,srcp
4096	4222	else
4097	4223	emit_mov_r64_p64(drcbe, &dst, srcreg, REG_EDX, &srcp);               // mov   edx:srcreg,srcp
4098		if (sizep.value == DRCUML_SIZE_BYTE)
4099		emit_mov_m8_r8(&dst, MISD(indreg, 1, basep.value), srcreg);            // mov   [basep + 1*ecx],srcreg
4100		else if (sizep.value == DRCUML_SIZE_WORD)
4101		emit_mov_m16_r16(&dst, MISD(indreg, 2, basep.value), srcreg);         // mov   [basep + 2*ecx],srcreg
4102		else if (sizep.value == DRCUML_SIZE_DWORD)
4103		emit_mov_m32_r32(&dst, MISD(indreg, 4, basep.value), srcreg);         // mov   [basep + 4*ecx],srcreg
4104		else if (sizep.value == DRCUML_SIZE_QWORD)
	4224	if (size == DRCUML_SIZE_BYTE)
	4225	emit_mov_m8_r8(&dst, MISD(indreg, scale, basep.value), srcreg);         // mov   [basep + 1*ecx],srcreg
	4226	else if (size == DRCUML_SIZE_WORD)
	4227	emit_mov_m16_r16(&dst, MISD(indreg, scale, basep.value), srcreg);      // mov   [basep + 2*ecx],srcreg
	4228	else if (size == DRCUML_SIZE_DWORD)
	4229	emit_mov_m32_r32(&dst, MISD(indreg, scale, basep.value), srcreg);      // mov   [basep + 4*ecx],srcreg
	4230	else if (size == DRCUML_SIZE_QWORD)
4105	4231	{
4106		emit_mov_m32_r32(&dst, MISD(indreg, 8, basep.value), srcreg);         // mov   [basep + 8*ecx],srcreg
4107		emit_mov_m32_r32(&dst, MISD(indreg, 8, basep.value + 4), REG_EDX);      // mov   [basep + 8*ecx],edx
	4232	emit_mov_m32_r32(&dst, MISD(indreg, scale, basep.value), srcreg);      // mov   [basep + 8*ecx],srcreg
	4233	emit_mov_m32_r32(&dst, MISD(indreg, scale, basep.value + 4), REG_EDX);   // mov   [basep + 8*ecx],edx
4108	4234	}
4109	4235	}
4110	4236	}
r6740	r6741
4560	4686
4561	4687	/* resolve the jump */
4562	4688	if (skip.target != NULL)
4563		resolve_link(&dst, &skip);
	4689	track_resolve_link(drcbe, &dst, &skip);
4564	4690	return dst;
4565	4691	}
4566	4692
r6740	r6741
5327	5453	emit_mov_p32_r32(drcbe, &dst, &edstp, REG_EDX);                        // mov   edstp,edx
5328	5454	if (inst->flags != 0)
5329	5455	emit_test_r32_r32(&dst, REG_EAX, REG_EAX);                           // test  eax,eax
5330		resolve_link(&dst, &skip);                                       // skip:
	5456	track_resolve_link(drcbe, &dst, &skip);                              // skip:
5331	5457	}
5332	5458
5333	5459	/* 64-bit form */
r6740	r6741
5398	5524	emit_mov_p32_r32(drcbe, &dst, &edstp, REG_EDX);                        // mov   edstp,edx
5399	5525	if (inst->flags != 0)
5400	5526	emit_test_r32_r32(&dst, REG_EAX, REG_EAX);                           // test  eax,eax
5401		resolve_link(&dst, &skip);                                       // skip:
	5527	track_resolve_link(drcbe, &dst, &skip);                              // skip:
5402	5528	}
5403	5529
5404	5530	/* 64-bit form */
r6740	r6741
5458	5584	if (src1p.type == dstp.type && src1p.value == dstp.value && dstp.type == DRCUML_PTYPE_MEMORY)
5459	5585	emit_and_m32_p32(drcbe, &dst, MABS(dstp.value), &src2p, inst);            // and   [dstp],src2p
5460	5586
	5587	/* AND with immediate 0xff */
	5588	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xff && inst->flags == 0)
	5589	{
	5590	if (src1p.type == DRCUML_PTYPE_INT_REGISTER)
	5591	emit_movzx_r32_r8(&dst, dstreg, src1p.value);                     // movzx dstreg,src1p
	5592	else if (src1p.type == DRCUML_PTYPE_MEMORY)
	5593	emit_movzx_r32_m8(&dst, dstreg, MABS(src1p.value));                  // movzx dstreg,[src1p]
	5594	emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5595	}
	5596
	5597	/* AND with immediate 0xffff */
	5598	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xffff && inst->flags == 0)
	5599	{
	5600	if (src1p.type == DRCUML_PTYPE_INT_REGISTER)
	5601	emit_movzx_r32_r16(&dst, dstreg, src1p.value);                     // movzx dstreg,src1p
	5602	else if (src1p.type == DRCUML_PTYPE_MEMORY)
	5603	emit_movzx_r32_m16(&dst, dstreg, MABS(src1p.value));               // movzx dstreg,[src1p]
	5604	emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5605	}
	5606
5461	5607	/* general case */
5462	5608	else
5463	5609	{
r6740	r6741
5474	5620	if (src1p.type == dstp.type && src1p.value == dstp.value && dstp.type == DRCUML_PTYPE_MEMORY)
5475	5621	emit_and_m64_p64(drcbe, &dst, MABS(dstp.value), &src2p, inst);            // and   [dstp],src2p
5476	5622
	5623	/* AND with immediate 0xff */
	5624	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xff && inst->flags == 0)
	5625	{
	5626	if (src1p.type == DRCUML_PTYPE_INT_REGISTER)
	5627	emit_movzx_r32_r8(&dst, dstreg, src1p.value);                     // movzx dstreg,src1p
	5628	else if (src1p.type == DRCUML_PTYPE_MEMORY)
	5629	emit_movzx_r32_m8(&dst, dstreg, MABS(src1p.value));                  // movzx dstreg,[src1p]
	5630	emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5631	if (dstp.type == DRCUML_PTYPE_INT_REGISTER)
	5632	emit_mov_m32_imm(&dst, MABS(drcbe->reghi[dstp.value]), 0);            // mov   dsthi,0
	5633	else if (dstp.type == DRCUML_PTYPE_MEMORY)
	5634	emit_mov_m32_imm(&dst, MABS(dstp.value + 4), 0);                  // mov   dsthi,0
	5635	}
	5636
	5637	/* AND with immediate 0xffff */
	5638	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xffff && inst->flags == 0)
	5639	{
	5640	if (src1p.type == DRCUML_PTYPE_INT_REGISTER)
	5641	emit_movzx_r32_r16(&dst, dstreg, src1p.value);                     // movzx dstreg,src1p
	5642	else if (src1p.type == DRCUML_PTYPE_MEMORY)
	5643	emit_movzx_r32_m16(&dst, dstreg, MABS(src1p.value));               // movzx dstreg,[src1p]
	5644	emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5645	if (dstp.type == DRCUML_PTYPE_INT_REGISTER)
	5646	emit_mov_m32_imm(&dst, MABS(drcbe->reghi[dstp.value]), 0);            // mov   dsthi,0
	5647	else if (dstp.type == DRCUML_PTYPE_MEMORY)
	5648	emit_mov_m32_imm(&dst, MABS(dstp.value + 4), 0);                  // mov   dsthi,0
	5649	}
	5650
	5651	/* AND with immediate 0xffffffff */
	5652	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0xffffffff && inst->flags == 0)
	5653	{
	5654	emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
	5655	emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5656	if (dstp.type == DRCUML_PTYPE_INT_REGISTER)
	5657	emit_mov_m32_imm(&dst, MABS(drcbe->reghi[dstp.value]), 0);            // mov   dsthi,0
	5658	else if (dstp.type == DRCUML_PTYPE_MEMORY)
	5659	emit_mov_m32_imm(&dst, MABS(dstp.value + 4), 0);                  // mov   dsthi,0
	5660	}
	5661
	5662	/* AND with immediate 0xffffffff00000000 */
	5663	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == U64(0xffffffff00000000) && inst->flags == 0)
	5664	{
	5665	if (src1p.type != dstp.type || src1p.value != dstp.value)
	5666	{
	5667	emit_mov_r64_p64(drcbe, &dst, REG_NONE, REG_EDX, &src1p);            // mov   dstreg,src1p
	5668	emit_mov_p64_r64(drcbe, &dst, &dstp, REG_NONE, REG_EDX);            // mov   dstp,dstreg
	5669	}
	5670	if (dstp.type == DRCUML_PTYPE_INT_REGISTER)
	5671	emit_xor_r32_r32(&dst, dstp.value, dstp.value);                     // xor   dstlo,dstlo
	5672	else if (dstp.type == DRCUML_PTYPE_MEMORY)
	5673	emit_mov_m32_imm(&dst, MABS(dstp.value), 0);                     // mov   dstlo,0
	5674	}
	5675
	5676	/* AND with immediate <= 0xffffffff */
	5677	else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value <= 0xffffffff && inst->flags == 0)
	5678	{
	5679	emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
	5680	emit_and_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // and   dstreg,src2p
	5681	emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
	5682	if (dstp.type == DRCUML_PTYPE_INT_REGISTER)
	5683	emit_mov_m32_imm(&dst, MABS(drcbe->reghi[dstp.value]), 0);            // mov   dsthi,0
	5684	else if (dstp.type == DRCUML_PTYPE_MEMORY)
	5685	emit_mov_m32_imm(&dst, MABS(dstp.value + 4), 0);                  // mov   dsthi,0
	5686	}
	5687
5477	5688	/* general case */
5478	5689	else
5479	5690	{
r6740	r6741
5692	5903	emit_bsr_r32_r32(&dst, dstreg, REG_EDX);                              // bsr   dstreg,edx
5693	5904	emit_cmovcc_r32_r32(&dst, COND_Z, dstreg, REG_ECX);                        // cmovz dstreg,ecx
5694	5905	emit_add_r32_imm(&dst, REG_ECX, 32);                                 // add   ecx,32
5695		resolve_link(&dst, &skip);                                       // skip:
	5906	track_resolve_link(drcbe, &dst, &skip);                              // skip:
5696	5907	emit_xor_r32_r32(&dst, REG_EDX, REG_EDX);                              // xor   edx,edx
5697	5908	emit_xor_r32_imm(&dst, dstreg, 31);                                    // xor   dstreg,31
5698	5909	emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg, REG_EDX);                     // mov   dstp,edx:dstreg
r6740	r6741
6277	6488
6278	6489	/* resolve the jump */
6279	6490	if (skip.target != NULL)
6280		resolve_link(&dst, &skip);                                       // skip:
	6491	track_resolve_link(drcbe, &dst, &skip);                              // skip:
6281	6492	return dst;
6282	6493	}
6283	6494

src/emu/video/generic.c

r6740	r6741
255	255	machine->generic.tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
256	256
257	257	/* ensure the contents of the bitmap are saved */
258		state_save_register_bitmap(machine, "video", NULL, 0, "tmpbitmap", machine->generic.tmpbitmap);
	258	state_save_register_global_bitmap(machine, machine->generic.tmpbitmap);
259	259	}
260	260
261	261

src/emu/video/mc6845.c

r6740	r6741
845	845	/* call the tear down function if any */
846	846	if (mc6845->intf->end_update != NULL)
847	847	mc6845->intf->end_update(device, bitmap, cliprect, param);
	848
	849	popmessage(NULL);
848	850	}
849	851	else
850	852	popmessage("Invalid MC6845 screen parameters - display disabled!!!");

src/emu/video/v9938.c

r6740	r6741
1607	1607	#define pre_loop \
1608	1608	while ((cnt-=delta) > 0) {
1609	1609
	1610	#define post_loop \
	1611	}
1610	1612
1611	1613	/* Loop over DX, DY */
1612	1614	#define post__x_y(MX) \
r6740	r6741
1618	1620	ANX=NX; \
1619	1621	} \
1620	1622	} \
1621		}
	1623	post_loop
1622	1624
1623	1625	/* Loop over DX, SY, DY */
1624	1626	#define post__xyy(MX) \
r6740	r6741
1628	1630	else \
1629	1631	ADX=DX; \
1630	1632	} \
1631		}
	1633	post_loop
1632	1634
1633	1635	/* Loop over SX, DX, SY, DY */
1634	1636	#define post_xxyy(MX) \
r6740	r6741
1641	1643	ANX=NX; \
1642	1644	} \
1643	1645	} \
1644		}
	1646	post_loop
1645	1647
1646	1648	/*************************************************************/
1647	1649	/** Function prototypes                                     **/
r6740	r6741
1894	1896	VDPStatus[2]&=0xEF; /* Border not detected */ \
1895	1897	break; \
1896	1898	} \
1897		}
	1899	post_loop
1898	1900
1899	1901	switch (ScrMode) {
1900	1902	default:
r6740	r6741
1952	1954	ASX&=1023; /* Mask to 10 bits range */ \
1953	1955	if (ADX++==NX || (DX&MX)) \
1954	1956	break; \
1955		}
	1957	post_loop
	1958
1956	1959	#define post_lineymaj(MX) \
1957	1960	DY+=TY; \
1958	1961	if ((ASX-=NY)<0) { \
r6740	r6741
1962	1965	ASX&=1023; /* Mask to 10 bits range */ \
1963	1966	if (ADX++==NX || (DX&MX)) \
1964	1967	break; \
1965		}
	1968	post_loop
1966	1969
1967	1970	if ((VDP[45]&0x01)==0)
1968	1971	/* X-Axis is major direction */

src/emu/video/saa5050.c

r6740	r6741
9	9	-  Implement BOX and dirtybuffer
10	10	-  Add support for non-English version (SAA505x), possibly merging
11	11	src/mess/video/saa505x.c unsed by bbc.c in MESS
12		-  Investigate why supporting code 0 behavior breaks p2000t vscroll
	12	-  Investigate why supporting code 0 behavior breaks p2000t vscroll
13	13	in MESS (but not supporting breaks malzak title background)
14	14	-  x,y sizes should probably be calculated from the screen parameters
15	15	rather than passed in the device interface
r6740	r6741
40	40	int         size;
41	41	int         rev;
42	42
43		UINT8 *     videoram;
	43	UINT8 *     videoram;
44	44	UINT16      flags;
45	45	UINT8         forecol;
46	46	UINT8         backcol;
r6740	r6741
159	159
160	160	for ( i = 0; i < 8; i++ )
161	161	{
162		r = saa5050_colors[i * 3];
163		g = saa5050_colors[i * 3 + 1];
	162	r = saa5050_colors[i * 3];
	163	g = saa5050_colors[i * 3 + 1];
164	164	b = saa5050_colors[i * 3 + 2];
165	165	colortable_palette_set_color(machine->colortable, i, MAKE_RGB(r, g, b));
166	166	}
r6740	r6741
195	195	*************************************/
196	196
197	197
198		/* this should probably be put at the end of saa5050 update,
199		but p2000t in MESS does not seem to currently support it.
	198	/* this should probably be put at the end of saa5050 update,
	199	but p2000t in MESS does not seem to currently support it.
200	200	Hence, we leave it independent for the moment */
201	201	void saa5050_frame_advance( const device_config *device )
202	202	{
r6740	r6741
231	231	code = saa5050->videoram[ssy * saa5050->size + sx];
232	232	if (code < 32)
233	233	{
234		switch (code)
	234	switch (code)
235	235	{
236	236	case 0x00:
237	237	#ifndef MESS

src/emu/video/s2636.c

r6740	r6741
317	317	{
318	318	s2636_state *s2636 = get_safe_token(device);
319	319
320		assert(offset < 8);
	320	assert(offset < s2636->work_ram_size);
321	321
322	322	s2636->work_ram[offset] = data;
323	323	}

src/emu/tilemap.c

r6740	r6741
297	297
298	298	if (screen_width != 0 && screen_height != 0)
299	299	{
300		machine->tilemap_data = auto_alloc_clear(machine, tilemap_private);
301		machine->tilemap_data->tailptr = &machine->tilemap_data->list;
302
303	300	machine->priority_bitmap = auto_bitmap_alloc(machine, screen_width, screen_height, BITMAP_FORMAT_INDEXED8);
304	301	add_exit_callback(machine, tilemap_exit);
305	302	}
r6740	r6741
340	337	static tilemap *tilemap_create_common(running_machine *machine, void *get_info_object, tile_get_info_func tile_get_info, tilemap_mapper_func mapper, int tilewidth, int tileheight, int cols, int rows)
341	338	{
342	339	tilemap *tmap;
343		int tilemap_instance = machine->tilemap_data->instance;
	340	int tilemap_instance;
344	341	int group;
345	342
	343	/* if no tilemap private data yet, allocate it */
	344	if (machine->tilemap_data == NULL)
	345	{
	346	machine->tilemap_data = auto_alloc_clear(machine, tilemap_private);
	347	machine->tilemap_data->tailptr = &machine->tilemap_data->list;
	348	}
	349	tilemap_instance = machine->tilemap_data->instance;
	350
346	351	/* allocate the tilemap itself */
347	352	tmap = alloc_clear_or_die(tilemap);
348	353
r6740	r6741
471	476	void tilemap_set_flip_all(running_machine *machine, UINT32 attributes)
472	477	{
473	478	tilemap *tmap;
	479
	480	if (machine->tilemap_data == NULL)
	481	return;
	482
474	483	for (tmap = machine->tilemap_data->list; tmap != NULL; tmap = tmap->next)
475	484	tilemap_set_flip(tmap, attributes);
476	485	}
r6740	r6741
971	980	tilemap *tmap;
972	981	int count = 0;
973	982
	983	if (machine->tilemap_data == NULL)
	984	return 0;
	985
974	986	/* find by the tilemap index */
975	987	for (tmap = machine->tilemap_data->list; tmap != NULL; tmap = tmap->next)
976	988	count++;
r6740	r6741
1103	1115	tilemap_private *tilemap_data = machine->tilemap_data;
1104	1116
1105	1117	/* free all the tilemaps in the list */
1106		while (tilemap_data->list != NULL)
1107		{
1108		tilemap *next = tilemap_data->list->next;
1109		tilemap_dispose(tilemap_data->list);
1110		tilemap_data->list = next;
1111		}
1112		tilemap_data->tailptr = &tilemap_data->list;
	1118	if (tilemap_data != NULL)
	1119	while (tilemap_data->list != NULL)
	1120	{
	1121	tilemap *next = tilemap_data->list->next;
	1122	tilemap_dispose(tilemap_data->list);
	1123	tilemap_data->list = next;
	1124	}
1113	1125	}
1114	1126
1115	1127

src/emu/deprecat.h

r6740	r6741
66	66	*
67	67	*************************************/
68	68
69		/* decode a series of tiles from a particular gfx_element */
70		void decodegfx(gfx_element *gfx, UINT32 first, UINT32 count);
71
72	69	void decodechar(const gfx_element *gfx, UINT32 code, const UINT8 *src);
73	70
74	71

src/emu/tilemap.h

r6740	r6741
354	354
355	355	/* function definition for a get info callback */
356	356	#define TILE_GET_INFO(_name)         void _name(running_machine *machine, tile_data *tileinfo, tilemap_memory_index tile_index, void *param)
	357	#define TILE_GET_INFO_DEVICE(_name)      void _name(const device_config *device, tile_data *tileinfo, tilemap_memory_index tile_index, void *param)
357	358
358	359	/* function definition for a logical-to-memory mapper */
359	360	#define TILEMAP_MAPPER(_name)         tilemap_memory_index _name(UINT32 col, UINT32 row, UINT32 num_cols, UINT32 num_rows)
360	361
361	362	/* useful macro inside of a TILE_GET_INFO callback to set tile information  */
362		#define SET_TILE_INFO(GFX,CODE,COLOR,FLAGS) tileinfo_set(machine, tileinfo, GFX, CODE, COLOR, FLAGS)
	363	#define SET_TILE_INFO(GFX,CODE,COLOR,FLAGS)         tileinfo_set(machine, tileinfo, GFX, CODE, COLOR, FLAGS)
	364	#define SET_TILE_INFO_DEVICE(GFX,CODE,COLOR,FLAGS)  tileinfo_set(device->machine, tileinfo, GFX, CODE, COLOR, FLAGS)
363	365
364	366	/* Macros for setting tile attributes in the TILE_GET_INFO callback: */
365	367	/*   TILE_FLIP_YX assumes that flipy is in bit 1 and flipx is in bit 0 */

src/emu/video.c

r6740	r6741
174	174	static void video_exit(running_machine *machine);
175	175	static void init_buffered_spriteram(running_machine *machine);
176	176
177		/* graphics decoding */
178		static void allocate_graphics(running_machine *machine, const gfx_decode_entry *gfxdecodeinfo);
179
180	177	static void realloc_screen_bitmaps(const device_config *screen);
181	178	static STATE_POSTLOAD( video_screen_postload );
182	179
r6740	r6741
334	331	if (machine->config->video_attributes & VIDEO_BUFFERS_SPRITERAM)
335	332	init_buffered_spriteram(machine);
336	333
337		/* convert the gfx ROMs into character sets. This is done BEFORE calling the driver's */
338		/* palette_init() routine because it might need to check the machine->gfx[] data */
339		if (machine->config->gfxdecodeinfo != NULL)
340		allocate_graphics(machine, machine->config->gfxdecodeinfo);
341
342	334	/* call the PALETTE_INIT function */
343	335	if (machine->config->init_palette != NULL)
344	336	(*machine->config->init_palette)(machine, memory_region(machine, "proms"));
r6740	r6741
452	444
453	445
454	446	/***************************************************************************
455		GRAPHICS DECODING
456		***************************************************************************/
457
458		/*-------------------------------------------------
459		allocate_graphics - allocate memory for the
460		graphics
461		-------------------------------------------------*/
462
463		static void allocate_graphics(running_machine *machine, const gfx_decode_entry *gfxdecodeinfo)
464		{
465		int curgfx;
466
467		/* loop over all elements */
468		for (curgfx = 0; curgfx < MAX_GFX_ELEMENTS && gfxdecodeinfo[curgfx].gfxlayout != NULL; curgfx++)
469		{
470		const gfx_decode_entry *gfxdecode = &gfxdecodeinfo[curgfx];
471		UINT32 region_length = 8 * memory_region_length(machine, gfxdecode->memory_region);
472		const UINT8 *region_base = memory_region(machine, gfxdecode->memory_region);
473		UINT32 xscale = (gfxdecode->xscale == 0) ? 1 : gfxdecode->xscale;
474		UINT32 yscale = (gfxdecode->yscale == 0) ? 1 : gfxdecode->yscale;
475		UINT32 *extpoffs, extxoffs[MAX_ABS_GFX_SIZE], extyoffs[MAX_ABS_GFX_SIZE];
476		const gfx_layout *gl = gfxdecode->gfxlayout;
477		int israw = (gl->planeoffset[0] == GFX_RAW);
478		int planes = gl->planes;
479		UINT32 width = gl->width;
480		UINT32 height = gl->height;
481		UINT32 total = gl->total;
482		UINT32 charincrement = gl->charincrement;
483		gfx_layout glcopy;
484		int j;
485
486		/* make a copy of the layout */
487		glcopy = *gfxdecode->gfxlayout;
488
489		/* copy the X and Y offsets into temporary arrays */
490		memcpy(extxoffs, glcopy.xoffset, sizeof(glcopy.xoffset));
491		memcpy(extyoffs, glcopy.yoffset, sizeof(glcopy.yoffset));
492
493		/* if there are extended offsets, copy them over top */
494		if (glcopy.extxoffs != NULL)
495		memcpy(extxoffs, glcopy.extxoffs, glcopy.width * sizeof(extxoffs[0]));
496		if (glcopy.extyoffs != NULL)
497		memcpy(extyoffs, glcopy.extyoffs, glcopy.height * sizeof(extyoffs[0]));
498
499		/* always use the extended offsets here */
500		glcopy.extxoffs = extxoffs;
501		glcopy.extyoffs = extyoffs;
502
503		extpoffs = glcopy.planeoffset;
504
505		/* expand X and Y by the scale factors */
506		if (xscale > 1)
507		{
508		width *= xscale;
509		for (j = width - 1; j >= 0; j--)
510		extxoffs[j] = extxoffs[j / xscale];
511		}
512		if (yscale > 1)
513		{
514		height *= yscale;
515		for (j = height - 1; j >= 0; j--)
516		extyoffs[j] = extyoffs[j / yscale];
517		}
518
519		/* if the character count is a region fraction, compute the effective total */
520		if (IS_FRAC(total))
521		{
522		assert(region_length != 0);
523		total = region_length / charincrement * FRAC_NUM(total) / FRAC_DEN(total);
524		}
525
526		/* for non-raw graphics, decode the X and Y offsets */
527		if (!israw)
528		{
529		/* loop over all the planes, converting fractions */
530		for (j = 0; j < planes; j++)
531		{
532		UINT32 value = extpoffs[j];
533		if (IS_FRAC(value))
534		{
535		assert(region_length != 0);
536		extpoffs[j] = FRAC_OFFSET(value) + region_length * FRAC_NUM(value) / FRAC_DEN(value);
537		}
538		}
539
540		/* loop over all the X/Y offsets, converting fractions */
541		for (j = 0; j < width; j++)
542		{
543		UINT32 value = extxoffs[j];
544		if (IS_FRAC(value))
545		{
546		assert(region_length != 0);
547		extxoffs[j] = FRAC_OFFSET(value) + region_length * FRAC_NUM(value) / FRAC_DEN(value);
548		}
549		}
550
551		for (j = 0; j < height; j++)
552		{
553		UINT32 value = extyoffs[j];
554		if (IS_FRAC(value))
555		{
556		assert(region_length != 0);
557		extyoffs[j] = FRAC_OFFSET(value) + region_length * FRAC_NUM(value) / FRAC_DEN(value);
558		}
559		}
560		}
561
562		/* otherwise, just use the line modulo */
563		else
564		{
565		int base = gfxdecode->start;
566		int end = region_length/8;
567		int linemod = gl->yoffset[0];
568		while (total > 0)
569		{
570		int elementbase = base + (total - 1) * charincrement / 8;
571		int lastpixelbase = elementbase + height * linemod / 8 - 1;
572		if (lastpixelbase < end)
573		break;
574		total--;
575		}
576		}
577
578		/* update glcopy */
579		glcopy.width = width;
580		glcopy.height = height;
581		glcopy.total = total;
582
583		/* allocate the graphics */
584		machine->gfx[curgfx] = gfx_element_alloc(machine, &glcopy, (region_base != NULL) ? region_base + gfxdecode->start : NULL, gfxdecode->total_color_codes, gfxdecode->color_codes_start);
585		}
586		}
587
588
589
590		/***************************************************************************
591	447	SCREEN MANAGEMENT
592	448	***************************************************************************/
593	449

src/emu/memory.c

r6740	r6741
3443	3443	char name[256];
3444	3444
3445	3445	sprintf(name, "%08x-%08x", bytestart, byteend);
3446		state_save_register_memory(space->machine, "memory", space->cpu->tag, space->spacenum, name, memory, bytes_per_element, (UINT32)(byteend - bytestart + 1) / bytes_per_element);
	3446	state_save_register_memory(space->machine, "memory", space->cpu->tag, space->spacenum, name, memory, bytes_per_element, (UINT32)(byteend - bytestart + 1) / bytes_per_element, __FILE__, __LINE__);
3447	3447	}
3448	3448
3449	3449	/* fill in the tracking block */

src/emu/emu.mak

r6740	r6741
146	146	$(EMUMACHINE)/ldpr8210.o \
147	147	$(EMUMACHINE)/ldv1000.o \
148	148	$(EMUMACHINE)/ldvp931.o \
	149	$(EMUMACHINE)/mb14241.o \
149	150	$(EMUMACHINE)/mb3773.o \
150	151	$(EMUMACHINE)/mb87078.o \
151	152	$(EMUMACHINE)/mc146818.o \

src/emu/restrack.c

r6740	r6741
13	13	#include "pool.h"
14	14	#include "timer.h"
15	15	#include "state.h"
	16	#include "mame.h"
16	17
17	18
18	19
r6740	r6741
143	144	pool_type_register(new_pool, OBJTYPE_ASTRING, "String", astring_destructor);
144	145	pool_type_register(new_pool, OBJTYPE_BITMAP, "Bitmap", bitmap_destructor);
145	146	pool_type_register(new_pool, OBJTYPE_TIMER, "Timer", timer_destructor);
146		pool_type_register(new_pool, OBJTYPE_STATEREG, "Save State Registration", state_destructor);
147	147
148	148	/* increment the tag counter */
149	149	resource_tracking_tag++;
r6740	r6741
188	188
189	189	void *restrack_register_object(object_type type, void *ptr, size_t size, const char *file, int line)
190	190	{
	191	if (resource_tracking_tag == 2) mame_printf_warning("restrack_register_object(%p,%ld) called within reset scope by %s, line %d\n", ptr, (long) size, file, line);
191	192	return pool_object_add_file_line(current_pool(), type, ptr, size, file, line);
192	193	}
193	194
r6740	r6741
200	201	void *auto_malloc_file_line(running_machine *machine, size_t size, const char *file, int line)
201	202	{
202	203	void *result = pool_malloc_file_line(current_pool(), size, file, line);
	204	if (resource_tracking_tag == 2) mame_printf_warning("auto_malloc(%ld) called within reset scope by %s, line %d\n", (long) size, file, line);
203	205	#ifdef MAME_DEBUG
204	206	rand_memory(result, size);
205	207	#endif
r6740	r6741
226	228	}
227	229	assert_always(tag > 0, "Failed to find alloc in pool");
228	230	}
	231	else if (resource_tracking_tag == 2) mame_printf_warning("auto_realloc(%p, %ld) called within reset scope by %s, line %d\n", ptr, (long) size, file, line);
229	232
230	233	return pool_realloc_file_line(pool, ptr, size, file, line);
231	234	}
r6740	r6741
238	241
239	242	char *auto_strdup_file_line(running_machine *machine, const char *str, const char *file, int line)
240	243	{
	244	if (resource_tracking_tag == 2) mame_printf_warning("auto_strdup() called within reset scope by %s, line %d\n", file, line);
241	245	return pool_strdup_file_line(current_pool(), str, file, line);
242	246	}
243	247
r6740	r6741
249	253
250	254	char *auto_strdup_allow_null_file_line(running_machine *machine, const char *str, const char *file, int line)
251	255	{
	256	if (resource_tracking_tag == 2) mame_printf_warning("auto_strdup_allow_null() called within reset scope by %s, line %d\n", file, line);
252	257	return (str != NULL) ? auto_strdup_file_line(machine, str, file, line) : NULL;
253	258	}
254	259
r6740	r6741
260	265
261	266	astring *auto_astring_alloc_file_line(running_machine *machine, const char *file, int line)
262	267	{
	268	if (resource_tracking_tag == 2) mame_printf_warning("auto_astring_alloc() called within reset scope by %s, line %d\n", file, line);
263	269	return (astring *)restrack_register_object(OBJTYPE_ASTRING, astring_alloc(), 0, file, line);
264	270	}
265	271
r6740	r6741
271	277
272	278	bitmap_t *auto_bitmap_alloc_file_line(running_machine *machine, int width, int height, bitmap_format format, const char *file, int line)
273	279	{
	280	if (resource_tracking_tag == 2) mame_printf_warning("auto_bitmap_alloc(%d,%d) called within reset scope by %s, line %d\n", width, height, file, line);
274	281	return (bitmap_t *)restrack_register_object(OBJTYPE_BITMAP, bitmap_alloc(width, height, format), width * height, file, line);
275	282	}
276	283

src/emu/inptport.c

r6740	r6741
771	771
772	772
773	773	/*-------------------------------------------------
774		input_port_by_index - return a pointer to the
775		port_config associated with the given port
776		index
777		-------------------------------------------------*/
778
779		const input_port_config *input_port_by_index(const input_port_list *portlist, int index)
780		{
781		const input_port_config *port;
782
783		/* loop over ports until we hit the index or run out */
784		for (port = portlist->head; port != NULL; port = port->next)
785		if (index-- == 0)
786		return port;
787
788		return NULL;
789		}
790
791
792		/*-------------------------------------------------
793	774	input_field_by_tag_and_mask - return a pointer
794	775	to the first field that intersects the given
795	776	mask on the tagged port

src/emu/mame.c

r6740	r6741
1530	1530	cpuexec_init(machine);
1531	1531	watchdog_init(machine);
1532	1532
	1533	/* allocate the gfx elements prior to device initialization */
	1534	gfx_init(machine);
	1535
1533	1536	#ifdef MESS
1534	1537	/* first MESS initialization */
1535	1538	mess_predevice_init(machine);
r6740	r6741
1573	1576	saveload_init(machine);
1574	1577	if (options_get_bool(mame_options(), OPTION_CHEAT))
1575	1578	cheat_init(machine);
	1579
	1580	/* disallow save state registrations starting here */
	1581	state_save_allow_registration(machine, FALSE);
1576	1582	}
1577	1583
1578	1584
r6740	r6741
1596	1602	end_resource_tracking();
1597	1603	begin_resource_tracking();
1598	1604
1599		/* allow save state registrations during the reset */
1600		state_save_allow_registration(machine, TRUE);
1601
1602	1605	/* call all registered reset callbacks */
1603	1606	for (cb = machine->mame_data->reset_callback_list; cb; cb = cb->next)
1604	1607	(*cb->func.reset)(machine);
r6740	r6741
1611	1614	if (machine->config->video_reset != NULL)
1612	1615	(*machine->config->video_reset)(machine);
1613	1616
1614		/* disallow save state registrations starting here */
1615		state_save_allow_registration(machine, FALSE);
1616
1617	1617	/* now we're running */
1618	1618	mame->current_phase = MAME_PHASE_RUNNING;
1619	1619

src/emu/restrack.h

r6740	r6741
24	24	#define OBJTYPE_ASTRING               OBJECT_TYPE('a','s','t','r')
25	25	#define OBJTYPE_BITMAP               OBJECT_TYPE('b','i','t','m')
26	26	#define OBJTYPE_TIMER               OBJECT_TYPE('t','i','m','r')
27		#define OBJTYPE_STATEREG            OBJECT_TYPE('s','t','a','t')
28	27
29	28
30	29

src/emu/machine/rtc65271.h

r6740	r6741
2	2	rtc65271.h: include file for rtc65271.c
3	3	*/
4	4
5		extern int rtc65271_file_load(running_machine *machine, mame_file *file);
6		extern int rtc65271_file_save(mame_file *file);
7		extern void rtc65271_init(running_machine *machine, UINT8 *xram, void (*interrupt_callback)(running_machine *machine, int state));
8		extern UINT8 rtc65271_r(int xramsel, offs_t offset);
9		extern void rtc65271_w(int xramsel, offs_t offset, UINT8 data);
10		extern READ8_HANDLER( rtc65271_rtc_r );
11		extern READ8_HANDLER( rtc65271_xram_r );
12		extern WRITE8_HANDLER( rtc65271_rtc_w );
13		extern WRITE8_HANDLER( rtc65271_xram_w );
	5	typedef struct _rtc65271_config rtc65271_config;
	6	struct _rtc65271_config
	7	{
	8	void (*interrupt_callback)(const device_config *device, int state);
	9	};
	10
	11
	12	#define MDRV_RTC65271_ADD(_tag, _callback) \
	13	MDRV_DEVICE_ADD(_tag, RTC65271, 0) \
	14	MDRV_DEVICE_CONFIG_DATAPTR(rtc65271_config, interrupt_callback, _callback)
	15
	16
	17	UINT8 rtc65271_r(const device_config *device, int xramsel, offs_t offset);
	18	void rtc65271_w(const device_config *device, int xramsel, offs_t offset, UINT8 data);
	19
	20	READ8_DEVICE_HANDLER( rtc65271_rtc_r );
	21	READ8_DEVICE_HANDLER( rtc65271_xram_r );
	22	WRITE8_DEVICE_HANDLER( rtc65271_rtc_w );
	23	WRITE8_DEVICE_HANDLER( rtc65271_xram_w );
	24
	25
	26	/* device get info callback */
	27	#define RTC65271 DEVICE_GET_INFO_NAME(rtc65271)
	28	DEVICE_GET_INFO( rtc65271 );

src/emu/machine/74148.c

r6740	r6741
42	42	#include "machine/74148.h"
43	43
44	44
45		#define MAX_TTL74148 4
46
47		struct TTL74148
	45	typedef struct _ttl74148_state ttl74148_state;
	46	struct _ttl74148_state
48	47	{
49	48	/* callback */
50		void (*output_cb)(running_machine *machine);
	49	void (*output_cb)(const device_config *device);
51	50
52	51	/* inputs */
53	52	int input_lines[8];   /* pins 1-4,10-13 */
r6740	r6741
64	63	int last_enable_output;
65	64	};
66	65
67		static struct TTL74148 chips[MAX_TTL74148];
68	66
	67	INLINE ttl74148_state *get_safe_token(const device_config *device)
	68	{
	69	assert(device != NULL);
	70	assert(device->token != NULL);
	71	assert(device->type == TTL74148);
69	72
70		void TTL74148_update(running_machine *machine, int which)
	73	return (ttl74148_state *)device->token;
	74	}
	75
	76	void ttl74148_update(const device_config *device)
71	77	{
72		if (chips[which].enable_input)
	78	ttl74148_state *state = get_safe_token(device);
	79
	80	if (state->enable_input)
73	81	{
74	82	// row 1 in truth table
75		chips[which].output = 0x07;
76		chips[which].output_valid = 1;
77		chips[which].enable_output = 1;
	83	state->output = 0x07;
	84	state->output_valid = 1;
	85	state->enable_output = 1;
78	86	}
79	87	else
80	88	{
81	89	int bit0, bit1, bit2;
82	90
83	91	/* this comes straight off the data sheet schematics */
84		bit0 = !(((!chips[which].input_lines[1]) &
85		chips[which].input_lines[2] &
86		chips[which].input_lines[4] &
87		chips[which].input_lines[6])  |
88		((!chips[which].input_lines[3]) &
89		chips[which].input_lines[4] &
90		chips[which].input_lines[6])  |
91		((!chips[which].input_lines[5]) &
92		chips[which].input_lines[6])  |
93		(!chips[which].input_lines[7]));
	92	bit0 = !(((!state->input_lines[1]) &
	93	state->input_lines[2] &
	94	state->input_lines[4] &
	95	state->input_lines[6])  |
	96	((!state->input_lines[3]) &
	97	state->input_lines[4] &
	98	state->input_lines[6])  |
	99	((!state->input_lines[5]) &
	100	state->input_lines[6])  |
	101	(!state->input_lines[7]));
94	102
95		bit1 = !(((!chips[which].input_lines[2]) &
96		chips[which].input_lines[4] &
97		chips[which].input_lines[5])  |
98		((!chips[which].input_lines[3]) &
99		chips[which].input_lines[4] &
100		chips[which].input_lines[5])  |
101		(!chips[which].input_lines[6])  |
102		(!chips[which].input_lines[7]));
	103	bit1 = !(((!state->input_lines[2]) &
	104	state->input_lines[4] &
	105	state->input_lines[5])  |
	106	((!state->input_lines[3]) &
	107	state->input_lines[4] &
	108	state->input_lines[5])  |
	109	(!state->input_lines[6])  |
	110	(!state->input_lines[7]));
103	111
104		bit2 = !((!chips[which].input_lines[4])  |
105		(!chips[which].input_lines[5])  |
106		(!chips[which].input_lines[6])  |
107		(!chips[which].input_lines[7]));
	112	bit2 = !((!state->input_lines[4])  |
	113	(!state->input_lines[5])  |
	114	(!state->input_lines[6])  |
	115	(!state->input_lines[7]));
108	116
109		chips[which].output = (bit2 << 2) | (bit1 << 1) | bit0;
	117	state->output = (bit2 << 2) | (bit1 << 1) | bit0;
110	118
111		chips[which].output_valid = (chips[which].input_lines[0] &
112		chips[which].input_lines[1] &
113		chips[which].input_lines[2] &
114		chips[which].input_lines[3] &
115		chips[which].input_lines[4] &
116		chips[which].input_lines[5] &
117		chips[which].input_lines[6] &
118		chips[which].input_lines[7]);
	119	state->output_valid = (state->input_lines[0] &
	120	state->input_lines[1] &
	121	state->input_lines[2] &
	122	state->input_lines[3] &
	123	state->input_lines[4] &
	124	state->input_lines[5] &
	125	state->input_lines[6] &
	126	state->input_lines[7]);
119	127
120		chips[which].enable_output = !chips[which].output_valid;
	128	state->enable_output = !state->output_valid;
121	129	}
122	130
123	131
124	132	/* call callback if any of the outputs changed */
125		if (  chips[which].output_cb &&
126		((chips[which].output        != chips[which].last_output) ||
127		(chips[which].output_valid  != chips[which].last_output_valid) ||
128		(chips[which].enable_output != chips[which].last_enable_output)))
	133	if (  state->output_cb &&
	134	((state->output        != state->last_output) ||
	135	(state->output_valid  != state->last_output_valid) ||
	136	(state->enable_output != state->last_enable_output)))
129	137	{
130		chips[which].last_output = chips[which].output;
131		chips[which].last_output_valid = chips[which].output_valid;
132		chips[which].last_enable_output = chips[which].enable_output;
	138	state->last_output = state->output;
	139	state->last_output_valid = state->output_valid;
	140	state->last_enable_output = state->enable_output;
133	141
134		chips[which].output_cb(machine);
	142	state->output_cb(device);
135	143	}
136	144	}
137	145
138	146
139		void TTL74148_input_line_w(int which, int input_line, int data)
	147	void ttl74148_input_line_w(const device_config *device, int input_line, int data)
140	148	{
141		chips[which].input_lines[input_line] = data ? 1 : 0;
	149	ttl74148_state *state = get_safe_token(device);
	150	state->input_lines[input_line] = data ? 1 : 0;
142	151	}
143	152
144	153
145		void TTL74148_enable_input_w(int which, int data)
	154	void ttl74148_enable_input_w(const device_config *device, int data)
146	155	{
147		chips[which].enable_input = data ? 1 : 0;
	156	ttl74148_state *state = get_safe_token(device);
	157	state->enable_input = data ? 1 : 0;
148	158	}
149	159
150	160
151		int TTL74148_output_r(int which)
	161	int ttl74148_output_r(const device_config *device)
152	162	{
153		return chips[which].output;
	163	ttl74148_state *state = get_safe_token(device);
	164	return state->output;
154	165	}
155	166
156	167
157		int TTL74148_output_valid_r(int which)
	168	int ttl74148_output_valid_r(const device_config *device)
158	169	{
159		return chips[which].output_valid;
	170	ttl74148_state *state = get_safe_token(device);
	171	return state->output_valid;
160	172	}
161	173
162	174
163		int TTL74148_enable_output_r(int which)
	175	int ttl74148_enable_output_r(const device_config *device)
164	176	{
165		return chips[which].enable_output;
	177	ttl74148_state *state = get_safe_token(device);
	178	return state->enable_output;
166	179	}
167	180
168	181
	182	static DEVICE_START( ttl74148 )
	183	{
	184	ttl74148_config *config = (ttl74148_config *)device->inline_config;
	185	ttl74148_state *state = get_safe_token(device);
	186	state->output_cb = config->output_cb;
169	187
170		void TTL74148_config(running_machine *machine, int which, const struct TTL74148_interface *intf)
	188	state_save_register_device_item_array(device, 0, state->input_lines);
	189	state_save_register_device_item(device, 0, state->enable_input);
	190	state_save_register_device_item(device, 0, state->output);
	191	state_save_register_device_item(device, 0, state->output_valid);
	192	state_save_register_device_item(device, 0, state->enable_output);
	193	state_save_register_device_item(device, 0, state->last_output);
	194	state_save_register_device_item(device, 0, state->last_output_valid);
	195	state_save_register_device_item(device, 0, state->last_enable_output);
	196	}
	197
	198
	199	static DEVICE_RESET( ttl74148 )
171	200	{
172		if (which >= MAX_TTL74148)
173		{
174		logerror("Only %d 74148's are supported at this time.\n", MAX_TTL74148);
175		return;
176		}
	201	ttl74148_state *state = get_safe_token(device);
177	202
	203	state->enable_input = 1;
	204	state->input_lines[0] = 1;
	205	state->input_lines[1] = 1;
	206	state->input_lines[2] = 1;
	207	state->input_lines[3] = 1;
	208	state->input_lines[4] = 1;
	209	state->input_lines[5] = 1;
	210	state->input_lines[6] = 1;
	211	state->input_lines[7] = 1;
178	212
179		chips[which].output_cb = (intf ? intf->output_cb : 0);
180		chips[which].enable_input = 1;
181		chips[which].input_lines[0] = 1;
182		chips[which].input_lines[1] = 1;
183		chips[which].input_lines[2] = 1;
184		chips[which].input_lines[3] = 1;
185		chips[which].input_lines[4] = 1;
186		chips[which].input_lines[5] = 1;
187		chips[which].input_lines[6] = 1;
188		chips[which].input_lines[7] = 1;
	213	state->last_output = -1;
	214	state->last_output_valid = -1;
	215	state->last_enable_output = -1;
	216	}
189	217
190		chips[which].last_output = -1;
191		chips[which].last_output_valid = -1;
192		chips[which].last_enable_output = -1;
193	218
194		state_save_register_item_array(machine, "ttl74148", NULL, which, chips[which].input_lines);
195		state_save_register_item(machine, "ttl74148", NULL, which, chips[which].enable_input);
196		state_save_register_item(machine, "ttl74148", NULL, which, chips[which].output);
197		state_save_register_item(machine, "ttl74148", NULL, which, chips[which].output_valid);
198		state_save_register_item(machine, "ttl74148", NULL, which, chips[which].enable_output);
199		state_save_register_item(machine, "ttl74148", NULL, which, chips[which].last_output);
200		state_save_register_item(machine, "ttl74148", NULL, which, chips[which].last_output_valid);
201		state_save_register_item(machine, "ttl74148", NULL, which, chips[which].last_enable_output);
202		}
	219	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
	220
	221	#define DEVTEMPLATE_ID(p,s)      p##ttl74148##s
	222	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET | DT_HAS_INLINE_CONFIG
	223	#define DEVTEMPLATE_NAME      "74148"
	224	#define DEVTEMPLATE_FAMILY      "TTL"
	225	#include "devtempl.h"

src/emu/machine/68681.c

r6740	r6741
691	691	assert(device != NULL);
692	692	assert(device->tag != NULL);
693	693
	694	duart68681->duart_config = (const duart68681_config *)device->static_config;
	695	duart68681->device = device;
	696
	697	duart68681->channel[0].tx_timer = timer_alloc(device->machine, tx_timer_callback, (void*)device);
	698	duart68681->channel[1].tx_timer = timer_alloc(device->machine, tx_timer_callback, (void*)device);
	699	duart68681->duart_timer = timer_alloc(device->machine, duart_timer_callback, (void*)device);
	700
694	701	state_save_register_device_item(device, 0, duart68681->ACR);
695	702	state_save_register_device_item(device, 0, duart68681->IMR);
696	703	state_save_register_device_item(device, 0, duart68681->ISR);
r6740	r6741
739	746	static DEVICE_RESET(duart68681)
740	747	{
741	748	duart68681_state *duart68681 = get_safe_token(device);
	749	emu_timer *save0, *save1;
742	750
743		memset(duart68681, 0, sizeof(duart68681_state));
744		duart68681->duart_config = (const duart68681_config *)device->static_config;
745		duart68681->device = device;
	751	duart68681->ACR = 0;  /* Interrupt Vector Register */
746	752	duart68681->IVR = 0x0f;  /* Interrupt Vector Register */
747		// "reset clears internal registers (SRA, SRB, IMR, ISR, OPR, OPCR) puts OP0-7 in the high state, stops the counter/timer, and puts channels a/b in the inactive state"
748		duart68681->channel[0].SR = 0;
749		duart68681->channel[1].SR = 0;
750	753	duart68681->IMR = 0;  /* Interrupt Mask Register */
751	754	duart68681->ISR = 0;  /* Interrupt Status Register */
752	755	duart68681->OPCR = 0; /* Output Port Conf. Register */
753	756	duart68681->OPR = 0;  /* Output Port Register */
	757	duart68681->CTR.d = 0;  /* Counter/Timer Preset Value */
	758	duart68681->IP_last_state = 0;  /* last state of IP bits */
	759	// "reset clears internal registers (SRA, SRB, IMR, ISR, OPR, OPCR) puts OP0-7 in the high state, stops the counter/timer, and puts channels a/b in the inactive state"
	760	save0 = duart68681->channel[0].tx_timer;
	761	save1 = duart68681->channel[1].tx_timer;
	762	memset(duart68681->channel, 0, sizeof(duart68681->channel));
	763	duart68681->channel[0].tx_timer = save0;
	764	duart68681->channel[1].tx_timer = save1;
	765
754	766	if (duart68681->duart_config->output_port_write)
755		duart68681->duart_config->output_port_write(duart68681->device, duart68681->OPR ^ 0xff);
	767	duart68681->duart_config->output_port_write(duart68681->device, duart68681->OPR ^ 0xff);
756	768
757		// allocate timers
758		duart68681->channel[0].tx_timer = timer_alloc(device->machine, tx_timer_callback, (void*)device);
	769	// reset timers
759	770	timer_adjust_oneshot(duart68681->channel[0].tx_timer, attotime_never, 0);
760
761		duart68681->channel[1].tx_timer = timer_alloc(device->machine, tx_timer_callback, (void*)device);
762	771	timer_adjust_oneshot(duart68681->channel[1].tx_timer, attotime_never, 1);
763
764		duart68681->duart_timer = timer_alloc(device->machine, duart_timer_callback, (void*)device);
765	772	}
766	773
767	774	/*-------------------------------------------------

src/emu/machine/74148.h

r6740	r6741
42	42	#define TTL74148_H
43	43
44	44
45		/* The interface structure */
46		struct TTL74148_interface
	45	typedef struct _ttl74148_config ttl74148_config;
	46	struct _ttl74148_config
47	47	{
48		void (*output_cb)(running_machine *machine);
	48	void (*output_cb)(const device_config *device);
49	49	};
50	50
51	51
52		void TTL74148_config(running_machine *machine, int which, const struct TTL74148_interface *intf);
	52	#define MDRV_74148_ADD(_tag, _output_cb) \
	53	MDRV_DEVICE_ADD(_tag, TTL74148, 0) \
	54	MDRV_DEVICE_CONFIG_DATAPTR(ttl74148_config, output_cb, _output_cb)
53	55
54		/* must call TTL74148_update() after setting the inputs */
55		void TTL74148_update(running_machine *machine, int which);
56	56
57		void TTL74148_input_line_w(int which, int input_line, int data);
58		void TTL74148_enable_input_w(int which, int data);
59		int  TTL74148_output_r(int which);
60		int  TTL74148_output_valid_r(int which);
61		int  TTL74148_enable_output_r(int which);
	57	/* must call ttl74148_update() after setting the inputs */
	58	void ttl74148_update(const device_config *device);
62	59
	60	void ttl74148_input_line_w(const device_config *device, int input_line, int data);
	61	void ttl74148_enable_input_w(const device_config *device, int data);
	62	int  ttl74148_output_r(const device_config *device);
	63	int  ttl74148_output_valid_r(const device_config *device);
	64	int  ttl74148_enable_output_r(const device_config *device);
	65
	66	/* device get info callback */
	67	#define TTL74148 DEVICE_GET_INFO_NAME(ttl74148)
	68	DEVICE_GET_INFO( ttl74148 );
	69
63	70	#endif

src/emu/machine/7474.c

r6740	r6741
41	41	#include "7474.h"
42	42
43	43
44		#define MAX_TTL7474  12
45
46		struct TTL7474
	44	typedef struct _ttl7474_state ttl7474_state;
	45	struct _ttl7474_state
47	46	{
48	47	/* callback */
49		void (*output_cb)(running_machine *);
	48	void (*output_cb)(const device_config *);
50	49
51	50	/* inputs */
52	51	UINT8 clear;         /* pin 1/13 */
r6740	r6741
64	63	UINT8 last_output_comp;
65	64	};
66	65
67		static struct TTL7474 chips[MAX_TTL7474];
	66	INLINE ttl7474_state *get_safe_token(const device_config *device)
	67	{
	68	assert(device != NULL);
	69	assert(device->token != NULL);
	70	assert(device->type == TTL7474);
68	71
	72	return (ttl7474_state *)device->token;
	73	}
69	74
70		void TTL7474_update(running_machine *machine, int which)
	75
	76	void ttl7474_update(const device_config *device)
71	77	{
72		if (!chips[which].preset && chips[which].clear)           /* line 1 in truth table */
	78	ttl7474_state *state = get_safe_token(device);
	79
	80	if (!state->preset && state->clear)           /* line 1 in truth table */
73	81	{
74		chips[which].output     = 1;
75		chips[which].output_comp = 0;
	82	state->output     = 1;
	83	state->output_comp = 0;
76	84	}
77		else if (chips[which].preset && !chips[which].clear)     /* line 2 in truth table */
	85	else if (state->preset && !state->clear)     /* line 2 in truth table */
78	86	{
79		chips[which].output     = 0;
80		chips[which].output_comp = 1;
	87	state->output     = 0;
	88	state->output_comp = 1;
81	89	}
82		else if (!chips[which].preset && !chips[which].clear)     /* line 3 in truth table */
	90	else if (!state->preset && !state->clear)     /* line 3 in truth table */
83	91	{
84		chips[which].output     = 1;
85		chips[which].output_comp = 1;
	92	state->output     = 1;
	93	state->output_comp = 1;
86	94	}
87		else if (!chips[which].last_clock && chips[which].clock)  /* line 4 in truth table */
	95	else if (!state->last_clock && state->clock)  /* line 4 in truth table */
88	96	{
89		chips[which].output     =  chips[which].d;
90		chips[which].output_comp = !chips[which].d;
	97	state->output     =  state->d;
	98	state->output_comp = !state->d;
91	99	}
92	100
93		chips[which].last_clock = chips[which].clock;
	101	state->last_clock = state->clock;
94	102
95	103
96	104	/* call callback if any of the outputs changed */
97		if (  chips[which].output_cb &&
98		((chips[which].output      != chips[which].last_output) ||
99		(chips[which].output_comp != chips[which].last_output_comp)))
	105	if (  state->output_cb &&
	106	((state->output      != state->last_output) ||
	107	(state->output_comp != state->last_output_comp)))
100	108	{
101		chips[which].last_output = chips[which].output;
102		chips[which].last_output_comp = chips[which].output_comp;
	109	state->last_output = state->output;
	110	state->last_output_comp = state->output_comp;
103	111
104		chips[which].output_cb(machine);
	112	state->output_cb(device);
105	113	}
106	114	}
107	115
108	116
109		void TTL7474_clear_w(int which, int data)
	117	void ttl7474_clear_w(const device_config *device, int data)
110	118	{
111		chips[which].clear = data ? 1 : 0;
	119	ttl7474_state *state = get_safe_token(device);
	120	state->clear = data ? 1 : 0;
112	121	}
113	122
114		void TTL7474_preset_w(int which, int data)
	123	void ttl7474_preset_w(const device_config *device, int data)
115	124	{
116		chips[which].preset = data ? 1 : 0;
	125	ttl7474_state *state = get_safe_token(device);
	126	state->preset = data ? 1 : 0;
117	127	}
118	128
119		void TTL7474_clock_w(int which, int data)
	129	void ttl7474_clock_w(const device_config *device, int data)
120	130	{
121		chips[which].clock = data ? 1 : 0;
	131	ttl7474_state *state = get_safe_token(device);
	132	state->clock = data ? 1 : 0;
122	133	}
123	134
124		void TTL7474_d_w(int which, int data)
	135	void ttl7474_d_w(const device_config *device, int data)
125	136	{
126		chips[which].d = data ? 1 : 0;
	137	ttl7474_state *state = get_safe_token(device);
	138	state->d = data ? 1 : 0;
127	139	}
128	140
129	141
130		int TTL7474_output_r(int which)
	142	int ttl7474_output_r(const device_config *device)
131	143	{
132		return chips[which].output;
	144	ttl7474_state *state = get_safe_token(device);
	145	return state->output;
133	146	}
134	147
135		int TTL7474_output_comp_r(int which)
	148	int ttl7474_output_comp_r(const device_config *device)
136	149	{
137		return chips[which].output_comp;
	150	ttl7474_state *state = get_safe_token(device);
	151	return state->output_comp;
138	152	}
139	153
140	154
141		void TTL7474_config(running_machine *machine, int which, const struct TTL7474_interface *intf)
	155	static DEVICE_START( ttl7474 )
142	156	{
143		if (which >= MAX_TTL7474)
144		{
145		logerror("Only %d 7474's are supported at this time.\n", MAX_TTL7474);
146		return;
147		}
	157	ttl7474_config *config = (ttl7474_config *)device->inline_config;
	158	ttl7474_state *state = get_safe_token(device);
	159	state->output_cb = config->output_cb;
148	160
	161	state_save_register_device_item(device, 0, state->clear);
	162	state_save_register_device_item(device, 0, state->preset);
	163	state_save_register_device_item(device, 0, state->clock);
	164	state_save_register_device_item(device, 0, state->d);
	165	state_save_register_device_item(device, 0, state->output);
	166	state_save_register_device_item(device, 0, state->output_comp);
	167	state_save_register_device_item(device, 0, state->last_clock);
	168	state_save_register_device_item(device, 0, state->last_output);
	169	state_save_register_device_item(device, 0, state->last_output_comp);
	170	}
149	171
150		chips[which].output_cb = (intf ? intf->output_cb : 0);
151	172
	173	static DEVICE_RESET( ttl7474 )
	174	{
	175	ttl7474_state *state = get_safe_token(device);
	176
152	177	/* all inputs are open first */
153		chips[which].clear = 1;
154		chips[which].preset = 1;
155		chips[which].clock = 1;
156		chips[which].d = 1;
	178	state->clear = 1;
	179	state->preset = 1;
	180	state->clock = 1;
	181	state->d = 1;
157	182
158		chips[which].last_clock = 1;
159		chips[which].last_output = -1;
160		chips[which].last_output_comp = -1;
	183	state->last_clock = 1;
	184	state->last_output = -1;
	185	state->last_output_comp = -1;
	186	}
161	187
162		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].clear);
163		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].preset);
164		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].clock);
165		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].d);
166		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].output);
167		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].output_comp);
168		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].last_clock);
169		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].last_output);
170		state_save_register_item(machine, "ttl7474", NULL, which, chips[which].last_output_comp);
171		}
	188
	189	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
	190
	191	#define DEVTEMPLATE_ID(p,s)      p##ttl7474##s
	192	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET | DT_HAS_INLINE_CONFIG
	193	#define DEVTEMPLATE_NAME      "7474"
	194	#define DEVTEMPLATE_FAMILY      "TTL"
	195	#include "devtempl.h"

src/emu/machine/7474.h

r6740	r6741
25	25	H   L   X   X | L   H
26	26	L   L   X   X | H   H  (Note 1)
27	27	H   H  _-   X | D  /D
28		H   H   L   X | Q0 /Q0
	28	H   H   L   X | Q0 /Q01
29	29	--------------+-------
30	30	L   = lo (0)
31	31	H   = hi (1)
r6740	r6741
41	41	#define TTL7474_H
42	42
43	43
44		/* The interface structure */
45		struct TTL7474_interface
	44	typedef struct _ttl7474_config ttl7474_config;
	45	struct _ttl7474_config
46	46	{
47		void (*output_cb)(running_machine *machine);
	47	void (*output_cb)(const device_config *device);
48	48	};
49	49
50	50
51		void TTL7474_config(running_machine *machine, int which, const struct TTL7474_interface *intf);
	51	#define MDRV_7474_ADD(_tag, _output_cb) \
	52	MDRV_DEVICE_ADD(_tag, TTL7474, 0) \
	53	MDRV_DEVICE_CONFIG_DATAPTR(ttl7474_config, output_cb, _output_cb)
52	54
	55
	56
53	57	/* must call TTL7474_update() after setting the inputs */
54		void TTL7474_update(running_machine *machine, int which);
	58	void ttl7474_update(const device_config *device);
55	59
56		void TTL7474_clear_w(int which, int data);
57		void TTL7474_preset_w(int which, int data);
58		void TTL7474_clock_w(int which, int data);
59		void TTL7474_d_w(int which, int data);
60		int  TTL7474_output_r(int which);
61		int  TTL7474_output_comp_r(int which);   /* NOT strictly the same as !TTL7474_output_r() */
	60	void ttl7474_clear_w(const device_config *device, int data);
	61	void ttl7474_preset_w(const device_config *device, int data);
	62	void ttl7474_clock_w(const device_config *device, int data);
	63	void ttl7474_d_w(const device_config *device, int data);
	64	int  ttl7474_output_r(const device_config *device);
	65	int  ttl7474_output_comp_r(const device_config *device);   /* NOT strictly the same as !ttl7474_output_r() */
62	66
	67	/* device get info callback */
	68	#define TTL7474 DEVICE_GET_INFO_NAME(ttl7474)
	69	DEVICE_GET_INFO( ttl7474 );
	70
63	71	#endif

src/emu/machine/74153.c

r6740	r6741
37	37	#include "machine/74153.h"
38	38
39	39
40		#define MAX_TTL74153 9
41
42		struct TTL74153
	40	typedef struct _ttl74153_state ttl74153_state;
	41	struct _ttl74153_state
43	42	{
44		running_machine *machine;
45
46	43	/* callback */
47		void (*output_cb)(running_machine *machine);
	44	void (*output_cb)(const device_config *device);
48	45
49	46	/* inputs */
50	47	int a;               /* pin 14 */
r6740	r6741
59	56	int last_output[2];
60	57	};
61	58
62		static struct TTL74153 chips[MAX_TTL74153];
	59	INLINE ttl74153_state *get_safe_token(const device_config *device)
	60	{
	61	assert(device != NULL);
	62	assert(device->token != NULL);
	63	assert(device->type == TTL74153);
63	64
	65	return (ttl74153_state *)device->token;
	66	}
64	67
65		void TTL74153_update(int which)
	68
	69
	70	void ttl74153_update(const device_config *device)
66	71	{
	72	ttl74153_state *state = get_safe_token(device);
67	73	int sel;
68	74	int section;
69	75
70	76
71		sel = (chips[which].b << 1) | chips[which].a;
	77	sel = (state->b << 1) | state->a;
72	78
73	79
74	80	/* process both sections */
75	81	for (section = 0; section < 2; section++)
76	82	{
77		if (chips[which].enable[section])
78		chips[which].output[section] = 0;   // row 1 in truth table
	83	if (state->enable[section])
	84	state->output[section] = 0;   // row 1 in truth table
79	85	else
80		chips[which].output[section] = chips[which].input_lines[section][sel];
	86	state->output[section] = state->input_lines[section][sel];
81	87	}
82	88
83	89
84	90	/* call callback if either of the outputs changed */
85		if (  chips[which].output_cb &&
86		((chips[which].output[0] != chips[which].last_output[0]) ||
87		(chips[which].output[1] != chips[which].last_output[1])))
	91	if (  state->output_cb &&
	92	((state->output[0] != state->last_output[0]) ||
	93	(state->output[1] != state->last_output[1])))
88	94	{
89		chips[which].last_output[0] = chips[which].output[0];
90		chips[which].last_output[1] = chips[which].output[1];
	95	state->last_output[0] = state->output[0];
	96	state->last_output[1] = state->output[1];
91	97
92		chips[which].output_cb(chips[which].machine);
	98	state->output_cb(device);
93	99	}
94	100	}
95	101
96	102
97		void TTL74153_a_w(int which, int data)
	103	void ttl74153_a_w(const device_config *device, int data)
98	104	{
99		chips[which].a = data ? 1 : 0;
	105	ttl74153_state *state = get_safe_token(device);
	106	state->a = data ? 1 : 0;
100	107	}
101	108
102	109
103		void TTL74153_b_w(int which, int data)
	110	void ttl74153_b_w(const device_config *device, int data)
104	111	{
105		chips[which].b = data ? 1 : 0;
	112	ttl74153_state *state = get_safe_token(device);
	113	state->b = data ? 1 : 0;
106	114	}
107	115
108	116
109		void TTL74153_input_line_w(int which, int section, int input_line, int data)
	117	void ttl74153_input_line_w(const device_config *device, int section, int input_line, int data)
110	118	{
111		chips[which].input_lines[section][input_line] = data ? 1 : 0;
	119	ttl74153_state *state = get_safe_token(device);
	120	state->input_lines[section][input_line] = data ? 1 : 0;
112	121	}
113	122
114	123
115		void TTL74153_enable_w(int which, int section, int data)
	124	void ttl74153_enable_w(const device_config *device, int section, int data)
116	125	{
117		chips[which].enable[section] = data ? 1 : 0;
	126	ttl74153_state *state = get_safe_token(device);
	127	state->enable[section] = data ? 1 : 0;
118	128	}
119	129
120	130
121		int TTL74153_output_r(int which, int section)
	131	int ttl74153_output_r(const device_config *device, int section)
122	132	{
123		return chips[which].output[section];
	133	ttl74153_state *state = get_safe_token(device);
	134	return state->output[section];
124	135	}
125	136
126	137
	138	static DEVICE_START( ttl74153 )
	139	{
	140	ttl74153_config *config = (ttl74153_config *)device->inline_config;
	141	ttl74153_state *state = get_safe_token(device);
	142	state->output_cb = config->output_cb;
127	143
128		void TTL74153_config(running_machine *machine, int which, const struct TTL74153_interface *intf)
	144	state_save_register_device_item_array(device, 0, state->enable);
	145	state_save_register_device_item_array(device, 0, state->last_output);
	146	state_save_register_device_item(device, 0, state->input_lines[0][0]);
	147	state_save_register_device_item(device, 0, state->input_lines[0][1]);
	148	state_save_register_device_item(device, 0, state->input_lines[0][2]);
	149	state_save_register_device_item(device, 0, state->input_lines[0][3]);
	150	state_save_register_device_item(device, 0, state->input_lines[1][0]);
	151	state_save_register_device_item(device, 0, state->input_lines[1][1]);
	152	state_save_register_device_item(device, 0, state->input_lines[1][2]);
	153	state_save_register_device_item(device, 0, state->input_lines[1][3]);
	154	state_save_register_device_item(device, 0, state->a);
	155	state_save_register_device_item(device, 0, state->b);
	156	}
	157
	158
	159	static DEVICE_RESET( ttl74153 )
129	160	{
130		if (which >= MAX_TTL74153)
131		{
132		logerror("Only %d 74153's are supported at this time.\n", MAX_TTL74153);
133		return;
134		}
	161	ttl74153_state *state = get_safe_token(device);
135	162
	163	state->a = 1;
	164	state->b = 1;
	165	state->enable[0] = 1;
	166	state->enable[1] = 1;
	167	state->input_lines[0][0] = 1;
	168	state->input_lines[0][1] = 1;
	169	state->input_lines[0][2] = 1;
	170	state->input_lines[0][3] = 1;
	171	state->input_lines[1][0] = 1;
	172	state->input_lines[1][1] = 1;
	173	state->input_lines[1][2] = 1;
	174	state->input_lines[1][3] = 1;
136	175
137		chips[which].machine = machine;
138		chips[which].output_cb = (intf ? intf->output_cb : 0);
139		chips[which].a = 1;
140		chips[which].b = 1;
141		chips[which].enable[0] = 1;
142		chips[which].enable[1] = 1;
143		chips[which].input_lines[0][0] = 1;
144		chips[which].input_lines[0][1] = 1;
145		chips[which].input_lines[0][2] = 1;
146		chips[which].input_lines[0][3] = 1;
147		chips[which].input_lines[1][0] = 1;
148		chips[which].input_lines[1][1] = 1;
149		chips[which].input_lines[1][2] = 1;
150		chips[which].input_lines[1][3] = 1;
	176	state->last_output[0] = -1;
	177	state->last_output[1] = -1;
	178	}
151	179
152		chips[which].last_output[0] = -1;
153		chips[which].last_output[1] = -1;
154	180
155		state_save_register_item_array(machine, "ttl74153", NULL, which, chips[which].enable);
156		state_save_register_item_array(machine, "ttl74153", NULL, which, chips[which].last_output);
157		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].input_lines[0][0]);
158		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].input_lines[0][1]);
159		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].input_lines[0][2]);
160		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].input_lines[0][3]);
161		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].input_lines[1][0]);
162		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].input_lines[1][1]);
163		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].input_lines[1][2]);
164		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].input_lines[1][3]);
165		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].a);
166		state_save_register_item(machine, "ttl74153", NULL, which, chips[which].b);
167		}
	181	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
	182
	183	#define DEVTEMPLATE_ID(p,s)      p##ttl74153##s
	184	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET | DT_HAS_INLINE_CONFIG
	185	#define DEVTEMPLATE_NAME      "74153"
	186	#define DEVTEMPLATE_FAMILY      "TTL"
	187	#include "devtempl.h"

src/emu/machine/74153.h

r6740	r6741
37	37	#define TTL74153_H
38	38
39	39
40		/* The interface structure */
41		struct TTL74153_interface
	40	typedef struct _ttl74153_config ttl74153_config;
	41	struct _ttl74153_config
42	42	{
43		void (*output_cb)(running_machine *machine);
	43	void (*output_cb)(const device_config *device);
44	44	};
45	45
46	46
47		void TTL74153_config(running_machine *machine, int which, const struct TTL74153_interface *intf);
	47	#define MDRV_74153_ADD(_tag, _output_cb) \
	48	MDRV_DEVICE_ADD(_tag, TTL74153, 0) \
	49	MDRV_DEVICE_CONFIG_DATAPTR(ttl74153_config, output_cb, _output_cb)
48	50
	51
	52
49	53	/* must call TTL74153_update() after setting the inputs */
50		void TTL74153_update(int which);
	54	void ttl74153_update(const device_config *device);
51	55
52		void TTL74153_a_w(int which, int data);
53		void TTL74153_b_w(int which, int data);
54		void TTL74153_input_line_w(int which, int section, int input_line, int data);
55		void TTL74153_enable_w(int which, int section, int data);
56		int TTL74153_output_r(int which, int section);
	56	void ttl74153_a_w(const device_config *device, int data);
	57	void ttl74153_b_w(const device_config *device, int data);
	58	void ttl74153_input_line_w(const device_config *device, int section, int input_line, int data);
	59	void ttl74153_enable_w(const device_config *device, int section, int data);
	60	int ttl74153_output_r(const device_config *device, int section);
57	61
	62	/* device get info callback */
	63	#define TTL74153 DEVICE_GET_INFO_NAME(ttl74153)
	64	DEVICE_GET_INFO( ttl74153 );
	65
58	66	#endif

src/emu/machine/tmp68301.c

r6740	r6741
106	106	}
107	107	}
108	108
109		MACHINE_RESET( tmp68301 )
	109	MACHINE_START( tmp68301 )
110	110	{
111	111	int i;
112	112	for (i = 0; i < 3; i++)
113	113	tmp68301_timer[i] = timer_alloc(machine, tmp68301_timer_callback, NULL);
	114	}
114	115
	116	MACHINE_RESET( tmp68301 )
	117	{
	118	int i;
	119
115	120	for (i = 0; i < 3; i++)
116	121	tmp68301_IE[i] = 0;
117	122

src/emu/machine/tmp68301.h

r6740	r6741
2	2	#define TMP68301_H
3	3
4	4	// Machine init
	5	MACHINE_START( tmp68301 );
5	6	MACHINE_RESET( tmp68301 );
6	7
7	8	// Hardware Registers

src/emu/machine/eepromdev.c

r6740	r6741
21	21	const eeprom_interface *intf;
22	22	int serial_count;
23	23	UINT8 serial_buffer[SERIAL_BUFFER_LENGTH];
24		UINT8 eeprom_data[MEMORY_SIZE];
25		int eeprom_data_bits;
26		int eeprom_read_address;
27		int eeprom_clock_count;
	24	UINT8 data[MEMORY_SIZE];
	25	int data_bits;
	26	int read_address;
	27	int clock_count;
28	28	int latch,reset_line,clock_line,sending;
29	29	int locked;
30	30	int reset_delay;
r6740	r6741
130	130	//  "*10010xxxxxx", /* erase all */
131	131	};
132	132
133		static void eeprom_write(eeprom_state *c, int bit)
	133	static void eeprom_write(eeprom_state *eestate, int bit)
134	134	{
135	135	LOG(("EEPROM write bit %d\n",bit));
136	136
137		if (c->serial_count >= SERIAL_BUFFER_LENGTH-1)
	137	if (eestate->serial_count >= SERIAL_BUFFER_LENGTH-1)
138	138	{
139	139	logerror("error: EEPROM serial buffer overflow\n");
140	140	return;
141	141	}
142	142
143		c->serial_buffer[c->serial_count++] = (bit ? '1' : '0');
144		c->serial_buffer[c->serial_count] = 0;   /* nul terminate so we can treat it as a string */
	143	eestate->serial_buffer[eestate->serial_count++] = (bit ? '1' : '0');
	144	eestate->serial_buffer[eestate->serial_count] = 0;   /* nul terminate so we can treat it as a string */
145	145
146		if ( (c->serial_count > c->intf->address_bits) &&
147		eeprom_command_match((char*)(c->serial_buffer),c->intf->cmd_read,strlen((char*)(c->serial_buffer))-c->intf->address_bits) )
	146	if ( (eestate->serial_count > eestate->intf->address_bits) &&
	147	eeprom_command_match((char*)(eestate->serial_buffer),eestate->intf->cmd_read,strlen((char*)(eestate->serial_buffer))-eestate->intf->address_bits) )
148	148	{
149	149	int i,address;
150	150
151	151	address = 0;
152		for (i = c->serial_count-c->intf->address_bits;i < c->serial_count;i++)
	152	for (i = eestate->serial_count-eestate->intf->address_bits;i < eestate->serial_count;i++)
153	153	{
154	154	address <<= 1;
155		if (c->serial_buffer[i] == '1') address |= 1;
	155	if (eestate->serial_buffer[i] == '1') address |= 1;
156	156	}
157		if (c->intf->data_bits == 16)
158		c->eeprom_data_bits = (c->eeprom_data[2*address+0] << 8) + c->eeprom_data[2*address+1];
	157	if (eestate->intf->data_bits == 16)
	158	eestate->data_bits = (eestate->data[2*address+0] << 8) + eestate->data[2*address+1];
159	159	else
160		c->eeprom_data_bits = c->eeprom_data[address];
161		c->eeprom_read_address = address;
162		c->eeprom_clock_count = 0;
163		c->sending = 1;
164		c->serial_count = 0;
165		logerror("EEPROM read %04x from address %02x\n",c->eeprom_data_bits,address);
	160	eestate->data_bits = eestate->data[address];
	161	eestate->read_address = address;
	162	eestate->clock_count = 0;
	163	eestate->sending = 1;
	164	eestate->serial_count = 0;
	165	logerror("EEPROM read %04x from address %02x\n",eestate->data_bits,address);
166	166	}
167		else if ( (c->serial_count > c->intf->address_bits) &&
168		eeprom_command_match((char*)(c->serial_buffer),c->intf->cmd_erase,strlen((char*)(c->serial_buffer))-c->intf->address_bits) )
	167	else if ( (eestate->serial_count > eestate->intf->address_bits) &&
	168	eeprom_command_match((char*)(eestate->serial_buffer),eestate->intf->cmd_erase,strlen((char*)(eestate->serial_buffer))-eestate->intf->address_bits) )
169	169	{
170	170	int i,address;
171	171
172	172	address = 0;
173		for (i = c->serial_count-c->intf->address_bits;i < c->serial_count;i++)
	173	for (i = eestate->serial_count-eestate->intf->address_bits;i < eestate->serial_count;i++)
174	174	{
175	175	address <<= 1;
176		if (c->serial_buffer[i] == '1') address |= 1;
	176	if (eestate->serial_buffer[i] == '1') address |= 1;
177	177	}
178	178	logerror("EEPROM erase address %02x\n",address);
179		if (c->locked == 0)
	179	if (eestate->locked == 0)
180	180	{
181		if (c->intf->data_bits == 16)
	181	if (eestate->intf->data_bits == 16)
182	182	{
183		c->eeprom_data[2*address+0] = 0x00;
184		c->eeprom_data[2*address+1] = 0x00;
	183	eestate->data[2*address+0] = 0x00;
	184	eestate->data[2*address+1] = 0x00;
185	185	}
186	186	else
187		c->eeprom_data[address] = 0x00;
	187	eestate->data[address] = 0x00;
188	188	}
189	189	else
190	190	logerror("Error: EEPROM is locked\n");
191		c->serial_count = 0;
	191	eestate->serial_count = 0;
192	192	}
193		else if ( (c->serial_count > (c->intf->address_bits + c->intf->data_bits)) &&
194		eeprom_command_match((char*)(c->serial_buffer),c->intf->cmd_write,strlen((char*)(c->serial_buffer))-(c->intf->address_bits + c->intf->data_bits)) )
	193	else if ( (eestate->serial_count > (eestate->intf->address_bits + eestate->intf->data_bits)) &&
	194	eeprom_command_match((char*)(eestate->serial_buffer),eestate->intf->cmd_write,strlen((char*)(eestate->serial_buffer))-(eestate->intf->address_bits + eestate->intf->data_bits)) )
195	195	{
196	196	int i,address,data;
197	197
198	198	address = 0;
199		for (i = c->serial_count-c->intf->data_bits-c->intf->address_bits;i < (c->serial_count-c->intf->data_bits);i++)
	199	for (i = eestate->serial_count-eestate->intf->data_bits-eestate->intf->address_bits;i < (eestate->serial_count-eestate->intf->data_bits);i++)
200	200	{
201	201	address <<= 1;
202		if (c->serial_buffer[i] == '1') address |= 1;
	202	if (eestate->serial_buffer[i] == '1') address |= 1;
203	203	}
204	204	data = 0;
205		for (i = c->serial_count-c->intf->data_bits;i < c->serial_count;i++)
	205	for (i = eestate->serial_count-eestate->intf->data_bits;i < eestate->serial_count;i++)
206	206	{
207	207	data <<= 1;
208		if (c->serial_buffer[i] == '1') data |= 1;
	208	if (eestate->serial_buffer[i] == '1') data |= 1;
209	209	}
210	210	logerror("EEPROM write %04x to address %02x\n",data,address);
211		if (c->locked == 0)
	211	if (eestate->locked == 0)
212	212	{
213		if (c->intf->data_bits == 16)
	213	if (eestate->intf->data_bits == 16)
214	214	{
215		c->eeprom_data[2*address+0] = data >> 8;
216		c->eeprom_data[2*address+1] = data & 0xff;
	215	eestate->data[2*address+0] = data >> 8;
	216	eestate->data[2*address+1] = data & 0xff;
217	217	}
218	218	else
219		c->eeprom_data[address] = data;
	219	eestate->data[address] = data;
220	220	}
221	221	else
222	222	logerror("Error: EEPROM is locked\n");
223		c->serial_count = 0;
	223	eestate->serial_count = 0;
224	224	}
225		else if ( eeprom_command_match((char*)(c->serial_buffer),c->intf->cmd_lock,strlen((char*)(c->serial_buffer))) )
	225	else if ( eeprom_command_match((char*)(eestate->serial_buffer),eestate->intf->cmd_lock,strlen((char*)(eestate->serial_buffer))) )
226	226	{
227	227	logerror("EEPROM lock\n");
228		c->locked = 1;
229		c->serial_count = 0;
	228	eestate->locked = 1;
	229	eestate->serial_count = 0;
230	230	}
231		else if ( eeprom_command_match((char*)(c->serial_buffer),c->intf->cmd_unlock,strlen((char*)(c->serial_buffer))) )
	231	else if ( eeprom_command_match((char*)(eestate->serial_buffer),eestate->intf->cmd_unlock,strlen((char*)(eestate->serial_buffer))) )
232	232	{
233	233	logerror("EEPROM unlock\n");
234		c->locked = 0;
235		c->serial_count = 0;
	234	eestate->locked = 0;
	235	eestate->serial_count = 0;
236	236	}
237	237	}
238	238
239		static void eeprom_reset(eeprom_state *c)
	239	static void eeprom_reset(eeprom_state *eestate)
240	240	{
241		if (c->serial_count)
242		logerror("EEPROM reset, buffer = %s\n",c->serial_buffer);
	241	if (eestate->serial_count)
	242	logerror("EEPROM reset, buffer = %s\n",eestate->serial_buffer);
243	243
244		c->serial_count = 0;
245		c->sending = 0;
246		c->reset_delay = c->intf->reset_delay;   /* delay a little before returning setting data to 1 (needed by wbeachvl) */
	244	eestate->serial_count = 0;
	245	eestate->sending = 0;
	246	eestate->reset_delay = eestate->intf->reset_delay;   /* delay a little before returning setting data to 1 (needed by wbeachvl) */
247	247	}
248	248
249	249
250	250	WRITE_LINE_DEVICE_HANDLER( eepromdev_write_bit )
251	251	{
252		eeprom_state *c = get_safe_token(device);
	252	eeprom_state *eestate = get_safe_token(device);
253	253
254	254	LOG(("write bit %d\n",state));
255		c->latch = state;
	255	eestate->latch = state;
256	256	}
257	257
258	258	READ_LINE_DEVICE_HANDLER( eepromdev_read_bit )
259	259	{
260		eeprom_state *c = get_safe_token(device);
	260	eeprom_state *eestate = get_safe_token(device);
261	261	int res;
262	262
263		if (c->sending)
264		res = (c->eeprom_data_bits >> c->intf->data_bits) & 1;
	263	if (eestate->sending)
	264	res = (eestate->data_bits >> eestate->intf->data_bits) & 1;
265	265	else
266	266	{
267		if (c->reset_delay > 0)
	267	if (eestate->reset_delay > 0)
268	268	{
269	269	/* this is needed by wbeachvl */
270		c->reset_delay--;
	270	eestate->reset_delay--;
271	271	res = 0;
272	272	}
273	273	else
r6740	r6741
281	281
282	282	WRITE_LINE_DEVICE_HANDLER( eepromdev_set_cs_line )
283	283	{
284		eeprom_state *c = get_safe_token(device);
	284	eeprom_state *eestate = get_safe_token(device);
285	285
286	286	LOG(("set reset line %d\n",state));
287		c->reset_line = state;
	287	eestate->reset_line = state;
288	288
289		if (c->reset_line != CLEAR_LINE)
290		eeprom_reset(c);
	289	if (eestate->reset_line != CLEAR_LINE)
	290	eeprom_reset(eestate);
291	291	}
292	292
293	293	WRITE_LINE_DEVICE_HANDLER( eepromdev_set_clock_line )
294	294	{
295		eeprom_state *c = get_safe_token(device);
	295	eeprom_state *eestate = get_safe_token(device);
296	296
297	297	LOG(("set clock line %d\n",state));
298		if (state == PULSE_LINE || (c->clock_line == CLEAR_LINE && state != CLEAR_LINE))
	298	if (state == PULSE_LINE || (eestate->clock_line == CLEAR_LINE && state != CLEAR_LINE))
299	299	{
300		if (c->reset_line == CLEAR_LINE)
	300	if (eestate->reset_line == CLEAR_LINE)
301	301	{
302		if (c->sending)
	302	if (eestate->sending)
303	303	{
304		if (c->eeprom_clock_count == c->intf->data_bits && c->intf->enable_multi_read)
	304	if (eestate->clock_count == eestate->intf->data_bits && eestate->intf->enable_multi_read)
305	305	{
306		c->eeprom_read_address = (c->eeprom_read_address + 1) & ((1 << c->intf->address_bits) - 1);
307		if (c->intf->data_bits == 16)
308		c->eeprom_data_bits = (c->eeprom_data[2*c->eeprom_read_address+0] << 8) + c->eeprom_data[2*c->eeprom_read_address+1];
	306	eestate->read_address = (eestate->read_address + 1) & ((1 << eestate->intf->address_bits) - 1);
	307	if (eestate->intf->data_bits == 16)
	308	eestate->data_bits = (eestate->data[2*eestate->read_address+0] << 8) + eestate->data[2*eestate->read_address+1];
309	309	else
310		c->eeprom_data_bits = c->eeprom_data[c->eeprom_read_address];
311		c->eeprom_clock_count = 0;
312		logerror("EEPROM read %04x from address %02x\n",c->eeprom_data_bits,c->eeprom_read_address);
	310	eestate->data_bits = eestate->data[eestate->read_address];
	311	eestate->clock_count = 0;
	312	logerror("EEPROM read %04x from address %02x\n",eestate->data_bits,eestate->read_address);
313	313	}
314		c->eeprom_data_bits = (c->eeprom_data_bits << 1) | 1;
315		c->eeprom_clock_count++;
	314	eestate->data_bits = (eestate->data_bits << 1) | 1;
	315	eestate->clock_count++;
316	316	}
317	317	else
318		eeprom_write(c,c->latch);
	318	eeprom_write(eestate,eestate->latch);
319	319	}
320	320	}
321	321
322		c->clock_line = state;
	322	eestate->clock_line = state;
323	323	}
324	324
325	325
326	326	static void eepromdev_load(const device_config *device, mame_file *f)
327	327	{
328		eeprom_state *c = get_safe_token(device);
	328	eeprom_state *eestate = get_safe_token(device);
329	329
330		mame_fread(f, c->eeprom_data, (1 << c->intf->address_bits) * c->intf->data_bits / 8);
	330	mame_fread(f, eestate->data, (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8);
331	331	}
332	332
333	333	static void eepromdev_save(const device_config *device, mame_file *f)
334	334	{
335		eeprom_state *c = get_safe_token(device);
	335	eeprom_state *eestate = get_safe_token(device);
336	336
337		mame_fwrite(f, c->eeprom_data, (1 << c->intf->address_bits) * c->intf->data_bits / 8);
	337	mame_fwrite(f, eestate->data, (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8);
338	338	}
339	339
340	340	void eepromdev_set_data(const device_config *device, const UINT8 *data, int length)
341	341	{
342		eeprom_state *c = get_safe_token(device);
	342	eeprom_state *eestate = get_safe_token(device);
343	343
344		assert(length <= ((1 << c->intf->address_bits) * c->intf->data_bits / 8));
345		memcpy(c->eeprom_data, data, length);
	344	assert(length <= ((1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8));
	345	memcpy(eestate->data, data, length);
	346	/* temporary: write data to eeprom.bin when this happens so we capture it
	347	for adding to a region */
	348	{
	349	FILE *f = fopen("eeprom.bin", "wb");
	350	fwrite(eestate->data, 1, (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8, f);
	351	fclose(f);
346	352	}
	353	}
347	354
348	355	void *eepromdev_get_data_pointer(const device_config *device, UINT32 *length, UINT32 *size)
349	356	{
350		eeprom_state *c = get_safe_token(device);
	357	eeprom_state *eestate = get_safe_token(device);
351	358
352		if (length != NULL && c->intf != NULL)
353		*length = 1 << c->intf->address_bits;
354		if (size != NULL && c->intf != NULL)
355		*size = c->intf->data_bits / 8;
	359	if (length != NULL && eestate->intf != NULL)
	360	*length = 1 << eestate->intf->address_bits;
	361	if (size != NULL && eestate->intf != NULL)
	362	*size = eestate->intf->data_bits / 8;
356	363
357		return c->eeprom_data;
	364	return eestate->data;
358	365	}
359	366
360	367	static DEVICE_NVRAM( eeprom )
r6740	r6741
373	380
374	381	static DEVICE_START(eeprom)
375	382	{
376		eeprom_state *c = get_safe_token(device);
	383	eeprom_state *eestate = get_safe_token(device);
377	384	const eeprom_config *config;
	385	UINT8 *region_base;
378	386
379	387	/* validate some basic stuff */
380	388	assert(device != NULL);
r6740	r6741
384	392
385	393	config = (const eeprom_config *)device->inline_config;
386	394
387		c->intf = config->pinterface;
	395	eestate->intf = config->pinterface;
388	396
389		if ((1 << c->intf->address_bits) * c->intf->data_bits / 8 > MEMORY_SIZE)
	397	if ((1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8 > MEMORY_SIZE)
390	398	{
391	399	fatalerror("EEPROM larger than eepromdev.c allows");
392	400	}
393	401
394		memset(c->eeprom_data, 0xff, (1 << c->intf->address_bits) * c->intf->data_bits / 8);
	402	memset(eestate->data, 0xff, (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8);
395	403	if ((config->default_data != NULL) && (config->default_data_size != 0))
396	404	eepromdev_set_data(device, config->default_data, config->default_data_size);
397		c->serial_count = 0;
398		c->latch = 0;
399		c->reset_line = ASSERT_LINE;
400		c->clock_line = ASSERT_LINE;
401		c->eeprom_read_address = 0;
402		c->sending = 0;
403		if (c->intf->cmd_unlock) c->locked = 1;
404		else c->locked = 0;
405	405
406		state_save_register_device_item_pointer( device, 0, c->eeprom_data, MEMORY_SIZE);
407		state_save_register_device_item_pointer( device, 0, c->serial_buffer, SERIAL_BUFFER_LENGTH);
408		state_save_register_device_item( device, 0, c->clock_line);
409		state_save_register_device_item( device, 0, c->reset_line);
410		state_save_register_device_item( device, 0, c->locked);
411		state_save_register_device_item( device, 0, c->serial_count);
412		state_save_register_device_item( device, 0, c->latch);
413		state_save_register_device_item( device, 0, c->reset_delay);
414		state_save_register_device_item( device, 0, c->eeprom_clock_count);
415		state_save_register_device_item( device, 0, c->eeprom_data_bits);
416		state_save_register_device_item( device, 0, c->eeprom_read_address);
	406	region_base = memory_region(device->machine, device->tag);
	407	if (region_base != NULL)
	408	{
	409	UINT32 region_length = memory_region_length(device->machine, device->tag);
	410	UINT32 region_flags = memory_region_flags(device->machine, device->tag);
	411
	412	if (region_length != (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8)
	413	fatalerror("eeprom region '%s' wrong size (expected size = 0x%X)", device->tag, (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8);
	414	if (eestate->intf->data_bits == 8 && (region_flags & ROMREGION_WIDTHMASK) != ROMREGION_8BIT)
	415	fatalerror("eeprom region '%s' needs to be an 8-bit region", device->tag);
	416	if (eestate->intf->data_bits == 16 && ((region_flags & ROMREGION_WIDTHMASK) != ROMREGION_16BIT || (region_flags & ROMREGION_ENDIANMASK) != ROMREGION_BE))
	417	fatalerror("eeprom region '%s' needs to be a 16-bit big-endian region (flags=%08x)", device->tag, region_flags);
	418	memcpy(eestate->data, region_base, region_length);
	419	}
	420
	421	eestate->serial_count = 0;
	422	eestate->latch = 0;
	423	eestate->reset_line = ASSERT_LINE;
	424	eestate->clock_line = ASSERT_LINE;
	425	eestate->read_address = 0;
	426	eestate->sending = 0;
	427	if (eestate->intf->cmd_unlock) eestate->locked = 1;
	428	else eestate->locked = 0;
	429
	430	state_save_register_device_item_pointer( device, 0, eestate->data, MEMORY_SIZE);
	431	state_save_register_device_item_pointer( device, 0, eestate->serial_buffer, SERIAL_BUFFER_LENGTH);
	432	state_save_register_device_item( device, 0, eestate->clock_line);
	433	state_save_register_device_item( device, 0, eestate->reset_line);
	434	state_save_register_device_item( device, 0, eestate->locked);
	435	state_save_register_device_item( device, 0, eestate->serial_count);
	436	state_save_register_device_item( device, 0, eestate->latch);
	437	state_save_register_device_item( device, 0, eestate->reset_delay);
	438	state_save_register_device_item( device, 0, eestate->clock_count);
	439	state_save_register_device_item( device, 0, eestate->data_bits);
	440	state_save_register_device_item( device, 0, eestate->read_address);
417	441	}
418	442
419	443	static DEVICE_RESET(eeprom)
420	444	{
421	445	}
422	446
423		DEVICE_GET_INFO(eeprom)
424		{
425		switch (state)
426		{
427		/* --- the following bits of info are returned as 64-bit signed integers --- */
428		case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(eeprom_state); break;
429		case DEVINFO_INT_INLINE_CONFIG_BYTES:   info->i = sizeof(eeprom_config); break;
430		case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL; break;
431	447
432		/* --- the following bits of info are returned as pointers to data or functions --- */
433		case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(eeprom); break;
434		case DEVINFO_FCT_STOP:               /* nothing */ break;
435		case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(eeprom); break;
436		case DEVINFO_FCT_NVRAM:               info->nvram = DEVICE_NVRAM_NAME(eeprom); break;
	448	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
437	449
438		/* --- the following bits of info are returned as NULL-terminated strings --- */
439		case DEVINFO_STR_NAME:               strcpy(info->s, "EEPROM"); break;
440		case DEVINFO_STR_FAMILY:            strcpy(info->s, "EEPROM"); break;
441		case DEVINFO_STR_VERSION:            strcpy(info->s, "1.0"); break;
442		case DEVINFO_STR_SOURCE_FILE:         strcpy(info->s, __FILE__); break;
443		case DEVINFO_STR_CREDITS:            strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
444		}
445		}
	450	#define DEVTEMPLATE_ID(p,s)      p##eeprom##s
	451	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET | DT_HAS_NVRAM | DT_HAS_INLINE_CONFIG
	452	#define DEVTEMPLATE_NAME      "EEPROM"
	453	#define DEVTEMPLATE_FAMILY      "EEPROM"
	454	#include "devtempl.h"

src/emu/machine/intelfsh.c

r6740	r6741
151	151	state_save_register_item( machine, "intelfsh", NULL, chip, c->status );
152	152	state_save_register_item( machine, "intelfsh", NULL, chip, c->flash_mode );
153	153	state_save_register_item( machine, "intelfsh", NULL, chip, c->flash_master_lock );
154		state_save_register_memory( machine, "intelfsh", NULL, chip, "flash_memory", c->flash_memory, c->bits/8, c->size / (c->bits/8) );
	154	state_save_register_memory( machine, "intelfsh", NULL, chip, "flash_memory", c->flash_memory, c->bits/8, c->size / (c->bits/8), __FILE__, __LINE__ );
155	155	}
156	156
157	157	UINT32 intelflash_read(int chip, UINT32 address)

src/emu/machine/8237dma.c

r6740	r6741
641	641	devcb_resolve_write8(&i8237->chan[i].out_iow_func, &intf->out_iow_func[i], device);
642	642	devcb_resolve_write_line(&i8237->chan[i].out_dack_func, &intf->out_dack_func[i], device);
643	643	}
	644
	645	i8237->timer = timer_alloc(device->machine, dma8237_timerproc, (void *)device);
644	646	}
645	647
646	648
r6740	r6741
648	650	i8237_t   *i8237 = get_safe_token(device);
649	651
650	652	i8237->status = 0x0F;
651		i8237->timer = timer_alloc(device->machine, dma8237_timerproc, (void *)device);
652	653	i8237->eop = 1;
653	654	i8237->state = DMA8237_SI;
654	655	i8237->last_service_channel = 3;

src/emu/machine/mb14241.c

r0	r6741
	1	/***************************************************************************
	2
	3	Midway 8080-based black and white hardware
	4
	5	****************************************************************************/
	6
	7	#include "driver.h"
	8	#include "machine/mb14241.h"
	9
	10	typedef struct _mb14241_state  mb14241_state;
	11	struct _mb14241_state
	12	{
	13	UINT16 shift_data;   /* 15 bits only */
	14	UINT8 shift_count;   /* 3 bits */
	15	};
	16
	17	/*****************************************************************************
	18	INLINE FUNCTIONS
	19	*****************************************************************************/
	20
	21	INLINE mb14241_state *get_safe_token( const device_config *device )
	22	{
	23	assert(device != NULL);
	24	assert(device->token != NULL);
	25	assert(device->type == MB14241);
	26
	27	return (mb14241_state *)device->token;
	28	}
	29
	30	/*****************************************************************************
	31	IMPLEMENTATION
	32	*****************************************************************************/
	33
	34	WRITE8_DEVICE_HANDLER( mb14241_shift_count_w )
	35	{
	36	mb14241_state *mb14241 = get_safe_token(device);
	37	mb14241->shift_count = ~data & 0x07;
	38	}
	39
	40	WRITE8_DEVICE_HANDLER( mb14241_shift_data_w )
	41	{
	42	mb14241_state *mb14241 = get_safe_token(device);
	43	mb14241->shift_data = (mb14241->shift_data >> 8) | ((UINT16)data << 7);
	44	}
	45
	46	READ8_DEVICE_HANDLER( mb14241_shift_result_r )
	47	{
	48	mb14241_state *mb14241 = get_safe_token(device);
	49	return mb14241->shift_data >> mb14241->shift_count;
	50	}
	51
	52	/*****************************************************************************
	53	DEVICE INTERFACE
	54	*****************************************************************************/
	55
	56	static DEVICE_START( mb14241 )
	57	{
	58	mb14241_state *mb14241 = get_safe_token(device);
	59
	60	state_save_register_device_item(device, 0, mb14241->shift_data);
	61	state_save_register_device_item(device, 0, mb14241->shift_count);
	62	}
	63
	64	static DEVICE_RESET( mb14241 )
	65	{
	66	mb14241_state *mb14241 = get_safe_token(device);
	67
	68	mb14241->shift_data = 0;
	69	mb14241->shift_count = 0;
	70	}
	71
	72	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
	73
	74	#define DEVTEMPLATE_ID( p, s )   p##mb14241##s
	75	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET
	76	#define DEVTEMPLATE_NAME      "MB14241"
	77	#define DEVTEMPLATE_FAMILY      "MB14241 Shifter IC"
	78	#define DEVTEMPLATE_CLASS      DEVICE_CLASS_VIDEO
	79	#include "devtempl.h"

src/emu/machine/mb14241.h

r0	r6741
	1	/*****************************************************************************
	2
	3	MB14241 shifter IC emulation
	4
	5	*****************************************************************************/
	6
	7	#ifndef __MB14241_H__
	8	#define __MB14241_H__
	9
	10	#include "devcb.h"
	11
	12	/***************************************************************************
	13	FUNCTION PROTOTYPES
	14	***************************************************************************/
	15
	16	DEVICE_GET_INFO( mb14241 );
	17
	18
	19	/***************************************************************************
	20	DEVICE CONFIGURATION MACROS
	21	***************************************************************************/
	22
	23	#define MB14241 DEVICE_GET_INFO_NAME( mb14241 )
	24
	25	#define MDRV_MB14241_ADD(_tag) \
	26	MDRV_DEVICE_ADD(_tag, MB14241, 0)
	27
	28
	29	/***************************************************************************
	30	DEVICE I/O FUNCTIONS
	31	***************************************************************************/
	32
	33	WRITE8_DEVICE_HANDLER ( mb14241_shift_count_w );
	34	WRITE8_DEVICE_HANDLER ( mb14241_shift_data_w );
	35	READ8_DEVICE_HANDLER( mb14241_shift_result_r );
	36
	37
	38	#endif /* __MB14241_H__ */

src/emu/machine/ds2404.c

r6740	r6741
17	17	DS2404_STATE_COPY_SCRATCHPAD      /* Copy Scratchpad command active */
18	18	} DS2404_STATE;
19	19
20		typedef struct {
	20	typedef struct _ds2404_state ds2404_state;
	21	struct _ds2404_state {
21	22	UINT16 address;
22	23	UINT16 offset;
23	24	UINT16 end_offset;
r6740	r6741
27	28	UINT8 rtc[5];      /* 40-bit RTC counter */
28	29	DS2404_STATE state[8];
29	30	int state_ptr;
30		} DS2404;
	31	};
31	32
32		static DS2404 ds2404;
	33	INLINE ds2404_state *get_safe_token(const device_config *device)
	34	{
	35	assert(device != NULL);
	36	assert(device->token != NULL);
	37	assert(device->type == DS2404);
33	38
34		static void ds2404_rom_cmd(UINT8 cmd)
	39	return (ds2404_state *)device->token;
	40	}
	41
	42
	43	static void ds2404_rom_cmd(ds2404_state *state, UINT8 cmd)
35	44	{
36	45	switch(cmd)
37	46	{
38	47	case 0xcc:      /* Skip ROM */
39		ds2404.state[0] = DS2404_STATE_COMMAND;
40		ds2404.state_ptr = 0;
	48	state->state[0] = DS2404_STATE_COMMAND;
	49	state->state_ptr = 0;
41	50	break;
42	51
43	52	default:
r6740	r6741
46	55	}
47	56	}
48	57
49		static void ds2404_cmd(UINT8 cmd)
	58	static void ds2404_cmd(ds2404_state *state, UINT8 cmd)
50	59	{
51	60	switch(cmd)
52	61	{
53	62	case 0x0f:      /* Write scratchpad */
54		ds2404.state[0] = DS2404_STATE_ADDRESS1;
55		ds2404.state[1] = DS2404_STATE_ADDRESS2;
56		ds2404.state[2] = DS2404_STATE_INIT_COMMAND;
57		ds2404.state[3] = DS2404_STATE_WRITE_SCRATCHPAD;
58		ds2404.state_ptr = 0;
	63	state->state[0] = DS2404_STATE_ADDRESS1;
	64	state->state[1] = DS2404_STATE_ADDRESS2;
	65	state->state[2] = DS2404_STATE_INIT_COMMAND;
	66	state->state[3] = DS2404_STATE_WRITE_SCRATCHPAD;
	67	state->state_ptr = 0;
59	68	break;
60	69
61	70	case 0x55:      /* Copy scratchpad */
62		ds2404.state[0] = DS2404_STATE_ADDRESS1;
63		ds2404.state[1] = DS2404_STATE_ADDRESS2;
64		ds2404.state[2] = DS2404_STATE_OFFSET;
65		ds2404.state[3] = DS2404_STATE_INIT_COMMAND;
66		ds2404.state[4] = DS2404_STATE_COPY_SCRATCHPAD;
67		ds2404.state_ptr = 0;
	71	state->state[0] = DS2404_STATE_ADDRESS1;
	72	state->state[1] = DS2404_STATE_ADDRESS2;
	73	state->state[2] = DS2404_STATE_OFFSET;
	74	state->state[3] = DS2404_STATE_INIT_COMMAND;
	75	state->state[4] = DS2404_STATE_COPY_SCRATCHPAD;
	76	state->state_ptr = 0;
68	77	break;
69	78
70	79	case 0xf0:      /* Read memory */
71		ds2404.state[0] = DS2404_STATE_ADDRESS1;
72		ds2404.state[1] = DS2404_STATE_ADDRESS2;
73		ds2404.state[2] = DS2404_STATE_INIT_COMMAND;
74		ds2404.state[3] = DS2404_STATE_READ_MEMORY;
75		ds2404.state_ptr = 0;
	80	state->state[0] = DS2404_STATE_ADDRESS1;
	81	state->state[1] = DS2404_STATE_ADDRESS2;
	82	state->state[2] = DS2404_STATE_INIT_COMMAND;
	83	state->state[3] = DS2404_STATE_READ_MEMORY;
	84	state->state_ptr = 0;
76	85	break;
77	86
78	87	default:
r6740	r6741
81	90	}
82	91	}
83	92
84		static UINT8 ds2404_readmem(void)
	93	static UINT8 ds2404_readmem(ds2404_state *state)
85	94	{
86		if( ds2404.address < 0x200 )
	95	if( state->address < 0x200 )
87	96	{
88		return ds2404.sram[ ds2404.address ];
	97	return state->sram[ state->address ];
89	98	}
90		else if( ds2404.address >= 0x202 && ds2404.address <= 0x206 )
	99	else if( state->address >= 0x202 && state->address <= 0x206 )
91	100	{
92		return ds2404.rtc[ ds2404.address - 0x202 ];
	101	return state->rtc[ state->address - 0x202 ];
93	102	}
94	103	return 0;
95	104	}
96	105
97		static void ds2404_writemem(UINT8 value)
	106	static void ds2404_writemem(ds2404_state *state, UINT8 value)
98	107	{
99		if( ds2404.address < 0x200 )
	108	if( state->address < 0x200 )
100	109	{
101		ds2404.sram[ ds2404.address ] = value;
	110	state->sram[ state->address ] = value;
102	111	}
103		else if( ds2404.address >= 0x202 && ds2404.address <= 0x206 )
	112	else if( state->address >= 0x202 && state->address <= 0x206 )
104	113	{
105		ds2404.rtc[ ds2404.address - 0x202 ] = value;
	114	state->rtc[ state->address - 0x202 ] = value;
106	115	}
107	116	}
108	117
109		WRITE8_HANDLER( DS2404_1W_reset_w )
	118	WRITE8_DEVICE_HANDLER( ds2404_1w_reset_w )
110	119	{
111		ds2404.state[0] = DS2404_STATE_IDLE;
112		ds2404.state_ptr = 0;
	120	ds2404_state *state = get_safe_token(device);
	121	state->state[0] = DS2404_STATE_IDLE;
	122	state->state_ptr = 0;
113	123	}
114	124
115		WRITE8_HANDLER( DS2404_3W_reset_w )
	125	WRITE8_DEVICE_HANDLER( ds2404_3w_reset_w )
116	126	{
117		ds2404.state[0] = DS2404_STATE_COMMAND;
118		ds2404.state_ptr = 0;
	127	ds2404_state *state = get_safe_token(device);
	128	state->state[0] = DS2404_STATE_COMMAND;
	129	state->state_ptr = 0;
119	130	}
120	131
121		READ8_HANDLER( DS2404_data_r )
	132	READ8_DEVICE_HANDLER( ds2404_data_r )
122	133	{
	134	ds2404_state *state = get_safe_token(device);
123	135	UINT8 value;
124		switch( ds2404.state[ds2404.state_ptr] )
	136	switch( state->state[state->state_ptr] )
125	137	{
126	138	case DS2404_STATE_IDLE:
127	139	case DS2404_STATE_COMMAND:
r6740	r6741
132	144	break;
133	145
134	146	case DS2404_STATE_READ_MEMORY:
135		value = ds2404_readmem();
	147	value = ds2404_readmem(state);
136	148	return value;
137	149
138	150	case DS2404_STATE_READ_SCRATCHPAD:
139		if( ds2404.offset < 0x20 ) {
140		value = ds2404.ram[ds2404.offset];
141		ds2404.offset++;
	151	if( state->offset < 0x20 ) {
	152	value = state->ram[state->offset];
	153	state->offset++;
142	154	return value;
143	155	}
144	156	break;
r6740	r6741
152	164	return 0;
153	165	}
154	166
155		WRITE8_HANDLER( DS2404_data_w )
	167	WRITE8_DEVICE_HANDLER( ds2404_data_w )
156	168	{
	169	ds2404_state *state = get_safe_token(device);
157	170	int i;
158	171
159		switch( ds2404.state[ds2404.state_ptr] )
	172	switch( state->state[state->state_ptr] )
160	173	{
161	174	case DS2404_STATE_IDLE:
162		ds2404_rom_cmd(data & 0xff);
	175	ds2404_rom_cmd(state, data & 0xff);
163	176	break;
164	177
165	178	case DS2404_STATE_COMMAND:
166		ds2404_cmd(data & 0xff);
	179	ds2404_cmd(state, data & 0xff);
167	180	break;
168	181
169	182	case DS2404_STATE_ADDRESS1:
170		ds2404.a1 = data & 0xff;
171		ds2404.state_ptr++;
	183	state->a1 = data & 0xff;
	184	state->state_ptr++;
172	185	break;
173	186
174	187	case DS2404_STATE_ADDRESS2:
175		ds2404.a2 = data & 0xff;
176		ds2404.state_ptr++;
	188	state->a2 = data & 0xff;
	189	state->state_ptr++;
177	190	break;
178	191
179	192	case DS2404_STATE_OFFSET:
180		ds2404.end_offset = data & 0xff;
181		ds2404.state_ptr++;
	193	state->end_offset = data & 0xff;
	194	state->state_ptr++;
182	195	break;
183	196
184	197	case DS2404_STATE_INIT_COMMAND:
r6740	r6741
191	204	break;
192	205
193	206	case DS2404_STATE_WRITE_SCRATCHPAD:
194		if( ds2404.offset < 0x20 ) {
195		ds2404.ram[ds2404.offset] = data & 0xff;
196		ds2404.offset++;
	207	if( state->offset < 0x20 ) {
	208	state->ram[state->offset] = data & 0xff;
	209	state->offset++;
197	210	} else {
198	211	/* Set OF flag */
199	212	}
r6740	r6741
203	216	break;
204	217	}
205	218
206		if( ds2404.state[ds2404.state_ptr] == DS2404_STATE_INIT_COMMAND ) {
207		switch( ds2404.state[ds2404.state_ptr+1] )
	219	if( state->state[state->state_ptr] == DS2404_STATE_INIT_COMMAND ) {
	220	switch( state->state[state->state_ptr+1] )
208	221	{
209	222	case DS2404_STATE_IDLE:
210	223	case DS2404_STATE_COMMAND:
r6740	r6741
215	228	break;
216	229
217	230	case DS2404_STATE_READ_MEMORY:
218		ds2404.address = (ds2404.a2 << 8) | ds2404.a1;
219		ds2404.address -= 1;
	231	state->address = (state->a2 << 8) | state->a1;
	232	state->address -= 1;
220	233	break;
221	234
222	235	case DS2404_STATE_WRITE_SCRATCHPAD:
223		ds2404.address = (ds2404.a2 << 8) | ds2404.a1;
224		ds2404.offset = ds2404.address & 0x1f;
	236	state->address = (state->a2 << 8) | state->a1;
	237	state->offset = state->address & 0x1f;
225	238	break;
226	239
227	240	case DS2404_STATE_READ_SCRATCHPAD:
228		ds2404.address = (ds2404.a2 << 8) | ds2404.a1;
229		ds2404.offset = ds2404.address & 0x1f;
	241	state->address = (state->a2 << 8) | state->a1;
	242	state->offset = state->address & 0x1f;
230	243	break;
231	244
232	245	case DS2404_STATE_COPY_SCRATCHPAD:
233		ds2404.address = (ds2404.a2 << 8) | ds2404.a1;
	246	state->address = (state->a2 << 8) | state->a1;
234	247
235		for( i=0; i <= ds2404.end_offset; i++ ) {
236		ds2404_writemem( ds2404.ram[i] );
237		ds2404.address++;
	248	for( i=0; i <= state->end_offset; i++ ) {
	249	ds2404_writemem( state, state->ram[i] );
	250	state->address++;
238	251	}
239	252	break;
240	253	}
241		ds2404.state_ptr++;
	254	state->state_ptr++;
242	255	}
243	256	}
244	257
245		WRITE8_HANDLER( DS2404_clk_w )
	258	WRITE8_DEVICE_HANDLER( ds2404_clk_w )
246	259	{
247		switch( ds2404.state[ds2404.state_ptr] )
	260	ds2404_state *state = get_safe_token(device);
	261	switch( state->state[state->state_ptr] )
248	262	{
249	263	case DS2404_STATE_IDLE:
250	264	case DS2404_STATE_COMMAND:
r6740	r6741
255	269	break;
256	270
257	271	case DS2404_STATE_READ_MEMORY:
258		ds2404.address++;
	272	state->address++;
259	273	break;
260	274
261	275	case DS2404_STATE_READ_SCRATCHPAD:
r6740	r6741
269	283	}
270	284	}
271	285
272		static TIMER_CALLBACK( DS2404_tick )
	286	static TIMER_CALLBACK( ds2404_tick )
273	287	{
	288	ds2404_state *state = get_safe_token(ptr);
274	289	int i;
275	290	for( i = 0; i < 5; i++ )
276	291	{
277		ds2404.rtc[ i ]++;
278		if( ds2404.rtc[ i ] != 0 )
	292	state->rtc[ i ]++;
	293	if( state->rtc[ i ] != 0 )
279	294	{
280	295	break;
281	296	}
282	297	}
283	298	}
284	299
285		void DS2404_init(running_machine *machine, int ref_year, int ref_month, int ref_day)
	300
	301	static DEVICE_START( ds2404 )
286	302	{
	303	ds2404_config *config = (ds2404_config *)device->inline_config;
	304	ds2404_state *state = get_safe_token(device);
	305
287	306	struct tm ref_tm;
288	307	time_t ref_time;
289	308	time_t current_time;
290	309	emu_timer *timer;
291	310
292	311	memset( &ref_tm, 0, sizeof( ref_tm ) );
293		ref_tm.tm_year = ref_year - 1900;
294		ref_tm.tm_mon = ref_month - 1;
295		ref_tm.tm_mday = ref_day;
	312	ref_tm.tm_year = config->ref_year - 1900;
	313	ref_tm.tm_mon = config->ref_month - 1;
	314	ref_tm.tm_mday = config->ref_day;
296	315
297	316	ref_time = mktime( &ref_tm );
298	317
299	318	time( &current_time );
300	319	current_time -= ref_time;
301	320
302		ds2404.rtc[ 0 ] = 0x0;
303		ds2404.rtc[ 1 ] = ( current_time >> 0 ) & 0xff;
304		ds2404.rtc[ 2 ] = ( current_time >> 8 ) & 0xff;
305		ds2404.rtc[ 3 ] = ( current_time >> 16 ) & 0xff;
306		ds2404.rtc[ 4 ] = ( current_time >> 24 ) & 0xff;
	321	state->rtc[ 0 ] = 0x0;
	322	state->rtc[ 1 ] = ( current_time >> 0 ) & 0xff;
	323	state->rtc[ 2 ] = ( current_time >> 8 ) & 0xff;
	324	state->rtc[ 3 ] = ( current_time >> 16 ) & 0xff;
	325	state->rtc[ 4 ] = ( current_time >> 24 ) & 0xff;
307	326
308		timer = timer_alloc( machine, DS2404_tick , NULL);
	327	timer = timer_alloc( device->machine, ds2404_tick , (void *)device);
309	328	timer_adjust_periodic( timer, ATTOTIME_IN_HZ( 256 ), 0, ATTOTIME_IN_HZ( 256 ) );
310	329	}
311	330
312		void DS2404_load(mame_file *file)
	331
	332	static DEVICE_RESET( ds2404 )
313	333	{
314		mame_fread(file, ds2404.sram, 512);
315	334	}
316	335
317		void DS2404_save(mame_file *file)
	336
	337	static DEVICE_NVRAM( ds2404 )
318	338	{
319		mame_fwrite(file, ds2404.sram, 512);
	339	ds2404_state *state = get_safe_token(device);
	340
	341	if (read_or_write)
	342	mame_fwrite(file, state->sram, sizeof(state->sram));
	343	else if (file)
	344	mame_fread(file, state->sram, sizeof(state->sram));
	345	else
	346	memset(state->sram, 0, sizeof(state->sram));
320	347	}
	348
	349
	350	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
	351
	352	#define DEVTEMPLATE_ID(p,s)      p##ds2404##s
	353	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET | DT_HAS_NVRAM | DT_HAS_INLINE_CONFIG
	354	#define DEVTEMPLATE_NAME      "DS2404"
	355	#define DEVTEMPLATE_FAMILY      "NVRAM"
	356	#include "devtempl.h"

src/emu/machine/ds2404.h

r6740	r6741
1	1	#ifndef DS2404_H
2	2	#define DS2404_H
3	3
4		void DS2404_init(running_machine *machine, int ref_year, int ref_month, int ref_day);
5		void DS2404_load(mame_file *file);
6		void DS2404_save(mame_file *file);
	4	typedef struct _ds2404_config ds2404_config;
	5	struct _ds2404_config
	6	{
	7	UINT32   ref_year;
	8	UINT8   ref_month;
	9	UINT8   ref_day;
	10	};
7	11
	12
	13	#define MDRV_DS2404_ADD(_tag, _ref_year, _ref_month, _ref_day) \
	14	MDRV_DEVICE_ADD(_tag, DS2404, 0) \
	15	MDRV_DEVICE_CONFIG_DATA32(ds2404_config, ref_year, _ref_year) \
	16	MDRV_DEVICE_CONFIG_DATA32(ds2404_config, ref_month, _ref_month) \
	17	MDRV_DEVICE_CONFIG_DATA32(ds2404_config, ref_day, _ref_day)
	18
	19
8	20	/* 1-wire interface reset */
9		WRITE8_HANDLER( DS2404_1W_reset_w );
	21	WRITE8_DEVICE_HANDLER( ds2404_1w_reset_w );
10	22
11	23	/* 3-wire interface reset  */
12		WRITE8_HANDLER( DS2404_3W_reset_w );
	24	WRITE8_DEVICE_HANDLER( ds2404_3w_reset_w );
13	25
14		READ8_HANDLER( DS2404_data_r );
15		WRITE8_HANDLER( DS2404_data_w );
16		WRITE8_HANDLER( DS2404_clk_w );
	26	READ8_DEVICE_HANDLER( ds2404_data_r );
	27	WRITE8_DEVICE_HANDLER( ds2404_data_w );
	28	WRITE8_DEVICE_HANDLER( ds2404_clk_w );
17	29
	30	/* device get info callback */
	31	#define DS2404 DEVICE_GET_INFO_NAME(ds2404)
	32	DEVICE_GET_INFO( ds2404 );
	33
18	34	#endif

src/emu/machine/rtc65271.c

r6740	r6741
18	18	#include "driver.h"
19	19	#include "rtc65271.h"
20	20
21		static void field_interrupts(void);
	21	static void field_interrupts(const device_config *device);
22	22	static TIMER_CALLBACK( rtc_SQW_callback );
23	23	static TIMER_CALLBACK( rtc_begin_update_callback );
24	24	static TIMER_CALLBACK( rtc_end_update_callback );
r6740	r6741
30	30	cycle */
31	31	/*#define UPDATE_CYCLE_DELAY ATTOTIME_IN_USEC(244)*/
32	32
33		static struct
	33	typedef struct _rtc65271_state rtc65271_state;
	34	struct _rtc65271_state
34	35	{
35		running_machine *machine;
36
37	36	/* 64 8-bit registers (10 clock registers, 4 control/status registers, and
38	37	50 bytes of user RAM) */
39	38	UINT8 regs[64];
40		int cur_reg;
	39	UINT8 cur_reg;
41	40
42	41	/* extended RAM: 4kbytes of battery-backed RAM (in pages of 32 bytes) */
43		UINT8 *xram;
44		int cur_xram_page;
	42	UINT8 xram[4096];
	43	UINT8 cur_xram_page;
45	44
46	45	/* update timer: called every second */
47	46	emu_timer *update_timer;
48	47
49	48	/* SQW timer: called every periodic clock half-period */
50	49	emu_timer *SQW_timer;
51		int SQW_internal_state;
	50	UINT8 SQW_internal_state;
52	51
53	52	/* callback called when interrupt pin state changes (may be NULL) */
54		void (*interrupt_callback)(running_machine *machine, int state);
55		} rtc;
	53	void (*interrupt_callback)(const device_config *device, int state);
	54	};
56	55
	56	INLINE rtc65271_state *get_safe_token(const device_config *device)
	57	{
	58	assert(device != NULL);
	59	assert(device->token != NULL);
	60	assert(device->type == RTC65271);
	61
	62	return (rtc65271_state *)device->token;
	63	}
	64
	65
57	66	enum
58	67	{
59	68	reg_second = 0,
r6740	r6741
185	194	/*
186	195	load the SRAM and register contents from file
187	196	*/
188		int rtc65271_file_load(running_machine *machine, mame_file *file)
	197	static int rtc65271_file_load(const device_config *device, mame_file *file)
189	198	{
	199	rtc65271_state *state = get_safe_token(device);
190	200	UINT8 buf;
191	201
192	202
r6740	r6741
199	209	/* control registers */
200	210	if (mame_fread(file, &buf, 1) != 1)
201	211	return 1;
202		rtc.regs[reg_A] = buf & (reg_A_DV /*| reg_A_RS*/);
	212	state->regs[reg_A] = buf & (reg_A_DV /*| reg_A_RS*/);
203	213	if (mame_fread(file, &buf, 1) != 1)
204	214	return 1;
205		rtc.regs[reg_B] = buf & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE);
	215	state->regs[reg_B] = buf & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE);
206	216
207	217	/* alarm registers */
208		if (mame_fread(file, &rtc.regs[reg_alarm_second], 1) != 1)
	218	if (mame_fread(file, &state->regs[reg_alarm_second], 1) != 1)
209	219	return 1;
210		if (mame_fread(file, &rtc.regs[reg_alarm_minute], 1) != 1)
	220	if (mame_fread(file, &state->regs[reg_alarm_minute], 1) != 1)
211	221	return 1;
212		if (mame_fread(file, &rtc.regs[reg_alarm_hour], 1) != 1)
	222	if (mame_fread(file, &state->regs[reg_alarm_hour], 1) != 1)
213	223	return 1;
214	224
215	225	/* user RAM */
216		if (mame_fread(file, rtc.regs+14, 50) != 50)
	226	if (mame_fread(file, state->regs+14, 50) != 50)
217	227	return 1;
218	228
219	229	/* extended RAM */
220		if (mame_fread(file, rtc.xram, 4096) != 4096)
	230	if (mame_fread(file, state->xram, 4096) != 4096)
221	231	return 1;
222	232
223		rtc.regs[reg_D] |= reg_D_VRT;   /* the data was backed up successfully */
224		/*rtc.dirty = FALSE;*/
	233	state->regs[reg_D] |= reg_D_VRT;   /* the data was backed up successfully */
	234	/*state->dirty = FALSE;*/
225	235
226	236	{
227	237	mame_system_time systime;
228	238
229	239	/* get the current date/time from the core */
230		mame_get_current_datetime(machine, &systime);
	240	mame_get_current_datetime(device->machine, &systime);
231	241
232	242	/* set clock registers */
233		rtc.regs[reg_second] = systime.local_time.second;
234		rtc.regs[reg_minute] = systime.local_time.minute;
235		if (rtc.regs[reg_B] & reg_B_24h)
	243	state->regs[reg_second] = systime.local_time.second;
	244	state->regs[reg_minute] = systime.local_time.minute;
	245	if (state->regs[reg_B] & reg_B_24h)
236	246	/* 24-hour mode */
237		rtc.regs[reg_hour] = systime.local_time.hour;
	247	state->regs[reg_hour] = systime.local_time.hour;
238	248	else
239	249	{   /* 12-hour mode */
240	250	if (systime.local_time.hour >= 12)
241	251	{
242		rtc.regs[reg_hour] = 0x80;
	252	state->regs[reg_hour] = 0x80;
243	253	systime.local_time.hour -= 12;
244	254	}
245	255	else
246		rtc.regs[reg_hour] = 0;
247		rtc.regs[reg_hour] |= systime.local_time.hour ? systime.local_time.hour : 12;
	256	state->regs[reg_hour] = 0;
	257	state->regs[reg_hour] |= systime.local_time.hour ? systime.local_time.hour : 12;
248	258	}
249		rtc.regs[reg_weekday] = systime.local_time.weekday + 1;
250		rtc.regs[reg_monthday] = systime.local_time.mday;
251		rtc.regs[reg_month] = systime.local_time.month + 1;
252		rtc.regs[reg_year] = systime.local_time.year % 100;
253		if (! (rtc.regs[reg_B] & reg_B_DM))
	259	state->regs[reg_weekday] = systime.local_time.weekday + 1;
	260	state->regs[reg_monthday] = systime.local_time.mday;
	261	state->regs[reg_month] = systime.local_time.month + 1;
	262	state->regs[reg_year] = systime.local_time.year % 100;
	263	if (! (state->regs[reg_B] & reg_B_DM))
254	264	{   /* BCD mode */
255		rtc.regs[reg_second] = binary_to_BCD(rtc.regs[reg_second]);
256		rtc.regs[reg_minute] = binary_to_BCD(rtc.regs[reg_minute]);
257		rtc.regs[reg_hour] = (rtc.regs[reg_hour] & 0x80) | binary_to_BCD(rtc.regs[reg_hour] & 0x7f);
258		/*rtc.regs[reg_weekday] = binary_to_BCD(rtc.regs[reg_weekday]);*/
259		rtc.regs[reg_monthday] = binary_to_BCD(rtc.regs[reg_monthday]);
260		rtc.regs[reg_month] = binary_to_BCD(rtc.regs[reg_month]);
261		rtc.regs[reg_year] = binary_to_BCD(rtc.regs[reg_year]);
	265	state->regs[reg_second] = binary_to_BCD(state->regs[reg_second]);
	266	state->regs[reg_minute] = binary_to_BCD(state->regs[reg_minute]);
	267	state->regs[reg_hour] = (state->regs[reg_hour] & 0x80) | binary_to_BCD(state->regs[reg_hour] & 0x7f);
	268	/*state->regs[reg_weekday] = binary_to_BCD(state->regs[reg_weekday]);*/
	269	state->regs[reg_monthday] = binary_to_BCD(state->regs[reg_monthday]);
	270	state->regs[reg_month] = binary_to_BCD(state->regs[reg_month]);
	271	state->regs[reg_year] = binary_to_BCD(state->regs[reg_year]);
262	272	}
263	273	}
264	274
r6740	r6741
268	278	/*
269	279	save the SRAM and register contents to file
270	280	*/
271		int rtc65271_file_save(mame_file *file)
	281	static int rtc65271_file_save(const device_config *device, mame_file *file)
272	282	{
	283	rtc65271_state *state = get_safe_token(device);
273	284	UINT8 buf;
274	285
275	286
r6740	r6741
279	290	return 1;
280	291
281	292	/* control registers */
282		buf = rtc.regs[reg_A] & (reg_A_DV | reg_A_RS);
	293	buf = state->regs[reg_A] & (reg_A_DV | reg_A_RS);
283	294	if (mame_fwrite(file, &buf, 1) != 1)
284	295	return 1;
285		buf = rtc.regs[reg_B] & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE);
	296	buf = state->regs[reg_B] & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE);
286	297	if (mame_fwrite(file, &buf, 1) != 1)
287	298	return 1;
288	299
289	300	/* alarm registers */
290		if (mame_fwrite(file, &rtc.regs[reg_alarm_second], 1) != 1)
	301	if (mame_fwrite(file, &state->regs[reg_alarm_second], 1) != 1)
291	302	return 1;
292		if (mame_fwrite(file, &rtc.regs[reg_alarm_minute], 1) != 1)
	303	if (mame_fwrite(file, &state->regs[reg_alarm_minute], 1) != 1)
293	304	return 1;
294		if (mame_fwrite(file, &rtc.regs[reg_alarm_hour], 1) != 1)
	305	if (mame_fwrite(file, &state->regs[reg_alarm_hour], 1) != 1)
295	306	return 1;
296	307
297	308	/* user RAM */
298		if (mame_fwrite(file, rtc.regs+14, 50) != 50)
	309	if (mame_fwrite(file, state->regs+14, 50) != 50)
299	310	return 1;
300	311
301	312	/* extended RAM */
302		if (mame_fwrite(file, rtc.xram, 4096) != 4096)
	313	if (mame_fwrite(file, state->xram, 4096) != 4096)
303	314	return 1;
304	315
305	316	return 0;
306	317	}
307	318
308	319	/*
309		Initialize clock
310
311		xram: pointer to 4kb RAM area
312		interrupt_callback: callback called when interrupt pin state changes (may
313		be NULL)
314		*/
315		void rtc65271_init(running_machine *machine, UINT8 *xram, void (*interrupt_callback)(running_machine *machine, int state))
316		{
317		memset(&rtc, 0, sizeof(rtc));
318
319		rtc.machine = machine;
320		rtc.xram = xram;
321
322		rtc.update_timer = timer_alloc(machine, rtc_begin_update_callback, NULL);
323		timer_adjust_periodic(rtc.update_timer, ATTOTIME_IN_SEC(1), 0, ATTOTIME_IN_SEC(1));
324		rtc.SQW_timer = timer_alloc(machine, rtc_SQW_callback, NULL);
325		rtc.interrupt_callback = interrupt_callback;
326		}
327
328		/*
329	320	Read a byte from clock
330	321
331	322	xramsel: select RTC register if 0, XRAM if 1
332	323	offset: address (A0-A5 pins)
333	324	*/
334		UINT8 rtc65271_r(int xramsel, offs_t offset)
	325	UINT8 rtc65271_r(const device_config *device, int xramsel, offs_t offset)
335	326	{
	327	rtc65271_state *state = get_safe_token(device);
336	328	int reply;
337	329
338	330	if (xramsel)
339	331	{
340	332	if (offset & 0x20)
341	333	/* XRAM page register */
342		reply = rtc.cur_xram_page;
	334	reply = state->cur_xram_page;
343	335	else
344	336	/* XRAM data */
345		reply = rtc.xram[(offset & 0x1f) + 0x0020*rtc.cur_xram_page];
	337	reply = state->xram[(offset & 0x1f) + 0x0020*state->cur_xram_page];
346	338	}
347	339	else
348	340	{
349	341	if (offset & 0x01)
350	342	/* data register */
351		switch (rtc.cur_reg)
	343	switch (state->cur_reg)
352	344	{
353	345	case reg_C:
354		reply = rtc.regs[rtc.cur_reg];
355		rtc.regs[rtc.cur_reg] = 0;
356		field_interrupts();
	346	reply = state->regs[state->cur_reg];
	347	state->regs[state->cur_reg] = 0;
	348	field_interrupts(device);
357	349	break;
358	350	case reg_D:
359		reply = rtc.regs[rtc.cur_reg];
360		rtc.regs[rtc.cur_reg] = /*0*/reg_D_VRT;   /* set VRT flag so that the computer does not complain that the battery is low */
	351	reply = state->regs[state->cur_reg];
	352	state->regs[state->cur_reg] = /*0*/reg_D_VRT;   /* set VRT flag so that the computer does not complain that the battery is low */
361	353	break;
362	354
363	355	default:
364		reply = rtc.regs[rtc.cur_reg];
	356	reply = state->regs[state->cur_reg];
365	357	break;
366	358	}
367	359	else
368	360	/* indirect address register */
369		reply = rtc.cur_reg;
	361	reply = state->cur_reg;
370	362	}
371	363
372	364	return reply;
373	365	}
374	366
375		READ8_HANDLER( rtc65271_rtc_r )
	367	READ8_DEVICE_HANDLER( rtc65271_rtc_r )
376	368	{
377		return rtc65271_r( 0, offset );
	369	return rtc65271_r( device, 0, offset );
378	370	}
379	371
380		READ8_HANDLER( rtc65271_xram_r )
	372	READ8_DEVICE_HANDLER( rtc65271_xram_r )
381	373	{
382		return rtc65271_r( 1, offset );
	374	return rtc65271_r( device, 1, offset );
383	375	}
384	376
385	377	/*
r6740	r6741
388	380	xramsel: select RTC register if 0, XRAM if 1
389	381	offset: address (A0-A5 pins)
390	382	*/
391		void rtc65271_w(int xramsel, offs_t offset, UINT8 data)
	383	void rtc65271_w(const device_config *device, int xramsel, offs_t offset, UINT8 data)
392	384	{
	385	rtc65271_state *state = get_safe_token(device);
393	386	if (xramsel)
394	387	{
395	388	if (offset & 0x20)
396	389	/* XRAM page register */
397		rtc.cur_xram_page = data & 0x7f;
	390	state->cur_xram_page = data & 0x7f;
398	391	else
399	392	/* XRAM data */
400		rtc.xram[(offset & 0x1f) + 0x0020*rtc.cur_xram_page] = data;
	393	state->xram[(offset & 0x1f) + 0x0020*state->cur_xram_page] = data;
401	394	}
402	395	else
403	396	{
404	397	if (offset & 0x01)
405	398	/* data register */
406		switch (rtc.cur_reg)
	399	switch (state->cur_reg)
407	400	{
408	401	case reg_second:
409	402	/* the data sheet says bit 7 is read-only.  (I have no idea of
410	403	the reason why it is.) */
411		rtc.regs[reg_second] = data & 0x7f;
	404	state->regs[reg_second] = data & 0x7f;
412	405	break;
413	406
414	407	case reg_A:
415		if ((data & reg_A_RS) != (rtc.regs[rtc.cur_reg] & reg_A_RS))
	408	if ((data & reg_A_RS) != (state->regs[state->cur_reg] & reg_A_RS))
416	409	{
417	410	if (data & reg_A_RS)
418	411	{
419	412	attotime period = ATTOTIME_IN_HZ(SQW_freq_table[data & reg_A_RS]);
420	413	attotime half_period = attotime_div(period, 2);
421		attotime elapsed = timer_timeelapsed(rtc.update_timer);
	414	attotime elapsed = timer_timeelapsed(state->update_timer);
422	415
423	416	if (attotime_compare(half_period, elapsed) > 0)
424		timer_adjust_oneshot(rtc.SQW_timer, attotime_sub(half_period, elapsed), 0);
	417	timer_adjust_oneshot(state->SQW_timer, attotime_sub(half_period, elapsed), 0);
425	418	else
426		timer_adjust_oneshot(rtc.SQW_timer, half_period, 0);
	419	timer_adjust_oneshot(state->SQW_timer, half_period, 0);
427	420	}
428	421	else
429	422	{
430		rtc.SQW_internal_state = 0;   /* right??? */
	423	state->SQW_internal_state = 0;   /* right??? */
431	424
432	425	/* Stop the divider used for SQW and periodic interrupts. */
433		timer_adjust_oneshot(rtc.SQW_timer, attotime_never, 0);
	426	timer_adjust_oneshot(state->SQW_timer, attotime_never, 0);
434	427	}
435	428	}
436	429	/* The UIP bit is read-only */
437		rtc.regs[reg_A] = (data & ~reg_A_UIP) | (rtc.regs[reg_A] & reg_A_UIP);
	430	state->regs[reg_A] = (data & ~reg_A_UIP) | (state->regs[reg_A] & reg_A_UIP);
438	431	break;
439	432
440	433	case reg_B:
441		rtc.regs[rtc.cur_reg] = data;
	434	state->regs[state->cur_reg] = data;
442	435	if (data & reg_B_SET)
443	436	{
444	437	/* if we are in SET mode, clear update cycle */
445		rtc.regs[reg_A] &= ~reg_A_UIP;
446		rtc.regs[reg_B] &= ~reg_B_UIE;   /* the data sheet tells this, but I wonder how much sense it makes */
447		field_interrupts();
	438	state->regs[reg_A] &= ~reg_A_UIP;
	439	state->regs[reg_B] &= ~reg_B_UIE;   /* the data sheet tells this, but I wonder how much sense it makes */
	440	field_interrupts(device);
448	441	}
449	442	break;
450	443
r6740	r6741
453	446	break;
454	447
455	448	default:
456		rtc.regs[rtc.cur_reg] = data;
	449	state->regs[state->cur_reg] = data;
457	450	break;
458	451	}
459	452	else
460	453	/* indirect address register */
461		rtc.cur_reg = data & 0x3f;
	454	state->cur_reg = data & 0x3f;
462	455	}
463	456	}
464	457
465		WRITE8_HANDLER( rtc65271_rtc_w )
	458	WRITE8_DEVICE_HANDLER( rtc65271_rtc_w )
466	459	{
467		rtc65271_w( 0, offset, data );
	460	rtc65271_w( device, 0, offset, data );
468	461	}
469	462
470		WRITE8_HANDLER( rtc65271_xram_w )
	463	WRITE8_DEVICE_HANDLER( rtc65271_xram_w )
471	464	{
472		rtc65271_w( 1, offset, data );
	465	rtc65271_w( device, 1, offset, data );
473	466	}
474	467
475		static void field_interrupts(void)
	468	static void field_interrupts(const device_config *device)
476	469	{
477		if (rtc.regs[reg_C] & rtc.regs[reg_B] & (reg_C_PF | reg_C_AF | reg_C_UF))
	470	rtc65271_state *state = get_safe_token(device);
	471
	472	if (state->regs[reg_C] & state->regs[reg_B] & (reg_C_PF | reg_C_AF | reg_C_UF))
478	473	{
479		rtc.regs[reg_C] |= reg_C_IRQF;
480		if (rtc.interrupt_callback)
481		rtc.interrupt_callback(rtc.machine, 1);
	474	state->regs[reg_C] |= reg_C_IRQF;
	475	if (state->interrupt_callback)
	476	state->interrupt_callback(device, 1);
482	477	}
483	478	else
484	479	{
485		rtc.regs[reg_C] &= ~reg_C_IRQF;
486		if (rtc.interrupt_callback)
487		rtc.interrupt_callback(rtc.machine, 0);
	480	state->regs[reg_C] &= ~reg_C_IRQF;
	481	if (state->interrupt_callback)
	482	state->interrupt_callback(device, 0);
488	483	}
489	484	}
490	485
r6740	r6741
499	494	*/
500	495	static TIMER_CALLBACK( rtc_SQW_callback )
501	496	{
	497	const device_config *device = (const device_config *)ptr;
	498	rtc65271_state *state = get_safe_token(device);
502	499	attotime half_period;
503	500
504		rtc.SQW_internal_state = ! rtc.SQW_internal_state;
505		if (! rtc.SQW_internal_state)
	501	state->SQW_internal_state = ! state->SQW_internal_state;
	502	if (! state->SQW_internal_state)
506	503	{
507	504	/* high-to-low??? transition -> interrupt (or should it be low-to-high?) */
508		rtc.regs[reg_C] |= reg_C_PF;
509		field_interrupts();
	505	state->regs[reg_C] |= reg_C_PF;
	506	field_interrupts(device);
510	507	}
511	508
512		half_period = attotime_div(ATTOTIME_IN_HZ(SQW_freq_table[rtc.regs[reg_A] & reg_A_RS]), 2);
513		timer_adjust_oneshot(rtc.SQW_timer, half_period, 0);
	509	half_period = attotime_div(ATTOTIME_IN_HZ(SQW_freq_table[state->regs[reg_A] & reg_A_RS]), 2);
	510	timer_adjust_oneshot(state->SQW_timer, half_period, 0);
514	511	}
515	512
516	513	/*
r6740	r6741
518	515	*/
519	516	static TIMER_CALLBACK( rtc_begin_update_callback )
520	517	{
521		if (((rtc.regs[reg_A] & reg_A_DV) == 0x20) && ! (rtc.regs[reg_B] & reg_B_SET))
	518	const device_config *device = (const device_config *)ptr;
	519	rtc65271_state *state = get_safe_token(device);
	520
	521	if (((state->regs[reg_A] & reg_A_DV) == 0x20) && ! (state->regs[reg_B] & reg_B_SET))
522	522	{
523		rtc.regs[reg_A] |= reg_A_UIP;
	523	state->regs[reg_A] |= reg_A_UIP;
524	524
525	525	/* schedule end of update cycle */
526		timer_set(machine, UPDATE_CYCLE_TIME, NULL, 0, rtc_end_update_callback);
	526	timer_set(device->machine, UPDATE_CYCLE_TIME, (void *)device, 0, rtc_end_update_callback);
527	527	}
528	528	}
529	529
r6740	r6741
538	538	31,28,31, 30,31,30,
539	539	31,31,30, 31,30,31
540	540	};
	541	const device_config *device = (const device_config *)ptr;
	542	rtc65271_state *state = get_safe_token(device);
541	543	UINT8 (*increment)(UINT8 data);
542	544	int c59, c23, c12, c11, c29;
543	545
544		if (! (rtc.regs[reg_A] & reg_A_UIP))
	546	if (! (state->regs[reg_A] & reg_A_UIP))
545	547	/* abort if update cycle has been canceled */
546	548	return;
547	549
548		if (rtc.regs[reg_B] & reg_B_DM)
	550	if (state->regs[reg_B] & reg_B_DM)
549	551	{
550	552	/* binary mode */
551	553	increment = increment_binary;
r6740	r6741
567	569	}
568	570
569	571	/* increment second */
570		if (rtc.regs[reg_second] < c59)
571		rtc.regs[reg_second] = (*increment)(rtc.regs[reg_second]);
	572	if (state->regs[reg_second] < c59)
	573	state->regs[reg_second] = (*increment)(state->regs[reg_second]);
572	574	else
573	575	{
574		rtc.regs[reg_second] = 0;
	576	state->regs[reg_second] = 0;
575	577
576	578	/* increment minute */
577		if (rtc.regs[reg_minute] < c59)
578		rtc.regs[reg_minute] = (*increment)(rtc.regs[reg_minute]);
	579	if (state->regs[reg_minute] < c59)
	580	state->regs[reg_minute] = (*increment)(state->regs[reg_minute]);
579	581	else
580	582	{
581		rtc.regs[reg_minute] = 0;
	583	state->regs[reg_minute] = 0;
582	584
583	585	/* increment hour */
584		if (rtc.regs[reg_B] & reg_B_24h)
	586	if (state->regs[reg_B] & reg_B_24h)
585	587	{
586	588	/* 24 hour mode */
587		if (rtc.regs[reg_hour] < c23)
588		rtc.regs[reg_hour] = (*increment)(rtc.regs[reg_hour]);
	589	if (state->regs[reg_hour] < c23)
	590	state->regs[reg_hour] = (*increment)(state->regs[reg_hour]);
589	591	else
590		rtc.regs[reg_hour] = 0;
	592	state->regs[reg_hour] = 0;
591	593	}
592	594	else
593	595	{
594	596	/* 12 hour mode */
595		if (rtc.regs[reg_hour] < c12)
	597	if (state->regs[reg_hour] < c12)
596	598	{
597		if ((rtc.regs[reg_hour] & 0x7f) == c11)
598		rtc.regs[reg_hour] ^= 0x80;
599		rtc.regs[reg_hour] = ((*increment)(rtc.regs[reg_hour] & 0x7f) & 0x7f)
600		| (rtc.regs[reg_hour] & 0x80);
	599	if ((state->regs[reg_hour] & 0x7f) == c11)
	600	state->regs[reg_hour] ^= 0x80;
	601	state->regs[reg_hour] = ((*increment)(state->regs[reg_hour] & 0x7f) & 0x7f)
	602	| (state->regs[reg_hour] & 0x80);
601	603	}
602	604	else
603		rtc.regs[reg_hour] = 1 | (rtc.regs[reg_hour] & 0x80);
	605	state->regs[reg_hour] = 1 | (state->regs[reg_hour] & 0x80);
604	606	}
605	607
606	608	/* increment day if needed */
607		if (rtc.regs[reg_hour] == ((rtc.regs[reg_B] & reg_B_24h) ? 0 : c12))
	609	if (state->regs[reg_hour] == ((state->regs[reg_B] & reg_B_24h) ? 0 : c12))
608	610	{
609	611	/* increment day */
610	612	int days_in_month;
611	613
612		if (rtc.regs[reg_weekday] < 7)
613		rtc.regs[reg_weekday]++;
	614	if (state->regs[reg_weekday] < 7)
	615	state->regs[reg_weekday]++;
614	616	else
615		rtc.regs[reg_weekday] = 1;
	617	state->regs[reg_weekday] = 1;
616	618
617		if ((rtc.regs[reg_month] != 2) || (rtc.regs[reg_year] & 0x03))
	619	if ((state->regs[reg_month] != 2) || (state->regs[reg_year] & 0x03))
618	620	{
619		if (rtc.regs[reg_B] & reg_B_DM)
	621	if (state->regs[reg_B] & reg_B_DM)
620	622	{
621	623	/* binary mode */
622		days_in_month = days_in_month_table[rtc.regs[reg_month] - 1];
	624	days_in_month = days_in_month_table[state->regs[reg_month] - 1];
623	625	}
624	626	else
625	627	{
626	628	/* BCD mode */
627		days_in_month = binary_to_BCD(days_in_month_table[BCD_to_binary(rtc.regs[reg_month]) - 1]);
	629	days_in_month = binary_to_BCD(days_in_month_table[BCD_to_binary(state->regs[reg_month]) - 1]);
628	630	}
629	631	}
630	632	else
631	633	days_in_month = c29;
632	634
633		if (rtc.regs[reg_monthday] < days_in_month)
634		rtc.regs[reg_monthday] = (*increment)(rtc.regs[reg_monthday]);
	635	if (state->regs[reg_monthday] < days_in_month)
	636	state->regs[reg_monthday] = (*increment)(state->regs[reg_monthday]);
635	637	else
636	638	{
637	639	/* increment month */
638		rtc.regs[reg_monthday] = 1;
	640	state->regs[reg_monthday] = 1;
639	641
640		if (rtc.regs[reg_month] < c12)
641		rtc.regs[reg_month] = (*increment)(rtc.regs[reg_month]);
	642	if (state->regs[reg_month] < c12)
	643	state->regs[reg_month] = (*increment)(state->regs[reg_month]);
642	644	else
643	645	{
644	646	/* increment year */
645		rtc.regs[reg_month] = 1;
	647	state->regs[reg_month] = 1;
646	648
647		if (rtc.regs[reg_B] & reg_B_DM)
	649	if (state->regs[reg_B] & reg_B_DM)
648	650	{
649	651	/* binary mode */
650		if (rtc.regs[reg_year] < 99)
651		rtc.regs[reg_year]++;
	652	if (state->regs[reg_year] < 99)
	653	state->regs[reg_year]++;
652	654	else
653		rtc.regs[reg_year] = 0;
	655	state->regs[reg_year] = 0;
654	656	}
655	657	else
656	658	{
657	659	/* BCD mode */
658		rtc.regs[reg_year] = increment_BCD(rtc.regs[reg_year]);
	660	state->regs[reg_year] = increment_BCD(state->regs[reg_year]);
659	661	}
660	662	}
661	663	}
r6740	r6741
663	665	}
664	666	}
665	667
666		rtc.regs[reg_A] &= ~reg_A_UIP;
667		rtc.regs[reg_C] |= reg_C_UF;
	668	state->regs[reg_A] &= ~reg_A_UIP;
	669	state->regs[reg_C] |= reg_C_UF;
668	670
669	671	/* test for alarm (values in range 0xc0-0xff mean "don't care") */
670		if ((((rtc.regs[reg_alarm_second] & 0xc0) == 0xc0) || (rtc.regs[reg_alarm_second] == rtc.regs[reg_second]))
671		&& (((rtc.regs[reg_alarm_minute] & 0xc0) == 0xc0) || (rtc.regs[reg_alarm_minute] == rtc.regs[reg_minute]))
672		&& (((rtc.regs[reg_alarm_hour] & 0xc0) == 0xc0) || (rtc.regs[reg_alarm_hour] == rtc.regs[reg_hour])))
673		rtc.regs[reg_C] |= reg_C_AF;
	672	if ((((state->regs[reg_alarm_second] & 0xc0) == 0xc0) || (state->regs[reg_alarm_second] == state->regs[reg_second]))
	673	&& (((state->regs[reg_alarm_minute] & 0xc0) == 0xc0) || (state->regs[reg_alarm_minute] == state->regs[reg_minute]))
	674	&& (((state->regs[reg_alarm_hour] & 0xc0) == 0xc0) || (state->regs[reg_alarm_hour] == state->regs[reg_hour])))
	675	state->regs[reg_C] |= reg_C_AF;
674	676
675		field_interrupts();
	677	field_interrupts(device);
676	678	}
	679
	680	/*
	681	Initialize clock
	682
	683	interrupt_callback: callback called when interrupt pin state changes (may
	684	be NULL)
	685	*/
	686
	687	static DEVICE_START( rtc65271 )
	688	{
	689	rtc65271_config *config = (rtc65271_config *)device->inline_config;
	690	rtc65271_state *state = get_safe_token(device);
	691
	692	state->update_timer = timer_alloc(device->machine, rtc_begin_update_callback, (void *)device);
	693	timer_adjust_periodic(state->update_timer, ATTOTIME_IN_SEC(1), 0, ATTOTIME_IN_SEC(1));
	694	state->SQW_timer = timer_alloc(device->machine, rtc_SQW_callback, (void *)device);
	695	state->interrupt_callback = config->interrupt_callback;
	696
	697	state_save_register_device_item_array(device, 0, state->regs);
	698	state_save_register_device_item(device, 0, state->cur_reg);
	699	state_save_register_device_item_array(device, 0, state->xram);
	700	state_save_register_device_item(device, 0, state->cur_xram_page);
	701	state_save_register_device_item(device, 0, state->SQW_internal_state);
	702	}
	703
	704
	705	static DEVICE_NVRAM( rtc65271 )
	706	{
	707	if (read_or_write)
	708	rtc65271_file_save(device, file);
	709	else if (file)
	710	rtc65271_file_load(device, file);
	711	}
	712
	713
	714	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
	715
	716	#define DEVTEMPLATE_ID(p,s)      p##rtc65271##s
	717	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_NVRAM | DT_HAS_INLINE_CONFIG
	718	#define DEVTEMPLATE_NAME      "RTC65271"
	719	#define DEVTEMPLATE_FAMILY      "RTC"
	720	#include "devtempl.h"

src/emu/inptport.h

r6740	r6741
1041	1041	/* return the config that matches the given tag */
1042	1042	const input_port_config *input_port_by_tag_slow(const input_port_list *portlist, const char *tag);
1043	1043
1044		/* return the config that matches the given tag */
1045		const input_port_config *input_port_by_index(const input_port_list *portlist, int index);
1046
1047	1044	/* return the field that matches the given tag and mask */
1048	1045	const input_field_config *input_field_by_tag_and_mask(const input_port_list *portlist, const char *tag, input_port_value mask);
1049	1046

src/emu/mame.h

r6740	r6741
165	165	UINT32               nvram_size;
166	166	generic_ptr            videoram;         /* videoram */
167	167	UINT32               videoram_size;
168		generic_ptr            colorram;         /* color ram */
169		UINT32               colorram_size;
170	168	generic_ptr            spriteram;         /* spriteram */
171	169	UINT32               spriteram_size;
172	170	generic_ptr            spriteram2;         /* secondary spriteram */

src/emu/sound/tms5110.c

r6740	r6741
175	175	INT32 speech_rom_bitnum;
176	176
177	177	emu_timer *romclk_timer;
	178	UINT8 romclk_timer_started;
178	179	UINT8 romclk_state;
179	180	};
180	181
r6740	r6741
206	207	static void tms5110_process(tms5110_state *tms, INT16 *buffer, unsigned int size);
207	208	static void parse_frame(tms5110_state *tms);
208	209	static STREAM_UPDATE( tms5110_update );
	210	static TIMER_CALLBACK( romclk_timer_cb );
209	211
210	212
211	213	#define DEBUG_5110   0
r6740	r6741
964	966	}
965	967
966	968	tms->state = CTL_STATE_INPUT; /* most probably not defined */
	969	tms->romclk_timer = timer_alloc(device->machine, romclk_timer_cb, (void *) device);
967	970
968	971	register_for_save_states(tms);
969	972	}
r6740	r6741
1139	1142	stream_update(tms->stream);
1140	1143
1141	1144	/* create and start timer if necessary */
1142		if (tms->romclk_timer == NULL)
	1145	if (!tms->romclk_timer_started)
1143	1146	{
1144		tms->romclk_timer = timer_alloc(device->machine, romclk_timer_cb, (void *) device);
1145		timer_adjust_periodic(tms->romclk_timer, ATTOTIME_IN_HZ(device->clock / 40), 0, ATTOTIME_IN_HZ(device->clock / 40));
1146		}
	1147	tms->romclk_timer_started = TRUE;
	1148	timer_adjust_periodic(tms->romclk_timer, ATTOTIME_IN_HZ(device->clock / 40), 0, ATTOTIME_IN_HZ(device->clock / 40));
	1149	}
1147	1150	return tms->romclk_state;
1148	1151	}
1149	1152

src/emu/sound/fm2612.c

r6740	r6741
1777	1777	for (i=0; i<13; i++)
1778	1778	logerror(", [%02i] %4x", i*2, tl_tab[ x*2 /*+1*/ + i*2*TL_RES_LEN ]);
1779	1779	logerror("\n");
1780		}
1781	1780	#endif
1782	1781	}
1783	1782	/*logerror("FM.C: TL_TAB_LEN = %i elements (%i bytes)\n",TL_TAB_LEN, (int)sizeof(tl_tab));*/

src/emu/sound/disc_inp.c

r6740	r6741
174	174
175	175	double min, max;
176	176
177		if (node->custom)
178		{
179		context->port = input_port_by_tag(&node->info->device->machine->portlist, (const char *)node->custom);
180		if (context->port == NULL)
181		fatalerror("DISCRETE_ADJUSTMENT_TAG - NODE_%d has invalid tag", NODE_BLOCKINDEX(node));
182		}
183		else
184		context->port = input_port_by_index(&node->info->device->machine->portlist, DSS_ADJUSTMENT__PORT);
	177	context->port = input_port_by_tag(&node->info->device->machine->portlist, (const char *)node->custom);
	178	if (context->port == NULL)
	179	fatalerror("DISCRETE_ADJUSTMENT - NODE_%d has invalid tag", NODE_BLOCKINDEX(node));
185	180
186	181	context->lastpval = 0x7fffffff;
187	182	context->pmin     = DSS_ADJUSTMENT__PMIN;

src/emu/sound/k056800.c

r0	r6741
	1	/***********************************************************************
	2
	3	Konami K056800 (MIRAC)
	4	Sound interface
	5
	6
	7	***********************************************************************/
	8
	9	#include "driver.h"
	10	#include "sound/k056800.h"
	11
	12	typedef struct _k056800_state k056800_state;
	13	struct _k056800_state
	14	{
	15	UINT8                host_reg[8];
	16	UINT8                sound_reg[8];
	17
	18	emu_timer            *sound_cpu_timer;
	19	UINT8                sound_cpu_irq1_enable;
	20	k056800_irq_cb       irq_cb;
	21	};
	22
	23	/*****************************************************************************
	24	INLINE FUNCTIONS
	25	*****************************************************************************/
	26
	27	INLINE k056800_state *k056800_get_safe_token( const device_config *device )
	28	{
	29	assert(device != NULL);
	30	assert(device->token != NULL);
	31	assert(device->type == K056800);
	32
	33	return (k056800_state *)device->token;
	34	}
	35
	36	INLINE const k056800_interface *k056800_get_interface( const device_config *device )
	37	{
	38	assert(device != NULL);
	39	assert((device->type == K056800));
	40	return (const k056800_interface *) device->static_config;
	41	}
	42
	43	/*****************************************************************************
	44	DEVICE HANDLERS
	45	*****************************************************************************/
	46
	47
	48	static UINT8 k056800_host_reg_r( const device_config *device, int reg )
	49	{
	50	k056800_state *k056800 = k056800_get_safe_token(device);
	51	UINT8 value = k056800->host_reg[reg];
	52	if (reg == 2)
	53	value &= ~3; // suppress VOLWR busy flags
	54
	55	return value;
	56	}
	57
	58	static void k056800_host_reg_w( const device_config *device, int reg, UINT8 data )
	59	{
	60	k056800_state *k056800 = k056800_get_safe_token(device);
	61
	62	k056800->sound_reg[reg] = data;
	63
	64	if (reg == 7)
	65	k056800->irq_cb(device->machine, 1);
	66	}
	67
	68	static UINT8 k056800_sound_reg_r( const device_config *device, int reg )
	69	{
	70	k056800_state *k056800 = k056800_get_safe_token(device);
	71	return k056800->sound_reg[reg];
	72	}
	73
	74	static void k056800_sound_reg_w( const device_config *device, int reg, UINT8 data )
	75	{
	76	k056800_state *k056800 = k056800_get_safe_token(device);
	77
	78	if (reg == 4)
	79	k056800->sound_cpu_irq1_enable = data & 0x01;
	80
	81	k056800->host_reg[reg] = data;
	82	}
	83
	84	static TIMER_CALLBACK( k056800_sound_cpu_timer_tick )
	85	{
	86	k056800_state *k056800 = (k056800_state *)ptr;
	87
	88	if (k056800->sound_cpu_irq1_enable)
	89	k056800->irq_cb(machine, 0);
	90	}
	91
	92	READ32_DEVICE_HANDLER( k056800_host_r )
	93	{
	94	UINT32 r = 0;
	95
	96	if (ACCESSING_BITS_24_31)
	97	r |= k056800_host_reg_r(device, (offset * 4) + 0) << 24;
	98
	99	if (ACCESSING_BITS_16_23)
	100	r |= k056800_host_reg_r(device, (offset * 4) + 1) << 16;
	101
	102	if (ACCESSING_BITS_8_15)
	103	r |= k056800_host_reg_r(device, (offset * 4) + 2) << 8;
	104
	105	if (ACCESSING_BITS_0_7)
	106	r |= k056800_host_reg_r(device, (offset * 4) + 3) << 0;
	107
	108
	109	return r;
	110	}
	111
	112	WRITE32_DEVICE_HANDLER( k056800_host_w )
	113	{
	114	if (ACCESSING_BITS_24_31)
	115	k056800_host_reg_w(device, (offset * 4) + 0, (data >> 24) & 0xff);
	116
	117	if (ACCESSING_BITS_16_23)
	118	k056800_host_reg_w(device, (offset * 4) + 1, (data >> 16) & 0xff);
	119
	120	if (ACCESSING_BITS_8_15)
	121	k056800_host_reg_w(device, (offset * 4) + 2, (data >> 8) & 0xff);
	122
	123	if (ACCESSING_BITS_0_7)
	124	k056800_host_reg_w(device, (offset * 4) + 3, (data >> 0) & 0xff);
	125
	126	}
	127
	128	READ16_DEVICE_HANDLER( k056800_sound_r )
	129	{
	130	return k056800_sound_reg_r(device, offset);
	131	}
	132
	133	WRITE16_DEVICE_HANDLER( k056800_sound_w )
	134	{
	135	k056800_sound_reg_w(device, offset, data);
	136	}
	137
	138	/*****************************************************************************
	139	DEVICE INTERFACE
	140	*****************************************************************************/
	141
	142	static DEVICE_START( k056800 )
	143	{
	144	k056800_state *k056800 = k056800_get_safe_token(device);
	145	const k056800_interface *intf = k056800_get_interface(device);
	146	attotime timer_period = attotime_mul(ATTOTIME_IN_HZ(44100), 128);   // roughly 2.9us
	147
	148	k056800->irq_cb = intf->irq_cb;
	149
	150	k056800->sound_cpu_timer = timer_alloc(device->machine, k056800_sound_cpu_timer_tick, k056800);
	151	timer_adjust_periodic(k056800->sound_cpu_timer, timer_period, 0, timer_period);
	152
	153	state_save_register_device_item_array(device, 0, k056800->host_reg);
	154	state_save_register_device_item_array(device, 0, k056800->sound_reg);
	155	state_save_register_device_item(device, 0, k056800->sound_cpu_irq1_enable);
	156	}
	157
	158	static DEVICE_RESET( k056800 )
	159	{
	160	k056800_state *k056800 = k056800_get_safe_token(device);
	161
	162	memset(k056800->host_reg, 0, sizeof(k056800->host_reg));
	163	memset(k056800->sound_reg, 0, sizeof(k056800->sound_reg));
	164
	165	k056800->sound_cpu_irq1_enable = 0;
	166	}
	167
	168
	169	static const char DEVTEMPLATE_SOURCE[] = __FILE__;
	170
	171	#define DEVTEMPLATE_ID( p, s )   p##k056800##s
	172	#define DEVTEMPLATE_FEATURES   DT_HAS_START | DT_HAS_RESET
	173	#define DEVTEMPLATE_NAME      "Konami 056800 MIRAC"
	174	#define DEVTEMPLATE_FAMILY      "Konami custom"
	175	#include "devtempl.h"

src/emu/sound/k056800.h

r0	r6741
	1	/*********************************************************
	2
	3	Konami 056800 MIRAC sound interface
	4
	5	*********************************************************/
	6
	7	#ifndef __K056800_H__
	8	#define __K056800_H__
	9
	10	#include "devcb.h"
	11
	12
	13	/***************************************************************************
	14	TYPE DEFINITIONS
	15	***************************************************************************/
	16
	17	typedef void (*k056800_irq_cb)(running_machine *, int);
	18
	19
	20	typedef struct _k056800_interface k056800_interface;
	21	struct _k056800_interface
	22	{
	23	k056800_irq_cb       irq_cb;
	24	};
	25
	26
	27	/***************************************************************************
	28	FUNCTION PROTOTYPES
	29	***************************************************************************/
	30
	31	DEVICE_GET_INFO( k056800 );
	32
	33
	34	/***************************************************************************
	35	DEVICE CONFIGURATION MACROS
	36	***************************************************************************/
	37
	38	#define K056800 DEVICE_GET_INFO_NAME( k056800 )
	39
	40	#define MDRV_K056800_ADD(_tag, _interface) \
	41	MDRV_DEVICE_ADD(_tag, K056800, 0) \
	42	MDRV_DEVICE_CONFIG(_interface)
	43
	44
	45	/***************************************************************************
	46	DEVICE I/O FUNCTIONS
	47	***************************************************************************/
	48
	49	READ32_DEVICE_HANDLER( k056800_host_r );
	50	WRITE32_DEVICE_HANDLER( k056800_host_w );
	51	READ16_DEVICE_HANDLER( k056800_sound_r );
	52	WRITE16_DEVICE_HANDLER( k056800_sound_w );
	53
	54
	55	#endif /* __K056800_H__ */
	56
	57

src/emu/sound/discrete.h

r6740	r6741
187	187	* DISCRETE_SOUND_START(STRUCTURENAME)
188	188	* DISCRETE_SOUND_END
189	189	*
190		* DISCRETE_ADJUSTMENT(NODE,MIN,MAX,LOGLIN,PORT)
191		* DISCRETE_ADJUSTMENT_TAG(NODE,MIN,MAX,LOGLIN,TAG)
192		* DISCRETE_ADJUSTMENTX(NODE,MIN,MAX,LOGLIN,PORT,PMIN,PMAX)
	190	* DISCRETE_ADJUSTMENT(NODE,MIN,MAX,LOGLIN,TAG)
	191	* DISCRETE_ADJUSTMENTX(NODE,MIN,MAX,LOGLIN,TAG,PMIN,PMAX)
193	192	* DISCRETE_CONSTANT(NODE,CONST0)
194	193	* DISCRETE_INPUT_DATA(NODE)
195	194	* DISCRETE_INPUTX_DATA(NODE,GAIN,OFFSET,INIT)
r6740	r6741
336	335	***********************************************************************
337	336	*
338	337	* DISCRETE_ADJUSTMENT     - Adjustable constant set by the UI [~] menu.
339		* DISCRETE_ADJUSTMENT_TAG - Same as above but referenced by a tag.
340	338	*
341		* Note: DISCRETE_ADJUSTMENT_TAG is prefered over DISCRETE_ADJUSTMENT.
342		*
343	339	*                        .----------.
344	340	*                        |          |
345	341	*                        | ADJUST.. |-------->   Netlist node
r6740	r6741
351	347	*                         static minimum value the node can take,
352	348	*                         static maximum value the node can take,
353	349	*                         log/linear scale 0=Linear !0=Logarithmic,
354		*                         input port number of the adjuster)
	350	*                         port tag name of the adjuster)
355	351	*
356		*     DISCRETE_ADJUSTMENT_TAG(name of node,
357		*                             static minimum value the node can take,
358		*                             static maximum value the node can take,
359		*                             log/linear scale 0=Linear !0=Logarithmic,
360		*                             port tag name of the adjuster)
361		*
362	352	*  Note: When using DISC_LOGADJ, the min/max values must be > 0.
363	353	*        If they are <=0, they will be forced to 1.
364	354	*        Min can be a higher value then max.
r6740	r6741
366	356	*
367	357	*  Example config line
368	358	*
369		*     DISCRETE_ADJUSTMENT(NODE_01,0.0,5.0,DISC_LINADJ,0,5)
	359	*     DISCRETE_ADJUSTMENT(NODE_01,0.0,5.0,DISC_LINADJ,0,"pot")
370	360	*
371	361	*  Define an adjustment slider that takes a 0-100 input from input
372		*  port #5, scaling between 0.0 and 5.0. Adjustment scaling is Linear.
	362	*  port "pot", scaling between 0.0 and 5.0. Adjustment scaling is Linear.
373	363	*
374	364	*      DISC_LOGADJ 1.0
375	365	*      DISC_LINADJ 0.0
r6740	r6741
4385	4375	#define DISCRETE_SOUND_END                                              { NODE_00, DSS_NULL     , 0, { NODE_NC }, { 0 } ,NULL  ,"DISCRETE_SOUND_END" }  };
4386	4376
4387	4377	/* from disc_inp.c */
4388		#define DISCRETE_ADJUSTMENT(NODE,MIN,MAX,LOGLIN,PORT)                   { NODE, DSS_ADJUSTMENT  , 7, { NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC }, { MIN,MAX,LOGLIN,PORT,0   ,100  }, NULL  , "DISCRETE_ADJUSTMENT"  },
4389		#define DISCRETE_ADJUSTMENT_TAG(NODE,MIN,MAX,LOGLIN,TAG)                { NODE, DSS_ADJUSTMENT  , 7, { NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC }, { MIN,MAX,LOGLIN,0   ,0   ,100  }, TAG   , "DISCRETE_ADJUSTMENT_TAG" },
4390		#define DISCRETE_ADJUSTMENTX(NODE,MIN,MAX,LOGLIN,PORT,PMIN,PMAX)        { NODE, DSS_ADJUSTMENT  , 7, { NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC }, { MIN,MAX,LOGLIN,PORT,PMIN,PMAX }, NULL  , "DISCRETE_ADJUSTMENTX"  },
	4378	#define DISCRETE_ADJUSTMENT(NODE,MIN,MAX,LOGLIN,TAG)                   { NODE, DSS_ADJUSTMENT  , 7, { NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC }, { MIN,MAX,LOGLIN,0   ,0   ,100  }, TAG   , "DISCRETE_ADJUSTMENT" },
	4379	#define DISCRETE_ADJUSTMENTX(NODE,MIN,MAX,LOGLIN,TAG,PMIN,PMAX)         { NODE, DSS_ADJUSTMENT  , 7, { NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC }, { MIN,MAX,LOGLIN,0   ,PMIN,PMAX }, TAG   , "DISCRETE_ADJUSTMENTX"  },
4391	4380	#define DISCRETE_CONSTANT(NODE,CONST)                                   { NODE, DSS_CONSTANT    , 1, { NODE_NC }, { CONST } ,NULL  ,"DISCRETE_CONSTANT" },
4392	4381	#define DISCRETE_INPUT_DATA(NODE)                                       { NODE, DSS_INPUT_DATA  , 3, { NODE_NC,NODE_NC,NODE_NC }, { 1,0,0 }, NULL, "DISCRETE_INPUT_DATA" },
4393	4382	#define DISCRETE_INPUTX_DATA(NODE,GAIN,OFFSET,INIT)                     { NODE, DSS_INPUT_DATA  , 3, { NODE_NC,NODE_NC,NODE_NC }, { GAIN,OFFSET,INIT }, NULL, "DISCRETE_INPUTX_DATA" },

src/emu/sound/ics2115.c

r6740	r6741
80	80	static void recalc_irq(ics2115_state *chip)
81	81	{
82	82	int i;
83		int irq = 0;
84		if(chip->irq_en & chip->irq_pend)
	83	int irq = 0;
	84	if (chip->irq_en & chip->irq_pend)
85	85	irq = 1;
86		for(i=0; !irq && i<32; i++)
87		if(chip->voice[i].state & V_DONE)
	86	for (i = 0; !irq && i<32; i++)
	87	if (chip->voice[i].state & V_DONE)
88	88	irq = 1;
89		if(irq != chip->irq_on) {
	89	if (irq != chip->irq_on)
	90	{
90	91	chip->irq_on = irq;
91		if(chip->intf->irq_cb)
	92	if (chip->intf->irq_cb)
92	93	chip->intf->irq_cb(chip->device, irq ? ASSERT_LINE : CLEAR_LINE);
93	94	}
94	95	}
r6740	r6741
103	104	memset(outputs[0], 0, samples*sizeof(*outputs[0]));
104	105	memset(outputs[1], 0, samples*sizeof(*outputs[0]));
105	106
106		for(osc = 0; osc < 32; osc++)
107		if(chip->voice[osc].state & V_ON) {
	107	for (osc = 0; osc < 32; osc++)
	108	if (chip->voice[osc].state & V_ON)
	109	{
108	110	UINT32 adr = (chip->voice[osc].addrh << 16) | chip->voice[osc].addrl;
109	111	UINT32 end = (chip->voice[osc].endh << 16) | (chip->voice[osc].endl << 8);
110	112	UINT32 loop = (chip->voice[osc].strth << 16) | (chip->voice[osc].strtl << 8);
r6740	r6741
117	119	if (ICS2115LOGERROR) logerror("ICS2115: KEYRUN %02d adr=%08x end=%08x delta=%08x\n",
118	120	osc, adr, end, delta);
119	121
120		for(i=0; i<samples; i++) {
	122	for (i = 0; i < samples; i++)
	123	{
121	124	INT32 v = chip->rom[badr|(adr >> 12)];
122		if(conf & 1)
	125	if (conf & 1)
123	126	v = chip->ulaw[v];
124	127	else
125	128	v = ((INT8)v) << 6;
r6740	r6741
128	131	outputs[0][i] += v;
129	132	outputs[1][i] += v;
130	133	adr += delta;
131		if(adr >= end) {
	134	if (adr >= end)
	135	{
132	136	if (ICS2115LOGERROR) logerror("ICS2115: KEYDONE %2d\n", osc);
133	137	adr -= (end-loop);
134	138	chip->voice[osc].state &= ~V_ON;
r6740	r6741
140	144	chip->voice[osc].addrh = adr >> 16;
141	145	chip->voice[osc].addrl = adr;
142	146	}
143		if(rec_irq)
	147	if (rec_irq)
144	148	recalc_irq(chip);
145	149	}
146	150
147	151	static void keyon(ics2115_state *chip, int osc)
148	152	{
149	153	if (ICS2115LOGERROR) logerror("ICS2115: KEYON %2d conf:%02x vctl:%02x a:%07x.%03x l:%05x.%x e:%05x.%x v:%03x f:%d\n",
150		osc,
151		chip->voice[chip->osc].conf,
152		chip->voice[chip->osc].vctl,
153		(chip->voice[osc].saddr << 20)|(chip->voice[osc].addrh << 4)|(chip->voice[osc].addrl >> 12),
154		(chip->voice[osc].addrl >> 3) & 0x1ff,
155		(chip->voice[osc].strth << 4)|(chip->voice[osc].strtl >> 4),
156		chip->voice[osc].strtl & 0xf,
157		(chip->voice[osc].endh << 4)|(chip->voice[osc].endl >> 4),
158		chip->voice[osc].endl & 0xf,
159		chip->voice[osc].volacc>>4,
160		(chip->voice[chip->osc].fc*33075+512)/1024);
	154	osc,
	155	chip->voice[chip->osc].conf,
	156	chip->voice[chip->osc].vctl,
	157	(chip->voice[osc].saddr << 20)|(chip->voice[osc].addrh << 4)|(chip->voice[osc].addrl >> 12),
	158	(chip->voice[osc].addrl >> 3) & 0x1ff,
	159	(chip->voice[osc].strth << 4)|(chip->voice[osc].strtl >> 4),
	160	chip->voice[osc].strtl & 0xf,
	161	(chip->voice[osc].endh << 4)|(chip->voice[osc].endl >> 4),
	162	chip->voice[osc].endl & 0xf,
	163	chip->voice[osc].volacc>>4,
	164	(chip->voice[chip->osc].fc*33075+512)/1024);
161	165	chip->voice[osc].state |= V_ON;
162	166	}
163	167
r6740	r6741
179	183	static void recalc_timer(ics2115_state *chip, int timer)
180	184	{
181	185	UINT64 period = 1000000000 * chip->timer[timer].scale*chip->timer[timer].preset / 33868800;
182		if(period)
	186	if (period)
183	187	period = 1000000000/62.8206;
184		if(period)
	188
	189	if (period)
185	190	{
186	191	if (ICS2115LOGERROR) logerror("ICS2115: timer %d freq=%fHz\n", timer, 1.0/(period / 1000000000.0));
187	192	}
r6740	r6741
190	195	if (ICS2115LOGERROR) logerror("ICS2115: timer %d off\n", timer);
191	196	}
192	197
193		if(chip->timer[timer].period != period) {
	198	if (chip->timer[timer].period != period)
	199	{
194	200	chip->timer[timer].period = period;
195		if(period)
	201	if (period)
196	202	timer_adjust_periodic(chip->timer[timer].timer, ATTOTIME_IN_NSEC(period), 0, ATTOTIME_IN_NSEC(period));
197	203	else
198	204	timer_adjust_oneshot(chip->timer[timer].timer, attotime_never, 0);
r6740	r6741
204	210	{
205	211	running_machine *machine = chip->device->machine;
206	212
207		switch(reg) {
	213	switch (reg)
	214	{
208	215	case 0x00: // [osc] Oscillator Configuration
209		if(msb) {
	216	if (msb)
	217	{
210	218	chip->voice[chip->osc].conf = data;
211	219	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: conf = %02x\n", cpuexec_describe_context(machine), chip->osc,
212	220	chip->voice[chip->osc].conf);
r6740	r6741
215	223
216	224	case 0x01: // [osc] Wavesample frequency
217	225	// freq = fc*33075/1024 in 32 voices mode, fc*44100/1024 in 24 voices mode
218		if(msb)
	226	if (msb)
219	227	chip->voice[chip->osc].fc = (chip->voice[chip->osc].fc & 0xff)|(data << 8);
220	228	else
221	229	chip->voice[chip->osc].fc = (chip->voice[chip->osc].fc & 0xff00)|data;
r6740	r6741
224	232	break;
225	233
226	234	case 0x02: // [osc] Wavesample loop start address 19-4
227		if(msb)
	235	if (msb)
228	236	chip->voice[chip->osc].strth = (chip->voice[chip->osc].strth & 0xff)|(data << 8);
229	237	else
230	238	chip->voice[chip->osc].strth = (chip->voice[chip->osc].strth & 0xff00)|data;
r6740	r6741
233	241	break;
234	242
235	243	case 0x03: // [osc] Wavesample loop start address 3-0.3-0
236		if(msb) {
	244	if (msb)
	245	{
237	246	chip->voice[chip->osc].strtl = data;
238	247	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: strtl = %02x\n", cpuexec_describe_context(machine), chip->osc,
239	248	chip->voice[chip->osc].strtl);
r6740	r6741
241	250	break;
242	251
243	252	case 0x04: // [osc] Wavesample loop end address 19-4
244		if(msb)
	253	if (msb)
245	254	chip->voice[chip->osc].endh = (chip->voice[chip->osc].endh & 0xff)|(data << 8);
246	255	else
247	256	chip->voice[chip->osc].endh = (chip->voice[chip->osc].endh & 0xff00)|data;
r6740	r6741
250	259	break;
251	260
252	261	case 0x05: // [osc] Wavesample loop end address 3-0.3-0
253		if(msb) {
	262	if (msb)
	263	{
254	264	chip->voice[chip->osc].endl = data;
255	265	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: endl = %02x\n", cpuexec_describe_context(machine), chip->osc,
256	266	chip->voice[chip->osc].endl);
r6740	r6741
258	268	break;
259	269
260	270	case 0x07: // [osc] Volume Start
261		if(msb) {
	271	if (msb)
	272	{
262	273	chip->voice[chip->osc].vstart = data;
263	274	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: vstart = %02x\n", cpuexec_describe_context(machine), chip->osc,
264	275	chip->voice[chip->osc].vstart);
r6740	r6741
266	277	break;
267	278
268	279	case 0x08: // [osc] Volume End
269		if(msb) {
	280	if (msb)
	281	{
270	282	chip->voice[chip->osc].vend = data;
271	283	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: vend = %02x\n", cpuexec_describe_context(machine), chip->osc,
272	284	chip->voice[chip->osc].vend);
r6740	r6741
274	286	break;
275	287
276	288	case 0x09: // [osc] Volume accumulator
277		if(msb)
	289	if (msb)
278	290	chip->voice[chip->osc].volacc = (chip->voice[chip->osc].volacc & 0xff)|(data << 8);
279	291	else
280	292	chip->voice[chip->osc].volacc = (chip->voice[chip->osc].volacc & 0xff00)|data;
r6740	r6741
283	295	break;
284	296
285	297	case 0x0a: // [osc] Wavesample address 19-4
286		if(msb)
	298	if (msb)
287	299	chip->voice[chip->osc].addrh = (chip->voice[chip->osc].addrh & 0xff)|(data << 8);
288	300	else
289	301	chip->voice[chip->osc].addrh = (chip->voice[chip->osc].addrh & 0xff00)|data;
r6740	r6741
292	304	break;
293	305
294	306	case 0x0b: // [osc] Wavesample address 3-0.8-0
295		if(msb)
	307	if (msb)
296	308	chip->voice[chip->osc].addrl = (chip->voice[chip->osc].addrl & 0xff)|(data << 8);
297	309	else
298	310	chip->voice[chip->osc].addrl = (chip->voice[chip->osc].addrl & 0xff00)|data;
r6740	r6741
302	314
303	315
304	316	case 0x0c: // [osc] Pan
305		if(msb) {
	317	if (msb)
	318	{
306	319	chip->voice[chip->osc].pan = data;
307	320	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: pan = %02x\n", cpuexec_describe_context(machine), chip->osc,
308	321	chip->voice[chip->osc].pan);
r6740	r6741
310	323	break;
311	324
312	325	case 0x0d: // [osc] Volume Enveloppe Control
313		if(msb) {
	326	if (msb)
	327	{
314	328	chip->voice[chip->osc].vctl = data;
315	329	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: vctl = %02x\n", cpuexec_describe_context(machine), chip->osc,
316	330	chip->voice[chip->osc].vctl);
r6740	r6741
318	332	break;
319	333
320	334	case 0x10: // [osc] Oscillator Control
321		if(msb) {
	335	if (msb)
	336	{
322	337	chip->voice[chip->osc].ctl = data;
323	338	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: ctl = %02x\n", cpuexec_describe_context(machine), chip->osc,
324	339	chip->voice[chip->osc].ctl);
325		if(data == 0)
	340	if (data == 0)
326	341	keyon(chip, chip->osc);
327	342	}
328	343	break;
329	344
330	345	case 0x11: // [osc] Wavesample static address 27-20
331		if(msb) {
	346	if (msb)
	347	{
332	348	chip->voice[chip->osc].saddr = data;
333	349	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: saddr = %02x\n", cpuexec_describe_context(machine), chip->osc,
334	350	chip->voice[chip->osc].saddr);
r6740	r6741
336	352	break;
337	353
338	354	case 0x40: // Timer 1 Preset
339		if(!msb) {
	355	if (!msb)
	356	{
340	357	chip->timer[0].preset = data;
341	358	if (ICS2115LOGERROR) logerror("%s:ICS2115: t1preset = %d\n", cpuexec_describe_context(machine), chip->timer[0].preset);
342	359	recalc_timer(chip, 0);
r6740	r6741
344	361	break;
345	362
346	363	case 0x41: // Timer 2 Preset
347		if(!msb) {
	364	if (!msb)
	365	{
348	366	chip->timer[1].preset = data;
349	367	if (ICS2115LOGERROR) logerror("%s:ICS2115: t2preset = %d\n", cpuexec_describe_context(machine), chip->timer[1].preset);
350	368	recalc_timer(chip, 1);
r6740	r6741
352	370	break;
353	371
354	372	case 0x42: // Timer 1 Prescaler
355		if(!msb) {
	373	if (!msb)
	374	{
356	375	chip->timer[0].scale = data;
357	376	if (ICS2115LOGERROR) logerror("%s:ICS2115: t1scale = %d\n", cpuexec_describe_context(machine), chip->timer[0].scale);
358	377	recalc_timer(chip, 0);
r6740	r6741
360	379	break;
361	380
362	381	case 0x43: // Timer 2 Prescaler
363		if(!msb) {
	382	if (!msb)
	383	{
364	384	chip->timer[1].scale = data;
365	385	if (ICS2115LOGERROR) logerror("%s:ICS2115: t2scale = %d\n", cpuexec_describe_context(machine), chip->timer[1].scale);
366	386	recalc_timer(chip, 1);
r6740	r6741
368	388	break;
369	389
370	390	case 0x4a: // IRQ Enable
371		if(!msb) {
	391	if (!msb)
	392	{
372	393	chip->irq_en = data;
373	394	if (ICS2115LOGERROR) logerror("%s:ICS2115: irq_en = %02x\n", cpuexec_describe_context(machine), chip->irq_en);
374	395	recalc_irq(chip);
r6740	r6741
376	397	break;
377	398
378	399	case 0x4f: // Oscillator Address being Programmed
379		if(!msb) {
	400	if (!msb)
	401	{
380	402	chip->osc = data & 31;
381	403	if (ICS2115LOGERROR) logerror("%s:ICS2115: oscnumber = %d\n", cpuexec_describe_context(machine), chip->osc);
382	404	}
r6740	r6741
391	413	{
392	414	running_machine *machine = chip->device->machine;
393	415
394		switch(reg) {
	416	switch (reg)
	417	{
395	418	case 0x0d: // [osc] Volume Enveloppe Control
396	419	if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: read vctl\n", cpuexec_describe_context(machine), chip->osc);
397	420	//      res = chip->voice[chip->osc].vctl << 8;
r6740	r6741
402	425	case 0x0f:{// [osc] Interrupt source/oscillator
403	426	int osc;
404	427	UINT8 res = 0xff;
405		for(osc = 0; osc < 32; osc++)
406		if(chip->voice[osc].state & V_DONE) {
	428	for (osc = 0; osc < 32; osc++)
	429	if (chip->voice[osc].state & V_DONE)
	430	{
407	431	chip->voice[osc].state &= ~V_DONE;
408	432	if (ICS2115LOGERROR) logerror("ICS2115: KEYOFF %2d\n", osc);
409	433	recalc_irq(chip);
r6740	r6741
452	476	static DEVICE_START( ics2115 )
453	477	{
454	478	ics2115_state *chip = get_safe_token(device);
455		int i;
	479	int i, vv;
456	480
457	481	chip->device = device;
458	482	chip->intf = (const ics2115_interface *)device->static_config;
r6740	r6741
462	486	chip->ulaw = auto_alloc_array(device->machine, INT16, 256);
463	487	chip->stream = stream_create(device, 0, 2, 33075, chip, update);
464	488
465		for(i=0; i<256; i++) {
	489	for (i = 0; i < 256; i++)
	490	{
466	491	UINT8 c = ~i;
467	492	int v;
468	493	v = ((c & 15) << 1) + 33;
469	494	v <<= ((c & 0x70) >> 4);
470		if(c & 0x80)
471		v = 33-v;
	495	if (c & 0x80)
	496	v = 33 - v;
472	497	else
473		v = v-33;
	498	v = v - 33;
474	499	chip->ulaw[i] = v;
475	500	}
	501
	502	state_save_register_device_item(device, 0, chip->timer[0].period);
	503	state_save_register_device_item(device, 0, chip->timer[0].scale);
	504	state_save_register_device_item(device, 0, chip->timer[0].preset);
	505	state_save_register_device_item(device, 0, chip->timer[1].period);
	506	state_save_register_device_item(device, 0, chip->timer[1].scale);
	507	state_save_register_device_item(device, 0, chip->reg);
	508	state_save_register_device_item(device, 0, chip->osc);
	509	state_save_register_device_item(device, 0, chip->irq_en);
	510	state_save_register_device_item(device, 0, chip->irq_pend);
	511	state_save_register_device_item(device, 0, chip->irq_on);
	512
	513	for (vv = 0; vv < 32; vv++)
	514	{
	515	state_save_register_device_item(device, vv, chip->voice[vv].fc);
	516	state_save_register_device_item(device, vv, chip->voice[vv].addrh);
	517	state_save_register_device_item(device, vv, chip->voice[vv].addrl);
	518	state_save_register_device_item(device, vv, chip->voice[vv].strth);
	519	state_save_register_device_item(device, vv, chip->voice[vv].endh);
	520	state_save_register_device_item(device, vv, chip->voice[vv].volacc);
	521	state_save_register_device_item(device, vv, chip->voice[vv].strtl);
	522	state_save_register_device_item(device, vv, chip->voice[vv].endl);
	523	state_save_register_device_item(device, vv, chip->voice[vv].saddr);
	524	state_save_register_device_item(device, vv, chip->voice[vv].pan);
	525	state_save_register_device_item(device, vv, chip->voice[vv].conf);
	526	state_save_register_device_item(device, vv, chip->voice[vv].ctl);
	527	state_save_register_device_item(device, vv, chip->voice[vv].vstart);
	528	state_save_register_device_item(device, vv, chip->voice[vv].vend);
	529	state_save_register_device_item(device, vv, chip->voice[vv].vctl);
	530	state_save_register_device_item(device, vv, chip->voice[vv].state);
	531	}
476	532	}
477	533
478	534	READ8_DEVICE_HANDLER( ics2115_r )
479	535	{
480	536	ics2115_state *chip = get_safe_token(device);
481		switch(offset) {
482		case 0: {
	537	switch (offset)
	538	{
	539	case 0:
	540	{
483	541	UINT8 res = 0;
484		if(chip->irq_on) {
	542	if (chip->irq_on)
	543	{
485	544	int i;
486	545	res |= 0x80;
487		if(chip->irq_en & chip->irq_pend & 3)
	546	if (chip->irq_en & chip->irq_pend & 3)
488	547	res |= 1; // Timer irq
489		for(i=0; i<32; i++)
490		if(chip->voice[i].state & V_DONE) {
	548	for (i = 0; i < 32; i++)
	549	if (chip->voice[i].state & V_DONE)
	550	{
491	551	res |= 2;
492	552	break;
493	553	}
r6740	r6741
497	557	return res;
498	558	}
499	559	case 1:
500		return chip->reg;
	560	return chip->reg;
501	561	case 2:
502	562	return ics2115_reg_r(chip, chip->reg);
503	563	case 3:
r6740	r6741
509	569	WRITE8_DEVICE_HANDLER( ics2115_w )
510	570	{
511	571	ics2115_state *chip = get_safe_token(device);
512		switch(offset) {
	572	switch (offset)
	573	{
513	574	case 1:
514	575	chip->reg = data;
515	576	break;
r6740	r6741
537	598	}
538	599
539	600
540
541
542	601	/**************************************************************************
543	602	* Generic get_info
544	603	**************************************************************************/

src/emu/sound/fm.c

r6740	r6741
1567	1567	for (i=0; i<13; i++)
1568	1568	logerror(", [%02i] %4x", i*2, tl_tab[ x*2 /*+1*/ + i*2*TL_RES_LEN ]);
1569	1569	logerror("\n");
1570		}
1571	1570	#endif
1572	1571	}
1573	1572	/*logerror("FM.C: TL_TAB_LEN = %i elements (%i bytes)\n",TL_TAB_LEN, (int)sizeof(tl_tab));*/

src/emu/sound/cdp1864.c

r6740	r6741
468	468	state_save_register_device_item(device, 0, cdp1864->signal);
469	469	state_save_register_device_item(device, 0, cdp1864->incr);
470	470
471		state_save_register_bitmap(device->machine, "cdp1864", device->tag, 0, "cdp1864->bitmap", cdp1864->bitmap);
	471	state_save_register_device_item_bitmap(device, 0, cdp1864->bitmap);
472	472	}
473	473
474	474	/*-------------------------------------------------

src/emu/sound/sound.mak

r6740	r6741
298	298	SOUNDDEFS += -DHAS_K051649=$(if $(filter K051649,$(SOUNDS)),1,0)
299	299	SOUNDDEFS += -DHAS_K053260=$(if $(filter K053260,$(SOUNDS)),1,0)
300	300	SOUNDDEFS += -DHAS_K054539=$(if $(filter K054539,$(SOUNDS)),1,0)
	301	SOUNDDEFS += -DHAS_K056800=$(if $(filter K056800,$(SOUNDS)),1,0)
301	302
302	303	ifneq ($(filter K005289,$(SOUNDS)),)
303	304	SOUNDOBJS += $(SOUNDOBJ)/k005289.o
r6740	r6741
319	320	SOUNDOBJS += $(SOUNDOBJ)/k054539.o
320	321	endif
321	322
	323	ifneq ($(filter K056800,$(SOUNDS)),)
	324	SOUNDOBJS += $(SOUNDOBJ)/k056800.o
	325	endif
322	326
323	327
324	328	#-------------------------------------------------

src/emu/profiler.c

r6740	r6741
115	115	{
116	116	static const profile_string names[] =
117	117	{
	118	{ PROFILER_DRC_COMPILE,      "DRC Compilation" },
118	119	{ PROFILER_MEMREAD,          "Memory Read" },
119	120	{ PROFILER_MEMWRITE,         "Memory Write" },
120	121	{ PROFILER_VIDEO,            "Video Update" },

src/emu/profiler.h

r6740	r6741
36	36	{
37	37	PROFILER_CPU_FIRST = 0,
38	38	PROFILER_CPU_MAX = PROFILER_CPU_FIRST + 32,
	39	PROFILER_DRC_COMPILE,
39	40	PROFILER_MEMREAD,
40	41	PROFILER_MEMWRITE,
41	42	PROFILER_VIDEO,

src/emu/drawgfx.c

r6740	r6741
75	75	***************************************************************************/
76	76
77	77	/*-------------------------------------------------
	78	gfx_init - allocate memory for the graphics
	79	elements referenced by a machine
	80	-------------------------------------------------*/
	81
	82	void gfx_init(running_machine *machine)
	83	{
	84	const gfx_decode_entry *gfxdecodeinfo = machine->config->gfxdecodeinfo;
	85	int curgfx;
	86
	87	/* skip if nothing to do */
	88	if (gfxdecodeinfo == NULL)
	89	return;
	90
	91	/* loop over all elements */
	92	for (curgfx = 0; curgfx < MAX_GFX_ELEMENTS && gfxdecodeinfo[curgfx].gfxlayout != NULL; curgfx++)
	93	{
	94	const gfx_decode_entry *gfxdecode = &gfxdecodeinfo[curgfx];
	95	UINT32 region_length = 8 * memory_region_length(machine, gfxdecode->memory_region);
	96	const UINT8 *region_base = memory_region(machine, gfxdecode->memory_region);
	97	UINT32 xscale = (gfxdecode->xscale == 0) ? 1 : gfxdecode->xscale;
	98	UINT32 yscale = (gfxdecode->yscale == 0) ? 1 : gfxdecode->yscale;
	99	UINT32 *extpoffs, extxoffs[MAX_ABS_GFX_SIZE], extyoffs[MAX_ABS_GFX_SIZE];
	100	const gfx_layout *gl = gfxdecode->gfxlayout;
	101	int israw = (gl->planeoffset[0] == GFX_RAW);
	102	int planes = gl->planes;
	103	UINT32 width = gl->width;
	104	UINT32 height = gl->height;
	105	UINT32 total = gl->total;
	106	UINT32 charincrement = gl->charincrement;
	107	gfx_layout glcopy;
	108	int j;
	109
	110	/* make a copy of the layout */
	111	glcopy = *gfxdecode->gfxlayout;
	112
	113	/* copy the X and Y offsets into temporary arrays */
	114	memcpy(extxoffs, glcopy.xoffset, sizeof(glcopy.xoffset));
	115	memcpy(extyoffs, glcopy.yoffset, sizeof(glcopy.yoffset));
	116
	117	/* if there are extended offsets, copy them over top */
	118	if (glcopy.extxoffs != NULL)
	119	memcpy(extxoffs, glcopy.extxoffs, glcopy.width * sizeof(extxoffs[0]));
	120	if (glcopy.extyoffs != NULL)
	121	memcpy(extyoffs, glcopy.extyoffs, glcopy.height * sizeof(extyoffs[0]));
	122
	123	/* always use the extended offsets here */
	124	glcopy.extxoffs = extxoffs;
	125	glcopy.extyoffs = extyoffs;
	126
	127	extpoffs = glcopy.planeoffset;
	128
	129	/* expand X and Y by the scale factors */
	130	if (xscale > 1)
	131	{
	132	width *= xscale;
	133	for (j = width - 1; j >= 0; j--)
	134	extxoffs[j] = extxoffs[j / xscale];
	135	}
	136	if (yscale > 1)
	137	{
	138	height *= yscale;
	139	for (j = height - 1; j >= 0; j--)
	140	extyoffs[j] = extyoffs[j / yscale];
	141	}
	142
	143	/* if the character count is a region fraction, compute the effective total */
	144	if (IS_FRAC(total))
	145	{
	146	assert(region_length != 0);
	147	total = region_length / charincrement * FRAC_NUM(total) / FRAC_DEN(total);
	148	}
	149
	150	/* for non-raw graphics, decode the X and Y offsets */
	151	if (!israw)
	152	{
	153	/* loop over all the planes, converting fractions */
	154	for (j = 0; j < planes; j++)
	155	{
	156	UINT32 value = extpoffs[j];
	157	if (IS_FRAC(value))
	158	{
	159	assert(region_length != 0);
	160	extpoffs[j] = FRAC_OFFSET(value) + region_length * FRAC_NUM(value) / FRAC_DEN(value);
	161	}
	162	}
	163
	164	/* loop over all the X/Y offsets, converting fractions */
	165	for (j = 0; j < width; j++)
	166	{
	167	UINT32 value = extxoffs[j];
	168	if (IS_FRAC(value))
	169	{
	170	assert(region_length != 0);
	171	extxoffs[j] = FRAC_OFFSET(value) + region_length * FRAC_NUM(value) / FRAC_DEN(value);
	172	}
	173	}
	174
	175	for (j = 0; j < height; j++)
	176	{
	177	UINT32 value = extyoffs[j];
	178	if (IS_FRAC(value))
	179	{
	180	assert(region_length != 0);
	181	extyoffs[j] = FRAC_OFFSET(value) + region_length * FRAC_NUM(value) / FRAC_DEN(value);
	182	}
	183	}
	184	}
	185
	186	/* otherwise, just use the line modulo */
	187	else
	188	{
	189	int base = gfxdecode->start;
	190	int end = region_length/8;
	191	int linemod = gl->yoffset[0];
	192	while (total > 0)
	193	{
	194	int elementbase = base + (total - 1) * charincrement / 8;
	195	int lastpixelbase = elementbase + height * linemod / 8 - 1;
	196	if (lastpixelbase < end)
	197	break;
	198	total--;
	199	}
	200	}
	201
	202	/* update glcopy */
	203	glcopy.width = width;
	204	glcopy.height = height;
	205	glcopy.total = total;
	206
	207	/* allocate the graphics */
	208	machine->gfx[curgfx] = gfx_element_alloc(machine, &glcopy, (region_base != NULL) ? region_base + gfxdecode->start : NULL, gfxdecode->total_color_codes, gfxdecode->color_codes_start);
	209	}
	210	}
	211
	212
	213
	214	/*-------------------------------------------------
78	215	gfx_element_alloc - allocate a gfx_element structure
79	216	based on a given layout
80	217	-------------------------------------------------*/
r6740	r6741
362	499	}
363	500
364	501
365		/*-------------------------------------------------
366		decodegfx - decode a series of tiles from
367		a particular gfx_element
368		-------------------------------------------------*/
369
370		void decodegfx(gfx_element *gfx, UINT32 first, UINT32 count)
371		{
372		int last = first + count - 1;
373		int c;
374
375		assert(gfx != NULL);
376		assert(gfx->srcdata != NULL);
377		assert(first < gfx->total_elements);
378		assert(last < gfx->total_elements);
379
380		/* if this is raw graphics data, just set the pointer and compute pen usage */
381		if (gfx->flags & GFX_ELEMENT_DONT_FREE)
382		{
383		/* if we got a pointer, set it */
384		gfx->gfxdata = (UINT8 *)gfx->srcdata;
385
386		/* compute pen usage for everything */
387		for (c = first; c <= last; c++)
388		calc_penusage(gfx, c);
389		}
390
391		/* otherwise, we get to manually decode */
392		else
393		for (c = first; c <= last; c++)
394		decodechar(gfx, c, gfx->srcdata);
395		}
396
397
398
399	502	/***************************************************************************
400	503	DRAWGFX IMPLEMENTATIONS
401	504	***************************************************************************/

src/emu/drawgfx.h

r6740	r6741
168	168
169	169	/* ----- graphics elements ----- */
170	170
	171	/* allocate memory for the graphics elements referenced by a machine */
	172	void gfx_init(running_machine *machine);
	173
171	174	/* allocate a gfx_element structure based on a given layout */
172	175	gfx_element *gfx_element_alloc(running_machine *machine, const gfx_layout *gl, const UINT8 *srcdata, UINT32 total_colors, UINT32 color_base);
173	176

src/emu/clifront.c

r6740	r6741
93	93	{ "verifyroms",               "0",        OPTION_COMMAND,    "report romsets that have problems" },
94	94	{ "verifysamples",            "0",        OPTION_COMMAND,    "report samplesets that have problems" },
95	95	{ "romident",                 "0",        OPTION_COMMAND,    "compare files with known MAME roms" },
96		#ifdef MESS
97		{ "listdevices",              "0",        OPTION_COMMAND,    "list available devices" },
98		#endif
	96	{ "listdevices;ld",           "0",        OPTION_COMMAND,    "list available devices" },
99	97
100	98	{ NULL }
101	99	};
r6740	r6741
243	241	{ CLIOPTION_LISTCLONES,      cli_info_listclones },
244	242	{ CLIOPTION_LISTBROTHERS,   cli_info_listbrothers },
245	243	{ CLIOPTION_LISTCRC,      cli_info_listcrc },
246		#ifdef MESS
247		{ CLIOPTION_LISTDEVICES,   info_listdevices },
248		#endif
	244	{ CLIOPTION_LISTDEVICES,   cli_info_listdevices },
249	245	{ CLIOPTION_LISTROMS,      cli_info_listroms },
250	246	{ CLIOPTION_LISTSAMPLES,   cli_info_listsamples },
251	247	{ CLIOPTION_VERIFYROMS,      info_verifyroms },
r6740	r6741
639	635
640	636
641	637	/*-------------------------------------------------
	638	cli_info_listdevices - output the list of
	639	devices referenced by a given game or set of
	640	games
	641	-------------------------------------------------*/
	642
	643	int cli_info_listdevices(core_options *options, const char *gamename)
	644	{
	645	int count = 0;
	646	int drvindex;
	647
	648	/* since we expand the machine driver, we need to set things up */
	649	init_resource_tracking();
	650
	651	/* iterate over drivers */
	652	for (drvindex = 0; drivers[drvindex] != NULL; drvindex++)
	653	if (mame_strwildcmp(gamename, drivers[drvindex]->name) == 0)
	654	{
	655	machine_config *config = machine_config_alloc(drivers[drvindex]->machine_config);
	656	const device_config *device;
	657
	658	if (count != 0)
	659	printf("\n");
	660	printf("Driver %s (%s):\n", drivers[drvindex]->name, drivers[drvindex]->description);
	661
	662	/* iterate through devices */
	663	for (device = config->devicelist.head; device != NULL; device = device->next)
	664	{
	665	switch (device->devclass)
	666	{
	667	case DEVICE_CLASS_AUDIO:      printf("  Audio: ");   break;
	668	case DEVICE_CLASS_VIDEO:      printf("  Video: ");   break;
	669	case DEVICE_CLASS_CPU_CHIP:      printf("    CPU: ");   break;
	670	case DEVICE_CLASS_SOUND_CHIP:   printf("  Sound: ");   break;
	671	case DEVICE_CLASS_TIMER:      printf("  Timer: ");   break;
	672	default:                  printf("  Other: ");   break;
	673	}
	674	printf("%s ('%s')", device_get_name(device), device->tag);
	675	if (device->clock >= 1000000000)
	676	printf(" @ %d.%02d GHz\n", device->clock / 1000000000, (device->clock / 10000000) % 100);
	677	else if (device->clock >= 1000000)
	678	printf(" @ %d.%02d MHz\n", device->clock / 1000000, (device->clock / 10000) % 100);
	679	else if (device->clock >= 1000)
	680	printf(" @ %d.%02d kHz\n", device->clock / 1000, (device->clock / 10) % 100);
	681	else if (device->clock > 0)
	682	printf(" @ %d Hz\n", device->clock);
	683	else
	684	printf("\n");
	685	}
	686
	687	count++;
	688	machine_config_free(config);
	689	}
	690
	691	/* clean up our tracked resources */
	692	exit_resource_tracking();
	693
	694	return (count > 0) ? MAMERR_NONE : MAMERR_NO_SUCH_GAME;
	695	}
	696
	697
	698	/*-------------------------------------------------
642	699	info_verifyroms - verify the ROM sets of
643	700	one or more games
644	701	-------------------------------------------------*/

src/emu/state.c

r6740	r6741
223	223	array of data in memory
224	224	-------------------------------------------------*/
225	225
226		void state_save_register_memory(running_machine *machine, const char *module, const char *tag, UINT32 index, const char *name, void *val, UINT32 valsize, UINT32 valcount)
	226	void state_save_register_memory(running_machine *machine, const char *module, const char *tag, UINT32 index, const char *name, void *val, UINT32 valsize, UINT32 valcount, const char *file, int line)
227	227	{
228	228	state_private *global = machine->state_data;
229	229	state_entry **entryptr, *next;
r6740	r6741
234	234	/* check for invalid timing */
235	235	if (!global->reg_allowed)
236	236	{
237		logerror("Attempt to register save state entry after state registration is closed! module %s tag %s name %s\n",module, tag, name);
	237	logerror("Attempt to register save state entry after state registration is closed!\nFile: %s, line %d, module %s tag %s name %s\n", file, line, module, tag, name);
238	238	if (machine->gamedrv->flags & GAME_SUPPORTS_SAVE)
239		fatalerror("Attempt to register save state entry after state registration is closed! module %s tag %s name %s\n", module, tag, name);
	239	fatalerror("Attempt to register save state entry after state registration is closed!\nFile: %s, line %d, module %s tag %s name %s\n", file, line, module, tag, name);
240	240	global->illegal_regs++;
241	241	return;
242	242	}
243	243
244	244	/* create the full name */
245		totalname = astring_alloc();
	245	totalname = auto_astring_alloc(machine);
246	246	if (tag != NULL)
247	247	astring_printf(totalname, "%s/%s/%X/%s", module, tag, index, name);
248	248	else
r6740	r6741
263	263
264	264	/* didn't find one; allocate a new one */
265	265	next = *entryptr;
266		*entryptr = alloc_clear_or_die(state_entry);
	266	*entryptr = auto_alloc_clear(machine, state_entry);
267	267
268	268	/* fill in the rest */
269	269	(*entryptr)->next      = next;
r6740	r6741
272	272	(*entryptr)->name      = totalname;
273	273	(*entryptr)->typesize  = valsize;
274	274	(*entryptr)->typecount = valcount;
275		restrack_register_object(OBJTYPE_STATEREG, *entryptr, 0, __FILE__, __LINE__);
276	275	}
277	276
278	277
r6740	r6741
281	280	bitmap to be saved
282	281	-------------------------------------------------*/
283	282
284		void state_save_register_bitmap(running_machine *machine, const char *module, const char *tag, UINT32 index, const char *name, bitmap_t *val)
	283	void state_save_register_bitmap(running_machine *machine, const char *module, const char *tag, UINT32 index, const char *name, bitmap_t *val, const char *file, int line)
285	284	{
286		state_save_register_memory(machine, module, tag, index, name, val->base, val->bpp / 8, val->rowpixels * val->height);
	285	state_save_register_memory(machine, module, tag, index, name, val->base, val->bpp / 8, val->rowpixels * val->height, file, line);
287	286	}
288	287
289	288
r6740	r6741
312	311	fatalerror("Duplicate save state function (%p, %p)", param, func);
313	312
314	313	/* allocate a new entry */
315		*cbptr = alloc_or_die(state_callback);
	314	*cbptr = auto_alloc(machine, state_callback);
316	315
317	316	/* fill it in */
318	317	(*cbptr)->next         = NULL;
319	318	(*cbptr)->machine      = machine;
320	319	(*cbptr)->func.presave = func;
321	320	(*cbptr)->param        = param;
322		restrack_register_object(OBJTYPE_STATEREG, *cbptr, 1, __FILE__, __LINE__);
323	321	}
324	322
325	323
r6740	r6741
343	341	fatalerror("Duplicate save state function (%p, %p)", param, func);
344	342
345	343	/* allocate a new entry */
346		*cbptr = alloc_or_die(state_callback);
	344	*cbptr = auto_alloc(machine, state_callback);
347	345
348	346	/* fill it in */
349	347	(*cbptr)->next          = NULL;
350	348	(*cbptr)->machine       = machine;
351	349	(*cbptr)->func.postload = func;
352	350	(*cbptr)->param         = param;
353		restrack_register_object(OBJTYPE_STATEREG, *cbptr, 2, __FILE__, __LINE__);
354	351	}
355	352
356	353
357	354
358	355	/***************************************************************************
359		REGISTRATION FREEING
360		***************************************************************************/
361
362		/*-------------------------------------------------
363		func_free - free registered functions attached
364		to the current resource tag
365		-------------------------------------------------*/
366
367		static void func_free(state_callback **rootptr, void *ptr)
368		{
369		state_callback **cbptr;
370
371		/* iterate over the function list */
372		for (cbptr = rootptr; *cbptr != NULL; cbptr = &(*cbptr)->next)
373		if (*cbptr == ptr)
374		{
375		state_callback *cb = *cbptr;
376
377		/* de-link us from the list and free our memory */
378		*cbptr = (*cbptr)->next;
379		free(cb);
380		break;
381		}
382		}
383
384
385		/*-------------------------------------------------
386		state_save_free - free all registrations that
387		have been tagged with the current resource
388		tag
389		-------------------------------------------------*/
390
391		void state_destructor(void *ptr, size_t size)
392		{
393		state_private *global = NULL;
394
395		/* size of 0 means an entry */
396		if (size == 0)
397		{
398		state_entry **entryptr;
399
400		/* iterate over entries */
401		global = ((state_entry *)ptr)->machine->state_data;
402		for (entryptr = &global->entrylist; *entryptr != NULL; entryptr = &(*entryptr)->next)
403		if (*entryptr == ptr)
404		{
405		state_entry *entry = *entryptr;
406
407		/* de-link us from the list and free our memory */
408		*entryptr = (*entryptr)->next;
409		astring_free(entry->name);
410		free(entry);
411		break;
412		}
413		}
414
415		/* size of 1 means a pre function */
416		else if (size == 1)
417		{
418		global = ((state_callback *)ptr)->machine->state_data;
419		func_free(&global->prefunclist, ptr);
420		}
421
422		/* size of 2 means a post function */
423		else if (size == 2)
424		{
425		global = ((state_callback *)ptr)->machine->state_data;
426		func_free(&global->postfunclist, ptr);
427		}
428
429		/* if we're clear of all registrations, reset the invalid counter */
430		if (global != NULL && global->entrylist == NULL && global->prefunclist == NULL && global->postfunclist == NULL)
431		global->illegal_regs = 0;
432		}
433
434
435
436		/***************************************************************************
437	356	PROCESSING HELPERS
438	357	***************************************************************************/
439	358

src/emu/timer.c

r6740	r6741
644	644	/* if we're not temporary, register ourselves with the save state system */
645	645	if (!temp)
646	646	{
	647	if (!state_save_registration_allowed(machine))
	648	fatalerror("timer_alloc() called after save state registration closed! (file %s, line %d)\n", file, line);
647	649	timer_register_save(timer);
648	650	restrack_register_object(OBJTYPE_TIMER, timer, 0, file, line);
649	651	}

src/emu/clifront.h

r6740	r6741
54	54	int cli_info_listcrc(core_options *options, const char *gamename);
55	55	int cli_info_listroms(core_options *options, const char *gamename);
56	56	int cli_info_listsamples(core_options *options, const char *gamename);
	57	int cli_info_listdevices(core_options *options, const char *gamename);
57	58
58	59	#endif   /* __CLIFRONT_H__ */

src/emu/state.h

r6740	r6741
67	67	#define state_save_register_generic(_mach, _mod, _tag, _index, _name, _val, _valsize, _count)       \
68	68	do {                                                                        \
69	69	assert_always(IS_VALID_SAVE_TYPE(_valsize), "Invalid data type supplied for state saving.");   \
70		state_save_register_memory(_mach, _mod, _tag, _index, _name, _val, sizeof(_valsize), _count);   \
	70	state_save_register_memory(_mach, _mod, _tag, _index, _name, _val, sizeof(_valsize), _count, __FILE__, __LINE__);   \
71	71	} while (0)
72	72
73	73
r6740	r6741
85	85	state_save_register_item_pointer(_mach, _mod, _tag, _index, _val[0], sizeof(_val)/sizeof(_val[0][0]))
86	86
87	87	#define state_save_register_item_bitmap(_mach, _mod, _tag, _index, _val)   \
88		state_save_register_bitmap(_mach, _mod, _tag, _index, #_val, _val)
	88	state_save_register_bitmap(_mach, _mod, _tag, _index, #_val, _val, __FILE__, __LINE__)
89	89
90	90
91	91
r6740	r6741
103	103	state_save_register_item_pointer((_dev)->machine, device_get_name(_dev), (_dev)->tag, _index, _val[0], sizeof(_val)/sizeof(_val[0][0]))
104	104
105	105	#define state_save_register_device_item_bitmap(_dev, _index, _val)   \
106		state_save_register_bitmap((_dev)->machine, device_get_name(_dev), (_dev)->tag, _index, #_val, _val)
	106	state_save_register_bitmap((_dev)->machine, device_get_name(_dev), (_dev)->tag, _index, #_val, _val, __FILE__, __LINE__)
107	107
108	108
109	109
r6740	r6741
121	121	state_save_register_item_2d_array(_mach, "globals", NULL, 0, _val)
122	122
123	123	#define state_save_register_global_bitmap(_mach, _val) \
124		state_save_register_bitmap(_mach, "globals", NULL, 0, #_val, _val)
	124	state_save_register_bitmap(_mach, "globals", NULL, 0, #_val, _val, __FILE__, __LINE__)
125	125
126	126
127	127
r6740	r6741
149	149	int state_save_registration_allowed(running_machine *machine);
150	150
151	151	/* register an array of data in memory */
152		void state_save_register_memory(running_machine *machine, const char *module, const char *tag, UINT32 index, const char *name, void *val, UINT32 valsize, UINT32 valcount);
	152	void state_save_register_memory(running_machine *machine, const char *module, const char *tag, UINT32 index, const char *name, void *val, UINT32 valsize, UINT32 valcount, const char *file, int line);
153	153
154	154	/* register a bitmap to be saved */
155		void state_save_register_bitmap(running_machine *machine, const char *module, const char *tag, UINT32 index, const char *name, bitmap_t *val);
	155	void state_save_register_bitmap(running_machine *machine, const char *module, const char *tag, UINT32 index, const char *name, bitmap_t *val, const char *file, int line);
156	156
157	157
158	158
r6740	r6741
166	166
167	167
168	168
169		/* ----- registration freeing ----- */
170
171		/* free all registrations that have been tagged with the current resource tag */
172		void state_destructor(void *ptr, size_t size);
173
174
175
176	169	/* ----- save state file processing ----- */
177	170
178	171	/* check if a file is a valid save state */

src/emu/romload.c

r6740	r6741
1242	1242	static UINT32 normalize_flags_for_cpu(running_machine *machine, UINT32 startflags, const char *rgntag)
1243	1243	{
1244	1244	const device_config *device = cputag_get_cpu(machine, rgntag);
1245		if (device != NULL)
	1245	if (device != NULL && cpu_get_databus_width(device, ADDRESS_SPACE_PROGRAM) != 0)
1246	1246	{
1247	1247	int buswidth;
1248	1248

src/lib/util/pool.c

r6740	r6741
138	138
139	139
140	140	/*-------------------------------------------------
141		hash_object - compute the hash for a given
142		object
	141	get_object_type - return the type entry for
	142	a given object type
143	143	-------------------------------------------------*/
144	144
145	145	INLINE objtype_entry *get_object_type(object_pool *pool, object_type type)

src/mess/video/mbee.c

r6740	r6741
45	45	static UINT8 mbee_pcg_color_latch = 0;
46	46
47	47	UINT8 *mbee_pcgram;
48
	48	static UINT8 *colorram;
49	49	static UINT8 mc6845_cursor[16];            // cursor shape
50	50	static void mc6845_cursor_configure(void);
51	51	static void mc6845_screen_configure(running_machine *machine);
r6740	r6741
79	79	if( (m6545_video_bank & 0x01) || (mbee_pcg_color_latch & 0x40) == 0 )
80	80	mbee_pcgram[0x0800 | offset] = data;
81	81	else
82		space->machine->generic.colorram.u8[offset] = data;
	82	colorram[offset] = data;
83	83	}
84	84
85	85	static const char *const keynames[] = { "LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7" };
r6740	r6741
467	467	{
468	468	UINT8 *ram = memory_region(machine, "maincpu");
469	469	machine->generic.videoram.u8 = ram+0x15000;
470		machine->generic.colorram.u8 = ram+0x15800;
	470	colorram = ram+0x15800;
471	471	mbee_pcgram = ram+0x11000;
472	472	}
473	473
r6740	r6741
541	541	UINT8 inv=0;
542	542	mem = (x + screen_home) & 0x7ff;
543	543	chr = screen->machine->generic.videoram.u8[mem];
544		col = screen->machine->generic.colorram.u8[mem] | colourm;               // read a byte of colour
	544	col = colorram[mem] | colourm;               // read a byte of colour
545	545	if ((x & 15) == 0) keyboard_matrix_r(screen->machine, x);   // actually happens for every scanline of every character, but imposes too much unnecessary overhead */
546	546
547	547	/* process cursor */

src/mess/video/mz700.c

r6740	r6741
49	49	VIDEO_UPDATE( mz700 )
50	50	{
51	51	int offs;
	52	mz_state *mz = screen->machine->driver_data;
52	53
53	54	bitmap_fill(bitmap, cliprect, get_black_pen(screen->machine));
54	55
r6740	r6741
59	60	sy = (offs / 40) * 8;
60	61	sx = (offs % 40) * 8;
61	62
62		color = screen->machine->generic.colorram.u8[offs];
	63	color = mz->colorram[offs];
63	64	code = screen->machine->generic.videoram.u8[offs] | (color & 0x80) << 1;
64	65
65	66	drawgfx_opaque(bitmap, cliprect, screen->machine->gfx[0], code, color, 0, 0, sx, sy);

src/mess/video/cgenie.c

r6740	r6741
283	283
284	284	/* translate defined character sets */
285	285	code += cgenie_font_offset[(code >> 6) & 3];
286		drawgfx_opaque(bitmap, &r, machine->gfx[0], code, machine->generic.colorram.u8[i&0x3ff],
	286	drawgfx_opaque(bitmap, &r, machine->gfx[0], code, cgenie_colorram[i&0x3ff],
287	287	0, 0, r.min_x, r.min_y);
288	288	}
289	289
r6740	r6741
312	312	rc.max_x = r.max_x;
313	313	rc.min_y = r.min_y + (crt.cursor_top & 15);
314	314	rc.max_y = r.min_y + (crt.cursor_bottom & 15);
315		drawgfx_opaque(bitmap, &rc, machine->gfx[0], 0x7f, machine->generic.colorram.u8[i&0x3ff],
	315	drawgfx_opaque(bitmap, &rc, machine->gfx[0], 0x7f, cgenie_colorram[i&0x3ff],
316	316	0, 0, rc.min_x, rc.min_y);
317	317	}
318	318	}
r6740	r6741
364	364
365	365	/* translate defined character sets */
366	366	code += cgenie_font_offset[(code >> 6) & 3];
367		drawgfx_opaque(machine->generic.tmpbitmap, &r, machine->gfx[0], code, machine->generic.colorram.u8[i&0x3ff] + 16,
	367	drawgfx_opaque(machine->generic.tmpbitmap, &r, machine->gfx[0], code, cgenie_colorram[i&0x3ff] + 16,
368	368	0, 0, r.min_x, r.min_y);
369		drawgfx_opaque(dlybitmap, &r, machine->gfx[0], code, machine->generic.colorram.u8[i&0x3ff] + 32,
	369	drawgfx_opaque(dlybitmap, &r, machine->gfx[0], code, cgenie_colorram[i&0x3ff] + 32,
370	370	0, 0, r.min_x, r.min_y);
371	371	}
372	372
r6740	r6741
396	396	rc.min_y = r.min_y + (crt.cursor_top & 15);
397	397	rc.max_y = r.min_y + (crt.cursor_bottom & 15);
398	398
399		drawgfx_opaque(machine->generic.tmpbitmap, &rc, machine->gfx[0], 0x7f, machine->generic.colorram.u8[i&0x3ff] + 16,
	399	drawgfx_opaque(machine->generic.tmpbitmap, &rc, machine->gfx[0], 0x7f, cgenie_colorram[i&0x3ff] + 16,
400	400	0, 0, rc.min_x, rc.min_y);
401		drawgfx_opaque(dlybitmap, &rc, machine->gfx[0], 0x7f, machine->generic.colorram.u8[i&0x3ff] + 32,
	401	drawgfx_opaque(dlybitmap, &rc, machine->gfx[0], 0x7f, cgenie_colorram[i&0x3ff] + 32,
402	402	0, 0, rc.min_x, rc.min_y);
403	403	}
404	404	}

src/mess/video/aquarius.c

r6740	r6741
11	11
12	12	static tilemap *aquarius_tilemap;
13	13
	14	UINT8 *aquarius_colorram;
	15
14	16	static const rgb_t aquarius_colors[] =
15	17	{
16	18	RGB_BLACK,               /* Black */
r6740	r6741
72	74
73	75	WRITE8_HANDLER( aquarius_colorram_w )
74	76	{
75		space->machine->generic.colorram.u8[offset] = data;
	77	aquarius_colorram[offset] = data;
76	78	tilemap_mark_tile_dirty(aquarius_tilemap, offset);
77	79	}
78	80
r6740	r6741
80	82	{
81	83	int bank = 0;
82	84	int code = machine->generic.videoram.u8[tile_index];
83		int color = machine->generic.colorram.u8[tile_index];
	85	int color = aquarius_colorram[tile_index];
84	86	int flags = 0;
85	87
86	88	SET_TILE_INFO(bank, code, color, flags);

src/mess/video/super80.c

r6740	r6741
19	19	static UINT8 chr,col,gfx,fg,bg;
20	20	static UINT16 mem,x;
21	21	static UINT8 options;
	22	extern UINT8 *super80_colorram;
22	23
23
24	24	/**************************** PALETTES for super80m and super80v ******************************************/
25	25
26	26	static const UINT8 super80_rgb_palette[16*3] =
r6740	r6741
307	307	if (super80_shared & 4)
308	308	return space->machine->generic.videoram.u8[offset];
309	309	else
310		return space->machine->generic.colorram.u8[offset];
	310	return super80_colorram[offset];
311	311	}
312	312
313	313	WRITE8_HANDLER( super80v_low_w )
r6740	r6741
315	315	if (super80_shared & 4)
316	316	space->machine->generic.videoram.u8[offset] = data;
317	317	else
318		space->machine->generic.colorram.u8[offset] = data;
	318	super80_colorram[offset] = data;
319	319	}
320	320
321	321	READ8_HANDLER( super80v_high_r )
322	322	{
323	323	if (~super80_shared & 4)
324		return space->machine->generic.colorram.u8[0x800+offset];
	324	return super80_colorram[0x800+offset];
325	325
326	326	if (super80_shared & 0x10)
327	327	return super80_pcgram[0x800+offset];
r6740	r6741
332	332	WRITE8_HANDLER( super80v_high_w )
333	333	{
334	334	if (~super80_shared & 4)
335		space->machine->generic.colorram.u8[offset+0x800] = data;
	335	super80_colorram[offset+0x800] = data;
336	336	else
337	337	{
338	338	space->machine->generic.videoram.u8[offset+0x800] = data;
r6740	r6741
429	429
430	430	if (~options & 0x40)
431	431	{
432		col = device->machine->generic.colorram.u8[mem];               /* byte of colour to display */
	432	col = super80_colorram[mem];               /* byte of colour to display */
433	433	fg = col & 0x0f;
434	434	bg = (col & 0xf0) >> 4;
435	435	}

src/mess/includes/mz700.h

r6740	r6741
42	42
43	43	int hires_mode;         /* 1 if in 640x200 mode */
44	44	int screen;          /* screen designation */
	45	UINT8 *colorram;
45	46	};
46	47
47	48

src/mess/includes/cgenie.h

r6740	r6741
15	15	WRITE8_DEVICE_HANDLER( cgenie_sh_control_port_w );
16	16
17	17	extern UINT8 *cgenie_fontram;
	18	extern UINT8 *cgenie_colorram;
18	19	extern const wd17xx_interface cgenie_wd17xx_interface;
19	20
20	21	extern int cgenie_tv_mode;

src/mess/includes/aquarius.h

r6740	r6741
9	9
10	10	/*----------- defined in video/aquarius.c -----------*/
11	11
	12	extern UINT8 *aquarius_colorram;
12	13	WRITE8_HANDLER( aquarius_videoram_w );
13	14	WRITE8_HANDLER( aquarius_colorram_w );
14	15

src/mess/includes/geneve.h

r6740	r6741
43	43	WRITE8_HANDLER ( geneve_peb_mode_cru_w );
44	44
45	45	extern const tms9901_interface tms9901reset_param_ti99;
	46	void ti99_clk_interrupt_callback(const device_config *device, int state);
46	47
47	48	#endif /* GENEVE_H_ */

src/mess/machine/mz700.c

r6740	r6741
89	89
90	90	machine->generic.videoram_size = 0x800;
91	91	machine->generic.videoram.u8 = auto_alloc_array(machine, UINT8, machine->generic.videoram_size);
92		machine->generic.colorram.u8 = auto_alloc_array(machine, UINT8, 0x800);
	92	mz->colorram = auto_alloc_array(machine, UINT8, 0x800);
93	93	}
94	94
95	95	DRIVER_INIT( mz800 )
r6740	r6741
101	101	/* video ram */
102	102	machine->generic.videoram_size = 0x4000;
103	103	machine->generic.videoram.u8 = auto_alloc_array(machine, UINT8, machine->generic.videoram_size);
104		machine->generic.colorram.u8 = machine->generic.videoram.u8 + 0x800;
	104	mz->colorram = machine->generic.videoram.u8 + 0x800;
105	105
106	106	/* character generator ram */
107	107	mz->cgram = auto_alloc_array(machine, UINT8, 0x1000);
r6740	r6741
274	274
275	275	/* switch in colorram */
276	276	memory_install_readwrite_bank(spc, 0xd800, 0xdfff, 0, 0, "bank9");
277		memory_set_bankptr(space->machine, "bank9", space->machine->generic.colorram.u8);
	277	memory_set_bankptr(space->machine, "bank9", mz->colorram);
278	278
279	279	mz->mz700_ram_vram = TRUE;
280	280

src/mess/machine/cgenie.c

r6740	r6741
25	25	#define TAPE_HEADER "Colour Genie - Virtual Tape File"
26	26
27	27	UINT8 *cgenie_fontram;
	28	UINT8 *cgenie_colorram;
28	29
29	30
30	31	int cgenie_tv_mode = -1;
r6740	r6741
531	532
532	533	READ8_HANDLER( cgenie_colorram_r )
533	534	{
534		return space->machine->generic.colorram.u8[offset] | 0xf0;
	535	return cgenie_colorram[offset] | 0xf0;
535	536	}
536	537
537	538	WRITE8_HANDLER( cgenie_colorram_w )
r6740	r6741
539	540	/* only bits 0 to 3 */
540	541	data &= 15;
541	542	/* nothing changed ? */
542		if( data == space->machine->generic.colorram.u8[offset] )
	543	if( data == cgenie_colorram[offset] )
543	544	return;
544	545
545	546	/* set new value */
546		space->machine->generic.colorram.u8[offset] = data;
	547	cgenie_colorram[offset] = data;
547	548	/* make offset relative to video frame buffer offset */
548	549	offset = (offset + (cgenie_get_register(12) << 8) + cgenie_get_register(13)) & 0x3ff;
549	550	}

src/mess/machine/super80.c

r6740	r6741
15	15	d2 super80 screen off (=2mhz) or on (bursts of 2mhz at 50hz = 1mhz) */
16	16
17	17	UINT8 super80_shared=0xff;
18
	18	UINT8 *super80_colorram;
19	19	static const device_config *super80_z80pio;
20	20	static const device_config *super80_speaker;
21	21	static const device_config *super80_cassette;
r6740	r6741
273	273	{
274	274	super80_pcgram = memory_region(machine, "maincpu")+0xf000;
275	275	machine->generic.videoram.u8 = memory_region(machine, "maincpu")+0x18000;
276		machine->generic.colorram.u8 = memory_region(machine, "maincpu")+0x1C000;
	276	super80_colorram = memory_region(machine, "maincpu")+0x1C000;
277	277	driver_init_common(machine);
278	278	}
279	279

src/mess/machine/geneve.c

r6740	r6741
84	84	static int KeyAutoRepeatKey;
85	85	static int KeyAutoRepeatTimer;
86	86
87		static void machine_stop_geneve(running_machine *machine);
88
89	87	/*
90	88	GROM support.
91	89
r6740	r6741
161	159	ti99_floppy_controllers_init_all(machine);
162	160	ti99_ide_init(machine);
163	161	ti99_usbsm_init(machine);
164		add_exit_callback(machine, machine_stop_geneve);
165	162
166	163	/* set up RAM pointers */
167	164	ROM_ptr = memory_region(machine, "maincpu") + offset_rom_geneve;
r6740	r6741
239	236	if (has_ide)
240	237	{
241	238	ti99_ide_reset(machine, TRUE);
242		ti99_ide_load_memcard(machine);
243	239	}
244	240
245	241	if (has_usb_sm)
r6740	r6741
249	245	cputag_reset(machine, "maincpu");
250	246	}
251	247
252		static void machine_stop_geneve(running_machine *machine)
253		{
254		if (has_ide)
255		ti99_ide_save_memcard();
256		}
257
258
259	248	/*
260	249	video initialization.
261	250	*/

src/mess/machine/99_ide.c

r6740	r6741
87	87
88	88	clock interrupt callback
89	89	*/
90		static void clk_interrupt_callback(running_machine *machine, int state)
	90	void ti99_clk_interrupt_callback(const device_config *device, int state)
91	91	{
92	92	clk_irq = state;
93		ti99_peb_set_ila_bit(machine, inta_ide_clk_bit, state);
	93	ti99_peb_set_ila_bit(device->machine, inta_ide_clk_bit, state);
94	94	}
95	95
96	96	/*
r6740	r6741
98	98	*/
99	99	void ti99_ide_init(running_machine *machine)
100	100	{
101		rtc65271_init(machine, memory_region(machine, region_dsr) + offset_ide_ram2, clk_interrupt_callback);
	101	//   rtc65271_init(machine, memory_region(machine, region_dsr) + offset_ide_ram2, clk_interrupt_callback);
102	102	ti99_ide_RAM = memory_region(machine, region_dsr) + offset_ide_ram;
103	103	}
104	104
r6740	r6741
116	116	tms9995_mode = in_tms9995_mode;
117	117	}
118	118
119		int ti99_ide_load_memcard(running_machine *machine)
120		{
121		file_error filerr;
122		mame_file *file;
123
124		filerr = mame_fopen(SEARCHPATH_MEMCARD, "ide.nv", OPEN_FLAG_READ, &file);
125		if (filerr != FILERR_NONE)
126		return /*1*/0;
127		if (rtc65271_file_load(machine, file))
128		{
129		mame_fclose(file);
130		return 1;
131		}
132
133		mame_fclose(file);
134		return 0;
135		}
136
137		int ti99_ide_save_memcard(void)
138		{
139		file_error filerr;
140		mame_file *file;
141
142		/*if (ti99_ide_get_dirty_flag())*/
143		{
144		filerr = mame_fopen(SEARCHPATH_MEMCARD, "ide.nv", OPEN_FLAG_WRITE, &file);
145		if (filerr != FILERR_NONE)
146		return 1;
147		if (rtc65271_file_save(file))
148		{
149		mame_fclose(file);
150		return 1;
151		}
152
153		mame_fclose(file);
154		}
155
156		return 0;
157		}
158
159	119	/*
160	120	Read ide CRU interface
161	121	*/
r6740	r6741
224	184	static READ8_HANDLER(ide_mem_r)
225	185	{
226	186	int reply = 0;
	187	const device_config *ide_rtc = devtag_get_device(space->machine, "ide_rtc");
227	188
228
229	189	if ((offset <= 0xff) && (sram_enable == sram_enable_dip))
230	190	{   /* registers */
231	191	switch ((offset >> 5) & 0x3)
r6740	r6741
233	193	case 0:      /* RTC RAM */
234	194	if (offset & 0x80)
235	195	/* RTC RAM page register */
236		reply = rtc65271_r(1, (offset & 0x1f) | 0x20);
	196	reply = rtc65271_xram_r(ide_rtc, (offset & 0x1f) | 0x20);
237	197	else
238	198	/* RTC RAM read */
239		reply = rtc65271_r(1, offset);
	199	reply = rtc65271_xram_r(ide_rtc, offset);
240	200	break;
241	201	case 1:      /* RTC registers */
242	202	if (offset & 0x10)
243	203	/* register data */
244		reply = rtc65271_r(0, 1);
	204	reply = rtc65271_rtc_r(ide_rtc, 1);
245	205	else
246	206	/* register select */
247		reply = rtc65271_r(0, 0);
	207	reply = rtc65271_rtc_r(ide_rtc, 0);
248	208	break;
249	209	case 2:      /* IDE registers set 1 (CS1Fx) */
250	210	if (tms9995_mode ? (!(offset & 1)) : (offset & 1))
r6740	r6741
288	248	*/
289	249	static WRITE8_HANDLER(ide_mem_w)
290	250	{
	251	const device_config *ide_rtc = devtag_get_device(space->machine, "ide_rtc");
	252
291	253	if (cru_register & cru_reg_page_switching)
292	254	{
293	255	cur_page = (offset >> 1) & page_mask;
r6740	r6741
300	262	case 0:      /* RTC RAM */
301	263	if (offset & 0x80)
302	264	/* RTC RAM page register */
303		rtc65271_w(1, (offset & 0x1f) | 0x20, data);
	265	rtc65271_xram_w(ide_rtc,(offset & 0x1f) | 0x20, data);
304	266	else
305	267	/* RTC RAM write */
306		rtc65271_w(1, offset, data);
	268	rtc65271_xram_w(ide_rtc,offset, data);
307	269	break;
308	270	case 1:      /* RTC registers */
309	271	if (offset & 0x10)
310	272	/* register data */
311		rtc65271_w(0, 1, data);
	273	rtc65271_rtc_w(ide_rtc, 1, data);
312	274	else
313	275	/* register select */
314		rtc65271_w(0, 0, data);
	276	rtc65271_rtc_w(ide_rtc, 0, data);
315	277	break;
316	278	case 2:      /* IDE registers set 1 (CS1Fx) */
317	279	#if 0

src/mess/machine/ti99_4x.c

r6740	r6741
596	596
597	597	if (has_ide) {
598	598	ti99_ide_reset(machine, ti99_model == model_99_8);
599		ti99_ide_load_memcard(machine);
600	599	}
601	600
602	601	if (has_hsgpl)   {
r6740	r6741
625	624	#ifdef UNUSED_FUNCTION
626	625	void machine_stop_ti99(void)
627	626	{
628		if (has_ide)
629		ti99_ide_save_memcard();
630
631	627	if (has_hsgpl)
632	628	ti99_hsgpl_save_memcard();
633	629

src/mess/machine/ti99_4x.h

r6740	r6741
198	198	extern const tms9901_interface tms9901reset_param_ti99_4x;
199	199	extern const tms9901_interface tms9901reset_param_ti99_8;
200	200
	201	void ti99_clk_interrupt_callback(const device_config *device, int state);

src/mess/mess.mak

r6740	r6741
84	84	CPUS += SH4
85	85	CPUS += DSP32C
86	86	CPUS += PIC16C5X
	87	CPUS += PIC16C62X
87	88	CPUS += G65816
88	89	CPUS += SPC700
89	90	CPUS += E1
r6740	r6741
188	189	SOUNDS += K051649
189	190	#SOUNDS += K053260
190	191	#SOUNDS += K054539
	192	#SOUNDS += K056800
191	193	#SOUNDS += SEGAPCM
192	194	#SOUNDS += MULTIPCM
193	195	SOUNDS += SCSP

src/mess/drivers/jaguar.c

r6740	r6741
161	161	jaguargpu_ctrl_w(cputag_get_cpu(machine, "gpu"), G_CTRL, 0, 0xffffffff);
162	162	jaguardsp_ctrl_w(cputag_get_cpu(machine, "audiocpu"), D_CTRL, 0, 0xffffffff);
163	163
164		/* init the sound system */
165		cojag_sound_reset(machine);
166
167	164	joystick_data = 0xffffffff;
168	165	eeprom_bit_count = 0;
169	166	}

src/mess/drivers/ti99_8.c

r6740	r6741
181	181	#include "machine/smc92x4.h"
182	182	#include "machine/mm58274c.h"
183	183	#include "devices/ti99cart.h"
	184	#include "machine/rtc65271.h"
184	185
185	186	/*
186	187	Memory map - see description above
r6740	r6741
472	473	MDRV_IMPORT_FROM( smc92x4_hd )
473	474
474	475	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	476	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
475	477
476	478	MDRV_CASSETTE_ADD( "cassette", default_cassette_config )
477	479
r6740	r6741
525	527	MDRV_IMPORT_FROM( smc92x4_hd )
526	528
527	529	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	530	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
528	531
529	532	MDRV_CASSETTE_ADD( "cassette", default_cassette_config )
530	533

src/mess/drivers/x1.c

r6740	r6741
228	228
229	229	static DEVICE_START(x1_daisy){}
230	230
	231	static UINT8 *x1_colorram;
231	232	/*************************************
232	233	*
233	234	*  Video Functions
r6740	r6741
236	237
237	238	static VIDEO_START( x1 )
238	239	{
239		machine->generic.colorram.u8 = auto_alloc_array(machine, UINT8, 0x1000);
	240	x1_colorram = auto_alloc_array(machine, UINT8, 0x1000);
240	241	machine->generic.videoram.u8 = auto_alloc_array(machine, UINT8, 0x1000);
241	242	gfx_bitmap_ram = auto_alloc_array(machine, UINT8, 0xc000*2);
242	243	}
r6740	r6741
253	254	for (x=0;x<40*w;x++)
254	255	{
255	256	int tile = machine->generic.videoram.u8[(x+(y*40*w)+crtc_start_addr) & screen_mask];
256		int color = machine->generic.colorram.u8[(x+(y*40*w)+crtc_start_addr) & screen_mask] & 0x1f;
257		int width = (machine->generic.colorram.u8[(x+(y*40*w)+crtc_start_addr) & screen_mask] & 0x80)>>7;
258		int height = (machine->generic.colorram.u8[(x+(y*40*w)+crtc_start_addr) & screen_mask] & 0x40)>>6;
259		int pcg_bank = (machine->generic.colorram.u8[(x+(y*40*w)+crtc_start_addr) & screen_mask] & 0x20)>>5;
	257	int color = x1_colorram[(x+(y*40*w)+crtc_start_addr) & screen_mask] & 0x1f;
	258	int width = (x1_colorram[(x+(y*40*w)+crtc_start_addr) & screen_mask] & 0x80)>>7;
	259	int height = (x1_colorram[(x+(y*40*w)+crtc_start_addr) & screen_mask] & 0x40)>>6;
	260	int pcg_bank = (x1_colorram[(x+(y*40*w)+crtc_start_addr) & screen_mask] & 0x20)>>5;
260	261	UINT8 *gfx_data = pcg_bank ? memory_region(machine, "pcg") : memory_region(machine, "cgrom");
261	262
262	263	/* skip draw if the x/y values are odd and the width/height is active, */
r6740	r6741
984	985
985	986	static UINT16 check_pcg_addr(running_machine *machine)
986	987	{
987		if(machine->generic.colorram.u8[0x7ff] & 0x20) return 0x7ff;
988		if(machine->generic.colorram.u8[0x3ff] & 0x20) return 0x3ff;
989		if(machine->generic.colorram.u8[0x5ff] & 0x20) return 0x5ff;
990		if(machine->generic.colorram.u8[0x1ff] & 0x20) return 0x1ff;
	988	if(x1_colorram[0x7ff] & 0x20) return 0x7ff;
	989	if(x1_colorram[0x3ff] & 0x20) return 0x3ff;
	990	if(x1_colorram[0x5ff] & 0x20) return 0x5ff;
	991	if(x1_colorram[0x1ff] & 0x20) return 0x1ff;
991	992
992	993	return 0x3ff;
993	994	}
994	995
995	996	static UINT16 check_chr_addr(running_machine *machine)
996	997	{
997		if(!(machine->generic.colorram.u8[0x7ff] & 0x20)) return 0x7ff;
998		if(!(machine->generic.colorram.u8[0x3ff] & 0x20)) return 0x3ff;
999		if(!(machine->generic.colorram.u8[0x5ff] & 0x20)) return 0x5ff;
1000		if(!(machine->generic.colorram.u8[0x1ff] & 0x20)) return 0x1ff;
	998	if(!(x1_colorram[0x7ff] & 0x20)) return 0x7ff;
	999	if(!(x1_colorram[0x3ff] & 0x20)) return 0x3ff;
	1000	if(!(x1_colorram[0x5ff] & 0x20)) return 0x5ff;
	1001	if(!(x1_colorram[0x1ff] & 0x20)) return 0x1ff;
1001	1002
1002	1003	return 0x3ff;
1003	1004	}
r6740	r6741
1319	1320	else if(offset >= 0x1fa8 && offset <= 0x1fab)   { return z80ctc_r(devtag_get_device(space->machine, "ctc"), offset-0x1fa8); }
1320	1321	//  else if(offset >= 0x1fd0 && offset <= 0x1fdf)   { return x1_scrn_r(space,offset-0x1fd0); }
1321	1322	//  else if(offset == 0x1fe0)                       { return x1_blackclip_r(space,0); }
1322		else if(offset >= 0x2000 && offset <= 0x2fff)   { return space->machine->generic.colorram.u8[offset-0x2000]; }
	1323	else if(offset >= 0x2000 && offset <= 0x2fff)   { return x1_colorram[offset-0x2000]; }
1323	1324	else if(offset >= 0x3000 && offset <= 0x3fff)   { return space->machine->generic.videoram.u8[offset-0x3000]; }
1324	1325	else if(offset >= 0x4000 && offset <= 0xffff)   { return gfx_bitmap_ram[offset-0x4000+(scrn_reg.gfx_bank*0xc000)]; }
1325	1326	else
r6740	r6741
1360	1361	//  else if(offset == 0x1fc5)                       { x1turbo_gfxpal_w(space,0,data); }
1361	1362	else if(offset >= 0x1fd0 && offset <= 0x1fdf)   { x1_scrn_w(space,0,data); }
1362	1363	//  else if(offset == 0x1fe0)                       { x1_blackclip_w(space,0,data); }
1363		else if(offset >= 0x2000 && offset <= 0x2fff)   { space->machine->generic.colorram.u8[offset-0x2000] = data; }
	1364	else if(offset >= 0x2000 && offset <= 0x2fff)   { x1_colorram[offset-0x2000] = data; }
1364	1365	else if(offset >= 0x3000 && offset <= 0x3fff)   { space->machine->generic.videoram.u8[offset-0x3000] = pcg_write_addr = data; }
1365	1366	else if(offset >= 0x4000 && offset <= 0xffff)   { gfx_bitmap_ram[offset-0x4000+(scrn_reg.gfx_bank*0xc000)] = data; }
1366	1367	else
r6740	r6741
1393	1394	else if(offset == 0x1fc5)                  { return x1turbo_gfxpal_r(space,0); }
1394	1395	//  else if(offset >= 0x1fd0 && offset <= 0x1fdf)   { return x1_scrn_r(space,offset-0x1fd0); }
1395	1396	else if(offset == 0x1fe0)                  { return x1_blackclip_r(space,0); }
1396		else if(offset >= 0x2000 && offset <= 0x2fff)   { return space->machine->generic.colorram.u8[offset-0x2000]; }
	1397	else if(offset >= 0x2000 && offset <= 0x2fff)   { return x1_colorram[offset-0x2000]; }
1397	1398	else if(offset >= 0x3000 && offset <= 0x3fff)   { return space->machine->generic.videoram.u8[offset-0x3000]; }
1398	1399	else if(offset >= 0x4000 && offset <= 0xffff)   { return gfx_bitmap_ram[offset-0x4000+(scrn_reg.gfx_bank*0xc000)]; }
1399	1400	else
r6740	r6741
1437	1438	else if(offset == 0x1fc5)                  { x1turbo_gfxpal_w(space,0,data); }
1438	1439	else if(offset >= 0x1fd0 && offset <= 0x1fdf)   { x1_scrn_w(space,0,data); }
1439	1440	else if(offset == 0x1fe0)                  { x1_blackclip_w(space,0,data); }
1440		else if(offset >= 0x2000 && offset <= 0x2fff)   { space->machine->generic.colorram.u8[offset-0x2000] = data; }
	1441	else if(offset >= 0x2000 && offset <= 0x2fff)   { x1_colorram[offset-0x2000] = data; }
1441	1442	else if(offset >= 0x3000 && offset <= 0x3fff)   { space->machine->generic.videoram.u8[offset-0x3000] = pcg_write_addr = data; }
1442	1443	else if(offset >= 0x4000 && offset <= 0xffff)   { gfx_bitmap_ram[offset-0x4000+(scrn_reg.gfx_bank*0xc000)] = data; }
1443	1444	else

src/mess/drivers/ng_aes.c

r6740	r6741
114	114	}
115	115
116	116
117		void neogeo_set_display_position_interrupt_control(UINT16 data)
	117	void neogeo_set_display_position_interrupt_control(running_machine *machine,UINT16 data)
118	118	{
119	119	display_position_interrupt_control = data;
120	120	}
r6740	r6741
764	764	case 0x01: set_main_cpu_vector_table_source(space->machine, bit);
765	765	set_audio_cpu_rom_source(space, bit); /* this is a guess */
766	766	break;
767		case 0x05: neogeo_set_fixed_layer_source(bit); break;
	767	case 0x05: neogeo_set_fixed_layer_source(space->machine,bit); break;
768	768	case 0x06: set_save_ram_unlock(bit); break;
769	769	case 0x07: neogeo_set_palette_bank(space->machine, bit); break;
770	770
r6740	r6741
855	855	system_control_w(space, offs, 0, 0x00ff);
856	856	device_reset(cputag_get_cpu(machine, "maincpu"));
857	857
858		neogeo_reset_rng();
	858	neogeo_reset_rng(machine);
859	859
860	860	start_interrupt_timers(machine);
861	861
r6740	r6741
863	863	update_interrupts(machine);
864	864
865	865	/* AES apparently always uses the cartridge's fixed bank mode */
866		neogeo_set_fixed_layer_source(1);
	866	neogeo_set_fixed_layer_source(machine,1);
867	867	}
868	868
869	869

src/mess/drivers/cgenie.c

r6740	r6741
43	43	//  AM_RANGE(0x4000, 0xbfff) AM_RAM // set up in MACHINE_START
44	44	//  AM_RANGE(0xc000, 0xdfff) AM_ROM // installed in cgenie_init_machine
45	45	//  AM_RANGE(0xe000, 0xefff) AM_ROM // installed in cgenie_init_machine
46		AM_RANGE(0xf000, 0xf3ff) AM_READWRITE( cgenie_colorram_r, cgenie_colorram_w ) AM_BASE_GENERIC( colorram )
	46	AM_RANGE(0xf000, 0xf3ff) AM_READWRITE( cgenie_colorram_r, cgenie_colorram_w ) AM_BASE( &cgenie_colorram )
47	47	AM_RANGE(0xf400, 0xf7ff) AM_READWRITE( cgenie_fontram_r, cgenie_fontram_w) AM_BASE( &cgenie_fontram )
48	48	AM_RANGE(0xf800, 0xf8ff) AM_READ( cgenie_keyboard_r )
49	49	AM_RANGE(0xf900, 0xffdf) AM_NOP

src/mess/drivers/aquarius.c

r6740	r6741
232	232	static ADDRESS_MAP_START( aquarius_mem, ADDRESS_SPACE_PROGRAM, 8 )
233	233	AM_RANGE(0x0000, 0x1fff) AM_ROM
234	234	AM_RANGE(0x3000, 0x33ff) AM_RAM_WRITE(aquarius_videoram_w) AM_BASE_SIZE_GENERIC(videoram)
235		AM_RANGE(0x3400, 0x37ff) AM_RAM_WRITE(aquarius_colorram_w) AM_BASE_GENERIC(colorram)
	235	AM_RANGE(0x3400, 0x37ff) AM_RAM_WRITE(aquarius_colorram_w) AM_BASE(&aquarius_colorram)
236	236	AM_RANGE(0x3800, 0x3fff) AM_RAM
237	237	AM_RANGE(0x4000, 0xbfff) AM_NOP /* expansion ram */
238	238	AM_RANGE(0xc000, 0xffff) AM_READ(cartridge_r)

src/mess/drivers/geneve.c

r6740	r6741
218	218	#include "machine/idectrl.h"
219	219	#include "machine/smc92x4.h"
220	220	#include "machine/mm58274c.h"
	221	#include "machine/rtc65271.h"
221	222
222
223	223	/*
224	224	memory map
225	225	*/
r6740	r6741
510	510	MDRV_IMPORT_FROM( smc92x4_hd )
511	511
512	512	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	513	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
513	514
514	515	/* rtc */
515	516	MDRV_MM58274C_ADD("mm58274c", geneve_mm58274c_interface)

src/mess/drivers/ti99_4p.c

r6740	r6741
58	58	#include "devices/harddriv.h"
59	59	#include "machine/idectrl.h"
60	60	#include "machine/smc92x4.h"
	61	#include "machine/rtc65271.h"
61	62
62	63	static ADDRESS_MAP_START(memmap, ADDRESS_SPACE_PROGRAM, 16)
63	64	AM_RANGE(0x0000, 0x1fff) AM_ROMBANK("bank1")                        /*system ROM*/
r6740	r6741
297	298	MDRV_IMPORT_FROM( smc92x4_hd )
298	299
299	300	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	301	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
300	302
301	303	/* MDRV_CASSETTE_ADD( "cassette", default_cassette_config ) */
302	304

src/mess/drivers/ti99_4x.c

r6740	r6741
41	41	#include "machine/idectrl.h"
42	42	#include "machine/smc92x4.h"
43	43	#include "machine/mm58274c.h"
44
	44	#include "machine/rtc65271.h"
45	45	#include "devices/ti99cart.h"
46	46
47	47	/*
r6740	r6741
561	561
562	562	MDRV_IMPORT_FROM( smc92x4_hd )
563	563
564		MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	564	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	565	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
565	566
566	567	MDRV_CASSETTE_ADD( "cassette1", default_cassette_config )
567	568	MDRV_CASSETTE_ADD( "cassette2", default_cassette_config )
r6740	r6741
615	616	MDRV_IMPORT_FROM( smc92x4_hd )
616	617
617	618	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	619	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
618	620
619	621	MDRV_CASSETTE_ADD( "cassette1", default_cassette_config )
620	622	MDRV_CASSETTE_ADD( "cassette2", default_cassette_config )
r6740	r6741
667	669	MDRV_IMPORT_FROM( smc92x4_hd )
668	670
669	671	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	672	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
670	673
671	674	MDRV_CASSETTE_ADD( "cassette1", default_cassette_config )
672	675	MDRV_CASSETTE_ADD( "cassette2", default_cassette_config )
r6740	r6741
721	724	MDRV_IMPORT_FROM( smc92x4_hd )
722	725
723	726	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	727	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
724	728
725	729	MDRV_CASSETTE_ADD( "cassette1", default_cassette_config )
726	730	MDRV_CASSETTE_ADD( "cassette2", default_cassette_config )
r6740	r6741
782	786	MDRV_IMPORT_FROM( smc92x4_hd )
783	787
784	788	MDRV_IDE_HARDDISK_ADD( "ide_harddisk" )
	789	MDRV_RTC65271_ADD("ide_rtc", ti99_clk_interrupt_callback)
785	790
786	791	MDRV_CASSETTE_ADD( "cassette1", default_cassette_config )
787	792	MDRV_CASSETTE_ADD( "cassette2", default_cassette_config )

docs/messnew.txt

r6740	r6741
127	127
128	128	Source Changes:
129	129	----------------
130		- The core is based on MAME 0.135u3.  This incorporates all features of the
	130	- The core is based on MAME 0.135u4.  This incorporates all features of the
131	131	update to this core.  [MAME team]
132	132
133	133	- Cleanups (static qualifiers, headers, renames, reduced global symbols, dead

makefile

r6740	r6741
365	365	# add core include paths
366	366	CCOMFLAGS += \
367	367	-I$(SRC)/$(TARGET) \
368		-I$(SRC)/$(TARGET)/includes \
369	368	-I$(OBJ)/$(TARGET)/layout \
370	369	-I$(SRC)/emu \
371	370	-I$(OBJ)/emu \

Previous

15994 Revisions

Next

---

© 1998-2018 The MESS Team