src/mess/drivers/gp32.c
| r6575 | r6576 | |
| 115 | 115 | } |
| 116 | 116 | break; |
| 117 | 117 | } |
| 118 | // logerror( "(LCD) %08X -> %08X (PC %08X)\n", 0x14A00000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 118 | 119 | return data; |
| 119 | 120 | } |
| 120 | 121 | |
| 121 | 122 | static WRITE32_HANDLER( s3c240x_vidregs_w ) |
| 122 | 123 | { |
| 123 | | // logerror( "(LCD) %08X <- %08X\n", 0x14A00000 + (offset << 2), data); |
| 124 | // logerror( "(LCD) %08X <- %08X (PC %08X)\n", 0x14A00000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 124 | 125 | COMBINE_DATA(&s3c240x_vidregs[offset]); |
| 125 | 126 | } |
| 126 | 127 | |
| r6575 | r6576 | |
| 187 | 188 | |
| 188 | 189 | static WRITE32_HANDLER( s3c240x_clkpow_w ) |
| 189 | 190 | { |
| 190 | | // logerror( "(CLKPOW) %08X <- %08X\n", 0x14800000 + (offset << 2), data); |
| 191 | // logerror( "(CLKPOW) %08X <- %08X (PC %08X)\n", 0x14800000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 191 | 192 | COMBINE_DATA(&s3c240x_clkpow_regs[offset]); |
| 192 | 193 | switch (offset) |
| 193 | 194 | { |
| r6575 | r6576 | |
| 204 | 205 | |
| 205 | 206 | static UINT32 s3c240x_irq_regs[0x18/4]; |
| 206 | 207 | |
| 208 | static void s3c240x_check_pending_irq( running_machine *machine) |
| 209 | { |
| 210 | if (s3c240x_irq_regs[0] != 0) |
| 211 | { |
| 212 | UINT32 int_type = 0, temp; |
| 213 | temp = s3c240x_irq_regs[0]; |
| 214 | while (!(temp & 1)) |
| 215 | { |
| 216 | int_type++; |
| 217 | temp = temp >> 1; |
| 218 | } |
| 219 | s3c240x_irq_regs[4] |= (1 << int_type); // INTPND |
| 220 | s3c240x_irq_regs[5] = int_type; // INTOFFSET |
| 221 | cpu_set_input_line( cputag_get_cpu( machine, "maincpu"), ARM7_IRQ_LINE, ASSERT_LINE); |
| 222 | } |
| 223 | else |
| 224 | { |
| 225 | cpu_set_input_line( cputag_get_cpu( machine, "maincpu"), ARM7_IRQ_LINE, CLEAR_LINE); |
| 226 | } |
| 227 | } |
| 228 | |
| 229 | static void s3c240x_request_irq( running_machine *machine, UINT32 int_type) |
| 230 | { |
| 231 | // logerror( "request irq %d\n", int_type); |
| 232 | // logerror( "(1) %08X %08X %08X %08X %08X %08X\n", s3c240x_irq_regs[0], s3c240x_irq_regs[1], s3c240x_irq_regs[2], s3c240x_irq_regs[3], s3c240x_irq_regs[4], s3c240x_irq_regs[5]); |
| 233 | if (s3c240x_irq_regs[0] == 0) |
| 234 | { |
| 235 | s3c240x_irq_regs[0] |= (1 << int_type); // SRCPND |
| 236 | s3c240x_irq_regs[4] |= (1 << int_type); // INTPND |
| 237 | s3c240x_irq_regs[5] = int_type; // INTOFFSET |
| 238 | cpu_set_input_line( cputag_get_cpu( machine, "maincpu"), ARM7_IRQ_LINE, ASSERT_LINE); |
| 239 | } |
| 240 | else |
| 241 | { |
| 242 | s3c240x_irq_regs[0] |= (1 << int_type); // SRCPND |
| 243 | s3c240x_check_pending_irq( machine); |
| 244 | } |
| 245 | } |
| 246 | |
| 247 | |
| 207 | 248 | static READ32_HANDLER( s3c240x_irq_r ) |
| 208 | 249 | { |
| 209 | 250 | UINT32 data = s3c240x_irq_regs[offset]; |
| 210 | | // logerror( "(IRQ) %08X -> %08X\n", 0x14400000 + (offset << 2), data); |
| 251 | // logerror( "(IRQ) %08X -> %08X (PC %08X)\n", 0x14400000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 211 | 252 | return data; |
| 212 | 253 | } |
| 213 | 254 | |
| 214 | 255 | static WRITE32_HANDLER( s3c240x_irq_w ) |
| 215 | 256 | { |
| 216 | | // logerror( "(IRQ) %08X <- %08X\n", 0x14400000 + (offset << 2), data); |
| 257 | UINT32 old_value = s3c240x_irq_regs[offset]; |
| 258 | // logerror( "(IRQ) %08X <- %08X (PC %08X)\n", 0x14400000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 259 | COMBINE_DATA(&s3c240x_irq_regs[offset]); |
| 217 | 260 | switch (offset) |
| 218 | 261 | { |
| 219 | 262 | // SRCPND |
| 220 | 263 | case 0x00 / 4 : |
| 221 | 264 | { |
| 222 | | cpu_set_input_line( cputag_get_cpu( space->machine, "maincpu"), ARM7_IRQ_LINE, CLEAR_LINE); |
| 265 | s3c240x_irq_regs[0] = (old_value & ~data); // clear only the bit positions of SRCPND corresponding to those set to one in the data |
| 266 | // logerror( "(2) %08X %08X %08X %08X %08X %08X\n", s3c240x_irq_regs[0], s3c240x_irq_regs[1], s3c240x_irq_regs[2], s3c240x_irq_regs[3], s3c240x_irq_regs[4], s3c240x_irq_regs[5]); |
| 267 | s3c240x_check_pending_irq( space->machine); |
| 223 | 268 | } |
| 224 | 269 | break; |
| 270 | // INTPND |
| 271 | case 0x10 / 4 : |
| 272 | { |
| 273 | s3c240x_irq_regs[4] = (old_value & ~data); // clear only the bit positions of INTPND corresponding to those set to one in the data |
| 274 | // logerror( "(3) %08X %08X %08X %08X %08X %08X\n", s3c240x_irq_regs[0], s3c240x_irq_regs[1], s3c240x_irq_regs[2], s3c240x_irq_regs[3], s3c240x_irq_regs[4], s3c240x_irq_regs[5]); |
| 275 | } |
| 276 | break; |
| 225 | 277 | } |
| 226 | | COMBINE_DATA(&s3c240x_irq_regs[offset]); |
| 227 | 278 | } |
| 228 | 279 | |
| 229 | | static void s3c240x_request_irq( running_machine *machine, UINT32 int_type) |
| 230 | | { |
| 231 | | // logerror( "request irq %d\n", int_type); |
| 232 | | // logerror( "%08X %08X %08X %08X %08X %08X\n", s3c240x_irq_regs[0], s3c240x_irq_regs[1], s3c240x_irq_regs[2], s3c240x_irq_regs[3], s3c240x_irq_regs[4], s3c240x_irq_regs[5]); |
| 233 | | s3c240x_irq_regs[5] = int_type; // INTOFFSET |
| 234 | | cpu_set_input_line( cputag_get_cpu( machine, "maincpu"), ARM7_IRQ_LINE, ASSERT_LINE); |
| 235 | | // cpu_set_input_line( cputag_get_cpu( machine, "maincpu"), ARM7_IRQ_LINE, CLEAR_LINE); |
| 236 | | } |
| 237 | | |
| 238 | 280 | // PWM TIMER |
| 239 | 281 | |
| 240 | 282 | #if 0 |
| r6575 | r6576 | |
| 267 | 309 | static READ32_HANDLER( s3c240x_timer_r ) |
| 268 | 310 | { |
| 269 | 311 | UINT32 data = s3c240x_timer_regs[offset]; |
| 270 | | // logerror( "(TIMER) %08X -> %08X\n", 0x15100000 + (offset << 2), data); |
| 312 | // logerror( "(TIMER) %08X -> %08X (PC %08X)\n", 0x15100000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 271 | 313 | return data; |
| 272 | 314 | } |
| 273 | 315 | |
| r6575 | r6576 | |
| 311 | 353 | static WRITE32_HANDLER( s3c240x_timer_w ) |
| 312 | 354 | { |
| 313 | 355 | UINT32 old_value = s3c240x_timer_regs[offset]; |
| 314 | | // logerror( "(TIMER) %08X <- %08X\n", 0x15100000 + (offset << 2), data); |
| 356 | // logerror( "(TIMER) %08X <- %08X (PC %08X)\n", 0x15100000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 315 | 357 | COMBINE_DATA(&s3c240x_timer_regs[offset]); |
| 316 | 358 | if (offset == 2) // TCON |
| 317 | 359 | { |
| r6575 | r6576 | |
| 382 | 424 | static READ32_HANDLER( s3c240x_dma_r ) |
| 383 | 425 | { |
| 384 | 426 | UINT32 data = s3c240x_dma_regs[offset]; |
| 385 | | // logerror( "(DMA) %08X -> %08X\n", 0x14600000 + (offset << 2), data); |
| 427 | // logerror( "(DMA) %08X -> %08X (PC %08X)\n", 0x14600000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 386 | 428 | return data; |
| 387 | 429 | } |
| 388 | 430 | |
| 389 | 431 | static WRITE32_HANDLER( s3c240x_dma_w ) |
| 390 | 432 | { |
| 391 | | // logerror( "(DMA) %08X <- %08X\n", 0x14600000 + (offset << 2), data); |
| 433 | // logerror( "(DMA) %08X <- %08X (PC %08X)\n", 0x14600000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 392 | 434 | COMBINE_DATA(&s3c240x_dma_regs[offset]); |
| 393 | 435 | switch (offset) |
| 394 | 436 | { |
| r6575 | r6576 | |
| 434 | 476 | UINT8 datatx; |
| 435 | 477 | } smc; |
| 436 | 478 | |
| 437 | | void smc_reset(void) |
| 479 | static void smc_reset(void) |
| 438 | 480 | { |
| 439 | 481 | // logerror( "smc_reset\n"); |
| 440 | 482 | smc.add_latch = 0; |
| r6575 | r6576 | |
| 506 | 548 | static READ32_HANDLER( s3c240x_gpio_r ) |
| 507 | 549 | { |
| 508 | 550 | UINT32 data = s3c240x_gpio[offset]; |
| 509 | | // logerror("read GPIO @ 0x156000%02x (PC %x)\n", offset*4, cpu_get_pc(space->cpu)); |
| 510 | 551 | switch (offset) |
| 511 | 552 | { |
| 512 | 553 | // PBCON |
| r6575 | r6576 | |
| 553 | 594 | } |
| 554 | 595 | break; |
| 555 | 596 | } |
| 597 | // logerror( "(GPIO) %08X -> %08X (PC %08X)\n", 0x15600000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 556 | 598 | return data; |
| 557 | 599 | } |
| 558 | 600 | |
| r6575 | r6576 | |
| 560 | 602 | { |
| 561 | 603 | // UINT32 old_value = s3c240x_timer_regs[offset]; |
| 562 | 604 | COMBINE_DATA(&s3c240x_gpio[offset]); |
| 563 | | // logerror("%08x to GPIO @ 0x156000%02x (PC %x)\n", data, offset*4, cpu_get_pc(space->cpu)); |
| 564 | | // if (offset == 0x30/4) logerror("[%08x] %s %s\n", data, (data & 0x200) ? "SCL" : "scl", (data & 0x400) ? "SDL" : "sdl"); |
| 605 | // logerror( "(GPIO) %08X <- %08X (PC %08X)\n", 0x15600000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 565 | 606 | switch (offset) |
| 566 | 607 | { |
| 567 | 608 | // PBCON |
| 568 | 609 | case 0x08 / 4 : |
| 569 | 610 | { |
| 570 | 611 | // smartmedia |
| 571 | | //if ((old_value & 0x00000001) != (data & 0x00000001)) |
| 572 | | { |
| 573 | | smc.read = ((data & 0x00000001) == 0); |
| 574 | | smc_update( space->machine); |
| 575 | | } |
| 612 | smc.read = ((data & 0x00000001) == 0); |
| 613 | smc_update( space->machine); |
| 576 | 614 | } |
| 577 | 615 | break; |
| 578 | 616 | // PBDAT |
| r6575 | r6576 | |
| 586 | 624 | case 0x24 / 4 : |
| 587 | 625 | { |
| 588 | 626 | // smartmedia |
| 589 | | //if ((old_value & 0x000001C0) != (data & 0x000001C0)) |
| 590 | | { |
| 591 | | smc.do_read = ((data & 0x00000100) == 0); |
| 592 | | smc.chip = ((data & 0x00000080) == 0); |
| 593 | | smc.wp = ((data & 0x00000040) == 0); |
| 594 | | smc_update( space->machine); |
| 595 | | } |
| 627 | smc.do_read = ((data & 0x00000100) == 0); |
| 628 | smc.chip = ((data & 0x00000080) == 0); |
| 629 | smc.wp = ((data & 0x00000040) == 0); |
| 630 | smc_update( space->machine); |
| 596 | 631 | } |
| 597 | 632 | break; |
| 598 | 633 | // PEDAT |
| 599 | 634 | case 0x30 / 4 : |
| 600 | 635 | { |
| 601 | 636 | // smartmedia |
| 602 | | //if ((old_value & 0x00000038) != (data & 0x00000038)) |
| 603 | | { |
| 604 | | smc.cmd_latch = ((data & 0x00000020) != 0); |
| 605 | | smc.add_latch = ((data & 0x00000010) != 0); |
| 606 | | smc.do_write = ((data & 0x00000008) == 0); |
| 607 | | smc_update( space->machine); |
| 608 | | } |
| 637 | smc.cmd_latch = ((data & 0x00000020) != 0); |
| 638 | smc.add_latch = ((data & 0x00000010) != 0); |
| 639 | smc.do_write = ((data & 0x00000008) == 0); |
| 640 | smc_update( space->machine); |
| 609 | 641 | } |
| 610 | 642 | break; |
| 611 | 643 | } |
| r6575 | r6576 | |
| 622 | 654 | |
| 623 | 655 | static WRITE32_HANDLER( s3c240x_memcon_w ) |
| 624 | 656 | { |
| 625 | | // logerror( "(MEMCON) %08X <- %08X\n", 0x14000000 + (offset << 2), data); |
| 657 | // logerror( "(MEMCON) %08X <- %08X (PC %08X)\n", 0x14000000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 626 | 658 | COMBINE_DATA(&s3c240x_memcon_regs[offset]); |
| 627 | 659 | } |
| 628 | 660 | |
| r6575 | r6576 | |
| 637 | 669 | |
| 638 | 670 | static WRITE32_HANDLER( s3c240x_usb_host_w ) |
| 639 | 671 | { |
| 640 | | // logerror( "(USB H) %08X <- %08X\n", 0x14200000 + (offset << 2), data); |
| 672 | // logerror( "(USB H) %08X <- %08X (PC %08X)\n", 0x14200000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 641 | 673 | COMBINE_DATA(&s3c240x_usb_host_regs[offset]); |
| 642 | 674 | } |
| 643 | 675 | |
| r6575 | r6576 | |
| 653 | 685 | // UTRSTAT0 |
| 654 | 686 | case 0x10 / 4 : |
| 655 | 687 | { |
| 656 | | data = (data & ~0x00000006) | 0x00000004 | 0x00000002; |
| 688 | data = (data & ~0x00000006) | 0x00000004 | 0x00000002; // [bit 2] Transmitter empty / [bit 1] Transmit buffer empty |
| 657 | 689 | } |
| 658 | 690 | break; |
| 659 | 691 | } |
| 692 | // logerror( "(UART 0) %08X -> %08X (PC %08X)\n", 0x15000000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 660 | 693 | return data; |
| 661 | 694 | } |
| 662 | 695 | |
| 663 | 696 | static WRITE32_HANDLER( s3c240x_uart_0_w ) |
| 664 | 697 | { |
| 665 | | // logerror( "(UART 0) %08X <- %08X\n", 0x15000000 + (offset << 2), data); |
| 698 | // logerror( "(UART 0) %08X <- %08X (PC %08X)\n", 0x15000000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 666 | 699 | COMBINE_DATA(&s3c240x_uart_0_regs[offset]); |
| 667 | 700 | } |
| 668 | 701 | |
| r6575 | r6576 | |
| 672 | 705 | |
| 673 | 706 | static READ32_HANDLER( s3c240x_uart_1_r ) |
| 674 | 707 | { |
| 675 | | return s3c240x_uart_1_regs[offset]; |
| 708 | UINT32 data = s3c240x_uart_1_regs[offset]; |
| 709 | switch (offset) |
| 710 | { |
| 711 | // UTRSTAT1 |
| 712 | case 0x10 / 4 : |
| 713 | { |
| 714 | data = (data & ~0x00000006) | 0x00000004 | 0x00000002; // [bit 2] Transmitter empty / [bit 1] Transmit buffer empty |
| 715 | } |
| 716 | break; |
| 717 | } |
| 718 | // logerror( "(UART 1) %08X -> %08X (PC %08X)\n", 0x15004000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 719 | return data; |
| 676 | 720 | } |
| 677 | 721 | |
| 678 | 722 | static WRITE32_HANDLER( s3c240x_uart_1_w ) |
| 679 | 723 | { |
| 680 | | // logerror( "(UART 1) %08X <- %08X\n", 0x15004000 + (offset << 2), data); |
| 724 | // logerror( "(UART 1) %08X <- %08X (PC %08X)\n", 0x15004000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 681 | 725 | COMBINE_DATA(&s3c240x_uart_1_regs[offset]); |
| 682 | 726 | } |
| 683 | 727 | |
| r6575 | r6576 | |
| 687 | 731 | |
| 688 | 732 | static READ32_HANDLER( s3c240x_usb_device_r ) |
| 689 | 733 | { |
| 690 | | return s3c240x_usb_device_regs[offset]; |
| 734 | UINT32 data = s3c240x_usb_device_regs[offset]; |
| 735 | // logerror( "(USB D) %08X -> %08X (PC %08X)\n", 0x15200140 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 736 | return data; |
| 691 | 737 | } |
| 692 | 738 | |
| 693 | 739 | static WRITE32_HANDLER( s3c240x_usb_device_w ) |
| 694 | 740 | { |
| 695 | | // logerror( "(USB D) %08X <- %08X\n", 0x15200140 + (offset << 2), data); |
| 741 | // logerror( "(USB D) %08X <- %08X (PC %08X)\n", 0x15200140 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 696 | 742 | COMBINE_DATA(&s3c240x_usb_device_regs[offset]); |
| 697 | 743 | } |
| 698 | 744 | |
| r6575 | r6576 | |
| 707 | 753 | |
| 708 | 754 | static WRITE32_HANDLER( s3c240x_watchdog_w ) |
| 709 | 755 | { |
| 710 | | // logerror( "(WDOG) %08X <- %08X\n", 0x15300000 + (offset << 2), data); |
| 756 | // logerror( "(WDOG) %08X <- %08X (PC %08X)\n", 0x15300000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 711 | 757 | COMBINE_DATA(&s3c240x_watchdog_regs[offset]); |
| 712 | 758 | } |
| 713 | 759 | |
| r6575 | r6576 | |
| 784 | 830 | } |
| 785 | 831 | break; |
| 786 | 832 | } |
| 787 | | // logerror( "(IIC) %08X -> %08X\n", 0x15400000 + (offset << 2), data); |
| 833 | // logerror( "(IIC) %08X -> %08X (PC %08X)\n", 0x15400000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 788 | 834 | return data; |
| 789 | 835 | } |
| 790 | 836 | |
| 791 | 837 | static WRITE32_HANDLER( s3c240x_iic_w ) |
| 792 | 838 | { |
| 793 | | // logerror( "(IIC) %08X <- %08X\n", 0x15400000 + (offset << 2), data); |
| 839 | // logerror( "(IIC) %08X <- %08X (PC %08X)\n", 0x15400000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 794 | 840 | COMBINE_DATA(&s3c240x_iic_regs[offset]); |
| 795 | 841 | switch (offset) |
| 796 | 842 | { |
| r6575 | r6576 | |
| 880 | 926 | static READ32_HANDLER( s3c240x_iis_r ) |
| 881 | 927 | { |
| 882 | 928 | UINT32 data = s3c240x_iis_regs[offset]; |
| 883 | | //if (offset == 0) data = data & (~0x01); // mp3 |
| 929 | // logerror( "(IIS) %08X -> %08X (PC %08X)\n", 0x15508000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 884 | 930 | return data; |
| 885 | 931 | } |
| 886 | 932 | |
| 887 | 933 | static WRITE32_HANDLER( s3c240x_iis_w ) |
| 888 | 934 | { |
| 889 | | // logerror( "(IIS) %08X <- %08X\n", 0x15508000 + (offset << 2), data); |
| 935 | // logerror( "(IIS) %08X <- %08X (PC %08X)\n", 0x15508000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 890 | 936 | COMBINE_DATA(&s3c240x_iis_regs[offset]); |
| 891 | 937 | } |
| 892 | 938 | |
| r6575 | r6576 | |
| 901 | 947 | |
| 902 | 948 | static WRITE32_HANDLER( s3c240x_rtc_w ) |
| 903 | 949 | { |
| 904 | | // logerror( "(RTC) %08X <- %08X\n", 0x15700040 + (offset << 2), data); |
| 950 | // logerror( "(RTC) %08X <- %08X (PC %08X)\n", 0x15700040 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 905 | 951 | COMBINE_DATA(&s3c240x_rtc_regs[offset]); |
| 906 | 952 | } |
| 907 | 953 | |
| r6575 | r6576 | |
| 916 | 962 | |
| 917 | 963 | static WRITE32_HANDLER( s3c240x_adc_w ) |
| 918 | 964 | { |
| 919 | | // logerror( "(ADC) %08X <- %08X\n", 0x15800000 + (offset << 2), data); |
| 965 | // logerror( "(ADC) %08X <- %08X (PC %08X)\n", 0x15800000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 920 | 966 | COMBINE_DATA(&s3c240x_adc_regs[offset]); |
| 921 | 967 | } |
| 922 | 968 | |
| r6575 | r6576 | |
| 931 | 977 | |
| 932 | 978 | static WRITE32_HANDLER( s3c240x_spi_w ) |
| 933 | 979 | { |
| 934 | | // logerror( "(SPI) %08X <- %08X\n", 0x15900000 + (offset << 2), data); |
| 980 | // logerror( "(SPI) %08X <- %08X (PC %08X)\n", 0x15900000 + (offset << 2), data, cpu_get_pc( space->cpu)); |
| 935 | 981 | COMBINE_DATA(&s3c240x_spi_regs[offset]); |
| 936 | 982 | } |
| 937 | 983 | |