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r6301 Thursday 5th November, 2009 at 03:37:28 UTC by Harmony
[PocketStation] Many fixes. [Harmony]
- Added .GME flash data loading.
- Fixed RTC setting procedure.
- Added preliminary Flash ROM banking.
- Promoted driver to Working.
[src/mess/drivers]pockstat.c

src/mess/drivers/pockstat.c
r6300r6301
44
55    05/2009 Skeleton driver written.
66   11/2009 Initial bring-up commenced by Harmony.
7   11/2009 Playable state achieved by Harmony.
78
89    PocketStation games were dowloaded from PS1 games into flash RAM after
910    the unit had been inserted in the memory card slot, and so this should
r6300r6301
2223      * http://exophase.devzero.co.uk/ps_info.txt
2324      * http://members.at.infoseek.co.jp/DrHell/pocket/index.html
2425
25   The current reason why the driver fails to run is:
26      - The BIOS is displeased by the RTC data that it is getting.
26   Currently, a handful of games run, but some die due to odd hardware
27   issues.
2728
2829****************************************************************************/
2930
3031#include "driver.h"
3132#include "cpu/arm7/arm7.h"
3233#include "cpu/arm7/arm7core.h"
34#include "devices/cartslot.h"
35#include "sound/dac.h"
3336
3437#define DEFAULT_CLOCK   2000000
3538
r6300r6301
5356   0x7a0000
5457};
5558
56#define VERBOSE_LEVEL ( 0 )
59#define VERBOSE_LEVEL      (0)
5760
58#define ENABLE_VERBOSE_LOG (0)
61#define ENABLE_VERBOSE_LOG   (0)
5962
6063#if ENABLE_VERBOSE_LOG
6164INLINE void ATTR_PRINTF(3,4) verboselog( running_machine *machine, int n_level, const char *s_fmt, ... )
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146149   UINT32 count;
147150   UINT32 control;
148151   emu_timer *timer;
149   emu_timer *int_reset_timer; // Probably not right
150152} ps_timer_t;
151153
152154typedef struct
r6300r6301
183185   {
184186      case 0x0000/4:
185187         verboselog(space->machine, 0, "ps_ftlb_r: FlashROM TLB Control = %08x & %08x\n", ftlb_regs.control, mem_mask );
186         return ftlb_regs.control;
188         return ftlb_regs.control | 1; // ???
187189      case 0x0004/4:
188190         verboselog(space->machine, 0, "ps_ftlb_r: Unknown (F_STAT) = %08x & %08x\n", ftlb_regs.stat, mem_mask );
189191         return ftlb_regs.stat;
r6300r6301
194196         verboselog(space->machine, 0, "ps_ftlb_r: Unknown (F_WAIT1) = %08x & %08x\n", ftlb_regs.wait1, mem_mask );
195197         return ftlb_regs.wait1;
196198      case 0x0010/4:
197         verboselog(space->machine, 0, "ps_ftlb_r: Unknown (F_WAIT2) = %08x & %08x\n", ftlb_regs.wait2, mem_mask );
198         return ftlb_regs.wait2;
199         verboselog(space->machine, 0, "ps_ftlb_r: Unknown (F_WAIT2) = %08x & %08x\n", ftlb_regs.wait2 | 0x08, mem_mask );
200         return ftlb_regs.wait2 | 0x08;
199201      case 0x0100/4:
200202      case 0x0104/4:
201203      case 0x0108/4:
r6300r6301
296298      else
297299      {
298300         intc_regs.status &= ~line;
301         intc_regs.hold &= ~line;
299302      }
300303   }
301304   if(intc_regs.hold & PS_INT_IRQ_MASK)
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420423          verboselog(space->machine, 0, "ps_timer_r: Timer %d Count = %08x & %08x\n", offset / (0x10/4), timer_regs.timer[offset / (0x10/4)].count, mem_mask );
421424          if(timer_regs.timer[offset / (0x10/4)].control & 4)
422425          {
426            timer_regs.timer[offset / (0x10/4)].count -= 0x100;
427            if(timer_regs.timer[offset / (0x10/4)].count > timer_regs.timer[offset / (0x10/4)].period)
428            {
429               timer_regs.timer[offset / (0x10/4)].count = timer_regs.timer[offset / (0x10/4)].period;
430            }
423431            return --timer_regs.timer[offset / (0x10/4)].count;
424432         }
425433         return timer_regs.timer[offset / (0x10/4)].count;
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586594         break;
587595      case 0x0004/4:
588596         verboselog(space->machine, 0, "ps_rtc_w: RTC Control = %08x & %08x\n", data, mem_mask );
589         COMBINE_DATA(&rtc_regs.control);
597         if(rtc_regs.control == 1 && data == 1)
598         {
599            switch(rtc_regs.mode >> 1)
600            {
601               case 0: // Seconds
602                  rtc_regs.time += 0x00000001;
603                  if((rtc_regs.time & 0x0000000f) == 0x0000000a)
604                  {
605                     rtc_regs.time &= 0xfffffff0;
606                     rtc_regs.time += 0x00000010;
607                     if((rtc_regs.time & 0x000000ff) == 0x00000060)
608                     {
609                        rtc_regs.time &= 0xffffff00;
610                     }
611                  }
612                  break;
613               case 1: // Minutes
614                  rtc_regs.time += 0x00000100;
615                  if((rtc_regs.time & 0x00000f00) == 0x00000a00)
616                  {
617                     rtc_regs.time &= 0xfffff0ff;
618                     rtc_regs.time += 0x00001000;
619                     if((rtc_regs.time & 0x0000ff00) == 0x00006000)
620                     {
621                        rtc_regs.time &= 0xffff00ff;
622                     }
623                  }
624                  break;
625               case 2: // Hours
626                  rtc_regs.time += 0x00010000;
627                  if((rtc_regs.time & 0x00ff0000) == 0x00240000)
628                  {
629                     rtc_regs.time &= 0xff00ffff;
630                  }
631                  else if((rtc_regs.time & 0x000f0000) == 0x000a0000)
632                  {
633                     rtc_regs.time &= 0xfff0ffff;
634                     rtc_regs.time += 0x00100000;
635                  }
636                  break;
637               case 3: // Day of the week
638                  rtc_regs.time += 0x01000000;
639                  if((rtc_regs.time & 0x0f000000) == 0x08000000)
640                  {
641                     rtc_regs.time &= 0xf0ffffff;
642                     rtc_regs.time |= 0x01000000;
643                  }
644                  break;
645               case 4: // Day
646                  rtc_regs.date += 0x00000001;
647                  if((rtc_regs.date & 0x000000ff) == 0x00000032)
648                  {
649                     rtc_regs.date &= 0xffffff00;
650                  }
651                  else if((rtc_regs.date & 0x0000000f) == 0x0000000a)
652                  {
653                     rtc_regs.date &= 0xfffffff0;
654                     rtc_regs.date += 0x00000010;
655                  }
656                  break;
657               case 5: // Month
658                  rtc_regs.date += 0x00000100;
659                  if((rtc_regs.date & 0x0000ff00) == 0x00001300)
660                  {
661                     rtc_regs.date &= 0xffffff00;
662                     rtc_regs.date |= 0x00000001;
663                  }
664                  else if((rtc_regs.date & 0x00000f00) == 0x00000a00)
665                  {
666                     rtc_regs.date &= 0xfffff0ff;
667                     rtc_regs.date += 0x00001000;
668                  }
669                  break;
670               case 6: // Year (LSB)
671                  rtc_regs.date += 0x00010000;
672                  if((rtc_regs.date & 0x000f0000) == 0x000a0000)
673                  {
674                     rtc_regs.date &= 0xfff0ffff;
675                     rtc_regs.date += 0x00100000;
676                     if((rtc_regs.date & 0x00f00000) == 0x00a00000)
677                     {
678                        rtc_regs.date &= 0xff00ffff;
679                     }
680                  }
681                  break;
682               case 7: // Year (MSB)
683                  break;
684            }
685            rtc_regs.control = 0;
686         }
687         else if(rtc_regs.control == 0)
688         {
689            COMBINE_DATA(&rtc_regs.control);
690         }
590691         break;
591692      default:
592693         verboselog(space->machine, 0, "ps_rtc_w: Unknown Register %08x = %08x & %08x\n", 0x0b800000 + (offset << 2), data, mem_mask );
r6300r6301
635736   ps_intc_set_interrupt_line(field->port->machine, PS_INT_BTN_UP,    (buttons & 16) ? 1 : 0);
636737}
637738
739static READ32_HANDLER(ps_rombank_r)
740{
741   INT32 bank = (offset >> 11) & 0x0f;
742   int index = 0;
743   for(index = 0; index < 32; index++)
744   {
745      if(ftlb_regs.valid & (1 << index))
746      {
747         if(ftlb_regs.entry[index] == bank)
748         {
749            //printf( "Address %08x is assigned to %08x in entry %d\n", 0x02000000 + (offset << 2), index * 0x2000 + ((offset << 2) & 0x1fff), index );
750            return ((UINT32*)memory_region(space->machine, "flash"))[index * (0x2000/4) + (offset & (0x1fff/4))];
751         }
752      }
753   }
754   return ((UINT32*)memory_region(space->machine, "flash"))[offset & 0x7fff];
755}
756
757static INT32 ps_flash_write_enable_count;
758static INT32 ps_flash_write_count;
759
760// Horrible hack, probably wrong
761static WRITE32_HANDLER(ps_flash_w)
762{
763   if(offset == (0x55a8/4))
764   {
765      ps_flash_write_enable_count++;
766      return;
767   }
768   if(offset == (0x2a54/4))
769   {
770      ps_flash_write_enable_count++;
771      return;
772   }
773   if(ps_flash_write_enable_count == 3)
774   {
775      ps_flash_write_enable_count = 0;
776      ps_flash_write_count = 0x40;
777      return;
778   }
779   if(ps_flash_write_count)
780   {
781      ps_flash_write_count--;
782      COMBINE_DATA(&((UINT32*)memory_region(space->machine, "flash"))[offset]);
783   }
784}
785
638786static ADDRESS_MAP_START(pockstat_mem, ADDRESS_SPACE_PROGRAM, 32)
639787   AM_RANGE(0x00000000, 0x000007ff) AM_RAM
788   AM_RANGE(0x02000000, 0x02ffffff) AM_READ(ps_rombank_r)
640789   AM_RANGE(0x04000000, 0x04003fff) AM_ROM AM_REGION("maincpu", 0)
641790   AM_RANGE(0x06000000, 0x06000307) AM_READWRITE(ps_ftlb_r, ps_ftlb_w)
791   AM_RANGE(0x08000000, 0x0801ffff) AM_ROM AM_WRITE(ps_flash_w) AM_REGION("flash", 0)
642792   AM_RANGE(0x0a000000, 0x0a000013) AM_READWRITE(ps_intc_r, ps_intc_w)
643793   AM_RANGE(0x0a800000, 0x0a80002b) AM_READWRITE(ps_timer_r, ps_timer_w)
644794   AM_RANGE(0x0b000000, 0x0b000007) AM_READWRITE(ps_clock_r, ps_clock_w)
645795   AM_RANGE(0x0b800000, 0x0b80000f) AM_READWRITE(ps_rtc_r, ps_rtc_w)
646796   AM_RANGE(0x0d000000, 0x0d000003) AM_READWRITE(ps_lcd_r, ps_lcd_w)
647797   AM_RANGE(0x0d000100, 0x0d00017f) AM_RAM AM_BASE(&lcd_buffer)
648/*  AM_RANGE(0x02000000, 0x0201ffff) Flash ROM
649    AM_RANGE(0x08000000, 0x0801ffff) Same as 0x02 above. Mirrors every 128KB.
650    AM_RANGE(0x0b000000, 0x0b000003) Internal CPU Clock control
651    AM_RANGE(0x0b800000, 0x0b800003) RTC control word
652    AM_RANGE(0x0b800004, 0x0b800007) RTC Modify value (write only)
653    AM_RANGE(0x0b800008, 0x0b80000b) RTC Time of day + day of week (read only)
654    AM_RANGE(0x0b80000c, 0x0b80000f) RTC Date (read only)
655    AM_RANGE(0x0d000000, 0x0b000003) LCD control word
656    AM_RANGE(0x0d000100, 0x0b00017f) LCD buffer - 1 word per scanline   */
657798ADDRESS_MAP_END
658799
659800/* Input ports */
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681822
682823   rtc_regs.timer = timer_alloc(machine, rtc_tick, 0);
683824   timer_adjust_oneshot(rtc_regs.timer, ATTOTIME_IN_HZ(1), index);
825
826   state_save_register_global(machine, ftlb_regs.control);
827   state_save_register_global(machine, ftlb_regs.stat);
828   state_save_register_global(machine, ftlb_regs.valid);
829   state_save_register_global(machine, ftlb_regs.wait1);
830   state_save_register_global(machine, ftlb_regs.wait2);
831   state_save_register_global_array(machine, ftlb_regs.entry);
832
833   state_save_register_global(machine, intc_regs.hold);
834   state_save_register_global(machine, intc_regs.status);
835   state_save_register_global(machine, intc_regs.enable);
836   state_save_register_global(machine, intc_regs.mask);
837
838   state_save_register_global(machine, timer_regs.timer[0].period);
839   state_save_register_global(machine, timer_regs.timer[0].count);
840   state_save_register_global(machine, timer_regs.timer[0].control);
841   state_save_register_global(machine, timer_regs.timer[1].period);
842   state_save_register_global(machine, timer_regs.timer[1].count);
843   state_save_register_global(machine, timer_regs.timer[1].control);
844   state_save_register_global(machine, timer_regs.timer[2].period);
845   state_save_register_global(machine, timer_regs.timer[2].count);
846   state_save_register_global(machine, timer_regs.timer[2].control);
847
848   state_save_register_global(machine, clock_regs.mode);
849   state_save_register_global(machine, clock_regs.control);
850
851   state_save_register_global(machine, rtc_regs.mode);
852   state_save_register_global(machine, rtc_regs.control);
853   state_save_register_global(machine, rtc_regs.time);
854   state_save_register_global(machine, rtc_regs.date);
855
856   state_save_register_global(machine, ps_flash_write_enable_count);
857   state_save_register_global(machine, ps_flash_write_count);
684858}
685859
686860static MACHINE_RESET( pockstat )
687861{
688862   cpu_set_reg(cputag_get_cpu(machine, "maincpu"), REG_GENPC, 0x4000000);
863
864   ps_flash_write_enable_count = 0;
865   ps_flash_write_count = 0;
689866}
690867
691868static VIDEO_UPDATE( pockstat )
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697874      UINT32 *scanline = BITMAP_ADDR32(bitmap, y, 0);
698875      for(x = 0; x < 32; x++)
699876      {
700         if(lcd_buffer[y] & (1 << x))
877         if(lcd_control != 0) // Hack
701878         {
702            scanline[x] = 0x00000000;
879            if(lcd_buffer[y] & (1 << x))
880            {
881               scanline[x] = 0x00000000;
882            }
883            else
884            {
885               scanline[x] = 0x00ffffff;
886            }
703887         }
704888         else
705889         {
r6300r6301
710894   return 0;
711895}
712896
897static DEVICE_IMAGE_LOAD( pockstat_flash)
898{
899   int i, length;
900   UINT8 *cart = memory_region(image->machine, "flash");
901   static const char *gme_id = "123-456-STD";
902
903   length = image_fread(image, cart, 0x20f40);
904
905   if(length != 0x20f40)
906   {
907      return INIT_FAIL;
908   }
909
910   for(i = 0; i < strlen(gme_id); i++)
911   {
912      if(cart[i] != gme_id[i])
913      {
914         return INIT_FAIL;
915      }
916   }
917
918   memcpy(cart, cart + 0xf40, 0x20000);
919
920   return INIT_PASS;
921}
922
713923static MACHINE_DRIVER_START( pockstat )
714924   /* basic machine hardware */
715925   MDRV_CPU_ADD("maincpu", ARM7, DEFAULT_CLOCK)
r6300r6301
730940
731941   MDRV_VIDEO_START(generic_bitmapped)
732942   MDRV_VIDEO_UPDATE(pockstat)
943
944    MDRV_SPEAKER_STANDARD_MONO("mono")
945    MDRV_SOUND_ADD("dac", DAC, 0)
946    MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
947
948   /* cartridge */
949   MDRV_CARTSLOT_ADD("cart")
950   MDRV_CARTSLOT_EXTENSION_LIST("gme")
951   MDRV_CARTSLOT_NOT_MANDATORY
952   MDRV_CARTSLOT_LOAD(pockstat_flash)
733953MACHINE_DRIVER_END
734954
735955/* ROM definition */
736956ROM_START( pockstat )
737957   ROM_REGION( 0x4000, "maincpu", 0 )
738958   ROM_LOAD( "kernel.bin", 0x0000, 0x4000, CRC(5fb47dd8) SHA1(6ae880493ddde880827d1e9f08e9cb2c38f9f2ec) )
959
960   ROM_REGION( 0x20f40, "flash", ROMREGION_ERASEFF )
739961ROM_END
740962
741963/* Driver */
742964
743965/*    YEAR  NAME      PARENT  COMPAT  MACHINE    INPUT     INIT  CONFIG     COMPANY                             FULLNAME       FLAGS */
744CONS( 1999, pockstat, 0,      0,      pockstat,  pockstat, 0,    0,  "Sony Computer Entertainment Inc.", "Sony PocketStation", GAME_NOT_WORKING )
966CONS( 1999, pockstat, 0,      0,      pockstat,  pockstat, 0,    0,  "Sony Computer Entertainment Inc.", "Sony PocketStation", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )

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