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r5576 Friday 4th September, 2009 at 11:44:22 UTC by Dirk Best
[AQUARIUS] Cleanups, added vsync read, added floppy skeleton

[src/mess/drivers]

aquarius.c

src/mess/drivers/aquarius.c

r5575	r5576
1		/*
	1	/***************************************************************************
2	2
	3	Mattel Aquarius
	4
	5
3	6	TODO:
4	7
5		- vsync
6	8	- hand controllers
7	9	- scramble RAM also
8	10	- CAQ tape support
9	11	- memory mapper
10	12	- proper video timings
11	13	- PAL mode
12
13	14	- floppy support
14	15	- modem
15	16	- "old" version of BASIC ROM
16	17	- Aquarius II
17	18
18		*/
	19	***************************************************************************/
19	20
20	21	#include "driver.h"
21	22	#include "includes/aquarius.h"
22	23	#include "cpu/z80/z80.h"
	24	#include "sound/ay8910.h"
	25	#include "sound/speaker.h"
23	26	#include "devices/basicdsk.h"
24	27	#include "devices/cartslot.h"
25	28	#include "devices/cassette.h"
26	29	#include "devices/printer.h"
27		#include "sound/ay8910.h"
28		#include "sound/speaker.h"
29	30
30		static const device_config *cassette_device_image(running_machine *machine)
31		{
32		return devtag_get_device(machine, "cassette");
33		}
34	31
35		/* Read/Write Handlers */
	32	/***************************************************************************
	33	CONSTANTS
	34	***************************************************************************/
36	35
37		static UINT8 *decrypt_rom;
	36	#define XTAL1   8866000
	37	#define XTAL2   XTAL_7_15909MHz
	38
	39
	40	/***************************************************************************
	41	GLOBAL VARIABLES
	42	***************************************************************************/
	43
38	44	static UINT8 scrambler;
39	45
	46
	47	/***************************************************************************
	48	READ/WRITE HANDLERS
	49	***************************************************************************/
	50
	51	/*
	52	To read stored data from cassette the program should look at bit zero of
	53	the cassette input port and measure the time difference between leading
	54	edges or trailing edges. This is to prevent DC level shifting from altering
	55	pulse width of data. The program should then look for sync bytes for data
	56	synchronisation before data block transfer. If there is any task that must
	57	be performed during cassette loading, the maximum allowable time to do the
	58	job after one byte from cassette, must be less than 80% of the period of a
	59	mark cycle. Control must be returned at that time to the cassette routine
	60	in order to maintain data integrity.
	61	*/
40	62	static READ8_HANDLER( cassette_r )
41	63	{
42		/*
	64	const device_config *cassette = devtag_get_device(space->machine, "cassette");
	65	return (cassette_input(cassette) < +0.0) ? 0 : 1;
	66	}
43	67
44		To read stored data from cassette the program should look at bit zero of
45		the cassette input port and measure the time difference between leading
46		edges or trailing edges. This is to prevent DC level shifting from altering
47		pulse width of data. The program should then look for sync bytes for data
48		synchronisation before data block transfer. If there is any task that must
49		be performed during cassette loading, the maximum allowable time to do the
50		job after one byte from cassette, must be less than 80% of the period of a
51		mark cycle. Control must be returned at that time to the cassette routine
52		in order to maintain data integrity.
53
54		*/
55	68
56		return (cassette_input(cassette_device_image(space->machine)) < +0.0) ? 0 : 1;
57		}
58
	69	/*
	70	Sound and cassette port use a common pin. Therefore the signal to cassette
	71	will appear on audio output. Sound port is a simple one bit I/O and therefore
	72	it must be toggled at a specific rate under software control.
	73	*/
59	74	static WRITE8_HANDLER( cassette_w )
60	75	{
61		/*
	76	const device_config *speaker = devtag_get_device(space->machine, "speaker");
	77	const device_config *cassette = devtag_get_device(space->machine, "cassette");
62	78
63		Sound and cassette port use a common pin. Therefore the signal to cassette
64		will appear on audio output. Sound port is a simple one bit I/O and therefore
65		it must be toggled at a specific rate under software control.
	79	speaker_level_w(speaker, BIT(data, 0));
	80	cassette_output(cassette, BIT(data, 0) ? +1.0 : -1.0);
	81	}
66	82
67		*/
68	83
69		const device_config *speaker = devtag_get_device(space->machine, "speaker");
70		speaker_level_w(speaker, data & 0x01);
	84	/*
	85	The current state of the vertical sync will appear on bit 0 during a read of
	86	this port. The waveform and timing spec is shown as follows:
71	87
72		cassette_output(cassette_device_image(space->machine), (data & 0x01) ? +1.0 : -1.0);
73		}
74
	88	|<-    Active scan period   ->|V.sync |<-
	89	|      12.8 ms                |3.6 ms (PAL)
	90	|                             |2.8 ms (NTSC)
	91	+++++++++++++++++++++++++++++++       ++++++++++++
	92	+                             +       +
	93	+                             +       +
	94	+++++                             +++++++++
	95	*/
75	96	static READ8_HANDLER( vsync_r )
76	97	{
77		/*
	98	const device_config *screen = space->machine->primary_screen;
	99	return video_screen_get_vblank(screen) ? 0 : 1;
	100	}
78	101
79		The current state of the vertical sync will appear on bit 0 during a read of
80		this port. The waveform and timing spec is shown as follows:
81	102
82		|<-    Active scan period   ->|V.sync |<-
83		|      12.8 ms                |3.6 ms (PAL)
84		|                             |2.8 ms (NTSC)
85		+++++++++++++++++++++++++++++++       ++++++++++++
86		+                             +       +
87		+                             +       +
88		+++++                             +++++++++
89
90		*/
91
92		return 0;
93		}
94
	103	/*
	104	Bit D0 of this port controls the swapping of the lower 16K block in the memory
	105	map with the upper 16K. A 1 in this bit indicates swapping. This bit is reset
	106	after power up initialization.
	107	*/
95	108	static WRITE8_HANDLER( mapper_w )
96	109	{
97		/*
	110	}
98	111
99		Bit D0 of this port controls the swapping of the lower 16K block in the memory
100		map with the upper 16K. A 1 in this bit indicates swapping. This bit is reset
101		after power up initialization.
102	112
103		*/
104		}
105
	113	/*
	114	Printer handshaking port (read) Port 0xFE when read, presents the clear
	115	to send status from PRNHASK pin at bit D0. A 1 indicates printer is ready,
	116	0 means not ready.
	117	*/
106	118	static READ8_HANDLER( printer_r )
107	119	{
108		/*
	120	return 1; /* ready */
	121	}
109	122
110		Printer handshaking port (read) Port 0xFE when read, presents the clear
111		to send status from PRNHASK pin at bit D0. A 1 indicates printer is ready,
112		0 means not ready.
113	123
114		*/
115
116		return 1; // ready
117		}
118
	124	/*
	125	This is a single bit I/O at D0, it will perform as a serial output
	126	port under software control. Since timing is done by software the
	127	baudrate is variable. In BASIC this is a 1200 baud printer port for
	128	the 40 column thermal printer.
	129	*/
119	130	static WRITE8_HANDLER( printer_w )
120	131	{
121		/*
	132	}
122	133
123		This is a single bit I/O at D0, it will perform as a serial output
124		port under software control. Since timing is done by software the
125		baudrate is variable. In BASIC this is a 1200 baud printer port for
126		the 40 column thermal printer.
127	134
128		*/
129		}
	135	/*
	136	This port is 6 bits wide, when read, it returns the row data from the
	137	keyboard matrix. The keyboard is usually scanned in the following manner:
130	138
	139	The keyboard is a 6 row by 8 column matrix. The column is connected to
	140	the higher order address bus A15-A8. When Z80 executes its input
	141	instruction sets, either the current content of the accumulator (A) or
	142	the content of register (B) will go to the higher order address bus.
	143	Therefore the keyboard can be scanned by placing a specific scanning
	144	pattern in (A) or (B) and reading the result returned on rows.
	145	*/
131	146	static READ8_HANDLER( keyboard_r )
132	147	{
133		/*
	148	UINT8 result = 0xff;
134	149
135		This port is 6 bits wide, when read, it returns the row data from the
136		keyboard matrix. The keyboard is usually scanned in the following manner:
	150	if (!BIT(offset,  8)) result &= input_port_read(space->machine, "ROW0");
	151	if (!BIT(offset,  9)) result &= input_port_read(space->machine, "ROW1");
	152	if (!BIT(offset, 10)) result &= input_port_read(space->machine, "ROW2");
	153	if (!BIT(offset, 11)) result &= input_port_read(space->machine, "ROW3");
	154	if (!BIT(offset, 12)) result &= input_port_read(space->machine, "ROW4");
	155	if (!BIT(offset, 13)) result &= input_port_read(space->machine, "ROW5");
	156	if (!BIT(offset, 14)) result &= input_port_read(space->machine, "ROW6");
	157	if (!BIT(offset, 15)) result &= input_port_read(space->machine, "ROW7");
137	158
138		The keyboard is a 6 row by 8 column matrix. The column is connected to
139		the higher order address bus A15-A8. When Z80 executes its input
140		instruction sets, either the current content of the accumulator (A) or
141		the content of register (B) will go to the higher order address bus.
142		Therefore the keyboard can be scanned by placing a specific scanning
143		pattern in (A) or (B) and reading the result returned on rows.
	159	return result;
	160	}
144	161
145		*/
146	162
147		UINT8 keylatch = offset >> 8;
148		int row;
149		static const char *const rownames[] = { "ROW0", "ROW1", "ROW2", "ROW3", "ROW4", "ROW5", "ROW6", "ROW7" };
	163	/*
	164	Software lock: Writing this port with an 8 bit value will set the software
	165	scrambler pattern. The data that appears on the output side will be the
	166	result of the input bus EX-ORed with this pattern, bit by bit. The software
	167	lock is a scrambler built between the CPU and external interface. The
	168	scrambling pattern is contained in port 0xFF and is not readable. CPU data
	169	output to external bus will be XORed with this pattern in a bit by bit
	170	fashion to generate the real data on external bus. By the same mechanism,
	171	data from external bus is also XORed with this pattern and read by CPU.
150	172
151		if (keylatch == 0) return 0;
	173	Therefore it the external device is RAM, the software lock simply has no
	174	effect as long as the scrambling pattern remains unchanged. For I/O
	175	operation the pattern is gated to 0 and thus scrambling action is nullified.
152	176
153		for (row = 0; row < 8; row++)
154		{
155		if (!BIT(keylatch, row))
156		return input_port_read(space->machine, rownames[row]);
157		}
158
159		return 0xff;
	177	In BASIC operation the scrambling pattern is generated by a random number
	178	routine. For game cartridge the lock pattern is generated from data in the
	179	game cartridge itself.
	180	*/
	181	static WRITE8_HANDLER( scrambler_w )
	182	{
	183	scrambler = data;
160	184	}
161	185
162		static WRITE8_HANDLER( scrambler_w )
	186	static READ8_HANDLER( cartridge_r )
163	187	{
164		/*
	188	UINT8 *rom = memory_region(space->machine, "maincpu") + 0xc000;
	189	return rom[offset] ^ scrambler;
	190	}
165	191
166		Software lock: Writing this port with an 8 bit value will set the software
167		scrambler pattern. The data that appears on the output side will be the
168		result of the input bus EX-ORed with this pattern, bit by bit. The software
169		lock is a scrambler built between the CPU and external interface. The
170		scrambling pattern is contained in port 0xFF and is not readable. CPU data
171		output to external bus will be XORed with this pattern in a bit by bit
172		fashion to generate the real data on external bus. By the same mechanism,
173		data from external bus is also XORed with this pattern and read by CPU.
174	192
175		Therefore it the external device is RAM, the software lock simply has no
176		effect as long as the scrambling pattern remains unchanged. For I/O
177		operation the pattern is gated to 0 and thus scrambling action is nullified.
	193	/***************************************************************************
	194	QUICK DISK DRIVE
	195	***************************************************************************/
178	196
179		In BASIC operation the scrambling pattern is generated by a random number
180		routine. For game cartridge the lock pattern is generated from data in the
181		game cartridge itself.
	197	/* note: 0xe6-0xe7 = drive 1, 0xea-0xeb = drive 2 */
	198	static READ8_HANDLER( floppy_r )
	199	{
	200	logerror("%s: floppy_r[0x%02x]\n", cpuexec_describe_context(space->machine), offset);
	201	return 0xff;
	202	}
182	203
183		*/
	204	static WRITE8_HANDLER( floppy_w )
	205	{
	206	logerror("%s: floppy_w[0x%02x] (0x%02x)\n", cpuexec_describe_context(space->machine), offset, data);
	207	}
184	208
185		UINT8 *ROM = memory_region(space->machine, "maincpu") + 0xc000;
186		UINT16 addr;
187	209
188		scrambler = data;
	210	/***************************************************************************
	211	DRIVER INIT
	212	***************************************************************************/
189	213
190		for (addr = 0; addr < 16*1024; addr++)
	214	static DRIVER_INIT( aquarius )
	215	{
	216	/* install expansion memory if available */
	217	if (mess_ram_size > 0x1000)
191	218	{
192		decrypt_rom[addr] = ROM[addr] ^ scrambler;
	219	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	220
	221	memory_install_readwrite8_handler(space, 0x4000, 0x4000 + mess_ram_size - 0x1000 - 1, 0, 0, SMH_BANK(1), SMH_BANK(1));
	222	memory_set_bankptr(machine, 1, mess_ram);
193	223	}
194	224	}
195	225
196		/* Memory Maps */
197	226
198		static ADDRESS_MAP_START( aquarius_mem, ADDRESS_SPACE_PROGRAM, 8)
	227	/***************************************************************************
	228	ADDRESS MAPS
	229	***************************************************************************/
	230
	231	static ADDRESS_MAP_START( aquarius_mem, ADDRESS_SPACE_PROGRAM, 8 )
199	232	AM_RANGE(0x0000, 0x1fff) AM_ROM
200	233	AM_RANGE(0x3000, 0x33ff) AM_RAM_WRITE(aquarius_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
201	234	AM_RANGE(0x3400, 0x37ff) AM_RAM_WRITE(aquarius_colorram_w) AM_BASE(&colorram)
202	235	AM_RANGE(0x3800, 0x3fff) AM_RAM
203		AM_RANGE(0x4000, 0xbfff) AM_RAMBANK(1)
204		AM_RANGE(0xc000, 0xffff) AM_ROMBANK(2)
	236	AM_RANGE(0x4000, 0xbfff) AM_NOP /* expansion ram */
	237	AM_RANGE(0xc000, 0xffff) AM_READ(cartridge_r)
205	238	ADDRESS_MAP_END
206	239
207		static ADDRESS_MAP_START( aquarius_io, ADDRESS_SPACE_IO, 8)
	240	static ADDRESS_MAP_START( aquarius_io, ADDRESS_SPACE_IO, 8 )
208	241	//   AM_RANGE(0x7e, 0x7f) AM_MIRROR(0xff00) AM_READWRITE(modem_r, modem_w)
209		//   AM_RANGE(0xe0, 0xef) AM_MIRROR(0xff00) AM_READWRITE(floppy_r, floppy_w)
210	242	AM_RANGE(0xf6, 0xf6) AM_MIRROR(0xff00) AM_DEVREADWRITE("ay8910", ay8910_r, ay8910_data_w)
211	243	AM_RANGE(0xf7, 0xf7) AM_MIRROR(0xff00) AM_DEVWRITE("ay8910", ay8910_address_w)
212	244	AM_RANGE(0xfc, 0xfc) AM_MIRROR(0xff00) AM_READWRITE(cassette_r, cassette_w)
r5575	r5576
215	247	AM_RANGE(0xff, 0xff) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_READWRITE(keyboard_r, scrambler_w)
216	248	ADDRESS_MAP_END
217	249
218		/* Input Ports */
	250	static ADDRESS_MAP_START( aquarius_qd_io, ADDRESS_SPACE_IO, 8 )
	251	AM_IMPORT_FROM(aquarius_io)
	252	AM_RANGE(0xe0, 0xef) AM_MIRROR(0xff00) AM_READWRITE(floppy_r, floppy_w)
	253	ADDRESS_MAP_END
219	254
	255
	256	/***************************************************************************
	257	INPUT PORTS
	258	***************************************************************************/
	259
	260	/* the 'reset' key is directly tied to the reset line of the cpu */
220	261	static INPUT_CHANGED( aquarius_reset )
221	262	{
222		cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_RESET, (input_port_read(field->port->machine, "RESET") ? CLEAR_LINE : ASSERT_LINE));
	263	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_RESET, newval ? CLEAR_LINE : ASSERT_LINE);
223	264	}
224	265
225		static INPUT_PORTS_START(aquarius)
	266	static INPUT_PORTS_START( aquarius )
226	267	PORT_START("ROW0")
227	268	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("= +\tNEXT") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
228	269	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x90 \\") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) PORT_CHAR('\\')
r5575	r5576
305	346	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
306	347	INPUT_PORTS_END
307	348
308		/* Character Layout */
309	349
	350	/***************************************************************************
	351	CHARACTER LAYOUT
	352	***************************************************************************/
	353
310	354	static const gfx_layout aquarius_charlayout =
311	355	{
312	356	8, 8,
r5575	r5576
314	358	1,
315	359	{ 0 },
316	360	{ 0, 1, 2, 3, 4, 5, 6, 7 },
317		{ 0*8, 1*8, 2*8, 3*8,
318		4*8, 5*8, 6*8, 7*8, },
	361	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, },
319	362	8 * 8
320	363	};
321	364
r5575	r5576
325	368	GFXDECODE_ENTRY( "gfx1", 0x0000, aquarius_charlayout, 0, 256 )
326	369	GFXDECODE_END
327	370
328		/* Interrupt Generator */
329	371
330		static INTERRUPT_GEN( aquarius_interrupt )
331		{
332		cpu_set_input_line(device, INPUT_LINE_IRQ0, HOLD_LINE);
333		}
	372	/***************************************************************************
	373	MACHINE DRIVERS
	374	***************************************************************************/
334	375
335		/* Sound Interface */
336
337	376	static const ay8910_interface aquarius_ay8910_interface =
338	377	{
339	378	AY8910_LEGACY_OUTPUT,
r5575	r5576
344	383	DEVCB_NULL
345	384	};
346	385
347		/* Machine Initialization */
348
349		static MACHINE_START( aquarius )
350		{
351		decrypt_rom = auto_alloc_array(machine, UINT8, 16*1024);
352		}
353
354		static MACHINE_RESET( aquarius )
355		{
356		/* RAM expansion */
357
358		switch (mess_ram_size)
359		{
360		case 4 * 1024:
361		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0xbfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
362		break;
363
364		case 8 * 1024: // 4K expansion
365		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x4fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
366		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0xbfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
367		break;
368
369		case 20 * 1024: // 16K expansion
370		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x8fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
371		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9000, 0xbfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
372		break;
373
374		case 36 * 1024: // 32K expansion (prototype)
375		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0xbfff, 0, 0, SMH_BANK(1), SMH_BANK(1));
376		break;
377		}
378
379		memory_configure_bank(machine, 1, 0, 1, mess_ram, 0);
380		memory_set_bank(machine, 1, 0);
381
382		/* cartridge */
383
384		memory_configure_bank(machine, 2, 0, 1, decrypt_rom, 0);
385		memory_set_bank(machine, 2, 0);
386		}
387
388		static DEVICE_IMAGE_LOAD( aquarius_cart )
389		{
390		int size = image_length(image);
391		UINT8 *ptr = memory_region(image->machine, "maincpu") + 0xc000;
392
393		if (image_fread(image, ptr, size) != size)
394		{
395		return INIT_FAIL;
396		}
397
398		switch (size)
399		{
400		case 8 * 1024:
401		memory_install_readwrite8_handler(cputag_get_address_space(image->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xdfff, 0, 0x2000, SMH_BANK(2), SMH_UNMAP);
402		break;
403
404		case 16 * 1024:
405		memory_install_readwrite8_handler(cputag_get_address_space(image->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, SMH_BANK(2), SMH_UNMAP);
406		break;
407		}
408
409		return INIT_PASS;
410		}
411
412		/* Machine Driver */
413	386	static const cassette_config aquarius_cassette_config =
414	387	{
415	388	cassette_default_formats,
r5575	r5576
422	395	MDRV_CPU_ADD("maincpu", Z80, XTAL_3_579545MHz) // ???
423	396	MDRV_CPU_PROGRAM_MAP(aquarius_mem)
424	397	MDRV_CPU_IO_MAP(aquarius_io)
425		MDRV_CPU_VBLANK_INT("screen", aquarius_interrupt)
	398	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
426	399
427		MDRV_MACHINE_START( aquarius )
428		MDRV_MACHINE_RESET( aquarius )
429
430	400	/* video hardware */
431	401	MDRV_SCREEN_ADD("screen", RASTER)
432	402	MDRV_SCREEN_REFRESH_RATE(60)
433		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
	403	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2800))
434	404	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
435	405	MDRV_SCREEN_SIZE(40 * 8, 25 * 8)
436	406	MDRV_SCREEN_VISIBLE_AREA(0, 40 * 8 - 1, 0 * 8, 25 * 8 - 1)
r5575	r5576
460	430	MDRV_CARTSLOT_ADD("cart")
461	431	MDRV_CARTSLOT_EXTENSION_LIST("bin")
462	432	MDRV_CARTSLOT_NOT_MANDATORY
463		MDRV_CARTSLOT_LOAD(aquarius_cart)
464	433	MACHINE_DRIVER_END
465	434
466		/* ROMs */
	435	static MACHINE_DRIVER_START( aquarius_qd )
	436	MDRV_IMPORT_FROM( aquarius )
467	437
	438	MDRV_CPU_MODIFY("maincpu")
	439	MDRV_CPU_IO_MAP(aquarius_qd_io)
	440
	441	MDRV_DEVICE_REMOVE("cart")
	442	MACHINE_DRIVER_END
	443
	444
	445	/***************************************************************************
	446	ROM DEFINITIONS
	447	***************************************************************************/
	448
468	449	ROM_START( aquarius )
469		ROM_REGION( 0x10000, "maincpu", 0 )
470		//   ROM_LOAD( "aquarius.u2", 0x0000, 0x2000, CRC(5cfa5b42) SHA1(02c8ee11e911d1aa346812492d14284b6870cb3e) )
471		ROM_LOAD( "aq2.u2", 0x0000, 0x2000, CRC(a2d15bcf) SHA1(ca6ef55e9ead41453efbf5062d6a60285e9661a6) )
472
473		ROM_REGION( 0x0800, "gfx1", 0 )
474		ROM_LOAD( "aq2.u5", 0x0000, 0x0800, BAD_DUMP CRC(0b3edeed) SHA1(d2509839386b852caddcaa89cd376be647ba1492) )
	450	ROM_REGION(0x10000, "maincpu", 0)
	451
	452	/* basic rom */
	453	ROM_DEFAULT_BIOS("rev2")
	454	ROM_SYSTEM_BIOS(0, "rev1", "Revision 1")
	455	ROMX_LOAD("aq1.u2", 0x0000, 0x2000, NO_DUMP, ROM_BIOS(1))
	456	ROM_SYSTEM_BIOS(1, "rev2", "Revision 2")
	457	ROMX_LOAD("aq2.u2", 0x0000, 0x2000, CRC(a2d15bcf) SHA1(ca6ef55e9ead41453efbf5062d6a60285e9661a6), ROM_BIOS(2))
	458
	459	/* cartridge */
	460	ROM_CART_LOAD("cart", 0xc000, 0x4000, ROM_MIRROR)
	461
	462	/* charrom */
	463	ROM_REGION(0x800, "gfx1", 0)
	464	ROM_LOAD("aq2.u5", 0x000, 0x800, BAD_DUMP CRC(0b3edeed) SHA1(d2509839386b852caddcaa89cd376be647ba1492))
475	465	ROM_END
476	466
477		/* System Configuration */
	467	ROM_START( aquarius_qd )
	468	ROM_REGION(0x10000, "maincpu", 0)
478	469
	470	/* basic rom */
	471	ROM_DEFAULT_BIOS("rev2")
	472	ROM_SYSTEM_BIOS(0, "rev1", "Revision 1")
	473	ROMX_LOAD("aq1.u2", 0x0000, 0x2000, NO_DUMP, ROM_BIOS(1))
	474	ROM_SYSTEM_BIOS(1, "rev2", "Revision 2")
	475	ROMX_LOAD("aq2.u2", 0x0000, 0x2000, CRC(a2d15bcf) SHA1(ca6ef55e9ead41453efbf5062d6a60285e9661a6), ROM_BIOS(2))
	476
	477	/* quickdisk floppy drive */
	478	ROM_LOAD("qd1_01.bin", 0xc000, 0x4000, CRC(06dc0ef3) SHA1(94b18c2f3f4baca8f5ab0feb2458c88b1682f8b2))
	479
	480	/* charrom */
	481	ROM_REGION(0x800, "gfx1", 0)
	482	ROM_LOAD("aq2.u5", 0x000, 0x800, BAD_DUMP CRC(0b3edeed) SHA1(d2509839386b852caddcaa89cd376be647ba1492))
	483	ROM_END
	484
	485
	486	/***************************************************************************
	487	SYSTEM CONFIG
	488	***************************************************************************/
	489
479	490	static DEVICE_IMAGE_LOAD( aquarius_floppy )
480	491	{
481		// 128K images, 64K/side
	492	/* 128K images, 64K/side */
482	493	return INIT_FAIL;
483	494	}
484	495
r5575	r5576
488	499	switch(state)
489	500	{
490	501	/* --- the following bits of info are returned as 64-bit signed integers --- */
491		case MESS_DEVINFO_INT_COUNT:               info->i = 1; break;
	502	case MESS_DEVINFO_INT_COUNT:               info->i = 2; break;
492	503
493	504	/* --- the following bits of info are returned as pointers to data or functions --- */
494	505	case MESS_DEVINFO_PTR_LOAD:                  info->load = DEVICE_IMAGE_LOAD_NAME(aquarius_floppy); break;
r5575	r5576
505	516	CONFIG_RAM        ( 8 * 1024)
506	517	CONFIG_RAM        (20 * 1024)
507	518	CONFIG_RAM        (36 * 1024)
	519	SYSTEM_CONFIG_END
	520
	521	static SYSTEM_CONFIG_START( aquarius_qd )
	522	CONFIG_IMPORT_FROM(aquarius)
508	523	CONFIG_DEVICE(aquarius_floppy_getinfo)
509	524	SYSTEM_CONFIG_END
510	525
511		/*      YEAR    NAME        PARENT      COMPAT  MACHINE     INPUT       INIT    CONFIG      COMPANY     FULLNAME         FLAGS */
512		COMP(   1983,   aquarius,   0,         0,      aquarius,   aquarius,   0,      aquarius,   "Mattel",   "Aquarius (NTSC)",   0 )
	526
	527	/***************************************************************************
	528	GAME DRIVERS
	529	***************************************************************************/
	530
	531	/*    YEAR  NAME         PARENT    COMPAT  MACHINE      INPUT     INIT      CONFIG       COMPANY   FULLNAME                         FLAGS */
	532	COMP( 1983, aquarius,    0,        0,      aquarius,    aquarius, aquarius, aquarius,    "Mattel", "Aquarius (NTSC)",               0 )
	533	COMP( 1983, aquarius_qd, aquarius, 0,      aquarius_qd, aquarius, aquarius, aquarius_qd, "Mattel", "Aquarius w/ Quick Disk (NTSC)", 0 )
513	534	//COMP(   1984,   aquariu2,   aquarius,   0,      aquarius,   aquarius,   0,      aquarius,   "Mattel",   "Aquarius II",   GAME_NOT_WORKING )

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