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r5488 Friday 21st August, 2009 at 13:07:00 UTC by Curt Coder
[MM1] Added UPD7201 skeleton.
[src/emu]devcb.h
[src/mess]mess.mak
[src/mess/drivers]mikromik.c
[src/mess/machine]upd7201.c* upd7201.h*

src/emu/devcb.h
r5487r5488
6464
6565/* standard line or read/write handlers with the calling device passed */
6666#define DEVCB_LINE(func)               { DEVCB_TYPE_SELF, NULL, (func), NULL, NULL }
67#define DEVCB_LINE_GND                  { DEVCB_TYPE_SELF, NULL, devcb_line_gnd_r, NULL, NULL }
68#define DEVCB_LINE_VCC                  { DEVCB_TYPE_SELF, NULL, devcb_line_vcc_r, NULL, NULL }
6769#define DEVCB_HANDLER(func)               { DEVCB_TYPE_SELF, NULL, NULL, (func), NULL }
6870
6971/* line or read/write handlers for another device */
r5487r5488
269271      (*resolved->write)((const device_config *)resolved->target, offset, data);
270272}
271273
274/*-------------------------------------------------
275    devcb_line_gnd_r - input tied to GND
276-------------------------------------------------*/
272277
278INLINE READ_LINE_DEVICE_HANDLER( devcb_line_gnd_r )
279{
280   return 0;
281}
282
283/*-------------------------------------------------
284    devcb_line_vcc_r - input tied to Vcc
285-------------------------------------------------*/
286
287INLINE READ_LINE_DEVICE_HANDLER( devcb_line_vcc_r )
288{
289   return 1;
290}
291
273292#endif   /* __DEVCB_H__ */
src/mess/machine/upd7201.c
r0r5488
1/**********************************************************************
2
3    NEC µPD7201 Multiprotocol Serial Communications Controller emulation
4
5    Copyright MESS Team.
6    Visit http://mamedev.org for licensing and usage restrictions.
7
8**********************************************************************/
9
10#include "driver.h"
11#include "upd7201.h"
12
13/***************************************************************************
14    PARAMETERS
15***************************************************************************/
16
17
18/***************************************************************************
19    TYPE DEFINITIONS
20***************************************************************************/
21
22typedef struct _upd7201_t upd7201_t;
23struct _upd7201_t
24{
25   int dummy;
26};
27
28/***************************************************************************
29    INLINE FUNCTIONS
30***************************************************************************/
31
32INLINE upd7201_t *get_safe_token(const device_config *device)
33{
34   assert(device != NULL);
35   assert(device->token != NULL);
36
37   return (upd7201_t *)device->token;
38}
39
40INLINE const upd7201_interface *get_interface(const device_config *device)
41{
42   assert(device != NULL);
43   assert((device->type == UPD7201));
44   return (const upd7201_interface *) device->static_config;
45}
46
47/***************************************************************************
48    IMPLEMENTATION
49***************************************************************************/
50
51READ8_DEVICE_HANDLER( upd7201_cd_ba_r )
52{
53   return 0;
54}
55
56WRITE8_DEVICE_HANDLER( upd7201_cd_ba_w )
57{
58}
59
60READ8_DEVICE_HANDLER( upd7201_ba_cd_r )
61{
62   return 0;
63}
64
65WRITE8_DEVICE_HANDLER( upd7201_ba_cd_w )
66{
67}
68
69READ8_DEVICE_HANDLER( upd7201_hai_r )
70{
71   return 0;
72}
73
74WRITE8_DEVICE_HANDLER( upd7201_hai_w )
75{
76}
77
78READ8_DEVICE_HANDLER( upd7201_intak_r )
79{
80   return 0;
81}
82
83WRITE_LINE_DEVICE_HANDLER( upd7201_synca_w )
84{
85}
86
87WRITE_LINE_DEVICE_HANDLER( upd7201_syncb_w )
88{
89}
90
91WRITE_LINE_DEVICE_HANDLER( upd7201_rxca_w )
92{
93}
94
95WRITE_LINE_DEVICE_HANDLER( upd7201_rxcb_w )
96{
97}
98
99WRITE_LINE_DEVICE_HANDLER( upd7201_txca_w )
100{
101}
102
103WRITE_LINE_DEVICE_HANDLER( upd7201_txcb_w )
104{
105}
106
107/*-------------------------------------------------
108    DEVICE_START( upd7201 )
109-------------------------------------------------*/
110
111static DEVICE_START( upd7201 )
112{
113//   upd7201_t *upd7201 = get_safe_token(device);
114//   const upd7201_interface *intf = get_interface(device);
115
116   /* resolve callbacks */
117
118   /* set initial values */
119
120   /* create the timers */
121
122   /* register for state saving */
123//   state_save_register_device_item(device, 0, upd7201->);
124}
125
126/*-------------------------------------------------
127    DEVICE_GET_INFO( upd7201 )
128-------------------------------------------------*/
129
130DEVICE_GET_INFO( upd7201 )
131{
132   switch (state)
133   {
134      /* --- the following bits of info are returned as 64-bit signed integers --- */
135      case DEVINFO_INT_TOKEN_BYTES:               info->i = sizeof(upd7201_t);            break;
136      case DEVINFO_INT_INLINE_CONFIG_BYTES:         info->i = 0;                        break;
137      case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;         break;
138
139      /* --- the following bits of info are returned as pointers to data or functions --- */
140      case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(upd7201);   break;
141      case DEVINFO_FCT_STOP:                     /* Nothing */                        break;
142      case DEVINFO_FCT_RESET:                     /* Nothing */                        break;
143
144      /* --- the following bits of info are returned as NULL-terminated strings --- */
145      case DEVINFO_STR_NAME:                     strcpy(info->s, "NEC µPD7201");            break;
146      case DEVINFO_STR_FAMILY:                  strcpy(info->s, "NEC µPD7201");            break;
147      case DEVINFO_STR_VERSION:                  strcpy(info->s, "1.0");                  break;
148      case DEVINFO_STR_SOURCE_FILE:               strcpy(info->s, __FILE__);               break;
149      case DEVINFO_STR_CREDITS:                  strcpy(info->s, "Copyright MESS Team");      break;
150   }
151}
src/mess/machine/upd7201.h
r0r5488
1/**********************************************************************
2
3    NEC µPD7201 Multiprotocol Serial Communications Controller emulation
4
5    Copyright MESS Team.
6    Visit http://mamedev.org for licensing and usage restrictions.
7
8**********************************************************************
9                     _____   _____
10               CLK    1 |*    \_/     | 40  Vcc
11            _RESET    2 |          | 39  _CTSA
12             _DCDA    3 |          | 38  _RTSA
13             _RxCB    4 |          | 37  TxDA
14             _DCDB    5 |          | 36  _TxCA
15             _CTSB    6 |          | 35  _RxCA
16             _TxCB    7 |          | 34  RxDA
17              TxDB    8 |          | 33  _SYNCA
18              RxDB    9 |          | 32  _WAITA/DRQRxA
19        _RTSB/_SYNCB   10 |   UPD7201    | 31  _DTRA/_HAO
20      _WAITB/_DRQTxA   11 |          | 30  _PRO/DRQTxB
21               D7   12 |          | 29  _PRI/DRQRxB
22               D6   13 |          | 28  _INT
23               D5   14 |          | 27  _INTAK
24               D4   15 |          | 26  _DTRB/_HAI
25               D3   16 |          | 25  B/_A
26               D2   17 |          | 24  C/_D
27               D1   18 |          | 23  _CS
28               D0   19 |          | 22  _RD
29               Vss  20 |_____________| 21  _WR
30
31**********************************************************************/
32
33#ifndef __UPD7201__
34#define __UPD7201__
35
36#include "devcb.h"
37
38/***************************************************************************
39    MACROS / CONSTANTS
40***************************************************************************/
41
42#define UPD7201      DEVICE_GET_INFO_NAME(upd7201)
43
44#define MDRV_UPD7201_ADD(_tag, _clock, _intrf) \
45   MDRV_DEVICE_ADD(_tag, UPD7201, _clock) \
46   MDRV_DEVICE_CONFIG(_intrf)
47
48#define UPD7201_INTERFACE(name) \
49   const upd7201_interface (name)=
50
51/***************************************************************************
52    TYPE DEFINITIONS
53***************************************************************************/
54
55typedef struct _upd7201_interface upd7201_interface;
56struct _upd7201_interface
57{
58   devcb_write_line   out_int_func;
59
60   struct
61   {
62      int   rx_clock;      /* serial receive clock */
63      int   tx_clock;      /* serial transmit clock */
64
65      devcb_write_line   out_drqrx_func;
66      devcb_write_line   out_drqtx_func;
67
68      devcb_read_line      in_rxd_func;
69      devcb_write_line   out_txd_func;
70
71      devcb_read_line      in_cts_func;
72      devcb_read_line      in_dcd_func;
73      devcb_write_line   out_rts_func;
74      devcb_write_line   out_dtr_func;
75
76      devcb_write_line   out_wait_func;
77      devcb_write_line   out_sync_func;
78   } channel[2];
79};
80
81/***************************************************************************
82    PROTOTYPES
83***************************************************************************/
84
85/* device interface */
86DEVICE_GET_INFO( upd7201 );
87
88/* register access (A1=C/_D A0=B/_A) */
89READ8_DEVICE_HANDLER( upd7201_cd_ba_r );
90WRITE8_DEVICE_HANDLER( upd7201_cd_ba_w );
91
92/* register access (A1=B/_A A0=C/_D) */
93READ8_DEVICE_HANDLER( upd7201_ba_cd_r );
94WRITE8_DEVICE_HANDLER( upd7201_ba_cd_w );
95
96/* hold acknowledge input */
97READ8_DEVICE_HANDLER( upd7201_hai_r );
98WRITE8_DEVICE_HANDLER( upd7201_hai_w );
99
100/* interrupt acknowledge */
101READ8_DEVICE_HANDLER( upd7201_intak_r );
102
103/* external synchronization */
104WRITE_LINE_DEVICE_HANDLER( upd7201_synca_w );
105WRITE_LINE_DEVICE_HANDLER( upd7201_syncb_w );
106
107/* clock inputs */
108WRITE_LINE_DEVICE_HANDLER( upd7201_rxca_w );
109WRITE_LINE_DEVICE_HANDLER( upd7201_rxcb_w );
110WRITE_LINE_DEVICE_HANDLER( upd7201_txca_w );
111WRITE_LINE_DEVICE_HANDLER( upd7201_txcb_w );
112
113#endif
src/mess/mess.mak
r5487r5488
459459   $(MESS_MACHINE)/tc8521.o   \
460460   $(MESS_MACHINE)/upd1990a.o   \
461461   $(MESS_MACHINE)/upd7002.o   \
462   $(MESS_MACHINE)/upd7201.o   \
462463   $(MESS_MACHINE)/wd17xx.o   \
463464   $(MESS_MACHINE)/z80dart.o   \
464465   $(MESS_MACHINE)/z80sti.o   \
src/mess/drivers/mikromik.c
r5487r5488
88#include "machine/i8212.h"
99#include "machine/nec765.h"
1010#include "machine/pit8253.h"
11#include "machine/upd7201.h"
1112#include "video/i8275.h"
1213#include "video/i82720.h"
1314#include "video/upd7220.h"
r5487r5488
118119   AM_RANGE(0x0000, 0x3fff) AM_ROM
119120   AM_RANGE(0x4000, 0xbfff) AM_RAM
120121   AM_RANGE(0xff00, 0xff0f) AM_DEVREADWRITE(I8237_TAG, dma8237_r, dma8237_w)
121//   AM_RANGE(0xff10, 0xff13) AM_DEVREADWRITE(UPD7201_TAG, upd7201_r, upd7201_w)
122   AM_RANGE(0xff10, 0xff13) AM_DEVREADWRITE(UPD7201_TAG, upd7201_cd_ba_r, upd7201_cd_ba_w)
122123    AM_RANGE(0xff20, 0xff21) AM_DEVREADWRITE(I8275_TAG, i8275_r, i8275_w)
123124   AM_RANGE(0xff30, 0xff33) AM_DEVREADWRITE(I8253_TAG, pit8253_r, pit8253_w)
124125   AM_RANGE(0xff40, 0xff40) AM_DEVREADWRITE(I8212_TAG, i8212_r, i8212_w)
125126   AM_RANGE(0xff50, 0xff50) AM_DEVREAD(UPD765_TAG, nec765_status_r)
126127   AM_RANGE(0xff51, 0xff51) AM_DEVREADWRITE(UPD765_TAG, nec765_data_r, nec765_data_w)
127128   AM_RANGE(0xff60, 0xff67) AM_WRITE(cs6_w)
128//   AM_RANGE(0xff70, 0xff7f) AM_DEVREADWRITE(UPD7220_TAG, upd7220_r, upd7220_w)
129//   AM_RANGE(0xff70, 0xff7f) AM_DEVREADWRITE(UPD7220_TAG, i82720_r, i82720_w)
129130ADDRESS_MAP_END
130131
131132/* Input Ports */
r5487r5488
135136
136137/* Video */
137138
138static WRITE_LINE_DEVICE_HANDLER( crtc_dma_request )
139static WRITE_LINE_DEVICE_HANDLER( drqcrt_w )
139140{
140141   mm1_state *driver_state = device->machine->driver_data;
141142   //logerror("i8275 DMA\n");
r5487r5488
160161   SCREEN_TAG,
161162   8,
162163   0,
163   DEVCB_LINE(crtc_dma_request),
164   DEVCB_LINE(drqcrt_w),
164165   DEVCB_NULL,
165166   crtc_display_pixels
166167};
r5487r5488
204205
205206/* 8212 Interface */
206207
207static READ8_DEVICE_HANDLER( i8212_di_r )
208static READ8_DEVICE_HANDLER( kb_r )
208209{
209210   /* keyboard data */
210211   return 0;
r5487r5488
213214static I8212_INTERFACE( mm1_i8212_intf )
214215{
215216   DEVCB_CPU_INPUT_LINE(I8085A_TAG, I8085_RST65_LINE),
216   DEVCB_HANDLER(i8212_di_r),
217   DEVCB_HANDLER(kb_r),
217218   DEVCB_NULL
218219};
219220
r5487r5488
250251
251252static DMA8237_CHANNEL_READ( mpsc_dack_r )
252253{
253   //mm1_state *state = device->machine->driver_data;
254   mm1_state *state = device->machine->driver_data;
254255   
255   return 0; //upd7201_dack_r(state->upd7201, 0);
256   return upd7201_hai_r(state->upd7201, 0);
256257}
257258
258259static DMA8237_CHANNEL_WRITE( mpsc_dack_w )
259260{
260   //mm1_state *state = device->machine->driver_data;
261   mm1_state *state = device->machine->driver_data;
261262
262   //upd7201_dack_w(state->upd7201, 0, data);
263   upd7201_hai_w(state->upd7201, 0, data);
263264}
264265
265266static DMA8237_CHANNEL_READ( fdc_dack_r )
r5487r5488
276277   nec765_dack_w(state->upd765, 0, data);
277278}
278279
279static DMA8237_OUT_EOP( dma_eop_w )
280static DMA8237_OUT_EOP( tc_w )
280281{
281282   mm1_state *driver_state = device->machine->driver_data;
282283
r5487r5488
294295   memory_dma_w,
295296   { NULL, NULL, mpsc_dack_r, fdc_dack_r },
296297   { crtc_dack_w, mpsc_dack_w, NULL, fdc_dack_w },
297   dma_eop_w
298   tc_w
298299};
299300
300301/* µPD765 Interface */
301302
302static NEC765_DMA_REQUEST( fdc_drq )
303static NEC765_DMA_REQUEST( drq_w )
303304{
304305   mm1_state *driver_state = device->machine->driver_data;
305306
r5487r5488
309310static const nec765_interface mm1_nec765_intf =
310311{
311312   DEVCB_CPU_INPUT_LINE(I8085A_TAG, I8085_RST55_LINE),
312   fdc_drq,
313   drq_w,
313314   NULL,
314315   NEC765_RDY_PIN_CONNECTED // ???
315316};
r5487r5488
322323
323324   if (!driver_state->intc)
324325   {
325      //upd7201_txca_w(driver_state->upd7201, state);
326      upd7201_txca_w(driver_state->upd7201, state);
326327   }
327328}
328329
r5487r5488
332333
333334   if (!driver_state->intc)
334335   {
335      //upd7201_rxca_w(driver_state->upd7201, state);
336      upd7201_rxca_w(driver_state->upd7201, state);
336337   }
337338}
338339
339340static PIT8253_OUTPUT_CHANGED( auxc_w )
340341{
341   /*mm1_state *driver_state = device->machine->driver_data;
342   mm1_state *driver_state = device->machine->driver_data;
342343
343344   upd7201_txcb_w(driver_state->upd7201, state);
344   upd7201_rxcb_w(driver_state->upd7201, state);*/
345   upd7201_rxcb_w(driver_state->upd7201, state);
345346}
346347
347348static const struct pit8253_config mm1_pit8253_intf =
r5487r5488
360361   }
361362};
362363
364/* µPD7201 Interface */
365
366static WRITE_LINE_DEVICE_HANDLER( drq2_w )
367{
368   mm1_state *driver_state = device->machine->driver_data;
369
370   dma8237_drq_write(driver_state->i8237, 2, state);
371}
372
373static WRITE_LINE_DEVICE_HANDLER( drq1_w )
374{
375   mm1_state *driver_state = device->machine->driver_data;
376
377   dma8237_drq_write(driver_state->i8237, 1, state);
378}
379
380static UPD7201_INTERFACE( mm1_upd7201_intf )
381{
382   DEVCB_NULL,               /* interrupt */
383   {
384      {
385         0,               /* receive clock */
386         0,               /* transmit clock */
387         DEVCB_LINE(drq2_w),   /* receive DRQ */
388         DEVCB_LINE(drq1_w),   /* transmit DRQ */
389         DEVCB_NULL,         /* receive data */
390         DEVCB_NULL,         /* transmit data */
391         DEVCB_NULL,         /* clear to send */
392         DEVCB_NULL,         /* data carrier detect */
393         DEVCB_NULL,         /* ready to send */
394         DEVCB_NULL,         /* data terminal ready */
395         DEVCB_NULL,         /* wait */
396         DEVCB_NULL         /* sync output */
397      }, {
398         0,               /* receive clock */
399         0,               /* transmit clock */
400         DEVCB_NULL,         /* receive DRQ */
401         DEVCB_NULL,         /* transmit DRQ */
402         DEVCB_NULL,         /* receive data */
403         DEVCB_NULL,         /* transmit data */
404         DEVCB_NULL,         /* clear to send */
405         DEVCB_LINE_GND,      /* data carrier detect */
406         DEVCB_NULL,         /* ready to send */
407         DEVCB_NULL,         /* data terminal ready */
408         DEVCB_NULL,         /* wait */
409         DEVCB_NULL         /* sync output */
410      }
411   }
412};
413
363414/* 8085A Interface */
364415
365416static READ_LINE_DEVICE_HANDLER( dsra_r )
r5487r5488
433484   MDRV_DMA8237_ADD(I8237_TAG, /* XTAL_6_144MHz/2, */ mm1_dma8237_intf)
434485   MDRV_PIT8253_ADD(I8253_TAG, mm1_pit8253_intf)
435486   MDRV_NEC765A_ADD(UPD765_TAG, /* XTAL_16MHz/2/2, */ mm1_nec765_intf)
487   MDRV_UPD7201_ADD(UPD7201_TAG, XTAL_6_144MHz/2, mm1_upd7201_intf)
436488MACHINE_DRIVER_END
437489
438490static MACHINE_DRIVER_START( mm1m6 )
r5487r5488
461513/* System Configuration */
462514
463515static FLOPPY_OPTIONS_START( mm1 )
464   FLOPPY_OPTION( mm1, "dsk", "Nokia MikroMikko 1 disk image", basicdsk_identify_default, basicdsk_construct_default,
516   FLOPPY_OPTION( mm1_640kb, "dsk", "Nokia MikroMikko 1 640KB disk image", basicdsk_identify_default, basicdsk_construct_default,
465517      HEADS([2])
466518      TRACKS([80])
467519      SECTORS([8])
r5487r5488
469521      FIRST_SECTOR_ID([1]))
470522FLOPPY_OPTIONS_END
471523
472#ifdef UNUSED_CODE
473static DEVICE_IMAGE_LOAD( mm2_floppy )
474{
475   if (image_has_been_created(image))
476      return INIT_FAIL;
524static FLOPPY_OPTIONS_START( mm2 )
525   FLOPPY_OPTION( mm2_360kb, "dsk", "Nokia MikroMikko 2 360KB disk image", basicdsk_identify_default, basicdsk_construct_default,
526      HEADS([2])
527      TRACKS([40])
528      SECTORS([9])
529      SECTOR_LENGTH([512])
530      FIRST_SECTOR_ID([1]))
477531
478   if (device_load_basicdsk_floppy(image) == INIT_PASS)
479   {
480      int size = image_length(image);
532   FLOPPY_OPTION( mm2_720kb, "dsk", "Nokia MikroMikko 2 720KB disk image", basicdsk_identify_default, basicdsk_construct_default,
533      HEADS([2])
534      TRACKS([40])
535      SECTORS([18])
536      SECTOR_LENGTH([512])
537      FIRST_SECTOR_ID([1]))
538FLOPPY_OPTIONS_END
481539
482      switch (size)
483      {
484      case 40*2*9*512: // 360KB
485         /* image, tracks, heads, sectors per track, sector length, first sector id, offset track zero, track skipping */
486         basicdsk_set_geometry(image, 40, 2, 9, 512, 1, 0, FALSE);
487         break;
488
489      case 40*2*18*512: // 720KB (number of sectors has been doubled, instead of tracks as in 720KB DOS floppies)
490         /* image, tracks, heads, sectors per track, sector length, first sector id, offset track zero, track skipping */
491         basicdsk_set_geometry(image, 40, 2, 18, 512, 1, 0, FALSE);
492         break;
493
494      default:
495         return INIT_FAIL;
496      }
497
498      return INIT_PASS;
499   }
500
501   return INIT_FAIL;
502}
503#endif
504
505540static void dual_640kb_floppy(const mess_device_class *devclass, UINT32 state, union devinfo *info)
506541{
507542   switch(state)

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